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IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
[linux-2.6-block.git] / drivers / serial / vr41xx_siu.c
CommitLineData
1da177e4
LT		 1/*
2 * Driver for NEC VR4100 series Serial Interface Unit.
3 *
29ce2c76 4 * Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
1da177e4
LT		 5 *
6 * Based on drivers/serial/8250.c, by Russell King.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
1da177e4
LT		 22
23#if defined(CONFIG_SERIAL_VR41XX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
24#define SUPPORT_SYSRQ
25#endif
26
27#include <linux/console.h>
d052d1be 28#include <linux/platform_device.h>
1da177e4
LT		 29#include <linux/err.h>
30#include <linux/ioport.h>
31#include <linux/init.h>
32#include <linux/interrupt.h>
33#include <linux/module.h>
34#include <linux/serial.h>
35#include <linux/serial_core.h>
36#include <linux/serial_reg.h>
37#include <linux/tty.h>
38#include <linux/tty_flip.h>
39
40#include <asm/io.h>
66151bbd 41#include <asm/vr41xx/irq.h>
1da177e4
LT		 42#include <asm/vr41xx/siu.h>
43#include <asm/vr41xx/vr41xx.h>
44
45#define SIU_PORTS_MAX 2
46#define SIU_BAUD_BASE 1152000
47#define SIU_MAJOR 204
48#define SIU_MINOR_BASE 82
49
50#define RX_MAX_COUNT 256
51#define TX_MAX_COUNT 15
52
53#define SIUIRSEL 0x08
54 #define TMICMODE 0x20
55 #define TMICTX 0x10
56 #define IRMSEL 0x0c
57 #define IRMSEL_HP 0x08
58 #define IRMSEL_TEMIC 0x04
59 #define IRMSEL_SHARP 0x00
60 #define IRUSESEL 0x02
61 #define SIRSEL 0x01
62
63struct siu_port {
64 unsigned int type;
65 unsigned int irq;
66 unsigned long start;
67};
68
69static const struct siu_port siu_type1_ports[] = {
70 { .type = PORT_VR41XX_SIU,
71 .irq = SIU_IRQ,
72 .start = 0x0c000000UL, },
73};
74
75#define SIU_TYPE1_NR_PORTS (sizeof(siu_type1_ports) / sizeof(struct siu_port))
76
77static const struct siu_port siu_type2_ports[] = {
78 { .type = PORT_VR41XX_SIU,
79 .irq = SIU_IRQ,
80 .start = 0x0f000800UL, },
81 { .type = PORT_VR41XX_DSIU,
82 .irq = DSIU_IRQ,
83 .start = 0x0f000820UL, },
84};
85
86#define SIU_TYPE2_NR_PORTS (sizeof(siu_type2_ports) / sizeof(struct siu_port))
87
88static struct uart_port siu_uart_ports[SIU_PORTS_MAX];
89static uint8_t lsr_break_flag[SIU_PORTS_MAX];
90
91#define siu_read(port, offset) readb((port)->membase + (offset))
92#define siu_write(port, offset, value) writeb((value), (port)->membase + (offset))
93
94void vr41xx_select_siu_interface(siu_interface_t interface)
95{
96 struct uart_port *port;
97 unsigned long flags;
98 uint8_t irsel;
99
100 port = &siu_uart_ports[0];
101
102 spin_lock_irqsave(&port->lock, flags);
103
104 irsel = siu_read(port, SIUIRSEL);
105 if (interface == SIU_INTERFACE_IRDA)
106 irsel |= SIRSEL;
107 else
108 irsel &= ~SIRSEL;
109 siu_write(port, SIUIRSEL, irsel);
110
111 spin_unlock_irqrestore(&port->lock, flags);
112}
113
114EXPORT_SYMBOL_GPL(vr41xx_select_siu_interface);
115
116void vr41xx_use_irda(irda_use_t use)
117{
118 struct uart_port *port;
119 unsigned long flags;
120 uint8_t irsel;
121
122 port = &siu_uart_ports[0];
123
124 spin_lock_irqsave(&port->lock, flags);
125
126 irsel = siu_read(port, SIUIRSEL);
127 if (use == FIR_USE_IRDA)
128 irsel |= IRUSESEL;
129 else
130 irsel &= ~IRUSESEL;
131 siu_write(port, SIUIRSEL, irsel);
132
133 spin_unlock_irqrestore(&port->lock, flags);
134}
135
136EXPORT_SYMBOL_GPL(vr41xx_use_irda);
137
138void vr41xx_select_irda_module(irda_module_t module, irda_speed_t speed)
139{
140 struct uart_port *port;
141 unsigned long flags;
142 uint8_t irsel;
143
144 port = &siu_uart_ports[0];
145
146 spin_lock_irqsave(&port->lock, flags);
147
148 irsel = siu_read(port, SIUIRSEL);
149 irsel &= ~(IRMSEL | TMICTX | TMICMODE);
150 switch (module) {
151 case SHARP_IRDA:
152 irsel |= IRMSEL_SHARP;
153 break;
154 case TEMIC_IRDA:
155 irsel |= IRMSEL_TEMIC | TMICMODE;
156 if (speed == IRDA_TX_4MBPS)
157 irsel |= TMICTX;
158 break;
159 case HP_IRDA:
160 irsel |= IRMSEL_HP;
161 break;
162 default:
163 break;
164 }
165 siu_write(port, SIUIRSEL, irsel);
166
167 spin_unlock_irqrestore(&port->lock, flags);
168}
169
170EXPORT_SYMBOL_GPL(vr41xx_select_irda_module);
171
172static inline void siu_clear_fifo(struct uart_port *port)
173{
174 siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO);
175 siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
176 UART_FCR_CLEAR_XMIT);
177 siu_write(port, UART_FCR, 0);
178}
179
180static inline int siu_probe_ports(void)
181{
182 switch (current_cpu_data.cputype) {
183 case CPU_VR4111:
184 case CPU_VR4121:
185 return SIU_TYPE1_NR_PORTS;
186 case CPU_VR4122:
187 case CPU_VR4131:
188 case CPU_VR4133:
189 return SIU_TYPE2_NR_PORTS;
190 }
191
192 return 0;
193}
194
195static inline unsigned long siu_port_size(struct uart_port *port)
196{
197 switch (port->type) {
198 case PORT_VR41XX_SIU:
199 return 11UL;
200 case PORT_VR41XX_DSIU:
201 return 8UL;
202 }
203
204 return 0;
205}
206
207static inline unsigned int siu_check_type(struct uart_port *port)
208{
209 switch (current_cpu_data.cputype) {
210 case CPU_VR4111:
211 case CPU_VR4121:
212 if (port->line == 0)
213 return PORT_VR41XX_SIU;
214 break;
215 case CPU_VR4122:
216 case CPU_VR4131:
217 case CPU_VR4133:
218 if (port->line == 0)
219 return PORT_VR41XX_SIU;
220 else if (port->line == 1)
221 return PORT_VR41XX_DSIU;
222 break;
223 }
224
225 return PORT_UNKNOWN;
226}
227
228static inline const char *siu_type_name(struct uart_port *port)
229{
230 switch (port->type) {
231 case PORT_VR41XX_SIU:
232 return "SIU";
233 case PORT_VR41XX_DSIU:
234 return "DSIU";
235 }
236
eae936e2 237 return NULL;
1da177e4
LT		 238}
239
240static unsigned int siu_tx_empty(struct uart_port *port)
241{
242 uint8_t lsr;
243
244 lsr = siu_read(port, UART_LSR);
245 if (lsr & UART_LSR_TEMT)
246 return TIOCSER_TEMT;
247
248 return 0;
249}
250
251static void siu_set_mctrl(struct uart_port *port, unsigned int mctrl)
252{
253 uint8_t mcr = 0;
254
255 if (mctrl & TIOCM_DTR)
256 mcr |= UART_MCR_DTR;
257 if (mctrl & TIOCM_RTS)
258 mcr |= UART_MCR_RTS;
259 if (mctrl & TIOCM_OUT1)
260 mcr |= UART_MCR_OUT1;
261 if (mctrl & TIOCM_OUT2)
262 mcr |= UART_MCR_OUT2;
263 if (mctrl & TIOCM_LOOP)
264 mcr |= UART_MCR_LOOP;
265
266 siu_write(port, UART_MCR, mcr);
267}
268
269static unsigned int siu_get_mctrl(struct uart_port *port)
270{
271 uint8_t msr;
272 unsigned int mctrl = 0;
273
274 msr = siu_read(port, UART_MSR);
275 if (msr & UART_MSR_DCD)
276 mctrl |= TIOCM_CAR;
277 if (msr & UART_MSR_RI)
278 mctrl |= TIOCM_RNG;
279 if (msr & UART_MSR_DSR)
280 mctrl |= TIOCM_DSR;
281 if (msr & UART_MSR_CTS)
282 mctrl |= TIOCM_CTS;
283
284 return mctrl;
285}
286
b129a8cc 287static void siu_stop_tx(struct uart_port *port)
1da177e4
LT		 288{
289 unsigned long flags;
290 uint8_t ier;
291
292 spin_lock_irqsave(&port->lock, flags);
293
294 ier = siu_read(port, UART_IER);
295 ier &= ~UART_IER_THRI;
296 siu_write(port, UART_IER, ier);
297
298 spin_unlock_irqrestore(&port->lock, flags);
299}
300
b129a8cc 301static void siu_start_tx(struct uart_port *port)
1da177e4
LT		 302{
303 unsigned long flags;
304 uint8_t ier;
305
306 spin_lock_irqsave(&port->lock, flags);
307
308 ier = siu_read(port, UART_IER);
309 ier |= UART_IER_THRI;
310 siu_write(port, UART_IER, ier);
311
312 spin_unlock_irqrestore(&port->lock, flags);
313}
314
315static void siu_stop_rx(struct uart_port *port)
316{
317 unsigned long flags;
318 uint8_t ier;
319
320 spin_lock_irqsave(&port->lock, flags);
321
322 ier = siu_read(port, UART_IER);
323 ier &= ~UART_IER_RLSI;
324 siu_write(port, UART_IER, ier);
325
326 port->read_status_mask &= ~UART_LSR_DR;
327
328 spin_unlock_irqrestore(&port->lock, flags);
329}
330
331static void siu_enable_ms(struct uart_port *port)
332{
333 unsigned long flags;
334 uint8_t ier;
335
336 spin_lock_irqsave(&port->lock, flags);
337
338 ier = siu_read(port, UART_IER);
339 ier |= UART_IER_MSI;
340 siu_write(port, UART_IER, ier);
341
342 spin_unlock_irqrestore(&port->lock, flags);
343}
344
345static void siu_break_ctl(struct uart_port *port, int ctl)
346{
347 unsigned long flags;
348 uint8_t lcr;
349
350 spin_lock_irqsave(&port->lock, flags);
351
352 lcr = siu_read(port, UART_LCR);
353 if (ctl == -1)
354 lcr |= UART_LCR_SBC;
355 else
356 lcr &= ~UART_LCR_SBC;
357 siu_write(port, UART_LCR, lcr);
358
359 spin_unlock_irqrestore(&port->lock, flags);
360}
361
7d12e780 362static inline void receive_chars(struct uart_port *port, uint8_t *status)
1da177e4
LT		 363{
364 struct tty_struct *tty;
365 uint8_t lsr, ch;
366 char flag;
367 int max_count = RX_MAX_COUNT;
368
369 tty = port->info->tty;
370 lsr = *status;
371
372 do {
1da177e4
LT		 373 ch = siu_read(port, UART_RX);
374 port->icount.rx++;
375 flag = TTY_NORMAL;
376
377#ifdef CONFIG_SERIAL_VR41XX_CONSOLE
378 lsr |= lsr_break_flag[port->line];
379 lsr_break_flag[port->line] = 0;
380#endif
381 if (unlikely(lsr & (UART_LSR_BI | UART_LSR_FE |
382 UART_LSR_PE | UART_LSR_OE))) {
383 if (lsr & UART_LSR_BI) {
384 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
385 port->icount.brk++;
386
387 if (uart_handle_break(port))
388 goto ignore_char;
389 }
390
391 if (lsr & UART_LSR_FE)
392 port->icount.frame++;
393 if (lsr & UART_LSR_PE)
394 port->icount.parity++;
395 if (lsr & UART_LSR_OE)
396 port->icount.overrun++;
397
398 lsr &= port->read_status_mask;
399 if (lsr & UART_LSR_BI)
400 flag = TTY_BREAK;
401 if (lsr & UART_LSR_FE)
402 flag = TTY_FRAME;
403 if (lsr & UART_LSR_PE)
404 flag = TTY_PARITY;
405 }
406
7d12e780 407 if (uart_handle_sysrq_char(port, ch))
1da177e4 408 goto ignore_char;
05ab3014
RK		 409
410 uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
1da177e4
LT		 411
412 ignore_char:
413 lsr = siu_read(port, UART_LSR);
414 } while ((lsr & UART_LSR_DR) && (max_count-- > 0));
415
416 tty_flip_buffer_push(tty);
417
418 *status = lsr;
419}
420
421static inline void check_modem_status(struct uart_port *port)
422{
423 uint8_t msr;
424
425 msr = siu_read(port, UART_MSR);
426 if ((msr & UART_MSR_ANY_DELTA) == 0)
427 return;
428 if (msr & UART_MSR_DDCD)
429 uart_handle_dcd_change(port, msr & UART_MSR_DCD);
430 if (msr & UART_MSR_TERI)
431 port->icount.rng++;
432 if (msr & UART_MSR_DDSR)
433 port->icount.dsr++;
434 if (msr & UART_MSR_DCTS)
435 uart_handle_cts_change(port, msr & UART_MSR_CTS);
436
437 wake_up_interruptible(&port->info->delta_msr_wait);
438}
439
440static inline void transmit_chars(struct uart_port *port)
441{
442 struct circ_buf *xmit;
443 int max_count = TX_MAX_COUNT;
444
445 xmit = &port->info->xmit;
446
447 if (port->x_char) {
448 siu_write(port, UART_TX, port->x_char);
449 port->icount.tx++;
450 port->x_char = 0;
451 return;
452 }
453
454 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
b129a8cc 455 siu_stop_tx(port);
1da177e4
LT		 456 return;
457 }
458
459 do {
460 siu_write(port, UART_TX, xmit->buf[xmit->tail]);
461 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
462 port->icount.tx++;
463 if (uart_circ_empty(xmit))
464 break;
465 } while (max_count-- > 0);
466
467 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
468 uart_write_wakeup(port);
469
470 if (uart_circ_empty(xmit))
b129a8cc 471 siu_stop_tx(port);
1da177e4
LT		 472}
473
7d12e780 474static irqreturn_t siu_interrupt(int irq, void *dev_id)
1da177e4
LT		 475{
476 struct uart_port *port;
477 uint8_t iir, lsr;
478
1da177e4
LT		 479 port = (struct uart_port *)dev_id;
480
481 iir = siu_read(port, UART_IIR);
482 if (iir & UART_IIR_NO_INT)
483 return IRQ_NONE;
484
485 lsr = siu_read(port, UART_LSR);
486 if (lsr & UART_LSR_DR)
7d12e780 487 receive_chars(port, &lsr);
1da177e4
LT		 488
489 check_modem_status(port);
490
491 if (lsr & UART_LSR_THRE)
492 transmit_chars(port);
493
494 return IRQ_HANDLED;
495}
496
497static int siu_startup(struct uart_port *port)
498{
499 int retval;
500
eae936e2
YY		 501 if (port->membase == NULL)
502 return -ENODEV;
503
1da177e4
LT		 504 siu_clear_fifo(port);
505
506 (void)siu_read(port, UART_LSR);
507 (void)siu_read(port, UART_RX);
508 (void)siu_read(port, UART_IIR);
509 (void)siu_read(port, UART_MSR);
510
511 if (siu_read(port, UART_LSR) == 0xff)
512 return -ENODEV;
513
514 retval = request_irq(port->irq, siu_interrupt, 0, siu_type_name(port), port);
515 if (retval)
516 return retval;
517
518 if (port->type == PORT_VR41XX_DSIU)
519 vr41xx_enable_dsiuint(DSIUINT_ALL);
520
521 siu_write(port, UART_LCR, UART_LCR_WLEN8);
522
523 spin_lock_irq(&port->lock);
524 siu_set_mctrl(port, port->mctrl);
525 spin_unlock_irq(&port->lock);
526
527 siu_write(port, UART_IER, UART_IER_RLSI | UART_IER_RDI);
528
529 (void)siu_read(port, UART_LSR);
530 (void)siu_read(port, UART_RX);
531 (void)siu_read(port, UART_IIR);
532 (void)siu_read(port, UART_MSR);
533
534 return 0;
535}
536
537static void siu_shutdown(struct uart_port *port)
538{
539 unsigned long flags;
540 uint8_t lcr;
541
1da177e4
LT		 542 siu_write(port, UART_IER, 0);
543
544 spin_lock_irqsave(&port->lock, flags);
545
546 port->mctrl &= ~TIOCM_OUT2;
547 siu_set_mctrl(port, port->mctrl);
548
549 spin_unlock_irqrestore(&port->lock, flags);
550
551 lcr = siu_read(port, UART_LCR);
552 lcr &= ~UART_LCR_SBC;
553 siu_write(port, UART_LCR, lcr);
554
555 siu_clear_fifo(port);
556
557 (void)siu_read(port, UART_RX);
558
559 if (port->type == PORT_VR41XX_DSIU)
560 vr41xx_disable_dsiuint(DSIUINT_ALL);
561
562 free_irq(port->irq, port);
563}
564
565static void siu_set_termios(struct uart_port *port, struct termios *new,
566 struct termios *old)
567{
568 tcflag_t c_cflag, c_iflag;
569 uint8_t lcr, fcr, ier;
570 unsigned int baud, quot;
571 unsigned long flags;
572
573 c_cflag = new->c_cflag;
574 switch (c_cflag & CSIZE) {
575 case CS5:
576 lcr = UART_LCR_WLEN5;
577 break;
578 case CS6:
579 lcr = UART_LCR_WLEN6;
580 break;
581 case CS7:
582 lcr = UART_LCR_WLEN7;
583 break;
584 default:
585 lcr = UART_LCR_WLEN8;
586 break;
587 }
588
589 if (c_cflag & CSTOPB)
590 lcr |= UART_LCR_STOP;
591 if (c_cflag & PARENB)
592 lcr |= UART_LCR_PARITY;
593 if ((c_cflag & PARODD) != PARODD)
594 lcr |= UART_LCR_EPAR;
595 if (c_cflag & CMSPAR)
596 lcr |= UART_LCR_SPAR;
597
598 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
599 quot = uart_get_divisor(port, baud);
600
601 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10;
602
603 spin_lock_irqsave(&port->lock, flags);
604
605 uart_update_timeout(port, c_cflag, baud);
606
607 c_iflag = new->c_iflag;
608
609 port->read_status_mask = UART_LSR_THRE | UART_LSR_OE | UART_LSR_DR;
610 if (c_iflag & INPCK)
611 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
612 if (c_iflag & (BRKINT | PARMRK))
613 port->read_status_mask |= UART_LSR_BI;
614
615 port->ignore_status_mask = 0;
616 if (c_iflag & IGNPAR)
617 port->ignore_status_mask |= UART_LSR_FE | UART_LSR_PE;
618 if (c_iflag & IGNBRK) {
619 port->ignore_status_mask |= UART_LSR_BI;
620 if (c_iflag & IGNPAR)
621 port->ignore_status_mask |= UART_LSR_OE;
622 }
623
624 if ((c_cflag & CREAD) == 0)
625 port->ignore_status_mask |= UART_LSR_DR;
626
627 ier = siu_read(port, UART_IER);
628 ier &= ~UART_IER_MSI;
629 if (UART_ENABLE_MS(port, c_cflag))
630 ier |= UART_IER_MSI;
631 siu_write(port, UART_IER, ier);
632
633 siu_write(port, UART_LCR, lcr | UART_LCR_DLAB);
634
635 siu_write(port, UART_DLL, (uint8_t)quot);
636 siu_write(port, UART_DLM, (uint8_t)(quot >> 8));
637
638 siu_write(port, UART_LCR, lcr);
639
640 siu_write(port, UART_FCR, fcr);
641
642 siu_set_mctrl(port, port->mctrl);
643
644 spin_unlock_irqrestore(&port->lock, flags);
645}
646
647static void siu_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
648{
649 switch (state) {
650 case 0:
651 switch (port->type) {
652 case PORT_VR41XX_SIU:
653 vr41xx_supply_clock(SIU_CLOCK);
654 break;
655 case PORT_VR41XX_DSIU:
656 vr41xx_supply_clock(DSIU_CLOCK);
657 break;
658 }
659 break;
660 case 3:
661 switch (port->type) {
662 case PORT_VR41XX_SIU:
663 vr41xx_mask_clock(SIU_CLOCK);
664 break;
665 case PORT_VR41XX_DSIU:
666 vr41xx_mask_clock(DSIU_CLOCK);
667 break;
668 }
669 break;
670 }
671}
672
673static const char *siu_type(struct uart_port *port)
674{
675 return siu_type_name(port);
676}
677
678static void siu_release_port(struct uart_port *port)
679{
680 unsigned long size;
681
682 if (port->flags & UPF_IOREMAP) {
683 iounmap(port->membase);
684 port->membase = NULL;
685 }
686
687 size = siu_port_size(port);
688 release_mem_region(port->mapbase, size);
689}
690
691static int siu_request_port(struct uart_port *port)
692{
693 unsigned long size;
694 struct resource *res;
695
696 size = siu_port_size(port);
697 res = request_mem_region(port->mapbase, size, siu_type_name(port));
698 if (res == NULL)
699 return -EBUSY;
700
701 if (port->flags & UPF_IOREMAP) {
702 port->membase = ioremap(port->mapbase, size);
703 if (port->membase == NULL) {
704 release_resource(res);
705 return -ENOMEM;
706 }
707 }
708
709 return 0;
710}
711
712static void siu_config_port(struct uart_port *port, int flags)
713{
714 if (flags & UART_CONFIG_TYPE) {
715 port->type = siu_check_type(port);
716 (void)siu_request_port(port);
717 }
718}
719
720static int siu_verify_port(struct uart_port *port, struct serial_struct *serial)
721{
722 if (port->type != PORT_VR41XX_SIU && port->type != PORT_VR41XX_DSIU)
723 return -EINVAL;
724 if (port->irq != serial->irq)
725 return -EINVAL;
726 if (port->iotype != serial->io_type)
727 return -EINVAL;
728 if (port->mapbase != (unsigned long)serial->iomem_base)
729 return -EINVAL;
730
731 return 0;
732}
733
734static struct uart_ops siu_uart_ops = {
735 .tx_empty = siu_tx_empty,
736 .set_mctrl = siu_set_mctrl,
737 .get_mctrl = siu_get_mctrl,
738 .stop_tx = siu_stop_tx,
739 .start_tx = siu_start_tx,
740 .stop_rx = siu_stop_rx,
741 .enable_ms = siu_enable_ms,
742 .break_ctl = siu_break_ctl,
743 .startup = siu_startup,
744 .shutdown = siu_shutdown,
745 .set_termios = siu_set_termios,
746 .pm = siu_pm,
747 .type = siu_type,
748 .release_port = siu_release_port,
749 .request_port = siu_request_port,
750 .config_port = siu_config_port,
751 .verify_port = siu_verify_port,
752};
753
754static int siu_init_ports(void)
755{
756 const struct siu_port *siu;
757 struct uart_port *port;
758 int i, num;
759
760 switch (current_cpu_data.cputype) {
761 case CPU_VR4111:
762 case CPU_VR4121:
763 siu = siu_type1_ports;
764 break;
765 case CPU_VR4122:
766 case CPU_VR4131:
767 case CPU_VR4133:
768 siu = siu_type2_ports;
769 break;
770 default:
771 return 0;
772 }
773
774 port = siu_uart_ports;
775 num = siu_probe_ports();
776 for (i = 0; i < num; i++) {
777 spin_lock_init(&port->lock);
778 port->irq = siu->irq;
779 port->uartclk = SIU_BAUD_BASE * 16;
780 port->fifosize = 16;
781 port->regshift = 0;
782 port->iotype = UPIO_MEM;
783 port->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
784 port->type = siu->type;
785 port->line = i;
786 port->mapbase = siu->start;
787 siu++;
788 port++;
789 }
790
791 return num;
792}
793
794#ifdef CONFIG_SERIAL_VR41XX_CONSOLE
795
1da177e4
LT		 796#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
797
798static void wait_for_xmitr(struct uart_port *port)
799{
800 int timeout = 10000;
801 uint8_t lsr, msr;
802
803 do {
804 lsr = siu_read(port, UART_LSR);
805 if (lsr & UART_LSR_BI)
806 lsr_break_flag[port->line] = UART_LSR_BI;
807
808 if ((lsr & BOTH_EMPTY) == BOTH_EMPTY)
809 break;
810 } while (timeout-- > 0);
811
812 if (port->flags & UPF_CONS_FLOW) {
813 timeout = 1000000;
814
815 do {
816 msr = siu_read(port, UART_MSR);
817 if ((msr & UART_MSR_CTS) != 0)
818 break;
819 } while (timeout-- > 0);
820 }
821}
822
d358788f
RK		 823static void siu_console_putchar(struct uart_port *port, int ch)
824{
825 wait_for_xmitr(port);
826 siu_write(port, UART_TX, ch);
827}
828
1da177e4
LT		 829static void siu_console_write(struct console *con, const char *s, unsigned count)
830{
831 struct uart_port *port;
832 uint8_t ier;
1da177e4
LT		 833
834 port = &siu_uart_ports[con->index];
835
836 ier = siu_read(port, UART_IER);
837 siu_write(port, UART_IER, 0);
838
d358788f 839 uart_console_write(port, s, count, siu_console_putchar);
1da177e4
LT		 840
841 wait_for_xmitr(port);
842 siu_write(port, UART_IER, ier);
843}
844
845static int siu_console_setup(struct console *con, char *options)
846{
847 struct uart_port *port;
848 int baud = 9600;
849 int parity = 'n';
850 int bits = 8;
851 int flow = 'n';
852
853 if (con->index >= SIU_PORTS_MAX)
854 con->index = 0;
855
856 port = &siu_uart_ports[con->index];
857 if (port->membase == NULL) {
858 if (port->mapbase == 0)
859 return -ENODEV;
eae936e2 860 port->membase = ioremap(port->mapbase, siu_port_size(port));
1da177e4
LT		 861 }
862
863 vr41xx_select_siu_interface(SIU_INTERFACE_RS232C);
864
865 if (options != NULL)
866 uart_parse_options(options, &baud, &parity, &bits, &flow);
867
868 return uart_set_options(port, con, baud, parity, bits, flow);
869}
870
871static struct uart_driver siu_uart_driver;
872
873static struct console siu_console = {
874 .name = "ttyVR",
875 .write = siu_console_write,
876 .device = uart_console_device,
877 .setup = siu_console_setup,
878 .flags = CON_PRINTBUFFER,
879 .index = -1,
880 .data = &siu_uart_driver,
881};
882
883static int __devinit siu_console_init(void)
884{
885 struct uart_port *port;
886 int num, i;
887
888 num = siu_init_ports();
889 if (num <= 0)
890 return -ENODEV;
891
892 for (i = 0; i < num; i++) {
893 port = &siu_uart_ports[i];
eae936e2 894 port->ops = &siu_uart_ops;
1da177e4
LT		 895 }
896
897 register_console(&siu_console);
898
899 return 0;
900}
901
902console_initcall(siu_console_init);
903
904#define SERIAL_VR41XX_CONSOLE &siu_console
905#else
906#define SERIAL_VR41XX_CONSOLE NULL
907#endif
908
909static struct uart_driver siu_uart_driver = {
910 .owner = THIS_MODULE,
911 .driver_name = "SIU",
912 .dev_name = "ttyVR",
1da177e4
LT		 913 .major = SIU_MAJOR,
914 .minor = SIU_MINOR_BASE,
915 .cons = SERIAL_VR41XX_CONSOLE,
916};
917
d39b6cfe 918static int __devinit siu_probe(struct platform_device *dev)
1da177e4
LT		 919{
920 struct uart_port *port;
921 int num, i, retval;
922
923 num = siu_init_ports();
924 if (num <= 0)
925 return -ENODEV;
926
927 siu_uart_driver.nr = num;
928 retval = uart_register_driver(&siu_uart_driver);
929 if (retval)
930 return retval;
931
932 for (i = 0; i < num; i++) {
933 port = &siu_uart_ports[i];
934 port->ops = &siu_uart_ops;
3ae5eaec 935 port->dev = &dev->dev;
1da177e4
LT		 936
937 retval = uart_add_one_port(&siu_uart_driver, port);
eae936e2
YY		 938 if (retval < 0) {
939 port->dev = NULL;
1da177e4 940 break;
eae936e2 941 }
1da177e4
LT		 942 }
943
944 if (i == 0 && retval < 0) {
945 uart_unregister_driver(&siu_uart_driver);
946 return retval;
947 }
948
949 return 0;
950}
951
d39b6cfe 952static int __devexit siu_remove(struct platform_device *dev)
1da177e4
LT		 953{
954 struct uart_port *port;
955 int i;
956
957 for (i = 0; i < siu_uart_driver.nr; i++) {
958 port = &siu_uart_ports[i];
3ae5eaec 959 if (port->dev == &dev->dev) {
1da177e4
LT		 960 uart_remove_one_port(&siu_uart_driver, port);
961 port->dev = NULL;
962 }
963 }
964
965 uart_unregister_driver(&siu_uart_driver);
966
967 return 0;
968}
969
3ae5eaec 970static int siu_suspend(struct platform_device *dev, pm_message_t state)
1da177e4
LT		 971{
972 struct uart_port *port;
973 int i;
974
1da177e4
LT		 975 for (i = 0; i < siu_uart_driver.nr; i++) {
976 port = &siu_uart_ports[i];
977 if ((port->type == PORT_VR41XX_SIU ||
3ae5eaec 978 port->type == PORT_VR41XX_DSIU) && port->dev == &dev->dev)
1da177e4
LT		 979 uart_suspend_port(&siu_uart_driver, port);
980
981 }
982
983 return 0;
984}
985
3ae5eaec 986static int siu_resume(struct platform_device *dev)
1da177e4
LT		 987{
988 struct uart_port *port;
989 int i;
990
1da177e4
LT		 991 for (i = 0; i < siu_uart_driver.nr; i++) {
992 port = &siu_uart_ports[i];
993 if ((port->type == PORT_VR41XX_SIU ||
3ae5eaec 994 port->type == PORT_VR41XX_DSIU) && port->dev == &dev->dev)
1da177e4
LT		 995 uart_resume_port(&siu_uart_driver, port);
996 }
997
998 return 0;
999}
1000
1001static struct platform_device *siu_platform_device;
1002
3ae5eaec 1003static struct platform_driver siu_device_driver = {
1da177e4 1004 .probe = siu_probe,
d39b6cfe 1005 .remove = __devexit_p(siu_remove),
1da177e4
LT		 1006 .suspend = siu_suspend,
1007 .resume = siu_resume,
3ae5eaec
RK		 1008 .driver = {
1009 .name = "SIU",
d39b6cfe 1010 .owner = THIS_MODULE,
3ae5eaec 1011 },
1da177e4
LT		 1012};
1013
d39b6cfe 1014static int __init vr41xx_siu_init(void)
1da177e4
LT		 1015{
1016 int retval;
1017
d39b6cfe
DT		 1018 siu_platform_device = platform_device_alloc("SIU", -1);
1019 if (!siu_platform_device)
1020 return -ENOMEM;
1021
1022 retval = platform_device_add(siu_platform_device);
1023 if (retval < 0) {
1024 platform_device_put(siu_platform_device);
1025 return retval;
1026 }
1da177e4 1027
3ae5eaec 1028 retval = platform_driver_register(&siu_device_driver);
1da177e4
LT		 1029 if (retval < 0)
1030 platform_device_unregister(siu_platform_device);
1031
1032 return retval;
1033}
1034
d39b6cfe 1035static void __exit vr41xx_siu_exit(void)
1da177e4 1036{
3ae5eaec 1037 platform_driver_unregister(&siu_device_driver);
1da177e4
LT		 1038 platform_device_unregister(siu_platform_device);
1039}
1040
1041module_init(vr41xx_siu_init);
1042module_exit(vr41xx_siu_exit);
Linux 6.x block layer and io_uring tree(s)