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[PATCH] USB: URB_ASYNC_UNLINK flag removed from the kernel
[linux-2.6-block.git] / drivers / serial / sunsu.c
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1da177e4
LT		 1/* $Id: su.c,v 1.55 2002/01/08 16:00:16 davem Exp $
2 * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
3 *
4 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
5 * Copyright (C) 1998-1999 Pete Zaitcev (zaitcev@yahoo.com)
6 *
7 * This is mainly a variation of 8250.c, credits go to authors mentioned
8 * therein. In fact this driver should be merged into the generic 8250.c
9 * infrastructure perhaps using a 8250_sparc.c module.
10 *
11 * Fixed to use tty_get_baud_rate().
12 * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
13 *
14 * Converted to new 2.5.x UART layer.
15 * David S. Miller (davem@redhat.com), 2002-Jul-29
16 */
17
18#include <linux/config.h>
19#include <linux/module.h>
20#include <linux/kernel.h>
21#include <linux/sched.h>
22#include <linux/spinlock.h>
23#include <linux/errno.h>
24#include <linux/tty.h>
25#include <linux/tty_flip.h>
26#include <linux/major.h>
27#include <linux/string.h>
28#include <linux/ptrace.h>
29#include <linux/ioport.h>
30#include <linux/circ_buf.h>
31#include <linux/serial.h>
32#include <linux/sysrq.h>
33#include <linux/console.h>
34#ifdef CONFIG_SERIO
35#include <linux/serio.h>
36#endif
37#include <linux/serial_reg.h>
38#include <linux/init.h>
39#include <linux/delay.h>
40
41#include <asm/io.h>
42#include <asm/irq.h>
43#include <asm/oplib.h>
44#include <asm/ebus.h>
45#ifdef CONFIG_SPARC64
46#include <asm/isa.h>
47#endif
48
49#if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
50#define SUPPORT_SYSRQ
51#endif
52
53#include <linux/serial_core.h>
54
55#include "suncore.h"
56
57/* We are on a NS PC87303 clocked with 24.0 MHz, which results
58 * in a UART clock of 1.8462 MHz.
59 */
60#define SU_BASE_BAUD (1846200 / 16)
61
62enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
63static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
64
65/*
66 * Here we define the default xmit fifo size used for each type of UART.
67 */
68static const struct serial_uart_config uart_config[PORT_MAX_8250+1] = {
69 { "unknown", 1, 0 },
70 { "8250", 1, 0 },
71 { "16450", 1, 0 },
72 { "16550", 1, 0 },
73 { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },
74 { "Cirrus", 1, 0 },
75 { "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH },
76 { "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
77 { "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO },
78 { "Startech", 1, 0 },
79 { "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO },
80 { "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
81 { "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
82 { "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO }
83};
84
85struct uart_sunsu_port {
86 struct uart_port port;
87 unsigned char acr;
88 unsigned char ier;
89 unsigned short rev;
90 unsigned char lcr;
91 unsigned int lsr_break_flag;
92 unsigned int cflag;
93
94 /* Probing information. */
95 enum su_type su_type;
96 unsigned int type_probed; /* XXX Stupid */
97 int port_node;
98
99#ifdef CONFIG_SERIO
100 struct serio *serio;
101 int serio_open;
102#endif
103};
104
105#define _INLINE_
106
107static _INLINE_ unsigned int serial_in(struct uart_sunsu_port *up, int offset)
108{
109 offset <<= up->port.regshift;
110
111 switch (up->port.iotype) {
112 case SERIAL_IO_HUB6:
113 outb(up->port.hub6 - 1 + offset, up->port.iobase);
114 return inb(up->port.iobase + 1);
115
116 case SERIAL_IO_MEM:
117 return readb(up->port.membase + offset);
118
119 default:
120 return inb(up->port.iobase + offset);
121 }
122}
123
124static _INLINE_ void
125serial_out(struct uart_sunsu_port *up, int offset, int value)
126{
127#ifndef CONFIG_SPARC64
128 /*
129 * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
130 * connected with a gate then go to SlavIO. When IRQ4 goes tristated
131 * gate outputs a logical one. Since we use level triggered interrupts
132 * we have lockup and watchdog reset. We cannot mask IRQ because
133 * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
134 * This problem is similar to what Alpha people suffer, see serial.c.
135 */
136 if (offset == UART_MCR)
137 value |= UART_MCR_OUT2;
138#endif
139 offset <<= up->port.regshift;
140
141 switch (up->port.iotype) {
142 case SERIAL_IO_HUB6:
143 outb(up->port.hub6 - 1 + offset, up->port.iobase);
144 outb(value, up->port.iobase + 1);
145 break;
146
147 case SERIAL_IO_MEM:
148 writeb(value, up->port.membase + offset);
149 break;
150
151 default:
152 outb(value, up->port.iobase + offset);
153 }
154}
155
156/*
157 * We used to support using pause I/O for certain machines. We
158 * haven't supported this for a while, but just in case it's badly
159 * needed for certain old 386 machines, I've left these #define's
160 * in....
161 */
162#define serial_inp(up, offset) serial_in(up, offset)
163#define serial_outp(up, offset, value) serial_out(up, offset, value)
164
165
166/*
167 * For the 16C950
168 */
169static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
170{
171 serial_out(up, UART_SCR, offset);
172 serial_out(up, UART_ICR, value);
173}
174
175#if 0 /* Unused currently */
176static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
177{
178 unsigned int value;
179
180 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
181 serial_out(up, UART_SCR, offset);
182 value = serial_in(up, UART_ICR);
183 serial_icr_write(up, UART_ACR, up->acr);
184
185 return value;
186}
187#endif
188
189#ifdef CONFIG_SERIAL_8250_RSA
190/*
191 * Attempts to turn on the RSA FIFO. Returns zero on failure.
192 * We set the port uart clock rate if we succeed.
193 */
194static int __enable_rsa(struct uart_sunsu_port *up)
195{
196 unsigned char mode;
197 int result;
198
199 mode = serial_inp(up, UART_RSA_MSR);
200 result = mode & UART_RSA_MSR_FIFO;
201
202 if (!result) {
203 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
204 mode = serial_inp(up, UART_RSA_MSR);
205 result = mode & UART_RSA_MSR_FIFO;
206 }
207
208 if (result)
209 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
210
211 return result;
212}
213
214static void enable_rsa(struct uart_sunsu_port *up)
215{
216 if (up->port.type == PORT_RSA) {
217 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
218 spin_lock_irq(&up->port.lock);
219 __enable_rsa(up);
220 spin_unlock_irq(&up->port.lock);
221 }
222 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
223 serial_outp(up, UART_RSA_FRR, 0);
224 }
225}
226
227/*
228 * Attempts to turn off the RSA FIFO. Returns zero on failure.
229 * It is unknown why interrupts were disabled in here. However,
230 * the caller is expected to preserve this behaviour by grabbing
231 * the spinlock before calling this function.
232 */
233static void disable_rsa(struct uart_sunsu_port *up)
234{
235 unsigned char mode;
236 int result;
237
238 if (up->port.type == PORT_RSA &&
239 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
240 spin_lock_irq(&up->port.lock);
241
242 mode = serial_inp(up, UART_RSA_MSR);
243 result = !(mode & UART_RSA_MSR_FIFO);
244
245 if (!result) {
246 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
247 mode = serial_inp(up, UART_RSA_MSR);
248 result = !(mode & UART_RSA_MSR_FIFO);
249 }
250
251 if (result)
252 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
253 spin_unlock_irq(&up->port.lock);
254 }
255}
256#endif /* CONFIG_SERIAL_8250_RSA */
257
b129a8cc
RK		 258static inline void __stop_tx(struct uart_sunsu_port *p)
259{
260 if (p->ier & UART_IER_THRI) {
261 p->ier &= ~UART_IER_THRI;
262 serial_out(p, UART_IER, p->ier);
263 }
264}
265
266static void sunsu_stop_tx(struct uart_port *port)
1da177e4
LT		 267{
268 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
269
b129a8cc
RK		 270 __stop_tx(up);
271
3d9c9948
AV		 272 /*
273 * We really want to stop the transmitter from sending.
274 */
275 if (up->port.type == PORT_16C950) {
1da177e4
LT		 276 up->acr |= UART_ACR_TXDIS;
277 serial_icr_write(up, UART_ACR, up->acr);
278 }
279}
280
b129a8cc 281static void sunsu_start_tx(struct uart_port *port)
1da177e4
LT		 282{
283 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
284
285 if (!(up->ier & UART_IER_THRI)) {
286 up->ier |= UART_IER_THRI;
287 serial_out(up, UART_IER, up->ier);
288 }
3d9c9948 289
1da177e4 290 /*
3d9c9948 291 * Re-enable the transmitter if we disabled it.
1da177e4 292 */
3d9c9948 293 if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
1da177e4
LT		 294 up->acr &= ~UART_ACR_TXDIS;
295 serial_icr_write(up, UART_ACR, up->acr);
296 }
297}
298
299static void sunsu_stop_rx(struct uart_port *port)
300{
301 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
302 unsigned long flags;
303
304 spin_lock_irqsave(&up->port.lock, flags);
305 up->ier &= ~UART_IER_RLSI;
306 up->port.read_status_mask &= ~UART_LSR_DR;
307 serial_out(up, UART_IER, up->ier);
308 spin_unlock_irqrestore(&up->port.lock, flags);
309}
310
311static void sunsu_enable_ms(struct uart_port *port)
312{
313 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
314 unsigned long flags;
315
316 spin_lock_irqsave(&up->port.lock, flags);
317 up->ier |= UART_IER_MSI;
318 serial_out(up, UART_IER, up->ier);
319 spin_unlock_irqrestore(&up->port.lock, flags);
320}
321
322static _INLINE_ struct tty_struct *
323receive_chars(struct uart_sunsu_port *up, unsigned char *status, struct pt_regs *regs)
324{
325 struct tty_struct *tty = up->port.info->tty;
326 unsigned char ch;
327 int max_count = 256;
328 int saw_console_brk = 0;
329
330 do {
331 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
332 tty->flip.work.func((void *)tty);
333 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
334 return tty; // if TTY_DONT_FLIP is set
335 }
336 ch = serial_inp(up, UART_RX);
337 *tty->flip.char_buf_ptr = ch;
338 *tty->flip.flag_buf_ptr = TTY_NORMAL;
339 up->port.icount.rx++;
340
341 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
342 UART_LSR_FE | UART_LSR_OE))) {
343 /*
344 * For statistics only
345 */
346 if (*status & UART_LSR_BI) {
347 *status &= ~(UART_LSR_FE | UART_LSR_PE);
348 up->port.icount.brk++;
349 if (up->port.cons != NULL &&
350 up->port.line == up->port.cons->index)
351 saw_console_brk = 1;
352 /*
353 * We do the SysRQ and SAK checking
354 * here because otherwise the break
355 * may get masked by ignore_status_mask
356 * or read_status_mask.
357 */
358 if (uart_handle_break(&up->port))
359 goto ignore_char;
360 } else if (*status & UART_LSR_PE)
361 up->port.icount.parity++;
362 else if (*status & UART_LSR_FE)
363 up->port.icount.frame++;
364 if (*status & UART_LSR_OE)
365 up->port.icount.overrun++;
366
367 /*
368 * Mask off conditions which should be ingored.
369 */
370 *status &= up->port.read_status_mask;
371
372 if (up->port.cons != NULL &&
373 up->port.line == up->port.cons->index) {
374 /* Recover the break flag from console xmit */
375 *status |= up->lsr_break_flag;
376 up->lsr_break_flag = 0;
377 }
378
379 if (*status & UART_LSR_BI) {
380 *tty->flip.flag_buf_ptr = TTY_BREAK;
381 } else if (*status & UART_LSR_PE)
382 *tty->flip.flag_buf_ptr = TTY_PARITY;
383 else if (*status & UART_LSR_FE)
384 *tty->flip.flag_buf_ptr = TTY_FRAME;
385 }
386 if (uart_handle_sysrq_char(&up->port, ch, regs))
387 goto ignore_char;
388 if ((*status & up->port.ignore_status_mask) == 0) {
389 tty->flip.flag_buf_ptr++;
390 tty->flip.char_buf_ptr++;
391 tty->flip.count++;
392 }
393 if ((*status & UART_LSR_OE) &&
394 tty->flip.count < TTY_FLIPBUF_SIZE) {
395 /*
396 * Overrun is special, since it's reported
397 * immediately, and doesn't affect the current
398 * character.
399 */
400 *tty->flip.flag_buf_ptr = TTY_OVERRUN;
401 tty->flip.flag_buf_ptr++;
402 tty->flip.char_buf_ptr++;
403 tty->flip.count++;
404 }
405 ignore_char:
406 *status = serial_inp(up, UART_LSR);
407 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
408
409 if (saw_console_brk)
410 sun_do_break();
411
412 return tty;
413}
414
415static _INLINE_ void transmit_chars(struct uart_sunsu_port *up)
416{
417 struct circ_buf *xmit = &up->port.info->xmit;
418 int count;
419
420 if (up->port.x_char) {
421 serial_outp(up, UART_TX, up->port.x_char);
422 up->port.icount.tx++;
423 up->port.x_char = 0;
424 return;
425 }
b129a8cc
RK		 426 if (uart_tx_stopped(&up->port)) {
427 sunsu_stop_tx(&up->port);
428 return;
429 }
430 if (uart_circ_empty(xmit)) {
431 __stop_tx(up);
1da177e4
LT		 432 return;
433 }
434
435 count = up->port.fifosize;
436 do {
437 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
438 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
439 up->port.icount.tx++;
440 if (uart_circ_empty(xmit))
441 break;
442 } while (--count > 0);
443
444 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
445 uart_write_wakeup(&up->port);
446
447 if (uart_circ_empty(xmit))
b129a8cc 448 __stop_tx(up);
1da177e4
LT		 449}
450
451static _INLINE_ void check_modem_status(struct uart_sunsu_port *up)
452{
453 int status;
454
455 status = serial_in(up, UART_MSR);
456
457 if ((status & UART_MSR_ANY_DELTA) == 0)
458 return;
459
460 if (status & UART_MSR_TERI)
461 up->port.icount.rng++;
462 if (status & UART_MSR_DDSR)
463 up->port.icount.dsr++;
464 if (status & UART_MSR_DDCD)
465 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
466 if (status & UART_MSR_DCTS)
467 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
468
469 wake_up_interruptible(&up->port.info->delta_msr_wait);
470}
471
472static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id, struct pt_regs *regs)
473{
474 struct uart_sunsu_port *up = dev_id;
475 unsigned long flags;
476 unsigned char status;
477
478 spin_lock_irqsave(&up->port.lock, flags);
479
480 do {
481 struct tty_struct *tty;
482
483 status = serial_inp(up, UART_LSR);
484 tty = NULL;
485 if (status & UART_LSR_DR)
486 tty = receive_chars(up, &status, regs);
487 check_modem_status(up);
488 if (status & UART_LSR_THRE)
489 transmit_chars(up);
490
491 spin_unlock_irqrestore(&up->port.lock, flags);
492
493 if (tty)
494 tty_flip_buffer_push(tty);
495
496 spin_lock_irqsave(&up->port.lock, flags);
497
498 } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
499
500 spin_unlock_irqrestore(&up->port.lock, flags);
501
502 return IRQ_HANDLED;
503}
504
505/* Separate interrupt handling path for keyboard/mouse ports. */
506
507static void
508sunsu_change_speed(struct uart_port *port, unsigned int cflag,
509 unsigned int iflag, unsigned int quot);
510
511static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
512{
513 unsigned int cur_cflag = up->cflag;
514 int quot, new_baud;
515
516 up->cflag &= ~CBAUD;
517 up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
518
519 quot = up->port.uartclk / (16 * new_baud);
520
521 spin_unlock(&up->port.lock);
522
523 sunsu_change_speed(&up->port, up->cflag, 0, quot);
524
525 spin_lock(&up->port.lock);
526}
527
528static void receive_kbd_ms_chars(struct uart_sunsu_port *up, struct pt_regs *regs, int is_break)
529{
530 do {
531 unsigned char ch = serial_inp(up, UART_RX);
532
533 /* Stop-A is handled by drivers/char/keyboard.c now. */
534 if (up->su_type == SU_PORT_KBD) {
535#ifdef CONFIG_SERIO
536 serio_interrupt(up->serio, ch, 0, regs);
537#endif
538 } else if (up->su_type == SU_PORT_MS) {
539 int ret = suncore_mouse_baud_detection(ch, is_break);
540
541 switch (ret) {
542 case 2:
543 sunsu_change_mouse_baud(up);
544 /* fallthru */
545 case 1:
546 break;
547
548 case 0:
549#ifdef CONFIG_SERIO
550 serio_interrupt(up->serio, ch, 0, regs);
551#endif
552 break;
553 };
554 }
555 } while (serial_in(up, UART_LSR) & UART_LSR_DR);
556}
557
558static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id, struct pt_regs *regs)
559{
560 struct uart_sunsu_port *up = dev_id;
561
562 if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
563 unsigned char status = serial_inp(up, UART_LSR);
564
565 if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
566 receive_kbd_ms_chars(up, regs,
567 (status & UART_LSR_BI) != 0);
568 }
569
570 return IRQ_HANDLED;
571}
572
573static unsigned int sunsu_tx_empty(struct uart_port *port)
574{
575 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
576 unsigned long flags;
577 unsigned int ret;
578
579 spin_lock_irqsave(&up->port.lock, flags);
580 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
581 spin_unlock_irqrestore(&up->port.lock, flags);
582
583 return ret;
584}
585
586static unsigned int sunsu_get_mctrl(struct uart_port *port)
587{
588 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
1da177e4
LT		 589 unsigned char status;
590 unsigned int ret;
591
1da177e4 592 status = serial_in(up, UART_MSR);
1da177e4
LT		 593
594 ret = 0;
595 if (status & UART_MSR_DCD)
596 ret |= TIOCM_CAR;
597 if (status & UART_MSR_RI)
598 ret |= TIOCM_RNG;
599 if (status & UART_MSR_DSR)
600 ret |= TIOCM_DSR;
601 if (status & UART_MSR_CTS)
602 ret |= TIOCM_CTS;
603 return ret;
604}
605
606static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
607{
608 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
609 unsigned char mcr = 0;
610
611 if (mctrl & TIOCM_RTS)
612 mcr |= UART_MCR_RTS;
613 if (mctrl & TIOCM_DTR)
614 mcr |= UART_MCR_DTR;
615 if (mctrl & TIOCM_OUT1)
616 mcr |= UART_MCR_OUT1;
617 if (mctrl & TIOCM_OUT2)
618 mcr |= UART_MCR_OUT2;
619 if (mctrl & TIOCM_LOOP)
620 mcr |= UART_MCR_LOOP;
621
622 serial_out(up, UART_MCR, mcr);
623}
624
625static void sunsu_break_ctl(struct uart_port *port, int break_state)
626{
627 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
628 unsigned long flags;
629
630 spin_lock_irqsave(&up->port.lock, flags);
631 if (break_state == -1)
632 up->lcr |= UART_LCR_SBC;
633 else
634 up->lcr &= ~UART_LCR_SBC;
635 serial_out(up, UART_LCR, up->lcr);
636 spin_unlock_irqrestore(&up->port.lock, flags);
637}
638
639static int sunsu_startup(struct uart_port *port)
640{
641 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
642 unsigned long flags;
643 int retval;
644
645 if (up->port.type == PORT_16C950) {
646 /* Wake up and initialize UART */
647 up->acr = 0;
648 serial_outp(up, UART_LCR, 0xBF);
649 serial_outp(up, UART_EFR, UART_EFR_ECB);
650 serial_outp(up, UART_IER, 0);
651 serial_outp(up, UART_LCR, 0);
652 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
653 serial_outp(up, UART_LCR, 0xBF);
654 serial_outp(up, UART_EFR, UART_EFR_ECB);
655 serial_outp(up, UART_LCR, 0);
656 }
657
658#ifdef CONFIG_SERIAL_8250_RSA
659 /*
660 * If this is an RSA port, see if we can kick it up to the
661 * higher speed clock.
662 */
663 enable_rsa(up);
664#endif
665
666 /*
667 * Clear the FIFO buffers and disable them.
668 * (they will be reeanbled in set_termios())
669 */
670 if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
671 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
672 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
673 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
674 serial_outp(up, UART_FCR, 0);
675 }
676
677 /*
678 * Clear the interrupt registers.
679 */
680 (void) serial_inp(up, UART_LSR);
681 (void) serial_inp(up, UART_RX);
682 (void) serial_inp(up, UART_IIR);
683 (void) serial_inp(up, UART_MSR);
684
685 /*
686 * At this point, there's no way the LSR could still be 0xff;
687 * if it is, then bail out, because there's likely no UART
688 * here.
689 */
690 if (!(up->port.flags & ASYNC_BUGGY_UART) &&
691 (serial_inp(up, UART_LSR) == 0xff)) {
692 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
693 return -ENODEV;
694 }
695
696 if (up->su_type != SU_PORT_PORT) {
697 retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
698 SA_SHIRQ, su_typev[up->su_type], up);
699 } else {
700 retval = request_irq(up->port.irq, sunsu_serial_interrupt,
701 SA_SHIRQ, su_typev[up->su_type], up);
702 }
703 if (retval) {
704 printk("su: Cannot register IRQ %d\n", up->port.irq);
705 return retval;
706 }
707
708 /*
709 * Now, initialize the UART
710 */
711 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
712
713 spin_lock_irqsave(&up->port.lock, flags);
714
715 up->port.mctrl |= TIOCM_OUT2;
716
717 sunsu_set_mctrl(&up->port, up->port.mctrl);
718 spin_unlock_irqrestore(&up->port.lock, flags);
719
720 /*
721 * Finally, enable interrupts. Note: Modem status interrupts
722 * are set via set_termios(), which will be occurring imminently
723 * anyway, so we don't enable them here.
724 */
725 up->ier = UART_IER_RLSI | UART_IER_RDI;
726 serial_outp(up, UART_IER, up->ier);
727
728 if (up->port.flags & ASYNC_FOURPORT) {
729 unsigned int icp;
730 /*
731 * Enable interrupts on the AST Fourport board
732 */
733 icp = (up->port.iobase & 0xfe0) | 0x01f;
734 outb_p(0x80, icp);
735 (void) inb_p(icp);
736 }
737
738 /*
739 * And clear the interrupt registers again for luck.
740 */
741 (void) serial_inp(up, UART_LSR);
742 (void) serial_inp(up, UART_RX);
743 (void) serial_inp(up, UART_IIR);
744 (void) serial_inp(up, UART_MSR);
745
746 return 0;
747}
748
749static void sunsu_shutdown(struct uart_port *port)
750{
751 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
752 unsigned long flags;
753
754 /*
755 * Disable interrupts from this port
756 */
757 up->ier = 0;
758 serial_outp(up, UART_IER, 0);
759
760 spin_lock_irqsave(&up->port.lock, flags);
761 if (up->port.flags & ASYNC_FOURPORT) {
762 /* reset interrupts on the AST Fourport board */
763 inb((up->port.iobase & 0xfe0) | 0x1f);
764 up->port.mctrl |= TIOCM_OUT1;
765 } else
766 up->port.mctrl &= ~TIOCM_OUT2;
767
768 sunsu_set_mctrl(&up->port, up->port.mctrl);
769 spin_unlock_irqrestore(&up->port.lock, flags);
770
771 /*
772 * Disable break condition and FIFOs
773 */
774 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
775 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
776 UART_FCR_CLEAR_RCVR |
777 UART_FCR_CLEAR_XMIT);
778 serial_outp(up, UART_FCR, 0);
779
780#ifdef CONFIG_SERIAL_8250_RSA
781 /*
782 * Reset the RSA board back to 115kbps compat mode.
783 */
784 disable_rsa(up);
785#endif
786
787 /*
788 * Read data port to reset things.
789 */
790 (void) serial_in(up, UART_RX);
791
792 free_irq(up->port.irq, up);
793}
794
795static void
796sunsu_change_speed(struct uart_port *port, unsigned int cflag,
797 unsigned int iflag, unsigned int quot)
798{
799 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
800 unsigned char cval, fcr = 0;
801 unsigned long flags;
802
803 switch (cflag & CSIZE) {
804 case CS5:
805 cval = 0x00;
806 break;
807 case CS6:
808 cval = 0x01;
809 break;
810 case CS7:
811 cval = 0x02;
812 break;
813 default:
814 case CS8:
815 cval = 0x03;
816 break;
817 }
818
819 if (cflag & CSTOPB)
820 cval |= 0x04;
821 if (cflag & PARENB)
822 cval |= UART_LCR_PARITY;
823 if (!(cflag & PARODD))
824 cval |= UART_LCR_EPAR;
825#ifdef CMSPAR
826 if (cflag & CMSPAR)
827 cval |= UART_LCR_SPAR;
828#endif
829
830 /*
831 * Work around a bug in the Oxford Semiconductor 952 rev B
832 * chip which causes it to seriously miscalculate baud rates
833 * when DLL is 0.
834 */
835 if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
836 up->rev == 0x5201)
837 quot ++;
838
839 if (uart_config[up->port.type].flags & UART_USE_FIFO) {
840 if ((up->port.uartclk / quot) < (2400 * 16))
841 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
842#ifdef CONFIG_SERIAL_8250_RSA
843 else if (up->port.type == PORT_RSA)
844 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
845#endif
846 else
847 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
848 }
849 if (up->port.type == PORT_16750)
850 fcr |= UART_FCR7_64BYTE;
851
852 /*
853 * Ok, we're now changing the port state. Do it with
854 * interrupts disabled.
855 */
856 spin_lock_irqsave(&up->port.lock, flags);
857
858 /*
859 * Update the per-port timeout.
860 */
861 uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
862
863 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
864 if (iflag & INPCK)
865 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
866 if (iflag & (BRKINT | PARMRK))
867 up->port.read_status_mask |= UART_LSR_BI;
868
869 /*
870 * Characteres to ignore
871 */
872 up->port.ignore_status_mask = 0;
873 if (iflag & IGNPAR)
874 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
875 if (iflag & IGNBRK) {
876 up->port.ignore_status_mask |= UART_LSR_BI;
877 /*
878 * If we're ignoring parity and break indicators,
879 * ignore overruns too (for real raw support).
880 */
881 if (iflag & IGNPAR)
882 up->port.ignore_status_mask |= UART_LSR_OE;
883 }
884
885 /*
886 * ignore all characters if CREAD is not set
887 */
888 if ((cflag & CREAD) == 0)
889 up->port.ignore_status_mask |= UART_LSR_DR;
890
891 /*
892 * CTS flow control flag and modem status interrupts
893 */
894 up->ier &= ~UART_IER_MSI;
895 if (UART_ENABLE_MS(&up->port, cflag))
896 up->ier |= UART_IER_MSI;
897
898 serial_out(up, UART_IER, up->ier);
899
900 if (uart_config[up->port.type].flags & UART_STARTECH) {
901 serial_outp(up, UART_LCR, 0xBF);
902 serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
903 }
904 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
905 serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
906 serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
907 if (up->port.type == PORT_16750)
908 serial_outp(up, UART_FCR, fcr); /* set fcr */
909 serial_outp(up, UART_LCR, cval); /* reset DLAB */
910 up->lcr = cval; /* Save LCR */
911 if (up->port.type != PORT_16750) {
912 if (fcr & UART_FCR_ENABLE_FIFO) {
913 /* emulated UARTs (Lucent Venus 167x) need two steps */
914 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
915 }
916 serial_outp(up, UART_FCR, fcr); /* set fcr */
917 }
918
919 up->cflag = cflag;
920
921 spin_unlock_irqrestore(&up->port.lock, flags);
922}
923
924static void
925sunsu_set_termios(struct uart_port *port, struct termios *termios,
926 struct termios *old)
927{
928 unsigned int baud, quot;
929
930 /*
931 * Ask the core to calculate the divisor for us.
932 */
933 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
934 quot = uart_get_divisor(port, baud);
935
936 sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
937}
938
939static void sunsu_release_port(struct uart_port *port)
940{
941}
942
943static int sunsu_request_port(struct uart_port *port)
944{
945 return 0;
946}
947
948static void sunsu_config_port(struct uart_port *port, int flags)
949{
950 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
951
952 if (flags & UART_CONFIG_TYPE) {
953 /*
954 * We are supposed to call autoconfig here, but this requires
955 * splitting all the OBP probing crap from the UART probing.
956 * We'll do it when we kill sunsu.c altogether.
957 */
958 port->type = up->type_probed; /* XXX */
959 }
960}
961
962static int
963sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
964{
965 return -EINVAL;
966}
967
968static const char *
969sunsu_type(struct uart_port *port)
970{
971 int type = port->type;
972
973 if (type >= ARRAY_SIZE(uart_config))
974 type = 0;
975 return uart_config[type].name;
976}
977
978static struct uart_ops sunsu_pops = {
979 .tx_empty = sunsu_tx_empty,
980 .set_mctrl = sunsu_set_mctrl,
981 .get_mctrl = sunsu_get_mctrl,
982 .stop_tx = sunsu_stop_tx,
983 .start_tx = sunsu_start_tx,
984 .stop_rx = sunsu_stop_rx,
985 .enable_ms = sunsu_enable_ms,
986 .break_ctl = sunsu_break_ctl,
987 .startup = sunsu_startup,
988 .shutdown = sunsu_shutdown,
989 .set_termios = sunsu_set_termios,
990 .type = sunsu_type,
991 .release_port = sunsu_release_port,
992 .request_port = sunsu_request_port,
993 .config_port = sunsu_config_port,
994 .verify_port = sunsu_verify_port,
995};
996
997#define UART_NR 4
998
999static struct uart_sunsu_port sunsu_ports[UART_NR];
1000
1001#ifdef CONFIG_SERIO
1002
1003static DEFINE_SPINLOCK(sunsu_serio_lock);
1004
1005static int sunsu_serio_write(struct serio *serio, unsigned char ch)
1006{
1007 struct uart_sunsu_port *up = serio->port_data;
1008 unsigned long flags;
1009 int lsr;
1010
1011 spin_lock_irqsave(&sunsu_serio_lock, flags);
1012
1013 do {
1014 lsr = serial_in(up, UART_LSR);
1015 } while (!(lsr & UART_LSR_THRE));
1016
1017 /* Send the character out. */
1018 serial_out(up, UART_TX, ch);
1019
1020 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1021
1022 return 0;
1023}
1024
1025static int sunsu_serio_open(struct serio *serio)
1026{
1027 struct uart_sunsu_port *up = serio->port_data;
1028 unsigned long flags;
1029 int ret;
1030
1031 spin_lock_irqsave(&sunsu_serio_lock, flags);
1032 if (!up->serio_open) {
1033 up->serio_open = 1;
1034 ret = 0;
1035 } else
1036 ret = -EBUSY;
1037 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1038
1039 return ret;
1040}
1041
1042static void sunsu_serio_close(struct serio *serio)
1043{
1044 struct uart_sunsu_port *up = serio->port_data;
1045 unsigned long flags;
1046
1047 spin_lock_irqsave(&sunsu_serio_lock, flags);
1048 up->serio_open = 0;
1049 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1050}
1051
1052#endif /* CONFIG_SERIO */
1053
1054static void sunsu_autoconfig(struct uart_sunsu_port *up)
1055{
1056 unsigned char status1, status2, scratch, scratch2, scratch3;
1057 unsigned char save_lcr, save_mcr;
1058 struct linux_ebus_device *dev = NULL;
1059 struct linux_ebus *ebus;
1060#ifdef CONFIG_SPARC64
1061 struct sparc_isa_bridge *isa_br;
1062 struct sparc_isa_device *isa_dev;
1063#endif
1064#ifndef CONFIG_SPARC64
1065 struct linux_prom_registers reg0;
1066#endif
1067 unsigned long flags;
1068
1069 if (!up->port_node || !up->su_type)
1070 return;
1071
1072 up->type_probed = PORT_UNKNOWN;
1073 up->port.iotype = SERIAL_IO_MEM;
1074
1075 /*
1076 * First we look for Ebus-bases su's
1077 */
1078 for_each_ebus(ebus) {
1079 for_each_ebusdev(dev, ebus) {
1080 if (dev->prom_node == up->port_node) {
1081 /*
1082 * The EBus is broken on sparc; it delivers
1083 * virtual addresses in resources. Oh well...
1084 * This is correct on sparc64, though.
1085 */
1086 up->port.membase = (char *) dev->resource[0].start;
1087 /*
1088 * This is correct on both architectures.
1089 */
1090 up->port.mapbase = dev->resource[0].start;
1091 up->port.irq = dev->irqs[0];
1092 goto ebus_done;
1093 }
1094 }
1095 }
1096
1097#ifdef CONFIG_SPARC64
1098 for_each_isa(isa_br) {
1099 for_each_isadev(isa_dev, isa_br) {
1100 if (isa_dev->prom_node == up->port_node) {
1101 /* Same on sparc64. Cool architecure... */
1102 up->port.membase = (char *) isa_dev->resource.start;
1103 up->port.mapbase = isa_dev->resource.start;
1104 up->port.irq = isa_dev->irq;
1105 goto ebus_done;
1106 }
1107 }
1108 }
1109#endif
1110
1111#ifdef CONFIG_SPARC64
1112 /*
1113 * Not on Ebus, bailing.
1114 */
1115 return;
1116#else
1117 /*
1118 * Not on Ebus, must be OBIO.
1119 */
1120 if (prom_getproperty(up->port_node, "reg",
1121 (char *)&reg0, sizeof(reg0)) == -1) {
1122 prom_printf("sunsu: no \"reg\" property\n");
1123 return;
1124 }
1125 prom_apply_obio_ranges(&reg0, 1);
1126 if (reg0.which_io != 0) { /* Just in case... */
1127 prom_printf("sunsu: bus number nonzero: 0x%x:%x\n",
1128 reg0.which_io, reg0.phys_addr);
1129 return;
1130 }
1131 up->port.mapbase = reg0.phys_addr;
1132 if ((up->port.membase = ioremap(reg0.phys_addr, reg0.reg_size)) == 0) {
1133 prom_printf("sunsu: Cannot map registers.\n");
1134 return;
1135 }
1136
1137 /*
1138 * 0x20 is sun4m thing, Dave Redman heritage.
1139 * See arch/sparc/kernel/irq.c.
1140 */
1141#define IRQ_4M(n) ((n)|0x20)
1142
1143 /*
1144 * There is no intr property on MrCoffee, so hardwire it.
1145 */
1146 up->port.irq = IRQ_4M(13);
1147#endif
1148
1149ebus_done:
1150
1151 spin_lock_irqsave(&up->port.lock, flags);
1152
1153 if (!(up->port.flags & ASYNC_BUGGY_UART)) {
1154 /*
1155 * Do a simple existence test first; if we fail this, there's
1156 * no point trying anything else.
1157 *
1158 * 0x80 is used as a nonsense port to prevent against false
1159 * positives due to ISA bus float. The assumption is that
1160 * 0x80 is a non-existent port; which should be safe since
1161 * include/asm/io.h also makes this assumption.
1162 */
1163 scratch = serial_inp(up, UART_IER);
1164 serial_outp(up, UART_IER, 0);
1165#ifdef __i386__
1166 outb(0xff, 0x080);
1167#endif
1168 scratch2 = serial_inp(up, UART_IER);
1169 serial_outp(up, UART_IER, 0x0f);
1170#ifdef __i386__
1171 outb(0, 0x080);
1172#endif
1173 scratch3 = serial_inp(up, UART_IER);
1174 serial_outp(up, UART_IER, scratch);
1175 if (scratch2 != 0 || scratch3 != 0x0F)
1176 goto out; /* We failed; there's nothing here */
1177 }
1178
1179 save_mcr = serial_in(up, UART_MCR);
1180 save_lcr = serial_in(up, UART_LCR);
1181
1182 /*
1183 * Check to see if a UART is really there. Certain broken
1184 * internal modems based on the Rockwell chipset fail this
1185 * test, because they apparently don't implement the loopback
1186 * test mode. So this test is skipped on the COM 1 through
1187 * COM 4 ports. This *should* be safe, since no board
1188 * manufacturer would be stupid enough to design a board
1189 * that conflicts with COM 1-4 --- we hope!
1190 */
1191 if (!(up->port.flags & ASYNC_SKIP_TEST)) {
1192 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1193 status1 = serial_inp(up, UART_MSR) & 0xF0;
1194 serial_outp(up, UART_MCR, save_mcr);
1195 if (status1 != 0x90)
1196 goto out; /* We failed loopback test */
1197 }
1198 serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */
1199 serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */
1200 serial_outp(up, UART_LCR, 0);
1201 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1202 scratch = serial_in(up, UART_IIR) >> 6;
1203 switch (scratch) {
1204 case 0:
1205 up->port.type = PORT_16450;
1206 break;
1207 case 1:
1208 up->port.type = PORT_UNKNOWN;
1209 break;
1210 case 2:
1211 up->port.type = PORT_16550;
1212 break;
1213 case 3:
1214 up->port.type = PORT_16550A;
1215 break;
1216 }
1217 if (up->port.type == PORT_16550A) {
1218 /* Check for Startech UART's */
1219 serial_outp(up, UART_LCR, UART_LCR_DLAB);
1220 if (serial_in(up, UART_EFR) == 0) {
1221 up->port.type = PORT_16650;
1222 } else {
1223 serial_outp(up, UART_LCR, 0xBF);
1224 if (serial_in(up, UART_EFR) == 0)
1225 up->port.type = PORT_16650V2;
1226 }
1227 }
1228 if (up->port.type == PORT_16550A) {
1229 /* Check for TI 16750 */
1230 serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
1231 serial_outp(up, UART_FCR,
1232 UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1233 scratch = serial_in(up, UART_IIR) >> 5;
1234 if (scratch == 7) {
1235 /*
1236 * If this is a 16750, and not a cheap UART
1237 * clone, then it should only go into 64 byte
1238 * mode if the UART_FCR7_64BYTE bit was set
1239 * while UART_LCR_DLAB was latched.
1240 */
1241 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1242 serial_outp(up, UART_LCR, 0);
1243 serial_outp(up, UART_FCR,
1244 UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1245 scratch = serial_in(up, UART_IIR) >> 5;
1246 if (scratch == 6)
1247 up->port.type = PORT_16750;
1248 }
1249 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1250 }
1251 serial_outp(up, UART_LCR, save_lcr);
1252 if (up->port.type == PORT_16450) {
1253 scratch = serial_in(up, UART_SCR);
1254 serial_outp(up, UART_SCR, 0xa5);
1255 status1 = serial_in(up, UART_SCR);
1256 serial_outp(up, UART_SCR, 0x5a);
1257 status2 = serial_in(up, UART_SCR);
1258 serial_outp(up, UART_SCR, scratch);
1259
1260 if ((status1 != 0xa5) || (status2 != 0x5a))
1261 up->port.type = PORT_8250;
1262 }
1263
1264 up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
1265
1266 if (up->port.type == PORT_UNKNOWN)
1267 goto out;
1268 up->type_probed = up->port.type; /* XXX */
1269
1270 /*
1271 * Reset the UART.
1272 */
1273#ifdef CONFIG_SERIAL_8250_RSA
1274 if (up->port.type == PORT_RSA)
1275 serial_outp(up, UART_RSA_FRR, 0);
1276#endif
1277 serial_outp(up, UART_MCR, save_mcr);
1278 serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
1279 UART_FCR_CLEAR_RCVR |
1280 UART_FCR_CLEAR_XMIT));
1281 serial_outp(up, UART_FCR, 0);
1282 (void)serial_in(up, UART_RX);
1283 serial_outp(up, UART_IER, 0);
1284
1285out:
1286 spin_unlock_irqrestore(&up->port.lock, flags);
1287}
1288
1289static struct uart_driver sunsu_reg = {
1290 .owner = THIS_MODULE,
1291 .driver_name = "serial",
1292 .devfs_name = "tts/",
1293 .dev_name = "ttyS",
1294 .major = TTY_MAJOR,
1295};
1296
1297static int __init sunsu_kbd_ms_init(struct uart_sunsu_port *up, int channel)
1298{
623f41eb 1299 int quot, baud;
1da177e4
LT		 1300#ifdef CONFIG_SERIO
1301 struct serio *serio;
1302#endif
1303
1304 up->port.line = channel;
1305 up->port.type = PORT_UNKNOWN;
1306 up->port.uartclk = (SU_BASE_BAUD * 16);
1307
623f41eb 1308 if (up->su_type == SU_PORT_KBD) {
1da177e4 1309 up->cflag = B1200 | CS8 | CLOCAL | CREAD;
623f41eb
DM		 1310 baud = 1200;
1311 } else {
1da177e4 1312 up->cflag = B4800 | CS8 | CLOCAL | CREAD;
623f41eb
DM		 1313 baud = 4800;
1314 }
1315 quot = up->port.uartclk / (16 * baud);
1da177e4
LT		 1316
1317 sunsu_autoconfig(up);
1318 if (up->port.type == PORT_UNKNOWN)
1319 return -1;
1320
1321 printk(KERN_INFO "su%d at 0x%p (irq = %s) is a %s\n",
1322 channel,
1323 up->port.membase, __irq_itoa(up->port.irq),
1324 sunsu_type(&up->port));
1325
1326#ifdef CONFIG_SERIO
1327 up->serio = serio = kmalloc(sizeof(struct serio), GFP_KERNEL);
1328 if (serio) {
1329 memset(serio, 0, sizeof(*serio));
1330
1331 serio->port_data = up;
1332
1333 serio->id.type = SERIO_RS232;
1334 if (up->su_type == SU_PORT_KBD) {
1335 serio->id.proto = SERIO_SUNKBD;
1336 strlcpy(serio->name, "sukbd", sizeof(serio->name));
1337 } else {
1338 serio->id.proto = SERIO_SUN;
1339 serio->id.extra = 1;
1340 strlcpy(serio->name, "sums", sizeof(serio->name));
1341 }
1342 strlcpy(serio->phys, (channel == 0 ? "su/serio0" : "su/serio1"),
1343 sizeof(serio->phys));
1344
1345 serio->write = sunsu_serio_write;
1346 serio->open = sunsu_serio_open;
1347 serio->close = sunsu_serio_close;
1348
1349 serio_register_port(serio);
1350 } else {
1351 printk(KERN_WARNING "su%d: not enough memory for serio port\n",
1352 channel);
1353 }
1354#endif
1355
623f41eb
DM		 1356 sunsu_change_speed(&up->port, up->cflag, 0, quot);
1357
1da177e4
LT		 1358 sunsu_startup(&up->port);
1359 return 0;
1360}
1361
1362/*
1363 * ------------------------------------------------------------
1364 * Serial console driver
1365 * ------------------------------------------------------------
1366 */
1367
1368#ifdef CONFIG_SERIAL_SUNSU_CONSOLE
1369
1370#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1371
1372/*
1373 * Wait for transmitter & holding register to empty
1374 */
1375static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
1376{
1377 unsigned int status, tmout = 10000;
1378
1379 /* Wait up to 10ms for the character(s) to be sent. */
1380 do {
1381 status = serial_in(up, UART_LSR);
1382
1383 if (status & UART_LSR_BI)
1384 up->lsr_break_flag = UART_LSR_BI;
1385
1386 if (--tmout == 0)
1387 break;
1388 udelay(1);
1389 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1390
1391 /* Wait up to 1s for flow control if necessary */
1392 if (up->port.flags & ASYNC_CONS_FLOW) {
1393 tmout = 1000000;
1394 while (--tmout &&
1395 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1396 udelay(1);
1397 }
1398}
1399
1400/*
1401 * Print a string to the serial port trying not to disturb
1402 * any possible real use of the port...
1403 */
1404static void sunsu_console_write(struct console *co, const char *s,
1405 unsigned int count)
1406{
1407 struct uart_sunsu_port *up = &sunsu_ports[co->index];
1408 unsigned int ier;
1409 int i;
1410
1411 /*
1412 * First save the UER then disable the interrupts
1413 */
1414 ier = serial_in(up, UART_IER);
1415 serial_out(up, UART_IER, 0);
1416
1417 /*
1418 * Now, do each character
1419 */
1420 for (i = 0; i < count; i++, s++) {
1421 wait_for_xmitr(up);
1422
1423 /*
1424 * Send the character out.
1425 * If a LF, also do CR...
1426 */
1427 serial_out(up, UART_TX, *s);
1428 if (*s == 10) {
1429 wait_for_xmitr(up);
1430 serial_out(up, UART_TX, 13);
1431 }
1432 }
1433
1434 /*
1435 * Finally, wait for transmitter to become empty
1436 * and restore the IER
1437 */
1438 wait_for_xmitr(up);
1439 serial_out(up, UART_IER, ier);
1440}
1441
1442/*
1443 * Setup initial baud/bits/parity. We do two things here:
1444 * - construct a cflag setting for the first su_open()
1445 * - initialize the serial port
1446 * Return non-zero if we didn't find a serial port.
1447 */
1448static int __init sunsu_console_setup(struct console *co, char *options)
1449{
1450 struct uart_port *port;
1451 int baud = 9600;
1452 int bits = 8;
1453 int parity = 'n';
1454 int flow = 'n';
1455
1456 printk("Console: ttyS%d (SU)\n",
1457 (sunsu_reg.minor - 64) + co->index);
1458
1459 /*
1460 * Check whether an invalid uart number has been specified, and
1461 * if so, search for the first available port that does have
1462 * console support.
1463 */
1464 if (co->index >= UART_NR)
1465 co->index = 0;
1466 port = &sunsu_ports[co->index].port;
1467
1468 /*
1469 * Temporary fix.
1470 */
1471 spin_lock_init(&port->lock);
1472
1473 if (options)
1474 uart_parse_options(options, &baud, &parity, &bits, &flow);
1475
1476 return uart_set_options(port, co, baud, parity, bits, flow);
1477}
1478
1479static struct console sunsu_cons = {
1480 .name = "ttyS",
1481 .write = sunsu_console_write,
1482 .device = uart_console_device,
1483 .setup = sunsu_console_setup,
1484 .flags = CON_PRINTBUFFER,
1485 .index = -1,
1486 .data = &sunsu_reg,
1487};
1488#define SUNSU_CONSOLE (&sunsu_cons)
1489
1490/*
1491 * Register console.
1492 */
1493
1494static int __init sunsu_serial_console_init(void)
1495{
1496 int i;
1497
1498 if (con_is_present())
1499 return 0;
1500
1501 for (i = 0; i < UART_NR; i++) {
1502 int this_minor = sunsu_reg.minor + i;
1503
1504 if ((this_minor - 64) == (serial_console - 1))
1505 break;
1506 }
1507 if (i == UART_NR)
1508 return 0;
1509 if (sunsu_ports[i].port_node == 0)
1510 return 0;
1511
1512 sunsu_cons.index = i;
1513 register_console(&sunsu_cons);
1514 return 0;
1515}
1516#else
1517#define SUNSU_CONSOLE (NULL)
1518#define sunsu_serial_console_init() do { } while (0)
1519#endif
1520
1521static int __init sunsu_serial_init(void)
1522{
1523 int instance, ret, i;
1524
1525 /* How many instances do we need? */
1526 instance = 0;
1527 for (i = 0; i < UART_NR; i++) {
1528 struct uart_sunsu_port *up = &sunsu_ports[i];
1529
1530 if (up->su_type == SU_PORT_MS ||
1531 up->su_type == SU_PORT_KBD)
1532 continue;
1533
1534 up->port.flags |= ASYNC_BOOT_AUTOCONF;
1535 up->port.type = PORT_UNKNOWN;
1536 up->port.uartclk = (SU_BASE_BAUD * 16);
1537
1538 sunsu_autoconfig(up);
1539 if (up->port.type == PORT_UNKNOWN)
1540 continue;
1541
1542 up->port.line = instance++;
1543 up->port.ops = &sunsu_pops;
1544 }
1545
1546 sunsu_reg.minor = sunserial_current_minor;
1547 sunserial_current_minor += instance;
1548
1549 sunsu_reg.nr = instance;
1550 sunsu_reg.cons = SUNSU_CONSOLE;
1551
1552 ret = uart_register_driver(&sunsu_reg);
1553 if (ret < 0)
1554 return ret;
1555
1556 sunsu_serial_console_init();
1557 for (i = 0; i < UART_NR; i++) {
1558 struct uart_sunsu_port *up = &sunsu_ports[i];
1559
1560 /* Do not register Keyboard/Mouse lines with UART
1561 * layer.
1562 */
1563 if (up->su_type == SU_PORT_MS ||
1564 up->su_type == SU_PORT_KBD)
1565 continue;
1566
1567 if (up->port.type == PORT_UNKNOWN)
1568 continue;
1569
1570 uart_add_one_port(&sunsu_reg, &up->port);
1571 }
1572
1573 return 0;
1574}
1575
1576static int su_node_ok(int node, char *name, int namelen)
1577{
1578 if (strncmp(name, "su", namelen) == 0 ||
1579 strncmp(name, "su_pnp", namelen) == 0)
1580 return 1;
1581
1582 if (strncmp(name, "serial", namelen) == 0) {
1583 char compat[32];
1584 int clen;
1585
1586 /* Is it _really_ a 'su' device? */
1587 clen = prom_getproperty(node, "compatible", compat, sizeof(compat));
1588 if (clen > 0) {
1589 if (strncmp(compat, "sab82532", 8) == 0) {
1590 /* Nope, Siemens serial, not for us. */
1591 return 0;
1592 }
1593 }
1594 return 1;
1595 }
1596
1597 return 0;
1598}
1599
1600#define SU_PROPSIZE 128
1601
1602/*
1603 * Scan status structure.
1604 * "prop" is a local variable but it eats stack to keep it in each
1605 * stack frame of a recursive procedure.
1606 */
1607struct su_probe_scan {
1608 int msnode, kbnode; /* PROM nodes for mouse and keyboard */
1609 int msx, kbx; /* minors for mouse and keyboard */
1610 int devices; /* scan index */
1611 char prop[SU_PROPSIZE];
1612};
1613
1614/*
1615 * We have several platforms which present 'su' in different parts
1616 * of the device tree. 'su' may be found under obio, ebus, isa and pci.
1617 * We walk over the tree and find them wherever PROM hides them.
1618 */
1619static void __init su_probe_any(struct su_probe_scan *t, int sunode)
1620{
1621 struct uart_sunsu_port *up;
1622 int len;
1623
1624 if (t->devices >= UART_NR)
1625 return;
1626
1627 for (; sunode != 0; sunode = prom_getsibling(sunode)) {
1628 len = prom_getproperty(sunode, "name", t->prop, SU_PROPSIZE);
1629 if (len <= 1)
1630 continue; /* Broken PROM node */
1631
1632 if (su_node_ok(sunode, t->prop, len)) {
1633 up = &sunsu_ports[t->devices];
1634 if (t->kbnode != 0 && sunode == t->kbnode) {
1635 t->kbx = t->devices;
1636 up->su_type = SU_PORT_KBD;
1637 } else if (t->msnode != 0 && sunode == t->msnode) {
1638 t->msx = t->devices;
1639 up->su_type = SU_PORT_MS;
1640 } else {
1641#ifdef CONFIG_SPARC64
1642 /*
1643 * Do not attempt to use the truncated
1644 * keyboard/mouse ports as serial ports
1645 * on Ultras with PC keyboard attached.
1646 */
1647 if (prom_getbool(sunode, "mouse"))
1648 continue;
1649 if (prom_getbool(sunode, "keyboard"))
1650 continue;
1651#endif
1652 up->su_type = SU_PORT_PORT;
1653 }
1654 up->port_node = sunode;
1655 ++t->devices;
1656 } else {
1657 su_probe_any(t, prom_getchild(sunode));
1658 }
1659 }
1660}
1661
1662static int __init sunsu_probe(void)
1663{
1664 int node;
1665 int len;
1666 struct su_probe_scan scan;
1667
1668 /*
1669 * First, we scan the tree.
1670 */
1671 scan.devices = 0;
1672 scan.msx = -1;
1673 scan.kbx = -1;
1674 scan.kbnode = 0;
1675 scan.msnode = 0;
1676
1677 /*
1678 * Get the nodes for keyboard and mouse from 'aliases'...
1679 */
1680 node = prom_getchild(prom_root_node);
1681 node = prom_searchsiblings(node, "aliases");
1682 if (node != 0) {
1683 len = prom_getproperty(node, "keyboard", scan.prop, SU_PROPSIZE);
1684 if (len > 0) {
1685 scan.prop[len] = 0;
1686 scan.kbnode = prom_finddevice(scan.prop);
1687 }
1688
1689 len = prom_getproperty(node, "mouse", scan.prop, SU_PROPSIZE);
1690 if (len > 0) {
1691 scan.prop[len] = 0;
1692 scan.msnode = prom_finddevice(scan.prop);
1693 }
1694 }
1695
1696 su_probe_any(&scan, prom_getchild(prom_root_node));
1697
1698 /*
1699 * Second, we process the special case of keyboard and mouse.
1700 *
1701 * Currently if we got keyboard and mouse hooked to "su" ports
1702 * we do not use any possible remaining "su" as a serial port.
1703 * Thus, we ignore values of .msx and .kbx, then compact ports.
1704 */
1705 if (scan.msx != -1 && scan.kbx != -1) {
1706 sunsu_ports[0].su_type = SU_PORT_MS;
1707 sunsu_ports[0].port_node = scan.msnode;
1708 sunsu_kbd_ms_init(&sunsu_ports[0], 0);
1709
1710 sunsu_ports[1].su_type = SU_PORT_KBD;
1711 sunsu_ports[1].port_node = scan.kbnode;
1712 sunsu_kbd_ms_init(&sunsu_ports[1], 1);
1713
1714 return 0;
1715 }
1716
1717 if (scan.msx != -1 || scan.kbx != -1) {
1718 printk("sunsu_probe: cannot match keyboard and mouse, confused\n");
1719 return -ENODEV;
1720 }
1721
1722 if (scan.devices == 0)
1723 return -ENODEV;
1724
1725 /*
1726 * Console must be initiated after the generic initialization.
1727 */
1728 sunsu_serial_init();
1729
1730 return 0;
1731}
1732
1733static void __exit sunsu_exit(void)
1734{
1735 int i, saw_uart;
1736
1737 saw_uart = 0;
1738 for (i = 0; i < UART_NR; i++) {
1739 struct uart_sunsu_port *up = &sunsu_ports[i];
1740
1741 if (up->su_type == SU_PORT_MS ||
1742 up->su_type == SU_PORT_KBD) {
1743#ifdef CONFIG_SERIO
1744 if (up->serio) {
1745 serio_unregister_port(up->serio);
1746 up->serio = NULL;
1747 }
1748#endif
1749 } else if (up->port.type != PORT_UNKNOWN) {
1750 uart_remove_one_port(&sunsu_reg, &up->port);
1751 saw_uart++;
1752 }
1753 }
1754
1755 if (saw_uart)
1756 uart_unregister_driver(&sunsu_reg);
1757}
1758
1759module_init(sunsu_probe);
1760module_exit(sunsu_exit);
Linux 6.x block layer and io_uring tree(s)