Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * drivers/serial/sh-sci.c | |
3 | * | |
4 | * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO) | |
5 | * | |
7ff731ae | 6 | * Copyright (C) 2002 - 2008 Paul Mundt |
3ea6bc3d | 7 | * Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Jul 2007). |
1da177e4 LT |
8 | * |
9 | * based off of the old drivers/char/sh-sci.c by: | |
10 | * | |
11 | * Copyright (C) 1999, 2000 Niibe Yutaka | |
12 | * Copyright (C) 2000 Sugioka Toshinobu | |
13 | * Modified to support multiple serial ports. Stuart Menefy (May 2000). | |
14 | * Modified to support SecureEdge. David McCullough (2002) | |
15 | * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003). | |
d89ddd1c | 16 | * Removed SH7300 support (Jul 2007). |
1da177e4 LT |
17 | * |
18 | * This file is subject to the terms and conditions of the GNU General Public | |
19 | * License. See the file "COPYING" in the main directory of this archive | |
20 | * for more details. | |
21 | */ | |
0b3d4ef6 PM |
22 | #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) |
23 | #define SUPPORT_SYSRQ | |
24 | #endif | |
1da177e4 LT |
25 | |
26 | #undef DEBUG | |
27 | ||
1da177e4 LT |
28 | #include <linux/module.h> |
29 | #include <linux/errno.h> | |
1da177e4 LT |
30 | #include <linux/timer.h> |
31 | #include <linux/interrupt.h> | |
32 | #include <linux/tty.h> | |
33 | #include <linux/tty_flip.h> | |
34 | #include <linux/serial.h> | |
35 | #include <linux/major.h> | |
36 | #include <linux/string.h> | |
37 | #include <linux/sysrq.h> | |
1da177e4 LT |
38 | #include <linux/ioport.h> |
39 | #include <linux/mm.h> | |
1da177e4 LT |
40 | #include <linux/init.h> |
41 | #include <linux/delay.h> | |
42 | #include <linux/console.h> | |
e108b2ca | 43 | #include <linux/platform_device.h> |
96de1a8f | 44 | #include <linux/serial_sci.h> |
1da177e4 LT |
45 | #include <linux/notifier.h> |
46 | #include <linux/cpufreq.h> | |
85f094ec | 47 | #include <linux/clk.h> |
fa5da2f7 | 48 | #include <linux/ctype.h> |
7ff731ae | 49 | #include <linux/err.h> |
e552de24 | 50 | #include <linux/list.h> |
85f094ec PM |
51 | |
52 | #ifdef CONFIG_SUPERH | |
1da177e4 LT |
53 | #include <asm/sh_bios.h> |
54 | #endif | |
55 | ||
168f3623 YS |
56 | #ifdef CONFIG_H8300 |
57 | #include <asm/gpio.h> | |
58 | #endif | |
59 | ||
1da177e4 LT |
60 | #include "sh-sci.h" |
61 | ||
e108b2ca PM |
62 | struct sci_port { |
63 | struct uart_port port; | |
64 | ||
65 | /* Port type */ | |
66 | unsigned int type; | |
67 | ||
68 | /* Port IRQs: ERI, RXI, TXI, BRI (optional) */ | |
32351a28 | 69 | unsigned int irqs[SCIx_NR_IRQS]; |
e108b2ca | 70 | |
e108b2ca PM |
71 | /* Port enable callback */ |
72 | void (*enable)(struct uart_port *port); | |
73 | ||
74 | /* Port disable callback */ | |
75 | void (*disable)(struct uart_port *port); | |
76 | ||
77 | /* Break timer */ | |
78 | struct timer_list break_timer; | |
79 | int break_flag; | |
1534a3b3 | 80 | |
501b825d MD |
81 | /* Interface clock */ |
82 | struct clk *iclk; | |
83 | /* Data clock */ | |
84 | struct clk *dclk; | |
edad1f20 | 85 | |
e552de24 MD |
86 | struct list_head node; |
87 | }; | |
88 | ||
89 | struct sh_sci_priv { | |
90 | spinlock_t lock; | |
91 | struct list_head ports; | |
e552de24 | 92 | struct notifier_block clk_nb; |
e108b2ca PM |
93 | }; |
94 | ||
1da177e4 | 95 | /* Function prototypes */ |
b129a8cc | 96 | static void sci_stop_tx(struct uart_port *port); |
1da177e4 | 97 | |
e108b2ca | 98 | #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS |
b7a76e4b | 99 | |
e108b2ca PM |
100 | static struct sci_port sci_ports[SCI_NPORTS]; |
101 | static struct uart_driver sci_uart_driver; | |
1da177e4 | 102 | |
e7c98dc7 MT |
103 | static inline struct sci_port * |
104 | to_sci_port(struct uart_port *uart) | |
105 | { | |
106 | return container_of(uart, struct sci_port, port); | |
107 | } | |
108 | ||
07d2a1a1 | 109 | #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_SH_SCI_CONSOLE) |
1f6fd5c9 PM |
110 | |
111 | #ifdef CONFIG_CONSOLE_POLL | |
e108b2ca PM |
112 | static inline void handle_error(struct uart_port *port) |
113 | { | |
114 | /* Clear error flags */ | |
1da177e4 LT |
115 | sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port)); |
116 | } | |
117 | ||
07d2a1a1 | 118 | static int sci_poll_get_char(struct uart_port *port) |
1da177e4 | 119 | { |
1da177e4 LT |
120 | unsigned short status; |
121 | int c; | |
122 | ||
e108b2ca | 123 | do { |
1da177e4 LT |
124 | status = sci_in(port, SCxSR); |
125 | if (status & SCxSR_ERRORS(port)) { | |
126 | handle_error(port); | |
127 | continue; | |
128 | } | |
129 | } while (!(status & SCxSR_RDxF(port))); | |
07d2a1a1 | 130 | |
1da177e4 | 131 | c = sci_in(port, SCxRDR); |
07d2a1a1 | 132 | |
e7c98dc7 MT |
133 | /* Dummy read */ |
134 | sci_in(port, SCxSR); | |
1da177e4 | 135 | sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); |
1da177e4 LT |
136 | |
137 | return c; | |
138 | } | |
1f6fd5c9 | 139 | #endif |
1da177e4 | 140 | |
07d2a1a1 | 141 | static void sci_poll_put_char(struct uart_port *port, unsigned char c) |
1da177e4 | 142 | { |
1da177e4 LT |
143 | unsigned short status; |
144 | ||
1da177e4 LT |
145 | do { |
146 | status = sci_in(port, SCxSR); | |
147 | } while (!(status & SCxSR_TDxE(port))); | |
148 | ||
272966c0 | 149 | sci_out(port, SCxTDR, c); |
dd0a3e77 | 150 | sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port) & ~SCxSR_TEND(port)); |
1da177e4 | 151 | } |
07d2a1a1 | 152 | #endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */ |
1da177e4 | 153 | |
15c73aaa | 154 | #if defined(__H8300H__) || defined(__H8300S__) |
d5701647 | 155 | static void sci_init_pins(struct uart_port *port, unsigned int cflag) |
1da177e4 LT |
156 | { |
157 | int ch = (port->mapbase - SMR0) >> 3; | |
158 | ||
159 | /* set DDR regs */ | |
e108b2ca PM |
160 | H8300_GPIO_DDR(h8300_sci_pins[ch].port, |
161 | h8300_sci_pins[ch].rx, | |
162 | H8300_GPIO_INPUT); | |
163 | H8300_GPIO_DDR(h8300_sci_pins[ch].port, | |
164 | h8300_sci_pins[ch].tx, | |
165 | H8300_GPIO_OUTPUT); | |
166 | ||
1da177e4 LT |
167 | /* tx mark output*/ |
168 | H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx; | |
169 | } | |
d5701647 PM |
170 | #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) |
171 | static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) | |
e108b2ca | 172 | { |
d5701647 PM |
173 | if (port->mapbase == 0xA4400000) { |
174 | __raw_writew(__raw_readw(PACR) & 0xffc0, PACR); | |
175 | __raw_writew(__raw_readw(PBCR) & 0x0fff, PBCR); | |
176 | } else if (port->mapbase == 0xA4410000) | |
177 | __raw_writew(__raw_readw(PBCR) & 0xf003, PBCR); | |
9465a54f | 178 | } |
31a49c4b | 179 | #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7721) |
d5701647 | 180 | static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) |
3ea6bc3d | 181 | { |
3ea6bc3d MB |
182 | unsigned short data; |
183 | ||
184 | if (cflag & CRTSCTS) { | |
185 | /* enable RTS/CTS */ | |
186 | if (port->mapbase == 0xa4430000) { /* SCIF0 */ | |
187 | /* Clear PTCR bit 9-2; enable all scif pins but sck */ | |
d5701647 PM |
188 | data = __raw_readw(PORT_PTCR); |
189 | __raw_writew((data & 0xfc03), PORT_PTCR); | |
3ea6bc3d MB |
190 | } else if (port->mapbase == 0xa4438000) { /* SCIF1 */ |
191 | /* Clear PVCR bit 9-2 */ | |
d5701647 PM |
192 | data = __raw_readw(PORT_PVCR); |
193 | __raw_writew((data & 0xfc03), PORT_PVCR); | |
3ea6bc3d | 194 | } |
3ea6bc3d MB |
195 | } else { |
196 | if (port->mapbase == 0xa4430000) { /* SCIF0 */ | |
197 | /* Clear PTCR bit 5-2; enable only tx and rx */ | |
d5701647 PM |
198 | data = __raw_readw(PORT_PTCR); |
199 | __raw_writew((data & 0xffc3), PORT_PTCR); | |
3ea6bc3d MB |
200 | } else if (port->mapbase == 0xa4438000) { /* SCIF1 */ |
201 | /* Clear PVCR bit 5-2 */ | |
d5701647 PM |
202 | data = __raw_readw(PORT_PVCR); |
203 | __raw_writew((data & 0xffc3), PORT_PVCR); | |
3ea6bc3d MB |
204 | } |
205 | } | |
3ea6bc3d | 206 | } |
b7a76e4b | 207 | #elif defined(CONFIG_CPU_SH3) |
e108b2ca | 208 | /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */ |
d5701647 | 209 | static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) |
1da177e4 | 210 | { |
b7a76e4b PM |
211 | unsigned short data; |
212 | ||
213 | /* We need to set SCPCR to enable RTS/CTS */ | |
d5701647 | 214 | data = __raw_readw(SCPCR); |
b7a76e4b | 215 | /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/ |
d5701647 | 216 | __raw_writew(data & 0x0fcf, SCPCR); |
1da177e4 | 217 | |
d5701647 | 218 | if (!(cflag & CRTSCTS)) { |
1da177e4 | 219 | /* We need to set SCPCR to enable RTS/CTS */ |
d5701647 | 220 | data = __raw_readw(SCPCR); |
1da177e4 LT |
221 | /* Clear out SCP7MD1,0, SCP4MD1,0, |
222 | Set SCP6MD1,0 = {01} (output) */ | |
d5701647 | 223 | __raw_writew((data & 0x0fcf) | 0x1000, SCPCR); |
1da177e4 LT |
224 | |
225 | data = ctrl_inb(SCPDR); | |
226 | /* Set /RTS2 (bit6) = 0 */ | |
b7a76e4b | 227 | ctrl_outb(data & 0xbf, SCPDR); |
1da177e4 | 228 | } |
1da177e4 | 229 | } |
41504c39 | 230 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) |
d5701647 | 231 | static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) |
41504c39 | 232 | { |
346b7463 | 233 | unsigned short data; |
41504c39 | 234 | |
346b7463 | 235 | if (port->mapbase == 0xffe00000) { |
d5701647 | 236 | data = __raw_readw(PSCR); |
346b7463 | 237 | data &= ~0x03cf; |
d5701647 | 238 | if (!(cflag & CRTSCTS)) |
346b7463 | 239 | data |= 0x0340; |
41504c39 | 240 | |
d5701647 | 241 | __raw_writew(data, PSCR); |
41504c39 | 242 | } |
178dd0cd | 243 | } |
c01f0f1a YS |
244 | #elif defined(CONFIG_CPU_SUBTYPE_SH7757) || \ |
245 | defined(CONFIG_CPU_SUBTYPE_SH7763) || \ | |
7d740a06 | 246 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ |
2b1bd1ac | 247 | defined(CONFIG_CPU_SUBTYPE_SH7785) || \ |
55ba99eb | 248 | defined(CONFIG_CPU_SUBTYPE_SH7786) || \ |
2b1bd1ac | 249 | defined(CONFIG_CPU_SUBTYPE_SHX3) |
d5701647 PM |
250 | static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) |
251 | { | |
252 | if (!(cflag & CRTSCTS)) | |
253 | __raw_writew(0x0080, SCSPTR0); /* Set RTS = 1 */ | |
254 | } | |
b0c50ad7 | 255 | #elif defined(CONFIG_CPU_SH4) && !defined(CONFIG_CPU_SH4A) |
d5701647 PM |
256 | static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) |
257 | { | |
258 | if (!(cflag & CRTSCTS)) | |
259 | __raw_writew(0x0080, SCSPTR2); /* Set RTS = 1 */ | |
260 | } | |
b7a76e4b | 261 | #else |
d5701647 PM |
262 | static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) |
263 | { | |
264 | /* Nothing to do */ | |
1da177e4 | 265 | } |
e108b2ca PM |
266 | #endif |
267 | ||
32351a28 PM |
268 | #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \ |
269 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ | |
55ba99eb KM |
270 | defined(CONFIG_CPU_SUBTYPE_SH7785) || \ |
271 | defined(CONFIG_CPU_SUBTYPE_SH7786) | |
e108b2ca PM |
272 | static inline int scif_txroom(struct uart_port *port) |
273 | { | |
cae167d3 | 274 | return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff); |
e108b2ca PM |
275 | } |
276 | ||
277 | static inline int scif_rxroom(struct uart_port *port) | |
278 | { | |
cae167d3 | 279 | return sci_in(port, SCRFDR) & 0xff; |
e108b2ca | 280 | } |
c63847a3 NI |
281 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) |
282 | static inline int scif_txroom(struct uart_port *port) | |
283 | { | |
e7c98dc7 MT |
284 | if ((port->mapbase == 0xffe00000) || |
285 | (port->mapbase == 0xffe08000)) { | |
286 | /* SCIF0/1*/ | |
c63847a3 | 287 | return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff); |
e7c98dc7 MT |
288 | } else { |
289 | /* SCIF2 */ | |
c63847a3 | 290 | return SCIF2_TXROOM_MAX - (sci_in(port, SCFDR) >> 8); |
e7c98dc7 | 291 | } |
c63847a3 NI |
292 | } |
293 | ||
294 | static inline int scif_rxroom(struct uart_port *port) | |
295 | { | |
e7c98dc7 MT |
296 | if ((port->mapbase == 0xffe00000) || |
297 | (port->mapbase == 0xffe08000)) { | |
298 | /* SCIF0/1*/ | |
c63847a3 | 299 | return sci_in(port, SCRFDR) & 0xff; |
e7c98dc7 MT |
300 | } else { |
301 | /* SCIF2 */ | |
c63847a3 | 302 | return sci_in(port, SCFDR) & SCIF2_RFDC_MASK; |
e7c98dc7 | 303 | } |
c63847a3 | 304 | } |
e108b2ca PM |
305 | #else |
306 | static inline int scif_txroom(struct uart_port *port) | |
307 | { | |
308 | return SCIF_TXROOM_MAX - (sci_in(port, SCFDR) >> 8); | |
309 | } | |
1da177e4 | 310 | |
e108b2ca PM |
311 | static inline int scif_rxroom(struct uart_port *port) |
312 | { | |
313 | return sci_in(port, SCFDR) & SCIF_RFDC_MASK; | |
314 | } | |
1da177e4 | 315 | #endif |
1da177e4 | 316 | |
e108b2ca PM |
317 | static inline int sci_txroom(struct uart_port *port) |
318 | { | |
e7c98dc7 | 319 | return (sci_in(port, SCxSR) & SCI_TDRE) != 0; |
e108b2ca PM |
320 | } |
321 | ||
322 | static inline int sci_rxroom(struct uart_port *port) | |
323 | { | |
e7c98dc7 | 324 | return (sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0; |
e108b2ca PM |
325 | } |
326 | ||
1da177e4 LT |
327 | /* ********************************************************************** * |
328 | * the interrupt related routines * | |
329 | * ********************************************************************** */ | |
330 | ||
331 | static void sci_transmit_chars(struct uart_port *port) | |
332 | { | |
ebd2c8f6 | 333 | struct circ_buf *xmit = &port->state->xmit; |
1da177e4 | 334 | unsigned int stopped = uart_tx_stopped(port); |
1da177e4 LT |
335 | unsigned short status; |
336 | unsigned short ctrl; | |
e108b2ca | 337 | int count; |
1da177e4 LT |
338 | |
339 | status = sci_in(port, SCxSR); | |
340 | if (!(status & SCxSR_TDxE(port))) { | |
1da177e4 | 341 | ctrl = sci_in(port, SCSCR); |
e7c98dc7 | 342 | if (uart_circ_empty(xmit)) |
1da177e4 | 343 | ctrl &= ~SCI_CTRL_FLAGS_TIE; |
e7c98dc7 | 344 | else |
1da177e4 | 345 | ctrl |= SCI_CTRL_FLAGS_TIE; |
1da177e4 | 346 | sci_out(port, SCSCR, ctrl); |
1da177e4 LT |
347 | return; |
348 | } | |
349 | ||
1a22f08d | 350 | if (port->type == PORT_SCI) |
e108b2ca | 351 | count = sci_txroom(port); |
1a22f08d YS |
352 | else |
353 | count = scif_txroom(port); | |
1da177e4 LT |
354 | |
355 | do { | |
356 | unsigned char c; | |
357 | ||
358 | if (port->x_char) { | |
359 | c = port->x_char; | |
360 | port->x_char = 0; | |
361 | } else if (!uart_circ_empty(xmit) && !stopped) { | |
362 | c = xmit->buf[xmit->tail]; | |
363 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
364 | } else { | |
365 | break; | |
366 | } | |
367 | ||
368 | sci_out(port, SCxTDR, c); | |
369 | ||
370 | port->icount.tx++; | |
371 | } while (--count > 0); | |
372 | ||
373 | sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port)); | |
374 | ||
375 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
376 | uart_write_wakeup(port); | |
377 | if (uart_circ_empty(xmit)) { | |
b129a8cc | 378 | sci_stop_tx(port); |
1da177e4 | 379 | } else { |
1da177e4 LT |
380 | ctrl = sci_in(port, SCSCR); |
381 | ||
1a22f08d | 382 | if (port->type != PORT_SCI) { |
1da177e4 LT |
383 | sci_in(port, SCxSR); /* Dummy read */ |
384 | sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port)); | |
385 | } | |
1da177e4 LT |
386 | |
387 | ctrl |= SCI_CTRL_FLAGS_TIE; | |
388 | sci_out(port, SCSCR, ctrl); | |
1da177e4 LT |
389 | } |
390 | } | |
391 | ||
392 | /* On SH3, SCIF may read end-of-break as a space->mark char */ | |
e7c98dc7 | 393 | #define STEPFN(c) ({int __c = (c); (((__c-1)|(__c)) == -1); }) |
1da177e4 | 394 | |
7d12e780 | 395 | static inline void sci_receive_chars(struct uart_port *port) |
1da177e4 | 396 | { |
e7c98dc7 | 397 | struct sci_port *sci_port = to_sci_port(port); |
ebd2c8f6 | 398 | struct tty_struct *tty = port->state->port.tty; |
1da177e4 LT |
399 | int i, count, copied = 0; |
400 | unsigned short status; | |
33f0f88f | 401 | unsigned char flag; |
1da177e4 LT |
402 | |
403 | status = sci_in(port, SCxSR); | |
404 | if (!(status & SCxSR_RDxF(port))) | |
405 | return; | |
406 | ||
407 | while (1) { | |
1a22f08d | 408 | if (port->type == PORT_SCI) |
e108b2ca | 409 | count = sci_rxroom(port); |
1a22f08d YS |
410 | else |
411 | count = scif_rxroom(port); | |
1da177e4 LT |
412 | |
413 | /* Don't copy more bytes than there is room for in the buffer */ | |
33f0f88f | 414 | count = tty_buffer_request_room(tty, count); |
1da177e4 LT |
415 | |
416 | /* If for any reason we can't copy more data, we're done! */ | |
417 | if (count == 0) | |
418 | break; | |
419 | ||
420 | if (port->type == PORT_SCI) { | |
421 | char c = sci_in(port, SCxRDR); | |
e7c98dc7 MT |
422 | if (uart_handle_sysrq_char(port, c) || |
423 | sci_port->break_flag) | |
1da177e4 | 424 | count = 0; |
e7c98dc7 | 425 | else |
e108b2ca | 426 | tty_insert_flip_char(tty, c, TTY_NORMAL); |
1da177e4 | 427 | } else { |
e7c98dc7 | 428 | for (i = 0; i < count; i++) { |
1da177e4 LT |
429 | char c = sci_in(port, SCxRDR); |
430 | status = sci_in(port, SCxSR); | |
431 | #if defined(CONFIG_CPU_SH3) | |
432 | /* Skip "chars" during break */ | |
e108b2ca | 433 | if (sci_port->break_flag) { |
1da177e4 LT |
434 | if ((c == 0) && |
435 | (status & SCxSR_FER(port))) { | |
436 | count--; i--; | |
437 | continue; | |
438 | } | |
e108b2ca | 439 | |
1da177e4 | 440 | /* Nonzero => end-of-break */ |
762c69e3 | 441 | dev_dbg(port->dev, "debounce<%02x>\n", c); |
e108b2ca PM |
442 | sci_port->break_flag = 0; |
443 | ||
1da177e4 LT |
444 | if (STEPFN(c)) { |
445 | count--; i--; | |
446 | continue; | |
447 | } | |
448 | } | |
449 | #endif /* CONFIG_CPU_SH3 */ | |
7d12e780 | 450 | if (uart_handle_sysrq_char(port, c)) { |
1da177e4 LT |
451 | count--; i--; |
452 | continue; | |
453 | } | |
454 | ||
455 | /* Store data and status */ | |
1da177e4 | 456 | if (status&SCxSR_FER(port)) { |
33f0f88f | 457 | flag = TTY_FRAME; |
762c69e3 | 458 | dev_notice(port->dev, "frame error\n"); |
1da177e4 | 459 | } else if (status&SCxSR_PER(port)) { |
33f0f88f | 460 | flag = TTY_PARITY; |
762c69e3 | 461 | dev_notice(port->dev, "parity error\n"); |
33f0f88f AC |
462 | } else |
463 | flag = TTY_NORMAL; | |
762c69e3 | 464 | |
33f0f88f | 465 | tty_insert_flip_char(tty, c, flag); |
1da177e4 LT |
466 | } |
467 | } | |
468 | ||
469 | sci_in(port, SCxSR); /* dummy read */ | |
470 | sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); | |
471 | ||
1da177e4 LT |
472 | copied += count; |
473 | port->icount.rx += count; | |
474 | } | |
475 | ||
476 | if (copied) { | |
477 | /* Tell the rest of the system the news. New characters! */ | |
478 | tty_flip_buffer_push(tty); | |
479 | } else { | |
480 | sci_in(port, SCxSR); /* dummy read */ | |
481 | sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); | |
482 | } | |
483 | } | |
484 | ||
485 | #define SCI_BREAK_JIFFIES (HZ/20) | |
486 | /* The sci generates interrupts during the break, | |
487 | * 1 per millisecond or so during the break period, for 9600 baud. | |
488 | * So dont bother disabling interrupts. | |
489 | * But dont want more than 1 break event. | |
490 | * Use a kernel timer to periodically poll the rx line until | |
491 | * the break is finished. | |
492 | */ | |
493 | static void sci_schedule_break_timer(struct sci_port *port) | |
494 | { | |
495 | port->break_timer.expires = jiffies + SCI_BREAK_JIFFIES; | |
496 | add_timer(&port->break_timer); | |
497 | } | |
498 | /* Ensure that two consecutive samples find the break over. */ | |
499 | static void sci_break_timer(unsigned long data) | |
500 | { | |
e108b2ca PM |
501 | struct sci_port *port = (struct sci_port *)data; |
502 | ||
503 | if (sci_rxd_in(&port->port) == 0) { | |
1da177e4 | 504 | port->break_flag = 1; |
e108b2ca PM |
505 | sci_schedule_break_timer(port); |
506 | } else if (port->break_flag == 1) { | |
1da177e4 LT |
507 | /* break is over. */ |
508 | port->break_flag = 2; | |
e108b2ca PM |
509 | sci_schedule_break_timer(port); |
510 | } else | |
511 | port->break_flag = 0; | |
1da177e4 LT |
512 | } |
513 | ||
514 | static inline int sci_handle_errors(struct uart_port *port) | |
515 | { | |
516 | int copied = 0; | |
517 | unsigned short status = sci_in(port, SCxSR); | |
ebd2c8f6 | 518 | struct tty_struct *tty = port->state->port.tty; |
1da177e4 | 519 | |
e108b2ca | 520 | if (status & SCxSR_ORER(port)) { |
1da177e4 | 521 | /* overrun error */ |
e108b2ca | 522 | if (tty_insert_flip_char(tty, 0, TTY_OVERRUN)) |
33f0f88f | 523 | copied++; |
762c69e3 PM |
524 | |
525 | dev_notice(port->dev, "overrun error"); | |
1da177e4 LT |
526 | } |
527 | ||
e108b2ca | 528 | if (status & SCxSR_FER(port)) { |
1da177e4 LT |
529 | if (sci_rxd_in(port) == 0) { |
530 | /* Notify of BREAK */ | |
e7c98dc7 | 531 | struct sci_port *sci_port = to_sci_port(port); |
e108b2ca PM |
532 | |
533 | if (!sci_port->break_flag) { | |
534 | sci_port->break_flag = 1; | |
535 | sci_schedule_break_timer(sci_port); | |
536 | ||
1da177e4 | 537 | /* Do sysrq handling. */ |
e108b2ca | 538 | if (uart_handle_break(port)) |
1da177e4 | 539 | return 0; |
762c69e3 PM |
540 | |
541 | dev_dbg(port->dev, "BREAK detected\n"); | |
542 | ||
e108b2ca | 543 | if (tty_insert_flip_char(tty, 0, TTY_BREAK)) |
e7c98dc7 MT |
544 | copied++; |
545 | } | |
546 | ||
e108b2ca | 547 | } else { |
1da177e4 | 548 | /* frame error */ |
e108b2ca | 549 | if (tty_insert_flip_char(tty, 0, TTY_FRAME)) |
33f0f88f | 550 | copied++; |
762c69e3 PM |
551 | |
552 | dev_notice(port->dev, "frame error\n"); | |
1da177e4 LT |
553 | } |
554 | } | |
555 | ||
e108b2ca | 556 | if (status & SCxSR_PER(port)) { |
1da177e4 | 557 | /* parity error */ |
e108b2ca PM |
558 | if (tty_insert_flip_char(tty, 0, TTY_PARITY)) |
559 | copied++; | |
762c69e3 PM |
560 | |
561 | dev_notice(port->dev, "parity error"); | |
1da177e4 LT |
562 | } |
563 | ||
33f0f88f | 564 | if (copied) |
1da177e4 | 565 | tty_flip_buffer_push(tty); |
1da177e4 LT |
566 | |
567 | return copied; | |
568 | } | |
569 | ||
d830fa45 PM |
570 | static inline int sci_handle_fifo_overrun(struct uart_port *port) |
571 | { | |
ebd2c8f6 | 572 | struct tty_struct *tty = port->state->port.tty; |
d830fa45 PM |
573 | int copied = 0; |
574 | ||
575 | if (port->type != PORT_SCIF) | |
576 | return 0; | |
577 | ||
578 | if ((sci_in(port, SCLSR) & SCIF_ORER) != 0) { | |
579 | sci_out(port, SCLSR, 0); | |
580 | ||
581 | tty_insert_flip_char(tty, 0, TTY_OVERRUN); | |
582 | tty_flip_buffer_push(tty); | |
583 | ||
584 | dev_notice(port->dev, "overrun error\n"); | |
585 | copied++; | |
586 | } | |
587 | ||
588 | return copied; | |
589 | } | |
590 | ||
1da177e4 LT |
591 | static inline int sci_handle_breaks(struct uart_port *port) |
592 | { | |
593 | int copied = 0; | |
594 | unsigned short status = sci_in(port, SCxSR); | |
ebd2c8f6 | 595 | struct tty_struct *tty = port->state->port.tty; |
a5660ada | 596 | struct sci_port *s = to_sci_port(port); |
1da177e4 | 597 | |
0b3d4ef6 PM |
598 | if (uart_handle_break(port)) |
599 | return 0; | |
600 | ||
b7a76e4b | 601 | if (!s->break_flag && status & SCxSR_BRK(port)) { |
1da177e4 LT |
602 | #if defined(CONFIG_CPU_SH3) |
603 | /* Debounce break */ | |
604 | s->break_flag = 1; | |
605 | #endif | |
606 | /* Notify of BREAK */ | |
e108b2ca | 607 | if (tty_insert_flip_char(tty, 0, TTY_BREAK)) |
33f0f88f | 608 | copied++; |
762c69e3 PM |
609 | |
610 | dev_dbg(port->dev, "BREAK detected\n"); | |
1da177e4 LT |
611 | } |
612 | ||
33f0f88f | 613 | if (copied) |
1da177e4 | 614 | tty_flip_buffer_push(tty); |
e108b2ca | 615 | |
d830fa45 PM |
616 | copied += sci_handle_fifo_overrun(port); |
617 | ||
1da177e4 LT |
618 | return copied; |
619 | } | |
620 | ||
7d12e780 | 621 | static irqreturn_t sci_rx_interrupt(int irq, void *port) |
1da177e4 | 622 | { |
1da177e4 LT |
623 | /* I think sci_receive_chars has to be called irrespective |
624 | * of whether the I_IXOFF is set, otherwise, how is the interrupt | |
625 | * to be disabled? | |
626 | */ | |
7d12e780 | 627 | sci_receive_chars(port); |
1da177e4 LT |
628 | |
629 | return IRQ_HANDLED; | |
630 | } | |
631 | ||
7d12e780 | 632 | static irqreturn_t sci_tx_interrupt(int irq, void *ptr) |
1da177e4 LT |
633 | { |
634 | struct uart_port *port = ptr; | |
fd78a76a | 635 | unsigned long flags; |
1da177e4 | 636 | |
fd78a76a | 637 | spin_lock_irqsave(&port->lock, flags); |
1da177e4 | 638 | sci_transmit_chars(port); |
fd78a76a | 639 | spin_unlock_irqrestore(&port->lock, flags); |
1da177e4 LT |
640 | |
641 | return IRQ_HANDLED; | |
642 | } | |
643 | ||
7d12e780 | 644 | static irqreturn_t sci_er_interrupt(int irq, void *ptr) |
1da177e4 LT |
645 | { |
646 | struct uart_port *port = ptr; | |
647 | ||
648 | /* Handle errors */ | |
649 | if (port->type == PORT_SCI) { | |
650 | if (sci_handle_errors(port)) { | |
651 | /* discard character in rx buffer */ | |
652 | sci_in(port, SCxSR); | |
653 | sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); | |
654 | } | |
655 | } else { | |
d830fa45 | 656 | sci_handle_fifo_overrun(port); |
7d12e780 | 657 | sci_rx_interrupt(irq, ptr); |
1da177e4 LT |
658 | } |
659 | ||
660 | sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port)); | |
661 | ||
662 | /* Kick the transmission */ | |
7d12e780 | 663 | sci_tx_interrupt(irq, ptr); |
1da177e4 LT |
664 | |
665 | return IRQ_HANDLED; | |
666 | } | |
667 | ||
7d12e780 | 668 | static irqreturn_t sci_br_interrupt(int irq, void *ptr) |
1da177e4 LT |
669 | { |
670 | struct uart_port *port = ptr; | |
671 | ||
672 | /* Handle BREAKs */ | |
673 | sci_handle_breaks(port); | |
674 | sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port)); | |
675 | ||
676 | return IRQ_HANDLED; | |
677 | } | |
678 | ||
7d12e780 | 679 | static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr) |
1da177e4 | 680 | { |
44e18e9e | 681 | unsigned short ssr_status, scr_status, err_enabled; |
a8884e34 MT |
682 | struct uart_port *port = ptr; |
683 | irqreturn_t ret = IRQ_NONE; | |
1da177e4 | 684 | |
e7c98dc7 MT |
685 | ssr_status = sci_in(port, SCxSR); |
686 | scr_status = sci_in(port, SCSCR); | |
44e18e9e | 687 | err_enabled = scr_status & (SCI_CTRL_FLAGS_REIE | SCI_CTRL_FLAGS_RIE); |
1da177e4 LT |
688 | |
689 | /* Tx Interrupt */ | |
dd4da3a5 | 690 | if ((ssr_status & SCxSR_TDxE(port)) && (scr_status & SCI_CTRL_FLAGS_TIE)) |
a8884e34 | 691 | ret = sci_tx_interrupt(irq, ptr); |
1da177e4 | 692 | /* Rx Interrupt */ |
dd4da3a5 | 693 | if ((ssr_status & SCxSR_RDxF(port)) && (scr_status & SCI_CTRL_FLAGS_RIE)) |
a8884e34 | 694 | ret = sci_rx_interrupt(irq, ptr); |
1da177e4 | 695 | /* Error Interrupt */ |
dd4da3a5 | 696 | if ((ssr_status & SCxSR_ERRORS(port)) && err_enabled) |
a8884e34 | 697 | ret = sci_er_interrupt(irq, ptr); |
1da177e4 | 698 | /* Break Interrupt */ |
dd4da3a5 | 699 | if ((ssr_status & SCxSR_BRK(port)) && err_enabled) |
a8884e34 | 700 | ret = sci_br_interrupt(irq, ptr); |
1da177e4 | 701 | |
a8884e34 | 702 | return ret; |
1da177e4 LT |
703 | } |
704 | ||
1da177e4 LT |
705 | /* |
706 | * Here we define a transistion notifier so that we can update all of our | |
707 | * ports' baud rate when the peripheral clock changes. | |
708 | */ | |
e108b2ca PM |
709 | static int sci_notifier(struct notifier_block *self, |
710 | unsigned long phase, void *p) | |
1da177e4 | 711 | { |
e552de24 MD |
712 | struct sh_sci_priv *priv = container_of(self, |
713 | struct sh_sci_priv, clk_nb); | |
714 | struct sci_port *sci_port; | |
715 | unsigned long flags; | |
1da177e4 LT |
716 | |
717 | if ((phase == CPUFREQ_POSTCHANGE) || | |
e552de24 MD |
718 | (phase == CPUFREQ_RESUMECHANGE)) { |
719 | spin_lock_irqsave(&priv->lock, flags); | |
720 | list_for_each_entry(sci_port, &priv->ports, node) | |
501b825d | 721 | sci_port->port.uartclk = clk_get_rate(sci_port->dclk); |
e552de24 MD |
722 | spin_unlock_irqrestore(&priv->lock, flags); |
723 | } | |
1da177e4 | 724 | |
1da177e4 LT |
725 | return NOTIFY_OK; |
726 | } | |
501b825d MD |
727 | |
728 | static void sci_clk_enable(struct uart_port *port) | |
729 | { | |
730 | struct sci_port *sci_port = to_sci_port(port); | |
731 | ||
732 | clk_enable(sci_port->dclk); | |
733 | sci_port->port.uartclk = clk_get_rate(sci_port->dclk); | |
734 | ||
735 | if (sci_port->iclk) | |
736 | clk_enable(sci_port->iclk); | |
737 | } | |
738 | ||
739 | static void sci_clk_disable(struct uart_port *port) | |
740 | { | |
741 | struct sci_port *sci_port = to_sci_port(port); | |
742 | ||
743 | if (sci_port->iclk) | |
744 | clk_disable(sci_port->iclk); | |
745 | ||
746 | clk_disable(sci_port->dclk); | |
747 | } | |
1da177e4 LT |
748 | |
749 | static int sci_request_irq(struct sci_port *port) | |
750 | { | |
751 | int i; | |
7d12e780 | 752 | irqreturn_t (*handlers[4])(int irq, void *ptr) = { |
1da177e4 LT |
753 | sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt, |
754 | sci_br_interrupt, | |
755 | }; | |
756 | const char *desc[] = { "SCI Receive Error", "SCI Receive Data Full", | |
757 | "SCI Transmit Data Empty", "SCI Break" }; | |
758 | ||
759 | if (port->irqs[0] == port->irqs[1]) { | |
762c69e3 | 760 | if (unlikely(!port->irqs[0])) |
1da177e4 | 761 | return -ENODEV; |
e108b2ca PM |
762 | |
763 | if (request_irq(port->irqs[0], sci_mpxed_interrupt, | |
35f3c518 | 764 | IRQF_DISABLED, "sci", port)) { |
762c69e3 | 765 | dev_err(port->port.dev, "Can't allocate IRQ\n"); |
1da177e4 LT |
766 | return -ENODEV; |
767 | } | |
768 | } else { | |
769 | for (i = 0; i < ARRAY_SIZE(handlers); i++) { | |
762c69e3 | 770 | if (unlikely(!port->irqs[i])) |
1da177e4 | 771 | continue; |
762c69e3 | 772 | |
e108b2ca | 773 | if (request_irq(port->irqs[i], handlers[i], |
35f3c518 | 774 | IRQF_DISABLED, desc[i], port)) { |
762c69e3 | 775 | dev_err(port->port.dev, "Can't allocate IRQ\n"); |
1da177e4 LT |
776 | return -ENODEV; |
777 | } | |
778 | } | |
779 | } | |
780 | ||
781 | return 0; | |
782 | } | |
783 | ||
784 | static void sci_free_irq(struct sci_port *port) | |
785 | { | |
786 | int i; | |
787 | ||
762c69e3 PM |
788 | if (port->irqs[0] == port->irqs[1]) |
789 | free_irq(port->irqs[0], port); | |
790 | else { | |
1da177e4 LT |
791 | for (i = 0; i < ARRAY_SIZE(port->irqs); i++) { |
792 | if (!port->irqs[i]) | |
793 | continue; | |
794 | ||
795 | free_irq(port->irqs[i], port); | |
796 | } | |
797 | } | |
798 | } | |
799 | ||
800 | static unsigned int sci_tx_empty(struct uart_port *port) | |
801 | { | |
b1516803 GL |
802 | unsigned short status = sci_in(port, SCxSR); |
803 | return status & SCxSR_TEND(port) ? TIOCSER_TEMT : 0; | |
1da177e4 LT |
804 | } |
805 | ||
806 | static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl) | |
807 | { | |
808 | /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */ | |
809 | /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */ | |
810 | /* If you have signals for DTR and DCD, please implement here. */ | |
811 | } | |
812 | ||
813 | static unsigned int sci_get_mctrl(struct uart_port *port) | |
814 | { | |
815 | /* This routine is used for geting signals of: DTR, DCD, DSR, RI, | |
816 | and CTS/RTS */ | |
817 | ||
818 | return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR; | |
819 | } | |
820 | ||
b129a8cc | 821 | static void sci_start_tx(struct uart_port *port) |
1da177e4 | 822 | { |
e108b2ca | 823 | unsigned short ctrl; |
1da177e4 | 824 | |
e108b2ca PM |
825 | /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */ |
826 | ctrl = sci_in(port, SCSCR); | |
827 | ctrl |= SCI_CTRL_FLAGS_TIE; | |
828 | sci_out(port, SCSCR, ctrl); | |
1da177e4 LT |
829 | } |
830 | ||
b129a8cc | 831 | static void sci_stop_tx(struct uart_port *port) |
1da177e4 | 832 | { |
1da177e4 LT |
833 | unsigned short ctrl; |
834 | ||
835 | /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */ | |
1da177e4 LT |
836 | ctrl = sci_in(port, SCSCR); |
837 | ctrl &= ~SCI_CTRL_FLAGS_TIE; | |
838 | sci_out(port, SCSCR, ctrl); | |
1da177e4 LT |
839 | } |
840 | ||
841 | static void sci_start_rx(struct uart_port *port, unsigned int tty_start) | |
842 | { | |
1da177e4 LT |
843 | unsigned short ctrl; |
844 | ||
845 | /* Set RIE (Receive Interrupt Enable) bit in SCSCR */ | |
1da177e4 LT |
846 | ctrl = sci_in(port, SCSCR); |
847 | ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE; | |
848 | sci_out(port, SCSCR, ctrl); | |
1da177e4 LT |
849 | } |
850 | ||
851 | static void sci_stop_rx(struct uart_port *port) | |
852 | { | |
1da177e4 LT |
853 | unsigned short ctrl; |
854 | ||
855 | /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */ | |
1da177e4 LT |
856 | ctrl = sci_in(port, SCSCR); |
857 | ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE); | |
858 | sci_out(port, SCSCR, ctrl); | |
1da177e4 LT |
859 | } |
860 | ||
861 | static void sci_enable_ms(struct uart_port *port) | |
862 | { | |
863 | /* Nothing here yet .. */ | |
864 | } | |
865 | ||
866 | static void sci_break_ctl(struct uart_port *port, int break_state) | |
867 | { | |
868 | /* Nothing here yet .. */ | |
869 | } | |
870 | ||
871 | static int sci_startup(struct uart_port *port) | |
872 | { | |
a5660ada | 873 | struct sci_port *s = to_sci_port(port); |
1da177e4 | 874 | |
e108b2ca PM |
875 | if (s->enable) |
876 | s->enable(port); | |
1da177e4 LT |
877 | |
878 | sci_request_irq(s); | |
d656901b | 879 | sci_start_tx(port); |
1da177e4 LT |
880 | sci_start_rx(port, 1); |
881 | ||
882 | return 0; | |
883 | } | |
884 | ||
885 | static void sci_shutdown(struct uart_port *port) | |
886 | { | |
a5660ada | 887 | struct sci_port *s = to_sci_port(port); |
1da177e4 LT |
888 | |
889 | sci_stop_rx(port); | |
b129a8cc | 890 | sci_stop_tx(port); |
1da177e4 LT |
891 | sci_free_irq(s); |
892 | ||
e108b2ca PM |
893 | if (s->disable) |
894 | s->disable(port); | |
1da177e4 LT |
895 | } |
896 | ||
606d099c AC |
897 | static void sci_set_termios(struct uart_port *port, struct ktermios *termios, |
898 | struct ktermios *old) | |
1da177e4 | 899 | { |
1da177e4 | 900 | unsigned int status, baud, smr_val; |
a2159b52 | 901 | int t = -1; |
1da177e4 LT |
902 | |
903 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); | |
a2159b52 PM |
904 | if (likely(baud)) |
905 | t = SCBRR_VALUE(baud, port->uartclk); | |
e108b2ca | 906 | |
1da177e4 LT |
907 | do { |
908 | status = sci_in(port, SCxSR); | |
909 | } while (!(status & SCxSR_TEND(port))); | |
910 | ||
911 | sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */ | |
912 | ||
1a22f08d | 913 | if (port->type != PORT_SCI) |
1da177e4 | 914 | sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST); |
1da177e4 LT |
915 | |
916 | smr_val = sci_in(port, SCSMR) & 3; | |
917 | if ((termios->c_cflag & CSIZE) == CS7) | |
918 | smr_val |= 0x40; | |
919 | if (termios->c_cflag & PARENB) | |
920 | smr_val |= 0x20; | |
921 | if (termios->c_cflag & PARODD) | |
922 | smr_val |= 0x30; | |
923 | if (termios->c_cflag & CSTOPB) | |
924 | smr_val |= 0x08; | |
925 | ||
926 | uart_update_timeout(port, termios->c_cflag, baud); | |
927 | ||
928 | sci_out(port, SCSMR, smr_val); | |
929 | ||
1da177e4 | 930 | if (t > 0) { |
e7c98dc7 | 931 | if (t >= 256) { |
1da177e4 LT |
932 | sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1); |
933 | t >>= 2; | |
e7c98dc7 | 934 | } else |
1da177e4 | 935 | sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3); |
e7c98dc7 | 936 | |
1da177e4 LT |
937 | sci_out(port, SCBRR, t); |
938 | udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */ | |
939 | } | |
940 | ||
d5701647 PM |
941 | sci_init_pins(port, termios->c_cflag); |
942 | sci_out(port, SCFCR, (termios->c_cflag & CRTSCTS) ? SCFCR_MCE : 0); | |
b7a76e4b | 943 | |
1da177e4 LT |
944 | sci_out(port, SCSCR, SCSCR_INIT(port)); |
945 | ||
946 | if ((termios->c_cflag & CREAD) != 0) | |
e7c98dc7 | 947 | sci_start_rx(port, 0); |
1da177e4 LT |
948 | } |
949 | ||
950 | static const char *sci_type(struct uart_port *port) | |
951 | { | |
952 | switch (port->type) { | |
e7c98dc7 MT |
953 | case PORT_IRDA: |
954 | return "irda"; | |
955 | case PORT_SCI: | |
956 | return "sci"; | |
957 | case PORT_SCIF: | |
958 | return "scif"; | |
959 | case PORT_SCIFA: | |
960 | return "scifa"; | |
1da177e4 LT |
961 | } |
962 | ||
fa43972f | 963 | return NULL; |
1da177e4 LT |
964 | } |
965 | ||
966 | static void sci_release_port(struct uart_port *port) | |
967 | { | |
968 | /* Nothing here yet .. */ | |
969 | } | |
970 | ||
971 | static int sci_request_port(struct uart_port *port) | |
972 | { | |
973 | /* Nothing here yet .. */ | |
974 | return 0; | |
975 | } | |
976 | ||
977 | static void sci_config_port(struct uart_port *port, int flags) | |
978 | { | |
a5660ada | 979 | struct sci_port *s = to_sci_port(port); |
1da177e4 LT |
980 | |
981 | port->type = s->type; | |
982 | ||
08f8cb31 MD |
983 | if (port->membase) |
984 | return; | |
985 | ||
986 | if (port->flags & UPF_IOREMAP) { | |
7ff731ae | 987 | port->membase = ioremap_nocache(port->mapbase, 0x40); |
08f8cb31 MD |
988 | |
989 | if (IS_ERR(port->membase)) | |
990 | dev_err(port->dev, "can't remap port#%d\n", port->line); | |
991 | } else { | |
992 | /* | |
993 | * For the simple (and majority of) cases where we don't | |
994 | * need to do any remapping, just cast the cookie | |
995 | * directly. | |
996 | */ | |
997 | port->membase = (void __iomem *)port->mapbase; | |
7ff731ae | 998 | } |
1da177e4 LT |
999 | } |
1000 | ||
1001 | static int sci_verify_port(struct uart_port *port, struct serial_struct *ser) | |
1002 | { | |
a5660ada | 1003 | struct sci_port *s = to_sci_port(port); |
1da177e4 | 1004 | |
a62c4133 | 1005 | if (ser->irq != s->irqs[SCIx_TXI_IRQ] || ser->irq > nr_irqs) |
1da177e4 LT |
1006 | return -EINVAL; |
1007 | if (ser->baud_base < 2400) | |
1008 | /* No paper tape reader for Mitch.. */ | |
1009 | return -EINVAL; | |
1010 | ||
1011 | return 0; | |
1012 | } | |
1013 | ||
1014 | static struct uart_ops sci_uart_ops = { | |
1015 | .tx_empty = sci_tx_empty, | |
1016 | .set_mctrl = sci_set_mctrl, | |
1017 | .get_mctrl = sci_get_mctrl, | |
1018 | .start_tx = sci_start_tx, | |
1019 | .stop_tx = sci_stop_tx, | |
1020 | .stop_rx = sci_stop_rx, | |
1021 | .enable_ms = sci_enable_ms, | |
1022 | .break_ctl = sci_break_ctl, | |
1023 | .startup = sci_startup, | |
1024 | .shutdown = sci_shutdown, | |
1025 | .set_termios = sci_set_termios, | |
1026 | .type = sci_type, | |
1027 | .release_port = sci_release_port, | |
1028 | .request_port = sci_request_port, | |
1029 | .config_port = sci_config_port, | |
1030 | .verify_port = sci_verify_port, | |
07d2a1a1 PM |
1031 | #ifdef CONFIG_CONSOLE_POLL |
1032 | .poll_get_char = sci_poll_get_char, | |
1033 | .poll_put_char = sci_poll_put_char, | |
1034 | #endif | |
1da177e4 LT |
1035 | }; |
1036 | ||
501b825d MD |
1037 | static void __devinit sci_init_single(struct platform_device *dev, |
1038 | struct sci_port *sci_port, | |
08f8cb31 MD |
1039 | unsigned int index, |
1040 | struct plat_sci_port *p) | |
e108b2ca | 1041 | { |
7ed7e071 MD |
1042 | sci_port->port.ops = &sci_uart_ops; |
1043 | sci_port->port.iotype = UPIO_MEM; | |
1044 | sci_port->port.line = index; | |
1045 | sci_port->port.fifosize = 1; | |
501b825d | 1046 | sci_port->iclk = p->clk ? clk_get(&dev->dev, p->clk) : NULL; |
af777ce4 | 1047 | sci_port->dclk = clk_get(&dev->dev, "peripheral_clk"); |
501b825d MD |
1048 | sci_port->enable = sci_clk_enable; |
1049 | sci_port->disable = sci_clk_disable; | |
e108b2ca | 1050 | |
7ed7e071 MD |
1051 | sci_port->break_timer.data = (unsigned long)sci_port; |
1052 | sci_port->break_timer.function = sci_break_timer; | |
1053 | init_timer(&sci_port->break_timer); | |
1054 | ||
1055 | sci_port->port.mapbase = p->mapbase; | |
7ed7e071 MD |
1056 | sci_port->port.membase = p->membase; |
1057 | ||
1058 | sci_port->port.irq = p->irqs[SCIx_TXI_IRQ]; | |
1059 | sci_port->port.flags = p->flags; | |
501b825d | 1060 | sci_port->port.dev = &dev->dev; |
7ed7e071 MD |
1061 | sci_port->type = sci_port->port.type = p->type; |
1062 | ||
1063 | memcpy(&sci_port->irqs, &p->irqs, sizeof(p->irqs)); | |
e108b2ca PM |
1064 | } |
1065 | ||
1da177e4 | 1066 | #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE |
dc8e6f5b MD |
1067 | static struct tty_driver *serial_console_device(struct console *co, int *index) |
1068 | { | |
1069 | struct uart_driver *p = &sci_uart_driver; | |
1070 | *index = co->index; | |
1071 | return p->tty_driver; | |
1072 | } | |
1073 | ||
1074 | static void serial_console_putchar(struct uart_port *port, int ch) | |
1075 | { | |
1076 | sci_poll_put_char(port, ch); | |
1077 | } | |
1078 | ||
1da177e4 LT |
1079 | /* |
1080 | * Print a string to the serial port trying not to disturb | |
1081 | * any possible real use of the port... | |
1082 | */ | |
1083 | static void serial_console_write(struct console *co, const char *s, | |
1084 | unsigned count) | |
1085 | { | |
dc8e6f5b | 1086 | struct uart_port *port = co->data; |
501b825d | 1087 | struct sci_port *sci_port = to_sci_port(port); |
973e5d52 | 1088 | unsigned short bits; |
07d2a1a1 | 1089 | |
501b825d MD |
1090 | if (sci_port->enable) |
1091 | sci_port->enable(port); | |
1092 | ||
1093 | uart_console_write(port, s, count, serial_console_putchar); | |
973e5d52 MD |
1094 | |
1095 | /* wait until fifo is empty and last bit has been transmitted */ | |
1096 | bits = SCxSR_TDxE(port) | SCxSR_TEND(port); | |
1097 | while ((sci_in(port, SCxSR) & bits) != bits) | |
1098 | cpu_relax(); | |
501b825d | 1099 | |
345e5a76 | 1100 | if (sci_port->disable) |
501b825d | 1101 | sci_port->disable(port); |
1da177e4 LT |
1102 | } |
1103 | ||
1104 | static int __init serial_console_setup(struct console *co, char *options) | |
1105 | { | |
dc8e6f5b | 1106 | struct sci_port *sci_port; |
1da177e4 LT |
1107 | struct uart_port *port; |
1108 | int baud = 115200; | |
1109 | int bits = 8; | |
1110 | int parity = 'n'; | |
1111 | int flow = 'n'; | |
1112 | int ret; | |
1113 | ||
e108b2ca PM |
1114 | /* |
1115 | * Check whether an invalid uart number has been specified, and | |
1116 | * if so, search for the first available port that does have | |
1117 | * console support. | |
1118 | */ | |
1119 | if (co->index >= SCI_NPORTS) | |
1120 | co->index = 0; | |
1121 | ||
dc8e6f5b MD |
1122 | sci_port = &sci_ports[co->index]; |
1123 | port = &sci_port->port; | |
1124 | co->data = port; | |
1da177e4 LT |
1125 | |
1126 | /* | |
e108b2ca PM |
1127 | * Also need to check port->type, we don't actually have any |
1128 | * UPIO_PORT ports, but uart_report_port() handily misreports | |
1129 | * it anyways if we don't have a port available by the time this is | |
1130 | * called. | |
1da177e4 | 1131 | */ |
e108b2ca PM |
1132 | if (!port->type) |
1133 | return -ENODEV; | |
e108b2ca | 1134 | |
08f8cb31 | 1135 | sci_config_port(port, 0); |
e108b2ca | 1136 | |
dc8e6f5b MD |
1137 | if (sci_port->enable) |
1138 | sci_port->enable(port); | |
b7a76e4b | 1139 | |
1da177e4 LT |
1140 | if (options) |
1141 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
1142 | ||
1143 | ret = uart_set_options(port, co, baud, parity, bits, flow); | |
1144 | #if defined(__H8300H__) || defined(__H8300S__) | |
1145 | /* disable rx interrupt */ | |
1146 | if (ret == 0) | |
1147 | sci_stop_rx(port); | |
1148 | #endif | |
501b825d | 1149 | /* TODO: disable clock */ |
1da177e4 LT |
1150 | return ret; |
1151 | } | |
1152 | ||
1153 | static struct console serial_console = { | |
1154 | .name = "ttySC", | |
dc8e6f5b | 1155 | .device = serial_console_device, |
1da177e4 LT |
1156 | .write = serial_console_write, |
1157 | .setup = serial_console_setup, | |
fa5da2f7 | 1158 | .flags = CON_PRINTBUFFER, |
1da177e4 | 1159 | .index = -1, |
1da177e4 LT |
1160 | }; |
1161 | ||
1162 | static int __init sci_console_init(void) | |
1163 | { | |
1164 | register_console(&serial_console); | |
1165 | return 0; | |
1166 | } | |
1da177e4 LT |
1167 | console_initcall(sci_console_init); |
1168 | #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */ | |
1169 | ||
07d2a1a1 | 1170 | #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) |
e7c98dc7 | 1171 | #define SCI_CONSOLE (&serial_console) |
1da177e4 | 1172 | #else |
b7a76e4b | 1173 | #define SCI_CONSOLE 0 |
1da177e4 LT |
1174 | #endif |
1175 | ||
1176 | static char banner[] __initdata = | |
1177 | KERN_INFO "SuperH SCI(F) driver initialized\n"; | |
1178 | ||
1179 | static struct uart_driver sci_uart_driver = { | |
1180 | .owner = THIS_MODULE, | |
1181 | .driver_name = "sci", | |
1da177e4 LT |
1182 | .dev_name = "ttySC", |
1183 | .major = SCI_MAJOR, | |
1184 | .minor = SCI_MINOR_START, | |
e108b2ca | 1185 | .nr = SCI_NPORTS, |
1da177e4 LT |
1186 | .cons = SCI_CONSOLE, |
1187 | }; | |
1188 | ||
e552de24 | 1189 | |
54507f6e | 1190 | static int sci_remove(struct platform_device *dev) |
e552de24 MD |
1191 | { |
1192 | struct sh_sci_priv *priv = platform_get_drvdata(dev); | |
1193 | struct sci_port *p; | |
1194 | unsigned long flags; | |
1195 | ||
e552de24 | 1196 | cpufreq_unregister_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER); |
e552de24 MD |
1197 | |
1198 | spin_lock_irqsave(&priv->lock, flags); | |
1199 | list_for_each_entry(p, &priv->ports, node) | |
1200 | uart_remove_one_port(&sci_uart_driver, &p->port); | |
e552de24 MD |
1201 | spin_unlock_irqrestore(&priv->lock, flags); |
1202 | ||
1203 | kfree(priv); | |
1204 | return 0; | |
1205 | } | |
1206 | ||
0ee70712 MD |
1207 | static int __devinit sci_probe_single(struct platform_device *dev, |
1208 | unsigned int index, | |
1209 | struct plat_sci_port *p, | |
1210 | struct sci_port *sciport) | |
1211 | { | |
1212 | struct sh_sci_priv *priv = platform_get_drvdata(dev); | |
1213 | unsigned long flags; | |
1214 | int ret; | |
1215 | ||
1216 | /* Sanity check */ | |
1217 | if (unlikely(index >= SCI_NPORTS)) { | |
1218 | dev_notice(&dev->dev, "Attempting to register port " | |
1219 | "%d when only %d are available.\n", | |
1220 | index+1, SCI_NPORTS); | |
1221 | dev_notice(&dev->dev, "Consider bumping " | |
1222 | "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n"); | |
1223 | return 0; | |
1224 | } | |
1225 | ||
501b825d | 1226 | sci_init_single(dev, sciport, index, p); |
0ee70712 MD |
1227 | |
1228 | ret = uart_add_one_port(&sci_uart_driver, &sciport->port); | |
08f8cb31 | 1229 | if (ret) |
0ee70712 | 1230 | return ret; |
0ee70712 MD |
1231 | |
1232 | INIT_LIST_HEAD(&sciport->node); | |
1233 | ||
1234 | spin_lock_irqsave(&priv->lock, flags); | |
1235 | list_add(&sciport->node, &priv->ports); | |
1236 | spin_unlock_irqrestore(&priv->lock, flags); | |
1237 | ||
1238 | return 0; | |
1239 | } | |
1240 | ||
e108b2ca PM |
1241 | /* |
1242 | * Register a set of serial devices attached to a platform device. The | |
1243 | * list is terminated with a zero flags entry, which means we expect | |
1244 | * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need | |
1245 | * remapping (such as sh64) should also set UPF_IOREMAP. | |
1246 | */ | |
1247 | static int __devinit sci_probe(struct platform_device *dev) | |
1da177e4 | 1248 | { |
e108b2ca | 1249 | struct plat_sci_port *p = dev->dev.platform_data; |
e552de24 | 1250 | struct sh_sci_priv *priv; |
7ff731ae | 1251 | int i, ret = -EINVAL; |
e552de24 MD |
1252 | |
1253 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); | |
1254 | if (!priv) | |
1255 | return -ENOMEM; | |
1256 | ||
1257 | INIT_LIST_HEAD(&priv->ports); | |
1258 | spin_lock_init(&priv->lock); | |
1259 | platform_set_drvdata(dev, priv); | |
1260 | ||
e552de24 MD |
1261 | priv->clk_nb.notifier_call = sci_notifier; |
1262 | cpufreq_register_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER); | |
1da177e4 | 1263 | |
0ee70712 MD |
1264 | if (dev->id != -1) { |
1265 | ret = sci_probe_single(dev, dev->id, p, &sci_ports[dev->id]); | |
1266 | if (ret) | |
e552de24 | 1267 | goto err_unreg; |
0ee70712 MD |
1268 | } else { |
1269 | for (i = 0; p && p->flags != 0; p++, i++) { | |
1270 | ret = sci_probe_single(dev, i, p, &sci_ports[i]); | |
1271 | if (ret) | |
1272 | goto err_unreg; | |
e552de24 | 1273 | } |
e552de24 | 1274 | } |
1da177e4 LT |
1275 | |
1276 | #ifdef CONFIG_SH_STANDARD_BIOS | |
1277 | sh_bios_gdb_detach(); | |
1278 | #endif | |
1279 | ||
e108b2ca | 1280 | return 0; |
7ff731ae PM |
1281 | |
1282 | err_unreg: | |
e552de24 | 1283 | sci_remove(dev); |
7ff731ae | 1284 | return ret; |
1da177e4 LT |
1285 | } |
1286 | ||
6daa79b3 | 1287 | static int sci_suspend(struct device *dev) |
1da177e4 | 1288 | { |
6daa79b3 | 1289 | struct sh_sci_priv *priv = dev_get_drvdata(dev); |
e552de24 MD |
1290 | struct sci_port *p; |
1291 | unsigned long flags; | |
e108b2ca | 1292 | |
e552de24 MD |
1293 | spin_lock_irqsave(&priv->lock, flags); |
1294 | list_for_each_entry(p, &priv->ports, node) | |
1295 | uart_suspend_port(&sci_uart_driver, &p->port); | |
e552de24 | 1296 | spin_unlock_irqrestore(&priv->lock, flags); |
1da177e4 | 1297 | |
e108b2ca PM |
1298 | return 0; |
1299 | } | |
1da177e4 | 1300 | |
6daa79b3 | 1301 | static int sci_resume(struct device *dev) |
e108b2ca | 1302 | { |
6daa79b3 | 1303 | struct sh_sci_priv *priv = dev_get_drvdata(dev); |
e552de24 MD |
1304 | struct sci_port *p; |
1305 | unsigned long flags; | |
e108b2ca | 1306 | |
e552de24 MD |
1307 | spin_lock_irqsave(&priv->lock, flags); |
1308 | list_for_each_entry(p, &priv->ports, node) | |
1309 | uart_resume_port(&sci_uart_driver, &p->port); | |
e552de24 | 1310 | spin_unlock_irqrestore(&priv->lock, flags); |
e108b2ca PM |
1311 | |
1312 | return 0; | |
1313 | } | |
1314 | ||
6daa79b3 PM |
1315 | static struct dev_pm_ops sci_dev_pm_ops = { |
1316 | .suspend = sci_suspend, | |
1317 | .resume = sci_resume, | |
1318 | }; | |
1319 | ||
e108b2ca PM |
1320 | static struct platform_driver sci_driver = { |
1321 | .probe = sci_probe, | |
b9e39c89 | 1322 | .remove = sci_remove, |
e108b2ca PM |
1323 | .driver = { |
1324 | .name = "sh-sci", | |
1325 | .owner = THIS_MODULE, | |
6daa79b3 | 1326 | .pm = &sci_dev_pm_ops, |
e108b2ca PM |
1327 | }, |
1328 | }; | |
1329 | ||
1330 | static int __init sci_init(void) | |
1331 | { | |
1332 | int ret; | |
1333 | ||
1334 | printk(banner); | |
1335 | ||
e108b2ca PM |
1336 | ret = uart_register_driver(&sci_uart_driver); |
1337 | if (likely(ret == 0)) { | |
1338 | ret = platform_driver_register(&sci_driver); | |
1339 | if (unlikely(ret)) | |
1340 | uart_unregister_driver(&sci_uart_driver); | |
1341 | } | |
1342 | ||
1343 | return ret; | |
1344 | } | |
1345 | ||
1346 | static void __exit sci_exit(void) | |
1347 | { | |
1348 | platform_driver_unregister(&sci_driver); | |
1da177e4 LT |
1349 | uart_unregister_driver(&sci_uart_driver); |
1350 | } | |
1351 | ||
1352 | module_init(sci_init); | |
1353 | module_exit(sci_exit); | |
1354 | ||
e108b2ca | 1355 | MODULE_LICENSE("GPL"); |
e169c139 | 1356 | MODULE_ALIAS("platform:sh-sci"); |