Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * drivers/serial/serial_txx9.c | |
3 | * | |
4 | * Derived from many drivers using generic_serial interface, | |
5 | * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c | |
6 | * (was in Linux/VR tree) by Jim Pick. | |
7 | * | |
8 | * Copyright (C) 1999 Harald Koerfgen | |
9 | * Copyright (C) 2000 Jim Pick <jim@jimpick.com> | |
10 | * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com) | |
11 | * Copyright (C) 2000-2002 Toshiba Corporation | |
12 | * | |
13 | * This program is free software; you can redistribute it and/or modify | |
14 | * it under the terms of the GNU General Public License version 2 as | |
15 | * published by the Free Software Foundation. | |
16 | * | |
17 | * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller | |
18 | * | |
19 | * Revision History: | |
20 | * 0.30 Initial revision. (Renamed from serial_txx927.c) | |
21 | * 0.31 Use save_flags instead of local_irq_save. | |
22 | * 0.32 Support SCLK. | |
23 | * 0.33 Switch TXX9_TTY_NAME by CONFIG_SERIAL_TXX9_STDSERIAL. | |
24 | * Support TIOCSERGETLSR. | |
25 | * 0.34 Support slow baudrate. | |
26 | * 0.40 Merge codes from mainstream kernel (2.4.22). | |
27 | * 0.41 Fix console checking in rs_shutdown_port(). | |
28 | * Disable flow-control in serial_console_write(). | |
29 | * 0.42 Fix minor compiler warning. | |
30 | * 1.00 Kernel 2.6. Converted to new serial core (based on 8250.c). | |
31 | * 1.01 Set fifosize to make tx_empry called properly. | |
32 | * Use standard uart_get_divisor. | |
33 | * 1.02 Cleanup. (import 8250.c changes) | |
34 | */ | |
35 | #include <linux/config.h> | |
36 | ||
37 | #if defined(CONFIG_SERIAL_TXX9_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | |
38 | #define SUPPORT_SYSRQ | |
39 | #endif | |
40 | ||
41 | #include <linux/module.h> | |
42 | #include <linux/ioport.h> | |
43 | #include <linux/init.h> | |
44 | #include <linux/console.h> | |
45 | #include <linux/sysrq.h> | |
46 | #include <linux/delay.h> | |
47 | #include <linux/device.h> | |
48 | #include <linux/pci.h> | |
49 | #include <linux/tty.h> | |
50 | #include <linux/tty_flip.h> | |
51 | #include <linux/serial_core.h> | |
52 | #include <linux/serial.h> | |
53 | ||
54 | #include <asm/io.h> | |
55 | #include <asm/irq.h> | |
56 | ||
57 | static char *serial_version = "1.02"; | |
58 | static char *serial_name = "TX39/49 Serial driver"; | |
59 | ||
60 | #define PASS_LIMIT 256 | |
61 | ||
62 | #if !defined(CONFIG_SERIAL_TXX9_STDSERIAL) | |
63 | /* "ttyS" is used for standard serial driver */ | |
64 | #define TXX9_TTY_NAME "ttyTX" | |
65 | #define TXX9_TTY_DEVFS_NAME "tttx/" | |
66 | #define TXX9_TTY_MINOR_START (64 + 64) /* ttyTX0(128), ttyTX1(129) */ | |
67 | #else | |
68 | /* acts like standard serial driver */ | |
69 | #define TXX9_TTY_NAME "ttyS" | |
70 | #define TXX9_TTY_DEVFS_NAME "tts/" | |
71 | #define TXX9_TTY_MINOR_START 64 | |
72 | #endif | |
73 | #define TXX9_TTY_MAJOR TTY_MAJOR | |
74 | ||
75 | /* flag aliases */ | |
76 | #define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART | |
77 | #define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER | |
78 | ||
79 | #ifdef CONFIG_PCI | |
80 | /* support for Toshiba TC86C001 SIO */ | |
81 | #define ENABLE_SERIAL_TXX9_PCI | |
82 | #endif | |
83 | ||
84 | /* | |
85 | * Number of serial ports | |
86 | */ | |
87 | #ifdef ENABLE_SERIAL_TXX9_PCI | |
88 | #define NR_PCI_BOARDS 4 | |
89 | #define UART_NR (2 + NR_PCI_BOARDS) | |
90 | #else | |
91 | #define UART_NR 2 | |
92 | #endif | |
93 | ||
94 | struct uart_txx9_port { | |
95 | struct uart_port port; | |
96 | ||
97 | /* | |
98 | * We provide a per-port pm hook. | |
99 | */ | |
100 | void (*pm)(struct uart_port *port, | |
101 | unsigned int state, unsigned int old); | |
102 | }; | |
103 | ||
104 | #define TXX9_REGION_SIZE 0x24 | |
105 | ||
106 | /* TXX9 Serial Registers */ | |
107 | #define TXX9_SILCR 0x00 | |
108 | #define TXX9_SIDICR 0x04 | |
109 | #define TXX9_SIDISR 0x08 | |
110 | #define TXX9_SICISR 0x0c | |
111 | #define TXX9_SIFCR 0x10 | |
112 | #define TXX9_SIFLCR 0x14 | |
113 | #define TXX9_SIBGR 0x18 | |
114 | #define TXX9_SITFIFO 0x1c | |
115 | #define TXX9_SIRFIFO 0x20 | |
116 | ||
117 | /* SILCR : Line Control */ | |
118 | #define TXX9_SILCR_SCS_MASK 0x00000060 | |
119 | #define TXX9_SILCR_SCS_IMCLK 0x00000000 | |
120 | #define TXX9_SILCR_SCS_IMCLK_BG 0x00000020 | |
121 | #define TXX9_SILCR_SCS_SCLK 0x00000040 | |
122 | #define TXX9_SILCR_SCS_SCLK_BG 0x00000060 | |
123 | #define TXX9_SILCR_UEPS 0x00000010 | |
124 | #define TXX9_SILCR_UPEN 0x00000008 | |
125 | #define TXX9_SILCR_USBL_MASK 0x00000004 | |
126 | #define TXX9_SILCR_USBL_1BIT 0x00000000 | |
127 | #define TXX9_SILCR_USBL_2BIT 0x00000004 | |
128 | #define TXX9_SILCR_UMODE_MASK 0x00000003 | |
129 | #define TXX9_SILCR_UMODE_8BIT 0x00000000 | |
130 | #define TXX9_SILCR_UMODE_7BIT 0x00000001 | |
131 | ||
132 | /* SIDICR : DMA/Int. Control */ | |
133 | #define TXX9_SIDICR_TDE 0x00008000 | |
134 | #define TXX9_SIDICR_RDE 0x00004000 | |
135 | #define TXX9_SIDICR_TIE 0x00002000 | |
136 | #define TXX9_SIDICR_RIE 0x00001000 | |
137 | #define TXX9_SIDICR_SPIE 0x00000800 | |
138 | #define TXX9_SIDICR_CTSAC 0x00000600 | |
139 | #define TXX9_SIDICR_STIE_MASK 0x0000003f | |
140 | #define TXX9_SIDICR_STIE_OERS 0x00000020 | |
141 | #define TXX9_SIDICR_STIE_CTSS 0x00000010 | |
142 | #define TXX9_SIDICR_STIE_RBRKD 0x00000008 | |
143 | #define TXX9_SIDICR_STIE_TRDY 0x00000004 | |
144 | #define TXX9_SIDICR_STIE_TXALS 0x00000002 | |
145 | #define TXX9_SIDICR_STIE_UBRKD 0x00000001 | |
146 | ||
147 | /* SIDISR : DMA/Int. Status */ | |
148 | #define TXX9_SIDISR_UBRK 0x00008000 | |
149 | #define TXX9_SIDISR_UVALID 0x00004000 | |
150 | #define TXX9_SIDISR_UFER 0x00002000 | |
151 | #define TXX9_SIDISR_UPER 0x00001000 | |
152 | #define TXX9_SIDISR_UOER 0x00000800 | |
153 | #define TXX9_SIDISR_ERI 0x00000400 | |
154 | #define TXX9_SIDISR_TOUT 0x00000200 | |
155 | #define TXX9_SIDISR_TDIS 0x00000100 | |
156 | #define TXX9_SIDISR_RDIS 0x00000080 | |
157 | #define TXX9_SIDISR_STIS 0x00000040 | |
158 | #define TXX9_SIDISR_RFDN_MASK 0x0000001f | |
159 | ||
160 | /* SICISR : Change Int. Status */ | |
161 | #define TXX9_SICISR_OERS 0x00000020 | |
162 | #define TXX9_SICISR_CTSS 0x00000010 | |
163 | #define TXX9_SICISR_RBRKD 0x00000008 | |
164 | #define TXX9_SICISR_TRDY 0x00000004 | |
165 | #define TXX9_SICISR_TXALS 0x00000002 | |
166 | #define TXX9_SICISR_UBRKD 0x00000001 | |
167 | ||
168 | /* SIFCR : FIFO Control */ | |
169 | #define TXX9_SIFCR_SWRST 0x00008000 | |
170 | #define TXX9_SIFCR_RDIL_MASK 0x00000180 | |
171 | #define TXX9_SIFCR_RDIL_1 0x00000000 | |
172 | #define TXX9_SIFCR_RDIL_4 0x00000080 | |
173 | #define TXX9_SIFCR_RDIL_8 0x00000100 | |
174 | #define TXX9_SIFCR_RDIL_12 0x00000180 | |
175 | #define TXX9_SIFCR_RDIL_MAX 0x00000180 | |
176 | #define TXX9_SIFCR_TDIL_MASK 0x00000018 | |
177 | #define TXX9_SIFCR_TDIL_MASK 0x00000018 | |
178 | #define TXX9_SIFCR_TDIL_1 0x00000000 | |
179 | #define TXX9_SIFCR_TDIL_4 0x00000001 | |
180 | #define TXX9_SIFCR_TDIL_8 0x00000010 | |
181 | #define TXX9_SIFCR_TDIL_MAX 0x00000010 | |
182 | #define TXX9_SIFCR_TFRST 0x00000004 | |
183 | #define TXX9_SIFCR_RFRST 0x00000002 | |
184 | #define TXX9_SIFCR_FRSTE 0x00000001 | |
185 | #define TXX9_SIO_TX_FIFO 8 | |
186 | #define TXX9_SIO_RX_FIFO 16 | |
187 | ||
188 | /* SIFLCR : Flow Control */ | |
189 | #define TXX9_SIFLCR_RCS 0x00001000 | |
190 | #define TXX9_SIFLCR_TES 0x00000800 | |
191 | #define TXX9_SIFLCR_RTSSC 0x00000200 | |
192 | #define TXX9_SIFLCR_RSDE 0x00000100 | |
193 | #define TXX9_SIFLCR_TSDE 0x00000080 | |
194 | #define TXX9_SIFLCR_RTSTL_MASK 0x0000001e | |
195 | #define TXX9_SIFLCR_RTSTL_MAX 0x0000001e | |
196 | #define TXX9_SIFLCR_TBRK 0x00000001 | |
197 | ||
198 | /* SIBGR : Baudrate Control */ | |
199 | #define TXX9_SIBGR_BCLK_MASK 0x00000300 | |
200 | #define TXX9_SIBGR_BCLK_T0 0x00000000 | |
201 | #define TXX9_SIBGR_BCLK_T2 0x00000100 | |
202 | #define TXX9_SIBGR_BCLK_T4 0x00000200 | |
203 | #define TXX9_SIBGR_BCLK_T6 0x00000300 | |
204 | #define TXX9_SIBGR_BRD_MASK 0x000000ff | |
205 | ||
206 | static inline unsigned int sio_in(struct uart_txx9_port *up, int offset) | |
207 | { | |
208 | switch (up->port.iotype) { | |
209 | default: | |
210 | return *(volatile u32 *)(up->port.membase + offset); | |
211 | case UPIO_PORT: | |
212 | return inl(up->port.iobase + offset); | |
213 | } | |
214 | } | |
215 | ||
216 | static inline void | |
217 | sio_out(struct uart_txx9_port *up, int offset, int value) | |
218 | { | |
219 | switch (up->port.iotype) { | |
220 | default: | |
221 | *(volatile u32 *)(up->port.membase + offset) = value; | |
222 | break; | |
223 | case UPIO_PORT: | |
224 | outl(value, up->port.iobase + offset); | |
225 | break; | |
226 | } | |
227 | } | |
228 | ||
229 | static inline void | |
230 | sio_mask(struct uart_txx9_port *up, int offset, unsigned int value) | |
231 | { | |
232 | sio_out(up, offset, sio_in(up, offset) & ~value); | |
233 | } | |
234 | static inline void | |
235 | sio_set(struct uart_txx9_port *up, int offset, unsigned int value) | |
236 | { | |
237 | sio_out(up, offset, sio_in(up, offset) | value); | |
238 | } | |
239 | ||
240 | static inline void | |
241 | sio_quot_set(struct uart_txx9_port *up, int quot) | |
242 | { | |
243 | quot >>= 1; | |
244 | if (quot < 256) | |
245 | sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0); | |
246 | else if (quot < (256 << 2)) | |
247 | sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2); | |
248 | else if (quot < (256 << 4)) | |
249 | sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4); | |
250 | else if (quot < (256 << 6)) | |
251 | sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6); | |
252 | else | |
253 | sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6); | |
254 | } | |
255 | ||
b129a8cc | 256 | static void serial_txx9_stop_tx(struct uart_port *port) |
1da177e4 LT |
257 | { |
258 | struct uart_txx9_port *up = (struct uart_txx9_port *)port; | |
259 | unsigned long flags; | |
260 | ||
261 | spin_lock_irqsave(&up->port.lock, flags); | |
262 | sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE); | |
263 | spin_unlock_irqrestore(&up->port.lock, flags); | |
264 | } | |
265 | ||
b129a8cc | 266 | static void serial_txx9_start_tx(struct uart_port *port) |
1da177e4 LT |
267 | { |
268 | struct uart_txx9_port *up = (struct uart_txx9_port *)port; | |
269 | unsigned long flags; | |
270 | ||
271 | spin_lock_irqsave(&up->port.lock, flags); | |
272 | sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE); | |
273 | spin_unlock_irqrestore(&up->port.lock, flags); | |
274 | } | |
275 | ||
276 | static void serial_txx9_stop_rx(struct uart_port *port) | |
277 | { | |
278 | struct uart_txx9_port *up = (struct uart_txx9_port *)port; | |
279 | unsigned long flags; | |
280 | ||
281 | spin_lock_irqsave(&up->port.lock, flags); | |
282 | up->port.read_status_mask &= ~TXX9_SIDISR_RDIS; | |
283 | #if 0 | |
284 | sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_RIE); | |
285 | #endif | |
286 | spin_unlock_irqrestore(&up->port.lock, flags); | |
287 | } | |
288 | ||
289 | static void serial_txx9_enable_ms(struct uart_port *port) | |
290 | { | |
291 | /* TXX9-SIO can not control DTR... */ | |
292 | } | |
293 | ||
294 | static inline void | |
295 | receive_chars(struct uart_txx9_port *up, unsigned int *status, struct pt_regs *regs) | |
296 | { | |
297 | struct tty_struct *tty = up->port.info->tty; | |
298 | unsigned char ch; | |
299 | unsigned int disr = *status; | |
300 | int max_count = 256; | |
301 | char flag; | |
302 | ||
303 | do { | |
304 | /* The following is not allowed by the tty layer and | |
305 | unsafe. It should be fixed ASAP */ | |
306 | if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) { | |
307 | if(tty->low_latency) | |
308 | tty_flip_buffer_push(tty); | |
309 | /* If this failed then we will throw away the | |
310 | bytes but must do so to clear interrupts */ | |
311 | } | |
312 | ch = sio_in(up, TXX9_SIRFIFO); | |
313 | flag = TTY_NORMAL; | |
314 | up->port.icount.rx++; | |
315 | ||
316 | if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER | | |
317 | TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) { | |
318 | /* | |
319 | * For statistics only | |
320 | */ | |
321 | if (disr & TXX9_SIDISR_UBRK) { | |
322 | disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER); | |
323 | up->port.icount.brk++; | |
324 | /* | |
325 | * We do the SysRQ and SAK checking | |
326 | * here because otherwise the break | |
327 | * may get masked by ignore_status_mask | |
328 | * or read_status_mask. | |
329 | */ | |
330 | if (uart_handle_break(&up->port)) | |
331 | goto ignore_char; | |
332 | } else if (disr & TXX9_SIDISR_UPER) | |
333 | up->port.icount.parity++; | |
334 | else if (disr & TXX9_SIDISR_UFER) | |
335 | up->port.icount.frame++; | |
336 | if (disr & TXX9_SIDISR_UOER) | |
337 | up->port.icount.overrun++; | |
338 | ||
339 | /* | |
340 | * Mask off conditions which should be ingored. | |
341 | */ | |
342 | disr &= up->port.read_status_mask; | |
343 | ||
344 | if (disr & TXX9_SIDISR_UBRK) { | |
345 | flag = TTY_BREAK; | |
346 | } else if (disr & TXX9_SIDISR_UPER) | |
347 | flag = TTY_PARITY; | |
348 | else if (disr & TXX9_SIDISR_UFER) | |
349 | flag = TTY_FRAME; | |
350 | } | |
351 | if (uart_handle_sysrq_char(&up->port, ch, regs)) | |
352 | goto ignore_char; | |
05ab3014 RK |
353 | |
354 | uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag); | |
355 | ||
1da177e4 LT |
356 | ignore_char: |
357 | disr = sio_in(up, TXX9_SIDISR); | |
358 | } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0)); | |
359 | tty_flip_buffer_push(tty); | |
360 | *status = disr; | |
361 | } | |
362 | ||
363 | static inline void transmit_chars(struct uart_txx9_port *up) | |
364 | { | |
365 | struct circ_buf *xmit = &up->port.info->xmit; | |
366 | int count; | |
367 | ||
368 | if (up->port.x_char) { | |
369 | sio_out(up, TXX9_SITFIFO, up->port.x_char); | |
370 | up->port.icount.tx++; | |
371 | up->port.x_char = 0; | |
372 | return; | |
373 | } | |
374 | if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { | |
b129a8cc | 375 | serial_txx9_stop_tx(&up->port); |
1da177e4 LT |
376 | return; |
377 | } | |
378 | ||
379 | count = TXX9_SIO_TX_FIFO; | |
380 | do { | |
381 | sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]); | |
382 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
383 | up->port.icount.tx++; | |
384 | if (uart_circ_empty(xmit)) | |
385 | break; | |
386 | } while (--count > 0); | |
387 | ||
388 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
389 | uart_write_wakeup(&up->port); | |
390 | ||
391 | if (uart_circ_empty(xmit)) | |
b129a8cc | 392 | serial_txx9_stop_tx(&up->port); |
1da177e4 LT |
393 | } |
394 | ||
395 | static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |
396 | { | |
397 | int pass_counter = 0; | |
398 | struct uart_txx9_port *up = dev_id; | |
399 | unsigned int status; | |
400 | ||
401 | while (1) { | |
402 | spin_lock(&up->port.lock); | |
403 | status = sio_in(up, TXX9_SIDISR); | |
404 | if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE)) | |
405 | status &= ~TXX9_SIDISR_TDIS; | |
406 | if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS | | |
407 | TXX9_SIDISR_TOUT))) { | |
408 | spin_unlock(&up->port.lock); | |
409 | break; | |
410 | } | |
411 | ||
412 | if (status & TXX9_SIDISR_RDIS) | |
413 | receive_chars(up, &status, regs); | |
414 | if (status & TXX9_SIDISR_TDIS) | |
415 | transmit_chars(up); | |
416 | /* Clear TX/RX Int. Status */ | |
417 | sio_mask(up, TXX9_SIDISR, | |
418 | TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS | | |
419 | TXX9_SIDISR_TOUT); | |
420 | spin_unlock(&up->port.lock); | |
421 | ||
422 | if (pass_counter++ > PASS_LIMIT) | |
423 | break; | |
424 | } | |
425 | ||
426 | return pass_counter ? IRQ_HANDLED : IRQ_NONE; | |
427 | } | |
428 | ||
429 | static unsigned int serial_txx9_tx_empty(struct uart_port *port) | |
430 | { | |
431 | struct uart_txx9_port *up = (struct uart_txx9_port *)port; | |
432 | unsigned long flags; | |
433 | unsigned int ret; | |
434 | ||
435 | spin_lock_irqsave(&up->port.lock, flags); | |
436 | ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0; | |
437 | spin_unlock_irqrestore(&up->port.lock, flags); | |
438 | ||
439 | return ret; | |
440 | } | |
441 | ||
442 | static unsigned int serial_txx9_get_mctrl(struct uart_port *port) | |
443 | { | |
444 | struct uart_txx9_port *up = (struct uart_txx9_port *)port; | |
1da177e4 LT |
445 | unsigned int ret; |
446 | ||
1da177e4 LT |
447 | ret = ((sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS) |
448 | | ((sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS); | |
1da177e4 LT |
449 | |
450 | return ret; | |
451 | } | |
452 | ||
453 | static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl) | |
454 | { | |
455 | struct uart_txx9_port *up = (struct uart_txx9_port *)port; | |
456 | unsigned long flags; | |
457 | ||
458 | spin_lock_irqsave(&up->port.lock, flags); | |
459 | if (mctrl & TIOCM_RTS) | |
460 | sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC); | |
461 | else | |
462 | sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC); | |
463 | spin_unlock_irqrestore(&up->port.lock, flags); | |
464 | } | |
465 | ||
466 | static void serial_txx9_break_ctl(struct uart_port *port, int break_state) | |
467 | { | |
468 | struct uart_txx9_port *up = (struct uart_txx9_port *)port; | |
469 | unsigned long flags; | |
470 | ||
471 | spin_lock_irqsave(&up->port.lock, flags); | |
472 | if (break_state == -1) | |
473 | sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK); | |
474 | else | |
475 | sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK); | |
476 | spin_unlock_irqrestore(&up->port.lock, flags); | |
477 | } | |
478 | ||
479 | static int serial_txx9_startup(struct uart_port *port) | |
480 | { | |
481 | struct uart_txx9_port *up = (struct uart_txx9_port *)port; | |
482 | unsigned long flags; | |
483 | int retval; | |
484 | ||
485 | /* | |
486 | * Clear the FIFO buffers and disable them. | |
487 | * (they will be reeanbled in set_termios()) | |
488 | */ | |
489 | sio_set(up, TXX9_SIFCR, | |
490 | TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE); | |
491 | /* clear reset */ | |
492 | sio_mask(up, TXX9_SIFCR, | |
493 | TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE); | |
494 | sio_out(up, TXX9_SIDICR, 0); | |
495 | ||
496 | /* | |
497 | * Clear the interrupt registers. | |
498 | */ | |
499 | sio_out(up, TXX9_SIDISR, 0); | |
500 | ||
501 | retval = request_irq(up->port.irq, serial_txx9_interrupt, | |
502 | SA_SHIRQ, "serial_txx9", up); | |
503 | if (retval) | |
504 | return retval; | |
505 | ||
506 | /* | |
507 | * Now, initialize the UART | |
508 | */ | |
509 | spin_lock_irqsave(&up->port.lock, flags); | |
510 | serial_txx9_set_mctrl(&up->port, up->port.mctrl); | |
511 | spin_unlock_irqrestore(&up->port.lock, flags); | |
512 | ||
513 | /* Enable RX/TX */ | |
514 | sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE); | |
515 | ||
516 | /* | |
517 | * Finally, enable interrupts. | |
518 | */ | |
519 | sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE); | |
520 | ||
521 | return 0; | |
522 | } | |
523 | ||
524 | static void serial_txx9_shutdown(struct uart_port *port) | |
525 | { | |
526 | struct uart_txx9_port *up = (struct uart_txx9_port *)port; | |
527 | unsigned long flags; | |
528 | ||
529 | /* | |
530 | * Disable interrupts from this port | |
531 | */ | |
532 | sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */ | |
533 | ||
534 | spin_lock_irqsave(&up->port.lock, flags); | |
535 | serial_txx9_set_mctrl(&up->port, up->port.mctrl); | |
536 | spin_unlock_irqrestore(&up->port.lock, flags); | |
537 | ||
538 | /* | |
539 | * Disable break condition | |
540 | */ | |
541 | sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK); | |
542 | ||
543 | #ifdef CONFIG_SERIAL_TXX9_CONSOLE | |
544 | if (up->port.cons && up->port.line == up->port.cons->index) { | |
545 | free_irq(up->port.irq, up); | |
546 | return; | |
547 | } | |
548 | #endif | |
549 | /* reset FIFOs */ | |
550 | sio_set(up, TXX9_SIFCR, | |
551 | TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE); | |
552 | /* clear reset */ | |
553 | sio_mask(up, TXX9_SIFCR, | |
554 | TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE); | |
555 | ||
556 | /* Disable RX/TX */ | |
557 | sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE); | |
558 | ||
559 | free_irq(up->port.irq, up); | |
560 | } | |
561 | ||
562 | static void | |
563 | serial_txx9_set_termios(struct uart_port *port, struct termios *termios, | |
564 | struct termios *old) | |
565 | { | |
566 | struct uart_txx9_port *up = (struct uart_txx9_port *)port; | |
567 | unsigned int cval, fcr = 0; | |
568 | unsigned long flags; | |
569 | unsigned int baud, quot; | |
570 | ||
571 | cval = sio_in(up, TXX9_SILCR); | |
572 | /* byte size and parity */ | |
573 | cval &= ~TXX9_SILCR_UMODE_MASK; | |
574 | switch (termios->c_cflag & CSIZE) { | |
575 | case CS7: | |
576 | cval |= TXX9_SILCR_UMODE_7BIT; | |
577 | break; | |
578 | default: | |
579 | case CS5: /* not supported */ | |
580 | case CS6: /* not supported */ | |
581 | case CS8: | |
582 | cval |= TXX9_SILCR_UMODE_8BIT; | |
583 | break; | |
584 | } | |
585 | ||
586 | cval &= ~TXX9_SILCR_USBL_MASK; | |
587 | if (termios->c_cflag & CSTOPB) | |
588 | cval |= TXX9_SILCR_USBL_2BIT; | |
589 | else | |
590 | cval |= TXX9_SILCR_USBL_1BIT; | |
591 | cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS); | |
592 | if (termios->c_cflag & PARENB) | |
593 | cval |= TXX9_SILCR_UPEN; | |
594 | if (!(termios->c_cflag & PARODD)) | |
595 | cval |= TXX9_SILCR_UEPS; | |
596 | ||
597 | /* | |
598 | * Ask the core to calculate the divisor for us. | |
599 | */ | |
600 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2); | |
601 | quot = uart_get_divisor(port, baud); | |
602 | ||
603 | /* Set up FIFOs */ | |
604 | /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */ | |
605 | fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1; | |
606 | ||
607 | /* | |
608 | * Ok, we're now changing the port state. Do it with | |
609 | * interrupts disabled. | |
610 | */ | |
611 | spin_lock_irqsave(&up->port.lock, flags); | |
612 | ||
613 | /* | |
614 | * Update the per-port timeout. | |
615 | */ | |
616 | uart_update_timeout(port, termios->c_cflag, baud); | |
617 | ||
618 | up->port.read_status_mask = TXX9_SIDISR_UOER | | |
619 | TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS; | |
620 | if (termios->c_iflag & INPCK) | |
621 | up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER; | |
622 | if (termios->c_iflag & (BRKINT | PARMRK)) | |
623 | up->port.read_status_mask |= TXX9_SIDISR_UBRK; | |
624 | ||
625 | /* | |
626 | * Characteres to ignore | |
627 | */ | |
628 | up->port.ignore_status_mask = 0; | |
629 | if (termios->c_iflag & IGNPAR) | |
630 | up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER; | |
631 | if (termios->c_iflag & IGNBRK) { | |
632 | up->port.ignore_status_mask |= TXX9_SIDISR_UBRK; | |
633 | /* | |
634 | * If we're ignoring parity and break indicators, | |
635 | * ignore overruns too (for real raw support). | |
636 | */ | |
637 | if (termios->c_iflag & IGNPAR) | |
638 | up->port.ignore_status_mask |= TXX9_SIDISR_UOER; | |
639 | } | |
640 | ||
641 | /* | |
642 | * ignore all characters if CREAD is not set | |
643 | */ | |
644 | if ((termios->c_cflag & CREAD) == 0) | |
645 | up->port.ignore_status_mask |= TXX9_SIDISR_RDIS; | |
646 | ||
647 | /* CTS flow control flag */ | |
648 | if ((termios->c_cflag & CRTSCTS) && | |
649 | (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) { | |
650 | sio_set(up, TXX9_SIFLCR, | |
651 | TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES); | |
652 | } else { | |
653 | sio_mask(up, TXX9_SIFLCR, | |
654 | TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES); | |
655 | } | |
656 | ||
657 | sio_out(up, TXX9_SILCR, cval); | |
658 | sio_quot_set(up, quot); | |
659 | sio_out(up, TXX9_SIFCR, fcr); | |
660 | ||
661 | serial_txx9_set_mctrl(&up->port, up->port.mctrl); | |
662 | spin_unlock_irqrestore(&up->port.lock, flags); | |
663 | } | |
664 | ||
665 | static void | |
666 | serial_txx9_pm(struct uart_port *port, unsigned int state, | |
667 | unsigned int oldstate) | |
668 | { | |
669 | struct uart_txx9_port *up = (struct uart_txx9_port *)port; | |
670 | if (state) { | |
671 | /* sleep */ | |
672 | ||
673 | if (up->pm) | |
674 | up->pm(port, state, oldstate); | |
675 | } else { | |
676 | /* wake */ | |
677 | ||
678 | if (up->pm) | |
679 | up->pm(port, state, oldstate); | |
680 | } | |
681 | } | |
682 | ||
683 | static int serial_txx9_request_resource(struct uart_txx9_port *up) | |
684 | { | |
685 | unsigned int size = TXX9_REGION_SIZE; | |
686 | int ret = 0; | |
687 | ||
688 | switch (up->port.iotype) { | |
689 | default: | |
690 | if (!up->port.mapbase) | |
691 | break; | |
692 | ||
693 | if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) { | |
694 | ret = -EBUSY; | |
695 | break; | |
696 | } | |
697 | ||
698 | if (up->port.flags & UPF_IOREMAP) { | |
699 | up->port.membase = ioremap(up->port.mapbase, size); | |
700 | if (!up->port.membase) { | |
701 | release_mem_region(up->port.mapbase, size); | |
702 | ret = -ENOMEM; | |
703 | } | |
704 | } | |
705 | break; | |
706 | ||
707 | case UPIO_PORT: | |
708 | if (!request_region(up->port.iobase, size, "serial_txx9")) | |
709 | ret = -EBUSY; | |
710 | break; | |
711 | } | |
712 | return ret; | |
713 | } | |
714 | ||
715 | static void serial_txx9_release_resource(struct uart_txx9_port *up) | |
716 | { | |
717 | unsigned int size = TXX9_REGION_SIZE; | |
718 | ||
719 | switch (up->port.iotype) { | |
720 | default: | |
721 | if (!up->port.mapbase) | |
722 | break; | |
723 | ||
724 | if (up->port.flags & UPF_IOREMAP) { | |
725 | iounmap(up->port.membase); | |
726 | up->port.membase = NULL; | |
727 | } | |
728 | ||
729 | release_mem_region(up->port.mapbase, size); | |
730 | break; | |
731 | ||
732 | case UPIO_PORT: | |
733 | release_region(up->port.iobase, size); | |
734 | break; | |
735 | } | |
736 | } | |
737 | ||
738 | static void serial_txx9_release_port(struct uart_port *port) | |
739 | { | |
740 | struct uart_txx9_port *up = (struct uart_txx9_port *)port; | |
741 | serial_txx9_release_resource(up); | |
742 | } | |
743 | ||
744 | static int serial_txx9_request_port(struct uart_port *port) | |
745 | { | |
746 | struct uart_txx9_port *up = (struct uart_txx9_port *)port; | |
747 | return serial_txx9_request_resource(up); | |
748 | } | |
749 | ||
750 | static void serial_txx9_config_port(struct uart_port *port, int uflags) | |
751 | { | |
752 | struct uart_txx9_port *up = (struct uart_txx9_port *)port; | |
753 | unsigned long flags; | |
754 | int ret; | |
755 | ||
756 | /* | |
757 | * Find the region that we can probe for. This in turn | |
758 | * tells us whether we can probe for the type of port. | |
759 | */ | |
760 | ret = serial_txx9_request_resource(up); | |
761 | if (ret < 0) | |
762 | return; | |
763 | port->type = PORT_TXX9; | |
764 | up->port.fifosize = TXX9_SIO_TX_FIFO; | |
765 | ||
766 | #ifdef CONFIG_SERIAL_TXX9_CONSOLE | |
767 | if (up->port.line == up->port.cons->index) | |
768 | return; | |
769 | #endif | |
770 | spin_lock_irqsave(&up->port.lock, flags); | |
771 | /* | |
772 | * Reset the UART. | |
773 | */ | |
774 | sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST); | |
775 | #ifdef CONFIG_CPU_TX49XX | |
776 | /* TX4925 BUG WORKAROUND. Accessing SIOC register | |
777 | * immediately after soft reset causes bus error. */ | |
778 | iob(); | |
779 | udelay(1); | |
780 | #endif | |
781 | while (sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) | |
782 | ; | |
783 | /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */ | |
784 | sio_set(up, TXX9_SIFCR, | |
785 | TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1); | |
786 | /* initial settings */ | |
787 | sio_out(up, TXX9_SILCR, | |
788 | TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT | | |
789 | ((up->port.flags & UPF_TXX9_USE_SCLK) ? | |
790 | TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG)); | |
791 | sio_quot_set(up, uart_get_divisor(port, 9600)); | |
792 | sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */); | |
793 | spin_unlock_irqrestore(&up->port.lock, flags); | |
794 | } | |
795 | ||
796 | static int | |
797 | serial_txx9_verify_port(struct uart_port *port, struct serial_struct *ser) | |
798 | { | |
799 | if (ser->irq < 0 || | |
800 | ser->baud_base < 9600 || ser->type != PORT_TXX9) | |
801 | return -EINVAL; | |
802 | return 0; | |
803 | } | |
804 | ||
805 | static const char * | |
806 | serial_txx9_type(struct uart_port *port) | |
807 | { | |
808 | return "txx9"; | |
809 | } | |
810 | ||
811 | static struct uart_ops serial_txx9_pops = { | |
812 | .tx_empty = serial_txx9_tx_empty, | |
813 | .set_mctrl = serial_txx9_set_mctrl, | |
814 | .get_mctrl = serial_txx9_get_mctrl, | |
815 | .stop_tx = serial_txx9_stop_tx, | |
816 | .start_tx = serial_txx9_start_tx, | |
817 | .stop_rx = serial_txx9_stop_rx, | |
818 | .enable_ms = serial_txx9_enable_ms, | |
819 | .break_ctl = serial_txx9_break_ctl, | |
820 | .startup = serial_txx9_startup, | |
821 | .shutdown = serial_txx9_shutdown, | |
822 | .set_termios = serial_txx9_set_termios, | |
823 | .pm = serial_txx9_pm, | |
824 | .type = serial_txx9_type, | |
825 | .release_port = serial_txx9_release_port, | |
826 | .request_port = serial_txx9_request_port, | |
827 | .config_port = serial_txx9_config_port, | |
828 | .verify_port = serial_txx9_verify_port, | |
829 | }; | |
830 | ||
831 | static struct uart_txx9_port serial_txx9_ports[UART_NR]; | |
832 | ||
833 | static void __init serial_txx9_register_ports(struct uart_driver *drv) | |
834 | { | |
835 | int i; | |
836 | ||
837 | for (i = 0; i < UART_NR; i++) { | |
838 | struct uart_txx9_port *up = &serial_txx9_ports[i]; | |
839 | ||
840 | up->port.line = i; | |
841 | up->port.ops = &serial_txx9_pops; | |
842 | uart_add_one_port(drv, &up->port); | |
843 | } | |
844 | } | |
845 | ||
846 | #ifdef CONFIG_SERIAL_TXX9_CONSOLE | |
847 | ||
848 | /* | |
849 | * Wait for transmitter & holding register to empty | |
850 | */ | |
851 | static inline void wait_for_xmitr(struct uart_txx9_port *up) | |
852 | { | |
853 | unsigned int tmout = 10000; | |
854 | ||
855 | /* Wait up to 10ms for the character(s) to be sent. */ | |
856 | while (--tmout && | |
857 | !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS)) | |
858 | udelay(1); | |
859 | ||
860 | /* Wait up to 1s for flow control if necessary */ | |
861 | if (up->port.flags & UPF_CONS_FLOW) { | |
862 | tmout = 1000000; | |
863 | while (--tmout && | |
864 | (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS)) | |
865 | udelay(1); | |
866 | } | |
867 | } | |
868 | ||
869 | /* | |
870 | * Print a string to the serial port trying not to disturb | |
871 | * any possible real use of the port... | |
872 | * | |
873 | * The console_lock must be held when we get here. | |
874 | */ | |
875 | static void | |
876 | serial_txx9_console_write(struct console *co, const char *s, unsigned int count) | |
877 | { | |
878 | struct uart_txx9_port *up = &serial_txx9_ports[co->index]; | |
879 | unsigned int ier, flcr; | |
880 | int i; | |
881 | ||
882 | /* | |
883 | * First save the UER then disable the interrupts | |
884 | */ | |
885 | ier = sio_in(up, TXX9_SIDICR); | |
886 | sio_out(up, TXX9_SIDICR, 0); | |
887 | /* | |
888 | * Disable flow-control if enabled (and unnecessary) | |
889 | */ | |
890 | flcr = sio_in(up, TXX9_SIFLCR); | |
891 | if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES)) | |
892 | sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES); | |
893 | ||
894 | /* | |
895 | * Now, do each character | |
896 | */ | |
897 | for (i = 0; i < count; i++, s++) { | |
898 | wait_for_xmitr(up); | |
899 | ||
900 | /* | |
901 | * Send the character out. | |
902 | * If a LF, also do CR... | |
903 | */ | |
904 | sio_out(up, TXX9_SITFIFO, *s); | |
905 | if (*s == 10) { | |
906 | wait_for_xmitr(up); | |
907 | sio_out(up, TXX9_SITFIFO, 13); | |
908 | } | |
909 | } | |
910 | ||
911 | /* | |
912 | * Finally, wait for transmitter to become empty | |
913 | * and restore the IER | |
914 | */ | |
915 | wait_for_xmitr(up); | |
916 | sio_out(up, TXX9_SIFLCR, flcr); | |
917 | sio_out(up, TXX9_SIDICR, ier); | |
918 | } | |
919 | ||
920 | static int serial_txx9_console_setup(struct console *co, char *options) | |
921 | { | |
922 | struct uart_port *port; | |
923 | struct uart_txx9_port *up; | |
924 | int baud = 9600; | |
925 | int bits = 8; | |
926 | int parity = 'n'; | |
927 | int flow = 'n'; | |
928 | ||
929 | /* | |
930 | * Check whether an invalid uart number has been specified, and | |
931 | * if so, search for the first available port that does have | |
932 | * console support. | |
933 | */ | |
934 | if (co->index >= UART_NR) | |
935 | co->index = 0; | |
936 | up = &serial_txx9_ports[co->index]; | |
937 | port = &up->port; | |
938 | if (!port->ops) | |
939 | return -ENODEV; | |
940 | ||
941 | /* | |
942 | * Temporary fix. | |
943 | */ | |
944 | spin_lock_init(&port->lock); | |
945 | ||
946 | /* | |
947 | * Disable UART interrupts, set DTR and RTS high | |
948 | * and set speed. | |
949 | */ | |
950 | sio_out(up, TXX9_SIDICR, 0); | |
951 | /* initial settings */ | |
952 | sio_out(up, TXX9_SILCR, | |
953 | TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT | | |
954 | ((port->flags & UPF_TXX9_USE_SCLK) ? | |
955 | TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG)); | |
956 | sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */); | |
957 | ||
958 | if (options) | |
959 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
960 | ||
961 | return uart_set_options(port, co, baud, parity, bits, flow); | |
962 | } | |
963 | ||
964 | static struct uart_driver serial_txx9_reg; | |
965 | static struct console serial_txx9_console = { | |
966 | .name = TXX9_TTY_NAME, | |
967 | .write = serial_txx9_console_write, | |
968 | .device = uart_console_device, | |
969 | .setup = serial_txx9_console_setup, | |
970 | .flags = CON_PRINTBUFFER, | |
971 | .index = -1, | |
972 | .data = &serial_txx9_reg, | |
973 | }; | |
974 | ||
975 | static int __init serial_txx9_console_init(void) | |
976 | { | |
977 | register_console(&serial_txx9_console); | |
978 | return 0; | |
979 | } | |
980 | console_initcall(serial_txx9_console_init); | |
981 | ||
982 | static int __init serial_txx9_late_console_init(void) | |
983 | { | |
984 | if (!(serial_txx9_console.flags & CON_ENABLED)) | |
985 | register_console(&serial_txx9_console); | |
986 | return 0; | |
987 | } | |
988 | late_initcall(serial_txx9_late_console_init); | |
989 | ||
990 | #define SERIAL_TXX9_CONSOLE &serial_txx9_console | |
991 | #else | |
992 | #define SERIAL_TXX9_CONSOLE NULL | |
993 | #endif | |
994 | ||
995 | static struct uart_driver serial_txx9_reg = { | |
996 | .owner = THIS_MODULE, | |
997 | .driver_name = "serial_txx9", | |
998 | .devfs_name = TXX9_TTY_DEVFS_NAME, | |
999 | .dev_name = TXX9_TTY_NAME, | |
1000 | .major = TXX9_TTY_MAJOR, | |
1001 | .minor = TXX9_TTY_MINOR_START, | |
1002 | .nr = UART_NR, | |
1003 | .cons = SERIAL_TXX9_CONSOLE, | |
1004 | }; | |
1005 | ||
1006 | int __init early_serial_txx9_setup(struct uart_port *port) | |
1007 | { | |
1008 | if (port->line >= ARRAY_SIZE(serial_txx9_ports)) | |
1009 | return -ENODEV; | |
1010 | ||
1011 | serial_txx9_ports[port->line].port = *port; | |
1012 | serial_txx9_ports[port->line].port.ops = &serial_txx9_pops; | |
1013 | serial_txx9_ports[port->line].port.flags |= UPF_BOOT_AUTOCONF; | |
1014 | return 0; | |
1015 | } | |
1016 | ||
1017 | #ifdef ENABLE_SERIAL_TXX9_PCI | |
1018 | /** | |
1019 | * serial_txx9_suspend_port - suspend one serial port | |
1020 | * @line: serial line number | |
1021 | * @level: the level of port suspension, as per uart_suspend_port | |
1022 | * | |
1023 | * Suspend one serial port. | |
1024 | */ | |
1025 | static void serial_txx9_suspend_port(int line) | |
1026 | { | |
1027 | uart_suspend_port(&serial_txx9_reg, &serial_txx9_ports[line].port); | |
1028 | } | |
1029 | ||
1030 | /** | |
1031 | * serial_txx9_resume_port - resume one serial port | |
1032 | * @line: serial line number | |
1033 | * @level: the level of port resumption, as per uart_resume_port | |
1034 | * | |
1035 | * Resume one serial port. | |
1036 | */ | |
1037 | static void serial_txx9_resume_port(int line) | |
1038 | { | |
1039 | uart_resume_port(&serial_txx9_reg, &serial_txx9_ports[line].port); | |
1040 | } | |
1041 | ||
1042 | /* | |
1043 | * Probe one serial board. Unfortunately, there is no rhyme nor reason | |
1044 | * to the arrangement of serial ports on a PCI card. | |
1045 | */ | |
1046 | static int __devinit | |
1047 | pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent) | |
1048 | { | |
1049 | struct uart_port port; | |
1050 | int line; | |
1051 | int rc; | |
1052 | ||
1053 | rc = pci_enable_device(dev); | |
1054 | if (rc) | |
1055 | return rc; | |
1056 | ||
1057 | memset(&port, 0, sizeof(port)); | |
1058 | port.ops = &serial_txx9_pops; | |
1059 | port.flags |= UPF_BOOT_AUTOCONF; /* uart_ops.config_port will be called */ | |
1060 | port.flags |= UPF_TXX9_HAVE_CTS_LINE; | |
1061 | port.uartclk = 66670000; | |
1062 | port.irq = dev->irq; | |
1063 | port.iotype = UPIO_PORT; | |
1064 | port.iobase = pci_resource_start(dev, 1); | |
1065 | line = uart_register_port(&serial_txx9_reg, &port); | |
1066 | if (line < 0) { | |
1067 | printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line); | |
1068 | } | |
1069 | pci_set_drvdata(dev, (void *)(long)line); | |
1070 | ||
1071 | return 0; | |
1072 | } | |
1073 | ||
1074 | static void __devexit pciserial_txx9_remove_one(struct pci_dev *dev) | |
1075 | { | |
1076 | int line = (int)(long)pci_get_drvdata(dev); | |
1077 | ||
1078 | pci_set_drvdata(dev, NULL); | |
1079 | ||
1080 | if (line) { | |
1081 | uart_unregister_port(&serial_txx9_reg, line); | |
1082 | pci_disable_device(dev); | |
1083 | } | |
1084 | } | |
1085 | ||
0370affe | 1086 | static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state) |
1da177e4 LT |
1087 | { |
1088 | int line = (int)(long)pci_get_drvdata(dev); | |
1089 | ||
1090 | if (line) | |
1091 | serial_txx9_suspend_port(line); | |
1092 | return 0; | |
1093 | } | |
1094 | ||
1095 | static int pciserial_txx9_resume_one(struct pci_dev *dev) | |
1096 | { | |
1097 | int line = (int)(long)pci_get_drvdata(dev); | |
1098 | ||
1099 | if (line) | |
1100 | serial_txx9_resume_port(line); | |
1101 | return 0; | |
1102 | } | |
1103 | ||
1104 | static struct pci_device_id serial_txx9_pci_tbl[] = { | |
1105 | { PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC, | |
1106 | PCI_ANY_ID, PCI_ANY_ID, | |
1107 | 0, 0, 0 }, | |
1108 | { 0, } | |
1109 | }; | |
1110 | ||
1111 | static struct pci_driver serial_txx9_pci_driver = { | |
1112 | .name = "serial_txx9", | |
1113 | .probe = pciserial_txx9_init_one, | |
1114 | .remove = __devexit_p(pciserial_txx9_remove_one), | |
1115 | .suspend = pciserial_txx9_suspend_one, | |
1116 | .resume = pciserial_txx9_resume_one, | |
1117 | .id_table = serial_txx9_pci_tbl, | |
1118 | }; | |
1119 | ||
1120 | MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl); | |
1121 | #endif /* ENABLE_SERIAL_TXX9_PCI */ | |
1122 | ||
1123 | static int __init serial_txx9_init(void) | |
1124 | { | |
1125 | int ret; | |
1126 | ||
1127 | printk(KERN_INFO "%s version %s\n", serial_name, serial_version); | |
1128 | ||
1129 | ret = uart_register_driver(&serial_txx9_reg); | |
1130 | if (ret >= 0) { | |
1131 | serial_txx9_register_ports(&serial_txx9_reg); | |
1132 | ||
1133 | #ifdef ENABLE_SERIAL_TXX9_PCI | |
1134 | ret = pci_module_init(&serial_txx9_pci_driver); | |
1135 | #endif | |
1136 | } | |
1137 | return ret; | |
1138 | } | |
1139 | ||
1140 | static void __exit serial_txx9_exit(void) | |
1141 | { | |
1142 | int i; | |
1143 | ||
1144 | #ifdef ENABLE_SERIAL_TXX9_PCI | |
1145 | pci_unregister_driver(&serial_txx9_pci_driver); | |
1146 | #endif | |
1147 | for (i = 0; i < UART_NR; i++) | |
1148 | uart_remove_one_port(&serial_txx9_reg, &serial_txx9_ports[i].port); | |
1149 | ||
1150 | uart_unregister_driver(&serial_txx9_reg); | |
1151 | } | |
1152 | ||
1153 | module_init(serial_txx9_init); | |
1154 | module_exit(serial_txx9_exit); | |
1155 | ||
1156 | MODULE_LICENSE("GPL"); | |
1157 | MODULE_DESCRIPTION("TX39/49 serial driver"); | |
1158 | ||
1159 | MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR); |