Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs. |
3 | * | |
4 | * FIXME According to the usermanual the status bits in the status register | |
5 | * are only updated when the peripherals access the FIFO and not when the | |
6 | * CPU access them. So since we use this bits to know when we stop writing | |
7 | * and reading, they may not be updated in-time and a race condition may | |
8 | * exists. But I haven't be able to prove this and I don't care. But if | |
9 | * any problem arises, it might worth checking. The TX/RX FIFO Stats | |
10 | * registers should be used in addition. | |
11 | * Update: Actually, they seem updated ... At least the bits we use. | |
12 | * | |
13 | * | |
14 | * Maintainer : Sylvain Munaut <tnt@246tNt.com> | |
9b9129e7 | 15 | * |
1da177e4 LT |
16 | * Some of the code has been inspired/copied from the 2.4 code written |
17 | * by Dale Farnsworth <dfarnsworth@mvista.com>. | |
9b9129e7 | 18 | * |
b9272dfd GL |
19 | * Copyright (C) 2006 Secret Lab Technologies Ltd. |
20 | * Grant Likely <grant.likely@secretlab.ca> | |
21 | * Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com> | |
1da177e4 | 22 | * Copyright (C) 2003 MontaVista, Software, Inc. |
9b9129e7 | 23 | * |
1da177e4 LT |
24 | * This file is licensed under the terms of the GNU General Public License |
25 | * version 2. This program is licensed "as is" without any warranty of any | |
26 | * kind, whether express or implied. | |
27 | */ | |
9b9129e7 | 28 | |
1da177e4 LT |
29 | /* Platform device Usage : |
30 | * | |
31 | * Since PSCs can have multiple function, the correct driver for each one | |
32 | * is selected by calling mpc52xx_match_psc_function(...). The function | |
33 | * handled by this driver is "uart". | |
34 | * | |
35 | * The driver init all necessary registers to place the PSC in uart mode without | |
36 | * DCD. However, the pin multiplexing aren't changed and should be set either | |
37 | * by the bootloader or in the platform init code. | |
38 | * | |
406b7d4f | 39 | * The idx field must be equal to the PSC index (e.g. 0 for PSC1, 1 for PSC2, |
d62de3aa SM |
40 | * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and |
41 | * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly | |
42 | * fpr the console code : without this 1:1 mapping, at early boot time, when we | |
c30fe7f7 | 43 | * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it |
d62de3aa | 44 | * will be mapped to. |
1da177e4 LT |
45 | */ |
46 | ||
b9272dfd GL |
47 | /* OF Platform device Usage : |
48 | * | |
49 | * This driver is only used for PSCs configured in uart mode. The device | |
50 | * tree will have a node for each PSC in uart mode w/ device_type = "serial" | |
51 | * and "mpc52xx-psc-uart" in the compatible string | |
52 | * | |
53 | * By default, PSC devices are enumerated in the order they are found. However | |
54 | * a particular PSC number can be forces by adding 'device_no = <port#>' | |
55 | * to the device node. | |
56 | * | |
57 | * The driver init all necessary registers to place the PSC in uart mode without | |
58 | * DCD. However, the pin multiplexing aren't changed and should be set either | |
59 | * by the bootloader or in the platform init code. | |
60 | */ | |
61 | ||
62 | #undef DEBUG | |
63 | ||
64 | #include <linux/device.h> | |
1da177e4 LT |
65 | #include <linux/module.h> |
66 | #include <linux/tty.h> | |
67 | #include <linux/serial.h> | |
68 | #include <linux/sysrq.h> | |
69 | #include <linux/console.h> | |
70 | ||
406b7d4f JR |
71 | #include <linux/delay.h> |
72 | #include <linux/io.h> | |
1da177e4 | 73 | |
b9272dfd | 74 | #if defined(CONFIG_PPC_MERGE) |
283029d1 GL |
75 | #include <linux/of.h> |
76 | #include <linux/of_platform.h> | |
b9272dfd GL |
77 | #else |
78 | #include <linux/platform_device.h> | |
79 | #endif | |
80 | ||
1da177e4 LT |
81 | #include <asm/mpc52xx.h> |
82 | #include <asm/mpc52xx_psc.h> | |
83 | ||
84 | #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | |
85 | #define SUPPORT_SYSRQ | |
86 | #endif | |
87 | ||
88 | #include <linux/serial_core.h> | |
89 | ||
90 | ||
d62de3aa SM |
91 | /* We've been assigned a range on the "Low-density serial ports" major */ |
92 | #define SERIAL_PSC_MAJOR 204 | |
93 | #define SERIAL_PSC_MINOR 148 | |
94 | ||
1da177e4 LT |
95 | |
96 | #define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */ | |
97 | ||
98 | ||
99 | static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM]; | |
100 | /* Rem: - We use the read_status_mask as a shadow of | |
101 | * psc->mpc52xx_psc_imr | |
102 | * - It's important that is array is all zero on start as we | |
103 | * use it to know if it's initialized or not ! If it's not sure | |
104 | * it's cleared, then a memset(...,0,...) should be added to | |
105 | * the console_init | |
106 | */ | |
b9272dfd GL |
107 | #if defined(CONFIG_PPC_MERGE) |
108 | /* lookup table for matching device nodes to index numbers */ | |
109 | static struct device_node *mpc52xx_uart_nodes[MPC52xx_PSC_MAXNUM]; | |
110 | ||
111 | static void mpc52xx_uart_of_enumerate(void); | |
112 | #endif | |
1da177e4 LT |
113 | |
114 | #define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase)) | |
94f38948 | 115 | #define FIFO(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1)) |
1da177e4 LT |
116 | |
117 | ||
118 | /* Forward declaration of the interruption handling routine */ | |
406b7d4f | 119 | static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id); |
1da177e4 LT |
120 | |
121 | ||
122 | /* Simple macro to test if a port is console or not. This one is taken | |
123 | * for serial_core.c and maybe should be moved to serial_core.h ? */ | |
124 | #ifdef CONFIG_SERIAL_CORE_CONSOLE | |
406b7d4f JR |
125 | #define uart_console(port) \ |
126 | ((port)->cons && (port)->cons->index == (port)->line) | |
1da177e4 LT |
127 | #else |
128 | #define uart_console(port) (0) | |
129 | #endif | |
130 | ||
b9272dfd GL |
131 | #if defined(CONFIG_PPC_MERGE) |
132 | static struct of_device_id mpc52xx_uart_of_match[] = { | |
66ffbe49 GL |
133 | { .type = "serial", .compatible = "fsl,mpc5200-psc-uart", }, |
134 | { .type = "serial", .compatible = "mpc5200-psc-uart", }, /* lite5200 */ | |
135 | { .type = "serial", .compatible = "mpc5200-serial", }, /* efika */ | |
b9272dfd GL |
136 | {}, |
137 | }; | |
138 | #endif | |
139 | ||
1da177e4 LT |
140 | |
141 | /* ======================================================================== */ | |
142 | /* UART operations */ | |
143 | /* ======================================================================== */ | |
144 | ||
9b9129e7 | 145 | static unsigned int |
1da177e4 LT |
146 | mpc52xx_uart_tx_empty(struct uart_port *port) |
147 | { | |
148 | int status = in_be16(&PSC(port)->mpc52xx_psc_status); | |
149 | return (status & MPC52xx_PSC_SR_TXEMP) ? TIOCSER_TEMT : 0; | |
150 | } | |
151 | ||
9b9129e7 | 152 | static void |
1da177e4 LT |
153 | mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) |
154 | { | |
155 | /* Not implemented */ | |
156 | } | |
157 | ||
9b9129e7 | 158 | static unsigned int |
1da177e4 LT |
159 | mpc52xx_uart_get_mctrl(struct uart_port *port) |
160 | { | |
161 | /* Not implemented */ | |
162 | return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; | |
163 | } | |
164 | ||
9b9129e7 | 165 | static void |
b129a8cc | 166 | mpc52xx_uart_stop_tx(struct uart_port *port) |
1da177e4 LT |
167 | { |
168 | /* port->lock taken by caller */ | |
169 | port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY; | |
406b7d4f | 170 | out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask); |
1da177e4 LT |
171 | } |
172 | ||
9b9129e7 | 173 | static void |
b129a8cc | 174 | mpc52xx_uart_start_tx(struct uart_port *port) |
1da177e4 LT |
175 | { |
176 | /* port->lock taken by caller */ | |
177 | port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY; | |
406b7d4f | 178 | out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask); |
1da177e4 LT |
179 | } |
180 | ||
9b9129e7 | 181 | static void |
1da177e4 LT |
182 | mpc52xx_uart_send_xchar(struct uart_port *port, char ch) |
183 | { | |
184 | unsigned long flags; | |
185 | spin_lock_irqsave(&port->lock, flags); | |
9b9129e7 | 186 | |
1da177e4 LT |
187 | port->x_char = ch; |
188 | if (ch) { | |
189 | /* Make sure tx interrupts are on */ | |
190 | /* Truly necessary ??? They should be anyway */ | |
191 | port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY; | |
406b7d4f | 192 | out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask); |
1da177e4 | 193 | } |
9b9129e7 | 194 | |
1da177e4 LT |
195 | spin_unlock_irqrestore(&port->lock, flags); |
196 | } | |
197 | ||
198 | static void | |
199 | mpc52xx_uart_stop_rx(struct uart_port *port) | |
200 | { | |
201 | /* port->lock taken by caller */ | |
202 | port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY; | |
406b7d4f | 203 | out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask); |
1da177e4 LT |
204 | } |
205 | ||
206 | static void | |
207 | mpc52xx_uart_enable_ms(struct uart_port *port) | |
208 | { | |
209 | /* Not implemented */ | |
210 | } | |
211 | ||
212 | static void | |
213 | mpc52xx_uart_break_ctl(struct uart_port *port, int ctl) | |
214 | { | |
215 | unsigned long flags; | |
216 | spin_lock_irqsave(&port->lock, flags); | |
217 | ||
406b7d4f JR |
218 | if (ctl == -1) |
219 | out_8(&PSC(port)->command, MPC52xx_PSC_START_BRK); | |
1da177e4 | 220 | else |
406b7d4f | 221 | out_8(&PSC(port)->command, MPC52xx_PSC_STOP_BRK); |
9b9129e7 | 222 | |
1da177e4 LT |
223 | spin_unlock_irqrestore(&port->lock, flags); |
224 | } | |
225 | ||
226 | static int | |
227 | mpc52xx_uart_startup(struct uart_port *port) | |
228 | { | |
229 | struct mpc52xx_psc __iomem *psc = PSC(port); | |
94f38948 | 230 | struct mpc52xx_psc_fifo __iomem *fifo = FIFO(port); |
1da177e4 LT |
231 | int ret; |
232 | ||
233 | /* Request IRQ */ | |
234 | ret = request_irq(port->irq, mpc52xx_uart_int, | |
40663cc7 | 235 | IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "mpc52xx_psc_uart", port); |
1da177e4 LT |
236 | if (ret) |
237 | return ret; | |
238 | ||
239 | /* Reset/activate the port, clear and enable interrupts */ | |
406b7d4f JR |
240 | out_8(&psc->command, MPC52xx_PSC_RST_RX); |
241 | out_8(&psc->command, MPC52xx_PSC_RST_TX); | |
9b9129e7 | 242 | |
406b7d4f | 243 | out_be32(&psc->sicr, 0); /* UART mode DCD ignored */ |
1da177e4 LT |
244 | |
245 | out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); /* /16 prescaler on */ | |
9b9129e7 | 246 | |
94f38948 JR |
247 | out_8(&fifo->rfcntl, 0x00); |
248 | out_be16(&fifo->rfalarm, 0x1ff); | |
249 | out_8(&fifo->tfcntl, 0x07); | |
250 | out_be16(&fifo->tfalarm, 0x80); | |
1da177e4 LT |
251 | |
252 | port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY; | |
406b7d4f | 253 | out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask); |
9b9129e7 | 254 | |
406b7d4f JR |
255 | out_8(&psc->command, MPC52xx_PSC_TX_ENABLE); |
256 | out_8(&psc->command, MPC52xx_PSC_RX_ENABLE); | |
9b9129e7 | 257 | |
1da177e4 LT |
258 | return 0; |
259 | } | |
260 | ||
261 | static void | |
262 | mpc52xx_uart_shutdown(struct uart_port *port) | |
263 | { | |
264 | struct mpc52xx_psc __iomem *psc = PSC(port); | |
9b9129e7 | 265 | |
a3481197 | 266 | /* Shut down the port. Leave TX active if on a console port */ |
406b7d4f | 267 | out_8(&psc->command, MPC52xx_PSC_RST_RX); |
a3481197 | 268 | if (!uart_console(port)) |
406b7d4f | 269 | out_8(&psc->command, MPC52xx_PSC_RST_TX); |
9b9129e7 GL |
270 | |
271 | port->read_status_mask = 0; | |
406b7d4f | 272 | out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask); |
1da177e4 LT |
273 | |
274 | /* Release interrupt */ | |
275 | free_irq(port->irq, port); | |
276 | } | |
277 | ||
9b9129e7 | 278 | static void |
606d099c | 279 | mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new, |
406b7d4f | 280 | struct ktermios *old) |
1da177e4 LT |
281 | { |
282 | struct mpc52xx_psc __iomem *psc = PSC(port); | |
283 | unsigned long flags; | |
284 | unsigned char mr1, mr2; | |
285 | unsigned short ctr; | |
286 | unsigned int j, baud, quot; | |
9b9129e7 | 287 | |
1da177e4 LT |
288 | /* Prepare what we're gonna write */ |
289 | mr1 = 0; | |
9b9129e7 | 290 | |
1da177e4 | 291 | switch (new->c_cflag & CSIZE) { |
406b7d4f JR |
292 | case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS; |
293 | break; | |
294 | case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS; | |
295 | break; | |
296 | case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS; | |
297 | break; | |
298 | case CS8: | |
299 | default: mr1 |= MPC52xx_PSC_MODE_8_BITS; | |
1da177e4 LT |
300 | } |
301 | ||
302 | if (new->c_cflag & PARENB) { | |
303 | mr1 |= (new->c_cflag & PARODD) ? | |
304 | MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN; | |
305 | } else | |
306 | mr1 |= MPC52xx_PSC_MODE_PARNONE; | |
9b9129e7 GL |
307 | |
308 | ||
1da177e4 LT |
309 | mr2 = 0; |
310 | ||
311 | if (new->c_cflag & CSTOPB) | |
312 | mr2 |= MPC52xx_PSC_MODE_TWO_STOP; | |
313 | else | |
314 | mr2 |= ((new->c_cflag & CSIZE) == CS5) ? | |
315 | MPC52xx_PSC_MODE_ONE_STOP_5_BITS : | |
316 | MPC52xx_PSC_MODE_ONE_STOP; | |
317 | ||
318 | ||
319 | baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16); | |
320 | quot = uart_get_divisor(port, baud); | |
321 | ctr = quot & 0xffff; | |
9b9129e7 | 322 | |
1da177e4 LT |
323 | /* Get the lock */ |
324 | spin_lock_irqsave(&port->lock, flags); | |
325 | ||
326 | /* Update the per-port timeout */ | |
327 | uart_update_timeout(port, new->c_cflag, baud); | |
328 | ||
329 | /* Do our best to flush TX & RX, so we don't loose anything */ | |
330 | /* But we don't wait indefinitly ! */ | |
331 | j = 5000000; /* Maximum wait */ | |
332 | /* FIXME Can't receive chars since set_termios might be called at early | |
333 | * boot for the console, all stuff is not yet ready to receive at that | |
334 | * time and that just makes the kernel oops */ | |
335 | /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */ | |
9b9129e7 | 336 | while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) && |
1da177e4 LT |
337 | --j) |
338 | udelay(1); | |
339 | ||
340 | if (!j) | |
406b7d4f | 341 | printk(KERN_ERR "mpc52xx_uart.c: " |
1da177e4 | 342 | "Unable to flush RX & TX fifos in-time in set_termios." |
406b7d4f | 343 | "Some chars may have been lost.\n"); |
1da177e4 LT |
344 | |
345 | /* Reset the TX & RX */ | |
406b7d4f JR |
346 | out_8(&psc->command, MPC52xx_PSC_RST_RX); |
347 | out_8(&psc->command, MPC52xx_PSC_RST_TX); | |
1da177e4 LT |
348 | |
349 | /* Send new mode settings */ | |
406b7d4f JR |
350 | out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1); |
351 | out_8(&psc->mode, mr1); | |
352 | out_8(&psc->mode, mr2); | |
353 | out_8(&psc->ctur, ctr >> 8); | |
354 | out_8(&psc->ctlr, ctr & 0xff); | |
9b9129e7 | 355 | |
1da177e4 | 356 | /* Reenable TX & RX */ |
406b7d4f JR |
357 | out_8(&psc->command, MPC52xx_PSC_TX_ENABLE); |
358 | out_8(&psc->command, MPC52xx_PSC_RX_ENABLE); | |
1da177e4 LT |
359 | |
360 | /* We're all set, release the lock */ | |
361 | spin_unlock_irqrestore(&port->lock, flags); | |
362 | } | |
363 | ||
364 | static const char * | |
365 | mpc52xx_uart_type(struct uart_port *port) | |
366 | { | |
367 | return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL; | |
368 | } | |
369 | ||
370 | static void | |
371 | mpc52xx_uart_release_port(struct uart_port *port) | |
372 | { | |
406b7d4f JR |
373 | /* remapped by us ? */ |
374 | if (port->flags & UPF_IOREMAP) { | |
1da177e4 LT |
375 | iounmap(port->membase); |
376 | port->membase = NULL; | |
377 | } | |
378 | ||
b9272dfd | 379 | release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc)); |
1da177e4 LT |
380 | } |
381 | ||
382 | static int | |
383 | mpc52xx_uart_request_port(struct uart_port *port) | |
384 | { | |
be618f55 AL |
385 | int err; |
386 | ||
1da177e4 | 387 | if (port->flags & UPF_IOREMAP) /* Need to remap ? */ |
b9272dfd | 388 | port->membase = ioremap(port->mapbase, |
406b7d4f | 389 | sizeof(struct mpc52xx_psc)); |
1da177e4 LT |
390 | |
391 | if (!port->membase) | |
392 | return -EINVAL; | |
393 | ||
b9272dfd | 394 | err = request_mem_region(port->mapbase, sizeof(struct mpc52xx_psc), |
1da177e4 | 395 | "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY; |
be618f55 AL |
396 | |
397 | if (err && (port->flags & UPF_IOREMAP)) { | |
398 | iounmap(port->membase); | |
399 | port->membase = NULL; | |
400 | } | |
401 | ||
402 | return err; | |
1da177e4 LT |
403 | } |
404 | ||
405 | static void | |
406 | mpc52xx_uart_config_port(struct uart_port *port, int flags) | |
407 | { | |
406b7d4f JR |
408 | if ((flags & UART_CONFIG_TYPE) |
409 | && (mpc52xx_uart_request_port(port) == 0)) | |
410 | port->type = PORT_MPC52xx; | |
1da177e4 LT |
411 | } |
412 | ||
413 | static int | |
414 | mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser) | |
415 | { | |
406b7d4f | 416 | if (ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx) |
1da177e4 LT |
417 | return -EINVAL; |
418 | ||
406b7d4f JR |
419 | if ((ser->irq != port->irq) || |
420 | (ser->io_type != SERIAL_IO_MEM) || | |
421 | (ser->baud_base != port->uartclk) || | |
422 | (ser->iomem_base != (void *)port->mapbase) || | |
423 | (ser->hub6 != 0)) | |
1da177e4 LT |
424 | return -EINVAL; |
425 | ||
426 | return 0; | |
427 | } | |
428 | ||
429 | ||
430 | static struct uart_ops mpc52xx_uart_ops = { | |
431 | .tx_empty = mpc52xx_uart_tx_empty, | |
432 | .set_mctrl = mpc52xx_uart_set_mctrl, | |
433 | .get_mctrl = mpc52xx_uart_get_mctrl, | |
434 | .stop_tx = mpc52xx_uart_stop_tx, | |
435 | .start_tx = mpc52xx_uart_start_tx, | |
436 | .send_xchar = mpc52xx_uart_send_xchar, | |
437 | .stop_rx = mpc52xx_uart_stop_rx, | |
438 | .enable_ms = mpc52xx_uart_enable_ms, | |
439 | .break_ctl = mpc52xx_uart_break_ctl, | |
440 | .startup = mpc52xx_uart_startup, | |
441 | .shutdown = mpc52xx_uart_shutdown, | |
442 | .set_termios = mpc52xx_uart_set_termios, | |
443 | /* .pm = mpc52xx_uart_pm, Not supported yet */ | |
444 | /* .set_wake = mpc52xx_uart_set_wake, Not supported yet */ | |
445 | .type = mpc52xx_uart_type, | |
446 | .release_port = mpc52xx_uart_release_port, | |
447 | .request_port = mpc52xx_uart_request_port, | |
448 | .config_port = mpc52xx_uart_config_port, | |
449 | .verify_port = mpc52xx_uart_verify_port | |
450 | }; | |
451 | ||
9b9129e7 | 452 | |
1da177e4 LT |
453 | /* ======================================================================== */ |
454 | /* Interrupt handling */ | |
455 | /* ======================================================================== */ | |
9b9129e7 | 456 | |
1da177e4 | 457 | static inline int |
7d12e780 | 458 | mpc52xx_uart_int_rx_chars(struct uart_port *port) |
1da177e4 LT |
459 | { |
460 | struct tty_struct *tty = port->info->tty; | |
33f0f88f | 461 | unsigned char ch, flag; |
1da177e4 LT |
462 | unsigned short status; |
463 | ||
464 | /* While we can read, do so ! */ | |
406b7d4f JR |
465 | while ((status = in_be16(&PSC(port)->mpc52xx_psc_status)) & |
466 | MPC52xx_PSC_SR_RXRDY) { | |
1da177e4 | 467 | |
1da177e4 LT |
468 | /* Get the char */ |
469 | ch = in_8(&PSC(port)->mpc52xx_psc_buffer_8); | |
470 | ||
471 | /* Handle sysreq char */ | |
472 | #ifdef SUPPORT_SYSRQ | |
7d12e780 | 473 | if (uart_handle_sysrq_char(port, ch)) { |
1da177e4 LT |
474 | port->sysrq = 0; |
475 | continue; | |
476 | } | |
477 | #endif | |
478 | ||
479 | /* Store it */ | |
33f0f88f AC |
480 | |
481 | flag = TTY_NORMAL; | |
1da177e4 | 482 | port->icount.rx++; |
9b9129e7 | 483 | |
406b7d4f JR |
484 | if (status & (MPC52xx_PSC_SR_PE | |
485 | MPC52xx_PSC_SR_FE | | |
486 | MPC52xx_PSC_SR_RB)) { | |
9b9129e7 | 487 | |
1da177e4 | 488 | if (status & MPC52xx_PSC_SR_RB) { |
33f0f88f | 489 | flag = TTY_BREAK; |
1da177e4 LT |
490 | uart_handle_break(port); |
491 | } else if (status & MPC52xx_PSC_SR_PE) | |
33f0f88f | 492 | flag = TTY_PARITY; |
1da177e4 | 493 | else if (status & MPC52xx_PSC_SR_FE) |
33f0f88f | 494 | flag = TTY_FRAME; |
1da177e4 LT |
495 | |
496 | /* Clear error condition */ | |
406b7d4f | 497 | out_8(&PSC(port)->command, MPC52xx_PSC_RST_ERR_STAT); |
1da177e4 LT |
498 | |
499 | } | |
33f0f88f AC |
500 | tty_insert_flip_char(tty, ch, flag); |
501 | if (status & MPC52xx_PSC_SR_OE) { | |
502 | /* | |
503 | * Overrun is special, since it's | |
504 | * reported immediately, and doesn't | |
505 | * affect the current character | |
506 | */ | |
507 | tty_insert_flip_char(tty, 0, TTY_OVERRUN); | |
508 | } | |
1da177e4 LT |
509 | } |
510 | ||
511 | tty_flip_buffer_push(tty); | |
9b9129e7 | 512 | |
1da177e4 LT |
513 | return in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_RXRDY; |
514 | } | |
515 | ||
516 | static inline int | |
517 | mpc52xx_uart_int_tx_chars(struct uart_port *port) | |
518 | { | |
519 | struct circ_buf *xmit = &port->info->xmit; | |
520 | ||
521 | /* Process out of band chars */ | |
522 | if (port->x_char) { | |
523 | out_8(&PSC(port)->mpc52xx_psc_buffer_8, port->x_char); | |
524 | port->icount.tx++; | |
525 | port->x_char = 0; | |
526 | return 1; | |
527 | } | |
528 | ||
529 | /* Nothing to do ? */ | |
530 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | |
b129a8cc | 531 | mpc52xx_uart_stop_tx(port); |
1da177e4 LT |
532 | return 0; |
533 | } | |
534 | ||
535 | /* Send chars */ | |
536 | while (in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXRDY) { | |
537 | out_8(&PSC(port)->mpc52xx_psc_buffer_8, xmit->buf[xmit->tail]); | |
538 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
539 | port->icount.tx++; | |
540 | if (uart_circ_empty(xmit)) | |
541 | break; | |
542 | } | |
543 | ||
544 | /* Wake up */ | |
545 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
546 | uart_write_wakeup(port); | |
547 | ||
548 | /* Maybe we're done after all */ | |
549 | if (uart_circ_empty(xmit)) { | |
b129a8cc | 550 | mpc52xx_uart_stop_tx(port); |
1da177e4 LT |
551 | return 0; |
552 | } | |
553 | ||
554 | return 1; | |
555 | } | |
556 | ||
9b9129e7 | 557 | static irqreturn_t |
7d12e780 | 558 | mpc52xx_uart_int(int irq, void *dev_id) |
1da177e4 | 559 | { |
c7bec5ab | 560 | struct uart_port *port = dev_id; |
1da177e4 LT |
561 | unsigned long pass = ISR_PASS_LIMIT; |
562 | unsigned int keepgoing; | |
563 | unsigned short status; | |
9b9129e7 | 564 | |
1da177e4 | 565 | spin_lock(&port->lock); |
9b9129e7 | 566 | |
1da177e4 LT |
567 | /* While we have stuff to do, we continue */ |
568 | do { | |
569 | /* If we don't find anything to do, we stop */ | |
9b9129e7 GL |
570 | keepgoing = 0; |
571 | ||
1da177e4 LT |
572 | /* Read status */ |
573 | status = in_be16(&PSC(port)->mpc52xx_psc_isr); | |
574 | status &= port->read_status_mask; | |
9b9129e7 | 575 | |
1da177e4 LT |
576 | /* Do we need to receive chars ? */ |
577 | /* For this RX interrupts must be on and some chars waiting */ | |
406b7d4f | 578 | if (status & MPC52xx_PSC_IMR_RXRDY) |
7d12e780 | 579 | keepgoing |= mpc52xx_uart_int_rx_chars(port); |
1da177e4 LT |
580 | |
581 | /* Do we need to send chars ? */ | |
582 | /* For this, TX must be ready and TX interrupt enabled */ | |
406b7d4f | 583 | if (status & MPC52xx_PSC_IMR_TXRDY) |
1da177e4 | 584 | keepgoing |= mpc52xx_uart_int_tx_chars(port); |
9b9129e7 | 585 | |
1da177e4 | 586 | /* Limit number of iteration */ |
406b7d4f | 587 | if (!(--pass)) |
1da177e4 LT |
588 | keepgoing = 0; |
589 | ||
590 | } while (keepgoing); | |
9b9129e7 | 591 | |
1da177e4 | 592 | spin_unlock(&port->lock); |
9b9129e7 | 593 | |
1da177e4 LT |
594 | return IRQ_HANDLED; |
595 | } | |
596 | ||
597 | ||
598 | /* ======================================================================== */ | |
599 | /* Console ( if applicable ) */ | |
600 | /* ======================================================================== */ | |
601 | ||
602 | #ifdef CONFIG_SERIAL_MPC52xx_CONSOLE | |
603 | ||
604 | static void __init | |
605 | mpc52xx_console_get_options(struct uart_port *port, | |
406b7d4f | 606 | int *baud, int *parity, int *bits, int *flow) |
1da177e4 LT |
607 | { |
608 | struct mpc52xx_psc __iomem *psc = PSC(port); | |
609 | unsigned char mr1; | |
610 | ||
b9272dfd GL |
611 | pr_debug("mpc52xx_console_get_options(port=%p)\n", port); |
612 | ||
1da177e4 | 613 | /* Read the mode registers */ |
406b7d4f | 614 | out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1); |
1da177e4 | 615 | mr1 = in_8(&psc->mode); |
9b9129e7 | 616 | |
1da177e4 | 617 | /* CT{U,L}R are write-only ! */ |
b9272dfd GL |
618 | *baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD; |
619 | #if !defined(CONFIG_PPC_MERGE) | |
620 | if (__res.bi_baudrate) | |
621 | *baud = __res.bi_baudrate; | |
622 | #endif | |
1da177e4 LT |
623 | |
624 | /* Parse them */ | |
625 | switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) { | |
406b7d4f JR |
626 | case MPC52xx_PSC_MODE_5_BITS: |
627 | *bits = 5; | |
628 | break; | |
629 | case MPC52xx_PSC_MODE_6_BITS: | |
630 | *bits = 6; | |
631 | break; | |
632 | case MPC52xx_PSC_MODE_7_BITS: | |
633 | *bits = 7; | |
634 | break; | |
635 | case MPC52xx_PSC_MODE_8_BITS: | |
636 | default: | |
637 | *bits = 8; | |
1da177e4 | 638 | } |
9b9129e7 | 639 | |
1da177e4 LT |
640 | if (mr1 & MPC52xx_PSC_MODE_PARNONE) |
641 | *parity = 'n'; | |
642 | else | |
643 | *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e'; | |
644 | } | |
645 | ||
9b9129e7 | 646 | static void |
1da177e4 LT |
647 | mpc52xx_console_write(struct console *co, const char *s, unsigned int count) |
648 | { | |
649 | struct uart_port *port = &mpc52xx_uart_ports[co->index]; | |
650 | struct mpc52xx_psc __iomem *psc = PSC(port); | |
651 | unsigned int i, j; | |
9b9129e7 | 652 | |
1da177e4 LT |
653 | /* Disable interrupts */ |
654 | out_be16(&psc->mpc52xx_psc_imr, 0); | |
655 | ||
656 | /* Wait the TX buffer to be empty */ | |
9b9129e7 GL |
657 | j = 5000000; /* Maximum wait */ |
658 | while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) && | |
1da177e4 LT |
659 | --j) |
660 | udelay(1); | |
661 | ||
662 | /* Write all the chars */ | |
d358788f | 663 | for (i = 0; i < count; i++, s++) { |
1da177e4 | 664 | /* Line return handling */ |
d358788f | 665 | if (*s == '\n') |
1da177e4 | 666 | out_8(&psc->mpc52xx_psc_buffer_8, '\r'); |
9b9129e7 | 667 | |
d358788f RK |
668 | /* Send the char */ |
669 | out_8(&psc->mpc52xx_psc_buffer_8, *s); | |
670 | ||
1da177e4 | 671 | /* Wait the TX buffer to be empty */ |
9b9129e7 GL |
672 | j = 20000; /* Maximum wait */ |
673 | while (!(in_be16(&psc->mpc52xx_psc_status) & | |
406b7d4f | 674 | MPC52xx_PSC_SR_TXEMP) && --j) |
1da177e4 LT |
675 | udelay(1); |
676 | } | |
677 | ||
678 | /* Restore interrupt state */ | |
679 | out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask); | |
680 | } | |
681 | ||
b9272dfd | 682 | #if !defined(CONFIG_PPC_MERGE) |
1da177e4 LT |
683 | static int __init |
684 | mpc52xx_console_setup(struct console *co, char *options) | |
685 | { | |
686 | struct uart_port *port = &mpc52xx_uart_ports[co->index]; | |
687 | ||
688 | int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD; | |
689 | int bits = 8; | |
690 | int parity = 'n'; | |
691 | int flow = 'n'; | |
692 | ||
693 | if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM) | |
694 | return -EINVAL; | |
9b9129e7 | 695 | |
1da177e4 LT |
696 | /* Basic port init. Needed since we use some uart_??? func before |
697 | * real init for early access */ | |
698 | spin_lock_init(&port->lock); | |
699 | port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */ | |
700 | port->ops = &mpc52xx_uart_ops; | |
701 | port->mapbase = MPC52xx_PA(MPC52xx_PSCx_OFFSET(co->index+1)); | |
702 | ||
703 | /* We ioremap ourself */ | |
704 | port->membase = ioremap(port->mapbase, MPC52xx_PSC_SIZE); | |
705 | if (port->membase == NULL) | |
706 | return -EINVAL; | |
707 | ||
708 | /* Setup the port parameters accoding to options */ | |
709 | if (options) | |
710 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
711 | else | |
712 | mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow); | |
713 | ||
714 | return uart_set_options(port, co, baud, parity, bits, flow); | |
715 | } | |
716 | ||
b9272dfd GL |
717 | #else |
718 | ||
719 | static int __init | |
720 | mpc52xx_console_setup(struct console *co, char *options) | |
721 | { | |
722 | struct uart_port *port = &mpc52xx_uart_ports[co->index]; | |
723 | struct device_node *np = mpc52xx_uart_nodes[co->index]; | |
724 | unsigned int ipb_freq; | |
725 | struct resource res; | |
726 | int ret; | |
727 | ||
728 | int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD; | |
729 | int bits = 8; | |
730 | int parity = 'n'; | |
731 | int flow = 'n'; | |
732 | ||
733 | pr_debug("mpc52xx_console_setup co=%p, co->index=%i, options=%s\n", | |
734 | co, co->index, options); | |
735 | ||
736 | if ((co->index < 0) || (co->index > MPC52xx_PSC_MAXNUM)) { | |
737 | pr_debug("PSC%x out of range\n", co->index); | |
738 | return -EINVAL; | |
739 | } | |
740 | ||
741 | if (!np) { | |
742 | pr_debug("PSC%x not found in device tree\n", co->index); | |
743 | return -EINVAL; | |
744 | } | |
745 | ||
746 | pr_debug("Console on ttyPSC%x is %s\n", | |
406b7d4f | 747 | co->index, mpc52xx_uart_nodes[co->index]->full_name); |
b9272dfd GL |
748 | |
749 | /* Fetch register locations */ | |
406b7d4f JR |
750 | ret = of_address_to_resource(np, 0, &res); |
751 | if (ret) { | |
b9272dfd GL |
752 | pr_debug("Could not get resources for PSC%x\n", co->index); |
753 | return ret; | |
754 | } | |
755 | ||
756 | /* Search for bus-frequency property in this node or a parent */ | |
406b7d4f JR |
757 | ipb_freq = mpc52xx_find_ipb_freq(np); |
758 | if (ipb_freq == 0) { | |
b9272dfd GL |
759 | pr_debug("Could not find IPB bus frequency!\n"); |
760 | return -EINVAL; | |
761 | } | |
762 | ||
763 | /* Basic port init. Needed since we use some uart_??? func before | |
764 | * real init for early access */ | |
765 | spin_lock_init(&port->lock); | |
766 | port->uartclk = ipb_freq / 2; | |
767 | port->ops = &mpc52xx_uart_ops; | |
768 | port->mapbase = res.start; | |
769 | port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc)); | |
770 | port->irq = irq_of_parse_and_map(np, 0); | |
771 | ||
772 | if (port->membase == NULL) | |
773 | return -EINVAL; | |
774 | ||
5dd80d5d | 775 | pr_debug("mpc52xx-psc uart at %p, mapped to %p, irq=%x, freq=%i\n", |
406b7d4f JR |
776 | (void *)port->mapbase, port->membase, |
777 | port->irq, port->uartclk); | |
b9272dfd GL |
778 | |
779 | /* Setup the port parameters accoding to options */ | |
780 | if (options) | |
781 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
782 | else | |
783 | mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow); | |
784 | ||
785 | pr_debug("Setting console parameters: %i %i%c1 flow=%c\n", | |
406b7d4f | 786 | baud, bits, parity, flow); |
b9272dfd GL |
787 | |
788 | return uart_set_options(port, co, baud, parity, bits, flow); | |
789 | } | |
790 | #endif /* defined(CONFIG_PPC_MERGE) */ | |
791 | ||
1da177e4 | 792 | |
2d8179c0 | 793 | static struct uart_driver mpc52xx_uart_driver; |
1da177e4 LT |
794 | |
795 | static struct console mpc52xx_console = { | |
d62de3aa | 796 | .name = "ttyPSC", |
1da177e4 LT |
797 | .write = mpc52xx_console_write, |
798 | .device = uart_console_device, | |
799 | .setup = mpc52xx_console_setup, | |
800 | .flags = CON_PRINTBUFFER, | |
406b7d4f | 801 | .index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0) */ |
1da177e4 LT |
802 | .data = &mpc52xx_uart_driver, |
803 | }; | |
804 | ||
9b9129e7 GL |
805 | |
806 | static int __init | |
1da177e4 LT |
807 | mpc52xx_console_init(void) |
808 | { | |
c98750c2 | 809 | #if defined(CONFIG_PPC_MERGE) |
b9272dfd | 810 | mpc52xx_uart_of_enumerate(); |
c98750c2 | 811 | #endif |
1da177e4 LT |
812 | register_console(&mpc52xx_console); |
813 | return 0; | |
814 | } | |
815 | ||
816 | console_initcall(mpc52xx_console_init); | |
817 | ||
818 | #define MPC52xx_PSC_CONSOLE &mpc52xx_console | |
819 | #else | |
820 | #define MPC52xx_PSC_CONSOLE NULL | |
821 | #endif | |
822 | ||
823 | ||
824 | /* ======================================================================== */ | |
825 | /* UART Driver */ | |
826 | /* ======================================================================== */ | |
827 | ||
828 | static struct uart_driver mpc52xx_uart_driver = { | |
1da177e4 | 829 | .driver_name = "mpc52xx_psc_uart", |
d62de3aa | 830 | .dev_name = "ttyPSC", |
d62de3aa SM |
831 | .major = SERIAL_PSC_MAJOR, |
832 | .minor = SERIAL_PSC_MINOR, | |
1da177e4 LT |
833 | .nr = MPC52xx_PSC_MAXNUM, |
834 | .cons = MPC52xx_PSC_CONSOLE, | |
835 | }; | |
836 | ||
837 | ||
b9272dfd | 838 | #if !defined(CONFIG_PPC_MERGE) |
1da177e4 LT |
839 | /* ======================================================================== */ |
840 | /* Platform Driver */ | |
841 | /* ======================================================================== */ | |
842 | ||
843 | static int __devinit | |
3ae5eaec | 844 | mpc52xx_uart_probe(struct platform_device *dev) |
1da177e4 | 845 | { |
3ae5eaec | 846 | struct resource *res = dev->resource; |
1da177e4 LT |
847 | |
848 | struct uart_port *port = NULL; | |
849 | int i, idx, ret; | |
850 | ||
851 | /* Check validity & presence */ | |
38801e2e | 852 | idx = dev->id; |
1da177e4 LT |
853 | if (idx < 0 || idx >= MPC52xx_PSC_MAXNUM) |
854 | return -EINVAL; | |
855 | ||
406b7d4f | 856 | if (!mpc52xx_match_psc_function(idx, "uart")) |
1da177e4 LT |
857 | return -ENODEV; |
858 | ||
859 | /* Init the port structure */ | |
860 | port = &mpc52xx_uart_ports[idx]; | |
861 | ||
1da177e4 LT |
862 | spin_lock_init(&port->lock); |
863 | port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */ | |
947deee8 | 864 | port->fifosize = 512; |
1da177e4 LT |
865 | port->iotype = UPIO_MEM; |
866 | port->flags = UPF_BOOT_AUTOCONF | | |
406b7d4f | 867 | (uart_console(port) ? 0 : UPF_IOREMAP); |
1da177e4 LT |
868 | port->line = idx; |
869 | port->ops = &mpc52xx_uart_ops; | |
b9272dfd | 870 | port->dev = &dev->dev; |
1da177e4 LT |
871 | |
872 | /* Search for IRQ and mapbase */ | |
406b7d4f | 873 | for (i = 0 ; i < dev->num_resources ; i++, res++) { |
1da177e4 LT |
874 | if (res->flags & IORESOURCE_MEM) |
875 | port->mapbase = res->start; | |
876 | else if (res->flags & IORESOURCE_IRQ) | |
877 | port->irq = res->start; | |
878 | } | |
879 | if (!port->irq || !port->mapbase) | |
880 | return -EINVAL; | |
881 | ||
882 | /* Add the port to the uart sub-system */ | |
883 | ret = uart_add_one_port(&mpc52xx_uart_driver, port); | |
884 | if (!ret) | |
406b7d4f | 885 | platform_set_drvdata(dev, (void *)port); |
1da177e4 LT |
886 | |
887 | return ret; | |
888 | } | |
889 | ||
890 | static int | |
3ae5eaec | 891 | mpc52xx_uart_remove(struct platform_device *dev) |
1da177e4 | 892 | { |
3ae5eaec | 893 | struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev); |
1da177e4 | 894 | |
3ae5eaec | 895 | platform_set_drvdata(dev, NULL); |
1da177e4 LT |
896 | |
897 | if (port) | |
898 | uart_remove_one_port(&mpc52xx_uart_driver, port); | |
899 | ||
900 | return 0; | |
901 | } | |
902 | ||
903 | #ifdef CONFIG_PM | |
904 | static int | |
3ae5eaec | 905 | mpc52xx_uart_suspend(struct platform_device *dev, pm_message_t state) |
1da177e4 | 906 | { |
3ae5eaec | 907 | struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev); |
1da177e4 | 908 | |
9b9129e7 | 909 | if (port) |
1da177e4 LT |
910 | uart_suspend_port(&mpc52xx_uart_driver, port); |
911 | ||
912 | return 0; | |
913 | } | |
914 | ||
915 | static int | |
3ae5eaec | 916 | mpc52xx_uart_resume(struct platform_device *dev) |
1da177e4 | 917 | { |
3ae5eaec | 918 | struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev); |
1da177e4 | 919 | |
9480e307 | 920 | if (port) |
1da177e4 LT |
921 | uart_resume_port(&mpc52xx_uart_driver, port); |
922 | ||
923 | return 0; | |
924 | } | |
925 | #endif | |
926 | ||
b9272dfd | 927 | |
3ae5eaec | 928 | static struct platform_driver mpc52xx_uart_platform_driver = { |
1da177e4 LT |
929 | .probe = mpc52xx_uart_probe, |
930 | .remove = mpc52xx_uart_remove, | |
931 | #ifdef CONFIG_PM | |
932 | .suspend = mpc52xx_uart_suspend, | |
933 | .resume = mpc52xx_uart_resume, | |
934 | #endif | |
3ae5eaec | 935 | .driver = { |
406b7d4f | 936 | .owner = THIS_MODULE, |
3ae5eaec RK |
937 | .name = "mpc52xx-psc", |
938 | }, | |
1da177e4 | 939 | }; |
b9272dfd GL |
940 | #endif /* !defined(CONFIG_PPC_MERGE) */ |
941 | ||
942 | ||
943 | #if defined(CONFIG_PPC_MERGE) | |
944 | /* ======================================================================== */ | |
945 | /* OF Platform Driver */ | |
946 | /* ======================================================================== */ | |
947 | ||
948 | static int __devinit | |
949 | mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match) | |
950 | { | |
951 | int idx = -1; | |
952 | unsigned int ipb_freq; | |
953 | struct uart_port *port = NULL; | |
954 | struct resource res; | |
955 | int ret; | |
956 | ||
957 | dev_dbg(&op->dev, "mpc52xx_uart_probe(op=%p, match=%p)\n", op, match); | |
958 | ||
959 | /* Check validity & presence */ | |
960 | for (idx = 0; idx < MPC52xx_PSC_MAXNUM; idx++) | |
961 | if (mpc52xx_uart_nodes[idx] == op->node) | |
962 | break; | |
963 | if (idx >= MPC52xx_PSC_MAXNUM) | |
964 | return -EINVAL; | |
965 | pr_debug("Found %s assigned to ttyPSC%x\n", | |
406b7d4f | 966 | mpc52xx_uart_nodes[idx]->full_name, idx); |
b9272dfd GL |
967 | |
968 | /* Search for bus-frequency property in this node or a parent */ | |
406b7d4f JR |
969 | ipb_freq = mpc52xx_find_ipb_freq(op->node); |
970 | if (ipb_freq == 0) { | |
b9272dfd GL |
971 | dev_dbg(&op->dev, "Could not find IPB bus frequency!\n"); |
972 | return -EINVAL; | |
973 | } | |
974 | ||
975 | /* Init the port structure */ | |
976 | port = &mpc52xx_uart_ports[idx]; | |
977 | ||
978 | spin_lock_init(&port->lock); | |
979 | port->uartclk = ipb_freq / 2; | |
980 | port->fifosize = 512; | |
981 | port->iotype = UPIO_MEM; | |
982 | port->flags = UPF_BOOT_AUTOCONF | | |
406b7d4f | 983 | (uart_console(port) ? 0 : UPF_IOREMAP); |
b9272dfd GL |
984 | port->line = idx; |
985 | port->ops = &mpc52xx_uart_ops; | |
986 | port->dev = &op->dev; | |
987 | ||
988 | /* Search for IRQ and mapbase */ | |
406b7d4f JR |
989 | ret = of_address_to_resource(op->node, 0, &res); |
990 | if (ret) | |
b9272dfd GL |
991 | return ret; |
992 | ||
993 | port->mapbase = res.start; | |
994 | port->irq = irq_of_parse_and_map(op->node, 0); | |
995 | ||
5dd80d5d | 996 | dev_dbg(&op->dev, "mpc52xx-psc uart at %p, irq=%x, freq=%i\n", |
406b7d4f | 997 | (void *)port->mapbase, port->irq, port->uartclk); |
b9272dfd | 998 | |
406b7d4f | 999 | if ((port->irq == NO_IRQ) || !port->mapbase) { |
b9272dfd GL |
1000 | printk(KERN_ERR "Could not allocate resources for PSC\n"); |
1001 | return -EINVAL; | |
1002 | } | |
1003 | ||
1004 | /* Add the port to the uart sub-system */ | |
1005 | ret = uart_add_one_port(&mpc52xx_uart_driver, port); | |
1006 | if (!ret) | |
406b7d4f | 1007 | dev_set_drvdata(&op->dev, (void *)port); |
b9272dfd GL |
1008 | |
1009 | return ret; | |
1010 | } | |
1011 | ||
1012 | static int | |
1013 | mpc52xx_uart_of_remove(struct of_device *op) | |
1014 | { | |
1015 | struct uart_port *port = dev_get_drvdata(&op->dev); | |
1016 | dev_set_drvdata(&op->dev, NULL); | |
1017 | ||
fc7900bb | 1018 | if (port) { |
b9272dfd | 1019 | uart_remove_one_port(&mpc52xx_uart_driver, port); |
fc7900bb SM |
1020 | irq_dispose_mapping(port->irq); |
1021 | } | |
b9272dfd GL |
1022 | |
1023 | return 0; | |
1024 | } | |
1025 | ||
1026 | #ifdef CONFIG_PM | |
1027 | static int | |
1028 | mpc52xx_uart_of_suspend(struct of_device *op, pm_message_t state) | |
1029 | { | |
1030 | struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev); | |
1031 | ||
1032 | if (port) | |
1033 | uart_suspend_port(&mpc52xx_uart_driver, port); | |
1034 | ||
1035 | return 0; | |
1036 | } | |
1037 | ||
1038 | static int | |
1039 | mpc52xx_uart_of_resume(struct of_device *op) | |
1040 | { | |
1041 | struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev); | |
1042 | ||
1043 | if (port) | |
1044 | uart_resume_port(&mpc52xx_uart_driver, port); | |
1045 | ||
1046 | return 0; | |
1047 | } | |
1048 | #endif | |
1049 | ||
1050 | static void | |
1051 | mpc52xx_uart_of_assign(struct device_node *np, int idx) | |
1052 | { | |
1053 | int free_idx = -1; | |
1054 | int i; | |
1055 | ||
1056 | /* Find the first free node */ | |
1057 | for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) { | |
1058 | if (mpc52xx_uart_nodes[i] == NULL) { | |
1059 | free_idx = i; | |
1060 | break; | |
1061 | } | |
1062 | } | |
1063 | ||
1064 | if ((idx < 0) || (idx >= MPC52xx_PSC_MAXNUM)) | |
1065 | idx = free_idx; | |
1066 | ||
1067 | if (idx < 0) | |
1068 | return; /* No free slot; abort */ | |
1069 | ||
406b7d4f | 1070 | of_node_get(np); |
b9272dfd GL |
1071 | /* If the slot is already occupied, then swap slots */ |
1072 | if (mpc52xx_uart_nodes[idx] && (free_idx != -1)) | |
1073 | mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx]; | |
af6a9aab | 1074 | mpc52xx_uart_nodes[idx] = np; |
b9272dfd GL |
1075 | } |
1076 | ||
1077 | static void | |
1078 | mpc52xx_uart_of_enumerate(void) | |
1079 | { | |
406b7d4f | 1080 | static int enum_done; |
b9272dfd GL |
1081 | struct device_node *np; |
1082 | const unsigned int *devno; | |
1083 | int i; | |
1084 | ||
1085 | if (enum_done) | |
1086 | return; | |
1087 | ||
1088 | for_each_node_by_type(np, "serial") { | |
1089 | if (!of_match_node(mpc52xx_uart_of_match, np)) | |
1090 | continue; | |
1091 | ||
1092 | /* Is a particular device number requested? */ | |
40cd3a45 | 1093 | devno = of_get_property(np, "port-number", NULL); |
406b7d4f | 1094 | mpc52xx_uart_of_assign(np, devno ? *devno : -1); |
b9272dfd GL |
1095 | } |
1096 | ||
1097 | enum_done = 1; | |
1098 | ||
1099 | for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) { | |
1100 | if (mpc52xx_uart_nodes[i]) | |
1101 | pr_debug("%s assigned to ttyPSC%x\n", | |
406b7d4f | 1102 | mpc52xx_uart_nodes[i]->full_name, i); |
b9272dfd GL |
1103 | } |
1104 | } | |
1105 | ||
1106 | MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match); | |
1107 | ||
1108 | static struct of_platform_driver mpc52xx_uart_of_driver = { | |
b9272dfd GL |
1109 | .match_table = mpc52xx_uart_of_match, |
1110 | .probe = mpc52xx_uart_of_probe, | |
1111 | .remove = mpc52xx_uart_of_remove, | |
1112 | #ifdef CONFIG_PM | |
1113 | .suspend = mpc52xx_uart_of_suspend, | |
1114 | .resume = mpc52xx_uart_of_resume, | |
1115 | #endif | |
1116 | .driver = { | |
1117 | .name = "mpc52xx-psc-uart", | |
1118 | }, | |
1119 | }; | |
1120 | #endif /* defined(CONFIG_PPC_MERGE) */ | |
1da177e4 LT |
1121 | |
1122 | ||
1123 | /* ======================================================================== */ | |
1124 | /* Module */ | |
1125 | /* ======================================================================== */ | |
1126 | ||
1127 | static int __init | |
1128 | mpc52xx_uart_init(void) | |
1129 | { | |
1130 | int ret; | |
1131 | ||
b9272dfd | 1132 | printk(KERN_INFO "Serial: MPC52xx PSC UART driver\n"); |
1da177e4 | 1133 | |
406b7d4f JR |
1134 | ret = uart_register_driver(&mpc52xx_uart_driver); |
1135 | if (ret) { | |
b9272dfd GL |
1136 | printk(KERN_ERR "%s: uart_register_driver failed (%i)\n", |
1137 | __FILE__, ret); | |
1138 | return ret; | |
1da177e4 LT |
1139 | } |
1140 | ||
b9272dfd GL |
1141 | #if defined(CONFIG_PPC_MERGE) |
1142 | mpc52xx_uart_of_enumerate(); | |
1143 | ||
1144 | ret = of_register_platform_driver(&mpc52xx_uart_of_driver); | |
1145 | if (ret) { | |
1146 | printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n", | |
1147 | __FILE__, ret); | |
1148 | uart_unregister_driver(&mpc52xx_uart_driver); | |
1149 | return ret; | |
1150 | } | |
1151 | #else | |
1152 | ret = platform_driver_register(&mpc52xx_uart_platform_driver); | |
1153 | if (ret) { | |
1154 | printk(KERN_ERR "%s: platform_driver_register failed (%i)\n", | |
1155 | __FILE__, ret); | |
1156 | uart_unregister_driver(&mpc52xx_uart_driver); | |
1157 | return ret; | |
1158 | } | |
1159 | #endif | |
1160 | ||
1161 | return 0; | |
1da177e4 LT |
1162 | } |
1163 | ||
1164 | static void __exit | |
1165 | mpc52xx_uart_exit(void) | |
1166 | { | |
b9272dfd GL |
1167 | #if defined(CONFIG_PPC_MERGE) |
1168 | of_unregister_platform_driver(&mpc52xx_uart_of_driver); | |
1169 | #else | |
3ae5eaec | 1170 | platform_driver_unregister(&mpc52xx_uart_platform_driver); |
b9272dfd | 1171 | #endif |
1da177e4 LT |
1172 | uart_unregister_driver(&mpc52xx_uart_driver); |
1173 | } | |
1174 | ||
1175 | ||
1176 | module_init(mpc52xx_uart_init); | |
1177 | module_exit(mpc52xx_uart_exit); | |
1178 | ||
1179 | MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>"); | |
1180 | MODULE_DESCRIPTION("Freescale MPC52xx PSC UART"); | |
1181 | MODULE_LICENSE("GPL"); |