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1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 2005 Silicon Graphics, Inc. All Rights Reserved. | |
7 | */ | |
8 | ||
9 | /* | |
10 | * This file contains a module version of the ioc3 serial driver. This | |
11 | * includes all the support functions needed (support functions, etc.) | |
12 | * and the serial driver itself. | |
13 | */ | |
14 | #include <linux/errno.h> | |
15 | #include <linux/tty.h> | |
16 | #include <linux/serial.h> | |
17 | #include <linux/circ_buf.h> | |
18 | #include <linux/serial_reg.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/pci.h> | |
21 | #include <linux/serial_core.h> | |
22 | #include <linux/ioc3.h> | |
23 | ||
24 | /* | |
25 | * Interesting things about the ioc3 | |
26 | */ | |
27 | ||
28 | #define LOGICAL_PORTS 2 /* rs232(0) and rs422(1) */ | |
29 | #define PORTS_PER_CARD 2 | |
30 | #define LOGICAL_PORTS_PER_CARD (PORTS_PER_CARD * LOGICAL_PORTS) | |
31 | #define MAX_CARDS 8 | |
32 | #define MAX_LOGICAL_PORTS (LOGICAL_PORTS_PER_CARD * MAX_CARDS) | |
33 | ||
34 | /* determine given the sio_ir what port it applies to */ | |
35 | #define GET_PORT_FROM_SIO_IR(_x) (_x & SIO_IR_SA) ? 0 : 1 | |
36 | ||
37 | ||
38 | /* | |
39 | * we have 2 logical ports (rs232, rs422) for each physical port | |
40 | * evens are rs232, odds are rs422 | |
41 | */ | |
42 | #define GET_PHYSICAL_PORT(_x) ((_x) >> 1) | |
43 | #define GET_LOGICAL_PORT(_x) ((_x) & 1) | |
44 | #define IS_PHYSICAL_PORT(_x) !((_x) & 1) | |
45 | #define IS_RS232(_x) !((_x) & 1) | |
46 | ||
47 | static unsigned int Num_of_ioc3_cards; | |
48 | static unsigned int Submodule_slot; | |
49 | ||
50 | /* defining this will get you LOTS of great debug info */ | |
51 | //#define DEBUG_INTERRUPTS | |
52 | #define DPRINT_CONFIG(_x...) ; | |
53 | //#define DPRINT_CONFIG(_x...) printk _x | |
54 | #define NOT_PROGRESS() ; | |
55 | //#define NOT_PROGRESS() printk("%s : fails %d\n", __FUNCTION__, __LINE__) | |
56 | ||
57 | /* number of characters we want to transmit to the lower level at a time */ | |
58 | #define MAX_CHARS 256 | |
59 | #define FIFO_SIZE (MAX_CHARS-1) /* it's a uchar */ | |
60 | ||
61 | /* Device name we're using */ | |
62 | #define DEVICE_NAME "ttySIOC" | |
63 | #define DEVICE_MAJOR 204 | |
64 | #define DEVICE_MINOR 116 | |
65 | ||
66 | /* flags for next_char_state */ | |
67 | #define NCS_BREAK 0x1 | |
68 | #define NCS_PARITY 0x2 | |
69 | #define NCS_FRAMING 0x4 | |
70 | #define NCS_OVERRUN 0x8 | |
71 | ||
72 | /* cause we need SOME parameters ... */ | |
73 | #define MIN_BAUD_SUPPORTED 1200 | |
74 | #define MAX_BAUD_SUPPORTED 115200 | |
75 | ||
76 | /* protocol types supported */ | |
77 | #define PROTO_RS232 0 | |
78 | #define PROTO_RS422 1 | |
79 | ||
80 | /* Notification types */ | |
81 | #define N_DATA_READY 0x01 | |
82 | #define N_OUTPUT_LOWAT 0x02 | |
83 | #define N_BREAK 0x04 | |
84 | #define N_PARITY_ERROR 0x08 | |
85 | #define N_FRAMING_ERROR 0x10 | |
86 | #define N_OVERRUN_ERROR 0x20 | |
87 | #define N_DDCD 0x40 | |
88 | #define N_DCTS 0x80 | |
89 | ||
90 | #define N_ALL_INPUT (N_DATA_READY | N_BREAK \ | |
91 | | N_PARITY_ERROR | N_FRAMING_ERROR \ | |
92 | | N_OVERRUN_ERROR | N_DDCD | N_DCTS) | |
93 | ||
94 | #define N_ALL_OUTPUT N_OUTPUT_LOWAT | |
95 | ||
96 | #define N_ALL_ERRORS (N_PARITY_ERROR | N_FRAMING_ERROR \ | |
97 | | N_OVERRUN_ERROR) | |
98 | ||
99 | #define N_ALL (N_DATA_READY | N_OUTPUT_LOWAT | N_BREAK \ | |
100 | | N_PARITY_ERROR | N_FRAMING_ERROR \ | |
101 | | N_OVERRUN_ERROR | N_DDCD | N_DCTS) | |
102 | ||
103 | #define SER_CLK_SPEED(prediv) ((22000000 << 1) / prediv) | |
104 | #define SER_DIVISOR(x, clk) (((clk) + (x) * 8) / ((x) * 16)) | |
105 | #define DIVISOR_TO_BAUD(div, clk) ((clk) / 16 / (div)) | |
106 | ||
107 | /* Some masks */ | |
108 | #define LCR_MASK_BITS_CHAR (UART_LCR_WLEN5 | UART_LCR_WLEN6 \ | |
109 | | UART_LCR_WLEN7 | UART_LCR_WLEN8) | |
110 | #define LCR_MASK_STOP_BITS (UART_LCR_STOP) | |
111 | ||
112 | #define PENDING(_a, _p) (readl(&(_p)->vma->sio_ir) & (_a)->ic_enable) | |
113 | ||
114 | #define RING_BUF_SIZE 4096 | |
115 | #define BUF_SIZE_BIT SBBR_L_SIZE | |
116 | #define PROD_CONS_MASK PROD_CONS_PTR_4K | |
117 | ||
118 | #define TOTAL_RING_BUF_SIZE (RING_BUF_SIZE * 4) | |
119 | ||
120 | /* driver specific - one per card */ | |
121 | struct ioc3_card { | |
122 | struct { | |
123 | /* uart ports are allocated here */ | |
124 | struct uart_port icp_uart_port[LOGICAL_PORTS]; | |
125 | /* the ioc3_port used for this port */ | |
126 | struct ioc3_port *icp_port; | |
127 | } ic_port[PORTS_PER_CARD]; | |
128 | /* currently enabled interrupts */ | |
129 | uint32_t ic_enable; | |
130 | }; | |
131 | ||
132 | /* Local port info for each IOC3 serial port */ | |
133 | struct ioc3_port { | |
134 | /* handy reference material */ | |
135 | struct uart_port *ip_port; | |
136 | struct ioc3_card *ip_card; | |
137 | struct ioc3_driver_data *ip_idd; | |
138 | struct ioc3_submodule *ip_is; | |
139 | ||
140 | /* pci mem addresses for this port */ | |
141 | struct ioc3_serialregs __iomem *ip_serial_regs; | |
142 | struct ioc3_uartregs __iomem *ip_uart_regs; | |
143 | ||
144 | /* Ring buffer page for this port */ | |
145 | dma_addr_t ip_dma_ringbuf; | |
146 | /* vaddr of ring buffer */ | |
147 | struct ring_buffer *ip_cpu_ringbuf; | |
148 | ||
149 | /* Rings for this port */ | |
150 | struct ring *ip_inring; | |
151 | struct ring *ip_outring; | |
152 | ||
153 | /* Hook to port specific values */ | |
154 | struct port_hooks *ip_hooks; | |
155 | ||
156 | spinlock_t ip_lock; | |
157 | ||
158 | /* Various rx/tx parameters */ | |
159 | int ip_baud; | |
160 | int ip_tx_lowat; | |
161 | int ip_rx_timeout; | |
162 | ||
163 | /* Copy of notification bits */ | |
164 | int ip_notify; | |
165 | ||
166 | /* Shadow copies of various registers so we don't need to PIO | |
167 | * read them constantly | |
168 | */ | |
169 | uint32_t ip_sscr; | |
170 | uint32_t ip_tx_prod; | |
171 | uint32_t ip_rx_cons; | |
172 | unsigned char ip_flags; | |
173 | }; | |
174 | ||
175 | /* tx low water mark. We need to notify the driver whenever tx is getting | |
176 | * close to empty so it can refill the tx buffer and keep things going. | |
177 | * Let's assume that if we interrupt 1 ms before the tx goes idle, we'll | |
178 | * have no trouble getting in more chars in time (I certainly hope so). | |
179 | */ | |
180 | #define TX_LOWAT_LATENCY 1000 | |
181 | #define TX_LOWAT_HZ (1000000 / TX_LOWAT_LATENCY) | |
182 | #define TX_LOWAT_CHARS(baud) (baud / 10 / TX_LOWAT_HZ) | |
183 | ||
184 | /* Flags per port */ | |
185 | #define INPUT_HIGH 0x01 | |
186 | /* used to signify that we have turned off the rx_high | |
187 | * temporarily - we need to drain the fifo and don't | |
188 | * want to get blasted with interrupts. | |
189 | */ | |
190 | #define DCD_ON 0x02 | |
191 | /* DCD state is on */ | |
192 | #define LOWAT_WRITTEN 0x04 | |
193 | #define READ_ABORTED 0x08 | |
194 | /* the read was aborted - used to avaoid infinate looping | |
195 | * in the interrupt handler | |
196 | */ | |
197 | #define INPUT_ENABLE 0x10 | |
198 | ||
199 | /* Since each port has different register offsets and bitmasks | |
200 | * for everything, we'll store those that we need in tables so we | |
201 | * don't have to be constantly checking the port we are dealing with. | |
202 | */ | |
203 | struct port_hooks { | |
204 | uint32_t intr_delta_dcd; | |
205 | uint32_t intr_delta_cts; | |
206 | uint32_t intr_tx_mt; | |
207 | uint32_t intr_rx_timer; | |
208 | uint32_t intr_rx_high; | |
209 | uint32_t intr_tx_explicit; | |
210 | uint32_t intr_clear; | |
211 | uint32_t intr_all; | |
212 | char rs422_select_pin; | |
213 | }; | |
214 | ||
215 | static struct port_hooks hooks_array[PORTS_PER_CARD] = { | |
216 | /* values for port A */ | |
217 | { | |
218 | .intr_delta_dcd = SIO_IR_SA_DELTA_DCD, | |
219 | .intr_delta_cts = SIO_IR_SA_DELTA_CTS, | |
220 | .intr_tx_mt = SIO_IR_SA_TX_MT, | |
221 | .intr_rx_timer = SIO_IR_SA_RX_TIMER, | |
222 | .intr_rx_high = SIO_IR_SA_RX_HIGH, | |
223 | .intr_tx_explicit = SIO_IR_SA_TX_EXPLICIT, | |
224 | .intr_clear = (SIO_IR_SA_TX_MT | SIO_IR_SA_RX_FULL | |
225 | | SIO_IR_SA_RX_HIGH | |
226 | | SIO_IR_SA_RX_TIMER | |
227 | | SIO_IR_SA_DELTA_DCD | |
228 | | SIO_IR_SA_DELTA_CTS | |
229 | | SIO_IR_SA_INT | |
230 | | SIO_IR_SA_TX_EXPLICIT | |
231 | | SIO_IR_SA_MEMERR), | |
232 | .intr_all = SIO_IR_SA, | |
233 | .rs422_select_pin = GPPR_UARTA_MODESEL_PIN, | |
234 | }, | |
235 | ||
236 | /* values for port B */ | |
237 | { | |
238 | .intr_delta_dcd = SIO_IR_SB_DELTA_DCD, | |
239 | .intr_delta_cts = SIO_IR_SB_DELTA_CTS, | |
240 | .intr_tx_mt = SIO_IR_SB_TX_MT, | |
241 | .intr_rx_timer = SIO_IR_SB_RX_TIMER, | |
242 | .intr_rx_high = SIO_IR_SB_RX_HIGH, | |
243 | .intr_tx_explicit = SIO_IR_SB_TX_EXPLICIT, | |
244 | .intr_clear = (SIO_IR_SB_TX_MT | SIO_IR_SB_RX_FULL | |
245 | | SIO_IR_SB_RX_HIGH | |
246 | | SIO_IR_SB_RX_TIMER | |
247 | | SIO_IR_SB_DELTA_DCD | |
248 | | SIO_IR_SB_DELTA_CTS | |
249 | | SIO_IR_SB_INT | |
250 | | SIO_IR_SB_TX_EXPLICIT | |
251 | | SIO_IR_SB_MEMERR), | |
252 | .intr_all = SIO_IR_SB, | |
253 | .rs422_select_pin = GPPR_UARTB_MODESEL_PIN, | |
254 | } | |
255 | }; | |
256 | ||
257 | struct ring_entry { | |
258 | union { | |
259 | struct { | |
260 | uint32_t alldata; | |
261 | uint32_t allsc; | |
262 | } all; | |
263 | struct { | |
264 | char data[4]; /* data bytes */ | |
265 | char sc[4]; /* status/control */ | |
266 | } s; | |
267 | } u; | |
268 | }; | |
269 | ||
270 | /* Test the valid bits in any of the 4 sc chars using "allsc" member */ | |
271 | #define RING_ANY_VALID \ | |
272 | ((uint32_t)(RXSB_MODEM_VALID | RXSB_DATA_VALID) * 0x01010101) | |
273 | ||
274 | #define ring_sc u.s.sc | |
275 | #define ring_data u.s.data | |
276 | #define ring_allsc u.all.allsc | |
277 | ||
278 | /* Number of entries per ring buffer. */ | |
279 | #define ENTRIES_PER_RING (RING_BUF_SIZE / (int) sizeof(struct ring_entry)) | |
280 | ||
281 | /* An individual ring */ | |
282 | struct ring { | |
283 | struct ring_entry entries[ENTRIES_PER_RING]; | |
284 | }; | |
285 | ||
286 | /* The whole enchilada */ | |
287 | struct ring_buffer { | |
288 | struct ring TX_A; | |
289 | struct ring RX_A; | |
290 | struct ring TX_B; | |
291 | struct ring RX_B; | |
292 | }; | |
293 | ||
294 | /* Get a ring from a port struct */ | |
295 | #define RING(_p, _wh) &(((struct ring_buffer *)((_p)->ip_cpu_ringbuf))->_wh) | |
296 | ||
297 | /* for Infinite loop detection */ | |
298 | #define MAXITER 10000000 | |
299 | ||
300 | ||
301 | /** | |
302 | * set_baud - Baud rate setting code | |
303 | * @port: port to set | |
304 | * @baud: baud rate to use | |
305 | */ | |
306 | static int set_baud(struct ioc3_port *port, int baud) | |
307 | { | |
308 | int divisor; | |
309 | int actual_baud; | |
310 | int diff; | |
311 | int lcr, prediv; | |
312 | struct ioc3_uartregs __iomem *uart; | |
313 | ||
314 | for (prediv = 6; prediv < 64; prediv++) { | |
315 | divisor = SER_DIVISOR(baud, SER_CLK_SPEED(prediv)); | |
316 | if (!divisor) | |
317 | continue; /* invalid divisor */ | |
318 | actual_baud = DIVISOR_TO_BAUD(divisor, SER_CLK_SPEED(prediv)); | |
319 | ||
320 | diff = actual_baud - baud; | |
321 | if (diff < 0) | |
322 | diff = -diff; | |
323 | ||
324 | /* if we're within 1% we've found a match */ | |
325 | if (diff * 100 <= actual_baud) | |
326 | break; | |
327 | } | |
328 | ||
329 | /* if the above loop completed, we didn't match | |
330 | * the baud rate. give up. | |
331 | */ | |
332 | if (prediv == 64) { | |
333 | NOT_PROGRESS(); | |
334 | return 1; | |
335 | } | |
336 | ||
337 | uart = port->ip_uart_regs; | |
338 | lcr = readb(&uart->iu_lcr); | |
339 | ||
340 | writeb(lcr | UART_LCR_DLAB, &uart->iu_lcr); | |
341 | writeb((unsigned char)divisor, &uart->iu_dll); | |
342 | writeb((unsigned char)(divisor >> 8), &uart->iu_dlm); | |
343 | writeb((unsigned char)prediv, &uart->iu_scr); | |
344 | writeb((unsigned char)lcr, &uart->iu_lcr); | |
345 | ||
346 | return 0; | |
347 | } | |
348 | ||
349 | /** | |
350 | * get_ioc3_port - given a uart port, return the control structure | |
351 | * @the_port: uart port to find | |
352 | */ | |
353 | static struct ioc3_port *get_ioc3_port(struct uart_port *the_port) | |
354 | { | |
355 | struct ioc3_driver_data *idd = dev_get_drvdata(the_port->dev); | |
356 | struct ioc3_card *card_ptr = idd->data[Submodule_slot]; | |
357 | int ii, jj; | |
358 | ||
359 | if (!card_ptr) { | |
360 | NOT_PROGRESS(); | |
361 | return NULL; | |
362 | } | |
363 | for (ii = 0; ii < PORTS_PER_CARD; ii++) { | |
364 | for (jj = 0; jj < LOGICAL_PORTS; jj++) { | |
365 | if (the_port == &card_ptr->ic_port[ii].icp_uart_port[jj]) | |
366 | return card_ptr->ic_port[ii].icp_port; | |
367 | } | |
368 | } | |
369 | NOT_PROGRESS(); | |
370 | return NULL; | |
371 | } | |
372 | ||
373 | /** | |
374 | * port_init - Initialize the sio and ioc3 hardware for a given port | |
375 | * called per port from attach... | |
376 | * @port: port to initialize | |
377 | */ | |
378 | static int inline port_init(struct ioc3_port *port) | |
379 | { | |
380 | uint32_t sio_cr; | |
381 | struct port_hooks *hooks = port->ip_hooks; | |
382 | struct ioc3_uartregs __iomem *uart; | |
383 | int reset_loop_counter = 0xfffff; | |
384 | struct ioc3_driver_data *idd = port->ip_idd; | |
385 | ||
386 | /* Idle the IOC3 serial interface */ | |
387 | writel(SSCR_RESET, &port->ip_serial_regs->sscr); | |
388 | ||
389 | /* Wait until any pending bus activity for this port has ceased */ | |
390 | do { | |
391 | sio_cr = readl(&idd->vma->sio_cr); | |
392 | if (reset_loop_counter-- <= 0) { | |
393 | printk(KERN_WARNING | |
394 | "IOC3 unable to come out of reset" | |
395 | " scr 0x%x\n", sio_cr); | |
396 | return -1; | |
397 | } | |
398 | } while (!(sio_cr & SIO_CR_ARB_DIAG_IDLE) && | |
399 | (((sio_cr &= SIO_CR_ARB_DIAG) == SIO_CR_ARB_DIAG_TXA) | |
400 | || sio_cr == SIO_CR_ARB_DIAG_TXB | |
401 | || sio_cr == SIO_CR_ARB_DIAG_RXA | |
402 | || sio_cr == SIO_CR_ARB_DIAG_RXB)); | |
403 | ||
404 | /* Finish reset sequence */ | |
405 | writel(0, &port->ip_serial_regs->sscr); | |
406 | ||
407 | /* Once RESET is done, reload cached tx_prod and rx_cons values | |
408 | * and set rings to empty by making prod == cons | |
409 | */ | |
410 | port->ip_tx_prod = readl(&port->ip_serial_regs->stcir) & PROD_CONS_MASK; | |
411 | writel(port->ip_tx_prod, &port->ip_serial_regs->stpir); | |
412 | port->ip_rx_cons = readl(&port->ip_serial_regs->srpir) & PROD_CONS_MASK; | |
413 | writel(port->ip_rx_cons | SRCIR_ARM, &port->ip_serial_regs->srcir); | |
414 | ||
415 | /* Disable interrupts for this 16550 */ | |
416 | uart = port->ip_uart_regs; | |
417 | writeb(0, &uart->iu_lcr); | |
418 | writeb(0, &uart->iu_ier); | |
419 | ||
420 | /* Set the default baud */ | |
421 | set_baud(port, port->ip_baud); | |
422 | ||
423 | /* Set line control to 8 bits no parity */ | |
424 | writeb(UART_LCR_WLEN8 | 0, &uart->iu_lcr); | |
425 | /* UART_LCR_STOP == 1 stop */ | |
426 | ||
427 | /* Enable the FIFOs */ | |
428 | writeb(UART_FCR_ENABLE_FIFO, &uart->iu_fcr); | |
429 | /* then reset 16550 FIFOs */ | |
430 | writeb(UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, | |
431 | &uart->iu_fcr); | |
432 | ||
433 | /* Clear modem control register */ | |
434 | writeb(0, &uart->iu_mcr); | |
435 | ||
436 | /* Clear deltas in modem status register */ | |
437 | writel(0, &port->ip_serial_regs->shadow); | |
438 | ||
439 | /* Only do this once per port pair */ | |
440 | if (port->ip_hooks == &hooks_array[0]) { | |
441 | unsigned long ring_pci_addr; | |
442 | uint32_t __iomem *sbbr_l, *sbbr_h; | |
443 | ||
444 | sbbr_l = &idd->vma->sbbr_l; | |
445 | sbbr_h = &idd->vma->sbbr_h; | |
446 | ring_pci_addr = (unsigned long __iomem)port->ip_dma_ringbuf; | |
447 | DPRINT_CONFIG(("%s: ring_pci_addr 0x%p\n", | |
448 | __FUNCTION__, (void *)ring_pci_addr)); | |
449 | ||
450 | writel((unsigned int)((uint64_t) ring_pci_addr >> 32), sbbr_h); | |
451 | writel((unsigned int)ring_pci_addr | BUF_SIZE_BIT, sbbr_l); | |
452 | } | |
453 | ||
454 | /* Set the receive timeout value to 10 msec */ | |
455 | writel(SRTR_HZ / 100, &port->ip_serial_regs->srtr); | |
456 | ||
457 | /* Set rx threshold, enable DMA */ | |
458 | /* Set high water mark at 3/4 of full ring */ | |
459 | port->ip_sscr = (ENTRIES_PER_RING * 3 / 4); | |
460 | ||
461 | /* uart experiences pauses at high baud rate reducing actual | |
462 | * throughput by 10% or so unless we enable high speed polling | |
463 | * XXX when this hardware bug is resolved we should revert to | |
464 | * normal polling speed | |
465 | */ | |
466 | port->ip_sscr |= SSCR_HIGH_SPD; | |
467 | ||
468 | writel(port->ip_sscr, &port->ip_serial_regs->sscr); | |
469 | ||
470 | /* Disable and clear all serial related interrupt bits */ | |
471 | port->ip_card->ic_enable &= ~hooks->intr_clear; | |
472 | ioc3_disable(port->ip_is, idd, hooks->intr_clear); | |
473 | ioc3_ack(port->ip_is, idd, hooks->intr_clear); | |
474 | return 0; | |
475 | } | |
476 | ||
477 | /** | |
478 | * enable_intrs - enable interrupts | |
479 | * @port: port to enable | |
480 | * @mask: mask to use | |
481 | */ | |
482 | static void enable_intrs(struct ioc3_port *port, uint32_t mask) | |
483 | { | |
484 | if ((port->ip_card->ic_enable & mask) != mask) { | |
485 | port->ip_card->ic_enable |= mask; | |
486 | ioc3_enable(port->ip_is, port->ip_idd, mask); | |
487 | } | |
488 | } | |
489 | ||
490 | /** | |
491 | * local_open - local open a port | |
492 | * @port: port to open | |
493 | */ | |
494 | static inline int local_open(struct ioc3_port *port) | |
495 | { | |
496 | int spiniter = 0; | |
497 | ||
498 | port->ip_flags = INPUT_ENABLE; | |
499 | ||
500 | /* Pause the DMA interface if necessary */ | |
501 | if (port->ip_sscr & SSCR_DMA_EN) { | |
502 | writel(port->ip_sscr | SSCR_DMA_PAUSE, | |
503 | &port->ip_serial_regs->sscr); | |
504 | while ((readl(&port->ip_serial_regs->sscr) | |
505 | & SSCR_PAUSE_STATE) == 0) { | |
506 | spiniter++; | |
507 | if (spiniter > MAXITER) { | |
508 | NOT_PROGRESS(); | |
509 | return -1; | |
510 | } | |
511 | } | |
512 | } | |
513 | ||
514 | /* Reset the input fifo. If the uart received chars while the port | |
515 | * was closed and DMA is not enabled, the uart may have a bunch of | |
516 | * chars hanging around in its rx fifo which will not be discarded | |
517 | * by rclr in the upper layer. We must get rid of them here. | |
518 | */ | |
519 | writeb(UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR, | |
520 | &port->ip_uart_regs->iu_fcr); | |
521 | ||
522 | writeb(UART_LCR_WLEN8, &port->ip_uart_regs->iu_lcr); | |
523 | /* UART_LCR_STOP == 1 stop */ | |
524 | ||
525 | /* Re-enable DMA, set default threshold to intr whenever there is | |
526 | * data available. | |
527 | */ | |
528 | port->ip_sscr &= ~SSCR_RX_THRESHOLD; | |
529 | port->ip_sscr |= 1; /* default threshold */ | |
530 | ||
531 | /* Plug in the new sscr. This implicitly clears the DMA_PAUSE | |
532 | * flag if it was set above | |
533 | */ | |
534 | writel(port->ip_sscr, &port->ip_serial_regs->sscr); | |
535 | port->ip_tx_lowat = 1; | |
536 | return 0; | |
537 | } | |
538 | ||
539 | /** | |
540 | * set_rx_timeout - Set rx timeout and threshold values. | |
541 | * @port: port to use | |
542 | * @timeout: timeout value in ticks | |
543 | */ | |
544 | static inline int set_rx_timeout(struct ioc3_port *port, int timeout) | |
545 | { | |
546 | int threshold; | |
547 | ||
548 | port->ip_rx_timeout = timeout; | |
549 | ||
550 | /* Timeout is in ticks. Let's figure out how many chars we | |
551 | * can receive at the current baud rate in that interval | |
552 | * and set the rx threshold to that amount. There are 4 chars | |
553 | * per ring entry, so we'll divide the number of chars that will | |
554 | * arrive in timeout by 4. | |
555 | * So .... timeout * baud / 10 / HZ / 4, with HZ = 100. | |
556 | */ | |
557 | threshold = timeout * port->ip_baud / 4000; | |
558 | if (threshold == 0) | |
559 | threshold = 1; /* otherwise we'll intr all the time! */ | |
560 | ||
561 | if ((unsigned)threshold > (unsigned)SSCR_RX_THRESHOLD) | |
562 | return 1; | |
563 | ||
564 | port->ip_sscr &= ~SSCR_RX_THRESHOLD; | |
565 | port->ip_sscr |= threshold; | |
566 | writel(port->ip_sscr, &port->ip_serial_regs->sscr); | |
567 | ||
568 | /* Now set the rx timeout to the given value | |
569 | * again timeout * SRTR_HZ / HZ | |
570 | */ | |
571 | timeout = timeout * SRTR_HZ / 100; | |
572 | if (timeout > SRTR_CNT) | |
573 | timeout = SRTR_CNT; | |
574 | writel(timeout, &port->ip_serial_regs->srtr); | |
575 | return 0; | |
576 | } | |
577 | ||
578 | /** | |
579 | * config_port - config the hardware | |
580 | * @port: port to config | |
581 | * @baud: baud rate for the port | |
582 | * @byte_size: data size | |
583 | * @stop_bits: number of stop bits | |
584 | * @parenb: parity enable ? | |
585 | * @parodd: odd parity ? | |
586 | */ | |
587 | static inline int | |
588 | config_port(struct ioc3_port *port, | |
589 | int baud, int byte_size, int stop_bits, int parenb, int parodd) | |
590 | { | |
591 | char lcr, sizebits; | |
592 | int spiniter = 0; | |
593 | ||
594 | DPRINT_CONFIG(("%s: line %d baud %d byte_size %d stop %d parenb %d " | |
595 | "parodd %d\n", | |
596 | __FUNCTION__, ((struct uart_port *)port->ip_port)->line, | |
597 | baud, byte_size, stop_bits, parenb, parodd)); | |
598 | ||
599 | if (set_baud(port, baud)) | |
600 | return 1; | |
601 | ||
602 | switch (byte_size) { | |
603 | case 5: | |
604 | sizebits = UART_LCR_WLEN5; | |
605 | break; | |
606 | case 6: | |
607 | sizebits = UART_LCR_WLEN6; | |
608 | break; | |
609 | case 7: | |
610 | sizebits = UART_LCR_WLEN7; | |
611 | break; | |
612 | case 8: | |
613 | sizebits = UART_LCR_WLEN8; | |
614 | break; | |
615 | default: | |
616 | return 1; | |
617 | } | |
618 | ||
619 | /* Pause the DMA interface if necessary */ | |
620 | if (port->ip_sscr & SSCR_DMA_EN) { | |
621 | writel(port->ip_sscr | SSCR_DMA_PAUSE, | |
622 | &port->ip_serial_regs->sscr); | |
623 | while ((readl(&port->ip_serial_regs->sscr) | |
624 | & SSCR_PAUSE_STATE) == 0) { | |
625 | spiniter++; | |
626 | if (spiniter > MAXITER) | |
627 | return -1; | |
628 | } | |
629 | } | |
630 | ||
631 | /* Clear relevant fields in lcr */ | |
632 | lcr = readb(&port->ip_uart_regs->iu_lcr); | |
633 | lcr &= ~(LCR_MASK_BITS_CHAR | UART_LCR_EPAR | | |
634 | UART_LCR_PARITY | LCR_MASK_STOP_BITS); | |
635 | ||
636 | /* Set byte size in lcr */ | |
637 | lcr |= sizebits; | |
638 | ||
639 | /* Set parity */ | |
640 | if (parenb) { | |
641 | lcr |= UART_LCR_PARITY; | |
642 | if (!parodd) | |
643 | lcr |= UART_LCR_EPAR; | |
644 | } | |
645 | ||
646 | /* Set stop bits */ | |
647 | if (stop_bits) | |
648 | lcr |= UART_LCR_STOP /* 2 stop bits */ ; | |
649 | ||
650 | writeb(lcr, &port->ip_uart_regs->iu_lcr); | |
651 | ||
652 | /* Re-enable the DMA interface if necessary */ | |
653 | if (port->ip_sscr & SSCR_DMA_EN) { | |
654 | writel(port->ip_sscr, &port->ip_serial_regs->sscr); | |
655 | } | |
656 | port->ip_baud = baud; | |
657 | ||
658 | /* When we get within this number of ring entries of filling the | |
659 | * entire ring on tx, place an EXPLICIT intr to generate a lowat | |
660 | * notification when output has drained. | |
661 | */ | |
662 | port->ip_tx_lowat = (TX_LOWAT_CHARS(baud) + 3) / 4; | |
663 | if (port->ip_tx_lowat == 0) | |
664 | port->ip_tx_lowat = 1; | |
665 | ||
666 | set_rx_timeout(port, 2); | |
667 | return 0; | |
668 | } | |
669 | ||
670 | /** | |
671 | * do_write - Write bytes to the port. Returns the number of bytes | |
672 | * actually written. Called from transmit_chars | |
673 | * @port: port to use | |
674 | * @buf: the stuff to write | |
675 | * @len: how many bytes in 'buf' | |
676 | */ | |
677 | static inline int do_write(struct ioc3_port *port, char *buf, int len) | |
678 | { | |
679 | int prod_ptr, cons_ptr, total = 0; | |
680 | struct ring *outring; | |
681 | struct ring_entry *entry; | |
682 | struct port_hooks *hooks = port->ip_hooks; | |
683 | ||
684 | BUG_ON(!(len >= 0)); | |
685 | ||
686 | prod_ptr = port->ip_tx_prod; | |
687 | cons_ptr = readl(&port->ip_serial_regs->stcir) & PROD_CONS_MASK; | |
688 | outring = port->ip_outring; | |
689 | ||
690 | /* Maintain a 1-entry red-zone. The ring buffer is full when | |
691 | * (cons - prod) % ring_size is 1. Rather than do this subtraction | |
692 | * in the body of the loop, I'll do it now. | |
693 | */ | |
694 | cons_ptr = (cons_ptr - (int)sizeof(struct ring_entry)) & PROD_CONS_MASK; | |
695 | ||
696 | /* Stuff the bytes into the output */ | |
697 | while ((prod_ptr != cons_ptr) && (len > 0)) { | |
698 | int xx; | |
699 | ||
700 | /* Get 4 bytes (one ring entry) at a time */ | |
701 | entry = (struct ring_entry *)((caddr_t) outring + prod_ptr); | |
702 | ||
703 | /* Invalidate all entries */ | |
704 | entry->ring_allsc = 0; | |
705 | ||
706 | /* Copy in some bytes */ | |
707 | for (xx = 0; (xx < 4) && (len > 0); xx++) { | |
708 | entry->ring_data[xx] = *buf++; | |
709 | entry->ring_sc[xx] = TXCB_VALID; | |
710 | len--; | |
711 | total++; | |
712 | } | |
713 | ||
714 | /* If we are within some small threshold of filling up the | |
715 | * entire ring buffer, we must place an EXPLICIT intr here | |
716 | * to generate a lowat interrupt in case we subsequently | |
717 | * really do fill up the ring and the caller goes to sleep. | |
718 | * No need to place more than one though. | |
719 | */ | |
720 | if (!(port->ip_flags & LOWAT_WRITTEN) && | |
721 | ((cons_ptr - prod_ptr) & PROD_CONS_MASK) | |
722 | <= port->ip_tx_lowat * (int)sizeof(struct ring_entry)) { | |
723 | port->ip_flags |= LOWAT_WRITTEN; | |
724 | entry->ring_sc[0] |= TXCB_INT_WHEN_DONE; | |
725 | } | |
726 | ||
727 | /* Go on to next entry */ | |
728 | prod_ptr += sizeof(struct ring_entry); | |
729 | prod_ptr &= PROD_CONS_MASK; | |
730 | } | |
731 | ||
732 | /* If we sent something, start DMA if necessary */ | |
733 | if (total > 0 && !(port->ip_sscr & SSCR_DMA_EN)) { | |
734 | port->ip_sscr |= SSCR_DMA_EN; | |
735 | writel(port->ip_sscr, &port->ip_serial_regs->sscr); | |
736 | } | |
737 | ||
738 | /* Store the new producer pointer. If tx is disabled, we stuff the | |
739 | * data into the ring buffer, but we don't actually start tx. | |
740 | */ | |
741 | if (!uart_tx_stopped(port->ip_port)) { | |
742 | writel(prod_ptr, &port->ip_serial_regs->stpir); | |
743 | ||
744 | /* If we are now transmitting, enable tx_mt interrupt so we | |
745 | * can disable DMA if necessary when the tx finishes. | |
746 | */ | |
747 | if (total > 0) | |
748 | enable_intrs(port, hooks->intr_tx_mt); | |
749 | } | |
750 | port->ip_tx_prod = prod_ptr; | |
751 | ||
752 | return total; | |
753 | } | |
754 | ||
755 | /** | |
756 | * disable_intrs - disable interrupts | |
757 | * @port: port to enable | |
758 | * @mask: mask to use | |
759 | */ | |
760 | static inline void disable_intrs(struct ioc3_port *port, uint32_t mask) | |
761 | { | |
762 | if (port->ip_card->ic_enable & mask) { | |
763 | ioc3_disable(port->ip_is, port->ip_idd, mask); | |
764 | port->ip_card->ic_enable &= ~mask; | |
765 | } | |
766 | } | |
767 | ||
768 | /** | |
769 | * set_notification - Modify event notification | |
770 | * @port: port to use | |
771 | * @mask: events mask | |
772 | * @set_on: set ? | |
773 | */ | |
774 | static int set_notification(struct ioc3_port *port, int mask, int set_on) | |
775 | { | |
776 | struct port_hooks *hooks = port->ip_hooks; | |
777 | uint32_t intrbits, sscrbits; | |
778 | ||
779 | BUG_ON(!mask); | |
780 | ||
781 | intrbits = sscrbits = 0; | |
782 | ||
783 | if (mask & N_DATA_READY) | |
784 | intrbits |= (hooks->intr_rx_timer | hooks->intr_rx_high); | |
785 | if (mask & N_OUTPUT_LOWAT) | |
786 | intrbits |= hooks->intr_tx_explicit; | |
787 | if (mask & N_DDCD) { | |
788 | intrbits |= hooks->intr_delta_dcd; | |
789 | sscrbits |= SSCR_RX_RING_DCD; | |
790 | } | |
791 | if (mask & N_DCTS) | |
792 | intrbits |= hooks->intr_delta_cts; | |
793 | ||
794 | if (set_on) { | |
795 | enable_intrs(port, intrbits); | |
796 | port->ip_notify |= mask; | |
797 | port->ip_sscr |= sscrbits; | |
798 | } else { | |
799 | disable_intrs(port, intrbits); | |
800 | port->ip_notify &= ~mask; | |
801 | port->ip_sscr &= ~sscrbits; | |
802 | } | |
803 | ||
804 | /* We require DMA if either DATA_READY or DDCD notification is | |
805 | * currently requested. If neither of these is requested and | |
806 | * there is currently no tx in progress, DMA may be disabled. | |
807 | */ | |
808 | if (port->ip_notify & (N_DATA_READY | N_DDCD)) | |
809 | port->ip_sscr |= SSCR_DMA_EN; | |
810 | else if (!(port->ip_card->ic_enable & hooks->intr_tx_mt)) | |
811 | port->ip_sscr &= ~SSCR_DMA_EN; | |
812 | ||
813 | writel(port->ip_sscr, &port->ip_serial_regs->sscr); | |
814 | return 0; | |
815 | } | |
816 | ||
817 | /** | |
818 | * set_mcr - set the master control reg | |
819 | * @the_port: port to use | |
820 | * @mask1: mcr mask | |
821 | * @mask2: shadow mask | |
822 | */ | |
823 | static inline int set_mcr(struct uart_port *the_port, | |
824 | int mask1, int mask2) | |
825 | { | |
826 | struct ioc3_port *port = get_ioc3_port(the_port); | |
827 | uint32_t shadow; | |
828 | int spiniter = 0; | |
829 | char mcr; | |
830 | ||
831 | if (!port) | |
832 | return -1; | |
833 | ||
834 | /* Pause the DMA interface if necessary */ | |
835 | if (port->ip_sscr & SSCR_DMA_EN) { | |
836 | writel(port->ip_sscr | SSCR_DMA_PAUSE, | |
837 | &port->ip_serial_regs->sscr); | |
838 | while ((readl(&port->ip_serial_regs->sscr) | |
839 | & SSCR_PAUSE_STATE) == 0) { | |
840 | spiniter++; | |
841 | if (spiniter > MAXITER) | |
842 | return -1; | |
843 | } | |
844 | } | |
845 | shadow = readl(&port->ip_serial_regs->shadow); | |
846 | mcr = (shadow & 0xff000000) >> 24; | |
847 | ||
848 | /* Set new value */ | |
849 | mcr |= mask1; | |
850 | shadow |= mask2; | |
851 | writeb(mcr, &port->ip_uart_regs->iu_mcr); | |
852 | writel(shadow, &port->ip_serial_regs->shadow); | |
853 | ||
854 | /* Re-enable the DMA interface if necessary */ | |
855 | if (port->ip_sscr & SSCR_DMA_EN) { | |
856 | writel(port->ip_sscr, &port->ip_serial_regs->sscr); | |
857 | } | |
858 | return 0; | |
859 | } | |
860 | ||
861 | /** | |
862 | * ioc3_set_proto - set the protocol for the port | |
863 | * @port: port to use | |
864 | * @proto: protocol to use | |
865 | */ | |
866 | static int ioc3_set_proto(struct ioc3_port *port, int proto) | |
867 | { | |
868 | struct port_hooks *hooks = port->ip_hooks; | |
869 | ||
870 | switch (proto) { | |
871 | default: | |
872 | case PROTO_RS232: | |
873 | /* Clear the appropriate GIO pin */ | |
874 | DPRINT_CONFIG(("%s: rs232\n", __FUNCTION__)); | |
875 | writel(0, (&port->ip_idd->vma->gppr[0] | |
876 | + hooks->rs422_select_pin)); | |
877 | break; | |
878 | ||
879 | case PROTO_RS422: | |
880 | /* Set the appropriate GIO pin */ | |
881 | DPRINT_CONFIG(("%s: rs422\n", __FUNCTION__)); | |
882 | writel(1, (&port->ip_idd->vma->gppr[0] | |
883 | + hooks->rs422_select_pin)); | |
884 | break; | |
885 | } | |
886 | return 0; | |
887 | } | |
888 | ||
889 | /** | |
890 | * transmit_chars - upper level write, called with the_port->lock | |
891 | * @the_port: port to write | |
892 | */ | |
893 | static void transmit_chars(struct uart_port *the_port) | |
894 | { | |
895 | int xmit_count, tail, head; | |
896 | int result; | |
897 | char *start; | |
898 | struct tty_struct *tty; | |
899 | struct ioc3_port *port = get_ioc3_port(the_port); | |
900 | struct uart_info *info; | |
901 | ||
902 | if (!the_port) | |
903 | return; | |
904 | if (!port) | |
905 | return; | |
906 | ||
907 | info = the_port->info; | |
908 | tty = info->tty; | |
909 | ||
910 | if (uart_circ_empty(&info->xmit) || uart_tx_stopped(the_port)) { | |
911 | /* Nothing to do or hw stopped */ | |
912 | set_notification(port, N_ALL_OUTPUT, 0); | |
913 | return; | |
914 | } | |
915 | ||
916 | head = info->xmit.head; | |
917 | tail = info->xmit.tail; | |
918 | start = (char *)&info->xmit.buf[tail]; | |
919 | ||
920 | /* write out all the data or until the end of the buffer */ | |
921 | xmit_count = (head < tail) ? (UART_XMIT_SIZE - tail) : (head - tail); | |
922 | if (xmit_count > 0) { | |
923 | result = do_write(port, start, xmit_count); | |
924 | if (result > 0) { | |
925 | /* booking */ | |
926 | xmit_count -= result; | |
927 | the_port->icount.tx += result; | |
928 | /* advance the pointers */ | |
929 | tail += result; | |
930 | tail &= UART_XMIT_SIZE - 1; | |
931 | info->xmit.tail = tail; | |
932 | start = (char *)&info->xmit.buf[tail]; | |
933 | } | |
934 | } | |
935 | if (uart_circ_chars_pending(&info->xmit) < WAKEUP_CHARS) | |
936 | uart_write_wakeup(the_port); | |
937 | ||
938 | if (uart_circ_empty(&info->xmit)) { | |
939 | set_notification(port, N_OUTPUT_LOWAT, 0); | |
940 | } else { | |
941 | set_notification(port, N_OUTPUT_LOWAT, 1); | |
942 | } | |
943 | } | |
944 | ||
945 | /** | |
946 | * ioc3_change_speed - change the speed of the port | |
947 | * @the_port: port to change | |
948 | * @new_termios: new termios settings | |
949 | * @old_termios: old termios settings | |
950 | */ | |
951 | static void | |
952 | ioc3_change_speed(struct uart_port *the_port, | |
953 | struct termios *new_termios, struct termios *old_termios) | |
954 | { | |
955 | struct ioc3_port *port = get_ioc3_port(the_port); | |
956 | unsigned int cflag; | |
957 | int baud; | |
958 | int new_parity = 0, new_parity_enable = 0, new_stop = 0, new_data = 8; | |
959 | struct uart_info *info = the_port->info; | |
960 | ||
961 | cflag = new_termios->c_cflag; | |
962 | ||
963 | switch (cflag & CSIZE) { | |
964 | case CS5: | |
965 | new_data = 5; | |
966 | break; | |
967 | case CS6: | |
968 | new_data = 6; | |
969 | break; | |
970 | case CS7: | |
971 | new_data = 7; | |
972 | break; | |
973 | case CS8: | |
974 | new_data = 8; | |
975 | break; | |
976 | default: | |
977 | /* cuz we always need a default ... */ | |
978 | new_data = 5; | |
979 | break; | |
980 | } | |
981 | if (cflag & CSTOPB) { | |
982 | new_stop = 1; | |
983 | } | |
984 | if (cflag & PARENB) { | |
985 | new_parity_enable = 1; | |
986 | if (cflag & PARODD) | |
987 | new_parity = 1; | |
988 | } | |
989 | baud = uart_get_baud_rate(the_port, new_termios, old_termios, | |
990 | MIN_BAUD_SUPPORTED, MAX_BAUD_SUPPORTED); | |
991 | DPRINT_CONFIG(("%s: returned baud %d for line %d\n", __FUNCTION__, baud, | |
992 | the_port->line)); | |
993 | ||
994 | if (!the_port->fifosize) | |
995 | the_port->fifosize = FIFO_SIZE; | |
996 | uart_update_timeout(the_port, cflag, baud); | |
997 | ||
998 | the_port->ignore_status_mask = N_ALL_INPUT; | |
999 | ||
1000 | info->tty->low_latency = 1; | |
1001 | ||
1002 | if (I_IGNPAR(info->tty)) | |
1003 | the_port->ignore_status_mask &= ~(N_PARITY_ERROR | |
1004 | | N_FRAMING_ERROR); | |
1005 | if (I_IGNBRK(info->tty)) { | |
1006 | the_port->ignore_status_mask &= ~N_BREAK; | |
1007 | if (I_IGNPAR(info->tty)) | |
1008 | the_port->ignore_status_mask &= ~N_OVERRUN_ERROR; | |
1009 | } | |
1010 | if (!(cflag & CREAD)) { | |
1011 | /* ignore everything */ | |
1012 | the_port->ignore_status_mask &= ~N_DATA_READY; | |
1013 | } | |
1014 | ||
1015 | if (cflag & CRTSCTS) { | |
1016 | /* enable hardware flow control */ | |
1017 | port->ip_sscr |= SSCR_HFC_EN; | |
1018 | } | |
1019 | else { | |
1020 | /* disable hardware flow control */ | |
1021 | port->ip_sscr &= ~SSCR_HFC_EN; | |
1022 | } | |
1023 | writel(port->ip_sscr, &port->ip_serial_regs->sscr); | |
1024 | ||
1025 | /* Set the configuration and proper notification call */ | |
1026 | DPRINT_CONFIG(("%s : port 0x%p line %d cflag 0%o " | |
1027 | "config_port(baud %d data %d stop %d penable %d " | |
1028 | " parity %d), notification 0x%x\n", | |
1029 | __FUNCTION__, (void *)port, the_port->line, cflag, baud, | |
1030 | new_data, new_stop, new_parity_enable, new_parity, | |
1031 | the_port->ignore_status_mask)); | |
1032 | ||
1033 | if ((config_port(port, baud, /* baud */ | |
1034 | new_data, /* byte size */ | |
1035 | new_stop, /* stop bits */ | |
1036 | new_parity_enable, /* set parity */ | |
1037 | new_parity)) >= 0) { /* parity 1==odd */ | |
1038 | set_notification(port, the_port->ignore_status_mask, 1); | |
1039 | } | |
1040 | } | |
1041 | ||
1042 | /** | |
1043 | * ic3_startup_local - Start up the serial port - returns >= 0 if no errors | |
1044 | * @the_port: Port to operate on | |
1045 | */ | |
1046 | static inline int ic3_startup_local(struct uart_port *the_port) | |
1047 | { | |
1048 | struct ioc3_port *port; | |
1049 | ||
1050 | if (!the_port) { | |
1051 | NOT_PROGRESS(); | |
1052 | return -1; | |
1053 | } | |
1054 | ||
1055 | port = get_ioc3_port(the_port); | |
1056 | if (!port) { | |
1057 | NOT_PROGRESS(); | |
1058 | return -1; | |
1059 | } | |
1060 | ||
1061 | local_open(port); | |
1062 | ||
1063 | /* set the protocol */ | |
1064 | ioc3_set_proto(port, IS_RS232(the_port->line) ? PROTO_RS232 : | |
1065 | PROTO_RS422); | |
1066 | return 0; | |
1067 | } | |
1068 | ||
1069 | /* | |
1070 | * ioc3_cb_output_lowat - called when the output low water mark is hit | |
1071 | * @port: port to output | |
1072 | */ | |
1073 | static void ioc3_cb_output_lowat(struct ioc3_port *port) | |
1074 | { | |
1075 | unsigned long pflags; | |
1076 | ||
1077 | /* the_port->lock is set on the call here */ | |
1078 | if (port->ip_port) { | |
1079 | spin_lock_irqsave(&port->ip_port->lock, pflags); | |
1080 | transmit_chars(port->ip_port); | |
1081 | spin_unlock_irqrestore(&port->ip_port->lock, pflags); | |
1082 | } | |
1083 | } | |
1084 | ||
1085 | /* | |
1086 | * ioc3_cb_post_ncs - called for some basic errors | |
1087 | * @port: port to use | |
1088 | * @ncs: event | |
1089 | */ | |
1090 | static void ioc3_cb_post_ncs(struct uart_port *the_port, int ncs) | |
1091 | { | |
1092 | struct uart_icount *icount; | |
1093 | ||
1094 | icount = &the_port->icount; | |
1095 | ||
1096 | if (ncs & NCS_BREAK) | |
1097 | icount->brk++; | |
1098 | if (ncs & NCS_FRAMING) | |
1099 | icount->frame++; | |
1100 | if (ncs & NCS_OVERRUN) | |
1101 | icount->overrun++; | |
1102 | if (ncs & NCS_PARITY) | |
1103 | icount->parity++; | |
1104 | } | |
1105 | ||
1106 | /** | |
1107 | * do_read - Read in bytes from the port. Return the number of bytes | |
1108 | * actually read. | |
1109 | * @the_port: port to use | |
1110 | * @buf: place to put the stuff we read | |
1111 | * @len: how big 'buf' is | |
1112 | */ | |
1113 | ||
1114 | static inline int do_read(struct uart_port *the_port, char *buf, int len) | |
1115 | { | |
1116 | int prod_ptr, cons_ptr, total; | |
1117 | struct ioc3_port *port = get_ioc3_port(the_port); | |
1118 | struct ring *inring; | |
1119 | struct ring_entry *entry; | |
1120 | struct port_hooks *hooks = port->ip_hooks; | |
1121 | int byte_num; | |
1122 | char *sc; | |
1123 | int loop_counter; | |
1124 | ||
1125 | BUG_ON(!(len >= 0)); | |
1126 | BUG_ON(!port); | |
1127 | ||
1128 | /* There is a nasty timing issue in the IOC3. When the rx_timer | |
1129 | * expires or the rx_high condition arises, we take an interrupt. | |
1130 | * At some point while servicing the interrupt, we read bytes from | |
1131 | * the ring buffer and re-arm the rx_timer. However the rx_timer is | |
1132 | * not started until the first byte is received *after* it is armed, | |
1133 | * and any bytes pending in the rx construction buffers are not drained | |
1134 | * to memory until either there are 4 bytes available or the rx_timer | |
1135 | * expires. This leads to a potential situation where data is left | |
1136 | * in the construction buffers forever - 1 to 3 bytes were received | |
1137 | * after the interrupt was generated but before the rx_timer was | |
1138 | * re-armed. At that point as long as no subsequent bytes are received | |
1139 | * the timer will never be started and the bytes will remain in the | |
1140 | * construction buffer forever. The solution is to execute a DRAIN | |
1141 | * command after rearming the timer. This way any bytes received before | |
1142 | * the DRAIN will be drained to memory, and any bytes received after | |
1143 | * the DRAIN will start the TIMER and be drained when it expires. | |
1144 | * Luckily, this only needs to be done when the DMA buffer is empty | |
1145 | * since there is no requirement that this function return all | |
1146 | * available data as long as it returns some. | |
1147 | */ | |
1148 | /* Re-arm the timer */ | |
1149 | ||
1150 | writel(port->ip_rx_cons | SRCIR_ARM, &port->ip_serial_regs->srcir); | |
1151 | ||
1152 | prod_ptr = readl(&port->ip_serial_regs->srpir) & PROD_CONS_MASK; | |
1153 | cons_ptr = port->ip_rx_cons; | |
1154 | ||
1155 | if (prod_ptr == cons_ptr) { | |
1156 | int reset_dma = 0; | |
1157 | ||
1158 | /* Input buffer appears empty, do a flush. */ | |
1159 | ||
1160 | /* DMA must be enabled for this to work. */ | |
1161 | if (!(port->ip_sscr & SSCR_DMA_EN)) { | |
1162 | port->ip_sscr |= SSCR_DMA_EN; | |
1163 | reset_dma = 1; | |
1164 | } | |
1165 | ||
1166 | /* Potential race condition: we must reload the srpir after | |
1167 | * issuing the drain command, otherwise we could think the rx | |
1168 | * buffer is empty, then take a very long interrupt, and when | |
1169 | * we come back it's full and we wait forever for the drain to | |
1170 | * complete. | |
1171 | */ | |
1172 | writel(port->ip_sscr | SSCR_RX_DRAIN, | |
1173 | &port->ip_serial_regs->sscr); | |
1174 | prod_ptr = readl(&port->ip_serial_regs->srpir) & PROD_CONS_MASK; | |
1175 | ||
1176 | /* We must not wait for the DRAIN to complete unless there are | |
1177 | * at least 8 bytes (2 ring entries) available to receive the | |
1178 | * data otherwise the DRAIN will never complete and we'll | |
1179 | * deadlock here. | |
1180 | * In fact, to make things easier, I'll just ignore the flush if | |
1181 | * there is any data at all now available. | |
1182 | */ | |
1183 | if (prod_ptr == cons_ptr) { | |
1184 | loop_counter = 0; | |
1185 | while (readl(&port->ip_serial_regs->sscr) & | |
1186 | SSCR_RX_DRAIN) { | |
1187 | loop_counter++; | |
1188 | if (loop_counter > MAXITER) | |
1189 | return -1; | |
1190 | } | |
1191 | ||
1192 | /* SIGH. We have to reload the prod_ptr *again* since | |
1193 | * the drain may have caused it to change | |
1194 | */ | |
1195 | prod_ptr = readl(&port->ip_serial_regs->srpir) | |
1196 | & PROD_CONS_MASK; | |
1197 | } | |
1198 | if (reset_dma) { | |
1199 | port->ip_sscr &= ~SSCR_DMA_EN; | |
1200 | writel(port->ip_sscr, &port->ip_serial_regs->sscr); | |
1201 | } | |
1202 | } | |
1203 | inring = port->ip_inring; | |
1204 | port->ip_flags &= ~READ_ABORTED; | |
1205 | ||
1206 | total = 0; | |
1207 | loop_counter = 0xfffff; /* to avoid hangs */ | |
1208 | ||
1209 | /* Grab bytes from the hardware */ | |
1210 | while ((prod_ptr != cons_ptr) && (len > 0)) { | |
1211 | entry = (struct ring_entry *)((caddr_t) inring + cons_ptr); | |
1212 | ||
1213 | if (loop_counter-- <= 0) { | |
1214 | printk(KERN_WARNING "IOC3 serial: " | |
1215 | "possible hang condition/" | |
1216 | "port stuck on read (line %d).\n", | |
1217 | the_port->line); | |
1218 | break; | |
1219 | } | |
1220 | ||
1221 | /* According to the producer pointer, this ring entry | |
1222 | * must contain some data. But if the PIO happened faster | |
1223 | * than the DMA, the data may not be available yet, so let's | |
1224 | * wait until it arrives. | |
1225 | */ | |
1226 | if ((entry->ring_allsc & RING_ANY_VALID) == 0) { | |
1227 | /* Indicate the read is aborted so we don't disable | |
1228 | * the interrupt thinking that the consumer is | |
1229 | * congested. | |
1230 | */ | |
1231 | port->ip_flags |= READ_ABORTED; | |
1232 | len = 0; | |
1233 | break; | |
1234 | } | |
1235 | ||
1236 | /* Load the bytes/status out of the ring entry */ | |
1237 | for (byte_num = 0; byte_num < 4 && len > 0; byte_num++) { | |
1238 | sc = &(entry->ring_sc[byte_num]); | |
1239 | ||
1240 | /* Check for change in modem state or overrun */ | |
1241 | if ((*sc & RXSB_MODEM_VALID) | |
1242 | && (port->ip_notify & N_DDCD)) { | |
1243 | /* Notify upper layer if DCD dropped */ | |
1244 | if ((port->ip_flags & DCD_ON) | |
1245 | && !(*sc & RXSB_DCD)) { | |
1246 | /* If we have already copied some data, | |
1247 | * return it. We'll pick up the carrier | |
1248 | * drop on the next pass. That way we | |
1249 | * don't throw away the data that has | |
1250 | * already been copied back to | |
1251 | * the caller's buffer. | |
1252 | */ | |
1253 | if (total > 0) { | |
1254 | len = 0; | |
1255 | break; | |
1256 | } | |
1257 | port->ip_flags &= ~DCD_ON; | |
1258 | ||
1259 | /* Turn off this notification so the | |
1260 | * carrier drop protocol won't see it | |
1261 | * again when it does a read. | |
1262 | */ | |
1263 | *sc &= ~RXSB_MODEM_VALID; | |
1264 | ||
1265 | /* To keep things consistent, we need | |
1266 | * to update the consumer pointer so | |
1267 | * the next reader won't come in and | |
1268 | * try to read the same ring entries | |
1269 | * again. This must be done here before | |
1270 | * the dcd change. | |
1271 | */ | |
1272 | ||
1273 | if ((entry->ring_allsc & RING_ANY_VALID) | |
1274 | == 0) { | |
1275 | cons_ptr += (int)sizeof | |
1276 | (struct ring_entry); | |
1277 | cons_ptr &= PROD_CONS_MASK; | |
1278 | } | |
1279 | writel(cons_ptr, | |
1280 | &port->ip_serial_regs->srcir); | |
1281 | port->ip_rx_cons = cons_ptr; | |
1282 | ||
1283 | /* Notify upper layer of carrier drop */ | |
1284 | if ((port->ip_notify & N_DDCD) | |
1285 | && port->ip_port) { | |
1286 | uart_handle_dcd_change | |
1287 | (port->ip_port, 0); | |
1288 | wake_up_interruptible | |
1289 | (&the_port->info-> | |
1290 | delta_msr_wait); | |
1291 | } | |
1292 | ||
1293 | /* If we had any data to return, we | |
1294 | * would have returned it above. | |
1295 | */ | |
1296 | return 0; | |
1297 | } | |
1298 | } | |
1299 | if (*sc & RXSB_MODEM_VALID) { | |
1300 | /* Notify that an input overrun occurred */ | |
1301 | if ((*sc & RXSB_OVERRUN) | |
1302 | && (port->ip_notify & N_OVERRUN_ERROR)) { | |
1303 | ioc3_cb_post_ncs(the_port, NCS_OVERRUN); | |
1304 | } | |
1305 | /* Don't look at this byte again */ | |
1306 | *sc &= ~RXSB_MODEM_VALID; | |
1307 | } | |
1308 | ||
1309 | /* Check for valid data or RX errors */ | |
1310 | if ((*sc & RXSB_DATA_VALID) && | |
1311 | ((*sc & (RXSB_PAR_ERR | |
1312 | | RXSB_FRAME_ERR | RXSB_BREAK)) | |
1313 | && (port->ip_notify & (N_PARITY_ERROR | |
1314 | | N_FRAMING_ERROR | |
1315 | | N_BREAK)))) { | |
1316 | /* There is an error condition on the next byte. | |
1317 | * If we have already transferred some bytes, | |
1318 | * we'll stop here. Otherwise if this is the | |
1319 | * first byte to be read, we'll just transfer | |
1320 | * it alone after notifying the | |
1321 | * upper layer of its status. | |
1322 | */ | |
1323 | if (total > 0) { | |
1324 | len = 0; | |
1325 | break; | |
1326 | } else { | |
1327 | if ((*sc & RXSB_PAR_ERR) && | |
1328 | (port-> | |
1329 | ip_notify & N_PARITY_ERROR)) { | |
1330 | ioc3_cb_post_ncs(the_port, | |
1331 | NCS_PARITY); | |
1332 | } | |
1333 | if ((*sc & RXSB_FRAME_ERR) && | |
1334 | (port-> | |
1335 | ip_notify & N_FRAMING_ERROR)) { | |
1336 | ioc3_cb_post_ncs(the_port, | |
1337 | NCS_FRAMING); | |
1338 | } | |
1339 | if ((*sc & RXSB_BREAK) | |
1340 | && (port->ip_notify & N_BREAK)) { | |
1341 | ioc3_cb_post_ncs | |
1342 | (the_port, NCS_BREAK); | |
1343 | } | |
1344 | len = 1; | |
1345 | } | |
1346 | } | |
1347 | if (*sc & RXSB_DATA_VALID) { | |
1348 | *sc &= ~RXSB_DATA_VALID; | |
1349 | *buf = entry->ring_data[byte_num]; | |
1350 | buf++; | |
1351 | len--; | |
1352 | total++; | |
1353 | } | |
1354 | } | |
1355 | ||
1356 | /* If we used up this entry entirely, go on to the next one, | |
1357 | * otherwise we must have run out of buffer space, so | |
1358 | * leave the consumer pointer here for the next read in case | |
1359 | * there are still unread bytes in this entry. | |
1360 | */ | |
1361 | if ((entry->ring_allsc & RING_ANY_VALID) == 0) { | |
1362 | cons_ptr += (int)sizeof(struct ring_entry); | |
1363 | cons_ptr &= PROD_CONS_MASK; | |
1364 | } | |
1365 | } | |
1366 | ||
1367 | /* Update consumer pointer and re-arm rx timer interrupt */ | |
1368 | writel(cons_ptr, &port->ip_serial_regs->srcir); | |
1369 | port->ip_rx_cons = cons_ptr; | |
1370 | ||
1371 | /* If we have now dipped below the rx high water mark and we have | |
1372 | * rx_high interrupt turned off, we can now turn it back on again. | |
1373 | */ | |
1374 | if ((port->ip_flags & INPUT_HIGH) && (((prod_ptr - cons_ptr) | |
1375 | & PROD_CONS_MASK) < | |
1376 | ((port-> | |
1377 | ip_sscr & | |
1378 | SSCR_RX_THRESHOLD) | |
1379 | << PROD_CONS_PTR_OFF))) { | |
1380 | port->ip_flags &= ~INPUT_HIGH; | |
1381 | enable_intrs(port, hooks->intr_rx_high); | |
1382 | } | |
1383 | return total; | |
1384 | } | |
1385 | ||
1386 | /** | |
1387 | * receive_chars - upper level read. | |
1388 | * @the_port: port to read from | |
1389 | */ | |
1390 | static int receive_chars(struct uart_port *the_port) | |
1391 | { | |
1392 | struct tty_struct *tty; | |
1393 | unsigned char ch[MAX_CHARS]; | |
1394 | int read_count = 0, read_room, flip = 0; | |
1395 | struct uart_info *info = the_port->info; | |
1396 | struct ioc3_port *port = get_ioc3_port(the_port); | |
1397 | unsigned long pflags; | |
1398 | ||
1399 | /* Make sure all the pointers are "good" ones */ | |
1400 | if (!info) | |
1401 | return 0; | |
1402 | if (!info->tty) | |
1403 | return 0; | |
1404 | ||
1405 | if (!(port->ip_flags & INPUT_ENABLE)) | |
1406 | return 0; | |
1407 | ||
1408 | spin_lock_irqsave(&the_port->lock, pflags); | |
1409 | tty = info->tty; | |
1410 | ||
1411 | read_count = do_read(the_port, ch, MAX_CHARS); | |
1412 | if (read_count > 0) { | |
1413 | flip = 1; | |
1414 | read_room = tty_buffer_request_room(tty, read_count); | |
1415 | tty_insert_flip_string(tty, ch, read_room); | |
1416 | the_port->icount.rx += read_count; | |
1417 | } | |
1418 | spin_unlock_irqrestore(&the_port->lock, pflags); | |
1419 | ||
1420 | if (flip) | |
1421 | tty_flip_buffer_push(tty); | |
1422 | ||
1423 | return read_count; | |
1424 | } | |
1425 | ||
1426 | /** | |
1427 | * ioc3uart_intr_one - lowest level (per port) interrupt handler. | |
1428 | * @is : submodule | |
1429 | * @idd: driver data | |
1430 | * @pending: interrupts to handle | |
1431 | * @regs: pt_regs | |
1432 | */ | |
1433 | ||
1434 | static int inline | |
1435 | ioc3uart_intr_one(struct ioc3_submodule *is, | |
1436 | struct ioc3_driver_data *idd, | |
1437 | unsigned int pending, struct pt_regs *regs) | |
1438 | { | |
1439 | int port_num = GET_PORT_FROM_SIO_IR(pending); | |
1440 | struct port_hooks *hooks; | |
1441 | unsigned int rx_high_rd_aborted = 0; | |
1442 | unsigned long flags; | |
1443 | struct uart_port *the_port; | |
1444 | struct ioc3_port *port; | |
1445 | int loop_counter; | |
1446 | struct ioc3_card *card_ptr; | |
1447 | unsigned int sio_ir; | |
1448 | ||
1449 | card_ptr = idd->data[is->id]; | |
1450 | port = card_ptr->ic_port[port_num].icp_port; | |
1451 | hooks = port->ip_hooks; | |
1452 | ||
1453 | /* Possible race condition here: The tx_mt interrupt bit may be | |
1454 | * cleared without the intervention of the interrupt handler, | |
1455 | * e.g. by a write. If the top level interrupt handler reads a | |
1456 | * tx_mt, then some other processor does a write, starting up | |
1457 | * output, then we come in here, see the tx_mt and stop DMA, the | |
1458 | * output started by the other processor will hang. Thus we can | |
1459 | * only rely on tx_mt being legitimate if it is read while the | |
1460 | * port lock is held. Therefore this bit must be ignored in the | |
1461 | * passed in interrupt mask which was read by the top level | |
1462 | * interrupt handler since the port lock was not held at the time | |
1463 | * it was read. We can only rely on this bit being accurate if it | |
1464 | * is read while the port lock is held. So we'll clear it for now, | |
1465 | * and reload it later once we have the port lock. | |
1466 | */ | |
1467 | ||
1468 | sio_ir = pending & ~(hooks->intr_tx_mt); | |
1469 | spin_lock_irqsave(&port->ip_lock, flags); | |
1470 | ||
1471 | loop_counter = MAXITER; /* to avoid hangs */ | |
1472 | ||
1473 | do { | |
1474 | uint32_t shadow; | |
1475 | ||
1476 | if (loop_counter-- <= 0) { | |
1477 | printk(KERN_WARNING "IOC3 serial: " | |
1478 | "possible hang condition/" | |
1479 | "port stuck on interrupt (line %d).\n", | |
1480 | ((struct uart_port *)port->ip_port)->line); | |
1481 | break; | |
1482 | } | |
1483 | /* Handle a DCD change */ | |
1484 | if (sio_ir & hooks->intr_delta_dcd) { | |
1485 | ioc3_ack(is, idd, hooks->intr_delta_dcd); | |
1486 | shadow = readl(&port->ip_serial_regs->shadow); | |
1487 | ||
1488 | if ((port->ip_notify & N_DDCD) | |
1489 | && (shadow & SHADOW_DCD) | |
1490 | && (port->ip_port)) { | |
1491 | the_port = port->ip_port; | |
1492 | uart_handle_dcd_change(the_port, | |
1493 | shadow & SHADOW_DCD); | |
1494 | wake_up_interruptible | |
1495 | (&the_port->info->delta_msr_wait); | |
1496 | } else if ((port->ip_notify & N_DDCD) | |
1497 | && !(shadow & SHADOW_DCD)) { | |
1498 | /* Flag delta DCD/no DCD */ | |
1499 | uart_handle_dcd_change(port->ip_port, | |
1500 | shadow & SHADOW_DCD); | |
1501 | port->ip_flags |= DCD_ON; | |
1502 | } | |
1503 | } | |
1504 | ||
1505 | /* Handle a CTS change */ | |
1506 | if (sio_ir & hooks->intr_delta_cts) { | |
1507 | ioc3_ack(is, idd, hooks->intr_delta_cts); | |
1508 | shadow = readl(&port->ip_serial_regs->shadow); | |
1509 | ||
1510 | if ((port->ip_notify & N_DCTS) && (port->ip_port)) { | |
1511 | the_port = port->ip_port; | |
1512 | uart_handle_cts_change(the_port, shadow | |
1513 | & SHADOW_CTS); | |
1514 | wake_up_interruptible | |
1515 | (&the_port->info->delta_msr_wait); | |
1516 | } | |
1517 | } | |
1518 | ||
1519 | /* rx timeout interrupt. Must be some data available. Put this | |
1520 | * before the check for rx_high since servicing this condition | |
1521 | * may cause that condition to clear. | |
1522 | */ | |
1523 | if (sio_ir & hooks->intr_rx_timer) { | |
1524 | ioc3_ack(is, idd, hooks->intr_rx_timer); | |
1525 | if ((port->ip_notify & N_DATA_READY) | |
1526 | && (port->ip_port)) { | |
1527 | receive_chars(port->ip_port); | |
1528 | } | |
1529 | } | |
1530 | ||
1531 | /* rx high interrupt. Must be after rx_timer. */ | |
1532 | else if (sio_ir & hooks->intr_rx_high) { | |
1533 | /* Data available, notify upper layer */ | |
1534 | if ((port->ip_notify & N_DATA_READY) && port->ip_port) { | |
1535 | receive_chars(port->ip_port); | |
1536 | } | |
1537 | ||
1538 | /* We can't ACK this interrupt. If receive_chars didn't | |
1539 | * cause the condition to clear, we'll have to disable | |
1540 | * the interrupt until the data is drained. | |
1541 | * If the read was aborted, don't disable the interrupt | |
1542 | * as this may cause us to hang indefinitely. An | |
1543 | * aborted read generally means that this interrupt | |
1544 | * hasn't been delivered to the cpu yet anyway, even | |
1545 | * though we see it as asserted when we read the sio_ir. | |
1546 | */ | |
1547 | if ((sio_ir = PENDING(card_ptr, idd)) | |
1548 | & hooks->intr_rx_high) { | |
1549 | if (port->ip_flags & READ_ABORTED) { | |
1550 | rx_high_rd_aborted++; | |
1551 | } | |
1552 | else { | |
1553 | card_ptr->ic_enable &= ~hooks->intr_rx_high; | |
1554 | port->ip_flags |= INPUT_HIGH; | |
1555 | } | |
1556 | } | |
1557 | } | |
1558 | ||
1559 | /* We got a low water interrupt: notify upper layer to | |
1560 | * send more data. Must come before tx_mt since servicing | |
1561 | * this condition may cause that condition to clear. | |
1562 | */ | |
1563 | if (sio_ir & hooks->intr_tx_explicit) { | |
1564 | port->ip_flags &= ~LOWAT_WRITTEN; | |
1565 | ioc3_ack(is, idd, hooks->intr_tx_explicit); | |
1566 | if (port->ip_notify & N_OUTPUT_LOWAT) | |
1567 | ioc3_cb_output_lowat(port); | |
1568 | } | |
1569 | ||
1570 | /* Handle tx_mt. Must come after tx_explicit. */ | |
1571 | else if (sio_ir & hooks->intr_tx_mt) { | |
1572 | /* If we are expecting a lowat notification | |
1573 | * and we get to this point it probably means that for | |
1574 | * some reason the tx_explicit didn't work as expected | |
1575 | * (that can legitimately happen if the output buffer is | |
1576 | * filled up in just the right way). | |
1577 | * So send the notification now. | |
1578 | */ | |
1579 | if (port->ip_notify & N_OUTPUT_LOWAT) { | |
1580 | ioc3_cb_output_lowat(port); | |
1581 | ||
1582 | /* We need to reload the sio_ir since the lowat | |
1583 | * call may have caused another write to occur, | |
1584 | * clearing the tx_mt condition. | |
1585 | */ | |
1586 | sio_ir = PENDING(card_ptr, idd); | |
1587 | } | |
1588 | ||
1589 | /* If the tx_mt condition still persists even after the | |
1590 | * lowat call, we've got some work to do. | |
1591 | */ | |
1592 | if (sio_ir & hooks->intr_tx_mt) { | |
1593 | /* If we are not currently expecting DMA input, | |
1594 | * and the transmitter has just gone idle, | |
1595 | * there is no longer any reason for DMA, so | |
1596 | * disable it. | |
1597 | */ | |
1598 | if (!(port->ip_notify | |
1599 | & (N_DATA_READY | N_DDCD))) { | |
1600 | BUG_ON(!(port->ip_sscr | |
1601 | & SSCR_DMA_EN)); | |
1602 | port->ip_sscr &= ~SSCR_DMA_EN; | |
1603 | writel(port->ip_sscr, | |
1604 | &port->ip_serial_regs->sscr); | |
1605 | } | |
1606 | /* Prevent infinite tx_mt interrupt */ | |
1607 | card_ptr->ic_enable &= ~hooks->intr_tx_mt; | |
1608 | } | |
1609 | } | |
1610 | sio_ir = PENDING(card_ptr, idd); | |
1611 | ||
1612 | /* if the read was aborted and only hooks->intr_rx_high, | |
1613 | * clear hooks->intr_rx_high, so we do not loop forever. | |
1614 | */ | |
1615 | ||
1616 | if (rx_high_rd_aborted && (sio_ir == hooks->intr_rx_high)) { | |
1617 | sio_ir &= ~hooks->intr_rx_high; | |
1618 | } | |
1619 | } while (sio_ir & hooks->intr_all); | |
1620 | ||
1621 | spin_unlock_irqrestore(&port->ip_lock, flags); | |
1622 | ioc3_enable(is, idd, card_ptr->ic_enable); | |
1623 | return 0; | |
1624 | } | |
1625 | ||
1626 | /** | |
1627 | * ioc3uart_intr - field all serial interrupts | |
1628 | * @is : submodule | |
1629 | * @idd: driver data | |
1630 | * @pending: interrupts to handle | |
1631 | * @regs: pt_regs | |
1632 | * | |
1633 | */ | |
1634 | ||
1635 | static int ioc3uart_intr(struct ioc3_submodule *is, | |
1636 | struct ioc3_driver_data *idd, | |
1637 | unsigned int pending, struct pt_regs *regs) | |
1638 | { | |
1639 | int ret = 0; | |
1640 | ||
1641 | /* | |
1642 | * The upper level interrupt handler sends interrupts for both ports | |
1643 | * here. So we need to call for each port with its interrupts. | |
1644 | */ | |
1645 | ||
1646 | if (pending & SIO_IR_SA) | |
1647 | ret |= ioc3uart_intr_one(is, idd, pending & SIO_IR_SA, regs); | |
1648 | if (pending & SIO_IR_SB) | |
1649 | ret |= ioc3uart_intr_one(is, idd, pending & SIO_IR_SB, regs); | |
1650 | ||
1651 | return ret; | |
1652 | } | |
1653 | ||
1654 | /** | |
1655 | * ic3_type | |
1656 | * @port: Port to operate with (we ignore since we only have one port) | |
1657 | * | |
1658 | */ | |
1659 | static const char *ic3_type(struct uart_port *the_port) | |
1660 | { | |
1661 | if (IS_RS232(the_port->line)) | |
1662 | return "SGI IOC3 Serial [rs232]"; | |
1663 | else | |
1664 | return "SGI IOC3 Serial [rs422]"; | |
1665 | } | |
1666 | ||
1667 | /** | |
1668 | * ic3_tx_empty - Is the transmitter empty? | |
1669 | * @port: Port to operate on | |
1670 | * | |
1671 | */ | |
1672 | static unsigned int ic3_tx_empty(struct uart_port *the_port) | |
1673 | { | |
1674 | unsigned int ret = 0; | |
1675 | struct ioc3_port *port = get_ioc3_port(the_port); | |
1676 | ||
1677 | if (readl(&port->ip_serial_regs->shadow) & SHADOW_TEMT) | |
1678 | ret = TIOCSER_TEMT; | |
1679 | return ret; | |
1680 | } | |
1681 | ||
1682 | /** | |
1683 | * ic3_stop_tx - stop the transmitter | |
1684 | * @port: Port to operate on | |
1685 | * | |
1686 | */ | |
1687 | static void ic3_stop_tx(struct uart_port *the_port) | |
1688 | { | |
1689 | struct ioc3_port *port = get_ioc3_port(the_port); | |
1690 | ||
1691 | if (port) | |
1692 | set_notification(port, N_OUTPUT_LOWAT, 0); | |
1693 | } | |
1694 | ||
1695 | /** | |
1696 | * ic3_stop_rx - stop the receiver | |
1697 | * @port: Port to operate on | |
1698 | * | |
1699 | */ | |
1700 | static void ic3_stop_rx(struct uart_port *the_port) | |
1701 | { | |
1702 | struct ioc3_port *port = get_ioc3_port(the_port); | |
1703 | ||
1704 | if (port) | |
1705 | port->ip_flags &= ~INPUT_ENABLE; | |
1706 | } | |
1707 | ||
1708 | /** | |
1709 | * null_void_function | |
1710 | * @port: Port to operate on | |
1711 | * | |
1712 | */ | |
1713 | static void null_void_function(struct uart_port *the_port) | |
1714 | { | |
1715 | } | |
1716 | ||
1717 | /** | |
1718 | * ic3_shutdown - shut down the port - free irq and disable | |
1719 | * @port: port to shut down | |
1720 | * | |
1721 | */ | |
1722 | static void ic3_shutdown(struct uart_port *the_port) | |
1723 | { | |
1724 | unsigned long port_flags; | |
1725 | struct ioc3_port *port; | |
1726 | struct uart_info *info; | |
1727 | ||
1728 | port = get_ioc3_port(the_port); | |
1729 | if (!port) | |
1730 | return; | |
1731 | ||
1732 | info = the_port->info; | |
1733 | wake_up_interruptible(&info->delta_msr_wait); | |
1734 | ||
1735 | spin_lock_irqsave(&the_port->lock, port_flags); | |
1736 | set_notification(port, N_ALL, 0); | |
1737 | spin_unlock_irqrestore(&the_port->lock, port_flags); | |
1738 | } | |
1739 | ||
1740 | /** | |
1741 | * ic3_set_mctrl - set control lines (dtr, rts, etc) | |
1742 | * @port: Port to operate on | |
1743 | * @mctrl: Lines to set/unset | |
1744 | * | |
1745 | */ | |
1746 | static void ic3_set_mctrl(struct uart_port *the_port, unsigned int mctrl) | |
1747 | { | |
1748 | unsigned char mcr = 0; | |
1749 | ||
1750 | if (mctrl & TIOCM_RTS) | |
1751 | mcr |= UART_MCR_RTS; | |
1752 | if (mctrl & TIOCM_DTR) | |
1753 | mcr |= UART_MCR_DTR; | |
1754 | if (mctrl & TIOCM_OUT1) | |
1755 | mcr |= UART_MCR_OUT1; | |
1756 | if (mctrl & TIOCM_OUT2) | |
1757 | mcr |= UART_MCR_OUT2; | |
1758 | if (mctrl & TIOCM_LOOP) | |
1759 | mcr |= UART_MCR_LOOP; | |
1760 | ||
1761 | set_mcr(the_port, mcr, SHADOW_DTR); | |
1762 | } | |
1763 | ||
1764 | /** | |
1765 | * ic3_get_mctrl - get control line info | |
1766 | * @port: port to operate on | |
1767 | * | |
1768 | */ | |
1769 | static unsigned int ic3_get_mctrl(struct uart_port *the_port) | |
1770 | { | |
1771 | struct ioc3_port *port = get_ioc3_port(the_port); | |
1772 | uint32_t shadow; | |
1773 | unsigned int ret = 0; | |
1774 | ||
1775 | if (!port) | |
1776 | return 0; | |
1777 | ||
1778 | shadow = readl(&port->ip_serial_regs->shadow); | |
1779 | if (shadow & SHADOW_DCD) | |
1780 | ret |= TIOCM_CD; | |
1781 | if (shadow & SHADOW_DR) | |
1782 | ret |= TIOCM_DSR; | |
1783 | if (shadow & SHADOW_CTS) | |
1784 | ret |= TIOCM_CTS; | |
1785 | return ret; | |
1786 | } | |
1787 | ||
1788 | /** | |
1789 | * ic3_start_tx - Start transmitter. Called with the_port->lock | |
1790 | * @port: Port to operate on | |
1791 | * | |
1792 | */ | |
1793 | static void ic3_start_tx(struct uart_port *the_port) | |
1794 | { | |
1795 | struct ioc3_port *port = get_ioc3_port(the_port); | |
1796 | ||
1797 | if (port) { | |
1798 | set_notification(port, N_OUTPUT_LOWAT, 1); | |
1799 | enable_intrs(port, port->ip_hooks->intr_tx_mt); | |
1800 | } | |
1801 | } | |
1802 | ||
1803 | /** | |
1804 | * ic3_break_ctl - handle breaks | |
1805 | * @port: Port to operate on | |
1806 | * @break_state: Break state | |
1807 | * | |
1808 | */ | |
1809 | static void ic3_break_ctl(struct uart_port *the_port, int break_state) | |
1810 | { | |
1811 | } | |
1812 | ||
1813 | /** | |
1814 | * ic3_startup - Start up the serial port - always return 0 (We're always on) | |
1815 | * @port: Port to operate on | |
1816 | * | |
1817 | */ | |
1818 | static int ic3_startup(struct uart_port *the_port) | |
1819 | { | |
1820 | int retval; | |
1821 | struct ioc3_port *port; | |
1822 | struct ioc3_card *card_ptr; | |
1823 | unsigned long port_flags; | |
1824 | ||
1825 | if (!the_port) { | |
1826 | NOT_PROGRESS(); | |
1827 | return -ENODEV; | |
1828 | } | |
1829 | port = get_ioc3_port(the_port); | |
1830 | if (!port) { | |
1831 | NOT_PROGRESS(); | |
1832 | return -ENODEV; | |
1833 | } | |
1834 | card_ptr = port->ip_card; | |
1835 | port->ip_port = the_port; | |
1836 | ||
1837 | if (!card_ptr) { | |
1838 | NOT_PROGRESS(); | |
1839 | return -ENODEV; | |
1840 | } | |
1841 | ||
1842 | /* Start up the serial port */ | |
1843 | spin_lock_irqsave(&the_port->lock, port_flags); | |
1844 | retval = ic3_startup_local(the_port); | |
1845 | spin_unlock_irqrestore(&the_port->lock, port_flags); | |
1846 | return retval; | |
1847 | } | |
1848 | ||
1849 | /** | |
1850 | * ic3_set_termios - set termios stuff | |
1851 | * @port: port to operate on | |
1852 | * @termios: New settings | |
1853 | * @termios: Old | |
1854 | * | |
1855 | */ | |
1856 | static void | |
1857 | ic3_set_termios(struct uart_port *the_port, | |
1858 | struct termios *termios, struct termios *old_termios) | |
1859 | { | |
1860 | unsigned long port_flags; | |
1861 | ||
1862 | spin_lock_irqsave(&the_port->lock, port_flags); | |
1863 | ioc3_change_speed(the_port, termios, old_termios); | |
1864 | spin_unlock_irqrestore(&the_port->lock, port_flags); | |
1865 | } | |
1866 | ||
1867 | /** | |
1868 | * ic3_request_port - allocate resources for port - no op.... | |
1869 | * @port: port to operate on | |
1870 | * | |
1871 | */ | |
1872 | static int ic3_request_port(struct uart_port *port) | |
1873 | { | |
1874 | return 0; | |
1875 | } | |
1876 | ||
1877 | /* Associate the uart functions above - given to serial core */ | |
1878 | static struct uart_ops ioc3_ops = { | |
1879 | .tx_empty = ic3_tx_empty, | |
1880 | .set_mctrl = ic3_set_mctrl, | |
1881 | .get_mctrl = ic3_get_mctrl, | |
1882 | .stop_tx = ic3_stop_tx, | |
1883 | .start_tx = ic3_start_tx, | |
1884 | .stop_rx = ic3_stop_rx, | |
1885 | .enable_ms = null_void_function, | |
1886 | .break_ctl = ic3_break_ctl, | |
1887 | .startup = ic3_startup, | |
1888 | .shutdown = ic3_shutdown, | |
1889 | .set_termios = ic3_set_termios, | |
1890 | .type = ic3_type, | |
1891 | .release_port = null_void_function, | |
1892 | .request_port = ic3_request_port, | |
1893 | }; | |
1894 | ||
1895 | /* | |
1896 | * Boot-time initialization code | |
1897 | */ | |
1898 | ||
1899 | static struct uart_driver ioc3_uart = { | |
1900 | .owner = THIS_MODULE, | |
1901 | .driver_name = "ioc3_serial", | |
1902 | .dev_name = DEVICE_NAME, | |
1903 | .major = DEVICE_MAJOR, | |
1904 | .minor = DEVICE_MINOR, | |
1905 | .nr = MAX_LOGICAL_PORTS | |
1906 | }; | |
1907 | ||
1908 | /** | |
1909 | * ioc3_serial_core_attach - register with serial core | |
1910 | * This is done during pci probing | |
1911 | * @is: submodule struct for this | |
1912 | * @idd: handle for this card | |
1913 | */ | |
1914 | static inline int ioc3_serial_core_attach( struct ioc3_submodule *is, | |
1915 | struct ioc3_driver_data *idd) | |
1916 | { | |
1917 | struct ioc3_port *port; | |
1918 | struct uart_port *the_port; | |
1919 | struct ioc3_card *card_ptr = idd->data[is->id]; | |
1920 | int ii, phys_port; | |
1921 | struct pci_dev *pdev = idd->pdev; | |
1922 | ||
1923 | DPRINT_CONFIG(("%s: attach pdev 0x%p - card_ptr 0x%p\n", | |
1924 | __FUNCTION__, pdev, (void *)card_ptr)); | |
1925 | ||
1926 | if (!card_ptr) | |
1927 | return -ENODEV; | |
1928 | ||
1929 | /* once around for each logical port on this card */ | |
1930 | for (ii = 0; ii < LOGICAL_PORTS_PER_CARD; ii++) { | |
1931 | phys_port = GET_PHYSICAL_PORT(ii); | |
1932 | the_port = &card_ptr->ic_port[phys_port]. | |
1933 | icp_uart_port[GET_LOGICAL_PORT(ii)]; | |
1934 | port = card_ptr->ic_port[phys_port].icp_port; | |
1935 | port->ip_port = the_port; | |
1936 | ||
1937 | DPRINT_CONFIG(("%s: attach the_port 0x%p / port 0x%p [%d/%d]\n", | |
1938 | __FUNCTION__, (void *)the_port, (void *)port, | |
1939 | phys_port, ii)); | |
1940 | ||
1941 | /* membase, iobase and mapbase just need to be non-0 */ | |
1942 | the_port->membase = (unsigned char __iomem *)1; | |
1943 | the_port->iobase = (pdev->bus->number << 16) | ii; | |
1944 | the_port->line = (Num_of_ioc3_cards << 2) | ii; | |
1945 | the_port->mapbase = 1; | |
1946 | the_port->type = PORT_16550A; | |
1947 | the_port->fifosize = FIFO_SIZE; | |
1948 | the_port->ops = &ioc3_ops; | |
1949 | the_port->irq = idd->irq_io; | |
1950 | the_port->dev = &pdev->dev; | |
1951 | ||
1952 | if (uart_add_one_port(&ioc3_uart, the_port) < 0) { | |
1953 | printk(KERN_WARNING | |
1954 | "%s: unable to add port %d bus %d\n", | |
1955 | __FUNCTION__, the_port->line, pdev->bus->number); | |
1956 | } else { | |
1957 | DPRINT_CONFIG(("IOC3 serial port %d irq %d bus %d\n", | |
1958 | the_port->line, the_port->irq, pdev->bus->number)); | |
1959 | } | |
1960 | ||
1961 | /* all ports are rs232 for now */ | |
1962 | if (IS_PHYSICAL_PORT(ii)) | |
1963 | ioc3_set_proto(port, PROTO_RS232); | |
1964 | } | |
1965 | return 0; | |
1966 | } | |
1967 | ||
1968 | /** | |
1969 | * ioc3uart_remove - register detach function | |
1970 | * @is: submodule struct for this submodule | |
1971 | * @idd: ioc3 driver data for this submodule | |
1972 | */ | |
1973 | ||
1974 | static int ioc3uart_remove(struct ioc3_submodule *is, | |
1975 | struct ioc3_driver_data *idd) | |
1976 | { | |
1977 | struct ioc3_card *card_ptr = idd->data[is->id]; | |
1978 | struct uart_port *the_port; | |
1979 | struct ioc3_port *port; | |
1980 | int ii; | |
1981 | ||
1982 | if (card_ptr) { | |
1983 | for (ii = 0; ii < LOGICAL_PORTS_PER_CARD; ii++) { | |
1984 | the_port = &card_ptr->ic_port[GET_PHYSICAL_PORT(ii)]. | |
1985 | icp_uart_port[GET_LOGICAL_PORT(ii)]; | |
1986 | if (the_port) | |
1987 | uart_remove_one_port(&ioc3_uart, the_port); | |
1988 | port = card_ptr->ic_port[GET_PHYSICAL_PORT(ii)].icp_port; | |
1989 | if (port && IS_PHYSICAL_PORT(ii) | |
1990 | && (GET_PHYSICAL_PORT(ii) == 0)) { | |
1991 | pci_free_consistent(port->ip_idd->pdev, | |
1992 | TOTAL_RING_BUF_SIZE, | |
1993 | (void *)port->ip_cpu_ringbuf, | |
1994 | port->ip_dma_ringbuf); | |
1995 | kfree(port); | |
1996 | card_ptr->ic_port[GET_PHYSICAL_PORT(ii)]. | |
1997 | icp_port = NULL; | |
1998 | } | |
1999 | } | |
2000 | kfree(card_ptr); | |
2001 | idd->data[is->id] = NULL; | |
2002 | } | |
2003 | return 0; | |
2004 | } | |
2005 | ||
2006 | /** | |
2007 | * ioc3uart_probe - card probe function called from shim driver | |
2008 | * @is: submodule struct for this submodule | |
2009 | * @idd: ioc3 driver data for this card | |
2010 | */ | |
2011 | ||
2012 | static int __devinit | |
2013 | ioc3uart_probe(struct ioc3_submodule *is, struct ioc3_driver_data *idd) | |
2014 | { | |
2015 | struct pci_dev *pdev = idd->pdev; | |
2016 | struct ioc3_card *card_ptr; | |
2017 | int ret = 0; | |
2018 | struct ioc3_port *port; | |
2019 | struct ioc3_port *ports[PORTS_PER_CARD]; | |
2020 | int phys_port; | |
2021 | ||
2022 | DPRINT_CONFIG(("%s (0x%p, 0x%p)\n", __FUNCTION__, is, idd)); | |
2023 | ||
2024 | card_ptr = kmalloc(sizeof(struct ioc3_card), GFP_KERNEL); | |
2025 | if (!card_ptr) { | |
2026 | printk(KERN_WARNING "ioc3_attach_one" | |
2027 | ": unable to get memory for the IOC3\n"); | |
2028 | return -ENOMEM; | |
2029 | } | |
2030 | memset(card_ptr, 0, sizeof(struct ioc3_card)); | |
2031 | idd->data[is->id] = card_ptr; | |
2032 | Submodule_slot = is->id; | |
2033 | ||
2034 | writel(((UARTA_BASE >> 3) << SIO_CR_SER_A_BASE_SHIFT) | | |
2035 | ((UARTB_BASE >> 3) << SIO_CR_SER_B_BASE_SHIFT) | | |
2036 | (0xf << SIO_CR_CMD_PULSE_SHIFT), &idd->vma->sio_cr); | |
2037 | ||
2038 | pci_write_config_dword(pdev, PCI_LAT, 0xff00); | |
2039 | ||
2040 | /* Enable serial port mode select generic PIO pins as outputs */ | |
2041 | ioc3_gpcr_set(idd, GPCR_UARTA_MODESEL | GPCR_UARTB_MODESEL); | |
2042 | ||
2043 | /* Create port structures for each port */ | |
2044 | for (phys_port = 0; phys_port < PORTS_PER_CARD; phys_port++) { | |
2045 | port = kmalloc(sizeof(struct ioc3_port), GFP_KERNEL); | |
2046 | if (!port) { | |
2047 | printk(KERN_WARNING | |
2048 | "IOC3 serial memory not available for port\n"); | |
2049 | goto out4; | |
2050 | } | |
2051 | memset(port, 0, sizeof(struct ioc3_port)); | |
2052 | spin_lock_init(&port->ip_lock); | |
2053 | ||
2054 | /* we need to remember the previous ones, to point back to | |
2055 | * them farther down - setting up the ring buffers. | |
2056 | */ | |
2057 | ports[phys_port] = port; | |
2058 | ||
2059 | /* init to something useful */ | |
2060 | card_ptr->ic_port[phys_port].icp_port = port; | |
2061 | port->ip_is = is; | |
2062 | port->ip_idd = idd; | |
2063 | port->ip_baud = 9600; | |
2064 | port->ip_card = card_ptr; | |
2065 | port->ip_hooks = &hooks_array[phys_port]; | |
2066 | ||
2067 | /* Setup each port */ | |
2068 | if (phys_port == 0) { | |
2069 | port->ip_serial_regs = &idd->vma->port_a; | |
2070 | port->ip_uart_regs = &idd->vma->sregs.uarta; | |
2071 | ||
2072 | DPRINT_CONFIG(("%s : Port A ip_serial_regs 0x%p " | |
2073 | "ip_uart_regs 0x%p\n", | |
2074 | __FUNCTION__, | |
2075 | (void *)port->ip_serial_regs, | |
2076 | (void *)port->ip_uart_regs)); | |
2077 | ||
2078 | /* setup ring buffers */ | |
2079 | port->ip_cpu_ringbuf = pci_alloc_consistent(pdev, | |
2080 | TOTAL_RING_BUF_SIZE, &port->ip_dma_ringbuf); | |
2081 | ||
2082 | BUG_ON(!((((int64_t) port->ip_dma_ringbuf) & | |
2083 | (TOTAL_RING_BUF_SIZE - 1)) == 0)); | |
2084 | port->ip_inring = RING(port, RX_A); | |
2085 | port->ip_outring = RING(port, TX_A); | |
2086 | DPRINT_CONFIG(("%s : Port A ip_cpu_ringbuf 0x%p " | |
2087 | "ip_dma_ringbuf 0x%p, ip_inring 0x%p " | |
2088 | "ip_outring 0x%p\n", | |
2089 | __FUNCTION__, | |
2090 | (void *)port->ip_cpu_ringbuf, | |
2091 | (void *)port->ip_dma_ringbuf, | |
2092 | (void *)port->ip_inring, | |
2093 | (void *)port->ip_outring)); | |
2094 | } | |
2095 | else { | |
2096 | port->ip_serial_regs = &idd->vma->port_b; | |
2097 | port->ip_uart_regs = &idd->vma->sregs.uartb; | |
2098 | ||
2099 | DPRINT_CONFIG(("%s : Port B ip_serial_regs 0x%p " | |
2100 | "ip_uart_regs 0x%p\n", | |
2101 | __FUNCTION__, | |
2102 | (void *)port->ip_serial_regs, | |
2103 | (void *)port->ip_uart_regs)); | |
2104 | ||
2105 | /* share the ring buffers */ | |
2106 | port->ip_dma_ringbuf = | |
2107 | ports[phys_port - 1]->ip_dma_ringbuf; | |
2108 | port->ip_cpu_ringbuf = | |
2109 | ports[phys_port - 1]->ip_cpu_ringbuf; | |
2110 | port->ip_inring = RING(port, RX_B); | |
2111 | port->ip_outring = RING(port, TX_B); | |
2112 | DPRINT_CONFIG(("%s : Port B ip_cpu_ringbuf 0x%p " | |
2113 | "ip_dma_ringbuf 0x%p, ip_inring 0x%p " | |
2114 | "ip_outring 0x%p\n", | |
2115 | __FUNCTION__, | |
2116 | (void *)port->ip_cpu_ringbuf, | |
2117 | (void *)port->ip_dma_ringbuf, | |
2118 | (void *)port->ip_inring, | |
2119 | (void *)port->ip_outring)); | |
2120 | } | |
2121 | ||
2122 | DPRINT_CONFIG(("%s : port %d [addr 0x%p] card_ptr 0x%p", | |
2123 | __FUNCTION__, | |
2124 | phys_port, (void *)port, (void *)card_ptr)); | |
2125 | DPRINT_CONFIG((" ip_serial_regs 0x%p ip_uart_regs 0x%p\n", | |
2126 | (void *)port->ip_serial_regs, | |
2127 | (void *)port->ip_uart_regs)); | |
2128 | ||
2129 | /* Initialize the hardware for IOC3 */ | |
2130 | port_init(port); | |
2131 | ||
2132 | DPRINT_CONFIG(("%s: phys_port %d port 0x%p inring 0x%p " | |
2133 | "outring 0x%p\n", | |
2134 | __FUNCTION__, | |
2135 | phys_port, (void *)port, | |
2136 | (void *)port->ip_inring, | |
2137 | (void *)port->ip_outring)); | |
2138 | ||
2139 | } | |
2140 | ||
2141 | /* register port with the serial core */ | |
2142 | ||
2143 | if ((ret = ioc3_serial_core_attach(is, idd))) | |
2144 | goto out4; | |
2145 | ||
2146 | Num_of_ioc3_cards++; | |
2147 | ||
2148 | return ret; | |
2149 | ||
2150 | /* error exits that give back resources */ | |
2151 | out4: | |
2152 | kfree(card_ptr); | |
2153 | return ret; | |
2154 | } | |
2155 | ||
2156 | static struct ioc3_submodule ioc3uart_submodule = { | |
2157 | .name = "IOC3uart", | |
2158 | .probe = ioc3uart_probe, | |
2159 | .remove = ioc3uart_remove, | |
2160 | /* call .intr for both ports initially */ | |
2161 | .irq_mask = SIO_IR_SA | SIO_IR_SB, | |
2162 | .intr = ioc3uart_intr, | |
2163 | .owner = THIS_MODULE, | |
2164 | }; | |
2165 | ||
2166 | /** | |
2167 | * ioc3_detect - module init called, | |
2168 | */ | |
2169 | static int __devinit ioc3uart_init(void) | |
2170 | { | |
2171 | int ret; | |
2172 | ||
2173 | /* register with serial core */ | |
2174 | if ((ret = uart_register_driver(&ioc3_uart)) < 0) { | |
2175 | printk(KERN_WARNING | |
2176 | "%s: Couldn't register IOC3 uart serial driver\n", | |
2177 | __FUNCTION__); | |
2178 | return ret; | |
2179 | } | |
2180 | ret = ioc3_register_submodule(&ioc3uart_submodule); | |
2181 | if (ret) | |
2182 | uart_unregister_driver(&ioc3_uart); | |
2183 | return ret; | |
2184 | } | |
2185 | ||
2186 | static void __devexit ioc3uart_exit(void) | |
2187 | { | |
2188 | ioc3_unregister_submodule(&ioc3uart_submodule); | |
2189 | uart_unregister_driver(&ioc3_uart); | |
2190 | } | |
2191 | ||
2192 | module_init(ioc3uart_init); | |
2193 | module_exit(ioc3uart_exit); | |
2194 | ||
2195 | MODULE_AUTHOR("Pat Gefre - Silicon Graphics Inc. (SGI) <pfg@sgi.com>"); | |
2196 | MODULE_DESCRIPTION("Serial PCI driver module for SGI IOC3 card"); | |
2197 | MODULE_LICENSE("GPL"); |