Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
9399575d | 2 | * dz.c: Serial port driver for DECstations equipped |
1da177e4 LT |
3 | * with the DZ chipset. |
4 | * | |
fd8c5972 RB |
5 | * Copyright (C) 1998 Olivier A. D. Lebaillif |
6 | * | |
1da177e4 LT |
7 | * Email: olivier.lebaillif@ifrsys.com |
8 | * | |
9399575d MR |
9 | * Copyright (C) 2004, 2006 Maciej W. Rozycki |
10 | * | |
1da177e4 LT |
11 | * [31-AUG-98] triemer |
12 | * Changed IRQ to use Harald's dec internals interrupts.h | |
13 | * removed base_addr code - moving address assignment to setup.c | |
14 | * Changed name of dz_init to rs_init to be consistent with tc code | |
15 | * [13-NOV-98] triemer fixed code to receive characters | |
fd8c5972 | 16 | * after patches by harald to irq code. |
1da177e4 LT |
17 | * [09-JAN-99] triemer minor fix for schedule - due to removal of timeout |
18 | * field from "current" - somewhere between 2.1.121 and 2.1.131 | |
19 | Qua Jun 27 15:02:26 BRT 2001 | |
20 | * [27-JUN-2001] Arnaldo Carvalho de Melo <acme@conectiva.com.br> - cleanups | |
fd8c5972 RB |
21 | * |
22 | * Parts (C) 1999 David Airlie, airlied@linux.ie | |
23 | * [07-SEP-99] Bugfixes | |
1da177e4 LT |
24 | * |
25 | * [06-Jan-2002] Russell King <rmk@arm.linux.org.uk> | |
26 | * Converted to new serial core | |
27 | */ | |
28 | ||
29 | #undef DEBUG_DZ | |
30 | ||
9399575d MR |
31 | #if defined(CONFIG_SERIAL_DZ_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) |
32 | #define SUPPORT_SYSRQ | |
33 | #endif | |
34 | ||
35 | #include <linux/delay.h> | |
1da177e4 LT |
36 | #include <linux/module.h> |
37 | #include <linux/interrupt.h> | |
38 | #include <linux/init.h> | |
39 | #include <linux/console.h> | |
9399575d | 40 | #include <linux/sysrq.h> |
1da177e4 LT |
41 | #include <linux/tty.h> |
42 | #include <linux/tty_flip.h> | |
43 | #include <linux/serial_core.h> | |
44 | #include <linux/serial.h> | |
45 | ||
46 | #include <asm/bootinfo.h> | |
47 | #include <asm/dec/interrupts.h> | |
48 | #include <asm/dec/kn01.h> | |
49 | #include <asm/dec/kn02.h> | |
50 | #include <asm/dec/machtype.h> | |
51 | #include <asm/dec/prom.h> | |
52 | #include <asm/irq.h> | |
53 | #include <asm/system.h> | |
54 | #include <asm/uaccess.h> | |
55 | ||
1da177e4 LT |
56 | #include "dz.h" |
57 | ||
1da177e4 | 58 | static char *dz_name = "DECstation DZ serial driver version "; |
9399575d | 59 | static char *dz_version = "1.03"; |
1da177e4 LT |
60 | |
61 | struct dz_port { | |
62 | struct uart_port port; | |
63 | unsigned int cflag; | |
64 | }; | |
65 | ||
66 | static struct dz_port dz_ports[DZ_NB_PORT]; | |
67 | ||
1da177e4 LT |
68 | /* |
69 | * ------------------------------------------------------------ | |
70 | * dz_in () and dz_out () | |
71 | * | |
fd8c5972 | 72 | * These routines are used to access the registers of the DZ |
1da177e4 LT |
73 | * chip, hiding relocation differences between implementation. |
74 | * ------------------------------------------------------------ | |
75 | */ | |
76 | ||
77 | static inline unsigned short dz_in(struct dz_port *dport, unsigned offset) | |
78 | { | |
79 | volatile unsigned short *addr = | |
80 | (volatile unsigned short *) (dport->port.membase + offset); | |
9399575d | 81 | |
1da177e4 LT |
82 | return *addr; |
83 | } | |
84 | ||
85 | static inline void dz_out(struct dz_port *dport, unsigned offset, | |
86 | unsigned short value) | |
87 | { | |
88 | volatile unsigned short *addr = | |
89 | (volatile unsigned short *) (dport->port.membase + offset); | |
9399575d | 90 | |
1da177e4 LT |
91 | *addr = value; |
92 | } | |
93 | ||
94 | /* | |
95 | * ------------------------------------------------------------ | |
96 | * rs_stop () and rs_start () | |
97 | * | |
fd8c5972 RB |
98 | * These routines are called before setting or resetting |
99 | * tty->stopped. They enable or disable transmitter interrupts, | |
1da177e4 LT |
100 | * as necessary. |
101 | * ------------------------------------------------------------ | |
102 | */ | |
103 | ||
b129a8cc | 104 | static void dz_stop_tx(struct uart_port *uport) |
1da177e4 LT |
105 | { |
106 | struct dz_port *dport = (struct dz_port *)uport; | |
107 | unsigned short tmp, mask = 1 << dport->port.line; | |
108 | unsigned long flags; | |
109 | ||
110 | spin_lock_irqsave(&dport->port.lock, flags); | |
111 | tmp = dz_in(dport, DZ_TCR); /* read the TX flag */ | |
112 | tmp &= ~mask; /* clear the TX flag */ | |
113 | dz_out(dport, DZ_TCR, tmp); | |
114 | spin_unlock_irqrestore(&dport->port.lock, flags); | |
115 | } | |
116 | ||
b129a8cc | 117 | static void dz_start_tx(struct uart_port *uport) |
1da177e4 LT |
118 | { |
119 | struct dz_port *dport = (struct dz_port *)uport; | |
120 | unsigned short tmp, mask = 1 << dport->port.line; | |
121 | unsigned long flags; | |
122 | ||
123 | spin_lock_irqsave(&dport->port.lock, flags); | |
124 | tmp = dz_in(dport, DZ_TCR); /* read the TX flag */ | |
125 | tmp |= mask; /* set the TX flag */ | |
126 | dz_out(dport, DZ_TCR, tmp); | |
127 | spin_unlock_irqrestore(&dport->port.lock, flags); | |
128 | } | |
129 | ||
130 | static void dz_stop_rx(struct uart_port *uport) | |
131 | { | |
132 | struct dz_port *dport = (struct dz_port *)uport; | |
133 | unsigned long flags; | |
134 | ||
135 | spin_lock_irqsave(&dport->port.lock, flags); | |
136 | dport->cflag &= ~DZ_CREAD; | |
9399575d | 137 | dz_out(dport, DZ_LPR, dport->cflag | dport->port.line); |
1da177e4 LT |
138 | spin_unlock_irqrestore(&dport->port.lock, flags); |
139 | } | |
140 | ||
141 | static void dz_enable_ms(struct uart_port *port) | |
142 | { | |
143 | /* nothing to do */ | |
144 | } | |
145 | ||
146 | /* | |
147 | * ------------------------------------------------------------ | |
1da177e4 | 148 | * |
9399575d MR |
149 | * Here start the interrupt handling routines. All of the following |
150 | * subroutines are declared as inline and are folded into | |
151 | * dz_interrupt. They were separated out for readability's sake. | |
152 | * | |
153 | * Note: dz_interrupt() is a "fast" interrupt, which means that it | |
1da177e4 | 154 | * runs with interrupts turned off. People who may want to modify |
9399575d | 155 | * dz_interrupt() should try to keep the interrupt handler as fast as |
1da177e4 LT |
156 | * possible. After you are done making modifications, it is not a bad |
157 | * idea to do: | |
fd8c5972 | 158 | * |
1da177e4 LT |
159 | * make drivers/serial/dz.s |
160 | * | |
161 | * and look at the resulting assemble code in dz.s. | |
162 | * | |
163 | * ------------------------------------------------------------ | |
164 | */ | |
165 | ||
166 | /* | |
167 | * ------------------------------------------------------------ | |
168 | * receive_char () | |
169 | * | |
170 | * This routine deals with inputs from any lines. | |
171 | * ------------------------------------------------------------ | |
172 | */ | |
9399575d MR |
173 | static inline void dz_receive_chars(struct dz_port *dport_in, |
174 | struct pt_regs *regs) | |
1da177e4 | 175 | { |
9399575d | 176 | struct dz_port *dport; |
1da177e4 LT |
177 | struct tty_struct *tty = NULL; |
178 | struct uart_icount *icount; | |
9399575d MR |
179 | int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 }; |
180 | unsigned short status; | |
1da177e4 | 181 | unsigned char ch, flag; |
9399575d | 182 | int i; |
1da177e4 | 183 | |
9399575d MR |
184 | while ((status = dz_in(dport_in, DZ_RBUF)) & DZ_DVAL) { |
185 | dport = &dz_ports[LINE(status)]; | |
186 | tty = dport->port.info->tty; /* point to the proper dev */ | |
1da177e4 | 187 | |
9399575d | 188 | ch = UCHAR(status); /* grab the char */ |
1da177e4 | 189 | |
1da177e4 | 190 | icount = &dport->port.icount; |
1da177e4 LT |
191 | icount->rx++; |
192 | ||
9399575d MR |
193 | flag = TTY_NORMAL; |
194 | if (status & DZ_FERR) { /* frame error */ | |
195 | /* | |
196 | * There is no separate BREAK status bit, so | |
197 | * treat framing errors as BREAKs for Magic SysRq | |
198 | * and SAK; normally, otherwise. | |
1da177e4 | 199 | */ |
9399575d MR |
200 | if (uart_handle_break(&dport->port)) |
201 | continue; | |
202 | if (dport->port.flags & UPF_SAK) | |
203 | flag = TTY_BREAK; | |
204 | else | |
1da177e4 | 205 | flag = TTY_FRAME; |
9399575d MR |
206 | } else if (status & DZ_OERR) /* overrun error */ |
207 | flag = TTY_OVERRUN; | |
208 | else if (status & DZ_PERR) /* parity error */ | |
209 | flag = TTY_PARITY; | |
210 | ||
211 | /* keep track of the statistics */ | |
212 | switch (flag) { | |
213 | case TTY_FRAME: | |
214 | icount->frame++; | |
215 | break; | |
216 | case TTY_PARITY: | |
217 | icount->parity++; | |
218 | break; | |
219 | case TTY_OVERRUN: | |
220 | icount->overrun++; | |
221 | break; | |
222 | case TTY_BREAK: | |
223 | icount->brk++; | |
224 | break; | |
225 | default: | |
226 | break; | |
1da177e4 | 227 | } |
1da177e4 | 228 | |
9399575d MR |
229 | if (uart_handle_sysrq_char(&dport->port, ch, regs)) |
230 | continue; | |
231 | ||
232 | if ((status & dport->port.ignore_status_mask) == 0) { | |
233 | uart_insert_char(&dport->port, | |
234 | status, DZ_OERR, ch, flag); | |
235 | lines_rx[LINE(status)] = 1; | |
236 | } | |
237 | } | |
238 | for (i = 0; i < DZ_NB_PORT; i++) | |
239 | if (lines_rx[i]) | |
240 | tty_flip_buffer_push(dz_ports[i].port.info->tty); | |
1da177e4 LT |
241 | } |
242 | ||
243 | /* | |
244 | * ------------------------------------------------------------ | |
245 | * transmit_char () | |
246 | * | |
247 | * This routine deals with outputs to any lines. | |
248 | * ------------------------------------------------------------ | |
249 | */ | |
9399575d | 250 | static inline void dz_transmit_chars(struct dz_port *dport_in) |
1da177e4 | 251 | { |
9399575d MR |
252 | struct dz_port *dport; |
253 | struct circ_buf *xmit; | |
254 | unsigned short status; | |
1da177e4 LT |
255 | unsigned char tmp; |
256 | ||
9399575d MR |
257 | status = dz_in(dport_in, DZ_CSR); |
258 | dport = &dz_ports[LINE(status)]; | |
259 | xmit = &dport->port.info->xmit; | |
260 | ||
261 | if (dport->port.x_char) { /* XON/XOFF chars */ | |
1da177e4 LT |
262 | dz_out(dport, DZ_TDR, dport->port.x_char); |
263 | dport->port.icount.tx++; | |
264 | dport->port.x_char = 0; | |
265 | return; | |
266 | } | |
9399575d | 267 | /* If nothing to do or stopped or hardware stopped. */ |
1da177e4 | 268 | if (uart_circ_empty(xmit) || uart_tx_stopped(&dport->port)) { |
b129a8cc | 269 | dz_stop_tx(&dport->port); |
1da177e4 LT |
270 | return; |
271 | } | |
272 | ||
273 | /* | |
9399575d MR |
274 | * If something to do... (remember the dz has no output fifo, |
275 | * so we go one char at a time) :-< | |
1da177e4 LT |
276 | */ |
277 | tmp = xmit->buf[xmit->tail]; | |
278 | xmit->tail = (xmit->tail + 1) & (DZ_XMIT_SIZE - 1); | |
279 | dz_out(dport, DZ_TDR, tmp); | |
280 | dport->port.icount.tx++; | |
281 | ||
282 | if (uart_circ_chars_pending(xmit) < DZ_WAKEUP_CHARS) | |
283 | uart_write_wakeup(&dport->port); | |
284 | ||
9399575d | 285 | /* Are we are done. */ |
1da177e4 | 286 | if (uart_circ_empty(xmit)) |
b129a8cc | 287 | dz_stop_tx(&dport->port); |
1da177e4 LT |
288 | } |
289 | ||
290 | /* | |
291 | * ------------------------------------------------------------ | |
9399575d | 292 | * check_modem_status() |
1da177e4 | 293 | * |
9399575d MR |
294 | * DS 3100 & 5100: Only valid for the MODEM line, duh! |
295 | * DS 5000/200: Valid for the MODEM and PRINTER line. | |
1da177e4 LT |
296 | * ------------------------------------------------------------ |
297 | */ | |
298 | static inline void check_modem_status(struct dz_port *dport) | |
299 | { | |
9399575d MR |
300 | /* |
301 | * FIXME: | |
302 | * 1. No status change interrupt; use a timer. | |
303 | * 2. Handle the 3100/5000 as appropriate. --macro | |
304 | */ | |
1da177e4 LT |
305 | unsigned short status; |
306 | ||
9399575d | 307 | /* If not the modem line just return. */ |
1da177e4 LT |
308 | if (dport->port.line != DZ_MODEM) |
309 | return; | |
310 | ||
311 | status = dz_in(dport, DZ_MSR); | |
312 | ||
313 | /* it's easy, since DSR2 is the only bit in the register */ | |
314 | if (status) | |
315 | dport->port.icount.dsr++; | |
316 | } | |
317 | ||
318 | /* | |
319 | * ------------------------------------------------------------ | |
320 | * dz_interrupt () | |
321 | * | |
322 | * this is the main interrupt routine for the DZ chip. | |
323 | * It deals with the multiple ports. | |
324 | * ------------------------------------------------------------ | |
325 | */ | |
7d12e780 | 326 | static irqreturn_t dz_interrupt(int irq, void *dev) |
1da177e4 | 327 | { |
9399575d | 328 | struct dz_port *dport = (struct dz_port *)dev; |
1da177e4 LT |
329 | unsigned short status; |
330 | ||
331 | /* get the reason why we just got an irq */ | |
9399575d | 332 | status = dz_in(dport, DZ_CSR); |
1da177e4 | 333 | |
9399575d MR |
334 | if ((status & (DZ_RDONE | DZ_RIE)) == (DZ_RDONE | DZ_RIE)) |
335 | dz_receive_chars(dport, regs); | |
1da177e4 | 336 | |
9399575d | 337 | if ((status & (DZ_TRDY | DZ_TIE)) == (DZ_TRDY | DZ_TIE)) |
1da177e4 LT |
338 | dz_transmit_chars(dport); |
339 | ||
1da177e4 LT |
340 | return IRQ_HANDLED; |
341 | } | |
342 | ||
343 | /* | |
344 | * ------------------------------------------------------------------- | |
345 | * Here ends the DZ interrupt routines. | |
346 | * ------------------------------------------------------------------- | |
347 | */ | |
348 | ||
349 | static unsigned int dz_get_mctrl(struct uart_port *uport) | |
350 | { | |
9399575d MR |
351 | /* |
352 | * FIXME: Handle the 3100/5000 as appropriate. --macro | |
353 | */ | |
1da177e4 LT |
354 | struct dz_port *dport = (struct dz_port *)uport; |
355 | unsigned int mctrl = TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; | |
356 | ||
357 | if (dport->port.line == DZ_MODEM) { | |
1da177e4 LT |
358 | if (dz_in(dport, DZ_MSR) & DZ_MODEM_DSR) |
359 | mctrl &= ~TIOCM_DSR; | |
360 | } | |
361 | ||
362 | return mctrl; | |
363 | } | |
364 | ||
365 | static void dz_set_mctrl(struct uart_port *uport, unsigned int mctrl) | |
366 | { | |
9399575d MR |
367 | /* |
368 | * FIXME: Handle the 3100/5000 as appropriate. --macro | |
369 | */ | |
1da177e4 LT |
370 | struct dz_port *dport = (struct dz_port *)uport; |
371 | unsigned short tmp; | |
372 | ||
373 | if (dport->port.line == DZ_MODEM) { | |
374 | tmp = dz_in(dport, DZ_TCR); | |
375 | if (mctrl & TIOCM_DTR) | |
376 | tmp &= ~DZ_MODEM_DTR; | |
377 | else | |
378 | tmp |= DZ_MODEM_DTR; | |
379 | dz_out(dport, DZ_TCR, tmp); | |
380 | } | |
381 | } | |
382 | ||
383 | /* | |
384 | * ------------------------------------------------------------------- | |
385 | * startup () | |
386 | * | |
387 | * various initialization tasks | |
fd8c5972 | 388 | * ------------------------------------------------------------------- |
1da177e4 LT |
389 | */ |
390 | static int dz_startup(struct uart_port *uport) | |
391 | { | |
392 | struct dz_port *dport = (struct dz_port *)uport; | |
393 | unsigned long flags; | |
394 | unsigned short tmp; | |
395 | ||
1da177e4 LT |
396 | spin_lock_irqsave(&dport->port.lock, flags); |
397 | ||
398 | /* enable the interrupt and the scanning */ | |
399 | tmp = dz_in(dport, DZ_CSR); | |
400 | tmp |= DZ_RIE | DZ_TIE | DZ_MSE; | |
401 | dz_out(dport, DZ_CSR, tmp); | |
402 | ||
403 | spin_unlock_irqrestore(&dport->port.lock, flags); | |
404 | ||
405 | return 0; | |
406 | } | |
407 | ||
fd8c5972 | 408 | /* |
1da177e4 LT |
409 | * ------------------------------------------------------------------- |
410 | * shutdown () | |
411 | * | |
412 | * This routine will shutdown a serial port; interrupts are disabled, and | |
413 | * DTR is dropped if the hangup on close termio flag is on. | |
fd8c5972 | 414 | * ------------------------------------------------------------------- |
1da177e4 LT |
415 | */ |
416 | static void dz_shutdown(struct uart_port *uport) | |
417 | { | |
b129a8cc | 418 | dz_stop_tx(uport); |
1da177e4 LT |
419 | } |
420 | ||
421 | /* | |
9399575d MR |
422 | * ------------------------------------------------------------------- |
423 | * dz_tx_empty() -- get the transmitter empty status | |
1da177e4 LT |
424 | * |
425 | * Purpose: Let user call ioctl() to get info when the UART physically | |
426 | * is emptied. On bus types like RS485, the transmitter must | |
427 | * release the bus after transmitting. This must be done when | |
428 | * the transmit shift register is empty, not be done when the | |
429 | * transmit holding register is empty. This functionality | |
fd8c5972 | 430 | * allows an RS485 driver to be written in user space. |
9399575d | 431 | * ------------------------------------------------------------------- |
1da177e4 LT |
432 | */ |
433 | static unsigned int dz_tx_empty(struct uart_port *uport) | |
434 | { | |
435 | struct dz_port *dport = (struct dz_port *)uport; | |
9399575d | 436 | unsigned short tmp, mask = 1 << dport->port.line; |
1da177e4 | 437 | |
9399575d MR |
438 | tmp = dz_in(dport, DZ_TCR); |
439 | tmp &= mask; | |
440 | ||
441 | return tmp ? 0 : TIOCSER_TEMT; | |
1da177e4 LT |
442 | } |
443 | ||
444 | static void dz_break_ctl(struct uart_port *uport, int break_state) | |
445 | { | |
9399575d MR |
446 | /* |
447 | * FIXME: Can't access BREAK bits in TDR easily; | |
448 | * reuse the code for polled TX. --macro | |
449 | */ | |
1da177e4 LT |
450 | struct dz_port *dport = (struct dz_port *)uport; |
451 | unsigned long flags; | |
9399575d | 452 | unsigned short tmp, mask = 1 << dport->port.line; |
1da177e4 LT |
453 | |
454 | spin_lock_irqsave(&uport->lock, flags); | |
455 | tmp = dz_in(dport, DZ_TCR); | |
456 | if (break_state) | |
457 | tmp |= mask; | |
458 | else | |
459 | tmp &= ~mask; | |
460 | dz_out(dport, DZ_TCR, tmp); | |
461 | spin_unlock_irqrestore(&uport->lock, flags); | |
462 | } | |
463 | ||
606d099c AC |
464 | static void dz_set_termios(struct uart_port *uport, struct ktermios *termios, |
465 | struct ktermios *old_termios) | |
1da177e4 LT |
466 | { |
467 | struct dz_port *dport = (struct dz_port *)uport; | |
468 | unsigned long flags; | |
469 | unsigned int cflag, baud; | |
470 | ||
471 | cflag = dport->port.line; | |
472 | ||
473 | switch (termios->c_cflag & CSIZE) { | |
474 | case CS5: | |
475 | cflag |= DZ_CS5; | |
476 | break; | |
477 | case CS6: | |
478 | cflag |= DZ_CS6; | |
479 | break; | |
480 | case CS7: | |
481 | cflag |= DZ_CS7; | |
482 | break; | |
483 | case CS8: | |
484 | default: | |
485 | cflag |= DZ_CS8; | |
486 | } | |
487 | ||
488 | if (termios->c_cflag & CSTOPB) | |
489 | cflag |= DZ_CSTOPB; | |
490 | if (termios->c_cflag & PARENB) | |
491 | cflag |= DZ_PARENB; | |
492 | if (termios->c_cflag & PARODD) | |
493 | cflag |= DZ_PARODD; | |
494 | ||
495 | baud = uart_get_baud_rate(uport, termios, old_termios, 50, 9600); | |
496 | switch (baud) { | |
497 | case 50: | |
498 | cflag |= DZ_B50; | |
499 | break; | |
500 | case 75: | |
501 | cflag |= DZ_B75; | |
502 | break; | |
503 | case 110: | |
504 | cflag |= DZ_B110; | |
505 | break; | |
506 | case 134: | |
507 | cflag |= DZ_B134; | |
508 | break; | |
509 | case 150: | |
510 | cflag |= DZ_B150; | |
511 | break; | |
512 | case 300: | |
513 | cflag |= DZ_B300; | |
514 | break; | |
515 | case 600: | |
516 | cflag |= DZ_B600; | |
517 | break; | |
518 | case 1200: | |
519 | cflag |= DZ_B1200; | |
520 | break; | |
521 | case 1800: | |
522 | cflag |= DZ_B1800; | |
523 | break; | |
524 | case 2000: | |
525 | cflag |= DZ_B2000; | |
526 | break; | |
527 | case 2400: | |
528 | cflag |= DZ_B2400; | |
529 | break; | |
530 | case 3600: | |
531 | cflag |= DZ_B3600; | |
532 | break; | |
533 | case 4800: | |
534 | cflag |= DZ_B4800; | |
535 | break; | |
536 | case 7200: | |
537 | cflag |= DZ_B7200; | |
538 | break; | |
539 | case 9600: | |
540 | default: | |
541 | cflag |= DZ_B9600; | |
542 | } | |
543 | ||
544 | if (termios->c_cflag & CREAD) | |
545 | cflag |= DZ_RXENAB; | |
546 | ||
547 | spin_lock_irqsave(&dport->port.lock, flags); | |
548 | ||
9399575d | 549 | dz_out(dport, DZ_LPR, cflag | dport->port.line); |
1da177e4 LT |
550 | dport->cflag = cflag; |
551 | ||
552 | /* setup accept flag */ | |
553 | dport->port.read_status_mask = DZ_OERR; | |
554 | if (termios->c_iflag & INPCK) | |
555 | dport->port.read_status_mask |= DZ_FERR | DZ_PERR; | |
556 | ||
557 | /* characters to ignore */ | |
558 | uport->ignore_status_mask = 0; | |
559 | if (termios->c_iflag & IGNPAR) | |
560 | dport->port.ignore_status_mask |= DZ_FERR | DZ_PERR; | |
561 | ||
562 | spin_unlock_irqrestore(&dport->port.lock, flags); | |
563 | } | |
564 | ||
565 | static const char *dz_type(struct uart_port *port) | |
566 | { | |
567 | return "DZ"; | |
568 | } | |
569 | ||
570 | static void dz_release_port(struct uart_port *port) | |
571 | { | |
572 | /* nothing to do */ | |
573 | } | |
574 | ||
575 | static int dz_request_port(struct uart_port *port) | |
576 | { | |
577 | return 0; | |
578 | } | |
579 | ||
580 | static void dz_config_port(struct uart_port *port, int flags) | |
581 | { | |
582 | if (flags & UART_CONFIG_TYPE) | |
583 | port->type = PORT_DZ; | |
584 | } | |
585 | ||
586 | /* | |
587 | * verify the new serial_struct (for TIOCSSERIAL). | |
588 | */ | |
589 | static int dz_verify_port(struct uart_port *port, struct serial_struct *ser) | |
590 | { | |
591 | int ret = 0; | |
592 | if (ser->type != PORT_UNKNOWN && ser->type != PORT_DZ) | |
593 | ret = -EINVAL; | |
594 | if (ser->irq != port->irq) | |
595 | ret = -EINVAL; | |
596 | return ret; | |
597 | } | |
598 | ||
599 | static struct uart_ops dz_ops = { | |
600 | .tx_empty = dz_tx_empty, | |
601 | .get_mctrl = dz_get_mctrl, | |
602 | .set_mctrl = dz_set_mctrl, | |
603 | .stop_tx = dz_stop_tx, | |
604 | .start_tx = dz_start_tx, | |
605 | .stop_rx = dz_stop_rx, | |
606 | .enable_ms = dz_enable_ms, | |
607 | .break_ctl = dz_break_ctl, | |
608 | .startup = dz_startup, | |
609 | .shutdown = dz_shutdown, | |
610 | .set_termios = dz_set_termios, | |
611 | .type = dz_type, | |
612 | .release_port = dz_release_port, | |
613 | .request_port = dz_request_port, | |
614 | .config_port = dz_config_port, | |
615 | .verify_port = dz_verify_port, | |
616 | }; | |
617 | ||
618 | static void __init dz_init_ports(void) | |
619 | { | |
620 | static int first = 1; | |
621 | struct dz_port *dport; | |
622 | unsigned long base; | |
623 | int i; | |
624 | ||
625 | if (!first) | |
626 | return; | |
627 | first = 0; | |
628 | ||
629 | if (mips_machtype == MACH_DS23100 || | |
630 | mips_machtype == MACH_DS5100) | |
46677736 | 631 | base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_DZ11); |
1da177e4 | 632 | else |
46677736 | 633 | base = CKSEG1ADDR(KN02_SLOT_BASE + KN02_DZ11); |
1da177e4 LT |
634 | |
635 | for (i = 0, dport = dz_ports; i < DZ_NB_PORT; i++, dport++) { | |
636 | spin_lock_init(&dport->port.lock); | |
637 | dport->port.membase = (char *) base; | |
9399575d | 638 | dport->port.iotype = UPIO_MEM; |
1da177e4 LT |
639 | dport->port.irq = dec_interrupt[DEC_IRQ_DZ11]; |
640 | dport->port.line = i; | |
641 | dport->port.fifosize = 1; | |
642 | dport->port.ops = &dz_ops; | |
643 | dport->port.flags = UPF_BOOT_AUTOCONF; | |
644 | } | |
645 | } | |
646 | ||
647 | static void dz_reset(struct dz_port *dport) | |
648 | { | |
649 | dz_out(dport, DZ_CSR, DZ_CLR); | |
1da177e4 | 650 | while (dz_in(dport, DZ_CSR) & DZ_CLR); |
1da177e4 LT |
651 | iob(); |
652 | ||
653 | /* enable scanning */ | |
654 | dz_out(dport, DZ_CSR, DZ_MSE); | |
655 | } | |
656 | ||
657 | #ifdef CONFIG_SERIAL_DZ_CONSOLE | |
9399575d MR |
658 | /* |
659 | * ------------------------------------------------------------------- | |
660 | * dz_console_putchar() -- transmit a character | |
661 | * | |
662 | * Polled transmission. This is tricky. We need to mask transmit | |
663 | * interrupts so that they do not interfere, enable the transmitter | |
664 | * for the line requested and then wait till the transmit scanner | |
665 | * requests data for this line. But it may request data for another | |
666 | * line first, in which case we have to disable its transmitter and | |
667 | * repeat waiting till our line pops up. Only then the character may | |
668 | * be transmitted. Finally, the state of the transmitter mask is | |
669 | * restored. Welcome to the world of PDP-11! | |
670 | * ------------------------------------------------------------------- | |
671 | */ | |
d608ab99 | 672 | static void dz_console_putchar(struct uart_port *uport, int ch) |
1da177e4 | 673 | { |
d358788f | 674 | struct dz_port *dport = (struct dz_port *)uport; |
1da177e4 | 675 | unsigned long flags; |
9399575d MR |
676 | unsigned short csr, tcr, trdy, mask; |
677 | int loops = 10000; | |
1da177e4 LT |
678 | |
679 | spin_lock_irqsave(&dport->port.lock, flags); | |
9399575d MR |
680 | csr = dz_in(dport, DZ_CSR); |
681 | dz_out(dport, DZ_CSR, csr & ~DZ_TIE); | |
682 | tcr = dz_in(dport, DZ_TCR); | |
683 | tcr |= 1 << dport->port.line; | |
684 | mask = tcr; | |
685 | dz_out(dport, DZ_TCR, mask); | |
686 | iob(); | |
687 | spin_unlock_irqrestore(&dport->port.lock, flags); | |
1da177e4 | 688 | |
9399575d MR |
689 | while (loops--) { |
690 | trdy = dz_in(dport, DZ_CSR); | |
691 | if (!(trdy & DZ_TRDY)) | |
692 | continue; | |
693 | trdy = (trdy & DZ_TLINE) >> 8; | |
694 | if (trdy == dport->port.line) | |
695 | break; | |
696 | mask &= ~(1 << trdy); | |
697 | dz_out(dport, DZ_TCR, mask); | |
698 | iob(); | |
699 | udelay(2); | |
700 | } | |
1da177e4 | 701 | |
9399575d MR |
702 | if (loops) /* Cannot send otherwise. */ |
703 | dz_out(dport, DZ_TDR, ch); | |
1da177e4 | 704 | |
9399575d MR |
705 | dz_out(dport, DZ_TCR, tcr); |
706 | dz_out(dport, DZ_CSR, csr); | |
1da177e4 | 707 | } |
d358788f | 708 | |
fd8c5972 | 709 | /* |
1da177e4 LT |
710 | * ------------------------------------------------------------------- |
711 | * dz_console_print () | |
712 | * | |
713 | * dz_console_print is registered for printk. | |
714 | * The console must be locked when we get here. | |
fd8c5972 | 715 | * ------------------------------------------------------------------- |
1da177e4 | 716 | */ |
9399575d | 717 | static void dz_console_print(struct console *co, |
1da177e4 LT |
718 | const char *str, |
719 | unsigned int count) | |
720 | { | |
9399575d | 721 | struct dz_port *dport = &dz_ports[co->index]; |
1da177e4 LT |
722 | #ifdef DEBUG_DZ |
723 | prom_printf((char *) str); | |
724 | #endif | |
d358788f | 725 | uart_console_write(&dport->port, str, count, dz_console_putchar); |
1da177e4 LT |
726 | } |
727 | ||
728 | static int __init dz_console_setup(struct console *co, char *options) | |
729 | { | |
9399575d | 730 | struct dz_port *dport = &dz_ports[co->index]; |
1da177e4 LT |
731 | int baud = 9600; |
732 | int bits = 8; | |
733 | int parity = 'n'; | |
734 | int flow = 'n'; | |
1da177e4 LT |
735 | |
736 | if (options) | |
737 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
738 | ||
739 | dz_reset(dport); | |
740 | ||
9399575d | 741 | return uart_set_options(&dport->port, co, baud, parity, bits, flow); |
1da177e4 LT |
742 | } |
743 | ||
9399575d MR |
744 | static struct uart_driver dz_reg; |
745 | static struct console dz_sercons = { | |
1da177e4 LT |
746 | .name = "ttyS", |
747 | .write = dz_console_print, | |
748 | .device = uart_console_device, | |
749 | .setup = dz_console_setup, | |
9399575d MR |
750 | .flags = CON_PRINTBUFFER, |
751 | .index = -1, | |
752 | .data = &dz_reg, | |
1da177e4 LT |
753 | }; |
754 | ||
9399575d | 755 | static int __init dz_serial_console_init(void) |
1da177e4 | 756 | { |
9399575d MR |
757 | if (!IOASIC) { |
758 | dz_init_ports(); | |
759 | register_console(&dz_sercons); | |
760 | return 0; | |
761 | } else | |
762 | return -ENXIO; | |
1da177e4 LT |
763 | } |
764 | ||
9399575d MR |
765 | console_initcall(dz_serial_console_init); |
766 | ||
1da177e4 LT |
767 | #define SERIAL_DZ_CONSOLE &dz_sercons |
768 | #else | |
769 | #define SERIAL_DZ_CONSOLE NULL | |
770 | #endif /* CONFIG_SERIAL_DZ_CONSOLE */ | |
771 | ||
772 | static struct uart_driver dz_reg = { | |
773 | .owner = THIS_MODULE, | |
774 | .driver_name = "serial", | |
9399575d | 775 | .dev_name = "ttyS", |
1da177e4 LT |
776 | .major = TTY_MAJOR, |
777 | .minor = 64, | |
778 | .nr = DZ_NB_PORT, | |
779 | .cons = SERIAL_DZ_CONSOLE, | |
780 | }; | |
781 | ||
9399575d | 782 | static int __init dz_init(void) |
1da177e4 | 783 | { |
1da177e4 LT |
784 | int ret, i; |
785 | ||
9399575d MR |
786 | if (IOASIC) |
787 | return -ENXIO; | |
788 | ||
1da177e4 LT |
789 | printk("%s%s\n", dz_name, dz_version); |
790 | ||
791 | dz_init_ports(); | |
792 | ||
1da177e4 LT |
793 | #ifndef CONFIG_SERIAL_DZ_CONSOLE |
794 | /* reset the chip */ | |
795 | dz_reset(&dz_ports[0]); | |
796 | #endif | |
797 | ||
1da177e4 | 798 | if (request_irq(dz_ports[0].port.irq, dz_interrupt, |
40663cc7 | 799 | IRQF_DISABLED, "DZ", &dz_ports[0])) |
1da177e4 LT |
800 | panic("Unable to register DZ interrupt"); |
801 | ||
802 | ret = uart_register_driver(&dz_reg); | |
803 | if (ret != 0) | |
804 | return ret; | |
805 | ||
806 | for (i = 0; i < DZ_NB_PORT; i++) | |
807 | uart_add_one_port(&dz_reg, &dz_ports[i].port); | |
808 | ||
809 | return ret; | |
810 | } | |
811 | ||
9399575d MR |
812 | module_init(dz_init); |
813 | ||
1da177e4 LT |
814 | MODULE_DESCRIPTION("DECstation DZ serial driver"); |
815 | MODULE_LICENSE("GPL"); |