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Blackfin serial driver: fix overhead issue
[linux-2.6-block.git] / drivers / serial / bfin_5xx.c
CommitLineData
194de561
BW		 1/*
2 * File: drivers/serial/bfin_5xx.c
3 * Based on: Based on drivers/serial/sa1100.c
4 * Author: Aubrey Li <aubrey.li@analog.com>
5 *
6 * Created:
7 * Description: Driver for blackfin 5xx serial ports
8 *
9 * Rev: $Id: bfin_5xx.c,v 1.19 2006/09/24 02:33:53 aubrey Exp $
10 *
11 * Modified:
12 * Copyright 2006 Analog Devices Inc.
13 *
14 * Bugs: Enter bugs at http://blackfin.uclinux.org/
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, see the file COPYING, or write
28 * to the Free Software Foundation, Inc.,
29 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
30 */
31
32#if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
33#define SUPPORT_SYSRQ
34#endif
35
36#include <linux/module.h>
37#include <linux/ioport.h>
38#include <linux/init.h>
39#include <linux/console.h>
40#include <linux/sysrq.h>
41#include <linux/platform_device.h>
42#include <linux/tty.h>
43#include <linux/tty_flip.h>
44#include <linux/serial_core.h>
45
46#include <asm/gpio.h>
47#include <asm/mach/bfin_serial_5xx.h>
48
49#ifdef CONFIG_SERIAL_BFIN_DMA
50#include <linux/dma-mapping.h>
51#include <asm/io.h>
52#include <asm/irq.h>
53#include <asm/cacheflush.h>
54#endif
55
56/* UART name and device definitions */
57#define BFIN_SERIAL_NAME "ttyBF"
58#define BFIN_SERIAL_MAJOR 204
59#define BFIN_SERIAL_MINOR 64
60
61/*
62 * Setup for console. Argument comes from the menuconfig
63 */
64#define DMA_RX_XCOUNT 512
65#define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
66
67#define DMA_RX_FLUSH_JIFFIES 5
68
69#ifdef CONFIG_SERIAL_BFIN_DMA
70static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
71#else
72static void bfin_serial_do_work(struct work_struct *work);
73static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
74static void local_put_char(struct bfin_serial_port *uart, char ch);
75#endif
76
77static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
78
79/*
80 * interrupts are disabled on entry
81 */
82static void bfin_serial_stop_tx(struct uart_port *port)
83{
84 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
85
86#ifdef CONFIG_SERIAL_BFIN_DMA
87 disable_dma(uart->tx_dma_channel);
88#else
89 unsigned short ier;
90
91 ier = UART_GET_IER(uart);
92 ier &= ~ETBEI;
93 UART_PUT_IER(uart, ier);
94#endif
95}
96
97/*
98 * port is locked and interrupts are disabled
99 */
100static void bfin_serial_start_tx(struct uart_port *port)
101{
102 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
103
104#ifdef CONFIG_SERIAL_BFIN_DMA
105 bfin_serial_dma_tx_chars(uart);
106#else
107 unsigned short ier;
108 ier = UART_GET_IER(uart);
109 ier |= ETBEI;
110 UART_PUT_IER(uart, ier);
111 bfin_serial_tx_chars(uart);
112#endif
113}
114
115/*
116 * Interrupts are enabled
117 */
118static void bfin_serial_stop_rx(struct uart_port *port)
119{
120 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
121 unsigned short ier;
122
123 ier = UART_GET_IER(uart);
124 ier &= ~ERBFI;
125 UART_PUT_IER(uart, ier);
126}
127
128/*
129 * Set the modem control timer to fire immediately.
130 */
131static void bfin_serial_enable_ms(struct uart_port *port)
132{
133}
134
135#ifdef CONFIG_SERIAL_BFIN_PIO
136static void local_put_char(struct bfin_serial_port *uart, char ch)
137{
138 unsigned short status;
139 int flags = 0;
140
141 spin_lock_irqsave(&uart->port.lock, flags);
142
143 do {
144 status = UART_GET_LSR(uart);
145 } while (!(status & THRE));
146
147 UART_PUT_CHAR(uart, ch);
148 SSYNC();
149
150 spin_unlock_irqrestore(&uart->port.lock, flags);
151}
152
153static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
154{
155 struct tty_struct *tty = uart->port.info?uart->port.info->tty:0;
156 unsigned int status, ch, flg;
157#ifdef BF533_FAMILY
158 static int in_break = 0;
159#endif
160
161 status = UART_GET_LSR(uart);
162 ch = UART_GET_CHAR(uart);
163 uart->port.icount.rx++;
164
165#ifdef BF533_FAMILY
166 /* The BF533 family of processors have a nice misbehavior where
167 * they continuously generate characters for a "single" break.
168 * We have to basically ignore this flood until the "next" valid
169 * character comes across. All other Blackfin families operate
170 * properly though.
171 */
172 if (in_break) {
173 if (ch != 0) {
174 in_break = 0;
175 ch = UART_GET_CHAR(uart);
176 }
177 return;
178 }
179#endif
180
181 if (status & BI) {
182#ifdef BF533_FAMILY
183 in_break = 1;
184#endif
185 uart->port.icount.brk++;
186 if (uart_handle_break(&uart->port))
187 goto ignore_char;
188 flg = TTY_BREAK;
189 } else if (status & PE) {
190 flg = TTY_PARITY;
191 uart->port.icount.parity++;
192 } else if (status & OE) {
193 flg = TTY_OVERRUN;
194 uart->port.icount.overrun++;
195 } else if (status & FE) {
196 flg = TTY_FRAME;
197 uart->port.icount.frame++;
198 } else
199 flg = TTY_NORMAL;
200
201 if (uart_handle_sysrq_char(&uart->port, ch))
202 goto ignore_char;
203 if (tty)
204 uart_insert_char(&uart->port, status, 2, ch, flg);
205
206ignore_char:
207 if (tty)
208 tty_flip_buffer_push(tty);
209}
210
211static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
212{
213 struct circ_buf *xmit = &uart->port.info->xmit;
214
215 if (uart->port.x_char) {
216 UART_PUT_CHAR(uart, uart->port.x_char);
217 uart->port.icount.tx++;
218 uart->port.x_char = 0;
219 return;
220 }
221 /*
222 * Check the modem control lines before
223 * transmitting anything.
224 */
225 bfin_serial_mctrl_check(uart);
226
227 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
228 bfin_serial_stop_tx(&uart->port);
229 return;
230 }
231
232 local_put_char(uart, xmit->buf[xmit->tail]);
233 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
234 uart->port.icount.tx++;
235
236 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
237 uart_write_wakeup(&uart->port);
238
239 if (uart_circ_empty(xmit))
240 bfin_serial_stop_tx(&uart->port);
241}
242
5c4e472b
AL		 243static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
244{
245 struct bfin_serial_port *uart = dev_id;
246
247 spin_lock(&uart->port.lock);
248 while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_RX_READY)
249 bfin_serial_rx_chars(uart);
250 spin_unlock(&uart->port.lock);
251 return IRQ_HANDLED;
252}
253
254static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
194de561
BW		 255{
256 struct bfin_serial_port *uart = dev_id;
257 unsigned short status;
258
259 spin_lock(&uart->port.lock);
5c4e472b
AL		 260 while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_TX_READY)
261 bfin_serial_tx_chars(uart);
194de561
BW		 262 spin_unlock(&uart->port.lock);
263 return IRQ_HANDLED;
264}
265
5c4e472b 266
194de561
BW		 267static void bfin_serial_do_work(struct work_struct *work)
268{
269 struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
270
271 bfin_serial_mctrl_check(uart);
272}
273
274#endif
275
276#ifdef CONFIG_SERIAL_BFIN_DMA
277static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
278{
279 struct circ_buf *xmit = &uart->port.info->xmit;
280 unsigned short ier;
281 int flags = 0;
282
283 if (!uart->tx_done)
284 return;
285
286 uart->tx_done = 0;
287
288 if (uart->port.x_char) {
289 UART_PUT_CHAR(uart, uart->port.x_char);
290 uart->port.icount.tx++;
291 uart->port.x_char = 0;
292 uart->tx_done = 1;
293 return;
294 }
295 /*
296 * Check the modem control lines before
297 * transmitting anything.
298 */
299 bfin_serial_mctrl_check(uart);
300
301 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
302 bfin_serial_stop_tx(&uart->port);
303 uart->tx_done = 1;
304 return;
305 }
306
307 spin_lock_irqsave(&uart->port.lock, flags);
308 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
309 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
310 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
311 blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
312 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
313 set_dma_config(uart->tx_dma_channel,
314 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
315 INTR_ON_BUF,
316 DIMENSION_LINEAR,
317 DATA_SIZE_8));
318 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
319 set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
320 set_dma_x_modify(uart->tx_dma_channel, 1);
321 enable_dma(uart->tx_dma_channel);
322 ier = UART_GET_IER(uart);
323 ier |= ETBEI;
324 UART_PUT_IER(uart, ier);
325 spin_unlock_irqrestore(&uart->port.lock, flags);
326}
327
328static void bfin_serial_dma_rx_chars(struct bfin_serial_port * uart)
329{
330 struct tty_struct *tty = uart->port.info->tty;
331 int i, flg, status;
332
333 status = UART_GET_LSR(uart);
334 uart->port.icount.rx += CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, UART_XMIT_SIZE);;
335
336 if (status & BI) {
337 uart->port.icount.brk++;
338 if (uart_handle_break(&uart->port))
339 goto dma_ignore_char;
340 flg = TTY_BREAK;
341 } else if (status & PE) {
342 flg = TTY_PARITY;
343 uart->port.icount.parity++;
344 } else if (status & OE) {
345 flg = TTY_OVERRUN;
346 uart->port.icount.overrun++;
347 } else if (status & FE) {
348 flg = TTY_FRAME;
349 uart->port.icount.frame++;
350 } else
351 flg = TTY_NORMAL;
352
353 for (i = uart->rx_dma_buf.head; i < uart->rx_dma_buf.tail; i++) {
354 if (uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
355 goto dma_ignore_char;
356 uart_insert_char(&uart->port, status, 2, uart->rx_dma_buf.buf[i], flg);
357 }
358dma_ignore_char:
359 tty_flip_buffer_push(tty);
360}
361
362void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
363{
364 int x_pos, pos;
365 int flags = 0;
366
367 bfin_serial_dma_tx_chars(uart);
368
369 spin_lock_irqsave(&uart->port.lock, flags);
370 x_pos = DMA_RX_XCOUNT - get_dma_curr_xcount(uart->rx_dma_channel);
371 if (x_pos == DMA_RX_XCOUNT)
372 x_pos = 0;
373
374 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
375
376 if (pos>uart->rx_dma_buf.tail) {
377 uart->rx_dma_buf.tail = pos;
378 bfin_serial_dma_rx_chars(uart);
379 uart->rx_dma_buf.head = uart->rx_dma_buf.tail;
380 }
381 spin_unlock_irqrestore(&uart->port.lock, flags);
382 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
383 add_timer(&(uart->rx_dma_timer));
384}
385
386static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
387{
388 struct bfin_serial_port *uart = dev_id;
389 struct circ_buf *xmit = &uart->port.info->xmit;
390 unsigned short ier;
391
392 spin_lock(&uart->port.lock);
393 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
394 clear_dma_irqstat(uart->tx_dma_channel);
395 disable_dma(uart->tx_dma_channel);
396 ier = UART_GET_IER(uart);
397 ier &= ~ETBEI;
398 UART_PUT_IER(uart, ier);
399 xmit->tail = (xmit->tail+uart->tx_count) &(UART_XMIT_SIZE -1);
400 uart->port.icount.tx+=uart->tx_count;
401
402 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
403 uart_write_wakeup(&uart->port);
404
405 if (uart_circ_empty(xmit))
406 bfin_serial_stop_tx(&uart->port);
407 uart->tx_done = 1;
408 }
409
410 spin_unlock(&uart->port.lock);
411 return IRQ_HANDLED;
412}
413
414static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
415{
416 struct bfin_serial_port *uart = dev_id;
417 unsigned short irqstat;
418
419 uart->rx_dma_nrows++;
420 if (uart->rx_dma_nrows == DMA_RX_YCOUNT) {
421 uart->rx_dma_nrows = 0;
422 uart->rx_dma_buf.tail = DMA_RX_XCOUNT*DMA_RX_YCOUNT;
423 bfin_serial_dma_rx_chars(uart);
424 uart->rx_dma_buf.head = uart->rx_dma_buf.tail = 0;
425 }
426 spin_lock(&uart->port.lock);
427 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
428 clear_dma_irqstat(uart->rx_dma_channel);
429
430 spin_unlock(&uart->port.lock);
431 return IRQ_HANDLED;
432}
433#endif
434
435/*
436 * Return TIOCSER_TEMT when transmitter is not busy.
437 */
438static unsigned int bfin_serial_tx_empty(struct uart_port *port)
439{
440 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
441 unsigned short lsr;
442
443 lsr = UART_GET_LSR(uart);
444 if (lsr & TEMT)
445 return TIOCSER_TEMT;
446 else
447 return 0;
448}
449
450static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
451{
452#ifdef CONFIG_SERIAL_BFIN_CTSRTS
453 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
454 if (uart->cts_pin < 0)
455 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
456
457 if (gpio_get_value(uart->cts_pin))
458 return TIOCM_DSR | TIOCM_CAR;
459 else
460#endif
461 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
462}
463
464static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
465{
466#ifdef CONFIG_SERIAL_BFIN_CTSRTS
467 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
468 if (uart->rts_pin < 0)
469 return;
470
471 if (mctrl & TIOCM_RTS)
472 gpio_set_value(uart->rts_pin, 0);
473 else
474 gpio_set_value(uart->rts_pin, 1);
475#endif
476}
477
478/*
479 * Handle any change of modem status signal since we were last called.
480 */
481static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
482{
483#ifdef CONFIG_SERIAL_BFIN_CTSRTS
484 unsigned int status;
485# ifdef CONFIG_SERIAL_BFIN_DMA
486 struct uart_info *info = uart->port.info;
487 struct tty_struct *tty = info->tty;
488
489 status = bfin_serial_get_mctrl(&uart->port);
490 if (!(status & TIOCM_CTS)) {
491 tty->hw_stopped = 1;
492 } else {
493 tty->hw_stopped = 0;
494 }
495# else
496 status = bfin_serial_get_mctrl(&uart->port);
497 uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
498 if (!(status & TIOCM_CTS))
499 schedule_work(&uart->cts_workqueue);
500# endif
501#endif
502}
503
504/*
505 * Interrupts are always disabled.
506 */
507static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
508{
509}
510
511static int bfin_serial_startup(struct uart_port *port)
512{
513 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
514
515#ifdef CONFIG_SERIAL_BFIN_DMA
516 dma_addr_t dma_handle;
517
518 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
519 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
520 return -EBUSY;
521 }
522
523 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
524 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
525 free_dma(uart->rx_dma_channel);
526 return -EBUSY;
527 }
528
529 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
530 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
531
532 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
533 uart->rx_dma_buf.head = 0;
534 uart->rx_dma_buf.tail = 0;
535 uart->rx_dma_nrows = 0;
536
537 set_dma_config(uart->rx_dma_channel,
538 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
539 INTR_ON_ROW, DIMENSION_2D,
540 DATA_SIZE_8));
541 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
542 set_dma_x_modify(uart->rx_dma_channel, 1);
543 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
544 set_dma_y_modify(uart->rx_dma_channel, 1);
545 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
546 enable_dma(uart->rx_dma_channel);
547
548 uart->rx_dma_timer.data = (unsigned long)(uart);
549 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
550 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
551 add_timer(&(uart->rx_dma_timer));
552#else
553 if (request_irq
5c4e472b 554 (uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
194de561
BW		 555 "BFIN_UART_RX", uart)) {
556 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
557 return -EBUSY;
558 }
559
560 if (request_irq
5c4e472b 561 (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
194de561
BW		 562 "BFIN_UART_TX", uart)) {
563 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
564 free_irq(uart->port.irq, uart);
565 return -EBUSY;
566 }
567#endif
568 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
569 return 0;
570}
571
572static void bfin_serial_shutdown(struct uart_port *port)
573{
574 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
575
576#ifdef CONFIG_SERIAL_BFIN_DMA
577 disable_dma(uart->tx_dma_channel);
578 free_dma(uart->tx_dma_channel);
579 disable_dma(uart->rx_dma_channel);
580 free_dma(uart->rx_dma_channel);
581 del_timer(&(uart->rx_dma_timer));
582#else
583 free_irq(uart->port.irq, uart);
584 free_irq(uart->port.irq+1, uart);
585#endif
586}
587
588static void
589bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
590 struct ktermios *old)
591{
592 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
593 unsigned long flags;
594 unsigned int baud, quot;
595 unsigned short val, ier, lsr, lcr = 0;
596
597 switch (termios->c_cflag & CSIZE) {
598 case CS8:
599 lcr = WLS(8);
600 break;
601 case CS7:
602 lcr = WLS(7);
603 break;
604 case CS6:
605 lcr = WLS(6);
606 break;
607 case CS5:
608 lcr = WLS(5);
609 break;
610 default:
611 printk(KERN_ERR "%s: word lengh not supported\n",
612 __FUNCTION__);
613 }
614
615 if (termios->c_cflag & CSTOPB)
616 lcr |= STB;
617 if (termios->c_cflag & PARENB) {
618 lcr |= PEN;
619 if (!(termios->c_cflag & PARODD))
620 lcr |= EPS;
621 }
622
623 /* These controls are not implemented for this port */
624 termios->c_iflag |= INPCK | BRKINT | PARMRK;
625 termios->c_iflag &= ~(IGNPAR | IGNBRK);
626
627 /* These controls are not implemented for this port */
628 termios->c_iflag |= INPCK | BRKINT | PARMRK;
629 termios->c_iflag &= ~(IGNPAR | IGNBRK);
630
631 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
632 quot = uart_get_divisor(port, baud);
633 spin_lock_irqsave(&uart->port.lock, flags);
634
635 do {
636 lsr = UART_GET_LSR(uart);
637 } while (!(lsr & TEMT));
638
639 /* Disable UART */
640 ier = UART_GET_IER(uart);
641 UART_PUT_IER(uart, 0);
642
643 /* Set DLAB in LCR to Access DLL and DLH */
644 val = UART_GET_LCR(uart);
645 val |= DLAB;
646 UART_PUT_LCR(uart, val);
647 SSYNC();
648
649 UART_PUT_DLL(uart, quot & 0xFF);
650 SSYNC();
651 UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
652 SSYNC();
653
654 /* Clear DLAB in LCR to Access THR RBR IER */
655 val = UART_GET_LCR(uart);
656 val &= ~DLAB;
657 UART_PUT_LCR(uart, val);
658 SSYNC();
659
660 UART_PUT_LCR(uart, lcr);
661
662 /* Enable UART */
663 UART_PUT_IER(uart, ier);
664
665 val = UART_GET_GCTL(uart);
666 val |= UCEN;
667 UART_PUT_GCTL(uart, val);
668
669 spin_unlock_irqrestore(&uart->port.lock, flags);
670}
671
672static const char *bfin_serial_type(struct uart_port *port)
673{
674 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
675
676 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
677}
678
679/*
680 * Release the memory region(s) being used by 'port'.
681 */
682static void bfin_serial_release_port(struct uart_port *port)
683{
684}
685
686/*
687 * Request the memory region(s) being used by 'port'.
688 */
689static int bfin_serial_request_port(struct uart_port *port)
690{
691 return 0;
692}
693
694/*
695 * Configure/autoconfigure the port.
696 */
697static void bfin_serial_config_port(struct uart_port *port, int flags)
698{
699 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
700
701 if (flags & UART_CONFIG_TYPE &&
702 bfin_serial_request_port(&uart->port) == 0)
703 uart->port.type = PORT_BFIN;
704}
705
706/*
707 * Verify the new serial_struct (for TIOCSSERIAL).
708 * The only change we allow are to the flags and type, and
709 * even then only between PORT_BFIN and PORT_UNKNOWN
710 */
711static int
712bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
713{
714 return 0;
715}
716
717static struct uart_ops bfin_serial_pops = {
718 .tx_empty = bfin_serial_tx_empty,
719 .set_mctrl = bfin_serial_set_mctrl,
720 .get_mctrl = bfin_serial_get_mctrl,
721 .stop_tx = bfin_serial_stop_tx,
722 .start_tx = bfin_serial_start_tx,
723 .stop_rx = bfin_serial_stop_rx,
724 .enable_ms = bfin_serial_enable_ms,
725 .break_ctl = bfin_serial_break_ctl,
726 .startup = bfin_serial_startup,
727 .shutdown = bfin_serial_shutdown,
728 .set_termios = bfin_serial_set_termios,
729 .type = bfin_serial_type,
730 .release_port = bfin_serial_release_port,
731 .request_port = bfin_serial_request_port,
732 .config_port = bfin_serial_config_port,
733 .verify_port = bfin_serial_verify_port,
734};
735
736static void __init bfin_serial_init_ports(void)
737{
738 static int first = 1;
739 int i;
740
741 if (!first)
742 return;
743 first = 0;
744
745 for (i = 0; i < nr_ports; i++) {
746 bfin_serial_ports[i].port.uartclk = get_sclk();
747 bfin_serial_ports[i].port.ops = &bfin_serial_pops;
748 bfin_serial_ports[i].port.line = i;
749 bfin_serial_ports[i].port.iotype = UPIO_MEM;
750 bfin_serial_ports[i].port.membase =
751 (void __iomem *)bfin_serial_resource[i].uart_base_addr;
752 bfin_serial_ports[i].port.mapbase =
753 bfin_serial_resource[i].uart_base_addr;
754 bfin_serial_ports[i].port.irq =
755 bfin_serial_resource[i].uart_irq;
756 bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
757#ifdef CONFIG_SERIAL_BFIN_DMA
758 bfin_serial_ports[i].tx_done = 1;
759 bfin_serial_ports[i].tx_count = 0;
760 bfin_serial_ports[i].tx_dma_channel =
761 bfin_serial_resource[i].uart_tx_dma_channel;
762 bfin_serial_ports[i].rx_dma_channel =
763 bfin_serial_resource[i].uart_rx_dma_channel;
764 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
765#else
766 INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
767#endif
768#ifdef CONFIG_SERIAL_BFIN_CTSRTS
769 bfin_serial_ports[i].cts_pin =
770 bfin_serial_resource[i].uart_cts_pin;
771 bfin_serial_ports[i].rts_pin =
772 bfin_serial_resource[i].uart_rts_pin;
773#endif
774 bfin_serial_hw_init(&bfin_serial_ports[i]);
775
776 }
777}
778
779#ifdef CONFIG_SERIAL_BFIN_CONSOLE
780static void bfin_serial_console_putchar(struct uart_port *port, int ch)
781{
782 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
783 while (!(UART_GET_LSR(uart)))
784 barrier();
785 UART_PUT_CHAR(uart, ch);
786 SSYNC();
787}
788
789/*
790 * Interrupts are disabled on entering
791 */
792static void
793bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
794{
795 struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
796 int flags = 0;
797
798 spin_lock_irqsave(&uart->port.lock, flags);
799 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
800 spin_unlock_irqrestore(&uart->port.lock, flags);
801
802}
803
804/*
805 * If the port was already initialised (eg, by a boot loader),
806 * try to determine the current setup.
807 */
808static void __init
809bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
810 int *parity, int *bits)
811{
812 unsigned short status;
813
814 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
815 if (status == (ERBFI | ETBEI)) {
816 /* ok, the port was enabled */
817 unsigned short lcr, val;
818 unsigned short dlh, dll;
819
820 lcr = UART_GET_LCR(uart);
821
822 *parity = 'n';
823 if (lcr & PEN) {
824 if (lcr & EPS)
825 *parity = 'e';
826 else
827 *parity = 'o';
828 }
829 switch (lcr & 0x03) {
830 case 0: *bits = 5; break;
831 case 1: *bits = 6; break;
832 case 2: *bits = 7; break;
833 case 3: *bits = 8; break;
834 }
835 /* Set DLAB in LCR to Access DLL and DLH */
836 val = UART_GET_LCR(uart);
837 val |= DLAB;
838 UART_PUT_LCR(uart, val);
839
840 dll = UART_GET_DLL(uart);
841 dlh = UART_GET_DLH(uart);
842
843 /* Clear DLAB in LCR to Access THR RBR IER */
844 val = UART_GET_LCR(uart);
845 val &= ~DLAB;
846 UART_PUT_LCR(uart, val);
847
848 *baud = get_sclk() / (16*(dll | dlh << 8));
849 }
850 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
851}
852
853static int __init
854bfin_serial_console_setup(struct console *co, char *options)
855{
856 struct bfin_serial_port *uart;
857 int baud = 57600;
858 int bits = 8;
859 int parity = 'n';
860#ifdef CONFIG_SERIAL_BFIN_CTSRTS
861 int flow = 'r';
862#else
863 int flow = 'n';
864#endif
865
866 /*
867 * Check whether an invalid uart number has been specified, and
868 * if so, search for the first available port that does have
869 * console support.
870 */
871 if (co->index == -1 || co->index >= nr_ports)
872 co->index = 0;
873 uart = &bfin_serial_ports[co->index];
874
875 if (options)
876 uart_parse_options(options, &baud, &parity, &bits, &flow);
877 else
878 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
879
880 return uart_set_options(&uart->port, co, baud, parity, bits, flow);
881}
882
883static struct uart_driver bfin_serial_reg;
884static struct console bfin_serial_console = {
885 .name = BFIN_SERIAL_NAME,
886 .write = bfin_serial_console_write,
887 .device = uart_console_device,
888 .setup = bfin_serial_console_setup,
889 .flags = CON_PRINTBUFFER,
890 .index = -1,
891 .data = &bfin_serial_reg,
892};
893
894static int __init bfin_serial_rs_console_init(void)
895{
896 bfin_serial_init_ports();
897 register_console(&bfin_serial_console);
898 return 0;
899}
900console_initcall(bfin_serial_rs_console_init);
901
902#define BFIN_SERIAL_CONSOLE &bfin_serial_console
903#else
904#define BFIN_SERIAL_CONSOLE NULL
905#endif
906
907static struct uart_driver bfin_serial_reg = {
908 .owner = THIS_MODULE,
909 .driver_name = "bfin-uart",
910 .dev_name = BFIN_SERIAL_NAME,
911 .major = BFIN_SERIAL_MAJOR,
912 .minor = BFIN_SERIAL_MINOR,
913 .nr = NR_PORTS,
914 .cons = BFIN_SERIAL_CONSOLE,
915};
916
917static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
918{
919 struct bfin_serial_port *uart = platform_get_drvdata(dev);
920
921 if (uart)
922 uart_suspend_port(&bfin_serial_reg, &uart->port);
923
924 return 0;
925}
926
927static int bfin_serial_resume(struct platform_device *dev)
928{
929 struct bfin_serial_port *uart = platform_get_drvdata(dev);
930
931 if (uart)
932 uart_resume_port(&bfin_serial_reg, &uart->port);
933
934 return 0;
935}
936
937static int bfin_serial_probe(struct platform_device *dev)
938{
939 struct resource *res = dev->resource;
940 int i;
941
942 for (i = 0; i < dev->num_resources; i++, res++)
943 if (res->flags & IORESOURCE_MEM)
944 break;
945
946 if (i < dev->num_resources) {
947 for (i = 0; i < nr_ports; i++, res++) {
948 if (bfin_serial_ports[i].port.mapbase != res->start)
949 continue;
950 bfin_serial_ports[i].port.dev = &dev->dev;
951 uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
952 platform_set_drvdata(dev, &bfin_serial_ports[i]);
953 }
954 }
955
956 return 0;
957}
958
959static int bfin_serial_remove(struct platform_device *pdev)
960{
961 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
962
963
964#ifdef CONFIG_SERIAL_BFIN_CTSRTS
965 gpio_free(uart->cts_pin);
966 gpio_free(uart->rts_pin);
967#endif
968
969 platform_set_drvdata(pdev, NULL);
970
971 if (uart)
972 uart_remove_one_port(&bfin_serial_reg, &uart->port);
973
974 return 0;
975}
976
977static struct platform_driver bfin_serial_driver = {
978 .probe = bfin_serial_probe,
979 .remove = bfin_serial_remove,
980 .suspend = bfin_serial_suspend,
981 .resume = bfin_serial_resume,
982 .driver = {
983 .name = "bfin-uart",
984 },
985};
986
987static int __init bfin_serial_init(void)
988{
989 int ret;
990
991 pr_info("Serial: Blackfin serial driver\n");
992
993 bfin_serial_init_ports();
994
995 ret = uart_register_driver(&bfin_serial_reg);
996 if (ret == 0) {
997 ret = platform_driver_register(&bfin_serial_driver);
998 if (ret) {
999 pr_debug("uart register failed\n");
1000 uart_unregister_driver(&bfin_serial_reg);
1001 }
1002 }
1003 return ret;
1004}
1005
1006static void __exit bfin_serial_exit(void)
1007{
1008 platform_driver_unregister(&bfin_serial_driver);
1009 uart_unregister_driver(&bfin_serial_reg);
1010}
1011
1012module_init(bfin_serial_init);
1013module_exit(bfin_serial_exit);
1014
1015MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1016MODULE_DESCRIPTION("Blackfin generic serial port driver");
1017MODULE_LICENSE("GPL");
1018MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
Linux 6.x block layer and io_uring tree(s)