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[ARM] 3590/1: AT91RM9200 Platform devices support
[linux-2.6-block.git] / drivers / serial / at91_serial.c
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1e6c9c28
AV		 1/*
2 * linux/drivers/char/at91_serial.c
3 *
4 * Driver for Atmel AT91RM9200 Serial ports
5 *
6 * Copyright (C) 2003 Rick Bronson
7 *
8 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
9 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 */
26#include <linux/config.h>
27#include <linux/module.h>
28#include <linux/tty.h>
29#include <linux/ioport.h>
30#include <linux/slab.h>
31#include <linux/init.h>
32#include <linux/serial.h>
33#include <linux/console.h>
34#include <linux/sysrq.h>
35#include <linux/tty_flip.h>
36
37#include <asm/io.h>
38
39#include <asm/arch/at91rm9200_usart.h>
40#include <asm/mach/serial_at91rm9200.h>
41#include <asm/arch/board.h>
42#include <asm/arch/pio.h>
43
44
45#if defined(CONFIG_SERIAL_AT91_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
46#define SUPPORT_SYSRQ
47#endif
48
49#include <linux/serial_core.h>
50
51#ifdef CONFIG_SERIAL_AT91_TTYAT
52
53/* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
54 * should coexist with the 8250 driver, such as if we have an external 16C550
55 * UART. */
56#define SERIAL_AT91_MAJOR 204
57#define MINOR_START 154
58#define AT91_DEVICENAME "ttyAT"
59
60#else
61
62/* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
63 * name, but it is legally reserved for the 8250 driver. */
64#define SERIAL_AT91_MAJOR TTY_MAJOR
65#define MINOR_START 64
66#define AT91_DEVICENAME "ttyS"
67
68#endif
69
70#define AT91_VA_BASE_DBGU ((unsigned long) AT91_VA_BASE_SYS + AT91_DBGU)
71#define AT91_ISR_PASS_LIMIT 256
72
73#define UART_PUT_CR(port,v) writel(v, (port)->membase + AT91_US_CR)
74#define UART_GET_MR(port) readl((port)->membase + AT91_US_MR)
75#define UART_PUT_MR(port,v) writel(v, (port)->membase + AT91_US_MR)
76#define UART_PUT_IER(port,v) writel(v, (port)->membase + AT91_US_IER)
77#define UART_PUT_IDR(port,v) writel(v, (port)->membase + AT91_US_IDR)
78#define UART_GET_IMR(port) readl((port)->membase + AT91_US_IMR)
79#define UART_GET_CSR(port) readl((port)->membase + AT91_US_CSR)
80#define UART_GET_CHAR(port) readl((port)->membase + AT91_US_RHR)
81#define UART_PUT_CHAR(port,v) writel(v, (port)->membase + AT91_US_THR)
82#define UART_GET_BRGR(port) readl((port)->membase + AT91_US_BRGR)
83#define UART_PUT_BRGR(port,v) writel(v, (port)->membase + AT91_US_BRGR)
84#define UART_PUT_RTOR(port,v) writel(v, (port)->membase + AT91_US_RTOR)
85
86// #define UART_GET_CR(port) readl((port)->membase + AT91_US_CR) // is write-only
87
88 /* PDC registers */
89#define UART_PUT_PTCR(port,v) writel(v, (port)->membase + AT91_PDC_PTCR)
90#define UART_PUT_RPR(port,v) writel(v, (port)->membase + AT91_PDC_RPR)
91#define UART_PUT_RCR(port,v) writel(v, (port)->membase + AT91_PDC_RCR)
92#define UART_GET_RCR(port) readl((port)->membase + AT91_PDC_RCR)
93#define UART_PUT_RNPR(port,v) writel(v, (port)->membase + AT91_PDC_RNPR)
94#define UART_PUT_RNCR(port,v) writel(v, (port)->membase + AT91_PDC_RNCR)
95
96
97static int (*at91_open)(struct uart_port *);
98static void (*at91_close)(struct uart_port *);
99
100#ifdef SUPPORT_SYSRQ
101static struct console at91_console;
102#endif
103
104/*
105 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
106 */
107static u_int at91_tx_empty(struct uart_port *port)
108{
109 return (UART_GET_CSR(port) & AT91_US_TXEMPTY) ? TIOCSER_TEMT : 0;
110}
111
112/*
113 * Set state of the modem control output lines
114 */
115static void at91_set_mctrl(struct uart_port *port, u_int mctrl)
116{
117 unsigned int control = 0;
118
119 /*
120 * Errata #39: RTS0 is not internally connected to PA21. We need to drive
121 * the pin manually.
122 */
123 if (port->mapbase == AT91_VA_BASE_US0) {
124 if (mctrl & TIOCM_RTS)
125 at91_sys_write(AT91_PIOA + PIO_CODR, AT91_PA21_RTS0);
126 else
127 at91_sys_write(AT91_PIOA + PIO_SODR, AT91_PA21_RTS0);
128 }
129
130 if (mctrl & TIOCM_RTS)
131 control |= AT91_US_RTSEN;
132 else
133 control |= AT91_US_RTSDIS;
134
135 if (mctrl & TIOCM_DTR)
136 control |= AT91_US_DTREN;
137 else
138 control |= AT91_US_DTRDIS;
139
140 UART_PUT_CR(port,control);
141}
142
143/*
144 * Get state of the modem control input lines
145 */
146static u_int at91_get_mctrl(struct uart_port *port)
147{
148 unsigned int status, ret = 0;
149
150 status = UART_GET_CSR(port);
151
152 /*
153 * The control signals are active low.
154 */
155 if (!(status & AT91_US_DCD))
156 ret |= TIOCM_CD;
157 if (!(status & AT91_US_CTS))
158 ret |= TIOCM_CTS;
159 if (!(status & AT91_US_DSR))
160 ret |= TIOCM_DSR;
161 if (!(status & AT91_US_RI))
162 ret |= TIOCM_RI;
163
164 return ret;
165}
166
167/*
168 * Stop transmitting.
169 */
170static void at91_stop_tx(struct uart_port *port)
171{
172 UART_PUT_IDR(port, AT91_US_TXRDY);
173 port->read_status_mask &= ~AT91_US_TXRDY;
174}
175
176/*
177 * Start transmitting.
178 */
179static void at91_start_tx(struct uart_port *port)
180{
181 port->read_status_mask |= AT91_US_TXRDY;
182 UART_PUT_IER(port, AT91_US_TXRDY);
183}
184
185/*
186 * Stop receiving - port is in process of being closed.
187 */
188static void at91_stop_rx(struct uart_port *port)
189{
190 UART_PUT_IDR(port, AT91_US_RXRDY);
191}
192
193/*
194 * Enable modem status interrupts
195 */
196static void at91_enable_ms(struct uart_port *port)
197{
198 port->read_status_mask |= (AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC);
199 UART_PUT_IER(port, AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC);
200}
201
202/*
203 * Control the transmission of a break signal
204 */
205static void at91_break_ctl(struct uart_port *port, int break_state)
206{
207 if (break_state != 0)
208 UART_PUT_CR(port, AT91_US_STTBRK); /* start break */
209 else
210 UART_PUT_CR(port, AT91_US_STPBRK); /* stop break */
211}
212
213/*
214 * Characters received (called from interrupt handler)
215 */
216static void at91_rx_chars(struct uart_port *port, struct pt_regs *regs)
217{
218 struct tty_struct *tty = port->info->tty;
219 unsigned int status, ch, flg;
220
221 status = UART_GET_CSR(port) & port->read_status_mask;
222 while (status & (AT91_US_RXRDY)) {
223 ch = UART_GET_CHAR(port);
224
1e6c9c28
AV		 225 port->icount.rx++;
226
227 flg = TTY_NORMAL;
228
229 /*
230 * note that the error handling code is
231 * out of the main execution path
232 */
233 if (unlikely(status & (AT91_US_PARE | AT91_US_FRAME | AT91_US_OVRE))) {
234 UART_PUT_CR(port, AT91_US_RSTSTA); /* clear error */
235 if (status & (AT91_US_PARE))
236 port->icount.parity++;
237 if (status & (AT91_US_FRAME))
238 port->icount.frame++;
239 if (status & (AT91_US_OVRE))
240 port->icount.overrun++;
241
242 if (status & AT91_US_PARE)
243 flg = TTY_PARITY;
244 else if (status & AT91_US_FRAME)
245 flg = TTY_FRAME;
246 if (status & AT91_US_OVRE) {
247 /*
248 * overrun does *not* affect the character
249 * we read from the FIFO
250 */
251 tty_insert_flip_char(tty, ch, flg);
252 ch = 0;
253 flg = TTY_OVERRUN;
254 }
255#ifdef SUPPORT_SYSRQ
256 port->sysrq = 0;
257#endif
258 }
259
260 if (uart_handle_sysrq_char(port, ch, regs))
261 goto ignore_char;
262
263 tty_insert_flip_char(tty, ch, flg);
264
265 ignore_char:
266 status = UART_GET_CSR(port) & port->read_status_mask;
267 }
268
269 tty_flip_buffer_push(tty);
270}
271
272/*
273 * Transmit characters (called from interrupt handler)
274 */
275static void at91_tx_chars(struct uart_port *port)
276{
277 struct circ_buf *xmit = &port->info->xmit;
278
279 if (port->x_char) {
280 UART_PUT_CHAR(port, port->x_char);
281 port->icount.tx++;
282 port->x_char = 0;
283 return;
284 }
285 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
286 at91_stop_tx(port);
287 return;
288 }
289
290 while (UART_GET_CSR(port) & AT91_US_TXRDY) {
291 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
292 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
293 port->icount.tx++;
294 if (uart_circ_empty(xmit))
295 break;
296 }
297
298 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
299 uart_write_wakeup(port);
300
301 if (uart_circ_empty(xmit))
302 at91_stop_tx(port);
303}
304
305/*
306 * Interrupt handler
307 */
308static irqreturn_t at91_interrupt(int irq, void *dev_id, struct pt_regs *regs)
309{
310 struct uart_port *port = dev_id;
311 unsigned int status, pending, pass_counter = 0;
312
313 status = UART_GET_CSR(port);
314 pending = status & port->read_status_mask;
315 if (pending) {
316 do {
317 if (pending & AT91_US_RXRDY)
318 at91_rx_chars(port, regs);
319
320 /* Clear the relevent break bits */
321 if (pending & AT91_US_RXBRK) {
322 UART_PUT_CR(port, AT91_US_RSTSTA);
323 port->icount.brk++;
324 uart_handle_break(port);
325 }
326
327 // TODO: All reads to CSR will clear these interrupts!
328 if (pending & AT91_US_RIIC) port->icount.rng++;
329 if (pending & AT91_US_DSRIC) port->icount.dsr++;
330 if (pending & AT91_US_DCDIC)
331 uart_handle_dcd_change(port, !(status & AT91_US_DCD));
332 if (pending & AT91_US_CTSIC)
333 uart_handle_cts_change(port, !(status & AT91_US_CTS));
334 if (pending & (AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC))
335 wake_up_interruptible(&port->info->delta_msr_wait);
336
337 if (pending & AT91_US_TXRDY)
338 at91_tx_chars(port);
339 if (pass_counter++ > AT91_ISR_PASS_LIMIT)
340 break;
341
342 status = UART_GET_CSR(port);
343 pending = status & port->read_status_mask;
344 } while (pending);
345 }
346 return IRQ_HANDLED;
347}
348
349/*
350 * Perform initialization and enable port for reception
351 */
352static int at91_startup(struct uart_port *port)
353{
354 int retval;
355
356 /*
357 * Ensure that no interrupts are enabled otherwise when
358 * request_irq() is called we could get stuck trying to
359 * handle an unexpected interrupt
360 */
361 UART_PUT_IDR(port, -1);
362
363 /*
364 * Allocate the IRQ
365 */
366 retval = request_irq(port->irq, at91_interrupt, SA_SHIRQ, "at91_serial", port);
367 if (retval) {
368 printk("at91_serial: at91_startup - Can't get irq\n");
369 return retval;
370 }
371
372 /*
373 * If there is a specific "open" function (to register
374 * control line interrupts)
375 */
376 if (at91_open) {
377 retval = at91_open(port);
378 if (retval) {
379 free_irq(port->irq, port);
380 return retval;
381 }
382 }
383
384 port->read_status_mask = AT91_US_RXRDY | AT91_US_TXRDY | AT91_US_OVRE
385 | AT91_US_FRAME | AT91_US_PARE | AT91_US_RXBRK;
386 /*
387 * Finally, enable the serial port
388 */
389 UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX);
390 UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN); /* enable xmit & rcvr */
391 UART_PUT_IER(port, AT91_US_RXRDY); /* do receive only */
392 return 0;
393}
394
395/*
396 * Disable the port
397 */
398static void at91_shutdown(struct uart_port *port)
399{
400 /*
401 * Disable all interrupts, port and break condition.
402 */
403 UART_PUT_CR(port, AT91_US_RSTSTA);
404 UART_PUT_IDR(port, -1);
405
406 /*
407 * Free the interrupt
408 */
409 free_irq(port->irq, port);
410
411 /*
412 * If there is a specific "close" function (to unregister
413 * control line interrupts)
414 */
415 if (at91_close)
416 at91_close(port);
417}
418
419/*
420 * Power / Clock management.
421 */
422static void at91_serial_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
423{
424 switch (state) {
425 case 0:
426 /*
427 * Enable the peripheral clock for this serial port.
428 * This is called on uart_open() or a resume event.
429 */
430 at91_sys_write(AT91_PMC_PCER, 1 << port->irq);
431 break;
432 case 3:
433 /*
434 * Disable the peripheral clock for this serial port.
435 * This is called on uart_close() or a suspend event.
436 */
437 if (port->irq != AT91_ID_SYS) /* is this a shared clock? */
438 at91_sys_write(AT91_PMC_PCDR, 1 << port->irq);
439 break;
440 default:
441 printk(KERN_ERR "at91_serial: unknown pm %d\n", state);
442 }
443}
444
445/*
446 * Change the port parameters
447 */
448static void at91_set_termios(struct uart_port *port, struct termios * termios, struct termios * old)
449{
450 unsigned long flags;
451 unsigned int mode, imr, quot, baud;
452
453 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
454 quot = uart_get_divisor(port, baud);
455
456 /* Get current mode register */
457 mode = UART_GET_MR(port) & ~(AT91_US_CHRL | AT91_US_NBSTOP | AT91_US_PAR);
458
459 /* byte size */
460 switch (termios->c_cflag & CSIZE) {
461 case CS5:
462 mode |= AT91_US_CHRL_5;
463 break;
464 case CS6:
465 mode |= AT91_US_CHRL_6;
466 break;
467 case CS7:
468 mode |= AT91_US_CHRL_7;
469 break;
470 default:
471 mode |= AT91_US_CHRL_8;
472 break;
473 }
474
475 /* stop bits */
476 if (termios->c_cflag & CSTOPB)
477 mode |= AT91_US_NBSTOP_2;
478
479 /* parity */
480 if (termios->c_cflag & PARENB) {
481 if (termios->c_cflag & CMSPAR) { /* Mark or Space parity */
482 if (termios->c_cflag & PARODD)
483 mode |= AT91_US_PAR_MARK;
484 else
485 mode |= AT91_US_PAR_SPACE;
486 }
487 else if (termios->c_cflag & PARODD)
488 mode |= AT91_US_PAR_ODD;
489 else
490 mode |= AT91_US_PAR_EVEN;
491 }
492 else
493 mode |= AT91_US_PAR_NONE;
494
495 spin_lock_irqsave(&port->lock, flags);
496
497 port->read_status_mask |= AT91_US_OVRE;
498 if (termios->c_iflag & INPCK)
499 port->read_status_mask |= AT91_US_FRAME | AT91_US_PARE;
500 if (termios->c_iflag & (BRKINT | PARMRK))
501 port->read_status_mask |= AT91_US_RXBRK;
502
503 /*
504 * Characters to ignore
505 */
506 port->ignore_status_mask = 0;
507 if (termios->c_iflag & IGNPAR)
508 port->ignore_status_mask |= (AT91_US_FRAME | AT91_US_PARE);
509 if (termios->c_iflag & IGNBRK) {
510 port->ignore_status_mask |= AT91_US_RXBRK;
511 /*
512 * If we're ignoring parity and break indicators,
513 * ignore overruns too (for real raw support).
514 */
515 if (termios->c_iflag & IGNPAR)
516 port->ignore_status_mask |= AT91_US_OVRE;
517 }
518
519 // TODO: Ignore all characters if CREAD is set.
520
521 /* update the per-port timeout */
522 uart_update_timeout(port, termios->c_cflag, baud);
523
524 /* disable interrupts and drain transmitter */
525 imr = UART_GET_IMR(port); /* get interrupt mask */
526 UART_PUT_IDR(port, -1); /* disable all interrupts */
527 while (!(UART_GET_CSR(port) & AT91_US_TXEMPTY)) { barrier(); }
528
529 /* disable receiver and transmitter */
530 UART_PUT_CR(port, AT91_US_TXDIS | AT91_US_RXDIS);
531
532 /* set the parity, stop bits and data size */
533 UART_PUT_MR(port, mode);
534
535 /* set the baud rate */
536 UART_PUT_BRGR(port, quot);
537 UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX);
538 UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN);
539
540 /* restore interrupts */
541 UART_PUT_IER(port, imr);
542
543 /* CTS flow-control and modem-status interrupts */
544 if (UART_ENABLE_MS(port, termios->c_cflag))
545 port->ops->enable_ms(port);
546
547 spin_unlock_irqrestore(&port->lock, flags);
548}
549
550/*
551 * Return string describing the specified port
552 */
553static const char *at91_type(struct uart_port *port)
554{
555 return (port->type == PORT_AT91RM9200) ? "AT91_SERIAL" : NULL;
556}
557
558/*
559 * Release the memory region(s) being used by 'port'.
560 */
561static void at91_release_port(struct uart_port *port)
562{
563 release_mem_region(port->mapbase,
564 (port->mapbase == AT91_VA_BASE_DBGU) ? 512 : SZ_16K);
565}
566
567/*
568 * Request the memory region(s) being used by 'port'.
569 */
570static int at91_request_port(struct uart_port *port)
571{
572 return request_mem_region(port->mapbase,
573 (port->mapbase == AT91_VA_BASE_DBGU) ? 512 : SZ_16K,
574 "at91_serial") != NULL ? 0 : -EBUSY;
575
576}
577
578/*
579 * Configure/autoconfigure the port.
580 */
581static void at91_config_port(struct uart_port *port, int flags)
582{
583 if (flags & UART_CONFIG_TYPE) {
584 port->type = PORT_AT91RM9200;
585 at91_request_port(port);
586 }
587}
588
589/*
590 * Verify the new serial_struct (for TIOCSSERIAL).
591 */
592static int at91_verify_port(struct uart_port *port, struct serial_struct *ser)
593{
594 int ret = 0;
595 if (ser->type != PORT_UNKNOWN && ser->type != PORT_AT91RM9200)
596 ret = -EINVAL;
597 if (port->irq != ser->irq)
598 ret = -EINVAL;
599 if (ser->io_type != SERIAL_IO_MEM)
600 ret = -EINVAL;
601 if (port->uartclk / 16 != ser->baud_base)
602 ret = -EINVAL;
603 if ((void *)port->mapbase != ser->iomem_base)
604 ret = -EINVAL;
605 if (port->iobase != ser->port)
606 ret = -EINVAL;
607 if (ser->hub6 != 0)
608 ret = -EINVAL;
609 return ret;
610}
611
612static struct uart_ops at91_pops = {
613 .tx_empty = at91_tx_empty,
614 .set_mctrl = at91_set_mctrl,
615 .get_mctrl = at91_get_mctrl,
616 .stop_tx = at91_stop_tx,
617 .start_tx = at91_start_tx,
618 .stop_rx = at91_stop_rx,
619 .enable_ms = at91_enable_ms,
620 .break_ctl = at91_break_ctl,
621 .startup = at91_startup,
622 .shutdown = at91_shutdown,
623 .set_termios = at91_set_termios,
624 .type = at91_type,
625 .release_port = at91_release_port,
626 .request_port = at91_request_port,
627 .config_port = at91_config_port,
628 .verify_port = at91_verify_port,
629 .pm = at91_serial_pm,
630};
631
632static struct uart_port at91_ports[AT91_NR_UART];
633
634void __init at91_init_ports(void)
635{
636 static int first = 1;
637 int i;
638
639 if (!first)
640 return;
641 first = 0;
642
643 for (i = 0; i < AT91_NR_UART; i++) {
644 at91_ports[i].iotype = UPIO_MEM;
645 at91_ports[i].flags = UPF_BOOT_AUTOCONF;
646 at91_ports[i].uartclk = at91_master_clock;
647 at91_ports[i].ops = &at91_pops;
648 at91_ports[i].fifosize = 1;
649 at91_ports[i].line = i;
650 }
651}
652
653void __init at91_register_uart_fns(struct at91rm9200_port_fns *fns)
654{
655 if (fns->enable_ms)
656 at91_pops.enable_ms = fns->enable_ms;
657 if (fns->get_mctrl)
658 at91_pops.get_mctrl = fns->get_mctrl;
659 if (fns->set_mctrl)
660 at91_pops.set_mctrl = fns->set_mctrl;
661 at91_open = fns->open;
662 at91_close = fns->close;
663 at91_pops.pm = fns->pm;
664 at91_pops.set_wake = fns->set_wake;
665}
666
667/*
668 * Setup ports.
669 */
670void __init at91_register_uart(int idx, int port)
671{
672 if ((idx < 0) || (idx >= AT91_NR_UART)) {
673 printk(KERN_ERR "%s: bad index number %d\n", __FUNCTION__, idx);
674 return;
675 }
676
677 switch (port) {
678 case 0:
679 at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_US0;
680 at91_ports[idx].mapbase = AT91_VA_BASE_US0;
681 at91_ports[idx].irq = AT91_ID_US0;
682 AT91_CfgPIO_USART0();
683 break;
684 case 1:
685 at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_US1;
686 at91_ports[idx].mapbase = AT91_VA_BASE_US1;
687 at91_ports[idx].irq = AT91_ID_US1;
688 AT91_CfgPIO_USART1();
689 break;
690 case 2:
691 at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_US2;
692 at91_ports[idx].mapbase = AT91_VA_BASE_US2;
693 at91_ports[idx].irq = AT91_ID_US2;
694 AT91_CfgPIO_USART2();
695 break;
696 case 3:
697 at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_US3;
698 at91_ports[idx].mapbase = AT91_VA_BASE_US3;
699 at91_ports[idx].irq = AT91_ID_US3;
700 AT91_CfgPIO_USART3();
701 break;
702 case 4:
703 at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_DBGU;
704 at91_ports[idx].mapbase = AT91_VA_BASE_DBGU;
705 at91_ports[idx].irq = AT91_ID_SYS;
706 AT91_CfgPIO_DBGU();
707 break;
708 default:
709 printk(KERN_ERR "%s : bad port number %d\n", __FUNCTION__, port);
710 }
711}
712
713#ifdef CONFIG_SERIAL_AT91_CONSOLE
d358788f
RK		 714static void at91_console_putchar(struct uart_port *port, int ch)
715{
716 while (!(UART_GET_CSR(port) & AT91_US_TXRDY))
717 barrier();
718 UART_PUT_CHAR(port, ch);
719}
1e6c9c28
AV		 720
721/*
722 * Interrupts are disabled on entering
723 */
724static void at91_console_write(struct console *co, const char *s, u_int count)
725{
726 struct uart_port *port = at91_ports + co->index;
d358788f 727 unsigned int status, imr;
1e6c9c28
AV		 728
729 /*
730 * First, save IMR and then disable interrupts
731 */
732 imr = UART_GET_IMR(port); /* get interrupt mask */
733 UART_PUT_IDR(port, AT91_US_RXRDY | AT91_US_TXRDY);
734
d358788f 735 uart_console_write(port, s, count, at91_console_putchar);
1e6c9c28
AV		 736
737 /*
738 * Finally, wait for transmitter to become empty
739 * and restore IMR
740 */
741 do {
742 status = UART_GET_CSR(port);
743 } while (!(status & AT91_US_TXRDY));
744 UART_PUT_IER(port, imr); /* set interrupts back the way they were */
745}
746
747/*
748 * If the port was already initialised (eg, by a boot loader), try to determine
749 * the current setup.
750 */
751static void __init at91_console_get_options(struct uart_port *port, int *baud, int *parity, int *bits)
752{
753 unsigned int mr, quot;
754
755// TODO: CR is a write-only register
756// unsigned int cr;
757//
758// cr = UART_GET_CR(port) & (AT91_US_RXEN | AT91_US_TXEN);
759// if (cr == (AT91_US_RXEN | AT91_US_TXEN)) {
760// /* ok, the port was enabled */
761// }
762
763 mr = UART_GET_MR(port) & AT91_US_CHRL;
764 if (mr == AT91_US_CHRL_8)
765 *bits = 8;
766 else
767 *bits = 7;
768
769 mr = UART_GET_MR(port) & AT91_US_PAR;
770 if (mr == AT91_US_PAR_EVEN)
771 *parity = 'e';
772 else if (mr == AT91_US_PAR_ODD)
773 *parity = 'o';
774
775 quot = UART_GET_BRGR(port);
776 *baud = port->uartclk / (16 * (quot));
777}
778
779static int __init at91_console_setup(struct console *co, char *options)
780{
781 struct uart_port *port;
782 int baud = 115200;
783 int bits = 8;
784 int parity = 'n';
785 int flow = 'n';
786
787 /*
788 * Check whether an invalid uart number has been specified, and
789 * if so, search for the first available port that does have
790 * console support.
791 */
792 port = uart_get_console(at91_ports, AT91_NR_UART, co);
793
794 /*
795 * Enable the serial console, in-case bootloader did not do it.
796 */
797 at91_sys_write(AT91_PMC_PCER, 1 << port->irq); /* enable clock */
798 UART_PUT_IDR(port, -1); /* disable interrupts */
799 UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX);
800 UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN);
801
802 if (options)
803 uart_parse_options(options, &baud, &parity, &bits, &flow);
804 else
805 at91_console_get_options(port, &baud, &parity, &bits);
806
807 return uart_set_options(port, co, baud, parity, bits, flow);
808}
809
810static struct uart_driver at91_uart;
811
812static struct console at91_console = {
813 .name = AT91_DEVICENAME,
814 .write = at91_console_write,
815 .device = uart_console_device,
816 .setup = at91_console_setup,
817 .flags = CON_PRINTBUFFER,
818 .index = -1,
819 .data = &at91_uart,
820};
821
822#define AT91_CONSOLE_DEVICE &at91_console
823
824static int __init at91_console_init(void)
825{
826 at91_init_ports();
827
828 at91_console.index = at91_console_port;
829 register_console(&at91_console);
830 return 0;
831}
832console_initcall(at91_console_init);
833
834#else
835#define AT91_CONSOLE_DEVICE NULL
836#endif
837
838static struct uart_driver at91_uart = {
839 .owner = THIS_MODULE,
840 .driver_name = AT91_DEVICENAME,
841 .dev_name = AT91_DEVICENAME,
842 .devfs_name = AT91_DEVICENAME,
843 .major = SERIAL_AT91_MAJOR,
844 .minor = MINOR_START,
845 .nr = AT91_NR_UART,
846 .cons = AT91_CONSOLE_DEVICE,
847};
848
849static int __init at91_serial_init(void)
850{
851 int ret, i;
852
853 at91_init_ports();
854
855 ret = uart_register_driver(&at91_uart);
856 if (ret)
857 return ret;
858
859 for (i = 0; i < AT91_NR_UART; i++) {
860 if (at91_serial_map[i] >= 0)
861 uart_add_one_port(&at91_uart, &at91_ports[i]);
862 }
863
864 return 0;
865}
866
867static void __exit at91_serial_exit(void)
868{
869 int i;
870
871 for (i = 0; i < AT91_NR_UART; i++) {
872 if (at91_serial_map[i] >= 0)
873 uart_remove_one_port(&at91_uart, &at91_ports[i]);
874 }
875
876 uart_unregister_driver(&at91_uart);
877}
878
879module_init(at91_serial_init);
880module_exit(at91_serial_exit);
881
882MODULE_AUTHOR("Rick Bronson");
883MODULE_DESCRIPTION("AT91 generic serial port driver");
884MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)