[linux-2.6-block.git] / drivers / serial / altera_uart.c

/*
 * altera_uart.c -- Altera UART driver
 *
 * Based on mcf.c -- Freescale ColdFire UART driver
 *
 * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com>
 * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw>
 * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/console.h>
#include <linux/tty.h>
#include <linux/tty_flip.h>
#include <linux/serial.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/altera_uart.h>

#define DRV_NAME "altera_uart"

/*
 * Altera UART register definitions according to the Nios UART datasheet:
 * http://www.altera.com/literature/ds/ds_nios_uart.pdf
 */

#define ALTERA_UART_SIZE		32

#define ALTERA_UART_RXDATA_REG		0
#define ALTERA_UART_TXDATA_REG		4
#define ALTERA_UART_STATUS_REG		8
#define ALTERA_UART_CONTROL_REG		12
#define ALTERA_UART_DIVISOR_REG		16
#define ALTERA_UART_EOP_REG		20

#define ALTERA_UART_STATUS_PE_MSK	0x0001	/* parity error */
#define ALTERA_UART_STATUS_FE_MSK	0x0002	/* framing error */
#define ALTERA_UART_STATUS_BRK_MSK	0x0004	/* break */
#define ALTERA_UART_STATUS_ROE_MSK	0x0008	/* RX overrun error */
#define ALTERA_UART_STATUS_TOE_MSK	0x0010	/* TX overrun error */
#define ALTERA_UART_STATUS_TMT_MSK	0x0020	/* TX shift register state */
#define ALTERA_UART_STATUS_TRDY_MSK	0x0040	/* TX ready */
#define ALTERA_UART_STATUS_RRDY_MSK	0x0080	/* RX ready */
#define ALTERA_UART_STATUS_E_MSK	0x0100	/* exception condition */
#define ALTERA_UART_STATUS_DCTS_MSK	0x0400	/* CTS logic-level change */
#define ALTERA_UART_STATUS_CTS_MSK	0x0800	/* CTS logic state */
#define ALTERA_UART_STATUS_EOP_MSK	0x1000	/* EOP written/read */

						/* Enable interrupt on... */
#define ALTERA_UART_CONTROL_PE_MSK	0x0001	/* ...parity error */
#define ALTERA_UART_CONTROL_FE_MSK	0x0002	/* ...framing error */
#define ALTERA_UART_CONTROL_BRK_MSK	0x0004	/* ...break */
#define ALTERA_UART_CONTROL_ROE_MSK	0x0008	/* ...RX overrun */
#define ALTERA_UART_CONTROL_TOE_MSK	0x0010	/* ...TX overrun */
#define ALTERA_UART_CONTROL_TMT_MSK	0x0020	/* ...TX shift register empty */
#define ALTERA_UART_CONTROL_TRDY_MSK	0x0040	/* ...TX ready */
#define ALTERA_UART_CONTROL_RRDY_MSK	0x0080	/* ...RX ready */
#define ALTERA_UART_CONTROL_E_MSK	0x0100	/* ...exception*/

#define ALTERA_UART_CONTROL_TRBK_MSK	0x0200	/* TX break */
#define ALTERA_UART_CONTROL_DCTS_MSK	0x0400	/* Interrupt on CTS change */
#define ALTERA_UART_CONTROL_RTS_MSK	0x0800	/* RTS signal */
#define ALTERA_UART_CONTROL_EOP_MSK	0x1000	/* Interrupt on EOP */

/*
 * Local per-uart structure.
 */
struct altera_uart {
	struct uart_port port;
	struct timer_list tmr;
	unsigned int sigs;	/* Local copy of line sigs */
	unsigned short imr;	/* Local IMR mirror */
};

static u32 altera_uart_readl(struct uart_port *port, int reg)
{
	struct altera_uart_platform_uart *platp = port->private_data;

	return readl(port->membase + (reg << platp->bus_shift));
}

static void altera_uart_writel(struct uart_port *port, u32 dat, int reg)
{
	struct altera_uart_platform_uart *platp = port->private_data;

	writel(dat, port->membase + (reg << platp->bus_shift));
}

static unsigned int altera_uart_tx_empty(struct uart_port *port)
{
	return (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
		ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0;
}

static unsigned int altera_uart_get_mctrl(struct uart_port *port)
{
	struct altera_uart *pp = container_of(port, struct altera_uart, port);
	unsigned int sigs;

	sigs = (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
	     ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0;
	sigs |= (pp->sigs & TIOCM_RTS);

	return sigs;
}

static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs)
{
	struct altera_uart *pp = container_of(port, struct altera_uart, port);

	pp->sigs = sigs;
	if (sigs & TIOCM_RTS)
		pp->imr |= ALTERA_UART_CONTROL_RTS_MSK;
	else
		pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK;
	altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
}

static void altera_uart_start_tx(struct uart_port *port)
{
	struct altera_uart *pp = container_of(port, struct altera_uart, port);

	pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK;
	altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
}

static void altera_uart_stop_tx(struct uart_port *port)
{
	struct altera_uart *pp = container_of(port, struct altera_uart, port);

	pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
	altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
}

static void altera_uart_stop_rx(struct uart_port *port)
{
	struct altera_uart *pp = container_of(port, struct altera_uart, port);

	pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK;
	altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
}

static void altera_uart_break_ctl(struct uart_port *port, int break_state)
{
	struct altera_uart *pp = container_of(port, struct altera_uart, port);
	unsigned long flags;

	spin_lock_irqsave(&port->lock, flags);
	if (break_state == -1)
		pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK;
	else
		pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK;
	altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
	spin_unlock_irqrestore(&port->lock, flags);
}

static void altera_uart_enable_ms(struct uart_port *port)
{
}

static void altera_uart_set_termios(struct uart_port *port,
				    struct ktermios *termios,
				    struct ktermios *old)
{
	unsigned long flags;
	unsigned int baud, baudclk;

	baud = uart_get_baud_rate(port, termios, old, 0, 4000000);
	baudclk = port->uartclk / baud;

	if (old)
		tty_termios_copy_hw(termios, old);
	tty_termios_encode_baud_rate(termios, baud, baud);

	spin_lock_irqsave(&port->lock, flags);
	uart_update_timeout(port, termios->c_cflag, baud);
	altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
	spin_unlock_irqrestore(&port->lock, flags);
}

static void altera_uart_rx_chars(struct altera_uart *pp)
{
	struct uart_port *port = &pp->port;
	unsigned char ch, flag;
	unsigned short status;

	while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) &
	       ALTERA_UART_STATUS_RRDY_MSK) {
		ch = altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
		flag = TTY_NORMAL;
		port->icount.rx++;

		if (status & ALTERA_UART_STATUS_E_MSK) {
			altera_uart_writel(port, status,
					   ALTERA_UART_STATUS_REG);

			if (status & ALTERA_UART_STATUS_BRK_MSK) {
				port->icount.brk++;
				if (uart_handle_break(port))
					continue;
			} else if (status & ALTERA_UART_STATUS_PE_MSK) {
				port->icount.parity++;
			} else if (status & ALTERA_UART_STATUS_ROE_MSK) {
				port->icount.overrun++;
			} else if (status & ALTERA_UART_STATUS_FE_MSK) {
				port->icount.frame++;
			}

			status &= port->read_status_mask;

			if (status & ALTERA_UART_STATUS_BRK_MSK)
				flag = TTY_BREAK;
			else if (status & ALTERA_UART_STATUS_PE_MSK)
				flag = TTY_PARITY;
			else if (status & ALTERA_UART_STATUS_FE_MSK)
				flag = TTY_FRAME;
		}

		if (uart_handle_sysrq_char(port, ch))
			continue;
		uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch,
				 flag);
	}

	tty_flip_buffer_push(port->state->port.tty);
}

static void altera_uart_tx_chars(struct altera_uart *pp)
{
	struct uart_port *port = &pp->port;
	struct circ_buf *xmit = &port->state->xmit;

	if (port->x_char) {
		/* Send special char - probably flow control */
		altera_uart_writel(port, port->x_char, ALTERA_UART_TXDATA_REG);
		port->x_char = 0;
		port->icount.tx++;
		return;
	}

	while (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
	       ALTERA_UART_STATUS_TRDY_MSK) {
		if (xmit->head == xmit->tail)
			break;
		altera_uart_writel(port, xmit->buf[xmit->tail],
		       ALTERA_UART_TXDATA_REG);
		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
		port->icount.tx++;
	}

	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
		uart_write_wakeup(port);

	if (xmit->head == xmit->tail) {
		pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
		altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
	}
}

static irqreturn_t altera_uart_interrupt(int irq, void *data)
{
	struct uart_port *port = data;
	struct altera_uart *pp = container_of(port, struct altera_uart, port);
	unsigned int isr;

	isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr;

	spin_lock(&port->lock);
	if (isr & ALTERA_UART_STATUS_RRDY_MSK)
		altera_uart_rx_chars(pp);
	if (isr & ALTERA_UART_STATUS_TRDY_MSK)
		altera_uart_tx_chars(pp);
	spin_unlock(&port->lock);

	return IRQ_RETVAL(isr);
}

static void altera_uart_timer(unsigned long data)
{
	struct uart_port *port = (void *)data;
	struct altera_uart *pp = container_of(port, struct altera_uart, port);

	altera_uart_interrupt(0, port);
	mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
}

static void altera_uart_config_port(struct uart_port *port, int flags)
{
	port->type = PORT_ALTERA_UART;

	/* Clear mask, so no surprise interrupts. */
	altera_uart_writel(port, 0, ALTERA_UART_CONTROL_REG);
	/* Clear status register */
	altera_uart_writel(port, 0, ALTERA_UART_STATUS_REG);
}

static int altera_uart_startup(struct uart_port *port)
{
	struct altera_uart *pp = container_of(port, struct altera_uart, port);
	unsigned long flags;
	int ret;

	if (!port->irq) {
		setup_timer(&pp->tmr, altera_uart_timer, (unsigned long)port);
		mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
		return 0;
	}

	ret = request_irq(port->irq, altera_uart_interrupt, IRQF_DISABLED,
			DRV_NAME, port);
	if (ret) {
		pr_err(DRV_NAME ": unable to attach Altera UART %d "
		       "interrupt vector=%d\n", port->line, port->irq);
		return ret;
	}

	spin_lock_irqsave(&port->lock, flags);

	/* Enable RX interrupts now */
	pp->imr = ALTERA_UART_CONTROL_RRDY_MSK;
	writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);

	spin_unlock_irqrestore(&port->lock, flags);

	return 0;
}

static void altera_uart_shutdown(struct uart_port *port)
{
	struct altera_uart *pp = container_of(port, struct altera_uart, port);
	unsigned long flags;

	spin_lock_irqsave(&port->lock, flags);

	/* Disable all interrupts now */
	pp->imr = 0;
	writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);

	spin_unlock_irqrestore(&port->lock, flags);

	if (port->irq)
		free_irq(port->irq, port);
	else
		del_timer_sync(&pp->tmr);
}

static const char *altera_uart_type(struct uart_port *port)
{
	return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL;
}

static int altera_uart_request_port(struct uart_port *port)
{
	/* UARTs always present */
	return 0;
}

static void altera_uart_release_port(struct uart_port *port)
{
	/* Nothing to release... */
}

static int altera_uart_verify_port(struct uart_port *port,
				   struct serial_struct *ser)
{
	if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART))
		return -EINVAL;
	return 0;
}

/*
 *	Define the basic serial functions we support.
 */
static struct uart_ops altera_uart_ops = {
	.tx_empty	= altera_uart_tx_empty,
	.get_mctrl	= altera_uart_get_mctrl,
	.set_mctrl	= altera_uart_set_mctrl,
	.start_tx	= altera_uart_start_tx,
	.stop_tx	= altera_uart_stop_tx,
	.stop_rx	= altera_uart_stop_rx,
	.enable_ms	= altera_uart_enable_ms,
	.break_ctl	= altera_uart_break_ctl,
	.startup	= altera_uart_startup,
	.shutdown	= altera_uart_shutdown,
	.set_termios	= altera_uart_set_termios,
	.type		= altera_uart_type,
	.request_port	= altera_uart_request_port,
	.release_port	= altera_uart_release_port,
	.config_port	= altera_uart_config_port,
	.verify_port	= altera_uart_verify_port,
};

static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS];

#if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE)

int __init early_altera_uart_setup(struct altera_uart_platform_uart *platp)
{
	struct uart_port *port;
	int i;

	for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS && platp[i].mapbase; i++) {
		port = &altera_uart_ports[i].port;

		port->line = i;
		port->type = PORT_ALTERA_UART;
		port->mapbase = platp[i].mapbase;
		port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
		port->iotype = SERIAL_IO_MEM;
		port->irq = platp[i].irq;
		port->uartclk = platp[i].uartclk;
		port->flags = ASYNC_BOOT_AUTOCONF;
		port->ops = &altera_uart_ops;
		port->private_data = platp;
	}

	return 0;
}

static void altera_uart_console_putc(struct uart_port *port, const char c)
{
	while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
		 ALTERA_UART_STATUS_TRDY_MSK))
		cpu_relax();

	writel(c, port->membase + ALTERA_UART_TXDATA_REG);
}

static void altera_uart_console_write(struct console *co, const char *s,
				      unsigned int count)
{
	struct uart_port *port = &(altera_uart_ports + co->index)->port;

	for (; count; count--, s++) {
		altera_uart_console_putc(port, *s);
		if (*s == '\n')
			altera_uart_console_putc(port, '\r');
	}
}

static int __init altera_uart_console_setup(struct console *co, char *options)
{
	struct uart_port *port;
	int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE;
	int bits = 8;
	int parity = 'n';
	int flow = 'n';

	if (co->index < 0 || co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
		return -EINVAL;
	port = &altera_uart_ports[co->index].port;
	if (port->membase == 0)
		return -ENODEV;

	if (options)
		uart_parse_options(options, &baud, &parity, &bits, &flow);

	return uart_set_options(port, co, baud, parity, bits, flow);
}

static struct uart_driver altera_uart_driver;

static struct console altera_uart_console = {
	.name	= "ttyS",
	.write	= altera_uart_console_write,
	.device	= uart_console_device,
	.setup	= altera_uart_console_setup,
	.flags	= CON_PRINTBUFFER,
	.index	= -1,
	.data	= &altera_uart_driver,
};

static int __init altera_uart_console_init(void)
{
	register_console(&altera_uart_console);
	return 0;
}

console_initcall(altera_uart_console_init);

#define	ALTERA_UART_CONSOLE	(&altera_uart_console)

#else

#define	ALTERA_UART_CONSOLE	NULL

#endif /* CONFIG_ALTERA_UART_CONSOLE */

/*
 *	Define the altera_uart UART driver structure.
 */
static struct uart_driver altera_uart_driver = {
	.owner		= THIS_MODULE,
	.driver_name	= DRV_NAME,
	.dev_name	= "ttyS",
	.major		= TTY_MAJOR,
	.minor		= 64,
	.nr		= CONFIG_SERIAL_ALTERA_UART_MAXPORTS,
	.cons		= ALTERA_UART_CONSOLE,
};

static int __devinit altera_uart_probe(struct platform_device *pdev)
{
	struct altera_uart_platform_uart *platp = pdev->dev.platform_data;
	struct uart_port *port;
	struct resource *res_mem;
	struct resource *res_irq;
	int i = pdev->id;

	/* -1 emphasizes that the platform must have one port, no .N suffix */
	if (i == -1)
		i = 0;

	if (i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
		return -EINVAL;

	port = &altera_uart_ports[i].port;

	res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (res_mem)
		port->mapbase = res_mem->start;
	else if (platp->mapbase)
		port->mapbase = platp->mapbase;
	else
		return -EINVAL;

	res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
	if (res_irq)
		port->irq = res_irq->start;
	else if (platp->irq)
		port->irq = platp->irq;

	port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
	if (!port->membase)
		return -ENOMEM;

	port->line = i;
	port->type = PORT_ALTERA_UART;
	port->iotype = SERIAL_IO_MEM;
	port->uartclk = platp->uartclk;
	port->ops = &altera_uart_ops;
	port->flags = ASYNC_BOOT_AUTOCONF;
	port->private_data = platp;

	uart_add_one_port(&altera_uart_driver, port);

	return 0;
}

static int __devexit altera_uart_remove(struct platform_device *pdev)
{
	struct uart_port *port = &altera_uart_ports[pdev->id].port;

	uart_remove_one_port(&altera_uart_driver, port);
	return 0;
}

static struct platform_driver altera_uart_platform_driver = {
	.probe	= altera_uart_probe,
	.remove	= __devexit_p(altera_uart_remove),
	.driver	= {
		.name	= DRV_NAME,
		.owner	= THIS_MODULE,
		.pm	= NULL,
	},
};

static int __init altera_uart_init(void)
{
	int rc;

	rc = uart_register_driver(&altera_uart_driver);
	if (rc)
		return rc;
	rc = platform_driver_register(&altera_uart_platform_driver);
	if (rc) {
		uart_unregister_driver(&altera_uart_driver);
		return rc;
	}
	return 0;
}

static void __exit altera_uart_exit(void)
{
	platform_driver_unregister(&altera_uart_platform_driver);
	uart_unregister_driver(&altera_uart_driver);
}

module_init(altera_uart_init);
module_exit(altera_uart_exit);

MODULE_DESCRIPTION("Altera UART driver");
MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:" DRV_NAME);
Commit	Line	Data
6b7d8f8b TK	1	/*
	2	* altera_uart.c -- Altera UART driver
	3	*
	4	* Based on mcf.c -- Freescale ColdFire UART driver
	5	*
	6	* (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com>
	7	* (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw>
	8	* (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch>
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; either version 2 of the License, or
	13	* (at your option) any later version.
	14	*/
	15
	16	#include <linux/kernel.h>
	17	#include <linux/init.h>
2f8b9c15	18	#include <linux/timer.h>
6b7d8f8b TK	19	#include <linux/interrupt.h>
	20	#include <linux/module.h>
	21	#include <linux/console.h>
	22	#include <linux/tty.h>
	23	#include <linux/tty_flip.h>
	24	#include <linux/serial.h>
	25	#include <linux/serial_core.h>
	26	#include <linux/platform_device.h>
	27	#include <linux/io.h>
	28	#include <linux/altera_uart.h>
	29
	30	#define DRV_NAME "altera_uart"
	31
	32	/*
	33	* Altera UART register definitions according to the Nios UART datasheet:
	34	* http://www.altera.com/literature/ds/ds_nios_uart.pdf
	35	*/
	36
	37	#define ALTERA_UART_SIZE 32
	38
	39	#define ALTERA_UART_RXDATA_REG 0
	40	#define ALTERA_UART_TXDATA_REG 4
	41	#define ALTERA_UART_STATUS_REG 8
	42	#define ALTERA_UART_CONTROL_REG 12
	43	#define ALTERA_UART_DIVISOR_REG 16
	44	#define ALTERA_UART_EOP_REG 20
	45
	46	#define ALTERA_UART_STATUS_PE_MSK 0x0001 /* parity error */
	47	#define ALTERA_UART_STATUS_FE_MSK 0x0002 /* framing error */
	48	#define ALTERA_UART_STATUS_BRK_MSK 0x0004 /* break */
	49	#define ALTERA_UART_STATUS_ROE_MSK 0x0008 /* RX overrun error */
	50	#define ALTERA_UART_STATUS_TOE_MSK 0x0010 /* TX overrun error */
	51	#define ALTERA_UART_STATUS_TMT_MSK 0x0020 /* TX shift register state */
	52	#define ALTERA_UART_STATUS_TRDY_MSK 0x0040 /* TX ready */
	53	#define ALTERA_UART_STATUS_RRDY_MSK 0x0080 /* RX ready */
	54	#define ALTERA_UART_STATUS_E_MSK 0x0100 /* exception condition */
	55	#define ALTERA_UART_STATUS_DCTS_MSK 0x0400 /* CTS logic-level change */
	56	#define ALTERA_UART_STATUS_CTS_MSK 0x0800 /* CTS logic state */
	57	#define ALTERA_UART_STATUS_EOP_MSK 0x1000 /* EOP written/read */
	58
	59	/* Enable interrupt on... */
	60	#define ALTERA_UART_CONTROL_PE_MSK 0x0001 /* ...parity error */
	61	#define ALTERA_UART_CONTROL_FE_MSK 0x0002 /* ...framing error */
	62	#define ALTERA_UART_CONTROL_BRK_MSK 0x0004 /* ...break */
	63	#define ALTERA_UART_CONTROL_ROE_MSK 0x0008 /* ...RX overrun */
	64	#define ALTERA_UART_CONTROL_TOE_MSK 0x0010 /* ...TX overrun */
	65	#define ALTERA_UART_CONTROL_TMT_MSK 0x0020 /* ...TX shift register empty */
	66	#define ALTERA_UART_CONTROL_TRDY_MSK 0x0040 /* ...TX ready */
	67	#define ALTERA_UART_CONTROL_RRDY_MSK 0x0080 /* ...RX ready */
	68	#define ALTERA_UART_CONTROL_E_MSK 0x0100 /* ...exception*/
	69
	70	#define ALTERA_UART_CONTROL_TRBK_MSK 0x0200 /* TX break */
	71	#define ALTERA_UART_CONTROL_DCTS_MSK 0x0400 /* Interrupt on CTS change */
	72	#define ALTERA_UART_CONTROL_RTS_MSK 0x0800 /* RTS signal */
	73	#define ALTERA_UART_CONTROL_EOP_MSK 0x1000 /* Interrupt on EOP */
	74
	75	/*
	76	* Local per-uart structure.
	77	*/
	78	struct altera_uart {
	79	struct uart_port port;
2f8b9c15	80	struct timer_list tmr;
6b7d8f8b TK	81	unsigned int sigs; /* Local copy of line sigs */
	82	unsigned short imr; /* Local IMR mirror */
	83	};
	84
0d426eda AV	85	static u32 altera_uart_readl(struct uart_port *port, int reg)
	86	{
	87	struct altera_uart_platform_uart *platp = port->private_data;
	88
	89	return readl(port->membase + (reg << platp->bus_shift));
	90	}
	91
	92	static void altera_uart_writel(struct uart_port *port, u32 dat, int reg)
	93	{
	94	struct altera_uart_platform_uart *platp = port->private_data;
	95
	96	writel(dat, port->membase + (reg << platp->bus_shift));
	97	}
	98
6b7d8f8b TK	99	static unsigned int altera_uart_tx_empty(struct uart_port *port)
6b7d8f8b TK	100	{
0d426eda	101	return (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
6b7d8f8b TK	102	ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0;
	103	}
	104
	105	static unsigned int altera_uart_get_mctrl(struct uart_port *port)
	106	{
	107	struct altera_uart *pp = container_of(port, struct altera_uart, port);
6b7d8f8b TK	108	unsigned int sigs;
6b7d8f8b TK	109
0d426eda	110	sigs = (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
6b7d8f8b TK	111	ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0;
6b7d8f8b TK	112	sigs \|= (pp->sigs & TIOCM_RTS);
6b7d8f8b TK	113
	114	return sigs;
	115	}
	116
	117	static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs)
	118	{
	119	struct altera_uart *pp = container_of(port, struct altera_uart, port);
6b7d8f8b	120
6b7d8f8b TK	121	pp->sigs = sigs;
	122	if (sigs & TIOCM_RTS)
	123	pp->imr \|= ALTERA_UART_CONTROL_RTS_MSK;
	124	else
	125	pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK;
0d426eda	126	altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
6b7d8f8b TK	127	}
	128
	129	static void altera_uart_start_tx(struct uart_port *port)
	130	{
	131	struct altera_uart *pp = container_of(port, struct altera_uart, port);
6b7d8f8b	132
6b7d8f8b	133	pp->imr \|= ALTERA_UART_CONTROL_TRDY_MSK;
0d426eda	134	altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
6b7d8f8b TK	135	}
	136
	137	static void altera_uart_stop_tx(struct uart_port *port)
	138	{
	139	struct altera_uart *pp = container_of(port, struct altera_uart, port);
6b7d8f8b	140
6b7d8f8b	141	pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
0d426eda	142	altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
6b7d8f8b TK	143	}
	144
	145	static void altera_uart_stop_rx(struct uart_port *port)
	146	{
	147	struct altera_uart *pp = container_of(port, struct altera_uart, port);
6b7d8f8b	148
6b7d8f8b	149	pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK;
0d426eda	150	altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
6b7d8f8b TK	151	}
	152
	153	static void altera_uart_break_ctl(struct uart_port *port, int break_state)
	154	{
	155	struct altera_uart *pp = container_of(port, struct altera_uart, port);
	156	unsigned long flags;
	157
	158	spin_lock_irqsave(&port->lock, flags);
	159	if (break_state == -1)
	160	pp->imr \|= ALTERA_UART_CONTROL_TRBK_MSK;
	161	else
	162	pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK;
0d426eda	163	altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
6b7d8f8b TK	164	spin_unlock_irqrestore(&port->lock, flags);
	165	}
	166
	167	static void altera_uart_enable_ms(struct uart_port *port)
	168	{
	169	}
	170
	171	static void altera_uart_set_termios(struct uart_port *port,
	172	struct ktermios *termios,
	173	struct ktermios *old)
	174	{
	175	unsigned long flags;
	176	unsigned int baud, baudclk;
	177
	178	baud = uart_get_baud_rate(port, termios, old, 0, 4000000);
	179	baudclk = port->uartclk / baud;
	180
	181	if (old)
	182	tty_termios_copy_hw(termios, old);
	183	tty_termios_encode_baud_rate(termios, baud, baud);
	184
	185	spin_lock_irqsave(&port->lock, flags);
2f8b9c15	186	uart_update_timeout(port, termios->c_cflag, baud);
0d426eda	187	altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
6b7d8f8b TK	188	spin_unlock_irqrestore(&port->lock, flags);
	189	}
	190
	191	static void altera_uart_rx_chars(struct altera_uart *pp)
	192	{
	193	struct uart_port *port = &pp->port;
	194	unsigned char ch, flag;
	195	unsigned short status;
	196
0d426eda	197	while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) &
6b7d8f8b	198	ALTERA_UART_STATUS_RRDY_MSK) {
0d426eda	199	ch = altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
6b7d8f8b TK	200	flag = TTY_NORMAL;
	201	port->icount.rx++;
	202
	203	if (status & ALTERA_UART_STATUS_E_MSK) {
0d426eda AV	204	altera_uart_writel(port, status,
0d426eda AV	205	ALTERA_UART_STATUS_REG);
6b7d8f8b TK	206
	207	if (status & ALTERA_UART_STATUS_BRK_MSK) {
	208	port->icount.brk++;
	209	if (uart_handle_break(port))
	210	continue;
	211	} else if (status & ALTERA_UART_STATUS_PE_MSK) {
	212	port->icount.parity++;
	213	} else if (status & ALTERA_UART_STATUS_ROE_MSK) {
	214	port->icount.overrun++;
	215	} else if (status & ALTERA_UART_STATUS_FE_MSK) {
	216	port->icount.frame++;
	217	}
	218
	219	status &= port->read_status_mask;
	220
	221	if (status & ALTERA_UART_STATUS_BRK_MSK)
	222	flag = TTY_BREAK;
	223	else if (status & ALTERA_UART_STATUS_PE_MSK)
	224	flag = TTY_PARITY;
	225	else if (status & ALTERA_UART_STATUS_FE_MSK)
	226	flag = TTY_FRAME;
	227	}
	228
	229	if (uart_handle_sysrq_char(port, ch))
	230	continue;
	231	uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch,
	232	flag);
	233	}
	234
	235	tty_flip_buffer_push(port->state->port.tty);
	236	}
	237
	238	static void altera_uart_tx_chars(struct altera_uart *pp)
	239	{
	240	struct uart_port *port = &pp->port;
	241	struct circ_buf *xmit = &port->state->xmit;
	242
	243	if (port->x_char) {
	244	/* Send special char - probably flow control */
0d426eda	245	altera_uart_writel(port, port->x_char, ALTERA_UART_TXDATA_REG);
6b7d8f8b TK	246	port->x_char = 0;
	247	port->icount.tx++;
	248	return;
	249	}
	250
0d426eda	251	while (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
6b7d8f8b TK	252	ALTERA_UART_STATUS_TRDY_MSK) {
	253	if (xmit->head == xmit->tail)
	254	break;
0d426eda AV	255	altera_uart_writel(port, xmit->buf[xmit->tail],
0d426eda AV	256	ALTERA_UART_TXDATA_REG);
6b7d8f8b TK	257	xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
	258	port->icount.tx++;
	259	}
	260
	261	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
	262	uart_write_wakeup(port);
	263
	264	if (xmit->head == xmit->tail) {
	265	pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
0d426eda	266	altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
6b7d8f8b TK	267	}
	268	}
	269
	270	static irqreturn_t altera_uart_interrupt(int irq, void *data)
	271	{
	272	struct uart_port *port = data;
	273	struct altera_uart *pp = container_of(port, struct altera_uart, port);
	274	unsigned int isr;
	275
0d426eda	276	isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr;
d8d721f4 TK	277
d8d721f4 TK	278	spin_lock(&port->lock);
6b7d8f8b TK	279	if (isr & ALTERA_UART_STATUS_RRDY_MSK)
	280	altera_uart_rx_chars(pp);
	281	if (isr & ALTERA_UART_STATUS_TRDY_MSK)
	282	altera_uart_tx_chars(pp);
d8d721f4 TK	283	spin_unlock(&port->lock);
d8d721f4 TK	284
6b7d8f8b TK	285	return IRQ_RETVAL(isr);
	286	}
	287
2f8b9c15 AV	288	static void altera_uart_timer(unsigned long data)
	289	{
	290	struct uart_port port = (void )data;
	291	struct altera_uart *pp = container_of(port, struct altera_uart, port);
	292
	293	altera_uart_interrupt(0, port);
	294	mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
	295	}
	296
6b7d8f8b TK	297	static void altera_uart_config_port(struct uart_port *port, int flags)
	298	{
	299	port->type = PORT_ALTERA_UART;
	300
	301	/* Clear mask, so no surprise interrupts. */
0d426eda	302	altera_uart_writel(port, 0, ALTERA_UART_CONTROL_REG);
6b7d8f8b	303	/* Clear status register */
0d426eda	304	altera_uart_writel(port, 0, ALTERA_UART_STATUS_REG);
6b7d8f8b TK	305	}
	306
	307	static int altera_uart_startup(struct uart_port *port)
	308	{
	309	struct altera_uart *pp = container_of(port, struct altera_uart, port);
	310	unsigned long flags;
	311	int ret;
	312
2f8b9c15 AV	313	if (!port->irq) {
	314	setup_timer(&pp->tmr, altera_uart_timer, (unsigned long)port);
	315	mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
	316	return 0;
	317	}
	318
6b7d8f8b TK	319	ret = request_irq(port->irq, altera_uart_interrupt, IRQF_DISABLED,
	320	DRV_NAME, port);
	321	if (ret) {
	322	pr_err(DRV_NAME ": unable to attach Altera UART %d "
	323	"interrupt vector=%d\n", port->line, port->irq);
	324	return ret;
	325	}
	326
	327	spin_lock_irqsave(&port->lock, flags);
	328
	329	/* Enable RX interrupts now */
	330	pp->imr = ALTERA_UART_CONTROL_RRDY_MSK;
	331	writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
	332
	333	spin_unlock_irqrestore(&port->lock, flags);
	334
	335	return 0;
	336	}
	337
	338	static void altera_uart_shutdown(struct uart_port *port)
	339	{
	340	struct altera_uart *pp = container_of(port, struct altera_uart, port);
	341	unsigned long flags;
	342
	343	spin_lock_irqsave(&port->lock, flags);
	344
	345	/* Disable all interrupts now */
	346	pp->imr = 0;
	347	writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
	348
	349	spin_unlock_irqrestore(&port->lock, flags);
	350
2f8b9c15 AV	351	if (port->irq)
	352	free_irq(port->irq, port);
	353	else
	354	del_timer_sync(&pp->tmr);
6b7d8f8b TK	355	}
	356
	357	static const char altera_uart_type(struct uart_port port)
	358	{
	359	return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL;
	360	}
	361
	362	static int altera_uart_request_port(struct uart_port *port)
	363	{
	364	/* UARTs always present */
	365	return 0;
	366	}
	367
	368	static void altera_uart_release_port(struct uart_port *port)
	369	{
	370	/* Nothing to release... */
	371	}
	372
	373	static int altera_uart_verify_port(struct uart_port *port,
	374	struct serial_struct *ser)
	375	{
	376	if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART))
	377	return -EINVAL;
	378	return 0;
	379	}
	380
	381	/*
	382	* Define the basic serial functions we support.
	383	*/
	384	static struct uart_ops altera_uart_ops = {
	385	.tx_empty = altera_uart_tx_empty,
	386	.get_mctrl = altera_uart_get_mctrl,
	387	.set_mctrl = altera_uart_set_mctrl,
	388	.start_tx = altera_uart_start_tx,
	389	.stop_tx = altera_uart_stop_tx,
	390	.stop_rx = altera_uart_stop_rx,
	391	.enable_ms = altera_uart_enable_ms,
	392	.break_ctl = altera_uart_break_ctl,
	393	.startup = altera_uart_startup,
	394	.shutdown = altera_uart_shutdown,
	395	.set_termios = altera_uart_set_termios,
	396	.type = altera_uart_type,
	397	.request_port = altera_uart_request_port,
	398	.release_port = altera_uart_release_port,
	399	.config_port = altera_uart_config_port,
	400	.verify_port = altera_uart_verify_port,
	401	};
	402
	403	static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS];
	404
	405	#if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE)
	406
	407	int __init early_altera_uart_setup(struct altera_uart_platform_uart *platp)
	408	{
	409	struct uart_port *port;
	410	int i;
	411
	412	for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS && platp[i].mapbase; i++) {
	413	port = &altera_uart_ports[i].port;
	414
	415	port->line = i;
	416	port->type = PORT_ALTERA_UART;
	417	port->mapbase = platp[i].mapbase;
	418	port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
419	port->iotype = SERIAL_IO_MEM;
420	port->irq = platp[i].irq;
421	port->uartclk = platp[i].uartclk;
422	port->flags = ASYNC_BOOT_AUTOCONF;
423	port->ops = &altera_uart_ops;
0d426eda	424	port->private_data = platp;
6b7d8f8b TK	425	}
	426
	427	return 0;
	428	}
	429
fadf34f0	430	static void altera_uart_console_putc(struct uart_port *port, const char c)
6b7d8f8b	431	{
0d426eda	432	while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
e8dd4757	433	ALTERA_UART_STATUS_TRDY_MSK))
fadf34f0	434	cpu_relax();
6b7d8f8b	435
6b7d8f8b	436	writel(c, port->membase + ALTERA_UART_TXDATA_REG);
6b7d8f8b TK	437	}
	438
	439	static void altera_uart_console_write(struct console co, const char s,
	440	unsigned int count)
	441	{
fadf34f0 TK	442	struct uart_port *port = &(altera_uart_ports + co->index)->port;
fadf34f0 TK	443
6b7d8f8b	444	for (; count; count--, s++) {
fadf34f0	445	altera_uart_console_putc(port, *s);
6b7d8f8b	446	if (*s == '\n')
fadf34f0	447	altera_uart_console_putc(port, '\r');
6b7d8f8b TK	448	}
	449	}
	450
	451	static int __init altera_uart_console_setup(struct console co, char options)
	452	{
	453	struct uart_port *port;
	454	int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE;
	455	int bits = 8;
	456	int parity = 'n';
	457	int flow = 'n';
	458
	459	if (co->index < 0 \|\| co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
	460	return -EINVAL;
	461	port = &altera_uart_ports[co->index].port;
	462	if (port->membase == 0)
	463	return -ENODEV;
	464
	465	if (options)
	466	uart_parse_options(options, &baud, &parity, &bits, &flow);
	467
	468	return uart_set_options(port, co, baud, parity, bits, flow);
	469	}
	470
	471	static struct uart_driver altera_uart_driver;
	472
	473	static struct console altera_uart_console = {
	474	.name = "ttyS",
	475	.write = altera_uart_console_write,
	476	.device = uart_console_device,
	477	.setup = altera_uart_console_setup,
	478	.flags = CON_PRINTBUFFER,
	479	.index = -1,
	480	.data = &altera_uart_driver,
	481	};
	482
	483	static int __init altera_uart_console_init(void)
	484	{
	485	register_console(&altera_uart_console);
	486	return 0;
	487	}
	488
	489	console_initcall(altera_uart_console_init);
	490
	491	#define ALTERA_UART_CONSOLE (&altera_uart_console)
	492
	493	#else
	494
	495	#define ALTERA_UART_CONSOLE NULL
	496
	497	#endif /* CONFIG_ALTERA_UART_CONSOLE */
	498
	499	/*
	500	* Define the altera_uart UART driver structure.
	501	*/
	502	static struct uart_driver altera_uart_driver = {
	503	.owner = THIS_MODULE,
	504	.driver_name = DRV_NAME,
	505	.dev_name = "ttyS",
	506	.major = TTY_MAJOR,
	507	.minor = 64,
	508	.nr = CONFIG_SERIAL_ALTERA_UART_MAXPORTS,
	509	.cons = ALTERA_UART_CONSOLE,
	510	};
	511
512	static int __devinit altera_uart_probe(struct platform_device *pdev)
513	{
514	struct altera_uart_platform_uart *platp = pdev->dev.platform_data;
515	struct uart_port *port;
6b5756f1 AV	516	struct resource *res_mem;
	517	struct resource *res_irq;
	518	int i = pdev->id;
6b7d8f8b	519
6b5756f1 AV	520	/* -1 emphasizes that the platform must have one port, no .N suffix */
	521	if (i == -1)
	522	i = 0;
6b7d8f8b	523
6b5756f1 AV	524	if (i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
6b5756f1 AV	525	return -EINVAL;
6b7d8f8b	526
6b5756f1 AV	527	port = &altera_uart_ports[i].port;
	528
	529	res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	530	if (res_mem)
	531	port->mapbase = res_mem->start;
	532	else if (platp->mapbase)
	533	port->mapbase = platp->mapbase;
	534	else
	535	return -EINVAL;
	536
	537	res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
	538	if (res_irq)
	539	port->irq = res_irq->start;
	540	else if (platp->irq)
	541	port->irq = platp->irq;
	542
	543	port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
	544	if (!port->membase)
	545	return -ENOMEM;
	546
	547	port->line = i;
	548	port->type = PORT_ALTERA_UART;
	549	port->iotype = SERIAL_IO_MEM;
	550	port->uartclk = platp->uartclk;
	551	port->ops = &altera_uart_ops;
	552	port->flags = ASYNC_BOOT_AUTOCONF;
0d426eda	553	port->private_data = platp;
6b5756f1 AV	554
6b5756f1 AV	555	uart_add_one_port(&altera_uart_driver, port);
6b7d8f8b TK	556
	557	return 0;
	558	}
	559
c1bfffa9	560	static int __devexit altera_uart_remove(struct platform_device *pdev)
6b7d8f8b	561	{
6b5756f1	562	struct uart_port *port = &altera_uart_ports[pdev->id].port;
6b7d8f8b	563
6b5756f1	564	uart_remove_one_port(&altera_uart_driver, port);
6b7d8f8b TK	565	return 0;
	566	}
	567
	568	static struct platform_driver altera_uart_platform_driver = {
	569	.probe = altera_uart_probe,
	570	.remove = __devexit_p(altera_uart_remove),
	571	.driver = {
	572	.name = DRV_NAME,
	573	.owner = THIS_MODULE,
	574	.pm = NULL,
	575	},
	576	};
	577
	578	static int __init altera_uart_init(void)
	579	{
	580	int rc;
	581
	582	rc = uart_register_driver(&altera_uart_driver);
	583	if (rc)
	584	return rc;
	585	rc = platform_driver_register(&altera_uart_platform_driver);
	586	if (rc) {
	587	uart_unregister_driver(&altera_uart_driver);
	588	return rc;
	589	}
	590	return 0;
	591	}
	592
	593	static void __exit altera_uart_exit(void)
	594	{
	595	platform_driver_unregister(&altera_uart_platform_driver);
	596	uart_unregister_driver(&altera_uart_driver);
	597	}
	598
	599	module_init(altera_uart_init);
	600	module_exit(altera_uart_exit);
	601
	602	MODULE_DESCRIPTION("Altera UART driver");
	603	MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
	604	MODULE_LICENSE("GPL");
	605	MODULE_ALIAS("platform:" DRV_NAME);