[linux-2.6-block.git] / drivers / serial / 21285.c

/*
 * linux/drivers/serial/21285.c
 *
 * Driver for the serial port on the 21285 StrongArm-110 core logic chip.
 *
 * Based on drivers/char/serial.c
 */
#include <linux/module.h>
#include <linux/tty.h>
#include <linux/ioport.h>
#include <linux/init.h>
#include <linux/console.h>
#include <linux/device.h>
#include <linux/tty_flip.h>
#include <linux/serial_core.h>
#include <linux/serial.h>
#include <linux/io.h>

#include <asm/irq.h>
#include <asm/mach-types.h>
#include <asm/hardware/dec21285.h>
#include <mach/hardware.h>

#define BAUD_BASE		(mem_fclk_21285/64)

#define SERIAL_21285_NAME	"ttyFB"
#define SERIAL_21285_MAJOR	204
#define SERIAL_21285_MINOR	4

#define RXSTAT_DUMMY_READ	0x80000000
#define RXSTAT_FRAME		(1 << 0)
#define RXSTAT_PARITY		(1 << 1)
#define RXSTAT_OVERRUN		(1 << 2)
#define RXSTAT_ANYERR		(RXSTAT_FRAME|RXSTAT_PARITY|RXSTAT_OVERRUN)

#define H_UBRLCR_BREAK		(1 << 0)
#define H_UBRLCR_PARENB		(1 << 1)
#define H_UBRLCR_PAREVN		(1 << 2)
#define H_UBRLCR_STOPB		(1 << 3)
#define H_UBRLCR_FIFO		(1 << 4)

static const char serial21285_name[] = "Footbridge UART";

#define tx_enabled(port)	((port)->unused[0])
#define rx_enabled(port)	((port)->unused[1])

/*
 * The documented expression for selecting the divisor is:
 *  BAUD_BASE / baud - 1
 * However, typically BAUD_BASE is not divisible by baud, so
 * we want to select the divisor that gives us the minimum
 * error.  Therefore, we want:
 *  int(BAUD_BASE / baud - 0.5) ->
 *  int(BAUD_BASE / baud - (baud >> 1) / baud) ->
 *  int((BAUD_BASE - (baud >> 1)) / baud)
 */

static void serial21285_stop_tx(struct uart_port *port)
{
	if (tx_enabled(port)) {
		disable_irq_nosync(IRQ_CONTX);
		tx_enabled(port) = 0;
	}
}

static void serial21285_start_tx(struct uart_port *port)
{
	if (!tx_enabled(port)) {
		enable_irq(IRQ_CONTX);
		tx_enabled(port) = 1;
	}
}

static void serial21285_stop_rx(struct uart_port *port)
{
	if (rx_enabled(port)) {
		disable_irq_nosync(IRQ_CONRX);
		rx_enabled(port) = 0;
	}
}

static void serial21285_enable_ms(struct uart_port *port)
{
}

static irqreturn_t serial21285_rx_chars(int irq, void *dev_id)
{
	struct uart_port *port = dev_id;
	struct tty_struct *tty = port->state->port.tty;
	unsigned int status, ch, flag, rxs, max_count = 256;

	status = *CSR_UARTFLG;
	while (!(status & 0x10) && max_count--) {
		ch = *CSR_UARTDR;
		flag = TTY_NORMAL;
		port->icount.rx++;

		rxs = *CSR_RXSTAT | RXSTAT_DUMMY_READ;
		if (unlikely(rxs & RXSTAT_ANYERR)) {
			if (rxs & RXSTAT_PARITY)
				port->icount.parity++;
			else if (rxs & RXSTAT_FRAME)
				port->icount.frame++;
			if (rxs & RXSTAT_OVERRUN)
				port->icount.overrun++;

			rxs &= port->read_status_mask;

			if (rxs & RXSTAT_PARITY)
				flag = TTY_PARITY;
			else if (rxs & RXSTAT_FRAME)
				flag = TTY_FRAME;
		}

		uart_insert_char(port, rxs, RXSTAT_OVERRUN, ch, flag);

		status = *CSR_UARTFLG;
	}
	tty_flip_buffer_push(tty);

	return IRQ_HANDLED;
}

static irqreturn_t serial21285_tx_chars(int irq, void *dev_id)
{
	struct uart_port *port = dev_id;
	struct circ_buf *xmit = &port->state->xmit;
	int count = 256;

	if (port->x_char) {
		*CSR_UARTDR = port->x_char;
		port->icount.tx++;
		port->x_char = 0;
		goto out;
	}
	if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
		serial21285_stop_tx(port);
		goto out;
	}

	do {
		*CSR_UARTDR = xmit->buf[xmit->tail];
		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
		port->icount.tx++;
		if (uart_circ_empty(xmit))
			break;
	} while (--count > 0 && !(*CSR_UARTFLG & 0x20));

	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
		uart_write_wakeup(port);

	if (uart_circ_empty(xmit))
		serial21285_stop_tx(port);

 out:
	return IRQ_HANDLED;
}

static unsigned int serial21285_tx_empty(struct uart_port *port)
{
	return (*CSR_UARTFLG & 8) ? 0 : TIOCSER_TEMT;
}

/* no modem control lines */
static unsigned int serial21285_get_mctrl(struct uart_port *port)
{
	return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
}

static void serial21285_set_mctrl(struct uart_port *port, unsigned int mctrl)
{
}

static void serial21285_break_ctl(struct uart_port *port, int break_state)
{
	unsigned long flags;
	unsigned int h_lcr;

	spin_lock_irqsave(&port->lock, flags);
	h_lcr = *CSR_H_UBRLCR;
	if (break_state)
		h_lcr |= H_UBRLCR_BREAK;
	else
		h_lcr &= ~H_UBRLCR_BREAK;
	*CSR_H_UBRLCR = h_lcr;
	spin_unlock_irqrestore(&port->lock, flags);
}

static int serial21285_startup(struct uart_port *port)
{
	int ret;

	tx_enabled(port) = 1;
	rx_enabled(port) = 1;

	ret = request_irq(IRQ_CONRX, serial21285_rx_chars, 0,
			  serial21285_name, port);
	if (ret == 0) {
		ret = request_irq(IRQ_CONTX, serial21285_tx_chars, 0,
				  serial21285_name, port);
		if (ret)
			free_irq(IRQ_CONRX, port);
	}

	return ret;
}

static void serial21285_shutdown(struct uart_port *port)
{
	free_irq(IRQ_CONTX, port);
	free_irq(IRQ_CONRX, port);
}

static void
serial21285_set_termios(struct uart_port *port, struct ktermios *termios,
			struct ktermios *old)
{
	unsigned long flags;
	unsigned int baud, quot, h_lcr;

	/*
	 * We don't support modem control lines.
	 */
	termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR);
	termios->c_cflag |= CLOCAL;

	/*
	 * We don't support BREAK character recognition.
	 */
	termios->c_iflag &= ~(IGNBRK | BRKINT);

	/*
	 * Ask the core to calculate the divisor for us.
	 */
	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 
	quot = uart_get_divisor(port, baud);

	if (port->state && port->state->port.tty) {
		struct tty_struct *tty = port->state->port.tty;
		unsigned int b = port->uartclk / (16 * quot);
		tty_encode_baud_rate(tty, b, b);
	}

	switch (termios->c_cflag & CSIZE) {
	case CS5:
		h_lcr = 0x00;
		break;
	case CS6:
		h_lcr = 0x20;
		break;
	case CS7:
		h_lcr = 0x40;
		break;
	default: /* CS8 */
		h_lcr = 0x60;
		break;
	}

	if (termios->c_cflag & CSTOPB)
		h_lcr |= H_UBRLCR_STOPB;
	if (termios->c_cflag & PARENB) {
		h_lcr |= H_UBRLCR_PARENB;
		if (!(termios->c_cflag & PARODD))
			h_lcr |= H_UBRLCR_PAREVN;
	}

	if (port->fifosize)
		h_lcr |= H_UBRLCR_FIFO;

	spin_lock_irqsave(&port->lock, flags);

	/*
	 * Update the per-port timeout.
	 */
	uart_update_timeout(port, termios->c_cflag, baud);

	/*
	 * Which character status flags are we interested in?
	 */
	port->read_status_mask = RXSTAT_OVERRUN;
	if (termios->c_iflag & INPCK)
		port->read_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY;

	/*
	 * Which character status flags should we ignore?
	 */
	port->ignore_status_mask = 0;
	if (termios->c_iflag & IGNPAR)
		port->ignore_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY;
	if (termios->c_iflag & IGNBRK && termios->c_iflag & IGNPAR)
		port->ignore_status_mask |= RXSTAT_OVERRUN;

	/*
	 * Ignore all characters if CREAD is not set.
	 */
	if ((termios->c_cflag & CREAD) == 0)
		port->ignore_status_mask |= RXSTAT_DUMMY_READ;

	quot -= 1;

	*CSR_UARTCON = 0;
	*CSR_L_UBRLCR = quot & 0xff;
	*CSR_M_UBRLCR = (quot >> 8) & 0x0f;
	*CSR_H_UBRLCR = h_lcr;
	*CSR_UARTCON = 1;

	spin_unlock_irqrestore(&port->lock, flags);
}

static const char *serial21285_type(struct uart_port *port)
{
	return port->type == PORT_21285 ? "DC21285" : NULL;
}

static void serial21285_release_port(struct uart_port *port)
{
	release_mem_region(port->mapbase, 32);
}

static int serial21285_request_port(struct uart_port *port)
{
	return request_mem_region(port->mapbase, 32, serial21285_name)
			 != NULL ? 0 : -EBUSY;
}

static void serial21285_config_port(struct uart_port *port, int flags)
{
	if (flags & UART_CONFIG_TYPE && serial21285_request_port(port) == 0)
		port->type = PORT_21285;
}

/*
 * verify the new serial_struct (for TIOCSSERIAL).
 */
static int serial21285_verify_port(struct uart_port *port, struct serial_struct *ser)
{
	int ret = 0;
	if (ser->type != PORT_UNKNOWN && ser->type != PORT_21285)
		ret = -EINVAL;
	if (ser->irq != NO_IRQ)
		ret = -EINVAL;
	if (ser->baud_base != port->uartclk / 16)
		ret = -EINVAL;
	return ret;
}

static struct uart_ops serial21285_ops = {
	.tx_empty	= serial21285_tx_empty,
	.get_mctrl	= serial21285_get_mctrl,
	.set_mctrl	= serial21285_set_mctrl,
	.stop_tx	= serial21285_stop_tx,
	.start_tx	= serial21285_start_tx,
	.stop_rx	= serial21285_stop_rx,
	.enable_ms	= serial21285_enable_ms,
	.break_ctl	= serial21285_break_ctl,
	.startup	= serial21285_startup,
	.shutdown	= serial21285_shutdown,
	.set_termios	= serial21285_set_termios,
	.type		= serial21285_type,
	.release_port	= serial21285_release_port,
	.request_port	= serial21285_request_port,
	.config_port	= serial21285_config_port,
	.verify_port	= serial21285_verify_port,
};

static struct uart_port serial21285_port = {
	.mapbase	= 0x42000160,
	.iotype		= UPIO_MEM,
	.irq		= NO_IRQ,
	.fifosize	= 16,
	.ops		= &serial21285_ops,
	.flags		= UPF_BOOT_AUTOCONF,
};

static void serial21285_setup_ports(void)
{
	serial21285_port.uartclk = mem_fclk_21285 / 4;
}

#ifdef CONFIG_SERIAL_21285_CONSOLE
static void serial21285_console_putchar(struct uart_port *port, int ch)
{
	while (*CSR_UARTFLG & 0x20)
		barrier();
	*CSR_UARTDR = ch;
}

static void
serial21285_console_write(struct console *co, const char *s,
			  unsigned int count)
{
	uart_console_write(&serial21285_port, s, count, serial21285_console_putchar);
}

static void __init
serial21285_get_options(struct uart_port *port, int *baud,
			int *parity, int *bits)
{
	if (*CSR_UARTCON == 1) {
		unsigned int tmp;

		tmp = *CSR_H_UBRLCR;
		switch (tmp & 0x60) {
		case 0x00:
			*bits = 5;
			break;
		case 0x20:
			*bits = 6;
			break;
		case 0x40:
			*bits = 7;
			break;
		default:
		case 0x60:
			*bits = 8;
			break;
		}

		if (tmp & H_UBRLCR_PARENB) {
			*parity = 'o';
			if (tmp & H_UBRLCR_PAREVN)
				*parity = 'e';
		}

		tmp = *CSR_L_UBRLCR | (*CSR_M_UBRLCR << 8);

		*baud = port->uartclk / (16 * (tmp + 1));
	}
}

static int __init serial21285_console_setup(struct console *co, char *options)
{
	struct uart_port *port = &serial21285_port;
	int baud = 9600;
	int bits = 8;
	int parity = 'n';
	int flow = 'n';

	if (machine_is_personal_server())
		baud = 57600;

	/*
	 * Check whether an invalid uart number has been specified, and
	 * if so, search for the first available port that does have
	 * console support.
	 */
	if (options)
		uart_parse_options(options, &baud, &parity, &bits, &flow);
	else
		serial21285_get_options(port, &baud, &parity, &bits);

	return uart_set_options(port, co, baud, parity, bits, flow);
}

static struct uart_driver serial21285_reg;

static struct console serial21285_console =
{
	.name		= SERIAL_21285_NAME,
	.write		= serial21285_console_write,
	.device		= uart_console_device,
	.setup		= serial21285_console_setup,
	.flags		= CON_PRINTBUFFER,
	.index		= -1,
	.data		= &serial21285_reg,
};

static int __init rs285_console_init(void)
{
	serial21285_setup_ports();
	register_console(&serial21285_console);
	return 0;
}
console_initcall(rs285_console_init);

#define SERIAL_21285_CONSOLE	&serial21285_console
#else
#define SERIAL_21285_CONSOLE	NULL
#endif

static struct uart_driver serial21285_reg = {
	.owner			= THIS_MODULE,
	.driver_name		= "ttyFB",
	.dev_name		= "ttyFB",
	.major			= SERIAL_21285_MAJOR,
	.minor			= SERIAL_21285_MINOR,
	.nr			= 1,
	.cons			= SERIAL_21285_CONSOLE,
};

static int __init serial21285_init(void)
{
	int ret;

	printk(KERN_INFO "Serial: 21285 driver\n");

	serial21285_setup_ports();

	ret = uart_register_driver(&serial21285_reg);
	if (ret == 0)
		uart_add_one_port(&serial21285_reg, &serial21285_port);

	return ret;
}

static void __exit serial21285_exit(void)
{
	uart_remove_one_port(&serial21285_reg, &serial21285_port);
	uart_unregister_driver(&serial21285_reg);
}

module_init(serial21285_init);
module_exit(serial21285_exit);

MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Intel Footbridge (21285) serial driver");
MODULE_ALIAS_CHARDEV(SERIAL_21285_MAJOR, SERIAL_21285_MINOR);
Commit	Line	Data
1da177e4	1	/*
f30c2269	2	* linux/drivers/serial/21285.c
1da177e4 LT	3	*
	4	* Driver for the serial port on the 21285 StrongArm-110 core logic chip.
	5	*
	6	* Based on drivers/char/serial.c
1da177e4	7	*/
1da177e4 LT	8	#include <linux/module.h>
	9	#include <linux/tty.h>
	10	#include <linux/ioport.h>
	11	#include <linux/init.h>
	12	#include <linux/console.h>
	13	#include <linux/device.h>
	14	#include <linux/tty_flip.h>
	15	#include <linux/serial_core.h>
	16	#include <linux/serial.h>
99730225	17	#include <linux/io.h>
1da177e4	18
1da177e4 LT	19	#include <asm/irq.h>
	20	#include <asm/mach-types.h>
	21	#include <asm/hardware/dec21285.h>
a09e64fb	22	#include <mach/hardware.h>
1da177e4 LT	23
	24	#define BAUD_BASE (mem_fclk_21285/64)
	25
	26	#define SERIAL_21285_NAME "ttyFB"
	27	#define SERIAL_21285_MAJOR 204
	28	#define SERIAL_21285_MINOR 4
	29
	30	#define RXSTAT_DUMMY_READ 0x80000000
	31	#define RXSTAT_FRAME (1 << 0)
	32	#define RXSTAT_PARITY (1 << 1)
	33	#define RXSTAT_OVERRUN (1 << 2)
	34	#define RXSTAT_ANYERR (RXSTAT_FRAME\|RXSTAT_PARITY\|RXSTAT_OVERRUN)
	35
	36	#define H_UBRLCR_BREAK (1 << 0)
	37	#define H_UBRLCR_PARENB (1 << 1)
	38	#define H_UBRLCR_PAREVN (1 << 2)
	39	#define H_UBRLCR_STOPB (1 << 3)
	40	#define H_UBRLCR_FIFO (1 << 4)
	41
	42	static const char serial21285_name[] = "Footbridge UART";
	43
	44	#define tx_enabled(port) ((port)->unused[0])
	45	#define rx_enabled(port) ((port)->unused[1])
	46
	47	/*
	48	* The documented expression for selecting the divisor is:
	49	* BAUD_BASE / baud - 1
	50	* However, typically BAUD_BASE is not divisible by baud, so
	51	* we want to select the divisor that gives us the minimum
	52	* error. Therefore, we want:
	53	* int(BAUD_BASE / baud - 0.5) ->
	54	* int(BAUD_BASE / baud - (baud >> 1) / baud) ->
	55	* int((BAUD_BASE - (baud >> 1)) / baud)
	56	*/
	57
b129a8cc	58	static void serial21285_stop_tx(struct uart_port *port)
1da177e4 LT	59	{
1da177e4 LT	60	if (tx_enabled(port)) {
cc20b900	61	disable_irq_nosync(IRQ_CONTX);
1da177e4 LT	62	tx_enabled(port) = 0;
	63	}
	64	}
	65
b129a8cc	66	static void serial21285_start_tx(struct uart_port *port)
1da177e4 LT	67	{
	68	if (!tx_enabled(port)) {
	69	enable_irq(IRQ_CONTX);
	70	tx_enabled(port) = 1;
	71	}
	72	}
	73
	74	static void serial21285_stop_rx(struct uart_port *port)
	75	{
	76	if (rx_enabled(port)) {
cc20b900	77	disable_irq_nosync(IRQ_CONRX);
1da177e4 LT	78	rx_enabled(port) = 0;
	79	}
	80	}
	81
	82	static void serial21285_enable_ms(struct uart_port *port)
	83	{
	84	}
	85
7d12e780	86	static irqreturn_t serial21285_rx_chars(int irq, void *dev_id)
1da177e4 LT	87	{
1da177e4 LT	88	struct uart_port *port = dev_id;
ebd2c8f6	89	struct tty_struct *tty = port->state->port.tty;
1da177e4 LT	90	unsigned int status, ch, flag, rxs, max_count = 256;
	91
	92	status = *CSR_UARTFLG;
	93	while (!(status & 0x10) && max_count--) {
1da177e4 LT	94	ch = *CSR_UARTDR;
	95	flag = TTY_NORMAL;
	96	port->icount.rx++;
	97
	98	rxs = *CSR_RXSTAT \| RXSTAT_DUMMY_READ;
45849282	99	if (unlikely(rxs & RXSTAT_ANYERR)) {
1da177e4 LT	100	if (rxs & RXSTAT_PARITY)
	101	port->icount.parity++;
	102	else if (rxs & RXSTAT_FRAME)
	103	port->icount.frame++;
	104	if (rxs & RXSTAT_OVERRUN)
	105	port->icount.overrun++;
	106
	107	rxs &= port->read_status_mask;
	108
	109	if (rxs & RXSTAT_PARITY)
	110	flag = TTY_PARITY;
	111	else if (rxs & RXSTAT_FRAME)
	112	flag = TTY_FRAME;
	113	}
	114
05ab3014 RK	115	uart_insert_char(port, rxs, RXSTAT_OVERRUN, ch, flag);
05ab3014 RK	116
1da177e4 LT	117	status = *CSR_UARTFLG;
	118	}
	119	tty_flip_buffer_push(tty);
	120
	121	return IRQ_HANDLED;
	122	}
	123
7d12e780	124	static irqreturn_t serial21285_tx_chars(int irq, void *dev_id)
1da177e4 LT	125	{
1da177e4 LT	126	struct uart_port *port = dev_id;
ebd2c8f6	127	struct circ_buf *xmit = &port->state->xmit;
1da177e4 LT	128	int count = 256;
	129
	130	if (port->x_char) {
	131	*CSR_UARTDR = port->x_char;
	132	port->icount.tx++;
	133	port->x_char = 0;
	134	goto out;
	135	}
	136	if (uart_circ_empty(xmit) \|\| uart_tx_stopped(port)) {
b129a8cc	137	serial21285_stop_tx(port);
1da177e4 LT	138	goto out;
	139	}
	140
	141	do {
	142	*CSR_UARTDR = xmit->buf[xmit->tail];
	143	xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
	144	port->icount.tx++;
	145	if (uart_circ_empty(xmit))
	146	break;
	147	} while (--count > 0 && !(*CSR_UARTFLG & 0x20));
	148
	149	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
	150	uart_write_wakeup(port);
	151
	152	if (uart_circ_empty(xmit))
b129a8cc	153	serial21285_stop_tx(port);
1da177e4 LT	154
	155	out:
	156	return IRQ_HANDLED;
	157	}
	158
	159	static unsigned int serial21285_tx_empty(struct uart_port *port)
	160	{
	161	return (*CSR_UARTFLG & 8) ? 0 : TIOCSER_TEMT;
	162	}
	163
	164	/* no modem control lines */
	165	static unsigned int serial21285_get_mctrl(struct uart_port *port)
	166	{
	167	return TIOCM_CAR \| TIOCM_DSR \| TIOCM_CTS;
	168	}
	169
	170	static void serial21285_set_mctrl(struct uart_port *port, unsigned int mctrl)
	171	{
	172	}
	173
	174	static void serial21285_break_ctl(struct uart_port *port, int break_state)
	175	{
	176	unsigned long flags;
	177	unsigned int h_lcr;
	178
	179	spin_lock_irqsave(&port->lock, flags);
	180	h_lcr = *CSR_H_UBRLCR;
	181	if (break_state)
	182	h_lcr \|= H_UBRLCR_BREAK;
	183	else
	184	h_lcr &= ~H_UBRLCR_BREAK;
	185	*CSR_H_UBRLCR = h_lcr;
	186	spin_unlock_irqrestore(&port->lock, flags);
	187	}
	188
	189	static int serial21285_startup(struct uart_port *port)
	190	{
	191	int ret;
	192
	193	tx_enabled(port) = 1;
	194	rx_enabled(port) = 1;
	195
	196	ret = request_irq(IRQ_CONRX, serial21285_rx_chars, 0,
	197	serial21285_name, port);
	198	if (ret == 0) {
	199	ret = request_irq(IRQ_CONTX, serial21285_tx_chars, 0,
	200	serial21285_name, port);
	201	if (ret)
	202	free_irq(IRQ_CONRX, port);
	203	}
	204
	205	return ret;
	206	}
	207
	208	static void serial21285_shutdown(struct uart_port *port)
	209	{
	210	free_irq(IRQ_CONTX, port);
	211	free_irq(IRQ_CONRX, port);
	212	}
	213
	214	static void
606d099c AC	215	serial21285_set_termios(struct uart_port port, struct ktermios termios,
606d099c AC	216	struct ktermios *old)
1da177e4 LT	217	{
	218	unsigned long flags;
	219	unsigned int baud, quot, h_lcr;
	220
	221	/*
	222	* We don't support modem control lines.
	223	*/
	224	termios->c_cflag &= ~(HUPCL \| CRTSCTS \| CMSPAR);
	225	termios->c_cflag \|= CLOCAL;
	226
	227	/*
	228	* We don't support BREAK character recognition.
	229	*/
	230	termios->c_iflag &= ~(IGNBRK \| BRKINT);
	231
	232	/*
	233	* Ask the core to calculate the divisor for us.
	234	*/
	235	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
	236	quot = uart_get_divisor(port, baud);
	237
ebd2c8f6 AC	238	if (port->state && port->state->port.tty) {
ebd2c8f6 AC	239	struct tty_struct *tty = port->state->port.tty;
2f65baff RK	240	unsigned int b = port->uartclk / (16 * quot);
	241	tty_encode_baud_rate(tty, b, b);
	242	}
	243
1da177e4 LT	244	switch (termios->c_cflag & CSIZE) {
	245	case CS5:
	246	h_lcr = 0x00;
	247	break;
	248	case CS6:
	249	h_lcr = 0x20;
	250	break;
	251	case CS7:
	252	h_lcr = 0x40;
	253	break;
	254	default: /* CS8 */
	255	h_lcr = 0x60;
	256	break;
	257	}
	258
	259	if (termios->c_cflag & CSTOPB)
	260	h_lcr \|= H_UBRLCR_STOPB;
	261	if (termios->c_cflag & PARENB) {
	262	h_lcr \|= H_UBRLCR_PARENB;
	263	if (!(termios->c_cflag & PARODD))
	264	h_lcr \|= H_UBRLCR_PAREVN;
	265	}
	266
	267	if (port->fifosize)
	268	h_lcr \|= H_UBRLCR_FIFO;
	269
	270	spin_lock_irqsave(&port->lock, flags);
	271
	272	/*
	273	* Update the per-port timeout.
	274	*/
	275	uart_update_timeout(port, termios->c_cflag, baud);
	276
	277	/*
	278	* Which character status flags are we interested in?
	279	*/
	280	port->read_status_mask = RXSTAT_OVERRUN;
	281	if (termios->c_iflag & INPCK)
	282	port->read_status_mask \|= RXSTAT_FRAME \| RXSTAT_PARITY;
	283
	284	/*
	285	* Which character status flags should we ignore?
	286	*/
	287	port->ignore_status_mask = 0;
	288	if (termios->c_iflag & IGNPAR)
	289	port->ignore_status_mask \|= RXSTAT_FRAME \| RXSTAT_PARITY;
	290	if (termios->c_iflag & IGNBRK && termios->c_iflag & IGNPAR)
	291	port->ignore_status_mask \|= RXSTAT_OVERRUN;
	292
	293	/*
	294	* Ignore all characters if CREAD is not set.
	295	*/
	296	if ((termios->c_cflag & CREAD) == 0)
	297	port->ignore_status_mask \|= RXSTAT_DUMMY_READ;
	298
	299	quot -= 1;
	300
	301	*CSR_UARTCON = 0;
	302	*CSR_L_UBRLCR = quot & 0xff;
	303	*CSR_M_UBRLCR = (quot >> 8) & 0x0f;
	304	*CSR_H_UBRLCR = h_lcr;
	305	*CSR_UARTCON = 1;
	306
	307	spin_unlock_irqrestore(&port->lock, flags);
308	}
309
310	static const char serial21285_type(struct uart_port port)
311	{
312	return port->type == PORT_21285 ? "DC21285" : NULL;
313	}
314
315	static void serial21285_release_port(struct uart_port *port)
316	{
317	release_mem_region(port->mapbase, 32);
318	}
319
320	static int serial21285_request_port(struct uart_port *port)
321	{
322	return request_mem_region(port->mapbase, 32, serial21285_name)
323	!= NULL ? 0 : -EBUSY;
324	}
325
326	static void serial21285_config_port(struct uart_port *port, int flags)
327	{
328	if (flags & UART_CONFIG_TYPE && serial21285_request_port(port) == 0)
329	port->type = PORT_21285;
330	}
331
332	/*
333	* verify the new serial_struct (for TIOCSSERIAL).
334	*/
335	static int serial21285_verify_port(struct uart_port port, struct serial_struct ser)
336	{
337	int ret = 0;
338	if (ser->type != PORT_UNKNOWN && ser->type != PORT_21285)
339	ret = -EINVAL;
340	if (ser->irq != NO_IRQ)
341	ret = -EINVAL;
342	if (ser->baud_base != port->uartclk / 16)
343	ret = -EINVAL;
344	return ret;
345	}
346
347	static struct uart_ops serial21285_ops = {
348	.tx_empty = serial21285_tx_empty,
349	.get_mctrl = serial21285_get_mctrl,
350	.set_mctrl = serial21285_set_mctrl,
351	.stop_tx = serial21285_stop_tx,
352	.start_tx = serial21285_start_tx,
353	.stop_rx = serial21285_stop_rx,
354	.enable_ms = serial21285_enable_ms,
355	.break_ctl = serial21285_break_ctl,
356	.startup = serial21285_startup,
357	.shutdown = serial21285_shutdown,
358	.set_termios = serial21285_set_termios,
359	.type = serial21285_type,
360	.release_port = serial21285_release_port,
361	.request_port = serial21285_request_port,
362	.config_port = serial21285_config_port,
363	.verify_port = serial21285_verify_port,
364	};
365
366	static struct uart_port serial21285_port = {
367	.mapbase = 0x42000160,
9b4a1617	368	.iotype = UPIO_MEM,
1da177e4 LT	369	.irq = NO_IRQ,
	370	.fifosize = 16,
	371	.ops = &serial21285_ops,
ce8337cb	372	.flags = UPF_BOOT_AUTOCONF,
1da177e4 LT	373	};
	374
	375	static void serial21285_setup_ports(void)
	376	{
	377	serial21285_port.uartclk = mem_fclk_21285 / 4;
	378	}
	379
	380	#ifdef CONFIG_SERIAL_21285_CONSOLE
d358788f RK	381	static void serial21285_console_putchar(struct uart_port *port, int ch)
	382	{
	383	while (*CSR_UARTFLG & 0x20)
	384	barrier();
	385	*CSR_UARTDR = ch;
	386	}
1da177e4 LT	387
	388	static void
	389	serial21285_console_write(struct console co, const char s,
	390	unsigned int count)
	391	{
d358788f	392	uart_console_write(&serial21285_port, s, count, serial21285_console_putchar);
1da177e4 LT	393	}
	394
	395	static void __init
	396	serial21285_get_options(struct uart_port port, int baud,
	397	int parity, int bits)
	398	{
	399	if (*CSR_UARTCON == 1) {
	400	unsigned int tmp;
	401
	402	tmp = *CSR_H_UBRLCR;
	403	switch (tmp & 0x60) {
	404	case 0x00:
	405	*bits = 5;
	406	break;
	407	case 0x20:
	408	*bits = 6;
	409	break;
	410	case 0x40:
	411	*bits = 7;
	412	break;
	413	default:
	414	case 0x60:
	415	*bits = 8;
	416	break;
	417	}
	418
	419	if (tmp & H_UBRLCR_PARENB) {
	420	*parity = 'o';
	421	if (tmp & H_UBRLCR_PAREVN)
	422	*parity = 'e';
	423	}
	424
	425	tmp = CSR_L_UBRLCR \| (CSR_M_UBRLCR << 8);
	426
	427	baud = port->uartclk / (16 (tmp + 1));
	428	}
	429	}
	430
	431	static int __init serial21285_console_setup(struct console co, char options)
	432	{
	433	struct uart_port *port = &serial21285_port;
	434	int baud = 9600;
	435	int bits = 8;
	436	int parity = 'n';
	437	int flow = 'n';
	438
	439	if (machine_is_personal_server())
	440	baud = 57600;
	441
	442	/*
	443	* Check whether an invalid uart number has been specified, and
	444	* if so, search for the first available port that does have
	445	* console support.
	446	*/
	447	if (options)
	448	uart_parse_options(options, &baud, &parity, &bits, &flow);
	449	else
	450	serial21285_get_options(port, &baud, &parity, &bits);
	451
	452	return uart_set_options(port, co, baud, parity, bits, flow);
	453	}
	454
2d93486c	455	static struct uart_driver serial21285_reg;
1da177e4 LT	456
	457	static struct console serial21285_console =
	458	{
	459	.name = SERIAL_21285_NAME,
	460	.write = serial21285_console_write,
	461	.device = uart_console_device,
	462	.setup = serial21285_console_setup,
	463	.flags = CON_PRINTBUFFER,
	464	.index = -1,
	465	.data = &serial21285_reg,
	466	};
	467
	468	static int __init rs285_console_init(void)
	469	{
	470	serial21285_setup_ports();
	471	register_console(&serial21285_console);
	472	return 0;
	473	}
	474	console_initcall(rs285_console_init);
	475
	476	#define SERIAL_21285_CONSOLE &serial21285_console
	477	#else
	478	#define SERIAL_21285_CONSOLE NULL
	479	#endif
	480
	481	static struct uart_driver serial21285_reg = {
	482	.owner = THIS_MODULE,
	483	.driver_name = "ttyFB",
	484	.dev_name = "ttyFB",
1da177e4 LT	485	.major = SERIAL_21285_MAJOR,
	486	.minor = SERIAL_21285_MINOR,
	487	.nr = 1,
	488	.cons = SERIAL_21285_CONSOLE,
	489	};
	490
	491	static int __init serial21285_init(void)
	492	{
	493	int ret;
	494
d87a6d95	495	printk(KERN_INFO "Serial: 21285 driver\n");
1da177e4 LT	496
	497	serial21285_setup_ports();
	498
	499	ret = uart_register_driver(&serial21285_reg);
	500	if (ret == 0)
	501	uart_add_one_port(&serial21285_reg, &serial21285_port);
	502
	503	return ret;
	504	}
	505
	506	static void __exit serial21285_exit(void)
	507	{
	508	uart_remove_one_port(&serial21285_reg, &serial21285_port);
	509	uart_unregister_driver(&serial21285_reg);
	510	}
	511
	512	module_init(serial21285_init);
	513	module_exit(serial21285_exit);
	514
	515	MODULE_LICENSE("GPL");
d87a6d95	516	MODULE_DESCRIPTION("Intel Footbridge (21285) serial driver");
1da177e4	517	MODULE_ALIAS_CHARDEV(SERIAL_21285_MAJOR, SERIAL_21285_MINOR);