drm/vmwgfx: fix memory leak when too many retries have occurred
[linux-2.6-block.git] / drivers / scsi / wd33c93.c
CommitLineData
3e0a4e85 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4
LT
2/*
3 * Copyright (c) 1996 John Shifflett, GeoLog Consulting
4 * john@geolog.com
5 * jshiffle@netcom.com
1da177e4
LT
6 */
7
8/*
9 * Drew Eckhardt's excellent 'Generic NCR5380' sources from Linux-PC
10 * provided much of the inspiration and some of the code for this
11 * driver. Everything I know about Amiga DMA was gleaned from careful
12 * reading of Hamish Mcdonald's original wd33c93 driver; in fact, I
13 * borrowed shamelessly from all over that source. Thanks Hamish!
14 *
15 * _This_ driver is (I feel) an improvement over the old one in
16 * several respects:
17 *
18 * - Target Disconnection/Reconnection is now supported. Any
19 * system with more than one device active on the SCSI bus
20 * will benefit from this. The driver defaults to what I
21 * call 'adaptive disconnect' - meaning that each command
22 * is evaluated individually as to whether or not it should
23 * be run with the option to disconnect/reselect (if the
24 * device chooses), or as a "SCSI-bus-hog".
25 *
26 * - Synchronous data transfers are now supported. Because of
27 * a few devices that choke after telling the driver that
28 * they can do sync transfers, we don't automatically use
29 * this faster protocol - it can be enabled via the command-
30 * line on a device-by-device basis.
31 *
32 * - Runtime operating parameters can now be specified through
33 * the 'amiboot' or the 'insmod' command line. For amiboot do:
34 * "amiboot [usual stuff] wd33c93=blah,blah,blah"
35 * The defaults should be good for most people. See the comment
36 * for 'setup_strings' below for more details.
37 *
38 * - The old driver relied exclusively on what the Western Digital
39 * docs call "Combination Level 2 Commands", which are a great
40 * idea in that the CPU is relieved of a lot of interrupt
41 * overhead. However, by accepting a certain (user-settable)
42 * amount of additional interrupts, this driver achieves
43 * better control over the SCSI bus, and data transfers are
44 * almost as fast while being much easier to define, track,
45 * and debug.
46 *
47 *
48 * TODO:
49 * more speed. linked commands.
50 *
51 *
52 * People with bug reports, wish-lists, complaints, comments,
53 * or improvements are asked to pah-leeez email me (John Shifflett)
54 * at john@geolog.com or jshiffle@netcom.com! I'm anxious to get
55 * this thing into as good a shape as possible, and I'm positive
56 * there are lots of lurking bugs and "Stupid Places".
57 *
58 * Updates:
59 *
60 * Added support for pre -A chips, which don't have advanced features
61 * and will generate CSR_RESEL rather than CSR_RESEL_AM.
62 * Richard Hirst <richard@sleepie.demon.co.uk> August 2000
a5d8421b 63 *
64 * Added support for Burst Mode DMA and Fast SCSI. Enabled the use of
65 * default_sx_per for asynchronous data transfers. Added adjustment
66 * of transfer periods in sx_table to the actual input-clock.
67 * peter fuerst <post@pfrst.de> February 2007
1da177e4
LT
68 */
69
1da177e4
LT
70#include <linux/module.h>
71
1da177e4
LT
72#include <linux/string.h>
73#include <linux/delay.h>
1da177e4 74#include <linux/init.h>
cf7f5b45 75#include <linux/interrupt.h>
1da177e4 76#include <linux/blkdev.h>
1da177e4
LT
77
78#include <scsi/scsi.h>
79#include <scsi/scsi_cmnd.h>
80#include <scsi/scsi_device.h>
81#include <scsi/scsi_host.h>
82
078dda95
AB
83#include <asm/irq.h>
84
1da177e4
LT
85#include "wd33c93.h"
86
a5d8421b 87#define optimum_sx_per(hostdata) (hostdata)->sx_table[1].period_ns
88
1da177e4 89
a5d8421b 90#define WD33C93_VERSION "1.26++"
91#define WD33C93_DATE "10/Feb/2007"
1da177e4
LT
92
93MODULE_AUTHOR("John Shifflett");
94MODULE_DESCRIPTION("Generic WD33C93 SCSI driver");
95MODULE_LICENSE("GPL");
96
97/*
98 * 'setup_strings' is a single string used to pass operating parameters and
99 * settings from the kernel/module command-line to the driver. 'setup_args[]'
100 * is an array of strings that define the compile-time default values for
101 * these settings. If Linux boots with an amiboot or insmod command-line,
102 * those settings are combined with 'setup_args[]'. Note that amiboot
103 * command-lines are prefixed with "wd33c93=" while insmod uses a
104 * "setup_strings=" prefix. The driver recognizes the following keywords
105 * (lower case required) and arguments:
106 *
107 * - nosync:bitmask -bitmask is a byte where the 1st 7 bits correspond with
108 * the 7 possible SCSI devices. Set a bit to negotiate for
109 * asynchronous transfers on that device. To maintain
110 * backwards compatibility, a command-line such as
111 * "wd33c93=255" will be automatically translated to
112 * "wd33c93=nosync:0xff".
113 * - nodma:x -x = 1 to disable DMA, x = 0 to enable it. Argument is
114 * optional - if not present, same as "nodma:1".
115 * - period:ns -ns is the minimum # of nanoseconds in a SCSI data transfer
116 * period. Default is 500; acceptable values are 250 - 1000.
117 * - disconnect:x -x = 0 to never allow disconnects, 2 to always allow them.
118 * x = 1 does 'adaptive' disconnects, which is the default
119 * and generally the best choice.
120 * - debug:x -If 'DEBUGGING_ON' is defined, x is a bit mask that causes
121 * various types of debug output to printed - see the DB_xxx
122 * defines in wd33c93.h
123 * - clock:x -x = clock input in MHz for WD33c93 chip. Normal values
124 * would be from 8 through 20. Default is 8.
a5d8421b 125 * - burst:x -x = 1 to use Burst Mode (or Demand-Mode) DMA, x = 0 to use
126 * Single Byte DMA, which is the default. Argument is
127 * optional - if not present, same as "burst:1".
128 * - fast:x -x = 1 to enable Fast SCSI, which is only effective with
129 * input-clock divisor 4 (WD33C93_FS_16_20), x = 0 to disable
130 * it, which is the default. Argument is optional - if not
131 * present, same as "fast:1".
1da177e4
LT
132 * - next -No argument. Used to separate blocks of keywords when
133 * there's more than one host adapter in the system.
134 *
135 * Syntax Notes:
136 * - Numeric arguments can be decimal or the '0x' form of hex notation. There
137 * _must_ be a colon between a keyword and its numeric argument, with no
138 * spaces.
139 * - Keywords are separated by commas, no spaces, in the standard kernel
140 * command-line manner.
141 * - A keyword in the 'nth' comma-separated command-line member will overwrite
142 * the 'nth' element of setup_args[]. A blank command-line member (in
143 * other words, a comma with no preceding keyword) will _not_ overwrite
144 * the corresponding setup_args[] element.
145 * - If a keyword is used more than once, the first one applies to the first
146 * SCSI host found, the second to the second card, etc, unless the 'next'
147 * keyword is used to change the order.
148 *
149 * Some amiboot examples (for insmod, use 'setup_strings' instead of 'wd33c93'):
150 * - wd33c93=nosync:255
151 * - wd33c93=nodma
152 * - wd33c93=nodma:1
153 * - wd33c93=disconnect:2,nosync:0x08,period:250
154 * - wd33c93=debug:0x1c
155 */
156
157/* Normally, no defaults are specified */
a5d8421b 158static char *setup_args[] = { "", "", "", "", "", "", "", "", "", "" };
1da177e4
LT
159
160static char *setup_strings;
161module_param(setup_strings, charp, 0);
162
163static void wd33c93_execute(struct Scsi_Host *instance);
164
165#ifdef CONFIG_WD33C93_PIO
166static inline uchar
167read_wd33c93(const wd33c93_regs regs, uchar reg_num)
168{
169 uchar data;
170
171 outb(reg_num, regs.SASR);
172 data = inb(regs.SCMD);
173 return data;
174}
175
176static inline unsigned long
177read_wd33c93_count(const wd33c93_regs regs)
178{
179 unsigned long value;
180
181 outb(WD_TRANSFER_COUNT_MSB, regs.SASR);
182 value = inb(regs.SCMD) << 16;
183 value |= inb(regs.SCMD) << 8;
184 value |= inb(regs.SCMD);
185 return value;
186}
187
188static inline uchar
189read_aux_stat(const wd33c93_regs regs)
190{
191 return inb(regs.SASR);
192}
193
194static inline void
195write_wd33c93(const wd33c93_regs regs, uchar reg_num, uchar value)
196{
197 outb(reg_num, regs.SASR);
198 outb(value, regs.SCMD);
199}
200
201static inline void
202write_wd33c93_count(const wd33c93_regs regs, unsigned long value)
203{
204 outb(WD_TRANSFER_COUNT_MSB, regs.SASR);
205 outb((value >> 16) & 0xff, regs.SCMD);
206 outb((value >> 8) & 0xff, regs.SCMD);
207 outb( value & 0xff, regs.SCMD);
208}
209
210#define write_wd33c93_cmd(regs, cmd) \
211 write_wd33c93((regs), WD_COMMAND, (cmd))
212
213static inline void
214write_wd33c93_cdb(const wd33c93_regs regs, uint len, uchar cmnd[])
215{
216 int i;
217
218 outb(WD_CDB_1, regs.SASR);
219 for (i=0; i<len; i++)
220 outb(cmnd[i], regs.SCMD);
221}
222
223#else /* CONFIG_WD33C93_PIO */
224static inline uchar
225read_wd33c93(const wd33c93_regs regs, uchar reg_num)
226{
227 *regs.SASR = reg_num;
228 mb();
229 return (*regs.SCMD);
230}
231
232static unsigned long
233read_wd33c93_count(const wd33c93_regs regs)
234{
235 unsigned long value;
236
237 *regs.SASR = WD_TRANSFER_COUNT_MSB;
238 mb();
239 value = *regs.SCMD << 16;
240 value |= *regs.SCMD << 8;
241 value |= *regs.SCMD;
242 mb();
243 return value;
244}
245
246static inline uchar
247read_aux_stat(const wd33c93_regs regs)
248{
249 return *regs.SASR;
250}
251
252static inline void
253write_wd33c93(const wd33c93_regs regs, uchar reg_num, uchar value)
254{
255 *regs.SASR = reg_num;
256 mb();
257 *regs.SCMD = value;
258 mb();
259}
260
261static void
262write_wd33c93_count(const wd33c93_regs regs, unsigned long value)
263{
264 *regs.SASR = WD_TRANSFER_COUNT_MSB;
265 mb();
266 *regs.SCMD = value >> 16;
267 *regs.SCMD = value >> 8;
268 *regs.SCMD = value;
269 mb();
270}
271
272static inline void
273write_wd33c93_cmd(const wd33c93_regs regs, uchar cmd)
274{
275 *regs.SASR = WD_COMMAND;
276 mb();
277 *regs.SCMD = cmd;
278 mb();
279}
280
281static inline void
282write_wd33c93_cdb(const wd33c93_regs regs, uint len, uchar cmnd[])
283{
284 int i;
285
286 *regs.SASR = WD_CDB_1;
287 for (i = 0; i < len; i++)
288 *regs.SCMD = cmnd[i];
289}
290#endif /* CONFIG_WD33C93_PIO */
291
292static inline uchar
293read_1_byte(const wd33c93_regs regs)
294{
295 uchar asr;
296 uchar x = 0;
297
298 write_wd33c93(regs, WD_CONTROL, CTRL_IDI | CTRL_EDI | CTRL_POLLED);
299 write_wd33c93_cmd(regs, WD_CMD_TRANS_INFO | 0x80);
300 do {
301 asr = read_aux_stat(regs);
302 if (asr & ASR_DBR)
303 x = read_wd33c93(regs, WD_DATA);
304 } while (!(asr & ASR_INT));
305 return x;
306}
307
1da177e4 308static int
a5d8421b 309round_period(unsigned int period, const struct sx_period *sx_table)
1da177e4
LT
310{
311 int x;
312
313 for (x = 1; sx_table[x].period_ns; x++) {
314 if ((period <= sx_table[x - 0].period_ns) &&
315 (period > sx_table[x - 1].period_ns)) {
316 return x;
317 }
318 }
319 return 7;
320}
321
a5d8421b 322/*
323 * Calculate Synchronous Transfer Register value from SDTR code.
324 */
1da177e4 325static uchar
a5d8421b 326calc_sync_xfer(unsigned int period, unsigned int offset, unsigned int fast,
327 const struct sx_period *sx_table)
1da177e4 328{
a5d8421b 329 /* When doing Fast SCSI synchronous data transfers, the corresponding
330 * value in 'sx_table' is two times the actually used transfer period.
331 */
1da177e4
LT
332 uchar result;
333
a5d8421b 334 if (offset && fast) {
335 fast = STR_FSS;
336 period *= 2;
337 } else {
338 fast = 0;
339 }
1da177e4 340 period *= 4; /* convert SDTR code to ns */
a5d8421b 341 result = sx_table[round_period(period,sx_table)].reg_value;
1da177e4 342 result |= (offset < OPTIMUM_SX_OFF) ? offset : OPTIMUM_SX_OFF;
a5d8421b 343 result |= fast;
1da177e4
LT
344 return result;
345}
346
a5d8421b 347/*
348 * Calculate SDTR code bytes [3],[4] from period and offset.
349 */
350static inline void
351calc_sync_msg(unsigned int period, unsigned int offset, unsigned int fast,
352 uchar msg[2])
353{
354 /* 'period' is a "normal"-mode value, like the ones in 'sx_table'. The
355 * actually used transfer period for Fast SCSI synchronous data
356 * transfers is half that value.
357 */
358 period /= 4;
359 if (offset && fast)
360 period /= 2;
361 msg[0] = period;
362 msg[1] = offset;
363}
364
f281233d
JG
365static int
366wd33c93_queuecommand_lck(struct scsi_cmnd *cmd,
1da177e4
LT
367 void (*done)(struct scsi_cmnd *))
368{
369 struct WD33C93_hostdata *hostdata;
370 struct scsi_cmnd *tmp;
371
372 hostdata = (struct WD33C93_hostdata *) cmd->device->host->hostdata;
373
374 DB(DB_QUEUE_COMMAND,
5cd049a5 375 printk("Q-%d-%02x( ", cmd->device->id, cmd->cmnd[0]))
1da177e4
LT
376
377/* Set up a few fields in the scsi_cmnd structure for our own use:
378 * - host_scribble is the pointer to the next cmd in the input queue
379 * - scsi_done points to the routine we call when a cmd is finished
380 * - result is what you'd expect
381 */
382 cmd->host_scribble = NULL;
383 cmd->scsi_done = done;
384 cmd->result = 0;
385
386/* We use the Scsi_Pointer structure that's included with each command
387 * as a scratchpad (as it's intended to be used!). The handy thing about
388 * the SCp.xxx fields is that they're always associated with a given
389 * cmd, and are preserved across disconnect-reselect. This means we
390 * can pretty much ignore SAVE_POINTERS and RESTORE_POINTERS messages
391 * if we keep all the critical pointers and counters in SCp:
392 * - SCp.ptr is the pointer into the RAM buffer
393 * - SCp.this_residual is the size of that buffer
394 * - SCp.buffer points to the current scatter-gather buffer
395 * - SCp.buffers_residual tells us how many S.G. buffers there are
396 * - SCp.have_data_in is not used
397 * - SCp.sent_command is not used
398 * - SCp.phase records this command's SRCID_ER bit setting
399 */
400
ee0ae927
BH
401 if (scsi_bufflen(cmd)) {
402 cmd->SCp.buffer = scsi_sglist(cmd);
403 cmd->SCp.buffers_residual = scsi_sg_count(cmd) - 1;
45711f1a 404 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
1da177e4
LT
405 cmd->SCp.this_residual = cmd->SCp.buffer->length;
406 } else {
407 cmd->SCp.buffer = NULL;
408 cmd->SCp.buffers_residual = 0;
ee0ae927
BH
409 cmd->SCp.ptr = NULL;
410 cmd->SCp.this_residual = 0;
1da177e4
LT
411 }
412
413/* WD docs state that at the conclusion of a "LEVEL2" command, the
414 * status byte can be retrieved from the LUN register. Apparently,
415 * this is the case only for *uninterrupted* LEVEL2 commands! If
416 * there are any unexpected phases entered, even if they are 100%
417 * legal (different devices may choose to do things differently),
418 * the LEVEL2 command sequence is exited. This often occurs prior
419 * to receiving the status byte, in which case the driver does a
420 * status phase interrupt and gets the status byte on its own.
421 * While such a command can then be "resumed" (ie restarted to
422 * finish up as a LEVEL2 command), the LUN register will NOT be
423 * a valid status byte at the command's conclusion, and we must
424 * use the byte obtained during the earlier interrupt. Here, we
425 * preset SCp.Status to an illegal value (0xff) so that when
426 * this command finally completes, we can tell where the actual
427 * status byte is stored.
428 */
429
430 cmd->SCp.Status = ILLEGAL_STATUS_BYTE;
431
432 /*
433 * Add the cmd to the end of 'input_Q'. Note that REQUEST SENSE
434 * commands are added to the head of the queue so that the desired
435 * sense data is not lost before REQUEST_SENSE executes.
436 */
437
438 spin_lock_irq(&hostdata->lock);
439
440 if (!(hostdata->input_Q) || (cmd->cmnd[0] == REQUEST_SENSE)) {
441 cmd->host_scribble = (uchar *) hostdata->input_Q;
442 hostdata->input_Q = cmd;
443 } else { /* find the end of the queue */
444 for (tmp = (struct scsi_cmnd *) hostdata->input_Q;
445 tmp->host_scribble;
446 tmp = (struct scsi_cmnd *) tmp->host_scribble) ;
447 tmp->host_scribble = (uchar *) cmd;
448 }
449
450/* We know that there's at least one command in 'input_Q' now.
451 * Go see if any of them are runnable!
452 */
453
454 wd33c93_execute(cmd->device->host);
455
5cd049a5 456 DB(DB_QUEUE_COMMAND, printk(")Q "))
1da177e4
LT
457
458 spin_unlock_irq(&hostdata->lock);
459 return 0;
460}
461
f281233d
JG
462DEF_SCSI_QCMD(wd33c93_queuecommand)
463
1da177e4
LT
464/*
465 * This routine attempts to start a scsi command. If the host_card is
466 * already connected, we give up immediately. Otherwise, look through
467 * the input_Q, using the first command we find that's intended
468 * for a currently non-busy target/lun.
469 *
470 * wd33c93_execute() is always called with interrupts disabled or from
471 * the wd33c93_intr itself, which means that a wd33c93 interrupt
472 * cannot occur while we are in here.
473 */
474static void
475wd33c93_execute(struct Scsi_Host *instance)
476{
477 struct WD33C93_hostdata *hostdata =
478 (struct WD33C93_hostdata *) instance->hostdata;
479 const wd33c93_regs regs = hostdata->regs;
480 struct scsi_cmnd *cmd, *prev;
481
482 DB(DB_EXECUTE, printk("EX("))
483 if (hostdata->selecting || hostdata->connected) {
484 DB(DB_EXECUTE, printk(")EX-0 "))
485 return;
486 }
487
488 /*
489 * Search through the input_Q for a command destined
490 * for an idle target/lun.
491 */
492
493 cmd = (struct scsi_cmnd *) hostdata->input_Q;
a5d361fc 494 prev = NULL;
1da177e4 495 while (cmd) {
9cb78c16
HR
496 if (!(hostdata->busy[cmd->device->id] &
497 (1 << (cmd->device->lun & 0xff))))
1da177e4
LT
498 break;
499 prev = cmd;
500 cmd = (struct scsi_cmnd *) cmd->host_scribble;
501 }
502
503 /* quit if queue empty or all possible targets are busy */
504
505 if (!cmd) {
506 DB(DB_EXECUTE, printk(")EX-1 "))
507 return;
508 }
509
510 /* remove command from queue */
511
512 if (prev)
513 prev->host_scribble = cmd->host_scribble;
514 else
515 hostdata->input_Q = (struct scsi_cmnd *) cmd->host_scribble;
516
517#ifdef PROC_STATISTICS
518 hostdata->cmd_cnt[cmd->device->id]++;
519#endif
520
521 /*
522 * Start the selection process
523 */
524
525 if (cmd->sc_data_direction == DMA_TO_DEVICE)
526 write_wd33c93(regs, WD_DESTINATION_ID, cmd->device->id);
527 else
528 write_wd33c93(regs, WD_DESTINATION_ID, cmd->device->id | DSTID_DPD);
529
530/* Now we need to figure out whether or not this command is a good
531 * candidate for disconnect/reselect. We guess to the best of our
532 * ability, based on a set of hierarchical rules. When several
533 * devices are operating simultaneously, disconnects are usually
534 * an advantage. In a single device system, or if only 1 device
535 * is being accessed, transfers usually go faster if disconnects
536 * are not allowed:
537 *
538 * + Commands should NEVER disconnect if hostdata->disconnect =
539 * DIS_NEVER (this holds for tape drives also), and ALWAYS
540 * disconnect if hostdata->disconnect = DIS_ALWAYS.
541 * + Tape drive commands should always be allowed to disconnect.
542 * + Disconnect should be allowed if disconnected_Q isn't empty.
543 * + Commands should NOT disconnect if input_Q is empty.
544 * + Disconnect should be allowed if there are commands in input_Q
545 * for a different target/lun. In this case, the other commands
546 * should be made disconnect-able, if not already.
547 *
548 * I know, I know - this code would flunk me out of any
549 * "C Programming 101" class ever offered. But it's easy
550 * to change around and experiment with for now.
551 */
552
553 cmd->SCp.phase = 0; /* assume no disconnect */
554 if (hostdata->disconnect == DIS_NEVER)
555 goto no;
556 if (hostdata->disconnect == DIS_ALWAYS)
557 goto yes;
558 if (cmd->device->type == 1) /* tape drive? */
559 goto yes;
560 if (hostdata->disconnected_Q) /* other commands disconnected? */
561 goto yes;
562 if (!(hostdata->input_Q)) /* input_Q empty? */
563 goto no;
564 for (prev = (struct scsi_cmnd *) hostdata->input_Q; prev;
565 prev = (struct scsi_cmnd *) prev->host_scribble) {
566 if ((prev->device->id != cmd->device->id) ||
567 (prev->device->lun != cmd->device->lun)) {
568 for (prev = (struct scsi_cmnd *) hostdata->input_Q; prev;
569 prev = (struct scsi_cmnd *) prev->host_scribble)
570 prev->SCp.phase = 1;
571 goto yes;
572 }
573 }
574
575 goto no;
576
577 yes:
578 cmd->SCp.phase = 1;
579
580#ifdef PROC_STATISTICS
581 hostdata->disc_allowed_cnt[cmd->device->id]++;
582#endif
583
584 no:
585
586 write_wd33c93(regs, WD_SOURCE_ID, ((cmd->SCp.phase) ? SRCID_ER : 0));
587
9cb78c16 588 write_wd33c93(regs, WD_TARGET_LUN, (u8)cmd->device->lun);
1da177e4
LT
589 write_wd33c93(regs, WD_SYNCHRONOUS_TRANSFER,
590 hostdata->sync_xfer[cmd->device->id]);
9cb78c16 591 hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF));
1da177e4
LT
592
593 if ((hostdata->level2 == L2_NONE) ||
594 (hostdata->sync_stat[cmd->device->id] == SS_UNSET)) {
595
596 /*
597 * Do a 'Select-With-ATN' command. This will end with
598 * one of the following interrupts:
599 * CSR_RESEL_AM: failure - can try again later.
600 * CSR_TIMEOUT: failure - give up.
601 * CSR_SELECT: success - proceed.
602 */
603
604 hostdata->selecting = cmd;
605
606/* Every target has its own synchronous transfer setting, kept in the
607 * sync_xfer array, and a corresponding status byte in sync_stat[].
608 * Each target's sync_stat[] entry is initialized to SX_UNSET, and its
609 * sync_xfer[] entry is initialized to the default/safe value. SS_UNSET
610 * means that the parameters are undetermined as yet, and that we
611 * need to send an SDTR message to this device after selection is
612 * complete: We set SS_FIRST to tell the interrupt routine to do so.
613 * If we've been asked not to try synchronous transfers on this
614 * target (and _all_ luns within it), we'll still send the SDTR message
615 * later, but at that time we'll negotiate for async by specifying a
616 * sync fifo depth of 0.
617 */
618 if (hostdata->sync_stat[cmd->device->id] == SS_UNSET)
619 hostdata->sync_stat[cmd->device->id] = SS_FIRST;
620 hostdata->state = S_SELECTING;
621 write_wd33c93_count(regs, 0); /* guarantee a DATA_PHASE interrupt */
622 write_wd33c93_cmd(regs, WD_CMD_SEL_ATN);
623 } else {
624
625 /*
626 * Do a 'Select-With-ATN-Xfer' command. This will end with
627 * one of the following interrupts:
628 * CSR_RESEL_AM: failure - can try again later.
629 * CSR_TIMEOUT: failure - give up.
630 * anything else: success - proceed.
631 */
632
633 hostdata->connected = cmd;
634 write_wd33c93(regs, WD_COMMAND_PHASE, 0);
635
636 /* copy command_descriptor_block into WD chip
637 * (take advantage of auto-incrementing)
638 */
639
640 write_wd33c93_cdb(regs, cmd->cmd_len, cmd->cmnd);
641
642 /* The wd33c93 only knows about Group 0, 1, and 5 commands when
643 * it's doing a 'select-and-transfer'. To be safe, we write the
644 * size of the CDB into the OWN_ID register for every case. This
645 * way there won't be problems with vendor-unique, audio, etc.
646 */
647
648 write_wd33c93(regs, WD_OWN_ID, cmd->cmd_len);
649
650 /* When doing a non-disconnect command with DMA, we can save
651 * ourselves a DATA phase interrupt later by setting everything
652 * up ahead of time.
653 */
654
655 if ((cmd->SCp.phase == 0) && (hostdata->no_dma == 0)) {
656 if (hostdata->dma_setup(cmd,
657 (cmd->sc_data_direction == DMA_TO_DEVICE) ?
658 DATA_OUT_DIR : DATA_IN_DIR))
659 write_wd33c93_count(regs, 0); /* guarantee a DATA_PHASE interrupt */
660 else {
661 write_wd33c93_count(regs,
662 cmd->SCp.this_residual);
663 write_wd33c93(regs, WD_CONTROL,
a5d8421b 664 CTRL_IDI | CTRL_EDI | hostdata->dma_mode);
1da177e4
LT
665 hostdata->dma = D_DMA_RUNNING;
666 }
667 } else
668 write_wd33c93_count(regs, 0); /* guarantee a DATA_PHASE interrupt */
669
670 hostdata->state = S_RUNNING_LEVEL2;
671 write_wd33c93_cmd(regs, WD_CMD_SEL_ATN_XFER);
672 }
673
674 /*
675 * Since the SCSI bus can handle only 1 connection at a time,
676 * we get out of here now. If the selection fails, or when
677 * the command disconnects, we'll come back to this routine
678 * to search the input_Q again...
679 */
680
681 DB(DB_EXECUTE,
5cd049a5 682 printk("%s)EX-2 ", (cmd->SCp.phase) ? "d:" : ""))
1da177e4
LT
683}
684
685static void
686transfer_pio(const wd33c93_regs regs, uchar * buf, int cnt,
687 int data_in_dir, struct WD33C93_hostdata *hostdata)
688{
689 uchar asr;
690
691 DB(DB_TRANSFER,
692 printk("(%p,%d,%s:", buf, cnt, data_in_dir ? "in" : "out"))
693
694 write_wd33c93(regs, WD_CONTROL, CTRL_IDI | CTRL_EDI | CTRL_POLLED);
695 write_wd33c93_count(regs, cnt);
696 write_wd33c93_cmd(regs, WD_CMD_TRANS_INFO);
697 if (data_in_dir) {
698 do {
699 asr = read_aux_stat(regs);
700 if (asr & ASR_DBR)
701 *buf++ = read_wd33c93(regs, WD_DATA);
702 } while (!(asr & ASR_INT));
703 } else {
704 do {
705 asr = read_aux_stat(regs);
706 if (asr & ASR_DBR)
707 write_wd33c93(regs, WD_DATA, *buf++);
708 } while (!(asr & ASR_INT));
709 }
710
711 /* Note: we are returning with the interrupt UN-cleared.
712 * Since (presumably) an entire I/O operation has
713 * completed, the bus phase is probably different, and
714 * the interrupt routine will discover this when it
715 * responds to the uncleared int.
716 */
717
718}
719
720static void
721transfer_bytes(const wd33c93_regs regs, struct scsi_cmnd *cmd,
722 int data_in_dir)
723{
724 struct WD33C93_hostdata *hostdata;
725 unsigned long length;
726
727 hostdata = (struct WD33C93_hostdata *) cmd->device->host->hostdata;
728
729/* Normally, you'd expect 'this_residual' to be non-zero here.
730 * In a series of scatter-gather transfers, however, this
731 * routine will usually be called with 'this_residual' equal
732 * to 0 and 'buffers_residual' non-zero. This means that a
733 * previous transfer completed, clearing 'this_residual', and
734 * now we need to setup the next scatter-gather buffer as the
735 * source or destination for THIS transfer.
736 */
737 if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) {
c3c0fd9b 738 cmd->SCp.buffer = sg_next(cmd->SCp.buffer);
1da177e4
LT
739 --cmd->SCp.buffers_residual;
740 cmd->SCp.this_residual = cmd->SCp.buffer->length;
45711f1a 741 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
1da177e4 742 }
a5d8421b 743 if (!cmd->SCp.this_residual) /* avoid bogus setups */
744 return;
1da177e4
LT
745
746 write_wd33c93(regs, WD_SYNCHRONOUS_TRANSFER,
747 hostdata->sync_xfer[cmd->device->id]);
748
749/* 'hostdata->no_dma' is TRUE if we don't even want to try DMA.
750 * Update 'this_residual' and 'ptr' after 'transfer_pio()' returns.
751 */
752
753 if (hostdata->no_dma || hostdata->dma_setup(cmd, data_in_dir)) {
754#ifdef PROC_STATISTICS
755 hostdata->pio_cnt++;
756#endif
757 transfer_pio(regs, (uchar *) cmd->SCp.ptr,
758 cmd->SCp.this_residual, data_in_dir, hostdata);
759 length = cmd->SCp.this_residual;
760 cmd->SCp.this_residual = read_wd33c93_count(regs);
761 cmd->SCp.ptr += (length - cmd->SCp.this_residual);
762 }
763
764/* We are able to do DMA (in fact, the Amiga hardware is
765 * already going!), so start up the wd33c93 in DMA mode.
766 * We set 'hostdata->dma' = D_DMA_RUNNING so that when the
767 * transfer completes and causes an interrupt, we're
768 * reminded to tell the Amiga to shut down its end. We'll
769 * postpone the updating of 'this_residual' and 'ptr'
770 * until then.
771 */
772
773 else {
774#ifdef PROC_STATISTICS
775 hostdata->dma_cnt++;
776#endif
a5d8421b 777 write_wd33c93(regs, WD_CONTROL, CTRL_IDI | CTRL_EDI | hostdata->dma_mode);
1da177e4
LT
778 write_wd33c93_count(regs, cmd->SCp.this_residual);
779
780 if ((hostdata->level2 >= L2_DATA) ||
781 (hostdata->level2 == L2_BASIC && cmd->SCp.phase == 0)) {
782 write_wd33c93(regs, WD_COMMAND_PHASE, 0x45);
783 write_wd33c93_cmd(regs, WD_CMD_SEL_ATN_XFER);
784 hostdata->state = S_RUNNING_LEVEL2;
785 } else
786 write_wd33c93_cmd(regs, WD_CMD_TRANS_INFO);
787
788 hostdata->dma = D_DMA_RUNNING;
789 }
790}
791
792void
793wd33c93_intr(struct Scsi_Host *instance)
794{
795 struct WD33C93_hostdata *hostdata =
796 (struct WD33C93_hostdata *) instance->hostdata;
797 const wd33c93_regs regs = hostdata->regs;
798 struct scsi_cmnd *patch, *cmd;
799 uchar asr, sr, phs, id, lun, *ucp, msg;
800 unsigned long length, flags;
801
802 asr = read_aux_stat(regs);
803 if (!(asr & ASR_INT) || (asr & ASR_BSY))
804 return;
805
806 spin_lock_irqsave(&hostdata->lock, flags);
807
808#ifdef PROC_STATISTICS
809 hostdata->int_cnt++;
810#endif
811
812 cmd = (struct scsi_cmnd *) hostdata->connected; /* assume we're connected */
813 sr = read_wd33c93(regs, WD_SCSI_STATUS); /* clear the interrupt */
814 phs = read_wd33c93(regs, WD_COMMAND_PHASE);
815
816 DB(DB_INTR, printk("{%02x:%02x-", asr, sr))
817
818/* After starting a DMA transfer, the next interrupt
819 * is guaranteed to be in response to completion of
820 * the transfer. Since the Amiga DMA hardware runs in
821 * in an open-ended fashion, it needs to be told when
822 * to stop; do that here if D_DMA_RUNNING is true.
823 * Also, we have to update 'this_residual' and 'ptr'
824 * based on the contents of the TRANSFER_COUNT register,
825 * in case the device decided to do an intermediate
826 * disconnect (a device may do this if it has to do a
827 * seek, or just to be nice and let other devices have
828 * some bus time during long transfers). After doing
829 * whatever is needed, we go on and service the WD3393
830 * interrupt normally.
831 */
832 if (hostdata->dma == D_DMA_RUNNING) {
833 DB(DB_TRANSFER,
834 printk("[%p/%d:", cmd->SCp.ptr, cmd->SCp.this_residual))
835 hostdata->dma_stop(cmd->device->host, cmd, 1);
836 hostdata->dma = D_DMA_OFF;
837 length = cmd->SCp.this_residual;
838 cmd->SCp.this_residual = read_wd33c93_count(regs);
839 cmd->SCp.ptr += (length - cmd->SCp.this_residual);
840 DB(DB_TRANSFER,
841 printk("%p/%d]", cmd->SCp.ptr, cmd->SCp.this_residual))
842 }
843
844/* Respond to the specific WD3393 interrupt - there are quite a few! */
845 switch (sr) {
846 case CSR_TIMEOUT:
847 DB(DB_INTR, printk("TIMEOUT"))
848
849 if (hostdata->state == S_RUNNING_LEVEL2)
850 hostdata->connected = NULL;
851 else {
852 cmd = (struct scsi_cmnd *) hostdata->selecting; /* get a valid cmd */
853 hostdata->selecting = NULL;
854 }
855
856 cmd->result = DID_NO_CONNECT << 16;
9cb78c16 857 hostdata->busy[cmd->device->id] &= ~(1 << (cmd->device->lun & 0xff));
1da177e4
LT
858 hostdata->state = S_UNCONNECTED;
859 cmd->scsi_done(cmd);
860
861 /* From esp.c:
862 * There is a window of time within the scsi_done() path
863 * of execution where interrupts are turned back on full
864 * blast and left that way. During that time we could
865 * reconnect to a disconnected command, then we'd bomb
866 * out below. We could also end up executing two commands
867 * at _once_. ...just so you know why the restore_flags()
868 * is here...
869 */
870
871 spin_unlock_irqrestore(&hostdata->lock, flags);
872
873/* We are not connected to a target - check to see if there
874 * are commands waiting to be executed.
875 */
876
877 wd33c93_execute(instance);
878 break;
879
880/* Note: this interrupt should not occur in a LEVEL2 command */
881
882 case CSR_SELECT:
883 DB(DB_INTR, printk("SELECT"))
884 hostdata->connected = cmd =
885 (struct scsi_cmnd *) hostdata->selecting;
886 hostdata->selecting = NULL;
887
888 /* construct an IDENTIFY message with correct disconnect bit */
889
9cb78c16 890 hostdata->outgoing_msg[0] = IDENTIFY(0, cmd->device->lun);
1da177e4
LT
891 if (cmd->SCp.phase)
892 hostdata->outgoing_msg[0] |= 0x40;
893
894 if (hostdata->sync_stat[cmd->device->id] == SS_FIRST) {
1da177e4
LT
895
896 hostdata->sync_stat[cmd->device->id] = SS_WAITING;
897
898/* Tack on a 2nd message to ask about synchronous transfers. If we've
899 * been asked to do only asynchronous transfers on this device, we
900 * request a fifo depth of 0, which is equivalent to async - should
901 * solve the problems some people have had with GVP's Guru ROM.
902 */
903
904 hostdata->outgoing_msg[1] = EXTENDED_MESSAGE;
905 hostdata->outgoing_msg[2] = 3;
906 hostdata->outgoing_msg[3] = EXTENDED_SDTR;
907 if (hostdata->no_sync & (1 << cmd->device->id)) {
a5d8421b 908 calc_sync_msg(hostdata->default_sx_per, 0,
909 0, hostdata->outgoing_msg + 4);
1da177e4 910 } else {
a5d8421b 911 calc_sync_msg(optimum_sx_per(hostdata),
912 OPTIMUM_SX_OFF,
913 hostdata->fast,
914 hostdata->outgoing_msg + 4);
1da177e4
LT
915 }
916 hostdata->outgoing_len = 6;
a5d8421b 917#ifdef SYNC_DEBUG
918 ucp = hostdata->outgoing_msg + 1;
919 printk(" sending SDTR %02x03%02x%02x%02x ",
920 ucp[0], ucp[2], ucp[3], ucp[4]);
921#endif
1da177e4
LT
922 } else
923 hostdata->outgoing_len = 1;
924
925 hostdata->state = S_CONNECTED;
926 spin_unlock_irqrestore(&hostdata->lock, flags);
927 break;
928
929 case CSR_XFER_DONE | PHS_DATA_IN:
930 case CSR_UNEXP | PHS_DATA_IN:
931 case CSR_SRV_REQ | PHS_DATA_IN:
932 DB(DB_INTR,
933 printk("IN-%d.%d", cmd->SCp.this_residual,
934 cmd->SCp.buffers_residual))
935 transfer_bytes(regs, cmd, DATA_IN_DIR);
936 if (hostdata->state != S_RUNNING_LEVEL2)
937 hostdata->state = S_CONNECTED;
938 spin_unlock_irqrestore(&hostdata->lock, flags);
939 break;
940
941 case CSR_XFER_DONE | PHS_DATA_OUT:
942 case CSR_UNEXP | PHS_DATA_OUT:
943 case CSR_SRV_REQ | PHS_DATA_OUT:
944 DB(DB_INTR,
945 printk("OUT-%d.%d", cmd->SCp.this_residual,
946 cmd->SCp.buffers_residual))
947 transfer_bytes(regs, cmd, DATA_OUT_DIR);
948 if (hostdata->state != S_RUNNING_LEVEL2)
949 hostdata->state = S_CONNECTED;
950 spin_unlock_irqrestore(&hostdata->lock, flags);
951 break;
952
953/* Note: this interrupt should not occur in a LEVEL2 command */
954
955 case CSR_XFER_DONE | PHS_COMMAND:
956 case CSR_UNEXP | PHS_COMMAND:
957 case CSR_SRV_REQ | PHS_COMMAND:
5cd049a5 958 DB(DB_INTR, printk("CMND-%02x", cmd->cmnd[0]))
1da177e4
LT
959 transfer_pio(regs, cmd->cmnd, cmd->cmd_len, DATA_OUT_DIR,
960 hostdata);
961 hostdata->state = S_CONNECTED;
962 spin_unlock_irqrestore(&hostdata->lock, flags);
963 break;
964
965 case CSR_XFER_DONE | PHS_STATUS:
966 case CSR_UNEXP | PHS_STATUS:
967 case CSR_SRV_REQ | PHS_STATUS:
968 DB(DB_INTR, printk("STATUS="))
969 cmd->SCp.Status = read_1_byte(regs);
970 DB(DB_INTR, printk("%02x", cmd->SCp.Status))
971 if (hostdata->level2 >= L2_BASIC) {
972 sr = read_wd33c93(regs, WD_SCSI_STATUS); /* clear interrupt */
882905c7 973 udelay(7);
1da177e4
LT
974 hostdata->state = S_RUNNING_LEVEL2;
975 write_wd33c93(regs, WD_COMMAND_PHASE, 0x50);
976 write_wd33c93_cmd(regs, WD_CMD_SEL_ATN_XFER);
977 } else {
978 hostdata->state = S_CONNECTED;
979 }
980 spin_unlock_irqrestore(&hostdata->lock, flags);
981 break;
982
983 case CSR_XFER_DONE | PHS_MESS_IN:
984 case CSR_UNEXP | PHS_MESS_IN:
985 case CSR_SRV_REQ | PHS_MESS_IN:
986 DB(DB_INTR, printk("MSG_IN="))
987
988 msg = read_1_byte(regs);
989 sr = read_wd33c93(regs, WD_SCSI_STATUS); /* clear interrupt */
882905c7 990 udelay(7);
1da177e4
LT
991
992 hostdata->incoming_msg[hostdata->incoming_ptr] = msg;
993 if (hostdata->incoming_msg[0] == EXTENDED_MESSAGE)
994 msg = EXTENDED_MESSAGE;
995 else
996 hostdata->incoming_ptr = 0;
997
998 cmd->SCp.Message = msg;
999 switch (msg) {
1000
1001 case COMMAND_COMPLETE:
5cd049a5 1002 DB(DB_INTR, printk("CCMP"))
1da177e4
LT
1003 write_wd33c93_cmd(regs, WD_CMD_NEGATE_ACK);
1004 hostdata->state = S_PRE_CMP_DISC;
1005 break;
1006
1007 case SAVE_POINTERS:
1008 DB(DB_INTR, printk("SDP"))
1009 write_wd33c93_cmd(regs, WD_CMD_NEGATE_ACK);
1010 hostdata->state = S_CONNECTED;
1011 break;
1012
1013 case RESTORE_POINTERS:
1014 DB(DB_INTR, printk("RDP"))
1015 if (hostdata->level2 >= L2_BASIC) {
1016 write_wd33c93(regs, WD_COMMAND_PHASE, 0x45);
1017 write_wd33c93_cmd(regs, WD_CMD_SEL_ATN_XFER);
1018 hostdata->state = S_RUNNING_LEVEL2;
1019 } else {
1020 write_wd33c93_cmd(regs, WD_CMD_NEGATE_ACK);
1021 hostdata->state = S_CONNECTED;
1022 }
1023 break;
1024
1025 case DISCONNECT:
1026 DB(DB_INTR, printk("DIS"))
1027 cmd->device->disconnect = 1;
1028 write_wd33c93_cmd(regs, WD_CMD_NEGATE_ACK);
1029 hostdata->state = S_PRE_TMP_DISC;
1030 break;
1031
1032 case MESSAGE_REJECT:
1033 DB(DB_INTR, printk("REJ"))
1034#ifdef SYNC_DEBUG
1035 printk("-REJ-");
1036#endif
a5d8421b 1037 if (hostdata->sync_stat[cmd->device->id] == SS_WAITING) {
1da177e4 1038 hostdata->sync_stat[cmd->device->id] = SS_SET;
a5d8421b 1039 /* we want default_sx_per, not DEFAULT_SX_PER */
1040 hostdata->sync_xfer[cmd->device->id] =
1041 calc_sync_xfer(hostdata->default_sx_per
1042 / 4, 0, 0, hostdata->sx_table);
1043 }
1da177e4
LT
1044 write_wd33c93_cmd(regs, WD_CMD_NEGATE_ACK);
1045 hostdata->state = S_CONNECTED;
1046 break;
1047
1048 case EXTENDED_MESSAGE:
1049 DB(DB_INTR, printk("EXT"))
1050
1051 ucp = hostdata->incoming_msg;
1052
1053#ifdef SYNC_DEBUG
1054 printk("%02x", ucp[hostdata->incoming_ptr]);
1055#endif
1056 /* Is this the last byte of the extended message? */
1057
1058 if ((hostdata->incoming_ptr >= 2) &&
1059 (hostdata->incoming_ptr == (ucp[1] + 1))) {
1060
1061 switch (ucp[2]) { /* what's the EXTENDED code? */
1062 case EXTENDED_SDTR:
a5d8421b 1063 /* default to default async period */
1064 id = calc_sync_xfer(hostdata->
1065 default_sx_per / 4, 0,
1066 0, hostdata->sx_table);
1da177e4
LT
1067 if (hostdata->sync_stat[cmd->device->id] !=
1068 SS_WAITING) {
1069
1070/* A device has sent an unsolicited SDTR message; rather than go
1071 * through the effort of decoding it and then figuring out what
1072 * our reply should be, we're just gonna say that we have a
1073 * synchronous fifo depth of 0. This will result in asynchronous
1074 * transfers - not ideal but so much easier.
1075 * Actually, this is OK because it assures us that if we don't
1076 * specifically ask for sync transfers, we won't do any.
1077 */
1078
1079 write_wd33c93_cmd(regs, WD_CMD_ASSERT_ATN); /* want MESS_OUT */
1080 hostdata->outgoing_msg[0] =
1081 EXTENDED_MESSAGE;
1082 hostdata->outgoing_msg[1] = 3;
1083 hostdata->outgoing_msg[2] =
1084 EXTENDED_SDTR;
a5d8421b 1085 calc_sync_msg(hostdata->
1086 default_sx_per, 0,
1087 0, hostdata->outgoing_msg + 3);
1da177e4 1088 hostdata->outgoing_len = 5;
1da177e4 1089 } else {
a5d8421b 1090 if (ucp[4]) /* well, sync transfer */
1091 id = calc_sync_xfer(ucp[3], ucp[4],
1092 hostdata->fast,
1093 hostdata->sx_table);
1094 else if (ucp[3]) /* very unlikely... */
1095 id = calc_sync_xfer(ucp[3], ucp[4],
1096 0, hostdata->sx_table);
1da177e4 1097 }
a5d8421b 1098 hostdata->sync_xfer[cmd->device->id] = id;
1da177e4 1099#ifdef SYNC_DEBUG
a5d8421b 1100 printk(" sync_xfer=%02x\n",
1da177e4
LT
1101 hostdata->sync_xfer[cmd->device->id]);
1102#endif
1103 hostdata->sync_stat[cmd->device->id] =
1104 SS_SET;
1105 write_wd33c93_cmd(regs,
1106 WD_CMD_NEGATE_ACK);
1107 hostdata->state = S_CONNECTED;
1108 break;
1109 case EXTENDED_WDTR:
1110 write_wd33c93_cmd(regs, WD_CMD_ASSERT_ATN); /* want MESS_OUT */
1111 printk("sending WDTR ");
1112 hostdata->outgoing_msg[0] =
1113 EXTENDED_MESSAGE;
1114 hostdata->outgoing_msg[1] = 2;
1115 hostdata->outgoing_msg[2] =
1116 EXTENDED_WDTR;
1117 hostdata->outgoing_msg[3] = 0; /* 8 bit transfer width */
1118 hostdata->outgoing_len = 4;
1119 write_wd33c93_cmd(regs,
1120 WD_CMD_NEGATE_ACK);
1121 hostdata->state = S_CONNECTED;
1122 break;
1123 default:
1124 write_wd33c93_cmd(regs, WD_CMD_ASSERT_ATN); /* want MESS_OUT */
1125 printk
1126 ("Rejecting Unknown Extended Message(%02x). ",
1127 ucp[2]);
1128 hostdata->outgoing_msg[0] =
1129 MESSAGE_REJECT;
1130 hostdata->outgoing_len = 1;
1131 write_wd33c93_cmd(regs,
1132 WD_CMD_NEGATE_ACK);
1133 hostdata->state = S_CONNECTED;
1134 break;
1135 }
1136 hostdata->incoming_ptr = 0;
1137 }
1138
1139 /* We need to read more MESS_IN bytes for the extended message */
1140
1141 else {
1142 hostdata->incoming_ptr++;
1143 write_wd33c93_cmd(regs, WD_CMD_NEGATE_ACK);
1144 hostdata->state = S_CONNECTED;
1145 }
1146 break;
1147
1148 default:
1149 printk("Rejecting Unknown Message(%02x) ", msg);
1150 write_wd33c93_cmd(regs, WD_CMD_ASSERT_ATN); /* want MESS_OUT */
1151 hostdata->outgoing_msg[0] = MESSAGE_REJECT;
1152 hostdata->outgoing_len = 1;
1153 write_wd33c93_cmd(regs, WD_CMD_NEGATE_ACK);
1154 hostdata->state = S_CONNECTED;
1155 }
1156 spin_unlock_irqrestore(&hostdata->lock, flags);
1157 break;
1158
1159/* Note: this interrupt will occur only after a LEVEL2 command */
1160
1161 case CSR_SEL_XFER_DONE:
1162
1163/* Make sure that reselection is enabled at this point - it may
1164 * have been turned off for the command that just completed.
1165 */
1166
1167 write_wd33c93(regs, WD_SOURCE_ID, SRCID_ER);
1168 if (phs == 0x60) {
5cd049a5 1169 DB(DB_INTR, printk("SX-DONE"))
1da177e4
LT
1170 cmd->SCp.Message = COMMAND_COMPLETE;
1171 lun = read_wd33c93(regs, WD_TARGET_LUN);
1172 DB(DB_INTR, printk(":%d.%d", cmd->SCp.Status, lun))
1173 hostdata->connected = NULL;
9cb78c16 1174 hostdata->busy[cmd->device->id] &= ~(1 << (cmd->device->lun & 0xff));
1da177e4
LT
1175 hostdata->state = S_UNCONNECTED;
1176 if (cmd->SCp.Status == ILLEGAL_STATUS_BYTE)
1177 cmd->SCp.Status = lun;
1178 if (cmd->cmnd[0] == REQUEST_SENSE
1179 && cmd->SCp.Status != GOOD)
1180 cmd->result =
1181 (cmd->
1182 result & 0x00ffff) | (DID_ERROR << 16);
1183 else
1184 cmd->result =
1185 cmd->SCp.Status | (cmd->SCp.Message << 8);
1186 cmd->scsi_done(cmd);
1187
1188/* We are no longer connected to a target - check to see if
1189 * there are commands waiting to be executed.
1190 */
1191 spin_unlock_irqrestore(&hostdata->lock, flags);
1192 wd33c93_execute(instance);
1193 } else {
1194 printk
5cd049a5
CH
1195 ("%02x:%02x:%02x: Unknown SEL_XFER_DONE phase!!---",
1196 asr, sr, phs);
1da177e4
LT
1197 spin_unlock_irqrestore(&hostdata->lock, flags);
1198 }
1199 break;
1200
1201/* Note: this interrupt will occur only after a LEVEL2 command */
1202
1203 case CSR_SDP:
1204 DB(DB_INTR, printk("SDP"))
1205 hostdata->state = S_RUNNING_LEVEL2;
1206 write_wd33c93(regs, WD_COMMAND_PHASE, 0x41);
1207 write_wd33c93_cmd(regs, WD_CMD_SEL_ATN_XFER);
1208 spin_unlock_irqrestore(&hostdata->lock, flags);
1209 break;
1210
1211 case CSR_XFER_DONE | PHS_MESS_OUT:
1212 case CSR_UNEXP | PHS_MESS_OUT:
1213 case CSR_SRV_REQ | PHS_MESS_OUT:
1214 DB(DB_INTR, printk("MSG_OUT="))
1215
1216/* To get here, we've probably requested MESSAGE_OUT and have
1217 * already put the correct bytes in outgoing_msg[] and filled
1218 * in outgoing_len. We simply send them out to the SCSI bus.
1219 * Sometimes we get MESSAGE_OUT phase when we're not expecting
1220 * it - like when our SDTR message is rejected by a target. Some
1221 * targets send the REJECT before receiving all of the extended
1222 * message, and then seem to go back to MESSAGE_OUT for a byte
1223 * or two. Not sure why, or if I'm doing something wrong to
1224 * cause this to happen. Regardless, it seems that sending
1225 * NOP messages in these situations results in no harm and
1226 * makes everyone happy.
1227 */
1228 if (hostdata->outgoing_len == 0) {
1229 hostdata->outgoing_len = 1;
1230 hostdata->outgoing_msg[0] = NOP;
1231 }
1232 transfer_pio(regs, hostdata->outgoing_msg,
1233 hostdata->outgoing_len, DATA_OUT_DIR, hostdata);
1234 DB(DB_INTR, printk("%02x", hostdata->outgoing_msg[0]))
1235 hostdata->outgoing_len = 0;
1236 hostdata->state = S_CONNECTED;
1237 spin_unlock_irqrestore(&hostdata->lock, flags);
1238 break;
1239
1240 case CSR_UNEXP_DISC:
1241
1242/* I think I've seen this after a request-sense that was in response
1243 * to an error condition, but not sure. We certainly need to do
1244 * something when we get this interrupt - the question is 'what?'.
1245 * Let's think positively, and assume some command has finished
1246 * in a legal manner (like a command that provokes a request-sense),
1247 * so we treat it as a normal command-complete-disconnect.
1248 */
1249
1250/* Make sure that reselection is enabled at this point - it may
1251 * have been turned off for the command that just completed.
1252 */
1253
1254 write_wd33c93(regs, WD_SOURCE_ID, SRCID_ER);
1255 if (cmd == NULL) {
1256 printk(" - Already disconnected! ");
1257 hostdata->state = S_UNCONNECTED;
1258 spin_unlock_irqrestore(&hostdata->lock, flags);
1259 return;
1260 }
5cd049a5 1261 DB(DB_INTR, printk("UNEXP_DISC"))
1da177e4 1262 hostdata->connected = NULL;
9cb78c16 1263 hostdata->busy[cmd->device->id] &= ~(1 << (cmd->device->lun & 0xff));
1da177e4
LT
1264 hostdata->state = S_UNCONNECTED;
1265 if (cmd->cmnd[0] == REQUEST_SENSE && cmd->SCp.Status != GOOD)
1266 cmd->result =
1267 (cmd->result & 0x00ffff) | (DID_ERROR << 16);
1268 else
1269 cmd->result = cmd->SCp.Status | (cmd->SCp.Message << 8);
1270 cmd->scsi_done(cmd);
1271
1272/* We are no longer connected to a target - check to see if
1273 * there are commands waiting to be executed.
1274 */
1275 /* look above for comments on scsi_done() */
1276 spin_unlock_irqrestore(&hostdata->lock, flags);
1277 wd33c93_execute(instance);
1278 break;
1279
1280 case CSR_DISC:
1281
1282/* Make sure that reselection is enabled at this point - it may
1283 * have been turned off for the command that just completed.
1284 */
1285
1286 write_wd33c93(regs, WD_SOURCE_ID, SRCID_ER);
5cd049a5 1287 DB(DB_INTR, printk("DISC"))
1da177e4
LT
1288 if (cmd == NULL) {
1289 printk(" - Already disconnected! ");
1290 hostdata->state = S_UNCONNECTED;
1291 }
1292 switch (hostdata->state) {
1293 case S_PRE_CMP_DISC:
1294 hostdata->connected = NULL;
9cb78c16 1295 hostdata->busy[cmd->device->id] &= ~(1 << (cmd->device->lun & 0xff));
1da177e4
LT
1296 hostdata->state = S_UNCONNECTED;
1297 DB(DB_INTR, printk(":%d", cmd->SCp.Status))
1298 if (cmd->cmnd[0] == REQUEST_SENSE
1299 && cmd->SCp.Status != GOOD)
1300 cmd->result =
1301 (cmd->
1302 result & 0x00ffff) | (DID_ERROR << 16);
1303 else
1304 cmd->result =
1305 cmd->SCp.Status | (cmd->SCp.Message << 8);
1306 cmd->scsi_done(cmd);
1307 break;
1308 case S_PRE_TMP_DISC:
1309 case S_RUNNING_LEVEL2:
1310 cmd->host_scribble = (uchar *) hostdata->disconnected_Q;
1311 hostdata->disconnected_Q = cmd;
1312 hostdata->connected = NULL;
1313 hostdata->state = S_UNCONNECTED;
1314
1315#ifdef PROC_STATISTICS
1316 hostdata->disc_done_cnt[cmd->device->id]++;
1317#endif
1318
1319 break;
1320 default:
1321 printk("*** Unexpected DISCONNECT interrupt! ***");
1322 hostdata->state = S_UNCONNECTED;
1323 }
1324
1325/* We are no longer connected to a target - check to see if
1326 * there are commands waiting to be executed.
1327 */
1328 spin_unlock_irqrestore(&hostdata->lock, flags);
1329 wd33c93_execute(instance);
1330 break;
1331
1332 case CSR_RESEL_AM:
1333 case CSR_RESEL:
1334 DB(DB_INTR, printk("RESEL%s", sr == CSR_RESEL_AM ? "_AM" : ""))
1335
1336 /* Old chips (pre -A ???) don't have advanced features and will
1337 * generate CSR_RESEL. In that case we have to extract the LUN the
1338 * hard way (see below).
1339 * First we have to make sure this reselection didn't
1340 * happen during Arbitration/Selection of some other device.
1341 * If yes, put losing command back on top of input_Q.
1342 */
1343 if (hostdata->level2 <= L2_NONE) {
1344
1345 if (hostdata->selecting) {
1346 cmd = (struct scsi_cmnd *) hostdata->selecting;
1347 hostdata->selecting = NULL;
9cb78c16 1348 hostdata->busy[cmd->device->id] &= ~(1 << (cmd->device->lun & 0xff));
1da177e4
LT
1349 cmd->host_scribble =
1350 (uchar *) hostdata->input_Q;
1351 hostdata->input_Q = cmd;
1352 }
1353 }
1354
1355 else {
1356
1357 if (cmd) {
1358 if (phs == 0x00) {
1359 hostdata->busy[cmd->device->id] &=
9cb78c16 1360 ~(1 << (cmd->device->lun & 0xff));
1da177e4
LT
1361 cmd->host_scribble =
1362 (uchar *) hostdata->input_Q;
1363 hostdata->input_Q = cmd;
1364 } else {
1365 printk
1366 ("---%02x:%02x:%02x-TROUBLE: Intrusive ReSelect!---",
1367 asr, sr, phs);
1368 while (1)
1369 printk("\r");
1370 }
1371 }
1372
1373 }
1374
1375 /* OK - find out which device reselected us. */
1376
1377 id = read_wd33c93(regs, WD_SOURCE_ID);
1378 id &= SRCID_MASK;
1379
1380 /* and extract the lun from the ID message. (Note that we don't
1381 * bother to check for a valid message here - I guess this is
1382 * not the right way to go, but...)
1383 */
1384
1385 if (sr == CSR_RESEL_AM) {
1386 lun = read_wd33c93(regs, WD_DATA);
1387 if (hostdata->level2 < L2_RESELECT)
1388 write_wd33c93_cmd(regs, WD_CMD_NEGATE_ACK);
1389 lun &= 7;
1390 } else {
1391 /* Old chip; wait for msgin phase to pick up the LUN. */
1392 for (lun = 255; lun; lun--) {
1393 if ((asr = read_aux_stat(regs)) & ASR_INT)
1394 break;
1395 udelay(10);
1396 }
1397 if (!(asr & ASR_INT)) {
1398 printk
1399 ("wd33c93: Reselected without IDENTIFY\n");
1400 lun = 0;
1401 } else {
1402 /* Verify this is a change to MSG_IN and read the message */
1403 sr = read_wd33c93(regs, WD_SCSI_STATUS);
882905c7 1404 udelay(7);
1da177e4
LT
1405 if (sr == (CSR_ABORT | PHS_MESS_IN) ||
1406 sr == (CSR_UNEXP | PHS_MESS_IN) ||
1407 sr == (CSR_SRV_REQ | PHS_MESS_IN)) {
1408 /* Got MSG_IN, grab target LUN */
1409 lun = read_1_byte(regs);
1410 /* Now we expect a 'paused with ACK asserted' int.. */
1411 asr = read_aux_stat(regs);
1412 if (!(asr & ASR_INT)) {
1413 udelay(10);
1414 asr = read_aux_stat(regs);
1415 if (!(asr & ASR_INT))
1416 printk
1417 ("wd33c93: No int after LUN on RESEL (%02x)\n",
1418 asr);
1419 }
1420 sr = read_wd33c93(regs, WD_SCSI_STATUS);
882905c7 1421 udelay(7);
1da177e4
LT
1422 if (sr != CSR_MSGIN)
1423 printk
1424 ("wd33c93: Not paused with ACK on RESEL (%02x)\n",
1425 sr);
1426 lun &= 7;
1427 write_wd33c93_cmd(regs,
1428 WD_CMD_NEGATE_ACK);
1429 } else {
1430 printk
1431 ("wd33c93: Not MSG_IN on reselect (%02x)\n",
1432 sr);
1433 lun = 0;
1434 }
1435 }
1436 }
1437
1438 /* Now we look for the command that's reconnecting. */
1439
1440 cmd = (struct scsi_cmnd *) hostdata->disconnected_Q;
1441 patch = NULL;
1442 while (cmd) {
9cb78c16 1443 if (id == cmd->device->id && lun == (u8)cmd->device->lun)
1da177e4
LT
1444 break;
1445 patch = cmd;
1446 cmd = (struct scsi_cmnd *) cmd->host_scribble;
1447 }
1448
1449 /* Hmm. Couldn't find a valid command.... What to do? */
1450
1451 if (!cmd) {
1452 printk
1453 ("---TROUBLE: target %d.%d not in disconnect queue---",
9cb78c16 1454 id, (u8)lun);
1da177e4
LT
1455 spin_unlock_irqrestore(&hostdata->lock, flags);
1456 return;
1457 }
1458
1459 /* Ok, found the command - now start it up again. */
1460
1461 if (patch)
1462 patch->host_scribble = cmd->host_scribble;
1463 else
1464 hostdata->disconnected_Q =
1465 (struct scsi_cmnd *) cmd->host_scribble;
1466 hostdata->connected = cmd;
1467
1468 /* We don't need to worry about 'initialize_SCp()' or 'hostdata->busy[]'
1469 * because these things are preserved over a disconnect.
1470 * But we DO need to fix the DPD bit so it's correct for this command.
1471 */
1472
1473 if (cmd->sc_data_direction == DMA_TO_DEVICE)
1474 write_wd33c93(regs, WD_DESTINATION_ID, cmd->device->id);
1475 else
1476 write_wd33c93(regs, WD_DESTINATION_ID,
1477 cmd->device->id | DSTID_DPD);
1478 if (hostdata->level2 >= L2_RESELECT) {
1479 write_wd33c93_count(regs, 0); /* we want a DATA_PHASE interrupt */
1480 write_wd33c93(regs, WD_COMMAND_PHASE, 0x45);
1481 write_wd33c93_cmd(regs, WD_CMD_SEL_ATN_XFER);
1482 hostdata->state = S_RUNNING_LEVEL2;
1483 } else
1484 hostdata->state = S_CONNECTED;
1485
1da177e4
LT
1486 spin_unlock_irqrestore(&hostdata->lock, flags);
1487 break;
1488
1489 default:
1490 printk("--UNKNOWN INTERRUPT:%02x:%02x:%02x--", asr, sr, phs);
1491 spin_unlock_irqrestore(&hostdata->lock, flags);
1492 }
1493
1494 DB(DB_INTR, printk("} "))
1495
1496}
1497
1498static void
1499reset_wd33c93(struct Scsi_Host *instance)
1500{
1501 struct WD33C93_hostdata *hostdata =
1502 (struct WD33C93_hostdata *) instance->hostdata;
1503 const wd33c93_regs regs = hostdata->regs;
1504 uchar sr;
1505
1506#ifdef CONFIG_SGI_IP22
1507 {
1508 int busycount = 0;
1509 extern void sgiwd93_reset(unsigned long);
1510 /* wait 'til the chip gets some time for us */
1511 while ((read_aux_stat(regs) & ASR_BSY) && busycount++ < 100)
1512 udelay (10);
1513 /*
1514 * there are scsi devices out there, which manage to lock up
1515 * the wd33c93 in a busy condition. In this state it won't
1516 * accept the reset command. The only way to solve this is to
1517 * give the chip a hardware reset (if possible). The code below
1518 * does this for the SGI Indy, where this is possible
1519 */
1520 /* still busy ? */
1521 if (read_aux_stat(regs) & ASR_BSY)
1522 sgiwd93_reset(instance->base); /* yeah, give it the hard one */
1523 }
1524#endif
1525
1526 write_wd33c93(regs, WD_OWN_ID, OWNID_EAF | OWNID_RAF |
1527 instance->this_id | hostdata->clock_freq);
1528 write_wd33c93(regs, WD_CONTROL, CTRL_IDI | CTRL_EDI | CTRL_POLLED);
1529 write_wd33c93(regs, WD_SYNCHRONOUS_TRANSFER,
1530 calc_sync_xfer(hostdata->default_sx_per / 4,
a5d8421b 1531 DEFAULT_SX_OFF, 0, hostdata->sx_table));
1da177e4
LT
1532 write_wd33c93(regs, WD_COMMAND, WD_CMD_RESET);
1533
1534
1535#ifdef CONFIG_MVME147_SCSI
1536 udelay(25); /* The old wd33c93 on MVME147 needs this, at least */
1537#endif
1538
1539 while (!(read_aux_stat(regs) & ASR_INT))
1540 ;
1541 sr = read_wd33c93(regs, WD_SCSI_STATUS);
1542
1543 hostdata->microcode = read_wd33c93(regs, WD_CDB_1);
1544 if (sr == 0x00)
1545 hostdata->chip = C_WD33C93;
1546 else if (sr == 0x01) {
1547 write_wd33c93(regs, WD_QUEUE_TAG, 0xa5); /* any random number */
1548 sr = read_wd33c93(regs, WD_QUEUE_TAG);
1549 if (sr == 0xa5) {
1550 hostdata->chip = C_WD33C93B;
1551 write_wd33c93(regs, WD_QUEUE_TAG, 0);
1552 } else
1553 hostdata->chip = C_WD33C93A;
1554 } else
1555 hostdata->chip = C_UNKNOWN_CHIP;
1556
a5d8421b 1557 if (hostdata->chip != C_WD33C93B) /* Fast SCSI unavailable */
1558 hostdata->fast = 0;
1559
1da177e4
LT
1560 write_wd33c93(regs, WD_TIMEOUT_PERIOD, TIMEOUT_PERIOD_VALUE);
1561 write_wd33c93(regs, WD_CONTROL, CTRL_IDI | CTRL_EDI | CTRL_POLLED);
1562}
1563
1564int
1565wd33c93_host_reset(struct scsi_cmnd * SCpnt)
1566{
1567 struct Scsi_Host *instance;
1568 struct WD33C93_hostdata *hostdata;
1569 int i;
1570
1571 instance = SCpnt->device->host;
ec05e238 1572 spin_lock_irq(instance->host_lock);
1da177e4
LT
1573 hostdata = (struct WD33C93_hostdata *) instance->hostdata;
1574
1575 printk("scsi%d: reset. ", instance->host_no);
1576 disable_irq(instance->irq);
1577
1578 hostdata->dma_stop(instance, NULL, 0);
1579 for (i = 0; i < 8; i++) {
1580 hostdata->busy[i] = 0;
1581 hostdata->sync_xfer[i] =
a5d8421b 1582 calc_sync_xfer(DEFAULT_SX_PER / 4, DEFAULT_SX_OFF,
1583 0, hostdata->sx_table);
1da177e4
LT
1584 hostdata->sync_stat[i] = SS_UNSET; /* using default sync values */
1585 }
1586 hostdata->input_Q = NULL;
1587 hostdata->selecting = NULL;
1588 hostdata->connected = NULL;
1589 hostdata->disconnected_Q = NULL;
1590 hostdata->state = S_UNCONNECTED;
1591 hostdata->dma = D_DMA_OFF;
1592 hostdata->incoming_ptr = 0;
1593 hostdata->outgoing_len = 0;
1594
1595 reset_wd33c93(instance);
1596 SCpnt->result = DID_RESET << 16;
1597 enable_irq(instance->irq);
ec05e238 1598 spin_unlock_irq(instance->host_lock);
1da177e4
LT
1599 return SUCCESS;
1600}
1601
1602int
1603wd33c93_abort(struct scsi_cmnd * cmd)
1604{
1605 struct Scsi_Host *instance;
1606 struct WD33C93_hostdata *hostdata;
1607 wd33c93_regs regs;
1608 struct scsi_cmnd *tmp, *prev;
1609
1610 disable_irq(cmd->device->host->irq);
1611
1612 instance = cmd->device->host;
1613 hostdata = (struct WD33C93_hostdata *) instance->hostdata;
1614 regs = hostdata->regs;
1615
1616/*
1617 * Case 1 : If the command hasn't been issued yet, we simply remove it
1618 * from the input_Q.
1619 */
1620
1621 tmp = (struct scsi_cmnd *) hostdata->input_Q;
a5d361fc 1622 prev = NULL;
1da177e4
LT
1623 while (tmp) {
1624 if (tmp == cmd) {
1625 if (prev)
1626 prev->host_scribble = cmd->host_scribble;
1627 else
1628 hostdata->input_Q =
1629 (struct scsi_cmnd *) cmd->host_scribble;
1630 cmd->host_scribble = NULL;
1631 cmd->result = DID_ABORT << 16;
1632 printk
5cd049a5
CH
1633 ("scsi%d: Abort - removing command from input_Q. ",
1634 instance->host_no);
1da177e4
LT
1635 enable_irq(cmd->device->host->irq);
1636 cmd->scsi_done(cmd);
1637 return SUCCESS;
1638 }
1639 prev = tmp;
1640 tmp = (struct scsi_cmnd *) tmp->host_scribble;
1641 }
1642
1643/*
1644 * Case 2 : If the command is connected, we're going to fail the abort
1645 * and let the high level SCSI driver retry at a later time or
1646 * issue a reset.
1647 *
1648 * Timeouts, and therefore aborted commands, will be highly unlikely
1649 * and handling them cleanly in this situation would make the common
1650 * case of noresets less efficient, and would pollute our code. So,
1651 * we fail.
1652 */
1653
1654 if (hostdata->connected == cmd) {
1655 uchar sr, asr;
1656 unsigned long timeout;
1657
5cd049a5
CH
1658 printk("scsi%d: Aborting connected command - ",
1659 instance->host_no);
1da177e4
LT
1660
1661 printk("stopping DMA - ");
1662 if (hostdata->dma == D_DMA_RUNNING) {
1663 hostdata->dma_stop(instance, cmd, 0);
1664 hostdata->dma = D_DMA_OFF;
1665 }
1666
1667 printk("sending wd33c93 ABORT command - ");
1668 write_wd33c93(regs, WD_CONTROL,
1669 CTRL_IDI | CTRL_EDI | CTRL_POLLED);
1670 write_wd33c93_cmd(regs, WD_CMD_ABORT);
1671
1672/* Now we have to attempt to flush out the FIFO... */
1673
1674 printk("flushing fifo - ");
1675 timeout = 1000000;
1676 do {
1677 asr = read_aux_stat(regs);
1678 if (asr & ASR_DBR)
1679 read_wd33c93(regs, WD_DATA);
1680 } while (!(asr & ASR_INT) && timeout-- > 0);
1681 sr = read_wd33c93(regs, WD_SCSI_STATUS);
1682 printk
1683 ("asr=%02x, sr=%02x, %ld bytes un-transferred (timeout=%ld) - ",
1684 asr, sr, read_wd33c93_count(regs), timeout);
1685
1686 /*
1687 * Abort command processed.
1688 * Still connected.
1689 * We must disconnect.
1690 */
1691
1692 printk("sending wd33c93 DISCONNECT command - ");
1693 write_wd33c93_cmd(regs, WD_CMD_DISCONNECT);
1694
1695 timeout = 1000000;
1696 asr = read_aux_stat(regs);
1697 while ((asr & ASR_CIP) && timeout-- > 0)
1698 asr = read_aux_stat(regs);
1699 sr = read_wd33c93(regs, WD_SCSI_STATUS);
1700 printk("asr=%02x, sr=%02x.", asr, sr);
1701
9cb78c16 1702 hostdata->busy[cmd->device->id] &= ~(1 << (cmd->device->lun & 0xff));
1da177e4
LT
1703 hostdata->connected = NULL;
1704 hostdata->state = S_UNCONNECTED;
1705 cmd->result = DID_ABORT << 16;
1706
1707/* sti();*/
1708 wd33c93_execute(instance);
1709
1710 enable_irq(cmd->device->host->irq);
1711 cmd->scsi_done(cmd);
1712 return SUCCESS;
1713 }
1714
1715/*
1716 * Case 3: If the command is currently disconnected from the bus,
1717 * we're not going to expend much effort here: Let's just return
1718 * an ABORT_SNOOZE and hope for the best...
1719 */
1720
1721 tmp = (struct scsi_cmnd *) hostdata->disconnected_Q;
1722 while (tmp) {
1723 if (tmp == cmd) {
1724 printk
5cd049a5
CH
1725 ("scsi%d: Abort - command found on disconnected_Q - ",
1726 instance->host_no);
1da177e4
LT
1727 printk("Abort SNOOZE. ");
1728 enable_irq(cmd->device->host->irq);
1729 return FAILED;
1730 }
1731 tmp = (struct scsi_cmnd *) tmp->host_scribble;
1732 }
1733
1734/*
1735 * Case 4 : If we reached this point, the command was not found in any of
1736 * the queues.
1737 *
1738 * We probably reached this point because of an unlikely race condition
1739 * between the command completing successfully and the abortion code,
1740 * so we won't panic, but we will notify the user in case something really
1741 * broke.
1742 */
1743
1744/* sti();*/
1745 wd33c93_execute(instance);
1746
1747 enable_irq(cmd->device->host->irq);
1748 printk("scsi%d: warning : SCSI command probably completed successfully"
1749 " before abortion. ", instance->host_no);
1750 return FAILED;
1751}
1752
1753#define MAX_WD33C93_HOSTS 4
6391a113 1754#define MAX_SETUP_ARGS ARRAY_SIZE(setup_args)
1da177e4
LT
1755#define SETUP_BUFFER_SIZE 200
1756static char setup_buffer[SETUP_BUFFER_SIZE];
1757static char setup_used[MAX_SETUP_ARGS];
1758static int done_setup = 0;
1759
078dda95 1760static int
1da177e4
LT
1761wd33c93_setup(char *str)
1762{
1763 int i;
1764 char *p1, *p2;
1765
1766 /* The kernel does some processing of the command-line before calling
1767 * this function: If it begins with any decimal or hex number arguments,
1768 * ints[0] = how many numbers found and ints[1] through [n] are the values
1769 * themselves. str points to where the non-numeric arguments (if any)
1770 * start: We do our own parsing of those. We construct synthetic 'nosync'
1771 * keywords out of numeric args (to maintain compatibility with older
1772 * versions) and then add the rest of the arguments.
1773 */
1774
1775 p1 = setup_buffer;
1776 *p1 = '\0';
1777 if (str)
1778 strncpy(p1, str, SETUP_BUFFER_SIZE - strlen(setup_buffer));
1779 setup_buffer[SETUP_BUFFER_SIZE - 1] = '\0';
1780 p1 = setup_buffer;
1781 i = 0;
1782 while (*p1 && (i < MAX_SETUP_ARGS)) {
1783 p2 = strchr(p1, ',');
1784 if (p2) {
1785 *p2 = '\0';
1786 if (p1 != p2)
1787 setup_args[i] = p1;
1788 p1 = p2 + 1;
1789 i++;
1790 } else {
1791 setup_args[i] = p1;
1792 break;
1793 }
1794 }
1795 for (i = 0; i < MAX_SETUP_ARGS; i++)
1796 setup_used[i] = 0;
1797 done_setup = 1;
1798
1799 return 1;
1800}
1801__setup("wd33c93=", wd33c93_setup);
1802
1803/* check_setup_args() returns index if key found, 0 if not
1804 */
1805static int
1806check_setup_args(char *key, int *flags, int *val, char *buf)
1807{
1808 int x;
1809 char *cp;
1810
1811 for (x = 0; x < MAX_SETUP_ARGS; x++) {
1812 if (setup_used[x])
1813 continue;
1814 if (!strncmp(setup_args[x], key, strlen(key)))
1815 break;
1816 if (!strncmp(setup_args[x], "next", strlen("next")))
1817 return 0;
1818 }
1819 if (x == MAX_SETUP_ARGS)
1820 return 0;
1821 setup_used[x] = 1;
1822 cp = setup_args[x] + strlen(key);
1823 *val = -1;
1824 if (*cp != ':')
1825 return ++x;
1826 cp++;
1827 if ((*cp >= '0') && (*cp <= '9')) {
1828 *val = simple_strtoul(cp, NULL, 0);
1829 }
1830 return ++x;
1831}
1832
a5d8421b 1833/*
1834 * Calculate internal data-transfer-clock cycle from input-clock
1835 * frequency (/MHz) and fill 'sx_table'.
1836 *
1837 * The original driver used to rely on a fixed sx_table, containing periods
1838 * for (only) the lower limits of the respective input-clock-frequency ranges
25985edc 1839 * (8-10/12-15/16-20 MHz). Although it seems, that no problems occurred with
a5d8421b 1840 * this setting so far, it might be desirable to adjust the transfer periods
1841 * closer to the really attached, possibly 25% higher, input-clock, since
1842 * - the wd33c93 may really use a significant shorter period, than it has
1843 * negotiated (eg. thrashing the target, which expects 4/8MHz, with 5/10MHz
1844 * instead).
1845 * - the wd33c93 may ask the target for a lower transfer rate, than the target
1846 * is capable of (eg. negotiating for an assumed minimum of 252ns instead of
1847 * possible 200ns, which indeed shows up in tests as an approx. 10% lower
1848 * transfer rate).
1849 */
1850static inline unsigned int
1851round_4(unsigned int x)
1852{
1853 switch (x & 3) {
1854 case 1: --x;
1855 break;
1856 case 2: ++x;
1857 case 3: ++x;
1858 }
1859 return x;
1860}
1861
1862static void
1863calc_sx_table(unsigned int mhz, struct sx_period sx_table[9])
1864{
1865 unsigned int d, i;
1866 if (mhz < 11)
1867 d = 2; /* divisor for 8-10 MHz input-clock */
1868 else if (mhz < 16)
1869 d = 3; /* divisor for 12-15 MHz input-clock */
1870 else
1871 d = 4; /* divisor for 16-20 MHz input-clock */
1872
1873 d = (100000 * d) / 2 / mhz; /* 100 x DTCC / nanosec */
1874
1875 sx_table[0].period_ns = 1;
1876 sx_table[0].reg_value = 0x20;
1877 for (i = 1; i < 8; i++) {
1878 sx_table[i].period_ns = round_4((i+1)*d / 100);
1879 sx_table[i].reg_value = (i+1)*0x10;
1880 }
1881 sx_table[7].reg_value = 0;
1882 sx_table[8].period_ns = 0;
1883 sx_table[8].reg_value = 0;
1884}
1885
1886/*
1887 * check and, maybe, map an init- or "clock:"- argument.
1888 */
1889static uchar
1890set_clk_freq(int freq, int *mhz)
1891{
1892 int x = freq;
1893 if (WD33C93_FS_8_10 == freq)
1894 freq = 8;
1895 else if (WD33C93_FS_12_15 == freq)
1896 freq = 12;
1897 else if (WD33C93_FS_16_20 == freq)
1898 freq = 16;
1899 else if (freq > 7 && freq < 11)
1900 x = WD33C93_FS_8_10;
1901 else if (freq > 11 && freq < 16)
1902 x = WD33C93_FS_12_15;
1903 else if (freq > 15 && freq < 21)
1904 x = WD33C93_FS_16_20;
1905 else {
1906 /* Hmm, wouldn't it be safer to assume highest freq here? */
1907 x = WD33C93_FS_8_10;
1908 freq = 8;
1909 }
1910 *mhz = freq;
1911 return x;
1912}
1913
1914/*
1915 * to be used with the resync: fast: ... options
1916 */
1917static inline void set_resync ( struct WD33C93_hostdata *hd, int mask )
1918{
1919 int i;
1920 for (i = 0; i < 8; i++)
1921 if (mask & (1 << i))
1922 hd->sync_stat[i] = SS_UNSET;
1923}
1924
1da177e4
LT
1925void
1926wd33c93_init(struct Scsi_Host *instance, const wd33c93_regs regs,
1927 dma_setup_t setup, dma_stop_t stop, int clock_freq)
1928{
1929 struct WD33C93_hostdata *hostdata;
1930 int i;
1931 int flags;
1932 int val;
1933 char buf[32];
1934
1935 if (!done_setup && setup_strings)
1936 wd33c93_setup(setup_strings);
1937
1938 hostdata = (struct WD33C93_hostdata *) instance->hostdata;
1939
1940 hostdata->regs = regs;
a5d8421b 1941 hostdata->clock_freq = set_clk_freq(clock_freq, &i);
1942 calc_sx_table(i, hostdata->sx_table);
1da177e4
LT
1943 hostdata->dma_setup = setup;
1944 hostdata->dma_stop = stop;
1945 hostdata->dma_bounce_buffer = NULL;
1946 hostdata->dma_bounce_len = 0;
1947 for (i = 0; i < 8; i++) {
1948 hostdata->busy[i] = 0;
1949 hostdata->sync_xfer[i] =
a5d8421b 1950 calc_sync_xfer(DEFAULT_SX_PER / 4, DEFAULT_SX_OFF,
1951 0, hostdata->sx_table);
1da177e4
LT
1952 hostdata->sync_stat[i] = SS_UNSET; /* using default sync values */
1953#ifdef PROC_STATISTICS
1954 hostdata->cmd_cnt[i] = 0;
1955 hostdata->disc_allowed_cnt[i] = 0;
1956 hostdata->disc_done_cnt[i] = 0;
1957#endif
1958 }
1959 hostdata->input_Q = NULL;
1960 hostdata->selecting = NULL;
1961 hostdata->connected = NULL;
1962 hostdata->disconnected_Q = NULL;
1963 hostdata->state = S_UNCONNECTED;
1964 hostdata->dma = D_DMA_OFF;
1965 hostdata->level2 = L2_BASIC;
1966 hostdata->disconnect = DIS_ADAPTIVE;
1967 hostdata->args = DEBUG_DEFAULTS;
1968 hostdata->incoming_ptr = 0;
1969 hostdata->outgoing_len = 0;
1970 hostdata->default_sx_per = DEFAULT_SX_PER;
1da177e4
LT
1971 hostdata->no_dma = 0; /* default is DMA enabled */
1972
1973#ifdef PROC_INTERFACE
1974 hostdata->proc = PR_VERSION | PR_INFO | PR_STATISTICS |
1975 PR_CONNECTED | PR_INPUTQ | PR_DISCQ | PR_STOP;
1976#ifdef PROC_STATISTICS
1977 hostdata->dma_cnt = 0;
1978 hostdata->pio_cnt = 0;
1979 hostdata->int_cnt = 0;
1980#endif
1981#endif
1982
a5d8421b 1983 if (check_setup_args("clock", &flags, &val, buf)) {
1984 hostdata->clock_freq = set_clk_freq(val, &val);
1985 calc_sx_table(val, hostdata->sx_table);
1986 }
1987
1da177e4
LT
1988 if (check_setup_args("nosync", &flags, &val, buf))
1989 hostdata->no_sync = val;
1990
1991 if (check_setup_args("nodma", &flags, &val, buf))
1992 hostdata->no_dma = (val == -1) ? 1 : val;
1993
1994 if (check_setup_args("period", &flags, &val, buf))
1995 hostdata->default_sx_per =
a5d8421b 1996 hostdata->sx_table[round_period((unsigned int) val,
1997 hostdata->sx_table)].period_ns;
1da177e4
LT
1998
1999 if (check_setup_args("disconnect", &flags, &val, buf)) {
2000 if ((val >= DIS_NEVER) && (val <= DIS_ALWAYS))
2001 hostdata->disconnect = val;
2002 else
2003 hostdata->disconnect = DIS_ADAPTIVE;
2004 }
2005
2006 if (check_setup_args("level2", &flags, &val, buf))
2007 hostdata->level2 = val;
2008
2009 if (check_setup_args("debug", &flags, &val, buf))
2010 hostdata->args = val & DB_MASK;
2011
a5d8421b 2012 if (check_setup_args("burst", &flags, &val, buf))
2013 hostdata->dma_mode = val ? CTRL_BURST:CTRL_DMA;
2014
2015 if (WD33C93_FS_16_20 == hostdata->clock_freq /* divisor 4 */
2016 && check_setup_args("fast", &flags, &val, buf))
2017 hostdata->fast = !!val;
1da177e4
LT
2018
2019 if ((i = check_setup_args("next", &flags, &val, buf))) {
2020 while (i)
2021 setup_used[--i] = 1;
2022 }
2023#ifdef PROC_INTERFACE
2024 if (check_setup_args("proc", &flags, &val, buf))
2025 hostdata->proc = val;
2026#endif
2027
2028 spin_lock_irq(&hostdata->lock);
2029 reset_wd33c93(instance);
2030 spin_unlock_irq(&hostdata->lock);
2031
2032 printk("wd33c93-%d: chip=%s/%d no_sync=0x%x no_dma=%d",
2033 instance->host_no,
2034 (hostdata->chip == C_WD33C93) ? "WD33c93" : (hostdata->chip ==
2035 C_WD33C93A) ?
2036 "WD33c93A" : (hostdata->chip ==
2037 C_WD33C93B) ? "WD33c93B" : "unknown",
2038 hostdata->microcode, hostdata->no_sync, hostdata->no_dma);
2039#ifdef DEBUGGING_ON
2040 printk(" debug_flags=0x%02x\n", hostdata->args);
2041#else
2042 printk(" debugging=OFF\n");
2043#endif
2044 printk(" setup_args=");
2045 for (i = 0; i < MAX_SETUP_ARGS; i++)
2046 printk("%s,", setup_args[i]);
2047 printk("\n");
565502f8 2048 printk(" Version %s - %s\n", WD33C93_VERSION, WD33C93_DATE);
1da177e4
LT
2049}
2050
408bb25b 2051int wd33c93_write_info(struct Scsi_Host *instance, char *buf, int len)
1da177e4 2052{
1da177e4 2053#ifdef PROC_INTERFACE
1da177e4 2054 char *bp;
1da177e4 2055 struct WD33C93_hostdata *hd;
a5d8421b 2056 int x;
1da177e4
LT
2057
2058 hd = (struct WD33C93_hostdata *) instance->hostdata;
2059
408bb25b 2060/* We accept the following
a5d8421b 2061 * keywords (same format as command-line, but arguments are not optional):
1da177e4
LT
2062 * debug
2063 * disconnect
2064 * period
2065 * resync
2066 * proc
2067 * nodma
a5d8421b 2068 * level2
2069 * burst
2070 * fast
2071 * nosync
1da177e4
LT
2072 */
2073
408bb25b
AV
2074 buf[len] = '\0';
2075 for (bp = buf; *bp; ) {
2076 while (',' == *bp || ' ' == *bp)
2077 ++bp;
2078 if (!strncmp(bp, "debug:", 6)) {
2079 hd->args = simple_strtoul(bp+6, &bp, 0) & DB_MASK;
2080 } else if (!strncmp(bp, "disconnect:", 11)) {
2081 x = simple_strtoul(bp+11, &bp, 0);
2082 if (x < DIS_NEVER || x > DIS_ALWAYS)
2083 x = DIS_ADAPTIVE;
2084 hd->disconnect = x;
2085 } else if (!strncmp(bp, "period:", 7)) {
2086 x = simple_strtoul(bp+7, &bp, 0);
2087 hd->default_sx_per =
2088 hd->sx_table[round_period((unsigned int) x,
2089 hd->sx_table)].period_ns;
2090 } else if (!strncmp(bp, "resync:", 7)) {
2091 set_resync(hd, (int)simple_strtoul(bp+7, &bp, 0));
2092 } else if (!strncmp(bp, "proc:", 5)) {
2093 hd->proc = simple_strtoul(bp+5, &bp, 0);
2094 } else if (!strncmp(bp, "nodma:", 6)) {
2095 hd->no_dma = simple_strtoul(bp+6, &bp, 0);
2096 } else if (!strncmp(bp, "level2:", 7)) {
2097 hd->level2 = simple_strtoul(bp+7, &bp, 0);
2098 } else if (!strncmp(bp, "burst:", 6)) {
2099 hd->dma_mode =
2100 simple_strtol(bp+6, &bp, 0) ? CTRL_BURST:CTRL_DMA;
2101 } else if (!strncmp(bp, "fast:", 5)) {
2102 x = !!simple_strtol(bp+5, &bp, 0);
2103 if (x != hd->fast)
2104 set_resync(hd, 0xff);
2105 hd->fast = x;
2106 } else if (!strncmp(bp, "nosync:", 7)) {
a5d8421b 2107 x = simple_strtoul(bp+7, &bp, 0);
408bb25b
AV
2108 set_resync(hd, x ^ hd->no_sync);
2109 hd->no_sync = x;
2110 } else {
2111 break; /* unknown keyword,syntax-error,... */
1da177e4 2112 }
1da177e4 2113 }
408bb25b
AV
2114 return len;
2115#else
2116 return 0;
2117#endif
2118}
2119
2120int
2121wd33c93_show_info(struct seq_file *m, struct Scsi_Host *instance)
2122{
2123#ifdef PROC_INTERFACE
2124 struct WD33C93_hostdata *hd;
2125 struct scsi_cmnd *cmd;
2126 int x;
2127
2128 hd = (struct WD33C93_hostdata *) instance->hostdata;
1da177e4
LT
2129
2130 spin_lock_irq(&hd->lock);
408bb25b
AV
2131 if (hd->proc & PR_VERSION)
2132 seq_printf(m, "\nVersion %s - %s.",
565502f8 2133 WD33C93_VERSION, WD33C93_DATE);
408bb25b 2134
1da177e4 2135 if (hd->proc & PR_INFO) {
408bb25b 2136 seq_printf(m, "\nclock_freq=%02x no_sync=%02x no_dma=%d"
a5d8421b 2137 " dma_mode=%02x fast=%d",
2138 hd->clock_freq, hd->no_sync, hd->no_dma, hd->dma_mode, hd->fast);
91c40f24 2139 seq_puts(m, "\nsync_xfer[] = ");
408bb25b
AV
2140 for (x = 0; x < 7; x++)
2141 seq_printf(m, "\t%02x", hd->sync_xfer[x]);
91c40f24 2142 seq_puts(m, "\nsync_stat[] = ");
408bb25b
AV
2143 for (x = 0; x < 7; x++)
2144 seq_printf(m, "\t%02x", hd->sync_stat[x]);
1da177e4
LT
2145 }
2146#ifdef PROC_STATISTICS
2147 if (hd->proc & PR_STATISTICS) {
91c40f24 2148 seq_puts(m, "\ncommands issued: ");
408bb25b
AV
2149 for (x = 0; x < 7; x++)
2150 seq_printf(m, "\t%ld", hd->cmd_cnt[x]);
91c40f24 2151 seq_puts(m, "\ndisconnects allowed:");
408bb25b
AV
2152 for (x = 0; x < 7; x++)
2153 seq_printf(m, "\t%ld", hd->disc_allowed_cnt[x]);
91c40f24 2154 seq_puts(m, "\ndisconnects done: ");
408bb25b
AV
2155 for (x = 0; x < 7; x++)
2156 seq_printf(m, "\t%ld", hd->disc_done_cnt[x]);
2157 seq_printf(m,
1da177e4
LT
2158 "\ninterrupts: %ld, DATA_PHASE ints: %ld DMA, %ld PIO",
2159 hd->int_cnt, hd->dma_cnt, hd->pio_cnt);
1da177e4
LT
2160 }
2161#endif
2162 if (hd->proc & PR_CONNECTED) {
91c40f24 2163 seq_puts(m, "\nconnected: ");
1da177e4
LT
2164 if (hd->connected) {
2165 cmd = (struct scsi_cmnd *) hd->connected;
9cb78c16 2166 seq_printf(m, " %d:%llu(%02x)",
5cd049a5 2167 cmd->device->id, cmd->device->lun, cmd->cmnd[0]);
1da177e4
LT
2168 }
2169 }
2170 if (hd->proc & PR_INPUTQ) {
91c40f24 2171 seq_puts(m, "\ninput_Q: ");
1da177e4
LT
2172 cmd = (struct scsi_cmnd *) hd->input_Q;
2173 while (cmd) {
9cb78c16 2174 seq_printf(m, " %d:%llu(%02x)",
5cd049a5 2175 cmd->device->id, cmd->device->lun, cmd->cmnd[0]);
1da177e4
LT
2176 cmd = (struct scsi_cmnd *) cmd->host_scribble;
2177 }
2178 }
2179 if (hd->proc & PR_DISCQ) {
91c40f24 2180 seq_puts(m, "\ndisconnected_Q:");
1da177e4
LT
2181 cmd = (struct scsi_cmnd *) hd->disconnected_Q;
2182 while (cmd) {
9cb78c16 2183 seq_printf(m, " %d:%llu(%02x)",
5cd049a5 2184 cmd->device->id, cmd->device->lun, cmd->cmnd[0]);
1da177e4
LT
2185 cmd = (struct scsi_cmnd *) cmd->host_scribble;
2186 }
2187 }
f50332ff 2188 seq_putc(m, '\n');
1da177e4 2189 spin_unlock_irq(&hd->lock);
1da177e4 2190#endif /* PROC_INTERFACE */
408bb25b 2191 return 0;
1da177e4
LT
2192}
2193
1da177e4
LT
2194EXPORT_SYMBOL(wd33c93_host_reset);
2195EXPORT_SYMBOL(wd33c93_init);
1da177e4
LT
2196EXPORT_SYMBOL(wd33c93_abort);
2197EXPORT_SYMBOL(wd33c93_queuecommand);
2198EXPORT_SYMBOL(wd33c93_intr);
408bb25b
AV
2199EXPORT_SYMBOL(wd33c93_show_info);
2200EXPORT_SYMBOL(wd33c93_write_info);