scsi: ufs: Fix ufshcd_probe_hba() reture value in case ufshcd_scsi_add_wlus() fails
[linux-block.git] / drivers / scsi / ufs / ufshcd.h
CommitLineData
e0eca63e
VH
1/*
2 * Universal Flash Storage Host controller driver
3 *
4 * This code is based on drivers/scsi/ufs/ufshcd.h
5 * Copyright (C) 2011-2013 Samsung India Software Operations
dc3c8d3a 6 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
e0eca63e
VH
7 *
8 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
35 */
36
37#ifndef _UFSHCD_H
38#define _UFSHCD_H
39
40#include <linux/module.h>
41#include <linux/kernel.h>
42#include <linux/init.h>
43#include <linux/interrupt.h>
44#include <linux/io.h>
45#include <linux/delay.h>
46#include <linux/slab.h>
47#include <linux/spinlock.h>
a3cd5ec5 48#include <linux/rwsem.h>
e0eca63e
VH
49#include <linux/workqueue.h>
50#include <linux/errno.h>
51#include <linux/types.h>
52#include <linux/wait.h>
53#include <linux/bitops.h>
54#include <linux/pm_runtime.h>
55#include <linux/clk.h>
6ccf44fe 56#include <linux/completion.h>
aa497613 57#include <linux/regulator/consumer.h>
f37aabcf 58#include "unipro.h"
e0eca63e
VH
59
60#include <asm/irq.h>
61#include <asm/byteorder.h>
62#include <scsi/scsi.h>
63#include <scsi/scsi_cmnd.h>
64#include <scsi/scsi_host.h>
65#include <scsi/scsi_tcq.h>
66#include <scsi/scsi_dbg.h>
67#include <scsi/scsi_eh.h>
68
69#include "ufs.h"
70#include "ufshci.h"
71
72#define UFSHCD "ufshcd"
73#define UFSHCD_DRIVER_VERSION "0.2"
74
5c0c28a8
SRT
75struct ufs_hba;
76
5a0b0cb9
SRT
77enum dev_cmd_type {
78 DEV_CMD_TYPE_NOP = 0x0,
68078d5c 79 DEV_CMD_TYPE_QUERY = 0x1,
5a0b0cb9
SRT
80};
81
e0eca63e
VH
82/**
83 * struct uic_command - UIC command structure
84 * @command: UIC command
85 * @argument1: UIC command argument 1
86 * @argument2: UIC command argument 2
87 * @argument3: UIC command argument 3
88 * @cmd_active: Indicate if UIC command is outstanding
89 * @result: UIC command result
6ccf44fe 90 * @done: UIC command completion
e0eca63e
VH
91 */
92struct uic_command {
93 u32 command;
94 u32 argument1;
95 u32 argument2;
96 u32 argument3;
97 int cmd_active;
98 int result;
6ccf44fe 99 struct completion done;
e0eca63e
VH
100};
101
57d104c1
SJ
102/* Used to differentiate the power management options */
103enum ufs_pm_op {
104 UFS_RUNTIME_PM,
105 UFS_SYSTEM_PM,
106 UFS_SHUTDOWN_PM,
107};
108
109#define ufshcd_is_runtime_pm(op) ((op) == UFS_RUNTIME_PM)
110#define ufshcd_is_system_pm(op) ((op) == UFS_SYSTEM_PM)
111#define ufshcd_is_shutdown_pm(op) ((op) == UFS_SHUTDOWN_PM)
112
113/* Host <-> Device UniPro Link state */
114enum uic_link_state {
115 UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
116 UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
117 UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
118};
119
120#define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
121#define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
122 UIC_LINK_ACTIVE_STATE)
123#define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
124 UIC_LINK_HIBERN8_STATE)
125#define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
126#define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
127 UIC_LINK_ACTIVE_STATE)
128#define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
129 UIC_LINK_HIBERN8_STATE)
130
131/*
132 * UFS Power management levels.
133 * Each level is in increasing order of power savings.
134 */
135enum ufs_pm_level {
136 UFS_PM_LVL_0, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE */
137 UFS_PM_LVL_1, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE */
138 UFS_PM_LVL_2, /* UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE */
139 UFS_PM_LVL_3, /* UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE */
140 UFS_PM_LVL_4, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE */
141 UFS_PM_LVL_5, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE */
142 UFS_PM_LVL_MAX
143};
144
145struct ufs_pm_lvl_states {
146 enum ufs_dev_pwr_mode dev_state;
147 enum uic_link_state link_state;
148};
149
e0eca63e
VH
150/**
151 * struct ufshcd_lrb - local reference block
152 * @utr_descriptor_ptr: UTRD address of the command
5a0b0cb9 153 * @ucd_req_ptr: UCD address of the command
e0eca63e
VH
154 * @ucd_rsp_ptr: Response UPIU address for this command
155 * @ucd_prdt_ptr: PRDT address of the command
ff8e20c6
DR
156 * @utrd_dma_addr: UTRD dma address for debug
157 * @ucd_prdt_dma_addr: PRDT dma address for debug
158 * @ucd_rsp_dma_addr: UPIU response dma address for debug
159 * @ucd_req_dma_addr: UPIU request dma address for debug
e0eca63e
VH
160 * @cmd: pointer to SCSI command
161 * @sense_buffer: pointer to sense buffer address of the SCSI command
162 * @sense_bufflen: Length of the sense buffer
163 * @scsi_status: SCSI status of the command
164 * @command_type: SCSI, UFS, Query.
165 * @task_tag: Task tag of the command
166 * @lun: LUN of the command
5a0b0cb9 167 * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
ff8e20c6 168 * @issue_time_stamp: time stamp for debug purposes
09017188 169 * @compl_time_stamp: time stamp for statistics
e0b299e3 170 * @req_abort_skip: skip request abort task flag
e0eca63e
VH
171 */
172struct ufshcd_lrb {
173 struct utp_transfer_req_desc *utr_descriptor_ptr;
5a0b0cb9 174 struct utp_upiu_req *ucd_req_ptr;
e0eca63e
VH
175 struct utp_upiu_rsp *ucd_rsp_ptr;
176 struct ufshcd_sg_entry *ucd_prdt_ptr;
177
ff8e20c6
DR
178 dma_addr_t utrd_dma_addr;
179 dma_addr_t ucd_req_dma_addr;
180 dma_addr_t ucd_rsp_dma_addr;
181 dma_addr_t ucd_prdt_dma_addr;
182
e0eca63e
VH
183 struct scsi_cmnd *cmd;
184 u8 *sense_buffer;
185 unsigned int sense_bufflen;
186 int scsi_status;
187
188 int command_type;
189 int task_tag;
0ce147d4 190 u8 lun; /* UPIU LUN id field is only 8-bit wide */
5a0b0cb9 191 bool intr_cmd;
ff8e20c6 192 ktime_t issue_time_stamp;
09017188 193 ktime_t compl_time_stamp;
e0b299e3
GB
194
195 bool req_abort_skip;
e0eca63e
VH
196};
197
68078d5c 198/**
a230c2f6 199 * struct ufs_query - holds relevant data structures for query request
68078d5c
DR
200 * @request: request upiu and function
201 * @descriptor: buffer for sending/receiving descriptor
202 * @response: response upiu and response
203 */
204struct ufs_query {
205 struct ufs_query_req request;
206 u8 *descriptor;
207 struct ufs_query_res response;
208};
209
5a0b0cb9
SRT
210/**
211 * struct ufs_dev_cmd - all assosiated fields with device management commands
212 * @type: device management command type - Query, NOP OUT
213 * @lock: lock to allow one command at a time
214 * @complete: internal commands completion
5a0b0cb9
SRT
215 */
216struct ufs_dev_cmd {
217 enum dev_cmd_type type;
218 struct mutex lock;
219 struct completion *complete;
68078d5c 220 struct ufs_query query;
5a0b0cb9 221};
e0eca63e 222
a4b0e8a4
PM
223struct ufs_desc_size {
224 int dev_desc;
225 int pwr_desc;
226 int geom_desc;
227 int interc_desc;
228 int unit_desc;
229 int conf_desc;
c648c2d2 230 int hlth_desc;
a4b0e8a4
PM
231};
232
c6e79dac
SRT
233/**
234 * struct ufs_clk_info - UFS clock related info
235 * @list: list headed by hba->clk_list_head
236 * @clk: clock node
237 * @name: clock name
238 * @max_freq: maximum frequency supported by the clock
4cff6d99 239 * @min_freq: min frequency that can be used for clock scaling
856b3483 240 * @curr_freq: indicates the current frequency that it is set to
c6e79dac
SRT
241 * @enabled: variable to check against multiple enable/disable
242 */
243struct ufs_clk_info {
244 struct list_head list;
245 struct clk *clk;
246 const char *name;
247 u32 max_freq;
4cff6d99 248 u32 min_freq;
856b3483 249 u32 curr_freq;
c6e79dac
SRT
250 bool enabled;
251};
252
f06fcc71
YG
253enum ufs_notify_change_status {
254 PRE_CHANGE,
255 POST_CHANGE,
256};
7eb584db
DR
257
258struct ufs_pa_layer_attr {
259 u32 gear_rx;
260 u32 gear_tx;
261 u32 lane_rx;
262 u32 lane_tx;
263 u32 pwr_rx;
264 u32 pwr_tx;
265 u32 hs_rate;
266};
267
268struct ufs_pwr_mode_info {
269 bool is_valid;
270 struct ufs_pa_layer_attr info;
271};
272
5c0c28a8
SRT
273/**
274 * struct ufs_hba_variant_ops - variant specific callbacks
275 * @name: variant name
276 * @init: called when the driver is initialized
277 * @exit: called to cleanup everything done in init
9949e702 278 * @get_ufs_hci_version: called to get UFS HCI version
856b3483 279 * @clk_scale_notify: notifies that clks are scaled up/down
5c0c28a8
SRT
280 * @setup_clocks: called before touching any of the controller registers
281 * @setup_regulators: called before accessing the host controller
282 * @hce_enable_notify: called before and after HCE enable bit is set to allow
283 * variant specific Uni-Pro initialization.
284 * @link_startup_notify: called before and after Link startup is carried out
285 * to allow variant specific Uni-Pro initialization.
7eb584db
DR
286 * @pwr_change_notify: called before and after a power mode change
287 * is carried out to allow vendor spesific capabilities
288 * to be set.
0e675efa
KK
289 * @setup_xfer_req: called before any transfer request is issued
290 * to set some things
d2877be4
KK
291 * @setup_task_mgmt: called before any task management request is issued
292 * to set some things
ee32c909 293 * @hibern8_notify: called around hibern8 enter/exit
56d4a186 294 * @apply_dev_quirks: called to apply device specific quirks
57d104c1
SJ
295 * @suspend: called during host controller PM callback
296 * @resume: called during host controller PM callback
6e3fd44d 297 * @dbg_register_dump: used to dump controller debug information
4b9ffb5a 298 * @phy_initialization: used to initialize phys
d8d9f793 299 * @device_reset: called to issue a reset pulse on the UFS device
5c0c28a8
SRT
300 */
301struct ufs_hba_variant_ops {
302 const char *name;
303 int (*init)(struct ufs_hba *);
304 void (*exit)(struct ufs_hba *);
9949e702 305 u32 (*get_ufs_hci_version)(struct ufs_hba *);
f06fcc71
YG
306 int (*clk_scale_notify)(struct ufs_hba *, bool,
307 enum ufs_notify_change_status);
1e879e8f
SJ
308 int (*setup_clocks)(struct ufs_hba *, bool,
309 enum ufs_notify_change_status);
5c0c28a8 310 int (*setup_regulators)(struct ufs_hba *, bool);
f06fcc71
YG
311 int (*hce_enable_notify)(struct ufs_hba *,
312 enum ufs_notify_change_status);
313 int (*link_startup_notify)(struct ufs_hba *,
314 enum ufs_notify_change_status);
7eb584db 315 int (*pwr_change_notify)(struct ufs_hba *,
f06fcc71
YG
316 enum ufs_notify_change_status status,
317 struct ufs_pa_layer_attr *,
7eb584db 318 struct ufs_pa_layer_attr *);
0e675efa 319 void (*setup_xfer_req)(struct ufs_hba *, int, bool);
d2877be4 320 void (*setup_task_mgmt)(struct ufs_hba *, int, u8);
ee32c909 321 void (*hibern8_notify)(struct ufs_hba *, enum uic_cmd_dme,
56d4a186 322 enum ufs_notify_change_status);
c40ad6b7 323 int (*apply_dev_quirks)(struct ufs_hba *, struct ufs_dev_desc *);
57d104c1
SJ
324 int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
325 int (*resume)(struct ufs_hba *, enum ufs_pm_op);
6e3fd44d 326 void (*dbg_register_dump)(struct ufs_hba *hba);
4b9ffb5a 327 int (*phy_initialization)(struct ufs_hba *);
d8d9f793 328 void (*device_reset)(struct ufs_hba *hba);
5c0c28a8
SRT
329};
330
1ab27c9c
ST
331/* clock gating state */
332enum clk_gating_state {
333 CLKS_OFF,
334 CLKS_ON,
335 REQ_CLKS_OFF,
336 REQ_CLKS_ON,
337};
338
339/**
340 * struct ufs_clk_gating - UFS clock gating related info
341 * @gate_work: worker to turn off clocks after some delay as specified in
342 * delay_ms
343 * @ungate_work: worker to turn on clocks that will be used in case of
344 * interrupt context
345 * @state: the current clocks state
346 * @delay_ms: gating delay in ms
347 * @is_suspended: clk gating is suspended when set to 1 which can be used
348 * during suspend/resume
349 * @delay_attr: sysfs attribute to control delay_attr
b427411a
ST
350 * @enable_attr: sysfs attribute to enable/disable clock gating
351 * @is_enabled: Indicates the current status of clock gating
1ab27c9c
ST
352 * @active_reqs: number of requests that are pending and should be waited for
353 * completion before gating clocks.
354 */
355struct ufs_clk_gating {
356 struct delayed_work gate_work;
357 struct work_struct ungate_work;
358 enum clk_gating_state state;
359 unsigned long delay_ms;
360 bool is_suspended;
361 struct device_attribute delay_attr;
b427411a
ST
362 struct device_attribute enable_attr;
363 bool is_enabled;
1ab27c9c 364 int active_reqs;
10e5e375 365 struct workqueue_struct *clk_gating_workq;
1ab27c9c
ST
366};
367
a3cd5ec5 368struct ufs_saved_pwr_info {
369 struct ufs_pa_layer_attr info;
370 bool is_valid;
371};
372
401f1e44 373/**
374 * struct ufs_clk_scaling - UFS clock scaling related data
375 * @active_reqs: number of requests that are pending. If this is zero when
376 * devfreq ->target() function is called then schedule "suspend_work" to
377 * suspend devfreq.
378 * @tot_busy_t: Total busy time in current polling window
379 * @window_start_t: Start time (in jiffies) of the current polling window
380 * @busy_start_t: Start time of current busy period
381 * @enable_attr: sysfs attribute to enable/disable clock scaling
382 * @saved_pwr_info: UFS power mode may also be changed during scaling and this
383 * one keeps track of previous power mode.
384 * @workq: workqueue to schedule devfreq suspend/resume work
385 * @suspend_work: worker to suspend devfreq
386 * @resume_work: worker to resume devfreq
387 * @is_allowed: tracks if scaling is currently allowed or not
388 * @is_busy_started: tracks if busy period has started or not
389 * @is_suspended: tracks if devfreq is suspended or not
390 */
856b3483 391struct ufs_clk_scaling {
401f1e44 392 int active_reqs;
393 unsigned long tot_busy_t;
856b3483 394 unsigned long window_start_t;
401f1e44 395 ktime_t busy_start_t;
fcb0c4b0 396 struct device_attribute enable_attr;
a3cd5ec5 397 struct ufs_saved_pwr_info saved_pwr_info;
401f1e44 398 struct workqueue_struct *workq;
399 struct work_struct suspend_work;
400 struct work_struct resume_work;
401 bool is_allowed;
402 bool is_busy_started;
403 bool is_suspended;
856b3483
ST
404};
405
3a4bf06d
YG
406/**
407 * struct ufs_init_prefetch - contains data that is pre-fetched once during
408 * initialization
409 * @icc_level: icc level which was read during initialization
410 */
411struct ufs_init_prefetch {
412 u32 icc_level;
413};
414
48d5b973 415#define UFS_ERR_REG_HIST_LENGTH 8
ff8e20c6 416/**
d3c615bf 417 * struct ufs_err_reg_hist - keeps history of errors
ff8e20c6
DR
418 * @pos: index to indicate cyclic buffer position
419 * @reg: cyclic buffer for registers value
420 * @tstamp: cyclic buffer for time stamp
421 */
48d5b973 422struct ufs_err_reg_hist {
ff8e20c6 423 int pos;
48d5b973
SC
424 u32 reg[UFS_ERR_REG_HIST_LENGTH];
425 ktime_t tstamp[UFS_ERR_REG_HIST_LENGTH];
ff8e20c6
DR
426};
427
428/**
429 * struct ufs_stats - keeps usage/err statistics
430 * @hibern8_exit_cnt: Counter to keep track of number of exits,
431 * reset this after link-startup.
432 * @last_hibern8_exit_tstamp: Set time after the hibern8 exit.
433 * Clear after the first successful command completion.
434 * @pa_err: tracks pa-uic errors
435 * @dl_err: tracks dl-uic errors
436 * @nl_err: tracks nl-uic errors
437 * @tl_err: tracks tl-uic errors
438 * @dme_err: tracks dme errors
d3c615bf 439 * @auto_hibern8_err: tracks auto-hibernate errors
8808b4e9
SC
440 * @fatal_err: tracks fatal errors
441 * @linkup_err: tracks link-startup errors
442 * @resume_err: tracks resume errors
443 * @suspend_err: tracks suspend errors
444 * @dev_reset: tracks device reset events
445 * @host_reset: tracks host reset events
446 * @tsk_abort: tracks task abort events
ff8e20c6
DR
447 */
448struct ufs_stats {
449 u32 hibern8_exit_cnt;
450 ktime_t last_hibern8_exit_tstamp;
d3c615bf
SC
451
452 /* uic specific errors */
48d5b973
SC
453 struct ufs_err_reg_hist pa_err;
454 struct ufs_err_reg_hist dl_err;
455 struct ufs_err_reg_hist nl_err;
456 struct ufs_err_reg_hist tl_err;
457 struct ufs_err_reg_hist dme_err;
d3c615bf
SC
458
459 /* fatal errors */
d3c615bf 460 struct ufs_err_reg_hist auto_hibern8_err;
8808b4e9
SC
461 struct ufs_err_reg_hist fatal_err;
462 struct ufs_err_reg_hist link_startup_err;
463 struct ufs_err_reg_hist resume_err;
464 struct ufs_err_reg_hist suspend_err;
465
466 /* abnormal events */
467 struct ufs_err_reg_hist dev_reset;
468 struct ufs_err_reg_hist host_reset;
469 struct ufs_err_reg_hist task_abort;
ff8e20c6
DR
470};
471
e0eca63e
VH
472/**
473 * struct ufs_hba - per adapter private structure
474 * @mmio_base: UFSHCI base register address
475 * @ucdl_base_addr: UFS Command Descriptor base address
476 * @utrdl_base_addr: UTP Transfer Request Descriptor base address
477 * @utmrdl_base_addr: UTP Task Management Descriptor base address
478 * @ucdl_dma_addr: UFS Command Descriptor DMA address
479 * @utrdl_dma_addr: UTRDL DMA address
480 * @utmrdl_dma_addr: UTMRDL DMA address
481 * @host: Scsi_Host instance of the driver
482 * @dev: device handle
483 * @lrb: local reference block
7252a360 484 * @cmd_queue: Used to allocate command tags from hba->host->tag_set.
e0eca63e
VH
485 * @outstanding_tasks: Bits representing outstanding task requests
486 * @outstanding_reqs: Bits representing outstanding transfer requests
487 * @capabilities: UFS Controller Capabilities
488 * @nutrs: Transfer Request Queue depth supported by controller
489 * @nutmrs: Task Management Queue depth supported by controller
490 * @ufs_version: UFS Version to which controller complies
5c0c28a8
SRT
491 * @vops: pointer to variant specific operations
492 * @priv: pointer to variant specific private data
e0eca63e
VH
493 * @irq: Irq number of the controller
494 * @active_uic_cmd: handle of active UIC command
6ccf44fe 495 * @uic_cmd_mutex: mutex for uic command
69a6c269
BVA
496 * @tmf_tag_set: TMF tag set.
497 * @tmf_queue: Used to allocate TMF tags.
53b3d9c3 498 * @pwr_done: completion for power mode change
e0eca63e 499 * @ufshcd_state: UFSHCD states
3441da7d 500 * @eh_flags: Error handling flags
2fbd009b 501 * @intr_mask: Interrupt Mask Bits
66ec6d59 502 * @ee_ctrl_mask: Exception event control mask
1d337ec2 503 * @is_powered: flag to check if HBA is powered
3a4bf06d
YG
504 * @is_init_prefetch: flag to check if data was pre-fetched in initialization
505 * @init_prefetch_data: data pre-fetched during initialization
e8e7f271 506 * @eh_work: Worker to handle UFS errors that require s/w attention
66ec6d59 507 * @eeh_work: Worker to handle exception events
e0eca63e 508 * @errors: HBA errors
e8e7f271
SRT
509 * @uic_error: UFS interconnect layer error status
510 * @saved_err: sticky error mask
511 * @saved_uic_err: sticky UIC error mask
2df74b69 512 * @silence_err_logs: flag to silence error logs
5a0b0cb9 513 * @dev_cmd: ufs device management command information
cad2e03d 514 * @last_dme_cmd_tstamp: time stamp of the last completed DME command
66ec6d59 515 * @auto_bkops_enabled: to track whether bkops is enabled in device
aa497613 516 * @vreg_info: UFS device voltage regulator information
c6e79dac 517 * @clk_list_head: UFS host controller clocks list node head
7eb584db
DR
518 * @pwr_info: holds current power mode
519 * @max_pwr_info: keeps the device max valid pwm
a4b0e8a4 520 * @desc_size: descriptor sizes reported by device
afdfff59
YG
521 * @urgent_bkops_lvl: keeps track of urgent bkops level for device
522 * @is_urgent_bkops_lvl_checked: keeps track if the urgent bkops level for
523 * device is known or not.
38135535 524 * @scsi_block_reqs_cnt: reference counting for scsi block requests
e0eca63e
VH
525 */
526struct ufs_hba {
527 void __iomem *mmio_base;
528
529 /* Virtual memory reference */
530 struct utp_transfer_cmd_desc *ucdl_base_addr;
531 struct utp_transfer_req_desc *utrdl_base_addr;
532 struct utp_task_req_desc *utmrdl_base_addr;
533
534 /* DMA memory reference */
535 dma_addr_t ucdl_dma_addr;
536 dma_addr_t utrdl_dma_addr;
537 dma_addr_t utmrdl_dma_addr;
538
539 struct Scsi_Host *host;
540 struct device *dev;
7252a360 541 struct request_queue *cmd_queue;
2a8fa600
SJ
542 /*
543 * This field is to keep a reference to "scsi_device" corresponding to
544 * "UFS device" W-LU.
545 */
546 struct scsi_device *sdev_ufs_device;
e0eca63e 547
57d104c1
SJ
548 enum ufs_dev_pwr_mode curr_dev_pwr_mode;
549 enum uic_link_state uic_link_state;
550 /* Desired UFS power management level during runtime PM */
551 enum ufs_pm_level rpm_lvl;
552 /* Desired UFS power management level during system PM */
553 enum ufs_pm_level spm_lvl;
09690d5a 554 struct device_attribute rpm_lvl_attr;
555 struct device_attribute spm_lvl_attr;
57d104c1
SJ
556 int pm_op_in_progress;
557
ad448378
AH
558 /* Auto-Hibernate Idle Timer register value */
559 u32 ahit;
560
e0eca63e
VH
561 struct ufshcd_lrb *lrb;
562
563 unsigned long outstanding_tasks;
564 unsigned long outstanding_reqs;
565
566 u32 capabilities;
567 int nutrs;
568 int nutmrs;
569 u32 ufs_version;
176eb927 570 const struct ufs_hba_variant_ops *vops;
5c0c28a8 571 void *priv;
e0eca63e 572 unsigned int irq;
57d104c1 573 bool is_irq_enabled;
9e1e8a75 574 enum ufs_ref_clk_freq dev_ref_clk_freq;
e0eca63e 575
b852190e 576 /* Interrupt aggregation support is broken */
cc81641a 577 #define UFSHCD_QUIRK_BROKEN_INTR_AGGR 0x1
b852190e 578
cad2e03d
YG
579 /*
580 * delay before each dme command is required as the unipro
581 * layer has shown instabilities
582 */
cc81641a 583 #define UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS 0x2
b852190e 584
7ca38cf3
YG
585 /*
586 * If UFS host controller is having issue in processing LCC (Line
587 * Control Command) coming from device then enable this quirk.
588 * When this quirk is enabled, host controller driver should disable
589 * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
590 * attribute of device to 0).
591 */
cc81641a 592 #define UFSHCD_QUIRK_BROKEN_LCC 0x4
cad2e03d 593
c3a2f9ee
YG
594 /*
595 * The attribute PA_RXHSUNTERMCAP specifies whether or not the
596 * inbound Link supports unterminated line in HS mode. Setting this
597 * attribute to 1 fixes moving to HS gear.
598 */
cc81641a 599 #define UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP 0x8
c3a2f9ee 600
874237f7
YG
601 /*
602 * This quirk needs to be enabled if the host contoller only allows
603 * accessing the peer dme attributes in AUTO mode (FAST AUTO or
604 * SLOW AUTO).
605 */
cc81641a 606 #define UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE 0x10
874237f7 607
9949e702
YG
608 /*
609 * This quirk needs to be enabled if the host contoller doesn't
610 * advertise the correct version in UFS_VER register. If this quirk
611 * is enabled, standard UFS host driver will call the vendor specific
612 * ops (get_ufs_hci_version) to get the correct version.
613 */
cc81641a 614 #define UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION 0x20
9949e702 615
75b1cc4a
KK
616 /*
617 * This quirk needs to be enabled if the host contoller regards
618 * resolution of the values of PRDTO and PRDTL in UTRD as byte.
619 */
cc81641a 620 #define UFSHCD_QUIRK_PRDT_BYTE_GRAN 0x80
75b1cc4a 621
1399c5b0
AA
622 /*
623 * Clear handling for transfer/task request list is just opposite.
624 */
625 #define UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR 0x100
626
5ac6abc9
AA
627 /*
628 * This quirk needs to be enabled if host controller doesn't allow
629 * that the interrupt aggregation timer and counter are reset by s/w.
630 */
631 #define UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR 0x200
632
4404c5de
AA
633 /*
634 * This quirks needs to be enabled if host controller cannot be
635 * enabled via HCE register.
636 */
637 #define UFSHCI_QUIRK_BROKEN_HCE 0x400
cad2e03d 638 unsigned int quirks; /* Deviations from standard UFSHCI spec. */
6ccf44fe 639
c58ab7aa
YG
640 /* Device deviations from standard UFS device spec. */
641 unsigned int dev_quirks;
642
69a6c269
BVA
643 struct blk_mq_tag_set tmf_tag_set;
644 struct request_queue *tmf_queue;
e0eca63e 645
57d104c1
SJ
646 struct uic_command *active_uic_cmd;
647 struct mutex uic_cmd_mutex;
648 struct completion *uic_async_done;
53b3d9c3 649
e0eca63e 650 u32 ufshcd_state;
3441da7d 651 u32 eh_flags;
2fbd009b 652 u32 intr_mask;
66ec6d59 653 u16 ee_ctrl_mask;
1d337ec2 654 bool is_powered;
3a4bf06d
YG
655 bool is_init_prefetch;
656 struct ufs_init_prefetch init_prefetch_data;
e0eca63e
VH
657
658 /* Work Queues */
e8e7f271 659 struct work_struct eh_work;
66ec6d59 660 struct work_struct eeh_work;
e0eca63e
VH
661
662 /* HBA Errors */
663 u32 errors;
e8e7f271
SRT
664 u32 uic_error;
665 u32 saved_err;
666 u32 saved_uic_err;
ff8e20c6 667 struct ufs_stats ufs_stats;
2df74b69 668 bool silence_err_logs;
5a0b0cb9
SRT
669
670 /* Device management request data */
671 struct ufs_dev_cmd dev_cmd;
cad2e03d 672 ktime_t last_dme_cmd_tstamp;
66ec6d59 673
57d104c1
SJ
674 /* Keeps information of the UFS device connected to this host */
675 struct ufs_dev_info dev_info;
66ec6d59 676 bool auto_bkops_enabled;
aa497613 677 struct ufs_vreg_info vreg_info;
c6e79dac 678 struct list_head clk_list_head;
57d104c1
SJ
679
680 bool wlun_dev_clr_ua;
7eb584db 681
7fabb77b
GB
682 /* Number of requests aborts */
683 int req_abort_count;
684
54b879b7
YG
685 /* Number of lanes available (1 or 2) for Rx/Tx */
686 u32 lanes_per_direction;
7eb584db
DR
687 struct ufs_pa_layer_attr pwr_info;
688 struct ufs_pwr_mode_info max_pwr_info;
1ab27c9c
ST
689
690 struct ufs_clk_gating clk_gating;
691 /* Control to enable/disable host capabilities */
692 u32 caps;
693 /* Allow dynamic clk gating */
694#define UFSHCD_CAP_CLK_GATING (1 << 0)
695 /* Allow hiberb8 with clk gating */
696#define UFSHCD_CAP_HIBERN8_WITH_CLK_GATING (1 << 1)
856b3483
ST
697 /* Allow dynamic clk scaling */
698#define UFSHCD_CAP_CLK_SCALING (1 << 2)
374a246e
SJ
699 /* Allow auto bkops to enabled during runtime suspend */
700#define UFSHCD_CAP_AUTO_BKOPS_SUSPEND (1 << 3)
b852190e
YG
701 /*
702 * This capability allows host controller driver to use the UFS HCI's
703 * interrupt aggregation capability.
704 * CAUTION: Enabling this might reduce overall UFS throughput.
705 */
706#define UFSHCD_CAP_INTR_AGGR (1 << 4)
4e768e76 707 /*
708 * This capability allows the device auto-bkops to be always enabled
709 * except during suspend (both runtime and suspend).
710 * Enabling this capability means that device will always be allowed
711 * to do background operation when it's active but it might degrade
712 * the performance of ongoing read/write operations.
713 */
714#define UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND (1 << 5)
49615ba1
SC
715 /*
716 * This capability allows host controller driver to automatically
717 * enable runtime power management by itself instead of waiting
718 * for userspace to control the power management.
719 */
720#define UFSHCD_CAP_RPM_AUTOSUSPEND (1 << 6)
856b3483
ST
721
722 struct devfreq *devfreq;
723 struct ufs_clk_scaling clk_scaling;
e785060e 724 bool is_sys_suspended;
afdfff59
YG
725
726 enum bkops_status urgent_bkops_lvl;
727 bool is_urgent_bkops_lvl_checked;
a3cd5ec5 728
729 struct rw_semaphore clk_scaling_lock;
a4b0e8a4 730 struct ufs_desc_size desc_size;
38135535 731 atomic_t scsi_block_reqs_cnt;
df032bf2
AA
732
733 struct device bsg_dev;
734 struct request_queue *bsg_queue;
e0eca63e
VH
735};
736
1ab27c9c
ST
737/* Returns true if clocks can be gated. Otherwise false */
738static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
739{
740 return hba->caps & UFSHCD_CAP_CLK_GATING;
741}
742static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
743{
744 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
745}
fcb0c4b0 746static inline int ufshcd_is_clkscaling_supported(struct ufs_hba *hba)
856b3483
ST
747{
748 return hba->caps & UFSHCD_CAP_CLK_SCALING;
749}
374a246e
SJ
750static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
751{
752 return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
753}
49615ba1
SC
754static inline bool ufshcd_is_rpm_autosuspend_allowed(struct ufs_hba *hba)
755{
756 return hba->caps & UFSHCD_CAP_RPM_AUTOSUSPEND;
757}
374a246e 758
b852190e
YG
759static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
760{
4b9ffb5a
JP
761/* DWC UFS Core has the Interrupt aggregation feature but is not detectable*/
762#ifndef CONFIG_SCSI_UFS_DWC
b852190e
YG
763 if ((hba->caps & UFSHCD_CAP_INTR_AGGR) &&
764 !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR))
765 return true;
766 else
767 return false;
4b9ffb5a
JP
768#else
769return true;
770#endif
b852190e
YG
771}
772
ee5f1042
SC
773static inline bool ufshcd_is_auto_hibern8_supported(struct ufs_hba *hba)
774{
775 return (hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT);
776}
777
b873a275
SJ
778#define ufshcd_writel(hba, val, reg) \
779 writel((val), (hba)->mmio_base + (reg))
780#define ufshcd_readl(hba, reg) \
781 readl((hba)->mmio_base + (reg))
782
e785060e
DR
783/**
784 * ufshcd_rmwl - read modify write into a register
785 * @hba - per adapter instance
786 * @mask - mask to apply on read value
787 * @val - actual value to write
788 * @reg - register address
789 */
790static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
791{
792 u32 tmp;
793
794 tmp = ufshcd_readl(hba, reg);
795 tmp &= ~mask;
796 tmp |= (val & mask);
797 ufshcd_writel(hba, tmp, reg);
798}
799
5c0c28a8 800int ufshcd_alloc_host(struct device *, struct ufs_hba **);
47555a5c 801void ufshcd_dealloc_host(struct ufs_hba *);
9d19bf7a 802int ufshcd_hba_enable(struct ufs_hba *hba);
5c0c28a8 803int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int);
9d19bf7a 804int ufshcd_make_hba_operational(struct ufs_hba *hba);
e0eca63e 805void ufshcd_remove(struct ufs_hba *);
9d19bf7a 806int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
596585a2
YG
807int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
808 u32 val, unsigned long interval_us,
809 unsigned long timeout_ms, bool can_sleep);
9e1e8a75 810void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk);
a5fe372d
SC
811void ufshcd_update_reg_hist(struct ufs_err_reg_hist *reg_hist,
812 u32 reg);
e0eca63e 813
68078d5c
DR
814static inline void check_upiu_size(void)
815{
816 BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
817 GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
818}
819
1ce5898a
YG
820/**
821 * ufshcd_set_variant - set variant specific data to the hba
822 * @hba - per adapter instance
823 * @variant - pointer to variant specific data
824 */
825static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant)
826{
827 BUG_ON(!hba);
828 hba->priv = variant;
829}
830
831/**
832 * ufshcd_get_variant - get variant specific data from the hba
833 * @hba - per adapter instance
834 */
835static inline void *ufshcd_get_variant(struct ufs_hba *hba)
836{
837 BUG_ON(!hba);
838 return hba->priv;
839}
4e768e76 840static inline bool ufshcd_keep_autobkops_enabled_except_suspend(
841 struct ufs_hba *hba)
842{
843 return hba->caps & UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND;
844}
1ce5898a 845
66ec6d59
SRT
846extern int ufshcd_runtime_suspend(struct ufs_hba *hba);
847extern int ufshcd_runtime_resume(struct ufs_hba *hba);
848extern int ufshcd_runtime_idle(struct ufs_hba *hba);
57d104c1
SJ
849extern int ufshcd_system_suspend(struct ufs_hba *hba);
850extern int ufshcd_system_resume(struct ufs_hba *hba);
851extern int ufshcd_shutdown(struct ufs_hba *hba);
12b4fdb4
SJ
852extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
853 u8 attr_set, u32 mib_val, u8 peer);
854extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
855 u32 *mib_val, u8 peer);
0d846e70
AA
856extern int ufshcd_config_pwr_mode(struct ufs_hba *hba,
857 struct ufs_pa_layer_attr *desired_pwr_mode);
12b4fdb4
SJ
858
859/* UIC command interfaces for DME primitives */
860#define DME_LOCAL 0
861#define DME_PEER 1
862#define ATTR_SET_NOR 0 /* NORMAL */
863#define ATTR_SET_ST 1 /* STATIC */
864
865static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
866 u32 mib_val)
867{
868 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
869 mib_val, DME_LOCAL);
870}
871
872static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
873 u32 mib_val)
874{
875 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
876 mib_val, DME_LOCAL);
877}
878
879static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
880 u32 mib_val)
881{
882 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
883 mib_val, DME_PEER);
884}
885
886static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
887 u32 mib_val)
888{
889 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
890 mib_val, DME_PEER);
891}
892
893static inline int ufshcd_dme_get(struct ufs_hba *hba,
894 u32 attr_sel, u32 *mib_val)
895{
896 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
897}
898
899static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
900 u32 attr_sel, u32 *mib_val)
901{
902 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
903}
904
f37aabcf
YG
905static inline bool ufshcd_is_hs_mode(struct ufs_pa_layer_attr *pwr_info)
906{
907 return (pwr_info->pwr_rx == FAST_MODE ||
908 pwr_info->pwr_rx == FASTAUTO_MODE) &&
909 (pwr_info->pwr_tx == FAST_MODE ||
910 pwr_info->pwr_tx == FASTAUTO_MODE);
911}
912
dc3c8d3a 913/* Expose Query-Request API */
2238d31c
SN
914int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
915 enum query_opcode opcode,
916 enum desc_idn idn, u8 index,
917 u8 selector,
918 u8 *desc_buf, int *buf_len);
45bced87
SN
919int ufshcd_read_desc_param(struct ufs_hba *hba,
920 enum desc_idn desc_id,
921 int desc_index,
922 u8 param_offset,
923 u8 *param_read_buf,
924 u8 param_size);
ec92b59c
SN
925int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
926 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val);
dc3c8d3a
YG
927int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
928 enum flag_idn idn, bool *flag_res);
4b828fe1 929
71d848b8 930void ufshcd_auto_hibern8_enable(struct ufs_hba *hba);
ba7af5ec 931void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit);
71d848b8 932
4b828fe1
TW
933#define SD_ASCII_STD true
934#define SD_RAW false
935int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
936 u8 **buf, bool ascii);
2238d31c 937
1ab27c9c
ST
938int ufshcd_hold(struct ufs_hba *hba, bool async);
939void ufshcd_release(struct ufs_hba *hba);
a4b0e8a4
PM
940
941int ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id,
942 int *desc_length);
943
37113106 944u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba);
0263bcd0 945
e77044c5
AA
946int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd);
947
5e0a86ee
AA
948int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
949 struct utp_upiu_req *req_upiu,
950 struct utp_upiu_req *rsp_upiu,
951 int msgcode,
952 u8 *desc_buff, int *buff_len,
953 enum query_opcode desc_op);
954
0263bcd0
YG
955/* Wrapper functions for safely calling variant operations */
956static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
957{
958 if (hba->vops)
959 return hba->vops->name;
960 return "";
961}
962
963static inline int ufshcd_vops_init(struct ufs_hba *hba)
964{
965 if (hba->vops && hba->vops->init)
966 return hba->vops->init(hba);
967
968 return 0;
969}
970
971static inline void ufshcd_vops_exit(struct ufs_hba *hba)
972{
973 if (hba->vops && hba->vops->exit)
974 return hba->vops->exit(hba);
975}
976
977static inline u32 ufshcd_vops_get_ufs_hci_version(struct ufs_hba *hba)
978{
979 if (hba->vops && hba->vops->get_ufs_hci_version)
980 return hba->vops->get_ufs_hci_version(hba);
981
982 return ufshcd_readl(hba, REG_UFS_VERSION);
983}
984
f06fcc71
YG
985static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba,
986 bool up, enum ufs_notify_change_status status)
0263bcd0
YG
987{
988 if (hba->vops && hba->vops->clk_scale_notify)
f06fcc71
YG
989 return hba->vops->clk_scale_notify(hba, up, status);
990 return 0;
0263bcd0
YG
991}
992
1e879e8f
SJ
993static inline int ufshcd_vops_setup_clocks(struct ufs_hba *hba, bool on,
994 enum ufs_notify_change_status status)
0263bcd0
YG
995{
996 if (hba->vops && hba->vops->setup_clocks)
1e879e8f 997 return hba->vops->setup_clocks(hba, on, status);
0263bcd0
YG
998 return 0;
999}
1000
1001static inline int ufshcd_vops_setup_regulators(struct ufs_hba *hba, bool status)
1002{
1003 if (hba->vops && hba->vops->setup_regulators)
1004 return hba->vops->setup_regulators(hba, status);
1005
1006 return 0;
1007}
1008
1009static inline int ufshcd_vops_hce_enable_notify(struct ufs_hba *hba,
1010 bool status)
1011{
1012 if (hba->vops && hba->vops->hce_enable_notify)
1013 return hba->vops->hce_enable_notify(hba, status);
1014
1015 return 0;
1016}
1017static inline int ufshcd_vops_link_startup_notify(struct ufs_hba *hba,
1018 bool status)
1019{
1020 if (hba->vops && hba->vops->link_startup_notify)
1021 return hba->vops->link_startup_notify(hba, status);
1022
1023 return 0;
1024}
1025
1026static inline int ufshcd_vops_pwr_change_notify(struct ufs_hba *hba,
1027 bool status,
1028 struct ufs_pa_layer_attr *dev_max_params,
1029 struct ufs_pa_layer_attr *dev_req_params)
1030{
1031 if (hba->vops && hba->vops->pwr_change_notify)
1032 return hba->vops->pwr_change_notify(hba, status,
1033 dev_max_params, dev_req_params);
1034
1035 return -ENOTSUPP;
1036}
1037
0e675efa
KK
1038static inline void ufshcd_vops_setup_xfer_req(struct ufs_hba *hba, int tag,
1039 bool is_scsi_cmd)
1040{
1041 if (hba->vops && hba->vops->setup_xfer_req)
1042 return hba->vops->setup_xfer_req(hba, tag, is_scsi_cmd);
1043}
1044
d2877be4
KK
1045static inline void ufshcd_vops_setup_task_mgmt(struct ufs_hba *hba,
1046 int tag, u8 tm_function)
1047{
1048 if (hba->vops && hba->vops->setup_task_mgmt)
1049 return hba->vops->setup_task_mgmt(hba, tag, tm_function);
1050}
1051
ee32c909
KK
1052static inline void ufshcd_vops_hibern8_notify(struct ufs_hba *hba,
1053 enum uic_cmd_dme cmd,
1054 enum ufs_notify_change_status status)
1055{
1056 if (hba->vops && hba->vops->hibern8_notify)
1057 return hba->vops->hibern8_notify(hba, cmd, status);
1058}
1059
c40ad6b7
SC
1060static inline int ufshcd_vops_apply_dev_quirks(struct ufs_hba *hba,
1061 struct ufs_dev_desc *card)
56d4a186
SJ
1062{
1063 if (hba->vops && hba->vops->apply_dev_quirks)
c40ad6b7 1064 return hba->vops->apply_dev_quirks(hba, card);
56d4a186
SJ
1065 return 0;
1066}
1067
0263bcd0
YG
1068static inline int ufshcd_vops_suspend(struct ufs_hba *hba, enum ufs_pm_op op)
1069{
1070 if (hba->vops && hba->vops->suspend)
1071 return hba->vops->suspend(hba, op);
1072
1073 return 0;
1074}
1075
1076static inline int ufshcd_vops_resume(struct ufs_hba *hba, enum ufs_pm_op op)
1077{
1078 if (hba->vops && hba->vops->resume)
1079 return hba->vops->resume(hba, op);
1080
1081 return 0;
1082}
1083
6e3fd44d
YG
1084static inline void ufshcd_vops_dbg_register_dump(struct ufs_hba *hba)
1085{
1086 if (hba->vops && hba->vops->dbg_register_dump)
1087 hba->vops->dbg_register_dump(hba);
1088}
1089
d8d9f793
BA
1090static inline void ufshcd_vops_device_reset(struct ufs_hba *hba)
1091{
a5fe372d 1092 if (hba->vops && hba->vops->device_reset) {
d8d9f793 1093 hba->vops->device_reset(hba);
a5fe372d
SC
1094 ufshcd_update_reg_hist(&hba->ufs_stats.dev_reset, 0);
1095 }
d8d9f793
BA
1096}
1097
cbb6813e
SN
1098extern struct ufs_pm_lvl_states ufs_pm_lvl_states[];
1099
d829fc8a
SN
1100/*
1101 * ufshcd_scsi_to_upiu_lun - maps scsi LUN to UPIU LUN
1102 * @scsi_lun: scsi LUN id
1103 *
1104 * Returns UPIU LUN id
1105 */
1106static inline u8 ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)
1107{
1108 if (scsi_is_wlun(scsi_lun))
1109 return (scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID)
1110 | UFS_UPIU_WLUN_ID;
1111 else
1112 return scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID;
1113}
1114
ba80917d
TW
1115int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
1116 const char *prefix);
1117
e0eca63e 1118#endif /* End of Header */