scsi: ufs: add retry for query descriptors
[linux-2.6-block.git] / drivers / scsi / ufs / ufshcd.h
CommitLineData
e0eca63e
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1/*
2 * Universal Flash Storage Host controller driver
3 *
4 * This code is based on drivers/scsi/ufs/ufshcd.h
5 * Copyright (C) 2011-2013 Samsung India Software Operations
dc3c8d3a 6 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
e0eca63e
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7 *
8 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
35 */
36
37#ifndef _UFSHCD_H
38#define _UFSHCD_H
39
40#include <linux/module.h>
41#include <linux/kernel.h>
42#include <linux/init.h>
43#include <linux/interrupt.h>
44#include <linux/io.h>
45#include <linux/delay.h>
46#include <linux/slab.h>
47#include <linux/spinlock.h>
48#include <linux/workqueue.h>
49#include <linux/errno.h>
50#include <linux/types.h>
51#include <linux/wait.h>
52#include <linux/bitops.h>
53#include <linux/pm_runtime.h>
54#include <linux/clk.h>
6ccf44fe 55#include <linux/completion.h>
aa497613 56#include <linux/regulator/consumer.h>
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57
58#include <asm/irq.h>
59#include <asm/byteorder.h>
60#include <scsi/scsi.h>
61#include <scsi/scsi_cmnd.h>
62#include <scsi/scsi_host.h>
63#include <scsi/scsi_tcq.h>
64#include <scsi/scsi_dbg.h>
65#include <scsi/scsi_eh.h>
66
67#include "ufs.h"
68#include "ufshci.h"
69
70#define UFSHCD "ufshcd"
71#define UFSHCD_DRIVER_VERSION "0.2"
72
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SRT
73struct ufs_hba;
74
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SRT
75enum dev_cmd_type {
76 DEV_CMD_TYPE_NOP = 0x0,
68078d5c 77 DEV_CMD_TYPE_QUERY = 0x1,
5a0b0cb9
SRT
78};
79
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80/**
81 * struct uic_command - UIC command structure
82 * @command: UIC command
83 * @argument1: UIC command argument 1
84 * @argument2: UIC command argument 2
85 * @argument3: UIC command argument 3
86 * @cmd_active: Indicate if UIC command is outstanding
87 * @result: UIC command result
6ccf44fe 88 * @done: UIC command completion
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89 */
90struct uic_command {
91 u32 command;
92 u32 argument1;
93 u32 argument2;
94 u32 argument3;
95 int cmd_active;
96 int result;
6ccf44fe 97 struct completion done;
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98};
99
57d104c1
SJ
100/* Used to differentiate the power management options */
101enum ufs_pm_op {
102 UFS_RUNTIME_PM,
103 UFS_SYSTEM_PM,
104 UFS_SHUTDOWN_PM,
105};
106
107#define ufshcd_is_runtime_pm(op) ((op) == UFS_RUNTIME_PM)
108#define ufshcd_is_system_pm(op) ((op) == UFS_SYSTEM_PM)
109#define ufshcd_is_shutdown_pm(op) ((op) == UFS_SHUTDOWN_PM)
110
111/* Host <-> Device UniPro Link state */
112enum uic_link_state {
113 UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
114 UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
115 UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
116};
117
118#define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
119#define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
120 UIC_LINK_ACTIVE_STATE)
121#define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
122 UIC_LINK_HIBERN8_STATE)
123#define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
124#define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
125 UIC_LINK_ACTIVE_STATE)
126#define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
127 UIC_LINK_HIBERN8_STATE)
128
129/*
130 * UFS Power management levels.
131 * Each level is in increasing order of power savings.
132 */
133enum ufs_pm_level {
134 UFS_PM_LVL_0, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE */
135 UFS_PM_LVL_1, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE */
136 UFS_PM_LVL_2, /* UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE */
137 UFS_PM_LVL_3, /* UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE */
138 UFS_PM_LVL_4, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE */
139 UFS_PM_LVL_5, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE */
140 UFS_PM_LVL_MAX
141};
142
143struct ufs_pm_lvl_states {
144 enum ufs_dev_pwr_mode dev_state;
145 enum uic_link_state link_state;
146};
147
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148/**
149 * struct ufshcd_lrb - local reference block
150 * @utr_descriptor_ptr: UTRD address of the command
5a0b0cb9 151 * @ucd_req_ptr: UCD address of the command
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152 * @ucd_rsp_ptr: Response UPIU address for this command
153 * @ucd_prdt_ptr: PRDT address of the command
154 * @cmd: pointer to SCSI command
155 * @sense_buffer: pointer to sense buffer address of the SCSI command
156 * @sense_bufflen: Length of the sense buffer
157 * @scsi_status: SCSI status of the command
158 * @command_type: SCSI, UFS, Query.
159 * @task_tag: Task tag of the command
160 * @lun: LUN of the command
5a0b0cb9 161 * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
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162 */
163struct ufshcd_lrb {
164 struct utp_transfer_req_desc *utr_descriptor_ptr;
5a0b0cb9 165 struct utp_upiu_req *ucd_req_ptr;
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166 struct utp_upiu_rsp *ucd_rsp_ptr;
167 struct ufshcd_sg_entry *ucd_prdt_ptr;
168
169 struct scsi_cmnd *cmd;
170 u8 *sense_buffer;
171 unsigned int sense_bufflen;
172 int scsi_status;
173
174 int command_type;
175 int task_tag;
0ce147d4 176 u8 lun; /* UPIU LUN id field is only 8-bit wide */
5a0b0cb9 177 bool intr_cmd;
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178};
179
68078d5c 180/**
a230c2f6 181 * struct ufs_query - holds relevant data structures for query request
68078d5c
DR
182 * @request: request upiu and function
183 * @descriptor: buffer for sending/receiving descriptor
184 * @response: response upiu and response
185 */
186struct ufs_query {
187 struct ufs_query_req request;
188 u8 *descriptor;
189 struct ufs_query_res response;
190};
191
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192/**
193 * struct ufs_dev_cmd - all assosiated fields with device management commands
194 * @type: device management command type - Query, NOP OUT
195 * @lock: lock to allow one command at a time
196 * @complete: internal commands completion
197 * @tag_wq: wait queue until free command slot is available
198 */
199struct ufs_dev_cmd {
200 enum dev_cmd_type type;
201 struct mutex lock;
202 struct completion *complete;
203 wait_queue_head_t tag_wq;
68078d5c 204 struct ufs_query query;
5a0b0cb9 205};
e0eca63e 206
c6e79dac
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207/**
208 * struct ufs_clk_info - UFS clock related info
209 * @list: list headed by hba->clk_list_head
210 * @clk: clock node
211 * @name: clock name
212 * @max_freq: maximum frequency supported by the clock
4cff6d99 213 * @min_freq: min frequency that can be used for clock scaling
856b3483 214 * @curr_freq: indicates the current frequency that it is set to
c6e79dac
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215 * @enabled: variable to check against multiple enable/disable
216 */
217struct ufs_clk_info {
218 struct list_head list;
219 struct clk *clk;
220 const char *name;
221 u32 max_freq;
4cff6d99 222 u32 min_freq;
856b3483 223 u32 curr_freq;
c6e79dac
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224 bool enabled;
225};
226
f06fcc71
YG
227enum ufs_notify_change_status {
228 PRE_CHANGE,
229 POST_CHANGE,
230};
7eb584db
DR
231
232struct ufs_pa_layer_attr {
233 u32 gear_rx;
234 u32 gear_tx;
235 u32 lane_rx;
236 u32 lane_tx;
237 u32 pwr_rx;
238 u32 pwr_tx;
239 u32 hs_rate;
240};
241
242struct ufs_pwr_mode_info {
243 bool is_valid;
244 struct ufs_pa_layer_attr info;
245};
246
5c0c28a8
SRT
247/**
248 * struct ufs_hba_variant_ops - variant specific callbacks
249 * @name: variant name
250 * @init: called when the driver is initialized
251 * @exit: called to cleanup everything done in init
9949e702 252 * @get_ufs_hci_version: called to get UFS HCI version
856b3483 253 * @clk_scale_notify: notifies that clks are scaled up/down
5c0c28a8
SRT
254 * @setup_clocks: called before touching any of the controller registers
255 * @setup_regulators: called before accessing the host controller
256 * @hce_enable_notify: called before and after HCE enable bit is set to allow
257 * variant specific Uni-Pro initialization.
258 * @link_startup_notify: called before and after Link startup is carried out
259 * to allow variant specific Uni-Pro initialization.
7eb584db
DR
260 * @pwr_change_notify: called before and after a power mode change
261 * is carried out to allow vendor spesific capabilities
262 * to be set.
57d104c1
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263 * @suspend: called during host controller PM callback
264 * @resume: called during host controller PM callback
6e3fd44d 265 * @dbg_register_dump: used to dump controller debug information
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266 */
267struct ufs_hba_variant_ops {
268 const char *name;
269 int (*init)(struct ufs_hba *);
270 void (*exit)(struct ufs_hba *);
9949e702 271 u32 (*get_ufs_hci_version)(struct ufs_hba *);
f06fcc71
YG
272 int (*clk_scale_notify)(struct ufs_hba *, bool,
273 enum ufs_notify_change_status);
274 int (*setup_clocks)(struct ufs_hba *, bool);
5c0c28a8 275 int (*setup_regulators)(struct ufs_hba *, bool);
f06fcc71
YG
276 int (*hce_enable_notify)(struct ufs_hba *,
277 enum ufs_notify_change_status);
278 int (*link_startup_notify)(struct ufs_hba *,
279 enum ufs_notify_change_status);
7eb584db 280 int (*pwr_change_notify)(struct ufs_hba *,
f06fcc71
YG
281 enum ufs_notify_change_status status,
282 struct ufs_pa_layer_attr *,
7eb584db 283 struct ufs_pa_layer_attr *);
57d104c1
SJ
284 int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
285 int (*resume)(struct ufs_hba *, enum ufs_pm_op);
6e3fd44d 286 void (*dbg_register_dump)(struct ufs_hba *hba);
5c0c28a8
SRT
287};
288
1ab27c9c
ST
289/* clock gating state */
290enum clk_gating_state {
291 CLKS_OFF,
292 CLKS_ON,
293 REQ_CLKS_OFF,
294 REQ_CLKS_ON,
295};
296
297/**
298 * struct ufs_clk_gating - UFS clock gating related info
299 * @gate_work: worker to turn off clocks after some delay as specified in
300 * delay_ms
301 * @ungate_work: worker to turn on clocks that will be used in case of
302 * interrupt context
303 * @state: the current clocks state
304 * @delay_ms: gating delay in ms
305 * @is_suspended: clk gating is suspended when set to 1 which can be used
306 * during suspend/resume
307 * @delay_attr: sysfs attribute to control delay_attr
308 * @active_reqs: number of requests that are pending and should be waited for
309 * completion before gating clocks.
310 */
311struct ufs_clk_gating {
312 struct delayed_work gate_work;
313 struct work_struct ungate_work;
314 enum clk_gating_state state;
315 unsigned long delay_ms;
316 bool is_suspended;
317 struct device_attribute delay_attr;
318 int active_reqs;
319};
320
856b3483
ST
321struct ufs_clk_scaling {
322 ktime_t busy_start_t;
323 bool is_busy_started;
324 unsigned long tot_busy_t;
325 unsigned long window_start_t;
326};
327
3a4bf06d
YG
328/**
329 * struct ufs_init_prefetch - contains data that is pre-fetched once during
330 * initialization
331 * @icc_level: icc level which was read during initialization
332 */
333struct ufs_init_prefetch {
334 u32 icc_level;
335};
336
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337/**
338 * struct ufs_hba - per adapter private structure
339 * @mmio_base: UFSHCI base register address
340 * @ucdl_base_addr: UFS Command Descriptor base address
341 * @utrdl_base_addr: UTP Transfer Request Descriptor base address
342 * @utmrdl_base_addr: UTP Task Management Descriptor base address
343 * @ucdl_dma_addr: UFS Command Descriptor DMA address
344 * @utrdl_dma_addr: UTRDL DMA address
345 * @utmrdl_dma_addr: UTMRDL DMA address
346 * @host: Scsi_Host instance of the driver
347 * @dev: device handle
348 * @lrb: local reference block
5a0b0cb9 349 * @lrb_in_use: lrb in use
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350 * @outstanding_tasks: Bits representing outstanding task requests
351 * @outstanding_reqs: Bits representing outstanding transfer requests
352 * @capabilities: UFS Controller Capabilities
353 * @nutrs: Transfer Request Queue depth supported by controller
354 * @nutmrs: Task Management Queue depth supported by controller
355 * @ufs_version: UFS Version to which controller complies
5c0c28a8
SRT
356 * @vops: pointer to variant specific operations
357 * @priv: pointer to variant specific private data
e0eca63e
VH
358 * @irq: Irq number of the controller
359 * @active_uic_cmd: handle of active UIC command
6ccf44fe 360 * @uic_cmd_mutex: mutex for uic command
e2933132
SRT
361 * @tm_wq: wait queue for task management
362 * @tm_tag_wq: wait queue for free task management slots
363 * @tm_slots_in_use: bit map of task management request slots in use
53b3d9c3 364 * @pwr_done: completion for power mode change
e0eca63e
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365 * @tm_condition: condition variable for task management
366 * @ufshcd_state: UFSHCD states
3441da7d 367 * @eh_flags: Error handling flags
2fbd009b 368 * @intr_mask: Interrupt Mask Bits
66ec6d59 369 * @ee_ctrl_mask: Exception event control mask
1d337ec2 370 * @is_powered: flag to check if HBA is powered
3a4bf06d
YG
371 * @is_init_prefetch: flag to check if data was pre-fetched in initialization
372 * @init_prefetch_data: data pre-fetched during initialization
e8e7f271 373 * @eh_work: Worker to handle UFS errors that require s/w attention
66ec6d59 374 * @eeh_work: Worker to handle exception events
e0eca63e 375 * @errors: HBA errors
e8e7f271
SRT
376 * @uic_error: UFS interconnect layer error status
377 * @saved_err: sticky error mask
378 * @saved_uic_err: sticky UIC error mask
5a0b0cb9 379 * @dev_cmd: ufs device management command information
cad2e03d 380 * @last_dme_cmd_tstamp: time stamp of the last completed DME command
66ec6d59 381 * @auto_bkops_enabled: to track whether bkops is enabled in device
aa497613 382 * @vreg_info: UFS device voltage regulator information
c6e79dac 383 * @clk_list_head: UFS host controller clocks list node head
7eb584db
DR
384 * @pwr_info: holds current power mode
385 * @max_pwr_info: keeps the device max valid pwm
e0eca63e
VH
386 */
387struct ufs_hba {
388 void __iomem *mmio_base;
389
390 /* Virtual memory reference */
391 struct utp_transfer_cmd_desc *ucdl_base_addr;
392 struct utp_transfer_req_desc *utrdl_base_addr;
393 struct utp_task_req_desc *utmrdl_base_addr;
394
395 /* DMA memory reference */
396 dma_addr_t ucdl_dma_addr;
397 dma_addr_t utrdl_dma_addr;
398 dma_addr_t utmrdl_dma_addr;
399
400 struct Scsi_Host *host;
401 struct device *dev;
2a8fa600
SJ
402 /*
403 * This field is to keep a reference to "scsi_device" corresponding to
404 * "UFS device" W-LU.
405 */
406 struct scsi_device *sdev_ufs_device;
e0eca63e 407
57d104c1
SJ
408 enum ufs_dev_pwr_mode curr_dev_pwr_mode;
409 enum uic_link_state uic_link_state;
410 /* Desired UFS power management level during runtime PM */
411 enum ufs_pm_level rpm_lvl;
412 /* Desired UFS power management level during system PM */
413 enum ufs_pm_level spm_lvl;
414 int pm_op_in_progress;
415
e0eca63e 416 struct ufshcd_lrb *lrb;
5a0b0cb9 417 unsigned long lrb_in_use;
e0eca63e
VH
418
419 unsigned long outstanding_tasks;
420 unsigned long outstanding_reqs;
421
422 u32 capabilities;
423 int nutrs;
424 int nutmrs;
425 u32 ufs_version;
5c0c28a8
SRT
426 struct ufs_hba_variant_ops *vops;
427 void *priv;
e0eca63e 428 unsigned int irq;
57d104c1 429 bool is_irq_enabled;
e0eca63e 430
b852190e
YG
431 /* Interrupt aggregation support is broken */
432 #define UFSHCD_QUIRK_BROKEN_INTR_AGGR UFS_BIT(0)
433
cad2e03d
YG
434 /*
435 * delay before each dme command is required as the unipro
436 * layer has shown instabilities
437 */
b852190e
YG
438 #define UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS UFS_BIT(1)
439
7ca38cf3
YG
440 /*
441 * If UFS host controller is having issue in processing LCC (Line
442 * Control Command) coming from device then enable this quirk.
443 * When this quirk is enabled, host controller driver should disable
444 * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
445 * attribute of device to 0).
446 */
447 #define UFSHCD_QUIRK_BROKEN_LCC UFS_BIT(2)
cad2e03d 448
c3a2f9ee
YG
449 /*
450 * The attribute PA_RXHSUNTERMCAP specifies whether or not the
451 * inbound Link supports unterminated line in HS mode. Setting this
452 * attribute to 1 fixes moving to HS gear.
453 */
454 #define UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP UFS_BIT(3)
455
874237f7
YG
456 /*
457 * This quirk needs to be enabled if the host contoller only allows
458 * accessing the peer dme attributes in AUTO mode (FAST AUTO or
459 * SLOW AUTO).
460 */
461 #define UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE UFS_BIT(4)
462
9949e702
YG
463 /*
464 * This quirk needs to be enabled if the host contoller doesn't
465 * advertise the correct version in UFS_VER register. If this quirk
466 * is enabled, standard UFS host driver will call the vendor specific
467 * ops (get_ufs_hci_version) to get the correct version.
468 */
469 #define UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION UFS_BIT(5)
470
cad2e03d 471 unsigned int quirks; /* Deviations from standard UFSHCI spec. */
6ccf44fe 472
c58ab7aa
YG
473 /* Device deviations from standard UFS device spec. */
474 unsigned int dev_quirks;
475
e2933132
SRT
476 wait_queue_head_t tm_wq;
477 wait_queue_head_t tm_tag_wq;
e0eca63e 478 unsigned long tm_condition;
e2933132 479 unsigned long tm_slots_in_use;
e0eca63e 480
57d104c1
SJ
481 struct uic_command *active_uic_cmd;
482 struct mutex uic_cmd_mutex;
483 struct completion *uic_async_done;
53b3d9c3 484
e0eca63e 485 u32 ufshcd_state;
3441da7d 486 u32 eh_flags;
2fbd009b 487 u32 intr_mask;
66ec6d59 488 u16 ee_ctrl_mask;
1d337ec2 489 bool is_powered;
3a4bf06d
YG
490 bool is_init_prefetch;
491 struct ufs_init_prefetch init_prefetch_data;
e0eca63e
VH
492
493 /* Work Queues */
e8e7f271 494 struct work_struct eh_work;
66ec6d59 495 struct work_struct eeh_work;
e0eca63e
VH
496
497 /* HBA Errors */
498 u32 errors;
e8e7f271
SRT
499 u32 uic_error;
500 u32 saved_err;
501 u32 saved_uic_err;
5a0b0cb9
SRT
502
503 /* Device management request data */
504 struct ufs_dev_cmd dev_cmd;
cad2e03d 505 ktime_t last_dme_cmd_tstamp;
66ec6d59 506
57d104c1
SJ
507 /* Keeps information of the UFS device connected to this host */
508 struct ufs_dev_info dev_info;
66ec6d59 509 bool auto_bkops_enabled;
aa497613 510 struct ufs_vreg_info vreg_info;
c6e79dac 511 struct list_head clk_list_head;
57d104c1
SJ
512
513 bool wlun_dev_clr_ua;
7eb584db 514
54b879b7
YG
515 /* Number of lanes available (1 or 2) for Rx/Tx */
516 u32 lanes_per_direction;
7eb584db
DR
517 struct ufs_pa_layer_attr pwr_info;
518 struct ufs_pwr_mode_info max_pwr_info;
1ab27c9c
ST
519
520 struct ufs_clk_gating clk_gating;
521 /* Control to enable/disable host capabilities */
522 u32 caps;
523 /* Allow dynamic clk gating */
524#define UFSHCD_CAP_CLK_GATING (1 << 0)
525 /* Allow hiberb8 with clk gating */
526#define UFSHCD_CAP_HIBERN8_WITH_CLK_GATING (1 << 1)
856b3483
ST
527 /* Allow dynamic clk scaling */
528#define UFSHCD_CAP_CLK_SCALING (1 << 2)
374a246e
SJ
529 /* Allow auto bkops to enabled during runtime suspend */
530#define UFSHCD_CAP_AUTO_BKOPS_SUSPEND (1 << 3)
b852190e
YG
531 /*
532 * This capability allows host controller driver to use the UFS HCI's
533 * interrupt aggregation capability.
534 * CAUTION: Enabling this might reduce overall UFS throughput.
535 */
536#define UFSHCD_CAP_INTR_AGGR (1 << 4)
856b3483
ST
537
538 struct devfreq *devfreq;
539 struct ufs_clk_scaling clk_scaling;
e785060e 540 bool is_sys_suspended;
e0eca63e
VH
541};
542
1ab27c9c
ST
543/* Returns true if clocks can be gated. Otherwise false */
544static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
545{
546 return hba->caps & UFSHCD_CAP_CLK_GATING;
547}
548static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
549{
550 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
551}
856b3483
ST
552static inline int ufshcd_is_clkscaling_enabled(struct ufs_hba *hba)
553{
554 return hba->caps & UFSHCD_CAP_CLK_SCALING;
555}
374a246e
SJ
556static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
557{
558 return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
559}
560
b852190e
YG
561static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
562{
563 if ((hba->caps & UFSHCD_CAP_INTR_AGGR) &&
564 !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR))
565 return true;
566 else
567 return false;
568}
569
b873a275
SJ
570#define ufshcd_writel(hba, val, reg) \
571 writel((val), (hba)->mmio_base + (reg))
572#define ufshcd_readl(hba, reg) \
573 readl((hba)->mmio_base + (reg))
574
e785060e
DR
575/**
576 * ufshcd_rmwl - read modify write into a register
577 * @hba - per adapter instance
578 * @mask - mask to apply on read value
579 * @val - actual value to write
580 * @reg - register address
581 */
582static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
583{
584 u32 tmp;
585
586 tmp = ufshcd_readl(hba, reg);
587 tmp &= ~mask;
588 tmp |= (val & mask);
589 ufshcd_writel(hba, tmp, reg);
590}
591
5c0c28a8 592int ufshcd_alloc_host(struct device *, struct ufs_hba **);
47555a5c 593void ufshcd_dealloc_host(struct ufs_hba *);
5c0c28a8 594int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int);
e0eca63e 595void ufshcd_remove(struct ufs_hba *);
596585a2
YG
596int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
597 u32 val, unsigned long interval_us,
598 unsigned long timeout_ms, bool can_sleep);
e0eca63e 599
68078d5c
DR
600static inline void check_upiu_size(void)
601{
602 BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
603 GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
604}
605
1ce5898a
YG
606/**
607 * ufshcd_set_variant - set variant specific data to the hba
608 * @hba - per adapter instance
609 * @variant - pointer to variant specific data
610 */
611static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant)
612{
613 BUG_ON(!hba);
614 hba->priv = variant;
615}
616
617/**
618 * ufshcd_get_variant - get variant specific data from the hba
619 * @hba - per adapter instance
620 */
621static inline void *ufshcd_get_variant(struct ufs_hba *hba)
622{
623 BUG_ON(!hba);
624 return hba->priv;
625}
626
66ec6d59
SRT
627extern int ufshcd_runtime_suspend(struct ufs_hba *hba);
628extern int ufshcd_runtime_resume(struct ufs_hba *hba);
629extern int ufshcd_runtime_idle(struct ufs_hba *hba);
57d104c1
SJ
630extern int ufshcd_system_suspend(struct ufs_hba *hba);
631extern int ufshcd_system_resume(struct ufs_hba *hba);
632extern int ufshcd_shutdown(struct ufs_hba *hba);
12b4fdb4
SJ
633extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
634 u8 attr_set, u32 mib_val, u8 peer);
635extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
636 u32 *mib_val, u8 peer);
637
638/* UIC command interfaces for DME primitives */
639#define DME_LOCAL 0
640#define DME_PEER 1
641#define ATTR_SET_NOR 0 /* NORMAL */
642#define ATTR_SET_ST 1 /* STATIC */
643
644static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
645 u32 mib_val)
646{
647 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
648 mib_val, DME_LOCAL);
649}
650
651static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
652 u32 mib_val)
653{
654 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
655 mib_val, DME_LOCAL);
656}
657
658static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
659 u32 mib_val)
660{
661 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
662 mib_val, DME_PEER);
663}
664
665static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
666 u32 mib_val)
667{
668 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
669 mib_val, DME_PEER);
670}
671
672static inline int ufshcd_dme_get(struct ufs_hba *hba,
673 u32 attr_sel, u32 *mib_val)
674{
675 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
676}
677
678static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
679 u32 attr_sel, u32 *mib_val)
680{
681 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
682}
683
b573d484
YG
684int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size);
685
686#define ASCII_STD true
687
688int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index, u8 *buf,
689 u32 size, bool ascii);
690
dc3c8d3a
YG
691/* Expose Query-Request API */
692int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
693 enum flag_idn idn, bool *flag_res);
1ab27c9c
ST
694int ufshcd_hold(struct ufs_hba *hba, bool async);
695void ufshcd_release(struct ufs_hba *hba);
0263bcd0
YG
696
697/* Wrapper functions for safely calling variant operations */
698static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
699{
700 if (hba->vops)
701 return hba->vops->name;
702 return "";
703}
704
705static inline int ufshcd_vops_init(struct ufs_hba *hba)
706{
707 if (hba->vops && hba->vops->init)
708 return hba->vops->init(hba);
709
710 return 0;
711}
712
713static inline void ufshcd_vops_exit(struct ufs_hba *hba)
714{
715 if (hba->vops && hba->vops->exit)
716 return hba->vops->exit(hba);
717}
718
719static inline u32 ufshcd_vops_get_ufs_hci_version(struct ufs_hba *hba)
720{
721 if (hba->vops && hba->vops->get_ufs_hci_version)
722 return hba->vops->get_ufs_hci_version(hba);
723
724 return ufshcd_readl(hba, REG_UFS_VERSION);
725}
726
f06fcc71
YG
727static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba,
728 bool up, enum ufs_notify_change_status status)
0263bcd0
YG
729{
730 if (hba->vops && hba->vops->clk_scale_notify)
f06fcc71
YG
731 return hba->vops->clk_scale_notify(hba, up, status);
732 return 0;
0263bcd0
YG
733}
734
735static inline int ufshcd_vops_setup_clocks(struct ufs_hba *hba, bool on)
736{
737 if (hba->vops && hba->vops->setup_clocks)
738 return hba->vops->setup_clocks(hba, on);
0263bcd0
YG
739 return 0;
740}
741
742static inline int ufshcd_vops_setup_regulators(struct ufs_hba *hba, bool status)
743{
744 if (hba->vops && hba->vops->setup_regulators)
745 return hba->vops->setup_regulators(hba, status);
746
747 return 0;
748}
749
750static inline int ufshcd_vops_hce_enable_notify(struct ufs_hba *hba,
751 bool status)
752{
753 if (hba->vops && hba->vops->hce_enable_notify)
754 return hba->vops->hce_enable_notify(hba, status);
755
756 return 0;
757}
758static inline int ufshcd_vops_link_startup_notify(struct ufs_hba *hba,
759 bool status)
760{
761 if (hba->vops && hba->vops->link_startup_notify)
762 return hba->vops->link_startup_notify(hba, status);
763
764 return 0;
765}
766
767static inline int ufshcd_vops_pwr_change_notify(struct ufs_hba *hba,
768 bool status,
769 struct ufs_pa_layer_attr *dev_max_params,
770 struct ufs_pa_layer_attr *dev_req_params)
771{
772 if (hba->vops && hba->vops->pwr_change_notify)
773 return hba->vops->pwr_change_notify(hba, status,
774 dev_max_params, dev_req_params);
775
776 return -ENOTSUPP;
777}
778
779static inline int ufshcd_vops_suspend(struct ufs_hba *hba, enum ufs_pm_op op)
780{
781 if (hba->vops && hba->vops->suspend)
782 return hba->vops->suspend(hba, op);
783
784 return 0;
785}
786
787static inline int ufshcd_vops_resume(struct ufs_hba *hba, enum ufs_pm_op op)
788{
789 if (hba->vops && hba->vops->resume)
790 return hba->vops->resume(hba, op);
791
792 return 0;
793}
794
6e3fd44d
YG
795static inline void ufshcd_vops_dbg_register_dump(struct ufs_hba *hba)
796{
797 if (hba->vops && hba->vops->dbg_register_dump)
798 hba->vops->dbg_register_dump(hba);
799}
800
e0eca63e 801#endif /* End of Header */