scsi: ufs: make sure all interrupts are processed
[linux-2.6-block.git] / drivers / scsi / ufs / ufshcd.h
CommitLineData
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1/*
2 * Universal Flash Storage Host controller driver
3 *
4 * This code is based on drivers/scsi/ufs/ufshcd.h
5 * Copyright (C) 2011-2013 Samsung India Software Operations
dc3c8d3a 6 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
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7 *
8 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
35 */
36
37#ifndef _UFSHCD_H
38#define _UFSHCD_H
39
40#include <linux/module.h>
41#include <linux/kernel.h>
42#include <linux/init.h>
43#include <linux/interrupt.h>
44#include <linux/io.h>
45#include <linux/delay.h>
46#include <linux/slab.h>
47#include <linux/spinlock.h>
a3cd5ec5 48#include <linux/rwsem.h>
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49#include <linux/workqueue.h>
50#include <linux/errno.h>
51#include <linux/types.h>
52#include <linux/wait.h>
53#include <linux/bitops.h>
54#include <linux/pm_runtime.h>
55#include <linux/clk.h>
6ccf44fe 56#include <linux/completion.h>
aa497613 57#include <linux/regulator/consumer.h>
f37aabcf 58#include "unipro.h"
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59
60#include <asm/irq.h>
61#include <asm/byteorder.h>
62#include <scsi/scsi.h>
63#include <scsi/scsi_cmnd.h>
64#include <scsi/scsi_host.h>
65#include <scsi/scsi_tcq.h>
66#include <scsi/scsi_dbg.h>
67#include <scsi/scsi_eh.h>
68
69#include "ufs.h"
70#include "ufshci.h"
71
72#define UFSHCD "ufshcd"
73#define UFSHCD_DRIVER_VERSION "0.2"
74
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75struct ufs_hba;
76
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77enum dev_cmd_type {
78 DEV_CMD_TYPE_NOP = 0x0,
68078d5c 79 DEV_CMD_TYPE_QUERY = 0x1,
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80};
81
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82/**
83 * struct uic_command - UIC command structure
84 * @command: UIC command
85 * @argument1: UIC command argument 1
86 * @argument2: UIC command argument 2
87 * @argument3: UIC command argument 3
88 * @cmd_active: Indicate if UIC command is outstanding
89 * @result: UIC command result
6ccf44fe 90 * @done: UIC command completion
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91 */
92struct uic_command {
93 u32 command;
94 u32 argument1;
95 u32 argument2;
96 u32 argument3;
97 int cmd_active;
98 int result;
6ccf44fe 99 struct completion done;
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100};
101
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102/* Used to differentiate the power management options */
103enum ufs_pm_op {
104 UFS_RUNTIME_PM,
105 UFS_SYSTEM_PM,
106 UFS_SHUTDOWN_PM,
107};
108
109#define ufshcd_is_runtime_pm(op) ((op) == UFS_RUNTIME_PM)
110#define ufshcd_is_system_pm(op) ((op) == UFS_SYSTEM_PM)
111#define ufshcd_is_shutdown_pm(op) ((op) == UFS_SHUTDOWN_PM)
112
113/* Host <-> Device UniPro Link state */
114enum uic_link_state {
115 UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
116 UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
117 UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
118};
119
120#define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
121#define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
122 UIC_LINK_ACTIVE_STATE)
123#define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
124 UIC_LINK_HIBERN8_STATE)
125#define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
126#define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
127 UIC_LINK_ACTIVE_STATE)
128#define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
129 UIC_LINK_HIBERN8_STATE)
130
131/*
132 * UFS Power management levels.
133 * Each level is in increasing order of power savings.
134 */
135enum ufs_pm_level {
136 UFS_PM_LVL_0, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE */
137 UFS_PM_LVL_1, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE */
138 UFS_PM_LVL_2, /* UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE */
139 UFS_PM_LVL_3, /* UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE */
140 UFS_PM_LVL_4, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE */
141 UFS_PM_LVL_5, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE */
142 UFS_PM_LVL_MAX
143};
144
145struct ufs_pm_lvl_states {
146 enum ufs_dev_pwr_mode dev_state;
147 enum uic_link_state link_state;
148};
149
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150/**
151 * struct ufshcd_lrb - local reference block
152 * @utr_descriptor_ptr: UTRD address of the command
5a0b0cb9 153 * @ucd_req_ptr: UCD address of the command
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154 * @ucd_rsp_ptr: Response UPIU address for this command
155 * @ucd_prdt_ptr: PRDT address of the command
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DR
156 * @utrd_dma_addr: UTRD dma address for debug
157 * @ucd_prdt_dma_addr: PRDT dma address for debug
158 * @ucd_rsp_dma_addr: UPIU response dma address for debug
159 * @ucd_req_dma_addr: UPIU request dma address for debug
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160 * @cmd: pointer to SCSI command
161 * @sense_buffer: pointer to sense buffer address of the SCSI command
162 * @sense_bufflen: Length of the sense buffer
163 * @scsi_status: SCSI status of the command
164 * @command_type: SCSI, UFS, Query.
165 * @task_tag: Task tag of the command
166 * @lun: LUN of the command
5a0b0cb9 167 * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
ff8e20c6 168 * @issue_time_stamp: time stamp for debug purposes
09017188 169 * @compl_time_stamp: time stamp for statistics
e0b299e3 170 * @req_abort_skip: skip request abort task flag
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171 */
172struct ufshcd_lrb {
173 struct utp_transfer_req_desc *utr_descriptor_ptr;
5a0b0cb9 174 struct utp_upiu_req *ucd_req_ptr;
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175 struct utp_upiu_rsp *ucd_rsp_ptr;
176 struct ufshcd_sg_entry *ucd_prdt_ptr;
177
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178 dma_addr_t utrd_dma_addr;
179 dma_addr_t ucd_req_dma_addr;
180 dma_addr_t ucd_rsp_dma_addr;
181 dma_addr_t ucd_prdt_dma_addr;
182
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183 struct scsi_cmnd *cmd;
184 u8 *sense_buffer;
185 unsigned int sense_bufflen;
186 int scsi_status;
187
188 int command_type;
189 int task_tag;
0ce147d4 190 u8 lun; /* UPIU LUN id field is only 8-bit wide */
5a0b0cb9 191 bool intr_cmd;
ff8e20c6 192 ktime_t issue_time_stamp;
09017188 193 ktime_t compl_time_stamp;
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194
195 bool req_abort_skip;
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196};
197
68078d5c 198/**
a230c2f6 199 * struct ufs_query - holds relevant data structures for query request
68078d5c
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200 * @request: request upiu and function
201 * @descriptor: buffer for sending/receiving descriptor
202 * @response: response upiu and response
203 */
204struct ufs_query {
205 struct ufs_query_req request;
206 u8 *descriptor;
207 struct ufs_query_res response;
208};
209
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210/**
211 * struct ufs_dev_cmd - all assosiated fields with device management commands
212 * @type: device management command type - Query, NOP OUT
213 * @lock: lock to allow one command at a time
214 * @complete: internal commands completion
215 * @tag_wq: wait queue until free command slot is available
216 */
217struct ufs_dev_cmd {
218 enum dev_cmd_type type;
219 struct mutex lock;
220 struct completion *complete;
221 wait_queue_head_t tag_wq;
68078d5c 222 struct ufs_query query;
5a0b0cb9 223};
e0eca63e 224
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225struct ufs_desc_size {
226 int dev_desc;
227 int pwr_desc;
228 int geom_desc;
229 int interc_desc;
230 int unit_desc;
231 int conf_desc;
c648c2d2 232 int hlth_desc;
a4b0e8a4
PM
233};
234
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235/**
236 * struct ufs_clk_info - UFS clock related info
237 * @list: list headed by hba->clk_list_head
238 * @clk: clock node
239 * @name: clock name
240 * @max_freq: maximum frequency supported by the clock
4cff6d99 241 * @min_freq: min frequency that can be used for clock scaling
856b3483 242 * @curr_freq: indicates the current frequency that it is set to
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243 * @enabled: variable to check against multiple enable/disable
244 */
245struct ufs_clk_info {
246 struct list_head list;
247 struct clk *clk;
248 const char *name;
249 u32 max_freq;
4cff6d99 250 u32 min_freq;
856b3483 251 u32 curr_freq;
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252 bool enabled;
253};
254
f06fcc71
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255enum ufs_notify_change_status {
256 PRE_CHANGE,
257 POST_CHANGE,
258};
7eb584db
DR
259
260struct ufs_pa_layer_attr {
261 u32 gear_rx;
262 u32 gear_tx;
263 u32 lane_rx;
264 u32 lane_tx;
265 u32 pwr_rx;
266 u32 pwr_tx;
267 u32 hs_rate;
268};
269
270struct ufs_pwr_mode_info {
271 bool is_valid;
272 struct ufs_pa_layer_attr info;
273};
274
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275/**
276 * struct ufs_hba_variant_ops - variant specific callbacks
277 * @name: variant name
278 * @init: called when the driver is initialized
279 * @exit: called to cleanup everything done in init
9949e702 280 * @get_ufs_hci_version: called to get UFS HCI version
856b3483 281 * @clk_scale_notify: notifies that clks are scaled up/down
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282 * @setup_clocks: called before touching any of the controller registers
283 * @setup_regulators: called before accessing the host controller
284 * @hce_enable_notify: called before and after HCE enable bit is set to allow
285 * variant specific Uni-Pro initialization.
286 * @link_startup_notify: called before and after Link startup is carried out
287 * to allow variant specific Uni-Pro initialization.
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288 * @pwr_change_notify: called before and after a power mode change
289 * is carried out to allow vendor spesific capabilities
290 * to be set.
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291 * @setup_xfer_req: called before any transfer request is issued
292 * to set some things
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293 * @setup_task_mgmt: called before any task management request is issued
294 * to set some things
ee32c909 295 * @hibern8_notify: called around hibern8 enter/exit
56d4a186 296 * @apply_dev_quirks: called to apply device specific quirks
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297 * @suspend: called during host controller PM callback
298 * @resume: called during host controller PM callback
6e3fd44d 299 * @dbg_register_dump: used to dump controller debug information
4b9ffb5a 300 * @phy_initialization: used to initialize phys
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301 */
302struct ufs_hba_variant_ops {
303 const char *name;
304 int (*init)(struct ufs_hba *);
305 void (*exit)(struct ufs_hba *);
9949e702 306 u32 (*get_ufs_hci_version)(struct ufs_hba *);
f06fcc71
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307 int (*clk_scale_notify)(struct ufs_hba *, bool,
308 enum ufs_notify_change_status);
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309 int (*setup_clocks)(struct ufs_hba *, bool,
310 enum ufs_notify_change_status);
5c0c28a8 311 int (*setup_regulators)(struct ufs_hba *, bool);
f06fcc71
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312 int (*hce_enable_notify)(struct ufs_hba *,
313 enum ufs_notify_change_status);
314 int (*link_startup_notify)(struct ufs_hba *,
315 enum ufs_notify_change_status);
7eb584db 316 int (*pwr_change_notify)(struct ufs_hba *,
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317 enum ufs_notify_change_status status,
318 struct ufs_pa_layer_attr *,
7eb584db 319 struct ufs_pa_layer_attr *);
0e675efa 320 void (*setup_xfer_req)(struct ufs_hba *, int, bool);
d2877be4 321 void (*setup_task_mgmt)(struct ufs_hba *, int, u8);
ee32c909 322 void (*hibern8_notify)(struct ufs_hba *, enum uic_cmd_dme,
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323 enum ufs_notify_change_status);
324 int (*apply_dev_quirks)(struct ufs_hba *);
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325 int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
326 int (*resume)(struct ufs_hba *, enum ufs_pm_op);
6e3fd44d 327 void (*dbg_register_dump)(struct ufs_hba *hba);
4b9ffb5a 328 int (*phy_initialization)(struct ufs_hba *);
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329};
330
1ab27c9c
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331/* clock gating state */
332enum clk_gating_state {
333 CLKS_OFF,
334 CLKS_ON,
335 REQ_CLKS_OFF,
336 REQ_CLKS_ON,
337};
338
339/**
340 * struct ufs_clk_gating - UFS clock gating related info
341 * @gate_work: worker to turn off clocks after some delay as specified in
342 * delay_ms
343 * @ungate_work: worker to turn on clocks that will be used in case of
344 * interrupt context
345 * @state: the current clocks state
346 * @delay_ms: gating delay in ms
347 * @is_suspended: clk gating is suspended when set to 1 which can be used
348 * during suspend/resume
349 * @delay_attr: sysfs attribute to control delay_attr
b427411a
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350 * @enable_attr: sysfs attribute to enable/disable clock gating
351 * @is_enabled: Indicates the current status of clock gating
1ab27c9c
ST
352 * @active_reqs: number of requests that are pending and should be waited for
353 * completion before gating clocks.
354 */
355struct ufs_clk_gating {
356 struct delayed_work gate_work;
357 struct work_struct ungate_work;
358 enum clk_gating_state state;
359 unsigned long delay_ms;
360 bool is_suspended;
361 struct device_attribute delay_attr;
b427411a
ST
362 struct device_attribute enable_attr;
363 bool is_enabled;
1ab27c9c
ST
364 int active_reqs;
365};
366
a3cd5ec5 367struct ufs_saved_pwr_info {
368 struct ufs_pa_layer_attr info;
369 bool is_valid;
370};
371
401f1e44 372/**
373 * struct ufs_clk_scaling - UFS clock scaling related data
374 * @active_reqs: number of requests that are pending. If this is zero when
375 * devfreq ->target() function is called then schedule "suspend_work" to
376 * suspend devfreq.
377 * @tot_busy_t: Total busy time in current polling window
378 * @window_start_t: Start time (in jiffies) of the current polling window
379 * @busy_start_t: Start time of current busy period
380 * @enable_attr: sysfs attribute to enable/disable clock scaling
381 * @saved_pwr_info: UFS power mode may also be changed during scaling and this
382 * one keeps track of previous power mode.
383 * @workq: workqueue to schedule devfreq suspend/resume work
384 * @suspend_work: worker to suspend devfreq
385 * @resume_work: worker to resume devfreq
386 * @is_allowed: tracks if scaling is currently allowed or not
387 * @is_busy_started: tracks if busy period has started or not
388 * @is_suspended: tracks if devfreq is suspended or not
389 */
856b3483 390struct ufs_clk_scaling {
401f1e44 391 int active_reqs;
392 unsigned long tot_busy_t;
856b3483 393 unsigned long window_start_t;
401f1e44 394 ktime_t busy_start_t;
fcb0c4b0 395 struct device_attribute enable_attr;
a3cd5ec5 396 struct ufs_saved_pwr_info saved_pwr_info;
401f1e44 397 struct workqueue_struct *workq;
398 struct work_struct suspend_work;
399 struct work_struct resume_work;
400 bool is_allowed;
401 bool is_busy_started;
402 bool is_suspended;
856b3483
ST
403};
404
3a4bf06d
YG
405/**
406 * struct ufs_init_prefetch - contains data that is pre-fetched once during
407 * initialization
408 * @icc_level: icc level which was read during initialization
409 */
410struct ufs_init_prefetch {
411 u32 icc_level;
412};
413
ff8e20c6
DR
414#define UIC_ERR_REG_HIST_LENGTH 8
415/**
416 * struct ufs_uic_err_reg_hist - keeps history of uic errors
417 * @pos: index to indicate cyclic buffer position
418 * @reg: cyclic buffer for registers value
419 * @tstamp: cyclic buffer for time stamp
420 */
421struct ufs_uic_err_reg_hist {
422 int pos;
423 u32 reg[UIC_ERR_REG_HIST_LENGTH];
424 ktime_t tstamp[UIC_ERR_REG_HIST_LENGTH];
425};
426
427/**
428 * struct ufs_stats - keeps usage/err statistics
429 * @hibern8_exit_cnt: Counter to keep track of number of exits,
430 * reset this after link-startup.
431 * @last_hibern8_exit_tstamp: Set time after the hibern8 exit.
432 * Clear after the first successful command completion.
433 * @pa_err: tracks pa-uic errors
434 * @dl_err: tracks dl-uic errors
435 * @nl_err: tracks nl-uic errors
436 * @tl_err: tracks tl-uic errors
437 * @dme_err: tracks dme errors
438 */
439struct ufs_stats {
440 u32 hibern8_exit_cnt;
441 ktime_t last_hibern8_exit_tstamp;
442 struct ufs_uic_err_reg_hist pa_err;
443 struct ufs_uic_err_reg_hist dl_err;
444 struct ufs_uic_err_reg_hist nl_err;
445 struct ufs_uic_err_reg_hist tl_err;
446 struct ufs_uic_err_reg_hist dme_err;
447};
448
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449/**
450 * struct ufs_hba - per adapter private structure
451 * @mmio_base: UFSHCI base register address
452 * @ucdl_base_addr: UFS Command Descriptor base address
453 * @utrdl_base_addr: UTP Transfer Request Descriptor base address
454 * @utmrdl_base_addr: UTP Task Management Descriptor base address
455 * @ucdl_dma_addr: UFS Command Descriptor DMA address
456 * @utrdl_dma_addr: UTRDL DMA address
457 * @utmrdl_dma_addr: UTMRDL DMA address
458 * @host: Scsi_Host instance of the driver
459 * @dev: device handle
460 * @lrb: local reference block
5a0b0cb9 461 * @lrb_in_use: lrb in use
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462 * @outstanding_tasks: Bits representing outstanding task requests
463 * @outstanding_reqs: Bits representing outstanding transfer requests
464 * @capabilities: UFS Controller Capabilities
465 * @nutrs: Transfer Request Queue depth supported by controller
466 * @nutmrs: Task Management Queue depth supported by controller
467 * @ufs_version: UFS Version to which controller complies
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468 * @vops: pointer to variant specific operations
469 * @priv: pointer to variant specific private data
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470 * @irq: Irq number of the controller
471 * @active_uic_cmd: handle of active UIC command
6ccf44fe 472 * @uic_cmd_mutex: mutex for uic command
e2933132
SRT
473 * @tm_wq: wait queue for task management
474 * @tm_tag_wq: wait queue for free task management slots
475 * @tm_slots_in_use: bit map of task management request slots in use
53b3d9c3 476 * @pwr_done: completion for power mode change
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477 * @tm_condition: condition variable for task management
478 * @ufshcd_state: UFSHCD states
3441da7d 479 * @eh_flags: Error handling flags
2fbd009b 480 * @intr_mask: Interrupt Mask Bits
66ec6d59 481 * @ee_ctrl_mask: Exception event control mask
1d337ec2 482 * @is_powered: flag to check if HBA is powered
3a4bf06d
YG
483 * @is_init_prefetch: flag to check if data was pre-fetched in initialization
484 * @init_prefetch_data: data pre-fetched during initialization
e8e7f271 485 * @eh_work: Worker to handle UFS errors that require s/w attention
66ec6d59 486 * @eeh_work: Worker to handle exception events
e0eca63e 487 * @errors: HBA errors
e8e7f271
SRT
488 * @uic_error: UFS interconnect layer error status
489 * @saved_err: sticky error mask
490 * @saved_uic_err: sticky UIC error mask
5a0b0cb9 491 * @dev_cmd: ufs device management command information
cad2e03d 492 * @last_dme_cmd_tstamp: time stamp of the last completed DME command
66ec6d59 493 * @auto_bkops_enabled: to track whether bkops is enabled in device
aa497613 494 * @vreg_info: UFS device voltage regulator information
c6e79dac 495 * @clk_list_head: UFS host controller clocks list node head
7eb584db
DR
496 * @pwr_info: holds current power mode
497 * @max_pwr_info: keeps the device max valid pwm
a4b0e8a4 498 * @desc_size: descriptor sizes reported by device
afdfff59
YG
499 * @urgent_bkops_lvl: keeps track of urgent bkops level for device
500 * @is_urgent_bkops_lvl_checked: keeps track if the urgent bkops level for
501 * device is known or not.
38135535 502 * @scsi_block_reqs_cnt: reference counting for scsi block requests
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VH
503 */
504struct ufs_hba {
505 void __iomem *mmio_base;
506
507 /* Virtual memory reference */
508 struct utp_transfer_cmd_desc *ucdl_base_addr;
509 struct utp_transfer_req_desc *utrdl_base_addr;
510 struct utp_task_req_desc *utmrdl_base_addr;
511
512 /* DMA memory reference */
513 dma_addr_t ucdl_dma_addr;
514 dma_addr_t utrdl_dma_addr;
515 dma_addr_t utmrdl_dma_addr;
516
517 struct Scsi_Host *host;
518 struct device *dev;
2a8fa600
SJ
519 /*
520 * This field is to keep a reference to "scsi_device" corresponding to
521 * "UFS device" W-LU.
522 */
523 struct scsi_device *sdev_ufs_device;
e0eca63e 524
57d104c1
SJ
525 enum ufs_dev_pwr_mode curr_dev_pwr_mode;
526 enum uic_link_state uic_link_state;
527 /* Desired UFS power management level during runtime PM */
528 enum ufs_pm_level rpm_lvl;
529 /* Desired UFS power management level during system PM */
530 enum ufs_pm_level spm_lvl;
09690d5a 531 struct device_attribute rpm_lvl_attr;
532 struct device_attribute spm_lvl_attr;
57d104c1
SJ
533 int pm_op_in_progress;
534
ad448378
AH
535 /* Auto-Hibernate Idle Timer register value */
536 u32 ahit;
537
e0eca63e 538 struct ufshcd_lrb *lrb;
5a0b0cb9 539 unsigned long lrb_in_use;
e0eca63e
VH
540
541 unsigned long outstanding_tasks;
542 unsigned long outstanding_reqs;
543
544 u32 capabilities;
545 int nutrs;
546 int nutmrs;
547 u32 ufs_version;
5c0c28a8
SRT
548 struct ufs_hba_variant_ops *vops;
549 void *priv;
e0eca63e 550 unsigned int irq;
57d104c1 551 bool is_irq_enabled;
e0eca63e 552
b852190e 553 /* Interrupt aggregation support is broken */
cc81641a 554 #define UFSHCD_QUIRK_BROKEN_INTR_AGGR 0x1
b852190e 555
cad2e03d
YG
556 /*
557 * delay before each dme command is required as the unipro
558 * layer has shown instabilities
559 */
cc81641a 560 #define UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS 0x2
b852190e 561
7ca38cf3
YG
562 /*
563 * If UFS host controller is having issue in processing LCC (Line
564 * Control Command) coming from device then enable this quirk.
565 * When this quirk is enabled, host controller driver should disable
566 * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
567 * attribute of device to 0).
568 */
cc81641a 569 #define UFSHCD_QUIRK_BROKEN_LCC 0x4
cad2e03d 570
c3a2f9ee
YG
571 /*
572 * The attribute PA_RXHSUNTERMCAP specifies whether or not the
573 * inbound Link supports unterminated line in HS mode. Setting this
574 * attribute to 1 fixes moving to HS gear.
575 */
cc81641a 576 #define UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP 0x8
c3a2f9ee 577
874237f7
YG
578 /*
579 * This quirk needs to be enabled if the host contoller only allows
580 * accessing the peer dme attributes in AUTO mode (FAST AUTO or
581 * SLOW AUTO).
582 */
cc81641a 583 #define UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE 0x10
874237f7 584
9949e702
YG
585 /*
586 * This quirk needs to be enabled if the host contoller doesn't
587 * advertise the correct version in UFS_VER register. If this quirk
588 * is enabled, standard UFS host driver will call the vendor specific
589 * ops (get_ufs_hci_version) to get the correct version.
590 */
cc81641a 591 #define UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION 0x20
9949e702 592
75b1cc4a
KK
593 /*
594 * This quirk needs to be enabled if the host contoller regards
595 * resolution of the values of PRDTO and PRDTL in UTRD as byte.
596 */
cc81641a 597 #define UFSHCD_QUIRK_PRDT_BYTE_GRAN 0x80
75b1cc4a 598
1399c5b0
AA
599 /*
600 * Clear handling for transfer/task request list is just opposite.
601 */
602 #define UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR 0x100
603
5ac6abc9
AA
604 /*
605 * This quirk needs to be enabled if host controller doesn't allow
606 * that the interrupt aggregation timer and counter are reset by s/w.
607 */
608 #define UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR 0x200
609
4404c5de
AA
610 /*
611 * This quirks needs to be enabled if host controller cannot be
612 * enabled via HCE register.
613 */
614 #define UFSHCI_QUIRK_BROKEN_HCE 0x400
cad2e03d 615 unsigned int quirks; /* Deviations from standard UFSHCI spec. */
6ccf44fe 616
c58ab7aa
YG
617 /* Device deviations from standard UFS device spec. */
618 unsigned int dev_quirks;
619
e2933132
SRT
620 wait_queue_head_t tm_wq;
621 wait_queue_head_t tm_tag_wq;
e0eca63e 622 unsigned long tm_condition;
e2933132 623 unsigned long tm_slots_in_use;
e0eca63e 624
57d104c1
SJ
625 struct uic_command *active_uic_cmd;
626 struct mutex uic_cmd_mutex;
627 struct completion *uic_async_done;
53b3d9c3 628
e0eca63e 629 u32 ufshcd_state;
3441da7d 630 u32 eh_flags;
2fbd009b 631 u32 intr_mask;
66ec6d59 632 u16 ee_ctrl_mask;
1d337ec2 633 bool is_powered;
3a4bf06d
YG
634 bool is_init_prefetch;
635 struct ufs_init_prefetch init_prefetch_data;
e0eca63e
VH
636
637 /* Work Queues */
e8e7f271 638 struct work_struct eh_work;
66ec6d59 639 struct work_struct eeh_work;
e0eca63e
VH
640
641 /* HBA Errors */
642 u32 errors;
e8e7f271
SRT
643 u32 uic_error;
644 u32 saved_err;
645 u32 saved_uic_err;
ff8e20c6 646 struct ufs_stats ufs_stats;
5a0b0cb9
SRT
647
648 /* Device management request data */
649 struct ufs_dev_cmd dev_cmd;
cad2e03d 650 ktime_t last_dme_cmd_tstamp;
66ec6d59 651
57d104c1
SJ
652 /* Keeps information of the UFS device connected to this host */
653 struct ufs_dev_info dev_info;
66ec6d59 654 bool auto_bkops_enabled;
aa497613 655 struct ufs_vreg_info vreg_info;
c6e79dac 656 struct list_head clk_list_head;
57d104c1
SJ
657
658 bool wlun_dev_clr_ua;
7eb584db 659
7fabb77b
GB
660 /* Number of requests aborts */
661 int req_abort_count;
662
54b879b7
YG
663 /* Number of lanes available (1 or 2) for Rx/Tx */
664 u32 lanes_per_direction;
7eb584db
DR
665 struct ufs_pa_layer_attr pwr_info;
666 struct ufs_pwr_mode_info max_pwr_info;
1ab27c9c
ST
667
668 struct ufs_clk_gating clk_gating;
669 /* Control to enable/disable host capabilities */
670 u32 caps;
671 /* Allow dynamic clk gating */
672#define UFSHCD_CAP_CLK_GATING (1 << 0)
673 /* Allow hiberb8 with clk gating */
674#define UFSHCD_CAP_HIBERN8_WITH_CLK_GATING (1 << 1)
856b3483
ST
675 /* Allow dynamic clk scaling */
676#define UFSHCD_CAP_CLK_SCALING (1 << 2)
374a246e
SJ
677 /* Allow auto bkops to enabled during runtime suspend */
678#define UFSHCD_CAP_AUTO_BKOPS_SUSPEND (1 << 3)
b852190e
YG
679 /*
680 * This capability allows host controller driver to use the UFS HCI's
681 * interrupt aggregation capability.
682 * CAUTION: Enabling this might reduce overall UFS throughput.
683 */
684#define UFSHCD_CAP_INTR_AGGR (1 << 4)
4e768e76 685 /*
686 * This capability allows the device auto-bkops to be always enabled
687 * except during suspend (both runtime and suspend).
688 * Enabling this capability means that device will always be allowed
689 * to do background operation when it's active but it might degrade
690 * the performance of ongoing read/write operations.
691 */
692#define UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND (1 << 5)
856b3483
ST
693
694 struct devfreq *devfreq;
695 struct ufs_clk_scaling clk_scaling;
e785060e 696 bool is_sys_suspended;
afdfff59
YG
697
698 enum bkops_status urgent_bkops_lvl;
699 bool is_urgent_bkops_lvl_checked;
a3cd5ec5 700
701 struct rw_semaphore clk_scaling_lock;
a4b0e8a4 702 struct ufs_desc_size desc_size;
38135535 703 atomic_t scsi_block_reqs_cnt;
e0eca63e
VH
704};
705
1ab27c9c
ST
706/* Returns true if clocks can be gated. Otherwise false */
707static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
708{
709 return hba->caps & UFSHCD_CAP_CLK_GATING;
710}
711static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
712{
713 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
714}
fcb0c4b0 715static inline int ufshcd_is_clkscaling_supported(struct ufs_hba *hba)
856b3483
ST
716{
717 return hba->caps & UFSHCD_CAP_CLK_SCALING;
718}
374a246e
SJ
719static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
720{
721 return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
722}
723
b852190e
YG
724static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
725{
4b9ffb5a
JP
726/* DWC UFS Core has the Interrupt aggregation feature but is not detectable*/
727#ifndef CONFIG_SCSI_UFS_DWC
b852190e
YG
728 if ((hba->caps & UFSHCD_CAP_INTR_AGGR) &&
729 !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR))
730 return true;
731 else
732 return false;
4b9ffb5a
JP
733#else
734return true;
735#endif
b852190e
YG
736}
737
b873a275
SJ
738#define ufshcd_writel(hba, val, reg) \
739 writel((val), (hba)->mmio_base + (reg))
740#define ufshcd_readl(hba, reg) \
741 readl((hba)->mmio_base + (reg))
742
e785060e
DR
743/**
744 * ufshcd_rmwl - read modify write into a register
745 * @hba - per adapter instance
746 * @mask - mask to apply on read value
747 * @val - actual value to write
748 * @reg - register address
749 */
750static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
751{
752 u32 tmp;
753
754 tmp = ufshcd_readl(hba, reg);
755 tmp &= ~mask;
756 tmp |= (val & mask);
757 ufshcd_writel(hba, tmp, reg);
758}
759
5c0c28a8 760int ufshcd_alloc_host(struct device *, struct ufs_hba **);
47555a5c 761void ufshcd_dealloc_host(struct ufs_hba *);
5c0c28a8 762int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int);
e0eca63e 763void ufshcd_remove(struct ufs_hba *);
596585a2
YG
764int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
765 u32 val, unsigned long interval_us,
766 unsigned long timeout_ms, bool can_sleep);
e0eca63e 767
68078d5c
DR
768static inline void check_upiu_size(void)
769{
770 BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
771 GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
772}
773
1ce5898a
YG
774/**
775 * ufshcd_set_variant - set variant specific data to the hba
776 * @hba - per adapter instance
777 * @variant - pointer to variant specific data
778 */
779static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant)
780{
781 BUG_ON(!hba);
782 hba->priv = variant;
783}
784
785/**
786 * ufshcd_get_variant - get variant specific data from the hba
787 * @hba - per adapter instance
788 */
789static inline void *ufshcd_get_variant(struct ufs_hba *hba)
790{
791 BUG_ON(!hba);
792 return hba->priv;
793}
4e768e76 794static inline bool ufshcd_keep_autobkops_enabled_except_suspend(
795 struct ufs_hba *hba)
796{
797 return hba->caps & UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND;
798}
1ce5898a 799
66ec6d59
SRT
800extern int ufshcd_runtime_suspend(struct ufs_hba *hba);
801extern int ufshcd_runtime_resume(struct ufs_hba *hba);
802extern int ufshcd_runtime_idle(struct ufs_hba *hba);
57d104c1
SJ
803extern int ufshcd_system_suspend(struct ufs_hba *hba);
804extern int ufshcd_system_resume(struct ufs_hba *hba);
805extern int ufshcd_shutdown(struct ufs_hba *hba);
12b4fdb4
SJ
806extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
807 u8 attr_set, u32 mib_val, u8 peer);
808extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
809 u32 *mib_val, u8 peer);
0d846e70
AA
810extern int ufshcd_config_pwr_mode(struct ufs_hba *hba,
811 struct ufs_pa_layer_attr *desired_pwr_mode);
12b4fdb4
SJ
812
813/* UIC command interfaces for DME primitives */
814#define DME_LOCAL 0
815#define DME_PEER 1
816#define ATTR_SET_NOR 0 /* NORMAL */
817#define ATTR_SET_ST 1 /* STATIC */
818
819static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
820 u32 mib_val)
821{
822 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
823 mib_val, DME_LOCAL);
824}
825
826static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
827 u32 mib_val)
828{
829 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
830 mib_val, DME_LOCAL);
831}
832
833static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
834 u32 mib_val)
835{
836 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
837 mib_val, DME_PEER);
838}
839
840static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
841 u32 mib_val)
842{
843 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
844 mib_val, DME_PEER);
845}
846
847static inline int ufshcd_dme_get(struct ufs_hba *hba,
848 u32 attr_sel, u32 *mib_val)
849{
850 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
851}
852
853static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
854 u32 attr_sel, u32 *mib_val)
855{
856 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
857}
858
f37aabcf
YG
859static inline bool ufshcd_is_hs_mode(struct ufs_pa_layer_attr *pwr_info)
860{
861 return (pwr_info->pwr_rx == FAST_MODE ||
862 pwr_info->pwr_rx == FASTAUTO_MODE) &&
863 (pwr_info->pwr_tx == FAST_MODE ||
864 pwr_info->pwr_tx == FASTAUTO_MODE);
865}
866
dc3c8d3a 867/* Expose Query-Request API */
2238d31c
SN
868int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
869 enum query_opcode opcode,
870 enum desc_idn idn, u8 index,
871 u8 selector,
872 u8 *desc_buf, int *buf_len);
45bced87
SN
873int ufshcd_read_desc_param(struct ufs_hba *hba,
874 enum desc_idn desc_id,
875 int desc_index,
876 u8 param_offset,
877 u8 *param_read_buf,
878 u8 param_size);
ec92b59c
SN
879int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
880 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val);
dc3c8d3a
YG
881int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
882 enum flag_idn idn, bool *flag_res);
2238d31c
SN
883int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index,
884 u8 *buf, u32 size, bool ascii);
885
1ab27c9c
ST
886int ufshcd_hold(struct ufs_hba *hba, bool async);
887void ufshcd_release(struct ufs_hba *hba);
a4b0e8a4
PM
888
889int ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id,
890 int *desc_length);
891
37113106 892u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba);
0263bcd0
YG
893
894/* Wrapper functions for safely calling variant operations */
895static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
896{
897 if (hba->vops)
898 return hba->vops->name;
899 return "";
900}
901
902static inline int ufshcd_vops_init(struct ufs_hba *hba)
903{
904 if (hba->vops && hba->vops->init)
905 return hba->vops->init(hba);
906
907 return 0;
908}
909
910static inline void ufshcd_vops_exit(struct ufs_hba *hba)
911{
912 if (hba->vops && hba->vops->exit)
913 return hba->vops->exit(hba);
914}
915
916static inline u32 ufshcd_vops_get_ufs_hci_version(struct ufs_hba *hba)
917{
918 if (hba->vops && hba->vops->get_ufs_hci_version)
919 return hba->vops->get_ufs_hci_version(hba);
920
921 return ufshcd_readl(hba, REG_UFS_VERSION);
922}
923
f06fcc71
YG
924static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba,
925 bool up, enum ufs_notify_change_status status)
0263bcd0
YG
926{
927 if (hba->vops && hba->vops->clk_scale_notify)
f06fcc71
YG
928 return hba->vops->clk_scale_notify(hba, up, status);
929 return 0;
0263bcd0
YG
930}
931
1e879e8f
SJ
932static inline int ufshcd_vops_setup_clocks(struct ufs_hba *hba, bool on,
933 enum ufs_notify_change_status status)
0263bcd0
YG
934{
935 if (hba->vops && hba->vops->setup_clocks)
1e879e8f 936 return hba->vops->setup_clocks(hba, on, status);
0263bcd0
YG
937 return 0;
938}
939
940static inline int ufshcd_vops_setup_regulators(struct ufs_hba *hba, bool status)
941{
942 if (hba->vops && hba->vops->setup_regulators)
943 return hba->vops->setup_regulators(hba, status);
944
945 return 0;
946}
947
948static inline int ufshcd_vops_hce_enable_notify(struct ufs_hba *hba,
949 bool status)
950{
951 if (hba->vops && hba->vops->hce_enable_notify)
952 return hba->vops->hce_enable_notify(hba, status);
953
954 return 0;
955}
956static inline int ufshcd_vops_link_startup_notify(struct ufs_hba *hba,
957 bool status)
958{
959 if (hba->vops && hba->vops->link_startup_notify)
960 return hba->vops->link_startup_notify(hba, status);
961
962 return 0;
963}
964
965static inline int ufshcd_vops_pwr_change_notify(struct ufs_hba *hba,
966 bool status,
967 struct ufs_pa_layer_attr *dev_max_params,
968 struct ufs_pa_layer_attr *dev_req_params)
969{
970 if (hba->vops && hba->vops->pwr_change_notify)
971 return hba->vops->pwr_change_notify(hba, status,
972 dev_max_params, dev_req_params);
973
974 return -ENOTSUPP;
975}
976
0e675efa
KK
977static inline void ufshcd_vops_setup_xfer_req(struct ufs_hba *hba, int tag,
978 bool is_scsi_cmd)
979{
980 if (hba->vops && hba->vops->setup_xfer_req)
981 return hba->vops->setup_xfer_req(hba, tag, is_scsi_cmd);
982}
983
d2877be4
KK
984static inline void ufshcd_vops_setup_task_mgmt(struct ufs_hba *hba,
985 int tag, u8 tm_function)
986{
987 if (hba->vops && hba->vops->setup_task_mgmt)
988 return hba->vops->setup_task_mgmt(hba, tag, tm_function);
989}
990
ee32c909
KK
991static inline void ufshcd_vops_hibern8_notify(struct ufs_hba *hba,
992 enum uic_cmd_dme cmd,
993 enum ufs_notify_change_status status)
994{
995 if (hba->vops && hba->vops->hibern8_notify)
996 return hba->vops->hibern8_notify(hba, cmd, status);
997}
998
56d4a186
SJ
999static inline int ufshcd_vops_apply_dev_quirks(struct ufs_hba *hba)
1000{
1001 if (hba->vops && hba->vops->apply_dev_quirks)
1002 return hba->vops->apply_dev_quirks(hba);
1003 return 0;
1004}
1005
0263bcd0
YG
1006static inline int ufshcd_vops_suspend(struct ufs_hba *hba, enum ufs_pm_op op)
1007{
1008 if (hba->vops && hba->vops->suspend)
1009 return hba->vops->suspend(hba, op);
1010
1011 return 0;
1012}
1013
1014static inline int ufshcd_vops_resume(struct ufs_hba *hba, enum ufs_pm_op op)
1015{
1016 if (hba->vops && hba->vops->resume)
1017 return hba->vops->resume(hba, op);
1018
1019 return 0;
1020}
1021
6e3fd44d
YG
1022static inline void ufshcd_vops_dbg_register_dump(struct ufs_hba *hba)
1023{
1024 if (hba->vops && hba->vops->dbg_register_dump)
1025 hba->vops->dbg_register_dump(hba);
1026}
1027
cbb6813e
SN
1028extern struct ufs_pm_lvl_states ufs_pm_lvl_states[];
1029
d829fc8a
SN
1030/*
1031 * ufshcd_scsi_to_upiu_lun - maps scsi LUN to UPIU LUN
1032 * @scsi_lun: scsi LUN id
1033 *
1034 * Returns UPIU LUN id
1035 */
1036static inline u8 ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)
1037{
1038 if (scsi_is_wlun(scsi_lun))
1039 return (scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID)
1040 | UFS_UPIU_WLUN_ID;
1041 else
1042 return scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID;
1043}
1044
e0eca63e 1045#endif /* End of Header */