scsi: ufs: Clean up ufshcd_scale_clks() and clock scaling error out path
[linux-2.6-block.git] / drivers / scsi / ufs / ufshcd.h
CommitLineData
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1/*
2 * Universal Flash Storage Host controller driver
3 *
4 * This code is based on drivers/scsi/ufs/ufshcd.h
5 * Copyright (C) 2011-2013 Samsung India Software Operations
dc3c8d3a 6 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
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7 *
8 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
35 */
36
37#ifndef _UFSHCD_H
38#define _UFSHCD_H
39
40#include <linux/module.h>
41#include <linux/kernel.h>
42#include <linux/init.h>
43#include <linux/interrupt.h>
44#include <linux/io.h>
45#include <linux/delay.h>
46#include <linux/slab.h>
47#include <linux/spinlock.h>
a3cd5ec5 48#include <linux/rwsem.h>
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49#include <linux/workqueue.h>
50#include <linux/errno.h>
51#include <linux/types.h>
52#include <linux/wait.h>
53#include <linux/bitops.h>
54#include <linux/pm_runtime.h>
55#include <linux/clk.h>
6ccf44fe 56#include <linux/completion.h>
aa497613 57#include <linux/regulator/consumer.h>
5a244e0e 58#include <linux/bitfield.h>
2c75f9a5 59#include <linux/devfreq.h>
f37aabcf 60#include "unipro.h"
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61
62#include <asm/irq.h>
63#include <asm/byteorder.h>
64#include <scsi/scsi.h>
65#include <scsi/scsi_cmnd.h>
66#include <scsi/scsi_host.h>
67#include <scsi/scsi_tcq.h>
68#include <scsi/scsi_dbg.h>
69#include <scsi/scsi_eh.h>
70
71#include "ufs.h"
72#include "ufshci.h"
73
74#define UFSHCD "ufshcd"
75#define UFSHCD_DRIVER_VERSION "0.2"
76
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77struct ufs_hba;
78
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79enum dev_cmd_type {
80 DEV_CMD_TYPE_NOP = 0x0,
68078d5c 81 DEV_CMD_TYPE_QUERY = 0x1,
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82};
83
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84/**
85 * struct uic_command - UIC command structure
86 * @command: UIC command
87 * @argument1: UIC command argument 1
88 * @argument2: UIC command argument 2
89 * @argument3: UIC command argument 3
90 * @cmd_active: Indicate if UIC command is outstanding
91 * @result: UIC command result
6ccf44fe 92 * @done: UIC command completion
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93 */
94struct uic_command {
95 u32 command;
96 u32 argument1;
97 u32 argument2;
98 u32 argument3;
99 int cmd_active;
100 int result;
6ccf44fe 101 struct completion done;
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102};
103
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104/* Used to differentiate the power management options */
105enum ufs_pm_op {
106 UFS_RUNTIME_PM,
107 UFS_SYSTEM_PM,
108 UFS_SHUTDOWN_PM,
109};
110
111#define ufshcd_is_runtime_pm(op) ((op) == UFS_RUNTIME_PM)
112#define ufshcd_is_system_pm(op) ((op) == UFS_SYSTEM_PM)
113#define ufshcd_is_shutdown_pm(op) ((op) == UFS_SHUTDOWN_PM)
114
115/* Host <-> Device UniPro Link state */
116enum uic_link_state {
117 UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
118 UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
119 UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
120};
121
122#define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
123#define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
124 UIC_LINK_ACTIVE_STATE)
125#define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
126 UIC_LINK_HIBERN8_STATE)
127#define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
128#define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
129 UIC_LINK_ACTIVE_STATE)
130#define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
131 UIC_LINK_HIBERN8_STATE)
132
133/*
134 * UFS Power management levels.
135 * Each level is in increasing order of power savings.
136 */
137enum ufs_pm_level {
138 UFS_PM_LVL_0, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE */
139 UFS_PM_LVL_1, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE */
140 UFS_PM_LVL_2, /* UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE */
141 UFS_PM_LVL_3, /* UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE */
142 UFS_PM_LVL_4, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE */
143 UFS_PM_LVL_5, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE */
144 UFS_PM_LVL_MAX
145};
146
147struct ufs_pm_lvl_states {
148 enum ufs_dev_pwr_mode dev_state;
149 enum uic_link_state link_state;
150};
151
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152/**
153 * struct ufshcd_lrb - local reference block
154 * @utr_descriptor_ptr: UTRD address of the command
5a0b0cb9 155 * @ucd_req_ptr: UCD address of the command
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156 * @ucd_rsp_ptr: Response UPIU address for this command
157 * @ucd_prdt_ptr: PRDT address of the command
ff8e20c6
DR
158 * @utrd_dma_addr: UTRD dma address for debug
159 * @ucd_prdt_dma_addr: PRDT dma address for debug
160 * @ucd_rsp_dma_addr: UPIU response dma address for debug
161 * @ucd_req_dma_addr: UPIU request dma address for debug
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162 * @cmd: pointer to SCSI command
163 * @sense_buffer: pointer to sense buffer address of the SCSI command
164 * @sense_bufflen: Length of the sense buffer
165 * @scsi_status: SCSI status of the command
166 * @command_type: SCSI, UFS, Query.
167 * @task_tag: Task tag of the command
168 * @lun: LUN of the command
5a0b0cb9 169 * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
ff8e20c6 170 * @issue_time_stamp: time stamp for debug purposes
09017188 171 * @compl_time_stamp: time stamp for statistics
e0b299e3 172 * @req_abort_skip: skip request abort task flag
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173 */
174struct ufshcd_lrb {
175 struct utp_transfer_req_desc *utr_descriptor_ptr;
5a0b0cb9 176 struct utp_upiu_req *ucd_req_ptr;
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177 struct utp_upiu_rsp *ucd_rsp_ptr;
178 struct ufshcd_sg_entry *ucd_prdt_ptr;
179
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DR
180 dma_addr_t utrd_dma_addr;
181 dma_addr_t ucd_req_dma_addr;
182 dma_addr_t ucd_rsp_dma_addr;
183 dma_addr_t ucd_prdt_dma_addr;
184
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185 struct scsi_cmnd *cmd;
186 u8 *sense_buffer;
187 unsigned int sense_bufflen;
188 int scsi_status;
189
190 int command_type;
191 int task_tag;
0ce147d4 192 u8 lun; /* UPIU LUN id field is only 8-bit wide */
5a0b0cb9 193 bool intr_cmd;
ff8e20c6 194 ktime_t issue_time_stamp;
09017188 195 ktime_t compl_time_stamp;
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196
197 bool req_abort_skip;
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198};
199
68078d5c 200/**
a230c2f6 201 * struct ufs_query - holds relevant data structures for query request
68078d5c
DR
202 * @request: request upiu and function
203 * @descriptor: buffer for sending/receiving descriptor
204 * @response: response upiu and response
205 */
206struct ufs_query {
207 struct ufs_query_req request;
208 u8 *descriptor;
209 struct ufs_query_res response;
210};
211
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SRT
212/**
213 * struct ufs_dev_cmd - all assosiated fields with device management commands
214 * @type: device management command type - Query, NOP OUT
215 * @lock: lock to allow one command at a time
216 * @complete: internal commands completion
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217 */
218struct ufs_dev_cmd {
219 enum dev_cmd_type type;
220 struct mutex lock;
221 struct completion *complete;
68078d5c 222 struct ufs_query query;
5a0b0cb9 223};
e0eca63e 224
a4b0e8a4
PM
225struct ufs_desc_size {
226 int dev_desc;
227 int pwr_desc;
228 int geom_desc;
229 int interc_desc;
230 int unit_desc;
231 int conf_desc;
c648c2d2 232 int hlth_desc;
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PM
233};
234
c6e79dac
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235/**
236 * struct ufs_clk_info - UFS clock related info
237 * @list: list headed by hba->clk_list_head
238 * @clk: clock node
239 * @name: clock name
240 * @max_freq: maximum frequency supported by the clock
4cff6d99 241 * @min_freq: min frequency that can be used for clock scaling
856b3483 242 * @curr_freq: indicates the current frequency that it is set to
c6e79dac
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243 * @enabled: variable to check against multiple enable/disable
244 */
245struct ufs_clk_info {
246 struct list_head list;
247 struct clk *clk;
248 const char *name;
249 u32 max_freq;
4cff6d99 250 u32 min_freq;
856b3483 251 u32 curr_freq;
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252 bool enabled;
253};
254
f06fcc71
YG
255enum ufs_notify_change_status {
256 PRE_CHANGE,
257 POST_CHANGE,
258};
7eb584db
DR
259
260struct ufs_pa_layer_attr {
261 u32 gear_rx;
262 u32 gear_tx;
263 u32 lane_rx;
264 u32 lane_tx;
265 u32 pwr_rx;
266 u32 pwr_tx;
267 u32 hs_rate;
268};
269
270struct ufs_pwr_mode_info {
271 bool is_valid;
272 struct ufs_pa_layer_attr info;
273};
274
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275/**
276 * struct ufs_hba_variant_ops - variant specific callbacks
277 * @name: variant name
278 * @init: called when the driver is initialized
279 * @exit: called to cleanup everything done in init
9949e702 280 * @get_ufs_hci_version: called to get UFS HCI version
856b3483 281 * @clk_scale_notify: notifies that clks are scaled up/down
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282 * @setup_clocks: called before touching any of the controller registers
283 * @setup_regulators: called before accessing the host controller
284 * @hce_enable_notify: called before and after HCE enable bit is set to allow
285 * variant specific Uni-Pro initialization.
286 * @link_startup_notify: called before and after Link startup is carried out
287 * to allow variant specific Uni-Pro initialization.
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288 * @pwr_change_notify: called before and after a power mode change
289 * is carried out to allow vendor spesific capabilities
290 * to be set.
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291 * @setup_xfer_req: called before any transfer request is issued
292 * to set some things
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293 * @setup_task_mgmt: called before any task management request is issued
294 * to set some things
ee32c909 295 * @hibern8_notify: called around hibern8 enter/exit
56d4a186 296 * @apply_dev_quirks: called to apply device specific quirks
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297 * @suspend: called during host controller PM callback
298 * @resume: called during host controller PM callback
6e3fd44d 299 * @dbg_register_dump: used to dump controller debug information
4b9ffb5a 300 * @phy_initialization: used to initialize phys
d8d9f793 301 * @device_reset: called to issue a reset pulse on the UFS device
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302 */
303struct ufs_hba_variant_ops {
304 const char *name;
305 int (*init)(struct ufs_hba *);
306 void (*exit)(struct ufs_hba *);
9949e702 307 u32 (*get_ufs_hci_version)(struct ufs_hba *);
f06fcc71
YG
308 int (*clk_scale_notify)(struct ufs_hba *, bool,
309 enum ufs_notify_change_status);
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SJ
310 int (*setup_clocks)(struct ufs_hba *, bool,
311 enum ufs_notify_change_status);
5c0c28a8 312 int (*setup_regulators)(struct ufs_hba *, bool);
f06fcc71
YG
313 int (*hce_enable_notify)(struct ufs_hba *,
314 enum ufs_notify_change_status);
315 int (*link_startup_notify)(struct ufs_hba *,
316 enum ufs_notify_change_status);
7eb584db 317 int (*pwr_change_notify)(struct ufs_hba *,
f06fcc71
YG
318 enum ufs_notify_change_status status,
319 struct ufs_pa_layer_attr *,
7eb584db 320 struct ufs_pa_layer_attr *);
0e675efa 321 void (*setup_xfer_req)(struct ufs_hba *, int, bool);
d2877be4 322 void (*setup_task_mgmt)(struct ufs_hba *, int, u8);
ee32c909 323 void (*hibern8_notify)(struct ufs_hba *, enum uic_cmd_dme,
56d4a186 324 enum ufs_notify_change_status);
09750066 325 int (*apply_dev_quirks)(struct ufs_hba *hba);
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326 int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
327 int (*resume)(struct ufs_hba *, enum ufs_pm_op);
6e3fd44d 328 void (*dbg_register_dump)(struct ufs_hba *hba);
4b9ffb5a 329 int (*phy_initialization)(struct ufs_hba *);
d8d9f793 330 void (*device_reset)(struct ufs_hba *hba);
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AD
331 void (*config_scaling_param)(struct ufs_hba *hba,
332 struct devfreq_dev_profile *profile,
333 void *data);
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SRT
334};
335
1ab27c9c
ST
336/* clock gating state */
337enum clk_gating_state {
338 CLKS_OFF,
339 CLKS_ON,
340 REQ_CLKS_OFF,
341 REQ_CLKS_ON,
342};
343
344/**
345 * struct ufs_clk_gating - UFS clock gating related info
346 * @gate_work: worker to turn off clocks after some delay as specified in
347 * delay_ms
348 * @ungate_work: worker to turn on clocks that will be used in case of
349 * interrupt context
350 * @state: the current clocks state
351 * @delay_ms: gating delay in ms
352 * @is_suspended: clk gating is suspended when set to 1 which can be used
353 * during suspend/resume
354 * @delay_attr: sysfs attribute to control delay_attr
b427411a
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355 * @enable_attr: sysfs attribute to enable/disable clock gating
356 * @is_enabled: Indicates the current status of clock gating
1ab27c9c
ST
357 * @active_reqs: number of requests that are pending and should be waited for
358 * completion before gating clocks.
359 */
360struct ufs_clk_gating {
361 struct delayed_work gate_work;
362 struct work_struct ungate_work;
363 enum clk_gating_state state;
364 unsigned long delay_ms;
365 bool is_suspended;
366 struct device_attribute delay_attr;
b427411a
ST
367 struct device_attribute enable_attr;
368 bool is_enabled;
1ab27c9c 369 int active_reqs;
10e5e375 370 struct workqueue_struct *clk_gating_workq;
1ab27c9c
ST
371};
372
a3cd5ec5 373struct ufs_saved_pwr_info {
374 struct ufs_pa_layer_attr info;
375 bool is_valid;
376};
377
401f1e44 378/**
379 * struct ufs_clk_scaling - UFS clock scaling related data
380 * @active_reqs: number of requests that are pending. If this is zero when
381 * devfreq ->target() function is called then schedule "suspend_work" to
382 * suspend devfreq.
383 * @tot_busy_t: Total busy time in current polling window
384 * @window_start_t: Start time (in jiffies) of the current polling window
385 * @busy_start_t: Start time of current busy period
386 * @enable_attr: sysfs attribute to enable/disable clock scaling
387 * @saved_pwr_info: UFS power mode may also be changed during scaling and this
388 * one keeps track of previous power mode.
389 * @workq: workqueue to schedule devfreq suspend/resume work
390 * @suspend_work: worker to suspend devfreq
391 * @resume_work: worker to resume devfreq
392 * @is_allowed: tracks if scaling is currently allowed or not
393 * @is_busy_started: tracks if busy period has started or not
394 * @is_suspended: tracks if devfreq is suspended or not
395 */
856b3483 396struct ufs_clk_scaling {
401f1e44 397 int active_reqs;
398 unsigned long tot_busy_t;
856b3483 399 unsigned long window_start_t;
401f1e44 400 ktime_t busy_start_t;
fcb0c4b0 401 struct device_attribute enable_attr;
a3cd5ec5 402 struct ufs_saved_pwr_info saved_pwr_info;
401f1e44 403 struct workqueue_struct *workq;
404 struct work_struct suspend_work;
405 struct work_struct resume_work;
406 bool is_allowed;
407 bool is_busy_started;
408 bool is_suspended;
856b3483
ST
409};
410
48d5b973 411#define UFS_ERR_REG_HIST_LENGTH 8
ff8e20c6 412/**
d3c615bf 413 * struct ufs_err_reg_hist - keeps history of errors
ff8e20c6
DR
414 * @pos: index to indicate cyclic buffer position
415 * @reg: cyclic buffer for registers value
416 * @tstamp: cyclic buffer for time stamp
417 */
48d5b973 418struct ufs_err_reg_hist {
ff8e20c6 419 int pos;
48d5b973
SC
420 u32 reg[UFS_ERR_REG_HIST_LENGTH];
421 ktime_t tstamp[UFS_ERR_REG_HIST_LENGTH];
ff8e20c6
DR
422};
423
424/**
425 * struct ufs_stats - keeps usage/err statistics
426 * @hibern8_exit_cnt: Counter to keep track of number of exits,
427 * reset this after link-startup.
428 * @last_hibern8_exit_tstamp: Set time after the hibern8 exit.
429 * Clear after the first successful command completion.
430 * @pa_err: tracks pa-uic errors
431 * @dl_err: tracks dl-uic errors
432 * @nl_err: tracks nl-uic errors
433 * @tl_err: tracks tl-uic errors
434 * @dme_err: tracks dme errors
d3c615bf 435 * @auto_hibern8_err: tracks auto-hibernate errors
8808b4e9
SC
436 * @fatal_err: tracks fatal errors
437 * @linkup_err: tracks link-startup errors
438 * @resume_err: tracks resume errors
439 * @suspend_err: tracks suspend errors
440 * @dev_reset: tracks device reset events
441 * @host_reset: tracks host reset events
442 * @tsk_abort: tracks task abort events
ff8e20c6
DR
443 */
444struct ufs_stats {
445 u32 hibern8_exit_cnt;
446 ktime_t last_hibern8_exit_tstamp;
d3c615bf
SC
447
448 /* uic specific errors */
48d5b973
SC
449 struct ufs_err_reg_hist pa_err;
450 struct ufs_err_reg_hist dl_err;
451 struct ufs_err_reg_hist nl_err;
452 struct ufs_err_reg_hist tl_err;
453 struct ufs_err_reg_hist dme_err;
d3c615bf
SC
454
455 /* fatal errors */
d3c615bf 456 struct ufs_err_reg_hist auto_hibern8_err;
8808b4e9
SC
457 struct ufs_err_reg_hist fatal_err;
458 struct ufs_err_reg_hist link_startup_err;
459 struct ufs_err_reg_hist resume_err;
460 struct ufs_err_reg_hist suspend_err;
461
462 /* abnormal events */
463 struct ufs_err_reg_hist dev_reset;
464 struct ufs_err_reg_hist host_reset;
465 struct ufs_err_reg_hist task_abort;
ff8e20c6
DR
466};
467
c3f7d1fc
CH
468enum ufshcd_quirks {
469 /* Interrupt aggregation support is broken */
470 UFSHCD_QUIRK_BROKEN_INTR_AGGR = 1 << 0,
471
472 /*
473 * delay before each dme command is required as the unipro
474 * layer has shown instabilities
475 */
476 UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS = 1 << 1,
477
478 /*
479 * If UFS host controller is having issue in processing LCC (Line
480 * Control Command) coming from device then enable this quirk.
481 * When this quirk is enabled, host controller driver should disable
482 * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
483 * attribute of device to 0).
484 */
485 UFSHCD_QUIRK_BROKEN_LCC = 1 << 2,
486
487 /*
488 * The attribute PA_RXHSUNTERMCAP specifies whether or not the
489 * inbound Link supports unterminated line in HS mode. Setting this
490 * attribute to 1 fixes moving to HS gear.
491 */
492 UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP = 1 << 3,
493
494 /*
495 * This quirk needs to be enabled if the host controller only allows
496 * accessing the peer dme attributes in AUTO mode (FAST AUTO or
497 * SLOW AUTO).
498 */
499 UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE = 1 << 4,
500
501 /*
502 * This quirk needs to be enabled if the host controller doesn't
503 * advertise the correct version in UFS_VER register. If this quirk
504 * is enabled, standard UFS host driver will call the vendor specific
505 * ops (get_ufs_hci_version) to get the correct version.
506 */
507 UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION = 1 << 5,
508};
509
c2014682
SC
510enum ufshcd_caps {
511 /* Allow dynamic clk gating */
512 UFSHCD_CAP_CLK_GATING = 1 << 0,
513
514 /* Allow hiberb8 with clk gating */
515 UFSHCD_CAP_HIBERN8_WITH_CLK_GATING = 1 << 1,
516
517 /* Allow dynamic clk scaling */
518 UFSHCD_CAP_CLK_SCALING = 1 << 2,
519
520 /* Allow auto bkops to enabled during runtime suspend */
521 UFSHCD_CAP_AUTO_BKOPS_SUSPEND = 1 << 3,
522
523 /*
524 * This capability allows host controller driver to use the UFS HCI's
525 * interrupt aggregation capability.
526 * CAUTION: Enabling this might reduce overall UFS throughput.
527 */
528 UFSHCD_CAP_INTR_AGGR = 1 << 4,
529
530 /*
531 * This capability allows the device auto-bkops to be always enabled
532 * except during suspend (both runtime and suspend).
533 * Enabling this capability means that device will always be allowed
534 * to do background operation when it's active but it might degrade
535 * the performance of ongoing read/write operations.
536 */
537 UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND = 1 << 5,
538
539 /*
540 * This capability allows host controller driver to automatically
541 * enable runtime power management by itself instead of waiting
542 * for userspace to control the power management.
543 */
544 UFSHCD_CAP_RPM_AUTOSUSPEND = 1 << 6,
545};
546
e0eca63e
VH
547/**
548 * struct ufs_hba - per adapter private structure
549 * @mmio_base: UFSHCI base register address
550 * @ucdl_base_addr: UFS Command Descriptor base address
551 * @utrdl_base_addr: UTP Transfer Request Descriptor base address
552 * @utmrdl_base_addr: UTP Task Management Descriptor base address
553 * @ucdl_dma_addr: UFS Command Descriptor DMA address
554 * @utrdl_dma_addr: UTRDL DMA address
555 * @utmrdl_dma_addr: UTMRDL DMA address
556 * @host: Scsi_Host instance of the driver
557 * @dev: device handle
558 * @lrb: local reference block
7252a360 559 * @cmd_queue: Used to allocate command tags from hba->host->tag_set.
e0eca63e
VH
560 * @outstanding_tasks: Bits representing outstanding task requests
561 * @outstanding_reqs: Bits representing outstanding transfer requests
562 * @capabilities: UFS Controller Capabilities
563 * @nutrs: Transfer Request Queue depth supported by controller
564 * @nutmrs: Task Management Queue depth supported by controller
565 * @ufs_version: UFS Version to which controller complies
5c0c28a8
SRT
566 * @vops: pointer to variant specific operations
567 * @priv: pointer to variant specific private data
e0eca63e
VH
568 * @irq: Irq number of the controller
569 * @active_uic_cmd: handle of active UIC command
6ccf44fe 570 * @uic_cmd_mutex: mutex for uic command
69a6c269
BVA
571 * @tmf_tag_set: TMF tag set.
572 * @tmf_queue: Used to allocate TMF tags.
53b3d9c3 573 * @pwr_done: completion for power mode change
e0eca63e 574 * @ufshcd_state: UFSHCD states
3441da7d 575 * @eh_flags: Error handling flags
2fbd009b 576 * @intr_mask: Interrupt Mask Bits
66ec6d59 577 * @ee_ctrl_mask: Exception event control mask
1d337ec2 578 * @is_powered: flag to check if HBA is powered
e8e7f271 579 * @eh_work: Worker to handle UFS errors that require s/w attention
66ec6d59 580 * @eeh_work: Worker to handle exception events
e0eca63e 581 * @errors: HBA errors
e8e7f271
SRT
582 * @uic_error: UFS interconnect layer error status
583 * @saved_err: sticky error mask
584 * @saved_uic_err: sticky UIC error mask
2df74b69 585 * @silence_err_logs: flag to silence error logs
5a0b0cb9 586 * @dev_cmd: ufs device management command information
cad2e03d 587 * @last_dme_cmd_tstamp: time stamp of the last completed DME command
66ec6d59 588 * @auto_bkops_enabled: to track whether bkops is enabled in device
aa497613 589 * @vreg_info: UFS device voltage regulator information
c6e79dac 590 * @clk_list_head: UFS host controller clocks list node head
7eb584db
DR
591 * @pwr_info: holds current power mode
592 * @max_pwr_info: keeps the device max valid pwm
a4b0e8a4 593 * @desc_size: descriptor sizes reported by device
afdfff59
YG
594 * @urgent_bkops_lvl: keeps track of urgent bkops level for device
595 * @is_urgent_bkops_lvl_checked: keeps track if the urgent bkops level for
596 * device is known or not.
38135535 597 * @scsi_block_reqs_cnt: reference counting for scsi block requests
e0eca63e
VH
598 */
599struct ufs_hba {
600 void __iomem *mmio_base;
601
602 /* Virtual memory reference */
603 struct utp_transfer_cmd_desc *ucdl_base_addr;
604 struct utp_transfer_req_desc *utrdl_base_addr;
605 struct utp_task_req_desc *utmrdl_base_addr;
606
607 /* DMA memory reference */
608 dma_addr_t ucdl_dma_addr;
609 dma_addr_t utrdl_dma_addr;
610 dma_addr_t utmrdl_dma_addr;
611
612 struct Scsi_Host *host;
613 struct device *dev;
7252a360 614 struct request_queue *cmd_queue;
2a8fa600
SJ
615 /*
616 * This field is to keep a reference to "scsi_device" corresponding to
617 * "UFS device" W-LU.
618 */
619 struct scsi_device *sdev_ufs_device;
e0eca63e 620
57d104c1
SJ
621 enum ufs_dev_pwr_mode curr_dev_pwr_mode;
622 enum uic_link_state uic_link_state;
623 /* Desired UFS power management level during runtime PM */
624 enum ufs_pm_level rpm_lvl;
625 /* Desired UFS power management level during system PM */
626 enum ufs_pm_level spm_lvl;
09690d5a 627 struct device_attribute rpm_lvl_attr;
628 struct device_attribute spm_lvl_attr;
57d104c1
SJ
629 int pm_op_in_progress;
630
ad448378
AH
631 /* Auto-Hibernate Idle Timer register value */
632 u32 ahit;
633
e0eca63e
VH
634 struct ufshcd_lrb *lrb;
635
636 unsigned long outstanding_tasks;
637 unsigned long outstanding_reqs;
638
639 u32 capabilities;
640 int nutrs;
641 int nutmrs;
642 u32 ufs_version;
176eb927 643 const struct ufs_hba_variant_ops *vops;
5c0c28a8 644 void *priv;
e0eca63e 645 unsigned int irq;
57d104c1 646 bool is_irq_enabled;
9e1e8a75 647 enum ufs_ref_clk_freq dev_ref_clk_freq;
e0eca63e 648
cad2e03d 649 unsigned int quirks; /* Deviations from standard UFSHCI spec. */
6ccf44fe 650
c58ab7aa
YG
651 /* Device deviations from standard UFS device spec. */
652 unsigned int dev_quirks;
653
69a6c269
BVA
654 struct blk_mq_tag_set tmf_tag_set;
655 struct request_queue *tmf_queue;
e0eca63e 656
57d104c1
SJ
657 struct uic_command *active_uic_cmd;
658 struct mutex uic_cmd_mutex;
659 struct completion *uic_async_done;
53b3d9c3 660
e0eca63e 661 u32 ufshcd_state;
3441da7d 662 u32 eh_flags;
2fbd009b 663 u32 intr_mask;
66ec6d59 664 u16 ee_ctrl_mask;
b9dc8aca 665 u16 hba_enable_delay_us;
1d337ec2 666 bool is_powered;
e0eca63e
VH
667
668 /* Work Queues */
e8e7f271 669 struct work_struct eh_work;
66ec6d59 670 struct work_struct eeh_work;
e0eca63e
VH
671
672 /* HBA Errors */
673 u32 errors;
e8e7f271
SRT
674 u32 uic_error;
675 u32 saved_err;
676 u32 saved_uic_err;
ff8e20c6 677 struct ufs_stats ufs_stats;
2df74b69 678 bool silence_err_logs;
5a0b0cb9
SRT
679
680 /* Device management request data */
681 struct ufs_dev_cmd dev_cmd;
cad2e03d 682 ktime_t last_dme_cmd_tstamp;
66ec6d59 683
57d104c1
SJ
684 /* Keeps information of the UFS device connected to this host */
685 struct ufs_dev_info dev_info;
66ec6d59 686 bool auto_bkops_enabled;
aa497613 687 struct ufs_vreg_info vreg_info;
c6e79dac 688 struct list_head clk_list_head;
57d104c1
SJ
689
690 bool wlun_dev_clr_ua;
7eb584db 691
7fabb77b
GB
692 /* Number of requests aborts */
693 int req_abort_count;
694
54b879b7
YG
695 /* Number of lanes available (1 or 2) for Rx/Tx */
696 u32 lanes_per_direction;
7eb584db
DR
697 struct ufs_pa_layer_attr pwr_info;
698 struct ufs_pwr_mode_info max_pwr_info;
1ab27c9c
ST
699
700 struct ufs_clk_gating clk_gating;
701 /* Control to enable/disable host capabilities */
702 u32 caps;
856b3483
ST
703
704 struct devfreq *devfreq;
705 struct ufs_clk_scaling clk_scaling;
e785060e 706 bool is_sys_suspended;
afdfff59
YG
707
708 enum bkops_status urgent_bkops_lvl;
709 bool is_urgent_bkops_lvl_checked;
a3cd5ec5 710
711 struct rw_semaphore clk_scaling_lock;
a4b0e8a4 712 struct ufs_desc_size desc_size;
38135535 713 atomic_t scsi_block_reqs_cnt;
df032bf2
AA
714
715 struct device bsg_dev;
716 struct request_queue *bsg_queue;
e0eca63e
VH
717};
718
1ab27c9c
ST
719/* Returns true if clocks can be gated. Otherwise false */
720static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
721{
722 return hba->caps & UFSHCD_CAP_CLK_GATING;
723}
724static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
725{
726 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
727}
fcb0c4b0 728static inline int ufshcd_is_clkscaling_supported(struct ufs_hba *hba)
856b3483
ST
729{
730 return hba->caps & UFSHCD_CAP_CLK_SCALING;
731}
374a246e
SJ
732static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
733{
734 return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
735}
49615ba1
SC
736static inline bool ufshcd_is_rpm_autosuspend_allowed(struct ufs_hba *hba)
737{
738 return hba->caps & UFSHCD_CAP_RPM_AUTOSUSPEND;
739}
374a246e 740
b852190e
YG
741static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
742{
4b9ffb5a
JP
743/* DWC UFS Core has the Interrupt aggregation feature but is not detectable*/
744#ifndef CONFIG_SCSI_UFS_DWC
b852190e
YG
745 if ((hba->caps & UFSHCD_CAP_INTR_AGGR) &&
746 !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR))
747 return true;
748 else
749 return false;
4b9ffb5a
JP
750#else
751return true;
752#endif
b852190e
YG
753}
754
ee5f1042
SC
755static inline bool ufshcd_is_auto_hibern8_supported(struct ufs_hba *hba)
756{
757 return (hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT);
758}
759
5a244e0e
SC
760static inline bool ufshcd_is_auto_hibern8_enabled(struct ufs_hba *hba)
761{
762 return FIELD_GET(UFSHCI_AHIBERN8_TIMER_MASK, hba->ahit) ? true : false;
763}
764
b873a275
SJ
765#define ufshcd_writel(hba, val, reg) \
766 writel((val), (hba)->mmio_base + (reg))
767#define ufshcd_readl(hba, reg) \
768 readl((hba)->mmio_base + (reg))
769
e785060e
DR
770/**
771 * ufshcd_rmwl - read modify write into a register
772 * @hba - per adapter instance
773 * @mask - mask to apply on read value
774 * @val - actual value to write
775 * @reg - register address
776 */
777static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
778{
779 u32 tmp;
780
781 tmp = ufshcd_readl(hba, reg);
782 tmp &= ~mask;
783 tmp |= (val & mask);
784 ufshcd_writel(hba, tmp, reg);
785}
786
5c0c28a8 787int ufshcd_alloc_host(struct device *, struct ufs_hba **);
47555a5c 788void ufshcd_dealloc_host(struct ufs_hba *);
9d19bf7a 789int ufshcd_hba_enable(struct ufs_hba *hba);
5c0c28a8 790int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int);
9d19bf7a 791int ufshcd_make_hba_operational(struct ufs_hba *hba);
e0eca63e 792void ufshcd_remove(struct ufs_hba *);
9d19bf7a 793int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
5c955c10 794void ufshcd_delay_us(unsigned long us, unsigned long tolerance);
596585a2
YG
795int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
796 u32 val, unsigned long interval_us,
797 unsigned long timeout_ms, bool can_sleep);
9e1e8a75 798void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk);
a5fe372d
SC
799void ufshcd_update_reg_hist(struct ufs_err_reg_hist *reg_hist,
800 u32 reg);
e0eca63e 801
68078d5c
DR
802static inline void check_upiu_size(void)
803{
804 BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
805 GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
806}
807
1ce5898a
YG
808/**
809 * ufshcd_set_variant - set variant specific data to the hba
810 * @hba - per adapter instance
811 * @variant - pointer to variant specific data
812 */
813static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant)
814{
815 BUG_ON(!hba);
816 hba->priv = variant;
817}
818
819/**
820 * ufshcd_get_variant - get variant specific data from the hba
821 * @hba - per adapter instance
822 */
823static inline void *ufshcd_get_variant(struct ufs_hba *hba)
824{
825 BUG_ON(!hba);
826 return hba->priv;
827}
4e768e76 828static inline bool ufshcd_keep_autobkops_enabled_except_suspend(
829 struct ufs_hba *hba)
830{
831 return hba->caps & UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND;
832}
1ce5898a 833
66ec6d59
SRT
834extern int ufshcd_runtime_suspend(struct ufs_hba *hba);
835extern int ufshcd_runtime_resume(struct ufs_hba *hba);
836extern int ufshcd_runtime_idle(struct ufs_hba *hba);
57d104c1
SJ
837extern int ufshcd_system_suspend(struct ufs_hba *hba);
838extern int ufshcd_system_resume(struct ufs_hba *hba);
839extern int ufshcd_shutdown(struct ufs_hba *hba);
12b4fdb4
SJ
840extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
841 u8 attr_set, u32 mib_val, u8 peer);
842extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
843 u32 *mib_val, u8 peer);
0d846e70
AA
844extern int ufshcd_config_pwr_mode(struct ufs_hba *hba,
845 struct ufs_pa_layer_attr *desired_pwr_mode);
12b4fdb4
SJ
846
847/* UIC command interfaces for DME primitives */
848#define DME_LOCAL 0
849#define DME_PEER 1
850#define ATTR_SET_NOR 0 /* NORMAL */
851#define ATTR_SET_ST 1 /* STATIC */
852
853static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
854 u32 mib_val)
855{
856 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
857 mib_val, DME_LOCAL);
858}
859
860static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
861 u32 mib_val)
862{
863 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
864 mib_val, DME_LOCAL);
865}
866
867static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
868 u32 mib_val)
869{
870 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
871 mib_val, DME_PEER);
872}
873
874static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
875 u32 mib_val)
876{
877 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
878 mib_val, DME_PEER);
879}
880
881static inline int ufshcd_dme_get(struct ufs_hba *hba,
882 u32 attr_sel, u32 *mib_val)
883{
884 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
885}
886
887static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
888 u32 attr_sel, u32 *mib_val)
889{
890 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
891}
892
f37aabcf
YG
893static inline bool ufshcd_is_hs_mode(struct ufs_pa_layer_attr *pwr_info)
894{
895 return (pwr_info->pwr_rx == FAST_MODE ||
896 pwr_info->pwr_rx == FASTAUTO_MODE) &&
897 (pwr_info->pwr_tx == FAST_MODE ||
898 pwr_info->pwr_tx == FASTAUTO_MODE);
899}
900
984eaac1
SC
901static inline int ufshcd_disable_host_tx_lcc(struct ufs_hba *hba)
902{
903 return ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0);
904}
905
dc3c8d3a 906/* Expose Query-Request API */
2238d31c
SN
907int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
908 enum query_opcode opcode,
909 enum desc_idn idn, u8 index,
910 u8 selector,
911 u8 *desc_buf, int *buf_len);
45bced87
SN
912int ufshcd_read_desc_param(struct ufs_hba *hba,
913 enum desc_idn desc_id,
914 int desc_index,
915 u8 param_offset,
916 u8 *param_read_buf,
917 u8 param_size);
ec92b59c
SN
918int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
919 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val);
dc3c8d3a
YG
920int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
921 enum flag_idn idn, bool *flag_res);
4b828fe1 922
71d848b8 923void ufshcd_auto_hibern8_enable(struct ufs_hba *hba);
ba7af5ec 924void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit);
71d848b8 925
4b828fe1
TW
926#define SD_ASCII_STD true
927#define SD_RAW false
928int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
929 u8 **buf, bool ascii);
2238d31c 930
1ab27c9c
ST
931int ufshcd_hold(struct ufs_hba *hba, bool async);
932void ufshcd_release(struct ufs_hba *hba);
a4b0e8a4
PM
933
934int ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id,
935 int *desc_length);
936
37113106 937u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba);
0263bcd0 938
e77044c5
AA
939int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd);
940
5e0a86ee
AA
941int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
942 struct utp_upiu_req *req_upiu,
943 struct utp_upiu_req *rsp_upiu,
944 int msgcode,
945 u8 *desc_buff, int *buff_len,
946 enum query_opcode desc_op);
947
0263bcd0
YG
948/* Wrapper functions for safely calling variant operations */
949static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
950{
951 if (hba->vops)
952 return hba->vops->name;
953 return "";
954}
955
956static inline int ufshcd_vops_init(struct ufs_hba *hba)
957{
958 if (hba->vops && hba->vops->init)
959 return hba->vops->init(hba);
960
961 return 0;
962}
963
964static inline void ufshcd_vops_exit(struct ufs_hba *hba)
965{
966 if (hba->vops && hba->vops->exit)
967 return hba->vops->exit(hba);
968}
969
970static inline u32 ufshcd_vops_get_ufs_hci_version(struct ufs_hba *hba)
971{
972 if (hba->vops && hba->vops->get_ufs_hci_version)
973 return hba->vops->get_ufs_hci_version(hba);
974
975 return ufshcd_readl(hba, REG_UFS_VERSION);
976}
977
f06fcc71
YG
978static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba,
979 bool up, enum ufs_notify_change_status status)
0263bcd0
YG
980{
981 if (hba->vops && hba->vops->clk_scale_notify)
f06fcc71
YG
982 return hba->vops->clk_scale_notify(hba, up, status);
983 return 0;
0263bcd0
YG
984}
985
1e879e8f
SJ
986static inline int ufshcd_vops_setup_clocks(struct ufs_hba *hba, bool on,
987 enum ufs_notify_change_status status)
0263bcd0
YG
988{
989 if (hba->vops && hba->vops->setup_clocks)
1e879e8f 990 return hba->vops->setup_clocks(hba, on, status);
0263bcd0
YG
991 return 0;
992}
993
994static inline int ufshcd_vops_setup_regulators(struct ufs_hba *hba, bool status)
995{
996 if (hba->vops && hba->vops->setup_regulators)
997 return hba->vops->setup_regulators(hba, status);
998
999 return 0;
1000}
1001
1002static inline int ufshcd_vops_hce_enable_notify(struct ufs_hba *hba,
1003 bool status)
1004{
1005 if (hba->vops && hba->vops->hce_enable_notify)
1006 return hba->vops->hce_enable_notify(hba, status);
1007
1008 return 0;
1009}
1010static inline int ufshcd_vops_link_startup_notify(struct ufs_hba *hba,
1011 bool status)
1012{
1013 if (hba->vops && hba->vops->link_startup_notify)
1014 return hba->vops->link_startup_notify(hba, status);
1015
1016 return 0;
1017}
1018
1019static inline int ufshcd_vops_pwr_change_notify(struct ufs_hba *hba,
1020 bool status,
1021 struct ufs_pa_layer_attr *dev_max_params,
1022 struct ufs_pa_layer_attr *dev_req_params)
1023{
1024 if (hba->vops && hba->vops->pwr_change_notify)
1025 return hba->vops->pwr_change_notify(hba, status,
1026 dev_max_params, dev_req_params);
1027
1028 return -ENOTSUPP;
1029}
1030
0e675efa
KK
1031static inline void ufshcd_vops_setup_xfer_req(struct ufs_hba *hba, int tag,
1032 bool is_scsi_cmd)
1033{
1034 if (hba->vops && hba->vops->setup_xfer_req)
1035 return hba->vops->setup_xfer_req(hba, tag, is_scsi_cmd);
1036}
1037
d2877be4
KK
1038static inline void ufshcd_vops_setup_task_mgmt(struct ufs_hba *hba,
1039 int tag, u8 tm_function)
1040{
1041 if (hba->vops && hba->vops->setup_task_mgmt)
1042 return hba->vops->setup_task_mgmt(hba, tag, tm_function);
1043}
1044
ee32c909
KK
1045static inline void ufshcd_vops_hibern8_notify(struct ufs_hba *hba,
1046 enum uic_cmd_dme cmd,
1047 enum ufs_notify_change_status status)
1048{
1049 if (hba->vops && hba->vops->hibern8_notify)
1050 return hba->vops->hibern8_notify(hba, cmd, status);
1051}
1052
09750066 1053static inline int ufshcd_vops_apply_dev_quirks(struct ufs_hba *hba)
56d4a186
SJ
1054{
1055 if (hba->vops && hba->vops->apply_dev_quirks)
09750066 1056 return hba->vops->apply_dev_quirks(hba);
56d4a186
SJ
1057 return 0;
1058}
1059
0263bcd0
YG
1060static inline int ufshcd_vops_suspend(struct ufs_hba *hba, enum ufs_pm_op op)
1061{
1062 if (hba->vops && hba->vops->suspend)
1063 return hba->vops->suspend(hba, op);
1064
1065 return 0;
1066}
1067
1068static inline int ufshcd_vops_resume(struct ufs_hba *hba, enum ufs_pm_op op)
1069{
1070 if (hba->vops && hba->vops->resume)
1071 return hba->vops->resume(hba, op);
1072
1073 return 0;
1074}
1075
6e3fd44d
YG
1076static inline void ufshcd_vops_dbg_register_dump(struct ufs_hba *hba)
1077{
1078 if (hba->vops && hba->vops->dbg_register_dump)
1079 hba->vops->dbg_register_dump(hba);
1080}
1081
d8d9f793
BA
1082static inline void ufshcd_vops_device_reset(struct ufs_hba *hba)
1083{
a5fe372d 1084 if (hba->vops && hba->vops->device_reset) {
d8d9f793 1085 hba->vops->device_reset(hba);
a5fe372d
SC
1086 ufshcd_update_reg_hist(&hba->ufs_stats.dev_reset, 0);
1087 }
d8d9f793
BA
1088}
1089
2c75f9a5
AD
1090static inline void ufshcd_vops_config_scaling_param(struct ufs_hba *hba,
1091 struct devfreq_dev_profile
1092 *profile, void *data)
1093{
1094 if (hba->vops && hba->vops->config_scaling_param)
1095 hba->vops->config_scaling_param(hba, profile, data);
1096}
1097
cbb6813e
SN
1098extern struct ufs_pm_lvl_states ufs_pm_lvl_states[];
1099
d829fc8a
SN
1100/*
1101 * ufshcd_scsi_to_upiu_lun - maps scsi LUN to UPIU LUN
1102 * @scsi_lun: scsi LUN id
1103 *
1104 * Returns UPIU LUN id
1105 */
1106static inline u8 ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)
1107{
1108 if (scsi_is_wlun(scsi_lun))
1109 return (scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID)
1110 | UFS_UPIU_WLUN_ID;
1111 else
1112 return scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID;
1113}
1114
ba80917d
TW
1115int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
1116 const char *prefix);
1117
e0eca63e 1118#endif /* End of Header */