Commit | Line | Data |
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7a3e97b0 SY |
1 | /* |
2 | * Universal Flash Storage Host controller driver | |
3 | * | |
4 | * This code is based on drivers/scsi/ufs/ufs.h | |
3b1d0580 | 5 | * Copyright (C) 2011-2013 Samsung India Software Operations |
7a3e97b0 | 6 | * |
3b1d0580 VH |
7 | * Authors: |
8 | * Santosh Yaraganavi <santosh.sy@samsung.com> | |
9 | * Vinayak Holikatti <h.vinayak@samsung.com> | |
7a3e97b0 SY |
10 | * |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License | |
13 | * as published by the Free Software Foundation; either version 2 | |
14 | * of the License, or (at your option) any later version. | |
3b1d0580 VH |
15 | * See the COPYING file in the top-level directory or visit |
16 | * <http://www.gnu.org/licenses/gpl-2.0.html> | |
7a3e97b0 SY |
17 | * |
18 | * This program is distributed in the hope that it will be useful, | |
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
21 | * GNU General Public License for more details. | |
22 | * | |
3b1d0580 VH |
23 | * This program is provided "AS IS" and "WITH ALL FAULTS" and |
24 | * without warranty of any kind. You are solely responsible for | |
25 | * determining the appropriateness of using and distributing | |
26 | * the program and assume all risks associated with your exercise | |
27 | * of rights with respect to the program, including but not limited | |
28 | * to infringement of third party rights, the risks and costs of | |
29 | * program errors, damage to or loss of data, programs or equipment, | |
30 | * and unavailability or interruption of operations. Under no | |
31 | * circumstances will the contributor of this Program be liable for | |
32 | * any damages of any kind arising from your use or distribution of | |
33 | * this program. | |
7a3e97b0 SY |
34 | */ |
35 | ||
36 | #ifndef _UFS_H | |
37 | #define _UFS_H | |
38 | ||
5a0b0cb9 SRT |
39 | #include <linux/mutex.h> |
40 | #include <linux/types.h> | |
a851b2bd | 41 | #include <uapi/scsi/scsi_bsg_ufs.h> |
5a0b0cb9 | 42 | |
220d17a6 | 43 | #define GENERAL_UPIU_REQUEST_SIZE (sizeof(struct utp_upiu_req)) |
d44a5f98 DR |
44 | #define QUERY_DESC_MAX_SIZE 255 |
45 | #define QUERY_DESC_MIN_SIZE 2 | |
b573d484 | 46 | #define QUERY_DESC_HDR_SIZE 2 |
68078d5c DR |
47 | #define QUERY_OSF_SIZE (GENERAL_UPIU_REQUEST_SIZE - \ |
48 | (sizeof(struct utp_upiu_header))) | |
09a5a24f | 49 | #define UFS_SENSE_SIZE 18 |
7a3e97b0 SY |
50 | |
51 | #define UPIU_HEADER_DWORD(byte3, byte2, byte1, byte0)\ | |
5a0b0cb9 | 52 | cpu_to_be32((byte3 << 24) | (byte2 << 16) |\ |
7a3e97b0 | 53 | (byte1 << 8) | (byte0)) |
0ce147d4 SJ |
54 | /* |
55 | * UFS device may have standard LUs and LUN id could be from 0x00 to | |
56 | * 0x7F. Standard LUs use "Peripheral Device Addressing Format". | |
57 | * UFS device may also have the Well Known LUs (also referred as W-LU) | |
58 | * which again could be from 0x00 to 0x7F. For W-LUs, device only use | |
59 | * the "Extended Addressing Format" which means the W-LUNs would be | |
60 | * from 0xc100 (SCSI_W_LUN_BASE) onwards. | |
61 | * This means max. LUN number reported from UFS device could be 0xC17F. | |
62 | */ | |
63 | #define UFS_UPIU_MAX_UNIT_NUM_ID 0x7F | |
64 | #define UFS_MAX_LUNS (SCSI_W_LUN_BASE + UFS_UPIU_MAX_UNIT_NUM_ID) | |
65 | #define UFS_UPIU_WLUN_ID (1 << 7) | |
72fb690e | 66 | #define UFS_RPMB_UNIT 0xC4 |
da461cec | 67 | |
6f8d5a6a SC |
68 | /* WriteBooster buffer is available only for the logical unit from 0 to 7 */ |
69 | #define UFS_UPIU_MAX_WB_LUN_ID 8 | |
70 | ||
0ce147d4 SJ |
71 | /* Well known logical unit id in LUN field of UPIU */ |
72 | enum { | |
73 | UFS_UPIU_REPORT_LUNS_WLUN = 0x81, | |
74 | UFS_UPIU_UFS_DEVICE_WLUN = 0xD0, | |
75 | UFS_UPIU_BOOT_WLUN = 0xB0, | |
76 | UFS_UPIU_RPMB_WLUN = 0xC4, | |
77 | }; | |
78 | ||
7a3e97b0 SY |
79 | /* |
80 | * UFS Protocol Information Unit related definitions | |
81 | */ | |
82 | ||
83 | /* Task management functions */ | |
84 | enum { | |
85 | UFS_ABORT_TASK = 0x01, | |
86 | UFS_ABORT_TASK_SET = 0x02, | |
87 | UFS_CLEAR_TASK_SET = 0x04, | |
88 | UFS_LOGICAL_RESET = 0x08, | |
89 | UFS_QUERY_TASK = 0x80, | |
90 | UFS_QUERY_TASK_SET = 0x81, | |
91 | }; | |
92 | ||
93 | /* UTP UPIU Transaction Codes Initiator to Target */ | |
94 | enum { | |
95 | UPIU_TRANSACTION_NOP_OUT = 0x00, | |
96 | UPIU_TRANSACTION_COMMAND = 0x01, | |
97 | UPIU_TRANSACTION_DATA_OUT = 0x02, | |
98 | UPIU_TRANSACTION_TASK_REQ = 0x04, | |
68078d5c | 99 | UPIU_TRANSACTION_QUERY_REQ = 0x16, |
7a3e97b0 SY |
100 | }; |
101 | ||
102 | /* UTP UPIU Transaction Codes Target to Initiator */ | |
103 | enum { | |
104 | UPIU_TRANSACTION_NOP_IN = 0x20, | |
105 | UPIU_TRANSACTION_RESPONSE = 0x21, | |
106 | UPIU_TRANSACTION_DATA_IN = 0x22, | |
107 | UPIU_TRANSACTION_TASK_RSP = 0x24, | |
108 | UPIU_TRANSACTION_READY_XFER = 0x31, | |
109 | UPIU_TRANSACTION_QUERY_RSP = 0x36, | |
5a0b0cb9 | 110 | UPIU_TRANSACTION_REJECT_UPIU = 0x3F, |
7a3e97b0 SY |
111 | }; |
112 | ||
113 | /* UPIU Read/Write flags */ | |
114 | enum { | |
115 | UPIU_CMD_FLAGS_NONE = 0x00, | |
116 | UPIU_CMD_FLAGS_WRITE = 0x20, | |
117 | UPIU_CMD_FLAGS_READ = 0x40, | |
118 | }; | |
119 | ||
120 | /* UPIU Task Attributes */ | |
121 | enum { | |
122 | UPIU_TASK_ATTR_SIMPLE = 0x00, | |
123 | UPIU_TASK_ATTR_ORDERED = 0x01, | |
124 | UPIU_TASK_ATTR_HEADQ = 0x02, | |
125 | UPIU_TASK_ATTR_ACA = 0x03, | |
126 | }; | |
127 | ||
68078d5c | 128 | /* UPIU Query request function */ |
7a3e97b0 | 129 | enum { |
68078d5c DR |
130 | UPIU_QUERY_FUNC_STANDARD_READ_REQUEST = 0x01, |
131 | UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST = 0x81, | |
132 | }; | |
133 | ||
134 | /* Flag idn for Query Requests*/ | |
135 | enum flag_idn { | |
d10b2a8e SN |
136 | QUERY_FLAG_IDN_FDEVICEINIT = 0x01, |
137 | QUERY_FLAG_IDN_PERMANENT_WPE = 0x02, | |
138 | QUERY_FLAG_IDN_PWR_ON_WPE = 0x03, | |
139 | QUERY_FLAG_IDN_BKOPS_EN = 0x04, | |
140 | QUERY_FLAG_IDN_LIFE_SPAN_MODE_ENABLE = 0x05, | |
141 | QUERY_FLAG_IDN_PURGE_ENABLE = 0x06, | |
142 | QUERY_FLAG_IDN_RESERVED2 = 0x07, | |
143 | QUERY_FLAG_IDN_FPHYRESOURCEREMOVAL = 0x08, | |
144 | QUERY_FLAG_IDN_BUSY_RTC = 0x09, | |
145 | QUERY_FLAG_IDN_RESERVED3 = 0x0A, | |
146 | QUERY_FLAG_IDN_PERMANENTLY_DISABLE_FW_UPDATE = 0x0B, | |
3d17b9b5 AD |
147 | QUERY_FLAG_IDN_WB_EN = 0x0E, |
148 | QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN = 0x0F, | |
149 | QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8 = 0x10, | |
66ec6d59 SRT |
150 | }; |
151 | ||
152 | /* Attribute idn for Query requests */ | |
153 | enum attr_idn { | |
ec92b59c SN |
154 | QUERY_ATTR_IDN_BOOT_LU_EN = 0x00, |
155 | QUERY_ATTR_IDN_RESERVED = 0x01, | |
156 | QUERY_ATTR_IDN_POWER_MODE = 0x02, | |
157 | QUERY_ATTR_IDN_ACTIVE_ICC_LVL = 0x03, | |
158 | QUERY_ATTR_IDN_OOO_DATA_EN = 0x04, | |
159 | QUERY_ATTR_IDN_BKOPS_STATUS = 0x05, | |
160 | QUERY_ATTR_IDN_PURGE_STATUS = 0x06, | |
161 | QUERY_ATTR_IDN_MAX_DATA_IN = 0x07, | |
162 | QUERY_ATTR_IDN_MAX_DATA_OUT = 0x08, | |
163 | QUERY_ATTR_IDN_DYN_CAP_NEEDED = 0x09, | |
164 | QUERY_ATTR_IDN_REF_CLK_FREQ = 0x0A, | |
165 | QUERY_ATTR_IDN_CONF_DESC_LOCK = 0x0B, | |
166 | QUERY_ATTR_IDN_MAX_NUM_OF_RTT = 0x0C, | |
167 | QUERY_ATTR_IDN_EE_CONTROL = 0x0D, | |
168 | QUERY_ATTR_IDN_EE_STATUS = 0x0E, | |
169 | QUERY_ATTR_IDN_SECONDS_PASSED = 0x0F, | |
170 | QUERY_ATTR_IDN_CNTX_CONF = 0x10, | |
171 | QUERY_ATTR_IDN_CORR_PRG_BLK_NUM = 0x11, | |
172 | QUERY_ATTR_IDN_RESERVED2 = 0x12, | |
173 | QUERY_ATTR_IDN_RESERVED3 = 0x13, | |
174 | QUERY_ATTR_IDN_FFU_STATUS = 0x14, | |
175 | QUERY_ATTR_IDN_PSA_STATE = 0x15, | |
176 | QUERY_ATTR_IDN_PSA_DATA_SIZE = 0x16, | |
09f17791 | 177 | QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME = 0x17, |
3d17b9b5 AD |
178 | QUERY_ATTR_IDN_WB_FLUSH_STATUS = 0x1C, |
179 | QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE = 0x1D, | |
180 | QUERY_ATTR_IDN_WB_BUFF_LIFE_TIME_EST = 0x1E, | |
181 | QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE = 0x1F, | |
66ec6d59 SRT |
182 | }; |
183 | ||
d44a5f98 DR |
184 | /* Descriptor idn for Query requests */ |
185 | enum desc_idn { | |
186 | QUERY_DESC_IDN_DEVICE = 0x0, | |
a4b0e8a4 | 187 | QUERY_DESC_IDN_CONFIGURATION = 0x1, |
d44a5f98 DR |
188 | QUERY_DESC_IDN_UNIT = 0x2, |
189 | QUERY_DESC_IDN_RFU_0 = 0x3, | |
190 | QUERY_DESC_IDN_INTERCONNECT = 0x4, | |
191 | QUERY_DESC_IDN_STRING = 0x5, | |
192 | QUERY_DESC_IDN_RFU_1 = 0x6, | |
193 | QUERY_DESC_IDN_GEOMETRY = 0x7, | |
194 | QUERY_DESC_IDN_POWER = 0x8, | |
c648c2d2 | 195 | QUERY_DESC_IDN_HEALTH = 0x9, |
da461cec SJ |
196 | QUERY_DESC_IDN_MAX, |
197 | }; | |
198 | ||
199 | enum desc_header_offset { | |
200 | QUERY_DESC_LENGTH_OFFSET = 0x00, | |
201 | QUERY_DESC_DESC_TYPE_OFFSET = 0x01, | |
202 | }; | |
203 | ||
1b3e8956 DR |
204 | /* Unit descriptor parameters offsets in bytes*/ |
205 | enum unit_desc_param { | |
206 | UNIT_DESC_PARAM_LEN = 0x0, | |
207 | UNIT_DESC_PARAM_TYPE = 0x1, | |
208 | UNIT_DESC_PARAM_UNIT_INDEX = 0x2, | |
209 | UNIT_DESC_PARAM_LU_ENABLE = 0x3, | |
210 | UNIT_DESC_PARAM_BOOT_LUN_ID = 0x4, | |
211 | UNIT_DESC_PARAM_LU_WR_PROTECT = 0x5, | |
212 | UNIT_DESC_PARAM_LU_Q_DEPTH = 0x6, | |
d829fc8a | 213 | UNIT_DESC_PARAM_PSA_SENSITIVE = 0x7, |
1b3e8956 DR |
214 | UNIT_DESC_PARAM_MEM_TYPE = 0x8, |
215 | UNIT_DESC_PARAM_DATA_RELIABILITY = 0x9, | |
216 | UNIT_DESC_PARAM_LOGICAL_BLK_SIZE = 0xA, | |
217 | UNIT_DESC_PARAM_LOGICAL_BLK_COUNT = 0xB, | |
218 | UNIT_DESC_PARAM_ERASE_BLK_SIZE = 0x13, | |
219 | UNIT_DESC_PARAM_PROVISIONING_TYPE = 0x17, | |
220 | UNIT_DESC_PARAM_PHY_MEM_RSRC_CNT = 0x18, | |
221 | UNIT_DESC_PARAM_CTX_CAPABILITIES = 0x20, | |
222 | UNIT_DESC_PARAM_LARGE_UNIT_SIZE_M1 = 0x22, | |
3d17b9b5 | 223 | UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS = 0x29, |
1b3e8956 DR |
224 | }; |
225 | ||
c58ab7aa YG |
226 | /* Device descriptor parameters offsets in bytes*/ |
227 | enum device_desc_param { | |
228 | DEVICE_DESC_PARAM_LEN = 0x0, | |
229 | DEVICE_DESC_PARAM_TYPE = 0x1, | |
230 | DEVICE_DESC_PARAM_DEVICE_TYPE = 0x2, | |
231 | DEVICE_DESC_PARAM_DEVICE_CLASS = 0x3, | |
232 | DEVICE_DESC_PARAM_DEVICE_SUB_CLASS = 0x4, | |
233 | DEVICE_DESC_PARAM_PRTCL = 0x5, | |
234 | DEVICE_DESC_PARAM_NUM_LU = 0x6, | |
235 | DEVICE_DESC_PARAM_NUM_WLU = 0x7, | |
236 | DEVICE_DESC_PARAM_BOOT_ENBL = 0x8, | |
237 | DEVICE_DESC_PARAM_DESC_ACCSS_ENBL = 0x9, | |
238 | DEVICE_DESC_PARAM_INIT_PWR_MODE = 0xA, | |
239 | DEVICE_DESC_PARAM_HIGH_PR_LUN = 0xB, | |
240 | DEVICE_DESC_PARAM_SEC_RMV_TYPE = 0xC, | |
241 | DEVICE_DESC_PARAM_SEC_LU = 0xD, | |
242 | DEVICE_DESC_PARAM_BKOP_TERM_LT = 0xE, | |
243 | DEVICE_DESC_PARAM_ACTVE_ICC_LVL = 0xF, | |
244 | DEVICE_DESC_PARAM_SPEC_VER = 0x10, | |
245 | DEVICE_DESC_PARAM_MANF_DATE = 0x12, | |
246 | DEVICE_DESC_PARAM_MANF_NAME = 0x14, | |
247 | DEVICE_DESC_PARAM_PRDCT_NAME = 0x15, | |
248 | DEVICE_DESC_PARAM_SN = 0x16, | |
249 | DEVICE_DESC_PARAM_OEM_ID = 0x17, | |
250 | DEVICE_DESC_PARAM_MANF_ID = 0x18, | |
251 | DEVICE_DESC_PARAM_UD_OFFSET = 0x1A, | |
252 | DEVICE_DESC_PARAM_UD_LEN = 0x1B, | |
253 | DEVICE_DESC_PARAM_RTT_CAP = 0x1C, | |
254 | DEVICE_DESC_PARAM_FRQ_RTC = 0x1D, | |
45bced87 SN |
255 | DEVICE_DESC_PARAM_UFS_FEAT = 0x1F, |
256 | DEVICE_DESC_PARAM_FFU_TMT = 0x20, | |
257 | DEVICE_DESC_PARAM_Q_DPTH = 0x21, | |
258 | DEVICE_DESC_PARAM_DEV_VER = 0x22, | |
259 | DEVICE_DESC_PARAM_NUM_SEC_WPA = 0x24, | |
260 | DEVICE_DESC_PARAM_PSA_MAX_DATA = 0x25, | |
261 | DEVICE_DESC_PARAM_PSA_TMT = 0x29, | |
262 | DEVICE_DESC_PARAM_PRDCT_REV = 0x2A, | |
3d17b9b5 AD |
263 | DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP = 0x4F, |
264 | DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN = 0x53, | |
265 | DEVICE_DESC_PARAM_WB_TYPE = 0x54, | |
266 | DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS = 0x55, | |
c58ab7aa YG |
267 | }; |
268 | ||
8c2582bf SN |
269 | /* Interconnect descriptor parameters offsets in bytes*/ |
270 | enum interconnect_desc_param { | |
271 | INTERCONNECT_DESC_PARAM_LEN = 0x0, | |
272 | INTERCONNECT_DESC_PARAM_TYPE = 0x1, | |
273 | INTERCONNECT_DESC_PARAM_UNIPRO_VER = 0x2, | |
274 | INTERCONNECT_DESC_PARAM_MPHY_VER = 0x4, | |
275 | }; | |
276 | ||
c720c091 SN |
277 | /* Geometry descriptor parameters offsets in bytes*/ |
278 | enum geometry_desc_param { | |
279 | GEOMETRY_DESC_PARAM_LEN = 0x0, | |
280 | GEOMETRY_DESC_PARAM_TYPE = 0x1, | |
281 | GEOMETRY_DESC_PARAM_DEV_CAP = 0x4, | |
282 | GEOMETRY_DESC_PARAM_MAX_NUM_LUN = 0xC, | |
283 | GEOMETRY_DESC_PARAM_SEG_SIZE = 0xD, | |
284 | GEOMETRY_DESC_PARAM_ALLOC_UNIT_SIZE = 0x11, | |
285 | GEOMETRY_DESC_PARAM_MIN_BLK_SIZE = 0x12, | |
286 | GEOMETRY_DESC_PARAM_OPT_RD_BLK_SIZE = 0x13, | |
287 | GEOMETRY_DESC_PARAM_OPT_WR_BLK_SIZE = 0x14, | |
288 | GEOMETRY_DESC_PARAM_MAX_IN_BUF_SIZE = 0x15, | |
289 | GEOMETRY_DESC_PARAM_MAX_OUT_BUF_SIZE = 0x16, | |
290 | GEOMETRY_DESC_PARAM_RPMB_RW_SIZE = 0x17, | |
291 | GEOMETRY_DESC_PARAM_DYN_CAP_RSRC_PLC = 0x18, | |
292 | GEOMETRY_DESC_PARAM_DATA_ORDER = 0x19, | |
293 | GEOMETRY_DESC_PARAM_MAX_NUM_CTX = 0x1A, | |
294 | GEOMETRY_DESC_PARAM_TAG_UNIT_SIZE = 0x1B, | |
295 | GEOMETRY_DESC_PARAM_TAG_RSRC_SIZE = 0x1C, | |
296 | GEOMETRY_DESC_PARAM_SEC_RM_TYPES = 0x1D, | |
297 | GEOMETRY_DESC_PARAM_MEM_TYPES = 0x1E, | |
298 | GEOMETRY_DESC_PARAM_SCM_MAX_NUM_UNITS = 0x20, | |
299 | GEOMETRY_DESC_PARAM_SCM_CAP_ADJ_FCTR = 0x24, | |
300 | GEOMETRY_DESC_PARAM_NPM_MAX_NUM_UNITS = 0x26, | |
301 | GEOMETRY_DESC_PARAM_NPM_CAP_ADJ_FCTR = 0x2A, | |
302 | GEOMETRY_DESC_PARAM_ENM1_MAX_NUM_UNITS = 0x2C, | |
303 | GEOMETRY_DESC_PARAM_ENM1_CAP_ADJ_FCTR = 0x30, | |
304 | GEOMETRY_DESC_PARAM_ENM2_MAX_NUM_UNITS = 0x32, | |
305 | GEOMETRY_DESC_PARAM_ENM2_CAP_ADJ_FCTR = 0x36, | |
306 | GEOMETRY_DESC_PARAM_ENM3_MAX_NUM_UNITS = 0x38, | |
307 | GEOMETRY_DESC_PARAM_ENM3_CAP_ADJ_FCTR = 0x3C, | |
308 | GEOMETRY_DESC_PARAM_ENM4_MAX_NUM_UNITS = 0x3E, | |
309 | GEOMETRY_DESC_PARAM_ENM4_CAP_ADJ_FCTR = 0x42, | |
310 | GEOMETRY_DESC_PARAM_OPT_LOG_BLK_SIZE = 0x44, | |
c14e7adf AD |
311 | GEOMETRY_DESC_PARAM_WB_MAX_ALLOC_UNITS = 0x4F, |
312 | GEOMETRY_DESC_PARAM_WB_MAX_WB_LUNS = 0x53, | |
313 | GEOMETRY_DESC_PARAM_WB_BUFF_CAP_ADJ = 0x54, | |
314 | GEOMETRY_DESC_PARAM_WB_SUP_RED_TYPE = 0x55, | |
315 | GEOMETRY_DESC_PARAM_WB_SUP_WB_TYPE = 0x56, | |
c720c091 SN |
316 | }; |
317 | ||
c648c2d2 SN |
318 | /* Health descriptor parameters offsets in bytes*/ |
319 | enum health_desc_param { | |
320 | HEALTH_DESC_PARAM_LEN = 0x0, | |
321 | HEALTH_DESC_PARAM_TYPE = 0x1, | |
322 | HEALTH_DESC_PARAM_EOL_INFO = 0x2, | |
323 | HEALTH_DESC_PARAM_LIFE_TIME_EST_A = 0x3, | |
324 | HEALTH_DESC_PARAM_LIFE_TIME_EST_B = 0x4, | |
325 | }; | |
326 | ||
6f8d5a6a SC |
327 | /* WriteBooster buffer mode */ |
328 | enum { | |
329 | WB_BUF_MODE_LU_DEDICATED = 0x0, | |
330 | WB_BUF_MODE_SHARED = 0x1, | |
331 | }; | |
332 | ||
57d104c1 SJ |
333 | /* |
334 | * Logical Unit Write Protect | |
335 | * 00h: LU not write protected | |
336 | * 01h: LU write protected when fPowerOnWPEn =1 | |
337 | * 02h: LU permanently write protected when fPermanentWPEn =1 | |
338 | */ | |
339 | enum ufs_lu_wp_type { | |
340 | UFS_LU_NO_WP = 0x00, | |
341 | UFS_LU_POWER_ON_WP = 0x01, | |
342 | UFS_LU_PERM_WP = 0x02, | |
343 | }; | |
344 | ||
3a4bf06d YG |
345 | /* bActiveICCLevel parameter current units */ |
346 | enum { | |
347 | UFSHCD_NANO_AMP = 0, | |
348 | UFSHCD_MICRO_AMP = 1, | |
349 | UFSHCD_MILI_AMP = 2, | |
350 | UFSHCD_AMP = 3, | |
351 | }; | |
352 | ||
3d17b9b5 AD |
353 | /* Possible values for dExtendedUFSFeaturesSupport */ |
354 | enum { | |
355 | UFS_DEV_WRITE_BOOSTER_SUP = BIT(8), | |
356 | }; | |
357 | ||
3a4bf06d YG |
358 | #define POWER_DESC_MAX_SIZE 0x62 |
359 | #define POWER_DESC_MAX_ACTV_ICC_LVLS 16 | |
360 | ||
361 | /* Attribute bActiveICCLevel parameter bit masks definitions */ | |
362 | #define ATTR_ICC_LVL_UNIT_OFFSET 14 | |
363 | #define ATTR_ICC_LVL_UNIT_MASK (0x3 << ATTR_ICC_LVL_UNIT_OFFSET) | |
364 | #define ATTR_ICC_LVL_VALUE_MASK 0x3FF | |
365 | ||
366 | /* Power descriptor parameters offsets in bytes */ | |
367 | enum power_desc_param_offset { | |
368 | PWR_DESC_LEN = 0x0, | |
369 | PWR_DESC_TYPE = 0x1, | |
370 | PWR_DESC_ACTIVE_LVLS_VCC_0 = 0x2, | |
371 | PWR_DESC_ACTIVE_LVLS_VCCQ_0 = 0x22, | |
372 | PWR_DESC_ACTIVE_LVLS_VCCQ2_0 = 0x42, | |
373 | }; | |
374 | ||
66ec6d59 SRT |
375 | /* Exception event mask values */ |
376 | enum { | |
377 | MASK_EE_STATUS = 0xFFFF, | |
378 | MASK_EE_URGENT_BKOPS = (1 << 2), | |
379 | }; | |
380 | ||
381 | /* Background operation status */ | |
57d104c1 | 382 | enum bkops_status { |
66ec6d59 SRT |
383 | BKOPS_STATUS_NO_OP = 0x0, |
384 | BKOPS_STATUS_NON_CRITICAL = 0x1, | |
385 | BKOPS_STATUS_PERF_IMPACT = 0x2, | |
386 | BKOPS_STATUS_CRITICAL = 0x3, | |
57d104c1 | 387 | BKOPS_STATUS_MAX = BKOPS_STATUS_CRITICAL, |
68078d5c DR |
388 | }; |
389 | ||
390 | /* UTP QUERY Transaction Specific Fields OpCode */ | |
391 | enum query_opcode { | |
7a3e97b0 SY |
392 | UPIU_QUERY_OPCODE_NOP = 0x0, |
393 | UPIU_QUERY_OPCODE_READ_DESC = 0x1, | |
394 | UPIU_QUERY_OPCODE_WRITE_DESC = 0x2, | |
395 | UPIU_QUERY_OPCODE_READ_ATTR = 0x3, | |
396 | UPIU_QUERY_OPCODE_WRITE_ATTR = 0x4, | |
397 | UPIU_QUERY_OPCODE_READ_FLAG = 0x5, | |
398 | UPIU_QUERY_OPCODE_SET_FLAG = 0x6, | |
399 | UPIU_QUERY_OPCODE_CLEAR_FLAG = 0x7, | |
400 | UPIU_QUERY_OPCODE_TOGGLE_FLAG = 0x8, | |
401 | }; | |
402 | ||
9e1e8a75 SJ |
403 | /* bRefClkFreq attribute values */ |
404 | enum ufs_ref_clk_freq { | |
405 | REF_CLK_FREQ_19_2_MHZ = 0, | |
406 | REF_CLK_FREQ_26_MHZ = 1, | |
407 | REF_CLK_FREQ_38_4_MHZ = 2, | |
408 | REF_CLK_FREQ_52_MHZ = 3, | |
409 | REF_CLK_FREQ_INVAL = -1, | |
410 | }; | |
411 | ||
412 | struct ufs_ref_clk { | |
413 | unsigned long freq_hz; | |
414 | enum ufs_ref_clk_freq val; | |
415 | }; | |
416 | ||
68078d5c DR |
417 | /* Query response result code */ |
418 | enum { | |
419 | QUERY_RESULT_SUCCESS = 0x00, | |
420 | QUERY_RESULT_NOT_READABLE = 0xF6, | |
421 | QUERY_RESULT_NOT_WRITEABLE = 0xF7, | |
422 | QUERY_RESULT_ALREADY_WRITTEN = 0xF8, | |
423 | QUERY_RESULT_INVALID_LENGTH = 0xF9, | |
424 | QUERY_RESULT_INVALID_VALUE = 0xFA, | |
425 | QUERY_RESULT_INVALID_SELECTOR = 0xFB, | |
426 | QUERY_RESULT_INVALID_INDEX = 0xFC, | |
427 | QUERY_RESULT_INVALID_IDN = 0xFD, | |
428 | QUERY_RESULT_INVALID_OPCODE = 0xFE, | |
429 | QUERY_RESULT_GENERAL_FAILURE = 0xFF, | |
430 | }; | |
431 | ||
7a3e97b0 SY |
432 | /* UTP Transfer Request Command Type (CT) */ |
433 | enum { | |
434 | UPIU_COMMAND_SET_TYPE_SCSI = 0x0, | |
435 | UPIU_COMMAND_SET_TYPE_UFS = 0x1, | |
436 | UPIU_COMMAND_SET_TYPE_QUERY = 0x2, | |
437 | }; | |
438 | ||
5a0b0cb9 SRT |
439 | /* UTP Transfer Request Command Offset */ |
440 | #define UPIU_COMMAND_TYPE_OFFSET 28 | |
441 | ||
442 | /* Offset of the response code in the UPIU header */ | |
443 | #define UPIU_RSP_CODE_OFFSET 8 | |
444 | ||
7a3e97b0 | 445 | enum { |
68078d5c DR |
446 | MASK_SCSI_STATUS = 0xFF, |
447 | MASK_TASK_RESPONSE = 0xFF00, | |
448 | MASK_RSP_UPIU_RESULT = 0xFFFF, | |
449 | MASK_QUERY_DATA_SEG_LEN = 0xFFFF, | |
1c2623c5 | 450 | MASK_RSP_UPIU_DATA_SEG_LEN = 0xFFFF, |
66ec6d59 | 451 | MASK_RSP_EXCEPTION_EVENT = 0x10000, |
8794ee0c | 452 | MASK_TM_SERVICE_RESP = 0xFF, |
5e0a86ee | 453 | MASK_TM_FUNC = 0xFF, |
7a3e97b0 SY |
454 | }; |
455 | ||
456 | /* Task management service response */ | |
457 | enum { | |
458 | UPIU_TASK_MANAGEMENT_FUNC_COMPL = 0x00, | |
459 | UPIU_TASK_MANAGEMENT_FUNC_NOT_SUPPORTED = 0x04, | |
460 | UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED = 0x08, | |
461 | UPIU_TASK_MANAGEMENT_FUNC_FAILED = 0x05, | |
462 | UPIU_INCORRECT_LOGICAL_UNIT_NO = 0x09, | |
463 | }; | |
57d104c1 SJ |
464 | |
465 | /* UFS device power modes */ | |
466 | enum ufs_dev_pwr_mode { | |
467 | UFS_ACTIVE_PWR_MODE = 1, | |
468 | UFS_SLEEP_PWR_MODE = 2, | |
469 | UFS_POWERDOWN_PWR_MODE = 3, | |
470 | }; | |
471 | ||
d14734ae | 472 | #define UFS_WB_BUF_REMAIN_PERCENT(val) ((val) / 10) |
3d17b9b5 | 473 | |
5a0b0cb9 SRT |
474 | /** |
475 | * struct utp_cmd_rsp - Response UPIU structure | |
7a3e97b0 SY |
476 | * @residual_transfer_count: Residual transfer count DW-3 |
477 | * @reserved: Reserved double words DW-4 to DW-7 | |
478 | * @sense_data_len: Sense data length DW-8 U16 | |
479 | * @sense_data: Sense data field DW-8 to DW-12 | |
480 | */ | |
5a0b0cb9 | 481 | struct utp_cmd_rsp { |
e8c8e82a SRT |
482 | __be32 residual_transfer_count; |
483 | __be32 reserved[4]; | |
484 | __be16 sense_data_len; | |
09a5a24f | 485 | u8 sense_data[UFS_SENSE_SIZE]; |
7a3e97b0 SY |
486 | }; |
487 | ||
5a0b0cb9 SRT |
488 | /** |
489 | * struct utp_upiu_rsp - general upiu response structure | |
490 | * @header: UPIU header structure DW-0 to DW-2 | |
491 | * @sr: fields structure for scsi command DW-3 to DW-12 | |
68078d5c | 492 | * @qr: fields structure for query request DW-3 to DW-7 |
5a0b0cb9 SRT |
493 | */ |
494 | struct utp_upiu_rsp { | |
495 | struct utp_upiu_header header; | |
68078d5c DR |
496 | union { |
497 | struct utp_cmd_rsp sr; | |
498 | struct utp_upiu_query qr; | |
499 | }; | |
5a0b0cb9 SRT |
500 | }; |
501 | ||
68078d5c DR |
502 | /** |
503 | * struct ufs_query_req - parameters for building a query request | |
504 | * @query_func: UPIU header query function | |
505 | * @upiu_req: the query request data | |
506 | */ | |
507 | struct ufs_query_req { | |
508 | u8 query_func; | |
509 | struct utp_upiu_query upiu_req; | |
510 | }; | |
511 | ||
512 | /** | |
513 | * struct ufs_query_resp - UPIU QUERY | |
514 | * @response: device response code | |
515 | * @upiu_res: query response data | |
516 | */ | |
517 | struct ufs_query_res { | |
518 | u8 response; | |
519 | struct utp_upiu_query upiu_res; | |
520 | }; | |
521 | ||
aa497613 SRT |
522 | #define UFS_VREG_VCC_MIN_UV 2700000 /* uV */ |
523 | #define UFS_VREG_VCC_MAX_UV 3600000 /* uV */ | |
524 | #define UFS_VREG_VCC_1P8_MIN_UV 1700000 /* uV */ | |
525 | #define UFS_VREG_VCC_1P8_MAX_UV 1950000 /* uV */ | |
a7ef6f02 CG |
526 | #define UFS_VREG_VCCQ_MIN_UV 1140000 /* uV */ |
527 | #define UFS_VREG_VCCQ_MAX_UV 1260000 /* uV */ | |
528 | #define UFS_VREG_VCCQ2_MIN_UV 1700000 /* uV */ | |
aa497613 SRT |
529 | #define UFS_VREG_VCCQ2_MAX_UV 1950000 /* uV */ |
530 | ||
57d104c1 SJ |
531 | /* |
532 | * VCCQ & VCCQ2 current requirement when UFS device is in sleep state | |
533 | * and link is in Hibern8 state. | |
534 | */ | |
535 | #define UFS_VREG_LPM_LOAD_UA 1000 /* uA */ | |
536 | ||
aa497613 SRT |
537 | struct ufs_vreg { |
538 | struct regulator *reg; | |
539 | const char *name; | |
540 | bool enabled; | |
541 | int min_uV; | |
542 | int max_uV; | |
aa497613 SRT |
543 | int max_uA; |
544 | }; | |
545 | ||
546 | struct ufs_vreg_info { | |
547 | struct ufs_vreg *vcc; | |
548 | struct ufs_vreg *vccq; | |
549 | struct ufs_vreg *vccq2; | |
6a771a65 | 550 | struct ufs_vreg *vdd_hba; |
aa497613 SRT |
551 | }; |
552 | ||
57d104c1 SJ |
553 | struct ufs_dev_info { |
554 | bool f_power_on_wp_en; | |
555 | /* Keeps information if any of the LU is power on write protected */ | |
556 | bool is_lu_power_on_wp; | |
731f0621 BH |
557 | /* Maximum number of general LU supported by the UFS device */ |
558 | u8 max_lu_supported; | |
6f8d5a6a | 559 | u8 wb_dedicated_lu; |
93fdd5ac | 560 | u16 wmanufacturerid; |
09750066 | 561 | /*UFS device Product Name */ |
4b828fe1 | 562 | u8 *model; |
09f17791 CG |
563 | u16 wspecversion; |
564 | u32 clk_gating_wait_us; | |
3d17b9b5 AD |
565 | u32 d_ext_ufs_feature_sup; |
566 | u8 b_wb_buffer_type; | |
567 | u32 d_wb_alloc_units; | |
51dd905b | 568 | bool b_rpm_dev_flush_capable; |
3d17b9b5 | 569 | u8 b_presrv_uspc_en; |
93fdd5ac TW |
570 | }; |
571 | ||
d829fc8a SN |
572 | /** |
573 | * ufs_is_valid_unit_desc_lun - checks if the given LUN has a unit descriptor | |
1baa8011 | 574 | * @dev_info: pointer of instance of struct ufs_dev_info |
d829fc8a SN |
575 | * @lun: LU number to check |
576 | * @return: true if the lun has a matching unit descriptor, false otherwise | |
577 | */ | |
1baa8011 BH |
578 | static inline bool ufs_is_valid_unit_desc_lun(struct ufs_dev_info *dev_info, |
579 | u8 lun) | |
d829fc8a | 580 | { |
1baa8011 | 581 | if (!dev_info || !dev_info->max_lu_supported) { |
e0a51425 | 582 | pr_err("Max General LU supported by UFS isn't initialized\n"); |
1baa8011 BH |
583 | return false; |
584 | } | |
585 | ||
586 | return lun == UFS_UPIU_RPMB_WLUN || (lun < dev_info->max_lu_supported); | |
d829fc8a SN |
587 | } |
588 | ||
7a3e97b0 | 589 | #endif /* End of Header */ |