[PATCH] Remove duplicate code in signal.c
[linux-2.6-block.git] / drivers / scsi / sym53c8xx_2 / sym_hipd.h
CommitLineData
1da177e4
LT
1/*
2 * Device driver for the SYMBIOS/LSILOGIC 53C8XX and 53C1010 family
3 * of PCI-SCSI IO processors.
4 *
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
6 *
7 * This driver is derived from the Linux sym53c8xx driver.
8 * Copyright (C) 1998-2000 Gerard Roudier
9 *
10 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
11 * a port of the FreeBSD ncr driver to Linux-1.2.13.
12 *
13 * The original ncr driver has been written for 386bsd and FreeBSD by
14 * Wolfgang Stanglmeier <wolf@cologne.de>
15 * Stefan Esser <se@mi.Uni-Koeln.de>
16 * Copyright (C) 1994 Wolfgang Stanglmeier
17 *
18 * Other major contributions:
19 *
20 * NVRAM detection and reading.
21 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
22 *
23 *-----------------------------------------------------------------------------
24 *
25 * This program is free software; you can redistribute it and/or modify
26 * it under the terms of the GNU General Public License as published by
27 * the Free Software Foundation; either version 2 of the License, or
28 * (at your option) any later version.
29 *
30 * This program is distributed in the hope that it will be useful,
31 * but WITHOUT ANY WARRANTY; without even the implied warranty of
32 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
33 * GNU General Public License for more details.
34 *
35 * You should have received a copy of the GNU General Public License
36 * along with this program; if not, write to the Free Software
37 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
38 */
39
40#ifndef SYM_HIPD_H
41#define SYM_HIPD_H
42
43/*
44 * Generic driver options.
45 *
46 * They may be defined in platform specific headers, if they
47 * are useful.
48 *
49 * SYM_OPT_HANDLE_DIR_UNKNOWN
50 * When this option is set, the SCRIPTS used by the driver
51 * are able to handle SCSI transfers with direction not
52 * supplied by user.
53 * (set for Linux-2.0.X)
54 *
55 * SYM_OPT_HANDLE_DEVICE_QUEUEING
56 * When this option is set, the driver will use a queue per
57 * device and handle QUEUE FULL status requeuing internally.
58 *
59 * SYM_OPT_LIMIT_COMMAND_REORDERING
60 * When this option is set, the driver tries to limit tagged
61 * command reordering to some reasonnable value.
62 * (set for Linux)
63 */
64#if 0
65#define SYM_OPT_HANDLE_DIR_UNKNOWN
66#define SYM_OPT_HANDLE_DEVICE_QUEUEING
67#define SYM_OPT_LIMIT_COMMAND_REORDERING
68#endif
69
70/*
71 * Active debugging tags and verbosity.
72 * Both DEBUG_FLAGS and sym_verbose can be redefined
73 * by the platform specific code to something else.
74 */
75#define DEBUG_ALLOC (0x0001)
76#define DEBUG_PHASE (0x0002)
77#define DEBUG_POLL (0x0004)
78#define DEBUG_QUEUE (0x0008)
79#define DEBUG_RESULT (0x0010)
80#define DEBUG_SCATTER (0x0020)
81#define DEBUG_SCRIPT (0x0040)
82#define DEBUG_TINY (0x0080)
83#define DEBUG_TIMING (0x0100)
84#define DEBUG_NEGO (0x0200)
85#define DEBUG_TAGS (0x0400)
86#define DEBUG_POINTER (0x0800)
87
88#ifndef DEBUG_FLAGS
89#define DEBUG_FLAGS (0x0000)
90#endif
91
92#ifndef sym_verbose
93#define sym_verbose (np->verbose)
94#endif
95
96/*
97 * These ones should have been already defined.
98 */
99#ifndef assert
100#define assert(expression) { \
101 if (!(expression)) { \
102 (void)panic( \
103 "assertion \"%s\" failed: file \"%s\", line %d\n", \
104 #expression, \
105 __FILE__, __LINE__); \
106 } \
107}
108#endif
109
110/*
111 * Number of tasks per device we want to handle.
112 */
113#if SYM_CONF_MAX_TAG_ORDER > 8
114#error "more than 256 tags per logical unit not allowed."
115#endif
116#define SYM_CONF_MAX_TASK (1<<SYM_CONF_MAX_TAG_ORDER)
117
118/*
119 * Donnot use more tasks that we can handle.
120 */
121#ifndef SYM_CONF_MAX_TAG
122#define SYM_CONF_MAX_TAG SYM_CONF_MAX_TASK
123#endif
124#if SYM_CONF_MAX_TAG > SYM_CONF_MAX_TASK
125#undef SYM_CONF_MAX_TAG
126#define SYM_CONF_MAX_TAG SYM_CONF_MAX_TASK
127#endif
128
129/*
130 * This one means 'NO TAG for this job'
131 */
132#define NO_TAG (256)
133
134/*
135 * Number of SCSI targets.
136 */
137#if SYM_CONF_MAX_TARGET > 16
138#error "more than 16 targets not allowed."
139#endif
140
141/*
142 * Number of logical units per target.
143 */
144#if SYM_CONF_MAX_LUN > 64
145#error "more than 64 logical units per target not allowed."
146#endif
147
148/*
149 * Asynchronous pre-scaler (ns). Shall be 40 for
150 * the SCSI timings to be compliant.
151 */
152#define SYM_CONF_MIN_ASYNC (40)
153
44456d37
OH
154
155/*
156 * MEMORY ALLOCATOR.
157 */
158
159#define SYM_MEM_WARN 1 /* Warn on failed operations */
160
161#define SYM_MEM_PAGE_ORDER 0 /* 1 PAGE maximum */
162#define SYM_MEM_CLUSTER_SHIFT (PAGE_SHIFT+SYM_MEM_PAGE_ORDER)
163#define SYM_MEM_FREE_UNUSED /* Free unused pages immediately */
1da177e4
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164/*
165 * Shortest memory chunk is (1<<SYM_MEM_SHIFT), currently 16.
166 * Actual allocations happen as SYM_MEM_CLUSTER_SIZE sized.
167 * (1 PAGE at a time is just fine).
168 */
169#define SYM_MEM_SHIFT 4
170#define SYM_MEM_CLUSTER_SIZE (1UL << SYM_MEM_CLUSTER_SHIFT)
171#define SYM_MEM_CLUSTER_MASK (SYM_MEM_CLUSTER_SIZE-1)
172
173/*
174 * Number of entries in the START and DONE queues.
175 *
176 * We limit to 1 PAGE in order to succeed allocation of
177 * these queues. Each entry is 8 bytes long (2 DWORDS).
178 */
179#ifdef SYM_CONF_MAX_START
180#define SYM_CONF_MAX_QUEUE (SYM_CONF_MAX_START+2)
181#else
182#define SYM_CONF_MAX_QUEUE (7*SYM_CONF_MAX_TASK+2)
183#define SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
184#endif
185
186#if SYM_CONF_MAX_QUEUE > SYM_MEM_CLUSTER_SIZE/8
187#undef SYM_CONF_MAX_QUEUE
188#define SYM_CONF_MAX_QUEUE (SYM_MEM_CLUSTER_SIZE/8)
189#undef SYM_CONF_MAX_START
190#define SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
191#endif
192
193/*
194 * For this one, we want a short name :-)
195 */
196#define MAX_QUEUE SYM_CONF_MAX_QUEUE
197
198/*
199 * Common definitions for both bus space based and legacy IO methods.
200 */
201
202#define INB_OFF(np, o) ioread8(np->s.ioaddr + (o))
203#define INW_OFF(np, o) ioread16(np->s.ioaddr + (o))
204#define INL_OFF(np, o) ioread32(np->s.ioaddr + (o))
205
206#define OUTB_OFF(np, o, val) iowrite8((val), np->s.ioaddr + (o))
207#define OUTW_OFF(np, o, val) iowrite16((val), np->s.ioaddr + (o))
208#define OUTL_OFF(np, o, val) iowrite32((val), np->s.ioaddr + (o))
209
210#define INB(np, r) INB_OFF(np, offsetof(struct sym_reg, r))
211#define INW(np, r) INW_OFF(np, offsetof(struct sym_reg, r))
212#define INL(np, r) INL_OFF(np, offsetof(struct sym_reg, r))
213
214#define OUTB(np, r, v) OUTB_OFF(np, offsetof(struct sym_reg, r), (v))
215#define OUTW(np, r, v) OUTW_OFF(np, offsetof(struct sym_reg, r), (v))
216#define OUTL(np, r, v) OUTL_OFF(np, offsetof(struct sym_reg, r), (v))
217
218#define OUTONB(np, r, m) OUTB(np, r, INB(np, r) | (m))
219#define OUTOFFB(np, r, m) OUTB(np, r, INB(np, r) & ~(m))
220#define OUTONW(np, r, m) OUTW(np, r, INW(np, r) | (m))
221#define OUTOFFW(np, r, m) OUTW(np, r, INW(np, r) & ~(m))
222#define OUTONL(np, r, m) OUTL(np, r, INL(np, r) | (m))
223#define OUTOFFL(np, r, m) OUTL(np, r, INL(np, r) & ~(m))
224
225/*
226 * We normally want the chip to have a consistent view
227 * of driver internal data structures when we restart it.
228 * Thus these macros.
229 */
230#define OUTL_DSP(np, v) \
231 do { \
232 MEMORY_WRITE_BARRIER(); \
233 OUTL(np, nc_dsp, (v)); \
234 } while (0)
235
236#define OUTONB_STD() \
237 do { \
238 MEMORY_WRITE_BARRIER(); \
239 OUTONB(np, nc_dcntl, (STD|NOCOM)); \
240 } while (0)
241
242/*
243 * Command control block states.
244 */
245#define HS_IDLE (0)
246#define HS_BUSY (1)
247#define HS_NEGOTIATE (2) /* sync/wide data transfer*/
248#define HS_DISCONNECT (3) /* Disconnected by target */
249#define HS_WAIT (4) /* waiting for resource */
250
251#define HS_DONEMASK (0x80)
252#define HS_COMPLETE (4|HS_DONEMASK)
253#define HS_SEL_TIMEOUT (5|HS_DONEMASK) /* Selection timeout */
254#define HS_UNEXPECTED (6|HS_DONEMASK) /* Unexpected disconnect */
255#define HS_COMP_ERR (7|HS_DONEMASK) /* Completed with error */
256
257/*
258 * Software Interrupt Codes
259 */
260#define SIR_BAD_SCSI_STATUS (1)
261#define SIR_SEL_ATN_NO_MSG_OUT (2)
262#define SIR_MSG_RECEIVED (3)
263#define SIR_MSG_WEIRD (4)
264#define SIR_NEGO_FAILED (5)
265#define SIR_NEGO_PROTO (6)
266#define SIR_SCRIPT_STOPPED (7)
267#define SIR_REJECT_TO_SEND (8)
268#define SIR_SWIDE_OVERRUN (9)
269#define SIR_SODL_UNDERRUN (10)
270#define SIR_RESEL_NO_MSG_IN (11)
271#define SIR_RESEL_NO_IDENTIFY (12)
272#define SIR_RESEL_BAD_LUN (13)
273#define SIR_TARGET_SELECTED (14)
274#define SIR_RESEL_BAD_I_T_L (15)
275#define SIR_RESEL_BAD_I_T_L_Q (16)
276#define SIR_ABORT_SENT (17)
277#define SIR_RESEL_ABORTED (18)
278#define SIR_MSG_OUT_DONE (19)
279#define SIR_COMPLETE_ERROR (20)
280#define SIR_DATA_OVERRUN (21)
281#define SIR_BAD_PHASE (22)
282#if SYM_CONF_DMA_ADDRESSING_MODE == 2
283#define SIR_DMAP_DIRTY (23)
284#define SIR_MAX (23)
285#else
286#define SIR_MAX (22)
287#endif
288
289/*
290 * Extended error bit codes.
291 * xerr_status field of struct sym_ccb.
292 */
293#define XE_EXTRA_DATA (1) /* unexpected data phase */
294#define XE_BAD_PHASE (1<<1) /* illegal phase (4/5) */
295#define XE_PARITY_ERR (1<<2) /* unrecovered SCSI parity error */
296#define XE_SODL_UNRUN (1<<3) /* ODD transfer in DATA OUT phase */
297#define XE_SWIDE_OVRUN (1<<4) /* ODD transfer in DATA IN phase */
298
299/*
300 * Negotiation status.
301 * nego_status field of struct sym_ccb.
302 */
303#define NS_SYNC (1)
304#define NS_WIDE (2)
305#define NS_PPR (3)
306
307/*
308 * A CCB hashed table is used to retrieve CCB address
309 * from DSA value.
310 */
311#define CCB_HASH_SHIFT 8
312#define CCB_HASH_SIZE (1UL << CCB_HASH_SHIFT)
313#define CCB_HASH_MASK (CCB_HASH_SIZE-1)
314#if 1
315#define CCB_HASH_CODE(dsa) \
316 (((dsa) >> (_LGRU16_(sizeof(struct sym_ccb)))) & CCB_HASH_MASK)
317#else
318#define CCB_HASH_CODE(dsa) (((dsa) >> 9) & CCB_HASH_MASK)
319#endif
320
321#if SYM_CONF_DMA_ADDRESSING_MODE == 2
322/*
323 * We may want to use segment registers for 64 bit DMA.
324 * 16 segments registers -> up to 64 GB addressable.
325 */
326#define SYM_DMAP_SHIFT (4)
327#define SYM_DMAP_SIZE (1u<<SYM_DMAP_SHIFT)
328#define SYM_DMAP_MASK (SYM_DMAP_SIZE-1)
329#endif
330
331/*
332 * Device flags.
333 */
334#define SYM_DISC_ENABLED (1)
335#define SYM_TAGS_ENABLED (1<<1)
336#define SYM_SCAN_BOOT_DISABLED (1<<2)
337#define SYM_SCAN_LUNS_DISABLED (1<<3)
338
339/*
340 * Host adapter miscellaneous flags.
341 */
342#define SYM_AVOID_BUS_RESET (1)
343
344/*
345 * Misc.
346 */
347#define SYM_SNOOP_TIMEOUT (10000000)
348#define BUS_8_BIT 0
349#define BUS_16_BIT 1
350
351/*
352 * Gather negotiable parameters value
353 */
354struct sym_trans {
355 u8 period;
356 u8 offset;
357 unsigned int width:1;
358 unsigned int iu:1;
359 unsigned int dt:1;
360 unsigned int qas:1;
361 unsigned int check_nego:1;
362};
363
364/*
365 * Global TCB HEADER.
366 *
367 * Due to lack of indirect addressing on earlier NCR chips,
368 * this substructure is copied from the TCB to a global
369 * address after selection.
370 * For SYMBIOS chips that support LOAD/STORE this copy is
371 * not needed and thus not performed.
372 */
373struct sym_tcbh {
374 /*
375 * Scripts bus addresses of LUN table accessed from scripts.
376 * LUN #0 is a special case, since multi-lun devices are rare,
377 * and we we want to speed-up the general case and not waste
378 * resources.
379 */
380 u32 luntbl_sa; /* bus address of this table */
381 u32 lun0_sa; /* bus address of LCB #0 */
382 /*
383 * Actual SYNC/WIDE IO registers value for this target.
384 * 'sval', 'wval' and 'uval' are read from SCRIPTS and
385 * so have alignment constraints.
386 */
387/*0*/ u_char uval; /* -> SCNTL4 register */
388/*1*/ u_char sval; /* -> SXFER io register */
389/*2*/ u_char filler1;
390/*3*/ u_char wval; /* -> SCNTL3 io register */
391};
392
393/*
394 * Target Control Block
395 */
396struct sym_tcb {
397 /*
398 * TCB header.
399 * Assumed at offset 0.
400 */
401/*0*/ struct sym_tcbh head;
402
403 /*
404 * LUN table used by the SCRIPTS processor.
405 * An array of bus addresses is used on reselection.
406 */
407 u32 *luntbl; /* LCBs bus address table */
408
409 /*
410 * LUN table used by the C code.
411 */
412 struct sym_lcb *lun0p; /* LCB of LUN #0 (usual case) */
413#if SYM_CONF_MAX_LUN > 1
414 struct sym_lcb **lunmp; /* Other LCBs [1..MAX_LUN] */
415#endif
416
417 /*
418 * Bitmap that tells about LUNs that succeeded at least
419 * 1 IO and therefore assumed to be a real device.
420 * Avoid useless allocation of the LCB structure.
421 */
422 u32 lun_map[(SYM_CONF_MAX_LUN+31)/32];
423
424 /*
425 * Bitmap that tells about LUNs that haven't yet an LCB
426 * allocated (not discovered or LCB allocation failed).
427 */
428 u32 busy0_map[(SYM_CONF_MAX_LUN+31)/32];
429
430#ifdef SYM_HAVE_STCB
431 /*
432 * O/S specific data structure.
433 */
434 struct sym_stcb s;
435#endif
436
437 /* Transfer goal */
438 struct sym_trans tgoal;
439
440 /*
441 * Keep track of the CCB used for the negotiation in order
442 * to ensure that only 1 negotiation is queued at a time.
443 */
444 struct sym_ccb * nego_cp; /* CCB used for the nego */
445
446 /*
447 * Set when we want to reset the device.
448 */
449 u_char to_reset;
450
451 /*
452 * Other user settable limits and options.
453 * These limits are read from the NVRAM if present.
454 */
455 u_char usrflags;
456 u_short usrtags;
53222b90 457 struct scsi_target *starget;
1da177e4
LT
458};
459
460/*
461 * Global LCB HEADER.
462 *
463 * Due to lack of indirect addressing on earlier NCR chips,
464 * this substructure is copied from the LCB to a global
465 * address after selection.
466 * For SYMBIOS chips that support LOAD/STORE this copy is
467 * not needed and thus not performed.
468 */
469struct sym_lcbh {
470 /*
471 * SCRIPTS address jumped by SCRIPTS on reselection.
472 * For not probed logical units, this address points to
473 * SCRIPTS that deal with bad LU handling (must be at
474 * offset zero of the LCB for that reason).
475 */
476/*0*/ u32 resel_sa;
477
478 /*
479 * Task (bus address of a CCB) read from SCRIPTS that points
480 * to the unique ITL nexus allowed to be disconnected.
481 */
482 u32 itl_task_sa;
483
484 /*
485 * Task table bus address (read from SCRIPTS).
486 */
487 u32 itlq_tbl_sa;
488};
489
490/*
491 * Logical Unit Control Block
492 */
493struct sym_lcb {
494 /*
495 * TCB header.
496 * Assumed at offset 0.
497 */
498/*0*/ struct sym_lcbh head;
499
500 /*
501 * Task table read from SCRIPTS that contains pointers to
502 * ITLQ nexuses. The bus address read from SCRIPTS is
503 * inside the header.
504 */
505 u32 *itlq_tbl; /* Kernel virtual address */
506
507 /*
508 * Busy CCBs management.
509 */
510 u_short busy_itlq; /* Number of busy tagged CCBs */
511 u_short busy_itl; /* Number of busy untagged CCBs */
512
513 /*
514 * Circular tag allocation buffer.
515 */
516 u_short ia_tag; /* Tag allocation index */
517 u_short if_tag; /* Tag release index */
518 u_char *cb_tags; /* Circular tags buffer */
519
520 /*
521 * O/S specific data structure.
522 */
523#ifdef SYM_HAVE_SLCB
524 struct sym_slcb s;
525#endif
526
527#ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
528 /*
529 * Optionnaly the driver can handle device queueing,
530 * and requeues internally command to redo.
531 */
532 SYM_QUEHEAD waiting_ccbq;
533 SYM_QUEHEAD started_ccbq;
534 int num_sgood;
535 u_short started_tags;
536 u_short started_no_tag;
537 u_short started_max;
538 u_short started_limit;
539#endif
540
541#ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
542 /*
543 * Optionally the driver can try to prevent SCSI
544 * IOs from being reordered too much.
545 */
546 u_char tags_si; /* Current index to tags sum */
547 u_short tags_sum[2]; /* Tags sum counters */
548 u_short tags_since; /* # of tags since last switch */
549#endif
550
551 /*
552 * Set when we want to clear all tasks.
553 */
554 u_char to_clear;
555
556 /*
557 * Capabilities.
558 */
559 u_char user_flags;
560 u_char curr_flags;
561};
562
563/*
564 * Action from SCRIPTS on a task.
565 * Is part of the CCB, but is also used separately to plug
566 * error handling action to perform from SCRIPTS.
567 */
568struct sym_actscr {
569 u32 start; /* Jumped by SCRIPTS after selection */
570 u32 restart; /* Jumped by SCRIPTS on relection */
571};
572
573/*
574 * Phase mismatch context.
575 *
576 * It is part of the CCB and is used as parameters for the
577 * DATA pointer. We need two contexts to handle correctly the
578 * SAVED DATA POINTER.
579 */
580struct sym_pmc {
581 struct sym_tblmove sg; /* Updated interrupted SG block */
582 u32 ret; /* SCRIPT return address */
583};
584
585/*
586 * LUN control block lookup.
587 * We use a direct pointer for LUN #0, and a table of
588 * pointers which is only allocated for devices that support
589 * LUN(s) > 0.
590 */
591#if SYM_CONF_MAX_LUN <= 1
592#define sym_lp(tp, lun) (!lun) ? (tp)->lun0p : NULL
593#else
594#define sym_lp(tp, lun) \
595 (!lun) ? (tp)->lun0p : (tp)->lunmp ? (tp)->lunmp[(lun)] : NULL
596#endif
597
598/*
599 * Status are used by the host and the script processor.
600 *
601 * The last four bytes (status[4]) are copied to the
602 * scratchb register (declared as scr0..scr3) just after the
603 * select/reselect, and copied back just after disconnecting.
604 * Inside the script the XX_REG are used.
605 */
606
607/*
608 * Last four bytes (script)
609 */
610#define HX_REG scr0
611#define HX_PRT nc_scr0
612#define HS_REG scr1
613#define HS_PRT nc_scr1
614#define SS_REG scr2
615#define SS_PRT nc_scr2
616#define HF_REG scr3
617#define HF_PRT nc_scr3
618
619/*
620 * Last four bytes (host)
621 */
622#define host_xflags phys.head.status[0]
623#define host_status phys.head.status[1]
624#define ssss_status phys.head.status[2]
625#define host_flags phys.head.status[3]
626
627/*
628 * Host flags
629 */
630#define HF_IN_PM0 1u
631#define HF_IN_PM1 (1u<<1)
632#define HF_ACT_PM (1u<<2)
633#define HF_DP_SAVED (1u<<3)
634#define HF_SENSE (1u<<4)
635#define HF_EXT_ERR (1u<<5)
636#define HF_DATA_IN (1u<<6)
637#ifdef SYM_CONF_IARB_SUPPORT
638#define HF_HINT_IARB (1u<<7)
639#endif
640
641/*
642 * More host flags
643 */
644#if SYM_CONF_DMA_ADDRESSING_MODE == 2
645#define HX_DMAP_DIRTY (1u<<7)
646#endif
647
648/*
649 * Global CCB HEADER.
650 *
651 * Due to lack of indirect addressing on earlier NCR chips,
652 * this substructure is copied from the ccb to a global
653 * address after selection (or reselection) and copied back
654 * before disconnect.
655 * For SYMBIOS chips that support LOAD/STORE this copy is
656 * not needed and thus not performed.
657 */
658
659struct sym_ccbh {
660 /*
661 * Start and restart SCRIPTS addresses (must be at 0).
662 */
663/*0*/ struct sym_actscr go;
664
665 /*
666 * SCRIPTS jump address that deal with data pointers.
667 * 'savep' points to the position in the script responsible
668 * for the actual transfer of data.
669 * It's written on reception of a SAVE_DATA_POINTER message.
670 */
671 u32 savep; /* Jump address to saved data pointer */
672 u32 lastp; /* SCRIPTS address at end of data */
673#ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
674 u32 wlastp;
675#endif
676
677 /*
678 * Status fields.
679 */
680 u8 status[4];
681};
682
683/*
684 * GET/SET the value of the data pointer used by SCRIPTS.
685 *
686 * We must distinguish between the LOAD/STORE-based SCRIPTS
687 * that use directly the header in the CCB, and the NCR-GENERIC
688 * SCRIPTS that use the copy of the header in the HCB.
689 */
690#if SYM_CONF_GENERIC_SUPPORT
691#define sym_set_script_dp(np, cp, dp) \
692 do { \
693 if (np->features & FE_LDSTR) \
694 cp->phys.head.lastp = cpu_to_scr(dp); \
695 else \
696 np->ccb_head.lastp = cpu_to_scr(dp); \
697 } while (0)
698#define sym_get_script_dp(np, cp) \
699 scr_to_cpu((np->features & FE_LDSTR) ? \
700 cp->phys.head.lastp : np->ccb_head.lastp)
701#else
702#define sym_set_script_dp(np, cp, dp) \
703 do { \
704 cp->phys.head.lastp = cpu_to_scr(dp); \
705 } while (0)
706
707#define sym_get_script_dp(np, cp) (cp->phys.head.lastp)
708#endif
709
710/*
711 * Data Structure Block
712 *
713 * During execution of a ccb by the script processor, the
714 * DSA (data structure address) register points to this
715 * substructure of the ccb.
716 */
717struct sym_dsb {
718 /*
719 * CCB header.
720 * Also assumed at offset 0 of the sym_ccb structure.
721 */
722/*0*/ struct sym_ccbh head;
723
724 /*
725 * Phase mismatch contexts.
726 * We need two to handle correctly the SAVED DATA POINTER.
727 * MUST BOTH BE AT OFFSET < 256, due to using 8 bit arithmetic
728 * for address calculation from SCRIPTS.
729 */
730 struct sym_pmc pm0;
731 struct sym_pmc pm1;
732
733 /*
734 * Table data for Script
735 */
736 struct sym_tblsel select;
737 struct sym_tblmove smsg;
738 struct sym_tblmove smsg_ext;
739 struct sym_tblmove cmd;
740 struct sym_tblmove sense;
741 struct sym_tblmove wresid;
742 struct sym_tblmove data [SYM_CONF_MAX_SG];
743};
744
745/*
746 * Our Command Control Block
747 */
748struct sym_ccb {
749 /*
750 * This is the data structure which is pointed by the DSA
751 * register when it is executed by the script processor.
752 * It must be the first entry.
753 */
754 struct sym_dsb phys;
755
756 /*
757 * Pointer to CAM ccb and related stuff.
758 */
759 struct scsi_cmnd *cmd; /* CAM scsiio ccb */
760 u8 cdb_buf[16]; /* Copy of CDB */
761#define SYM_SNS_BBUF_LEN 32
762 u8 sns_bbuf[SYM_SNS_BBUF_LEN]; /* Bounce buffer for sense data */
763 int data_len; /* Total data length */
764 int segments; /* Number of SG segments */
765
766 u8 order; /* Tag type (if tagged command) */
53222b90 767 unsigned char odd_byte_adjustment; /* odd-sized req on wide bus */
1da177e4 768
1da177e4
LT
769 u_char nego_status; /* Negotiation status */
770 u_char xerr_status; /* Extended error flags */
771 u32 extra_bytes; /* Extraneous bytes transferred */
772
773 /*
774 * Message areas.
775 * We prepare a message to be sent after selection.
776 * We may use a second one if the command is rescheduled
777 * due to CHECK_CONDITION or COMMAND TERMINATED.
778 * Contents are IDENTIFY and SIMPLE_TAG.
779 * While negotiating sync or wide transfer,
780 * a SDTR or WDTR message is appended.
781 */
782 u_char scsi_smsg [12];
783 u_char scsi_smsg2[12];
784
785 /*
786 * Auto request sense related fields.
787 */
788 u_char sensecmd[6]; /* Request Sense command */
789 u_char sv_scsi_status; /* Saved SCSI status */
790 u_char sv_xerr_status; /* Saved extended status */
791 int sv_resid; /* Saved residual */
792
793 /*
794 * Other fields.
795 */
796 u32 ccb_ba; /* BUS address of this CCB */
797 u_short tag; /* Tag for this transfer */
798 /* NO_TAG means no tag */
799 u_char target;
800 u_char lun;
801 struct sym_ccb *link_ccbh; /* Host adapter CCB hash chain */
802 SYM_QUEHEAD link_ccbq; /* Link to free/busy CCB queue */
803 u32 startp; /* Initial data pointer */
804 u32 goalp; /* Expected last data pointer */
805#ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
806 u32 wgoalp;
807#endif
808 int ext_sg; /* Extreme data pointer, used */
809 int ext_ofs; /* to calculate the residual. */
810#ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
811 SYM_QUEHEAD link2_ccbq; /* Link for device queueing */
812 u_char started; /* CCB queued to the squeue */
813#endif
814 u_char to_abort; /* Want this IO to be aborted */
815#ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
816 u_char tags_si; /* Lun tags sum index (0,1) */
817#endif
818};
819
53222b90 820#define CCB_BA(cp,lbl) cpu_to_scr(cp->ccb_ba + offsetof(struct sym_ccb, lbl))
1da177e4
LT
821
822#ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
823#define sym_goalp(cp) ((cp->host_flags & HF_DATA_IN) ? cp->goalp : cp->wgoalp)
824#else
825#define sym_goalp(cp) (cp->goalp)
826#endif
827
828typedef struct device *m_pool_ident_t;
829
830/*
831 * Host Control Block
832 */
833struct sym_hcb {
834 /*
835 * Global headers.
836 * Due to poorness of addressing capabilities, earlier
837 * chips (810, 815, 825) copy part of the data structures
838 * (CCB, TCB and LCB) in fixed areas.
839 */
840#if SYM_CONF_GENERIC_SUPPORT
841 struct sym_ccbh ccb_head;
842 struct sym_tcbh tcb_head;
843 struct sym_lcbh lcb_head;
844#endif
845 /*
846 * Idle task and invalid task actions and
847 * their bus addresses.
848 */
849 struct sym_actscr idletask, notask, bad_itl, bad_itlq;
850 u32 idletask_ba, notask_ba, bad_itl_ba, bad_itlq_ba;
851
852 /*
853 * Dummy lun table to protect us against target
854 * returning bad lun number on reselection.
855 */
856 u32 *badluntbl; /* Table physical address */
857 u32 badlun_sa; /* SCRIPT handler BUS address */
858
859 /*
860 * Bus address of this host control block.
861 */
862 u32 hcb_ba;
863
864 /*
865 * Bit 32-63 of the on-chip RAM bus address in LE format.
866 * The START_RAM64 script loads the MMRS and MMWS from this
867 * field.
868 */
869 u32 scr_ram_seg;
870
871 /*
872 * Initial value of some IO register bits.
873 * These values are assumed to have been set by BIOS, and may
874 * be used to probe adapter implementation differences.
875 */
876 u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest3, sv_ctest4,
877 sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4, sv_scntl4,
878 sv_stest1;
879
880 /*
881 * Actual initial value of IO register bits used by the
882 * driver. They are loaded at initialisation according to
883 * features that are to be enabled/disabled.
884 */
885 u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest3, rv_ctest4,
886 rv_ctest5, rv_stest2, rv_ccntl0, rv_ccntl1, rv_scntl4;
887
888 /*
889 * Target data.
890 */
891 struct sym_tcb target[SYM_CONF_MAX_TARGET];
892
893 /*
894 * Target control block bus address array used by the SCRIPT
895 * on reselection.
896 */
897 u32 *targtbl;
898 u32 targtbl_ba;
899
900 /*
901 * DMA pool handle for this HBA.
902 */
903 m_pool_ident_t bus_dmat;
904
905 /*
906 * O/S specific data structure
907 */
908 struct sym_shcb s;
909
910 /*
911 * Physical bus addresses of the chip.
912 */
913 u32 mmio_ba; /* MMIO 32 bit BUS address */
914 int mmio_ws; /* MMIO Window size */
915
916 u32 ram_ba; /* RAM 32 bit BUS address */
917 int ram_ws; /* RAM window size */
918
919 /*
920 * SCRIPTS virtual and physical bus addresses.
921 * 'script' is loaded in the on-chip RAM if present.
922 * 'scripth' stays in main memory for all chips except the
923 * 53C895A, 53C896 and 53C1010 that provide 8K on-chip RAM.
924 */
925 u_char *scripta0; /* Copy of scripts A, B, Z */
926 u_char *scriptb0;
927 u_char *scriptz0;
928 u32 scripta_ba; /* Actual scripts A, B, Z */
929 u32 scriptb_ba; /* 32 bit bus addresses. */
930 u32 scriptz_ba;
931 u_short scripta_sz; /* Actual size of script A, B, Z*/
932 u_short scriptb_sz;
933 u_short scriptz_sz;
934
935 /*
936 * Bus addresses, setup and patch methods for
937 * the selected firmware.
938 */
939 struct sym_fwa_ba fwa_bas; /* Useful SCRIPTA bus addresses */
940 struct sym_fwb_ba fwb_bas; /* Useful SCRIPTB bus addresses */
941 struct sym_fwz_ba fwz_bas; /* Useful SCRIPTZ bus addresses */
942 void (*fw_setup)(struct sym_hcb *np, struct sym_fw *fw);
943 void (*fw_patch)(struct sym_hcb *np);
944 char *fw_name;
945
946 /*
947 * General controller parameters and configuration.
948 */
949 u_short device_id; /* PCI device id */
950 u_char revision_id; /* PCI device revision id */
951 u_int features; /* Chip features map */
952 u_char myaddr; /* SCSI id of the adapter */
953 u_char maxburst; /* log base 2 of dwords burst */
954 u_char maxwide; /* Maximum transfer width */
955 u_char minsync; /* Min sync period factor (ST) */
956 u_char maxsync; /* Max sync period factor (ST) */
957 u_char maxoffs; /* Max scsi offset (ST) */
958 u_char minsync_dt; /* Min sync period factor (DT) */
959 u_char maxsync_dt; /* Max sync period factor (DT) */
960 u_char maxoffs_dt; /* Max scsi offset (DT) */
961 u_char multiplier; /* Clock multiplier (1,2,4) */
962 u_char clock_divn; /* Number of clock divisors */
963 u32 clock_khz; /* SCSI clock frequency in KHz */
964 u32 pciclk_khz; /* Estimated PCI clock in KHz */
965 /*
966 * Start queue management.
967 * It is filled up by the host processor and accessed by the
968 * SCRIPTS processor in order to start SCSI commands.
969 */
970 volatile /* Prevent code optimizations */
971 u32 *squeue; /* Start queue virtual address */
972 u32 squeue_ba; /* Start queue BUS address */
973 u_short squeueput; /* Next free slot of the queue */
974 u_short actccbs; /* Number of allocated CCBs */
975
976 /*
977 * Command completion queue.
978 * It is the same size as the start queue to avoid overflow.
979 */
980 u_short dqueueget; /* Next position to scan */
981 volatile /* Prevent code optimizations */
982 u32 *dqueue; /* Completion (done) queue */
983 u32 dqueue_ba; /* Done queue BUS address */
984
985 /*
986 * Miscellaneous buffers accessed by the scripts-processor.
987 * They shall be DWORD aligned, because they may be read or
988 * written with a script command.
989 */
990 u_char msgout[8]; /* Buffer for MESSAGE OUT */
991 u_char msgin [8]; /* Buffer for MESSAGE IN */
992 u32 lastmsg; /* Last SCSI message sent */
993 u32 scratch; /* Scratch for SCSI receive */
994 /* Also used for cache test */
995 /*
996 * Miscellaneous configuration and status parameters.
997 */
998 u_char usrflags; /* Miscellaneous user flags */
999 u_char scsi_mode; /* Current SCSI BUS mode */
1000 u_char verbose; /* Verbosity for this controller*/
1001
1002 /*
1003 * CCB lists and queue.
1004 */
1005 struct sym_ccb **ccbh; /* CCBs hashed by DSA value */
1006 /* CCB_HASH_SIZE lists of CCBs */
1007 SYM_QUEHEAD free_ccbq; /* Queue of available CCBs */
1008 SYM_QUEHEAD busy_ccbq; /* Queue of busy CCBs */
1009
1010 /*
1011 * During error handling and/or recovery,
1012 * active CCBs that are to be completed with
1013 * error or requeued are moved from the busy_ccbq
1014 * to the comp_ccbq prior to completion.
1015 */
1016 SYM_QUEHEAD comp_ccbq;
1017
1018#ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
1019 SYM_QUEHEAD dummy_ccbq;
1020#endif
1021
1022 /*
1023 * IMMEDIATE ARBITRATION (IARB) control.
1024 *
1025 * We keep track in 'last_cp' of the last CCB that has been
1026 * queued to the SCRIPTS processor and clear 'last_cp' when
1027 * this CCB completes. If last_cp is not zero at the moment
1028 * we queue a new CCB, we set a flag in 'last_cp' that is
1029 * used by the SCRIPTS as a hint for setting IARB.
1030 * We donnot set more than 'iarb_max' consecutive hints for
1031 * IARB in order to leave devices a chance to reselect.
1032 * By the way, any non zero value of 'iarb_max' is unfair. :)
1033 */
1034#ifdef SYM_CONF_IARB_SUPPORT
1035 u_short iarb_max; /* Max. # consecutive IARB hints*/
1036 u_short iarb_count; /* Actual # of these hints */
1037 struct sym_ccb * last_cp;
1038#endif
1039
1040 /*
1041 * Command abort handling.
1042 * We need to synchronize tightly with the SCRIPTS
1043 * processor in order to handle things correctly.
1044 */
1045 u_char abrt_msg[4]; /* Message to send buffer */
1046 struct sym_tblmove abrt_tbl; /* Table for the MOV of it */
1047 struct sym_tblsel abrt_sel; /* Sync params for selection */
1048 u_char istat_sem; /* Tells the chip to stop (SEM) */
1049
1050 /*
1051 * 64 bit DMA handling.
1052 */
1053#if SYM_CONF_DMA_ADDRESSING_MODE != 0
1054 u_char use_dac; /* Use PCI DAC cycles */
1055#if SYM_CONF_DMA_ADDRESSING_MODE == 2
1056 u_char dmap_dirty; /* Dma segments registers dirty */
1057 u32 dmap_bah[SYM_DMAP_SIZE];/* Segment registers map */
1058#endif
1059#endif
1060};
1061
1062#define HCB_BA(np, lbl) (np->hcb_ba + offsetof(struct sym_hcb, lbl))
1063
1064
1065/*
1066 * FIRMWARES (sym_fw.c)
1067 */
1068struct sym_fw * sym_find_firmware(struct sym_chip *chip);
1069void sym_fw_bind_script(struct sym_hcb *np, u32 *start, int len);
1070
1071/*
1072 * Driver methods called from O/S specific code.
1073 */
1074char *sym_driver_name(void);
1075void sym_print_xerr(struct scsi_cmnd *cmd, int x_status);
1076int sym_reset_scsi_bus(struct sym_hcb *np, int enab_int);
1077struct sym_chip *sym_lookup_chip_table(u_short device_id, u_char revision);
1078void sym_put_start_queue(struct sym_hcb *np, struct sym_ccb *cp);
1079#ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
1080void sym_start_next_ccbs(struct sym_hcb *np, struct sym_lcb *lp, int maxn);
1081#endif
1082void sym_start_up(struct sym_hcb *np, int reason);
1083void sym_interrupt(struct sym_hcb *np);
1084int sym_clear_tasks(struct sym_hcb *np, int cam_status, int target, int lun, int task);
1085struct sym_ccb *sym_get_ccb(struct sym_hcb *np, struct scsi_cmnd *cmd, u_char tag_order);
1086void sym_free_ccb(struct sym_hcb *np, struct sym_ccb *cp);
1087struct sym_lcb *sym_alloc_lcb(struct sym_hcb *np, u_char tn, u_char ln);
1088int sym_queue_scsiio(struct sym_hcb *np, struct scsi_cmnd *csio, struct sym_ccb *cp);
1089int sym_abort_scsiio(struct sym_hcb *np, struct scsi_cmnd *ccb, int timed_out);
1090int sym_reset_scsi_target(struct sym_hcb *np, int target);
1091void sym_hcb_free(struct sym_hcb *np);
1092int sym_hcb_attach(struct Scsi_Host *shost, struct sym_fw *fw, struct sym_nvram *nvram);
1093
1094/*
1095 * Build a scatter/gather entry.
1096 *
1097 * For 64 bit systems, we use the 8 upper bits of the size field
1098 * to provide bus address bits 32-39 to the SCRIPTS processor.
1099 * This allows the 895A, 896, 1010 to address up to 1 TB of memory.
1100 */
1101
1102#if SYM_CONF_DMA_ADDRESSING_MODE == 0
1103#define sym_build_sge(np, data, badd, len) \
1104do { \
1105 (data)->addr = cpu_to_scr(badd); \
1106 (data)->size = cpu_to_scr(len); \
1107} while (0)
1108#elif SYM_CONF_DMA_ADDRESSING_MODE == 1
1109#define sym_build_sge(np, data, badd, len) \
1110do { \
1111 (data)->addr = cpu_to_scr(badd); \
1112 (data)->size = cpu_to_scr((((badd) >> 8) & 0xff000000) + len); \
1113} while (0)
1114#elif SYM_CONF_DMA_ADDRESSING_MODE == 2
1115int sym_lookup_dmap(struct sym_hcb *np, u32 h, int s);
1116static __inline void
1117sym_build_sge(struct sym_hcb *np, struct sym_tblmove *data, u64 badd, int len)
1118{
1119 u32 h = (badd>>32);
1120 int s = (h&SYM_DMAP_MASK);
1121
1122 if (h != np->dmap_bah[s])
1123 goto bad;
1124good:
1125 (data)->addr = cpu_to_scr(badd);
1126 (data)->size = cpu_to_scr((s<<24) + len);
1127 return;
1128bad:
1129 s = sym_lookup_dmap(np, h, s);
1130 goto good;
1131}
1132#else
1133#error "Unsupported DMA addressing mode"
1134#endif
1135
1136/*
1137 * Set up data pointers used by SCRIPTS.
1138 * Called from O/S specific code.
1139 */
1140static inline void sym_setup_data_pointers(struct sym_hcb *np,
1141 struct sym_ccb *cp, int dir)
1142{
1143 u32 lastp, goalp;
1144
1145 /*
1146 * No segments means no data.
1147 */
1148 if (!cp->segments)
53222b90 1149 dir = DMA_NONE;
1da177e4
LT
1150
1151 /*
1152 * Set the data pointer.
1153 */
1154 switch(dir) {
1155#ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
53222b90 1156 case DMA_BIDIRECTIONAL:
1da177e4 1157#endif
53222b90 1158 case DMA_TO_DEVICE:
1da177e4
LT
1159 goalp = SCRIPTA_BA(np, data_out2) + 8;
1160 lastp = goalp - 8 - (cp->segments * (2*4));
1161#ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
1162 cp->wgoalp = cpu_to_scr(goalp);
53222b90 1163 if (dir != DMA_BIDIRECTIONAL)
1da177e4
LT
1164 break;
1165 cp->phys.head.wlastp = cpu_to_scr(lastp);
1166 /* fall through */
1167#else
1168 break;
1169#endif
53222b90 1170 case DMA_FROM_DEVICE:
1da177e4
LT
1171 cp->host_flags |= HF_DATA_IN;
1172 goalp = SCRIPTA_BA(np, data_in2) + 8;
1173 lastp = goalp - 8 - (cp->segments * (2*4));
1174 break;
53222b90 1175 case DMA_NONE:
1da177e4
LT
1176 default:
1177#ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
1178 cp->host_flags |= HF_DATA_IN;
1179#endif
1180 lastp = goalp = SCRIPTB_BA(np, no_data);
1181 break;
1182 }
1183
1184 /*
1185 * Set all pointers values needed by SCRIPTS.
1186 */
1187 cp->phys.head.lastp = cpu_to_scr(lastp);
1188 cp->phys.head.savep = cpu_to_scr(lastp);
1189 cp->startp = cp->phys.head.savep;
1190 cp->goalp = cpu_to_scr(goalp);
1191
1192#ifdef SYM_OPT_HANDLE_DIR_UNKNOWN
1193 /*
1194 * If direction is unknown, start at data_io.
1195 */
53222b90 1196 if (dir == DMA_BIDIRECTIONAL)
1da177e4
LT
1197 cp->phys.head.savep = cpu_to_scr(SCRIPTB_BA(np, data_io));
1198#endif
1199}
1200
1201/*
1202 * MEMORY ALLOCATOR.
1203 */
1204
1da177e4
LT
1205#define sym_get_mem_cluster() \
1206 (void *) __get_free_pages(GFP_ATOMIC, SYM_MEM_PAGE_ORDER)
1207#define sym_free_mem_cluster(p) \
1208 free_pages((unsigned long)p, SYM_MEM_PAGE_ORDER)
1209
1210/*
1211 * Link between free memory chunks of a given size.
1212 */
1213typedef struct sym_m_link {
1214 struct sym_m_link *next;
1215} *m_link_p;
1216
1217/*
1218 * Virtual to bus physical translation for a given cluster.
1219 * Such a structure is only useful with DMA abstraction.
1220 */
1221typedef struct sym_m_vtob { /* Virtual to Bus address translation */
1222 struct sym_m_vtob *next;
1223 void *vaddr; /* Virtual address */
1224 dma_addr_t baddr; /* Bus physical address */
1225} *m_vtob_p;
1226
1227/* Hash this stuff a bit to speed up translations */
1228#define VTOB_HASH_SHIFT 5
1229#define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT)
1230#define VTOB_HASH_MASK (VTOB_HASH_SIZE-1)
1231#define VTOB_HASH_CODE(m) \
1232 ((((unsigned long)(m)) >> SYM_MEM_CLUSTER_SHIFT) & VTOB_HASH_MASK)
1233
1234/*
1235 * Memory pool of a given kind.
1236 * Ideally, we want to use:
1237 * 1) 1 pool for memory we donnot need to involve in DMA.
1238 * 2) The same pool for controllers that require same DMA
1239 * constraints and features.
1240 * The OS specific m_pool_id_t thing and the sym_m_pool_match()
1241 * method are expected to tell the driver about.
1242 */
1243typedef struct sym_m_pool {
1244 m_pool_ident_t dev_dmat; /* Identifies the pool (see above) */
1245 void * (*get_mem_cluster)(struct sym_m_pool *);
1246#ifdef SYM_MEM_FREE_UNUSED
1247 void (*free_mem_cluster)(struct sym_m_pool *, void *);
1248#endif
1249#define M_GET_MEM_CLUSTER() mp->get_mem_cluster(mp)
1250#define M_FREE_MEM_CLUSTER(p) mp->free_mem_cluster(mp, p)
1251 int nump;
1252 m_vtob_p vtob[VTOB_HASH_SIZE];
1253 struct sym_m_pool *next;
1254 struct sym_m_link h[SYM_MEM_CLUSTER_SHIFT - SYM_MEM_SHIFT + 1];
1255} *m_pool_p;
1256
1257/*
1258 * Alloc, free and translate addresses to bus physical
1259 * for DMAable memory.
1260 */
1261void *__sym_calloc_dma(m_pool_ident_t dev_dmat, int size, char *name);
1262void __sym_mfree_dma(m_pool_ident_t dev_dmat, void *m, int size, char *name);
1263dma_addr_t __vtobus(m_pool_ident_t dev_dmat, void *m);
1264
1265/*
1266 * Verbs used by the driver code for DMAable memory handling.
1267 * The _uvptv_ macro avoids a nasty warning about pointer to volatile
1268 * being discarded.
1269 */
1270#define _uvptv_(p) ((void *)((u_long)(p)))
1271
1272#define _sym_calloc_dma(np, l, n) __sym_calloc_dma(np->bus_dmat, l, n)
1273#define _sym_mfree_dma(np, p, l, n) \
1274 __sym_mfree_dma(np->bus_dmat, _uvptv_(p), l, n)
1275#define sym_calloc_dma(l, n) _sym_calloc_dma(np, l, n)
1276#define sym_mfree_dma(p, l, n) _sym_mfree_dma(np, p, l, n)
1277#define vtobus(p) __vtobus(np->bus_dmat, _uvptv_(p))
1278
1279/*
1280 * We have to provide the driver memory allocator with methods for
1281 * it to maintain virtual to bus physical address translations.
1282 */
1283
1284#define sym_m_pool_match(mp_id1, mp_id2) (mp_id1 == mp_id2)
1285
1286static __inline void *sym_m_get_dma_mem_cluster(m_pool_p mp, m_vtob_p vbp)
1287{
1288 void *vaddr = NULL;
1289 dma_addr_t baddr = 0;
1290
1291 vaddr = dma_alloc_coherent(mp->dev_dmat, SYM_MEM_CLUSTER_SIZE, &baddr,
1292 GFP_ATOMIC);
1293 if (vaddr) {
1294 vbp->vaddr = vaddr;
1295 vbp->baddr = baddr;
1296 }
1297 return vaddr;
1298}
1299
1300static __inline void sym_m_free_dma_mem_cluster(m_pool_p mp, m_vtob_p vbp)
1301{
1302 dma_free_coherent(mp->dev_dmat, SYM_MEM_CLUSTER_SIZE, vbp->vaddr,
1303 vbp->baddr);
1304}
1305
1306#endif /* SYM_HIPD_H */