projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge branch 'master'
[linux-2.6-block.git] / drivers / scsi / sym53c8xx_2 / sym_hipd.h
CommitLineData
1da177e4
LT		 1/*
2 * Device driver for the SYMBIOS/LSILOGIC 53C8XX and 53C1010 family
3 * of PCI-SCSI IO processors.
4 *
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
6 *
7 * This driver is derived from the Linux sym53c8xx driver.
8 * Copyright (C) 1998-2000 Gerard Roudier
9 *
10 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
11 * a port of the FreeBSD ncr driver to Linux-1.2.13.
12 *
13 * The original ncr driver has been written for 386bsd and FreeBSD by
14 * Wolfgang Stanglmeier <wolf@cologne.de>
15 * Stefan Esser <se@mi.Uni-Koeln.de>
16 * Copyright (C) 1994 Wolfgang Stanglmeier
17 *
18 * Other major contributions:
19 *
20 * NVRAM detection and reading.
21 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
22 *
23 *-----------------------------------------------------------------------------
24 *
25 * This program is free software; you can redistribute it and/or modify
26 * it under the terms of the GNU General Public License as published by
27 * the Free Software Foundation; either version 2 of the License, or
28 * (at your option) any later version.
29 *
30 * This program is distributed in the hope that it will be useful,
31 * but WITHOUT ANY WARRANTY; without even the implied warranty of
32 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
33 * GNU General Public License for more details.
34 *
35 * You should have received a copy of the GNU General Public License
36 * along with this program; if not, write to the Free Software
37 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
38 */
39
4e57b681
TS		 40#include <linux/gfp.h>
41
1da177e4
LT		 42#ifndef SYM_HIPD_H
43#define SYM_HIPD_H
44
45/*
46 * Generic driver options.
47 *
48 * They may be defined in platform specific headers, if they
49 * are useful.
50 *
1da177e4
LT		 51 * SYM_OPT_HANDLE_DEVICE_QUEUEING
52 * When this option is set, the driver will use a queue per
53 * device and handle QUEUE FULL status requeuing internally.
54 *
55 * SYM_OPT_LIMIT_COMMAND_REORDERING
56 * When this option is set, the driver tries to limit tagged
57 * command reordering to some reasonnable value.
58 * (set for Linux)
59 */
60#if 0
1da177e4
LT		 61#define SYM_OPT_HANDLE_DEVICE_QUEUEING
62#define SYM_OPT_LIMIT_COMMAND_REORDERING
63#endif
64
65/*
66 * Active debugging tags and verbosity.
67 * Both DEBUG_FLAGS and sym_verbose can be redefined
68 * by the platform specific code to something else.
69 */
70#define DEBUG_ALLOC (0x0001)
71#define DEBUG_PHASE (0x0002)
72#define DEBUG_POLL (0x0004)
73#define DEBUG_QUEUE (0x0008)
74#define DEBUG_RESULT (0x0010)
75#define DEBUG_SCATTER (0x0020)
76#define DEBUG_SCRIPT (0x0040)
77#define DEBUG_TINY (0x0080)
78#define DEBUG_TIMING (0x0100)
79#define DEBUG_NEGO (0x0200)
80#define DEBUG_TAGS (0x0400)
81#define DEBUG_POINTER (0x0800)
82
83#ifndef DEBUG_FLAGS
84#define DEBUG_FLAGS (0x0000)
85#endif
86
87#ifndef sym_verbose
88#define sym_verbose (np->verbose)
89#endif
90
91/*
92 * These ones should have been already defined.
93 */
94#ifndef assert
95#define assert(expression) { \
96 if (!(expression)) { \
97 (void)panic( \
98 "assertion \"%s\" failed: file \"%s\", line %d\n", \
99 #expression, \
100 __FILE__, __LINE__); \
101 } \
102}
103#endif
104
105/*
106 * Number of tasks per device we want to handle.
107 */
108#if SYM_CONF_MAX_TAG_ORDER > 8
109#error "more than 256 tags per logical unit not allowed."
110#endif
111#define SYM_CONF_MAX_TASK (1<<SYM_CONF_MAX_TAG_ORDER)
112
113/*
114 * Donnot use more tasks that we can handle.
115 */
116#ifndef SYM_CONF_MAX_TAG
117#define SYM_CONF_MAX_TAG SYM_CONF_MAX_TASK
118#endif
119#if SYM_CONF_MAX_TAG > SYM_CONF_MAX_TASK
120#undef SYM_CONF_MAX_TAG
121#define SYM_CONF_MAX_TAG SYM_CONF_MAX_TASK
122#endif
123
124/*
125 * This one means 'NO TAG for this job'
126 */
127#define NO_TAG (256)
128
129/*
130 * Number of SCSI targets.
131 */
132#if SYM_CONF_MAX_TARGET > 16
133#error "more than 16 targets not allowed."
134#endif
135
136/*
137 * Number of logical units per target.
138 */
139#if SYM_CONF_MAX_LUN > 64
140#error "more than 64 logical units per target not allowed."
141#endif
142
143/*
144 * Asynchronous pre-scaler (ns). Shall be 40 for
145 * the SCSI timings to be compliant.
146 */
147#define SYM_CONF_MIN_ASYNC (40)
148
44456d37
OH		 149
150/*
151 * MEMORY ALLOCATOR.
152 */
153
154#define SYM_MEM_WARN 1 /* Warn on failed operations */
155
156#define SYM_MEM_PAGE_ORDER 0 /* 1 PAGE maximum */
157#define SYM_MEM_CLUSTER_SHIFT (PAGE_SHIFT+SYM_MEM_PAGE_ORDER)
158#define SYM_MEM_FREE_UNUSED /* Free unused pages immediately */
1da177e4
LT		 159/*
160 * Shortest memory chunk is (1<<SYM_MEM_SHIFT), currently 16.
161 * Actual allocations happen as SYM_MEM_CLUSTER_SIZE sized.
162 * (1 PAGE at a time is just fine).
163 */
164#define SYM_MEM_SHIFT 4
165#define SYM_MEM_CLUSTER_SIZE (1UL << SYM_MEM_CLUSTER_SHIFT)
166#define SYM_MEM_CLUSTER_MASK (SYM_MEM_CLUSTER_SIZE-1)
167
168/*
169 * Number of entries in the START and DONE queues.
170 *
171 * We limit to 1 PAGE in order to succeed allocation of
172 * these queues. Each entry is 8 bytes long (2 DWORDS).
173 */
174#ifdef SYM_CONF_MAX_START
175#define SYM_CONF_MAX_QUEUE (SYM_CONF_MAX_START+2)
176#else
177#define SYM_CONF_MAX_QUEUE (7*SYM_CONF_MAX_TASK+2)
178#define SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
179#endif
180
181#if SYM_CONF_MAX_QUEUE > SYM_MEM_CLUSTER_SIZE/8
182#undef SYM_CONF_MAX_QUEUE
183#define SYM_CONF_MAX_QUEUE (SYM_MEM_CLUSTER_SIZE/8)
184#undef SYM_CONF_MAX_START
185#define SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
186#endif
187
188/*
189 * For this one, we want a short name :-)
190 */
191#define MAX_QUEUE SYM_CONF_MAX_QUEUE
192
193/*
194 * Common definitions for both bus space based and legacy IO methods.
195 */
196
197#define INB_OFF(np, o) ioread8(np->s.ioaddr + (o))
198#define INW_OFF(np, o) ioread16(np->s.ioaddr + (o))
199#define INL_OFF(np, o) ioread32(np->s.ioaddr + (o))
200
201#define OUTB_OFF(np, o, val) iowrite8((val), np->s.ioaddr + (o))
202#define OUTW_OFF(np, o, val) iowrite16((val), np->s.ioaddr + (o))
203#define OUTL_OFF(np, o, val) iowrite32((val), np->s.ioaddr + (o))
204
205#define INB(np, r) INB_OFF(np, offsetof(struct sym_reg, r))
206#define INW(np, r) INW_OFF(np, offsetof(struct sym_reg, r))
207#define INL(np, r) INL_OFF(np, offsetof(struct sym_reg, r))
208
209#define OUTB(np, r, v) OUTB_OFF(np, offsetof(struct sym_reg, r), (v))
210#define OUTW(np, r, v) OUTW_OFF(np, offsetof(struct sym_reg, r), (v))
211#define OUTL(np, r, v) OUTL_OFF(np, offsetof(struct sym_reg, r), (v))
212
213#define OUTONB(np, r, m) OUTB(np, r, INB(np, r) | (m))
214#define OUTOFFB(np, r, m) OUTB(np, r, INB(np, r) & ~(m))
215#define OUTONW(np, r, m) OUTW(np, r, INW(np, r) | (m))
216#define OUTOFFW(np, r, m) OUTW(np, r, INW(np, r) & ~(m))
217#define OUTONL(np, r, m) OUTL(np, r, INL(np, r) | (m))
218#define OUTOFFL(np, r, m) OUTL(np, r, INL(np, r) & ~(m))
219
220/*
221 * We normally want the chip to have a consistent view
222 * of driver internal data structures when we restart it.
223 * Thus these macros.
224 */
225#define OUTL_DSP(np, v) \
226 do { \
227 MEMORY_WRITE_BARRIER(); \
228 OUTL(np, nc_dsp, (v)); \
229 } while (0)
230
231#define OUTONB_STD() \
232 do { \
233 MEMORY_WRITE_BARRIER(); \
234 OUTONB(np, nc_dcntl, (STD|NOCOM)); \
235 } while (0)
236
237/*
238 * Command control block states.
239 */
240#define HS_IDLE (0)
241#define HS_BUSY (1)
242#define HS_NEGOTIATE (2) /* sync/wide data transfer*/
243#define HS_DISCONNECT (3) /* Disconnected by target */
244#define HS_WAIT (4) /* waiting for resource */
245
246#define HS_DONEMASK (0x80)
247#define HS_COMPLETE (4|HS_DONEMASK)
248#define HS_SEL_TIMEOUT (5|HS_DONEMASK) /* Selection timeout */
249#define HS_UNEXPECTED (6|HS_DONEMASK) /* Unexpected disconnect */
250#define HS_COMP_ERR (7|HS_DONEMASK) /* Completed with error */
251
252/*
253 * Software Interrupt Codes
254 */
255#define SIR_BAD_SCSI_STATUS (1)
256#define SIR_SEL_ATN_NO_MSG_OUT (2)
257#define SIR_MSG_RECEIVED (3)
258#define SIR_MSG_WEIRD (4)
259#define SIR_NEGO_FAILED (5)
260#define SIR_NEGO_PROTO (6)
261#define SIR_SCRIPT_STOPPED (7)
262#define SIR_REJECT_TO_SEND (8)
263#define SIR_SWIDE_OVERRUN (9)
264#define SIR_SODL_UNDERRUN (10)
265#define SIR_RESEL_NO_MSG_IN (11)
266#define SIR_RESEL_NO_IDENTIFY (12)
267#define SIR_RESEL_BAD_LUN (13)
268#define SIR_TARGET_SELECTED (14)
269#define SIR_RESEL_BAD_I_T_L (15)
270#define SIR_RESEL_BAD_I_T_L_Q (16)
271#define SIR_ABORT_SENT (17)
272#define SIR_RESEL_ABORTED (18)
273#define SIR_MSG_OUT_DONE (19)
274#define SIR_COMPLETE_ERROR (20)
275#define SIR_DATA_OVERRUN (21)
276#define SIR_BAD_PHASE (22)
277#if SYM_CONF_DMA_ADDRESSING_MODE == 2
278#define SIR_DMAP_DIRTY (23)
279#define SIR_MAX (23)
280#else
281#define SIR_MAX (22)
282#endif
283
284/*
285 * Extended error bit codes.
286 * xerr_status field of struct sym_ccb.
287 */
288#define XE_EXTRA_DATA (1) /* unexpected data phase */
289#define XE_BAD_PHASE (1<<1) /* illegal phase (4/5) */
290#define XE_PARITY_ERR (1<<2) /* unrecovered SCSI parity error */
291#define XE_SODL_UNRUN (1<<3) /* ODD transfer in DATA OUT phase */
292#define XE_SWIDE_OVRUN (1<<4) /* ODD transfer in DATA IN phase */
293
294/*
295 * Negotiation status.
296 * nego_status field of struct sym_ccb.
297 */
298#define NS_SYNC (1)
299#define NS_WIDE (2)
300#define NS_PPR (3)
301
302/*
303 * A CCB hashed table is used to retrieve CCB address
304 * from DSA value.
305 */
306#define CCB_HASH_SHIFT 8
307#define CCB_HASH_SIZE (1UL << CCB_HASH_SHIFT)
308#define CCB_HASH_MASK (CCB_HASH_SIZE-1)
309#if 1
310#define CCB_HASH_CODE(dsa) \
311 (((dsa) >> (_LGRU16_(sizeof(struct sym_ccb)))) & CCB_HASH_MASK)
312#else
313#define CCB_HASH_CODE(dsa) (((dsa) >> 9) & CCB_HASH_MASK)
314#endif
315
316#if SYM_CONF_DMA_ADDRESSING_MODE == 2
317/*
318 * We may want to use segment registers for 64 bit DMA.
319 * 16 segments registers -> up to 64 GB addressable.
320 */
321#define SYM_DMAP_SHIFT (4)
322#define SYM_DMAP_SIZE (1u<<SYM_DMAP_SHIFT)
323#define SYM_DMAP_MASK (SYM_DMAP_SIZE-1)
324#endif
325
326/*
327 * Device flags.
328 */
329#define SYM_DISC_ENABLED (1)
330#define SYM_TAGS_ENABLED (1<<1)
331#define SYM_SCAN_BOOT_DISABLED (1<<2)
332#define SYM_SCAN_LUNS_DISABLED (1<<3)
333
334/*
335 * Host adapter miscellaneous flags.
336 */
337#define SYM_AVOID_BUS_RESET (1)
338
339/*
340 * Misc.
341 */
342#define SYM_SNOOP_TIMEOUT (10000000)
343#define BUS_8_BIT 0
344#define BUS_16_BIT 1
345
346/*
347 * Gather negotiable parameters value
348 */
349struct sym_trans {
350 u8 period;
351 u8 offset;
352 unsigned int width:1;
353 unsigned int iu:1;
354 unsigned int dt:1;
355 unsigned int qas:1;
356 unsigned int check_nego:1;
357};
358
359/*
360 * Global TCB HEADER.
361 *
362 * Due to lack of indirect addressing on earlier NCR chips,
363 * this substructure is copied from the TCB to a global
364 * address after selection.
365 * For SYMBIOS chips that support LOAD/STORE this copy is
366 * not needed and thus not performed.
367 */
368struct sym_tcbh {
369 /*
370 * Scripts bus addresses of LUN table accessed from scripts.
371 * LUN #0 is a special case, since multi-lun devices are rare,
372 * and we we want to speed-up the general case and not waste
373 * resources.
374 */
375 u32 luntbl_sa; /* bus address of this table */
376 u32 lun0_sa; /* bus address of LCB #0 */
377 /*
378 * Actual SYNC/WIDE IO registers value for this target.
379 * 'sval', 'wval' and 'uval' are read from SCRIPTS and
380 * so have alignment constraints.
381 */
382/*0*/ u_char uval; /* -> SCNTL4 register */
383/*1*/ u_char sval; /* -> SXFER io register */
384/*2*/ u_char filler1;
385/*3*/ u_char wval; /* -> SCNTL3 io register */
386};
387
388/*
389 * Target Control Block
390 */
391struct sym_tcb {
392 /*
393 * TCB header.
394 * Assumed at offset 0.
395 */
396/*0*/ struct sym_tcbh head;
397
398 /*
399 * LUN table used by the SCRIPTS processor.
400 * An array of bus addresses is used on reselection.
401 */
402 u32 *luntbl; /* LCBs bus address table */
403
404 /*
405 * LUN table used by the C code.
406 */
407 struct sym_lcb *lun0p; /* LCB of LUN #0 (usual case) */
408#if SYM_CONF_MAX_LUN > 1
409 struct sym_lcb **lunmp; /* Other LCBs [1..MAX_LUN] */
410#endif
411
1da177e4
LT		 412#ifdef SYM_HAVE_STCB
413 /*
414 * O/S specific data structure.
415 */
416 struct sym_stcb s;
417#endif
418
419 /* Transfer goal */
420 struct sym_trans tgoal;
421
422 /*
423 * Keep track of the CCB used for the negotiation in order
424 * to ensure that only 1 negotiation is queued at a time.
425 */
426 struct sym_ccb * nego_cp; /* CCB used for the nego */
427
428 /*
429 * Set when we want to reset the device.
430 */
431 u_char to_reset;
432
433 /*
434 * Other user settable limits and options.
435 * These limits are read from the NVRAM if present.
436 */
b37df489
MW		 437 unsigned char usrflags;
438 unsigned char usr_period;
439 unsigned char usr_width;
440 unsigned short usrtags;
53222b90 441 struct scsi_target *starget;
1da177e4
LT		 442};
443
444/*
445 * Global LCB HEADER.
446 *
447 * Due to lack of indirect addressing on earlier NCR chips,
448 * this substructure is copied from the LCB to a global
449 * address after selection.
450 * For SYMBIOS chips that support LOAD/STORE this copy is
451 * not needed and thus not performed.
452 */
453struct sym_lcbh {
454 /*
455 * SCRIPTS address jumped by SCRIPTS on reselection.
456 * For not probed logical units, this address points to
457 * SCRIPTS that deal with bad LU handling (must be at
458 * offset zero of the LCB for that reason).
459 */
460/*0*/ u32 resel_sa;
461
462 /*
463 * Task (bus address of a CCB) read from SCRIPTS that points
464 * to the unique ITL nexus allowed to be disconnected.
465 */
466 u32 itl_task_sa;
467
468 /*
469 * Task table bus address (read from SCRIPTS).
470 */
471 u32 itlq_tbl_sa;
472};
473
474/*
475 * Logical Unit Control Block
476 */
477struct sym_lcb {
478 /*
479 * TCB header.
480 * Assumed at offset 0.
481 */
482/*0*/ struct sym_lcbh head;
483
484 /*
485 * Task table read from SCRIPTS that contains pointers to
486 * ITLQ nexuses. The bus address read from SCRIPTS is
487 * inside the header.
488 */
489 u32 *itlq_tbl; /* Kernel virtual address */
490
491 /*
492 * Busy CCBs management.
493 */
494 u_short busy_itlq; /* Number of busy tagged CCBs */
495 u_short busy_itl; /* Number of busy untagged CCBs */
496
497 /*
498 * Circular tag allocation buffer.
499 */
500 u_short ia_tag; /* Tag allocation index */
501 u_short if_tag; /* Tag release index */
502 u_char *cb_tags; /* Circular tags buffer */
503
504 /*
505 * O/S specific data structure.
506 */
507#ifdef SYM_HAVE_SLCB
508 struct sym_slcb s;
509#endif
510
511#ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
512 /*
513 * Optionnaly the driver can handle device queueing,
514 * and requeues internally command to redo.
515 */
516 SYM_QUEHEAD waiting_ccbq;
517 SYM_QUEHEAD started_ccbq;
518 int num_sgood;
519 u_short started_tags;
520 u_short started_no_tag;
521 u_short started_max;
522 u_short started_limit;
523#endif
524
525#ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
526 /*
527 * Optionally the driver can try to prevent SCSI
528 * IOs from being reordered too much.
529 */
530 u_char tags_si; /* Current index to tags sum */
531 u_short tags_sum[2]; /* Tags sum counters */
532 u_short tags_since; /* # of tags since last switch */
533#endif
534
535 /*
536 * Set when we want to clear all tasks.
537 */
538 u_char to_clear;
539
540 /*
541 * Capabilities.
542 */
543 u_char user_flags;
544 u_char curr_flags;
545};
546
547/*
548 * Action from SCRIPTS on a task.
549 * Is part of the CCB, but is also used separately to plug
550 * error handling action to perform from SCRIPTS.
551 */
552struct sym_actscr {
553 u32 start; /* Jumped by SCRIPTS after selection */
554 u32 restart; /* Jumped by SCRIPTS on relection */
555};
556
557/*
558 * Phase mismatch context.
559 *
560 * It is part of the CCB and is used as parameters for the
561 * DATA pointer. We need two contexts to handle correctly the
562 * SAVED DATA POINTER.
563 */
564struct sym_pmc {
565 struct sym_tblmove sg; /* Updated interrupted SG block */
566 u32 ret; /* SCRIPT return address */
567};
568
569/*
570 * LUN control block lookup.
571 * We use a direct pointer for LUN #0, and a table of
572 * pointers which is only allocated for devices that support
573 * LUN(s) > 0.
574 */
575#if SYM_CONF_MAX_LUN <= 1
576#define sym_lp(tp, lun) (!lun) ? (tp)->lun0p : NULL
577#else
578#define sym_lp(tp, lun) \
579 (!lun) ? (tp)->lun0p : (tp)->lunmp ? (tp)->lunmp[(lun)] : NULL
580#endif
581
582/*
583 * Status are used by the host and the script processor.
584 *
585 * The last four bytes (status[4]) are copied to the
586 * scratchb register (declared as scr0..scr3) just after the
587 * select/reselect, and copied back just after disconnecting.
588 * Inside the script the XX_REG are used.
589 */
590
591/*
592 * Last four bytes (script)
593 */
594#define HX_REG scr0
595#define HX_PRT nc_scr0
596#define HS_REG scr1
597#define HS_PRT nc_scr1
598#define SS_REG scr2
599#define SS_PRT nc_scr2
600#define HF_REG scr3
601#define HF_PRT nc_scr3
602
603/*
604 * Last four bytes (host)
605 */
606#define host_xflags phys.head.status[0]
607#define host_status phys.head.status[1]
608#define ssss_status phys.head.status[2]
609#define host_flags phys.head.status[3]
610
611/*
612 * Host flags
613 */
614#define HF_IN_PM0 1u
615#define HF_IN_PM1 (1u<<1)
616#define HF_ACT_PM (1u<<2)
617#define HF_DP_SAVED (1u<<3)
618#define HF_SENSE (1u<<4)
619#define HF_EXT_ERR (1u<<5)
620#define HF_DATA_IN (1u<<6)
621#ifdef SYM_CONF_IARB_SUPPORT
622#define HF_HINT_IARB (1u<<7)
623#endif
624
625/*
626 * More host flags
627 */
628#if SYM_CONF_DMA_ADDRESSING_MODE == 2
629#define HX_DMAP_DIRTY (1u<<7)
630#endif
631
632/*
633 * Global CCB HEADER.
634 *
635 * Due to lack of indirect addressing on earlier NCR chips,
636 * this substructure is copied from the ccb to a global
637 * address after selection (or reselection) and copied back
638 * before disconnect.
639 * For SYMBIOS chips that support LOAD/STORE this copy is
640 * not needed and thus not performed.
641 */
642
643struct sym_ccbh {
644 /*
645 * Start and restart SCRIPTS addresses (must be at 0).
646 */
647/*0*/ struct sym_actscr go;
648
649 /*
650 * SCRIPTS jump address that deal with data pointers.
651 * 'savep' points to the position in the script responsible
652 * for the actual transfer of data.
653 * It's written on reception of a SAVE_DATA_POINTER message.
654 */
655 u32 savep; /* Jump address to saved data pointer */
656 u32 lastp; /* SCRIPTS address at end of data */
1da177e4
LT		 657
658 /*
659 * Status fields.
660 */
661 u8 status[4];
662};
663
664/*
665 * GET/SET the value of the data pointer used by SCRIPTS.
666 *
667 * We must distinguish between the LOAD/STORE-based SCRIPTS
668 * that use directly the header in the CCB, and the NCR-GENERIC
669 * SCRIPTS that use the copy of the header in the HCB.
670 */
671#if SYM_CONF_GENERIC_SUPPORT
672#define sym_set_script_dp(np, cp, dp) \
673 do { \
674 if (np->features & FE_LDSTR) \
675 cp->phys.head.lastp = cpu_to_scr(dp); \
676 else \
677 np->ccb_head.lastp = cpu_to_scr(dp); \
678 } while (0)
679#define sym_get_script_dp(np, cp) \
680 scr_to_cpu((np->features & FE_LDSTR) ? \
681 cp->phys.head.lastp : np->ccb_head.lastp)
682#else
683#define sym_set_script_dp(np, cp, dp) \
684 do { \
685 cp->phys.head.lastp = cpu_to_scr(dp); \
686 } while (0)
687
688#define sym_get_script_dp(np, cp) (cp->phys.head.lastp)
689#endif
690
691/*
692 * Data Structure Block
693 *
694 * During execution of a ccb by the script processor, the
695 * DSA (data structure address) register points to this
696 * substructure of the ccb.
697 */
698struct sym_dsb {
699 /*
700 * CCB header.
701 * Also assumed at offset 0 of the sym_ccb structure.
702 */
703/*0*/ struct sym_ccbh head;
704
705 /*
706 * Phase mismatch contexts.
707 * We need two to handle correctly the SAVED DATA POINTER.
708 * MUST BOTH BE AT OFFSET < 256, due to using 8 bit arithmetic
709 * for address calculation from SCRIPTS.
710 */
711 struct sym_pmc pm0;
712 struct sym_pmc pm1;
713
714 /*
715 * Table data for Script
716 */
717 struct sym_tblsel select;
718 struct sym_tblmove smsg;
719 struct sym_tblmove smsg_ext;
720 struct sym_tblmove cmd;
721 struct sym_tblmove sense;
722 struct sym_tblmove wresid;
723 struct sym_tblmove data [SYM_CONF_MAX_SG];
724};
725
726/*
727 * Our Command Control Block
728 */
729struct sym_ccb {
730 /*
731 * This is the data structure which is pointed by the DSA
732 * register when it is executed by the script processor.
733 * It must be the first entry.
734 */
735 struct sym_dsb phys;
736
737 /*
738 * Pointer to CAM ccb and related stuff.
739 */
740 struct scsi_cmnd *cmd; /* CAM scsiio ccb */
741 u8 cdb_buf[16]; /* Copy of CDB */
742#define SYM_SNS_BBUF_LEN 32
743 u8 sns_bbuf[SYM_SNS_BBUF_LEN]; /* Bounce buffer for sense data */
744 int data_len; /* Total data length */
745 int segments; /* Number of SG segments */
746
747 u8 order; /* Tag type (if tagged command) */
53222b90 748 unsigned char odd_byte_adjustment; /* odd-sized req on wide bus */
1da177e4 749
1da177e4
LT		 750 u_char nego_status; /* Negotiation status */
751 u_char xerr_status; /* Extended error flags */
752 u32 extra_bytes; /* Extraneous bytes transferred */
753
754 /*
755 * Message areas.
756 * We prepare a message to be sent after selection.
757 * We may use a second one if the command is rescheduled
758 * due to CHECK_CONDITION or COMMAND TERMINATED.
759 * Contents are IDENTIFY and SIMPLE_TAG.
760 * While negotiating sync or wide transfer,
761 * a SDTR or WDTR message is appended.
762 */
763 u_char scsi_smsg [12];
764 u_char scsi_smsg2[12];
765
766 /*
767 * Auto request sense related fields.
768 */
769 u_char sensecmd[6]; /* Request Sense command */
770 u_char sv_scsi_status; /* Saved SCSI status */
771 u_char sv_xerr_status; /* Saved extended status */
772 int sv_resid; /* Saved residual */
773
774 /*
775 * Other fields.
776 */
777 u32 ccb_ba; /* BUS address of this CCB */
778 u_short tag; /* Tag for this transfer */
779 /* NO_TAG means no tag */
780 u_char target;
781 u_char lun;
782 struct sym_ccb *link_ccbh; /* Host adapter CCB hash chain */
783 SYM_QUEHEAD link_ccbq; /* Link to free/busy CCB queue */
784 u32 startp; /* Initial data pointer */
785 u32 goalp; /* Expected last data pointer */
1da177e4
LT		 786 int ext_sg; /* Extreme data pointer, used */
787 int ext_ofs; /* to calculate the residual. */
788#ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
789 SYM_QUEHEAD link2_ccbq; /* Link for device queueing */
790 u_char started; /* CCB queued to the squeue */
791#endif
792 u_char to_abort; /* Want this IO to be aborted */
793#ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
794 u_char tags_si; /* Lun tags sum index (0,1) */
795#endif
796};
797
53222b90 798#define CCB_BA(cp,lbl) cpu_to_scr(cp->ccb_ba + offsetof(struct sym_ccb, lbl))
1da177e4 799
1da177e4
LT		 800typedef struct device *m_pool_ident_t;
801
802/*
803 * Host Control Block
804 */
805struct sym_hcb {
806 /*
807 * Global headers.
808 * Due to poorness of addressing capabilities, earlier
809 * chips (810, 815, 825) copy part of the data structures
810 * (CCB, TCB and LCB) in fixed areas.
811 */
812#if SYM_CONF_GENERIC_SUPPORT
813 struct sym_ccbh ccb_head;
814 struct sym_tcbh tcb_head;
815 struct sym_lcbh lcb_head;
816#endif
817 /*
818 * Idle task and invalid task actions and
819 * their bus addresses.
820 */
821 struct sym_actscr idletask, notask, bad_itl, bad_itlq;
822 u32 idletask_ba, notask_ba, bad_itl_ba, bad_itlq_ba;
823
824 /*
825 * Dummy lun table to protect us against target
826 * returning bad lun number on reselection.
827 */
828 u32 *badluntbl; /* Table physical address */
829 u32 badlun_sa; /* SCRIPT handler BUS address */
830
831 /*
832 * Bus address of this host control block.
833 */
834 u32 hcb_ba;
835
836 /*
837 * Bit 32-63 of the on-chip RAM bus address in LE format.
838 * The START_RAM64 script loads the MMRS and MMWS from this
839 * field.
840 */
841 u32 scr_ram_seg;
842
843 /*
844 * Initial value of some IO register bits.
845 * These values are assumed to have been set by BIOS, and may
846 * be used to probe adapter implementation differences.
847 */
848 u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest3, sv_ctest4,
849 sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4, sv_scntl4,
850 sv_stest1;
851
852 /*
853 * Actual initial value of IO register bits used by the
854 * driver. They are loaded at initialisation according to
855 * features that are to be enabled/disabled.
856 */
857 u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest3, rv_ctest4,
858 rv_ctest5, rv_stest2, rv_ccntl0, rv_ccntl1, rv_scntl4;
859
860 /*
861 * Target data.
862 */
863 struct sym_tcb target[SYM_CONF_MAX_TARGET];
864
865 /*
866 * Target control block bus address array used by the SCRIPT
867 * on reselection.
868 */
869 u32 *targtbl;
870 u32 targtbl_ba;
871
872 /*
873 * DMA pool handle for this HBA.
874 */
875 m_pool_ident_t bus_dmat;
876
877 /*
878 * O/S specific data structure
879 */
880 struct sym_shcb s;
881
882 /*
883 * Physical bus addresses of the chip.
884 */
885 u32 mmio_ba; /* MMIO 32 bit BUS address */
886 int mmio_ws; /* MMIO Window size */
887
888 u32 ram_ba; /* RAM 32 bit BUS address */
889 int ram_ws; /* RAM window size */
890
891 /*
892 * SCRIPTS virtual and physical bus addresses.
893 * 'script' is loaded in the on-chip RAM if present.
894 * 'scripth' stays in main memory for all chips except the
895 * 53C895A, 53C896 and 53C1010 that provide 8K on-chip RAM.
896 */
897 u_char *scripta0; /* Copy of scripts A, B, Z */
898 u_char *scriptb0;
899 u_char *scriptz0;
900 u32 scripta_ba; /* Actual scripts A, B, Z */
901 u32 scriptb_ba; /* 32 bit bus addresses. */
902 u32 scriptz_ba;
903 u_short scripta_sz; /* Actual size of script A, B, Z*/
904 u_short scriptb_sz;
905 u_short scriptz_sz;
906
907 /*
908 * Bus addresses, setup and patch methods for
909 * the selected firmware.
910 */
911 struct sym_fwa_ba fwa_bas; /* Useful SCRIPTA bus addresses */
912 struct sym_fwb_ba fwb_bas; /* Useful SCRIPTB bus addresses */
913 struct sym_fwz_ba fwz_bas; /* Useful SCRIPTZ bus addresses */
914 void (*fw_setup)(struct sym_hcb *np, struct sym_fw *fw);
915 void (*fw_patch)(struct sym_hcb *np);
916 char *fw_name;
917
918 /*
919 * General controller parameters and configuration.
920 */
921 u_short device_id; /* PCI device id */
922 u_char revision_id; /* PCI device revision id */
923 u_int features; /* Chip features map */
924 u_char myaddr; /* SCSI id of the adapter */
925 u_char maxburst; /* log base 2 of dwords burst */
926 u_char maxwide; /* Maximum transfer width */
927 u_char minsync; /* Min sync period factor (ST) */
928 u_char maxsync; /* Max sync period factor (ST) */
929 u_char maxoffs; /* Max scsi offset (ST) */
930 u_char minsync_dt; /* Min sync period factor (DT) */
931 u_char maxsync_dt; /* Max sync period factor (DT) */
932 u_char maxoffs_dt; /* Max scsi offset (DT) */
933 u_char multiplier; /* Clock multiplier (1,2,4) */
934 u_char clock_divn; /* Number of clock divisors */
935 u32 clock_khz; /* SCSI clock frequency in KHz */
936 u32 pciclk_khz; /* Estimated PCI clock in KHz */
937 /*
938 * Start queue management.
939 * It is filled up by the host processor and accessed by the
940 * SCRIPTS processor in order to start SCSI commands.
941 */
942 volatile /* Prevent code optimizations */
943 u32 *squeue; /* Start queue virtual address */
944 u32 squeue_ba; /* Start queue BUS address */
945 u_short squeueput; /* Next free slot of the queue */
946 u_short actccbs; /* Number of allocated CCBs */
947
948 /*
949 * Command completion queue.
950 * It is the same size as the start queue to avoid overflow.
951 */
952 u_short dqueueget; /* Next position to scan */
953 volatile /* Prevent code optimizations */
954 u32 *dqueue; /* Completion (done) queue */
955 u32 dqueue_ba; /* Done queue BUS address */
956
957 /*
958 * Miscellaneous buffers accessed by the scripts-processor.
959 * They shall be DWORD aligned, because they may be read or
960 * written with a script command.
961 */
962 u_char msgout[8]; /* Buffer for MESSAGE OUT */
963 u_char msgin [8]; /* Buffer for MESSAGE IN */
964 u32 lastmsg; /* Last SCSI message sent */
965 u32 scratch; /* Scratch for SCSI receive */
966 /* Also used for cache test */
967 /*
968 * Miscellaneous configuration and status parameters.
969 */
970 u_char usrflags; /* Miscellaneous user flags */
971 u_char scsi_mode; /* Current SCSI BUS mode */
972 u_char verbose; /* Verbosity for this controller*/
973
974 /*
975 * CCB lists and queue.
976 */
977 struct sym_ccb **ccbh; /* CCBs hashed by DSA value */
978 /* CCB_HASH_SIZE lists of CCBs */
979 SYM_QUEHEAD free_ccbq; /* Queue of available CCBs */
980 SYM_QUEHEAD busy_ccbq; /* Queue of busy CCBs */
981
982 /*
983 * During error handling and/or recovery,
984 * active CCBs that are to be completed with
985 * error or requeued are moved from the busy_ccbq
986 * to the comp_ccbq prior to completion.
987 */
988 SYM_QUEHEAD comp_ccbq;
989
990#ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
991 SYM_QUEHEAD dummy_ccbq;
992#endif
993
994 /*
995 * IMMEDIATE ARBITRATION (IARB) control.
996 *
997 * We keep track in 'last_cp' of the last CCB that has been
998 * queued to the SCRIPTS processor and clear 'last_cp' when
999 * this CCB completes. If last_cp is not zero at the moment
1000 * we queue a new CCB, we set a flag in 'last_cp' that is
1001 * used by the SCRIPTS as a hint for setting IARB.
1002 * We donnot set more than 'iarb_max' consecutive hints for
1003 * IARB in order to leave devices a chance to reselect.
1004 * By the way, any non zero value of 'iarb_max' is unfair. :)
1005 */
1006#ifdef SYM_CONF_IARB_SUPPORT
1007 u_short iarb_max; /* Max. # consecutive IARB hints*/
1008 u_short iarb_count; /* Actual # of these hints */
1009 struct sym_ccb * last_cp;
1010#endif
1011
1012 /*
1013 * Command abort handling.
1014 * We need to synchronize tightly with the SCRIPTS
1015 * processor in order to handle things correctly.
1016 */
1017 u_char abrt_msg[4]; /* Message to send buffer */
1018 struct sym_tblmove abrt_tbl; /* Table for the MOV of it */
1019 struct sym_tblsel abrt_sel; /* Sync params for selection */
1020 u_char istat_sem; /* Tells the chip to stop (SEM) */
1021
1022 /*
1023 * 64 bit DMA handling.
1024 */
1025#if SYM_CONF_DMA_ADDRESSING_MODE != 0
1026 u_char use_dac; /* Use PCI DAC cycles */
1027#if SYM_CONF_DMA_ADDRESSING_MODE == 2
1028 u_char dmap_dirty; /* Dma segments registers dirty */
1029 u32 dmap_bah[SYM_DMAP_SIZE];/* Segment registers map */
1030#endif
1031#endif
1032};
1033
1034#define HCB_BA(np, lbl) (np->hcb_ba + offsetof(struct sym_hcb, lbl))
1035
1036
1037/*
1038 * FIRMWARES (sym_fw.c)
1039 */
1040struct sym_fw * sym_find_firmware(struct sym_chip *chip);
1041void sym_fw_bind_script(struct sym_hcb *np, u32 *start, int len);
1042
1043/*
1044 * Driver methods called from O/S specific code.
1045 */
1046char *sym_driver_name(void);
1047void sym_print_xerr(struct scsi_cmnd *cmd, int x_status);
1048int sym_reset_scsi_bus(struct sym_hcb *np, int enab_int);
1049struct sym_chip *sym_lookup_chip_table(u_short device_id, u_char revision);
1da177e4
LT		 1050#ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
1051void sym_start_next_ccbs(struct sym_hcb *np, struct sym_lcb *lp, int maxn);
3bea15a7
MW		 1052#else
1053void sym_put_start_queue(struct sym_hcb *np, struct sym_ccb *cp);
1da177e4
LT		 1054#endif
1055void sym_start_up(struct sym_hcb *np, int reason);
1056void sym_interrupt(struct sym_hcb *np);
1057int sym_clear_tasks(struct sym_hcb *np, int cam_status, int target, int lun, int task);
1058struct sym_ccb *sym_get_ccb(struct sym_hcb *np, struct scsi_cmnd *cmd, u_char tag_order);
1059void sym_free_ccb(struct sym_hcb *np, struct sym_ccb *cp);
1060struct sym_lcb *sym_alloc_lcb(struct sym_hcb *np, u_char tn, u_char ln);
1061int sym_queue_scsiio(struct sym_hcb *np, struct scsi_cmnd *csio, struct sym_ccb *cp);
1062int sym_abort_scsiio(struct sym_hcb *np, struct scsi_cmnd *ccb, int timed_out);
1063int sym_reset_scsi_target(struct sym_hcb *np, int target);
1064void sym_hcb_free(struct sym_hcb *np);
1065int sym_hcb_attach(struct Scsi_Host *shost, struct sym_fw *fw, struct sym_nvram *nvram);
1066
1067/*
1068 * Build a scatter/gather entry.
1069 *
1070 * For 64 bit systems, we use the 8 upper bits of the size field
1071 * to provide bus address bits 32-39 to the SCRIPTS processor.
1072 * This allows the 895A, 896, 1010 to address up to 1 TB of memory.
1073 */
1074
1075#if SYM_CONF_DMA_ADDRESSING_MODE == 0
1076#define sym_build_sge(np, data, badd, len) \
1077do { \
1078 (data)->addr = cpu_to_scr(badd); \
1079 (data)->size = cpu_to_scr(len); \
1080} while (0)
1081#elif SYM_CONF_DMA_ADDRESSING_MODE == 1
1082#define sym_build_sge(np, data, badd, len) \
1083do { \
1084 (data)->addr = cpu_to_scr(badd); \
1085 (data)->size = cpu_to_scr((((badd) >> 8) & 0xff000000) + len); \
1086} while (0)
1087#elif SYM_CONF_DMA_ADDRESSING_MODE == 2
1088int sym_lookup_dmap(struct sym_hcb *np, u32 h, int s);
1089static __inline void
1090sym_build_sge(struct sym_hcb *np, struct sym_tblmove *data, u64 badd, int len)
1091{
1092 u32 h = (badd>>32);
1093 int s = (h&SYM_DMAP_MASK);
1094
1095 if (h != np->dmap_bah[s])
1096 goto bad;
1097good:
1098 (data)->addr = cpu_to_scr(badd);
1099 (data)->size = cpu_to_scr((s<<24) + len);
1100 return;
1101bad:
1102 s = sym_lookup_dmap(np, h, s);
1103 goto good;
1104}
1105#else
1106#error "Unsupported DMA addressing mode"
1107#endif
1108
1da177e4
LT		 1109/*
1110 * MEMORY ALLOCATOR.
1111 */
1112
1da177e4
LT		 1113#define sym_get_mem_cluster() \
1114 (void *) __get_free_pages(GFP_ATOMIC, SYM_MEM_PAGE_ORDER)
1115#define sym_free_mem_cluster(p) \
1116 free_pages((unsigned long)p, SYM_MEM_PAGE_ORDER)
1117
1118/*
1119 * Link between free memory chunks of a given size.
1120 */
1121typedef struct sym_m_link {
1122 struct sym_m_link *next;
1123} *m_link_p;
1124
1125/*
1126 * Virtual to bus physical translation for a given cluster.
1127 * Such a structure is only useful with DMA abstraction.
1128 */
1129typedef struct sym_m_vtob { /* Virtual to Bus address translation */
1130 struct sym_m_vtob *next;
1131 void *vaddr; /* Virtual address */
1132 dma_addr_t baddr; /* Bus physical address */
1133} *m_vtob_p;
1134
1135/* Hash this stuff a bit to speed up translations */
1136#define VTOB_HASH_SHIFT 5
1137#define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT)
1138#define VTOB_HASH_MASK (VTOB_HASH_SIZE-1)
1139#define VTOB_HASH_CODE(m) \
1140 ((((unsigned long)(m)) >> SYM_MEM_CLUSTER_SHIFT) & VTOB_HASH_MASK)
1141
1142/*
1143 * Memory pool of a given kind.
1144 * Ideally, we want to use:
1145 * 1) 1 pool for memory we donnot need to involve in DMA.
1146 * 2) The same pool for controllers that require same DMA
1147 * constraints and features.
1148 * The OS specific m_pool_id_t thing and the sym_m_pool_match()
1149 * method are expected to tell the driver about.
1150 */
1151typedef struct sym_m_pool {
1152 m_pool_ident_t dev_dmat; /* Identifies the pool (see above) */
1153 void * (*get_mem_cluster)(struct sym_m_pool *);
1154#ifdef SYM_MEM_FREE_UNUSED
1155 void (*free_mem_cluster)(struct sym_m_pool *, void *);
1156#endif
1157#define M_GET_MEM_CLUSTER() mp->get_mem_cluster(mp)
1158#define M_FREE_MEM_CLUSTER(p) mp->free_mem_cluster(mp, p)
1159 int nump;
1160 m_vtob_p vtob[VTOB_HASH_SIZE];
1161 struct sym_m_pool *next;
1162 struct sym_m_link h[SYM_MEM_CLUSTER_SHIFT - SYM_MEM_SHIFT + 1];
1163} *m_pool_p;
1164
1165/*
1166 * Alloc, free and translate addresses to bus physical
1167 * for DMAable memory.
1168 */
1169void *__sym_calloc_dma(m_pool_ident_t dev_dmat, int size, char *name);
1170void __sym_mfree_dma(m_pool_ident_t dev_dmat, void *m, int size, char *name);
1171dma_addr_t __vtobus(m_pool_ident_t dev_dmat, void *m);
1172
1173/*
1174 * Verbs used by the driver code for DMAable memory handling.
1175 * The _uvptv_ macro avoids a nasty warning about pointer to volatile
1176 * being discarded.
1177 */
1178#define _uvptv_(p) ((void *)((u_long)(p)))
1179
1180#define _sym_calloc_dma(np, l, n) __sym_calloc_dma(np->bus_dmat, l, n)
1181#define _sym_mfree_dma(np, p, l, n) \
1182 __sym_mfree_dma(np->bus_dmat, _uvptv_(p), l, n)
1183#define sym_calloc_dma(l, n) _sym_calloc_dma(np, l, n)
1184#define sym_mfree_dma(p, l, n) _sym_mfree_dma(np, p, l, n)
1185#define vtobus(p) __vtobus(np->bus_dmat, _uvptv_(p))
1186
1187/*
1188 * We have to provide the driver memory allocator with methods for
1189 * it to maintain virtual to bus physical address translations.
1190 */
1191
1192#define sym_m_pool_match(mp_id1, mp_id2) (mp_id1 == mp_id2)
1193
1194static __inline void *sym_m_get_dma_mem_cluster(m_pool_p mp, m_vtob_p vbp)
1195{
1196 void *vaddr = NULL;
1197 dma_addr_t baddr = 0;
1198
1199 vaddr = dma_alloc_coherent(mp->dev_dmat, SYM_MEM_CLUSTER_SIZE, &baddr,
1200 GFP_ATOMIC);
1201 if (vaddr) {
1202 vbp->vaddr = vaddr;
1203 vbp->baddr = baddr;
1204 }
1205 return vaddr;
1206}
1207
1208static __inline void sym_m_free_dma_mem_cluster(m_pool_p mp, m_vtob_p vbp)
1209{
1210 dma_free_coherent(mp->dev_dmat, SYM_MEM_CLUSTER_SIZE, vbp->vaddr,
1211 vbp->baddr);
1212}
1213
1214#endif /* SYM_HIPD_H */
Linux 6.x block layer and io_uring tree(s)