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1da177e4 LT |
1 | /* |
2 | * sym53c416.c | |
3 | * Low-level SCSI driver for sym53c416 chip. | |
4 | * Copyright (C) 1998 Lieven Willems (lw_linux@hotmail.com) | |
5 | * | |
6 | * Changes : | |
7 | * | |
8 | * Marcelo Tosatti <marcelo@conectiva.com.br> : Added io_request_lock locking | |
9 | * Alan Cox <alan@redhat.com> : Cleaned up code formatting | |
10 | * Fixed an irq locking bug | |
11 | * Added ISAPnP support | |
12 | * Bjoern A. Zeeb <bzeeb@zabbadoz.net> : Initial irq locking updates | |
13 | * Added another card with ISAPnP support | |
14 | * | |
15 | * LILO command line usage: sym53c416=<PORTBASE>[,<IRQ>] | |
16 | * | |
17 | * This program is free software; you can redistribute it and/or modify it | |
18 | * under the terms of the GNU General Public License as published by the | |
19 | * Free Software Foundation; either version 2, or (at your option) any | |
20 | * later version. | |
21 | * | |
22 | * This program is distributed in the hope that it will be useful, but | |
23 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
24 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
25 | * General Public License for more details. | |
26 | * | |
27 | */ | |
28 | ||
29 | #include <linux/module.h> | |
30 | #include <linux/kernel.h> | |
31 | #include <linux/types.h> | |
32 | #include <linux/init.h> | |
33 | #include <linux/string.h> | |
34 | #include <linux/ioport.h> | |
1da177e4 LT |
35 | #include <linux/interrupt.h> |
36 | #include <linux/delay.h> | |
37 | #include <linux/proc_fs.h> | |
38 | #include <linux/spinlock.h> | |
39 | #include <asm/dma.h> | |
40 | #include <asm/system.h> | |
41 | #include <asm/io.h> | |
42 | #include <linux/blkdev.h> | |
43 | #include <linux/isapnp.h> | |
44 | #include "scsi.h" | |
45 | #include <scsi/scsi_host.h> | |
46 | #include "sym53c416.h" | |
47 | ||
48 | #define VERSION_STRING "Version 1.0.0-ac" | |
49 | ||
50 | #define TC_LOW 0x00 /* Transfer counter low */ | |
51 | #define TC_MID 0x01 /* Transfer counter mid */ | |
52 | #define SCSI_FIFO 0x02 /* SCSI FIFO register */ | |
53 | #define COMMAND_REG 0x03 /* Command Register */ | |
54 | #define STATUS_REG 0x04 /* Status Register (READ) */ | |
55 | #define DEST_BUS_ID 0x04 /* Destination Bus ID (WRITE) */ | |
56 | #define INT_REG 0x05 /* Interrupt Register (READ) */ | |
57 | #define TOM 0x05 /* Time out multiplier (WRITE) */ | |
58 | #define STP 0x06 /* Synchronous Transfer period */ | |
59 | #define SYNC_OFFSET 0x07 /* Synchronous Offset */ | |
60 | #define CONF_REG_1 0x08 /* Configuration register 1 */ | |
61 | #define CONF_REG_2 0x0B /* Configuration register 2 */ | |
62 | #define CONF_REG_3 0x0C /* Configuration register 3 */ | |
63 | #define CONF_REG_4 0x0D /* Configuration register 4 */ | |
64 | #define TC_HIGH 0x0E /* Transfer counter high */ | |
65 | #define PIO_FIFO_1 0x10 /* PIO FIFO register 1 */ | |
66 | #define PIO_FIFO_2 0x11 /* PIO FIFO register 2 */ | |
67 | #define PIO_FIFO_3 0x12 /* PIO FIFO register 3 */ | |
68 | #define PIO_FIFO_4 0x13 /* PIO FIFO register 4 */ | |
69 | #define PIO_FIFO_CNT 0x14 /* PIO FIFO count */ | |
70 | #define PIO_INT_REG 0x15 /* PIO interrupt register */ | |
71 | #define CONF_REG_5 0x16 /* Configuration register 5 */ | |
72 | #define FEATURE_EN 0x1D /* Feature Enable register */ | |
73 | ||
74 | /* Configuration register 1 entries: */ | |
75 | /* Bits 2-0: SCSI ID of host adapter */ | |
76 | #define SCM 0x80 /* Slow Cable Mode */ | |
77 | #define SRID 0x40 /* SCSI Reset Interrupt Disable */ | |
78 | #define PTM 0x20 /* Parity Test Mode */ | |
79 | #define EPC 0x10 /* Enable Parity Checking */ | |
80 | #define CTME 0x08 /* Special Test Mode */ | |
81 | ||
82 | /* Configuration register 2 entries: */ | |
83 | #define FE 0x40 /* Features Enable */ | |
84 | #define SCSI2 0x08 /* SCSI 2 Enable */ | |
85 | #define TBPA 0x04 /* Target Bad Parity Abort */ | |
86 | ||
87 | /* Configuration register 3 entries: */ | |
88 | #define IDMRC 0x80 /* ID Message Reserved Check */ | |
89 | #define QTE 0x40 /* Queue Tag Enable */ | |
90 | #define CDB10 0x20 /* Command Descriptor Block 10 */ | |
91 | #define FSCSI 0x10 /* FastSCSI */ | |
92 | #define FCLK 0x08 /* FastClock */ | |
93 | ||
94 | /* Configuration register 4 entries: */ | |
95 | #define RBS 0x08 /* Register bank select */ | |
96 | #define EAN 0x04 /* Enable Active Negotiation */ | |
97 | ||
98 | /* Configuration register 5 entries: */ | |
99 | #define LPSR 0x80 /* Lower Power SCSI Reset */ | |
100 | #define IE 0x20 /* Interrupt Enable */ | |
101 | #define LPM 0x02 /* Low Power Mode */ | |
102 | #define WSE0 0x01 /* 0WS Enable */ | |
103 | ||
104 | /* Interrupt register entries: */ | |
105 | #define SRST 0x80 /* SCSI Reset */ | |
106 | #define ILCMD 0x40 /* Illegal Command */ | |
107 | #define DIS 0x20 /* Disconnect */ | |
108 | #define BS 0x10 /* Bus Service */ | |
109 | #define FC 0x08 /* Function Complete */ | |
110 | #define RESEL 0x04 /* Reselected */ | |
111 | #define SI 0x03 /* Selection Interrupt */ | |
112 | ||
113 | /* Status Register Entries: */ | |
114 | #define SCI 0x80 /* SCSI Core Int */ | |
115 | #define GE 0x40 /* Gross Error */ | |
116 | #define PE 0x20 /* Parity Error */ | |
117 | #define TC 0x10 /* Terminal Count */ | |
118 | #define VGC 0x08 /* Valid Group Code */ | |
119 | #define PHBITS 0x07 /* Phase bits */ | |
120 | ||
121 | /* PIO Interrupt Register Entries: */ | |
122 | #define SCI 0x80 /* SCSI Core Int */ | |
123 | #define PFI 0x40 /* PIO FIFO Interrupt */ | |
124 | #define FULL 0x20 /* PIO FIFO Full */ | |
125 | #define EMPTY 0x10 /* PIO FIFO Empty */ | |
126 | #define CE 0x08 /* Collision Error */ | |
127 | #define OUE 0x04 /* Overflow / Underflow error */ | |
128 | #define FIE 0x02 /* Full Interrupt Enable */ | |
129 | #define EIE 0x01 /* Empty Interrupt Enable */ | |
130 | ||
131 | /* SYM53C416 SCSI phases (lower 3 bits of SYM53C416_STATUS_REG) */ | |
132 | #define PHASE_DATA_OUT 0x00 | |
133 | #define PHASE_DATA_IN 0x01 | |
134 | #define PHASE_COMMAND 0x02 | |
135 | #define PHASE_STATUS 0x03 | |
136 | #define PHASE_RESERVED_1 0x04 | |
137 | #define PHASE_RESERVED_2 0x05 | |
138 | #define PHASE_MESSAGE_OUT 0x06 | |
139 | #define PHASE_MESSAGE_IN 0x07 | |
140 | ||
141 | /* SYM53C416 core commands */ | |
142 | #define NOOP 0x00 | |
143 | #define FLUSH_FIFO 0x01 | |
144 | #define RESET_CHIP 0x02 | |
145 | #define RESET_SCSI_BUS 0x03 | |
146 | #define DISABLE_SEL_RESEL 0x45 | |
147 | #define RESEL_SEQ 0x40 | |
148 | #define SEL_WITHOUT_ATN_SEQ 0x41 | |
149 | #define SEL_WITH_ATN_SEQ 0x42 | |
150 | #define SEL_WITH_ATN_AND_STOP_SEQ 0x43 | |
151 | #define ENABLE_SEL_RESEL 0x44 | |
152 | #define SEL_WITH_ATN3_SEQ 0x46 | |
153 | #define RESEL3_SEQ 0x47 | |
154 | #define SND_MSG 0x20 | |
155 | #define SND_STAT 0x21 | |
156 | #define SND_DATA 0x22 | |
157 | #define DISCONNECT_SEQ 0x23 | |
158 | #define TERMINATE_SEQ 0x24 | |
159 | #define TARGET_COMM_COMPLETE_SEQ 0x25 | |
160 | #define DISCONN 0x27 | |
161 | #define RECV_MSG_SEQ 0x28 | |
162 | #define RECV_CMD 0x29 | |
163 | #define RECV_DATA 0x2A | |
164 | #define RECV_CMD_SEQ 0x2B | |
165 | #define TARGET_ABORT_PIO 0x04 | |
166 | #define TRANSFER_INFORMATION 0x10 | |
167 | #define INIT_COMM_COMPLETE_SEQ 0x11 | |
168 | #define MSG_ACCEPTED 0x12 | |
169 | #define TRANSFER_PAD 0x18 | |
170 | #define SET_ATN 0x1A | |
171 | #define RESET_ATN 0x1B | |
172 | #define ILLEGAL 0xFF | |
173 | ||
174 | #define PIO_MODE 0x80 | |
175 | ||
176 | #define IO_RANGE 0x20 /* 0x00 - 0x1F */ | |
177 | #define ID "sym53c416" /* Attention: copied to the sym53c416.h */ | |
178 | #define PIO_SIZE 128 /* Size of PIO fifo is 128 bytes */ | |
179 | ||
180 | #define READ_TIMEOUT 150 | |
181 | #define WRITE_TIMEOUT 150 | |
182 | ||
183 | #ifdef MODULE | |
184 | ||
185 | #define sym53c416_base sym53c416 | |
186 | #define sym53c416_base_1 sym53c416_1 | |
187 | #define sym53c416_base_2 sym53c416_2 | |
188 | #define sym53c416_base_3 sym53c416_3 | |
189 | ||
190 | static unsigned int sym53c416_base[2] = {0,0}; | |
191 | static unsigned int sym53c416_base_1[2] = {0,0}; | |
192 | static unsigned int sym53c416_base_2[2] = {0,0}; | |
193 | static unsigned int sym53c416_base_3[2] = {0,0}; | |
194 | ||
195 | #endif | |
196 | ||
197 | #define MAXHOSTS 4 | |
198 | ||
199 | #define SG_ADDRESS(buffer) ((char *) (page_address((buffer)->page)+(buffer)->offset)) | |
200 | ||
201 | enum phases | |
202 | { | |
203 | idle, | |
204 | data_out, | |
205 | data_in, | |
206 | command_ph, | |
207 | status_ph, | |
208 | message_out, | |
209 | message_in | |
210 | }; | |
211 | ||
212 | typedef struct | |
213 | { | |
214 | int base; | |
215 | int irq; | |
216 | int scsi_id; | |
217 | } host; | |
218 | ||
219 | static host hosts[MAXHOSTS] = { | |
220 | {0, 0, SYM53C416_SCSI_ID}, | |
221 | {0, 0, SYM53C416_SCSI_ID}, | |
222 | {0, 0, SYM53C416_SCSI_ID}, | |
223 | {0, 0, SYM53C416_SCSI_ID} | |
224 | }; | |
225 | ||
226 | static int host_index = 0; | |
227 | static char info[120]; | |
228 | static Scsi_Cmnd *current_command = NULL; | |
229 | static int fastpio = 1; | |
230 | ||
231 | static int probeaddrs[] = {0x200, 0x220, 0x240, 0}; | |
232 | ||
233 | static void sym53c416_set_transfer_counter(int base, unsigned int len) | |
234 | { | |
235 | /* Program Transfer Counter */ | |
236 | outb(len & 0x0000FF, base + TC_LOW); | |
237 | outb((len & 0x00FF00) >> 8, base + TC_MID); | |
238 | outb((len & 0xFF0000) >> 16, base + TC_HIGH); | |
239 | } | |
240 | ||
241 | static DEFINE_SPINLOCK(sym53c416_lock); | |
242 | ||
243 | /* Returns the number of bytes read */ | |
244 | static __inline__ unsigned int sym53c416_read(int base, unsigned char *buffer, unsigned int len) | |
245 | { | |
246 | unsigned int orig_len = len; | |
247 | unsigned long flags = 0; | |
248 | unsigned int bytes_left; | |
249 | unsigned long i; | |
250 | int timeout = READ_TIMEOUT; | |
251 | ||
252 | /* Do transfer */ | |
253 | spin_lock_irqsave(&sym53c416_lock, flags); | |
254 | while(len && timeout) | |
255 | { | |
256 | bytes_left = inb(base + PIO_FIFO_CNT); /* Number of bytes in the PIO FIFO */ | |
257 | if(fastpio && bytes_left > 3) | |
258 | { | |
259 | insl(base + PIO_FIFO_1, buffer, bytes_left >> 2); | |
260 | buffer += bytes_left & 0xFC; | |
261 | len -= bytes_left & 0xFC; | |
262 | } | |
263 | else if(bytes_left > 0) | |
264 | { | |
265 | len -= bytes_left; | |
266 | for(; bytes_left > 0; bytes_left--) | |
267 | *(buffer++) = inb(base + PIO_FIFO_1); | |
268 | } | |
269 | else | |
270 | { | |
271 | i = jiffies + timeout; | |
272 | spin_unlock_irqrestore(&sym53c416_lock, flags); | |
273 | while(time_before(jiffies, i) && (inb(base + PIO_INT_REG) & EMPTY) && timeout) | |
274 | if(inb(base + PIO_INT_REG) & SCI) | |
275 | timeout = 0; | |
276 | spin_lock_irqsave(&sym53c416_lock, flags); | |
277 | if(inb(base + PIO_INT_REG) & EMPTY) | |
278 | timeout = 0; | |
279 | } | |
280 | } | |
281 | spin_unlock_irqrestore(&sym53c416_lock, flags); | |
282 | return orig_len - len; | |
283 | } | |
284 | ||
285 | /* Returns the number of bytes written */ | |
286 | static __inline__ unsigned int sym53c416_write(int base, unsigned char *buffer, unsigned int len) | |
287 | { | |
288 | unsigned int orig_len = len; | |
289 | unsigned long flags = 0; | |
290 | unsigned int bufferfree; | |
291 | unsigned long i; | |
292 | unsigned int timeout = WRITE_TIMEOUT; | |
293 | ||
294 | /* Do transfer */ | |
295 | spin_lock_irqsave(&sym53c416_lock, flags); | |
296 | while(len && timeout) | |
297 | { | |
298 | bufferfree = PIO_SIZE - inb(base + PIO_FIFO_CNT); | |
299 | if(bufferfree > len) | |
300 | bufferfree = len; | |
301 | if(fastpio && bufferfree > 3) | |
302 | { | |
303 | outsl(base + PIO_FIFO_1, buffer, bufferfree >> 2); | |
304 | buffer += bufferfree & 0xFC; | |
305 | len -= bufferfree & 0xFC; | |
306 | } | |
307 | else if(bufferfree > 0) | |
308 | { | |
309 | len -= bufferfree; | |
310 | for(; bufferfree > 0; bufferfree--) | |
311 | outb(*(buffer++), base + PIO_FIFO_1); | |
312 | } | |
313 | else | |
314 | { | |
315 | i = jiffies + timeout; | |
316 | spin_unlock_irqrestore(&sym53c416_lock, flags); | |
317 | while(time_before(jiffies, i) && (inb(base + PIO_INT_REG) & FULL) && timeout) | |
318 | ; | |
319 | spin_lock_irqsave(&sym53c416_lock, flags); | |
320 | if(inb(base + PIO_INT_REG) & FULL) | |
321 | timeout = 0; | |
322 | } | |
323 | } | |
324 | spin_unlock_irqrestore(&sym53c416_lock, flags); | |
325 | return orig_len - len; | |
326 | } | |
327 | ||
7d12e780 | 328 | static irqreturn_t sym53c416_intr_handle(int irq, void *dev_id) |
1da177e4 LT |
329 | { |
330 | struct Scsi_Host *dev = dev_id; | |
331 | int base = 0; | |
332 | int i; | |
333 | unsigned long flags = 0; | |
334 | unsigned char status_reg, pio_int_reg, int_reg; | |
335 | struct scatterlist *sglist; | |
336 | unsigned int sgcount; | |
337 | unsigned int tot_trans = 0; | |
338 | ||
339 | /* We search the base address of the host adapter which caused the interrupt */ | |
340 | /* FIXME: should pass dev_id sensibly as hosts[i] */ | |
341 | for(i = 0; i < host_index && !base; i++) | |
342 | if(irq == hosts[i].irq) | |
343 | base = hosts[i].base; | |
344 | /* If no adapter found, we cannot handle the interrupt. Leave a message */ | |
345 | /* and continue. This should never happen... */ | |
346 | if(!base) | |
347 | { | |
348 | printk(KERN_ERR "sym53c416: No host adapter defined for interrupt %d\n", irq); | |
349 | return IRQ_NONE; | |
350 | } | |
351 | /* Now we have the base address and we can start handling the interrupt */ | |
352 | ||
353 | spin_lock_irqsave(dev->host_lock,flags); | |
354 | status_reg = inb(base + STATUS_REG); | |
355 | pio_int_reg = inb(base + PIO_INT_REG); | |
356 | int_reg = inb(base + INT_REG); | |
357 | spin_unlock_irqrestore(dev->host_lock, flags); | |
358 | ||
359 | /* First, we handle error conditions */ | |
360 | if(int_reg & SCI) /* SCSI Reset */ | |
361 | { | |
362 | printk(KERN_DEBUG "sym53c416: Reset received\n"); | |
363 | current_command->SCp.phase = idle; | |
364 | current_command->result = DID_RESET << 16; | |
365 | spin_lock_irqsave(dev->host_lock, flags); | |
366 | current_command->scsi_done(current_command); | |
367 | spin_unlock_irqrestore(dev->host_lock, flags); | |
368 | goto out; | |
369 | } | |
370 | if(int_reg & ILCMD) /* Illegal Command */ | |
371 | { | |
372 | printk(KERN_WARNING "sym53c416: Illegal Command: 0x%02x.\n", inb(base + COMMAND_REG)); | |
373 | current_command->SCp.phase = idle; | |
374 | current_command->result = DID_ERROR << 16; | |
375 | spin_lock_irqsave(dev->host_lock, flags); | |
376 | current_command->scsi_done(current_command); | |
377 | spin_unlock_irqrestore(dev->host_lock, flags); | |
378 | goto out; | |
379 | } | |
380 | if(status_reg & GE) /* Gross Error */ | |
381 | { | |
382 | printk(KERN_WARNING "sym53c416: Controller reports gross error.\n"); | |
383 | current_command->SCp.phase = idle; | |
384 | current_command->result = DID_ERROR << 16; | |
385 | spin_lock_irqsave(dev->host_lock, flags); | |
386 | current_command->scsi_done(current_command); | |
387 | spin_unlock_irqrestore(dev->host_lock, flags); | |
388 | goto out; | |
389 | } | |
390 | if(status_reg & PE) /* Parity Error */ | |
391 | { | |
392 | printk(KERN_WARNING "sym53c416:SCSI parity error.\n"); | |
393 | current_command->SCp.phase = idle; | |
394 | current_command->result = DID_PARITY << 16; | |
395 | spin_lock_irqsave(dev->host_lock, flags); | |
396 | current_command->scsi_done(current_command); | |
397 | spin_unlock_irqrestore(dev->host_lock, flags); | |
398 | goto out; | |
399 | } | |
400 | if(pio_int_reg & (CE | OUE)) | |
401 | { | |
402 | printk(KERN_WARNING "sym53c416: PIO interrupt error.\n"); | |
403 | current_command->SCp.phase = idle; | |
404 | current_command->result = DID_ERROR << 16; | |
405 | spin_lock_irqsave(dev->host_lock, flags); | |
406 | current_command->scsi_done(current_command); | |
407 | spin_unlock_irqrestore(dev->host_lock, flags); | |
408 | goto out; | |
409 | } | |
410 | if(int_reg & DIS) /* Disconnect */ | |
411 | { | |
412 | if(current_command->SCp.phase != message_in) | |
413 | current_command->result = DID_NO_CONNECT << 16; | |
414 | else | |
415 | current_command->result = (current_command->SCp.Status & 0xFF) | ((current_command->SCp.Message & 0xFF) << 8) | (DID_OK << 16); | |
416 | current_command->SCp.phase = idle; | |
417 | spin_lock_irqsave(dev->host_lock, flags); | |
418 | current_command->scsi_done(current_command); | |
419 | spin_unlock_irqrestore(dev->host_lock, flags); | |
420 | goto out; | |
421 | } | |
422 | /* Now we handle SCSI phases */ | |
423 | ||
424 | switch(status_reg & PHBITS) /* Filter SCSI phase out of status reg */ | |
425 | { | |
426 | case PHASE_DATA_OUT: | |
427 | { | |
428 | if(int_reg & BS) | |
429 | { | |
430 | current_command->SCp.phase = data_out; | |
431 | outb(FLUSH_FIFO, base + COMMAND_REG); | |
432 | sym53c416_set_transfer_counter(base, current_command->request_bufflen); | |
433 | outb(TRANSFER_INFORMATION | PIO_MODE, base + COMMAND_REG); | |
434 | if(!current_command->use_sg) | |
435 | tot_trans = sym53c416_write(base, current_command->request_buffer, current_command->request_bufflen); | |
436 | else | |
437 | { | |
438 | sgcount = current_command->use_sg; | |
439 | sglist = current_command->request_buffer; | |
440 | while(sgcount--) | |
441 | { | |
442 | tot_trans += sym53c416_write(base, SG_ADDRESS(sglist), sglist->length); | |
443 | sglist++; | |
444 | } | |
445 | } | |
446 | if(tot_trans < current_command->underflow) | |
447 | printk(KERN_WARNING "sym53c416: Underflow, wrote %d bytes, request for %d bytes.\n", tot_trans, current_command->underflow); | |
448 | } | |
449 | break; | |
450 | } | |
451 | ||
452 | case PHASE_DATA_IN: | |
453 | { | |
454 | if(int_reg & BS) | |
455 | { | |
456 | current_command->SCp.phase = data_in; | |
457 | outb(FLUSH_FIFO, base + COMMAND_REG); | |
458 | sym53c416_set_transfer_counter(base, current_command->request_bufflen); | |
459 | outb(TRANSFER_INFORMATION | PIO_MODE, base + COMMAND_REG); | |
460 | if(!current_command->use_sg) | |
461 | tot_trans = sym53c416_read(base, current_command->request_buffer, current_command->request_bufflen); | |
462 | else | |
463 | { | |
464 | sgcount = current_command->use_sg; | |
465 | sglist = current_command->request_buffer; | |
466 | while(sgcount--) | |
467 | { | |
468 | tot_trans += sym53c416_read(base, SG_ADDRESS(sglist), sglist->length); | |
469 | sglist++; | |
470 | } | |
471 | } | |
472 | if(tot_trans < current_command->underflow) | |
473 | printk(KERN_WARNING "sym53c416: Underflow, read %d bytes, request for %d bytes.\n", tot_trans, current_command->underflow); | |
474 | } | |
475 | break; | |
476 | } | |
477 | ||
478 | case PHASE_COMMAND: | |
479 | { | |
480 | current_command->SCp.phase = command_ph; | |
481 | printk(KERN_ERR "sym53c416: Unknown interrupt in command phase.\n"); | |
482 | break; | |
483 | } | |
484 | ||
485 | case PHASE_STATUS: | |
486 | { | |
487 | current_command->SCp.phase = status_ph; | |
488 | outb(FLUSH_FIFO, base + COMMAND_REG); | |
489 | outb(INIT_COMM_COMPLETE_SEQ, base + COMMAND_REG); | |
490 | break; | |
491 | } | |
492 | ||
493 | case PHASE_RESERVED_1: | |
494 | case PHASE_RESERVED_2: | |
495 | { | |
496 | printk(KERN_ERR "sym53c416: Reserved phase occurred.\n"); | |
497 | break; | |
498 | } | |
499 | ||
500 | case PHASE_MESSAGE_OUT: | |
501 | { | |
502 | current_command->SCp.phase = message_out; | |
503 | outb(SET_ATN, base + COMMAND_REG); | |
504 | outb(MSG_ACCEPTED, base + COMMAND_REG); | |
505 | break; | |
506 | } | |
507 | ||
508 | case PHASE_MESSAGE_IN: | |
509 | { | |
510 | current_command->SCp.phase = message_in; | |
511 | current_command->SCp.Status = inb(base + SCSI_FIFO); | |
512 | current_command->SCp.Message = inb(base + SCSI_FIFO); | |
513 | if(current_command->SCp.Message == SAVE_POINTERS || current_command->SCp.Message == DISCONNECT) | |
514 | outb(SET_ATN, base + COMMAND_REG); | |
515 | outb(MSG_ACCEPTED, base + COMMAND_REG); | |
516 | break; | |
517 | } | |
518 | } | |
519 | out: | |
520 | return IRQ_HANDLED; | |
521 | } | |
522 | ||
523 | static void sym53c416_init(int base, int scsi_id) | |
524 | { | |
525 | outb(RESET_CHIP, base + COMMAND_REG); | |
526 | outb(NOOP, base + COMMAND_REG); | |
527 | outb(0x99, base + TOM); /* Time out of 250 ms */ | |
528 | outb(0x05, base + STP); | |
529 | outb(0x00, base + SYNC_OFFSET); | |
530 | outb(EPC | scsi_id, base + CONF_REG_1); | |
531 | outb(FE | SCSI2 | TBPA, base + CONF_REG_2); | |
532 | outb(IDMRC | QTE | CDB10 | FSCSI | FCLK, base + CONF_REG_3); | |
533 | outb(0x83 | EAN, base + CONF_REG_4); | |
534 | outb(IE | WSE0, base + CONF_REG_5); | |
535 | outb(0, base + FEATURE_EN); | |
536 | } | |
537 | ||
538 | static int sym53c416_probeirq(int base, int scsi_id) | |
539 | { | |
540 | int irq, irqs; | |
541 | unsigned long i; | |
542 | ||
543 | /* Clear interrupt register */ | |
544 | inb(base + INT_REG); | |
545 | /* Start probing for irq's */ | |
546 | irqs = probe_irq_on(); | |
547 | /* Reinit chip */ | |
548 | sym53c416_init(base, scsi_id); | |
549 | /* Cause interrupt */ | |
550 | outb(NOOP, base + COMMAND_REG); | |
551 | outb(ILLEGAL, base + COMMAND_REG); | |
552 | outb(0x07, base + DEST_BUS_ID); | |
553 | outb(0x00, base + DEST_BUS_ID); | |
554 | /* Wait for interrupt to occur */ | |
555 | i = jiffies + 20; | |
556 | while(time_before(jiffies, i) && !(inb(base + STATUS_REG) & SCI)) | |
557 | barrier(); | |
558 | if(time_before_eq(i, jiffies)) /* timed out */ | |
559 | return 0; | |
560 | /* Get occurred irq */ | |
561 | irq = probe_irq_off(irqs); | |
562 | sym53c416_init(base, scsi_id); | |
563 | return irq; | |
564 | } | |
565 | ||
566 | /* Setup: sym53c416=base,irq */ | |
567 | void sym53c416_setup(char *str, int *ints) | |
568 | { | |
569 | int i; | |
570 | ||
571 | if(host_index >= MAXHOSTS) | |
572 | { | |
573 | printk(KERN_WARNING "sym53c416: Too many hosts defined\n"); | |
574 | return; | |
575 | } | |
576 | if(ints[0] < 1 || ints[0] > 2) | |
577 | { | |
578 | printk(KERN_ERR "sym53c416: Wrong number of parameters:\n"); | |
579 | printk(KERN_ERR "sym53c416: usage: sym53c416=<base>[,<irq>]\n"); | |
580 | return; | |
581 | } | |
582 | for(i = 0; i < host_index && i >= 0; i++) | |
583 | if(hosts[i].base == ints[1]) | |
584 | i = -2; | |
585 | if(i >= 0) | |
586 | { | |
587 | hosts[host_index].base = ints[1]; | |
588 | hosts[host_index].irq = (ints[0] == 2)? ints[2] : 0; | |
589 | host_index++; | |
590 | } | |
591 | } | |
592 | ||
593 | static int sym53c416_test(int base) | |
594 | { | |
595 | outb(RESET_CHIP, base + COMMAND_REG); | |
596 | outb(NOOP, base + COMMAND_REG); | |
597 | if(inb(base + COMMAND_REG) != NOOP) | |
598 | return 0; | |
599 | if(!inb(base + TC_HIGH) || inb(base + TC_HIGH) == 0xFF) | |
600 | return 0; | |
601 | if((inb(base + PIO_INT_REG) & (FULL | EMPTY | CE | OUE | FIE | EIE)) != EMPTY) | |
602 | return 0; | |
603 | return 1; | |
604 | } | |
605 | ||
606 | ||
607 | static struct isapnp_device_id id_table[] __devinitdata = { | |
608 | { ISAPNP_ANY_ID, ISAPNP_ANY_ID, | |
609 | ISAPNP_VENDOR('S','L','I'), ISAPNP_FUNCTION(0x4161), 0 }, | |
610 | { ISAPNP_ANY_ID, ISAPNP_ANY_ID, | |
611 | ISAPNP_VENDOR('S','L','I'), ISAPNP_FUNCTION(0x4163), 0 }, | |
612 | { ISAPNP_DEVICE_SINGLE_END } | |
613 | }; | |
614 | ||
615 | MODULE_DEVICE_TABLE(isapnp, id_table); | |
616 | ||
617 | static void sym53c416_probe(void) | |
618 | { | |
619 | int *base = probeaddrs; | |
620 | int ints[2]; | |
621 | ||
622 | ints[0] = 1; | |
623 | for(; *base; base++) { | |
624 | if (request_region(*base, IO_RANGE, ID)) { | |
625 | if (sym53c416_test(*base)) { | |
626 | ints[1] = *base; | |
627 | sym53c416_setup(NULL, ints); | |
628 | } | |
629 | release_region(*base, IO_RANGE); | |
630 | } | |
631 | } | |
632 | } | |
633 | ||
d0be4a7d | 634 | int __init sym53c416_detect(struct scsi_host_template *tpnt) |
1da177e4 LT |
635 | { |
636 | unsigned long flags; | |
637 | struct Scsi_Host * shpnt = NULL; | |
638 | int i; | |
639 | int count; | |
640 | struct pnp_dev *idev = NULL; | |
641 | ||
642 | #ifdef MODULE | |
643 | int ints[3]; | |
644 | ||
645 | ints[0] = 2; | |
646 | if(sym53c416_base) | |
647 | { | |
648 | ints[1] = sym53c416_base[0]; | |
649 | ints[2] = sym53c416_base[1]; | |
650 | sym53c416_setup(NULL, ints); | |
651 | } | |
652 | if(sym53c416_base_1) | |
653 | { | |
654 | ints[1] = sym53c416_base_1[0]; | |
655 | ints[2] = sym53c416_base_1[1]; | |
656 | sym53c416_setup(NULL, ints); | |
657 | } | |
658 | if(sym53c416_base_2) | |
659 | { | |
660 | ints[1] = sym53c416_base_2[0]; | |
661 | ints[2] = sym53c416_base_2[1]; | |
662 | sym53c416_setup(NULL, ints); | |
663 | } | |
664 | if(sym53c416_base_3) | |
665 | { | |
666 | ints[1] = sym53c416_base_3[0]; | |
667 | ints[2] = sym53c416_base_3[1]; | |
668 | sym53c416_setup(NULL, ints); | |
669 | } | |
670 | #endif | |
671 | printk(KERN_INFO "sym53c416.c: %s\n", VERSION_STRING); | |
672 | ||
673 | for (i=0; id_table[i].vendor != 0; i++) { | |
674 | while((idev=pnp_find_dev(NULL, id_table[i].vendor, | |
675 | id_table[i].function, idev))!=NULL) | |
676 | { | |
677 | int i[3]; | |
678 | ||
679 | if(pnp_device_attach(idev)<0) | |
680 | { | |
681 | printk(KERN_WARNING "sym53c416: unable to attach PnP device.\n"); | |
682 | continue; | |
683 | } | |
684 | if(pnp_activate_dev(idev) < 0) | |
685 | { | |
686 | printk(KERN_WARNING "sym53c416: unable to activate PnP device.\n"); | |
687 | pnp_device_detach(idev); | |
688 | continue; | |
689 | ||
690 | } | |
691 | ||
692 | i[0] = 2; | |
693 | i[1] = pnp_port_start(idev, 0); | |
694 | i[2] = pnp_irq(idev, 0); | |
695 | ||
696 | printk(KERN_INFO "sym53c416: ISAPnP card found and configured at 0x%X, IRQ %d.\n", | |
697 | i[1], i[2]); | |
698 | sym53c416_setup(NULL, i); | |
699 | } | |
700 | } | |
701 | sym53c416_probe(); | |
702 | ||
703 | /* Now we register and set up each host adapter found... */ | |
704 | for(count = 0, i = 0; i < host_index; i++) { | |
705 | if (!request_region(hosts[i].base, IO_RANGE, ID)) | |
706 | continue; | |
707 | if (!sym53c416_test(hosts[i].base)) { | |
708 | printk(KERN_WARNING "No sym53c416 found at address 0x%03x\n", hosts[i].base); | |
709 | goto fail_release_region; | |
710 | } | |
711 | ||
712 | /* We don't have an irq yet, so we should probe for one */ | |
713 | if (!hosts[i].irq) | |
714 | hosts[i].irq = sym53c416_probeirq(hosts[i].base, hosts[i].scsi_id); | |
715 | if (!hosts[i].irq) | |
716 | goto fail_release_region; | |
717 | ||
718 | shpnt = scsi_register(tpnt, 0); | |
719 | if (!shpnt) | |
720 | goto fail_release_region; | |
721 | /* Request for specified IRQ */ | |
722 | if (request_irq(hosts[i].irq, sym53c416_intr_handle, 0, ID, shpnt)) | |
723 | goto fail_free_host; | |
724 | ||
725 | spin_lock_irqsave(&sym53c416_lock, flags); | |
726 | shpnt->unique_id = hosts[i].base; | |
727 | shpnt->io_port = hosts[i].base; | |
728 | shpnt->n_io_port = IO_RANGE; | |
729 | shpnt->irq = hosts[i].irq; | |
730 | shpnt->this_id = hosts[i].scsi_id; | |
731 | sym53c416_init(hosts[i].base, hosts[i].scsi_id); | |
732 | count++; | |
733 | spin_unlock_irqrestore(&sym53c416_lock, flags); | |
734 | continue; | |
735 | ||
736 | fail_free_host: | |
737 | scsi_unregister(shpnt); | |
738 | fail_release_region: | |
739 | release_region(hosts[i].base, IO_RANGE); | |
740 | } | |
741 | return count; | |
742 | } | |
743 | ||
744 | const char *sym53c416_info(struct Scsi_Host *SChost) | |
745 | { | |
746 | int i; | |
747 | int base = SChost->io_port; | |
748 | int irq = SChost->irq; | |
749 | int scsi_id = 0; | |
750 | int rev = inb(base + TC_HIGH); | |
751 | ||
752 | for(i = 0; i < host_index; i++) | |
753 | if(hosts[i].base == base) | |
754 | scsi_id = hosts[i].scsi_id; | |
755 | sprintf(info, "Symbios Logic 53c416 (rev. %d) at 0x%03x, irq %d, SCSI-ID %d, %s pio", rev, base, irq, scsi_id, (fastpio)? "fast" : "slow"); | |
756 | return info; | |
757 | } | |
758 | ||
759 | int sym53c416_queuecommand(Scsi_Cmnd *SCpnt, void (*done)(Scsi_Cmnd *)) | |
760 | { | |
761 | int base; | |
762 | unsigned long flags = 0; | |
763 | int i; | |
764 | ||
765 | /* Store base register as we can have more than one controller in the system */ | |
766 | base = SCpnt->device->host->io_port; | |
767 | current_command = SCpnt; /* set current command */ | |
768 | current_command->scsi_done = done; /* set ptr to done function */ | |
769 | current_command->SCp.phase = command_ph; /* currect phase is the command phase */ | |
770 | current_command->SCp.Status = 0; | |
771 | current_command->SCp.Message = 0; | |
772 | ||
773 | spin_lock_irqsave(&sym53c416_lock, flags); | |
422c0d61 | 774 | outb(scmd_id(SCpnt), base + DEST_BUS_ID); /* Set scsi id target */ |
1da177e4 LT |
775 | outb(FLUSH_FIFO, base + COMMAND_REG); /* Flush SCSI and PIO FIFO's */ |
776 | /* Write SCSI command into the SCSI fifo */ | |
777 | for(i = 0; i < SCpnt->cmd_len; i++) | |
778 | outb(SCpnt->cmnd[i], base + SCSI_FIFO); | |
779 | /* Start selection sequence */ | |
780 | outb(SEL_WITHOUT_ATN_SEQ, base + COMMAND_REG); | |
781 | /* Now an interrupt will be generated which we will catch in out interrupt routine */ | |
782 | spin_unlock_irqrestore(&sym53c416_lock, flags); | |
783 | return 0; | |
784 | } | |
785 | ||
1da177e4 LT |
786 | static int sym53c416_host_reset(Scsi_Cmnd *SCpnt) |
787 | { | |
788 | int base; | |
789 | int scsi_id = -1; | |
790 | int i; | |
df0ae249 JG |
791 | unsigned long flags; |
792 | ||
793 | spin_lock_irqsave(&sym53c416_lock, flags); | |
1da177e4 LT |
794 | |
795 | /* printk("sym53c416_reset\n"); */ | |
796 | base = SCpnt->device->host->io_port; | |
797 | /* search scsi_id - fixme, we shouldnt need to iterate for this! */ | |
b6f0b0d0 | 798 | for(i = 0; i < host_index && scsi_id == -1; i++) |
1da177e4 LT |
799 | if(hosts[i].base == base) |
800 | scsi_id = hosts[i].scsi_id; | |
801 | outb(RESET_CHIP, base + COMMAND_REG); | |
802 | outb(NOOP | PIO_MODE, base + COMMAND_REG); | |
803 | outb(RESET_SCSI_BUS, base + COMMAND_REG); | |
804 | sym53c416_init(base, scsi_id); | |
df0ae249 JG |
805 | |
806 | spin_unlock_irqrestore(&sym53c416_lock, flags); | |
1da177e4 LT |
807 | return SUCCESS; |
808 | } | |
809 | ||
810 | static int sym53c416_release(struct Scsi_Host *shost) | |
811 | { | |
812 | if (shost->irq) | |
813 | free_irq(shost->irq, shost); | |
814 | if (shost->io_port && shost->n_io_port) | |
815 | release_region(shost->io_port, shost->n_io_port); | |
816 | return 0; | |
817 | } | |
818 | ||
819 | static int sym53c416_bios_param(struct scsi_device *sdev, | |
820 | struct block_device *dev, | |
821 | sector_t capacity, int *ip) | |
822 | { | |
823 | int size; | |
824 | ||
825 | size = capacity; | |
826 | ip[0] = 64; /* heads */ | |
827 | ip[1] = 32; /* sectors */ | |
828 | if((ip[2] = size >> 11) > 1024) /* cylinders, test for big disk */ | |
829 | { | |
830 | ip[0] = 255; /* heads */ | |
831 | ip[1] = 63; /* sectors */ | |
832 | ip[2] = size / (255 * 63); /* cylinders */ | |
833 | } | |
834 | return 0; | |
835 | } | |
836 | ||
837 | /* Loadable module support */ | |
838 | #ifdef MODULE | |
839 | ||
840 | MODULE_AUTHOR("Lieven Willems"); | |
841 | MODULE_LICENSE("GPL"); | |
842 | ||
843 | module_param_array(sym53c416, uint, NULL, 0); | |
844 | module_param_array(sym53c416_1, uint, NULL, 0); | |
845 | module_param_array(sym53c416_2, uint, NULL, 0); | |
846 | module_param_array(sym53c416_3, uint, NULL, 0); | |
847 | ||
848 | #endif | |
849 | ||
d0be4a7d | 850 | static struct scsi_host_template driver_template = { |
1da177e4 LT |
851 | .proc_name = "sym53c416", |
852 | .name = "Symbios Logic 53c416", | |
853 | .detect = sym53c416_detect, | |
854 | .info = sym53c416_info, | |
855 | .queuecommand = sym53c416_queuecommand, | |
1da177e4 | 856 | .eh_host_reset_handler =sym53c416_host_reset, |
1da177e4 LT |
857 | .release = sym53c416_release, |
858 | .bios_param = sym53c416_bios_param, | |
859 | .can_queue = 1, | |
860 | .this_id = SYM53C416_SCSI_ID, | |
861 | .sg_tablesize = 32, | |
862 | .cmd_per_lun = 1, | |
863 | .unchecked_isa_dma = 1, | |
864 | .use_clustering = ENABLE_CLUSTERING, | |
865 | }; | |
866 | #include "scsi_module.c" |