Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Sun3 SCSI stuff by Erik Verbruggen (erik@bigmama.xtdnet.nl) | |
3 | * | |
4 | * Sun3 DMA routines added by Sam Creasey (sammy@sammy.net) | |
5 | * | |
757f5bad FT |
6 | * VME support added by Sam Creasey |
7 | * | |
8 | * TODO: modify this driver to support multiple Sun3 SCSI VME boards | |
9 | * | |
1da177e4 LT |
10 | * Adapted from mac_scsinew.c: |
11 | */ | |
12 | /* | |
13 | * Generic Macintosh NCR5380 driver | |
14 | * | |
15 | * Copyright 1998, Michael Schmitz <mschmitz@lbl.gov> | |
16 | * | |
17 | * derived in part from: | |
18 | */ | |
19 | /* | |
20 | * Generic Generic NCR5380 driver | |
21 | * | |
22 | * Copyright 1995, Russell King | |
23 | * | |
24 | * ALPHA RELEASE 1. | |
25 | * | |
26 | * For more information, please consult | |
27 | * | |
28 | * NCR 5380 Family | |
29 | * SCSI Protocol Controller | |
30 | * Databook | |
31 | * | |
32 | * NCR Microelectronics | |
33 | * 1635 Aeroplaza Drive | |
34 | * Colorado Springs, CO 80916 | |
35 | * 1+ (719) 578-3400 | |
36 | * 1+ (800) 334-5454 | |
37 | */ | |
38 | ||
39 | ||
40 | /* | |
41 | * This is from mac_scsi.h, but hey, maybe this is useful for Sun3 too! :) | |
42 | * | |
43 | * Options : | |
44 | * | |
45 | * PARITY - enable parity checking. Not supported. | |
46 | * | |
47 | * SCSI2 - enable support for SCSI-II tagged queueing. Untested. | |
48 | * | |
49 | * USLEEP - enable support for devices that don't disconnect. Untested. | |
50 | */ | |
51 | ||
1da177e4 LT |
52 | #define AUTOSENSE |
53 | ||
54 | #include <linux/types.h> | |
55 | #include <linux/stddef.h> | |
56 | #include <linux/ctype.h> | |
57 | #include <linux/delay.h> | |
58 | ||
59 | #include <linux/module.h> | |
60 | #include <linux/signal.h> | |
1da177e4 LT |
61 | #include <linux/ioport.h> |
62 | #include <linux/init.h> | |
63 | #include <linux/blkdev.h> | |
64 | ||
65 | #include <asm/io.h> | |
1da177e4 LT |
66 | |
67 | #include <asm/sun3ints.h> | |
68 | #include <asm/dvma.h> | |
69 | #include <asm/idprom.h> | |
70 | #include <asm/machines.h> | |
71 | ||
72 | /* dma on! */ | |
73 | #define REAL_DMA | |
74 | ||
75 | #include "scsi.h" | |
76 | #include <scsi/scsi_host.h> | |
77 | #include "sun3_scsi.h" | |
9f6620a3 | 78 | #include "NCR5380.h" |
1da177e4 | 79 | |
757f5bad | 80 | extern int sun3_map_test(unsigned long, char *); |
1da177e4 LT |
81 | |
82 | #define USE_WRAPPER | |
83 | /*#define RESET_BOOT */ | |
84 | #define DRIVER_SETUP | |
85 | ||
1da177e4 LT |
86 | /* |
87 | * BUG can be used to trigger a strange code-size related hang on 2.1 kernels | |
88 | */ | |
89 | #ifdef BUG | |
90 | #undef RESET_BOOT | |
91 | #undef DRIVER_SETUP | |
92 | #endif | |
93 | ||
94 | /* #define SUPPORT_TAGS */ | |
95 | ||
757f5bad FT |
96 | #ifdef SUN3_SCSI_VME |
97 | #define ENABLE_IRQ() | |
98 | #else | |
1da177e4 | 99 | #define ENABLE_IRQ() enable_irq( IRQ_SUN3_SCSI ); |
757f5bad | 100 | #endif |
1da177e4 LT |
101 | |
102 | ||
7d12e780 | 103 | static irqreturn_t scsi_sun3_intr(int irq, void *dummy); |
1da177e4 LT |
104 | static inline unsigned char sun3scsi_read(int reg); |
105 | static inline void sun3scsi_write(int reg, int value); | |
106 | ||
107 | static int setup_can_queue = -1; | |
108 | module_param(setup_can_queue, int, 0); | |
109 | static int setup_cmd_per_lun = -1; | |
110 | module_param(setup_cmd_per_lun, int, 0); | |
111 | static int setup_sg_tablesize = -1; | |
112 | module_param(setup_sg_tablesize, int, 0); | |
113 | #ifdef SUPPORT_TAGS | |
114 | static int setup_use_tagged_queuing = -1; | |
115 | module_param(setup_use_tagged_queuing, int, 0); | |
116 | #endif | |
117 | static int setup_hostid = -1; | |
118 | module_param(setup_hostid, int, 0); | |
119 | ||
811c9366 | 120 | static struct scsi_cmnd *sun3_dma_setup_done = NULL; |
1da177e4 | 121 | |
2b0f834c MS |
122 | #define RESET_RUN_DONE |
123 | ||
1da177e4 LT |
124 | #define AFTER_RESET_DELAY (HZ/2) |
125 | ||
126 | /* ms to wait after hitting dma regs */ | |
127 | #define SUN3_DMA_DELAY 10 | |
128 | ||
129 | /* dvma buffer to allocate -- 32k should hopefully be more than sufficient */ | |
130 | #define SUN3_DVMA_BUFSIZE 0xe000 | |
131 | ||
132 | /* minimum number of bytes to do dma on */ | |
133 | #define SUN3_DMA_MINSIZE 128 | |
134 | ||
135 | static volatile unsigned char *sun3_scsi_regp; | |
136 | static volatile struct sun3_dma_regs *dregs; | |
757f5bad | 137 | #ifndef SUN3_SCSI_VME |
1da177e4 | 138 | static struct sun3_udc_regs *udc_regs = NULL; |
757f5bad | 139 | #endif |
1da177e4 LT |
140 | static unsigned char *sun3_dma_orig_addr = NULL; |
141 | static unsigned long sun3_dma_orig_count = 0; | |
142 | static int sun3_dma_active = 0; | |
143 | static unsigned long last_residual = 0; | |
144 | ||
145 | /* | |
146 | * NCR 5380 register access functions | |
147 | */ | |
148 | ||
149 | static inline unsigned char sun3scsi_read(int reg) | |
150 | { | |
151 | return( sun3_scsi_regp[reg] ); | |
152 | } | |
153 | ||
154 | static inline void sun3scsi_write(int reg, int value) | |
155 | { | |
156 | sun3_scsi_regp[reg] = value; | |
157 | } | |
158 | ||
757f5bad | 159 | #ifndef SUN3_SCSI_VME |
1da177e4 LT |
160 | /* dma controller register access functions */ |
161 | ||
162 | static inline unsigned short sun3_udc_read(unsigned char reg) | |
163 | { | |
164 | unsigned short ret; | |
165 | ||
166 | dregs->udc_addr = UDC_CSR; | |
167 | udelay(SUN3_DMA_DELAY); | |
168 | ret = dregs->udc_data; | |
169 | udelay(SUN3_DMA_DELAY); | |
170 | ||
171 | return ret; | |
172 | } | |
173 | ||
174 | static inline void sun3_udc_write(unsigned short val, unsigned char reg) | |
175 | { | |
176 | dregs->udc_addr = reg; | |
177 | udelay(SUN3_DMA_DELAY); | |
178 | dregs->udc_data = val; | |
179 | udelay(SUN3_DMA_DELAY); | |
180 | } | |
757f5bad | 181 | #endif |
1da177e4 LT |
182 | |
183 | /* | |
184 | * XXX: status debug | |
185 | */ | |
186 | static struct Scsi_Host *default_instance; | |
187 | ||
188 | /* | |
d0be4a7d | 189 | * Function : int sun3scsi_detect(struct scsi_host_template * tpnt) |
1da177e4 LT |
190 | * |
191 | * Purpose : initializes mac NCR5380 driver based on the | |
192 | * command line / compile time port and irq definitions. | |
193 | * | |
194 | * Inputs : tpnt - template for this SCSI adapter. | |
195 | * | |
196 | * Returns : 1 if a host adapter was found, 0 if not. | |
197 | * | |
198 | */ | |
199 | ||
757f5bad | 200 | static int __init sun3scsi_detect(struct scsi_host_template *tpnt) |
1da177e4 | 201 | { |
757f5bad | 202 | unsigned long ioaddr, irq; |
1da177e4 LT |
203 | static int called = 0; |
204 | struct Scsi_Host *instance; | |
757f5bad FT |
205 | #ifdef SUN3_SCSI_VME |
206 | int i; | |
207 | unsigned long addrs[3] = { IOBASE_SUN3_VMESCSI, | |
208 | IOBASE_SUN3_VMESCSI + 0x4000, | |
209 | 0 }; | |
210 | unsigned long vecs[3] = { SUN3_VEC_VMESCSI0, | |
211 | SUN3_VEC_VMESCSI1, | |
212 | 0 }; | |
213 | #endif | |
1da177e4 LT |
214 | |
215 | /* check that this machine has an onboard 5380 */ | |
216 | switch(idprom->id_machtype) { | |
757f5bad FT |
217 | #ifdef SUN3_SCSI_VME |
218 | case SM_SUN3|SM_3_160: | |
219 | case SM_SUN3|SM_3_260: | |
220 | break; | |
221 | #else | |
1da177e4 LT |
222 | case SM_SUN3|SM_3_50: |
223 | case SM_SUN3|SM_3_60: | |
224 | break; | |
757f5bad | 225 | #endif |
1da177e4 LT |
226 | |
227 | default: | |
228 | return 0; | |
229 | } | |
230 | ||
231 | if(called) | |
232 | return 0; | |
233 | ||
757f5bad FT |
234 | #ifdef SUN3_SCSI_VME |
235 | tpnt->proc_name = "Sun3 5380 VME SCSI"; | |
236 | #else | |
1da177e4 | 237 | tpnt->proc_name = "Sun3 5380 SCSI"; |
757f5bad | 238 | #endif |
1da177e4 LT |
239 | |
240 | /* setup variables */ | |
241 | tpnt->can_queue = | |
242 | (setup_can_queue > 0) ? setup_can_queue : CAN_QUEUE; | |
243 | tpnt->cmd_per_lun = | |
244 | (setup_cmd_per_lun > 0) ? setup_cmd_per_lun : CMD_PER_LUN; | |
245 | tpnt->sg_tablesize = | |
246 | (setup_sg_tablesize >= 0) ? setup_sg_tablesize : SG_TABLESIZE; | |
247 | ||
248 | if (setup_hostid >= 0) | |
249 | tpnt->this_id = setup_hostid; | |
250 | else { | |
251 | /* use 7 as default */ | |
252 | tpnt->this_id = 7; | |
253 | } | |
254 | ||
757f5bad FT |
255 | #ifdef SUN3_SCSI_VME |
256 | ioaddr = 0; | |
257 | for (i = 0; addrs[i] != 0; i++) { | |
258 | unsigned char x; | |
259 | ||
260 | ioaddr = (unsigned long)sun3_ioremap(addrs[i], PAGE_SIZE, | |
261 | SUN3_PAGE_TYPE_VME16); | |
262 | irq = vecs[i]; | |
263 | sun3_scsi_regp = (unsigned char *)ioaddr; | |
264 | ||
265 | dregs = (struct sun3_dma_regs *)(((unsigned char *)ioaddr) + 8); | |
266 | ||
267 | if (sun3_map_test((unsigned long)dregs, &x)) { | |
268 | unsigned short oldcsr; | |
269 | ||
270 | oldcsr = dregs->csr; | |
271 | dregs->csr = 0; | |
272 | udelay(SUN3_DMA_DELAY); | |
273 | if (dregs->csr == 0x1400) | |
274 | break; | |
275 | ||
276 | dregs->csr = oldcsr; | |
277 | } | |
278 | ||
279 | iounmap((void *)ioaddr); | |
280 | ioaddr = 0; | |
281 | } | |
282 | ||
283 | if (!ioaddr) | |
284 | return 0; | |
285 | #else | |
286 | irq = IRQ_SUN3_SCSI; | |
1da177e4 LT |
287 | ioaddr = (unsigned long)ioremap(IOBASE_SUN3_SCSI, PAGE_SIZE); |
288 | sun3_scsi_regp = (unsigned char *)ioaddr; | |
289 | ||
290 | dregs = (struct sun3_dma_regs *)(((unsigned char *)ioaddr) + 8); | |
291 | ||
292 | if((udc_regs = dvma_malloc(sizeof(struct sun3_udc_regs))) | |
293 | == NULL) { | |
294 | printk("SUN3 Scsi couldn't allocate DVMA memory!\n"); | |
295 | return 0; | |
296 | } | |
1da177e4 LT |
297 | #endif |
298 | #ifdef SUPPORT_TAGS | |
299 | if (setup_use_tagged_queuing < 0) | |
300 | setup_use_tagged_queuing = USE_TAGGED_QUEUING; | |
301 | #endif | |
302 | ||
303 | instance = scsi_register (tpnt, sizeof(struct NCR5380_hostdata)); | |
304 | if(instance == NULL) | |
305 | return 0; | |
306 | ||
307 | default_instance = instance; | |
308 | ||
309 | instance->io_port = (unsigned long) ioaddr; | |
757f5bad | 310 | instance->irq = irq; |
1da177e4 LT |
311 | |
312 | NCR5380_init(instance, 0); | |
313 | ||
314 | instance->n_io_port = 32; | |
315 | ||
316 | ((struct NCR5380_hostdata *)instance->hostdata)->ctrl = 0; | |
317 | ||
318 | if (request_irq(instance->irq, scsi_sun3_intr, | |
1e641664 | 319 | 0, "Sun3SCSI-5380", instance)) { |
1da177e4 LT |
320 | #ifndef REAL_DMA |
321 | printk("scsi%d: IRQ%d not free, interrupts disabled\n", | |
322 | instance->host_no, instance->irq); | |
323 | instance->irq = SCSI_IRQ_NONE; | |
324 | #else | |
325 | printk("scsi%d: IRQ%d not free, bailing out\n", | |
326 | instance->host_no, instance->irq); | |
327 | return 0; | |
328 | #endif | |
329 | } | |
330 | ||
757f5bad FT |
331 | pr_info("scsi%d: %s at port %lX irq", instance->host_no, |
332 | tpnt->proc_name, instance->io_port); | |
1da177e4 LT |
333 | if (instance->irq == SCSI_IRQ_NONE) |
334 | printk ("s disabled"); | |
335 | else | |
336 | printk (" %d", instance->irq); | |
337 | printk(" options CAN_QUEUE=%d CMD_PER_LUN=%d release=%d", | |
338 | instance->can_queue, instance->cmd_per_lun, | |
339 | SUN3SCSI_PUBLIC_RELEASE); | |
340 | printk("\nscsi%d:", instance->host_no); | |
341 | NCR5380_print_options(instance); | |
342 | printk("\n"); | |
343 | ||
344 | dregs->csr = 0; | |
345 | udelay(SUN3_DMA_DELAY); | |
346 | dregs->csr = CSR_SCSI | CSR_FIFO | CSR_INTR; | |
347 | udelay(SUN3_DMA_DELAY); | |
348 | dregs->fifo_count = 0; | |
757f5bad FT |
349 | #ifdef SUN3_SCSI_VME |
350 | dregs->fifo_count_hi = 0; | |
351 | dregs->dma_addr_hi = 0; | |
352 | dregs->dma_addr_lo = 0; | |
353 | dregs->dma_count_hi = 0; | |
354 | dregs->dma_count_lo = 0; | |
355 | ||
356 | dregs->ivect = VME_DATA24 | (instance->irq & 0xff); | |
357 | #endif | |
1da177e4 LT |
358 | |
359 | called = 1; | |
360 | ||
361 | #ifdef RESET_BOOT | |
362 | sun3_scsi_reset_boot(instance); | |
363 | #endif | |
364 | ||
365 | return 1; | |
366 | } | |
367 | ||
368 | int sun3scsi_release (struct Scsi_Host *shpnt) | |
369 | { | |
370 | if (shpnt->irq != SCSI_IRQ_NONE) | |
1e641664 | 371 | free_irq(shpnt->irq, shpnt); |
1da177e4 LT |
372 | |
373 | iounmap((void *)sun3_scsi_regp); | |
374 | ||
19b6c51c | 375 | NCR5380_exit(shpnt); |
1da177e4 LT |
376 | return 0; |
377 | } | |
378 | ||
379 | #ifdef RESET_BOOT | |
380 | /* | |
381 | * Our 'bus reset on boot' function | |
382 | */ | |
383 | ||
384 | static void sun3_scsi_reset_boot(struct Scsi_Host *instance) | |
385 | { | |
386 | unsigned long end; | |
387 | ||
388 | NCR5380_local_declare(); | |
389 | NCR5380_setup(instance); | |
390 | ||
391 | /* | |
392 | * Do a SCSI reset to clean up the bus during initialization. No | |
393 | * messing with the queues, interrupts, or locks necessary here. | |
394 | */ | |
395 | ||
396 | printk( "Sun3 SCSI: resetting the SCSI bus..." ); | |
397 | ||
398 | /* switch off SCSI IRQ - catch an interrupt without IRQ bit set else */ | |
399 | // sun3_disable_irq( IRQ_SUN3_SCSI ); | |
400 | ||
401 | /* get in phase */ | |
402 | NCR5380_write( TARGET_COMMAND_REG, | |
403 | PHASE_SR_TO_TCR( NCR5380_read(STATUS_REG) )); | |
404 | ||
405 | /* assert RST */ | |
406 | NCR5380_write( INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST ); | |
407 | ||
408 | /* The min. reset hold time is 25us, so 40us should be enough */ | |
409 | udelay( 50 ); | |
410 | ||
411 | /* reset RST and interrupt */ | |
412 | NCR5380_write( INITIATOR_COMMAND_REG, ICR_BASE ); | |
413 | NCR5380_read( RESET_PARITY_INTERRUPT_REG ); | |
414 | ||
415 | for( end = jiffies + AFTER_RESET_DELAY; time_before(jiffies, end); ) | |
416 | barrier(); | |
417 | ||
418 | /* switch on SCSI IRQ again */ | |
419 | // sun3_enable_irq( IRQ_SUN3_SCSI ); | |
420 | ||
421 | printk( " done\n" ); | |
422 | } | |
423 | #endif | |
424 | ||
757f5bad FT |
425 | static const char *sun3scsi_info(struct Scsi_Host *spnt) |
426 | { | |
1da177e4 LT |
427 | return ""; |
428 | } | |
429 | ||
430 | // safe bits for the CSR | |
431 | #define CSR_GOOD 0x060f | |
432 | ||
7d12e780 | 433 | static irqreturn_t scsi_sun3_intr(int irq, void *dummy) |
1da177e4 LT |
434 | { |
435 | unsigned short csr = dregs->csr; | |
436 | int handled = 0; | |
437 | ||
757f5bad FT |
438 | #ifdef SUN3_SCSI_VME |
439 | dregs->csr &= ~CSR_DMA_ENABLE; | |
440 | #endif | |
441 | ||
1da177e4 LT |
442 | if(csr & ~CSR_GOOD) { |
443 | if(csr & CSR_DMA_BUSERR) { | |
444 | printk("scsi%d: bus error in dma\n", default_instance->host_no); | |
445 | } | |
446 | ||
447 | if(csr & CSR_DMA_CONFLICT) { | |
448 | printk("scsi%d: dma conflict\n", default_instance->host_no); | |
449 | } | |
450 | handled = 1; | |
451 | } | |
452 | ||
453 | if(csr & (CSR_SDB_INT | CSR_DMA_INT)) { | |
7d12e780 | 454 | NCR5380_intr(irq, dummy); |
1da177e4 LT |
455 | handled = 1; |
456 | } | |
457 | ||
458 | return IRQ_RETVAL(handled); | |
459 | } | |
460 | ||
461 | /* | |
462 | * Debug stuff - to be called on NMI, or sysrq key. Use at your own risk; | |
463 | * reentering NCR5380_print_status seems to have ugly side effects | |
464 | */ | |
465 | ||
466 | /* this doesn't seem to get used at all -- sam */ | |
467 | #if 0 | |
468 | void sun3_sun3_debug (void) | |
469 | { | |
470 | unsigned long flags; | |
471 | NCR5380_local_declare(); | |
472 | ||
473 | if (default_instance) { | |
474 | local_irq_save(flags); | |
475 | NCR5380_print_status(default_instance); | |
476 | local_irq_restore(flags); | |
477 | } | |
478 | } | |
479 | #endif | |
480 | ||
481 | ||
482 | /* sun3scsi_dma_setup() -- initialize the dma controller for a read/write */ | |
483 | static unsigned long sun3scsi_dma_setup(void *data, unsigned long count, int write_flag) | |
484 | { | |
1da177e4 LT |
485 | void *addr; |
486 | ||
487 | if(sun3_dma_orig_addr != NULL) | |
488 | dvma_unmap(sun3_dma_orig_addr); | |
489 | ||
757f5bad FT |
490 | #ifdef SUN3_SCSI_VME |
491 | addr = (void *)dvma_map_vme((unsigned long) data, count); | |
492 | #else | |
1da177e4 | 493 | addr = (void *)dvma_map((unsigned long) data, count); |
757f5bad | 494 | #endif |
1da177e4 LT |
495 | |
496 | sun3_dma_orig_addr = addr; | |
497 | sun3_dma_orig_count = count; | |
757f5bad FT |
498 | |
499 | #ifndef SUN3_SCSI_VME | |
1da177e4 LT |
500 | dregs->fifo_count = 0; |
501 | sun3_udc_write(UDC_RESET, UDC_CSR); | |
502 | ||
503 | /* reset fifo */ | |
504 | dregs->csr &= ~CSR_FIFO; | |
505 | dregs->csr |= CSR_FIFO; | |
757f5bad | 506 | #endif |
1da177e4 LT |
507 | |
508 | /* set direction */ | |
509 | if(write_flag) | |
510 | dregs->csr |= CSR_SEND; | |
511 | else | |
512 | dregs->csr &= ~CSR_SEND; | |
513 | ||
757f5bad FT |
514 | #ifdef SUN3_SCSI_VME |
515 | dregs->csr |= CSR_PACK_ENABLE; | |
516 | ||
517 | dregs->dma_addr_hi = ((unsigned long)addr >> 16); | |
518 | dregs->dma_addr_lo = ((unsigned long)addr & 0xffff); | |
519 | ||
520 | dregs->dma_count_hi = 0; | |
521 | dregs->dma_count_lo = 0; | |
522 | dregs->fifo_count_hi = 0; | |
523 | dregs->fifo_count = 0; | |
524 | #else | |
1da177e4 LT |
525 | /* byte count for fifo */ |
526 | dregs->fifo_count = count; | |
527 | ||
528 | sun3_udc_write(UDC_RESET, UDC_CSR); | |
529 | ||
530 | /* reset fifo */ | |
531 | dregs->csr &= ~CSR_FIFO; | |
532 | dregs->csr |= CSR_FIFO; | |
533 | ||
534 | if(dregs->fifo_count != count) { | |
535 | printk("scsi%d: fifo_mismatch %04x not %04x\n", | |
536 | default_instance->host_no, dregs->fifo_count, | |
537 | (unsigned int) count); | |
d614f068 | 538 | NCR5380_dprint(NDEBUG_DMA, default_instance); |
1da177e4 LT |
539 | } |
540 | ||
541 | /* setup udc */ | |
1da177e4 LT |
542 | udc_regs->addr_hi = (((unsigned long)(addr) & 0xff0000) >> 8); |
543 | udc_regs->addr_lo = ((unsigned long)(addr) & 0xffff); | |
1da177e4 LT |
544 | udc_regs->count = count/2; /* count in words */ |
545 | udc_regs->mode_hi = UDC_MODE_HIWORD; | |
546 | if(write_flag) { | |
547 | if(count & 1) | |
548 | udc_regs->count++; | |
549 | udc_regs->mode_lo = UDC_MODE_LSEND; | |
550 | udc_regs->rsel = UDC_RSEL_SEND; | |
551 | } else { | |
552 | udc_regs->mode_lo = UDC_MODE_LRECV; | |
553 | udc_regs->rsel = UDC_RSEL_RECV; | |
554 | } | |
555 | ||
556 | /* announce location of regs block */ | |
557 | sun3_udc_write(((dvma_vtob(udc_regs) & 0xff0000) >> 8), | |
558 | UDC_CHN_HI); | |
559 | ||
560 | sun3_udc_write((dvma_vtob(udc_regs) & 0xffff), UDC_CHN_LO); | |
561 | ||
562 | /* set dma master on */ | |
563 | sun3_udc_write(0xd, UDC_MODE); | |
564 | ||
565 | /* interrupt enable */ | |
566 | sun3_udc_write(UDC_INT_ENABLE, UDC_CSR); | |
757f5bad | 567 | #endif |
1da177e4 LT |
568 | |
569 | return count; | |
570 | ||
571 | } | |
572 | ||
757f5bad | 573 | #ifndef SUN3_SCSI_VME |
1da177e4 LT |
574 | static inline unsigned long sun3scsi_dma_count(struct Scsi_Host *instance) |
575 | { | |
576 | unsigned short resid; | |
577 | ||
578 | dregs->udc_addr = 0x32; | |
579 | udelay(SUN3_DMA_DELAY); | |
580 | resid = dregs->udc_data; | |
581 | udelay(SUN3_DMA_DELAY); | |
582 | resid *= 2; | |
583 | ||
584 | return (unsigned long) resid; | |
585 | } | |
757f5bad | 586 | #endif |
1da177e4 LT |
587 | |
588 | static inline unsigned long sun3scsi_dma_residual(struct Scsi_Host *instance) | |
589 | { | |
590 | return last_residual; | |
591 | } | |
592 | ||
811c9366 H |
593 | static inline unsigned long sun3scsi_dma_xfer_len(unsigned long wanted, |
594 | struct scsi_cmnd *cmd, | |
595 | int write_flag) | |
1da177e4 | 596 | { |
33659ebb | 597 | if (cmd->request->cmd_type == REQ_TYPE_FS) |
1da177e4 LT |
598 | return wanted; |
599 | else | |
600 | return 0; | |
601 | } | |
602 | ||
603 | static inline int sun3scsi_dma_start(unsigned long count, unsigned char *data) | |
604 | { | |
757f5bad FT |
605 | #ifdef SUN3_SCSI_VME |
606 | unsigned short csr; | |
607 | ||
608 | csr = dregs->csr; | |
609 | ||
610 | dregs->dma_count_hi = (sun3_dma_orig_count >> 16); | |
611 | dregs->dma_count_lo = (sun3_dma_orig_count & 0xffff); | |
1da177e4 | 612 | |
757f5bad FT |
613 | dregs->fifo_count_hi = (sun3_dma_orig_count >> 16); |
614 | dregs->fifo_count = (sun3_dma_orig_count & 0xffff); | |
615 | ||
616 | /* if(!(csr & CSR_DMA_ENABLE)) | |
617 | * dregs->csr |= CSR_DMA_ENABLE; | |
618 | */ | |
619 | #else | |
1da177e4 | 620 | sun3_udc_write(UDC_CHN_START, UDC_CSR); |
757f5bad | 621 | #endif |
1da177e4 LT |
622 | |
623 | return 0; | |
624 | } | |
625 | ||
626 | /* clean up after our dma is done */ | |
627 | static int sun3scsi_dma_finish(int write_flag) | |
628 | { | |
757f5bad | 629 | unsigned short __maybe_unused count; |
1da177e4 LT |
630 | unsigned short fifo; |
631 | int ret = 0; | |
632 | ||
633 | sun3_dma_active = 0; | |
757f5bad FT |
634 | |
635 | #ifdef SUN3_SCSI_VME | |
636 | dregs->csr &= ~CSR_DMA_ENABLE; | |
637 | ||
638 | fifo = dregs->fifo_count; | |
639 | if (write_flag) { | |
640 | if ((fifo > 0) && (fifo < sun3_dma_orig_count)) | |
641 | fifo++; | |
642 | } | |
643 | ||
644 | last_residual = fifo; | |
645 | /* empty bytes from the fifo which didn't make it */ | |
646 | if ((!write_flag) && (dregs->csr & CSR_LEFT)) { | |
647 | unsigned char *vaddr; | |
648 | ||
649 | vaddr = (unsigned char *)dvma_vmetov(sun3_dma_orig_addr); | |
650 | ||
651 | vaddr += (sun3_dma_orig_count - fifo); | |
652 | vaddr--; | |
653 | ||
654 | switch (dregs->csr & CSR_LEFT) { | |
655 | case CSR_LEFT_3: | |
656 | *vaddr = (dregs->bpack_lo & 0xff00) >> 8; | |
657 | vaddr--; | |
658 | ||
659 | case CSR_LEFT_2: | |
660 | *vaddr = (dregs->bpack_hi & 0x00ff); | |
661 | vaddr--; | |
662 | ||
663 | case CSR_LEFT_1: | |
664 | *vaddr = (dregs->bpack_hi & 0xff00) >> 8; | |
665 | break; | |
666 | } | |
667 | } | |
668 | #else | |
1da177e4 LT |
669 | // check to empty the fifo on a read |
670 | if(!write_flag) { | |
671 | int tmo = 20000; /* .2 sec */ | |
672 | ||
673 | while(1) { | |
674 | if(dregs->csr & CSR_FIFO_EMPTY) | |
675 | break; | |
676 | ||
677 | if(--tmo <= 0) { | |
678 | printk("sun3scsi: fifo failed to empty!\n"); | |
679 | return 1; | |
680 | } | |
681 | udelay(10); | |
682 | } | |
683 | } | |
1da177e4 LT |
684 | |
685 | count = sun3scsi_dma_count(default_instance); | |
1da177e4 LT |
686 | |
687 | fifo = dregs->fifo_count; | |
688 | last_residual = fifo; | |
689 | ||
690 | /* empty bytes from the fifo which didn't make it */ | |
691 | if((!write_flag) && (count - fifo) == 2) { | |
692 | unsigned short data; | |
693 | unsigned char *vaddr; | |
694 | ||
695 | data = dregs->fifo_data; | |
696 | vaddr = (unsigned char *)dvma_btov(sun3_dma_orig_addr); | |
697 | ||
698 | vaddr += (sun3_dma_orig_count - fifo); | |
699 | ||
700 | vaddr[-2] = (data & 0xff00) >> 8; | |
701 | vaddr[-1] = (data & 0xff); | |
702 | } | |
757f5bad | 703 | #endif |
1da177e4 LT |
704 | |
705 | dvma_unmap(sun3_dma_orig_addr); | |
706 | sun3_dma_orig_addr = NULL; | |
757f5bad FT |
707 | |
708 | #ifdef SUN3_SCSI_VME | |
709 | dregs->dma_addr_hi = 0; | |
710 | dregs->dma_addr_lo = 0; | |
711 | dregs->dma_count_hi = 0; | |
712 | dregs->dma_count_lo = 0; | |
713 | ||
714 | dregs->fifo_count = 0; | |
715 | dregs->fifo_count_hi = 0; | |
716 | ||
717 | dregs->csr &= ~CSR_SEND; | |
718 | /* dregs->csr |= CSR_DMA_ENABLE; */ | |
719 | #else | |
1da177e4 LT |
720 | sun3_udc_write(UDC_RESET, UDC_CSR); |
721 | dregs->fifo_count = 0; | |
722 | dregs->csr &= ~CSR_SEND; | |
723 | ||
724 | /* reset fifo */ | |
725 | dregs->csr &= ~CSR_FIFO; | |
726 | dregs->csr |= CSR_FIFO; | |
757f5bad | 727 | #endif |
1da177e4 LT |
728 | |
729 | sun3_dma_setup_done = NULL; | |
730 | ||
731 | return ret; | |
732 | ||
733 | } | |
734 | ||
735 | #include "sun3_NCR5380.c" | |
736 | ||
d0be4a7d | 737 | static struct scsi_host_template driver_template = { |
9dcc26cf | 738 | .show_info = sun3scsi_show_info, |
1da177e4 LT |
739 | .name = SUN3_SCSI_NAME, |
740 | .detect = sun3scsi_detect, | |
741 | .release = sun3scsi_release, | |
742 | .info = sun3scsi_info, | |
743 | .queuecommand = sun3scsi_queue_command, | |
744 | .eh_abort_handler = sun3scsi_abort, | |
745 | .eh_bus_reset_handler = sun3scsi_bus_reset, | |
746 | .can_queue = CAN_QUEUE, | |
747 | .this_id = 7, | |
748 | .sg_tablesize = SG_TABLESIZE, | |
749 | .cmd_per_lun = CMD_PER_LUN, | |
750 | .use_clustering = DISABLE_CLUSTERING | |
751 | }; | |
752 | ||
753 | ||
754 | #include "scsi_module.c" | |
755 | ||
756 | MODULE_LICENSE("GPL"); |