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1 | /* |
2 | * driver for Microsemi PQI-based storage controllers | |
3 | * Copyright (c) 2016 Microsemi Corporation | |
4 | * Copyright (c) 2016 PMC-Sierra, Inc. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; version 2 of the License. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | |
13 | * NON INFRINGEMENT. See the GNU General Public License for more details. | |
14 | * | |
15 | * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com | |
16 | * | |
17 | */ | |
18 | ||
19 | #include <linux/module.h> | |
20 | #include <linux/kernel.h> | |
21 | #include <linux/pci.h> | |
22 | #include <linux/delay.h> | |
23 | #include <linux/interrupt.h> | |
24 | #include <linux/sched.h> | |
25 | #include <linux/rtc.h> | |
26 | #include <linux/bcd.h> | |
27 | #include <linux/cciss_ioctl.h> | |
52198226 | 28 | #include <linux/blk-mq-pci.h> |
6c223761 KB |
29 | #include <scsi/scsi_host.h> |
30 | #include <scsi/scsi_cmnd.h> | |
31 | #include <scsi/scsi_device.h> | |
32 | #include <scsi/scsi_eh.h> | |
33 | #include <scsi/scsi_transport_sas.h> | |
34 | #include <asm/unaligned.h> | |
35 | #include "smartpqi.h" | |
36 | #include "smartpqi_sis.h" | |
37 | ||
38 | #if !defined(BUILD_TIMESTAMP) | |
39 | #define BUILD_TIMESTAMP | |
40 | #endif | |
41 | ||
699bed75 | 42 | #define DRIVER_VERSION "0.9.13-370" |
6c223761 KB |
43 | #define DRIVER_MAJOR 0 |
44 | #define DRIVER_MINOR 9 | |
699bed75 KB |
45 | #define DRIVER_RELEASE 13 |
46 | #define DRIVER_REVISION 370 | |
6c223761 KB |
47 | |
48 | #define DRIVER_NAME "Microsemi PQI Driver (v" DRIVER_VERSION ")" | |
49 | #define DRIVER_NAME_SHORT "smartpqi" | |
50 | ||
51 | MODULE_AUTHOR("Microsemi"); | |
52 | MODULE_DESCRIPTION("Driver for Microsemi Smart Family Controller version " | |
53 | DRIVER_VERSION); | |
54 | MODULE_SUPPORTED_DEVICE("Microsemi Smart Family Controllers"); | |
55 | MODULE_VERSION(DRIVER_VERSION); | |
56 | MODULE_LICENSE("GPL"); | |
57 | ||
58 | #define PQI_ENABLE_MULTI_QUEUE_SUPPORT 0 | |
59 | ||
60 | static char *hpe_branded_controller = "HPE Smart Array Controller"; | |
61 | static char *microsemi_branded_controller = "Microsemi Smart Family Controller"; | |
62 | ||
63 | static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info); | |
64 | static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info); | |
65 | static void pqi_scan_start(struct Scsi_Host *shost); | |
66 | static void pqi_start_io(struct pqi_ctrl_info *ctrl_info, | |
67 | struct pqi_queue_group *queue_group, enum pqi_io_path path, | |
68 | struct pqi_io_request *io_request); | |
69 | static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info, | |
70 | struct pqi_iu_header *request, unsigned int flags, | |
71 | struct pqi_raid_error_info *error_info, unsigned long timeout_msecs); | |
72 | static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info, | |
73 | struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb, | |
74 | unsigned int cdb_length, struct pqi_queue_group *queue_group, | |
75 | struct pqi_encryption_info *encryption_info); | |
76 | ||
77 | /* for flags argument to pqi_submit_raid_request_synchronous() */ | |
78 | #define PQI_SYNC_FLAGS_INTERRUPTABLE 0x1 | |
79 | ||
80 | static struct scsi_transport_template *pqi_sas_transport_template; | |
81 | ||
82 | static atomic_t pqi_controller_count = ATOMIC_INIT(0); | |
83 | ||
84 | static int pqi_disable_device_id_wildcards; | |
85 | module_param_named(disable_device_id_wildcards, | |
86 | pqi_disable_device_id_wildcards, int, S_IRUGO | S_IWUSR); | |
87 | MODULE_PARM_DESC(disable_device_id_wildcards, | |
88 | "Disable device ID wildcards."); | |
89 | ||
90 | static char *raid_levels[] = { | |
91 | "RAID-0", | |
92 | "RAID-4", | |
93 | "RAID-1(1+0)", | |
94 | "RAID-5", | |
95 | "RAID-5+1", | |
96 | "RAID-ADG", | |
97 | "RAID-1(ADM)", | |
98 | }; | |
99 | ||
100 | static char *pqi_raid_level_to_string(u8 raid_level) | |
101 | { | |
102 | if (raid_level < ARRAY_SIZE(raid_levels)) | |
103 | return raid_levels[raid_level]; | |
104 | ||
105 | return ""; | |
106 | } | |
107 | ||
108 | #define SA_RAID_0 0 | |
109 | #define SA_RAID_4 1 | |
110 | #define SA_RAID_1 2 /* also used for RAID 10 */ | |
111 | #define SA_RAID_5 3 /* also used for RAID 50 */ | |
112 | #define SA_RAID_51 4 | |
113 | #define SA_RAID_6 5 /* also used for RAID 60 */ | |
114 | #define SA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ | |
115 | #define SA_RAID_MAX SA_RAID_ADM | |
116 | #define SA_RAID_UNKNOWN 0xff | |
117 | ||
118 | static inline void pqi_scsi_done(struct scsi_cmnd *scmd) | |
119 | { | |
120 | scmd->scsi_done(scmd); | |
121 | } | |
122 | ||
123 | static inline bool pqi_scsi3addr_equal(u8 *scsi3addr1, u8 *scsi3addr2) | |
124 | { | |
125 | return memcmp(scsi3addr1, scsi3addr2, 8) == 0; | |
126 | } | |
127 | ||
128 | static inline struct pqi_ctrl_info *shost_to_hba(struct Scsi_Host *shost) | |
129 | { | |
130 | void *hostdata = shost_priv(shost); | |
131 | ||
132 | return *((struct pqi_ctrl_info **)hostdata); | |
133 | } | |
134 | ||
135 | static inline bool pqi_is_logical_device(struct pqi_scsi_dev *device) | |
136 | { | |
137 | return !device->is_physical_device; | |
138 | } | |
139 | ||
140 | static inline bool pqi_ctrl_offline(struct pqi_ctrl_info *ctrl_info) | |
141 | { | |
142 | return !ctrl_info->controller_online; | |
143 | } | |
144 | ||
145 | static inline void pqi_check_ctrl_health(struct pqi_ctrl_info *ctrl_info) | |
146 | { | |
147 | if (ctrl_info->controller_online) | |
148 | if (!sis_is_firmware_running(ctrl_info)) | |
149 | pqi_take_ctrl_offline(ctrl_info); | |
150 | } | |
151 | ||
152 | static inline bool pqi_is_hba_lunid(u8 *scsi3addr) | |
153 | { | |
154 | return pqi_scsi3addr_equal(scsi3addr, RAID_CTLR_LUNID); | |
155 | } | |
156 | ||
ff6abb73 KB |
157 | static inline enum pqi_ctrl_mode pqi_get_ctrl_mode( |
158 | struct pqi_ctrl_info *ctrl_info) | |
159 | { | |
160 | return sis_read_driver_scratch(ctrl_info); | |
161 | } | |
162 | ||
163 | static inline void pqi_save_ctrl_mode(struct pqi_ctrl_info *ctrl_info, | |
164 | enum pqi_ctrl_mode mode) | |
165 | { | |
166 | sis_write_driver_scratch(ctrl_info, mode); | |
167 | } | |
168 | ||
6c223761 KB |
169 | #define PQI_RESCAN_WORK_INTERVAL (10 * HZ) |
170 | ||
171 | static inline void pqi_schedule_rescan_worker(struct pqi_ctrl_info *ctrl_info) | |
172 | { | |
173 | schedule_delayed_work(&ctrl_info->rescan_work, | |
174 | PQI_RESCAN_WORK_INTERVAL); | |
175 | } | |
176 | ||
177 | static int pqi_map_single(struct pci_dev *pci_dev, | |
178 | struct pqi_sg_descriptor *sg_descriptor, void *buffer, | |
179 | size_t buffer_length, int data_direction) | |
180 | { | |
181 | dma_addr_t bus_address; | |
182 | ||
183 | if (!buffer || buffer_length == 0 || data_direction == PCI_DMA_NONE) | |
184 | return 0; | |
185 | ||
186 | bus_address = pci_map_single(pci_dev, buffer, buffer_length, | |
187 | data_direction); | |
188 | if (pci_dma_mapping_error(pci_dev, bus_address)) | |
189 | return -ENOMEM; | |
190 | ||
191 | put_unaligned_le64((u64)bus_address, &sg_descriptor->address); | |
192 | put_unaligned_le32(buffer_length, &sg_descriptor->length); | |
193 | put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags); | |
194 | ||
195 | return 0; | |
196 | } | |
197 | ||
198 | static void pqi_pci_unmap(struct pci_dev *pci_dev, | |
199 | struct pqi_sg_descriptor *descriptors, int num_descriptors, | |
200 | int data_direction) | |
201 | { | |
202 | int i; | |
203 | ||
204 | if (data_direction == PCI_DMA_NONE) | |
205 | return; | |
206 | ||
207 | for (i = 0; i < num_descriptors; i++) | |
208 | pci_unmap_single(pci_dev, | |
209 | (dma_addr_t)get_unaligned_le64(&descriptors[i].address), | |
210 | get_unaligned_le32(&descriptors[i].length), | |
211 | data_direction); | |
212 | } | |
213 | ||
214 | static int pqi_build_raid_path_request(struct pqi_ctrl_info *ctrl_info, | |
215 | struct pqi_raid_path_request *request, u8 cmd, | |
216 | u8 *scsi3addr, void *buffer, size_t buffer_length, | |
217 | u16 vpd_page, int *pci_direction) | |
218 | { | |
219 | u8 *cdb; | |
220 | int pci_dir; | |
221 | ||
222 | memset(request, 0, sizeof(*request)); | |
223 | ||
224 | request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO; | |
225 | put_unaligned_le16(offsetof(struct pqi_raid_path_request, | |
226 | sg_descriptors[1]) - PQI_REQUEST_HEADER_LENGTH, | |
227 | &request->header.iu_length); | |
228 | put_unaligned_le32(buffer_length, &request->buffer_length); | |
229 | memcpy(request->lun_number, scsi3addr, sizeof(request->lun_number)); | |
230 | request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; | |
231 | request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0; | |
232 | ||
233 | cdb = request->cdb; | |
234 | ||
235 | switch (cmd) { | |
236 | case INQUIRY: | |
237 | request->data_direction = SOP_READ_FLAG; | |
238 | cdb[0] = INQUIRY; | |
239 | if (vpd_page & VPD_PAGE) { | |
240 | cdb[1] = 0x1; | |
241 | cdb[2] = (u8)vpd_page; | |
242 | } | |
243 | cdb[4] = (u8)buffer_length; | |
244 | break; | |
245 | case CISS_REPORT_LOG: | |
246 | case CISS_REPORT_PHYS: | |
247 | request->data_direction = SOP_READ_FLAG; | |
248 | cdb[0] = cmd; | |
249 | if (cmd == CISS_REPORT_PHYS) | |
250 | cdb[1] = CISS_REPORT_PHYS_EXTENDED; | |
251 | else | |
252 | cdb[1] = CISS_REPORT_LOG_EXTENDED; | |
253 | put_unaligned_be32(buffer_length, &cdb[6]); | |
254 | break; | |
255 | case CISS_GET_RAID_MAP: | |
256 | request->data_direction = SOP_READ_FLAG; | |
257 | cdb[0] = CISS_READ; | |
258 | cdb[1] = CISS_GET_RAID_MAP; | |
259 | put_unaligned_be32(buffer_length, &cdb[6]); | |
260 | break; | |
261 | case SA_CACHE_FLUSH: | |
262 | request->data_direction = SOP_WRITE_FLAG; | |
263 | cdb[0] = BMIC_WRITE; | |
264 | cdb[6] = BMIC_CACHE_FLUSH; | |
265 | put_unaligned_be16(buffer_length, &cdb[7]); | |
266 | break; | |
267 | case BMIC_IDENTIFY_CONTROLLER: | |
268 | case BMIC_IDENTIFY_PHYSICAL_DEVICE: | |
269 | request->data_direction = SOP_READ_FLAG; | |
270 | cdb[0] = BMIC_READ; | |
271 | cdb[6] = cmd; | |
272 | put_unaligned_be16(buffer_length, &cdb[7]); | |
273 | break; | |
274 | case BMIC_WRITE_HOST_WELLNESS: | |
275 | request->data_direction = SOP_WRITE_FLAG; | |
276 | cdb[0] = BMIC_WRITE; | |
277 | cdb[6] = cmd; | |
278 | put_unaligned_be16(buffer_length, &cdb[7]); | |
279 | break; | |
280 | default: | |
281 | dev_err(&ctrl_info->pci_dev->dev, "unknown command 0x%c\n", | |
282 | cmd); | |
283 | WARN_ON(cmd); | |
284 | break; | |
285 | } | |
286 | ||
287 | switch (request->data_direction) { | |
288 | case SOP_READ_FLAG: | |
289 | pci_dir = PCI_DMA_FROMDEVICE; | |
290 | break; | |
291 | case SOP_WRITE_FLAG: | |
292 | pci_dir = PCI_DMA_TODEVICE; | |
293 | break; | |
294 | case SOP_NO_DIRECTION_FLAG: | |
295 | pci_dir = PCI_DMA_NONE; | |
296 | break; | |
297 | default: | |
298 | pci_dir = PCI_DMA_BIDIRECTIONAL; | |
299 | break; | |
300 | } | |
301 | ||
302 | *pci_direction = pci_dir; | |
303 | ||
304 | return pqi_map_single(ctrl_info->pci_dev, &request->sg_descriptors[0], | |
305 | buffer, buffer_length, pci_dir); | |
306 | } | |
307 | ||
308 | static struct pqi_io_request *pqi_alloc_io_request( | |
309 | struct pqi_ctrl_info *ctrl_info) | |
310 | { | |
311 | struct pqi_io_request *io_request; | |
312 | u16 i = ctrl_info->next_io_request_slot; /* benignly racy */ | |
313 | ||
314 | while (1) { | |
315 | io_request = &ctrl_info->io_request_pool[i]; | |
316 | if (atomic_inc_return(&io_request->refcount) == 1) | |
317 | break; | |
318 | atomic_dec(&io_request->refcount); | |
319 | i = (i + 1) % ctrl_info->max_io_slots; | |
320 | } | |
321 | ||
322 | /* benignly racy */ | |
323 | ctrl_info->next_io_request_slot = (i + 1) % ctrl_info->max_io_slots; | |
324 | ||
325 | io_request->scmd = NULL; | |
326 | io_request->status = 0; | |
327 | io_request->error_info = NULL; | |
328 | ||
329 | return io_request; | |
330 | } | |
331 | ||
332 | static void pqi_free_io_request(struct pqi_io_request *io_request) | |
333 | { | |
334 | atomic_dec(&io_request->refcount); | |
335 | } | |
336 | ||
337 | static int pqi_identify_controller(struct pqi_ctrl_info *ctrl_info, | |
338 | struct bmic_identify_controller *buffer) | |
339 | { | |
340 | int rc; | |
341 | int pci_direction; | |
342 | struct pqi_raid_path_request request; | |
343 | ||
344 | rc = pqi_build_raid_path_request(ctrl_info, &request, | |
345 | BMIC_IDENTIFY_CONTROLLER, RAID_CTLR_LUNID, buffer, | |
346 | sizeof(*buffer), 0, &pci_direction); | |
347 | if (rc) | |
348 | return rc; | |
349 | ||
350 | rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, | |
351 | NULL, NO_TIMEOUT); | |
352 | ||
353 | pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, | |
354 | pci_direction); | |
355 | ||
356 | return rc; | |
357 | } | |
358 | ||
359 | static int pqi_scsi_inquiry(struct pqi_ctrl_info *ctrl_info, | |
360 | u8 *scsi3addr, u16 vpd_page, void *buffer, size_t buffer_length) | |
361 | { | |
362 | int rc; | |
363 | int pci_direction; | |
364 | struct pqi_raid_path_request request; | |
365 | ||
366 | rc = pqi_build_raid_path_request(ctrl_info, &request, | |
367 | INQUIRY, scsi3addr, buffer, buffer_length, vpd_page, | |
368 | &pci_direction); | |
369 | if (rc) | |
370 | return rc; | |
371 | ||
372 | rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, | |
373 | NULL, NO_TIMEOUT); | |
374 | ||
375 | pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, | |
376 | pci_direction); | |
377 | ||
378 | return rc; | |
379 | } | |
380 | ||
381 | static int pqi_identify_physical_device(struct pqi_ctrl_info *ctrl_info, | |
382 | struct pqi_scsi_dev *device, | |
383 | struct bmic_identify_physical_device *buffer, | |
384 | size_t buffer_length) | |
385 | { | |
386 | int rc; | |
387 | int pci_direction; | |
388 | u16 bmic_device_index; | |
389 | struct pqi_raid_path_request request; | |
390 | ||
391 | rc = pqi_build_raid_path_request(ctrl_info, &request, | |
392 | BMIC_IDENTIFY_PHYSICAL_DEVICE, RAID_CTLR_LUNID, buffer, | |
393 | buffer_length, 0, &pci_direction); | |
394 | if (rc) | |
395 | return rc; | |
396 | ||
397 | bmic_device_index = CISS_GET_DRIVE_NUMBER(device->scsi3addr); | |
398 | request.cdb[2] = (u8)bmic_device_index; | |
399 | request.cdb[9] = (u8)(bmic_device_index >> 8); | |
400 | ||
401 | rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, | |
402 | 0, NULL, NO_TIMEOUT); | |
403 | ||
404 | pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, | |
405 | pci_direction); | |
406 | ||
407 | return rc; | |
408 | } | |
409 | ||
410 | #define SA_CACHE_FLUSH_BUFFER_LENGTH 4 | |
6c223761 KB |
411 | |
412 | static int pqi_flush_cache(struct pqi_ctrl_info *ctrl_info) | |
413 | { | |
414 | int rc; | |
415 | struct pqi_raid_path_request request; | |
416 | int pci_direction; | |
417 | u8 *buffer; | |
418 | ||
419 | /* | |
420 | * Don't bother trying to flush the cache if the controller is | |
421 | * locked up. | |
422 | */ | |
423 | if (pqi_ctrl_offline(ctrl_info)) | |
424 | return -ENXIO; | |
425 | ||
426 | buffer = kzalloc(SA_CACHE_FLUSH_BUFFER_LENGTH, GFP_KERNEL); | |
427 | if (!buffer) | |
428 | return -ENOMEM; | |
429 | ||
430 | rc = pqi_build_raid_path_request(ctrl_info, &request, | |
431 | SA_CACHE_FLUSH, RAID_CTLR_LUNID, buffer, | |
432 | SA_CACHE_FLUSH_BUFFER_LENGTH, 0, &pci_direction); | |
433 | if (rc) | |
434 | goto out; | |
435 | ||
436 | rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, | |
d48f8fad | 437 | 0, NULL, NO_TIMEOUT); |
6c223761 KB |
438 | |
439 | pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, | |
440 | pci_direction); | |
441 | ||
442 | out: | |
443 | kfree(buffer); | |
444 | ||
445 | return rc; | |
446 | } | |
447 | ||
448 | static int pqi_write_host_wellness(struct pqi_ctrl_info *ctrl_info, | |
449 | void *buffer, size_t buffer_length) | |
450 | { | |
451 | int rc; | |
452 | struct pqi_raid_path_request request; | |
453 | int pci_direction; | |
454 | ||
455 | rc = pqi_build_raid_path_request(ctrl_info, &request, | |
456 | BMIC_WRITE_HOST_WELLNESS, RAID_CTLR_LUNID, buffer, | |
457 | buffer_length, 0, &pci_direction); | |
458 | if (rc) | |
459 | return rc; | |
460 | ||
461 | rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, | |
462 | 0, NULL, NO_TIMEOUT); | |
463 | ||
464 | pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, | |
465 | pci_direction); | |
466 | ||
467 | return rc; | |
468 | } | |
469 | ||
470 | #pragma pack(1) | |
471 | ||
472 | struct bmic_host_wellness_driver_version { | |
473 | u8 start_tag[4]; | |
474 | u8 driver_version_tag[2]; | |
475 | __le16 driver_version_length; | |
476 | char driver_version[32]; | |
477 | u8 end_tag[2]; | |
478 | }; | |
479 | ||
480 | #pragma pack() | |
481 | ||
482 | static int pqi_write_driver_version_to_host_wellness( | |
483 | struct pqi_ctrl_info *ctrl_info) | |
484 | { | |
485 | int rc; | |
486 | struct bmic_host_wellness_driver_version *buffer; | |
487 | size_t buffer_length; | |
488 | ||
489 | buffer_length = sizeof(*buffer); | |
490 | ||
491 | buffer = kmalloc(buffer_length, GFP_KERNEL); | |
492 | if (!buffer) | |
493 | return -ENOMEM; | |
494 | ||
495 | buffer->start_tag[0] = '<'; | |
496 | buffer->start_tag[1] = 'H'; | |
497 | buffer->start_tag[2] = 'W'; | |
498 | buffer->start_tag[3] = '>'; | |
499 | buffer->driver_version_tag[0] = 'D'; | |
500 | buffer->driver_version_tag[1] = 'V'; | |
501 | put_unaligned_le16(sizeof(buffer->driver_version), | |
502 | &buffer->driver_version_length); | |
503 | strncpy(buffer->driver_version, DRIVER_VERSION, | |
504 | sizeof(buffer->driver_version) - 1); | |
505 | buffer->driver_version[sizeof(buffer->driver_version) - 1] = '\0'; | |
506 | buffer->end_tag[0] = 'Z'; | |
507 | buffer->end_tag[1] = 'Z'; | |
508 | ||
509 | rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length); | |
510 | ||
511 | kfree(buffer); | |
512 | ||
513 | return rc; | |
514 | } | |
515 | ||
516 | #pragma pack(1) | |
517 | ||
518 | struct bmic_host_wellness_time { | |
519 | u8 start_tag[4]; | |
520 | u8 time_tag[2]; | |
521 | __le16 time_length; | |
522 | u8 time[8]; | |
523 | u8 dont_write_tag[2]; | |
524 | u8 end_tag[2]; | |
525 | }; | |
526 | ||
527 | #pragma pack() | |
528 | ||
529 | static int pqi_write_current_time_to_host_wellness( | |
530 | struct pqi_ctrl_info *ctrl_info) | |
531 | { | |
532 | int rc; | |
533 | struct bmic_host_wellness_time *buffer; | |
534 | size_t buffer_length; | |
535 | time64_t local_time; | |
536 | unsigned int year; | |
ed10858e | 537 | struct tm tm; |
6c223761 KB |
538 | |
539 | buffer_length = sizeof(*buffer); | |
540 | ||
541 | buffer = kmalloc(buffer_length, GFP_KERNEL); | |
542 | if (!buffer) | |
543 | return -ENOMEM; | |
544 | ||
545 | buffer->start_tag[0] = '<'; | |
546 | buffer->start_tag[1] = 'H'; | |
547 | buffer->start_tag[2] = 'W'; | |
548 | buffer->start_tag[3] = '>'; | |
549 | buffer->time_tag[0] = 'T'; | |
550 | buffer->time_tag[1] = 'D'; | |
551 | put_unaligned_le16(sizeof(buffer->time), | |
552 | &buffer->time_length); | |
553 | ||
ed10858e AB |
554 | local_time = ktime_get_real_seconds(); |
555 | time64_to_tm(local_time, -sys_tz.tz_minuteswest * 60, &tm); | |
6c223761 KB |
556 | year = tm.tm_year + 1900; |
557 | ||
558 | buffer->time[0] = bin2bcd(tm.tm_hour); | |
559 | buffer->time[1] = bin2bcd(tm.tm_min); | |
560 | buffer->time[2] = bin2bcd(tm.tm_sec); | |
561 | buffer->time[3] = 0; | |
562 | buffer->time[4] = bin2bcd(tm.tm_mon + 1); | |
563 | buffer->time[5] = bin2bcd(tm.tm_mday); | |
564 | buffer->time[6] = bin2bcd(year / 100); | |
565 | buffer->time[7] = bin2bcd(year % 100); | |
566 | ||
567 | buffer->dont_write_tag[0] = 'D'; | |
568 | buffer->dont_write_tag[1] = 'W'; | |
569 | buffer->end_tag[0] = 'Z'; | |
570 | buffer->end_tag[1] = 'Z'; | |
571 | ||
572 | rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length); | |
573 | ||
574 | kfree(buffer); | |
575 | ||
576 | return rc; | |
577 | } | |
578 | ||
579 | #define PQI_UPDATE_TIME_WORK_INTERVAL (24UL * 60 * 60 * HZ) | |
580 | ||
581 | static void pqi_update_time_worker(struct work_struct *work) | |
582 | { | |
583 | int rc; | |
584 | struct pqi_ctrl_info *ctrl_info; | |
585 | ||
586 | ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info, | |
587 | update_time_work); | |
588 | ||
6c223761 KB |
589 | rc = pqi_write_current_time_to_host_wellness(ctrl_info); |
590 | if (rc) | |
591 | dev_warn(&ctrl_info->pci_dev->dev, | |
592 | "error updating time on controller\n"); | |
593 | ||
594 | schedule_delayed_work(&ctrl_info->update_time_work, | |
595 | PQI_UPDATE_TIME_WORK_INTERVAL); | |
596 | } | |
597 | ||
598 | static inline void pqi_schedule_update_time_worker( | |
4fbebf1a | 599 | struct pqi_ctrl_info *ctrl_info) |
6c223761 | 600 | { |
4fbebf1a | 601 | schedule_delayed_work(&ctrl_info->update_time_work, 0); |
6c223761 KB |
602 | } |
603 | ||
604 | static int pqi_report_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd, | |
605 | void *buffer, size_t buffer_length) | |
606 | { | |
607 | int rc; | |
608 | int pci_direction; | |
609 | struct pqi_raid_path_request request; | |
610 | ||
611 | rc = pqi_build_raid_path_request(ctrl_info, &request, | |
612 | cmd, RAID_CTLR_LUNID, buffer, buffer_length, 0, &pci_direction); | |
613 | if (rc) | |
614 | return rc; | |
615 | ||
616 | rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, | |
617 | NULL, NO_TIMEOUT); | |
618 | ||
619 | pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, | |
620 | pci_direction); | |
621 | ||
622 | return rc; | |
623 | } | |
624 | ||
625 | static int pqi_report_phys_logical_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd, | |
626 | void **buffer) | |
627 | { | |
628 | int rc; | |
629 | size_t lun_list_length; | |
630 | size_t lun_data_length; | |
631 | size_t new_lun_list_length; | |
632 | void *lun_data = NULL; | |
633 | struct report_lun_header *report_lun_header; | |
634 | ||
635 | report_lun_header = kmalloc(sizeof(*report_lun_header), GFP_KERNEL); | |
636 | if (!report_lun_header) { | |
637 | rc = -ENOMEM; | |
638 | goto out; | |
639 | } | |
640 | ||
641 | rc = pqi_report_luns(ctrl_info, cmd, report_lun_header, | |
642 | sizeof(*report_lun_header)); | |
643 | if (rc) | |
644 | goto out; | |
645 | ||
646 | lun_list_length = get_unaligned_be32(&report_lun_header->list_length); | |
647 | ||
648 | again: | |
649 | lun_data_length = sizeof(struct report_lun_header) + lun_list_length; | |
650 | ||
651 | lun_data = kmalloc(lun_data_length, GFP_KERNEL); | |
652 | if (!lun_data) { | |
653 | rc = -ENOMEM; | |
654 | goto out; | |
655 | } | |
656 | ||
657 | if (lun_list_length == 0) { | |
658 | memcpy(lun_data, report_lun_header, sizeof(*report_lun_header)); | |
659 | goto out; | |
660 | } | |
661 | ||
662 | rc = pqi_report_luns(ctrl_info, cmd, lun_data, lun_data_length); | |
663 | if (rc) | |
664 | goto out; | |
665 | ||
666 | new_lun_list_length = get_unaligned_be32( | |
667 | &((struct report_lun_header *)lun_data)->list_length); | |
668 | ||
669 | if (new_lun_list_length > lun_list_length) { | |
670 | lun_list_length = new_lun_list_length; | |
671 | kfree(lun_data); | |
672 | goto again; | |
673 | } | |
674 | ||
675 | out: | |
676 | kfree(report_lun_header); | |
677 | ||
678 | if (rc) { | |
679 | kfree(lun_data); | |
680 | lun_data = NULL; | |
681 | } | |
682 | ||
683 | *buffer = lun_data; | |
684 | ||
685 | return rc; | |
686 | } | |
687 | ||
688 | static inline int pqi_report_phys_luns(struct pqi_ctrl_info *ctrl_info, | |
689 | void **buffer) | |
690 | { | |
691 | return pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_PHYS, | |
692 | buffer); | |
693 | } | |
694 | ||
695 | static inline int pqi_report_logical_luns(struct pqi_ctrl_info *ctrl_info, | |
696 | void **buffer) | |
697 | { | |
698 | return pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_LOG, buffer); | |
699 | } | |
700 | ||
701 | static int pqi_get_device_lists(struct pqi_ctrl_info *ctrl_info, | |
702 | struct report_phys_lun_extended **physdev_list, | |
703 | struct report_log_lun_extended **logdev_list) | |
704 | { | |
705 | int rc; | |
706 | size_t logdev_list_length; | |
707 | size_t logdev_data_length; | |
708 | struct report_log_lun_extended *internal_logdev_list; | |
709 | struct report_log_lun_extended *logdev_data; | |
710 | struct report_lun_header report_lun_header; | |
711 | ||
712 | rc = pqi_report_phys_luns(ctrl_info, (void **)physdev_list); | |
713 | if (rc) | |
714 | dev_err(&ctrl_info->pci_dev->dev, | |
715 | "report physical LUNs failed\n"); | |
716 | ||
717 | rc = pqi_report_logical_luns(ctrl_info, (void **)logdev_list); | |
718 | if (rc) | |
719 | dev_err(&ctrl_info->pci_dev->dev, | |
720 | "report logical LUNs failed\n"); | |
721 | ||
722 | /* | |
723 | * Tack the controller itself onto the end of the logical device list. | |
724 | */ | |
725 | ||
726 | logdev_data = *logdev_list; | |
727 | ||
728 | if (logdev_data) { | |
729 | logdev_list_length = | |
730 | get_unaligned_be32(&logdev_data->header.list_length); | |
731 | } else { | |
732 | memset(&report_lun_header, 0, sizeof(report_lun_header)); | |
733 | logdev_data = | |
734 | (struct report_log_lun_extended *)&report_lun_header; | |
735 | logdev_list_length = 0; | |
736 | } | |
737 | ||
738 | logdev_data_length = sizeof(struct report_lun_header) + | |
739 | logdev_list_length; | |
740 | ||
741 | internal_logdev_list = kmalloc(logdev_data_length + | |
742 | sizeof(struct report_log_lun_extended), GFP_KERNEL); | |
743 | if (!internal_logdev_list) { | |
744 | kfree(*logdev_list); | |
745 | *logdev_list = NULL; | |
746 | return -ENOMEM; | |
747 | } | |
748 | ||
749 | memcpy(internal_logdev_list, logdev_data, logdev_data_length); | |
750 | memset((u8 *)internal_logdev_list + logdev_data_length, 0, | |
751 | sizeof(struct report_log_lun_extended_entry)); | |
752 | put_unaligned_be32(logdev_list_length + | |
753 | sizeof(struct report_log_lun_extended_entry), | |
754 | &internal_logdev_list->header.list_length); | |
755 | ||
756 | kfree(*logdev_list); | |
757 | *logdev_list = internal_logdev_list; | |
758 | ||
759 | return 0; | |
760 | } | |
761 | ||
762 | static inline void pqi_set_bus_target_lun(struct pqi_scsi_dev *device, | |
763 | int bus, int target, int lun) | |
764 | { | |
765 | device->bus = bus; | |
766 | device->target = target; | |
767 | device->lun = lun; | |
768 | } | |
769 | ||
770 | static void pqi_assign_bus_target_lun(struct pqi_scsi_dev *device) | |
771 | { | |
772 | u8 *scsi3addr; | |
773 | u32 lunid; | |
774 | ||
775 | scsi3addr = device->scsi3addr; | |
776 | lunid = get_unaligned_le32(scsi3addr); | |
777 | ||
778 | if (pqi_is_hba_lunid(scsi3addr)) { | |
779 | /* The specified device is the controller. */ | |
780 | pqi_set_bus_target_lun(device, PQI_HBA_BUS, 0, lunid & 0x3fff); | |
781 | device->target_lun_valid = true; | |
782 | return; | |
783 | } | |
784 | ||
785 | if (pqi_is_logical_device(device)) { | |
786 | pqi_set_bus_target_lun(device, PQI_RAID_VOLUME_BUS, 0, | |
787 | lunid & 0x3fff); | |
788 | device->target_lun_valid = true; | |
789 | return; | |
790 | } | |
791 | ||
792 | /* | |
793 | * Defer target and LUN assignment for non-controller physical devices | |
794 | * because the SAS transport layer will make these assignments later. | |
795 | */ | |
796 | pqi_set_bus_target_lun(device, PQI_PHYSICAL_DEVICE_BUS, 0, 0); | |
797 | } | |
798 | ||
799 | static void pqi_get_raid_level(struct pqi_ctrl_info *ctrl_info, | |
800 | struct pqi_scsi_dev *device) | |
801 | { | |
802 | int rc; | |
803 | u8 raid_level; | |
804 | u8 *buffer; | |
805 | ||
806 | raid_level = SA_RAID_UNKNOWN; | |
807 | ||
808 | buffer = kmalloc(64, GFP_KERNEL); | |
809 | if (buffer) { | |
810 | rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, | |
811 | VPD_PAGE | CISS_VPD_LV_DEVICE_GEOMETRY, buffer, 64); | |
812 | if (rc == 0) { | |
813 | raid_level = buffer[8]; | |
814 | if (raid_level > SA_RAID_MAX) | |
815 | raid_level = SA_RAID_UNKNOWN; | |
816 | } | |
817 | kfree(buffer); | |
818 | } | |
819 | ||
820 | device->raid_level = raid_level; | |
821 | } | |
822 | ||
823 | static int pqi_validate_raid_map(struct pqi_ctrl_info *ctrl_info, | |
824 | struct pqi_scsi_dev *device, struct raid_map *raid_map) | |
825 | { | |
826 | char *err_msg; | |
827 | u32 raid_map_size; | |
828 | u32 r5or6_blocks_per_row; | |
829 | unsigned int num_phys_disks; | |
830 | unsigned int num_raid_map_entries; | |
831 | ||
832 | raid_map_size = get_unaligned_le32(&raid_map->structure_size); | |
833 | ||
834 | if (raid_map_size < offsetof(struct raid_map, disk_data)) { | |
835 | err_msg = "RAID map too small"; | |
836 | goto bad_raid_map; | |
837 | } | |
838 | ||
839 | if (raid_map_size > sizeof(*raid_map)) { | |
840 | err_msg = "RAID map too large"; | |
841 | goto bad_raid_map; | |
842 | } | |
843 | ||
844 | num_phys_disks = get_unaligned_le16(&raid_map->layout_map_count) * | |
845 | (get_unaligned_le16(&raid_map->data_disks_per_row) + | |
846 | get_unaligned_le16(&raid_map->metadata_disks_per_row)); | |
847 | num_raid_map_entries = num_phys_disks * | |
848 | get_unaligned_le16(&raid_map->row_cnt); | |
849 | ||
850 | if (num_raid_map_entries > RAID_MAP_MAX_ENTRIES) { | |
851 | err_msg = "invalid number of map entries in RAID map"; | |
852 | goto bad_raid_map; | |
853 | } | |
854 | ||
855 | if (device->raid_level == SA_RAID_1) { | |
856 | if (get_unaligned_le16(&raid_map->layout_map_count) != 2) { | |
857 | err_msg = "invalid RAID-1 map"; | |
858 | goto bad_raid_map; | |
859 | } | |
860 | } else if (device->raid_level == SA_RAID_ADM) { | |
861 | if (get_unaligned_le16(&raid_map->layout_map_count) != 3) { | |
862 | err_msg = "invalid RAID-1(ADM) map"; | |
863 | goto bad_raid_map; | |
864 | } | |
865 | } else if ((device->raid_level == SA_RAID_5 || | |
866 | device->raid_level == SA_RAID_6) && | |
867 | get_unaligned_le16(&raid_map->layout_map_count) > 1) { | |
868 | /* RAID 50/60 */ | |
869 | r5or6_blocks_per_row = | |
870 | get_unaligned_le16(&raid_map->strip_size) * | |
871 | get_unaligned_le16(&raid_map->data_disks_per_row); | |
872 | if (r5or6_blocks_per_row == 0) { | |
873 | err_msg = "invalid RAID-5 or RAID-6 map"; | |
874 | goto bad_raid_map; | |
875 | } | |
876 | } | |
877 | ||
878 | return 0; | |
879 | ||
880 | bad_raid_map: | |
881 | dev_warn(&ctrl_info->pci_dev->dev, "%s\n", err_msg); | |
882 | ||
883 | return -EINVAL; | |
884 | } | |
885 | ||
886 | static int pqi_get_raid_map(struct pqi_ctrl_info *ctrl_info, | |
887 | struct pqi_scsi_dev *device) | |
888 | { | |
889 | int rc; | |
890 | int pci_direction; | |
891 | struct pqi_raid_path_request request; | |
892 | struct raid_map *raid_map; | |
893 | ||
894 | raid_map = kmalloc(sizeof(*raid_map), GFP_KERNEL); | |
895 | if (!raid_map) | |
896 | return -ENOMEM; | |
897 | ||
898 | rc = pqi_build_raid_path_request(ctrl_info, &request, | |
899 | CISS_GET_RAID_MAP, device->scsi3addr, raid_map, | |
900 | sizeof(*raid_map), 0, &pci_direction); | |
901 | if (rc) | |
902 | goto error; | |
903 | ||
904 | rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, | |
905 | NULL, NO_TIMEOUT); | |
906 | ||
907 | pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, | |
908 | pci_direction); | |
909 | ||
910 | if (rc) | |
911 | goto error; | |
912 | ||
913 | rc = pqi_validate_raid_map(ctrl_info, device, raid_map); | |
914 | if (rc) | |
915 | goto error; | |
916 | ||
917 | device->raid_map = raid_map; | |
918 | ||
919 | return 0; | |
920 | ||
921 | error: | |
922 | kfree(raid_map); | |
923 | ||
924 | return rc; | |
925 | } | |
926 | ||
927 | static void pqi_get_offload_status(struct pqi_ctrl_info *ctrl_info, | |
928 | struct pqi_scsi_dev *device) | |
929 | { | |
930 | int rc; | |
931 | u8 *buffer; | |
932 | u8 offload_status; | |
933 | ||
934 | buffer = kmalloc(64, GFP_KERNEL); | |
935 | if (!buffer) | |
936 | return; | |
937 | ||
938 | rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, | |
939 | VPD_PAGE | CISS_VPD_LV_OFFLOAD_STATUS, buffer, 64); | |
940 | if (rc) | |
941 | goto out; | |
942 | ||
943 | #define OFFLOAD_STATUS_BYTE 4 | |
944 | #define OFFLOAD_CONFIGURED_BIT 0x1 | |
945 | #define OFFLOAD_ENABLED_BIT 0x2 | |
946 | ||
947 | offload_status = buffer[OFFLOAD_STATUS_BYTE]; | |
948 | device->offload_configured = | |
949 | !!(offload_status & OFFLOAD_CONFIGURED_BIT); | |
950 | if (device->offload_configured) { | |
951 | device->offload_enabled_pending = | |
952 | !!(offload_status & OFFLOAD_ENABLED_BIT); | |
953 | if (pqi_get_raid_map(ctrl_info, device)) | |
954 | device->offload_enabled_pending = false; | |
955 | } | |
956 | ||
957 | out: | |
958 | kfree(buffer); | |
959 | } | |
960 | ||
961 | /* | |
962 | * Use vendor-specific VPD to determine online/offline status of a volume. | |
963 | */ | |
964 | ||
965 | static void pqi_get_volume_status(struct pqi_ctrl_info *ctrl_info, | |
966 | struct pqi_scsi_dev *device) | |
967 | { | |
968 | int rc; | |
969 | size_t page_length; | |
970 | u8 volume_status = CISS_LV_STATUS_UNAVAILABLE; | |
971 | bool volume_offline = true; | |
972 | u32 volume_flags; | |
973 | struct ciss_vpd_logical_volume_status *vpd; | |
974 | ||
975 | vpd = kmalloc(sizeof(*vpd), GFP_KERNEL); | |
976 | if (!vpd) | |
977 | goto no_buffer; | |
978 | ||
979 | rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, | |
980 | VPD_PAGE | CISS_VPD_LV_STATUS, vpd, sizeof(*vpd)); | |
981 | if (rc) | |
982 | goto out; | |
983 | ||
984 | page_length = offsetof(struct ciss_vpd_logical_volume_status, | |
985 | volume_status) + vpd->page_length; | |
986 | if (page_length < sizeof(*vpd)) | |
987 | goto out; | |
988 | ||
989 | volume_status = vpd->volume_status; | |
990 | volume_flags = get_unaligned_be32(&vpd->flags); | |
991 | volume_offline = (volume_flags & CISS_LV_FLAGS_NO_HOST_IO) != 0; | |
992 | ||
993 | out: | |
994 | kfree(vpd); | |
995 | no_buffer: | |
996 | device->volume_status = volume_status; | |
997 | device->volume_offline = volume_offline; | |
998 | } | |
999 | ||
1000 | static int pqi_get_device_info(struct pqi_ctrl_info *ctrl_info, | |
1001 | struct pqi_scsi_dev *device) | |
1002 | { | |
1003 | int rc; | |
1004 | u8 *buffer; | |
1005 | ||
1006 | buffer = kmalloc(64, GFP_KERNEL); | |
1007 | if (!buffer) | |
1008 | return -ENOMEM; | |
1009 | ||
1010 | /* Send an inquiry to the device to see what it is. */ | |
1011 | rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 0, buffer, 64); | |
1012 | if (rc) | |
1013 | goto out; | |
1014 | ||
1015 | scsi_sanitize_inquiry_string(&buffer[8], 8); | |
1016 | scsi_sanitize_inquiry_string(&buffer[16], 16); | |
1017 | ||
1018 | device->devtype = buffer[0] & 0x1f; | |
1019 | memcpy(device->vendor, &buffer[8], | |
1020 | sizeof(device->vendor)); | |
1021 | memcpy(device->model, &buffer[16], | |
1022 | sizeof(device->model)); | |
1023 | ||
1024 | if (pqi_is_logical_device(device) && device->devtype == TYPE_DISK) { | |
1025 | pqi_get_raid_level(ctrl_info, device); | |
1026 | pqi_get_offload_status(ctrl_info, device); | |
1027 | pqi_get_volume_status(ctrl_info, device); | |
1028 | } | |
1029 | ||
1030 | out: | |
1031 | kfree(buffer); | |
1032 | ||
1033 | return rc; | |
1034 | } | |
1035 | ||
1036 | static void pqi_get_physical_disk_info(struct pqi_ctrl_info *ctrl_info, | |
1037 | struct pqi_scsi_dev *device, | |
1038 | struct bmic_identify_physical_device *id_phys) | |
1039 | { | |
1040 | int rc; | |
1041 | ||
1042 | memset(id_phys, 0, sizeof(*id_phys)); | |
1043 | ||
1044 | rc = pqi_identify_physical_device(ctrl_info, device, | |
1045 | id_phys, sizeof(*id_phys)); | |
1046 | if (rc) { | |
1047 | device->queue_depth = PQI_PHYSICAL_DISK_DEFAULT_MAX_QUEUE_DEPTH; | |
1048 | return; | |
1049 | } | |
1050 | ||
1051 | device->queue_depth = | |
1052 | get_unaligned_le16(&id_phys->current_queue_depth_limit); | |
1053 | device->device_type = id_phys->device_type; | |
1054 | device->active_path_index = id_phys->active_path_number; | |
1055 | device->path_map = id_phys->redundant_path_present_map; | |
1056 | memcpy(&device->box, | |
1057 | &id_phys->alternate_paths_phys_box_on_port, | |
1058 | sizeof(device->box)); | |
1059 | memcpy(&device->phys_connector, | |
1060 | &id_phys->alternate_paths_phys_connector, | |
1061 | sizeof(device->phys_connector)); | |
1062 | device->bay = id_phys->phys_bay_in_box; | |
1063 | } | |
1064 | ||
1065 | static void pqi_show_volume_status(struct pqi_ctrl_info *ctrl_info, | |
1066 | struct pqi_scsi_dev *device) | |
1067 | { | |
1068 | char *status; | |
1069 | static const char unknown_state_str[] = | |
1070 | "Volume is in an unknown state (%u)"; | |
1071 | char unknown_state_buffer[sizeof(unknown_state_str) + 10]; | |
1072 | ||
1073 | switch (device->volume_status) { | |
1074 | case CISS_LV_OK: | |
1075 | status = "Volume online"; | |
1076 | break; | |
1077 | case CISS_LV_FAILED: | |
1078 | status = "Volume failed"; | |
1079 | break; | |
1080 | case CISS_LV_NOT_CONFIGURED: | |
1081 | status = "Volume not configured"; | |
1082 | break; | |
1083 | case CISS_LV_DEGRADED: | |
1084 | status = "Volume degraded"; | |
1085 | break; | |
1086 | case CISS_LV_READY_FOR_RECOVERY: | |
1087 | status = "Volume ready for recovery operation"; | |
1088 | break; | |
1089 | case CISS_LV_UNDERGOING_RECOVERY: | |
1090 | status = "Volume undergoing recovery"; | |
1091 | break; | |
1092 | case CISS_LV_WRONG_PHYSICAL_DRIVE_REPLACED: | |
1093 | status = "Wrong physical drive was replaced"; | |
1094 | break; | |
1095 | case CISS_LV_PHYSICAL_DRIVE_CONNECTION_PROBLEM: | |
1096 | status = "A physical drive not properly connected"; | |
1097 | break; | |
1098 | case CISS_LV_HARDWARE_OVERHEATING: | |
1099 | status = "Hardware is overheating"; | |
1100 | break; | |
1101 | case CISS_LV_HARDWARE_HAS_OVERHEATED: | |
1102 | status = "Hardware has overheated"; | |
1103 | break; | |
1104 | case CISS_LV_UNDERGOING_EXPANSION: | |
1105 | status = "Volume undergoing expansion"; | |
1106 | break; | |
1107 | case CISS_LV_NOT_AVAILABLE: | |
1108 | status = "Volume waiting for transforming volume"; | |
1109 | break; | |
1110 | case CISS_LV_QUEUED_FOR_EXPANSION: | |
1111 | status = "Volume queued for expansion"; | |
1112 | break; | |
1113 | case CISS_LV_DISABLED_SCSI_ID_CONFLICT: | |
1114 | status = "Volume disabled due to SCSI ID conflict"; | |
1115 | break; | |
1116 | case CISS_LV_EJECTED: | |
1117 | status = "Volume has been ejected"; | |
1118 | break; | |
1119 | case CISS_LV_UNDERGOING_ERASE: | |
1120 | status = "Volume undergoing background erase"; | |
1121 | break; | |
1122 | case CISS_LV_READY_FOR_PREDICTIVE_SPARE_REBUILD: | |
1123 | status = "Volume ready for predictive spare rebuild"; | |
1124 | break; | |
1125 | case CISS_LV_UNDERGOING_RPI: | |
1126 | status = "Volume undergoing rapid parity initialization"; | |
1127 | break; | |
1128 | case CISS_LV_PENDING_RPI: | |
1129 | status = "Volume queued for rapid parity initialization"; | |
1130 | break; | |
1131 | case CISS_LV_ENCRYPTED_NO_KEY: | |
1132 | status = "Encrypted volume inaccessible - key not present"; | |
1133 | break; | |
1134 | case CISS_LV_UNDERGOING_ENCRYPTION: | |
1135 | status = "Volume undergoing encryption process"; | |
1136 | break; | |
1137 | case CISS_LV_UNDERGOING_ENCRYPTION_REKEYING: | |
1138 | status = "Volume undergoing encryption re-keying process"; | |
1139 | break; | |
1140 | case CISS_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: | |
1141 | status = | |
1142 | "Encrypted volume inaccessible - disabled on ctrl"; | |
1143 | break; | |
1144 | case CISS_LV_PENDING_ENCRYPTION: | |
1145 | status = "Volume pending migration to encrypted state"; | |
1146 | break; | |
1147 | case CISS_LV_PENDING_ENCRYPTION_REKEYING: | |
1148 | status = "Volume pending encryption rekeying"; | |
1149 | break; | |
1150 | case CISS_LV_NOT_SUPPORTED: | |
1151 | status = "Volume not supported on this controller"; | |
1152 | break; | |
1153 | case CISS_LV_STATUS_UNAVAILABLE: | |
1154 | status = "Volume status not available"; | |
1155 | break; | |
1156 | default: | |
1157 | snprintf(unknown_state_buffer, sizeof(unknown_state_buffer), | |
1158 | unknown_state_str, device->volume_status); | |
1159 | status = unknown_state_buffer; | |
1160 | break; | |
1161 | } | |
1162 | ||
1163 | dev_info(&ctrl_info->pci_dev->dev, | |
1164 | "scsi %d:%d:%d:%d %s\n", | |
1165 | ctrl_info->scsi_host->host_no, | |
1166 | device->bus, device->target, device->lun, status); | |
1167 | } | |
1168 | ||
1169 | static struct pqi_scsi_dev *pqi_find_disk_by_aio_handle( | |
1170 | struct pqi_ctrl_info *ctrl_info, u32 aio_handle) | |
1171 | { | |
1172 | struct pqi_scsi_dev *device; | |
1173 | ||
1174 | list_for_each_entry(device, &ctrl_info->scsi_device_list, | |
1175 | scsi_device_list_entry) { | |
1176 | if (device->devtype != TYPE_DISK && device->devtype != TYPE_ZBC) | |
1177 | continue; | |
1178 | if (pqi_is_logical_device(device)) | |
1179 | continue; | |
1180 | if (device->aio_handle == aio_handle) | |
1181 | return device; | |
1182 | } | |
1183 | ||
1184 | return NULL; | |
1185 | } | |
1186 | ||
1187 | static void pqi_update_logical_drive_queue_depth( | |
1188 | struct pqi_ctrl_info *ctrl_info, struct pqi_scsi_dev *logical_drive) | |
1189 | { | |
1190 | unsigned int i; | |
1191 | struct raid_map *raid_map; | |
1192 | struct raid_map_disk_data *disk_data; | |
1193 | struct pqi_scsi_dev *phys_disk; | |
1194 | unsigned int num_phys_disks; | |
1195 | unsigned int num_raid_map_entries; | |
1196 | unsigned int queue_depth; | |
1197 | ||
1198 | logical_drive->queue_depth = PQI_LOGICAL_DRIVE_DEFAULT_MAX_QUEUE_DEPTH; | |
1199 | ||
1200 | raid_map = logical_drive->raid_map; | |
1201 | if (!raid_map) | |
1202 | return; | |
1203 | ||
1204 | disk_data = raid_map->disk_data; | |
1205 | num_phys_disks = get_unaligned_le16(&raid_map->layout_map_count) * | |
1206 | (get_unaligned_le16(&raid_map->data_disks_per_row) + | |
1207 | get_unaligned_le16(&raid_map->metadata_disks_per_row)); | |
1208 | num_raid_map_entries = num_phys_disks * | |
1209 | get_unaligned_le16(&raid_map->row_cnt); | |
1210 | ||
1211 | queue_depth = 0; | |
1212 | for (i = 0; i < num_raid_map_entries; i++) { | |
1213 | phys_disk = pqi_find_disk_by_aio_handle(ctrl_info, | |
1214 | disk_data[i].aio_handle); | |
1215 | ||
1216 | if (!phys_disk) { | |
1217 | dev_warn(&ctrl_info->pci_dev->dev, | |
1218 | "failed to find physical disk for logical drive %016llx\n", | |
1219 | get_unaligned_be64(logical_drive->scsi3addr)); | |
1220 | logical_drive->offload_enabled = false; | |
1221 | logical_drive->offload_enabled_pending = false; | |
1222 | kfree(raid_map); | |
1223 | logical_drive->raid_map = NULL; | |
1224 | return; | |
1225 | } | |
1226 | ||
1227 | queue_depth += phys_disk->queue_depth; | |
1228 | } | |
1229 | ||
1230 | logical_drive->queue_depth = queue_depth; | |
1231 | } | |
1232 | ||
1233 | static void pqi_update_all_logical_drive_queue_depths( | |
1234 | struct pqi_ctrl_info *ctrl_info) | |
1235 | { | |
1236 | struct pqi_scsi_dev *device; | |
1237 | ||
1238 | list_for_each_entry(device, &ctrl_info->scsi_device_list, | |
1239 | scsi_device_list_entry) { | |
1240 | if (device->devtype != TYPE_DISK && device->devtype != TYPE_ZBC) | |
1241 | continue; | |
1242 | if (!pqi_is_logical_device(device)) | |
1243 | continue; | |
1244 | pqi_update_logical_drive_queue_depth(ctrl_info, device); | |
1245 | } | |
1246 | } | |
1247 | ||
1248 | static void pqi_rescan_worker(struct work_struct *work) | |
1249 | { | |
1250 | struct pqi_ctrl_info *ctrl_info; | |
1251 | ||
1252 | ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info, | |
1253 | rescan_work); | |
1254 | ||
1255 | pqi_scan_scsi_devices(ctrl_info); | |
1256 | } | |
1257 | ||
1258 | static int pqi_add_device(struct pqi_ctrl_info *ctrl_info, | |
1259 | struct pqi_scsi_dev *device) | |
1260 | { | |
1261 | int rc; | |
1262 | ||
1263 | if (pqi_is_logical_device(device)) | |
1264 | rc = scsi_add_device(ctrl_info->scsi_host, device->bus, | |
1265 | device->target, device->lun); | |
1266 | else | |
1267 | rc = pqi_add_sas_device(ctrl_info->sas_host, device); | |
1268 | ||
1269 | return rc; | |
1270 | } | |
1271 | ||
1272 | static inline void pqi_remove_device(struct pqi_ctrl_info *ctrl_info, | |
1273 | struct pqi_scsi_dev *device) | |
1274 | { | |
1275 | if (pqi_is_logical_device(device)) | |
1276 | scsi_remove_device(device->sdev); | |
1277 | else | |
1278 | pqi_remove_sas_device(device); | |
1279 | } | |
1280 | ||
1281 | /* Assumes the SCSI device list lock is held. */ | |
1282 | ||
1283 | static struct pqi_scsi_dev *pqi_find_scsi_dev(struct pqi_ctrl_info *ctrl_info, | |
1284 | int bus, int target, int lun) | |
1285 | { | |
1286 | struct pqi_scsi_dev *device; | |
1287 | ||
1288 | list_for_each_entry(device, &ctrl_info->scsi_device_list, | |
1289 | scsi_device_list_entry) | |
1290 | if (device->bus == bus && device->target == target && | |
1291 | device->lun == lun) | |
1292 | return device; | |
1293 | ||
1294 | return NULL; | |
1295 | } | |
1296 | ||
1297 | static inline bool pqi_device_equal(struct pqi_scsi_dev *dev1, | |
1298 | struct pqi_scsi_dev *dev2) | |
1299 | { | |
1300 | if (dev1->is_physical_device != dev2->is_physical_device) | |
1301 | return false; | |
1302 | ||
1303 | if (dev1->is_physical_device) | |
1304 | return dev1->wwid == dev2->wwid; | |
1305 | ||
1306 | return memcmp(dev1->volume_id, dev2->volume_id, | |
1307 | sizeof(dev1->volume_id)) == 0; | |
1308 | } | |
1309 | ||
1310 | enum pqi_find_result { | |
1311 | DEVICE_NOT_FOUND, | |
1312 | DEVICE_CHANGED, | |
1313 | DEVICE_SAME, | |
1314 | }; | |
1315 | ||
1316 | static enum pqi_find_result pqi_scsi_find_entry(struct pqi_ctrl_info *ctrl_info, | |
1317 | struct pqi_scsi_dev *device_to_find, | |
1318 | struct pqi_scsi_dev **matching_device) | |
1319 | { | |
1320 | struct pqi_scsi_dev *device; | |
1321 | ||
1322 | list_for_each_entry(device, &ctrl_info->scsi_device_list, | |
1323 | scsi_device_list_entry) { | |
1324 | if (pqi_scsi3addr_equal(device_to_find->scsi3addr, | |
1325 | device->scsi3addr)) { | |
1326 | *matching_device = device; | |
1327 | if (pqi_device_equal(device_to_find, device)) { | |
1328 | if (device_to_find->volume_offline) | |
1329 | return DEVICE_CHANGED; | |
1330 | return DEVICE_SAME; | |
1331 | } | |
1332 | return DEVICE_CHANGED; | |
1333 | } | |
1334 | } | |
1335 | ||
1336 | return DEVICE_NOT_FOUND; | |
1337 | } | |
1338 | ||
1339 | static void pqi_dev_info(struct pqi_ctrl_info *ctrl_info, | |
1340 | char *action, struct pqi_scsi_dev *device) | |
1341 | { | |
1342 | dev_info(&ctrl_info->pci_dev->dev, | |
1343 | "%s scsi %d:%d:%d:%d: %s %.8s %.16s %-12s SSDSmartPathCap%c En%c Exp%c qd=%d\n", | |
1344 | action, | |
1345 | ctrl_info->scsi_host->host_no, | |
1346 | device->bus, | |
1347 | device->target, | |
1348 | device->lun, | |
1349 | scsi_device_type(device->devtype), | |
1350 | device->vendor, | |
1351 | device->model, | |
1352 | pqi_raid_level_to_string(device->raid_level), | |
1353 | device->offload_configured ? '+' : '-', | |
1354 | device->offload_enabled_pending ? '+' : '-', | |
1355 | device->expose_device ? '+' : '-', | |
1356 | device->queue_depth); | |
1357 | } | |
1358 | ||
1359 | /* Assumes the SCSI device list lock is held. */ | |
1360 | ||
1361 | static void pqi_scsi_update_device(struct pqi_scsi_dev *existing_device, | |
1362 | struct pqi_scsi_dev *new_device) | |
1363 | { | |
1364 | existing_device->devtype = new_device->devtype; | |
1365 | existing_device->device_type = new_device->device_type; | |
1366 | existing_device->bus = new_device->bus; | |
1367 | if (new_device->target_lun_valid) { | |
1368 | existing_device->target = new_device->target; | |
1369 | existing_device->lun = new_device->lun; | |
1370 | existing_device->target_lun_valid = true; | |
1371 | } | |
1372 | ||
1373 | /* By definition, the scsi3addr and wwid fields are already the same. */ | |
1374 | ||
1375 | existing_device->is_physical_device = new_device->is_physical_device; | |
1376 | existing_device->expose_device = new_device->expose_device; | |
1377 | existing_device->no_uld_attach = new_device->no_uld_attach; | |
1378 | existing_device->aio_enabled = new_device->aio_enabled; | |
1379 | memcpy(existing_device->vendor, new_device->vendor, | |
1380 | sizeof(existing_device->vendor)); | |
1381 | memcpy(existing_device->model, new_device->model, | |
1382 | sizeof(existing_device->model)); | |
1383 | existing_device->sas_address = new_device->sas_address; | |
1384 | existing_device->raid_level = new_device->raid_level; | |
1385 | existing_device->queue_depth = new_device->queue_depth; | |
1386 | existing_device->aio_handle = new_device->aio_handle; | |
1387 | existing_device->volume_status = new_device->volume_status; | |
1388 | existing_device->active_path_index = new_device->active_path_index; | |
1389 | existing_device->path_map = new_device->path_map; | |
1390 | existing_device->bay = new_device->bay; | |
1391 | memcpy(existing_device->box, new_device->box, | |
1392 | sizeof(existing_device->box)); | |
1393 | memcpy(existing_device->phys_connector, new_device->phys_connector, | |
1394 | sizeof(existing_device->phys_connector)); | |
1395 | existing_device->offload_configured = new_device->offload_configured; | |
1396 | existing_device->offload_enabled = false; | |
1397 | existing_device->offload_enabled_pending = | |
1398 | new_device->offload_enabled_pending; | |
1399 | existing_device->offload_to_mirror = 0; | |
1400 | kfree(existing_device->raid_map); | |
1401 | existing_device->raid_map = new_device->raid_map; | |
1402 | ||
1403 | /* To prevent this from being freed later. */ | |
1404 | new_device->raid_map = NULL; | |
1405 | } | |
1406 | ||
1407 | static inline void pqi_free_device(struct pqi_scsi_dev *device) | |
1408 | { | |
1409 | if (device) { | |
1410 | kfree(device->raid_map); | |
1411 | kfree(device); | |
1412 | } | |
1413 | } | |
1414 | ||
1415 | /* | |
1416 | * Called when exposing a new device to the OS fails in order to re-adjust | |
1417 | * our internal SCSI device list to match the SCSI ML's view. | |
1418 | */ | |
1419 | ||
1420 | static inline void pqi_fixup_botched_add(struct pqi_ctrl_info *ctrl_info, | |
1421 | struct pqi_scsi_dev *device) | |
1422 | { | |
1423 | unsigned long flags; | |
1424 | ||
1425 | spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); | |
1426 | list_del(&device->scsi_device_list_entry); | |
1427 | spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); | |
1428 | ||
1429 | /* Allow the device structure to be freed later. */ | |
1430 | device->keep_device = false; | |
1431 | } | |
1432 | ||
1433 | static void pqi_update_device_list(struct pqi_ctrl_info *ctrl_info, | |
1434 | struct pqi_scsi_dev *new_device_list[], unsigned int num_new_devices) | |
1435 | { | |
1436 | int rc; | |
1437 | unsigned int i; | |
1438 | unsigned long flags; | |
1439 | enum pqi_find_result find_result; | |
1440 | struct pqi_scsi_dev *device; | |
1441 | struct pqi_scsi_dev *next; | |
1442 | struct pqi_scsi_dev *matching_device; | |
1443 | struct list_head add_list; | |
1444 | struct list_head delete_list; | |
1445 | ||
1446 | INIT_LIST_HEAD(&add_list); | |
1447 | INIT_LIST_HEAD(&delete_list); | |
1448 | ||
1449 | /* | |
1450 | * The idea here is to do as little work as possible while holding the | |
1451 | * spinlock. That's why we go to great pains to defer anything other | |
1452 | * than updating the internal device list until after we release the | |
1453 | * spinlock. | |
1454 | */ | |
1455 | ||
1456 | spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); | |
1457 | ||
1458 | /* Assume that all devices in the existing list have gone away. */ | |
1459 | list_for_each_entry(device, &ctrl_info->scsi_device_list, | |
1460 | scsi_device_list_entry) | |
1461 | device->device_gone = true; | |
1462 | ||
1463 | for (i = 0; i < num_new_devices; i++) { | |
1464 | device = new_device_list[i]; | |
1465 | ||
1466 | find_result = pqi_scsi_find_entry(ctrl_info, device, | |
1467 | &matching_device); | |
1468 | ||
1469 | switch (find_result) { | |
1470 | case DEVICE_SAME: | |
1471 | /* | |
1472 | * The newly found device is already in the existing | |
1473 | * device list. | |
1474 | */ | |
1475 | device->new_device = false; | |
1476 | matching_device->device_gone = false; | |
1477 | pqi_scsi_update_device(matching_device, device); | |
1478 | break; | |
1479 | case DEVICE_NOT_FOUND: | |
1480 | /* | |
1481 | * The newly found device is NOT in the existing device | |
1482 | * list. | |
1483 | */ | |
1484 | device->new_device = true; | |
1485 | break; | |
1486 | case DEVICE_CHANGED: | |
1487 | /* | |
1488 | * The original device has gone away and we need to add | |
1489 | * the new device. | |
1490 | */ | |
1491 | device->new_device = true; | |
1492 | break; | |
1493 | default: | |
1494 | WARN_ON(find_result); | |
1495 | break; | |
1496 | } | |
1497 | } | |
1498 | ||
1499 | /* Process all devices that have gone away. */ | |
1500 | list_for_each_entry_safe(device, next, &ctrl_info->scsi_device_list, | |
1501 | scsi_device_list_entry) { | |
1502 | if (device->device_gone) { | |
1503 | list_del(&device->scsi_device_list_entry); | |
1504 | list_add_tail(&device->delete_list_entry, &delete_list); | |
1505 | } | |
1506 | } | |
1507 | ||
1508 | /* Process all new devices. */ | |
1509 | for (i = 0; i < num_new_devices; i++) { | |
1510 | device = new_device_list[i]; | |
1511 | if (!device->new_device) | |
1512 | continue; | |
1513 | if (device->volume_offline) | |
1514 | continue; | |
1515 | list_add_tail(&device->scsi_device_list_entry, | |
1516 | &ctrl_info->scsi_device_list); | |
1517 | list_add_tail(&device->add_list_entry, &add_list); | |
1518 | /* To prevent this device structure from being freed later. */ | |
1519 | device->keep_device = true; | |
1520 | } | |
1521 | ||
1522 | pqi_update_all_logical_drive_queue_depths(ctrl_info); | |
1523 | ||
1524 | list_for_each_entry(device, &ctrl_info->scsi_device_list, | |
1525 | scsi_device_list_entry) | |
1526 | device->offload_enabled = | |
1527 | device->offload_enabled_pending; | |
1528 | ||
1529 | spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); | |
1530 | ||
1531 | /* Remove all devices that have gone away. */ | |
1532 | list_for_each_entry_safe(device, next, &delete_list, | |
1533 | delete_list_entry) { | |
1534 | if (device->sdev) | |
1535 | pqi_remove_device(ctrl_info, device); | |
1536 | if (device->volume_offline) { | |
1537 | pqi_dev_info(ctrl_info, "offline", device); | |
1538 | pqi_show_volume_status(ctrl_info, device); | |
1539 | } else { | |
1540 | pqi_dev_info(ctrl_info, "removed", device); | |
1541 | } | |
1542 | list_del(&device->delete_list_entry); | |
1543 | pqi_free_device(device); | |
1544 | } | |
1545 | ||
1546 | /* | |
1547 | * Notify the SCSI ML if the queue depth of any existing device has | |
1548 | * changed. | |
1549 | */ | |
1550 | list_for_each_entry(device, &ctrl_info->scsi_device_list, | |
1551 | scsi_device_list_entry) { | |
1552 | if (device->sdev && device->queue_depth != | |
1553 | device->advertised_queue_depth) { | |
1554 | device->advertised_queue_depth = device->queue_depth; | |
1555 | scsi_change_queue_depth(device->sdev, | |
1556 | device->advertised_queue_depth); | |
1557 | } | |
1558 | } | |
1559 | ||
1560 | /* Expose any new devices. */ | |
1561 | list_for_each_entry_safe(device, next, &add_list, add_list_entry) { | |
1562 | if (device->expose_device && !device->sdev) { | |
1563 | rc = pqi_add_device(ctrl_info, device); | |
1564 | if (rc) { | |
1565 | dev_warn(&ctrl_info->pci_dev->dev, | |
1566 | "scsi %d:%d:%d:%d addition failed, device not added\n", | |
1567 | ctrl_info->scsi_host->host_no, | |
1568 | device->bus, device->target, | |
1569 | device->lun); | |
1570 | pqi_fixup_botched_add(ctrl_info, device); | |
1571 | continue; | |
1572 | } | |
1573 | } | |
1574 | pqi_dev_info(ctrl_info, "added", device); | |
1575 | } | |
1576 | } | |
1577 | ||
1578 | static bool pqi_is_supported_device(struct pqi_scsi_dev *device) | |
1579 | { | |
1580 | bool is_supported = false; | |
1581 | ||
1582 | switch (device->devtype) { | |
1583 | case TYPE_DISK: | |
1584 | case TYPE_ZBC: | |
1585 | case TYPE_TAPE: | |
1586 | case TYPE_MEDIUM_CHANGER: | |
1587 | case TYPE_ENCLOSURE: | |
1588 | is_supported = true; | |
1589 | break; | |
1590 | case TYPE_RAID: | |
1591 | /* | |
1592 | * Only support the HBA controller itself as a RAID | |
1593 | * controller. If it's a RAID controller other than | |
1594 | * the HBA itself (an external RAID controller, MSA500 | |
1595 | * or similar), we don't support it. | |
1596 | */ | |
1597 | if (pqi_is_hba_lunid(device->scsi3addr)) | |
1598 | is_supported = true; | |
1599 | break; | |
1600 | } | |
1601 | ||
1602 | return is_supported; | |
1603 | } | |
1604 | ||
1605 | static inline bool pqi_skip_device(u8 *scsi3addr, | |
1606 | struct report_phys_lun_extended_entry *phys_lun_ext_entry) | |
1607 | { | |
1608 | u8 device_flags; | |
1609 | ||
1610 | if (!MASKED_DEVICE(scsi3addr)) | |
1611 | return false; | |
1612 | ||
1613 | /* The device is masked. */ | |
1614 | ||
1615 | device_flags = phys_lun_ext_entry->device_flags; | |
1616 | ||
1617 | if (device_flags & REPORT_PHYS_LUN_DEV_FLAG_NON_DISK) { | |
1618 | /* | |
1619 | * It's a non-disk device. We ignore all devices of this type | |
1620 | * when they're masked. | |
1621 | */ | |
1622 | return true; | |
1623 | } | |
1624 | ||
1625 | return false; | |
1626 | } | |
1627 | ||
1628 | static inline bool pqi_expose_device(struct pqi_scsi_dev *device) | |
1629 | { | |
1630 | /* Expose all devices except for physical devices that are masked. */ | |
1631 | if (device->is_physical_device && MASKED_DEVICE(device->scsi3addr)) | |
1632 | return false; | |
1633 | ||
1634 | return true; | |
1635 | } | |
1636 | ||
1637 | static int pqi_update_scsi_devices(struct pqi_ctrl_info *ctrl_info) | |
1638 | { | |
1639 | int i; | |
1640 | int rc; | |
1641 | struct list_head new_device_list_head; | |
1642 | struct report_phys_lun_extended *physdev_list = NULL; | |
1643 | struct report_log_lun_extended *logdev_list = NULL; | |
1644 | struct report_phys_lun_extended_entry *phys_lun_ext_entry; | |
1645 | struct report_log_lun_extended_entry *log_lun_ext_entry; | |
1646 | struct bmic_identify_physical_device *id_phys = NULL; | |
1647 | u32 num_physicals; | |
1648 | u32 num_logicals; | |
1649 | struct pqi_scsi_dev **new_device_list = NULL; | |
1650 | struct pqi_scsi_dev *device; | |
1651 | struct pqi_scsi_dev *next; | |
1652 | unsigned int num_new_devices; | |
1653 | unsigned int num_valid_devices; | |
1654 | bool is_physical_device; | |
1655 | u8 *scsi3addr; | |
1656 | static char *out_of_memory_msg = | |
1657 | "out of memory, device discovery stopped"; | |
1658 | ||
1659 | INIT_LIST_HEAD(&new_device_list_head); | |
1660 | ||
1661 | rc = pqi_get_device_lists(ctrl_info, &physdev_list, &logdev_list); | |
1662 | if (rc) | |
1663 | goto out; | |
1664 | ||
1665 | if (physdev_list) | |
1666 | num_physicals = | |
1667 | get_unaligned_be32(&physdev_list->header.list_length) | |
1668 | / sizeof(physdev_list->lun_entries[0]); | |
1669 | else | |
1670 | num_physicals = 0; | |
1671 | ||
1672 | if (logdev_list) | |
1673 | num_logicals = | |
1674 | get_unaligned_be32(&logdev_list->header.list_length) | |
1675 | / sizeof(logdev_list->lun_entries[0]); | |
1676 | else | |
1677 | num_logicals = 0; | |
1678 | ||
1679 | if (num_physicals) { | |
1680 | /* | |
1681 | * We need this buffer for calls to pqi_get_physical_disk_info() | |
1682 | * below. We allocate it here instead of inside | |
1683 | * pqi_get_physical_disk_info() because it's a fairly large | |
1684 | * buffer. | |
1685 | */ | |
1686 | id_phys = kmalloc(sizeof(*id_phys), GFP_KERNEL); | |
1687 | if (!id_phys) { | |
1688 | dev_warn(&ctrl_info->pci_dev->dev, "%s\n", | |
1689 | out_of_memory_msg); | |
1690 | rc = -ENOMEM; | |
1691 | goto out; | |
1692 | } | |
1693 | } | |
1694 | ||
1695 | num_new_devices = num_physicals + num_logicals; | |
1696 | ||
1697 | new_device_list = kmalloc(sizeof(*new_device_list) * | |
1698 | num_new_devices, GFP_KERNEL); | |
1699 | if (!new_device_list) { | |
1700 | dev_warn(&ctrl_info->pci_dev->dev, "%s\n", out_of_memory_msg); | |
1701 | rc = -ENOMEM; | |
1702 | goto out; | |
1703 | } | |
1704 | ||
1705 | for (i = 0; i < num_new_devices; i++) { | |
1706 | device = kzalloc(sizeof(*device), GFP_KERNEL); | |
1707 | if (!device) { | |
1708 | dev_warn(&ctrl_info->pci_dev->dev, "%s\n", | |
1709 | out_of_memory_msg); | |
1710 | rc = -ENOMEM; | |
1711 | goto out; | |
1712 | } | |
1713 | list_add_tail(&device->new_device_list_entry, | |
1714 | &new_device_list_head); | |
1715 | } | |
1716 | ||
1717 | device = NULL; | |
1718 | num_valid_devices = 0; | |
1719 | ||
1720 | for (i = 0; i < num_new_devices; i++) { | |
1721 | ||
1722 | if (i < num_physicals) { | |
1723 | is_physical_device = true; | |
1724 | phys_lun_ext_entry = &physdev_list->lun_entries[i]; | |
1725 | log_lun_ext_entry = NULL; | |
1726 | scsi3addr = phys_lun_ext_entry->lunid; | |
1727 | } else { | |
1728 | is_physical_device = false; | |
1729 | phys_lun_ext_entry = NULL; | |
1730 | log_lun_ext_entry = | |
1731 | &logdev_list->lun_entries[i - num_physicals]; | |
1732 | scsi3addr = log_lun_ext_entry->lunid; | |
1733 | } | |
1734 | ||
1735 | if (is_physical_device && | |
1736 | pqi_skip_device(scsi3addr, phys_lun_ext_entry)) | |
1737 | continue; | |
1738 | ||
1739 | if (device) | |
1740 | device = list_next_entry(device, new_device_list_entry); | |
1741 | else | |
1742 | device = list_first_entry(&new_device_list_head, | |
1743 | struct pqi_scsi_dev, new_device_list_entry); | |
1744 | ||
1745 | memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); | |
1746 | device->is_physical_device = is_physical_device; | |
1747 | device->raid_level = SA_RAID_UNKNOWN; | |
1748 | ||
1749 | /* Gather information about the device. */ | |
1750 | rc = pqi_get_device_info(ctrl_info, device); | |
1751 | if (rc == -ENOMEM) { | |
1752 | dev_warn(&ctrl_info->pci_dev->dev, "%s\n", | |
1753 | out_of_memory_msg); | |
1754 | goto out; | |
1755 | } | |
1756 | if (rc) { | |
1757 | dev_warn(&ctrl_info->pci_dev->dev, | |
1758 | "obtaining device info failed, skipping device %016llx\n", | |
1759 | get_unaligned_be64(device->scsi3addr)); | |
1760 | rc = 0; | |
1761 | continue; | |
1762 | } | |
1763 | ||
1764 | if (!pqi_is_supported_device(device)) | |
1765 | continue; | |
1766 | ||
1767 | pqi_assign_bus_target_lun(device); | |
1768 | ||
1769 | device->expose_device = pqi_expose_device(device); | |
1770 | ||
1771 | if (device->is_physical_device) { | |
1772 | device->wwid = phys_lun_ext_entry->wwid; | |
1773 | if ((phys_lun_ext_entry->device_flags & | |
1774 | REPORT_PHYS_LUN_DEV_FLAG_AIO_ENABLED) && | |
1775 | phys_lun_ext_entry->aio_handle) | |
1776 | device->aio_enabled = true; | |
1777 | } else { | |
1778 | memcpy(device->volume_id, log_lun_ext_entry->volume_id, | |
1779 | sizeof(device->volume_id)); | |
1780 | } | |
1781 | ||
1782 | switch (device->devtype) { | |
1783 | case TYPE_DISK: | |
1784 | case TYPE_ZBC: | |
1785 | case TYPE_ENCLOSURE: | |
1786 | if (device->is_physical_device) { | |
1787 | device->sas_address = | |
1788 | get_unaligned_be64(&device->wwid); | |
1789 | if (device->devtype == TYPE_DISK || | |
1790 | device->devtype == TYPE_ZBC) { | |
1791 | device->aio_handle = | |
1792 | phys_lun_ext_entry->aio_handle; | |
1793 | pqi_get_physical_disk_info(ctrl_info, | |
1794 | device, id_phys); | |
1795 | } | |
1796 | } | |
1797 | break; | |
1798 | } | |
1799 | ||
1800 | new_device_list[num_valid_devices++] = device; | |
1801 | } | |
1802 | ||
1803 | pqi_update_device_list(ctrl_info, new_device_list, num_valid_devices); | |
1804 | ||
1805 | out: | |
1806 | list_for_each_entry_safe(device, next, &new_device_list_head, | |
1807 | new_device_list_entry) { | |
1808 | if (device->keep_device) | |
1809 | continue; | |
1810 | list_del(&device->new_device_list_entry); | |
1811 | pqi_free_device(device); | |
1812 | } | |
1813 | ||
1814 | kfree(new_device_list); | |
1815 | kfree(physdev_list); | |
1816 | kfree(logdev_list); | |
1817 | kfree(id_phys); | |
1818 | ||
1819 | return rc; | |
1820 | } | |
1821 | ||
1822 | static void pqi_remove_all_scsi_devices(struct pqi_ctrl_info *ctrl_info) | |
1823 | { | |
1824 | unsigned long flags; | |
1825 | struct pqi_scsi_dev *device; | |
6c223761 | 1826 | |
a37ef745 KB |
1827 | while (1) { |
1828 | spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); | |
1829 | ||
1830 | device = list_first_entry_or_null(&ctrl_info->scsi_device_list, | |
1831 | struct pqi_scsi_dev, scsi_device_list_entry); | |
1832 | if (device) | |
1833 | list_del(&device->scsi_device_list_entry); | |
1834 | ||
1835 | spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, | |
1836 | flags); | |
1837 | ||
1838 | if (!device) | |
1839 | break; | |
6c223761 | 1840 | |
6c223761 KB |
1841 | if (device->sdev) |
1842 | pqi_remove_device(ctrl_info, device); | |
6c223761 KB |
1843 | pqi_free_device(device); |
1844 | } | |
6c223761 KB |
1845 | } |
1846 | ||
1847 | static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info) | |
1848 | { | |
1849 | int rc; | |
1850 | ||
1851 | if (pqi_ctrl_offline(ctrl_info)) | |
1852 | return -ENXIO; | |
1853 | ||
1854 | mutex_lock(&ctrl_info->scan_mutex); | |
1855 | ||
1856 | rc = pqi_update_scsi_devices(ctrl_info); | |
1857 | if (rc) | |
1858 | pqi_schedule_rescan_worker(ctrl_info); | |
1859 | ||
1860 | mutex_unlock(&ctrl_info->scan_mutex); | |
1861 | ||
1862 | return rc; | |
1863 | } | |
1864 | ||
1865 | static void pqi_scan_start(struct Scsi_Host *shost) | |
1866 | { | |
1867 | pqi_scan_scsi_devices(shost_to_hba(shost)); | |
1868 | } | |
1869 | ||
1870 | /* Returns TRUE if scan is finished. */ | |
1871 | ||
1872 | static int pqi_scan_finished(struct Scsi_Host *shost, | |
1873 | unsigned long elapsed_time) | |
1874 | { | |
1875 | struct pqi_ctrl_info *ctrl_info; | |
1876 | ||
1877 | ctrl_info = shost_priv(shost); | |
1878 | ||
1879 | return !mutex_is_locked(&ctrl_info->scan_mutex); | |
1880 | } | |
1881 | ||
1882 | static inline void pqi_set_encryption_info( | |
1883 | struct pqi_encryption_info *encryption_info, struct raid_map *raid_map, | |
1884 | u64 first_block) | |
1885 | { | |
1886 | u32 volume_blk_size; | |
1887 | ||
1888 | /* | |
1889 | * Set the encryption tweak values based on logical block address. | |
1890 | * If the block size is 512, the tweak value is equal to the LBA. | |
1891 | * For other block sizes, tweak value is (LBA * block size) / 512. | |
1892 | */ | |
1893 | volume_blk_size = get_unaligned_le32(&raid_map->volume_blk_size); | |
1894 | if (volume_blk_size != 512) | |
1895 | first_block = (first_block * volume_blk_size) / 512; | |
1896 | ||
1897 | encryption_info->data_encryption_key_index = | |
1898 | get_unaligned_le16(&raid_map->data_encryption_key_index); | |
1899 | encryption_info->encrypt_tweak_lower = lower_32_bits(first_block); | |
1900 | encryption_info->encrypt_tweak_upper = upper_32_bits(first_block); | |
1901 | } | |
1902 | ||
1903 | /* | |
1904 | * Attempt to perform offload RAID mapping for a logical volume I/O. | |
1905 | */ | |
1906 | ||
1907 | #define PQI_RAID_BYPASS_INELIGIBLE 1 | |
1908 | ||
1909 | static int pqi_raid_bypass_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info, | |
1910 | struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, | |
1911 | struct pqi_queue_group *queue_group) | |
1912 | { | |
1913 | struct raid_map *raid_map; | |
1914 | bool is_write = false; | |
1915 | u32 map_index; | |
1916 | u64 first_block; | |
1917 | u64 last_block; | |
1918 | u32 block_cnt; | |
1919 | u32 blocks_per_row; | |
1920 | u64 first_row; | |
1921 | u64 last_row; | |
1922 | u32 first_row_offset; | |
1923 | u32 last_row_offset; | |
1924 | u32 first_column; | |
1925 | u32 last_column; | |
1926 | u64 r0_first_row; | |
1927 | u64 r0_last_row; | |
1928 | u32 r5or6_blocks_per_row; | |
1929 | u64 r5or6_first_row; | |
1930 | u64 r5or6_last_row; | |
1931 | u32 r5or6_first_row_offset; | |
1932 | u32 r5or6_last_row_offset; | |
1933 | u32 r5or6_first_column; | |
1934 | u32 r5or6_last_column; | |
1935 | u16 data_disks_per_row; | |
1936 | u32 total_disks_per_row; | |
1937 | u16 layout_map_count; | |
1938 | u32 stripesize; | |
1939 | u16 strip_size; | |
1940 | u32 first_group; | |
1941 | u32 last_group; | |
1942 | u32 current_group; | |
1943 | u32 map_row; | |
1944 | u32 aio_handle; | |
1945 | u64 disk_block; | |
1946 | u32 disk_block_cnt; | |
1947 | u8 cdb[16]; | |
1948 | u8 cdb_length; | |
1949 | int offload_to_mirror; | |
1950 | struct pqi_encryption_info *encryption_info_ptr; | |
1951 | struct pqi_encryption_info encryption_info; | |
1952 | #if BITS_PER_LONG == 32 | |
1953 | u64 tmpdiv; | |
1954 | #endif | |
1955 | ||
1956 | /* Check for valid opcode, get LBA and block count. */ | |
1957 | switch (scmd->cmnd[0]) { | |
1958 | case WRITE_6: | |
1959 | is_write = true; | |
1960 | /* fall through */ | |
1961 | case READ_6: | |
e018ef57 B |
1962 | first_block = (u64)(((scmd->cmnd[1] & 0x1f) << 16) | |
1963 | (scmd->cmnd[2] << 8) | scmd->cmnd[3]); | |
6c223761 KB |
1964 | block_cnt = (u32)scmd->cmnd[4]; |
1965 | if (block_cnt == 0) | |
1966 | block_cnt = 256; | |
1967 | break; | |
1968 | case WRITE_10: | |
1969 | is_write = true; | |
1970 | /* fall through */ | |
1971 | case READ_10: | |
1972 | first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]); | |
1973 | block_cnt = (u32)get_unaligned_be16(&scmd->cmnd[7]); | |
1974 | break; | |
1975 | case WRITE_12: | |
1976 | is_write = true; | |
1977 | /* fall through */ | |
1978 | case READ_12: | |
1979 | first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]); | |
1980 | block_cnt = get_unaligned_be32(&scmd->cmnd[6]); | |
1981 | break; | |
1982 | case WRITE_16: | |
1983 | is_write = true; | |
1984 | /* fall through */ | |
1985 | case READ_16: | |
1986 | first_block = get_unaligned_be64(&scmd->cmnd[2]); | |
1987 | block_cnt = get_unaligned_be32(&scmd->cmnd[10]); | |
1988 | break; | |
1989 | default: | |
1990 | /* Process via normal I/O path. */ | |
1991 | return PQI_RAID_BYPASS_INELIGIBLE; | |
1992 | } | |
1993 | ||
1994 | /* Check for write to non-RAID-0. */ | |
1995 | if (is_write && device->raid_level != SA_RAID_0) | |
1996 | return PQI_RAID_BYPASS_INELIGIBLE; | |
1997 | ||
1998 | if (unlikely(block_cnt == 0)) | |
1999 | return PQI_RAID_BYPASS_INELIGIBLE; | |
2000 | ||
2001 | last_block = first_block + block_cnt - 1; | |
2002 | raid_map = device->raid_map; | |
2003 | ||
2004 | /* Check for invalid block or wraparound. */ | |
2005 | if (last_block >= get_unaligned_le64(&raid_map->volume_blk_cnt) || | |
2006 | last_block < first_block) | |
2007 | return PQI_RAID_BYPASS_INELIGIBLE; | |
2008 | ||
2009 | data_disks_per_row = get_unaligned_le16(&raid_map->data_disks_per_row); | |
2010 | strip_size = get_unaligned_le16(&raid_map->strip_size); | |
2011 | layout_map_count = get_unaligned_le16(&raid_map->layout_map_count); | |
2012 | ||
2013 | /* Calculate stripe information for the request. */ | |
2014 | blocks_per_row = data_disks_per_row * strip_size; | |
2015 | #if BITS_PER_LONG == 32 | |
2016 | tmpdiv = first_block; | |
2017 | do_div(tmpdiv, blocks_per_row); | |
2018 | first_row = tmpdiv; | |
2019 | tmpdiv = last_block; | |
2020 | do_div(tmpdiv, blocks_per_row); | |
2021 | last_row = tmpdiv; | |
2022 | first_row_offset = (u32)(first_block - (first_row * blocks_per_row)); | |
2023 | last_row_offset = (u32)(last_block - (last_row * blocks_per_row)); | |
2024 | tmpdiv = first_row_offset; | |
2025 | do_div(tmpdiv, strip_size); | |
2026 | first_column = tmpdiv; | |
2027 | tmpdiv = last_row_offset; | |
2028 | do_div(tmpdiv, strip_size); | |
2029 | last_column = tmpdiv; | |
2030 | #else | |
2031 | first_row = first_block / blocks_per_row; | |
2032 | last_row = last_block / blocks_per_row; | |
2033 | first_row_offset = (u32)(first_block - (first_row * blocks_per_row)); | |
2034 | last_row_offset = (u32)(last_block - (last_row * blocks_per_row)); | |
2035 | first_column = first_row_offset / strip_size; | |
2036 | last_column = last_row_offset / strip_size; | |
2037 | #endif | |
2038 | ||
2039 | /* If this isn't a single row/column then give to the controller. */ | |
2040 | if (first_row != last_row || first_column != last_column) | |
2041 | return PQI_RAID_BYPASS_INELIGIBLE; | |
2042 | ||
2043 | /* Proceeding with driver mapping. */ | |
2044 | total_disks_per_row = data_disks_per_row + | |
2045 | get_unaligned_le16(&raid_map->metadata_disks_per_row); | |
2046 | map_row = ((u32)(first_row >> raid_map->parity_rotation_shift)) % | |
2047 | get_unaligned_le16(&raid_map->row_cnt); | |
2048 | map_index = (map_row * total_disks_per_row) + first_column; | |
2049 | ||
2050 | /* RAID 1 */ | |
2051 | if (device->raid_level == SA_RAID_1) { | |
2052 | if (device->offload_to_mirror) | |
2053 | map_index += data_disks_per_row; | |
2054 | device->offload_to_mirror = !device->offload_to_mirror; | |
2055 | } else if (device->raid_level == SA_RAID_ADM) { | |
2056 | /* RAID ADM */ | |
2057 | /* | |
2058 | * Handles N-way mirrors (R1-ADM) and R10 with # of drives | |
2059 | * divisible by 3. | |
2060 | */ | |
2061 | offload_to_mirror = device->offload_to_mirror; | |
2062 | if (offload_to_mirror == 0) { | |
2063 | /* use physical disk in the first mirrored group. */ | |
2064 | map_index %= data_disks_per_row; | |
2065 | } else { | |
2066 | do { | |
2067 | /* | |
2068 | * Determine mirror group that map_index | |
2069 | * indicates. | |
2070 | */ | |
2071 | current_group = map_index / data_disks_per_row; | |
2072 | ||
2073 | if (offload_to_mirror != current_group) { | |
2074 | if (current_group < | |
2075 | layout_map_count - 1) { | |
2076 | /* | |
2077 | * Select raid index from | |
2078 | * next group. | |
2079 | */ | |
2080 | map_index += data_disks_per_row; | |
2081 | current_group++; | |
2082 | } else { | |
2083 | /* | |
2084 | * Select raid index from first | |
2085 | * group. | |
2086 | */ | |
2087 | map_index %= data_disks_per_row; | |
2088 | current_group = 0; | |
2089 | } | |
2090 | } | |
2091 | } while (offload_to_mirror != current_group); | |
2092 | } | |
2093 | ||
2094 | /* Set mirror group to use next time. */ | |
2095 | offload_to_mirror = | |
2096 | (offload_to_mirror >= layout_map_count - 1) ? | |
2097 | 0 : offload_to_mirror + 1; | |
2098 | WARN_ON(offload_to_mirror >= layout_map_count); | |
2099 | device->offload_to_mirror = offload_to_mirror; | |
2100 | /* | |
2101 | * Avoid direct use of device->offload_to_mirror within this | |
2102 | * function since multiple threads might simultaneously | |
2103 | * increment it beyond the range of device->layout_map_count -1. | |
2104 | */ | |
2105 | } else if ((device->raid_level == SA_RAID_5 || | |
2106 | device->raid_level == SA_RAID_6) && layout_map_count > 1) { | |
2107 | /* RAID 50/60 */ | |
2108 | /* Verify first and last block are in same RAID group */ | |
2109 | r5or6_blocks_per_row = strip_size * data_disks_per_row; | |
2110 | stripesize = r5or6_blocks_per_row * layout_map_count; | |
2111 | #if BITS_PER_LONG == 32 | |
2112 | tmpdiv = first_block; | |
2113 | first_group = do_div(tmpdiv, stripesize); | |
2114 | tmpdiv = first_group; | |
2115 | do_div(tmpdiv, r5or6_blocks_per_row); | |
2116 | first_group = tmpdiv; | |
2117 | tmpdiv = last_block; | |
2118 | last_group = do_div(tmpdiv, stripesize); | |
2119 | tmpdiv = last_group; | |
2120 | do_div(tmpdiv, r5or6_blocks_per_row); | |
2121 | last_group = tmpdiv; | |
2122 | #else | |
2123 | first_group = (first_block % stripesize) / r5or6_blocks_per_row; | |
2124 | last_group = (last_block % stripesize) / r5or6_blocks_per_row; | |
2125 | #endif | |
2126 | if (first_group != last_group) | |
2127 | return PQI_RAID_BYPASS_INELIGIBLE; | |
2128 | ||
2129 | /* Verify request is in a single row of RAID 5/6 */ | |
2130 | #if BITS_PER_LONG == 32 | |
2131 | tmpdiv = first_block; | |
2132 | do_div(tmpdiv, stripesize); | |
2133 | first_row = r5or6_first_row = r0_first_row = tmpdiv; | |
2134 | tmpdiv = last_block; | |
2135 | do_div(tmpdiv, stripesize); | |
2136 | r5or6_last_row = r0_last_row = tmpdiv; | |
2137 | #else | |
2138 | first_row = r5or6_first_row = r0_first_row = | |
2139 | first_block / stripesize; | |
2140 | r5or6_last_row = r0_last_row = last_block / stripesize; | |
2141 | #endif | |
2142 | if (r5or6_first_row != r5or6_last_row) | |
2143 | return PQI_RAID_BYPASS_INELIGIBLE; | |
2144 | ||
2145 | /* Verify request is in a single column */ | |
2146 | #if BITS_PER_LONG == 32 | |
2147 | tmpdiv = first_block; | |
2148 | first_row_offset = do_div(tmpdiv, stripesize); | |
2149 | tmpdiv = first_row_offset; | |
2150 | first_row_offset = (u32)do_div(tmpdiv, r5or6_blocks_per_row); | |
2151 | r5or6_first_row_offset = first_row_offset; | |
2152 | tmpdiv = last_block; | |
2153 | r5or6_last_row_offset = do_div(tmpdiv, stripesize); | |
2154 | tmpdiv = r5or6_last_row_offset; | |
2155 | r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); | |
2156 | tmpdiv = r5or6_first_row_offset; | |
2157 | do_div(tmpdiv, strip_size); | |
2158 | first_column = r5or6_first_column = tmpdiv; | |
2159 | tmpdiv = r5or6_last_row_offset; | |
2160 | do_div(tmpdiv, strip_size); | |
2161 | r5or6_last_column = tmpdiv; | |
2162 | #else | |
2163 | first_row_offset = r5or6_first_row_offset = | |
2164 | (u32)((first_block % stripesize) % | |
2165 | r5or6_blocks_per_row); | |
2166 | ||
2167 | r5or6_last_row_offset = | |
2168 | (u32)((last_block % stripesize) % | |
2169 | r5or6_blocks_per_row); | |
2170 | ||
2171 | first_column = r5or6_first_row_offset / strip_size; | |
2172 | r5or6_first_column = first_column; | |
2173 | r5or6_last_column = r5or6_last_row_offset / strip_size; | |
2174 | #endif | |
2175 | if (r5or6_first_column != r5or6_last_column) | |
2176 | return PQI_RAID_BYPASS_INELIGIBLE; | |
2177 | ||
2178 | /* Request is eligible */ | |
2179 | map_row = | |
2180 | ((u32)(first_row >> raid_map->parity_rotation_shift)) % | |
2181 | get_unaligned_le16(&raid_map->row_cnt); | |
2182 | ||
2183 | map_index = (first_group * | |
2184 | (get_unaligned_le16(&raid_map->row_cnt) * | |
2185 | total_disks_per_row)) + | |
2186 | (map_row * total_disks_per_row) + first_column; | |
2187 | } | |
2188 | ||
2189 | if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) | |
2190 | return PQI_RAID_BYPASS_INELIGIBLE; | |
2191 | ||
2192 | aio_handle = raid_map->disk_data[map_index].aio_handle; | |
2193 | disk_block = get_unaligned_le64(&raid_map->disk_starting_blk) + | |
2194 | first_row * strip_size + | |
2195 | (first_row_offset - first_column * strip_size); | |
2196 | disk_block_cnt = block_cnt; | |
2197 | ||
2198 | /* Handle differing logical/physical block sizes. */ | |
2199 | if (raid_map->phys_blk_shift) { | |
2200 | disk_block <<= raid_map->phys_blk_shift; | |
2201 | disk_block_cnt <<= raid_map->phys_blk_shift; | |
2202 | } | |
2203 | ||
2204 | if (unlikely(disk_block_cnt > 0xffff)) | |
2205 | return PQI_RAID_BYPASS_INELIGIBLE; | |
2206 | ||
2207 | /* Build the new CDB for the physical disk I/O. */ | |
2208 | if (disk_block > 0xffffffff) { | |
2209 | cdb[0] = is_write ? WRITE_16 : READ_16; | |
2210 | cdb[1] = 0; | |
2211 | put_unaligned_be64(disk_block, &cdb[2]); | |
2212 | put_unaligned_be32(disk_block_cnt, &cdb[10]); | |
2213 | cdb[14] = 0; | |
2214 | cdb[15] = 0; | |
2215 | cdb_length = 16; | |
2216 | } else { | |
2217 | cdb[0] = is_write ? WRITE_10 : READ_10; | |
2218 | cdb[1] = 0; | |
2219 | put_unaligned_be32((u32)disk_block, &cdb[2]); | |
2220 | cdb[6] = 0; | |
2221 | put_unaligned_be16((u16)disk_block_cnt, &cdb[7]); | |
2222 | cdb[9] = 0; | |
2223 | cdb_length = 10; | |
2224 | } | |
2225 | ||
2226 | if (get_unaligned_le16(&raid_map->flags) & | |
2227 | RAID_MAP_ENCRYPTION_ENABLED) { | |
2228 | pqi_set_encryption_info(&encryption_info, raid_map, | |
2229 | first_block); | |
2230 | encryption_info_ptr = &encryption_info; | |
2231 | } else { | |
2232 | encryption_info_ptr = NULL; | |
2233 | } | |
2234 | ||
2235 | return pqi_aio_submit_io(ctrl_info, scmd, aio_handle, | |
2236 | cdb, cdb_length, queue_group, encryption_info_ptr); | |
2237 | } | |
2238 | ||
2239 | #define PQI_STATUS_IDLE 0x0 | |
2240 | ||
2241 | #define PQI_CREATE_ADMIN_QUEUE_PAIR 1 | |
2242 | #define PQI_DELETE_ADMIN_QUEUE_PAIR 2 | |
2243 | ||
2244 | #define PQI_DEVICE_STATE_POWER_ON_AND_RESET 0x0 | |
2245 | #define PQI_DEVICE_STATE_STATUS_AVAILABLE 0x1 | |
2246 | #define PQI_DEVICE_STATE_ALL_REGISTERS_READY 0x2 | |
2247 | #define PQI_DEVICE_STATE_ADMIN_QUEUE_PAIR_READY 0x3 | |
2248 | #define PQI_DEVICE_STATE_ERROR 0x4 | |
2249 | ||
2250 | #define PQI_MODE_READY_TIMEOUT_SECS 30 | |
2251 | #define PQI_MODE_READY_POLL_INTERVAL_MSECS 1 | |
2252 | ||
2253 | static int pqi_wait_for_pqi_mode_ready(struct pqi_ctrl_info *ctrl_info) | |
2254 | { | |
2255 | struct pqi_device_registers __iomem *pqi_registers; | |
2256 | unsigned long timeout; | |
2257 | u64 signature; | |
2258 | u8 status; | |
2259 | ||
2260 | pqi_registers = ctrl_info->pqi_registers; | |
2261 | timeout = (PQI_MODE_READY_TIMEOUT_SECS * HZ) + jiffies; | |
2262 | ||
2263 | while (1) { | |
2264 | signature = readq(&pqi_registers->signature); | |
2265 | if (memcmp(&signature, PQI_DEVICE_SIGNATURE, | |
2266 | sizeof(signature)) == 0) | |
2267 | break; | |
2268 | if (time_after(jiffies, timeout)) { | |
2269 | dev_err(&ctrl_info->pci_dev->dev, | |
2270 | "timed out waiting for PQI signature\n"); | |
2271 | return -ETIMEDOUT; | |
2272 | } | |
2273 | msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS); | |
2274 | } | |
2275 | ||
2276 | while (1) { | |
2277 | status = readb(&pqi_registers->function_and_status_code); | |
2278 | if (status == PQI_STATUS_IDLE) | |
2279 | break; | |
2280 | if (time_after(jiffies, timeout)) { | |
2281 | dev_err(&ctrl_info->pci_dev->dev, | |
2282 | "timed out waiting for PQI IDLE\n"); | |
2283 | return -ETIMEDOUT; | |
2284 | } | |
2285 | msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS); | |
2286 | } | |
2287 | ||
2288 | while (1) { | |
2289 | if (readl(&pqi_registers->device_status) == | |
2290 | PQI_DEVICE_STATE_ALL_REGISTERS_READY) | |
2291 | break; | |
2292 | if (time_after(jiffies, timeout)) { | |
2293 | dev_err(&ctrl_info->pci_dev->dev, | |
2294 | "timed out waiting for PQI all registers ready\n"); | |
2295 | return -ETIMEDOUT; | |
2296 | } | |
2297 | msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS); | |
2298 | } | |
2299 | ||
2300 | return 0; | |
2301 | } | |
2302 | ||
2303 | static inline void pqi_aio_path_disabled(struct pqi_io_request *io_request) | |
2304 | { | |
2305 | struct pqi_scsi_dev *device; | |
2306 | ||
2307 | device = io_request->scmd->device->hostdata; | |
2308 | device->offload_enabled = false; | |
2309 | } | |
2310 | ||
2311 | static inline void pqi_take_device_offline(struct scsi_device *sdev) | |
2312 | { | |
2313 | struct pqi_ctrl_info *ctrl_info; | |
e58081a7 | 2314 | struct pqi_scsi_dev *device; |
6c223761 KB |
2315 | |
2316 | if (scsi_device_online(sdev)) { | |
2317 | scsi_device_set_state(sdev, SDEV_OFFLINE); | |
2318 | ctrl_info = shost_to_hba(sdev->host); | |
2319 | schedule_delayed_work(&ctrl_info->rescan_work, 0); | |
e58081a7 KB |
2320 | device = sdev->hostdata; |
2321 | dev_err(&ctrl_info->pci_dev->dev, "offlined scsi %d:%d:%d:%d\n", | |
2322 | ctrl_info->scsi_host->host_no, device->bus, | |
2323 | device->target, device->lun); | |
6c223761 KB |
2324 | } |
2325 | } | |
2326 | ||
2327 | static void pqi_process_raid_io_error(struct pqi_io_request *io_request) | |
2328 | { | |
2329 | u8 scsi_status; | |
2330 | u8 host_byte; | |
2331 | struct scsi_cmnd *scmd; | |
2332 | struct pqi_raid_error_info *error_info; | |
2333 | size_t sense_data_length; | |
2334 | int residual_count; | |
2335 | int xfer_count; | |
2336 | struct scsi_sense_hdr sshdr; | |
2337 | ||
2338 | scmd = io_request->scmd; | |
2339 | if (!scmd) | |
2340 | return; | |
2341 | ||
2342 | error_info = io_request->error_info; | |
2343 | scsi_status = error_info->status; | |
2344 | host_byte = DID_OK; | |
2345 | ||
2346 | if (error_info->data_out_result == PQI_DATA_IN_OUT_UNDERFLOW) { | |
2347 | xfer_count = | |
2348 | get_unaligned_le32(&error_info->data_out_transferred); | |
2349 | residual_count = scsi_bufflen(scmd) - xfer_count; | |
2350 | scsi_set_resid(scmd, residual_count); | |
2351 | if (xfer_count < scmd->underflow) | |
2352 | host_byte = DID_SOFT_ERROR; | |
2353 | } | |
2354 | ||
2355 | sense_data_length = get_unaligned_le16(&error_info->sense_data_length); | |
2356 | if (sense_data_length == 0) | |
2357 | sense_data_length = | |
2358 | get_unaligned_le16(&error_info->response_data_length); | |
2359 | if (sense_data_length) { | |
2360 | if (sense_data_length > sizeof(error_info->data)) | |
2361 | sense_data_length = sizeof(error_info->data); | |
2362 | ||
2363 | if (scsi_status == SAM_STAT_CHECK_CONDITION && | |
2364 | scsi_normalize_sense(error_info->data, | |
2365 | sense_data_length, &sshdr) && | |
2366 | sshdr.sense_key == HARDWARE_ERROR && | |
2367 | sshdr.asc == 0x3e && | |
2368 | sshdr.ascq == 0x1) { | |
2369 | pqi_take_device_offline(scmd->device); | |
2370 | host_byte = DID_NO_CONNECT; | |
2371 | } | |
2372 | ||
2373 | if (sense_data_length > SCSI_SENSE_BUFFERSIZE) | |
2374 | sense_data_length = SCSI_SENSE_BUFFERSIZE; | |
2375 | memcpy(scmd->sense_buffer, error_info->data, | |
2376 | sense_data_length); | |
2377 | } | |
2378 | ||
2379 | scmd->result = scsi_status; | |
2380 | set_host_byte(scmd, host_byte); | |
2381 | } | |
2382 | ||
2383 | static void pqi_process_aio_io_error(struct pqi_io_request *io_request) | |
2384 | { | |
2385 | u8 scsi_status; | |
2386 | u8 host_byte; | |
2387 | struct scsi_cmnd *scmd; | |
2388 | struct pqi_aio_error_info *error_info; | |
2389 | size_t sense_data_length; | |
2390 | int residual_count; | |
2391 | int xfer_count; | |
2392 | bool device_offline; | |
2393 | ||
2394 | scmd = io_request->scmd; | |
2395 | error_info = io_request->error_info; | |
2396 | host_byte = DID_OK; | |
2397 | sense_data_length = 0; | |
2398 | device_offline = false; | |
2399 | ||
2400 | switch (error_info->service_response) { | |
2401 | case PQI_AIO_SERV_RESPONSE_COMPLETE: | |
2402 | scsi_status = error_info->status; | |
2403 | break; | |
2404 | case PQI_AIO_SERV_RESPONSE_FAILURE: | |
2405 | switch (error_info->status) { | |
2406 | case PQI_AIO_STATUS_IO_ABORTED: | |
2407 | scsi_status = SAM_STAT_TASK_ABORTED; | |
2408 | break; | |
2409 | case PQI_AIO_STATUS_UNDERRUN: | |
2410 | scsi_status = SAM_STAT_GOOD; | |
2411 | residual_count = get_unaligned_le32( | |
2412 | &error_info->residual_count); | |
2413 | scsi_set_resid(scmd, residual_count); | |
2414 | xfer_count = scsi_bufflen(scmd) - residual_count; | |
2415 | if (xfer_count < scmd->underflow) | |
2416 | host_byte = DID_SOFT_ERROR; | |
2417 | break; | |
2418 | case PQI_AIO_STATUS_OVERRUN: | |
2419 | scsi_status = SAM_STAT_GOOD; | |
2420 | break; | |
2421 | case PQI_AIO_STATUS_AIO_PATH_DISABLED: | |
2422 | pqi_aio_path_disabled(io_request); | |
2423 | scsi_status = SAM_STAT_GOOD; | |
2424 | io_request->status = -EAGAIN; | |
2425 | break; | |
2426 | case PQI_AIO_STATUS_NO_PATH_TO_DEVICE: | |
2427 | case PQI_AIO_STATUS_INVALID_DEVICE: | |
2428 | device_offline = true; | |
2429 | pqi_take_device_offline(scmd->device); | |
2430 | host_byte = DID_NO_CONNECT; | |
2431 | scsi_status = SAM_STAT_CHECK_CONDITION; | |
2432 | break; | |
2433 | case PQI_AIO_STATUS_IO_ERROR: | |
2434 | default: | |
2435 | scsi_status = SAM_STAT_CHECK_CONDITION; | |
2436 | break; | |
2437 | } | |
2438 | break; | |
2439 | case PQI_AIO_SERV_RESPONSE_TMF_COMPLETE: | |
2440 | case PQI_AIO_SERV_RESPONSE_TMF_SUCCEEDED: | |
2441 | scsi_status = SAM_STAT_GOOD; | |
2442 | break; | |
2443 | case PQI_AIO_SERV_RESPONSE_TMF_REJECTED: | |
2444 | case PQI_AIO_SERV_RESPONSE_TMF_INCORRECT_LUN: | |
2445 | default: | |
2446 | scsi_status = SAM_STAT_CHECK_CONDITION; | |
2447 | break; | |
2448 | } | |
2449 | ||
2450 | if (error_info->data_present) { | |
2451 | sense_data_length = | |
2452 | get_unaligned_le16(&error_info->data_length); | |
2453 | if (sense_data_length) { | |
2454 | if (sense_data_length > sizeof(error_info->data)) | |
2455 | sense_data_length = sizeof(error_info->data); | |
2456 | if (sense_data_length > SCSI_SENSE_BUFFERSIZE) | |
2457 | sense_data_length = SCSI_SENSE_BUFFERSIZE; | |
2458 | memcpy(scmd->sense_buffer, error_info->data, | |
2459 | sense_data_length); | |
2460 | } | |
2461 | } | |
2462 | ||
2463 | if (device_offline && sense_data_length == 0) | |
2464 | scsi_build_sense_buffer(0, scmd->sense_buffer, HARDWARE_ERROR, | |
2465 | 0x3e, 0x1); | |
2466 | ||
2467 | scmd->result = scsi_status; | |
2468 | set_host_byte(scmd, host_byte); | |
2469 | } | |
2470 | ||
2471 | static void pqi_process_io_error(unsigned int iu_type, | |
2472 | struct pqi_io_request *io_request) | |
2473 | { | |
2474 | switch (iu_type) { | |
2475 | case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR: | |
2476 | pqi_process_raid_io_error(io_request); | |
2477 | break; | |
2478 | case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR: | |
2479 | pqi_process_aio_io_error(io_request); | |
2480 | break; | |
2481 | } | |
2482 | } | |
2483 | ||
2484 | static int pqi_interpret_task_management_response( | |
2485 | struct pqi_task_management_response *response) | |
2486 | { | |
2487 | int rc; | |
2488 | ||
2489 | switch (response->response_code) { | |
b17f0486 KB |
2490 | case SOP_TMF_COMPLETE: |
2491 | case SOP_TMF_FUNCTION_SUCCEEDED: | |
6c223761 KB |
2492 | rc = 0; |
2493 | break; | |
2494 | default: | |
2495 | rc = -EIO; | |
2496 | break; | |
2497 | } | |
2498 | ||
2499 | return rc; | |
2500 | } | |
2501 | ||
2502 | static unsigned int pqi_process_io_intr(struct pqi_ctrl_info *ctrl_info, | |
2503 | struct pqi_queue_group *queue_group) | |
2504 | { | |
2505 | unsigned int num_responses; | |
2506 | pqi_index_t oq_pi; | |
2507 | pqi_index_t oq_ci; | |
2508 | struct pqi_io_request *io_request; | |
2509 | struct pqi_io_response *response; | |
2510 | u16 request_id; | |
2511 | ||
2512 | num_responses = 0; | |
2513 | oq_ci = queue_group->oq_ci_copy; | |
2514 | ||
2515 | while (1) { | |
2516 | oq_pi = *queue_group->oq_pi; | |
2517 | if (oq_pi == oq_ci) | |
2518 | break; | |
2519 | ||
2520 | num_responses++; | |
2521 | response = queue_group->oq_element_array + | |
2522 | (oq_ci * PQI_OPERATIONAL_OQ_ELEMENT_LENGTH); | |
2523 | ||
2524 | request_id = get_unaligned_le16(&response->request_id); | |
2525 | WARN_ON(request_id >= ctrl_info->max_io_slots); | |
2526 | ||
2527 | io_request = &ctrl_info->io_request_pool[request_id]; | |
2528 | WARN_ON(atomic_read(&io_request->refcount) == 0); | |
2529 | ||
2530 | switch (response->header.iu_type) { | |
2531 | case PQI_RESPONSE_IU_RAID_PATH_IO_SUCCESS: | |
2532 | case PQI_RESPONSE_IU_AIO_PATH_IO_SUCCESS: | |
2533 | case PQI_RESPONSE_IU_GENERAL_MANAGEMENT: | |
2534 | break; | |
2535 | case PQI_RESPONSE_IU_TASK_MANAGEMENT: | |
2536 | io_request->status = | |
2537 | pqi_interpret_task_management_response( | |
2538 | (void *)response); | |
2539 | break; | |
2540 | case PQI_RESPONSE_IU_AIO_PATH_DISABLED: | |
2541 | pqi_aio_path_disabled(io_request); | |
2542 | io_request->status = -EAGAIN; | |
2543 | break; | |
2544 | case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR: | |
2545 | case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR: | |
2546 | io_request->error_info = ctrl_info->error_buffer + | |
2547 | (get_unaligned_le16(&response->error_index) * | |
2548 | PQI_ERROR_BUFFER_ELEMENT_LENGTH); | |
2549 | pqi_process_io_error(response->header.iu_type, | |
2550 | io_request); | |
2551 | break; | |
2552 | default: | |
2553 | dev_err(&ctrl_info->pci_dev->dev, | |
2554 | "unexpected IU type: 0x%x\n", | |
2555 | response->header.iu_type); | |
2556 | WARN_ON(response->header.iu_type); | |
2557 | break; | |
2558 | } | |
2559 | ||
2560 | io_request->io_complete_callback(io_request, | |
2561 | io_request->context); | |
2562 | ||
2563 | /* | |
2564 | * Note that the I/O request structure CANNOT BE TOUCHED after | |
2565 | * returning from the I/O completion callback! | |
2566 | */ | |
2567 | ||
2568 | oq_ci = (oq_ci + 1) % ctrl_info->num_elements_per_oq; | |
2569 | } | |
2570 | ||
2571 | if (num_responses) { | |
2572 | queue_group->oq_ci_copy = oq_ci; | |
2573 | writel(oq_ci, queue_group->oq_ci); | |
2574 | } | |
2575 | ||
2576 | return num_responses; | |
2577 | } | |
2578 | ||
2579 | static inline unsigned int pqi_num_elements_free(unsigned int pi, | |
df7a1fcf | 2580 | unsigned int ci, unsigned int elements_in_queue) |
6c223761 KB |
2581 | { |
2582 | unsigned int num_elements_used; | |
2583 | ||
2584 | if (pi >= ci) | |
2585 | num_elements_used = pi - ci; | |
2586 | else | |
2587 | num_elements_used = elements_in_queue - ci + pi; | |
2588 | ||
2589 | return elements_in_queue - num_elements_used - 1; | |
2590 | } | |
2591 | ||
2592 | #define PQI_EVENT_ACK_TIMEOUT 30 | |
2593 | ||
2594 | static void pqi_start_event_ack(struct pqi_ctrl_info *ctrl_info, | |
2595 | struct pqi_event_acknowledge_request *iu, size_t iu_length) | |
2596 | { | |
2597 | pqi_index_t iq_pi; | |
2598 | pqi_index_t iq_ci; | |
2599 | unsigned long flags; | |
2600 | void *next_element; | |
2601 | unsigned long timeout; | |
2602 | struct pqi_queue_group *queue_group; | |
2603 | ||
2604 | queue_group = &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP]; | |
2605 | put_unaligned_le16(queue_group->oq_id, &iu->header.response_queue_id); | |
2606 | ||
2607 | timeout = (PQI_EVENT_ACK_TIMEOUT * HZ) + jiffies; | |
2608 | ||
2609 | while (1) { | |
2610 | spin_lock_irqsave(&queue_group->submit_lock[RAID_PATH], flags); | |
2611 | ||
2612 | iq_pi = queue_group->iq_pi_copy[RAID_PATH]; | |
2613 | iq_ci = *queue_group->iq_ci[RAID_PATH]; | |
2614 | ||
2615 | if (pqi_num_elements_free(iq_pi, iq_ci, | |
2616 | ctrl_info->num_elements_per_iq)) | |
2617 | break; | |
2618 | ||
2619 | spin_unlock_irqrestore( | |
2620 | &queue_group->submit_lock[RAID_PATH], flags); | |
2621 | ||
2622 | if (time_after(jiffies, timeout)) { | |
2623 | dev_err(&ctrl_info->pci_dev->dev, | |
2624 | "sending event acknowledge timed out\n"); | |
2625 | return; | |
2626 | } | |
2627 | } | |
2628 | ||
2629 | next_element = queue_group->iq_element_array[RAID_PATH] + | |
2630 | (iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); | |
2631 | ||
2632 | memcpy(next_element, iu, iu_length); | |
2633 | ||
2634 | iq_pi = (iq_pi + 1) % ctrl_info->num_elements_per_iq; | |
2635 | ||
2636 | queue_group->iq_pi_copy[RAID_PATH] = iq_pi; | |
2637 | ||
2638 | /* | |
2639 | * This write notifies the controller that an IU is available to be | |
2640 | * processed. | |
2641 | */ | |
2642 | writel(iq_pi, queue_group->iq_pi[RAID_PATH]); | |
2643 | ||
2644 | spin_unlock_irqrestore(&queue_group->submit_lock[RAID_PATH], flags); | |
6c223761 KB |
2645 | } |
2646 | ||
2647 | static void pqi_acknowledge_event(struct pqi_ctrl_info *ctrl_info, | |
2648 | struct pqi_event *event) | |
2649 | { | |
2650 | struct pqi_event_acknowledge_request request; | |
2651 | ||
2652 | memset(&request, 0, sizeof(request)); | |
2653 | ||
2654 | request.header.iu_type = PQI_REQUEST_IU_ACKNOWLEDGE_VENDOR_EVENT; | |
2655 | put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH, | |
2656 | &request.header.iu_length); | |
2657 | request.event_type = event->event_type; | |
2658 | request.event_id = event->event_id; | |
2659 | request.additional_event_id = event->additional_event_id; | |
2660 | ||
2661 | pqi_start_event_ack(ctrl_info, &request, sizeof(request)); | |
2662 | } | |
2663 | ||
2664 | static void pqi_event_worker(struct work_struct *work) | |
2665 | { | |
2666 | unsigned int i; | |
2667 | struct pqi_ctrl_info *ctrl_info; | |
2668 | struct pqi_event *pending_event; | |
2669 | bool got_non_heartbeat_event = false; | |
2670 | ||
2671 | ctrl_info = container_of(work, struct pqi_ctrl_info, event_work); | |
2672 | ||
2673 | pending_event = ctrl_info->pending_events; | |
2674 | for (i = 0; i < PQI_NUM_SUPPORTED_EVENTS; i++) { | |
2675 | if (pending_event->pending) { | |
2676 | pending_event->pending = false; | |
2677 | pqi_acknowledge_event(ctrl_info, pending_event); | |
2678 | if (i != PQI_EVENT_HEARTBEAT) | |
2679 | got_non_heartbeat_event = true; | |
2680 | } | |
2681 | pending_event++; | |
2682 | } | |
2683 | ||
2684 | if (got_non_heartbeat_event) | |
2685 | pqi_schedule_rescan_worker(ctrl_info); | |
2686 | } | |
2687 | ||
2688 | static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info) | |
2689 | { | |
2690 | unsigned int i; | |
2691 | unsigned int path; | |
2692 | struct pqi_queue_group *queue_group; | |
2693 | unsigned long flags; | |
2694 | struct pqi_io_request *io_request; | |
2695 | struct pqi_io_request *next; | |
2696 | struct scsi_cmnd *scmd; | |
2697 | ||
2698 | ctrl_info->controller_online = false; | |
2699 | dev_err(&ctrl_info->pci_dev->dev, "controller offline\n"); | |
5b0fba0f | 2700 | sis_shutdown_ctrl(ctrl_info); |
6c223761 KB |
2701 | |
2702 | for (i = 0; i < ctrl_info->num_queue_groups; i++) { | |
2703 | queue_group = &ctrl_info->queue_groups[i]; | |
2704 | ||
2705 | for (path = 0; path < 2; path++) { | |
2706 | spin_lock_irqsave( | |
2707 | &queue_group->submit_lock[path], flags); | |
2708 | ||
2709 | list_for_each_entry_safe(io_request, next, | |
2710 | &queue_group->request_list[path], | |
2711 | request_list_entry) { | |
2712 | ||
2713 | scmd = io_request->scmd; | |
2714 | if (scmd) { | |
2715 | set_host_byte(scmd, DID_NO_CONNECT); | |
2716 | pqi_scsi_done(scmd); | |
2717 | } | |
2718 | ||
2719 | list_del(&io_request->request_list_entry); | |
2720 | } | |
2721 | ||
2722 | spin_unlock_irqrestore( | |
2723 | &queue_group->submit_lock[path], flags); | |
2724 | } | |
2725 | } | |
2726 | } | |
2727 | ||
2728 | #define PQI_HEARTBEAT_TIMER_INTERVAL (5 * HZ) | |
2729 | #define PQI_MAX_HEARTBEAT_REQUESTS 5 | |
2730 | ||
2731 | static void pqi_heartbeat_timer_handler(unsigned long data) | |
2732 | { | |
2733 | int num_interrupts; | |
2734 | struct pqi_ctrl_info *ctrl_info = (struct pqi_ctrl_info *)data; | |
2735 | ||
2736 | num_interrupts = atomic_read(&ctrl_info->num_interrupts); | |
2737 | ||
2738 | if (num_interrupts == ctrl_info->previous_num_interrupts) { | |
2739 | ctrl_info->num_heartbeats_requested++; | |
2740 | if (ctrl_info->num_heartbeats_requested > | |
2741 | PQI_MAX_HEARTBEAT_REQUESTS) { | |
2742 | pqi_take_ctrl_offline(ctrl_info); | |
2743 | return; | |
2744 | } | |
2745 | ctrl_info->pending_events[PQI_EVENT_HEARTBEAT].pending = true; | |
2746 | schedule_work(&ctrl_info->event_work); | |
2747 | } else { | |
2748 | ctrl_info->num_heartbeats_requested = 0; | |
2749 | } | |
2750 | ||
2751 | ctrl_info->previous_num_interrupts = num_interrupts; | |
2752 | mod_timer(&ctrl_info->heartbeat_timer, | |
2753 | jiffies + PQI_HEARTBEAT_TIMER_INTERVAL); | |
2754 | } | |
2755 | ||
2756 | static void pqi_start_heartbeat_timer(struct pqi_ctrl_info *ctrl_info) | |
2757 | { | |
2758 | ctrl_info->previous_num_interrupts = | |
2759 | atomic_read(&ctrl_info->num_interrupts); | |
2760 | ||
2761 | init_timer(&ctrl_info->heartbeat_timer); | |
2762 | ctrl_info->heartbeat_timer.expires = | |
2763 | jiffies + PQI_HEARTBEAT_TIMER_INTERVAL; | |
2764 | ctrl_info->heartbeat_timer.data = (unsigned long)ctrl_info; | |
2765 | ctrl_info->heartbeat_timer.function = pqi_heartbeat_timer_handler; | |
2766 | add_timer(&ctrl_info->heartbeat_timer); | |
2767 | ctrl_info->heartbeat_timer_started = true; | |
2768 | } | |
2769 | ||
2770 | static inline void pqi_stop_heartbeat_timer(struct pqi_ctrl_info *ctrl_info) | |
2771 | { | |
2772 | if (ctrl_info->heartbeat_timer_started) | |
2773 | del_timer_sync(&ctrl_info->heartbeat_timer); | |
2774 | } | |
2775 | ||
2776 | static int pqi_event_type_to_event_index(unsigned int event_type) | |
2777 | { | |
2778 | int index; | |
2779 | ||
2780 | switch (event_type) { | |
2781 | case PQI_EVENT_TYPE_HEARTBEAT: | |
2782 | index = PQI_EVENT_HEARTBEAT; | |
2783 | break; | |
2784 | case PQI_EVENT_TYPE_HOTPLUG: | |
2785 | index = PQI_EVENT_HOTPLUG; | |
2786 | break; | |
2787 | case PQI_EVENT_TYPE_HARDWARE: | |
2788 | index = PQI_EVENT_HARDWARE; | |
2789 | break; | |
2790 | case PQI_EVENT_TYPE_PHYSICAL_DEVICE: | |
2791 | index = PQI_EVENT_PHYSICAL_DEVICE; | |
2792 | break; | |
2793 | case PQI_EVENT_TYPE_LOGICAL_DEVICE: | |
2794 | index = PQI_EVENT_LOGICAL_DEVICE; | |
2795 | break; | |
2796 | case PQI_EVENT_TYPE_AIO_STATE_CHANGE: | |
2797 | index = PQI_EVENT_AIO_STATE_CHANGE; | |
2798 | break; | |
2799 | case PQI_EVENT_TYPE_AIO_CONFIG_CHANGE: | |
2800 | index = PQI_EVENT_AIO_CONFIG_CHANGE; | |
2801 | break; | |
2802 | default: | |
2803 | index = -1; | |
2804 | break; | |
2805 | } | |
2806 | ||
2807 | return index; | |
2808 | } | |
2809 | ||
2810 | static unsigned int pqi_process_event_intr(struct pqi_ctrl_info *ctrl_info) | |
2811 | { | |
2812 | unsigned int num_events; | |
2813 | pqi_index_t oq_pi; | |
2814 | pqi_index_t oq_ci; | |
2815 | struct pqi_event_queue *event_queue; | |
2816 | struct pqi_event_response *response; | |
2817 | struct pqi_event *pending_event; | |
2818 | bool need_delayed_work; | |
2819 | int event_index; | |
2820 | ||
2821 | event_queue = &ctrl_info->event_queue; | |
2822 | num_events = 0; | |
2823 | need_delayed_work = false; | |
2824 | oq_ci = event_queue->oq_ci_copy; | |
2825 | ||
2826 | while (1) { | |
2827 | oq_pi = *event_queue->oq_pi; | |
2828 | if (oq_pi == oq_ci) | |
2829 | break; | |
2830 | ||
2831 | num_events++; | |
2832 | response = event_queue->oq_element_array + | |
2833 | (oq_ci * PQI_EVENT_OQ_ELEMENT_LENGTH); | |
2834 | ||
2835 | event_index = | |
2836 | pqi_event_type_to_event_index(response->event_type); | |
2837 | ||
2838 | if (event_index >= 0) { | |
2839 | if (response->request_acknowlege) { | |
2840 | pending_event = | |
2841 | &ctrl_info->pending_events[event_index]; | |
2842 | pending_event->event_type = | |
2843 | response->event_type; | |
2844 | pending_event->event_id = response->event_id; | |
2845 | pending_event->additional_event_id = | |
2846 | response->additional_event_id; | |
2847 | if (event_index != PQI_EVENT_HEARTBEAT) { | |
2848 | pending_event->pending = true; | |
2849 | need_delayed_work = true; | |
2850 | } | |
2851 | } | |
2852 | } | |
2853 | ||
2854 | oq_ci = (oq_ci + 1) % PQI_NUM_EVENT_QUEUE_ELEMENTS; | |
2855 | } | |
2856 | ||
2857 | if (num_events) { | |
2858 | event_queue->oq_ci_copy = oq_ci; | |
2859 | writel(oq_ci, event_queue->oq_ci); | |
2860 | ||
2861 | if (need_delayed_work) | |
2862 | schedule_work(&ctrl_info->event_work); | |
2863 | } | |
2864 | ||
2865 | return num_events; | |
2866 | } | |
2867 | ||
2868 | static irqreturn_t pqi_irq_handler(int irq, void *data) | |
2869 | { | |
2870 | struct pqi_ctrl_info *ctrl_info; | |
2871 | struct pqi_queue_group *queue_group; | |
2872 | unsigned int num_responses_handled; | |
2873 | ||
2874 | queue_group = data; | |
2875 | ctrl_info = queue_group->ctrl_info; | |
2876 | ||
2877 | if (!ctrl_info || !queue_group->oq_ci) | |
2878 | return IRQ_NONE; | |
2879 | ||
2880 | num_responses_handled = pqi_process_io_intr(ctrl_info, queue_group); | |
2881 | ||
2882 | if (irq == ctrl_info->event_irq) | |
2883 | num_responses_handled += pqi_process_event_intr(ctrl_info); | |
2884 | ||
2885 | if (num_responses_handled) | |
2886 | atomic_inc(&ctrl_info->num_interrupts); | |
2887 | ||
2888 | pqi_start_io(ctrl_info, queue_group, RAID_PATH, NULL); | |
2889 | pqi_start_io(ctrl_info, queue_group, AIO_PATH, NULL); | |
2890 | ||
2891 | return IRQ_HANDLED; | |
2892 | } | |
2893 | ||
2894 | static int pqi_request_irqs(struct pqi_ctrl_info *ctrl_info) | |
2895 | { | |
52198226 | 2896 | struct pci_dev *pdev = ctrl_info->pci_dev; |
6c223761 KB |
2897 | int i; |
2898 | int rc; | |
2899 | ||
52198226 | 2900 | ctrl_info->event_irq = pci_irq_vector(pdev, 0); |
6c223761 KB |
2901 | |
2902 | for (i = 0; i < ctrl_info->num_msix_vectors_enabled; i++) { | |
52198226 CH |
2903 | rc = request_irq(pci_irq_vector(pdev, i), pqi_irq_handler, 0, |
2904 | DRIVER_NAME_SHORT, &ctrl_info->queue_groups[i]); | |
6c223761 | 2905 | if (rc) { |
52198226 | 2906 | dev_err(&pdev->dev, |
6c223761 | 2907 | "irq %u init failed with error %d\n", |
52198226 | 2908 | pci_irq_vector(pdev, i), rc); |
6c223761 KB |
2909 | return rc; |
2910 | } | |
2911 | ctrl_info->num_msix_vectors_initialized++; | |
2912 | } | |
2913 | ||
2914 | return 0; | |
2915 | } | |
2916 | ||
98bf061b KB |
2917 | static void pqi_free_irqs(struct pqi_ctrl_info *ctrl_info) |
2918 | { | |
2919 | int i; | |
2920 | ||
2921 | for (i = 0; i < ctrl_info->num_msix_vectors_initialized; i++) | |
2922 | free_irq(pci_irq_vector(ctrl_info->pci_dev, i), | |
2923 | &ctrl_info->queue_groups[i]); | |
2924 | ||
2925 | ctrl_info->num_msix_vectors_initialized = 0; | |
2926 | } | |
2927 | ||
6c223761 KB |
2928 | static int pqi_enable_msix_interrupts(struct pqi_ctrl_info *ctrl_info) |
2929 | { | |
98bf061b | 2930 | int num_vectors_enabled; |
6c223761 | 2931 | |
98bf061b | 2932 | num_vectors_enabled = pci_alloc_irq_vectors(ctrl_info->pci_dev, |
52198226 CH |
2933 | PQI_MIN_MSIX_VECTORS, ctrl_info->num_queue_groups, |
2934 | PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); | |
98bf061b | 2935 | if (num_vectors_enabled < 0) { |
6c223761 | 2936 | dev_err(&ctrl_info->pci_dev->dev, |
98bf061b KB |
2937 | "MSI-X init failed with error %d\n", |
2938 | num_vectors_enabled); | |
2939 | return num_vectors_enabled; | |
6c223761 KB |
2940 | } |
2941 | ||
98bf061b KB |
2942 | ctrl_info->num_msix_vectors_enabled = num_vectors_enabled; |
2943 | ||
6c223761 KB |
2944 | return 0; |
2945 | } | |
2946 | ||
98bf061b KB |
2947 | static void pqi_disable_msix_interrupts(struct pqi_ctrl_info *ctrl_info) |
2948 | { | |
2949 | if (ctrl_info->num_msix_vectors_enabled) { | |
2950 | pci_free_irq_vectors(ctrl_info->pci_dev); | |
2951 | ctrl_info->num_msix_vectors_enabled = 0; | |
2952 | } | |
2953 | } | |
2954 | ||
6c223761 KB |
2955 | static int pqi_alloc_operational_queues(struct pqi_ctrl_info *ctrl_info) |
2956 | { | |
2957 | unsigned int i; | |
2958 | size_t alloc_length; | |
2959 | size_t element_array_length_per_iq; | |
2960 | size_t element_array_length_per_oq; | |
2961 | void *element_array; | |
2962 | void *next_queue_index; | |
2963 | void *aligned_pointer; | |
2964 | unsigned int num_inbound_queues; | |
2965 | unsigned int num_outbound_queues; | |
2966 | unsigned int num_queue_indexes; | |
2967 | struct pqi_queue_group *queue_group; | |
2968 | ||
2969 | element_array_length_per_iq = | |
2970 | PQI_OPERATIONAL_IQ_ELEMENT_LENGTH * | |
2971 | ctrl_info->num_elements_per_iq; | |
2972 | element_array_length_per_oq = | |
2973 | PQI_OPERATIONAL_OQ_ELEMENT_LENGTH * | |
2974 | ctrl_info->num_elements_per_oq; | |
2975 | num_inbound_queues = ctrl_info->num_queue_groups * 2; | |
2976 | num_outbound_queues = ctrl_info->num_queue_groups; | |
2977 | num_queue_indexes = (ctrl_info->num_queue_groups * 3) + 1; | |
2978 | ||
2979 | aligned_pointer = NULL; | |
2980 | ||
2981 | for (i = 0; i < num_inbound_queues; i++) { | |
2982 | aligned_pointer = PTR_ALIGN(aligned_pointer, | |
2983 | PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); | |
2984 | aligned_pointer += element_array_length_per_iq; | |
2985 | } | |
2986 | ||
2987 | for (i = 0; i < num_outbound_queues; i++) { | |
2988 | aligned_pointer = PTR_ALIGN(aligned_pointer, | |
2989 | PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); | |
2990 | aligned_pointer += element_array_length_per_oq; | |
2991 | } | |
2992 | ||
2993 | aligned_pointer = PTR_ALIGN(aligned_pointer, | |
2994 | PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); | |
2995 | aligned_pointer += PQI_NUM_EVENT_QUEUE_ELEMENTS * | |
2996 | PQI_EVENT_OQ_ELEMENT_LENGTH; | |
2997 | ||
2998 | for (i = 0; i < num_queue_indexes; i++) { | |
2999 | aligned_pointer = PTR_ALIGN(aligned_pointer, | |
3000 | PQI_OPERATIONAL_INDEX_ALIGNMENT); | |
3001 | aligned_pointer += sizeof(pqi_index_t); | |
3002 | } | |
3003 | ||
3004 | alloc_length = (size_t)aligned_pointer + | |
3005 | PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT; | |
3006 | ||
3007 | ctrl_info->queue_memory_base = | |
3008 | dma_zalloc_coherent(&ctrl_info->pci_dev->dev, | |
3009 | alloc_length, | |
3010 | &ctrl_info->queue_memory_base_dma_handle, GFP_KERNEL); | |
3011 | ||
3012 | if (!ctrl_info->queue_memory_base) { | |
3013 | dev_err(&ctrl_info->pci_dev->dev, | |
3014 | "failed to allocate memory for PQI admin queues\n"); | |
3015 | return -ENOMEM; | |
3016 | } | |
3017 | ||
3018 | ctrl_info->queue_memory_length = alloc_length; | |
3019 | ||
3020 | element_array = PTR_ALIGN(ctrl_info->queue_memory_base, | |
3021 | PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); | |
3022 | ||
3023 | for (i = 0; i < ctrl_info->num_queue_groups; i++) { | |
3024 | queue_group = &ctrl_info->queue_groups[i]; | |
3025 | queue_group->iq_element_array[RAID_PATH] = element_array; | |
3026 | queue_group->iq_element_array_bus_addr[RAID_PATH] = | |
3027 | ctrl_info->queue_memory_base_dma_handle + | |
3028 | (element_array - ctrl_info->queue_memory_base); | |
3029 | element_array += element_array_length_per_iq; | |
3030 | element_array = PTR_ALIGN(element_array, | |
3031 | PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); | |
3032 | queue_group->iq_element_array[AIO_PATH] = element_array; | |
3033 | queue_group->iq_element_array_bus_addr[AIO_PATH] = | |
3034 | ctrl_info->queue_memory_base_dma_handle + | |
3035 | (element_array - ctrl_info->queue_memory_base); | |
3036 | element_array += element_array_length_per_iq; | |
3037 | element_array = PTR_ALIGN(element_array, | |
3038 | PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); | |
3039 | } | |
3040 | ||
3041 | for (i = 0; i < ctrl_info->num_queue_groups; i++) { | |
3042 | queue_group = &ctrl_info->queue_groups[i]; | |
3043 | queue_group->oq_element_array = element_array; | |
3044 | queue_group->oq_element_array_bus_addr = | |
3045 | ctrl_info->queue_memory_base_dma_handle + | |
3046 | (element_array - ctrl_info->queue_memory_base); | |
3047 | element_array += element_array_length_per_oq; | |
3048 | element_array = PTR_ALIGN(element_array, | |
3049 | PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); | |
3050 | } | |
3051 | ||
3052 | ctrl_info->event_queue.oq_element_array = element_array; | |
3053 | ctrl_info->event_queue.oq_element_array_bus_addr = | |
3054 | ctrl_info->queue_memory_base_dma_handle + | |
3055 | (element_array - ctrl_info->queue_memory_base); | |
3056 | element_array += PQI_NUM_EVENT_QUEUE_ELEMENTS * | |
3057 | PQI_EVENT_OQ_ELEMENT_LENGTH; | |
3058 | ||
3059 | next_queue_index = PTR_ALIGN(element_array, | |
3060 | PQI_OPERATIONAL_INDEX_ALIGNMENT); | |
3061 | ||
3062 | for (i = 0; i < ctrl_info->num_queue_groups; i++) { | |
3063 | queue_group = &ctrl_info->queue_groups[i]; | |
3064 | queue_group->iq_ci[RAID_PATH] = next_queue_index; | |
3065 | queue_group->iq_ci_bus_addr[RAID_PATH] = | |
3066 | ctrl_info->queue_memory_base_dma_handle + | |
3067 | (next_queue_index - ctrl_info->queue_memory_base); | |
3068 | next_queue_index += sizeof(pqi_index_t); | |
3069 | next_queue_index = PTR_ALIGN(next_queue_index, | |
3070 | PQI_OPERATIONAL_INDEX_ALIGNMENT); | |
3071 | queue_group->iq_ci[AIO_PATH] = next_queue_index; | |
3072 | queue_group->iq_ci_bus_addr[AIO_PATH] = | |
3073 | ctrl_info->queue_memory_base_dma_handle + | |
3074 | (next_queue_index - ctrl_info->queue_memory_base); | |
3075 | next_queue_index += sizeof(pqi_index_t); | |
3076 | next_queue_index = PTR_ALIGN(next_queue_index, | |
3077 | PQI_OPERATIONAL_INDEX_ALIGNMENT); | |
3078 | queue_group->oq_pi = next_queue_index; | |
3079 | queue_group->oq_pi_bus_addr = | |
3080 | ctrl_info->queue_memory_base_dma_handle + | |
3081 | (next_queue_index - ctrl_info->queue_memory_base); | |
3082 | next_queue_index += sizeof(pqi_index_t); | |
3083 | next_queue_index = PTR_ALIGN(next_queue_index, | |
3084 | PQI_OPERATIONAL_INDEX_ALIGNMENT); | |
3085 | } | |
3086 | ||
3087 | ctrl_info->event_queue.oq_pi = next_queue_index; | |
3088 | ctrl_info->event_queue.oq_pi_bus_addr = | |
3089 | ctrl_info->queue_memory_base_dma_handle + | |
3090 | (next_queue_index - ctrl_info->queue_memory_base); | |
3091 | ||
3092 | return 0; | |
3093 | } | |
3094 | ||
3095 | static void pqi_init_operational_queues(struct pqi_ctrl_info *ctrl_info) | |
3096 | { | |
3097 | unsigned int i; | |
3098 | u16 next_iq_id = PQI_MIN_OPERATIONAL_QUEUE_ID; | |
3099 | u16 next_oq_id = PQI_MIN_OPERATIONAL_QUEUE_ID; | |
3100 | ||
3101 | /* | |
3102 | * Initialize the backpointers to the controller structure in | |
3103 | * each operational queue group structure. | |
3104 | */ | |
3105 | for (i = 0; i < ctrl_info->num_queue_groups; i++) | |
3106 | ctrl_info->queue_groups[i].ctrl_info = ctrl_info; | |
3107 | ||
3108 | /* | |
3109 | * Assign IDs to all operational queues. Note that the IDs | |
3110 | * assigned to operational IQs are independent of the IDs | |
3111 | * assigned to operational OQs. | |
3112 | */ | |
3113 | ctrl_info->event_queue.oq_id = next_oq_id++; | |
3114 | for (i = 0; i < ctrl_info->num_queue_groups; i++) { | |
3115 | ctrl_info->queue_groups[i].iq_id[RAID_PATH] = next_iq_id++; | |
3116 | ctrl_info->queue_groups[i].iq_id[AIO_PATH] = next_iq_id++; | |
3117 | ctrl_info->queue_groups[i].oq_id = next_oq_id++; | |
3118 | } | |
3119 | ||
3120 | /* | |
3121 | * Assign MSI-X table entry indexes to all queues. Note that the | |
3122 | * interrupt for the event queue is shared with the first queue group. | |
3123 | */ | |
3124 | ctrl_info->event_queue.int_msg_num = 0; | |
3125 | for (i = 0; i < ctrl_info->num_queue_groups; i++) | |
3126 | ctrl_info->queue_groups[i].int_msg_num = i; | |
3127 | ||
3128 | for (i = 0; i < ctrl_info->num_queue_groups; i++) { | |
3129 | spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[0]); | |
3130 | spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[1]); | |
3131 | INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[0]); | |
3132 | INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[1]); | |
3133 | } | |
3134 | } | |
3135 | ||
3136 | static int pqi_alloc_admin_queues(struct pqi_ctrl_info *ctrl_info) | |
3137 | { | |
3138 | size_t alloc_length; | |
3139 | struct pqi_admin_queues_aligned *admin_queues_aligned; | |
3140 | struct pqi_admin_queues *admin_queues; | |
3141 | ||
3142 | alloc_length = sizeof(struct pqi_admin_queues_aligned) + | |
3143 | PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT; | |
3144 | ||
3145 | ctrl_info->admin_queue_memory_base = | |
3146 | dma_zalloc_coherent(&ctrl_info->pci_dev->dev, | |
3147 | alloc_length, | |
3148 | &ctrl_info->admin_queue_memory_base_dma_handle, | |
3149 | GFP_KERNEL); | |
3150 | ||
3151 | if (!ctrl_info->admin_queue_memory_base) | |
3152 | return -ENOMEM; | |
3153 | ||
3154 | ctrl_info->admin_queue_memory_length = alloc_length; | |
3155 | ||
3156 | admin_queues = &ctrl_info->admin_queues; | |
3157 | admin_queues_aligned = PTR_ALIGN(ctrl_info->admin_queue_memory_base, | |
3158 | PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); | |
3159 | admin_queues->iq_element_array = | |
3160 | &admin_queues_aligned->iq_element_array; | |
3161 | admin_queues->oq_element_array = | |
3162 | &admin_queues_aligned->oq_element_array; | |
3163 | admin_queues->iq_ci = &admin_queues_aligned->iq_ci; | |
3164 | admin_queues->oq_pi = &admin_queues_aligned->oq_pi; | |
3165 | ||
3166 | admin_queues->iq_element_array_bus_addr = | |
3167 | ctrl_info->admin_queue_memory_base_dma_handle + | |
3168 | (admin_queues->iq_element_array - | |
3169 | ctrl_info->admin_queue_memory_base); | |
3170 | admin_queues->oq_element_array_bus_addr = | |
3171 | ctrl_info->admin_queue_memory_base_dma_handle + | |
3172 | (admin_queues->oq_element_array - | |
3173 | ctrl_info->admin_queue_memory_base); | |
3174 | admin_queues->iq_ci_bus_addr = | |
3175 | ctrl_info->admin_queue_memory_base_dma_handle + | |
3176 | ((void *)admin_queues->iq_ci - | |
3177 | ctrl_info->admin_queue_memory_base); | |
3178 | admin_queues->oq_pi_bus_addr = | |
3179 | ctrl_info->admin_queue_memory_base_dma_handle + | |
3180 | ((void *)admin_queues->oq_pi - | |
3181 | ctrl_info->admin_queue_memory_base); | |
3182 | ||
3183 | return 0; | |
3184 | } | |
3185 | ||
3186 | #define PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES HZ | |
3187 | #define PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS 1 | |
3188 | ||
3189 | static int pqi_create_admin_queues(struct pqi_ctrl_info *ctrl_info) | |
3190 | { | |
3191 | struct pqi_device_registers __iomem *pqi_registers; | |
3192 | struct pqi_admin_queues *admin_queues; | |
3193 | unsigned long timeout; | |
3194 | u8 status; | |
3195 | u32 reg; | |
3196 | ||
3197 | pqi_registers = ctrl_info->pqi_registers; | |
3198 | admin_queues = &ctrl_info->admin_queues; | |
3199 | ||
3200 | writeq((u64)admin_queues->iq_element_array_bus_addr, | |
3201 | &pqi_registers->admin_iq_element_array_addr); | |
3202 | writeq((u64)admin_queues->oq_element_array_bus_addr, | |
3203 | &pqi_registers->admin_oq_element_array_addr); | |
3204 | writeq((u64)admin_queues->iq_ci_bus_addr, | |
3205 | &pqi_registers->admin_iq_ci_addr); | |
3206 | writeq((u64)admin_queues->oq_pi_bus_addr, | |
3207 | &pqi_registers->admin_oq_pi_addr); | |
3208 | ||
3209 | reg = PQI_ADMIN_IQ_NUM_ELEMENTS | | |
3210 | (PQI_ADMIN_OQ_NUM_ELEMENTS) << 8 | | |
3211 | (admin_queues->int_msg_num << 16); | |
3212 | writel(reg, &pqi_registers->admin_iq_num_elements); | |
3213 | writel(PQI_CREATE_ADMIN_QUEUE_PAIR, | |
3214 | &pqi_registers->function_and_status_code); | |
3215 | ||
3216 | timeout = PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES + jiffies; | |
3217 | while (1) { | |
3218 | status = readb(&pqi_registers->function_and_status_code); | |
3219 | if (status == PQI_STATUS_IDLE) | |
3220 | break; | |
3221 | if (time_after(jiffies, timeout)) | |
3222 | return -ETIMEDOUT; | |
3223 | msleep(PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS); | |
3224 | } | |
3225 | ||
3226 | /* | |
3227 | * The offset registers are not initialized to the correct | |
3228 | * offsets until *after* the create admin queue pair command | |
3229 | * completes successfully. | |
3230 | */ | |
3231 | admin_queues->iq_pi = ctrl_info->iomem_base + | |
3232 | PQI_DEVICE_REGISTERS_OFFSET + | |
3233 | readq(&pqi_registers->admin_iq_pi_offset); | |
3234 | admin_queues->oq_ci = ctrl_info->iomem_base + | |
3235 | PQI_DEVICE_REGISTERS_OFFSET + | |
3236 | readq(&pqi_registers->admin_oq_ci_offset); | |
3237 | ||
3238 | return 0; | |
3239 | } | |
3240 | ||
3241 | static void pqi_submit_admin_request(struct pqi_ctrl_info *ctrl_info, | |
3242 | struct pqi_general_admin_request *request) | |
3243 | { | |
3244 | struct pqi_admin_queues *admin_queues; | |
3245 | void *next_element; | |
3246 | pqi_index_t iq_pi; | |
3247 | ||
3248 | admin_queues = &ctrl_info->admin_queues; | |
3249 | iq_pi = admin_queues->iq_pi_copy; | |
3250 | ||
3251 | next_element = admin_queues->iq_element_array + | |
3252 | (iq_pi * PQI_ADMIN_IQ_ELEMENT_LENGTH); | |
3253 | ||
3254 | memcpy(next_element, request, sizeof(*request)); | |
3255 | ||
3256 | iq_pi = (iq_pi + 1) % PQI_ADMIN_IQ_NUM_ELEMENTS; | |
3257 | admin_queues->iq_pi_copy = iq_pi; | |
3258 | ||
3259 | /* | |
3260 | * This write notifies the controller that an IU is available to be | |
3261 | * processed. | |
3262 | */ | |
3263 | writel(iq_pi, admin_queues->iq_pi); | |
3264 | } | |
3265 | ||
3266 | static int pqi_poll_for_admin_response(struct pqi_ctrl_info *ctrl_info, | |
3267 | struct pqi_general_admin_response *response) | |
3268 | { | |
3269 | struct pqi_admin_queues *admin_queues; | |
3270 | pqi_index_t oq_pi; | |
3271 | pqi_index_t oq_ci; | |
3272 | unsigned long timeout; | |
3273 | ||
3274 | admin_queues = &ctrl_info->admin_queues; | |
3275 | oq_ci = admin_queues->oq_ci_copy; | |
3276 | ||
3277 | timeout = (3 * HZ) + jiffies; | |
3278 | ||
3279 | while (1) { | |
3280 | oq_pi = *admin_queues->oq_pi; | |
3281 | if (oq_pi != oq_ci) | |
3282 | break; | |
3283 | if (time_after(jiffies, timeout)) { | |
3284 | dev_err(&ctrl_info->pci_dev->dev, | |
3285 | "timed out waiting for admin response\n"); | |
3286 | return -ETIMEDOUT; | |
3287 | } | |
3288 | usleep_range(1000, 2000); | |
3289 | } | |
3290 | ||
3291 | memcpy(response, admin_queues->oq_element_array + | |
3292 | (oq_ci * PQI_ADMIN_OQ_ELEMENT_LENGTH), sizeof(*response)); | |
3293 | ||
3294 | oq_ci = (oq_ci + 1) % PQI_ADMIN_OQ_NUM_ELEMENTS; | |
3295 | admin_queues->oq_ci_copy = oq_ci; | |
3296 | writel(oq_ci, admin_queues->oq_ci); | |
3297 | ||
3298 | return 0; | |
3299 | } | |
3300 | ||
3301 | static void pqi_start_io(struct pqi_ctrl_info *ctrl_info, | |
3302 | struct pqi_queue_group *queue_group, enum pqi_io_path path, | |
3303 | struct pqi_io_request *io_request) | |
3304 | { | |
3305 | struct pqi_io_request *next; | |
3306 | void *next_element; | |
3307 | pqi_index_t iq_pi; | |
3308 | pqi_index_t iq_ci; | |
3309 | size_t iu_length; | |
3310 | unsigned long flags; | |
3311 | unsigned int num_elements_needed; | |
3312 | unsigned int num_elements_to_end_of_queue; | |
3313 | size_t copy_count; | |
3314 | struct pqi_iu_header *request; | |
3315 | ||
3316 | spin_lock_irqsave(&queue_group->submit_lock[path], flags); | |
3317 | ||
3318 | if (io_request) | |
3319 | list_add_tail(&io_request->request_list_entry, | |
3320 | &queue_group->request_list[path]); | |
3321 | ||
3322 | iq_pi = queue_group->iq_pi_copy[path]; | |
3323 | ||
3324 | list_for_each_entry_safe(io_request, next, | |
3325 | &queue_group->request_list[path], request_list_entry) { | |
3326 | ||
3327 | request = io_request->iu; | |
3328 | ||
3329 | iu_length = get_unaligned_le16(&request->iu_length) + | |
3330 | PQI_REQUEST_HEADER_LENGTH; | |
3331 | num_elements_needed = | |
3332 | DIV_ROUND_UP(iu_length, | |
3333 | PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); | |
3334 | ||
3335 | iq_ci = *queue_group->iq_ci[path]; | |
3336 | ||
3337 | if (num_elements_needed > pqi_num_elements_free(iq_pi, iq_ci, | |
3338 | ctrl_info->num_elements_per_iq)) | |
3339 | break; | |
3340 | ||
3341 | put_unaligned_le16(queue_group->oq_id, | |
3342 | &request->response_queue_id); | |
3343 | ||
3344 | next_element = queue_group->iq_element_array[path] + | |
3345 | (iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); | |
3346 | ||
3347 | num_elements_to_end_of_queue = | |
3348 | ctrl_info->num_elements_per_iq - iq_pi; | |
3349 | ||
3350 | if (num_elements_needed <= num_elements_to_end_of_queue) { | |
3351 | memcpy(next_element, request, iu_length); | |
3352 | } else { | |
3353 | copy_count = num_elements_to_end_of_queue * | |
3354 | PQI_OPERATIONAL_IQ_ELEMENT_LENGTH; | |
3355 | memcpy(next_element, request, copy_count); | |
3356 | memcpy(queue_group->iq_element_array[path], | |
3357 | (u8 *)request + copy_count, | |
3358 | iu_length - copy_count); | |
3359 | } | |
3360 | ||
3361 | iq_pi = (iq_pi + num_elements_needed) % | |
3362 | ctrl_info->num_elements_per_iq; | |
3363 | ||
3364 | list_del(&io_request->request_list_entry); | |
3365 | } | |
3366 | ||
3367 | if (iq_pi != queue_group->iq_pi_copy[path]) { | |
3368 | queue_group->iq_pi_copy[path] = iq_pi; | |
3369 | /* | |
3370 | * This write notifies the controller that one or more IUs are | |
3371 | * available to be processed. | |
3372 | */ | |
3373 | writel(iq_pi, queue_group->iq_pi[path]); | |
3374 | } | |
3375 | ||
3376 | spin_unlock_irqrestore(&queue_group->submit_lock[path], flags); | |
3377 | } | |
3378 | ||
3379 | static void pqi_raid_synchronous_complete(struct pqi_io_request *io_request, | |
3380 | void *context) | |
3381 | { | |
3382 | struct completion *waiting = context; | |
3383 | ||
3384 | complete(waiting); | |
3385 | } | |
3386 | ||
3387 | static int pqi_submit_raid_request_synchronous_with_io_request( | |
3388 | struct pqi_ctrl_info *ctrl_info, struct pqi_io_request *io_request, | |
3389 | unsigned long timeout_msecs) | |
3390 | { | |
3391 | int rc = 0; | |
3392 | DECLARE_COMPLETION_ONSTACK(wait); | |
3393 | ||
3394 | io_request->io_complete_callback = pqi_raid_synchronous_complete; | |
3395 | io_request->context = &wait; | |
3396 | ||
3397 | pqi_start_io(ctrl_info, | |
3398 | &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH, | |
3399 | io_request); | |
3400 | ||
3401 | if (timeout_msecs == NO_TIMEOUT) { | |
3402 | wait_for_completion_io(&wait); | |
3403 | } else { | |
3404 | if (!wait_for_completion_io_timeout(&wait, | |
3405 | msecs_to_jiffies(timeout_msecs))) { | |
3406 | dev_warn(&ctrl_info->pci_dev->dev, | |
3407 | "command timed out\n"); | |
3408 | rc = -ETIMEDOUT; | |
3409 | } | |
3410 | } | |
3411 | ||
3412 | return rc; | |
3413 | } | |
3414 | ||
3415 | static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info, | |
3416 | struct pqi_iu_header *request, unsigned int flags, | |
3417 | struct pqi_raid_error_info *error_info, unsigned long timeout_msecs) | |
3418 | { | |
3419 | int rc; | |
3420 | struct pqi_io_request *io_request; | |
3421 | unsigned long start_jiffies; | |
3422 | unsigned long msecs_blocked; | |
3423 | size_t iu_length; | |
3424 | ||
3425 | /* | |
3426 | * Note that specifying PQI_SYNC_FLAGS_INTERRUPTABLE and a timeout value | |
3427 | * are mutually exclusive. | |
3428 | */ | |
3429 | ||
3430 | if (flags & PQI_SYNC_FLAGS_INTERRUPTABLE) { | |
3431 | if (down_interruptible(&ctrl_info->sync_request_sem)) | |
3432 | return -ERESTARTSYS; | |
3433 | } else { | |
3434 | if (timeout_msecs == NO_TIMEOUT) { | |
3435 | down(&ctrl_info->sync_request_sem); | |
3436 | } else { | |
3437 | start_jiffies = jiffies; | |
3438 | if (down_timeout(&ctrl_info->sync_request_sem, | |
3439 | msecs_to_jiffies(timeout_msecs))) | |
3440 | return -ETIMEDOUT; | |
3441 | msecs_blocked = | |
3442 | jiffies_to_msecs(jiffies - start_jiffies); | |
3443 | if (msecs_blocked >= timeout_msecs) | |
3444 | return -ETIMEDOUT; | |
3445 | timeout_msecs -= msecs_blocked; | |
3446 | } | |
3447 | } | |
3448 | ||
3449 | io_request = pqi_alloc_io_request(ctrl_info); | |
3450 | ||
3451 | put_unaligned_le16(io_request->index, | |
3452 | &(((struct pqi_raid_path_request *)request)->request_id)); | |
3453 | ||
3454 | if (request->iu_type == PQI_REQUEST_IU_RAID_PATH_IO) | |
3455 | ((struct pqi_raid_path_request *)request)->error_index = | |
3456 | ((struct pqi_raid_path_request *)request)->request_id; | |
3457 | ||
3458 | iu_length = get_unaligned_le16(&request->iu_length) + | |
3459 | PQI_REQUEST_HEADER_LENGTH; | |
3460 | memcpy(io_request->iu, request, iu_length); | |
3461 | ||
3462 | rc = pqi_submit_raid_request_synchronous_with_io_request(ctrl_info, | |
3463 | io_request, timeout_msecs); | |
3464 | ||
3465 | if (error_info) { | |
3466 | if (io_request->error_info) | |
3467 | memcpy(error_info, io_request->error_info, | |
3468 | sizeof(*error_info)); | |
3469 | else | |
3470 | memset(error_info, 0, sizeof(*error_info)); | |
3471 | } else if (rc == 0 && io_request->error_info) { | |
3472 | u8 scsi_status; | |
3473 | struct pqi_raid_error_info *raid_error_info; | |
3474 | ||
3475 | raid_error_info = io_request->error_info; | |
3476 | scsi_status = raid_error_info->status; | |
3477 | ||
3478 | if (scsi_status == SAM_STAT_CHECK_CONDITION && | |
3479 | raid_error_info->data_out_result == | |
3480 | PQI_DATA_IN_OUT_UNDERFLOW) | |
3481 | scsi_status = SAM_STAT_GOOD; | |
3482 | ||
3483 | if (scsi_status != SAM_STAT_GOOD) | |
3484 | rc = -EIO; | |
3485 | } | |
3486 | ||
3487 | pqi_free_io_request(io_request); | |
3488 | ||
3489 | up(&ctrl_info->sync_request_sem); | |
3490 | ||
3491 | return rc; | |
3492 | } | |
3493 | ||
3494 | static int pqi_validate_admin_response( | |
3495 | struct pqi_general_admin_response *response, u8 expected_function_code) | |
3496 | { | |
3497 | if (response->header.iu_type != PQI_RESPONSE_IU_GENERAL_ADMIN) | |
3498 | return -EINVAL; | |
3499 | ||
3500 | if (get_unaligned_le16(&response->header.iu_length) != | |
3501 | PQI_GENERAL_ADMIN_IU_LENGTH) | |
3502 | return -EINVAL; | |
3503 | ||
3504 | if (response->function_code != expected_function_code) | |
3505 | return -EINVAL; | |
3506 | ||
3507 | if (response->status != PQI_GENERAL_ADMIN_STATUS_SUCCESS) | |
3508 | return -EINVAL; | |
3509 | ||
3510 | return 0; | |
3511 | } | |
3512 | ||
3513 | static int pqi_submit_admin_request_synchronous( | |
3514 | struct pqi_ctrl_info *ctrl_info, | |
3515 | struct pqi_general_admin_request *request, | |
3516 | struct pqi_general_admin_response *response) | |
3517 | { | |
3518 | int rc; | |
3519 | ||
3520 | pqi_submit_admin_request(ctrl_info, request); | |
3521 | ||
3522 | rc = pqi_poll_for_admin_response(ctrl_info, response); | |
3523 | ||
3524 | if (rc == 0) | |
3525 | rc = pqi_validate_admin_response(response, | |
3526 | request->function_code); | |
3527 | ||
3528 | return rc; | |
3529 | } | |
3530 | ||
3531 | static int pqi_report_device_capability(struct pqi_ctrl_info *ctrl_info) | |
3532 | { | |
3533 | int rc; | |
3534 | struct pqi_general_admin_request request; | |
3535 | struct pqi_general_admin_response response; | |
3536 | struct pqi_device_capability *capability; | |
3537 | struct pqi_iu_layer_descriptor *sop_iu_layer_descriptor; | |
3538 | ||
3539 | capability = kmalloc(sizeof(*capability), GFP_KERNEL); | |
3540 | if (!capability) | |
3541 | return -ENOMEM; | |
3542 | ||
3543 | memset(&request, 0, sizeof(request)); | |
3544 | ||
3545 | request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; | |
3546 | put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, | |
3547 | &request.header.iu_length); | |
3548 | request.function_code = | |
3549 | PQI_GENERAL_ADMIN_FUNCTION_REPORT_DEVICE_CAPABILITY; | |
3550 | put_unaligned_le32(sizeof(*capability), | |
3551 | &request.data.report_device_capability.buffer_length); | |
3552 | ||
3553 | rc = pqi_map_single(ctrl_info->pci_dev, | |
3554 | &request.data.report_device_capability.sg_descriptor, | |
3555 | capability, sizeof(*capability), | |
3556 | PCI_DMA_FROMDEVICE); | |
3557 | if (rc) | |
3558 | goto out; | |
3559 | ||
3560 | rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, | |
3561 | &response); | |
3562 | ||
3563 | pqi_pci_unmap(ctrl_info->pci_dev, | |
3564 | &request.data.report_device_capability.sg_descriptor, 1, | |
3565 | PCI_DMA_FROMDEVICE); | |
3566 | ||
3567 | if (rc) | |
3568 | goto out; | |
3569 | ||
3570 | if (response.status != PQI_GENERAL_ADMIN_STATUS_SUCCESS) { | |
3571 | rc = -EIO; | |
3572 | goto out; | |
3573 | } | |
3574 | ||
3575 | ctrl_info->max_inbound_queues = | |
3576 | get_unaligned_le16(&capability->max_inbound_queues); | |
3577 | ctrl_info->max_elements_per_iq = | |
3578 | get_unaligned_le16(&capability->max_elements_per_iq); | |
3579 | ctrl_info->max_iq_element_length = | |
3580 | get_unaligned_le16(&capability->max_iq_element_length) | |
3581 | * 16; | |
3582 | ctrl_info->max_outbound_queues = | |
3583 | get_unaligned_le16(&capability->max_outbound_queues); | |
3584 | ctrl_info->max_elements_per_oq = | |
3585 | get_unaligned_le16(&capability->max_elements_per_oq); | |
3586 | ctrl_info->max_oq_element_length = | |
3587 | get_unaligned_le16(&capability->max_oq_element_length) | |
3588 | * 16; | |
3589 | ||
3590 | sop_iu_layer_descriptor = | |
3591 | &capability->iu_layer_descriptors[PQI_PROTOCOL_SOP]; | |
3592 | ||
3593 | ctrl_info->max_inbound_iu_length_per_firmware = | |
3594 | get_unaligned_le16( | |
3595 | &sop_iu_layer_descriptor->max_inbound_iu_length); | |
3596 | ctrl_info->inbound_spanning_supported = | |
3597 | sop_iu_layer_descriptor->inbound_spanning_supported; | |
3598 | ctrl_info->outbound_spanning_supported = | |
3599 | sop_iu_layer_descriptor->outbound_spanning_supported; | |
3600 | ||
3601 | out: | |
3602 | kfree(capability); | |
3603 | ||
3604 | return rc; | |
3605 | } | |
3606 | ||
3607 | static int pqi_validate_device_capability(struct pqi_ctrl_info *ctrl_info) | |
3608 | { | |
3609 | if (ctrl_info->max_iq_element_length < | |
3610 | PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) { | |
3611 | dev_err(&ctrl_info->pci_dev->dev, | |
3612 | "max. inbound queue element length of %d is less than the required length of %d\n", | |
3613 | ctrl_info->max_iq_element_length, | |
3614 | PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); | |
3615 | return -EINVAL; | |
3616 | } | |
3617 | ||
3618 | if (ctrl_info->max_oq_element_length < | |
3619 | PQI_OPERATIONAL_OQ_ELEMENT_LENGTH) { | |
3620 | dev_err(&ctrl_info->pci_dev->dev, | |
3621 | "max. outbound queue element length of %d is less than the required length of %d\n", | |
3622 | ctrl_info->max_oq_element_length, | |
3623 | PQI_OPERATIONAL_OQ_ELEMENT_LENGTH); | |
3624 | return -EINVAL; | |
3625 | } | |
3626 | ||
3627 | if (ctrl_info->max_inbound_iu_length_per_firmware < | |
3628 | PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) { | |
3629 | dev_err(&ctrl_info->pci_dev->dev, | |
3630 | "max. inbound IU length of %u is less than the min. required length of %d\n", | |
3631 | ctrl_info->max_inbound_iu_length_per_firmware, | |
3632 | PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); | |
3633 | return -EINVAL; | |
3634 | } | |
3635 | ||
77668f41 KB |
3636 | if (!ctrl_info->inbound_spanning_supported) { |
3637 | dev_err(&ctrl_info->pci_dev->dev, | |
3638 | "the controller does not support inbound spanning\n"); | |
3639 | return -EINVAL; | |
3640 | } | |
3641 | ||
3642 | if (ctrl_info->outbound_spanning_supported) { | |
3643 | dev_err(&ctrl_info->pci_dev->dev, | |
3644 | "the controller supports outbound spanning but this driver does not\n"); | |
3645 | return -EINVAL; | |
3646 | } | |
3647 | ||
6c223761 KB |
3648 | return 0; |
3649 | } | |
3650 | ||
3651 | static int pqi_delete_operational_queue(struct pqi_ctrl_info *ctrl_info, | |
3652 | bool inbound_queue, u16 queue_id) | |
3653 | { | |
3654 | struct pqi_general_admin_request request; | |
3655 | struct pqi_general_admin_response response; | |
3656 | ||
3657 | memset(&request, 0, sizeof(request)); | |
3658 | request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; | |
3659 | put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, | |
3660 | &request.header.iu_length); | |
3661 | if (inbound_queue) | |
3662 | request.function_code = | |
3663 | PQI_GENERAL_ADMIN_FUNCTION_DELETE_IQ; | |
3664 | else | |
3665 | request.function_code = | |
3666 | PQI_GENERAL_ADMIN_FUNCTION_DELETE_OQ; | |
3667 | put_unaligned_le16(queue_id, | |
3668 | &request.data.delete_operational_queue.queue_id); | |
3669 | ||
3670 | return pqi_submit_admin_request_synchronous(ctrl_info, &request, | |
3671 | &response); | |
3672 | } | |
3673 | ||
3674 | static int pqi_create_event_queue(struct pqi_ctrl_info *ctrl_info) | |
3675 | { | |
3676 | int rc; | |
3677 | struct pqi_event_queue *event_queue; | |
3678 | struct pqi_general_admin_request request; | |
3679 | struct pqi_general_admin_response response; | |
3680 | ||
3681 | event_queue = &ctrl_info->event_queue; | |
3682 | ||
3683 | /* | |
3684 | * Create OQ (Outbound Queue - device to host queue) to dedicate | |
3685 | * to events. | |
3686 | */ | |
3687 | memset(&request, 0, sizeof(request)); | |
3688 | request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; | |
3689 | put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, | |
3690 | &request.header.iu_length); | |
3691 | request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ; | |
3692 | put_unaligned_le16(event_queue->oq_id, | |
3693 | &request.data.create_operational_oq.queue_id); | |
3694 | put_unaligned_le64((u64)event_queue->oq_element_array_bus_addr, | |
3695 | &request.data.create_operational_oq.element_array_addr); | |
3696 | put_unaligned_le64((u64)event_queue->oq_pi_bus_addr, | |
3697 | &request.data.create_operational_oq.pi_addr); | |
3698 | put_unaligned_le16(PQI_NUM_EVENT_QUEUE_ELEMENTS, | |
3699 | &request.data.create_operational_oq.num_elements); | |
3700 | put_unaligned_le16(PQI_EVENT_OQ_ELEMENT_LENGTH / 16, | |
3701 | &request.data.create_operational_oq.element_length); | |
3702 | request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP; | |
3703 | put_unaligned_le16(event_queue->int_msg_num, | |
3704 | &request.data.create_operational_oq.int_msg_num); | |
3705 | ||
3706 | rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, | |
3707 | &response); | |
3708 | if (rc) | |
3709 | return rc; | |
3710 | ||
3711 | event_queue->oq_ci = ctrl_info->iomem_base + | |
3712 | PQI_DEVICE_REGISTERS_OFFSET + | |
3713 | get_unaligned_le64( | |
3714 | &response.data.create_operational_oq.oq_ci_offset); | |
3715 | ||
3716 | return 0; | |
3717 | } | |
3718 | ||
3719 | static int pqi_create_queue_group(struct pqi_ctrl_info *ctrl_info) | |
3720 | { | |
3721 | unsigned int i; | |
3722 | int rc; | |
3723 | struct pqi_queue_group *queue_group; | |
3724 | struct pqi_general_admin_request request; | |
3725 | struct pqi_general_admin_response response; | |
3726 | ||
3727 | i = ctrl_info->num_active_queue_groups; | |
3728 | queue_group = &ctrl_info->queue_groups[i]; | |
3729 | ||
3730 | /* | |
3731 | * Create IQ (Inbound Queue - host to device queue) for | |
3732 | * RAID path. | |
3733 | */ | |
3734 | memset(&request, 0, sizeof(request)); | |
3735 | request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; | |
3736 | put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, | |
3737 | &request.header.iu_length); | |
3738 | request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ; | |
3739 | put_unaligned_le16(queue_group->iq_id[RAID_PATH], | |
3740 | &request.data.create_operational_iq.queue_id); | |
3741 | put_unaligned_le64( | |
3742 | (u64)queue_group->iq_element_array_bus_addr[RAID_PATH], | |
3743 | &request.data.create_operational_iq.element_array_addr); | |
3744 | put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[RAID_PATH], | |
3745 | &request.data.create_operational_iq.ci_addr); | |
3746 | put_unaligned_le16(ctrl_info->num_elements_per_iq, | |
3747 | &request.data.create_operational_iq.num_elements); | |
3748 | put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16, | |
3749 | &request.data.create_operational_iq.element_length); | |
3750 | request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP; | |
3751 | ||
3752 | rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, | |
3753 | &response); | |
3754 | if (rc) { | |
3755 | dev_err(&ctrl_info->pci_dev->dev, | |
3756 | "error creating inbound RAID queue\n"); | |
3757 | return rc; | |
3758 | } | |
3759 | ||
3760 | queue_group->iq_pi[RAID_PATH] = ctrl_info->iomem_base + | |
3761 | PQI_DEVICE_REGISTERS_OFFSET + | |
3762 | get_unaligned_le64( | |
3763 | &response.data.create_operational_iq.iq_pi_offset); | |
3764 | ||
3765 | /* | |
3766 | * Create IQ (Inbound Queue - host to device queue) for | |
3767 | * Advanced I/O (AIO) path. | |
3768 | */ | |
3769 | memset(&request, 0, sizeof(request)); | |
3770 | request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; | |
3771 | put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, | |
3772 | &request.header.iu_length); | |
3773 | request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ; | |
3774 | put_unaligned_le16(queue_group->iq_id[AIO_PATH], | |
3775 | &request.data.create_operational_iq.queue_id); | |
3776 | put_unaligned_le64((u64)queue_group-> | |
3777 | iq_element_array_bus_addr[AIO_PATH], | |
3778 | &request.data.create_operational_iq.element_array_addr); | |
3779 | put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[AIO_PATH], | |
3780 | &request.data.create_operational_iq.ci_addr); | |
3781 | put_unaligned_le16(ctrl_info->num_elements_per_iq, | |
3782 | &request.data.create_operational_iq.num_elements); | |
3783 | put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16, | |
3784 | &request.data.create_operational_iq.element_length); | |
3785 | request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP; | |
3786 | ||
3787 | rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, | |
3788 | &response); | |
3789 | if (rc) { | |
3790 | dev_err(&ctrl_info->pci_dev->dev, | |
3791 | "error creating inbound AIO queue\n"); | |
3792 | goto delete_inbound_queue_raid; | |
3793 | } | |
3794 | ||
3795 | queue_group->iq_pi[AIO_PATH] = ctrl_info->iomem_base + | |
3796 | PQI_DEVICE_REGISTERS_OFFSET + | |
3797 | get_unaligned_le64( | |
3798 | &response.data.create_operational_iq.iq_pi_offset); | |
3799 | ||
3800 | /* | |
3801 | * Designate the 2nd IQ as the AIO path. By default, all IQs are | |
3802 | * assumed to be for RAID path I/O unless we change the queue's | |
3803 | * property. | |
3804 | */ | |
3805 | memset(&request, 0, sizeof(request)); | |
3806 | request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; | |
3807 | put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, | |
3808 | &request.header.iu_length); | |
3809 | request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CHANGE_IQ_PROPERTY; | |
3810 | put_unaligned_le16(queue_group->iq_id[AIO_PATH], | |
3811 | &request.data.change_operational_iq_properties.queue_id); | |
3812 | put_unaligned_le32(PQI_IQ_PROPERTY_IS_AIO_QUEUE, | |
3813 | &request.data.change_operational_iq_properties.vendor_specific); | |
3814 | ||
3815 | rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, | |
3816 | &response); | |
3817 | if (rc) { | |
3818 | dev_err(&ctrl_info->pci_dev->dev, | |
3819 | "error changing queue property\n"); | |
3820 | goto delete_inbound_queue_aio; | |
3821 | } | |
3822 | ||
3823 | /* | |
3824 | * Create OQ (Outbound Queue - device to host queue). | |
3825 | */ | |
3826 | memset(&request, 0, sizeof(request)); | |
3827 | request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; | |
3828 | put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, | |
3829 | &request.header.iu_length); | |
3830 | request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ; | |
3831 | put_unaligned_le16(queue_group->oq_id, | |
3832 | &request.data.create_operational_oq.queue_id); | |
3833 | put_unaligned_le64((u64)queue_group->oq_element_array_bus_addr, | |
3834 | &request.data.create_operational_oq.element_array_addr); | |
3835 | put_unaligned_le64((u64)queue_group->oq_pi_bus_addr, | |
3836 | &request.data.create_operational_oq.pi_addr); | |
3837 | put_unaligned_le16(ctrl_info->num_elements_per_oq, | |
3838 | &request.data.create_operational_oq.num_elements); | |
3839 | put_unaligned_le16(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH / 16, | |
3840 | &request.data.create_operational_oq.element_length); | |
3841 | request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP; | |
3842 | put_unaligned_le16(queue_group->int_msg_num, | |
3843 | &request.data.create_operational_oq.int_msg_num); | |
3844 | ||
3845 | rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, | |
3846 | &response); | |
3847 | if (rc) { | |
3848 | dev_err(&ctrl_info->pci_dev->dev, | |
3849 | "error creating outbound queue\n"); | |
3850 | goto delete_inbound_queue_aio; | |
3851 | } | |
3852 | ||
3853 | queue_group->oq_ci = ctrl_info->iomem_base + | |
3854 | PQI_DEVICE_REGISTERS_OFFSET + | |
3855 | get_unaligned_le64( | |
3856 | &response.data.create_operational_oq.oq_ci_offset); | |
3857 | ||
3858 | ctrl_info->num_active_queue_groups++; | |
3859 | ||
3860 | return 0; | |
3861 | ||
3862 | delete_inbound_queue_aio: | |
3863 | pqi_delete_operational_queue(ctrl_info, true, | |
3864 | queue_group->iq_id[AIO_PATH]); | |
3865 | ||
3866 | delete_inbound_queue_raid: | |
3867 | pqi_delete_operational_queue(ctrl_info, true, | |
3868 | queue_group->iq_id[RAID_PATH]); | |
3869 | ||
3870 | return rc; | |
3871 | } | |
3872 | ||
3873 | static int pqi_create_queues(struct pqi_ctrl_info *ctrl_info) | |
3874 | { | |
3875 | int rc; | |
3876 | unsigned int i; | |
3877 | ||
3878 | rc = pqi_create_event_queue(ctrl_info); | |
3879 | if (rc) { | |
3880 | dev_err(&ctrl_info->pci_dev->dev, | |
3881 | "error creating event queue\n"); | |
3882 | return rc; | |
3883 | } | |
3884 | ||
3885 | for (i = 0; i < ctrl_info->num_queue_groups; i++) { | |
3886 | rc = pqi_create_queue_group(ctrl_info); | |
3887 | if (rc) { | |
3888 | dev_err(&ctrl_info->pci_dev->dev, | |
3889 | "error creating queue group number %u/%u\n", | |
3890 | i, ctrl_info->num_queue_groups); | |
3891 | return rc; | |
3892 | } | |
3893 | } | |
3894 | ||
3895 | return 0; | |
3896 | } | |
3897 | ||
3898 | #define PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH \ | |
3899 | (offsetof(struct pqi_event_config, descriptors) + \ | |
3900 | (PQI_MAX_EVENT_DESCRIPTORS * sizeof(struct pqi_event_descriptor))) | |
3901 | ||
3902 | static int pqi_configure_events(struct pqi_ctrl_info *ctrl_info) | |
3903 | { | |
3904 | int rc; | |
3905 | unsigned int i; | |
3906 | struct pqi_event_config *event_config; | |
3907 | struct pqi_general_management_request request; | |
3908 | ||
3909 | event_config = kmalloc(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, | |
3910 | GFP_KERNEL); | |
3911 | if (!event_config) | |
3912 | return -ENOMEM; | |
3913 | ||
3914 | memset(&request, 0, sizeof(request)); | |
3915 | ||
3916 | request.header.iu_type = PQI_REQUEST_IU_REPORT_VENDOR_EVENT_CONFIG; | |
3917 | put_unaligned_le16(offsetof(struct pqi_general_management_request, | |
3918 | data.report_event_configuration.sg_descriptors[1]) - | |
3919 | PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length); | |
3920 | put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, | |
3921 | &request.data.report_event_configuration.buffer_length); | |
3922 | ||
3923 | rc = pqi_map_single(ctrl_info->pci_dev, | |
3924 | request.data.report_event_configuration.sg_descriptors, | |
3925 | event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, | |
3926 | PCI_DMA_FROMDEVICE); | |
3927 | if (rc) | |
3928 | goto out; | |
3929 | ||
3930 | rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, | |
3931 | 0, NULL, NO_TIMEOUT); | |
3932 | ||
3933 | pqi_pci_unmap(ctrl_info->pci_dev, | |
3934 | request.data.report_event_configuration.sg_descriptors, 1, | |
3935 | PCI_DMA_FROMDEVICE); | |
3936 | ||
3937 | if (rc) | |
3938 | goto out; | |
3939 | ||
3940 | for (i = 0; i < event_config->num_event_descriptors; i++) | |
3941 | put_unaligned_le16(ctrl_info->event_queue.oq_id, | |
3942 | &event_config->descriptors[i].oq_id); | |
3943 | ||
3944 | memset(&request, 0, sizeof(request)); | |
3945 | ||
3946 | request.header.iu_type = PQI_REQUEST_IU_SET_VENDOR_EVENT_CONFIG; | |
3947 | put_unaligned_le16(offsetof(struct pqi_general_management_request, | |
3948 | data.report_event_configuration.sg_descriptors[1]) - | |
3949 | PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length); | |
3950 | put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, | |
3951 | &request.data.report_event_configuration.buffer_length); | |
3952 | ||
3953 | rc = pqi_map_single(ctrl_info->pci_dev, | |
3954 | request.data.report_event_configuration.sg_descriptors, | |
3955 | event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, | |
3956 | PCI_DMA_TODEVICE); | |
3957 | if (rc) | |
3958 | goto out; | |
3959 | ||
3960 | rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, | |
3961 | NULL, NO_TIMEOUT); | |
3962 | ||
3963 | pqi_pci_unmap(ctrl_info->pci_dev, | |
3964 | request.data.report_event_configuration.sg_descriptors, 1, | |
3965 | PCI_DMA_TODEVICE); | |
3966 | ||
3967 | out: | |
3968 | kfree(event_config); | |
3969 | ||
3970 | return rc; | |
3971 | } | |
3972 | ||
3973 | static void pqi_free_all_io_requests(struct pqi_ctrl_info *ctrl_info) | |
3974 | { | |
3975 | unsigned int i; | |
3976 | struct device *dev; | |
3977 | size_t sg_chain_buffer_length; | |
3978 | struct pqi_io_request *io_request; | |
3979 | ||
3980 | if (!ctrl_info->io_request_pool) | |
3981 | return; | |
3982 | ||
3983 | dev = &ctrl_info->pci_dev->dev; | |
3984 | sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length; | |
3985 | io_request = ctrl_info->io_request_pool; | |
3986 | ||
3987 | for (i = 0; i < ctrl_info->max_io_slots; i++) { | |
3988 | kfree(io_request->iu); | |
3989 | if (!io_request->sg_chain_buffer) | |
3990 | break; | |
3991 | dma_free_coherent(dev, sg_chain_buffer_length, | |
3992 | io_request->sg_chain_buffer, | |
3993 | io_request->sg_chain_buffer_dma_handle); | |
3994 | io_request++; | |
3995 | } | |
3996 | ||
3997 | kfree(ctrl_info->io_request_pool); | |
3998 | ctrl_info->io_request_pool = NULL; | |
3999 | } | |
4000 | ||
4001 | static inline int pqi_alloc_error_buffer(struct pqi_ctrl_info *ctrl_info) | |
4002 | { | |
4003 | ctrl_info->error_buffer = dma_zalloc_coherent(&ctrl_info->pci_dev->dev, | |
4004 | ctrl_info->error_buffer_length, | |
4005 | &ctrl_info->error_buffer_dma_handle, GFP_KERNEL); | |
4006 | ||
4007 | if (!ctrl_info->error_buffer) | |
4008 | return -ENOMEM; | |
4009 | ||
4010 | return 0; | |
4011 | } | |
4012 | ||
4013 | static int pqi_alloc_io_resources(struct pqi_ctrl_info *ctrl_info) | |
4014 | { | |
4015 | unsigned int i; | |
4016 | void *sg_chain_buffer; | |
4017 | size_t sg_chain_buffer_length; | |
4018 | dma_addr_t sg_chain_buffer_dma_handle; | |
4019 | struct device *dev; | |
4020 | struct pqi_io_request *io_request; | |
4021 | ||
4022 | ctrl_info->io_request_pool = kzalloc(ctrl_info->max_io_slots * | |
4023 | sizeof(ctrl_info->io_request_pool[0]), GFP_KERNEL); | |
4024 | ||
4025 | if (!ctrl_info->io_request_pool) { | |
4026 | dev_err(&ctrl_info->pci_dev->dev, | |
4027 | "failed to allocate I/O request pool\n"); | |
4028 | goto error; | |
4029 | } | |
4030 | ||
4031 | dev = &ctrl_info->pci_dev->dev; | |
4032 | sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length; | |
4033 | io_request = ctrl_info->io_request_pool; | |
4034 | ||
4035 | for (i = 0; i < ctrl_info->max_io_slots; i++) { | |
4036 | io_request->iu = | |
4037 | kmalloc(ctrl_info->max_inbound_iu_length, GFP_KERNEL); | |
4038 | ||
4039 | if (!io_request->iu) { | |
4040 | dev_err(&ctrl_info->pci_dev->dev, | |
4041 | "failed to allocate IU buffers\n"); | |
4042 | goto error; | |
4043 | } | |
4044 | ||
4045 | sg_chain_buffer = dma_alloc_coherent(dev, | |
4046 | sg_chain_buffer_length, &sg_chain_buffer_dma_handle, | |
4047 | GFP_KERNEL); | |
4048 | ||
4049 | if (!sg_chain_buffer) { | |
4050 | dev_err(&ctrl_info->pci_dev->dev, | |
4051 | "failed to allocate PQI scatter-gather chain buffers\n"); | |
4052 | goto error; | |
4053 | } | |
4054 | ||
4055 | io_request->index = i; | |
4056 | io_request->sg_chain_buffer = sg_chain_buffer; | |
4057 | io_request->sg_chain_buffer_dma_handle = | |
4058 | sg_chain_buffer_dma_handle; | |
4059 | io_request++; | |
4060 | } | |
4061 | ||
4062 | return 0; | |
4063 | ||
4064 | error: | |
4065 | pqi_free_all_io_requests(ctrl_info); | |
4066 | ||
4067 | return -ENOMEM; | |
4068 | } | |
4069 | ||
4070 | /* | |
4071 | * Calculate required resources that are sized based on max. outstanding | |
4072 | * requests and max. transfer size. | |
4073 | */ | |
4074 | ||
4075 | static void pqi_calculate_io_resources(struct pqi_ctrl_info *ctrl_info) | |
4076 | { | |
4077 | u32 max_transfer_size; | |
4078 | u32 max_sg_entries; | |
4079 | ||
4080 | ctrl_info->scsi_ml_can_queue = | |
4081 | ctrl_info->max_outstanding_requests - PQI_RESERVED_IO_SLOTS; | |
4082 | ctrl_info->max_io_slots = ctrl_info->max_outstanding_requests; | |
4083 | ||
4084 | ctrl_info->error_buffer_length = | |
4085 | ctrl_info->max_io_slots * PQI_ERROR_BUFFER_ELEMENT_LENGTH; | |
4086 | ||
4087 | max_transfer_size = | |
4088 | min(ctrl_info->max_transfer_size, PQI_MAX_TRANSFER_SIZE); | |
4089 | ||
4090 | max_sg_entries = max_transfer_size / PAGE_SIZE; | |
4091 | ||
4092 | /* +1 to cover when the buffer is not page-aligned. */ | |
4093 | max_sg_entries++; | |
4094 | ||
4095 | max_sg_entries = min(ctrl_info->max_sg_entries, max_sg_entries); | |
4096 | ||
4097 | max_transfer_size = (max_sg_entries - 1) * PAGE_SIZE; | |
4098 | ||
4099 | ctrl_info->sg_chain_buffer_length = | |
4100 | max_sg_entries * sizeof(struct pqi_sg_descriptor); | |
4101 | ctrl_info->sg_tablesize = max_sg_entries; | |
4102 | ctrl_info->max_sectors = max_transfer_size / 512; | |
4103 | } | |
4104 | ||
4105 | static void pqi_calculate_queue_resources(struct pqi_ctrl_info *ctrl_info) | |
4106 | { | |
4107 | int num_cpus; | |
4108 | int max_queue_groups; | |
4109 | int num_queue_groups; | |
4110 | u16 num_elements_per_iq; | |
4111 | u16 num_elements_per_oq; | |
4112 | ||
4113 | max_queue_groups = min(ctrl_info->max_inbound_queues / 2, | |
4114 | ctrl_info->max_outbound_queues - 1); | |
4115 | max_queue_groups = min(max_queue_groups, PQI_MAX_QUEUE_GROUPS); | |
4116 | ||
4117 | num_cpus = num_online_cpus(); | |
4118 | num_queue_groups = min(num_cpus, ctrl_info->max_msix_vectors); | |
4119 | num_queue_groups = min(num_queue_groups, max_queue_groups); | |
4120 | ||
4121 | ctrl_info->num_queue_groups = num_queue_groups; | |
4122 | ||
77668f41 KB |
4123 | /* |
4124 | * Make sure that the max. inbound IU length is an even multiple | |
4125 | * of our inbound element length. | |
4126 | */ | |
4127 | ctrl_info->max_inbound_iu_length = | |
4128 | (ctrl_info->max_inbound_iu_length_per_firmware / | |
4129 | PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) * | |
4130 | PQI_OPERATIONAL_IQ_ELEMENT_LENGTH; | |
6c223761 KB |
4131 | |
4132 | num_elements_per_iq = | |
4133 | (ctrl_info->max_inbound_iu_length / | |
4134 | PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); | |
4135 | ||
4136 | /* Add one because one element in each queue is unusable. */ | |
4137 | num_elements_per_iq++; | |
4138 | ||
4139 | num_elements_per_iq = min(num_elements_per_iq, | |
4140 | ctrl_info->max_elements_per_iq); | |
4141 | ||
4142 | num_elements_per_oq = ((num_elements_per_iq - 1) * 2) + 1; | |
4143 | num_elements_per_oq = min(num_elements_per_oq, | |
4144 | ctrl_info->max_elements_per_oq); | |
4145 | ||
4146 | ctrl_info->num_elements_per_iq = num_elements_per_iq; | |
4147 | ctrl_info->num_elements_per_oq = num_elements_per_oq; | |
4148 | ||
4149 | ctrl_info->max_sg_per_iu = | |
4150 | ((ctrl_info->max_inbound_iu_length - | |
4151 | PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) / | |
4152 | sizeof(struct pqi_sg_descriptor)) + | |
4153 | PQI_MAX_EMBEDDED_SG_DESCRIPTORS; | |
4154 | } | |
4155 | ||
4156 | static inline void pqi_set_sg_descriptor( | |
4157 | struct pqi_sg_descriptor *sg_descriptor, struct scatterlist *sg) | |
4158 | { | |
4159 | u64 address = (u64)sg_dma_address(sg); | |
4160 | unsigned int length = sg_dma_len(sg); | |
4161 | ||
4162 | put_unaligned_le64(address, &sg_descriptor->address); | |
4163 | put_unaligned_le32(length, &sg_descriptor->length); | |
4164 | put_unaligned_le32(0, &sg_descriptor->flags); | |
4165 | } | |
4166 | ||
4167 | static int pqi_build_raid_sg_list(struct pqi_ctrl_info *ctrl_info, | |
4168 | struct pqi_raid_path_request *request, struct scsi_cmnd *scmd, | |
4169 | struct pqi_io_request *io_request) | |
4170 | { | |
4171 | int i; | |
4172 | u16 iu_length; | |
4173 | int sg_count; | |
4174 | bool chained; | |
4175 | unsigned int num_sg_in_iu; | |
4176 | unsigned int max_sg_per_iu; | |
4177 | struct scatterlist *sg; | |
4178 | struct pqi_sg_descriptor *sg_descriptor; | |
4179 | ||
4180 | sg_count = scsi_dma_map(scmd); | |
4181 | if (sg_count < 0) | |
4182 | return sg_count; | |
4183 | ||
4184 | iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) - | |
4185 | PQI_REQUEST_HEADER_LENGTH; | |
4186 | ||
4187 | if (sg_count == 0) | |
4188 | goto out; | |
4189 | ||
4190 | sg = scsi_sglist(scmd); | |
4191 | sg_descriptor = request->sg_descriptors; | |
4192 | max_sg_per_iu = ctrl_info->max_sg_per_iu - 1; | |
4193 | chained = false; | |
4194 | num_sg_in_iu = 0; | |
4195 | i = 0; | |
4196 | ||
4197 | while (1) { | |
4198 | pqi_set_sg_descriptor(sg_descriptor, sg); | |
4199 | if (!chained) | |
4200 | num_sg_in_iu++; | |
4201 | i++; | |
4202 | if (i == sg_count) | |
4203 | break; | |
4204 | sg_descriptor++; | |
4205 | if (i == max_sg_per_iu) { | |
4206 | put_unaligned_le64( | |
4207 | (u64)io_request->sg_chain_buffer_dma_handle, | |
4208 | &sg_descriptor->address); | |
4209 | put_unaligned_le32((sg_count - num_sg_in_iu) | |
4210 | * sizeof(*sg_descriptor), | |
4211 | &sg_descriptor->length); | |
4212 | put_unaligned_le32(CISS_SG_CHAIN, | |
4213 | &sg_descriptor->flags); | |
4214 | chained = true; | |
4215 | num_sg_in_iu++; | |
4216 | sg_descriptor = io_request->sg_chain_buffer; | |
4217 | } | |
4218 | sg = sg_next(sg); | |
4219 | } | |
4220 | ||
4221 | put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags); | |
4222 | request->partial = chained; | |
4223 | iu_length += num_sg_in_iu * sizeof(*sg_descriptor); | |
4224 | ||
4225 | out: | |
4226 | put_unaligned_le16(iu_length, &request->header.iu_length); | |
4227 | ||
4228 | return 0; | |
4229 | } | |
4230 | ||
4231 | static int pqi_build_aio_sg_list(struct pqi_ctrl_info *ctrl_info, | |
4232 | struct pqi_aio_path_request *request, struct scsi_cmnd *scmd, | |
4233 | struct pqi_io_request *io_request) | |
4234 | { | |
4235 | int i; | |
4236 | u16 iu_length; | |
4237 | int sg_count; | |
a60eec02 KB |
4238 | bool chained; |
4239 | unsigned int num_sg_in_iu; | |
4240 | unsigned int max_sg_per_iu; | |
6c223761 KB |
4241 | struct scatterlist *sg; |
4242 | struct pqi_sg_descriptor *sg_descriptor; | |
4243 | ||
4244 | sg_count = scsi_dma_map(scmd); | |
4245 | if (sg_count < 0) | |
4246 | return sg_count; | |
a60eec02 KB |
4247 | |
4248 | iu_length = offsetof(struct pqi_aio_path_request, sg_descriptors) - | |
4249 | PQI_REQUEST_HEADER_LENGTH; | |
4250 | num_sg_in_iu = 0; | |
4251 | ||
6c223761 KB |
4252 | if (sg_count == 0) |
4253 | goto out; | |
4254 | ||
a60eec02 KB |
4255 | sg = scsi_sglist(scmd); |
4256 | sg_descriptor = request->sg_descriptors; | |
4257 | max_sg_per_iu = ctrl_info->max_sg_per_iu - 1; | |
4258 | chained = false; | |
4259 | i = 0; | |
4260 | ||
4261 | while (1) { | |
4262 | pqi_set_sg_descriptor(sg_descriptor, sg); | |
4263 | if (!chained) | |
4264 | num_sg_in_iu++; | |
4265 | i++; | |
4266 | if (i == sg_count) | |
4267 | break; | |
4268 | sg_descriptor++; | |
4269 | if (i == max_sg_per_iu) { | |
4270 | put_unaligned_le64( | |
4271 | (u64)io_request->sg_chain_buffer_dma_handle, | |
4272 | &sg_descriptor->address); | |
4273 | put_unaligned_le32((sg_count - num_sg_in_iu) | |
4274 | * sizeof(*sg_descriptor), | |
4275 | &sg_descriptor->length); | |
4276 | put_unaligned_le32(CISS_SG_CHAIN, | |
4277 | &sg_descriptor->flags); | |
4278 | chained = true; | |
4279 | num_sg_in_iu++; | |
4280 | sg_descriptor = io_request->sg_chain_buffer; | |
6c223761 | 4281 | } |
a60eec02 | 4282 | sg = sg_next(sg); |
6c223761 KB |
4283 | } |
4284 | ||
a60eec02 KB |
4285 | put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags); |
4286 | request->partial = chained; | |
6c223761 | 4287 | iu_length += num_sg_in_iu * sizeof(*sg_descriptor); |
a60eec02 KB |
4288 | |
4289 | out: | |
6c223761 KB |
4290 | put_unaligned_le16(iu_length, &request->header.iu_length); |
4291 | request->num_sg_descriptors = num_sg_in_iu; | |
4292 | ||
4293 | return 0; | |
4294 | } | |
4295 | ||
4296 | static void pqi_raid_io_complete(struct pqi_io_request *io_request, | |
4297 | void *context) | |
4298 | { | |
4299 | struct scsi_cmnd *scmd; | |
4300 | ||
4301 | scmd = io_request->scmd; | |
4302 | pqi_free_io_request(io_request); | |
4303 | scsi_dma_unmap(scmd); | |
4304 | pqi_scsi_done(scmd); | |
4305 | } | |
4306 | ||
4307 | static int pqi_raid_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info, | |
4308 | struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, | |
4309 | struct pqi_queue_group *queue_group) | |
4310 | { | |
4311 | int rc; | |
4312 | size_t cdb_length; | |
4313 | struct pqi_io_request *io_request; | |
4314 | struct pqi_raid_path_request *request; | |
4315 | ||
4316 | io_request = pqi_alloc_io_request(ctrl_info); | |
4317 | io_request->io_complete_callback = pqi_raid_io_complete; | |
4318 | io_request->scmd = scmd; | |
4319 | ||
4320 | scmd->host_scribble = (unsigned char *)io_request; | |
4321 | ||
4322 | request = io_request->iu; | |
4323 | memset(request, 0, | |
4324 | offsetof(struct pqi_raid_path_request, sg_descriptors)); | |
4325 | ||
4326 | request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO; | |
4327 | put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length); | |
4328 | request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; | |
4329 | put_unaligned_le16(io_request->index, &request->request_id); | |
4330 | request->error_index = request->request_id; | |
4331 | memcpy(request->lun_number, device->scsi3addr, | |
4332 | sizeof(request->lun_number)); | |
4333 | ||
4334 | cdb_length = min_t(size_t, scmd->cmd_len, sizeof(request->cdb)); | |
4335 | memcpy(request->cdb, scmd->cmnd, cdb_length); | |
4336 | ||
4337 | switch (cdb_length) { | |
4338 | case 6: | |
4339 | case 10: | |
4340 | case 12: | |
4341 | case 16: | |
4342 | /* No bytes in the Additional CDB bytes field */ | |
4343 | request->additional_cdb_bytes_usage = | |
4344 | SOP_ADDITIONAL_CDB_BYTES_0; | |
4345 | break; | |
4346 | case 20: | |
4347 | /* 4 bytes in the Additional cdb field */ | |
4348 | request->additional_cdb_bytes_usage = | |
4349 | SOP_ADDITIONAL_CDB_BYTES_4; | |
4350 | break; | |
4351 | case 24: | |
4352 | /* 8 bytes in the Additional cdb field */ | |
4353 | request->additional_cdb_bytes_usage = | |
4354 | SOP_ADDITIONAL_CDB_BYTES_8; | |
4355 | break; | |
4356 | case 28: | |
4357 | /* 12 bytes in the Additional cdb field */ | |
4358 | request->additional_cdb_bytes_usage = | |
4359 | SOP_ADDITIONAL_CDB_BYTES_12; | |
4360 | break; | |
4361 | case 32: | |
4362 | default: | |
4363 | /* 16 bytes in the Additional cdb field */ | |
4364 | request->additional_cdb_bytes_usage = | |
4365 | SOP_ADDITIONAL_CDB_BYTES_16; | |
4366 | break; | |
4367 | } | |
4368 | ||
4369 | switch (scmd->sc_data_direction) { | |
4370 | case DMA_TO_DEVICE: | |
4371 | request->data_direction = SOP_READ_FLAG; | |
4372 | break; | |
4373 | case DMA_FROM_DEVICE: | |
4374 | request->data_direction = SOP_WRITE_FLAG; | |
4375 | break; | |
4376 | case DMA_NONE: | |
4377 | request->data_direction = SOP_NO_DIRECTION_FLAG; | |
4378 | break; | |
4379 | case DMA_BIDIRECTIONAL: | |
4380 | request->data_direction = SOP_BIDIRECTIONAL; | |
4381 | break; | |
4382 | default: | |
4383 | dev_err(&ctrl_info->pci_dev->dev, | |
4384 | "unknown data direction: %d\n", | |
4385 | scmd->sc_data_direction); | |
4386 | WARN_ON(scmd->sc_data_direction); | |
4387 | break; | |
4388 | } | |
4389 | ||
4390 | rc = pqi_build_raid_sg_list(ctrl_info, request, scmd, io_request); | |
4391 | if (rc) { | |
4392 | pqi_free_io_request(io_request); | |
4393 | return SCSI_MLQUEUE_HOST_BUSY; | |
4394 | } | |
4395 | ||
4396 | pqi_start_io(ctrl_info, queue_group, RAID_PATH, io_request); | |
4397 | ||
4398 | return 0; | |
4399 | } | |
4400 | ||
4401 | static void pqi_aio_io_complete(struct pqi_io_request *io_request, | |
4402 | void *context) | |
4403 | { | |
4404 | struct scsi_cmnd *scmd; | |
4405 | ||
4406 | scmd = io_request->scmd; | |
4407 | scsi_dma_unmap(scmd); | |
4408 | if (io_request->status == -EAGAIN) | |
4409 | set_host_byte(scmd, DID_IMM_RETRY); | |
4410 | pqi_free_io_request(io_request); | |
4411 | pqi_scsi_done(scmd); | |
4412 | } | |
4413 | ||
4414 | static inline int pqi_aio_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info, | |
4415 | struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, | |
4416 | struct pqi_queue_group *queue_group) | |
4417 | { | |
4418 | return pqi_aio_submit_io(ctrl_info, scmd, device->aio_handle, | |
4419 | scmd->cmnd, scmd->cmd_len, queue_group, NULL); | |
4420 | } | |
4421 | ||
4422 | static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info, | |
4423 | struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb, | |
4424 | unsigned int cdb_length, struct pqi_queue_group *queue_group, | |
4425 | struct pqi_encryption_info *encryption_info) | |
4426 | { | |
4427 | int rc; | |
4428 | struct pqi_io_request *io_request; | |
4429 | struct pqi_aio_path_request *request; | |
4430 | ||
4431 | io_request = pqi_alloc_io_request(ctrl_info); | |
4432 | io_request->io_complete_callback = pqi_aio_io_complete; | |
4433 | io_request->scmd = scmd; | |
4434 | ||
4435 | scmd->host_scribble = (unsigned char *)io_request; | |
4436 | ||
4437 | request = io_request->iu; | |
4438 | memset(request, 0, | |
4439 | offsetof(struct pqi_raid_path_request, sg_descriptors)); | |
4440 | ||
4441 | request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_IO; | |
4442 | put_unaligned_le32(aio_handle, &request->nexus_id); | |
4443 | put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length); | |
4444 | request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; | |
4445 | put_unaligned_le16(io_request->index, &request->request_id); | |
4446 | request->error_index = request->request_id; | |
4447 | if (cdb_length > sizeof(request->cdb)) | |
4448 | cdb_length = sizeof(request->cdb); | |
4449 | request->cdb_length = cdb_length; | |
4450 | memcpy(request->cdb, cdb, cdb_length); | |
4451 | ||
4452 | switch (scmd->sc_data_direction) { | |
4453 | case DMA_TO_DEVICE: | |
4454 | request->data_direction = SOP_READ_FLAG; | |
4455 | break; | |
4456 | case DMA_FROM_DEVICE: | |
4457 | request->data_direction = SOP_WRITE_FLAG; | |
4458 | break; | |
4459 | case DMA_NONE: | |
4460 | request->data_direction = SOP_NO_DIRECTION_FLAG; | |
4461 | break; | |
4462 | case DMA_BIDIRECTIONAL: | |
4463 | request->data_direction = SOP_BIDIRECTIONAL; | |
4464 | break; | |
4465 | default: | |
4466 | dev_err(&ctrl_info->pci_dev->dev, | |
4467 | "unknown data direction: %d\n", | |
4468 | scmd->sc_data_direction); | |
4469 | WARN_ON(scmd->sc_data_direction); | |
4470 | break; | |
4471 | } | |
4472 | ||
4473 | if (encryption_info) { | |
4474 | request->encryption_enable = true; | |
4475 | put_unaligned_le16(encryption_info->data_encryption_key_index, | |
4476 | &request->data_encryption_key_index); | |
4477 | put_unaligned_le32(encryption_info->encrypt_tweak_lower, | |
4478 | &request->encrypt_tweak_lower); | |
4479 | put_unaligned_le32(encryption_info->encrypt_tweak_upper, | |
4480 | &request->encrypt_tweak_upper); | |
4481 | } | |
4482 | ||
4483 | rc = pqi_build_aio_sg_list(ctrl_info, request, scmd, io_request); | |
4484 | if (rc) { | |
4485 | pqi_free_io_request(io_request); | |
4486 | return SCSI_MLQUEUE_HOST_BUSY; | |
4487 | } | |
4488 | ||
4489 | pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request); | |
4490 | ||
4491 | return 0; | |
4492 | } | |
4493 | ||
4494 | static int pqi_scsi_queue_command(struct Scsi_Host *shost, | |
7d81d2b8 | 4495 | struct scsi_cmnd *scmd) |
6c223761 KB |
4496 | { |
4497 | int rc; | |
4498 | struct pqi_ctrl_info *ctrl_info; | |
4499 | struct pqi_scsi_dev *device; | |
4500 | u16 hwq; | |
4501 | struct pqi_queue_group *queue_group; | |
4502 | bool raid_bypassed; | |
4503 | ||
4504 | device = scmd->device->hostdata; | |
6c223761 KB |
4505 | ctrl_info = shost_to_hba(shost); |
4506 | ||
4507 | if (pqi_ctrl_offline(ctrl_info)) { | |
4508 | set_host_byte(scmd, DID_NO_CONNECT); | |
4509 | pqi_scsi_done(scmd); | |
4510 | return 0; | |
4511 | } | |
4512 | ||
7d81d2b8 KB |
4513 | /* |
4514 | * This is necessary because the SML doesn't zero out this field during | |
4515 | * error recovery. | |
4516 | */ | |
4517 | scmd->result = 0; | |
4518 | ||
6c223761 KB |
4519 | hwq = blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(scmd->request)); |
4520 | if (hwq >= ctrl_info->num_queue_groups) | |
4521 | hwq = 0; | |
4522 | ||
4523 | queue_group = &ctrl_info->queue_groups[hwq]; | |
4524 | ||
4525 | if (pqi_is_logical_device(device)) { | |
4526 | raid_bypassed = false; | |
4527 | if (device->offload_enabled && | |
57292b58 | 4528 | !blk_rq_is_passthrough(scmd->request)) { |
6c223761 KB |
4529 | rc = pqi_raid_bypass_submit_scsi_cmd(ctrl_info, device, |
4530 | scmd, queue_group); | |
4531 | if (rc == 0 || | |
4532 | rc == SCSI_MLQUEUE_HOST_BUSY || | |
4533 | rc == SAM_STAT_CHECK_CONDITION || | |
4534 | rc == SAM_STAT_RESERVATION_CONFLICT) | |
4535 | raid_bypassed = true; | |
4536 | } | |
4537 | if (!raid_bypassed) | |
4538 | rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd, | |
4539 | queue_group); | |
4540 | } else { | |
4541 | if (device->aio_enabled) | |
4542 | rc = pqi_aio_submit_scsi_cmd(ctrl_info, device, scmd, | |
4543 | queue_group); | |
4544 | else | |
4545 | rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd, | |
4546 | queue_group); | |
4547 | } | |
4548 | ||
4549 | return rc; | |
4550 | } | |
4551 | ||
14bb215d KB |
4552 | static void pqi_lun_reset_complete(struct pqi_io_request *io_request, |
4553 | void *context) | |
6c223761 | 4554 | { |
14bb215d | 4555 | struct completion *waiting = context; |
6c223761 | 4556 | |
14bb215d KB |
4557 | complete(waiting); |
4558 | } | |
6c223761 | 4559 | |
14bb215d KB |
4560 | #define PQI_LUN_RESET_TIMEOUT_SECS 10 |
4561 | ||
4562 | static int pqi_wait_for_lun_reset_completion(struct pqi_ctrl_info *ctrl_info, | |
4563 | struct pqi_scsi_dev *device, struct completion *wait) | |
4564 | { | |
4565 | int rc; | |
4566 | unsigned int wait_secs = 0; | |
4567 | ||
4568 | while (1) { | |
4569 | if (wait_for_completion_io_timeout(wait, | |
4570 | PQI_LUN_RESET_TIMEOUT_SECS * HZ)) { | |
4571 | rc = 0; | |
4572 | break; | |
6c223761 KB |
4573 | } |
4574 | ||
14bb215d KB |
4575 | pqi_check_ctrl_health(ctrl_info); |
4576 | if (pqi_ctrl_offline(ctrl_info)) { | |
4577 | rc = -ETIMEDOUT; | |
4578 | break; | |
4579 | } | |
6c223761 | 4580 | |
14bb215d | 4581 | wait_secs += PQI_LUN_RESET_TIMEOUT_SECS; |
6c223761 | 4582 | |
14bb215d KB |
4583 | dev_err(&ctrl_info->pci_dev->dev, |
4584 | "resetting scsi %d:%d:%d:%d - waiting %u seconds\n", | |
4585 | ctrl_info->scsi_host->host_no, device->bus, | |
4586 | device->target, device->lun, wait_secs); | |
6c223761 | 4587 | } |
6c223761 | 4588 | |
14bb215d | 4589 | return rc; |
6c223761 KB |
4590 | } |
4591 | ||
14bb215d | 4592 | static int pqi_lun_reset(struct pqi_ctrl_info *ctrl_info, |
6c223761 KB |
4593 | struct pqi_scsi_dev *device) |
4594 | { | |
4595 | int rc; | |
4596 | struct pqi_io_request *io_request; | |
4597 | DECLARE_COMPLETION_ONSTACK(wait); | |
4598 | struct pqi_task_management_request *request; | |
4599 | ||
4600 | down(&ctrl_info->lun_reset_sem); | |
4601 | ||
4602 | io_request = pqi_alloc_io_request(ctrl_info); | |
14bb215d | 4603 | io_request->io_complete_callback = pqi_lun_reset_complete; |
6c223761 KB |
4604 | io_request->context = &wait; |
4605 | ||
4606 | request = io_request->iu; | |
4607 | memset(request, 0, sizeof(*request)); | |
4608 | ||
4609 | request->header.iu_type = PQI_REQUEST_IU_TASK_MANAGEMENT; | |
4610 | put_unaligned_le16(sizeof(*request) - PQI_REQUEST_HEADER_LENGTH, | |
4611 | &request->header.iu_length); | |
4612 | put_unaligned_le16(io_request->index, &request->request_id); | |
4613 | memcpy(request->lun_number, device->scsi3addr, | |
4614 | sizeof(request->lun_number)); | |
4615 | request->task_management_function = SOP_TASK_MANAGEMENT_LUN_RESET; | |
4616 | ||
4617 | pqi_start_io(ctrl_info, | |
4618 | &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH, | |
4619 | io_request); | |
4620 | ||
14bb215d KB |
4621 | rc = pqi_wait_for_lun_reset_completion(ctrl_info, device, &wait); |
4622 | if (rc == 0) | |
6c223761 | 4623 | rc = io_request->status; |
6c223761 KB |
4624 | |
4625 | pqi_free_io_request(io_request); | |
4626 | up(&ctrl_info->lun_reset_sem); | |
4627 | ||
4628 | return rc; | |
4629 | } | |
4630 | ||
4631 | /* Performs a reset at the LUN level. */ | |
4632 | ||
4633 | static int pqi_device_reset(struct pqi_ctrl_info *ctrl_info, | |
4634 | struct pqi_scsi_dev *device) | |
4635 | { | |
4636 | int rc; | |
4637 | ||
4638 | pqi_check_ctrl_health(ctrl_info); | |
4639 | if (pqi_ctrl_offline(ctrl_info)) | |
4640 | return FAILED; | |
4641 | ||
14bb215d | 4642 | rc = pqi_lun_reset(ctrl_info, device); |
6c223761 | 4643 | |
14bb215d | 4644 | return rc == 0 ? SUCCESS : FAILED; |
6c223761 KB |
4645 | } |
4646 | ||
4647 | static int pqi_eh_device_reset_handler(struct scsi_cmnd *scmd) | |
4648 | { | |
4649 | int rc; | |
4650 | struct pqi_ctrl_info *ctrl_info; | |
4651 | struct pqi_scsi_dev *device; | |
4652 | ||
4653 | ctrl_info = shost_to_hba(scmd->device->host); | |
6c223761 KB |
4654 | device = scmd->device->hostdata; |
4655 | ||
4656 | dev_err(&ctrl_info->pci_dev->dev, | |
4657 | "resetting scsi %d:%d:%d:%d\n", | |
4658 | ctrl_info->scsi_host->host_no, | |
4659 | device->bus, device->target, device->lun); | |
4660 | ||
4661 | rc = pqi_device_reset(ctrl_info, device); | |
4662 | ||
4663 | dev_err(&ctrl_info->pci_dev->dev, | |
4664 | "reset of scsi %d:%d:%d:%d: %s\n", | |
4665 | ctrl_info->scsi_host->host_no, | |
4666 | device->bus, device->target, device->lun, | |
4667 | rc == SUCCESS ? "SUCCESS" : "FAILED"); | |
4668 | ||
4669 | return rc; | |
4670 | } | |
4671 | ||
4672 | static int pqi_slave_alloc(struct scsi_device *sdev) | |
4673 | { | |
4674 | struct pqi_scsi_dev *device; | |
4675 | unsigned long flags; | |
4676 | struct pqi_ctrl_info *ctrl_info; | |
4677 | struct scsi_target *starget; | |
4678 | struct sas_rphy *rphy; | |
4679 | ||
4680 | ctrl_info = shost_to_hba(sdev->host); | |
4681 | ||
4682 | spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); | |
4683 | ||
4684 | if (sdev_channel(sdev) == PQI_PHYSICAL_DEVICE_BUS) { | |
4685 | starget = scsi_target(sdev); | |
4686 | rphy = target_to_rphy(starget); | |
4687 | device = pqi_find_device_by_sas_rphy(ctrl_info, rphy); | |
4688 | if (device) { | |
4689 | device->target = sdev_id(sdev); | |
4690 | device->lun = sdev->lun; | |
4691 | device->target_lun_valid = true; | |
4692 | } | |
4693 | } else { | |
4694 | device = pqi_find_scsi_dev(ctrl_info, sdev_channel(sdev), | |
4695 | sdev_id(sdev), sdev->lun); | |
4696 | } | |
4697 | ||
4698 | if (device && device->expose_device) { | |
4699 | sdev->hostdata = device; | |
4700 | device->sdev = sdev; | |
4701 | if (device->queue_depth) { | |
4702 | device->advertised_queue_depth = device->queue_depth; | |
4703 | scsi_change_queue_depth(sdev, | |
4704 | device->advertised_queue_depth); | |
4705 | } | |
4706 | } | |
4707 | ||
4708 | spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); | |
4709 | ||
4710 | return 0; | |
4711 | } | |
4712 | ||
4713 | static int pqi_slave_configure(struct scsi_device *sdev) | |
4714 | { | |
4715 | struct pqi_scsi_dev *device; | |
4716 | ||
4717 | device = sdev->hostdata; | |
4718 | if (!device->expose_device) | |
4719 | sdev->no_uld_attach = true; | |
4720 | ||
4721 | return 0; | |
4722 | } | |
4723 | ||
52198226 CH |
4724 | static int pqi_map_queues(struct Scsi_Host *shost) |
4725 | { | |
4726 | struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); | |
4727 | ||
4728 | return blk_mq_pci_map_queues(&shost->tag_set, ctrl_info->pci_dev); | |
4729 | } | |
4730 | ||
6c223761 KB |
4731 | static int pqi_getpciinfo_ioctl(struct pqi_ctrl_info *ctrl_info, |
4732 | void __user *arg) | |
4733 | { | |
4734 | struct pci_dev *pci_dev; | |
4735 | u32 subsystem_vendor; | |
4736 | u32 subsystem_device; | |
4737 | cciss_pci_info_struct pciinfo; | |
4738 | ||
4739 | if (!arg) | |
4740 | return -EINVAL; | |
4741 | ||
4742 | pci_dev = ctrl_info->pci_dev; | |
4743 | ||
4744 | pciinfo.domain = pci_domain_nr(pci_dev->bus); | |
4745 | pciinfo.bus = pci_dev->bus->number; | |
4746 | pciinfo.dev_fn = pci_dev->devfn; | |
4747 | subsystem_vendor = pci_dev->subsystem_vendor; | |
4748 | subsystem_device = pci_dev->subsystem_device; | |
4749 | pciinfo.board_id = ((subsystem_device << 16) & 0xffff0000) | | |
4750 | subsystem_vendor; | |
4751 | ||
4752 | if (copy_to_user(arg, &pciinfo, sizeof(pciinfo))) | |
4753 | return -EFAULT; | |
4754 | ||
4755 | return 0; | |
4756 | } | |
4757 | ||
4758 | static int pqi_getdrivver_ioctl(void __user *arg) | |
4759 | { | |
4760 | u32 version; | |
4761 | ||
4762 | if (!arg) | |
4763 | return -EINVAL; | |
4764 | ||
4765 | version = (DRIVER_MAJOR << 28) | (DRIVER_MINOR << 24) | | |
4766 | (DRIVER_RELEASE << 16) | DRIVER_REVISION; | |
4767 | ||
4768 | if (copy_to_user(arg, &version, sizeof(version))) | |
4769 | return -EFAULT; | |
4770 | ||
4771 | return 0; | |
4772 | } | |
4773 | ||
4774 | struct ciss_error_info { | |
4775 | u8 scsi_status; | |
4776 | int command_status; | |
4777 | size_t sense_data_length; | |
4778 | }; | |
4779 | ||
4780 | static void pqi_error_info_to_ciss(struct pqi_raid_error_info *pqi_error_info, | |
4781 | struct ciss_error_info *ciss_error_info) | |
4782 | { | |
4783 | int ciss_cmd_status; | |
4784 | size_t sense_data_length; | |
4785 | ||
4786 | switch (pqi_error_info->data_out_result) { | |
4787 | case PQI_DATA_IN_OUT_GOOD: | |
4788 | ciss_cmd_status = CISS_CMD_STATUS_SUCCESS; | |
4789 | break; | |
4790 | case PQI_DATA_IN_OUT_UNDERFLOW: | |
4791 | ciss_cmd_status = CISS_CMD_STATUS_DATA_UNDERRUN; | |
4792 | break; | |
4793 | case PQI_DATA_IN_OUT_BUFFER_OVERFLOW: | |
4794 | ciss_cmd_status = CISS_CMD_STATUS_DATA_OVERRUN; | |
4795 | break; | |
4796 | case PQI_DATA_IN_OUT_PROTOCOL_ERROR: | |
4797 | case PQI_DATA_IN_OUT_BUFFER_ERROR: | |
4798 | case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA: | |
4799 | case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE: | |
4800 | case PQI_DATA_IN_OUT_ERROR: | |
4801 | ciss_cmd_status = CISS_CMD_STATUS_PROTOCOL_ERROR; | |
4802 | break; | |
4803 | case PQI_DATA_IN_OUT_HARDWARE_ERROR: | |
4804 | case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR: | |
4805 | case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT: | |
4806 | case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED: | |
4807 | case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED: | |
4808 | case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED: | |
4809 | case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST: | |
4810 | case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION: | |
4811 | case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED: | |
4812 | case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ: | |
4813 | ciss_cmd_status = CISS_CMD_STATUS_HARDWARE_ERROR; | |
4814 | break; | |
4815 | case PQI_DATA_IN_OUT_UNSOLICITED_ABORT: | |
4816 | ciss_cmd_status = CISS_CMD_STATUS_UNSOLICITED_ABORT; | |
4817 | break; | |
4818 | case PQI_DATA_IN_OUT_ABORTED: | |
4819 | ciss_cmd_status = CISS_CMD_STATUS_ABORTED; | |
4820 | break; | |
4821 | case PQI_DATA_IN_OUT_TIMEOUT: | |
4822 | ciss_cmd_status = CISS_CMD_STATUS_TIMEOUT; | |
4823 | break; | |
4824 | default: | |
4825 | ciss_cmd_status = CISS_CMD_STATUS_TARGET_STATUS; | |
4826 | break; | |
4827 | } | |
4828 | ||
4829 | sense_data_length = | |
4830 | get_unaligned_le16(&pqi_error_info->sense_data_length); | |
4831 | if (sense_data_length == 0) | |
4832 | sense_data_length = | |
4833 | get_unaligned_le16(&pqi_error_info->response_data_length); | |
4834 | if (sense_data_length) | |
4835 | if (sense_data_length > sizeof(pqi_error_info->data)) | |
4836 | sense_data_length = sizeof(pqi_error_info->data); | |
4837 | ||
4838 | ciss_error_info->scsi_status = pqi_error_info->status; | |
4839 | ciss_error_info->command_status = ciss_cmd_status; | |
4840 | ciss_error_info->sense_data_length = sense_data_length; | |
4841 | } | |
4842 | ||
4843 | static int pqi_passthru_ioctl(struct pqi_ctrl_info *ctrl_info, void __user *arg) | |
4844 | { | |
4845 | int rc; | |
4846 | char *kernel_buffer = NULL; | |
4847 | u16 iu_length; | |
4848 | size_t sense_data_length; | |
4849 | IOCTL_Command_struct iocommand; | |
4850 | struct pqi_raid_path_request request; | |
4851 | struct pqi_raid_error_info pqi_error_info; | |
4852 | struct ciss_error_info ciss_error_info; | |
4853 | ||
4854 | if (pqi_ctrl_offline(ctrl_info)) | |
4855 | return -ENXIO; | |
4856 | if (!arg) | |
4857 | return -EINVAL; | |
4858 | if (!capable(CAP_SYS_RAWIO)) | |
4859 | return -EPERM; | |
4860 | if (copy_from_user(&iocommand, arg, sizeof(iocommand))) | |
4861 | return -EFAULT; | |
4862 | if (iocommand.buf_size < 1 && | |
4863 | iocommand.Request.Type.Direction != XFER_NONE) | |
4864 | return -EINVAL; | |
4865 | if (iocommand.Request.CDBLen > sizeof(request.cdb)) | |
4866 | return -EINVAL; | |
4867 | if (iocommand.Request.Type.Type != TYPE_CMD) | |
4868 | return -EINVAL; | |
4869 | ||
4870 | switch (iocommand.Request.Type.Direction) { | |
4871 | case XFER_NONE: | |
4872 | case XFER_WRITE: | |
4873 | case XFER_READ: | |
4874 | break; | |
4875 | default: | |
4876 | return -EINVAL; | |
4877 | } | |
4878 | ||
4879 | if (iocommand.buf_size > 0) { | |
4880 | kernel_buffer = kmalloc(iocommand.buf_size, GFP_KERNEL); | |
4881 | if (!kernel_buffer) | |
4882 | return -ENOMEM; | |
4883 | if (iocommand.Request.Type.Direction & XFER_WRITE) { | |
4884 | if (copy_from_user(kernel_buffer, iocommand.buf, | |
4885 | iocommand.buf_size)) { | |
4886 | rc = -EFAULT; | |
4887 | goto out; | |
4888 | } | |
4889 | } else { | |
4890 | memset(kernel_buffer, 0, iocommand.buf_size); | |
4891 | } | |
4892 | } | |
4893 | ||
4894 | memset(&request, 0, sizeof(request)); | |
4895 | ||
4896 | request.header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO; | |
4897 | iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) - | |
4898 | PQI_REQUEST_HEADER_LENGTH; | |
4899 | memcpy(request.lun_number, iocommand.LUN_info.LunAddrBytes, | |
4900 | sizeof(request.lun_number)); | |
4901 | memcpy(request.cdb, iocommand.Request.CDB, iocommand.Request.CDBLen); | |
4902 | request.additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0; | |
4903 | ||
4904 | switch (iocommand.Request.Type.Direction) { | |
4905 | case XFER_NONE: | |
4906 | request.data_direction = SOP_NO_DIRECTION_FLAG; | |
4907 | break; | |
4908 | case XFER_WRITE: | |
4909 | request.data_direction = SOP_WRITE_FLAG; | |
4910 | break; | |
4911 | case XFER_READ: | |
4912 | request.data_direction = SOP_READ_FLAG; | |
4913 | break; | |
4914 | } | |
4915 | ||
4916 | request.task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; | |
4917 | ||
4918 | if (iocommand.buf_size > 0) { | |
4919 | put_unaligned_le32(iocommand.buf_size, &request.buffer_length); | |
4920 | ||
4921 | rc = pqi_map_single(ctrl_info->pci_dev, | |
4922 | &request.sg_descriptors[0], kernel_buffer, | |
4923 | iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); | |
4924 | if (rc) | |
4925 | goto out; | |
4926 | ||
4927 | iu_length += sizeof(request.sg_descriptors[0]); | |
4928 | } | |
4929 | ||
4930 | put_unaligned_le16(iu_length, &request.header.iu_length); | |
4931 | ||
4932 | rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, | |
4933 | PQI_SYNC_FLAGS_INTERRUPTABLE, &pqi_error_info, NO_TIMEOUT); | |
4934 | ||
4935 | if (iocommand.buf_size > 0) | |
4936 | pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, | |
4937 | PCI_DMA_BIDIRECTIONAL); | |
4938 | ||
4939 | memset(&iocommand.error_info, 0, sizeof(iocommand.error_info)); | |
4940 | ||
4941 | if (rc == 0) { | |
4942 | pqi_error_info_to_ciss(&pqi_error_info, &ciss_error_info); | |
4943 | iocommand.error_info.ScsiStatus = ciss_error_info.scsi_status; | |
4944 | iocommand.error_info.CommandStatus = | |
4945 | ciss_error_info.command_status; | |
4946 | sense_data_length = ciss_error_info.sense_data_length; | |
4947 | if (sense_data_length) { | |
4948 | if (sense_data_length > | |
4949 | sizeof(iocommand.error_info.SenseInfo)) | |
4950 | sense_data_length = | |
4951 | sizeof(iocommand.error_info.SenseInfo); | |
4952 | memcpy(iocommand.error_info.SenseInfo, | |
4953 | pqi_error_info.data, sense_data_length); | |
4954 | iocommand.error_info.SenseLen = sense_data_length; | |
4955 | } | |
4956 | } | |
4957 | ||
4958 | if (copy_to_user(arg, &iocommand, sizeof(iocommand))) { | |
4959 | rc = -EFAULT; | |
4960 | goto out; | |
4961 | } | |
4962 | ||
4963 | if (rc == 0 && iocommand.buf_size > 0 && | |
4964 | (iocommand.Request.Type.Direction & XFER_READ)) { | |
4965 | if (copy_to_user(iocommand.buf, kernel_buffer, | |
4966 | iocommand.buf_size)) { | |
4967 | rc = -EFAULT; | |
4968 | } | |
4969 | } | |
4970 | ||
4971 | out: | |
4972 | kfree(kernel_buffer); | |
4973 | ||
4974 | return rc; | |
4975 | } | |
4976 | ||
4977 | static int pqi_ioctl(struct scsi_device *sdev, int cmd, void __user *arg) | |
4978 | { | |
4979 | int rc; | |
4980 | struct pqi_ctrl_info *ctrl_info; | |
4981 | ||
4982 | ctrl_info = shost_to_hba(sdev->host); | |
4983 | ||
4984 | switch (cmd) { | |
4985 | case CCISS_DEREGDISK: | |
4986 | case CCISS_REGNEWDISK: | |
4987 | case CCISS_REGNEWD: | |
4988 | rc = pqi_scan_scsi_devices(ctrl_info); | |
4989 | break; | |
4990 | case CCISS_GETPCIINFO: | |
4991 | rc = pqi_getpciinfo_ioctl(ctrl_info, arg); | |
4992 | break; | |
4993 | case CCISS_GETDRIVVER: | |
4994 | rc = pqi_getdrivver_ioctl(arg); | |
4995 | break; | |
4996 | case CCISS_PASSTHRU: | |
4997 | rc = pqi_passthru_ioctl(ctrl_info, arg); | |
4998 | break; | |
4999 | default: | |
5000 | rc = -EINVAL; | |
5001 | break; | |
5002 | } | |
5003 | ||
5004 | return rc; | |
5005 | } | |
5006 | ||
5007 | static ssize_t pqi_version_show(struct device *dev, | |
5008 | struct device_attribute *attr, char *buffer) | |
5009 | { | |
5010 | ssize_t count = 0; | |
5011 | struct Scsi_Host *shost; | |
5012 | struct pqi_ctrl_info *ctrl_info; | |
5013 | ||
5014 | shost = class_to_shost(dev); | |
5015 | ctrl_info = shost_to_hba(shost); | |
5016 | ||
5017 | count += snprintf(buffer + count, PAGE_SIZE - count, | |
5018 | " driver: %s\n", DRIVER_VERSION BUILD_TIMESTAMP); | |
5019 | ||
5020 | count += snprintf(buffer + count, PAGE_SIZE - count, | |
5021 | "firmware: %s\n", ctrl_info->firmware_version); | |
5022 | ||
5023 | return count; | |
5024 | } | |
5025 | ||
5026 | static ssize_t pqi_host_rescan_store(struct device *dev, | |
5027 | struct device_attribute *attr, const char *buffer, size_t count) | |
5028 | { | |
5029 | struct Scsi_Host *shost = class_to_shost(dev); | |
5030 | ||
5031 | pqi_scan_start(shost); | |
5032 | ||
5033 | return count; | |
5034 | } | |
5035 | ||
5036 | static DEVICE_ATTR(version, S_IRUGO, pqi_version_show, NULL); | |
5037 | static DEVICE_ATTR(rescan, S_IWUSR, NULL, pqi_host_rescan_store); | |
5038 | ||
5039 | static struct device_attribute *pqi_shost_attrs[] = { | |
5040 | &dev_attr_version, | |
5041 | &dev_attr_rescan, | |
5042 | NULL | |
5043 | }; | |
5044 | ||
5045 | static ssize_t pqi_sas_address_show(struct device *dev, | |
5046 | struct device_attribute *attr, char *buffer) | |
5047 | { | |
5048 | struct pqi_ctrl_info *ctrl_info; | |
5049 | struct scsi_device *sdev; | |
5050 | struct pqi_scsi_dev *device; | |
5051 | unsigned long flags; | |
5052 | u64 sas_address; | |
5053 | ||
5054 | sdev = to_scsi_device(dev); | |
5055 | ctrl_info = shost_to_hba(sdev->host); | |
5056 | ||
5057 | spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); | |
5058 | ||
5059 | device = sdev->hostdata; | |
5060 | if (pqi_is_logical_device(device)) { | |
5061 | spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, | |
5062 | flags); | |
5063 | return -ENODEV; | |
5064 | } | |
5065 | sas_address = device->sas_address; | |
5066 | ||
5067 | spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); | |
5068 | ||
5069 | return snprintf(buffer, PAGE_SIZE, "0x%016llx\n", sas_address); | |
5070 | } | |
5071 | ||
5072 | static ssize_t pqi_ssd_smart_path_enabled_show(struct device *dev, | |
5073 | struct device_attribute *attr, char *buffer) | |
5074 | { | |
5075 | struct pqi_ctrl_info *ctrl_info; | |
5076 | struct scsi_device *sdev; | |
5077 | struct pqi_scsi_dev *device; | |
5078 | unsigned long flags; | |
5079 | ||
5080 | sdev = to_scsi_device(dev); | |
5081 | ctrl_info = shost_to_hba(sdev->host); | |
5082 | ||
5083 | spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); | |
5084 | ||
5085 | device = sdev->hostdata; | |
5086 | buffer[0] = device->offload_enabled ? '1' : '0'; | |
5087 | buffer[1] = '\n'; | |
5088 | buffer[2] = '\0'; | |
5089 | ||
5090 | spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); | |
5091 | ||
5092 | return 2; | |
5093 | } | |
5094 | ||
5095 | static DEVICE_ATTR(sas_address, S_IRUGO, pqi_sas_address_show, NULL); | |
5096 | static DEVICE_ATTR(ssd_smart_path_enabled, S_IRUGO, | |
5097 | pqi_ssd_smart_path_enabled_show, NULL); | |
5098 | ||
5099 | static struct device_attribute *pqi_sdev_attrs[] = { | |
5100 | &dev_attr_sas_address, | |
5101 | &dev_attr_ssd_smart_path_enabled, | |
5102 | NULL | |
5103 | }; | |
5104 | ||
5105 | static struct scsi_host_template pqi_driver_template = { | |
5106 | .module = THIS_MODULE, | |
5107 | .name = DRIVER_NAME_SHORT, | |
5108 | .proc_name = DRIVER_NAME_SHORT, | |
5109 | .queuecommand = pqi_scsi_queue_command, | |
5110 | .scan_start = pqi_scan_start, | |
5111 | .scan_finished = pqi_scan_finished, | |
5112 | .this_id = -1, | |
5113 | .use_clustering = ENABLE_CLUSTERING, | |
5114 | .eh_device_reset_handler = pqi_eh_device_reset_handler, | |
5115 | .ioctl = pqi_ioctl, | |
5116 | .slave_alloc = pqi_slave_alloc, | |
5117 | .slave_configure = pqi_slave_configure, | |
52198226 | 5118 | .map_queues = pqi_map_queues, |
6c223761 KB |
5119 | .sdev_attrs = pqi_sdev_attrs, |
5120 | .shost_attrs = pqi_shost_attrs, | |
5121 | }; | |
5122 | ||
5123 | static int pqi_register_scsi(struct pqi_ctrl_info *ctrl_info) | |
5124 | { | |
5125 | int rc; | |
5126 | struct Scsi_Host *shost; | |
5127 | ||
5128 | shost = scsi_host_alloc(&pqi_driver_template, sizeof(ctrl_info)); | |
5129 | if (!shost) { | |
5130 | dev_err(&ctrl_info->pci_dev->dev, | |
5131 | "scsi_host_alloc failed for controller %u\n", | |
5132 | ctrl_info->ctrl_id); | |
5133 | return -ENOMEM; | |
5134 | } | |
5135 | ||
5136 | shost->io_port = 0; | |
5137 | shost->n_io_port = 0; | |
5138 | shost->this_id = -1; | |
5139 | shost->max_channel = PQI_MAX_BUS; | |
5140 | shost->max_cmd_len = MAX_COMMAND_SIZE; | |
5141 | shost->max_lun = ~0; | |
5142 | shost->max_id = ~0; | |
5143 | shost->max_sectors = ctrl_info->max_sectors; | |
5144 | shost->can_queue = ctrl_info->scsi_ml_can_queue; | |
5145 | shost->cmd_per_lun = shost->can_queue; | |
5146 | shost->sg_tablesize = ctrl_info->sg_tablesize; | |
5147 | shost->transportt = pqi_sas_transport_template; | |
52198226 | 5148 | shost->irq = pci_irq_vector(ctrl_info->pci_dev, 0); |
6c223761 KB |
5149 | shost->unique_id = shost->irq; |
5150 | shost->nr_hw_queues = ctrl_info->num_queue_groups; | |
5151 | shost->hostdata[0] = (unsigned long)ctrl_info; | |
5152 | ||
5153 | rc = scsi_add_host(shost, &ctrl_info->pci_dev->dev); | |
5154 | if (rc) { | |
5155 | dev_err(&ctrl_info->pci_dev->dev, | |
5156 | "scsi_add_host failed for controller %u\n", | |
5157 | ctrl_info->ctrl_id); | |
5158 | goto free_host; | |
5159 | } | |
5160 | ||
5161 | rc = pqi_add_sas_host(shost, ctrl_info); | |
5162 | if (rc) { | |
5163 | dev_err(&ctrl_info->pci_dev->dev, | |
5164 | "add SAS host failed for controller %u\n", | |
5165 | ctrl_info->ctrl_id); | |
5166 | goto remove_host; | |
5167 | } | |
5168 | ||
5169 | ctrl_info->scsi_host = shost; | |
5170 | ||
5171 | return 0; | |
5172 | ||
5173 | remove_host: | |
5174 | scsi_remove_host(shost); | |
5175 | free_host: | |
5176 | scsi_host_put(shost); | |
5177 | ||
5178 | return rc; | |
5179 | } | |
5180 | ||
5181 | static void pqi_unregister_scsi(struct pqi_ctrl_info *ctrl_info) | |
5182 | { | |
5183 | struct Scsi_Host *shost; | |
5184 | ||
5185 | pqi_delete_sas_host(ctrl_info); | |
5186 | ||
5187 | shost = ctrl_info->scsi_host; | |
5188 | if (!shost) | |
5189 | return; | |
5190 | ||
5191 | scsi_remove_host(shost); | |
5192 | scsi_host_put(shost); | |
5193 | } | |
5194 | ||
5195 | #define PQI_RESET_ACTION_RESET 0x1 | |
5196 | ||
5197 | #define PQI_RESET_TYPE_NO_RESET 0x0 | |
5198 | #define PQI_RESET_TYPE_SOFT_RESET 0x1 | |
5199 | #define PQI_RESET_TYPE_FIRM_RESET 0x2 | |
5200 | #define PQI_RESET_TYPE_HARD_RESET 0x3 | |
5201 | ||
5202 | static int pqi_reset(struct pqi_ctrl_info *ctrl_info) | |
5203 | { | |
5204 | int rc; | |
5205 | u32 reset_params; | |
5206 | ||
5207 | reset_params = (PQI_RESET_ACTION_RESET << 5) | | |
5208 | PQI_RESET_TYPE_HARD_RESET; | |
5209 | ||
5210 | writel(reset_params, | |
5211 | &ctrl_info->pqi_registers->device_reset); | |
5212 | ||
5213 | rc = pqi_wait_for_pqi_mode_ready(ctrl_info); | |
5214 | if (rc) | |
5215 | dev_err(&ctrl_info->pci_dev->dev, | |
5216 | "PQI reset failed\n"); | |
5217 | ||
5218 | return rc; | |
5219 | } | |
5220 | ||
5221 | static int pqi_get_ctrl_firmware_version(struct pqi_ctrl_info *ctrl_info) | |
5222 | { | |
5223 | int rc; | |
5224 | struct bmic_identify_controller *identify; | |
5225 | ||
5226 | identify = kmalloc(sizeof(*identify), GFP_KERNEL); | |
5227 | if (!identify) | |
5228 | return -ENOMEM; | |
5229 | ||
5230 | rc = pqi_identify_controller(ctrl_info, identify); | |
5231 | if (rc) | |
5232 | goto out; | |
5233 | ||
5234 | memcpy(ctrl_info->firmware_version, identify->firmware_version, | |
5235 | sizeof(identify->firmware_version)); | |
5236 | ctrl_info->firmware_version[sizeof(identify->firmware_version)] = '\0'; | |
5237 | snprintf(ctrl_info->firmware_version + | |
5238 | strlen(ctrl_info->firmware_version), | |
5239 | sizeof(ctrl_info->firmware_version), | |
5240 | "-%u", get_unaligned_le16(&identify->firmware_build_number)); | |
5241 | ||
5242 | out: | |
5243 | kfree(identify); | |
5244 | ||
5245 | return rc; | |
5246 | } | |
5247 | ||
162d7753 KB |
5248 | /* Switches the controller from PQI mode back into SIS mode. */ |
5249 | ||
5250 | static int pqi_revert_to_sis_mode(struct pqi_ctrl_info *ctrl_info) | |
5251 | { | |
5252 | int rc; | |
5253 | ||
5254 | sis_disable_msix(ctrl_info); | |
5255 | rc = pqi_reset(ctrl_info); | |
5256 | if (rc) | |
5257 | return rc; | |
5258 | sis_reenable_sis_mode(ctrl_info); | |
5259 | pqi_save_ctrl_mode(ctrl_info, SIS_MODE); | |
5260 | ||
5261 | return 0; | |
5262 | } | |
5263 | ||
5264 | /* | |
5265 | * If the controller isn't already in SIS mode, this function forces it into | |
5266 | * SIS mode. | |
5267 | */ | |
5268 | ||
5269 | static int pqi_force_sis_mode(struct pqi_ctrl_info *ctrl_info) | |
ff6abb73 KB |
5270 | { |
5271 | if (!sis_is_firmware_running(ctrl_info)) | |
5272 | return -ENXIO; | |
5273 | ||
162d7753 KB |
5274 | if (pqi_get_ctrl_mode(ctrl_info) == SIS_MODE) |
5275 | return 0; | |
5276 | ||
5277 | if (sis_is_kernel_up(ctrl_info)) { | |
5278 | pqi_save_ctrl_mode(ctrl_info, SIS_MODE); | |
5279 | return 0; | |
ff6abb73 KB |
5280 | } |
5281 | ||
162d7753 | 5282 | return pqi_revert_to_sis_mode(ctrl_info); |
ff6abb73 KB |
5283 | } |
5284 | ||
6c223761 KB |
5285 | static int pqi_ctrl_init(struct pqi_ctrl_info *ctrl_info) |
5286 | { | |
5287 | int rc; | |
5288 | ||
162d7753 KB |
5289 | rc = pqi_force_sis_mode(ctrl_info); |
5290 | if (rc) | |
5291 | return rc; | |
6c223761 KB |
5292 | |
5293 | /* | |
5294 | * Wait until the controller is ready to start accepting SIS | |
5295 | * commands. | |
5296 | */ | |
5297 | rc = sis_wait_for_ctrl_ready(ctrl_info); | |
5298 | if (rc) { | |
5299 | dev_err(&ctrl_info->pci_dev->dev, | |
5300 | "error initializing SIS interface\n"); | |
5301 | return rc; | |
5302 | } | |
5303 | ||
5304 | /* | |
5305 | * Get the controller properties. This allows us to determine | |
5306 | * whether or not it supports PQI mode. | |
5307 | */ | |
5308 | rc = sis_get_ctrl_properties(ctrl_info); | |
5309 | if (rc) { | |
5310 | dev_err(&ctrl_info->pci_dev->dev, | |
5311 | "error obtaining controller properties\n"); | |
5312 | return rc; | |
5313 | } | |
5314 | ||
5315 | rc = sis_get_pqi_capabilities(ctrl_info); | |
5316 | if (rc) { | |
5317 | dev_err(&ctrl_info->pci_dev->dev, | |
5318 | "error obtaining controller capabilities\n"); | |
5319 | return rc; | |
5320 | } | |
5321 | ||
5322 | if (ctrl_info->max_outstanding_requests > PQI_MAX_OUTSTANDING_REQUESTS) | |
5323 | ctrl_info->max_outstanding_requests = | |
5324 | PQI_MAX_OUTSTANDING_REQUESTS; | |
5325 | ||
5326 | pqi_calculate_io_resources(ctrl_info); | |
5327 | ||
5328 | rc = pqi_alloc_error_buffer(ctrl_info); | |
5329 | if (rc) { | |
5330 | dev_err(&ctrl_info->pci_dev->dev, | |
5331 | "failed to allocate PQI error buffer\n"); | |
5332 | return rc; | |
5333 | } | |
5334 | ||
5335 | /* | |
5336 | * If the function we are about to call succeeds, the | |
5337 | * controller will transition from legacy SIS mode | |
5338 | * into PQI mode. | |
5339 | */ | |
5340 | rc = sis_init_base_struct_addr(ctrl_info); | |
5341 | if (rc) { | |
5342 | dev_err(&ctrl_info->pci_dev->dev, | |
5343 | "error initializing PQI mode\n"); | |
5344 | return rc; | |
5345 | } | |
5346 | ||
5347 | /* Wait for the controller to complete the SIS -> PQI transition. */ | |
5348 | rc = pqi_wait_for_pqi_mode_ready(ctrl_info); | |
5349 | if (rc) { | |
5350 | dev_err(&ctrl_info->pci_dev->dev, | |
5351 | "transition to PQI mode failed\n"); | |
5352 | return rc; | |
5353 | } | |
5354 | ||
5355 | /* From here on, we are running in PQI mode. */ | |
5356 | ctrl_info->pqi_mode_enabled = true; | |
ff6abb73 | 5357 | pqi_save_ctrl_mode(ctrl_info, PQI_MODE); |
6c223761 KB |
5358 | |
5359 | rc = pqi_alloc_admin_queues(ctrl_info); | |
5360 | if (rc) { | |
5361 | dev_err(&ctrl_info->pci_dev->dev, | |
5362 | "error allocating admin queues\n"); | |
5363 | return rc; | |
5364 | } | |
5365 | ||
5366 | rc = pqi_create_admin_queues(ctrl_info); | |
5367 | if (rc) { | |
5368 | dev_err(&ctrl_info->pci_dev->dev, | |
5369 | "error creating admin queues\n"); | |
5370 | return rc; | |
5371 | } | |
5372 | ||
5373 | rc = pqi_report_device_capability(ctrl_info); | |
5374 | if (rc) { | |
5375 | dev_err(&ctrl_info->pci_dev->dev, | |
5376 | "obtaining device capability failed\n"); | |
5377 | return rc; | |
5378 | } | |
5379 | ||
5380 | rc = pqi_validate_device_capability(ctrl_info); | |
5381 | if (rc) | |
5382 | return rc; | |
5383 | ||
5384 | pqi_calculate_queue_resources(ctrl_info); | |
5385 | ||
5386 | rc = pqi_enable_msix_interrupts(ctrl_info); | |
5387 | if (rc) | |
5388 | return rc; | |
5389 | ||
5390 | if (ctrl_info->num_msix_vectors_enabled < ctrl_info->num_queue_groups) { | |
5391 | ctrl_info->max_msix_vectors = | |
5392 | ctrl_info->num_msix_vectors_enabled; | |
5393 | pqi_calculate_queue_resources(ctrl_info); | |
5394 | } | |
5395 | ||
5396 | rc = pqi_alloc_io_resources(ctrl_info); | |
5397 | if (rc) | |
5398 | return rc; | |
5399 | ||
5400 | rc = pqi_alloc_operational_queues(ctrl_info); | |
5401 | if (rc) | |
5402 | return rc; | |
5403 | ||
5404 | pqi_init_operational_queues(ctrl_info); | |
5405 | ||
5406 | rc = pqi_request_irqs(ctrl_info); | |
5407 | if (rc) | |
5408 | return rc; | |
5409 | ||
6c223761 KB |
5410 | rc = pqi_create_queues(ctrl_info); |
5411 | if (rc) | |
5412 | return rc; | |
5413 | ||
5414 | sis_enable_msix(ctrl_info); | |
5415 | ||
5416 | rc = pqi_configure_events(ctrl_info); | |
5417 | if (rc) { | |
5418 | dev_err(&ctrl_info->pci_dev->dev, | |
5419 | "error configuring events\n"); | |
5420 | return rc; | |
5421 | } | |
5422 | ||
5423 | pqi_start_heartbeat_timer(ctrl_info); | |
5424 | ||
5425 | ctrl_info->controller_online = true; | |
5426 | ||
5427 | /* Register with the SCSI subsystem. */ | |
5428 | rc = pqi_register_scsi(ctrl_info); | |
5429 | if (rc) | |
5430 | return rc; | |
5431 | ||
5432 | rc = pqi_get_ctrl_firmware_version(ctrl_info); | |
5433 | if (rc) { | |
5434 | dev_err(&ctrl_info->pci_dev->dev, | |
5435 | "error obtaining firmware version\n"); | |
5436 | return rc; | |
5437 | } | |
5438 | ||
5439 | rc = pqi_write_driver_version_to_host_wellness(ctrl_info); | |
5440 | if (rc) { | |
5441 | dev_err(&ctrl_info->pci_dev->dev, | |
5442 | "error updating host wellness\n"); | |
5443 | return rc; | |
5444 | } | |
5445 | ||
5446 | pqi_schedule_update_time_worker(ctrl_info); | |
5447 | ||
5448 | pqi_scan_scsi_devices(ctrl_info); | |
5449 | ||
5450 | return 0; | |
5451 | } | |
5452 | ||
a81ed5f3 KB |
5453 | static inline int pqi_set_pcie_completion_timeout(struct pci_dev *pci_dev, |
5454 | u16 timeout) | |
5455 | { | |
5456 | return pcie_capability_clear_and_set_word(pci_dev, PCI_EXP_DEVCTL2, | |
5457 | PCI_EXP_DEVCTL2_COMP_TIMEOUT, timeout); | |
5458 | } | |
5459 | ||
6c223761 KB |
5460 | static int pqi_pci_init(struct pqi_ctrl_info *ctrl_info) |
5461 | { | |
5462 | int rc; | |
5463 | u64 mask; | |
5464 | ||
5465 | rc = pci_enable_device(ctrl_info->pci_dev); | |
5466 | if (rc) { | |
5467 | dev_err(&ctrl_info->pci_dev->dev, | |
5468 | "failed to enable PCI device\n"); | |
5469 | return rc; | |
5470 | } | |
5471 | ||
5472 | if (sizeof(dma_addr_t) > 4) | |
5473 | mask = DMA_BIT_MASK(64); | |
5474 | else | |
5475 | mask = DMA_BIT_MASK(32); | |
5476 | ||
5477 | rc = dma_set_mask(&ctrl_info->pci_dev->dev, mask); | |
5478 | if (rc) { | |
5479 | dev_err(&ctrl_info->pci_dev->dev, "failed to set DMA mask\n"); | |
5480 | goto disable_device; | |
5481 | } | |
5482 | ||
5483 | rc = pci_request_regions(ctrl_info->pci_dev, DRIVER_NAME_SHORT); | |
5484 | if (rc) { | |
5485 | dev_err(&ctrl_info->pci_dev->dev, | |
5486 | "failed to obtain PCI resources\n"); | |
5487 | goto disable_device; | |
5488 | } | |
5489 | ||
5490 | ctrl_info->iomem_base = ioremap_nocache(pci_resource_start( | |
5491 | ctrl_info->pci_dev, 0), | |
5492 | sizeof(struct pqi_ctrl_registers)); | |
5493 | if (!ctrl_info->iomem_base) { | |
5494 | dev_err(&ctrl_info->pci_dev->dev, | |
5495 | "failed to map memory for controller registers\n"); | |
5496 | rc = -ENOMEM; | |
5497 | goto release_regions; | |
5498 | } | |
5499 | ||
5500 | ctrl_info->registers = ctrl_info->iomem_base; | |
5501 | ctrl_info->pqi_registers = &ctrl_info->registers->pqi_registers; | |
5502 | ||
a81ed5f3 KB |
5503 | #define PCI_EXP_COMP_TIMEOUT_65_TO_210_MS 0x6 |
5504 | ||
5505 | /* Increase the PCIe completion timeout. */ | |
5506 | rc = pqi_set_pcie_completion_timeout(ctrl_info->pci_dev, | |
5507 | PCI_EXP_COMP_TIMEOUT_65_TO_210_MS); | |
5508 | if (rc) { | |
5509 | dev_err(&ctrl_info->pci_dev->dev, | |
5510 | "failed to set PCIe completion timeout\n"); | |
5511 | goto release_regions; | |
5512 | } | |
5513 | ||
6c223761 KB |
5514 | /* Enable bus mastering. */ |
5515 | pci_set_master(ctrl_info->pci_dev); | |
5516 | ||
5517 | pci_set_drvdata(ctrl_info->pci_dev, ctrl_info); | |
5518 | ||
5519 | return 0; | |
5520 | ||
5521 | release_regions: | |
5522 | pci_release_regions(ctrl_info->pci_dev); | |
5523 | disable_device: | |
5524 | pci_disable_device(ctrl_info->pci_dev); | |
5525 | ||
5526 | return rc; | |
5527 | } | |
5528 | ||
5529 | static void pqi_cleanup_pci_init(struct pqi_ctrl_info *ctrl_info) | |
5530 | { | |
5531 | iounmap(ctrl_info->iomem_base); | |
5532 | pci_release_regions(ctrl_info->pci_dev); | |
5533 | pci_disable_device(ctrl_info->pci_dev); | |
5534 | pci_set_drvdata(ctrl_info->pci_dev, NULL); | |
5535 | } | |
5536 | ||
5537 | static struct pqi_ctrl_info *pqi_alloc_ctrl_info(int numa_node) | |
5538 | { | |
5539 | struct pqi_ctrl_info *ctrl_info; | |
5540 | ||
5541 | ctrl_info = kzalloc_node(sizeof(struct pqi_ctrl_info), | |
5542 | GFP_KERNEL, numa_node); | |
5543 | if (!ctrl_info) | |
5544 | return NULL; | |
5545 | ||
5546 | mutex_init(&ctrl_info->scan_mutex); | |
5547 | ||
5548 | INIT_LIST_HEAD(&ctrl_info->scsi_device_list); | |
5549 | spin_lock_init(&ctrl_info->scsi_device_list_lock); | |
5550 | ||
5551 | INIT_WORK(&ctrl_info->event_work, pqi_event_worker); | |
5552 | atomic_set(&ctrl_info->num_interrupts, 0); | |
5553 | ||
5554 | INIT_DELAYED_WORK(&ctrl_info->rescan_work, pqi_rescan_worker); | |
5555 | INIT_DELAYED_WORK(&ctrl_info->update_time_work, pqi_update_time_worker); | |
5556 | ||
5557 | sema_init(&ctrl_info->sync_request_sem, | |
5558 | PQI_RESERVED_IO_SLOTS_SYNCHRONOUS_REQUESTS); | |
5559 | sema_init(&ctrl_info->lun_reset_sem, PQI_RESERVED_IO_SLOTS_LUN_RESET); | |
5560 | ||
5561 | ctrl_info->ctrl_id = atomic_inc_return(&pqi_controller_count) - 1; | |
5562 | ctrl_info->max_msix_vectors = PQI_MAX_MSIX_VECTORS; | |
5563 | ||
5564 | return ctrl_info; | |
5565 | } | |
5566 | ||
5567 | static inline void pqi_free_ctrl_info(struct pqi_ctrl_info *ctrl_info) | |
5568 | { | |
5569 | kfree(ctrl_info); | |
5570 | } | |
5571 | ||
5572 | static void pqi_free_interrupts(struct pqi_ctrl_info *ctrl_info) | |
5573 | { | |
98bf061b KB |
5574 | pqi_free_irqs(ctrl_info); |
5575 | pqi_disable_msix_interrupts(ctrl_info); | |
6c223761 KB |
5576 | } |
5577 | ||
5578 | static void pqi_free_ctrl_resources(struct pqi_ctrl_info *ctrl_info) | |
5579 | { | |
5580 | pqi_stop_heartbeat_timer(ctrl_info); | |
5581 | pqi_free_interrupts(ctrl_info); | |
5582 | if (ctrl_info->queue_memory_base) | |
5583 | dma_free_coherent(&ctrl_info->pci_dev->dev, | |
5584 | ctrl_info->queue_memory_length, | |
5585 | ctrl_info->queue_memory_base, | |
5586 | ctrl_info->queue_memory_base_dma_handle); | |
5587 | if (ctrl_info->admin_queue_memory_base) | |
5588 | dma_free_coherent(&ctrl_info->pci_dev->dev, | |
5589 | ctrl_info->admin_queue_memory_length, | |
5590 | ctrl_info->admin_queue_memory_base, | |
5591 | ctrl_info->admin_queue_memory_base_dma_handle); | |
5592 | pqi_free_all_io_requests(ctrl_info); | |
5593 | if (ctrl_info->error_buffer) | |
5594 | dma_free_coherent(&ctrl_info->pci_dev->dev, | |
5595 | ctrl_info->error_buffer_length, | |
5596 | ctrl_info->error_buffer, | |
5597 | ctrl_info->error_buffer_dma_handle); | |
5598 | if (ctrl_info->iomem_base) | |
5599 | pqi_cleanup_pci_init(ctrl_info); | |
5600 | pqi_free_ctrl_info(ctrl_info); | |
5601 | } | |
5602 | ||
5603 | static void pqi_remove_ctrl(struct pqi_ctrl_info *ctrl_info) | |
5604 | { | |
e57a1f9b KB |
5605 | cancel_delayed_work_sync(&ctrl_info->rescan_work); |
5606 | cancel_delayed_work_sync(&ctrl_info->update_time_work); | |
5607 | pqi_remove_all_scsi_devices(ctrl_info); | |
5608 | pqi_unregister_scsi(ctrl_info); | |
162d7753 KB |
5609 | if (ctrl_info->pqi_mode_enabled) |
5610 | pqi_revert_to_sis_mode(ctrl_info); | |
6c223761 KB |
5611 | pqi_free_ctrl_resources(ctrl_info); |
5612 | } | |
5613 | ||
5614 | static void pqi_print_ctrl_info(struct pci_dev *pdev, | |
5615 | const struct pci_device_id *id) | |
5616 | { | |
5617 | char *ctrl_description; | |
5618 | ||
5619 | if (id->driver_data) { | |
5620 | ctrl_description = (char *)id->driver_data; | |
5621 | } else { | |
5622 | switch (id->subvendor) { | |
5623 | case PCI_VENDOR_ID_HP: | |
5624 | ctrl_description = hpe_branded_controller; | |
5625 | break; | |
5626 | case PCI_VENDOR_ID_ADAPTEC2: | |
5627 | default: | |
5628 | ctrl_description = microsemi_branded_controller; | |
5629 | break; | |
5630 | } | |
5631 | } | |
5632 | ||
5633 | dev_info(&pdev->dev, "%s found\n", ctrl_description); | |
5634 | } | |
5635 | ||
5636 | static int pqi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |
5637 | { | |
5638 | int rc; | |
5639 | int node; | |
5640 | struct pqi_ctrl_info *ctrl_info; | |
5641 | ||
5642 | pqi_print_ctrl_info(pdev, id); | |
5643 | ||
5644 | if (pqi_disable_device_id_wildcards && | |
5645 | id->subvendor == PCI_ANY_ID && | |
5646 | id->subdevice == PCI_ANY_ID) { | |
5647 | dev_warn(&pdev->dev, | |
5648 | "controller not probed because device ID wildcards are disabled\n"); | |
5649 | return -ENODEV; | |
5650 | } | |
5651 | ||
5652 | if (id->subvendor == PCI_ANY_ID || id->subdevice == PCI_ANY_ID) | |
5653 | dev_warn(&pdev->dev, | |
5654 | "controller device ID matched using wildcards\n"); | |
5655 | ||
5656 | node = dev_to_node(&pdev->dev); | |
5657 | if (node == NUMA_NO_NODE) | |
5658 | set_dev_node(&pdev->dev, 0); | |
5659 | ||
5660 | ctrl_info = pqi_alloc_ctrl_info(node); | |
5661 | if (!ctrl_info) { | |
5662 | dev_err(&pdev->dev, | |
5663 | "failed to allocate controller info block\n"); | |
5664 | return -ENOMEM; | |
5665 | } | |
5666 | ||
5667 | ctrl_info->pci_dev = pdev; | |
5668 | ||
5669 | rc = pqi_pci_init(ctrl_info); | |
5670 | if (rc) | |
5671 | goto error; | |
5672 | ||
5673 | rc = pqi_ctrl_init(ctrl_info); | |
5674 | if (rc) | |
5675 | goto error; | |
5676 | ||
5677 | return 0; | |
5678 | ||
5679 | error: | |
5680 | pqi_remove_ctrl(ctrl_info); | |
5681 | ||
5682 | return rc; | |
5683 | } | |
5684 | ||
5685 | static void pqi_pci_remove(struct pci_dev *pdev) | |
5686 | { | |
5687 | struct pqi_ctrl_info *ctrl_info; | |
5688 | ||
5689 | ctrl_info = pci_get_drvdata(pdev); | |
5690 | if (!ctrl_info) | |
5691 | return; | |
5692 | ||
5693 | pqi_remove_ctrl(ctrl_info); | |
5694 | } | |
5695 | ||
5696 | static void pqi_shutdown(struct pci_dev *pdev) | |
5697 | { | |
5698 | int rc; | |
5699 | struct pqi_ctrl_info *ctrl_info; | |
5700 | ||
5701 | ctrl_info = pci_get_drvdata(pdev); | |
5702 | if (!ctrl_info) | |
5703 | goto error; | |
5704 | ||
5705 | /* | |
5706 | * Write all data in the controller's battery-backed cache to | |
5707 | * storage. | |
5708 | */ | |
5709 | rc = pqi_flush_cache(ctrl_info); | |
5710 | if (rc == 0) | |
5711 | return; | |
5712 | ||
5713 | error: | |
5714 | dev_warn(&pdev->dev, | |
5715 | "unable to flush controller cache\n"); | |
5716 | } | |
5717 | ||
5718 | /* Define the PCI IDs for the controllers that we support. */ | |
5719 | static const struct pci_device_id pqi_pci_id_table[] = { | |
5720 | { | |
5721 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5722 | PCI_VENDOR_ID_ADAPTEC2, 0x0110) | |
5723 | }, | |
5724 | { | |
5725 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5726 | PCI_VENDOR_ID_HP, 0x0600) | |
5727 | }, | |
5728 | { | |
5729 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5730 | PCI_VENDOR_ID_HP, 0x0601) | |
5731 | }, | |
5732 | { | |
5733 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5734 | PCI_VENDOR_ID_HP, 0x0602) | |
5735 | }, | |
5736 | { | |
5737 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5738 | PCI_VENDOR_ID_HP, 0x0603) | |
5739 | }, | |
5740 | { | |
5741 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5742 | PCI_VENDOR_ID_HP, 0x0650) | |
5743 | }, | |
5744 | { | |
5745 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5746 | PCI_VENDOR_ID_HP, 0x0651) | |
5747 | }, | |
5748 | { | |
5749 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5750 | PCI_VENDOR_ID_HP, 0x0652) | |
5751 | }, | |
5752 | { | |
5753 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5754 | PCI_VENDOR_ID_HP, 0x0653) | |
5755 | }, | |
5756 | { | |
5757 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5758 | PCI_VENDOR_ID_HP, 0x0654) | |
5759 | }, | |
5760 | { | |
5761 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5762 | PCI_VENDOR_ID_HP, 0x0655) | |
5763 | }, | |
5764 | { | |
5765 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5766 | PCI_VENDOR_ID_HP, 0x0700) | |
5767 | }, | |
5768 | { | |
5769 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5770 | PCI_VENDOR_ID_HP, 0x0701) | |
5771 | }, | |
5772 | { | |
5773 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5774 | PCI_VENDOR_ID_ADAPTEC2, 0x0800) | |
5775 | }, | |
5776 | { | |
5777 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5778 | PCI_VENDOR_ID_ADAPTEC2, 0x0801) | |
5779 | }, | |
5780 | { | |
5781 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5782 | PCI_VENDOR_ID_ADAPTEC2, 0x0802) | |
5783 | }, | |
5784 | { | |
5785 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5786 | PCI_VENDOR_ID_ADAPTEC2, 0x0803) | |
5787 | }, | |
5788 | { | |
5789 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5790 | PCI_VENDOR_ID_ADAPTEC2, 0x0804) | |
5791 | }, | |
5792 | { | |
5793 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5794 | PCI_VENDOR_ID_ADAPTEC2, 0x0805) | |
5795 | }, | |
5796 | { | |
5797 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5798 | PCI_VENDOR_ID_ADAPTEC2, 0x0900) | |
5799 | }, | |
5800 | { | |
5801 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5802 | PCI_VENDOR_ID_ADAPTEC2, 0x0901) | |
5803 | }, | |
5804 | { | |
5805 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5806 | PCI_VENDOR_ID_ADAPTEC2, 0x0902) | |
5807 | }, | |
5808 | { | |
5809 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5810 | PCI_VENDOR_ID_ADAPTEC2, 0x0903) | |
5811 | }, | |
5812 | { | |
5813 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5814 | PCI_VENDOR_ID_ADAPTEC2, 0x0904) | |
5815 | }, | |
5816 | { | |
5817 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5818 | PCI_VENDOR_ID_ADAPTEC2, 0x0905) | |
5819 | }, | |
5820 | { | |
5821 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5822 | PCI_VENDOR_ID_ADAPTEC2, 0x0906) | |
5823 | }, | |
5824 | { | |
5825 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5826 | PCI_VENDOR_ID_HP, 0x1001) | |
5827 | }, | |
5828 | { | |
5829 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5830 | PCI_VENDOR_ID_HP, 0x1100) | |
5831 | }, | |
5832 | { | |
5833 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5834 | PCI_VENDOR_ID_HP, 0x1101) | |
5835 | }, | |
5836 | { | |
5837 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5838 | PCI_VENDOR_ID_HP, 0x1102) | |
5839 | }, | |
5840 | { | |
5841 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5842 | PCI_VENDOR_ID_HP, 0x1150) | |
5843 | }, | |
5844 | { | |
5845 | PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, | |
5846 | PCI_ANY_ID, PCI_ANY_ID) | |
5847 | }, | |
5848 | { 0 } | |
5849 | }; | |
5850 | ||
5851 | MODULE_DEVICE_TABLE(pci, pqi_pci_id_table); | |
5852 | ||
5853 | static struct pci_driver pqi_pci_driver = { | |
5854 | .name = DRIVER_NAME_SHORT, | |
5855 | .id_table = pqi_pci_id_table, | |
5856 | .probe = pqi_pci_probe, | |
5857 | .remove = pqi_pci_remove, | |
5858 | .shutdown = pqi_shutdown, | |
5859 | }; | |
5860 | ||
5861 | static int __init pqi_init(void) | |
5862 | { | |
5863 | int rc; | |
5864 | ||
5865 | pr_info(DRIVER_NAME "\n"); | |
5866 | ||
5867 | pqi_sas_transport_template = | |
5868 | sas_attach_transport(&pqi_sas_transport_functions); | |
5869 | if (!pqi_sas_transport_template) | |
5870 | return -ENODEV; | |
5871 | ||
5872 | rc = pci_register_driver(&pqi_pci_driver); | |
5873 | if (rc) | |
5874 | sas_release_transport(pqi_sas_transport_template); | |
5875 | ||
5876 | return rc; | |
5877 | } | |
5878 | ||
5879 | static void __exit pqi_cleanup(void) | |
5880 | { | |
5881 | pci_unregister_driver(&pqi_pci_driver); | |
5882 | sas_release_transport(pqi_sas_transport_template); | |
5883 | } | |
5884 | ||
5885 | module_init(pqi_init); | |
5886 | module_exit(pqi_cleanup); | |
5887 | ||
5888 | static void __attribute__((unused)) verify_structures(void) | |
5889 | { | |
5890 | BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, | |
5891 | sis_host_to_ctrl_doorbell) != 0x20); | |
5892 | BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, | |
5893 | sis_interrupt_mask) != 0x34); | |
5894 | BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, | |
5895 | sis_ctrl_to_host_doorbell) != 0x9c); | |
5896 | BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, | |
5897 | sis_ctrl_to_host_doorbell_clear) != 0xa0); | |
ff6abb73 KB |
5898 | BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, |
5899 | sis_driver_scratch) != 0xb0); | |
6c223761 KB |
5900 | BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, |
5901 | sis_firmware_status) != 0xbc); | |
5902 | BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, | |
5903 | sis_mailbox) != 0x1000); | |
5904 | BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, | |
5905 | pqi_registers) != 0x4000); | |
5906 | ||
5907 | BUILD_BUG_ON(offsetof(struct pqi_iu_header, | |
5908 | iu_type) != 0x0); | |
5909 | BUILD_BUG_ON(offsetof(struct pqi_iu_header, | |
5910 | iu_length) != 0x2); | |
5911 | BUILD_BUG_ON(offsetof(struct pqi_iu_header, | |
5912 | response_queue_id) != 0x4); | |
5913 | BUILD_BUG_ON(offsetof(struct pqi_iu_header, | |
5914 | work_area) != 0x6); | |
5915 | BUILD_BUG_ON(sizeof(struct pqi_iu_header) != 0x8); | |
5916 | ||
5917 | BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, | |
5918 | status) != 0x0); | |
5919 | BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, | |
5920 | service_response) != 0x1); | |
5921 | BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, | |
5922 | data_present) != 0x2); | |
5923 | BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, | |
5924 | reserved) != 0x3); | |
5925 | BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, | |
5926 | residual_count) != 0x4); | |
5927 | BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, | |
5928 | data_length) != 0x8); | |
5929 | BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, | |
5930 | reserved1) != 0xa); | |
5931 | BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, | |
5932 | data) != 0xc); | |
5933 | BUILD_BUG_ON(sizeof(struct pqi_aio_error_info) != 0x10c); | |
5934 | ||
5935 | BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, | |
5936 | data_in_result) != 0x0); | |
5937 | BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, | |
5938 | data_out_result) != 0x1); | |
5939 | BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, | |
5940 | reserved) != 0x2); | |
5941 | BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, | |
5942 | status) != 0x5); | |
5943 | BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, | |
5944 | status_qualifier) != 0x6); | |
5945 | BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, | |
5946 | sense_data_length) != 0x8); | |
5947 | BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, | |
5948 | response_data_length) != 0xa); | |
5949 | BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, | |
5950 | data_in_transferred) != 0xc); | |
5951 | BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, | |
5952 | data_out_transferred) != 0x10); | |
5953 | BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, | |
5954 | data) != 0x14); | |
5955 | BUILD_BUG_ON(sizeof(struct pqi_raid_error_info) != 0x114); | |
5956 | ||
5957 | BUILD_BUG_ON(offsetof(struct pqi_device_registers, | |
5958 | signature) != 0x0); | |
5959 | BUILD_BUG_ON(offsetof(struct pqi_device_registers, | |
5960 | function_and_status_code) != 0x8); | |
5961 | BUILD_BUG_ON(offsetof(struct pqi_device_registers, | |
5962 | max_admin_iq_elements) != 0x10); | |
5963 | BUILD_BUG_ON(offsetof(struct pqi_device_registers, | |
5964 | max_admin_oq_elements) != 0x11); | |
5965 | BUILD_BUG_ON(offsetof(struct pqi_device_registers, | |
5966 | admin_iq_element_length) != 0x12); | |
5967 | BUILD_BUG_ON(offsetof(struct pqi_device_registers, | |
5968 | admin_oq_element_length) != 0x13); | |
5969 | BUILD_BUG_ON(offsetof(struct pqi_device_registers, | |
5970 | max_reset_timeout) != 0x14); | |
5971 | BUILD_BUG_ON(offsetof(struct pqi_device_registers, | |
5972 | legacy_intx_status) != 0x18); | |
5973 | BUILD_BUG_ON(offsetof(struct pqi_device_registers, | |
5974 | legacy_intx_mask_set) != 0x1c); | |
5975 | BUILD_BUG_ON(offsetof(struct pqi_device_registers, | |
5976 | legacy_intx_mask_clear) != 0x20); | |
5977 | BUILD_BUG_ON(offsetof(struct pqi_device_registers, | |
5978 | device_status) != 0x40); | |
5979 | BUILD_BUG_ON(offsetof(struct pqi_device_registers, | |
5980 | admin_iq_pi_offset) != 0x48); | |
5981 | BUILD_BUG_ON(offsetof(struct pqi_device_registers, | |
5982 | admin_oq_ci_offset) != 0x50); | |
5983 | BUILD_BUG_ON(offsetof(struct pqi_device_registers, | |
5984 | admin_iq_element_array_addr) != 0x58); | |
5985 | BUILD_BUG_ON(offsetof(struct pqi_device_registers, | |
5986 | admin_oq_element_array_addr) != 0x60); | |
5987 | BUILD_BUG_ON(offsetof(struct pqi_device_registers, | |
5988 | admin_iq_ci_addr) != 0x68); | |
5989 | BUILD_BUG_ON(offsetof(struct pqi_device_registers, | |
5990 | admin_oq_pi_addr) != 0x70); | |
5991 | BUILD_BUG_ON(offsetof(struct pqi_device_registers, | |
5992 | admin_iq_num_elements) != 0x78); | |
5993 | BUILD_BUG_ON(offsetof(struct pqi_device_registers, | |
5994 | admin_oq_num_elements) != 0x79); | |
5995 | BUILD_BUG_ON(offsetof(struct pqi_device_registers, | |
5996 | admin_queue_int_msg_num) != 0x7a); | |
5997 | BUILD_BUG_ON(offsetof(struct pqi_device_registers, | |
5998 | device_error) != 0x80); | |
5999 | BUILD_BUG_ON(offsetof(struct pqi_device_registers, | |
6000 | error_details) != 0x88); | |
6001 | BUILD_BUG_ON(offsetof(struct pqi_device_registers, | |
6002 | device_reset) != 0x90); | |
6003 | BUILD_BUG_ON(offsetof(struct pqi_device_registers, | |
6004 | power_action) != 0x94); | |
6005 | BUILD_BUG_ON(sizeof(struct pqi_device_registers) != 0x100); | |
6006 | ||
6007 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, | |
6008 | header.iu_type) != 0); | |
6009 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, | |
6010 | header.iu_length) != 2); | |
6011 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, | |
6012 | header.work_area) != 6); | |
6013 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, | |
6014 | request_id) != 8); | |
6015 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, | |
6016 | function_code) != 10); | |
6017 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, | |
6018 | data.report_device_capability.buffer_length) != 44); | |
6019 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, | |
6020 | data.report_device_capability.sg_descriptor) != 48); | |
6021 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, | |
6022 | data.create_operational_iq.queue_id) != 12); | |
6023 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, | |
6024 | data.create_operational_iq.element_array_addr) != 16); | |
6025 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, | |
6026 | data.create_operational_iq.ci_addr) != 24); | |
6027 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, | |
6028 | data.create_operational_iq.num_elements) != 32); | |
6029 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, | |
6030 | data.create_operational_iq.element_length) != 34); | |
6031 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, | |
6032 | data.create_operational_iq.queue_protocol) != 36); | |
6033 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, | |
6034 | data.create_operational_oq.queue_id) != 12); | |
6035 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, | |
6036 | data.create_operational_oq.element_array_addr) != 16); | |
6037 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, | |
6038 | data.create_operational_oq.pi_addr) != 24); | |
6039 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, | |
6040 | data.create_operational_oq.num_elements) != 32); | |
6041 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, | |
6042 | data.create_operational_oq.element_length) != 34); | |
6043 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, | |
6044 | data.create_operational_oq.queue_protocol) != 36); | |
6045 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, | |
6046 | data.create_operational_oq.int_msg_num) != 40); | |
6047 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, | |
6048 | data.create_operational_oq.coalescing_count) != 42); | |
6049 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, | |
6050 | data.create_operational_oq.min_coalescing_time) != 44); | |
6051 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, | |
6052 | data.create_operational_oq.max_coalescing_time) != 48); | |
6053 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, | |
6054 | data.delete_operational_queue.queue_id) != 12); | |
6055 | BUILD_BUG_ON(sizeof(struct pqi_general_admin_request) != 64); | |
6056 | BUILD_BUG_ON(FIELD_SIZEOF(struct pqi_general_admin_request, | |
6057 | data.create_operational_iq) != 64 - 11); | |
6058 | BUILD_BUG_ON(FIELD_SIZEOF(struct pqi_general_admin_request, | |
6059 | data.create_operational_oq) != 64 - 11); | |
6060 | BUILD_BUG_ON(FIELD_SIZEOF(struct pqi_general_admin_request, | |
6061 | data.delete_operational_queue) != 64 - 11); | |
6062 | ||
6063 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, | |
6064 | header.iu_type) != 0); | |
6065 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, | |
6066 | header.iu_length) != 2); | |
6067 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, | |
6068 | header.work_area) != 6); | |
6069 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, | |
6070 | request_id) != 8); | |
6071 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, | |
6072 | function_code) != 10); | |
6073 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, | |
6074 | status) != 11); | |
6075 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, | |
6076 | data.create_operational_iq.status_descriptor) != 12); | |
6077 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, | |
6078 | data.create_operational_iq.iq_pi_offset) != 16); | |
6079 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, | |
6080 | data.create_operational_oq.status_descriptor) != 12); | |
6081 | BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, | |
6082 | data.create_operational_oq.oq_ci_offset) != 16); | |
6083 | BUILD_BUG_ON(sizeof(struct pqi_general_admin_response) != 64); | |
6084 | ||
6085 | BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, | |
6086 | header.iu_type) != 0); | |
6087 | BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, | |
6088 | header.iu_length) != 2); | |
6089 | BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, | |
6090 | header.response_queue_id) != 4); | |
6091 | BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, | |
6092 | header.work_area) != 6); | |
6093 | BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, | |
6094 | request_id) != 8); | |
6095 | BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, | |
6096 | nexus_id) != 10); | |
6097 | BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, | |
6098 | buffer_length) != 12); | |
6099 | BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, | |
6100 | lun_number) != 16); | |
6101 | BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, | |
6102 | protocol_specific) != 24); | |
6103 | BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, | |
6104 | error_index) != 27); | |
6105 | BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, | |
6106 | cdb) != 32); | |
6107 | BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, | |
6108 | sg_descriptors) != 64); | |
6109 | BUILD_BUG_ON(sizeof(struct pqi_raid_path_request) != | |
6110 | PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); | |
6111 | ||
6112 | BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, | |
6113 | header.iu_type) != 0); | |
6114 | BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, | |
6115 | header.iu_length) != 2); | |
6116 | BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, | |
6117 | header.response_queue_id) != 4); | |
6118 | BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, | |
6119 | header.work_area) != 6); | |
6120 | BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, | |
6121 | request_id) != 8); | |
6122 | BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, | |
6123 | nexus_id) != 12); | |
6124 | BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, | |
6125 | buffer_length) != 16); | |
6126 | BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, | |
6127 | data_encryption_key_index) != 22); | |
6128 | BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, | |
6129 | encrypt_tweak_lower) != 24); | |
6130 | BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, | |
6131 | encrypt_tweak_upper) != 28); | |
6132 | BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, | |
6133 | cdb) != 32); | |
6134 | BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, | |
6135 | error_index) != 48); | |
6136 | BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, | |
6137 | num_sg_descriptors) != 50); | |
6138 | BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, | |
6139 | cdb_length) != 51); | |
6140 | BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, | |
6141 | lun_number) != 52); | |
6142 | BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, | |
6143 | sg_descriptors) != 64); | |
6144 | BUILD_BUG_ON(sizeof(struct pqi_aio_path_request) != | |
6145 | PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); | |
6146 | ||
6147 | BUILD_BUG_ON(offsetof(struct pqi_io_response, | |
6148 | header.iu_type) != 0); | |
6149 | BUILD_BUG_ON(offsetof(struct pqi_io_response, | |
6150 | header.iu_length) != 2); | |
6151 | BUILD_BUG_ON(offsetof(struct pqi_io_response, | |
6152 | request_id) != 8); | |
6153 | BUILD_BUG_ON(offsetof(struct pqi_io_response, | |
6154 | error_index) != 10); | |
6155 | ||
6156 | BUILD_BUG_ON(offsetof(struct pqi_general_management_request, | |
6157 | header.iu_type) != 0); | |
6158 | BUILD_BUG_ON(offsetof(struct pqi_general_management_request, | |
6159 | header.iu_length) != 2); | |
6160 | BUILD_BUG_ON(offsetof(struct pqi_general_management_request, | |
6161 | header.response_queue_id) != 4); | |
6162 | BUILD_BUG_ON(offsetof(struct pqi_general_management_request, | |
6163 | request_id) != 8); | |
6164 | BUILD_BUG_ON(offsetof(struct pqi_general_management_request, | |
6165 | data.report_event_configuration.buffer_length) != 12); | |
6166 | BUILD_BUG_ON(offsetof(struct pqi_general_management_request, | |
6167 | data.report_event_configuration.sg_descriptors) != 16); | |
6168 | BUILD_BUG_ON(offsetof(struct pqi_general_management_request, | |
6169 | data.set_event_configuration.global_event_oq_id) != 10); | |
6170 | BUILD_BUG_ON(offsetof(struct pqi_general_management_request, | |
6171 | data.set_event_configuration.buffer_length) != 12); | |
6172 | BUILD_BUG_ON(offsetof(struct pqi_general_management_request, | |
6173 | data.set_event_configuration.sg_descriptors) != 16); | |
6174 | ||
6175 | BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor, | |
6176 | max_inbound_iu_length) != 6); | |
6177 | BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor, | |
6178 | max_outbound_iu_length) != 14); | |
6179 | BUILD_BUG_ON(sizeof(struct pqi_iu_layer_descriptor) != 16); | |
6180 | ||
6181 | BUILD_BUG_ON(offsetof(struct pqi_device_capability, | |
6182 | data_length) != 0); | |
6183 | BUILD_BUG_ON(offsetof(struct pqi_device_capability, | |
6184 | iq_arbitration_priority_support_bitmask) != 8); | |
6185 | BUILD_BUG_ON(offsetof(struct pqi_device_capability, | |
6186 | maximum_aw_a) != 9); | |
6187 | BUILD_BUG_ON(offsetof(struct pqi_device_capability, | |
6188 | maximum_aw_b) != 10); | |
6189 | BUILD_BUG_ON(offsetof(struct pqi_device_capability, | |
6190 | maximum_aw_c) != 11); | |
6191 | BUILD_BUG_ON(offsetof(struct pqi_device_capability, | |
6192 | max_inbound_queues) != 16); | |
6193 | BUILD_BUG_ON(offsetof(struct pqi_device_capability, | |
6194 | max_elements_per_iq) != 18); | |
6195 | BUILD_BUG_ON(offsetof(struct pqi_device_capability, | |
6196 | max_iq_element_length) != 24); | |
6197 | BUILD_BUG_ON(offsetof(struct pqi_device_capability, | |
6198 | min_iq_element_length) != 26); | |
6199 | BUILD_BUG_ON(offsetof(struct pqi_device_capability, | |
6200 | max_outbound_queues) != 30); | |
6201 | BUILD_BUG_ON(offsetof(struct pqi_device_capability, | |
6202 | max_elements_per_oq) != 32); | |
6203 | BUILD_BUG_ON(offsetof(struct pqi_device_capability, | |
6204 | intr_coalescing_time_granularity) != 34); | |
6205 | BUILD_BUG_ON(offsetof(struct pqi_device_capability, | |
6206 | max_oq_element_length) != 36); | |
6207 | BUILD_BUG_ON(offsetof(struct pqi_device_capability, | |
6208 | min_oq_element_length) != 38); | |
6209 | BUILD_BUG_ON(offsetof(struct pqi_device_capability, | |
6210 | iu_layer_descriptors) != 64); | |
6211 | BUILD_BUG_ON(sizeof(struct pqi_device_capability) != 576); | |
6212 | ||
6213 | BUILD_BUG_ON(offsetof(struct pqi_event_descriptor, | |
6214 | event_type) != 0); | |
6215 | BUILD_BUG_ON(offsetof(struct pqi_event_descriptor, | |
6216 | oq_id) != 2); | |
6217 | BUILD_BUG_ON(sizeof(struct pqi_event_descriptor) != 4); | |
6218 | ||
6219 | BUILD_BUG_ON(offsetof(struct pqi_event_config, | |
6220 | num_event_descriptors) != 2); | |
6221 | BUILD_BUG_ON(offsetof(struct pqi_event_config, | |
6222 | descriptors) != 4); | |
6223 | ||
6224 | BUILD_BUG_ON(offsetof(struct pqi_event_response, | |
6225 | header.iu_type) != 0); | |
6226 | BUILD_BUG_ON(offsetof(struct pqi_event_response, | |
6227 | header.iu_length) != 2); | |
6228 | BUILD_BUG_ON(offsetof(struct pqi_event_response, | |
6229 | event_type) != 8); | |
6230 | BUILD_BUG_ON(offsetof(struct pqi_event_response, | |
6231 | event_id) != 10); | |
6232 | BUILD_BUG_ON(offsetof(struct pqi_event_response, | |
6233 | additional_event_id) != 12); | |
6234 | BUILD_BUG_ON(offsetof(struct pqi_event_response, | |
6235 | data) != 16); | |
6236 | BUILD_BUG_ON(sizeof(struct pqi_event_response) != 32); | |
6237 | ||
6238 | BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, | |
6239 | header.iu_type) != 0); | |
6240 | BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, | |
6241 | header.iu_length) != 2); | |
6242 | BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, | |
6243 | event_type) != 8); | |
6244 | BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, | |
6245 | event_id) != 10); | |
6246 | BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, | |
6247 | additional_event_id) != 12); | |
6248 | BUILD_BUG_ON(sizeof(struct pqi_event_acknowledge_request) != 16); | |
6249 | ||
6250 | BUILD_BUG_ON(offsetof(struct pqi_task_management_request, | |
6251 | header.iu_type) != 0); | |
6252 | BUILD_BUG_ON(offsetof(struct pqi_task_management_request, | |
6253 | header.iu_length) != 2); | |
6254 | BUILD_BUG_ON(offsetof(struct pqi_task_management_request, | |
6255 | request_id) != 8); | |
6256 | BUILD_BUG_ON(offsetof(struct pqi_task_management_request, | |
6257 | nexus_id) != 10); | |
6258 | BUILD_BUG_ON(offsetof(struct pqi_task_management_request, | |
6259 | lun_number) != 16); | |
6260 | BUILD_BUG_ON(offsetof(struct pqi_task_management_request, | |
6261 | protocol_specific) != 24); | |
6262 | BUILD_BUG_ON(offsetof(struct pqi_task_management_request, | |
6263 | outbound_queue_id_to_manage) != 26); | |
6264 | BUILD_BUG_ON(offsetof(struct pqi_task_management_request, | |
6265 | request_id_to_manage) != 28); | |
6266 | BUILD_BUG_ON(offsetof(struct pqi_task_management_request, | |
6267 | task_management_function) != 30); | |
6268 | BUILD_BUG_ON(sizeof(struct pqi_task_management_request) != 32); | |
6269 | ||
6270 | BUILD_BUG_ON(offsetof(struct pqi_task_management_response, | |
6271 | header.iu_type) != 0); | |
6272 | BUILD_BUG_ON(offsetof(struct pqi_task_management_response, | |
6273 | header.iu_length) != 2); | |
6274 | BUILD_BUG_ON(offsetof(struct pqi_task_management_response, | |
6275 | request_id) != 8); | |
6276 | BUILD_BUG_ON(offsetof(struct pqi_task_management_response, | |
6277 | nexus_id) != 10); | |
6278 | BUILD_BUG_ON(offsetof(struct pqi_task_management_response, | |
6279 | additional_response_info) != 12); | |
6280 | BUILD_BUG_ON(offsetof(struct pqi_task_management_response, | |
6281 | response_code) != 15); | |
6282 | BUILD_BUG_ON(sizeof(struct pqi_task_management_response) != 16); | |
6283 | ||
6284 | BUILD_BUG_ON(offsetof(struct bmic_identify_controller, | |
6285 | configured_logical_drive_count) != 0); | |
6286 | BUILD_BUG_ON(offsetof(struct bmic_identify_controller, | |
6287 | configuration_signature) != 1); | |
6288 | BUILD_BUG_ON(offsetof(struct bmic_identify_controller, | |
6289 | firmware_version) != 5); | |
6290 | BUILD_BUG_ON(offsetof(struct bmic_identify_controller, | |
6291 | extended_logical_unit_count) != 154); | |
6292 | BUILD_BUG_ON(offsetof(struct bmic_identify_controller, | |
6293 | firmware_build_number) != 190); | |
6294 | BUILD_BUG_ON(offsetof(struct bmic_identify_controller, | |
6295 | controller_mode) != 292); | |
6296 | ||
6297 | BUILD_BUG_ON(PQI_ADMIN_IQ_NUM_ELEMENTS > 255); | |
6298 | BUILD_BUG_ON(PQI_ADMIN_OQ_NUM_ELEMENTS > 255); | |
6299 | BUILD_BUG_ON(PQI_ADMIN_IQ_ELEMENT_LENGTH % | |
6300 | PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); | |
6301 | BUILD_BUG_ON(PQI_ADMIN_OQ_ELEMENT_LENGTH % | |
6302 | PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); | |
6303 | BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH > 1048560); | |
6304 | BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH % | |
6305 | PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); | |
6306 | BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH > 1048560); | |
6307 | BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH % | |
6308 | PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); | |
6309 | ||
6310 | BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >= PQI_MAX_OUTSTANDING_REQUESTS); | |
6311 | } |