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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com) | |
7 | * Copyright (C) 1999 Andrew R. Baker (andrewb@uab.edu) | |
8 | * Copyright (C) 2001 Florian Lohoff (flo@rfc822.org) | |
9 | * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org) | |
10 | * | |
11 | * (In all truth, Jed Schimmel wrote all this code.) | |
12 | */ | |
13 | #include <linux/init.h> | |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/types.h> | |
16 | #include <linux/mm.h> | |
17 | #include <linux/blkdev.h> | |
1da177e4 LT |
18 | #include <linux/delay.h> |
19 | #include <linux/dma-mapping.h> | |
20 | #include <linux/spinlock.h> | |
21 | ||
22 | #include <asm/page.h> | |
23 | #include <asm/pgtable.h> | |
24 | #include <asm/sgialib.h> | |
25 | #include <asm/sgi/sgi.h> | |
26 | #include <asm/sgi/mc.h> | |
27 | #include <asm/sgi/hpc3.h> | |
28 | #include <asm/sgi/ip22.h> | |
29 | #include <asm/irq.h> | |
30 | #include <asm/io.h> | |
31 | ||
32 | #include "scsi.h" | |
33 | #include <scsi/scsi_host.h> | |
34 | #include "wd33c93.h" | |
1da177e4 LT |
35 | |
36 | #include <linux/stat.h> | |
37 | ||
38 | #if 0 | |
39 | #define DPRINTK(args...) printk(args) | |
40 | #else | |
41 | #define DPRINTK(args...) | |
42 | #endif | |
43 | ||
44 | #define HDATA(ptr) ((struct ip22_hostdata *)((ptr)->hostdata)) | |
45 | ||
46 | struct ip22_hostdata { | |
47 | struct WD33C93_hostdata wh; | |
48 | struct hpc_data { | |
49 | dma_addr_t dma; | |
50 | void * cpu; | |
51 | } hd; | |
52 | }; | |
53 | ||
54 | struct hpc_chunk { | |
55 | struct hpc_dma_desc desc; | |
56 | u32 _padding; /* align to quadword boundary */ | |
57 | }; | |
58 | ||
59 | struct Scsi_Host *sgiwd93_host; | |
60 | struct Scsi_Host *sgiwd93_host1; | |
61 | ||
62 | /* Wuff wuff, wuff, wd33c93.c, wuff wuff, object oriented, bow wow. */ | |
63 | static inline void write_wd33c93_count(const wd33c93_regs regs, | |
64 | unsigned long value) | |
65 | { | |
66 | *regs.SASR = WD_TRANSFER_COUNT_MSB; | |
67 | mb(); | |
68 | *regs.SCMD = ((value >> 16) & 0xff); | |
69 | *regs.SCMD = ((value >> 8) & 0xff); | |
70 | *regs.SCMD = ((value >> 0) & 0xff); | |
71 | mb(); | |
72 | } | |
73 | ||
74 | static inline unsigned long read_wd33c93_count(const wd33c93_regs regs) | |
75 | { | |
76 | unsigned long value; | |
77 | ||
78 | *regs.SASR = WD_TRANSFER_COUNT_MSB; | |
79 | mb(); | |
80 | value = ((*regs.SCMD & 0xff) << 16); | |
81 | value |= ((*regs.SCMD & 0xff) << 8); | |
82 | value |= ((*regs.SCMD & 0xff) << 0); | |
83 | mb(); | |
84 | return value; | |
85 | } | |
86 | ||
87 | static irqreturn_t sgiwd93_intr(int irq, void *dev_id, struct pt_regs *regs) | |
88 | { | |
89 | struct Scsi_Host * host = (struct Scsi_Host *) dev_id; | |
90 | unsigned long flags; | |
91 | ||
92 | spin_lock_irqsave(host->host_lock, flags); | |
93 | wd33c93_intr(host); | |
94 | spin_unlock_irqrestore(host->host_lock, flags); | |
95 | ||
96 | return IRQ_HANDLED; | |
97 | } | |
98 | ||
99 | static inline | |
65396410 | 100 | void fill_hpc_entries(struct hpc_chunk *hcp, struct scsi_cmnd *cmd, int datainp) |
1da177e4 LT |
101 | { |
102 | unsigned long len = cmd->SCp.this_residual; | |
103 | void *addr = cmd->SCp.ptr; | |
104 | dma_addr_t physaddr; | |
105 | unsigned long count; | |
106 | ||
107 | physaddr = dma_map_single(NULL, addr, len, cmd->sc_data_direction); | |
108 | cmd->SCp.dma_handle = physaddr; | |
109 | ||
110 | while (len) { | |
111 | /* | |
112 | * even cntinfo could be up to 16383, without | |
113 | * magic only 8192 works correctly | |
114 | */ | |
115 | count = len > 8192 ? 8192 : len; | |
116 | hcp->desc.pbuf = physaddr; | |
117 | hcp->desc.cntinfo = count; | |
118 | hcp++; | |
119 | len -= count; | |
120 | physaddr += count; | |
121 | } | |
122 | ||
123 | /* | |
124 | * To make sure, if we trip an HPC bug, that we transfer every single | |
125 | * byte, we tag on an extra zero length dma descriptor at the end of | |
126 | * the chain. | |
127 | */ | |
128 | hcp->desc.pbuf = 0; | |
129 | hcp->desc.cntinfo = HPCDMA_EOX; | |
130 | } | |
131 | ||
65396410 | 132 | static int dma_setup(struct scsi_cmnd *cmd, int datainp) |
1da177e4 LT |
133 | { |
134 | struct ip22_hostdata *hdata = HDATA(cmd->device->host); | |
135 | struct hpc3_scsiregs *hregs = | |
136 | (struct hpc3_scsiregs *) cmd->device->host->base; | |
137 | struct hpc_chunk *hcp = (struct hpc_chunk *) hdata->hd.cpu; | |
138 | ||
139 | DPRINTK("dma_setup: datainp<%d> hcp<%p> ", datainp, hcp); | |
140 | ||
141 | hdata->wh.dma_dir = datainp; | |
142 | ||
143 | /* | |
144 | * wd33c93 shouldn't pass us bogus dma_setups, but it does:-( The | |
145 | * other wd33c93 drivers deal with it the same way (which isn't that | |
146 | * obvious). IMHO a better fix would be, not to do these dma setups | |
147 | * in the first place. | |
148 | */ | |
149 | if (cmd->SCp.ptr == NULL || cmd->SCp.this_residual == 0) | |
150 | return 1; | |
151 | ||
152 | fill_hpc_entries(hcp, cmd, datainp); | |
153 | ||
154 | DPRINTK(" HPCGO\n"); | |
155 | ||
156 | /* Start up the HPC. */ | |
157 | hregs->ndptr = hdata->hd.dma; | |
158 | if (datainp) | |
159 | hregs->ctrl = HPC3_SCTRL_ACTIVE; | |
160 | else | |
161 | hregs->ctrl = HPC3_SCTRL_ACTIVE | HPC3_SCTRL_DIR; | |
162 | ||
163 | return 0; | |
164 | } | |
165 | ||
65396410 | 166 | static void dma_stop(struct Scsi_Host *instance, struct scsi_cmnd *SCpnt, |
1da177e4 LT |
167 | int status) |
168 | { | |
169 | struct ip22_hostdata *hdata = HDATA(instance); | |
170 | struct hpc3_scsiregs *hregs; | |
171 | ||
172 | if (!SCpnt) | |
173 | return; | |
174 | ||
175 | hregs = (struct hpc3_scsiregs *) SCpnt->device->host->base; | |
176 | ||
177 | DPRINTK("dma_stop: status<%d> ", status); | |
178 | ||
179 | /* First stop the HPC and flush it's FIFO. */ | |
180 | if (hdata->wh.dma_dir) { | |
181 | hregs->ctrl |= HPC3_SCTRL_FLUSH; | |
182 | while (hregs->ctrl & HPC3_SCTRL_ACTIVE) | |
183 | barrier(); | |
184 | } | |
185 | hregs->ctrl = 0; | |
186 | dma_unmap_single(NULL, SCpnt->SCp.dma_handle, SCpnt->SCp.this_residual, | |
187 | SCpnt->sc_data_direction); | |
188 | ||
189 | DPRINTK("\n"); | |
190 | } | |
191 | ||
192 | void sgiwd93_reset(unsigned long base) | |
193 | { | |
194 | struct hpc3_scsiregs *hregs = (struct hpc3_scsiregs *) base; | |
195 | ||
196 | hregs->ctrl = HPC3_SCTRL_CRESET; | |
197 | udelay(50); | |
198 | hregs->ctrl = 0; | |
199 | } | |
200 | ||
201 | static inline void init_hpc_chain(struct hpc_data *hd) | |
202 | { | |
203 | struct hpc_chunk *hcp = (struct hpc_chunk *) hd->cpu; | |
204 | struct hpc_chunk *dma = (struct hpc_chunk *) hd->dma; | |
205 | unsigned long start, end; | |
206 | ||
207 | start = (unsigned long) hcp; | |
208 | end = start + PAGE_SIZE; | |
209 | while (start < end) { | |
210 | hcp->desc.pnext = (u32) (dma + 1); | |
211 | hcp->desc.cntinfo = HPCDMA_EOX; | |
212 | hcp++; dma++; | |
213 | start += sizeof(struct hpc_chunk); | |
214 | }; | |
215 | hcp--; | |
216 | hcp->desc.pnext = hd->dma; | |
217 | } | |
218 | ||
219 | static struct Scsi_Host * __init sgiwd93_setup_scsi( | |
d0be4a7d | 220 | struct scsi_host_template *SGIblows, int unit, int irq, |
1da177e4 LT |
221 | struct hpc3_scsiregs *hregs, unsigned char *wdregs) |
222 | { | |
223 | struct ip22_hostdata *hdata; | |
224 | struct Scsi_Host *host; | |
225 | wd33c93_regs regs; | |
226 | ||
227 | host = scsi_register(SGIblows, sizeof(struct ip22_hostdata)); | |
228 | if (!host) | |
229 | return NULL; | |
230 | ||
231 | host->base = (unsigned long) hregs; | |
232 | host->irq = irq; | |
233 | ||
234 | hdata = HDATA(host); | |
235 | hdata->hd.cpu = dma_alloc_coherent(NULL, PAGE_SIZE, &hdata->hd.dma, | |
236 | GFP_KERNEL); | |
237 | if (!hdata->hd.cpu) { | |
238 | printk(KERN_WARNING "sgiwd93: Could not allocate memory for " | |
239 | "host %d buffer.\n", unit); | |
240 | goto out_unregister; | |
241 | } | |
242 | init_hpc_chain(&hdata->hd); | |
243 | ||
244 | regs.SASR = wdregs + 3; | |
245 | regs.SCMD = wdregs + 7; | |
246 | ||
247 | wd33c93_init(host, regs, dma_setup, dma_stop, WD33C93_FS_16_20); | |
248 | ||
249 | hdata->wh.no_sync = 0; | |
250 | ||
251 | if (request_irq(irq, sgiwd93_intr, 0, "SGI WD93", (void *) host)) { | |
252 | printk(KERN_WARNING "sgiwd93: Could not register irq %d " | |
253 | "for host %d.\n", irq, unit); | |
254 | goto out_free; | |
255 | } | |
256 | return host; | |
257 | ||
258 | out_free: | |
259 | dma_free_coherent(NULL, PAGE_SIZE, hdata->hd.cpu, hdata->hd.dma); | |
260 | wd33c93_release(); | |
261 | ||
262 | out_unregister: | |
263 | scsi_unregister(host); | |
264 | ||
265 | return NULL; | |
266 | } | |
267 | ||
a0b6b6e5 | 268 | static int __init sgiwd93_detect(struct scsi_host_template *SGIblows) |
1da177e4 LT |
269 | { |
270 | int found = 0; | |
271 | ||
272 | SGIblows->proc_name = "SGIWD93"; | |
273 | sgiwd93_host = sgiwd93_setup_scsi(SGIblows, 0, SGI_WD93_0_IRQ, | |
274 | &hpc3c0->scsi_chan0, | |
275 | (unsigned char *)hpc3c0->scsi0_ext); | |
276 | if (sgiwd93_host) | |
277 | found++; | |
278 | ||
279 | /* Set up second controller on the Indigo2 */ | |
280 | if (ip22_is_fullhouse()) { | |
281 | sgiwd93_host1 = sgiwd93_setup_scsi(SGIblows, 1, SGI_WD93_1_IRQ, | |
282 | &hpc3c0->scsi_chan1, | |
283 | (unsigned char *)hpc3c0->scsi1_ext); | |
284 | if (sgiwd93_host1) | |
285 | found++; | |
286 | } | |
287 | ||
288 | return found; | |
289 | } | |
290 | ||
a0b6b6e5 | 291 | static int sgiwd93_release(struct Scsi_Host *instance) |
1da177e4 LT |
292 | { |
293 | struct ip22_hostdata *hdata = HDATA(instance); | |
294 | int irq = 0; | |
295 | ||
296 | if (sgiwd93_host && sgiwd93_host == instance) | |
297 | irq = SGI_WD93_0_IRQ; | |
298 | else if (sgiwd93_host1 && sgiwd93_host1 == instance) | |
299 | irq = SGI_WD93_1_IRQ; | |
300 | ||
301 | free_irq(irq, sgiwd93_intr); | |
302 | dma_free_coherent(NULL, PAGE_SIZE, hdata->hd.cpu, hdata->hd.dma); | |
303 | wd33c93_release(); | |
304 | ||
305 | return 1; | |
306 | } | |
307 | ||
65396410 | 308 | static int sgiwd93_bus_reset(struct scsi_cmnd *cmd) |
1da177e4 LT |
309 | { |
310 | /* FIXME perform bus-specific reset */ | |
68b3aa7c | 311 | |
df0ae249 JG |
312 | /* FIXME 2: kill this function, and let midlayer fallback |
313 | to the same result, calling wd33c93_host_reset() */ | |
314 | ||
68b3aa7c | 315 | spin_lock_irq(cmd->device->host->host_lock); |
1da177e4 | 316 | wd33c93_host_reset(cmd); |
68b3aa7c JG |
317 | spin_unlock_irq(cmd->device->host->host_lock); |
318 | ||
1da177e4 LT |
319 | return SUCCESS; |
320 | } | |
321 | ||
322 | /* | |
323 | * Kludge alert - the SCSI code calls the abort and reset method with int | |
324 | * arguments not with pointers. So this is going to blow up beautyfully | |
325 | * on 64-bit systems with memory outside the compat address spaces. | |
326 | */ | |
d0be4a7d | 327 | static struct scsi_host_template driver_template = { |
1da177e4 LT |
328 | .proc_name = "SGIWD93", |
329 | .name = "SGI WD93", | |
330 | .detect = sgiwd93_detect, | |
331 | .release = sgiwd93_release, | |
332 | .queuecommand = wd33c93_queuecommand, | |
333 | .eh_abort_handler = wd33c93_abort, | |
334 | .eh_bus_reset_handler = sgiwd93_bus_reset, | |
335 | .eh_host_reset_handler = wd33c93_host_reset, | |
d25cf1ce | 336 | .can_queue = 16, |
1da177e4 LT |
337 | .this_id = 7, |
338 | .sg_tablesize = SG_ALL, | |
d25cf1ce | 339 | .cmd_per_lun = 8, |
1da177e4 LT |
340 | .use_clustering = DISABLE_CLUSTERING, |
341 | }; | |
342 | #include "scsi_module.c" |