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afaf5a2d DS |
1 | /* |
2 | * QLogic iSCSI HBA Driver | |
3 | * Copyright (c) 2003-2006 QLogic Corporation | |
4 | * | |
5 | * See LICENSE.qla4xxx for copyright and licensing details. | |
6 | */ | |
7 | ||
8 | #include "ql4_def.h" | |
e08c182c DS |
9 | #include "ql4_glbl.h" |
10 | #include "ql4_dbg.h" | |
11 | #include "ql4_inline.h" | |
afaf5a2d | 12 | |
7feb6b3f DS |
13 | static inline void eeprom_cmd(uint32_t cmd, struct scsi_qla_host *ha) |
14 | { | |
15 | writel(cmd, isp_nvram(ha)); | |
16 | readl(isp_nvram(ha)); | |
17 | udelay(1); | |
18 | } | |
19 | ||
afaf5a2d DS |
20 | static inline int eeprom_size(struct scsi_qla_host *ha) |
21 | { | |
d915058f | 22 | return is_qla4010(ha) ? FM93C66A_SIZE_16 : FM93C86A_SIZE_16; |
afaf5a2d DS |
23 | } |
24 | ||
25 | static inline int eeprom_no_addr_bits(struct scsi_qla_host *ha) | |
26 | { | |
d915058f DS |
27 | return is_qla4010(ha) ? FM93C56A_NO_ADDR_BITS_16 : |
28 | FM93C86A_NO_ADDR_BITS_16 ; | |
afaf5a2d DS |
29 | } |
30 | ||
31 | static inline int eeprom_no_data_bits(struct scsi_qla_host *ha) | |
32 | { | |
33 | return FM93C56A_DATA_BITS_16; | |
34 | } | |
35 | ||
36 | static int fm93c56a_select(struct scsi_qla_host * ha) | |
37 | { | |
38 | DEBUG5(printk(KERN_ERR "fm93c56a_select:\n")); | |
39 | ||
40 | ha->eeprom_cmd_data = AUBURN_EEPROM_CS_1 | 0x000f0000; | |
7feb6b3f | 41 | eeprom_cmd(ha->eeprom_cmd_data, ha); |
afaf5a2d DS |
42 | return 1; |
43 | } | |
44 | ||
45 | static int fm93c56a_cmd(struct scsi_qla_host * ha, int cmd, int addr) | |
46 | { | |
47 | int i; | |
48 | int mask; | |
49 | int dataBit; | |
50 | int previousBit; | |
51 | ||
52 | /* Clock in a zero, then do the start bit. */ | |
7feb6b3f DS |
53 | eeprom_cmd(ha->eeprom_cmd_data | AUBURN_EEPROM_DO_1, ha); |
54 | ||
55 | eeprom_cmd(ha->eeprom_cmd_data | AUBURN_EEPROM_DO_1 | | |
56 | AUBURN_EEPROM_CLK_RISE, ha); | |
57 | eeprom_cmd(ha->eeprom_cmd_data | AUBURN_EEPROM_DO_1 | | |
58 | AUBURN_EEPROM_CLK_FALL, ha); | |
59 | ||
afaf5a2d DS |
60 | mask = 1 << (FM93C56A_CMD_BITS - 1); |
61 | ||
62 | /* Force the previous data bit to be different. */ | |
63 | previousBit = 0xffff; | |
64 | for (i = 0; i < FM93C56A_CMD_BITS; i++) { | |
65 | dataBit = | |
66 | (cmd & mask) ? AUBURN_EEPROM_DO_1 : AUBURN_EEPROM_DO_0; | |
67 | if (previousBit != dataBit) { | |
68 | ||
69 | /* | |
70 | * If the bit changed, then change the DO state to | |
71 | * match. | |
72 | */ | |
7feb6b3f | 73 | eeprom_cmd(ha->eeprom_cmd_data | dataBit, ha); |
afaf5a2d DS |
74 | previousBit = dataBit; |
75 | } | |
7feb6b3f DS |
76 | eeprom_cmd(ha->eeprom_cmd_data | dataBit | |
77 | AUBURN_EEPROM_CLK_RISE, ha); | |
78 | eeprom_cmd(ha->eeprom_cmd_data | dataBit | | |
79 | AUBURN_EEPROM_CLK_FALL, ha); | |
80 | ||
afaf5a2d DS |
81 | cmd = cmd << 1; |
82 | } | |
83 | mask = 1 << (eeprom_no_addr_bits(ha) - 1); | |
84 | ||
85 | /* Force the previous data bit to be different. */ | |
86 | previousBit = 0xffff; | |
87 | for (i = 0; i < eeprom_no_addr_bits(ha); i++) { | |
88 | dataBit = addr & mask ? AUBURN_EEPROM_DO_1 : | |
89 | AUBURN_EEPROM_DO_0; | |
90 | if (previousBit != dataBit) { | |
91 | /* | |
92 | * If the bit changed, then change the DO state to | |
93 | * match. | |
94 | */ | |
7feb6b3f DS |
95 | eeprom_cmd(ha->eeprom_cmd_data | dataBit, ha); |
96 | ||
afaf5a2d DS |
97 | previousBit = dataBit; |
98 | } | |
7feb6b3f DS |
99 | eeprom_cmd(ha->eeprom_cmd_data | dataBit | |
100 | AUBURN_EEPROM_CLK_RISE, ha); | |
101 | eeprom_cmd(ha->eeprom_cmd_data | dataBit | | |
102 | AUBURN_EEPROM_CLK_FALL, ha); | |
103 | ||
afaf5a2d DS |
104 | addr = addr << 1; |
105 | } | |
106 | return 1; | |
107 | } | |
108 | ||
109 | static int fm93c56a_deselect(struct scsi_qla_host * ha) | |
110 | { | |
111 | ha->eeprom_cmd_data = AUBURN_EEPROM_CS_0 | 0x000f0000; | |
7feb6b3f | 112 | eeprom_cmd(ha->eeprom_cmd_data, ha); |
afaf5a2d DS |
113 | return 1; |
114 | } | |
115 | ||
116 | static int fm93c56a_datain(struct scsi_qla_host * ha, unsigned short *value) | |
117 | { | |
118 | int i; | |
119 | int data = 0; | |
120 | int dataBit; | |
121 | ||
122 | /* Read the data bits | |
123 | * The first bit is a dummy. Clock right over it. */ | |
124 | for (i = 0; i < eeprom_no_data_bits(ha); i++) { | |
7feb6b3f DS |
125 | eeprom_cmd(ha->eeprom_cmd_data | |
126 | AUBURN_EEPROM_CLK_RISE, ha); | |
127 | eeprom_cmd(ha->eeprom_cmd_data | | |
128 | AUBURN_EEPROM_CLK_FALL, ha); | |
129 | ||
130 | dataBit = (readw(isp_nvram(ha)) & AUBURN_EEPROM_DI_1) ? 1 : 0; | |
131 | ||
afaf5a2d DS |
132 | data = (data << 1) | dataBit; |
133 | } | |
134 | ||
135 | *value = data; | |
136 | return 1; | |
137 | } | |
138 | ||
139 | static int eeprom_readword(int eepromAddr, u16 * value, | |
140 | struct scsi_qla_host * ha) | |
141 | { | |
142 | fm93c56a_select(ha); | |
143 | fm93c56a_cmd(ha, FM93C56A_READ, eepromAddr); | |
144 | fm93c56a_datain(ha, value); | |
145 | fm93c56a_deselect(ha); | |
146 | return 1; | |
147 | } | |
148 | ||
149 | /* Hardware_lock must be set before calling */ | |
150 | u16 rd_nvram_word(struct scsi_qla_host * ha, int offset) | |
151 | { | |
152 | u16 val; | |
153 | ||
154 | /* NOTE: NVRAM uses half-word addresses */ | |
155 | eeprom_readword(offset, &val, ha); | |
156 | return val; | |
157 | } | |
158 | ||
159 | int qla4xxx_is_nvram_configuration_valid(struct scsi_qla_host * ha) | |
160 | { | |
161 | int status = QLA_ERROR; | |
162 | uint16_t checksum = 0; | |
163 | uint32_t index; | |
164 | unsigned long flags; | |
165 | ||
166 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
167 | for (index = 0; index < eeprom_size(ha); index++) | |
168 | checksum += rd_nvram_word(ha, index); | |
169 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
170 | ||
171 | if (checksum == 0) | |
172 | status = QLA_SUCCESS; | |
173 | ||
174 | return status; | |
175 | } | |
176 | ||
177 | /************************************************************************* | |
178 | * | |
179 | * Hardware Semaphore routines | |
180 | * | |
181 | *************************************************************************/ | |
182 | int ql4xxx_sem_spinlock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits) | |
183 | { | |
184 | uint32_t value; | |
185 | unsigned long flags; | |
186 | unsigned int seconds = 30; | |
187 | ||
188 | DEBUG2(printk("scsi%ld : Trying to get SEM lock - mask= 0x%x, code = " | |
189 | "0x%x\n", ha->host_no, sem_mask, sem_bits)); | |
190 | do { | |
191 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
192 | writel((sem_mask | sem_bits), isp_semaphore(ha)); | |
193 | value = readw(isp_semaphore(ha)); | |
194 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
195 | if ((value & (sem_mask >> 16)) == sem_bits) { | |
196 | DEBUG2(printk("scsi%ld : Got SEM LOCK - mask= 0x%x, " | |
197 | "code = 0x%x\n", ha->host_no, | |
198 | sem_mask, sem_bits)); | |
199 | return QLA_SUCCESS; | |
200 | } | |
201 | ssleep(1); | |
202 | } while (--seconds); | |
203 | return QLA_ERROR; | |
204 | } | |
205 | ||
206 | void ql4xxx_sem_unlock(struct scsi_qla_host * ha, u32 sem_mask) | |
207 | { | |
208 | unsigned long flags; | |
209 | ||
210 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
211 | writel(sem_mask, isp_semaphore(ha)); | |
212 | readl(isp_semaphore(ha)); | |
213 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
214 | ||
215 | DEBUG2(printk("scsi%ld : UNLOCK SEM - mask= 0x%x\n", ha->host_no, | |
216 | sem_mask)); | |
217 | } | |
218 | ||
219 | int ql4xxx_sem_lock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits) | |
220 | { | |
221 | uint32_t value; | |
222 | unsigned long flags; | |
223 | ||
224 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
225 | writel((sem_mask | sem_bits), isp_semaphore(ha)); | |
226 | value = readw(isp_semaphore(ha)); | |
227 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
228 | if ((value & (sem_mask >> 16)) == sem_bits) { | |
229 | DEBUG2(printk("scsi%ld : Got SEM LOCK - mask= 0x%x, code = " | |
230 | "0x%x, sema code=0x%x\n", ha->host_no, | |
231 | sem_mask, sem_bits, value)); | |
232 | return 1; | |
233 | } | |
234 | return 0; | |
235 | } |