qla2xxx: Fix crash due to null pointer access
[linux-2.6-block.git] / drivers / scsi / qla2xxx / qla_target.h
CommitLineData
2d70c103
NB
1/*
2 * Copyright (C) 2004 - 2010 Vladislav Bolkhovitin <vst@vlnb.net>
3 * Copyright (C) 2004 - 2005 Leonid Stoljar
4 * Copyright (C) 2006 Nathaniel Clark <nate@misrule.us>
5 * Copyright (C) 2007 - 2010 ID7 Ltd.
6 *
7 * Forward port and refactoring to modern qla2xxx and target/configfs
8 *
9 * Copyright (C) 2010-2011 Nicholas A. Bellinger <nab@kernel.org>
10 *
11 * Additional file for the target driver support.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version 2
16 * of the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 */
23/*
24 * This is the global def file that is useful for including from the
25 * target portion.
26 */
27
28#ifndef __QLA_TARGET_H
29#define __QLA_TARGET_H
30
31#include "qla_def.h"
32
33/*
34 * Must be changed on any change in any initiator visible interfaces or
35 * data in the target add-on
36 */
37#define QLA2XXX_TARGET_MAGIC 269
38
39/*
40 * Must be changed on any change in any target visible interfaces or
41 * data in the initiator
42 */
43#define QLA2XXX_INITIATOR_MAGIC 57222
44
45#define QLA2XXX_INI_MODE_STR_EXCLUSIVE "exclusive"
46#define QLA2XXX_INI_MODE_STR_DISABLED "disabled"
47#define QLA2XXX_INI_MODE_STR_ENABLED "enabled"
48
49#define QLA2XXX_INI_MODE_EXCLUSIVE 0
50#define QLA2XXX_INI_MODE_DISABLED 1
51#define QLA2XXX_INI_MODE_ENABLED 2
52
53#define QLA2XXX_COMMAND_COUNT_INIT 250
54#define QLA2XXX_IMMED_NOTIFY_COUNT_INIT 250
55
56/*
57 * Used to mark which completion handles (for RIO Status's) are for CTIO's
58 * vs. regular (non-target) info. This is checked for in
59 * qla2x00_process_response_queue() to see if a handle coming back in a
60 * multi-complete should come to the tgt driver or be handled there by qla2xxx
61 */
62#define CTIO_COMPLETION_HANDLE_MARK BIT_29
8d93f550
CD
63#if (CTIO_COMPLETION_HANDLE_MARK <= DEFAULT_OUTSTANDING_COMMANDS)
64#error "CTIO_COMPLETION_HANDLE_MARK not larger than "
65 "DEFAULT_OUTSTANDING_COMMANDS"
2d70c103
NB
66#endif
67#define HANDLE_IS_CTIO_COMP(h) (h & CTIO_COMPLETION_HANDLE_MARK)
68
69/* Used to mark CTIO as intermediate */
70#define CTIO_INTERMEDIATE_HANDLE_MARK BIT_30
71
72#ifndef OF_SS_MODE_0
73/*
74 * ISP target entries - Flags bit definitions.
75 */
76#define OF_SS_MODE_0 0
77#define OF_SS_MODE_1 1
78#define OF_SS_MODE_2 2
79#define OF_SS_MODE_3 3
80
81#define OF_EXPL_CONF BIT_5 /* Explicit Confirmation Requested */
82#define OF_DATA_IN BIT_6 /* Data in to initiator */
83 /* (data from target to initiator) */
84#define OF_DATA_OUT BIT_7 /* Data out from initiator */
85 /* (data from initiator to target) */
86#define OF_NO_DATA (BIT_7 | BIT_6)
87#define OF_INC_RC BIT_8 /* Increment command resource count */
88#define OF_FAST_POST BIT_9 /* Enable mailbox fast posting. */
89#define OF_CONF_REQ BIT_13 /* Confirmation Requested */
90#define OF_TERM_EXCH BIT_14 /* Terminate exchange */
91#define OF_SSTS BIT_15 /* Send SCSI status */
92#endif
93
94#ifndef QLA_TGT_DATASEGS_PER_CMD32
95#define QLA_TGT_DATASEGS_PER_CMD32 3
96#define QLA_TGT_DATASEGS_PER_CONT32 7
97#define QLA_TGT_MAX_SG32(ql) \
98 (((ql) > 0) ? (QLA_TGT_DATASEGS_PER_CMD32 + \
99 QLA_TGT_DATASEGS_PER_CONT32*((ql) - 1)) : 0)
100
101#define QLA_TGT_DATASEGS_PER_CMD64 2
102#define QLA_TGT_DATASEGS_PER_CONT64 5
103#define QLA_TGT_MAX_SG64(ql) \
104 (((ql) > 0) ? (QLA_TGT_DATASEGS_PER_CMD64 + \
105 QLA_TGT_DATASEGS_PER_CONT64*((ql) - 1)) : 0)
106#endif
107
108#ifndef QLA_TGT_DATASEGS_PER_CMD_24XX
109#define QLA_TGT_DATASEGS_PER_CMD_24XX 1
110#define QLA_TGT_DATASEGS_PER_CONT_24XX 5
111#define QLA_TGT_MAX_SG_24XX(ql) \
112 (min(1270, ((ql) > 0) ? (QLA_TGT_DATASEGS_PER_CMD_24XX + \
113 QLA_TGT_DATASEGS_PER_CONT_24XX*((ql) - 1)) : 0))
114#endif
115#endif
116
117#define GET_TARGET_ID(ha, iocb) ((HAS_EXTENDED_IDS(ha)) \
118 ? le16_to_cpu((iocb)->u.isp2x.target.extended) \
119 : (uint16_t)(iocb)->u.isp2x.target.id.standard)
120
121#ifndef IMMED_NOTIFY_TYPE
122#define IMMED_NOTIFY_TYPE 0x0D /* Immediate notify entry. */
123/*
124 * ISP queue - immediate notify entry structure definition.
125 * This is sent by the ISP to the Target driver.
126 * This IOCB would have report of events sent by the
127 * initiator, that needs to be handled by the target
128 * driver immediately.
129 */
130struct imm_ntfy_from_isp {
131 uint8_t entry_type; /* Entry type. */
132 uint8_t entry_count; /* Entry count. */
133 uint8_t sys_define; /* System defined. */
134 uint8_t entry_status; /* Entry Status. */
135 union {
136 struct {
137 uint32_t sys_define_2; /* System defined. */
138 target_id_t target;
139 uint16_t lun;
140 uint8_t target_id;
141 uint8_t reserved_1;
142 uint16_t status_modifier;
143 uint16_t status;
144 uint16_t task_flags;
145 uint16_t seq_id;
146 uint16_t srr_rx_id;
147 uint32_t srr_rel_offs;
148 uint16_t srr_ui;
149#define SRR_IU_DATA_IN 0x1
150#define SRR_IU_DATA_OUT 0x5
151#define SRR_IU_STATUS 0x7
152 uint16_t srr_ox_id;
153 uint8_t reserved_2[28];
154 } isp2x;
155 struct {
156 uint32_t reserved;
157 uint16_t nport_handle;
158 uint16_t reserved_2;
159 uint16_t flags;
160#define NOTIFY24XX_FLAGS_GLOBAL_TPRLO BIT_1
161#define NOTIFY24XX_FLAGS_PUREX_IOCB BIT_0
162 uint16_t srr_rx_id;
163 uint16_t status;
164 uint8_t status_subcode;
aa230bc5 165 uint8_t fw_handle;
2d70c103
NB
166 uint32_t exchange_address;
167 uint32_t srr_rel_offs;
168 uint16_t srr_ui;
169 uint16_t srr_ox_id;
a6ca8878
AP
170 union {
171 struct {
172 uint8_t node_name[8];
173 } plogi; /* PLOGI/ADISC/PDISC */
174 struct {
175 /* PRLI word 3 bit 0-15 */
176 uint16_t wd3_lo;
177 uint8_t resv0[6];
178 } prli;
179 struct {
180 uint8_t port_id[3];
181 uint8_t resv1;
182 uint16_t nport_handle;
183 uint16_t resv2;
184 } req_els;
185 } u;
186 uint8_t port_name[8];
187 uint8_t resv3[3];
2d70c103
NB
188 uint8_t vp_index;
189 uint32_t reserved_5;
190 uint8_t port_id[3];
191 uint8_t reserved_6;
192 } isp24;
193 } u;
194 uint16_t reserved_7;
195 uint16_t ox_id;
196} __packed;
197#endif
198
199#ifndef NOTIFY_ACK_TYPE
200#define NOTIFY_ACK_TYPE 0x0E /* Notify acknowledge entry. */
201/*
202 * ISP queue - notify acknowledge entry structure definition.
203 * This is sent to the ISP from the target driver.
204 */
205struct nack_to_isp {
206 uint8_t entry_type; /* Entry type. */
207 uint8_t entry_count; /* Entry count. */
208 uint8_t sys_define; /* System defined. */
209 uint8_t entry_status; /* Entry Status. */
210 union {
211 struct {
212 uint32_t sys_define_2; /* System defined. */
213 target_id_t target;
214 uint8_t target_id;
215 uint8_t reserved_1;
216 uint16_t flags;
217 uint16_t resp_code;
218 uint16_t status;
219 uint16_t task_flags;
220 uint16_t seq_id;
221 uint16_t srr_rx_id;
222 uint32_t srr_rel_offs;
223 uint16_t srr_ui;
224 uint16_t srr_flags;
225 uint16_t srr_reject_code;
226 uint8_t srr_reject_vendor_uniq;
227 uint8_t srr_reject_code_expl;
228 uint8_t reserved_2[24];
229 } isp2x;
230 struct {
231 uint32_t handle;
232 uint16_t nport_handle;
233 uint16_t reserved_1;
234 uint16_t flags;
235 uint16_t srr_rx_id;
236 uint16_t status;
237 uint8_t status_subcode;
aa230bc5 238 uint8_t fw_handle;
2d70c103
NB
239 uint32_t exchange_address;
240 uint32_t srr_rel_offs;
241 uint16_t srr_ui;
242 uint16_t srr_flags;
243 uint8_t reserved_4[19];
244 uint8_t vp_index;
245 uint8_t srr_reject_vendor_uniq;
246 uint8_t srr_reject_code_expl;
247 uint8_t srr_reject_code;
248 uint8_t reserved_5[5];
249 } isp24;
250 } u;
251 uint8_t reserved[2];
252 uint16_t ox_id;
253} __packed;
a6ca8878 254#define NOTIFY_ACK_FLAGS_TERMINATE BIT_3
2d70c103
NB
255#define NOTIFY_ACK_SRR_FLAGS_ACCEPT 0
256#define NOTIFY_ACK_SRR_FLAGS_REJECT 1
257
258#define NOTIFY_ACK_SRR_REJECT_REASON_UNABLE_TO_PERFORM 0x9
259
260#define NOTIFY_ACK_SRR_FLAGS_REJECT_EXPL_NO_EXPL 0
261#define NOTIFY_ACK_SRR_FLAGS_REJECT_EXPL_UNABLE_TO_SUPPLY_DATA 0x2a
262
263#define NOTIFY_ACK_SUCCESS 0x01
264#endif
265
266#ifndef ACCEPT_TGT_IO_TYPE
267#define ACCEPT_TGT_IO_TYPE 0x16 /* Accept target I/O entry. */
268#endif
269
270#ifndef CONTINUE_TGT_IO_TYPE
271#define CONTINUE_TGT_IO_TYPE 0x17
272/*
273 * ISP queue - Continue Target I/O (CTIO) entry for status mode 0 structure.
274 * This structure is sent to the ISP 2xxx from target driver.
275 */
276struct ctio_to_2xxx {
277 uint8_t entry_type; /* Entry type. */
278 uint8_t entry_count; /* Entry count. */
279 uint8_t sys_define; /* System defined. */
280 uint8_t entry_status; /* Entry Status. */
281 uint32_t handle; /* System defined handle */
282 target_id_t target;
283 uint16_t rx_id;
284 uint16_t flags;
285 uint16_t status;
286 uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */
287 uint16_t dseg_count; /* Data segment count. */
288 uint32_t relative_offset;
289 uint32_t residual;
290 uint16_t reserved_1[3];
291 uint16_t scsi_status;
292 uint32_t transfer_length;
293 uint32_t dseg_0_address; /* Data segment 0 address. */
294 uint32_t dseg_0_length; /* Data segment 0 length. */
295 uint32_t dseg_1_address; /* Data segment 1 address. */
296 uint32_t dseg_1_length; /* Data segment 1 length. */
297 uint32_t dseg_2_address; /* Data segment 2 address. */
298 uint32_t dseg_2_length; /* Data segment 2 length. */
299} __packed;
300#define ATIO_PATH_INVALID 0x07
301#define ATIO_CANT_PROV_CAP 0x16
302#define ATIO_CDB_VALID 0x3D
303
304#define ATIO_EXEC_READ BIT_1
305#define ATIO_EXEC_WRITE BIT_0
306#endif
307
308#ifndef CTIO_A64_TYPE
309#define CTIO_A64_TYPE 0x1F
310#define CTIO_SUCCESS 0x01
311#define CTIO_ABORTED 0x02
312#define CTIO_INVALID_RX_ID 0x08
313#define CTIO_TIMEOUT 0x0B
f83adb61 314#define CTIO_DIF_ERROR 0x0C /* DIF error detected */
2d70c103
NB
315#define CTIO_LIP_RESET 0x0E
316#define CTIO_TARGET_RESET 0x17
317#define CTIO_PORT_UNAVAILABLE 0x28
318#define CTIO_PORT_LOGGED_OUT 0x29
319#define CTIO_PORT_CONF_CHANGED 0x2A
320#define CTIO_SRR_RECEIVED 0x45
321#endif
322
323#ifndef CTIO_RET_TYPE
324#define CTIO_RET_TYPE 0x17 /* CTIO return entry */
325#define ATIO_TYPE7 0x06 /* Accept target I/O entry for 24xx */
326
327struct fcp_hdr {
328 uint8_t r_ctl;
329 uint8_t d_id[3];
330 uint8_t cs_ctl;
331 uint8_t s_id[3];
332 uint8_t type;
333 uint8_t f_ctl[3];
334 uint8_t seq_id;
335 uint8_t df_ctl;
336 uint16_t seq_cnt;
c7ee3bd4 337 __be16 ox_id;
2d70c103
NB
338 uint16_t rx_id;
339 uint32_t parameter;
340} __packed;
341
342struct fcp_hdr_le {
343 uint8_t d_id[3];
344 uint8_t r_ctl;
345 uint8_t s_id[3];
346 uint8_t cs_ctl;
347 uint8_t f_ctl[3];
348 uint8_t type;
349 uint16_t seq_cnt;
350 uint8_t df_ctl;
351 uint8_t seq_id;
352 uint16_t rx_id;
353 uint16_t ox_id;
354 uint32_t parameter;
355} __packed;
356
357#define F_CTL_EXCH_CONTEXT_RESP BIT_23
358#define F_CTL_SEQ_CONTEXT_RESIP BIT_22
359#define F_CTL_LAST_SEQ BIT_20
360#define F_CTL_END_SEQ BIT_19
361#define F_CTL_SEQ_INITIATIVE BIT_16
362
363#define R_CTL_BASIC_LINK_SERV 0x80
364#define R_CTL_B_ACC 0x4
365#define R_CTL_B_RJT 0x5
366
367struct atio7_fcp_cmnd {
368 uint64_t lun;
369 uint8_t cmnd_ref;
370 uint8_t task_attr:3;
371 uint8_t reserved:5;
372 uint8_t task_mgmt_flags;
373#define FCP_CMND_TASK_MGMT_CLEAR_ACA 6
374#define FCP_CMND_TASK_MGMT_TARGET_RESET 5
375#define FCP_CMND_TASK_MGMT_LU_RESET 4
376#define FCP_CMND_TASK_MGMT_CLEAR_TASK_SET 2
377#define FCP_CMND_TASK_MGMT_ABORT_TASK_SET 1
378 uint8_t wrdata:1;
379 uint8_t rddata:1;
380 uint8_t add_cdb_len:6;
381 uint8_t cdb[16];
382 /*
383 * add_cdb is optional and can absent from struct atio7_fcp_cmnd. Size 4
384 * only to make sizeof(struct atio7_fcp_cmnd) be as expected by
385 * BUILD_BUG_ON in qlt_init().
386 */
387 uint8_t add_cdb[4];
388 /* uint32_t data_length; */
389} __packed;
390
391/*
392 * ISP queue - Accept Target I/O (ATIO) type entry IOCB structure.
393 * This is sent from the ISP to the target driver.
394 */
395struct atio_from_isp {
396 union {
397 struct {
398 uint16_t entry_hdr;
399 uint8_t sys_define; /* System defined. */
400 uint8_t entry_status; /* Entry Status. */
401 uint32_t sys_define_2; /* System defined. */
402 target_id_t target;
403 uint16_t rx_id;
404 uint16_t flags;
405 uint16_t status;
406 uint8_t command_ref;
407 uint8_t task_codes;
408 uint8_t task_flags;
409 uint8_t execution_codes;
410 uint8_t cdb[MAX_CMDSZ];
411 uint32_t data_length;
412 uint16_t lun;
413 uint8_t initiator_port_name[WWN_SIZE]; /* on qla23xx */
414 uint16_t reserved_32[6];
415 uint16_t ox_id;
416 } isp2x;
417 struct {
418 uint16_t entry_hdr;
419 uint8_t fcp_cmnd_len_low;
420 uint8_t fcp_cmnd_len_high:4;
421 uint8_t attr:4;
422 uint32_t exchange_addr;
423#define ATIO_EXCHANGE_ADDRESS_UNKNOWN 0xFFFFFFFF
424 struct fcp_hdr fcp_hdr;
425 struct atio7_fcp_cmnd fcp_cmnd;
426 } isp24;
427 struct {
428 uint8_t entry_type; /* Entry type. */
429 uint8_t entry_count; /* Entry count. */
430 uint8_t data[58];
431 uint32_t signature;
432#define ATIO_PROCESSED 0xDEADDEAD /* Signature */
433 } raw;
434 } u;
435} __packed;
436
437#define CTIO_TYPE7 0x12 /* Continue target I/O entry (for 24xx) */
438
439/*
440 * ISP queue - Continue Target I/O (ATIO) type 7 entry (for 24xx) structure.
441 * This structure is sent to the ISP 24xx from the target driver.
442 */
443
444struct ctio7_to_24xx {
445 uint8_t entry_type; /* Entry type. */
446 uint8_t entry_count; /* Entry count. */
447 uint8_t sys_define; /* System defined. */
448 uint8_t entry_status; /* Entry Status. */
449 uint32_t handle; /* System defined handle */
450 uint16_t nport_handle;
451#define CTIO7_NHANDLE_UNRECOGNIZED 0xFFFF
452 uint16_t timeout;
453 uint16_t dseg_count; /* Data segment count. */
454 uint8_t vp_index;
455 uint8_t add_flags;
456 uint8_t initiator_id[3];
457 uint8_t reserved;
458 uint32_t exchange_addr;
459 union {
460 struct {
461 uint16_t reserved1;
c7ee3bd4 462 __le16 flags;
2d70c103 463 uint32_t residual;
33a5fcee 464 __le16 ox_id;
2d70c103
NB
465 uint16_t scsi_status;
466 uint32_t relative_offset;
467 uint32_t reserved2;
468 uint32_t transfer_length;
469 uint32_t reserved3;
470 /* Data segment 0 address. */
471 uint32_t dseg_0_address[2];
472 /* Data segment 0 length. */
473 uint32_t dseg_0_length;
474 } status0;
475 struct {
476 uint16_t sense_length;
477 uint16_t flags;
478 uint32_t residual;
33a5fcee 479 __le16 ox_id;
2d70c103
NB
480 uint16_t scsi_status;
481 uint16_t response_len;
482 uint16_t reserved;
483 uint8_t sense_data[24];
484 } status1;
485 } u;
486} __packed;
487
488/*
489 * ISP queue - CTIO type 7 from ISP 24xx to target driver
490 * returned entry structure.
491 */
492struct ctio7_from_24xx {
493 uint8_t entry_type; /* Entry type. */
494 uint8_t entry_count; /* Entry count. */
495 uint8_t sys_define; /* System defined. */
496 uint8_t entry_status; /* Entry Status. */
497 uint32_t handle; /* System defined handle */
498 uint16_t status;
499 uint16_t timeout;
500 uint16_t dseg_count; /* Data segment count. */
501 uint8_t vp_index;
502 uint8_t reserved1[5];
503 uint32_t exchange_address;
504 uint16_t reserved2;
505 uint16_t flags;
506 uint32_t residual;
507 uint16_t ox_id;
508 uint16_t reserved3;
509 uint32_t relative_offset;
510 uint8_t reserved4[24];
511} __packed;
512
513/* CTIO7 flags values */
514#define CTIO7_FLAGS_SEND_STATUS BIT_15
515#define CTIO7_FLAGS_TERMINATE BIT_14
516#define CTIO7_FLAGS_CONFORM_REQ BIT_13
517#define CTIO7_FLAGS_DONT_RET_CTIO BIT_8
518#define CTIO7_FLAGS_STATUS_MODE_0 0
519#define CTIO7_FLAGS_STATUS_MODE_1 BIT_6
f83adb61 520#define CTIO7_FLAGS_STATUS_MODE_2 BIT_7
2d70c103
NB
521#define CTIO7_FLAGS_EXPLICIT_CONFORM BIT_5
522#define CTIO7_FLAGS_CONFIRM_SATISF BIT_4
523#define CTIO7_FLAGS_DSD_PTR BIT_2
f83adb61
QT
524#define CTIO7_FLAGS_DATA_IN BIT_1 /* data to initiator */
525#define CTIO7_FLAGS_DATA_OUT BIT_0 /* data from initiator */
2d70c103
NB
526
527#define ELS_PLOGI 0x3
528#define ELS_FLOGI 0x4
529#define ELS_LOGO 0x5
530#define ELS_PRLI 0x20
531#define ELS_PRLO 0x21
532#define ELS_TPRLO 0x24
533#define ELS_PDISC 0x50
534#define ELS_ADISC 0x52
535
f83adb61
QT
536/*
537 *CTIO Type CRC_2 IOCB
538 */
539struct ctio_crc2_to_fw {
540 uint8_t entry_type; /* Entry type. */
541#define CTIO_CRC2 0x7A
542 uint8_t entry_count; /* Entry count. */
543 uint8_t sys_define; /* System defined. */
544 uint8_t entry_status; /* Entry Status. */
545
546 uint32_t handle; /* System handle. */
547 uint16_t nport_handle; /* N_PORT handle. */
c7ee3bd4 548 __le16 timeout; /* Command timeout. */
f83adb61
QT
549
550 uint16_t dseg_count; /* Data segment count. */
551 uint8_t vp_index;
552 uint8_t add_flags; /* additional flags */
553#define CTIO_CRC2_AF_DIF_DSD_ENA BIT_3
554
555 uint8_t initiator_id[3]; /* initiator ID */
556 uint8_t reserved1;
557 uint32_t exchange_addr; /* rcv exchange address */
558 uint16_t reserved2;
c7ee3bd4 559 __le16 flags; /* refer to CTIO7 flags values */
f83adb61 560 uint32_t residual;
c7ee3bd4 561 __le16 ox_id;
f83adb61 562 uint16_t scsi_status;
c7ee3bd4 563 __le32 relative_offset;
f83adb61 564 uint32_t reserved5;
c7ee3bd4 565 __le32 transfer_length; /* total fc transfer length */
f83adb61 566 uint32_t reserved6;
c7ee3bd4 567 __le32 crc_context_address[2];/* Data segment address. */
f83adb61
QT
568 uint16_t crc_context_len; /* Data segment length. */
569 uint16_t reserved_1; /* MUST be set to 0. */
570} __packed;
571
572/* CTIO Type CRC_x Status IOCB */
573struct ctio_crc_from_fw {
574 uint8_t entry_type; /* Entry type. */
575 uint8_t entry_count; /* Entry count. */
576 uint8_t sys_define; /* System defined. */
577 uint8_t entry_status; /* Entry Status. */
578
579 uint32_t handle; /* System handle. */
580 uint16_t status;
581 uint16_t timeout; /* Command timeout. */
582 uint16_t dseg_count; /* Data segment count. */
583 uint32_t reserved1;
584 uint16_t state_flags;
585#define CTIO_CRC_SF_DIF_CHOPPED BIT_4
586
587 uint32_t exchange_address; /* rcv exchange address */
588 uint16_t reserved2;
589 uint16_t flags;
590 uint32_t resid_xfer_length;
591 uint16_t ox_id;
592 uint8_t reserved3[12];
593 uint16_t runt_guard; /* reported runt blk guard */
594 uint8_t actual_dif[8];
595 uint8_t expected_dif[8];
596} __packed;
597
2d70c103
NB
598/*
599 * ISP queue - ABTS received/response entries structure definition for 24xx.
600 */
601#define ABTS_RECV_24XX 0x54 /* ABTS received (for 24xx) */
602#define ABTS_RESP_24XX 0x55 /* ABTS responce (for 24xx) */
603
604/*
605 * ISP queue - ABTS received IOCB entry structure definition for 24xx.
606 * The ABTS BLS received from the wire is sent to the
607 * target driver by the ISP 24xx.
608 * The IOCB is placed on the response queue.
609 */
610struct abts_recv_from_24xx {
611 uint8_t entry_type; /* Entry type. */
612 uint8_t entry_count; /* Entry count. */
613 uint8_t sys_define; /* System defined. */
614 uint8_t entry_status; /* Entry Status. */
615 uint8_t reserved_1[6];
616 uint16_t nport_handle;
617 uint8_t reserved_2[2];
618 uint8_t vp_index;
619 uint8_t reserved_3:4;
620 uint8_t sof_type:4;
621 uint32_t exchange_address;
622 struct fcp_hdr_le fcp_hdr_le;
623 uint8_t reserved_4[16];
624 uint32_t exchange_addr_to_abort;
625} __packed;
626
627#define ABTS_PARAM_ABORT_SEQ BIT_0
628
629struct ba_acc_le {
630 uint16_t reserved;
631 uint8_t seq_id_last;
632 uint8_t seq_id_valid;
633#define SEQ_ID_VALID 0x80
634#define SEQ_ID_INVALID 0x00
635 uint16_t rx_id;
636 uint16_t ox_id;
637 uint16_t high_seq_cnt;
638 uint16_t low_seq_cnt;
639} __packed;
640
641struct ba_rjt_le {
642 uint8_t vendor_uniq;
643 uint8_t reason_expl;
644 uint8_t reason_code;
645#define BA_RJT_REASON_CODE_INVALID_COMMAND 0x1
646#define BA_RJT_REASON_CODE_UNABLE_TO_PERFORM 0x9
647 uint8_t reserved;
648} __packed;
649
650/*
651 * ISP queue - ABTS Response IOCB entry structure definition for 24xx.
652 * The ABTS response to the ABTS received is sent by the
653 * target driver to the ISP 24xx.
654 * The IOCB is placed on the request queue.
655 */
656struct abts_resp_to_24xx {
657 uint8_t entry_type; /* Entry type. */
658 uint8_t entry_count; /* Entry count. */
659 uint8_t sys_define; /* System defined. */
660 uint8_t entry_status; /* Entry Status. */
661 uint32_t handle;
662 uint16_t reserved_1;
663 uint16_t nport_handle;
664 uint16_t control_flags;
665#define ABTS_CONTR_FLG_TERM_EXCHG BIT_0
666 uint8_t vp_index;
667 uint8_t reserved_3:4;
668 uint8_t sof_type:4;
669 uint32_t exchange_address;
670 struct fcp_hdr_le fcp_hdr_le;
671 union {
672 struct ba_acc_le ba_acct;
673 struct ba_rjt_le ba_rjt;
674 } __packed payload;
675 uint32_t reserved_4;
676 uint32_t exchange_addr_to_abort;
677} __packed;
678
679/*
680 * ISP queue - ABTS Response IOCB from ISP24xx Firmware entry structure.
681 * The ABTS response with completion status to the ABTS response
682 * (sent by the target driver to the ISP 24xx) is sent by the
683 * ISP24xx firmware to the target driver.
684 * The IOCB is placed on the response queue.
685 */
686struct abts_resp_from_24xx_fw {
687 uint8_t entry_type; /* Entry type. */
688 uint8_t entry_count; /* Entry count. */
689 uint8_t sys_define; /* System defined. */
690 uint8_t entry_status; /* Entry Status. */
691 uint32_t handle;
692 uint16_t compl_status;
693#define ABTS_RESP_COMPL_SUCCESS 0
694#define ABTS_RESP_COMPL_SUBCODE_ERROR 0x31
695 uint16_t nport_handle;
696 uint16_t reserved_1;
697 uint8_t reserved_2;
698 uint8_t reserved_3:4;
699 uint8_t sof_type:4;
700 uint32_t exchange_address;
701 struct fcp_hdr_le fcp_hdr_le;
702 uint8_t reserved_4[8];
703 uint32_t error_subcode1;
704#define ABTS_RESP_SUBCODE_ERR_ABORTED_EXCH_NOT_TERM 0x1E
705 uint32_t error_subcode2;
706 uint32_t exchange_addr_to_abort;
707} __packed;
708
709/********************************************************************\
710 * Type Definitions used by initiator & target halves
711\********************************************************************/
712
713struct qla_tgt_mgmt_cmd;
714struct qla_tgt_sess;
715
716/*
717 * This structure provides a template of function calls that the
718 * target driver (from within qla_target.c) can issue to the
719 * target module (tcm_qla2xxx).
720 */
721struct qla_tgt_func_tmpl {
722
723 int (*handle_cmd)(struct scsi_qla_host *, struct qla_tgt_cmd *,
724 unsigned char *, uint32_t, int, int, int);
43381ce8 725 void (*handle_data)(struct qla_tgt_cmd *);
f83adb61 726 void (*handle_dif_err)(struct qla_tgt_cmd *);
2d70c103
NB
727 int (*handle_tmr)(struct qla_tgt_mgmt_cmd *, uint32_t, uint8_t,
728 uint32_t);
729 void (*free_cmd)(struct qla_tgt_cmd *);
730 void (*free_mcmd)(struct qla_tgt_mgmt_cmd *);
731 void (*free_session)(struct qla_tgt_sess *);
732
733 int (*check_initiator_node_acl)(struct scsi_qla_host *, unsigned char *,
1b655b19 734 struct qla_tgt_sess *);
c8292d1d 735 void (*update_sess)(struct qla_tgt_sess *, port_id_t, uint16_t, bool);
2d70c103
NB
736 struct qla_tgt_sess *(*find_sess_by_loop_id)(struct scsi_qla_host *,
737 const uint16_t);
738 struct qla_tgt_sess *(*find_sess_by_s_id)(struct scsi_qla_host *,
739 const uint8_t *);
740 void (*clear_nacl_from_fcport_map)(struct qla_tgt_sess *);
2d70c103
NB
741 void (*shutdown_sess)(struct qla_tgt_sess *);
742};
743
744int qla2x00_wait_for_hba_online(struct scsi_qla_host *);
745
746#include <target/target_core_base.h>
747
748#define QLA_TGT_TIMEOUT 10 /* in seconds */
749
750#define QLA_TGT_MAX_HW_PENDING_TIME 60 /* in seconds */
751
752/* Immediate notify status constants */
753#define IMM_NTFY_LIP_RESET 0x000E
754#define IMM_NTFY_LIP_LINK_REINIT 0x000F
755#define IMM_NTFY_IOCB_OVERFLOW 0x0016
756#define IMM_NTFY_ABORT_TASK 0x0020
757#define IMM_NTFY_PORT_LOGOUT 0x0029
758#define IMM_NTFY_PORT_CONFIG 0x002A
759#define IMM_NTFY_GLBL_TPRLO 0x002D
760#define IMM_NTFY_GLBL_LOGO 0x002E
761#define IMM_NTFY_RESOURCE 0x0034
762#define IMM_NTFY_MSG_RX 0x0036
763#define IMM_NTFY_SRR 0x0045
764#define IMM_NTFY_ELS 0x0046
765
766/* Immediate notify task flags */
767#define IMM_NTFY_TASK_MGMT_SHIFT 8
768
769#define QLA_TGT_CLEAR_ACA 0x40
770#define QLA_TGT_TARGET_RESET 0x20
771#define QLA_TGT_LUN_RESET 0x10
772#define QLA_TGT_CLEAR_TS 0x04
773#define QLA_TGT_ABORT_TS 0x02
774#define QLA_TGT_ABORT_ALL_SESS 0xFFFF
775#define QLA_TGT_ABORT_ALL 0xFFFE
776#define QLA_TGT_NEXUS_LOSS_SESS 0xFFFD
777#define QLA_TGT_NEXUS_LOSS 0xFFFC
778
779/* Notify Acknowledge flags */
780#define NOTIFY_ACK_RES_COUNT BIT_8
781#define NOTIFY_ACK_CLEAR_LIP_RESET BIT_5
782#define NOTIFY_ACK_TM_RESP_CODE_VALID BIT_4
783
784/* Command's states */
785#define QLA_TGT_STATE_NEW 0 /* New command + target processing */
786#define QLA_TGT_STATE_NEED_DATA 1 /* target needs data to continue */
787#define QLA_TGT_STATE_DATA_IN 2 /* Data arrived + target processing */
788#define QLA_TGT_STATE_PROCESSED 3 /* target done processing */
193b50b9 789
2d70c103
NB
790
791/* Special handles */
792#define QLA_TGT_NULL_HANDLE 0
793#define QLA_TGT_SKIP_HANDLE (0xFFFFFFFF & ~CTIO_COMPLETION_HANDLE_MARK)
794
795/* ATIO task_codes field */
796#define ATIO_SIMPLE_QUEUE 0
797#define ATIO_HEAD_OF_QUEUE 1
798#define ATIO_ORDERED_QUEUE 2
799#define ATIO_ACA_QUEUE 4
800#define ATIO_UNTAGGED 5
801
802/* TM failed response codes, see FCP (9.4.11 FCP_RSP_INFO) */
803#define FC_TM_SUCCESS 0
804#define FC_TM_BAD_FCP_DATA 1
805#define FC_TM_BAD_CMD 2
806#define FC_TM_FCP_DATA_MISMATCH 3
807#define FC_TM_REJECT 4
808#define FC_TM_FAILED 5
809
2d70c103
NB
810#if (BITS_PER_LONG > 32) || defined(CONFIG_HIGHMEM64G)
811#define pci_dma_lo32(a) (a & 0xffffffff)
812#define pci_dma_hi32(a) ((((a) >> 16)>>16) & 0xffffffff)
813#else
814#define pci_dma_lo32(a) (a & 0xffffffff)
815#define pci_dma_hi32(a) 0
816#endif
817
818#define QLA_TGT_SENSE_VALID(sense) ((sense != NULL) && \
819 (((const uint8_t *)(sense))[0] & 0x70) == 0x70)
820
821struct qla_port_24xx_data {
822 uint8_t port_name[WWN_SIZE];
823 uint16_t loop_id;
824 uint16_t reserved;
825};
826
827struct qla_tgt {
828 struct scsi_qla_host *vha;
829 struct qla_hw_data *ha;
830
831 /*
832 * To sync between IRQ handlers and qlt_target_release(). Needed,
833 * because req_pkt() can drop/reaquire HW lock inside. Protected by
834 * HW lock.
835 */
836 int irq_cmd_count;
2f424b9b 837 int atio_irq_cmd_count;
2d70c103
NB
838
839 int datasegs_per_cmd, datasegs_per_cont, sg_tablesize;
840
841 /* Target's flags, serialized by pha->hardware_lock */
842 unsigned int tgt_enable_64bit_addr:1; /* 64-bits PCI addr enabled */
843 unsigned int link_reinit_iocb_pending:1;
844
845 /*
846 * Protected by tgt_mutex AND hardware_lock for writing and tgt_mutex
847 * OR hardware_lock for reading.
848 */
849 int tgt_stop; /* the target mode driver is being stopped */
850 int tgt_stopped; /* the target mode driver has been stopped */
851
852 /* Count of sessions refering qla_tgt. Protected by hardware_lock. */
853 int sess_count;
854
855 /* Protected by hardware_lock. Addition also protected by tgt_mutex. */
856 struct list_head sess_list;
857
858 /* Protected by hardware_lock */
859 struct list_head del_sess_list;
860 struct delayed_work sess_del_work;
861
862 spinlock_t sess_work_lock;
863 struct list_head sess_works_list;
864 struct work_struct sess_work;
865
866 struct imm_ntfy_from_isp link_reinit_iocb;
867 wait_queue_head_t waitQ;
868 int notify_ack_expected;
869 int abts_resp_expected;
870 int modify_lun_expected;
871
872 int ctio_srr_id;
873 int imm_srr_id;
874 spinlock_t srr_lock;
875 struct list_head srr_ctio_list;
876 struct list_head srr_imm_list;
877 struct work_struct srr_work;
878
879 atomic_t tgt_global_resets_count;
880
881 struct list_head tgt_list_entry;
882};
883
51a07f84
NB
884struct qla_tgt_sess_op {
885 struct scsi_qla_host *vha;
2f424b9b 886 uint32_t chip_reset;
51a07f84
NB
887 struct atio_from_isp atio;
888 struct work_struct work;
8b2f5ff3
SN
889 struct list_head cmd_list;
890 bool aborted;
51a07f84
NB
891};
892
a6ca8878
AP
893enum qla_sess_deletion {
894 QLA_SESS_DELETION_NONE = 0,
895 QLA_SESS_DELETION_PENDING = 1, /* hopefully we can get rid of
896 * this one */
897 QLA_SESS_DELETION_IN_PROGRESS = 2,
898};
899
b7bd104e
AP
900typedef enum {
901 QLT_PLOGI_LINK_SAME_WWN,
902 QLT_PLOGI_LINK_CONFLICT,
903 QLT_PLOGI_LINK_MAX
904} qlt_plogi_link_t;
905
906typedef struct {
907 struct list_head list;
908 struct imm_ntfy_from_isp iocb;
909 port_id_t id;
910 int ref_count;
911} qlt_plogi_ack_t;
912
2d70c103
NB
913/*
914 * Equivilant to IT Nexus (Initiator-Target)
915 */
916struct qla_tgt_sess {
917 uint16_t loop_id;
918 port_id_t s_id;
919
920 unsigned int conf_compl_supported:1;
a6ca8878 921 unsigned int deleted:2;
2d70c103 922 unsigned int local:1;
a6ca8878 923 unsigned int logout_on_delete:1;
a6ca8878 924 unsigned int keep_nport_handle:1;
71cdc079 925 unsigned int send_els_logo:1;
a6ca8878
AP
926
927 unsigned char logout_completed;
2d70c103 928
df673274
AP
929 int generation;
930
2d70c103 931 struct se_session *se_sess;
e3dc0e31 932 struct kref sess_kref;
2d70c103
NB
933 struct scsi_qla_host *vha;
934 struct qla_tgt *tgt;
935
936 struct list_head sess_list_entry;
937 unsigned long expires;
938 struct list_head del_list_entry;
939
940 uint8_t port_name[WWN_SIZE];
941 struct work_struct free_work;
a6ca8878 942
b7bd104e 943 qlt_plogi_ack_t *plogi_link[QLT_PLOGI_LINK_MAX];
2d70c103
NB
944};
945
a07100e0
QT
946typedef enum {
947 /*
948 * BIT_0 - Atio Arrival / schedule to work
949 * BIT_1 - qlt_do_work
950 * BIT_2 - qlt_do work failed
951 * BIT_3 - xfer rdy/tcm_qla2xxx_write_pending
952 * BIT_4 - read respond/tcm_qla2xx_queue_data_in
953 * BIT_5 - status respond / tcm_qla2xx_queue_status
954 * BIT_6 - tcm request to abort/Term exchange.
955 * pre_xmit_response->qlt_send_term_exchange
956 * BIT_7 - SRR received (qlt_handle_srr->qlt_xmit_response)
957 * BIT_8 - SRR received (qlt_handle_srr->qlt_rdy_to_xfer)
958 * BIT_9 - SRR received (qla_handle_srr->qlt_send_term_exchange)
959 * BIT_10 - Data in - hanlde_data->tcm_qla2xxx_handle_data
960
961 * BIT_12 - good completion - qlt_ctio_do_completion -->free_cmd
962 * BIT_13 - Bad completion -
963 * qlt_ctio_do_completion --> qlt_term_ctio_exchange
964 * BIT_14 - Back end data received/sent.
965 * BIT_15 - SRR prepare ctio
966 * BIT_16 - complete free
967 * BIT_17 - flush - qlt_abort_cmd_on_host_reset
968 * BIT_18 - completion w/abort status
969 * BIT_19 - completion w/unknown status
970 * BIT_20 - tcm_qla2xxx_free_cmd
971 */
972 CMD_FLAG_DATA_WORK = BIT_11,
973 CMD_FLAG_DATA_WORK_FREE = BIT_21,
974} cmd_flags_t;
975
2d70c103 976struct qla_tgt_cmd {
f83adb61 977 struct se_cmd se_cmd;
2d70c103
NB
978 struct qla_tgt_sess *sess;
979 int state;
2d70c103
NB
980 struct work_struct free_work;
981 struct work_struct work;
982 /* Sense buffer that will be mapped into outgoing status */
983 unsigned char sense_buffer[TRANSPORT_SENSE_BUFFER];
984
a07100e0 985 spinlock_t cmd_lock;
2d70c103
NB
986 /* to save extra sess dereferences */
987 unsigned int conf_compl_supported:1;
988 unsigned int sg_mapped:1;
989 unsigned int free_sg:1;
2d70c103 990 unsigned int write_data_transferred:1;
f83adb61 991 unsigned int ctx_dsd_alloced:1;
33e79977
QT
992 unsigned int q_full:1;
993 unsigned int term_exchg:1;
d564a372 994 unsigned int cmd_sent_to_fw:1;
e07f8f65 995 unsigned int cmd_in_wq:1;
193b50b9 996 unsigned int aborted:1;
2d70c103
NB
997
998 struct scatterlist *sg; /* cmd data buffer SG vector */
999 int sg_cnt; /* SG segments count */
1000 int bufflen; /* cmd buffer length */
1001 int offset;
2d70c103
NB
1002 uint32_t unpacked_lun;
1003 enum dma_data_direction dma_data_direction;
b6a029e1 1004 uint32_t reset_count;
2d70c103
NB
1005
1006 uint16_t loop_id; /* to save extra sess dereferences */
1007 struct qla_tgt *tgt; /* to save extra sess dereferences */
1008 struct scsi_qla_host *vha;
33e79977 1009 struct list_head cmd_list;
2d70c103
NB
1010
1011 struct atio_from_isp atio;
f83adb61
QT
1012 /* t10dif */
1013 struct scatterlist *prot_sg;
1014 uint32_t prot_sg_cnt;
1015 uint32_t blk_sz;
1016 struct crc_context *ctx;
1017
e07f8f65
SK
1018 uint64_t jiffies_at_alloc;
1019 uint64_t jiffies_at_free;
a07100e0
QT
1020
1021 cmd_flags_t cmd_flags;
2d70c103
NB
1022};
1023
1024struct qla_tgt_sess_work_param {
1025 struct list_head sess_works_list_entry;
1026
1027#define QLA_TGT_SESS_WORK_ABORT 1
1028#define QLA_TGT_SESS_WORK_TM 2
1029 int type;
1030
1031 union {
1032 struct abts_recv_from_24xx abts;
1033 struct imm_ntfy_from_isp tm_iocb;
1034 struct atio_from_isp tm_iocb2;
1035 };
1036};
1037
1038struct qla_tgt_mgmt_cmd {
1039 uint8_t tmr_func;
1040 uint8_t fc_tm_rsp;
1041 struct qla_tgt_sess *sess;
1042 struct se_cmd se_cmd;
1043 struct work_struct free_work;
1044 unsigned int flags;
b6a029e1 1045 uint32_t reset_count;
2d70c103
NB
1046#define QLA24XX_MGMT_SEND_NACK 1
1047 union {
1048 struct atio_from_isp atio;
1049 struct imm_ntfy_from_isp imm_ntfy;
1050 struct abts_recv_from_24xx abts;
1051 } __packed orig_iocb;
1052};
1053
1054struct qla_tgt_prm {
1055 struct qla_tgt_cmd *cmd;
1056 struct qla_tgt *tgt;
1057 void *pkt;
1058 struct scatterlist *sg; /* cmd data buffer SG vector */
db3a99b9 1059 unsigned char *sense_buffer;
2d70c103
NB
1060 int seg_cnt;
1061 int req_cnt;
1062 uint16_t rq_result;
1063 uint16_t scsi_status;
2d70c103
NB
1064 int sense_buffer_len;
1065 int residual;
1066 int add_status_pkt;
f83adb61
QT
1067 /* dif */
1068 struct scatterlist *prot_sg;
1069 uint16_t prot_seg_cnt;
1070 uint16_t tot_dsds;
2d70c103
NB
1071};
1072
1073struct qla_tgt_srr_imm {
1074 struct list_head srr_list_entry;
1075 int srr_id;
1076 struct imm_ntfy_from_isp imm_ntfy;
1077};
1078
1079struct qla_tgt_srr_ctio {
1080 struct list_head srr_list_entry;
1081 int srr_id;
1082 struct qla_tgt_cmd *cmd;
1083};
1084
a6ca8878
AP
1085/* Check for Switch reserved address */
1086#define IS_SW_RESV_ADDR(_s_id) \
1087 ((_s_id.b.domain == 0xff) && (_s_id.b.area == 0xfc))
1088
2d70c103
NB
1089#define QLA_TGT_XMIT_DATA 1
1090#define QLA_TGT_XMIT_STATUS 2
1091#define QLA_TGT_XMIT_ALL (QLA_TGT_XMIT_STATUS|QLA_TGT_XMIT_DATA)
1092
2d70c103
NB
1093
1094extern struct qla_tgt_data qla_target;
2d70c103
NB
1095
1096/*
1097 * Function prototypes for qla_target.c logic used by qla2xxx LLD code.
1098 */
1099extern int qlt_add_target(struct qla_hw_data *, struct scsi_qla_host *);
1100extern int qlt_remove_target(struct qla_hw_data *, struct scsi_qla_host *);
49a47f2c
NB
1101extern int qlt_lport_register(void *, u64, u64, u64,
1102 int (*callback)(struct scsi_qla_host *, void *, u64, u64));
2d70c103 1103extern void qlt_lport_deregister(struct scsi_qla_host *);
e3dc0e31 1104void qlt_put_sess(struct qla_tgt_sess *sess);
2d70c103 1105extern void qlt_fc_port_added(struct scsi_qla_host *, fc_port_t *);
df673274 1106extern void qlt_fc_port_deleted(struct scsi_qla_host *, fc_port_t *, int);
2d70c103
NB
1107extern int __init qlt_init(void);
1108extern void qlt_exit(void);
1109extern void qlt_update_vp_map(struct scsi_qla_host *, int);
1110
1111/*
1112 * This macro is used during early initializations when host->active_mode
1113 * is not set. Right now, ha value is ignored.
1114 */
1115#define QLA_TGT_MODE_ENABLED() (ql2x_ini_mode != QLA2XXX_INI_MODE_ENABLED)
aa230bc5 1116extern int ql2x_ini_mode;
2d70c103
NB
1117
1118static inline bool qla_tgt_mode_enabled(struct scsi_qla_host *ha)
1119{
1120 return ha->host->active_mode & MODE_TARGET;
1121}
1122
1123static inline bool qla_ini_mode_enabled(struct scsi_qla_host *ha)
1124{
1125 return ha->host->active_mode & MODE_INITIATOR;
1126}
1127
1128static inline void qla_reverse_ini_mode(struct scsi_qla_host *ha)
1129{
1130 if (ha->host->active_mode & MODE_INITIATOR)
1131 ha->host->active_mode &= ~MODE_INITIATOR;
1132 else
1133 ha->host->active_mode |= MODE_INITIATOR;
1134}
1135
8b2f5ff3
SN
1136static inline uint32_t sid_to_key(const uint8_t *s_id)
1137{
1138 uint32_t key;
1139
1140 key = (((unsigned long)s_id[0] << 16) |
1141 ((unsigned long)s_id[1] << 8) |
1142 (unsigned long)s_id[2]);
1143 return key;
1144}
1145
71cdc079
AP
1146static inline void sid_to_portid(const uint8_t *s_id, port_id_t *p)
1147{
1148 memset(p, 0, sizeof(*p));
1149 p->b.domain = s_id[0];
1150 p->b.area = s_id[1];
1151 p->b.al_pa = s_id[2];
1152}
1153
2d70c103
NB
1154/*
1155 * Exported symbols from qla_target.c LLD logic used by qla2xxx code..
1156 */
2d70c103
NB
1157extern void qlt_response_pkt_all_vps(struct scsi_qla_host *, response_t *);
1158extern int qlt_rdy_to_xfer(struct qla_tgt_cmd *);
1159extern int qlt_xmit_response(struct qla_tgt_cmd *, int, uint8_t);
a07100e0 1160extern int qlt_abort_cmd(struct qla_tgt_cmd *);
2d70c103
NB
1161extern void qlt_xmit_tm_rsp(struct qla_tgt_mgmt_cmd *);
1162extern void qlt_free_mcmd(struct qla_tgt_mgmt_cmd *);
1163extern void qlt_free_cmd(struct qla_tgt_cmd *cmd);
2d70c103
NB
1164extern void qlt_async_event(uint16_t, struct scsi_qla_host *, uint16_t *);
1165extern void qlt_enable_vha(struct scsi_qla_host *);
1166extern void qlt_vport_create(struct scsi_qla_host *, struct qla_hw_data *);
1167extern void qlt_rff_id(struct scsi_qla_host *, struct ct_sns_req *);
1168extern void qlt_init_atio_q_entries(struct scsi_qla_host *);
2f424b9b 1169extern void qlt_24xx_process_atio_queue(struct scsi_qla_host *, uint8_t);
aa230bc5 1170extern void qlt_24xx_config_rings(struct scsi_qla_host *);
2d70c103
NB
1171extern void qlt_24xx_config_nvram_stage1(struct scsi_qla_host *,
1172 struct nvram_24xx *);
1173extern void qlt_24xx_config_nvram_stage2(struct scsi_qla_host *,
1174 struct init_cb_24xx *);
aa230bc5
AE
1175extern void qlt_81xx_config_nvram_stage2(struct scsi_qla_host *,
1176 struct init_cb_81xx *);
1177extern void qlt_81xx_config_nvram_stage1(struct scsi_qla_host *,
1178 struct nvram_81xx *);
2d70c103
NB
1179extern int qlt_24xx_process_response_error(struct scsi_qla_host *,
1180 struct sts_entry_24xx *);
1181extern void qlt_modify_vp_config(struct scsi_qla_host *,
1182 struct vp_config_entry_24xx *);
1183extern void qlt_probe_one_stage1(struct scsi_qla_host *, struct qla_hw_data *);
1184extern int qlt_mem_alloc(struct qla_hw_data *);
1185extern void qlt_mem_free(struct qla_hw_data *);
3c231bda 1186extern int qlt_stop_phase1(struct qla_tgt *);
2d70c103 1187extern void qlt_stop_phase2(struct qla_tgt *);
aa230bc5
AE
1188extern irqreturn_t qla83xx_msix_atio_q(int, void *);
1189extern void qlt_83xx_iospace_config(struct qla_hw_data *);
33e79977 1190extern int qlt_free_qfull_cmds(struct scsi_qla_host *);
a6ca8878 1191extern void qlt_logo_completion_handler(fc_port_t *, int);
df673274 1192extern void qlt_do_generation_tick(struct scsi_qla_host *, int *);
2d70c103
NB
1193
1194#endif /* __QLA_TARGET_H */