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2d70c103 NB |
1 | /* |
2 | * Copyright (C) 2004 - 2010 Vladislav Bolkhovitin <vst@vlnb.net> | |
3 | * Copyright (C) 2004 - 2005 Leonid Stoljar | |
4 | * Copyright (C) 2006 Nathaniel Clark <nate@misrule.us> | |
5 | * Copyright (C) 2007 - 2010 ID7 Ltd. | |
6 | * | |
7 | * Forward port and refactoring to modern qla2xxx and target/configfs | |
8 | * | |
9 | * Copyright (C) 2010-2011 Nicholas A. Bellinger <nab@kernel.org> | |
10 | * | |
11 | * Additional file for the target driver support. | |
12 | * | |
13 | * This program is free software; you can redistribute it and/or | |
14 | * modify it under the terms of the GNU General Public License | |
15 | * as published by the Free Software Foundation; either version 2 | |
16 | * of the License, or (at your option) any later version. | |
17 | * | |
18 | * This program is distributed in the hope that it will be useful, | |
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
21 | * GNU General Public License for more details. | |
22 | */ | |
23 | /* | |
24 | * This is the global def file that is useful for including from the | |
25 | * target portion. | |
26 | */ | |
27 | ||
28 | #ifndef __QLA_TARGET_H | |
29 | #define __QLA_TARGET_H | |
30 | ||
31 | #include "qla_def.h" | |
32 | ||
33 | /* | |
34 | * Must be changed on any change in any initiator visible interfaces or | |
35 | * data in the target add-on | |
36 | */ | |
37 | #define QLA2XXX_TARGET_MAGIC 269 | |
38 | ||
39 | /* | |
40 | * Must be changed on any change in any target visible interfaces or | |
41 | * data in the initiator | |
42 | */ | |
43 | #define QLA2XXX_INITIATOR_MAGIC 57222 | |
44 | ||
45 | #define QLA2XXX_INI_MODE_STR_EXCLUSIVE "exclusive" | |
46 | #define QLA2XXX_INI_MODE_STR_DISABLED "disabled" | |
47 | #define QLA2XXX_INI_MODE_STR_ENABLED "enabled" | |
ead03855 | 48 | #define QLA2XXX_INI_MODE_STR_DUAL "dual" |
2d70c103 NB |
49 | |
50 | #define QLA2XXX_INI_MODE_EXCLUSIVE 0 | |
51 | #define QLA2XXX_INI_MODE_DISABLED 1 | |
52 | #define QLA2XXX_INI_MODE_ENABLED 2 | |
ead03855 | 53 | #define QLA2XXX_INI_MODE_DUAL 3 |
2d70c103 NB |
54 | |
55 | #define QLA2XXX_COMMAND_COUNT_INIT 250 | |
56 | #define QLA2XXX_IMMED_NOTIFY_COUNT_INIT 250 | |
57 | ||
58 | /* | |
59 | * Used to mark which completion handles (for RIO Status's) are for CTIO's | |
60 | * vs. regular (non-target) info. This is checked for in | |
61 | * qla2x00_process_response_queue() to see if a handle coming back in a | |
62 | * multi-complete should come to the tgt driver or be handled there by qla2xxx | |
63 | */ | |
64 | #define CTIO_COMPLETION_HANDLE_MARK BIT_29 | |
8d93f550 CD |
65 | #if (CTIO_COMPLETION_HANDLE_MARK <= DEFAULT_OUTSTANDING_COMMANDS) |
66 | #error "CTIO_COMPLETION_HANDLE_MARK not larger than " | |
67 | "DEFAULT_OUTSTANDING_COMMANDS" | |
2d70c103 NB |
68 | #endif |
69 | #define HANDLE_IS_CTIO_COMP(h) (h & CTIO_COMPLETION_HANDLE_MARK) | |
70 | ||
71 | /* Used to mark CTIO as intermediate */ | |
72 | #define CTIO_INTERMEDIATE_HANDLE_MARK BIT_30 | |
73 | ||
74 | #ifndef OF_SS_MODE_0 | |
75 | /* | |
76 | * ISP target entries - Flags bit definitions. | |
77 | */ | |
78 | #define OF_SS_MODE_0 0 | |
79 | #define OF_SS_MODE_1 1 | |
80 | #define OF_SS_MODE_2 2 | |
81 | #define OF_SS_MODE_3 3 | |
82 | ||
83 | #define OF_EXPL_CONF BIT_5 /* Explicit Confirmation Requested */ | |
84 | #define OF_DATA_IN BIT_6 /* Data in to initiator */ | |
85 | /* (data from target to initiator) */ | |
86 | #define OF_DATA_OUT BIT_7 /* Data out from initiator */ | |
87 | /* (data from initiator to target) */ | |
88 | #define OF_NO_DATA (BIT_7 | BIT_6) | |
89 | #define OF_INC_RC BIT_8 /* Increment command resource count */ | |
90 | #define OF_FAST_POST BIT_9 /* Enable mailbox fast posting. */ | |
91 | #define OF_CONF_REQ BIT_13 /* Confirmation Requested */ | |
92 | #define OF_TERM_EXCH BIT_14 /* Terminate exchange */ | |
93 | #define OF_SSTS BIT_15 /* Send SCSI status */ | |
94 | #endif | |
95 | ||
96 | #ifndef QLA_TGT_DATASEGS_PER_CMD32 | |
97 | #define QLA_TGT_DATASEGS_PER_CMD32 3 | |
98 | #define QLA_TGT_DATASEGS_PER_CONT32 7 | |
99 | #define QLA_TGT_MAX_SG32(ql) \ | |
100 | (((ql) > 0) ? (QLA_TGT_DATASEGS_PER_CMD32 + \ | |
101 | QLA_TGT_DATASEGS_PER_CONT32*((ql) - 1)) : 0) | |
102 | ||
103 | #define QLA_TGT_DATASEGS_PER_CMD64 2 | |
104 | #define QLA_TGT_DATASEGS_PER_CONT64 5 | |
105 | #define QLA_TGT_MAX_SG64(ql) \ | |
106 | (((ql) > 0) ? (QLA_TGT_DATASEGS_PER_CMD64 + \ | |
107 | QLA_TGT_DATASEGS_PER_CONT64*((ql) - 1)) : 0) | |
108 | #endif | |
109 | ||
110 | #ifndef QLA_TGT_DATASEGS_PER_CMD_24XX | |
111 | #define QLA_TGT_DATASEGS_PER_CMD_24XX 1 | |
112 | #define QLA_TGT_DATASEGS_PER_CONT_24XX 5 | |
113 | #define QLA_TGT_MAX_SG_24XX(ql) \ | |
114 | (min(1270, ((ql) > 0) ? (QLA_TGT_DATASEGS_PER_CMD_24XX + \ | |
115 | QLA_TGT_DATASEGS_PER_CONT_24XX*((ql) - 1)) : 0)) | |
116 | #endif | |
117 | #endif | |
118 | ||
119 | #define GET_TARGET_ID(ha, iocb) ((HAS_EXTENDED_IDS(ha)) \ | |
120 | ? le16_to_cpu((iocb)->u.isp2x.target.extended) \ | |
121 | : (uint16_t)(iocb)->u.isp2x.target.id.standard) | |
122 | ||
2d70c103 NB |
123 | #ifndef NOTIFY_ACK_TYPE |
124 | #define NOTIFY_ACK_TYPE 0x0E /* Notify acknowledge entry. */ | |
125 | /* | |
126 | * ISP queue - notify acknowledge entry structure definition. | |
127 | * This is sent to the ISP from the target driver. | |
128 | */ | |
129 | struct nack_to_isp { | |
130 | uint8_t entry_type; /* Entry type. */ | |
131 | uint8_t entry_count; /* Entry count. */ | |
132 | uint8_t sys_define; /* System defined. */ | |
133 | uint8_t entry_status; /* Entry Status. */ | |
134 | union { | |
135 | struct { | |
136 | uint32_t sys_define_2; /* System defined. */ | |
137 | target_id_t target; | |
138 | uint8_t target_id; | |
139 | uint8_t reserved_1; | |
140 | uint16_t flags; | |
141 | uint16_t resp_code; | |
142 | uint16_t status; | |
143 | uint16_t task_flags; | |
144 | uint16_t seq_id; | |
145 | uint16_t srr_rx_id; | |
146 | uint32_t srr_rel_offs; | |
147 | uint16_t srr_ui; | |
148 | uint16_t srr_flags; | |
149 | uint16_t srr_reject_code; | |
150 | uint8_t srr_reject_vendor_uniq; | |
151 | uint8_t srr_reject_code_expl; | |
152 | uint8_t reserved_2[24]; | |
153 | } isp2x; | |
154 | struct { | |
155 | uint32_t handle; | |
156 | uint16_t nport_handle; | |
157 | uint16_t reserved_1; | |
158 | uint16_t flags; | |
159 | uint16_t srr_rx_id; | |
160 | uint16_t status; | |
161 | uint8_t status_subcode; | |
aa230bc5 | 162 | uint8_t fw_handle; |
2d70c103 NB |
163 | uint32_t exchange_address; |
164 | uint32_t srr_rel_offs; | |
165 | uint16_t srr_ui; | |
166 | uint16_t srr_flags; | |
167 | uint8_t reserved_4[19]; | |
168 | uint8_t vp_index; | |
169 | uint8_t srr_reject_vendor_uniq; | |
170 | uint8_t srr_reject_code_expl; | |
171 | uint8_t srr_reject_code; | |
172 | uint8_t reserved_5[5]; | |
173 | } isp24; | |
174 | } u; | |
175 | uint8_t reserved[2]; | |
176 | uint16_t ox_id; | |
177 | } __packed; | |
a6ca8878 | 178 | #define NOTIFY_ACK_FLAGS_TERMINATE BIT_3 |
2d70c103 NB |
179 | #define NOTIFY_ACK_SRR_FLAGS_ACCEPT 0 |
180 | #define NOTIFY_ACK_SRR_FLAGS_REJECT 1 | |
181 | ||
182 | #define NOTIFY_ACK_SRR_REJECT_REASON_UNABLE_TO_PERFORM 0x9 | |
183 | ||
184 | #define NOTIFY_ACK_SRR_FLAGS_REJECT_EXPL_NO_EXPL 0 | |
185 | #define NOTIFY_ACK_SRR_FLAGS_REJECT_EXPL_UNABLE_TO_SUPPLY_DATA 0x2a | |
186 | ||
187 | #define NOTIFY_ACK_SUCCESS 0x01 | |
188 | #endif | |
189 | ||
190 | #ifndef ACCEPT_TGT_IO_TYPE | |
191 | #define ACCEPT_TGT_IO_TYPE 0x16 /* Accept target I/O entry. */ | |
192 | #endif | |
193 | ||
194 | #ifndef CONTINUE_TGT_IO_TYPE | |
195 | #define CONTINUE_TGT_IO_TYPE 0x17 | |
196 | /* | |
197 | * ISP queue - Continue Target I/O (CTIO) entry for status mode 0 structure. | |
198 | * This structure is sent to the ISP 2xxx from target driver. | |
199 | */ | |
200 | struct ctio_to_2xxx { | |
201 | uint8_t entry_type; /* Entry type. */ | |
202 | uint8_t entry_count; /* Entry count. */ | |
203 | uint8_t sys_define; /* System defined. */ | |
204 | uint8_t entry_status; /* Entry Status. */ | |
205 | uint32_t handle; /* System defined handle */ | |
206 | target_id_t target; | |
207 | uint16_t rx_id; | |
208 | uint16_t flags; | |
209 | uint16_t status; | |
210 | uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */ | |
211 | uint16_t dseg_count; /* Data segment count. */ | |
212 | uint32_t relative_offset; | |
213 | uint32_t residual; | |
214 | uint16_t reserved_1[3]; | |
215 | uint16_t scsi_status; | |
216 | uint32_t transfer_length; | |
217 | uint32_t dseg_0_address; /* Data segment 0 address. */ | |
218 | uint32_t dseg_0_length; /* Data segment 0 length. */ | |
219 | uint32_t dseg_1_address; /* Data segment 1 address. */ | |
220 | uint32_t dseg_1_length; /* Data segment 1 length. */ | |
221 | uint32_t dseg_2_address; /* Data segment 2 address. */ | |
222 | uint32_t dseg_2_length; /* Data segment 2 length. */ | |
223 | } __packed; | |
224 | #define ATIO_PATH_INVALID 0x07 | |
225 | #define ATIO_CANT_PROV_CAP 0x16 | |
226 | #define ATIO_CDB_VALID 0x3D | |
227 | ||
228 | #define ATIO_EXEC_READ BIT_1 | |
229 | #define ATIO_EXEC_WRITE BIT_0 | |
230 | #endif | |
231 | ||
232 | #ifndef CTIO_A64_TYPE | |
233 | #define CTIO_A64_TYPE 0x1F | |
234 | #define CTIO_SUCCESS 0x01 | |
235 | #define CTIO_ABORTED 0x02 | |
236 | #define CTIO_INVALID_RX_ID 0x08 | |
237 | #define CTIO_TIMEOUT 0x0B | |
f83adb61 | 238 | #define CTIO_DIF_ERROR 0x0C /* DIF error detected */ |
2d70c103 NB |
239 | #define CTIO_LIP_RESET 0x0E |
240 | #define CTIO_TARGET_RESET 0x17 | |
241 | #define CTIO_PORT_UNAVAILABLE 0x28 | |
242 | #define CTIO_PORT_LOGGED_OUT 0x29 | |
243 | #define CTIO_PORT_CONF_CHANGED 0x2A | |
244 | #define CTIO_SRR_RECEIVED 0x45 | |
245 | #endif | |
246 | ||
247 | #ifndef CTIO_RET_TYPE | |
248 | #define CTIO_RET_TYPE 0x17 /* CTIO return entry */ | |
249 | #define ATIO_TYPE7 0x06 /* Accept target I/O entry for 24xx */ | |
250 | ||
251 | struct fcp_hdr { | |
252 | uint8_t r_ctl; | |
253 | uint8_t d_id[3]; | |
254 | uint8_t cs_ctl; | |
255 | uint8_t s_id[3]; | |
256 | uint8_t type; | |
257 | uint8_t f_ctl[3]; | |
258 | uint8_t seq_id; | |
259 | uint8_t df_ctl; | |
260 | uint16_t seq_cnt; | |
c7ee3bd4 | 261 | __be16 ox_id; |
2d70c103 NB |
262 | uint16_t rx_id; |
263 | uint32_t parameter; | |
264 | } __packed; | |
265 | ||
266 | struct fcp_hdr_le { | |
267 | uint8_t d_id[3]; | |
268 | uint8_t r_ctl; | |
269 | uint8_t s_id[3]; | |
270 | uint8_t cs_ctl; | |
271 | uint8_t f_ctl[3]; | |
272 | uint8_t type; | |
273 | uint16_t seq_cnt; | |
274 | uint8_t df_ctl; | |
275 | uint8_t seq_id; | |
276 | uint16_t rx_id; | |
277 | uint16_t ox_id; | |
278 | uint32_t parameter; | |
279 | } __packed; | |
280 | ||
281 | #define F_CTL_EXCH_CONTEXT_RESP BIT_23 | |
282 | #define F_CTL_SEQ_CONTEXT_RESIP BIT_22 | |
283 | #define F_CTL_LAST_SEQ BIT_20 | |
284 | #define F_CTL_END_SEQ BIT_19 | |
285 | #define F_CTL_SEQ_INITIATIVE BIT_16 | |
286 | ||
287 | #define R_CTL_BASIC_LINK_SERV 0x80 | |
288 | #define R_CTL_B_ACC 0x4 | |
289 | #define R_CTL_B_RJT 0x5 | |
290 | ||
291 | struct atio7_fcp_cmnd { | |
292 | uint64_t lun; | |
293 | uint8_t cmnd_ref; | |
294 | uint8_t task_attr:3; | |
295 | uint8_t reserved:5; | |
296 | uint8_t task_mgmt_flags; | |
297 | #define FCP_CMND_TASK_MGMT_CLEAR_ACA 6 | |
298 | #define FCP_CMND_TASK_MGMT_TARGET_RESET 5 | |
299 | #define FCP_CMND_TASK_MGMT_LU_RESET 4 | |
300 | #define FCP_CMND_TASK_MGMT_CLEAR_TASK_SET 2 | |
301 | #define FCP_CMND_TASK_MGMT_ABORT_TASK_SET 1 | |
302 | uint8_t wrdata:1; | |
303 | uint8_t rddata:1; | |
304 | uint8_t add_cdb_len:6; | |
305 | uint8_t cdb[16]; | |
306 | /* | |
307 | * add_cdb is optional and can absent from struct atio7_fcp_cmnd. Size 4 | |
308 | * only to make sizeof(struct atio7_fcp_cmnd) be as expected by | |
309 | * BUILD_BUG_ON in qlt_init(). | |
310 | */ | |
311 | uint8_t add_cdb[4]; | |
312 | /* uint32_t data_length; */ | |
313 | } __packed; | |
314 | ||
315 | /* | |
316 | * ISP queue - Accept Target I/O (ATIO) type entry IOCB structure. | |
317 | * This is sent from the ISP to the target driver. | |
318 | */ | |
319 | struct atio_from_isp { | |
320 | union { | |
321 | struct { | |
322 | uint16_t entry_hdr; | |
323 | uint8_t sys_define; /* System defined. */ | |
324 | uint8_t entry_status; /* Entry Status. */ | |
325 | uint32_t sys_define_2; /* System defined. */ | |
326 | target_id_t target; | |
327 | uint16_t rx_id; | |
328 | uint16_t flags; | |
329 | uint16_t status; | |
330 | uint8_t command_ref; | |
331 | uint8_t task_codes; | |
332 | uint8_t task_flags; | |
333 | uint8_t execution_codes; | |
334 | uint8_t cdb[MAX_CMDSZ]; | |
335 | uint32_t data_length; | |
336 | uint16_t lun; | |
337 | uint8_t initiator_port_name[WWN_SIZE]; /* on qla23xx */ | |
338 | uint16_t reserved_32[6]; | |
339 | uint16_t ox_id; | |
340 | } isp2x; | |
341 | struct { | |
342 | uint16_t entry_hdr; | |
343 | uint8_t fcp_cmnd_len_low; | |
344 | uint8_t fcp_cmnd_len_high:4; | |
345 | uint8_t attr:4; | |
346 | uint32_t exchange_addr; | |
347 | #define ATIO_EXCHANGE_ADDRESS_UNKNOWN 0xFFFFFFFF | |
348 | struct fcp_hdr fcp_hdr; | |
349 | struct atio7_fcp_cmnd fcp_cmnd; | |
350 | } isp24; | |
351 | struct { | |
352 | uint8_t entry_type; /* Entry type. */ | |
353 | uint8_t entry_count; /* Entry count. */ | |
5f35509d QT |
354 | __le16 attr_n_length; |
355 | #define FCP_CMD_LENGTH_MASK 0x0fff | |
356 | #define FCP_CMD_LENGTH_MIN 0x38 | |
357 | uint8_t data[56]; | |
2d70c103 NB |
358 | uint32_t signature; |
359 | #define ATIO_PROCESSED 0xDEADDEAD /* Signature */ | |
360 | } raw; | |
361 | } u; | |
362 | } __packed; | |
363 | ||
5f35509d QT |
364 | static inline int fcpcmd_is_corrupted(struct atio *atio) |
365 | { | |
366 | if (atio->entry_type == ATIO_TYPE7 && | |
367 | (le16_to_cpu(atio->attr_n_length & FCP_CMD_LENGTH_MASK) < | |
368 | FCP_CMD_LENGTH_MIN)) | |
369 | return 1; | |
370 | else | |
371 | return 0; | |
372 | } | |
373 | ||
374 | /* adjust corrupted atio so we won't trip over the same entry again. */ | |
375 | static inline void adjust_corrupted_atio(struct atio_from_isp *atio) | |
376 | { | |
377 | atio->u.raw.attr_n_length = cpu_to_le16(FCP_CMD_LENGTH_MIN); | |
378 | atio->u.isp24.fcp_cmnd.add_cdb_len = 0; | |
379 | } | |
380 | ||
be25152c QT |
381 | static inline int get_datalen_for_atio(struct atio_from_isp *atio) |
382 | { | |
383 | int len = atio->u.isp24.fcp_cmnd.add_cdb_len; | |
384 | ||
385 | return (be32_to_cpu(get_unaligned((uint32_t *) | |
386 | &atio->u.isp24.fcp_cmnd.add_cdb[len * 4]))); | |
387 | } | |
388 | ||
2d70c103 NB |
389 | #define CTIO_TYPE7 0x12 /* Continue target I/O entry (for 24xx) */ |
390 | ||
391 | /* | |
392 | * ISP queue - Continue Target I/O (ATIO) type 7 entry (for 24xx) structure. | |
393 | * This structure is sent to the ISP 24xx from the target driver. | |
394 | */ | |
395 | ||
396 | struct ctio7_to_24xx { | |
397 | uint8_t entry_type; /* Entry type. */ | |
398 | uint8_t entry_count; /* Entry count. */ | |
399 | uint8_t sys_define; /* System defined. */ | |
400 | uint8_t entry_status; /* Entry Status. */ | |
401 | uint32_t handle; /* System defined handle */ | |
402 | uint16_t nport_handle; | |
403 | #define CTIO7_NHANDLE_UNRECOGNIZED 0xFFFF | |
404 | uint16_t timeout; | |
405 | uint16_t dseg_count; /* Data segment count. */ | |
406 | uint8_t vp_index; | |
407 | uint8_t add_flags; | |
408 | uint8_t initiator_id[3]; | |
409 | uint8_t reserved; | |
410 | uint32_t exchange_addr; | |
411 | union { | |
412 | struct { | |
413 | uint16_t reserved1; | |
c7ee3bd4 | 414 | __le16 flags; |
2d70c103 | 415 | uint32_t residual; |
33a5fcee | 416 | __le16 ox_id; |
2d70c103 NB |
417 | uint16_t scsi_status; |
418 | uint32_t relative_offset; | |
419 | uint32_t reserved2; | |
420 | uint32_t transfer_length; | |
421 | uint32_t reserved3; | |
422 | /* Data segment 0 address. */ | |
423 | uint32_t dseg_0_address[2]; | |
424 | /* Data segment 0 length. */ | |
425 | uint32_t dseg_0_length; | |
426 | } status0; | |
427 | struct { | |
428 | uint16_t sense_length; | |
429 | uint16_t flags; | |
430 | uint32_t residual; | |
33a5fcee | 431 | __le16 ox_id; |
2d70c103 NB |
432 | uint16_t scsi_status; |
433 | uint16_t response_len; | |
434 | uint16_t reserved; | |
435 | uint8_t sense_data[24]; | |
436 | } status1; | |
437 | } u; | |
438 | } __packed; | |
439 | ||
440 | /* | |
441 | * ISP queue - CTIO type 7 from ISP 24xx to target driver | |
442 | * returned entry structure. | |
443 | */ | |
444 | struct ctio7_from_24xx { | |
445 | uint8_t entry_type; /* Entry type. */ | |
446 | uint8_t entry_count; /* Entry count. */ | |
447 | uint8_t sys_define; /* System defined. */ | |
448 | uint8_t entry_status; /* Entry Status. */ | |
449 | uint32_t handle; /* System defined handle */ | |
450 | uint16_t status; | |
451 | uint16_t timeout; | |
452 | uint16_t dseg_count; /* Data segment count. */ | |
453 | uint8_t vp_index; | |
454 | uint8_t reserved1[5]; | |
455 | uint32_t exchange_address; | |
456 | uint16_t reserved2; | |
457 | uint16_t flags; | |
458 | uint32_t residual; | |
459 | uint16_t ox_id; | |
460 | uint16_t reserved3; | |
461 | uint32_t relative_offset; | |
462 | uint8_t reserved4[24]; | |
463 | } __packed; | |
464 | ||
465 | /* CTIO7 flags values */ | |
466 | #define CTIO7_FLAGS_SEND_STATUS BIT_15 | |
467 | #define CTIO7_FLAGS_TERMINATE BIT_14 | |
468 | #define CTIO7_FLAGS_CONFORM_REQ BIT_13 | |
469 | #define CTIO7_FLAGS_DONT_RET_CTIO BIT_8 | |
470 | #define CTIO7_FLAGS_STATUS_MODE_0 0 | |
471 | #define CTIO7_FLAGS_STATUS_MODE_1 BIT_6 | |
f83adb61 | 472 | #define CTIO7_FLAGS_STATUS_MODE_2 BIT_7 |
2d70c103 NB |
473 | #define CTIO7_FLAGS_EXPLICIT_CONFORM BIT_5 |
474 | #define CTIO7_FLAGS_CONFIRM_SATISF BIT_4 | |
475 | #define CTIO7_FLAGS_DSD_PTR BIT_2 | |
f83adb61 QT |
476 | #define CTIO7_FLAGS_DATA_IN BIT_1 /* data to initiator */ |
477 | #define CTIO7_FLAGS_DATA_OUT BIT_0 /* data from initiator */ | |
2d70c103 NB |
478 | |
479 | #define ELS_PLOGI 0x3 | |
480 | #define ELS_FLOGI 0x4 | |
481 | #define ELS_LOGO 0x5 | |
482 | #define ELS_PRLI 0x20 | |
483 | #define ELS_PRLO 0x21 | |
484 | #define ELS_TPRLO 0x24 | |
485 | #define ELS_PDISC 0x50 | |
486 | #define ELS_ADISC 0x52 | |
487 | ||
f83adb61 QT |
488 | /* |
489 | *CTIO Type CRC_2 IOCB | |
490 | */ | |
491 | struct ctio_crc2_to_fw { | |
492 | uint8_t entry_type; /* Entry type. */ | |
493 | #define CTIO_CRC2 0x7A | |
494 | uint8_t entry_count; /* Entry count. */ | |
495 | uint8_t sys_define; /* System defined. */ | |
496 | uint8_t entry_status; /* Entry Status. */ | |
497 | ||
498 | uint32_t handle; /* System handle. */ | |
499 | uint16_t nport_handle; /* N_PORT handle. */ | |
c7ee3bd4 | 500 | __le16 timeout; /* Command timeout. */ |
f83adb61 QT |
501 | |
502 | uint16_t dseg_count; /* Data segment count. */ | |
503 | uint8_t vp_index; | |
504 | uint8_t add_flags; /* additional flags */ | |
505 | #define CTIO_CRC2_AF_DIF_DSD_ENA BIT_3 | |
506 | ||
507 | uint8_t initiator_id[3]; /* initiator ID */ | |
508 | uint8_t reserved1; | |
509 | uint32_t exchange_addr; /* rcv exchange address */ | |
510 | uint16_t reserved2; | |
c7ee3bd4 | 511 | __le16 flags; /* refer to CTIO7 flags values */ |
f83adb61 | 512 | uint32_t residual; |
c7ee3bd4 | 513 | __le16 ox_id; |
f83adb61 | 514 | uint16_t scsi_status; |
c7ee3bd4 | 515 | __le32 relative_offset; |
f83adb61 | 516 | uint32_t reserved5; |
c7ee3bd4 | 517 | __le32 transfer_length; /* total fc transfer length */ |
f83adb61 | 518 | uint32_t reserved6; |
c7ee3bd4 | 519 | __le32 crc_context_address[2];/* Data segment address. */ |
f83adb61 QT |
520 | uint16_t crc_context_len; /* Data segment length. */ |
521 | uint16_t reserved_1; /* MUST be set to 0. */ | |
522 | } __packed; | |
523 | ||
524 | /* CTIO Type CRC_x Status IOCB */ | |
525 | struct ctio_crc_from_fw { | |
526 | uint8_t entry_type; /* Entry type. */ | |
527 | uint8_t entry_count; /* Entry count. */ | |
528 | uint8_t sys_define; /* System defined. */ | |
529 | uint8_t entry_status; /* Entry Status. */ | |
530 | ||
531 | uint32_t handle; /* System handle. */ | |
532 | uint16_t status; | |
533 | uint16_t timeout; /* Command timeout. */ | |
534 | uint16_t dseg_count; /* Data segment count. */ | |
535 | uint32_t reserved1; | |
536 | uint16_t state_flags; | |
537 | #define CTIO_CRC_SF_DIF_CHOPPED BIT_4 | |
538 | ||
539 | uint32_t exchange_address; /* rcv exchange address */ | |
540 | uint16_t reserved2; | |
541 | uint16_t flags; | |
542 | uint32_t resid_xfer_length; | |
543 | uint16_t ox_id; | |
544 | uint8_t reserved3[12]; | |
545 | uint16_t runt_guard; /* reported runt blk guard */ | |
546 | uint8_t actual_dif[8]; | |
547 | uint8_t expected_dif[8]; | |
548 | } __packed; | |
549 | ||
2d70c103 NB |
550 | /* |
551 | * ISP queue - ABTS received/response entries structure definition for 24xx. | |
552 | */ | |
553 | #define ABTS_RECV_24XX 0x54 /* ABTS received (for 24xx) */ | |
554 | #define ABTS_RESP_24XX 0x55 /* ABTS responce (for 24xx) */ | |
555 | ||
556 | /* | |
557 | * ISP queue - ABTS received IOCB entry structure definition for 24xx. | |
558 | * The ABTS BLS received from the wire is sent to the | |
559 | * target driver by the ISP 24xx. | |
560 | * The IOCB is placed on the response queue. | |
561 | */ | |
562 | struct abts_recv_from_24xx { | |
563 | uint8_t entry_type; /* Entry type. */ | |
564 | uint8_t entry_count; /* Entry count. */ | |
565 | uint8_t sys_define; /* System defined. */ | |
566 | uint8_t entry_status; /* Entry Status. */ | |
567 | uint8_t reserved_1[6]; | |
568 | uint16_t nport_handle; | |
569 | uint8_t reserved_2[2]; | |
570 | uint8_t vp_index; | |
571 | uint8_t reserved_3:4; | |
572 | uint8_t sof_type:4; | |
573 | uint32_t exchange_address; | |
574 | struct fcp_hdr_le fcp_hdr_le; | |
575 | uint8_t reserved_4[16]; | |
576 | uint32_t exchange_addr_to_abort; | |
577 | } __packed; | |
578 | ||
579 | #define ABTS_PARAM_ABORT_SEQ BIT_0 | |
580 | ||
581 | struct ba_acc_le { | |
582 | uint16_t reserved; | |
583 | uint8_t seq_id_last; | |
584 | uint8_t seq_id_valid; | |
585 | #define SEQ_ID_VALID 0x80 | |
586 | #define SEQ_ID_INVALID 0x00 | |
587 | uint16_t rx_id; | |
588 | uint16_t ox_id; | |
589 | uint16_t high_seq_cnt; | |
590 | uint16_t low_seq_cnt; | |
591 | } __packed; | |
592 | ||
593 | struct ba_rjt_le { | |
594 | uint8_t vendor_uniq; | |
595 | uint8_t reason_expl; | |
596 | uint8_t reason_code; | |
597 | #define BA_RJT_REASON_CODE_INVALID_COMMAND 0x1 | |
598 | #define BA_RJT_REASON_CODE_UNABLE_TO_PERFORM 0x9 | |
599 | uint8_t reserved; | |
600 | } __packed; | |
601 | ||
602 | /* | |
603 | * ISP queue - ABTS Response IOCB entry structure definition for 24xx. | |
604 | * The ABTS response to the ABTS received is sent by the | |
605 | * target driver to the ISP 24xx. | |
606 | * The IOCB is placed on the request queue. | |
607 | */ | |
608 | struct abts_resp_to_24xx { | |
609 | uint8_t entry_type; /* Entry type. */ | |
610 | uint8_t entry_count; /* Entry count. */ | |
611 | uint8_t sys_define; /* System defined. */ | |
612 | uint8_t entry_status; /* Entry Status. */ | |
613 | uint32_t handle; | |
614 | uint16_t reserved_1; | |
615 | uint16_t nport_handle; | |
616 | uint16_t control_flags; | |
617 | #define ABTS_CONTR_FLG_TERM_EXCHG BIT_0 | |
618 | uint8_t vp_index; | |
619 | uint8_t reserved_3:4; | |
620 | uint8_t sof_type:4; | |
621 | uint32_t exchange_address; | |
622 | struct fcp_hdr_le fcp_hdr_le; | |
623 | union { | |
624 | struct ba_acc_le ba_acct; | |
625 | struct ba_rjt_le ba_rjt; | |
626 | } __packed payload; | |
627 | uint32_t reserved_4; | |
628 | uint32_t exchange_addr_to_abort; | |
629 | } __packed; | |
630 | ||
631 | /* | |
632 | * ISP queue - ABTS Response IOCB from ISP24xx Firmware entry structure. | |
633 | * The ABTS response with completion status to the ABTS response | |
634 | * (sent by the target driver to the ISP 24xx) is sent by the | |
635 | * ISP24xx firmware to the target driver. | |
636 | * The IOCB is placed on the response queue. | |
637 | */ | |
638 | struct abts_resp_from_24xx_fw { | |
639 | uint8_t entry_type; /* Entry type. */ | |
640 | uint8_t entry_count; /* Entry count. */ | |
641 | uint8_t sys_define; /* System defined. */ | |
642 | uint8_t entry_status; /* Entry Status. */ | |
643 | uint32_t handle; | |
644 | uint16_t compl_status; | |
645 | #define ABTS_RESP_COMPL_SUCCESS 0 | |
646 | #define ABTS_RESP_COMPL_SUBCODE_ERROR 0x31 | |
647 | uint16_t nport_handle; | |
648 | uint16_t reserved_1; | |
649 | uint8_t reserved_2; | |
650 | uint8_t reserved_3:4; | |
651 | uint8_t sof_type:4; | |
652 | uint32_t exchange_address; | |
653 | struct fcp_hdr_le fcp_hdr_le; | |
654 | uint8_t reserved_4[8]; | |
655 | uint32_t error_subcode1; | |
656 | #define ABTS_RESP_SUBCODE_ERR_ABORTED_EXCH_NOT_TERM 0x1E | |
657 | uint32_t error_subcode2; | |
658 | uint32_t exchange_addr_to_abort; | |
659 | } __packed; | |
660 | ||
661 | /********************************************************************\ | |
662 | * Type Definitions used by initiator & target halves | |
663 | \********************************************************************/ | |
664 | ||
665 | struct qla_tgt_mgmt_cmd; | |
5d964837 | 666 | struct fc_port; |
2d70c103 NB |
667 | |
668 | /* | |
669 | * This structure provides a template of function calls that the | |
670 | * target driver (from within qla_target.c) can issue to the | |
671 | * target module (tcm_qla2xxx). | |
672 | */ | |
673 | struct qla_tgt_func_tmpl { | |
674 | ||
675 | int (*handle_cmd)(struct scsi_qla_host *, struct qla_tgt_cmd *, | |
676 | unsigned char *, uint32_t, int, int, int); | |
43381ce8 | 677 | void (*handle_data)(struct qla_tgt_cmd *); |
be92fc3f | 678 | int (*handle_tmr)(struct qla_tgt_mgmt_cmd *, uint32_t, uint16_t, |
2d70c103 NB |
679 | uint32_t); |
680 | void (*free_cmd)(struct qla_tgt_cmd *); | |
681 | void (*free_mcmd)(struct qla_tgt_mgmt_cmd *); | |
5d964837 | 682 | void (*free_session)(struct fc_port *); |
2d70c103 NB |
683 | |
684 | int (*check_initiator_node_acl)(struct scsi_qla_host *, unsigned char *, | |
5d964837 QT |
685 | struct fc_port *); |
686 | void (*update_sess)(struct fc_port *, port_id_t, uint16_t, bool); | |
687 | struct fc_port *(*find_sess_by_loop_id)(struct scsi_qla_host *, | |
2d70c103 | 688 | const uint16_t); |
5d964837 | 689 | struct fc_port *(*find_sess_by_s_id)(struct scsi_qla_host *, |
2d70c103 | 690 | const uint8_t *); |
5d964837 QT |
691 | void (*clear_nacl_from_fcport_map)(struct fc_port *); |
692 | void (*put_sess)(struct fc_port *); | |
693 | void (*shutdown_sess)(struct fc_port *); | |
be25152c QT |
694 | int (*get_dif_tags)(struct qla_tgt_cmd *cmd, uint16_t *pfw_prot_opts); |
695 | int (*chk_dif_tags)(uint32_t tag); | |
f1443eeb | 696 | void (*add_target)(struct scsi_qla_host *); |
2d70c103 NB |
697 | }; |
698 | ||
699 | int qla2x00_wait_for_hba_online(struct scsi_qla_host *); | |
700 | ||
701 | #include <target/target_core_base.h> | |
702 | ||
703 | #define QLA_TGT_TIMEOUT 10 /* in seconds */ | |
704 | ||
705 | #define QLA_TGT_MAX_HW_PENDING_TIME 60 /* in seconds */ | |
706 | ||
707 | /* Immediate notify status constants */ | |
708 | #define IMM_NTFY_LIP_RESET 0x000E | |
709 | #define IMM_NTFY_LIP_LINK_REINIT 0x000F | |
710 | #define IMM_NTFY_IOCB_OVERFLOW 0x0016 | |
711 | #define IMM_NTFY_ABORT_TASK 0x0020 | |
712 | #define IMM_NTFY_PORT_LOGOUT 0x0029 | |
713 | #define IMM_NTFY_PORT_CONFIG 0x002A | |
714 | #define IMM_NTFY_GLBL_TPRLO 0x002D | |
715 | #define IMM_NTFY_GLBL_LOGO 0x002E | |
716 | #define IMM_NTFY_RESOURCE 0x0034 | |
717 | #define IMM_NTFY_MSG_RX 0x0036 | |
718 | #define IMM_NTFY_SRR 0x0045 | |
719 | #define IMM_NTFY_ELS 0x0046 | |
720 | ||
721 | /* Immediate notify task flags */ | |
722 | #define IMM_NTFY_TASK_MGMT_SHIFT 8 | |
723 | ||
724 | #define QLA_TGT_CLEAR_ACA 0x40 | |
725 | #define QLA_TGT_TARGET_RESET 0x20 | |
726 | #define QLA_TGT_LUN_RESET 0x10 | |
727 | #define QLA_TGT_CLEAR_TS 0x04 | |
728 | #define QLA_TGT_ABORT_TS 0x02 | |
729 | #define QLA_TGT_ABORT_ALL_SESS 0xFFFF | |
730 | #define QLA_TGT_ABORT_ALL 0xFFFE | |
731 | #define QLA_TGT_NEXUS_LOSS_SESS 0xFFFD | |
732 | #define QLA_TGT_NEXUS_LOSS 0xFFFC | |
be25152c QT |
733 | #define QLA_TGT_ABTS 0xFFFB |
734 | #define QLA_TGT_2G_ABORT_TASK 0xFFFA | |
2d70c103 NB |
735 | |
736 | /* Notify Acknowledge flags */ | |
737 | #define NOTIFY_ACK_RES_COUNT BIT_8 | |
738 | #define NOTIFY_ACK_CLEAR_LIP_RESET BIT_5 | |
739 | #define NOTIFY_ACK_TM_RESP_CODE_VALID BIT_4 | |
740 | ||
741 | /* Command's states */ | |
742 | #define QLA_TGT_STATE_NEW 0 /* New command + target processing */ | |
743 | #define QLA_TGT_STATE_NEED_DATA 1 /* target needs data to continue */ | |
744 | #define QLA_TGT_STATE_DATA_IN 2 /* Data arrived + target processing */ | |
745 | #define QLA_TGT_STATE_PROCESSED 3 /* target done processing */ | |
193b50b9 | 746 | |
2d70c103 NB |
747 | |
748 | /* Special handles */ | |
749 | #define QLA_TGT_NULL_HANDLE 0 | |
750 | #define QLA_TGT_SKIP_HANDLE (0xFFFFFFFF & ~CTIO_COMPLETION_HANDLE_MARK) | |
751 | ||
752 | /* ATIO task_codes field */ | |
753 | #define ATIO_SIMPLE_QUEUE 0 | |
754 | #define ATIO_HEAD_OF_QUEUE 1 | |
755 | #define ATIO_ORDERED_QUEUE 2 | |
756 | #define ATIO_ACA_QUEUE 4 | |
757 | #define ATIO_UNTAGGED 5 | |
758 | ||
759 | /* TM failed response codes, see FCP (9.4.11 FCP_RSP_INFO) */ | |
760 | #define FC_TM_SUCCESS 0 | |
761 | #define FC_TM_BAD_FCP_DATA 1 | |
762 | #define FC_TM_BAD_CMD 2 | |
763 | #define FC_TM_FCP_DATA_MISMATCH 3 | |
764 | #define FC_TM_REJECT 4 | |
765 | #define FC_TM_FAILED 5 | |
766 | ||
2d70c103 NB |
767 | #if (BITS_PER_LONG > 32) || defined(CONFIG_HIGHMEM64G) |
768 | #define pci_dma_lo32(a) (a & 0xffffffff) | |
769 | #define pci_dma_hi32(a) ((((a) >> 16)>>16) & 0xffffffff) | |
770 | #else | |
771 | #define pci_dma_lo32(a) (a & 0xffffffff) | |
772 | #define pci_dma_hi32(a) 0 | |
773 | #endif | |
774 | ||
775 | #define QLA_TGT_SENSE_VALID(sense) ((sense != NULL) && \ | |
776 | (((const uint8_t *)(sense))[0] & 0x70) == 0x70) | |
777 | ||
778 | struct qla_port_24xx_data { | |
779 | uint8_t port_name[WWN_SIZE]; | |
780 | uint16_t loop_id; | |
781 | uint16_t reserved; | |
782 | }; | |
783 | ||
784 | struct qla_tgt { | |
785 | struct scsi_qla_host *vha; | |
786 | struct qla_hw_data *ha; | |
787 | ||
788 | /* | |
789 | * To sync between IRQ handlers and qlt_target_release(). Needed, | |
790 | * because req_pkt() can drop/reaquire HW lock inside. Protected by | |
791 | * HW lock. | |
792 | */ | |
793 | int irq_cmd_count; | |
2f424b9b | 794 | int atio_irq_cmd_count; |
2d70c103 NB |
795 | |
796 | int datasegs_per_cmd, datasegs_per_cont, sg_tablesize; | |
797 | ||
798 | /* Target's flags, serialized by pha->hardware_lock */ | |
799 | unsigned int tgt_enable_64bit_addr:1; /* 64-bits PCI addr enabled */ | |
800 | unsigned int link_reinit_iocb_pending:1; | |
801 | ||
802 | /* | |
803 | * Protected by tgt_mutex AND hardware_lock for writing and tgt_mutex | |
804 | * OR hardware_lock for reading. | |
805 | */ | |
806 | int tgt_stop; /* the target mode driver is being stopped */ | |
807 | int tgt_stopped; /* the target mode driver has been stopped */ | |
808 | ||
809 | /* Count of sessions refering qla_tgt. Protected by hardware_lock. */ | |
810 | int sess_count; | |
811 | ||
2d70c103 NB |
812 | /* Protected by hardware_lock */ |
813 | struct list_head del_sess_list; | |
2d70c103 NB |
814 | |
815 | spinlock_t sess_work_lock; | |
816 | struct list_head sess_works_list; | |
817 | struct work_struct sess_work; | |
818 | ||
819 | struct imm_ntfy_from_isp link_reinit_iocb; | |
820 | wait_queue_head_t waitQ; | |
821 | int notify_ack_expected; | |
822 | int abts_resp_expected; | |
823 | int modify_lun_expected; | |
2d70c103 | 824 | atomic_t tgt_global_resets_count; |
2d70c103 NB |
825 | struct list_head tgt_list_entry; |
826 | }; | |
827 | ||
51a07f84 NB |
828 | struct qla_tgt_sess_op { |
829 | struct scsi_qla_host *vha; | |
2f424b9b | 830 | uint32_t chip_reset; |
51a07f84 NB |
831 | struct atio_from_isp atio; |
832 | struct work_struct work; | |
8b2f5ff3 SN |
833 | struct list_head cmd_list; |
834 | bool aborted; | |
51a07f84 NB |
835 | }; |
836 | ||
1eb42f96 QT |
837 | enum trace_flags { |
838 | TRC_NEW_CMD = BIT_0, | |
839 | TRC_DO_WORK = BIT_1, | |
840 | TRC_DO_WORK_ERR = BIT_2, | |
841 | TRC_XFR_RDY = BIT_3, | |
842 | TRC_XMIT_DATA = BIT_4, | |
843 | TRC_XMIT_STATUS = BIT_5, | |
844 | TRC_SRR_RSP = BIT_6, | |
845 | TRC_SRR_XRDY = BIT_7, | |
846 | TRC_SRR_TERM = BIT_8, | |
847 | TRC_SRR_CTIO = BIT_9, | |
848 | TRC_FLUSH = BIT_10, | |
849 | TRC_CTIO_ERR = BIT_11, | |
850 | TRC_CTIO_DONE = BIT_12, | |
851 | TRC_CTIO_ABORTED = BIT_13, | |
852 | TRC_CTIO_STRANGE= BIT_14, | |
853 | TRC_CMD_DONE = BIT_15, | |
854 | TRC_CMD_CHK_STOP = BIT_16, | |
855 | TRC_CMD_FREE = BIT_17, | |
856 | TRC_DATA_IN = BIT_18, | |
857 | TRC_ABORT = BIT_19, | |
be25152c | 858 | TRC_DIF_ERR = BIT_20, |
1eb42f96 | 859 | }; |
a07100e0 | 860 | |
2d70c103 | 861 | struct qla_tgt_cmd { |
f83adb61 | 862 | struct se_cmd se_cmd; |
5d964837 | 863 | struct fc_port *sess; |
2d70c103 | 864 | int state; |
2d70c103 NB |
865 | struct work_struct free_work; |
866 | struct work_struct work; | |
867 | /* Sense buffer that will be mapped into outgoing status */ | |
868 | unsigned char sense_buffer[TRANSPORT_SENSE_BUFFER]; | |
869 | ||
a07100e0 | 870 | spinlock_t cmd_lock; |
2d70c103 NB |
871 | /* to save extra sess dereferences */ |
872 | unsigned int conf_compl_supported:1; | |
873 | unsigned int sg_mapped:1; | |
874 | unsigned int free_sg:1; | |
2d70c103 | 875 | unsigned int write_data_transferred:1; |
33e79977 QT |
876 | unsigned int q_full:1; |
877 | unsigned int term_exchg:1; | |
d564a372 | 878 | unsigned int cmd_sent_to_fw:1; |
e07f8f65 | 879 | unsigned int cmd_in_wq:1; |
193b50b9 | 880 | unsigned int aborted:1; |
1eb42f96 QT |
881 | unsigned int data_work:1; |
882 | unsigned int data_work_free:1; | |
2d70c103 NB |
883 | |
884 | struct scatterlist *sg; /* cmd data buffer SG vector */ | |
885 | int sg_cnt; /* SG segments count */ | |
886 | int bufflen; /* cmd buffer length */ | |
887 | int offset; | |
2d70c103 NB |
888 | uint32_t unpacked_lun; |
889 | enum dma_data_direction dma_data_direction; | |
b6a029e1 | 890 | uint32_t reset_count; |
2d70c103 NB |
891 | |
892 | uint16_t loop_id; /* to save extra sess dereferences */ | |
893 | struct qla_tgt *tgt; /* to save extra sess dereferences */ | |
894 | struct scsi_qla_host *vha; | |
33e79977 | 895 | struct list_head cmd_list; |
2d70c103 NB |
896 | |
897 | struct atio_from_isp atio; | |
be25152c QT |
898 | |
899 | uint8_t ctx_dsd_alloced; | |
900 | ||
901 | /* T10-DIF */ | |
902 | #define DIF_ERR_NONE 0 | |
903 | #define DIF_ERR_GRD 1 | |
904 | #define DIF_ERR_REF 2 | |
905 | #define DIF_ERR_APP 3 | |
906 | int8_t dif_err_code; | |
f83adb61 QT |
907 | struct scatterlist *prot_sg; |
908 | uint32_t prot_sg_cnt; | |
be25152c QT |
909 | uint32_t blk_sz, num_blks; |
910 | uint8_t scsi_status, sense_key, asc, ascq; | |
911 | ||
f83adb61 | 912 | struct crc_context *ctx; |
be25152c QT |
913 | uint8_t *cdb; |
914 | uint64_t lba; | |
915 | uint16_t a_guard, e_guard, a_app_tag, e_app_tag; | |
916 | uint32_t a_ref_tag, e_ref_tag; | |
f83adb61 | 917 | |
e07f8f65 SK |
918 | uint64_t jiffies_at_alloc; |
919 | uint64_t jiffies_at_free; | |
a07100e0 | 920 | |
1eb42f96 | 921 | enum trace_flags trc_flags; |
2d70c103 NB |
922 | }; |
923 | ||
924 | struct qla_tgt_sess_work_param { | |
925 | struct list_head sess_works_list_entry; | |
926 | ||
927 | #define QLA_TGT_SESS_WORK_ABORT 1 | |
928 | #define QLA_TGT_SESS_WORK_TM 2 | |
929 | int type; | |
930 | ||
931 | union { | |
932 | struct abts_recv_from_24xx abts; | |
933 | struct imm_ntfy_from_isp tm_iocb; | |
934 | struct atio_from_isp tm_iocb2; | |
935 | }; | |
936 | }; | |
937 | ||
938 | struct qla_tgt_mgmt_cmd { | |
be92fc3f | 939 | uint16_t tmr_func; |
2d70c103 | 940 | uint8_t fc_tm_rsp; |
5d964837 | 941 | struct fc_port *sess; |
2d70c103 NB |
942 | struct se_cmd se_cmd; |
943 | struct work_struct free_work; | |
944 | unsigned int flags; | |
b6a029e1 | 945 | uint32_t reset_count; |
2d70c103 NB |
946 | #define QLA24XX_MGMT_SEND_NACK 1 |
947 | union { | |
948 | struct atio_from_isp atio; | |
949 | struct imm_ntfy_from_isp imm_ntfy; | |
950 | struct abts_recv_from_24xx abts; | |
951 | } __packed orig_iocb; | |
952 | }; | |
953 | ||
954 | struct qla_tgt_prm { | |
955 | struct qla_tgt_cmd *cmd; | |
956 | struct qla_tgt *tgt; | |
957 | void *pkt; | |
958 | struct scatterlist *sg; /* cmd data buffer SG vector */ | |
db3a99b9 | 959 | unsigned char *sense_buffer; |
2d70c103 NB |
960 | int seg_cnt; |
961 | int req_cnt; | |
962 | uint16_t rq_result; | |
963 | uint16_t scsi_status; | |
2d70c103 NB |
964 | int sense_buffer_len; |
965 | int residual; | |
966 | int add_status_pkt; | |
f83adb61 QT |
967 | /* dif */ |
968 | struct scatterlist *prot_sg; | |
969 | uint16_t prot_seg_cnt; | |
970 | uint16_t tot_dsds; | |
2d70c103 NB |
971 | }; |
972 | ||
a6ca8878 AP |
973 | /* Check for Switch reserved address */ |
974 | #define IS_SW_RESV_ADDR(_s_id) \ | |
975 | ((_s_id.b.domain == 0xff) && (_s_id.b.area == 0xfc)) | |
976 | ||
2d70c103 NB |
977 | #define QLA_TGT_XMIT_DATA 1 |
978 | #define QLA_TGT_XMIT_STATUS 2 | |
979 | #define QLA_TGT_XMIT_ALL (QLA_TGT_XMIT_STATUS|QLA_TGT_XMIT_DATA) | |
980 | ||
2d70c103 NB |
981 | |
982 | extern struct qla_tgt_data qla_target; | |
2d70c103 NB |
983 | |
984 | /* | |
985 | * Function prototypes for qla_target.c logic used by qla2xxx LLD code. | |
986 | */ | |
987 | extern int qlt_add_target(struct qla_hw_data *, struct scsi_qla_host *); | |
988 | extern int qlt_remove_target(struct qla_hw_data *, struct scsi_qla_host *); | |
49a47f2c NB |
989 | extern int qlt_lport_register(void *, u64, u64, u64, |
990 | int (*callback)(struct scsi_qla_host *, void *, u64, u64)); | |
2d70c103 | 991 | extern void qlt_lport_deregister(struct scsi_qla_host *); |
5d964837 | 992 | extern void qlt_unreg_sess(struct fc_port *); |
2d70c103 | 993 | extern void qlt_fc_port_added(struct scsi_qla_host *, fc_port_t *); |
df673274 | 994 | extern void qlt_fc_port_deleted(struct scsi_qla_host *, fc_port_t *, int); |
2d70c103 NB |
995 | extern int __init qlt_init(void); |
996 | extern void qlt_exit(void); | |
997 | extern void qlt_update_vp_map(struct scsi_qla_host *, int); | |
998 | ||
999 | /* | |
1000 | * This macro is used during early initializations when host->active_mode | |
1001 | * is not set. Right now, ha value is ignored. | |
1002 | */ | |
1003 | #define QLA_TGT_MODE_ENABLED() (ql2x_ini_mode != QLA2XXX_INI_MODE_ENABLED) | |
ead03855 | 1004 | |
aa230bc5 | 1005 | extern int ql2x_ini_mode; |
2d70c103 NB |
1006 | |
1007 | static inline bool qla_tgt_mode_enabled(struct scsi_qla_host *ha) | |
1008 | { | |
726b8548 | 1009 | return ha->host->active_mode == MODE_TARGET; |
2d70c103 NB |
1010 | } |
1011 | ||
1012 | static inline bool qla_ini_mode_enabled(struct scsi_qla_host *ha) | |
1013 | { | |
726b8548 QT |
1014 | return ha->host->active_mode == MODE_INITIATOR; |
1015 | } | |
1016 | ||
1017 | static inline bool qla_dual_mode_enabled(struct scsi_qla_host *ha) | |
1018 | { | |
1019 | return (ha->host->active_mode == MODE_DUAL); | |
2d70c103 NB |
1020 | } |
1021 | ||
8b2f5ff3 SN |
1022 | static inline uint32_t sid_to_key(const uint8_t *s_id) |
1023 | { | |
1024 | uint32_t key; | |
1025 | ||
1026 | key = (((unsigned long)s_id[0] << 16) | | |
1027 | ((unsigned long)s_id[1] << 8) | | |
1028 | (unsigned long)s_id[2]); | |
1029 | return key; | |
1030 | } | |
1031 | ||
71cdc079 AP |
1032 | static inline void sid_to_portid(const uint8_t *s_id, port_id_t *p) |
1033 | { | |
1034 | memset(p, 0, sizeof(*p)); | |
1035 | p->b.domain = s_id[0]; | |
1036 | p->b.area = s_id[1]; | |
1037 | p->b.al_pa = s_id[2]; | |
1038 | } | |
1039 | ||
2d70c103 NB |
1040 | /* |
1041 | * Exported symbols from qla_target.c LLD logic used by qla2xxx code.. | |
1042 | */ | |
2d70c103 NB |
1043 | extern void qlt_response_pkt_all_vps(struct scsi_qla_host *, response_t *); |
1044 | extern int qlt_rdy_to_xfer(struct qla_tgt_cmd *); | |
1045 | extern int qlt_xmit_response(struct qla_tgt_cmd *, int, uint8_t); | |
a07100e0 | 1046 | extern int qlt_abort_cmd(struct qla_tgt_cmd *); |
2d70c103 NB |
1047 | extern void qlt_xmit_tm_rsp(struct qla_tgt_mgmt_cmd *); |
1048 | extern void qlt_free_mcmd(struct qla_tgt_mgmt_cmd *); | |
1049 | extern void qlt_free_cmd(struct qla_tgt_cmd *cmd); | |
2d70c103 NB |
1050 | extern void qlt_async_event(uint16_t, struct scsi_qla_host *, uint16_t *); |
1051 | extern void qlt_enable_vha(struct scsi_qla_host *); | |
1052 | extern void qlt_vport_create(struct scsi_qla_host *, struct qla_hw_data *); | |
1053 | extern void qlt_rff_id(struct scsi_qla_host *, struct ct_sns_req *); | |
1054 | extern void qlt_init_atio_q_entries(struct scsi_qla_host *); | |
2f424b9b | 1055 | extern void qlt_24xx_process_atio_queue(struct scsi_qla_host *, uint8_t); |
aa230bc5 | 1056 | extern void qlt_24xx_config_rings(struct scsi_qla_host *); |
2d70c103 NB |
1057 | extern void qlt_24xx_config_nvram_stage1(struct scsi_qla_host *, |
1058 | struct nvram_24xx *); | |
1059 | extern void qlt_24xx_config_nvram_stage2(struct scsi_qla_host *, | |
1060 | struct init_cb_24xx *); | |
aa230bc5 AE |
1061 | extern void qlt_81xx_config_nvram_stage2(struct scsi_qla_host *, |
1062 | struct init_cb_81xx *); | |
1063 | extern void qlt_81xx_config_nvram_stage1(struct scsi_qla_host *, | |
1064 | struct nvram_81xx *); | |
2d70c103 NB |
1065 | extern int qlt_24xx_process_response_error(struct scsi_qla_host *, |
1066 | struct sts_entry_24xx *); | |
1067 | extern void qlt_modify_vp_config(struct scsi_qla_host *, | |
1068 | struct vp_config_entry_24xx *); | |
1069 | extern void qlt_probe_one_stage1(struct scsi_qla_host *, struct qla_hw_data *); | |
1070 | extern int qlt_mem_alloc(struct qla_hw_data *); | |
1071 | extern void qlt_mem_free(struct qla_hw_data *); | |
3c231bda | 1072 | extern int qlt_stop_phase1(struct qla_tgt *); |
2d70c103 | 1073 | extern void qlt_stop_phase2(struct qla_tgt *); |
aa230bc5 AE |
1074 | extern irqreturn_t qla83xx_msix_atio_q(int, void *); |
1075 | extern void qlt_83xx_iospace_config(struct qla_hw_data *); | |
33e79977 | 1076 | extern int qlt_free_qfull_cmds(struct scsi_qla_host *); |
a6ca8878 | 1077 | extern void qlt_logo_completion_handler(fc_port_t *, int); |
df673274 | 1078 | extern void qlt_do_generation_tick(struct scsi_qla_host *, int *); |
2d70c103 | 1079 | |
be25152c QT |
1080 | void qlt_send_resp_ctio(scsi_qla_host_t *, struct qla_tgt_cmd *, uint8_t, |
1081 | uint8_t, uint8_t, uint8_t); | |
1082 | ||
2d70c103 | 1083 | #endif /* __QLA_TARGET_H */ |