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[SCSI] qla2xxx: Display nport_id when any SNS command fails.
[linux-2.6-block.git] / drivers / scsi / qla2xxx / qla_os.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
de7c5d05 3 * Copyright (c) 2003-2010 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT		 6 */
7#include "qla_def.h"
8
9#include <linux/moduleparam.h>
10#include <linux/vmalloc.h>
1da177e4 11#include <linux/delay.h>
39a11240 12#include <linux/kthread.h>
e1e82b6f 13#include <linux/mutex.h>
3420d36c 14#include <linux/kobject.h>
5a0e3ad6 15#include <linux/slab.h>
1da177e4
LT		 16
17#include <scsi/scsi_tcq.h>
18#include <scsi/scsicam.h>
19#include <scsi/scsi_transport.h>
20#include <scsi/scsi_transport_fc.h>
21
22/*
23 * Driver version
24 */
25char qla2x00_version_str[40];
26
6a03b4cd
HZ		 27static int apidev_major;
28
1da177e4
LT		 29/*
30 * SRB allocation cache
31 */
e18b890b 32static struct kmem_cache *srb_cachep;
1da177e4 33
a9083016
GM		 34/*
35 * CT6 CTX allocation cache
36 */
37static struct kmem_cache *ctx_cachep;
38
1da177e4 39int ql2xlogintimeout = 20;
f2019cb1 40module_param(ql2xlogintimeout, int, S_IRUGO);
1da177e4
LT		 41MODULE_PARM_DESC(ql2xlogintimeout,
42 "Login timeout value in seconds.");
43
a7b61842 44int qlport_down_retry;
f2019cb1 45module_param(qlport_down_retry, int, S_IRUGO);
1da177e4 46MODULE_PARM_DESC(qlport_down_retry,
900d9f98 47 "Maximum number of command retries to a port that returns "
1da177e4
LT		 48 "a PORT-DOWN status.");
49
1da177e4
LT		 50int ql2xplogiabsentdevice;
51module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
52MODULE_PARM_DESC(ql2xplogiabsentdevice,
53 "Option to enable PLOGI to devices that are not present after "
900d9f98 54 "a Fabric scan. This is needed for several broken switches. "
1da177e4
LT		 55 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
56
1da177e4 57int ql2xloginretrycount = 0;
f2019cb1 58module_param(ql2xloginretrycount, int, S_IRUGO);
1da177e4
LT		 59MODULE_PARM_DESC(ql2xloginretrycount,
60 "Specify an alternate value for the NVRAM login retry count.");
61
a7a167bf 62int ql2xallocfwdump = 1;
f2019cb1 63module_param(ql2xallocfwdump, int, S_IRUGO);
a7a167bf
AV		 64MODULE_PARM_DESC(ql2xallocfwdump,
65 "Option to enable allocation of memory for a firmware dump "
66 "during HBA initialization. Memory allocation requirements "
67 "vary by ISP type. Default is 1 - allocate memory.");
68
11010fec 69int ql2xextended_error_logging;
27d94035 70module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
11010fec 71MODULE_PARM_DESC(ql2xextended_error_logging,
0181944f
AV		 72 "Option to enable extended error logging, "
73 "Default is 0 - no logging. 1 - log errors.");
74
a9083016 75int ql2xshiftctondsd = 6;
f2019cb1 76module_param(ql2xshiftctondsd, int, S_IRUGO);
a9083016
GM		 77MODULE_PARM_DESC(ql2xshiftctondsd,
78 "Set to control shifting of command type processing "
79 "based on total number of SG elements.");
80
1da177e4
LT		 81static void qla2x00_free_device(scsi_qla_host_t *);
82
7e47e5ca 83int ql2xfdmienable=1;
f2019cb1 84module_param(ql2xfdmienable, int, S_IRUGO);
cca5335c 85MODULE_PARM_DESC(ql2xfdmienable,
7794a5af
FW		 86 "Enables FDMI registrations. "
87 "0 - no FDMI. Default is 1 - perform FDMI.");
cca5335c 88
df7baa50
AV		 89#define MAX_Q_DEPTH 32
90static int ql2xmaxqdepth = MAX_Q_DEPTH;
91module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
92MODULE_PARM_DESC(ql2xmaxqdepth,
93 "Maximum queue depth to report for target devices.");
94
bad75002
AE		 95/* Do not change the value of this after module load */
96int ql2xenabledif = 1;
97module_param(ql2xenabledif, int, S_IRUGO|S_IWUSR);
98MODULE_PARM_DESC(ql2xenabledif,
99 " Enable T10-CRC-DIF "
100 " Default is 0 - No DIF Support. 1 - Enable it");
101
102int ql2xenablehba_err_chk;
103module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
104MODULE_PARM_DESC(ql2xenablehba_err_chk,
105 " Enable T10-CRC-DIF Error isolation by HBA"
106 " Default is 0 - Error isolation disabled, 1 - Enable it");
107
e5896bd5 108int ql2xiidmaenable=1;
f2019cb1 109module_param(ql2xiidmaenable, int, S_IRUGO);
e5896bd5
AV		 110MODULE_PARM_DESC(ql2xiidmaenable,
111 "Enables iIDMA settings "
112 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
113
73208dfd 114int ql2xmaxqueues = 1;
f2019cb1 115module_param(ql2xmaxqueues, int, S_IRUGO);
73208dfd
AC		 116MODULE_PARM_DESC(ql2xmaxqueues,
117 "Enables MQ settings "
ae68230c
JP		 118 "Default is 1 for single queue. Set it to number "
119 "of queues in MQ mode.");
68ca949c
AC		 120
121int ql2xmultique_tag;
f2019cb1 122module_param(ql2xmultique_tag, int, S_IRUGO);
68ca949c
AC		 123MODULE_PARM_DESC(ql2xmultique_tag,
124 "Enables CPU affinity settings for the driver "
125 "Default is 0 for no affinity of request and response IO. "
126 "Set it to 1 to turn on the cpu affinity.");
e337d907
AV		 127
128int ql2xfwloadbin;
f2019cb1 129module_param(ql2xfwloadbin, int, S_IRUGO);
e337d907
AV		 130MODULE_PARM_DESC(ql2xfwloadbin,
131 "Option to specify location from which to load ISP firmware:\n"
132 " 2 -- load firmware via the request_firmware() (hotplug)\n"
133 " interface.\n"
134 " 1 -- load firmware from flash.\n"
135 " 0 -- use default semantics.\n");
136
ae97c91e 137int ql2xetsenable;
f2019cb1 138module_param(ql2xetsenable, int, S_IRUGO);
ae97c91e
AV		 139MODULE_PARM_DESC(ql2xetsenable,
140 "Enables firmware ETS burst."
141 "Default is 0 - skip ETS enablement.");
142
6907869d 143int ql2xdbwr = 1;
f2019cb1 144module_param(ql2xdbwr, int, S_IRUGO);
a9083016
GM		 145MODULE_PARM_DESC(ql2xdbwr,
146 "Option to specify scheme for request queue posting\n"
147 " 0 -- Regular doorbell.\n"
148 " 1 -- CAMRAM doorbell (faster).\n");
149
f4c496c1 150int ql2xtargetreset = 1;
f2019cb1 151module_param(ql2xtargetreset, int, S_IRUGO);
f4c496c1
GM		 152MODULE_PARM_DESC(ql2xtargetreset,
153 "Enable target reset."
154 "Default is 1 - use hw defaults.");
155
4da26e16 156int ql2xgffidenable;
f2019cb1 157module_param(ql2xgffidenable, int, S_IRUGO);
4da26e16
CD		 158MODULE_PARM_DESC(ql2xgffidenable,
159 "Enables GFF_ID checks of port type. "
160 "Default is 0 - Do not use GFF_ID information.");
a9083016 161
3822263e 162int ql2xasynctmfenable;
f2019cb1 163module_param(ql2xasynctmfenable, int, S_IRUGO);
3822263e
MI		 164MODULE_PARM_DESC(ql2xasynctmfenable,
165 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
166 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
1da177e4 167/*
fa2a1ce5 168 * SCSI host template entry points
1da177e4
LT		 169 */
170static int qla2xxx_slave_configure(struct scsi_device * device);
f4f051eb 171static int qla2xxx_slave_alloc(struct scsi_device *);
1e99e33a
AV		 172static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
173static void qla2xxx_scan_start(struct Scsi_Host *);
f4f051eb 174static void qla2xxx_slave_destroy(struct scsi_device *);
f281233d 175static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
1da177e4
LT		 176static int qla2xxx_eh_abort(struct scsi_cmnd *);
177static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
523ec773 178static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
1da177e4
LT		 179static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
180static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
1da177e4 181
e881a172 182static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
ce7e4af7
AV		 183static int qla2x00_change_queue_type(struct scsi_device *, int);
184
a5326f86 185struct scsi_host_template qla2xxx_driver_template = {
1da177e4 186 .module = THIS_MODULE,
cb63067a 187 .name = QLA2XXX_DRIVER_NAME,
a5326f86 188 .queuecommand = qla2xxx_queuecommand,
fca29703
AV		 189
190 .eh_abort_handler = qla2xxx_eh_abort,
191 .eh_device_reset_handler = qla2xxx_eh_device_reset,
523ec773 192 .eh_target_reset_handler = qla2xxx_eh_target_reset,
fca29703
AV		 193 .eh_bus_reset_handler = qla2xxx_eh_bus_reset,
194 .eh_host_reset_handler = qla2xxx_eh_host_reset,
195
196 .slave_configure = qla2xxx_slave_configure,
197
198 .slave_alloc = qla2xxx_slave_alloc,
199 .slave_destroy = qla2xxx_slave_destroy,
ed677086
AV		 200 .scan_finished = qla2xxx_scan_finished,
201 .scan_start = qla2xxx_scan_start,
ce7e4af7
AV		 202 .change_queue_depth = qla2x00_change_queue_depth,
203 .change_queue_type = qla2x00_change_queue_type,
fca29703
AV		 204 .this_id = -1,
205 .cmd_per_lun = 3,
206 .use_clustering = ENABLE_CLUSTERING,
207 .sg_tablesize = SG_ALL,
208
209 .max_sectors = 0xFFFF,
afb046e2 210 .shost_attrs = qla2x00_host_attrs,
fca29703
AV		 211};
212
1da177e4 213static struct scsi_transport_template *qla2xxx_transport_template = NULL;
2c3dfe3f 214struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
1da177e4 215
1da177e4
LT		 216/* TODO Convert to inlines
217 *
218 * Timer routines
219 */
1da177e4 220
2c3dfe3f 221__inline__ void
e315cd28 222qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
1da177e4 223{
e315cd28
AC		 224 init_timer(&vha->timer);
225 vha->timer.expires = jiffies + interval * HZ;
226 vha->timer.data = (unsigned long)vha;
227 vha->timer.function = (void (*)(unsigned long))func;
228 add_timer(&vha->timer);
229 vha->timer_active = 1;
1da177e4
LT		 230}
231
232static inline void
e315cd28 233qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
1da177e4 234{
a9083016
GM		 235 /* Currently used for 82XX only. */
236 if (vha->device_flags & DFLG_DEV_FAILED)
237 return;
238
e315cd28 239 mod_timer(&vha->timer, jiffies + interval * HZ);
1da177e4
LT		 240}
241
a824ebb3 242static __inline__ void
e315cd28 243qla2x00_stop_timer(scsi_qla_host_t *vha)
1da177e4 244{
e315cd28
AC		 245 del_timer_sync(&vha->timer);
246 vha->timer_active = 0;
1da177e4
LT		 247}
248
1da177e4
LT		 249static int qla2x00_do_dpc(void *data);
250
251static void qla2x00_rst_aen(scsi_qla_host_t *);
252
73208dfd
AC		 253static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
254 struct req_que **, struct rsp_que **);
e30d1756 255static void qla2x00_free_fw_dump(struct qla_hw_data *);
e315cd28
AC		 256static void qla2x00_mem_free(struct qla_hw_data *);
257static void qla2x00_sp_free_dma(srb_t *);
1da177e4 258
1da177e4 259/* -------------------------------------------------------------------------- */
73208dfd
AC		 260static int qla2x00_alloc_queues(struct qla_hw_data *ha)
261{
2afa19a9 262 ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
73208dfd
AC		 263 GFP_KERNEL);
264 if (!ha->req_q_map) {
265 qla_printk(KERN_WARNING, ha,
266 "Unable to allocate memory for request queue ptrs\n");
267 goto fail_req_map;
268 }
269
2afa19a9 270 ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
73208dfd
AC		 271 GFP_KERNEL);
272 if (!ha->rsp_q_map) {
273 qla_printk(KERN_WARNING, ha,
274 "Unable to allocate memory for response queue ptrs\n");
275 goto fail_rsp_map;
276 }
277 set_bit(0, ha->rsp_qid_map);
278 set_bit(0, ha->req_qid_map);
279 return 1;
280
281fail_rsp_map:
282 kfree(ha->req_q_map);
283 ha->req_q_map = NULL;
284fail_req_map:
285 return -ENOMEM;
286}
287
2afa19a9 288static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
73208dfd 289{
73208dfd
AC		 290 if (req && req->ring)
291 dma_free_coherent(&ha->pdev->dev,
292 (req->length + 1) * sizeof(request_t),
293 req->ring, req->dma);
294
295 kfree(req);
296 req = NULL;
297}
298
2afa19a9
AC		 299static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
300{
301 if (rsp && rsp->ring)
302 dma_free_coherent(&ha->pdev->dev,
303 (rsp->length + 1) * sizeof(response_t),
304 rsp->ring, rsp->dma);
305
306 kfree(rsp);
307 rsp = NULL;
308}
309
73208dfd
AC		 310static void qla2x00_free_queues(struct qla_hw_data *ha)
311{
312 struct req_que *req;
313 struct rsp_que *rsp;
314 int cnt;
315
2afa19a9 316 for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
73208dfd 317 req = ha->req_q_map[cnt];
2afa19a9 318 qla2x00_free_req_que(ha, req);
73208dfd 319 }
73208dfd
AC		 320 kfree(ha->req_q_map);
321 ha->req_q_map = NULL;
2afa19a9
AC		 322
323 for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
324 rsp = ha->rsp_q_map[cnt];
325 qla2x00_free_rsp_que(ha, rsp);
326 }
327 kfree(ha->rsp_q_map);
328 ha->rsp_q_map = NULL;
73208dfd
AC		 329}
330
68ca949c
AC		 331static int qla25xx_setup_mode(struct scsi_qla_host *vha)
332{
333 uint16_t options = 0;
334 int ques, req, ret;
335 struct qla_hw_data *ha = vha->hw;
336
7163ea81
AC		 337 if (!(ha->fw_attributes & BIT_6)) {
338 qla_printk(KERN_INFO, ha,
339 "Firmware is not multi-queue capable\n");
340 goto fail;
341 }
68ca949c 342 if (ql2xmultique_tag) {
68ca949c
AC		 343 /* create a request queue for IO */
344 options |= BIT_7;
345 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
346 QLA_DEFAULT_QUE_QOS);
347 if (!req) {
348 qla_printk(KERN_WARNING, ha,
349 "Can't create request queue\n");
350 goto fail;
351 }
7163ea81 352 ha->wq = create_workqueue("qla2xxx_wq");
68ca949c
AC		 353 vha->req = ha->req_q_map[req];
354 options |= BIT_1;
355 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
356 ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
357 if (!ret) {
358 qla_printk(KERN_WARNING, ha,
359 "Response Queue create failed\n");
360 goto fail2;
361 }
362 }
7163ea81
AC		 363 ha->flags.cpu_affinity_enabled = 1;
364
68ca949c
AC		 365 DEBUG2(qla_printk(KERN_INFO, ha,
366 "CPU affinity mode enabled, no. of response"
367 " queues:%d, no. of request queues:%d\n",
368 ha->max_rsp_queues, ha->max_req_queues));
369 }
370 return 0;
371fail2:
372 qla25xx_delete_queues(vha);
7163ea81
AC		 373 destroy_workqueue(ha->wq);
374 ha->wq = NULL;
68ca949c
AC		 375fail:
376 ha->mqenable = 0;
7163ea81
AC		 377 kfree(ha->req_q_map);
378 kfree(ha->rsp_q_map);
379 ha->max_req_queues = ha->max_rsp_queues = 1;
68ca949c
AC		 380 return 1;
381}
382
1da177e4 383static char *
e315cd28 384qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
1da177e4 385{
e315cd28 386 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 387 static char *pci_bus_modes[] = {
388 "33", "66", "100", "133",
389 };
390 uint16_t pci_bus;
391
392 strcpy(str, "PCI");
393 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
394 if (pci_bus) {
395 strcat(str, "-X (");
396 strcat(str, pci_bus_modes[pci_bus]);
397 } else {
398 pci_bus = (ha->pci_attr & BIT_8) >> 8;
399 strcat(str, " (");
400 strcat(str, pci_bus_modes[pci_bus]);
401 }
402 strcat(str, " MHz)");
403
404 return (str);
405}
406
fca29703 407static char *
e315cd28 408qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
fca29703
AV		 409{
410 static char *pci_bus_modes[] = { "33", "66", "100", "133", };
e315cd28 411 struct qla_hw_data *ha = vha->hw;
fca29703
AV		 412 uint32_t pci_bus;
413 int pcie_reg;
414
415 pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
416 if (pcie_reg) {
417 char lwstr[6];
418 uint16_t pcie_lstat, lspeed, lwidth;
419
420 pcie_reg += 0x12;
421 pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
422 lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
423 lwidth = (pcie_lstat &
424 (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
425
426 strcpy(str, "PCIe (");
427 if (lspeed == 1)
c87a0d8c 428 strcat(str, "2.5GT/s ");
c3a2f0df 429 else if (lspeed == 2)
c87a0d8c 430 strcat(str, "5.0GT/s ");
fca29703
AV		 431 else
432 strcat(str, "<unknown> ");
433 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
434 strcat(str, lwstr);
435
436 return str;
437 }
438
439 strcpy(str, "PCI");
440 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
441 if (pci_bus == 0 || pci_bus == 8) {
442 strcat(str, " (");
443 strcat(str, pci_bus_modes[pci_bus >> 3]);
444 } else {
445 strcat(str, "-X ");
446 if (pci_bus & BIT_2)
447 strcat(str, "Mode 2");
448 else
449 strcat(str, "Mode 1");
450 strcat(str, " (");
451 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
452 }
453 strcat(str, " MHz)");
454
455 return str;
456}
457
e5f82ab8 458static char *
e315cd28 459qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
1da177e4
LT		 460{
461 char un_str[10];
e315cd28 462 struct qla_hw_data *ha = vha->hw;
fa2a1ce5 463
1da177e4
LT		 464 sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
465 ha->fw_minor_version,
466 ha->fw_subminor_version);
467
468 if (ha->fw_attributes & BIT_9) {
469 strcat(str, "FLX");
470 return (str);
471 }
472
473 switch (ha->fw_attributes & 0xFF) {
474 case 0x7:
475 strcat(str, "EF");
476 break;
477 case 0x17:
478 strcat(str, "TP");
479 break;
480 case 0x37:
481 strcat(str, "IP");
482 break;
483 case 0x77:
484 strcat(str, "VI");
485 break;
486 default:
487 sprintf(un_str, "(%x)", ha->fw_attributes);
488 strcat(str, un_str);
489 break;
490 }
491 if (ha->fw_attributes & 0x100)
492 strcat(str, "X");
493
494 return (str);
495}
496
e5f82ab8 497static char *
e315cd28 498qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
fca29703 499{
e315cd28 500 struct qla_hw_data *ha = vha->hw;
f0883ac6 501
3a03eb79
AV		 502 sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
503 ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
fca29703 504 return str;
fca29703
AV		 505}
506
507static inline srb_t *
e315cd28 508qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport,
f5e3e40b 509 struct scsi_cmnd *cmd)
fca29703
AV		 510{
511 srb_t *sp;
e315cd28 512 struct qla_hw_data *ha = vha->hw;
fca29703
AV		 513
514 sp = mempool_alloc(ha->srb_mempool, GFP_ATOMIC);
515 if (!sp)
516 return sp;
517
083a469d 518 atomic_set(&sp->ref_count, 1);
fca29703
AV		 519 sp->fcport = fcport;
520 sp->cmd = cmd;
521 sp->flags = 0;
522 CMD_SP(cmd) = (void *)sp;
cf53b069 523 sp->ctx = NULL;
fca29703
AV		 524
525 return sp;
526}
527
1da177e4 528static int
f5e3e40b 529qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
fca29703 530{
e315cd28 531 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
fca29703 532 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
19a7b4ae 533 struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
e315cd28
AC		 534 struct qla_hw_data *ha = vha->hw;
535 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
fca29703
AV		 536 srb_t *sp;
537 int rval;
538
85880801
AV		 539 if (ha->flags.eeh_busy) {
540 if (ha->flags.pci_channel_io_perm_failure)
b9b12f73 541 cmd->result = DID_NO_CONNECT << 16;
85880801
AV		 542 else
543 cmd->result = DID_REQUEUE << 16;
14e660e6
SJ		 544 goto qc24_fail_command;
545 }
546
19a7b4ae
JSEC		 547 rval = fc_remote_port_chkready(rport);
548 if (rval) {
549 cmd->result = rval;
fca29703
AV		 550 goto qc24_fail_command;
551 }
552
bad75002
AE		 553 if (!vha->flags.difdix_supported &&
554 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
555 DEBUG2(qla_printk(KERN_ERR, ha,
556 "DIF Cap Not Reg, fail DIF capable cmd's:%x\n",
557 cmd->cmnd[0]));
558 cmd->result = DID_NO_CONNECT << 16;
559 goto qc24_fail_command;
560 }
fca29703
AV		 561 if (atomic_read(&fcport->state) != FCS_ONLINE) {
562 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
38170fa8
GM		 563 atomic_read(&fcport->state) == FCS_DEVICE_LOST ||
564 atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
fca29703
AV		 565 cmd->result = DID_NO_CONNECT << 16;
566 goto qc24_fail_command;
567 }
7b594131 568 goto qc24_target_busy;
fca29703
AV		 569 }
570
f5e3e40b 571 sp = qla2x00_get_new_sp(base_vha, fcport, cmd);
fca29703 572 if (!sp)
f5e3e40b 573 goto qc24_host_busy;
fca29703 574
e315cd28 575 rval = ha->isp_ops->start_scsi(sp);
fca29703
AV		 576 if (rval != QLA_SUCCESS)
577 goto qc24_host_busy_free_sp;
578
fca29703
AV		 579 return 0;
580
581qc24_host_busy_free_sp:
e315cd28
AC		 582 qla2x00_sp_free_dma(sp);
583 mempool_free(sp, ha->srb_mempool);
fca29703 584
f5e3e40b 585qc24_host_busy:
fca29703
AV		 586 return SCSI_MLQUEUE_HOST_BUSY;
587
7b594131
MC		 588qc24_target_busy:
589 return SCSI_MLQUEUE_TARGET_BUSY;
590
fca29703 591qc24_fail_command:
f5e3e40b 592 cmd->scsi_done(cmd);
fca29703
AV		 593
594 return 0;
595}
596
1da177e4
LT		 597/*
598 * qla2x00_eh_wait_on_command
599 * Waits for the command to be returned by the Firmware for some
600 * max time.
601 *
602 * Input:
1da177e4 603 * cmd = Scsi Command to wait on.
1da177e4
LT		 604 *
605 * Return:
606 * Not Found : 0
607 * Found : 1
608 */
609static int
e315cd28 610qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1da177e4 611{
fe74c71f
AV		 612#define ABORT_POLLING_PERIOD 1000
613#define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
f4f051eb 614 unsigned long wait_iter = ABORT_WAIT_ITER;
85880801
AV		 615 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
616 struct qla_hw_data *ha = vha->hw;
f4f051eb 617 int ret = QLA_SUCCESS;
1da177e4 618
85880801
AV		 619 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
620 DEBUG17(qla_printk(KERN_WARNING, ha, "return:eh_wait\n"));
621 return ret;
622 }
623
d970432c 624 while (CMD_SP(cmd) && wait_iter--) {
fe74c71f 625 msleep(ABORT_POLLING_PERIOD);
f4f051eb 626 }
627 if (CMD_SP(cmd))
628 ret = QLA_FUNCTION_FAILED;
1da177e4 629
f4f051eb 630 return ret;
1da177e4
LT		 631}
632
633/*
634 * qla2x00_wait_for_hba_online
fa2a1ce5 635 * Wait till the HBA is online after going through
1da177e4
LT		 636 * <= MAX_RETRIES_OF_ISP_ABORT or
637 * finally HBA is disabled ie marked offline
638 *
639 * Input:
640 * ha - pointer to host adapter structure
fa2a1ce5
AV		 641 *
642 * Note:
1da177e4
LT		 643 * Does context switching-Release SPIN_LOCK
644 * (if any) before calling this routine.
645 *
646 * Return:
647 * Success (Adapter is online) : 0
648 * Failed (Adapter is offline/disabled) : 1
649 */
854165f4 650int
e315cd28 651qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1da177e4 652{
fca29703
AV		 653 int return_status;
654 unsigned long wait_online;
e315cd28
AC		 655 struct qla_hw_data *ha = vha->hw;
656 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4 657
fa2a1ce5 658 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
e315cd28
AC		 659 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
660 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
661 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
662 ha->dpc_active) && time_before(jiffies, wait_online)) {
1da177e4
LT		 663
664 msleep(1000);
665 }
e315cd28 666 if (base_vha->flags.online)
fa2a1ce5 667 return_status = QLA_SUCCESS;
1da177e4
LT		 668 else
669 return_status = QLA_FUNCTION_FAILED;
670
1da177e4
LT		 671 return (return_status);
672}
673
86fbee86
LC		 674/*
675 * qla2x00_wait_for_reset_ready
676 * Wait till the HBA is online after going through
677 * <= MAX_RETRIES_OF_ISP_ABORT or
678 * finally HBA is disabled ie marked offline or flash
679 * operations are in progress.
680 *
681 * Input:
682 * ha - pointer to host adapter structure
683 *
684 * Note:
685 * Does context switching-Release SPIN_LOCK
686 * (if any) before calling this routine.
687 *
688 * Return:
689 * Success (Adapter is online/no flash ops) : 0
690 * Failed (Adapter is offline/disabled/flash ops in progress) : 1
691 */
3dbe756a 692static int
86fbee86
LC		 693qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
694{
695 int return_status;
696 unsigned long wait_online;
697 struct qla_hw_data *ha = vha->hw;
698 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
699
700 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
701 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
702 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
703 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
704 ha->optrom_state != QLA_SWAITING ||
705 ha->dpc_active) && time_before(jiffies, wait_online))
706 msleep(1000);
707
708 if (base_vha->flags.online && ha->optrom_state == QLA_SWAITING)
709 return_status = QLA_SUCCESS;
710 else
711 return_status = QLA_FUNCTION_FAILED;
712
713 DEBUG2(printk("%s return_status=%d\n", __func__, return_status));
714
715 return return_status;
716}
717
2533cf67
LC		 718int
719qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
720{
721 int return_status;
722 unsigned long wait_reset;
723 struct qla_hw_data *ha = vha->hw;
724 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
725
726 wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
727 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
728 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
729 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
730 ha->dpc_active) && time_before(jiffies, wait_reset)) {
731
732 msleep(1000);
733
734 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
735 ha->flags.chip_reset_done)
736 break;
737 }
738 if (ha->flags.chip_reset_done)
739 return_status = QLA_SUCCESS;
740 else
741 return_status = QLA_FUNCTION_FAILED;
742
743 return return_status;
744}
745
1da177e4
LT		 746/*
747 * qla2x00_wait_for_loop_ready
748 * Wait for MAX_LOOP_TIMEOUT(5 min) value for loop
fa2a1ce5 749 * to be in LOOP_READY state.
1da177e4
LT		 750 * Input:
751 * ha - pointer to host adapter structure
fa2a1ce5
AV		 752 *
753 * Note:
1da177e4
LT		 754 * Does context switching-Release SPIN_LOCK
755 * (if any) before calling this routine.
fa2a1ce5 756 *
1da177e4
LT		 757 *
758 * Return:
759 * Success (LOOP_READY) : 0
760 * Failed (LOOP_NOT_READY) : 1
761 */
fa2a1ce5 762static inline int
e315cd28 763qla2x00_wait_for_loop_ready(scsi_qla_host_t *vha)
1da177e4
LT		 764{
765 int return_status = QLA_SUCCESS;
766 unsigned long loop_timeout ;
e315cd28
AC		 767 struct qla_hw_data *ha = vha->hw;
768 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4
LT		 769
770 /* wait for 5 min at the max for loop to be ready */
fa2a1ce5 771 loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1da177e4 772
e315cd28
AC		 773 while ((!atomic_read(&base_vha->loop_down_timer) &&
774 atomic_read(&base_vha->loop_state) == LOOP_DOWN) ||
775 atomic_read(&base_vha->loop_state) != LOOP_READY) {
776 if (atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
57680080
RA		 777 return_status = QLA_FUNCTION_FAILED;
778 break;
779 }
1da177e4
LT		 780 msleep(1000);
781 if (time_after_eq(jiffies, loop_timeout)) {
782 return_status = QLA_FUNCTION_FAILED;
783 break;
784 }
785 }
fa2a1ce5 786 return (return_status);
1da177e4
LT		 787}
788
083a469d
GM		 789static void
790sp_get(struct srb *sp)
791{
792 atomic_inc(&sp->ref_count);
793}
794
1da177e4
LT		 795/**************************************************************************
796* qla2xxx_eh_abort
797*
798* Description:
799* The abort function will abort the specified command.
800*
801* Input:
802* cmd = Linux SCSI command packet to be aborted.
803*
804* Returns:
805* Either SUCCESS or FAILED.
806*
807* Note:
2ea00202 808* Only return FAILED if command not returned by firmware.
1da177e4 809**************************************************************************/
e5f82ab8 810static int
1da177e4
LT		 811qla2xxx_eh_abort(struct scsi_cmnd *cmd)
812{
e315cd28 813 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
f4f051eb 814 srb_t *sp;
69abf61e 815 int ret = SUCCESS;
f4f051eb 816 unsigned int id, lun;
18e144d3 817 unsigned long flags;
2ea00202 818 int wait = 0;
e315cd28 819 struct qla_hw_data *ha = vha->hw;
1da177e4 820
65d430fa 821 fc_block_scsi_eh(cmd);
07db5183 822
f4f051eb 823 if (!CMD_SP(cmd))
2ea00202 824 return SUCCESS;
1da177e4 825
f4f051eb 826 id = cmd->device->id;
827 lun = cmd->device->lun;
1da177e4 828
e315cd28 829 spin_lock_irqsave(&ha->hardware_lock, flags);
170babc3
MC		 830 sp = (srb_t *) CMD_SP(cmd);
831 if (!sp) {
832 spin_unlock_irqrestore(&ha->hardware_lock, flags);
833 return SUCCESS;
834 }
1da177e4 835
170babc3
MC		 836 DEBUG2(printk("%s(%ld): aborting sp %p from RISC.",
837 __func__, vha->host_no, sp));
17d98630 838
170babc3
MC		 839 /* Get a reference to the sp and drop the lock.*/
840 sp_get(sp);
083a469d 841
e315cd28 842 spin_unlock_irqrestore(&ha->hardware_lock, flags);
170babc3
MC		 843 if (ha->isp_ops->abort_command(sp)) {
844 DEBUG2(printk("%s(%ld): abort_command "
845 "mbx failed.\n", __func__, vha->host_no));
846 ret = FAILED;
847 } else {
848 DEBUG3(printk("%s(%ld): abort_command "
849 "mbx success.\n", __func__, vha->host_no));
850 wait = 1;
851 }
852 qla2x00_sp_compl(ha, sp);
1da177e4 853
f4f051eb 854 /* Wait for the command to be returned. */
2ea00202 855 if (wait) {
e315cd28 856 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
fa2a1ce5 857 qla_printk(KERN_ERR, ha,
09d1dc2a
MI		 858 "scsi(%ld:%d:%d): Abort handler timed out -- %x.\n",
859 vha->host_no, id, lun, ret);
2ea00202 860 ret = FAILED;
f4f051eb 861 }
1da177e4 862 }
1da177e4 863
fa2a1ce5 864 qla_printk(KERN_INFO, ha,
09d1dc2a
MI		 865 "scsi(%ld:%d:%d): Abort command issued -- %d %x.\n",
866 vha->host_no, id, lun, wait, ret);
1da177e4 867
f4f051eb 868 return ret;
869}
1da177e4 870
4d78c973 871int
e315cd28 872qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
4d78c973 873 unsigned int l, enum nexus_wait_type type)
f4f051eb 874{
17d98630 875 int cnt, match, status;
18e144d3 876 unsigned long flags;
e315cd28 877 struct qla_hw_data *ha = vha->hw;
73208dfd 878 struct req_que *req;
4d78c973 879 srb_t *sp;
1da177e4 880
523ec773 881 status = QLA_SUCCESS;
17d98630 882
e315cd28 883 spin_lock_irqsave(&ha->hardware_lock, flags);
67c2e93a 884 req = vha->req;
17d98630
AC		 885 for (cnt = 1; status == QLA_SUCCESS &&
886 cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
887 sp = req->outstanding_cmds[cnt];
888 if (!sp)
523ec773 889 continue;
bad75002 890 if ((sp->ctx) && !IS_PROT_IO(sp))
cf53b069 891 continue;
17d98630
AC		 892 if (vha->vp_idx != sp->fcport->vha->vp_idx)
893 continue;
894 match = 0;
895 switch (type) {
896 case WAIT_HOST:
897 match = 1;
898 break;
899 case WAIT_TARGET:
900 match = sp->cmd->device->id == t;
901 break;
902 case WAIT_LUN:
903 match = (sp->cmd->device->id == t &&
904 sp->cmd->device->lun == l);
905 break;
73208dfd 906 }
17d98630
AC		 907 if (!match)
908 continue;
909
910 spin_unlock_irqrestore(&ha->hardware_lock, flags);
911 status = qla2x00_eh_wait_on_command(sp->cmd);
912 spin_lock_irqsave(&ha->hardware_lock, flags);
1da177e4 913 }
e315cd28 914 spin_unlock_irqrestore(&ha->hardware_lock, flags);
523ec773
AV		 915
916 return status;
1da177e4
LT		 917}
918
523ec773
AV		 919static char *reset_errors[] = {
920 "HBA not online",
921 "HBA not ready",
922 "Task management failed",
923 "Waiting for command completions",
924};
1da177e4 925
e5f82ab8 926static int
523ec773 927__qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
2afa19a9 928 struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
1da177e4 929{
e315cd28 930 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 931 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
523ec773 932 int err;
1da177e4 933
65d430fa 934 fc_block_scsi_eh(cmd);
07db5183 935
b0328bee 936 if (!fcport)
523ec773 937 return FAILED;
1da177e4 938
e315cd28
AC		 939 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET ISSUED.\n",
940 vha->host_no, cmd->device->id, cmd->device->lun, name);
1da177e4 941
523ec773 942 err = 0;
e315cd28 943 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
523ec773
AV		 944 goto eh_reset_failed;
945 err = 1;
e315cd28 946 if (qla2x00_wait_for_loop_ready(vha) != QLA_SUCCESS)
523ec773
AV		 947 goto eh_reset_failed;
948 err = 2;
2afa19a9
AC		 949 if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
950 != QLA_SUCCESS)
523ec773
AV		 951 goto eh_reset_failed;
952 err = 3;
e315cd28 953 if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
4d78c973 954 cmd->device->lun, type) != QLA_SUCCESS)
523ec773
AV		 955 goto eh_reset_failed;
956
e315cd28
AC		 957 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET SUCCEEDED.\n",
958 vha->host_no, cmd->device->id, cmd->device->lun, name);
523ec773
AV		 959
960 return SUCCESS;
961
4d78c973 962eh_reset_failed:
e315cd28
AC		 963 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET FAILED: %s.\n"
964 , vha->host_no, cmd->device->id, cmd->device->lun, name,
523ec773
AV		 965 reset_errors[err]);
966 return FAILED;
967}
1da177e4 968
523ec773
AV		 969static int
970qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
971{
e315cd28
AC		 972 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
973 struct qla_hw_data *ha = vha->hw;
1da177e4 974
523ec773
AV		 975 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
976 ha->isp_ops->lun_reset);
1da177e4
LT		 977}
978
1da177e4 979static int
523ec773 980qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1da177e4 981{
e315cd28
AC		 982 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
983 struct qla_hw_data *ha = vha->hw;
1da177e4 984
523ec773
AV		 985 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
986 ha->isp_ops->target_reset);
1da177e4
LT		 987}
988
1da177e4
LT		 989/**************************************************************************
990* qla2xxx_eh_bus_reset
991*
992* Description:
993* The bus reset function will reset the bus and abort any executing
994* commands.
995*
996* Input:
997* cmd = Linux SCSI command packet of the command that cause the
998* bus reset.
999*
1000* Returns:
1001* SUCCESS/FAILURE (defined as macro in scsi.h).
1002*
1003**************************************************************************/
e5f82ab8 1004static int
1da177e4
LT		 1005qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1006{
e315cd28 1007 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 1008 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
2c3dfe3f 1009 int ret = FAILED;
f4f051eb 1010 unsigned int id, lun;
f4f051eb 1011
65d430fa 1012 fc_block_scsi_eh(cmd);
07db5183 1013
f4f051eb 1014 id = cmd->device->id;
1015 lun = cmd->device->lun;
1da177e4 1016
b0328bee 1017 if (!fcport)
f4f051eb 1018 return ret;
1da177e4 1019
e315cd28 1020 qla_printk(KERN_INFO, vha->hw,
749af3d5 1021 "scsi(%ld:%d:%d): BUS RESET ISSUED.\n", vha->host_no, id, lun);
1da177e4 1022
e315cd28 1023 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1da177e4 1024 DEBUG2(printk("%s failed:board disabled\n",__func__));
f4f051eb 1025 goto eh_bus_reset_done;
1da177e4
LT		 1026 }
1027
e315cd28
AC		 1028 if (qla2x00_wait_for_loop_ready(vha) == QLA_SUCCESS) {
1029 if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
f4f051eb 1030 ret = SUCCESS;
1da177e4 1031 }
f4f051eb 1032 if (ret == FAILED)
1033 goto eh_bus_reset_done;
1da177e4 1034
9a41a62b 1035 /* Flush outstanding commands. */
4d78c973 1036 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
523ec773 1037 QLA_SUCCESS)
9a41a62b 1038 ret = FAILED;
1da177e4 1039
f4f051eb 1040eh_bus_reset_done:
e315cd28 1041 qla_printk(KERN_INFO, vha->hw, "%s: reset %s\n", __func__,
f4f051eb 1042 (ret == FAILED) ? "failed" : "succeded");
1da177e4 1043
f4f051eb 1044 return ret;
1da177e4
LT		 1045}
1046
1047/**************************************************************************
1048* qla2xxx_eh_host_reset
1049*
1050* Description:
1051* The reset function will reset the Adapter.
1052*
1053* Input:
1054* cmd = Linux SCSI command packet of the command that cause the
1055* adapter reset.
1056*
1057* Returns:
1058* Either SUCCESS or FAILED.
1059*
1060* Note:
1061**************************************************************************/
e5f82ab8 1062static int
1da177e4
LT		 1063qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1064{
e315cd28 1065 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 1066 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
e315cd28 1067 struct qla_hw_data *ha = vha->hw;
2c3dfe3f 1068 int ret = FAILED;
f4f051eb 1069 unsigned int id, lun;
e315cd28 1070 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4 1071
65d430fa 1072 fc_block_scsi_eh(cmd);
07db5183 1073
f4f051eb 1074 id = cmd->device->id;
1075 lun = cmd->device->lun;
f4f051eb 1076
b0328bee 1077 if (!fcport)
f4f051eb 1078 return ret;
1da177e4 1079
1da177e4 1080 qla_printk(KERN_INFO, ha,
e315cd28 1081 "scsi(%ld:%d:%d): ADAPTER RESET ISSUED.\n", vha->host_no, id, lun);
1da177e4 1082
86fbee86 1083 if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
f4f051eb 1084 goto eh_host_reset_lock;
1da177e4
LT		 1085
1086 /*
1087 * Fixme-may be dpc thread is active and processing
fa2a1ce5 1088 * loop_resync,so wait a while for it to
1da177e4
LT		 1089 * be completed and then issue big hammer.Otherwise
1090 * it may cause I/O failure as big hammer marks the
1091 * devices as lost kicking of the port_down_timer
1092 * while dpc is stuck for the mailbox to complete.
1093 */
e315cd28
AC		 1094 qla2x00_wait_for_loop_ready(vha);
1095 if (vha != base_vha) {
1096 if (qla2x00_vp_abort_isp(vha))
f4f051eb 1097 goto eh_host_reset_lock;
e315cd28 1098 } else {
a9083016
GM		 1099 if (IS_QLA82XX(vha->hw)) {
1100 if (!qla82xx_fcoe_ctx_reset(vha)) {
1101 /* Ctx reset success */
1102 ret = SUCCESS;
1103 goto eh_host_reset_lock;
1104 }
1105 /* fall thru if ctx reset failed */
1106 }
68ca949c
AC		 1107 if (ha->wq)
1108 flush_workqueue(ha->wq);
1109
e315cd28 1110 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
a9083016 1111 if (ha->isp_ops->abort_isp(base_vha)) {
e315cd28
AC		 1112 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1113 /* failed. schedule dpc to try */
1114 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1115
1116 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
1117 goto eh_host_reset_lock;
1118 }
1119 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
fa2a1ce5 1120 }
1da177e4 1121
e315cd28 1122 /* Waiting for command to be returned to OS.*/
4d78c973 1123 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
e315cd28 1124 QLA_SUCCESS)
f4f051eb 1125 ret = SUCCESS;
1da177e4 1126
f4f051eb 1127eh_host_reset_lock:
f4f051eb 1128 qla_printk(KERN_INFO, ha, "%s: reset %s\n", __func__,
1129 (ret == FAILED) ? "failed" : "succeded");
1da177e4 1130
f4f051eb 1131 return ret;
1132}
1da177e4
LT		 1133
1134/*
1135* qla2x00_loop_reset
1136* Issue loop reset.
1137*
1138* Input:
1139* ha = adapter block pointer.
1140*
1141* Returns:
1142* 0 = success
1143*/
a4722cf2 1144int
e315cd28 1145qla2x00_loop_reset(scsi_qla_host_t *vha)
1da177e4 1146{
0c8c39af 1147 int ret;
bdf79621 1148 struct fc_port *fcport;
e315cd28 1149 struct qla_hw_data *ha = vha->hw;
1da177e4 1150
f4c496c1 1151 if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
55e5ed27
AV		 1152 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1153 if (fcport->port_type != FCT_TARGET)
1154 continue;
1155
1156 ret = ha->isp_ops->target_reset(fcport, 0, 0);
1157 if (ret != QLA_SUCCESS) {
1158 DEBUG2_3(printk("%s(%ld): bus_reset failed: "
1159 "target_reset=%d d_id=%x.\n", __func__,
1160 vha->host_no, ret, fcport->d_id.b24));
1161 }
1162 }
1163 }
1164
a9083016 1165 if (ha->flags.enable_lip_full_login && !IS_QLA8XXX_TYPE(ha)) {
e315cd28 1166 ret = qla2x00_full_login_lip(vha);
0c8c39af 1167 if (ret != QLA_SUCCESS) {
749af3d5 1168 DEBUG2_3(printk("%s(%ld): failed: "
e315cd28 1169 "full_login_lip=%d.\n", __func__, vha->host_no,
0c8c39af 1170 ret));
749af3d5
AC		 1171 }
1172 atomic_set(&vha->loop_state, LOOP_DOWN);
1173 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1174 qla2x00_mark_all_devices_lost(vha, 0);
1175 qla2x00_wait_for_loop_ready(vha);
0c8c39af
AV		 1176 }
1177
0d6e61bc 1178 if (ha->flags.enable_lip_reset) {
e315cd28 1179 ret = qla2x00_lip_reset(vha);
0c8c39af 1180 if (ret != QLA_SUCCESS) {
749af3d5 1181 DEBUG2_3(printk("%s(%ld): failed: "
e315cd28
AC		 1182 "lip_reset=%d.\n", __func__, vha->host_no, ret));
1183 } else
1184 qla2x00_wait_for_loop_ready(vha);
1da177e4
LT		 1185 }
1186
1da177e4 1187 /* Issue marker command only when we are going to start the I/O */
e315cd28 1188 vha->marker_needed = 1;
1da177e4 1189
0c8c39af 1190 return QLA_SUCCESS;
1da177e4
LT		 1191}
1192
df4bf0bb 1193void
e315cd28 1194qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
df4bf0bb 1195{
73208dfd 1196 int que, cnt;
df4bf0bb
AV		 1197 unsigned long flags;
1198 srb_t *sp;
ac280b67 1199 struct srb_ctx *ctx;
e315cd28 1200 struct qla_hw_data *ha = vha->hw;
73208dfd 1201 struct req_que *req;
df4bf0bb
AV		 1202
1203 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 1204 for (que = 0; que < ha->max_req_queues; que++) {
29bdccbe 1205 req = ha->req_q_map[que];
73208dfd
AC		 1206 if (!req)
1207 continue;
1208 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
1209 sp = req->outstanding_cmds[cnt];
e612d465 1210 if (sp) {
73208dfd 1211 req->outstanding_cmds[cnt] = NULL;
a9083016 1212 if (!sp->ctx ||
bad75002
AE		 1213 (sp->flags & SRB_FCP_CMND_DMA_VALID) ||
1214 IS_PROT_IO(sp)) {
ac280b67
AV		 1215 sp->cmd->result = res;
1216 qla2x00_sp_compl(ha, sp);
1217 } else {
1218 ctx = sp->ctx;
6c452a45
AV		 1219 if (ctx->type == SRB_LOGIN_CMD ||
1220 ctx->type == SRB_LOGOUT_CMD) {
4916392b 1221 ctx->u.iocb_cmd->free(sp);
db3ad7f8 1222 } else {
6c452a45 1223 struct fc_bsg_job *bsg_job =
4916392b 1224 ctx->u.bsg_job;
6c452a45
AV		 1225 if (bsg_job->request->msgcode
1226 == FC_BSG_HST_CT)
db3ad7f8 1227 kfree(sp->fcport);
6c452a45
AV		 1228 bsg_job->req->errors = 0;
1229 bsg_job->reply->result = res;
4916392b 1230 bsg_job->job_done(bsg_job);
db3ad7f8 1231 kfree(sp->ctx);
6c452a45 1232 mempool_free(sp,
4916392b 1233 ha->srb_mempool);
db3ad7f8 1234 }
ac280b67 1235 }
73208dfd 1236 }
df4bf0bb
AV		 1237 }
1238 }
1239 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1240}
1241
f4f051eb 1242static int
1243qla2xxx_slave_alloc(struct scsi_device *sdev)
1da177e4 1244{
bdf79621 1245 struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1da177e4 1246
19a7b4ae 1247 if (!rport || fc_remote_port_chkready(rport))
f4f051eb 1248 return -ENXIO;
bdf79621 1249
19a7b4ae 1250 sdev->hostdata = *(fc_port_t **)rport->dd_data;
1da177e4 1251
f4f051eb 1252 return 0;
1253}
1da177e4 1254
f4f051eb 1255static int
1256qla2xxx_slave_configure(struct scsi_device *sdev)
1257{
e315cd28 1258 scsi_qla_host_t *vha = shost_priv(sdev->host);
2afa19a9 1259 struct req_que *req = vha->req;
8482e118 1260
f4f051eb 1261 if (sdev->tagged_supported)
73208dfd 1262 scsi_activate_tcq(sdev, req->max_q_depth);
f4f051eb 1263 else
73208dfd 1264 scsi_deactivate_tcq(sdev, req->max_q_depth);
f4f051eb 1265 return 0;
1266}
1da177e4 1267
f4f051eb 1268static void
1269qla2xxx_slave_destroy(struct scsi_device *sdev)
1270{
1271 sdev->hostdata = NULL;
1da177e4
LT		 1272}
1273
c45dd305
GM		 1274static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1275{
1276 fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1277
1278 if (!scsi_track_queue_full(sdev, qdepth))
1279 return;
1280
1281 DEBUG2(qla_printk(KERN_INFO, fcport->vha->hw,
1282 "scsi(%ld:%d:%d:%d): Queue depth adjusted-down to %d.\n",
1283 fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
1284 sdev->queue_depth));
1285}
1286
1287static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1288{
1289 fc_port_t *fcport = sdev->hostdata;
1290 struct scsi_qla_host *vha = fcport->vha;
1291 struct qla_hw_data *ha = vha->hw;
1292 struct req_que *req = NULL;
1293
1294 req = vha->req;
1295 if (!req)
1296 return;
1297
1298 if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1299 return;
1300
1301 if (sdev->ordered_tags)
1302 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1303 else
1304 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1305
1306 DEBUG2(qla_printk(KERN_INFO, ha,
1307 "scsi(%ld:%d:%d:%d): Queue depth adjusted-up to %d.\n",
1308 fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
1309 sdev->queue_depth));
1310}
1311
ce7e4af7 1312static int
e881a172 1313qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
ce7e4af7 1314{
c45dd305
GM		 1315 switch (reason) {
1316 case SCSI_QDEPTH_DEFAULT:
1317 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1318 break;
1319 case SCSI_QDEPTH_QFULL:
1320 qla2x00_handle_queue_full(sdev, qdepth);
1321 break;
1322 case SCSI_QDEPTH_RAMP_UP:
1323 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1324 break;
1325 default:
08002af2 1326 return -EOPNOTSUPP;
c45dd305 1327 }
e881a172 1328
ce7e4af7
AV		 1329 return sdev->queue_depth;
1330}
1331
1332static int
1333qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1334{
1335 if (sdev->tagged_supported) {
1336 scsi_set_tag_type(sdev, tag_type);
1337 if (tag_type)
1338 scsi_activate_tcq(sdev, sdev->queue_depth);
1339 else
1340 scsi_deactivate_tcq(sdev, sdev->queue_depth);
1341 } else
1342 tag_type = 0;
1343
1344 return tag_type;
1345}
1346
1da177e4
LT		 1347/**
1348 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1349 * @ha: HA context
1350 *
1351 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1352 * supported addressing method.
1353 */
1354static void
53303c42 1355qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1da177e4 1356{
7524f9b9 1357 /* Assume a 32bit DMA mask. */
1da177e4 1358 ha->flags.enable_64bit_addressing = 0;
1da177e4 1359
6a35528a 1360 if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
7524f9b9
AV		 1361 /* Any upper-dword bits set? */
1362 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
6a35528a 1363 !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
7524f9b9 1364 /* Ok, a 64bit DMA mask is applicable. */
1da177e4 1365 ha->flags.enable_64bit_addressing = 1;
fd34f556
AV		 1366 ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1367 ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
7524f9b9 1368 return;
1da177e4 1369 }
1da177e4 1370 }
7524f9b9 1371
284901a9
YH		 1372 dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1373 pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1da177e4
LT		 1374}
1375
fd34f556 1376static void
e315cd28 1377qla2x00_enable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1378{
1379 unsigned long flags = 0;
1380 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1381
1382 spin_lock_irqsave(&ha->hardware_lock, flags);
1383 ha->interrupts_on = 1;
1384 /* enable risc and host interrupts */
1385 WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1386 RD_REG_WORD(&reg->ictrl);
1387 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1388
1389}
1390
1391static void
e315cd28 1392qla2x00_disable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1393{
1394 unsigned long flags = 0;
1395 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1396
1397 spin_lock_irqsave(&ha->hardware_lock, flags);
1398 ha->interrupts_on = 0;
1399 /* disable risc and host interrupts */
1400 WRT_REG_WORD(&reg->ictrl, 0);
1401 RD_REG_WORD(&reg->ictrl);
1402 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1403}
1404
1405static void
e315cd28 1406qla24xx_enable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1407{
1408 unsigned long flags = 0;
1409 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1410
1411 spin_lock_irqsave(&ha->hardware_lock, flags);
1412 ha->interrupts_on = 1;
1413 WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1414 RD_REG_DWORD(&reg->ictrl);
1415 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1416}
1417
1418static void
e315cd28 1419qla24xx_disable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1420{
1421 unsigned long flags = 0;
1422 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1423
124f85e6
AV		 1424 if (IS_NOPOLLING_TYPE(ha))
1425 return;
fd34f556
AV		 1426 spin_lock_irqsave(&ha->hardware_lock, flags);
1427 ha->interrupts_on = 0;
1428 WRT_REG_DWORD(&reg->ictrl, 0);
1429 RD_REG_DWORD(&reg->ictrl);
1430 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1431}
1432
1433static struct isp_operations qla2100_isp_ops = {
1434 .pci_config = qla2100_pci_config,
1435 .reset_chip = qla2x00_reset_chip,
1436 .chip_diag = qla2x00_chip_diag,
1437 .config_rings = qla2x00_config_rings,
1438 .reset_adapter = qla2x00_reset_adapter,
1439 .nvram_config = qla2x00_nvram_config,
1440 .update_fw_options = qla2x00_update_fw_options,
1441 .load_risc = qla2x00_load_risc,
1442 .pci_info_str = qla2x00_pci_info_str,
1443 .fw_version_str = qla2x00_fw_version_str,
1444 .intr_handler = qla2100_intr_handler,
1445 .enable_intrs = qla2x00_enable_intrs,
1446 .disable_intrs = qla2x00_disable_intrs,
1447 .abort_command = qla2x00_abort_command,
523ec773
AV		 1448 .target_reset = qla2x00_abort_target,
1449 .lun_reset = qla2x00_lun_reset,
fd34f556
AV		 1450 .fabric_login = qla2x00_login_fabric,
1451 .fabric_logout = qla2x00_fabric_logout,
1452 .calc_req_entries = qla2x00_calc_iocbs_32,
1453 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1454 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1455 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1456 .read_nvram = qla2x00_read_nvram_data,
1457 .write_nvram = qla2x00_write_nvram_data,
1458 .fw_dump = qla2100_fw_dump,
1459 .beacon_on = NULL,
1460 .beacon_off = NULL,
1461 .beacon_blink = NULL,
1462 .read_optrom = qla2x00_read_optrom_data,
1463 .write_optrom = qla2x00_write_optrom_data,
1464 .get_flash_version = qla2x00_get_flash_version,
e315cd28 1465 .start_scsi = qla2x00_start_scsi,
a9083016 1466 .abort_isp = qla2x00_abort_isp,
fd34f556
AV		 1467};
1468
1469static struct isp_operations qla2300_isp_ops = {
1470 .pci_config = qla2300_pci_config,
1471 .reset_chip = qla2x00_reset_chip,
1472 .chip_diag = qla2x00_chip_diag,
1473 .config_rings = qla2x00_config_rings,
1474 .reset_adapter = qla2x00_reset_adapter,
1475 .nvram_config = qla2x00_nvram_config,
1476 .update_fw_options = qla2x00_update_fw_options,
1477 .load_risc = qla2x00_load_risc,
1478 .pci_info_str = qla2x00_pci_info_str,
1479 .fw_version_str = qla2x00_fw_version_str,
1480 .intr_handler = qla2300_intr_handler,
1481 .enable_intrs = qla2x00_enable_intrs,
1482 .disable_intrs = qla2x00_disable_intrs,
1483 .abort_command = qla2x00_abort_command,
523ec773
AV		 1484 .target_reset = qla2x00_abort_target,
1485 .lun_reset = qla2x00_lun_reset,
fd34f556
AV		 1486 .fabric_login = qla2x00_login_fabric,
1487 .fabric_logout = qla2x00_fabric_logout,
1488 .calc_req_entries = qla2x00_calc_iocbs_32,
1489 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1490 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1491 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1492 .read_nvram = qla2x00_read_nvram_data,
1493 .write_nvram = qla2x00_write_nvram_data,
1494 .fw_dump = qla2300_fw_dump,
1495 .beacon_on = qla2x00_beacon_on,
1496 .beacon_off = qla2x00_beacon_off,
1497 .beacon_blink = qla2x00_beacon_blink,
1498 .read_optrom = qla2x00_read_optrom_data,
1499 .write_optrom = qla2x00_write_optrom_data,
1500 .get_flash_version = qla2x00_get_flash_version,
e315cd28 1501 .start_scsi = qla2x00_start_scsi,
a9083016 1502 .abort_isp = qla2x00_abort_isp,
fd34f556
AV		 1503};
1504
1505static struct isp_operations qla24xx_isp_ops = {
1506 .pci_config = qla24xx_pci_config,
1507 .reset_chip = qla24xx_reset_chip,
1508 .chip_diag = qla24xx_chip_diag,
1509 .config_rings = qla24xx_config_rings,
1510 .reset_adapter = qla24xx_reset_adapter,
1511 .nvram_config = qla24xx_nvram_config,
1512 .update_fw_options = qla24xx_update_fw_options,
1513 .load_risc = qla24xx_load_risc,
1514 .pci_info_str = qla24xx_pci_info_str,
1515 .fw_version_str = qla24xx_fw_version_str,
1516 .intr_handler = qla24xx_intr_handler,
1517 .enable_intrs = qla24xx_enable_intrs,
1518 .disable_intrs = qla24xx_disable_intrs,
1519 .abort_command = qla24xx_abort_command,
523ec773
AV		 1520 .target_reset = qla24xx_abort_target,
1521 .lun_reset = qla24xx_lun_reset,
fd34f556
AV		 1522 .fabric_login = qla24xx_login_fabric,
1523 .fabric_logout = qla24xx_fabric_logout,
1524 .calc_req_entries = NULL,
1525 .build_iocbs = NULL,
1526 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1527 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1528 .read_nvram = qla24xx_read_nvram_data,
1529 .write_nvram = qla24xx_write_nvram_data,
1530 .fw_dump = qla24xx_fw_dump,
1531 .beacon_on = qla24xx_beacon_on,
1532 .beacon_off = qla24xx_beacon_off,
1533 .beacon_blink = qla24xx_beacon_blink,
1534 .read_optrom = qla24xx_read_optrom_data,
1535 .write_optrom = qla24xx_write_optrom_data,
1536 .get_flash_version = qla24xx_get_flash_version,
e315cd28 1537 .start_scsi = qla24xx_start_scsi,
a9083016 1538 .abort_isp = qla2x00_abort_isp,
fd34f556
AV		 1539};
1540
c3a2f0df
AV		 1541static struct isp_operations qla25xx_isp_ops = {
1542 .pci_config = qla25xx_pci_config,
1543 .reset_chip = qla24xx_reset_chip,
1544 .chip_diag = qla24xx_chip_diag,
1545 .config_rings = qla24xx_config_rings,
1546 .reset_adapter = qla24xx_reset_adapter,
1547 .nvram_config = qla24xx_nvram_config,
1548 .update_fw_options = qla24xx_update_fw_options,
1549 .load_risc = qla24xx_load_risc,
1550 .pci_info_str = qla24xx_pci_info_str,
1551 .fw_version_str = qla24xx_fw_version_str,
1552 .intr_handler = qla24xx_intr_handler,
1553 .enable_intrs = qla24xx_enable_intrs,
1554 .disable_intrs = qla24xx_disable_intrs,
1555 .abort_command = qla24xx_abort_command,
523ec773
AV		 1556 .target_reset = qla24xx_abort_target,
1557 .lun_reset = qla24xx_lun_reset,
c3a2f0df
AV		 1558 .fabric_login = qla24xx_login_fabric,
1559 .fabric_logout = qla24xx_fabric_logout,
1560 .calc_req_entries = NULL,
1561 .build_iocbs = NULL,
1562 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1563 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1564 .read_nvram = qla25xx_read_nvram_data,
1565 .write_nvram = qla25xx_write_nvram_data,
1566 .fw_dump = qla25xx_fw_dump,
1567 .beacon_on = qla24xx_beacon_on,
1568 .beacon_off = qla24xx_beacon_off,
1569 .beacon_blink = qla24xx_beacon_blink,
338c9161 1570 .read_optrom = qla25xx_read_optrom_data,
c3a2f0df
AV		 1571 .write_optrom = qla24xx_write_optrom_data,
1572 .get_flash_version = qla24xx_get_flash_version,
bad75002 1573 .start_scsi = qla24xx_dif_start_scsi,
a9083016 1574 .abort_isp = qla2x00_abort_isp,
c3a2f0df
AV		 1575};
1576
3a03eb79
AV		 1577static struct isp_operations qla81xx_isp_ops = {
1578 .pci_config = qla25xx_pci_config,
1579 .reset_chip = qla24xx_reset_chip,
1580 .chip_diag = qla24xx_chip_diag,
1581 .config_rings = qla24xx_config_rings,
1582 .reset_adapter = qla24xx_reset_adapter,
1583 .nvram_config = qla81xx_nvram_config,
1584 .update_fw_options = qla81xx_update_fw_options,
eaac30be 1585 .load_risc = qla81xx_load_risc,
3a03eb79
AV		 1586 .pci_info_str = qla24xx_pci_info_str,
1587 .fw_version_str = qla24xx_fw_version_str,
1588 .intr_handler = qla24xx_intr_handler,
1589 .enable_intrs = qla24xx_enable_intrs,
1590 .disable_intrs = qla24xx_disable_intrs,
1591 .abort_command = qla24xx_abort_command,
1592 .target_reset = qla24xx_abort_target,
1593 .lun_reset = qla24xx_lun_reset,
1594 .fabric_login = qla24xx_login_fabric,
1595 .fabric_logout = qla24xx_fabric_logout,
1596 .calc_req_entries = NULL,
1597 .build_iocbs = NULL,
1598 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1599 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
3d79038f
AV		 1600 .read_nvram = NULL,
1601 .write_nvram = NULL,
3a03eb79
AV		 1602 .fw_dump = qla81xx_fw_dump,
1603 .beacon_on = qla24xx_beacon_on,
1604 .beacon_off = qla24xx_beacon_off,
1605 .beacon_blink = qla24xx_beacon_blink,
1606 .read_optrom = qla25xx_read_optrom_data,
1607 .write_optrom = qla24xx_write_optrom_data,
1608 .get_flash_version = qla24xx_get_flash_version,
ba77ef53 1609 .start_scsi = qla24xx_dif_start_scsi,
a9083016
GM		 1610 .abort_isp = qla2x00_abort_isp,
1611};
1612
1613static struct isp_operations qla82xx_isp_ops = {
1614 .pci_config = qla82xx_pci_config,
1615 .reset_chip = qla82xx_reset_chip,
1616 .chip_diag = qla24xx_chip_diag,
1617 .config_rings = qla82xx_config_rings,
1618 .reset_adapter = qla24xx_reset_adapter,
1619 .nvram_config = qla81xx_nvram_config,
1620 .update_fw_options = qla24xx_update_fw_options,
1621 .load_risc = qla82xx_load_risc,
1622 .pci_info_str = qla82xx_pci_info_str,
1623 .fw_version_str = qla24xx_fw_version_str,
1624 .intr_handler = qla82xx_intr_handler,
1625 .enable_intrs = qla82xx_enable_intrs,
1626 .disable_intrs = qla82xx_disable_intrs,
1627 .abort_command = qla24xx_abort_command,
1628 .target_reset = qla24xx_abort_target,
1629 .lun_reset = qla24xx_lun_reset,
1630 .fabric_login = qla24xx_login_fabric,
1631 .fabric_logout = qla24xx_fabric_logout,
1632 .calc_req_entries = NULL,
1633 .build_iocbs = NULL,
1634 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1635 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1636 .read_nvram = qla24xx_read_nvram_data,
1637 .write_nvram = qla24xx_write_nvram_data,
1638 .fw_dump = qla24xx_fw_dump,
1639 .beacon_on = qla24xx_beacon_on,
1640 .beacon_off = qla24xx_beacon_off,
1641 .beacon_blink = qla24xx_beacon_blink,
1642 .read_optrom = qla82xx_read_optrom_data,
1643 .write_optrom = qla82xx_write_optrom_data,
1644 .get_flash_version = qla24xx_get_flash_version,
1645 .start_scsi = qla82xx_start_scsi,
1646 .abort_isp = qla82xx_abort_isp,
3a03eb79
AV		 1647};
1648
ea5b6382 1649static inline void
e315cd28 1650qla2x00_set_isp_flags(struct qla_hw_data *ha)
ea5b6382 1651{
1652 ha->device_type = DT_EXTENDED_IDS;
1653 switch (ha->pdev->device) {
1654 case PCI_DEVICE_ID_QLOGIC_ISP2100:
1655 ha->device_type |= DT_ISP2100;
1656 ha->device_type &= ~DT_EXTENDED_IDS;
441d1072 1657 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
ea5b6382 1658 break;
1659 case PCI_DEVICE_ID_QLOGIC_ISP2200:
1660 ha->device_type |= DT_ISP2200;
1661 ha->device_type &= ~DT_EXTENDED_IDS;
441d1072 1662 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
ea5b6382 1663 break;
1664 case PCI_DEVICE_ID_QLOGIC_ISP2300:
1665 ha->device_type |= DT_ISP2300;
4a59f71d 1666 ha->device_type |= DT_ZIO_SUPPORTED;
441d1072 1667 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1668 break;
1669 case PCI_DEVICE_ID_QLOGIC_ISP2312:
1670 ha->device_type |= DT_ISP2312;
4a59f71d 1671 ha->device_type |= DT_ZIO_SUPPORTED;
441d1072 1672 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1673 break;
1674 case PCI_DEVICE_ID_QLOGIC_ISP2322:
1675 ha->device_type |= DT_ISP2322;
4a59f71d 1676 ha->device_type |= DT_ZIO_SUPPORTED;
ea5b6382 1677 if (ha->pdev->subsystem_vendor == 0x1028 &&
1678 ha->pdev->subsystem_device == 0x0170)
1679 ha->device_type |= DT_OEM_001;
441d1072 1680 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1681 break;
1682 case PCI_DEVICE_ID_QLOGIC_ISP6312:
1683 ha->device_type |= DT_ISP6312;
441d1072 1684 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1685 break;
1686 case PCI_DEVICE_ID_QLOGIC_ISP6322:
1687 ha->device_type |= DT_ISP6322;
441d1072 1688 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382 1689 break;
1690 case PCI_DEVICE_ID_QLOGIC_ISP2422:
1691 ha->device_type |= DT_ISP2422;
4a59f71d 1692 ha->device_type |= DT_ZIO_SUPPORTED;
e428924c 1693 ha->device_type |= DT_FWI2;
c76f2c01 1694 ha->device_type |= DT_IIDMA;
441d1072 1695 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1696 break;
1697 case PCI_DEVICE_ID_QLOGIC_ISP2432:
1698 ha->device_type |= DT_ISP2432;
4a59f71d 1699 ha->device_type |= DT_ZIO_SUPPORTED;
e428924c 1700 ha->device_type |= DT_FWI2;
c76f2c01 1701 ha->device_type |= DT_IIDMA;
441d1072 1702 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1703 break;
4d4df193
HK		 1704 case PCI_DEVICE_ID_QLOGIC_ISP8432:
1705 ha->device_type |= DT_ISP8432;
1706 ha->device_type |= DT_ZIO_SUPPORTED;
1707 ha->device_type |= DT_FWI2;
1708 ha->device_type |= DT_IIDMA;
1709 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1710 break;
044cc6c8 1711 case PCI_DEVICE_ID_QLOGIC_ISP5422:
1712 ha->device_type |= DT_ISP5422;
e428924c 1713 ha->device_type |= DT_FWI2;
441d1072 1714 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1715 break;
044cc6c8 1716 case PCI_DEVICE_ID_QLOGIC_ISP5432:
1717 ha->device_type |= DT_ISP5432;
e428924c 1718 ha->device_type |= DT_FWI2;
441d1072 1719 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1720 break;
c3a2f0df
AV		 1721 case PCI_DEVICE_ID_QLOGIC_ISP2532:
1722 ha->device_type |= DT_ISP2532;
1723 ha->device_type |= DT_ZIO_SUPPORTED;
1724 ha->device_type |= DT_FWI2;
1725 ha->device_type |= DT_IIDMA;
441d1072 1726 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1727 break;
3a03eb79
AV		 1728 case PCI_DEVICE_ID_QLOGIC_ISP8001:
1729 ha->device_type |= DT_ISP8001;
1730 ha->device_type |= DT_ZIO_SUPPORTED;
1731 ha->device_type |= DT_FWI2;
1732 ha->device_type |= DT_IIDMA;
1733 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1734 break;
a9083016
GM		 1735 case PCI_DEVICE_ID_QLOGIC_ISP8021:
1736 ha->device_type |= DT_ISP8021;
1737 ha->device_type |= DT_ZIO_SUPPORTED;
1738 ha->device_type |= DT_FWI2;
1739 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1740 /* Initialize 82XX ISP flags */
1741 qla82xx_init_flags(ha);
1742 break;
ea5b6382 1743 }
e5b68a61 1744
a9083016
GM		 1745 if (IS_QLA82XX(ha))
1746 ha->port_no = !(ha->portnum & 1);
1747 else
1748 /* Get adapter physical port no from interrupt pin register. */
1749 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
1750
e5b68a61
AC		 1751 if (ha->port_no & 1)
1752 ha->flags.port0 = 1;
1753 else
1754 ha->flags.port0 = 0;
ea5b6382 1755}
1756
1da177e4 1757static int
e315cd28 1758qla2x00_iospace_config(struct qla_hw_data *ha)
1da177e4 1759{
3776541d 1760 resource_size_t pio;
73208dfd 1761 uint16_t msix;
68ca949c 1762 int cpus;
1da177e4 1763
a9083016
GM		 1764 if (IS_QLA82XX(ha))
1765 return qla82xx_iospace_config(ha);
1766
285d0321
AV		 1767 if (pci_request_selected_regions(ha->pdev, ha->bars,
1768 QLA2XXX_DRIVER_NAME)) {
1769 qla_printk(KERN_WARNING, ha,
1770 "Failed to reserve PIO/MMIO regions (%s)\n",
1771 pci_name(ha->pdev));
1772
1773 goto iospace_error_exit;
1774 }
1775 if (!(ha->bars & 1))
1776 goto skip_pio;
1777
1da177e4
LT		 1778 /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1779 pio = pci_resource_start(ha->pdev, 0);
3776541d
AV		 1780 if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1781 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1da177e4
LT		 1782 qla_printk(KERN_WARNING, ha,
1783 "Invalid PCI I/O region size (%s)...\n",
1784 pci_name(ha->pdev));
1785 pio = 0;
1786 }
1787 } else {
1788 qla_printk(KERN_WARNING, ha,
1789 "region #0 not a PIO resource (%s)...\n",
1790 pci_name(ha->pdev));
1791 pio = 0;
1792 }
285d0321 1793 ha->pio_address = pio;
1da177e4 1794
285d0321 1795skip_pio:
1da177e4 1796 /* Use MMIO operations for all accesses. */
3776541d 1797 if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1da177e4 1798 qla_printk(KERN_ERR, ha,
3776541d 1799 "region #1 not an MMIO resource (%s), aborting\n",
1da177e4
LT		 1800 pci_name(ha->pdev));
1801 goto iospace_error_exit;
1802 }
3776541d 1803 if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1da177e4
LT		 1804 qla_printk(KERN_ERR, ha,
1805 "Invalid PCI mem region size (%s), aborting\n",
1806 pci_name(ha->pdev));
1807 goto iospace_error_exit;
1808 }
1809
3776541d 1810 ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1da177e4
LT		 1811 if (!ha->iobase) {
1812 qla_printk(KERN_ERR, ha,
1813 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
1814
1815 goto iospace_error_exit;
1816 }
1817
73208dfd 1818 /* Determine queue resources */
2afa19a9 1819 ha->max_req_queues = ha->max_rsp_queues = 1;
d84a47c2
MH		 1820 if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1821 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
2afa19a9 1822 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
17d98630 1823 goto mqiobase_exit;
d84a47c2 1824
17d98630
AC		 1825 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1826 pci_resource_len(ha->pdev, 3));
1827 if (ha->mqiobase) {
1828 /* Read MSIX vector size of the board */
1829 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1830 ha->msix_count = msix;
68ca949c
AC		 1831 /* Max queues are bounded by available msix vectors */
1832 /* queue 0 uses two msix vectors */
1833 if (ql2xmultique_tag) {
1834 cpus = num_online_cpus();
27dc9c5a 1835 ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
68ca949c
AC		 1836 (cpus + 1) : (ha->msix_count - 1);
1837 ha->max_req_queues = 2;
1838 } else if (ql2xmaxqueues > 1) {
2afa19a9
AC		 1839 ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1840 QLA_MQ_SIZE : ql2xmaxqueues;
1841 DEBUG2(qla_printk(KERN_INFO, ha, "QoS mode set, max no"
1842 " of request queues:%d\n", ha->max_req_queues));
1843 }
68ca949c
AC		 1844 qla_printk(KERN_INFO, ha,
1845 "MSI-X vector count: %d\n", msix);
2afa19a9
AC		 1846 } else
1847 qla_printk(KERN_INFO, ha, "BAR 3 not enabled\n");
17d98630
AC		 1848
1849mqiobase_exit:
2afa19a9 1850 ha->msix_count = ha->max_rsp_queues + 1;
1da177e4
LT		 1851 return (0);
1852
1853iospace_error_exit:
1854 return (-ENOMEM);
1855}
1856
1e99e33a
AV		 1857static void
1858qla2xxx_scan_start(struct Scsi_Host *shost)
1859{
e315cd28 1860 scsi_qla_host_t *vha = shost_priv(shost);
1e99e33a 1861
cbc8eb67
AV		 1862 if (vha->hw->flags.running_gold_fw)
1863 return;
1864
e315cd28
AC		 1865 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1866 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1867 set_bit(RSCN_UPDATE, &vha->dpc_flags);
1868 set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
1e99e33a
AV		 1869}
1870
1871static int
1872qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
1873{
e315cd28 1874 scsi_qla_host_t *vha = shost_priv(shost);
1e99e33a 1875
e315cd28 1876 if (!vha->host)
1e99e33a 1877 return 1;
e315cd28 1878 if (time > vha->hw->loop_reset_delay * HZ)
1e99e33a
AV		 1879 return 1;
1880
e315cd28 1881 return atomic_read(&vha->loop_state) == LOOP_READY;
1e99e33a
AV		 1882}
1883
1da177e4
LT		 1884/*
1885 * PCI driver interface
1886 */
7ee61397
AV		 1887static int __devinit
1888qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
1da177e4 1889{
a1541d5a 1890 int ret = -ENODEV;
1da177e4 1891 struct Scsi_Host *host;
e315cd28
AC		 1892 scsi_qla_host_t *base_vha = NULL;
1893 struct qla_hw_data *ha;
29856e28 1894 char pci_info[30];
1da177e4 1895 char fw_str[30];
5433383e 1896 struct scsi_host_template *sht;
c51da4ec 1897 int bars, max_id, mem_only = 0;
e315cd28 1898 uint16_t req_length = 0, rsp_length = 0;
73208dfd
AC		 1899 struct req_que *req = NULL;
1900 struct rsp_que *rsp = NULL;
1da177e4 1901
285d0321 1902 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
a5326f86 1903 sht = &qla2xxx_driver_template;
5433383e 1904 if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
8bc69e7d 1905 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
4d4df193 1906 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
8bc69e7d 1907 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
c3a2f0df 1908 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
3a03eb79 1909 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
a9083016
GM		 1910 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
1911 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021) {
285d0321 1912 bars = pci_select_bars(pdev, IORESOURCE_MEM);
09483916 1913 mem_only = 1;
285d0321
AV		 1914 }
1915
09483916
BH		 1916 if (mem_only) {
1917 if (pci_enable_device_mem(pdev))
1918 goto probe_out;
1919 } else {
1920 if (pci_enable_device(pdev))
1921 goto probe_out;
1922 }
285d0321 1923
0927678f
JB		 1924 /* This may fail but that's ok */
1925 pci_enable_pcie_error_reporting(pdev);
285d0321 1926
e315cd28
AC		 1927 ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
1928 if (!ha) {
1929 DEBUG(printk("Unable to allocate memory for ha\n"));
1930 goto probe_out;
1da177e4 1931 }
e315cd28 1932 ha->pdev = pdev;
1da177e4
LT		 1933
1934 /* Clear our data area */
285d0321 1935 ha->bars = bars;
09483916 1936 ha->mem_only = mem_only;
df4bf0bb 1937 spin_lock_init(&ha->hardware_lock);
339aa70e 1938 spin_lock_init(&ha->vport_slock);
1da177e4 1939
ea5b6382 1940 /* Set ISP-type information. */
1941 qla2x00_set_isp_flags(ha);
ca79cf66
DG		 1942
1943 /* Set EEH reset type to fundamental if required by hba */
1944 if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) {
1945 pdev->needs_freset = 1;
ca79cf66
DG		 1946 }
1947
1da177e4
LT		 1948 /* Configure PCI I/O space */
1949 ret = qla2x00_iospace_config(ha);
a1541d5a 1950 if (ret)
e315cd28 1951 goto probe_hw_failed;
1da177e4 1952
1da177e4 1953 qla_printk(KERN_INFO, ha,
5433383e
AV		 1954 "Found an ISP%04X, irq %d, iobase 0x%p\n", pdev->device, pdev->irq,
1955 ha->iobase);
1da177e4 1956
1da177e4 1957 ha->prev_topology = 0;
fca29703 1958 ha->init_cb_size = sizeof(init_cb_t);
d8b45213 1959 ha->link_data_rate = PORT_SPEED_UNKNOWN;
854165f4 1960 ha->optrom_size = OPTROM_SIZE_2300;
1da177e4 1961
abbd8870 1962 /* Assign ISP specific operations. */
e315cd28 1963 max_id = MAX_TARGETS_2200;
1da177e4 1964 if (IS_QLA2100(ha)) {
e315cd28 1965 max_id = MAX_TARGETS_2100;
1da177e4 1966 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
e315cd28
AC		 1967 req_length = REQUEST_ENTRY_CNT_2100;
1968 rsp_length = RESPONSE_ENTRY_CNT_2100;
1969 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
abbd8870 1970 ha->gid_list_info_size = 4;
3a03eb79
AV		 1971 ha->flash_conf_off = ~0;
1972 ha->flash_data_off = ~0;
1973 ha->nvram_conf_off = ~0;
1974 ha->nvram_data_off = ~0;
fd34f556 1975 ha->isp_ops = &qla2100_isp_ops;
1da177e4 1976 } else if (IS_QLA2200(ha)) {
1da177e4 1977 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 1978 req_length = REQUEST_ENTRY_CNT_2200;
1979 rsp_length = RESPONSE_ENTRY_CNT_2100;
1980 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
abbd8870 1981 ha->gid_list_info_size = 4;
3a03eb79
AV		 1982 ha->flash_conf_off = ~0;
1983 ha->flash_data_off = ~0;
1984 ha->nvram_conf_off = ~0;
1985 ha->nvram_data_off = ~0;
fd34f556 1986 ha->isp_ops = &qla2100_isp_ops;
fca29703 1987 } else if (IS_QLA23XX(ha)) {
1da177e4 1988 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 1989 req_length = REQUEST_ENTRY_CNT_2200;
1990 rsp_length = RESPONSE_ENTRY_CNT_2300;
1991 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
abbd8870 1992 ha->gid_list_info_size = 6;
854165f4 1993 if (IS_QLA2322(ha) || IS_QLA6322(ha))
1994 ha->optrom_size = OPTROM_SIZE_2322;
3a03eb79
AV		 1995 ha->flash_conf_off = ~0;
1996 ha->flash_data_off = ~0;
1997 ha->nvram_conf_off = ~0;
1998 ha->nvram_data_off = ~0;
fd34f556 1999 ha->isp_ops = &qla2300_isp_ops;
4d4df193 2000 } else if (IS_QLA24XX_TYPE(ha)) {
fca29703 2001 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 2002 req_length = REQUEST_ENTRY_CNT_24XX;
2003 rsp_length = RESPONSE_ENTRY_CNT_2300;
2004 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2c3dfe3f 2005 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
fca29703 2006 ha->gid_list_info_size = 8;
854165f4 2007 ha->optrom_size = OPTROM_SIZE_24XX;
73208dfd 2008 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
fd34f556 2009 ha->isp_ops = &qla24xx_isp_ops;
3a03eb79
AV		 2010 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2011 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2012 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2013 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
c3a2f0df 2014 } else if (IS_QLA25XX(ha)) {
c3a2f0df 2015 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 2016 req_length = REQUEST_ENTRY_CNT_24XX;
2017 rsp_length = RESPONSE_ENTRY_CNT_2300;
2018 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
c3a2f0df 2019 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
c3a2f0df
AV		 2020 ha->gid_list_info_size = 8;
2021 ha->optrom_size = OPTROM_SIZE_25XX;
73208dfd 2022 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
c3a2f0df 2023 ha->isp_ops = &qla25xx_isp_ops;
3a03eb79
AV		 2024 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2025 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2026 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2027 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2028 } else if (IS_QLA81XX(ha)) {
2029 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2030 req_length = REQUEST_ENTRY_CNT_24XX;
2031 rsp_length = RESPONSE_ENTRY_CNT_2300;
2032 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2033 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2034 ha->gid_list_info_size = 8;
2035 ha->optrom_size = OPTROM_SIZE_81XX;
40859ae5 2036 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3a03eb79
AV		 2037 ha->isp_ops = &qla81xx_isp_ops;
2038 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2039 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2040 ha->nvram_conf_off = ~0;
2041 ha->nvram_data_off = ~0;
a9083016
GM		 2042 } else if (IS_QLA82XX(ha)) {
2043 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2044 req_length = REQUEST_ENTRY_CNT_82XX;
2045 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2046 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2047 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2048 ha->gid_list_info_size = 8;
2049 ha->optrom_size = OPTROM_SIZE_82XX;
087c621e 2050 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
a9083016
GM		 2051 ha->isp_ops = &qla82xx_isp_ops;
2052 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2053 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2054 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2055 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
1da177e4 2056 }
1da177e4 2057
6c2f527c 2058 mutex_init(&ha->vport_lock);
0b05a1f0
MB		 2059 init_completion(&ha->mbx_cmd_comp);
2060 complete(&ha->mbx_cmd_comp);
2061 init_completion(&ha->mbx_intr_comp);
23f2ebd1 2062 init_completion(&ha->dcbx_comp);
1da177e4 2063
2c3dfe3f 2064 set_bit(0, (unsigned long *) ha->vp_idx_map);
1da177e4 2065
53303c42 2066 qla2x00_config_dma_addressing(ha);
73208dfd 2067 ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
e315cd28 2068 if (!ret) {
1da177e4
LT		 2069 qla_printk(KERN_WARNING, ha,
2070 "[ERROR] Failed to allocate memory for adapter\n");
2071
e315cd28
AC		 2072 goto probe_hw_failed;
2073 }
2074
73208dfd 2075 req->max_q_depth = MAX_Q_DEPTH;
e315cd28 2076 if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
73208dfd
AC		 2077 req->max_q_depth = ql2xmaxqdepth;
2078
e315cd28
AC		 2079
2080 base_vha = qla2x00_create_host(sht, ha);
2081 if (!base_vha) {
2082 qla_printk(KERN_WARNING, ha,
2083 "[ERROR] Failed to allocate memory for scsi_host\n");
2084
a1541d5a 2085 ret = -ENOMEM;
6e9f21f3 2086 qla2x00_mem_free(ha);
2afa19a9
AC		 2087 qla2x00_free_req_que(ha, req);
2088 qla2x00_free_rsp_que(ha, rsp);
e315cd28 2089 goto probe_hw_failed;
1da177e4
LT		 2090 }
2091
e315cd28
AC		 2092 pci_set_drvdata(pdev, base_vha);
2093
e315cd28 2094 host = base_vha->host;
2afa19a9 2095 base_vha->req = req;
73208dfd
AC		 2096 host->can_queue = req->length + 128;
2097 if (IS_QLA2XXX_MIDTYPE(ha))
e315cd28 2098 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
73208dfd 2099 else
e315cd28
AC		 2100 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2101 base_vha->vp_idx;
58548cb5
GM		 2102
2103 /* Set the SG table size based on ISP type */
2104 if (!IS_FWI2_CAPABLE(ha)) {
2105 if (IS_QLA2100(ha))
2106 host->sg_tablesize = 32;
2107 } else {
2108 if (!IS_QLA82XX(ha))
2109 host->sg_tablesize = QLA_SG_ALL;
2110 }
2111
e315cd28
AC		 2112 host->max_id = max_id;
2113 host->this_id = 255;
2114 host->cmd_per_lun = 3;
2115 host->unique_id = host->host_no;
0c470874
AE		 2116 if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif)
2117 host->max_cmd_len = 32;
2118 else
2119 host->max_cmd_len = MAX_CMDSZ;
e315cd28
AC		 2120 host->max_channel = MAX_BUSES - 1;
2121 host->max_lun = MAX_LUNS;
2122 host->transportt = qla2xxx_transport_template;
9a069e19 2123 sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
e315cd28 2124
73208dfd
AC		 2125 /* Set up the irqs */
2126 ret = qla2x00_request_irqs(ha, rsp);
2127 if (ret)
6e9f21f3 2128 goto probe_init_failed;
90a86fc0
JC		 2129
2130 pci_save_state(pdev);
2131
73208dfd 2132 /* Alloc arrays of request and response ring ptrs */
7163ea81 2133que_init:
73208dfd
AC		 2134 if (!qla2x00_alloc_queues(ha)) {
2135 qla_printk(KERN_WARNING, ha,
2136 "[ERROR] Failed to allocate memory for queue"
2137 " pointers\n");
6e9f21f3 2138 goto probe_init_failed;
73208dfd 2139 }
a9083016 2140
73208dfd
AC		 2141 ha->rsp_q_map[0] = rsp;
2142 ha->req_q_map[0] = req;
2afa19a9
AC		 2143 rsp->req = req;
2144 req->rsp = rsp;
2145 set_bit(0, ha->req_qid_map);
2146 set_bit(0, ha->rsp_qid_map);
08029990
AV		 2147 /* FWI2-capable only. */
2148 req->req_q_in = &ha->iobase->isp24.req_q_in;
2149 req->req_q_out = &ha->iobase->isp24.req_q_out;
2150 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2151 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
17d98630 2152 if (ha->mqenable) {
08029990
AV		 2153 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2154 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2155 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2156 rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out;
17d98630
AC		 2157 }
2158
a9083016
GM		 2159 if (IS_QLA82XX(ha)) {
2160 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2161 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2162 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2163 }
2164
e315cd28 2165 if (qla2x00_initialize_adapter(base_vha)) {
1da177e4
LT		 2166 qla_printk(KERN_WARNING, ha,
2167 "Failed to initialize adapter\n");
2168
2169 DEBUG2(printk("scsi(%ld): Failed to initialize adapter - "
2170 "Adapter flags %x.\n",
e315cd28 2171 base_vha->host_no, base_vha->device_flags));
1da177e4 2172
a9083016
GM		 2173 if (IS_QLA82XX(ha)) {
2174 qla82xx_idc_lock(ha);
2175 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2176 QLA82XX_DEV_FAILED);
2177 qla82xx_idc_unlock(ha);
2178 qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
2179 }
2180
a1541d5a 2181 ret = -ENODEV;
1da177e4
LT		 2182 goto probe_failed;
2183 }
2184
7163ea81
AC		 2185 if (ha->mqenable) {
2186 if (qla25xx_setup_mode(base_vha)) {
68ca949c
AC		 2187 qla_printk(KERN_WARNING, ha,
2188 "Can't create queues, falling back to single"
2189 " queue mode\n");
7163ea81
AC		 2190 goto que_init;
2191 }
2192 }
68ca949c 2193
cbc8eb67
AV		 2194 if (ha->flags.running_gold_fw)
2195 goto skip_dpc;
2196
1da177e4
LT		 2197 /*
2198 * Startup the kernel thread for this host adapter
2199 */
39a11240 2200 ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
e315cd28 2201 "%s_dpc", base_vha->host_str);
39a11240 2202 if (IS_ERR(ha->dpc_thread)) {
1da177e4
LT		 2203 qla_printk(KERN_WARNING, ha,
2204 "Unable to start DPC thread!\n");
39a11240 2205 ret = PTR_ERR(ha->dpc_thread);
1da177e4
LT		 2206 goto probe_failed;
2207 }
1da177e4 2208
cbc8eb67 2209skip_dpc:
e315cd28
AC		 2210 list_add_tail(&base_vha->list, &ha->vp_list);
2211 base_vha->host->irq = ha->pdev->irq;
1da177e4
LT		 2212
2213 /* Initialized the timer */
e315cd28 2214 qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
1da177e4
LT		 2215
2216 DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n",
e315cd28 2217 base_vha->host_no, ha));
d19044c3 2218
ba77ef53 2219 if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif) {
bad75002
AE		 2220 if (ha->fw_attributes & BIT_4) {
2221 base_vha->flags.difdix_supported = 1;
2222 DEBUG18(qla_printk(KERN_INFO, ha,
2223 "Registering for DIF/DIX type 1 and 3"
2224 " protection.\n"));
2225 scsi_host_set_prot(host,
2226 SHOST_DIF_TYPE1_PROTECTION
0c470874 2227 | SHOST_DIF_TYPE2_PROTECTION
bad75002
AE		 2228 | SHOST_DIF_TYPE3_PROTECTION
2229 | SHOST_DIX_TYPE1_PROTECTION
0c470874 2230 | SHOST_DIX_TYPE2_PROTECTION
bad75002
AE		 2231 | SHOST_DIX_TYPE3_PROTECTION);
2232 scsi_host_set_guard(host, SHOST_DIX_GUARD_CRC);
2233 } else
2234 base_vha->flags.difdix_supported = 0;
2235 }
2236
a9083016
GM		 2237 ha->isp_ops->enable_intrs(ha);
2238
a1541d5a
AV		 2239 ret = scsi_add_host(host, &pdev->dev);
2240 if (ret)
2241 goto probe_failed;
2242
1486400f
MR		 2243 base_vha->flags.init_done = 1;
2244 base_vha->flags.online = 1;
2245
1e99e33a
AV		 2246 scsi_scan_host(host);
2247
e315cd28 2248 qla2x00_alloc_sysfs_attr(base_vha);
a1541d5a 2249
e315cd28 2250 qla2x00_init_host_attr(base_vha);
a1541d5a 2251
e315cd28 2252 qla2x00_dfs_setup(base_vha);
df613b96 2253
1da177e4
LT		 2254 qla_printk(KERN_INFO, ha, "\n"
2255 " QLogic Fibre Channel HBA Driver: %s\n"
2256 " QLogic %s - %s\n"
5433383e
AV		 2257 " ISP%04X: %s @ %s hdma%c, host#=%ld, fw=%s\n",
2258 qla2x00_version_str, ha->model_number,
e315cd28
AC		 2259 ha->model_desc ? ha->model_desc : "", pdev->device,
2260 ha->isp_ops->pci_info_str(base_vha, pci_info), pci_name(pdev),
2261 ha->flags.enable_64bit_addressing ? '+' : '-', base_vha->host_no,
2262 ha->isp_ops->fw_version_str(base_vha, fw_str));
1da177e4 2263
1da177e4
LT		 2264 return 0;
2265
6e9f21f3 2266probe_init_failed:
2afa19a9
AC		 2267 qla2x00_free_req_que(ha, req);
2268 qla2x00_free_rsp_que(ha, rsp);
2269 ha->max_req_queues = ha->max_rsp_queues = 0;
6e9f21f3 2270
1da177e4 2271probe_failed:
b9978769
AV		 2272 if (base_vha->timer_active)
2273 qla2x00_stop_timer(base_vha);
2274 base_vha->flags.online = 0;
2275 if (ha->dpc_thread) {
2276 struct task_struct *t = ha->dpc_thread;
2277
2278 ha->dpc_thread = NULL;
2279 kthread_stop(t);
2280 }
2281
e315cd28 2282 qla2x00_free_device(base_vha);
1da177e4 2283
e315cd28 2284 scsi_host_put(base_vha->host);
1da177e4 2285
e315cd28 2286probe_hw_failed:
a9083016
GM		 2287 if (IS_QLA82XX(ha)) {
2288 qla82xx_idc_lock(ha);
2289 qla82xx_clear_drv_active(ha);
2290 qla82xx_idc_unlock(ha);
2291 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2292 if (!ql2xdbwr)
2293 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2294 } else {
2295 if (ha->iobase)
2296 iounmap(ha->iobase);
2297 }
e315cd28
AC		 2298 pci_release_selected_regions(ha->pdev, ha->bars);
2299 kfree(ha);
2300 ha = NULL;
1da177e4 2301
a1541d5a 2302probe_out:
e315cd28 2303 pci_disable_device(pdev);
a1541d5a 2304 return ret;
1da177e4 2305}
1da177e4 2306
e30d1756
MI		 2307static void
2308qla2x00_shutdown(struct pci_dev *pdev)
2309{
2310 scsi_qla_host_t *vha;
2311 struct qla_hw_data *ha;
2312
2313 vha = pci_get_drvdata(pdev);
2314 ha = vha->hw;
2315
2316 /* Turn-off FCE trace */
2317 if (ha->flags.fce_enabled) {
2318 qla2x00_disable_fce_trace(vha, NULL, NULL);
2319 ha->flags.fce_enabled = 0;
2320 }
2321
2322 /* Turn-off EFT trace */
2323 if (ha->eft)
2324 qla2x00_disable_eft_trace(vha);
2325
2326 /* Stop currently executing firmware. */
2327 qla2x00_try_to_stop_firmware(vha);
2328
2329 /* Turn adapter off line */
2330 vha->flags.online = 0;
2331
2332 /* turn-off interrupts on the card */
2333 if (ha->interrupts_on) {
2334 vha->flags.init_done = 0;
2335 ha->isp_ops->disable_intrs(ha);
2336 }
2337
2338 qla2x00_free_irqs(vha);
2339
2340 qla2x00_free_fw_dump(ha);
2341}
2342
4c993f76 2343static void
7ee61397 2344qla2x00_remove_one(struct pci_dev *pdev)
1da177e4 2345{
feafb7b1 2346 scsi_qla_host_t *base_vha, *vha;
e315cd28 2347 struct qla_hw_data *ha;
feafb7b1 2348 unsigned long flags;
e315cd28
AC		 2349
2350 base_vha = pci_get_drvdata(pdev);
2351 ha = base_vha->hw;
2352
feafb7b1
AE		 2353 spin_lock_irqsave(&ha->vport_slock, flags);
2354 list_for_each_entry(vha, &ha->vp_list, list) {
2355 atomic_inc(&vha->vref_count);
2356
8ae598d0 2357 if (vha->fc_vport) {
feafb7b1
AE		 2358 spin_unlock_irqrestore(&ha->vport_slock, flags);
2359
e315cd28 2360 fc_vport_terminate(vha->fc_vport);
feafb7b1
AE		 2361
2362 spin_lock_irqsave(&ha->vport_slock, flags);
2363 }
2364
2365 atomic_dec(&vha->vref_count);
e315cd28 2366 }
feafb7b1 2367 spin_unlock_irqrestore(&ha->vport_slock, flags);
1da177e4 2368
e315cd28 2369 set_bit(UNLOADING, &base_vha->dpc_flags);
1da177e4 2370
b9978769
AV		 2371 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
2372
e315cd28 2373 qla2x00_dfs_remove(base_vha);
c795c1e4 2374
e315cd28 2375 qla84xx_put_chip(base_vha);
c795c1e4 2376
b9978769
AV		 2377 /* Disable timer */
2378 if (base_vha->timer_active)
2379 qla2x00_stop_timer(base_vha);
2380
2381 base_vha->flags.online = 0;
2382
68ca949c
AC		 2383 /* Flush the work queue and remove it */
2384 if (ha->wq) {
2385 flush_workqueue(ha->wq);
2386 destroy_workqueue(ha->wq);
2387 ha->wq = NULL;
2388 }
2389
b9978769
AV		 2390 /* Kill the kernel thread for this host */
2391 if (ha->dpc_thread) {
2392 struct task_struct *t = ha->dpc_thread;
2393
2394 /*
2395 * qla2xxx_wake_dpc checks for ->dpc_thread
2396 * so we need to zero it out.
2397 */
2398 ha->dpc_thread = NULL;
2399 kthread_stop(t);
2400 }
2401
e315cd28 2402 qla2x00_free_sysfs_attr(base_vha);
df613b96 2403
e315cd28 2404 fc_remove_host(base_vha->host);
4d4df193 2405
e315cd28 2406 scsi_remove_host(base_vha->host);
1da177e4 2407
e315cd28 2408 qla2x00_free_device(base_vha);
bdf79621 2409
e315cd28 2410 scsi_host_put(base_vha->host);
1da177e4 2411
a9083016 2412 if (IS_QLA82XX(ha)) {
b963752f
GM		 2413 qla82xx_idc_lock(ha);
2414 qla82xx_clear_drv_active(ha);
2415 qla82xx_idc_unlock(ha);
2416
a9083016
GM		 2417 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2418 if (!ql2xdbwr)
2419 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2420 } else {
2421 if (ha->iobase)
2422 iounmap(ha->iobase);
1da177e4 2423
a9083016
GM		 2424 if (ha->mqiobase)
2425 iounmap(ha->mqiobase);
2426 }
73208dfd 2427
e315cd28
AC		 2428 pci_release_selected_regions(ha->pdev, ha->bars);
2429 kfree(ha);
2430 ha = NULL;
1da177e4 2431
90a86fc0
JC		 2432 pci_disable_pcie_error_reporting(pdev);
2433
665db93b 2434 pci_disable_device(pdev);
1da177e4
LT		 2435 pci_set_drvdata(pdev, NULL);
2436}
1da177e4
LT		 2437
2438static void
e315cd28 2439qla2x00_free_device(scsi_qla_host_t *vha)
1da177e4 2440{
e315cd28 2441 struct qla_hw_data *ha = vha->hw;
1da177e4 2442
85880801
AV		 2443 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
2444
2445 /* Disable timer */
2446 if (vha->timer_active)
2447 qla2x00_stop_timer(vha);
2448
2449 /* Kill the kernel thread for this host */
2450 if (ha->dpc_thread) {
2451 struct task_struct *t = ha->dpc_thread;
2452
2453 /*
2454 * qla2xxx_wake_dpc checks for ->dpc_thread
2455 * so we need to zero it out.
2456 */
2457 ha->dpc_thread = NULL;
2458 kthread_stop(t);
2459 }
2460
2afa19a9
AC		 2461 qla25xx_delete_queues(vha);
2462
df613b96 2463 if (ha->flags.fce_enabled)
e315cd28 2464 qla2x00_disable_fce_trace(vha, NULL, NULL);
df613b96 2465
a7a167bf 2466 if (ha->eft)
e315cd28 2467 qla2x00_disable_eft_trace(vha);
a7a167bf 2468
f6ef3b18 2469 /* Stop currently executing firmware. */
e315cd28 2470 qla2x00_try_to_stop_firmware(vha);
1da177e4 2471
85880801
AV		 2472 vha->flags.online = 0;
2473
f6ef3b18 2474 /* turn-off interrupts on the card */
a9083016
GM		 2475 if (ha->interrupts_on) {
2476 vha->flags.init_done = 0;
fd34f556 2477 ha->isp_ops->disable_intrs(ha);
a9083016 2478 }
f6ef3b18 2479
e315cd28 2480 qla2x00_free_irqs(vha);
1da177e4 2481
8867048b
CD		 2482 qla2x00_free_fcports(vha);
2483
e315cd28 2484 qla2x00_mem_free(ha);
73208dfd
AC		 2485
2486 qla2x00_free_queues(ha);
1da177e4
LT		 2487}
2488
8867048b
CD		 2489void qla2x00_free_fcports(struct scsi_qla_host *vha)
2490{
2491 fc_port_t *fcport, *tfcport;
2492
2493 list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
2494 list_del(&fcport->list);
2495 kfree(fcport);
2496 fcport = NULL;
2497 }
2498}
2499
d97994dc 2500static inline void
e315cd28 2501qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
d97994dc 2502 int defer)
2503{
d97994dc 2504 struct fc_rport *rport;
67becc00 2505 scsi_qla_host_t *base_vha;
d97994dc 2506
2507 if (!fcport->rport)
2508 return;
2509
2510 rport = fcport->rport;
2511 if (defer) {
67becc00 2512 base_vha = pci_get_drvdata(vha->hw->pdev);
e315cd28 2513 spin_lock_irq(vha->host->host_lock);
d97994dc 2514 fcport->drport = rport;
e315cd28 2515 spin_unlock_irq(vha->host->host_lock);
67becc00
AV		 2516 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
2517 qla2xxx_wake_dpc(base_vha);
5f3a9a20 2518 } else
d97994dc 2519 fc_remote_port_delete(rport);
d97994dc 2520}
2521
1da177e4
LT		 2522/*
2523 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
2524 *
2525 * Input: ha = adapter block pointer. fcport = port structure pointer.
2526 *
2527 * Return: None.
2528 *
2529 * Context:
2530 */
e315cd28 2531void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
d97994dc 2532 int do_login, int defer)
1da177e4 2533{
2c3dfe3f 2534 if (atomic_read(&fcport->state) == FCS_ONLINE &&
e315cd28
AC		 2535 vha->vp_idx == fcport->vp_idx) {
2536 atomic_set(&fcport->state, FCS_DEVICE_LOST);
2537 qla2x00_schedule_rport_del(vha, fcport, defer);
2538 }
fa2a1ce5 2539 /*
1da177e4
LT		 2540 * We may need to retry the login, so don't change the state of the
2541 * port but do the retries.
2542 */
2543 if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
2544 atomic_set(&fcport->state, FCS_DEVICE_LOST);
2545
2546 if (!do_login)
2547 return;
2548
2549 if (fcport->login_retry == 0) {
e315cd28
AC		 2550 fcport->login_retry = vha->hw->login_retry_count;
2551 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1da177e4
LT		 2552
2553 DEBUG(printk("scsi(%ld): Port login retry: "
2554 "%02x%02x%02x%02x%02x%02x%02x%02x, "
2555 "id = 0x%04x retry cnt=%d\n",
e315cd28 2556 vha->host_no,
1da177e4
LT		 2557 fcport->port_name[0],
2558 fcport->port_name[1],
2559 fcport->port_name[2],
2560 fcport->port_name[3],
2561 fcport->port_name[4],
2562 fcport->port_name[5],
2563 fcport->port_name[6],
2564 fcport->port_name[7],
2565 fcport->loop_id,
2566 fcport->login_retry));
2567 }
2568}
2569
2570/*
2571 * qla2x00_mark_all_devices_lost
2572 * Updates fcport state when device goes offline.
2573 *
2574 * Input:
2575 * ha = adapter block pointer.
2576 * fcport = port structure pointer.
2577 *
2578 * Return:
2579 * None.
2580 *
2581 * Context:
2582 */
2583void
e315cd28 2584qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
1da177e4
LT		 2585{
2586 fc_port_t *fcport;
2587
e315cd28 2588 list_for_each_entry(fcport, &vha->vp_fcports, list) {
0d6e61bc 2589 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vp_idx)
1da177e4 2590 continue;
0d6e61bc 2591
1da177e4
LT		 2592 /*
2593 * No point in marking the device as lost, if the device is
2594 * already DEAD.
2595 */
2596 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
2597 continue;
e315cd28 2598 if (atomic_read(&fcport->state) == FCS_ONLINE) {
38170fa8 2599 atomic_set(&fcport->state, FCS_DEVICE_LOST);
0d6e61bc
AV		 2600 if (defer)
2601 qla2x00_schedule_rport_del(vha, fcport, defer);
2602 else if (vha->vp_idx == fcport->vp_idx)
2603 qla2x00_schedule_rport_del(vha, fcport, defer);
2604 }
1da177e4
LT		 2605 }
2606}
2607
2608/*
2609* qla2x00_mem_alloc
2610* Allocates adapter memory.
2611*
2612* Returns:
2613* 0 = success.
e8711085 2614* !0 = failure.
1da177e4 2615*/
e8711085 2616static int
73208dfd
AC		 2617qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
2618 struct req_que **req, struct rsp_que **rsp)
1da177e4
LT		 2619{
2620 char name[16];
1da177e4 2621
e8711085 2622 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
e315cd28 2623 &ha->init_cb_dma, GFP_KERNEL);
e8711085 2624 if (!ha->init_cb)
e315cd28 2625 goto fail;
e8711085 2626
e315cd28
AC		 2627 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, GID_LIST_SIZE,
2628 &ha->gid_list_dma, GFP_KERNEL);
2629 if (!ha->gid_list)
e8711085 2630 goto fail_free_init_cb;
1da177e4 2631
e8711085
AV		 2632 ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
2633 if (!ha->srb_mempool)
e315cd28 2634 goto fail_free_gid_list;
e8711085 2635
a9083016
GM		 2636 if (IS_QLA82XX(ha)) {
2637 /* Allocate cache for CT6 Ctx. */
2638 if (!ctx_cachep) {
2639 ctx_cachep = kmem_cache_create("qla2xxx_ctx",
2640 sizeof(struct ct6_dsd), 0,
2641 SLAB_HWCACHE_ALIGN, NULL);
2642 if (!ctx_cachep)
2643 goto fail_free_gid_list;
2644 }
2645 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
2646 ctx_cachep);
2647 if (!ha->ctx_mempool)
2648 goto fail_free_srb_mempool;
2649 }
2650
e8711085
AV		 2651 /* Get memory for cached NVRAM */
2652 ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
2653 if (!ha->nvram)
a9083016 2654 goto fail_free_ctx_mempool;
e8711085 2655
e315cd28
AC		 2656 snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
2657 ha->pdev->device);
2658 ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2659 DMA_POOL_SIZE, 8, 0);
2660 if (!ha->s_dma_pool)
2661 goto fail_free_nvram;
2662
bad75002 2663 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM		 2664 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2665 DSD_LIST_DMA_POOL_SIZE, 8, 0);
2666 if (!ha->dl_dma_pool) {
2667 qla_printk(KERN_WARNING, ha,
2668 "Memory Allocation failed - dl_dma_pool\n");
2669 goto fail_s_dma_pool;
2670 }
2671
2672 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2673 FCP_CMND_DMA_POOL_SIZE, 8, 0);
2674 if (!ha->fcp_cmnd_dma_pool) {
2675 qla_printk(KERN_WARNING, ha,
2676 "Memory Allocation failed - fcp_cmnd_dma_pool\n");
2677 goto fail_dl_dma_pool;
2678 }
2679 }
2680
e8711085
AV		 2681 /* Allocate memory for SNS commands */
2682 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
e315cd28 2683 /* Get consistent memory allocated for SNS commands */
e8711085 2684 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
e315cd28 2685 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
e8711085 2686 if (!ha->sns_cmd)
e315cd28 2687 goto fail_dma_pool;
e8711085 2688 } else {
e315cd28 2689 /* Get consistent memory allocated for MS IOCB */
e8711085 2690 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
e315cd28 2691 &ha->ms_iocb_dma);
e8711085 2692 if (!ha->ms_iocb)
e315cd28
AC		 2693 goto fail_dma_pool;
2694 /* Get consistent memory allocated for CT SNS commands */
e8711085 2695 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
e315cd28 2696 sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
e8711085
AV		 2697 if (!ha->ct_sns)
2698 goto fail_free_ms_iocb;
1da177e4
LT		 2699 }
2700
e315cd28 2701 /* Allocate memory for request ring */
73208dfd
AC		 2702 *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
2703 if (!*req) {
e315cd28
AC		 2704 DEBUG(printk("Unable to allocate memory for req\n"));
2705 goto fail_req;
2706 }
73208dfd
AC		 2707 (*req)->length = req_len;
2708 (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
2709 ((*req)->length + 1) * sizeof(request_t),
2710 &(*req)->dma, GFP_KERNEL);
2711 if (!(*req)->ring) {
e315cd28
AC		 2712 DEBUG(printk("Unable to allocate memory for req_ring\n"));
2713 goto fail_req_ring;
2714 }
2715 /* Allocate memory for response ring */
73208dfd
AC		 2716 *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
2717 if (!*rsp) {
2718 qla_printk(KERN_WARNING, ha,
2719 "Unable to allocate memory for rsp\n");
e315cd28
AC		 2720 goto fail_rsp;
2721 }
73208dfd
AC		 2722 (*rsp)->hw = ha;
2723 (*rsp)->length = rsp_len;
2724 (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
2725 ((*rsp)->length + 1) * sizeof(response_t),
2726 &(*rsp)->dma, GFP_KERNEL);
2727 if (!(*rsp)->ring) {
2728 qla_printk(KERN_WARNING, ha,
2729 "Unable to allocate memory for rsp_ring\n");
e315cd28
AC		 2730 goto fail_rsp_ring;
2731 }
73208dfd
AC		 2732 (*req)->rsp = *rsp;
2733 (*rsp)->req = *req;
2734 /* Allocate memory for NVRAM data for vports */
2735 if (ha->nvram_npiv_size) {
2736 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
2737 ha->nvram_npiv_size, GFP_KERNEL);
2738 if (!ha->npiv_info) {
2739 qla_printk(KERN_WARNING, ha,
2740 "Unable to allocate memory for npiv info\n");
2741 goto fail_npiv_info;
2742 }
2743 } else
2744 ha->npiv_info = NULL;
e8711085 2745
b64b0e8f 2746 /* Get consistent memory allocated for EX-INIT-CB. */
a9083016 2747 if (IS_QLA8XXX_TYPE(ha)) {
b64b0e8f
AV		 2748 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2749 &ha->ex_init_cb_dma);
2750 if (!ha->ex_init_cb)
2751 goto fail_ex_init_cb;
2752 }
2753
a9083016
GM		 2754 INIT_LIST_HEAD(&ha->gbl_dsd_list);
2755
5ff1d584
AV		 2756 /* Get consistent memory allocated for Async Port-Database. */
2757 if (!IS_FWI2_CAPABLE(ha)) {
2758 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2759 &ha->async_pd_dma);
2760 if (!ha->async_pd)
2761 goto fail_async_pd;
2762 }
2763
e315cd28
AC		 2764 INIT_LIST_HEAD(&ha->vp_list);
2765 return 1;
2766
5ff1d584
AV		 2767fail_async_pd:
2768 dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
b64b0e8f
AV		 2769fail_ex_init_cb:
2770 kfree(ha->npiv_info);
73208dfd
AC		 2771fail_npiv_info:
2772 dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
2773 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
2774 (*rsp)->ring = NULL;
2775 (*rsp)->dma = 0;
e315cd28 2776fail_rsp_ring:
73208dfd 2777 kfree(*rsp);
e315cd28 2778fail_rsp:
73208dfd
AC		 2779 dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
2780 sizeof(request_t), (*req)->ring, (*req)->dma);
2781 (*req)->ring = NULL;
2782 (*req)->dma = 0;
e315cd28 2783fail_req_ring:
73208dfd 2784 kfree(*req);
e315cd28
AC		 2785fail_req:
2786 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
2787 ha->ct_sns, ha->ct_sns_dma);
2788 ha->ct_sns = NULL;
2789 ha->ct_sns_dma = 0;
e8711085
AV		 2790fail_free_ms_iocb:
2791 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
2792 ha->ms_iocb = NULL;
2793 ha->ms_iocb_dma = 0;
e315cd28 2794fail_dma_pool:
bad75002 2795 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM		 2796 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
2797 ha->fcp_cmnd_dma_pool = NULL;
2798 }
2799fail_dl_dma_pool:
bad75002 2800 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM		 2801 dma_pool_destroy(ha->dl_dma_pool);
2802 ha->dl_dma_pool = NULL;
2803 }
2804fail_s_dma_pool:
e315cd28
AC		 2805 dma_pool_destroy(ha->s_dma_pool);
2806 ha->s_dma_pool = NULL;
e8711085
AV		 2807fail_free_nvram:
2808 kfree(ha->nvram);
2809 ha->nvram = NULL;
a9083016
GM		 2810fail_free_ctx_mempool:
2811 mempool_destroy(ha->ctx_mempool);
2812 ha->ctx_mempool = NULL;
e8711085
AV		 2813fail_free_srb_mempool:
2814 mempool_destroy(ha->srb_mempool);
2815 ha->srb_mempool = NULL;
e8711085
AV		 2816fail_free_gid_list:
2817 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
e315cd28 2818 ha->gid_list_dma);
e8711085
AV		 2819 ha->gid_list = NULL;
2820 ha->gid_list_dma = 0;
e315cd28
AC		 2821fail_free_init_cb:
2822 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
2823 ha->init_cb_dma);
2824 ha->init_cb = NULL;
2825 ha->init_cb_dma = 0;
e8711085 2826fail:
e315cd28 2827 DEBUG(printk("%s: Memory allocation failure\n", __func__));
e8711085 2828 return -ENOMEM;
1da177e4
LT		 2829}
2830
2831/*
e30d1756
MI		 2832* qla2x00_free_fw_dump
2833* Frees fw dump stuff.
1da177e4
LT		 2834*
2835* Input:
e30d1756 2836* ha = adapter block pointer.
1da177e4 2837*/
a824ebb3 2838static void
e30d1756 2839qla2x00_free_fw_dump(struct qla_hw_data *ha)
1da177e4 2840{
df613b96
AV		 2841 if (ha->fce)
2842 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
e30d1756 2843 ha->fce_dma);
df613b96 2844
a7a167bf
AV		 2845 if (ha->fw_dump) {
2846 if (ha->eft)
2847 dma_free_coherent(&ha->pdev->dev,
e30d1756 2848 ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
a7a167bf
AV		 2849 vfree(ha->fw_dump);
2850 }
e30d1756
MI		 2851 ha->fce = NULL;
2852 ha->fce_dma = 0;
2853 ha->eft = NULL;
2854 ha->eft_dma = 0;
2855 ha->fw_dump = NULL;
2856 ha->fw_dumped = 0;
2857 ha->fw_dump_reading = 0;
2858}
2859
2860/*
2861* qla2x00_mem_free
2862* Frees all adapter allocated memory.
2863*
2864* Input:
2865* ha = adapter block pointer.
2866*/
2867static void
2868qla2x00_mem_free(struct qla_hw_data *ha)
2869{
2870 qla2x00_free_fw_dump(ha);
2871
2872 if (ha->srb_mempool)
2873 mempool_destroy(ha->srb_mempool);
a7a167bf 2874
11bbc1d8
AV		 2875 if (ha->dcbx_tlv)
2876 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
2877 ha->dcbx_tlv, ha->dcbx_tlv_dma);
2878
ce0423f4
AV		 2879 if (ha->xgmac_data)
2880 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
2881 ha->xgmac_data, ha->xgmac_data_dma);
2882
1da177e4
LT		 2883 if (ha->sns_cmd)
2884 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
e315cd28 2885 ha->sns_cmd, ha->sns_cmd_dma);
1da177e4
LT		 2886
2887 if (ha->ct_sns)
2888 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
e315cd28 2889 ha->ct_sns, ha->ct_sns_dma);
1da177e4 2890
88729e53
AV		 2891 if (ha->sfp_data)
2892 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
2893
ad0ecd61
JC		 2894 if (ha->edc_data)
2895 dma_pool_free(ha->s_dma_pool, ha->edc_data, ha->edc_data_dma);
2896
1da177e4
LT		 2897 if (ha->ms_iocb)
2898 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
2899
b64b0e8f 2900 if (ha->ex_init_cb)
a9083016
GM		 2901 dma_pool_free(ha->s_dma_pool,
2902 ha->ex_init_cb, ha->ex_init_cb_dma);
b64b0e8f 2903
5ff1d584
AV		 2904 if (ha->async_pd)
2905 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
2906
1da177e4
LT		 2907 if (ha->s_dma_pool)
2908 dma_pool_destroy(ha->s_dma_pool);
2909
1da177e4
LT		 2910 if (ha->gid_list)
2911 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
e315cd28 2912 ha->gid_list_dma);
1da177e4 2913
a9083016
GM		 2914 if (IS_QLA82XX(ha)) {
2915 if (!list_empty(&ha->gbl_dsd_list)) {
2916 struct dsd_dma *dsd_ptr, *tdsd_ptr;
2917
2918 /* clean up allocated prev pool */
2919 list_for_each_entry_safe(dsd_ptr,
2920 tdsd_ptr, &ha->gbl_dsd_list, list) {
2921 dma_pool_free(ha->dl_dma_pool,
2922 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
2923 list_del(&dsd_ptr->list);
2924 kfree(dsd_ptr);
2925 }
2926 }
2927 }
2928
2929 if (ha->dl_dma_pool)
2930 dma_pool_destroy(ha->dl_dma_pool);
2931
2932 if (ha->fcp_cmnd_dma_pool)
2933 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
2934
2935 if (ha->ctx_mempool)
2936 mempool_destroy(ha->ctx_mempool);
2937
e315cd28
AC		 2938 if (ha->init_cb)
2939 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
a9083016 2940 ha->init_cb, ha->init_cb_dma);
e315cd28
AC		 2941 vfree(ha->optrom_buffer);
2942 kfree(ha->nvram);
73208dfd 2943 kfree(ha->npiv_info);
1da177e4 2944
e8711085 2945 ha->srb_mempool = NULL;
a9083016 2946 ha->ctx_mempool = NULL;
1da177e4
LT		 2947 ha->sns_cmd = NULL;
2948 ha->sns_cmd_dma = 0;
2949 ha->ct_sns = NULL;
2950 ha->ct_sns_dma = 0;
2951 ha->ms_iocb = NULL;
2952 ha->ms_iocb_dma = 0;
1da177e4
LT		 2953 ha->init_cb = NULL;
2954 ha->init_cb_dma = 0;
b64b0e8f
AV		 2955 ha->ex_init_cb = NULL;
2956 ha->ex_init_cb_dma = 0;
5ff1d584
AV		 2957 ha->async_pd = NULL;
2958 ha->async_pd_dma = 0;
1da177e4
LT		 2959
2960 ha->s_dma_pool = NULL;
a9083016
GM		 2961 ha->dl_dma_pool = NULL;
2962 ha->fcp_cmnd_dma_pool = NULL;
1da177e4 2963
1da177e4
LT		 2964 ha->gid_list = NULL;
2965 ha->gid_list_dma = 0;
e315cd28 2966}
1da177e4 2967
e315cd28
AC		 2968struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
2969 struct qla_hw_data *ha)
2970{
2971 struct Scsi_Host *host;
2972 struct scsi_qla_host *vha = NULL;
854165f4 2973
e315cd28
AC		 2974 host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
2975 if (host == NULL) {
2976 printk(KERN_WARNING
2977 "qla2xxx: Couldn't allocate host from scsi layer!\n");
2978 goto fail;
2979 }
2980
2981 /* Clear our data area */
2982 vha = shost_priv(host);
2983 memset(vha, 0, sizeof(scsi_qla_host_t));
2984
2985 vha->host = host;
2986 vha->host_no = host->host_no;
2987 vha->hw = ha;
2988
2989 INIT_LIST_HEAD(&vha->vp_fcports);
2990 INIT_LIST_HEAD(&vha->work_list);
2991 INIT_LIST_HEAD(&vha->list);
2992
f999f4c1
AV		 2993 spin_lock_init(&vha->work_lock);
2994
e315cd28
AC		 2995 sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
2996 return vha;
2997
2998fail:
2999 return vha;
1da177e4
LT		 3000}
3001
01ef66bb 3002static struct qla_work_evt *
f999f4c1 3003qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
0971de7f
AV		 3004{
3005 struct qla_work_evt *e;
feafb7b1
AE		 3006 uint8_t bail;
3007
3008 QLA_VHA_MARK_BUSY(vha, bail);
3009 if (bail)
3010 return NULL;
0971de7f 3011
f999f4c1 3012 e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
feafb7b1
AE		 3013 if (!e) {
3014 QLA_VHA_MARK_NOT_BUSY(vha);
0971de7f 3015 return NULL;
feafb7b1 3016 }
0971de7f
AV		 3017
3018 INIT_LIST_HEAD(&e->list);
3019 e->type = type;
3020 e->flags = QLA_EVT_FLAG_FREE;
3021 return e;
3022}
3023
01ef66bb 3024static int
f999f4c1 3025qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
0971de7f 3026{
f999f4c1 3027 unsigned long flags;
0971de7f 3028
f999f4c1 3029 spin_lock_irqsave(&vha->work_lock, flags);
e315cd28 3030 list_add_tail(&e->list, &vha->work_list);
f999f4c1 3031 spin_unlock_irqrestore(&vha->work_lock, flags);
e315cd28 3032 qla2xxx_wake_dpc(vha);
f999f4c1 3033
0971de7f
AV		 3034 return QLA_SUCCESS;
3035}
3036
3037int
e315cd28 3038qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
0971de7f
AV		 3039 u32 data)
3040{
3041 struct qla_work_evt *e;
3042
f999f4c1 3043 e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
0971de7f
AV		 3044 if (!e)
3045 return QLA_FUNCTION_FAILED;
3046
3047 e->u.aen.code = code;
3048 e->u.aen.data = data;
f999f4c1 3049 return qla2x00_post_work(vha, e);
0971de7f
AV		 3050}
3051
8a659571
AV		 3052int
3053qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3054{
3055 struct qla_work_evt *e;
3056
f999f4c1 3057 e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
8a659571
AV		 3058 if (!e)
3059 return QLA_FUNCTION_FAILED;
3060
3061 memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
f999f4c1 3062 return qla2x00_post_work(vha, e);
8a659571
AV		 3063}
3064
ac280b67
AV		 3065#define qla2x00_post_async_work(name, type) \
3066int qla2x00_post_async_##name##_work( \
3067 struct scsi_qla_host *vha, \
3068 fc_port_t *fcport, uint16_t *data) \
3069{ \
3070 struct qla_work_evt *e; \
3071 \
3072 e = qla2x00_alloc_work(vha, type); \
3073 if (!e) \
3074 return QLA_FUNCTION_FAILED; \
3075 \
3076 e->u.logio.fcport = fcport; \
3077 if (data) { \
3078 e->u.logio.data[0] = data[0]; \
3079 e->u.logio.data[1] = data[1]; \
3080 } \
3081 return qla2x00_post_work(vha, e); \
3082}
3083
3084qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3085qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3086qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3087qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
5ff1d584
AV		 3088qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3089qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
ac280b67 3090
3420d36c
AV		 3091int
3092qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3093{
3094 struct qla_work_evt *e;
3095
3096 e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3097 if (!e)
3098 return QLA_FUNCTION_FAILED;
3099
3100 e->u.uevent.code = code;
3101 return qla2x00_post_work(vha, e);
3102}
3103
3104static void
3105qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3106{
3107 char event_string[40];
3108 char *envp[] = { event_string, NULL };
3109
3110 switch (code) {
3111 case QLA_UEVENT_CODE_FW_DUMP:
3112 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3113 vha->host_no);
3114 break;
3115 default:
3116 /* do nothing */
3117 break;
3118 }
3119 kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3120}
3121
ac280b67 3122void
e315cd28 3123qla2x00_do_work(struct scsi_qla_host *vha)
0971de7f 3124{
f999f4c1
AV		 3125 struct qla_work_evt *e, *tmp;
3126 unsigned long flags;
3127 LIST_HEAD(work);
0971de7f 3128
f999f4c1
AV		 3129 spin_lock_irqsave(&vha->work_lock, flags);
3130 list_splice_init(&vha->work_list, &work);
3131 spin_unlock_irqrestore(&vha->work_lock, flags);
3132
3133 list_for_each_entry_safe(e, tmp, &work, list) {
0971de7f 3134 list_del_init(&e->list);
0971de7f
AV		 3135
3136 switch (e->type) {
3137 case QLA_EVT_AEN:
e315cd28 3138 fc_host_post_event(vha->host, fc_get_event_number(),
0971de7f
AV		 3139 e->u.aen.code, e->u.aen.data);
3140 break;
8a659571
AV		 3141 case QLA_EVT_IDC_ACK:
3142 qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3143 break;
ac280b67
AV		 3144 case QLA_EVT_ASYNC_LOGIN:
3145 qla2x00_async_login(vha, e->u.logio.fcport,
3146 e->u.logio.data);
3147 break;
3148 case QLA_EVT_ASYNC_LOGIN_DONE:
3149 qla2x00_async_login_done(vha, e->u.logio.fcport,
3150 e->u.logio.data);
3151 break;
3152 case QLA_EVT_ASYNC_LOGOUT:
3153 qla2x00_async_logout(vha, e->u.logio.fcport);
3154 break;
3155 case QLA_EVT_ASYNC_LOGOUT_DONE:
3156 qla2x00_async_logout_done(vha, e->u.logio.fcport,
3157 e->u.logio.data);
3158 break;
5ff1d584
AV		 3159 case QLA_EVT_ASYNC_ADISC:
3160 qla2x00_async_adisc(vha, e->u.logio.fcport,
3161 e->u.logio.data);
3162 break;
3163 case QLA_EVT_ASYNC_ADISC_DONE:
3164 qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3165 e->u.logio.data);
3166 break;
3420d36c
AV		 3167 case QLA_EVT_UEVENT:
3168 qla2x00_uevent_emit(vha, e->u.uevent.code);
3169 break;
0971de7f
AV		 3170 }
3171 if (e->flags & QLA_EVT_FLAG_FREE)
3172 kfree(e);
feafb7b1
AE		 3173
3174 /* For each work completed decrement vha ref count */
3175 QLA_VHA_MARK_NOT_BUSY(vha);
e315cd28 3176 }
e315cd28 3177}
f999f4c1 3178
e315cd28
AC		 3179/* Relogins all the fcports of a vport
3180 * Context: dpc thread
3181 */
3182void qla2x00_relogin(struct scsi_qla_host *vha)
3183{
3184 fc_port_t *fcport;
c6b2fca8 3185 int status;
e315cd28
AC		 3186 uint16_t next_loopid = 0;
3187 struct qla_hw_data *ha = vha->hw;
ac280b67 3188 uint16_t data[2];
e315cd28
AC		 3189
3190 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3191 /*
3192 * If the port is not ONLINE then try to login
3193 * to it if we haven't run out of retries.
3194 */
5ff1d584
AV		 3195 if (atomic_read(&fcport->state) != FCS_ONLINE &&
3196 fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
ac280b67 3197 fcport->login_retry--;
e315cd28 3198 if (fcport->flags & FCF_FABRIC_DEVICE) {
f08b7251 3199 if (fcport->flags & FCF_FCP2_DEVICE)
e315cd28
AC		 3200 ha->isp_ops->fabric_logout(vha,
3201 fcport->loop_id,
3202 fcport->d_id.b.domain,
3203 fcport->d_id.b.area,
3204 fcport->d_id.b.al_pa);
3205
ac280b67 3206 if (IS_ALOGIO_CAPABLE(ha)) {
5ff1d584 3207 fcport->flags |= FCF_ASYNC_SENT;
ac280b67
AV		 3208 data[0] = 0;
3209 data[1] = QLA_LOGIO_LOGIN_RETRIED;
3210 status = qla2x00_post_async_login_work(
3211 vha, fcport, data);
3212 if (status == QLA_SUCCESS)
3213 continue;
3214 /* Attempt a retry. */
3215 status = 1;
3216 } else
3217 status = qla2x00_fabric_login(vha,
3218 fcport, &next_loopid);
e315cd28
AC		 3219 } else
3220 status = qla2x00_local_device_login(vha,
3221 fcport);
3222
e315cd28
AC		 3223 if (status == QLA_SUCCESS) {
3224 fcport->old_loop_id = fcport->loop_id;
3225
3226 DEBUG(printk("scsi(%ld): port login OK: logged "
3227 "in ID 0x%x\n", vha->host_no, fcport->loop_id));
3228
3229 qla2x00_update_fcport(vha, fcport);
3230
3231 } else if (status == 1) {
3232 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3233 /* retry the login again */
3234 DEBUG(printk("scsi(%ld): Retrying"
3235 " %d login again loop_id 0x%x\n",
3236 vha->host_no, fcport->login_retry,
3237 fcport->loop_id));
3238 } else {
3239 fcport->login_retry = 0;
3240 }
3241
3242 if (fcport->login_retry == 0 && status != QLA_SUCCESS)
3243 fcport->loop_id = FC_NO_LOOP_ID;
3244 }
3245 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3246 break;
0971de7f 3247 }
0971de7f
AV		 3248}
3249
1da177e4
LT		 3250/**************************************************************************
3251* qla2x00_do_dpc
3252* This kernel thread is a task that is schedule by the interrupt handler
3253* to perform the background processing for interrupts.
3254*
3255* Notes:
3256* This task always run in the context of a kernel thread. It
3257* is kick-off by the driver's detect code and starts up
3258* up one per adapter. It immediately goes to sleep and waits for
3259* some fibre event. When either the interrupt handler or
3260* the timer routine detects a event it will one of the task
3261* bits then wake us up.
3262**************************************************************************/
3263static int
3264qla2x00_do_dpc(void *data)
3265{
2c3dfe3f 3266 int rval;
e315cd28
AC		 3267 scsi_qla_host_t *base_vha;
3268 struct qla_hw_data *ha;
1da177e4 3269
e315cd28
AC		 3270 ha = (struct qla_hw_data *)data;
3271 base_vha = pci_get_drvdata(ha->pdev);
1da177e4 3272
1da177e4
LT		 3273 set_user_nice(current, -20);
3274
39a11240 3275 while (!kthread_should_stop()) {
1da177e4
LT		 3276 DEBUG3(printk("qla2x00: DPC handler sleeping\n"));
3277
39a11240
CH		 3278 set_current_state(TASK_INTERRUPTIBLE);
3279 schedule();
3280 __set_current_state(TASK_RUNNING);
1da177e4
LT		 3281
3282 DEBUG3(printk("qla2x00: DPC handler waking up\n"));
3283
3284 /* Initialization not yet finished. Don't do anything yet. */
e315cd28 3285 if (!base_vha->flags.init_done)
1da177e4
LT		 3286 continue;
3287
85880801
AV		 3288 if (ha->flags.eeh_busy) {
3289 DEBUG17(qla_printk(KERN_WARNING, ha,
3290 "qla2x00_do_dpc: dpc_flags: %lx\n",
3291 base_vha->dpc_flags));
3292 continue;
3293 }
3294
e315cd28 3295 DEBUG3(printk("scsi(%ld): DPC handler\n", base_vha->host_no));
1da177e4
LT		 3296
3297 ha->dpc_active = 1;
3298
1da177e4 3299 if (ha->flags.mbox_busy) {
1da177e4
LT		 3300 ha->dpc_active = 0;
3301 continue;
3302 }
3303
e315cd28 3304 qla2x00_do_work(base_vha);
0971de7f 3305
a9083016
GM		 3306 if (IS_QLA82XX(ha)) {
3307 if (test_and_clear_bit(ISP_UNRECOVERABLE,
3308 &base_vha->dpc_flags)) {
3309 qla82xx_idc_lock(ha);
3310 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3311 QLA82XX_DEV_FAILED);
3312 qla82xx_idc_unlock(ha);
3313 qla_printk(KERN_INFO, ha,
3314 "HW State: FAILED\n");
3315 qla82xx_device_state_handler(base_vha);
3316 continue;
3317 }
3318
3319 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
3320 &base_vha->dpc_flags)) {
3321
3322 DEBUG(printk(KERN_INFO
3323 "scsi(%ld): dpc: sched "
3324 "qla82xx_fcoe_ctx_reset ha = %p\n",
3325 base_vha->host_no, ha));
3326 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
3327 &base_vha->dpc_flags))) {
3328 if (qla82xx_fcoe_ctx_reset(base_vha)) {
3329 /* FCoE-ctx reset failed.
3330 * Escalate to chip-reset
3331 */
3332 set_bit(ISP_ABORT_NEEDED,
3333 &base_vha->dpc_flags);
3334 }
3335 clear_bit(ABORT_ISP_ACTIVE,
3336 &base_vha->dpc_flags);
3337 }
3338
3339 DEBUG(printk("scsi(%ld): dpc:"
3340 " qla82xx_fcoe_ctx_reset end\n",
3341 base_vha->host_no));
3342 }
3343 }
3344
e315cd28
AC		 3345 if (test_and_clear_bit(ISP_ABORT_NEEDED,
3346 &base_vha->dpc_flags)) {
1da177e4
LT		 3347
3348 DEBUG(printk("scsi(%ld): dpc: sched "
3349 "qla2x00_abort_isp ha = %p\n",
e315cd28 3350 base_vha->host_no, ha));
1da177e4 3351 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
e315cd28 3352 &base_vha->dpc_flags))) {
1da177e4 3353
a9083016 3354 if (ha->isp_ops->abort_isp(base_vha)) {
1da177e4
LT		 3355 /* failed. retry later */
3356 set_bit(ISP_ABORT_NEEDED,
e315cd28 3357 &base_vha->dpc_flags);
99363ef8 3358 }
e315cd28
AC		 3359 clear_bit(ABORT_ISP_ACTIVE,
3360 &base_vha->dpc_flags);
99363ef8
SJ		 3361 }
3362
1da177e4 3363 DEBUG(printk("scsi(%ld): dpc: qla2x00_abort_isp end\n",
e315cd28 3364 base_vha->host_no));
1da177e4
LT		 3365 }
3366
e315cd28
AC		 3367 if (test_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags)) {
3368 qla2x00_update_fcports(base_vha);
3369 clear_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
c9c5ced9 3370 }
d97994dc 3371
579d12b5
SK		 3372 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
3373 DEBUG(printk(KERN_INFO "scsi(%ld): dpc: sched "
3374 "qla2x00_quiesce_needed ha = %p\n",
3375 base_vha->host_no, ha));
3376 qla82xx_device_state_handler(base_vha);
3377 clear_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags);
3378 if (!ha->flags.quiesce_owner) {
3379 qla2x00_perform_loop_resync(base_vha);
3380
3381 qla82xx_idc_lock(ha);
3382 qla82xx_clear_qsnt_ready(base_vha);
3383 qla82xx_idc_unlock(ha);
3384 }
3385 }
3386
e315cd28
AC		 3387 if (test_and_clear_bit(RESET_MARKER_NEEDED,
3388 &base_vha->dpc_flags) &&
3389 (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
1da177e4
LT		 3390
3391 DEBUG(printk("scsi(%ld): qla2x00_reset_marker()\n",
e315cd28 3392 base_vha->host_no));
1da177e4 3393
e315cd28
AC		 3394 qla2x00_rst_aen(base_vha);
3395 clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
1da177e4
LT		 3396 }
3397
3398 /* Retry each device up to login retry count */
e315cd28
AC		 3399 if ((test_and_clear_bit(RELOGIN_NEEDED,
3400 &base_vha->dpc_flags)) &&
3401 !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
3402 atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
1da177e4
LT		 3403
3404 DEBUG(printk("scsi(%ld): qla2x00_port_login()\n",
e315cd28
AC		 3405 base_vha->host_no));
3406 qla2x00_relogin(base_vha);
3407
1da177e4 3408 DEBUG(printk("scsi(%ld): qla2x00_port_login - end\n",
e315cd28 3409 base_vha->host_no));
1da177e4
LT		 3410 }
3411
e315cd28
AC		 3412 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
3413 &base_vha->dpc_flags)) {
1da177e4
LT		 3414
3415 DEBUG(printk("scsi(%ld): qla2x00_loop_resync()\n",
e315cd28 3416 base_vha->host_no));
1da177e4
LT		 3417
3418 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
e315cd28 3419 &base_vha->dpc_flags))) {
1da177e4 3420
e315cd28 3421 rval = qla2x00_loop_resync(base_vha);
1da177e4 3422
e315cd28
AC		 3423 clear_bit(LOOP_RESYNC_ACTIVE,
3424 &base_vha->dpc_flags);
1da177e4
LT		 3425 }
3426
3427 DEBUG(printk("scsi(%ld): qla2x00_loop_resync - end\n",
e315cd28 3428 base_vha->host_no));
1da177e4
LT		 3429 }
3430
e315cd28
AC		 3431 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
3432 atomic_read(&base_vha->loop_state) == LOOP_READY) {
3433 clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
3434 qla2xxx_flash_npiv_conf(base_vha);
272976ca
AV		 3435 }
3436
1da177e4 3437 if (!ha->interrupts_on)
fd34f556 3438 ha->isp_ops->enable_intrs(ha);
1da177e4 3439
e315cd28
AC		 3440 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
3441 &base_vha->dpc_flags))
3442 ha->isp_ops->beacon_blink(base_vha);
f6df144c 3443
e315cd28 3444 qla2x00_do_dpc_all_vps(base_vha);
2c3dfe3f 3445
1da177e4
LT		 3446 ha->dpc_active = 0;
3447 } /* End of while(1) */
3448
e315cd28 3449 DEBUG(printk("scsi(%ld): DPC handler exiting\n", base_vha->host_no));
1da177e4
LT		 3450
3451 /*
3452 * Make sure that nobody tries to wake us up again.
3453 */
1da177e4
LT		 3454 ha->dpc_active = 0;
3455
ac280b67
AV		 3456 /* Cleanup any residual CTX SRBs. */
3457 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3458
39a11240
CH		 3459 return 0;
3460}
3461
3462void
e315cd28 3463qla2xxx_wake_dpc(struct scsi_qla_host *vha)
39a11240 3464{
e315cd28 3465 struct qla_hw_data *ha = vha->hw;
c795c1e4
AV		 3466 struct task_struct *t = ha->dpc_thread;
3467
e315cd28 3468 if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
c795c1e4 3469 wake_up_process(t);
1da177e4
LT		 3470}
3471
1da177e4
LT		 3472/*
3473* qla2x00_rst_aen
3474* Processes asynchronous reset.
3475*
3476* Input:
3477* ha = adapter block pointer.
3478*/
3479static void
e315cd28 3480qla2x00_rst_aen(scsi_qla_host_t *vha)
1da177e4 3481{
e315cd28
AC		 3482 if (vha->flags.online && !vha->flags.reset_active &&
3483 !atomic_read(&vha->loop_down_timer) &&
3484 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
1da177e4 3485 do {
e315cd28 3486 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4
LT		 3487
3488 /*
3489 * Issue marker command only when we are going to start
3490 * the I/O.
3491 */
e315cd28
AC		 3492 vha->marker_needed = 1;
3493 } while (!atomic_read(&vha->loop_down_timer) &&
3494 (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
1da177e4
LT		 3495 }
3496}
3497
f4f051eb 3498static void
e315cd28 3499qla2x00_sp_free_dma(srb_t *sp)
f4f051eb 3500{
3501 struct scsi_cmnd *cmd = sp->cmd;
bad75002 3502 struct qla_hw_data *ha = sp->fcport->vha->hw;
f4f051eb 3503
3504 if (sp->flags & SRB_DMA_VALID) {
385d70b4 3505 scsi_dma_unmap(cmd);
f4f051eb 3506 sp->flags &= ~SRB_DMA_VALID;
3507 }
bad75002
AE		 3508
3509 if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
3510 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
3511 scsi_prot_sg_count(cmd), cmd->sc_data_direction);
3512 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
3513 }
3514
3515 if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
3516 /* List assured to be having elements */
3517 qla2x00_clean_dsd_pool(ha, sp);
3518 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
3519 }
3520
3521 if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
3522 dma_pool_free(ha->dl_dma_pool, sp->ctx,
3523 ((struct crc_context *)sp->ctx)->crc_ctx_dma);
3524 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
3525 }
3526
fca29703 3527 CMD_SP(cmd) = NULL;
f4f051eb 3528}
3529
3dbe756a 3530static void
083a469d 3531qla2x00_sp_final_compl(struct qla_hw_data *ha, srb_t *sp)
f4f051eb 3532{
3533 struct scsi_cmnd *cmd = sp->cmd;
3534
e315cd28 3535 qla2x00_sp_free_dma(sp);
f4f051eb 3536
a9083016
GM		 3537 if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
3538 struct ct6_dsd *ctx = sp->ctx;
3539 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd,
3540 ctx->fcp_cmnd_dma);
3541 list_splice(&ctx->dsd_list, &ha->gbl_dsd_list);
3542 ha->gbl_dsd_inuse -= ctx->dsd_use_cnt;
3543 ha->gbl_dsd_avail += ctx->dsd_use_cnt;
3544 mempool_free(sp->ctx, ha->ctx_mempool);
3545 sp->ctx = NULL;
3546 }
f4f051eb 3547
a9083016 3548 mempool_free(sp, ha->srb_mempool);
f4f051eb 3549 cmd->scsi_done(cmd);
3550}
bdf79621 3551
083a469d
GM		 3552void
3553qla2x00_sp_compl(struct qla_hw_data *ha, srb_t *sp)
3554{
3555 if (atomic_read(&sp->ref_count) == 0) {
3556 DEBUG2(qla_printk(KERN_WARNING, ha,
3557 "SP reference-count to ZERO -- sp=%p\n", sp));
3558 DEBUG2(BUG());
3559 return;
3560 }
3561 if (!atomic_dec_and_test(&sp->ref_count))
3562 return;
3563 qla2x00_sp_final_compl(ha, sp);
3564}
3565
1da177e4
LT		 3566/**************************************************************************
3567* qla2x00_timer
3568*
3569* Description:
3570* One second timer
3571*
3572* Context: Interrupt
3573***************************************************************************/
2c3dfe3f 3574void
e315cd28 3575qla2x00_timer(scsi_qla_host_t *vha)
1da177e4 3576{
1da177e4 3577 unsigned long cpu_flags = 0;
1da177e4
LT		 3578 int start_dpc = 0;
3579 int index;
3580 srb_t *sp;
85880801 3581 uint16_t w;
e315cd28 3582 struct qla_hw_data *ha = vha->hw;
73208dfd 3583 struct req_que *req;
85880801 3584
a5b36321
LC		 3585 if (ha->flags.eeh_busy) {
3586 qla2x00_restart_timer(vha, WATCH_INTERVAL);
3587 return;
3588 }
3589
85880801
AV		 3590 /* Hardware read to raise pending EEH errors during mailbox waits. */
3591 if (!pci_channel_offline(ha->pdev))
3592 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
1da177e4 3593
579d12b5
SK		 3594 if (IS_QLA82XX(ha)) {
3595 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
3596 start_dpc++;
3597 qla82xx_watchdog(vha);
3598 }
3599
1da177e4 3600 /* Loop down handler. */
e315cd28
AC		 3601 if (atomic_read(&vha->loop_down_timer) > 0 &&
3602 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))
3603 && vha->flags.online) {
1da177e4 3604
e315cd28
AC		 3605 if (atomic_read(&vha->loop_down_timer) ==
3606 vha->loop_down_abort_time) {
1da177e4
LT		 3607
3608 DEBUG(printk("scsi(%ld): Loop Down - aborting the "
3609 "queues before time expire\n",
e315cd28 3610 vha->host_no));
1da177e4 3611
e315cd28
AC		 3612 if (!IS_QLA2100(ha) && vha->link_down_timeout)
3613 atomic_set(&vha->loop_state, LOOP_DEAD);
1da177e4 3614
f08b7251
AV		 3615 /*
3616 * Schedule an ISP abort to return any FCP2-device
3617 * commands.
3618 */
2c3dfe3f 3619 /* NPIV - scan physical port only */
e315cd28 3620 if (!vha->vp_idx) {
2c3dfe3f
SJ		 3621 spin_lock_irqsave(&ha->hardware_lock,
3622 cpu_flags);
73208dfd 3623 req = ha->req_q_map[0];
2c3dfe3f
SJ		 3624 for (index = 1;
3625 index < MAX_OUTSTANDING_COMMANDS;
3626 index++) {
3627 fc_port_t *sfcp;
3628
e315cd28 3629 sp = req->outstanding_cmds[index];
2c3dfe3f
SJ		 3630 if (!sp)
3631 continue;
bad75002 3632 if (sp->ctx && !IS_PROT_IO(sp))
cf53b069 3633 continue;
2c3dfe3f 3634 sfcp = sp->fcport;
f08b7251 3635 if (!(sfcp->flags & FCF_FCP2_DEVICE))
2c3dfe3f 3636 continue;
bdf79621 3637
2c3dfe3f 3638 set_bit(ISP_ABORT_NEEDED,
e315cd28 3639 &vha->dpc_flags);
2c3dfe3f
SJ		 3640 break;
3641 }
3642 spin_unlock_irqrestore(&ha->hardware_lock,
e315cd28 3643 cpu_flags);
1da177e4 3644 }
1da177e4
LT		 3645 start_dpc++;
3646 }
3647
3648 /* if the loop has been down for 4 minutes, reinit adapter */
e315cd28 3649 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
0d6e61bc 3650 if (!(vha->device_flags & DFLG_NO_CABLE)) {
1da177e4
LT		 3651 DEBUG(printk("scsi(%ld): Loop down - "
3652 "aborting ISP.\n",
e315cd28 3653 vha->host_no));
1da177e4
LT		 3654 qla_printk(KERN_WARNING, ha,
3655 "Loop down - aborting ISP.\n");
3656
e315cd28 3657 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 3658 }
3659 }
fca29703 3660 DEBUG3(printk("scsi(%ld): Loop Down - seconds remaining %d\n",
e315cd28
AC		 3661 vha->host_no,
3662 atomic_read(&vha->loop_down_timer)));
1da177e4
LT		 3663 }
3664
f6df144c 3665 /* Check if beacon LED needs to be blinked */
3666 if (ha->beacon_blink_led == 1) {
e315cd28 3667 set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
f6df144c 3668 start_dpc++;
3669 }
3670
550bf57d 3671 /* Process any deferred work. */
e315cd28 3672 if (!list_empty(&vha->work_list))
550bf57d
AV		 3673 start_dpc++;
3674
1da177e4 3675 /* Schedule the DPC routine if needed */
e315cd28
AC		 3676 if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
3677 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
3678 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
1da177e4 3679 start_dpc ||
e315cd28
AC		 3680 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
3681 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
a9083016
GM		 3682 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
3683 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
e315cd28
AC		 3684 test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
3685 test_bit(RELOGIN_NEEDED, &vha->dpc_flags)))
3686 qla2xxx_wake_dpc(vha);
1da177e4 3687
e315cd28 3688 qla2x00_restart_timer(vha, WATCH_INTERVAL);
1da177e4
LT		 3689}
3690
5433383e
AV		 3691/* Firmware interface routines. */
3692
a9083016 3693#define FW_BLOBS 8
5433383e
AV		 3694#define FW_ISP21XX 0
3695#define FW_ISP22XX 1
3696#define FW_ISP2300 2
3697#define FW_ISP2322 3
48c02fde 3698#define FW_ISP24XX 4
c3a2f0df 3699#define FW_ISP25XX 5
3a03eb79 3700#define FW_ISP81XX 6
a9083016 3701#define FW_ISP82XX 7
5433383e 3702
bb8ee499
AV		 3703#define FW_FILE_ISP21XX "ql2100_fw.bin"
3704#define FW_FILE_ISP22XX "ql2200_fw.bin"
3705#define FW_FILE_ISP2300 "ql2300_fw.bin"
3706#define FW_FILE_ISP2322 "ql2322_fw.bin"
3707#define FW_FILE_ISP24XX "ql2400_fw.bin"
c3a2f0df 3708#define FW_FILE_ISP25XX "ql2500_fw.bin"
3a03eb79 3709#define FW_FILE_ISP81XX "ql8100_fw.bin"
a9083016 3710#define FW_FILE_ISP82XX "ql8200_fw.bin"
bb8ee499 3711
e1e82b6f 3712static DEFINE_MUTEX(qla_fw_lock);
5433383e
AV		 3713
3714static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
bb8ee499
AV		 3715 { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
3716 { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
3717 { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
3718 { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
3719 { .name = FW_FILE_ISP24XX, },
c3a2f0df 3720 { .name = FW_FILE_ISP25XX, },
3a03eb79 3721 { .name = FW_FILE_ISP81XX, },
a9083016 3722 { .name = FW_FILE_ISP82XX, },
5433383e
AV		 3723};
3724
3725struct fw_blob *
e315cd28 3726qla2x00_request_firmware(scsi_qla_host_t *vha)
5433383e 3727{
e315cd28 3728 struct qla_hw_data *ha = vha->hw;
5433383e
AV		 3729 struct fw_blob *blob;
3730
3731 blob = NULL;
3732 if (IS_QLA2100(ha)) {
3733 blob = &qla_fw_blobs[FW_ISP21XX];
3734 } else if (IS_QLA2200(ha)) {
3735 blob = &qla_fw_blobs[FW_ISP22XX];
48c02fde 3736 } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5433383e 3737 blob = &qla_fw_blobs[FW_ISP2300];
48c02fde 3738 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5433383e 3739 blob = &qla_fw_blobs[FW_ISP2322];
4d4df193 3740 } else if (IS_QLA24XX_TYPE(ha)) {
5433383e 3741 blob = &qla_fw_blobs[FW_ISP24XX];
c3a2f0df
AV		 3742 } else if (IS_QLA25XX(ha)) {
3743 blob = &qla_fw_blobs[FW_ISP25XX];
3a03eb79
AV		 3744 } else if (IS_QLA81XX(ha)) {
3745 blob = &qla_fw_blobs[FW_ISP81XX];
a9083016
GM		 3746 } else if (IS_QLA82XX(ha)) {
3747 blob = &qla_fw_blobs[FW_ISP82XX];
5433383e
AV		 3748 }
3749
e1e82b6f 3750 mutex_lock(&qla_fw_lock);
5433383e
AV		 3751 if (blob->fw)
3752 goto out;
3753
3754 if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
3755 DEBUG2(printk("scsi(%ld): Failed to load firmware image "
e315cd28 3756 "(%s).\n", vha->host_no, blob->name));
5433383e
AV		 3757 blob->fw = NULL;
3758 blob = NULL;
3759 goto out;
3760 }
3761
3762out:
e1e82b6f 3763 mutex_unlock(&qla_fw_lock);
5433383e
AV		 3764 return blob;
3765}
3766
3767static void
3768qla2x00_release_firmware(void)
3769{
3770 int idx;
3771
e1e82b6f 3772 mutex_lock(&qla_fw_lock);
5433383e
AV		 3773 for (idx = 0; idx < FW_BLOBS; idx++)
3774 if (qla_fw_blobs[idx].fw)
3775 release_firmware(qla_fw_blobs[idx].fw);
e1e82b6f 3776 mutex_unlock(&qla_fw_lock);
5433383e
AV		 3777}
3778
14e660e6
SJ		 3779static pci_ers_result_t
3780qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
3781{
85880801
AV		 3782 scsi_qla_host_t *vha = pci_get_drvdata(pdev);
3783 struct qla_hw_data *ha = vha->hw;
3784
3785 DEBUG2(qla_printk(KERN_WARNING, ha, "error_detected:state %x\n",
3786 state));
b9b12f73 3787
14e660e6
SJ		 3788 switch (state) {
3789 case pci_channel_io_normal:
85880801 3790 ha->flags.eeh_busy = 0;
14e660e6
SJ		 3791 return PCI_ERS_RESULT_CAN_RECOVER;
3792 case pci_channel_io_frozen:
85880801 3793 ha->flags.eeh_busy = 1;
a5b36321
LC		 3794 /* For ISP82XX complete any pending mailbox cmd */
3795 if (IS_QLA82XX(ha)) {
3796 ha->flags.fw_hung = 1;
3797 if (ha->flags.mbox_busy) {
3798 ha->flags.mbox_int = 1;
3799 DEBUG2(qla_printk(KERN_ERR, ha,
3800 "Due to pci channel io frozen, doing premature "
3801 "completion of mbx command\n"));
3802 complete(&ha->mbx_intr_comp);
3803 }
3804 }
90a86fc0 3805 qla2x00_free_irqs(vha);
14e660e6 3806 pci_disable_device(pdev);
bddd2d65
LC		 3807 /* Return back all IOs */
3808 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
14e660e6
SJ		 3809 return PCI_ERS_RESULT_NEED_RESET;
3810 case pci_channel_io_perm_failure:
85880801
AV		 3811 ha->flags.pci_channel_io_perm_failure = 1;
3812 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
14e660e6
SJ		 3813 return PCI_ERS_RESULT_DISCONNECT;
3814 }
3815 return PCI_ERS_RESULT_NEED_RESET;
3816}
3817
3818static pci_ers_result_t
3819qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
3820{
3821 int risc_paused = 0;
3822 uint32_t stat;
3823 unsigned long flags;
e315cd28
AC		 3824 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
3825 struct qla_hw_data *ha = base_vha->hw;
14e660e6
SJ		 3826 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3827 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
3828
bcc5b6d3
SK		 3829 if (IS_QLA82XX(ha))
3830 return PCI_ERS_RESULT_RECOVERED;
3831
14e660e6
SJ		 3832 spin_lock_irqsave(&ha->hardware_lock, flags);
3833 if (IS_QLA2100(ha) || IS_QLA2200(ha)){
3834 stat = RD_REG_DWORD(&reg->hccr);
3835 if (stat & HCCR_RISC_PAUSE)
3836 risc_paused = 1;
3837 } else if (IS_QLA23XX(ha)) {
3838 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
3839 if (stat & HSR_RISC_PAUSED)
3840 risc_paused = 1;
3841 } else if (IS_FWI2_CAPABLE(ha)) {
3842 stat = RD_REG_DWORD(&reg24->host_status);
3843 if (stat & HSRX_RISC_PAUSED)
3844 risc_paused = 1;
3845 }
3846 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3847
3848 if (risc_paused) {
3849 qla_printk(KERN_INFO, ha, "RISC paused -- mmio_enabled, "
3850 "Dumping firmware!\n");
e315cd28 3851 ha->isp_ops->fw_dump(base_vha, 0);
14e660e6
SJ		 3852
3853 return PCI_ERS_RESULT_NEED_RESET;
3854 } else
3855 return PCI_ERS_RESULT_RECOVERED;
3856}
3857
a5b36321
LC		 3858uint32_t qla82xx_error_recovery(scsi_qla_host_t *base_vha)
3859{
3860 uint32_t rval = QLA_FUNCTION_FAILED;
3861 uint32_t drv_active = 0;
3862 struct qla_hw_data *ha = base_vha->hw;
3863 int fn;
3864 struct pci_dev *other_pdev = NULL;
3865
3866 DEBUG17(qla_printk(KERN_INFO, ha,
3867 "scsi(%ld): In qla82xx_error_recovery\n", base_vha->host_no));
3868
3869 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
3870
3871 if (base_vha->flags.online) {
3872 /* Abort all outstanding commands,
3873 * so as to be requeued later */
3874 qla2x00_abort_isp_cleanup(base_vha);
3875 }
3876
3877
3878 fn = PCI_FUNC(ha->pdev->devfn);
3879 while (fn > 0) {
3880 fn--;
3881 DEBUG17(qla_printk(KERN_INFO, ha,
3882 "Finding pci device at function = 0x%x\n", fn));
3883 other_pdev =
3884 pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
3885 ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
3886 fn));
3887
3888 if (!other_pdev)
3889 continue;
3890 if (atomic_read(&other_pdev->enable_cnt)) {
3891 DEBUG17(qla_printk(KERN_INFO, ha,
3892 "Found PCI func availabe and enabled at 0x%x\n",
3893 fn));
3894 pci_dev_put(other_pdev);
3895 break;
3896 }
3897 pci_dev_put(other_pdev);
3898 }
3899
3900 if (!fn) {
3901 /* Reset owner */
3902 DEBUG17(qla_printk(KERN_INFO, ha,
3903 "This devfn is reset owner = 0x%x\n", ha->pdev->devfn));
3904 qla82xx_idc_lock(ha);
3905
3906 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3907 QLA82XX_DEV_INITIALIZING);
3908
3909 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
3910 QLA82XX_IDC_VERSION);
3911
3912 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
3913 DEBUG17(qla_printk(KERN_INFO, ha,
3914 "drv_active = 0x%x\n", drv_active));
3915
3916 qla82xx_idc_unlock(ha);
3917 /* Reset if device is not already reset
3918 * drv_active would be 0 if a reset has already been done
3919 */
3920 if (drv_active)
3921 rval = qla82xx_start_firmware(base_vha);
3922 else
3923 rval = QLA_SUCCESS;
3924 qla82xx_idc_lock(ha);
3925
3926 if (rval != QLA_SUCCESS) {
3927 qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
3928 qla82xx_clear_drv_active(ha);
3929 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3930 QLA82XX_DEV_FAILED);
3931 } else {
3932 qla_printk(KERN_INFO, ha, "HW State: READY\n");
3933 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3934 QLA82XX_DEV_READY);
3935 qla82xx_idc_unlock(ha);
3936 ha->flags.fw_hung = 0;
3937 rval = qla82xx_restart_isp(base_vha);
3938 qla82xx_idc_lock(ha);
3939 /* Clear driver state register */
3940 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
3941 qla82xx_set_drv_active(base_vha);
3942 }
3943 qla82xx_idc_unlock(ha);
3944 } else {
3945 DEBUG17(qla_printk(KERN_INFO, ha,
3946 "This devfn is not reset owner = 0x%x\n", ha->pdev->devfn));
3947 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
3948 QLA82XX_DEV_READY)) {
3949 ha->flags.fw_hung = 0;
3950 rval = qla82xx_restart_isp(base_vha);
3951 qla82xx_idc_lock(ha);
3952 qla82xx_set_drv_active(base_vha);
3953 qla82xx_idc_unlock(ha);
3954 }
3955 }
3956 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
3957
3958 return rval;
3959}
3960
14e660e6
SJ		 3961static pci_ers_result_t
3962qla2xxx_pci_slot_reset(struct pci_dev *pdev)
3963{
3964 pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
e315cd28
AC		 3965 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
3966 struct qla_hw_data *ha = base_vha->hw;
90a86fc0
JC		 3967 struct rsp_que *rsp;
3968 int rc, retries = 10;
09483916 3969
85880801
AV		 3970 DEBUG17(qla_printk(KERN_WARNING, ha, "slot_reset\n"));
3971
90a86fc0
JC		 3972 /* Workaround: qla2xxx driver which access hardware earlier
3973 * needs error state to be pci_channel_io_online.
3974 * Otherwise mailbox command timesout.
3975 */
3976 pdev->error_state = pci_channel_io_normal;
3977
3978 pci_restore_state(pdev);
3979
8c1496bd
RL		 3980 /* pci_restore_state() clears the saved_state flag of the device
3981 * save restored state which resets saved_state flag
3982 */
3983 pci_save_state(pdev);
3984
09483916
BH		 3985 if (ha->mem_only)
3986 rc = pci_enable_device_mem(pdev);
3987 else
3988 rc = pci_enable_device(pdev);
14e660e6 3989
09483916 3990 if (rc) {
14e660e6
SJ		 3991 qla_printk(KERN_WARNING, ha,
3992 "Can't re-enable PCI device after reset.\n");
a5b36321 3993 goto exit_slot_reset;
14e660e6 3994 }
14e660e6 3995
90a86fc0
JC		 3996 rsp = ha->rsp_q_map[0];
3997 if (qla2x00_request_irqs(ha, rsp))
a5b36321 3998 goto exit_slot_reset;
90a86fc0 3999
e315cd28 4000 if (ha->isp_ops->pci_config(base_vha))
a5b36321
LC		 4001 goto exit_slot_reset;
4002
4003 if (IS_QLA82XX(ha)) {
4004 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
4005 ret = PCI_ERS_RESULT_RECOVERED;
4006 goto exit_slot_reset;
4007 } else
4008 goto exit_slot_reset;
4009 }
14e660e6 4010
90a86fc0
JC		 4011 while (ha->flags.mbox_busy && retries--)
4012 msleep(1000);
85880801 4013
e315cd28 4014 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
a9083016 4015 if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
14e660e6 4016 ret = PCI_ERS_RESULT_RECOVERED;
e315cd28 4017 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
14e660e6 4018
90a86fc0 4019
a5b36321 4020exit_slot_reset:
85880801
AV		 4021 DEBUG17(qla_printk(KERN_WARNING, ha,
4022 "slot_reset-return:ret=%x\n", ret));
4023
14e660e6
SJ		 4024 return ret;
4025}
4026
4027static void
4028qla2xxx_pci_resume(struct pci_dev *pdev)
4029{
e315cd28
AC		 4030 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
4031 struct qla_hw_data *ha = base_vha->hw;
14e660e6
SJ		 4032 int ret;
4033
85880801
AV		 4034 DEBUG17(qla_printk(KERN_WARNING, ha, "pci_resume\n"));
4035
e315cd28 4036 ret = qla2x00_wait_for_hba_online(base_vha);
14e660e6
SJ		 4037 if (ret != QLA_SUCCESS) {
4038 qla_printk(KERN_ERR, ha,
4039 "the device failed to resume I/O "
4040 "from slot/link_reset");
4041 }
85880801 4042
3e46f031
LC		 4043 pci_cleanup_aer_uncorrect_error_status(pdev);
4044
85880801 4045 ha->flags.eeh_busy = 0;
14e660e6
SJ		 4046}
4047
4048static struct pci_error_handlers qla2xxx_err_handler = {
4049 .error_detected = qla2xxx_pci_error_detected,
4050 .mmio_enabled = qla2xxx_pci_mmio_enabled,
4051 .slot_reset = qla2xxx_pci_slot_reset,
4052 .resume = qla2xxx_pci_resume,
4053};
4054
5433383e 4055static struct pci_device_id qla2xxx_pci_tbl[] = {
47f5e069
AV		 4056 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
4057 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
4058 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
4059 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
4060 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
4061 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
4062 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
4063 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
4064 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
4d4df193 4065 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
47f5e069
AV		 4066 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
4067 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
c3a2f0df 4068 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
3a03eb79 4069 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
a9083016 4070 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5433383e
AV		 4071 { 0 },
4072};
4073MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
4074
fca29703 4075static struct pci_driver qla2xxx_pci_driver = {
cb63067a 4076 .name = QLA2XXX_DRIVER_NAME,
0a21ef1e
JB		 4077 .driver = {
4078 .owner = THIS_MODULE,
4079 },
fca29703 4080 .id_table = qla2xxx_pci_tbl,
7ee61397 4081 .probe = qla2x00_probe_one,
4c993f76 4082 .remove = qla2x00_remove_one,
e30d1756 4083 .shutdown = qla2x00_shutdown,
14e660e6 4084 .err_handler = &qla2xxx_err_handler,
fca29703
AV		 4085};
4086
6a03b4cd
HZ		 4087static struct file_operations apidev_fops = {
4088 .owner = THIS_MODULE,
6038f373 4089 .llseek = noop_llseek,
6a03b4cd
HZ		 4090};
4091
1da177e4
LT		 4092/**
4093 * qla2x00_module_init - Module initialization.
4094 **/
4095static int __init
4096qla2x00_module_init(void)
4097{
fca29703
AV		 4098 int ret = 0;
4099
1da177e4 4100 /* Allocate cache for SRBs. */
354d6b21 4101 srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
20c2df83 4102 SLAB_HWCACHE_ALIGN, NULL);
1da177e4
LT		 4103 if (srb_cachep == NULL) {
4104 printk(KERN_ERR
4105 "qla2xxx: Unable to allocate SRB cache...Failing load!\n");
4106 return -ENOMEM;
4107 }
4108
4109 /* Derive version string. */
4110 strcpy(qla2x00_version_str, QLA2XXX_VERSION);
11010fec 4111 if (ql2xextended_error_logging)
0181944f
AV		 4112 strcat(qla2x00_version_str, "-debug");
4113
1c97a12a
AV		 4114 qla2xxx_transport_template =
4115 fc_attach_transport(&qla2xxx_transport_functions);
2c3dfe3f
SJ		 4116 if (!qla2xxx_transport_template) {
4117 kmem_cache_destroy(srb_cachep);
1da177e4 4118 return -ENODEV;
2c3dfe3f 4119 }
6a03b4cd
HZ		 4120
4121 apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
4122 if (apidev_major < 0) {
4123 printk(KERN_WARNING "qla2xxx: Unable to register char device "
4124 "%s\n", QLA2XXX_APIDEV);
4125 }
4126
2c3dfe3f
SJ		 4127 qla2xxx_transport_vport_template =
4128 fc_attach_transport(&qla2xxx_transport_vport_functions);
4129 if (!qla2xxx_transport_vport_template) {
4130 kmem_cache_destroy(srb_cachep);
4131 fc_release_transport(qla2xxx_transport_template);
1da177e4 4132 return -ENODEV;
2c3dfe3f 4133 }
1da177e4 4134
fd9a29f0
AV		 4135 printk(KERN_INFO "QLogic Fibre Channel HBA Driver: %s\n",
4136 qla2x00_version_str);
7ee61397 4137 ret = pci_register_driver(&qla2xxx_pci_driver);
fca29703
AV		 4138 if (ret) {
4139 kmem_cache_destroy(srb_cachep);
4140 fc_release_transport(qla2xxx_transport_template);
2c3dfe3f 4141 fc_release_transport(qla2xxx_transport_vport_template);
fca29703
AV		 4142 }
4143 return ret;
1da177e4
LT		 4144}
4145
4146/**
4147 * qla2x00_module_exit - Module cleanup.
4148 **/
4149static void __exit
4150qla2x00_module_exit(void)
4151{
6a03b4cd 4152 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7ee61397 4153 pci_unregister_driver(&qla2xxx_pci_driver);
5433383e 4154 qla2x00_release_firmware();
354d6b21 4155 kmem_cache_destroy(srb_cachep);
a9083016
GM		 4156 if (ctx_cachep)
4157 kmem_cache_destroy(ctx_cachep);
1da177e4 4158 fc_release_transport(qla2xxx_transport_template);
2c3dfe3f 4159 fc_release_transport(qla2xxx_transport_vport_template);
1da177e4
LT		 4160}
4161
4162module_init(qla2x00_module_init);
4163module_exit(qla2x00_module_exit);
4164
4165MODULE_AUTHOR("QLogic Corporation");
4166MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
4167MODULE_LICENSE("GPL");
4168MODULE_VERSION(QLA2XXX_VERSION);
bb8ee499
AV		 4169MODULE_FIRMWARE(FW_FILE_ISP21XX);
4170MODULE_FIRMWARE(FW_FILE_ISP22XX);
4171MODULE_FIRMWARE(FW_FILE_ISP2300);
4172MODULE_FIRMWARE(FW_FILE_ISP2322);
4173MODULE_FIRMWARE(FW_FILE_ISP24XX);
61623fc3 4174MODULE_FIRMWARE(FW_FILE_ISP25XX);
Linux 6.x block layer and io_uring tree(s)