Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
fa90c54f | 2 | * QLogic Fibre Channel HBA Driver |
01e58d8e | 3 | * Copyright (c) 2003-2008 QLogic Corporation |
1da177e4 | 4 | * |
fa90c54f | 5 | * See LICENSE.qla2xxx for copyright and licensing details. |
1da177e4 LT |
6 | */ |
7 | #include "qla_def.h" | |
8 | ||
9 | #include <linux/moduleparam.h> | |
10 | #include <linux/vmalloc.h> | |
1da177e4 | 11 | #include <linux/delay.h> |
39a11240 | 12 | #include <linux/kthread.h> |
e1e82b6f | 13 | #include <linux/mutex.h> |
3420d36c | 14 | #include <linux/kobject.h> |
5a0e3ad6 | 15 | #include <linux/slab.h> |
1da177e4 LT |
16 | |
17 | #include <scsi/scsi_tcq.h> | |
18 | #include <scsi/scsicam.h> | |
19 | #include <scsi/scsi_transport.h> | |
20 | #include <scsi/scsi_transport_fc.h> | |
21 | ||
22 | /* | |
23 | * Driver version | |
24 | */ | |
25 | char qla2x00_version_str[40]; | |
26 | ||
6a03b4cd HZ |
27 | static int apidev_major; |
28 | ||
1da177e4 LT |
29 | /* |
30 | * SRB allocation cache | |
31 | */ | |
e18b890b | 32 | static struct kmem_cache *srb_cachep; |
1da177e4 | 33 | |
a9083016 GM |
34 | /* |
35 | * CT6 CTX allocation cache | |
36 | */ | |
37 | static struct kmem_cache *ctx_cachep; | |
38 | ||
1da177e4 LT |
39 | int ql2xlogintimeout = 20; |
40 | module_param(ql2xlogintimeout, int, S_IRUGO|S_IRUSR); | |
41 | MODULE_PARM_DESC(ql2xlogintimeout, | |
42 | "Login timeout value in seconds."); | |
43 | ||
a7b61842 | 44 | int qlport_down_retry; |
1da177e4 LT |
45 | module_param(qlport_down_retry, int, S_IRUGO|S_IRUSR); |
46 | MODULE_PARM_DESC(qlport_down_retry, | |
900d9f98 | 47 | "Maximum number of command retries to a port that returns " |
1da177e4 LT |
48 | "a PORT-DOWN status."); |
49 | ||
1da177e4 LT |
50 | int ql2xplogiabsentdevice; |
51 | module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR); | |
52 | MODULE_PARM_DESC(ql2xplogiabsentdevice, | |
53 | "Option to enable PLOGI to devices that are not present after " | |
900d9f98 | 54 | "a Fabric scan. This is needed for several broken switches. " |
1da177e4 LT |
55 | "Default is 0 - no PLOGI. 1 - perfom PLOGI."); |
56 | ||
1da177e4 LT |
57 | int ql2xloginretrycount = 0; |
58 | module_param(ql2xloginretrycount, int, S_IRUGO|S_IRUSR); | |
59 | MODULE_PARM_DESC(ql2xloginretrycount, | |
60 | "Specify an alternate value for the NVRAM login retry count."); | |
61 | ||
a7a167bf AV |
62 | int ql2xallocfwdump = 1; |
63 | module_param(ql2xallocfwdump, int, S_IRUGO|S_IRUSR); | |
64 | MODULE_PARM_DESC(ql2xallocfwdump, | |
65 | "Option to enable allocation of memory for a firmware dump " | |
66 | "during HBA initialization. Memory allocation requirements " | |
67 | "vary by ISP type. Default is 1 - allocate memory."); | |
68 | ||
11010fec | 69 | int ql2xextended_error_logging; |
27d94035 | 70 | module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR); |
11010fec | 71 | MODULE_PARM_DESC(ql2xextended_error_logging, |
0181944f AV |
72 | "Option to enable extended error logging, " |
73 | "Default is 0 - no logging. 1 - log errors."); | |
74 | ||
a9083016 GM |
75 | int ql2xshiftctondsd = 6; |
76 | module_param(ql2xshiftctondsd, int, S_IRUGO|S_IRUSR); | |
77 | MODULE_PARM_DESC(ql2xshiftctondsd, | |
78 | "Set to control shifting of command type processing " | |
79 | "based on total number of SG elements."); | |
80 | ||
1da177e4 LT |
81 | static void qla2x00_free_device(scsi_qla_host_t *); |
82 | ||
7e47e5ca | 83 | int ql2xfdmienable=1; |
cca5335c AV |
84 | module_param(ql2xfdmienable, int, S_IRUGO|S_IRUSR); |
85 | MODULE_PARM_DESC(ql2xfdmienable, | |
7794a5af FW |
86 | "Enables FDMI registrations. " |
87 | "0 - no FDMI. Default is 1 - perform FDMI."); | |
cca5335c | 88 | |
df7baa50 AV |
89 | #define MAX_Q_DEPTH 32 |
90 | static int ql2xmaxqdepth = MAX_Q_DEPTH; | |
91 | module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR); | |
92 | MODULE_PARM_DESC(ql2xmaxqdepth, | |
93 | "Maximum queue depth to report for target devices."); | |
94 | ||
bad75002 AE |
95 | /* Do not change the value of this after module load */ |
96 | int ql2xenabledif = 1; | |
97 | module_param(ql2xenabledif, int, S_IRUGO|S_IWUSR); | |
98 | MODULE_PARM_DESC(ql2xenabledif, | |
99 | " Enable T10-CRC-DIF " | |
100 | " Default is 0 - No DIF Support. 1 - Enable it"); | |
101 | ||
102 | int ql2xenablehba_err_chk; | |
103 | module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR); | |
104 | MODULE_PARM_DESC(ql2xenablehba_err_chk, | |
105 | " Enable T10-CRC-DIF Error isolation by HBA" | |
106 | " Default is 0 - Error isolation disabled, 1 - Enable it"); | |
107 | ||
e5896bd5 AV |
108 | int ql2xiidmaenable=1; |
109 | module_param(ql2xiidmaenable, int, S_IRUGO|S_IRUSR); | |
110 | MODULE_PARM_DESC(ql2xiidmaenable, | |
111 | "Enables iIDMA settings " | |
112 | "Default is 1 - perform iIDMA. 0 - no iIDMA."); | |
113 | ||
73208dfd AC |
114 | int ql2xmaxqueues = 1; |
115 | module_param(ql2xmaxqueues, int, S_IRUGO|S_IRUSR); | |
116 | MODULE_PARM_DESC(ql2xmaxqueues, | |
117 | "Enables MQ settings " | |
118 | "Default is 1 for single queue. Set it to number \ | |
119 | of queues in MQ mode."); | |
68ca949c AC |
120 | |
121 | int ql2xmultique_tag; | |
122 | module_param(ql2xmultique_tag, int, S_IRUGO|S_IRUSR); | |
123 | MODULE_PARM_DESC(ql2xmultique_tag, | |
124 | "Enables CPU affinity settings for the driver " | |
125 | "Default is 0 for no affinity of request and response IO. " | |
126 | "Set it to 1 to turn on the cpu affinity."); | |
e337d907 AV |
127 | |
128 | int ql2xfwloadbin; | |
129 | module_param(ql2xfwloadbin, int, S_IRUGO|S_IRUSR); | |
130 | MODULE_PARM_DESC(ql2xfwloadbin, | |
131 | "Option to specify location from which to load ISP firmware:\n" | |
132 | " 2 -- load firmware via the request_firmware() (hotplug)\n" | |
133 | " interface.\n" | |
134 | " 1 -- load firmware from flash.\n" | |
135 | " 0 -- use default semantics.\n"); | |
136 | ||
ae97c91e AV |
137 | int ql2xetsenable; |
138 | module_param(ql2xetsenable, int, S_IRUGO|S_IRUSR); | |
139 | MODULE_PARM_DESC(ql2xetsenable, | |
140 | "Enables firmware ETS burst." | |
141 | "Default is 0 - skip ETS enablement."); | |
142 | ||
6907869d | 143 | int ql2xdbwr = 1; |
a9083016 GM |
144 | module_param(ql2xdbwr, int, S_IRUGO|S_IRUSR); |
145 | MODULE_PARM_DESC(ql2xdbwr, | |
146 | "Option to specify scheme for request queue posting\n" | |
147 | " 0 -- Regular doorbell.\n" | |
148 | " 1 -- CAMRAM doorbell (faster).\n"); | |
149 | ||
150 | int ql2xdontresethba; | |
151 | module_param(ql2xdontresethba, int, S_IRUGO|S_IRUSR); | |
152 | MODULE_PARM_DESC(ql2xdontresethba, | |
153 | "Option to specify reset behaviour\n" | |
154 | " 0 (Default) -- Reset on failure.\n" | |
155 | " 1 -- Do not reset on failure.\n"); | |
156 | ||
f4c496c1 GM |
157 | int ql2xtargetreset = 1; |
158 | module_param(ql2xtargetreset, int, S_IRUGO|S_IRUSR); | |
159 | MODULE_PARM_DESC(ql2xtargetreset, | |
160 | "Enable target reset." | |
161 | "Default is 1 - use hw defaults."); | |
162 | ||
a9083016 | 163 | |
3822263e MI |
164 | int ql2xasynctmfenable; |
165 | module_param(ql2xasynctmfenable, int, S_IRUGO|S_IRUSR); | |
166 | MODULE_PARM_DESC(ql2xasynctmfenable, | |
167 | "Enables issue of TM IOCBs asynchronously via IOCB mechanism" | |
168 | "Default is 0 - Issue TM IOCBs via mailbox mechanism."); | |
1da177e4 | 169 | /* |
fa2a1ce5 | 170 | * SCSI host template entry points |
1da177e4 LT |
171 | */ |
172 | static int qla2xxx_slave_configure(struct scsi_device * device); | |
f4f051eb | 173 | static int qla2xxx_slave_alloc(struct scsi_device *); |
1e99e33a AV |
174 | static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time); |
175 | static void qla2xxx_scan_start(struct Scsi_Host *); | |
f4f051eb | 176 | static void qla2xxx_slave_destroy(struct scsi_device *); |
a5326f86 | 177 | static int qla2xxx_queuecommand(struct scsi_cmnd *cmd, |
fca29703 | 178 | void (*fn)(struct scsi_cmnd *)); |
1da177e4 LT |
179 | static int qla2xxx_eh_abort(struct scsi_cmnd *); |
180 | static int qla2xxx_eh_device_reset(struct scsi_cmnd *); | |
523ec773 | 181 | static int qla2xxx_eh_target_reset(struct scsi_cmnd *); |
1da177e4 LT |
182 | static int qla2xxx_eh_bus_reset(struct scsi_cmnd *); |
183 | static int qla2xxx_eh_host_reset(struct scsi_cmnd *); | |
1da177e4 | 184 | |
e881a172 | 185 | static int qla2x00_change_queue_depth(struct scsi_device *, int, int); |
ce7e4af7 AV |
186 | static int qla2x00_change_queue_type(struct scsi_device *, int); |
187 | ||
a5326f86 | 188 | struct scsi_host_template qla2xxx_driver_template = { |
1da177e4 | 189 | .module = THIS_MODULE, |
cb63067a | 190 | .name = QLA2XXX_DRIVER_NAME, |
a5326f86 | 191 | .queuecommand = qla2xxx_queuecommand, |
fca29703 AV |
192 | |
193 | .eh_abort_handler = qla2xxx_eh_abort, | |
194 | .eh_device_reset_handler = qla2xxx_eh_device_reset, | |
523ec773 | 195 | .eh_target_reset_handler = qla2xxx_eh_target_reset, |
fca29703 AV |
196 | .eh_bus_reset_handler = qla2xxx_eh_bus_reset, |
197 | .eh_host_reset_handler = qla2xxx_eh_host_reset, | |
198 | ||
199 | .slave_configure = qla2xxx_slave_configure, | |
200 | ||
201 | .slave_alloc = qla2xxx_slave_alloc, | |
202 | .slave_destroy = qla2xxx_slave_destroy, | |
ed677086 AV |
203 | .scan_finished = qla2xxx_scan_finished, |
204 | .scan_start = qla2xxx_scan_start, | |
ce7e4af7 AV |
205 | .change_queue_depth = qla2x00_change_queue_depth, |
206 | .change_queue_type = qla2x00_change_queue_type, | |
fca29703 AV |
207 | .this_id = -1, |
208 | .cmd_per_lun = 3, | |
209 | .use_clustering = ENABLE_CLUSTERING, | |
210 | .sg_tablesize = SG_ALL, | |
211 | ||
212 | .max_sectors = 0xFFFF, | |
afb046e2 | 213 | .shost_attrs = qla2x00_host_attrs, |
fca29703 AV |
214 | }; |
215 | ||
1da177e4 | 216 | static struct scsi_transport_template *qla2xxx_transport_template = NULL; |
2c3dfe3f | 217 | struct scsi_transport_template *qla2xxx_transport_vport_template = NULL; |
1da177e4 | 218 | |
1da177e4 LT |
219 | /* TODO Convert to inlines |
220 | * | |
221 | * Timer routines | |
222 | */ | |
1da177e4 | 223 | |
2c3dfe3f | 224 | __inline__ void |
e315cd28 | 225 | qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval) |
1da177e4 | 226 | { |
e315cd28 AC |
227 | init_timer(&vha->timer); |
228 | vha->timer.expires = jiffies + interval * HZ; | |
229 | vha->timer.data = (unsigned long)vha; | |
230 | vha->timer.function = (void (*)(unsigned long))func; | |
231 | add_timer(&vha->timer); | |
232 | vha->timer_active = 1; | |
1da177e4 LT |
233 | } |
234 | ||
235 | static inline void | |
e315cd28 | 236 | qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval) |
1da177e4 | 237 | { |
a9083016 GM |
238 | /* Currently used for 82XX only. */ |
239 | if (vha->device_flags & DFLG_DEV_FAILED) | |
240 | return; | |
241 | ||
e315cd28 | 242 | mod_timer(&vha->timer, jiffies + interval * HZ); |
1da177e4 LT |
243 | } |
244 | ||
a824ebb3 | 245 | static __inline__ void |
e315cd28 | 246 | qla2x00_stop_timer(scsi_qla_host_t *vha) |
1da177e4 | 247 | { |
e315cd28 AC |
248 | del_timer_sync(&vha->timer); |
249 | vha->timer_active = 0; | |
1da177e4 LT |
250 | } |
251 | ||
1da177e4 LT |
252 | static int qla2x00_do_dpc(void *data); |
253 | ||
254 | static void qla2x00_rst_aen(scsi_qla_host_t *); | |
255 | ||
73208dfd AC |
256 | static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t, |
257 | struct req_que **, struct rsp_que **); | |
e315cd28 AC |
258 | static void qla2x00_mem_free(struct qla_hw_data *); |
259 | static void qla2x00_sp_free_dma(srb_t *); | |
1da177e4 | 260 | |
1da177e4 | 261 | /* -------------------------------------------------------------------------- */ |
73208dfd AC |
262 | static int qla2x00_alloc_queues(struct qla_hw_data *ha) |
263 | { | |
2afa19a9 | 264 | ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues, |
73208dfd AC |
265 | GFP_KERNEL); |
266 | if (!ha->req_q_map) { | |
267 | qla_printk(KERN_WARNING, ha, | |
268 | "Unable to allocate memory for request queue ptrs\n"); | |
269 | goto fail_req_map; | |
270 | } | |
271 | ||
2afa19a9 | 272 | ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues, |
73208dfd AC |
273 | GFP_KERNEL); |
274 | if (!ha->rsp_q_map) { | |
275 | qla_printk(KERN_WARNING, ha, | |
276 | "Unable to allocate memory for response queue ptrs\n"); | |
277 | goto fail_rsp_map; | |
278 | } | |
279 | set_bit(0, ha->rsp_qid_map); | |
280 | set_bit(0, ha->req_qid_map); | |
281 | return 1; | |
282 | ||
283 | fail_rsp_map: | |
284 | kfree(ha->req_q_map); | |
285 | ha->req_q_map = NULL; | |
286 | fail_req_map: | |
287 | return -ENOMEM; | |
288 | } | |
289 | ||
2afa19a9 | 290 | static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req) |
73208dfd | 291 | { |
73208dfd AC |
292 | if (req && req->ring) |
293 | dma_free_coherent(&ha->pdev->dev, | |
294 | (req->length + 1) * sizeof(request_t), | |
295 | req->ring, req->dma); | |
296 | ||
297 | kfree(req); | |
298 | req = NULL; | |
299 | } | |
300 | ||
2afa19a9 AC |
301 | static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp) |
302 | { | |
303 | if (rsp && rsp->ring) | |
304 | dma_free_coherent(&ha->pdev->dev, | |
305 | (rsp->length + 1) * sizeof(response_t), | |
306 | rsp->ring, rsp->dma); | |
307 | ||
308 | kfree(rsp); | |
309 | rsp = NULL; | |
310 | } | |
311 | ||
73208dfd AC |
312 | static void qla2x00_free_queues(struct qla_hw_data *ha) |
313 | { | |
314 | struct req_que *req; | |
315 | struct rsp_que *rsp; | |
316 | int cnt; | |
317 | ||
2afa19a9 | 318 | for (cnt = 0; cnt < ha->max_req_queues; cnt++) { |
73208dfd | 319 | req = ha->req_q_map[cnt]; |
2afa19a9 | 320 | qla2x00_free_req_que(ha, req); |
73208dfd | 321 | } |
73208dfd AC |
322 | kfree(ha->req_q_map); |
323 | ha->req_q_map = NULL; | |
2afa19a9 AC |
324 | |
325 | for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) { | |
326 | rsp = ha->rsp_q_map[cnt]; | |
327 | qla2x00_free_rsp_que(ha, rsp); | |
328 | } | |
329 | kfree(ha->rsp_q_map); | |
330 | ha->rsp_q_map = NULL; | |
73208dfd AC |
331 | } |
332 | ||
68ca949c AC |
333 | static int qla25xx_setup_mode(struct scsi_qla_host *vha) |
334 | { | |
335 | uint16_t options = 0; | |
336 | int ques, req, ret; | |
337 | struct qla_hw_data *ha = vha->hw; | |
338 | ||
7163ea81 AC |
339 | if (!(ha->fw_attributes & BIT_6)) { |
340 | qla_printk(KERN_INFO, ha, | |
341 | "Firmware is not multi-queue capable\n"); | |
342 | goto fail; | |
343 | } | |
68ca949c | 344 | if (ql2xmultique_tag) { |
68ca949c AC |
345 | /* create a request queue for IO */ |
346 | options |= BIT_7; | |
347 | req = qla25xx_create_req_que(ha, options, 0, 0, -1, | |
348 | QLA_DEFAULT_QUE_QOS); | |
349 | if (!req) { | |
350 | qla_printk(KERN_WARNING, ha, | |
351 | "Can't create request queue\n"); | |
352 | goto fail; | |
353 | } | |
7163ea81 | 354 | ha->wq = create_workqueue("qla2xxx_wq"); |
68ca949c AC |
355 | vha->req = ha->req_q_map[req]; |
356 | options |= BIT_1; | |
357 | for (ques = 1; ques < ha->max_rsp_queues; ques++) { | |
358 | ret = qla25xx_create_rsp_que(ha, options, 0, 0, req); | |
359 | if (!ret) { | |
360 | qla_printk(KERN_WARNING, ha, | |
361 | "Response Queue create failed\n"); | |
362 | goto fail2; | |
363 | } | |
364 | } | |
7163ea81 AC |
365 | ha->flags.cpu_affinity_enabled = 1; |
366 | ||
68ca949c AC |
367 | DEBUG2(qla_printk(KERN_INFO, ha, |
368 | "CPU affinity mode enabled, no. of response" | |
369 | " queues:%d, no. of request queues:%d\n", | |
370 | ha->max_rsp_queues, ha->max_req_queues)); | |
371 | } | |
372 | return 0; | |
373 | fail2: | |
374 | qla25xx_delete_queues(vha); | |
7163ea81 AC |
375 | destroy_workqueue(ha->wq); |
376 | ha->wq = NULL; | |
68ca949c AC |
377 | fail: |
378 | ha->mqenable = 0; | |
7163ea81 AC |
379 | kfree(ha->req_q_map); |
380 | kfree(ha->rsp_q_map); | |
381 | ha->max_req_queues = ha->max_rsp_queues = 1; | |
68ca949c AC |
382 | return 1; |
383 | } | |
384 | ||
1da177e4 | 385 | static char * |
e315cd28 | 386 | qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str) |
1da177e4 | 387 | { |
e315cd28 | 388 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
389 | static char *pci_bus_modes[] = { |
390 | "33", "66", "100", "133", | |
391 | }; | |
392 | uint16_t pci_bus; | |
393 | ||
394 | strcpy(str, "PCI"); | |
395 | pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9; | |
396 | if (pci_bus) { | |
397 | strcat(str, "-X ("); | |
398 | strcat(str, pci_bus_modes[pci_bus]); | |
399 | } else { | |
400 | pci_bus = (ha->pci_attr & BIT_8) >> 8; | |
401 | strcat(str, " ("); | |
402 | strcat(str, pci_bus_modes[pci_bus]); | |
403 | } | |
404 | strcat(str, " MHz)"); | |
405 | ||
406 | return (str); | |
407 | } | |
408 | ||
fca29703 | 409 | static char * |
e315cd28 | 410 | qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str) |
fca29703 AV |
411 | { |
412 | static char *pci_bus_modes[] = { "33", "66", "100", "133", }; | |
e315cd28 | 413 | struct qla_hw_data *ha = vha->hw; |
fca29703 AV |
414 | uint32_t pci_bus; |
415 | int pcie_reg; | |
416 | ||
417 | pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP); | |
418 | if (pcie_reg) { | |
419 | char lwstr[6]; | |
420 | uint16_t pcie_lstat, lspeed, lwidth; | |
421 | ||
422 | pcie_reg += 0x12; | |
423 | pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat); | |
424 | lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3); | |
425 | lwidth = (pcie_lstat & | |
426 | (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4; | |
427 | ||
428 | strcpy(str, "PCIe ("); | |
429 | if (lspeed == 1) | |
c87a0d8c | 430 | strcat(str, "2.5GT/s "); |
c3a2f0df | 431 | else if (lspeed == 2) |
c87a0d8c | 432 | strcat(str, "5.0GT/s "); |
fca29703 AV |
433 | else |
434 | strcat(str, "<unknown> "); | |
435 | snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth); | |
436 | strcat(str, lwstr); | |
437 | ||
438 | return str; | |
439 | } | |
440 | ||
441 | strcpy(str, "PCI"); | |
442 | pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8; | |
443 | if (pci_bus == 0 || pci_bus == 8) { | |
444 | strcat(str, " ("); | |
445 | strcat(str, pci_bus_modes[pci_bus >> 3]); | |
446 | } else { | |
447 | strcat(str, "-X "); | |
448 | if (pci_bus & BIT_2) | |
449 | strcat(str, "Mode 2"); | |
450 | else | |
451 | strcat(str, "Mode 1"); | |
452 | strcat(str, " ("); | |
453 | strcat(str, pci_bus_modes[pci_bus & ~BIT_2]); | |
454 | } | |
455 | strcat(str, " MHz)"); | |
456 | ||
457 | return str; | |
458 | } | |
459 | ||
e5f82ab8 | 460 | static char * |
e315cd28 | 461 | qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str) |
1da177e4 LT |
462 | { |
463 | char un_str[10]; | |
e315cd28 | 464 | struct qla_hw_data *ha = vha->hw; |
fa2a1ce5 | 465 | |
1da177e4 LT |
466 | sprintf(str, "%d.%02d.%02d ", ha->fw_major_version, |
467 | ha->fw_minor_version, | |
468 | ha->fw_subminor_version); | |
469 | ||
470 | if (ha->fw_attributes & BIT_9) { | |
471 | strcat(str, "FLX"); | |
472 | return (str); | |
473 | } | |
474 | ||
475 | switch (ha->fw_attributes & 0xFF) { | |
476 | case 0x7: | |
477 | strcat(str, "EF"); | |
478 | break; | |
479 | case 0x17: | |
480 | strcat(str, "TP"); | |
481 | break; | |
482 | case 0x37: | |
483 | strcat(str, "IP"); | |
484 | break; | |
485 | case 0x77: | |
486 | strcat(str, "VI"); | |
487 | break; | |
488 | default: | |
489 | sprintf(un_str, "(%x)", ha->fw_attributes); | |
490 | strcat(str, un_str); | |
491 | break; | |
492 | } | |
493 | if (ha->fw_attributes & 0x100) | |
494 | strcat(str, "X"); | |
495 | ||
496 | return (str); | |
497 | } | |
498 | ||
e5f82ab8 | 499 | static char * |
e315cd28 | 500 | qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str) |
fca29703 | 501 | { |
e315cd28 | 502 | struct qla_hw_data *ha = vha->hw; |
f0883ac6 | 503 | |
3a03eb79 AV |
504 | sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version, |
505 | ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes); | |
fca29703 | 506 | return str; |
fca29703 AV |
507 | } |
508 | ||
509 | static inline srb_t * | |
e315cd28 | 510 | qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport, |
fca29703 AV |
511 | struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *)) |
512 | { | |
513 | srb_t *sp; | |
e315cd28 | 514 | struct qla_hw_data *ha = vha->hw; |
fca29703 AV |
515 | |
516 | sp = mempool_alloc(ha->srb_mempool, GFP_ATOMIC); | |
517 | if (!sp) | |
518 | return sp; | |
519 | ||
083a469d | 520 | atomic_set(&sp->ref_count, 1); |
fca29703 AV |
521 | sp->fcport = fcport; |
522 | sp->cmd = cmd; | |
523 | sp->flags = 0; | |
524 | CMD_SP(cmd) = (void *)sp; | |
525 | cmd->scsi_done = done; | |
cf53b069 | 526 | sp->ctx = NULL; |
fca29703 AV |
527 | |
528 | return sp; | |
529 | } | |
530 | ||
1da177e4 | 531 | static int |
a5326f86 | 532 | qla2xxx_queuecommand(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *)) |
fca29703 | 533 | { |
e315cd28 | 534 | scsi_qla_host_t *vha = shost_priv(cmd->device->host); |
fca29703 | 535 | fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata; |
19a7b4ae | 536 | struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device)); |
e315cd28 AC |
537 | struct qla_hw_data *ha = vha->hw; |
538 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
fca29703 AV |
539 | srb_t *sp; |
540 | int rval; | |
541 | ||
85880801 AV |
542 | if (ha->flags.eeh_busy) { |
543 | if (ha->flags.pci_channel_io_perm_failure) | |
b9b12f73 | 544 | cmd->result = DID_NO_CONNECT << 16; |
85880801 AV |
545 | else |
546 | cmd->result = DID_REQUEUE << 16; | |
14e660e6 SJ |
547 | goto qc24_fail_command; |
548 | } | |
549 | ||
19a7b4ae JSEC |
550 | rval = fc_remote_port_chkready(rport); |
551 | if (rval) { | |
552 | cmd->result = rval; | |
fca29703 AV |
553 | goto qc24_fail_command; |
554 | } | |
555 | ||
387f96b4 | 556 | /* Close window on fcport/rport state-transitioning. */ |
7b594131 MC |
557 | if (fcport->drport) |
558 | goto qc24_target_busy; | |
387f96b4 | 559 | |
bad75002 AE |
560 | if (!vha->flags.difdix_supported && |
561 | scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) { | |
562 | DEBUG2(qla_printk(KERN_ERR, ha, | |
563 | "DIF Cap Not Reg, fail DIF capable cmd's:%x\n", | |
564 | cmd->cmnd[0])); | |
565 | cmd->result = DID_NO_CONNECT << 16; | |
566 | goto qc24_fail_command; | |
567 | } | |
fca29703 AV |
568 | if (atomic_read(&fcport->state) != FCS_ONLINE) { |
569 | if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD || | |
e315cd28 | 570 | atomic_read(&base_vha->loop_state) == LOOP_DEAD) { |
fca29703 AV |
571 | cmd->result = DID_NO_CONNECT << 16; |
572 | goto qc24_fail_command; | |
573 | } | |
7b594131 | 574 | goto qc24_target_busy; |
fca29703 AV |
575 | } |
576 | ||
e315cd28 | 577 | spin_unlock_irq(vha->host->host_lock); |
fca29703 | 578 | |
e315cd28 | 579 | sp = qla2x00_get_new_sp(base_vha, fcport, cmd, done); |
fca29703 AV |
580 | if (!sp) |
581 | goto qc24_host_busy_lock; | |
582 | ||
e315cd28 | 583 | rval = ha->isp_ops->start_scsi(sp); |
fca29703 AV |
584 | if (rval != QLA_SUCCESS) |
585 | goto qc24_host_busy_free_sp; | |
586 | ||
e315cd28 | 587 | spin_lock_irq(vha->host->host_lock); |
fca29703 AV |
588 | |
589 | return 0; | |
590 | ||
591 | qc24_host_busy_free_sp: | |
e315cd28 AC |
592 | qla2x00_sp_free_dma(sp); |
593 | mempool_free(sp, ha->srb_mempool); | |
fca29703 AV |
594 | |
595 | qc24_host_busy_lock: | |
e315cd28 | 596 | spin_lock_irq(vha->host->host_lock); |
fca29703 AV |
597 | return SCSI_MLQUEUE_HOST_BUSY; |
598 | ||
7b594131 MC |
599 | qc24_target_busy: |
600 | return SCSI_MLQUEUE_TARGET_BUSY; | |
601 | ||
fca29703 AV |
602 | qc24_fail_command: |
603 | done(cmd); | |
604 | ||
605 | return 0; | |
606 | } | |
607 | ||
608 | ||
1da177e4 LT |
609 | /* |
610 | * qla2x00_eh_wait_on_command | |
611 | * Waits for the command to be returned by the Firmware for some | |
612 | * max time. | |
613 | * | |
614 | * Input: | |
1da177e4 | 615 | * cmd = Scsi Command to wait on. |
1da177e4 LT |
616 | * |
617 | * Return: | |
618 | * Not Found : 0 | |
619 | * Found : 1 | |
620 | */ | |
621 | static int | |
e315cd28 | 622 | qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd) |
1da177e4 | 623 | { |
fe74c71f AV |
624 | #define ABORT_POLLING_PERIOD 1000 |
625 | #define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD)) | |
f4f051eb | 626 | unsigned long wait_iter = ABORT_WAIT_ITER; |
85880801 AV |
627 | scsi_qla_host_t *vha = shost_priv(cmd->device->host); |
628 | struct qla_hw_data *ha = vha->hw; | |
f4f051eb | 629 | int ret = QLA_SUCCESS; |
1da177e4 | 630 | |
85880801 AV |
631 | if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) { |
632 | DEBUG17(qla_printk(KERN_WARNING, ha, "return:eh_wait\n")); | |
633 | return ret; | |
634 | } | |
635 | ||
d970432c | 636 | while (CMD_SP(cmd) && wait_iter--) { |
fe74c71f | 637 | msleep(ABORT_POLLING_PERIOD); |
f4f051eb | 638 | } |
639 | if (CMD_SP(cmd)) | |
640 | ret = QLA_FUNCTION_FAILED; | |
1da177e4 | 641 | |
f4f051eb | 642 | return ret; |
1da177e4 LT |
643 | } |
644 | ||
645 | /* | |
646 | * qla2x00_wait_for_hba_online | |
fa2a1ce5 | 647 | * Wait till the HBA is online after going through |
1da177e4 LT |
648 | * <= MAX_RETRIES_OF_ISP_ABORT or |
649 | * finally HBA is disabled ie marked offline | |
650 | * | |
651 | * Input: | |
652 | * ha - pointer to host adapter structure | |
fa2a1ce5 AV |
653 | * |
654 | * Note: | |
1da177e4 LT |
655 | * Does context switching-Release SPIN_LOCK |
656 | * (if any) before calling this routine. | |
657 | * | |
658 | * Return: | |
659 | * Success (Adapter is online) : 0 | |
660 | * Failed (Adapter is offline/disabled) : 1 | |
661 | */ | |
854165f4 | 662 | int |
e315cd28 | 663 | qla2x00_wait_for_hba_online(scsi_qla_host_t *vha) |
1da177e4 | 664 | { |
fca29703 AV |
665 | int return_status; |
666 | unsigned long wait_online; | |
e315cd28 AC |
667 | struct qla_hw_data *ha = vha->hw; |
668 | scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); | |
1da177e4 | 669 | |
fa2a1ce5 | 670 | wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ); |
e315cd28 AC |
671 | while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) || |
672 | test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) || | |
673 | test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) || | |
674 | ha->dpc_active) && time_before(jiffies, wait_online)) { | |
1da177e4 LT |
675 | |
676 | msleep(1000); | |
677 | } | |
e315cd28 | 678 | if (base_vha->flags.online) |
fa2a1ce5 | 679 | return_status = QLA_SUCCESS; |
1da177e4 LT |
680 | else |
681 | return_status = QLA_FUNCTION_FAILED; | |
682 | ||
1da177e4 LT |
683 | return (return_status); |
684 | } | |
685 | ||
86fbee86 LC |
686 | /* |
687 | * qla2x00_wait_for_reset_ready | |
688 | * Wait till the HBA is online after going through | |
689 | * <= MAX_RETRIES_OF_ISP_ABORT or | |
690 | * finally HBA is disabled ie marked offline or flash | |
691 | * operations are in progress. | |
692 | * | |
693 | * Input: | |
694 | * ha - pointer to host adapter structure | |
695 | * | |
696 | * Note: | |
697 | * Does context switching-Release SPIN_LOCK | |
698 | * (if any) before calling this routine. | |
699 | * | |
700 | * Return: | |
701 | * Success (Adapter is online/no flash ops) : 0 | |
702 | * Failed (Adapter is offline/disabled/flash ops in progress) : 1 | |
703 | */ | |
704 | int | |
705 | qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha) | |
706 | { | |
707 | int return_status; | |
708 | unsigned long wait_online; | |
709 | struct qla_hw_data *ha = vha->hw; | |
710 | scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); | |
711 | ||
712 | wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ); | |
713 | while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) || | |
714 | test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) || | |
715 | test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) || | |
716 | ha->optrom_state != QLA_SWAITING || | |
717 | ha->dpc_active) && time_before(jiffies, wait_online)) | |
718 | msleep(1000); | |
719 | ||
720 | if (base_vha->flags.online && ha->optrom_state == QLA_SWAITING) | |
721 | return_status = QLA_SUCCESS; | |
722 | else | |
723 | return_status = QLA_FUNCTION_FAILED; | |
724 | ||
725 | DEBUG2(printk("%s return_status=%d\n", __func__, return_status)); | |
726 | ||
727 | return return_status; | |
728 | } | |
729 | ||
2533cf67 LC |
730 | int |
731 | qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha) | |
732 | { | |
733 | int return_status; | |
734 | unsigned long wait_reset; | |
735 | struct qla_hw_data *ha = vha->hw; | |
736 | scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); | |
737 | ||
738 | wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ); | |
739 | while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) || | |
740 | test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) || | |
741 | test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) || | |
742 | ha->dpc_active) && time_before(jiffies, wait_reset)) { | |
743 | ||
744 | msleep(1000); | |
745 | ||
746 | if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) && | |
747 | ha->flags.chip_reset_done) | |
748 | break; | |
749 | } | |
750 | if (ha->flags.chip_reset_done) | |
751 | return_status = QLA_SUCCESS; | |
752 | else | |
753 | return_status = QLA_FUNCTION_FAILED; | |
754 | ||
755 | return return_status; | |
756 | } | |
757 | ||
1da177e4 LT |
758 | /* |
759 | * qla2x00_wait_for_loop_ready | |
760 | * Wait for MAX_LOOP_TIMEOUT(5 min) value for loop | |
fa2a1ce5 | 761 | * to be in LOOP_READY state. |
1da177e4 LT |
762 | * Input: |
763 | * ha - pointer to host adapter structure | |
fa2a1ce5 AV |
764 | * |
765 | * Note: | |
1da177e4 LT |
766 | * Does context switching-Release SPIN_LOCK |
767 | * (if any) before calling this routine. | |
fa2a1ce5 | 768 | * |
1da177e4 LT |
769 | * |
770 | * Return: | |
771 | * Success (LOOP_READY) : 0 | |
772 | * Failed (LOOP_NOT_READY) : 1 | |
773 | */ | |
fa2a1ce5 | 774 | static inline int |
e315cd28 | 775 | qla2x00_wait_for_loop_ready(scsi_qla_host_t *vha) |
1da177e4 LT |
776 | { |
777 | int return_status = QLA_SUCCESS; | |
778 | unsigned long loop_timeout ; | |
e315cd28 AC |
779 | struct qla_hw_data *ha = vha->hw; |
780 | scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); | |
1da177e4 LT |
781 | |
782 | /* wait for 5 min at the max for loop to be ready */ | |
fa2a1ce5 | 783 | loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ); |
1da177e4 | 784 | |
e315cd28 AC |
785 | while ((!atomic_read(&base_vha->loop_down_timer) && |
786 | atomic_read(&base_vha->loop_state) == LOOP_DOWN) || | |
787 | atomic_read(&base_vha->loop_state) != LOOP_READY) { | |
788 | if (atomic_read(&base_vha->loop_state) == LOOP_DEAD) { | |
57680080 RA |
789 | return_status = QLA_FUNCTION_FAILED; |
790 | break; | |
791 | } | |
1da177e4 LT |
792 | msleep(1000); |
793 | if (time_after_eq(jiffies, loop_timeout)) { | |
794 | return_status = QLA_FUNCTION_FAILED; | |
795 | break; | |
796 | } | |
797 | } | |
fa2a1ce5 | 798 | return (return_status); |
1da177e4 LT |
799 | } |
800 | ||
083a469d GM |
801 | static void |
802 | sp_get(struct srb *sp) | |
803 | { | |
804 | atomic_inc(&sp->ref_count); | |
805 | } | |
806 | ||
1da177e4 LT |
807 | /************************************************************************** |
808 | * qla2xxx_eh_abort | |
809 | * | |
810 | * Description: | |
811 | * The abort function will abort the specified command. | |
812 | * | |
813 | * Input: | |
814 | * cmd = Linux SCSI command packet to be aborted. | |
815 | * | |
816 | * Returns: | |
817 | * Either SUCCESS or FAILED. | |
818 | * | |
819 | * Note: | |
2ea00202 | 820 | * Only return FAILED if command not returned by firmware. |
1da177e4 | 821 | **************************************************************************/ |
e5f82ab8 | 822 | static int |
1da177e4 LT |
823 | qla2xxx_eh_abort(struct scsi_cmnd *cmd) |
824 | { | |
e315cd28 | 825 | scsi_qla_host_t *vha = shost_priv(cmd->device->host); |
f4f051eb | 826 | srb_t *sp; |
17d98630 | 827 | int ret, i; |
f4f051eb | 828 | unsigned int id, lun; |
829 | unsigned long serial; | |
18e144d3 | 830 | unsigned long flags; |
2ea00202 | 831 | int wait = 0; |
e315cd28 | 832 | struct qla_hw_data *ha = vha->hw; |
67c2e93a | 833 | struct req_que *req = vha->req; |
17d98630 | 834 | srb_t *spt; |
083a469d | 835 | int got_ref = 0; |
1da177e4 | 836 | |
65d430fa | 837 | fc_block_scsi_eh(cmd); |
07db5183 | 838 | |
f4f051eb | 839 | if (!CMD_SP(cmd)) |
2ea00202 | 840 | return SUCCESS; |
1da177e4 | 841 | |
2ea00202 | 842 | ret = SUCCESS; |
1da177e4 | 843 | |
f4f051eb | 844 | id = cmd->device->id; |
845 | lun = cmd->device->lun; | |
846 | serial = cmd->serial_number; | |
17d98630 AC |
847 | spt = (srb_t *) CMD_SP(cmd); |
848 | if (!spt) | |
849 | return SUCCESS; | |
1da177e4 | 850 | |
f4f051eb | 851 | /* Check active list for command command. */ |
e315cd28 | 852 | spin_lock_irqsave(&ha->hardware_lock, flags); |
17d98630 AC |
853 | for (i = 1; i < MAX_OUTSTANDING_COMMANDS; i++) { |
854 | sp = req->outstanding_cmds[i]; | |
1da177e4 | 855 | |
17d98630 AC |
856 | if (sp == NULL) |
857 | continue; | |
bad75002 AE |
858 | if ((sp->ctx) && !(sp->flags & SRB_FCP_CMND_DMA_VALID) && |
859 | !IS_PROT_IO(sp)) | |
cf53b069 | 860 | continue; |
17d98630 AC |
861 | if (sp->cmd != cmd) |
862 | continue; | |
1da177e4 | 863 | |
17d98630 AC |
864 | DEBUG2(printk("%s(%ld): aborting sp %p from RISC." |
865 | " pid=%ld.\n", __func__, vha->host_no, sp, serial)); | |
866 | ||
083a469d GM |
867 | /* Get a reference to the sp and drop the lock.*/ |
868 | sp_get(sp); | |
869 | got_ref++; | |
870 | ||
17d98630 | 871 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
2afa19a9 | 872 | if (ha->isp_ops->abort_command(sp)) { |
17d98630 AC |
873 | DEBUG2(printk("%s(%ld): abort_command " |
874 | "mbx failed.\n", __func__, vha->host_no)); | |
2ac4b64f | 875 | ret = FAILED; |
17d98630 AC |
876 | } else { |
877 | DEBUG3(printk("%s(%ld): abort_command " | |
878 | "mbx success.\n", __func__, vha->host_no)); | |
879 | wait = 1; | |
73208dfd | 880 | } |
17d98630 AC |
881 | spin_lock_irqsave(&ha->hardware_lock, flags); |
882 | break; | |
f4f051eb | 883 | } |
e315cd28 | 884 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
1da177e4 | 885 | |
f4f051eb | 886 | /* Wait for the command to be returned. */ |
2ea00202 | 887 | if (wait) { |
e315cd28 | 888 | if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) { |
fa2a1ce5 | 889 | qla_printk(KERN_ERR, ha, |
f4f051eb | 890 | "scsi(%ld:%d:%d): Abort handler timed out -- %lx " |
e315cd28 | 891 | "%x.\n", vha->host_no, id, lun, serial, ret); |
2ea00202 | 892 | ret = FAILED; |
f4f051eb | 893 | } |
1da177e4 | 894 | } |
1da177e4 | 895 | |
083a469d GM |
896 | if (got_ref) |
897 | qla2x00_sp_compl(ha, sp); | |
898 | ||
fa2a1ce5 | 899 | qla_printk(KERN_INFO, ha, |
2ea00202 | 900 | "scsi(%ld:%d:%d): Abort command issued -- %d %lx %x.\n", |
e315cd28 | 901 | vha->host_no, id, lun, wait, serial, ret); |
1da177e4 | 902 | |
f4f051eb | 903 | return ret; |
904 | } | |
1da177e4 | 905 | |
523ec773 AV |
906 | enum nexus_wait_type { |
907 | WAIT_HOST = 0, | |
908 | WAIT_TARGET, | |
909 | WAIT_LUN, | |
910 | }; | |
911 | ||
f4f051eb | 912 | static int |
e315cd28 | 913 | qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t, |
17d98630 | 914 | unsigned int l, srb_t *sp, enum nexus_wait_type type) |
f4f051eb | 915 | { |
17d98630 | 916 | int cnt, match, status; |
18e144d3 | 917 | unsigned long flags; |
e315cd28 | 918 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 919 | struct req_que *req; |
1da177e4 | 920 | |
523ec773 | 921 | status = QLA_SUCCESS; |
17d98630 AC |
922 | if (!sp) |
923 | return status; | |
924 | ||
e315cd28 | 925 | spin_lock_irqsave(&ha->hardware_lock, flags); |
67c2e93a | 926 | req = vha->req; |
17d98630 AC |
927 | for (cnt = 1; status == QLA_SUCCESS && |
928 | cnt < MAX_OUTSTANDING_COMMANDS; cnt++) { | |
929 | sp = req->outstanding_cmds[cnt]; | |
930 | if (!sp) | |
523ec773 | 931 | continue; |
bad75002 | 932 | if ((sp->ctx) && !IS_PROT_IO(sp)) |
cf53b069 | 933 | continue; |
17d98630 AC |
934 | if (vha->vp_idx != sp->fcport->vha->vp_idx) |
935 | continue; | |
936 | match = 0; | |
937 | switch (type) { | |
938 | case WAIT_HOST: | |
939 | match = 1; | |
940 | break; | |
941 | case WAIT_TARGET: | |
942 | match = sp->cmd->device->id == t; | |
943 | break; | |
944 | case WAIT_LUN: | |
945 | match = (sp->cmd->device->id == t && | |
946 | sp->cmd->device->lun == l); | |
947 | break; | |
73208dfd | 948 | } |
17d98630 AC |
949 | if (!match) |
950 | continue; | |
951 | ||
952 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
953 | status = qla2x00_eh_wait_on_command(sp->cmd); | |
954 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1da177e4 | 955 | } |
e315cd28 | 956 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
523ec773 AV |
957 | |
958 | return status; | |
1da177e4 LT |
959 | } |
960 | ||
a9083016 GM |
961 | void qla82xx_wait_for_pending_commands(scsi_qla_host_t *vha) |
962 | { | |
963 | int cnt; | |
964 | srb_t *sp; | |
965 | struct req_que *req = vha->req; | |
966 | ||
967 | DEBUG2(qla_printk(KERN_INFO, vha->hw, | |
968 | "Waiting for pending commands\n")); | |
969 | for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) { | |
970 | sp = req->outstanding_cmds[cnt]; | |
971 | if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, | |
972 | sp, WAIT_HOST) == QLA_SUCCESS) { | |
973 | DEBUG2(qla_printk(KERN_INFO, vha->hw, | |
974 | "Done wait for pending commands\n")); | |
975 | } | |
976 | } | |
977 | } | |
978 | ||
523ec773 AV |
979 | static char *reset_errors[] = { |
980 | "HBA not online", | |
981 | "HBA not ready", | |
982 | "Task management failed", | |
983 | "Waiting for command completions", | |
984 | }; | |
1da177e4 | 985 | |
e5f82ab8 | 986 | static int |
523ec773 | 987 | __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type, |
2afa19a9 | 988 | struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int)) |
1da177e4 | 989 | { |
e315cd28 | 990 | scsi_qla_host_t *vha = shost_priv(cmd->device->host); |
bdf79621 | 991 | fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata; |
523ec773 | 992 | int err; |
1da177e4 | 993 | |
65d430fa | 994 | fc_block_scsi_eh(cmd); |
07db5183 | 995 | |
b0328bee | 996 | if (!fcport) |
523ec773 | 997 | return FAILED; |
1da177e4 | 998 | |
e315cd28 AC |
999 | qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET ISSUED.\n", |
1000 | vha->host_no, cmd->device->id, cmd->device->lun, name); | |
1da177e4 | 1001 | |
523ec773 | 1002 | err = 0; |
e315cd28 | 1003 | if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) |
523ec773 AV |
1004 | goto eh_reset_failed; |
1005 | err = 1; | |
e315cd28 | 1006 | if (qla2x00_wait_for_loop_ready(vha) != QLA_SUCCESS) |
523ec773 AV |
1007 | goto eh_reset_failed; |
1008 | err = 2; | |
2afa19a9 AC |
1009 | if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1) |
1010 | != QLA_SUCCESS) | |
523ec773 AV |
1011 | goto eh_reset_failed; |
1012 | err = 3; | |
e315cd28 | 1013 | if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id, |
17d98630 | 1014 | cmd->device->lun, (srb_t *) CMD_SP(cmd), type) != QLA_SUCCESS) |
523ec773 AV |
1015 | goto eh_reset_failed; |
1016 | ||
e315cd28 AC |
1017 | qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET SUCCEEDED.\n", |
1018 | vha->host_no, cmd->device->id, cmd->device->lun, name); | |
523ec773 AV |
1019 | |
1020 | return SUCCESS; | |
1021 | ||
1022 | eh_reset_failed: | |
e315cd28 AC |
1023 | qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET FAILED: %s.\n" |
1024 | , vha->host_no, cmd->device->id, cmd->device->lun, name, | |
523ec773 AV |
1025 | reset_errors[err]); |
1026 | return FAILED; | |
1027 | } | |
1da177e4 | 1028 | |
523ec773 AV |
1029 | static int |
1030 | qla2xxx_eh_device_reset(struct scsi_cmnd *cmd) | |
1031 | { | |
e315cd28 AC |
1032 | scsi_qla_host_t *vha = shost_priv(cmd->device->host); |
1033 | struct qla_hw_data *ha = vha->hw; | |
1da177e4 | 1034 | |
523ec773 AV |
1035 | return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd, |
1036 | ha->isp_ops->lun_reset); | |
1da177e4 LT |
1037 | } |
1038 | ||
1da177e4 | 1039 | static int |
523ec773 | 1040 | qla2xxx_eh_target_reset(struct scsi_cmnd *cmd) |
1da177e4 | 1041 | { |
e315cd28 AC |
1042 | scsi_qla_host_t *vha = shost_priv(cmd->device->host); |
1043 | struct qla_hw_data *ha = vha->hw; | |
1da177e4 | 1044 | |
523ec773 AV |
1045 | return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd, |
1046 | ha->isp_ops->target_reset); | |
1da177e4 LT |
1047 | } |
1048 | ||
1da177e4 LT |
1049 | /************************************************************************** |
1050 | * qla2xxx_eh_bus_reset | |
1051 | * | |
1052 | * Description: | |
1053 | * The bus reset function will reset the bus and abort any executing | |
1054 | * commands. | |
1055 | * | |
1056 | * Input: | |
1057 | * cmd = Linux SCSI command packet of the command that cause the | |
1058 | * bus reset. | |
1059 | * | |
1060 | * Returns: | |
1061 | * SUCCESS/FAILURE (defined as macro in scsi.h). | |
1062 | * | |
1063 | **************************************************************************/ | |
e5f82ab8 | 1064 | static int |
1da177e4 LT |
1065 | qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd) |
1066 | { | |
e315cd28 | 1067 | scsi_qla_host_t *vha = shost_priv(cmd->device->host); |
bdf79621 | 1068 | fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata; |
2c3dfe3f | 1069 | int ret = FAILED; |
f4f051eb | 1070 | unsigned int id, lun; |
1071 | unsigned long serial; | |
17d98630 | 1072 | srb_t *sp = (srb_t *) CMD_SP(cmd); |
f4f051eb | 1073 | |
65d430fa | 1074 | fc_block_scsi_eh(cmd); |
07db5183 | 1075 | |
f4f051eb | 1076 | id = cmd->device->id; |
1077 | lun = cmd->device->lun; | |
1078 | serial = cmd->serial_number; | |
1da177e4 | 1079 | |
b0328bee | 1080 | if (!fcport) |
f4f051eb | 1081 | return ret; |
1da177e4 | 1082 | |
e315cd28 | 1083 | qla_printk(KERN_INFO, vha->hw, |
749af3d5 | 1084 | "scsi(%ld:%d:%d): BUS RESET ISSUED.\n", vha->host_no, id, lun); |
1da177e4 | 1085 | |
e315cd28 | 1086 | if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) { |
1da177e4 | 1087 | DEBUG2(printk("%s failed:board disabled\n",__func__)); |
f4f051eb | 1088 | goto eh_bus_reset_done; |
1da177e4 LT |
1089 | } |
1090 | ||
e315cd28 AC |
1091 | if (qla2x00_wait_for_loop_ready(vha) == QLA_SUCCESS) { |
1092 | if (qla2x00_loop_reset(vha) == QLA_SUCCESS) | |
f4f051eb | 1093 | ret = SUCCESS; |
1da177e4 | 1094 | } |
f4f051eb | 1095 | if (ret == FAILED) |
1096 | goto eh_bus_reset_done; | |
1da177e4 | 1097 | |
9a41a62b | 1098 | /* Flush outstanding commands. */ |
17d98630 | 1099 | if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, sp, WAIT_HOST) != |
523ec773 | 1100 | QLA_SUCCESS) |
9a41a62b | 1101 | ret = FAILED; |
1da177e4 | 1102 | |
f4f051eb | 1103 | eh_bus_reset_done: |
e315cd28 | 1104 | qla_printk(KERN_INFO, vha->hw, "%s: reset %s\n", __func__, |
f4f051eb | 1105 | (ret == FAILED) ? "failed" : "succeded"); |
1da177e4 | 1106 | |
f4f051eb | 1107 | return ret; |
1da177e4 LT |
1108 | } |
1109 | ||
1110 | /************************************************************************** | |
1111 | * qla2xxx_eh_host_reset | |
1112 | * | |
1113 | * Description: | |
1114 | * The reset function will reset the Adapter. | |
1115 | * | |
1116 | * Input: | |
1117 | * cmd = Linux SCSI command packet of the command that cause the | |
1118 | * adapter reset. | |
1119 | * | |
1120 | * Returns: | |
1121 | * Either SUCCESS or FAILED. | |
1122 | * | |
1123 | * Note: | |
1124 | **************************************************************************/ | |
e5f82ab8 | 1125 | static int |
1da177e4 LT |
1126 | qla2xxx_eh_host_reset(struct scsi_cmnd *cmd) |
1127 | { | |
e315cd28 | 1128 | scsi_qla_host_t *vha = shost_priv(cmd->device->host); |
bdf79621 | 1129 | fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata; |
e315cd28 | 1130 | struct qla_hw_data *ha = vha->hw; |
2c3dfe3f | 1131 | int ret = FAILED; |
f4f051eb | 1132 | unsigned int id, lun; |
1133 | unsigned long serial; | |
17d98630 | 1134 | srb_t *sp = (srb_t *) CMD_SP(cmd); |
e315cd28 | 1135 | scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); |
1da177e4 | 1136 | |
65d430fa | 1137 | fc_block_scsi_eh(cmd); |
07db5183 | 1138 | |
f4f051eb | 1139 | id = cmd->device->id; |
1140 | lun = cmd->device->lun; | |
1141 | serial = cmd->serial_number; | |
1142 | ||
b0328bee | 1143 | if (!fcport) |
f4f051eb | 1144 | return ret; |
1da177e4 | 1145 | |
1da177e4 | 1146 | qla_printk(KERN_INFO, ha, |
e315cd28 | 1147 | "scsi(%ld:%d:%d): ADAPTER RESET ISSUED.\n", vha->host_no, id, lun); |
1da177e4 | 1148 | |
86fbee86 | 1149 | if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS) |
f4f051eb | 1150 | goto eh_host_reset_lock; |
1da177e4 LT |
1151 | |
1152 | /* | |
1153 | * Fixme-may be dpc thread is active and processing | |
fa2a1ce5 | 1154 | * loop_resync,so wait a while for it to |
1da177e4 LT |
1155 | * be completed and then issue big hammer.Otherwise |
1156 | * it may cause I/O failure as big hammer marks the | |
1157 | * devices as lost kicking of the port_down_timer | |
1158 | * while dpc is stuck for the mailbox to complete. | |
1159 | */ | |
e315cd28 AC |
1160 | qla2x00_wait_for_loop_ready(vha); |
1161 | if (vha != base_vha) { | |
1162 | if (qla2x00_vp_abort_isp(vha)) | |
f4f051eb | 1163 | goto eh_host_reset_lock; |
e315cd28 | 1164 | } else { |
a9083016 GM |
1165 | if (IS_QLA82XX(vha->hw)) { |
1166 | if (!qla82xx_fcoe_ctx_reset(vha)) { | |
1167 | /* Ctx reset success */ | |
1168 | ret = SUCCESS; | |
1169 | goto eh_host_reset_lock; | |
1170 | } | |
1171 | /* fall thru if ctx reset failed */ | |
1172 | } | |
68ca949c AC |
1173 | if (ha->wq) |
1174 | flush_workqueue(ha->wq); | |
1175 | ||
e315cd28 | 1176 | set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); |
a9083016 | 1177 | if (ha->isp_ops->abort_isp(base_vha)) { |
e315cd28 AC |
1178 | clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); |
1179 | /* failed. schedule dpc to try */ | |
1180 | set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags); | |
1181 | ||
1182 | if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) | |
1183 | goto eh_host_reset_lock; | |
1184 | } | |
1185 | clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); | |
fa2a1ce5 | 1186 | } |
1da177e4 | 1187 | |
e315cd28 | 1188 | /* Waiting for command to be returned to OS.*/ |
17d98630 | 1189 | if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, sp, WAIT_HOST) == |
e315cd28 | 1190 | QLA_SUCCESS) |
f4f051eb | 1191 | ret = SUCCESS; |
1da177e4 | 1192 | |
f4f051eb | 1193 | eh_host_reset_lock: |
f4f051eb | 1194 | qla_printk(KERN_INFO, ha, "%s: reset %s\n", __func__, |
1195 | (ret == FAILED) ? "failed" : "succeded"); | |
1da177e4 | 1196 | |
f4f051eb | 1197 | return ret; |
1198 | } | |
1da177e4 LT |
1199 | |
1200 | /* | |
1201 | * qla2x00_loop_reset | |
1202 | * Issue loop reset. | |
1203 | * | |
1204 | * Input: | |
1205 | * ha = adapter block pointer. | |
1206 | * | |
1207 | * Returns: | |
1208 | * 0 = success | |
1209 | */ | |
a4722cf2 | 1210 | int |
e315cd28 | 1211 | qla2x00_loop_reset(scsi_qla_host_t *vha) |
1da177e4 | 1212 | { |
0c8c39af | 1213 | int ret; |
bdf79621 | 1214 | struct fc_port *fcport; |
e315cd28 | 1215 | struct qla_hw_data *ha = vha->hw; |
1da177e4 | 1216 | |
f4c496c1 | 1217 | if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) { |
55e5ed27 AV |
1218 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1219 | if (fcport->port_type != FCT_TARGET) | |
1220 | continue; | |
1221 | ||
1222 | ret = ha->isp_ops->target_reset(fcport, 0, 0); | |
1223 | if (ret != QLA_SUCCESS) { | |
1224 | DEBUG2_3(printk("%s(%ld): bus_reset failed: " | |
1225 | "target_reset=%d d_id=%x.\n", __func__, | |
1226 | vha->host_no, ret, fcport->d_id.b24)); | |
1227 | } | |
1228 | } | |
1229 | } | |
1230 | ||
a9083016 | 1231 | if (ha->flags.enable_lip_full_login && !IS_QLA8XXX_TYPE(ha)) { |
e315cd28 | 1232 | ret = qla2x00_full_login_lip(vha); |
0c8c39af | 1233 | if (ret != QLA_SUCCESS) { |
749af3d5 | 1234 | DEBUG2_3(printk("%s(%ld): failed: " |
e315cd28 | 1235 | "full_login_lip=%d.\n", __func__, vha->host_no, |
0c8c39af | 1236 | ret)); |
749af3d5 AC |
1237 | } |
1238 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
1239 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
1240 | qla2x00_mark_all_devices_lost(vha, 0); | |
1241 | qla2x00_wait_for_loop_ready(vha); | |
0c8c39af AV |
1242 | } |
1243 | ||
0d6e61bc | 1244 | if (ha->flags.enable_lip_reset) { |
e315cd28 | 1245 | ret = qla2x00_lip_reset(vha); |
0c8c39af | 1246 | if (ret != QLA_SUCCESS) { |
749af3d5 | 1247 | DEBUG2_3(printk("%s(%ld): failed: " |
e315cd28 AC |
1248 | "lip_reset=%d.\n", __func__, vha->host_no, ret)); |
1249 | } else | |
1250 | qla2x00_wait_for_loop_ready(vha); | |
1da177e4 LT |
1251 | } |
1252 | ||
1da177e4 | 1253 | /* Issue marker command only when we are going to start the I/O */ |
e315cd28 | 1254 | vha->marker_needed = 1; |
1da177e4 | 1255 | |
0c8c39af | 1256 | return QLA_SUCCESS; |
1da177e4 LT |
1257 | } |
1258 | ||
df4bf0bb | 1259 | void |
e315cd28 | 1260 | qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res) |
df4bf0bb | 1261 | { |
73208dfd | 1262 | int que, cnt; |
df4bf0bb AV |
1263 | unsigned long flags; |
1264 | srb_t *sp; | |
ac280b67 | 1265 | struct srb_ctx *ctx; |
e315cd28 | 1266 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 1267 | struct req_que *req; |
df4bf0bb AV |
1268 | |
1269 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
2afa19a9 | 1270 | for (que = 0; que < ha->max_req_queues; que++) { |
29bdccbe | 1271 | req = ha->req_q_map[que]; |
73208dfd AC |
1272 | if (!req) |
1273 | continue; | |
1274 | for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) { | |
1275 | sp = req->outstanding_cmds[cnt]; | |
e612d465 | 1276 | if (sp) { |
73208dfd | 1277 | req->outstanding_cmds[cnt] = NULL; |
a9083016 | 1278 | if (!sp->ctx || |
bad75002 AE |
1279 | (sp->flags & SRB_FCP_CMND_DMA_VALID) || |
1280 | IS_PROT_IO(sp)) { | |
ac280b67 AV |
1281 | sp->cmd->result = res; |
1282 | qla2x00_sp_compl(ha, sp); | |
1283 | } else { | |
1284 | ctx = sp->ctx; | |
6c452a45 AV |
1285 | if (ctx->type == SRB_LOGIN_CMD || |
1286 | ctx->type == SRB_LOGOUT_CMD) { | |
4916392b | 1287 | ctx->u.iocb_cmd->free(sp); |
db3ad7f8 | 1288 | } else { |
6c452a45 | 1289 | struct fc_bsg_job *bsg_job = |
4916392b | 1290 | ctx->u.bsg_job; |
6c452a45 AV |
1291 | if (bsg_job->request->msgcode |
1292 | == FC_BSG_HST_CT) | |
db3ad7f8 | 1293 | kfree(sp->fcport); |
6c452a45 AV |
1294 | bsg_job->req->errors = 0; |
1295 | bsg_job->reply->result = res; | |
4916392b | 1296 | bsg_job->job_done(bsg_job); |
db3ad7f8 | 1297 | kfree(sp->ctx); |
6c452a45 | 1298 | mempool_free(sp, |
4916392b | 1299 | ha->srb_mempool); |
db3ad7f8 | 1300 | } |
ac280b67 | 1301 | } |
73208dfd | 1302 | } |
df4bf0bb AV |
1303 | } |
1304 | } | |
1305 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1306 | } | |
1307 | ||
f4f051eb | 1308 | static int |
1309 | qla2xxx_slave_alloc(struct scsi_device *sdev) | |
1da177e4 | 1310 | { |
bdf79621 | 1311 | struct fc_rport *rport = starget_to_rport(scsi_target(sdev)); |
1da177e4 | 1312 | |
19a7b4ae | 1313 | if (!rport || fc_remote_port_chkready(rport)) |
f4f051eb | 1314 | return -ENXIO; |
bdf79621 | 1315 | |
19a7b4ae | 1316 | sdev->hostdata = *(fc_port_t **)rport->dd_data; |
1da177e4 | 1317 | |
f4f051eb | 1318 | return 0; |
1319 | } | |
1da177e4 | 1320 | |
f4f051eb | 1321 | static int |
1322 | qla2xxx_slave_configure(struct scsi_device *sdev) | |
1323 | { | |
e315cd28 AC |
1324 | scsi_qla_host_t *vha = shost_priv(sdev->host); |
1325 | struct qla_hw_data *ha = vha->hw; | |
8482e118 | 1326 | struct fc_rport *rport = starget_to_rport(sdev->sdev_target); |
2afa19a9 | 1327 | struct req_que *req = vha->req; |
8482e118 | 1328 | |
f4f051eb | 1329 | if (sdev->tagged_supported) |
73208dfd | 1330 | scsi_activate_tcq(sdev, req->max_q_depth); |
f4f051eb | 1331 | else |
73208dfd | 1332 | scsi_deactivate_tcq(sdev, req->max_q_depth); |
1da177e4 | 1333 | |
85821c90 | 1334 | rport->dev_loss_tmo = ha->port_down_retry_count; |
8482e118 | 1335 | |
f4f051eb | 1336 | return 0; |
1337 | } | |
1da177e4 | 1338 | |
f4f051eb | 1339 | static void |
1340 | qla2xxx_slave_destroy(struct scsi_device *sdev) | |
1341 | { | |
1342 | sdev->hostdata = NULL; | |
1da177e4 LT |
1343 | } |
1344 | ||
c45dd305 GM |
1345 | static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth) |
1346 | { | |
1347 | fc_port_t *fcport = (struct fc_port *) sdev->hostdata; | |
1348 | ||
1349 | if (!scsi_track_queue_full(sdev, qdepth)) | |
1350 | return; | |
1351 | ||
1352 | DEBUG2(qla_printk(KERN_INFO, fcport->vha->hw, | |
1353 | "scsi(%ld:%d:%d:%d): Queue depth adjusted-down to %d.\n", | |
1354 | fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun, | |
1355 | sdev->queue_depth)); | |
1356 | } | |
1357 | ||
1358 | static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth) | |
1359 | { | |
1360 | fc_port_t *fcport = sdev->hostdata; | |
1361 | struct scsi_qla_host *vha = fcport->vha; | |
1362 | struct qla_hw_data *ha = vha->hw; | |
1363 | struct req_que *req = NULL; | |
1364 | ||
1365 | req = vha->req; | |
1366 | if (!req) | |
1367 | return; | |
1368 | ||
1369 | if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth) | |
1370 | return; | |
1371 | ||
1372 | if (sdev->ordered_tags) | |
1373 | scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth); | |
1374 | else | |
1375 | scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth); | |
1376 | ||
1377 | DEBUG2(qla_printk(KERN_INFO, ha, | |
1378 | "scsi(%ld:%d:%d:%d): Queue depth adjusted-up to %d.\n", | |
1379 | fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun, | |
1380 | sdev->queue_depth)); | |
1381 | } | |
1382 | ||
ce7e4af7 | 1383 | static int |
e881a172 | 1384 | qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason) |
ce7e4af7 | 1385 | { |
c45dd305 GM |
1386 | switch (reason) { |
1387 | case SCSI_QDEPTH_DEFAULT: | |
1388 | scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth); | |
1389 | break; | |
1390 | case SCSI_QDEPTH_QFULL: | |
1391 | qla2x00_handle_queue_full(sdev, qdepth); | |
1392 | break; | |
1393 | case SCSI_QDEPTH_RAMP_UP: | |
1394 | qla2x00_adjust_sdev_qdepth_up(sdev, qdepth); | |
1395 | break; | |
1396 | default: | |
08002af2 | 1397 | return -EOPNOTSUPP; |
c45dd305 | 1398 | } |
e881a172 | 1399 | |
ce7e4af7 AV |
1400 | return sdev->queue_depth; |
1401 | } | |
1402 | ||
1403 | static int | |
1404 | qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type) | |
1405 | { | |
1406 | if (sdev->tagged_supported) { | |
1407 | scsi_set_tag_type(sdev, tag_type); | |
1408 | if (tag_type) | |
1409 | scsi_activate_tcq(sdev, sdev->queue_depth); | |
1410 | else | |
1411 | scsi_deactivate_tcq(sdev, sdev->queue_depth); | |
1412 | } else | |
1413 | tag_type = 0; | |
1414 | ||
1415 | return tag_type; | |
1416 | } | |
1417 | ||
1da177e4 LT |
1418 | /** |
1419 | * qla2x00_config_dma_addressing() - Configure OS DMA addressing method. | |
1420 | * @ha: HA context | |
1421 | * | |
1422 | * At exit, the @ha's flags.enable_64bit_addressing set to indicated | |
1423 | * supported addressing method. | |
1424 | */ | |
1425 | static void | |
53303c42 | 1426 | qla2x00_config_dma_addressing(struct qla_hw_data *ha) |
1da177e4 | 1427 | { |
7524f9b9 | 1428 | /* Assume a 32bit DMA mask. */ |
1da177e4 | 1429 | ha->flags.enable_64bit_addressing = 0; |
1da177e4 | 1430 | |
6a35528a | 1431 | if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) { |
7524f9b9 AV |
1432 | /* Any upper-dword bits set? */ |
1433 | if (MSD(dma_get_required_mask(&ha->pdev->dev)) && | |
6a35528a | 1434 | !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) { |
7524f9b9 | 1435 | /* Ok, a 64bit DMA mask is applicable. */ |
1da177e4 | 1436 | ha->flags.enable_64bit_addressing = 1; |
fd34f556 AV |
1437 | ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64; |
1438 | ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64; | |
7524f9b9 | 1439 | return; |
1da177e4 | 1440 | } |
1da177e4 | 1441 | } |
7524f9b9 | 1442 | |
284901a9 YH |
1443 | dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32)); |
1444 | pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32)); | |
1da177e4 LT |
1445 | } |
1446 | ||
fd34f556 | 1447 | static void |
e315cd28 | 1448 | qla2x00_enable_intrs(struct qla_hw_data *ha) |
fd34f556 AV |
1449 | { |
1450 | unsigned long flags = 0; | |
1451 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | |
1452 | ||
1453 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1454 | ha->interrupts_on = 1; | |
1455 | /* enable risc and host interrupts */ | |
1456 | WRT_REG_WORD(®->ictrl, ICR_EN_INT | ICR_EN_RISC); | |
1457 | RD_REG_WORD(®->ictrl); | |
1458 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1459 | ||
1460 | } | |
1461 | ||
1462 | static void | |
e315cd28 | 1463 | qla2x00_disable_intrs(struct qla_hw_data *ha) |
fd34f556 AV |
1464 | { |
1465 | unsigned long flags = 0; | |
1466 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | |
1467 | ||
1468 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1469 | ha->interrupts_on = 0; | |
1470 | /* disable risc and host interrupts */ | |
1471 | WRT_REG_WORD(®->ictrl, 0); | |
1472 | RD_REG_WORD(®->ictrl); | |
1473 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1474 | } | |
1475 | ||
1476 | static void | |
e315cd28 | 1477 | qla24xx_enable_intrs(struct qla_hw_data *ha) |
fd34f556 AV |
1478 | { |
1479 | unsigned long flags = 0; | |
1480 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; | |
1481 | ||
1482 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1483 | ha->interrupts_on = 1; | |
1484 | WRT_REG_DWORD(®->ictrl, ICRX_EN_RISC_INT); | |
1485 | RD_REG_DWORD(®->ictrl); | |
1486 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1487 | } | |
1488 | ||
1489 | static void | |
e315cd28 | 1490 | qla24xx_disable_intrs(struct qla_hw_data *ha) |
fd34f556 AV |
1491 | { |
1492 | unsigned long flags = 0; | |
1493 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; | |
1494 | ||
124f85e6 AV |
1495 | if (IS_NOPOLLING_TYPE(ha)) |
1496 | return; | |
fd34f556 AV |
1497 | spin_lock_irqsave(&ha->hardware_lock, flags); |
1498 | ha->interrupts_on = 0; | |
1499 | WRT_REG_DWORD(®->ictrl, 0); | |
1500 | RD_REG_DWORD(®->ictrl); | |
1501 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1502 | } | |
1503 | ||
1504 | static struct isp_operations qla2100_isp_ops = { | |
1505 | .pci_config = qla2100_pci_config, | |
1506 | .reset_chip = qla2x00_reset_chip, | |
1507 | .chip_diag = qla2x00_chip_diag, | |
1508 | .config_rings = qla2x00_config_rings, | |
1509 | .reset_adapter = qla2x00_reset_adapter, | |
1510 | .nvram_config = qla2x00_nvram_config, | |
1511 | .update_fw_options = qla2x00_update_fw_options, | |
1512 | .load_risc = qla2x00_load_risc, | |
1513 | .pci_info_str = qla2x00_pci_info_str, | |
1514 | .fw_version_str = qla2x00_fw_version_str, | |
1515 | .intr_handler = qla2100_intr_handler, | |
1516 | .enable_intrs = qla2x00_enable_intrs, | |
1517 | .disable_intrs = qla2x00_disable_intrs, | |
1518 | .abort_command = qla2x00_abort_command, | |
523ec773 AV |
1519 | .target_reset = qla2x00_abort_target, |
1520 | .lun_reset = qla2x00_lun_reset, | |
fd34f556 AV |
1521 | .fabric_login = qla2x00_login_fabric, |
1522 | .fabric_logout = qla2x00_fabric_logout, | |
1523 | .calc_req_entries = qla2x00_calc_iocbs_32, | |
1524 | .build_iocbs = qla2x00_build_scsi_iocbs_32, | |
1525 | .prep_ms_iocb = qla2x00_prep_ms_iocb, | |
1526 | .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb, | |
1527 | .read_nvram = qla2x00_read_nvram_data, | |
1528 | .write_nvram = qla2x00_write_nvram_data, | |
1529 | .fw_dump = qla2100_fw_dump, | |
1530 | .beacon_on = NULL, | |
1531 | .beacon_off = NULL, | |
1532 | .beacon_blink = NULL, | |
1533 | .read_optrom = qla2x00_read_optrom_data, | |
1534 | .write_optrom = qla2x00_write_optrom_data, | |
1535 | .get_flash_version = qla2x00_get_flash_version, | |
e315cd28 | 1536 | .start_scsi = qla2x00_start_scsi, |
a9083016 | 1537 | .abort_isp = qla2x00_abort_isp, |
fd34f556 AV |
1538 | }; |
1539 | ||
1540 | static struct isp_operations qla2300_isp_ops = { | |
1541 | .pci_config = qla2300_pci_config, | |
1542 | .reset_chip = qla2x00_reset_chip, | |
1543 | .chip_diag = qla2x00_chip_diag, | |
1544 | .config_rings = qla2x00_config_rings, | |
1545 | .reset_adapter = qla2x00_reset_adapter, | |
1546 | .nvram_config = qla2x00_nvram_config, | |
1547 | .update_fw_options = qla2x00_update_fw_options, | |
1548 | .load_risc = qla2x00_load_risc, | |
1549 | .pci_info_str = qla2x00_pci_info_str, | |
1550 | .fw_version_str = qla2x00_fw_version_str, | |
1551 | .intr_handler = qla2300_intr_handler, | |
1552 | .enable_intrs = qla2x00_enable_intrs, | |
1553 | .disable_intrs = qla2x00_disable_intrs, | |
1554 | .abort_command = qla2x00_abort_command, | |
523ec773 AV |
1555 | .target_reset = qla2x00_abort_target, |
1556 | .lun_reset = qla2x00_lun_reset, | |
fd34f556 AV |
1557 | .fabric_login = qla2x00_login_fabric, |
1558 | .fabric_logout = qla2x00_fabric_logout, | |
1559 | .calc_req_entries = qla2x00_calc_iocbs_32, | |
1560 | .build_iocbs = qla2x00_build_scsi_iocbs_32, | |
1561 | .prep_ms_iocb = qla2x00_prep_ms_iocb, | |
1562 | .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb, | |
1563 | .read_nvram = qla2x00_read_nvram_data, | |
1564 | .write_nvram = qla2x00_write_nvram_data, | |
1565 | .fw_dump = qla2300_fw_dump, | |
1566 | .beacon_on = qla2x00_beacon_on, | |
1567 | .beacon_off = qla2x00_beacon_off, | |
1568 | .beacon_blink = qla2x00_beacon_blink, | |
1569 | .read_optrom = qla2x00_read_optrom_data, | |
1570 | .write_optrom = qla2x00_write_optrom_data, | |
1571 | .get_flash_version = qla2x00_get_flash_version, | |
e315cd28 | 1572 | .start_scsi = qla2x00_start_scsi, |
a9083016 | 1573 | .abort_isp = qla2x00_abort_isp, |
fd34f556 AV |
1574 | }; |
1575 | ||
1576 | static struct isp_operations qla24xx_isp_ops = { | |
1577 | .pci_config = qla24xx_pci_config, | |
1578 | .reset_chip = qla24xx_reset_chip, | |
1579 | .chip_diag = qla24xx_chip_diag, | |
1580 | .config_rings = qla24xx_config_rings, | |
1581 | .reset_adapter = qla24xx_reset_adapter, | |
1582 | .nvram_config = qla24xx_nvram_config, | |
1583 | .update_fw_options = qla24xx_update_fw_options, | |
1584 | .load_risc = qla24xx_load_risc, | |
1585 | .pci_info_str = qla24xx_pci_info_str, | |
1586 | .fw_version_str = qla24xx_fw_version_str, | |
1587 | .intr_handler = qla24xx_intr_handler, | |
1588 | .enable_intrs = qla24xx_enable_intrs, | |
1589 | .disable_intrs = qla24xx_disable_intrs, | |
1590 | .abort_command = qla24xx_abort_command, | |
523ec773 AV |
1591 | .target_reset = qla24xx_abort_target, |
1592 | .lun_reset = qla24xx_lun_reset, | |
fd34f556 AV |
1593 | .fabric_login = qla24xx_login_fabric, |
1594 | .fabric_logout = qla24xx_fabric_logout, | |
1595 | .calc_req_entries = NULL, | |
1596 | .build_iocbs = NULL, | |
1597 | .prep_ms_iocb = qla24xx_prep_ms_iocb, | |
1598 | .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb, | |
1599 | .read_nvram = qla24xx_read_nvram_data, | |
1600 | .write_nvram = qla24xx_write_nvram_data, | |
1601 | .fw_dump = qla24xx_fw_dump, | |
1602 | .beacon_on = qla24xx_beacon_on, | |
1603 | .beacon_off = qla24xx_beacon_off, | |
1604 | .beacon_blink = qla24xx_beacon_blink, | |
1605 | .read_optrom = qla24xx_read_optrom_data, | |
1606 | .write_optrom = qla24xx_write_optrom_data, | |
1607 | .get_flash_version = qla24xx_get_flash_version, | |
e315cd28 | 1608 | .start_scsi = qla24xx_start_scsi, |
a9083016 | 1609 | .abort_isp = qla2x00_abort_isp, |
fd34f556 AV |
1610 | }; |
1611 | ||
c3a2f0df AV |
1612 | static struct isp_operations qla25xx_isp_ops = { |
1613 | .pci_config = qla25xx_pci_config, | |
1614 | .reset_chip = qla24xx_reset_chip, | |
1615 | .chip_diag = qla24xx_chip_diag, | |
1616 | .config_rings = qla24xx_config_rings, | |
1617 | .reset_adapter = qla24xx_reset_adapter, | |
1618 | .nvram_config = qla24xx_nvram_config, | |
1619 | .update_fw_options = qla24xx_update_fw_options, | |
1620 | .load_risc = qla24xx_load_risc, | |
1621 | .pci_info_str = qla24xx_pci_info_str, | |
1622 | .fw_version_str = qla24xx_fw_version_str, | |
1623 | .intr_handler = qla24xx_intr_handler, | |
1624 | .enable_intrs = qla24xx_enable_intrs, | |
1625 | .disable_intrs = qla24xx_disable_intrs, | |
1626 | .abort_command = qla24xx_abort_command, | |
523ec773 AV |
1627 | .target_reset = qla24xx_abort_target, |
1628 | .lun_reset = qla24xx_lun_reset, | |
c3a2f0df AV |
1629 | .fabric_login = qla24xx_login_fabric, |
1630 | .fabric_logout = qla24xx_fabric_logout, | |
1631 | .calc_req_entries = NULL, | |
1632 | .build_iocbs = NULL, | |
1633 | .prep_ms_iocb = qla24xx_prep_ms_iocb, | |
1634 | .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb, | |
1635 | .read_nvram = qla25xx_read_nvram_data, | |
1636 | .write_nvram = qla25xx_write_nvram_data, | |
1637 | .fw_dump = qla25xx_fw_dump, | |
1638 | .beacon_on = qla24xx_beacon_on, | |
1639 | .beacon_off = qla24xx_beacon_off, | |
1640 | .beacon_blink = qla24xx_beacon_blink, | |
338c9161 | 1641 | .read_optrom = qla25xx_read_optrom_data, |
c3a2f0df AV |
1642 | .write_optrom = qla24xx_write_optrom_data, |
1643 | .get_flash_version = qla24xx_get_flash_version, | |
bad75002 | 1644 | .start_scsi = qla24xx_dif_start_scsi, |
a9083016 | 1645 | .abort_isp = qla2x00_abort_isp, |
c3a2f0df AV |
1646 | }; |
1647 | ||
3a03eb79 AV |
1648 | static struct isp_operations qla81xx_isp_ops = { |
1649 | .pci_config = qla25xx_pci_config, | |
1650 | .reset_chip = qla24xx_reset_chip, | |
1651 | .chip_diag = qla24xx_chip_diag, | |
1652 | .config_rings = qla24xx_config_rings, | |
1653 | .reset_adapter = qla24xx_reset_adapter, | |
1654 | .nvram_config = qla81xx_nvram_config, | |
1655 | .update_fw_options = qla81xx_update_fw_options, | |
eaac30be | 1656 | .load_risc = qla81xx_load_risc, |
3a03eb79 AV |
1657 | .pci_info_str = qla24xx_pci_info_str, |
1658 | .fw_version_str = qla24xx_fw_version_str, | |
1659 | .intr_handler = qla24xx_intr_handler, | |
1660 | .enable_intrs = qla24xx_enable_intrs, | |
1661 | .disable_intrs = qla24xx_disable_intrs, | |
1662 | .abort_command = qla24xx_abort_command, | |
1663 | .target_reset = qla24xx_abort_target, | |
1664 | .lun_reset = qla24xx_lun_reset, | |
1665 | .fabric_login = qla24xx_login_fabric, | |
1666 | .fabric_logout = qla24xx_fabric_logout, | |
1667 | .calc_req_entries = NULL, | |
1668 | .build_iocbs = NULL, | |
1669 | .prep_ms_iocb = qla24xx_prep_ms_iocb, | |
1670 | .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb, | |
3d79038f AV |
1671 | .read_nvram = NULL, |
1672 | .write_nvram = NULL, | |
3a03eb79 AV |
1673 | .fw_dump = qla81xx_fw_dump, |
1674 | .beacon_on = qla24xx_beacon_on, | |
1675 | .beacon_off = qla24xx_beacon_off, | |
1676 | .beacon_blink = qla24xx_beacon_blink, | |
1677 | .read_optrom = qla25xx_read_optrom_data, | |
1678 | .write_optrom = qla24xx_write_optrom_data, | |
1679 | .get_flash_version = qla24xx_get_flash_version, | |
ba77ef53 | 1680 | .start_scsi = qla24xx_dif_start_scsi, |
a9083016 GM |
1681 | .abort_isp = qla2x00_abort_isp, |
1682 | }; | |
1683 | ||
1684 | static struct isp_operations qla82xx_isp_ops = { | |
1685 | .pci_config = qla82xx_pci_config, | |
1686 | .reset_chip = qla82xx_reset_chip, | |
1687 | .chip_diag = qla24xx_chip_diag, | |
1688 | .config_rings = qla82xx_config_rings, | |
1689 | .reset_adapter = qla24xx_reset_adapter, | |
1690 | .nvram_config = qla81xx_nvram_config, | |
1691 | .update_fw_options = qla24xx_update_fw_options, | |
1692 | .load_risc = qla82xx_load_risc, | |
1693 | .pci_info_str = qla82xx_pci_info_str, | |
1694 | .fw_version_str = qla24xx_fw_version_str, | |
1695 | .intr_handler = qla82xx_intr_handler, | |
1696 | .enable_intrs = qla82xx_enable_intrs, | |
1697 | .disable_intrs = qla82xx_disable_intrs, | |
1698 | .abort_command = qla24xx_abort_command, | |
1699 | .target_reset = qla24xx_abort_target, | |
1700 | .lun_reset = qla24xx_lun_reset, | |
1701 | .fabric_login = qla24xx_login_fabric, | |
1702 | .fabric_logout = qla24xx_fabric_logout, | |
1703 | .calc_req_entries = NULL, | |
1704 | .build_iocbs = NULL, | |
1705 | .prep_ms_iocb = qla24xx_prep_ms_iocb, | |
1706 | .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb, | |
1707 | .read_nvram = qla24xx_read_nvram_data, | |
1708 | .write_nvram = qla24xx_write_nvram_data, | |
1709 | .fw_dump = qla24xx_fw_dump, | |
1710 | .beacon_on = qla24xx_beacon_on, | |
1711 | .beacon_off = qla24xx_beacon_off, | |
1712 | .beacon_blink = qla24xx_beacon_blink, | |
1713 | .read_optrom = qla82xx_read_optrom_data, | |
1714 | .write_optrom = qla82xx_write_optrom_data, | |
1715 | .get_flash_version = qla24xx_get_flash_version, | |
1716 | .start_scsi = qla82xx_start_scsi, | |
1717 | .abort_isp = qla82xx_abort_isp, | |
3a03eb79 AV |
1718 | }; |
1719 | ||
ea5b6382 | 1720 | static inline void |
e315cd28 | 1721 | qla2x00_set_isp_flags(struct qla_hw_data *ha) |
ea5b6382 | 1722 | { |
1723 | ha->device_type = DT_EXTENDED_IDS; | |
1724 | switch (ha->pdev->device) { | |
1725 | case PCI_DEVICE_ID_QLOGIC_ISP2100: | |
1726 | ha->device_type |= DT_ISP2100; | |
1727 | ha->device_type &= ~DT_EXTENDED_IDS; | |
441d1072 | 1728 | ha->fw_srisc_address = RISC_START_ADDRESS_2100; |
ea5b6382 | 1729 | break; |
1730 | case PCI_DEVICE_ID_QLOGIC_ISP2200: | |
1731 | ha->device_type |= DT_ISP2200; | |
1732 | ha->device_type &= ~DT_EXTENDED_IDS; | |
441d1072 | 1733 | ha->fw_srisc_address = RISC_START_ADDRESS_2100; |
ea5b6382 | 1734 | break; |
1735 | case PCI_DEVICE_ID_QLOGIC_ISP2300: | |
1736 | ha->device_type |= DT_ISP2300; | |
4a59f71d | 1737 | ha->device_type |= DT_ZIO_SUPPORTED; |
441d1072 | 1738 | ha->fw_srisc_address = RISC_START_ADDRESS_2300; |
ea5b6382 | 1739 | break; |
1740 | case PCI_DEVICE_ID_QLOGIC_ISP2312: | |
1741 | ha->device_type |= DT_ISP2312; | |
4a59f71d | 1742 | ha->device_type |= DT_ZIO_SUPPORTED; |
441d1072 | 1743 | ha->fw_srisc_address = RISC_START_ADDRESS_2300; |
ea5b6382 | 1744 | break; |
1745 | case PCI_DEVICE_ID_QLOGIC_ISP2322: | |
1746 | ha->device_type |= DT_ISP2322; | |
4a59f71d | 1747 | ha->device_type |= DT_ZIO_SUPPORTED; |
ea5b6382 | 1748 | if (ha->pdev->subsystem_vendor == 0x1028 && |
1749 | ha->pdev->subsystem_device == 0x0170) | |
1750 | ha->device_type |= DT_OEM_001; | |
441d1072 | 1751 | ha->fw_srisc_address = RISC_START_ADDRESS_2300; |
ea5b6382 | 1752 | break; |
1753 | case PCI_DEVICE_ID_QLOGIC_ISP6312: | |
1754 | ha->device_type |= DT_ISP6312; | |
441d1072 | 1755 | ha->fw_srisc_address = RISC_START_ADDRESS_2300; |
ea5b6382 | 1756 | break; |
1757 | case PCI_DEVICE_ID_QLOGIC_ISP6322: | |
1758 | ha->device_type |= DT_ISP6322; | |
441d1072 | 1759 | ha->fw_srisc_address = RISC_START_ADDRESS_2300; |
ea5b6382 | 1760 | break; |
1761 | case PCI_DEVICE_ID_QLOGIC_ISP2422: | |
1762 | ha->device_type |= DT_ISP2422; | |
4a59f71d | 1763 | ha->device_type |= DT_ZIO_SUPPORTED; |
e428924c | 1764 | ha->device_type |= DT_FWI2; |
c76f2c01 | 1765 | ha->device_type |= DT_IIDMA; |
441d1072 | 1766 | ha->fw_srisc_address = RISC_START_ADDRESS_2400; |
ea5b6382 | 1767 | break; |
1768 | case PCI_DEVICE_ID_QLOGIC_ISP2432: | |
1769 | ha->device_type |= DT_ISP2432; | |
4a59f71d | 1770 | ha->device_type |= DT_ZIO_SUPPORTED; |
e428924c | 1771 | ha->device_type |= DT_FWI2; |
c76f2c01 | 1772 | ha->device_type |= DT_IIDMA; |
441d1072 | 1773 | ha->fw_srisc_address = RISC_START_ADDRESS_2400; |
ea5b6382 | 1774 | break; |
4d4df193 HK |
1775 | case PCI_DEVICE_ID_QLOGIC_ISP8432: |
1776 | ha->device_type |= DT_ISP8432; | |
1777 | ha->device_type |= DT_ZIO_SUPPORTED; | |
1778 | ha->device_type |= DT_FWI2; | |
1779 | ha->device_type |= DT_IIDMA; | |
1780 | ha->fw_srisc_address = RISC_START_ADDRESS_2400; | |
1781 | break; | |
044cc6c8 | 1782 | case PCI_DEVICE_ID_QLOGIC_ISP5422: |
1783 | ha->device_type |= DT_ISP5422; | |
e428924c | 1784 | ha->device_type |= DT_FWI2; |
441d1072 | 1785 | ha->fw_srisc_address = RISC_START_ADDRESS_2400; |
ea5b6382 | 1786 | break; |
044cc6c8 | 1787 | case PCI_DEVICE_ID_QLOGIC_ISP5432: |
1788 | ha->device_type |= DT_ISP5432; | |
e428924c | 1789 | ha->device_type |= DT_FWI2; |
441d1072 | 1790 | ha->fw_srisc_address = RISC_START_ADDRESS_2400; |
ea5b6382 | 1791 | break; |
c3a2f0df AV |
1792 | case PCI_DEVICE_ID_QLOGIC_ISP2532: |
1793 | ha->device_type |= DT_ISP2532; | |
1794 | ha->device_type |= DT_ZIO_SUPPORTED; | |
1795 | ha->device_type |= DT_FWI2; | |
1796 | ha->device_type |= DT_IIDMA; | |
441d1072 | 1797 | ha->fw_srisc_address = RISC_START_ADDRESS_2400; |
ea5b6382 | 1798 | break; |
3a03eb79 AV |
1799 | case PCI_DEVICE_ID_QLOGIC_ISP8001: |
1800 | ha->device_type |= DT_ISP8001; | |
1801 | ha->device_type |= DT_ZIO_SUPPORTED; | |
1802 | ha->device_type |= DT_FWI2; | |
1803 | ha->device_type |= DT_IIDMA; | |
1804 | ha->fw_srisc_address = RISC_START_ADDRESS_2400; | |
1805 | break; | |
a9083016 GM |
1806 | case PCI_DEVICE_ID_QLOGIC_ISP8021: |
1807 | ha->device_type |= DT_ISP8021; | |
1808 | ha->device_type |= DT_ZIO_SUPPORTED; | |
1809 | ha->device_type |= DT_FWI2; | |
1810 | ha->fw_srisc_address = RISC_START_ADDRESS_2400; | |
1811 | /* Initialize 82XX ISP flags */ | |
1812 | qla82xx_init_flags(ha); | |
1813 | break; | |
ea5b6382 | 1814 | } |
e5b68a61 | 1815 | |
a9083016 GM |
1816 | if (IS_QLA82XX(ha)) |
1817 | ha->port_no = !(ha->portnum & 1); | |
1818 | else | |
1819 | /* Get adapter physical port no from interrupt pin register. */ | |
1820 | pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no); | |
1821 | ||
e5b68a61 AC |
1822 | if (ha->port_no & 1) |
1823 | ha->flags.port0 = 1; | |
1824 | else | |
1825 | ha->flags.port0 = 0; | |
ea5b6382 | 1826 | } |
1827 | ||
1da177e4 | 1828 | static int |
e315cd28 | 1829 | qla2x00_iospace_config(struct qla_hw_data *ha) |
1da177e4 | 1830 | { |
3776541d | 1831 | resource_size_t pio; |
73208dfd | 1832 | uint16_t msix; |
68ca949c | 1833 | int cpus; |
1da177e4 | 1834 | |
a9083016 GM |
1835 | if (IS_QLA82XX(ha)) |
1836 | return qla82xx_iospace_config(ha); | |
1837 | ||
285d0321 AV |
1838 | if (pci_request_selected_regions(ha->pdev, ha->bars, |
1839 | QLA2XXX_DRIVER_NAME)) { | |
1840 | qla_printk(KERN_WARNING, ha, | |
1841 | "Failed to reserve PIO/MMIO regions (%s)\n", | |
1842 | pci_name(ha->pdev)); | |
1843 | ||
1844 | goto iospace_error_exit; | |
1845 | } | |
1846 | if (!(ha->bars & 1)) | |
1847 | goto skip_pio; | |
1848 | ||
1da177e4 LT |
1849 | /* We only need PIO for Flash operations on ISP2312 v2 chips. */ |
1850 | pio = pci_resource_start(ha->pdev, 0); | |
3776541d AV |
1851 | if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) { |
1852 | if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) { | |
1da177e4 LT |
1853 | qla_printk(KERN_WARNING, ha, |
1854 | "Invalid PCI I/O region size (%s)...\n", | |
1855 | pci_name(ha->pdev)); | |
1856 | pio = 0; | |
1857 | } | |
1858 | } else { | |
1859 | qla_printk(KERN_WARNING, ha, | |
1860 | "region #0 not a PIO resource (%s)...\n", | |
1861 | pci_name(ha->pdev)); | |
1862 | pio = 0; | |
1863 | } | |
285d0321 | 1864 | ha->pio_address = pio; |
1da177e4 | 1865 | |
285d0321 | 1866 | skip_pio: |
1da177e4 | 1867 | /* Use MMIO operations for all accesses. */ |
3776541d | 1868 | if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) { |
1da177e4 | 1869 | qla_printk(KERN_ERR, ha, |
3776541d | 1870 | "region #1 not an MMIO resource (%s), aborting\n", |
1da177e4 LT |
1871 | pci_name(ha->pdev)); |
1872 | goto iospace_error_exit; | |
1873 | } | |
3776541d | 1874 | if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) { |
1da177e4 LT |
1875 | qla_printk(KERN_ERR, ha, |
1876 | "Invalid PCI mem region size (%s), aborting\n", | |
1877 | pci_name(ha->pdev)); | |
1878 | goto iospace_error_exit; | |
1879 | } | |
1880 | ||
3776541d | 1881 | ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN); |
1da177e4 LT |
1882 | if (!ha->iobase) { |
1883 | qla_printk(KERN_ERR, ha, | |
1884 | "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev)); | |
1885 | ||
1886 | goto iospace_error_exit; | |
1887 | } | |
1888 | ||
73208dfd | 1889 | /* Determine queue resources */ |
2afa19a9 | 1890 | ha->max_req_queues = ha->max_rsp_queues = 1; |
d84a47c2 MH |
1891 | if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) || |
1892 | (ql2xmaxqueues > 1 && ql2xmultique_tag) || | |
2afa19a9 | 1893 | (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))) |
17d98630 | 1894 | goto mqiobase_exit; |
d84a47c2 | 1895 | |
17d98630 AC |
1896 | ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3), |
1897 | pci_resource_len(ha->pdev, 3)); | |
1898 | if (ha->mqiobase) { | |
1899 | /* Read MSIX vector size of the board */ | |
1900 | pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix); | |
1901 | ha->msix_count = msix; | |
68ca949c AC |
1902 | /* Max queues are bounded by available msix vectors */ |
1903 | /* queue 0 uses two msix vectors */ | |
1904 | if (ql2xmultique_tag) { | |
1905 | cpus = num_online_cpus(); | |
27dc9c5a | 1906 | ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ? |
68ca949c AC |
1907 | (cpus + 1) : (ha->msix_count - 1); |
1908 | ha->max_req_queues = 2; | |
1909 | } else if (ql2xmaxqueues > 1) { | |
2afa19a9 AC |
1910 | ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ? |
1911 | QLA_MQ_SIZE : ql2xmaxqueues; | |
1912 | DEBUG2(qla_printk(KERN_INFO, ha, "QoS mode set, max no" | |
1913 | " of request queues:%d\n", ha->max_req_queues)); | |
1914 | } | |
68ca949c AC |
1915 | qla_printk(KERN_INFO, ha, |
1916 | "MSI-X vector count: %d\n", msix); | |
2afa19a9 AC |
1917 | } else |
1918 | qla_printk(KERN_INFO, ha, "BAR 3 not enabled\n"); | |
17d98630 AC |
1919 | |
1920 | mqiobase_exit: | |
2afa19a9 | 1921 | ha->msix_count = ha->max_rsp_queues + 1; |
1da177e4 LT |
1922 | return (0); |
1923 | ||
1924 | iospace_error_exit: | |
1925 | return (-ENOMEM); | |
1926 | } | |
1927 | ||
1e99e33a AV |
1928 | static void |
1929 | qla2xxx_scan_start(struct Scsi_Host *shost) | |
1930 | { | |
e315cd28 | 1931 | scsi_qla_host_t *vha = shost_priv(shost); |
1e99e33a | 1932 | |
cbc8eb67 AV |
1933 | if (vha->hw->flags.running_gold_fw) |
1934 | return; | |
1935 | ||
e315cd28 AC |
1936 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
1937 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
1938 | set_bit(RSCN_UPDATE, &vha->dpc_flags); | |
1939 | set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags); | |
1e99e33a AV |
1940 | } |
1941 | ||
1942 | static int | |
1943 | qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time) | |
1944 | { | |
e315cd28 | 1945 | scsi_qla_host_t *vha = shost_priv(shost); |
1e99e33a | 1946 | |
e315cd28 | 1947 | if (!vha->host) |
1e99e33a | 1948 | return 1; |
e315cd28 | 1949 | if (time > vha->hw->loop_reset_delay * HZ) |
1e99e33a AV |
1950 | return 1; |
1951 | ||
e315cd28 | 1952 | return atomic_read(&vha->loop_state) == LOOP_READY; |
1e99e33a AV |
1953 | } |
1954 | ||
1da177e4 LT |
1955 | /* |
1956 | * PCI driver interface | |
1957 | */ | |
7ee61397 AV |
1958 | static int __devinit |
1959 | qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |
1da177e4 | 1960 | { |
a1541d5a | 1961 | int ret = -ENODEV; |
1da177e4 | 1962 | struct Scsi_Host *host; |
e315cd28 AC |
1963 | scsi_qla_host_t *base_vha = NULL; |
1964 | struct qla_hw_data *ha; | |
29856e28 | 1965 | char pci_info[30]; |
1da177e4 | 1966 | char fw_str[30]; |
5433383e | 1967 | struct scsi_host_template *sht; |
c51da4ec | 1968 | int bars, max_id, mem_only = 0; |
e315cd28 | 1969 | uint16_t req_length = 0, rsp_length = 0; |
73208dfd AC |
1970 | struct req_que *req = NULL; |
1971 | struct rsp_que *rsp = NULL; | |
1da177e4 | 1972 | |
285d0321 | 1973 | bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO); |
a5326f86 | 1974 | sht = &qla2xxx_driver_template; |
5433383e | 1975 | if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 || |
8bc69e7d | 1976 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 || |
4d4df193 | 1977 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 || |
8bc69e7d | 1978 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 || |
c3a2f0df | 1979 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 || |
3a03eb79 | 1980 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 || |
a9083016 GM |
1981 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 || |
1982 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021) { | |
285d0321 | 1983 | bars = pci_select_bars(pdev, IORESOURCE_MEM); |
09483916 | 1984 | mem_only = 1; |
285d0321 AV |
1985 | } |
1986 | ||
09483916 BH |
1987 | if (mem_only) { |
1988 | if (pci_enable_device_mem(pdev)) | |
1989 | goto probe_out; | |
1990 | } else { | |
1991 | if (pci_enable_device(pdev)) | |
1992 | goto probe_out; | |
1993 | } | |
285d0321 | 1994 | |
0927678f JB |
1995 | /* This may fail but that's ok */ |
1996 | pci_enable_pcie_error_reporting(pdev); | |
285d0321 | 1997 | |
e315cd28 AC |
1998 | ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL); |
1999 | if (!ha) { | |
2000 | DEBUG(printk("Unable to allocate memory for ha\n")); | |
2001 | goto probe_out; | |
1da177e4 | 2002 | } |
e315cd28 | 2003 | ha->pdev = pdev; |
1da177e4 LT |
2004 | |
2005 | /* Clear our data area */ | |
285d0321 | 2006 | ha->bars = bars; |
09483916 | 2007 | ha->mem_only = mem_only; |
df4bf0bb | 2008 | spin_lock_init(&ha->hardware_lock); |
1da177e4 | 2009 | |
ea5b6382 | 2010 | /* Set ISP-type information. */ |
2011 | qla2x00_set_isp_flags(ha); | |
ca79cf66 DG |
2012 | |
2013 | /* Set EEH reset type to fundamental if required by hba */ | |
2014 | if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) { | |
2015 | pdev->needs_freset = 1; | |
ca79cf66 DG |
2016 | } |
2017 | ||
1da177e4 LT |
2018 | /* Configure PCI I/O space */ |
2019 | ret = qla2x00_iospace_config(ha); | |
a1541d5a | 2020 | if (ret) |
e315cd28 | 2021 | goto probe_hw_failed; |
1da177e4 | 2022 | |
1da177e4 | 2023 | qla_printk(KERN_INFO, ha, |
5433383e AV |
2024 | "Found an ISP%04X, irq %d, iobase 0x%p\n", pdev->device, pdev->irq, |
2025 | ha->iobase); | |
1da177e4 | 2026 | |
1da177e4 | 2027 | ha->prev_topology = 0; |
fca29703 | 2028 | ha->init_cb_size = sizeof(init_cb_t); |
d8b45213 | 2029 | ha->link_data_rate = PORT_SPEED_UNKNOWN; |
854165f4 | 2030 | ha->optrom_size = OPTROM_SIZE_2300; |
1da177e4 | 2031 | |
abbd8870 | 2032 | /* Assign ISP specific operations. */ |
e315cd28 | 2033 | max_id = MAX_TARGETS_2200; |
1da177e4 | 2034 | if (IS_QLA2100(ha)) { |
e315cd28 | 2035 | max_id = MAX_TARGETS_2100; |
1da177e4 | 2036 | ha->mbx_count = MAILBOX_REGISTER_COUNT_2100; |
e315cd28 AC |
2037 | req_length = REQUEST_ENTRY_CNT_2100; |
2038 | rsp_length = RESPONSE_ENTRY_CNT_2100; | |
2039 | ha->max_loop_id = SNS_LAST_LOOP_ID_2100; | |
abbd8870 | 2040 | ha->gid_list_info_size = 4; |
3a03eb79 AV |
2041 | ha->flash_conf_off = ~0; |
2042 | ha->flash_data_off = ~0; | |
2043 | ha->nvram_conf_off = ~0; | |
2044 | ha->nvram_data_off = ~0; | |
fd34f556 | 2045 | ha->isp_ops = &qla2100_isp_ops; |
1da177e4 | 2046 | } else if (IS_QLA2200(ha)) { |
1da177e4 | 2047 | ha->mbx_count = MAILBOX_REGISTER_COUNT; |
e315cd28 AC |
2048 | req_length = REQUEST_ENTRY_CNT_2200; |
2049 | rsp_length = RESPONSE_ENTRY_CNT_2100; | |
2050 | ha->max_loop_id = SNS_LAST_LOOP_ID_2100; | |
abbd8870 | 2051 | ha->gid_list_info_size = 4; |
3a03eb79 AV |
2052 | ha->flash_conf_off = ~0; |
2053 | ha->flash_data_off = ~0; | |
2054 | ha->nvram_conf_off = ~0; | |
2055 | ha->nvram_data_off = ~0; | |
fd34f556 | 2056 | ha->isp_ops = &qla2100_isp_ops; |
fca29703 | 2057 | } else if (IS_QLA23XX(ha)) { |
1da177e4 | 2058 | ha->mbx_count = MAILBOX_REGISTER_COUNT; |
e315cd28 AC |
2059 | req_length = REQUEST_ENTRY_CNT_2200; |
2060 | rsp_length = RESPONSE_ENTRY_CNT_2300; | |
2061 | ha->max_loop_id = SNS_LAST_LOOP_ID_2300; | |
abbd8870 | 2062 | ha->gid_list_info_size = 6; |
854165f4 | 2063 | if (IS_QLA2322(ha) || IS_QLA6322(ha)) |
2064 | ha->optrom_size = OPTROM_SIZE_2322; | |
3a03eb79 AV |
2065 | ha->flash_conf_off = ~0; |
2066 | ha->flash_data_off = ~0; | |
2067 | ha->nvram_conf_off = ~0; | |
2068 | ha->nvram_data_off = ~0; | |
fd34f556 | 2069 | ha->isp_ops = &qla2300_isp_ops; |
4d4df193 | 2070 | } else if (IS_QLA24XX_TYPE(ha)) { |
fca29703 | 2071 | ha->mbx_count = MAILBOX_REGISTER_COUNT; |
e315cd28 AC |
2072 | req_length = REQUEST_ENTRY_CNT_24XX; |
2073 | rsp_length = RESPONSE_ENTRY_CNT_2300; | |
2074 | ha->max_loop_id = SNS_LAST_LOOP_ID_2300; | |
2c3dfe3f | 2075 | ha->init_cb_size = sizeof(struct mid_init_cb_24xx); |
fca29703 | 2076 | ha->gid_list_info_size = 8; |
854165f4 | 2077 | ha->optrom_size = OPTROM_SIZE_24XX; |
73208dfd | 2078 | ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX; |
fd34f556 | 2079 | ha->isp_ops = &qla24xx_isp_ops; |
3a03eb79 AV |
2080 | ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; |
2081 | ha->flash_data_off = FARX_ACCESS_FLASH_DATA; | |
2082 | ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; | |
2083 | ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; | |
c3a2f0df | 2084 | } else if (IS_QLA25XX(ha)) { |
c3a2f0df | 2085 | ha->mbx_count = MAILBOX_REGISTER_COUNT; |
e315cd28 AC |
2086 | req_length = REQUEST_ENTRY_CNT_24XX; |
2087 | rsp_length = RESPONSE_ENTRY_CNT_2300; | |
2088 | ha->max_loop_id = SNS_LAST_LOOP_ID_2300; | |
c3a2f0df | 2089 | ha->init_cb_size = sizeof(struct mid_init_cb_24xx); |
c3a2f0df AV |
2090 | ha->gid_list_info_size = 8; |
2091 | ha->optrom_size = OPTROM_SIZE_25XX; | |
73208dfd | 2092 | ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; |
c3a2f0df | 2093 | ha->isp_ops = &qla25xx_isp_ops; |
3a03eb79 AV |
2094 | ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; |
2095 | ha->flash_data_off = FARX_ACCESS_FLASH_DATA; | |
2096 | ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; | |
2097 | ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; | |
2098 | } else if (IS_QLA81XX(ha)) { | |
2099 | ha->mbx_count = MAILBOX_REGISTER_COUNT; | |
2100 | req_length = REQUEST_ENTRY_CNT_24XX; | |
2101 | rsp_length = RESPONSE_ENTRY_CNT_2300; | |
2102 | ha->max_loop_id = SNS_LAST_LOOP_ID_2300; | |
2103 | ha->init_cb_size = sizeof(struct mid_init_cb_81xx); | |
2104 | ha->gid_list_info_size = 8; | |
2105 | ha->optrom_size = OPTROM_SIZE_81XX; | |
40859ae5 | 2106 | ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; |
3a03eb79 AV |
2107 | ha->isp_ops = &qla81xx_isp_ops; |
2108 | ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX; | |
2109 | ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX; | |
2110 | ha->nvram_conf_off = ~0; | |
2111 | ha->nvram_data_off = ~0; | |
a9083016 GM |
2112 | } else if (IS_QLA82XX(ha)) { |
2113 | ha->mbx_count = MAILBOX_REGISTER_COUNT; | |
2114 | req_length = REQUEST_ENTRY_CNT_82XX; | |
2115 | rsp_length = RESPONSE_ENTRY_CNT_82XX; | |
2116 | ha->max_loop_id = SNS_LAST_LOOP_ID_2300; | |
2117 | ha->init_cb_size = sizeof(struct mid_init_cb_81xx); | |
2118 | ha->gid_list_info_size = 8; | |
2119 | ha->optrom_size = OPTROM_SIZE_82XX; | |
2120 | ha->isp_ops = &qla82xx_isp_ops; | |
2121 | ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; | |
2122 | ha->flash_data_off = FARX_ACCESS_FLASH_DATA; | |
2123 | ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; | |
2124 | ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; | |
1da177e4 | 2125 | } |
1da177e4 | 2126 | |
6c2f527c | 2127 | mutex_init(&ha->vport_lock); |
0b05a1f0 MB |
2128 | init_completion(&ha->mbx_cmd_comp); |
2129 | complete(&ha->mbx_cmd_comp); | |
2130 | init_completion(&ha->mbx_intr_comp); | |
23f2ebd1 | 2131 | init_completion(&ha->dcbx_comp); |
1da177e4 | 2132 | |
2c3dfe3f | 2133 | set_bit(0, (unsigned long *) ha->vp_idx_map); |
1da177e4 | 2134 | |
53303c42 | 2135 | qla2x00_config_dma_addressing(ha); |
73208dfd | 2136 | ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp); |
e315cd28 | 2137 | if (!ret) { |
1da177e4 LT |
2138 | qla_printk(KERN_WARNING, ha, |
2139 | "[ERROR] Failed to allocate memory for adapter\n"); | |
2140 | ||
e315cd28 AC |
2141 | goto probe_hw_failed; |
2142 | } | |
2143 | ||
73208dfd | 2144 | req->max_q_depth = MAX_Q_DEPTH; |
e315cd28 | 2145 | if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU) |
73208dfd AC |
2146 | req->max_q_depth = ql2xmaxqdepth; |
2147 | ||
e315cd28 AC |
2148 | |
2149 | base_vha = qla2x00_create_host(sht, ha); | |
2150 | if (!base_vha) { | |
2151 | qla_printk(KERN_WARNING, ha, | |
2152 | "[ERROR] Failed to allocate memory for scsi_host\n"); | |
2153 | ||
a1541d5a | 2154 | ret = -ENOMEM; |
6e9f21f3 | 2155 | qla2x00_mem_free(ha); |
2afa19a9 AC |
2156 | qla2x00_free_req_que(ha, req); |
2157 | qla2x00_free_rsp_que(ha, rsp); | |
e315cd28 | 2158 | goto probe_hw_failed; |
1da177e4 LT |
2159 | } |
2160 | ||
e315cd28 AC |
2161 | pci_set_drvdata(pdev, base_vha); |
2162 | ||
e315cd28 | 2163 | host = base_vha->host; |
2afa19a9 | 2164 | base_vha->req = req; |
73208dfd AC |
2165 | host->can_queue = req->length + 128; |
2166 | if (IS_QLA2XXX_MIDTYPE(ha)) | |
e315cd28 | 2167 | base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx; |
73208dfd | 2168 | else |
e315cd28 AC |
2169 | base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER + |
2170 | base_vha->vp_idx; | |
e315cd28 AC |
2171 | if (IS_QLA2100(ha)) |
2172 | host->sg_tablesize = 32; | |
2173 | host->max_id = max_id; | |
2174 | host->this_id = 255; | |
2175 | host->cmd_per_lun = 3; | |
2176 | host->unique_id = host->host_no; | |
2177 | host->max_cmd_len = MAX_CMDSZ; | |
2178 | host->max_channel = MAX_BUSES - 1; | |
2179 | host->max_lun = MAX_LUNS; | |
2180 | host->transportt = qla2xxx_transport_template; | |
9a069e19 | 2181 | sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC); |
e315cd28 | 2182 | |
73208dfd AC |
2183 | /* Set up the irqs */ |
2184 | ret = qla2x00_request_irqs(ha, rsp); | |
2185 | if (ret) | |
6e9f21f3 | 2186 | goto probe_init_failed; |
90a86fc0 JC |
2187 | |
2188 | pci_save_state(pdev); | |
2189 | ||
73208dfd | 2190 | /* Alloc arrays of request and response ring ptrs */ |
7163ea81 | 2191 | que_init: |
73208dfd AC |
2192 | if (!qla2x00_alloc_queues(ha)) { |
2193 | qla_printk(KERN_WARNING, ha, | |
2194 | "[ERROR] Failed to allocate memory for queue" | |
2195 | " pointers\n"); | |
6e9f21f3 | 2196 | goto probe_init_failed; |
73208dfd | 2197 | } |
a9083016 | 2198 | |
73208dfd AC |
2199 | ha->rsp_q_map[0] = rsp; |
2200 | ha->req_q_map[0] = req; | |
2afa19a9 AC |
2201 | rsp->req = req; |
2202 | req->rsp = rsp; | |
2203 | set_bit(0, ha->req_qid_map); | |
2204 | set_bit(0, ha->rsp_qid_map); | |
08029990 AV |
2205 | /* FWI2-capable only. */ |
2206 | req->req_q_in = &ha->iobase->isp24.req_q_in; | |
2207 | req->req_q_out = &ha->iobase->isp24.req_q_out; | |
2208 | rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in; | |
2209 | rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out; | |
17d98630 | 2210 | if (ha->mqenable) { |
08029990 AV |
2211 | req->req_q_in = &ha->mqiobase->isp25mq.req_q_in; |
2212 | req->req_q_out = &ha->mqiobase->isp25mq.req_q_out; | |
2213 | rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in; | |
2214 | rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out; | |
17d98630 AC |
2215 | } |
2216 | ||
a9083016 GM |
2217 | if (IS_QLA82XX(ha)) { |
2218 | req->req_q_out = &ha->iobase->isp82.req_q_out[0]; | |
2219 | rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0]; | |
2220 | rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0]; | |
2221 | } | |
2222 | ||
e315cd28 | 2223 | if (qla2x00_initialize_adapter(base_vha)) { |
1da177e4 LT |
2224 | qla_printk(KERN_WARNING, ha, |
2225 | "Failed to initialize adapter\n"); | |
2226 | ||
2227 | DEBUG2(printk("scsi(%ld): Failed to initialize adapter - " | |
2228 | "Adapter flags %x.\n", | |
e315cd28 | 2229 | base_vha->host_no, base_vha->device_flags)); |
1da177e4 | 2230 | |
a9083016 GM |
2231 | if (IS_QLA82XX(ha)) { |
2232 | qla82xx_idc_lock(ha); | |
2233 | qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, | |
2234 | QLA82XX_DEV_FAILED); | |
2235 | qla82xx_idc_unlock(ha); | |
2236 | qla_printk(KERN_INFO, ha, "HW State: FAILED\n"); | |
2237 | } | |
2238 | ||
a1541d5a | 2239 | ret = -ENODEV; |
1da177e4 LT |
2240 | goto probe_failed; |
2241 | } | |
2242 | ||
7163ea81 AC |
2243 | if (ha->mqenable) { |
2244 | if (qla25xx_setup_mode(base_vha)) { | |
68ca949c AC |
2245 | qla_printk(KERN_WARNING, ha, |
2246 | "Can't create queues, falling back to single" | |
2247 | " queue mode\n"); | |
7163ea81 AC |
2248 | goto que_init; |
2249 | } | |
2250 | } | |
68ca949c | 2251 | |
cbc8eb67 AV |
2252 | if (ha->flags.running_gold_fw) |
2253 | goto skip_dpc; | |
2254 | ||
1da177e4 LT |
2255 | /* |
2256 | * Startup the kernel thread for this host adapter | |
2257 | */ | |
39a11240 | 2258 | ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha, |
e315cd28 | 2259 | "%s_dpc", base_vha->host_str); |
39a11240 | 2260 | if (IS_ERR(ha->dpc_thread)) { |
1da177e4 LT |
2261 | qla_printk(KERN_WARNING, ha, |
2262 | "Unable to start DPC thread!\n"); | |
39a11240 | 2263 | ret = PTR_ERR(ha->dpc_thread); |
1da177e4 LT |
2264 | goto probe_failed; |
2265 | } | |
1da177e4 | 2266 | |
cbc8eb67 | 2267 | skip_dpc: |
e315cd28 AC |
2268 | list_add_tail(&base_vha->list, &ha->vp_list); |
2269 | base_vha->host->irq = ha->pdev->irq; | |
1da177e4 LT |
2270 | |
2271 | /* Initialized the timer */ | |
e315cd28 | 2272 | qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL); |
1da177e4 LT |
2273 | |
2274 | DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n", | |
e315cd28 | 2275 | base_vha->host_no, ha)); |
d19044c3 | 2276 | |
ba77ef53 | 2277 | if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif) { |
bad75002 AE |
2278 | if (ha->fw_attributes & BIT_4) { |
2279 | base_vha->flags.difdix_supported = 1; | |
2280 | DEBUG18(qla_printk(KERN_INFO, ha, | |
2281 | "Registering for DIF/DIX type 1 and 3" | |
2282 | " protection.\n")); | |
2283 | scsi_host_set_prot(host, | |
2284 | SHOST_DIF_TYPE1_PROTECTION | |
2285 | | SHOST_DIF_TYPE3_PROTECTION | |
2286 | | SHOST_DIX_TYPE1_PROTECTION | |
2287 | | SHOST_DIX_TYPE3_PROTECTION); | |
2288 | scsi_host_set_guard(host, SHOST_DIX_GUARD_CRC); | |
2289 | } else | |
2290 | base_vha->flags.difdix_supported = 0; | |
2291 | } | |
2292 | ||
a9083016 GM |
2293 | ha->isp_ops->enable_intrs(ha); |
2294 | ||
a1541d5a AV |
2295 | ret = scsi_add_host(host, &pdev->dev); |
2296 | if (ret) | |
2297 | goto probe_failed; | |
2298 | ||
1486400f MR |
2299 | base_vha->flags.init_done = 1; |
2300 | base_vha->flags.online = 1; | |
2301 | ||
1e99e33a AV |
2302 | scsi_scan_host(host); |
2303 | ||
e315cd28 | 2304 | qla2x00_alloc_sysfs_attr(base_vha); |
a1541d5a | 2305 | |
e315cd28 | 2306 | qla2x00_init_host_attr(base_vha); |
a1541d5a | 2307 | |
e315cd28 | 2308 | qla2x00_dfs_setup(base_vha); |
df613b96 | 2309 | |
1da177e4 LT |
2310 | qla_printk(KERN_INFO, ha, "\n" |
2311 | " QLogic Fibre Channel HBA Driver: %s\n" | |
2312 | " QLogic %s - %s\n" | |
5433383e AV |
2313 | " ISP%04X: %s @ %s hdma%c, host#=%ld, fw=%s\n", |
2314 | qla2x00_version_str, ha->model_number, | |
e315cd28 AC |
2315 | ha->model_desc ? ha->model_desc : "", pdev->device, |
2316 | ha->isp_ops->pci_info_str(base_vha, pci_info), pci_name(pdev), | |
2317 | ha->flags.enable_64bit_addressing ? '+' : '-', base_vha->host_no, | |
2318 | ha->isp_ops->fw_version_str(base_vha, fw_str)); | |
1da177e4 | 2319 | |
1da177e4 LT |
2320 | return 0; |
2321 | ||
6e9f21f3 | 2322 | probe_init_failed: |
2afa19a9 AC |
2323 | qla2x00_free_req_que(ha, req); |
2324 | qla2x00_free_rsp_que(ha, rsp); | |
2325 | ha->max_req_queues = ha->max_rsp_queues = 0; | |
6e9f21f3 | 2326 | |
1da177e4 | 2327 | probe_failed: |
b9978769 AV |
2328 | if (base_vha->timer_active) |
2329 | qla2x00_stop_timer(base_vha); | |
2330 | base_vha->flags.online = 0; | |
2331 | if (ha->dpc_thread) { | |
2332 | struct task_struct *t = ha->dpc_thread; | |
2333 | ||
2334 | ha->dpc_thread = NULL; | |
2335 | kthread_stop(t); | |
2336 | } | |
2337 | ||
e315cd28 | 2338 | qla2x00_free_device(base_vha); |
1da177e4 | 2339 | |
e315cd28 | 2340 | scsi_host_put(base_vha->host); |
1da177e4 | 2341 | |
e315cd28 | 2342 | probe_hw_failed: |
a9083016 GM |
2343 | if (IS_QLA82XX(ha)) { |
2344 | qla82xx_idc_lock(ha); | |
2345 | qla82xx_clear_drv_active(ha); | |
2346 | qla82xx_idc_unlock(ha); | |
2347 | iounmap((device_reg_t __iomem *)ha->nx_pcibase); | |
2348 | if (!ql2xdbwr) | |
2349 | iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr); | |
2350 | } else { | |
2351 | if (ha->iobase) | |
2352 | iounmap(ha->iobase); | |
2353 | } | |
e315cd28 AC |
2354 | pci_release_selected_regions(ha->pdev, ha->bars); |
2355 | kfree(ha); | |
2356 | ha = NULL; | |
1da177e4 | 2357 | |
a1541d5a | 2358 | probe_out: |
e315cd28 | 2359 | pci_disable_device(pdev); |
a1541d5a | 2360 | return ret; |
1da177e4 | 2361 | } |
1da177e4 | 2362 | |
4c993f76 | 2363 | static void |
7ee61397 | 2364 | qla2x00_remove_one(struct pci_dev *pdev) |
1da177e4 | 2365 | { |
e315cd28 AC |
2366 | scsi_qla_host_t *base_vha, *vha, *temp; |
2367 | struct qla_hw_data *ha; | |
2368 | ||
2369 | base_vha = pci_get_drvdata(pdev); | |
2370 | ha = base_vha->hw; | |
2371 | ||
2372 | list_for_each_entry_safe(vha, temp, &ha->vp_list, list) { | |
2373 | if (vha && vha->fc_vport) | |
2374 | fc_vport_terminate(vha->fc_vport); | |
2375 | } | |
1da177e4 | 2376 | |
e315cd28 | 2377 | set_bit(UNLOADING, &base_vha->dpc_flags); |
1da177e4 | 2378 | |
b9978769 AV |
2379 | qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16); |
2380 | ||
e315cd28 | 2381 | qla2x00_dfs_remove(base_vha); |
c795c1e4 | 2382 | |
e315cd28 | 2383 | qla84xx_put_chip(base_vha); |
c795c1e4 | 2384 | |
b9978769 AV |
2385 | /* Disable timer */ |
2386 | if (base_vha->timer_active) | |
2387 | qla2x00_stop_timer(base_vha); | |
2388 | ||
2389 | base_vha->flags.online = 0; | |
2390 | ||
68ca949c AC |
2391 | /* Flush the work queue and remove it */ |
2392 | if (ha->wq) { | |
2393 | flush_workqueue(ha->wq); | |
2394 | destroy_workqueue(ha->wq); | |
2395 | ha->wq = NULL; | |
2396 | } | |
2397 | ||
b9978769 AV |
2398 | /* Kill the kernel thread for this host */ |
2399 | if (ha->dpc_thread) { | |
2400 | struct task_struct *t = ha->dpc_thread; | |
2401 | ||
2402 | /* | |
2403 | * qla2xxx_wake_dpc checks for ->dpc_thread | |
2404 | * so we need to zero it out. | |
2405 | */ | |
2406 | ha->dpc_thread = NULL; | |
2407 | kthread_stop(t); | |
2408 | } | |
2409 | ||
e315cd28 | 2410 | qla2x00_free_sysfs_attr(base_vha); |
df613b96 | 2411 | |
e315cd28 | 2412 | fc_remove_host(base_vha->host); |
4d4df193 | 2413 | |
e315cd28 | 2414 | scsi_remove_host(base_vha->host); |
1da177e4 | 2415 | |
e315cd28 | 2416 | qla2x00_free_device(base_vha); |
bdf79621 | 2417 | |
e315cd28 | 2418 | scsi_host_put(base_vha->host); |
1da177e4 | 2419 | |
a9083016 | 2420 | if (IS_QLA82XX(ha)) { |
b963752f GM |
2421 | qla82xx_idc_lock(ha); |
2422 | qla82xx_clear_drv_active(ha); | |
2423 | qla82xx_idc_unlock(ha); | |
2424 | ||
a9083016 GM |
2425 | iounmap((device_reg_t __iomem *)ha->nx_pcibase); |
2426 | if (!ql2xdbwr) | |
2427 | iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr); | |
2428 | } else { | |
2429 | if (ha->iobase) | |
2430 | iounmap(ha->iobase); | |
1da177e4 | 2431 | |
a9083016 GM |
2432 | if (ha->mqiobase) |
2433 | iounmap(ha->mqiobase); | |
2434 | } | |
73208dfd | 2435 | |
e315cd28 AC |
2436 | pci_release_selected_regions(ha->pdev, ha->bars); |
2437 | kfree(ha); | |
2438 | ha = NULL; | |
1da177e4 | 2439 | |
90a86fc0 JC |
2440 | pci_disable_pcie_error_reporting(pdev); |
2441 | ||
665db93b | 2442 | pci_disable_device(pdev); |
1da177e4 LT |
2443 | pci_set_drvdata(pdev, NULL); |
2444 | } | |
1da177e4 LT |
2445 | |
2446 | static void | |
e315cd28 | 2447 | qla2x00_free_device(scsi_qla_host_t *vha) |
1da177e4 | 2448 | { |
e315cd28 | 2449 | struct qla_hw_data *ha = vha->hw; |
1da177e4 | 2450 | |
85880801 AV |
2451 | qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16); |
2452 | ||
2453 | /* Disable timer */ | |
2454 | if (vha->timer_active) | |
2455 | qla2x00_stop_timer(vha); | |
2456 | ||
2457 | /* Kill the kernel thread for this host */ | |
2458 | if (ha->dpc_thread) { | |
2459 | struct task_struct *t = ha->dpc_thread; | |
2460 | ||
2461 | /* | |
2462 | * qla2xxx_wake_dpc checks for ->dpc_thread | |
2463 | * so we need to zero it out. | |
2464 | */ | |
2465 | ha->dpc_thread = NULL; | |
2466 | kthread_stop(t); | |
2467 | } | |
2468 | ||
2afa19a9 AC |
2469 | qla25xx_delete_queues(vha); |
2470 | ||
df613b96 | 2471 | if (ha->flags.fce_enabled) |
e315cd28 | 2472 | qla2x00_disable_fce_trace(vha, NULL, NULL); |
df613b96 | 2473 | |
a7a167bf | 2474 | if (ha->eft) |
e315cd28 | 2475 | qla2x00_disable_eft_trace(vha); |
a7a167bf | 2476 | |
f6ef3b18 | 2477 | /* Stop currently executing firmware. */ |
e315cd28 | 2478 | qla2x00_try_to_stop_firmware(vha); |
1da177e4 | 2479 | |
85880801 AV |
2480 | vha->flags.online = 0; |
2481 | ||
f6ef3b18 | 2482 | /* turn-off interrupts on the card */ |
a9083016 GM |
2483 | if (ha->interrupts_on) { |
2484 | vha->flags.init_done = 0; | |
fd34f556 | 2485 | ha->isp_ops->disable_intrs(ha); |
a9083016 | 2486 | } |
f6ef3b18 | 2487 | |
e315cd28 | 2488 | qla2x00_free_irqs(vha); |
1da177e4 | 2489 | |
e315cd28 | 2490 | qla2x00_mem_free(ha); |
73208dfd AC |
2491 | |
2492 | qla2x00_free_queues(ha); | |
1da177e4 LT |
2493 | } |
2494 | ||
d97994dc | 2495 | static inline void |
e315cd28 | 2496 | qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport, |
d97994dc | 2497 | int defer) |
2498 | { | |
d97994dc | 2499 | struct fc_rport *rport; |
67becc00 | 2500 | scsi_qla_host_t *base_vha; |
d97994dc | 2501 | |
2502 | if (!fcport->rport) | |
2503 | return; | |
2504 | ||
2505 | rport = fcport->rport; | |
2506 | if (defer) { | |
67becc00 | 2507 | base_vha = pci_get_drvdata(vha->hw->pdev); |
e315cd28 | 2508 | spin_lock_irq(vha->host->host_lock); |
d97994dc | 2509 | fcport->drport = rport; |
e315cd28 | 2510 | spin_unlock_irq(vha->host->host_lock); |
67becc00 AV |
2511 | set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags); |
2512 | qla2xxx_wake_dpc(base_vha); | |
5f3a9a20 | 2513 | } else |
d97994dc | 2514 | fc_remote_port_delete(rport); |
d97994dc | 2515 | } |
2516 | ||
1da177e4 LT |
2517 | /* |
2518 | * qla2x00_mark_device_lost Updates fcport state when device goes offline. | |
2519 | * | |
2520 | * Input: ha = adapter block pointer. fcport = port structure pointer. | |
2521 | * | |
2522 | * Return: None. | |
2523 | * | |
2524 | * Context: | |
2525 | */ | |
e315cd28 | 2526 | void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport, |
d97994dc | 2527 | int do_login, int defer) |
1da177e4 | 2528 | { |
2c3dfe3f | 2529 | if (atomic_read(&fcport->state) == FCS_ONLINE && |
e315cd28 AC |
2530 | vha->vp_idx == fcport->vp_idx) { |
2531 | atomic_set(&fcport->state, FCS_DEVICE_LOST); | |
2532 | qla2x00_schedule_rport_del(vha, fcport, defer); | |
2533 | } | |
fa2a1ce5 | 2534 | /* |
1da177e4 LT |
2535 | * We may need to retry the login, so don't change the state of the |
2536 | * port but do the retries. | |
2537 | */ | |
2538 | if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD) | |
2539 | atomic_set(&fcport->state, FCS_DEVICE_LOST); | |
2540 | ||
2541 | if (!do_login) | |
2542 | return; | |
2543 | ||
2544 | if (fcport->login_retry == 0) { | |
e315cd28 AC |
2545 | fcport->login_retry = vha->hw->login_retry_count; |
2546 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
1da177e4 LT |
2547 | |
2548 | DEBUG(printk("scsi(%ld): Port login retry: " | |
2549 | "%02x%02x%02x%02x%02x%02x%02x%02x, " | |
2550 | "id = 0x%04x retry cnt=%d\n", | |
e315cd28 | 2551 | vha->host_no, |
1da177e4 LT |
2552 | fcport->port_name[0], |
2553 | fcport->port_name[1], | |
2554 | fcport->port_name[2], | |
2555 | fcport->port_name[3], | |
2556 | fcport->port_name[4], | |
2557 | fcport->port_name[5], | |
2558 | fcport->port_name[6], | |
2559 | fcport->port_name[7], | |
2560 | fcport->loop_id, | |
2561 | fcport->login_retry)); | |
2562 | } | |
2563 | } | |
2564 | ||
2565 | /* | |
2566 | * qla2x00_mark_all_devices_lost | |
2567 | * Updates fcport state when device goes offline. | |
2568 | * | |
2569 | * Input: | |
2570 | * ha = adapter block pointer. | |
2571 | * fcport = port structure pointer. | |
2572 | * | |
2573 | * Return: | |
2574 | * None. | |
2575 | * | |
2576 | * Context: | |
2577 | */ | |
2578 | void | |
e315cd28 | 2579 | qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer) |
1da177e4 LT |
2580 | { |
2581 | fc_port_t *fcport; | |
2582 | ||
e315cd28 | 2583 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
0d6e61bc | 2584 | if (vha->vp_idx != 0 && vha->vp_idx != fcport->vp_idx) |
1da177e4 | 2585 | continue; |
0d6e61bc | 2586 | |
1da177e4 LT |
2587 | /* |
2588 | * No point in marking the device as lost, if the device is | |
2589 | * already DEAD. | |
2590 | */ | |
2591 | if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD) | |
2592 | continue; | |
e315cd28 | 2593 | if (atomic_read(&fcport->state) == FCS_ONLINE) { |
0d6e61bc AV |
2594 | if (defer) |
2595 | qla2x00_schedule_rport_del(vha, fcport, defer); | |
2596 | else if (vha->vp_idx == fcport->vp_idx) | |
2597 | qla2x00_schedule_rport_del(vha, fcport, defer); | |
2598 | } | |
2599 | atomic_set(&fcport->state, FCS_DEVICE_LOST); | |
1da177e4 LT |
2600 | } |
2601 | } | |
2602 | ||
2603 | /* | |
2604 | * qla2x00_mem_alloc | |
2605 | * Allocates adapter memory. | |
2606 | * | |
2607 | * Returns: | |
2608 | * 0 = success. | |
e8711085 | 2609 | * !0 = failure. |
1da177e4 | 2610 | */ |
e8711085 | 2611 | static int |
73208dfd AC |
2612 | qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len, |
2613 | struct req_que **req, struct rsp_que **rsp) | |
1da177e4 LT |
2614 | { |
2615 | char name[16]; | |
1da177e4 | 2616 | |
e8711085 | 2617 | ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size, |
e315cd28 | 2618 | &ha->init_cb_dma, GFP_KERNEL); |
e8711085 | 2619 | if (!ha->init_cb) |
e315cd28 | 2620 | goto fail; |
e8711085 | 2621 | |
e315cd28 AC |
2622 | ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, GID_LIST_SIZE, |
2623 | &ha->gid_list_dma, GFP_KERNEL); | |
2624 | if (!ha->gid_list) | |
e8711085 | 2625 | goto fail_free_init_cb; |
1da177e4 | 2626 | |
e8711085 AV |
2627 | ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); |
2628 | if (!ha->srb_mempool) | |
e315cd28 | 2629 | goto fail_free_gid_list; |
e8711085 | 2630 | |
a9083016 GM |
2631 | if (IS_QLA82XX(ha)) { |
2632 | /* Allocate cache for CT6 Ctx. */ | |
2633 | if (!ctx_cachep) { | |
2634 | ctx_cachep = kmem_cache_create("qla2xxx_ctx", | |
2635 | sizeof(struct ct6_dsd), 0, | |
2636 | SLAB_HWCACHE_ALIGN, NULL); | |
2637 | if (!ctx_cachep) | |
2638 | goto fail_free_gid_list; | |
2639 | } | |
2640 | ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ, | |
2641 | ctx_cachep); | |
2642 | if (!ha->ctx_mempool) | |
2643 | goto fail_free_srb_mempool; | |
2644 | } | |
2645 | ||
e8711085 AV |
2646 | /* Get memory for cached NVRAM */ |
2647 | ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL); | |
2648 | if (!ha->nvram) | |
a9083016 | 2649 | goto fail_free_ctx_mempool; |
e8711085 | 2650 | |
e315cd28 AC |
2651 | snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME, |
2652 | ha->pdev->device); | |
2653 | ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev, | |
2654 | DMA_POOL_SIZE, 8, 0); | |
2655 | if (!ha->s_dma_pool) | |
2656 | goto fail_free_nvram; | |
2657 | ||
bad75002 | 2658 | if (IS_QLA82XX(ha) || ql2xenabledif) { |
a9083016 GM |
2659 | ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev, |
2660 | DSD_LIST_DMA_POOL_SIZE, 8, 0); | |
2661 | if (!ha->dl_dma_pool) { | |
2662 | qla_printk(KERN_WARNING, ha, | |
2663 | "Memory Allocation failed - dl_dma_pool\n"); | |
2664 | goto fail_s_dma_pool; | |
2665 | } | |
2666 | ||
2667 | ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev, | |
2668 | FCP_CMND_DMA_POOL_SIZE, 8, 0); | |
2669 | if (!ha->fcp_cmnd_dma_pool) { | |
2670 | qla_printk(KERN_WARNING, ha, | |
2671 | "Memory Allocation failed - fcp_cmnd_dma_pool\n"); | |
2672 | goto fail_dl_dma_pool; | |
2673 | } | |
2674 | } | |
2675 | ||
e8711085 AV |
2676 | /* Allocate memory for SNS commands */ |
2677 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { | |
e315cd28 | 2678 | /* Get consistent memory allocated for SNS commands */ |
e8711085 | 2679 | ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev, |
e315cd28 | 2680 | sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL); |
e8711085 | 2681 | if (!ha->sns_cmd) |
e315cd28 | 2682 | goto fail_dma_pool; |
e8711085 | 2683 | } else { |
e315cd28 | 2684 | /* Get consistent memory allocated for MS IOCB */ |
e8711085 | 2685 | ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, |
e315cd28 | 2686 | &ha->ms_iocb_dma); |
e8711085 | 2687 | if (!ha->ms_iocb) |
e315cd28 AC |
2688 | goto fail_dma_pool; |
2689 | /* Get consistent memory allocated for CT SNS commands */ | |
e8711085 | 2690 | ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev, |
e315cd28 | 2691 | sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL); |
e8711085 AV |
2692 | if (!ha->ct_sns) |
2693 | goto fail_free_ms_iocb; | |
1da177e4 LT |
2694 | } |
2695 | ||
e315cd28 | 2696 | /* Allocate memory for request ring */ |
73208dfd AC |
2697 | *req = kzalloc(sizeof(struct req_que), GFP_KERNEL); |
2698 | if (!*req) { | |
e315cd28 AC |
2699 | DEBUG(printk("Unable to allocate memory for req\n")); |
2700 | goto fail_req; | |
2701 | } | |
73208dfd AC |
2702 | (*req)->length = req_len; |
2703 | (*req)->ring = dma_alloc_coherent(&ha->pdev->dev, | |
2704 | ((*req)->length + 1) * sizeof(request_t), | |
2705 | &(*req)->dma, GFP_KERNEL); | |
2706 | if (!(*req)->ring) { | |
e315cd28 AC |
2707 | DEBUG(printk("Unable to allocate memory for req_ring\n")); |
2708 | goto fail_req_ring; | |
2709 | } | |
2710 | /* Allocate memory for response ring */ | |
73208dfd AC |
2711 | *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL); |
2712 | if (!*rsp) { | |
2713 | qla_printk(KERN_WARNING, ha, | |
2714 | "Unable to allocate memory for rsp\n"); | |
e315cd28 AC |
2715 | goto fail_rsp; |
2716 | } | |
73208dfd AC |
2717 | (*rsp)->hw = ha; |
2718 | (*rsp)->length = rsp_len; | |
2719 | (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev, | |
2720 | ((*rsp)->length + 1) * sizeof(response_t), | |
2721 | &(*rsp)->dma, GFP_KERNEL); | |
2722 | if (!(*rsp)->ring) { | |
2723 | qla_printk(KERN_WARNING, ha, | |
2724 | "Unable to allocate memory for rsp_ring\n"); | |
e315cd28 AC |
2725 | goto fail_rsp_ring; |
2726 | } | |
73208dfd AC |
2727 | (*req)->rsp = *rsp; |
2728 | (*rsp)->req = *req; | |
2729 | /* Allocate memory for NVRAM data for vports */ | |
2730 | if (ha->nvram_npiv_size) { | |
2731 | ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) * | |
2732 | ha->nvram_npiv_size, GFP_KERNEL); | |
2733 | if (!ha->npiv_info) { | |
2734 | qla_printk(KERN_WARNING, ha, | |
2735 | "Unable to allocate memory for npiv info\n"); | |
2736 | goto fail_npiv_info; | |
2737 | } | |
2738 | } else | |
2739 | ha->npiv_info = NULL; | |
e8711085 | 2740 | |
b64b0e8f | 2741 | /* Get consistent memory allocated for EX-INIT-CB. */ |
a9083016 | 2742 | if (IS_QLA8XXX_TYPE(ha)) { |
b64b0e8f AV |
2743 | ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, |
2744 | &ha->ex_init_cb_dma); | |
2745 | if (!ha->ex_init_cb) | |
2746 | goto fail_ex_init_cb; | |
2747 | } | |
2748 | ||
a9083016 GM |
2749 | INIT_LIST_HEAD(&ha->gbl_dsd_list); |
2750 | ||
5ff1d584 AV |
2751 | /* Get consistent memory allocated for Async Port-Database. */ |
2752 | if (!IS_FWI2_CAPABLE(ha)) { | |
2753 | ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, | |
2754 | &ha->async_pd_dma); | |
2755 | if (!ha->async_pd) | |
2756 | goto fail_async_pd; | |
2757 | } | |
2758 | ||
e315cd28 AC |
2759 | INIT_LIST_HEAD(&ha->vp_list); |
2760 | return 1; | |
2761 | ||
5ff1d584 AV |
2762 | fail_async_pd: |
2763 | dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma); | |
b64b0e8f AV |
2764 | fail_ex_init_cb: |
2765 | kfree(ha->npiv_info); | |
73208dfd AC |
2766 | fail_npiv_info: |
2767 | dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) * | |
2768 | sizeof(response_t), (*rsp)->ring, (*rsp)->dma); | |
2769 | (*rsp)->ring = NULL; | |
2770 | (*rsp)->dma = 0; | |
e315cd28 | 2771 | fail_rsp_ring: |
73208dfd | 2772 | kfree(*rsp); |
e315cd28 | 2773 | fail_rsp: |
73208dfd AC |
2774 | dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) * |
2775 | sizeof(request_t), (*req)->ring, (*req)->dma); | |
2776 | (*req)->ring = NULL; | |
2777 | (*req)->dma = 0; | |
e315cd28 | 2778 | fail_req_ring: |
73208dfd | 2779 | kfree(*req); |
e315cd28 AC |
2780 | fail_req: |
2781 | dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt), | |
2782 | ha->ct_sns, ha->ct_sns_dma); | |
2783 | ha->ct_sns = NULL; | |
2784 | ha->ct_sns_dma = 0; | |
e8711085 AV |
2785 | fail_free_ms_iocb: |
2786 | dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma); | |
2787 | ha->ms_iocb = NULL; | |
2788 | ha->ms_iocb_dma = 0; | |
e315cd28 | 2789 | fail_dma_pool: |
bad75002 | 2790 | if (IS_QLA82XX(ha) || ql2xenabledif) { |
a9083016 GM |
2791 | dma_pool_destroy(ha->fcp_cmnd_dma_pool); |
2792 | ha->fcp_cmnd_dma_pool = NULL; | |
2793 | } | |
2794 | fail_dl_dma_pool: | |
bad75002 | 2795 | if (IS_QLA82XX(ha) || ql2xenabledif) { |
a9083016 GM |
2796 | dma_pool_destroy(ha->dl_dma_pool); |
2797 | ha->dl_dma_pool = NULL; | |
2798 | } | |
2799 | fail_s_dma_pool: | |
e315cd28 AC |
2800 | dma_pool_destroy(ha->s_dma_pool); |
2801 | ha->s_dma_pool = NULL; | |
e8711085 AV |
2802 | fail_free_nvram: |
2803 | kfree(ha->nvram); | |
2804 | ha->nvram = NULL; | |
a9083016 GM |
2805 | fail_free_ctx_mempool: |
2806 | mempool_destroy(ha->ctx_mempool); | |
2807 | ha->ctx_mempool = NULL; | |
e8711085 AV |
2808 | fail_free_srb_mempool: |
2809 | mempool_destroy(ha->srb_mempool); | |
2810 | ha->srb_mempool = NULL; | |
e8711085 AV |
2811 | fail_free_gid_list: |
2812 | dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list, | |
e315cd28 | 2813 | ha->gid_list_dma); |
e8711085 AV |
2814 | ha->gid_list = NULL; |
2815 | ha->gid_list_dma = 0; | |
e315cd28 AC |
2816 | fail_free_init_cb: |
2817 | dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb, | |
2818 | ha->init_cb_dma); | |
2819 | ha->init_cb = NULL; | |
2820 | ha->init_cb_dma = 0; | |
e8711085 | 2821 | fail: |
e315cd28 | 2822 | DEBUG(printk("%s: Memory allocation failure\n", __func__)); |
e8711085 | 2823 | return -ENOMEM; |
1da177e4 LT |
2824 | } |
2825 | ||
2826 | /* | |
2827 | * qla2x00_mem_free | |
2828 | * Frees all adapter allocated memory. | |
2829 | * | |
2830 | * Input: | |
2831 | * ha = adapter block pointer. | |
2832 | */ | |
a824ebb3 | 2833 | static void |
e315cd28 | 2834 | qla2x00_mem_free(struct qla_hw_data *ha) |
1da177e4 | 2835 | { |
e8711085 AV |
2836 | if (ha->srb_mempool) |
2837 | mempool_destroy(ha->srb_mempool); | |
1da177e4 | 2838 | |
df613b96 AV |
2839 | if (ha->fce) |
2840 | dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce, | |
e315cd28 | 2841 | ha->fce_dma); |
df613b96 | 2842 | |
a7a167bf AV |
2843 | if (ha->fw_dump) { |
2844 | if (ha->eft) | |
2845 | dma_free_coherent(&ha->pdev->dev, | |
e315cd28 | 2846 | ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma); |
a7a167bf AV |
2847 | vfree(ha->fw_dump); |
2848 | } | |
2849 | ||
11bbc1d8 AV |
2850 | if (ha->dcbx_tlv) |
2851 | dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE, | |
2852 | ha->dcbx_tlv, ha->dcbx_tlv_dma); | |
2853 | ||
ce0423f4 AV |
2854 | if (ha->xgmac_data) |
2855 | dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE, | |
2856 | ha->xgmac_data, ha->xgmac_data_dma); | |
2857 | ||
1da177e4 LT |
2858 | if (ha->sns_cmd) |
2859 | dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt), | |
e315cd28 | 2860 | ha->sns_cmd, ha->sns_cmd_dma); |
1da177e4 LT |
2861 | |
2862 | if (ha->ct_sns) | |
2863 | dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt), | |
e315cd28 | 2864 | ha->ct_sns, ha->ct_sns_dma); |
1da177e4 | 2865 | |
88729e53 AV |
2866 | if (ha->sfp_data) |
2867 | dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma); | |
2868 | ||
ad0ecd61 JC |
2869 | if (ha->edc_data) |
2870 | dma_pool_free(ha->s_dma_pool, ha->edc_data, ha->edc_data_dma); | |
2871 | ||
1da177e4 LT |
2872 | if (ha->ms_iocb) |
2873 | dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma); | |
2874 | ||
b64b0e8f | 2875 | if (ha->ex_init_cb) |
a9083016 GM |
2876 | dma_pool_free(ha->s_dma_pool, |
2877 | ha->ex_init_cb, ha->ex_init_cb_dma); | |
b64b0e8f | 2878 | |
5ff1d584 AV |
2879 | if (ha->async_pd) |
2880 | dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma); | |
2881 | ||
1da177e4 LT |
2882 | if (ha->s_dma_pool) |
2883 | dma_pool_destroy(ha->s_dma_pool); | |
2884 | ||
1da177e4 LT |
2885 | if (ha->gid_list) |
2886 | dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list, | |
e315cd28 | 2887 | ha->gid_list_dma); |
1da177e4 | 2888 | |
a9083016 GM |
2889 | if (IS_QLA82XX(ha)) { |
2890 | if (!list_empty(&ha->gbl_dsd_list)) { | |
2891 | struct dsd_dma *dsd_ptr, *tdsd_ptr; | |
2892 | ||
2893 | /* clean up allocated prev pool */ | |
2894 | list_for_each_entry_safe(dsd_ptr, | |
2895 | tdsd_ptr, &ha->gbl_dsd_list, list) { | |
2896 | dma_pool_free(ha->dl_dma_pool, | |
2897 | dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma); | |
2898 | list_del(&dsd_ptr->list); | |
2899 | kfree(dsd_ptr); | |
2900 | } | |
2901 | } | |
2902 | } | |
2903 | ||
2904 | if (ha->dl_dma_pool) | |
2905 | dma_pool_destroy(ha->dl_dma_pool); | |
2906 | ||
2907 | if (ha->fcp_cmnd_dma_pool) | |
2908 | dma_pool_destroy(ha->fcp_cmnd_dma_pool); | |
2909 | ||
2910 | if (ha->ctx_mempool) | |
2911 | mempool_destroy(ha->ctx_mempool); | |
2912 | ||
e315cd28 AC |
2913 | if (ha->init_cb) |
2914 | dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, | |
a9083016 | 2915 | ha->init_cb, ha->init_cb_dma); |
e315cd28 AC |
2916 | vfree(ha->optrom_buffer); |
2917 | kfree(ha->nvram); | |
73208dfd | 2918 | kfree(ha->npiv_info); |
1da177e4 | 2919 | |
e8711085 | 2920 | ha->srb_mempool = NULL; |
a9083016 | 2921 | ha->ctx_mempool = NULL; |
a7a167bf AV |
2922 | ha->eft = NULL; |
2923 | ha->eft_dma = 0; | |
1da177e4 LT |
2924 | ha->sns_cmd = NULL; |
2925 | ha->sns_cmd_dma = 0; | |
2926 | ha->ct_sns = NULL; | |
2927 | ha->ct_sns_dma = 0; | |
2928 | ha->ms_iocb = NULL; | |
2929 | ha->ms_iocb_dma = 0; | |
1da177e4 LT |
2930 | ha->init_cb = NULL; |
2931 | ha->init_cb_dma = 0; | |
b64b0e8f AV |
2932 | ha->ex_init_cb = NULL; |
2933 | ha->ex_init_cb_dma = 0; | |
5ff1d584 AV |
2934 | ha->async_pd = NULL; |
2935 | ha->async_pd_dma = 0; | |
1da177e4 LT |
2936 | |
2937 | ha->s_dma_pool = NULL; | |
a9083016 GM |
2938 | ha->dl_dma_pool = NULL; |
2939 | ha->fcp_cmnd_dma_pool = NULL; | |
1da177e4 | 2940 | |
1da177e4 LT |
2941 | ha->gid_list = NULL; |
2942 | ha->gid_list_dma = 0; | |
2943 | ||
e315cd28 AC |
2944 | ha->fw_dump = NULL; |
2945 | ha->fw_dumped = 0; | |
2946 | ha->fw_dump_reading = 0; | |
e315cd28 | 2947 | } |
1da177e4 | 2948 | |
e315cd28 AC |
2949 | struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht, |
2950 | struct qla_hw_data *ha) | |
2951 | { | |
2952 | struct Scsi_Host *host; | |
2953 | struct scsi_qla_host *vha = NULL; | |
854165f4 | 2954 | |
e315cd28 AC |
2955 | host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t)); |
2956 | if (host == NULL) { | |
2957 | printk(KERN_WARNING | |
2958 | "qla2xxx: Couldn't allocate host from scsi layer!\n"); | |
2959 | goto fail; | |
2960 | } | |
2961 | ||
2962 | /* Clear our data area */ | |
2963 | vha = shost_priv(host); | |
2964 | memset(vha, 0, sizeof(scsi_qla_host_t)); | |
2965 | ||
2966 | vha->host = host; | |
2967 | vha->host_no = host->host_no; | |
2968 | vha->hw = ha; | |
2969 | ||
2970 | INIT_LIST_HEAD(&vha->vp_fcports); | |
2971 | INIT_LIST_HEAD(&vha->work_list); | |
2972 | INIT_LIST_HEAD(&vha->list); | |
2973 | ||
f999f4c1 AV |
2974 | spin_lock_init(&vha->work_lock); |
2975 | ||
e315cd28 AC |
2976 | sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no); |
2977 | return vha; | |
2978 | ||
2979 | fail: | |
2980 | return vha; | |
1da177e4 LT |
2981 | } |
2982 | ||
01ef66bb | 2983 | static struct qla_work_evt * |
f999f4c1 | 2984 | qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type) |
0971de7f AV |
2985 | { |
2986 | struct qla_work_evt *e; | |
2987 | ||
f999f4c1 | 2988 | e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC); |
0971de7f AV |
2989 | if (!e) |
2990 | return NULL; | |
2991 | ||
2992 | INIT_LIST_HEAD(&e->list); | |
2993 | e->type = type; | |
2994 | e->flags = QLA_EVT_FLAG_FREE; | |
2995 | return e; | |
2996 | } | |
2997 | ||
01ef66bb | 2998 | static int |
f999f4c1 | 2999 | qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e) |
0971de7f | 3000 | { |
f999f4c1 | 3001 | unsigned long flags; |
0971de7f | 3002 | |
f999f4c1 | 3003 | spin_lock_irqsave(&vha->work_lock, flags); |
e315cd28 | 3004 | list_add_tail(&e->list, &vha->work_list); |
f999f4c1 | 3005 | spin_unlock_irqrestore(&vha->work_lock, flags); |
e315cd28 | 3006 | qla2xxx_wake_dpc(vha); |
f999f4c1 | 3007 | |
0971de7f AV |
3008 | return QLA_SUCCESS; |
3009 | } | |
3010 | ||
3011 | int | |
e315cd28 | 3012 | qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code, |
0971de7f AV |
3013 | u32 data) |
3014 | { | |
3015 | struct qla_work_evt *e; | |
3016 | ||
f999f4c1 | 3017 | e = qla2x00_alloc_work(vha, QLA_EVT_AEN); |
0971de7f AV |
3018 | if (!e) |
3019 | return QLA_FUNCTION_FAILED; | |
3020 | ||
3021 | e->u.aen.code = code; | |
3022 | e->u.aen.data = data; | |
f999f4c1 | 3023 | return qla2x00_post_work(vha, e); |
0971de7f AV |
3024 | } |
3025 | ||
8a659571 AV |
3026 | int |
3027 | qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb) | |
3028 | { | |
3029 | struct qla_work_evt *e; | |
3030 | ||
f999f4c1 | 3031 | e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK); |
8a659571 AV |
3032 | if (!e) |
3033 | return QLA_FUNCTION_FAILED; | |
3034 | ||
3035 | memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t)); | |
f999f4c1 | 3036 | return qla2x00_post_work(vha, e); |
8a659571 AV |
3037 | } |
3038 | ||
ac280b67 AV |
3039 | #define qla2x00_post_async_work(name, type) \ |
3040 | int qla2x00_post_async_##name##_work( \ | |
3041 | struct scsi_qla_host *vha, \ | |
3042 | fc_port_t *fcport, uint16_t *data) \ | |
3043 | { \ | |
3044 | struct qla_work_evt *e; \ | |
3045 | \ | |
3046 | e = qla2x00_alloc_work(vha, type); \ | |
3047 | if (!e) \ | |
3048 | return QLA_FUNCTION_FAILED; \ | |
3049 | \ | |
3050 | e->u.logio.fcport = fcport; \ | |
3051 | if (data) { \ | |
3052 | e->u.logio.data[0] = data[0]; \ | |
3053 | e->u.logio.data[1] = data[1]; \ | |
3054 | } \ | |
3055 | return qla2x00_post_work(vha, e); \ | |
3056 | } | |
3057 | ||
3058 | qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN); | |
3059 | qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE); | |
3060 | qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT); | |
3061 | qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE); | |
5ff1d584 AV |
3062 | qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC); |
3063 | qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE); | |
ac280b67 | 3064 | |
3420d36c AV |
3065 | int |
3066 | qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code) | |
3067 | { | |
3068 | struct qla_work_evt *e; | |
3069 | ||
3070 | e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT); | |
3071 | if (!e) | |
3072 | return QLA_FUNCTION_FAILED; | |
3073 | ||
3074 | e->u.uevent.code = code; | |
3075 | return qla2x00_post_work(vha, e); | |
3076 | } | |
3077 | ||
3078 | static void | |
3079 | qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code) | |
3080 | { | |
3081 | char event_string[40]; | |
3082 | char *envp[] = { event_string, NULL }; | |
3083 | ||
3084 | switch (code) { | |
3085 | case QLA_UEVENT_CODE_FW_DUMP: | |
3086 | snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld", | |
3087 | vha->host_no); | |
3088 | break; | |
3089 | default: | |
3090 | /* do nothing */ | |
3091 | break; | |
3092 | } | |
3093 | kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp); | |
3094 | } | |
3095 | ||
ac280b67 | 3096 | void |
e315cd28 | 3097 | qla2x00_do_work(struct scsi_qla_host *vha) |
0971de7f | 3098 | { |
f999f4c1 AV |
3099 | struct qla_work_evt *e, *tmp; |
3100 | unsigned long flags; | |
3101 | LIST_HEAD(work); | |
0971de7f | 3102 | |
f999f4c1 AV |
3103 | spin_lock_irqsave(&vha->work_lock, flags); |
3104 | list_splice_init(&vha->work_list, &work); | |
3105 | spin_unlock_irqrestore(&vha->work_lock, flags); | |
3106 | ||
3107 | list_for_each_entry_safe(e, tmp, &work, list) { | |
0971de7f | 3108 | list_del_init(&e->list); |
0971de7f AV |
3109 | |
3110 | switch (e->type) { | |
3111 | case QLA_EVT_AEN: | |
e315cd28 | 3112 | fc_host_post_event(vha->host, fc_get_event_number(), |
0971de7f AV |
3113 | e->u.aen.code, e->u.aen.data); |
3114 | break; | |
8a659571 AV |
3115 | case QLA_EVT_IDC_ACK: |
3116 | qla81xx_idc_ack(vha, e->u.idc_ack.mb); | |
3117 | break; | |
ac280b67 AV |
3118 | case QLA_EVT_ASYNC_LOGIN: |
3119 | qla2x00_async_login(vha, e->u.logio.fcport, | |
3120 | e->u.logio.data); | |
3121 | break; | |
3122 | case QLA_EVT_ASYNC_LOGIN_DONE: | |
3123 | qla2x00_async_login_done(vha, e->u.logio.fcport, | |
3124 | e->u.logio.data); | |
3125 | break; | |
3126 | case QLA_EVT_ASYNC_LOGOUT: | |
3127 | qla2x00_async_logout(vha, e->u.logio.fcport); | |
3128 | break; | |
3129 | case QLA_EVT_ASYNC_LOGOUT_DONE: | |
3130 | qla2x00_async_logout_done(vha, e->u.logio.fcport, | |
3131 | e->u.logio.data); | |
3132 | break; | |
5ff1d584 AV |
3133 | case QLA_EVT_ASYNC_ADISC: |
3134 | qla2x00_async_adisc(vha, e->u.logio.fcport, | |
3135 | e->u.logio.data); | |
3136 | break; | |
3137 | case QLA_EVT_ASYNC_ADISC_DONE: | |
3138 | qla2x00_async_adisc_done(vha, e->u.logio.fcport, | |
3139 | e->u.logio.data); | |
3140 | break; | |
3420d36c AV |
3141 | case QLA_EVT_UEVENT: |
3142 | qla2x00_uevent_emit(vha, e->u.uevent.code); | |
3143 | break; | |
0971de7f AV |
3144 | } |
3145 | if (e->flags & QLA_EVT_FLAG_FREE) | |
3146 | kfree(e); | |
e315cd28 | 3147 | } |
e315cd28 | 3148 | } |
f999f4c1 | 3149 | |
e315cd28 AC |
3150 | /* Relogins all the fcports of a vport |
3151 | * Context: dpc thread | |
3152 | */ | |
3153 | void qla2x00_relogin(struct scsi_qla_host *vha) | |
3154 | { | |
3155 | fc_port_t *fcport; | |
c6b2fca8 | 3156 | int status; |
e315cd28 AC |
3157 | uint16_t next_loopid = 0; |
3158 | struct qla_hw_data *ha = vha->hw; | |
ac280b67 | 3159 | uint16_t data[2]; |
e315cd28 AC |
3160 | |
3161 | list_for_each_entry(fcport, &vha->vp_fcports, list) { | |
3162 | /* | |
3163 | * If the port is not ONLINE then try to login | |
3164 | * to it if we haven't run out of retries. | |
3165 | */ | |
5ff1d584 AV |
3166 | if (atomic_read(&fcport->state) != FCS_ONLINE && |
3167 | fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) { | |
ac280b67 | 3168 | fcport->login_retry--; |
e315cd28 | 3169 | if (fcport->flags & FCF_FABRIC_DEVICE) { |
f08b7251 | 3170 | if (fcport->flags & FCF_FCP2_DEVICE) |
e315cd28 AC |
3171 | ha->isp_ops->fabric_logout(vha, |
3172 | fcport->loop_id, | |
3173 | fcport->d_id.b.domain, | |
3174 | fcport->d_id.b.area, | |
3175 | fcport->d_id.b.al_pa); | |
3176 | ||
ac280b67 | 3177 | if (IS_ALOGIO_CAPABLE(ha)) { |
5ff1d584 | 3178 | fcport->flags |= FCF_ASYNC_SENT; |
ac280b67 AV |
3179 | data[0] = 0; |
3180 | data[1] = QLA_LOGIO_LOGIN_RETRIED; | |
3181 | status = qla2x00_post_async_login_work( | |
3182 | vha, fcport, data); | |
3183 | if (status == QLA_SUCCESS) | |
3184 | continue; | |
3185 | /* Attempt a retry. */ | |
3186 | status = 1; | |
3187 | } else | |
3188 | status = qla2x00_fabric_login(vha, | |
3189 | fcport, &next_loopid); | |
e315cd28 AC |
3190 | } else |
3191 | status = qla2x00_local_device_login(vha, | |
3192 | fcport); | |
3193 | ||
e315cd28 AC |
3194 | if (status == QLA_SUCCESS) { |
3195 | fcport->old_loop_id = fcport->loop_id; | |
3196 | ||
3197 | DEBUG(printk("scsi(%ld): port login OK: logged " | |
3198 | "in ID 0x%x\n", vha->host_no, fcport->loop_id)); | |
3199 | ||
3200 | qla2x00_update_fcport(vha, fcport); | |
3201 | ||
3202 | } else if (status == 1) { | |
3203 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
3204 | /* retry the login again */ | |
3205 | DEBUG(printk("scsi(%ld): Retrying" | |
3206 | " %d login again loop_id 0x%x\n", | |
3207 | vha->host_no, fcport->login_retry, | |
3208 | fcport->loop_id)); | |
3209 | } else { | |
3210 | fcport->login_retry = 0; | |
3211 | } | |
3212 | ||
3213 | if (fcport->login_retry == 0 && status != QLA_SUCCESS) | |
3214 | fcport->loop_id = FC_NO_LOOP_ID; | |
3215 | } | |
3216 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
3217 | break; | |
0971de7f | 3218 | } |
0971de7f AV |
3219 | } |
3220 | ||
1da177e4 LT |
3221 | /************************************************************************** |
3222 | * qla2x00_do_dpc | |
3223 | * This kernel thread is a task that is schedule by the interrupt handler | |
3224 | * to perform the background processing for interrupts. | |
3225 | * | |
3226 | * Notes: | |
3227 | * This task always run in the context of a kernel thread. It | |
3228 | * is kick-off by the driver's detect code and starts up | |
3229 | * up one per adapter. It immediately goes to sleep and waits for | |
3230 | * some fibre event. When either the interrupt handler or | |
3231 | * the timer routine detects a event it will one of the task | |
3232 | * bits then wake us up. | |
3233 | **************************************************************************/ | |
3234 | static int | |
3235 | qla2x00_do_dpc(void *data) | |
3236 | { | |
2c3dfe3f | 3237 | int rval; |
e315cd28 AC |
3238 | scsi_qla_host_t *base_vha; |
3239 | struct qla_hw_data *ha; | |
1da177e4 | 3240 | |
e315cd28 AC |
3241 | ha = (struct qla_hw_data *)data; |
3242 | base_vha = pci_get_drvdata(ha->pdev); | |
1da177e4 | 3243 | |
1da177e4 LT |
3244 | set_user_nice(current, -20); |
3245 | ||
39a11240 | 3246 | while (!kthread_should_stop()) { |
1da177e4 LT |
3247 | DEBUG3(printk("qla2x00: DPC handler sleeping\n")); |
3248 | ||
39a11240 CH |
3249 | set_current_state(TASK_INTERRUPTIBLE); |
3250 | schedule(); | |
3251 | __set_current_state(TASK_RUNNING); | |
1da177e4 LT |
3252 | |
3253 | DEBUG3(printk("qla2x00: DPC handler waking up\n")); | |
3254 | ||
3255 | /* Initialization not yet finished. Don't do anything yet. */ | |
e315cd28 | 3256 | if (!base_vha->flags.init_done) |
1da177e4 LT |
3257 | continue; |
3258 | ||
85880801 AV |
3259 | if (ha->flags.eeh_busy) { |
3260 | DEBUG17(qla_printk(KERN_WARNING, ha, | |
3261 | "qla2x00_do_dpc: dpc_flags: %lx\n", | |
3262 | base_vha->dpc_flags)); | |
3263 | continue; | |
3264 | } | |
3265 | ||
e315cd28 | 3266 | DEBUG3(printk("scsi(%ld): DPC handler\n", base_vha->host_no)); |
1da177e4 LT |
3267 | |
3268 | ha->dpc_active = 1; | |
3269 | ||
1da177e4 | 3270 | if (ha->flags.mbox_busy) { |
1da177e4 LT |
3271 | ha->dpc_active = 0; |
3272 | continue; | |
3273 | } | |
3274 | ||
e315cd28 | 3275 | qla2x00_do_work(base_vha); |
0971de7f | 3276 | |
a9083016 GM |
3277 | if (IS_QLA82XX(ha)) { |
3278 | if (test_and_clear_bit(ISP_UNRECOVERABLE, | |
3279 | &base_vha->dpc_flags)) { | |
3280 | qla82xx_idc_lock(ha); | |
3281 | qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, | |
3282 | QLA82XX_DEV_FAILED); | |
3283 | qla82xx_idc_unlock(ha); | |
3284 | qla_printk(KERN_INFO, ha, | |
3285 | "HW State: FAILED\n"); | |
3286 | qla82xx_device_state_handler(base_vha); | |
3287 | continue; | |
3288 | } | |
3289 | ||
3290 | if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED, | |
3291 | &base_vha->dpc_flags)) { | |
3292 | ||
3293 | DEBUG(printk(KERN_INFO | |
3294 | "scsi(%ld): dpc: sched " | |
3295 | "qla82xx_fcoe_ctx_reset ha = %p\n", | |
3296 | base_vha->host_no, ha)); | |
3297 | if (!(test_and_set_bit(ABORT_ISP_ACTIVE, | |
3298 | &base_vha->dpc_flags))) { | |
3299 | if (qla82xx_fcoe_ctx_reset(base_vha)) { | |
3300 | /* FCoE-ctx reset failed. | |
3301 | * Escalate to chip-reset | |
3302 | */ | |
3303 | set_bit(ISP_ABORT_NEEDED, | |
3304 | &base_vha->dpc_flags); | |
3305 | } | |
3306 | clear_bit(ABORT_ISP_ACTIVE, | |
3307 | &base_vha->dpc_flags); | |
3308 | } | |
3309 | ||
3310 | DEBUG(printk("scsi(%ld): dpc:" | |
3311 | " qla82xx_fcoe_ctx_reset end\n", | |
3312 | base_vha->host_no)); | |
3313 | } | |
3314 | } | |
3315 | ||
e315cd28 AC |
3316 | if (test_and_clear_bit(ISP_ABORT_NEEDED, |
3317 | &base_vha->dpc_flags)) { | |
1da177e4 LT |
3318 | |
3319 | DEBUG(printk("scsi(%ld): dpc: sched " | |
3320 | "qla2x00_abort_isp ha = %p\n", | |
e315cd28 | 3321 | base_vha->host_no, ha)); |
1da177e4 | 3322 | if (!(test_and_set_bit(ABORT_ISP_ACTIVE, |
e315cd28 | 3323 | &base_vha->dpc_flags))) { |
1da177e4 | 3324 | |
a9083016 | 3325 | if (ha->isp_ops->abort_isp(base_vha)) { |
1da177e4 LT |
3326 | /* failed. retry later */ |
3327 | set_bit(ISP_ABORT_NEEDED, | |
e315cd28 | 3328 | &base_vha->dpc_flags); |
99363ef8 | 3329 | } |
e315cd28 AC |
3330 | clear_bit(ABORT_ISP_ACTIVE, |
3331 | &base_vha->dpc_flags); | |
99363ef8 SJ |
3332 | } |
3333 | ||
1da177e4 | 3334 | DEBUG(printk("scsi(%ld): dpc: qla2x00_abort_isp end\n", |
e315cd28 | 3335 | base_vha->host_no)); |
1da177e4 LT |
3336 | } |
3337 | ||
e315cd28 AC |
3338 | if (test_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags)) { |
3339 | qla2x00_update_fcports(base_vha); | |
3340 | clear_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags); | |
c9c5ced9 | 3341 | } |
d97994dc | 3342 | |
e315cd28 AC |
3343 | if (test_and_clear_bit(RESET_MARKER_NEEDED, |
3344 | &base_vha->dpc_flags) && | |
3345 | (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) { | |
1da177e4 LT |
3346 | |
3347 | DEBUG(printk("scsi(%ld): qla2x00_reset_marker()\n", | |
e315cd28 | 3348 | base_vha->host_no)); |
1da177e4 | 3349 | |
e315cd28 AC |
3350 | qla2x00_rst_aen(base_vha); |
3351 | clear_bit(RESET_ACTIVE, &base_vha->dpc_flags); | |
1da177e4 LT |
3352 | } |
3353 | ||
3354 | /* Retry each device up to login retry count */ | |
e315cd28 AC |
3355 | if ((test_and_clear_bit(RELOGIN_NEEDED, |
3356 | &base_vha->dpc_flags)) && | |
3357 | !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) && | |
3358 | atomic_read(&base_vha->loop_state) != LOOP_DOWN) { | |
1da177e4 LT |
3359 | |
3360 | DEBUG(printk("scsi(%ld): qla2x00_port_login()\n", | |
e315cd28 AC |
3361 | base_vha->host_no)); |
3362 | qla2x00_relogin(base_vha); | |
3363 | ||
1da177e4 | 3364 | DEBUG(printk("scsi(%ld): qla2x00_port_login - end\n", |
e315cd28 | 3365 | base_vha->host_no)); |
1da177e4 LT |
3366 | } |
3367 | ||
e315cd28 AC |
3368 | if (test_and_clear_bit(LOOP_RESYNC_NEEDED, |
3369 | &base_vha->dpc_flags)) { | |
1da177e4 LT |
3370 | |
3371 | DEBUG(printk("scsi(%ld): qla2x00_loop_resync()\n", | |
e315cd28 | 3372 | base_vha->host_no)); |
1da177e4 LT |
3373 | |
3374 | if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE, | |
e315cd28 | 3375 | &base_vha->dpc_flags))) { |
1da177e4 | 3376 | |
e315cd28 | 3377 | rval = qla2x00_loop_resync(base_vha); |
1da177e4 | 3378 | |
e315cd28 AC |
3379 | clear_bit(LOOP_RESYNC_ACTIVE, |
3380 | &base_vha->dpc_flags); | |
1da177e4 LT |
3381 | } |
3382 | ||
3383 | DEBUG(printk("scsi(%ld): qla2x00_loop_resync - end\n", | |
e315cd28 | 3384 | base_vha->host_no)); |
1da177e4 LT |
3385 | } |
3386 | ||
e315cd28 AC |
3387 | if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) && |
3388 | atomic_read(&base_vha->loop_state) == LOOP_READY) { | |
3389 | clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags); | |
3390 | qla2xxx_flash_npiv_conf(base_vha); | |
272976ca AV |
3391 | } |
3392 | ||
1da177e4 | 3393 | if (!ha->interrupts_on) |
fd34f556 | 3394 | ha->isp_ops->enable_intrs(ha); |
1da177e4 | 3395 | |
e315cd28 AC |
3396 | if (test_and_clear_bit(BEACON_BLINK_NEEDED, |
3397 | &base_vha->dpc_flags)) | |
3398 | ha->isp_ops->beacon_blink(base_vha); | |
f6df144c | 3399 | |
e315cd28 | 3400 | qla2x00_do_dpc_all_vps(base_vha); |
2c3dfe3f | 3401 | |
1da177e4 LT |
3402 | ha->dpc_active = 0; |
3403 | } /* End of while(1) */ | |
3404 | ||
e315cd28 | 3405 | DEBUG(printk("scsi(%ld): DPC handler exiting\n", base_vha->host_no)); |
1da177e4 LT |
3406 | |
3407 | /* | |
3408 | * Make sure that nobody tries to wake us up again. | |
3409 | */ | |
1da177e4 LT |
3410 | ha->dpc_active = 0; |
3411 | ||
ac280b67 AV |
3412 | /* Cleanup any residual CTX SRBs. */ |
3413 | qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16); | |
3414 | ||
39a11240 CH |
3415 | return 0; |
3416 | } | |
3417 | ||
3418 | void | |
e315cd28 | 3419 | qla2xxx_wake_dpc(struct scsi_qla_host *vha) |
39a11240 | 3420 | { |
e315cd28 | 3421 | struct qla_hw_data *ha = vha->hw; |
c795c1e4 AV |
3422 | struct task_struct *t = ha->dpc_thread; |
3423 | ||
e315cd28 | 3424 | if (!test_bit(UNLOADING, &vha->dpc_flags) && t) |
c795c1e4 | 3425 | wake_up_process(t); |
1da177e4 LT |
3426 | } |
3427 | ||
1da177e4 LT |
3428 | /* |
3429 | * qla2x00_rst_aen | |
3430 | * Processes asynchronous reset. | |
3431 | * | |
3432 | * Input: | |
3433 | * ha = adapter block pointer. | |
3434 | */ | |
3435 | static void | |
e315cd28 | 3436 | qla2x00_rst_aen(scsi_qla_host_t *vha) |
1da177e4 | 3437 | { |
e315cd28 AC |
3438 | if (vha->flags.online && !vha->flags.reset_active && |
3439 | !atomic_read(&vha->loop_down_timer) && | |
3440 | !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) { | |
1da177e4 | 3441 | do { |
e315cd28 | 3442 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
3443 | |
3444 | /* | |
3445 | * Issue marker command only when we are going to start | |
3446 | * the I/O. | |
3447 | */ | |
e315cd28 AC |
3448 | vha->marker_needed = 1; |
3449 | } while (!atomic_read(&vha->loop_down_timer) && | |
3450 | (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags))); | |
1da177e4 LT |
3451 | } |
3452 | } | |
3453 | ||
f4f051eb | 3454 | static void |
e315cd28 | 3455 | qla2x00_sp_free_dma(srb_t *sp) |
f4f051eb | 3456 | { |
3457 | struct scsi_cmnd *cmd = sp->cmd; | |
bad75002 | 3458 | struct qla_hw_data *ha = sp->fcport->vha->hw; |
f4f051eb | 3459 | |
3460 | if (sp->flags & SRB_DMA_VALID) { | |
385d70b4 | 3461 | scsi_dma_unmap(cmd); |
f4f051eb | 3462 | sp->flags &= ~SRB_DMA_VALID; |
3463 | } | |
bad75002 AE |
3464 | |
3465 | if (sp->flags & SRB_CRC_PROT_DMA_VALID) { | |
3466 | dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd), | |
3467 | scsi_prot_sg_count(cmd), cmd->sc_data_direction); | |
3468 | sp->flags &= ~SRB_CRC_PROT_DMA_VALID; | |
3469 | } | |
3470 | ||
3471 | if (sp->flags & SRB_CRC_CTX_DSD_VALID) { | |
3472 | /* List assured to be having elements */ | |
3473 | qla2x00_clean_dsd_pool(ha, sp); | |
3474 | sp->flags &= ~SRB_CRC_CTX_DSD_VALID; | |
3475 | } | |
3476 | ||
3477 | if (sp->flags & SRB_CRC_CTX_DMA_VALID) { | |
3478 | dma_pool_free(ha->dl_dma_pool, sp->ctx, | |
3479 | ((struct crc_context *)sp->ctx)->crc_ctx_dma); | |
3480 | sp->flags &= ~SRB_CRC_CTX_DMA_VALID; | |
3481 | } | |
3482 | ||
fca29703 | 3483 | CMD_SP(cmd) = NULL; |
f4f051eb | 3484 | } |
3485 | ||
3486 | void | |
083a469d | 3487 | qla2x00_sp_final_compl(struct qla_hw_data *ha, srb_t *sp) |
f4f051eb | 3488 | { |
3489 | struct scsi_cmnd *cmd = sp->cmd; | |
3490 | ||
e315cd28 | 3491 | qla2x00_sp_free_dma(sp); |
f4f051eb | 3492 | |
a9083016 GM |
3493 | if (sp->flags & SRB_FCP_CMND_DMA_VALID) { |
3494 | struct ct6_dsd *ctx = sp->ctx; | |
3495 | dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd, | |
3496 | ctx->fcp_cmnd_dma); | |
3497 | list_splice(&ctx->dsd_list, &ha->gbl_dsd_list); | |
3498 | ha->gbl_dsd_inuse -= ctx->dsd_use_cnt; | |
3499 | ha->gbl_dsd_avail += ctx->dsd_use_cnt; | |
3500 | mempool_free(sp->ctx, ha->ctx_mempool); | |
3501 | sp->ctx = NULL; | |
3502 | } | |
f4f051eb | 3503 | |
a9083016 | 3504 | mempool_free(sp, ha->srb_mempool); |
f4f051eb | 3505 | cmd->scsi_done(cmd); |
3506 | } | |
bdf79621 | 3507 | |
083a469d GM |
3508 | void |
3509 | qla2x00_sp_compl(struct qla_hw_data *ha, srb_t *sp) | |
3510 | { | |
3511 | if (atomic_read(&sp->ref_count) == 0) { | |
3512 | DEBUG2(qla_printk(KERN_WARNING, ha, | |
3513 | "SP reference-count to ZERO -- sp=%p\n", sp)); | |
3514 | DEBUG2(BUG()); | |
3515 | return; | |
3516 | } | |
3517 | if (!atomic_dec_and_test(&sp->ref_count)) | |
3518 | return; | |
3519 | qla2x00_sp_final_compl(ha, sp); | |
3520 | } | |
3521 | ||
1da177e4 LT |
3522 | /************************************************************************** |
3523 | * qla2x00_timer | |
3524 | * | |
3525 | * Description: | |
3526 | * One second timer | |
3527 | * | |
3528 | * Context: Interrupt | |
3529 | ***************************************************************************/ | |
2c3dfe3f | 3530 | void |
e315cd28 | 3531 | qla2x00_timer(scsi_qla_host_t *vha) |
1da177e4 | 3532 | { |
1da177e4 LT |
3533 | unsigned long cpu_flags = 0; |
3534 | fc_port_t *fcport; | |
1da177e4 LT |
3535 | int start_dpc = 0; |
3536 | int index; | |
3537 | srb_t *sp; | |
f4f051eb | 3538 | int t; |
85880801 | 3539 | uint16_t w; |
e315cd28 | 3540 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 3541 | struct req_que *req; |
85880801 | 3542 | |
a9083016 GM |
3543 | if (IS_QLA82XX(ha)) |
3544 | qla82xx_watchdog(vha); | |
3545 | ||
85880801 AV |
3546 | /* Hardware read to raise pending EEH errors during mailbox waits. */ |
3547 | if (!pci_channel_offline(ha->pdev)) | |
3548 | pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w); | |
1da177e4 LT |
3549 | /* |
3550 | * Ports - Port down timer. | |
3551 | * | |
3552 | * Whenever, a port is in the LOST state we start decrementing its port | |
3553 | * down timer every second until it reaches zero. Once it reaches zero | |
fa2a1ce5 | 3554 | * the port it marked DEAD. |
1da177e4 LT |
3555 | */ |
3556 | t = 0; | |
e315cd28 | 3557 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
3558 | if (fcport->port_type != FCT_TARGET) |
3559 | continue; | |
3560 | ||
3561 | if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) { | |
3562 | ||
3563 | if (atomic_read(&fcport->port_down_timer) == 0) | |
3564 | continue; | |
3565 | ||
fa2a1ce5 | 3566 | if (atomic_dec_and_test(&fcport->port_down_timer) != 0) |
1da177e4 | 3567 | atomic_set(&fcport->state, FCS_DEVICE_DEAD); |
fa2a1ce5 | 3568 | |
1da177e4 | 3569 | DEBUG(printk("scsi(%ld): fcport-%d - port retry count: " |
fca29703 | 3570 | "%d remaining\n", |
e315cd28 | 3571 | vha->host_no, |
1da177e4 LT |
3572 | t, atomic_read(&fcport->port_down_timer))); |
3573 | } | |
3574 | t++; | |
3575 | } /* End of for fcport */ | |
3576 | ||
1da177e4 LT |
3577 | |
3578 | /* Loop down handler. */ | |
e315cd28 AC |
3579 | if (atomic_read(&vha->loop_down_timer) > 0 && |
3580 | !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) | |
3581 | && vha->flags.online) { | |
1da177e4 | 3582 | |
e315cd28 AC |
3583 | if (atomic_read(&vha->loop_down_timer) == |
3584 | vha->loop_down_abort_time) { | |
1da177e4 LT |
3585 | |
3586 | DEBUG(printk("scsi(%ld): Loop Down - aborting the " | |
3587 | "queues before time expire\n", | |
e315cd28 | 3588 | vha->host_no)); |
1da177e4 | 3589 | |
e315cd28 AC |
3590 | if (!IS_QLA2100(ha) && vha->link_down_timeout) |
3591 | atomic_set(&vha->loop_state, LOOP_DEAD); | |
1da177e4 | 3592 | |
f08b7251 AV |
3593 | /* |
3594 | * Schedule an ISP abort to return any FCP2-device | |
3595 | * commands. | |
3596 | */ | |
2c3dfe3f | 3597 | /* NPIV - scan physical port only */ |
e315cd28 | 3598 | if (!vha->vp_idx) { |
2c3dfe3f SJ |
3599 | spin_lock_irqsave(&ha->hardware_lock, |
3600 | cpu_flags); | |
73208dfd | 3601 | req = ha->req_q_map[0]; |
2c3dfe3f SJ |
3602 | for (index = 1; |
3603 | index < MAX_OUTSTANDING_COMMANDS; | |
3604 | index++) { | |
3605 | fc_port_t *sfcp; | |
3606 | ||
e315cd28 | 3607 | sp = req->outstanding_cmds[index]; |
2c3dfe3f SJ |
3608 | if (!sp) |
3609 | continue; | |
bad75002 | 3610 | if (sp->ctx && !IS_PROT_IO(sp)) |
cf53b069 | 3611 | continue; |
2c3dfe3f | 3612 | sfcp = sp->fcport; |
f08b7251 | 3613 | if (!(sfcp->flags & FCF_FCP2_DEVICE)) |
2c3dfe3f | 3614 | continue; |
bdf79621 | 3615 | |
2c3dfe3f | 3616 | set_bit(ISP_ABORT_NEEDED, |
e315cd28 | 3617 | &vha->dpc_flags); |
2c3dfe3f SJ |
3618 | break; |
3619 | } | |
3620 | spin_unlock_irqrestore(&ha->hardware_lock, | |
e315cd28 | 3621 | cpu_flags); |
1da177e4 | 3622 | } |
1da177e4 LT |
3623 | start_dpc++; |
3624 | } | |
3625 | ||
3626 | /* if the loop has been down for 4 minutes, reinit adapter */ | |
e315cd28 | 3627 | if (atomic_dec_and_test(&vha->loop_down_timer) != 0) { |
0d6e61bc | 3628 | if (!(vha->device_flags & DFLG_NO_CABLE)) { |
1da177e4 LT |
3629 | DEBUG(printk("scsi(%ld): Loop down - " |
3630 | "aborting ISP.\n", | |
e315cd28 | 3631 | vha->host_no)); |
1da177e4 LT |
3632 | qla_printk(KERN_WARNING, ha, |
3633 | "Loop down - aborting ISP.\n"); | |
3634 | ||
e315cd28 | 3635 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
3636 | } |
3637 | } | |
fca29703 | 3638 | DEBUG3(printk("scsi(%ld): Loop Down - seconds remaining %d\n", |
e315cd28 AC |
3639 | vha->host_no, |
3640 | atomic_read(&vha->loop_down_timer))); | |
1da177e4 LT |
3641 | } |
3642 | ||
f6df144c | 3643 | /* Check if beacon LED needs to be blinked */ |
3644 | if (ha->beacon_blink_led == 1) { | |
e315cd28 | 3645 | set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags); |
f6df144c | 3646 | start_dpc++; |
3647 | } | |
3648 | ||
550bf57d | 3649 | /* Process any deferred work. */ |
e315cd28 | 3650 | if (!list_empty(&vha->work_list)) |
550bf57d AV |
3651 | start_dpc++; |
3652 | ||
1da177e4 | 3653 | /* Schedule the DPC routine if needed */ |
e315cd28 AC |
3654 | if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) || |
3655 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) || | |
3656 | test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) || | |
1da177e4 | 3657 | start_dpc || |
e315cd28 AC |
3658 | test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) || |
3659 | test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) || | |
a9083016 GM |
3660 | test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) || |
3661 | test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) || | |
e315cd28 AC |
3662 | test_bit(VP_DPC_NEEDED, &vha->dpc_flags) || |
3663 | test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) | |
3664 | qla2xxx_wake_dpc(vha); | |
1da177e4 | 3665 | |
e315cd28 | 3666 | qla2x00_restart_timer(vha, WATCH_INTERVAL); |
1da177e4 LT |
3667 | } |
3668 | ||
5433383e AV |
3669 | /* Firmware interface routines. */ |
3670 | ||
a9083016 | 3671 | #define FW_BLOBS 8 |
5433383e AV |
3672 | #define FW_ISP21XX 0 |
3673 | #define FW_ISP22XX 1 | |
3674 | #define FW_ISP2300 2 | |
3675 | #define FW_ISP2322 3 | |
48c02fde | 3676 | #define FW_ISP24XX 4 |
c3a2f0df | 3677 | #define FW_ISP25XX 5 |
3a03eb79 | 3678 | #define FW_ISP81XX 6 |
a9083016 | 3679 | #define FW_ISP82XX 7 |
5433383e | 3680 | |
bb8ee499 AV |
3681 | #define FW_FILE_ISP21XX "ql2100_fw.bin" |
3682 | #define FW_FILE_ISP22XX "ql2200_fw.bin" | |
3683 | #define FW_FILE_ISP2300 "ql2300_fw.bin" | |
3684 | #define FW_FILE_ISP2322 "ql2322_fw.bin" | |
3685 | #define FW_FILE_ISP24XX "ql2400_fw.bin" | |
c3a2f0df | 3686 | #define FW_FILE_ISP25XX "ql2500_fw.bin" |
3a03eb79 | 3687 | #define FW_FILE_ISP81XX "ql8100_fw.bin" |
a9083016 | 3688 | #define FW_FILE_ISP82XX "ql8200_fw.bin" |
bb8ee499 | 3689 | |
e1e82b6f | 3690 | static DEFINE_MUTEX(qla_fw_lock); |
5433383e AV |
3691 | |
3692 | static struct fw_blob qla_fw_blobs[FW_BLOBS] = { | |
bb8ee499 AV |
3693 | { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, }, |
3694 | { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, }, | |
3695 | { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, }, | |
3696 | { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, }, | |
3697 | { .name = FW_FILE_ISP24XX, }, | |
c3a2f0df | 3698 | { .name = FW_FILE_ISP25XX, }, |
3a03eb79 | 3699 | { .name = FW_FILE_ISP81XX, }, |
a9083016 | 3700 | { .name = FW_FILE_ISP82XX, }, |
5433383e AV |
3701 | }; |
3702 | ||
3703 | struct fw_blob * | |
e315cd28 | 3704 | qla2x00_request_firmware(scsi_qla_host_t *vha) |
5433383e | 3705 | { |
e315cd28 | 3706 | struct qla_hw_data *ha = vha->hw; |
5433383e AV |
3707 | struct fw_blob *blob; |
3708 | ||
3709 | blob = NULL; | |
3710 | if (IS_QLA2100(ha)) { | |
3711 | blob = &qla_fw_blobs[FW_ISP21XX]; | |
3712 | } else if (IS_QLA2200(ha)) { | |
3713 | blob = &qla_fw_blobs[FW_ISP22XX]; | |
48c02fde | 3714 | } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { |
5433383e | 3715 | blob = &qla_fw_blobs[FW_ISP2300]; |
48c02fde | 3716 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) { |
5433383e | 3717 | blob = &qla_fw_blobs[FW_ISP2322]; |
4d4df193 | 3718 | } else if (IS_QLA24XX_TYPE(ha)) { |
5433383e | 3719 | blob = &qla_fw_blobs[FW_ISP24XX]; |
c3a2f0df AV |
3720 | } else if (IS_QLA25XX(ha)) { |
3721 | blob = &qla_fw_blobs[FW_ISP25XX]; | |
3a03eb79 AV |
3722 | } else if (IS_QLA81XX(ha)) { |
3723 | blob = &qla_fw_blobs[FW_ISP81XX]; | |
a9083016 GM |
3724 | } else if (IS_QLA82XX(ha)) { |
3725 | blob = &qla_fw_blobs[FW_ISP82XX]; | |
5433383e AV |
3726 | } |
3727 | ||
e1e82b6f | 3728 | mutex_lock(&qla_fw_lock); |
5433383e AV |
3729 | if (blob->fw) |
3730 | goto out; | |
3731 | ||
3732 | if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) { | |
3733 | DEBUG2(printk("scsi(%ld): Failed to load firmware image " | |
e315cd28 | 3734 | "(%s).\n", vha->host_no, blob->name)); |
5433383e AV |
3735 | blob->fw = NULL; |
3736 | blob = NULL; | |
3737 | goto out; | |
3738 | } | |
3739 | ||
3740 | out: | |
e1e82b6f | 3741 | mutex_unlock(&qla_fw_lock); |
5433383e AV |
3742 | return blob; |
3743 | } | |
3744 | ||
3745 | static void | |
3746 | qla2x00_release_firmware(void) | |
3747 | { | |
3748 | int idx; | |
3749 | ||
e1e82b6f | 3750 | mutex_lock(&qla_fw_lock); |
5433383e AV |
3751 | for (idx = 0; idx < FW_BLOBS; idx++) |
3752 | if (qla_fw_blobs[idx].fw) | |
3753 | release_firmware(qla_fw_blobs[idx].fw); | |
e1e82b6f | 3754 | mutex_unlock(&qla_fw_lock); |
5433383e AV |
3755 | } |
3756 | ||
14e660e6 SJ |
3757 | static pci_ers_result_t |
3758 | qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state) | |
3759 | { | |
85880801 AV |
3760 | scsi_qla_host_t *vha = pci_get_drvdata(pdev); |
3761 | struct qla_hw_data *ha = vha->hw; | |
3762 | ||
3763 | DEBUG2(qla_printk(KERN_WARNING, ha, "error_detected:state %x\n", | |
3764 | state)); | |
b9b12f73 | 3765 | |
14e660e6 SJ |
3766 | switch (state) { |
3767 | case pci_channel_io_normal: | |
85880801 | 3768 | ha->flags.eeh_busy = 0; |
14e660e6 SJ |
3769 | return PCI_ERS_RESULT_CAN_RECOVER; |
3770 | case pci_channel_io_frozen: | |
85880801 | 3771 | ha->flags.eeh_busy = 1; |
90a86fc0 | 3772 | qla2x00_free_irqs(vha); |
14e660e6 SJ |
3773 | pci_disable_device(pdev); |
3774 | return PCI_ERS_RESULT_NEED_RESET; | |
3775 | case pci_channel_io_perm_failure: | |
85880801 AV |
3776 | ha->flags.pci_channel_io_perm_failure = 1; |
3777 | qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16); | |
14e660e6 SJ |
3778 | return PCI_ERS_RESULT_DISCONNECT; |
3779 | } | |
3780 | return PCI_ERS_RESULT_NEED_RESET; | |
3781 | } | |
3782 | ||
3783 | static pci_ers_result_t | |
3784 | qla2xxx_pci_mmio_enabled(struct pci_dev *pdev) | |
3785 | { | |
3786 | int risc_paused = 0; | |
3787 | uint32_t stat; | |
3788 | unsigned long flags; | |
e315cd28 AC |
3789 | scsi_qla_host_t *base_vha = pci_get_drvdata(pdev); |
3790 | struct qla_hw_data *ha = base_vha->hw; | |
14e660e6 SJ |
3791 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
3792 | struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24; | |
3793 | ||
3794 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3795 | if (IS_QLA2100(ha) || IS_QLA2200(ha)){ | |
3796 | stat = RD_REG_DWORD(®->hccr); | |
3797 | if (stat & HCCR_RISC_PAUSE) | |
3798 | risc_paused = 1; | |
3799 | } else if (IS_QLA23XX(ha)) { | |
3800 | stat = RD_REG_DWORD(®->u.isp2300.host_status); | |
3801 | if (stat & HSR_RISC_PAUSED) | |
3802 | risc_paused = 1; | |
3803 | } else if (IS_FWI2_CAPABLE(ha)) { | |
3804 | stat = RD_REG_DWORD(®24->host_status); | |
3805 | if (stat & HSRX_RISC_PAUSED) | |
3806 | risc_paused = 1; | |
3807 | } | |
3808 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
3809 | ||
3810 | if (risc_paused) { | |
3811 | qla_printk(KERN_INFO, ha, "RISC paused -- mmio_enabled, " | |
3812 | "Dumping firmware!\n"); | |
e315cd28 | 3813 | ha->isp_ops->fw_dump(base_vha, 0); |
14e660e6 SJ |
3814 | |
3815 | return PCI_ERS_RESULT_NEED_RESET; | |
3816 | } else | |
3817 | return PCI_ERS_RESULT_RECOVERED; | |
3818 | } | |
3819 | ||
3820 | static pci_ers_result_t | |
3821 | qla2xxx_pci_slot_reset(struct pci_dev *pdev) | |
3822 | { | |
3823 | pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT; | |
e315cd28 AC |
3824 | scsi_qla_host_t *base_vha = pci_get_drvdata(pdev); |
3825 | struct qla_hw_data *ha = base_vha->hw; | |
90a86fc0 JC |
3826 | struct rsp_que *rsp; |
3827 | int rc, retries = 10; | |
09483916 | 3828 | |
85880801 AV |
3829 | DEBUG17(qla_printk(KERN_WARNING, ha, "slot_reset\n")); |
3830 | ||
90a86fc0 JC |
3831 | /* Workaround: qla2xxx driver which access hardware earlier |
3832 | * needs error state to be pci_channel_io_online. | |
3833 | * Otherwise mailbox command timesout. | |
3834 | */ | |
3835 | pdev->error_state = pci_channel_io_normal; | |
3836 | ||
3837 | pci_restore_state(pdev); | |
3838 | ||
8c1496bd RL |
3839 | /* pci_restore_state() clears the saved_state flag of the device |
3840 | * save restored state which resets saved_state flag | |
3841 | */ | |
3842 | pci_save_state(pdev); | |
3843 | ||
09483916 BH |
3844 | if (ha->mem_only) |
3845 | rc = pci_enable_device_mem(pdev); | |
3846 | else | |
3847 | rc = pci_enable_device(pdev); | |
14e660e6 | 3848 | |
09483916 | 3849 | if (rc) { |
14e660e6 SJ |
3850 | qla_printk(KERN_WARNING, ha, |
3851 | "Can't re-enable PCI device after reset.\n"); | |
14e660e6 SJ |
3852 | return ret; |
3853 | } | |
14e660e6 | 3854 | |
90a86fc0 JC |
3855 | rsp = ha->rsp_q_map[0]; |
3856 | if (qla2x00_request_irqs(ha, rsp)) | |
3857 | return ret; | |
3858 | ||
e315cd28 | 3859 | if (ha->isp_ops->pci_config(base_vha)) |
14e660e6 SJ |
3860 | return ret; |
3861 | ||
90a86fc0 JC |
3862 | while (ha->flags.mbox_busy && retries--) |
3863 | msleep(1000); | |
85880801 | 3864 | |
e315cd28 | 3865 | set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); |
a9083016 | 3866 | if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS) |
14e660e6 | 3867 | ret = PCI_ERS_RESULT_RECOVERED; |
e315cd28 | 3868 | clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); |
14e660e6 | 3869 | |
90a86fc0 | 3870 | |
85880801 AV |
3871 | DEBUG17(qla_printk(KERN_WARNING, ha, |
3872 | "slot_reset-return:ret=%x\n", ret)); | |
3873 | ||
14e660e6 SJ |
3874 | return ret; |
3875 | } | |
3876 | ||
3877 | static void | |
3878 | qla2xxx_pci_resume(struct pci_dev *pdev) | |
3879 | { | |
e315cd28 AC |
3880 | scsi_qla_host_t *base_vha = pci_get_drvdata(pdev); |
3881 | struct qla_hw_data *ha = base_vha->hw; | |
14e660e6 SJ |
3882 | int ret; |
3883 | ||
85880801 AV |
3884 | DEBUG17(qla_printk(KERN_WARNING, ha, "pci_resume\n")); |
3885 | ||
e315cd28 | 3886 | ret = qla2x00_wait_for_hba_online(base_vha); |
14e660e6 SJ |
3887 | if (ret != QLA_SUCCESS) { |
3888 | qla_printk(KERN_ERR, ha, | |
3889 | "the device failed to resume I/O " | |
3890 | "from slot/link_reset"); | |
3891 | } | |
85880801 | 3892 | |
3e46f031 LC |
3893 | pci_cleanup_aer_uncorrect_error_status(pdev); |
3894 | ||
85880801 | 3895 | ha->flags.eeh_busy = 0; |
14e660e6 SJ |
3896 | } |
3897 | ||
3898 | static struct pci_error_handlers qla2xxx_err_handler = { | |
3899 | .error_detected = qla2xxx_pci_error_detected, | |
3900 | .mmio_enabled = qla2xxx_pci_mmio_enabled, | |
3901 | .slot_reset = qla2xxx_pci_slot_reset, | |
3902 | .resume = qla2xxx_pci_resume, | |
3903 | }; | |
3904 | ||
5433383e | 3905 | static struct pci_device_id qla2xxx_pci_tbl[] = { |
47f5e069 AV |
3906 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) }, |
3907 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) }, | |
3908 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) }, | |
3909 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) }, | |
3910 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) }, | |
3911 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) }, | |
3912 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) }, | |
3913 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) }, | |
3914 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) }, | |
4d4df193 | 3915 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) }, |
47f5e069 AV |
3916 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) }, |
3917 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) }, | |
c3a2f0df | 3918 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) }, |
3a03eb79 | 3919 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) }, |
a9083016 | 3920 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) }, |
5433383e AV |
3921 | { 0 }, |
3922 | }; | |
3923 | MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl); | |
3924 | ||
fca29703 | 3925 | static struct pci_driver qla2xxx_pci_driver = { |
cb63067a | 3926 | .name = QLA2XXX_DRIVER_NAME, |
0a21ef1e JB |
3927 | .driver = { |
3928 | .owner = THIS_MODULE, | |
3929 | }, | |
fca29703 | 3930 | .id_table = qla2xxx_pci_tbl, |
7ee61397 | 3931 | .probe = qla2x00_probe_one, |
4c993f76 | 3932 | .remove = qla2x00_remove_one, |
14e660e6 | 3933 | .err_handler = &qla2xxx_err_handler, |
fca29703 AV |
3934 | }; |
3935 | ||
6a03b4cd HZ |
3936 | static struct file_operations apidev_fops = { |
3937 | .owner = THIS_MODULE, | |
3938 | }; | |
3939 | ||
1da177e4 LT |
3940 | /** |
3941 | * qla2x00_module_init - Module initialization. | |
3942 | **/ | |
3943 | static int __init | |
3944 | qla2x00_module_init(void) | |
3945 | { | |
fca29703 AV |
3946 | int ret = 0; |
3947 | ||
1da177e4 | 3948 | /* Allocate cache for SRBs. */ |
354d6b21 | 3949 | srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0, |
20c2df83 | 3950 | SLAB_HWCACHE_ALIGN, NULL); |
1da177e4 LT |
3951 | if (srb_cachep == NULL) { |
3952 | printk(KERN_ERR | |
3953 | "qla2xxx: Unable to allocate SRB cache...Failing load!\n"); | |
3954 | return -ENOMEM; | |
3955 | } | |
3956 | ||
3957 | /* Derive version string. */ | |
3958 | strcpy(qla2x00_version_str, QLA2XXX_VERSION); | |
11010fec | 3959 | if (ql2xextended_error_logging) |
0181944f AV |
3960 | strcat(qla2x00_version_str, "-debug"); |
3961 | ||
1c97a12a AV |
3962 | qla2xxx_transport_template = |
3963 | fc_attach_transport(&qla2xxx_transport_functions); | |
2c3dfe3f SJ |
3964 | if (!qla2xxx_transport_template) { |
3965 | kmem_cache_destroy(srb_cachep); | |
1da177e4 | 3966 | return -ENODEV; |
2c3dfe3f | 3967 | } |
6a03b4cd HZ |
3968 | |
3969 | apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops); | |
3970 | if (apidev_major < 0) { | |
3971 | printk(KERN_WARNING "qla2xxx: Unable to register char device " | |
3972 | "%s\n", QLA2XXX_APIDEV); | |
3973 | } | |
3974 | ||
2c3dfe3f SJ |
3975 | qla2xxx_transport_vport_template = |
3976 | fc_attach_transport(&qla2xxx_transport_vport_functions); | |
3977 | if (!qla2xxx_transport_vport_template) { | |
3978 | kmem_cache_destroy(srb_cachep); | |
3979 | fc_release_transport(qla2xxx_transport_template); | |
1da177e4 | 3980 | return -ENODEV; |
2c3dfe3f | 3981 | } |
1da177e4 | 3982 | |
fd9a29f0 AV |
3983 | printk(KERN_INFO "QLogic Fibre Channel HBA Driver: %s\n", |
3984 | qla2x00_version_str); | |
7ee61397 | 3985 | ret = pci_register_driver(&qla2xxx_pci_driver); |
fca29703 AV |
3986 | if (ret) { |
3987 | kmem_cache_destroy(srb_cachep); | |
3988 | fc_release_transport(qla2xxx_transport_template); | |
2c3dfe3f | 3989 | fc_release_transport(qla2xxx_transport_vport_template); |
fca29703 AV |
3990 | } |
3991 | return ret; | |
1da177e4 LT |
3992 | } |
3993 | ||
3994 | /** | |
3995 | * qla2x00_module_exit - Module cleanup. | |
3996 | **/ | |
3997 | static void __exit | |
3998 | qla2x00_module_exit(void) | |
3999 | { | |
6a03b4cd | 4000 | unregister_chrdev(apidev_major, QLA2XXX_APIDEV); |
7ee61397 | 4001 | pci_unregister_driver(&qla2xxx_pci_driver); |
5433383e | 4002 | qla2x00_release_firmware(); |
354d6b21 | 4003 | kmem_cache_destroy(srb_cachep); |
a9083016 GM |
4004 | if (ctx_cachep) |
4005 | kmem_cache_destroy(ctx_cachep); | |
1da177e4 | 4006 | fc_release_transport(qla2xxx_transport_template); |
2c3dfe3f | 4007 | fc_release_transport(qla2xxx_transport_vport_template); |
1da177e4 LT |
4008 | } |
4009 | ||
4010 | module_init(qla2x00_module_init); | |
4011 | module_exit(qla2x00_module_exit); | |
4012 | ||
4013 | MODULE_AUTHOR("QLogic Corporation"); | |
4014 | MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver"); | |
4015 | MODULE_LICENSE("GPL"); | |
4016 | MODULE_VERSION(QLA2XXX_VERSION); | |
bb8ee499 AV |
4017 | MODULE_FIRMWARE(FW_FILE_ISP21XX); |
4018 | MODULE_FIRMWARE(FW_FILE_ISP22XX); | |
4019 | MODULE_FIRMWARE(FW_FILE_ISP2300); | |
4020 | MODULE_FIRMWARE(FW_FILE_ISP2322); | |
4021 | MODULE_FIRMWARE(FW_FILE_ISP24XX); | |
61623fc3 | 4022 | MODULE_FIRMWARE(FW_FILE_ISP25XX); |