Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
fa90c54f | 2 | * QLogic Fibre Channel HBA Driver |
bd21eaf9 | 3 | * Copyright (c) 2003-2014 QLogic Corporation |
1da177e4 | 4 | * |
fa90c54f | 5 | * See LICENSE.qla2xxx for copyright and licensing details. |
1da177e4 LT |
6 | */ |
7 | #include "qla_def.h" | |
2d70c103 | 8 | #include "qla_target.h" |
1da177e4 LT |
9 | |
10 | #include <linux/delay.h> | |
5a0e3ad6 | 11 | #include <linux/gfp.h> |
1da177e4 | 12 | |
15f30a57 QT |
13 | static struct mb_cmd_name { |
14 | uint16_t cmd; | |
15 | const char *str; | |
16 | } mb_str[] = { | |
17 | {MBC_GET_PORT_DATABASE, "GPDB"}, | |
18 | {MBC_GET_ID_LIST, "GIDList"}, | |
19 | {MBC_GET_LINK_PRIV_STATS, "Stats"}, | |
94d83e36 | 20 | {MBC_GET_RESOURCE_COUNTS, "ResCnt"}, |
15f30a57 QT |
21 | }; |
22 | ||
23 | static const char *mb_to_str(uint16_t cmd) | |
24 | { | |
25 | int i; | |
26 | struct mb_cmd_name *e; | |
27 | ||
28 | for (i = 0; i < ARRAY_SIZE(mb_str); i++) { | |
29 | e = mb_str + i; | |
30 | if (cmd == e->cmd) | |
31 | return e->str; | |
32 | } | |
33 | return "unknown"; | |
34 | } | |
35 | ||
ca825828 | 36 | static struct rom_cmd { |
77ddb94a | 37 | uint16_t cmd; |
38 | } rom_cmds[] = { | |
39 | { MBC_LOAD_RAM }, | |
40 | { MBC_EXECUTE_FIRMWARE }, | |
41 | { MBC_READ_RAM_WORD }, | |
42 | { MBC_MAILBOX_REGISTER_TEST }, | |
43 | { MBC_VERIFY_CHECKSUM }, | |
44 | { MBC_GET_FIRMWARE_VERSION }, | |
45 | { MBC_LOAD_RISC_RAM }, | |
46 | { MBC_DUMP_RISC_RAM }, | |
47 | { MBC_LOAD_RISC_RAM_EXTENDED }, | |
48 | { MBC_DUMP_RISC_RAM_EXTENDED }, | |
49 | { MBC_WRITE_RAM_WORD_EXTENDED }, | |
50 | { MBC_READ_RAM_EXTENDED }, | |
51 | { MBC_GET_RESOURCE_COUNTS }, | |
52 | { MBC_SET_FIRMWARE_OPTION }, | |
53 | { MBC_MID_INITIALIZE_FIRMWARE }, | |
54 | { MBC_GET_FIRMWARE_STATE }, | |
55 | { MBC_GET_MEM_OFFLOAD_CNTRL_STAT }, | |
56 | { MBC_GET_RETRY_COUNT }, | |
57 | { MBC_TRACE_CONTROL }, | |
b7edfa23 | 58 | { MBC_INITIALIZE_MULTIQ }, |
1608cc4a QT |
59 | { MBC_IOCB_COMMAND_A64 }, |
60 | { MBC_GET_ADAPTER_LOOP_ID }, | |
e4e3a2ce | 61 | { MBC_READ_SFP }, |
8777e431 | 62 | { MBC_GET_RNID_PARAMS }, |
8b4673ba | 63 | { MBC_GET_SET_ZIO_THRESHOLD }, |
77ddb94a | 64 | }; |
65 | ||
66 | static int is_rom_cmd(uint16_t cmd) | |
67 | { | |
68 | int i; | |
69 | struct rom_cmd *wc; | |
70 | ||
71 | for (i = 0; i < ARRAY_SIZE(rom_cmds); i++) { | |
72 | wc = rom_cmds + i; | |
73 | if (wc->cmd == cmd) | |
74 | return 1; | |
75 | } | |
76 | ||
77 | return 0; | |
78 | } | |
1da177e4 LT |
79 | |
80 | /* | |
81 | * qla2x00_mailbox_command | |
82 | * Issue mailbox command and waits for completion. | |
83 | * | |
84 | * Input: | |
85 | * ha = adapter block pointer. | |
86 | * mcp = driver internal mbx struct pointer. | |
87 | * | |
88 | * Output: | |
89 | * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data. | |
90 | * | |
91 | * Returns: | |
92 | * 0 : QLA_SUCCESS = cmd performed success | |
93 | * 1 : QLA_FUNCTION_FAILED (error encountered) | |
94 | * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered) | |
95 | * | |
96 | * Context: | |
97 | * Kernel context. | |
98 | */ | |
99 | static int | |
7b867cf7 | 100 | qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp) |
1da177e4 | 101 | { |
d14e72fb | 102 | int rval, i; |
1da177e4 | 103 | unsigned long flags = 0; |
f73cb695 | 104 | device_reg_t *reg; |
1c7c6357 | 105 | uint8_t abort_active; |
2c3dfe3f | 106 | uint8_t io_lock_on; |
cdbb0a4f | 107 | uint16_t command = 0; |
1da177e4 LT |
108 | uint16_t *iptr; |
109 | uint16_t __iomem *optr; | |
110 | uint32_t cnt; | |
111 | uint32_t mboxes; | |
1da177e4 | 112 | unsigned long wait_time; |
7b867cf7 AC |
113 | struct qla_hw_data *ha = vha->hw; |
114 | scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); | |
b2000805 | 115 | u32 chip_reset; |
2c3dfe3f | 116 | |
d14e72fb | 117 | |
5e19ed90 | 118 | ql_dbg(ql_dbg_mbx, vha, 0x1000, "Entered %s.\n", __func__); |
7c3df132 SK |
119 | |
120 | if (ha->pdev->error_state > pci_channel_io_frozen) { | |
5e19ed90 | 121 | ql_log(ql_log_warn, vha, 0x1001, |
7c3df132 SK |
122 | "error_state is greater than pci_channel_io_frozen, " |
123 | "exiting.\n"); | |
b9b12f73 | 124 | return QLA_FUNCTION_TIMEOUT; |
7c3df132 | 125 | } |
b9b12f73 | 126 | |
a9083016 | 127 | if (vha->device_flags & DFLG_DEV_FAILED) { |
5e19ed90 | 128 | ql_log(ql_log_warn, vha, 0x1002, |
7c3df132 | 129 | "Device in failed state, exiting.\n"); |
a9083016 GM |
130 | return QLA_FUNCTION_TIMEOUT; |
131 | } | |
132 | ||
c2a5d94f | 133 | /* if PCI error, then avoid mbx processing.*/ |
ba175891 SC |
134 | if (test_bit(PFLG_DISCONNECTED, &base_vha->dpc_flags) && |
135 | test_bit(UNLOADING, &base_vha->dpc_flags)) { | |
83548fe2 | 136 | ql_log(ql_log_warn, vha, 0xd04e, |
783e0dc4 SC |
137 | "PCI error, exiting.\n"); |
138 | return QLA_FUNCTION_TIMEOUT; | |
c2a5d94f | 139 | } |
783e0dc4 | 140 | |
2c3dfe3f | 141 | reg = ha->iobase; |
7b867cf7 | 142 | io_lock_on = base_vha->flags.init_done; |
1da177e4 LT |
143 | |
144 | rval = QLA_SUCCESS; | |
7b867cf7 | 145 | abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); |
b2000805 | 146 | chip_reset = ha->chip_reset; |
1da177e4 | 147 | |
85880801 | 148 | if (ha->flags.pci_channel_io_perm_failure) { |
5e19ed90 | 149 | ql_log(ql_log_warn, vha, 0x1003, |
7c3df132 | 150 | "Perm failure on EEH timeout MBX, exiting.\n"); |
85880801 AV |
151 | return QLA_FUNCTION_TIMEOUT; |
152 | } | |
153 | ||
7ec0effd | 154 | if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) { |
862cd01e GM |
155 | /* Setting Link-Down error */ |
156 | mcp->mb[0] = MBS_LINK_DOWN_ERROR; | |
5e19ed90 | 157 | ql_log(ql_log_warn, vha, 0x1004, |
7c3df132 | 158 | "FW hung = %d.\n", ha->flags.isp82xx_fw_hung); |
1806fcd5 | 159 | return QLA_FUNCTION_TIMEOUT; |
862cd01e GM |
160 | } |
161 | ||
77ddb94a | 162 | /* check if ISP abort is active and return cmd with timeout */ |
163 | if ((test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) || | |
164 | test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) || | |
165 | test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) && | |
166 | !is_rom_cmd(mcp->mb[0])) { | |
167 | ql_log(ql_log_info, vha, 0x1005, | |
168 | "Cmd 0x%x aborted with timeout since ISP Abort is pending\n", | |
169 | mcp->mb[0]); | |
170 | return QLA_FUNCTION_TIMEOUT; | |
171 | } | |
172 | ||
b2000805 | 173 | atomic_inc(&ha->num_pend_mbx_stage1); |
1da177e4 | 174 | /* |
1c7c6357 AV |
175 | * Wait for active mailbox commands to finish by waiting at most tov |
176 | * seconds. This is to serialize actual issuing of mailbox cmds during | |
177 | * non ISP abort time. | |
1da177e4 | 178 | */ |
8eca3f39 AV |
179 | if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) { |
180 | /* Timeout occurred. Return error. */ | |
83548fe2 | 181 | ql_log(ql_log_warn, vha, 0xd035, |
d8c0d546 CD |
182 | "Cmd access timeout, cmd=0x%x, Exiting.\n", |
183 | mcp->mb[0]); | |
b2000805 | 184 | atomic_dec(&ha->num_pend_mbx_stage1); |
8eca3f39 | 185 | return QLA_FUNCTION_TIMEOUT; |
1da177e4 | 186 | } |
b2000805 QT |
187 | atomic_dec(&ha->num_pend_mbx_stage1); |
188 | if (ha->flags.purge_mbox || chip_reset != ha->chip_reset) { | |
189 | rval = QLA_ABORTED; | |
190 | goto premature_exit; | |
191 | } | |
1da177e4 | 192 | |
b6faaaf7 | 193 | |
1da177e4 LT |
194 | /* Save mailbox command for debug */ |
195 | ha->mcp = mcp; | |
196 | ||
5e19ed90 | 197 | ql_dbg(ql_dbg_mbx, vha, 0x1006, |
7c3df132 | 198 | "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]); |
1da177e4 LT |
199 | |
200 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
201 | ||
b6faaaf7 QT |
202 | if (ha->flags.purge_mbox || chip_reset != ha->chip_reset || |
203 | ha->flags.mbox_busy) { | |
b2000805 | 204 | rval = QLA_ABORTED; |
b2000805 QT |
205 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
206 | goto premature_exit; | |
207 | } | |
b6faaaf7 | 208 | ha->flags.mbox_busy = 1; |
b2000805 | 209 | |
1da177e4 | 210 | /* Load mailbox registers. */ |
7ec0effd | 211 | if (IS_P3P_TYPE(ha)) |
a9083016 | 212 | optr = (uint16_t __iomem *)®->isp82.mailbox_in[0]; |
7ec0effd | 213 | else if (IS_FWI2_CAPABLE(ha) && !(IS_P3P_TYPE(ha))) |
1c7c6357 AV |
214 | optr = (uint16_t __iomem *)®->isp24.mailbox0; |
215 | else | |
216 | optr = (uint16_t __iomem *)MAILBOX_REG(ha, ®->isp, 0); | |
1da177e4 LT |
217 | |
218 | iptr = mcp->mb; | |
219 | command = mcp->mb[0]; | |
220 | mboxes = mcp->out_mb; | |
221 | ||
7b711623 | 222 | ql_dbg(ql_dbg_mbx, vha, 0x1111, |
0e31a2c8 | 223 | "Mailbox registers (OUT):\n"); |
1da177e4 LT |
224 | for (cnt = 0; cnt < ha->mbx_count; cnt++) { |
225 | if (IS_QLA2200(ha) && cnt == 8) | |
1c7c6357 AV |
226 | optr = |
227 | (uint16_t __iomem *)MAILBOX_REG(ha, ®->isp, 8); | |
0e31a2c8 JC |
228 | if (mboxes & BIT_0) { |
229 | ql_dbg(ql_dbg_mbx, vha, 0x1112, | |
230 | "mbox[%d]<-0x%04x\n", cnt, *iptr); | |
1da177e4 | 231 | WRT_REG_WORD(optr, *iptr); |
0e31a2c8 | 232 | } |
1da177e4 LT |
233 | |
234 | mboxes >>= 1; | |
235 | optr++; | |
236 | iptr++; | |
237 | } | |
238 | ||
5e19ed90 | 239 | ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1117, |
7c3df132 | 240 | "I/O Address = %p.\n", optr); |
1da177e4 LT |
241 | |
242 | /* Issue set host interrupt command to send cmd out. */ | |
243 | ha->flags.mbox_int = 0; | |
244 | clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); | |
245 | ||
246 | /* Unlock mbx registers and wait for interrupt */ | |
5e19ed90 | 247 | ql_dbg(ql_dbg_mbx, vha, 0x100f, |
7c3df132 SK |
248 | "Going to unlock irq & waiting for interrupts. " |
249 | "jiffies=%lx.\n", jiffies); | |
1da177e4 LT |
250 | |
251 | /* Wait for mbx cmd completion until timeout */ | |
b2000805 | 252 | atomic_inc(&ha->num_pend_mbx_stage2); |
124f85e6 | 253 | if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) { |
1da177e4 LT |
254 | set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); |
255 | ||
7ec0effd | 256 | if (IS_P3P_TYPE(ha)) { |
a9083016 GM |
257 | if (RD_REG_DWORD(®->isp82.hint) & |
258 | HINT_MBX_INT_PENDING) { | |
b6faaaf7 | 259 | ha->flags.mbox_busy = 0; |
a9083016 GM |
260 | spin_unlock_irqrestore(&ha->hardware_lock, |
261 | flags); | |
b6faaaf7 | 262 | |
b2000805 | 263 | atomic_dec(&ha->num_pend_mbx_stage2); |
5e19ed90 | 264 | ql_dbg(ql_dbg_mbx, vha, 0x1010, |
7c3df132 | 265 | "Pending mailbox timeout, exiting.\n"); |
cdbb0a4f SV |
266 | rval = QLA_FUNCTION_TIMEOUT; |
267 | goto premature_exit; | |
a9083016 GM |
268 | } |
269 | WRT_REG_DWORD(®->isp82.hint, HINT_MBX_INT_PENDING); | |
270 | } else if (IS_FWI2_CAPABLE(ha)) | |
1c7c6357 AV |
271 | WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT); |
272 | else | |
273 | WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT); | |
1da177e4 LT |
274 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
275 | ||
77ddb94a | 276 | wait_time = jiffies; |
b2000805 | 277 | atomic_inc(&ha->num_pend_mbx_stage3); |
754d1243 GM |
278 | if (!wait_for_completion_timeout(&ha->mbx_intr_comp, |
279 | mcp->tov * HZ)) { | |
b6faaaf7 QT |
280 | if (chip_reset != ha->chip_reset) { |
281 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
282 | ha->flags.mbox_busy = 0; | |
283 | spin_unlock_irqrestore(&ha->hardware_lock, | |
284 | flags); | |
285 | atomic_dec(&ha->num_pend_mbx_stage2); | |
286 | atomic_dec(&ha->num_pend_mbx_stage3); | |
287 | rval = QLA_ABORTED; | |
288 | goto premature_exit; | |
289 | } | |
754d1243 GM |
290 | ql_dbg(ql_dbg_mbx, vha, 0x117a, |
291 | "cmd=%x Timeout.\n", command); | |
292 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
293 | clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); | |
294 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
b2000805 QT |
295 | |
296 | } else if (ha->flags.purge_mbox || | |
297 | chip_reset != ha->chip_reset) { | |
b6faaaf7 | 298 | spin_lock_irqsave(&ha->hardware_lock, flags); |
b2000805 | 299 | ha->flags.mbox_busy = 0; |
b6faaaf7 | 300 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
b2000805 QT |
301 | atomic_dec(&ha->num_pend_mbx_stage2); |
302 | atomic_dec(&ha->num_pend_mbx_stage3); | |
303 | rval = QLA_ABORTED; | |
304 | goto premature_exit; | |
754d1243 | 305 | } |
b2000805 QT |
306 | atomic_dec(&ha->num_pend_mbx_stage3); |
307 | ||
77ddb94a | 308 | if (time_after(jiffies, wait_time + 5 * HZ)) |
309 | ql_log(ql_log_warn, vha, 0x1015, "cmd=0x%x, waited %d msecs\n", | |
310 | command, jiffies_to_msecs(jiffies - wait_time)); | |
1da177e4 | 311 | } else { |
5e19ed90 | 312 | ql_dbg(ql_dbg_mbx, vha, 0x1011, |
7c3df132 | 313 | "Cmd=%x Polling Mode.\n", command); |
1da177e4 | 314 | |
7ec0effd | 315 | if (IS_P3P_TYPE(ha)) { |
a9083016 GM |
316 | if (RD_REG_DWORD(®->isp82.hint) & |
317 | HINT_MBX_INT_PENDING) { | |
b6faaaf7 | 318 | ha->flags.mbox_busy = 0; |
a9083016 GM |
319 | spin_unlock_irqrestore(&ha->hardware_lock, |
320 | flags); | |
b2000805 | 321 | atomic_dec(&ha->num_pend_mbx_stage2); |
5e19ed90 | 322 | ql_dbg(ql_dbg_mbx, vha, 0x1012, |
7c3df132 | 323 | "Pending mailbox timeout, exiting.\n"); |
cdbb0a4f SV |
324 | rval = QLA_FUNCTION_TIMEOUT; |
325 | goto premature_exit; | |
a9083016 GM |
326 | } |
327 | WRT_REG_DWORD(®->isp82.hint, HINT_MBX_INT_PENDING); | |
328 | } else if (IS_FWI2_CAPABLE(ha)) | |
1c7c6357 AV |
329 | WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT); |
330 | else | |
331 | WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT); | |
1da177e4 | 332 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
1da177e4 LT |
333 | |
334 | wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */ | |
335 | while (!ha->flags.mbox_int) { | |
b2000805 QT |
336 | if (ha->flags.purge_mbox || |
337 | chip_reset != ha->chip_reset) { | |
b6faaaf7 | 338 | spin_lock_irqsave(&ha->hardware_lock, flags); |
b2000805 | 339 | ha->flags.mbox_busy = 0; |
b6faaaf7 QT |
340 | spin_unlock_irqrestore(&ha->hardware_lock, |
341 | flags); | |
b2000805 QT |
342 | atomic_dec(&ha->num_pend_mbx_stage2); |
343 | rval = QLA_ABORTED; | |
344 | goto premature_exit; | |
345 | } | |
346 | ||
1da177e4 LT |
347 | if (time_after(jiffies, wait_time)) |
348 | break; | |
349 | ||
3cb182b3 RG |
350 | /* |
351 | * Check if it's UNLOADING, cause we cannot poll in | |
352 | * this case, or else a NULL pointer dereference | |
353 | * is triggered. | |
354 | */ | |
355 | if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags))) | |
356 | return QLA_FUNCTION_TIMEOUT; | |
357 | ||
1da177e4 | 358 | /* Check for pending interrupts. */ |
73208dfd | 359 | qla2x00_poll(ha->rsp_q_map[0]); |
1da177e4 | 360 | |
85880801 AV |
361 | if (!ha->flags.mbox_int && |
362 | !(IS_QLA2200(ha) && | |
363 | command == MBC_LOAD_RISC_RAM_EXTENDED)) | |
59989831 | 364 | msleep(10); |
1da177e4 | 365 | } /* while */ |
5e19ed90 | 366 | ql_dbg(ql_dbg_mbx, vha, 0x1013, |
7c3df132 SK |
367 | "Waited %d sec.\n", |
368 | (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ)); | |
1da177e4 | 369 | } |
b2000805 | 370 | atomic_dec(&ha->num_pend_mbx_stage2); |
1da177e4 | 371 | |
1da177e4 LT |
372 | /* Check whether we timed out */ |
373 | if (ha->flags.mbox_int) { | |
374 | uint16_t *iptr2; | |
375 | ||
5e19ed90 | 376 | ql_dbg(ql_dbg_mbx, vha, 0x1014, |
7c3df132 | 377 | "Cmd=%x completed.\n", command); |
1da177e4 LT |
378 | |
379 | /* Got interrupt. Clear the flag. */ | |
380 | ha->flags.mbox_int = 0; | |
381 | clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); | |
382 | ||
7ec0effd | 383 | if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) { |
b6faaaf7 | 384 | spin_lock_irqsave(&ha->hardware_lock, flags); |
cdbb0a4f | 385 | ha->flags.mbox_busy = 0; |
b6faaaf7 QT |
386 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
387 | ||
cdbb0a4f SV |
388 | /* Setting Link-Down error */ |
389 | mcp->mb[0] = MBS_LINK_DOWN_ERROR; | |
390 | ha->mcp = NULL; | |
391 | rval = QLA_FUNCTION_FAILED; | |
83548fe2 | 392 | ql_log(ql_log_warn, vha, 0xd048, |
7c3df132 | 393 | "FW hung = %d.\n", ha->flags.isp82xx_fw_hung); |
cdbb0a4f SV |
394 | goto premature_exit; |
395 | } | |
396 | ||
354d6b21 | 397 | if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE) |
1da177e4 | 398 | rval = QLA_FUNCTION_FAILED; |
1da177e4 LT |
399 | |
400 | /* Load return mailbox registers. */ | |
401 | iptr2 = mcp->mb; | |
402 | iptr = (uint16_t *)&ha->mailbox_out[0]; | |
403 | mboxes = mcp->in_mb; | |
0e31a2c8 JC |
404 | |
405 | ql_dbg(ql_dbg_mbx, vha, 0x1113, | |
406 | "Mailbox registers (IN):\n"); | |
1da177e4 | 407 | for (cnt = 0; cnt < ha->mbx_count; cnt++) { |
0e31a2c8 | 408 | if (mboxes & BIT_0) { |
1da177e4 | 409 | *iptr2 = *iptr; |
0e31a2c8 JC |
410 | ql_dbg(ql_dbg_mbx, vha, 0x1114, |
411 | "mbox[%d]->0x%04x\n", cnt, *iptr2); | |
412 | } | |
1da177e4 LT |
413 | |
414 | mboxes >>= 1; | |
415 | iptr2++; | |
416 | iptr++; | |
417 | } | |
418 | } else { | |
419 | ||
8d3c9c23 QT |
420 | uint16_t mb[8]; |
421 | uint32_t ictrl, host_status, hccr; | |
783e0dc4 | 422 | uint16_t w; |
1c7c6357 | 423 | |
e428924c | 424 | if (IS_FWI2_CAPABLE(ha)) { |
8d3c9c23 QT |
425 | mb[0] = RD_REG_WORD(®->isp24.mailbox0); |
426 | mb[1] = RD_REG_WORD(®->isp24.mailbox1); | |
427 | mb[2] = RD_REG_WORD(®->isp24.mailbox2); | |
428 | mb[3] = RD_REG_WORD(®->isp24.mailbox3); | |
429 | mb[7] = RD_REG_WORD(®->isp24.mailbox7); | |
1c7c6357 | 430 | ictrl = RD_REG_DWORD(®->isp24.ictrl); |
8d3c9c23 QT |
431 | host_status = RD_REG_DWORD(®->isp24.host_status); |
432 | hccr = RD_REG_DWORD(®->isp24.hccr); | |
433 | ||
83548fe2 | 434 | ql_log(ql_log_warn, vha, 0xd04c, |
8d3c9c23 QT |
435 | "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx " |
436 | "mb[0-3]=[0x%x 0x%x 0x%x 0x%x] mb7 0x%x host_status 0x%x hccr 0x%x\n", | |
437 | command, ictrl, jiffies, mb[0], mb[1], mb[2], mb[3], | |
438 | mb[7], host_status, hccr); | |
439 | ||
1c7c6357 | 440 | } else { |
8d3c9c23 | 441 | mb[0] = RD_MAILBOX_REG(ha, ®->isp, 0); |
1c7c6357 | 442 | ictrl = RD_REG_WORD(®->isp.ictrl); |
8d3c9c23 QT |
443 | ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119, |
444 | "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx " | |
445 | "mb[0]=0x%x\n", command, ictrl, jiffies, mb[0]); | |
1c7c6357 | 446 | } |
5e19ed90 | 447 | ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1019); |
1da177e4 | 448 | |
783e0dc4 SC |
449 | /* Capture FW dump only, if PCI device active */ |
450 | if (!pci_channel_offline(vha->hw->pdev)) { | |
451 | pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w); | |
b2000805 QT |
452 | if (w == 0xffff || ictrl == 0xffffffff || |
453 | (chip_reset != ha->chip_reset)) { | |
783e0dc4 SC |
454 | /* This is special case if there is unload |
455 | * of driver happening and if PCI device go | |
456 | * into bad state due to PCI error condition | |
457 | * then only PCI ERR flag would be set. | |
458 | * we will do premature exit for above case. | |
459 | */ | |
b6faaaf7 | 460 | spin_lock_irqsave(&ha->hardware_lock, flags); |
783e0dc4 | 461 | ha->flags.mbox_busy = 0; |
b6faaaf7 QT |
462 | spin_unlock_irqrestore(&ha->hardware_lock, |
463 | flags); | |
783e0dc4 SC |
464 | rval = QLA_FUNCTION_TIMEOUT; |
465 | goto premature_exit; | |
466 | } | |
f55bfc88 | 467 | |
783e0dc4 SC |
468 | /* Attempt to capture firmware dump for further |
469 | * anallysis of the current formware state. we do not | |
470 | * need to do this if we are intentionally generating | |
471 | * a dump | |
472 | */ | |
473 | if (mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) | |
474 | ha->isp_ops->fw_dump(vha, 0); | |
475 | rval = QLA_FUNCTION_TIMEOUT; | |
476 | } | |
1da177e4 | 477 | } |
b6faaaf7 | 478 | spin_lock_irqsave(&ha->hardware_lock, flags); |
1da177e4 | 479 | ha->flags.mbox_busy = 0; |
b6faaaf7 | 480 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
1da177e4 LT |
481 | |
482 | /* Clean up */ | |
483 | ha->mcp = NULL; | |
484 | ||
124f85e6 | 485 | if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) { |
5e19ed90 | 486 | ql_dbg(ql_dbg_mbx, vha, 0x101a, |
7c3df132 | 487 | "Checking for additional resp interrupt.\n"); |
1da177e4 LT |
488 | |
489 | /* polling mode for non isp_abort commands. */ | |
73208dfd | 490 | qla2x00_poll(ha->rsp_q_map[0]); |
1da177e4 LT |
491 | } |
492 | ||
1c7c6357 AV |
493 | if (rval == QLA_FUNCTION_TIMEOUT && |
494 | mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) { | |
85880801 AV |
495 | if (!io_lock_on || (mcp->flags & IOCTL_CMD) || |
496 | ha->flags.eeh_busy) { | |
1da177e4 | 497 | /* not in dpc. schedule it for dpc to take over. */ |
5e19ed90 | 498 | ql_dbg(ql_dbg_mbx, vha, 0x101b, |
7c3df132 | 499 | "Timeout, schedule isp_abort_needed.\n"); |
cdbb0a4f SV |
500 | |
501 | if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) && | |
502 | !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) && | |
503 | !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { | |
63154916 GM |
504 | if (IS_QLA82XX(ha)) { |
505 | ql_dbg(ql_dbg_mbx, vha, 0x112a, | |
506 | "disabling pause transmit on port " | |
507 | "0 & 1.\n"); | |
508 | qla82xx_wr_32(ha, | |
509 | QLA82XX_CRB_NIU + 0x98, | |
510 | CRB_NIU_XG_PAUSE_CTL_P0| | |
511 | CRB_NIU_XG_PAUSE_CTL_P1); | |
512 | } | |
7c3df132 | 513 | ql_log(ql_log_info, base_vha, 0x101c, |
24d9ee85 | 514 | "Mailbox cmd timeout occurred, cmd=0x%x, " |
d8c0d546 CD |
515 | "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP " |
516 | "abort.\n", command, mcp->mb[0], | |
517 | ha->flags.eeh_busy); | |
cdbb0a4f SV |
518 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
519 | qla2xxx_wake_dpc(vha); | |
520 | } | |
710bc78f | 521 | } else if (current == ha->dpc_thread) { |
1da177e4 | 522 | /* call abort directly since we are in the DPC thread */ |
5e19ed90 | 523 | ql_dbg(ql_dbg_mbx, vha, 0x101d, |
7c3df132 | 524 | "Timeout, calling abort_isp.\n"); |
cdbb0a4f SV |
525 | |
526 | if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) && | |
527 | !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) && | |
528 | !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { | |
63154916 GM |
529 | if (IS_QLA82XX(ha)) { |
530 | ql_dbg(ql_dbg_mbx, vha, 0x112b, | |
531 | "disabling pause transmit on port " | |
532 | "0 & 1.\n"); | |
533 | qla82xx_wr_32(ha, | |
534 | QLA82XX_CRB_NIU + 0x98, | |
535 | CRB_NIU_XG_PAUSE_CTL_P0| | |
536 | CRB_NIU_XG_PAUSE_CTL_P1); | |
537 | } | |
7c3df132 | 538 | ql_log(ql_log_info, base_vha, 0x101e, |
24d9ee85 | 539 | "Mailbox cmd timeout occurred, cmd=0x%x, " |
d8c0d546 CD |
540 | "mb[0]=0x%x. Scheduling ISP abort ", |
541 | command, mcp->mb[0]); | |
cdbb0a4f SV |
542 | set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags); |
543 | clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
d3360960 GM |
544 | /* Allow next mbx cmd to come in. */ |
545 | complete(&ha->mbx_cmd_comp); | |
cdbb0a4f SV |
546 | if (ha->isp_ops->abort_isp(vha)) { |
547 | /* Failed. retry later. */ | |
548 | set_bit(ISP_ABORT_NEEDED, | |
549 | &vha->dpc_flags); | |
550 | } | |
551 | clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags); | |
5e19ed90 | 552 | ql_dbg(ql_dbg_mbx, vha, 0x101f, |
7c3df132 | 553 | "Finished abort_isp.\n"); |
d3360960 | 554 | goto mbx_done; |
1da177e4 | 555 | } |
1da177e4 LT |
556 | } |
557 | } | |
558 | ||
cdbb0a4f | 559 | premature_exit: |
1da177e4 | 560 | /* Allow next mbx cmd to come in. */ |
8eca3f39 | 561 | complete(&ha->mbx_cmd_comp); |
1da177e4 | 562 | |
d3360960 | 563 | mbx_done: |
b2000805 QT |
564 | if (rval == QLA_ABORTED) { |
565 | ql_log(ql_log_info, vha, 0xd035, | |
566 | "Chip Reset in progress. Purging Mbox cmd=0x%x.\n", | |
567 | mcp->mb[0]); | |
568 | } else if (rval) { | |
050dc76a JC |
569 | if (ql2xextended_error_logging & (ql_dbg_disc|ql_dbg_mbx)) { |
570 | pr_warn("%s [%s]-%04x:%ld: **** Failed", QL_MSGHDR, | |
571 | dev_name(&ha->pdev->dev), 0x1020+0x800, | |
572 | vha->host_no); | |
573 | mboxes = mcp->in_mb; | |
574 | cnt = 4; | |
575 | for (i = 0; i < ha->mbx_count && cnt; i++, mboxes >>= 1) | |
576 | if (mboxes & BIT_0) { | |
577 | printk(" mb[%u]=%x", i, mcp->mb[i]); | |
578 | cnt--; | |
579 | } | |
580 | pr_warn(" cmd=%x ****\n", command); | |
581 | } | |
f7e59e99 MR |
582 | if (IS_FWI2_CAPABLE(ha) && !(IS_P3P_TYPE(ha))) { |
583 | ql_dbg(ql_dbg_mbx, vha, 0x1198, | |
584 | "host_status=%#x intr_ctrl=%#x intr_status=%#x\n", | |
585 | RD_REG_DWORD(®->isp24.host_status), | |
586 | RD_REG_DWORD(®->isp24.ictrl), | |
587 | RD_REG_DWORD(®->isp24.istatus)); | |
588 | } else { | |
589 | ql_dbg(ql_dbg_mbx, vha, 0x1206, | |
590 | "ctrl_status=%#x ictrl=%#x istatus=%#x\n", | |
591 | RD_REG_WORD(®->isp.ctrl_status), | |
592 | RD_REG_WORD(®->isp.ictrl), | |
593 | RD_REG_WORD(®->isp.istatus)); | |
594 | } | |
1da177e4 | 595 | } else { |
7c3df132 | 596 | ql_dbg(ql_dbg_mbx, base_vha, 0x1021, "Done %s.\n", __func__); |
1da177e4 LT |
597 | } |
598 | ||
1da177e4 LT |
599 | return rval; |
600 | } | |
601 | ||
1da177e4 | 602 | int |
7b867cf7 | 603 | qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr, |
590f98e5 | 604 | uint32_t risc_code_size) |
1da177e4 LT |
605 | { |
606 | int rval; | |
7b867cf7 | 607 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
608 | mbx_cmd_t mc; |
609 | mbx_cmd_t *mcp = &mc; | |
1da177e4 | 610 | |
5f28d2d7 SK |
611 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1022, |
612 | "Entered %s.\n", __func__); | |
1da177e4 | 613 | |
e428924c | 614 | if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) { |
590f98e5 | 615 | mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED; |
616 | mcp->mb[8] = MSW(risc_addr); | |
617 | mcp->out_mb = MBX_8|MBX_0; | |
1da177e4 | 618 | } else { |
590f98e5 | 619 | mcp->mb[0] = MBC_LOAD_RISC_RAM; |
620 | mcp->out_mb = MBX_0; | |
1da177e4 | 621 | } |
1da177e4 LT |
622 | mcp->mb[1] = LSW(risc_addr); |
623 | mcp->mb[2] = MSW(req_dma); | |
624 | mcp->mb[3] = LSW(req_dma); | |
1da177e4 LT |
625 | mcp->mb[6] = MSW(MSD(req_dma)); |
626 | mcp->mb[7] = LSW(MSD(req_dma)); | |
590f98e5 | 627 | mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1; |
e428924c | 628 | if (IS_FWI2_CAPABLE(ha)) { |
1c7c6357 AV |
629 | mcp->mb[4] = MSW(risc_code_size); |
630 | mcp->mb[5] = LSW(risc_code_size); | |
631 | mcp->out_mb |= MBX_5|MBX_4; | |
632 | } else { | |
633 | mcp->mb[4] = LSW(risc_code_size); | |
634 | mcp->out_mb |= MBX_4; | |
635 | } | |
636 | ||
1da177e4 | 637 | mcp->in_mb = MBX_0; |
b93480e3 | 638 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 639 | mcp->flags = 0; |
7b867cf7 | 640 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 | 641 | |
1da177e4 | 642 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
643 | ql_dbg(ql_dbg_mbx, vha, 0x1023, |
644 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
1da177e4 | 645 | } else { |
5f28d2d7 SK |
646 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1024, |
647 | "Done %s.\n", __func__); | |
1da177e4 LT |
648 | } |
649 | ||
650 | return rval; | |
651 | } | |
652 | ||
cad454b1 | 653 | #define EXTENDED_BB_CREDITS BIT_0 |
e84067d7 | 654 | #define NVME_ENABLE_FLAG BIT_3 |
1f4c7c38 JC |
655 | static inline uint16_t qla25xx_set_sfp_lr_dist(struct qla_hw_data *ha) |
656 | { | |
657 | uint16_t mb4 = BIT_0; | |
658 | ||
659 | if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) | |
660 | mb4 |= ha->long_range_distance << LR_DIST_FW_POS; | |
661 | ||
662 | return mb4; | |
663 | } | |
664 | ||
665 | static inline uint16_t qla25xx_set_nvr_lr_dist(struct qla_hw_data *ha) | |
666 | { | |
667 | uint16_t mb4 = BIT_0; | |
668 | ||
669 | if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { | |
670 | struct nvram_81xx *nv = ha->nvram; | |
671 | ||
672 | mb4 |= LR_DIST_FW_FIELD(nv->enhanced_features); | |
673 | } | |
674 | ||
675 | return mb4; | |
676 | } | |
e84067d7 | 677 | |
1da177e4 LT |
678 | /* |
679 | * qla2x00_execute_fw | |
1c7c6357 | 680 | * Start adapter firmware. |
1da177e4 LT |
681 | * |
682 | * Input: | |
1c7c6357 AV |
683 | * ha = adapter block pointer. |
684 | * TARGET_QUEUE_LOCK must be released. | |
685 | * ADAPTER_STATE_LOCK must be released. | |
1da177e4 LT |
686 | * |
687 | * Returns: | |
1c7c6357 | 688 | * qla2x00 local function return status code. |
1da177e4 LT |
689 | * |
690 | * Context: | |
1c7c6357 | 691 | * Kernel context. |
1da177e4 LT |
692 | */ |
693 | int | |
7b867cf7 | 694 | qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr) |
1da177e4 LT |
695 | { |
696 | int rval; | |
7b867cf7 | 697 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
698 | mbx_cmd_t mc; |
699 | mbx_cmd_t *mcp = &mc; | |
700 | ||
5f28d2d7 SK |
701 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1025, |
702 | "Entered %s.\n", __func__); | |
1da177e4 LT |
703 | |
704 | mcp->mb[0] = MBC_EXECUTE_FIRMWARE; | |
1c7c6357 AV |
705 | mcp->out_mb = MBX_0; |
706 | mcp->in_mb = MBX_0; | |
e428924c | 707 | if (IS_FWI2_CAPABLE(ha)) { |
1c7c6357 AV |
708 | mcp->mb[1] = MSW(risc_addr); |
709 | mcp->mb[2] = LSW(risc_addr); | |
710 | mcp->mb[3] = 0; | |
e4e3a2ce | 711 | mcp->mb[4] = 0; |
1f4c7c38 | 712 | ha->flags.using_lr_setting = 0; |
f73cb695 CD |
713 | if (IS_QLA25XX(ha) || IS_QLA81XX(ha) || IS_QLA83XX(ha) || |
714 | IS_QLA27XX(ha)) { | |
e4e3a2ce QT |
715 | if (ql2xautodetectsfp) { |
716 | if (ha->flags.detected_lr_sfp) { | |
1f4c7c38 JC |
717 | mcp->mb[4] |= |
718 | qla25xx_set_sfp_lr_dist(ha); | |
e4e3a2ce QT |
719 | ha->flags.using_lr_setting = 1; |
720 | } | |
721 | } else { | |
722 | struct nvram_81xx *nv = ha->nvram; | |
1f4c7c38 | 723 | /* set LR distance if specified in nvram */ |
e4e3a2ce | 724 | if (nv->enhanced_features & |
1f4c7c38 JC |
725 | NEF_LR_DIST_ENABLE) { |
726 | mcp->mb[4] |= | |
727 | qla25xx_set_nvr_lr_dist(ha); | |
e4e3a2ce QT |
728 | ha->flags.using_lr_setting = 1; |
729 | } | |
730 | } | |
e4e3a2ce | 731 | } |
b0d6cabd | 732 | |
e84067d7 DG |
733 | if (ql2xnvmeenable && IS_QLA27XX(ha)) |
734 | mcp->mb[4] |= NVME_ENABLE_FLAG; | |
735 | ||
92d4408e SC |
736 | if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { |
737 | struct nvram_81xx *nv = ha->nvram; | |
738 | /* set minimum speed if specified in nvram */ | |
739 | if (nv->min_link_speed >= 2 && | |
740 | nv->min_link_speed <= 5) { | |
741 | mcp->mb[4] |= BIT_4; | |
742 | mcp->mb[11] = nv->min_link_speed; | |
743 | mcp->out_mb |= MBX_11; | |
744 | mcp->in_mb |= BIT_5; | |
745 | vha->min_link_speed_feat = nv->min_link_speed; | |
746 | } | |
747 | } | |
748 | ||
b0d6cabd HM |
749 | if (ha->flags.exlogins_enabled) |
750 | mcp->mb[4] |= ENABLE_EXTENDED_LOGIN; | |
751 | ||
2f56a7f1 HM |
752 | if (ha->flags.exchoffld_enabled) |
753 | mcp->mb[4] |= ENABLE_EXCHANGE_OFFLD; | |
754 | ||
8b3253d1 | 755 | mcp->out_mb |= MBX_4|MBX_3|MBX_2|MBX_1; |
1f4c7c38 | 756 | mcp->in_mb |= MBX_3 | MBX_2 | MBX_1; |
1c7c6357 AV |
757 | } else { |
758 | mcp->mb[1] = LSW(risc_addr); | |
759 | mcp->out_mb |= MBX_1; | |
760 | if (IS_QLA2322(ha) || IS_QLA6322(ha)) { | |
761 | mcp->mb[2] = 0; | |
762 | mcp->out_mb |= MBX_2; | |
763 | } | |
1da177e4 LT |
764 | } |
765 | ||
b93480e3 | 766 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 767 | mcp->flags = 0; |
7b867cf7 | 768 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 | 769 | |
1c7c6357 | 770 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
771 | ql_dbg(ql_dbg_mbx, vha, 0x1026, |
772 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
1c7c6357 | 773 | } else { |
e428924c | 774 | if (IS_FWI2_CAPABLE(ha)) { |
1f4c7c38 JC |
775 | ha->fw_ability_mask = mcp->mb[3] << 16 | mcp->mb[2]; |
776 | ql_dbg(ql_dbg_mbx, vha, 0x119a, | |
777 | "fw_ability_mask=%x.\n", ha->fw_ability_mask); | |
92d4408e SC |
778 | ql_dbg(ql_dbg_mbx, vha, 0x1027, |
779 | "exchanges=%x.\n", mcp->mb[1]); | |
1f4c7c38 JC |
780 | if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { |
781 | ha->max_speed_sup = mcp->mb[2] & BIT_0; | |
92d4408e SC |
782 | ql_dbg(ql_dbg_mbx, vha, 0x119b, |
783 | "Maximum speed supported=%s.\n", | |
784 | ha->max_speed_sup ? "32Gps" : "16Gps"); | |
785 | if (vha->min_link_speed_feat) { | |
786 | ha->min_link_speed = mcp->mb[5]; | |
787 | ql_dbg(ql_dbg_mbx, vha, 0x119c, | |
788 | "Minimum speed set=%s.\n", | |
789 | mcp->mb[5] == 5 ? "32Gps" : | |
790 | mcp->mb[5] == 4 ? "16Gps" : | |
791 | mcp->mb[5] == 3 ? "8Gps" : | |
792 | mcp->mb[5] == 2 ? "4Gps" : | |
1f4c7c38 | 793 | "unknown"); |
92d4408e SC |
794 | } |
795 | } | |
1c7c6357 | 796 | } |
1f4c7c38 JC |
797 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1028, |
798 | "Done.\n"); | |
1c7c6357 | 799 | } |
1da177e4 LT |
800 | |
801 | return rval; | |
802 | } | |
803 | ||
b0d6cabd HM |
804 | /* |
805 | * qla_get_exlogin_status | |
806 | * Get extended login status | |
807 | * uses the memory offload control/status Mailbox | |
808 | * | |
809 | * Input: | |
810 | * ha: adapter state pointer. | |
811 | * fwopt: firmware options | |
812 | * | |
813 | * Returns: | |
814 | * qla2x00 local function status | |
815 | * | |
816 | * Context: | |
817 | * Kernel context. | |
818 | */ | |
819 | #define FETCH_XLOGINS_STAT 0x8 | |
820 | int | |
821 | qla_get_exlogin_status(scsi_qla_host_t *vha, uint16_t *buf_sz, | |
822 | uint16_t *ex_logins_cnt) | |
823 | { | |
824 | int rval; | |
825 | mbx_cmd_t mc; | |
826 | mbx_cmd_t *mcp = &mc; | |
827 | ||
828 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118f, | |
829 | "Entered %s\n", __func__); | |
830 | ||
831 | memset(mcp->mb, 0 , sizeof(mcp->mb)); | |
832 | mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT; | |
833 | mcp->mb[1] = FETCH_XLOGINS_STAT; | |
834 | mcp->out_mb = MBX_1|MBX_0; | |
835 | mcp->in_mb = MBX_10|MBX_4|MBX_0; | |
836 | mcp->tov = MBX_TOV_SECONDS; | |
837 | mcp->flags = 0; | |
838 | ||
839 | rval = qla2x00_mailbox_command(vha, mcp); | |
840 | if (rval != QLA_SUCCESS) { | |
841 | ql_dbg(ql_dbg_mbx, vha, 0x1115, "Failed=%x.\n", rval); | |
842 | } else { | |
843 | *buf_sz = mcp->mb[4]; | |
844 | *ex_logins_cnt = mcp->mb[10]; | |
845 | ||
846 | ql_log(ql_log_info, vha, 0x1190, | |
847 | "buffer size 0x%x, exchange login count=%d\n", | |
848 | mcp->mb[4], mcp->mb[10]); | |
849 | ||
850 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1116, | |
851 | "Done %s.\n", __func__); | |
852 | } | |
853 | ||
854 | return rval; | |
855 | } | |
856 | ||
857 | /* | |
858 | * qla_set_exlogin_mem_cfg | |
859 | * set extended login memory configuration | |
860 | * Mbx needs to be issues before init_cb is set | |
861 | * | |
862 | * Input: | |
863 | * ha: adapter state pointer. | |
864 | * buffer: buffer pointer | |
865 | * phys_addr: physical address of buffer | |
866 | * size: size of buffer | |
867 | * TARGET_QUEUE_LOCK must be released | |
868 | * ADAPTER_STATE_LOCK must be release | |
869 | * | |
870 | * Returns: | |
871 | * qla2x00 local funxtion status code. | |
872 | * | |
873 | * Context: | |
874 | * Kernel context. | |
875 | */ | |
876 | #define CONFIG_XLOGINS_MEM 0x3 | |
877 | int | |
878 | qla_set_exlogin_mem_cfg(scsi_qla_host_t *vha, dma_addr_t phys_addr) | |
879 | { | |
880 | int rval; | |
881 | mbx_cmd_t mc; | |
882 | mbx_cmd_t *mcp = &mc; | |
883 | struct qla_hw_data *ha = vha->hw; | |
b0d6cabd HM |
884 | |
885 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111a, | |
886 | "Entered %s.\n", __func__); | |
887 | ||
888 | memset(mcp->mb, 0 , sizeof(mcp->mb)); | |
889 | mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT; | |
890 | mcp->mb[1] = CONFIG_XLOGINS_MEM; | |
891 | mcp->mb[2] = MSW(phys_addr); | |
892 | mcp->mb[3] = LSW(phys_addr); | |
893 | mcp->mb[6] = MSW(MSD(phys_addr)); | |
894 | mcp->mb[7] = LSW(MSD(phys_addr)); | |
895 | mcp->mb[8] = MSW(ha->exlogin_size); | |
896 | mcp->mb[9] = LSW(ha->exlogin_size); | |
897 | mcp->out_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; | |
898 | mcp->in_mb = MBX_11|MBX_0; | |
899 | mcp->tov = MBX_TOV_SECONDS; | |
900 | mcp->flags = 0; | |
901 | rval = qla2x00_mailbox_command(vha, mcp); | |
902 | if (rval != QLA_SUCCESS) { | |
903 | /*EMPTY*/ | |
904 | ql_dbg(ql_dbg_mbx, vha, 0x111b, "Failed=%x.\n", rval); | |
905 | } else { | |
b0d6cabd HM |
906 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118c, |
907 | "Done %s.\n", __func__); | |
908 | } | |
909 | ||
910 | return rval; | |
911 | } | |
912 | ||
2f56a7f1 HM |
913 | /* |
914 | * qla_get_exchoffld_status | |
915 | * Get exchange offload status | |
916 | * uses the memory offload control/status Mailbox | |
917 | * | |
918 | * Input: | |
919 | * ha: adapter state pointer. | |
920 | * fwopt: firmware options | |
921 | * | |
922 | * Returns: | |
923 | * qla2x00 local function status | |
924 | * | |
925 | * Context: | |
926 | * Kernel context. | |
927 | */ | |
928 | #define FETCH_XCHOFFLD_STAT 0x2 | |
929 | int | |
930 | qla_get_exchoffld_status(scsi_qla_host_t *vha, uint16_t *buf_sz, | |
931 | uint16_t *ex_logins_cnt) | |
932 | { | |
933 | int rval; | |
934 | mbx_cmd_t mc; | |
935 | mbx_cmd_t *mcp = &mc; | |
936 | ||
937 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1019, | |
938 | "Entered %s\n", __func__); | |
939 | ||
940 | memset(mcp->mb, 0 , sizeof(mcp->mb)); | |
941 | mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT; | |
942 | mcp->mb[1] = FETCH_XCHOFFLD_STAT; | |
943 | mcp->out_mb = MBX_1|MBX_0; | |
944 | mcp->in_mb = MBX_10|MBX_4|MBX_0; | |
945 | mcp->tov = MBX_TOV_SECONDS; | |
946 | mcp->flags = 0; | |
947 | ||
948 | rval = qla2x00_mailbox_command(vha, mcp); | |
949 | if (rval != QLA_SUCCESS) { | |
950 | ql_dbg(ql_dbg_mbx, vha, 0x1155, "Failed=%x.\n", rval); | |
951 | } else { | |
952 | *buf_sz = mcp->mb[4]; | |
953 | *ex_logins_cnt = mcp->mb[10]; | |
954 | ||
955 | ql_log(ql_log_info, vha, 0x118e, | |
956 | "buffer size 0x%x, exchange offload count=%d\n", | |
957 | mcp->mb[4], mcp->mb[10]); | |
958 | ||
959 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1156, | |
960 | "Done %s.\n", __func__); | |
961 | } | |
962 | ||
963 | return rval; | |
964 | } | |
965 | ||
966 | /* | |
967 | * qla_set_exchoffld_mem_cfg | |
968 | * Set exchange offload memory configuration | |
969 | * Mbx needs to be issues before init_cb is set | |
970 | * | |
971 | * Input: | |
972 | * ha: adapter state pointer. | |
973 | * buffer: buffer pointer | |
974 | * phys_addr: physical address of buffer | |
975 | * size: size of buffer | |
976 | * TARGET_QUEUE_LOCK must be released | |
977 | * ADAPTER_STATE_LOCK must be release | |
978 | * | |
979 | * Returns: | |
980 | * qla2x00 local funxtion status code. | |
981 | * | |
982 | * Context: | |
983 | * Kernel context. | |
984 | */ | |
985 | #define CONFIG_XCHOFFLD_MEM 0x3 | |
986 | int | |
99e1b683 | 987 | qla_set_exchoffld_mem_cfg(scsi_qla_host_t *vha) |
2f56a7f1 HM |
988 | { |
989 | int rval; | |
990 | mbx_cmd_t mc; | |
991 | mbx_cmd_t *mcp = &mc; | |
992 | struct qla_hw_data *ha = vha->hw; | |
993 | ||
994 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1157, | |
995 | "Entered %s.\n", __func__); | |
996 | ||
997 | memset(mcp->mb, 0 , sizeof(mcp->mb)); | |
998 | mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT; | |
999 | mcp->mb[1] = CONFIG_XCHOFFLD_MEM; | |
99e1b683 QT |
1000 | mcp->mb[2] = MSW(ha->exchoffld_buf_dma); |
1001 | mcp->mb[3] = LSW(ha->exchoffld_buf_dma); | |
1002 | mcp->mb[6] = MSW(MSD(ha->exchoffld_buf_dma)); | |
1003 | mcp->mb[7] = LSW(MSD(ha->exchoffld_buf_dma)); | |
1004 | mcp->mb[8] = MSW(ha->exchoffld_size); | |
1005 | mcp->mb[9] = LSW(ha->exchoffld_size); | |
2f56a7f1 HM |
1006 | mcp->out_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; |
1007 | mcp->in_mb = MBX_11|MBX_0; | |
1008 | mcp->tov = MBX_TOV_SECONDS; | |
1009 | mcp->flags = 0; | |
1010 | rval = qla2x00_mailbox_command(vha, mcp); | |
1011 | if (rval != QLA_SUCCESS) { | |
1012 | /*EMPTY*/ | |
1013 | ql_dbg(ql_dbg_mbx, vha, 0x1158, "Failed=%x.\n", rval); | |
1014 | } else { | |
1015 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1192, | |
1016 | "Done %s.\n", __func__); | |
1017 | } | |
1018 | ||
1019 | return rval; | |
1020 | } | |
1021 | ||
1da177e4 LT |
1022 | /* |
1023 | * qla2x00_get_fw_version | |
1024 | * Get firmware version. | |
1025 | * | |
1026 | * Input: | |
1027 | * ha: adapter state pointer. | |
1028 | * major: pointer for major number. | |
1029 | * minor: pointer for minor number. | |
1030 | * subminor: pointer for subminor number. | |
1031 | * | |
1032 | * Returns: | |
1033 | * qla2x00 local function return status code. | |
1034 | * | |
1035 | * Context: | |
1036 | * Kernel context. | |
1037 | */ | |
ca9e9c3e | 1038 | int |
6246b8a1 | 1039 | qla2x00_get_fw_version(scsi_qla_host_t *vha) |
1da177e4 LT |
1040 | { |
1041 | int rval; | |
1042 | mbx_cmd_t mc; | |
1043 | mbx_cmd_t *mcp = &mc; | |
6246b8a1 | 1044 | struct qla_hw_data *ha = vha->hw; |
1da177e4 | 1045 | |
5f28d2d7 SK |
1046 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1029, |
1047 | "Entered %s.\n", __func__); | |
1da177e4 LT |
1048 | |
1049 | mcp->mb[0] = MBC_GET_FIRMWARE_VERSION; | |
1050 | mcp->out_mb = MBX_0; | |
1051 | mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
7ec0effd | 1052 | if (IS_QLA81XX(vha->hw) || IS_QLA8031(ha) || IS_QLA8044(ha)) |
55a96158 | 1053 | mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8; |
fb0effee | 1054 | if (IS_FWI2_CAPABLE(ha)) |
6246b8a1 | 1055 | mcp->in_mb |= MBX_17|MBX_16|MBX_15; |
f73cb695 | 1056 | if (IS_QLA27XX(ha)) |
ad1ef177 JC |
1057 | mcp->in_mb |= |
1058 | MBX_25|MBX_24|MBX_23|MBX_22|MBX_21|MBX_20|MBX_19|MBX_18| | |
1059 | MBX_14|MBX_13|MBX_11|MBX_10|MBX_9|MBX_8; | |
03aa868c | 1060 | |
1da177e4 | 1061 | mcp->flags = 0; |
b93480e3 | 1062 | mcp->tov = MBX_TOV_SECONDS; |
7b867cf7 | 1063 | rval = qla2x00_mailbox_command(vha, mcp); |
ca9e9c3e AV |
1064 | if (rval != QLA_SUCCESS) |
1065 | goto failed; | |
1da177e4 LT |
1066 | |
1067 | /* Return mailbox data. */ | |
6246b8a1 GM |
1068 | ha->fw_major_version = mcp->mb[1]; |
1069 | ha->fw_minor_version = mcp->mb[2]; | |
1070 | ha->fw_subminor_version = mcp->mb[3]; | |
1071 | ha->fw_attributes = mcp->mb[6]; | |
7b867cf7 | 1072 | if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw)) |
6246b8a1 | 1073 | ha->fw_memory_size = 0x1FFFF; /* Defaults to 128KB. */ |
1da177e4 | 1074 | else |
6246b8a1 | 1075 | ha->fw_memory_size = (mcp->mb[5] << 16) | mcp->mb[4]; |
03aa868c | 1076 | |
7ec0effd | 1077 | if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || IS_QLA8044(ha)) { |
6246b8a1 GM |
1078 | ha->mpi_version[0] = mcp->mb[10] & 0xff; |
1079 | ha->mpi_version[1] = mcp->mb[11] >> 8; | |
1080 | ha->mpi_version[2] = mcp->mb[11] & 0xff; | |
1081 | ha->mpi_capabilities = (mcp->mb[12] << 16) | mcp->mb[13]; | |
1082 | ha->phy_version[0] = mcp->mb[8] & 0xff; | |
1083 | ha->phy_version[1] = mcp->mb[9] >> 8; | |
1084 | ha->phy_version[2] = mcp->mb[9] & 0xff; | |
1085 | } | |
03aa868c | 1086 | |
81178772 SK |
1087 | if (IS_FWI2_CAPABLE(ha)) { |
1088 | ha->fw_attributes_h = mcp->mb[15]; | |
1089 | ha->fw_attributes_ext[0] = mcp->mb[16]; | |
1090 | ha->fw_attributes_ext[1] = mcp->mb[17]; | |
1091 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1139, | |
1092 | "%s: FW_attributes Upper: 0x%x, Lower: 0x%x.\n", | |
1093 | __func__, mcp->mb[15], mcp->mb[6]); | |
1094 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x112f, | |
1095 | "%s: Ext_FwAttributes Upper: 0x%x, Lower: 0x%x.\n", | |
1096 | __func__, mcp->mb[17], mcp->mb[16]); | |
2f56a7f1 | 1097 | |
b0d6cabd HM |
1098 | if (ha->fw_attributes_h & 0x4) |
1099 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118d, | |
1100 | "%s: Firmware supports Extended Login 0x%x\n", | |
1101 | __func__, ha->fw_attributes_h); | |
2f56a7f1 HM |
1102 | |
1103 | if (ha->fw_attributes_h & 0x8) | |
1104 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1191, | |
1105 | "%s: Firmware supports Exchange Offload 0x%x\n", | |
1106 | __func__, ha->fw_attributes_h); | |
e84067d7 | 1107 | |
deeae7a6 DG |
1108 | /* |
1109 | * FW supports nvme and driver load parameter requested nvme. | |
1110 | * BIT 26 of fw_attributes indicates NVMe support. | |
1111 | */ | |
171e4909 GM |
1112 | if ((ha->fw_attributes_h & |
1113 | (FW_ATTR_H_NVME | FW_ATTR_H_NVME_UPDATED)) && | |
1114 | ql2xnvmeenable) { | |
e84067d7 | 1115 | vha->flags.nvme_enabled = 1; |
1cbc0efc DT |
1116 | ql_log(ql_log_info, vha, 0xd302, |
1117 | "%s: FC-NVMe is Enabled (0x%x)\n", | |
1118 | __func__, ha->fw_attributes_h); | |
1119 | } | |
3a03eb79 | 1120 | } |
03aa868c | 1121 | |
f73cb695 | 1122 | if (IS_QLA27XX(ha)) { |
03aa868c SC |
1123 | ha->mpi_version[0] = mcp->mb[10] & 0xff; |
1124 | ha->mpi_version[1] = mcp->mb[11] >> 8; | |
1125 | ha->mpi_version[2] = mcp->mb[11] & 0xff; | |
1126 | ha->pep_version[0] = mcp->mb[13] & 0xff; | |
1127 | ha->pep_version[1] = mcp->mb[14] >> 8; | |
1128 | ha->pep_version[2] = mcp->mb[14] & 0xff; | |
f73cb695 CD |
1129 | ha->fw_shared_ram_start = (mcp->mb[19] << 16) | mcp->mb[18]; |
1130 | ha->fw_shared_ram_end = (mcp->mb[21] << 16) | mcp->mb[20]; | |
ad1ef177 JC |
1131 | ha->fw_ddr_ram_start = (mcp->mb[23] << 16) | mcp->mb[22]; |
1132 | ha->fw_ddr_ram_end = (mcp->mb[25] << 16) | mcp->mb[24]; | |
f73cb695 | 1133 | } |
6246b8a1 | 1134 | |
ca9e9c3e | 1135 | failed: |
1da177e4 LT |
1136 | if (rval != QLA_SUCCESS) { |
1137 | /*EMPTY*/ | |
7c3df132 | 1138 | ql_dbg(ql_dbg_mbx, vha, 0x102a, "Failed=%x.\n", rval); |
1da177e4 LT |
1139 | } else { |
1140 | /*EMPTY*/ | |
5f28d2d7 SK |
1141 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102b, |
1142 | "Done %s.\n", __func__); | |
1da177e4 | 1143 | } |
ca9e9c3e | 1144 | return rval; |
1da177e4 LT |
1145 | } |
1146 | ||
1147 | /* | |
1148 | * qla2x00_get_fw_options | |
1149 | * Set firmware options. | |
1150 | * | |
1151 | * Input: | |
1152 | * ha = adapter block pointer. | |
1153 | * fwopt = pointer for firmware options. | |
1154 | * | |
1155 | * Returns: | |
1156 | * qla2x00 local function return status code. | |
1157 | * | |
1158 | * Context: | |
1159 | * Kernel context. | |
1160 | */ | |
1161 | int | |
7b867cf7 | 1162 | qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts) |
1da177e4 LT |
1163 | { |
1164 | int rval; | |
1165 | mbx_cmd_t mc; | |
1166 | mbx_cmd_t *mcp = &mc; | |
1167 | ||
5f28d2d7 SK |
1168 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102c, |
1169 | "Entered %s.\n", __func__); | |
1da177e4 LT |
1170 | |
1171 | mcp->mb[0] = MBC_GET_FIRMWARE_OPTION; | |
1172 | mcp->out_mb = MBX_0; | |
1173 | mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0; | |
b93480e3 | 1174 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 1175 | mcp->flags = 0; |
7b867cf7 | 1176 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
1177 | |
1178 | if (rval != QLA_SUCCESS) { | |
1179 | /*EMPTY*/ | |
7c3df132 | 1180 | ql_dbg(ql_dbg_mbx, vha, 0x102d, "Failed=%x.\n", rval); |
1da177e4 | 1181 | } else { |
1c7c6357 | 1182 | fwopts[0] = mcp->mb[0]; |
1da177e4 LT |
1183 | fwopts[1] = mcp->mb[1]; |
1184 | fwopts[2] = mcp->mb[2]; | |
1185 | fwopts[3] = mcp->mb[3]; | |
1186 | ||
5f28d2d7 SK |
1187 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102e, |
1188 | "Done %s.\n", __func__); | |
1da177e4 LT |
1189 | } |
1190 | ||
1191 | return rval; | |
1192 | } | |
1193 | ||
1194 | ||
1195 | /* | |
1196 | * qla2x00_set_fw_options | |
1197 | * Set firmware options. | |
1198 | * | |
1199 | * Input: | |
1200 | * ha = adapter block pointer. | |
1201 | * fwopt = pointer for firmware options. | |
1202 | * | |
1203 | * Returns: | |
1204 | * qla2x00 local function return status code. | |
1205 | * | |
1206 | * Context: | |
1207 | * Kernel context. | |
1208 | */ | |
1209 | int | |
7b867cf7 | 1210 | qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts) |
1da177e4 LT |
1211 | { |
1212 | int rval; | |
1213 | mbx_cmd_t mc; | |
1214 | mbx_cmd_t *mcp = &mc; | |
1215 | ||
5f28d2d7 SK |
1216 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102f, |
1217 | "Entered %s.\n", __func__); | |
1da177e4 LT |
1218 | |
1219 | mcp->mb[0] = MBC_SET_FIRMWARE_OPTION; | |
1220 | mcp->mb[1] = fwopts[1]; | |
1221 | mcp->mb[2] = fwopts[2]; | |
1222 | mcp->mb[3] = fwopts[3]; | |
1c7c6357 | 1223 | mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; |
1da177e4 | 1224 | mcp->in_mb = MBX_0; |
7b867cf7 | 1225 | if (IS_FWI2_CAPABLE(vha->hw)) { |
1c7c6357 | 1226 | mcp->in_mb |= MBX_1; |
2da52737 QT |
1227 | mcp->mb[10] = fwopts[10]; |
1228 | mcp->out_mb |= MBX_10; | |
1c7c6357 AV |
1229 | } else { |
1230 | mcp->mb[10] = fwopts[10]; | |
1231 | mcp->mb[11] = fwopts[11]; | |
1232 | mcp->mb[12] = 0; /* Undocumented, but used */ | |
1233 | mcp->out_mb |= MBX_12|MBX_11|MBX_10; | |
1234 | } | |
b93480e3 | 1235 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 1236 | mcp->flags = 0; |
7b867cf7 | 1237 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 | 1238 | |
1c7c6357 AV |
1239 | fwopts[0] = mcp->mb[0]; |
1240 | ||
1da177e4 LT |
1241 | if (rval != QLA_SUCCESS) { |
1242 | /*EMPTY*/ | |
7c3df132 SK |
1243 | ql_dbg(ql_dbg_mbx, vha, 0x1030, |
1244 | "Failed=%x (%x/%x).\n", rval, mcp->mb[0], mcp->mb[1]); | |
1da177e4 LT |
1245 | } else { |
1246 | /*EMPTY*/ | |
5f28d2d7 SK |
1247 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1031, |
1248 | "Done %s.\n", __func__); | |
1da177e4 LT |
1249 | } |
1250 | ||
1251 | return rval; | |
1252 | } | |
1253 | ||
1254 | /* | |
1255 | * qla2x00_mbx_reg_test | |
1256 | * Mailbox register wrap test. | |
1257 | * | |
1258 | * Input: | |
1259 | * ha = adapter block pointer. | |
1260 | * TARGET_QUEUE_LOCK must be released. | |
1261 | * ADAPTER_STATE_LOCK must be released. | |
1262 | * | |
1263 | * Returns: | |
1264 | * qla2x00 local function return status code. | |
1265 | * | |
1266 | * Context: | |
1267 | * Kernel context. | |
1268 | */ | |
1269 | int | |
7b867cf7 | 1270 | qla2x00_mbx_reg_test(scsi_qla_host_t *vha) |
1da177e4 LT |
1271 | { |
1272 | int rval; | |
1273 | mbx_cmd_t mc; | |
1274 | mbx_cmd_t *mcp = &mc; | |
1275 | ||
5f28d2d7 SK |
1276 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1032, |
1277 | "Entered %s.\n", __func__); | |
1da177e4 LT |
1278 | |
1279 | mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST; | |
1280 | mcp->mb[1] = 0xAAAA; | |
1281 | mcp->mb[2] = 0x5555; | |
1282 | mcp->mb[3] = 0xAA55; | |
1283 | mcp->mb[4] = 0x55AA; | |
1284 | mcp->mb[5] = 0xA5A5; | |
1285 | mcp->mb[6] = 0x5A5A; | |
1286 | mcp->mb[7] = 0x2525; | |
1287 | mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
1288 | mcp->in_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
b93480e3 | 1289 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 1290 | mcp->flags = 0; |
7b867cf7 | 1291 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
1292 | |
1293 | if (rval == QLA_SUCCESS) { | |
1294 | if (mcp->mb[1] != 0xAAAA || mcp->mb[2] != 0x5555 || | |
1295 | mcp->mb[3] != 0xAA55 || mcp->mb[4] != 0x55AA) | |
1296 | rval = QLA_FUNCTION_FAILED; | |
1297 | if (mcp->mb[5] != 0xA5A5 || mcp->mb[6] != 0x5A5A || | |
1298 | mcp->mb[7] != 0x2525) | |
1299 | rval = QLA_FUNCTION_FAILED; | |
1300 | } | |
1301 | ||
1302 | if (rval != QLA_SUCCESS) { | |
1303 | /*EMPTY*/ | |
7c3df132 | 1304 | ql_dbg(ql_dbg_mbx, vha, 0x1033, "Failed=%x.\n", rval); |
1da177e4 LT |
1305 | } else { |
1306 | /*EMPTY*/ | |
5f28d2d7 SK |
1307 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1034, |
1308 | "Done %s.\n", __func__); | |
1da177e4 LT |
1309 | } |
1310 | ||
1311 | return rval; | |
1312 | } | |
1313 | ||
1314 | /* | |
1315 | * qla2x00_verify_checksum | |
1316 | * Verify firmware checksum. | |
1317 | * | |
1318 | * Input: | |
1319 | * ha = adapter block pointer. | |
1320 | * TARGET_QUEUE_LOCK must be released. | |
1321 | * ADAPTER_STATE_LOCK must be released. | |
1322 | * | |
1323 | * Returns: | |
1324 | * qla2x00 local function return status code. | |
1325 | * | |
1326 | * Context: | |
1327 | * Kernel context. | |
1328 | */ | |
1329 | int | |
7b867cf7 | 1330 | qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr) |
1da177e4 LT |
1331 | { |
1332 | int rval; | |
1333 | mbx_cmd_t mc; | |
1334 | mbx_cmd_t *mcp = &mc; | |
1335 | ||
5f28d2d7 SK |
1336 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1035, |
1337 | "Entered %s.\n", __func__); | |
1da177e4 LT |
1338 | |
1339 | mcp->mb[0] = MBC_VERIFY_CHECKSUM; | |
1c7c6357 AV |
1340 | mcp->out_mb = MBX_0; |
1341 | mcp->in_mb = MBX_0; | |
7b867cf7 | 1342 | if (IS_FWI2_CAPABLE(vha->hw)) { |
1c7c6357 AV |
1343 | mcp->mb[1] = MSW(risc_addr); |
1344 | mcp->mb[2] = LSW(risc_addr); | |
1345 | mcp->out_mb |= MBX_2|MBX_1; | |
1346 | mcp->in_mb |= MBX_2|MBX_1; | |
1347 | } else { | |
1348 | mcp->mb[1] = LSW(risc_addr); | |
1349 | mcp->out_mb |= MBX_1; | |
1350 | mcp->in_mb |= MBX_1; | |
1351 | } | |
1352 | ||
b93480e3 | 1353 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 1354 | mcp->flags = 0; |
7b867cf7 | 1355 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
1356 | |
1357 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
1358 | ql_dbg(ql_dbg_mbx, vha, 0x1036, |
1359 | "Failed=%x chm sum=%x.\n", rval, IS_FWI2_CAPABLE(vha->hw) ? | |
1360 | (mcp->mb[2] << 16) | mcp->mb[1] : mcp->mb[1]); | |
1da177e4 | 1361 | } else { |
5f28d2d7 SK |
1362 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1037, |
1363 | "Done %s.\n", __func__); | |
1da177e4 LT |
1364 | } |
1365 | ||
1366 | return rval; | |
1367 | } | |
1368 | ||
1369 | /* | |
1370 | * qla2x00_issue_iocb | |
1371 | * Issue IOCB using mailbox command | |
1372 | * | |
1373 | * Input: | |
1374 | * ha = adapter state pointer. | |
1375 | * buffer = buffer pointer. | |
1376 | * phys_addr = physical address of buffer. | |
1377 | * size = size of buffer. | |
1378 | * TARGET_QUEUE_LOCK must be released. | |
1379 | * ADAPTER_STATE_LOCK must be released. | |
1380 | * | |
1381 | * Returns: | |
1382 | * qla2x00 local function return status code. | |
1383 | * | |
1384 | * Context: | |
1385 | * Kernel context. | |
1386 | */ | |
6e98016c | 1387 | int |
7b867cf7 | 1388 | qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer, |
4d4df193 | 1389 | dma_addr_t phys_addr, size_t size, uint32_t tov) |
1da177e4 LT |
1390 | { |
1391 | int rval; | |
1392 | mbx_cmd_t mc; | |
1393 | mbx_cmd_t *mcp = &mc; | |
1394 | ||
5f28d2d7 SK |
1395 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1038, |
1396 | "Entered %s.\n", __func__); | |
7c3df132 | 1397 | |
1da177e4 LT |
1398 | mcp->mb[0] = MBC_IOCB_COMMAND_A64; |
1399 | mcp->mb[1] = 0; | |
1400 | mcp->mb[2] = MSW(phys_addr); | |
1401 | mcp->mb[3] = LSW(phys_addr); | |
1402 | mcp->mb[6] = MSW(MSD(phys_addr)); | |
1403 | mcp->mb[7] = LSW(MSD(phys_addr)); | |
1404 | mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; | |
1405 | mcp->in_mb = MBX_2|MBX_0; | |
4d4df193 | 1406 | mcp->tov = tov; |
1da177e4 | 1407 | mcp->flags = 0; |
7b867cf7 | 1408 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
1409 | |
1410 | if (rval != QLA_SUCCESS) { | |
1411 | /*EMPTY*/ | |
7c3df132 | 1412 | ql_dbg(ql_dbg_mbx, vha, 0x1039, "Failed=%x.\n", rval); |
1da177e4 | 1413 | } else { |
8c958a99 AV |
1414 | sts_entry_t *sts_entry = (sts_entry_t *) buffer; |
1415 | ||
1416 | /* Mask reserved bits. */ | |
1417 | sts_entry->entry_status &= | |
7b867cf7 | 1418 | IS_FWI2_CAPABLE(vha->hw) ? RF_MASK_24XX : RF_MASK; |
5f28d2d7 SK |
1419 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103a, |
1420 | "Done %s.\n", __func__); | |
1da177e4 LT |
1421 | } |
1422 | ||
1423 | return rval; | |
1424 | } | |
1425 | ||
4d4df193 | 1426 | int |
7b867cf7 | 1427 | qla2x00_issue_iocb(scsi_qla_host_t *vha, void *buffer, dma_addr_t phys_addr, |
4d4df193 HK |
1428 | size_t size) |
1429 | { | |
7b867cf7 | 1430 | return qla2x00_issue_iocb_timeout(vha, buffer, phys_addr, size, |
4d4df193 HK |
1431 | MBX_TOV_SECONDS); |
1432 | } | |
1433 | ||
1da177e4 LT |
1434 | /* |
1435 | * qla2x00_abort_command | |
1436 | * Abort command aborts a specified IOCB. | |
1437 | * | |
1438 | * Input: | |
1439 | * ha = adapter block pointer. | |
1440 | * sp = SB structure pointer. | |
1441 | * | |
1442 | * Returns: | |
1443 | * qla2x00 local function return status code. | |
1444 | * | |
1445 | * Context: | |
1446 | * Kernel context. | |
1447 | */ | |
1448 | int | |
2afa19a9 | 1449 | qla2x00_abort_command(srb_t *sp) |
1da177e4 LT |
1450 | { |
1451 | unsigned long flags = 0; | |
1da177e4 | 1452 | int rval; |
73208dfd | 1453 | uint32_t handle = 0; |
1da177e4 LT |
1454 | mbx_cmd_t mc; |
1455 | mbx_cmd_t *mcp = &mc; | |
2afa19a9 AC |
1456 | fc_port_t *fcport = sp->fcport; |
1457 | scsi_qla_host_t *vha = fcport->vha; | |
7b867cf7 | 1458 | struct qla_hw_data *ha = vha->hw; |
d7459527 | 1459 | struct req_que *req; |
9ba56b95 | 1460 | struct scsi_cmnd *cmd = GET_CMD_SP(sp); |
1da177e4 | 1461 | |
5f28d2d7 SK |
1462 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103b, |
1463 | "Entered %s.\n", __func__); | |
1da177e4 | 1464 | |
d7459527 MH |
1465 | if (vha->flags.qpairs_available && sp->qpair) |
1466 | req = sp->qpair->req; | |
1467 | else | |
1468 | req = vha->req; | |
1469 | ||
c9c5ced9 | 1470 | spin_lock_irqsave(&ha->hardware_lock, flags); |
8d93f550 | 1471 | for (handle = 1; handle < req->num_outstanding_cmds; handle++) { |
7b867cf7 | 1472 | if (req->outstanding_cmds[handle] == sp) |
1da177e4 LT |
1473 | break; |
1474 | } | |
c9c5ced9 | 1475 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
1da177e4 | 1476 | |
8d93f550 | 1477 | if (handle == req->num_outstanding_cmds) { |
1da177e4 LT |
1478 | /* command not found */ |
1479 | return QLA_FUNCTION_FAILED; | |
1480 | } | |
1481 | ||
1482 | mcp->mb[0] = MBC_ABORT_COMMAND; | |
1483 | if (HAS_EXTENDED_IDS(ha)) | |
1484 | mcp->mb[1] = fcport->loop_id; | |
1485 | else | |
1486 | mcp->mb[1] = fcport->loop_id << 8; | |
1487 | mcp->mb[2] = (uint16_t)handle; | |
1488 | mcp->mb[3] = (uint16_t)(handle >> 16); | |
9ba56b95 | 1489 | mcp->mb[6] = (uint16_t)cmd->device->lun; |
1da177e4 LT |
1490 | mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; |
1491 | mcp->in_mb = MBX_0; | |
b93480e3 | 1492 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 1493 | mcp->flags = 0; |
7b867cf7 | 1494 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
1495 | |
1496 | if (rval != QLA_SUCCESS) { | |
7c3df132 | 1497 | ql_dbg(ql_dbg_mbx, vha, 0x103c, "Failed=%x.\n", rval); |
1da177e4 | 1498 | } else { |
5f28d2d7 SK |
1499 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103d, |
1500 | "Done %s.\n", __func__); | |
1da177e4 LT |
1501 | } |
1502 | ||
1503 | return rval; | |
1504 | } | |
1505 | ||
1da177e4 | 1506 | int |
9cb78c16 | 1507 | qla2x00_abort_target(struct fc_port *fcport, uint64_t l, int tag) |
1da177e4 | 1508 | { |
523ec773 | 1509 | int rval, rval2; |
1da177e4 LT |
1510 | mbx_cmd_t mc; |
1511 | mbx_cmd_t *mcp = &mc; | |
7b867cf7 | 1512 | scsi_qla_host_t *vha; |
73208dfd AC |
1513 | struct req_que *req; |
1514 | struct rsp_que *rsp; | |
1da177e4 | 1515 | |
7b867cf7 | 1516 | vha = fcport->vha; |
7c3df132 | 1517 | |
5f28d2d7 SK |
1518 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103e, |
1519 | "Entered %s.\n", __func__); | |
7c3df132 | 1520 | |
7e2b895b GM |
1521 | req = vha->hw->req_q_map[0]; |
1522 | rsp = req->rsp; | |
1da177e4 | 1523 | mcp->mb[0] = MBC_ABORT_TARGET; |
523ec773 | 1524 | mcp->out_mb = MBX_9|MBX_2|MBX_1|MBX_0; |
7b867cf7 | 1525 | if (HAS_EXTENDED_IDS(vha->hw)) { |
1da177e4 LT |
1526 | mcp->mb[1] = fcport->loop_id; |
1527 | mcp->mb[10] = 0; | |
1528 | mcp->out_mb |= MBX_10; | |
1529 | } else { | |
1530 | mcp->mb[1] = fcport->loop_id << 8; | |
1531 | } | |
7b867cf7 AC |
1532 | mcp->mb[2] = vha->hw->loop_reset_delay; |
1533 | mcp->mb[9] = vha->vp_idx; | |
1da177e4 LT |
1534 | |
1535 | mcp->in_mb = MBX_0; | |
b93480e3 | 1536 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 1537 | mcp->flags = 0; |
7b867cf7 | 1538 | rval = qla2x00_mailbox_command(vha, mcp); |
523ec773 | 1539 | if (rval != QLA_SUCCESS) { |
5f28d2d7 SK |
1540 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103f, |
1541 | "Failed=%x.\n", rval); | |
523ec773 AV |
1542 | } |
1543 | ||
1544 | /* Issue marker IOCB. */ | |
73208dfd AC |
1545 | rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, 0, |
1546 | MK_SYNC_ID); | |
523ec773 | 1547 | if (rval2 != QLA_SUCCESS) { |
7c3df132 SK |
1548 | ql_dbg(ql_dbg_mbx, vha, 0x1040, |
1549 | "Failed to issue marker IOCB (%x).\n", rval2); | |
523ec773 | 1550 | } else { |
5f28d2d7 SK |
1551 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1041, |
1552 | "Done %s.\n", __func__); | |
523ec773 AV |
1553 | } |
1554 | ||
1555 | return rval; | |
1556 | } | |
1557 | ||
1558 | int | |
9cb78c16 | 1559 | qla2x00_lun_reset(struct fc_port *fcport, uint64_t l, int tag) |
523ec773 AV |
1560 | { |
1561 | int rval, rval2; | |
1562 | mbx_cmd_t mc; | |
1563 | mbx_cmd_t *mcp = &mc; | |
7b867cf7 | 1564 | scsi_qla_host_t *vha; |
73208dfd AC |
1565 | struct req_que *req; |
1566 | struct rsp_que *rsp; | |
523ec773 | 1567 | |
7b867cf7 | 1568 | vha = fcport->vha; |
7c3df132 | 1569 | |
5f28d2d7 SK |
1570 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1042, |
1571 | "Entered %s.\n", __func__); | |
7c3df132 | 1572 | |
7e2b895b GM |
1573 | req = vha->hw->req_q_map[0]; |
1574 | rsp = req->rsp; | |
523ec773 AV |
1575 | mcp->mb[0] = MBC_LUN_RESET; |
1576 | mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0; | |
7b867cf7 | 1577 | if (HAS_EXTENDED_IDS(vha->hw)) |
523ec773 AV |
1578 | mcp->mb[1] = fcport->loop_id; |
1579 | else | |
1580 | mcp->mb[1] = fcport->loop_id << 8; | |
9cb78c16 | 1581 | mcp->mb[2] = (u32)l; |
523ec773 | 1582 | mcp->mb[3] = 0; |
7b867cf7 | 1583 | mcp->mb[9] = vha->vp_idx; |
1da177e4 | 1584 | |
523ec773 | 1585 | mcp->in_mb = MBX_0; |
b93480e3 | 1586 | mcp->tov = MBX_TOV_SECONDS; |
523ec773 | 1587 | mcp->flags = 0; |
7b867cf7 | 1588 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 | 1589 | if (rval != QLA_SUCCESS) { |
7c3df132 | 1590 | ql_dbg(ql_dbg_mbx, vha, 0x1043, "Failed=%x.\n", rval); |
523ec773 AV |
1591 | } |
1592 | ||
1593 | /* Issue marker IOCB. */ | |
73208dfd AC |
1594 | rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l, |
1595 | MK_SYNC_ID_LUN); | |
523ec773 | 1596 | if (rval2 != QLA_SUCCESS) { |
7c3df132 SK |
1597 | ql_dbg(ql_dbg_mbx, vha, 0x1044, |
1598 | "Failed to issue marker IOCB (%x).\n", rval2); | |
1da177e4 | 1599 | } else { |
5f28d2d7 SK |
1600 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1045, |
1601 | "Done %s.\n", __func__); | |
1da177e4 LT |
1602 | } |
1603 | ||
1604 | return rval; | |
1605 | } | |
1da177e4 | 1606 | |
1da177e4 LT |
1607 | /* |
1608 | * qla2x00_get_adapter_id | |
1609 | * Get adapter ID and topology. | |
1610 | * | |
1611 | * Input: | |
1612 | * ha = adapter block pointer. | |
1613 | * id = pointer for loop ID. | |
1614 | * al_pa = pointer for AL_PA. | |
1615 | * area = pointer for area. | |
1616 | * domain = pointer for domain. | |
1617 | * top = pointer for topology. | |
1618 | * TARGET_QUEUE_LOCK must be released. | |
1619 | * ADAPTER_STATE_LOCK must be released. | |
1620 | * | |
1621 | * Returns: | |
1622 | * qla2x00 local function return status code. | |
1623 | * | |
1624 | * Context: | |
1625 | * Kernel context. | |
1626 | */ | |
1627 | int | |
7b867cf7 | 1628 | qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa, |
2c3dfe3f | 1629 | uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap) |
1da177e4 LT |
1630 | { |
1631 | int rval; | |
1632 | mbx_cmd_t mc; | |
1633 | mbx_cmd_t *mcp = &mc; | |
1634 | ||
5f28d2d7 SK |
1635 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1046, |
1636 | "Entered %s.\n", __func__); | |
1da177e4 LT |
1637 | |
1638 | mcp->mb[0] = MBC_GET_ADAPTER_LOOP_ID; | |
7b867cf7 | 1639 | mcp->mb[9] = vha->vp_idx; |
eb66dc60 | 1640 | mcp->out_mb = MBX_9|MBX_0; |
2c3dfe3f | 1641 | mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; |
6246b8a1 | 1642 | if (IS_CNA_CAPABLE(vha->hw)) |
bad7001c | 1643 | mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10; |
7c9c4766 JC |
1644 | if (IS_FWI2_CAPABLE(vha->hw)) |
1645 | mcp->in_mb |= MBX_19|MBX_18|MBX_17|MBX_16; | |
969a6199 SC |
1646 | if (IS_QLA27XX(vha->hw)) |
1647 | mcp->in_mb |= MBX_15; | |
b93480e3 | 1648 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 1649 | mcp->flags = 0; |
7b867cf7 | 1650 | rval = qla2x00_mailbox_command(vha, mcp); |
33135aa2 RA |
1651 | if (mcp->mb[0] == MBS_COMMAND_ERROR) |
1652 | rval = QLA_COMMAND_ERROR; | |
42e421b1 AV |
1653 | else if (mcp->mb[0] == MBS_INVALID_COMMAND) |
1654 | rval = QLA_INVALID_COMMAND; | |
1da177e4 LT |
1655 | |
1656 | /* Return data. */ | |
1657 | *id = mcp->mb[1]; | |
1658 | *al_pa = LSB(mcp->mb[2]); | |
1659 | *area = MSB(mcp->mb[2]); | |
1660 | *domain = LSB(mcp->mb[3]); | |
1661 | *top = mcp->mb[6]; | |
2c3dfe3f | 1662 | *sw_cap = mcp->mb[7]; |
1da177e4 LT |
1663 | |
1664 | if (rval != QLA_SUCCESS) { | |
1665 | /*EMPTY*/ | |
7c3df132 | 1666 | ql_dbg(ql_dbg_mbx, vha, 0x1047, "Failed=%x.\n", rval); |
1da177e4 | 1667 | } else { |
5f28d2d7 SK |
1668 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1048, |
1669 | "Done %s.\n", __func__); | |
bad7001c | 1670 | |
6246b8a1 | 1671 | if (IS_CNA_CAPABLE(vha->hw)) { |
bad7001c AV |
1672 | vha->fcoe_vlan_id = mcp->mb[9] & 0xfff; |
1673 | vha->fcoe_fcf_idx = mcp->mb[10]; | |
1674 | vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8; | |
1675 | vha->fcoe_vn_port_mac[4] = mcp->mb[11] & 0xff; | |
1676 | vha->fcoe_vn_port_mac[3] = mcp->mb[12] >> 8; | |
1677 | vha->fcoe_vn_port_mac[2] = mcp->mb[12] & 0xff; | |
1678 | vha->fcoe_vn_port_mac[1] = mcp->mb[13] >> 8; | |
1679 | vha->fcoe_vn_port_mac[0] = mcp->mb[13] & 0xff; | |
1680 | } | |
7c9c4766 | 1681 | /* If FA-WWN supported */ |
d6b9b42b SK |
1682 | if (IS_FAWWN_CAPABLE(vha->hw)) { |
1683 | if (mcp->mb[7] & BIT_14) { | |
1684 | vha->port_name[0] = MSB(mcp->mb[16]); | |
1685 | vha->port_name[1] = LSB(mcp->mb[16]); | |
1686 | vha->port_name[2] = MSB(mcp->mb[17]); | |
1687 | vha->port_name[3] = LSB(mcp->mb[17]); | |
1688 | vha->port_name[4] = MSB(mcp->mb[18]); | |
1689 | vha->port_name[5] = LSB(mcp->mb[18]); | |
1690 | vha->port_name[6] = MSB(mcp->mb[19]); | |
1691 | vha->port_name[7] = LSB(mcp->mb[19]); | |
1692 | fc_host_port_name(vha->host) = | |
1693 | wwn_to_u64(vha->port_name); | |
1694 | ql_dbg(ql_dbg_mbx, vha, 0x10ca, | |
1695 | "FA-WWN acquired %016llx\n", | |
1696 | wwn_to_u64(vha->port_name)); | |
1697 | } | |
7c9c4766 | 1698 | } |
969a6199 SC |
1699 | |
1700 | if (IS_QLA27XX(vha->hw)) | |
1701 | vha->bbcr = mcp->mb[15]; | |
1da177e4 LT |
1702 | } |
1703 | ||
1704 | return rval; | |
1705 | } | |
1706 | ||
1707 | /* | |
1708 | * qla2x00_get_retry_cnt | |
1709 | * Get current firmware login retry count and delay. | |
1710 | * | |
1711 | * Input: | |
1712 | * ha = adapter block pointer. | |
1713 | * retry_cnt = pointer to login retry count. | |
1714 | * tov = pointer to login timeout value. | |
1715 | * | |
1716 | * Returns: | |
1717 | * qla2x00 local function return status code. | |
1718 | * | |
1719 | * Context: | |
1720 | * Kernel context. | |
1721 | */ | |
1722 | int | |
7b867cf7 | 1723 | qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov, |
1da177e4 LT |
1724 | uint16_t *r_a_tov) |
1725 | { | |
1726 | int rval; | |
1727 | uint16_t ratov; | |
1728 | mbx_cmd_t mc; | |
1729 | mbx_cmd_t *mcp = &mc; | |
1730 | ||
5f28d2d7 SK |
1731 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1049, |
1732 | "Entered %s.\n", __func__); | |
1da177e4 LT |
1733 | |
1734 | mcp->mb[0] = MBC_GET_RETRY_COUNT; | |
1735 | mcp->out_mb = MBX_0; | |
1736 | mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0; | |
b93480e3 | 1737 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 1738 | mcp->flags = 0; |
7b867cf7 | 1739 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
1740 | |
1741 | if (rval != QLA_SUCCESS) { | |
1742 | /*EMPTY*/ | |
7c3df132 SK |
1743 | ql_dbg(ql_dbg_mbx, vha, 0x104a, |
1744 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
1da177e4 LT |
1745 | } else { |
1746 | /* Convert returned data and check our values. */ | |
1747 | *r_a_tov = mcp->mb[3] / 2; | |
1748 | ratov = (mcp->mb[3]/2) / 10; /* mb[3] value is in 100ms */ | |
1749 | if (mcp->mb[1] * ratov > (*retry_cnt) * (*tov)) { | |
1750 | /* Update to the larger values */ | |
1751 | *retry_cnt = (uint8_t)mcp->mb[1]; | |
1752 | *tov = ratov; | |
1753 | } | |
1754 | ||
5f28d2d7 | 1755 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104b, |
7c3df132 | 1756 | "Done %s mb3=%d ratov=%d.\n", __func__, mcp->mb[3], ratov); |
1da177e4 LT |
1757 | } |
1758 | ||
1759 | return rval; | |
1760 | } | |
1761 | ||
1762 | /* | |
1763 | * qla2x00_init_firmware | |
1764 | * Initialize adapter firmware. | |
1765 | * | |
1766 | * Input: | |
1767 | * ha = adapter block pointer. | |
1768 | * dptr = Initialization control block pointer. | |
1769 | * size = size of initialization control block. | |
1770 | * TARGET_QUEUE_LOCK must be released. | |
1771 | * ADAPTER_STATE_LOCK must be released. | |
1772 | * | |
1773 | * Returns: | |
1774 | * qla2x00 local function return status code. | |
1775 | * | |
1776 | * Context: | |
1777 | * Kernel context. | |
1778 | */ | |
1779 | int | |
7b867cf7 | 1780 | qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size) |
1da177e4 LT |
1781 | { |
1782 | int rval; | |
1783 | mbx_cmd_t mc; | |
1784 | mbx_cmd_t *mcp = &mc; | |
7b867cf7 | 1785 | struct qla_hw_data *ha = vha->hw; |
1da177e4 | 1786 | |
5f28d2d7 SK |
1787 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104c, |
1788 | "Entered %s.\n", __func__); | |
1da177e4 | 1789 | |
7ec0effd | 1790 | if (IS_P3P_TYPE(ha) && ql2xdbwr) |
8dfa4b5a | 1791 | qla82xx_wr_32(ha, (uintptr_t __force)ha->nxdb_wr_ptr, |
a9083016 GM |
1792 | (0x04 | (ha->portnum << 5) | (0 << 8) | (0 << 16))); |
1793 | ||
e6e074f1 | 1794 | if (ha->flags.npiv_supported) |
2c3dfe3f SJ |
1795 | mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE; |
1796 | else | |
1797 | mcp->mb[0] = MBC_INITIALIZE_FIRMWARE; | |
1798 | ||
b64b0e8f | 1799 | mcp->mb[1] = 0; |
1da177e4 LT |
1800 | mcp->mb[2] = MSW(ha->init_cb_dma); |
1801 | mcp->mb[3] = LSW(ha->init_cb_dma); | |
1da177e4 LT |
1802 | mcp->mb[6] = MSW(MSD(ha->init_cb_dma)); |
1803 | mcp->mb[7] = LSW(MSD(ha->init_cb_dma)); | |
b64b0e8f | 1804 | mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; |
4ef21bd4 | 1805 | if (ha->ex_init_cb && ha->ex_init_cb->ex_version) { |
b64b0e8f AV |
1806 | mcp->mb[1] = BIT_0; |
1807 | mcp->mb[10] = MSW(ha->ex_init_cb_dma); | |
1808 | mcp->mb[11] = LSW(ha->ex_init_cb_dma); | |
1809 | mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma)); | |
1810 | mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma)); | |
1811 | mcp->mb[14] = sizeof(*ha->ex_init_cb); | |
1812 | mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10; | |
1813 | } | |
6246b8a1 GM |
1814 | /* 1 and 2 should normally be captured. */ |
1815 | mcp->in_mb = MBX_2|MBX_1|MBX_0; | |
f73cb695 | 1816 | if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) |
6246b8a1 GM |
1817 | /* mb3 is additional info about the installed SFP. */ |
1818 | mcp->in_mb |= MBX_3; | |
1da177e4 LT |
1819 | mcp->buf_size = size; |
1820 | mcp->flags = MBX_DMA_OUT; | |
b93480e3 | 1821 | mcp->tov = MBX_TOV_SECONDS; |
7b867cf7 | 1822 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
1823 | |
1824 | if (rval != QLA_SUCCESS) { | |
1825 | /*EMPTY*/ | |
7c3df132 | 1826 | ql_dbg(ql_dbg_mbx, vha, 0x104d, |
6246b8a1 GM |
1827 | "Failed=%x mb[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x,.\n", |
1828 | rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3]); | |
1da177e4 | 1829 | } else { |
92d4408e SC |
1830 | if (IS_QLA27XX(ha)) { |
1831 | if (mcp->mb[2] == 6 || mcp->mb[3] == 2) | |
1832 | ql_dbg(ql_dbg_mbx, vha, 0x119d, | |
1833 | "Invalid SFP/Validation Failed\n"); | |
1834 | } | |
5f28d2d7 SK |
1835 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104e, |
1836 | "Done %s.\n", __func__); | |
1da177e4 LT |
1837 | } |
1838 | ||
1839 | return rval; | |
1840 | } | |
1841 | ||
2d70c103 | 1842 | |
1da177e4 LT |
1843 | /* |
1844 | * qla2x00_get_port_database | |
1845 | * Issue normal/enhanced get port database mailbox command | |
1846 | * and copy device name as necessary. | |
1847 | * | |
1848 | * Input: | |
1849 | * ha = adapter state pointer. | |
1850 | * dev = structure pointer. | |
1851 | * opt = enhanced cmd option byte. | |
1852 | * | |
1853 | * Returns: | |
1854 | * qla2x00 local function return status code. | |
1855 | * | |
1856 | * Context: | |
1857 | * Kernel context. | |
1858 | */ | |
1859 | int | |
7b867cf7 | 1860 | qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt) |
1da177e4 LT |
1861 | { |
1862 | int rval; | |
1863 | mbx_cmd_t mc; | |
1864 | mbx_cmd_t *mcp = &mc; | |
1865 | port_database_t *pd; | |
1c7c6357 | 1866 | struct port_database_24xx *pd24; |
1da177e4 | 1867 | dma_addr_t pd_dma; |
7b867cf7 | 1868 | struct qla_hw_data *ha = vha->hw; |
1da177e4 | 1869 | |
5f28d2d7 SK |
1870 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104f, |
1871 | "Entered %s.\n", __func__); | |
1da177e4 | 1872 | |
1c7c6357 | 1873 | pd24 = NULL; |
08eb7f45 | 1874 | pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); |
1da177e4 | 1875 | if (pd == NULL) { |
7c3df132 SK |
1876 | ql_log(ql_log_warn, vha, 0x1050, |
1877 | "Failed to allocate port database structure.\n"); | |
edd05de1 | 1878 | fcport->query = 0; |
1da177e4 LT |
1879 | return QLA_MEMORY_ALLOC_FAILED; |
1880 | } | |
1da177e4 | 1881 | |
1c7c6357 | 1882 | mcp->mb[0] = MBC_GET_PORT_DATABASE; |
e428924c | 1883 | if (opt != 0 && !IS_FWI2_CAPABLE(ha)) |
1da177e4 | 1884 | mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE; |
1da177e4 LT |
1885 | mcp->mb[2] = MSW(pd_dma); |
1886 | mcp->mb[3] = LSW(pd_dma); | |
1887 | mcp->mb[6] = MSW(MSD(pd_dma)); | |
1888 | mcp->mb[7] = LSW(MSD(pd_dma)); | |
7b867cf7 | 1889 | mcp->mb[9] = vha->vp_idx; |
2c3dfe3f | 1890 | mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0; |
1da177e4 | 1891 | mcp->in_mb = MBX_0; |
e428924c | 1892 | if (IS_FWI2_CAPABLE(ha)) { |
1c7c6357 AV |
1893 | mcp->mb[1] = fcport->loop_id; |
1894 | mcp->mb[10] = opt; | |
1895 | mcp->out_mb |= MBX_10|MBX_1; | |
1896 | mcp->in_mb |= MBX_1; | |
1897 | } else if (HAS_EXTENDED_IDS(ha)) { | |
1898 | mcp->mb[1] = fcport->loop_id; | |
1899 | mcp->mb[10] = opt; | |
1900 | mcp->out_mb |= MBX_10|MBX_1; | |
1901 | } else { | |
1902 | mcp->mb[1] = fcport->loop_id << 8 | opt; | |
1903 | mcp->out_mb |= MBX_1; | |
1904 | } | |
e428924c AV |
1905 | mcp->buf_size = IS_FWI2_CAPABLE(ha) ? |
1906 | PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE; | |
1da177e4 LT |
1907 | mcp->flags = MBX_DMA_IN; |
1908 | mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2); | |
7b867cf7 | 1909 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
1910 | if (rval != QLA_SUCCESS) |
1911 | goto gpd_error_out; | |
1912 | ||
e428924c | 1913 | if (IS_FWI2_CAPABLE(ha)) { |
0eba25df | 1914 | uint64_t zero = 0; |
c0c462c8 DG |
1915 | u8 current_login_state, last_login_state; |
1916 | ||
1c7c6357 AV |
1917 | pd24 = (struct port_database_24xx *) pd; |
1918 | ||
1919 | /* Check for logged in state. */ | |
c0c462c8 DG |
1920 | if (fcport->fc4f_nvme) { |
1921 | current_login_state = pd24->current_login_state >> 4; | |
1922 | last_login_state = pd24->last_login_state >> 4; | |
1923 | } else { | |
1924 | current_login_state = pd24->current_login_state & 0xf; | |
1925 | last_login_state = pd24->last_login_state & 0xf; | |
1926 | } | |
1927 | fcport->current_login_state = pd24->current_login_state; | |
1928 | fcport->last_login_state = pd24->last_login_state; | |
1929 | ||
1930 | /* Check for logged in state. */ | |
1931 | if (current_login_state != PDS_PRLI_COMPLETE && | |
1932 | last_login_state != PDS_PRLI_COMPLETE) { | |
1933 | ql_dbg(ql_dbg_mbx, vha, 0x119a, | |
1934 | "Unable to verify login-state (%x/%x) for loop_id %x.\n", | |
1935 | current_login_state, last_login_state, | |
1936 | fcport->loop_id); | |
1c7c6357 | 1937 | rval = QLA_FUNCTION_FAILED; |
c0c462c8 DG |
1938 | |
1939 | if (!fcport->query) | |
1940 | goto gpd_error_out; | |
1c7c6357 | 1941 | } |
1da177e4 | 1942 | |
0eba25df AE |
1943 | if (fcport->loop_id == FC_NO_LOOP_ID || |
1944 | (memcmp(fcport->port_name, (uint8_t *)&zero, 8) && | |
1945 | memcmp(fcport->port_name, pd24->port_name, 8))) { | |
1946 | /* We lost the device mid way. */ | |
1947 | rval = QLA_NOT_LOGGED_IN; | |
1948 | goto gpd_error_out; | |
1949 | } | |
1950 | ||
1c7c6357 AV |
1951 | /* Names are little-endian. */ |
1952 | memcpy(fcport->node_name, pd24->node_name, WWN_SIZE); | |
1953 | memcpy(fcport->port_name, pd24->port_name, WWN_SIZE); | |
1954 | ||
1955 | /* Get port_id of device. */ | |
1956 | fcport->d_id.b.domain = pd24->port_id[0]; | |
1957 | fcport->d_id.b.area = pd24->port_id[1]; | |
1958 | fcport->d_id.b.al_pa = pd24->port_id[2]; | |
1959 | fcport->d_id.b.rsvd_1 = 0; | |
1960 | ||
1961 | /* If not target must be initiator or unknown type. */ | |
1962 | if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0) | |
1963 | fcport->port_type = FCT_INITIATOR; | |
1964 | else | |
1965 | fcport->port_type = FCT_TARGET; | |
2d70c103 NB |
1966 | |
1967 | /* Passback COS information. */ | |
1968 | fcport->supported_classes = (pd24->flags & PDF_CLASS_2) ? | |
1969 | FC_COS_CLASS2 : FC_COS_CLASS3; | |
1970 | ||
1971 | if (pd24->prli_svc_param_word_3[0] & BIT_7) | |
1972 | fcport->flags |= FCF_CONF_COMP_SUPPORTED; | |
1c7c6357 | 1973 | } else { |
0eba25df AE |
1974 | uint64_t zero = 0; |
1975 | ||
1c7c6357 AV |
1976 | /* Check for logged in state. */ |
1977 | if (pd->master_state != PD_STATE_PORT_LOGGED_IN && | |
1978 | pd->slave_state != PD_STATE_PORT_LOGGED_IN) { | |
7c3df132 SK |
1979 | ql_dbg(ql_dbg_mbx, vha, 0x100a, |
1980 | "Unable to verify login-state (%x/%x) - " | |
1981 | "portid=%02x%02x%02x.\n", pd->master_state, | |
1982 | pd->slave_state, fcport->d_id.b.domain, | |
1983 | fcport->d_id.b.area, fcport->d_id.b.al_pa); | |
1c7c6357 AV |
1984 | rval = QLA_FUNCTION_FAILED; |
1985 | goto gpd_error_out; | |
1986 | } | |
1da177e4 | 1987 | |
0eba25df AE |
1988 | if (fcport->loop_id == FC_NO_LOOP_ID || |
1989 | (memcmp(fcport->port_name, (uint8_t *)&zero, 8) && | |
1990 | memcmp(fcport->port_name, pd->port_name, 8))) { | |
1991 | /* We lost the device mid way. */ | |
1992 | rval = QLA_NOT_LOGGED_IN; | |
1993 | goto gpd_error_out; | |
1994 | } | |
1995 | ||
1c7c6357 AV |
1996 | /* Names are little-endian. */ |
1997 | memcpy(fcport->node_name, pd->node_name, WWN_SIZE); | |
1998 | memcpy(fcport->port_name, pd->port_name, WWN_SIZE); | |
1999 | ||
2000 | /* Get port_id of device. */ | |
2001 | fcport->d_id.b.domain = pd->port_id[0]; | |
2002 | fcport->d_id.b.area = pd->port_id[3]; | |
2003 | fcport->d_id.b.al_pa = pd->port_id[2]; | |
2004 | fcport->d_id.b.rsvd_1 = 0; | |
2005 | ||
1c7c6357 AV |
2006 | /* If not target must be initiator or unknown type. */ |
2007 | if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0) | |
2008 | fcport->port_type = FCT_INITIATOR; | |
2009 | else | |
2010 | fcport->port_type = FCT_TARGET; | |
ad3e0eda AV |
2011 | |
2012 | /* Passback COS information. */ | |
2013 | fcport->supported_classes = (pd->options & BIT_4) ? | |
2014 | FC_COS_CLASS2: FC_COS_CLASS3; | |
1c7c6357 | 2015 | } |
1da177e4 LT |
2016 | |
2017 | gpd_error_out: | |
2018 | dma_pool_free(ha->s_dma_pool, pd, pd_dma); | |
edd05de1 | 2019 | fcport->query = 0; |
1da177e4 LT |
2020 | |
2021 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
2022 | ql_dbg(ql_dbg_mbx, vha, 0x1052, |
2023 | "Failed=%x mb[0]=%x mb[1]=%x.\n", rval, | |
2024 | mcp->mb[0], mcp->mb[1]); | |
1da177e4 | 2025 | } else { |
5f28d2d7 SK |
2026 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1053, |
2027 | "Done %s.\n", __func__); | |
1da177e4 LT |
2028 | } |
2029 | ||
2030 | return rval; | |
2031 | } | |
2032 | ||
2033 | /* | |
2034 | * qla2x00_get_firmware_state | |
2035 | * Get adapter firmware state. | |
2036 | * | |
2037 | * Input: | |
2038 | * ha = adapter block pointer. | |
2039 | * dptr = pointer for firmware state. | |
2040 | * TARGET_QUEUE_LOCK must be released. | |
2041 | * ADAPTER_STATE_LOCK must be released. | |
2042 | * | |
2043 | * Returns: | |
2044 | * qla2x00 local function return status code. | |
2045 | * | |
2046 | * Context: | |
2047 | * Kernel context. | |
2048 | */ | |
2049 | int | |
7b867cf7 | 2050 | qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states) |
1da177e4 LT |
2051 | { |
2052 | int rval; | |
2053 | mbx_cmd_t mc; | |
2054 | mbx_cmd_t *mcp = &mc; | |
92d4408e | 2055 | struct qla_hw_data *ha = vha->hw; |
1da177e4 | 2056 | |
5f28d2d7 SK |
2057 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1054, |
2058 | "Entered %s.\n", __func__); | |
1da177e4 LT |
2059 | |
2060 | mcp->mb[0] = MBC_GET_FIRMWARE_STATE; | |
2061 | mcp->out_mb = MBX_0; | |
9d2683c0 | 2062 | if (IS_FWI2_CAPABLE(vha->hw)) |
b5a340dd | 2063 | mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; |
9d2683c0 AV |
2064 | else |
2065 | mcp->in_mb = MBX_1|MBX_0; | |
b93480e3 | 2066 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 2067 | mcp->flags = 0; |
7b867cf7 | 2068 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 | 2069 | |
4d4df193 HK |
2070 | /* Return firmware states. */ |
2071 | states[0] = mcp->mb[1]; | |
9d2683c0 AV |
2072 | if (IS_FWI2_CAPABLE(vha->hw)) { |
2073 | states[1] = mcp->mb[2]; | |
ec891462 | 2074 | states[2] = mcp->mb[3]; /* SFP info */ |
9d2683c0 AV |
2075 | states[3] = mcp->mb[4]; |
2076 | states[4] = mcp->mb[5]; | |
b5a340dd | 2077 | states[5] = mcp->mb[6]; /* DPORT status */ |
9d2683c0 | 2078 | } |
1da177e4 LT |
2079 | |
2080 | if (rval != QLA_SUCCESS) { | |
2081 | /*EMPTY*/ | |
7c3df132 | 2082 | ql_dbg(ql_dbg_mbx, vha, 0x1055, "Failed=%x.\n", rval); |
1da177e4 | 2083 | } else { |
92d4408e SC |
2084 | if (IS_QLA27XX(ha)) { |
2085 | if (mcp->mb[2] == 6 || mcp->mb[3] == 2) | |
2086 | ql_dbg(ql_dbg_mbx, vha, 0x119e, | |
2087 | "Invalid SFP/Validation Failed\n"); | |
2088 | } | |
5f28d2d7 SK |
2089 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1056, |
2090 | "Done %s.\n", __func__); | |
1da177e4 LT |
2091 | } |
2092 | ||
2093 | return rval; | |
2094 | } | |
2095 | ||
2096 | /* | |
2097 | * qla2x00_get_port_name | |
2098 | * Issue get port name mailbox command. | |
2099 | * Returned name is in big endian format. | |
2100 | * | |
2101 | * Input: | |
2102 | * ha = adapter block pointer. | |
2103 | * loop_id = loop ID of device. | |
2104 | * name = pointer for name. | |
2105 | * TARGET_QUEUE_LOCK must be released. | |
2106 | * ADAPTER_STATE_LOCK must be released. | |
2107 | * | |
2108 | * Returns: | |
2109 | * qla2x00 local function return status code. | |
2110 | * | |
2111 | * Context: | |
2112 | * Kernel context. | |
2113 | */ | |
2114 | int | |
7b867cf7 | 2115 | qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name, |
1da177e4 LT |
2116 | uint8_t opt) |
2117 | { | |
2118 | int rval; | |
2119 | mbx_cmd_t mc; | |
2120 | mbx_cmd_t *mcp = &mc; | |
2121 | ||
5f28d2d7 SK |
2122 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1057, |
2123 | "Entered %s.\n", __func__); | |
1da177e4 LT |
2124 | |
2125 | mcp->mb[0] = MBC_GET_PORT_NAME; | |
7b867cf7 | 2126 | mcp->mb[9] = vha->vp_idx; |
2c3dfe3f | 2127 | mcp->out_mb = MBX_9|MBX_1|MBX_0; |
7b867cf7 | 2128 | if (HAS_EXTENDED_IDS(vha->hw)) { |
1da177e4 LT |
2129 | mcp->mb[1] = loop_id; |
2130 | mcp->mb[10] = opt; | |
2131 | mcp->out_mb |= MBX_10; | |
2132 | } else { | |
2133 | mcp->mb[1] = loop_id << 8 | opt; | |
2134 | } | |
2135 | ||
2136 | mcp->in_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; | |
b93480e3 | 2137 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 2138 | mcp->flags = 0; |
7b867cf7 | 2139 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
2140 | |
2141 | if (rval != QLA_SUCCESS) { | |
2142 | /*EMPTY*/ | |
7c3df132 | 2143 | ql_dbg(ql_dbg_mbx, vha, 0x1058, "Failed=%x.\n", rval); |
1da177e4 LT |
2144 | } else { |
2145 | if (name != NULL) { | |
2146 | /* This function returns name in big endian. */ | |
1196ae02 RL |
2147 | name[0] = MSB(mcp->mb[2]); |
2148 | name[1] = LSB(mcp->mb[2]); | |
2149 | name[2] = MSB(mcp->mb[3]); | |
2150 | name[3] = LSB(mcp->mb[3]); | |
2151 | name[4] = MSB(mcp->mb[6]); | |
2152 | name[5] = LSB(mcp->mb[6]); | |
2153 | name[6] = MSB(mcp->mb[7]); | |
2154 | name[7] = LSB(mcp->mb[7]); | |
1da177e4 LT |
2155 | } |
2156 | ||
5f28d2d7 SK |
2157 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1059, |
2158 | "Done %s.\n", __func__); | |
1da177e4 LT |
2159 | } |
2160 | ||
2161 | return rval; | |
2162 | } | |
2163 | ||
61e1b269 JC |
2164 | /* |
2165 | * qla24xx_link_initialization | |
2166 | * Issue link initialization mailbox command. | |
2167 | * | |
2168 | * Input: | |
2169 | * ha = adapter block pointer. | |
2170 | * TARGET_QUEUE_LOCK must be released. | |
2171 | * ADAPTER_STATE_LOCK must be released. | |
2172 | * | |
2173 | * Returns: | |
2174 | * qla2x00 local function return status code. | |
2175 | * | |
2176 | * Context: | |
2177 | * Kernel context. | |
2178 | */ | |
2179 | int | |
2180 | qla24xx_link_initialize(scsi_qla_host_t *vha) | |
2181 | { | |
2182 | int rval; | |
2183 | mbx_cmd_t mc; | |
2184 | mbx_cmd_t *mcp = &mc; | |
2185 | ||
2186 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1152, | |
2187 | "Entered %s.\n", __func__); | |
2188 | ||
2189 | if (!IS_FWI2_CAPABLE(vha->hw) || IS_CNA_CAPABLE(vha->hw)) | |
2190 | return QLA_FUNCTION_FAILED; | |
2191 | ||
2192 | mcp->mb[0] = MBC_LINK_INITIALIZATION; | |
5a5c27b6 JC |
2193 | mcp->mb[1] = BIT_4; |
2194 | if (vha->hw->operating_mode == LOOP) | |
2195 | mcp->mb[1] |= BIT_6; | |
2196 | else | |
2197 | mcp->mb[1] |= BIT_5; | |
61e1b269 JC |
2198 | mcp->mb[2] = 0; |
2199 | mcp->mb[3] = 0; | |
2200 | mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; | |
2201 | mcp->in_mb = MBX_0; | |
2202 | mcp->tov = MBX_TOV_SECONDS; | |
2203 | mcp->flags = 0; | |
2204 | rval = qla2x00_mailbox_command(vha, mcp); | |
2205 | ||
2206 | if (rval != QLA_SUCCESS) { | |
2207 | ql_dbg(ql_dbg_mbx, vha, 0x1153, "Failed=%x.\n", rval); | |
2208 | } else { | |
2209 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1154, | |
2210 | "Done %s.\n", __func__); | |
2211 | } | |
2212 | ||
2213 | return rval; | |
2214 | } | |
2215 | ||
1da177e4 LT |
2216 | /* |
2217 | * qla2x00_lip_reset | |
2218 | * Issue LIP reset mailbox command. | |
2219 | * | |
2220 | * Input: | |
2221 | * ha = adapter block pointer. | |
2222 | * TARGET_QUEUE_LOCK must be released. | |
2223 | * ADAPTER_STATE_LOCK must be released. | |
2224 | * | |
2225 | * Returns: | |
2226 | * qla2x00 local function return status code. | |
2227 | * | |
2228 | * Context: | |
2229 | * Kernel context. | |
2230 | */ | |
2231 | int | |
7b867cf7 | 2232 | qla2x00_lip_reset(scsi_qla_host_t *vha) |
1da177e4 LT |
2233 | { |
2234 | int rval; | |
2235 | mbx_cmd_t mc; | |
2236 | mbx_cmd_t *mcp = &mc; | |
2237 | ||
5f28d2d7 SK |
2238 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105a, |
2239 | "Entered %s.\n", __func__); | |
1da177e4 | 2240 | |
6246b8a1 | 2241 | if (IS_CNA_CAPABLE(vha->hw)) { |
3a03eb79 AV |
2242 | /* Logout across all FCFs. */ |
2243 | mcp->mb[0] = MBC_LIP_FULL_LOGIN; | |
2244 | mcp->mb[1] = BIT_1; | |
2245 | mcp->mb[2] = 0; | |
2246 | mcp->out_mb = MBX_2|MBX_1|MBX_0; | |
2247 | } else if (IS_FWI2_CAPABLE(vha->hw)) { | |
1c7c6357 | 2248 | mcp->mb[0] = MBC_LIP_FULL_LOGIN; |
48acad09 QT |
2249 | if (N2N_TOPO(vha->hw)) |
2250 | mcp->mb[1] = BIT_4; /* re-init */ | |
2251 | else | |
2252 | mcp->mb[1] = BIT_6; /* LIP */ | |
0c8c39af | 2253 | mcp->mb[2] = 0; |
7b867cf7 | 2254 | mcp->mb[3] = vha->hw->loop_reset_delay; |
1c7c6357 | 2255 | mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; |
1da177e4 | 2256 | } else { |
1c7c6357 AV |
2257 | mcp->mb[0] = MBC_LIP_RESET; |
2258 | mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; | |
7b867cf7 | 2259 | if (HAS_EXTENDED_IDS(vha->hw)) { |
1c7c6357 AV |
2260 | mcp->mb[1] = 0x00ff; |
2261 | mcp->mb[10] = 0; | |
2262 | mcp->out_mb |= MBX_10; | |
2263 | } else { | |
2264 | mcp->mb[1] = 0xff00; | |
2265 | } | |
7b867cf7 | 2266 | mcp->mb[2] = vha->hw->loop_reset_delay; |
1c7c6357 | 2267 | mcp->mb[3] = 0; |
1da177e4 | 2268 | } |
1da177e4 | 2269 | mcp->in_mb = MBX_0; |
b93480e3 | 2270 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 2271 | mcp->flags = 0; |
7b867cf7 | 2272 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
2273 | |
2274 | if (rval != QLA_SUCCESS) { | |
2275 | /*EMPTY*/ | |
7c3df132 | 2276 | ql_dbg(ql_dbg_mbx, vha, 0x105b, "Failed=%x.\n", rval); |
1da177e4 LT |
2277 | } else { |
2278 | /*EMPTY*/ | |
5f28d2d7 SK |
2279 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105c, |
2280 | "Done %s.\n", __func__); | |
1da177e4 LT |
2281 | } |
2282 | ||
2283 | return rval; | |
2284 | } | |
2285 | ||
2286 | /* | |
2287 | * qla2x00_send_sns | |
2288 | * Send SNS command. | |
2289 | * | |
2290 | * Input: | |
2291 | * ha = adapter block pointer. | |
2292 | * sns = pointer for command. | |
2293 | * cmd_size = command size. | |
2294 | * buf_size = response/command size. | |
2295 | * TARGET_QUEUE_LOCK must be released. | |
2296 | * ADAPTER_STATE_LOCK must be released. | |
2297 | * | |
2298 | * Returns: | |
2299 | * qla2x00 local function return status code. | |
2300 | * | |
2301 | * Context: | |
2302 | * Kernel context. | |
2303 | */ | |
2304 | int | |
7b867cf7 | 2305 | qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address, |
1da177e4 LT |
2306 | uint16_t cmd_size, size_t buf_size) |
2307 | { | |
2308 | int rval; | |
2309 | mbx_cmd_t mc; | |
2310 | mbx_cmd_t *mcp = &mc; | |
2311 | ||
5f28d2d7 SK |
2312 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105d, |
2313 | "Entered %s.\n", __func__); | |
1da177e4 | 2314 | |
5f28d2d7 | 2315 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105e, |
7c3df132 SK |
2316 | "Retry cnt=%d ratov=%d total tov=%d.\n", |
2317 | vha->hw->retry_count, vha->hw->login_timeout, mcp->tov); | |
1da177e4 LT |
2318 | |
2319 | mcp->mb[0] = MBC_SEND_SNS_COMMAND; | |
2320 | mcp->mb[1] = cmd_size; | |
2321 | mcp->mb[2] = MSW(sns_phys_address); | |
2322 | mcp->mb[3] = LSW(sns_phys_address); | |
2323 | mcp->mb[6] = MSW(MSD(sns_phys_address)); | |
2324 | mcp->mb[7] = LSW(MSD(sns_phys_address)); | |
2325 | mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; | |
2326 | mcp->in_mb = MBX_0|MBX_1; | |
2327 | mcp->buf_size = buf_size; | |
2328 | mcp->flags = MBX_DMA_OUT|MBX_DMA_IN; | |
7b867cf7 AC |
2329 | mcp->tov = (vha->hw->login_timeout * 2) + (vha->hw->login_timeout / 2); |
2330 | rval = qla2x00_mailbox_command(vha, mcp); | |
1da177e4 LT |
2331 | |
2332 | if (rval != QLA_SUCCESS) { | |
2333 | /*EMPTY*/ | |
7c3df132 SK |
2334 | ql_dbg(ql_dbg_mbx, vha, 0x105f, |
2335 | "Failed=%x mb[0]=%x mb[1]=%x.\n", | |
2336 | rval, mcp->mb[0], mcp->mb[1]); | |
1da177e4 LT |
2337 | } else { |
2338 | /*EMPTY*/ | |
5f28d2d7 SK |
2339 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1060, |
2340 | "Done %s.\n", __func__); | |
1da177e4 LT |
2341 | } |
2342 | ||
2343 | return rval; | |
2344 | } | |
2345 | ||
1c7c6357 | 2346 | int |
7b867cf7 | 2347 | qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain, |
1c7c6357 AV |
2348 | uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt) |
2349 | { | |
2350 | int rval; | |
2351 | ||
2352 | struct logio_entry_24xx *lg; | |
2353 | dma_addr_t lg_dma; | |
2354 | uint32_t iop[2]; | |
7b867cf7 | 2355 | struct qla_hw_data *ha = vha->hw; |
2afa19a9 | 2356 | struct req_que *req; |
1c7c6357 | 2357 | |
5f28d2d7 SK |
2358 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1061, |
2359 | "Entered %s.\n", __func__); | |
1c7c6357 | 2360 | |
d7459527 MH |
2361 | if (vha->vp_idx && vha->qpair) |
2362 | req = vha->qpair->req; | |
68ca949c | 2363 | else |
d7459527 | 2364 | req = ha->req_q_map[0]; |
2afa19a9 | 2365 | |
08eb7f45 | 2366 | lg = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma); |
1c7c6357 | 2367 | if (lg == NULL) { |
7c3df132 SK |
2368 | ql_log(ql_log_warn, vha, 0x1062, |
2369 | "Failed to allocate login IOCB.\n"); | |
1c7c6357 AV |
2370 | return QLA_MEMORY_ALLOC_FAILED; |
2371 | } | |
1c7c6357 AV |
2372 | |
2373 | lg->entry_type = LOGINOUT_PORT_IOCB_TYPE; | |
2374 | lg->entry_count = 1; | |
2afa19a9 | 2375 | lg->handle = MAKE_HANDLE(req->id, lg->handle); |
1c7c6357 | 2376 | lg->nport_handle = cpu_to_le16(loop_id); |
ad950360 | 2377 | lg->control_flags = cpu_to_le16(LCF_COMMAND_PLOGI); |
1c7c6357 | 2378 | if (opt & BIT_0) |
ad950360 | 2379 | lg->control_flags |= cpu_to_le16(LCF_COND_PLOGI); |
8baa51a6 | 2380 | if (opt & BIT_1) |
ad950360 | 2381 | lg->control_flags |= cpu_to_le16(LCF_SKIP_PRLI); |
1c7c6357 AV |
2382 | lg->port_id[0] = al_pa; |
2383 | lg->port_id[1] = area; | |
2384 | lg->port_id[2] = domain; | |
7b867cf7 | 2385 | lg->vp_index = vha->vp_idx; |
7f45dd0b AV |
2386 | rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0, |
2387 | (ha->r_a_tov / 10 * 2) + 2); | |
1c7c6357 | 2388 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
2389 | ql_dbg(ql_dbg_mbx, vha, 0x1063, |
2390 | "Failed to issue login IOCB (%x).\n", rval); | |
1c7c6357 | 2391 | } else if (lg->entry_status != 0) { |
7c3df132 SK |
2392 | ql_dbg(ql_dbg_mbx, vha, 0x1064, |
2393 | "Failed to complete IOCB -- error status (%x).\n", | |
2394 | lg->entry_status); | |
1c7c6357 | 2395 | rval = QLA_FUNCTION_FAILED; |
ad950360 | 2396 | } else if (lg->comp_status != cpu_to_le16(CS_COMPLETE)) { |
1c7c6357 AV |
2397 | iop[0] = le32_to_cpu(lg->io_parameter[0]); |
2398 | iop[1] = le32_to_cpu(lg->io_parameter[1]); | |
2399 | ||
7c3df132 SK |
2400 | ql_dbg(ql_dbg_mbx, vha, 0x1065, |
2401 | "Failed to complete IOCB -- completion status (%x) " | |
2402 | "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status), | |
2403 | iop[0], iop[1]); | |
1c7c6357 AV |
2404 | |
2405 | switch (iop[0]) { | |
2406 | case LSC_SCODE_PORTID_USED: | |
2407 | mb[0] = MBS_PORT_ID_USED; | |
2408 | mb[1] = LSW(iop[1]); | |
2409 | break; | |
2410 | case LSC_SCODE_NPORT_USED: | |
2411 | mb[0] = MBS_LOOP_ID_USED; | |
2412 | break; | |
2413 | case LSC_SCODE_NOLINK: | |
2414 | case LSC_SCODE_NOIOCB: | |
2415 | case LSC_SCODE_NOXCB: | |
2416 | case LSC_SCODE_CMD_FAILED: | |
2417 | case LSC_SCODE_NOFABRIC: | |
2418 | case LSC_SCODE_FW_NOT_READY: | |
2419 | case LSC_SCODE_NOT_LOGGED_IN: | |
2420 | case LSC_SCODE_NOPCB: | |
2421 | case LSC_SCODE_ELS_REJECT: | |
2422 | case LSC_SCODE_CMD_PARAM_ERR: | |
2423 | case LSC_SCODE_NONPORT: | |
2424 | case LSC_SCODE_LOGGED_IN: | |
2425 | case LSC_SCODE_NOFLOGI_ACC: | |
2426 | default: | |
2427 | mb[0] = MBS_COMMAND_ERROR; | |
2428 | break; | |
2429 | } | |
2430 | } else { | |
5f28d2d7 SK |
2431 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1066, |
2432 | "Done %s.\n", __func__); | |
1c7c6357 AV |
2433 | |
2434 | iop[0] = le32_to_cpu(lg->io_parameter[0]); | |
2435 | ||
2436 | mb[0] = MBS_COMMAND_COMPLETE; | |
2437 | mb[1] = 0; | |
2438 | if (iop[0] & BIT_4) { | |
2439 | if (iop[0] & BIT_8) | |
2440 | mb[1] |= BIT_1; | |
2441 | } else | |
2442 | mb[1] = BIT_0; | |
ad3e0eda AV |
2443 | |
2444 | /* Passback COS information. */ | |
2445 | mb[10] = 0; | |
2446 | if (lg->io_parameter[7] || lg->io_parameter[8]) | |
2447 | mb[10] |= BIT_0; /* Class 2. */ | |
2448 | if (lg->io_parameter[9] || lg->io_parameter[10]) | |
2449 | mb[10] |= BIT_1; /* Class 3. */ | |
ad950360 | 2450 | if (lg->io_parameter[0] & cpu_to_le32(BIT_7)) |
2d70c103 NB |
2451 | mb[10] |= BIT_7; /* Confirmed Completion |
2452 | * Allowed | |
2453 | */ | |
1c7c6357 AV |
2454 | } |
2455 | ||
2456 | dma_pool_free(ha->s_dma_pool, lg, lg_dma); | |
2457 | ||
2458 | return rval; | |
2459 | } | |
2460 | ||
1da177e4 LT |
2461 | /* |
2462 | * qla2x00_login_fabric | |
2463 | * Issue login fabric port mailbox command. | |
2464 | * | |
2465 | * Input: | |
2466 | * ha = adapter block pointer. | |
2467 | * loop_id = device loop ID. | |
2468 | * domain = device domain. | |
2469 | * area = device area. | |
2470 | * al_pa = device AL_PA. | |
2471 | * status = pointer for return status. | |
2472 | * opt = command options. | |
2473 | * TARGET_QUEUE_LOCK must be released. | |
2474 | * ADAPTER_STATE_LOCK must be released. | |
2475 | * | |
2476 | * Returns: | |
2477 | * qla2x00 local function return status code. | |
2478 | * | |
2479 | * Context: | |
2480 | * Kernel context. | |
2481 | */ | |
2482 | int | |
7b867cf7 | 2483 | qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain, |
1da177e4 LT |
2484 | uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt) |
2485 | { | |
2486 | int rval; | |
2487 | mbx_cmd_t mc; | |
2488 | mbx_cmd_t *mcp = &mc; | |
7b867cf7 | 2489 | struct qla_hw_data *ha = vha->hw; |
1da177e4 | 2490 | |
5f28d2d7 SK |
2491 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1067, |
2492 | "Entered %s.\n", __func__); | |
1da177e4 LT |
2493 | |
2494 | mcp->mb[0] = MBC_LOGIN_FABRIC_PORT; | |
2495 | mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; | |
2496 | if (HAS_EXTENDED_IDS(ha)) { | |
2497 | mcp->mb[1] = loop_id; | |
2498 | mcp->mb[10] = opt; | |
2499 | mcp->out_mb |= MBX_10; | |
2500 | } else { | |
2501 | mcp->mb[1] = (loop_id << 8) | opt; | |
2502 | } | |
2503 | mcp->mb[2] = domain; | |
2504 | mcp->mb[3] = area << 8 | al_pa; | |
2505 | ||
2506 | mcp->in_mb = MBX_7|MBX_6|MBX_2|MBX_1|MBX_0; | |
2507 | mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2); | |
2508 | mcp->flags = 0; | |
7b867cf7 | 2509 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
2510 | |
2511 | /* Return mailbox statuses. */ | |
2512 | if (mb != NULL) { | |
2513 | mb[0] = mcp->mb[0]; | |
2514 | mb[1] = mcp->mb[1]; | |
2515 | mb[2] = mcp->mb[2]; | |
2516 | mb[6] = mcp->mb[6]; | |
2517 | mb[7] = mcp->mb[7]; | |
ad3e0eda AV |
2518 | /* COS retrieved from Get-Port-Database mailbox command. */ |
2519 | mb[10] = 0; | |
1da177e4 LT |
2520 | } |
2521 | ||
2522 | if (rval != QLA_SUCCESS) { | |
2523 | /* RLU tmp code: need to change main mailbox_command function to | |
2524 | * return ok even when the mailbox completion value is not | |
2525 | * SUCCESS. The caller needs to be responsible to interpret | |
2526 | * the return values of this mailbox command if we're not | |
2527 | * to change too much of the existing code. | |
2528 | */ | |
2529 | if (mcp->mb[0] == 0x4001 || mcp->mb[0] == 0x4002 || | |
2530 | mcp->mb[0] == 0x4003 || mcp->mb[0] == 0x4005 || | |
2531 | mcp->mb[0] == 0x4006) | |
2532 | rval = QLA_SUCCESS; | |
2533 | ||
2534 | /*EMPTY*/ | |
7c3df132 SK |
2535 | ql_dbg(ql_dbg_mbx, vha, 0x1068, |
2536 | "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n", | |
2537 | rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]); | |
1da177e4 LT |
2538 | } else { |
2539 | /*EMPTY*/ | |
5f28d2d7 SK |
2540 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1069, |
2541 | "Done %s.\n", __func__); | |
1da177e4 LT |
2542 | } |
2543 | ||
2544 | return rval; | |
2545 | } | |
2546 | ||
2547 | /* | |
2548 | * qla2x00_login_local_device | |
2549 | * Issue login loop port mailbox command. | |
fa2a1ce5 | 2550 | * |
1da177e4 LT |
2551 | * Input: |
2552 | * ha = adapter block pointer. | |
2553 | * loop_id = device loop ID. | |
2554 | * opt = command options. | |
fa2a1ce5 | 2555 | * |
1da177e4 LT |
2556 | * Returns: |
2557 | * Return status code. | |
fa2a1ce5 | 2558 | * |
1da177e4 LT |
2559 | * Context: |
2560 | * Kernel context. | |
fa2a1ce5 | 2561 | * |
1da177e4 LT |
2562 | */ |
2563 | int | |
7b867cf7 | 2564 | qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
2565 | uint16_t *mb_ret, uint8_t opt) |
2566 | { | |
2567 | int rval; | |
2568 | mbx_cmd_t mc; | |
2569 | mbx_cmd_t *mcp = &mc; | |
7b867cf7 | 2570 | struct qla_hw_data *ha = vha->hw; |
1da177e4 | 2571 | |
5f28d2d7 SK |
2572 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106a, |
2573 | "Entered %s.\n", __func__); | |
7c3df132 | 2574 | |
e428924c | 2575 | if (IS_FWI2_CAPABLE(ha)) |
7b867cf7 | 2576 | return qla24xx_login_fabric(vha, fcport->loop_id, |
9a52a57c | 2577 | fcport->d_id.b.domain, fcport->d_id.b.area, |
2578 | fcport->d_id.b.al_pa, mb_ret, opt); | |
2579 | ||
1da177e4 LT |
2580 | mcp->mb[0] = MBC_LOGIN_LOOP_PORT; |
2581 | if (HAS_EXTENDED_IDS(ha)) | |
9a52a57c | 2582 | mcp->mb[1] = fcport->loop_id; |
1da177e4 | 2583 | else |
9a52a57c | 2584 | mcp->mb[1] = fcport->loop_id << 8; |
1da177e4 LT |
2585 | mcp->mb[2] = opt; |
2586 | mcp->out_mb = MBX_2|MBX_1|MBX_0; | |
2587 | mcp->in_mb = MBX_7|MBX_6|MBX_1|MBX_0; | |
2588 | mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2); | |
2589 | mcp->flags = 0; | |
7b867cf7 | 2590 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
2591 | |
2592 | /* Return mailbox statuses. */ | |
2593 | if (mb_ret != NULL) { | |
2594 | mb_ret[0] = mcp->mb[0]; | |
2595 | mb_ret[1] = mcp->mb[1]; | |
2596 | mb_ret[6] = mcp->mb[6]; | |
2597 | mb_ret[7] = mcp->mb[7]; | |
2598 | } | |
2599 | ||
2600 | if (rval != QLA_SUCCESS) { | |
2601 | /* AV tmp code: need to change main mailbox_command function to | |
2602 | * return ok even when the mailbox completion value is not | |
2603 | * SUCCESS. The caller needs to be responsible to interpret | |
2604 | * the return values of this mailbox command if we're not | |
2605 | * to change too much of the existing code. | |
2606 | */ | |
2607 | if (mcp->mb[0] == 0x4005 || mcp->mb[0] == 0x4006) | |
2608 | rval = QLA_SUCCESS; | |
2609 | ||
7c3df132 SK |
2610 | ql_dbg(ql_dbg_mbx, vha, 0x106b, |
2611 | "Failed=%x mb[0]=%x mb[1]=%x mb[6]=%x mb[7]=%x.\n", | |
2612 | rval, mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]); | |
1da177e4 LT |
2613 | } else { |
2614 | /*EMPTY*/ | |
5f28d2d7 SK |
2615 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106c, |
2616 | "Done %s.\n", __func__); | |
1da177e4 LT |
2617 | } |
2618 | ||
2619 | return (rval); | |
2620 | } | |
2621 | ||
1c7c6357 | 2622 | int |
7b867cf7 | 2623 | qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain, |
1c7c6357 AV |
2624 | uint8_t area, uint8_t al_pa) |
2625 | { | |
2626 | int rval; | |
2627 | struct logio_entry_24xx *lg; | |
2628 | dma_addr_t lg_dma; | |
7b867cf7 | 2629 | struct qla_hw_data *ha = vha->hw; |
2afa19a9 | 2630 | struct req_que *req; |
1c7c6357 | 2631 | |
5f28d2d7 SK |
2632 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106d, |
2633 | "Entered %s.\n", __func__); | |
1c7c6357 | 2634 | |
08eb7f45 | 2635 | lg = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma); |
1c7c6357 | 2636 | if (lg == NULL) { |
7c3df132 SK |
2637 | ql_log(ql_log_warn, vha, 0x106e, |
2638 | "Failed to allocate logout IOCB.\n"); | |
1c7c6357 AV |
2639 | return QLA_MEMORY_ALLOC_FAILED; |
2640 | } | |
1c7c6357 | 2641 | |
d7459527 | 2642 | req = vha->req; |
1c7c6357 AV |
2643 | lg->entry_type = LOGINOUT_PORT_IOCB_TYPE; |
2644 | lg->entry_count = 1; | |
2afa19a9 | 2645 | lg->handle = MAKE_HANDLE(req->id, lg->handle); |
1c7c6357 AV |
2646 | lg->nport_handle = cpu_to_le16(loop_id); |
2647 | lg->control_flags = | |
ad950360 | 2648 | cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO| |
c8d6691b | 2649 | LCF_FREE_NPORT); |
1c7c6357 AV |
2650 | lg->port_id[0] = al_pa; |
2651 | lg->port_id[1] = area; | |
2652 | lg->port_id[2] = domain; | |
7b867cf7 | 2653 | lg->vp_index = vha->vp_idx; |
7f45dd0b AV |
2654 | rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0, |
2655 | (ha->r_a_tov / 10 * 2) + 2); | |
1c7c6357 | 2656 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
2657 | ql_dbg(ql_dbg_mbx, vha, 0x106f, |
2658 | "Failed to issue logout IOCB (%x).\n", rval); | |
1c7c6357 | 2659 | } else if (lg->entry_status != 0) { |
7c3df132 SK |
2660 | ql_dbg(ql_dbg_mbx, vha, 0x1070, |
2661 | "Failed to complete IOCB -- error status (%x).\n", | |
2662 | lg->entry_status); | |
1c7c6357 | 2663 | rval = QLA_FUNCTION_FAILED; |
ad950360 | 2664 | } else if (lg->comp_status != cpu_to_le16(CS_COMPLETE)) { |
7c3df132 SK |
2665 | ql_dbg(ql_dbg_mbx, vha, 0x1071, |
2666 | "Failed to complete IOCB -- completion status (%x) " | |
2667 | "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status), | |
1c7c6357 | 2668 | le32_to_cpu(lg->io_parameter[0]), |
7c3df132 | 2669 | le32_to_cpu(lg->io_parameter[1])); |
1c7c6357 AV |
2670 | } else { |
2671 | /*EMPTY*/ | |
5f28d2d7 SK |
2672 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1072, |
2673 | "Done %s.\n", __func__); | |
1c7c6357 AV |
2674 | } |
2675 | ||
2676 | dma_pool_free(ha->s_dma_pool, lg, lg_dma); | |
2677 | ||
2678 | return rval; | |
2679 | } | |
2680 | ||
1da177e4 LT |
2681 | /* |
2682 | * qla2x00_fabric_logout | |
2683 | * Issue logout fabric port mailbox command. | |
2684 | * | |
2685 | * Input: | |
2686 | * ha = adapter block pointer. | |
2687 | * loop_id = device loop ID. | |
2688 | * TARGET_QUEUE_LOCK must be released. | |
2689 | * ADAPTER_STATE_LOCK must be released. | |
2690 | * | |
2691 | * Returns: | |
2692 | * qla2x00 local function return status code. | |
2693 | * | |
2694 | * Context: | |
2695 | * Kernel context. | |
2696 | */ | |
2697 | int | |
7b867cf7 | 2698 | qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain, |
1c7c6357 | 2699 | uint8_t area, uint8_t al_pa) |
1da177e4 LT |
2700 | { |
2701 | int rval; | |
2702 | mbx_cmd_t mc; | |
2703 | mbx_cmd_t *mcp = &mc; | |
2704 | ||
5f28d2d7 SK |
2705 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1073, |
2706 | "Entered %s.\n", __func__); | |
1da177e4 LT |
2707 | |
2708 | mcp->mb[0] = MBC_LOGOUT_FABRIC_PORT; | |
2709 | mcp->out_mb = MBX_1|MBX_0; | |
7b867cf7 | 2710 | if (HAS_EXTENDED_IDS(vha->hw)) { |
1da177e4 LT |
2711 | mcp->mb[1] = loop_id; |
2712 | mcp->mb[10] = 0; | |
2713 | mcp->out_mb |= MBX_10; | |
2714 | } else { | |
2715 | mcp->mb[1] = loop_id << 8; | |
2716 | } | |
2717 | ||
2718 | mcp->in_mb = MBX_1|MBX_0; | |
b93480e3 | 2719 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 2720 | mcp->flags = 0; |
7b867cf7 | 2721 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
2722 | |
2723 | if (rval != QLA_SUCCESS) { | |
2724 | /*EMPTY*/ | |
7c3df132 SK |
2725 | ql_dbg(ql_dbg_mbx, vha, 0x1074, |
2726 | "Failed=%x mb[1]=%x.\n", rval, mcp->mb[1]); | |
1da177e4 LT |
2727 | } else { |
2728 | /*EMPTY*/ | |
5f28d2d7 SK |
2729 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1075, |
2730 | "Done %s.\n", __func__); | |
1da177e4 LT |
2731 | } |
2732 | ||
2733 | return rval; | |
2734 | } | |
2735 | ||
2736 | /* | |
2737 | * qla2x00_full_login_lip | |
2738 | * Issue full login LIP mailbox command. | |
2739 | * | |
2740 | * Input: | |
2741 | * ha = adapter block pointer. | |
2742 | * TARGET_QUEUE_LOCK must be released. | |
2743 | * ADAPTER_STATE_LOCK must be released. | |
2744 | * | |
2745 | * Returns: | |
2746 | * qla2x00 local function return status code. | |
2747 | * | |
2748 | * Context: | |
2749 | * Kernel context. | |
2750 | */ | |
2751 | int | |
7b867cf7 | 2752 | qla2x00_full_login_lip(scsi_qla_host_t *vha) |
1da177e4 LT |
2753 | { |
2754 | int rval; | |
2755 | mbx_cmd_t mc; | |
2756 | mbx_cmd_t *mcp = &mc; | |
2757 | ||
5f28d2d7 SK |
2758 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1076, |
2759 | "Entered %s.\n", __func__); | |
1da177e4 LT |
2760 | |
2761 | mcp->mb[0] = MBC_LIP_FULL_LOGIN; | |
7b867cf7 | 2762 | mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_3 : 0; |
0c8c39af | 2763 | mcp->mb[2] = 0; |
1da177e4 LT |
2764 | mcp->mb[3] = 0; |
2765 | mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; | |
2766 | mcp->in_mb = MBX_0; | |
b93480e3 | 2767 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 2768 | mcp->flags = 0; |
7b867cf7 | 2769 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
2770 | |
2771 | if (rval != QLA_SUCCESS) { | |
2772 | /*EMPTY*/ | |
7c3df132 | 2773 | ql_dbg(ql_dbg_mbx, vha, 0x1077, "Failed=%x.\n", rval); |
1da177e4 LT |
2774 | } else { |
2775 | /*EMPTY*/ | |
5f28d2d7 SK |
2776 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1078, |
2777 | "Done %s.\n", __func__); | |
1da177e4 LT |
2778 | } |
2779 | ||
2780 | return rval; | |
2781 | } | |
2782 | ||
2783 | /* | |
2784 | * qla2x00_get_id_list | |
2785 | * | |
2786 | * Input: | |
2787 | * ha = adapter block pointer. | |
2788 | * | |
2789 | * Returns: | |
2790 | * qla2x00 local function return status code. | |
2791 | * | |
2792 | * Context: | |
2793 | * Kernel context. | |
2794 | */ | |
2795 | int | |
7b867cf7 | 2796 | qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma, |
1da177e4 LT |
2797 | uint16_t *entries) |
2798 | { | |
2799 | int rval; | |
2800 | mbx_cmd_t mc; | |
2801 | mbx_cmd_t *mcp = &mc; | |
2802 | ||
5f28d2d7 SK |
2803 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1079, |
2804 | "Entered %s.\n", __func__); | |
1da177e4 LT |
2805 | |
2806 | if (id_list == NULL) | |
2807 | return QLA_FUNCTION_FAILED; | |
2808 | ||
2809 | mcp->mb[0] = MBC_GET_ID_LIST; | |
1c7c6357 | 2810 | mcp->out_mb = MBX_0; |
7b867cf7 | 2811 | if (IS_FWI2_CAPABLE(vha->hw)) { |
1c7c6357 AV |
2812 | mcp->mb[2] = MSW(id_list_dma); |
2813 | mcp->mb[3] = LSW(id_list_dma); | |
2814 | mcp->mb[6] = MSW(MSD(id_list_dma)); | |
2815 | mcp->mb[7] = LSW(MSD(id_list_dma)); | |
247ec457 | 2816 | mcp->mb[8] = 0; |
7b867cf7 | 2817 | mcp->mb[9] = vha->vp_idx; |
2c3dfe3f | 2818 | mcp->out_mb |= MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2; |
1c7c6357 AV |
2819 | } else { |
2820 | mcp->mb[1] = MSW(id_list_dma); | |
2821 | mcp->mb[2] = LSW(id_list_dma); | |
2822 | mcp->mb[3] = MSW(MSD(id_list_dma)); | |
2823 | mcp->mb[6] = LSW(MSD(id_list_dma)); | |
2824 | mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1; | |
2825 | } | |
1da177e4 | 2826 | mcp->in_mb = MBX_1|MBX_0; |
b93480e3 | 2827 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 2828 | mcp->flags = 0; |
7b867cf7 | 2829 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
2830 | |
2831 | if (rval != QLA_SUCCESS) { | |
2832 | /*EMPTY*/ | |
7c3df132 | 2833 | ql_dbg(ql_dbg_mbx, vha, 0x107a, "Failed=%x.\n", rval); |
1da177e4 LT |
2834 | } else { |
2835 | *entries = mcp->mb[1]; | |
5f28d2d7 SK |
2836 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107b, |
2837 | "Done %s.\n", __func__); | |
1da177e4 LT |
2838 | } |
2839 | ||
2840 | return rval; | |
2841 | } | |
2842 | ||
2843 | /* | |
2844 | * qla2x00_get_resource_cnts | |
2845 | * Get current firmware resource counts. | |
2846 | * | |
2847 | * Input: | |
2848 | * ha = adapter block pointer. | |
2849 | * | |
2850 | * Returns: | |
2851 | * qla2x00 local function return status code. | |
2852 | * | |
2853 | * Context: | |
2854 | * Kernel context. | |
2855 | */ | |
2856 | int | |
03e8c680 | 2857 | qla2x00_get_resource_cnts(scsi_qla_host_t *vha) |
1da177e4 | 2858 | { |
03e8c680 | 2859 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2860 | int rval; |
2861 | mbx_cmd_t mc; | |
2862 | mbx_cmd_t *mcp = &mc; | |
2863 | ||
5f28d2d7 SK |
2864 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107c, |
2865 | "Entered %s.\n", __func__); | |
1da177e4 LT |
2866 | |
2867 | mcp->mb[0] = MBC_GET_RESOURCE_COUNTS; | |
2868 | mcp->out_mb = MBX_0; | |
4d0ea247 | 2869 | mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; |
f73cb695 | 2870 | if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw) || IS_QLA27XX(vha->hw)) |
f3a0a77e | 2871 | mcp->in_mb |= MBX_12; |
b93480e3 | 2872 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 2873 | mcp->flags = 0; |
7b867cf7 | 2874 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
2875 | |
2876 | if (rval != QLA_SUCCESS) { | |
2877 | /*EMPTY*/ | |
7c3df132 SK |
2878 | ql_dbg(ql_dbg_mbx, vha, 0x107d, |
2879 | "Failed mb[0]=%x.\n", mcp->mb[0]); | |
1da177e4 | 2880 | } else { |
5f28d2d7 | 2881 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107e, |
7c3df132 SK |
2882 | "Done %s mb1=%x mb2=%x mb3=%x mb6=%x mb7=%x mb10=%x " |
2883 | "mb11=%x mb12=%x.\n", __func__, mcp->mb[1], mcp->mb[2], | |
2884 | mcp->mb[3], mcp->mb[6], mcp->mb[7], mcp->mb[10], | |
2885 | mcp->mb[11], mcp->mb[12]); | |
1da177e4 | 2886 | |
03e8c680 QT |
2887 | ha->orig_fw_tgt_xcb_count = mcp->mb[1]; |
2888 | ha->cur_fw_tgt_xcb_count = mcp->mb[2]; | |
2889 | ha->cur_fw_xcb_count = mcp->mb[3]; | |
2890 | ha->orig_fw_xcb_count = mcp->mb[6]; | |
2891 | ha->cur_fw_iocb_count = mcp->mb[7]; | |
2892 | ha->orig_fw_iocb_count = mcp->mb[10]; | |
2893 | if (ha->flags.npiv_supported) | |
2894 | ha->max_npiv_vports = mcp->mb[11]; | |
2895 | if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) | |
2896 | ha->fw_max_fcf_count = mcp->mb[12]; | |
1da177e4 LT |
2897 | } |
2898 | ||
2899 | return (rval); | |
2900 | } | |
2901 | ||
1da177e4 LT |
2902 | /* |
2903 | * qla2x00_get_fcal_position_map | |
2904 | * Get FCAL (LILP) position map using mailbox command | |
2905 | * | |
2906 | * Input: | |
2907 | * ha = adapter state pointer. | |
2908 | * pos_map = buffer pointer (can be NULL). | |
2909 | * | |
2910 | * Returns: | |
2911 | * qla2x00 local function return status code. | |
2912 | * | |
2913 | * Context: | |
2914 | * Kernel context. | |
2915 | */ | |
2916 | int | |
7b867cf7 | 2917 | qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map) |
1da177e4 LT |
2918 | { |
2919 | int rval; | |
2920 | mbx_cmd_t mc; | |
2921 | mbx_cmd_t *mcp = &mc; | |
2922 | char *pmap; | |
2923 | dma_addr_t pmap_dma; | |
7b867cf7 | 2924 | struct qla_hw_data *ha = vha->hw; |
1da177e4 | 2925 | |
5f28d2d7 SK |
2926 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107f, |
2927 | "Entered %s.\n", __func__); | |
7c3df132 | 2928 | |
08eb7f45 | 2929 | pmap = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma); |
1da177e4 | 2930 | if (pmap == NULL) { |
7c3df132 SK |
2931 | ql_log(ql_log_warn, vha, 0x1080, |
2932 | "Memory alloc failed.\n"); | |
1da177e4 LT |
2933 | return QLA_MEMORY_ALLOC_FAILED; |
2934 | } | |
1da177e4 LT |
2935 | |
2936 | mcp->mb[0] = MBC_GET_FC_AL_POSITION_MAP; | |
2937 | mcp->mb[2] = MSW(pmap_dma); | |
2938 | mcp->mb[3] = LSW(pmap_dma); | |
2939 | mcp->mb[6] = MSW(MSD(pmap_dma)); | |
2940 | mcp->mb[7] = LSW(MSD(pmap_dma)); | |
2941 | mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0; | |
2942 | mcp->in_mb = MBX_1|MBX_0; | |
2943 | mcp->buf_size = FCAL_MAP_SIZE; | |
2944 | mcp->flags = MBX_DMA_IN; | |
2945 | mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2); | |
7b867cf7 | 2946 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
2947 | |
2948 | if (rval == QLA_SUCCESS) { | |
5f28d2d7 | 2949 | ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1081, |
7c3df132 SK |
2950 | "mb0/mb1=%x/%X FC/AL position map size (%x).\n", |
2951 | mcp->mb[0], mcp->mb[1], (unsigned)pmap[0]); | |
2952 | ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111d, | |
2953 | pmap, pmap[0] + 1); | |
1da177e4 LT |
2954 | |
2955 | if (pos_map) | |
2956 | memcpy(pos_map, pmap, FCAL_MAP_SIZE); | |
2957 | } | |
2958 | dma_pool_free(ha->s_dma_pool, pmap, pmap_dma); | |
2959 | ||
2960 | if (rval != QLA_SUCCESS) { | |
7c3df132 | 2961 | ql_dbg(ql_dbg_mbx, vha, 0x1082, "Failed=%x.\n", rval); |
1da177e4 | 2962 | } else { |
5f28d2d7 SK |
2963 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1083, |
2964 | "Done %s.\n", __func__); | |
1da177e4 LT |
2965 | } |
2966 | ||
2967 | return rval; | |
2968 | } | |
392e2f65 | 2969 | |
2970 | /* | |
2971 | * qla2x00_get_link_status | |
2972 | * | |
2973 | * Input: | |
2974 | * ha = adapter block pointer. | |
2975 | * loop_id = device loop ID. | |
2976 | * ret_buf = pointer to link status return buffer. | |
2977 | * | |
2978 | * Returns: | |
2979 | * 0 = success. | |
2980 | * BIT_0 = mem alloc error. | |
2981 | * BIT_1 = mailbox error. | |
2982 | */ | |
2983 | int | |
7b867cf7 | 2984 | qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id, |
43ef0580 | 2985 | struct link_statistics *stats, dma_addr_t stats_dma) |
392e2f65 | 2986 | { |
2987 | int rval; | |
2988 | mbx_cmd_t mc; | |
2989 | mbx_cmd_t *mcp = &mc; | |
c6dc9905 JC |
2990 | uint32_t *iter = (void *)stats; |
2991 | ushort dwords = offsetof(typeof(*stats), link_up_cnt)/sizeof(*iter); | |
7b867cf7 | 2992 | struct qla_hw_data *ha = vha->hw; |
392e2f65 | 2993 | |
5f28d2d7 SK |
2994 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1084, |
2995 | "Entered %s.\n", __func__); | |
392e2f65 | 2996 | |
392e2f65 | 2997 | mcp->mb[0] = MBC_GET_LINK_STATUS; |
c6dc9905 JC |
2998 | mcp->mb[2] = MSW(LSD(stats_dma)); |
2999 | mcp->mb[3] = LSW(LSD(stats_dma)); | |
43ef0580 AV |
3000 | mcp->mb[6] = MSW(MSD(stats_dma)); |
3001 | mcp->mb[7] = LSW(MSD(stats_dma)); | |
392e2f65 | 3002 | mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0; |
3003 | mcp->in_mb = MBX_0; | |
e428924c | 3004 | if (IS_FWI2_CAPABLE(ha)) { |
392e2f65 | 3005 | mcp->mb[1] = loop_id; |
3006 | mcp->mb[4] = 0; | |
3007 | mcp->mb[10] = 0; | |
3008 | mcp->out_mb |= MBX_10|MBX_4|MBX_1; | |
3009 | mcp->in_mb |= MBX_1; | |
3010 | } else if (HAS_EXTENDED_IDS(ha)) { | |
3011 | mcp->mb[1] = loop_id; | |
3012 | mcp->mb[10] = 0; | |
3013 | mcp->out_mb |= MBX_10|MBX_1; | |
3014 | } else { | |
3015 | mcp->mb[1] = loop_id << 8; | |
3016 | mcp->out_mb |= MBX_1; | |
3017 | } | |
b93480e3 | 3018 | mcp->tov = MBX_TOV_SECONDS; |
392e2f65 | 3019 | mcp->flags = IOCTL_CMD; |
7b867cf7 | 3020 | rval = qla2x00_mailbox_command(vha, mcp); |
392e2f65 | 3021 | |
3022 | if (rval == QLA_SUCCESS) { | |
3023 | if (mcp->mb[0] != MBS_COMMAND_COMPLETE) { | |
7c3df132 SK |
3024 | ql_dbg(ql_dbg_mbx, vha, 0x1085, |
3025 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
43ef0580 | 3026 | rval = QLA_FUNCTION_FAILED; |
392e2f65 | 3027 | } else { |
c6dc9905 | 3028 | /* Re-endianize - firmware data is le32. */ |
5f28d2d7 SK |
3029 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1086, |
3030 | "Done %s.\n", __func__); | |
da08ef5c JC |
3031 | for ( ; dwords--; iter++) |
3032 | le32_to_cpus(iter); | |
392e2f65 | 3033 | } |
3034 | } else { | |
3035 | /* Failed. */ | |
7c3df132 | 3036 | ql_dbg(ql_dbg_mbx, vha, 0x1087, "Failed=%x.\n", rval); |
392e2f65 | 3037 | } |
3038 | ||
392e2f65 | 3039 | return rval; |
3040 | } | |
3041 | ||
3042 | int | |
7b867cf7 | 3043 | qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats, |
15f30a57 | 3044 | dma_addr_t stats_dma, uint16_t options) |
1c7c6357 AV |
3045 | { |
3046 | int rval; | |
3047 | mbx_cmd_t mc; | |
3048 | mbx_cmd_t *mcp = &mc; | |
da08ef5c | 3049 | uint32_t *iter, dwords; |
1c7c6357 | 3050 | |
5f28d2d7 SK |
3051 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1088, |
3052 | "Entered %s.\n", __func__); | |
1c7c6357 | 3053 | |
15f30a57 QT |
3054 | memset(&mc, 0, sizeof(mc)); |
3055 | mc.mb[0] = MBC_GET_LINK_PRIV_STATS; | |
3056 | mc.mb[2] = MSW(stats_dma); | |
3057 | mc.mb[3] = LSW(stats_dma); | |
3058 | mc.mb[6] = MSW(MSD(stats_dma)); | |
3059 | mc.mb[7] = LSW(MSD(stats_dma)); | |
3060 | mc.mb[8] = sizeof(struct link_statistics) / 4; | |
3061 | mc.mb[9] = cpu_to_le16(vha->vp_idx); | |
3062 | mc.mb[10] = cpu_to_le16(options); | |
3063 | ||
3064 | rval = qla24xx_send_mb_cmd(vha, &mc); | |
1c7c6357 AV |
3065 | |
3066 | if (rval == QLA_SUCCESS) { | |
3067 | if (mcp->mb[0] != MBS_COMMAND_COMPLETE) { | |
7c3df132 SK |
3068 | ql_dbg(ql_dbg_mbx, vha, 0x1089, |
3069 | "Failed mb[0]=%x.\n", mcp->mb[0]); | |
43ef0580 | 3070 | rval = QLA_FUNCTION_FAILED; |
1c7c6357 | 3071 | } else { |
5f28d2d7 SK |
3072 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108a, |
3073 | "Done %s.\n", __func__); | |
c6dc9905 | 3074 | /* Re-endianize - firmware data is le32. */ |
43ef0580 | 3075 | dwords = sizeof(struct link_statistics) / 4; |
da08ef5c JC |
3076 | iter = &stats->link_fail_cnt; |
3077 | for ( ; dwords--; iter++) | |
3078 | le32_to_cpus(iter); | |
1c7c6357 AV |
3079 | } |
3080 | } else { | |
3081 | /* Failed. */ | |
7c3df132 | 3082 | ql_dbg(ql_dbg_mbx, vha, 0x108b, "Failed=%x.\n", rval); |
1c7c6357 AV |
3083 | } |
3084 | ||
1c7c6357 AV |
3085 | return rval; |
3086 | } | |
1c7c6357 AV |
3087 | |
3088 | int | |
2afa19a9 | 3089 | qla24xx_abort_command(srb_t *sp) |
1c7c6357 AV |
3090 | { |
3091 | int rval; | |
1c7c6357 AV |
3092 | unsigned long flags = 0; |
3093 | ||
3094 | struct abort_entry_24xx *abt; | |
3095 | dma_addr_t abt_dma; | |
3096 | uint32_t handle; | |
2afa19a9 AC |
3097 | fc_port_t *fcport = sp->fcport; |
3098 | struct scsi_qla_host *vha = fcport->vha; | |
7b867cf7 | 3099 | struct qla_hw_data *ha = vha->hw; |
67c2e93a | 3100 | struct req_que *req = vha->req; |
585def9b | 3101 | struct qla_qpair *qpair = sp->qpair; |
1c7c6357 | 3102 | |
5f28d2d7 SK |
3103 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108c, |
3104 | "Entered %s.\n", __func__); | |
1c7c6357 | 3105 | |
d7459527 MH |
3106 | if (vha->flags.qpairs_available && sp->qpair) |
3107 | req = sp->qpair->req; | |
585def9b QT |
3108 | else |
3109 | return QLA_FUNCTION_FAILED; | |
d7459527 | 3110 | |
4440e46d AB |
3111 | if (ql2xasynctmfenable) |
3112 | return qla24xx_async_abort_command(sp); | |
3113 | ||
585def9b | 3114 | spin_lock_irqsave(qpair->qp_lock_ptr, flags); |
8d93f550 | 3115 | for (handle = 1; handle < req->num_outstanding_cmds; handle++) { |
7b867cf7 | 3116 | if (req->outstanding_cmds[handle] == sp) |
1c7c6357 AV |
3117 | break; |
3118 | } | |
585def9b | 3119 | spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); |
8d93f550 | 3120 | if (handle == req->num_outstanding_cmds) { |
1c7c6357 AV |
3121 | /* Command not found. */ |
3122 | return QLA_FUNCTION_FAILED; | |
3123 | } | |
3124 | ||
08eb7f45 | 3125 | abt = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma); |
1c7c6357 | 3126 | if (abt == NULL) { |
7c3df132 SK |
3127 | ql_log(ql_log_warn, vha, 0x108d, |
3128 | "Failed to allocate abort IOCB.\n"); | |
1c7c6357 AV |
3129 | return QLA_MEMORY_ALLOC_FAILED; |
3130 | } | |
1c7c6357 AV |
3131 | |
3132 | abt->entry_type = ABORT_IOCB_TYPE; | |
3133 | abt->entry_count = 1; | |
2afa19a9 | 3134 | abt->handle = MAKE_HANDLE(req->id, abt->handle); |
1c7c6357 | 3135 | abt->nport_handle = cpu_to_le16(fcport->loop_id); |
a74ec14f | 3136 | abt->handle_to_abort = MAKE_HANDLE(req->id, handle); |
1c7c6357 AV |
3137 | abt->port_id[0] = fcport->d_id.b.al_pa; |
3138 | abt->port_id[1] = fcport->d_id.b.area; | |
3139 | abt->port_id[2] = fcport->d_id.b.domain; | |
c6d39e23 | 3140 | abt->vp_index = fcport->vha->vp_idx; |
73208dfd AC |
3141 | |
3142 | abt->req_que_no = cpu_to_le16(req->id); | |
3143 | ||
7b867cf7 | 3144 | rval = qla2x00_issue_iocb(vha, abt, abt_dma, 0); |
1c7c6357 | 3145 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
3146 | ql_dbg(ql_dbg_mbx, vha, 0x108e, |
3147 | "Failed to issue IOCB (%x).\n", rval); | |
1c7c6357 | 3148 | } else if (abt->entry_status != 0) { |
7c3df132 SK |
3149 | ql_dbg(ql_dbg_mbx, vha, 0x108f, |
3150 | "Failed to complete IOCB -- error status (%x).\n", | |
3151 | abt->entry_status); | |
1c7c6357 | 3152 | rval = QLA_FUNCTION_FAILED; |
ad950360 | 3153 | } else if (abt->nport_handle != cpu_to_le16(0)) { |
7c3df132 SK |
3154 | ql_dbg(ql_dbg_mbx, vha, 0x1090, |
3155 | "Failed to complete IOCB -- completion status (%x).\n", | |
3156 | le16_to_cpu(abt->nport_handle)); | |
f934c9d0 CD |
3157 | if (abt->nport_handle == CS_IOCB_ERROR) |
3158 | rval = QLA_FUNCTION_PARAMETER_ERROR; | |
3159 | else | |
3160 | rval = QLA_FUNCTION_FAILED; | |
1c7c6357 | 3161 | } else { |
5f28d2d7 SK |
3162 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1091, |
3163 | "Done %s.\n", __func__); | |
1c7c6357 AV |
3164 | } |
3165 | ||
3166 | dma_pool_free(ha->s_dma_pool, abt, abt_dma); | |
3167 | ||
3168 | return rval; | |
3169 | } | |
3170 | ||
3171 | struct tsk_mgmt_cmd { | |
3172 | union { | |
3173 | struct tsk_mgmt_entry tsk; | |
3174 | struct sts_entry_24xx sts; | |
3175 | } p; | |
3176 | }; | |
3177 | ||
523ec773 AV |
3178 | static int |
3179 | __qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport, | |
9cb78c16 | 3180 | uint64_t l, int tag) |
1c7c6357 | 3181 | { |
523ec773 | 3182 | int rval, rval2; |
1c7c6357 | 3183 | struct tsk_mgmt_cmd *tsk; |
9ca1d01f | 3184 | struct sts_entry_24xx *sts; |
1c7c6357 | 3185 | dma_addr_t tsk_dma; |
7b867cf7 AC |
3186 | scsi_qla_host_t *vha; |
3187 | struct qla_hw_data *ha; | |
73208dfd AC |
3188 | struct req_que *req; |
3189 | struct rsp_que *rsp; | |
d7459527 | 3190 | struct qla_qpair *qpair; |
1c7c6357 | 3191 | |
7b867cf7 AC |
3192 | vha = fcport->vha; |
3193 | ha = vha->hw; | |
2afa19a9 | 3194 | req = vha->req; |
7c3df132 | 3195 | |
5f28d2d7 SK |
3196 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1092, |
3197 | "Entered %s.\n", __func__); | |
7c3df132 | 3198 | |
d7459527 MH |
3199 | if (vha->vp_idx && vha->qpair) { |
3200 | /* NPIV port */ | |
3201 | qpair = vha->qpair; | |
3202 | rsp = qpair->rsp; | |
3203 | req = qpair->req; | |
3204 | } else { | |
68ca949c | 3205 | rsp = req->rsp; |
d7459527 MH |
3206 | } |
3207 | ||
08eb7f45 | 3208 | tsk = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma); |
1c7c6357 | 3209 | if (tsk == NULL) { |
7c3df132 SK |
3210 | ql_log(ql_log_warn, vha, 0x1093, |
3211 | "Failed to allocate task management IOCB.\n"); | |
1c7c6357 AV |
3212 | return QLA_MEMORY_ALLOC_FAILED; |
3213 | } | |
1c7c6357 AV |
3214 | |
3215 | tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE; | |
3216 | tsk->p.tsk.entry_count = 1; | |
2afa19a9 | 3217 | tsk->p.tsk.handle = MAKE_HANDLE(req->id, tsk->p.tsk.handle); |
1c7c6357 | 3218 | tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id); |
00a537b8 | 3219 | tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2); |
523ec773 | 3220 | tsk->p.tsk.control_flags = cpu_to_le32(type); |
1c7c6357 AV |
3221 | tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa; |
3222 | tsk->p.tsk.port_id[1] = fcport->d_id.b.area; | |
3223 | tsk->p.tsk.port_id[2] = fcport->d_id.b.domain; | |
c6d39e23 | 3224 | tsk->p.tsk.vp_index = fcport->vha->vp_idx; |
523ec773 AV |
3225 | if (type == TCF_LUN_RESET) { |
3226 | int_to_scsilun(l, &tsk->p.tsk.lun); | |
3227 | host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun, | |
3228 | sizeof(tsk->p.tsk.lun)); | |
3229 | } | |
2c3dfe3f | 3230 | |
9ca1d01f | 3231 | sts = &tsk->p.sts; |
7b867cf7 | 3232 | rval = qla2x00_issue_iocb(vha, tsk, tsk_dma, 0); |
1c7c6357 | 3233 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
3234 | ql_dbg(ql_dbg_mbx, vha, 0x1094, |
3235 | "Failed to issue %s reset IOCB (%x).\n", name, rval); | |
9ca1d01f | 3236 | } else if (sts->entry_status != 0) { |
7c3df132 SK |
3237 | ql_dbg(ql_dbg_mbx, vha, 0x1095, |
3238 | "Failed to complete IOCB -- error status (%x).\n", | |
3239 | sts->entry_status); | |
1c7c6357 | 3240 | rval = QLA_FUNCTION_FAILED; |
ad950360 | 3241 | } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) { |
7c3df132 SK |
3242 | ql_dbg(ql_dbg_mbx, vha, 0x1096, |
3243 | "Failed to complete IOCB -- completion status (%x).\n", | |
3244 | le16_to_cpu(sts->comp_status)); | |
9ca1d01f | 3245 | rval = QLA_FUNCTION_FAILED; |
97dec564 AV |
3246 | } else if (le16_to_cpu(sts->scsi_status) & |
3247 | SS_RESPONSE_INFO_LEN_VALID) { | |
3248 | if (le32_to_cpu(sts->rsp_data_len) < 4) { | |
5f28d2d7 | 3249 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1097, |
7c3df132 SK |
3250 | "Ignoring inconsistent data length -- not enough " |
3251 | "response info (%d).\n", | |
3252 | le32_to_cpu(sts->rsp_data_len)); | |
97dec564 | 3253 | } else if (sts->data[3]) { |
7c3df132 SK |
3254 | ql_dbg(ql_dbg_mbx, vha, 0x1098, |
3255 | "Failed to complete IOCB -- response (%x).\n", | |
3256 | sts->data[3]); | |
97dec564 AV |
3257 | rval = QLA_FUNCTION_FAILED; |
3258 | } | |
1c7c6357 AV |
3259 | } |
3260 | ||
3261 | /* Issue marker IOCB. */ | |
73208dfd | 3262 | rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l, |
523ec773 AV |
3263 | type == TCF_LUN_RESET ? MK_SYNC_ID_LUN: MK_SYNC_ID); |
3264 | if (rval2 != QLA_SUCCESS) { | |
7c3df132 SK |
3265 | ql_dbg(ql_dbg_mbx, vha, 0x1099, |
3266 | "Failed to issue marker IOCB (%x).\n", rval2); | |
1c7c6357 | 3267 | } else { |
5f28d2d7 SK |
3268 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109a, |
3269 | "Done %s.\n", __func__); | |
1c7c6357 AV |
3270 | } |
3271 | ||
7b867cf7 | 3272 | dma_pool_free(ha->s_dma_pool, tsk, tsk_dma); |
1c7c6357 AV |
3273 | |
3274 | return rval; | |
3275 | } | |
3276 | ||
523ec773 | 3277 | int |
9cb78c16 | 3278 | qla24xx_abort_target(struct fc_port *fcport, uint64_t l, int tag) |
523ec773 | 3279 | { |
3822263e MI |
3280 | struct qla_hw_data *ha = fcport->vha->hw; |
3281 | ||
3282 | if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha)) | |
3283 | return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag); | |
3284 | ||
2afa19a9 | 3285 | return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag); |
523ec773 AV |
3286 | } |
3287 | ||
3288 | int | |
9cb78c16 | 3289 | qla24xx_lun_reset(struct fc_port *fcport, uint64_t l, int tag) |
523ec773 | 3290 | { |
3822263e MI |
3291 | struct qla_hw_data *ha = fcport->vha->hw; |
3292 | ||
3293 | if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha)) | |
3294 | return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag); | |
3295 | ||
2afa19a9 | 3296 | return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag); |
523ec773 AV |
3297 | } |
3298 | ||
1c7c6357 | 3299 | int |
7b867cf7 | 3300 | qla2x00_system_error(scsi_qla_host_t *vha) |
1c7c6357 AV |
3301 | { |
3302 | int rval; | |
3303 | mbx_cmd_t mc; | |
3304 | mbx_cmd_t *mcp = &mc; | |
7b867cf7 | 3305 | struct qla_hw_data *ha = vha->hw; |
1c7c6357 | 3306 | |
68af0811 | 3307 | if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha)) |
1c7c6357 AV |
3308 | return QLA_FUNCTION_FAILED; |
3309 | ||
5f28d2d7 SK |
3310 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109b, |
3311 | "Entered %s.\n", __func__); | |
1c7c6357 AV |
3312 | |
3313 | mcp->mb[0] = MBC_GEN_SYSTEM_ERROR; | |
3314 | mcp->out_mb = MBX_0; | |
3315 | mcp->in_mb = MBX_0; | |
3316 | mcp->tov = 5; | |
3317 | mcp->flags = 0; | |
7b867cf7 | 3318 | rval = qla2x00_mailbox_command(vha, mcp); |
1c7c6357 AV |
3319 | |
3320 | if (rval != QLA_SUCCESS) { | |
7c3df132 | 3321 | ql_dbg(ql_dbg_mbx, vha, 0x109c, "Failed=%x.\n", rval); |
1c7c6357 | 3322 | } else { |
5f28d2d7 SK |
3323 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109d, |
3324 | "Done %s.\n", __func__); | |
1c7c6357 AV |
3325 | } |
3326 | ||
3327 | return rval; | |
3328 | } | |
3329 | ||
db64e930 JC |
3330 | int |
3331 | qla2x00_write_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t data) | |
3332 | { | |
3333 | int rval; | |
3334 | mbx_cmd_t mc; | |
3335 | mbx_cmd_t *mcp = &mc; | |
3336 | ||
f299c7c2 JC |
3337 | if (!IS_QLA25XX(vha->hw) && !IS_QLA2031(vha->hw) && |
3338 | !IS_QLA27XX(vha->hw)) | |
db64e930 JC |
3339 | return QLA_FUNCTION_FAILED; |
3340 | ||
3341 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1182, | |
3342 | "Entered %s.\n", __func__); | |
3343 | ||
3344 | mcp->mb[0] = MBC_WRITE_SERDES; | |
3345 | mcp->mb[1] = addr; | |
064135e0 AV |
3346 | if (IS_QLA2031(vha->hw)) |
3347 | mcp->mb[2] = data & 0xff; | |
3348 | else | |
3349 | mcp->mb[2] = data; | |
3350 | ||
db64e930 JC |
3351 | mcp->mb[3] = 0; |
3352 | mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; | |
3353 | mcp->in_mb = MBX_0; | |
3354 | mcp->tov = MBX_TOV_SECONDS; | |
3355 | mcp->flags = 0; | |
3356 | rval = qla2x00_mailbox_command(vha, mcp); | |
3357 | ||
3358 | if (rval != QLA_SUCCESS) { | |
3359 | ql_dbg(ql_dbg_mbx, vha, 0x1183, | |
3360 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
3361 | } else { | |
3362 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1184, | |
3363 | "Done %s.\n", __func__); | |
3364 | } | |
3365 | ||
3366 | return rval; | |
3367 | } | |
3368 | ||
3369 | int | |
3370 | qla2x00_read_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t *data) | |
3371 | { | |
3372 | int rval; | |
3373 | mbx_cmd_t mc; | |
3374 | mbx_cmd_t *mcp = &mc; | |
3375 | ||
f299c7c2 JC |
3376 | if (!IS_QLA25XX(vha->hw) && !IS_QLA2031(vha->hw) && |
3377 | !IS_QLA27XX(vha->hw)) | |
db64e930 JC |
3378 | return QLA_FUNCTION_FAILED; |
3379 | ||
3380 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1185, | |
3381 | "Entered %s.\n", __func__); | |
3382 | ||
3383 | mcp->mb[0] = MBC_READ_SERDES; | |
3384 | mcp->mb[1] = addr; | |
3385 | mcp->mb[3] = 0; | |
3386 | mcp->out_mb = MBX_3|MBX_1|MBX_0; | |
3387 | mcp->in_mb = MBX_1|MBX_0; | |
3388 | mcp->tov = MBX_TOV_SECONDS; | |
3389 | mcp->flags = 0; | |
3390 | rval = qla2x00_mailbox_command(vha, mcp); | |
3391 | ||
064135e0 AV |
3392 | if (IS_QLA2031(vha->hw)) |
3393 | *data = mcp->mb[1] & 0xff; | |
3394 | else | |
3395 | *data = mcp->mb[1]; | |
db64e930 JC |
3396 | |
3397 | if (rval != QLA_SUCCESS) { | |
3398 | ql_dbg(ql_dbg_mbx, vha, 0x1186, | |
3399 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
3400 | } else { | |
3401 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1187, | |
3402 | "Done %s.\n", __func__); | |
3403 | } | |
3404 | ||
3405 | return rval; | |
3406 | } | |
3407 | ||
e8887c51 JC |
3408 | int |
3409 | qla8044_write_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t data) | |
3410 | { | |
3411 | int rval; | |
3412 | mbx_cmd_t mc; | |
3413 | mbx_cmd_t *mcp = &mc; | |
3414 | ||
3415 | if (!IS_QLA8044(vha->hw)) | |
3416 | return QLA_FUNCTION_FAILED; | |
3417 | ||
83548fe2 | 3418 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x11a0, |
e8887c51 JC |
3419 | "Entered %s.\n", __func__); |
3420 | ||
3421 | mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG; | |
3422 | mcp->mb[1] = HCS_WRITE_SERDES; | |
3423 | mcp->mb[3] = LSW(addr); | |
3424 | mcp->mb[4] = MSW(addr); | |
3425 | mcp->mb[5] = LSW(data); | |
3426 | mcp->mb[6] = MSW(data); | |
3427 | mcp->out_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_1|MBX_0; | |
3428 | mcp->in_mb = MBX_0; | |
3429 | mcp->tov = MBX_TOV_SECONDS; | |
3430 | mcp->flags = 0; | |
3431 | rval = qla2x00_mailbox_command(vha, mcp); | |
3432 | ||
3433 | if (rval != QLA_SUCCESS) { | |
83548fe2 | 3434 | ql_dbg(ql_dbg_mbx, vha, 0x11a1, |
e8887c51 JC |
3435 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); |
3436 | } else { | |
3437 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1188, | |
3438 | "Done %s.\n", __func__); | |
3439 | } | |
3440 | ||
3441 | return rval; | |
3442 | } | |
3443 | ||
3444 | int | |
3445 | qla8044_read_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t *data) | |
3446 | { | |
3447 | int rval; | |
3448 | mbx_cmd_t mc; | |
3449 | mbx_cmd_t *mcp = &mc; | |
3450 | ||
3451 | if (!IS_QLA8044(vha->hw)) | |
3452 | return QLA_FUNCTION_FAILED; | |
3453 | ||
3454 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1189, | |
3455 | "Entered %s.\n", __func__); | |
3456 | ||
3457 | mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG; | |
3458 | mcp->mb[1] = HCS_READ_SERDES; | |
3459 | mcp->mb[3] = LSW(addr); | |
3460 | mcp->mb[4] = MSW(addr); | |
3461 | mcp->out_mb = MBX_4|MBX_3|MBX_1|MBX_0; | |
3462 | mcp->in_mb = MBX_2|MBX_1|MBX_0; | |
3463 | mcp->tov = MBX_TOV_SECONDS; | |
3464 | mcp->flags = 0; | |
3465 | rval = qla2x00_mailbox_command(vha, mcp); | |
3466 | ||
3467 | *data = mcp->mb[2] << 16 | mcp->mb[1]; | |
3468 | ||
3469 | if (rval != QLA_SUCCESS) { | |
3470 | ql_dbg(ql_dbg_mbx, vha, 0x118a, | |
3471 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
3472 | } else { | |
3473 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118b, | |
3474 | "Done %s.\n", __func__); | |
3475 | } | |
3476 | ||
3477 | return rval; | |
3478 | } | |
3479 | ||
1c7c6357 AV |
3480 | /** |
3481 | * qla2x00_set_serdes_params() - | |
2db6228d | 3482 | * @vha: HA context |
807eb907 BVA |
3483 | * @sw_em_1g: serial link options |
3484 | * @sw_em_2g: serial link options | |
3485 | * @sw_em_4g: serial link options | |
1c7c6357 AV |
3486 | * |
3487 | * Returns | |
3488 | */ | |
3489 | int | |
7b867cf7 | 3490 | qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g, |
1c7c6357 AV |
3491 | uint16_t sw_em_2g, uint16_t sw_em_4g) |
3492 | { | |
3493 | int rval; | |
3494 | mbx_cmd_t mc; | |
3495 | mbx_cmd_t *mcp = &mc; | |
3496 | ||
5f28d2d7 SK |
3497 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109e, |
3498 | "Entered %s.\n", __func__); | |
1c7c6357 AV |
3499 | |
3500 | mcp->mb[0] = MBC_SERDES_PARAMS; | |
3501 | mcp->mb[1] = BIT_0; | |
fdbc6833 | 3502 | mcp->mb[2] = sw_em_1g | BIT_15; |
3503 | mcp->mb[3] = sw_em_2g | BIT_15; | |
3504 | mcp->mb[4] = sw_em_4g | BIT_15; | |
1c7c6357 AV |
3505 | mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; |
3506 | mcp->in_mb = MBX_0; | |
b93480e3 | 3507 | mcp->tov = MBX_TOV_SECONDS; |
1c7c6357 | 3508 | mcp->flags = 0; |
7b867cf7 | 3509 | rval = qla2x00_mailbox_command(vha, mcp); |
1c7c6357 AV |
3510 | |
3511 | if (rval != QLA_SUCCESS) { | |
3512 | /*EMPTY*/ | |
7c3df132 SK |
3513 | ql_dbg(ql_dbg_mbx, vha, 0x109f, |
3514 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
1c7c6357 AV |
3515 | } else { |
3516 | /*EMPTY*/ | |
5f28d2d7 SK |
3517 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a0, |
3518 | "Done %s.\n", __func__); | |
1c7c6357 AV |
3519 | } |
3520 | ||
3521 | return rval; | |
3522 | } | |
f6ef3b18 AV |
3523 | |
3524 | int | |
7b867cf7 | 3525 | qla2x00_stop_firmware(scsi_qla_host_t *vha) |
f6ef3b18 AV |
3526 | { |
3527 | int rval; | |
3528 | mbx_cmd_t mc; | |
3529 | mbx_cmd_t *mcp = &mc; | |
3530 | ||
7b867cf7 | 3531 | if (!IS_FWI2_CAPABLE(vha->hw)) |
f6ef3b18 AV |
3532 | return QLA_FUNCTION_FAILED; |
3533 | ||
5f28d2d7 SK |
3534 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a1, |
3535 | "Entered %s.\n", __func__); | |
f6ef3b18 AV |
3536 | |
3537 | mcp->mb[0] = MBC_STOP_FIRMWARE; | |
4ba988db AV |
3538 | mcp->mb[1] = 0; |
3539 | mcp->out_mb = MBX_1|MBX_0; | |
f6ef3b18 AV |
3540 | mcp->in_mb = MBX_0; |
3541 | mcp->tov = 5; | |
3542 | mcp->flags = 0; | |
7b867cf7 | 3543 | rval = qla2x00_mailbox_command(vha, mcp); |
f6ef3b18 AV |
3544 | |
3545 | if (rval != QLA_SUCCESS) { | |
7c3df132 | 3546 | ql_dbg(ql_dbg_mbx, vha, 0x10a2, "Failed=%x.\n", rval); |
b469a7cb AV |
3547 | if (mcp->mb[0] == MBS_INVALID_COMMAND) |
3548 | rval = QLA_INVALID_COMMAND; | |
f6ef3b18 | 3549 | } else { |
5f28d2d7 SK |
3550 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a3, |
3551 | "Done %s.\n", __func__); | |
f6ef3b18 AV |
3552 | } |
3553 | ||
3554 | return rval; | |
3555 | } | |
a7a167bf AV |
3556 | |
3557 | int | |
7b867cf7 | 3558 | qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma, |
a7a167bf AV |
3559 | uint16_t buffers) |
3560 | { | |
3561 | int rval; | |
3562 | mbx_cmd_t mc; | |
3563 | mbx_cmd_t *mcp = &mc; | |
3564 | ||
5f28d2d7 SK |
3565 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a4, |
3566 | "Entered %s.\n", __func__); | |
7c3df132 | 3567 | |
7b867cf7 | 3568 | if (!IS_FWI2_CAPABLE(vha->hw)) |
a7a167bf AV |
3569 | return QLA_FUNCTION_FAILED; |
3570 | ||
85880801 AV |
3571 | if (unlikely(pci_channel_offline(vha->hw->pdev))) |
3572 | return QLA_FUNCTION_FAILED; | |
3573 | ||
a7a167bf | 3574 | mcp->mb[0] = MBC_TRACE_CONTROL; |
00b6bd25 AV |
3575 | mcp->mb[1] = TC_EFT_ENABLE; |
3576 | mcp->mb[2] = LSW(eft_dma); | |
3577 | mcp->mb[3] = MSW(eft_dma); | |
3578 | mcp->mb[4] = LSW(MSD(eft_dma)); | |
3579 | mcp->mb[5] = MSW(MSD(eft_dma)); | |
3580 | mcp->mb[6] = buffers; | |
3581 | mcp->mb[7] = TC_AEN_DISABLE; | |
3582 | mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
a7a167bf | 3583 | mcp->in_mb = MBX_1|MBX_0; |
b93480e3 | 3584 | mcp->tov = MBX_TOV_SECONDS; |
a7a167bf | 3585 | mcp->flags = 0; |
7b867cf7 | 3586 | rval = qla2x00_mailbox_command(vha, mcp); |
00b6bd25 | 3587 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
3588 | ql_dbg(ql_dbg_mbx, vha, 0x10a5, |
3589 | "Failed=%x mb[0]=%x mb[1]=%x.\n", | |
3590 | rval, mcp->mb[0], mcp->mb[1]); | |
00b6bd25 | 3591 | } else { |
5f28d2d7 SK |
3592 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a6, |
3593 | "Done %s.\n", __func__); | |
00b6bd25 AV |
3594 | } |
3595 | ||
3596 | return rval; | |
3597 | } | |
a7a167bf | 3598 | |
00b6bd25 | 3599 | int |
7b867cf7 | 3600 | qla2x00_disable_eft_trace(scsi_qla_host_t *vha) |
00b6bd25 AV |
3601 | { |
3602 | int rval; | |
3603 | mbx_cmd_t mc; | |
3604 | mbx_cmd_t *mcp = &mc; | |
3605 | ||
5f28d2d7 SK |
3606 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a7, |
3607 | "Entered %s.\n", __func__); | |
7c3df132 | 3608 | |
7b867cf7 | 3609 | if (!IS_FWI2_CAPABLE(vha->hw)) |
00b6bd25 AV |
3610 | return QLA_FUNCTION_FAILED; |
3611 | ||
85880801 AV |
3612 | if (unlikely(pci_channel_offline(vha->hw->pdev))) |
3613 | return QLA_FUNCTION_FAILED; | |
3614 | ||
00b6bd25 AV |
3615 | mcp->mb[0] = MBC_TRACE_CONTROL; |
3616 | mcp->mb[1] = TC_EFT_DISABLE; | |
3617 | mcp->out_mb = MBX_1|MBX_0; | |
3618 | mcp->in_mb = MBX_1|MBX_0; | |
b93480e3 | 3619 | mcp->tov = MBX_TOV_SECONDS; |
00b6bd25 | 3620 | mcp->flags = 0; |
7b867cf7 | 3621 | rval = qla2x00_mailbox_command(vha, mcp); |
a7a167bf | 3622 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
3623 | ql_dbg(ql_dbg_mbx, vha, 0x10a8, |
3624 | "Failed=%x mb[0]=%x mb[1]=%x.\n", | |
3625 | rval, mcp->mb[0], mcp->mb[1]); | |
a7a167bf | 3626 | } else { |
5f28d2d7 SK |
3627 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a9, |
3628 | "Done %s.\n", __func__); | |
a7a167bf AV |
3629 | } |
3630 | ||
3631 | return rval; | |
3632 | } | |
3633 | ||
df613b96 | 3634 | int |
7b867cf7 | 3635 | qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma, |
df613b96 AV |
3636 | uint16_t buffers, uint16_t *mb, uint32_t *dwords) |
3637 | { | |
3638 | int rval; | |
3639 | mbx_cmd_t mc; | |
3640 | mbx_cmd_t *mcp = &mc; | |
3641 | ||
5f28d2d7 SK |
3642 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10aa, |
3643 | "Entered %s.\n", __func__); | |
7c3df132 | 3644 | |
6246b8a1 | 3645 | if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw) && |
f73cb695 | 3646 | !IS_QLA83XX(vha->hw) && !IS_QLA27XX(vha->hw)) |
df613b96 AV |
3647 | return QLA_FUNCTION_FAILED; |
3648 | ||
85880801 AV |
3649 | if (unlikely(pci_channel_offline(vha->hw->pdev))) |
3650 | return QLA_FUNCTION_FAILED; | |
3651 | ||
df613b96 AV |
3652 | mcp->mb[0] = MBC_TRACE_CONTROL; |
3653 | mcp->mb[1] = TC_FCE_ENABLE; | |
3654 | mcp->mb[2] = LSW(fce_dma); | |
3655 | mcp->mb[3] = MSW(fce_dma); | |
3656 | mcp->mb[4] = LSW(MSD(fce_dma)); | |
3657 | mcp->mb[5] = MSW(MSD(fce_dma)); | |
3658 | mcp->mb[6] = buffers; | |
3659 | mcp->mb[7] = TC_AEN_DISABLE; | |
3660 | mcp->mb[8] = 0; | |
3661 | mcp->mb[9] = TC_FCE_DEFAULT_RX_SIZE; | |
3662 | mcp->mb[10] = TC_FCE_DEFAULT_TX_SIZE; | |
3663 | mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2| | |
3664 | MBX_1|MBX_0; | |
3665 | mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
b93480e3 | 3666 | mcp->tov = MBX_TOV_SECONDS; |
df613b96 | 3667 | mcp->flags = 0; |
7b867cf7 | 3668 | rval = qla2x00_mailbox_command(vha, mcp); |
df613b96 | 3669 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
3670 | ql_dbg(ql_dbg_mbx, vha, 0x10ab, |
3671 | "Failed=%x mb[0]=%x mb[1]=%x.\n", | |
3672 | rval, mcp->mb[0], mcp->mb[1]); | |
df613b96 | 3673 | } else { |
5f28d2d7 SK |
3674 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ac, |
3675 | "Done %s.\n", __func__); | |
df613b96 AV |
3676 | |
3677 | if (mb) | |
3678 | memcpy(mb, mcp->mb, 8 * sizeof(*mb)); | |
3679 | if (dwords) | |
fa0926df | 3680 | *dwords = buffers; |
df613b96 AV |
3681 | } |
3682 | ||
3683 | return rval; | |
3684 | } | |
3685 | ||
3686 | int | |
7b867cf7 | 3687 | qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd) |
df613b96 AV |
3688 | { |
3689 | int rval; | |
3690 | mbx_cmd_t mc; | |
3691 | mbx_cmd_t *mcp = &mc; | |
3692 | ||
5f28d2d7 SK |
3693 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ad, |
3694 | "Entered %s.\n", __func__); | |
7c3df132 | 3695 | |
7b867cf7 | 3696 | if (!IS_FWI2_CAPABLE(vha->hw)) |
df613b96 AV |
3697 | return QLA_FUNCTION_FAILED; |
3698 | ||
85880801 AV |
3699 | if (unlikely(pci_channel_offline(vha->hw->pdev))) |
3700 | return QLA_FUNCTION_FAILED; | |
3701 | ||
df613b96 AV |
3702 | mcp->mb[0] = MBC_TRACE_CONTROL; |
3703 | mcp->mb[1] = TC_FCE_DISABLE; | |
3704 | mcp->mb[2] = TC_FCE_DISABLE_TRACE; | |
3705 | mcp->out_mb = MBX_2|MBX_1|MBX_0; | |
3706 | mcp->in_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2| | |
3707 | MBX_1|MBX_0; | |
b93480e3 | 3708 | mcp->tov = MBX_TOV_SECONDS; |
df613b96 | 3709 | mcp->flags = 0; |
7b867cf7 | 3710 | rval = qla2x00_mailbox_command(vha, mcp); |
df613b96 | 3711 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
3712 | ql_dbg(ql_dbg_mbx, vha, 0x10ae, |
3713 | "Failed=%x mb[0]=%x mb[1]=%x.\n", | |
3714 | rval, mcp->mb[0], mcp->mb[1]); | |
df613b96 | 3715 | } else { |
5f28d2d7 SK |
3716 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10af, |
3717 | "Done %s.\n", __func__); | |
df613b96 AV |
3718 | |
3719 | if (wr) | |
3720 | *wr = (uint64_t) mcp->mb[5] << 48 | | |
3721 | (uint64_t) mcp->mb[4] << 32 | | |
3722 | (uint64_t) mcp->mb[3] << 16 | | |
3723 | (uint64_t) mcp->mb[2]; | |
3724 | if (rd) | |
3725 | *rd = (uint64_t) mcp->mb[9] << 48 | | |
3726 | (uint64_t) mcp->mb[8] << 32 | | |
3727 | (uint64_t) mcp->mb[7] << 16 | | |
3728 | (uint64_t) mcp->mb[6]; | |
3729 | } | |
3730 | ||
3731 | return rval; | |
3732 | } | |
3733 | ||
6e98016c GM |
3734 | int |
3735 | qla2x00_get_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id, | |
3736 | uint16_t *port_speed, uint16_t *mb) | |
3737 | { | |
3738 | int rval; | |
3739 | mbx_cmd_t mc; | |
3740 | mbx_cmd_t *mcp = &mc; | |
3741 | ||
5f28d2d7 SK |
3742 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b0, |
3743 | "Entered %s.\n", __func__); | |
7c3df132 | 3744 | |
6e98016c GM |
3745 | if (!IS_IIDMA_CAPABLE(vha->hw)) |
3746 | return QLA_FUNCTION_FAILED; | |
3747 | ||
6e98016c GM |
3748 | mcp->mb[0] = MBC_PORT_PARAMS; |
3749 | mcp->mb[1] = loop_id; | |
3750 | mcp->mb[2] = mcp->mb[3] = 0; | |
3751 | mcp->mb[9] = vha->vp_idx; | |
3752 | mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0; | |
3753 | mcp->in_mb = MBX_3|MBX_1|MBX_0; | |
3754 | mcp->tov = MBX_TOV_SECONDS; | |
3755 | mcp->flags = 0; | |
3756 | rval = qla2x00_mailbox_command(vha, mcp); | |
3757 | ||
3758 | /* Return mailbox statuses. */ | |
3759 | if (mb != NULL) { | |
3760 | mb[0] = mcp->mb[0]; | |
3761 | mb[1] = mcp->mb[1]; | |
3762 | mb[3] = mcp->mb[3]; | |
3763 | } | |
3764 | ||
3765 | if (rval != QLA_SUCCESS) { | |
7c3df132 | 3766 | ql_dbg(ql_dbg_mbx, vha, 0x10b1, "Failed=%x.\n", rval); |
6e98016c | 3767 | } else { |
5f28d2d7 SK |
3768 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b2, |
3769 | "Done %s.\n", __func__); | |
6e98016c GM |
3770 | if (port_speed) |
3771 | *port_speed = mcp->mb[3]; | |
3772 | } | |
3773 | ||
3774 | return rval; | |
3775 | } | |
3776 | ||
d8b45213 | 3777 | int |
7b867cf7 | 3778 | qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id, |
d8b45213 AV |
3779 | uint16_t port_speed, uint16_t *mb) |
3780 | { | |
3781 | int rval; | |
3782 | mbx_cmd_t mc; | |
3783 | mbx_cmd_t *mcp = &mc; | |
3784 | ||
5f28d2d7 SK |
3785 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b3, |
3786 | "Entered %s.\n", __func__); | |
7c3df132 | 3787 | |
7b867cf7 | 3788 | if (!IS_IIDMA_CAPABLE(vha->hw)) |
d8b45213 AV |
3789 | return QLA_FUNCTION_FAILED; |
3790 | ||
d8b45213 AV |
3791 | mcp->mb[0] = MBC_PORT_PARAMS; |
3792 | mcp->mb[1] = loop_id; | |
3793 | mcp->mb[2] = BIT_0; | |
4c1458df | 3794 | mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0); |
1bb39548 HZ |
3795 | mcp->mb[9] = vha->vp_idx; |
3796 | mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0; | |
3797 | mcp->in_mb = MBX_3|MBX_1|MBX_0; | |
b93480e3 | 3798 | mcp->tov = MBX_TOV_SECONDS; |
d8b45213 | 3799 | mcp->flags = 0; |
7b867cf7 | 3800 | rval = qla2x00_mailbox_command(vha, mcp); |
d8b45213 AV |
3801 | |
3802 | /* Return mailbox statuses. */ | |
3803 | if (mb != NULL) { | |
3804 | mb[0] = mcp->mb[0]; | |
3805 | mb[1] = mcp->mb[1]; | |
3806 | mb[3] = mcp->mb[3]; | |
d8b45213 AV |
3807 | } |
3808 | ||
3809 | if (rval != QLA_SUCCESS) { | |
5f28d2d7 SK |
3810 | ql_dbg(ql_dbg_mbx, vha, 0x10b4, |
3811 | "Failed=%x.\n", rval); | |
d8b45213 | 3812 | } else { |
5f28d2d7 SK |
3813 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b5, |
3814 | "Done %s.\n", __func__); | |
d8b45213 AV |
3815 | } |
3816 | ||
3817 | return rval; | |
3818 | } | |
2c3dfe3f | 3819 | |
2c3dfe3f | 3820 | void |
7b867cf7 | 3821 | qla24xx_report_id_acquisition(scsi_qla_host_t *vha, |
2c3dfe3f SJ |
3822 | struct vp_rpt_id_entry_24xx *rptid_entry) |
3823 | { | |
7b867cf7 | 3824 | struct qla_hw_data *ha = vha->hw; |
41dc529a | 3825 | scsi_qla_host_t *vp = NULL; |
feafb7b1 | 3826 | unsigned long flags; |
4ac8d4ca | 3827 | int found; |
482c9dc7 | 3828 | port_id_t id; |
9cd883f0 | 3829 | struct fc_port *fcport; |
2c3dfe3f | 3830 | |
5f28d2d7 SK |
3831 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b6, |
3832 | "Entered %s.\n", __func__); | |
7c3df132 | 3833 | |
2c3dfe3f SJ |
3834 | if (rptid_entry->entry_status != 0) |
3835 | return; | |
2c3dfe3f | 3836 | |
482c9dc7 QT |
3837 | id.b.domain = rptid_entry->port_id[2]; |
3838 | id.b.area = rptid_entry->port_id[1]; | |
3839 | id.b.al_pa = rptid_entry->port_id[0]; | |
3840 | id.b.rsvd_1 = 0; | |
1763c1fd | 3841 | ha->flags.n2n_ae = 0; |
482c9dc7 | 3842 | |
2c3dfe3f | 3843 | if (rptid_entry->format == 0) { |
41dc529a | 3844 | /* loop */ |
ec7193e2 | 3845 | ql_dbg(ql_dbg_async, vha, 0x10b7, |
7c3df132 | 3846 | "Format 0 : Number of VPs setup %d, number of " |
41dc529a QT |
3847 | "VPs acquired %d.\n", rptid_entry->vp_setup, |
3848 | rptid_entry->vp_acquired); | |
ec7193e2 | 3849 | ql_dbg(ql_dbg_async, vha, 0x10b8, |
7c3df132 SK |
3850 | "Primary port id %02x%02x%02x.\n", |
3851 | rptid_entry->port_id[2], rptid_entry->port_id[1], | |
3852 | rptid_entry->port_id[0]); | |
9cd883f0 | 3853 | ha->current_topology = ISP_CFG_NL; |
482c9dc7 | 3854 | qlt_update_host_map(vha, id); |
41dc529a | 3855 | |
2c3dfe3f | 3856 | } else if (rptid_entry->format == 1) { |
41dc529a | 3857 | /* fabric */ |
ec7193e2 | 3858 | ql_dbg(ql_dbg_async, vha, 0x10b9, |
7c3df132 | 3859 | "Format 1: VP[%d] enabled - status %d - with " |
41dc529a QT |
3860 | "port id %02x%02x%02x.\n", rptid_entry->vp_idx, |
3861 | rptid_entry->vp_status, | |
2c3dfe3f | 3862 | rptid_entry->port_id[2], rptid_entry->port_id[1], |
7c3df132 | 3863 | rptid_entry->port_id[0]); |
edd05de1 DG |
3864 | ql_dbg(ql_dbg_async, vha, 0x5075, |
3865 | "Format 1: Remote WWPN %8phC.\n", | |
3866 | rptid_entry->u.f1.port_name); | |
3867 | ||
3868 | ql_dbg(ql_dbg_async, vha, 0x5075, | |
3869 | "Format 1: WWPN %8phC.\n", | |
3870 | vha->port_name); | |
3871 | ||
8777e431 QT |
3872 | switch (rptid_entry->u.f1.flags & TOPO_MASK) { |
3873 | case TOPO_N2N: | |
3874 | ha->current_topology = ISP_CFG_N; | |
3875 | spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); | |
3876 | fcport = qla2x00_find_fcport_by_wwpn(vha, | |
3877 | rptid_entry->u.f1.port_name, 1); | |
3878 | spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); | |
3879 | ||
3880 | if (fcport) { | |
3881 | fcport->plogi_nack_done_deadline = jiffies + HZ; | |
3882 | fcport->dm_login_expire = jiffies + 3*HZ; | |
3883 | fcport->scan_state = QLA_FCPORT_FOUND; | |
3884 | switch (fcport->disc_state) { | |
3885 | case DSC_DELETED: | |
3886 | set_bit(RELOGIN_NEEDED, | |
3887 | &vha->dpc_flags); | |
3888 | break; | |
3889 | case DSC_DELETE_PEND: | |
3890 | break; | |
3891 | default: | |
3892 | qlt_schedule_sess_for_deletion(fcport); | |
3893 | break; | |
3894 | } | |
edd05de1 | 3895 | } else { |
8777e431 QT |
3896 | id.b24 = 0; |
3897 | if (wwn_to_u64(vha->port_name) > | |
3898 | wwn_to_u64(rptid_entry->u.f1.port_name)) { | |
3899 | vha->d_id.b24 = 0; | |
3900 | vha->d_id.b.al_pa = 1; | |
3901 | ha->flags.n2n_bigger = 1; | |
3902 | ||
3903 | id.b.al_pa = 2; | |
3904 | ql_dbg(ql_dbg_async, vha, 0x5075, | |
3905 | "Format 1: assign local id %x remote id %x\n", | |
3906 | vha->d_id.b24, id.b24); | |
3907 | } else { | |
3908 | ql_dbg(ql_dbg_async, vha, 0x5075, | |
3909 | "Format 1: Remote login - Waiting for WWPN %8phC.\n", | |
3910 | rptid_entry->u.f1.port_name); | |
3911 | ha->flags.n2n_bigger = 0; | |
3912 | } | |
3913 | qla24xx_post_newsess_work(vha, &id, | |
3914 | rptid_entry->u.f1.port_name, | |
3915 | rptid_entry->u.f1.node_name, | |
3916 | NULL, | |
3917 | FC4_TYPE_UNKNOWN); | |
edd05de1 DG |
3918 | } |
3919 | ||
8777e431 QT |
3920 | /* if our portname is higher then initiate N2N login */ |
3921 | ||
edd05de1 | 3922 | set_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags); |
1763c1fd | 3923 | ha->flags.n2n_ae = 1; |
edd05de1 | 3924 | return; |
8777e431 QT |
3925 | break; |
3926 | case TOPO_FL: | |
3927 | ha->current_topology = ISP_CFG_FL; | |
3928 | break; | |
3929 | case TOPO_F: | |
3930 | ha->current_topology = ISP_CFG_F; | |
3931 | break; | |
3932 | default: | |
3933 | break; | |
edd05de1 | 3934 | } |
531a82d1 | 3935 | |
9cd883f0 QT |
3936 | ha->flags.gpsc_supported = 1; |
3937 | ha->current_topology = ISP_CFG_F; | |
969a6199 | 3938 | /* buffer to buffer credit flag */ |
41dc529a QT |
3939 | vha->flags.bbcr_enable = (rptid_entry->u.f1.bbcr & 0xf) != 0; |
3940 | ||
3941 | if (rptid_entry->vp_idx == 0) { | |
3942 | if (rptid_entry->vp_status == VP_STAT_COMPL) { | |
3943 | /* FA-WWN is only for physical port */ | |
3944 | if (qla_ini_mode_enabled(vha) && | |
3945 | ha->flags.fawwpn_enabled && | |
3946 | (rptid_entry->u.f1.flags & | |
fcc5b5cd | 3947 | BIT_6)) { |
41dc529a QT |
3948 | memcpy(vha->port_name, |
3949 | rptid_entry->u.f1.port_name, | |
3950 | WWN_SIZE); | |
3951 | } | |
7c9c4766 | 3952 | |
482c9dc7 | 3953 | qlt_update_host_map(vha, id); |
7c9c4766 | 3954 | } |
41dc529a | 3955 | |
41dc529a QT |
3956 | set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags); |
3957 | set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags); | |
3958 | } else { | |
3959 | if (rptid_entry->vp_status != VP_STAT_COMPL && | |
3960 | rptid_entry->vp_status != VP_STAT_ID_CHG) { | |
3961 | ql_dbg(ql_dbg_mbx, vha, 0x10ba, | |
3962 | "Could not acquire ID for VP[%d].\n", | |
3963 | rptid_entry->vp_idx); | |
3964 | return; | |
4ac8d4ca | 3965 | } |
feafb7b1 | 3966 | |
41dc529a QT |
3967 | found = 0; |
3968 | spin_lock_irqsave(&ha->vport_slock, flags); | |
3969 | list_for_each_entry(vp, &ha->vp_list, list) { | |
3970 | if (rptid_entry->vp_idx == vp->vp_idx) { | |
3971 | found = 1; | |
3972 | break; | |
3973 | } | |
3974 | } | |
3975 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
2c3dfe3f | 3976 | |
41dc529a QT |
3977 | if (!found) |
3978 | return; | |
2c3dfe3f | 3979 | |
482c9dc7 | 3980 | qlt_update_host_map(vp, id); |
2c3dfe3f | 3981 | |
41dc529a QT |
3982 | /* |
3983 | * Cannot configure here as we are still sitting on the | |
3984 | * response queue. Handle it in dpc context. | |
3985 | */ | |
3986 | set_bit(VP_IDX_ACQUIRED, &vp->vp_flags); | |
3987 | set_bit(REGISTER_FC4_NEEDED, &vp->dpc_flags); | |
3988 | set_bit(REGISTER_FDMI_NEEDED, &vp->dpc_flags); | |
3989 | } | |
531a82d1 | 3990 | set_bit(VP_DPC_NEEDED, &vha->dpc_flags); |
7b867cf7 | 3991 | qla2xxx_wake_dpc(vha); |
41dc529a | 3992 | } else if (rptid_entry->format == 2) { |
83548fe2 | 3993 | ql_dbg(ql_dbg_async, vha, 0x505f, |
41dc529a QT |
3994 | "RIDA: format 2/N2N Primary port id %02x%02x%02x.\n", |
3995 | rptid_entry->port_id[2], rptid_entry->port_id[1], | |
3996 | rptid_entry->port_id[0]); | |
3997 | ||
83548fe2 | 3998 | ql_dbg(ql_dbg_async, vha, 0x5075, |
41dc529a QT |
3999 | "N2N: Remote WWPN %8phC.\n", |
4000 | rptid_entry->u.f2.port_name); | |
4001 | ||
4002 | /* N2N. direct connect */ | |
9cd883f0 QT |
4003 | ha->current_topology = ISP_CFG_N; |
4004 | ha->flags.rida_fmt2 = 1; | |
41dc529a QT |
4005 | vha->d_id.b.domain = rptid_entry->port_id[2]; |
4006 | vha->d_id.b.area = rptid_entry->port_id[1]; | |
4007 | vha->d_id.b.al_pa = rptid_entry->port_id[0]; | |
4008 | ||
1763c1fd | 4009 | ha->flags.n2n_ae = 1; |
41dc529a QT |
4010 | spin_lock_irqsave(&ha->vport_slock, flags); |
4011 | qlt_update_vp_map(vha, SET_AL_PA); | |
4012 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
9cd883f0 QT |
4013 | |
4014 | list_for_each_entry(fcport, &vha->vp_fcports, list) { | |
4015 | fcport->scan_state = QLA_FCPORT_SCAN; | |
4016 | } | |
4017 | ||
4018 | fcport = qla2x00_find_fcport_by_wwpn(vha, | |
4019 | rptid_entry->u.f2.port_name, 1); | |
4020 | ||
4021 | if (fcport) { | |
23dd98a6 | 4022 | fcport->login_retry = vha->hw->login_retry_count; |
9cd883f0 QT |
4023 | fcport->plogi_nack_done_deadline = jiffies + HZ; |
4024 | fcport->scan_state = QLA_FCPORT_FOUND; | |
9cd883f0 | 4025 | } |
2c3dfe3f SJ |
4026 | } |
4027 | } | |
4028 | ||
4029 | /* | |
4030 | * qla24xx_modify_vp_config | |
4031 | * Change VP configuration for vha | |
4032 | * | |
4033 | * Input: | |
4034 | * vha = adapter block pointer. | |
4035 | * | |
4036 | * Returns: | |
4037 | * qla2xxx local function return status code. | |
4038 | * | |
4039 | * Context: | |
4040 | * Kernel context. | |
4041 | */ | |
4042 | int | |
4043 | qla24xx_modify_vp_config(scsi_qla_host_t *vha) | |
4044 | { | |
4045 | int rval; | |
4046 | struct vp_config_entry_24xx *vpmod; | |
4047 | dma_addr_t vpmod_dma; | |
7b867cf7 AC |
4048 | struct qla_hw_data *ha = vha->hw; |
4049 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
2c3dfe3f SJ |
4050 | |
4051 | /* This can be called by the parent */ | |
2c3dfe3f | 4052 | |
5f28d2d7 SK |
4053 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10bb, |
4054 | "Entered %s.\n", __func__); | |
7c3df132 | 4055 | |
08eb7f45 | 4056 | vpmod = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma); |
2c3dfe3f | 4057 | if (!vpmod) { |
7c3df132 SK |
4058 | ql_log(ql_log_warn, vha, 0x10bc, |
4059 | "Failed to allocate modify VP IOCB.\n"); | |
2c3dfe3f SJ |
4060 | return QLA_MEMORY_ALLOC_FAILED; |
4061 | } | |
4062 | ||
2c3dfe3f SJ |
4063 | vpmod->entry_type = VP_CONFIG_IOCB_TYPE; |
4064 | vpmod->entry_count = 1; | |
4065 | vpmod->command = VCT_COMMAND_MOD_ENABLE_VPS; | |
4066 | vpmod->vp_count = 1; | |
4067 | vpmod->vp_index1 = vha->vp_idx; | |
4068 | vpmod->options_idx1 = BIT_3|BIT_4|BIT_5; | |
2d70c103 NB |
4069 | |
4070 | qlt_modify_vp_config(vha, vpmod); | |
4071 | ||
2c3dfe3f SJ |
4072 | memcpy(vpmod->node_name_idx1, vha->node_name, WWN_SIZE); |
4073 | memcpy(vpmod->port_name_idx1, vha->port_name, WWN_SIZE); | |
4074 | vpmod->entry_count = 1; | |
4075 | ||
7b867cf7 | 4076 | rval = qla2x00_issue_iocb(base_vha, vpmod, vpmod_dma, 0); |
2c3dfe3f | 4077 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
4078 | ql_dbg(ql_dbg_mbx, vha, 0x10bd, |
4079 | "Failed to issue VP config IOCB (%x).\n", rval); | |
2c3dfe3f | 4080 | } else if (vpmod->comp_status != 0) { |
7c3df132 SK |
4081 | ql_dbg(ql_dbg_mbx, vha, 0x10be, |
4082 | "Failed to complete IOCB -- error status (%x).\n", | |
4083 | vpmod->comp_status); | |
2c3dfe3f | 4084 | rval = QLA_FUNCTION_FAILED; |
ad950360 | 4085 | } else if (vpmod->comp_status != cpu_to_le16(CS_COMPLETE)) { |
7c3df132 SK |
4086 | ql_dbg(ql_dbg_mbx, vha, 0x10bf, |
4087 | "Failed to complete IOCB -- completion status (%x).\n", | |
4088 | le16_to_cpu(vpmod->comp_status)); | |
2c3dfe3f SJ |
4089 | rval = QLA_FUNCTION_FAILED; |
4090 | } else { | |
4091 | /* EMPTY */ | |
5f28d2d7 SK |
4092 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c0, |
4093 | "Done %s.\n", __func__); | |
2c3dfe3f SJ |
4094 | fc_vport_set_state(vha->fc_vport, FC_VPORT_INITIALIZING); |
4095 | } | |
7b867cf7 | 4096 | dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma); |
2c3dfe3f SJ |
4097 | |
4098 | return rval; | |
4099 | } | |
4100 | ||
2c3dfe3f SJ |
4101 | /* |
4102 | * qla2x00_send_change_request | |
4103 | * Receive or disable RSCN request from fabric controller | |
4104 | * | |
4105 | * Input: | |
4106 | * ha = adapter block pointer | |
4107 | * format = registration format: | |
4108 | * 0 - Reserved | |
4109 | * 1 - Fabric detected registration | |
4110 | * 2 - N_port detected registration | |
4111 | * 3 - Full registration | |
4112 | * FF - clear registration | |
4113 | * vp_idx = Virtual port index | |
4114 | * | |
4115 | * Returns: | |
4116 | * qla2x00 local function return status code. | |
4117 | * | |
4118 | * Context: | |
4119 | * Kernel Context | |
4120 | */ | |
4121 | ||
4122 | int | |
7b867cf7 | 4123 | qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format, |
2c3dfe3f SJ |
4124 | uint16_t vp_idx) |
4125 | { | |
4126 | int rval; | |
4127 | mbx_cmd_t mc; | |
4128 | mbx_cmd_t *mcp = &mc; | |
4129 | ||
5f28d2d7 SK |
4130 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c7, |
4131 | "Entered %s.\n", __func__); | |
7c3df132 | 4132 | |
2c3dfe3f SJ |
4133 | mcp->mb[0] = MBC_SEND_CHANGE_REQUEST; |
4134 | mcp->mb[1] = format; | |
4135 | mcp->mb[9] = vp_idx; | |
4136 | mcp->out_mb = MBX_9|MBX_1|MBX_0; | |
4137 | mcp->in_mb = MBX_0|MBX_1; | |
4138 | mcp->tov = MBX_TOV_SECONDS; | |
4139 | mcp->flags = 0; | |
7b867cf7 | 4140 | rval = qla2x00_mailbox_command(vha, mcp); |
2c3dfe3f SJ |
4141 | |
4142 | if (rval == QLA_SUCCESS) { | |
4143 | if (mcp->mb[0] != MBS_COMMAND_COMPLETE) { | |
4144 | rval = BIT_1; | |
4145 | } | |
4146 | } else | |
4147 | rval = BIT_1; | |
4148 | ||
4149 | return rval; | |
4150 | } | |
338c9161 AV |
4151 | |
4152 | int | |
7b867cf7 | 4153 | qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr, |
338c9161 AV |
4154 | uint32_t size) |
4155 | { | |
4156 | int rval; | |
4157 | mbx_cmd_t mc; | |
4158 | mbx_cmd_t *mcp = &mc; | |
4159 | ||
5f28d2d7 SK |
4160 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1009, |
4161 | "Entered %s.\n", __func__); | |
338c9161 | 4162 | |
7b867cf7 | 4163 | if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) { |
338c9161 AV |
4164 | mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED; |
4165 | mcp->mb[8] = MSW(addr); | |
4166 | mcp->out_mb = MBX_8|MBX_0; | |
4167 | } else { | |
4168 | mcp->mb[0] = MBC_DUMP_RISC_RAM; | |
4169 | mcp->out_mb = MBX_0; | |
4170 | } | |
4171 | mcp->mb[1] = LSW(addr); | |
4172 | mcp->mb[2] = MSW(req_dma); | |
4173 | mcp->mb[3] = LSW(req_dma); | |
4174 | mcp->mb[6] = MSW(MSD(req_dma)); | |
4175 | mcp->mb[7] = LSW(MSD(req_dma)); | |
4176 | mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1; | |
7b867cf7 | 4177 | if (IS_FWI2_CAPABLE(vha->hw)) { |
338c9161 AV |
4178 | mcp->mb[4] = MSW(size); |
4179 | mcp->mb[5] = LSW(size); | |
4180 | mcp->out_mb |= MBX_5|MBX_4; | |
4181 | } else { | |
4182 | mcp->mb[4] = LSW(size); | |
4183 | mcp->out_mb |= MBX_4; | |
4184 | } | |
4185 | ||
4186 | mcp->in_mb = MBX_0; | |
b93480e3 | 4187 | mcp->tov = MBX_TOV_SECONDS; |
338c9161 | 4188 | mcp->flags = 0; |
7b867cf7 | 4189 | rval = qla2x00_mailbox_command(vha, mcp); |
338c9161 AV |
4190 | |
4191 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4192 | ql_dbg(ql_dbg_mbx, vha, 0x1008, |
4193 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
338c9161 | 4194 | } else { |
5f28d2d7 SK |
4195 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1007, |
4196 | "Done %s.\n", __func__); | |
338c9161 AV |
4197 | } |
4198 | ||
4199 | return rval; | |
4200 | } | |
4d4df193 HK |
4201 | /* 84XX Support **************************************************************/ |
4202 | ||
4203 | struct cs84xx_mgmt_cmd { | |
4204 | union { | |
4205 | struct verify_chip_entry_84xx req; | |
4206 | struct verify_chip_rsp_84xx rsp; | |
4207 | } p; | |
4208 | }; | |
4209 | ||
4210 | int | |
7b867cf7 | 4211 | qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status) |
4d4df193 HK |
4212 | { |
4213 | int rval, retry; | |
4214 | struct cs84xx_mgmt_cmd *mn; | |
4215 | dma_addr_t mn_dma; | |
4216 | uint16_t options; | |
4217 | unsigned long flags; | |
7b867cf7 | 4218 | struct qla_hw_data *ha = vha->hw; |
4d4df193 | 4219 | |
5f28d2d7 SK |
4220 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c8, |
4221 | "Entered %s.\n", __func__); | |
4d4df193 HK |
4222 | |
4223 | mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma); | |
4224 | if (mn == NULL) { | |
4d4df193 HK |
4225 | return QLA_MEMORY_ALLOC_FAILED; |
4226 | } | |
4227 | ||
4228 | /* Force Update? */ | |
4229 | options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0; | |
4230 | /* Diagnostic firmware? */ | |
4231 | /* options |= MENLO_DIAG_FW; */ | |
4232 | /* We update the firmware with only one data sequence. */ | |
4233 | options |= VCO_END_OF_DATA; | |
4234 | ||
4d4df193 | 4235 | do { |
c1ec1f1b | 4236 | retry = 0; |
4d4df193 HK |
4237 | memset(mn, 0, sizeof(*mn)); |
4238 | mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE; | |
4239 | mn->p.req.entry_count = 1; | |
4240 | mn->p.req.options = cpu_to_le16(options); | |
4241 | ||
7c3df132 SK |
4242 | ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111c, |
4243 | "Dump of Verify Request.\n"); | |
4244 | ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111e, | |
4245 | (uint8_t *)mn, sizeof(*mn)); | |
4d4df193 | 4246 | |
7b867cf7 | 4247 | rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120); |
4d4df193 | 4248 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
4249 | ql_dbg(ql_dbg_mbx, vha, 0x10cb, |
4250 | "Failed to issue verify IOCB (%x).\n", rval); | |
4d4df193 HK |
4251 | goto verify_done; |
4252 | } | |
4253 | ||
7c3df132 SK |
4254 | ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1110, |
4255 | "Dump of Verify Response.\n"); | |
4256 | ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1118, | |
4257 | (uint8_t *)mn, sizeof(*mn)); | |
4d4df193 HK |
4258 | |
4259 | status[0] = le16_to_cpu(mn->p.rsp.comp_status); | |
4260 | status[1] = status[0] == CS_VCS_CHIP_FAILURE ? | |
4261 | le16_to_cpu(mn->p.rsp.failure_code) : 0; | |
5f28d2d7 | 4262 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ce, |
7c3df132 | 4263 | "cs=%x fc=%x.\n", status[0], status[1]); |
4d4df193 HK |
4264 | |
4265 | if (status[0] != CS_COMPLETE) { | |
4266 | rval = QLA_FUNCTION_FAILED; | |
4267 | if (!(options & VCO_DONT_UPDATE_FW)) { | |
7c3df132 SK |
4268 | ql_dbg(ql_dbg_mbx, vha, 0x10cf, |
4269 | "Firmware update failed. Retrying " | |
4270 | "without update firmware.\n"); | |
4d4df193 HK |
4271 | options |= VCO_DONT_UPDATE_FW; |
4272 | options &= ~VCO_FORCE_UPDATE; | |
4273 | retry = 1; | |
4274 | } | |
4275 | } else { | |
5f28d2d7 | 4276 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d0, |
7c3df132 SK |
4277 | "Firmware updated to %x.\n", |
4278 | le32_to_cpu(mn->p.rsp.fw_ver)); | |
4d4df193 HK |
4279 | |
4280 | /* NOTE: we only update OP firmware. */ | |
4281 | spin_lock_irqsave(&ha->cs84xx->access_lock, flags); | |
4282 | ha->cs84xx->op_fw_version = | |
4283 | le32_to_cpu(mn->p.rsp.fw_ver); | |
4284 | spin_unlock_irqrestore(&ha->cs84xx->access_lock, | |
4285 | flags); | |
4286 | } | |
4287 | } while (retry); | |
4288 | ||
4289 | verify_done: | |
4290 | dma_pool_free(ha->s_dma_pool, mn, mn_dma); | |
4291 | ||
4292 | if (rval != QLA_SUCCESS) { | |
5f28d2d7 SK |
4293 | ql_dbg(ql_dbg_mbx, vha, 0x10d1, |
4294 | "Failed=%x.\n", rval); | |
4d4df193 | 4295 | } else { |
5f28d2d7 SK |
4296 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d2, |
4297 | "Done %s.\n", __func__); | |
4d4df193 HK |
4298 | } |
4299 | ||
4300 | return rval; | |
4301 | } | |
73208dfd AC |
4302 | |
4303 | int | |
618a7523 | 4304 | qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req) |
73208dfd AC |
4305 | { |
4306 | int rval; | |
4307 | unsigned long flags; | |
4308 | mbx_cmd_t mc; | |
4309 | mbx_cmd_t *mcp = &mc; | |
73208dfd AC |
4310 | struct qla_hw_data *ha = vha->hw; |
4311 | ||
45235022 QT |
4312 | if (!ha->flags.fw_started) |
4313 | return QLA_SUCCESS; | |
4314 | ||
5f28d2d7 SK |
4315 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d3, |
4316 | "Entered %s.\n", __func__); | |
7c3df132 | 4317 | |
7c6300e3 JC |
4318 | if (IS_SHADOW_REG_CAPABLE(ha)) |
4319 | req->options |= BIT_13; | |
4320 | ||
73208dfd | 4321 | mcp->mb[0] = MBC_INITIALIZE_MULTIQ; |
618a7523 | 4322 | mcp->mb[1] = req->options; |
73208dfd AC |
4323 | mcp->mb[2] = MSW(LSD(req->dma)); |
4324 | mcp->mb[3] = LSW(LSD(req->dma)); | |
4325 | mcp->mb[6] = MSW(MSD(req->dma)); | |
4326 | mcp->mb[7] = LSW(MSD(req->dma)); | |
4327 | mcp->mb[5] = req->length; | |
4328 | if (req->rsp) | |
4329 | mcp->mb[10] = req->rsp->id; | |
4330 | mcp->mb[12] = req->qos; | |
4331 | mcp->mb[11] = req->vp_idx; | |
4332 | mcp->mb[13] = req->rid; | |
f73cb695 | 4333 | if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) |
6246b8a1 | 4334 | mcp->mb[15] = 0; |
73208dfd | 4335 | |
73208dfd AC |
4336 | mcp->mb[4] = req->id; |
4337 | /* que in ptr index */ | |
4338 | mcp->mb[8] = 0; | |
4339 | /* que out ptr index */ | |
7c6300e3 | 4340 | mcp->mb[9] = *req->out_ptr = 0; |
73208dfd AC |
4341 | mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7| |
4342 | MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
4343 | mcp->in_mb = MBX_0; | |
4344 | mcp->flags = MBX_DMA_OUT; | |
6246b8a1 GM |
4345 | mcp->tov = MBX_TOV_SECONDS * 2; |
4346 | ||
f73cb695 | 4347 | if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) |
6246b8a1 | 4348 | mcp->in_mb |= MBX_1; |
ba4828b7 | 4349 | if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { |
6246b8a1 GM |
4350 | mcp->out_mb |= MBX_15; |
4351 | /* debug q create issue in SR-IOV */ | |
4352 | mcp->in_mb |= MBX_9 | MBX_8 | MBX_7; | |
4353 | } | |
73208dfd AC |
4354 | |
4355 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
618a7523 | 4356 | if (!(req->options & BIT_0)) { |
da9b1d5c | 4357 | WRT_REG_DWORD(req->req_q_in, 0); |
29db41c3 | 4358 | if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) |
da9b1d5c | 4359 | WRT_REG_DWORD(req->req_q_out, 0); |
73208dfd AC |
4360 | } |
4361 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
4362 | ||
17d98630 | 4363 | rval = qla2x00_mailbox_command(vha, mcp); |
7c3df132 SK |
4364 | if (rval != QLA_SUCCESS) { |
4365 | ql_dbg(ql_dbg_mbx, vha, 0x10d4, | |
4366 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
4367 | } else { | |
5f28d2d7 SK |
4368 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d5, |
4369 | "Done %s.\n", __func__); | |
7c3df132 SK |
4370 | } |
4371 | ||
73208dfd AC |
4372 | return rval; |
4373 | } | |
4374 | ||
4375 | int | |
618a7523 | 4376 | qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp) |
73208dfd AC |
4377 | { |
4378 | int rval; | |
4379 | unsigned long flags; | |
4380 | mbx_cmd_t mc; | |
4381 | mbx_cmd_t *mcp = &mc; | |
73208dfd AC |
4382 | struct qla_hw_data *ha = vha->hw; |
4383 | ||
45235022 QT |
4384 | if (!ha->flags.fw_started) |
4385 | return QLA_SUCCESS; | |
4386 | ||
5f28d2d7 SK |
4387 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d6, |
4388 | "Entered %s.\n", __func__); | |
7c3df132 | 4389 | |
7c6300e3 JC |
4390 | if (IS_SHADOW_REG_CAPABLE(ha)) |
4391 | rsp->options |= BIT_13; | |
4392 | ||
73208dfd | 4393 | mcp->mb[0] = MBC_INITIALIZE_MULTIQ; |
618a7523 | 4394 | mcp->mb[1] = rsp->options; |
73208dfd AC |
4395 | mcp->mb[2] = MSW(LSD(rsp->dma)); |
4396 | mcp->mb[3] = LSW(LSD(rsp->dma)); | |
4397 | mcp->mb[6] = MSW(MSD(rsp->dma)); | |
4398 | mcp->mb[7] = LSW(MSD(rsp->dma)); | |
4399 | mcp->mb[5] = rsp->length; | |
444786d7 | 4400 | mcp->mb[14] = rsp->msix->entry; |
73208dfd | 4401 | mcp->mb[13] = rsp->rid; |
f73cb695 | 4402 | if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) |
6246b8a1 | 4403 | mcp->mb[15] = 0; |
73208dfd | 4404 | |
73208dfd AC |
4405 | mcp->mb[4] = rsp->id; |
4406 | /* que in ptr index */ | |
7c6300e3 | 4407 | mcp->mb[8] = *rsp->in_ptr = 0; |
73208dfd AC |
4408 | /* que out ptr index */ |
4409 | mcp->mb[9] = 0; | |
2afa19a9 | 4410 | mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7 |
73208dfd AC |
4411 | |MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; |
4412 | mcp->in_mb = MBX_0; | |
4413 | mcp->flags = MBX_DMA_OUT; | |
6246b8a1 GM |
4414 | mcp->tov = MBX_TOV_SECONDS * 2; |
4415 | ||
4416 | if (IS_QLA81XX(ha)) { | |
4417 | mcp->out_mb |= MBX_12|MBX_11|MBX_10; | |
4418 | mcp->in_mb |= MBX_1; | |
f73cb695 | 4419 | } else if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { |
6246b8a1 GM |
4420 | mcp->out_mb |= MBX_15|MBX_12|MBX_11|MBX_10; |
4421 | mcp->in_mb |= MBX_1; | |
4422 | /* debug q create issue in SR-IOV */ | |
4423 | mcp->in_mb |= MBX_9 | MBX_8 | MBX_7; | |
4424 | } | |
73208dfd AC |
4425 | |
4426 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
618a7523 | 4427 | if (!(rsp->options & BIT_0)) { |
da9b1d5c | 4428 | WRT_REG_DWORD(rsp->rsp_q_out, 0); |
b20f02e1 | 4429 | if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) |
da9b1d5c | 4430 | WRT_REG_DWORD(rsp->rsp_q_in, 0); |
73208dfd AC |
4431 | } |
4432 | ||
4433 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
4434 | ||
17d98630 | 4435 | rval = qla2x00_mailbox_command(vha, mcp); |
7c3df132 SK |
4436 | if (rval != QLA_SUCCESS) { |
4437 | ql_dbg(ql_dbg_mbx, vha, 0x10d7, | |
4438 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
4439 | } else { | |
5f28d2d7 SK |
4440 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d8, |
4441 | "Done %s.\n", __func__); | |
7c3df132 SK |
4442 | } |
4443 | ||
73208dfd AC |
4444 | return rval; |
4445 | } | |
4446 | ||
8a659571 AV |
4447 | int |
4448 | qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb) | |
4449 | { | |
4450 | int rval; | |
4451 | mbx_cmd_t mc; | |
4452 | mbx_cmd_t *mcp = &mc; | |
4453 | ||
5f28d2d7 SK |
4454 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d9, |
4455 | "Entered %s.\n", __func__); | |
8a659571 AV |
4456 | |
4457 | mcp->mb[0] = MBC_IDC_ACK; | |
4458 | memcpy(&mcp->mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t)); | |
4459 | mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
4460 | mcp->in_mb = MBX_0; | |
4461 | mcp->tov = MBX_TOV_SECONDS; | |
4462 | mcp->flags = 0; | |
4463 | rval = qla2x00_mailbox_command(vha, mcp); | |
4464 | ||
4465 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4466 | ql_dbg(ql_dbg_mbx, vha, 0x10da, |
4467 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
8a659571 | 4468 | } else { |
5f28d2d7 SK |
4469 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10db, |
4470 | "Done %s.\n", __func__); | |
8a659571 AV |
4471 | } |
4472 | ||
4473 | return rval; | |
4474 | } | |
1d2874de JC |
4475 | |
4476 | int | |
4477 | qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size) | |
4478 | { | |
4479 | int rval; | |
4480 | mbx_cmd_t mc; | |
4481 | mbx_cmd_t *mcp = &mc; | |
4482 | ||
5f28d2d7 SK |
4483 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10dc, |
4484 | "Entered %s.\n", __func__); | |
7c3df132 | 4485 | |
f73cb695 CD |
4486 | if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) && |
4487 | !IS_QLA27XX(vha->hw)) | |
1d2874de JC |
4488 | return QLA_FUNCTION_FAILED; |
4489 | ||
1d2874de JC |
4490 | mcp->mb[0] = MBC_FLASH_ACCESS_CTRL; |
4491 | mcp->mb[1] = FAC_OPT_CMD_GET_SECTOR_SIZE; | |
4492 | mcp->out_mb = MBX_1|MBX_0; | |
4493 | mcp->in_mb = MBX_1|MBX_0; | |
4494 | mcp->tov = MBX_TOV_SECONDS; | |
4495 | mcp->flags = 0; | |
4496 | rval = qla2x00_mailbox_command(vha, mcp); | |
4497 | ||
4498 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4499 | ql_dbg(ql_dbg_mbx, vha, 0x10dd, |
4500 | "Failed=%x mb[0]=%x mb[1]=%x.\n", | |
4501 | rval, mcp->mb[0], mcp->mb[1]); | |
1d2874de | 4502 | } else { |
5f28d2d7 SK |
4503 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10de, |
4504 | "Done %s.\n", __func__); | |
1d2874de JC |
4505 | *sector_size = mcp->mb[1]; |
4506 | } | |
4507 | ||
4508 | return rval; | |
4509 | } | |
4510 | ||
4511 | int | |
4512 | qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable) | |
4513 | { | |
4514 | int rval; | |
4515 | mbx_cmd_t mc; | |
4516 | mbx_cmd_t *mcp = &mc; | |
4517 | ||
f73cb695 CD |
4518 | if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) && |
4519 | !IS_QLA27XX(vha->hw)) | |
1d2874de JC |
4520 | return QLA_FUNCTION_FAILED; |
4521 | ||
5f28d2d7 SK |
4522 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10df, |
4523 | "Entered %s.\n", __func__); | |
1d2874de JC |
4524 | |
4525 | mcp->mb[0] = MBC_FLASH_ACCESS_CTRL; | |
4526 | mcp->mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE : | |
4527 | FAC_OPT_CMD_WRITE_PROTECT; | |
4528 | mcp->out_mb = MBX_1|MBX_0; | |
4529 | mcp->in_mb = MBX_1|MBX_0; | |
4530 | mcp->tov = MBX_TOV_SECONDS; | |
4531 | mcp->flags = 0; | |
4532 | rval = qla2x00_mailbox_command(vha, mcp); | |
4533 | ||
4534 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4535 | ql_dbg(ql_dbg_mbx, vha, 0x10e0, |
4536 | "Failed=%x mb[0]=%x mb[1]=%x.\n", | |
4537 | rval, mcp->mb[0], mcp->mb[1]); | |
1d2874de | 4538 | } else { |
5f28d2d7 SK |
4539 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e1, |
4540 | "Done %s.\n", __func__); | |
1d2874de JC |
4541 | } |
4542 | ||
4543 | return rval; | |
4544 | } | |
4545 | ||
4546 | int | |
4547 | qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish) | |
4548 | { | |
4549 | int rval; | |
4550 | mbx_cmd_t mc; | |
4551 | mbx_cmd_t *mcp = &mc; | |
4552 | ||
f73cb695 CD |
4553 | if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) && |
4554 | !IS_QLA27XX(vha->hw)) | |
1d2874de JC |
4555 | return QLA_FUNCTION_FAILED; |
4556 | ||
5f28d2d7 SK |
4557 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e2, |
4558 | "Entered %s.\n", __func__); | |
1d2874de JC |
4559 | |
4560 | mcp->mb[0] = MBC_FLASH_ACCESS_CTRL; | |
4561 | mcp->mb[1] = FAC_OPT_CMD_ERASE_SECTOR; | |
4562 | mcp->mb[2] = LSW(start); | |
4563 | mcp->mb[3] = MSW(start); | |
4564 | mcp->mb[4] = LSW(finish); | |
4565 | mcp->mb[5] = MSW(finish); | |
4566 | mcp->out_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
4567 | mcp->in_mb = MBX_2|MBX_1|MBX_0; | |
4568 | mcp->tov = MBX_TOV_SECONDS; | |
4569 | mcp->flags = 0; | |
4570 | rval = qla2x00_mailbox_command(vha, mcp); | |
4571 | ||
4572 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4573 | ql_dbg(ql_dbg_mbx, vha, 0x10e3, |
4574 | "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n", | |
4575 | rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]); | |
1d2874de | 4576 | } else { |
5f28d2d7 SK |
4577 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e4, |
4578 | "Done %s.\n", __func__); | |
1d2874de JC |
4579 | } |
4580 | ||
4581 | return rval; | |
4582 | } | |
6e181be5 LC |
4583 | |
4584 | int | |
4585 | qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha) | |
4586 | { | |
4587 | int rval = 0; | |
4588 | mbx_cmd_t mc; | |
4589 | mbx_cmd_t *mcp = &mc; | |
4590 | ||
5f28d2d7 SK |
4591 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e5, |
4592 | "Entered %s.\n", __func__); | |
6e181be5 LC |
4593 | |
4594 | mcp->mb[0] = MBC_RESTART_MPI_FW; | |
4595 | mcp->out_mb = MBX_0; | |
4596 | mcp->in_mb = MBX_0|MBX_1; | |
4597 | mcp->tov = MBX_TOV_SECONDS; | |
4598 | mcp->flags = 0; | |
4599 | rval = qla2x00_mailbox_command(vha, mcp); | |
4600 | ||
4601 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4602 | ql_dbg(ql_dbg_mbx, vha, 0x10e6, |
4603 | "Failed=%x mb[0]=%x mb[1]=%x.\n", | |
4604 | rval, mcp->mb[0], mcp->mb[1]); | |
6e181be5 | 4605 | } else { |
5f28d2d7 SK |
4606 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e7, |
4607 | "Done %s.\n", __func__); | |
6e181be5 LC |
4608 | } |
4609 | ||
4610 | return rval; | |
4611 | } | |
ad0ecd61 | 4612 | |
c46e65c7 JC |
4613 | int |
4614 | qla82xx_set_driver_version(scsi_qla_host_t *vha, char *version) | |
4615 | { | |
4616 | int rval; | |
4617 | mbx_cmd_t mc; | |
4618 | mbx_cmd_t *mcp = &mc; | |
4619 | int i; | |
4620 | int len; | |
4621 | uint16_t *str; | |
4622 | struct qla_hw_data *ha = vha->hw; | |
4623 | ||
4624 | if (!IS_P3P_TYPE(ha)) | |
4625 | return QLA_FUNCTION_FAILED; | |
4626 | ||
4627 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117b, | |
4628 | "Entered %s.\n", __func__); | |
4629 | ||
4630 | str = (void *)version; | |
4631 | len = strlen(version); | |
4632 | ||
4633 | mcp->mb[0] = MBC_SET_RNID_PARAMS; | |
4634 | mcp->mb[1] = RNID_TYPE_SET_VERSION << 8; | |
4635 | mcp->out_mb = MBX_1|MBX_0; | |
4636 | for (i = 4; i < 16 && len; i++, str++, len -= 2) { | |
4637 | mcp->mb[i] = cpu_to_le16p(str); | |
4638 | mcp->out_mb |= 1<<i; | |
4639 | } | |
4640 | for (; i < 16; i++) { | |
4641 | mcp->mb[i] = 0; | |
4642 | mcp->out_mb |= 1<<i; | |
4643 | } | |
4644 | mcp->in_mb = MBX_1|MBX_0; | |
4645 | mcp->tov = MBX_TOV_SECONDS; | |
4646 | mcp->flags = 0; | |
4647 | rval = qla2x00_mailbox_command(vha, mcp); | |
4648 | ||
4649 | if (rval != QLA_SUCCESS) { | |
4650 | ql_dbg(ql_dbg_mbx, vha, 0x117c, | |
4651 | "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]); | |
4652 | } else { | |
4653 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117d, | |
4654 | "Done %s.\n", __func__); | |
4655 | } | |
4656 | ||
4657 | return rval; | |
4658 | } | |
4659 | ||
4660 | int | |
4661 | qla25xx_set_driver_version(scsi_qla_host_t *vha, char *version) | |
4662 | { | |
4663 | int rval; | |
4664 | mbx_cmd_t mc; | |
4665 | mbx_cmd_t *mcp = &mc; | |
4666 | int len; | |
4667 | uint16_t dwlen; | |
4668 | uint8_t *str; | |
4669 | dma_addr_t str_dma; | |
4670 | struct qla_hw_data *ha = vha->hw; | |
4671 | ||
4672 | if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha) || | |
4673 | IS_P3P_TYPE(ha)) | |
4674 | return QLA_FUNCTION_FAILED; | |
4675 | ||
4676 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117e, | |
4677 | "Entered %s.\n", __func__); | |
4678 | ||
4679 | str = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &str_dma); | |
4680 | if (!str) { | |
4681 | ql_log(ql_log_warn, vha, 0x117f, | |
4682 | "Failed to allocate driver version param.\n"); | |
4683 | return QLA_MEMORY_ALLOC_FAILED; | |
4684 | } | |
4685 | ||
4686 | memcpy(str, "\x7\x3\x11\x0", 4); | |
4687 | dwlen = str[0]; | |
4688 | len = dwlen * 4 - 4; | |
4689 | memset(str + 4, 0, len); | |
4690 | if (len > strlen(version)) | |
4691 | len = strlen(version); | |
4692 | memcpy(str + 4, version, len); | |
4693 | ||
4694 | mcp->mb[0] = MBC_SET_RNID_PARAMS; | |
4695 | mcp->mb[1] = RNID_TYPE_SET_VERSION << 8 | dwlen; | |
4696 | mcp->mb[2] = MSW(LSD(str_dma)); | |
4697 | mcp->mb[3] = LSW(LSD(str_dma)); | |
4698 | mcp->mb[6] = MSW(MSD(str_dma)); | |
4699 | mcp->mb[7] = LSW(MSD(str_dma)); | |
4700 | mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; | |
4701 | mcp->in_mb = MBX_1|MBX_0; | |
4702 | mcp->tov = MBX_TOV_SECONDS; | |
4703 | mcp->flags = 0; | |
4704 | rval = qla2x00_mailbox_command(vha, mcp); | |
4705 | ||
4706 | if (rval != QLA_SUCCESS) { | |
4707 | ql_dbg(ql_dbg_mbx, vha, 0x1180, | |
4708 | "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]); | |
4709 | } else { | |
4710 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1181, | |
4711 | "Done %s.\n", __func__); | |
4712 | } | |
4713 | ||
4714 | dma_pool_free(ha->s_dma_pool, str, str_dma); | |
4715 | ||
4716 | return rval; | |
4717 | } | |
4718 | ||
edd05de1 DG |
4719 | int |
4720 | qla24xx_get_port_login_templ(scsi_qla_host_t *vha, dma_addr_t buf_dma, | |
4721 | void *buf, uint16_t bufsiz) | |
4722 | { | |
4723 | int rval, i; | |
4724 | mbx_cmd_t mc; | |
4725 | mbx_cmd_t *mcp = &mc; | |
4726 | uint32_t *bp; | |
4727 | ||
4728 | if (!IS_FWI2_CAPABLE(vha->hw)) | |
4729 | return QLA_FUNCTION_FAILED; | |
4730 | ||
4731 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1159, | |
4732 | "Entered %s.\n", __func__); | |
4733 | ||
4734 | mcp->mb[0] = MBC_GET_RNID_PARAMS; | |
4735 | mcp->mb[1] = RNID_TYPE_PORT_LOGIN << 8; | |
4736 | mcp->mb[2] = MSW(buf_dma); | |
4737 | mcp->mb[3] = LSW(buf_dma); | |
4738 | mcp->mb[6] = MSW(MSD(buf_dma)); | |
4739 | mcp->mb[7] = LSW(MSD(buf_dma)); | |
4740 | mcp->mb[8] = bufsiz/4; | |
4741 | mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
4742 | mcp->in_mb = MBX_1|MBX_0; | |
4743 | mcp->tov = MBX_TOV_SECONDS; | |
4744 | mcp->flags = 0; | |
4745 | rval = qla2x00_mailbox_command(vha, mcp); | |
4746 | ||
4747 | if (rval != QLA_SUCCESS) { | |
4748 | ql_dbg(ql_dbg_mbx, vha, 0x115a, | |
4749 | "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]); | |
4750 | } else { | |
4751 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x115b, | |
4752 | "Done %s.\n", __func__); | |
4753 | bp = (uint32_t *) buf; | |
4754 | for (i = 0; i < (bufsiz-4)/4; i++, bp++) | |
8777e431 | 4755 | *bp = le32_to_cpu(*bp); |
edd05de1 DG |
4756 | } |
4757 | ||
4758 | return rval; | |
4759 | } | |
4760 | ||
fe52f6e1 JC |
4761 | static int |
4762 | qla2x00_read_asic_temperature(scsi_qla_host_t *vha, uint16_t *temp) | |
4763 | { | |
4764 | int rval; | |
4765 | mbx_cmd_t mc; | |
4766 | mbx_cmd_t *mcp = &mc; | |
4767 | ||
4768 | if (!IS_FWI2_CAPABLE(vha->hw)) | |
4769 | return QLA_FUNCTION_FAILED; | |
4770 | ||
4771 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1159, | |
4772 | "Entered %s.\n", __func__); | |
4773 | ||
4774 | mcp->mb[0] = MBC_GET_RNID_PARAMS; | |
4775 | mcp->mb[1] = RNID_TYPE_ASIC_TEMP << 8; | |
4776 | mcp->out_mb = MBX_1|MBX_0; | |
4777 | mcp->in_mb = MBX_1|MBX_0; | |
4778 | mcp->tov = MBX_TOV_SECONDS; | |
4779 | mcp->flags = 0; | |
4780 | rval = qla2x00_mailbox_command(vha, mcp); | |
4781 | *temp = mcp->mb[1]; | |
4782 | ||
4783 | if (rval != QLA_SUCCESS) { | |
4784 | ql_dbg(ql_dbg_mbx, vha, 0x115a, | |
4785 | "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]); | |
4786 | } else { | |
4787 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x115b, | |
4788 | "Done %s.\n", __func__); | |
4789 | } | |
4790 | ||
4791 | return rval; | |
4792 | } | |
4793 | ||
ad0ecd61 | 4794 | int |
6766df9e JC |
4795 | qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp, |
4796 | uint16_t dev, uint16_t off, uint16_t len, uint16_t opt) | |
ad0ecd61 JC |
4797 | { |
4798 | int rval; | |
4799 | mbx_cmd_t mc; | |
4800 | mbx_cmd_t *mcp = &mc; | |
6766df9e JC |
4801 | struct qla_hw_data *ha = vha->hw; |
4802 | ||
5f28d2d7 SK |
4803 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8, |
4804 | "Entered %s.\n", __func__); | |
7c3df132 | 4805 | |
6766df9e JC |
4806 | if (!IS_FWI2_CAPABLE(ha)) |
4807 | return QLA_FUNCTION_FAILED; | |
ad0ecd61 | 4808 | |
6766df9e JC |
4809 | if (len == 1) |
4810 | opt |= BIT_0; | |
4811 | ||
ad0ecd61 JC |
4812 | mcp->mb[0] = MBC_READ_SFP; |
4813 | mcp->mb[1] = dev; | |
4814 | mcp->mb[2] = MSW(sfp_dma); | |
4815 | mcp->mb[3] = LSW(sfp_dma); | |
4816 | mcp->mb[6] = MSW(MSD(sfp_dma)); | |
4817 | mcp->mb[7] = LSW(MSD(sfp_dma)); | |
4818 | mcp->mb[8] = len; | |
6766df9e | 4819 | mcp->mb[9] = off; |
ad0ecd61 JC |
4820 | mcp->mb[10] = opt; |
4821 | mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; | |
1bff6cc8 | 4822 | mcp->in_mb = MBX_1|MBX_0; |
ad0ecd61 JC |
4823 | mcp->tov = MBX_TOV_SECONDS; |
4824 | mcp->flags = 0; | |
4825 | rval = qla2x00_mailbox_command(vha, mcp); | |
4826 | ||
4827 | if (opt & BIT_0) | |
6766df9e | 4828 | *sfp = mcp->mb[1]; |
ad0ecd61 JC |
4829 | |
4830 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4831 | ql_dbg(ql_dbg_mbx, vha, 0x10e9, |
4832 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
e4e3a2ce QT |
4833 | if (mcp->mb[0] == MBS_COMMAND_ERROR && |
4834 | mcp->mb[1] == 0x22) | |
4835 | /* sfp is not there */ | |
4836 | rval = QLA_INTERFACE_ERROR; | |
ad0ecd61 | 4837 | } else { |
5f28d2d7 SK |
4838 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea, |
4839 | "Done %s.\n", __func__); | |
ad0ecd61 JC |
4840 | } |
4841 | ||
4842 | return rval; | |
4843 | } | |
4844 | ||
4845 | int | |
6766df9e JC |
4846 | qla2x00_write_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp, |
4847 | uint16_t dev, uint16_t off, uint16_t len, uint16_t opt) | |
ad0ecd61 JC |
4848 | { |
4849 | int rval; | |
4850 | mbx_cmd_t mc; | |
4851 | mbx_cmd_t *mcp = &mc; | |
6766df9e JC |
4852 | struct qla_hw_data *ha = vha->hw; |
4853 | ||
5f28d2d7 SK |
4854 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10eb, |
4855 | "Entered %s.\n", __func__); | |
7c3df132 | 4856 | |
6766df9e JC |
4857 | if (!IS_FWI2_CAPABLE(ha)) |
4858 | return QLA_FUNCTION_FAILED; | |
ad0ecd61 | 4859 | |
6766df9e JC |
4860 | if (len == 1) |
4861 | opt |= BIT_0; | |
4862 | ||
ad0ecd61 | 4863 | if (opt & BIT_0) |
6766df9e | 4864 | len = *sfp; |
ad0ecd61 JC |
4865 | |
4866 | mcp->mb[0] = MBC_WRITE_SFP; | |
4867 | mcp->mb[1] = dev; | |
4868 | mcp->mb[2] = MSW(sfp_dma); | |
4869 | mcp->mb[3] = LSW(sfp_dma); | |
4870 | mcp->mb[6] = MSW(MSD(sfp_dma)); | |
4871 | mcp->mb[7] = LSW(MSD(sfp_dma)); | |
4872 | mcp->mb[8] = len; | |
6766df9e | 4873 | mcp->mb[9] = off; |
ad0ecd61 JC |
4874 | mcp->mb[10] = opt; |
4875 | mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; | |
6766df9e | 4876 | mcp->in_mb = MBX_1|MBX_0; |
ad0ecd61 JC |
4877 | mcp->tov = MBX_TOV_SECONDS; |
4878 | mcp->flags = 0; | |
4879 | rval = qla2x00_mailbox_command(vha, mcp); | |
4880 | ||
4881 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4882 | ql_dbg(ql_dbg_mbx, vha, 0x10ec, |
4883 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
ad0ecd61 | 4884 | } else { |
5f28d2d7 SK |
4885 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ed, |
4886 | "Done %s.\n", __func__); | |
ad0ecd61 JC |
4887 | } |
4888 | ||
4889 | return rval; | |
4890 | } | |
ce0423f4 AV |
4891 | |
4892 | int | |
4893 | qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma, | |
4894 | uint16_t size_in_bytes, uint16_t *actual_size) | |
4895 | { | |
4896 | int rval; | |
4897 | mbx_cmd_t mc; | |
4898 | mbx_cmd_t *mcp = &mc; | |
4899 | ||
5f28d2d7 SK |
4900 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ee, |
4901 | "Entered %s.\n", __func__); | |
7c3df132 | 4902 | |
6246b8a1 | 4903 | if (!IS_CNA_CAPABLE(vha->hw)) |
ce0423f4 AV |
4904 | return QLA_FUNCTION_FAILED; |
4905 | ||
ce0423f4 AV |
4906 | mcp->mb[0] = MBC_GET_XGMAC_STATS; |
4907 | mcp->mb[2] = MSW(stats_dma); | |
4908 | mcp->mb[3] = LSW(stats_dma); | |
4909 | mcp->mb[6] = MSW(MSD(stats_dma)); | |
4910 | mcp->mb[7] = LSW(MSD(stats_dma)); | |
4911 | mcp->mb[8] = size_in_bytes >> 2; | |
4912 | mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0; | |
4913 | mcp->in_mb = MBX_2|MBX_1|MBX_0; | |
4914 | mcp->tov = MBX_TOV_SECONDS; | |
4915 | mcp->flags = 0; | |
4916 | rval = qla2x00_mailbox_command(vha, mcp); | |
4917 | ||
4918 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4919 | ql_dbg(ql_dbg_mbx, vha, 0x10ef, |
4920 | "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n", | |
4921 | rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]); | |
ce0423f4 | 4922 | } else { |
5f28d2d7 SK |
4923 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f0, |
4924 | "Done %s.\n", __func__); | |
7c3df132 | 4925 | |
ce0423f4 AV |
4926 | |
4927 | *actual_size = mcp->mb[2] << 2; | |
4928 | } | |
4929 | ||
4930 | return rval; | |
4931 | } | |
11bbc1d8 AV |
4932 | |
4933 | int | |
4934 | qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma, | |
4935 | uint16_t size) | |
4936 | { | |
4937 | int rval; | |
4938 | mbx_cmd_t mc; | |
4939 | mbx_cmd_t *mcp = &mc; | |
4940 | ||
5f28d2d7 SK |
4941 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f1, |
4942 | "Entered %s.\n", __func__); | |
7c3df132 | 4943 | |
6246b8a1 | 4944 | if (!IS_CNA_CAPABLE(vha->hw)) |
11bbc1d8 AV |
4945 | return QLA_FUNCTION_FAILED; |
4946 | ||
11bbc1d8 AV |
4947 | mcp->mb[0] = MBC_GET_DCBX_PARAMS; |
4948 | mcp->mb[1] = 0; | |
4949 | mcp->mb[2] = MSW(tlv_dma); | |
4950 | mcp->mb[3] = LSW(tlv_dma); | |
4951 | mcp->mb[6] = MSW(MSD(tlv_dma)); | |
4952 | mcp->mb[7] = LSW(MSD(tlv_dma)); | |
4953 | mcp->mb[8] = size; | |
4954 | mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; | |
4955 | mcp->in_mb = MBX_2|MBX_1|MBX_0; | |
4956 | mcp->tov = MBX_TOV_SECONDS; | |
4957 | mcp->flags = 0; | |
4958 | rval = qla2x00_mailbox_command(vha, mcp); | |
4959 | ||
4960 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4961 | ql_dbg(ql_dbg_mbx, vha, 0x10f2, |
4962 | "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n", | |
4963 | rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]); | |
11bbc1d8 | 4964 | } else { |
5f28d2d7 SK |
4965 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f3, |
4966 | "Done %s.\n", __func__); | |
11bbc1d8 AV |
4967 | } |
4968 | ||
4969 | return rval; | |
4970 | } | |
18e7555a AV |
4971 | |
4972 | int | |
4973 | qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data) | |
4974 | { | |
4975 | int rval; | |
4976 | mbx_cmd_t mc; | |
4977 | mbx_cmd_t *mcp = &mc; | |
4978 | ||
5f28d2d7 SK |
4979 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f4, |
4980 | "Entered %s.\n", __func__); | |
7c3df132 | 4981 | |
18e7555a AV |
4982 | if (!IS_FWI2_CAPABLE(vha->hw)) |
4983 | return QLA_FUNCTION_FAILED; | |
4984 | ||
18e7555a AV |
4985 | mcp->mb[0] = MBC_READ_RAM_EXTENDED; |
4986 | mcp->mb[1] = LSW(risc_addr); | |
4987 | mcp->mb[8] = MSW(risc_addr); | |
4988 | mcp->out_mb = MBX_8|MBX_1|MBX_0; | |
4989 | mcp->in_mb = MBX_3|MBX_2|MBX_0; | |
4990 | mcp->tov = 30; | |
4991 | mcp->flags = 0; | |
4992 | rval = qla2x00_mailbox_command(vha, mcp); | |
4993 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4994 | ql_dbg(ql_dbg_mbx, vha, 0x10f5, |
4995 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
18e7555a | 4996 | } else { |
5f28d2d7 SK |
4997 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f6, |
4998 | "Done %s.\n", __func__); | |
18e7555a AV |
4999 | *data = mcp->mb[3] << 16 | mcp->mb[2]; |
5000 | } | |
5001 | ||
5002 | return rval; | |
5003 | } | |
5004 | ||
9a069e19 | 5005 | int |
a9083016 GM |
5006 | qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq, |
5007 | uint16_t *mresp) | |
9a069e19 GM |
5008 | { |
5009 | int rval; | |
5010 | mbx_cmd_t mc; | |
5011 | mbx_cmd_t *mcp = &mc; | |
9a069e19 | 5012 | |
5f28d2d7 SK |
5013 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f7, |
5014 | "Entered %s.\n", __func__); | |
9a069e19 GM |
5015 | |
5016 | memset(mcp->mb, 0 , sizeof(mcp->mb)); | |
5017 | mcp->mb[0] = MBC_DIAGNOSTIC_LOOP_BACK; | |
5018 | mcp->mb[1] = mreq->options | BIT_6; // BIT_6 specifies 64 bit addressing | |
5019 | ||
5020 | /* transfer count */ | |
5021 | mcp->mb[10] = LSW(mreq->transfer_size); | |
5022 | mcp->mb[11] = MSW(mreq->transfer_size); | |
5023 | ||
5024 | /* send data address */ | |
5025 | mcp->mb[14] = LSW(mreq->send_dma); | |
5026 | mcp->mb[15] = MSW(mreq->send_dma); | |
5027 | mcp->mb[20] = LSW(MSD(mreq->send_dma)); | |
5028 | mcp->mb[21] = MSW(MSD(mreq->send_dma)); | |
5029 | ||
25985edc | 5030 | /* receive data address */ |
9a069e19 GM |
5031 | mcp->mb[16] = LSW(mreq->rcv_dma); |
5032 | mcp->mb[17] = MSW(mreq->rcv_dma); | |
5033 | mcp->mb[6] = LSW(MSD(mreq->rcv_dma)); | |
5034 | mcp->mb[7] = MSW(MSD(mreq->rcv_dma)); | |
5035 | ||
5036 | /* Iteration count */ | |
1b98b421 JC |
5037 | mcp->mb[18] = LSW(mreq->iteration_count); |
5038 | mcp->mb[19] = MSW(mreq->iteration_count); | |
9a069e19 GM |
5039 | |
5040 | mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15| | |
5041 | MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0; | |
6246b8a1 | 5042 | if (IS_CNA_CAPABLE(vha->hw)) |
9a069e19 GM |
5043 | mcp->out_mb |= MBX_2; |
5044 | mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0; | |
5045 | ||
5046 | mcp->buf_size = mreq->transfer_size; | |
5047 | mcp->tov = MBX_TOV_SECONDS; | |
5048 | mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD; | |
5049 | ||
5050 | rval = qla2x00_mailbox_command(vha, mcp); | |
5051 | ||
5052 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
5053 | ql_dbg(ql_dbg_mbx, vha, 0x10f8, |
5054 | "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[18]=%x " | |
5055 | "mb[19]=%x.\n", rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], | |
5056 | mcp->mb[3], mcp->mb[18], mcp->mb[19]); | |
9a069e19 | 5057 | } else { |
5f28d2d7 SK |
5058 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f9, |
5059 | "Done %s.\n", __func__); | |
9a069e19 GM |
5060 | } |
5061 | ||
5062 | /* Copy mailbox information */ | |
5063 | memcpy( mresp, mcp->mb, 64); | |
9a069e19 GM |
5064 | return rval; |
5065 | } | |
5066 | ||
5067 | int | |
a9083016 GM |
5068 | qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq, |
5069 | uint16_t *mresp) | |
9a069e19 GM |
5070 | { |
5071 | int rval; | |
5072 | mbx_cmd_t mc; | |
5073 | mbx_cmd_t *mcp = &mc; | |
5074 | struct qla_hw_data *ha = vha->hw; | |
5075 | ||
5f28d2d7 SK |
5076 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fa, |
5077 | "Entered %s.\n", __func__); | |
9a069e19 GM |
5078 | |
5079 | memset(mcp->mb, 0 , sizeof(mcp->mb)); | |
5080 | mcp->mb[0] = MBC_DIAGNOSTIC_ECHO; | |
1d634965 JC |
5081 | /* BIT_6 specifies 64bit address */ |
5082 | mcp->mb[1] = mreq->options | BIT_15 | BIT_6; | |
6246b8a1 | 5083 | if (IS_CNA_CAPABLE(ha)) { |
a9083016 GM |
5084 | mcp->mb[2] = vha->fcoe_fcf_idx; |
5085 | } | |
9a069e19 GM |
5086 | mcp->mb[16] = LSW(mreq->rcv_dma); |
5087 | mcp->mb[17] = MSW(mreq->rcv_dma); | |
5088 | mcp->mb[6] = LSW(MSD(mreq->rcv_dma)); | |
5089 | mcp->mb[7] = MSW(MSD(mreq->rcv_dma)); | |
5090 | ||
5091 | mcp->mb[10] = LSW(mreq->transfer_size); | |
5092 | ||
5093 | mcp->mb[14] = LSW(mreq->send_dma); | |
5094 | mcp->mb[15] = MSW(mreq->send_dma); | |
5095 | mcp->mb[20] = LSW(MSD(mreq->send_dma)); | |
5096 | mcp->mb[21] = MSW(MSD(mreq->send_dma)); | |
5097 | ||
5098 | mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15| | |
5099 | MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0; | |
6246b8a1 | 5100 | if (IS_CNA_CAPABLE(ha)) |
9a069e19 GM |
5101 | mcp->out_mb |= MBX_2; |
5102 | ||
5103 | mcp->in_mb = MBX_0; | |
6246b8a1 GM |
5104 | if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) || |
5105 | IS_CNA_CAPABLE(ha) || IS_QLA2031(ha)) | |
9a069e19 | 5106 | mcp->in_mb |= MBX_1; |
6246b8a1 | 5107 | if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha)) |
9a069e19 GM |
5108 | mcp->in_mb |= MBX_3; |
5109 | ||
5110 | mcp->tov = MBX_TOV_SECONDS; | |
5111 | mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD; | |
5112 | mcp->buf_size = mreq->transfer_size; | |
5113 | ||
5114 | rval = qla2x00_mailbox_command(vha, mcp); | |
5115 | ||
5116 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
5117 | ql_dbg(ql_dbg_mbx, vha, 0x10fb, |
5118 | "Failed=%x mb[0]=%x mb[1]=%x.\n", | |
5119 | rval, mcp->mb[0], mcp->mb[1]); | |
9a069e19 | 5120 | } else { |
5f28d2d7 SK |
5121 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fc, |
5122 | "Done %s.\n", __func__); | |
9a069e19 GM |
5123 | } |
5124 | ||
5125 | /* Copy mailbox information */ | |
6dbdda4d | 5126 | memcpy(mresp, mcp->mb, 64); |
9a069e19 GM |
5127 | return rval; |
5128 | } | |
6dbdda4d | 5129 | |
9a069e19 | 5130 | int |
7c3df132 | 5131 | qla84xx_reset_chip(scsi_qla_host_t *vha, uint16_t enable_diagnostic) |
9a069e19 GM |
5132 | { |
5133 | int rval; | |
5134 | mbx_cmd_t mc; | |
5135 | mbx_cmd_t *mcp = &mc; | |
5136 | ||
5f28d2d7 | 5137 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fd, |
7c3df132 | 5138 | "Entered %s enable_diag=%d.\n", __func__, enable_diagnostic); |
9a069e19 GM |
5139 | |
5140 | mcp->mb[0] = MBC_ISP84XX_RESET; | |
5141 | mcp->mb[1] = enable_diagnostic; | |
5142 | mcp->out_mb = MBX_1|MBX_0; | |
5143 | mcp->in_mb = MBX_1|MBX_0; | |
5144 | mcp->tov = MBX_TOV_SECONDS; | |
5145 | mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD; | |
7c3df132 | 5146 | rval = qla2x00_mailbox_command(vha, mcp); |
9a069e19 | 5147 | |
9a069e19 | 5148 | if (rval != QLA_SUCCESS) |
7c3df132 | 5149 | ql_dbg(ql_dbg_mbx, vha, 0x10fe, "Failed=%x.\n", rval); |
9a069e19 | 5150 | else |
5f28d2d7 SK |
5151 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ff, |
5152 | "Done %s.\n", __func__); | |
9a069e19 GM |
5153 | |
5154 | return rval; | |
5155 | } | |
5156 | ||
18e7555a AV |
5157 | int |
5158 | qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data) | |
5159 | { | |
5160 | int rval; | |
5161 | mbx_cmd_t mc; | |
5162 | mbx_cmd_t *mcp = &mc; | |
5163 | ||
5f28d2d7 SK |
5164 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1100, |
5165 | "Entered %s.\n", __func__); | |
7c3df132 | 5166 | |
18e7555a | 5167 | if (!IS_FWI2_CAPABLE(vha->hw)) |
6c452a45 | 5168 | return QLA_FUNCTION_FAILED; |
18e7555a | 5169 | |
18e7555a AV |
5170 | mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED; |
5171 | mcp->mb[1] = LSW(risc_addr); | |
5172 | mcp->mb[2] = LSW(data); | |
5173 | mcp->mb[3] = MSW(data); | |
5174 | mcp->mb[8] = MSW(risc_addr); | |
5175 | mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0; | |
5176 | mcp->in_mb = MBX_0; | |
5177 | mcp->tov = 30; | |
5178 | mcp->flags = 0; | |
5179 | rval = qla2x00_mailbox_command(vha, mcp); | |
5180 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
5181 | ql_dbg(ql_dbg_mbx, vha, 0x1101, |
5182 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
18e7555a | 5183 | } else { |
5f28d2d7 SK |
5184 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1102, |
5185 | "Done %s.\n", __func__); | |
18e7555a AV |
5186 | } |
5187 | ||
5188 | return rval; | |
5189 | } | |
3064ff39 | 5190 | |
b1d46989 MI |
5191 | int |
5192 | qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb) | |
5193 | { | |
5194 | int rval; | |
5195 | uint32_t stat, timer; | |
5196 | uint16_t mb0 = 0; | |
5197 | struct qla_hw_data *ha = vha->hw; | |
5198 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; | |
5199 | ||
5200 | rval = QLA_SUCCESS; | |
5201 | ||
5f28d2d7 SK |
5202 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1103, |
5203 | "Entered %s.\n", __func__); | |
b1d46989 MI |
5204 | |
5205 | clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); | |
5206 | ||
5207 | /* Write the MBC data to the registers */ | |
5208 | WRT_REG_WORD(®->mailbox0, MBC_WRITE_MPI_REGISTER); | |
5209 | WRT_REG_WORD(®->mailbox1, mb[0]); | |
5210 | WRT_REG_WORD(®->mailbox2, mb[1]); | |
5211 | WRT_REG_WORD(®->mailbox3, mb[2]); | |
5212 | WRT_REG_WORD(®->mailbox4, mb[3]); | |
5213 | ||
5214 | WRT_REG_DWORD(®->hccr, HCCRX_SET_HOST_INT); | |
5215 | ||
5216 | /* Poll for MBC interrupt */ | |
5217 | for (timer = 6000000; timer; timer--) { | |
5218 | /* Check for pending interrupts. */ | |
5219 | stat = RD_REG_DWORD(®->host_status); | |
5220 | if (stat & HSRX_RISC_INT) { | |
5221 | stat &= 0xff; | |
5222 | ||
5223 | if (stat == 0x1 || stat == 0x2 || | |
5224 | stat == 0x10 || stat == 0x11) { | |
5225 | set_bit(MBX_INTERRUPT, | |
5226 | &ha->mbx_cmd_flags); | |
5227 | mb0 = RD_REG_WORD(®->mailbox0); | |
5228 | WRT_REG_DWORD(®->hccr, | |
5229 | HCCRX_CLR_RISC_INT); | |
5230 | RD_REG_DWORD(®->hccr); | |
5231 | break; | |
5232 | } | |
5233 | } | |
5234 | udelay(5); | |
5235 | } | |
5236 | ||
5237 | if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) | |
5238 | rval = mb0 & MBS_MASK; | |
5239 | else | |
5240 | rval = QLA_FUNCTION_FAILED; | |
5241 | ||
5242 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
5243 | ql_dbg(ql_dbg_mbx, vha, 0x1104, |
5244 | "Failed=%x mb[0]=%x.\n", rval, mb[0]); | |
b1d46989 | 5245 | } else { |
5f28d2d7 SK |
5246 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1105, |
5247 | "Done %s.\n", __func__); | |
b1d46989 MI |
5248 | } |
5249 | ||
5250 | return rval; | |
5251 | } | |
6246b8a1 | 5252 | |
3064ff39 MH |
5253 | int |
5254 | qla2x00_get_data_rate(scsi_qla_host_t *vha) | |
5255 | { | |
5256 | int rval; | |
5257 | mbx_cmd_t mc; | |
5258 | mbx_cmd_t *mcp = &mc; | |
5259 | struct qla_hw_data *ha = vha->hw; | |
5260 | ||
5f28d2d7 SK |
5261 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1106, |
5262 | "Entered %s.\n", __func__); | |
7c3df132 | 5263 | |
3064ff39 MH |
5264 | if (!IS_FWI2_CAPABLE(ha)) |
5265 | return QLA_FUNCTION_FAILED; | |
5266 | ||
3064ff39 MH |
5267 | mcp->mb[0] = MBC_DATA_RATE; |
5268 | mcp->mb[1] = 0; | |
5269 | mcp->out_mb = MBX_1|MBX_0; | |
5270 | mcp->in_mb = MBX_2|MBX_1|MBX_0; | |
f73cb695 | 5271 | if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) |
6246b8a1 | 5272 | mcp->in_mb |= MBX_3; |
3064ff39 MH |
5273 | mcp->tov = MBX_TOV_SECONDS; |
5274 | mcp->flags = 0; | |
5275 | rval = qla2x00_mailbox_command(vha, mcp); | |
5276 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
5277 | ql_dbg(ql_dbg_mbx, vha, 0x1107, |
5278 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
3064ff39 | 5279 | } else { |
5f28d2d7 SK |
5280 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1108, |
5281 | "Done %s.\n", __func__); | |
3064ff39 MH |
5282 | if (mcp->mb[1] != 0x7) |
5283 | ha->link_data_rate = mcp->mb[1]; | |
5284 | } | |
5285 | ||
5286 | return rval; | |
5287 | } | |
09ff701a | 5288 | |
23f2ebd1 SR |
5289 | int |
5290 | qla81xx_get_port_config(scsi_qla_host_t *vha, uint16_t *mb) | |
5291 | { | |
5292 | int rval; | |
5293 | mbx_cmd_t mc; | |
5294 | mbx_cmd_t *mcp = &mc; | |
5295 | struct qla_hw_data *ha = vha->hw; | |
5296 | ||
5f28d2d7 SK |
5297 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1109, |
5298 | "Entered %s.\n", __func__); | |
23f2ebd1 | 5299 | |
f73cb695 CD |
5300 | if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) && !IS_QLA8044(ha) && |
5301 | !IS_QLA27XX(ha)) | |
23f2ebd1 SR |
5302 | return QLA_FUNCTION_FAILED; |
5303 | mcp->mb[0] = MBC_GET_PORT_CONFIG; | |
5304 | mcp->out_mb = MBX_0; | |
5305 | mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
5306 | mcp->tov = MBX_TOV_SECONDS; | |
5307 | mcp->flags = 0; | |
5308 | ||
5309 | rval = qla2x00_mailbox_command(vha, mcp); | |
5310 | ||
5311 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
5312 | ql_dbg(ql_dbg_mbx, vha, 0x110a, |
5313 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
23f2ebd1 SR |
5314 | } else { |
5315 | /* Copy all bits to preserve original value */ | |
5316 | memcpy(mb, &mcp->mb[1], sizeof(uint16_t) * 4); | |
5317 | ||
5f28d2d7 SK |
5318 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110b, |
5319 | "Done %s.\n", __func__); | |
23f2ebd1 SR |
5320 | } |
5321 | return rval; | |
5322 | } | |
5323 | ||
5324 | int | |
5325 | qla81xx_set_port_config(scsi_qla_host_t *vha, uint16_t *mb) | |
5326 | { | |
5327 | int rval; | |
5328 | mbx_cmd_t mc; | |
5329 | mbx_cmd_t *mcp = &mc; | |
5330 | ||
5f28d2d7 SK |
5331 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110c, |
5332 | "Entered %s.\n", __func__); | |
23f2ebd1 SR |
5333 | |
5334 | mcp->mb[0] = MBC_SET_PORT_CONFIG; | |
5335 | /* Copy all bits to preserve original setting */ | |
5336 | memcpy(&mcp->mb[1], mb, sizeof(uint16_t) * 4); | |
5337 | mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
5338 | mcp->in_mb = MBX_0; | |
5339 | mcp->tov = MBX_TOV_SECONDS; | |
5340 | mcp->flags = 0; | |
5341 | rval = qla2x00_mailbox_command(vha, mcp); | |
5342 | ||
5343 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
5344 | ql_dbg(ql_dbg_mbx, vha, 0x110d, |
5345 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
23f2ebd1 | 5346 | } else |
5f28d2d7 SK |
5347 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110e, |
5348 | "Done %s.\n", __func__); | |
23f2ebd1 SR |
5349 | |
5350 | return rval; | |
5351 | } | |
5352 | ||
5353 | ||
09ff701a SR |
5354 | int |
5355 | qla24xx_set_fcp_prio(scsi_qla_host_t *vha, uint16_t loop_id, uint16_t priority, | |
5356 | uint16_t *mb) | |
5357 | { | |
5358 | int rval; | |
5359 | mbx_cmd_t mc; | |
5360 | mbx_cmd_t *mcp = &mc; | |
5361 | struct qla_hw_data *ha = vha->hw; | |
5362 | ||
5f28d2d7 SK |
5363 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110f, |
5364 | "Entered %s.\n", __func__); | |
7c3df132 | 5365 | |
09ff701a SR |
5366 | if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha)) |
5367 | return QLA_FUNCTION_FAILED; | |
5368 | ||
09ff701a SR |
5369 | mcp->mb[0] = MBC_PORT_PARAMS; |
5370 | mcp->mb[1] = loop_id; | |
5371 | if (ha->flags.fcp_prio_enabled) | |
5372 | mcp->mb[2] = BIT_1; | |
5373 | else | |
5374 | mcp->mb[2] = BIT_2; | |
5375 | mcp->mb[4] = priority & 0xf; | |
5376 | mcp->mb[9] = vha->vp_idx; | |
5377 | mcp->out_mb = MBX_9|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
5378 | mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0; | |
5379 | mcp->tov = 30; | |
5380 | mcp->flags = 0; | |
5381 | rval = qla2x00_mailbox_command(vha, mcp); | |
5382 | if (mb != NULL) { | |
5383 | mb[0] = mcp->mb[0]; | |
5384 | mb[1] = mcp->mb[1]; | |
5385 | mb[3] = mcp->mb[3]; | |
5386 | mb[4] = mcp->mb[4]; | |
5387 | } | |
5388 | ||
5389 | if (rval != QLA_SUCCESS) { | |
7c3df132 | 5390 | ql_dbg(ql_dbg_mbx, vha, 0x10cd, "Failed=%x.\n", rval); |
09ff701a | 5391 | } else { |
5f28d2d7 SK |
5392 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10cc, |
5393 | "Done %s.\n", __func__); | |
09ff701a SR |
5394 | } |
5395 | ||
5396 | return rval; | |
5397 | } | |
a9083016 | 5398 | |
794a5691 | 5399 | int |
fe52f6e1 | 5400 | qla2x00_get_thermal_temp(scsi_qla_host_t *vha, uint16_t *temp) |
794a5691 | 5401 | { |
fe52f6e1 | 5402 | int rval = QLA_FUNCTION_FAILED; |
794a5691 | 5403 | struct qla_hw_data *ha = vha->hw; |
fe52f6e1 | 5404 | uint8_t byte; |
794a5691 | 5405 | |
1ae47cf3 JC |
5406 | if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha)) { |
5407 | ql_dbg(ql_dbg_mbx, vha, 0x1150, | |
5408 | "Thermal not supported by this card.\n"); | |
5409 | return rval; | |
5410 | } | |
5411 | ||
5412 | if (IS_QLA25XX(ha)) { | |
5413 | if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
5414 | ha->pdev->subsystem_device == 0x0175) { | |
5415 | rval = qla2x00_read_sfp(vha, 0, &byte, | |
5416 | 0x98, 0x1, 1, BIT_13|BIT_0); | |
5417 | *temp = byte; | |
5418 | return rval; | |
5419 | } | |
5420 | if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP && | |
5421 | ha->pdev->subsystem_device == 0x338e) { | |
5422 | rval = qla2x00_read_sfp(vha, 0, &byte, | |
5423 | 0x98, 0x1, 1, BIT_15|BIT_14|BIT_0); | |
5424 | *temp = byte; | |
5425 | return rval; | |
5426 | } | |
5427 | ql_dbg(ql_dbg_mbx, vha, 0x10c9, | |
5428 | "Thermal not supported by this card.\n"); | |
5429 | return rval; | |
794a5691 | 5430 | } |
794a5691 | 5431 | |
1ae47cf3 JC |
5432 | if (IS_QLA82XX(ha)) { |
5433 | *temp = qla82xx_read_temperature(vha); | |
5434 | rval = QLA_SUCCESS; | |
5435 | return rval; | |
5436 | } else if (IS_QLA8044(ha)) { | |
5437 | *temp = qla8044_read_temperature(vha); | |
5438 | rval = QLA_SUCCESS; | |
5439 | return rval; | |
794a5691 | 5440 | } |
794a5691 | 5441 | |
1ae47cf3 | 5442 | rval = qla2x00_read_asic_temperature(vha, temp); |
794a5691 AV |
5443 | return rval; |
5444 | } | |
5445 | ||
a9083016 GM |
5446 | int |
5447 | qla82xx_mbx_intr_enable(scsi_qla_host_t *vha) | |
5448 | { | |
5449 | int rval; | |
5450 | struct qla_hw_data *ha = vha->hw; | |
5451 | mbx_cmd_t mc; | |
5452 | mbx_cmd_t *mcp = &mc; | |
5453 | ||
5f28d2d7 SK |
5454 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1017, |
5455 | "Entered %s.\n", __func__); | |
7c3df132 | 5456 | |
a9083016 GM |
5457 | if (!IS_FWI2_CAPABLE(ha)) |
5458 | return QLA_FUNCTION_FAILED; | |
5459 | ||
a9083016 | 5460 | memset(mcp, 0, sizeof(mbx_cmd_t)); |
3711333d | 5461 | mcp->mb[0] = MBC_TOGGLE_INTERRUPT; |
a9083016 GM |
5462 | mcp->mb[1] = 1; |
5463 | ||
5464 | mcp->out_mb = MBX_1|MBX_0; | |
5465 | mcp->in_mb = MBX_0; | |
5466 | mcp->tov = 30; | |
5467 | mcp->flags = 0; | |
5468 | ||
5469 | rval = qla2x00_mailbox_command(vha, mcp); | |
5470 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
5471 | ql_dbg(ql_dbg_mbx, vha, 0x1016, |
5472 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
a9083016 | 5473 | } else { |
5f28d2d7 SK |
5474 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100e, |
5475 | "Done %s.\n", __func__); | |
a9083016 GM |
5476 | } |
5477 | ||
5478 | return rval; | |
5479 | } | |
5480 | ||
5481 | int | |
5482 | qla82xx_mbx_intr_disable(scsi_qla_host_t *vha) | |
5483 | { | |
5484 | int rval; | |
5485 | struct qla_hw_data *ha = vha->hw; | |
5486 | mbx_cmd_t mc; | |
5487 | mbx_cmd_t *mcp = &mc; | |
5488 | ||
5f28d2d7 SK |
5489 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100d, |
5490 | "Entered %s.\n", __func__); | |
7c3df132 | 5491 | |
7ec0effd | 5492 | if (!IS_P3P_TYPE(ha)) |
a9083016 GM |
5493 | return QLA_FUNCTION_FAILED; |
5494 | ||
a9083016 | 5495 | memset(mcp, 0, sizeof(mbx_cmd_t)); |
3711333d | 5496 | mcp->mb[0] = MBC_TOGGLE_INTERRUPT; |
a9083016 GM |
5497 | mcp->mb[1] = 0; |
5498 | ||
5499 | mcp->out_mb = MBX_1|MBX_0; | |
5500 | mcp->in_mb = MBX_0; | |
5501 | mcp->tov = 30; | |
5502 | mcp->flags = 0; | |
5503 | ||
5504 | rval = qla2x00_mailbox_command(vha, mcp); | |
5505 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
5506 | ql_dbg(ql_dbg_mbx, vha, 0x100c, |
5507 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
a9083016 | 5508 | } else { |
5f28d2d7 SK |
5509 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100b, |
5510 | "Done %s.\n", __func__); | |
a9083016 GM |
5511 | } |
5512 | ||
5513 | return rval; | |
5514 | } | |
08de2844 GM |
5515 | |
5516 | int | |
5517 | qla82xx_md_get_template_size(scsi_qla_host_t *vha) | |
5518 | { | |
5519 | struct qla_hw_data *ha = vha->hw; | |
5520 | mbx_cmd_t mc; | |
5521 | mbx_cmd_t *mcp = &mc; | |
5522 | int rval = QLA_FUNCTION_FAILED; | |
5523 | ||
5f28d2d7 SK |
5524 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111f, |
5525 | "Entered %s.\n", __func__); | |
08de2844 GM |
5526 | |
5527 | memset(mcp->mb, 0 , sizeof(mcp->mb)); | |
5528 | mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE); | |
5529 | mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE); | |
5530 | mcp->mb[2] = LSW(RQST_TMPLT_SIZE); | |
5531 | mcp->mb[3] = MSW(RQST_TMPLT_SIZE); | |
5532 | ||
5533 | mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; | |
5534 | mcp->in_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8| | |
5535 | MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
5536 | ||
5537 | mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD; | |
5538 | mcp->tov = MBX_TOV_SECONDS; | |
5539 | rval = qla2x00_mailbox_command(vha, mcp); | |
5540 | ||
5541 | /* Always copy back return mailbox values. */ | |
5542 | if (rval != QLA_SUCCESS) { | |
5543 | ql_dbg(ql_dbg_mbx, vha, 0x1120, | |
5544 | "mailbox command FAILED=0x%x, subcode=%x.\n", | |
5545 | (mcp->mb[1] << 16) | mcp->mb[0], | |
5546 | (mcp->mb[3] << 16) | mcp->mb[2]); | |
5547 | } else { | |
5f28d2d7 SK |
5548 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1121, |
5549 | "Done %s.\n", __func__); | |
08de2844 GM |
5550 | ha->md_template_size = ((mcp->mb[3] << 16) | mcp->mb[2]); |
5551 | if (!ha->md_template_size) { | |
5552 | ql_dbg(ql_dbg_mbx, vha, 0x1122, | |
5553 | "Null template size obtained.\n"); | |
5554 | rval = QLA_FUNCTION_FAILED; | |
5555 | } | |
5556 | } | |
5557 | return rval; | |
5558 | } | |
5559 | ||
5560 | int | |
5561 | qla82xx_md_get_template(scsi_qla_host_t *vha) | |
5562 | { | |
5563 | struct qla_hw_data *ha = vha->hw; | |
5564 | mbx_cmd_t mc; | |
5565 | mbx_cmd_t *mcp = &mc; | |
5566 | int rval = QLA_FUNCTION_FAILED; | |
5567 | ||
5f28d2d7 SK |
5568 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1123, |
5569 | "Entered %s.\n", __func__); | |
08de2844 GM |
5570 | |
5571 | ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev, | |
5572 | ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL); | |
5573 | if (!ha->md_tmplt_hdr) { | |
5574 | ql_log(ql_log_warn, vha, 0x1124, | |
5575 | "Unable to allocate memory for Minidump template.\n"); | |
5576 | return rval; | |
5577 | } | |
5578 | ||
5579 | memset(mcp->mb, 0 , sizeof(mcp->mb)); | |
5580 | mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE); | |
5581 | mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE); | |
5582 | mcp->mb[2] = LSW(RQST_TMPLT); | |
5583 | mcp->mb[3] = MSW(RQST_TMPLT); | |
5584 | mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma)); | |
5585 | mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma)); | |
5586 | mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma)); | |
5587 | mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma)); | |
5588 | mcp->mb[8] = LSW(ha->md_template_size); | |
5589 | mcp->mb[9] = MSW(ha->md_template_size); | |
5590 | ||
5591 | mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD; | |
5592 | mcp->tov = MBX_TOV_SECONDS; | |
5593 | mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8| | |
5594 | MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
5595 | mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0; | |
5596 | rval = qla2x00_mailbox_command(vha, mcp); | |
5597 | ||
5598 | if (rval != QLA_SUCCESS) { | |
5599 | ql_dbg(ql_dbg_mbx, vha, 0x1125, | |
5600 | "mailbox command FAILED=0x%x, subcode=%x.\n", | |
5601 | ((mcp->mb[1] << 16) | mcp->mb[0]), | |
5602 | ((mcp->mb[3] << 16) | mcp->mb[2])); | |
5603 | } else | |
5f28d2d7 SK |
5604 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1126, |
5605 | "Done %s.\n", __func__); | |
08de2844 GM |
5606 | return rval; |
5607 | } | |
999916dc | 5608 | |
7ec0effd AD |
5609 | int |
5610 | qla8044_md_get_template(scsi_qla_host_t *vha) | |
5611 | { | |
5612 | struct qla_hw_data *ha = vha->hw; | |
5613 | mbx_cmd_t mc; | |
5614 | mbx_cmd_t *mcp = &mc; | |
5615 | int rval = QLA_FUNCTION_FAILED; | |
5616 | int offset = 0, size = MINIDUMP_SIZE_36K; | |
5617 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11f, | |
5618 | "Entered %s.\n", __func__); | |
5619 | ||
5620 | ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev, | |
5621 | ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL); | |
5622 | if (!ha->md_tmplt_hdr) { | |
5623 | ql_log(ql_log_warn, vha, 0xb11b, | |
5624 | "Unable to allocate memory for Minidump template.\n"); | |
5625 | return rval; | |
5626 | } | |
5627 | ||
5628 | memset(mcp->mb, 0 , sizeof(mcp->mb)); | |
5629 | while (offset < ha->md_template_size) { | |
5630 | mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE); | |
5631 | mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE); | |
5632 | mcp->mb[2] = LSW(RQST_TMPLT); | |
5633 | mcp->mb[3] = MSW(RQST_TMPLT); | |
5634 | mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma + offset)); | |
5635 | mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma + offset)); | |
5636 | mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma + offset)); | |
5637 | mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma + offset)); | |
5638 | mcp->mb[8] = LSW(size); | |
5639 | mcp->mb[9] = MSW(size); | |
5640 | mcp->mb[10] = offset & 0x0000FFFF; | |
5641 | mcp->mb[11] = offset & 0xFFFF0000; | |
5642 | mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD; | |
5643 | mcp->tov = MBX_TOV_SECONDS; | |
5644 | mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8| | |
5645 | MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
5646 | mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0; | |
5647 | rval = qla2x00_mailbox_command(vha, mcp); | |
5648 | ||
5649 | if (rval != QLA_SUCCESS) { | |
5650 | ql_dbg(ql_dbg_mbx, vha, 0xb11c, | |
5651 | "mailbox command FAILED=0x%x, subcode=%x.\n", | |
5652 | ((mcp->mb[1] << 16) | mcp->mb[0]), | |
5653 | ((mcp->mb[3] << 16) | mcp->mb[2])); | |
5654 | return rval; | |
5655 | } else | |
5656 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11d, | |
5657 | "Done %s.\n", __func__); | |
5658 | offset = offset + size; | |
5659 | } | |
5660 | return rval; | |
5661 | } | |
5662 | ||
6246b8a1 GM |
5663 | int |
5664 | qla81xx_set_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg) | |
5665 | { | |
5666 | int rval; | |
5667 | struct qla_hw_data *ha = vha->hw; | |
5668 | mbx_cmd_t mc; | |
5669 | mbx_cmd_t *mcp = &mc; | |
5670 | ||
5671 | if (!IS_QLA81XX(ha) && !IS_QLA8031(ha)) | |
5672 | return QLA_FUNCTION_FAILED; | |
5673 | ||
5f28d2d7 SK |
5674 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1133, |
5675 | "Entered %s.\n", __func__); | |
6246b8a1 GM |
5676 | |
5677 | memset(mcp, 0, sizeof(mbx_cmd_t)); | |
5678 | mcp->mb[0] = MBC_SET_LED_CONFIG; | |
5679 | mcp->mb[1] = led_cfg[0]; | |
5680 | mcp->mb[2] = led_cfg[1]; | |
5681 | if (IS_QLA8031(ha)) { | |
5682 | mcp->mb[3] = led_cfg[2]; | |
5683 | mcp->mb[4] = led_cfg[3]; | |
5684 | mcp->mb[5] = led_cfg[4]; | |
5685 | mcp->mb[6] = led_cfg[5]; | |
5686 | } | |
5687 | ||
5688 | mcp->out_mb = MBX_2|MBX_1|MBX_0; | |
5689 | if (IS_QLA8031(ha)) | |
5690 | mcp->out_mb |= MBX_6|MBX_5|MBX_4|MBX_3; | |
5691 | mcp->in_mb = MBX_0; | |
5692 | mcp->tov = 30; | |
5693 | mcp->flags = 0; | |
5694 | ||
5695 | rval = qla2x00_mailbox_command(vha, mcp); | |
5696 | if (rval != QLA_SUCCESS) { | |
5697 | ql_dbg(ql_dbg_mbx, vha, 0x1134, | |
5698 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
5699 | } else { | |
5f28d2d7 SK |
5700 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1135, |
5701 | "Done %s.\n", __func__); | |
6246b8a1 GM |
5702 | } |
5703 | ||
5704 | return rval; | |
5705 | } | |
5706 | ||
5707 | int | |
5708 | qla81xx_get_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg) | |
5709 | { | |
5710 | int rval; | |
5711 | struct qla_hw_data *ha = vha->hw; | |
5712 | mbx_cmd_t mc; | |
5713 | mbx_cmd_t *mcp = &mc; | |
5714 | ||
5715 | if (!IS_QLA81XX(ha) && !IS_QLA8031(ha)) | |
5716 | return QLA_FUNCTION_FAILED; | |
5717 | ||
5f28d2d7 SK |
5718 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1136, |
5719 | "Entered %s.\n", __func__); | |
6246b8a1 GM |
5720 | |
5721 | memset(mcp, 0, sizeof(mbx_cmd_t)); | |
5722 | mcp->mb[0] = MBC_GET_LED_CONFIG; | |
5723 | ||
5724 | mcp->out_mb = MBX_0; | |
5725 | mcp->in_mb = MBX_2|MBX_1|MBX_0; | |
5726 | if (IS_QLA8031(ha)) | |
5727 | mcp->in_mb |= MBX_6|MBX_5|MBX_4|MBX_3; | |
5728 | mcp->tov = 30; | |
5729 | mcp->flags = 0; | |
5730 | ||
5731 | rval = qla2x00_mailbox_command(vha, mcp); | |
5732 | if (rval != QLA_SUCCESS) { | |
5733 | ql_dbg(ql_dbg_mbx, vha, 0x1137, | |
5734 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
5735 | } else { | |
5736 | led_cfg[0] = mcp->mb[1]; | |
5737 | led_cfg[1] = mcp->mb[2]; | |
5738 | if (IS_QLA8031(ha)) { | |
5739 | led_cfg[2] = mcp->mb[3]; | |
5740 | led_cfg[3] = mcp->mb[4]; | |
5741 | led_cfg[4] = mcp->mb[5]; | |
5742 | led_cfg[5] = mcp->mb[6]; | |
5743 | } | |
5f28d2d7 SK |
5744 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1138, |
5745 | "Done %s.\n", __func__); | |
6246b8a1 GM |
5746 | } |
5747 | ||
5748 | return rval; | |
5749 | } | |
5750 | ||
999916dc SK |
5751 | int |
5752 | qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable) | |
5753 | { | |
5754 | int rval; | |
5755 | struct qla_hw_data *ha = vha->hw; | |
5756 | mbx_cmd_t mc; | |
5757 | mbx_cmd_t *mcp = &mc; | |
5758 | ||
7ec0effd | 5759 | if (!IS_P3P_TYPE(ha)) |
999916dc SK |
5760 | return QLA_FUNCTION_FAILED; |
5761 | ||
5f28d2d7 | 5762 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1127, |
999916dc SK |
5763 | "Entered %s.\n", __func__); |
5764 | ||
5765 | memset(mcp, 0, sizeof(mbx_cmd_t)); | |
5766 | mcp->mb[0] = MBC_SET_LED_CONFIG; | |
5767 | if (enable) | |
5768 | mcp->mb[7] = 0xE; | |
5769 | else | |
5770 | mcp->mb[7] = 0xD; | |
5771 | ||
5772 | mcp->out_mb = MBX_7|MBX_0; | |
5773 | mcp->in_mb = MBX_0; | |
6246b8a1 | 5774 | mcp->tov = MBX_TOV_SECONDS; |
999916dc SK |
5775 | mcp->flags = 0; |
5776 | ||
5777 | rval = qla2x00_mailbox_command(vha, mcp); | |
5778 | if (rval != QLA_SUCCESS) { | |
5779 | ql_dbg(ql_dbg_mbx, vha, 0x1128, | |
5780 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
5781 | } else { | |
5f28d2d7 | 5782 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1129, |
999916dc SK |
5783 | "Done %s.\n", __func__); |
5784 | } | |
5785 | ||
5786 | return rval; | |
5787 | } | |
6246b8a1 GM |
5788 | |
5789 | int | |
7d613ac6 | 5790 | qla83xx_wr_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t data) |
6246b8a1 GM |
5791 | { |
5792 | int rval; | |
5793 | struct qla_hw_data *ha = vha->hw; | |
5794 | mbx_cmd_t mc; | |
5795 | mbx_cmd_t *mcp = &mc; | |
5796 | ||
f73cb695 | 5797 | if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) |
6246b8a1 GM |
5798 | return QLA_FUNCTION_FAILED; |
5799 | ||
5f28d2d7 SK |
5800 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1130, |
5801 | "Entered %s.\n", __func__); | |
6246b8a1 GM |
5802 | |
5803 | mcp->mb[0] = MBC_WRITE_REMOTE_REG; | |
5804 | mcp->mb[1] = LSW(reg); | |
5805 | mcp->mb[2] = MSW(reg); | |
5806 | mcp->mb[3] = LSW(data); | |
5807 | mcp->mb[4] = MSW(data); | |
5808 | mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
5809 | ||
5810 | mcp->in_mb = MBX_1|MBX_0; | |
5811 | mcp->tov = MBX_TOV_SECONDS; | |
5812 | mcp->flags = 0; | |
5813 | rval = qla2x00_mailbox_command(vha, mcp); | |
5814 | ||
5815 | if (rval != QLA_SUCCESS) { | |
5816 | ql_dbg(ql_dbg_mbx, vha, 0x1131, | |
5817 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
5818 | } else { | |
5f28d2d7 | 5819 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1132, |
6246b8a1 GM |
5820 | "Done %s.\n", __func__); |
5821 | } | |
af11f64d | 5822 | |
6246b8a1 GM |
5823 | return rval; |
5824 | } | |
af11f64d AV |
5825 | |
5826 | int | |
5827 | qla2x00_port_logout(scsi_qla_host_t *vha, struct fc_port *fcport) | |
5828 | { | |
5829 | int rval; | |
5830 | struct qla_hw_data *ha = vha->hw; | |
5831 | mbx_cmd_t mc; | |
5832 | mbx_cmd_t *mcp = &mc; | |
5833 | ||
5834 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { | |
5f28d2d7 | 5835 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113b, |
af11f64d AV |
5836 | "Implicit LOGO Unsupported.\n"); |
5837 | return QLA_FUNCTION_FAILED; | |
5838 | } | |
5839 | ||
5840 | ||
5f28d2d7 SK |
5841 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113c, |
5842 | "Entering %s.\n", __func__); | |
af11f64d AV |
5843 | |
5844 | /* Perform Implicit LOGO. */ | |
5845 | mcp->mb[0] = MBC_PORT_LOGOUT; | |
5846 | mcp->mb[1] = fcport->loop_id; | |
5847 | mcp->mb[10] = BIT_15; | |
5848 | mcp->out_mb = MBX_10|MBX_1|MBX_0; | |
5849 | mcp->in_mb = MBX_0; | |
5850 | mcp->tov = MBX_TOV_SECONDS; | |
5851 | mcp->flags = 0; | |
5852 | rval = qla2x00_mailbox_command(vha, mcp); | |
5853 | if (rval != QLA_SUCCESS) | |
5854 | ql_dbg(ql_dbg_mbx, vha, 0x113d, | |
5855 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
5856 | else | |
5f28d2d7 SK |
5857 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113e, |
5858 | "Done %s.\n", __func__); | |
af11f64d AV |
5859 | |
5860 | return rval; | |
5861 | } | |
5862 | ||
7d613ac6 SV |
5863 | int |
5864 | qla83xx_rd_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t *data) | |
5865 | { | |
5866 | int rval; | |
5867 | mbx_cmd_t mc; | |
5868 | mbx_cmd_t *mcp = &mc; | |
5869 | struct qla_hw_data *ha = vha->hw; | |
5870 | unsigned long retry_max_time = jiffies + (2 * HZ); | |
5871 | ||
f73cb695 | 5872 | if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) |
7d613ac6 SV |
5873 | return QLA_FUNCTION_FAILED; |
5874 | ||
5875 | ql_dbg(ql_dbg_mbx, vha, 0x114b, "Entered %s.\n", __func__); | |
5876 | ||
5877 | retry_rd_reg: | |
5878 | mcp->mb[0] = MBC_READ_REMOTE_REG; | |
5879 | mcp->mb[1] = LSW(reg); | |
5880 | mcp->mb[2] = MSW(reg); | |
5881 | mcp->out_mb = MBX_2|MBX_1|MBX_0; | |
5882 | mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0; | |
5883 | mcp->tov = MBX_TOV_SECONDS; | |
5884 | mcp->flags = 0; | |
5885 | rval = qla2x00_mailbox_command(vha, mcp); | |
5886 | ||
5887 | if (rval != QLA_SUCCESS) { | |
5888 | ql_dbg(ql_dbg_mbx, vha, 0x114c, | |
5889 | "Failed=%x mb[0]=%x mb[1]=%x.\n", | |
5890 | rval, mcp->mb[0], mcp->mb[1]); | |
5891 | } else { | |
5892 | *data = (mcp->mb[3] | (mcp->mb[4] << 16)); | |
5893 | if (*data == QLA8XXX_BAD_VALUE) { | |
5894 | /* | |
5895 | * During soft-reset CAMRAM register reads might | |
5896 | * return 0xbad0bad0. So retry for MAX of 2 sec | |
5897 | * while reading camram registers. | |
5898 | */ | |
5899 | if (time_after(jiffies, retry_max_time)) { | |
5900 | ql_dbg(ql_dbg_mbx, vha, 0x1141, | |
5901 | "Failure to read CAMRAM register. " | |
5902 | "data=0x%x.\n", *data); | |
5903 | return QLA_FUNCTION_FAILED; | |
5904 | } | |
5905 | msleep(100); | |
5906 | goto retry_rd_reg; | |
5907 | } | |
5908 | ql_dbg(ql_dbg_mbx, vha, 0x1142, "Done %s.\n", __func__); | |
5909 | } | |
5910 | ||
5911 | return rval; | |
5912 | } | |
5913 | ||
5914 | int | |
5915 | qla83xx_restart_nic_firmware(scsi_qla_host_t *vha) | |
5916 | { | |
5917 | int rval; | |
5918 | mbx_cmd_t mc; | |
5919 | mbx_cmd_t *mcp = &mc; | |
5920 | struct qla_hw_data *ha = vha->hw; | |
5921 | ||
b20f02e1 | 5922 | if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) |
7d613ac6 SV |
5923 | return QLA_FUNCTION_FAILED; |
5924 | ||
5925 | ql_dbg(ql_dbg_mbx, vha, 0x1143, "Entered %s.\n", __func__); | |
5926 | ||
5927 | mcp->mb[0] = MBC_RESTART_NIC_FIRMWARE; | |
5928 | mcp->out_mb = MBX_0; | |
5929 | mcp->in_mb = MBX_1|MBX_0; | |
5930 | mcp->tov = MBX_TOV_SECONDS; | |
5931 | mcp->flags = 0; | |
5932 | rval = qla2x00_mailbox_command(vha, mcp); | |
5933 | ||
5934 | if (rval != QLA_SUCCESS) { | |
5935 | ql_dbg(ql_dbg_mbx, vha, 0x1144, | |
5936 | "Failed=%x mb[0]=%x mb[1]=%x.\n", | |
5937 | rval, mcp->mb[0], mcp->mb[1]); | |
5938 | ha->isp_ops->fw_dump(vha, 0); | |
5939 | } else { | |
5940 | ql_dbg(ql_dbg_mbx, vha, 0x1145, "Done %s.\n", __func__); | |
5941 | } | |
5942 | ||
5943 | return rval; | |
5944 | } | |
5945 | ||
5946 | int | |
5947 | qla83xx_access_control(scsi_qla_host_t *vha, uint16_t options, | |
5948 | uint32_t start_addr, uint32_t end_addr, uint16_t *sector_size) | |
5949 | { | |
5950 | int rval; | |
5951 | mbx_cmd_t mc; | |
5952 | mbx_cmd_t *mcp = &mc; | |
5953 | uint8_t subcode = (uint8_t)options; | |
5954 | struct qla_hw_data *ha = vha->hw; | |
5955 | ||
5956 | if (!IS_QLA8031(ha)) | |
5957 | return QLA_FUNCTION_FAILED; | |
5958 | ||
5959 | ql_dbg(ql_dbg_mbx, vha, 0x1146, "Entered %s.\n", __func__); | |
5960 | ||
5961 | mcp->mb[0] = MBC_SET_ACCESS_CONTROL; | |
5962 | mcp->mb[1] = options; | |
5963 | mcp->out_mb = MBX_1|MBX_0; | |
5964 | if (subcode & BIT_2) { | |
5965 | mcp->mb[2] = LSW(start_addr); | |
5966 | mcp->mb[3] = MSW(start_addr); | |
5967 | mcp->mb[4] = LSW(end_addr); | |
5968 | mcp->mb[5] = MSW(end_addr); | |
5969 | mcp->out_mb |= MBX_5|MBX_4|MBX_3|MBX_2; | |
5970 | } | |
5971 | mcp->in_mb = MBX_2|MBX_1|MBX_0; | |
5972 | if (!(subcode & (BIT_2 | BIT_5))) | |
5973 | mcp->in_mb |= MBX_4|MBX_3; | |
5974 | mcp->tov = MBX_TOV_SECONDS; | |
5975 | mcp->flags = 0; | |
5976 | rval = qla2x00_mailbox_command(vha, mcp); | |
5977 | ||
5978 | if (rval != QLA_SUCCESS) { | |
5979 | ql_dbg(ql_dbg_mbx, vha, 0x1147, | |
5980 | "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[4]=%x.\n", | |
5981 | rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], | |
5982 | mcp->mb[4]); | |
5983 | ha->isp_ops->fw_dump(vha, 0); | |
5984 | } else { | |
5985 | if (subcode & BIT_5) | |
5986 | *sector_size = mcp->mb[1]; | |
5987 | else if (subcode & (BIT_6 | BIT_7)) { | |
5988 | ql_dbg(ql_dbg_mbx, vha, 0x1148, | |
5989 | "Driver-lock id=%x%x", mcp->mb[4], mcp->mb[3]); | |
5990 | } else if (subcode & (BIT_3 | BIT_4)) { | |
5991 | ql_dbg(ql_dbg_mbx, vha, 0x1149, | |
5992 | "Flash-lock id=%x%x", mcp->mb[4], mcp->mb[3]); | |
5993 | } | |
5994 | ql_dbg(ql_dbg_mbx, vha, 0x114a, "Done %s.\n", __func__); | |
5995 | } | |
5996 | ||
5997 | return rval; | |
5998 | } | |
81178772 SK |
5999 | |
6000 | int | |
6001 | qla2x00_dump_mctp_data(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr, | |
6002 | uint32_t size) | |
6003 | { | |
6004 | int rval; | |
6005 | mbx_cmd_t mc; | |
6006 | mbx_cmd_t *mcp = &mc; | |
6007 | ||
6008 | if (!IS_MCTP_CAPABLE(vha->hw)) | |
6009 | return QLA_FUNCTION_FAILED; | |
6010 | ||
6011 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114f, | |
6012 | "Entered %s.\n", __func__); | |
6013 | ||
6014 | mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED; | |
6015 | mcp->mb[1] = LSW(addr); | |
6016 | mcp->mb[2] = MSW(req_dma); | |
6017 | mcp->mb[3] = LSW(req_dma); | |
6018 | mcp->mb[4] = MSW(size); | |
6019 | mcp->mb[5] = LSW(size); | |
6020 | mcp->mb[6] = MSW(MSD(req_dma)); | |
6021 | mcp->mb[7] = LSW(MSD(req_dma)); | |
6022 | mcp->mb[8] = MSW(addr); | |
6023 | /* Setting RAM ID to valid */ | |
6024 | mcp->mb[10] |= BIT_7; | |
6025 | /* For MCTP RAM ID is 0x40 */ | |
6026 | mcp->mb[10] |= 0x40; | |
6027 | ||
6028 | mcp->out_mb |= MBX_10|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1| | |
6029 | MBX_0; | |
6030 | ||
6031 | mcp->in_mb = MBX_0; | |
6032 | mcp->tov = MBX_TOV_SECONDS; | |
6033 | mcp->flags = 0; | |
6034 | rval = qla2x00_mailbox_command(vha, mcp); | |
6035 | ||
6036 | if (rval != QLA_SUCCESS) { | |
6037 | ql_dbg(ql_dbg_mbx, vha, 0x114e, | |
6038 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
6039 | } else { | |
6040 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114d, | |
6041 | "Done %s.\n", __func__); | |
6042 | } | |
6043 | ||
6044 | return rval; | |
6045 | } | |
ec891462 JC |
6046 | |
6047 | int | |
6048 | qla26xx_dport_diagnostics(scsi_qla_host_t *vha, | |
6049 | void *dd_buf, uint size, uint options) | |
6050 | { | |
6051 | int rval; | |
6052 | mbx_cmd_t mc; | |
6053 | mbx_cmd_t *mcp = &mc; | |
6054 | dma_addr_t dd_dma; | |
6055 | ||
6056 | if (!IS_QLA83XX(vha->hw) && !IS_QLA27XX(vha->hw)) | |
6057 | return QLA_FUNCTION_FAILED; | |
6058 | ||
83548fe2 | 6059 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x119f, |
ec891462 JC |
6060 | "Entered %s.\n", __func__); |
6061 | ||
ec891462 JC |
6062 | dd_dma = dma_map_single(&vha->hw->pdev->dev, |
6063 | dd_buf, size, DMA_FROM_DEVICE); | |
0b2ce198 | 6064 | if (dma_mapping_error(&vha->hw->pdev->dev, dd_dma)) { |
ec891462 JC |
6065 | ql_log(ql_log_warn, vha, 0x1194, "Failed to map dma buffer.\n"); |
6066 | return QLA_MEMORY_ALLOC_FAILED; | |
6067 | } | |
6068 | ||
6069 | memset(dd_buf, 0, size); | |
6070 | ||
6071 | mcp->mb[0] = MBC_DPORT_DIAGNOSTICS; | |
6072 | mcp->mb[1] = options; | |
6073 | mcp->mb[2] = MSW(LSD(dd_dma)); | |
6074 | mcp->mb[3] = LSW(LSD(dd_dma)); | |
6075 | mcp->mb[6] = MSW(MSD(dd_dma)); | |
6076 | mcp->mb[7] = LSW(MSD(dd_dma)); | |
6077 | mcp->mb[8] = size; | |
6078 | mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; | |
6079 | mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0; | |
6080 | mcp->buf_size = size; | |
6081 | mcp->flags = MBX_DMA_IN; | |
6082 | mcp->tov = MBX_TOV_SECONDS * 4; | |
6083 | rval = qla2x00_mailbox_command(vha, mcp); | |
6084 | ||
6085 | if (rval != QLA_SUCCESS) { | |
6086 | ql_dbg(ql_dbg_mbx, vha, 0x1195, "Failed=%x.\n", rval); | |
6087 | } else { | |
6088 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1196, | |
6089 | "Done %s.\n", __func__); | |
6090 | } | |
6091 | ||
6092 | dma_unmap_single(&vha->hw->pdev->dev, dd_dma, | |
6093 | size, DMA_FROM_DEVICE); | |
6094 | ||
6095 | return rval; | |
6096 | } | |
15f30a57 QT |
6097 | |
6098 | static void qla2x00_async_mb_sp_done(void *s, int res) | |
6099 | { | |
6100 | struct srb *sp = s; | |
6101 | ||
6102 | sp->u.iocb_cmd.u.mbx.rc = res; | |
6103 | ||
6104 | complete(&sp->u.iocb_cmd.u.mbx.comp); | |
6105 | /* don't free sp here. Let the caller do the free */ | |
6106 | } | |
6107 | ||
6108 | /* | |
6109 | * This mailbox uses the iocb interface to send MB command. | |
6110 | * This allows non-critial (non chip setup) command to go | |
6111 | * out in parrallel. | |
6112 | */ | |
6113 | int qla24xx_send_mb_cmd(struct scsi_qla_host *vha, mbx_cmd_t *mcp) | |
6114 | { | |
6115 | int rval = QLA_FUNCTION_FAILED; | |
6116 | srb_t *sp; | |
6117 | struct srb_iocb *c; | |
6118 | ||
6119 | if (!vha->hw->flags.fw_started) | |
6120 | goto done; | |
6121 | ||
6122 | sp = qla2x00_get_sp(vha, NULL, GFP_KERNEL); | |
6123 | if (!sp) | |
6124 | goto done; | |
6125 | ||
6126 | sp->type = SRB_MB_IOCB; | |
6127 | sp->name = mb_to_str(mcp->mb[0]); | |
6128 | ||
15f30a57 QT |
6129 | c = &sp->u.iocb_cmd; |
6130 | c->timeout = qla2x00_async_iocb_timeout; | |
6131 | init_completion(&c->u.mbx.comp); | |
6132 | ||
e74e7d95 BH |
6133 | qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); |
6134 | ||
6135 | memcpy(sp->u.iocb_cmd.u.mbx.out_mb, mcp->mb, SIZEOF_IOCB_MB_REG); | |
6136 | ||
15f30a57 QT |
6137 | sp->done = qla2x00_async_mb_sp_done; |
6138 | ||
6139 | rval = qla2x00_start_sp(sp); | |
6140 | if (rval != QLA_SUCCESS) { | |
83548fe2 | 6141 | ql_dbg(ql_dbg_mbx, vha, 0x1018, |
15f30a57 QT |
6142 | "%s: %s Failed submission. %x.\n", |
6143 | __func__, sp->name, rval); | |
6144 | goto done_free_sp; | |
6145 | } | |
6146 | ||
83548fe2 | 6147 | ql_dbg(ql_dbg_mbx, vha, 0x113f, "MB:%s hndl %x submitted\n", |
15f30a57 QT |
6148 | sp->name, sp->handle); |
6149 | ||
6150 | wait_for_completion(&c->u.mbx.comp); | |
6151 | memcpy(mcp->mb, sp->u.iocb_cmd.u.mbx.in_mb, SIZEOF_IOCB_MB_REG); | |
6152 | ||
6153 | rval = c->u.mbx.rc; | |
6154 | switch (rval) { | |
6155 | case QLA_FUNCTION_TIMEOUT: | |
83548fe2 | 6156 | ql_dbg(ql_dbg_mbx, vha, 0x1140, "%s: %s Timeout. %x.\n", |
15f30a57 QT |
6157 | __func__, sp->name, rval); |
6158 | break; | |
6159 | case QLA_SUCCESS: | |
83548fe2 | 6160 | ql_dbg(ql_dbg_mbx, vha, 0x119d, "%s: %s done.\n", |
15f30a57 QT |
6161 | __func__, sp->name); |
6162 | sp->free(sp); | |
6163 | break; | |
6164 | default: | |
83548fe2 | 6165 | ql_dbg(ql_dbg_mbx, vha, 0x119e, "%s: %s Failed. %x.\n", |
15f30a57 QT |
6166 | __func__, sp->name, rval); |
6167 | sp->free(sp); | |
6168 | break; | |
6169 | } | |
6170 | ||
6171 | return rval; | |
6172 | ||
6173 | done_free_sp: | |
6174 | sp->free(sp); | |
6175 | done: | |
6176 | return rval; | |
6177 | } | |
6178 | ||
6179 | /* | |
6180 | * qla24xx_gpdb_wait | |
6181 | * NOTE: Do not call this routine from DPC thread | |
6182 | */ | |
6183 | int qla24xx_gpdb_wait(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) | |
6184 | { | |
6185 | int rval = QLA_FUNCTION_FAILED; | |
6186 | dma_addr_t pd_dma; | |
6187 | struct port_database_24xx *pd; | |
6188 | struct qla_hw_data *ha = vha->hw; | |
6189 | mbx_cmd_t mc; | |
6190 | ||
6191 | if (!vha->hw->flags.fw_started) | |
6192 | goto done; | |
6193 | ||
08eb7f45 | 6194 | pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); |
15f30a57 | 6195 | if (pd == NULL) { |
83548fe2 QT |
6196 | ql_log(ql_log_warn, vha, 0xd047, |
6197 | "Failed to allocate port database structure.\n"); | |
15f30a57 QT |
6198 | goto done_free_sp; |
6199 | } | |
15f30a57 QT |
6200 | |
6201 | memset(&mc, 0, sizeof(mc)); | |
6202 | mc.mb[0] = MBC_GET_PORT_DATABASE; | |
6203 | mc.mb[1] = cpu_to_le16(fcport->loop_id); | |
6204 | mc.mb[2] = MSW(pd_dma); | |
6205 | mc.mb[3] = LSW(pd_dma); | |
6206 | mc.mb[6] = MSW(MSD(pd_dma)); | |
6207 | mc.mb[7] = LSW(MSD(pd_dma)); | |
6208 | mc.mb[9] = cpu_to_le16(vha->vp_idx); | |
6209 | mc.mb[10] = cpu_to_le16((uint16_t)opt); | |
6210 | ||
6211 | rval = qla24xx_send_mb_cmd(vha, &mc); | |
6212 | if (rval != QLA_SUCCESS) { | |
83548fe2 | 6213 | ql_dbg(ql_dbg_mbx, vha, 0x1193, |
15f30a57 QT |
6214 | "%s: %8phC fail\n", __func__, fcport->port_name); |
6215 | goto done_free_sp; | |
6216 | } | |
6217 | ||
6218 | rval = __qla24xx_parse_gpdb(vha, fcport, pd); | |
6219 | ||
83548fe2 | 6220 | ql_dbg(ql_dbg_mbx, vha, 0x1197, "%s: %8phC done\n", |
15f30a57 QT |
6221 | __func__, fcport->port_name); |
6222 | ||
6223 | done_free_sp: | |
6224 | if (pd) | |
6225 | dma_pool_free(ha->s_dma_pool, pd, pd_dma); | |
6226 | done: | |
6227 | return rval; | |
6228 | } | |
6229 | ||
6230 | int __qla24xx_parse_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, | |
6231 | struct port_database_24xx *pd) | |
6232 | { | |
6233 | int rval = QLA_SUCCESS; | |
6234 | uint64_t zero = 0; | |
a5d42f4c DG |
6235 | u8 current_login_state, last_login_state; |
6236 | ||
6237 | if (fcport->fc4f_nvme) { | |
6238 | current_login_state = pd->current_login_state >> 4; | |
6239 | last_login_state = pd->last_login_state >> 4; | |
6240 | } else { | |
6241 | current_login_state = pd->current_login_state & 0xf; | |
6242 | last_login_state = pd->last_login_state & 0xf; | |
6243 | } | |
15f30a57 QT |
6244 | |
6245 | /* Check for logged in state. */ | |
23c64559 | 6246 | if (current_login_state != PDS_PRLI_COMPLETE) { |
83548fe2 QT |
6247 | ql_dbg(ql_dbg_mbx, vha, 0x119a, |
6248 | "Unable to verify login-state (%x/%x) for loop_id %x.\n", | |
a5d42f4c | 6249 | current_login_state, last_login_state, fcport->loop_id); |
15f30a57 QT |
6250 | rval = QLA_FUNCTION_FAILED; |
6251 | goto gpd_error_out; | |
6252 | } | |
6253 | ||
6254 | if (fcport->loop_id == FC_NO_LOOP_ID || | |
6255 | (memcmp(fcport->port_name, (uint8_t *)&zero, 8) && | |
6256 | memcmp(fcport->port_name, pd->port_name, 8))) { | |
6257 | /* We lost the device mid way. */ | |
6258 | rval = QLA_NOT_LOGGED_IN; | |
6259 | goto gpd_error_out; | |
6260 | } | |
6261 | ||
6262 | /* Names are little-endian. */ | |
6263 | memcpy(fcport->node_name, pd->node_name, WWN_SIZE); | |
6264 | memcpy(fcport->port_name, pd->port_name, WWN_SIZE); | |
6265 | ||
6266 | /* Get port_id of device. */ | |
6267 | fcport->d_id.b.domain = pd->port_id[0]; | |
6268 | fcport->d_id.b.area = pd->port_id[1]; | |
6269 | fcport->d_id.b.al_pa = pd->port_id[2]; | |
6270 | fcport->d_id.b.rsvd_1 = 0; | |
6271 | ||
a5d42f4c DG |
6272 | if (fcport->fc4f_nvme) { |
6273 | fcport->nvme_prli_service_param = | |
6274 | pd->prli_nvme_svc_param_word_3; | |
6275 | fcport->port_type = FCT_NVME; | |
6276 | } else { | |
6277 | /* If not target must be initiator or unknown type. */ | |
6278 | if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0) | |
6279 | fcport->port_type = FCT_INITIATOR; | |
6280 | else | |
6281 | fcport->port_type = FCT_TARGET; | |
6282 | } | |
15f30a57 QT |
6283 | /* Passback COS information. */ |
6284 | fcport->supported_classes = (pd->flags & PDF_CLASS_2) ? | |
6285 | FC_COS_CLASS2 : FC_COS_CLASS3; | |
6286 | ||
6287 | if (pd->prli_svc_param_word_3[0] & BIT_7) { | |
6288 | fcport->flags |= FCF_CONF_COMP_SUPPORTED; | |
6289 | fcport->conf_compl_supported = 1; | |
6290 | } | |
6291 | ||
6292 | gpd_error_out: | |
6293 | return rval; | |
6294 | } | |
6295 | ||
6296 | /* | |
6297 | * qla24xx_gidlist__wait | |
6298 | * NOTE: don't call this routine from DPC thread. | |
6299 | */ | |
6300 | int qla24xx_gidlist_wait(struct scsi_qla_host *vha, | |
6301 | void *id_list, dma_addr_t id_list_dma, uint16_t *entries) | |
6302 | { | |
6303 | int rval = QLA_FUNCTION_FAILED; | |
6304 | mbx_cmd_t mc; | |
6305 | ||
6306 | if (!vha->hw->flags.fw_started) | |
6307 | goto done; | |
6308 | ||
6309 | memset(&mc, 0, sizeof(mc)); | |
6310 | mc.mb[0] = MBC_GET_ID_LIST; | |
6311 | mc.mb[2] = MSW(id_list_dma); | |
6312 | mc.mb[3] = LSW(id_list_dma); | |
6313 | mc.mb[6] = MSW(MSD(id_list_dma)); | |
6314 | mc.mb[7] = LSW(MSD(id_list_dma)); | |
6315 | mc.mb[8] = 0; | |
6316 | mc.mb[9] = cpu_to_le16(vha->vp_idx); | |
6317 | ||
6318 | rval = qla24xx_send_mb_cmd(vha, &mc); | |
6319 | if (rval != QLA_SUCCESS) { | |
83548fe2 QT |
6320 | ql_dbg(ql_dbg_mbx, vha, 0x119b, |
6321 | "%s: fail\n", __func__); | |
15f30a57 QT |
6322 | } else { |
6323 | *entries = mc.mb[1]; | |
83548fe2 QT |
6324 | ql_dbg(ql_dbg_mbx, vha, 0x119c, |
6325 | "%s: done\n", __func__); | |
15f30a57 QT |
6326 | } |
6327 | done: | |
6328 | return rval; | |
6329 | } | |
deeae7a6 DG |
6330 | |
6331 | int qla27xx_set_zio_threshold(scsi_qla_host_t *vha, uint16_t value) | |
6332 | { | |
6333 | int rval; | |
6334 | mbx_cmd_t mc; | |
6335 | mbx_cmd_t *mcp = &mc; | |
6336 | ||
6337 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1200, | |
6338 | "Entered %s\n", __func__); | |
6339 | ||
6340 | memset(mcp->mb, 0 , sizeof(mcp->mb)); | |
6341 | mcp->mb[0] = MBC_GET_SET_ZIO_THRESHOLD; | |
6342 | mcp->mb[1] = cpu_to_le16(1); | |
6343 | mcp->mb[2] = cpu_to_le16(value); | |
6344 | mcp->out_mb = MBX_2 | MBX_1 | MBX_0; | |
6345 | mcp->in_mb = MBX_2 | MBX_0; | |
6346 | mcp->tov = MBX_TOV_SECONDS; | |
6347 | mcp->flags = 0; | |
6348 | ||
6349 | rval = qla2x00_mailbox_command(vha, mcp); | |
6350 | ||
6351 | ql_dbg(ql_dbg_mbx, vha, 0x1201, "%s %x\n", | |
6352 | (rval != QLA_SUCCESS) ? "Failed" : "Done", rval); | |
6353 | ||
6354 | return rval; | |
6355 | } | |
6356 | ||
6357 | int qla27xx_get_zio_threshold(scsi_qla_host_t *vha, uint16_t *value) | |
6358 | { | |
6359 | int rval; | |
6360 | mbx_cmd_t mc; | |
6361 | mbx_cmd_t *mcp = &mc; | |
6362 | ||
6363 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1203, | |
6364 | "Entered %s\n", __func__); | |
6365 | ||
6366 | memset(mcp->mb, 0, sizeof(mcp->mb)); | |
6367 | mcp->mb[0] = MBC_GET_SET_ZIO_THRESHOLD; | |
6368 | mcp->mb[1] = cpu_to_le16(0); | |
6369 | mcp->out_mb = MBX_1 | MBX_0; | |
6370 | mcp->in_mb = MBX_2 | MBX_0; | |
6371 | mcp->tov = MBX_TOV_SECONDS; | |
6372 | mcp->flags = 0; | |
6373 | ||
6374 | rval = qla2x00_mailbox_command(vha, mcp); | |
6375 | if (rval == QLA_SUCCESS) | |
6376 | *value = mc.mb[2]; | |
6377 | ||
6378 | ql_dbg(ql_dbg_mbx, vha, 0x1205, "%s %x\n", | |
6379 | (rval != QLA_SUCCESS) ? "Failed" : "Done", rval); | |
6380 | ||
6381 | return rval; | |
6382 | } | |
e4e3a2ce QT |
6383 | |
6384 | int | |
6385 | qla2x00_read_sfp_dev(struct scsi_qla_host *vha, char *buf, int count) | |
6386 | { | |
6387 | struct qla_hw_data *ha = vha->hw; | |
6388 | uint16_t iter, addr, offset; | |
6389 | dma_addr_t phys_addr; | |
6390 | int rval, c; | |
6391 | u8 *sfp_data; | |
6392 | ||
6393 | memset(ha->sfp_data, 0, SFP_DEV_SIZE); | |
6394 | addr = 0xa0; | |
6395 | phys_addr = ha->sfp_data_dma; | |
6396 | sfp_data = ha->sfp_data; | |
6397 | offset = c = 0; | |
6398 | ||
6399 | for (iter = 0; iter < SFP_DEV_SIZE / SFP_BLOCK_SIZE; iter++) { | |
6400 | if (iter == 4) { | |
6401 | /* Skip to next device address. */ | |
6402 | addr = 0xa2; | |
6403 | offset = 0; | |
6404 | } | |
6405 | ||
6406 | rval = qla2x00_read_sfp(vha, phys_addr, sfp_data, | |
6407 | addr, offset, SFP_BLOCK_SIZE, BIT_1); | |
6408 | if (rval != QLA_SUCCESS) { | |
6409 | ql_log(ql_log_warn, vha, 0x706d, | |
6410 | "Unable to read SFP data (%x/%x/%x).\n", rval, | |
6411 | addr, offset); | |
6412 | ||
6413 | return rval; | |
6414 | } | |
6415 | ||
6416 | if (buf && (c < count)) { | |
6417 | u16 sz; | |
6418 | ||
6419 | if ((count - c) >= SFP_BLOCK_SIZE) | |
6420 | sz = SFP_BLOCK_SIZE; | |
6421 | else | |
6422 | sz = count - c; | |
6423 | ||
6424 | memcpy(buf, sfp_data, sz); | |
6425 | buf += SFP_BLOCK_SIZE; | |
6426 | c += sz; | |
6427 | } | |
6428 | phys_addr += SFP_BLOCK_SIZE; | |
6429 | sfp_data += SFP_BLOCK_SIZE; | |
6430 | offset += SFP_BLOCK_SIZE; | |
6431 | } | |
6432 | ||
6433 | return rval; | |
6434 | } | |
94d83e36 QT |
6435 | |
6436 | int qla24xx_res_count_wait(struct scsi_qla_host *vha, | |
6437 | uint16_t *out_mb, int out_mb_sz) | |
6438 | { | |
6439 | int rval = QLA_FUNCTION_FAILED; | |
6440 | mbx_cmd_t mc; | |
6441 | ||
6442 | if (!vha->hw->flags.fw_started) | |
6443 | goto done; | |
6444 | ||
6445 | memset(&mc, 0, sizeof(mc)); | |
6446 | mc.mb[0] = MBC_GET_RESOURCE_COUNTS; | |
6447 | ||
6448 | rval = qla24xx_send_mb_cmd(vha, &mc); | |
6449 | if (rval != QLA_SUCCESS) { | |
6450 | ql_dbg(ql_dbg_mbx, vha, 0xffff, | |
6451 | "%s: fail\n", __func__); | |
6452 | } else { | |
6453 | if (out_mb_sz <= SIZEOF_IOCB_MB_REG) | |
6454 | memcpy(out_mb, mc.mb, out_mb_sz); | |
6455 | else | |
6456 | memcpy(out_mb, mc.mb, SIZEOF_IOCB_MB_REG); | |
6457 | ||
6458 | ql_dbg(ql_dbg_mbx, vha, 0xffff, | |
6459 | "%s: done\n", __func__); | |
6460 | } | |
6461 | done: | |
6462 | return rval; | |
6463 | } |