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[linux-block.git] / drivers / scsi / qla2xxx / qla_isr.c
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1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
bd21eaf9 3 * Copyright (c) 2003-2014 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT		 6 */
7#include "qla_def.h"
2d70c103 8#include "qla_target.h"
1da177e4 9
05236a05 10#include <linux/delay.h>
5a0e3ad6 11#include <linux/slab.h>
e326d22a 12#include <linux/cpu.h>
09ce66ae 13#include <linux/t10-pi.h>
df7baa50 14#include <scsi/scsi_tcq.h>
9a069e19 15#include <scsi/scsi_bsg_fc.h>
bad75002 16#include <scsi/scsi_eh.h>
d32041ec
JT		 17#include <scsi/fc/fc_fs.h>
18#include <linux/nvme-fc-driver.h>
df7baa50 19
1da177e4 20static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t);
73208dfd 21static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *);
2afa19a9 22static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *);
c5419e26 23static int qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *,
73208dfd 24 sts_entry_t *);
9f2475fe
SS		 25static void qla27xx_process_purex_fpin(struct scsi_qla_host *vha,
26 struct purex_item *item);
27static struct purex_item *qla24xx_alloc_purex_item(scsi_qla_host_t *vha,
28 uint16_t size);
29static struct purex_item *qla24xx_copy_std_pkt(struct scsi_qla_host *vha,
30 void *pkt);
31static struct purex_item *qla27xx_copy_fpin_pkt(struct scsi_qla_host *vha,
32 void **pkt, struct rsp_que **rsp);
33
34static void
35qla27xx_process_purex_fpin(struct scsi_qla_host *vha, struct purex_item *item)
36{
37 void *pkt = &item->iocb;
38 uint16_t pkt_size = item->size;
39
40 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x508d,
41 "%s: Enter\n", __func__);
42
43 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x508e,
44 "-------- ELS REQ -------\n");
45 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x508f,
46 pkt, pkt_size);
47
48 fc_host_fpin_rcv(vha->host, pkt_size, (char *)pkt);
49}
9a853f71 50
c4dc7cd3
BVA		 51const char *const port_state_str[] = {
52 "Unknown",
53 "UNCONFIGURED",
54 "DEAD",
55 "LOST",
56 "ONLINE"
57};
58
576bfde8 59static void
62e9dd17 60qla24xx_process_abts(struct scsi_qla_host *vha, struct purex_item *pkt)
576bfde8 61{
62e9dd17
SS		 62 struct abts_entry_24xx *abts =
63 (struct abts_entry_24xx *)&pkt->iocb;
576bfde8
JC		 64 struct qla_hw_data *ha = vha->hw;
65 struct els_entry_24xx *rsp_els;
66 struct abts_entry_24xx *abts_rsp;
67 dma_addr_t dma;
68 uint32_t fctl;
69 int rval;
70
71 ql_dbg(ql_dbg_init, vha, 0x0286, "%s: entered.\n", __func__);
72
73 ql_log(ql_log_warn, vha, 0x0287,
74 "Processing ABTS xchg=%#x oxid=%#x rxid=%#x seqid=%#x seqcnt=%#x\n",
75 abts->rx_xch_addr_to_abort, abts->ox_id, abts->rx_id,
76 abts->seq_id, abts->seq_cnt);
77 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0287,
78 "-------- ABTS RCV -------\n");
79 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0287,
80 (uint8_t *)abts, sizeof(*abts));
81
82 rsp_els = dma_alloc_coherent(&ha->pdev->dev, sizeof(*rsp_els), &dma,
83 GFP_KERNEL);
84 if (!rsp_els) {
85 ql_log(ql_log_warn, vha, 0x0287,
86 "Failed allocate dma buffer ABTS/ELS RSP.\n");
87 return;
88 }
89
90 /* terminate exchange */
576bfde8
JC		 91 rsp_els->entry_type = ELS_IOCB_TYPE;
92 rsp_els->entry_count = 1;
7ffa5b93 93 rsp_els->nport_handle = cpu_to_le16(~0);
576bfde8 94 rsp_els->rx_xchg_address = abts->rx_xch_addr_to_abort;
7ffa5b93 95 rsp_els->control_flags = cpu_to_le16(EPD_RX_XCHG);
576bfde8
JC		 96 ql_dbg(ql_dbg_init, vha, 0x0283,
97 "Sending ELS Response to terminate exchange %#x...\n",
98 abts->rx_xch_addr_to_abort);
99 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0283,
100 "-------- ELS RSP -------\n");
101 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0283,
102 (uint8_t *)rsp_els, sizeof(*rsp_els));
103 rval = qla2x00_issue_iocb(vha, rsp_els, dma, 0);
104 if (rval) {
105 ql_log(ql_log_warn, vha, 0x0288,
106 "%s: iocb failed to execute -> %x\n", __func__, rval);
107 } else if (rsp_els->comp_status) {
108 ql_log(ql_log_warn, vha, 0x0289,
109 "%s: iocb failed to complete -> completion=%#x subcode=(%#x,%#x)\n",
110 __func__, rsp_els->comp_status,
111 rsp_els->error_subcode_1, rsp_els->error_subcode_2);
112 } else {
113 ql_dbg(ql_dbg_init, vha, 0x028a,
114 "%s: abort exchange done.\n", __func__);
115 }
116
117 /* send ABTS response */
118 abts_rsp = (void *)rsp_els;
119 memset(abts_rsp, 0, sizeof(*abts_rsp));
120 abts_rsp->entry_type = ABTS_RSP_TYPE;
121 abts_rsp->entry_count = 1;
122 abts_rsp->nport_handle = abts->nport_handle;
123 abts_rsp->vp_idx = abts->vp_idx;
124 abts_rsp->sof_type = abts->sof_type & 0xf0;
125 abts_rsp->rx_xch_addr = abts->rx_xch_addr;
126 abts_rsp->d_id[0] = abts->s_id[0];
127 abts_rsp->d_id[1] = abts->s_id[1];
128 abts_rsp->d_id[2] = abts->s_id[2];
129 abts_rsp->r_ctl = FC_ROUTING_BLD | FC_R_CTL_BLD_BA_ACC;
130 abts_rsp->s_id[0] = abts->d_id[0];
131 abts_rsp->s_id[1] = abts->d_id[1];
132 abts_rsp->s_id[2] = abts->d_id[2];
133 abts_rsp->cs_ctl = abts->cs_ctl;
134 /* include flipping bit23 in fctl */
135 fctl = ~(abts->f_ctl[2] | 0x7F) << 16 |
136 FC_F_CTL_LAST_SEQ | FC_F_CTL_END_SEQ | FC_F_CTL_SEQ_INIT;
137 abts_rsp->f_ctl[0] = fctl >> 0 & 0xff;
138 abts_rsp->f_ctl[1] = fctl >> 8 & 0xff;
139 abts_rsp->f_ctl[2] = fctl >> 16 & 0xff;
140 abts_rsp->type = FC_TYPE_BLD;
141 abts_rsp->rx_id = abts->rx_id;
142 abts_rsp->ox_id = abts->ox_id;
143 abts_rsp->payload.ba_acc.aborted_rx_id = abts->rx_id;
144 abts_rsp->payload.ba_acc.aborted_ox_id = abts->ox_id;
7ffa5b93 145 abts_rsp->payload.ba_acc.high_seq_cnt = cpu_to_le16(~0);
576bfde8
JC		 146 abts_rsp->rx_xch_addr_to_abort = abts->rx_xch_addr_to_abort;
147 ql_dbg(ql_dbg_init, vha, 0x028b,
148 "Sending BA ACC response to ABTS %#x...\n",
149 abts->rx_xch_addr_to_abort);
150 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x028b,
151 "-------- ELS RSP -------\n");
152 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x028b,
153 (uint8_t *)abts_rsp, sizeof(*abts_rsp));
154 rval = qla2x00_issue_iocb(vha, abts_rsp, dma, 0);
155 if (rval) {
156 ql_log(ql_log_warn, vha, 0x028c,
157 "%s: iocb failed to execute -> %x\n", __func__, rval);
158 } else if (abts_rsp->comp_status) {
159 ql_log(ql_log_warn, vha, 0x028d,
160 "%s: iocb failed to complete -> completion=%#x subcode=(%#x,%#x)\n",
161 __func__, abts_rsp->comp_status,
162 abts_rsp->payload.error.subcode1,
163 abts_rsp->payload.error.subcode2);
164 } else {
165 ql_dbg(ql_dbg_init, vha, 0x028ea,
166 "%s: done.\n", __func__);
167 }
168
169 dma_free_coherent(&ha->pdev->dev, sizeof(*rsp_els), rsp_els, dma);
170}
171
1da177e4
LT		 172/**
173 * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200.
807eb907 174 * @irq: interrupt number
1da177e4 175 * @dev_id: SCSI driver HA context
1da177e4
LT		 176 *
177 * Called by system whenever the host adapter generates an interrupt.
178 *
179 * Returns handled flag.
180 */
181irqreturn_t
7d12e780 182qla2100_intr_handler(int irq, void *dev_id)
1da177e4 183{
e315cd28
AC		 184 scsi_qla_host_t *vha;
185 struct qla_hw_data *ha;
3d71644c 186 struct device_reg_2xxx __iomem *reg;
1da177e4 187 int status;
1da177e4 188 unsigned long iter;
14e660e6 189 uint16_t hccr;
0a59cea4 190 uint16_t mb[8];
e315cd28 191 struct rsp_que *rsp;
43fac4d9 192 unsigned long flags;
1da177e4 193
e315cd28
AC		 194 rsp = (struct rsp_que *) dev_id;
195 if (!rsp) {
3256b435
CD		 196 ql_log(ql_log_info, NULL, 0x505d,
197 "%s: NULL response queue pointer.\n", __func__);
1da177e4
LT		 198 return (IRQ_NONE);
199 }
200
e315cd28 201 ha = rsp->hw;
3d71644c 202 reg = &ha->iobase->isp;
1da177e4
LT		 203 status = 0;
204
43fac4d9 205 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 206 vha = pci_get_drvdata(ha->pdev);
1da177e4 207 for (iter = 50; iter--; ) {
04474d3a 208 hccr = rd_reg_word(&reg->hccr);
c821e0d5 209 if (qla2x00_check_reg16_for_disconnect(vha, hccr))
f3ddac19 210 break;
14e660e6
SJ		 211 if (hccr & HCCR_RISC_PAUSE) {
212 if (pci_channel_offline(ha->pdev))
213 break;
214
215 /*
216 * Issue a "HARD" reset in order for the RISC interrupt
a06a0f8e 217 * bit to be cleared. Schedule a big hammer to get
14e660e6
SJ		 218 * out of the RISC PAUSED state.
219 */
04474d3a
BVA		 220 wrt_reg_word(&reg->hccr, HCCR_RESET_RISC);
221 rd_reg_word(&reg->hccr);
14e660e6 222
8ae17876 223 ha->isp_ops->fw_dump(vha);
e315cd28 224 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
14e660e6 225 break;
04474d3a 226 } else if ((rd_reg_word(&reg->istatus) & ISR_RISC_INT) == 0)
1da177e4
LT		 227 break;
228
04474d3a
BVA		 229 if (rd_reg_word(&reg->semaphore) & BIT_0) {
230 wrt_reg_word(&reg->hccr, HCCR_CLR_RISC_INT);
231 rd_reg_word(&reg->hccr);
1da177e4
LT		 232
233 /* Get mailbox data. */
9a853f71
AV		 234 mb[0] = RD_MAILBOX_REG(ha, reg, 0);
235 if (mb[0] > 0x3fff && mb[0] < 0x8000) {
e315cd28 236 qla2x00_mbx_completion(vha, mb[0]);
1da177e4 237 status |= MBX_INTERRUPT;
9a853f71
AV		 238 } else if (mb[0] > 0x7fff && mb[0] < 0xc000) {
239 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
240 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
241 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
73208dfd 242 qla2x00_async_event(vha, rsp, mb);
1da177e4
LT		 243 } else {
244 /*EMPTY*/
7c3df132
SK		 245 ql_dbg(ql_dbg_async, vha, 0x5025,
246 "Unrecognized interrupt type (%d).\n",
247 mb[0]);
1da177e4
LT		 248 }
249 /* Release mailbox registers. */
04474d3a
BVA		 250 wrt_reg_word(&reg->semaphore, 0);
251 rd_reg_word(&reg->semaphore);
1da177e4 252 } else {
73208dfd 253 qla2x00_process_response_queue(rsp);
1da177e4 254
04474d3a
BVA		 255 wrt_reg_word(&reg->hccr, HCCR_CLR_RISC_INT);
256 rd_reg_word(&reg->hccr);
1da177e4
LT		 257 }
258 }
36439832 259 qla2x00_handle_mbx_completion(ha, status);
43fac4d9 260 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1da177e4 261
1da177e4
LT		 262 return (IRQ_HANDLED);
263}
264
f3ddac19 265bool
c821e0d5 266qla2x00_check_reg32_for_disconnect(scsi_qla_host_t *vha, uint32_t reg)
f3ddac19
CD		 267{
268 /* Check for PCI disconnection */
a30c2a3b 269 if (reg == 0xffffffff && !pci_channel_offline(vha->hw->pdev)) {
beb9e315 270 if (!test_and_set_bit(PFLG_DISCONNECTED, &vha->pci_flags) &&
6b383979
JL		 271 !test_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags) &&
272 !test_bit(PFLG_DRIVER_PROBING, &vha->pci_flags)) {
232792b6
JL		 273 /*
274 * Schedule this (only once) on the default system
275 * workqueue so that all the adapter workqueues and the
276 * DPC thread can be shutdown cleanly.
277 */
278 schedule_work(&vha->hw->board_disable);
279 }
f3ddac19
CD		 280 return true;
281 } else
282 return false;
283}
284
c821e0d5
JL		 285bool
286qla2x00_check_reg16_for_disconnect(scsi_qla_host_t *vha, uint16_t reg)
287{
288 return qla2x00_check_reg32_for_disconnect(vha, 0xffff0000 | reg);
289}
290
1da177e4
LT		 291/**
292 * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx.
807eb907 293 * @irq: interrupt number
1da177e4 294 * @dev_id: SCSI driver HA context
1da177e4
LT		 295 *
296 * Called by system whenever the host adapter generates an interrupt.
297 *
298 * Returns handled flag.
299 */
300irqreturn_t
7d12e780 301qla2300_intr_handler(int irq, void *dev_id)
1da177e4 302{
e315cd28 303 scsi_qla_host_t *vha;
3d71644c 304 struct device_reg_2xxx __iomem *reg;
1da177e4 305 int status;
1da177e4
LT		 306 unsigned long iter;
307 uint32_t stat;
1da177e4 308 uint16_t hccr;
0a59cea4 309 uint16_t mb[8];
e315cd28
AC		 310 struct rsp_que *rsp;
311 struct qla_hw_data *ha;
43fac4d9 312 unsigned long flags;
1da177e4 313
e315cd28
AC		 314 rsp = (struct rsp_que *) dev_id;
315 if (!rsp) {
3256b435
CD		 316 ql_log(ql_log_info, NULL, 0x5058,
317 "%s: NULL response queue pointer.\n", __func__);
1da177e4
LT		 318 return (IRQ_NONE);
319 }
320
e315cd28 321 ha = rsp->hw;
3d71644c 322 reg = &ha->iobase->isp;
1da177e4
LT		 323 status = 0;
324
43fac4d9 325 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 326 vha = pci_get_drvdata(ha->pdev);
1da177e4 327 for (iter = 50; iter--; ) {
04474d3a 328 stat = rd_reg_dword(&reg->u.isp2300.host_status);
c821e0d5 329 if (qla2x00_check_reg32_for_disconnect(vha, stat))
f3ddac19 330 break;
1da177e4 331 if (stat & HSR_RISC_PAUSED) {
85880801 332 if (unlikely(pci_channel_offline(ha->pdev)))
14e660e6
SJ		 333 break;
334
04474d3a 335 hccr = rd_reg_word(&reg->hccr);
f3ddac19 336
1da177e4 337 if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8))
7c3df132
SK		 338 ql_log(ql_log_warn, vha, 0x5026,
339 "Parity error -- HCCR=%x, Dumping "
340 "firmware.\n", hccr);
1da177e4 341 else
7c3df132
SK		 342 ql_log(ql_log_warn, vha, 0x5027,
343 "RISC paused -- HCCR=%x, Dumping "
344 "firmware.\n", hccr);
1da177e4
LT		 345
346 /*
347 * Issue a "HARD" reset in order for the RISC
348 * interrupt bit to be cleared. Schedule a big
a06a0f8e 349 * hammer to get out of the RISC PAUSED state.
1da177e4 350 */
04474d3a
BVA		 351 wrt_reg_word(&reg->hccr, HCCR_RESET_RISC);
352 rd_reg_word(&reg->hccr);
07f31805 353
8ae17876 354 ha->isp_ops->fw_dump(vha);
e315cd28 355 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 356 break;
357 } else if ((stat & HSR_RISC_INT) == 0)
358 break;
359
1da177e4 360 switch (stat & 0xff) {
1da177e4
LT		 361 case 0x1:
362 case 0x2:
363 case 0x10:
364 case 0x11:
e315cd28 365 qla2x00_mbx_completion(vha, MSW(stat));
1da177e4
LT		 366 status |= MBX_INTERRUPT;
367
368 /* Release mailbox registers. */
04474d3a 369 wrt_reg_word(&reg->semaphore, 0);
1da177e4
LT		 370 break;
371 case 0x12:
9a853f71
AV		 372 mb[0] = MSW(stat);
373 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
374 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
375 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
73208dfd 376 qla2x00_async_event(vha, rsp, mb);
9a853f71
AV		 377 break;
378 case 0x13:
73208dfd 379 qla2x00_process_response_queue(rsp);
1da177e4
LT		 380 break;
381 case 0x15:
9a853f71
AV		 382 mb[0] = MBA_CMPLT_1_16BIT;
383 mb[1] = MSW(stat);
73208dfd 384 qla2x00_async_event(vha, rsp, mb);
1da177e4
LT		 385 break;
386 case 0x16:
9a853f71
AV		 387 mb[0] = MBA_SCSI_COMPLETION;
388 mb[1] = MSW(stat);
389 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
73208dfd 390 qla2x00_async_event(vha, rsp, mb);
1da177e4
LT		 391 break;
392 default:
7c3df132
SK		 393 ql_dbg(ql_dbg_async, vha, 0x5028,
394 "Unrecognized interrupt type (%d).\n", stat & 0xff);
1da177e4
LT		 395 break;
396 }
04474d3a
BVA		 397 wrt_reg_word(&reg->hccr, HCCR_CLR_RISC_INT);
398 rd_reg_word_relaxed(&reg->hccr);
1da177e4 399 }
36439832 400 qla2x00_handle_mbx_completion(ha, status);
43fac4d9 401 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1da177e4 402
1da177e4
LT		 403 return (IRQ_HANDLED);
404}
405
406/**
407 * qla2x00_mbx_completion() - Process mailbox command completions.
2db6228d 408 * @vha: SCSI driver HA context
1da177e4
LT		 409 * @mb0: Mailbox0 register
410 */
411static void
e315cd28 412qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
1da177e4
LT		 413{
414 uint16_t cnt;
4fa94f83 415 uint32_t mboxes;
7ffa5b93 416 __le16 __iomem *wptr;
e315cd28 417 struct qla_hw_data *ha = vha->hw;
3d71644c 418 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 419
4fa94f83 420 /* Read all mbox registers? */
c02189e1
BVA		 421 WARN_ON_ONCE(ha->mbx_count > 32);
422 mboxes = (1ULL << ha->mbx_count) - 1;
4fa94f83 423 if (!ha->mcp)
a720101d 424 ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERROR.\n");
4fa94f83
AV		 425 else
426 mboxes = ha->mcp->in_mb;
427
1da177e4
LT		 428 /* Load return mailbox registers. */
429 ha->flags.mbox_int = 1;
430 ha->mailbox_out[0] = mb0;
4fa94f83 431 mboxes >>= 1;
7ffa5b93 432 wptr = MAILBOX_REG(ha, reg, 1);
1da177e4
LT		 433
434 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
fa2a1ce5 435 if (IS_QLA2200(ha) && cnt == 8)
7ffa5b93 436 wptr = MAILBOX_REG(ha, reg, 8);
4fa94f83 437 if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0))
1da177e4 438 ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr);
4fa94f83 439 else if (mboxes & BIT_0)
04474d3a 440 ha->mailbox_out[cnt] = rd_reg_word(wptr);
fa2a1ce5 441
1da177e4 442 wptr++;
4fa94f83 443 mboxes >>= 1;
1da177e4 444 }
1da177e4
LT		 445}
446
8a659571
AV		 447static void
448qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr)
449{
450 static char *event[] =
451 { "Complete", "Request Notification", "Time Extension" };
452 int rval;
453 struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24;
9e5054ec 454 struct device_reg_82xx __iomem *reg82 = &vha->hw->iobase->isp82;
37139da1 455 __le16 __iomem *wptr;
8a659571
AV		 456 uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS];
457
458 /* Seed data -- mailbox1 -> mailbox7. */
9e5054ec 459 if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw))
7ffa5b93 460 wptr = &reg24->mailbox1;
9e5054ec 461 else if (IS_QLA8044(vha->hw))
7ffa5b93 462 wptr = &reg82->mailbox_out[1];
9e5054ec
CD		 463 else
464 return;
465
8a659571 466 for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++)
04474d3a 467 mb[cnt] = rd_reg_word(wptr);
8a659571 468
7c3df132 469 ql_dbg(ql_dbg_async, vha, 0x5021,
6246b8a1 470 "Inter-Driver Communication %s -- "
7c3df132
SK		 471 "%04x %04x %04x %04x %04x %04x %04x.\n",
472 event[aen & 0xff], mb[0], mb[1], mb[2], mb[3],
473 mb[4], mb[5], mb[6]);
454073c9
SV		 474 switch (aen) {
475 /* Handle IDC Error completion case. */
476 case MBA_IDC_COMPLETE:
477 if (mb[1] >> 15) {
478 vha->hw->flags.idc_compl_status = 1;
9aaf2cea 479 if (vha->hw->notify_dcbx_comp && !vha->vp_idx)
454073c9
SV		 480 complete(&vha->hw->dcbx_comp);
481 }
482 break;
483
484 case MBA_IDC_NOTIFY:
485 /* Acknowledgement needed? [Notify && non-zero timeout]. */
486 timeout = (descr >> 8) & 0xf;
487 ql_dbg(ql_dbg_async, vha, 0x5022,
488 "%lu Inter-Driver Communication %s -- ACK timeout=%d.\n",
489 vha->host_no, event[aen & 0xff], timeout);
490
491 if (!timeout)
492 return;
493 rval = qla2x00_post_idc_ack_work(vha, mb);
494 if (rval != QLA_SUCCESS)
495 ql_log(ql_log_warn, vha, 0x5023,
496 "IDC failed to post ACK.\n");
497 break;
498 case MBA_IDC_TIME_EXT:
499 vha->hw->idc_extend_tmo = descr;
500 ql_dbg(ql_dbg_async, vha, 0x5087,
501 "%lu Inter-Driver Communication %s -- "
502 "Extend timeout by=%d.\n",
503 vha->host_no, event[aen & 0xff], vha->hw->idc_extend_tmo);
504 break;
bf5b8ad7 505 }
8a659571
AV		 506}
507
daae62a3 508#define LS_UNKNOWN 2
d0297c9a
JC		 509const char *
510qla2x00_get_link_speed_str(struct qla_hw_data *ha, uint16_t speed)
daae62a3 511{
f73cb695
CD		 512 static const char *const link_speeds[] = {
513 "1", "2", "?", "4", "8", "16", "32", "10"
d0297c9a 514 };
b0a1c5b5 515#define QLA_LAST_SPEED (ARRAY_SIZE(link_speeds) - 1)
daae62a3
CD		 516
517 if (IS_QLA2100(ha) || IS_QLA2200(ha))
d0297c9a
JC		 518 return link_speeds[0];
519 else if (speed == 0x13)
f73cb695
CD		 520 return link_speeds[QLA_LAST_SPEED];
521 else if (speed < QLA_LAST_SPEED)
d0297c9a
JC		 522 return link_speeds[speed];
523 else
524 return link_speeds[LS_UNKNOWN];
daae62a3
CD		 525}
526
fa492630 527static void
7d613ac6
SV		 528qla83xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb)
529{
530 struct qla_hw_data *ha = vha->hw;
531
532 /*
533 * 8200 AEN Interpretation:
534 * mb[0] = AEN code
535 * mb[1] = AEN Reason code
536 * mb[2] = LSW of Peg-Halt Status-1 Register
537 * mb[6] = MSW of Peg-Halt Status-1 Register
538 * mb[3] = LSW of Peg-Halt Status-2 register
539 * mb[7] = MSW of Peg-Halt Status-2 register
540 * mb[4] = IDC Device-State Register value
541 * mb[5] = IDC Driver-Presence Register value
542 */
543 ql_dbg(ql_dbg_async, vha, 0x506b, "AEN Code: mb[0] = 0x%x AEN reason: "
544 "mb[1] = 0x%x PH-status1: mb[2] = 0x%x PH-status1: mb[6] = 0x%x.\n",
545 mb[0], mb[1], mb[2], mb[6]);
546 ql_dbg(ql_dbg_async, vha, 0x506c, "PH-status2: mb[3] = 0x%x "
547 "PH-status2: mb[7] = 0x%x Device-State: mb[4] = 0x%x "
548 "Drv-Presence: mb[5] = 0x%x.\n", mb[3], mb[7], mb[4], mb[5]);
549
550 if (mb[1] & (IDC_PEG_HALT_STATUS_CHANGE | IDC_NIC_FW_REPORTED_FAILURE |
551 IDC_HEARTBEAT_FAILURE)) {
552 ha->flags.nic_core_hung = 1;
553 ql_log(ql_log_warn, vha, 0x5060,
554 "83XX: F/W Error Reported: Check if reset required.\n");
555
556 if (mb[1] & IDC_PEG_HALT_STATUS_CHANGE) {
557 uint32_t protocol_engine_id, fw_err_code, err_level;
558
559 /*
560 * IDC_PEG_HALT_STATUS_CHANGE interpretation:
561 * - PEG-Halt Status-1 Register:
562 * (LSW = mb[2], MSW = mb[6])
563 * Bits 0-7 = protocol-engine ID
564 * Bits 8-28 = f/w error code
565 * Bits 29-31 = Error-level
566 * Error-level 0x1 = Non-Fatal error
567 * Error-level 0x2 = Recoverable Fatal error
568 * Error-level 0x4 = UnRecoverable Fatal error
569 * - PEG-Halt Status-2 Register:
570 * (LSW = mb[3], MSW = mb[7])
571 */
572 protocol_engine_id = (mb[2] & 0xff);
573 fw_err_code = (((mb[2] & 0xff00) >> 8) |
574 ((mb[6] & 0x1fff) << 8));
575 err_level = ((mb[6] & 0xe000) >> 13);
576 ql_log(ql_log_warn, vha, 0x5061, "PegHalt Status-1 "
577 "Register: protocol_engine_id=0x%x "
578 "fw_err_code=0x%x err_level=0x%x.\n",
579 protocol_engine_id, fw_err_code, err_level);
580 ql_log(ql_log_warn, vha, 0x5062, "PegHalt Status-2 "
581 "Register: 0x%x%x.\n", mb[7], mb[3]);
582 if (err_level == ERR_LEVEL_NON_FATAL) {
583 ql_log(ql_log_warn, vha, 0x5063,
0bf0efa1 584 "Not a fatal error, f/w has recovered itself.\n");
7d613ac6
SV		 585 } else if (err_level == ERR_LEVEL_RECOVERABLE_FATAL) {
586 ql_log(ql_log_fatal, vha, 0x5064,
587 "Recoverable Fatal error: Chip reset "
588 "required.\n");
589 qla83xx_schedule_work(vha,
590 QLA83XX_NIC_CORE_RESET);
591 } else if (err_level == ERR_LEVEL_UNRECOVERABLE_FATAL) {
592 ql_log(ql_log_fatal, vha, 0x5065,
593 "Unrecoverable Fatal error: Set FAILED "
594 "state, reboot required.\n");
595 qla83xx_schedule_work(vha,
596 QLA83XX_NIC_CORE_UNRECOVERABLE);
597 }
598 }
599
600 if (mb[1] & IDC_NIC_FW_REPORTED_FAILURE) {
601 uint16_t peg_fw_state, nw_interface_link_up;
602 uint16_t nw_interface_signal_detect, sfp_status;
603 uint16_t htbt_counter, htbt_monitor_enable;
b4a028a5 604 uint16_t sfp_additional_info, sfp_multirate;
7d613ac6
SV		 605 uint16_t sfp_tx_fault, link_speed, dcbx_status;
606
607 /*
608 * IDC_NIC_FW_REPORTED_FAILURE interpretation:
609 * - PEG-to-FC Status Register:
610 * (LSW = mb[2], MSW = mb[6])
611 * Bits 0-7 = Peg-Firmware state
612 * Bit 8 = N/W Interface Link-up
613 * Bit 9 = N/W Interface signal detected
614 * Bits 10-11 = SFP Status
615 * SFP Status 0x0 = SFP+ transceiver not expected
616 * SFP Status 0x1 = SFP+ transceiver not present
617 * SFP Status 0x2 = SFP+ transceiver invalid
618 * SFP Status 0x3 = SFP+ transceiver present and
619 * valid
620 * Bits 12-14 = Heartbeat Counter
621 * Bit 15 = Heartbeat Monitor Enable
622 * Bits 16-17 = SFP Additional Info
623 * SFP info 0x0 = Unregocnized transceiver for
624 * Ethernet
625 * SFP info 0x1 = SFP+ brand validation failed
626 * SFP info 0x2 = SFP+ speed validation failed
627 * SFP info 0x3 = SFP+ access error
628 * Bit 18 = SFP Multirate
629 * Bit 19 = SFP Tx Fault
630 * Bits 20-22 = Link Speed
631 * Bits 23-27 = Reserved
632 * Bits 28-30 = DCBX Status
633 * DCBX Status 0x0 = DCBX Disabled
634 * DCBX Status 0x1 = DCBX Enabled
635 * DCBX Status 0x2 = DCBX Exchange error
636 * Bit 31 = Reserved
637 */
638 peg_fw_state = (mb[2] & 0x00ff);
639 nw_interface_link_up = ((mb[2] & 0x0100) >> 8);
640 nw_interface_signal_detect = ((mb[2] & 0x0200) >> 9);
641 sfp_status = ((mb[2] & 0x0c00) >> 10);
642 htbt_counter = ((mb[2] & 0x7000) >> 12);
643 htbt_monitor_enable = ((mb[2] & 0x8000) >> 15);
b4a028a5 644 sfp_additional_info = (mb[6] & 0x0003);
7d613ac6
SV		 645 sfp_multirate = ((mb[6] & 0x0004) >> 2);
646 sfp_tx_fault = ((mb[6] & 0x0008) >> 3);
647 link_speed = ((mb[6] & 0x0070) >> 4);
648 dcbx_status = ((mb[6] & 0x7000) >> 12);
649
650 ql_log(ql_log_warn, vha, 0x5066,
651 "Peg-to-Fc Status Register:\n"
652 "peg_fw_state=0x%x, nw_interface_link_up=0x%x, "
653 "nw_interface_signal_detect=0x%x"
654 "\nsfp_statis=0x%x.\n ", peg_fw_state,
655 nw_interface_link_up, nw_interface_signal_detect,
656 sfp_status);
657 ql_log(ql_log_warn, vha, 0x5067,
658 "htbt_counter=0x%x, htbt_monitor_enable=0x%x, "
b4a028a5 659 "sfp_additional_info=0x%x, sfp_multirate=0x%x.\n ",
7d613ac6 660 htbt_counter, htbt_monitor_enable,
b4a028a5 661 sfp_additional_info, sfp_multirate);
7d613ac6
SV		 662 ql_log(ql_log_warn, vha, 0x5068,
663 "sfp_tx_fault=0x%x, link_state=0x%x, "
664 "dcbx_status=0x%x.\n", sfp_tx_fault, link_speed,
665 dcbx_status);
666
667 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
668 }
669
670 if (mb[1] & IDC_HEARTBEAT_FAILURE) {
671 ql_log(ql_log_warn, vha, 0x5069,
672 "Heartbeat Failure encountered, chip reset "
673 "required.\n");
674
675 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
676 }
677 }
678
679 if (mb[1] & IDC_DEVICE_STATE_CHANGE) {
680 ql_log(ql_log_info, vha, 0x506a,
681 "IDC Device-State changed = 0x%x.\n", mb[4]);
6c3943cd
SK		 682 if (ha->flags.nic_core_reset_owner)
683 return;
7d613ac6
SV		 684 qla83xx_schedule_work(vha, MBA_IDC_AEN);
685 }
686}
687
bb4cf5b7
CD		 688int
689qla2x00_is_a_vp_did(scsi_qla_host_t *vha, uint32_t rscn_entry)
690{
691 struct qla_hw_data *ha = vha->hw;
692 scsi_qla_host_t *vp;
693 uint32_t vp_did;
694 unsigned long flags;
695 int ret = 0;
696
697 if (!ha->num_vhosts)
698 return ret;
699
700 spin_lock_irqsave(&ha->vport_slock, flags);
701 list_for_each_entry(vp, &ha->vp_list, list) {
702 vp_did = vp->d_id.b24;
703 if (vp_did == rscn_entry) {
704 ret = 1;
705 break;
706 }
707 }
708 spin_unlock_irqrestore(&ha->vport_slock, flags);
709
710 return ret;
711}
712
726b8548 713fc_port_t *
17cac3a1
JC		 714qla2x00_find_fcport_by_loopid(scsi_qla_host_t *vha, uint16_t loop_id)
715{
726b8548
QT		 716 fc_port_t *f, *tf;
717
718 f = tf = NULL;
719 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list)
720 if (f->loop_id == loop_id)
721 return f;
722 return NULL;
723}
17cac3a1 724
726b8548
QT		 725fc_port_t *
726qla2x00_find_fcport_by_wwpn(scsi_qla_host_t *vha, u8 *wwpn, u8 incl_deleted)
727{
728 fc_port_t *f, *tf;
729
730 f = tf = NULL;
731 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
732 if (memcmp(f->port_name, wwpn, WWN_SIZE) == 0) {
733 if (incl_deleted)
734 return f;
735 else if (f->deleted == 0)
736 return f;
737 }
738 }
739 return NULL;
740}
17cac3a1 741
726b8548
QT		 742fc_port_t *
743qla2x00_find_fcport_by_nportid(scsi_qla_host_t *vha, port_id_t *id,
744 u8 incl_deleted)
745{
746 fc_port_t *f, *tf;
747
748 f = tf = NULL;
749 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
750 if (f->d_id.b24 == id->b24) {
751 if (incl_deleted)
752 return f;
753 else if (f->deleted == 0)
754 return f;
755 }
756 }
17cac3a1
JC		 757 return NULL;
758}
759
cbb01c2f
AE		 760/* Shall be called only on supported adapters. */
761static void
762qla27xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb)
763{
764 struct qla_hw_data *ha = vha->hw;
765 bool reset_isp_needed = 0;
766
767 ql_log(ql_log_warn, vha, 0x02f0,
768 "MPI Heartbeat stop. MPI reset is%s needed. "
769 "MB0[%xh] MB1[%xh] MB2[%xh] MB3[%xh]\n",
770 mb[0] & BIT_8 ? "" : " not",
771 mb[0], mb[1], mb[2], mb[3]);
772
773 if ((mb[1] & BIT_8) == 0)
774 return;
775
776 ql_log(ql_log_warn, vha, 0x02f1,
777 "MPI Heartbeat stop. FW dump needed\n");
778
779 if (ql2xfulldump_on_mpifail) {
8ae17876 780 ha->isp_ops->fw_dump(vha);
cbb01c2f
AE		 781 reset_isp_needed = 1;
782 }
783
784 ha->isp_ops->mpi_fw_dump(vha, 1);
785
786 if (reset_isp_needed) {
787 vha->hw->flags.fw_init_done = 0;
788 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
789 qla2xxx_wake_dpc(vha);
790 }
791}
792
58101f15 793static struct purex_item *
62e9dd17
SS		 794qla24xx_alloc_purex_item(scsi_qla_host_t *vha, uint16_t size)
795{
796 struct purex_item *item = NULL;
797 uint8_t item_hdr_size = sizeof(*item);
798
799 if (size > QLA_DEFAULT_PAYLOAD_SIZE) {
800 item = kzalloc(item_hdr_size +
801 (size - QLA_DEFAULT_PAYLOAD_SIZE), GFP_ATOMIC);
802 } else {
803 if (atomic_inc_return(&vha->default_item.in_use) == 1) {
804 item = &vha->default_item;
805 goto initialize_purex_header;
806 } else {
807 item = kzalloc(item_hdr_size, GFP_ATOMIC);
808 }
809 }
810 if (!item) {
811 ql_log(ql_log_warn, vha, 0x5092,
812 ">> Failed allocate purex list item.\n");
813
814 return NULL;
815 }
816
817initialize_purex_header:
818 item->vha = vha;
819 item->size = size;
820 return item;
821}
822
823static void
824qla24xx_queue_purex_item(scsi_qla_host_t *vha, struct purex_item *pkt,
825 void (*process_item)(struct scsi_qla_host *vha,
826 struct purex_item *pkt))
827{
828 struct purex_list *list = &vha->purex_list;
829 ulong flags;
830
831 pkt->process_item = process_item;
832
833 spin_lock_irqsave(&list->lock, flags);
834 list_add_tail(&pkt->list, &list->head);
835 spin_unlock_irqrestore(&list->lock, flags);
836
837 set_bit(PROCESS_PUREX_IOCB, &vha->dpc_flags);
838}
839
840/**
841 * qla24xx_copy_std_pkt() - Copy over purex ELS which is
842 * contained in a single IOCB.
843 * purex packet.
844 * @vha: SCSI driver HA context
845 * @pkt: ELS packet
846 */
9f2475fe 847static struct purex_item
62e9dd17
SS		 848*qla24xx_copy_std_pkt(struct scsi_qla_host *vha, void *pkt)
849{
850 struct purex_item *item;
851
852 item = qla24xx_alloc_purex_item(vha,
853 QLA_DEFAULT_PAYLOAD_SIZE);
854 if (!item)
855 return item;
856
857 memcpy(&item->iocb, pkt, sizeof(item->iocb));
858 return item;
859}
860
9f2475fe
SS		 861/**
862 * qla27xx_copy_fpin_pkt() - Copy over fpin packets that can
863 * span over multiple IOCBs.
864 * @vha: SCSI driver HA context
865 * @pkt: ELS packet
866 * @rsp: Response queue
867 */
868static struct purex_item *
869qla27xx_copy_fpin_pkt(struct scsi_qla_host *vha, void **pkt,
870 struct rsp_que **rsp)
871{
872 struct purex_entry_24xx *purex = *pkt;
873 struct rsp_que *rsp_q = *rsp;
874 sts_cont_entry_t *new_pkt;
875 uint16_t no_bytes = 0, total_bytes = 0, pending_bytes = 0;
876 uint16_t buffer_copy_offset = 0;
877 uint16_t entry_count, entry_count_remaining;
878 struct purex_item *item;
879 void *fpin_pkt = NULL;
880
58101f15 881 total_bytes = (le16_to_cpu(purex->frame_size) & 0x0FFF)
9f2475fe
SS		 882 - PURX_ELS_HEADER_SIZE;
883 pending_bytes = total_bytes;
884 entry_count = entry_count_remaining = purex->entry_count;
885 no_bytes = (pending_bytes > sizeof(purex->els_frame_payload)) ?
886 sizeof(purex->els_frame_payload) : pending_bytes;
887 ql_log(ql_log_info, vha, 0x509a,
888 "FPIN ELS, frame_size 0x%x, entry count %d\n",
889 total_bytes, entry_count);
890
891 item = qla24xx_alloc_purex_item(vha, total_bytes);
892 if (!item)
893 return item;
894
895 fpin_pkt = &item->iocb;
896
897 memcpy(fpin_pkt, &purex->els_frame_payload[0], no_bytes);
898 buffer_copy_offset += no_bytes;
899 pending_bytes -= no_bytes;
900 --entry_count_remaining;
901
902 ((response_t *)purex)->signature = RESPONSE_PROCESSED;
903 wmb();
904
905 do {
906 while ((total_bytes > 0) && (entry_count_remaining > 0)) {
907 if (rsp_q->ring_ptr->signature == RESPONSE_PROCESSED) {
908 ql_dbg(ql_dbg_async, vha, 0x5084,
909 "Ran out of IOCBs, partial data 0x%x\n",
910 buffer_copy_offset);
911 cpu_relax();
912 continue;
913 }
914
915 new_pkt = (sts_cont_entry_t *)rsp_q->ring_ptr;
916 *pkt = new_pkt;
917
918 if (new_pkt->entry_type != STATUS_CONT_TYPE) {
919 ql_log(ql_log_warn, vha, 0x507a,
920 "Unexpected IOCB type, partial data 0x%x\n",
921 buffer_copy_offset);
922 break;
923 }
924
925 rsp_q->ring_index++;
926 if (rsp_q->ring_index == rsp_q->length) {
927 rsp_q->ring_index = 0;
928 rsp_q->ring_ptr = rsp_q->ring;
929 } else {
930 rsp_q->ring_ptr++;
931 }
932 no_bytes = (pending_bytes > sizeof(new_pkt->data)) ?
933 sizeof(new_pkt->data) : pending_bytes;
934 if ((buffer_copy_offset + no_bytes) <= total_bytes) {
935 memcpy(((uint8_t *)fpin_pkt +
936 buffer_copy_offset), new_pkt->data,
937 no_bytes);
938 buffer_copy_offset += no_bytes;
939 pending_bytes -= no_bytes;
940 --entry_count_remaining;
941 } else {
942 ql_log(ql_log_warn, vha, 0x5044,
943 "Attempt to copy more that we got, optimizing..%x\n",
944 buffer_copy_offset);
945 memcpy(((uint8_t *)fpin_pkt +
946 buffer_copy_offset), new_pkt->data,
947 total_bytes - buffer_copy_offset);
948 }
949
950 ((response_t *)new_pkt)->signature = RESPONSE_PROCESSED;
951 wmb();
952 }
953
954 if (pending_bytes != 0 || entry_count_remaining != 0) {
955 ql_log(ql_log_fatal, vha, 0x508b,
956 "Dropping partial FPIN, underrun bytes = 0x%x, entry cnts 0x%x\n",
957 total_bytes, entry_count_remaining);
958 qla24xx_free_purex_item(item);
959 return NULL;
960 }
961 } while (entry_count_remaining > 0);
962 host_to_fcp_swap((uint8_t *)&item->iocb, total_bytes);
963 return item;
964}
965
1da177e4
LT		 966/**
967 * qla2x00_async_event() - Process aynchronous events.
2db6228d
BVA		 968 * @vha: SCSI driver HA context
969 * @rsp: response queue
9a853f71 970 * @mb: Mailbox registers (0 - 3)
1da177e4 971 */
2c3dfe3f 972void
73208dfd 973qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb)
1da177e4 974{
1da177e4 975 uint16_t handle_cnt;
bdab23da 976 uint16_t cnt, mbx;
1da177e4 977 uint32_t handles[5];
e315cd28 978 struct qla_hw_data *ha = vha->hw;
3d71644c 979 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
bdab23da 980 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
bc5c2aad 981 struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
52c82823 982 uint32_t rscn_entry, host_pid;
4d4df193 983 unsigned long flags;
ef86cb20 984 fc_port_t *fcport = NULL;
1da177e4 985
45235022
QT		 986 if (!vha->hw->flags.fw_started)
987 return;
988
1da177e4
LT		 989 /* Setup to process RIO completion. */
990 handle_cnt = 0;
6246b8a1 991 if (IS_CNA_CAPABLE(ha))
3a03eb79 992 goto skip_rio;
1da177e4
LT		 993 switch (mb[0]) {
994 case MBA_SCSI_COMPLETION:
7ffa5b93 995 handles[0] = make_handle(mb[2], mb[1]);
1da177e4
LT		 996 handle_cnt = 1;
997 break;
998 case MBA_CMPLT_1_16BIT:
9a853f71 999 handles[0] = mb[1];
1da177e4
LT		 1000 handle_cnt = 1;
1001 mb[0] = MBA_SCSI_COMPLETION;
1002 break;
1003 case MBA_CMPLT_2_16BIT:
9a853f71
AV		 1004 handles[0] = mb[1];
1005 handles[1] = mb[2];
1da177e4
LT		 1006 handle_cnt = 2;
1007 mb[0] = MBA_SCSI_COMPLETION;
1008 break;
1009 case MBA_CMPLT_3_16BIT:
9a853f71
AV		 1010 handles[0] = mb[1];
1011 handles[1] = mb[2];
1012 handles[2] = mb[3];
1da177e4
LT		 1013 handle_cnt = 3;
1014 mb[0] = MBA_SCSI_COMPLETION;
1015 break;
1016 case MBA_CMPLT_4_16BIT:
9a853f71
AV		 1017 handles[0] = mb[1];
1018 handles[1] = mb[2];
1019 handles[2] = mb[3];
1da177e4
LT		 1020 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
1021 handle_cnt = 4;
1022 mb[0] = MBA_SCSI_COMPLETION;
1023 break;
1024 case MBA_CMPLT_5_16BIT:
9a853f71
AV		 1025 handles[0] = mb[1];
1026 handles[1] = mb[2];
1027 handles[2] = mb[3];
1da177e4
LT		 1028 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
1029 handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7);
1030 handle_cnt = 5;
1031 mb[0] = MBA_SCSI_COMPLETION;
1032 break;
1033 case MBA_CMPLT_2_32BIT:
7ffa5b93
BVA		 1034 handles[0] = make_handle(mb[2], mb[1]);
1035 handles[1] = make_handle(RD_MAILBOX_REG(ha, reg, 7),
1036 RD_MAILBOX_REG(ha, reg, 6));
1da177e4
LT		 1037 handle_cnt = 2;
1038 mb[0] = MBA_SCSI_COMPLETION;
1039 break;
1040 default:
1041 break;
1042 }
3a03eb79 1043skip_rio:
1da177e4
LT		 1044 switch (mb[0]) {
1045 case MBA_SCSI_COMPLETION: /* Fast Post */
e315cd28 1046 if (!vha->flags.online)
1da177e4
LT		 1047 break;
1048
1049 for (cnt = 0; cnt < handle_cnt; cnt++)
73208dfd
AC		 1050 qla2x00_process_completed_request(vha, rsp->req,
1051 handles[cnt]);
1da177e4
LT		 1052 break;
1053
1054 case MBA_RESET: /* Reset */
7c3df132
SK		 1055 ql_dbg(ql_dbg_async, vha, 0x5002,
1056 "Asynchronous RESET.\n");
1da177e4 1057
e315cd28 1058 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4
LT		 1059 break;
1060
1061 case MBA_SYSTEM_ERR: /* System Error */
a82c307e
QT		 1062 mbx = 0;
1063 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) ||
1064 IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1065 u16 m[4];
1066
04474d3a
BVA		 1067 m[0] = rd_reg_word(&reg24->mailbox4);
1068 m[1] = rd_reg_word(&reg24->mailbox5);
1069 m[2] = rd_reg_word(&reg24->mailbox6);
1070 mbx = m[3] = rd_reg_word(&reg24->mailbox7);
a82c307e
QT		 1071
1072 ql_log(ql_log_warn, vha, 0x5003,
1073 "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh mbx4=%xh mbx5=%xh mbx6=%xh mbx7=%xh.\n",
1074 mb[1], mb[2], mb[3], m[0], m[1], m[2], m[3]);
1075 } else
1076 ql_log(ql_log_warn, vha, 0x5003,
1077 "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh.\n ",
1078 mb[1], mb[2], mb[3]);
1079
cbb01c2f 1080 if ((IS_QLA27XX(ha) || IS_QLA28XX(ha)) &&
04474d3a 1081 rd_reg_word(&reg24->mailbox7) & BIT_8)
cbb01c2f 1082 ha->isp_ops->mpi_fw_dump(vha, 1);
8ae17876 1083 ha->isp_ops->fw_dump(vha);
ec7193e2 1084 ha->flags.fw_init_done = 0;
4b60c827 1085 QLA_FW_STOPPED(ha);
1da177e4 1086
e428924c 1087 if (IS_FWI2_CAPABLE(ha)) {
9a853f71 1088 if (mb[1] == 0 && mb[2] == 0) {
7c3df132 1089 ql_log(ql_log_fatal, vha, 0x5004,
9a853f71
AV		 1090 "Unrecoverable Hardware Error: adapter "
1091 "marked OFFLINE!\n");
e315cd28 1092 vha->flags.online = 0;
6246b8a1 1093 vha->device_flags |= DFLG_DEV_FAILED;
b1d46989 1094 } else {
25985edc 1095 /* Check to see if MPI timeout occurred */
f73cb695 1096 if ((mbx & MBX_3) && (ha->port_no == 0))
b1d46989
MI		 1097 set_bit(MPI_RESET_NEEDED,
1098 &vha->dpc_flags);
1099
e315cd28 1100 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
b1d46989 1101 }
9a853f71 1102 } else if (mb[1] == 0) {
7c3df132 1103 ql_log(ql_log_fatal, vha, 0x5005,
1da177e4
LT		 1104 "Unrecoverable Hardware Error: adapter marked "
1105 "OFFLINE!\n");
e315cd28 1106 vha->flags.online = 0;
6246b8a1 1107 vha->device_flags |= DFLG_DEV_FAILED;
1da177e4 1108 } else
e315cd28 1109 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 1110 break;
1111
1112 case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */
7c3df132
SK		 1113 ql_log(ql_log_warn, vha, 0x5006,
1114 "ISP Request Transfer Error (%x).\n", mb[1]);
1da177e4 1115
e315cd28 1116 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 1117 break;
1118
1119 case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */
7c3df132 1120 ql_log(ql_log_warn, vha, 0x5007,
41233cd3 1121 "ISP Response Transfer Error (%x).\n", mb[1]);
1da177e4 1122
e315cd28 1123 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 1124 break;
1125
1126 case MBA_WAKEUP_THRES: /* Request Queue Wake-up */
7c3df132 1127 ql_dbg(ql_dbg_async, vha, 0x5008,
41233cd3
JC		 1128 "Asynchronous WAKEUP_THRES (%x).\n", mb[1]);
1129 break;
1da177e4 1130
41233cd3 1131 case MBA_LOOP_INIT_ERR:
75d560e0 1132 ql_log(ql_log_warn, vha, 0x5090,
41233cd3 1133 "LOOP INIT ERROR (%x).\n", mb[1]);
41233cd3 1134 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2d70c103 1135 break;
41233cd3 1136
1da177e4 1137 case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */
ec7193e2 1138 ha->flags.lip_ae = 1;
ec7193e2 1139
cfb0919c 1140 ql_dbg(ql_dbg_async, vha, 0x5009,
7c3df132 1141 "LIP occurred (%x).\n", mb[1]);
1da177e4 1142
e315cd28
AC		 1143 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1144 atomic_set(&vha->loop_state, LOOP_DOWN);
1145 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
3c75ad1d 1146 qla2x00_mark_all_devices_lost(vha);
1da177e4
LT		 1147 }
1148
e315cd28
AC		 1149 if (vha->vp_idx) {
1150 atomic_set(&vha->vp_state, VP_FAILED);
1151 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ		 1152 }
1153
e315cd28
AC		 1154 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
1155 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
1da177e4 1156
e315cd28
AC		 1157 vha->flags.management_server_logged_in = 0;
1158 qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]);
1da177e4
LT		 1159 break;
1160
1161 case MBA_LOOP_UP: /* Loop Up Event */
daae62a3 1162 if (IS_QLA2100(ha) || IS_QLA2200(ha))
d8b45213 1163 ha->link_data_rate = PORT_SPEED_1GB;
daae62a3 1164 else
1da177e4 1165 ha->link_data_rate = mb[1];
1da177e4 1166
8e5a9484 1167 ql_log(ql_log_info, vha, 0x500a,
daae62a3 1168 "LOOP UP detected (%s Gbps).\n",
d0297c9a 1169 qla2x00_get_link_speed_str(ha, ha->link_data_rate));
1da177e4 1170
75666f4a
HM		 1171 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1172 if (mb[2] & BIT_0)
1173 ql_log(ql_log_info, vha, 0x11a0,
1174 "FEC=enabled (link up).\n");
1175 }
1176
e315cd28
AC		 1177 vha->flags.management_server_logged_in = 0;
1178 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate);
e4e3a2ce 1179
1da177e4
LT		 1180 break;
1181
1182 case MBA_LOOP_DOWN: /* Loop Down Event */
9cd883f0 1183 SAVE_TOPO(ha);
ec7193e2
QT		 1184 ha->flags.lip_ae = 0;
1185 ha->current_topology = 0;
1186
6246b8a1 1187 mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha))
04474d3a
BVA		 1188 ? rd_reg_word(&reg24->mailbox4) : 0;
1189 mbx = (IS_P3P_TYPE(ha)) ? rd_reg_word(&reg82->mailbox_out[4])
7ec0effd 1190 : mbx;
8e5a9484 1191 ql_log(ql_log_info, vha, 0x500b,
7c3df132
SK		 1192 "LOOP DOWN detected (%x %x %x %x).\n",
1193 mb[1], mb[2], mb[3], mbx);
1da177e4 1194
e315cd28
AC		 1195 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1196 atomic_set(&vha->loop_state, LOOP_DOWN);
1197 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2486c627
HM		 1198 /*
1199 * In case of loop down, restore WWPN from
1200 * NVRAM in case of FA-WWPN capable ISP
718abbdc 1201 * Restore for Physical Port only
2486c627 1202 */
718abbdc 1203 if (!vha->vp_idx) {
dcbf8f80
SC		 1204 if (ha->flags.fawwpn_enabled &&
1205 (ha->current_topology == ISP_CFG_F)) {
718abbdc 1206 void *wwpn = ha->init_cb->port_name;
bd432bb5 1207
718abbdc
SC		 1208 memcpy(vha->port_name, wwpn, WWN_SIZE);
1209 fc_host_port_name(vha->host) =
1210 wwn_to_u64(vha->port_name);
1211 ql_dbg(ql_dbg_init + ql_dbg_verbose,
83548fe2 1212 vha, 0x00d8, "LOOP DOWN detected,"
718abbdc
SC		 1213 "restore WWPN %016llx\n",
1214 wwn_to_u64(vha->port_name));
1215 }
1216
1217 clear_bit(VP_CONFIG_OK, &vha->vp_flags);
2486c627
HM		 1218 }
1219
e315cd28 1220 vha->device_flags |= DFLG_NO_CABLE;
3c75ad1d 1221 qla2x00_mark_all_devices_lost(vha);
1da177e4
LT		 1222 }
1223
e315cd28
AC		 1224 if (vha->vp_idx) {
1225 atomic_set(&vha->vp_state, VP_FAILED);
1226 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ		 1227 }
1228
e315cd28 1229 vha->flags.management_server_logged_in = 0;
d8b45213 1230 ha->link_data_rate = PORT_SPEED_UNKNOWN;
e315cd28 1231 qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0);
1da177e4
LT		 1232 break;
1233
1234 case MBA_LIP_RESET: /* LIP reset occurred */
cfb0919c 1235 ql_dbg(ql_dbg_async, vha, 0x500c,
cc3ef7bc 1236 "LIP reset occurred (%x).\n", mb[1]);
1da177e4 1237
e315cd28
AC		 1238 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1239 atomic_set(&vha->loop_state, LOOP_DOWN);
1240 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
3c75ad1d 1241 qla2x00_mark_all_devices_lost(vha);
1da177e4
LT		 1242 }
1243
e315cd28
AC		 1244 if (vha->vp_idx) {
1245 atomic_set(&vha->vp_state, VP_FAILED);
1246 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ		 1247 }
1248
e315cd28 1249 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4
LT		 1250
1251 ha->operating_mode = LOOP;
e315cd28
AC		 1252 vha->flags.management_server_logged_in = 0;
1253 qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]);
1da177e4
LT		 1254 break;
1255
3a03eb79 1256 /* case MBA_DCBX_COMPLETE: */
1da177e4 1257 case MBA_POINT_TO_POINT: /* Point-to-Point */
ec7193e2 1258 ha->flags.lip_ae = 0;
ec7193e2 1259
1da177e4
LT		 1260 if (IS_QLA2100(ha))
1261 break;
1262
7ec0effd 1263 if (IS_CNA_CAPABLE(ha)) {
7c3df132
SK		 1264 ql_dbg(ql_dbg_async, vha, 0x500d,
1265 "DCBX Completed -- %04x %04x %04x.\n",
1266 mb[1], mb[2], mb[3]);
9aaf2cea 1267 if (ha->notify_dcbx_comp && !vha->vp_idx)
23f2ebd1
SR		 1268 complete(&ha->dcbx_comp);
1269
1270 } else
7c3df132
SK		 1271 ql_dbg(ql_dbg_async, vha, 0x500e,
1272 "Asynchronous P2P MODE received.\n");
1da177e4
LT		 1273
1274 /*
1275 * Until there's a transition from loop down to loop up, treat
1276 * this as loop down only.
1277 */
e315cd28
AC		 1278 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1279 atomic_set(&vha->loop_state, LOOP_DOWN);
1280 if (!atomic_read(&vha->loop_down_timer))
1281 atomic_set(&vha->loop_down_timer,
1da177e4 1282 LOOP_DOWN_TIME);
48acad09 1283 if (!N2N_TOPO(ha))
3c75ad1d 1284 qla2x00_mark_all_devices_lost(vha);
1da177e4
LT		 1285 }
1286
e315cd28
AC		 1287 if (vha->vp_idx) {
1288 atomic_set(&vha->vp_state, VP_FAILED);
1289 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ		 1290 }
1291
e315cd28
AC		 1292 if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)))
1293 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1294
1295 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
1296 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
4346b149 1297
e315cd28 1298 vha->flags.management_server_logged_in = 0;
1da177e4
LT		 1299 break;
1300
1301 case MBA_CHG_IN_CONNECTION: /* Change in connection mode */
1302 if (IS_QLA2100(ha))
1303 break;
1304
cfb0919c 1305 ql_dbg(ql_dbg_async, vha, 0x500f,
1da177e4
LT		 1306 "Configuration change detected: value=%x.\n", mb[1]);
1307
e315cd28
AC		 1308 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1309 atomic_set(&vha->loop_state, LOOP_DOWN);
1310 if (!atomic_read(&vha->loop_down_timer))
1311 atomic_set(&vha->loop_down_timer,
1da177e4 1312 LOOP_DOWN_TIME);
3c75ad1d 1313 qla2x00_mark_all_devices_lost(vha);
1da177e4
LT		 1314 }
1315
e315cd28
AC		 1316 if (vha->vp_idx) {
1317 atomic_set(&vha->vp_state, VP_FAILED);
1318 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ		 1319 }
1320
e315cd28
AC		 1321 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1322 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1da177e4
LT		 1323 break;
1324
1325 case MBA_PORT_UPDATE: /* Port database update */
55903b9d
SV		 1326 /*
1327 * Handle only global and vn-port update events
1328 *
1329 * Relevant inputs:
1330 * mb[1] = N_Port handle of changed port
1331 * OR 0xffff for global event
1332 * mb[2] = New login state
1333 * 7 = Port logged out
1334 * mb[3] = LSB is vp_idx, 0xff = all vps
1335 *
1336 * Skip processing if:
1337 * Event is global, vp_idx is NOT all vps,
1338 * vp_idx does not match
1339 * Event is not global, vp_idx does not match
1340 */
12cec63e
AV		 1341 if (IS_QLA2XXX_MIDTYPE(ha) &&
1342 ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) ||
1343 (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff))
1344 break;
73208dfd 1345
17cac3a1 1346 if (mb[2] == 0x7) {
7c3df132 1347 ql_dbg(ql_dbg_async, vha, 0x5010,
17cac3a1
JC		 1348 "Port %s %04x %04x %04x.\n",
1349 mb[1] == 0xffff ? "unavailable" : "logout",
7c3df132 1350 mb[1], mb[2], mb[3]);
17cac3a1
JC		 1351
1352 if (mb[1] == 0xffff)
1353 goto global_port_update;
1354
b98ae0d7
QT		 1355 if (mb[1] == NPH_SNS_LID(ha)) {
1356 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1357 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1358 break;
1359 }
1360
1361 /* use handle_cnt for loop id/nport handle */
1362 if (IS_FWI2_CAPABLE(ha))
1363 handle_cnt = NPH_SNS;
1364 else
1365 handle_cnt = SIMPLE_NAME_SERVER;
1366 if (mb[1] == handle_cnt) {
1367 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1368 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1369 break;
1370 }
1371
17cac3a1
JC		 1372 /* Port logout */
1373 fcport = qla2x00_find_fcport_by_loopid(vha, mb[1]);
1374 if (!fcport)
1375 break;
1376 if (atomic_read(&fcport->state) != FCS_ONLINE)
1377 break;
1378 ql_dbg(ql_dbg_async, vha, 0x508a,
1379 "Marking port lost loopid=%04x portid=%06x.\n",
1380 fcport->loop_id, fcport->d_id.b24);
726b8548 1381 if (qla_ini_mode_enabled(vha)) {
726b8548 1382 fcport->logout_on_delete = 0;
d8630bb9 1383 qlt_schedule_sess_for_deletion(fcport);
726b8548 1384 }
17cac3a1
JC		 1385 break;
1386
1387global_port_update:
9764ff88
AV		 1388 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1389 atomic_set(&vha->loop_state, LOOP_DOWN);
1390 atomic_set(&vha->loop_down_timer,
1391 LOOP_DOWN_TIME);
1392 vha->device_flags |= DFLG_NO_CABLE;
3c75ad1d 1393 qla2x00_mark_all_devices_lost(vha);
9764ff88
AV		 1394 }
1395
1396 if (vha->vp_idx) {
1397 atomic_set(&vha->vp_state, VP_FAILED);
1398 fc_vport_set_state(vha->fc_vport,
1399 FC_VPORT_FAILED);
3c75ad1d 1400 qla2x00_mark_all_devices_lost(vha);
9764ff88
AV		 1401 }
1402
1403 vha->flags.management_server_logged_in = 0;
1404 ha->link_data_rate = PORT_SPEED_UNKNOWN;
1405 break;
1406 }
1407
1da177e4 1408 /*
cc3ef7bc 1409 * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET
1da177e4
LT		 1410 * event etc. earlier indicating loop is down) then process
1411 * it. Otherwise ignore it and Wait for RSCN to come in.
1412 */
e315cd28 1413 atomic_set(&vha->loop_down_timer, 0);
8e5a9484 1414 if (atomic_read(&vha->loop_state) != LOOP_DOWN &&
edd05de1 1415 !ha->flags.n2n_ae &&
8e5a9484 1416 atomic_read(&vha->loop_state) != LOOP_DEAD) {
7c3df132
SK		 1417 ql_dbg(ql_dbg_async, vha, 0x5011,
1418 "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n",
1419 mb[1], mb[2], mb[3]);
1da177e4
LT		 1420 break;
1421 }
1422
7c3df132
SK		 1423 ql_dbg(ql_dbg_async, vha, 0x5012,
1424 "Port database changed %04x %04x %04x.\n",
1425 mb[1], mb[2], mb[3]);
1da177e4
LT		 1426
1427 /*
1428 * Mark all devices as missing so we will login again.
1429 */
e315cd28 1430 atomic_set(&vha->loop_state, LOOP_UP);
6944dccb 1431 vha->scan.scan_retry = 0;
1da177e4 1432
e315cd28
AC		 1433 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1434 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
ded6411f 1435 set_bit(VP_CONFIG_OK, &vha->vp_flags);
1da177e4
LT		 1436 break;
1437
1438 case MBA_RSCN_UPDATE: /* State Change Registration */
3c397400 1439 /* Check if the Vport has issued a SCR */
e315cd28 1440 if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags))
3c397400
SJ		 1441 break;
1442 /* Only handle SCNs for our Vport index. */
0d6e61bc 1443 if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff))
3c397400 1444 break;
0d6e61bc 1445
7c3df132
SK		 1446 ql_dbg(ql_dbg_async, vha, 0x5013,
1447 "RSCN database changed -- %04x %04x %04x.\n",
1448 mb[1], mb[2], mb[3]);
1da177e4 1449
59d72d87 1450 rscn_entry = ((mb[1] & 0xff) << 16) | mb[2];
e315cd28
AC		 1451 host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8)
1452 | vha->d_id.b.al_pa;
1da177e4 1453 if (rscn_entry == host_pid) {
7c3df132
SK		 1454 ql_dbg(ql_dbg_async, vha, 0x5014,
1455 "Ignoring RSCN update to local host "
1456 "port ID (%06x).\n", host_pid);
1da177e4
LT		 1457 break;
1458 }
1459
59d72d87
RA		 1460 /* Ignore reserved bits from RSCN-payload. */
1461 rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2];
1da177e4 1462
bb4cf5b7
CD		 1463 /* Skip RSCNs for virtual ports on the same physical port */
1464 if (qla2x00_is_a_vp_did(vha, rscn_entry))
1465 break;
1466
e315cd28
AC		 1467 atomic_set(&vha->loop_down_timer, 0);
1468 vha->flags.management_server_logged_in = 0;
726b8548
QT		 1469 {
1470 struct event_arg ea;
1da177e4 1471
726b8548 1472 memset(&ea, 0, sizeof(ea));
726b8548 1473 ea.id.b24 = rscn_entry;
41dc529a 1474 ea.id.b.rsvd_1 = rscn_entry >> 24;
897def20 1475 qla2x00_handle_rscn(vha, &ea);
41dc529a 1476 qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry);
726b8548 1477 }
1da177e4 1478 break;
9f2475fe
SS		 1479 case MBA_CONGN_NOTI_RECV:
1480 if (!ha->flags.scm_enabled ||
1481 mb[1] != QLA_CON_PRIMITIVE_RECEIVED)
1482 break;
1483
1484 if (mb[2] == QLA_CONGESTION_ARB_WARNING) {
1485 ql_dbg(ql_dbg_async, vha, 0x509b,
1486 "Congestion Warning %04x %04x.\n", mb[1], mb[2]);
1487 } else if (mb[2] == QLA_CONGESTION_ARB_ALARM) {
1488 ql_log(ql_log_warn, vha, 0x509b,
1489 "Congestion Alarm %04x %04x.\n", mb[1], mb[2]);
1490 }
1491 break;
1da177e4
LT		 1492 /* case MBA_RIO_RESPONSE: */
1493 case MBA_ZIO_RESPONSE:
7c3df132
SK		 1494 ql_dbg(ql_dbg_async, vha, 0x5015,
1495 "[R|Z]IO update completion.\n");
1da177e4 1496
e428924c 1497 if (IS_FWI2_CAPABLE(ha))
2afa19a9 1498 qla24xx_process_response_queue(vha, rsp);
4fdfefe5 1499 else
73208dfd 1500 qla2x00_process_response_queue(rsp);
1da177e4 1501 break;
9a853f71
AV		 1502
1503 case MBA_DISCARD_RND_FRAME:
7c3df132
SK		 1504 ql_dbg(ql_dbg_async, vha, 0x5016,
1505 "Discard RND Frame -- %04x %04x %04x.\n",
1506 mb[1], mb[2], mb[3]);
9a853f71 1507 break;
45ebeb56
AV		 1508
1509 case MBA_TRACE_NOTIFICATION:
7c3df132
SK		 1510 ql_dbg(ql_dbg_async, vha, 0x5017,
1511 "Trace Notification -- %04x %04x.\n", mb[1], mb[2]);
45ebeb56 1512 break;
4d4df193
HK		 1513
1514 case MBA_ISP84XX_ALERT:
7c3df132
SK		 1515 ql_dbg(ql_dbg_async, vha, 0x5018,
1516 "ISP84XX Alert Notification -- %04x %04x %04x.\n",
1517 mb[1], mb[2], mb[3]);
4d4df193
HK		 1518
1519 spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
1520 switch (mb[1]) {
1521 case A84_PANIC_RECOVERY:
7c3df132
SK		 1522 ql_log(ql_log_info, vha, 0x5019,
1523 "Alert 84XX: panic recovery %04x %04x.\n",
1524 mb[2], mb[3]);
4d4df193
HK		 1525 break;
1526 case A84_OP_LOGIN_COMPLETE:
1527 ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2];
7c3df132
SK		 1528 ql_log(ql_log_info, vha, 0x501a,
1529 "Alert 84XX: firmware version %x.\n",
1530 ha->cs84xx->op_fw_version);
4d4df193
HK		 1531 break;
1532 case A84_DIAG_LOGIN_COMPLETE:
1533 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
7c3df132
SK		 1534 ql_log(ql_log_info, vha, 0x501b,
1535 "Alert 84XX: diagnostic firmware version %x.\n",
1536 ha->cs84xx->diag_fw_version);
4d4df193
HK		 1537 break;
1538 case A84_GOLD_LOGIN_COMPLETE:
1539 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
1540 ha->cs84xx->fw_update = 1;
7c3df132
SK		 1541 ql_log(ql_log_info, vha, 0x501c,
1542 "Alert 84XX: gold firmware version %x.\n",
1543 ha->cs84xx->gold_fw_version);
4d4df193
HK		 1544 break;
1545 default:
7c3df132
SK		 1546 ql_log(ql_log_warn, vha, 0x501d,
1547 "Alert 84xx: Invalid Alert %04x %04x %04x.\n",
4d4df193
HK		 1548 mb[1], mb[2], mb[3]);
1549 }
1550 spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags);
1551 break;
3a03eb79 1552 case MBA_DCBX_START:
7c3df132
SK		 1553 ql_dbg(ql_dbg_async, vha, 0x501e,
1554 "DCBX Started -- %04x %04x %04x.\n",
1555 mb[1], mb[2], mb[3]);
3a03eb79
AV		 1556 break;
1557 case MBA_DCBX_PARAM_UPDATE:
7c3df132
SK		 1558 ql_dbg(ql_dbg_async, vha, 0x501f,
1559 "DCBX Parameters Updated -- %04x %04x %04x.\n",
1560 mb[1], mb[2], mb[3]);
3a03eb79
AV		 1561 break;
1562 case MBA_FCF_CONF_ERR:
7c3df132
SK		 1563 ql_dbg(ql_dbg_async, vha, 0x5020,
1564 "FCF Configuration Error -- %04x %04x %04x.\n",
1565 mb[1], mb[2], mb[3]);
3a03eb79 1566 break;
3a03eb79 1567 case MBA_IDC_NOTIFY:
7ec0effd 1568 if (IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
04474d3a 1569 mb[4] = rd_reg_word(&reg24->mailbox4);
67b2a31f
CD		 1570 if (((mb[2] & 0x7fff) == MBC_PORT_RESET ||
1571 (mb[2] & 0x7fff) == MBC_SET_PORT_CONFIG) &&
1572 (mb[4] & INTERNAL_LOOPBACK_MASK) != 0) {
8fcd6b8b 1573 set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags);
67b2a31f
CD		 1574 /*
1575 * Extend loop down timer since port is active.
1576 */
1577 if (atomic_read(&vha->loop_state) == LOOP_DOWN)
1578 atomic_set(&vha->loop_down_timer,
1579 LOOP_DOWN_TIME);
8fcd6b8b
CD		 1580 qla2xxx_wake_dpc(vha);
1581 }
67b2a31f 1582 }
df561f66 1583 fallthrough;
8fcd6b8b 1584 case MBA_IDC_COMPLETE:
9aaf2cea 1585 if (ha->notify_lb_portup_comp && !vha->vp_idx)
f356bef1 1586 complete(&ha->lb_portup_comp);
df561f66 1587 fallthrough;
3a03eb79 1588 case MBA_IDC_TIME_EXT:
7ec0effd
AD		 1589 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) ||
1590 IS_QLA8044(ha))
7d613ac6
SV		 1591 qla81xx_idc_event(vha, mb[0], mb[1]);
1592 break;
1593
1594 case MBA_IDC_AEN:
d52cd774 1595 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
cbb01c2f 1596 qla27xx_handle_8200_aen(vha, mb);
d52cd774 1597 } else if (IS_QLA83XX(ha)) {
04474d3a
BVA		 1598 mb[4] = rd_reg_word(&reg24->mailbox4);
1599 mb[5] = rd_reg_word(&reg24->mailbox5);
1600 mb[6] = rd_reg_word(&reg24->mailbox6);
1601 mb[7] = rd_reg_word(&reg24->mailbox7);
d52cd774
QT		 1602 qla83xx_handle_8200_aen(vha, mb);
1603 } else {
1604 ql_dbg(ql_dbg_async, vha, 0x5052,
1605 "skip Heartbeat processing mb0-3=[0x%04x] [0x%04x] [0x%04x] [0x%04x]\n",
1606 mb[0], mb[1], mb[2], mb[3]);
1607 }
3a03eb79 1608 break;
7d613ac6 1609
b5a340dd
JC		 1610 case MBA_DPORT_DIAGNOSTICS:
1611 ql_dbg(ql_dbg_async, vha, 0x5052,
42521564
JC		 1612 "D-Port Diagnostics: %04x %04x %04x %04x\n",
1613 mb[0], mb[1], mb[2], mb[3]);
e6ad2b79 1614 memcpy(vha->dport_data, mb, sizeof(vha->dport_data));
42521564
JC		 1615 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1616 static char *results[] = {
1617 "start", "done(pass)", "done(error)", "undefined" };
1618 static char *types[] = {
1619 "none", "dynamic", "static", "other" };
1620 uint result = mb[1] >> 0 & 0x3;
1621 uint type = mb[1] >> 6 & 0x3;
1622 uint sw = mb[1] >> 15 & 0x1;
1623 ql_dbg(ql_dbg_async, vha, 0x5052,
1624 "D-Port Diagnostics: result=%s type=%s [sw=%u]\n",
1625 results[result], types[type], sw);
1626 if (result == 2) {
1627 static char *reasons[] = {
1628 "reserved", "unexpected reject",
1629 "unexpected phase", "retry exceeded",
1630 "timed out", "not supported",
1631 "user stopped" };
1632 uint reason = mb[2] >> 0 & 0xf;
1633 uint phase = mb[2] >> 12 & 0xf;
1634 ql_dbg(ql_dbg_async, vha, 0x5052,
1635 "D-Port Diagnostics: reason=%s phase=%u \n",
1636 reason < 7 ? reasons[reason] : "other",
1637 phase >> 1);
1638 }
1639 }
b5a340dd
JC		 1640 break;
1641
a29b3dd7
JC		 1642 case MBA_TEMPERATURE_ALERT:
1643 ql_dbg(ql_dbg_async, vha, 0x505e,
1644 "TEMPERATURE ALERT: %04x %04x %04x\n", mb[1], mb[2], mb[3]);
1645 if (mb[1] == 0x12)
1646 schedule_work(&ha->board_disable);
1647 break;
1648
92d4408e
SC		 1649 case MBA_TRANS_INSERT:
1650 ql_dbg(ql_dbg_async, vha, 0x5091,
1651 "Transceiver Insertion: %04x\n", mb[1]);
b0f18eee
AV		 1652 set_bit(DETECT_SFP_CHANGE, &vha->dpc_flags);
1653 break;
1654
1655 case MBA_TRANS_REMOVE:
1656 ql_dbg(ql_dbg_async, vha, 0x5091, "Transceiver Removal\n");
92d4408e
SC		 1657 break;
1658
6246b8a1
GM		 1659 default:
1660 ql_dbg(ql_dbg_async, vha, 0x5057,
1661 "Unknown AEN:%04x %04x %04x %04x\n",
1662 mb[0], mb[1], mb[2], mb[3]);
1da177e4 1663 }
2c3dfe3f 1664
2d70c103
NB		 1665 qlt_async_event(mb[0], vha, mb);
1666
e315cd28 1667 if (!vha->vp_idx && ha->num_vhosts)
73208dfd 1668 qla2x00_alert_all_vps(rsp, mb);
1da177e4
LT		 1669}
1670
1671/**
1672 * qla2x00_process_completed_request() - Process a Fast Post response.
2db6228d
BVA		 1673 * @vha: SCSI driver HA context
1674 * @req: request queue
1da177e4
LT		 1675 * @index: SRB index
1676 */
8ae6d9c7 1677void
73208dfd 1678qla2x00_process_completed_request(struct scsi_qla_host *vha,
8ae6d9c7 1679 struct req_que *req, uint32_t index)
1da177e4
LT		 1680{
1681 srb_t *sp;
e315cd28 1682 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 1683
1684 /* Validate handle. */
8d93f550 1685 if (index >= req->num_outstanding_cmds) {
7c3df132
SK		 1686 ql_log(ql_log_warn, vha, 0x3014,
1687 "Invalid SCSI command index (%x).\n", index);
1da177e4 1688
7ec0effd 1689 if (IS_P3P_TYPE(ha))
8f7daead
GM		 1690 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1691 else
1692 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 1693 return;
1694 }
1695
e315cd28 1696 sp = req->outstanding_cmds[index];
1da177e4
LT		 1697 if (sp) {
1698 /* Free outstanding command slot. */
e315cd28 1699 req->outstanding_cmds[index] = NULL;
1da177e4 1700
1da177e4 1701 /* Save ISP completion status */
25ff6af1 1702 sp->done(sp, DID_OK << 16);
1da177e4 1703 } else {
7c3df132 1704 ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n");
1da177e4 1705
7ec0effd 1706 if (IS_P3P_TYPE(ha))
8f7daead
GM		 1707 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1708 else
1709 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 1710 }
1711}
1712
8ae6d9c7 1713srb_t *
ac280b67
AV		 1714qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func,
1715 struct req_que *req, void *iocb)
1716{
1717 struct qla_hw_data *ha = vha->hw;
1718 sts_entry_t *pkt = iocb;
1719 srb_t *sp = NULL;
1720 uint16_t index;
1721
1722 index = LSW(pkt->handle);
8d93f550 1723 if (index >= req->num_outstanding_cmds) {
7c3df132 1724 ql_log(ql_log_warn, vha, 0x5031,
726b8548
QT		 1725 "Invalid command index (%x) type %8ph.\n",
1726 index, iocb);
7ec0effd 1727 if (IS_P3P_TYPE(ha))
8f7daead
GM		 1728 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1729 else
1730 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
ac280b67
AV		 1731 goto done;
1732 }
1733 sp = req->outstanding_cmds[index];
1734 if (!sp) {
7c3df132
SK		 1735 ql_log(ql_log_warn, vha, 0x5032,
1736 "Invalid completion handle (%x) -- timed-out.\n", index);
ac280b67
AV		 1737 return sp;
1738 }
1739 if (sp->handle != index) {
7c3df132
SK		 1740 ql_log(ql_log_warn, vha, 0x5033,
1741 "SRB handle (%x) mismatch %x.\n", sp->handle, index);
ac280b67
AV		 1742 return NULL;
1743 }
9a069e19 1744
ac280b67 1745 req->outstanding_cmds[index] = NULL;
9a069e19 1746
ac280b67
AV		 1747done:
1748 return sp;
1749}
1750
1751static void
1752qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1753 struct mbx_entry *mbx)
1754{
1755 const char func[] = "MBX-IOCB";
1756 const char *type;
ac280b67
AV		 1757 fc_port_t *fcport;
1758 srb_t *sp;
4916392b 1759 struct srb_iocb *lio;
99b0bec7 1760 uint16_t *data;
5ff1d584 1761 uint16_t status;
ac280b67
AV		 1762
1763 sp = qla2x00_get_sp_from_handle(vha, func, req, mbx);
1764 if (!sp)
1765 return;
1766
9ba56b95
GM		 1767 lio = &sp->u.iocb_cmd;
1768 type = sp->name;
ac280b67 1769 fcport = sp->fcport;
4916392b 1770 data = lio->u.logio.data;
ac280b67 1771
5ff1d584 1772 data[0] = MBS_COMMAND_ERROR;
4916392b 1773 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
5ff1d584 1774 QLA_LOGIO_LOGIN_RETRIED : 0;
ac280b67 1775 if (mbx->entry_status) {
7c3df132 1776 ql_dbg(ql_dbg_async, vha, 0x5043,
cfb0919c 1777 "Async-%s error entry - hdl=%x portid=%02x%02x%02x "
d3fa9e7d 1778 "entry-status=%x status=%x state-flag=%x "
cfb0919c
CD		 1779 "status-flags=%x.\n", type, sp->handle,
1780 fcport->d_id.b.domain, fcport->d_id.b.area,
d3fa9e7d
AV		 1781 fcport->d_id.b.al_pa, mbx->entry_status,
1782 le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags),
7c3df132 1783 le16_to_cpu(mbx->status_flags));
d3fa9e7d 1784
cfb0919c 1785 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5029,
f8f97b0c 1786 mbx, sizeof(*mbx));
ac280b67 1787
99b0bec7 1788 goto logio_done;
ac280b67
AV		 1789 }
1790
5ff1d584 1791 status = le16_to_cpu(mbx->status);
9ba56b95 1792 if (status == 0x30 && sp->type == SRB_LOGIN_CMD &&
5ff1d584
AV		 1793 le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE)
1794 status = 0;
1795 if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) {
7c3df132 1796 ql_dbg(ql_dbg_async, vha, 0x5045,
cfb0919c
CD		 1797 "Async-%s complete - hdl=%x portid=%02x%02x%02x mbx1=%x.\n",
1798 type, sp->handle, fcport->d_id.b.domain,
1799 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1800 le16_to_cpu(mbx->mb1));
ac280b67
AV		 1801
1802 data[0] = MBS_COMMAND_COMPLETE;
9ba56b95 1803 if (sp->type == SRB_LOGIN_CMD) {
99b0bec7
AV		 1804 fcport->port_type = FCT_TARGET;
1805 if (le16_to_cpu(mbx->mb1) & BIT_0)
1806 fcport->port_type = FCT_INITIATOR;
6ac52608 1807 else if (le16_to_cpu(mbx->mb1) & BIT_1)
99b0bec7 1808 fcport->flags |= FCF_FCP2_DEVICE;
5ff1d584 1809 }
99b0bec7 1810 goto logio_done;
ac280b67
AV		 1811 }
1812
1813 data[0] = le16_to_cpu(mbx->mb0);
1814 switch (data[0]) {
1815 case MBS_PORT_ID_USED:
1816 data[1] = le16_to_cpu(mbx->mb1);
1817 break;
1818 case MBS_LOOP_ID_USED:
1819 break;
1820 default:
1821 data[0] = MBS_COMMAND_ERROR;
ac280b67
AV		 1822 break;
1823 }
1824
7c3df132 1825 ql_log(ql_log_warn, vha, 0x5046,
cfb0919c
CD		 1826 "Async-%s failed - hdl=%x portid=%02x%02x%02x status=%x "
1827 "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n", type, sp->handle,
1828 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
1829 status, le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1),
ac280b67 1830 le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6),
7c3df132 1831 le16_to_cpu(mbx->mb7));
ac280b67 1832
99b0bec7 1833logio_done:
25ff6af1 1834 sp->done(sp, 0);
ac280b67
AV		 1835}
1836
726b8548
QT		 1837static void
1838qla24xx_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1839 struct mbx_24xx_entry *pkt)
1840{
1841 const char func[] = "MBX-IOCB2";
1842 srb_t *sp;
1843 struct srb_iocb *si;
1844 u16 sz, i;
1845 int res;
1846
1847 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1848 if (!sp)
1849 return;
1850
1851 si = &sp->u.iocb_cmd;
1852 sz = min(ARRAY_SIZE(pkt->mb), ARRAY_SIZE(sp->u.iocb_cmd.u.mbx.in_mb));
1853
1854 for (i = 0; i < sz; i++)
7ffa5b93 1855 si->u.mbx.in_mb[i] = pkt->mb[i];
726b8548
QT		 1856
1857 res = (si->u.mbx.in_mb[0] & MBS_MASK);
1858
25ff6af1 1859 sp->done(sp, res);
726b8548
QT		 1860}
1861
1862static void
1863qla24xxx_nack_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1864 struct nack_to_isp *pkt)
1865{
1866 const char func[] = "nack";
1867 srb_t *sp;
1868 int res = 0;
1869
1870 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1871 if (!sp)
1872 return;
1873
1874 if (pkt->u.isp2x.status != cpu_to_le16(NOTIFY_ACK_SUCCESS))
1875 res = QLA_FUNCTION_FAILED;
1876
25ff6af1 1877 sp->done(sp, res);
ac280b67
AV		 1878}
1879
9bc4f4fb
HZ		 1880static void
1881qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1882 sts_entry_t *pkt, int iocb_type)
1883{
1884 const char func[] = "CT_IOCB";
1885 const char *type;
9bc4f4fb 1886 srb_t *sp;
75cc8cfc 1887 struct bsg_job *bsg_job;
01e0e15c 1888 struct fc_bsg_reply *bsg_reply;
9bc4f4fb 1889 uint16_t comp_status;
726b8548 1890 int res = 0;
9bc4f4fb
HZ		 1891
1892 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1893 if (!sp)
1894 return;
1895
726b8548
QT		 1896 switch (sp->type) {
1897 case SRB_CT_CMD:
1898 bsg_job = sp->u.bsg_job;
1899 bsg_reply = bsg_job->reply;
1900
1901 type = "ct pass-through";
1902
1903 comp_status = le16_to_cpu(pkt->comp_status);
1904
1905 /*
1906 * return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
1907 * fc payload to the caller
1908 */
1909 bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
1910 bsg_job->reply_len = sizeof(struct fc_bsg_reply);
1911
1912 if (comp_status != CS_COMPLETE) {
1913 if (comp_status == CS_DATA_UNDERRUN) {
1914 res = DID_OK << 16;
1915 bsg_reply->reply_payload_rcv_len =
1a20719e 1916 le16_to_cpu(pkt->rsp_info_len);
726b8548
QT		 1917
1918 ql_log(ql_log_warn, vha, 0x5048,
1919 "CT pass-through-%s error comp_status=0x%x total_byte=0x%x.\n",
1920 type, comp_status,
1921 bsg_reply->reply_payload_rcv_len);
1922 } else {
1923 ql_log(ql_log_warn, vha, 0x5049,
1924 "CT pass-through-%s error comp_status=0x%x.\n",
1925 type, comp_status);
1926 res = DID_ERROR << 16;
1927 bsg_reply->reply_payload_rcv_len = 0;
1928 }
1929 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5035,
f8f97b0c 1930 pkt, sizeof(*pkt));
726b8548
QT		 1931 } else {
1932 res = DID_OK << 16;
1933 bsg_reply->reply_payload_rcv_len =
1934 bsg_job->reply_payload.payload_len;
1935 bsg_job->reply_len = 0;
1936 }
1937 break;
1938 case SRB_CT_PTHRU_CMD:
1939 /*
1940 * borrowing sts_entry_24xx.comp_status.
1941 * same location as ct_entry_24xx.comp_status
1942 */
1943 res = qla2x00_chk_ms_status(vha, (ms_iocb_entry_t *)pkt,
1944 (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp,
1945 sp->name);
1946 break;
9bc4f4fb
HZ		 1947 }
1948
25ff6af1 1949 sp->done(sp, res);
9bc4f4fb
HZ		 1950}
1951
9a069e19
GM		 1952static void
1953qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1954 struct sts_entry_24xx *pkt, int iocb_type)
1955{
7ffa5b93 1956 struct els_sts_entry_24xx *ese = (struct els_sts_entry_24xx *)pkt;
9a069e19
GM		 1957 const char func[] = "ELS_CT_IOCB";
1958 const char *type;
9a069e19 1959 srb_t *sp;
75cc8cfc 1960 struct bsg_job *bsg_job;
01e0e15c 1961 struct fc_bsg_reply *bsg_reply;
9a069e19
GM		 1962 uint16_t comp_status;
1963 uint32_t fw_status[3];
9ba56b95 1964 int res;
edd05de1 1965 struct srb_iocb *els;
9a069e19
GM		 1966
1967 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1968 if (!sp)
1969 return;
9a069e19
GM		 1970
1971 type = NULL;
9ba56b95 1972 switch (sp->type) {
9a069e19
GM		 1973 case SRB_ELS_CMD_RPT:
1974 case SRB_ELS_CMD_HST:
1975 type = "els";
1976 break;
1977 case SRB_CT_CMD:
1978 type = "ct pass-through";
1979 break;
6eb54715
HM		 1980 case SRB_ELS_DCMD:
1981 type = "Driver ELS logo";
edd05de1
DG		 1982 if (iocb_type != ELS_IOCB_TYPE) {
1983 ql_dbg(ql_dbg_user, vha, 0x5047,
1984 "Completing %s: (%p) type=%d.\n",
1985 type, sp, sp->type);
1986 sp->done(sp, 0);
1987 return;
1988 }
1989 break;
726b8548
QT		 1990 case SRB_CT_PTHRU_CMD:
1991 /* borrowing sts_entry_24xx.comp_status.
1992 same location as ct_entry_24xx.comp_status
1993 */
2d73ac61 1994 res = qla2x00_chk_ms_status(sp->vha, (ms_iocb_entry_t *)pkt,
726b8548
QT		 1995 (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp,
1996 sp->name);
25ff6af1 1997 sp->done(sp, res);
6eb54715 1998 return;
9a069e19 1999 default:
37fed3ee 2000 ql_dbg(ql_dbg_user, vha, 0x503e,
9ba56b95 2001 "Unrecognized SRB: (%p) type=%d.\n", sp, sp->type);
9a069e19
GM		 2002 return;
2003 }
2004
2005 comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status);
7ffa5b93
BVA		 2006 fw_status[1] = le32_to_cpu(ese->error_subcode_1);
2007 fw_status[2] = le32_to_cpu(ese->error_subcode_2);
9a069e19 2008
edd05de1
DG		 2009 if (iocb_type == ELS_IOCB_TYPE) {
2010 els = &sp->u.iocb_cmd;
7ffa5b93
BVA		 2011 els->u.els_plogi.fw_status[0] = cpu_to_le32(fw_status[0]);
2012 els->u.els_plogi.fw_status[1] = cpu_to_le32(fw_status[1]);
2013 els->u.els_plogi.fw_status[2] = cpu_to_le32(fw_status[2]);
2014 els->u.els_plogi.comp_status = cpu_to_le16(fw_status[0]);
edd05de1
DG		 2015 if (comp_status == CS_COMPLETE) {
2016 res = DID_OK << 16;
2017 } else {
2018 if (comp_status == CS_DATA_UNDERRUN) {
2019 res = DID_OK << 16;
7ffa5b93
BVA		 2020 els->u.els_plogi.len = cpu_to_le16(le32_to_cpu(
2021 ese->total_byte_count));
edd05de1
DG		 2022 } else {
2023 els->u.els_plogi.len = 0;
2024 res = DID_ERROR << 16;
2025 }
2026 }
81b9d1e1
QT		 2027 ql_dbg(ql_dbg_disc, vha, 0x503f,
2028 "ELS IOCB Done -%s hdl=%x comp_status=0x%x error subcode 1=0x%x error subcode 2=0x%x total_byte=0x%x\n",
edd05de1 2029 type, sp->handle, comp_status, fw_status[1], fw_status[2],
7ffa5b93 2030 le32_to_cpu(ese->total_byte_count));
edd05de1
DG		 2031 goto els_ct_done;
2032 }
2033
9a069e19
GM		 2034 /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
2035 * fc payload to the caller
2036 */
a1730595
DG		 2037 bsg_job = sp->u.bsg_job;
2038 bsg_reply = bsg_job->reply;
01e0e15c 2039 bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
9a069e19
GM		 2040 bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status);
2041
2042 if (comp_status != CS_COMPLETE) {
2043 if (comp_status == CS_DATA_UNDERRUN) {
9ba56b95 2044 res = DID_OK << 16;
01e0e15c 2045 bsg_reply->reply_payload_rcv_len =
7ffa5b93 2046 le32_to_cpu(ese->total_byte_count);
9a069e19 2047
37fed3ee 2048 ql_dbg(ql_dbg_user, vha, 0x503f,
cfb0919c 2049 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
9a069e19 2050 "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n",
cfb0919c 2051 type, sp->handle, comp_status, fw_status[1], fw_status[2],
7ffa5b93 2052 le32_to_cpu(ese->total_byte_count));
05231a3b 2053 } else {
37fed3ee 2054 ql_dbg(ql_dbg_user, vha, 0x5040,
cfb0919c 2055 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
9a069e19 2056 "error subcode 1=0x%x error subcode 2=0x%x.\n",
cfb0919c 2057 type, sp->handle, comp_status,
7ffa5b93
BVA		 2058 le32_to_cpu(ese->error_subcode_1),
2059 le32_to_cpu(ese->error_subcode_2));
9ba56b95 2060 res = DID_ERROR << 16;
01e0e15c 2061 bsg_reply->reply_payload_rcv_len = 0;
9a069e19 2062 }
05231a3b
CH		 2063 memcpy(bsg_job->reply + sizeof(struct fc_bsg_reply),
2064 fw_status, sizeof(fw_status));
37fed3ee 2065 ql_dump_buffer(ql_dbg_user + ql_dbg_buffer, vha, 0x5056,
f8f97b0c 2066 pkt, sizeof(*pkt));
9a069e19
GM		 2067 }
2068 else {
9ba56b95 2069 res = DID_OK << 16;
01e0e15c 2070 bsg_reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len;
9a069e19
GM		 2071 bsg_job->reply_len = 0;
2072 }
edd05de1 2073els_ct_done:
9a069e19 2074
25ff6af1 2075 sp->done(sp, res);
9a069e19
GM		 2076}
2077
ac280b67
AV		 2078static void
2079qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req,
2080 struct logio_entry_24xx *logio)
2081{
2082 const char func[] = "LOGIO-IOCB";
2083 const char *type;
ac280b67
AV		 2084 fc_port_t *fcport;
2085 srb_t *sp;
4916392b 2086 struct srb_iocb *lio;
99b0bec7 2087 uint16_t *data;
ac280b67
AV		 2088 uint32_t iop[2];
2089
2090 sp = qla2x00_get_sp_from_handle(vha, func, req, logio);
2091 if (!sp)
2092 return;
2093
9ba56b95
GM		 2094 lio = &sp->u.iocb_cmd;
2095 type = sp->name;
ac280b67 2096 fcport = sp->fcport;
4916392b 2097 data = lio->u.logio.data;
ac280b67 2098
5ff1d584 2099 data[0] = MBS_COMMAND_ERROR;
4916392b 2100 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
5ff1d584 2101 QLA_LOGIO_LOGIN_RETRIED : 0;
ac280b67 2102 if (logio->entry_status) {
5e19ed90 2103 ql_log(ql_log_warn, fcport->vha, 0x5034,
5b33469a 2104 "Async-%s error entry - %8phC hdl=%x"
d3fa9e7d 2105 "portid=%02x%02x%02x entry-status=%x.\n",
5b33469a 2106 type, fcport->port_name, sp->handle, fcport->d_id.b.domain,
cfb0919c
CD		 2107 fcport->d_id.b.area, fcport->d_id.b.al_pa,
2108 logio->entry_status);
2109 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d,
f8f97b0c 2110 logio, sizeof(*logio));
ac280b67 2111
99b0bec7 2112 goto logio_done;
ac280b67
AV		 2113 }
2114
2115 if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) {
cbe729a6
JC		 2116 ql_dbg(ql_dbg_async, sp->vha, 0x5036,
2117 "Async-%s complete: handle=%x pid=%06x wwpn=%8phC iop0=%x\n",
2118 type, sp->handle, fcport->d_id.b24, fcport->port_name,
7c3df132 2119 le32_to_cpu(logio->io_parameter[0]));
ac280b67 2120
ead03855 2121 vha->hw->exch_starvation = 0;
ac280b67 2122 data[0] = MBS_COMMAND_COMPLETE;
03aaa89f
DT		 2123
2124 if (sp->type == SRB_PRLI_CMD) {
2125 lio->u.logio.iop[0] =
2126 le32_to_cpu(logio->io_parameter[0]);
2127 lio->u.logio.iop[1] =
2128 le32_to_cpu(logio->io_parameter[1]);
2129 goto logio_done;
2130 }
2131
9ba56b95 2132 if (sp->type != SRB_LOGIN_CMD)
99b0bec7 2133 goto logio_done;
ac280b67
AV		 2134
2135 iop[0] = le32_to_cpu(logio->io_parameter[0]);
2136 if (iop[0] & BIT_4) {
2137 fcport->port_type = FCT_TARGET;
2138 if (iop[0] & BIT_8)
8474f3a0 2139 fcport->flags |= FCF_FCP2_DEVICE;
b0cd579c 2140 } else if (iop[0] & BIT_5)
ac280b67 2141 fcport->port_type = FCT_INITIATOR;
b0cd579c 2142
2d70c103
NB		 2143 if (iop[0] & BIT_7)
2144 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
2145
ac280b67
AV		 2146 if (logio->io_parameter[7] || logio->io_parameter[8])
2147 fcport->supported_classes |= FC_COS_CLASS2;
2148 if (logio->io_parameter[9] || logio->io_parameter[10])
2149 fcport->supported_classes |= FC_COS_CLASS3;
2150
99b0bec7 2151 goto logio_done;
ac280b67
AV		 2152 }
2153
2154 iop[0] = le32_to_cpu(logio->io_parameter[0]);
2155 iop[1] = le32_to_cpu(logio->io_parameter[1]);
726b8548
QT		 2156 lio->u.logio.iop[0] = iop[0];
2157 lio->u.logio.iop[1] = iop[1];
ac280b67
AV		 2158 switch (iop[0]) {
2159 case LSC_SCODE_PORTID_USED:
2160 data[0] = MBS_PORT_ID_USED;
2161 data[1] = LSW(iop[1]);
2162 break;
2163 case LSC_SCODE_NPORT_USED:
2164 data[0] = MBS_LOOP_ID_USED;
2165 break;
5b33469a
QT		 2166 case LSC_SCODE_CMD_FAILED:
2167 if (iop[1] == 0x0606) {
2168 /*
2169 * PLOGI/PRLI Completed. We must have Recv PLOGI/PRLI,
2170 * Target side acked.
2171 */
2172 data[0] = MBS_COMMAND_COMPLETE;
2173 goto logio_done;
2174 }
2175 data[0] = MBS_COMMAND_ERROR;
2176 break;
ead03855
QT		 2177 case LSC_SCODE_NOXCB:
2178 vha->hw->exch_starvation++;
2179 if (vha->hw->exch_starvation > 5) {
83548fe2 2180 ql_log(ql_log_warn, vha, 0xd046,
ead03855
QT		 2181 "Exchange starvation. Resetting RISC\n");
2182
2183 vha->hw->exch_starvation = 0;
2184
2185 if (IS_P3P_TYPE(vha->hw))
2186 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
2187 else
2188 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2189 qla2xxx_wake_dpc(vha);
2190 }
df561f66 2191 fallthrough;
ac280b67
AV		 2192 default:
2193 data[0] = MBS_COMMAND_ERROR;
ac280b67
AV		 2194 break;
2195 }
2196
cbe729a6
JC		 2197 ql_dbg(ql_dbg_async, sp->vha, 0x5037,
2198 "Async-%s failed: handle=%x pid=%06x wwpn=%8phC comp_status=%x iop0=%x iop1=%x\n",
2199 type, sp->handle, fcport->d_id.b24, fcport->port_name,
ac280b67
AV		 2200 le16_to_cpu(logio->comp_status),
2201 le32_to_cpu(logio->io_parameter[0]),
7c3df132 2202 le32_to_cpu(logio->io_parameter[1]));
ac280b67 2203
99b0bec7 2204logio_done:
25ff6af1 2205 sp->done(sp, 0);
ac280b67
AV		 2206}
2207
3822263e 2208static void
faef62d1 2209qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, void *tsk)
3822263e
MI		 2210{
2211 const char func[] = "TMF-IOCB";
2212 const char *type;
2213 fc_port_t *fcport;
2214 srb_t *sp;
2215 struct srb_iocb *iocb;
3822263e 2216 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
3822263e
MI		 2217
2218 sp = qla2x00_get_sp_from_handle(vha, func, req, tsk);
2219 if (!sp)
2220 return;
2221
9ba56b95
GM		 2222 iocb = &sp->u.iocb_cmd;
2223 type = sp->name;
3822263e 2224 fcport = sp->fcport;
faef62d1 2225 iocb->u.tmf.data = QLA_SUCCESS;
3822263e
MI		 2226
2227 if (sts->entry_status) {
5e19ed90 2228 ql_log(ql_log_warn, fcport->vha, 0x5038,
cfb0919c
CD		 2229 "Async-%s error - hdl=%x entry-status(%x).\n",
2230 type, sp->handle, sts->entry_status);
faef62d1 2231 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
ad950360 2232 } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) {
5e19ed90 2233 ql_log(ql_log_warn, fcport->vha, 0x5039,
cfb0919c
CD		 2234 "Async-%s error - hdl=%x completion status(%x).\n",
2235 type, sp->handle, sts->comp_status);
faef62d1
AB		 2236 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
2237 } else if ((le16_to_cpu(sts->scsi_status) &
3822263e 2238 SS_RESPONSE_INFO_LEN_VALID)) {
faef62d1
AB		 2239 if (le32_to_cpu(sts->rsp_data_len) < 4) {
2240 ql_log(ql_log_warn, fcport->vha, 0x503b,
2241 "Async-%s error - hdl=%x not enough response(%d).\n",
2242 type, sp->handle, sts->rsp_data_len);
2243 } else if (sts->data[3]) {
2244 ql_log(ql_log_warn, fcport->vha, 0x503c,
2245 "Async-%s error - hdl=%x response(%x).\n",
2246 type, sp->handle, sts->data[3]);
8d2b21db 2247 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
faef62d1 2248 }
3822263e
MI		 2249 }
2250
faef62d1 2251 if (iocb->u.tmf.data != QLA_SUCCESS)
f8f97b0c
JC		 2252 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, sp->vha, 0x5055,
2253 sts, sizeof(*sts));
3822263e 2254
25ff6af1 2255 sp->done(sp, 0);
3822263e
MI		 2256}
2257
60dd6e8e
DT		 2258static void qla24xx_nvme_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2259 void *tsk, srb_t *sp)
7401bc18 2260{
7401bc18 2261 fc_port_t *fcport;
7401bc18
DG		 2262 struct srb_iocb *iocb;
2263 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
2264 uint16_t state_flags;
2265 struct nvmefc_fcp_req *fd;
4072e1dc 2266 uint16_t ret = QLA_SUCCESS;
7ffa5b93 2267 __le16 comp_status = sts->comp_status;
3d582b34 2268 int logit = 0;
7401bc18
DG		 2269
2270 iocb = &sp->u.iocb_cmd;
2271 fcport = sp->fcport;
4072e1dc 2272 iocb->u.nvme.comp_status = comp_status;
7401bc18
DG		 2273 state_flags = le16_to_cpu(sts->state_flags);
2274 fd = iocb->u.nvme.desc;
7401bc18 2275
60dd6e8e 2276 if (unlikely(iocb->u.nvme.aen_op))
deeae7a6 2277 atomic_dec(&sp->vha->hw->nvme_active_aen_cnt);
7401bc18 2278
3d582b34
AE		 2279 if (unlikely(comp_status != CS_COMPLETE))
2280 logit = 1;
2281
2282 fd->transferred_length = fd->payload_length -
2283 le32_to_cpu(sts->residual_len);
2284
7401bc18
DG		 2285 /*
2286 * State flags: Bit 6 and 0.
2287 * If 0 is set, we don't care about 6.
2288 * both cases resp was dma'd to host buffer
2289 * if both are 0, that is good path case.
2290 * if six is set and 0 is clear, we need to
2291 * copy resp data from status iocb to resp buffer.
2292 */
2293 if (!(state_flags & (SF_FCP_RSP_DMA | SF_NVME_ERSP))) {
2294 iocb->u.nvme.rsp_pyld_len = 0;
3d582b34
AE		 2295 } else if ((state_flags & (SF_FCP_RSP_DMA | SF_NVME_ERSP)) ==
2296 (SF_FCP_RSP_DMA | SF_NVME_ERSP)) {
2297 /* Response already DMA'd to fd->rspaddr. */
7ffa5b93 2298 iocb->u.nvme.rsp_pyld_len = sts->nvme_rsp_pyld_len;
3d582b34
AE		 2299 } else if ((state_flags & SF_FCP_RSP_DMA)) {
2300 /*
2301 * Non-zero value in first 12 bytes of NVMe_RSP IU, treat this
2302 * as an error.
2303 */
2304 iocb->u.nvme.rsp_pyld_len = 0;
2305 fd->transferred_length = 0;
2306 ql_dbg(ql_dbg_io, fcport->vha, 0x307a,
2307 "Unexpected values in NVMe_RSP IU.\n");
2308 logit = 1;
7401bc18
DG		 2309 } else if (state_flags & SF_NVME_ERSP) {
2310 uint32_t *inbuf, *outbuf;
2311 uint16_t iter;
2312
2313 inbuf = (uint32_t *)&sts->nvme_ersp_data;
2314 outbuf = (uint32_t *)fd->rspaddr;
7ffa5b93
BVA		 2315 iocb->u.nvme.rsp_pyld_len = sts->nvme_rsp_pyld_len;
2316 if (unlikely(le16_to_cpu(iocb->u.nvme.rsp_pyld_len) >
00fe717e
AE		 2317 sizeof(struct nvme_fc_ersp_iu))) {
2318 if (ql_mask_match(ql_dbg_io)) {
2319 WARN_ONCE(1, "Unexpected response payload length %u.\n",
2320 iocb->u.nvme.rsp_pyld_len);
2321 ql_log(ql_log_warn, fcport->vha, 0x5100,
2322 "Unexpected response payload length %u.\n",
2323 iocb->u.nvme.rsp_pyld_len);
2324 }
2325 iocb->u.nvme.rsp_pyld_len =
7ffa5b93 2326 cpu_to_le16(sizeof(struct nvme_fc_ersp_iu));
00fe717e 2327 }
7ffa5b93 2328 iter = le16_to_cpu(iocb->u.nvme.rsp_pyld_len) >> 2;
7401bc18
DG		 2329 for (; iter; iter--)
2330 *outbuf++ = swab32(*inbuf++);
7401bc18
DG		 2331 }
2332
3d582b34
AE		 2333 if (state_flags & SF_NVME_ERSP) {
2334 struct nvme_fc_ersp_iu *rsp_iu = fd->rspaddr;
2335 u32 tgt_xfer_len;
2336
2337 tgt_xfer_len = be32_to_cpu(rsp_iu->xfrd_len);
2338 if (fd->transferred_length != tgt_xfer_len) {
2339 ql_dbg(ql_dbg_io, fcport->vha, 0x3079,
2340 "Dropped frame(s) detected (sent/rcvd=%u/%u).\n",
2341 tgt_xfer_len, fd->transferred_length);
2342 logit = 1;
7ffa5b93 2343 } else if (le16_to_cpu(comp_status) == CS_DATA_UNDERRUN) {
3d582b34
AE		 2344 /*
2345 * Do not log if this is just an underflow and there
2346 * is no data loss.
2347 */
2348 logit = 0;
2349 }
2350 }
7401bc18 2351
3d582b34 2352 if (unlikely(logit))
4072e1dc
DT		 2353 ql_log(ql_log_warn, fcport->vha, 0x5060,
2354 "NVME-%s ERR Handling - hdl=%x status(%x) tr_len:%x resid=%x ox_id=%x\n",
2355 sp->name, sp->handle, comp_status,
2356 fd->transferred_length, le32_to_cpu(sts->residual_len),
2357 sts->ox_id);
2358
2359 /*
2360 * If transport error then Failure (HBA rejects request)
2361 * otherwise transport will handle.
2362 */
7ffa5b93 2363 switch (le16_to_cpu(comp_status)) {
60dd6e8e 2364 case CS_COMPLETE:
60dd6e8e 2365 break;
4072e1dc 2366
60dd6e8e
DT		 2367 case CS_RESET:
2368 case CS_PORT_UNAVAILABLE:
2369 case CS_PORT_LOGGED_OUT:
4072e1dc 2370 fcport->nvme_flag |= NVME_FLAG_RESETTING;
df561f66 2371 fallthrough;
4072e1dc 2372 case CS_ABORTED:
60dd6e8e 2373 case CS_PORT_BUSY:
60dd6e8e
DT		 2374 fd->transferred_length = 0;
2375 iocb->u.nvme.rsp_pyld_len = 0;
2376 ret = QLA_ABORTED;
2377 break;
4072e1dc
DT		 2378 case CS_DATA_UNDERRUN:
2379 break;
60dd6e8e 2380 default:
7401bc18 2381 ret = QLA_FUNCTION_FAILED;
60dd6e8e 2382 break;
7401bc18
DG		 2383 }
2384 sp->done(sp, ret);
2385}
2386
2853192e
QT		 2387static void qla_ctrlvp_completed(scsi_qla_host_t *vha, struct req_que *req,
2388 struct vp_ctrl_entry_24xx *vce)
2389{
2390 const char func[] = "CTRLVP-IOCB";
2391 srb_t *sp;
2392 int rval = QLA_SUCCESS;
2393
2394 sp = qla2x00_get_sp_from_handle(vha, func, req, vce);
2395 if (!sp)
2396 return;
2397
2398 if (vce->entry_status != 0) {
2399 ql_dbg(ql_dbg_vport, vha, 0x10c4,
2400 "%s: Failed to complete IOCB -- error status (%x)\n",
2401 sp->name, vce->entry_status);
2402 rval = QLA_FUNCTION_FAILED;
2403 } else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) {
2404 ql_dbg(ql_dbg_vport, vha, 0x10c5,
2405 "%s: Failed to complete IOCB -- completion status (%x) vpidx %x\n",
2406 sp->name, le16_to_cpu(vce->comp_status),
2407 le16_to_cpu(vce->vp_idx_failed));
2408 rval = QLA_FUNCTION_FAILED;
2409 } else {
2410 ql_dbg(ql_dbg_vport, vha, 0x10c6,
2411 "Done %s.\n", __func__);
2412 }
2413
2414 sp->rc = rval;
2415 sp->done(sp, rval);
2416}
2417
7b006b97
BVA		 2418/* Process a single response queue entry. */
2419static void qla2x00_process_response_entry(struct scsi_qla_host *vha,
2420 struct rsp_que *rsp,
2421 sts_entry_t *pkt)
2422{
2423 sts21_entry_t *sts21_entry;
2424 sts22_entry_t *sts22_entry;
2425 uint16_t handle_cnt;
2426 uint16_t cnt;
2427
2428 switch (pkt->entry_type) {
2429 case STATUS_TYPE:
2430 qla2x00_status_entry(vha, rsp, pkt);
2431 break;
2432 case STATUS_TYPE_21:
2433 sts21_entry = (sts21_entry_t *)pkt;
2434 handle_cnt = sts21_entry->handle_count;
2435 for (cnt = 0; cnt < handle_cnt; cnt++)
2436 qla2x00_process_completed_request(vha, rsp->req,
2437 sts21_entry->handle[cnt]);
2438 break;
2439 case STATUS_TYPE_22:
2440 sts22_entry = (sts22_entry_t *)pkt;
2441 handle_cnt = sts22_entry->handle_count;
2442 for (cnt = 0; cnt < handle_cnt; cnt++)
2443 qla2x00_process_completed_request(vha, rsp->req,
2444 sts22_entry->handle[cnt]);
2445 break;
2446 case STATUS_CONT_TYPE:
2447 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
2448 break;
2449 case MBX_IOCB_TYPE:
2450 qla2x00_mbx_iocb_entry(vha, rsp->req, (struct mbx_entry *)pkt);
2451 break;
2452 case CT_IOCB_TYPE:
2453 qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
2454 break;
2455 default:
2456 /* Type Not Supported. */
2457 ql_log(ql_log_warn, vha, 0x504a,
2458 "Received unknown response pkt type %x entry status=%x.\n",
2459 pkt->entry_type, pkt->entry_status);
2460 break;
2461 }
2462}
2463
1da177e4
LT		 2464/**
2465 * qla2x00_process_response_queue() - Process response queue entries.
2db6228d 2466 * @rsp: response queue
1da177e4
LT		 2467 */
2468void
73208dfd 2469qla2x00_process_response_queue(struct rsp_que *rsp)
1da177e4 2470{
73208dfd
AC		 2471 struct scsi_qla_host *vha;
2472 struct qla_hw_data *ha = rsp->hw;
3d71644c 2473 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 2474 sts_entry_t *pkt;
73208dfd 2475
2afa19a9 2476 vha = pci_get_drvdata(ha->pdev);
1da177e4 2477
e315cd28 2478 if (!vha->flags.online)
1da177e4
LT		 2479 return;
2480
e315cd28
AC		 2481 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
2482 pkt = (sts_entry_t *)rsp->ring_ptr;
1da177e4 2483
e315cd28
AC		 2484 rsp->ring_index++;
2485 if (rsp->ring_index == rsp->length) {
2486 rsp->ring_index = 0;
2487 rsp->ring_ptr = rsp->ring;
1da177e4 2488 } else {
e315cd28 2489 rsp->ring_ptr++;
1da177e4
LT		 2490 }
2491
2492 if (pkt->entry_status != 0) {
73208dfd 2493 qla2x00_error_entry(vha, rsp, pkt);
1da177e4
LT		 2494 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2495 wmb();
2496 continue;
2497 }
2498
7b006b97 2499 qla2x00_process_response_entry(vha, rsp, pkt);
1da177e4
LT		 2500 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2501 wmb();
2502 }
2503
2504 /* Adjust ring index */
04474d3a 2505 wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index);
1da177e4
LT		 2506}
2507
4733fcb1 2508static inline void
5544213b 2509qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
9ba56b95 2510 uint32_t sense_len, struct rsp_que *rsp, int res)
4733fcb1 2511{
25ff6af1 2512 struct scsi_qla_host *vha = sp->vha;
9ba56b95
GM		 2513 struct scsi_cmnd *cp = GET_CMD_SP(sp);
2514 uint32_t track_sense_len;
4733fcb1
AV		 2515
2516 if (sense_len >= SCSI_SENSE_BUFFERSIZE)
2517 sense_len = SCSI_SENSE_BUFFERSIZE;
2518
9ba56b95
GM		 2519 SET_CMD_SENSE_LEN(sp, sense_len);
2520 SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
2521 track_sense_len = sense_len;
2522
2523 if (sense_len > par_sense_len)
5544213b 2524 sense_len = par_sense_len;
4733fcb1
AV		 2525
2526 memcpy(cp->sense_buffer, sense_data, sense_len);
2527
9ba56b95
GM		 2528 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
2529 track_sense_len -= sense_len;
2530 SET_CMD_SENSE_LEN(sp, track_sense_len);
2531
2532 if (track_sense_len != 0) {
2afa19a9 2533 rsp->status_srb = sp;
9ba56b95
GM		 2534 cp->result = res;
2535 }
4733fcb1 2536
cfb0919c
CD		 2537 if (sense_len) {
2538 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x301c,
9cb78c16 2539 "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n",
25ff6af1 2540 sp->vha->host_no, cp->device->id, cp->device->lun,
cfb0919c 2541 cp);
7c3df132
SK		 2542 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b,
2543 cp->sense_buffer, sense_len);
cfb0919c 2544 }
4733fcb1
AV		 2545}
2546
bad75002
AE		 2547struct scsi_dif_tuple {
2548 __be16 guard; /* Checksum */
d6a03581 2549 __be16 app_tag; /* APPL identifier */
bad75002
AE		 2550 __be32 ref_tag; /* Target LBA or indirect LBA */
2551};
2552
2553/*
2554 * Checks the guard or meta-data for the type of error
2555 * detected by the HBA. In case of errors, we set the
2556 * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST
2557 * to indicate to the kernel that the HBA detected error.
2558 */
8cb2049c 2559static inline int
bad75002
AE		 2560qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24)
2561{
25ff6af1 2562 struct scsi_qla_host *vha = sp->vha;
9ba56b95 2563 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
8cb2049c
AE		 2564 uint8_t *ap = &sts24->data[12];
2565 uint8_t *ep = &sts24->data[20];
bad75002
AE		 2566 uint32_t e_ref_tag, a_ref_tag;
2567 uint16_t e_app_tag, a_app_tag;
2568 uint16_t e_guard, a_guard;
2569
8cb2049c
AE		 2570 /*
2571 * swab32 of the "data" field in the beginning of qla2x00_status_entry()
2572 * would make guard field appear at offset 2
2573 */
a9c4ae10
BVA		 2574 a_guard = get_unaligned_le16(ap + 2);
2575 a_app_tag = get_unaligned_le16(ap + 0);
2576 a_ref_tag = get_unaligned_le32(ap + 4);
2577 e_guard = get_unaligned_le16(ep + 2);
2578 e_app_tag = get_unaligned_le16(ep + 0);
2579 e_ref_tag = get_unaligned_le32(ep + 4);
bad75002 2580
7c3df132
SK		 2581 ql_dbg(ql_dbg_io, vha, 0x3023,
2582 "iocb(s) %p Returned STATUS.\n", sts24);
bad75002 2583
7c3df132
SK		 2584 ql_dbg(ql_dbg_io, vha, 0x3024,
2585 "DIF ERROR in cmd 0x%x lba 0x%llx act ref"
bad75002 2586 " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app"
7c3df132 2587 " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n",
bad75002 2588 cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag,
7c3df132 2589 a_app_tag, e_app_tag, a_guard, e_guard);
bad75002 2590
8cb2049c
AE		 2591 /*
2592 * Ignore sector if:
2593 * For type 3: ref & app tag is all 'f's
2594 * For type 0,1,2: app tag is all 'f's
2595 */
7ffa5b93
BVA		 2596 if (a_app_tag == be16_to_cpu(T10_PI_APP_ESCAPE) &&
2597 (scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3 ||
2598 a_ref_tag == be32_to_cpu(T10_PI_REF_ESCAPE))) {
8cb2049c
AE		 2599 uint32_t blocks_done, resid;
2600 sector_t lba_s = scsi_get_lba(cmd);
2601
2602 /* 2TB boundary case covered automatically with this */
2603 blocks_done = e_ref_tag - (uint32_t)lba_s + 1;
2604
2605 resid = scsi_bufflen(cmd) - (blocks_done *
2606 cmd->device->sector_size);
2607
2608 scsi_set_resid(cmd, resid);
2609 cmd->result = DID_OK << 16;
2610
2611 /* Update protection tag */
2612 if (scsi_prot_sg_count(cmd)) {
2613 uint32_t i, j = 0, k = 0, num_ent;
2614 struct scatterlist *sg;
27c0e83b 2615 struct t10_pi_tuple *spt;
8cb2049c
AE		 2616
2617 /* Patch the corresponding protection tags */
2618 scsi_for_each_prot_sg(cmd, sg,
2619 scsi_prot_sg_count(cmd), i) {
2620 num_ent = sg_dma_len(sg) / 8;
2621 if (k + num_ent < blocks_done) {
2622 k += num_ent;
2623 continue;
2624 }
2625 j = blocks_done - k - 1;
2626 k = blocks_done;
2627 break;
2628 }
2629
2630 if (k != blocks_done) {
cfb0919c 2631 ql_log(ql_log_warn, vha, 0x302f,
8ec9c7fb
RD		 2632 "unexpected tag values tag:lba=%x:%llx)\n",
2633 e_ref_tag, (unsigned long long)lba_s);
8cb2049c
AE		 2634 return 1;
2635 }
2636
2637 spt = page_address(sg_page(sg)) + sg->offset;
2638 spt += j;
2639
128b6f9f 2640 spt->app_tag = T10_PI_APP_ESCAPE;
8cb2049c 2641 if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3)
128b6f9f 2642 spt->ref_tag = T10_PI_REF_ESCAPE;
8cb2049c
AE		 2643 }
2644
2645 return 0;
2646 }
2647
bad75002
AE		 2648 /* check guard */
2649 if (e_guard != a_guard) {
2650 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
2651 0x10, 0x1);
2652 set_driver_byte(cmd, DRIVER_SENSE);
2653 set_host_byte(cmd, DID_ABORT);
584d7aad 2654 cmd->result |= SAM_STAT_CHECK_CONDITION;
8cb2049c 2655 return 1;
bad75002
AE		 2656 }
2657
e02587d7
AE		 2658 /* check ref tag */
2659 if (e_ref_tag != a_ref_tag) {
bad75002 2660 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
e02587d7 2661 0x10, 0x3);
bad75002
AE		 2662 set_driver_byte(cmd, DRIVER_SENSE);
2663 set_host_byte(cmd, DID_ABORT);
584d7aad 2664 cmd->result |= SAM_STAT_CHECK_CONDITION;
8cb2049c 2665 return 1;
bad75002
AE		 2666 }
2667
e02587d7
AE		 2668 /* check appl tag */
2669 if (e_app_tag != a_app_tag) {
bad75002 2670 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
e02587d7 2671 0x10, 0x2);
bad75002
AE		 2672 set_driver_byte(cmd, DRIVER_SENSE);
2673 set_host_byte(cmd, DID_ABORT);
584d7aad 2674 cmd->result |= SAM_STAT_CHECK_CONDITION;
8cb2049c 2675 return 1;
bad75002 2676 }
e02587d7 2677
8cb2049c 2678 return 1;
bad75002
AE		 2679}
2680
a9b6f722
SK		 2681static void
2682qla25xx_process_bidir_status_iocb(scsi_qla_host_t *vha, void *pkt,
2683 struct req_que *req, uint32_t index)
2684{
2685 struct qla_hw_data *ha = vha->hw;
2686 srb_t *sp;
2687 uint16_t comp_status;
2688 uint16_t scsi_status;
2689 uint16_t thread_id;
2690 uint32_t rval = EXT_STATUS_OK;
75cc8cfc 2691 struct bsg_job *bsg_job = NULL;
01e0e15c
JT		 2692 struct fc_bsg_request *bsg_request;
2693 struct fc_bsg_reply *bsg_reply;
1a20719e
BVA		 2694 sts_entry_t *sts = pkt;
2695 struct sts_entry_24xx *sts24 = pkt;
a9b6f722
SK		 2696
2697 /* Validate handle. */
8d93f550 2698 if (index >= req->num_outstanding_cmds) {
a9b6f722
SK		 2699 ql_log(ql_log_warn, vha, 0x70af,
2700 "Invalid SCSI completion handle 0x%x.\n", index);
2701 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2702 return;
2703 }
2704
2705 sp = req->outstanding_cmds[index];
01e0e15c 2706 if (!sp) {
a9b6f722
SK		 2707 ql_log(ql_log_warn, vha, 0x70b0,
2708 "Req:%d: Invalid ISP SCSI completion handle(0x%x)\n",
2709 req->id, index);
2710
2711 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2712 return;
2713 }
2714
01e0e15c
JT		 2715 /* Free outstanding command slot. */
2716 req->outstanding_cmds[index] = NULL;
2717 bsg_job = sp->u.bsg_job;
2718 bsg_request = bsg_job->request;
2719 bsg_reply = bsg_job->reply;
2720
a9b6f722
SK		 2721 if (IS_FWI2_CAPABLE(ha)) {
2722 comp_status = le16_to_cpu(sts24->comp_status);
2723 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
2724 } else {
2725 comp_status = le16_to_cpu(sts->comp_status);
2726 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
2727 }
2728
01e0e15c 2729 thread_id = bsg_request->rqst_data.h_vendor.vendor_cmd[1];
a9b6f722
SK		 2730 switch (comp_status) {
2731 case CS_COMPLETE:
2732 if (scsi_status == 0) {
01e0e15c 2733 bsg_reply->reply_payload_rcv_len =
a9b6f722 2734 bsg_job->reply_payload.payload_len;
fabbb8df 2735 vha->qla_stats.input_bytes +=
01e0e15c 2736 bsg_reply->reply_payload_rcv_len;
fabbb8df 2737 vha->qla_stats.input_requests++;
a9b6f722
SK		 2738 rval = EXT_STATUS_OK;
2739 }
2740 goto done;
2741
2742 case CS_DATA_OVERRUN:
2743 ql_dbg(ql_dbg_user, vha, 0x70b1,
5a68a1c2 2744 "Command completed with data overrun thread_id=%d\n",
a9b6f722
SK		 2745 thread_id);
2746 rval = EXT_STATUS_DATA_OVERRUN;
2747 break;
2748
2749 case CS_DATA_UNDERRUN:
2750 ql_dbg(ql_dbg_user, vha, 0x70b2,
5a68a1c2 2751 "Command completed with data underrun thread_id=%d\n",
a9b6f722
SK		 2752 thread_id);
2753 rval = EXT_STATUS_DATA_UNDERRUN;
2754 break;
2755 case CS_BIDIR_RD_OVERRUN:
2756 ql_dbg(ql_dbg_user, vha, 0x70b3,
2757 "Command completed with read data overrun thread_id=%d\n",
2758 thread_id);
2759 rval = EXT_STATUS_DATA_OVERRUN;
2760 break;
2761
2762 case CS_BIDIR_RD_WR_OVERRUN:
2763 ql_dbg(ql_dbg_user, vha, 0x70b4,
2764 "Command completed with read and write data overrun "
2765 "thread_id=%d\n", thread_id);
2766 rval = EXT_STATUS_DATA_OVERRUN;
2767 break;
2768
2769 case CS_BIDIR_RD_OVERRUN_WR_UNDERRUN:
2770 ql_dbg(ql_dbg_user, vha, 0x70b5,
2771 "Command completed with read data over and write data "
2772 "underrun thread_id=%d\n", thread_id);
2773 rval = EXT_STATUS_DATA_OVERRUN;
2774 break;
2775
2776 case CS_BIDIR_RD_UNDERRUN:
2777 ql_dbg(ql_dbg_user, vha, 0x70b6,
5a68a1c2 2778 "Command completed with read data underrun "
a9b6f722
SK		 2779 "thread_id=%d\n", thread_id);
2780 rval = EXT_STATUS_DATA_UNDERRUN;
2781 break;
2782
2783 case CS_BIDIR_RD_UNDERRUN_WR_OVERRUN:
2784 ql_dbg(ql_dbg_user, vha, 0x70b7,
2785 "Command completed with read data under and write data "
2786 "overrun thread_id=%d\n", thread_id);
2787 rval = EXT_STATUS_DATA_UNDERRUN;
2788 break;
2789
2790 case CS_BIDIR_RD_WR_UNDERRUN:
2791 ql_dbg(ql_dbg_user, vha, 0x70b8,
2792 "Command completed with read and write data underrun "
2793 "thread_id=%d\n", thread_id);
2794 rval = EXT_STATUS_DATA_UNDERRUN;
2795 break;
2796
2797 case CS_BIDIR_DMA:
2798 ql_dbg(ql_dbg_user, vha, 0x70b9,
2799 "Command completed with data DMA error thread_id=%d\n",
2800 thread_id);
2801 rval = EXT_STATUS_DMA_ERR;
2802 break;
2803
2804 case CS_TIMEOUT:
2805 ql_dbg(ql_dbg_user, vha, 0x70ba,
2806 "Command completed with timeout thread_id=%d\n",
2807 thread_id);
2808 rval = EXT_STATUS_TIMEOUT;
2809 break;
2810 default:
2811 ql_dbg(ql_dbg_user, vha, 0x70bb,
2812 "Command completed with completion status=0x%x "
2813 "thread_id=%d\n", comp_status, thread_id);
2814 rval = EXT_STATUS_ERR;
2815 break;
2816 }
01e0e15c 2817 bsg_reply->reply_payload_rcv_len = 0;
a9b6f722
SK		 2818
2819done:
2820 /* Return the vendor specific reply to API */
01e0e15c 2821 bsg_reply->reply_data.vendor_reply.vendor_rsp[0] = rval;
a9b6f722
SK		 2822 bsg_job->reply_len = sizeof(struct fc_bsg_reply);
2823 /* Always return DID_OK, bsg will send the vendor specific response
2824 * in this case only */
f7d5182c 2825 sp->done(sp, DID_OK << 16);
a9b6f722
SK		 2826
2827}
2828
1da177e4
LT		 2829/**
2830 * qla2x00_status_entry() - Process a Status IOCB entry.
2db6228d
BVA		 2831 * @vha: SCSI driver HA context
2832 * @rsp: response queue
1da177e4
LT		 2833 * @pkt: Entry pointer
2834 */
2835static void
73208dfd 2836qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
1da177e4 2837{
1da177e4 2838 srb_t *sp;
1da177e4
LT		 2839 fc_port_t *fcport;
2840 struct scsi_cmnd *cp;
1a20719e
BVA		 2841 sts_entry_t *sts = pkt;
2842 struct sts_entry_24xx *sts24 = pkt;
1da177e4
LT		 2843 uint16_t comp_status;
2844 uint16_t scsi_status;
b7d2280c 2845 uint16_t ox_id;
1da177e4
LT		 2846 uint8_t lscsi_status;
2847 int32_t resid;
5544213b
AV		 2848 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
2849 fw_resid_len;
9a853f71 2850 uint8_t *rsp_info, *sense_data;
e315cd28 2851 struct qla_hw_data *ha = vha->hw;
2afa19a9
AC		 2852 uint32_t handle;
2853 uint16_t que;
2854 struct req_que *req;
b7d2280c 2855 int logit = 1;
9ba56b95 2856 int res = 0;
a9b6f722 2857 uint16_t state_flags = 0;
e05fe292 2858 uint16_t retry_delay = 0;
9a853f71 2859
e428924c 2860 if (IS_FWI2_CAPABLE(ha)) {
9a853f71
AV		 2861 comp_status = le16_to_cpu(sts24->comp_status);
2862 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
a9b6f722 2863 state_flags = le16_to_cpu(sts24->state_flags);
9a853f71
AV		 2864 } else {
2865 comp_status = le16_to_cpu(sts->comp_status);
2866 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
2867 }
2afa19a9
AC		 2868 handle = (uint32_t) LSW(sts->handle);
2869 que = MSW(sts->handle);
2870 req = ha->req_q_map[que];
a9083016 2871
36008cf1
CD		 2872 /* Check for invalid queue pointer */
2873 if (req == NULL ||
2874 que >= find_first_zero_bit(ha->req_qid_map, ha->max_req_queues)) {
2875 ql_dbg(ql_dbg_io, vha, 0x3059,
2876 "Invalid status handle (0x%x): Bad req pointer. req=%p, "
2877 "que=%u.\n", sts->handle, req, que);
2878 return;
2879 }
2880
1da177e4 2881 /* Validate handle. */
c7bc4cae 2882 if (handle < req->num_outstanding_cmds) {
2afa19a9 2883 sp = req->outstanding_cmds[handle];
c7bc4cae
CD		 2884 if (!sp) {
2885 ql_dbg(ql_dbg_io, vha, 0x3075,
2886 "%s(%ld): Already returned command for status handle (0x%x).\n",
2887 __func__, vha->host_no, sts->handle);
2888 return;
2889 }
2890 } else {
cfb0919c 2891 ql_dbg(ql_dbg_io, vha, 0x3017,
c7bc4cae
CD		 2892 "Invalid status handle, out of range (0x%x).\n",
2893 sts->handle);
1da177e4 2894
acd3ce88
CD		 2895 if (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) {
2896 if (IS_P3P_TYPE(ha))
2897 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
2898 else
2899 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2900 qla2xxx_wake_dpc(vha);
2901 }
1da177e4
LT		 2902 return;
2903 }
a9b6f722 2904
c5419e26
QT		 2905 if (sp->cmd_type != TYPE_SRB) {
2906 req->outstanding_cmds[handle] = NULL;
2907 ql_dbg(ql_dbg_io, vha, 0x3015,
2908 "Unknown sp->cmd_type %x %p).\n",
2909 sp->cmd_type, sp);
2910 return;
2911 }
2912
7401bc18
DG		 2913 /* NVME completion. */
2914 if (sp->type == SRB_NVME_CMD) {
60dd6e8e
DT		 2915 req->outstanding_cmds[handle] = NULL;
2916 qla24xx_nvme_iocb_entry(vha, req, pkt, sp);
7401bc18
DG		 2917 return;
2918 }
2919
a9b6f722
SK		 2920 if (unlikely((state_flags & BIT_1) && (sp->type == SRB_BIDI_CMD))) {
2921 qla25xx_process_bidir_status_iocb(vha, pkt, req, handle);
2922 return;
2923 }
2924
faef62d1
AB		 2925 /* Task Management completion. */
2926 if (sp->type == SRB_TM_CMD) {
2927 qla24xx_tm_iocb_entry(vha, req, pkt);
2928 return;
2929 }
2930
a9b6f722
SK		 2931 /* Fast path completion. */
2932 if (comp_status == CS_COMPLETE && scsi_status == 0) {
2933 qla2x00_process_completed_request(vha, req, handle);
2934
2935 return;
2936 }
2937
2938 req->outstanding_cmds[handle] = NULL;
9ba56b95 2939 cp = GET_CMD_SP(sp);
1da177e4 2940 if (cp == NULL) {
cfb0919c 2941 ql_dbg(ql_dbg_io, vha, 0x3018,
7c3df132
SK		 2942 "Command already returned (0x%x/%p).\n",
2943 sts->handle, sp);
1da177e4
LT		 2944
2945 return;
2946 }
2947
8ae6d9c7 2948 lscsi_status = scsi_status & STATUS_MASK;
1da177e4 2949
bdf79621 2950 fcport = sp->fcport;
1da177e4 2951
b7d2280c 2952 ox_id = 0;
5544213b
AV		 2953 sense_len = par_sense_len = rsp_info_len = resid_len =
2954 fw_resid_len = 0;
e428924c 2955 if (IS_FWI2_CAPABLE(ha)) {
7ffa5b93
BVA		 2956 u16 sts24_retry_delay = le16_to_cpu(sts24->retry_delay);
2957
0f00a206
LC		 2958 if (scsi_status & SS_SENSE_LEN_VALID)
2959 sense_len = le32_to_cpu(sts24->sense_len);
2960 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2961 rsp_info_len = le32_to_cpu(sts24->rsp_data_len);
2962 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER))
2963 resid_len = le32_to_cpu(sts24->rsp_residual_count);
2964 if (comp_status == CS_DATA_UNDERRUN)
2965 fw_resid_len = le32_to_cpu(sts24->residual_len);
9a853f71
AV		 2966 rsp_info = sts24->data;
2967 sense_data = sts24->data;
2968 host_to_fcp_swap(sts24->data, sizeof(sts24->data));
b7d2280c 2969 ox_id = le16_to_cpu(sts24->ox_id);
5544213b 2970 par_sense_len = sizeof(sts24->data);
e05fe292 2971 /* Valid values of the retry delay timer are 0x1-0xffef */
7ffa5b93
BVA		 2972 if (sts24_retry_delay > 0 && sts24_retry_delay < 0xfff1) {
2973 retry_delay = sts24_retry_delay & 0x3fff;
3cedc879
AG		 2974 ql_dbg(ql_dbg_io, sp->vha, 0x3033,
2975 "%s: scope=%#x retry_delay=%#x\n", __func__,
7ffa5b93 2976 sts24_retry_delay >> 14, retry_delay);
3cedc879 2977 }
9a853f71 2978 } else {
0f00a206
LC		 2979 if (scsi_status & SS_SENSE_LEN_VALID)
2980 sense_len = le16_to_cpu(sts->req_sense_length);
2981 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2982 rsp_info_len = le16_to_cpu(sts->rsp_info_len);
9a853f71
AV		 2983 resid_len = le32_to_cpu(sts->residual_length);
2984 rsp_info = sts->rsp_info;
2985 sense_data = sts->req_sense_data;
5544213b 2986 par_sense_len = sizeof(sts->req_sense_data);
9a853f71
AV		 2987 }
2988
1da177e4
LT		 2989 /* Check for any FCP transport errors. */
2990 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) {
9a853f71 2991 /* Sense data lies beyond any FCP RESPONSE data. */
5544213b 2992 if (IS_FWI2_CAPABLE(ha)) {
9a853f71 2993 sense_data += rsp_info_len;
5544213b
AV		 2994 par_sense_len -= rsp_info_len;
2995 }
9a853f71 2996 if (rsp_info_len > 3 && rsp_info[3]) {
5e19ed90 2997 ql_dbg(ql_dbg_io, fcport->vha, 0x3019,
7c3df132
SK		 2998 "FCP I/O protocol failure (0x%x/0x%x).\n",
2999 rsp_info_len, rsp_info[3]);
1da177e4 3000
9ba56b95 3001 res = DID_BUS_BUSY << 16;
b7d2280c 3002 goto out;
1da177e4
LT		 3003 }
3004 }
3005
3e8ce320
AV		 3006 /* Check for overrun. */
3007 if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE &&
3008 scsi_status & SS_RESIDUAL_OVER)
3009 comp_status = CS_DATA_OVERRUN;
3010
e05fe292
CD		 3011 /*
3012 * Check retry_delay_timer value if we receive a busy or
3013 * queue full.
3014 */
3015 if (lscsi_status == SAM_STAT_TASK_SET_FULL ||
3016 lscsi_status == SAM_STAT_BUSY)
3017 qla2x00_set_retry_delay_timestamp(fcport, retry_delay);
3018
1da177e4
LT		 3019 /*
3020 * Based on Host and scsi status generate status code for Linux
3021 */
3022 switch (comp_status) {
3023 case CS_COMPLETE:
df7baa50 3024 case CS_QUEUE_FULL:
1da177e4 3025 if (scsi_status == 0) {
9ba56b95 3026 res = DID_OK << 16;
1da177e4
LT		 3027 break;
3028 }
3029 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) {
9a853f71 3030 resid = resid_len;
385d70b4 3031 scsi_set_resid(cp, resid);
0da69df1
AV		 3032
3033 if (!lscsi_status &&
385d70b4 3034 ((unsigned)(scsi_bufflen(cp) - resid) <
0da69df1 3035 cp->underflow)) {
5e19ed90 3036 ql_dbg(ql_dbg_io, fcport->vha, 0x301a,
83548fe2 3037 "Mid-layer underflow detected (0x%x of 0x%x bytes).\n",
7c3df132 3038 resid, scsi_bufflen(cp));
0da69df1 3039
9ba56b95 3040 res = DID_ERROR << 16;
0da69df1
AV		 3041 break;
3042 }
1da177e4 3043 }
9ba56b95 3044 res = DID_OK << 16 | lscsi_status;
1da177e4 3045
df7baa50 3046 if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
5e19ed90 3047 ql_dbg(ql_dbg_io, fcport->vha, 0x301b,
7c3df132 3048 "QUEUE FULL detected.\n");
df7baa50
AV		 3049 break;
3050 }
b7d2280c 3051 logit = 0;
1da177e4
LT		 3052 if (lscsi_status != SS_CHECK_CONDITION)
3053 break;
3054
b80ca4f7 3055 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
1da177e4
LT		 3056 if (!(scsi_status & SS_SENSE_LEN_VALID))
3057 break;
3058
5544213b 3059 qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len,
9ba56b95 3060 rsp, res);
1da177e4
LT		 3061 break;
3062
3063 case CS_DATA_UNDERRUN:
ed17c71b 3064 /* Use F/W calculated residual length. */
0f00a206
LC		 3065 resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len;
3066 scsi_set_resid(cp, resid);
3067 if (scsi_status & SS_RESIDUAL_UNDER) {
3068 if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) {
5e19ed90 3069 ql_dbg(ql_dbg_io, fcport->vha, 0x301d,
83548fe2 3070 "Dropped frame(s) detected (0x%x of 0x%x bytes).\n",
7c3df132 3071 resid, scsi_bufflen(cp));
0f00a206 3072
9ba56b95 3073 res = DID_ERROR << 16 | lscsi_status;
4e85e3d9 3074 goto check_scsi_status;
6acf8190 3075 }
ed17c71b 3076
0f00a206
LC		 3077 if (!lscsi_status &&
3078 ((unsigned)(scsi_bufflen(cp) - resid) <
3079 cp->underflow)) {
5e19ed90 3080 ql_dbg(ql_dbg_io, fcport->vha, 0x301e,
83548fe2 3081 "Mid-layer underflow detected (0x%x of 0x%x bytes).\n",
7c3df132 3082 resid, scsi_bufflen(cp));
e038a1be 3083
9ba56b95 3084 res = DID_ERROR << 16;
0f00a206
LC		 3085 break;
3086 }
4aee5766
GM		 3087 } else if (lscsi_status != SAM_STAT_TASK_SET_FULL &&
3088 lscsi_status != SAM_STAT_BUSY) {
3089 /*
3090 * scsi status of task set and busy are considered to be
3091 * task not completed.
3092 */
3093
5e19ed90 3094 ql_dbg(ql_dbg_io, fcport->vha, 0x301f,
83548fe2
QT		 3095 "Dropped frame(s) detected (0x%x of 0x%x bytes).\n",
3096 resid, scsi_bufflen(cp));
0f00a206 3097
9ba56b95 3098 res = DID_ERROR << 16 | lscsi_status;
0374f55e 3099 goto check_scsi_status;
4aee5766
GM		 3100 } else {
3101 ql_dbg(ql_dbg_io, fcport->vha, 0x3030,
3102 "scsi_status: 0x%x, lscsi_status: 0x%x\n",
3103 scsi_status, lscsi_status);
1da177e4
LT		 3104 }
3105
9ba56b95 3106 res = DID_OK << 16 | lscsi_status;
b7d2280c 3107 logit = 0;
0f00a206 3108
0374f55e 3109check_scsi_status:
1da177e4 3110 /*
fa2a1ce5 3111 * Check to see if SCSI Status is non zero. If so report SCSI
1da177e4
LT		 3112 * Status.
3113 */
3114 if (lscsi_status != 0) {
ffec28a3 3115 if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
5e19ed90 3116 ql_dbg(ql_dbg_io, fcport->vha, 0x3020,
7c3df132 3117 "QUEUE FULL detected.\n");
b7d2280c 3118 logit = 1;
ffec28a3
AV		 3119 break;
3120 }
1da177e4
LT		 3121 if (lscsi_status != SS_CHECK_CONDITION)
3122 break;
3123
b80ca4f7 3124 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
1da177e4
LT		 3125 if (!(scsi_status & SS_SENSE_LEN_VALID))
3126 break;
3127
5544213b 3128 qla2x00_handle_sense(sp, sense_data, par_sense_len,
9ba56b95 3129 sense_len, rsp, res);
1da177e4
LT		 3130 }
3131 break;
3132
1da177e4
LT		 3133 case CS_PORT_LOGGED_OUT:
3134 case CS_PORT_CONFIG_CHG:
3135 case CS_PORT_BUSY:
3136 case CS_INCOMPLETE:
3137 case CS_PORT_UNAVAILABLE:
b7d2280c 3138 case CS_TIMEOUT:
ff454b01
CD		 3139 case CS_RESET:
3140
056a4483
MC		 3141 /*
3142 * We are going to have the fc class block the rport
3143 * while we try to recover so instruct the mid layer
3144 * to requeue until the class decides how to handle this.
3145 */
9ba56b95 3146 res = DID_TRANSPORT_DISRUPTED << 16;
b7d2280c
AV		 3147
3148 if (comp_status == CS_TIMEOUT) {
3149 if (IS_FWI2_CAPABLE(ha))
3150 break;
3151 else if ((le16_to_cpu(sts->status_flags) &
3152 SF_LOGOUT_SENT) == 0)
3153 break;
3154 }
3155
726b8548
QT		 3156 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3157 ql_dbg(ql_dbg_disc, fcport->vha, 0x3021,
3158 "Port to be marked lost on fcport=%02x%02x%02x, current "
3159 "port state= %s comp_status %x.\n", fcport->d_id.b.domain,
3160 fcport->d_id.b.area, fcport->d_id.b.al_pa,
282d1056 3161 port_state_str[FCS_ONLINE],
726b8548
QT		 3162 comp_status);
3163
d8630bb9 3164 qlt_schedule_sess_for_deletion(fcport);
726b8548
QT		 3165 }
3166
1da177e4
LT		 3167 break;
3168
1da177e4 3169 case CS_ABORTED:
9ba56b95 3170 res = DID_RESET << 16;
1da177e4 3171 break;
bad75002
AE		 3172
3173 case CS_DIF_ERROR:
8cb2049c 3174 logit = qla2x00_handle_dif_error(sp, sts24);
fb6e4668 3175 res = cp->result;
bad75002 3176 break;
9e522cd8
AE		 3177
3178 case CS_TRANSPORT:
3179 res = DID_ERROR << 16;
3180
3181 if (!IS_PI_SPLIT_DET_CAPABLE(ha))
3182 break;
3183
3184 if (state_flags & BIT_4)
3185 scmd_printk(KERN_WARNING, cp,
3186 "Unsupported device '%s' found.\n",
3187 cp->device->vendor);
3188 break;
3189
50b81275
GM		 3190 case CS_DMA:
3191 ql_log(ql_log_info, fcport->vha, 0x3022,
3192 "CS_DMA error: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu portid=%06x oxid=0x%x cdb=%10phN len=0x%x rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n",
3193 comp_status, scsi_status, res, vha->host_no,
3194 cp->device->id, cp->device->lun, fcport->d_id.b24,
3195 ox_id, cp->cmnd, scsi_bufflen(cp), rsp_info_len,
3196 resid_len, fw_resid_len, sp, cp);
3197 ql_dump_buffer(ql_dbg_tgt + ql_dbg_verbose, vha, 0xe0ee,
3198 pkt, sizeof(*sts24));
3199 res = DID_ERROR << 16;
3200 break;
1da177e4 3201 default:
9ba56b95 3202 res = DID_ERROR << 16;
1da177e4
LT		 3203 break;
3204 }
3205
b7d2280c
AV		 3206out:
3207 if (logit)
5e19ed90 3208 ql_dbg(ql_dbg_io, fcport->vha, 0x3022,
9cb78c16 3209 "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu "
7b833558 3210 "portid=%02x%02x%02x oxid=0x%x cdb=%10phN len=0x%x "
c7bc4cae 3211 "rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n",
9ba56b95 3212 comp_status, scsi_status, res, vha->host_no,
cfb0919c
CD		 3213 cp->device->id, cp->device->lun, fcport->d_id.b.domain,
3214 fcport->d_id.b.area, fcport->d_id.b.al_pa, ox_id,
7b833558 3215 cp->cmnd, scsi_bufflen(cp), rsp_info_len,
c7bc4cae 3216 resid_len, fw_resid_len, sp, cp);
b7d2280c 3217
2afa19a9 3218 if (rsp->status_srb == NULL)
25ff6af1 3219 sp->done(sp, res);
1da177e4
LT		 3220}
3221
3222/**
3223 * qla2x00_status_cont_entry() - Process a Status Continuations entry.
2db6228d 3224 * @rsp: response queue
1da177e4
LT		 3225 * @pkt: Entry pointer
3226 *
3227 * Extended sense data.
3228 */
3229static void
2afa19a9 3230qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
1da177e4 3231{
9ba56b95 3232 uint8_t sense_sz = 0;
2afa19a9 3233 struct qla_hw_data *ha = rsp->hw;
7c3df132 3234 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
9ba56b95 3235 srb_t *sp = rsp->status_srb;
1da177e4 3236 struct scsi_cmnd *cp;
9ba56b95
GM		 3237 uint32_t sense_len;
3238 uint8_t *sense_ptr;
1da177e4 3239
9ba56b95
GM		 3240 if (!sp || !GET_CMD_SENSE_LEN(sp))
3241 return;
1da177e4 3242
9ba56b95
GM		 3243 sense_len = GET_CMD_SENSE_LEN(sp);
3244 sense_ptr = GET_CMD_SENSE_PTR(sp);
1da177e4 3245
9ba56b95
GM		 3246 cp = GET_CMD_SP(sp);
3247 if (cp == NULL) {
3248 ql_log(ql_log_warn, vha, 0x3025,
3249 "cmd is NULL: already returned to OS (sp=%p).\n", sp);
1da177e4 3250
9ba56b95
GM		 3251 rsp->status_srb = NULL;
3252 return;
1da177e4 3253 }
1da177e4 3254
9ba56b95
GM		 3255 if (sense_len > sizeof(pkt->data))
3256 sense_sz = sizeof(pkt->data);
3257 else
3258 sense_sz = sense_len;
c4631191 3259
9ba56b95
GM		 3260 /* Move sense data. */
3261 if (IS_FWI2_CAPABLE(ha))
3262 host_to_fcp_swap(pkt->data, sizeof(pkt->data));
3263 memcpy(sense_ptr, pkt->data, sense_sz);
3264 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c,
3265 sense_ptr, sense_sz);
c4631191 3266
9ba56b95
GM		 3267 sense_len -= sense_sz;
3268 sense_ptr += sense_sz;
c4631191 3269
9ba56b95
GM		 3270 SET_CMD_SENSE_PTR(sp, sense_ptr);
3271 SET_CMD_SENSE_LEN(sp, sense_len);
3272
3273 /* Place command on done queue. */
3274 if (sense_len == 0) {
3275 rsp->status_srb = NULL;
25ff6af1 3276 sp->done(sp, cp->result);
c4631191 3277 }
c4631191
GM		 3278}
3279
1da177e4
LT		 3280/**
3281 * qla2x00_error_entry() - Process an error entry.
2db6228d
BVA		 3282 * @vha: SCSI driver HA context
3283 * @rsp: response queue
1da177e4 3284 * @pkt: Entry pointer
c5419e26 3285 * return : 1=allow further error analysis. 0=no additional error analysis.
1da177e4 3286 */
c5419e26 3287static int
73208dfd 3288qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt)
1da177e4
LT		 3289{
3290 srb_t *sp;
e315cd28 3291 struct qla_hw_data *ha = vha->hw;
c4631191 3292 const char func[] = "ERROR-IOCB";
2afa19a9 3293 uint16_t que = MSW(pkt->handle);
a6fe35c0 3294 struct req_que *req = NULL;
9ba56b95 3295 int res = DID_ERROR << 16;
7c3df132 3296
9ba56b95 3297 ql_dbg(ql_dbg_async, vha, 0x502a,
82de802a
QT		 3298 "iocb type %xh with error status %xh, handle %xh, rspq id %d\n",
3299 pkt->entry_type, pkt->entry_status, pkt->handle, rsp->id);
9ba56b95 3300
a6fe35c0
AE		 3301 if (que >= ha->max_req_queues || !ha->req_q_map[que])
3302 goto fatal;
3303
3304 req = ha->req_q_map[que];
3305
9ba56b95
GM		 3306 if (pkt->entry_status & RF_BUSY)
3307 res = DID_BUS_BUSY << 16;
1da177e4 3308
c5419e26
QT		 3309 if ((pkt->handle & ~QLA_TGT_HANDLE_MASK) == QLA_TGT_SKIP_HANDLE)
3310 return 0;
4f060736 3311
c5419e26
QT		 3312 switch (pkt->entry_type) {
3313 case NOTIFY_ACK_TYPE:
3314 case STATUS_TYPE:
3315 case STATUS_CONT_TYPE:
3316 case LOGINOUT_PORT_IOCB_TYPE:
3317 case CT_IOCB_TYPE:
3318 case ELS_IOCB_TYPE:
3319 case ABORT_IOCB_TYPE:
3320 case MBX_IOCB_TYPE:
527b8ae3 3321 default:
c5419e26
QT		 3322 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
3323 if (sp) {
3324 sp->done(sp, res);
3325 return 0;
3326 }
3327 break;
3328
3329 case ABTS_RESP_24XX:
3330 case CTIO_TYPE7:
3331 case CTIO_CRC2:
c5419e26 3332 return 1;
1da177e4 3333 }
a6fe35c0
AE		 3334fatal:
3335 ql_log(ql_log_warn, vha, 0x5030,
fd49a540 3336 "Error entry - invalid handle/queue (%04x).\n", que);
c5419e26 3337 return 0;
1da177e4
LT		 3338}
3339
9a853f71
AV		 3340/**
3341 * qla24xx_mbx_completion() - Process mailbox command completions.
2db6228d 3342 * @vha: SCSI driver HA context
9a853f71
AV		 3343 * @mb0: Mailbox0 register
3344 */
3345static void
e315cd28 3346qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
9a853f71
AV		 3347{
3348 uint16_t cnt;
4fa94f83 3349 uint32_t mboxes;
37139da1 3350 __le16 __iomem *wptr;
e315cd28 3351 struct qla_hw_data *ha = vha->hw;
9a853f71
AV		 3352 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3353
4fa94f83 3354 /* Read all mbox registers? */
c02189e1
BVA		 3355 WARN_ON_ONCE(ha->mbx_count > 32);
3356 mboxes = (1ULL << ha->mbx_count) - 1;
4fa94f83 3357 if (!ha->mcp)
a720101d 3358 ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERROR.\n");
4fa94f83
AV		 3359 else
3360 mboxes = ha->mcp->in_mb;
3361
9a853f71
AV		 3362 /* Load return mailbox registers. */
3363 ha->flags.mbox_int = 1;
3364 ha->mailbox_out[0] = mb0;
4fa94f83 3365 mboxes >>= 1;
7ffa5b93 3366 wptr = &reg->mailbox1;
9a853f71
AV		 3367
3368 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
4fa94f83 3369 if (mboxes & BIT_0)
04474d3a 3370 ha->mailbox_out[cnt] = rd_reg_word(wptr);
4fa94f83
AV		 3371
3372 mboxes >>= 1;
9a853f71
AV		 3373 wptr++;
3374 }
9a853f71
AV		 3375}
3376
4440e46d
AB		 3377static void
3378qla24xx_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
3379 struct abort_entry_24xx *pkt)
3380{
3381 const char func[] = "ABT_IOCB";
3382 srb_t *sp;
3383 struct srb_iocb *abt;
3384
3385 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
3386 if (!sp)
3387 return;
3388
3389 abt = &sp->u.iocb_cmd;
7ffa5b93 3390 abt->u.abt.comp_status = pkt->nport_handle;
25ff6af1 3391 sp->done(sp, 0);
4440e46d
AB		 3392}
3393
0f7e51f6 3394void qla24xx_nvme_ls4_iocb(struct scsi_qla_host *vha,
3395 struct pt_ls4_request *pkt, struct req_que *req)
e84067d7
DG		 3396{
3397 srb_t *sp;
3398 const char func[] = "LS4_IOCB";
3399 uint16_t comp_status;
3400
3401 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
3402 if (!sp)
3403 return;
3404
3405 comp_status = le16_to_cpu(pkt->status);
3406 sp->done(sp, comp_status);
3407}
3408
9a853f71
AV		 3409/**
3410 * qla24xx_process_response_queue() - Process response queue entries.
2db6228d
BVA		 3411 * @vha: SCSI driver HA context
3412 * @rsp: response queue
9a853f71 3413 */
2afa19a9
AC		 3414void qla24xx_process_response_queue(struct scsi_qla_host *vha,
3415 struct rsp_que *rsp)
9a853f71 3416{
9a853f71 3417 struct sts_entry_24xx *pkt;
a9083016 3418 struct qla_hw_data *ha = vha->hw;
9f2475fe 3419 struct purex_entry_24xx *purex_entry;
62e9dd17 3420 struct purex_item *pure_item;
9a853f71 3421
ec7193e2 3422 if (!ha->flags.fw_started)
9a853f71
AV		 3423 return;
3424
e326d22a
QT		 3425 if (rsp->qpair->cpuid != smp_processor_id())
3426 qla_cpu_update(rsp->qpair, smp_processor_id());
3427
e315cd28
AC		 3428 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
3429 pkt = (struct sts_entry_24xx *)rsp->ring_ptr;
9a853f71 3430
e315cd28
AC		 3431 rsp->ring_index++;
3432 if (rsp->ring_index == rsp->length) {
3433 rsp->ring_index = 0;
3434 rsp->ring_ptr = rsp->ring;
9a853f71 3435 } else {
e315cd28 3436 rsp->ring_ptr++;
9a853f71
AV		 3437 }
3438
3439 if (pkt->entry_status != 0) {
c5419e26 3440 if (qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt))
f83adb61 3441 goto process_err;
2d70c103 3442
9a853f71
AV		 3443 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
3444 wmb();
3445 continue;
3446 }
f83adb61 3447process_err:
9a853f71
AV		 3448
3449 switch (pkt->entry_type) {
3450 case STATUS_TYPE:
73208dfd 3451 qla2x00_status_entry(vha, rsp, pkt);
9a853f71
AV		 3452 break;
3453 case STATUS_CONT_TYPE:
2afa19a9 3454 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
9a853f71 3455 break;
2c3dfe3f 3456 case VP_RPT_ID_IOCB_TYPE:
e315cd28 3457 qla24xx_report_id_acquisition(vha,
2c3dfe3f
SJ		 3458 (struct vp_rpt_id_entry_24xx *)pkt);
3459 break;
ac280b67
AV		 3460 case LOGINOUT_PORT_IOCB_TYPE:
3461 qla24xx_logio_entry(vha, rsp->req,
3462 (struct logio_entry_24xx *)pkt);
3463 break;
f83adb61 3464 case CT_IOCB_TYPE:
9a069e19 3465 qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
9a069e19 3466 break;
f83adb61 3467 case ELS_IOCB_TYPE:
9a069e19
GM		 3468 qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE);
3469 break;
2d70c103 3470 case ABTS_RECV_24XX:
576bfde8 3471 if (qla_ini_mode_enabled(vha)) {
62e9dd17
SS		 3472 pure_item = qla24xx_copy_std_pkt(vha, pkt);
3473 if (!pure_item)
3474 break;
62e9dd17
SS		 3475 qla24xx_queue_purex_item(vha, pure_item,
3476 qla24xx_process_abts);
576bfde8
JC		 3477 break;
3478 }
ecc89f25
JC		 3479 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3480 IS_QLA28XX(ha)) {
2f424b9b 3481 /* ensure that the ATIO queue is empty */
82de802a
QT		 3482 qlt_handle_abts_recv(vha, rsp,
3483 (response_t *)pkt);
2f424b9b
QT		 3484 break;
3485 } else {
2f424b9b
QT		 3486 qlt_24xx_process_atio_queue(vha, 1);
3487 }
df561f66 3488 fallthrough;
2d70c103
NB		 3489 case ABTS_RESP_24XX:
3490 case CTIO_TYPE7:
f83adb61 3491 case CTIO_CRC2:
82de802a 3492 qlt_response_pkt_all_vps(vha, rsp, (response_t *)pkt);
2d70c103 3493 break;
e84067d7
DG		 3494 case PT_LS4_REQUEST:
3495 qla24xx_nvme_ls4_iocb(vha, (struct pt_ls4_request *)pkt,
3496 rsp->req);
3497 break;
726b8548
QT		 3498 case NOTIFY_ACK_TYPE:
3499 if (pkt->handle == QLA_TGT_SKIP_HANDLE)
82de802a
QT		 3500 qlt_response_pkt_all_vps(vha, rsp,
3501 (response_t *)pkt);
726b8548
QT		 3502 else
3503 qla24xxx_nack_iocb_entry(vha, rsp->req,
3504 (struct nack_to_isp *)pkt);
3505 break;
54883291
SK		 3506 case MARKER_TYPE:
3507 /* Do nothing in this case, this check is to prevent it
3508 * from falling into default case
3509 */
3510 break;
4440e46d
AB		 3511 case ABORT_IOCB_TYPE:
3512 qla24xx_abort_iocb_entry(vha, rsp->req,
3513 (struct abort_entry_24xx *)pkt);
3514 break;
726b8548
QT		 3515 case MBX_IOCB_TYPE:
3516 qla24xx_mbx_iocb_entry(vha, rsp->req,
3517 (struct mbx_24xx_entry *)pkt);
3518 break;
2853192e
QT		 3519 case VP_CTRL_IOCB_TYPE:
3520 qla_ctrlvp_completed(vha, rsp->req,
3521 (struct vp_ctrl_entry_24xx *)pkt);
3522 break;
d83a80ee 3523 case PUREX_IOCB_TYPE:
9f2475fe
SS		 3524 purex_entry = (void *)pkt;
3525 switch (purex_entry->els_frame_payload[3]) {
3526 case ELS_RDP:
3527 pure_item = qla24xx_copy_std_pkt(vha, pkt);
3528 if (!pure_item)
3529 break;
3530 qla24xx_queue_purex_item(vha, pure_item,
3531 qla24xx_process_purex_rdp);
576bfde8 3532 break;
9f2475fe
SS		 3533 case ELS_FPIN:
3534 if (!vha->hw->flags.scm_enabled) {
3535 ql_log(ql_log_warn, vha, 0x5094,
3536 "SCM not active for this port\n");
3537 break;
3538 }
3539 pure_item = qla27xx_copy_fpin_pkt(vha,
3540 (void **)&pkt, &rsp);
3541 if (!pure_item)
3542 break;
3543 qla24xx_queue_purex_item(vha, pure_item,
3544 qla27xx_process_purex_fpin);
62e9dd17
SS		 3545 break;
3546
9f2475fe
SS		 3547 default:
3548 ql_log(ql_log_warn, vha, 0x509c,
3549 "Discarding ELS Request opcode 0x%x\n",
3550 purex_entry->els_frame_payload[3]);
3551 }
d83a80ee 3552 break;
9a853f71
AV		 3553 default:
3554 /* Type Not Supported. */
7c3df132 3555 ql_dbg(ql_dbg_async, vha, 0x5042,
9f2475fe
SS		 3556 "Received unknown response pkt type 0x%x entry status=%x.\n",
3557 pkt->entry_type, pkt->entry_status);
9a853f71
AV		 3558 break;
3559 }
3560 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
3561 wmb();
3562 }
3563
3564 /* Adjust ring index */
7ec0effd 3565 if (IS_P3P_TYPE(ha)) {
a9083016 3566 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82;
bd432bb5 3567
04474d3a 3568 wrt_reg_dword(&reg->rsp_q_out[0], rsp->ring_index);
726b8548 3569 } else {
04474d3a 3570 wrt_reg_dword(rsp->rsp_q_out, rsp->ring_index);
726b8548 3571 }
9a853f71
AV		 3572}
3573
05236a05 3574static void
e315cd28 3575qla2xxx_check_risc_status(scsi_qla_host_t *vha)
05236a05
AV		 3576{
3577 int rval;
3578 uint32_t cnt;
e315cd28 3579 struct qla_hw_data *ha = vha->hw;
05236a05
AV		 3580 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3581
f73cb695 3582 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
ecc89f25 3583 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
05236a05
AV		 3584 return;
3585
3586 rval = QLA_SUCCESS;
04474d3a
BVA		 3587 wrt_reg_dword(&reg->iobase_addr, 0x7C00);
3588 rd_reg_dword(&reg->iobase_addr);
3589 wrt_reg_dword(&reg->iobase_window, 0x0001);
3590 for (cnt = 10000; (rd_reg_dword(&reg->iobase_window) & BIT_0) == 0 &&
05236a05
AV		 3591 rval == QLA_SUCCESS; cnt--) {
3592 if (cnt) {
04474d3a 3593 wrt_reg_dword(&reg->iobase_window, 0x0001);
05236a05
AV		 3594 udelay(10);
3595 } else
3596 rval = QLA_FUNCTION_TIMEOUT;
3597 }
3598 if (rval == QLA_SUCCESS)
3599 goto next_test;
3600
b2ec76c5 3601 rval = QLA_SUCCESS;
04474d3a
BVA		 3602 wrt_reg_dword(&reg->iobase_window, 0x0003);
3603 for (cnt = 100; (rd_reg_dword(&reg->iobase_window) & BIT_0) == 0 &&
05236a05
AV		 3604 rval == QLA_SUCCESS; cnt--) {
3605 if (cnt) {
04474d3a 3606 wrt_reg_dword(&reg->iobase_window, 0x0003);
05236a05
AV		 3607 udelay(10);
3608 } else
3609 rval = QLA_FUNCTION_TIMEOUT;
3610 }
3611 if (rval != QLA_SUCCESS)
3612 goto done;
3613
3614next_test:
04474d3a 3615 if (rd_reg_dword(&reg->iobase_c8) & BIT_3)
7c3df132
SK		 3616 ql_log(ql_log_info, vha, 0x504c,
3617 "Additional code -- 0x55AA.\n");
05236a05
AV		 3618
3619done:
04474d3a
BVA		 3620 wrt_reg_dword(&reg->iobase_window, 0x0000);
3621 rd_reg_dword(&reg->iobase_window);
05236a05
AV		 3622}
3623
9a853f71 3624/**
6246b8a1 3625 * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP24xx.
807eb907 3626 * @irq: interrupt number
9a853f71 3627 * @dev_id: SCSI driver HA context
9a853f71
AV		 3628 *
3629 * Called by system whenever the host adapter generates an interrupt.
3630 *
3631 * Returns handled flag.
3632 */
3633irqreturn_t
7d12e780 3634qla24xx_intr_handler(int irq, void *dev_id)
9a853f71 3635{
e315cd28
AC		 3636 scsi_qla_host_t *vha;
3637 struct qla_hw_data *ha;
9a853f71
AV		 3638 struct device_reg_24xx __iomem *reg;
3639 int status;
9a853f71
AV		 3640 unsigned long iter;
3641 uint32_t stat;
3642 uint32_t hccr;
7d613ac6 3643 uint16_t mb[8];
e315cd28 3644 struct rsp_que *rsp;
43fac4d9 3645 unsigned long flags;
1073daa4 3646 bool process_atio = false;
9a853f71 3647
e315cd28
AC		 3648 rsp = (struct rsp_que *) dev_id;
3649 if (!rsp) {
3256b435
CD		 3650 ql_log(ql_log_info, NULL, 0x5059,
3651 "%s: NULL response queue pointer.\n", __func__);
9a853f71
AV		 3652 return IRQ_NONE;
3653 }
3654
e315cd28 3655 ha = rsp->hw;
9a853f71
AV		 3656 reg = &ha->iobase->isp24;
3657 status = 0;
3658
85880801
AV		 3659 if (unlikely(pci_channel_offline(ha->pdev)))
3660 return IRQ_HANDLED;
3661
43fac4d9 3662 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 3663 vha = pci_get_drvdata(ha->pdev);
9a853f71 3664 for (iter = 50; iter--; ) {
04474d3a 3665 stat = rd_reg_dword(&reg->host_status);
c821e0d5 3666 if (qla2x00_check_reg32_for_disconnect(vha, stat))
f3ddac19 3667 break;
9a853f71 3668 if (stat & HSRX_RISC_PAUSED) {
85880801 3669 if (unlikely(pci_channel_offline(ha->pdev)))
14e660e6
SJ		 3670 break;
3671
04474d3a 3672 hccr = rd_reg_dword(&reg->hccr);
9a853f71 3673
7c3df132
SK		 3674 ql_log(ql_log_warn, vha, 0x504b,
3675 "RISC paused -- HCCR=%x, Dumping firmware.\n",
3676 hccr);
05236a05 3677
e315cd28 3678 qla2xxx_check_risc_status(vha);
05236a05 3679
8ae17876 3680 ha->isp_ops->fw_dump(vha);
e315cd28 3681 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
9a853f71
AV		 3682 break;
3683 } else if ((stat & HSRX_RISC_INT) == 0)
3684 break;
3685
3686 switch (stat & 0xff) {
fafbda9f
AE		 3687 case INTR_ROM_MB_SUCCESS:
3688 case INTR_ROM_MB_FAILED:
3689 case INTR_MB_SUCCESS:
3690 case INTR_MB_FAILED:
e315cd28 3691 qla24xx_mbx_completion(vha, MSW(stat));
9a853f71
AV		 3692 status |= MBX_INTERRUPT;
3693
3694 break;
fafbda9f 3695 case INTR_ASYNC_EVENT:
9a853f71 3696 mb[0] = MSW(stat);
04474d3a
BVA		 3697 mb[1] = rd_reg_word(&reg->mailbox1);
3698 mb[2] = rd_reg_word(&reg->mailbox2);
3699 mb[3] = rd_reg_word(&reg->mailbox3);
73208dfd 3700 qla2x00_async_event(vha, rsp, mb);
9a853f71 3701 break;
fafbda9f
AE		 3702 case INTR_RSP_QUE_UPDATE:
3703 case INTR_RSP_QUE_UPDATE_83XX:
2afa19a9 3704 qla24xx_process_response_queue(vha, rsp);
9a853f71 3705 break;
c9558869 3706 case INTR_ATIO_QUE_UPDATE_27XX:
1073daa4
QT		 3707 case INTR_ATIO_QUE_UPDATE:
3708 process_atio = true;
2d70c103 3709 break;
1073daa4
QT		 3710 case INTR_ATIO_RSP_QUE_UPDATE:
3711 process_atio = true;
2d70c103
NB		 3712 qla24xx_process_response_queue(vha, rsp);
3713 break;
9a853f71 3714 default:
7c3df132
SK		 3715 ql_dbg(ql_dbg_async, vha, 0x504f,
3716 "Unrecognized interrupt type (%d).\n", stat * 0xff);
9a853f71
AV		 3717 break;
3718 }
04474d3a
BVA		 3719 wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_INT);
3720 rd_reg_dword_relaxed(&reg->hccr);
cb860bbd
GM		 3721 if (unlikely(IS_QLA83XX(ha) && (ha->pdev->revision == 1)))
3722 ndelay(3500);
9a853f71 3723 }
36439832 3724 qla2x00_handle_mbx_completion(ha, status);
43fac4d9 3725 spin_unlock_irqrestore(&ha->hardware_lock, flags);
9a853f71 3726
1073daa4
QT		 3727 if (process_atio) {
3728 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
3729 qlt_24xx_process_atio_queue(vha, 0);
3730 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags);
3731 }
3732
9a853f71
AV		 3733 return IRQ_HANDLED;
3734}
3735
a8488abe
AV		 3736static irqreturn_t
3737qla24xx_msix_rsp_q(int irq, void *dev_id)
3738{
e315cd28
AC		 3739 struct qla_hw_data *ha;
3740 struct rsp_que *rsp;
a8488abe 3741 struct device_reg_24xx __iomem *reg;
2afa19a9 3742 struct scsi_qla_host *vha;
0f19bc68 3743 unsigned long flags;
a8488abe 3744
e315cd28
AC		 3745 rsp = (struct rsp_que *) dev_id;
3746 if (!rsp) {
3256b435
CD		 3747 ql_log(ql_log_info, NULL, 0x505a,
3748 "%s: NULL response queue pointer.\n", __func__);
e315cd28
AC		 3749 return IRQ_NONE;
3750 }
3751 ha = rsp->hw;
a8488abe
AV		 3752 reg = &ha->iobase->isp24;
3753
0f19bc68 3754 spin_lock_irqsave(&ha->hardware_lock, flags);
a8488abe 3755
a67093d4 3756 vha = pci_get_drvdata(ha->pdev);
2afa19a9 3757 qla24xx_process_response_queue(vha, rsp);
3155754a 3758 if (!ha->flags.disable_msix_handshake) {
04474d3a
BVA		 3759 wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_INT);
3760 rd_reg_dword_relaxed(&reg->hccr);
eb94114b 3761 }
0f19bc68 3762 spin_unlock_irqrestore(&ha->hardware_lock, flags);
a8488abe
AV		 3763
3764 return IRQ_HANDLED;
3765}
3766
3767static irqreturn_t
3768qla24xx_msix_default(int irq, void *dev_id)
3769{
e315cd28
AC		 3770 scsi_qla_host_t *vha;
3771 struct qla_hw_data *ha;
3772 struct rsp_que *rsp;
a8488abe
AV		 3773 struct device_reg_24xx __iomem *reg;
3774 int status;
a8488abe
AV		 3775 uint32_t stat;
3776 uint32_t hccr;
7d613ac6 3777 uint16_t mb[8];
0f19bc68 3778 unsigned long flags;
1073daa4 3779 bool process_atio = false;
a8488abe 3780
e315cd28
AC		 3781 rsp = (struct rsp_que *) dev_id;
3782 if (!rsp) {
3256b435
CD		 3783 ql_log(ql_log_info, NULL, 0x505c,
3784 "%s: NULL response queue pointer.\n", __func__);
e315cd28
AC		 3785 return IRQ_NONE;
3786 }
3787 ha = rsp->hw;
a8488abe
AV		 3788 reg = &ha->iobase->isp24;
3789 status = 0;
3790
0f19bc68 3791 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 3792 vha = pci_get_drvdata(ha->pdev);
87f27015 3793 do {
04474d3a 3794 stat = rd_reg_dword(&reg->host_status);
c821e0d5 3795 if (qla2x00_check_reg32_for_disconnect(vha, stat))
f3ddac19 3796 break;
a8488abe 3797 if (stat & HSRX_RISC_PAUSED) {
85880801 3798 if (unlikely(pci_channel_offline(ha->pdev)))
14e660e6
SJ		 3799 break;
3800
04474d3a 3801 hccr = rd_reg_dword(&reg->hccr);
a8488abe 3802
7c3df132
SK		 3803 ql_log(ql_log_info, vha, 0x5050,
3804 "RISC paused -- HCCR=%x, Dumping firmware.\n",
3805 hccr);
05236a05 3806
e315cd28 3807 qla2xxx_check_risc_status(vha);
05236a05 3808
8ae17876 3809 ha->isp_ops->fw_dump(vha);
e315cd28 3810 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
a8488abe
AV		 3811 break;
3812 } else if ((stat & HSRX_RISC_INT) == 0)
3813 break;
3814
3815 switch (stat & 0xff) {
fafbda9f
AE		 3816 case INTR_ROM_MB_SUCCESS:
3817 case INTR_ROM_MB_FAILED:
3818 case INTR_MB_SUCCESS:
3819 case INTR_MB_FAILED:
e315cd28 3820 qla24xx_mbx_completion(vha, MSW(stat));
a8488abe
AV		 3821 status |= MBX_INTERRUPT;
3822
3823 break;
fafbda9f 3824 case INTR_ASYNC_EVENT:
a8488abe 3825 mb[0] = MSW(stat);
04474d3a
BVA		 3826 mb[1] = rd_reg_word(&reg->mailbox1);
3827 mb[2] = rd_reg_word(&reg->mailbox2);
3828 mb[3] = rd_reg_word(&reg->mailbox3);
73208dfd 3829 qla2x00_async_event(vha, rsp, mb);
a8488abe 3830 break;
fafbda9f
AE		 3831 case INTR_RSP_QUE_UPDATE:
3832 case INTR_RSP_QUE_UPDATE_83XX:
2afa19a9 3833 qla24xx_process_response_queue(vha, rsp);
a8488abe 3834 break;
c9558869 3835 case INTR_ATIO_QUE_UPDATE_27XX:
1073daa4
QT		 3836 case INTR_ATIO_QUE_UPDATE:
3837 process_atio = true;
2d70c103 3838 break;
1073daa4
QT		 3839 case INTR_ATIO_RSP_QUE_UPDATE:
3840 process_atio = true;
2d70c103
NB		 3841 qla24xx_process_response_queue(vha, rsp);
3842 break;
a8488abe 3843 default:
7c3df132
SK		 3844 ql_dbg(ql_dbg_async, vha, 0x5051,
3845 "Unrecognized interrupt type (%d).\n", stat & 0xff);
a8488abe
AV		 3846 break;
3847 }
04474d3a 3848 wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_INT);
87f27015 3849 } while (0);
36439832 3850 qla2x00_handle_mbx_completion(ha, status);
0f19bc68 3851 spin_unlock_irqrestore(&ha->hardware_lock, flags);
a8488abe 3852
1073daa4
QT		 3853 if (process_atio) {
3854 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
3855 qlt_24xx_process_atio_queue(vha, 0);
3856 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags);
3857 }
3858
a8488abe
AV		 3859 return IRQ_HANDLED;
3860}
3861
d7459527
MH		 3862irqreturn_t
3863qla2xxx_msix_rsp_q(int irq, void *dev_id)
7b2a7396
AV		 3864{
3865 struct qla_hw_data *ha;
3866 struct qla_qpair *qpair;
3867
3868 qpair = dev_id;
3869 if (!qpair) {
3870 ql_log(ql_log_info, NULL, 0x505b,
3871 "%s: NULL response queue pointer.\n", __func__);
3872 return IRQ_NONE;
3873 }
3874 ha = qpair->hw;
3875
3876 queue_work(ha->wq, &qpair->q_work);
3877
3878 return IRQ_HANDLED;
3879}
3880
3881irqreturn_t
3882qla2xxx_msix_rsp_q_hs(int irq, void *dev_id)
d7459527
MH		 3883{
3884 struct qla_hw_data *ha;
3885 struct qla_qpair *qpair;
3886 struct device_reg_24xx __iomem *reg;
3887 unsigned long flags;
3888
3889 qpair = dev_id;
3890 if (!qpair) {
3891 ql_log(ql_log_info, NULL, 0x505b,
3892 "%s: NULL response queue pointer.\n", __func__);
3893 return IRQ_NONE;
3894 }
3895 ha = qpair->hw;
3896
7b2a7396
AV		 3897 reg = &ha->iobase->isp24;
3898 spin_lock_irqsave(&ha->hardware_lock, flags);
04474d3a 3899 wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_INT);
7b2a7396 3900 spin_unlock_irqrestore(&ha->hardware_lock, flags);
d7459527
MH		 3901
3902 queue_work(ha->wq, &qpair->q_work);
3903
3904 return IRQ_HANDLED;
3905}
3906
a8488abe
AV		 3907/* Interrupt handling helpers. */
3908
3909struct qla_init_msix_entry {
a8488abe 3910 const char *name;
476834c2 3911 irq_handler_t handler;
a8488abe
AV		 3912};
3913
44a8f954 3914static const struct qla_init_msix_entry msix_entries[] = {
e326d22a
QT		 3915 { "default", qla24xx_msix_default },
3916 { "rsp_q", qla24xx_msix_rsp_q },
3917 { "atio_q", qla83xx_msix_atio_q },
3918 { "qpair_multiq", qla2xxx_msix_rsp_q },
7b2a7396 3919 { "qpair_multiq_hs", qla2xxx_msix_rsp_q_hs },
a8488abe
AV		 3920};
3921
44a8f954 3922static const struct qla_init_msix_entry qla82xx_msix_entries[] = {
a9083016
GM		 3923 { "qla2xxx (default)", qla82xx_msix_default },
3924 { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q },
3925};
3926
a8488abe 3927static int
73208dfd 3928qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
a8488abe
AV		 3929{
3930 int i, ret;
a8488abe 3931 struct qla_msix_entry *qentry;
7c3df132 3932 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
67f2db87 3933 int min_vecs = QLA_BASE_VECTORS;
17e5fc58
CH		 3934 struct irq_affinity desc = {
3935 .pre_vectors = QLA_BASE_VECTORS,
3936 };
3937
c9558869
HM		 3938 if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) &&
3939 IS_ATIO_MSIX_CAPABLE(ha)) {
17e5fc58 3940 desc.pre_vectors++;
67f2db87
MH		 3941 min_vecs++;
3942 }
17e5fc58 3943
f3e02695 3944 if (USER_CTRL_IRQ(ha) || !ha->mqiobase) {
09620eeb
QT		 3945 /* user wants to control IRQ setting for target mode */
3946 ret = pci_alloc_irq_vectors(ha->pdev, min_vecs,
3947 ha->msix_count, PCI_IRQ_MSIX);
3948 } else
3949 ret = pci_alloc_irq_vectors_affinity(ha->pdev, min_vecs,
3950 ha->msix_count, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY,
3951 &desc);
73208dfd 3952
84e32a06
AG		 3953 if (ret < 0) {
3954 ql_log(ql_log_fatal, vha, 0x00c7,
3955 "MSI-X: Failed to enable support, "
3956 "giving up -- %d/%d.\n",
3957 ha->msix_count, ret);
3958 goto msix_out;
3959 } else if (ret < ha->msix_count) {
da48b824
HM		 3960 ql_log(ql_log_info, vha, 0x00c6,
3961 "MSI-X: Using %d vectors\n", ret);
cb43285f 3962 ha->msix_count = ret;
d7459527 3963 /* Recalculate queue values */
c38d1baf 3964 if (ha->mqiobase && (ql2xmqsupport || ql2xnvmeenable)) {
d7459527
MH		 3965 ha->max_req_queues = ha->msix_count - 1;
3966
3967 /* ATIOQ needs 1 vector. That's 1 less QPair */
3968 if (QLA_TGT_MODE_ENABLED())
3969 ha->max_req_queues--;
3970
3971 ha->max_rsp_queues = ha->max_req_queues;
3972
3973 ha->max_qpairs = ha->max_req_queues - 1;
3974 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0190,
3975 "Adjusted Max no of queues pairs: %d.\n", ha->max_qpairs);
3976 }
73208dfd 3977 }
f0783d43 3978 vha->irq_offset = desc.pre_vectors;
6396bb22
KC		 3979 ha->msix_entries = kcalloc(ha->msix_count,
3980 sizeof(struct qla_msix_entry),
3981 GFP_KERNEL);
73208dfd 3982 if (!ha->msix_entries) {
7c3df132
SK		 3983 ql_log(ql_log_fatal, vha, 0x00c8,
3984 "Failed to allocate memory for ha->msix_entries.\n");
73208dfd 3985 ret = -ENOMEM;
24afabdb 3986 goto free_irqs;
a8488abe
AV		 3987 }
3988 ha->flags.msix_enabled = 1;
3989
73208dfd
AC		 3990 for (i = 0; i < ha->msix_count; i++) {
3991 qentry = &ha->msix_entries[i];
4fa18345
MH		 3992 qentry->vector = pci_irq_vector(ha->pdev, i);
3993 qentry->entry = i;
a8488abe 3994 qentry->have_irq = 0;
d7459527 3995 qentry->in_use = 0;
4fa18345 3996 qentry->handle = NULL;
a8488abe
AV		 3997 }
3998
2afa19a9 3999 /* Enable MSI-X vectors for the base queue */
17e5fc58 4000 for (i = 0; i < QLA_BASE_VECTORS; i++) {
2afa19a9 4001 qentry = &ha->msix_entries[i];
4fa18345 4002 qentry->handle = rsp;
ef8d1d51 4003 rsp->msix = qentry;
d7459527 4004 scnprintf(qentry->name, sizeof(qentry->name),
e326d22a 4005 "qla2xxx%lu_%s", vha->host_no, msix_entries[i].name);
f324777e 4006 if (IS_P3P_TYPE(ha))
a9083016
GM		 4007 ret = request_irq(qentry->vector,
4008 qla82xx_msix_entries[i].handler,
4009 0, qla82xx_msix_entries[i].name, rsp);
f324777e 4010 else
a9083016
GM		 4011 ret = request_irq(qentry->vector,
4012 msix_entries[i].handler,
e326d22a 4013 0, qentry->name, rsp);
f324777e
CD		 4014 if (ret)
4015 goto msix_register_fail;
4016 qentry->have_irq = 1;
093df737 4017 qentry->in_use = 1;
f324777e
CD		 4018 }
4019
4020 /*
4021 * If target mode is enable, also request the vector for the ATIO
4022 * queue.
4023 */
c9558869
HM		 4024 if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) &&
4025 IS_ATIO_MSIX_CAPABLE(ha)) {
093df737 4026 qentry = &ha->msix_entries[QLA_ATIO_VECTOR];
ef8d1d51 4027 rsp->msix = qentry;
d7459527
MH		 4028 qentry->handle = rsp;
4029 scnprintf(qentry->name, sizeof(qentry->name),
e326d22a
QT		 4030 "qla2xxx%lu_%s", vha->host_no,
4031 msix_entries[QLA_ATIO_VECTOR].name);
093df737 4032 qentry->in_use = 1;
f324777e 4033 ret = request_irq(qentry->vector,
093df737 4034 msix_entries[QLA_ATIO_VECTOR].handler,
e326d22a 4035 0, qentry->name, rsp);
2afa19a9 4036 qentry->have_irq = 1;
73208dfd 4037 }
73208dfd 4038
f324777e
CD		 4039msix_register_fail:
4040 if (ret) {
4041 ql_log(ql_log_fatal, vha, 0x00cb,
4042 "MSI-X: unable to register handler -- %x/%d.\n",
4043 qentry->vector, ret);
4fa18345 4044 qla2x00_free_irqs(vha);
f324777e
CD		 4045 ha->mqenable = 0;
4046 goto msix_out;
4047 }
4048
73208dfd 4049 /* Enable MSI-X vector for response queue update for queue 0 */
ecc89f25 4050 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
6246b8a1 4051 if (ha->msixbase && ha->mqiobase &&
d7459527
MH		 4052 (ha->max_rsp_queues > 1 || ha->max_req_queues > 1 ||
4053 ql2xmqsupport))
6246b8a1
GM		 4054 ha->mqenable = 1;
4055 } else
d7459527
MH		 4056 if (ha->mqiobase &&
4057 (ha->max_rsp_queues > 1 || ha->max_req_queues > 1 ||
4058 ql2xmqsupport))
6246b8a1 4059 ha->mqenable = 1;
7c3df132
SK		 4060 ql_dbg(ql_dbg_multiq, vha, 0xc005,
4061 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
4062 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
4063 ql_dbg(ql_dbg_init, vha, 0x0055,
4064 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
4065 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
73208dfd 4066
a8488abe
AV		 4067msix_out:
4068 return ret;
24afabdb
BVA		 4069
4070free_irqs:
4071 pci_free_irq_vectors(ha->pdev);
4072 goto msix_out;
a8488abe
AV		 4073}
4074
4075int
73208dfd 4076qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp)
a8488abe 4077{
7fa3e239 4078 int ret = QLA_FUNCTION_FAILED;
f73cb695 4079 device_reg_t *reg = ha->iobase;
7c3df132 4080 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
a8488abe
AV		 4081
4082 /* If possible, enable MSI-X. */
e7240af5
HM		 4083 if (ql2xenablemsix == 0 || (!IS_QLA2432(ha) && !IS_QLA2532(ha) &&
4084 !IS_QLA8432(ha) && !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha) &&
ecc89f25 4085 !IS_QLAFX00(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha)))
6377a7ae
BH		 4086 goto skip_msi;
4087
e7240af5
HM		 4088 if (ql2xenablemsix == 2)
4089 goto skip_msix;
4090
6377a7ae
BH		 4091 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
4092 (ha->pdev->subsystem_device == 0x7040 ||
4093 ha->pdev->subsystem_device == 0x7041 ||
4094 ha->pdev->subsystem_device == 0x1705)) {
7c3df132
SK		 4095 ql_log(ql_log_warn, vha, 0x0034,
4096 "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n",
6377a7ae 4097 ha->pdev->subsystem_vendor,
7c3df132 4098 ha->pdev->subsystem_device);
6377a7ae
BH		 4099 goto skip_msi;
4100 }
a8488abe 4101
42cd4f5d 4102 if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) {
7c3df132
SK		 4103 ql_log(ql_log_warn, vha, 0x0035,
4104 "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n",
42cd4f5d 4105 ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX);
a8488abe
AV		 4106 goto skip_msix;
4107 }
4108
73208dfd 4109 ret = qla24xx_enable_msix(ha, rsp);
a8488abe 4110 if (!ret) {
7c3df132
SK		 4111 ql_dbg(ql_dbg_init, vha, 0x0036,
4112 "MSI-X: Enabled (0x%X, 0x%X).\n",
4113 ha->chip_revision, ha->fw_attributes);
963b0fdd 4114 goto clear_risc_ints;
a8488abe 4115 }
7fa3e239 4116
a8488abe 4117skip_msix:
cbedb601 4118
7fa3e239 4119 ql_log(ql_log_info, vha, 0x0037,
45dc8f2d 4120 "Falling back-to MSI mode -- ret=%d.\n", ret);
7fa3e239 4121
3a03eb79 4122 if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) &&
f73cb695 4123 !IS_QLA8001(ha) && !IS_P3P_TYPE(ha) && !IS_QLAFX00(ha) &&
ecc89f25 4124 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
cbedb601
AV		 4125 goto skip_msi;
4126
4fa18345 4127 ret = pci_alloc_irq_vectors(ha->pdev, 1, 1, PCI_IRQ_MSI);
45dc8f2d 4128 if (ret > 0) {
7c3df132
SK		 4129 ql_dbg(ql_dbg_init, vha, 0x0038,
4130 "MSI: Enabled.\n");
cbedb601 4131 ha->flags.msi_enabled = 1;
a9083016 4132 } else
7c3df132 4133 ql_log(ql_log_warn, vha, 0x0039,
45dc8f2d 4134 "Falling back-to INTa mode -- ret=%d.\n", ret);
7fa3e239 4135skip_msi:
a033b655
GM		 4136
4137 /* Skip INTx on ISP82xx. */
4138 if (!ha->flags.msi_enabled && IS_QLA82XX(ha))
4139 return QLA_FUNCTION_FAILED;
4140
fd34f556 4141 ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler,
7992abfc
MH		 4142 ha->flags.msi_enabled ? 0 : IRQF_SHARED,
4143 QLA2XXX_DRIVER_NAME, rsp);
963b0fdd 4144 if (ret) {
7c3df132 4145 ql_log(ql_log_warn, vha, 0x003a,
a8488abe
AV		 4146 "Failed to reserve interrupt %d already in use.\n",
4147 ha->pdev->irq);
963b0fdd 4148 goto fail;
8ae6d9c7 4149 } else if (!ha->flags.msi_enabled) {
68d91cbd
SK		 4150 ql_dbg(ql_dbg_init, vha, 0x0125,
4151 "INTa mode: Enabled.\n");
8ae6d9c7
GM		 4152 ha->flags.mr_intr_valid = 1;
4153 }
7992abfc 4154
963b0fdd 4155clear_risc_ints:
4bb2efc4
JC		 4156 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
4157 goto fail;
963b0fdd 4158
c6952483 4159 spin_lock_irq(&ha->hardware_lock);
04474d3a 4160 wrt_reg_word(&reg->isp.semaphore, 0);
c6952483 4161 spin_unlock_irq(&ha->hardware_lock);
a8488abe 4162
963b0fdd 4163fail:
a8488abe
AV		 4164 return ret;
4165}
4166
4167void
e315cd28 4168qla2x00_free_irqs(scsi_qla_host_t *vha)
a8488abe 4169{
e315cd28 4170 struct qla_hw_data *ha = vha->hw;
9a347ff4 4171 struct rsp_que *rsp;
4fa18345
MH		 4172 struct qla_msix_entry *qentry;
4173 int i;
9a347ff4
CD		 4174
4175 /*
4176 * We need to check that ha->rsp_q_map is valid in case we are called
4177 * from a probe failure context.
4178 */
4179 if (!ha->rsp_q_map || !ha->rsp_q_map[0])
27873de9 4180 goto free_irqs;
9a347ff4 4181 rsp = ha->rsp_q_map[0];
a8488abe 4182
4fa18345
MH		 4183 if (ha->flags.msix_enabled) {
4184 for (i = 0; i < ha->msix_count; i++) {
4185 qentry = &ha->msix_entries[i];
4186 if (qentry->have_irq) {
4187 irq_set_affinity_notifier(qentry->vector, NULL);
4188 free_irq(pci_irq_vector(ha->pdev, i), qentry->handle);
4189 }
4190 }
4191 kfree(ha->msix_entries);
4192 ha->msix_entries = NULL;
4193 ha->flags.msix_enabled = 0;
4194 ql_dbg(ql_dbg_init, vha, 0x0042,
4195 "Disabled MSI-X.\n");
4196 } else {
4197 free_irq(pci_irq_vector(ha->pdev, 0), rsp);
4198 }
e315cd28 4199
27873de9 4200free_irqs:
4fa18345 4201 pci_free_irq_vectors(ha->pdev);
a8488abe 4202}
73208dfd 4203
d7459527
MH		 4204int qla25xx_request_irq(struct qla_hw_data *ha, struct qla_qpair *qpair,
4205 struct qla_msix_entry *msix, int vector_type)
73208dfd 4206{
44a8f954 4207 const struct qla_init_msix_entry *intr = &msix_entries[vector_type];
7c3df132 4208 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
73208dfd
AC		 4209 int ret;
4210
d7459527
MH		 4211 scnprintf(msix->name, sizeof(msix->name),
4212 "qla2xxx%lu_qpair%d", vha->host_no, qpair->id);
4213 ret = request_irq(msix->vector, intr->handler, 0, msix->name, qpair);
73208dfd 4214 if (ret) {
7c3df132
SK		 4215 ql_log(ql_log_fatal, vha, 0x00e6,
4216 "MSI-X: Unable to register handler -- %x/%d.\n",
4217 msix->vector, ret);
73208dfd
AC		 4218 return ret;
4219 }
4220 msix->have_irq = 1;
d7459527 4221 msix->handle = qpair;
73208dfd
AC		 4222 return ret;
4223}
Linux 6.x block layer and io_uring tree(s)