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Merge tag 'mips_5.2_2' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
[linux-2.6-block.git] / drivers / scsi / qla2xxx / qla_isr.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
bd21eaf9 3 * Copyright (c) 2003-2014 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT		 6 */
7#include "qla_def.h"
2d70c103 8#include "qla_target.h"
1da177e4 9
05236a05 10#include <linux/delay.h>
5a0e3ad6 11#include <linux/slab.h>
e326d22a 12#include <linux/cpu.h>
09ce66ae 13#include <linux/t10-pi.h>
df7baa50 14#include <scsi/scsi_tcq.h>
9a069e19 15#include <scsi/scsi_bsg_fc.h>
bad75002 16#include <scsi/scsi_eh.h>
d32041ec
JT		 17#include <scsi/fc/fc_fs.h>
18#include <linux/nvme-fc-driver.h>
df7baa50 19
1da177e4 20static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t);
73208dfd 21static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *);
2afa19a9 22static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *);
c5419e26 23static int qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *,
73208dfd 24 sts_entry_t *);
9a853f71 25
c4dc7cd3
BVA		 26const char *const port_state_str[] = {
27 "Unknown",
28 "UNCONFIGURED",
29 "DEAD",
30 "LOST",
31 "ONLINE"
32};
33
1da177e4
LT		 34/**
35 * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200.
807eb907 36 * @irq: interrupt number
1da177e4 37 * @dev_id: SCSI driver HA context
1da177e4
LT		 38 *
39 * Called by system whenever the host adapter generates an interrupt.
40 *
41 * Returns handled flag.
42 */
43irqreturn_t
7d12e780 44qla2100_intr_handler(int irq, void *dev_id)
1da177e4 45{
e315cd28
AC		 46 scsi_qla_host_t *vha;
47 struct qla_hw_data *ha;
3d71644c 48 struct device_reg_2xxx __iomem *reg;
1da177e4 49 int status;
1da177e4 50 unsigned long iter;
14e660e6 51 uint16_t hccr;
0a59cea4 52 uint16_t mb[8];
e315cd28 53 struct rsp_que *rsp;
43fac4d9 54 unsigned long flags;
1da177e4 55
e315cd28
AC		 56 rsp = (struct rsp_que *) dev_id;
57 if (!rsp) {
3256b435
CD		 58 ql_log(ql_log_info, NULL, 0x505d,
59 "%s: NULL response queue pointer.\n", __func__);
1da177e4
LT		 60 return (IRQ_NONE);
61 }
62
e315cd28 63 ha = rsp->hw;
3d71644c 64 reg = &ha->iobase->isp;
1da177e4
LT		 65 status = 0;
66
43fac4d9 67 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 68 vha = pci_get_drvdata(ha->pdev);
1da177e4 69 for (iter = 50; iter--; ) {
14e660e6 70 hccr = RD_REG_WORD(&reg->hccr);
c821e0d5 71 if (qla2x00_check_reg16_for_disconnect(vha, hccr))
f3ddac19 72 break;
14e660e6
SJ		 73 if (hccr & HCCR_RISC_PAUSE) {
74 if (pci_channel_offline(ha->pdev))
75 break;
76
77 /*
78 * Issue a "HARD" reset in order for the RISC interrupt
a06a0f8e 79 * bit to be cleared. Schedule a big hammer to get
14e660e6
SJ		 80 * out of the RISC PAUSED state.
81 */
82 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
83 RD_REG_WORD(&reg->hccr);
84
e315cd28
AC		 85 ha->isp_ops->fw_dump(vha, 1);
86 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
14e660e6
SJ		 87 break;
88 } else if ((RD_REG_WORD(&reg->istatus) & ISR_RISC_INT) == 0)
1da177e4
LT		 89 break;
90
91 if (RD_REG_WORD(&reg->semaphore) & BIT_0) {
92 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
93 RD_REG_WORD(&reg->hccr);
94
95 /* Get mailbox data. */
9a853f71
AV		 96 mb[0] = RD_MAILBOX_REG(ha, reg, 0);
97 if (mb[0] > 0x3fff && mb[0] < 0x8000) {
e315cd28 98 qla2x00_mbx_completion(vha, mb[0]);
1da177e4 99 status |= MBX_INTERRUPT;
9a853f71
AV		 100 } else if (mb[0] > 0x7fff && mb[0] < 0xc000) {
101 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
102 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
103 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
73208dfd 104 qla2x00_async_event(vha, rsp, mb);
1da177e4
LT		 105 } else {
106 /*EMPTY*/
7c3df132
SK		 107 ql_dbg(ql_dbg_async, vha, 0x5025,
108 "Unrecognized interrupt type (%d).\n",
109 mb[0]);
1da177e4
LT		 110 }
111 /* Release mailbox registers. */
112 WRT_REG_WORD(&reg->semaphore, 0);
113 RD_REG_WORD(&reg->semaphore);
114 } else {
73208dfd 115 qla2x00_process_response_queue(rsp);
1da177e4
LT		 116
117 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
118 RD_REG_WORD(&reg->hccr);
119 }
120 }
36439832 121 qla2x00_handle_mbx_completion(ha, status);
43fac4d9 122 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1da177e4 123
1da177e4
LT		 124 return (IRQ_HANDLED);
125}
126
f3ddac19 127bool
c821e0d5 128qla2x00_check_reg32_for_disconnect(scsi_qla_host_t *vha, uint32_t reg)
f3ddac19
CD		 129{
130 /* Check for PCI disconnection */
a30c2a3b 131 if (reg == 0xffffffff && !pci_channel_offline(vha->hw->pdev)) {
beb9e315 132 if (!test_and_set_bit(PFLG_DISCONNECTED, &vha->pci_flags) &&
6b383979
JL		 133 !test_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags) &&
134 !test_bit(PFLG_DRIVER_PROBING, &vha->pci_flags)) {
232792b6
JL		 135 /*
136 * Schedule this (only once) on the default system
137 * workqueue so that all the adapter workqueues and the
138 * DPC thread can be shutdown cleanly.
139 */
140 schedule_work(&vha->hw->board_disable);
141 }
f3ddac19
CD		 142 return true;
143 } else
144 return false;
145}
146
c821e0d5
JL		 147bool
148qla2x00_check_reg16_for_disconnect(scsi_qla_host_t *vha, uint16_t reg)
149{
150 return qla2x00_check_reg32_for_disconnect(vha, 0xffff0000 | reg);
151}
152
1da177e4
LT		 153/**
154 * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx.
807eb907 155 * @irq: interrupt number
1da177e4 156 * @dev_id: SCSI driver HA context
1da177e4
LT		 157 *
158 * Called by system whenever the host adapter generates an interrupt.
159 *
160 * Returns handled flag.
161 */
162irqreturn_t
7d12e780 163qla2300_intr_handler(int irq, void *dev_id)
1da177e4 164{
e315cd28 165 scsi_qla_host_t *vha;
3d71644c 166 struct device_reg_2xxx __iomem *reg;
1da177e4 167 int status;
1da177e4
LT		 168 unsigned long iter;
169 uint32_t stat;
1da177e4 170 uint16_t hccr;
0a59cea4 171 uint16_t mb[8];
e315cd28
AC		 172 struct rsp_que *rsp;
173 struct qla_hw_data *ha;
43fac4d9 174 unsigned long flags;
1da177e4 175
e315cd28
AC		 176 rsp = (struct rsp_que *) dev_id;
177 if (!rsp) {
3256b435
CD		 178 ql_log(ql_log_info, NULL, 0x5058,
179 "%s: NULL response queue pointer.\n", __func__);
1da177e4
LT		 180 return (IRQ_NONE);
181 }
182
e315cd28 183 ha = rsp->hw;
3d71644c 184 reg = &ha->iobase->isp;
1da177e4
LT		 185 status = 0;
186
43fac4d9 187 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 188 vha = pci_get_drvdata(ha->pdev);
1da177e4
LT		 189 for (iter = 50; iter--; ) {
190 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
c821e0d5 191 if (qla2x00_check_reg32_for_disconnect(vha, stat))
f3ddac19 192 break;
1da177e4 193 if (stat & HSR_RISC_PAUSED) {
85880801 194 if (unlikely(pci_channel_offline(ha->pdev)))
14e660e6
SJ		 195 break;
196
1da177e4 197 hccr = RD_REG_WORD(&reg->hccr);
f3ddac19 198
1da177e4 199 if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8))
7c3df132
SK		 200 ql_log(ql_log_warn, vha, 0x5026,
201 "Parity error -- HCCR=%x, Dumping "
202 "firmware.\n", hccr);
1da177e4 203 else
7c3df132
SK		 204 ql_log(ql_log_warn, vha, 0x5027,
205 "RISC paused -- HCCR=%x, Dumping "
206 "firmware.\n", hccr);
1da177e4
LT		 207
208 /*
209 * Issue a "HARD" reset in order for the RISC
210 * interrupt bit to be cleared. Schedule a big
a06a0f8e 211 * hammer to get out of the RISC PAUSED state.
1da177e4
LT		 212 */
213 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
214 RD_REG_WORD(&reg->hccr);
07f31805 215
e315cd28
AC		 216 ha->isp_ops->fw_dump(vha, 1);
217 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 218 break;
219 } else if ((stat & HSR_RISC_INT) == 0)
220 break;
221
1da177e4 222 switch (stat & 0xff) {
1da177e4
LT		 223 case 0x1:
224 case 0x2:
225 case 0x10:
226 case 0x11:
e315cd28 227 qla2x00_mbx_completion(vha, MSW(stat));
1da177e4
LT		 228 status |= MBX_INTERRUPT;
229
230 /* Release mailbox registers. */
231 WRT_REG_WORD(&reg->semaphore, 0);
232 break;
233 case 0x12:
9a853f71
AV		 234 mb[0] = MSW(stat);
235 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
236 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
237 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
73208dfd 238 qla2x00_async_event(vha, rsp, mb);
9a853f71
AV		 239 break;
240 case 0x13:
73208dfd 241 qla2x00_process_response_queue(rsp);
1da177e4
LT		 242 break;
243 case 0x15:
9a853f71
AV		 244 mb[0] = MBA_CMPLT_1_16BIT;
245 mb[1] = MSW(stat);
73208dfd 246 qla2x00_async_event(vha, rsp, mb);
1da177e4
LT		 247 break;
248 case 0x16:
9a853f71
AV		 249 mb[0] = MBA_SCSI_COMPLETION;
250 mb[1] = MSW(stat);
251 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
73208dfd 252 qla2x00_async_event(vha, rsp, mb);
1da177e4
LT		 253 break;
254 default:
7c3df132
SK		 255 ql_dbg(ql_dbg_async, vha, 0x5028,
256 "Unrecognized interrupt type (%d).\n", stat & 0xff);
1da177e4
LT		 257 break;
258 }
259 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
260 RD_REG_WORD_RELAXED(&reg->hccr);
261 }
36439832 262 qla2x00_handle_mbx_completion(ha, status);
43fac4d9 263 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1da177e4 264
1da177e4
LT		 265 return (IRQ_HANDLED);
266}
267
268/**
269 * qla2x00_mbx_completion() - Process mailbox command completions.
2db6228d 270 * @vha: SCSI driver HA context
1da177e4
LT		 271 * @mb0: Mailbox0 register
272 */
273static void
e315cd28 274qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
1da177e4
LT		 275{
276 uint16_t cnt;
4fa94f83 277 uint32_t mboxes;
1da177e4 278 uint16_t __iomem *wptr;
e315cd28 279 struct qla_hw_data *ha = vha->hw;
3d71644c 280 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 281
4fa94f83 282 /* Read all mbox registers? */
c02189e1
BVA		 283 WARN_ON_ONCE(ha->mbx_count > 32);
284 mboxes = (1ULL << ha->mbx_count) - 1;
4fa94f83 285 if (!ha->mcp)
a720101d 286 ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERROR.\n");
4fa94f83
AV		 287 else
288 mboxes = ha->mcp->in_mb;
289
1da177e4
LT		 290 /* Load return mailbox registers. */
291 ha->flags.mbox_int = 1;
292 ha->mailbox_out[0] = mb0;
4fa94f83 293 mboxes >>= 1;
1da177e4
LT		 294 wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 1);
295
296 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
fa2a1ce5 297 if (IS_QLA2200(ha) && cnt == 8)
1da177e4 298 wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 8);
4fa94f83 299 if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0))
1da177e4 300 ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr);
4fa94f83 301 else if (mboxes & BIT_0)
1da177e4 302 ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
fa2a1ce5 303
1da177e4 304 wptr++;
4fa94f83 305 mboxes >>= 1;
1da177e4 306 }
1da177e4
LT		 307}
308
8a659571
AV		 309static void
310qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr)
311{
312 static char *event[] =
313 { "Complete", "Request Notification", "Time Extension" };
314 int rval;
315 struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24;
9e5054ec 316 struct device_reg_82xx __iomem *reg82 = &vha->hw->iobase->isp82;
8a659571
AV		 317 uint16_t __iomem *wptr;
318 uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS];
319
320 /* Seed data -- mailbox1 -> mailbox7. */
9e5054ec
CD		 321 if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw))
322 wptr = (uint16_t __iomem *)&reg24->mailbox1;
323 else if (IS_QLA8044(vha->hw))
324 wptr = (uint16_t __iomem *)&reg82->mailbox_out[1];
325 else
326 return;
327
8a659571
AV		 328 for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++)
329 mb[cnt] = RD_REG_WORD(wptr);
330
7c3df132 331 ql_dbg(ql_dbg_async, vha, 0x5021,
6246b8a1 332 "Inter-Driver Communication %s -- "
7c3df132
SK		 333 "%04x %04x %04x %04x %04x %04x %04x.\n",
334 event[aen & 0xff], mb[0], mb[1], mb[2], mb[3],
335 mb[4], mb[5], mb[6]);
454073c9
SV		 336 switch (aen) {
337 /* Handle IDC Error completion case. */
338 case MBA_IDC_COMPLETE:
339 if (mb[1] >> 15) {
340 vha->hw->flags.idc_compl_status = 1;
9aaf2cea 341 if (vha->hw->notify_dcbx_comp && !vha->vp_idx)
454073c9
SV		 342 complete(&vha->hw->dcbx_comp);
343 }
344 break;
345
346 case MBA_IDC_NOTIFY:
347 /* Acknowledgement needed? [Notify && non-zero timeout]. */
348 timeout = (descr >> 8) & 0xf;
349 ql_dbg(ql_dbg_async, vha, 0x5022,
350 "%lu Inter-Driver Communication %s -- ACK timeout=%d.\n",
351 vha->host_no, event[aen & 0xff], timeout);
352
353 if (!timeout)
354 return;
355 rval = qla2x00_post_idc_ack_work(vha, mb);
356 if (rval != QLA_SUCCESS)
357 ql_log(ql_log_warn, vha, 0x5023,
358 "IDC failed to post ACK.\n");
359 break;
360 case MBA_IDC_TIME_EXT:
361 vha->hw->idc_extend_tmo = descr;
362 ql_dbg(ql_dbg_async, vha, 0x5087,
363 "%lu Inter-Driver Communication %s -- "
364 "Extend timeout by=%d.\n",
365 vha->host_no, event[aen & 0xff], vha->hw->idc_extend_tmo);
366 break;
bf5b8ad7 367 }
8a659571
AV		 368}
369
daae62a3 370#define LS_UNKNOWN 2
d0297c9a
JC		 371const char *
372qla2x00_get_link_speed_str(struct qla_hw_data *ha, uint16_t speed)
daae62a3 373{
f73cb695
CD		 374 static const char *const link_speeds[] = {
375 "1", "2", "?", "4", "8", "16", "32", "10"
d0297c9a 376 };
b0a1c5b5 377#define QLA_LAST_SPEED (ARRAY_SIZE(link_speeds) - 1)
daae62a3
CD		 378
379 if (IS_QLA2100(ha) || IS_QLA2200(ha))
d0297c9a
JC		 380 return link_speeds[0];
381 else if (speed == 0x13)
f73cb695
CD		 382 return link_speeds[QLA_LAST_SPEED];
383 else if (speed < QLA_LAST_SPEED)
d0297c9a
JC		 384 return link_speeds[speed];
385 else
386 return link_speeds[LS_UNKNOWN];
daae62a3
CD		 387}
388
fa492630 389static void
7d613ac6
SV		 390qla83xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb)
391{
392 struct qla_hw_data *ha = vha->hw;
393
394 /*
395 * 8200 AEN Interpretation:
396 * mb[0] = AEN code
397 * mb[1] = AEN Reason code
398 * mb[2] = LSW of Peg-Halt Status-1 Register
399 * mb[6] = MSW of Peg-Halt Status-1 Register
400 * mb[3] = LSW of Peg-Halt Status-2 register
401 * mb[7] = MSW of Peg-Halt Status-2 register
402 * mb[4] = IDC Device-State Register value
403 * mb[5] = IDC Driver-Presence Register value
404 */
405 ql_dbg(ql_dbg_async, vha, 0x506b, "AEN Code: mb[0] = 0x%x AEN reason: "
406 "mb[1] = 0x%x PH-status1: mb[2] = 0x%x PH-status1: mb[6] = 0x%x.\n",
407 mb[0], mb[1], mb[2], mb[6]);
408 ql_dbg(ql_dbg_async, vha, 0x506c, "PH-status2: mb[3] = 0x%x "
409 "PH-status2: mb[7] = 0x%x Device-State: mb[4] = 0x%x "
410 "Drv-Presence: mb[5] = 0x%x.\n", mb[3], mb[7], mb[4], mb[5]);
411
412 if (mb[1] & (IDC_PEG_HALT_STATUS_CHANGE | IDC_NIC_FW_REPORTED_FAILURE |
413 IDC_HEARTBEAT_FAILURE)) {
414 ha->flags.nic_core_hung = 1;
415 ql_log(ql_log_warn, vha, 0x5060,
416 "83XX: F/W Error Reported: Check if reset required.\n");
417
418 if (mb[1] & IDC_PEG_HALT_STATUS_CHANGE) {
419 uint32_t protocol_engine_id, fw_err_code, err_level;
420
421 /*
422 * IDC_PEG_HALT_STATUS_CHANGE interpretation:
423 * - PEG-Halt Status-1 Register:
424 * (LSW = mb[2], MSW = mb[6])
425 * Bits 0-7 = protocol-engine ID
426 * Bits 8-28 = f/w error code
427 * Bits 29-31 = Error-level
428 * Error-level 0x1 = Non-Fatal error
429 * Error-level 0x2 = Recoverable Fatal error
430 * Error-level 0x4 = UnRecoverable Fatal error
431 * - PEG-Halt Status-2 Register:
432 * (LSW = mb[3], MSW = mb[7])
433 */
434 protocol_engine_id = (mb[2] & 0xff);
435 fw_err_code = (((mb[2] & 0xff00) >> 8) |
436 ((mb[6] & 0x1fff) << 8));
437 err_level = ((mb[6] & 0xe000) >> 13);
438 ql_log(ql_log_warn, vha, 0x5061, "PegHalt Status-1 "
439 "Register: protocol_engine_id=0x%x "
440 "fw_err_code=0x%x err_level=0x%x.\n",
441 protocol_engine_id, fw_err_code, err_level);
442 ql_log(ql_log_warn, vha, 0x5062, "PegHalt Status-2 "
443 "Register: 0x%x%x.\n", mb[7], mb[3]);
444 if (err_level == ERR_LEVEL_NON_FATAL) {
445 ql_log(ql_log_warn, vha, 0x5063,
0bf0efa1 446 "Not a fatal error, f/w has recovered itself.\n");
7d613ac6
SV		 447 } else if (err_level == ERR_LEVEL_RECOVERABLE_FATAL) {
448 ql_log(ql_log_fatal, vha, 0x5064,
449 "Recoverable Fatal error: Chip reset "
450 "required.\n");
451 qla83xx_schedule_work(vha,
452 QLA83XX_NIC_CORE_RESET);
453 } else if (err_level == ERR_LEVEL_UNRECOVERABLE_FATAL) {
454 ql_log(ql_log_fatal, vha, 0x5065,
455 "Unrecoverable Fatal error: Set FAILED "
456 "state, reboot required.\n");
457 qla83xx_schedule_work(vha,
458 QLA83XX_NIC_CORE_UNRECOVERABLE);
459 }
460 }
461
462 if (mb[1] & IDC_NIC_FW_REPORTED_FAILURE) {
463 uint16_t peg_fw_state, nw_interface_link_up;
464 uint16_t nw_interface_signal_detect, sfp_status;
465 uint16_t htbt_counter, htbt_monitor_enable;
b4a028a5 466 uint16_t sfp_additional_info, sfp_multirate;
7d613ac6
SV		 467 uint16_t sfp_tx_fault, link_speed, dcbx_status;
468
469 /*
470 * IDC_NIC_FW_REPORTED_FAILURE interpretation:
471 * - PEG-to-FC Status Register:
472 * (LSW = mb[2], MSW = mb[6])
473 * Bits 0-7 = Peg-Firmware state
474 * Bit 8 = N/W Interface Link-up
475 * Bit 9 = N/W Interface signal detected
476 * Bits 10-11 = SFP Status
477 * SFP Status 0x0 = SFP+ transceiver not expected
478 * SFP Status 0x1 = SFP+ transceiver not present
479 * SFP Status 0x2 = SFP+ transceiver invalid
480 * SFP Status 0x3 = SFP+ transceiver present and
481 * valid
482 * Bits 12-14 = Heartbeat Counter
483 * Bit 15 = Heartbeat Monitor Enable
484 * Bits 16-17 = SFP Additional Info
485 * SFP info 0x0 = Unregocnized transceiver for
486 * Ethernet
487 * SFP info 0x1 = SFP+ brand validation failed
488 * SFP info 0x2 = SFP+ speed validation failed
489 * SFP info 0x3 = SFP+ access error
490 * Bit 18 = SFP Multirate
491 * Bit 19 = SFP Tx Fault
492 * Bits 20-22 = Link Speed
493 * Bits 23-27 = Reserved
494 * Bits 28-30 = DCBX Status
495 * DCBX Status 0x0 = DCBX Disabled
496 * DCBX Status 0x1 = DCBX Enabled
497 * DCBX Status 0x2 = DCBX Exchange error
498 * Bit 31 = Reserved
499 */
500 peg_fw_state = (mb[2] & 0x00ff);
501 nw_interface_link_up = ((mb[2] & 0x0100) >> 8);
502 nw_interface_signal_detect = ((mb[2] & 0x0200) >> 9);
503 sfp_status = ((mb[2] & 0x0c00) >> 10);
504 htbt_counter = ((mb[2] & 0x7000) >> 12);
505 htbt_monitor_enable = ((mb[2] & 0x8000) >> 15);
b4a028a5 506 sfp_additional_info = (mb[6] & 0x0003);
7d613ac6
SV		 507 sfp_multirate = ((mb[6] & 0x0004) >> 2);
508 sfp_tx_fault = ((mb[6] & 0x0008) >> 3);
509 link_speed = ((mb[6] & 0x0070) >> 4);
510 dcbx_status = ((mb[6] & 0x7000) >> 12);
511
512 ql_log(ql_log_warn, vha, 0x5066,
513 "Peg-to-Fc Status Register:\n"
514 "peg_fw_state=0x%x, nw_interface_link_up=0x%x, "
515 "nw_interface_signal_detect=0x%x"
516 "\nsfp_statis=0x%x.\n ", peg_fw_state,
517 nw_interface_link_up, nw_interface_signal_detect,
518 sfp_status);
519 ql_log(ql_log_warn, vha, 0x5067,
520 "htbt_counter=0x%x, htbt_monitor_enable=0x%x, "
b4a028a5 521 "sfp_additional_info=0x%x, sfp_multirate=0x%x.\n ",
7d613ac6 522 htbt_counter, htbt_monitor_enable,
b4a028a5 523 sfp_additional_info, sfp_multirate);
7d613ac6
SV		 524 ql_log(ql_log_warn, vha, 0x5068,
525 "sfp_tx_fault=0x%x, link_state=0x%x, "
526 "dcbx_status=0x%x.\n", sfp_tx_fault, link_speed,
527 dcbx_status);
528
529 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
530 }
531
532 if (mb[1] & IDC_HEARTBEAT_FAILURE) {
533 ql_log(ql_log_warn, vha, 0x5069,
534 "Heartbeat Failure encountered, chip reset "
535 "required.\n");
536
537 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
538 }
539 }
540
541 if (mb[1] & IDC_DEVICE_STATE_CHANGE) {
542 ql_log(ql_log_info, vha, 0x506a,
543 "IDC Device-State changed = 0x%x.\n", mb[4]);
6c3943cd
SK		 544 if (ha->flags.nic_core_reset_owner)
545 return;
7d613ac6
SV		 546 qla83xx_schedule_work(vha, MBA_IDC_AEN);
547 }
548}
549
bb4cf5b7
CD		 550int
551qla2x00_is_a_vp_did(scsi_qla_host_t *vha, uint32_t rscn_entry)
552{
553 struct qla_hw_data *ha = vha->hw;
554 scsi_qla_host_t *vp;
555 uint32_t vp_did;
556 unsigned long flags;
557 int ret = 0;
558
559 if (!ha->num_vhosts)
560 return ret;
561
562 spin_lock_irqsave(&ha->vport_slock, flags);
563 list_for_each_entry(vp, &ha->vp_list, list) {
564 vp_did = vp->d_id.b24;
565 if (vp_did == rscn_entry) {
566 ret = 1;
567 break;
568 }
569 }
570 spin_unlock_irqrestore(&ha->vport_slock, flags);
571
572 return ret;
573}
574
726b8548 575fc_port_t *
17cac3a1
JC		 576qla2x00_find_fcport_by_loopid(scsi_qla_host_t *vha, uint16_t loop_id)
577{
726b8548
QT		 578 fc_port_t *f, *tf;
579
580 f = tf = NULL;
581 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list)
582 if (f->loop_id == loop_id)
583 return f;
584 return NULL;
585}
17cac3a1 586
726b8548
QT		 587fc_port_t *
588qla2x00_find_fcport_by_wwpn(scsi_qla_host_t *vha, u8 *wwpn, u8 incl_deleted)
589{
590 fc_port_t *f, *tf;
591
592 f = tf = NULL;
593 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
594 if (memcmp(f->port_name, wwpn, WWN_SIZE) == 0) {
595 if (incl_deleted)
596 return f;
597 else if (f->deleted == 0)
598 return f;
599 }
600 }
601 return NULL;
602}
17cac3a1 603
726b8548
QT		 604fc_port_t *
605qla2x00_find_fcport_by_nportid(scsi_qla_host_t *vha, port_id_t *id,
606 u8 incl_deleted)
607{
608 fc_port_t *f, *tf;
609
610 f = tf = NULL;
611 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
612 if (f->d_id.b24 == id->b24) {
613 if (incl_deleted)
614 return f;
615 else if (f->deleted == 0)
616 return f;
617 }
618 }
17cac3a1
JC		 619 return NULL;
620}
621
1da177e4
LT		 622/**
623 * qla2x00_async_event() - Process aynchronous events.
2db6228d
BVA		 624 * @vha: SCSI driver HA context
625 * @rsp: response queue
9a853f71 626 * @mb: Mailbox registers (0 - 3)
1da177e4 627 */
2c3dfe3f 628void
73208dfd 629qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb)
1da177e4 630{
1da177e4 631 uint16_t handle_cnt;
bdab23da 632 uint16_t cnt, mbx;
1da177e4 633 uint32_t handles[5];
e315cd28 634 struct qla_hw_data *ha = vha->hw;
3d71644c 635 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
bdab23da 636 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
bc5c2aad 637 struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
52c82823 638 uint32_t rscn_entry, host_pid;
4d4df193 639 unsigned long flags;
ef86cb20 640 fc_port_t *fcport = NULL;
1da177e4 641
45235022
QT		 642 if (!vha->hw->flags.fw_started)
643 return;
644
1da177e4
LT		 645 /* Setup to process RIO completion. */
646 handle_cnt = 0;
6246b8a1 647 if (IS_CNA_CAPABLE(ha))
3a03eb79 648 goto skip_rio;
1da177e4
LT		 649 switch (mb[0]) {
650 case MBA_SCSI_COMPLETION:
9a853f71 651 handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
1da177e4
LT		 652 handle_cnt = 1;
653 break;
654 case MBA_CMPLT_1_16BIT:
9a853f71 655 handles[0] = mb[1];
1da177e4
LT		 656 handle_cnt = 1;
657 mb[0] = MBA_SCSI_COMPLETION;
658 break;
659 case MBA_CMPLT_2_16BIT:
9a853f71
AV		 660 handles[0] = mb[1];
661 handles[1] = mb[2];
1da177e4
LT		 662 handle_cnt = 2;
663 mb[0] = MBA_SCSI_COMPLETION;
664 break;
665 case MBA_CMPLT_3_16BIT:
9a853f71
AV		 666 handles[0] = mb[1];
667 handles[1] = mb[2];
668 handles[2] = mb[3];
1da177e4
LT		 669 handle_cnt = 3;
670 mb[0] = MBA_SCSI_COMPLETION;
671 break;
672 case MBA_CMPLT_4_16BIT:
9a853f71
AV		 673 handles[0] = mb[1];
674 handles[1] = mb[2];
675 handles[2] = mb[3];
1da177e4
LT		 676 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
677 handle_cnt = 4;
678 mb[0] = MBA_SCSI_COMPLETION;
679 break;
680 case MBA_CMPLT_5_16BIT:
9a853f71
AV		 681 handles[0] = mb[1];
682 handles[1] = mb[2];
683 handles[2] = mb[3];
1da177e4
LT		 684 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
685 handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7);
686 handle_cnt = 5;
687 mb[0] = MBA_SCSI_COMPLETION;
688 break;
689 case MBA_CMPLT_2_32BIT:
9a853f71 690 handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
1da177e4
LT		 691 handles[1] = le32_to_cpu(
692 ((uint32_t)(RD_MAILBOX_REG(ha, reg, 7) << 16)) |
693 RD_MAILBOX_REG(ha, reg, 6));
694 handle_cnt = 2;
695 mb[0] = MBA_SCSI_COMPLETION;
696 break;
697 default:
698 break;
699 }
3a03eb79 700skip_rio:
1da177e4
LT		 701 switch (mb[0]) {
702 case MBA_SCSI_COMPLETION: /* Fast Post */
e315cd28 703 if (!vha->flags.online)
1da177e4
LT		 704 break;
705
706 for (cnt = 0; cnt < handle_cnt; cnt++)
73208dfd
AC		 707 qla2x00_process_completed_request(vha, rsp->req,
708 handles[cnt]);
1da177e4
LT		 709 break;
710
711 case MBA_RESET: /* Reset */
7c3df132
SK		 712 ql_dbg(ql_dbg_async, vha, 0x5002,
713 "Asynchronous RESET.\n");
1da177e4 714
e315cd28 715 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4
LT		 716 break;
717
718 case MBA_SYSTEM_ERR: /* System Error */
ecc89f25
JC		 719 mbx = (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
720 IS_QLA28XX(ha)) ?
6246b8a1 721 RD_REG_WORD(&reg24->mailbox7) : 0;
7c3df132 722 ql_log(ql_log_warn, vha, 0x5003,
bdab23da
AV		 723 "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh "
724 "mbx7=%xh.\n", mb[1], mb[2], mb[3], mbx);
2a3192a3
JC		 725 ha->fw_dump_mpi =
726 (IS_QLA27XX(ha) || IS_QLA28XX(ha)) &&
727 RD_REG_WORD(&reg24->mailbox7) & BIT_8;
e315cd28 728 ha->isp_ops->fw_dump(vha, 1);
ec7193e2 729 ha->flags.fw_init_done = 0;
4b60c827 730 QLA_FW_STOPPED(ha);
1da177e4 731
e428924c 732 if (IS_FWI2_CAPABLE(ha)) {
9a853f71 733 if (mb[1] == 0 && mb[2] == 0) {
7c3df132 734 ql_log(ql_log_fatal, vha, 0x5004,
9a853f71
AV		 735 "Unrecoverable Hardware Error: adapter "
736 "marked OFFLINE!\n");
e315cd28 737 vha->flags.online = 0;
6246b8a1 738 vha->device_flags |= DFLG_DEV_FAILED;
b1d46989 739 } else {
25985edc 740 /* Check to see if MPI timeout occurred */
f73cb695 741 if ((mbx & MBX_3) && (ha->port_no == 0))
b1d46989
MI		 742 set_bit(MPI_RESET_NEEDED,
743 &vha->dpc_flags);
744
e315cd28 745 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
b1d46989 746 }
9a853f71 747 } else if (mb[1] == 0) {
7c3df132 748 ql_log(ql_log_fatal, vha, 0x5005,
1da177e4
LT		 749 "Unrecoverable Hardware Error: adapter marked "
750 "OFFLINE!\n");
e315cd28 751 vha->flags.online = 0;
6246b8a1 752 vha->device_flags |= DFLG_DEV_FAILED;
1da177e4 753 } else
e315cd28 754 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 755 break;
756
757 case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */
7c3df132
SK		 758 ql_log(ql_log_warn, vha, 0x5006,
759 "ISP Request Transfer Error (%x).\n", mb[1]);
1da177e4 760
e315cd28 761 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 762 break;
763
764 case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */
7c3df132 765 ql_log(ql_log_warn, vha, 0x5007,
41233cd3 766 "ISP Response Transfer Error (%x).\n", mb[1]);
1da177e4 767
e315cd28 768 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 769 break;
770
771 case MBA_WAKEUP_THRES: /* Request Queue Wake-up */
7c3df132 772 ql_dbg(ql_dbg_async, vha, 0x5008,
41233cd3
JC		 773 "Asynchronous WAKEUP_THRES (%x).\n", mb[1]);
774 break;
1da177e4 775
41233cd3 776 case MBA_LOOP_INIT_ERR:
75d560e0 777 ql_log(ql_log_warn, vha, 0x5090,
41233cd3
JC		 778 "LOOP INIT ERROR (%x).\n", mb[1]);
779 ha->isp_ops->fw_dump(vha, 1);
780 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2d70c103 781 break;
41233cd3 782
1da177e4 783 case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */
ec7193e2 784 ha->flags.lip_ae = 1;
ec7193e2 785
cfb0919c 786 ql_dbg(ql_dbg_async, vha, 0x5009,
7c3df132 787 "LIP occurred (%x).\n", mb[1]);
1da177e4 788
e315cd28
AC		 789 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
790 atomic_set(&vha->loop_state, LOOP_DOWN);
791 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
792 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT		 793 }
794
e315cd28
AC		 795 if (vha->vp_idx) {
796 atomic_set(&vha->vp_state, VP_FAILED);
797 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ		 798 }
799
e315cd28
AC		 800 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
801 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
1da177e4 802
e315cd28
AC		 803 vha->flags.management_server_logged_in = 0;
804 qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]);
1da177e4
LT		 805 break;
806
807 case MBA_LOOP_UP: /* Loop Up Event */
daae62a3 808 if (IS_QLA2100(ha) || IS_QLA2200(ha))
d8b45213 809 ha->link_data_rate = PORT_SPEED_1GB;
daae62a3 810 else
1da177e4 811 ha->link_data_rate = mb[1];
1da177e4 812
8e5a9484 813 ql_log(ql_log_info, vha, 0x500a,
daae62a3 814 "LOOP UP detected (%s Gbps).\n",
d0297c9a 815 qla2x00_get_link_speed_str(ha, ha->link_data_rate));
1da177e4 816
e315cd28
AC		 817 vha->flags.management_server_logged_in = 0;
818 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate);
e4e3a2ce
QT		 819
820 if (AUTO_DETECT_SFP_SUPPORT(vha)) {
821 set_bit(DETECT_SFP_CHANGE, &vha->dpc_flags);
822 qla2xxx_wake_dpc(vha);
823 }
1da177e4
LT		 824 break;
825
826 case MBA_LOOP_DOWN: /* Loop Down Event */
9cd883f0 827 SAVE_TOPO(ha);
ec7193e2
QT		 828 ha->flags.lip_ae = 0;
829 ha->current_topology = 0;
830
6246b8a1
GM		 831 mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha))
832 ? RD_REG_WORD(&reg24->mailbox4) : 0;
7ec0effd
AD		 833 mbx = (IS_P3P_TYPE(ha)) ? RD_REG_WORD(&reg82->mailbox_out[4])
834 : mbx;
8e5a9484 835 ql_log(ql_log_info, vha, 0x500b,
7c3df132
SK		 836 "LOOP DOWN detected (%x %x %x %x).\n",
837 mb[1], mb[2], mb[3], mbx);
1da177e4 838
e315cd28
AC		 839 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
840 atomic_set(&vha->loop_state, LOOP_DOWN);
841 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2486c627
HM		 842 /*
843 * In case of loop down, restore WWPN from
844 * NVRAM in case of FA-WWPN capable ISP
718abbdc 845 * Restore for Physical Port only
2486c627 846 */
718abbdc 847 if (!vha->vp_idx) {
dcbf8f80
SC		 848 if (ha->flags.fawwpn_enabled &&
849 (ha->current_topology == ISP_CFG_F)) {
718abbdc 850 void *wwpn = ha->init_cb->port_name;
bd432bb5 851
718abbdc
SC		 852 memcpy(vha->port_name, wwpn, WWN_SIZE);
853 fc_host_port_name(vha->host) =
854 wwn_to_u64(vha->port_name);
855 ql_dbg(ql_dbg_init + ql_dbg_verbose,
83548fe2 856 vha, 0x00d8, "LOOP DOWN detected,"
718abbdc
SC		 857 "restore WWPN %016llx\n",
858 wwn_to_u64(vha->port_name));
859 }
860
861 clear_bit(VP_CONFIG_OK, &vha->vp_flags);
2486c627
HM		 862 }
863
e315cd28
AC		 864 vha->device_flags |= DFLG_NO_CABLE;
865 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT		 866 }
867
e315cd28
AC		 868 if (vha->vp_idx) {
869 atomic_set(&vha->vp_state, VP_FAILED);
870 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ		 871 }
872
e315cd28 873 vha->flags.management_server_logged_in = 0;
d8b45213 874 ha->link_data_rate = PORT_SPEED_UNKNOWN;
e315cd28 875 qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0);
1da177e4
LT		 876 break;
877
878 case MBA_LIP_RESET: /* LIP reset occurred */
cfb0919c 879 ql_dbg(ql_dbg_async, vha, 0x500c,
cc3ef7bc 880 "LIP reset occurred (%x).\n", mb[1]);
1da177e4 881
e315cd28
AC		 882 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
883 atomic_set(&vha->loop_state, LOOP_DOWN);
884 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
885 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT		 886 }
887
e315cd28
AC		 888 if (vha->vp_idx) {
889 atomic_set(&vha->vp_state, VP_FAILED);
890 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ		 891 }
892
e315cd28 893 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4
LT		 894
895 ha->operating_mode = LOOP;
e315cd28
AC		 896 vha->flags.management_server_logged_in = 0;
897 qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]);
1da177e4
LT		 898 break;
899
3a03eb79 900 /* case MBA_DCBX_COMPLETE: */
1da177e4 901 case MBA_POINT_TO_POINT: /* Point-to-Point */
ec7193e2 902 ha->flags.lip_ae = 0;
ec7193e2 903
1da177e4
LT		 904 if (IS_QLA2100(ha))
905 break;
906
7ec0effd 907 if (IS_CNA_CAPABLE(ha)) {
7c3df132
SK		 908 ql_dbg(ql_dbg_async, vha, 0x500d,
909 "DCBX Completed -- %04x %04x %04x.\n",
910 mb[1], mb[2], mb[3]);
9aaf2cea 911 if (ha->notify_dcbx_comp && !vha->vp_idx)
23f2ebd1
SR		 912 complete(&ha->dcbx_comp);
913
914 } else
7c3df132
SK		 915 ql_dbg(ql_dbg_async, vha, 0x500e,
916 "Asynchronous P2P MODE received.\n");
1da177e4
LT		 917
918 /*
919 * Until there's a transition from loop down to loop up, treat
920 * this as loop down only.
921 */
e315cd28
AC		 922 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
923 atomic_set(&vha->loop_state, LOOP_DOWN);
924 if (!atomic_read(&vha->loop_down_timer))
925 atomic_set(&vha->loop_down_timer,
1da177e4 926 LOOP_DOWN_TIME);
48acad09
QT		 927 if (!N2N_TOPO(ha))
928 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT		 929 }
930
e315cd28
AC		 931 if (vha->vp_idx) {
932 atomic_set(&vha->vp_state, VP_FAILED);
933 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ		 934 }
935
e315cd28
AC		 936 if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)))
937 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
938
939 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
940 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
4346b149 941
e315cd28 942 vha->flags.management_server_logged_in = 0;
1da177e4
LT		 943 break;
944
945 case MBA_CHG_IN_CONNECTION: /* Change in connection mode */
946 if (IS_QLA2100(ha))
947 break;
948
cfb0919c 949 ql_dbg(ql_dbg_async, vha, 0x500f,
1da177e4
LT		 950 "Configuration change detected: value=%x.\n", mb[1]);
951
e315cd28
AC		 952 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
953 atomic_set(&vha->loop_state, LOOP_DOWN);
954 if (!atomic_read(&vha->loop_down_timer))
955 atomic_set(&vha->loop_down_timer,
1da177e4 956 LOOP_DOWN_TIME);
e315cd28 957 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT		 958 }
959
e315cd28
AC		 960 if (vha->vp_idx) {
961 atomic_set(&vha->vp_state, VP_FAILED);
962 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ		 963 }
964
e315cd28
AC		 965 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
966 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1da177e4
LT		 967 break;
968
969 case MBA_PORT_UPDATE: /* Port database update */
55903b9d
SV		 970 /*
971 * Handle only global and vn-port update events
972 *
973 * Relevant inputs:
974 * mb[1] = N_Port handle of changed port
975 * OR 0xffff for global event
976 * mb[2] = New login state
977 * 7 = Port logged out
978 * mb[3] = LSB is vp_idx, 0xff = all vps
979 *
980 * Skip processing if:
981 * Event is global, vp_idx is NOT all vps,
982 * vp_idx does not match
983 * Event is not global, vp_idx does not match
984 */
12cec63e
AV		 985 if (IS_QLA2XXX_MIDTYPE(ha) &&
986 ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) ||
987 (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff))
988 break;
73208dfd 989
17cac3a1 990 if (mb[2] == 0x7) {
7c3df132 991 ql_dbg(ql_dbg_async, vha, 0x5010,
17cac3a1
JC		 992 "Port %s %04x %04x %04x.\n",
993 mb[1] == 0xffff ? "unavailable" : "logout",
7c3df132 994 mb[1], mb[2], mb[3]);
17cac3a1
JC		 995
996 if (mb[1] == 0xffff)
997 goto global_port_update;
998
b98ae0d7
QT		 999 if (mb[1] == NPH_SNS_LID(ha)) {
1000 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1001 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1002 break;
1003 }
1004
1005 /* use handle_cnt for loop id/nport handle */
1006 if (IS_FWI2_CAPABLE(ha))
1007 handle_cnt = NPH_SNS;
1008 else
1009 handle_cnt = SIMPLE_NAME_SERVER;
1010 if (mb[1] == handle_cnt) {
1011 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1012 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1013 break;
1014 }
1015
17cac3a1
JC		 1016 /* Port logout */
1017 fcport = qla2x00_find_fcport_by_loopid(vha, mb[1]);
1018 if (!fcport)
1019 break;
1020 if (atomic_read(&fcport->state) != FCS_ONLINE)
1021 break;
1022 ql_dbg(ql_dbg_async, vha, 0x508a,
1023 "Marking port lost loopid=%04x portid=%06x.\n",
1024 fcport->loop_id, fcport->d_id.b24);
726b8548
QT		 1025 if (qla_ini_mode_enabled(vha)) {
1026 qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
1027 fcport->logout_on_delete = 0;
d8630bb9 1028 qlt_schedule_sess_for_deletion(fcport);
726b8548 1029 }
17cac3a1
JC		 1030 break;
1031
1032global_port_update:
9764ff88
AV		 1033 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1034 atomic_set(&vha->loop_state, LOOP_DOWN);
1035 atomic_set(&vha->loop_down_timer,
1036 LOOP_DOWN_TIME);
1037 vha->device_flags |= DFLG_NO_CABLE;
1038 qla2x00_mark_all_devices_lost(vha, 1);
1039 }
1040
1041 if (vha->vp_idx) {
1042 atomic_set(&vha->vp_state, VP_FAILED);
1043 fc_vport_set_state(vha->fc_vport,
1044 FC_VPORT_FAILED);
faadc5e7 1045 qla2x00_mark_all_devices_lost(vha, 1);
9764ff88
AV		 1046 }
1047
1048 vha->flags.management_server_logged_in = 0;
1049 ha->link_data_rate = PORT_SPEED_UNKNOWN;
1050 break;
1051 }
1052
1da177e4 1053 /*
cc3ef7bc 1054 * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET
1da177e4
LT		 1055 * event etc. earlier indicating loop is down) then process
1056 * it. Otherwise ignore it and Wait for RSCN to come in.
1057 */
e315cd28 1058 atomic_set(&vha->loop_down_timer, 0);
8e5a9484 1059 if (atomic_read(&vha->loop_state) != LOOP_DOWN &&
edd05de1 1060 !ha->flags.n2n_ae &&
8e5a9484 1061 atomic_read(&vha->loop_state) != LOOP_DEAD) {
7c3df132
SK		 1062 ql_dbg(ql_dbg_async, vha, 0x5011,
1063 "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n",
1064 mb[1], mb[2], mb[3]);
2d70c103
NB		 1065
1066 qlt_async_event(mb[0], vha, mb);
1da177e4
LT		 1067 break;
1068 }
1069
7c3df132
SK		 1070 ql_dbg(ql_dbg_async, vha, 0x5012,
1071 "Port database changed %04x %04x %04x.\n",
1072 mb[1], mb[2], mb[3]);
1da177e4
LT		 1073
1074 /*
1075 * Mark all devices as missing so we will login again.
1076 */
e315cd28 1077 atomic_set(&vha->loop_state, LOOP_UP);
6944dccb 1078 vha->scan.scan_retry = 0;
1da177e4 1079
e315cd28
AC		 1080 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1081 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
ded6411f 1082 set_bit(VP_CONFIG_OK, &vha->vp_flags);
2d70c103
NB		 1083
1084 qlt_async_event(mb[0], vha, mb);
1da177e4
LT		 1085 break;
1086
1087 case MBA_RSCN_UPDATE: /* State Change Registration */
3c397400 1088 /* Check if the Vport has issued a SCR */
e315cd28 1089 if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags))
3c397400
SJ		 1090 break;
1091 /* Only handle SCNs for our Vport index. */
0d6e61bc 1092 if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff))
3c397400 1093 break;
0d6e61bc 1094
7c3df132
SK		 1095 ql_dbg(ql_dbg_async, vha, 0x5013,
1096 "RSCN database changed -- %04x %04x %04x.\n",
1097 mb[1], mb[2], mb[3]);
1da177e4 1098
59d72d87 1099 rscn_entry = ((mb[1] & 0xff) << 16) | mb[2];
e315cd28
AC		 1100 host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8)
1101 | vha->d_id.b.al_pa;
1da177e4 1102 if (rscn_entry == host_pid) {
7c3df132
SK		 1103 ql_dbg(ql_dbg_async, vha, 0x5014,
1104 "Ignoring RSCN update to local host "
1105 "port ID (%06x).\n", host_pid);
1da177e4
LT		 1106 break;
1107 }
1108
59d72d87
RA		 1109 /* Ignore reserved bits from RSCN-payload. */
1110 rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2];
1da177e4 1111
bb4cf5b7
CD		 1112 /* Skip RSCNs for virtual ports on the same physical port */
1113 if (qla2x00_is_a_vp_did(vha, rscn_entry))
1114 break;
1115
e315cd28
AC		 1116 atomic_set(&vha->loop_down_timer, 0);
1117 vha->flags.management_server_logged_in = 0;
726b8548
QT		 1118 {
1119 struct event_arg ea;
1da177e4 1120
726b8548
QT		 1121 memset(&ea, 0, sizeof(ea));
1122 ea.event = FCME_RSCN;
1123 ea.id.b24 = rscn_entry;
41dc529a 1124 ea.id.b.rsvd_1 = rscn_entry >> 24;
726b8548 1125 qla2x00_fcport_event_handler(vha, &ea);
41dc529a 1126 qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry);
726b8548 1127 }
1da177e4 1128 break;
1da177e4
LT		 1129 /* case MBA_RIO_RESPONSE: */
1130 case MBA_ZIO_RESPONSE:
7c3df132
SK		 1131 ql_dbg(ql_dbg_async, vha, 0x5015,
1132 "[R|Z]IO update completion.\n");
1da177e4 1133
e428924c 1134 if (IS_FWI2_CAPABLE(ha))
2afa19a9 1135 qla24xx_process_response_queue(vha, rsp);
4fdfefe5 1136 else
73208dfd 1137 qla2x00_process_response_queue(rsp);
1da177e4 1138 break;
9a853f71
AV		 1139
1140 case MBA_DISCARD_RND_FRAME:
7c3df132
SK		 1141 ql_dbg(ql_dbg_async, vha, 0x5016,
1142 "Discard RND Frame -- %04x %04x %04x.\n",
1143 mb[1], mb[2], mb[3]);
9a853f71 1144 break;
45ebeb56
AV		 1145
1146 case MBA_TRACE_NOTIFICATION:
7c3df132
SK		 1147 ql_dbg(ql_dbg_async, vha, 0x5017,
1148 "Trace Notification -- %04x %04x.\n", mb[1], mb[2]);
45ebeb56 1149 break;
4d4df193
HK		 1150
1151 case MBA_ISP84XX_ALERT:
7c3df132
SK		 1152 ql_dbg(ql_dbg_async, vha, 0x5018,
1153 "ISP84XX Alert Notification -- %04x %04x %04x.\n",
1154 mb[1], mb[2], mb[3]);
4d4df193
HK		 1155
1156 spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
1157 switch (mb[1]) {
1158 case A84_PANIC_RECOVERY:
7c3df132
SK		 1159 ql_log(ql_log_info, vha, 0x5019,
1160 "Alert 84XX: panic recovery %04x %04x.\n",
1161 mb[2], mb[3]);
4d4df193
HK		 1162 break;
1163 case A84_OP_LOGIN_COMPLETE:
1164 ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2];
7c3df132
SK		 1165 ql_log(ql_log_info, vha, 0x501a,
1166 "Alert 84XX: firmware version %x.\n",
1167 ha->cs84xx->op_fw_version);
4d4df193
HK		 1168 break;
1169 case A84_DIAG_LOGIN_COMPLETE:
1170 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
7c3df132
SK		 1171 ql_log(ql_log_info, vha, 0x501b,
1172 "Alert 84XX: diagnostic firmware version %x.\n",
1173 ha->cs84xx->diag_fw_version);
4d4df193
HK		 1174 break;
1175 case A84_GOLD_LOGIN_COMPLETE:
1176 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
1177 ha->cs84xx->fw_update = 1;
7c3df132
SK		 1178 ql_log(ql_log_info, vha, 0x501c,
1179 "Alert 84XX: gold firmware version %x.\n",
1180 ha->cs84xx->gold_fw_version);
4d4df193
HK		 1181 break;
1182 default:
7c3df132
SK		 1183 ql_log(ql_log_warn, vha, 0x501d,
1184 "Alert 84xx: Invalid Alert %04x %04x %04x.\n",
4d4df193
HK		 1185 mb[1], mb[2], mb[3]);
1186 }
1187 spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags);
1188 break;
3a03eb79 1189 case MBA_DCBX_START:
7c3df132
SK		 1190 ql_dbg(ql_dbg_async, vha, 0x501e,
1191 "DCBX Started -- %04x %04x %04x.\n",
1192 mb[1], mb[2], mb[3]);
3a03eb79
AV		 1193 break;
1194 case MBA_DCBX_PARAM_UPDATE:
7c3df132
SK		 1195 ql_dbg(ql_dbg_async, vha, 0x501f,
1196 "DCBX Parameters Updated -- %04x %04x %04x.\n",
1197 mb[1], mb[2], mb[3]);
3a03eb79
AV		 1198 break;
1199 case MBA_FCF_CONF_ERR:
7c3df132
SK		 1200 ql_dbg(ql_dbg_async, vha, 0x5020,
1201 "FCF Configuration Error -- %04x %04x %04x.\n",
1202 mb[1], mb[2], mb[3]);
3a03eb79 1203 break;
3a03eb79 1204 case MBA_IDC_NOTIFY:
7ec0effd 1205 if (IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
67b2a31f
CD		 1206 mb[4] = RD_REG_WORD(&reg24->mailbox4);
1207 if (((mb[2] & 0x7fff) == MBC_PORT_RESET ||
1208 (mb[2] & 0x7fff) == MBC_SET_PORT_CONFIG) &&
1209 (mb[4] & INTERNAL_LOOPBACK_MASK) != 0) {
8fcd6b8b 1210 set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags);
67b2a31f
CD		 1211 /*
1212 * Extend loop down timer since port is active.
1213 */
1214 if (atomic_read(&vha->loop_state) == LOOP_DOWN)
1215 atomic_set(&vha->loop_down_timer,
1216 LOOP_DOWN_TIME);
8fcd6b8b
CD		 1217 qla2xxx_wake_dpc(vha);
1218 }
67b2a31f 1219 }
81881861 1220 /* fall through */
8fcd6b8b 1221 case MBA_IDC_COMPLETE:
9aaf2cea 1222 if (ha->notify_lb_portup_comp && !vha->vp_idx)
f356bef1
CD		 1223 complete(&ha->lb_portup_comp);
1224 /* Fallthru */
3a03eb79 1225 case MBA_IDC_TIME_EXT:
7ec0effd
AD		 1226 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) ||
1227 IS_QLA8044(ha))
7d613ac6
SV		 1228 qla81xx_idc_event(vha, mb[0], mb[1]);
1229 break;
1230
1231 case MBA_IDC_AEN:
1232 mb[4] = RD_REG_WORD(&reg24->mailbox4);
1233 mb[5] = RD_REG_WORD(&reg24->mailbox5);
1234 mb[6] = RD_REG_WORD(&reg24->mailbox6);
1235 mb[7] = RD_REG_WORD(&reg24->mailbox7);
1236 qla83xx_handle_8200_aen(vha, mb);
3a03eb79 1237 break;
7d613ac6 1238
b5a340dd
JC		 1239 case MBA_DPORT_DIAGNOSTICS:
1240 ql_dbg(ql_dbg_async, vha, 0x5052,
ef55e513 1241 "D-Port Diagnostics: %04x result=%s\n",
ec891462 1242 mb[0],
b5a340dd 1243 mb[1] == 0 ? "start" :
ef55e513
JC		 1244 mb[1] == 1 ? "done (pass)" :
1245 mb[1] == 2 ? "done (error)" : "other");
b5a340dd
JC		 1246 break;
1247
a29b3dd7
JC		 1248 case MBA_TEMPERATURE_ALERT:
1249 ql_dbg(ql_dbg_async, vha, 0x505e,
1250 "TEMPERATURE ALERT: %04x %04x %04x\n", mb[1], mb[2], mb[3]);
1251 if (mb[1] == 0x12)
1252 schedule_work(&ha->board_disable);
1253 break;
1254
92d4408e
SC		 1255 case MBA_TRANS_INSERT:
1256 ql_dbg(ql_dbg_async, vha, 0x5091,
1257 "Transceiver Insertion: %04x\n", mb[1]);
1258 break;
1259
6246b8a1
GM		 1260 default:
1261 ql_dbg(ql_dbg_async, vha, 0x5057,
1262 "Unknown AEN:%04x %04x %04x %04x\n",
1263 mb[0], mb[1], mb[2], mb[3]);
1da177e4 1264 }
2c3dfe3f 1265
2d70c103
NB		 1266 qlt_async_event(mb[0], vha, mb);
1267
e315cd28 1268 if (!vha->vp_idx && ha->num_vhosts)
73208dfd 1269 qla2x00_alert_all_vps(rsp, mb);
1da177e4
LT		 1270}
1271
1272/**
1273 * qla2x00_process_completed_request() - Process a Fast Post response.
2db6228d
BVA		 1274 * @vha: SCSI driver HA context
1275 * @req: request queue
1da177e4
LT		 1276 * @index: SRB index
1277 */
8ae6d9c7 1278void
73208dfd 1279qla2x00_process_completed_request(struct scsi_qla_host *vha,
8ae6d9c7 1280 struct req_que *req, uint32_t index)
1da177e4
LT		 1281{
1282 srb_t *sp;
e315cd28 1283 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 1284
1285 /* Validate handle. */
8d93f550 1286 if (index >= req->num_outstanding_cmds) {
7c3df132
SK		 1287 ql_log(ql_log_warn, vha, 0x3014,
1288 "Invalid SCSI command index (%x).\n", index);
1da177e4 1289
7ec0effd 1290 if (IS_P3P_TYPE(ha))
8f7daead
GM		 1291 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1292 else
1293 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 1294 return;
1295 }
1296
e315cd28 1297 sp = req->outstanding_cmds[index];
1da177e4
LT		 1298 if (sp) {
1299 /* Free outstanding command slot. */
e315cd28 1300 req->outstanding_cmds[index] = NULL;
1da177e4 1301
1da177e4 1302 /* Save ISP completion status */
25ff6af1 1303 sp->done(sp, DID_OK << 16);
1da177e4 1304 } else {
7c3df132 1305 ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n");
1da177e4 1306
7ec0effd 1307 if (IS_P3P_TYPE(ha))
8f7daead
GM		 1308 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1309 else
1310 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 1311 }
1312}
1313
8ae6d9c7 1314srb_t *
ac280b67
AV		 1315qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func,
1316 struct req_que *req, void *iocb)
1317{
1318 struct qla_hw_data *ha = vha->hw;
1319 sts_entry_t *pkt = iocb;
1320 srb_t *sp = NULL;
1321 uint16_t index;
1322
1323 index = LSW(pkt->handle);
8d93f550 1324 if (index >= req->num_outstanding_cmds) {
7c3df132 1325 ql_log(ql_log_warn, vha, 0x5031,
726b8548
QT		 1326 "Invalid command index (%x) type %8ph.\n",
1327 index, iocb);
7ec0effd 1328 if (IS_P3P_TYPE(ha))
8f7daead
GM		 1329 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1330 else
1331 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
ac280b67
AV		 1332 goto done;
1333 }
1334 sp = req->outstanding_cmds[index];
1335 if (!sp) {
7c3df132
SK		 1336 ql_log(ql_log_warn, vha, 0x5032,
1337 "Invalid completion handle (%x) -- timed-out.\n", index);
ac280b67
AV		 1338 return sp;
1339 }
1340 if (sp->handle != index) {
7c3df132
SK		 1341 ql_log(ql_log_warn, vha, 0x5033,
1342 "SRB handle (%x) mismatch %x.\n", sp->handle, index);
ac280b67
AV		 1343 return NULL;
1344 }
9a069e19 1345
ac280b67 1346 req->outstanding_cmds[index] = NULL;
9a069e19 1347
ac280b67
AV		 1348done:
1349 return sp;
1350}
1351
1352static void
1353qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1354 struct mbx_entry *mbx)
1355{
1356 const char func[] = "MBX-IOCB";
1357 const char *type;
ac280b67
AV		 1358 fc_port_t *fcport;
1359 srb_t *sp;
4916392b 1360 struct srb_iocb *lio;
99b0bec7 1361 uint16_t *data;
5ff1d584 1362 uint16_t status;
ac280b67
AV		 1363
1364 sp = qla2x00_get_sp_from_handle(vha, func, req, mbx);
1365 if (!sp)
1366 return;
1367
9ba56b95
GM		 1368 lio = &sp->u.iocb_cmd;
1369 type = sp->name;
ac280b67 1370 fcport = sp->fcport;
4916392b 1371 data = lio->u.logio.data;
ac280b67 1372
5ff1d584 1373 data[0] = MBS_COMMAND_ERROR;
4916392b 1374 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
5ff1d584 1375 QLA_LOGIO_LOGIN_RETRIED : 0;
ac280b67 1376 if (mbx->entry_status) {
7c3df132 1377 ql_dbg(ql_dbg_async, vha, 0x5043,
cfb0919c 1378 "Async-%s error entry - hdl=%x portid=%02x%02x%02x "
d3fa9e7d 1379 "entry-status=%x status=%x state-flag=%x "
cfb0919c
CD		 1380 "status-flags=%x.\n", type, sp->handle,
1381 fcport->d_id.b.domain, fcport->d_id.b.area,
d3fa9e7d
AV		 1382 fcport->d_id.b.al_pa, mbx->entry_status,
1383 le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags),
7c3df132 1384 le16_to_cpu(mbx->status_flags));
d3fa9e7d 1385
cfb0919c 1386 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5029,
f8f97b0c 1387 mbx, sizeof(*mbx));
ac280b67 1388
99b0bec7 1389 goto logio_done;
ac280b67
AV		 1390 }
1391
5ff1d584 1392 status = le16_to_cpu(mbx->status);
9ba56b95 1393 if (status == 0x30 && sp->type == SRB_LOGIN_CMD &&
5ff1d584
AV		 1394 le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE)
1395 status = 0;
1396 if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) {
7c3df132 1397 ql_dbg(ql_dbg_async, vha, 0x5045,
cfb0919c
CD		 1398 "Async-%s complete - hdl=%x portid=%02x%02x%02x mbx1=%x.\n",
1399 type, sp->handle, fcport->d_id.b.domain,
1400 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1401 le16_to_cpu(mbx->mb1));
ac280b67
AV		 1402
1403 data[0] = MBS_COMMAND_COMPLETE;
9ba56b95 1404 if (sp->type == SRB_LOGIN_CMD) {
99b0bec7
AV		 1405 fcport->port_type = FCT_TARGET;
1406 if (le16_to_cpu(mbx->mb1) & BIT_0)
1407 fcport->port_type = FCT_INITIATOR;
6ac52608 1408 else if (le16_to_cpu(mbx->mb1) & BIT_1)
99b0bec7 1409 fcport->flags |= FCF_FCP2_DEVICE;
5ff1d584 1410 }
99b0bec7 1411 goto logio_done;
ac280b67
AV		 1412 }
1413
1414 data[0] = le16_to_cpu(mbx->mb0);
1415 switch (data[0]) {
1416 case MBS_PORT_ID_USED:
1417 data[1] = le16_to_cpu(mbx->mb1);
1418 break;
1419 case MBS_LOOP_ID_USED:
1420 break;
1421 default:
1422 data[0] = MBS_COMMAND_ERROR;
ac280b67
AV		 1423 break;
1424 }
1425
7c3df132 1426 ql_log(ql_log_warn, vha, 0x5046,
cfb0919c
CD		 1427 "Async-%s failed - hdl=%x portid=%02x%02x%02x status=%x "
1428 "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n", type, sp->handle,
1429 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
1430 status, le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1),
ac280b67 1431 le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6),
7c3df132 1432 le16_to_cpu(mbx->mb7));
ac280b67 1433
99b0bec7 1434logio_done:
25ff6af1 1435 sp->done(sp, 0);
ac280b67
AV		 1436}
1437
726b8548
QT		 1438static void
1439qla24xx_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1440 struct mbx_24xx_entry *pkt)
1441{
1442 const char func[] = "MBX-IOCB2";
1443 srb_t *sp;
1444 struct srb_iocb *si;
1445 u16 sz, i;
1446 int res;
1447
1448 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1449 if (!sp)
1450 return;
1451
1452 si = &sp->u.iocb_cmd;
1453 sz = min(ARRAY_SIZE(pkt->mb), ARRAY_SIZE(sp->u.iocb_cmd.u.mbx.in_mb));
1454
1455 for (i = 0; i < sz; i++)
1456 si->u.mbx.in_mb[i] = le16_to_cpu(pkt->mb[i]);
1457
1458 res = (si->u.mbx.in_mb[0] & MBS_MASK);
1459
25ff6af1 1460 sp->done(sp, res);
726b8548
QT		 1461}
1462
1463static void
1464qla24xxx_nack_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1465 struct nack_to_isp *pkt)
1466{
1467 const char func[] = "nack";
1468 srb_t *sp;
1469 int res = 0;
1470
1471 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1472 if (!sp)
1473 return;
1474
1475 if (pkt->u.isp2x.status != cpu_to_le16(NOTIFY_ACK_SUCCESS))
1476 res = QLA_FUNCTION_FAILED;
1477
25ff6af1 1478 sp->done(sp, res);
ac280b67
AV		 1479}
1480
9bc4f4fb
HZ		 1481static void
1482qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1483 sts_entry_t *pkt, int iocb_type)
1484{
1485 const char func[] = "CT_IOCB";
1486 const char *type;
9bc4f4fb 1487 srb_t *sp;
75cc8cfc 1488 struct bsg_job *bsg_job;
01e0e15c 1489 struct fc_bsg_reply *bsg_reply;
9bc4f4fb 1490 uint16_t comp_status;
726b8548 1491 int res = 0;
9bc4f4fb
HZ		 1492
1493 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1494 if (!sp)
1495 return;
1496
726b8548
QT		 1497 switch (sp->type) {
1498 case SRB_CT_CMD:
1499 bsg_job = sp->u.bsg_job;
1500 bsg_reply = bsg_job->reply;
1501
1502 type = "ct pass-through";
1503
1504 comp_status = le16_to_cpu(pkt->comp_status);
1505
1506 /*
1507 * return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
1508 * fc payload to the caller
1509 */
1510 bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
1511 bsg_job->reply_len = sizeof(struct fc_bsg_reply);
1512
1513 if (comp_status != CS_COMPLETE) {
1514 if (comp_status == CS_DATA_UNDERRUN) {
1515 res = DID_OK << 16;
1516 bsg_reply->reply_payload_rcv_len =
1517 le16_to_cpu(((sts_entry_t *)pkt)->rsp_info_len);
1518
1519 ql_log(ql_log_warn, vha, 0x5048,
1520 "CT pass-through-%s error comp_status=0x%x total_byte=0x%x.\n",
1521 type, comp_status,
1522 bsg_reply->reply_payload_rcv_len);
1523 } else {
1524 ql_log(ql_log_warn, vha, 0x5049,
1525 "CT pass-through-%s error comp_status=0x%x.\n",
1526 type, comp_status);
1527 res = DID_ERROR << 16;
1528 bsg_reply->reply_payload_rcv_len = 0;
1529 }
1530 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5035,
f8f97b0c 1531 pkt, sizeof(*pkt));
726b8548
QT		 1532 } else {
1533 res = DID_OK << 16;
1534 bsg_reply->reply_payload_rcv_len =
1535 bsg_job->reply_payload.payload_len;
1536 bsg_job->reply_len = 0;
1537 }
1538 break;
1539 case SRB_CT_PTHRU_CMD:
1540 /*
1541 * borrowing sts_entry_24xx.comp_status.
1542 * same location as ct_entry_24xx.comp_status
1543 */
1544 res = qla2x00_chk_ms_status(vha, (ms_iocb_entry_t *)pkt,
1545 (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp,
1546 sp->name);
1547 break;
9bc4f4fb
HZ		 1548 }
1549
25ff6af1 1550 sp->done(sp, res);
9bc4f4fb
HZ		 1551}
1552
9a069e19
GM		 1553static void
1554qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1555 struct sts_entry_24xx *pkt, int iocb_type)
1556{
1557 const char func[] = "ELS_CT_IOCB";
1558 const char *type;
9a069e19 1559 srb_t *sp;
75cc8cfc 1560 struct bsg_job *bsg_job;
01e0e15c 1561 struct fc_bsg_reply *bsg_reply;
9a069e19
GM		 1562 uint16_t comp_status;
1563 uint32_t fw_status[3];
9ba56b95 1564 int res;
edd05de1 1565 struct srb_iocb *els;
9a069e19
GM		 1566
1567 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1568 if (!sp)
1569 return;
9a069e19
GM		 1570
1571 type = NULL;
9ba56b95 1572 switch (sp->type) {
9a069e19
GM		 1573 case SRB_ELS_CMD_RPT:
1574 case SRB_ELS_CMD_HST:
1575 type = "els";
1576 break;
1577 case SRB_CT_CMD:
1578 type = "ct pass-through";
1579 break;
6eb54715
HM		 1580 case SRB_ELS_DCMD:
1581 type = "Driver ELS logo";
edd05de1
DG		 1582 if (iocb_type != ELS_IOCB_TYPE) {
1583 ql_dbg(ql_dbg_user, vha, 0x5047,
1584 "Completing %s: (%p) type=%d.\n",
1585 type, sp, sp->type);
1586 sp->done(sp, 0);
1587 return;
1588 }
1589 break;
726b8548
QT		 1590 case SRB_CT_PTHRU_CMD:
1591 /* borrowing sts_entry_24xx.comp_status.
1592 same location as ct_entry_24xx.comp_status
1593 */
2d73ac61 1594 res = qla2x00_chk_ms_status(sp->vha, (ms_iocb_entry_t *)pkt,
726b8548
QT		 1595 (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp,
1596 sp->name);
25ff6af1 1597 sp->done(sp, res);
6eb54715 1598 return;
9a069e19 1599 default:
37fed3ee 1600 ql_dbg(ql_dbg_user, vha, 0x503e,
9ba56b95 1601 "Unrecognized SRB: (%p) type=%d.\n", sp, sp->type);
9a069e19
GM		 1602 return;
1603 }
1604
1605 comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status);
845bbb09
BVA		 1606 fw_status[1] = le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->error_subcode_1);
1607 fw_status[2] = le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->error_subcode_2);
9a069e19 1608
edd05de1
DG		 1609 if (iocb_type == ELS_IOCB_TYPE) {
1610 els = &sp->u.iocb_cmd;
1611 els->u.els_plogi.fw_status[0] = fw_status[0];
1612 els->u.els_plogi.fw_status[1] = fw_status[1];
1613 els->u.els_plogi.fw_status[2] = fw_status[2];
1614 els->u.els_plogi.comp_status = fw_status[0];
1615 if (comp_status == CS_COMPLETE) {
1616 res = DID_OK << 16;
1617 } else {
1618 if (comp_status == CS_DATA_UNDERRUN) {
1619 res = DID_OK << 16;
1620 els->u.els_plogi.len =
1621 le16_to_cpu(((struct els_sts_entry_24xx *)
1622 pkt)->total_byte_count);
1623 } else {
1624 els->u.els_plogi.len = 0;
1625 res = DID_ERROR << 16;
1626 }
1627 }
a1f9ab48 1628 ql_dbg(ql_dbg_user, vha, 0x503f,
edd05de1
DG		 1629 "ELS IOCB Done -%s error hdl=%x comp_status=0x%x error subcode 1=0x%x error subcode 2=0x%x total_byte=0x%x\n",
1630 type, sp->handle, comp_status, fw_status[1], fw_status[2],
1631 le16_to_cpu(((struct els_sts_entry_24xx *)
1632 pkt)->total_byte_count));
1633 goto els_ct_done;
1634 }
1635
9a069e19
GM		 1636 /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
1637 * fc payload to the caller
1638 */
a1730595
DG		 1639 bsg_job = sp->u.bsg_job;
1640 bsg_reply = bsg_job->reply;
01e0e15c 1641 bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
9a069e19
GM		 1642 bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status);
1643
1644 if (comp_status != CS_COMPLETE) {
1645 if (comp_status == CS_DATA_UNDERRUN) {
9ba56b95 1646 res = DID_OK << 16;
01e0e15c 1647 bsg_reply->reply_payload_rcv_len =
9ba56b95 1648 le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->total_byte_count);
9a069e19 1649
37fed3ee 1650 ql_dbg(ql_dbg_user, vha, 0x503f,
cfb0919c 1651 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
9a069e19 1652 "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n",
cfb0919c 1653 type, sp->handle, comp_status, fw_status[1], fw_status[2],
7c3df132
SK		 1654 le16_to_cpu(((struct els_sts_entry_24xx *)
1655 pkt)->total_byte_count));
05231a3b 1656 } else {
37fed3ee 1657 ql_dbg(ql_dbg_user, vha, 0x5040,
cfb0919c 1658 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
9a069e19 1659 "error subcode 1=0x%x error subcode 2=0x%x.\n",
cfb0919c 1660 type, sp->handle, comp_status,
7c3df132
SK		 1661 le16_to_cpu(((struct els_sts_entry_24xx *)
1662 pkt)->error_subcode_1),
1663 le16_to_cpu(((struct els_sts_entry_24xx *)
1664 pkt)->error_subcode_2));
9ba56b95 1665 res = DID_ERROR << 16;
01e0e15c 1666 bsg_reply->reply_payload_rcv_len = 0;
9a069e19 1667 }
05231a3b
CH		 1668 memcpy(bsg_job->reply + sizeof(struct fc_bsg_reply),
1669 fw_status, sizeof(fw_status));
37fed3ee 1670 ql_dump_buffer(ql_dbg_user + ql_dbg_buffer, vha, 0x5056,
f8f97b0c 1671 pkt, sizeof(*pkt));
9a069e19
GM		 1672 }
1673 else {
9ba56b95 1674 res = DID_OK << 16;
01e0e15c 1675 bsg_reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len;
9a069e19
GM		 1676 bsg_job->reply_len = 0;
1677 }
edd05de1 1678els_ct_done:
9a069e19 1679
25ff6af1 1680 sp->done(sp, res);
9a069e19
GM		 1681}
1682
ac280b67
AV		 1683static void
1684qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req,
1685 struct logio_entry_24xx *logio)
1686{
1687 const char func[] = "LOGIO-IOCB";
1688 const char *type;
ac280b67
AV		 1689 fc_port_t *fcport;
1690 srb_t *sp;
4916392b 1691 struct srb_iocb *lio;
99b0bec7 1692 uint16_t *data;
ac280b67
AV		 1693 uint32_t iop[2];
1694
1695 sp = qla2x00_get_sp_from_handle(vha, func, req, logio);
1696 if (!sp)
1697 return;
1698
9ba56b95
GM		 1699 lio = &sp->u.iocb_cmd;
1700 type = sp->name;
ac280b67 1701 fcport = sp->fcport;
4916392b 1702 data = lio->u.logio.data;
ac280b67 1703
5ff1d584 1704 data[0] = MBS_COMMAND_ERROR;
4916392b 1705 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
5ff1d584 1706 QLA_LOGIO_LOGIN_RETRIED : 0;
ac280b67 1707 if (logio->entry_status) {
5e19ed90 1708 ql_log(ql_log_warn, fcport->vha, 0x5034,
5b33469a 1709 "Async-%s error entry - %8phC hdl=%x"
d3fa9e7d 1710 "portid=%02x%02x%02x entry-status=%x.\n",
5b33469a 1711 type, fcport->port_name, sp->handle, fcport->d_id.b.domain,
cfb0919c
CD		 1712 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1713 logio->entry_status);
1714 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d,
f8f97b0c 1715 logio, sizeof(*logio));
ac280b67 1716
99b0bec7 1717 goto logio_done;
ac280b67
AV		 1718 }
1719
1720 if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) {
5e19ed90 1721 ql_dbg(ql_dbg_async, fcport->vha, 0x5036,
5b33469a
QT		 1722 "Async-%s complete - %8phC hdl=%x portid=%02x%02x%02x "
1723 "iop0=%x.\n", type, fcport->port_name, sp->handle,
1724 fcport->d_id.b.domain,
cfb0919c 1725 fcport->d_id.b.area, fcport->d_id.b.al_pa,
7c3df132 1726 le32_to_cpu(logio->io_parameter[0]));
ac280b67 1727
ead03855 1728 vha->hw->exch_starvation = 0;
ac280b67 1729 data[0] = MBS_COMMAND_COMPLETE;
03aaa89f
DT		 1730
1731 if (sp->type == SRB_PRLI_CMD) {
1732 lio->u.logio.iop[0] =
1733 le32_to_cpu(logio->io_parameter[0]);
1734 lio->u.logio.iop[1] =
1735 le32_to_cpu(logio->io_parameter[1]);
1736 goto logio_done;
1737 }
1738
9ba56b95 1739 if (sp->type != SRB_LOGIN_CMD)
99b0bec7 1740 goto logio_done;
ac280b67
AV		 1741
1742 iop[0] = le32_to_cpu(logio->io_parameter[0]);
1743 if (iop[0] & BIT_4) {
1744 fcport->port_type = FCT_TARGET;
1745 if (iop[0] & BIT_8)
8474f3a0 1746 fcport->flags |= FCF_FCP2_DEVICE;
b0cd579c 1747 } else if (iop[0] & BIT_5)
ac280b67 1748 fcport->port_type = FCT_INITIATOR;
b0cd579c 1749
2d70c103
NB		 1750 if (iop[0] & BIT_7)
1751 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
1752
ac280b67
AV		 1753 if (logio->io_parameter[7] || logio->io_parameter[8])
1754 fcport->supported_classes |= FC_COS_CLASS2;
1755 if (logio->io_parameter[9] || logio->io_parameter[10])
1756 fcport->supported_classes |= FC_COS_CLASS3;
1757
99b0bec7 1758 goto logio_done;
ac280b67
AV		 1759 }
1760
1761 iop[0] = le32_to_cpu(logio->io_parameter[0]);
1762 iop[1] = le32_to_cpu(logio->io_parameter[1]);
726b8548
QT		 1763 lio->u.logio.iop[0] = iop[0];
1764 lio->u.logio.iop[1] = iop[1];
ac280b67
AV		 1765 switch (iop[0]) {
1766 case LSC_SCODE_PORTID_USED:
1767 data[0] = MBS_PORT_ID_USED;
1768 data[1] = LSW(iop[1]);
1769 break;
1770 case LSC_SCODE_NPORT_USED:
1771 data[0] = MBS_LOOP_ID_USED;
1772 break;
5b33469a
QT		 1773 case LSC_SCODE_CMD_FAILED:
1774 if (iop[1] == 0x0606) {
1775 /*
1776 * PLOGI/PRLI Completed. We must have Recv PLOGI/PRLI,
1777 * Target side acked.
1778 */
1779 data[0] = MBS_COMMAND_COMPLETE;
1780 goto logio_done;
1781 }
1782 data[0] = MBS_COMMAND_ERROR;
1783 break;
ead03855
QT		 1784 case LSC_SCODE_NOXCB:
1785 vha->hw->exch_starvation++;
1786 if (vha->hw->exch_starvation > 5) {
83548fe2 1787 ql_log(ql_log_warn, vha, 0xd046,
ead03855
QT		 1788 "Exchange starvation. Resetting RISC\n");
1789
1790 vha->hw->exch_starvation = 0;
1791
1792 if (IS_P3P_TYPE(vha->hw))
1793 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1794 else
1795 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1796 qla2xxx_wake_dpc(vha);
1797 }
81881861 1798 /* fall through */
ac280b67
AV		 1799 default:
1800 data[0] = MBS_COMMAND_ERROR;
ac280b67
AV		 1801 break;
1802 }
1803
5e19ed90 1804 ql_dbg(ql_dbg_async, fcport->vha, 0x5037,
5b33469a
QT		 1805 "Async-%s failed - %8phC hdl=%x portid=%02x%02x%02x comp=%x "
1806 "iop0=%x iop1=%x.\n", type, fcport->port_name,
1807 sp->handle, fcport->d_id.b.domain,
d3fa9e7d 1808 fcport->d_id.b.area, fcport->d_id.b.al_pa,
ac280b67
AV		 1809 le16_to_cpu(logio->comp_status),
1810 le32_to_cpu(logio->io_parameter[0]),
7c3df132 1811 le32_to_cpu(logio->io_parameter[1]));
ac280b67 1812
99b0bec7 1813logio_done:
25ff6af1 1814 sp->done(sp, 0);
ac280b67
AV		 1815}
1816
3822263e 1817static void
faef62d1 1818qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, void *tsk)
3822263e
MI		 1819{
1820 const char func[] = "TMF-IOCB";
1821 const char *type;
1822 fc_port_t *fcport;
1823 srb_t *sp;
1824 struct srb_iocb *iocb;
3822263e 1825 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
3822263e
MI		 1826
1827 sp = qla2x00_get_sp_from_handle(vha, func, req, tsk);
1828 if (!sp)
1829 return;
1830
9ba56b95
GM		 1831 iocb = &sp->u.iocb_cmd;
1832 type = sp->name;
3822263e 1833 fcport = sp->fcport;
faef62d1 1834 iocb->u.tmf.data = QLA_SUCCESS;
3822263e
MI		 1835
1836 if (sts->entry_status) {
5e19ed90 1837 ql_log(ql_log_warn, fcport->vha, 0x5038,
cfb0919c
CD		 1838 "Async-%s error - hdl=%x entry-status(%x).\n",
1839 type, sp->handle, sts->entry_status);
faef62d1 1840 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
ad950360 1841 } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) {
5e19ed90 1842 ql_log(ql_log_warn, fcport->vha, 0x5039,
cfb0919c
CD		 1843 "Async-%s error - hdl=%x completion status(%x).\n",
1844 type, sp->handle, sts->comp_status);
faef62d1
AB		 1845 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
1846 } else if ((le16_to_cpu(sts->scsi_status) &
3822263e 1847 SS_RESPONSE_INFO_LEN_VALID)) {
faef62d1
AB		 1848 if (le32_to_cpu(sts->rsp_data_len) < 4) {
1849 ql_log(ql_log_warn, fcport->vha, 0x503b,
1850 "Async-%s error - hdl=%x not enough response(%d).\n",
1851 type, sp->handle, sts->rsp_data_len);
1852 } else if (sts->data[3]) {
1853 ql_log(ql_log_warn, fcport->vha, 0x503c,
1854 "Async-%s error - hdl=%x response(%x).\n",
1855 type, sp->handle, sts->data[3]);
8d2b21db 1856 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
faef62d1 1857 }
3822263e
MI		 1858 }
1859
faef62d1 1860 if (iocb->u.tmf.data != QLA_SUCCESS)
f8f97b0c
JC		 1861 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, sp->vha, 0x5055,
1862 sts, sizeof(*sts));
3822263e 1863
25ff6af1 1864 sp->done(sp, 0);
3822263e
MI		 1865}
1866
60dd6e8e
DT		 1867static void qla24xx_nvme_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1868 void *tsk, srb_t *sp)
7401bc18 1869{
7401bc18 1870 fc_port_t *fcport;
7401bc18
DG		 1871 struct srb_iocb *iocb;
1872 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
1873 uint16_t state_flags;
1874 struct nvmefc_fcp_req *fd;
4072e1dc
DT		 1875 uint16_t ret = QLA_SUCCESS;
1876 uint16_t comp_status = le16_to_cpu(sts->comp_status);
7401bc18
DG		 1877
1878 iocb = &sp->u.iocb_cmd;
1879 fcport = sp->fcport;
4072e1dc 1880 iocb->u.nvme.comp_status = comp_status;
7401bc18
DG		 1881 state_flags = le16_to_cpu(sts->state_flags);
1882 fd = iocb->u.nvme.desc;
7401bc18 1883
60dd6e8e 1884 if (unlikely(iocb->u.nvme.aen_op))
deeae7a6 1885 atomic_dec(&sp->vha->hw->nvme_active_aen_cnt);
7401bc18
DG		 1886
1887 /*
1888 * State flags: Bit 6 and 0.
1889 * If 0 is set, we don't care about 6.
1890 * both cases resp was dma'd to host buffer
1891 * if both are 0, that is good path case.
1892 * if six is set and 0 is clear, we need to
1893 * copy resp data from status iocb to resp buffer.
1894 */
1895 if (!(state_flags & (SF_FCP_RSP_DMA | SF_NVME_ERSP))) {
1896 iocb->u.nvme.rsp_pyld_len = 0;
1897 } else if ((state_flags & SF_FCP_RSP_DMA)) {
1898 iocb->u.nvme.rsp_pyld_len = le16_to_cpu(sts->nvme_rsp_pyld_len);
1899 } else if (state_flags & SF_NVME_ERSP) {
1900 uint32_t *inbuf, *outbuf;
1901 uint16_t iter;
1902
1903 inbuf = (uint32_t *)&sts->nvme_ersp_data;
1904 outbuf = (uint32_t *)fd->rspaddr;
1905 iocb->u.nvme.rsp_pyld_len = le16_to_cpu(sts->nvme_rsp_pyld_len);
1906 iter = iocb->u.nvme.rsp_pyld_len >> 2;
1907 for (; iter; iter--)
1908 *outbuf++ = swab32(*inbuf++);
1909 } else { /* unhandled case */
1910 ql_log(ql_log_warn, fcport->vha, 0x503a,
1911 "NVME-%s error. Unhandled state_flags of %x\n",
1912 sp->name, state_flags);
1913 }
1914
1915 fd->transferred_length = fd->payload_length -
1916 le32_to_cpu(sts->residual_len);
1917
4072e1dc
DT		 1918 if (unlikely(comp_status != CS_COMPLETE))
1919 ql_log(ql_log_warn, fcport->vha, 0x5060,
1920 "NVME-%s ERR Handling - hdl=%x status(%x) tr_len:%x resid=%x ox_id=%x\n",
1921 sp->name, sp->handle, comp_status,
1922 fd->transferred_length, le32_to_cpu(sts->residual_len),
1923 sts->ox_id);
1924
1925 /*
1926 * If transport error then Failure (HBA rejects request)
1927 * otherwise transport will handle.
1928 */
1929 switch (comp_status) {
60dd6e8e 1930 case CS_COMPLETE:
60dd6e8e 1931 break;
4072e1dc 1932
60dd6e8e
DT		 1933 case CS_RESET:
1934 case CS_PORT_UNAVAILABLE:
1935 case CS_PORT_LOGGED_OUT:
4072e1dc
DT		 1936 fcport->nvme_flag |= NVME_FLAG_RESETTING;
1937 /* fall through */
1938 case CS_ABORTED:
60dd6e8e 1939 case CS_PORT_BUSY:
60dd6e8e
DT		 1940 fd->transferred_length = 0;
1941 iocb->u.nvme.rsp_pyld_len = 0;
1942 ret = QLA_ABORTED;
1943 break;
4072e1dc
DT		 1944 case CS_DATA_UNDERRUN:
1945 break;
60dd6e8e 1946 default:
7401bc18 1947 ret = QLA_FUNCTION_FAILED;
60dd6e8e 1948 break;
7401bc18
DG		 1949 }
1950 sp->done(sp, ret);
1951}
1952
2853192e
QT		 1953static void qla_ctrlvp_completed(scsi_qla_host_t *vha, struct req_que *req,
1954 struct vp_ctrl_entry_24xx *vce)
1955{
1956 const char func[] = "CTRLVP-IOCB";
1957 srb_t *sp;
1958 int rval = QLA_SUCCESS;
1959
1960 sp = qla2x00_get_sp_from_handle(vha, func, req, vce);
1961 if (!sp)
1962 return;
1963
1964 if (vce->entry_status != 0) {
1965 ql_dbg(ql_dbg_vport, vha, 0x10c4,
1966 "%s: Failed to complete IOCB -- error status (%x)\n",
1967 sp->name, vce->entry_status);
1968 rval = QLA_FUNCTION_FAILED;
1969 } else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) {
1970 ql_dbg(ql_dbg_vport, vha, 0x10c5,
1971 "%s: Failed to complete IOCB -- completion status (%x) vpidx %x\n",
1972 sp->name, le16_to_cpu(vce->comp_status),
1973 le16_to_cpu(vce->vp_idx_failed));
1974 rval = QLA_FUNCTION_FAILED;
1975 } else {
1976 ql_dbg(ql_dbg_vport, vha, 0x10c6,
1977 "Done %s.\n", __func__);
1978 }
1979
1980 sp->rc = rval;
1981 sp->done(sp, rval);
1982}
1983
7b006b97
BVA		 1984/* Process a single response queue entry. */
1985static void qla2x00_process_response_entry(struct scsi_qla_host *vha,
1986 struct rsp_que *rsp,
1987 sts_entry_t *pkt)
1988{
1989 sts21_entry_t *sts21_entry;
1990 sts22_entry_t *sts22_entry;
1991 uint16_t handle_cnt;
1992 uint16_t cnt;
1993
1994 switch (pkt->entry_type) {
1995 case STATUS_TYPE:
1996 qla2x00_status_entry(vha, rsp, pkt);
1997 break;
1998 case STATUS_TYPE_21:
1999 sts21_entry = (sts21_entry_t *)pkt;
2000 handle_cnt = sts21_entry->handle_count;
2001 for (cnt = 0; cnt < handle_cnt; cnt++)
2002 qla2x00_process_completed_request(vha, rsp->req,
2003 sts21_entry->handle[cnt]);
2004 break;
2005 case STATUS_TYPE_22:
2006 sts22_entry = (sts22_entry_t *)pkt;
2007 handle_cnt = sts22_entry->handle_count;
2008 for (cnt = 0; cnt < handle_cnt; cnt++)
2009 qla2x00_process_completed_request(vha, rsp->req,
2010 sts22_entry->handle[cnt]);
2011 break;
2012 case STATUS_CONT_TYPE:
2013 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
2014 break;
2015 case MBX_IOCB_TYPE:
2016 qla2x00_mbx_iocb_entry(vha, rsp->req, (struct mbx_entry *)pkt);
2017 break;
2018 case CT_IOCB_TYPE:
2019 qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
2020 break;
2021 default:
2022 /* Type Not Supported. */
2023 ql_log(ql_log_warn, vha, 0x504a,
2024 "Received unknown response pkt type %x entry status=%x.\n",
2025 pkt->entry_type, pkt->entry_status);
2026 break;
2027 }
2028}
2029
1da177e4
LT		 2030/**
2031 * qla2x00_process_response_queue() - Process response queue entries.
2db6228d 2032 * @rsp: response queue
1da177e4
LT		 2033 */
2034void
73208dfd 2035qla2x00_process_response_queue(struct rsp_que *rsp)
1da177e4 2036{
73208dfd
AC		 2037 struct scsi_qla_host *vha;
2038 struct qla_hw_data *ha = rsp->hw;
3d71644c 2039 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 2040 sts_entry_t *pkt;
73208dfd 2041
2afa19a9 2042 vha = pci_get_drvdata(ha->pdev);
1da177e4 2043
e315cd28 2044 if (!vha->flags.online)
1da177e4
LT		 2045 return;
2046
e315cd28
AC		 2047 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
2048 pkt = (sts_entry_t *)rsp->ring_ptr;
1da177e4 2049
e315cd28
AC		 2050 rsp->ring_index++;
2051 if (rsp->ring_index == rsp->length) {
2052 rsp->ring_index = 0;
2053 rsp->ring_ptr = rsp->ring;
1da177e4 2054 } else {
e315cd28 2055 rsp->ring_ptr++;
1da177e4
LT		 2056 }
2057
2058 if (pkt->entry_status != 0) {
73208dfd 2059 qla2x00_error_entry(vha, rsp, pkt);
1da177e4
LT		 2060 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2061 wmb();
2062 continue;
2063 }
2064
7b006b97 2065 qla2x00_process_response_entry(vha, rsp, pkt);
1da177e4
LT		 2066 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2067 wmb();
2068 }
2069
2070 /* Adjust ring index */
e315cd28 2071 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index);
1da177e4
LT		 2072}
2073
4733fcb1 2074static inline void
5544213b 2075qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
9ba56b95 2076 uint32_t sense_len, struct rsp_que *rsp, int res)
4733fcb1 2077{
25ff6af1 2078 struct scsi_qla_host *vha = sp->vha;
9ba56b95
GM		 2079 struct scsi_cmnd *cp = GET_CMD_SP(sp);
2080 uint32_t track_sense_len;
4733fcb1
AV		 2081
2082 if (sense_len >= SCSI_SENSE_BUFFERSIZE)
2083 sense_len = SCSI_SENSE_BUFFERSIZE;
2084
9ba56b95
GM		 2085 SET_CMD_SENSE_LEN(sp, sense_len);
2086 SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
2087 track_sense_len = sense_len;
2088
2089 if (sense_len > par_sense_len)
5544213b 2090 sense_len = par_sense_len;
4733fcb1
AV		 2091
2092 memcpy(cp->sense_buffer, sense_data, sense_len);
2093
9ba56b95
GM		 2094 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
2095 track_sense_len -= sense_len;
2096 SET_CMD_SENSE_LEN(sp, track_sense_len);
2097
2098 if (track_sense_len != 0) {
2afa19a9 2099 rsp->status_srb = sp;
9ba56b95
GM		 2100 cp->result = res;
2101 }
4733fcb1 2102
cfb0919c
CD		 2103 if (sense_len) {
2104 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x301c,
9cb78c16 2105 "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n",
25ff6af1 2106 sp->vha->host_no, cp->device->id, cp->device->lun,
cfb0919c 2107 cp);
7c3df132
SK		 2108 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b,
2109 cp->sense_buffer, sense_len);
cfb0919c 2110 }
4733fcb1
AV		 2111}
2112
bad75002
AE		 2113struct scsi_dif_tuple {
2114 __be16 guard; /* Checksum */
d6a03581 2115 __be16 app_tag; /* APPL identifier */
bad75002
AE		 2116 __be32 ref_tag; /* Target LBA or indirect LBA */
2117};
2118
2119/*
2120 * Checks the guard or meta-data for the type of error
2121 * detected by the HBA. In case of errors, we set the
2122 * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST
2123 * to indicate to the kernel that the HBA detected error.
2124 */
8cb2049c 2125static inline int
bad75002
AE		 2126qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24)
2127{
25ff6af1 2128 struct scsi_qla_host *vha = sp->vha;
9ba56b95 2129 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
8cb2049c
AE		 2130 uint8_t *ap = &sts24->data[12];
2131 uint8_t *ep = &sts24->data[20];
bad75002
AE		 2132 uint32_t e_ref_tag, a_ref_tag;
2133 uint16_t e_app_tag, a_app_tag;
2134 uint16_t e_guard, a_guard;
2135
8cb2049c
AE		 2136 /*
2137 * swab32 of the "data" field in the beginning of qla2x00_status_entry()
2138 * would make guard field appear at offset 2
2139 */
2140 a_guard = le16_to_cpu(*(uint16_t *)(ap + 2));
2141 a_app_tag = le16_to_cpu(*(uint16_t *)(ap + 0));
2142 a_ref_tag = le32_to_cpu(*(uint32_t *)(ap + 4));
2143 e_guard = le16_to_cpu(*(uint16_t *)(ep + 2));
2144 e_app_tag = le16_to_cpu(*(uint16_t *)(ep + 0));
2145 e_ref_tag = le32_to_cpu(*(uint32_t *)(ep + 4));
bad75002 2146
7c3df132
SK		 2147 ql_dbg(ql_dbg_io, vha, 0x3023,
2148 "iocb(s) %p Returned STATUS.\n", sts24);
bad75002 2149
7c3df132
SK		 2150 ql_dbg(ql_dbg_io, vha, 0x3024,
2151 "DIF ERROR in cmd 0x%x lba 0x%llx act ref"
bad75002 2152 " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app"
7c3df132 2153 " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n",
bad75002 2154 cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag,
7c3df132 2155 a_app_tag, e_app_tag, a_guard, e_guard);
bad75002 2156
8cb2049c
AE		 2157 /*
2158 * Ignore sector if:
2159 * For type 3: ref & app tag is all 'f's
2160 * For type 0,1,2: app tag is all 'f's
2161 */
128b6f9f 2162 if ((a_app_tag == T10_PI_APP_ESCAPE) &&
8cb2049c 2163 ((scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3) ||
128b6f9f 2164 (a_ref_tag == T10_PI_REF_ESCAPE))) {
8cb2049c
AE		 2165 uint32_t blocks_done, resid;
2166 sector_t lba_s = scsi_get_lba(cmd);
2167
2168 /* 2TB boundary case covered automatically with this */
2169 blocks_done = e_ref_tag - (uint32_t)lba_s + 1;
2170
2171 resid = scsi_bufflen(cmd) - (blocks_done *
2172 cmd->device->sector_size);
2173
2174 scsi_set_resid(cmd, resid);
2175 cmd->result = DID_OK << 16;
2176
2177 /* Update protection tag */
2178 if (scsi_prot_sg_count(cmd)) {
2179 uint32_t i, j = 0, k = 0, num_ent;
2180 struct scatterlist *sg;
27c0e83b 2181 struct t10_pi_tuple *spt;
8cb2049c
AE		 2182
2183 /* Patch the corresponding protection tags */
2184 scsi_for_each_prot_sg(cmd, sg,
2185 scsi_prot_sg_count(cmd), i) {
2186 num_ent = sg_dma_len(sg) / 8;
2187 if (k + num_ent < blocks_done) {
2188 k += num_ent;
2189 continue;
2190 }
2191 j = blocks_done - k - 1;
2192 k = blocks_done;
2193 break;
2194 }
2195
2196 if (k != blocks_done) {
cfb0919c 2197 ql_log(ql_log_warn, vha, 0x302f,
8ec9c7fb
RD		 2198 "unexpected tag values tag:lba=%x:%llx)\n",
2199 e_ref_tag, (unsigned long long)lba_s);
8cb2049c
AE		 2200 return 1;
2201 }
2202
2203 spt = page_address(sg_page(sg)) + sg->offset;
2204 spt += j;
2205
128b6f9f 2206 spt->app_tag = T10_PI_APP_ESCAPE;
8cb2049c 2207 if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3)
128b6f9f 2208 spt->ref_tag = T10_PI_REF_ESCAPE;
8cb2049c
AE		 2209 }
2210
2211 return 0;
2212 }
2213
bad75002
AE		 2214 /* check guard */
2215 if (e_guard != a_guard) {
2216 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
2217 0x10, 0x1);
2218 set_driver_byte(cmd, DRIVER_SENSE);
2219 set_host_byte(cmd, DID_ABORT);
584d7aad 2220 cmd->result |= SAM_STAT_CHECK_CONDITION;
8cb2049c 2221 return 1;
bad75002
AE		 2222 }
2223
e02587d7
AE		 2224 /* check ref tag */
2225 if (e_ref_tag != a_ref_tag) {
bad75002 2226 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
e02587d7 2227 0x10, 0x3);
bad75002
AE		 2228 set_driver_byte(cmd, DRIVER_SENSE);
2229 set_host_byte(cmd, DID_ABORT);
584d7aad 2230 cmd->result |= SAM_STAT_CHECK_CONDITION;
8cb2049c 2231 return 1;
bad75002
AE		 2232 }
2233
e02587d7
AE		 2234 /* check appl tag */
2235 if (e_app_tag != a_app_tag) {
bad75002 2236 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
e02587d7 2237 0x10, 0x2);
bad75002
AE		 2238 set_driver_byte(cmd, DRIVER_SENSE);
2239 set_host_byte(cmd, DID_ABORT);
584d7aad 2240 cmd->result |= SAM_STAT_CHECK_CONDITION;
8cb2049c 2241 return 1;
bad75002 2242 }
e02587d7 2243
8cb2049c 2244 return 1;
bad75002
AE		 2245}
2246
a9b6f722
SK		 2247static void
2248qla25xx_process_bidir_status_iocb(scsi_qla_host_t *vha, void *pkt,
2249 struct req_que *req, uint32_t index)
2250{
2251 struct qla_hw_data *ha = vha->hw;
2252 srb_t *sp;
2253 uint16_t comp_status;
2254 uint16_t scsi_status;
2255 uint16_t thread_id;
2256 uint32_t rval = EXT_STATUS_OK;
75cc8cfc 2257 struct bsg_job *bsg_job = NULL;
01e0e15c
JT		 2258 struct fc_bsg_request *bsg_request;
2259 struct fc_bsg_reply *bsg_reply;
a9b6f722
SK		 2260 sts_entry_t *sts;
2261 struct sts_entry_24xx *sts24;
bd432bb5 2262
a9b6f722
SK		 2263 sts = (sts_entry_t *) pkt;
2264 sts24 = (struct sts_entry_24xx *) pkt;
2265
2266 /* Validate handle. */
8d93f550 2267 if (index >= req->num_outstanding_cmds) {
a9b6f722
SK		 2268 ql_log(ql_log_warn, vha, 0x70af,
2269 "Invalid SCSI completion handle 0x%x.\n", index);
2270 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2271 return;
2272 }
2273
2274 sp = req->outstanding_cmds[index];
01e0e15c 2275 if (!sp) {
a9b6f722
SK		 2276 ql_log(ql_log_warn, vha, 0x70b0,
2277 "Req:%d: Invalid ISP SCSI completion handle(0x%x)\n",
2278 req->id, index);
2279
2280 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2281 return;
2282 }
2283
01e0e15c
JT		 2284 /* Free outstanding command slot. */
2285 req->outstanding_cmds[index] = NULL;
2286 bsg_job = sp->u.bsg_job;
2287 bsg_request = bsg_job->request;
2288 bsg_reply = bsg_job->reply;
2289
a9b6f722
SK		 2290 if (IS_FWI2_CAPABLE(ha)) {
2291 comp_status = le16_to_cpu(sts24->comp_status);
2292 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
2293 } else {
2294 comp_status = le16_to_cpu(sts->comp_status);
2295 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
2296 }
2297
01e0e15c 2298 thread_id = bsg_request->rqst_data.h_vendor.vendor_cmd[1];
a9b6f722
SK		 2299 switch (comp_status) {
2300 case CS_COMPLETE:
2301 if (scsi_status == 0) {
01e0e15c 2302 bsg_reply->reply_payload_rcv_len =
a9b6f722 2303 bsg_job->reply_payload.payload_len;
fabbb8df 2304 vha->qla_stats.input_bytes +=
01e0e15c 2305 bsg_reply->reply_payload_rcv_len;
fabbb8df 2306 vha->qla_stats.input_requests++;
a9b6f722
SK		 2307 rval = EXT_STATUS_OK;
2308 }
2309 goto done;
2310
2311 case CS_DATA_OVERRUN:
2312 ql_dbg(ql_dbg_user, vha, 0x70b1,
5a68a1c2 2313 "Command completed with data overrun thread_id=%d\n",
a9b6f722
SK		 2314 thread_id);
2315 rval = EXT_STATUS_DATA_OVERRUN;
2316 break;
2317
2318 case CS_DATA_UNDERRUN:
2319 ql_dbg(ql_dbg_user, vha, 0x70b2,
5a68a1c2 2320 "Command completed with data underrun thread_id=%d\n",
a9b6f722
SK		 2321 thread_id);
2322 rval = EXT_STATUS_DATA_UNDERRUN;
2323 break;
2324 case CS_BIDIR_RD_OVERRUN:
2325 ql_dbg(ql_dbg_user, vha, 0x70b3,
2326 "Command completed with read data overrun thread_id=%d\n",
2327 thread_id);
2328 rval = EXT_STATUS_DATA_OVERRUN;
2329 break;
2330
2331 case CS_BIDIR_RD_WR_OVERRUN:
2332 ql_dbg(ql_dbg_user, vha, 0x70b4,
2333 "Command completed with read and write data overrun "
2334 "thread_id=%d\n", thread_id);
2335 rval = EXT_STATUS_DATA_OVERRUN;
2336 break;
2337
2338 case CS_BIDIR_RD_OVERRUN_WR_UNDERRUN:
2339 ql_dbg(ql_dbg_user, vha, 0x70b5,
2340 "Command completed with read data over and write data "
2341 "underrun thread_id=%d\n", thread_id);
2342 rval = EXT_STATUS_DATA_OVERRUN;
2343 break;
2344
2345 case CS_BIDIR_RD_UNDERRUN:
2346 ql_dbg(ql_dbg_user, vha, 0x70b6,
5a68a1c2 2347 "Command completed with read data underrun "
a9b6f722
SK		 2348 "thread_id=%d\n", thread_id);
2349 rval = EXT_STATUS_DATA_UNDERRUN;
2350 break;
2351
2352 case CS_BIDIR_RD_UNDERRUN_WR_OVERRUN:
2353 ql_dbg(ql_dbg_user, vha, 0x70b7,
2354 "Command completed with read data under and write data "
2355 "overrun thread_id=%d\n", thread_id);
2356 rval = EXT_STATUS_DATA_UNDERRUN;
2357 break;
2358
2359 case CS_BIDIR_RD_WR_UNDERRUN:
2360 ql_dbg(ql_dbg_user, vha, 0x70b8,
2361 "Command completed with read and write data underrun "
2362 "thread_id=%d\n", thread_id);
2363 rval = EXT_STATUS_DATA_UNDERRUN;
2364 break;
2365
2366 case CS_BIDIR_DMA:
2367 ql_dbg(ql_dbg_user, vha, 0x70b9,
2368 "Command completed with data DMA error thread_id=%d\n",
2369 thread_id);
2370 rval = EXT_STATUS_DMA_ERR;
2371 break;
2372
2373 case CS_TIMEOUT:
2374 ql_dbg(ql_dbg_user, vha, 0x70ba,
2375 "Command completed with timeout thread_id=%d\n",
2376 thread_id);
2377 rval = EXT_STATUS_TIMEOUT;
2378 break;
2379 default:
2380 ql_dbg(ql_dbg_user, vha, 0x70bb,
2381 "Command completed with completion status=0x%x "
2382 "thread_id=%d\n", comp_status, thread_id);
2383 rval = EXT_STATUS_ERR;
2384 break;
2385 }
01e0e15c 2386 bsg_reply->reply_payload_rcv_len = 0;
a9b6f722
SK		 2387
2388done:
2389 /* Return the vendor specific reply to API */
01e0e15c 2390 bsg_reply->reply_data.vendor_reply.vendor_rsp[0] = rval;
a9b6f722
SK		 2391 bsg_job->reply_len = sizeof(struct fc_bsg_reply);
2392 /* Always return DID_OK, bsg will send the vendor specific response
2393 * in this case only */
f7d5182c 2394 sp->done(sp, DID_OK << 16);
a9b6f722
SK		 2395
2396}
2397
1da177e4
LT		 2398/**
2399 * qla2x00_status_entry() - Process a Status IOCB entry.
2db6228d
BVA		 2400 * @vha: SCSI driver HA context
2401 * @rsp: response queue
1da177e4
LT		 2402 * @pkt: Entry pointer
2403 */
2404static void
73208dfd 2405qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
1da177e4 2406{
1da177e4 2407 srb_t *sp;
1da177e4
LT		 2408 fc_port_t *fcport;
2409 struct scsi_cmnd *cp;
9a853f71
AV		 2410 sts_entry_t *sts;
2411 struct sts_entry_24xx *sts24;
1da177e4
LT		 2412 uint16_t comp_status;
2413 uint16_t scsi_status;
b7d2280c 2414 uint16_t ox_id;
1da177e4
LT		 2415 uint8_t lscsi_status;
2416 int32_t resid;
5544213b
AV		 2417 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
2418 fw_resid_len;
9a853f71 2419 uint8_t *rsp_info, *sense_data;
e315cd28 2420 struct qla_hw_data *ha = vha->hw;
2afa19a9
AC		 2421 uint32_t handle;
2422 uint16_t que;
2423 struct req_que *req;
b7d2280c 2424 int logit = 1;
9ba56b95 2425 int res = 0;
a9b6f722 2426 uint16_t state_flags = 0;
e05fe292 2427 uint16_t retry_delay = 0;
9a853f71
AV		 2428
2429 sts = (sts_entry_t *) pkt;
2430 sts24 = (struct sts_entry_24xx *) pkt;
e428924c 2431 if (IS_FWI2_CAPABLE(ha)) {
9a853f71
AV		 2432 comp_status = le16_to_cpu(sts24->comp_status);
2433 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
a9b6f722 2434 state_flags = le16_to_cpu(sts24->state_flags);
9a853f71
AV		 2435 } else {
2436 comp_status = le16_to_cpu(sts->comp_status);
2437 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
2438 }
2afa19a9
AC		 2439 handle = (uint32_t) LSW(sts->handle);
2440 que = MSW(sts->handle);
2441 req = ha->req_q_map[que];
a9083016 2442
36008cf1
CD		 2443 /* Check for invalid queue pointer */
2444 if (req == NULL ||
2445 que >= find_first_zero_bit(ha->req_qid_map, ha->max_req_queues)) {
2446 ql_dbg(ql_dbg_io, vha, 0x3059,
2447 "Invalid status handle (0x%x): Bad req pointer. req=%p, "
2448 "que=%u.\n", sts->handle, req, que);
2449 return;
2450 }
2451
1da177e4 2452 /* Validate handle. */
c7bc4cae 2453 if (handle < req->num_outstanding_cmds) {
2afa19a9 2454 sp = req->outstanding_cmds[handle];
c7bc4cae
CD		 2455 if (!sp) {
2456 ql_dbg(ql_dbg_io, vha, 0x3075,
2457 "%s(%ld): Already returned command for status handle (0x%x).\n",
2458 __func__, vha->host_no, sts->handle);
2459 return;
2460 }
2461 } else {
cfb0919c 2462 ql_dbg(ql_dbg_io, vha, 0x3017,
c7bc4cae
CD		 2463 "Invalid status handle, out of range (0x%x).\n",
2464 sts->handle);
1da177e4 2465
acd3ce88
CD		 2466 if (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) {
2467 if (IS_P3P_TYPE(ha))
2468 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
2469 else
2470 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2471 qla2xxx_wake_dpc(vha);
2472 }
1da177e4
LT		 2473 return;
2474 }
a9b6f722 2475
c5419e26
QT		 2476 if (sp->cmd_type != TYPE_SRB) {
2477 req->outstanding_cmds[handle] = NULL;
2478 ql_dbg(ql_dbg_io, vha, 0x3015,
2479 "Unknown sp->cmd_type %x %p).\n",
2480 sp->cmd_type, sp);
2481 return;
2482 }
2483
7401bc18
DG		 2484 /* NVME completion. */
2485 if (sp->type == SRB_NVME_CMD) {
60dd6e8e
DT		 2486 req->outstanding_cmds[handle] = NULL;
2487 qla24xx_nvme_iocb_entry(vha, req, pkt, sp);
7401bc18
DG		 2488 return;
2489 }
2490
a9b6f722
SK		 2491 if (unlikely((state_flags & BIT_1) && (sp->type == SRB_BIDI_CMD))) {
2492 qla25xx_process_bidir_status_iocb(vha, pkt, req, handle);
2493 return;
2494 }
2495
faef62d1
AB		 2496 /* Task Management completion. */
2497 if (sp->type == SRB_TM_CMD) {
2498 qla24xx_tm_iocb_entry(vha, req, pkt);
2499 return;
2500 }
2501
a9b6f722
SK		 2502 /* Fast path completion. */
2503 if (comp_status == CS_COMPLETE && scsi_status == 0) {
2504 qla2x00_process_completed_request(vha, req, handle);
2505
2506 return;
2507 }
2508
2509 req->outstanding_cmds[handle] = NULL;
9ba56b95 2510 cp = GET_CMD_SP(sp);
1da177e4 2511 if (cp == NULL) {
cfb0919c 2512 ql_dbg(ql_dbg_io, vha, 0x3018,
7c3df132
SK		 2513 "Command already returned (0x%x/%p).\n",
2514 sts->handle, sp);
1da177e4
LT		 2515
2516 return;
2517 }
2518
8ae6d9c7 2519 lscsi_status = scsi_status & STATUS_MASK;
1da177e4 2520
bdf79621 2521 fcport = sp->fcport;
1da177e4 2522
b7d2280c 2523 ox_id = 0;
5544213b
AV		 2524 sense_len = par_sense_len = rsp_info_len = resid_len =
2525 fw_resid_len = 0;
e428924c 2526 if (IS_FWI2_CAPABLE(ha)) {
0f00a206
LC		 2527 if (scsi_status & SS_SENSE_LEN_VALID)
2528 sense_len = le32_to_cpu(sts24->sense_len);
2529 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2530 rsp_info_len = le32_to_cpu(sts24->rsp_data_len);
2531 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER))
2532 resid_len = le32_to_cpu(sts24->rsp_residual_count);
2533 if (comp_status == CS_DATA_UNDERRUN)
2534 fw_resid_len = le32_to_cpu(sts24->residual_len);
9a853f71
AV		 2535 rsp_info = sts24->data;
2536 sense_data = sts24->data;
2537 host_to_fcp_swap(sts24->data, sizeof(sts24->data));
b7d2280c 2538 ox_id = le16_to_cpu(sts24->ox_id);
5544213b 2539 par_sense_len = sizeof(sts24->data);
e05fe292 2540 /* Valid values of the retry delay timer are 0x1-0xffef */
3cedc879
AG		 2541 if (sts24->retry_delay > 0 && sts24->retry_delay < 0xfff1) {
2542 retry_delay = sts24->retry_delay & 0x3fff;
2543 ql_dbg(ql_dbg_io, sp->vha, 0x3033,
2544 "%s: scope=%#x retry_delay=%#x\n", __func__,
2545 sts24->retry_delay >> 14, retry_delay);
2546 }
9a853f71 2547 } else {
0f00a206
LC		 2548 if (scsi_status & SS_SENSE_LEN_VALID)
2549 sense_len = le16_to_cpu(sts->req_sense_length);
2550 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2551 rsp_info_len = le16_to_cpu(sts->rsp_info_len);
9a853f71
AV		 2552 resid_len = le32_to_cpu(sts->residual_length);
2553 rsp_info = sts->rsp_info;
2554 sense_data = sts->req_sense_data;
5544213b 2555 par_sense_len = sizeof(sts->req_sense_data);
9a853f71
AV		 2556 }
2557
1da177e4
LT		 2558 /* Check for any FCP transport errors. */
2559 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) {
9a853f71 2560 /* Sense data lies beyond any FCP RESPONSE data. */
5544213b 2561 if (IS_FWI2_CAPABLE(ha)) {
9a853f71 2562 sense_data += rsp_info_len;
5544213b
AV		 2563 par_sense_len -= rsp_info_len;
2564 }
9a853f71 2565 if (rsp_info_len > 3 && rsp_info[3]) {
5e19ed90 2566 ql_dbg(ql_dbg_io, fcport->vha, 0x3019,
7c3df132
SK		 2567 "FCP I/O protocol failure (0x%x/0x%x).\n",
2568 rsp_info_len, rsp_info[3]);
1da177e4 2569
9ba56b95 2570 res = DID_BUS_BUSY << 16;
b7d2280c 2571 goto out;
1da177e4
LT		 2572 }
2573 }
2574
3e8ce320
AV		 2575 /* Check for overrun. */
2576 if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE &&
2577 scsi_status & SS_RESIDUAL_OVER)
2578 comp_status = CS_DATA_OVERRUN;
2579
e05fe292
CD		 2580 /*
2581 * Check retry_delay_timer value if we receive a busy or
2582 * queue full.
2583 */
2584 if (lscsi_status == SAM_STAT_TASK_SET_FULL ||
2585 lscsi_status == SAM_STAT_BUSY)
2586 qla2x00_set_retry_delay_timestamp(fcport, retry_delay);
2587
1da177e4
LT		 2588 /*
2589 * Based on Host and scsi status generate status code for Linux
2590 */
2591 switch (comp_status) {
2592 case CS_COMPLETE:
df7baa50 2593 case CS_QUEUE_FULL:
1da177e4 2594 if (scsi_status == 0) {
9ba56b95 2595 res = DID_OK << 16;
1da177e4
LT		 2596 break;
2597 }
2598 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) {
9a853f71 2599 resid = resid_len;
385d70b4 2600 scsi_set_resid(cp, resid);
0da69df1
AV		 2601
2602 if (!lscsi_status &&
385d70b4 2603 ((unsigned)(scsi_bufflen(cp) - resid) <
0da69df1 2604 cp->underflow)) {
5e19ed90 2605 ql_dbg(ql_dbg_io, fcport->vha, 0x301a,
83548fe2 2606 "Mid-layer underflow detected (0x%x of 0x%x bytes).\n",
7c3df132 2607 resid, scsi_bufflen(cp));
0da69df1 2608
9ba56b95 2609 res = DID_ERROR << 16;
0da69df1
AV		 2610 break;
2611 }
1da177e4 2612 }
9ba56b95 2613 res = DID_OK << 16 | lscsi_status;
1da177e4 2614
df7baa50 2615 if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
5e19ed90 2616 ql_dbg(ql_dbg_io, fcport->vha, 0x301b,
7c3df132 2617 "QUEUE FULL detected.\n");
df7baa50
AV		 2618 break;
2619 }
b7d2280c 2620 logit = 0;
1da177e4
LT		 2621 if (lscsi_status != SS_CHECK_CONDITION)
2622 break;
2623
b80ca4f7 2624 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
1da177e4
LT		 2625 if (!(scsi_status & SS_SENSE_LEN_VALID))
2626 break;
2627
5544213b 2628 qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len,
9ba56b95 2629 rsp, res);
1da177e4
LT		 2630 break;
2631
2632 case CS_DATA_UNDERRUN:
ed17c71b 2633 /* Use F/W calculated residual length. */
0f00a206
LC		 2634 resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len;
2635 scsi_set_resid(cp, resid);
2636 if (scsi_status & SS_RESIDUAL_UNDER) {
2637 if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) {
5e19ed90 2638 ql_dbg(ql_dbg_io, fcport->vha, 0x301d,
83548fe2 2639 "Dropped frame(s) detected (0x%x of 0x%x bytes).\n",
7c3df132 2640 resid, scsi_bufflen(cp));
0f00a206 2641
9ba56b95 2642 res = DID_ERROR << 16 | lscsi_status;
4e85e3d9 2643 goto check_scsi_status;
6acf8190 2644 }
ed17c71b 2645
0f00a206
LC		 2646 if (!lscsi_status &&
2647 ((unsigned)(scsi_bufflen(cp) - resid) <
2648 cp->underflow)) {
5e19ed90 2649 ql_dbg(ql_dbg_io, fcport->vha, 0x301e,
83548fe2 2650 "Mid-layer underflow detected (0x%x of 0x%x bytes).\n",
7c3df132 2651 resid, scsi_bufflen(cp));
e038a1be 2652
9ba56b95 2653 res = DID_ERROR << 16;
0f00a206
LC		 2654 break;
2655 }
4aee5766
GM		 2656 } else if (lscsi_status != SAM_STAT_TASK_SET_FULL &&
2657 lscsi_status != SAM_STAT_BUSY) {
2658 /*
2659 * scsi status of task set and busy are considered to be
2660 * task not completed.
2661 */
2662
5e19ed90 2663 ql_dbg(ql_dbg_io, fcport->vha, 0x301f,
83548fe2
QT		 2664 "Dropped frame(s) detected (0x%x of 0x%x bytes).\n",
2665 resid, scsi_bufflen(cp));
0f00a206 2666
9ba56b95 2667 res = DID_ERROR << 16 | lscsi_status;
0374f55e 2668 goto check_scsi_status;
4aee5766
GM		 2669 } else {
2670 ql_dbg(ql_dbg_io, fcport->vha, 0x3030,
2671 "scsi_status: 0x%x, lscsi_status: 0x%x\n",
2672 scsi_status, lscsi_status);
1da177e4
LT		 2673 }
2674
9ba56b95 2675 res = DID_OK << 16 | lscsi_status;
b7d2280c 2676 logit = 0;
0f00a206 2677
0374f55e 2678check_scsi_status:
1da177e4 2679 /*
fa2a1ce5 2680 * Check to see if SCSI Status is non zero. If so report SCSI
1da177e4
LT		 2681 * Status.
2682 */
2683 if (lscsi_status != 0) {
ffec28a3 2684 if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
5e19ed90 2685 ql_dbg(ql_dbg_io, fcport->vha, 0x3020,
7c3df132 2686 "QUEUE FULL detected.\n");
b7d2280c 2687 logit = 1;
ffec28a3
AV		 2688 break;
2689 }
1da177e4
LT		 2690 if (lscsi_status != SS_CHECK_CONDITION)
2691 break;
2692
b80ca4f7 2693 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
1da177e4
LT		 2694 if (!(scsi_status & SS_SENSE_LEN_VALID))
2695 break;
2696
5544213b 2697 qla2x00_handle_sense(sp, sense_data, par_sense_len,
9ba56b95 2698 sense_len, rsp, res);
1da177e4
LT		 2699 }
2700 break;
2701
1da177e4
LT		 2702 case CS_PORT_LOGGED_OUT:
2703 case CS_PORT_CONFIG_CHG:
2704 case CS_PORT_BUSY:
2705 case CS_INCOMPLETE:
2706 case CS_PORT_UNAVAILABLE:
b7d2280c 2707 case CS_TIMEOUT:
ff454b01
CD		 2708 case CS_RESET:
2709
056a4483
MC		 2710 /*
2711 * We are going to have the fc class block the rport
2712 * while we try to recover so instruct the mid layer
2713 * to requeue until the class decides how to handle this.
2714 */
9ba56b95 2715 res = DID_TRANSPORT_DISRUPTED << 16;
b7d2280c
AV		 2716
2717 if (comp_status == CS_TIMEOUT) {
2718 if (IS_FWI2_CAPABLE(ha))
2719 break;
2720 else if ((le16_to_cpu(sts->status_flags) &
2721 SF_LOGOUT_SENT) == 0)
2722 break;
2723 }
2724
726b8548
QT		 2725 if (atomic_read(&fcport->state) == FCS_ONLINE) {
2726 ql_dbg(ql_dbg_disc, fcport->vha, 0x3021,
2727 "Port to be marked lost on fcport=%02x%02x%02x, current "
2728 "port state= %s comp_status %x.\n", fcport->d_id.b.domain,
2729 fcport->d_id.b.area, fcport->d_id.b.al_pa,
2730 port_state_str[atomic_read(&fcport->state)],
2731 comp_status);
2732
e315cd28 2733 qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
d8630bb9 2734 qlt_schedule_sess_for_deletion(fcport);
726b8548
QT		 2735 }
2736
1da177e4
LT		 2737 break;
2738
1da177e4 2739 case CS_ABORTED:
9ba56b95 2740 res = DID_RESET << 16;
1da177e4 2741 break;
bad75002
AE		 2742
2743 case CS_DIF_ERROR:
8cb2049c 2744 logit = qla2x00_handle_dif_error(sp, sts24);
fb6e4668 2745 res = cp->result;
bad75002 2746 break;
9e522cd8
AE		 2747
2748 case CS_TRANSPORT:
2749 res = DID_ERROR << 16;
2750
2751 if (!IS_PI_SPLIT_DET_CAPABLE(ha))
2752 break;
2753
2754 if (state_flags & BIT_4)
2755 scmd_printk(KERN_WARNING, cp,
2756 "Unsupported device '%s' found.\n",
2757 cp->device->vendor);
2758 break;
2759
50b81275
GM		 2760 case CS_DMA:
2761 ql_log(ql_log_info, fcport->vha, 0x3022,
2762 "CS_DMA error: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu portid=%06x oxid=0x%x cdb=%10phN len=0x%x rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n",
2763 comp_status, scsi_status, res, vha->host_no,
2764 cp->device->id, cp->device->lun, fcport->d_id.b24,
2765 ox_id, cp->cmnd, scsi_bufflen(cp), rsp_info_len,
2766 resid_len, fw_resid_len, sp, cp);
2767 ql_dump_buffer(ql_dbg_tgt + ql_dbg_verbose, vha, 0xe0ee,
2768 pkt, sizeof(*sts24));
2769 res = DID_ERROR << 16;
2770 break;
1da177e4 2771 default:
9ba56b95 2772 res = DID_ERROR << 16;
1da177e4
LT		 2773 break;
2774 }
2775
b7d2280c
AV		 2776out:
2777 if (logit)
5e19ed90 2778 ql_dbg(ql_dbg_io, fcport->vha, 0x3022,
9cb78c16 2779 "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu "
7b833558 2780 "portid=%02x%02x%02x oxid=0x%x cdb=%10phN len=0x%x "
c7bc4cae 2781 "rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n",
9ba56b95 2782 comp_status, scsi_status, res, vha->host_no,
cfb0919c
CD		 2783 cp->device->id, cp->device->lun, fcport->d_id.b.domain,
2784 fcport->d_id.b.area, fcport->d_id.b.al_pa, ox_id,
7b833558 2785 cp->cmnd, scsi_bufflen(cp), rsp_info_len,
c7bc4cae 2786 resid_len, fw_resid_len, sp, cp);
b7d2280c 2787
2afa19a9 2788 if (rsp->status_srb == NULL)
25ff6af1 2789 sp->done(sp, res);
1da177e4
LT		 2790}
2791
2792/**
2793 * qla2x00_status_cont_entry() - Process a Status Continuations entry.
2db6228d 2794 * @rsp: response queue
1da177e4
LT		 2795 * @pkt: Entry pointer
2796 *
2797 * Extended sense data.
2798 */
2799static void
2afa19a9 2800qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
1da177e4 2801{
9ba56b95 2802 uint8_t sense_sz = 0;
2afa19a9 2803 struct qla_hw_data *ha = rsp->hw;
7c3df132 2804 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
9ba56b95 2805 srb_t *sp = rsp->status_srb;
1da177e4 2806 struct scsi_cmnd *cp;
9ba56b95
GM		 2807 uint32_t sense_len;
2808 uint8_t *sense_ptr;
1da177e4 2809
9ba56b95
GM		 2810 if (!sp || !GET_CMD_SENSE_LEN(sp))
2811 return;
1da177e4 2812
9ba56b95
GM		 2813 sense_len = GET_CMD_SENSE_LEN(sp);
2814 sense_ptr = GET_CMD_SENSE_PTR(sp);
1da177e4 2815
9ba56b95
GM		 2816 cp = GET_CMD_SP(sp);
2817 if (cp == NULL) {
2818 ql_log(ql_log_warn, vha, 0x3025,
2819 "cmd is NULL: already returned to OS (sp=%p).\n", sp);
1da177e4 2820
9ba56b95
GM		 2821 rsp->status_srb = NULL;
2822 return;
1da177e4 2823 }
1da177e4 2824
9ba56b95
GM		 2825 if (sense_len > sizeof(pkt->data))
2826 sense_sz = sizeof(pkt->data);
2827 else
2828 sense_sz = sense_len;
c4631191 2829
9ba56b95
GM		 2830 /* Move sense data. */
2831 if (IS_FWI2_CAPABLE(ha))
2832 host_to_fcp_swap(pkt->data, sizeof(pkt->data));
2833 memcpy(sense_ptr, pkt->data, sense_sz);
2834 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c,
2835 sense_ptr, sense_sz);
c4631191 2836
9ba56b95
GM		 2837 sense_len -= sense_sz;
2838 sense_ptr += sense_sz;
c4631191 2839
9ba56b95
GM		 2840 SET_CMD_SENSE_PTR(sp, sense_ptr);
2841 SET_CMD_SENSE_LEN(sp, sense_len);
2842
2843 /* Place command on done queue. */
2844 if (sense_len == 0) {
2845 rsp->status_srb = NULL;
25ff6af1 2846 sp->done(sp, cp->result);
c4631191 2847 }
c4631191
GM		 2848}
2849
1da177e4
LT		 2850/**
2851 * qla2x00_error_entry() - Process an error entry.
2db6228d
BVA		 2852 * @vha: SCSI driver HA context
2853 * @rsp: response queue
1da177e4 2854 * @pkt: Entry pointer
c5419e26 2855 * return : 1=allow further error analysis. 0=no additional error analysis.
1da177e4 2856 */
c5419e26 2857static int
73208dfd 2858qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt)
1da177e4
LT		 2859{
2860 srb_t *sp;
e315cd28 2861 struct qla_hw_data *ha = vha->hw;
c4631191 2862 const char func[] = "ERROR-IOCB";
2afa19a9 2863 uint16_t que = MSW(pkt->handle);
a6fe35c0 2864 struct req_que *req = NULL;
9ba56b95 2865 int res = DID_ERROR << 16;
7c3df132 2866
9ba56b95 2867 ql_dbg(ql_dbg_async, vha, 0x502a,
82de802a
QT		 2868 "iocb type %xh with error status %xh, handle %xh, rspq id %d\n",
2869 pkt->entry_type, pkt->entry_status, pkt->handle, rsp->id);
9ba56b95 2870
a6fe35c0
AE		 2871 if (que >= ha->max_req_queues || !ha->req_q_map[que])
2872 goto fatal;
2873
2874 req = ha->req_q_map[que];
2875
9ba56b95
GM		 2876 if (pkt->entry_status & RF_BUSY)
2877 res = DID_BUS_BUSY << 16;
1da177e4 2878
c5419e26
QT		 2879 if ((pkt->handle & ~QLA_TGT_HANDLE_MASK) == QLA_TGT_SKIP_HANDLE)
2880 return 0;
4f060736 2881
c5419e26
QT		 2882 switch (pkt->entry_type) {
2883 case NOTIFY_ACK_TYPE:
2884 case STATUS_TYPE:
2885 case STATUS_CONT_TYPE:
2886 case LOGINOUT_PORT_IOCB_TYPE:
2887 case CT_IOCB_TYPE:
2888 case ELS_IOCB_TYPE:
2889 case ABORT_IOCB_TYPE:
2890 case MBX_IOCB_TYPE:
527b8ae3 2891 default:
c5419e26
QT		 2892 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2893 if (sp) {
2894 sp->done(sp, res);
2895 return 0;
2896 }
2897 break;
2898
2899 case ABTS_RESP_24XX:
2900 case CTIO_TYPE7:
2901 case CTIO_CRC2:
c5419e26 2902 return 1;
1da177e4 2903 }
a6fe35c0
AE		 2904fatal:
2905 ql_log(ql_log_warn, vha, 0x5030,
fd49a540 2906 "Error entry - invalid handle/queue (%04x).\n", que);
c5419e26 2907 return 0;
1da177e4
LT		 2908}
2909
9a853f71
AV		 2910/**
2911 * qla24xx_mbx_completion() - Process mailbox command completions.
2db6228d 2912 * @vha: SCSI driver HA context
9a853f71
AV		 2913 * @mb0: Mailbox0 register
2914 */
2915static void
e315cd28 2916qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
9a853f71
AV		 2917{
2918 uint16_t cnt;
4fa94f83 2919 uint32_t mboxes;
9a853f71 2920 uint16_t __iomem *wptr;
e315cd28 2921 struct qla_hw_data *ha = vha->hw;
9a853f71
AV		 2922 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2923
4fa94f83 2924 /* Read all mbox registers? */
c02189e1
BVA		 2925 WARN_ON_ONCE(ha->mbx_count > 32);
2926 mboxes = (1ULL << ha->mbx_count) - 1;
4fa94f83 2927 if (!ha->mcp)
a720101d 2928 ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERROR.\n");
4fa94f83
AV		 2929 else
2930 mboxes = ha->mcp->in_mb;
2931
9a853f71
AV		 2932 /* Load return mailbox registers. */
2933 ha->flags.mbox_int = 1;
2934 ha->mailbox_out[0] = mb0;
4fa94f83 2935 mboxes >>= 1;
9a853f71
AV		 2936 wptr = (uint16_t __iomem *)&reg->mailbox1;
2937
2938 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
4fa94f83
AV		 2939 if (mboxes & BIT_0)
2940 ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
2941
2942 mboxes >>= 1;
9a853f71
AV		 2943 wptr++;
2944 }
9a853f71
AV		 2945}
2946
4440e46d
AB		 2947static void
2948qla24xx_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2949 struct abort_entry_24xx *pkt)
2950{
2951 const char func[] = "ABT_IOCB";
2952 srb_t *sp;
2953 struct srb_iocb *abt;
2954
2955 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2956 if (!sp)
2957 return;
2958
2959 abt = &sp->u.iocb_cmd;
15f30a57 2960 abt->u.abt.comp_status = le16_to_cpu(pkt->nport_handle);
25ff6af1 2961 sp->done(sp, 0);
4440e46d
AB		 2962}
2963
0f7e51f6 2964void qla24xx_nvme_ls4_iocb(struct scsi_qla_host *vha,
2965 struct pt_ls4_request *pkt, struct req_que *req)
e84067d7
DG		 2966{
2967 srb_t *sp;
2968 const char func[] = "LS4_IOCB";
2969 uint16_t comp_status;
2970
2971 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2972 if (!sp)
2973 return;
2974
2975 comp_status = le16_to_cpu(pkt->status);
2976 sp->done(sp, comp_status);
2977}
2978
9a853f71
AV		 2979/**
2980 * qla24xx_process_response_queue() - Process response queue entries.
2db6228d
BVA		 2981 * @vha: SCSI driver HA context
2982 * @rsp: response queue
9a853f71 2983 */
2afa19a9
AC		 2984void qla24xx_process_response_queue(struct scsi_qla_host *vha,
2985 struct rsp_que *rsp)
9a853f71 2986{
9a853f71 2987 struct sts_entry_24xx *pkt;
a9083016 2988 struct qla_hw_data *ha = vha->hw;
9a853f71 2989
ec7193e2 2990 if (!ha->flags.fw_started)
9a853f71
AV		 2991 return;
2992
e326d22a
QT		 2993 if (rsp->qpair->cpuid != smp_processor_id())
2994 qla_cpu_update(rsp->qpair, smp_processor_id());
2995
e315cd28
AC		 2996 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
2997 pkt = (struct sts_entry_24xx *)rsp->ring_ptr;
9a853f71 2998
e315cd28
AC		 2999 rsp->ring_index++;
3000 if (rsp->ring_index == rsp->length) {
3001 rsp->ring_index = 0;
3002 rsp->ring_ptr = rsp->ring;
9a853f71 3003 } else {
e315cd28 3004 rsp->ring_ptr++;
9a853f71
AV		 3005 }
3006
3007 if (pkt->entry_status != 0) {
c5419e26 3008 if (qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt))
f83adb61 3009 goto process_err;
2d70c103 3010
9a853f71
AV		 3011 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
3012 wmb();
3013 continue;
3014 }
f83adb61 3015process_err:
9a853f71
AV		 3016
3017 switch (pkt->entry_type) {
3018 case STATUS_TYPE:
73208dfd 3019 qla2x00_status_entry(vha, rsp, pkt);
9a853f71
AV		 3020 break;
3021 case STATUS_CONT_TYPE:
2afa19a9 3022 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
9a853f71 3023 break;
2c3dfe3f 3024 case VP_RPT_ID_IOCB_TYPE:
e315cd28 3025 qla24xx_report_id_acquisition(vha,
2c3dfe3f
SJ		 3026 (struct vp_rpt_id_entry_24xx *)pkt);
3027 break;
ac280b67
AV		 3028 case LOGINOUT_PORT_IOCB_TYPE:
3029 qla24xx_logio_entry(vha, rsp->req,
3030 (struct logio_entry_24xx *)pkt);
3031 break;
f83adb61 3032 case CT_IOCB_TYPE:
9a069e19 3033 qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
9a069e19 3034 break;
f83adb61 3035 case ELS_IOCB_TYPE:
9a069e19
GM		 3036 qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE);
3037 break;
2d70c103 3038 case ABTS_RECV_24XX:
ecc89f25
JC		 3039 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3040 IS_QLA28XX(ha)) {
2f424b9b 3041 /* ensure that the ATIO queue is empty */
82de802a
QT		 3042 qlt_handle_abts_recv(vha, rsp,
3043 (response_t *)pkt);
2f424b9b
QT		 3044 break;
3045 } else {
2f424b9b
QT		 3046 qlt_24xx_process_atio_queue(vha, 1);
3047 }
81881861 3048 /* fall through */
2d70c103
NB		 3049 case ABTS_RESP_24XX:
3050 case CTIO_TYPE7:
f83adb61 3051 case CTIO_CRC2:
82de802a 3052 qlt_response_pkt_all_vps(vha, rsp, (response_t *)pkt);
2d70c103 3053 break;
e84067d7
DG		 3054 case PT_LS4_REQUEST:
3055 qla24xx_nvme_ls4_iocb(vha, (struct pt_ls4_request *)pkt,
3056 rsp->req);
3057 break;
726b8548
QT		 3058 case NOTIFY_ACK_TYPE:
3059 if (pkt->handle == QLA_TGT_SKIP_HANDLE)
82de802a
QT		 3060 qlt_response_pkt_all_vps(vha, rsp,
3061 (response_t *)pkt);
726b8548
QT		 3062 else
3063 qla24xxx_nack_iocb_entry(vha, rsp->req,
3064 (struct nack_to_isp *)pkt);
3065 break;
54883291
SK		 3066 case MARKER_TYPE:
3067 /* Do nothing in this case, this check is to prevent it
3068 * from falling into default case
3069 */
3070 break;
4440e46d
AB		 3071 case ABORT_IOCB_TYPE:
3072 qla24xx_abort_iocb_entry(vha, rsp->req,
3073 (struct abort_entry_24xx *)pkt);
3074 break;
726b8548
QT		 3075 case MBX_IOCB_TYPE:
3076 qla24xx_mbx_iocb_entry(vha, rsp->req,
3077 (struct mbx_24xx_entry *)pkt);
3078 break;
2853192e
QT		 3079 case VP_CTRL_IOCB_TYPE:
3080 qla_ctrlvp_completed(vha, rsp->req,
3081 (struct vp_ctrl_entry_24xx *)pkt);
3082 break;
9a853f71
AV		 3083 default:
3084 /* Type Not Supported. */
7c3df132
SK		 3085 ql_dbg(ql_dbg_async, vha, 0x5042,
3086 "Received unknown response pkt type %x "
9a853f71 3087 "entry status=%x.\n",
7c3df132 3088 pkt->entry_type, pkt->entry_status);
9a853f71
AV		 3089 break;
3090 }
3091 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
3092 wmb();
3093 }
3094
3095 /* Adjust ring index */
7ec0effd 3096 if (IS_P3P_TYPE(ha)) {
a9083016 3097 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82;
bd432bb5 3098
a9083016 3099 WRT_REG_DWORD(&reg->rsp_q_out[0], rsp->ring_index);
726b8548 3100 } else {
a9083016 3101 WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index);
726b8548 3102 }
9a853f71
AV		 3103}
3104
05236a05 3105static void
e315cd28 3106qla2xxx_check_risc_status(scsi_qla_host_t *vha)
05236a05
AV		 3107{
3108 int rval;
3109 uint32_t cnt;
e315cd28 3110 struct qla_hw_data *ha = vha->hw;
05236a05
AV		 3111 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3112
f73cb695 3113 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
ecc89f25 3114 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
05236a05
AV		 3115 return;
3116
3117 rval = QLA_SUCCESS;
3118 WRT_REG_DWORD(&reg->iobase_addr, 0x7C00);
3119 RD_REG_DWORD(&reg->iobase_addr);
3120 WRT_REG_DWORD(&reg->iobase_window, 0x0001);
3121 for (cnt = 10000; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
3122 rval == QLA_SUCCESS; cnt--) {
3123 if (cnt) {
3124 WRT_REG_DWORD(&reg->iobase_window, 0x0001);
3125 udelay(10);
3126 } else
3127 rval = QLA_FUNCTION_TIMEOUT;
3128 }
3129 if (rval == QLA_SUCCESS)
3130 goto next_test;
3131
b2ec76c5 3132 rval = QLA_SUCCESS;
05236a05
AV		 3133 WRT_REG_DWORD(&reg->iobase_window, 0x0003);
3134 for (cnt = 100; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
3135 rval == QLA_SUCCESS; cnt--) {
3136 if (cnt) {
3137 WRT_REG_DWORD(&reg->iobase_window, 0x0003);
3138 udelay(10);
3139 } else
3140 rval = QLA_FUNCTION_TIMEOUT;
3141 }
3142 if (rval != QLA_SUCCESS)
3143 goto done;
3144
3145next_test:
3146 if (RD_REG_DWORD(&reg->iobase_c8) & BIT_3)
7c3df132
SK		 3147 ql_log(ql_log_info, vha, 0x504c,
3148 "Additional code -- 0x55AA.\n");
05236a05
AV		 3149
3150done:
3151 WRT_REG_DWORD(&reg->iobase_window, 0x0000);
3152 RD_REG_DWORD(&reg->iobase_window);
3153}
3154
9a853f71 3155/**
6246b8a1 3156 * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP24xx.
807eb907 3157 * @irq: interrupt number
9a853f71 3158 * @dev_id: SCSI driver HA context
9a853f71
AV		 3159 *
3160 * Called by system whenever the host adapter generates an interrupt.
3161 *
3162 * Returns handled flag.
3163 */
3164irqreturn_t
7d12e780 3165qla24xx_intr_handler(int irq, void *dev_id)
9a853f71 3166{
e315cd28
AC		 3167 scsi_qla_host_t *vha;
3168 struct qla_hw_data *ha;
9a853f71
AV		 3169 struct device_reg_24xx __iomem *reg;
3170 int status;
9a853f71
AV		 3171 unsigned long iter;
3172 uint32_t stat;
3173 uint32_t hccr;
7d613ac6 3174 uint16_t mb[8];
e315cd28 3175 struct rsp_que *rsp;
43fac4d9 3176 unsigned long flags;
1073daa4 3177 bool process_atio = false;
9a853f71 3178
e315cd28
AC		 3179 rsp = (struct rsp_que *) dev_id;
3180 if (!rsp) {
3256b435
CD		 3181 ql_log(ql_log_info, NULL, 0x5059,
3182 "%s: NULL response queue pointer.\n", __func__);
9a853f71
AV		 3183 return IRQ_NONE;
3184 }
3185
e315cd28 3186 ha = rsp->hw;
9a853f71
AV		 3187 reg = &ha->iobase->isp24;
3188 status = 0;
3189
85880801
AV		 3190 if (unlikely(pci_channel_offline(ha->pdev)))
3191 return IRQ_HANDLED;
3192
43fac4d9 3193 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 3194 vha = pci_get_drvdata(ha->pdev);
9a853f71
AV		 3195 for (iter = 50; iter--; ) {
3196 stat = RD_REG_DWORD(&reg->host_status);
c821e0d5 3197 if (qla2x00_check_reg32_for_disconnect(vha, stat))
f3ddac19 3198 break;
9a853f71 3199 if (stat & HSRX_RISC_PAUSED) {
85880801 3200 if (unlikely(pci_channel_offline(ha->pdev)))
14e660e6
SJ		 3201 break;
3202
9a853f71
AV		 3203 hccr = RD_REG_DWORD(&reg->hccr);
3204
7c3df132
SK		 3205 ql_log(ql_log_warn, vha, 0x504b,
3206 "RISC paused -- HCCR=%x, Dumping firmware.\n",
3207 hccr);
05236a05 3208
e315cd28 3209 qla2xxx_check_risc_status(vha);
05236a05 3210
e315cd28
AC		 3211 ha->isp_ops->fw_dump(vha, 1);
3212 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
9a853f71
AV		 3213 break;
3214 } else if ((stat & HSRX_RISC_INT) == 0)
3215 break;
3216
3217 switch (stat & 0xff) {
fafbda9f
AE		 3218 case INTR_ROM_MB_SUCCESS:
3219 case INTR_ROM_MB_FAILED:
3220 case INTR_MB_SUCCESS:
3221 case INTR_MB_FAILED:
e315cd28 3222 qla24xx_mbx_completion(vha, MSW(stat));
9a853f71
AV		 3223 status |= MBX_INTERRUPT;
3224
3225 break;
fafbda9f 3226 case INTR_ASYNC_EVENT:
9a853f71
AV		 3227 mb[0] = MSW(stat);
3228 mb[1] = RD_REG_WORD(&reg->mailbox1);
3229 mb[2] = RD_REG_WORD(&reg->mailbox2);
3230 mb[3] = RD_REG_WORD(&reg->mailbox3);
73208dfd 3231 qla2x00_async_event(vha, rsp, mb);
9a853f71 3232 break;
fafbda9f
AE		 3233 case INTR_RSP_QUE_UPDATE:
3234 case INTR_RSP_QUE_UPDATE_83XX:
2afa19a9 3235 qla24xx_process_response_queue(vha, rsp);
9a853f71 3236 break;
c9558869 3237 case INTR_ATIO_QUE_UPDATE_27XX:
1073daa4
QT		 3238 case INTR_ATIO_QUE_UPDATE:
3239 process_atio = true;
2d70c103 3240 break;
1073daa4
QT		 3241 case INTR_ATIO_RSP_QUE_UPDATE:
3242 process_atio = true;
2d70c103
NB		 3243 qla24xx_process_response_queue(vha, rsp);
3244 break;
9a853f71 3245 default:
7c3df132
SK		 3246 ql_dbg(ql_dbg_async, vha, 0x504f,
3247 "Unrecognized interrupt type (%d).\n", stat * 0xff);
9a853f71
AV		 3248 break;
3249 }
3250 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
3251 RD_REG_DWORD_RELAXED(&reg->hccr);
cb860bbd
GM		 3252 if (unlikely(IS_QLA83XX(ha) && (ha->pdev->revision == 1)))
3253 ndelay(3500);
9a853f71 3254 }
36439832 3255 qla2x00_handle_mbx_completion(ha, status);
43fac4d9 3256 spin_unlock_irqrestore(&ha->hardware_lock, flags);
9a853f71 3257
1073daa4
QT		 3258 if (process_atio) {
3259 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
3260 qlt_24xx_process_atio_queue(vha, 0);
3261 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags);
3262 }
3263
9a853f71
AV		 3264 return IRQ_HANDLED;
3265}
3266
a8488abe
AV		 3267static irqreturn_t
3268qla24xx_msix_rsp_q(int irq, void *dev_id)
3269{
e315cd28
AC		 3270 struct qla_hw_data *ha;
3271 struct rsp_que *rsp;
a8488abe 3272 struct device_reg_24xx __iomem *reg;
2afa19a9 3273 struct scsi_qla_host *vha;
0f19bc68 3274 unsigned long flags;
a8488abe 3275
e315cd28
AC		 3276 rsp = (struct rsp_que *) dev_id;
3277 if (!rsp) {
3256b435
CD		 3278 ql_log(ql_log_info, NULL, 0x505a,
3279 "%s: NULL response queue pointer.\n", __func__);
e315cd28
AC		 3280 return IRQ_NONE;
3281 }
3282 ha = rsp->hw;
a8488abe
AV		 3283 reg = &ha->iobase->isp24;
3284
0f19bc68 3285 spin_lock_irqsave(&ha->hardware_lock, flags);
a8488abe 3286
a67093d4 3287 vha = pci_get_drvdata(ha->pdev);
2afa19a9 3288 qla24xx_process_response_queue(vha, rsp);
3155754a 3289 if (!ha->flags.disable_msix_handshake) {
eb94114b
AC		 3290 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
3291 RD_REG_DWORD_RELAXED(&reg->hccr);
3292 }
0f19bc68 3293 spin_unlock_irqrestore(&ha->hardware_lock, flags);
a8488abe
AV		 3294
3295 return IRQ_HANDLED;
3296}
3297
3298static irqreturn_t
3299qla24xx_msix_default(int irq, void *dev_id)
3300{
e315cd28
AC		 3301 scsi_qla_host_t *vha;
3302 struct qla_hw_data *ha;
3303 struct rsp_que *rsp;
a8488abe
AV		 3304 struct device_reg_24xx __iomem *reg;
3305 int status;
a8488abe
AV		 3306 uint32_t stat;
3307 uint32_t hccr;
7d613ac6 3308 uint16_t mb[8];
0f19bc68 3309 unsigned long flags;
1073daa4 3310 bool process_atio = false;
a8488abe 3311
e315cd28
AC		 3312 rsp = (struct rsp_que *) dev_id;
3313 if (!rsp) {
3256b435
CD		 3314 ql_log(ql_log_info, NULL, 0x505c,
3315 "%s: NULL response queue pointer.\n", __func__);
e315cd28
AC		 3316 return IRQ_NONE;
3317 }
3318 ha = rsp->hw;
a8488abe
AV		 3319 reg = &ha->iobase->isp24;
3320 status = 0;
3321
0f19bc68 3322 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 3323 vha = pci_get_drvdata(ha->pdev);
87f27015 3324 do {
a8488abe 3325 stat = RD_REG_DWORD(&reg->host_status);
c821e0d5 3326 if (qla2x00_check_reg32_for_disconnect(vha, stat))
f3ddac19 3327 break;
a8488abe 3328 if (stat & HSRX_RISC_PAUSED) {
85880801 3329 if (unlikely(pci_channel_offline(ha->pdev)))
14e660e6
SJ		 3330 break;
3331
a8488abe
AV		 3332 hccr = RD_REG_DWORD(&reg->hccr);
3333
7c3df132
SK		 3334 ql_log(ql_log_info, vha, 0x5050,
3335 "RISC paused -- HCCR=%x, Dumping firmware.\n",
3336 hccr);
05236a05 3337
e315cd28 3338 qla2xxx_check_risc_status(vha);
05236a05 3339
e315cd28
AC		 3340 ha->isp_ops->fw_dump(vha, 1);
3341 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
a8488abe
AV		 3342 break;
3343 } else if ((stat & HSRX_RISC_INT) == 0)
3344 break;
3345
3346 switch (stat & 0xff) {
fafbda9f
AE		 3347 case INTR_ROM_MB_SUCCESS:
3348 case INTR_ROM_MB_FAILED:
3349 case INTR_MB_SUCCESS:
3350 case INTR_MB_FAILED:
e315cd28 3351 qla24xx_mbx_completion(vha, MSW(stat));
a8488abe
AV		 3352 status |= MBX_INTERRUPT;
3353
3354 break;
fafbda9f 3355 case INTR_ASYNC_EVENT:
a8488abe
AV		 3356 mb[0] = MSW(stat);
3357 mb[1] = RD_REG_WORD(&reg->mailbox1);
3358 mb[2] = RD_REG_WORD(&reg->mailbox2);
3359 mb[3] = RD_REG_WORD(&reg->mailbox3);
73208dfd 3360 qla2x00_async_event(vha, rsp, mb);
a8488abe 3361 break;
fafbda9f
AE		 3362 case INTR_RSP_QUE_UPDATE:
3363 case INTR_RSP_QUE_UPDATE_83XX:
2afa19a9 3364 qla24xx_process_response_queue(vha, rsp);
a8488abe 3365 break;
c9558869 3366 case INTR_ATIO_QUE_UPDATE_27XX:
1073daa4
QT		 3367 case INTR_ATIO_QUE_UPDATE:
3368 process_atio = true;
2d70c103 3369 break;
1073daa4
QT		 3370 case INTR_ATIO_RSP_QUE_UPDATE:
3371 process_atio = true;
2d70c103
NB		 3372 qla24xx_process_response_queue(vha, rsp);
3373 break;
a8488abe 3374 default:
7c3df132
SK		 3375 ql_dbg(ql_dbg_async, vha, 0x5051,
3376 "Unrecognized interrupt type (%d).\n", stat & 0xff);
a8488abe
AV		 3377 break;
3378 }
3379 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
87f27015 3380 } while (0);
36439832 3381 qla2x00_handle_mbx_completion(ha, status);
0f19bc68 3382 spin_unlock_irqrestore(&ha->hardware_lock, flags);
a8488abe 3383
1073daa4
QT		 3384 if (process_atio) {
3385 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
3386 qlt_24xx_process_atio_queue(vha, 0);
3387 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags);
3388 }
3389
a8488abe
AV		 3390 return IRQ_HANDLED;
3391}
3392
d7459527
MH		 3393irqreturn_t
3394qla2xxx_msix_rsp_q(int irq, void *dev_id)
3395{
3396 struct qla_hw_data *ha;
3397 struct qla_qpair *qpair;
3398 struct device_reg_24xx __iomem *reg;
3399 unsigned long flags;
3400
3401 qpair = dev_id;
3402 if (!qpair) {
3403 ql_log(ql_log_info, NULL, 0x505b,
3404 "%s: NULL response queue pointer.\n", __func__);
3405 return IRQ_NONE;
3406 }
3407 ha = qpair->hw;
3408
3409 /* Clear the interrupt, if enabled, for this response queue */
3410 if (unlikely(!ha->flags.disable_msix_handshake)) {
3411 reg = &ha->iobase->isp24;
3412 spin_lock_irqsave(&ha->hardware_lock, flags);
3413 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
3414 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3415 }
3416
3417 queue_work(ha->wq, &qpair->q_work);
3418
3419 return IRQ_HANDLED;
3420}
3421
a8488abe
AV		 3422/* Interrupt handling helpers. */
3423
3424struct qla_init_msix_entry {
a8488abe 3425 const char *name;
476834c2 3426 irq_handler_t handler;
a8488abe
AV		 3427};
3428
44a8f954 3429static const struct qla_init_msix_entry msix_entries[] = {
e326d22a
QT		 3430 { "default", qla24xx_msix_default },
3431 { "rsp_q", qla24xx_msix_rsp_q },
3432 { "atio_q", qla83xx_msix_atio_q },
3433 { "qpair_multiq", qla2xxx_msix_rsp_q },
a8488abe
AV		 3434};
3435
44a8f954 3436static const struct qla_init_msix_entry qla82xx_msix_entries[] = {
a9083016
GM		 3437 { "qla2xxx (default)", qla82xx_msix_default },
3438 { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q },
3439};
3440
a8488abe 3441static int
73208dfd 3442qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
a8488abe
AV		 3443{
3444 int i, ret;
a8488abe 3445 struct qla_msix_entry *qentry;
7c3df132 3446 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
67f2db87 3447 int min_vecs = QLA_BASE_VECTORS;
17e5fc58
CH		 3448 struct irq_affinity desc = {
3449 .pre_vectors = QLA_BASE_VECTORS,
3450 };
3451
c9558869
HM		 3452 if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) &&
3453 IS_ATIO_MSIX_CAPABLE(ha)) {
17e5fc58 3454 desc.pre_vectors++;
67f2db87
MH		 3455 min_vecs++;
3456 }
17e5fc58 3457
f3e02695 3458 if (USER_CTRL_IRQ(ha) || !ha->mqiobase) {
09620eeb
QT		 3459 /* user wants to control IRQ setting for target mode */
3460 ret = pci_alloc_irq_vectors(ha->pdev, min_vecs,
3461 ha->msix_count, PCI_IRQ_MSIX);
3462 } else
3463 ret = pci_alloc_irq_vectors_affinity(ha->pdev, min_vecs,
3464 ha->msix_count, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY,
3465 &desc);
73208dfd 3466
84e32a06
AG		 3467 if (ret < 0) {
3468 ql_log(ql_log_fatal, vha, 0x00c7,
3469 "MSI-X: Failed to enable support, "
3470 "giving up -- %d/%d.\n",
3471 ha->msix_count, ret);
3472 goto msix_out;
3473 } else if (ret < ha->msix_count) {
7c3df132
SK		 3474 ql_log(ql_log_warn, vha, 0x00c6,
3475 "MSI-X: Failed to enable support "
d7459527
MH		 3476 "with %d vectors, using %d vectors.\n",
3477 ha->msix_count, ret);
cb43285f 3478 ha->msix_count = ret;
d7459527 3479 /* Recalculate queue values */
c38d1baf 3480 if (ha->mqiobase && (ql2xmqsupport || ql2xnvmeenable)) {
d7459527
MH		 3481 ha->max_req_queues = ha->msix_count - 1;
3482
3483 /* ATIOQ needs 1 vector. That's 1 less QPair */
3484 if (QLA_TGT_MODE_ENABLED())
3485 ha->max_req_queues--;
3486
3487 ha->max_rsp_queues = ha->max_req_queues;
3488
3489 ha->max_qpairs = ha->max_req_queues - 1;
3490 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0190,
3491 "Adjusted Max no of queues pairs: %d.\n", ha->max_qpairs);
3492 }
73208dfd 3493 }
f0783d43 3494 vha->irq_offset = desc.pre_vectors;
6396bb22
KC		 3495 ha->msix_entries = kcalloc(ha->msix_count,
3496 sizeof(struct qla_msix_entry),
3497 GFP_KERNEL);
73208dfd 3498 if (!ha->msix_entries) {
7c3df132
SK		 3499 ql_log(ql_log_fatal, vha, 0x00c8,
3500 "Failed to allocate memory for ha->msix_entries.\n");
73208dfd 3501 ret = -ENOMEM;
24afabdb 3502 goto free_irqs;
a8488abe
AV		 3503 }
3504 ha->flags.msix_enabled = 1;
3505
73208dfd
AC		 3506 for (i = 0; i < ha->msix_count; i++) {
3507 qentry = &ha->msix_entries[i];
4fa18345
MH		 3508 qentry->vector = pci_irq_vector(ha->pdev, i);
3509 qentry->entry = i;
a8488abe 3510 qentry->have_irq = 0;
d7459527 3511 qentry->in_use = 0;
4fa18345 3512 qentry->handle = NULL;
a8488abe
AV		 3513 }
3514
2afa19a9 3515 /* Enable MSI-X vectors for the base queue */
17e5fc58 3516 for (i = 0; i < QLA_BASE_VECTORS; i++) {
2afa19a9 3517 qentry = &ha->msix_entries[i];
4fa18345 3518 qentry->handle = rsp;
ef8d1d51 3519 rsp->msix = qentry;
d7459527 3520 scnprintf(qentry->name, sizeof(qentry->name),
e326d22a 3521 "qla2xxx%lu_%s", vha->host_no, msix_entries[i].name);
f324777e 3522 if (IS_P3P_TYPE(ha))
a9083016
GM		 3523 ret = request_irq(qentry->vector,
3524 qla82xx_msix_entries[i].handler,
3525 0, qla82xx_msix_entries[i].name, rsp);
f324777e 3526 else
a9083016
GM		 3527 ret = request_irq(qentry->vector,
3528 msix_entries[i].handler,
e326d22a 3529 0, qentry->name, rsp);
f324777e
CD		 3530 if (ret)
3531 goto msix_register_fail;
3532 qentry->have_irq = 1;
093df737 3533 qentry->in_use = 1;
f324777e
CD		 3534 }
3535
3536 /*
3537 * If target mode is enable, also request the vector for the ATIO
3538 * queue.
3539 */
c9558869
HM		 3540 if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) &&
3541 IS_ATIO_MSIX_CAPABLE(ha)) {
093df737 3542 qentry = &ha->msix_entries[QLA_ATIO_VECTOR];
ef8d1d51 3543 rsp->msix = qentry;
d7459527
MH		 3544 qentry->handle = rsp;
3545 scnprintf(qentry->name, sizeof(qentry->name),
e326d22a
QT		 3546 "qla2xxx%lu_%s", vha->host_no,
3547 msix_entries[QLA_ATIO_VECTOR].name);
093df737 3548 qentry->in_use = 1;
f324777e 3549 ret = request_irq(qentry->vector,
093df737 3550 msix_entries[QLA_ATIO_VECTOR].handler,
e326d22a 3551 0, qentry->name, rsp);
2afa19a9 3552 qentry->have_irq = 1;
73208dfd 3553 }
73208dfd 3554
f324777e
CD		 3555msix_register_fail:
3556 if (ret) {
3557 ql_log(ql_log_fatal, vha, 0x00cb,
3558 "MSI-X: unable to register handler -- %x/%d.\n",
3559 qentry->vector, ret);
4fa18345 3560 qla2x00_free_irqs(vha);
f324777e
CD		 3561 ha->mqenable = 0;
3562 goto msix_out;
3563 }
3564
73208dfd 3565 /* Enable MSI-X vector for response queue update for queue 0 */
ecc89f25 3566 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
6246b8a1 3567 if (ha->msixbase && ha->mqiobase &&
d7459527
MH		 3568 (ha->max_rsp_queues > 1 || ha->max_req_queues > 1 ||
3569 ql2xmqsupport))
6246b8a1
GM		 3570 ha->mqenable = 1;
3571 } else
d7459527
MH		 3572 if (ha->mqiobase &&
3573 (ha->max_rsp_queues > 1 || ha->max_req_queues > 1 ||
3574 ql2xmqsupport))
6246b8a1 3575 ha->mqenable = 1;
7c3df132
SK		 3576 ql_dbg(ql_dbg_multiq, vha, 0xc005,
3577 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
3578 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
3579 ql_dbg(ql_dbg_init, vha, 0x0055,
3580 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
3581 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
73208dfd 3582
a8488abe
AV		 3583msix_out:
3584 return ret;
24afabdb
BVA		 3585
3586free_irqs:
3587 pci_free_irq_vectors(ha->pdev);
3588 goto msix_out;
a8488abe
AV		 3589}
3590
3591int
73208dfd 3592qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp)
a8488abe 3593{
7fa3e239 3594 int ret = QLA_FUNCTION_FAILED;
f73cb695 3595 device_reg_t *reg = ha->iobase;
7c3df132 3596 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
a8488abe
AV		 3597
3598 /* If possible, enable MSI-X. */
e7240af5
HM		 3599 if (ql2xenablemsix == 0 || (!IS_QLA2432(ha) && !IS_QLA2532(ha) &&
3600 !IS_QLA8432(ha) && !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha) &&
ecc89f25 3601 !IS_QLAFX00(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha)))
6377a7ae
BH		 3602 goto skip_msi;
3603
e7240af5
HM		 3604 if (ql2xenablemsix == 2)
3605 goto skip_msix;
3606
6377a7ae
BH		 3607 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
3608 (ha->pdev->subsystem_device == 0x7040 ||
3609 ha->pdev->subsystem_device == 0x7041 ||
3610 ha->pdev->subsystem_device == 0x1705)) {
7c3df132
SK		 3611 ql_log(ql_log_warn, vha, 0x0034,
3612 "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n",
6377a7ae 3613 ha->pdev->subsystem_vendor,
7c3df132 3614 ha->pdev->subsystem_device);
6377a7ae
BH		 3615 goto skip_msi;
3616 }
a8488abe 3617
42cd4f5d 3618 if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) {
7c3df132
SK		 3619 ql_log(ql_log_warn, vha, 0x0035,
3620 "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n",
42cd4f5d 3621 ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX);
a8488abe
AV		 3622 goto skip_msix;
3623 }
3624
73208dfd 3625 ret = qla24xx_enable_msix(ha, rsp);
a8488abe 3626 if (!ret) {
7c3df132
SK		 3627 ql_dbg(ql_dbg_init, vha, 0x0036,
3628 "MSI-X: Enabled (0x%X, 0x%X).\n",
3629 ha->chip_revision, ha->fw_attributes);
963b0fdd 3630 goto clear_risc_ints;
a8488abe 3631 }
7fa3e239 3632
a8488abe 3633skip_msix:
cbedb601 3634
7fa3e239
SC		 3635 ql_log(ql_log_info, vha, 0x0037,
3636 "Falling back-to MSI mode -%d.\n", ret);
3637
3a03eb79 3638 if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) &&
f73cb695 3639 !IS_QLA8001(ha) && !IS_P3P_TYPE(ha) && !IS_QLAFX00(ha) &&
ecc89f25 3640 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
cbedb601
AV		 3641 goto skip_msi;
3642
4fa18345 3643 ret = pci_alloc_irq_vectors(ha->pdev, 1, 1, PCI_IRQ_MSI);
cbedb601 3644 if (!ret) {
7c3df132
SK		 3645 ql_dbg(ql_dbg_init, vha, 0x0038,
3646 "MSI: Enabled.\n");
cbedb601 3647 ha->flags.msi_enabled = 1;
a9083016 3648 } else
7c3df132 3649 ql_log(ql_log_warn, vha, 0x0039,
7fa3e239
SC		 3650 "Falling back-to INTa mode -- %d.\n", ret);
3651skip_msi:
a033b655
GM		 3652
3653 /* Skip INTx on ISP82xx. */
3654 if (!ha->flags.msi_enabled && IS_QLA82XX(ha))
3655 return QLA_FUNCTION_FAILED;
3656
fd34f556 3657 ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler,
7992abfc
MH		 3658 ha->flags.msi_enabled ? 0 : IRQF_SHARED,
3659 QLA2XXX_DRIVER_NAME, rsp);
963b0fdd 3660 if (ret) {
7c3df132 3661 ql_log(ql_log_warn, vha, 0x003a,
a8488abe
AV		 3662 "Failed to reserve interrupt %d already in use.\n",
3663 ha->pdev->irq);
963b0fdd 3664 goto fail;
8ae6d9c7 3665 } else if (!ha->flags.msi_enabled) {
68d91cbd
SK		 3666 ql_dbg(ql_dbg_init, vha, 0x0125,
3667 "INTa mode: Enabled.\n");
8ae6d9c7
GM		 3668 ha->flags.mr_intr_valid = 1;
3669 }
7992abfc 3670
963b0fdd 3671clear_risc_ints:
4bb2efc4
JC		 3672 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
3673 goto fail;
963b0fdd 3674
c6952483 3675 spin_lock_irq(&ha->hardware_lock);
4bb2efc4 3676 WRT_REG_WORD(&reg->isp.semaphore, 0);
c6952483 3677 spin_unlock_irq(&ha->hardware_lock);
a8488abe 3678
963b0fdd 3679fail:
a8488abe
AV		 3680 return ret;
3681}
3682
3683void
e315cd28 3684qla2x00_free_irqs(scsi_qla_host_t *vha)
a8488abe 3685{
e315cd28 3686 struct qla_hw_data *ha = vha->hw;
9a347ff4 3687 struct rsp_que *rsp;
4fa18345
MH		 3688 struct qla_msix_entry *qentry;
3689 int i;
9a347ff4
CD		 3690
3691 /*
3692 * We need to check that ha->rsp_q_map is valid in case we are called
3693 * from a probe failure context.
3694 */
3695 if (!ha->rsp_q_map || !ha->rsp_q_map[0])
27873de9 3696 goto free_irqs;
9a347ff4 3697 rsp = ha->rsp_q_map[0];
a8488abe 3698
4fa18345
MH		 3699 if (ha->flags.msix_enabled) {
3700 for (i = 0; i < ha->msix_count; i++) {
3701 qentry = &ha->msix_entries[i];
3702 if (qentry->have_irq) {
3703 irq_set_affinity_notifier(qentry->vector, NULL);
3704 free_irq(pci_irq_vector(ha->pdev, i), qentry->handle);
3705 }
3706 }
3707 kfree(ha->msix_entries);
3708 ha->msix_entries = NULL;
3709 ha->flags.msix_enabled = 0;
3710 ql_dbg(ql_dbg_init, vha, 0x0042,
3711 "Disabled MSI-X.\n");
3712 } else {
3713 free_irq(pci_irq_vector(ha->pdev, 0), rsp);
3714 }
e315cd28 3715
27873de9 3716free_irqs:
4fa18345 3717 pci_free_irq_vectors(ha->pdev);
a8488abe 3718}
73208dfd 3719
d7459527
MH		 3720int qla25xx_request_irq(struct qla_hw_data *ha, struct qla_qpair *qpair,
3721 struct qla_msix_entry *msix, int vector_type)
73208dfd 3722{
44a8f954 3723 const struct qla_init_msix_entry *intr = &msix_entries[vector_type];
7c3df132 3724 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
73208dfd
AC		 3725 int ret;
3726
d7459527
MH		 3727 scnprintf(msix->name, sizeof(msix->name),
3728 "qla2xxx%lu_qpair%d", vha->host_no, qpair->id);
3729 ret = request_irq(msix->vector, intr->handler, 0, msix->name, qpair);
73208dfd 3730 if (ret) {
7c3df132
SK		 3731 ql_log(ql_log_fatal, vha, 0x00e6,
3732 "MSI-X: Unable to register handler -- %x/%d.\n",
3733 msix->vector, ret);
73208dfd
AC		 3734 return ret;
3735 }
3736 msix->have_irq = 1;
d7459527 3737 msix->handle = qpair;
73208dfd
AC		 3738 return ret;
3739}
Linux 6.x block layer and io_uring tree(s)