Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
fa90c54f | 2 | * QLogic Fibre Channel HBA Driver |
bd21eaf9 | 3 | * Copyright (c) 2003-2014 QLogic Corporation |
1da177e4 | 4 | * |
fa90c54f | 5 | * See LICENSE.qla2xxx for copyright and licensing details. |
1da177e4 LT |
6 | */ |
7 | #include "qla_def.h" | |
2d70c103 | 8 | #include "qla_target.h" |
1da177e4 | 9 | |
05236a05 | 10 | #include <linux/delay.h> |
5a0e3ad6 | 11 | #include <linux/slab.h> |
e326d22a | 12 | #include <linux/cpu.h> |
09ce66ae | 13 | #include <linux/t10-pi.h> |
df7baa50 | 14 | #include <scsi/scsi_tcq.h> |
9a069e19 | 15 | #include <scsi/scsi_bsg_fc.h> |
bad75002 | 16 | #include <scsi/scsi_eh.h> |
d32041ec JT |
17 | #include <scsi/fc/fc_fs.h> |
18 | #include <linux/nvme-fc-driver.h> | |
df7baa50 | 19 | |
1da177e4 | 20 | static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t); |
73208dfd | 21 | static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *); |
2afa19a9 | 22 | static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *); |
c5419e26 | 23 | static int qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *, |
73208dfd | 24 | sts_entry_t *); |
9a853f71 | 25 | |
1da177e4 LT |
26 | /** |
27 | * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200. | |
28 | * @irq: | |
29 | * @dev_id: SCSI driver HA context | |
1da177e4 LT |
30 | * |
31 | * Called by system whenever the host adapter generates an interrupt. | |
32 | * | |
33 | * Returns handled flag. | |
34 | */ | |
35 | irqreturn_t | |
7d12e780 | 36 | qla2100_intr_handler(int irq, void *dev_id) |
1da177e4 | 37 | { |
e315cd28 AC |
38 | scsi_qla_host_t *vha; |
39 | struct qla_hw_data *ha; | |
3d71644c | 40 | struct device_reg_2xxx __iomem *reg; |
1da177e4 | 41 | int status; |
1da177e4 | 42 | unsigned long iter; |
14e660e6 | 43 | uint16_t hccr; |
9a853f71 | 44 | uint16_t mb[4]; |
e315cd28 | 45 | struct rsp_que *rsp; |
43fac4d9 | 46 | unsigned long flags; |
1da177e4 | 47 | |
e315cd28 AC |
48 | rsp = (struct rsp_que *) dev_id; |
49 | if (!rsp) { | |
3256b435 CD |
50 | ql_log(ql_log_info, NULL, 0x505d, |
51 | "%s: NULL response queue pointer.\n", __func__); | |
1da177e4 LT |
52 | return (IRQ_NONE); |
53 | } | |
54 | ||
e315cd28 | 55 | ha = rsp->hw; |
3d71644c | 56 | reg = &ha->iobase->isp; |
1da177e4 LT |
57 | status = 0; |
58 | ||
43fac4d9 | 59 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2afa19a9 | 60 | vha = pci_get_drvdata(ha->pdev); |
1da177e4 | 61 | for (iter = 50; iter--; ) { |
14e660e6 | 62 | hccr = RD_REG_WORD(®->hccr); |
c821e0d5 | 63 | if (qla2x00_check_reg16_for_disconnect(vha, hccr)) |
f3ddac19 | 64 | break; |
14e660e6 SJ |
65 | if (hccr & HCCR_RISC_PAUSE) { |
66 | if (pci_channel_offline(ha->pdev)) | |
67 | break; | |
68 | ||
69 | /* | |
70 | * Issue a "HARD" reset in order for the RISC interrupt | |
a06a0f8e | 71 | * bit to be cleared. Schedule a big hammer to get |
14e660e6 SJ |
72 | * out of the RISC PAUSED state. |
73 | */ | |
74 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
75 | RD_REG_WORD(®->hccr); | |
76 | ||
e315cd28 AC |
77 | ha->isp_ops->fw_dump(vha, 1); |
78 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
14e660e6 SJ |
79 | break; |
80 | } else if ((RD_REG_WORD(®->istatus) & ISR_RISC_INT) == 0) | |
1da177e4 LT |
81 | break; |
82 | ||
83 | if (RD_REG_WORD(®->semaphore) & BIT_0) { | |
84 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
85 | RD_REG_WORD(®->hccr); | |
86 | ||
87 | /* Get mailbox data. */ | |
9a853f71 AV |
88 | mb[0] = RD_MAILBOX_REG(ha, reg, 0); |
89 | if (mb[0] > 0x3fff && mb[0] < 0x8000) { | |
e315cd28 | 90 | qla2x00_mbx_completion(vha, mb[0]); |
1da177e4 | 91 | status |= MBX_INTERRUPT; |
9a853f71 AV |
92 | } else if (mb[0] > 0x7fff && mb[0] < 0xc000) { |
93 | mb[1] = RD_MAILBOX_REG(ha, reg, 1); | |
94 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
95 | mb[3] = RD_MAILBOX_REG(ha, reg, 3); | |
73208dfd | 96 | qla2x00_async_event(vha, rsp, mb); |
1da177e4 LT |
97 | } else { |
98 | /*EMPTY*/ | |
7c3df132 SK |
99 | ql_dbg(ql_dbg_async, vha, 0x5025, |
100 | "Unrecognized interrupt type (%d).\n", | |
101 | mb[0]); | |
1da177e4 LT |
102 | } |
103 | /* Release mailbox registers. */ | |
104 | WRT_REG_WORD(®->semaphore, 0); | |
105 | RD_REG_WORD(®->semaphore); | |
106 | } else { | |
73208dfd | 107 | qla2x00_process_response_queue(rsp); |
1da177e4 LT |
108 | |
109 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
110 | RD_REG_WORD(®->hccr); | |
111 | } | |
112 | } | |
36439832 | 113 | qla2x00_handle_mbx_completion(ha, status); |
43fac4d9 | 114 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
1da177e4 | 115 | |
1da177e4 LT |
116 | return (IRQ_HANDLED); |
117 | } | |
118 | ||
f3ddac19 | 119 | bool |
c821e0d5 | 120 | qla2x00_check_reg32_for_disconnect(scsi_qla_host_t *vha, uint32_t reg) |
f3ddac19 CD |
121 | { |
122 | /* Check for PCI disconnection */ | |
a30c2a3b | 123 | if (reg == 0xffffffff && !pci_channel_offline(vha->hw->pdev)) { |
beb9e315 | 124 | if (!test_and_set_bit(PFLG_DISCONNECTED, &vha->pci_flags) && |
6b383979 JL |
125 | !test_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags) && |
126 | !test_bit(PFLG_DRIVER_PROBING, &vha->pci_flags)) { | |
232792b6 JL |
127 | /* |
128 | * Schedule this (only once) on the default system | |
129 | * workqueue so that all the adapter workqueues and the | |
130 | * DPC thread can be shutdown cleanly. | |
131 | */ | |
132 | schedule_work(&vha->hw->board_disable); | |
133 | } | |
f3ddac19 CD |
134 | return true; |
135 | } else | |
136 | return false; | |
137 | } | |
138 | ||
c821e0d5 JL |
139 | bool |
140 | qla2x00_check_reg16_for_disconnect(scsi_qla_host_t *vha, uint16_t reg) | |
141 | { | |
142 | return qla2x00_check_reg32_for_disconnect(vha, 0xffff0000 | reg); | |
143 | } | |
144 | ||
1da177e4 LT |
145 | /** |
146 | * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx. | |
147 | * @irq: | |
148 | * @dev_id: SCSI driver HA context | |
1da177e4 LT |
149 | * |
150 | * Called by system whenever the host adapter generates an interrupt. | |
151 | * | |
152 | * Returns handled flag. | |
153 | */ | |
154 | irqreturn_t | |
7d12e780 | 155 | qla2300_intr_handler(int irq, void *dev_id) |
1da177e4 | 156 | { |
e315cd28 | 157 | scsi_qla_host_t *vha; |
3d71644c | 158 | struct device_reg_2xxx __iomem *reg; |
1da177e4 | 159 | int status; |
1da177e4 LT |
160 | unsigned long iter; |
161 | uint32_t stat; | |
1da177e4 | 162 | uint16_t hccr; |
9a853f71 | 163 | uint16_t mb[4]; |
e315cd28 AC |
164 | struct rsp_que *rsp; |
165 | struct qla_hw_data *ha; | |
43fac4d9 | 166 | unsigned long flags; |
1da177e4 | 167 | |
e315cd28 AC |
168 | rsp = (struct rsp_que *) dev_id; |
169 | if (!rsp) { | |
3256b435 CD |
170 | ql_log(ql_log_info, NULL, 0x5058, |
171 | "%s: NULL response queue pointer.\n", __func__); | |
1da177e4 LT |
172 | return (IRQ_NONE); |
173 | } | |
174 | ||
e315cd28 | 175 | ha = rsp->hw; |
3d71644c | 176 | reg = &ha->iobase->isp; |
1da177e4 LT |
177 | status = 0; |
178 | ||
43fac4d9 | 179 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2afa19a9 | 180 | vha = pci_get_drvdata(ha->pdev); |
1da177e4 LT |
181 | for (iter = 50; iter--; ) { |
182 | stat = RD_REG_DWORD(®->u.isp2300.host_status); | |
c821e0d5 | 183 | if (qla2x00_check_reg32_for_disconnect(vha, stat)) |
f3ddac19 | 184 | break; |
1da177e4 | 185 | if (stat & HSR_RISC_PAUSED) { |
85880801 | 186 | if (unlikely(pci_channel_offline(ha->pdev))) |
14e660e6 SJ |
187 | break; |
188 | ||
1da177e4 | 189 | hccr = RD_REG_WORD(®->hccr); |
f3ddac19 | 190 | |
1da177e4 | 191 | if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8)) |
7c3df132 SK |
192 | ql_log(ql_log_warn, vha, 0x5026, |
193 | "Parity error -- HCCR=%x, Dumping " | |
194 | "firmware.\n", hccr); | |
1da177e4 | 195 | else |
7c3df132 SK |
196 | ql_log(ql_log_warn, vha, 0x5027, |
197 | "RISC paused -- HCCR=%x, Dumping " | |
198 | "firmware.\n", hccr); | |
1da177e4 LT |
199 | |
200 | /* | |
201 | * Issue a "HARD" reset in order for the RISC | |
202 | * interrupt bit to be cleared. Schedule a big | |
a06a0f8e | 203 | * hammer to get out of the RISC PAUSED state. |
1da177e4 LT |
204 | */ |
205 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
206 | RD_REG_WORD(®->hccr); | |
07f31805 | 207 | |
e315cd28 AC |
208 | ha->isp_ops->fw_dump(vha, 1); |
209 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
1da177e4 LT |
210 | break; |
211 | } else if ((stat & HSR_RISC_INT) == 0) | |
212 | break; | |
213 | ||
1da177e4 | 214 | switch (stat & 0xff) { |
1da177e4 LT |
215 | case 0x1: |
216 | case 0x2: | |
217 | case 0x10: | |
218 | case 0x11: | |
e315cd28 | 219 | qla2x00_mbx_completion(vha, MSW(stat)); |
1da177e4 LT |
220 | status |= MBX_INTERRUPT; |
221 | ||
222 | /* Release mailbox registers. */ | |
223 | WRT_REG_WORD(®->semaphore, 0); | |
224 | break; | |
225 | case 0x12: | |
9a853f71 AV |
226 | mb[0] = MSW(stat); |
227 | mb[1] = RD_MAILBOX_REG(ha, reg, 1); | |
228 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
229 | mb[3] = RD_MAILBOX_REG(ha, reg, 3); | |
73208dfd | 230 | qla2x00_async_event(vha, rsp, mb); |
9a853f71 AV |
231 | break; |
232 | case 0x13: | |
73208dfd | 233 | qla2x00_process_response_queue(rsp); |
1da177e4 LT |
234 | break; |
235 | case 0x15: | |
9a853f71 AV |
236 | mb[0] = MBA_CMPLT_1_16BIT; |
237 | mb[1] = MSW(stat); | |
73208dfd | 238 | qla2x00_async_event(vha, rsp, mb); |
1da177e4 LT |
239 | break; |
240 | case 0x16: | |
9a853f71 AV |
241 | mb[0] = MBA_SCSI_COMPLETION; |
242 | mb[1] = MSW(stat); | |
243 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
73208dfd | 244 | qla2x00_async_event(vha, rsp, mb); |
1da177e4 LT |
245 | break; |
246 | default: | |
7c3df132 SK |
247 | ql_dbg(ql_dbg_async, vha, 0x5028, |
248 | "Unrecognized interrupt type (%d).\n", stat & 0xff); | |
1da177e4 LT |
249 | break; |
250 | } | |
251 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
252 | RD_REG_WORD_RELAXED(®->hccr); | |
253 | } | |
36439832 | 254 | qla2x00_handle_mbx_completion(ha, status); |
43fac4d9 | 255 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
1da177e4 | 256 | |
1da177e4 LT |
257 | return (IRQ_HANDLED); |
258 | } | |
259 | ||
260 | /** | |
261 | * qla2x00_mbx_completion() - Process mailbox command completions. | |
2db6228d | 262 | * @vha: SCSI driver HA context |
1da177e4 LT |
263 | * @mb0: Mailbox0 register |
264 | */ | |
265 | static void | |
e315cd28 | 266 | qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0) |
1da177e4 LT |
267 | { |
268 | uint16_t cnt; | |
4fa94f83 | 269 | uint32_t mboxes; |
1da177e4 | 270 | uint16_t __iomem *wptr; |
e315cd28 | 271 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 272 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 273 | |
4fa94f83 | 274 | /* Read all mbox registers? */ |
c02189e1 BVA |
275 | WARN_ON_ONCE(ha->mbx_count > 32); |
276 | mboxes = (1ULL << ha->mbx_count) - 1; | |
4fa94f83 | 277 | if (!ha->mcp) |
a720101d | 278 | ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERROR.\n"); |
4fa94f83 AV |
279 | else |
280 | mboxes = ha->mcp->in_mb; | |
281 | ||
1da177e4 LT |
282 | /* Load return mailbox registers. */ |
283 | ha->flags.mbox_int = 1; | |
284 | ha->mailbox_out[0] = mb0; | |
4fa94f83 | 285 | mboxes >>= 1; |
1da177e4 LT |
286 | wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 1); |
287 | ||
288 | for (cnt = 1; cnt < ha->mbx_count; cnt++) { | |
fa2a1ce5 | 289 | if (IS_QLA2200(ha) && cnt == 8) |
1da177e4 | 290 | wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 8); |
4fa94f83 | 291 | if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0)) |
1da177e4 | 292 | ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr); |
4fa94f83 | 293 | else if (mboxes & BIT_0) |
1da177e4 | 294 | ha->mailbox_out[cnt] = RD_REG_WORD(wptr); |
fa2a1ce5 | 295 | |
1da177e4 | 296 | wptr++; |
4fa94f83 | 297 | mboxes >>= 1; |
1da177e4 | 298 | } |
1da177e4 LT |
299 | } |
300 | ||
8a659571 AV |
301 | static void |
302 | qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr) | |
303 | { | |
304 | static char *event[] = | |
305 | { "Complete", "Request Notification", "Time Extension" }; | |
306 | int rval; | |
307 | struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24; | |
9e5054ec | 308 | struct device_reg_82xx __iomem *reg82 = &vha->hw->iobase->isp82; |
8a659571 AV |
309 | uint16_t __iomem *wptr; |
310 | uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS]; | |
311 | ||
312 | /* Seed data -- mailbox1 -> mailbox7. */ | |
9e5054ec CD |
313 | if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw)) |
314 | wptr = (uint16_t __iomem *)®24->mailbox1; | |
315 | else if (IS_QLA8044(vha->hw)) | |
316 | wptr = (uint16_t __iomem *)®82->mailbox_out[1]; | |
317 | else | |
318 | return; | |
319 | ||
8a659571 AV |
320 | for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++) |
321 | mb[cnt] = RD_REG_WORD(wptr); | |
322 | ||
7c3df132 | 323 | ql_dbg(ql_dbg_async, vha, 0x5021, |
6246b8a1 | 324 | "Inter-Driver Communication %s -- " |
7c3df132 SK |
325 | "%04x %04x %04x %04x %04x %04x %04x.\n", |
326 | event[aen & 0xff], mb[0], mb[1], mb[2], mb[3], | |
327 | mb[4], mb[5], mb[6]); | |
454073c9 SV |
328 | switch (aen) { |
329 | /* Handle IDC Error completion case. */ | |
330 | case MBA_IDC_COMPLETE: | |
331 | if (mb[1] >> 15) { | |
332 | vha->hw->flags.idc_compl_status = 1; | |
9aaf2cea | 333 | if (vha->hw->notify_dcbx_comp && !vha->vp_idx) |
454073c9 SV |
334 | complete(&vha->hw->dcbx_comp); |
335 | } | |
336 | break; | |
337 | ||
338 | case MBA_IDC_NOTIFY: | |
339 | /* Acknowledgement needed? [Notify && non-zero timeout]. */ | |
340 | timeout = (descr >> 8) & 0xf; | |
341 | ql_dbg(ql_dbg_async, vha, 0x5022, | |
342 | "%lu Inter-Driver Communication %s -- ACK timeout=%d.\n", | |
343 | vha->host_no, event[aen & 0xff], timeout); | |
344 | ||
345 | if (!timeout) | |
346 | return; | |
347 | rval = qla2x00_post_idc_ack_work(vha, mb); | |
348 | if (rval != QLA_SUCCESS) | |
349 | ql_log(ql_log_warn, vha, 0x5023, | |
350 | "IDC failed to post ACK.\n"); | |
351 | break; | |
352 | case MBA_IDC_TIME_EXT: | |
353 | vha->hw->idc_extend_tmo = descr; | |
354 | ql_dbg(ql_dbg_async, vha, 0x5087, | |
355 | "%lu Inter-Driver Communication %s -- " | |
356 | "Extend timeout by=%d.\n", | |
357 | vha->host_no, event[aen & 0xff], vha->hw->idc_extend_tmo); | |
358 | break; | |
bf5b8ad7 | 359 | } |
8a659571 AV |
360 | } |
361 | ||
daae62a3 | 362 | #define LS_UNKNOWN 2 |
d0297c9a JC |
363 | const char * |
364 | qla2x00_get_link_speed_str(struct qla_hw_data *ha, uint16_t speed) | |
daae62a3 | 365 | { |
f73cb695 CD |
366 | static const char *const link_speeds[] = { |
367 | "1", "2", "?", "4", "8", "16", "32", "10" | |
d0297c9a | 368 | }; |
f73cb695 | 369 | #define QLA_LAST_SPEED 7 |
daae62a3 CD |
370 | |
371 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) | |
d0297c9a JC |
372 | return link_speeds[0]; |
373 | else if (speed == 0x13) | |
f73cb695 CD |
374 | return link_speeds[QLA_LAST_SPEED]; |
375 | else if (speed < QLA_LAST_SPEED) | |
d0297c9a JC |
376 | return link_speeds[speed]; |
377 | else | |
378 | return link_speeds[LS_UNKNOWN]; | |
daae62a3 CD |
379 | } |
380 | ||
fa492630 | 381 | static void |
7d613ac6 SV |
382 | qla83xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb) |
383 | { | |
384 | struct qla_hw_data *ha = vha->hw; | |
385 | ||
386 | /* | |
387 | * 8200 AEN Interpretation: | |
388 | * mb[0] = AEN code | |
389 | * mb[1] = AEN Reason code | |
390 | * mb[2] = LSW of Peg-Halt Status-1 Register | |
391 | * mb[6] = MSW of Peg-Halt Status-1 Register | |
392 | * mb[3] = LSW of Peg-Halt Status-2 register | |
393 | * mb[7] = MSW of Peg-Halt Status-2 register | |
394 | * mb[4] = IDC Device-State Register value | |
395 | * mb[5] = IDC Driver-Presence Register value | |
396 | */ | |
397 | ql_dbg(ql_dbg_async, vha, 0x506b, "AEN Code: mb[0] = 0x%x AEN reason: " | |
398 | "mb[1] = 0x%x PH-status1: mb[2] = 0x%x PH-status1: mb[6] = 0x%x.\n", | |
399 | mb[0], mb[1], mb[2], mb[6]); | |
400 | ql_dbg(ql_dbg_async, vha, 0x506c, "PH-status2: mb[3] = 0x%x " | |
401 | "PH-status2: mb[7] = 0x%x Device-State: mb[4] = 0x%x " | |
402 | "Drv-Presence: mb[5] = 0x%x.\n", mb[3], mb[7], mb[4], mb[5]); | |
403 | ||
404 | if (mb[1] & (IDC_PEG_HALT_STATUS_CHANGE | IDC_NIC_FW_REPORTED_FAILURE | | |
405 | IDC_HEARTBEAT_FAILURE)) { | |
406 | ha->flags.nic_core_hung = 1; | |
407 | ql_log(ql_log_warn, vha, 0x5060, | |
408 | "83XX: F/W Error Reported: Check if reset required.\n"); | |
409 | ||
410 | if (mb[1] & IDC_PEG_HALT_STATUS_CHANGE) { | |
411 | uint32_t protocol_engine_id, fw_err_code, err_level; | |
412 | ||
413 | /* | |
414 | * IDC_PEG_HALT_STATUS_CHANGE interpretation: | |
415 | * - PEG-Halt Status-1 Register: | |
416 | * (LSW = mb[2], MSW = mb[6]) | |
417 | * Bits 0-7 = protocol-engine ID | |
418 | * Bits 8-28 = f/w error code | |
419 | * Bits 29-31 = Error-level | |
420 | * Error-level 0x1 = Non-Fatal error | |
421 | * Error-level 0x2 = Recoverable Fatal error | |
422 | * Error-level 0x4 = UnRecoverable Fatal error | |
423 | * - PEG-Halt Status-2 Register: | |
424 | * (LSW = mb[3], MSW = mb[7]) | |
425 | */ | |
426 | protocol_engine_id = (mb[2] & 0xff); | |
427 | fw_err_code = (((mb[2] & 0xff00) >> 8) | | |
428 | ((mb[6] & 0x1fff) << 8)); | |
429 | err_level = ((mb[6] & 0xe000) >> 13); | |
430 | ql_log(ql_log_warn, vha, 0x5061, "PegHalt Status-1 " | |
431 | "Register: protocol_engine_id=0x%x " | |
432 | "fw_err_code=0x%x err_level=0x%x.\n", | |
433 | protocol_engine_id, fw_err_code, err_level); | |
434 | ql_log(ql_log_warn, vha, 0x5062, "PegHalt Status-2 " | |
435 | "Register: 0x%x%x.\n", mb[7], mb[3]); | |
436 | if (err_level == ERR_LEVEL_NON_FATAL) { | |
437 | ql_log(ql_log_warn, vha, 0x5063, | |
0bf0efa1 | 438 | "Not a fatal error, f/w has recovered itself.\n"); |
7d613ac6 SV |
439 | } else if (err_level == ERR_LEVEL_RECOVERABLE_FATAL) { |
440 | ql_log(ql_log_fatal, vha, 0x5064, | |
441 | "Recoverable Fatal error: Chip reset " | |
442 | "required.\n"); | |
443 | qla83xx_schedule_work(vha, | |
444 | QLA83XX_NIC_CORE_RESET); | |
445 | } else if (err_level == ERR_LEVEL_UNRECOVERABLE_FATAL) { | |
446 | ql_log(ql_log_fatal, vha, 0x5065, | |
447 | "Unrecoverable Fatal error: Set FAILED " | |
448 | "state, reboot required.\n"); | |
449 | qla83xx_schedule_work(vha, | |
450 | QLA83XX_NIC_CORE_UNRECOVERABLE); | |
451 | } | |
452 | } | |
453 | ||
454 | if (mb[1] & IDC_NIC_FW_REPORTED_FAILURE) { | |
455 | uint16_t peg_fw_state, nw_interface_link_up; | |
456 | uint16_t nw_interface_signal_detect, sfp_status; | |
457 | uint16_t htbt_counter, htbt_monitor_enable; | |
b4a028a5 | 458 | uint16_t sfp_additional_info, sfp_multirate; |
7d613ac6 SV |
459 | uint16_t sfp_tx_fault, link_speed, dcbx_status; |
460 | ||
461 | /* | |
462 | * IDC_NIC_FW_REPORTED_FAILURE interpretation: | |
463 | * - PEG-to-FC Status Register: | |
464 | * (LSW = mb[2], MSW = mb[6]) | |
465 | * Bits 0-7 = Peg-Firmware state | |
466 | * Bit 8 = N/W Interface Link-up | |
467 | * Bit 9 = N/W Interface signal detected | |
468 | * Bits 10-11 = SFP Status | |
469 | * SFP Status 0x0 = SFP+ transceiver not expected | |
470 | * SFP Status 0x1 = SFP+ transceiver not present | |
471 | * SFP Status 0x2 = SFP+ transceiver invalid | |
472 | * SFP Status 0x3 = SFP+ transceiver present and | |
473 | * valid | |
474 | * Bits 12-14 = Heartbeat Counter | |
475 | * Bit 15 = Heartbeat Monitor Enable | |
476 | * Bits 16-17 = SFP Additional Info | |
477 | * SFP info 0x0 = Unregocnized transceiver for | |
478 | * Ethernet | |
479 | * SFP info 0x1 = SFP+ brand validation failed | |
480 | * SFP info 0x2 = SFP+ speed validation failed | |
481 | * SFP info 0x3 = SFP+ access error | |
482 | * Bit 18 = SFP Multirate | |
483 | * Bit 19 = SFP Tx Fault | |
484 | * Bits 20-22 = Link Speed | |
485 | * Bits 23-27 = Reserved | |
486 | * Bits 28-30 = DCBX Status | |
487 | * DCBX Status 0x0 = DCBX Disabled | |
488 | * DCBX Status 0x1 = DCBX Enabled | |
489 | * DCBX Status 0x2 = DCBX Exchange error | |
490 | * Bit 31 = Reserved | |
491 | */ | |
492 | peg_fw_state = (mb[2] & 0x00ff); | |
493 | nw_interface_link_up = ((mb[2] & 0x0100) >> 8); | |
494 | nw_interface_signal_detect = ((mb[2] & 0x0200) >> 9); | |
495 | sfp_status = ((mb[2] & 0x0c00) >> 10); | |
496 | htbt_counter = ((mb[2] & 0x7000) >> 12); | |
497 | htbt_monitor_enable = ((mb[2] & 0x8000) >> 15); | |
b4a028a5 | 498 | sfp_additional_info = (mb[6] & 0x0003); |
7d613ac6 SV |
499 | sfp_multirate = ((mb[6] & 0x0004) >> 2); |
500 | sfp_tx_fault = ((mb[6] & 0x0008) >> 3); | |
501 | link_speed = ((mb[6] & 0x0070) >> 4); | |
502 | dcbx_status = ((mb[6] & 0x7000) >> 12); | |
503 | ||
504 | ql_log(ql_log_warn, vha, 0x5066, | |
505 | "Peg-to-Fc Status Register:\n" | |
506 | "peg_fw_state=0x%x, nw_interface_link_up=0x%x, " | |
507 | "nw_interface_signal_detect=0x%x" | |
508 | "\nsfp_statis=0x%x.\n ", peg_fw_state, | |
509 | nw_interface_link_up, nw_interface_signal_detect, | |
510 | sfp_status); | |
511 | ql_log(ql_log_warn, vha, 0x5067, | |
512 | "htbt_counter=0x%x, htbt_monitor_enable=0x%x, " | |
b4a028a5 | 513 | "sfp_additional_info=0x%x, sfp_multirate=0x%x.\n ", |
7d613ac6 | 514 | htbt_counter, htbt_monitor_enable, |
b4a028a5 | 515 | sfp_additional_info, sfp_multirate); |
7d613ac6 SV |
516 | ql_log(ql_log_warn, vha, 0x5068, |
517 | "sfp_tx_fault=0x%x, link_state=0x%x, " | |
518 | "dcbx_status=0x%x.\n", sfp_tx_fault, link_speed, | |
519 | dcbx_status); | |
520 | ||
521 | qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET); | |
522 | } | |
523 | ||
524 | if (mb[1] & IDC_HEARTBEAT_FAILURE) { | |
525 | ql_log(ql_log_warn, vha, 0x5069, | |
526 | "Heartbeat Failure encountered, chip reset " | |
527 | "required.\n"); | |
528 | ||
529 | qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET); | |
530 | } | |
531 | } | |
532 | ||
533 | if (mb[1] & IDC_DEVICE_STATE_CHANGE) { | |
534 | ql_log(ql_log_info, vha, 0x506a, | |
535 | "IDC Device-State changed = 0x%x.\n", mb[4]); | |
6c3943cd SK |
536 | if (ha->flags.nic_core_reset_owner) |
537 | return; | |
7d613ac6 SV |
538 | qla83xx_schedule_work(vha, MBA_IDC_AEN); |
539 | } | |
540 | } | |
541 | ||
bb4cf5b7 CD |
542 | int |
543 | qla2x00_is_a_vp_did(scsi_qla_host_t *vha, uint32_t rscn_entry) | |
544 | { | |
545 | struct qla_hw_data *ha = vha->hw; | |
546 | scsi_qla_host_t *vp; | |
547 | uint32_t vp_did; | |
548 | unsigned long flags; | |
549 | int ret = 0; | |
550 | ||
551 | if (!ha->num_vhosts) | |
552 | return ret; | |
553 | ||
554 | spin_lock_irqsave(&ha->vport_slock, flags); | |
555 | list_for_each_entry(vp, &ha->vp_list, list) { | |
556 | vp_did = vp->d_id.b24; | |
557 | if (vp_did == rscn_entry) { | |
558 | ret = 1; | |
559 | break; | |
560 | } | |
561 | } | |
562 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
563 | ||
564 | return ret; | |
565 | } | |
566 | ||
726b8548 | 567 | fc_port_t * |
17cac3a1 JC |
568 | qla2x00_find_fcport_by_loopid(scsi_qla_host_t *vha, uint16_t loop_id) |
569 | { | |
726b8548 QT |
570 | fc_port_t *f, *tf; |
571 | ||
572 | f = tf = NULL; | |
573 | list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) | |
574 | if (f->loop_id == loop_id) | |
575 | return f; | |
576 | return NULL; | |
577 | } | |
17cac3a1 | 578 | |
726b8548 QT |
579 | fc_port_t * |
580 | qla2x00_find_fcport_by_wwpn(scsi_qla_host_t *vha, u8 *wwpn, u8 incl_deleted) | |
581 | { | |
582 | fc_port_t *f, *tf; | |
583 | ||
584 | f = tf = NULL; | |
585 | list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) { | |
586 | if (memcmp(f->port_name, wwpn, WWN_SIZE) == 0) { | |
587 | if (incl_deleted) | |
588 | return f; | |
589 | else if (f->deleted == 0) | |
590 | return f; | |
591 | } | |
592 | } | |
593 | return NULL; | |
594 | } | |
17cac3a1 | 595 | |
726b8548 QT |
596 | fc_port_t * |
597 | qla2x00_find_fcport_by_nportid(scsi_qla_host_t *vha, port_id_t *id, | |
598 | u8 incl_deleted) | |
599 | { | |
600 | fc_port_t *f, *tf; | |
601 | ||
602 | f = tf = NULL; | |
603 | list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) { | |
604 | if (f->d_id.b24 == id->b24) { | |
605 | if (incl_deleted) | |
606 | return f; | |
607 | else if (f->deleted == 0) | |
608 | return f; | |
609 | } | |
610 | } | |
17cac3a1 JC |
611 | return NULL; |
612 | } | |
613 | ||
1da177e4 LT |
614 | /** |
615 | * qla2x00_async_event() - Process aynchronous events. | |
2db6228d BVA |
616 | * @vha: SCSI driver HA context |
617 | * @rsp: response queue | |
9a853f71 | 618 | * @mb: Mailbox registers (0 - 3) |
1da177e4 | 619 | */ |
2c3dfe3f | 620 | void |
73208dfd | 621 | qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb) |
1da177e4 | 622 | { |
1da177e4 | 623 | uint16_t handle_cnt; |
bdab23da | 624 | uint16_t cnt, mbx; |
1da177e4 | 625 | uint32_t handles[5]; |
e315cd28 | 626 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 627 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
bdab23da | 628 | struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24; |
bc5c2aad | 629 | struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82; |
52c82823 | 630 | uint32_t rscn_entry, host_pid; |
4d4df193 | 631 | unsigned long flags; |
ef86cb20 | 632 | fc_port_t *fcport = NULL; |
1da177e4 LT |
633 | |
634 | /* Setup to process RIO completion. */ | |
635 | handle_cnt = 0; | |
6246b8a1 | 636 | if (IS_CNA_CAPABLE(ha)) |
3a03eb79 | 637 | goto skip_rio; |
1da177e4 LT |
638 | switch (mb[0]) { |
639 | case MBA_SCSI_COMPLETION: | |
9a853f71 | 640 | handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1])); |
1da177e4 LT |
641 | handle_cnt = 1; |
642 | break; | |
643 | case MBA_CMPLT_1_16BIT: | |
9a853f71 | 644 | handles[0] = mb[1]; |
1da177e4 LT |
645 | handle_cnt = 1; |
646 | mb[0] = MBA_SCSI_COMPLETION; | |
647 | break; | |
648 | case MBA_CMPLT_2_16BIT: | |
9a853f71 AV |
649 | handles[0] = mb[1]; |
650 | handles[1] = mb[2]; | |
1da177e4 LT |
651 | handle_cnt = 2; |
652 | mb[0] = MBA_SCSI_COMPLETION; | |
653 | break; | |
654 | case MBA_CMPLT_3_16BIT: | |
9a853f71 AV |
655 | handles[0] = mb[1]; |
656 | handles[1] = mb[2]; | |
657 | handles[2] = mb[3]; | |
1da177e4 LT |
658 | handle_cnt = 3; |
659 | mb[0] = MBA_SCSI_COMPLETION; | |
660 | break; | |
661 | case MBA_CMPLT_4_16BIT: | |
9a853f71 AV |
662 | handles[0] = mb[1]; |
663 | handles[1] = mb[2]; | |
664 | handles[2] = mb[3]; | |
1da177e4 LT |
665 | handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6); |
666 | handle_cnt = 4; | |
667 | mb[0] = MBA_SCSI_COMPLETION; | |
668 | break; | |
669 | case MBA_CMPLT_5_16BIT: | |
9a853f71 AV |
670 | handles[0] = mb[1]; |
671 | handles[1] = mb[2]; | |
672 | handles[2] = mb[3]; | |
1da177e4 LT |
673 | handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6); |
674 | handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7); | |
675 | handle_cnt = 5; | |
676 | mb[0] = MBA_SCSI_COMPLETION; | |
677 | break; | |
678 | case MBA_CMPLT_2_32BIT: | |
9a853f71 | 679 | handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1])); |
1da177e4 LT |
680 | handles[1] = le32_to_cpu( |
681 | ((uint32_t)(RD_MAILBOX_REG(ha, reg, 7) << 16)) | | |
682 | RD_MAILBOX_REG(ha, reg, 6)); | |
683 | handle_cnt = 2; | |
684 | mb[0] = MBA_SCSI_COMPLETION; | |
685 | break; | |
686 | default: | |
687 | break; | |
688 | } | |
3a03eb79 | 689 | skip_rio: |
1da177e4 LT |
690 | switch (mb[0]) { |
691 | case MBA_SCSI_COMPLETION: /* Fast Post */ | |
e315cd28 | 692 | if (!vha->flags.online) |
1da177e4 LT |
693 | break; |
694 | ||
695 | for (cnt = 0; cnt < handle_cnt; cnt++) | |
73208dfd AC |
696 | qla2x00_process_completed_request(vha, rsp->req, |
697 | handles[cnt]); | |
1da177e4 LT |
698 | break; |
699 | ||
700 | case MBA_RESET: /* Reset */ | |
7c3df132 SK |
701 | ql_dbg(ql_dbg_async, vha, 0x5002, |
702 | "Asynchronous RESET.\n"); | |
1da177e4 | 703 | |
e315cd28 | 704 | set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
705 | break; |
706 | ||
707 | case MBA_SYSTEM_ERR: /* System Error */ | |
f73cb695 | 708 | mbx = (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) ? |
6246b8a1 | 709 | RD_REG_WORD(®24->mailbox7) : 0; |
7c3df132 | 710 | ql_log(ql_log_warn, vha, 0x5003, |
bdab23da AV |
711 | "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh " |
712 | "mbx7=%xh.\n", mb[1], mb[2], mb[3], mbx); | |
1da177e4 | 713 | |
e315cd28 | 714 | ha->isp_ops->fw_dump(vha, 1); |
ec7193e2 | 715 | ha->flags.fw_init_done = 0; |
4b60c827 | 716 | QLA_FW_STOPPED(ha); |
1da177e4 | 717 | |
e428924c | 718 | if (IS_FWI2_CAPABLE(ha)) { |
9a853f71 | 719 | if (mb[1] == 0 && mb[2] == 0) { |
7c3df132 | 720 | ql_log(ql_log_fatal, vha, 0x5004, |
9a853f71 AV |
721 | "Unrecoverable Hardware Error: adapter " |
722 | "marked OFFLINE!\n"); | |
e315cd28 | 723 | vha->flags.online = 0; |
6246b8a1 | 724 | vha->device_flags |= DFLG_DEV_FAILED; |
b1d46989 | 725 | } else { |
25985edc | 726 | /* Check to see if MPI timeout occurred */ |
f73cb695 | 727 | if ((mbx & MBX_3) && (ha->port_no == 0)) |
b1d46989 MI |
728 | set_bit(MPI_RESET_NEEDED, |
729 | &vha->dpc_flags); | |
730 | ||
e315cd28 | 731 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
b1d46989 | 732 | } |
9a853f71 | 733 | } else if (mb[1] == 0) { |
7c3df132 | 734 | ql_log(ql_log_fatal, vha, 0x5005, |
1da177e4 LT |
735 | "Unrecoverable Hardware Error: adapter marked " |
736 | "OFFLINE!\n"); | |
e315cd28 | 737 | vha->flags.online = 0; |
6246b8a1 | 738 | vha->device_flags |= DFLG_DEV_FAILED; |
1da177e4 | 739 | } else |
e315cd28 | 740 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
741 | break; |
742 | ||
743 | case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */ | |
7c3df132 SK |
744 | ql_log(ql_log_warn, vha, 0x5006, |
745 | "ISP Request Transfer Error (%x).\n", mb[1]); | |
1da177e4 | 746 | |
e315cd28 | 747 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
748 | break; |
749 | ||
750 | case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */ | |
7c3df132 | 751 | ql_log(ql_log_warn, vha, 0x5007, |
41233cd3 | 752 | "ISP Response Transfer Error (%x).\n", mb[1]); |
1da177e4 | 753 | |
e315cd28 | 754 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
755 | break; |
756 | ||
757 | case MBA_WAKEUP_THRES: /* Request Queue Wake-up */ | |
7c3df132 | 758 | ql_dbg(ql_dbg_async, vha, 0x5008, |
41233cd3 JC |
759 | "Asynchronous WAKEUP_THRES (%x).\n", mb[1]); |
760 | break; | |
1da177e4 | 761 | |
41233cd3 | 762 | case MBA_LOOP_INIT_ERR: |
75d560e0 | 763 | ql_log(ql_log_warn, vha, 0x5090, |
41233cd3 JC |
764 | "LOOP INIT ERROR (%x).\n", mb[1]); |
765 | ha->isp_ops->fw_dump(vha, 1); | |
766 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
2d70c103 | 767 | break; |
41233cd3 | 768 | |
1da177e4 | 769 | case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */ |
ec7193e2 | 770 | ha->flags.lip_ae = 1; |
ec7193e2 | 771 | |
cfb0919c | 772 | ql_dbg(ql_dbg_async, vha, 0x5009, |
7c3df132 | 773 | "LIP occurred (%x).\n", mb[1]); |
1da177e4 | 774 | |
e315cd28 AC |
775 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
776 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
777 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
778 | qla2x00_mark_all_devices_lost(vha, 1); | |
1da177e4 LT |
779 | } |
780 | ||
e315cd28 AC |
781 | if (vha->vp_idx) { |
782 | atomic_set(&vha->vp_state, VP_FAILED); | |
783 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
784 | } |
785 | ||
e315cd28 AC |
786 | set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags); |
787 | set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags); | |
1da177e4 | 788 | |
e315cd28 AC |
789 | vha->flags.management_server_logged_in = 0; |
790 | qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]); | |
1da177e4 LT |
791 | break; |
792 | ||
793 | case MBA_LOOP_UP: /* Loop Up Event */ | |
daae62a3 | 794 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) |
d8b45213 | 795 | ha->link_data_rate = PORT_SPEED_1GB; |
daae62a3 | 796 | else |
1da177e4 | 797 | ha->link_data_rate = mb[1]; |
1da177e4 | 798 | |
8e5a9484 | 799 | ql_log(ql_log_info, vha, 0x500a, |
daae62a3 | 800 | "LOOP UP detected (%s Gbps).\n", |
d0297c9a | 801 | qla2x00_get_link_speed_str(ha, ha->link_data_rate)); |
1da177e4 | 802 | |
e315cd28 AC |
803 | vha->flags.management_server_logged_in = 0; |
804 | qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate); | |
e4e3a2ce QT |
805 | |
806 | if (AUTO_DETECT_SFP_SUPPORT(vha)) { | |
807 | set_bit(DETECT_SFP_CHANGE, &vha->dpc_flags); | |
808 | qla2xxx_wake_dpc(vha); | |
809 | } | |
1da177e4 LT |
810 | break; |
811 | ||
812 | case MBA_LOOP_DOWN: /* Loop Down Event */ | |
9cd883f0 | 813 | SAVE_TOPO(ha); |
ec7193e2 QT |
814 | ha->flags.lip_ae = 0; |
815 | ha->current_topology = 0; | |
816 | ||
6246b8a1 GM |
817 | mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha)) |
818 | ? RD_REG_WORD(®24->mailbox4) : 0; | |
7ec0effd AD |
819 | mbx = (IS_P3P_TYPE(ha)) ? RD_REG_WORD(®82->mailbox_out[4]) |
820 | : mbx; | |
8e5a9484 | 821 | ql_log(ql_log_info, vha, 0x500b, |
7c3df132 SK |
822 | "LOOP DOWN detected (%x %x %x %x).\n", |
823 | mb[1], mb[2], mb[3], mbx); | |
1da177e4 | 824 | |
e315cd28 AC |
825 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
826 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
827 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
2486c627 HM |
828 | /* |
829 | * In case of loop down, restore WWPN from | |
830 | * NVRAM in case of FA-WWPN capable ISP | |
718abbdc | 831 | * Restore for Physical Port only |
2486c627 | 832 | */ |
718abbdc SC |
833 | if (!vha->vp_idx) { |
834 | if (ha->flags.fawwpn_enabled) { | |
835 | void *wwpn = ha->init_cb->port_name; | |
836 | memcpy(vha->port_name, wwpn, WWN_SIZE); | |
837 | fc_host_port_name(vha->host) = | |
838 | wwn_to_u64(vha->port_name); | |
839 | ql_dbg(ql_dbg_init + ql_dbg_verbose, | |
83548fe2 | 840 | vha, 0x00d8, "LOOP DOWN detected," |
718abbdc SC |
841 | "restore WWPN %016llx\n", |
842 | wwn_to_u64(vha->port_name)); | |
843 | } | |
844 | ||
845 | clear_bit(VP_CONFIG_OK, &vha->vp_flags); | |
2486c627 HM |
846 | } |
847 | ||
e315cd28 AC |
848 | vha->device_flags |= DFLG_NO_CABLE; |
849 | qla2x00_mark_all_devices_lost(vha, 1); | |
1da177e4 LT |
850 | } |
851 | ||
e315cd28 AC |
852 | if (vha->vp_idx) { |
853 | atomic_set(&vha->vp_state, VP_FAILED); | |
854 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
855 | } |
856 | ||
e315cd28 | 857 | vha->flags.management_server_logged_in = 0; |
d8b45213 | 858 | ha->link_data_rate = PORT_SPEED_UNKNOWN; |
e315cd28 | 859 | qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0); |
1da177e4 LT |
860 | break; |
861 | ||
862 | case MBA_LIP_RESET: /* LIP reset occurred */ | |
cfb0919c | 863 | ql_dbg(ql_dbg_async, vha, 0x500c, |
cc3ef7bc | 864 | "LIP reset occurred (%x).\n", mb[1]); |
1da177e4 | 865 | |
e315cd28 AC |
866 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
867 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
868 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
869 | qla2x00_mark_all_devices_lost(vha, 1); | |
1da177e4 LT |
870 | } |
871 | ||
e315cd28 AC |
872 | if (vha->vp_idx) { |
873 | atomic_set(&vha->vp_state, VP_FAILED); | |
874 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
875 | } |
876 | ||
e315cd28 | 877 | set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
878 | |
879 | ha->operating_mode = LOOP; | |
e315cd28 AC |
880 | vha->flags.management_server_logged_in = 0; |
881 | qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]); | |
1da177e4 LT |
882 | break; |
883 | ||
3a03eb79 | 884 | /* case MBA_DCBX_COMPLETE: */ |
1da177e4 | 885 | case MBA_POINT_TO_POINT: /* Point-to-Point */ |
ec7193e2 | 886 | ha->flags.lip_ae = 0; |
ec7193e2 | 887 | |
1da177e4 LT |
888 | if (IS_QLA2100(ha)) |
889 | break; | |
890 | ||
7ec0effd | 891 | if (IS_CNA_CAPABLE(ha)) { |
7c3df132 SK |
892 | ql_dbg(ql_dbg_async, vha, 0x500d, |
893 | "DCBX Completed -- %04x %04x %04x.\n", | |
894 | mb[1], mb[2], mb[3]); | |
9aaf2cea | 895 | if (ha->notify_dcbx_comp && !vha->vp_idx) |
23f2ebd1 SR |
896 | complete(&ha->dcbx_comp); |
897 | ||
898 | } else | |
7c3df132 SK |
899 | ql_dbg(ql_dbg_async, vha, 0x500e, |
900 | "Asynchronous P2P MODE received.\n"); | |
1da177e4 LT |
901 | |
902 | /* | |
903 | * Until there's a transition from loop down to loop up, treat | |
904 | * this as loop down only. | |
905 | */ | |
e315cd28 AC |
906 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
907 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
908 | if (!atomic_read(&vha->loop_down_timer)) | |
909 | atomic_set(&vha->loop_down_timer, | |
1da177e4 | 910 | LOOP_DOWN_TIME); |
e315cd28 | 911 | qla2x00_mark_all_devices_lost(vha, 1); |
1da177e4 LT |
912 | } |
913 | ||
e315cd28 AC |
914 | if (vha->vp_idx) { |
915 | atomic_set(&vha->vp_state, VP_FAILED); | |
916 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
917 | } |
918 | ||
e315cd28 AC |
919 | if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) |
920 | set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
921 | ||
922 | set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags); | |
923 | set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags); | |
4346b149 | 924 | |
e315cd28 | 925 | vha->flags.management_server_logged_in = 0; |
1da177e4 LT |
926 | break; |
927 | ||
928 | case MBA_CHG_IN_CONNECTION: /* Change in connection mode */ | |
929 | if (IS_QLA2100(ha)) | |
930 | break; | |
931 | ||
cfb0919c | 932 | ql_dbg(ql_dbg_async, vha, 0x500f, |
1da177e4 LT |
933 | "Configuration change detected: value=%x.\n", mb[1]); |
934 | ||
e315cd28 AC |
935 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
936 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
937 | if (!atomic_read(&vha->loop_down_timer)) | |
938 | atomic_set(&vha->loop_down_timer, | |
1da177e4 | 939 | LOOP_DOWN_TIME); |
e315cd28 | 940 | qla2x00_mark_all_devices_lost(vha, 1); |
1da177e4 LT |
941 | } |
942 | ||
e315cd28 AC |
943 | if (vha->vp_idx) { |
944 | atomic_set(&vha->vp_state, VP_FAILED); | |
945 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
946 | } |
947 | ||
e315cd28 AC |
948 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
949 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
1da177e4 LT |
950 | break; |
951 | ||
952 | case MBA_PORT_UPDATE: /* Port database update */ | |
55903b9d SV |
953 | /* |
954 | * Handle only global and vn-port update events | |
955 | * | |
956 | * Relevant inputs: | |
957 | * mb[1] = N_Port handle of changed port | |
958 | * OR 0xffff for global event | |
959 | * mb[2] = New login state | |
960 | * 7 = Port logged out | |
961 | * mb[3] = LSB is vp_idx, 0xff = all vps | |
962 | * | |
963 | * Skip processing if: | |
964 | * Event is global, vp_idx is NOT all vps, | |
965 | * vp_idx does not match | |
966 | * Event is not global, vp_idx does not match | |
967 | */ | |
12cec63e AV |
968 | if (IS_QLA2XXX_MIDTYPE(ha) && |
969 | ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) || | |
970 | (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff)) | |
971 | break; | |
73208dfd | 972 | |
17cac3a1 | 973 | if (mb[2] == 0x7) { |
7c3df132 | 974 | ql_dbg(ql_dbg_async, vha, 0x5010, |
17cac3a1 JC |
975 | "Port %s %04x %04x %04x.\n", |
976 | mb[1] == 0xffff ? "unavailable" : "logout", | |
7c3df132 | 977 | mb[1], mb[2], mb[3]); |
17cac3a1 JC |
978 | |
979 | if (mb[1] == 0xffff) | |
980 | goto global_port_update; | |
981 | ||
b98ae0d7 QT |
982 | if (mb[1] == NPH_SNS_LID(ha)) { |
983 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
984 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
985 | break; | |
986 | } | |
987 | ||
988 | /* use handle_cnt for loop id/nport handle */ | |
989 | if (IS_FWI2_CAPABLE(ha)) | |
990 | handle_cnt = NPH_SNS; | |
991 | else | |
992 | handle_cnt = SIMPLE_NAME_SERVER; | |
993 | if (mb[1] == handle_cnt) { | |
994 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
995 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
996 | break; | |
997 | } | |
998 | ||
17cac3a1 JC |
999 | /* Port logout */ |
1000 | fcport = qla2x00_find_fcport_by_loopid(vha, mb[1]); | |
1001 | if (!fcport) | |
1002 | break; | |
1003 | if (atomic_read(&fcport->state) != FCS_ONLINE) | |
1004 | break; | |
1005 | ql_dbg(ql_dbg_async, vha, 0x508a, | |
1006 | "Marking port lost loopid=%04x portid=%06x.\n", | |
1007 | fcport->loop_id, fcport->d_id.b24); | |
726b8548 QT |
1008 | if (qla_ini_mode_enabled(vha)) { |
1009 | qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1); | |
1010 | fcport->logout_on_delete = 0; | |
d8630bb9 | 1011 | qlt_schedule_sess_for_deletion(fcport); |
726b8548 | 1012 | } |
17cac3a1 JC |
1013 | break; |
1014 | ||
1015 | global_port_update: | |
9764ff88 AV |
1016 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
1017 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
1018 | atomic_set(&vha->loop_down_timer, | |
1019 | LOOP_DOWN_TIME); | |
1020 | vha->device_flags |= DFLG_NO_CABLE; | |
1021 | qla2x00_mark_all_devices_lost(vha, 1); | |
1022 | } | |
1023 | ||
1024 | if (vha->vp_idx) { | |
1025 | atomic_set(&vha->vp_state, VP_FAILED); | |
1026 | fc_vport_set_state(vha->fc_vport, | |
1027 | FC_VPORT_FAILED); | |
faadc5e7 | 1028 | qla2x00_mark_all_devices_lost(vha, 1); |
9764ff88 AV |
1029 | } |
1030 | ||
1031 | vha->flags.management_server_logged_in = 0; | |
1032 | ha->link_data_rate = PORT_SPEED_UNKNOWN; | |
1033 | break; | |
1034 | } | |
1035 | ||
1da177e4 | 1036 | /* |
cc3ef7bc | 1037 | * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET |
1da177e4 LT |
1038 | * event etc. earlier indicating loop is down) then process |
1039 | * it. Otherwise ignore it and Wait for RSCN to come in. | |
1040 | */ | |
e315cd28 | 1041 | atomic_set(&vha->loop_down_timer, 0); |
8e5a9484 | 1042 | if (atomic_read(&vha->loop_state) != LOOP_DOWN && |
edd05de1 | 1043 | !ha->flags.n2n_ae && |
8e5a9484 | 1044 | atomic_read(&vha->loop_state) != LOOP_DEAD) { |
7c3df132 SK |
1045 | ql_dbg(ql_dbg_async, vha, 0x5011, |
1046 | "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n", | |
1047 | mb[1], mb[2], mb[3]); | |
2d70c103 NB |
1048 | |
1049 | qlt_async_event(mb[0], vha, mb); | |
1da177e4 LT |
1050 | break; |
1051 | } | |
1052 | ||
7c3df132 SK |
1053 | ql_dbg(ql_dbg_async, vha, 0x5012, |
1054 | "Port database changed %04x %04x %04x.\n", | |
1055 | mb[1], mb[2], mb[3]); | |
1da177e4 LT |
1056 | |
1057 | /* | |
1058 | * Mark all devices as missing so we will login again. | |
1059 | */ | |
e315cd28 | 1060 | atomic_set(&vha->loop_state, LOOP_UP); |
6944dccb | 1061 | vha->scan.scan_retry = 0; |
1da177e4 | 1062 | |
e315cd28 AC |
1063 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
1064 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
ded6411f | 1065 | set_bit(VP_CONFIG_OK, &vha->vp_flags); |
2d70c103 NB |
1066 | |
1067 | qlt_async_event(mb[0], vha, mb); | |
1da177e4 LT |
1068 | break; |
1069 | ||
1070 | case MBA_RSCN_UPDATE: /* State Change Registration */ | |
3c397400 | 1071 | /* Check if the Vport has issued a SCR */ |
e315cd28 | 1072 | if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags)) |
3c397400 SJ |
1073 | break; |
1074 | /* Only handle SCNs for our Vport index. */ | |
0d6e61bc | 1075 | if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff)) |
3c397400 | 1076 | break; |
0d6e61bc | 1077 | |
7c3df132 SK |
1078 | ql_dbg(ql_dbg_async, vha, 0x5013, |
1079 | "RSCN database changed -- %04x %04x %04x.\n", | |
1080 | mb[1], mb[2], mb[3]); | |
1da177e4 | 1081 | |
59d72d87 | 1082 | rscn_entry = ((mb[1] & 0xff) << 16) | mb[2]; |
e315cd28 AC |
1083 | host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8) |
1084 | | vha->d_id.b.al_pa; | |
1da177e4 | 1085 | if (rscn_entry == host_pid) { |
7c3df132 SK |
1086 | ql_dbg(ql_dbg_async, vha, 0x5014, |
1087 | "Ignoring RSCN update to local host " | |
1088 | "port ID (%06x).\n", host_pid); | |
1da177e4 LT |
1089 | break; |
1090 | } | |
1091 | ||
59d72d87 RA |
1092 | /* Ignore reserved bits from RSCN-payload. */ |
1093 | rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2]; | |
1da177e4 | 1094 | |
bb4cf5b7 CD |
1095 | /* Skip RSCNs for virtual ports on the same physical port */ |
1096 | if (qla2x00_is_a_vp_did(vha, rscn_entry)) | |
1097 | break; | |
1098 | ||
e315cd28 AC |
1099 | atomic_set(&vha->loop_down_timer, 0); |
1100 | vha->flags.management_server_logged_in = 0; | |
726b8548 QT |
1101 | { |
1102 | struct event_arg ea; | |
1da177e4 | 1103 | |
726b8548 QT |
1104 | memset(&ea, 0, sizeof(ea)); |
1105 | ea.event = FCME_RSCN; | |
1106 | ea.id.b24 = rscn_entry; | |
41dc529a | 1107 | ea.id.b.rsvd_1 = rscn_entry >> 24; |
726b8548 | 1108 | qla2x00_fcport_event_handler(vha, &ea); |
41dc529a | 1109 | qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry); |
726b8548 | 1110 | } |
1da177e4 | 1111 | break; |
1da177e4 LT |
1112 | /* case MBA_RIO_RESPONSE: */ |
1113 | case MBA_ZIO_RESPONSE: | |
7c3df132 SK |
1114 | ql_dbg(ql_dbg_async, vha, 0x5015, |
1115 | "[R|Z]IO update completion.\n"); | |
1da177e4 | 1116 | |
e428924c | 1117 | if (IS_FWI2_CAPABLE(ha)) |
2afa19a9 | 1118 | qla24xx_process_response_queue(vha, rsp); |
4fdfefe5 | 1119 | else |
73208dfd | 1120 | qla2x00_process_response_queue(rsp); |
1da177e4 | 1121 | break; |
9a853f71 AV |
1122 | |
1123 | case MBA_DISCARD_RND_FRAME: | |
7c3df132 SK |
1124 | ql_dbg(ql_dbg_async, vha, 0x5016, |
1125 | "Discard RND Frame -- %04x %04x %04x.\n", | |
1126 | mb[1], mb[2], mb[3]); | |
9a853f71 | 1127 | break; |
45ebeb56 AV |
1128 | |
1129 | case MBA_TRACE_NOTIFICATION: | |
7c3df132 SK |
1130 | ql_dbg(ql_dbg_async, vha, 0x5017, |
1131 | "Trace Notification -- %04x %04x.\n", mb[1], mb[2]); | |
45ebeb56 | 1132 | break; |
4d4df193 HK |
1133 | |
1134 | case MBA_ISP84XX_ALERT: | |
7c3df132 SK |
1135 | ql_dbg(ql_dbg_async, vha, 0x5018, |
1136 | "ISP84XX Alert Notification -- %04x %04x %04x.\n", | |
1137 | mb[1], mb[2], mb[3]); | |
4d4df193 HK |
1138 | |
1139 | spin_lock_irqsave(&ha->cs84xx->access_lock, flags); | |
1140 | switch (mb[1]) { | |
1141 | case A84_PANIC_RECOVERY: | |
7c3df132 SK |
1142 | ql_log(ql_log_info, vha, 0x5019, |
1143 | "Alert 84XX: panic recovery %04x %04x.\n", | |
1144 | mb[2], mb[3]); | |
4d4df193 HK |
1145 | break; |
1146 | case A84_OP_LOGIN_COMPLETE: | |
1147 | ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2]; | |
7c3df132 SK |
1148 | ql_log(ql_log_info, vha, 0x501a, |
1149 | "Alert 84XX: firmware version %x.\n", | |
1150 | ha->cs84xx->op_fw_version); | |
4d4df193 HK |
1151 | break; |
1152 | case A84_DIAG_LOGIN_COMPLETE: | |
1153 | ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2]; | |
7c3df132 SK |
1154 | ql_log(ql_log_info, vha, 0x501b, |
1155 | "Alert 84XX: diagnostic firmware version %x.\n", | |
1156 | ha->cs84xx->diag_fw_version); | |
4d4df193 HK |
1157 | break; |
1158 | case A84_GOLD_LOGIN_COMPLETE: | |
1159 | ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2]; | |
1160 | ha->cs84xx->fw_update = 1; | |
7c3df132 SK |
1161 | ql_log(ql_log_info, vha, 0x501c, |
1162 | "Alert 84XX: gold firmware version %x.\n", | |
1163 | ha->cs84xx->gold_fw_version); | |
4d4df193 HK |
1164 | break; |
1165 | default: | |
7c3df132 SK |
1166 | ql_log(ql_log_warn, vha, 0x501d, |
1167 | "Alert 84xx: Invalid Alert %04x %04x %04x.\n", | |
4d4df193 HK |
1168 | mb[1], mb[2], mb[3]); |
1169 | } | |
1170 | spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags); | |
1171 | break; | |
3a03eb79 | 1172 | case MBA_DCBX_START: |
7c3df132 SK |
1173 | ql_dbg(ql_dbg_async, vha, 0x501e, |
1174 | "DCBX Started -- %04x %04x %04x.\n", | |
1175 | mb[1], mb[2], mb[3]); | |
3a03eb79 AV |
1176 | break; |
1177 | case MBA_DCBX_PARAM_UPDATE: | |
7c3df132 SK |
1178 | ql_dbg(ql_dbg_async, vha, 0x501f, |
1179 | "DCBX Parameters Updated -- %04x %04x %04x.\n", | |
1180 | mb[1], mb[2], mb[3]); | |
3a03eb79 AV |
1181 | break; |
1182 | case MBA_FCF_CONF_ERR: | |
7c3df132 SK |
1183 | ql_dbg(ql_dbg_async, vha, 0x5020, |
1184 | "FCF Configuration Error -- %04x %04x %04x.\n", | |
1185 | mb[1], mb[2], mb[3]); | |
3a03eb79 | 1186 | break; |
3a03eb79 | 1187 | case MBA_IDC_NOTIFY: |
7ec0effd | 1188 | if (IS_QLA8031(vha->hw) || IS_QLA8044(ha)) { |
67b2a31f CD |
1189 | mb[4] = RD_REG_WORD(®24->mailbox4); |
1190 | if (((mb[2] & 0x7fff) == MBC_PORT_RESET || | |
1191 | (mb[2] & 0x7fff) == MBC_SET_PORT_CONFIG) && | |
1192 | (mb[4] & INTERNAL_LOOPBACK_MASK) != 0) { | |
8fcd6b8b | 1193 | set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags); |
67b2a31f CD |
1194 | /* |
1195 | * Extend loop down timer since port is active. | |
1196 | */ | |
1197 | if (atomic_read(&vha->loop_state) == LOOP_DOWN) | |
1198 | atomic_set(&vha->loop_down_timer, | |
1199 | LOOP_DOWN_TIME); | |
8fcd6b8b CD |
1200 | qla2xxx_wake_dpc(vha); |
1201 | } | |
67b2a31f | 1202 | } |
81881861 | 1203 | /* fall through */ |
8fcd6b8b | 1204 | case MBA_IDC_COMPLETE: |
9aaf2cea | 1205 | if (ha->notify_lb_portup_comp && !vha->vp_idx) |
f356bef1 CD |
1206 | complete(&ha->lb_portup_comp); |
1207 | /* Fallthru */ | |
3a03eb79 | 1208 | case MBA_IDC_TIME_EXT: |
7ec0effd AD |
1209 | if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || |
1210 | IS_QLA8044(ha)) | |
7d613ac6 SV |
1211 | qla81xx_idc_event(vha, mb[0], mb[1]); |
1212 | break; | |
1213 | ||
1214 | case MBA_IDC_AEN: | |
1215 | mb[4] = RD_REG_WORD(®24->mailbox4); | |
1216 | mb[5] = RD_REG_WORD(®24->mailbox5); | |
1217 | mb[6] = RD_REG_WORD(®24->mailbox6); | |
1218 | mb[7] = RD_REG_WORD(®24->mailbox7); | |
1219 | qla83xx_handle_8200_aen(vha, mb); | |
3a03eb79 | 1220 | break; |
7d613ac6 | 1221 | |
b5a340dd JC |
1222 | case MBA_DPORT_DIAGNOSTICS: |
1223 | ql_dbg(ql_dbg_async, vha, 0x5052, | |
ef55e513 | 1224 | "D-Port Diagnostics: %04x result=%s\n", |
ec891462 | 1225 | mb[0], |
b5a340dd | 1226 | mb[1] == 0 ? "start" : |
ef55e513 JC |
1227 | mb[1] == 1 ? "done (pass)" : |
1228 | mb[1] == 2 ? "done (error)" : "other"); | |
b5a340dd JC |
1229 | break; |
1230 | ||
a29b3dd7 JC |
1231 | case MBA_TEMPERATURE_ALERT: |
1232 | ql_dbg(ql_dbg_async, vha, 0x505e, | |
1233 | "TEMPERATURE ALERT: %04x %04x %04x\n", mb[1], mb[2], mb[3]); | |
1234 | if (mb[1] == 0x12) | |
1235 | schedule_work(&ha->board_disable); | |
1236 | break; | |
1237 | ||
92d4408e SC |
1238 | case MBA_TRANS_INSERT: |
1239 | ql_dbg(ql_dbg_async, vha, 0x5091, | |
1240 | "Transceiver Insertion: %04x\n", mb[1]); | |
1241 | break; | |
1242 | ||
6246b8a1 GM |
1243 | default: |
1244 | ql_dbg(ql_dbg_async, vha, 0x5057, | |
1245 | "Unknown AEN:%04x %04x %04x %04x\n", | |
1246 | mb[0], mb[1], mb[2], mb[3]); | |
1da177e4 | 1247 | } |
2c3dfe3f | 1248 | |
2d70c103 NB |
1249 | qlt_async_event(mb[0], vha, mb); |
1250 | ||
e315cd28 | 1251 | if (!vha->vp_idx && ha->num_vhosts) |
73208dfd | 1252 | qla2x00_alert_all_vps(rsp, mb); |
1da177e4 LT |
1253 | } |
1254 | ||
1255 | /** | |
1256 | * qla2x00_process_completed_request() - Process a Fast Post response. | |
2db6228d BVA |
1257 | * @vha: SCSI driver HA context |
1258 | * @req: request queue | |
1da177e4 LT |
1259 | * @index: SRB index |
1260 | */ | |
8ae6d9c7 | 1261 | void |
73208dfd | 1262 | qla2x00_process_completed_request(struct scsi_qla_host *vha, |
8ae6d9c7 | 1263 | struct req_que *req, uint32_t index) |
1da177e4 LT |
1264 | { |
1265 | srb_t *sp; | |
e315cd28 | 1266 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1267 | |
1268 | /* Validate handle. */ | |
8d93f550 | 1269 | if (index >= req->num_outstanding_cmds) { |
7c3df132 SK |
1270 | ql_log(ql_log_warn, vha, 0x3014, |
1271 | "Invalid SCSI command index (%x).\n", index); | |
1da177e4 | 1272 | |
7ec0effd | 1273 | if (IS_P3P_TYPE(ha)) |
8f7daead GM |
1274 | set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); |
1275 | else | |
1276 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
1da177e4 LT |
1277 | return; |
1278 | } | |
1279 | ||
e315cd28 | 1280 | sp = req->outstanding_cmds[index]; |
1da177e4 LT |
1281 | if (sp) { |
1282 | /* Free outstanding command slot. */ | |
e315cd28 | 1283 | req->outstanding_cmds[index] = NULL; |
1da177e4 | 1284 | |
1da177e4 | 1285 | /* Save ISP completion status */ |
25ff6af1 | 1286 | sp->done(sp, DID_OK << 16); |
1da177e4 | 1287 | } else { |
7c3df132 | 1288 | ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n"); |
1da177e4 | 1289 | |
7ec0effd | 1290 | if (IS_P3P_TYPE(ha)) |
8f7daead GM |
1291 | set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); |
1292 | else | |
1293 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
1da177e4 LT |
1294 | } |
1295 | } | |
1296 | ||
8ae6d9c7 | 1297 | srb_t * |
ac280b67 AV |
1298 | qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func, |
1299 | struct req_que *req, void *iocb) | |
1300 | { | |
1301 | struct qla_hw_data *ha = vha->hw; | |
1302 | sts_entry_t *pkt = iocb; | |
1303 | srb_t *sp = NULL; | |
1304 | uint16_t index; | |
1305 | ||
1306 | index = LSW(pkt->handle); | |
8d93f550 | 1307 | if (index >= req->num_outstanding_cmds) { |
7c3df132 | 1308 | ql_log(ql_log_warn, vha, 0x5031, |
726b8548 QT |
1309 | "Invalid command index (%x) type %8ph.\n", |
1310 | index, iocb); | |
7ec0effd | 1311 | if (IS_P3P_TYPE(ha)) |
8f7daead GM |
1312 | set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); |
1313 | else | |
1314 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
ac280b67 AV |
1315 | goto done; |
1316 | } | |
1317 | sp = req->outstanding_cmds[index]; | |
1318 | if (!sp) { | |
7c3df132 SK |
1319 | ql_log(ql_log_warn, vha, 0x5032, |
1320 | "Invalid completion handle (%x) -- timed-out.\n", index); | |
ac280b67 AV |
1321 | return sp; |
1322 | } | |
1323 | if (sp->handle != index) { | |
7c3df132 SK |
1324 | ql_log(ql_log_warn, vha, 0x5033, |
1325 | "SRB handle (%x) mismatch %x.\n", sp->handle, index); | |
ac280b67 AV |
1326 | return NULL; |
1327 | } | |
9a069e19 | 1328 | |
ac280b67 | 1329 | req->outstanding_cmds[index] = NULL; |
9a069e19 | 1330 | |
ac280b67 AV |
1331 | done: |
1332 | return sp; | |
1333 | } | |
1334 | ||
1335 | static void | |
1336 | qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1337 | struct mbx_entry *mbx) | |
1338 | { | |
1339 | const char func[] = "MBX-IOCB"; | |
1340 | const char *type; | |
ac280b67 AV |
1341 | fc_port_t *fcport; |
1342 | srb_t *sp; | |
4916392b | 1343 | struct srb_iocb *lio; |
99b0bec7 | 1344 | uint16_t *data; |
5ff1d584 | 1345 | uint16_t status; |
ac280b67 AV |
1346 | |
1347 | sp = qla2x00_get_sp_from_handle(vha, func, req, mbx); | |
1348 | if (!sp) | |
1349 | return; | |
1350 | ||
9ba56b95 GM |
1351 | lio = &sp->u.iocb_cmd; |
1352 | type = sp->name; | |
ac280b67 | 1353 | fcport = sp->fcport; |
4916392b | 1354 | data = lio->u.logio.data; |
ac280b67 | 1355 | |
5ff1d584 | 1356 | data[0] = MBS_COMMAND_ERROR; |
4916392b | 1357 | data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? |
5ff1d584 | 1358 | QLA_LOGIO_LOGIN_RETRIED : 0; |
ac280b67 | 1359 | if (mbx->entry_status) { |
7c3df132 | 1360 | ql_dbg(ql_dbg_async, vha, 0x5043, |
cfb0919c | 1361 | "Async-%s error entry - hdl=%x portid=%02x%02x%02x " |
d3fa9e7d | 1362 | "entry-status=%x status=%x state-flag=%x " |
cfb0919c CD |
1363 | "status-flags=%x.\n", type, sp->handle, |
1364 | fcport->d_id.b.domain, fcport->d_id.b.area, | |
d3fa9e7d AV |
1365 | fcport->d_id.b.al_pa, mbx->entry_status, |
1366 | le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags), | |
7c3df132 | 1367 | le16_to_cpu(mbx->status_flags)); |
d3fa9e7d | 1368 | |
cfb0919c | 1369 | ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5029, |
7c3df132 | 1370 | (uint8_t *)mbx, sizeof(*mbx)); |
ac280b67 | 1371 | |
99b0bec7 | 1372 | goto logio_done; |
ac280b67 AV |
1373 | } |
1374 | ||
5ff1d584 | 1375 | status = le16_to_cpu(mbx->status); |
9ba56b95 | 1376 | if (status == 0x30 && sp->type == SRB_LOGIN_CMD && |
5ff1d584 AV |
1377 | le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) |
1378 | status = 0; | |
1379 | if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) { | |
7c3df132 | 1380 | ql_dbg(ql_dbg_async, vha, 0x5045, |
cfb0919c CD |
1381 | "Async-%s complete - hdl=%x portid=%02x%02x%02x mbx1=%x.\n", |
1382 | type, sp->handle, fcport->d_id.b.domain, | |
1383 | fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
1384 | le16_to_cpu(mbx->mb1)); | |
ac280b67 AV |
1385 | |
1386 | data[0] = MBS_COMMAND_COMPLETE; | |
9ba56b95 | 1387 | if (sp->type == SRB_LOGIN_CMD) { |
99b0bec7 AV |
1388 | fcport->port_type = FCT_TARGET; |
1389 | if (le16_to_cpu(mbx->mb1) & BIT_0) | |
1390 | fcport->port_type = FCT_INITIATOR; | |
6ac52608 | 1391 | else if (le16_to_cpu(mbx->mb1) & BIT_1) |
99b0bec7 | 1392 | fcport->flags |= FCF_FCP2_DEVICE; |
5ff1d584 | 1393 | } |
99b0bec7 | 1394 | goto logio_done; |
ac280b67 AV |
1395 | } |
1396 | ||
1397 | data[0] = le16_to_cpu(mbx->mb0); | |
1398 | switch (data[0]) { | |
1399 | case MBS_PORT_ID_USED: | |
1400 | data[1] = le16_to_cpu(mbx->mb1); | |
1401 | break; | |
1402 | case MBS_LOOP_ID_USED: | |
1403 | break; | |
1404 | default: | |
1405 | data[0] = MBS_COMMAND_ERROR; | |
ac280b67 AV |
1406 | break; |
1407 | } | |
1408 | ||
7c3df132 | 1409 | ql_log(ql_log_warn, vha, 0x5046, |
cfb0919c CD |
1410 | "Async-%s failed - hdl=%x portid=%02x%02x%02x status=%x " |
1411 | "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n", type, sp->handle, | |
1412 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
1413 | status, le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1), | |
ac280b67 | 1414 | le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6), |
7c3df132 | 1415 | le16_to_cpu(mbx->mb7)); |
ac280b67 | 1416 | |
99b0bec7 | 1417 | logio_done: |
25ff6af1 | 1418 | sp->done(sp, 0); |
ac280b67 AV |
1419 | } |
1420 | ||
726b8548 QT |
1421 | static void |
1422 | qla24xx_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1423 | struct mbx_24xx_entry *pkt) | |
1424 | { | |
1425 | const char func[] = "MBX-IOCB2"; | |
1426 | srb_t *sp; | |
1427 | struct srb_iocb *si; | |
1428 | u16 sz, i; | |
1429 | int res; | |
1430 | ||
1431 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); | |
1432 | if (!sp) | |
1433 | return; | |
1434 | ||
1435 | si = &sp->u.iocb_cmd; | |
1436 | sz = min(ARRAY_SIZE(pkt->mb), ARRAY_SIZE(sp->u.iocb_cmd.u.mbx.in_mb)); | |
1437 | ||
1438 | for (i = 0; i < sz; i++) | |
1439 | si->u.mbx.in_mb[i] = le16_to_cpu(pkt->mb[i]); | |
1440 | ||
1441 | res = (si->u.mbx.in_mb[0] & MBS_MASK); | |
1442 | ||
25ff6af1 | 1443 | sp->done(sp, res); |
726b8548 QT |
1444 | } |
1445 | ||
1446 | static void | |
1447 | qla24xxx_nack_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1448 | struct nack_to_isp *pkt) | |
1449 | { | |
1450 | const char func[] = "nack"; | |
1451 | srb_t *sp; | |
1452 | int res = 0; | |
1453 | ||
1454 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); | |
1455 | if (!sp) | |
1456 | return; | |
1457 | ||
1458 | if (pkt->u.isp2x.status != cpu_to_le16(NOTIFY_ACK_SUCCESS)) | |
1459 | res = QLA_FUNCTION_FAILED; | |
1460 | ||
25ff6af1 | 1461 | sp->done(sp, res); |
ac280b67 AV |
1462 | } |
1463 | ||
9bc4f4fb HZ |
1464 | static void |
1465 | qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1466 | sts_entry_t *pkt, int iocb_type) | |
1467 | { | |
1468 | const char func[] = "CT_IOCB"; | |
1469 | const char *type; | |
9bc4f4fb | 1470 | srb_t *sp; |
75cc8cfc | 1471 | struct bsg_job *bsg_job; |
01e0e15c | 1472 | struct fc_bsg_reply *bsg_reply; |
9bc4f4fb | 1473 | uint16_t comp_status; |
726b8548 | 1474 | int res = 0; |
9bc4f4fb HZ |
1475 | |
1476 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); | |
1477 | if (!sp) | |
1478 | return; | |
1479 | ||
726b8548 QT |
1480 | switch (sp->type) { |
1481 | case SRB_CT_CMD: | |
1482 | bsg_job = sp->u.bsg_job; | |
1483 | bsg_reply = bsg_job->reply; | |
1484 | ||
1485 | type = "ct pass-through"; | |
1486 | ||
1487 | comp_status = le16_to_cpu(pkt->comp_status); | |
1488 | ||
1489 | /* | |
1490 | * return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT | |
1491 | * fc payload to the caller | |
1492 | */ | |
1493 | bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK; | |
1494 | bsg_job->reply_len = sizeof(struct fc_bsg_reply); | |
1495 | ||
1496 | if (comp_status != CS_COMPLETE) { | |
1497 | if (comp_status == CS_DATA_UNDERRUN) { | |
1498 | res = DID_OK << 16; | |
1499 | bsg_reply->reply_payload_rcv_len = | |
1500 | le16_to_cpu(((sts_entry_t *)pkt)->rsp_info_len); | |
1501 | ||
1502 | ql_log(ql_log_warn, vha, 0x5048, | |
1503 | "CT pass-through-%s error comp_status=0x%x total_byte=0x%x.\n", | |
1504 | type, comp_status, | |
1505 | bsg_reply->reply_payload_rcv_len); | |
1506 | } else { | |
1507 | ql_log(ql_log_warn, vha, 0x5049, | |
1508 | "CT pass-through-%s error comp_status=0x%x.\n", | |
1509 | type, comp_status); | |
1510 | res = DID_ERROR << 16; | |
1511 | bsg_reply->reply_payload_rcv_len = 0; | |
1512 | } | |
1513 | ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5035, | |
1514 | (uint8_t *)pkt, sizeof(*pkt)); | |
1515 | } else { | |
1516 | res = DID_OK << 16; | |
1517 | bsg_reply->reply_payload_rcv_len = | |
1518 | bsg_job->reply_payload.payload_len; | |
1519 | bsg_job->reply_len = 0; | |
1520 | } | |
1521 | break; | |
1522 | case SRB_CT_PTHRU_CMD: | |
1523 | /* | |
1524 | * borrowing sts_entry_24xx.comp_status. | |
1525 | * same location as ct_entry_24xx.comp_status | |
1526 | */ | |
1527 | res = qla2x00_chk_ms_status(vha, (ms_iocb_entry_t *)pkt, | |
1528 | (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp, | |
1529 | sp->name); | |
1530 | break; | |
9bc4f4fb HZ |
1531 | } |
1532 | ||
25ff6af1 | 1533 | sp->done(sp, res); |
9bc4f4fb HZ |
1534 | } |
1535 | ||
9a069e19 GM |
1536 | static void |
1537 | qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1538 | struct sts_entry_24xx *pkt, int iocb_type) | |
1539 | { | |
1540 | const char func[] = "ELS_CT_IOCB"; | |
1541 | const char *type; | |
9a069e19 | 1542 | srb_t *sp; |
75cc8cfc | 1543 | struct bsg_job *bsg_job; |
01e0e15c | 1544 | struct fc_bsg_reply *bsg_reply; |
9a069e19 GM |
1545 | uint16_t comp_status; |
1546 | uint32_t fw_status[3]; | |
9ba56b95 | 1547 | int res; |
edd05de1 | 1548 | struct srb_iocb *els; |
9a069e19 GM |
1549 | |
1550 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); | |
1551 | if (!sp) | |
1552 | return; | |
9a069e19 GM |
1553 | |
1554 | type = NULL; | |
9ba56b95 | 1555 | switch (sp->type) { |
9a069e19 GM |
1556 | case SRB_ELS_CMD_RPT: |
1557 | case SRB_ELS_CMD_HST: | |
1558 | type = "els"; | |
1559 | break; | |
1560 | case SRB_CT_CMD: | |
1561 | type = "ct pass-through"; | |
1562 | break; | |
6eb54715 HM |
1563 | case SRB_ELS_DCMD: |
1564 | type = "Driver ELS logo"; | |
edd05de1 DG |
1565 | if (iocb_type != ELS_IOCB_TYPE) { |
1566 | ql_dbg(ql_dbg_user, vha, 0x5047, | |
1567 | "Completing %s: (%p) type=%d.\n", | |
1568 | type, sp, sp->type); | |
1569 | sp->done(sp, 0); | |
1570 | return; | |
1571 | } | |
1572 | break; | |
726b8548 QT |
1573 | case SRB_CT_PTHRU_CMD: |
1574 | /* borrowing sts_entry_24xx.comp_status. | |
1575 | same location as ct_entry_24xx.comp_status | |
1576 | */ | |
2d73ac61 | 1577 | res = qla2x00_chk_ms_status(sp->vha, (ms_iocb_entry_t *)pkt, |
726b8548 QT |
1578 | (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp, |
1579 | sp->name); | |
25ff6af1 | 1580 | sp->done(sp, res); |
6eb54715 | 1581 | return; |
9a069e19 | 1582 | default: |
37fed3ee | 1583 | ql_dbg(ql_dbg_user, vha, 0x503e, |
9ba56b95 | 1584 | "Unrecognized SRB: (%p) type=%d.\n", sp, sp->type); |
9a069e19 GM |
1585 | return; |
1586 | } | |
1587 | ||
1588 | comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status); | |
1589 | fw_status[1] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_1); | |
1590 | fw_status[2] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_2); | |
1591 | ||
edd05de1 DG |
1592 | if (iocb_type == ELS_IOCB_TYPE) { |
1593 | els = &sp->u.iocb_cmd; | |
1594 | els->u.els_plogi.fw_status[0] = fw_status[0]; | |
1595 | els->u.els_plogi.fw_status[1] = fw_status[1]; | |
1596 | els->u.els_plogi.fw_status[2] = fw_status[2]; | |
1597 | els->u.els_plogi.comp_status = fw_status[0]; | |
1598 | if (comp_status == CS_COMPLETE) { | |
1599 | res = DID_OK << 16; | |
1600 | } else { | |
1601 | if (comp_status == CS_DATA_UNDERRUN) { | |
1602 | res = DID_OK << 16; | |
1603 | els->u.els_plogi.len = | |
1604 | le16_to_cpu(((struct els_sts_entry_24xx *) | |
1605 | pkt)->total_byte_count); | |
1606 | } else { | |
1607 | els->u.els_plogi.len = 0; | |
1608 | res = DID_ERROR << 16; | |
1609 | } | |
1610 | } | |
1611 | ql_log(ql_log_info, vha, 0x503f, | |
1612 | "ELS IOCB Done -%s error hdl=%x comp_status=0x%x error subcode 1=0x%x error subcode 2=0x%x total_byte=0x%x\n", | |
1613 | type, sp->handle, comp_status, fw_status[1], fw_status[2], | |
1614 | le16_to_cpu(((struct els_sts_entry_24xx *) | |
1615 | pkt)->total_byte_count)); | |
1616 | goto els_ct_done; | |
1617 | } | |
1618 | ||
9a069e19 GM |
1619 | /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT |
1620 | * fc payload to the caller | |
1621 | */ | |
a1730595 DG |
1622 | bsg_job = sp->u.bsg_job; |
1623 | bsg_reply = bsg_job->reply; | |
01e0e15c | 1624 | bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK; |
9a069e19 GM |
1625 | bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status); |
1626 | ||
1627 | if (comp_status != CS_COMPLETE) { | |
1628 | if (comp_status == CS_DATA_UNDERRUN) { | |
9ba56b95 | 1629 | res = DID_OK << 16; |
01e0e15c | 1630 | bsg_reply->reply_payload_rcv_len = |
9ba56b95 | 1631 | le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->total_byte_count); |
9a069e19 | 1632 | |
37fed3ee | 1633 | ql_dbg(ql_dbg_user, vha, 0x503f, |
cfb0919c | 1634 | "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x " |
9a069e19 | 1635 | "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n", |
cfb0919c | 1636 | type, sp->handle, comp_status, fw_status[1], fw_status[2], |
7c3df132 SK |
1637 | le16_to_cpu(((struct els_sts_entry_24xx *) |
1638 | pkt)->total_byte_count)); | |
05231a3b | 1639 | } else { |
37fed3ee | 1640 | ql_dbg(ql_dbg_user, vha, 0x5040, |
cfb0919c | 1641 | "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x " |
9a069e19 | 1642 | "error subcode 1=0x%x error subcode 2=0x%x.\n", |
cfb0919c | 1643 | type, sp->handle, comp_status, |
7c3df132 SK |
1644 | le16_to_cpu(((struct els_sts_entry_24xx *) |
1645 | pkt)->error_subcode_1), | |
1646 | le16_to_cpu(((struct els_sts_entry_24xx *) | |
1647 | pkt)->error_subcode_2)); | |
9ba56b95 | 1648 | res = DID_ERROR << 16; |
01e0e15c | 1649 | bsg_reply->reply_payload_rcv_len = 0; |
9a069e19 | 1650 | } |
05231a3b CH |
1651 | memcpy(bsg_job->reply + sizeof(struct fc_bsg_reply), |
1652 | fw_status, sizeof(fw_status)); | |
37fed3ee | 1653 | ql_dump_buffer(ql_dbg_user + ql_dbg_buffer, vha, 0x5056, |
7c3df132 | 1654 | (uint8_t *)pkt, sizeof(*pkt)); |
9a069e19 GM |
1655 | } |
1656 | else { | |
9ba56b95 | 1657 | res = DID_OK << 16; |
01e0e15c | 1658 | bsg_reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len; |
9a069e19 GM |
1659 | bsg_job->reply_len = 0; |
1660 | } | |
edd05de1 | 1661 | els_ct_done: |
9a069e19 | 1662 | |
25ff6af1 | 1663 | sp->done(sp, res); |
9a069e19 GM |
1664 | } |
1665 | ||
ac280b67 AV |
1666 | static void |
1667 | qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1668 | struct logio_entry_24xx *logio) | |
1669 | { | |
1670 | const char func[] = "LOGIO-IOCB"; | |
1671 | const char *type; | |
ac280b67 AV |
1672 | fc_port_t *fcport; |
1673 | srb_t *sp; | |
4916392b | 1674 | struct srb_iocb *lio; |
99b0bec7 | 1675 | uint16_t *data; |
ac280b67 AV |
1676 | uint32_t iop[2]; |
1677 | ||
1678 | sp = qla2x00_get_sp_from_handle(vha, func, req, logio); | |
1679 | if (!sp) | |
1680 | return; | |
1681 | ||
9ba56b95 GM |
1682 | lio = &sp->u.iocb_cmd; |
1683 | type = sp->name; | |
ac280b67 | 1684 | fcport = sp->fcport; |
4916392b | 1685 | data = lio->u.logio.data; |
ac280b67 | 1686 | |
5ff1d584 | 1687 | data[0] = MBS_COMMAND_ERROR; |
4916392b | 1688 | data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? |
5ff1d584 | 1689 | QLA_LOGIO_LOGIN_RETRIED : 0; |
ac280b67 | 1690 | if (logio->entry_status) { |
5e19ed90 | 1691 | ql_log(ql_log_warn, fcport->vha, 0x5034, |
5b33469a | 1692 | "Async-%s error entry - %8phC hdl=%x" |
d3fa9e7d | 1693 | "portid=%02x%02x%02x entry-status=%x.\n", |
5b33469a | 1694 | type, fcport->port_name, sp->handle, fcport->d_id.b.domain, |
cfb0919c CD |
1695 | fcport->d_id.b.area, fcport->d_id.b.al_pa, |
1696 | logio->entry_status); | |
1697 | ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d, | |
7c3df132 | 1698 | (uint8_t *)logio, sizeof(*logio)); |
ac280b67 | 1699 | |
99b0bec7 | 1700 | goto logio_done; |
ac280b67 AV |
1701 | } |
1702 | ||
1703 | if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) { | |
5e19ed90 | 1704 | ql_dbg(ql_dbg_async, fcport->vha, 0x5036, |
5b33469a QT |
1705 | "Async-%s complete - %8phC hdl=%x portid=%02x%02x%02x " |
1706 | "iop0=%x.\n", type, fcport->port_name, sp->handle, | |
1707 | fcport->d_id.b.domain, | |
cfb0919c | 1708 | fcport->d_id.b.area, fcport->d_id.b.al_pa, |
7c3df132 | 1709 | le32_to_cpu(logio->io_parameter[0])); |
ac280b67 | 1710 | |
ead03855 | 1711 | vha->hw->exch_starvation = 0; |
ac280b67 | 1712 | data[0] = MBS_COMMAND_COMPLETE; |
9ba56b95 | 1713 | if (sp->type != SRB_LOGIN_CMD) |
99b0bec7 | 1714 | goto logio_done; |
ac280b67 AV |
1715 | |
1716 | iop[0] = le32_to_cpu(logio->io_parameter[0]); | |
1717 | if (iop[0] & BIT_4) { | |
1718 | fcport->port_type = FCT_TARGET; | |
1719 | if (iop[0] & BIT_8) | |
8474f3a0 | 1720 | fcport->flags |= FCF_FCP2_DEVICE; |
b0cd579c | 1721 | } else if (iop[0] & BIT_5) |
ac280b67 | 1722 | fcport->port_type = FCT_INITIATOR; |
b0cd579c | 1723 | |
2d70c103 NB |
1724 | if (iop[0] & BIT_7) |
1725 | fcport->flags |= FCF_CONF_COMP_SUPPORTED; | |
1726 | ||
ac280b67 AV |
1727 | if (logio->io_parameter[7] || logio->io_parameter[8]) |
1728 | fcport->supported_classes |= FC_COS_CLASS2; | |
1729 | if (logio->io_parameter[9] || logio->io_parameter[10]) | |
1730 | fcport->supported_classes |= FC_COS_CLASS3; | |
1731 | ||
99b0bec7 | 1732 | goto logio_done; |
ac280b67 AV |
1733 | } |
1734 | ||
1735 | iop[0] = le32_to_cpu(logio->io_parameter[0]); | |
1736 | iop[1] = le32_to_cpu(logio->io_parameter[1]); | |
726b8548 QT |
1737 | lio->u.logio.iop[0] = iop[0]; |
1738 | lio->u.logio.iop[1] = iop[1]; | |
ac280b67 AV |
1739 | switch (iop[0]) { |
1740 | case LSC_SCODE_PORTID_USED: | |
1741 | data[0] = MBS_PORT_ID_USED; | |
1742 | data[1] = LSW(iop[1]); | |
1743 | break; | |
1744 | case LSC_SCODE_NPORT_USED: | |
1745 | data[0] = MBS_LOOP_ID_USED; | |
1746 | break; | |
5b33469a QT |
1747 | case LSC_SCODE_CMD_FAILED: |
1748 | if (iop[1] == 0x0606) { | |
1749 | /* | |
1750 | * PLOGI/PRLI Completed. We must have Recv PLOGI/PRLI, | |
1751 | * Target side acked. | |
1752 | */ | |
1753 | data[0] = MBS_COMMAND_COMPLETE; | |
1754 | goto logio_done; | |
1755 | } | |
1756 | data[0] = MBS_COMMAND_ERROR; | |
1757 | break; | |
ead03855 QT |
1758 | case LSC_SCODE_NOXCB: |
1759 | vha->hw->exch_starvation++; | |
1760 | if (vha->hw->exch_starvation > 5) { | |
83548fe2 | 1761 | ql_log(ql_log_warn, vha, 0xd046, |
ead03855 QT |
1762 | "Exchange starvation. Resetting RISC\n"); |
1763 | ||
1764 | vha->hw->exch_starvation = 0; | |
1765 | ||
1766 | if (IS_P3P_TYPE(vha->hw)) | |
1767 | set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); | |
1768 | else | |
1769 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
1770 | qla2xxx_wake_dpc(vha); | |
1771 | } | |
81881861 | 1772 | /* fall through */ |
ac280b67 AV |
1773 | default: |
1774 | data[0] = MBS_COMMAND_ERROR; | |
ac280b67 AV |
1775 | break; |
1776 | } | |
1777 | ||
5e19ed90 | 1778 | ql_dbg(ql_dbg_async, fcport->vha, 0x5037, |
5b33469a QT |
1779 | "Async-%s failed - %8phC hdl=%x portid=%02x%02x%02x comp=%x " |
1780 | "iop0=%x iop1=%x.\n", type, fcport->port_name, | |
1781 | sp->handle, fcport->d_id.b.domain, | |
d3fa9e7d | 1782 | fcport->d_id.b.area, fcport->d_id.b.al_pa, |
ac280b67 AV |
1783 | le16_to_cpu(logio->comp_status), |
1784 | le32_to_cpu(logio->io_parameter[0]), | |
7c3df132 | 1785 | le32_to_cpu(logio->io_parameter[1])); |
ac280b67 | 1786 | |
99b0bec7 | 1787 | logio_done: |
25ff6af1 | 1788 | sp->done(sp, 0); |
ac280b67 AV |
1789 | } |
1790 | ||
3822263e | 1791 | static void |
faef62d1 | 1792 | qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, void *tsk) |
3822263e MI |
1793 | { |
1794 | const char func[] = "TMF-IOCB"; | |
1795 | const char *type; | |
1796 | fc_port_t *fcport; | |
1797 | srb_t *sp; | |
1798 | struct srb_iocb *iocb; | |
3822263e | 1799 | struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk; |
3822263e MI |
1800 | |
1801 | sp = qla2x00_get_sp_from_handle(vha, func, req, tsk); | |
1802 | if (!sp) | |
1803 | return; | |
1804 | ||
9ba56b95 GM |
1805 | iocb = &sp->u.iocb_cmd; |
1806 | type = sp->name; | |
3822263e | 1807 | fcport = sp->fcport; |
faef62d1 | 1808 | iocb->u.tmf.data = QLA_SUCCESS; |
3822263e MI |
1809 | |
1810 | if (sts->entry_status) { | |
5e19ed90 | 1811 | ql_log(ql_log_warn, fcport->vha, 0x5038, |
cfb0919c CD |
1812 | "Async-%s error - hdl=%x entry-status(%x).\n", |
1813 | type, sp->handle, sts->entry_status); | |
faef62d1 | 1814 | iocb->u.tmf.data = QLA_FUNCTION_FAILED; |
ad950360 | 1815 | } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) { |
5e19ed90 | 1816 | ql_log(ql_log_warn, fcport->vha, 0x5039, |
cfb0919c CD |
1817 | "Async-%s error - hdl=%x completion status(%x).\n", |
1818 | type, sp->handle, sts->comp_status); | |
faef62d1 AB |
1819 | iocb->u.tmf.data = QLA_FUNCTION_FAILED; |
1820 | } else if ((le16_to_cpu(sts->scsi_status) & | |
3822263e | 1821 | SS_RESPONSE_INFO_LEN_VALID)) { |
faef62d1 AB |
1822 | if (le32_to_cpu(sts->rsp_data_len) < 4) { |
1823 | ql_log(ql_log_warn, fcport->vha, 0x503b, | |
1824 | "Async-%s error - hdl=%x not enough response(%d).\n", | |
1825 | type, sp->handle, sts->rsp_data_len); | |
1826 | } else if (sts->data[3]) { | |
1827 | ql_log(ql_log_warn, fcport->vha, 0x503c, | |
1828 | "Async-%s error - hdl=%x response(%x).\n", | |
1829 | type, sp->handle, sts->data[3]); | |
8d2b21db | 1830 | iocb->u.tmf.data = QLA_FUNCTION_FAILED; |
faef62d1 | 1831 | } |
3822263e MI |
1832 | } |
1833 | ||
faef62d1 | 1834 | if (iocb->u.tmf.data != QLA_SUCCESS) |
7c3df132 SK |
1835 | ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5055, |
1836 | (uint8_t *)sts, sizeof(*sts)); | |
3822263e | 1837 | |
25ff6af1 | 1838 | sp->done(sp, 0); |
3822263e MI |
1839 | } |
1840 | ||
60dd6e8e DT |
1841 | static void qla24xx_nvme_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, |
1842 | void *tsk, srb_t *sp) | |
7401bc18 | 1843 | { |
7401bc18 | 1844 | fc_port_t *fcport; |
7401bc18 DG |
1845 | struct srb_iocb *iocb; |
1846 | struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk; | |
1847 | uint16_t state_flags; | |
1848 | struct nvmefc_fcp_req *fd; | |
1849 | uint16_t ret = 0; | |
7401bc18 DG |
1850 | |
1851 | iocb = &sp->u.iocb_cmd; | |
1852 | fcport = sp->fcport; | |
1853 | iocb->u.nvme.comp_status = le16_to_cpu(sts->comp_status); | |
1854 | state_flags = le16_to_cpu(sts->state_flags); | |
1855 | fd = iocb->u.nvme.desc; | |
7401bc18 | 1856 | |
60dd6e8e | 1857 | if (unlikely(iocb->u.nvme.aen_op)) |
deeae7a6 | 1858 | atomic_dec(&sp->vha->hw->nvme_active_aen_cnt); |
7401bc18 DG |
1859 | |
1860 | /* | |
1861 | * State flags: Bit 6 and 0. | |
1862 | * If 0 is set, we don't care about 6. | |
1863 | * both cases resp was dma'd to host buffer | |
1864 | * if both are 0, that is good path case. | |
1865 | * if six is set and 0 is clear, we need to | |
1866 | * copy resp data from status iocb to resp buffer. | |
1867 | */ | |
1868 | if (!(state_flags & (SF_FCP_RSP_DMA | SF_NVME_ERSP))) { | |
1869 | iocb->u.nvme.rsp_pyld_len = 0; | |
1870 | } else if ((state_flags & SF_FCP_RSP_DMA)) { | |
1871 | iocb->u.nvme.rsp_pyld_len = le16_to_cpu(sts->nvme_rsp_pyld_len); | |
1872 | } else if (state_flags & SF_NVME_ERSP) { | |
1873 | uint32_t *inbuf, *outbuf; | |
1874 | uint16_t iter; | |
1875 | ||
1876 | inbuf = (uint32_t *)&sts->nvme_ersp_data; | |
1877 | outbuf = (uint32_t *)fd->rspaddr; | |
1878 | iocb->u.nvme.rsp_pyld_len = le16_to_cpu(sts->nvme_rsp_pyld_len); | |
1879 | iter = iocb->u.nvme.rsp_pyld_len >> 2; | |
1880 | for (; iter; iter--) | |
1881 | *outbuf++ = swab32(*inbuf++); | |
1882 | } else { /* unhandled case */ | |
1883 | ql_log(ql_log_warn, fcport->vha, 0x503a, | |
1884 | "NVME-%s error. Unhandled state_flags of %x\n", | |
1885 | sp->name, state_flags); | |
1886 | } | |
1887 | ||
1888 | fd->transferred_length = fd->payload_length - | |
1889 | le32_to_cpu(sts->residual_len); | |
1890 | ||
60dd6e8e DT |
1891 | switch (le16_to_cpu(sts->comp_status)) { |
1892 | case CS_COMPLETE: | |
1893 | ret = QLA_SUCCESS; | |
1894 | break; | |
1895 | case CS_ABORTED: | |
1896 | case CS_RESET: | |
1897 | case CS_PORT_UNAVAILABLE: | |
1898 | case CS_PORT_LOGGED_OUT: | |
1899 | case CS_PORT_BUSY: | |
1900 | ql_log(ql_log_warn, fcport->vha, 0x5060, | |
1901 | "NVME-%s ERR Handling - hdl=%x completion status(%x) resid=%x ox_id=%x\n", | |
1902 | sp->name, sp->handle, sts->comp_status, | |
1903 | le32_to_cpu(sts->residual_len), sts->ox_id); | |
1904 | fd->transferred_length = 0; | |
1905 | iocb->u.nvme.rsp_pyld_len = 0; | |
1906 | ret = QLA_ABORTED; | |
1907 | break; | |
1908 | default: | |
1909 | ql_log(ql_log_warn, fcport->vha, 0x5060, | |
1910 | "NVME-%s error - hdl=%x completion status(%x) resid=%x ox_id=%x\n", | |
1911 | sp->name, sp->handle, sts->comp_status, | |
1912 | le32_to_cpu(sts->residual_len), sts->ox_id); | |
7401bc18 | 1913 | ret = QLA_FUNCTION_FAILED; |
60dd6e8e | 1914 | break; |
7401bc18 DG |
1915 | } |
1916 | sp->done(sp, ret); | |
1917 | } | |
1918 | ||
2853192e QT |
1919 | static void qla_ctrlvp_completed(scsi_qla_host_t *vha, struct req_que *req, |
1920 | struct vp_ctrl_entry_24xx *vce) | |
1921 | { | |
1922 | const char func[] = "CTRLVP-IOCB"; | |
1923 | srb_t *sp; | |
1924 | int rval = QLA_SUCCESS; | |
1925 | ||
1926 | sp = qla2x00_get_sp_from_handle(vha, func, req, vce); | |
1927 | if (!sp) | |
1928 | return; | |
1929 | ||
1930 | if (vce->entry_status != 0) { | |
1931 | ql_dbg(ql_dbg_vport, vha, 0x10c4, | |
1932 | "%s: Failed to complete IOCB -- error status (%x)\n", | |
1933 | sp->name, vce->entry_status); | |
1934 | rval = QLA_FUNCTION_FAILED; | |
1935 | } else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) { | |
1936 | ql_dbg(ql_dbg_vport, vha, 0x10c5, | |
1937 | "%s: Failed to complete IOCB -- completion status (%x) vpidx %x\n", | |
1938 | sp->name, le16_to_cpu(vce->comp_status), | |
1939 | le16_to_cpu(vce->vp_idx_failed)); | |
1940 | rval = QLA_FUNCTION_FAILED; | |
1941 | } else { | |
1942 | ql_dbg(ql_dbg_vport, vha, 0x10c6, | |
1943 | "Done %s.\n", __func__); | |
1944 | } | |
1945 | ||
1946 | sp->rc = rval; | |
1947 | sp->done(sp, rval); | |
1948 | } | |
1949 | ||
1da177e4 LT |
1950 | /** |
1951 | * qla2x00_process_response_queue() - Process response queue entries. | |
2db6228d | 1952 | * @rsp: response queue |
1da177e4 LT |
1953 | */ |
1954 | void | |
73208dfd | 1955 | qla2x00_process_response_queue(struct rsp_que *rsp) |
1da177e4 | 1956 | { |
73208dfd AC |
1957 | struct scsi_qla_host *vha; |
1958 | struct qla_hw_data *ha = rsp->hw; | |
3d71644c | 1959 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 LT |
1960 | sts_entry_t *pkt; |
1961 | uint16_t handle_cnt; | |
1962 | uint16_t cnt; | |
73208dfd | 1963 | |
2afa19a9 | 1964 | vha = pci_get_drvdata(ha->pdev); |
1da177e4 | 1965 | |
e315cd28 | 1966 | if (!vha->flags.online) |
1da177e4 LT |
1967 | return; |
1968 | ||
e315cd28 AC |
1969 | while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) { |
1970 | pkt = (sts_entry_t *)rsp->ring_ptr; | |
1da177e4 | 1971 | |
e315cd28 AC |
1972 | rsp->ring_index++; |
1973 | if (rsp->ring_index == rsp->length) { | |
1974 | rsp->ring_index = 0; | |
1975 | rsp->ring_ptr = rsp->ring; | |
1da177e4 | 1976 | } else { |
e315cd28 | 1977 | rsp->ring_ptr++; |
1da177e4 LT |
1978 | } |
1979 | ||
1980 | if (pkt->entry_status != 0) { | |
73208dfd | 1981 | qla2x00_error_entry(vha, rsp, pkt); |
1da177e4 LT |
1982 | ((response_t *)pkt)->signature = RESPONSE_PROCESSED; |
1983 | wmb(); | |
1984 | continue; | |
1985 | } | |
1986 | ||
1987 | switch (pkt->entry_type) { | |
1988 | case STATUS_TYPE: | |
73208dfd | 1989 | qla2x00_status_entry(vha, rsp, pkt); |
1da177e4 LT |
1990 | break; |
1991 | case STATUS_TYPE_21: | |
1992 | handle_cnt = ((sts21_entry_t *)pkt)->handle_count; | |
1993 | for (cnt = 0; cnt < handle_cnt; cnt++) { | |
73208dfd | 1994 | qla2x00_process_completed_request(vha, rsp->req, |
1da177e4 LT |
1995 | ((sts21_entry_t *)pkt)->handle[cnt]); |
1996 | } | |
1997 | break; | |
1998 | case STATUS_TYPE_22: | |
1999 | handle_cnt = ((sts22_entry_t *)pkt)->handle_count; | |
2000 | for (cnt = 0; cnt < handle_cnt; cnt++) { | |
73208dfd | 2001 | qla2x00_process_completed_request(vha, rsp->req, |
1da177e4 LT |
2002 | ((sts22_entry_t *)pkt)->handle[cnt]); |
2003 | } | |
2004 | break; | |
2005 | case STATUS_CONT_TYPE: | |
2afa19a9 | 2006 | qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt); |
1da177e4 | 2007 | break; |
ac280b67 AV |
2008 | case MBX_IOCB_TYPE: |
2009 | qla2x00_mbx_iocb_entry(vha, rsp->req, | |
2010 | (struct mbx_entry *)pkt); | |
3822263e | 2011 | break; |
9bc4f4fb HZ |
2012 | case CT_IOCB_TYPE: |
2013 | qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE); | |
2014 | break; | |
1da177e4 LT |
2015 | default: |
2016 | /* Type Not Supported. */ | |
7c3df132 SK |
2017 | ql_log(ql_log_warn, vha, 0x504a, |
2018 | "Received unknown response pkt type %x " | |
1da177e4 | 2019 | "entry status=%x.\n", |
7c3df132 | 2020 | pkt->entry_type, pkt->entry_status); |
1da177e4 LT |
2021 | break; |
2022 | } | |
2023 | ((response_t *)pkt)->signature = RESPONSE_PROCESSED; | |
2024 | wmb(); | |
2025 | } | |
2026 | ||
2027 | /* Adjust ring index */ | |
e315cd28 | 2028 | WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index); |
1da177e4 LT |
2029 | } |
2030 | ||
4733fcb1 | 2031 | static inline void |
5544213b | 2032 | qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len, |
9ba56b95 | 2033 | uint32_t sense_len, struct rsp_que *rsp, int res) |
4733fcb1 | 2034 | { |
25ff6af1 | 2035 | struct scsi_qla_host *vha = sp->vha; |
9ba56b95 GM |
2036 | struct scsi_cmnd *cp = GET_CMD_SP(sp); |
2037 | uint32_t track_sense_len; | |
4733fcb1 AV |
2038 | |
2039 | if (sense_len >= SCSI_SENSE_BUFFERSIZE) | |
2040 | sense_len = SCSI_SENSE_BUFFERSIZE; | |
2041 | ||
9ba56b95 GM |
2042 | SET_CMD_SENSE_LEN(sp, sense_len); |
2043 | SET_CMD_SENSE_PTR(sp, cp->sense_buffer); | |
2044 | track_sense_len = sense_len; | |
2045 | ||
2046 | if (sense_len > par_sense_len) | |
5544213b | 2047 | sense_len = par_sense_len; |
4733fcb1 AV |
2048 | |
2049 | memcpy(cp->sense_buffer, sense_data, sense_len); | |
2050 | ||
9ba56b95 GM |
2051 | SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len); |
2052 | track_sense_len -= sense_len; | |
2053 | SET_CMD_SENSE_LEN(sp, track_sense_len); | |
2054 | ||
2055 | if (track_sense_len != 0) { | |
2afa19a9 | 2056 | rsp->status_srb = sp; |
9ba56b95 GM |
2057 | cp->result = res; |
2058 | } | |
4733fcb1 | 2059 | |
cfb0919c CD |
2060 | if (sense_len) { |
2061 | ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x301c, | |
9cb78c16 | 2062 | "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n", |
25ff6af1 | 2063 | sp->vha->host_no, cp->device->id, cp->device->lun, |
cfb0919c | 2064 | cp); |
7c3df132 SK |
2065 | ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b, |
2066 | cp->sense_buffer, sense_len); | |
cfb0919c | 2067 | } |
4733fcb1 AV |
2068 | } |
2069 | ||
bad75002 AE |
2070 | struct scsi_dif_tuple { |
2071 | __be16 guard; /* Checksum */ | |
d6a03581 | 2072 | __be16 app_tag; /* APPL identifier */ |
bad75002 AE |
2073 | __be32 ref_tag; /* Target LBA or indirect LBA */ |
2074 | }; | |
2075 | ||
2076 | /* | |
2077 | * Checks the guard or meta-data for the type of error | |
2078 | * detected by the HBA. In case of errors, we set the | |
2079 | * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST | |
2080 | * to indicate to the kernel that the HBA detected error. | |
2081 | */ | |
8cb2049c | 2082 | static inline int |
bad75002 AE |
2083 | qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24) |
2084 | { | |
25ff6af1 | 2085 | struct scsi_qla_host *vha = sp->vha; |
9ba56b95 | 2086 | struct scsi_cmnd *cmd = GET_CMD_SP(sp); |
8cb2049c AE |
2087 | uint8_t *ap = &sts24->data[12]; |
2088 | uint8_t *ep = &sts24->data[20]; | |
bad75002 AE |
2089 | uint32_t e_ref_tag, a_ref_tag; |
2090 | uint16_t e_app_tag, a_app_tag; | |
2091 | uint16_t e_guard, a_guard; | |
2092 | ||
8cb2049c AE |
2093 | /* |
2094 | * swab32 of the "data" field in the beginning of qla2x00_status_entry() | |
2095 | * would make guard field appear at offset 2 | |
2096 | */ | |
2097 | a_guard = le16_to_cpu(*(uint16_t *)(ap + 2)); | |
2098 | a_app_tag = le16_to_cpu(*(uint16_t *)(ap + 0)); | |
2099 | a_ref_tag = le32_to_cpu(*(uint32_t *)(ap + 4)); | |
2100 | e_guard = le16_to_cpu(*(uint16_t *)(ep + 2)); | |
2101 | e_app_tag = le16_to_cpu(*(uint16_t *)(ep + 0)); | |
2102 | e_ref_tag = le32_to_cpu(*(uint32_t *)(ep + 4)); | |
bad75002 | 2103 | |
7c3df132 SK |
2104 | ql_dbg(ql_dbg_io, vha, 0x3023, |
2105 | "iocb(s) %p Returned STATUS.\n", sts24); | |
bad75002 | 2106 | |
7c3df132 SK |
2107 | ql_dbg(ql_dbg_io, vha, 0x3024, |
2108 | "DIF ERROR in cmd 0x%x lba 0x%llx act ref" | |
bad75002 | 2109 | " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app" |
7c3df132 | 2110 | " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n", |
bad75002 | 2111 | cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag, |
7c3df132 | 2112 | a_app_tag, e_app_tag, a_guard, e_guard); |
bad75002 | 2113 | |
8cb2049c AE |
2114 | /* |
2115 | * Ignore sector if: | |
2116 | * For type 3: ref & app tag is all 'f's | |
2117 | * For type 0,1,2: app tag is all 'f's | |
2118 | */ | |
128b6f9f | 2119 | if ((a_app_tag == T10_PI_APP_ESCAPE) && |
8cb2049c | 2120 | ((scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3) || |
128b6f9f | 2121 | (a_ref_tag == T10_PI_REF_ESCAPE))) { |
8cb2049c AE |
2122 | uint32_t blocks_done, resid; |
2123 | sector_t lba_s = scsi_get_lba(cmd); | |
2124 | ||
2125 | /* 2TB boundary case covered automatically with this */ | |
2126 | blocks_done = e_ref_tag - (uint32_t)lba_s + 1; | |
2127 | ||
2128 | resid = scsi_bufflen(cmd) - (blocks_done * | |
2129 | cmd->device->sector_size); | |
2130 | ||
2131 | scsi_set_resid(cmd, resid); | |
2132 | cmd->result = DID_OK << 16; | |
2133 | ||
2134 | /* Update protection tag */ | |
2135 | if (scsi_prot_sg_count(cmd)) { | |
2136 | uint32_t i, j = 0, k = 0, num_ent; | |
2137 | struct scatterlist *sg; | |
27c0e83b | 2138 | struct t10_pi_tuple *spt; |
8cb2049c AE |
2139 | |
2140 | /* Patch the corresponding protection tags */ | |
2141 | scsi_for_each_prot_sg(cmd, sg, | |
2142 | scsi_prot_sg_count(cmd), i) { | |
2143 | num_ent = sg_dma_len(sg) / 8; | |
2144 | if (k + num_ent < blocks_done) { | |
2145 | k += num_ent; | |
2146 | continue; | |
2147 | } | |
2148 | j = blocks_done - k - 1; | |
2149 | k = blocks_done; | |
2150 | break; | |
2151 | } | |
2152 | ||
2153 | if (k != blocks_done) { | |
cfb0919c | 2154 | ql_log(ql_log_warn, vha, 0x302f, |
8ec9c7fb RD |
2155 | "unexpected tag values tag:lba=%x:%llx)\n", |
2156 | e_ref_tag, (unsigned long long)lba_s); | |
8cb2049c AE |
2157 | return 1; |
2158 | } | |
2159 | ||
2160 | spt = page_address(sg_page(sg)) + sg->offset; | |
2161 | spt += j; | |
2162 | ||
128b6f9f | 2163 | spt->app_tag = T10_PI_APP_ESCAPE; |
8cb2049c | 2164 | if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3) |
128b6f9f | 2165 | spt->ref_tag = T10_PI_REF_ESCAPE; |
8cb2049c AE |
2166 | } |
2167 | ||
2168 | return 0; | |
2169 | } | |
2170 | ||
bad75002 AE |
2171 | /* check guard */ |
2172 | if (e_guard != a_guard) { | |
2173 | scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, | |
2174 | 0x10, 0x1); | |
2175 | set_driver_byte(cmd, DRIVER_SENSE); | |
2176 | set_host_byte(cmd, DID_ABORT); | |
584d7aad | 2177 | cmd->result |= SAM_STAT_CHECK_CONDITION; |
8cb2049c | 2178 | return 1; |
bad75002 AE |
2179 | } |
2180 | ||
e02587d7 AE |
2181 | /* check ref tag */ |
2182 | if (e_ref_tag != a_ref_tag) { | |
bad75002 | 2183 | scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, |
e02587d7 | 2184 | 0x10, 0x3); |
bad75002 AE |
2185 | set_driver_byte(cmd, DRIVER_SENSE); |
2186 | set_host_byte(cmd, DID_ABORT); | |
584d7aad | 2187 | cmd->result |= SAM_STAT_CHECK_CONDITION; |
8cb2049c | 2188 | return 1; |
bad75002 AE |
2189 | } |
2190 | ||
e02587d7 AE |
2191 | /* check appl tag */ |
2192 | if (e_app_tag != a_app_tag) { | |
bad75002 | 2193 | scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, |
e02587d7 | 2194 | 0x10, 0x2); |
bad75002 AE |
2195 | set_driver_byte(cmd, DRIVER_SENSE); |
2196 | set_host_byte(cmd, DID_ABORT); | |
584d7aad | 2197 | cmd->result |= SAM_STAT_CHECK_CONDITION; |
8cb2049c | 2198 | return 1; |
bad75002 | 2199 | } |
e02587d7 | 2200 | |
8cb2049c | 2201 | return 1; |
bad75002 AE |
2202 | } |
2203 | ||
a9b6f722 SK |
2204 | static void |
2205 | qla25xx_process_bidir_status_iocb(scsi_qla_host_t *vha, void *pkt, | |
2206 | struct req_que *req, uint32_t index) | |
2207 | { | |
2208 | struct qla_hw_data *ha = vha->hw; | |
2209 | srb_t *sp; | |
2210 | uint16_t comp_status; | |
2211 | uint16_t scsi_status; | |
2212 | uint16_t thread_id; | |
2213 | uint32_t rval = EXT_STATUS_OK; | |
75cc8cfc | 2214 | struct bsg_job *bsg_job = NULL; |
01e0e15c JT |
2215 | struct fc_bsg_request *bsg_request; |
2216 | struct fc_bsg_reply *bsg_reply; | |
a9b6f722 SK |
2217 | sts_entry_t *sts; |
2218 | struct sts_entry_24xx *sts24; | |
2219 | sts = (sts_entry_t *) pkt; | |
2220 | sts24 = (struct sts_entry_24xx *) pkt; | |
2221 | ||
2222 | /* Validate handle. */ | |
8d93f550 | 2223 | if (index >= req->num_outstanding_cmds) { |
a9b6f722 SK |
2224 | ql_log(ql_log_warn, vha, 0x70af, |
2225 | "Invalid SCSI completion handle 0x%x.\n", index); | |
2226 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
2227 | return; | |
2228 | } | |
2229 | ||
2230 | sp = req->outstanding_cmds[index]; | |
01e0e15c | 2231 | if (!sp) { |
a9b6f722 SK |
2232 | ql_log(ql_log_warn, vha, 0x70b0, |
2233 | "Req:%d: Invalid ISP SCSI completion handle(0x%x)\n", | |
2234 | req->id, index); | |
2235 | ||
2236 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
2237 | return; | |
2238 | } | |
2239 | ||
01e0e15c JT |
2240 | /* Free outstanding command slot. */ |
2241 | req->outstanding_cmds[index] = NULL; | |
2242 | bsg_job = sp->u.bsg_job; | |
2243 | bsg_request = bsg_job->request; | |
2244 | bsg_reply = bsg_job->reply; | |
2245 | ||
a9b6f722 SK |
2246 | if (IS_FWI2_CAPABLE(ha)) { |
2247 | comp_status = le16_to_cpu(sts24->comp_status); | |
2248 | scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK; | |
2249 | } else { | |
2250 | comp_status = le16_to_cpu(sts->comp_status); | |
2251 | scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK; | |
2252 | } | |
2253 | ||
01e0e15c | 2254 | thread_id = bsg_request->rqst_data.h_vendor.vendor_cmd[1]; |
a9b6f722 SK |
2255 | switch (comp_status) { |
2256 | case CS_COMPLETE: | |
2257 | if (scsi_status == 0) { | |
01e0e15c | 2258 | bsg_reply->reply_payload_rcv_len = |
a9b6f722 | 2259 | bsg_job->reply_payload.payload_len; |
fabbb8df | 2260 | vha->qla_stats.input_bytes += |
01e0e15c | 2261 | bsg_reply->reply_payload_rcv_len; |
fabbb8df | 2262 | vha->qla_stats.input_requests++; |
a9b6f722 SK |
2263 | rval = EXT_STATUS_OK; |
2264 | } | |
2265 | goto done; | |
2266 | ||
2267 | case CS_DATA_OVERRUN: | |
2268 | ql_dbg(ql_dbg_user, vha, 0x70b1, | |
5a68a1c2 | 2269 | "Command completed with data overrun thread_id=%d\n", |
a9b6f722 SK |
2270 | thread_id); |
2271 | rval = EXT_STATUS_DATA_OVERRUN; | |
2272 | break; | |
2273 | ||
2274 | case CS_DATA_UNDERRUN: | |
2275 | ql_dbg(ql_dbg_user, vha, 0x70b2, | |
5a68a1c2 | 2276 | "Command completed with data underrun thread_id=%d\n", |
a9b6f722 SK |
2277 | thread_id); |
2278 | rval = EXT_STATUS_DATA_UNDERRUN; | |
2279 | break; | |
2280 | case CS_BIDIR_RD_OVERRUN: | |
2281 | ql_dbg(ql_dbg_user, vha, 0x70b3, | |
2282 | "Command completed with read data overrun thread_id=%d\n", | |
2283 | thread_id); | |
2284 | rval = EXT_STATUS_DATA_OVERRUN; | |
2285 | break; | |
2286 | ||
2287 | case CS_BIDIR_RD_WR_OVERRUN: | |
2288 | ql_dbg(ql_dbg_user, vha, 0x70b4, | |
2289 | "Command completed with read and write data overrun " | |
2290 | "thread_id=%d\n", thread_id); | |
2291 | rval = EXT_STATUS_DATA_OVERRUN; | |
2292 | break; | |
2293 | ||
2294 | case CS_BIDIR_RD_OVERRUN_WR_UNDERRUN: | |
2295 | ql_dbg(ql_dbg_user, vha, 0x70b5, | |
2296 | "Command completed with read data over and write data " | |
2297 | "underrun thread_id=%d\n", thread_id); | |
2298 | rval = EXT_STATUS_DATA_OVERRUN; | |
2299 | break; | |
2300 | ||
2301 | case CS_BIDIR_RD_UNDERRUN: | |
2302 | ql_dbg(ql_dbg_user, vha, 0x70b6, | |
5a68a1c2 | 2303 | "Command completed with read data underrun " |
a9b6f722 SK |
2304 | "thread_id=%d\n", thread_id); |
2305 | rval = EXT_STATUS_DATA_UNDERRUN; | |
2306 | break; | |
2307 | ||
2308 | case CS_BIDIR_RD_UNDERRUN_WR_OVERRUN: | |
2309 | ql_dbg(ql_dbg_user, vha, 0x70b7, | |
2310 | "Command completed with read data under and write data " | |
2311 | "overrun thread_id=%d\n", thread_id); | |
2312 | rval = EXT_STATUS_DATA_UNDERRUN; | |
2313 | break; | |
2314 | ||
2315 | case CS_BIDIR_RD_WR_UNDERRUN: | |
2316 | ql_dbg(ql_dbg_user, vha, 0x70b8, | |
2317 | "Command completed with read and write data underrun " | |
2318 | "thread_id=%d\n", thread_id); | |
2319 | rval = EXT_STATUS_DATA_UNDERRUN; | |
2320 | break; | |
2321 | ||
2322 | case CS_BIDIR_DMA: | |
2323 | ql_dbg(ql_dbg_user, vha, 0x70b9, | |
2324 | "Command completed with data DMA error thread_id=%d\n", | |
2325 | thread_id); | |
2326 | rval = EXT_STATUS_DMA_ERR; | |
2327 | break; | |
2328 | ||
2329 | case CS_TIMEOUT: | |
2330 | ql_dbg(ql_dbg_user, vha, 0x70ba, | |
2331 | "Command completed with timeout thread_id=%d\n", | |
2332 | thread_id); | |
2333 | rval = EXT_STATUS_TIMEOUT; | |
2334 | break; | |
2335 | default: | |
2336 | ql_dbg(ql_dbg_user, vha, 0x70bb, | |
2337 | "Command completed with completion status=0x%x " | |
2338 | "thread_id=%d\n", comp_status, thread_id); | |
2339 | rval = EXT_STATUS_ERR; | |
2340 | break; | |
2341 | } | |
01e0e15c | 2342 | bsg_reply->reply_payload_rcv_len = 0; |
a9b6f722 SK |
2343 | |
2344 | done: | |
2345 | /* Return the vendor specific reply to API */ | |
01e0e15c | 2346 | bsg_reply->reply_data.vendor_reply.vendor_rsp[0] = rval; |
a9b6f722 SK |
2347 | bsg_job->reply_len = sizeof(struct fc_bsg_reply); |
2348 | /* Always return DID_OK, bsg will send the vendor specific response | |
2349 | * in this case only */ | |
f7d5182c | 2350 | sp->done(sp, DID_OK << 16); |
a9b6f722 SK |
2351 | |
2352 | } | |
2353 | ||
1da177e4 LT |
2354 | /** |
2355 | * qla2x00_status_entry() - Process a Status IOCB entry. | |
2db6228d BVA |
2356 | * @vha: SCSI driver HA context |
2357 | * @rsp: response queue | |
1da177e4 LT |
2358 | * @pkt: Entry pointer |
2359 | */ | |
2360 | static void | |
73208dfd | 2361 | qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt) |
1da177e4 | 2362 | { |
1da177e4 | 2363 | srb_t *sp; |
1da177e4 LT |
2364 | fc_port_t *fcport; |
2365 | struct scsi_cmnd *cp; | |
9a853f71 AV |
2366 | sts_entry_t *sts; |
2367 | struct sts_entry_24xx *sts24; | |
1da177e4 LT |
2368 | uint16_t comp_status; |
2369 | uint16_t scsi_status; | |
b7d2280c | 2370 | uint16_t ox_id; |
1da177e4 LT |
2371 | uint8_t lscsi_status; |
2372 | int32_t resid; | |
5544213b AV |
2373 | uint32_t sense_len, par_sense_len, rsp_info_len, resid_len, |
2374 | fw_resid_len; | |
9a853f71 | 2375 | uint8_t *rsp_info, *sense_data; |
e315cd28 | 2376 | struct qla_hw_data *ha = vha->hw; |
2afa19a9 AC |
2377 | uint32_t handle; |
2378 | uint16_t que; | |
2379 | struct req_que *req; | |
b7d2280c | 2380 | int logit = 1; |
9ba56b95 | 2381 | int res = 0; |
a9b6f722 | 2382 | uint16_t state_flags = 0; |
e05fe292 | 2383 | uint16_t retry_delay = 0; |
9a853f71 AV |
2384 | |
2385 | sts = (sts_entry_t *) pkt; | |
2386 | sts24 = (struct sts_entry_24xx *) pkt; | |
e428924c | 2387 | if (IS_FWI2_CAPABLE(ha)) { |
9a853f71 AV |
2388 | comp_status = le16_to_cpu(sts24->comp_status); |
2389 | scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK; | |
a9b6f722 | 2390 | state_flags = le16_to_cpu(sts24->state_flags); |
9a853f71 AV |
2391 | } else { |
2392 | comp_status = le16_to_cpu(sts->comp_status); | |
2393 | scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK; | |
2394 | } | |
2afa19a9 AC |
2395 | handle = (uint32_t) LSW(sts->handle); |
2396 | que = MSW(sts->handle); | |
2397 | req = ha->req_q_map[que]; | |
a9083016 | 2398 | |
36008cf1 CD |
2399 | /* Check for invalid queue pointer */ |
2400 | if (req == NULL || | |
2401 | que >= find_first_zero_bit(ha->req_qid_map, ha->max_req_queues)) { | |
2402 | ql_dbg(ql_dbg_io, vha, 0x3059, | |
2403 | "Invalid status handle (0x%x): Bad req pointer. req=%p, " | |
2404 | "que=%u.\n", sts->handle, req, que); | |
2405 | return; | |
2406 | } | |
2407 | ||
1da177e4 | 2408 | /* Validate handle. */ |
c7bc4cae | 2409 | if (handle < req->num_outstanding_cmds) { |
2afa19a9 | 2410 | sp = req->outstanding_cmds[handle]; |
c7bc4cae CD |
2411 | if (!sp) { |
2412 | ql_dbg(ql_dbg_io, vha, 0x3075, | |
2413 | "%s(%ld): Already returned command for status handle (0x%x).\n", | |
2414 | __func__, vha->host_no, sts->handle); | |
2415 | return; | |
2416 | } | |
2417 | } else { | |
cfb0919c | 2418 | ql_dbg(ql_dbg_io, vha, 0x3017, |
c7bc4cae CD |
2419 | "Invalid status handle, out of range (0x%x).\n", |
2420 | sts->handle); | |
1da177e4 | 2421 | |
acd3ce88 CD |
2422 | if (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) { |
2423 | if (IS_P3P_TYPE(ha)) | |
2424 | set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); | |
2425 | else | |
2426 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
2427 | qla2xxx_wake_dpc(vha); | |
2428 | } | |
1da177e4 LT |
2429 | return; |
2430 | } | |
a9b6f722 | 2431 | |
c5419e26 QT |
2432 | if (sp->cmd_type != TYPE_SRB) { |
2433 | req->outstanding_cmds[handle] = NULL; | |
2434 | ql_dbg(ql_dbg_io, vha, 0x3015, | |
2435 | "Unknown sp->cmd_type %x %p).\n", | |
2436 | sp->cmd_type, sp); | |
2437 | return; | |
2438 | } | |
2439 | ||
7401bc18 DG |
2440 | /* NVME completion. */ |
2441 | if (sp->type == SRB_NVME_CMD) { | |
60dd6e8e DT |
2442 | req->outstanding_cmds[handle] = NULL; |
2443 | qla24xx_nvme_iocb_entry(vha, req, pkt, sp); | |
7401bc18 DG |
2444 | return; |
2445 | } | |
2446 | ||
a9b6f722 SK |
2447 | if (unlikely((state_flags & BIT_1) && (sp->type == SRB_BIDI_CMD))) { |
2448 | qla25xx_process_bidir_status_iocb(vha, pkt, req, handle); | |
2449 | return; | |
2450 | } | |
2451 | ||
faef62d1 AB |
2452 | /* Task Management completion. */ |
2453 | if (sp->type == SRB_TM_CMD) { | |
2454 | qla24xx_tm_iocb_entry(vha, req, pkt); | |
2455 | return; | |
2456 | } | |
2457 | ||
a9b6f722 SK |
2458 | /* Fast path completion. */ |
2459 | if (comp_status == CS_COMPLETE && scsi_status == 0) { | |
2460 | qla2x00_process_completed_request(vha, req, handle); | |
2461 | ||
2462 | return; | |
2463 | } | |
2464 | ||
2465 | req->outstanding_cmds[handle] = NULL; | |
9ba56b95 | 2466 | cp = GET_CMD_SP(sp); |
1da177e4 | 2467 | if (cp == NULL) { |
cfb0919c | 2468 | ql_dbg(ql_dbg_io, vha, 0x3018, |
7c3df132 SK |
2469 | "Command already returned (0x%x/%p).\n", |
2470 | sts->handle, sp); | |
1da177e4 LT |
2471 | |
2472 | return; | |
2473 | } | |
2474 | ||
8ae6d9c7 | 2475 | lscsi_status = scsi_status & STATUS_MASK; |
1da177e4 | 2476 | |
bdf79621 | 2477 | fcport = sp->fcport; |
1da177e4 | 2478 | |
b7d2280c | 2479 | ox_id = 0; |
5544213b AV |
2480 | sense_len = par_sense_len = rsp_info_len = resid_len = |
2481 | fw_resid_len = 0; | |
e428924c | 2482 | if (IS_FWI2_CAPABLE(ha)) { |
0f00a206 LC |
2483 | if (scsi_status & SS_SENSE_LEN_VALID) |
2484 | sense_len = le32_to_cpu(sts24->sense_len); | |
2485 | if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) | |
2486 | rsp_info_len = le32_to_cpu(sts24->rsp_data_len); | |
2487 | if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) | |
2488 | resid_len = le32_to_cpu(sts24->rsp_residual_count); | |
2489 | if (comp_status == CS_DATA_UNDERRUN) | |
2490 | fw_resid_len = le32_to_cpu(sts24->residual_len); | |
9a853f71 AV |
2491 | rsp_info = sts24->data; |
2492 | sense_data = sts24->data; | |
2493 | host_to_fcp_swap(sts24->data, sizeof(sts24->data)); | |
b7d2280c | 2494 | ox_id = le16_to_cpu(sts24->ox_id); |
5544213b | 2495 | par_sense_len = sizeof(sts24->data); |
e05fe292 CD |
2496 | /* Valid values of the retry delay timer are 0x1-0xffef */ |
2497 | if (sts24->retry_delay > 0 && sts24->retry_delay < 0xfff1) | |
2498 | retry_delay = sts24->retry_delay; | |
9a853f71 | 2499 | } else { |
0f00a206 LC |
2500 | if (scsi_status & SS_SENSE_LEN_VALID) |
2501 | sense_len = le16_to_cpu(sts->req_sense_length); | |
2502 | if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) | |
2503 | rsp_info_len = le16_to_cpu(sts->rsp_info_len); | |
9a853f71 AV |
2504 | resid_len = le32_to_cpu(sts->residual_length); |
2505 | rsp_info = sts->rsp_info; | |
2506 | sense_data = sts->req_sense_data; | |
5544213b | 2507 | par_sense_len = sizeof(sts->req_sense_data); |
9a853f71 AV |
2508 | } |
2509 | ||
1da177e4 LT |
2510 | /* Check for any FCP transport errors. */ |
2511 | if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) { | |
9a853f71 | 2512 | /* Sense data lies beyond any FCP RESPONSE data. */ |
5544213b | 2513 | if (IS_FWI2_CAPABLE(ha)) { |
9a853f71 | 2514 | sense_data += rsp_info_len; |
5544213b AV |
2515 | par_sense_len -= rsp_info_len; |
2516 | } | |
9a853f71 | 2517 | if (rsp_info_len > 3 && rsp_info[3]) { |
5e19ed90 | 2518 | ql_dbg(ql_dbg_io, fcport->vha, 0x3019, |
7c3df132 SK |
2519 | "FCP I/O protocol failure (0x%x/0x%x).\n", |
2520 | rsp_info_len, rsp_info[3]); | |
1da177e4 | 2521 | |
9ba56b95 | 2522 | res = DID_BUS_BUSY << 16; |
b7d2280c | 2523 | goto out; |
1da177e4 LT |
2524 | } |
2525 | } | |
2526 | ||
3e8ce320 AV |
2527 | /* Check for overrun. */ |
2528 | if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE && | |
2529 | scsi_status & SS_RESIDUAL_OVER) | |
2530 | comp_status = CS_DATA_OVERRUN; | |
2531 | ||
e05fe292 CD |
2532 | /* |
2533 | * Check retry_delay_timer value if we receive a busy or | |
2534 | * queue full. | |
2535 | */ | |
2536 | if (lscsi_status == SAM_STAT_TASK_SET_FULL || | |
2537 | lscsi_status == SAM_STAT_BUSY) | |
2538 | qla2x00_set_retry_delay_timestamp(fcport, retry_delay); | |
2539 | ||
1da177e4 LT |
2540 | /* |
2541 | * Based on Host and scsi status generate status code for Linux | |
2542 | */ | |
2543 | switch (comp_status) { | |
2544 | case CS_COMPLETE: | |
df7baa50 | 2545 | case CS_QUEUE_FULL: |
1da177e4 | 2546 | if (scsi_status == 0) { |
9ba56b95 | 2547 | res = DID_OK << 16; |
1da177e4 LT |
2548 | break; |
2549 | } | |
2550 | if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) { | |
9a853f71 | 2551 | resid = resid_len; |
385d70b4 | 2552 | scsi_set_resid(cp, resid); |
0da69df1 AV |
2553 | |
2554 | if (!lscsi_status && | |
385d70b4 | 2555 | ((unsigned)(scsi_bufflen(cp) - resid) < |
0da69df1 | 2556 | cp->underflow)) { |
5e19ed90 | 2557 | ql_dbg(ql_dbg_io, fcport->vha, 0x301a, |
83548fe2 | 2558 | "Mid-layer underflow detected (0x%x of 0x%x bytes).\n", |
7c3df132 | 2559 | resid, scsi_bufflen(cp)); |
0da69df1 | 2560 | |
9ba56b95 | 2561 | res = DID_ERROR << 16; |
0da69df1 AV |
2562 | break; |
2563 | } | |
1da177e4 | 2564 | } |
9ba56b95 | 2565 | res = DID_OK << 16 | lscsi_status; |
1da177e4 | 2566 | |
df7baa50 | 2567 | if (lscsi_status == SAM_STAT_TASK_SET_FULL) { |
5e19ed90 | 2568 | ql_dbg(ql_dbg_io, fcport->vha, 0x301b, |
7c3df132 | 2569 | "QUEUE FULL detected.\n"); |
df7baa50 AV |
2570 | break; |
2571 | } | |
b7d2280c | 2572 | logit = 0; |
1da177e4 LT |
2573 | if (lscsi_status != SS_CHECK_CONDITION) |
2574 | break; | |
2575 | ||
b80ca4f7 | 2576 | memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); |
1da177e4 LT |
2577 | if (!(scsi_status & SS_SENSE_LEN_VALID)) |
2578 | break; | |
2579 | ||
5544213b | 2580 | qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len, |
9ba56b95 | 2581 | rsp, res); |
1da177e4 LT |
2582 | break; |
2583 | ||
2584 | case CS_DATA_UNDERRUN: | |
ed17c71b | 2585 | /* Use F/W calculated residual length. */ |
0f00a206 LC |
2586 | resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len; |
2587 | scsi_set_resid(cp, resid); | |
2588 | if (scsi_status & SS_RESIDUAL_UNDER) { | |
2589 | if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) { | |
5e19ed90 | 2590 | ql_dbg(ql_dbg_io, fcport->vha, 0x301d, |
83548fe2 | 2591 | "Dropped frame(s) detected (0x%x of 0x%x bytes).\n", |
7c3df132 | 2592 | resid, scsi_bufflen(cp)); |
0f00a206 | 2593 | |
9ba56b95 | 2594 | res = DID_ERROR << 16 | lscsi_status; |
4e85e3d9 | 2595 | goto check_scsi_status; |
6acf8190 | 2596 | } |
ed17c71b | 2597 | |
0f00a206 LC |
2598 | if (!lscsi_status && |
2599 | ((unsigned)(scsi_bufflen(cp) - resid) < | |
2600 | cp->underflow)) { | |
5e19ed90 | 2601 | ql_dbg(ql_dbg_io, fcport->vha, 0x301e, |
83548fe2 | 2602 | "Mid-layer underflow detected (0x%x of 0x%x bytes).\n", |
7c3df132 | 2603 | resid, scsi_bufflen(cp)); |
e038a1be | 2604 | |
9ba56b95 | 2605 | res = DID_ERROR << 16; |
0f00a206 LC |
2606 | break; |
2607 | } | |
4aee5766 GM |
2608 | } else if (lscsi_status != SAM_STAT_TASK_SET_FULL && |
2609 | lscsi_status != SAM_STAT_BUSY) { | |
2610 | /* | |
2611 | * scsi status of task set and busy are considered to be | |
2612 | * task not completed. | |
2613 | */ | |
2614 | ||
5e19ed90 | 2615 | ql_dbg(ql_dbg_io, fcport->vha, 0x301f, |
83548fe2 QT |
2616 | "Dropped frame(s) detected (0x%x of 0x%x bytes).\n", |
2617 | resid, scsi_bufflen(cp)); | |
0f00a206 | 2618 | |
9ba56b95 | 2619 | res = DID_ERROR << 16 | lscsi_status; |
0374f55e | 2620 | goto check_scsi_status; |
4aee5766 GM |
2621 | } else { |
2622 | ql_dbg(ql_dbg_io, fcport->vha, 0x3030, | |
2623 | "scsi_status: 0x%x, lscsi_status: 0x%x\n", | |
2624 | scsi_status, lscsi_status); | |
1da177e4 LT |
2625 | } |
2626 | ||
9ba56b95 | 2627 | res = DID_OK << 16 | lscsi_status; |
b7d2280c | 2628 | logit = 0; |
0f00a206 | 2629 | |
0374f55e | 2630 | check_scsi_status: |
1da177e4 | 2631 | /* |
fa2a1ce5 | 2632 | * Check to see if SCSI Status is non zero. If so report SCSI |
1da177e4 LT |
2633 | * Status. |
2634 | */ | |
2635 | if (lscsi_status != 0) { | |
ffec28a3 | 2636 | if (lscsi_status == SAM_STAT_TASK_SET_FULL) { |
5e19ed90 | 2637 | ql_dbg(ql_dbg_io, fcport->vha, 0x3020, |
7c3df132 | 2638 | "QUEUE FULL detected.\n"); |
b7d2280c | 2639 | logit = 1; |
ffec28a3 AV |
2640 | break; |
2641 | } | |
1da177e4 LT |
2642 | if (lscsi_status != SS_CHECK_CONDITION) |
2643 | break; | |
2644 | ||
b80ca4f7 | 2645 | memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); |
1da177e4 LT |
2646 | if (!(scsi_status & SS_SENSE_LEN_VALID)) |
2647 | break; | |
2648 | ||
5544213b | 2649 | qla2x00_handle_sense(sp, sense_data, par_sense_len, |
9ba56b95 | 2650 | sense_len, rsp, res); |
1da177e4 LT |
2651 | } |
2652 | break; | |
2653 | ||
1da177e4 LT |
2654 | case CS_PORT_LOGGED_OUT: |
2655 | case CS_PORT_CONFIG_CHG: | |
2656 | case CS_PORT_BUSY: | |
2657 | case CS_INCOMPLETE: | |
2658 | case CS_PORT_UNAVAILABLE: | |
b7d2280c | 2659 | case CS_TIMEOUT: |
ff454b01 CD |
2660 | case CS_RESET: |
2661 | ||
056a4483 MC |
2662 | /* |
2663 | * We are going to have the fc class block the rport | |
2664 | * while we try to recover so instruct the mid layer | |
2665 | * to requeue until the class decides how to handle this. | |
2666 | */ | |
9ba56b95 | 2667 | res = DID_TRANSPORT_DISRUPTED << 16; |
b7d2280c AV |
2668 | |
2669 | if (comp_status == CS_TIMEOUT) { | |
2670 | if (IS_FWI2_CAPABLE(ha)) | |
2671 | break; | |
2672 | else if ((le16_to_cpu(sts->status_flags) & | |
2673 | SF_LOGOUT_SENT) == 0) | |
2674 | break; | |
2675 | } | |
2676 | ||
726b8548 QT |
2677 | if (atomic_read(&fcport->state) == FCS_ONLINE) { |
2678 | ql_dbg(ql_dbg_disc, fcport->vha, 0x3021, | |
2679 | "Port to be marked lost on fcport=%02x%02x%02x, current " | |
2680 | "port state= %s comp_status %x.\n", fcport->d_id.b.domain, | |
2681 | fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
2682 | port_state_str[atomic_read(&fcport->state)], | |
2683 | comp_status); | |
2684 | ||
e315cd28 | 2685 | qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1); |
d8630bb9 | 2686 | qlt_schedule_sess_for_deletion(fcport); |
726b8548 QT |
2687 | } |
2688 | ||
1da177e4 LT |
2689 | break; |
2690 | ||
1da177e4 | 2691 | case CS_ABORTED: |
9ba56b95 | 2692 | res = DID_RESET << 16; |
1da177e4 | 2693 | break; |
bad75002 AE |
2694 | |
2695 | case CS_DIF_ERROR: | |
8cb2049c | 2696 | logit = qla2x00_handle_dif_error(sp, sts24); |
fb6e4668 | 2697 | res = cp->result; |
bad75002 | 2698 | break; |
9e522cd8 AE |
2699 | |
2700 | case CS_TRANSPORT: | |
2701 | res = DID_ERROR << 16; | |
2702 | ||
2703 | if (!IS_PI_SPLIT_DET_CAPABLE(ha)) | |
2704 | break; | |
2705 | ||
2706 | if (state_flags & BIT_4) | |
2707 | scmd_printk(KERN_WARNING, cp, | |
2708 | "Unsupported device '%s' found.\n", | |
2709 | cp->device->vendor); | |
2710 | break; | |
2711 | ||
1da177e4 | 2712 | default: |
9ba56b95 | 2713 | res = DID_ERROR << 16; |
1da177e4 LT |
2714 | break; |
2715 | } | |
2716 | ||
b7d2280c AV |
2717 | out: |
2718 | if (logit) | |
5e19ed90 | 2719 | ql_dbg(ql_dbg_io, fcport->vha, 0x3022, |
9cb78c16 | 2720 | "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu " |
7b833558 | 2721 | "portid=%02x%02x%02x oxid=0x%x cdb=%10phN len=0x%x " |
c7bc4cae | 2722 | "rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n", |
9ba56b95 | 2723 | comp_status, scsi_status, res, vha->host_no, |
cfb0919c CD |
2724 | cp->device->id, cp->device->lun, fcport->d_id.b.domain, |
2725 | fcport->d_id.b.area, fcport->d_id.b.al_pa, ox_id, | |
7b833558 | 2726 | cp->cmnd, scsi_bufflen(cp), rsp_info_len, |
c7bc4cae | 2727 | resid_len, fw_resid_len, sp, cp); |
b7d2280c | 2728 | |
2afa19a9 | 2729 | if (rsp->status_srb == NULL) |
25ff6af1 | 2730 | sp->done(sp, res); |
1da177e4 LT |
2731 | } |
2732 | ||
2733 | /** | |
2734 | * qla2x00_status_cont_entry() - Process a Status Continuations entry. | |
2db6228d | 2735 | * @rsp: response queue |
1da177e4 LT |
2736 | * @pkt: Entry pointer |
2737 | * | |
2738 | * Extended sense data. | |
2739 | */ | |
2740 | static void | |
2afa19a9 | 2741 | qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt) |
1da177e4 | 2742 | { |
9ba56b95 | 2743 | uint8_t sense_sz = 0; |
2afa19a9 | 2744 | struct qla_hw_data *ha = rsp->hw; |
7c3df132 | 2745 | struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev); |
9ba56b95 | 2746 | srb_t *sp = rsp->status_srb; |
1da177e4 | 2747 | struct scsi_cmnd *cp; |
9ba56b95 GM |
2748 | uint32_t sense_len; |
2749 | uint8_t *sense_ptr; | |
1da177e4 | 2750 | |
9ba56b95 GM |
2751 | if (!sp || !GET_CMD_SENSE_LEN(sp)) |
2752 | return; | |
1da177e4 | 2753 | |
9ba56b95 GM |
2754 | sense_len = GET_CMD_SENSE_LEN(sp); |
2755 | sense_ptr = GET_CMD_SENSE_PTR(sp); | |
1da177e4 | 2756 | |
9ba56b95 GM |
2757 | cp = GET_CMD_SP(sp); |
2758 | if (cp == NULL) { | |
2759 | ql_log(ql_log_warn, vha, 0x3025, | |
2760 | "cmd is NULL: already returned to OS (sp=%p).\n", sp); | |
1da177e4 | 2761 | |
9ba56b95 GM |
2762 | rsp->status_srb = NULL; |
2763 | return; | |
1da177e4 | 2764 | } |
1da177e4 | 2765 | |
9ba56b95 GM |
2766 | if (sense_len > sizeof(pkt->data)) |
2767 | sense_sz = sizeof(pkt->data); | |
2768 | else | |
2769 | sense_sz = sense_len; | |
c4631191 | 2770 | |
9ba56b95 GM |
2771 | /* Move sense data. */ |
2772 | if (IS_FWI2_CAPABLE(ha)) | |
2773 | host_to_fcp_swap(pkt->data, sizeof(pkt->data)); | |
2774 | memcpy(sense_ptr, pkt->data, sense_sz); | |
2775 | ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c, | |
2776 | sense_ptr, sense_sz); | |
c4631191 | 2777 | |
9ba56b95 GM |
2778 | sense_len -= sense_sz; |
2779 | sense_ptr += sense_sz; | |
c4631191 | 2780 | |
9ba56b95 GM |
2781 | SET_CMD_SENSE_PTR(sp, sense_ptr); |
2782 | SET_CMD_SENSE_LEN(sp, sense_len); | |
2783 | ||
2784 | /* Place command on done queue. */ | |
2785 | if (sense_len == 0) { | |
2786 | rsp->status_srb = NULL; | |
25ff6af1 | 2787 | sp->done(sp, cp->result); |
c4631191 | 2788 | } |
c4631191 GM |
2789 | } |
2790 | ||
1da177e4 LT |
2791 | /** |
2792 | * qla2x00_error_entry() - Process an error entry. | |
2db6228d BVA |
2793 | * @vha: SCSI driver HA context |
2794 | * @rsp: response queue | |
1da177e4 | 2795 | * @pkt: Entry pointer |
c5419e26 | 2796 | * return : 1=allow further error analysis. 0=no additional error analysis. |
1da177e4 | 2797 | */ |
c5419e26 | 2798 | static int |
73208dfd | 2799 | qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt) |
1da177e4 LT |
2800 | { |
2801 | srb_t *sp; | |
e315cd28 | 2802 | struct qla_hw_data *ha = vha->hw; |
c4631191 | 2803 | const char func[] = "ERROR-IOCB"; |
2afa19a9 | 2804 | uint16_t que = MSW(pkt->handle); |
a6fe35c0 | 2805 | struct req_que *req = NULL; |
9ba56b95 | 2806 | int res = DID_ERROR << 16; |
7c3df132 | 2807 | |
9ba56b95 | 2808 | ql_dbg(ql_dbg_async, vha, 0x502a, |
82de802a QT |
2809 | "iocb type %xh with error status %xh, handle %xh, rspq id %d\n", |
2810 | pkt->entry_type, pkt->entry_status, pkt->handle, rsp->id); | |
9ba56b95 | 2811 | |
a6fe35c0 AE |
2812 | if (que >= ha->max_req_queues || !ha->req_q_map[que]) |
2813 | goto fatal; | |
2814 | ||
2815 | req = ha->req_q_map[que]; | |
2816 | ||
9ba56b95 GM |
2817 | if (pkt->entry_status & RF_BUSY) |
2818 | res = DID_BUS_BUSY << 16; | |
1da177e4 | 2819 | |
c5419e26 QT |
2820 | if ((pkt->handle & ~QLA_TGT_HANDLE_MASK) == QLA_TGT_SKIP_HANDLE) |
2821 | return 0; | |
4f060736 | 2822 | |
c5419e26 QT |
2823 | switch (pkt->entry_type) { |
2824 | case NOTIFY_ACK_TYPE: | |
2825 | case STATUS_TYPE: | |
2826 | case STATUS_CONT_TYPE: | |
2827 | case LOGINOUT_PORT_IOCB_TYPE: | |
2828 | case CT_IOCB_TYPE: | |
2829 | case ELS_IOCB_TYPE: | |
2830 | case ABORT_IOCB_TYPE: | |
2831 | case MBX_IOCB_TYPE: | |
2832 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); | |
2833 | if (sp) { | |
2834 | sp->done(sp, res); | |
2835 | return 0; | |
2836 | } | |
2837 | break; | |
2838 | ||
2839 | case ABTS_RESP_24XX: | |
2840 | case CTIO_TYPE7: | |
2841 | case CTIO_CRC2: | |
2842 | default: | |
2843 | return 1; | |
1da177e4 | 2844 | } |
a6fe35c0 AE |
2845 | fatal: |
2846 | ql_log(ql_log_warn, vha, 0x5030, | |
fd49a540 | 2847 | "Error entry - invalid handle/queue (%04x).\n", que); |
c5419e26 | 2848 | return 0; |
1da177e4 LT |
2849 | } |
2850 | ||
9a853f71 AV |
2851 | /** |
2852 | * qla24xx_mbx_completion() - Process mailbox command completions. | |
2db6228d | 2853 | * @vha: SCSI driver HA context |
9a853f71 AV |
2854 | * @mb0: Mailbox0 register |
2855 | */ | |
2856 | static void | |
e315cd28 | 2857 | qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0) |
9a853f71 AV |
2858 | { |
2859 | uint16_t cnt; | |
4fa94f83 | 2860 | uint32_t mboxes; |
9a853f71 | 2861 | uint16_t __iomem *wptr; |
e315cd28 | 2862 | struct qla_hw_data *ha = vha->hw; |
9a853f71 AV |
2863 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
2864 | ||
4fa94f83 | 2865 | /* Read all mbox registers? */ |
c02189e1 BVA |
2866 | WARN_ON_ONCE(ha->mbx_count > 32); |
2867 | mboxes = (1ULL << ha->mbx_count) - 1; | |
4fa94f83 | 2868 | if (!ha->mcp) |
a720101d | 2869 | ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERROR.\n"); |
4fa94f83 AV |
2870 | else |
2871 | mboxes = ha->mcp->in_mb; | |
2872 | ||
9a853f71 AV |
2873 | /* Load return mailbox registers. */ |
2874 | ha->flags.mbox_int = 1; | |
2875 | ha->mailbox_out[0] = mb0; | |
4fa94f83 | 2876 | mboxes >>= 1; |
9a853f71 AV |
2877 | wptr = (uint16_t __iomem *)®->mailbox1; |
2878 | ||
2879 | for (cnt = 1; cnt < ha->mbx_count; cnt++) { | |
4fa94f83 AV |
2880 | if (mboxes & BIT_0) |
2881 | ha->mailbox_out[cnt] = RD_REG_WORD(wptr); | |
2882 | ||
2883 | mboxes >>= 1; | |
9a853f71 AV |
2884 | wptr++; |
2885 | } | |
9a853f71 AV |
2886 | } |
2887 | ||
4440e46d AB |
2888 | static void |
2889 | qla24xx_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, | |
2890 | struct abort_entry_24xx *pkt) | |
2891 | { | |
2892 | const char func[] = "ABT_IOCB"; | |
2893 | srb_t *sp; | |
2894 | struct srb_iocb *abt; | |
2895 | ||
2896 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); | |
2897 | if (!sp) | |
2898 | return; | |
2899 | ||
2900 | abt = &sp->u.iocb_cmd; | |
15f30a57 | 2901 | abt->u.abt.comp_status = le16_to_cpu(pkt->nport_handle); |
25ff6af1 | 2902 | sp->done(sp, 0); |
4440e46d AB |
2903 | } |
2904 | ||
0f7e51f6 | 2905 | void qla24xx_nvme_ls4_iocb(struct scsi_qla_host *vha, |
2906 | struct pt_ls4_request *pkt, struct req_que *req) | |
e84067d7 DG |
2907 | { |
2908 | srb_t *sp; | |
2909 | const char func[] = "LS4_IOCB"; | |
2910 | uint16_t comp_status; | |
2911 | ||
2912 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); | |
2913 | if (!sp) | |
2914 | return; | |
2915 | ||
2916 | comp_status = le16_to_cpu(pkt->status); | |
2917 | sp->done(sp, comp_status); | |
2918 | } | |
2919 | ||
9a853f71 AV |
2920 | /** |
2921 | * qla24xx_process_response_queue() - Process response queue entries. | |
2db6228d BVA |
2922 | * @vha: SCSI driver HA context |
2923 | * @rsp: response queue | |
9a853f71 | 2924 | */ |
2afa19a9 AC |
2925 | void qla24xx_process_response_queue(struct scsi_qla_host *vha, |
2926 | struct rsp_que *rsp) | |
9a853f71 | 2927 | { |
9a853f71 | 2928 | struct sts_entry_24xx *pkt; |
a9083016 | 2929 | struct qla_hw_data *ha = vha->hw; |
9a853f71 | 2930 | |
ec7193e2 | 2931 | if (!ha->flags.fw_started) |
9a853f71 AV |
2932 | return; |
2933 | ||
e326d22a QT |
2934 | if (rsp->qpair->cpuid != smp_processor_id()) |
2935 | qla_cpu_update(rsp->qpair, smp_processor_id()); | |
2936 | ||
e315cd28 AC |
2937 | while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) { |
2938 | pkt = (struct sts_entry_24xx *)rsp->ring_ptr; | |
9a853f71 | 2939 | |
e315cd28 AC |
2940 | rsp->ring_index++; |
2941 | if (rsp->ring_index == rsp->length) { | |
2942 | rsp->ring_index = 0; | |
2943 | rsp->ring_ptr = rsp->ring; | |
9a853f71 | 2944 | } else { |
e315cd28 | 2945 | rsp->ring_ptr++; |
9a853f71 AV |
2946 | } |
2947 | ||
2948 | if (pkt->entry_status != 0) { | |
c5419e26 | 2949 | if (qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt)) |
f83adb61 | 2950 | goto process_err; |
2d70c103 | 2951 | |
9a853f71 AV |
2952 | ((response_t *)pkt)->signature = RESPONSE_PROCESSED; |
2953 | wmb(); | |
2954 | continue; | |
2955 | } | |
f83adb61 | 2956 | process_err: |
9a853f71 AV |
2957 | |
2958 | switch (pkt->entry_type) { | |
2959 | case STATUS_TYPE: | |
73208dfd | 2960 | qla2x00_status_entry(vha, rsp, pkt); |
9a853f71 AV |
2961 | break; |
2962 | case STATUS_CONT_TYPE: | |
2afa19a9 | 2963 | qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt); |
9a853f71 | 2964 | break; |
2c3dfe3f | 2965 | case VP_RPT_ID_IOCB_TYPE: |
e315cd28 | 2966 | qla24xx_report_id_acquisition(vha, |
2c3dfe3f SJ |
2967 | (struct vp_rpt_id_entry_24xx *)pkt); |
2968 | break; | |
ac280b67 AV |
2969 | case LOGINOUT_PORT_IOCB_TYPE: |
2970 | qla24xx_logio_entry(vha, rsp->req, | |
2971 | (struct logio_entry_24xx *)pkt); | |
2972 | break; | |
f83adb61 | 2973 | case CT_IOCB_TYPE: |
9a069e19 | 2974 | qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE); |
9a069e19 | 2975 | break; |
f83adb61 | 2976 | case ELS_IOCB_TYPE: |
9a069e19 GM |
2977 | qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE); |
2978 | break; | |
2d70c103 | 2979 | case ABTS_RECV_24XX: |
2f424b9b QT |
2980 | if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { |
2981 | /* ensure that the ATIO queue is empty */ | |
82de802a QT |
2982 | qlt_handle_abts_recv(vha, rsp, |
2983 | (response_t *)pkt); | |
2f424b9b QT |
2984 | break; |
2985 | } else { | |
2f424b9b QT |
2986 | qlt_24xx_process_atio_queue(vha, 1); |
2987 | } | |
81881861 | 2988 | /* fall through */ |
2d70c103 NB |
2989 | case ABTS_RESP_24XX: |
2990 | case CTIO_TYPE7: | |
f83adb61 | 2991 | case CTIO_CRC2: |
82de802a | 2992 | qlt_response_pkt_all_vps(vha, rsp, (response_t *)pkt); |
2d70c103 | 2993 | break; |
e84067d7 DG |
2994 | case PT_LS4_REQUEST: |
2995 | qla24xx_nvme_ls4_iocb(vha, (struct pt_ls4_request *)pkt, | |
2996 | rsp->req); | |
2997 | break; | |
726b8548 QT |
2998 | case NOTIFY_ACK_TYPE: |
2999 | if (pkt->handle == QLA_TGT_SKIP_HANDLE) | |
82de802a QT |
3000 | qlt_response_pkt_all_vps(vha, rsp, |
3001 | (response_t *)pkt); | |
726b8548 QT |
3002 | else |
3003 | qla24xxx_nack_iocb_entry(vha, rsp->req, | |
3004 | (struct nack_to_isp *)pkt); | |
3005 | break; | |
54883291 SK |
3006 | case MARKER_TYPE: |
3007 | /* Do nothing in this case, this check is to prevent it | |
3008 | * from falling into default case | |
3009 | */ | |
3010 | break; | |
4440e46d AB |
3011 | case ABORT_IOCB_TYPE: |
3012 | qla24xx_abort_iocb_entry(vha, rsp->req, | |
3013 | (struct abort_entry_24xx *)pkt); | |
3014 | break; | |
726b8548 QT |
3015 | case MBX_IOCB_TYPE: |
3016 | qla24xx_mbx_iocb_entry(vha, rsp->req, | |
3017 | (struct mbx_24xx_entry *)pkt); | |
3018 | break; | |
2853192e QT |
3019 | case VP_CTRL_IOCB_TYPE: |
3020 | qla_ctrlvp_completed(vha, rsp->req, | |
3021 | (struct vp_ctrl_entry_24xx *)pkt); | |
3022 | break; | |
9a853f71 AV |
3023 | default: |
3024 | /* Type Not Supported. */ | |
7c3df132 SK |
3025 | ql_dbg(ql_dbg_async, vha, 0x5042, |
3026 | "Received unknown response pkt type %x " | |
9a853f71 | 3027 | "entry status=%x.\n", |
7c3df132 | 3028 | pkt->entry_type, pkt->entry_status); |
9a853f71 AV |
3029 | break; |
3030 | } | |
3031 | ((response_t *)pkt)->signature = RESPONSE_PROCESSED; | |
3032 | wmb(); | |
3033 | } | |
3034 | ||
3035 | /* Adjust ring index */ | |
7ec0effd | 3036 | if (IS_P3P_TYPE(ha)) { |
a9083016 GM |
3037 | struct device_reg_82xx __iomem *reg = &ha->iobase->isp82; |
3038 | WRT_REG_DWORD(®->rsp_q_out[0], rsp->ring_index); | |
726b8548 | 3039 | } else { |
a9083016 | 3040 | WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index); |
726b8548 | 3041 | } |
9a853f71 AV |
3042 | } |
3043 | ||
05236a05 | 3044 | static void |
e315cd28 | 3045 | qla2xxx_check_risc_status(scsi_qla_host_t *vha) |
05236a05 AV |
3046 | { |
3047 | int rval; | |
3048 | uint32_t cnt; | |
e315cd28 | 3049 | struct qla_hw_data *ha = vha->hw; |
05236a05 AV |
3050 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
3051 | ||
f73cb695 CD |
3052 | if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && |
3053 | !IS_QLA27XX(ha)) | |
05236a05 AV |
3054 | return; |
3055 | ||
3056 | rval = QLA_SUCCESS; | |
3057 | WRT_REG_DWORD(®->iobase_addr, 0x7C00); | |
3058 | RD_REG_DWORD(®->iobase_addr); | |
3059 | WRT_REG_DWORD(®->iobase_window, 0x0001); | |
3060 | for (cnt = 10000; (RD_REG_DWORD(®->iobase_window) & BIT_0) == 0 && | |
3061 | rval == QLA_SUCCESS; cnt--) { | |
3062 | if (cnt) { | |
3063 | WRT_REG_DWORD(®->iobase_window, 0x0001); | |
3064 | udelay(10); | |
3065 | } else | |
3066 | rval = QLA_FUNCTION_TIMEOUT; | |
3067 | } | |
3068 | if (rval == QLA_SUCCESS) | |
3069 | goto next_test; | |
3070 | ||
b2ec76c5 | 3071 | rval = QLA_SUCCESS; |
05236a05 AV |
3072 | WRT_REG_DWORD(®->iobase_window, 0x0003); |
3073 | for (cnt = 100; (RD_REG_DWORD(®->iobase_window) & BIT_0) == 0 && | |
3074 | rval == QLA_SUCCESS; cnt--) { | |
3075 | if (cnt) { | |
3076 | WRT_REG_DWORD(®->iobase_window, 0x0003); | |
3077 | udelay(10); | |
3078 | } else | |
3079 | rval = QLA_FUNCTION_TIMEOUT; | |
3080 | } | |
3081 | if (rval != QLA_SUCCESS) | |
3082 | goto done; | |
3083 | ||
3084 | next_test: | |
3085 | if (RD_REG_DWORD(®->iobase_c8) & BIT_3) | |
7c3df132 SK |
3086 | ql_log(ql_log_info, vha, 0x504c, |
3087 | "Additional code -- 0x55AA.\n"); | |
05236a05 AV |
3088 | |
3089 | done: | |
3090 | WRT_REG_DWORD(®->iobase_window, 0x0000); | |
3091 | RD_REG_DWORD(®->iobase_window); | |
3092 | } | |
3093 | ||
9a853f71 | 3094 | /** |
6246b8a1 | 3095 | * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP24xx. |
9a853f71 AV |
3096 | * @irq: |
3097 | * @dev_id: SCSI driver HA context | |
9a853f71 AV |
3098 | * |
3099 | * Called by system whenever the host adapter generates an interrupt. | |
3100 | * | |
3101 | * Returns handled flag. | |
3102 | */ | |
3103 | irqreturn_t | |
7d12e780 | 3104 | qla24xx_intr_handler(int irq, void *dev_id) |
9a853f71 | 3105 | { |
e315cd28 AC |
3106 | scsi_qla_host_t *vha; |
3107 | struct qla_hw_data *ha; | |
9a853f71 AV |
3108 | struct device_reg_24xx __iomem *reg; |
3109 | int status; | |
9a853f71 AV |
3110 | unsigned long iter; |
3111 | uint32_t stat; | |
3112 | uint32_t hccr; | |
7d613ac6 | 3113 | uint16_t mb[8]; |
e315cd28 | 3114 | struct rsp_que *rsp; |
43fac4d9 | 3115 | unsigned long flags; |
9a853f71 | 3116 | |
e315cd28 AC |
3117 | rsp = (struct rsp_que *) dev_id; |
3118 | if (!rsp) { | |
3256b435 CD |
3119 | ql_log(ql_log_info, NULL, 0x5059, |
3120 | "%s: NULL response queue pointer.\n", __func__); | |
9a853f71 AV |
3121 | return IRQ_NONE; |
3122 | } | |
3123 | ||
e315cd28 | 3124 | ha = rsp->hw; |
9a853f71 AV |
3125 | reg = &ha->iobase->isp24; |
3126 | status = 0; | |
3127 | ||
85880801 AV |
3128 | if (unlikely(pci_channel_offline(ha->pdev))) |
3129 | return IRQ_HANDLED; | |
3130 | ||
43fac4d9 | 3131 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2afa19a9 | 3132 | vha = pci_get_drvdata(ha->pdev); |
9a853f71 AV |
3133 | for (iter = 50; iter--; ) { |
3134 | stat = RD_REG_DWORD(®->host_status); | |
c821e0d5 | 3135 | if (qla2x00_check_reg32_for_disconnect(vha, stat)) |
f3ddac19 | 3136 | break; |
9a853f71 | 3137 | if (stat & HSRX_RISC_PAUSED) { |
85880801 | 3138 | if (unlikely(pci_channel_offline(ha->pdev))) |
14e660e6 SJ |
3139 | break; |
3140 | ||
9a853f71 AV |
3141 | hccr = RD_REG_DWORD(®->hccr); |
3142 | ||
7c3df132 SK |
3143 | ql_log(ql_log_warn, vha, 0x504b, |
3144 | "RISC paused -- HCCR=%x, Dumping firmware.\n", | |
3145 | hccr); | |
05236a05 | 3146 | |
e315cd28 | 3147 | qla2xxx_check_risc_status(vha); |
05236a05 | 3148 | |
e315cd28 AC |
3149 | ha->isp_ops->fw_dump(vha, 1); |
3150 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
9a853f71 AV |
3151 | break; |
3152 | } else if ((stat & HSRX_RISC_INT) == 0) | |
3153 | break; | |
3154 | ||
3155 | switch (stat & 0xff) { | |
fafbda9f AE |
3156 | case INTR_ROM_MB_SUCCESS: |
3157 | case INTR_ROM_MB_FAILED: | |
3158 | case INTR_MB_SUCCESS: | |
3159 | case INTR_MB_FAILED: | |
e315cd28 | 3160 | qla24xx_mbx_completion(vha, MSW(stat)); |
9a853f71 AV |
3161 | status |= MBX_INTERRUPT; |
3162 | ||
3163 | break; | |
fafbda9f | 3164 | case INTR_ASYNC_EVENT: |
9a853f71 AV |
3165 | mb[0] = MSW(stat); |
3166 | mb[1] = RD_REG_WORD(®->mailbox1); | |
3167 | mb[2] = RD_REG_WORD(®->mailbox2); | |
3168 | mb[3] = RD_REG_WORD(®->mailbox3); | |
73208dfd | 3169 | qla2x00_async_event(vha, rsp, mb); |
9a853f71 | 3170 | break; |
fafbda9f AE |
3171 | case INTR_RSP_QUE_UPDATE: |
3172 | case INTR_RSP_QUE_UPDATE_83XX: | |
2afa19a9 | 3173 | qla24xx_process_response_queue(vha, rsp); |
9a853f71 | 3174 | break; |
c9558869 | 3175 | case INTR_ATIO_QUE_UPDATE_27XX: |
2f424b9b QT |
3176 | case INTR_ATIO_QUE_UPDATE:{ |
3177 | unsigned long flags2; | |
3178 | spin_lock_irqsave(&ha->tgt.atio_lock, flags2); | |
3179 | qlt_24xx_process_atio_queue(vha, 1); | |
3180 | spin_unlock_irqrestore(&ha->tgt.atio_lock, flags2); | |
2d70c103 | 3181 | break; |
2f424b9b QT |
3182 | } |
3183 | case INTR_ATIO_RSP_QUE_UPDATE: { | |
3184 | unsigned long flags2; | |
3185 | spin_lock_irqsave(&ha->tgt.atio_lock, flags2); | |
3186 | qlt_24xx_process_atio_queue(vha, 1); | |
3187 | spin_unlock_irqrestore(&ha->tgt.atio_lock, flags2); | |
3188 | ||
2d70c103 NB |
3189 | qla24xx_process_response_queue(vha, rsp); |
3190 | break; | |
2f424b9b | 3191 | } |
9a853f71 | 3192 | default: |
7c3df132 SK |
3193 | ql_dbg(ql_dbg_async, vha, 0x504f, |
3194 | "Unrecognized interrupt type (%d).\n", stat * 0xff); | |
9a853f71 AV |
3195 | break; |
3196 | } | |
3197 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); | |
3198 | RD_REG_DWORD_RELAXED(®->hccr); | |
cb860bbd GM |
3199 | if (unlikely(IS_QLA83XX(ha) && (ha->pdev->revision == 1))) |
3200 | ndelay(3500); | |
9a853f71 | 3201 | } |
36439832 | 3202 | qla2x00_handle_mbx_completion(ha, status); |
43fac4d9 | 3203 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
9a853f71 | 3204 | |
9a853f71 AV |
3205 | return IRQ_HANDLED; |
3206 | } | |
3207 | ||
a8488abe AV |
3208 | static irqreturn_t |
3209 | qla24xx_msix_rsp_q(int irq, void *dev_id) | |
3210 | { | |
e315cd28 AC |
3211 | struct qla_hw_data *ha; |
3212 | struct rsp_que *rsp; | |
a8488abe | 3213 | struct device_reg_24xx __iomem *reg; |
2afa19a9 | 3214 | struct scsi_qla_host *vha; |
0f19bc68 | 3215 | unsigned long flags; |
a8488abe | 3216 | |
e315cd28 AC |
3217 | rsp = (struct rsp_que *) dev_id; |
3218 | if (!rsp) { | |
3256b435 CD |
3219 | ql_log(ql_log_info, NULL, 0x505a, |
3220 | "%s: NULL response queue pointer.\n", __func__); | |
e315cd28 AC |
3221 | return IRQ_NONE; |
3222 | } | |
3223 | ha = rsp->hw; | |
a8488abe AV |
3224 | reg = &ha->iobase->isp24; |
3225 | ||
0f19bc68 | 3226 | spin_lock_irqsave(&ha->hardware_lock, flags); |
a8488abe | 3227 | |
a67093d4 | 3228 | vha = pci_get_drvdata(ha->pdev); |
2afa19a9 | 3229 | qla24xx_process_response_queue(vha, rsp); |
3155754a | 3230 | if (!ha->flags.disable_msix_handshake) { |
eb94114b AC |
3231 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); |
3232 | RD_REG_DWORD_RELAXED(®->hccr); | |
3233 | } | |
0f19bc68 | 3234 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
a8488abe AV |
3235 | |
3236 | return IRQ_HANDLED; | |
3237 | } | |
3238 | ||
3239 | static irqreturn_t | |
3240 | qla24xx_msix_default(int irq, void *dev_id) | |
3241 | { | |
e315cd28 AC |
3242 | scsi_qla_host_t *vha; |
3243 | struct qla_hw_data *ha; | |
3244 | struct rsp_que *rsp; | |
a8488abe AV |
3245 | struct device_reg_24xx __iomem *reg; |
3246 | int status; | |
a8488abe AV |
3247 | uint32_t stat; |
3248 | uint32_t hccr; | |
7d613ac6 | 3249 | uint16_t mb[8]; |
0f19bc68 | 3250 | unsigned long flags; |
a8488abe | 3251 | |
e315cd28 AC |
3252 | rsp = (struct rsp_que *) dev_id; |
3253 | if (!rsp) { | |
3256b435 CD |
3254 | ql_log(ql_log_info, NULL, 0x505c, |
3255 | "%s: NULL response queue pointer.\n", __func__); | |
e315cd28 AC |
3256 | return IRQ_NONE; |
3257 | } | |
3258 | ha = rsp->hw; | |
a8488abe AV |
3259 | reg = &ha->iobase->isp24; |
3260 | status = 0; | |
3261 | ||
0f19bc68 | 3262 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2afa19a9 | 3263 | vha = pci_get_drvdata(ha->pdev); |
87f27015 | 3264 | do { |
a8488abe | 3265 | stat = RD_REG_DWORD(®->host_status); |
c821e0d5 | 3266 | if (qla2x00_check_reg32_for_disconnect(vha, stat)) |
f3ddac19 | 3267 | break; |
a8488abe | 3268 | if (stat & HSRX_RISC_PAUSED) { |
85880801 | 3269 | if (unlikely(pci_channel_offline(ha->pdev))) |
14e660e6 SJ |
3270 | break; |
3271 | ||
a8488abe AV |
3272 | hccr = RD_REG_DWORD(®->hccr); |
3273 | ||
7c3df132 SK |
3274 | ql_log(ql_log_info, vha, 0x5050, |
3275 | "RISC paused -- HCCR=%x, Dumping firmware.\n", | |
3276 | hccr); | |
05236a05 | 3277 | |
e315cd28 | 3278 | qla2xxx_check_risc_status(vha); |
05236a05 | 3279 | |
e315cd28 AC |
3280 | ha->isp_ops->fw_dump(vha, 1); |
3281 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
a8488abe AV |
3282 | break; |
3283 | } else if ((stat & HSRX_RISC_INT) == 0) | |
3284 | break; | |
3285 | ||
3286 | switch (stat & 0xff) { | |
fafbda9f AE |
3287 | case INTR_ROM_MB_SUCCESS: |
3288 | case INTR_ROM_MB_FAILED: | |
3289 | case INTR_MB_SUCCESS: | |
3290 | case INTR_MB_FAILED: | |
e315cd28 | 3291 | qla24xx_mbx_completion(vha, MSW(stat)); |
a8488abe AV |
3292 | status |= MBX_INTERRUPT; |
3293 | ||
3294 | break; | |
fafbda9f | 3295 | case INTR_ASYNC_EVENT: |
a8488abe AV |
3296 | mb[0] = MSW(stat); |
3297 | mb[1] = RD_REG_WORD(®->mailbox1); | |
3298 | mb[2] = RD_REG_WORD(®->mailbox2); | |
3299 | mb[3] = RD_REG_WORD(®->mailbox3); | |
73208dfd | 3300 | qla2x00_async_event(vha, rsp, mb); |
a8488abe | 3301 | break; |
fafbda9f AE |
3302 | case INTR_RSP_QUE_UPDATE: |
3303 | case INTR_RSP_QUE_UPDATE_83XX: | |
2afa19a9 | 3304 | qla24xx_process_response_queue(vha, rsp); |
a8488abe | 3305 | break; |
c9558869 | 3306 | case INTR_ATIO_QUE_UPDATE_27XX: |
2f424b9b QT |
3307 | case INTR_ATIO_QUE_UPDATE:{ |
3308 | unsigned long flags2; | |
3309 | spin_lock_irqsave(&ha->tgt.atio_lock, flags2); | |
3310 | qlt_24xx_process_atio_queue(vha, 1); | |
3311 | spin_unlock_irqrestore(&ha->tgt.atio_lock, flags2); | |
2d70c103 | 3312 | break; |
2f424b9b QT |
3313 | } |
3314 | case INTR_ATIO_RSP_QUE_UPDATE: { | |
3315 | unsigned long flags2; | |
3316 | spin_lock_irqsave(&ha->tgt.atio_lock, flags2); | |
3317 | qlt_24xx_process_atio_queue(vha, 1); | |
3318 | spin_unlock_irqrestore(&ha->tgt.atio_lock, flags2); | |
3319 | ||
2d70c103 NB |
3320 | qla24xx_process_response_queue(vha, rsp); |
3321 | break; | |
2f424b9b | 3322 | } |
a8488abe | 3323 | default: |
7c3df132 SK |
3324 | ql_dbg(ql_dbg_async, vha, 0x5051, |
3325 | "Unrecognized interrupt type (%d).\n", stat & 0xff); | |
a8488abe AV |
3326 | break; |
3327 | } | |
3328 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); | |
87f27015 | 3329 | } while (0); |
36439832 | 3330 | qla2x00_handle_mbx_completion(ha, status); |
0f19bc68 | 3331 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
a8488abe | 3332 | |
a8488abe AV |
3333 | return IRQ_HANDLED; |
3334 | } | |
3335 | ||
d7459527 MH |
3336 | irqreturn_t |
3337 | qla2xxx_msix_rsp_q(int irq, void *dev_id) | |
3338 | { | |
3339 | struct qla_hw_data *ha; | |
3340 | struct qla_qpair *qpair; | |
3341 | struct device_reg_24xx __iomem *reg; | |
3342 | unsigned long flags; | |
3343 | ||
3344 | qpair = dev_id; | |
3345 | if (!qpair) { | |
3346 | ql_log(ql_log_info, NULL, 0x505b, | |
3347 | "%s: NULL response queue pointer.\n", __func__); | |
3348 | return IRQ_NONE; | |
3349 | } | |
3350 | ha = qpair->hw; | |
3351 | ||
3352 | /* Clear the interrupt, if enabled, for this response queue */ | |
3353 | if (unlikely(!ha->flags.disable_msix_handshake)) { | |
3354 | reg = &ha->iobase->isp24; | |
3355 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3356 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); | |
3357 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
3358 | } | |
3359 | ||
3360 | queue_work(ha->wq, &qpair->q_work); | |
3361 | ||
3362 | return IRQ_HANDLED; | |
3363 | } | |
3364 | ||
a8488abe AV |
3365 | /* Interrupt handling helpers. */ |
3366 | ||
3367 | struct qla_init_msix_entry { | |
a8488abe | 3368 | const char *name; |
476834c2 | 3369 | irq_handler_t handler; |
a8488abe AV |
3370 | }; |
3371 | ||
44a8f954 | 3372 | static const struct qla_init_msix_entry msix_entries[] = { |
e326d22a QT |
3373 | { "default", qla24xx_msix_default }, |
3374 | { "rsp_q", qla24xx_msix_rsp_q }, | |
3375 | { "atio_q", qla83xx_msix_atio_q }, | |
3376 | { "qpair_multiq", qla2xxx_msix_rsp_q }, | |
a8488abe AV |
3377 | }; |
3378 | ||
44a8f954 | 3379 | static const struct qla_init_msix_entry qla82xx_msix_entries[] = { |
a9083016 GM |
3380 | { "qla2xxx (default)", qla82xx_msix_default }, |
3381 | { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q }, | |
3382 | }; | |
3383 | ||
a8488abe | 3384 | static int |
73208dfd | 3385 | qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp) |
a8488abe AV |
3386 | { |
3387 | int i, ret; | |
a8488abe | 3388 | struct qla_msix_entry *qentry; |
7c3df132 | 3389 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); |
67f2db87 | 3390 | int min_vecs = QLA_BASE_VECTORS; |
17e5fc58 CH |
3391 | struct irq_affinity desc = { |
3392 | .pre_vectors = QLA_BASE_VECTORS, | |
3393 | }; | |
3394 | ||
c9558869 HM |
3395 | if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) && |
3396 | IS_ATIO_MSIX_CAPABLE(ha)) { | |
17e5fc58 | 3397 | desc.pre_vectors++; |
67f2db87 MH |
3398 | min_vecs++; |
3399 | } | |
17e5fc58 | 3400 | |
09620eeb QT |
3401 | if (USER_CTRL_IRQ(ha)) { |
3402 | /* user wants to control IRQ setting for target mode */ | |
3403 | ret = pci_alloc_irq_vectors(ha->pdev, min_vecs, | |
3404 | ha->msix_count, PCI_IRQ_MSIX); | |
3405 | } else | |
3406 | ret = pci_alloc_irq_vectors_affinity(ha->pdev, min_vecs, | |
3407 | ha->msix_count, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY, | |
3408 | &desc); | |
73208dfd | 3409 | |
84e32a06 AG |
3410 | if (ret < 0) { |
3411 | ql_log(ql_log_fatal, vha, 0x00c7, | |
3412 | "MSI-X: Failed to enable support, " | |
3413 | "giving up -- %d/%d.\n", | |
3414 | ha->msix_count, ret); | |
3415 | goto msix_out; | |
3416 | } else if (ret < ha->msix_count) { | |
7c3df132 SK |
3417 | ql_log(ql_log_warn, vha, 0x00c6, |
3418 | "MSI-X: Failed to enable support " | |
d7459527 MH |
3419 | "with %d vectors, using %d vectors.\n", |
3420 | ha->msix_count, ret); | |
cb43285f | 3421 | ha->msix_count = ret; |
d7459527 | 3422 | /* Recalculate queue values */ |
c38d1baf | 3423 | if (ha->mqiobase && (ql2xmqsupport || ql2xnvmeenable)) { |
d7459527 MH |
3424 | ha->max_req_queues = ha->msix_count - 1; |
3425 | ||
3426 | /* ATIOQ needs 1 vector. That's 1 less QPair */ | |
3427 | if (QLA_TGT_MODE_ENABLED()) | |
3428 | ha->max_req_queues--; | |
3429 | ||
3430 | ha->max_rsp_queues = ha->max_req_queues; | |
3431 | ||
3432 | ha->max_qpairs = ha->max_req_queues - 1; | |
3433 | ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0190, | |
3434 | "Adjusted Max no of queues pairs: %d.\n", ha->max_qpairs); | |
3435 | } | |
73208dfd AC |
3436 | } |
3437 | ha->msix_entries = kzalloc(sizeof(struct qla_msix_entry) * | |
3438 | ha->msix_count, GFP_KERNEL); | |
3439 | if (!ha->msix_entries) { | |
7c3df132 SK |
3440 | ql_log(ql_log_fatal, vha, 0x00c8, |
3441 | "Failed to allocate memory for ha->msix_entries.\n"); | |
73208dfd | 3442 | ret = -ENOMEM; |
a8488abe AV |
3443 | goto msix_out; |
3444 | } | |
3445 | ha->flags.msix_enabled = 1; | |
3446 | ||
73208dfd AC |
3447 | for (i = 0; i < ha->msix_count; i++) { |
3448 | qentry = &ha->msix_entries[i]; | |
4fa18345 MH |
3449 | qentry->vector = pci_irq_vector(ha->pdev, i); |
3450 | qentry->entry = i; | |
a8488abe | 3451 | qentry->have_irq = 0; |
d7459527 | 3452 | qentry->in_use = 0; |
4fa18345 | 3453 | qentry->handle = NULL; |
a8488abe AV |
3454 | } |
3455 | ||
2afa19a9 | 3456 | /* Enable MSI-X vectors for the base queue */ |
17e5fc58 | 3457 | for (i = 0; i < QLA_BASE_VECTORS; i++) { |
2afa19a9 | 3458 | qentry = &ha->msix_entries[i]; |
4fa18345 | 3459 | qentry->handle = rsp; |
ef8d1d51 | 3460 | rsp->msix = qentry; |
d7459527 | 3461 | scnprintf(qentry->name, sizeof(qentry->name), |
e326d22a | 3462 | "qla2xxx%lu_%s", vha->host_no, msix_entries[i].name); |
f324777e | 3463 | if (IS_P3P_TYPE(ha)) |
a9083016 GM |
3464 | ret = request_irq(qentry->vector, |
3465 | qla82xx_msix_entries[i].handler, | |
3466 | 0, qla82xx_msix_entries[i].name, rsp); | |
f324777e | 3467 | else |
a9083016 GM |
3468 | ret = request_irq(qentry->vector, |
3469 | msix_entries[i].handler, | |
e326d22a | 3470 | 0, qentry->name, rsp); |
f324777e CD |
3471 | if (ret) |
3472 | goto msix_register_fail; | |
3473 | qentry->have_irq = 1; | |
093df737 | 3474 | qentry->in_use = 1; |
f324777e CD |
3475 | } |
3476 | ||
3477 | /* | |
3478 | * If target mode is enable, also request the vector for the ATIO | |
3479 | * queue. | |
3480 | */ | |
c9558869 HM |
3481 | if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) && |
3482 | IS_ATIO_MSIX_CAPABLE(ha)) { | |
093df737 | 3483 | qentry = &ha->msix_entries[QLA_ATIO_VECTOR]; |
ef8d1d51 | 3484 | rsp->msix = qentry; |
d7459527 MH |
3485 | qentry->handle = rsp; |
3486 | scnprintf(qentry->name, sizeof(qentry->name), | |
e326d22a QT |
3487 | "qla2xxx%lu_%s", vha->host_no, |
3488 | msix_entries[QLA_ATIO_VECTOR].name); | |
093df737 | 3489 | qentry->in_use = 1; |
f324777e | 3490 | ret = request_irq(qentry->vector, |
093df737 | 3491 | msix_entries[QLA_ATIO_VECTOR].handler, |
e326d22a | 3492 | 0, qentry->name, rsp); |
2afa19a9 | 3493 | qentry->have_irq = 1; |
73208dfd | 3494 | } |
73208dfd | 3495 | |
f324777e CD |
3496 | msix_register_fail: |
3497 | if (ret) { | |
3498 | ql_log(ql_log_fatal, vha, 0x00cb, | |
3499 | "MSI-X: unable to register handler -- %x/%d.\n", | |
3500 | qentry->vector, ret); | |
4fa18345 | 3501 | qla2x00_free_irqs(vha); |
f324777e CD |
3502 | ha->mqenable = 0; |
3503 | goto msix_out; | |
3504 | } | |
3505 | ||
73208dfd | 3506 | /* Enable MSI-X vector for response queue update for queue 0 */ |
b7edfa23 | 3507 | if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { |
6246b8a1 | 3508 | if (ha->msixbase && ha->mqiobase && |
d7459527 MH |
3509 | (ha->max_rsp_queues > 1 || ha->max_req_queues > 1 || |
3510 | ql2xmqsupport)) | |
6246b8a1 GM |
3511 | ha->mqenable = 1; |
3512 | } else | |
d7459527 MH |
3513 | if (ha->mqiobase && |
3514 | (ha->max_rsp_queues > 1 || ha->max_req_queues > 1 || | |
3515 | ql2xmqsupport)) | |
6246b8a1 | 3516 | ha->mqenable = 1; |
7c3df132 SK |
3517 | ql_dbg(ql_dbg_multiq, vha, 0xc005, |
3518 | "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n", | |
3519 | ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues); | |
3520 | ql_dbg(ql_dbg_init, vha, 0x0055, | |
3521 | "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n", | |
3522 | ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues); | |
73208dfd | 3523 | |
a8488abe AV |
3524 | msix_out: |
3525 | return ret; | |
3526 | } | |
3527 | ||
3528 | int | |
73208dfd | 3529 | qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp) |
a8488abe | 3530 | { |
7fa3e239 | 3531 | int ret = QLA_FUNCTION_FAILED; |
f73cb695 | 3532 | device_reg_t *reg = ha->iobase; |
7c3df132 | 3533 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); |
a8488abe AV |
3534 | |
3535 | /* If possible, enable MSI-X. */ | |
e7240af5 HM |
3536 | if (ql2xenablemsix == 0 || (!IS_QLA2432(ha) && !IS_QLA2532(ha) && |
3537 | !IS_QLA8432(ha) && !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha) && | |
3538 | !IS_QLAFX00(ha) && !IS_QLA27XX(ha))) | |
6377a7ae BH |
3539 | goto skip_msi; |
3540 | ||
e7240af5 HM |
3541 | if (ql2xenablemsix == 2) |
3542 | goto skip_msix; | |
3543 | ||
6377a7ae BH |
3544 | if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP && |
3545 | (ha->pdev->subsystem_device == 0x7040 || | |
3546 | ha->pdev->subsystem_device == 0x7041 || | |
3547 | ha->pdev->subsystem_device == 0x1705)) { | |
7c3df132 SK |
3548 | ql_log(ql_log_warn, vha, 0x0034, |
3549 | "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n", | |
6377a7ae | 3550 | ha->pdev->subsystem_vendor, |
7c3df132 | 3551 | ha->pdev->subsystem_device); |
6377a7ae BH |
3552 | goto skip_msi; |
3553 | } | |
a8488abe | 3554 | |
42cd4f5d | 3555 | if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) { |
7c3df132 SK |
3556 | ql_log(ql_log_warn, vha, 0x0035, |
3557 | "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n", | |
42cd4f5d | 3558 | ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX); |
a8488abe AV |
3559 | goto skip_msix; |
3560 | } | |
3561 | ||
73208dfd | 3562 | ret = qla24xx_enable_msix(ha, rsp); |
a8488abe | 3563 | if (!ret) { |
7c3df132 SK |
3564 | ql_dbg(ql_dbg_init, vha, 0x0036, |
3565 | "MSI-X: Enabled (0x%X, 0x%X).\n", | |
3566 | ha->chip_revision, ha->fw_attributes); | |
963b0fdd | 3567 | goto clear_risc_ints; |
a8488abe | 3568 | } |
7fa3e239 | 3569 | |
a8488abe | 3570 | skip_msix: |
cbedb601 | 3571 | |
7fa3e239 SC |
3572 | ql_log(ql_log_info, vha, 0x0037, |
3573 | "Falling back-to MSI mode -%d.\n", ret); | |
3574 | ||
3a03eb79 | 3575 | if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) && |
f73cb695 CD |
3576 | !IS_QLA8001(ha) && !IS_P3P_TYPE(ha) && !IS_QLAFX00(ha) && |
3577 | !IS_QLA27XX(ha)) | |
cbedb601 AV |
3578 | goto skip_msi; |
3579 | ||
4fa18345 | 3580 | ret = pci_alloc_irq_vectors(ha->pdev, 1, 1, PCI_IRQ_MSI); |
cbedb601 | 3581 | if (!ret) { |
7c3df132 SK |
3582 | ql_dbg(ql_dbg_init, vha, 0x0038, |
3583 | "MSI: Enabled.\n"); | |
cbedb601 | 3584 | ha->flags.msi_enabled = 1; |
a9083016 | 3585 | } else |
7c3df132 | 3586 | ql_log(ql_log_warn, vha, 0x0039, |
7fa3e239 SC |
3587 | "Falling back-to INTa mode -- %d.\n", ret); |
3588 | skip_msi: | |
a033b655 GM |
3589 | |
3590 | /* Skip INTx on ISP82xx. */ | |
3591 | if (!ha->flags.msi_enabled && IS_QLA82XX(ha)) | |
3592 | return QLA_FUNCTION_FAILED; | |
3593 | ||
fd34f556 | 3594 | ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler, |
7992abfc MH |
3595 | ha->flags.msi_enabled ? 0 : IRQF_SHARED, |
3596 | QLA2XXX_DRIVER_NAME, rsp); | |
963b0fdd | 3597 | if (ret) { |
7c3df132 | 3598 | ql_log(ql_log_warn, vha, 0x003a, |
a8488abe AV |
3599 | "Failed to reserve interrupt %d already in use.\n", |
3600 | ha->pdev->irq); | |
963b0fdd | 3601 | goto fail; |
8ae6d9c7 | 3602 | } else if (!ha->flags.msi_enabled) { |
68d91cbd SK |
3603 | ql_dbg(ql_dbg_init, vha, 0x0125, |
3604 | "INTa mode: Enabled.\n"); | |
8ae6d9c7 GM |
3605 | ha->flags.mr_intr_valid = 1; |
3606 | } | |
7992abfc | 3607 | |
963b0fdd | 3608 | clear_risc_ints: |
4bb2efc4 JC |
3609 | if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha)) |
3610 | goto fail; | |
963b0fdd | 3611 | |
c6952483 | 3612 | spin_lock_irq(&ha->hardware_lock); |
4bb2efc4 | 3613 | WRT_REG_WORD(®->isp.semaphore, 0); |
c6952483 | 3614 | spin_unlock_irq(&ha->hardware_lock); |
a8488abe | 3615 | |
963b0fdd | 3616 | fail: |
a8488abe AV |
3617 | return ret; |
3618 | } | |
3619 | ||
3620 | void | |
e315cd28 | 3621 | qla2x00_free_irqs(scsi_qla_host_t *vha) |
a8488abe | 3622 | { |
e315cd28 | 3623 | struct qla_hw_data *ha = vha->hw; |
9a347ff4 | 3624 | struct rsp_que *rsp; |
4fa18345 MH |
3625 | struct qla_msix_entry *qentry; |
3626 | int i; | |
9a347ff4 CD |
3627 | |
3628 | /* | |
3629 | * We need to check that ha->rsp_q_map is valid in case we are called | |
3630 | * from a probe failure context. | |
3631 | */ | |
3632 | if (!ha->rsp_q_map || !ha->rsp_q_map[0]) | |
27873de9 | 3633 | goto free_irqs; |
9a347ff4 | 3634 | rsp = ha->rsp_q_map[0]; |
a8488abe | 3635 | |
4fa18345 MH |
3636 | if (ha->flags.msix_enabled) { |
3637 | for (i = 0; i < ha->msix_count; i++) { | |
3638 | qentry = &ha->msix_entries[i]; | |
3639 | if (qentry->have_irq) { | |
3640 | irq_set_affinity_notifier(qentry->vector, NULL); | |
3641 | free_irq(pci_irq_vector(ha->pdev, i), qentry->handle); | |
3642 | } | |
3643 | } | |
3644 | kfree(ha->msix_entries); | |
3645 | ha->msix_entries = NULL; | |
3646 | ha->flags.msix_enabled = 0; | |
3647 | ql_dbg(ql_dbg_init, vha, 0x0042, | |
3648 | "Disabled MSI-X.\n"); | |
3649 | } else { | |
3650 | free_irq(pci_irq_vector(ha->pdev, 0), rsp); | |
3651 | } | |
e315cd28 | 3652 | |
27873de9 | 3653 | free_irqs: |
4fa18345 | 3654 | pci_free_irq_vectors(ha->pdev); |
a8488abe | 3655 | } |
73208dfd | 3656 | |
d7459527 MH |
3657 | int qla25xx_request_irq(struct qla_hw_data *ha, struct qla_qpair *qpair, |
3658 | struct qla_msix_entry *msix, int vector_type) | |
73208dfd | 3659 | { |
44a8f954 | 3660 | const struct qla_init_msix_entry *intr = &msix_entries[vector_type]; |
7c3df132 | 3661 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); |
73208dfd AC |
3662 | int ret; |
3663 | ||
d7459527 MH |
3664 | scnprintf(msix->name, sizeof(msix->name), |
3665 | "qla2xxx%lu_qpair%d", vha->host_no, qpair->id); | |
3666 | ret = request_irq(msix->vector, intr->handler, 0, msix->name, qpair); | |
73208dfd | 3667 | if (ret) { |
7c3df132 SK |
3668 | ql_log(ql_log_fatal, vha, 0x00e6, |
3669 | "MSI-X: Unable to register handler -- %x/%d.\n", | |
3670 | msix->vector, ret); | |
73208dfd AC |
3671 | return ret; |
3672 | } | |
3673 | msix->have_irq = 1; | |
d7459527 | 3674 | msix->handle = qpair; |
73208dfd AC |
3675 | return ret; |
3676 | } |