scsi: qla2xxx: Fix routine qla27xx_dump_{mpi|ram}()
[linux-2.6-block.git] / drivers / scsi / qla2xxx / qla_isr.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
bd21eaf9 3 * Copyright (c) 2003-2014 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT
6 */
7#include "qla_def.h"
2d70c103 8#include "qla_target.h"
1da177e4 9
05236a05 10#include <linux/delay.h>
5a0e3ad6 11#include <linux/slab.h>
e326d22a 12#include <linux/cpu.h>
09ce66ae 13#include <linux/t10-pi.h>
df7baa50 14#include <scsi/scsi_tcq.h>
9a069e19 15#include <scsi/scsi_bsg_fc.h>
bad75002 16#include <scsi/scsi_eh.h>
d32041ec
JT
17#include <scsi/fc/fc_fs.h>
18#include <linux/nvme-fc-driver.h>
df7baa50 19
1da177e4 20static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t);
73208dfd 21static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *);
2afa19a9 22static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *);
c5419e26 23static int qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *,
73208dfd 24 sts_entry_t *);
9a853f71 25
1da177e4
LT
26/**
27 * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200.
807eb907 28 * @irq: interrupt number
1da177e4 29 * @dev_id: SCSI driver HA context
1da177e4
LT
30 *
31 * Called by system whenever the host adapter generates an interrupt.
32 *
33 * Returns handled flag.
34 */
35irqreturn_t
7d12e780 36qla2100_intr_handler(int irq, void *dev_id)
1da177e4 37{
e315cd28
AC
38 scsi_qla_host_t *vha;
39 struct qla_hw_data *ha;
3d71644c 40 struct device_reg_2xxx __iomem *reg;
1da177e4 41 int status;
1da177e4 42 unsigned long iter;
14e660e6 43 uint16_t hccr;
9a853f71 44 uint16_t mb[4];
e315cd28 45 struct rsp_que *rsp;
43fac4d9 46 unsigned long flags;
1da177e4 47
e315cd28
AC
48 rsp = (struct rsp_que *) dev_id;
49 if (!rsp) {
3256b435
CD
50 ql_log(ql_log_info, NULL, 0x505d,
51 "%s: NULL response queue pointer.\n", __func__);
1da177e4
LT
52 return (IRQ_NONE);
53 }
54
e315cd28 55 ha = rsp->hw;
3d71644c 56 reg = &ha->iobase->isp;
1da177e4
LT
57 status = 0;
58
43fac4d9 59 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 60 vha = pci_get_drvdata(ha->pdev);
1da177e4 61 for (iter = 50; iter--; ) {
14e660e6 62 hccr = RD_REG_WORD(&reg->hccr);
c821e0d5 63 if (qla2x00_check_reg16_for_disconnect(vha, hccr))
f3ddac19 64 break;
14e660e6
SJ
65 if (hccr & HCCR_RISC_PAUSE) {
66 if (pci_channel_offline(ha->pdev))
67 break;
68
69 /*
70 * Issue a "HARD" reset in order for the RISC interrupt
a06a0f8e 71 * bit to be cleared. Schedule a big hammer to get
14e660e6
SJ
72 * out of the RISC PAUSED state.
73 */
74 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
75 RD_REG_WORD(&reg->hccr);
76
e315cd28
AC
77 ha->isp_ops->fw_dump(vha, 1);
78 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
14e660e6
SJ
79 break;
80 } else if ((RD_REG_WORD(&reg->istatus) & ISR_RISC_INT) == 0)
1da177e4
LT
81 break;
82
83 if (RD_REG_WORD(&reg->semaphore) & BIT_0) {
84 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
85 RD_REG_WORD(&reg->hccr);
86
87 /* Get mailbox data. */
9a853f71
AV
88 mb[0] = RD_MAILBOX_REG(ha, reg, 0);
89 if (mb[0] > 0x3fff && mb[0] < 0x8000) {
e315cd28 90 qla2x00_mbx_completion(vha, mb[0]);
1da177e4 91 status |= MBX_INTERRUPT;
9a853f71
AV
92 } else if (mb[0] > 0x7fff && mb[0] < 0xc000) {
93 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
94 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
95 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
73208dfd 96 qla2x00_async_event(vha, rsp, mb);
1da177e4
LT
97 } else {
98 /*EMPTY*/
7c3df132
SK
99 ql_dbg(ql_dbg_async, vha, 0x5025,
100 "Unrecognized interrupt type (%d).\n",
101 mb[0]);
1da177e4
LT
102 }
103 /* Release mailbox registers. */
104 WRT_REG_WORD(&reg->semaphore, 0);
105 RD_REG_WORD(&reg->semaphore);
106 } else {
73208dfd 107 qla2x00_process_response_queue(rsp);
1da177e4
LT
108
109 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
110 RD_REG_WORD(&reg->hccr);
111 }
112 }
36439832 113 qla2x00_handle_mbx_completion(ha, status);
43fac4d9 114 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1da177e4 115
1da177e4
LT
116 return (IRQ_HANDLED);
117}
118
f3ddac19 119bool
c821e0d5 120qla2x00_check_reg32_for_disconnect(scsi_qla_host_t *vha, uint32_t reg)
f3ddac19
CD
121{
122 /* Check for PCI disconnection */
a30c2a3b 123 if (reg == 0xffffffff && !pci_channel_offline(vha->hw->pdev)) {
beb9e315 124 if (!test_and_set_bit(PFLG_DISCONNECTED, &vha->pci_flags) &&
6b383979
JL
125 !test_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags) &&
126 !test_bit(PFLG_DRIVER_PROBING, &vha->pci_flags)) {
232792b6
JL
127 /*
128 * Schedule this (only once) on the default system
129 * workqueue so that all the adapter workqueues and the
130 * DPC thread can be shutdown cleanly.
131 */
132 schedule_work(&vha->hw->board_disable);
133 }
f3ddac19
CD
134 return true;
135 } else
136 return false;
137}
138
c821e0d5
JL
139bool
140qla2x00_check_reg16_for_disconnect(scsi_qla_host_t *vha, uint16_t reg)
141{
142 return qla2x00_check_reg32_for_disconnect(vha, 0xffff0000 | reg);
143}
144
1da177e4
LT
145/**
146 * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx.
807eb907 147 * @irq: interrupt number
1da177e4 148 * @dev_id: SCSI driver HA context
1da177e4
LT
149 *
150 * Called by system whenever the host adapter generates an interrupt.
151 *
152 * Returns handled flag.
153 */
154irqreturn_t
7d12e780 155qla2300_intr_handler(int irq, void *dev_id)
1da177e4 156{
e315cd28 157 scsi_qla_host_t *vha;
3d71644c 158 struct device_reg_2xxx __iomem *reg;
1da177e4 159 int status;
1da177e4
LT
160 unsigned long iter;
161 uint32_t stat;
1da177e4 162 uint16_t hccr;
9a853f71 163 uint16_t mb[4];
e315cd28
AC
164 struct rsp_que *rsp;
165 struct qla_hw_data *ha;
43fac4d9 166 unsigned long flags;
1da177e4 167
e315cd28
AC
168 rsp = (struct rsp_que *) dev_id;
169 if (!rsp) {
3256b435
CD
170 ql_log(ql_log_info, NULL, 0x5058,
171 "%s: NULL response queue pointer.\n", __func__);
1da177e4
LT
172 return (IRQ_NONE);
173 }
174
e315cd28 175 ha = rsp->hw;
3d71644c 176 reg = &ha->iobase->isp;
1da177e4
LT
177 status = 0;
178
43fac4d9 179 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 180 vha = pci_get_drvdata(ha->pdev);
1da177e4
LT
181 for (iter = 50; iter--; ) {
182 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
c821e0d5 183 if (qla2x00_check_reg32_for_disconnect(vha, stat))
f3ddac19 184 break;
1da177e4 185 if (stat & HSR_RISC_PAUSED) {
85880801 186 if (unlikely(pci_channel_offline(ha->pdev)))
14e660e6
SJ
187 break;
188
1da177e4 189 hccr = RD_REG_WORD(&reg->hccr);
f3ddac19 190
1da177e4 191 if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8))
7c3df132
SK
192 ql_log(ql_log_warn, vha, 0x5026,
193 "Parity error -- HCCR=%x, Dumping "
194 "firmware.\n", hccr);
1da177e4 195 else
7c3df132
SK
196 ql_log(ql_log_warn, vha, 0x5027,
197 "RISC paused -- HCCR=%x, Dumping "
198 "firmware.\n", hccr);
1da177e4
LT
199
200 /*
201 * Issue a "HARD" reset in order for the RISC
202 * interrupt bit to be cleared. Schedule a big
a06a0f8e 203 * hammer to get out of the RISC PAUSED state.
1da177e4
LT
204 */
205 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
206 RD_REG_WORD(&reg->hccr);
07f31805 207
e315cd28
AC
208 ha->isp_ops->fw_dump(vha, 1);
209 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT
210 break;
211 } else if ((stat & HSR_RISC_INT) == 0)
212 break;
213
1da177e4 214 switch (stat & 0xff) {
1da177e4
LT
215 case 0x1:
216 case 0x2:
217 case 0x10:
218 case 0x11:
e315cd28 219 qla2x00_mbx_completion(vha, MSW(stat));
1da177e4
LT
220 status |= MBX_INTERRUPT;
221
222 /* Release mailbox registers. */
223 WRT_REG_WORD(&reg->semaphore, 0);
224 break;
225 case 0x12:
9a853f71
AV
226 mb[0] = MSW(stat);
227 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
228 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
229 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
73208dfd 230 qla2x00_async_event(vha, rsp, mb);
9a853f71
AV
231 break;
232 case 0x13:
73208dfd 233 qla2x00_process_response_queue(rsp);
1da177e4
LT
234 break;
235 case 0x15:
9a853f71
AV
236 mb[0] = MBA_CMPLT_1_16BIT;
237 mb[1] = MSW(stat);
73208dfd 238 qla2x00_async_event(vha, rsp, mb);
1da177e4
LT
239 break;
240 case 0x16:
9a853f71
AV
241 mb[0] = MBA_SCSI_COMPLETION;
242 mb[1] = MSW(stat);
243 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
73208dfd 244 qla2x00_async_event(vha, rsp, mb);
1da177e4
LT
245 break;
246 default:
7c3df132
SK
247 ql_dbg(ql_dbg_async, vha, 0x5028,
248 "Unrecognized interrupt type (%d).\n", stat & 0xff);
1da177e4
LT
249 break;
250 }
251 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
252 RD_REG_WORD_RELAXED(&reg->hccr);
253 }
36439832 254 qla2x00_handle_mbx_completion(ha, status);
43fac4d9 255 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1da177e4 256
1da177e4
LT
257 return (IRQ_HANDLED);
258}
259
260/**
261 * qla2x00_mbx_completion() - Process mailbox command completions.
2db6228d 262 * @vha: SCSI driver HA context
1da177e4
LT
263 * @mb0: Mailbox0 register
264 */
265static void
e315cd28 266qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
1da177e4
LT
267{
268 uint16_t cnt;
4fa94f83 269 uint32_t mboxes;
1da177e4 270 uint16_t __iomem *wptr;
e315cd28 271 struct qla_hw_data *ha = vha->hw;
3d71644c 272 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 273
4fa94f83 274 /* Read all mbox registers? */
c02189e1
BVA
275 WARN_ON_ONCE(ha->mbx_count > 32);
276 mboxes = (1ULL << ha->mbx_count) - 1;
4fa94f83 277 if (!ha->mcp)
a720101d 278 ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERROR.\n");
4fa94f83
AV
279 else
280 mboxes = ha->mcp->in_mb;
281
1da177e4
LT
282 /* Load return mailbox registers. */
283 ha->flags.mbox_int = 1;
284 ha->mailbox_out[0] = mb0;
4fa94f83 285 mboxes >>= 1;
1da177e4
LT
286 wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 1);
287
288 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
fa2a1ce5 289 if (IS_QLA2200(ha) && cnt == 8)
1da177e4 290 wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 8);
4fa94f83 291 if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0))
1da177e4 292 ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr);
4fa94f83 293 else if (mboxes & BIT_0)
1da177e4 294 ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
fa2a1ce5 295
1da177e4 296 wptr++;
4fa94f83 297 mboxes >>= 1;
1da177e4 298 }
1da177e4
LT
299}
300
8a659571
AV
301static void
302qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr)
303{
304 static char *event[] =
305 { "Complete", "Request Notification", "Time Extension" };
306 int rval;
307 struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24;
9e5054ec 308 struct device_reg_82xx __iomem *reg82 = &vha->hw->iobase->isp82;
8a659571
AV
309 uint16_t __iomem *wptr;
310 uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS];
311
312 /* Seed data -- mailbox1 -> mailbox7. */
9e5054ec
CD
313 if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw))
314 wptr = (uint16_t __iomem *)&reg24->mailbox1;
315 else if (IS_QLA8044(vha->hw))
316 wptr = (uint16_t __iomem *)&reg82->mailbox_out[1];
317 else
318 return;
319
8a659571
AV
320 for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++)
321 mb[cnt] = RD_REG_WORD(wptr);
322
7c3df132 323 ql_dbg(ql_dbg_async, vha, 0x5021,
6246b8a1 324 "Inter-Driver Communication %s -- "
7c3df132
SK
325 "%04x %04x %04x %04x %04x %04x %04x.\n",
326 event[aen & 0xff], mb[0], mb[1], mb[2], mb[3],
327 mb[4], mb[5], mb[6]);
454073c9
SV
328 switch (aen) {
329 /* Handle IDC Error completion case. */
330 case MBA_IDC_COMPLETE:
331 if (mb[1] >> 15) {
332 vha->hw->flags.idc_compl_status = 1;
9aaf2cea 333 if (vha->hw->notify_dcbx_comp && !vha->vp_idx)
454073c9
SV
334 complete(&vha->hw->dcbx_comp);
335 }
336 break;
337
338 case MBA_IDC_NOTIFY:
339 /* Acknowledgement needed? [Notify && non-zero timeout]. */
340 timeout = (descr >> 8) & 0xf;
341 ql_dbg(ql_dbg_async, vha, 0x5022,
342 "%lu Inter-Driver Communication %s -- ACK timeout=%d.\n",
343 vha->host_no, event[aen & 0xff], timeout);
344
345 if (!timeout)
346 return;
347 rval = qla2x00_post_idc_ack_work(vha, mb);
348 if (rval != QLA_SUCCESS)
349 ql_log(ql_log_warn, vha, 0x5023,
350 "IDC failed to post ACK.\n");
351 break;
352 case MBA_IDC_TIME_EXT:
353 vha->hw->idc_extend_tmo = descr;
354 ql_dbg(ql_dbg_async, vha, 0x5087,
355 "%lu Inter-Driver Communication %s -- "
356 "Extend timeout by=%d.\n",
357 vha->host_no, event[aen & 0xff], vha->hw->idc_extend_tmo);
358 break;
bf5b8ad7 359 }
8a659571
AV
360}
361
daae62a3 362#define LS_UNKNOWN 2
d0297c9a
JC
363const char *
364qla2x00_get_link_speed_str(struct qla_hw_data *ha, uint16_t speed)
daae62a3 365{
f73cb695
CD
366 static const char *const link_speeds[] = {
367 "1", "2", "?", "4", "8", "16", "32", "10"
d0297c9a 368 };
f73cb695 369#define QLA_LAST_SPEED 7
daae62a3
CD
370
371 if (IS_QLA2100(ha) || IS_QLA2200(ha))
d0297c9a
JC
372 return link_speeds[0];
373 else if (speed == 0x13)
f73cb695
CD
374 return link_speeds[QLA_LAST_SPEED];
375 else if (speed < QLA_LAST_SPEED)
d0297c9a
JC
376 return link_speeds[speed];
377 else
378 return link_speeds[LS_UNKNOWN];
daae62a3
CD
379}
380
fa492630 381static void
7d613ac6
SV
382qla83xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb)
383{
384 struct qla_hw_data *ha = vha->hw;
385
386 /*
387 * 8200 AEN Interpretation:
388 * mb[0] = AEN code
389 * mb[1] = AEN Reason code
390 * mb[2] = LSW of Peg-Halt Status-1 Register
391 * mb[6] = MSW of Peg-Halt Status-1 Register
392 * mb[3] = LSW of Peg-Halt Status-2 register
393 * mb[7] = MSW of Peg-Halt Status-2 register
394 * mb[4] = IDC Device-State Register value
395 * mb[5] = IDC Driver-Presence Register value
396 */
397 ql_dbg(ql_dbg_async, vha, 0x506b, "AEN Code: mb[0] = 0x%x AEN reason: "
398 "mb[1] = 0x%x PH-status1: mb[2] = 0x%x PH-status1: mb[6] = 0x%x.\n",
399 mb[0], mb[1], mb[2], mb[6]);
400 ql_dbg(ql_dbg_async, vha, 0x506c, "PH-status2: mb[3] = 0x%x "
401 "PH-status2: mb[7] = 0x%x Device-State: mb[4] = 0x%x "
402 "Drv-Presence: mb[5] = 0x%x.\n", mb[3], mb[7], mb[4], mb[5]);
403
404 if (mb[1] & (IDC_PEG_HALT_STATUS_CHANGE | IDC_NIC_FW_REPORTED_FAILURE |
405 IDC_HEARTBEAT_FAILURE)) {
406 ha->flags.nic_core_hung = 1;
407 ql_log(ql_log_warn, vha, 0x5060,
408 "83XX: F/W Error Reported: Check if reset required.\n");
409
410 if (mb[1] & IDC_PEG_HALT_STATUS_CHANGE) {
411 uint32_t protocol_engine_id, fw_err_code, err_level;
412
413 /*
414 * IDC_PEG_HALT_STATUS_CHANGE interpretation:
415 * - PEG-Halt Status-1 Register:
416 * (LSW = mb[2], MSW = mb[6])
417 * Bits 0-7 = protocol-engine ID
418 * Bits 8-28 = f/w error code
419 * Bits 29-31 = Error-level
420 * Error-level 0x1 = Non-Fatal error
421 * Error-level 0x2 = Recoverable Fatal error
422 * Error-level 0x4 = UnRecoverable Fatal error
423 * - PEG-Halt Status-2 Register:
424 * (LSW = mb[3], MSW = mb[7])
425 */
426 protocol_engine_id = (mb[2] & 0xff);
427 fw_err_code = (((mb[2] & 0xff00) >> 8) |
428 ((mb[6] & 0x1fff) << 8));
429 err_level = ((mb[6] & 0xe000) >> 13);
430 ql_log(ql_log_warn, vha, 0x5061, "PegHalt Status-1 "
431 "Register: protocol_engine_id=0x%x "
432 "fw_err_code=0x%x err_level=0x%x.\n",
433 protocol_engine_id, fw_err_code, err_level);
434 ql_log(ql_log_warn, vha, 0x5062, "PegHalt Status-2 "
435 "Register: 0x%x%x.\n", mb[7], mb[3]);
436 if (err_level == ERR_LEVEL_NON_FATAL) {
437 ql_log(ql_log_warn, vha, 0x5063,
0bf0efa1 438 "Not a fatal error, f/w has recovered itself.\n");
7d613ac6
SV
439 } else if (err_level == ERR_LEVEL_RECOVERABLE_FATAL) {
440 ql_log(ql_log_fatal, vha, 0x5064,
441 "Recoverable Fatal error: Chip reset "
442 "required.\n");
443 qla83xx_schedule_work(vha,
444 QLA83XX_NIC_CORE_RESET);
445 } else if (err_level == ERR_LEVEL_UNRECOVERABLE_FATAL) {
446 ql_log(ql_log_fatal, vha, 0x5065,
447 "Unrecoverable Fatal error: Set FAILED "
448 "state, reboot required.\n");
449 qla83xx_schedule_work(vha,
450 QLA83XX_NIC_CORE_UNRECOVERABLE);
451 }
452 }
453
454 if (mb[1] & IDC_NIC_FW_REPORTED_FAILURE) {
455 uint16_t peg_fw_state, nw_interface_link_up;
456 uint16_t nw_interface_signal_detect, sfp_status;
457 uint16_t htbt_counter, htbt_monitor_enable;
b4a028a5 458 uint16_t sfp_additional_info, sfp_multirate;
7d613ac6
SV
459 uint16_t sfp_tx_fault, link_speed, dcbx_status;
460
461 /*
462 * IDC_NIC_FW_REPORTED_FAILURE interpretation:
463 * - PEG-to-FC Status Register:
464 * (LSW = mb[2], MSW = mb[6])
465 * Bits 0-7 = Peg-Firmware state
466 * Bit 8 = N/W Interface Link-up
467 * Bit 9 = N/W Interface signal detected
468 * Bits 10-11 = SFP Status
469 * SFP Status 0x0 = SFP+ transceiver not expected
470 * SFP Status 0x1 = SFP+ transceiver not present
471 * SFP Status 0x2 = SFP+ transceiver invalid
472 * SFP Status 0x3 = SFP+ transceiver present and
473 * valid
474 * Bits 12-14 = Heartbeat Counter
475 * Bit 15 = Heartbeat Monitor Enable
476 * Bits 16-17 = SFP Additional Info
477 * SFP info 0x0 = Unregocnized transceiver for
478 * Ethernet
479 * SFP info 0x1 = SFP+ brand validation failed
480 * SFP info 0x2 = SFP+ speed validation failed
481 * SFP info 0x3 = SFP+ access error
482 * Bit 18 = SFP Multirate
483 * Bit 19 = SFP Tx Fault
484 * Bits 20-22 = Link Speed
485 * Bits 23-27 = Reserved
486 * Bits 28-30 = DCBX Status
487 * DCBX Status 0x0 = DCBX Disabled
488 * DCBX Status 0x1 = DCBX Enabled
489 * DCBX Status 0x2 = DCBX Exchange error
490 * Bit 31 = Reserved
491 */
492 peg_fw_state = (mb[2] & 0x00ff);
493 nw_interface_link_up = ((mb[2] & 0x0100) >> 8);
494 nw_interface_signal_detect = ((mb[2] & 0x0200) >> 9);
495 sfp_status = ((mb[2] & 0x0c00) >> 10);
496 htbt_counter = ((mb[2] & 0x7000) >> 12);
497 htbt_monitor_enable = ((mb[2] & 0x8000) >> 15);
b4a028a5 498 sfp_additional_info = (mb[6] & 0x0003);
7d613ac6
SV
499 sfp_multirate = ((mb[6] & 0x0004) >> 2);
500 sfp_tx_fault = ((mb[6] & 0x0008) >> 3);
501 link_speed = ((mb[6] & 0x0070) >> 4);
502 dcbx_status = ((mb[6] & 0x7000) >> 12);
503
504 ql_log(ql_log_warn, vha, 0x5066,
505 "Peg-to-Fc Status Register:\n"
506 "peg_fw_state=0x%x, nw_interface_link_up=0x%x, "
507 "nw_interface_signal_detect=0x%x"
508 "\nsfp_statis=0x%x.\n ", peg_fw_state,
509 nw_interface_link_up, nw_interface_signal_detect,
510 sfp_status);
511 ql_log(ql_log_warn, vha, 0x5067,
512 "htbt_counter=0x%x, htbt_monitor_enable=0x%x, "
b4a028a5 513 "sfp_additional_info=0x%x, sfp_multirate=0x%x.\n ",
7d613ac6 514 htbt_counter, htbt_monitor_enable,
b4a028a5 515 sfp_additional_info, sfp_multirate);
7d613ac6
SV
516 ql_log(ql_log_warn, vha, 0x5068,
517 "sfp_tx_fault=0x%x, link_state=0x%x, "
518 "dcbx_status=0x%x.\n", sfp_tx_fault, link_speed,
519 dcbx_status);
520
521 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
522 }
523
524 if (mb[1] & IDC_HEARTBEAT_FAILURE) {
525 ql_log(ql_log_warn, vha, 0x5069,
526 "Heartbeat Failure encountered, chip reset "
527 "required.\n");
528
529 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
530 }
531 }
532
533 if (mb[1] & IDC_DEVICE_STATE_CHANGE) {
534 ql_log(ql_log_info, vha, 0x506a,
535 "IDC Device-State changed = 0x%x.\n", mb[4]);
6c3943cd
SK
536 if (ha->flags.nic_core_reset_owner)
537 return;
7d613ac6
SV
538 qla83xx_schedule_work(vha, MBA_IDC_AEN);
539 }
540}
541
bb4cf5b7
CD
542int
543qla2x00_is_a_vp_did(scsi_qla_host_t *vha, uint32_t rscn_entry)
544{
545 struct qla_hw_data *ha = vha->hw;
546 scsi_qla_host_t *vp;
547 uint32_t vp_did;
548 unsigned long flags;
549 int ret = 0;
550
551 if (!ha->num_vhosts)
552 return ret;
553
554 spin_lock_irqsave(&ha->vport_slock, flags);
555 list_for_each_entry(vp, &ha->vp_list, list) {
556 vp_did = vp->d_id.b24;
557 if (vp_did == rscn_entry) {
558 ret = 1;
559 break;
560 }
561 }
562 spin_unlock_irqrestore(&ha->vport_slock, flags);
563
564 return ret;
565}
566
726b8548 567fc_port_t *
17cac3a1
JC
568qla2x00_find_fcport_by_loopid(scsi_qla_host_t *vha, uint16_t loop_id)
569{
726b8548
QT
570 fc_port_t *f, *tf;
571
572 f = tf = NULL;
573 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list)
574 if (f->loop_id == loop_id)
575 return f;
576 return NULL;
577}
17cac3a1 578
726b8548
QT
579fc_port_t *
580qla2x00_find_fcport_by_wwpn(scsi_qla_host_t *vha, u8 *wwpn, u8 incl_deleted)
581{
582 fc_port_t *f, *tf;
583
584 f = tf = NULL;
585 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
586 if (memcmp(f->port_name, wwpn, WWN_SIZE) == 0) {
587 if (incl_deleted)
588 return f;
589 else if (f->deleted == 0)
590 return f;
591 }
592 }
593 return NULL;
594}
17cac3a1 595
726b8548
QT
596fc_port_t *
597qla2x00_find_fcport_by_nportid(scsi_qla_host_t *vha, port_id_t *id,
598 u8 incl_deleted)
599{
600 fc_port_t *f, *tf;
601
602 f = tf = NULL;
603 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
604 if (f->d_id.b24 == id->b24) {
605 if (incl_deleted)
606 return f;
607 else if (f->deleted == 0)
608 return f;
609 }
610 }
17cac3a1
JC
611 return NULL;
612}
613
1da177e4
LT
614/**
615 * qla2x00_async_event() - Process aynchronous events.
2db6228d
BVA
616 * @vha: SCSI driver HA context
617 * @rsp: response queue
9a853f71 618 * @mb: Mailbox registers (0 - 3)
1da177e4 619 */
2c3dfe3f 620void
73208dfd 621qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb)
1da177e4 622{
1da177e4 623 uint16_t handle_cnt;
bdab23da 624 uint16_t cnt, mbx;
1da177e4 625 uint32_t handles[5];
e315cd28 626 struct qla_hw_data *ha = vha->hw;
3d71644c 627 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
bdab23da 628 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
bc5c2aad 629 struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
52c82823 630 uint32_t rscn_entry, host_pid;
4d4df193 631 unsigned long flags;
ef86cb20 632 fc_port_t *fcport = NULL;
1da177e4 633
45235022
QT
634 if (!vha->hw->flags.fw_started)
635 return;
636
1da177e4
LT
637 /* Setup to process RIO completion. */
638 handle_cnt = 0;
6246b8a1 639 if (IS_CNA_CAPABLE(ha))
3a03eb79 640 goto skip_rio;
1da177e4
LT
641 switch (mb[0]) {
642 case MBA_SCSI_COMPLETION:
9a853f71 643 handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
1da177e4
LT
644 handle_cnt = 1;
645 break;
646 case MBA_CMPLT_1_16BIT:
9a853f71 647 handles[0] = mb[1];
1da177e4
LT
648 handle_cnt = 1;
649 mb[0] = MBA_SCSI_COMPLETION;
650 break;
651 case MBA_CMPLT_2_16BIT:
9a853f71
AV
652 handles[0] = mb[1];
653 handles[1] = mb[2];
1da177e4
LT
654 handle_cnt = 2;
655 mb[0] = MBA_SCSI_COMPLETION;
656 break;
657 case MBA_CMPLT_3_16BIT:
9a853f71
AV
658 handles[0] = mb[1];
659 handles[1] = mb[2];
660 handles[2] = mb[3];
1da177e4
LT
661 handle_cnt = 3;
662 mb[0] = MBA_SCSI_COMPLETION;
663 break;
664 case MBA_CMPLT_4_16BIT:
9a853f71
AV
665 handles[0] = mb[1];
666 handles[1] = mb[2];
667 handles[2] = mb[3];
1da177e4
LT
668 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
669 handle_cnt = 4;
670 mb[0] = MBA_SCSI_COMPLETION;
671 break;
672 case MBA_CMPLT_5_16BIT:
9a853f71
AV
673 handles[0] = mb[1];
674 handles[1] = mb[2];
675 handles[2] = mb[3];
1da177e4
LT
676 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
677 handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7);
678 handle_cnt = 5;
679 mb[0] = MBA_SCSI_COMPLETION;
680 break;
681 case MBA_CMPLT_2_32BIT:
9a853f71 682 handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
1da177e4
LT
683 handles[1] = le32_to_cpu(
684 ((uint32_t)(RD_MAILBOX_REG(ha, reg, 7) << 16)) |
685 RD_MAILBOX_REG(ha, reg, 6));
686 handle_cnt = 2;
687 mb[0] = MBA_SCSI_COMPLETION;
688 break;
689 default:
690 break;
691 }
3a03eb79 692skip_rio:
1da177e4
LT
693 switch (mb[0]) {
694 case MBA_SCSI_COMPLETION: /* Fast Post */
e315cd28 695 if (!vha->flags.online)
1da177e4
LT
696 break;
697
698 for (cnt = 0; cnt < handle_cnt; cnt++)
73208dfd
AC
699 qla2x00_process_completed_request(vha, rsp->req,
700 handles[cnt]);
1da177e4
LT
701 break;
702
703 case MBA_RESET: /* Reset */
7c3df132
SK
704 ql_dbg(ql_dbg_async, vha, 0x5002,
705 "Asynchronous RESET.\n");
1da177e4 706
e315cd28 707 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4
LT
708 break;
709
710 case MBA_SYSTEM_ERR: /* System Error */
f73cb695 711 mbx = (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) ?
6246b8a1 712 RD_REG_WORD(&reg24->mailbox7) : 0;
7c3df132 713 ql_log(ql_log_warn, vha, 0x5003,
bdab23da
AV
714 "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh "
715 "mbx7=%xh.\n", mb[1], mb[2], mb[3], mbx);
1da177e4 716
e315cd28 717 ha->isp_ops->fw_dump(vha, 1);
ec7193e2 718 ha->flags.fw_init_done = 0;
4b60c827 719 QLA_FW_STOPPED(ha);
1da177e4 720
e428924c 721 if (IS_FWI2_CAPABLE(ha)) {
9a853f71 722 if (mb[1] == 0 && mb[2] == 0) {
7c3df132 723 ql_log(ql_log_fatal, vha, 0x5004,
9a853f71
AV
724 "Unrecoverable Hardware Error: adapter "
725 "marked OFFLINE!\n");
e315cd28 726 vha->flags.online = 0;
6246b8a1 727 vha->device_flags |= DFLG_DEV_FAILED;
b1d46989 728 } else {
25985edc 729 /* Check to see if MPI timeout occurred */
f73cb695 730 if ((mbx & MBX_3) && (ha->port_no == 0))
b1d46989
MI
731 set_bit(MPI_RESET_NEEDED,
732 &vha->dpc_flags);
733
e315cd28 734 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
b1d46989 735 }
9a853f71 736 } else if (mb[1] == 0) {
7c3df132 737 ql_log(ql_log_fatal, vha, 0x5005,
1da177e4
LT
738 "Unrecoverable Hardware Error: adapter marked "
739 "OFFLINE!\n");
e315cd28 740 vha->flags.online = 0;
6246b8a1 741 vha->device_flags |= DFLG_DEV_FAILED;
1da177e4 742 } else
e315cd28 743 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT
744 break;
745
746 case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */
7c3df132
SK
747 ql_log(ql_log_warn, vha, 0x5006,
748 "ISP Request Transfer Error (%x).\n", mb[1]);
1da177e4 749
e315cd28 750 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT
751 break;
752
753 case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */
7c3df132 754 ql_log(ql_log_warn, vha, 0x5007,
41233cd3 755 "ISP Response Transfer Error (%x).\n", mb[1]);
1da177e4 756
e315cd28 757 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT
758 break;
759
760 case MBA_WAKEUP_THRES: /* Request Queue Wake-up */
7c3df132 761 ql_dbg(ql_dbg_async, vha, 0x5008,
41233cd3
JC
762 "Asynchronous WAKEUP_THRES (%x).\n", mb[1]);
763 break;
1da177e4 764
41233cd3 765 case MBA_LOOP_INIT_ERR:
75d560e0 766 ql_log(ql_log_warn, vha, 0x5090,
41233cd3
JC
767 "LOOP INIT ERROR (%x).\n", mb[1]);
768 ha->isp_ops->fw_dump(vha, 1);
769 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2d70c103 770 break;
41233cd3 771
1da177e4 772 case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */
ec7193e2 773 ha->flags.lip_ae = 1;
ec7193e2 774
cfb0919c 775 ql_dbg(ql_dbg_async, vha, 0x5009,
7c3df132 776 "LIP occurred (%x).\n", mb[1]);
1da177e4 777
e315cd28
AC
778 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
779 atomic_set(&vha->loop_state, LOOP_DOWN);
780 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
781 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT
782 }
783
e315cd28
AC
784 if (vha->vp_idx) {
785 atomic_set(&vha->vp_state, VP_FAILED);
786 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ
787 }
788
e315cd28
AC
789 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
790 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
1da177e4 791
e315cd28
AC
792 vha->flags.management_server_logged_in = 0;
793 qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]);
1da177e4
LT
794 break;
795
796 case MBA_LOOP_UP: /* Loop Up Event */
daae62a3 797 if (IS_QLA2100(ha) || IS_QLA2200(ha))
d8b45213 798 ha->link_data_rate = PORT_SPEED_1GB;
daae62a3 799 else
1da177e4 800 ha->link_data_rate = mb[1];
1da177e4 801
8e5a9484 802 ql_log(ql_log_info, vha, 0x500a,
daae62a3 803 "LOOP UP detected (%s Gbps).\n",
d0297c9a 804 qla2x00_get_link_speed_str(ha, ha->link_data_rate));
1da177e4 805
e315cd28
AC
806 vha->flags.management_server_logged_in = 0;
807 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate);
e4e3a2ce
QT
808
809 if (AUTO_DETECT_SFP_SUPPORT(vha)) {
810 set_bit(DETECT_SFP_CHANGE, &vha->dpc_flags);
811 qla2xxx_wake_dpc(vha);
812 }
1da177e4
LT
813 break;
814
815 case MBA_LOOP_DOWN: /* Loop Down Event */
9cd883f0 816 SAVE_TOPO(ha);
ec7193e2
QT
817 ha->flags.lip_ae = 0;
818 ha->current_topology = 0;
819
6246b8a1
GM
820 mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha))
821 ? RD_REG_WORD(&reg24->mailbox4) : 0;
7ec0effd
AD
822 mbx = (IS_P3P_TYPE(ha)) ? RD_REG_WORD(&reg82->mailbox_out[4])
823 : mbx;
8e5a9484 824 ql_log(ql_log_info, vha, 0x500b,
7c3df132
SK
825 "LOOP DOWN detected (%x %x %x %x).\n",
826 mb[1], mb[2], mb[3], mbx);
1da177e4 827
e315cd28
AC
828 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
829 atomic_set(&vha->loop_state, LOOP_DOWN);
830 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2486c627
HM
831 /*
832 * In case of loop down, restore WWPN from
833 * NVRAM in case of FA-WWPN capable ISP
718abbdc 834 * Restore for Physical Port only
2486c627 835 */
718abbdc 836 if (!vha->vp_idx) {
dcbf8f80
SC
837 if (ha->flags.fawwpn_enabled &&
838 (ha->current_topology == ISP_CFG_F)) {
718abbdc
SC
839 void *wwpn = ha->init_cb->port_name;
840 memcpy(vha->port_name, wwpn, WWN_SIZE);
841 fc_host_port_name(vha->host) =
842 wwn_to_u64(vha->port_name);
843 ql_dbg(ql_dbg_init + ql_dbg_verbose,
83548fe2 844 vha, 0x00d8, "LOOP DOWN detected,"
718abbdc
SC
845 "restore WWPN %016llx\n",
846 wwn_to_u64(vha->port_name));
847 }
848
849 clear_bit(VP_CONFIG_OK, &vha->vp_flags);
2486c627
HM
850 }
851
e315cd28
AC
852 vha->device_flags |= DFLG_NO_CABLE;
853 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT
854 }
855
e315cd28
AC
856 if (vha->vp_idx) {
857 atomic_set(&vha->vp_state, VP_FAILED);
858 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ
859 }
860
e315cd28 861 vha->flags.management_server_logged_in = 0;
d8b45213 862 ha->link_data_rate = PORT_SPEED_UNKNOWN;
e315cd28 863 qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0);
1da177e4
LT
864 break;
865
866 case MBA_LIP_RESET: /* LIP reset occurred */
cfb0919c 867 ql_dbg(ql_dbg_async, vha, 0x500c,
cc3ef7bc 868 "LIP reset occurred (%x).\n", mb[1]);
1da177e4 869
e315cd28
AC
870 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
871 atomic_set(&vha->loop_state, LOOP_DOWN);
872 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
873 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT
874 }
875
e315cd28
AC
876 if (vha->vp_idx) {
877 atomic_set(&vha->vp_state, VP_FAILED);
878 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ
879 }
880
e315cd28 881 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4
LT
882
883 ha->operating_mode = LOOP;
e315cd28
AC
884 vha->flags.management_server_logged_in = 0;
885 qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]);
1da177e4
LT
886 break;
887
3a03eb79 888 /* case MBA_DCBX_COMPLETE: */
1da177e4 889 case MBA_POINT_TO_POINT: /* Point-to-Point */
ec7193e2 890 ha->flags.lip_ae = 0;
ec7193e2 891
1da177e4
LT
892 if (IS_QLA2100(ha))
893 break;
894
7ec0effd 895 if (IS_CNA_CAPABLE(ha)) {
7c3df132
SK
896 ql_dbg(ql_dbg_async, vha, 0x500d,
897 "DCBX Completed -- %04x %04x %04x.\n",
898 mb[1], mb[2], mb[3]);
9aaf2cea 899 if (ha->notify_dcbx_comp && !vha->vp_idx)
23f2ebd1
SR
900 complete(&ha->dcbx_comp);
901
902 } else
7c3df132
SK
903 ql_dbg(ql_dbg_async, vha, 0x500e,
904 "Asynchronous P2P MODE received.\n");
1da177e4
LT
905
906 /*
907 * Until there's a transition from loop down to loop up, treat
908 * this as loop down only.
909 */
e315cd28
AC
910 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
911 atomic_set(&vha->loop_state, LOOP_DOWN);
912 if (!atomic_read(&vha->loop_down_timer))
913 atomic_set(&vha->loop_down_timer,
1da177e4 914 LOOP_DOWN_TIME);
48acad09
QT
915 if (!N2N_TOPO(ha))
916 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT
917 }
918
e315cd28
AC
919 if (vha->vp_idx) {
920 atomic_set(&vha->vp_state, VP_FAILED);
921 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ
922 }
923
e315cd28
AC
924 if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)))
925 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
926
927 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
928 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
4346b149 929
e315cd28 930 vha->flags.management_server_logged_in = 0;
1da177e4
LT
931 break;
932
933 case MBA_CHG_IN_CONNECTION: /* Change in connection mode */
934 if (IS_QLA2100(ha))
935 break;
936
cfb0919c 937 ql_dbg(ql_dbg_async, vha, 0x500f,
1da177e4
LT
938 "Configuration change detected: value=%x.\n", mb[1]);
939
e315cd28
AC
940 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
941 atomic_set(&vha->loop_state, LOOP_DOWN);
942 if (!atomic_read(&vha->loop_down_timer))
943 atomic_set(&vha->loop_down_timer,
1da177e4 944 LOOP_DOWN_TIME);
e315cd28 945 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT
946 }
947
e315cd28
AC
948 if (vha->vp_idx) {
949 atomic_set(&vha->vp_state, VP_FAILED);
950 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ
951 }
952
e315cd28
AC
953 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
954 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1da177e4
LT
955 break;
956
957 case MBA_PORT_UPDATE: /* Port database update */
55903b9d
SV
958 /*
959 * Handle only global and vn-port update events
960 *
961 * Relevant inputs:
962 * mb[1] = N_Port handle of changed port
963 * OR 0xffff for global event
964 * mb[2] = New login state
965 * 7 = Port logged out
966 * mb[3] = LSB is vp_idx, 0xff = all vps
967 *
968 * Skip processing if:
969 * Event is global, vp_idx is NOT all vps,
970 * vp_idx does not match
971 * Event is not global, vp_idx does not match
972 */
12cec63e
AV
973 if (IS_QLA2XXX_MIDTYPE(ha) &&
974 ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) ||
975 (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff))
976 break;
73208dfd 977
17cac3a1 978 if (mb[2] == 0x7) {
7c3df132 979 ql_dbg(ql_dbg_async, vha, 0x5010,
17cac3a1
JC
980 "Port %s %04x %04x %04x.\n",
981 mb[1] == 0xffff ? "unavailable" : "logout",
7c3df132 982 mb[1], mb[2], mb[3]);
17cac3a1
JC
983
984 if (mb[1] == 0xffff)
985 goto global_port_update;
986
b98ae0d7
QT
987 if (mb[1] == NPH_SNS_LID(ha)) {
988 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
989 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
990 break;
991 }
992
993 /* use handle_cnt for loop id/nport handle */
994 if (IS_FWI2_CAPABLE(ha))
995 handle_cnt = NPH_SNS;
996 else
997 handle_cnt = SIMPLE_NAME_SERVER;
998 if (mb[1] == handle_cnt) {
999 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1000 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1001 break;
1002 }
1003
17cac3a1
JC
1004 /* Port logout */
1005 fcport = qla2x00_find_fcport_by_loopid(vha, mb[1]);
1006 if (!fcport)
1007 break;
1008 if (atomic_read(&fcport->state) != FCS_ONLINE)
1009 break;
1010 ql_dbg(ql_dbg_async, vha, 0x508a,
1011 "Marking port lost loopid=%04x portid=%06x.\n",
1012 fcport->loop_id, fcport->d_id.b24);
726b8548
QT
1013 if (qla_ini_mode_enabled(vha)) {
1014 qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
1015 fcport->logout_on_delete = 0;
d8630bb9 1016 qlt_schedule_sess_for_deletion(fcport);
726b8548 1017 }
17cac3a1
JC
1018 break;
1019
1020global_port_update:
9764ff88
AV
1021 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1022 atomic_set(&vha->loop_state, LOOP_DOWN);
1023 atomic_set(&vha->loop_down_timer,
1024 LOOP_DOWN_TIME);
1025 vha->device_flags |= DFLG_NO_CABLE;
1026 qla2x00_mark_all_devices_lost(vha, 1);
1027 }
1028
1029 if (vha->vp_idx) {
1030 atomic_set(&vha->vp_state, VP_FAILED);
1031 fc_vport_set_state(vha->fc_vport,
1032 FC_VPORT_FAILED);
faadc5e7 1033 qla2x00_mark_all_devices_lost(vha, 1);
9764ff88
AV
1034 }
1035
1036 vha->flags.management_server_logged_in = 0;
1037 ha->link_data_rate = PORT_SPEED_UNKNOWN;
1038 break;
1039 }
1040
1da177e4 1041 /*
cc3ef7bc 1042 * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET
1da177e4
LT
1043 * event etc. earlier indicating loop is down) then process
1044 * it. Otherwise ignore it and Wait for RSCN to come in.
1045 */
e315cd28 1046 atomic_set(&vha->loop_down_timer, 0);
8e5a9484 1047 if (atomic_read(&vha->loop_state) != LOOP_DOWN &&
edd05de1 1048 !ha->flags.n2n_ae &&
8e5a9484 1049 atomic_read(&vha->loop_state) != LOOP_DEAD) {
7c3df132
SK
1050 ql_dbg(ql_dbg_async, vha, 0x5011,
1051 "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n",
1052 mb[1], mb[2], mb[3]);
2d70c103
NB
1053
1054 qlt_async_event(mb[0], vha, mb);
1da177e4
LT
1055 break;
1056 }
1057
7c3df132
SK
1058 ql_dbg(ql_dbg_async, vha, 0x5012,
1059 "Port database changed %04x %04x %04x.\n",
1060 mb[1], mb[2], mb[3]);
1da177e4
LT
1061
1062 /*
1063 * Mark all devices as missing so we will login again.
1064 */
e315cd28 1065 atomic_set(&vha->loop_state, LOOP_UP);
6944dccb 1066 vha->scan.scan_retry = 0;
1da177e4 1067
e315cd28
AC
1068 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1069 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
ded6411f 1070 set_bit(VP_CONFIG_OK, &vha->vp_flags);
2d70c103
NB
1071
1072 qlt_async_event(mb[0], vha, mb);
1da177e4
LT
1073 break;
1074
1075 case MBA_RSCN_UPDATE: /* State Change Registration */
3c397400 1076 /* Check if the Vport has issued a SCR */
e315cd28 1077 if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags))
3c397400
SJ
1078 break;
1079 /* Only handle SCNs for our Vport index. */
0d6e61bc 1080 if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff))
3c397400 1081 break;
0d6e61bc 1082
7c3df132
SK
1083 ql_dbg(ql_dbg_async, vha, 0x5013,
1084 "RSCN database changed -- %04x %04x %04x.\n",
1085 mb[1], mb[2], mb[3]);
1da177e4 1086
59d72d87 1087 rscn_entry = ((mb[1] & 0xff) << 16) | mb[2];
e315cd28
AC
1088 host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8)
1089 | vha->d_id.b.al_pa;
1da177e4 1090 if (rscn_entry == host_pid) {
7c3df132
SK
1091 ql_dbg(ql_dbg_async, vha, 0x5014,
1092 "Ignoring RSCN update to local host "
1093 "port ID (%06x).\n", host_pid);
1da177e4
LT
1094 break;
1095 }
1096
59d72d87
RA
1097 /* Ignore reserved bits from RSCN-payload. */
1098 rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2];
1da177e4 1099
bb4cf5b7
CD
1100 /* Skip RSCNs for virtual ports on the same physical port */
1101 if (qla2x00_is_a_vp_did(vha, rscn_entry))
1102 break;
1103
e315cd28
AC
1104 atomic_set(&vha->loop_down_timer, 0);
1105 vha->flags.management_server_logged_in = 0;
726b8548
QT
1106 {
1107 struct event_arg ea;
1da177e4 1108
726b8548
QT
1109 memset(&ea, 0, sizeof(ea));
1110 ea.event = FCME_RSCN;
1111 ea.id.b24 = rscn_entry;
41dc529a 1112 ea.id.b.rsvd_1 = rscn_entry >> 24;
726b8548 1113 qla2x00_fcport_event_handler(vha, &ea);
41dc529a 1114 qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry);
726b8548 1115 }
1da177e4 1116 break;
1da177e4
LT
1117 /* case MBA_RIO_RESPONSE: */
1118 case MBA_ZIO_RESPONSE:
7c3df132
SK
1119 ql_dbg(ql_dbg_async, vha, 0x5015,
1120 "[R|Z]IO update completion.\n");
1da177e4 1121
e428924c 1122 if (IS_FWI2_CAPABLE(ha))
2afa19a9 1123 qla24xx_process_response_queue(vha, rsp);
4fdfefe5 1124 else
73208dfd 1125 qla2x00_process_response_queue(rsp);
1da177e4 1126 break;
9a853f71
AV
1127
1128 case MBA_DISCARD_RND_FRAME:
7c3df132
SK
1129 ql_dbg(ql_dbg_async, vha, 0x5016,
1130 "Discard RND Frame -- %04x %04x %04x.\n",
1131 mb[1], mb[2], mb[3]);
9a853f71 1132 break;
45ebeb56
AV
1133
1134 case MBA_TRACE_NOTIFICATION:
7c3df132
SK
1135 ql_dbg(ql_dbg_async, vha, 0x5017,
1136 "Trace Notification -- %04x %04x.\n", mb[1], mb[2]);
45ebeb56 1137 break;
4d4df193
HK
1138
1139 case MBA_ISP84XX_ALERT:
7c3df132
SK
1140 ql_dbg(ql_dbg_async, vha, 0x5018,
1141 "ISP84XX Alert Notification -- %04x %04x %04x.\n",
1142 mb[1], mb[2], mb[3]);
4d4df193
HK
1143
1144 spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
1145 switch (mb[1]) {
1146 case A84_PANIC_RECOVERY:
7c3df132
SK
1147 ql_log(ql_log_info, vha, 0x5019,
1148 "Alert 84XX: panic recovery %04x %04x.\n",
1149 mb[2], mb[3]);
4d4df193
HK
1150 break;
1151 case A84_OP_LOGIN_COMPLETE:
1152 ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2];
7c3df132
SK
1153 ql_log(ql_log_info, vha, 0x501a,
1154 "Alert 84XX: firmware version %x.\n",
1155 ha->cs84xx->op_fw_version);
4d4df193
HK
1156 break;
1157 case A84_DIAG_LOGIN_COMPLETE:
1158 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
7c3df132
SK
1159 ql_log(ql_log_info, vha, 0x501b,
1160 "Alert 84XX: diagnostic firmware version %x.\n",
1161 ha->cs84xx->diag_fw_version);
4d4df193
HK
1162 break;
1163 case A84_GOLD_LOGIN_COMPLETE:
1164 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
1165 ha->cs84xx->fw_update = 1;
7c3df132
SK
1166 ql_log(ql_log_info, vha, 0x501c,
1167 "Alert 84XX: gold firmware version %x.\n",
1168 ha->cs84xx->gold_fw_version);
4d4df193
HK
1169 break;
1170 default:
7c3df132
SK
1171 ql_log(ql_log_warn, vha, 0x501d,
1172 "Alert 84xx: Invalid Alert %04x %04x %04x.\n",
4d4df193
HK
1173 mb[1], mb[2], mb[3]);
1174 }
1175 spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags);
1176 break;
3a03eb79 1177 case MBA_DCBX_START:
7c3df132
SK
1178 ql_dbg(ql_dbg_async, vha, 0x501e,
1179 "DCBX Started -- %04x %04x %04x.\n",
1180 mb[1], mb[2], mb[3]);
3a03eb79
AV
1181 break;
1182 case MBA_DCBX_PARAM_UPDATE:
7c3df132
SK
1183 ql_dbg(ql_dbg_async, vha, 0x501f,
1184 "DCBX Parameters Updated -- %04x %04x %04x.\n",
1185 mb[1], mb[2], mb[3]);
3a03eb79
AV
1186 break;
1187 case MBA_FCF_CONF_ERR:
7c3df132
SK
1188 ql_dbg(ql_dbg_async, vha, 0x5020,
1189 "FCF Configuration Error -- %04x %04x %04x.\n",
1190 mb[1], mb[2], mb[3]);
3a03eb79 1191 break;
3a03eb79 1192 case MBA_IDC_NOTIFY:
7ec0effd 1193 if (IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
67b2a31f
CD
1194 mb[4] = RD_REG_WORD(&reg24->mailbox4);
1195 if (((mb[2] & 0x7fff) == MBC_PORT_RESET ||
1196 (mb[2] & 0x7fff) == MBC_SET_PORT_CONFIG) &&
1197 (mb[4] & INTERNAL_LOOPBACK_MASK) != 0) {
8fcd6b8b 1198 set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags);
67b2a31f
CD
1199 /*
1200 * Extend loop down timer since port is active.
1201 */
1202 if (atomic_read(&vha->loop_state) == LOOP_DOWN)
1203 atomic_set(&vha->loop_down_timer,
1204 LOOP_DOWN_TIME);
8fcd6b8b
CD
1205 qla2xxx_wake_dpc(vha);
1206 }
67b2a31f 1207 }
81881861 1208 /* fall through */
8fcd6b8b 1209 case MBA_IDC_COMPLETE:
9aaf2cea 1210 if (ha->notify_lb_portup_comp && !vha->vp_idx)
f356bef1
CD
1211 complete(&ha->lb_portup_comp);
1212 /* Fallthru */
3a03eb79 1213 case MBA_IDC_TIME_EXT:
7ec0effd
AD
1214 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) ||
1215 IS_QLA8044(ha))
7d613ac6
SV
1216 qla81xx_idc_event(vha, mb[0], mb[1]);
1217 break;
1218
1219 case MBA_IDC_AEN:
1220 mb[4] = RD_REG_WORD(&reg24->mailbox4);
1221 mb[5] = RD_REG_WORD(&reg24->mailbox5);
1222 mb[6] = RD_REG_WORD(&reg24->mailbox6);
1223 mb[7] = RD_REG_WORD(&reg24->mailbox7);
1224 qla83xx_handle_8200_aen(vha, mb);
3a03eb79 1225 break;
7d613ac6 1226
b5a340dd
JC
1227 case MBA_DPORT_DIAGNOSTICS:
1228 ql_dbg(ql_dbg_async, vha, 0x5052,
ef55e513 1229 "D-Port Diagnostics: %04x result=%s\n",
ec891462 1230 mb[0],
b5a340dd 1231 mb[1] == 0 ? "start" :
ef55e513
JC
1232 mb[1] == 1 ? "done (pass)" :
1233 mb[1] == 2 ? "done (error)" : "other");
b5a340dd
JC
1234 break;
1235
a29b3dd7
JC
1236 case MBA_TEMPERATURE_ALERT:
1237 ql_dbg(ql_dbg_async, vha, 0x505e,
1238 "TEMPERATURE ALERT: %04x %04x %04x\n", mb[1], mb[2], mb[3]);
1239 if (mb[1] == 0x12)
1240 schedule_work(&ha->board_disable);
1241 break;
1242
92d4408e
SC
1243 case MBA_TRANS_INSERT:
1244 ql_dbg(ql_dbg_async, vha, 0x5091,
1245 "Transceiver Insertion: %04x\n", mb[1]);
1246 break;
1247
6246b8a1
GM
1248 default:
1249 ql_dbg(ql_dbg_async, vha, 0x5057,
1250 "Unknown AEN:%04x %04x %04x %04x\n",
1251 mb[0], mb[1], mb[2], mb[3]);
1da177e4 1252 }
2c3dfe3f 1253
2d70c103
NB
1254 qlt_async_event(mb[0], vha, mb);
1255
e315cd28 1256 if (!vha->vp_idx && ha->num_vhosts)
73208dfd 1257 qla2x00_alert_all_vps(rsp, mb);
1da177e4
LT
1258}
1259
1260/**
1261 * qla2x00_process_completed_request() - Process a Fast Post response.
2db6228d
BVA
1262 * @vha: SCSI driver HA context
1263 * @req: request queue
1da177e4
LT
1264 * @index: SRB index
1265 */
8ae6d9c7 1266void
73208dfd 1267qla2x00_process_completed_request(struct scsi_qla_host *vha,
8ae6d9c7 1268 struct req_que *req, uint32_t index)
1da177e4
LT
1269{
1270 srb_t *sp;
e315cd28 1271 struct qla_hw_data *ha = vha->hw;
1da177e4
LT
1272
1273 /* Validate handle. */
8d93f550 1274 if (index >= req->num_outstanding_cmds) {
7c3df132
SK
1275 ql_log(ql_log_warn, vha, 0x3014,
1276 "Invalid SCSI command index (%x).\n", index);
1da177e4 1277
7ec0effd 1278 if (IS_P3P_TYPE(ha))
8f7daead
GM
1279 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1280 else
1281 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT
1282 return;
1283 }
1284
e315cd28 1285 sp = req->outstanding_cmds[index];
1da177e4
LT
1286 if (sp) {
1287 /* Free outstanding command slot. */
e315cd28 1288 req->outstanding_cmds[index] = NULL;
1da177e4 1289
1da177e4 1290 /* Save ISP completion status */
25ff6af1 1291 sp->done(sp, DID_OK << 16);
1da177e4 1292 } else {
7c3df132 1293 ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n");
1da177e4 1294
7ec0effd 1295 if (IS_P3P_TYPE(ha))
8f7daead
GM
1296 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1297 else
1298 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT
1299 }
1300}
1301
8ae6d9c7 1302srb_t *
ac280b67
AV
1303qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func,
1304 struct req_que *req, void *iocb)
1305{
1306 struct qla_hw_data *ha = vha->hw;
1307 sts_entry_t *pkt = iocb;
1308 srb_t *sp = NULL;
1309 uint16_t index;
1310
1311 index = LSW(pkt->handle);
8d93f550 1312 if (index >= req->num_outstanding_cmds) {
7c3df132 1313 ql_log(ql_log_warn, vha, 0x5031,
726b8548
QT
1314 "Invalid command index (%x) type %8ph.\n",
1315 index, iocb);
7ec0effd 1316 if (IS_P3P_TYPE(ha))
8f7daead
GM
1317 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1318 else
1319 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
ac280b67
AV
1320 goto done;
1321 }
1322 sp = req->outstanding_cmds[index];
1323 if (!sp) {
7c3df132
SK
1324 ql_log(ql_log_warn, vha, 0x5032,
1325 "Invalid completion handle (%x) -- timed-out.\n", index);
ac280b67
AV
1326 return sp;
1327 }
1328 if (sp->handle != index) {
7c3df132
SK
1329 ql_log(ql_log_warn, vha, 0x5033,
1330 "SRB handle (%x) mismatch %x.\n", sp->handle, index);
ac280b67
AV
1331 return NULL;
1332 }
9a069e19 1333
ac280b67 1334 req->outstanding_cmds[index] = NULL;
9a069e19 1335
ac280b67
AV
1336done:
1337 return sp;
1338}
1339
1340static void
1341qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1342 struct mbx_entry *mbx)
1343{
1344 const char func[] = "MBX-IOCB";
1345 const char *type;
ac280b67
AV
1346 fc_port_t *fcport;
1347 srb_t *sp;
4916392b 1348 struct srb_iocb *lio;
99b0bec7 1349 uint16_t *data;
5ff1d584 1350 uint16_t status;
ac280b67
AV
1351
1352 sp = qla2x00_get_sp_from_handle(vha, func, req, mbx);
1353 if (!sp)
1354 return;
1355
9ba56b95
GM
1356 lio = &sp->u.iocb_cmd;
1357 type = sp->name;
ac280b67 1358 fcport = sp->fcport;
4916392b 1359 data = lio->u.logio.data;
ac280b67 1360
5ff1d584 1361 data[0] = MBS_COMMAND_ERROR;
4916392b 1362 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
5ff1d584 1363 QLA_LOGIO_LOGIN_RETRIED : 0;
ac280b67 1364 if (mbx->entry_status) {
7c3df132 1365 ql_dbg(ql_dbg_async, vha, 0x5043,
cfb0919c 1366 "Async-%s error entry - hdl=%x portid=%02x%02x%02x "
d3fa9e7d 1367 "entry-status=%x status=%x state-flag=%x "
cfb0919c
CD
1368 "status-flags=%x.\n", type, sp->handle,
1369 fcport->d_id.b.domain, fcport->d_id.b.area,
d3fa9e7d
AV
1370 fcport->d_id.b.al_pa, mbx->entry_status,
1371 le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags),
7c3df132 1372 le16_to_cpu(mbx->status_flags));
d3fa9e7d 1373
cfb0919c 1374 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5029,
7c3df132 1375 (uint8_t *)mbx, sizeof(*mbx));
ac280b67 1376
99b0bec7 1377 goto logio_done;
ac280b67
AV
1378 }
1379
5ff1d584 1380 status = le16_to_cpu(mbx->status);
9ba56b95 1381 if (status == 0x30 && sp->type == SRB_LOGIN_CMD &&
5ff1d584
AV
1382 le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE)
1383 status = 0;
1384 if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) {
7c3df132 1385 ql_dbg(ql_dbg_async, vha, 0x5045,
cfb0919c
CD
1386 "Async-%s complete - hdl=%x portid=%02x%02x%02x mbx1=%x.\n",
1387 type, sp->handle, fcport->d_id.b.domain,
1388 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1389 le16_to_cpu(mbx->mb1));
ac280b67
AV
1390
1391 data[0] = MBS_COMMAND_COMPLETE;
9ba56b95 1392 if (sp->type == SRB_LOGIN_CMD) {
99b0bec7
AV
1393 fcport->port_type = FCT_TARGET;
1394 if (le16_to_cpu(mbx->mb1) & BIT_0)
1395 fcport->port_type = FCT_INITIATOR;
6ac52608 1396 else if (le16_to_cpu(mbx->mb1) & BIT_1)
99b0bec7 1397 fcport->flags |= FCF_FCP2_DEVICE;
5ff1d584 1398 }
99b0bec7 1399 goto logio_done;
ac280b67
AV
1400 }
1401
1402 data[0] = le16_to_cpu(mbx->mb0);
1403 switch (data[0]) {
1404 case MBS_PORT_ID_USED:
1405 data[1] = le16_to_cpu(mbx->mb1);
1406 break;
1407 case MBS_LOOP_ID_USED:
1408 break;
1409 default:
1410 data[0] = MBS_COMMAND_ERROR;
ac280b67
AV
1411 break;
1412 }
1413
7c3df132 1414 ql_log(ql_log_warn, vha, 0x5046,
cfb0919c
CD
1415 "Async-%s failed - hdl=%x portid=%02x%02x%02x status=%x "
1416 "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n", type, sp->handle,
1417 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
1418 status, le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1),
ac280b67 1419 le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6),
7c3df132 1420 le16_to_cpu(mbx->mb7));
ac280b67 1421
99b0bec7 1422logio_done:
25ff6af1 1423 sp->done(sp, 0);
ac280b67
AV
1424}
1425
726b8548
QT
1426static void
1427qla24xx_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1428 struct mbx_24xx_entry *pkt)
1429{
1430 const char func[] = "MBX-IOCB2";
1431 srb_t *sp;
1432 struct srb_iocb *si;
1433 u16 sz, i;
1434 int res;
1435
1436 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1437 if (!sp)
1438 return;
1439
1440 si = &sp->u.iocb_cmd;
1441 sz = min(ARRAY_SIZE(pkt->mb), ARRAY_SIZE(sp->u.iocb_cmd.u.mbx.in_mb));
1442
1443 for (i = 0; i < sz; i++)
1444 si->u.mbx.in_mb[i] = le16_to_cpu(pkt->mb[i]);
1445
1446 res = (si->u.mbx.in_mb[0] & MBS_MASK);
1447
25ff6af1 1448 sp->done(sp, res);
726b8548
QT
1449}
1450
1451static void
1452qla24xxx_nack_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1453 struct nack_to_isp *pkt)
1454{
1455 const char func[] = "nack";
1456 srb_t *sp;
1457 int res = 0;
1458
1459 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1460 if (!sp)
1461 return;
1462
1463 if (pkt->u.isp2x.status != cpu_to_le16(NOTIFY_ACK_SUCCESS))
1464 res = QLA_FUNCTION_FAILED;
1465
25ff6af1 1466 sp->done(sp, res);
ac280b67
AV
1467}
1468
9bc4f4fb
HZ
1469static void
1470qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1471 sts_entry_t *pkt, int iocb_type)
1472{
1473 const char func[] = "CT_IOCB";
1474 const char *type;
9bc4f4fb 1475 srb_t *sp;
75cc8cfc 1476 struct bsg_job *bsg_job;
01e0e15c 1477 struct fc_bsg_reply *bsg_reply;
9bc4f4fb 1478 uint16_t comp_status;
726b8548 1479 int res = 0;
9bc4f4fb
HZ
1480
1481 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1482 if (!sp)
1483 return;
1484
726b8548
QT
1485 switch (sp->type) {
1486 case SRB_CT_CMD:
1487 bsg_job = sp->u.bsg_job;
1488 bsg_reply = bsg_job->reply;
1489
1490 type = "ct pass-through";
1491
1492 comp_status = le16_to_cpu(pkt->comp_status);
1493
1494 /*
1495 * return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
1496 * fc payload to the caller
1497 */
1498 bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
1499 bsg_job->reply_len = sizeof(struct fc_bsg_reply);
1500
1501 if (comp_status != CS_COMPLETE) {
1502 if (comp_status == CS_DATA_UNDERRUN) {
1503 res = DID_OK << 16;
1504 bsg_reply->reply_payload_rcv_len =
1505 le16_to_cpu(((sts_entry_t *)pkt)->rsp_info_len);
1506
1507 ql_log(ql_log_warn, vha, 0x5048,
1508 "CT pass-through-%s error comp_status=0x%x total_byte=0x%x.\n",
1509 type, comp_status,
1510 bsg_reply->reply_payload_rcv_len);
1511 } else {
1512 ql_log(ql_log_warn, vha, 0x5049,
1513 "CT pass-through-%s error comp_status=0x%x.\n",
1514 type, comp_status);
1515 res = DID_ERROR << 16;
1516 bsg_reply->reply_payload_rcv_len = 0;
1517 }
1518 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5035,
1519 (uint8_t *)pkt, sizeof(*pkt));
1520 } else {
1521 res = DID_OK << 16;
1522 bsg_reply->reply_payload_rcv_len =
1523 bsg_job->reply_payload.payload_len;
1524 bsg_job->reply_len = 0;
1525 }
1526 break;
1527 case SRB_CT_PTHRU_CMD:
1528 /*
1529 * borrowing sts_entry_24xx.comp_status.
1530 * same location as ct_entry_24xx.comp_status
1531 */
1532 res = qla2x00_chk_ms_status(vha, (ms_iocb_entry_t *)pkt,
1533 (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp,
1534 sp->name);
1535 break;
9bc4f4fb
HZ
1536 }
1537
25ff6af1 1538 sp->done(sp, res);
9bc4f4fb
HZ
1539}
1540
9a069e19
GM
1541static void
1542qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1543 struct sts_entry_24xx *pkt, int iocb_type)
1544{
1545 const char func[] = "ELS_CT_IOCB";
1546 const char *type;
9a069e19 1547 srb_t *sp;
75cc8cfc 1548 struct bsg_job *bsg_job;
01e0e15c 1549 struct fc_bsg_reply *bsg_reply;
9a069e19
GM
1550 uint16_t comp_status;
1551 uint32_t fw_status[3];
9ba56b95 1552 int res;
edd05de1 1553 struct srb_iocb *els;
9a069e19
GM
1554
1555 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1556 if (!sp)
1557 return;
9a069e19
GM
1558
1559 type = NULL;
9ba56b95 1560 switch (sp->type) {
9a069e19
GM
1561 case SRB_ELS_CMD_RPT:
1562 case SRB_ELS_CMD_HST:
1563 type = "els";
1564 break;
1565 case SRB_CT_CMD:
1566 type = "ct pass-through";
1567 break;
6eb54715
HM
1568 case SRB_ELS_DCMD:
1569 type = "Driver ELS logo";
edd05de1
DG
1570 if (iocb_type != ELS_IOCB_TYPE) {
1571 ql_dbg(ql_dbg_user, vha, 0x5047,
1572 "Completing %s: (%p) type=%d.\n",
1573 type, sp, sp->type);
1574 sp->done(sp, 0);
1575 return;
1576 }
1577 break;
726b8548
QT
1578 case SRB_CT_PTHRU_CMD:
1579 /* borrowing sts_entry_24xx.comp_status.
1580 same location as ct_entry_24xx.comp_status
1581 */
2d73ac61 1582 res = qla2x00_chk_ms_status(sp->vha, (ms_iocb_entry_t *)pkt,
726b8548
QT
1583 (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp,
1584 sp->name);
25ff6af1 1585 sp->done(sp, res);
6eb54715 1586 return;
9a069e19 1587 default:
37fed3ee 1588 ql_dbg(ql_dbg_user, vha, 0x503e,
9ba56b95 1589 "Unrecognized SRB: (%p) type=%d.\n", sp, sp->type);
9a069e19
GM
1590 return;
1591 }
1592
1593 comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status);
1594 fw_status[1] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_1);
1595 fw_status[2] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_2);
1596
edd05de1
DG
1597 if (iocb_type == ELS_IOCB_TYPE) {
1598 els = &sp->u.iocb_cmd;
1599 els->u.els_plogi.fw_status[0] = fw_status[0];
1600 els->u.els_plogi.fw_status[1] = fw_status[1];
1601 els->u.els_plogi.fw_status[2] = fw_status[2];
1602 els->u.els_plogi.comp_status = fw_status[0];
1603 if (comp_status == CS_COMPLETE) {
1604 res = DID_OK << 16;
1605 } else {
1606 if (comp_status == CS_DATA_UNDERRUN) {
1607 res = DID_OK << 16;
1608 els->u.els_plogi.len =
1609 le16_to_cpu(((struct els_sts_entry_24xx *)
1610 pkt)->total_byte_count);
1611 } else {
1612 els->u.els_plogi.len = 0;
1613 res = DID_ERROR << 16;
1614 }
1615 }
1616 ql_log(ql_log_info, vha, 0x503f,
1617 "ELS IOCB Done -%s error hdl=%x comp_status=0x%x error subcode 1=0x%x error subcode 2=0x%x total_byte=0x%x\n",
1618 type, sp->handle, comp_status, fw_status[1], fw_status[2],
1619 le16_to_cpu(((struct els_sts_entry_24xx *)
1620 pkt)->total_byte_count));
1621 goto els_ct_done;
1622 }
1623
9a069e19
GM
1624 /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
1625 * fc payload to the caller
1626 */
a1730595
DG
1627 bsg_job = sp->u.bsg_job;
1628 bsg_reply = bsg_job->reply;
01e0e15c 1629 bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
9a069e19
GM
1630 bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status);
1631
1632 if (comp_status != CS_COMPLETE) {
1633 if (comp_status == CS_DATA_UNDERRUN) {
9ba56b95 1634 res = DID_OK << 16;
01e0e15c 1635 bsg_reply->reply_payload_rcv_len =
9ba56b95 1636 le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->total_byte_count);
9a069e19 1637
37fed3ee 1638 ql_dbg(ql_dbg_user, vha, 0x503f,
cfb0919c 1639 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
9a069e19 1640 "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n",
cfb0919c 1641 type, sp->handle, comp_status, fw_status[1], fw_status[2],
7c3df132
SK
1642 le16_to_cpu(((struct els_sts_entry_24xx *)
1643 pkt)->total_byte_count));
05231a3b 1644 } else {
37fed3ee 1645 ql_dbg(ql_dbg_user, vha, 0x5040,
cfb0919c 1646 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
9a069e19 1647 "error subcode 1=0x%x error subcode 2=0x%x.\n",
cfb0919c 1648 type, sp->handle, comp_status,
7c3df132
SK
1649 le16_to_cpu(((struct els_sts_entry_24xx *)
1650 pkt)->error_subcode_1),
1651 le16_to_cpu(((struct els_sts_entry_24xx *)
1652 pkt)->error_subcode_2));
9ba56b95 1653 res = DID_ERROR << 16;
01e0e15c 1654 bsg_reply->reply_payload_rcv_len = 0;
9a069e19 1655 }
05231a3b
CH
1656 memcpy(bsg_job->reply + sizeof(struct fc_bsg_reply),
1657 fw_status, sizeof(fw_status));
37fed3ee 1658 ql_dump_buffer(ql_dbg_user + ql_dbg_buffer, vha, 0x5056,
7c3df132 1659 (uint8_t *)pkt, sizeof(*pkt));
9a069e19
GM
1660 }
1661 else {
9ba56b95 1662 res = DID_OK << 16;
01e0e15c 1663 bsg_reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len;
9a069e19
GM
1664 bsg_job->reply_len = 0;
1665 }
edd05de1 1666els_ct_done:
9a069e19 1667
25ff6af1 1668 sp->done(sp, res);
9a069e19
GM
1669}
1670
ac280b67
AV
1671static void
1672qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req,
1673 struct logio_entry_24xx *logio)
1674{
1675 const char func[] = "LOGIO-IOCB";
1676 const char *type;
ac280b67
AV
1677 fc_port_t *fcport;
1678 srb_t *sp;
4916392b 1679 struct srb_iocb *lio;
99b0bec7 1680 uint16_t *data;
ac280b67
AV
1681 uint32_t iop[2];
1682
1683 sp = qla2x00_get_sp_from_handle(vha, func, req, logio);
1684 if (!sp)
1685 return;
1686
9ba56b95
GM
1687 lio = &sp->u.iocb_cmd;
1688 type = sp->name;
ac280b67 1689 fcport = sp->fcport;
4916392b 1690 data = lio->u.logio.data;
ac280b67 1691
5ff1d584 1692 data[0] = MBS_COMMAND_ERROR;
4916392b 1693 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
5ff1d584 1694 QLA_LOGIO_LOGIN_RETRIED : 0;
ac280b67 1695 if (logio->entry_status) {
5e19ed90 1696 ql_log(ql_log_warn, fcport->vha, 0x5034,
5b33469a 1697 "Async-%s error entry - %8phC hdl=%x"
d3fa9e7d 1698 "portid=%02x%02x%02x entry-status=%x.\n",
5b33469a 1699 type, fcport->port_name, sp->handle, fcport->d_id.b.domain,
cfb0919c
CD
1700 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1701 logio->entry_status);
1702 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d,
7c3df132 1703 (uint8_t *)logio, sizeof(*logio));
ac280b67 1704
99b0bec7 1705 goto logio_done;
ac280b67
AV
1706 }
1707
1708 if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) {
5e19ed90 1709 ql_dbg(ql_dbg_async, fcport->vha, 0x5036,
5b33469a
QT
1710 "Async-%s complete - %8phC hdl=%x portid=%02x%02x%02x "
1711 "iop0=%x.\n", type, fcport->port_name, sp->handle,
1712 fcport->d_id.b.domain,
cfb0919c 1713 fcport->d_id.b.area, fcport->d_id.b.al_pa,
7c3df132 1714 le32_to_cpu(logio->io_parameter[0]));
ac280b67 1715
ead03855 1716 vha->hw->exch_starvation = 0;
ac280b67 1717 data[0] = MBS_COMMAND_COMPLETE;
03aaa89f
DT
1718
1719 if (sp->type == SRB_PRLI_CMD) {
1720 lio->u.logio.iop[0] =
1721 le32_to_cpu(logio->io_parameter[0]);
1722 lio->u.logio.iop[1] =
1723 le32_to_cpu(logio->io_parameter[1]);
1724 goto logio_done;
1725 }
1726
9ba56b95 1727 if (sp->type != SRB_LOGIN_CMD)
99b0bec7 1728 goto logio_done;
ac280b67
AV
1729
1730 iop[0] = le32_to_cpu(logio->io_parameter[0]);
1731 if (iop[0] & BIT_4) {
1732 fcport->port_type = FCT_TARGET;
1733 if (iop[0] & BIT_8)
8474f3a0 1734 fcport->flags |= FCF_FCP2_DEVICE;
b0cd579c 1735 } else if (iop[0] & BIT_5)
ac280b67 1736 fcport->port_type = FCT_INITIATOR;
b0cd579c 1737
2d70c103
NB
1738 if (iop[0] & BIT_7)
1739 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
1740
ac280b67
AV
1741 if (logio->io_parameter[7] || logio->io_parameter[8])
1742 fcport->supported_classes |= FC_COS_CLASS2;
1743 if (logio->io_parameter[9] || logio->io_parameter[10])
1744 fcport->supported_classes |= FC_COS_CLASS3;
1745
99b0bec7 1746 goto logio_done;
ac280b67
AV
1747 }
1748
1749 iop[0] = le32_to_cpu(logio->io_parameter[0]);
1750 iop[1] = le32_to_cpu(logio->io_parameter[1]);
726b8548
QT
1751 lio->u.logio.iop[0] = iop[0];
1752 lio->u.logio.iop[1] = iop[1];
ac280b67
AV
1753 switch (iop[0]) {
1754 case LSC_SCODE_PORTID_USED:
1755 data[0] = MBS_PORT_ID_USED;
1756 data[1] = LSW(iop[1]);
1757 break;
1758 case LSC_SCODE_NPORT_USED:
1759 data[0] = MBS_LOOP_ID_USED;
1760 break;
5b33469a
QT
1761 case LSC_SCODE_CMD_FAILED:
1762 if (iop[1] == 0x0606) {
1763 /*
1764 * PLOGI/PRLI Completed. We must have Recv PLOGI/PRLI,
1765 * Target side acked.
1766 */
1767 data[0] = MBS_COMMAND_COMPLETE;
1768 goto logio_done;
1769 }
1770 data[0] = MBS_COMMAND_ERROR;
1771 break;
ead03855
QT
1772 case LSC_SCODE_NOXCB:
1773 vha->hw->exch_starvation++;
1774 if (vha->hw->exch_starvation > 5) {
83548fe2 1775 ql_log(ql_log_warn, vha, 0xd046,
ead03855
QT
1776 "Exchange starvation. Resetting RISC\n");
1777
1778 vha->hw->exch_starvation = 0;
1779
1780 if (IS_P3P_TYPE(vha->hw))
1781 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1782 else
1783 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1784 qla2xxx_wake_dpc(vha);
1785 }
81881861 1786 /* fall through */
ac280b67
AV
1787 default:
1788 data[0] = MBS_COMMAND_ERROR;
ac280b67
AV
1789 break;
1790 }
1791
5e19ed90 1792 ql_dbg(ql_dbg_async, fcport->vha, 0x5037,
5b33469a
QT
1793 "Async-%s failed - %8phC hdl=%x portid=%02x%02x%02x comp=%x "
1794 "iop0=%x iop1=%x.\n", type, fcport->port_name,
1795 sp->handle, fcport->d_id.b.domain,
d3fa9e7d 1796 fcport->d_id.b.area, fcport->d_id.b.al_pa,
ac280b67
AV
1797 le16_to_cpu(logio->comp_status),
1798 le32_to_cpu(logio->io_parameter[0]),
7c3df132 1799 le32_to_cpu(logio->io_parameter[1]));
ac280b67 1800
99b0bec7 1801logio_done:
25ff6af1 1802 sp->done(sp, 0);
ac280b67
AV
1803}
1804
3822263e 1805static void
faef62d1 1806qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, void *tsk)
3822263e
MI
1807{
1808 const char func[] = "TMF-IOCB";
1809 const char *type;
1810 fc_port_t *fcport;
1811 srb_t *sp;
1812 struct srb_iocb *iocb;
3822263e 1813 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
3822263e
MI
1814
1815 sp = qla2x00_get_sp_from_handle(vha, func, req, tsk);
1816 if (!sp)
1817 return;
1818
9ba56b95
GM
1819 iocb = &sp->u.iocb_cmd;
1820 type = sp->name;
3822263e 1821 fcport = sp->fcport;
faef62d1 1822 iocb->u.tmf.data = QLA_SUCCESS;
3822263e
MI
1823
1824 if (sts->entry_status) {
5e19ed90 1825 ql_log(ql_log_warn, fcport->vha, 0x5038,
cfb0919c
CD
1826 "Async-%s error - hdl=%x entry-status(%x).\n",
1827 type, sp->handle, sts->entry_status);
faef62d1 1828 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
ad950360 1829 } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) {
5e19ed90 1830 ql_log(ql_log_warn, fcport->vha, 0x5039,
cfb0919c
CD
1831 "Async-%s error - hdl=%x completion status(%x).\n",
1832 type, sp->handle, sts->comp_status);
faef62d1
AB
1833 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
1834 } else if ((le16_to_cpu(sts->scsi_status) &
3822263e 1835 SS_RESPONSE_INFO_LEN_VALID)) {
faef62d1
AB
1836 if (le32_to_cpu(sts->rsp_data_len) < 4) {
1837 ql_log(ql_log_warn, fcport->vha, 0x503b,
1838 "Async-%s error - hdl=%x not enough response(%d).\n",
1839 type, sp->handle, sts->rsp_data_len);
1840 } else if (sts->data[3]) {
1841 ql_log(ql_log_warn, fcport->vha, 0x503c,
1842 "Async-%s error - hdl=%x response(%x).\n",
1843 type, sp->handle, sts->data[3]);
8d2b21db 1844 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
faef62d1 1845 }
3822263e
MI
1846 }
1847
faef62d1 1848 if (iocb->u.tmf.data != QLA_SUCCESS)
7c3df132
SK
1849 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5055,
1850 (uint8_t *)sts, sizeof(*sts));
3822263e 1851
25ff6af1 1852 sp->done(sp, 0);
3822263e
MI
1853}
1854
60dd6e8e
DT
1855static void qla24xx_nvme_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1856 void *tsk, srb_t *sp)
7401bc18 1857{
7401bc18 1858 fc_port_t *fcport;
7401bc18
DG
1859 struct srb_iocb *iocb;
1860 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
1861 uint16_t state_flags;
1862 struct nvmefc_fcp_req *fd;
4072e1dc
DT
1863 uint16_t ret = QLA_SUCCESS;
1864 uint16_t comp_status = le16_to_cpu(sts->comp_status);
7401bc18
DG
1865
1866 iocb = &sp->u.iocb_cmd;
1867 fcport = sp->fcport;
4072e1dc 1868 iocb->u.nvme.comp_status = comp_status;
7401bc18
DG
1869 state_flags = le16_to_cpu(sts->state_flags);
1870 fd = iocb->u.nvme.desc;
7401bc18 1871
60dd6e8e 1872 if (unlikely(iocb->u.nvme.aen_op))
deeae7a6 1873 atomic_dec(&sp->vha->hw->nvme_active_aen_cnt);
7401bc18
DG
1874
1875 /*
1876 * State flags: Bit 6 and 0.
1877 * If 0 is set, we don't care about 6.
1878 * both cases resp was dma'd to host buffer
1879 * if both are 0, that is good path case.
1880 * if six is set and 0 is clear, we need to
1881 * copy resp data from status iocb to resp buffer.
1882 */
1883 if (!(state_flags & (SF_FCP_RSP_DMA | SF_NVME_ERSP))) {
1884 iocb->u.nvme.rsp_pyld_len = 0;
1885 } else if ((state_flags & SF_FCP_RSP_DMA)) {
1886 iocb->u.nvme.rsp_pyld_len = le16_to_cpu(sts->nvme_rsp_pyld_len);
1887 } else if (state_flags & SF_NVME_ERSP) {
1888 uint32_t *inbuf, *outbuf;
1889 uint16_t iter;
1890
1891 inbuf = (uint32_t *)&sts->nvme_ersp_data;
1892 outbuf = (uint32_t *)fd->rspaddr;
1893 iocb->u.nvme.rsp_pyld_len = le16_to_cpu(sts->nvme_rsp_pyld_len);
1894 iter = iocb->u.nvme.rsp_pyld_len >> 2;
1895 for (; iter; iter--)
1896 *outbuf++ = swab32(*inbuf++);
1897 } else { /* unhandled case */
1898 ql_log(ql_log_warn, fcport->vha, 0x503a,
1899 "NVME-%s error. Unhandled state_flags of %x\n",
1900 sp->name, state_flags);
1901 }
1902
1903 fd->transferred_length = fd->payload_length -
1904 le32_to_cpu(sts->residual_len);
1905
4072e1dc
DT
1906 if (unlikely(comp_status != CS_COMPLETE))
1907 ql_log(ql_log_warn, fcport->vha, 0x5060,
1908 "NVME-%s ERR Handling - hdl=%x status(%x) tr_len:%x resid=%x ox_id=%x\n",
1909 sp->name, sp->handle, comp_status,
1910 fd->transferred_length, le32_to_cpu(sts->residual_len),
1911 sts->ox_id);
1912
1913 /*
1914 * If transport error then Failure (HBA rejects request)
1915 * otherwise transport will handle.
1916 */
1917 switch (comp_status) {
60dd6e8e 1918 case CS_COMPLETE:
60dd6e8e 1919 break;
4072e1dc 1920
60dd6e8e
DT
1921 case CS_RESET:
1922 case CS_PORT_UNAVAILABLE:
1923 case CS_PORT_LOGGED_OUT:
4072e1dc
DT
1924 fcport->nvme_flag |= NVME_FLAG_RESETTING;
1925 /* fall through */
1926 case CS_ABORTED:
60dd6e8e 1927 case CS_PORT_BUSY:
60dd6e8e
DT
1928 fd->transferred_length = 0;
1929 iocb->u.nvme.rsp_pyld_len = 0;
1930 ret = QLA_ABORTED;
1931 break;
4072e1dc
DT
1932 case CS_DATA_UNDERRUN:
1933 break;
60dd6e8e 1934 default:
7401bc18 1935 ret = QLA_FUNCTION_FAILED;
60dd6e8e 1936 break;
7401bc18
DG
1937 }
1938 sp->done(sp, ret);
1939}
1940
2853192e
QT
1941static void qla_ctrlvp_completed(scsi_qla_host_t *vha, struct req_que *req,
1942 struct vp_ctrl_entry_24xx *vce)
1943{
1944 const char func[] = "CTRLVP-IOCB";
1945 srb_t *sp;
1946 int rval = QLA_SUCCESS;
1947
1948 sp = qla2x00_get_sp_from_handle(vha, func, req, vce);
1949 if (!sp)
1950 return;
1951
1952 if (vce->entry_status != 0) {
1953 ql_dbg(ql_dbg_vport, vha, 0x10c4,
1954 "%s: Failed to complete IOCB -- error status (%x)\n",
1955 sp->name, vce->entry_status);
1956 rval = QLA_FUNCTION_FAILED;
1957 } else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) {
1958 ql_dbg(ql_dbg_vport, vha, 0x10c5,
1959 "%s: Failed to complete IOCB -- completion status (%x) vpidx %x\n",
1960 sp->name, le16_to_cpu(vce->comp_status),
1961 le16_to_cpu(vce->vp_idx_failed));
1962 rval = QLA_FUNCTION_FAILED;
1963 } else {
1964 ql_dbg(ql_dbg_vport, vha, 0x10c6,
1965 "Done %s.\n", __func__);
1966 }
1967
1968 sp->rc = rval;
1969 sp->done(sp, rval);
1970}
1971
1da177e4
LT
1972/**
1973 * qla2x00_process_response_queue() - Process response queue entries.
2db6228d 1974 * @rsp: response queue
1da177e4
LT
1975 */
1976void
73208dfd 1977qla2x00_process_response_queue(struct rsp_que *rsp)
1da177e4 1978{
73208dfd
AC
1979 struct scsi_qla_host *vha;
1980 struct qla_hw_data *ha = rsp->hw;
3d71644c 1981 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4
LT
1982 sts_entry_t *pkt;
1983 uint16_t handle_cnt;
1984 uint16_t cnt;
73208dfd 1985
2afa19a9 1986 vha = pci_get_drvdata(ha->pdev);
1da177e4 1987
e315cd28 1988 if (!vha->flags.online)
1da177e4
LT
1989 return;
1990
e315cd28
AC
1991 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
1992 pkt = (sts_entry_t *)rsp->ring_ptr;
1da177e4 1993
e315cd28
AC
1994 rsp->ring_index++;
1995 if (rsp->ring_index == rsp->length) {
1996 rsp->ring_index = 0;
1997 rsp->ring_ptr = rsp->ring;
1da177e4 1998 } else {
e315cd28 1999 rsp->ring_ptr++;
1da177e4
LT
2000 }
2001
2002 if (pkt->entry_status != 0) {
73208dfd 2003 qla2x00_error_entry(vha, rsp, pkt);
1da177e4
LT
2004 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2005 wmb();
2006 continue;
2007 }
2008
2009 switch (pkt->entry_type) {
2010 case STATUS_TYPE:
73208dfd 2011 qla2x00_status_entry(vha, rsp, pkt);
1da177e4
LT
2012 break;
2013 case STATUS_TYPE_21:
2014 handle_cnt = ((sts21_entry_t *)pkt)->handle_count;
2015 for (cnt = 0; cnt < handle_cnt; cnt++) {
73208dfd 2016 qla2x00_process_completed_request(vha, rsp->req,
1da177e4
LT
2017 ((sts21_entry_t *)pkt)->handle[cnt]);
2018 }
2019 break;
2020 case STATUS_TYPE_22:
2021 handle_cnt = ((sts22_entry_t *)pkt)->handle_count;
2022 for (cnt = 0; cnt < handle_cnt; cnt++) {
73208dfd 2023 qla2x00_process_completed_request(vha, rsp->req,
1da177e4
LT
2024 ((sts22_entry_t *)pkt)->handle[cnt]);
2025 }
2026 break;
2027 case STATUS_CONT_TYPE:
2afa19a9 2028 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
1da177e4 2029 break;
ac280b67
AV
2030 case MBX_IOCB_TYPE:
2031 qla2x00_mbx_iocb_entry(vha, rsp->req,
2032 (struct mbx_entry *)pkt);
3822263e 2033 break;
9bc4f4fb
HZ
2034 case CT_IOCB_TYPE:
2035 qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
2036 break;
1da177e4
LT
2037 default:
2038 /* Type Not Supported. */
7c3df132
SK
2039 ql_log(ql_log_warn, vha, 0x504a,
2040 "Received unknown response pkt type %x "
1da177e4 2041 "entry status=%x.\n",
7c3df132 2042 pkt->entry_type, pkt->entry_status);
1da177e4
LT
2043 break;
2044 }
2045 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2046 wmb();
2047 }
2048
2049 /* Adjust ring index */
e315cd28 2050 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index);
1da177e4
LT
2051}
2052
4733fcb1 2053static inline void
5544213b 2054qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
9ba56b95 2055 uint32_t sense_len, struct rsp_que *rsp, int res)
4733fcb1 2056{
25ff6af1 2057 struct scsi_qla_host *vha = sp->vha;
9ba56b95
GM
2058 struct scsi_cmnd *cp = GET_CMD_SP(sp);
2059 uint32_t track_sense_len;
4733fcb1
AV
2060
2061 if (sense_len >= SCSI_SENSE_BUFFERSIZE)
2062 sense_len = SCSI_SENSE_BUFFERSIZE;
2063
9ba56b95
GM
2064 SET_CMD_SENSE_LEN(sp, sense_len);
2065 SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
2066 track_sense_len = sense_len;
2067
2068 if (sense_len > par_sense_len)
5544213b 2069 sense_len = par_sense_len;
4733fcb1
AV
2070
2071 memcpy(cp->sense_buffer, sense_data, sense_len);
2072
9ba56b95
GM
2073 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
2074 track_sense_len -= sense_len;
2075 SET_CMD_SENSE_LEN(sp, track_sense_len);
2076
2077 if (track_sense_len != 0) {
2afa19a9 2078 rsp->status_srb = sp;
9ba56b95
GM
2079 cp->result = res;
2080 }
4733fcb1 2081
cfb0919c
CD
2082 if (sense_len) {
2083 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x301c,
9cb78c16 2084 "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n",
25ff6af1 2085 sp->vha->host_no, cp->device->id, cp->device->lun,
cfb0919c 2086 cp);
7c3df132
SK
2087 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b,
2088 cp->sense_buffer, sense_len);
cfb0919c 2089 }
4733fcb1
AV
2090}
2091
bad75002
AE
2092struct scsi_dif_tuple {
2093 __be16 guard; /* Checksum */
d6a03581 2094 __be16 app_tag; /* APPL identifier */
bad75002
AE
2095 __be32 ref_tag; /* Target LBA or indirect LBA */
2096};
2097
2098/*
2099 * Checks the guard or meta-data for the type of error
2100 * detected by the HBA. In case of errors, we set the
2101 * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST
2102 * to indicate to the kernel that the HBA detected error.
2103 */
8cb2049c 2104static inline int
bad75002
AE
2105qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24)
2106{
25ff6af1 2107 struct scsi_qla_host *vha = sp->vha;
9ba56b95 2108 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
8cb2049c
AE
2109 uint8_t *ap = &sts24->data[12];
2110 uint8_t *ep = &sts24->data[20];
bad75002
AE
2111 uint32_t e_ref_tag, a_ref_tag;
2112 uint16_t e_app_tag, a_app_tag;
2113 uint16_t e_guard, a_guard;
2114
8cb2049c
AE
2115 /*
2116 * swab32 of the "data" field in the beginning of qla2x00_status_entry()
2117 * would make guard field appear at offset 2
2118 */
2119 a_guard = le16_to_cpu(*(uint16_t *)(ap + 2));
2120 a_app_tag = le16_to_cpu(*(uint16_t *)(ap + 0));
2121 a_ref_tag = le32_to_cpu(*(uint32_t *)(ap + 4));
2122 e_guard = le16_to_cpu(*(uint16_t *)(ep + 2));
2123 e_app_tag = le16_to_cpu(*(uint16_t *)(ep + 0));
2124 e_ref_tag = le32_to_cpu(*(uint32_t *)(ep + 4));
bad75002 2125
7c3df132
SK
2126 ql_dbg(ql_dbg_io, vha, 0x3023,
2127 "iocb(s) %p Returned STATUS.\n", sts24);
bad75002 2128
7c3df132
SK
2129 ql_dbg(ql_dbg_io, vha, 0x3024,
2130 "DIF ERROR in cmd 0x%x lba 0x%llx act ref"
bad75002 2131 " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app"
7c3df132 2132 " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n",
bad75002 2133 cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag,
7c3df132 2134 a_app_tag, e_app_tag, a_guard, e_guard);
bad75002 2135
8cb2049c
AE
2136 /*
2137 * Ignore sector if:
2138 * For type 3: ref & app tag is all 'f's
2139 * For type 0,1,2: app tag is all 'f's
2140 */
128b6f9f 2141 if ((a_app_tag == T10_PI_APP_ESCAPE) &&
8cb2049c 2142 ((scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3) ||
128b6f9f 2143 (a_ref_tag == T10_PI_REF_ESCAPE))) {
8cb2049c
AE
2144 uint32_t blocks_done, resid;
2145 sector_t lba_s = scsi_get_lba(cmd);
2146
2147 /* 2TB boundary case covered automatically with this */
2148 blocks_done = e_ref_tag - (uint32_t)lba_s + 1;
2149
2150 resid = scsi_bufflen(cmd) - (blocks_done *
2151 cmd->device->sector_size);
2152
2153 scsi_set_resid(cmd, resid);
2154 cmd->result = DID_OK << 16;
2155
2156 /* Update protection tag */
2157 if (scsi_prot_sg_count(cmd)) {
2158 uint32_t i, j = 0, k = 0, num_ent;
2159 struct scatterlist *sg;
27c0e83b 2160 struct t10_pi_tuple *spt;
8cb2049c
AE
2161
2162 /* Patch the corresponding protection tags */
2163 scsi_for_each_prot_sg(cmd, sg,
2164 scsi_prot_sg_count(cmd), i) {
2165 num_ent = sg_dma_len(sg) / 8;
2166 if (k + num_ent < blocks_done) {
2167 k += num_ent;
2168 continue;
2169 }
2170 j = blocks_done - k - 1;
2171 k = blocks_done;
2172 break;
2173 }
2174
2175 if (k != blocks_done) {
cfb0919c 2176 ql_log(ql_log_warn, vha, 0x302f,
8ec9c7fb
RD
2177 "unexpected tag values tag:lba=%x:%llx)\n",
2178 e_ref_tag, (unsigned long long)lba_s);
8cb2049c
AE
2179 return 1;
2180 }
2181
2182 spt = page_address(sg_page(sg)) + sg->offset;
2183 spt += j;
2184
128b6f9f 2185 spt->app_tag = T10_PI_APP_ESCAPE;
8cb2049c 2186 if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3)
128b6f9f 2187 spt->ref_tag = T10_PI_REF_ESCAPE;
8cb2049c
AE
2188 }
2189
2190 return 0;
2191 }
2192
bad75002
AE
2193 /* check guard */
2194 if (e_guard != a_guard) {
2195 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
2196 0x10, 0x1);
2197 set_driver_byte(cmd, DRIVER_SENSE);
2198 set_host_byte(cmd, DID_ABORT);
584d7aad 2199 cmd->result |= SAM_STAT_CHECK_CONDITION;
8cb2049c 2200 return 1;
bad75002
AE
2201 }
2202
e02587d7
AE
2203 /* check ref tag */
2204 if (e_ref_tag != a_ref_tag) {
bad75002 2205 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
e02587d7 2206 0x10, 0x3);
bad75002
AE
2207 set_driver_byte(cmd, DRIVER_SENSE);
2208 set_host_byte(cmd, DID_ABORT);
584d7aad 2209 cmd->result |= SAM_STAT_CHECK_CONDITION;
8cb2049c 2210 return 1;
bad75002
AE
2211 }
2212
e02587d7
AE
2213 /* check appl tag */
2214 if (e_app_tag != a_app_tag) {
bad75002 2215 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
e02587d7 2216 0x10, 0x2);
bad75002
AE
2217 set_driver_byte(cmd, DRIVER_SENSE);
2218 set_host_byte(cmd, DID_ABORT);
584d7aad 2219 cmd->result |= SAM_STAT_CHECK_CONDITION;
8cb2049c 2220 return 1;
bad75002 2221 }
e02587d7 2222
8cb2049c 2223 return 1;
bad75002
AE
2224}
2225
a9b6f722
SK
2226static void
2227qla25xx_process_bidir_status_iocb(scsi_qla_host_t *vha, void *pkt,
2228 struct req_que *req, uint32_t index)
2229{
2230 struct qla_hw_data *ha = vha->hw;
2231 srb_t *sp;
2232 uint16_t comp_status;
2233 uint16_t scsi_status;
2234 uint16_t thread_id;
2235 uint32_t rval = EXT_STATUS_OK;
75cc8cfc 2236 struct bsg_job *bsg_job = NULL;
01e0e15c
JT
2237 struct fc_bsg_request *bsg_request;
2238 struct fc_bsg_reply *bsg_reply;
a9b6f722
SK
2239 sts_entry_t *sts;
2240 struct sts_entry_24xx *sts24;
2241 sts = (sts_entry_t *) pkt;
2242 sts24 = (struct sts_entry_24xx *) pkt;
2243
2244 /* Validate handle. */
8d93f550 2245 if (index >= req->num_outstanding_cmds) {
a9b6f722
SK
2246 ql_log(ql_log_warn, vha, 0x70af,
2247 "Invalid SCSI completion handle 0x%x.\n", index);
2248 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2249 return;
2250 }
2251
2252 sp = req->outstanding_cmds[index];
01e0e15c 2253 if (!sp) {
a9b6f722
SK
2254 ql_log(ql_log_warn, vha, 0x70b0,
2255 "Req:%d: Invalid ISP SCSI completion handle(0x%x)\n",
2256 req->id, index);
2257
2258 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2259 return;
2260 }
2261
01e0e15c
JT
2262 /* Free outstanding command slot. */
2263 req->outstanding_cmds[index] = NULL;
2264 bsg_job = sp->u.bsg_job;
2265 bsg_request = bsg_job->request;
2266 bsg_reply = bsg_job->reply;
2267
a9b6f722
SK
2268 if (IS_FWI2_CAPABLE(ha)) {
2269 comp_status = le16_to_cpu(sts24->comp_status);
2270 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
2271 } else {
2272 comp_status = le16_to_cpu(sts->comp_status);
2273 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
2274 }
2275
01e0e15c 2276 thread_id = bsg_request->rqst_data.h_vendor.vendor_cmd[1];
a9b6f722
SK
2277 switch (comp_status) {
2278 case CS_COMPLETE:
2279 if (scsi_status == 0) {
01e0e15c 2280 bsg_reply->reply_payload_rcv_len =
a9b6f722 2281 bsg_job->reply_payload.payload_len;
fabbb8df 2282 vha->qla_stats.input_bytes +=
01e0e15c 2283 bsg_reply->reply_payload_rcv_len;
fabbb8df 2284 vha->qla_stats.input_requests++;
a9b6f722
SK
2285 rval = EXT_STATUS_OK;
2286 }
2287 goto done;
2288
2289 case CS_DATA_OVERRUN:
2290 ql_dbg(ql_dbg_user, vha, 0x70b1,
5a68a1c2 2291 "Command completed with data overrun thread_id=%d\n",
a9b6f722
SK
2292 thread_id);
2293 rval = EXT_STATUS_DATA_OVERRUN;
2294 break;
2295
2296 case CS_DATA_UNDERRUN:
2297 ql_dbg(ql_dbg_user, vha, 0x70b2,
5a68a1c2 2298 "Command completed with data underrun thread_id=%d\n",
a9b6f722
SK
2299 thread_id);
2300 rval = EXT_STATUS_DATA_UNDERRUN;
2301 break;
2302 case CS_BIDIR_RD_OVERRUN:
2303 ql_dbg(ql_dbg_user, vha, 0x70b3,
2304 "Command completed with read data overrun thread_id=%d\n",
2305 thread_id);
2306 rval = EXT_STATUS_DATA_OVERRUN;
2307 break;
2308
2309 case CS_BIDIR_RD_WR_OVERRUN:
2310 ql_dbg(ql_dbg_user, vha, 0x70b4,
2311 "Command completed with read and write data overrun "
2312 "thread_id=%d\n", thread_id);
2313 rval = EXT_STATUS_DATA_OVERRUN;
2314 break;
2315
2316 case CS_BIDIR_RD_OVERRUN_WR_UNDERRUN:
2317 ql_dbg(ql_dbg_user, vha, 0x70b5,
2318 "Command completed with read data over and write data "
2319 "underrun thread_id=%d\n", thread_id);
2320 rval = EXT_STATUS_DATA_OVERRUN;
2321 break;
2322
2323 case CS_BIDIR_RD_UNDERRUN:
2324 ql_dbg(ql_dbg_user, vha, 0x70b6,
5a68a1c2 2325 "Command completed with read data underrun "
a9b6f722
SK
2326 "thread_id=%d\n", thread_id);
2327 rval = EXT_STATUS_DATA_UNDERRUN;
2328 break;
2329
2330 case CS_BIDIR_RD_UNDERRUN_WR_OVERRUN:
2331 ql_dbg(ql_dbg_user, vha, 0x70b7,
2332 "Command completed with read data under and write data "
2333 "overrun thread_id=%d\n", thread_id);
2334 rval = EXT_STATUS_DATA_UNDERRUN;
2335 break;
2336
2337 case CS_BIDIR_RD_WR_UNDERRUN:
2338 ql_dbg(ql_dbg_user, vha, 0x70b8,
2339 "Command completed with read and write data underrun "
2340 "thread_id=%d\n", thread_id);
2341 rval = EXT_STATUS_DATA_UNDERRUN;
2342 break;
2343
2344 case CS_BIDIR_DMA:
2345 ql_dbg(ql_dbg_user, vha, 0x70b9,
2346 "Command completed with data DMA error thread_id=%d\n",
2347 thread_id);
2348 rval = EXT_STATUS_DMA_ERR;
2349 break;
2350
2351 case CS_TIMEOUT:
2352 ql_dbg(ql_dbg_user, vha, 0x70ba,
2353 "Command completed with timeout thread_id=%d\n",
2354 thread_id);
2355 rval = EXT_STATUS_TIMEOUT;
2356 break;
2357 default:
2358 ql_dbg(ql_dbg_user, vha, 0x70bb,
2359 "Command completed with completion status=0x%x "
2360 "thread_id=%d\n", comp_status, thread_id);
2361 rval = EXT_STATUS_ERR;
2362 break;
2363 }
01e0e15c 2364 bsg_reply->reply_payload_rcv_len = 0;
a9b6f722
SK
2365
2366done:
2367 /* Return the vendor specific reply to API */
01e0e15c 2368 bsg_reply->reply_data.vendor_reply.vendor_rsp[0] = rval;
a9b6f722
SK
2369 bsg_job->reply_len = sizeof(struct fc_bsg_reply);
2370 /* Always return DID_OK, bsg will send the vendor specific response
2371 * in this case only */
f7d5182c 2372 sp->done(sp, DID_OK << 16);
a9b6f722
SK
2373
2374}
2375
1da177e4
LT
2376/**
2377 * qla2x00_status_entry() - Process a Status IOCB entry.
2db6228d
BVA
2378 * @vha: SCSI driver HA context
2379 * @rsp: response queue
1da177e4
LT
2380 * @pkt: Entry pointer
2381 */
2382static void
73208dfd 2383qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
1da177e4 2384{
1da177e4 2385 srb_t *sp;
1da177e4
LT
2386 fc_port_t *fcport;
2387 struct scsi_cmnd *cp;
9a853f71
AV
2388 sts_entry_t *sts;
2389 struct sts_entry_24xx *sts24;
1da177e4
LT
2390 uint16_t comp_status;
2391 uint16_t scsi_status;
b7d2280c 2392 uint16_t ox_id;
1da177e4
LT
2393 uint8_t lscsi_status;
2394 int32_t resid;
5544213b
AV
2395 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
2396 fw_resid_len;
9a853f71 2397 uint8_t *rsp_info, *sense_data;
e315cd28 2398 struct qla_hw_data *ha = vha->hw;
2afa19a9
AC
2399 uint32_t handle;
2400 uint16_t que;
2401 struct req_que *req;
b7d2280c 2402 int logit = 1;
9ba56b95 2403 int res = 0;
a9b6f722 2404 uint16_t state_flags = 0;
e05fe292 2405 uint16_t retry_delay = 0;
9a853f71
AV
2406
2407 sts = (sts_entry_t *) pkt;
2408 sts24 = (struct sts_entry_24xx *) pkt;
e428924c 2409 if (IS_FWI2_CAPABLE(ha)) {
9a853f71
AV
2410 comp_status = le16_to_cpu(sts24->comp_status);
2411 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
a9b6f722 2412 state_flags = le16_to_cpu(sts24->state_flags);
9a853f71
AV
2413 } else {
2414 comp_status = le16_to_cpu(sts->comp_status);
2415 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
2416 }
2afa19a9
AC
2417 handle = (uint32_t) LSW(sts->handle);
2418 que = MSW(sts->handle);
2419 req = ha->req_q_map[que];
a9083016 2420
36008cf1
CD
2421 /* Check for invalid queue pointer */
2422 if (req == NULL ||
2423 que >= find_first_zero_bit(ha->req_qid_map, ha->max_req_queues)) {
2424 ql_dbg(ql_dbg_io, vha, 0x3059,
2425 "Invalid status handle (0x%x): Bad req pointer. req=%p, "
2426 "que=%u.\n", sts->handle, req, que);
2427 return;
2428 }
2429
1da177e4 2430 /* Validate handle. */
c7bc4cae 2431 if (handle < req->num_outstanding_cmds) {
2afa19a9 2432 sp = req->outstanding_cmds[handle];
c7bc4cae
CD
2433 if (!sp) {
2434 ql_dbg(ql_dbg_io, vha, 0x3075,
2435 "%s(%ld): Already returned command for status handle (0x%x).\n",
2436 __func__, vha->host_no, sts->handle);
2437 return;
2438 }
2439 } else {
cfb0919c 2440 ql_dbg(ql_dbg_io, vha, 0x3017,
c7bc4cae
CD
2441 "Invalid status handle, out of range (0x%x).\n",
2442 sts->handle);
1da177e4 2443
acd3ce88
CD
2444 if (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) {
2445 if (IS_P3P_TYPE(ha))
2446 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
2447 else
2448 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2449 qla2xxx_wake_dpc(vha);
2450 }
1da177e4
LT
2451 return;
2452 }
a9b6f722 2453
c5419e26
QT
2454 if (sp->cmd_type != TYPE_SRB) {
2455 req->outstanding_cmds[handle] = NULL;
2456 ql_dbg(ql_dbg_io, vha, 0x3015,
2457 "Unknown sp->cmd_type %x %p).\n",
2458 sp->cmd_type, sp);
2459 return;
2460 }
2461
7401bc18
DG
2462 /* NVME completion. */
2463 if (sp->type == SRB_NVME_CMD) {
60dd6e8e
DT
2464 req->outstanding_cmds[handle] = NULL;
2465 qla24xx_nvme_iocb_entry(vha, req, pkt, sp);
7401bc18
DG
2466 return;
2467 }
2468
a9b6f722
SK
2469 if (unlikely((state_flags & BIT_1) && (sp->type == SRB_BIDI_CMD))) {
2470 qla25xx_process_bidir_status_iocb(vha, pkt, req, handle);
2471 return;
2472 }
2473
faef62d1
AB
2474 /* Task Management completion. */
2475 if (sp->type == SRB_TM_CMD) {
2476 qla24xx_tm_iocb_entry(vha, req, pkt);
2477 return;
2478 }
2479
a9b6f722
SK
2480 /* Fast path completion. */
2481 if (comp_status == CS_COMPLETE && scsi_status == 0) {
2482 qla2x00_process_completed_request(vha, req, handle);
2483
2484 return;
2485 }
2486
2487 req->outstanding_cmds[handle] = NULL;
9ba56b95 2488 cp = GET_CMD_SP(sp);
1da177e4 2489 if (cp == NULL) {
cfb0919c 2490 ql_dbg(ql_dbg_io, vha, 0x3018,
7c3df132
SK
2491 "Command already returned (0x%x/%p).\n",
2492 sts->handle, sp);
1da177e4
LT
2493
2494 return;
2495 }
2496
8ae6d9c7 2497 lscsi_status = scsi_status & STATUS_MASK;
1da177e4 2498
bdf79621 2499 fcport = sp->fcport;
1da177e4 2500
b7d2280c 2501 ox_id = 0;
5544213b
AV
2502 sense_len = par_sense_len = rsp_info_len = resid_len =
2503 fw_resid_len = 0;
e428924c 2504 if (IS_FWI2_CAPABLE(ha)) {
0f00a206
LC
2505 if (scsi_status & SS_SENSE_LEN_VALID)
2506 sense_len = le32_to_cpu(sts24->sense_len);
2507 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2508 rsp_info_len = le32_to_cpu(sts24->rsp_data_len);
2509 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER))
2510 resid_len = le32_to_cpu(sts24->rsp_residual_count);
2511 if (comp_status == CS_DATA_UNDERRUN)
2512 fw_resid_len = le32_to_cpu(sts24->residual_len);
9a853f71
AV
2513 rsp_info = sts24->data;
2514 sense_data = sts24->data;
2515 host_to_fcp_swap(sts24->data, sizeof(sts24->data));
b7d2280c 2516 ox_id = le16_to_cpu(sts24->ox_id);
5544213b 2517 par_sense_len = sizeof(sts24->data);
e05fe292 2518 /* Valid values of the retry delay timer are 0x1-0xffef */
3cedc879
AG
2519 if (sts24->retry_delay > 0 && sts24->retry_delay < 0xfff1) {
2520 retry_delay = sts24->retry_delay & 0x3fff;
2521 ql_dbg(ql_dbg_io, sp->vha, 0x3033,
2522 "%s: scope=%#x retry_delay=%#x\n", __func__,
2523 sts24->retry_delay >> 14, retry_delay);
2524 }
9a853f71 2525 } else {
0f00a206
LC
2526 if (scsi_status & SS_SENSE_LEN_VALID)
2527 sense_len = le16_to_cpu(sts->req_sense_length);
2528 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2529 rsp_info_len = le16_to_cpu(sts->rsp_info_len);
9a853f71
AV
2530 resid_len = le32_to_cpu(sts->residual_length);
2531 rsp_info = sts->rsp_info;
2532 sense_data = sts->req_sense_data;
5544213b 2533 par_sense_len = sizeof(sts->req_sense_data);
9a853f71
AV
2534 }
2535
1da177e4
LT
2536 /* Check for any FCP transport errors. */
2537 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) {
9a853f71 2538 /* Sense data lies beyond any FCP RESPONSE data. */
5544213b 2539 if (IS_FWI2_CAPABLE(ha)) {
9a853f71 2540 sense_data += rsp_info_len;
5544213b
AV
2541 par_sense_len -= rsp_info_len;
2542 }
9a853f71 2543 if (rsp_info_len > 3 && rsp_info[3]) {
5e19ed90 2544 ql_dbg(ql_dbg_io, fcport->vha, 0x3019,
7c3df132
SK
2545 "FCP I/O protocol failure (0x%x/0x%x).\n",
2546 rsp_info_len, rsp_info[3]);
1da177e4 2547
9ba56b95 2548 res = DID_BUS_BUSY << 16;
b7d2280c 2549 goto out;
1da177e4
LT
2550 }
2551 }
2552
3e8ce320
AV
2553 /* Check for overrun. */
2554 if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE &&
2555 scsi_status & SS_RESIDUAL_OVER)
2556 comp_status = CS_DATA_OVERRUN;
2557
e05fe292
CD
2558 /*
2559 * Check retry_delay_timer value if we receive a busy or
2560 * queue full.
2561 */
2562 if (lscsi_status == SAM_STAT_TASK_SET_FULL ||
2563 lscsi_status == SAM_STAT_BUSY)
2564 qla2x00_set_retry_delay_timestamp(fcport, retry_delay);
2565
1da177e4
LT
2566 /*
2567 * Based on Host and scsi status generate status code for Linux
2568 */
2569 switch (comp_status) {
2570 case CS_COMPLETE:
df7baa50 2571 case CS_QUEUE_FULL:
1da177e4 2572 if (scsi_status == 0) {
9ba56b95 2573 res = DID_OK << 16;
1da177e4
LT
2574 break;
2575 }
2576 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) {
9a853f71 2577 resid = resid_len;
385d70b4 2578 scsi_set_resid(cp, resid);
0da69df1
AV
2579
2580 if (!lscsi_status &&
385d70b4 2581 ((unsigned)(scsi_bufflen(cp) - resid) <
0da69df1 2582 cp->underflow)) {
5e19ed90 2583 ql_dbg(ql_dbg_io, fcport->vha, 0x301a,
83548fe2 2584 "Mid-layer underflow detected (0x%x of 0x%x bytes).\n",
7c3df132 2585 resid, scsi_bufflen(cp));
0da69df1 2586
9ba56b95 2587 res = DID_ERROR << 16;
0da69df1
AV
2588 break;
2589 }
1da177e4 2590 }
9ba56b95 2591 res = DID_OK << 16 | lscsi_status;
1da177e4 2592
df7baa50 2593 if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
5e19ed90 2594 ql_dbg(ql_dbg_io, fcport->vha, 0x301b,
7c3df132 2595 "QUEUE FULL detected.\n");
df7baa50
AV
2596 break;
2597 }
b7d2280c 2598 logit = 0;
1da177e4
LT
2599 if (lscsi_status != SS_CHECK_CONDITION)
2600 break;
2601
b80ca4f7 2602 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
1da177e4
LT
2603 if (!(scsi_status & SS_SENSE_LEN_VALID))
2604 break;
2605
5544213b 2606 qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len,
9ba56b95 2607 rsp, res);
1da177e4
LT
2608 break;
2609
2610 case CS_DATA_UNDERRUN:
ed17c71b 2611 /* Use F/W calculated residual length. */
0f00a206
LC
2612 resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len;
2613 scsi_set_resid(cp, resid);
2614 if (scsi_status & SS_RESIDUAL_UNDER) {
2615 if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) {
5e19ed90 2616 ql_dbg(ql_dbg_io, fcport->vha, 0x301d,
83548fe2 2617 "Dropped frame(s) detected (0x%x of 0x%x bytes).\n",
7c3df132 2618 resid, scsi_bufflen(cp));
0f00a206 2619
9ba56b95 2620 res = DID_ERROR << 16 | lscsi_status;
4e85e3d9 2621 goto check_scsi_status;
6acf8190 2622 }
ed17c71b 2623
0f00a206
LC
2624 if (!lscsi_status &&
2625 ((unsigned)(scsi_bufflen(cp) - resid) <
2626 cp->underflow)) {
5e19ed90 2627 ql_dbg(ql_dbg_io, fcport->vha, 0x301e,
83548fe2 2628 "Mid-layer underflow detected (0x%x of 0x%x bytes).\n",
7c3df132 2629 resid, scsi_bufflen(cp));
e038a1be 2630
9ba56b95 2631 res = DID_ERROR << 16;
0f00a206
LC
2632 break;
2633 }
4aee5766
GM
2634 } else if (lscsi_status != SAM_STAT_TASK_SET_FULL &&
2635 lscsi_status != SAM_STAT_BUSY) {
2636 /*
2637 * scsi status of task set and busy are considered to be
2638 * task not completed.
2639 */
2640
5e19ed90 2641 ql_dbg(ql_dbg_io, fcport->vha, 0x301f,
83548fe2
QT
2642 "Dropped frame(s) detected (0x%x of 0x%x bytes).\n",
2643 resid, scsi_bufflen(cp));
0f00a206 2644
9ba56b95 2645 res = DID_ERROR << 16 | lscsi_status;
0374f55e 2646 goto check_scsi_status;
4aee5766
GM
2647 } else {
2648 ql_dbg(ql_dbg_io, fcport->vha, 0x3030,
2649 "scsi_status: 0x%x, lscsi_status: 0x%x\n",
2650 scsi_status, lscsi_status);
1da177e4
LT
2651 }
2652
9ba56b95 2653 res = DID_OK << 16 | lscsi_status;
b7d2280c 2654 logit = 0;
0f00a206 2655
0374f55e 2656check_scsi_status:
1da177e4 2657 /*
fa2a1ce5 2658 * Check to see if SCSI Status is non zero. If so report SCSI
1da177e4
LT
2659 * Status.
2660 */
2661 if (lscsi_status != 0) {
ffec28a3 2662 if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
5e19ed90 2663 ql_dbg(ql_dbg_io, fcport->vha, 0x3020,
7c3df132 2664 "QUEUE FULL detected.\n");
b7d2280c 2665 logit = 1;
ffec28a3
AV
2666 break;
2667 }
1da177e4
LT
2668 if (lscsi_status != SS_CHECK_CONDITION)
2669 break;
2670
b80ca4f7 2671 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
1da177e4
LT
2672 if (!(scsi_status & SS_SENSE_LEN_VALID))
2673 break;
2674
5544213b 2675 qla2x00_handle_sense(sp, sense_data, par_sense_len,
9ba56b95 2676 sense_len, rsp, res);
1da177e4
LT
2677 }
2678 break;
2679
1da177e4
LT
2680 case CS_PORT_LOGGED_OUT:
2681 case CS_PORT_CONFIG_CHG:
2682 case CS_PORT_BUSY:
2683 case CS_INCOMPLETE:
2684 case CS_PORT_UNAVAILABLE:
b7d2280c 2685 case CS_TIMEOUT:
ff454b01
CD
2686 case CS_RESET:
2687
056a4483
MC
2688 /*
2689 * We are going to have the fc class block the rport
2690 * while we try to recover so instruct the mid layer
2691 * to requeue until the class decides how to handle this.
2692 */
9ba56b95 2693 res = DID_TRANSPORT_DISRUPTED << 16;
b7d2280c
AV
2694
2695 if (comp_status == CS_TIMEOUT) {
2696 if (IS_FWI2_CAPABLE(ha))
2697 break;
2698 else if ((le16_to_cpu(sts->status_flags) &
2699 SF_LOGOUT_SENT) == 0)
2700 break;
2701 }
2702
726b8548
QT
2703 if (atomic_read(&fcport->state) == FCS_ONLINE) {
2704 ql_dbg(ql_dbg_disc, fcport->vha, 0x3021,
2705 "Port to be marked lost on fcport=%02x%02x%02x, current "
2706 "port state= %s comp_status %x.\n", fcport->d_id.b.domain,
2707 fcport->d_id.b.area, fcport->d_id.b.al_pa,
2708 port_state_str[atomic_read(&fcport->state)],
2709 comp_status);
2710
e315cd28 2711 qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
d8630bb9 2712 qlt_schedule_sess_for_deletion(fcport);
726b8548
QT
2713 }
2714
1da177e4
LT
2715 break;
2716
1da177e4 2717 case CS_ABORTED:
9ba56b95 2718 res = DID_RESET << 16;
1da177e4 2719 break;
bad75002
AE
2720
2721 case CS_DIF_ERROR:
8cb2049c 2722 logit = qla2x00_handle_dif_error(sp, sts24);
fb6e4668 2723 res = cp->result;
bad75002 2724 break;
9e522cd8
AE
2725
2726 case CS_TRANSPORT:
2727 res = DID_ERROR << 16;
2728
2729 if (!IS_PI_SPLIT_DET_CAPABLE(ha))
2730 break;
2731
2732 if (state_flags & BIT_4)
2733 scmd_printk(KERN_WARNING, cp,
2734 "Unsupported device '%s' found.\n",
2735 cp->device->vendor);
2736 break;
2737
50b81275
GM
2738 case CS_DMA:
2739 ql_log(ql_log_info, fcport->vha, 0x3022,
2740 "CS_DMA error: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu portid=%06x oxid=0x%x cdb=%10phN len=0x%x rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n",
2741 comp_status, scsi_status, res, vha->host_no,
2742 cp->device->id, cp->device->lun, fcport->d_id.b24,
2743 ox_id, cp->cmnd, scsi_bufflen(cp), rsp_info_len,
2744 resid_len, fw_resid_len, sp, cp);
2745 ql_dump_buffer(ql_dbg_tgt + ql_dbg_verbose, vha, 0xe0ee,
2746 pkt, sizeof(*sts24));
2747 res = DID_ERROR << 16;
2748 break;
1da177e4 2749 default:
9ba56b95 2750 res = DID_ERROR << 16;
1da177e4
LT
2751 break;
2752 }
2753
b7d2280c
AV
2754out:
2755 if (logit)
5e19ed90 2756 ql_dbg(ql_dbg_io, fcport->vha, 0x3022,
9cb78c16 2757 "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu "
7b833558 2758 "portid=%02x%02x%02x oxid=0x%x cdb=%10phN len=0x%x "
c7bc4cae 2759 "rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n",
9ba56b95 2760 comp_status, scsi_status, res, vha->host_no,
cfb0919c
CD
2761 cp->device->id, cp->device->lun, fcport->d_id.b.domain,
2762 fcport->d_id.b.area, fcport->d_id.b.al_pa, ox_id,
7b833558 2763 cp->cmnd, scsi_bufflen(cp), rsp_info_len,
c7bc4cae 2764 resid_len, fw_resid_len, sp, cp);
b7d2280c 2765
2afa19a9 2766 if (rsp->status_srb == NULL)
25ff6af1 2767 sp->done(sp, res);
1da177e4
LT
2768}
2769
2770/**
2771 * qla2x00_status_cont_entry() - Process a Status Continuations entry.
2db6228d 2772 * @rsp: response queue
1da177e4
LT
2773 * @pkt: Entry pointer
2774 *
2775 * Extended sense data.
2776 */
2777static void
2afa19a9 2778qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
1da177e4 2779{
9ba56b95 2780 uint8_t sense_sz = 0;
2afa19a9 2781 struct qla_hw_data *ha = rsp->hw;
7c3df132 2782 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
9ba56b95 2783 srb_t *sp = rsp->status_srb;
1da177e4 2784 struct scsi_cmnd *cp;
9ba56b95
GM
2785 uint32_t sense_len;
2786 uint8_t *sense_ptr;
1da177e4 2787
9ba56b95
GM
2788 if (!sp || !GET_CMD_SENSE_LEN(sp))
2789 return;
1da177e4 2790
9ba56b95
GM
2791 sense_len = GET_CMD_SENSE_LEN(sp);
2792 sense_ptr = GET_CMD_SENSE_PTR(sp);
1da177e4 2793
9ba56b95
GM
2794 cp = GET_CMD_SP(sp);
2795 if (cp == NULL) {
2796 ql_log(ql_log_warn, vha, 0x3025,
2797 "cmd is NULL: already returned to OS (sp=%p).\n", sp);
1da177e4 2798
9ba56b95
GM
2799 rsp->status_srb = NULL;
2800 return;
1da177e4 2801 }
1da177e4 2802
9ba56b95
GM
2803 if (sense_len > sizeof(pkt->data))
2804 sense_sz = sizeof(pkt->data);
2805 else
2806 sense_sz = sense_len;
c4631191 2807
9ba56b95
GM
2808 /* Move sense data. */
2809 if (IS_FWI2_CAPABLE(ha))
2810 host_to_fcp_swap(pkt->data, sizeof(pkt->data));
2811 memcpy(sense_ptr, pkt->data, sense_sz);
2812 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c,
2813 sense_ptr, sense_sz);
c4631191 2814
9ba56b95
GM
2815 sense_len -= sense_sz;
2816 sense_ptr += sense_sz;
c4631191 2817
9ba56b95
GM
2818 SET_CMD_SENSE_PTR(sp, sense_ptr);
2819 SET_CMD_SENSE_LEN(sp, sense_len);
2820
2821 /* Place command on done queue. */
2822 if (sense_len == 0) {
2823 rsp->status_srb = NULL;
25ff6af1 2824 sp->done(sp, cp->result);
c4631191 2825 }
c4631191
GM
2826}
2827
1da177e4
LT
2828/**
2829 * qla2x00_error_entry() - Process an error entry.
2db6228d
BVA
2830 * @vha: SCSI driver HA context
2831 * @rsp: response queue
1da177e4 2832 * @pkt: Entry pointer
c5419e26 2833 * return : 1=allow further error analysis. 0=no additional error analysis.
1da177e4 2834 */
c5419e26 2835static int
73208dfd 2836qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt)
1da177e4
LT
2837{
2838 srb_t *sp;
e315cd28 2839 struct qla_hw_data *ha = vha->hw;
c4631191 2840 const char func[] = "ERROR-IOCB";
2afa19a9 2841 uint16_t que = MSW(pkt->handle);
a6fe35c0 2842 struct req_que *req = NULL;
9ba56b95 2843 int res = DID_ERROR << 16;
7c3df132 2844
9ba56b95 2845 ql_dbg(ql_dbg_async, vha, 0x502a,
82de802a
QT
2846 "iocb type %xh with error status %xh, handle %xh, rspq id %d\n",
2847 pkt->entry_type, pkt->entry_status, pkt->handle, rsp->id);
9ba56b95 2848
a6fe35c0
AE
2849 if (que >= ha->max_req_queues || !ha->req_q_map[que])
2850 goto fatal;
2851
2852 req = ha->req_q_map[que];
2853
9ba56b95
GM
2854 if (pkt->entry_status & RF_BUSY)
2855 res = DID_BUS_BUSY << 16;
1da177e4 2856
c5419e26
QT
2857 if ((pkt->handle & ~QLA_TGT_HANDLE_MASK) == QLA_TGT_SKIP_HANDLE)
2858 return 0;
4f060736 2859
c5419e26
QT
2860 switch (pkt->entry_type) {
2861 case NOTIFY_ACK_TYPE:
2862 case STATUS_TYPE:
2863 case STATUS_CONT_TYPE:
2864 case LOGINOUT_PORT_IOCB_TYPE:
2865 case CT_IOCB_TYPE:
2866 case ELS_IOCB_TYPE:
2867 case ABORT_IOCB_TYPE:
2868 case MBX_IOCB_TYPE:
527b8ae3 2869 default:
c5419e26
QT
2870 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2871 if (sp) {
2872 sp->done(sp, res);
2873 return 0;
2874 }
2875 break;
2876
2877 case ABTS_RESP_24XX:
2878 case CTIO_TYPE7:
2879 case CTIO_CRC2:
c5419e26 2880 return 1;
1da177e4 2881 }
a6fe35c0
AE
2882fatal:
2883 ql_log(ql_log_warn, vha, 0x5030,
fd49a540 2884 "Error entry - invalid handle/queue (%04x).\n", que);
c5419e26 2885 return 0;
1da177e4
LT
2886}
2887
9a853f71
AV
2888/**
2889 * qla24xx_mbx_completion() - Process mailbox command completions.
2db6228d 2890 * @vha: SCSI driver HA context
9a853f71
AV
2891 * @mb0: Mailbox0 register
2892 */
2893static void
e315cd28 2894qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
9a853f71
AV
2895{
2896 uint16_t cnt;
4fa94f83 2897 uint32_t mboxes;
9a853f71 2898 uint16_t __iomem *wptr;
e315cd28 2899 struct qla_hw_data *ha = vha->hw;
9a853f71
AV
2900 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2901
4fa94f83 2902 /* Read all mbox registers? */
c02189e1
BVA
2903 WARN_ON_ONCE(ha->mbx_count > 32);
2904 mboxes = (1ULL << ha->mbx_count) - 1;
4fa94f83 2905 if (!ha->mcp)
a720101d 2906 ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERROR.\n");
4fa94f83
AV
2907 else
2908 mboxes = ha->mcp->in_mb;
2909
9a853f71
AV
2910 /* Load return mailbox registers. */
2911 ha->flags.mbox_int = 1;
2912 ha->mailbox_out[0] = mb0;
4fa94f83 2913 mboxes >>= 1;
9a853f71
AV
2914 wptr = (uint16_t __iomem *)&reg->mailbox1;
2915
2916 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
4fa94f83
AV
2917 if (mboxes & BIT_0)
2918 ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
2919
2920 mboxes >>= 1;
9a853f71
AV
2921 wptr++;
2922 }
9a853f71
AV
2923}
2924
4440e46d
AB
2925static void
2926qla24xx_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2927 struct abort_entry_24xx *pkt)
2928{
2929 const char func[] = "ABT_IOCB";
2930 srb_t *sp;
2931 struct srb_iocb *abt;
2932
2933 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2934 if (!sp)
2935 return;
2936
2937 abt = &sp->u.iocb_cmd;
15f30a57 2938 abt->u.abt.comp_status = le16_to_cpu(pkt->nport_handle);
25ff6af1 2939 sp->done(sp, 0);
4440e46d
AB
2940}
2941
0f7e51f6 2942void qla24xx_nvme_ls4_iocb(struct scsi_qla_host *vha,
2943 struct pt_ls4_request *pkt, struct req_que *req)
e84067d7
DG
2944{
2945 srb_t *sp;
2946 const char func[] = "LS4_IOCB";
2947 uint16_t comp_status;
2948
2949 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2950 if (!sp)
2951 return;
2952
2953 comp_status = le16_to_cpu(pkt->status);
2954 sp->done(sp, comp_status);
2955}
2956
9a853f71
AV
2957/**
2958 * qla24xx_process_response_queue() - Process response queue entries.
2db6228d
BVA
2959 * @vha: SCSI driver HA context
2960 * @rsp: response queue
9a853f71 2961 */
2afa19a9
AC
2962void qla24xx_process_response_queue(struct scsi_qla_host *vha,
2963 struct rsp_que *rsp)
9a853f71 2964{
9a853f71 2965 struct sts_entry_24xx *pkt;
a9083016 2966 struct qla_hw_data *ha = vha->hw;
9a853f71 2967
ec7193e2 2968 if (!ha->flags.fw_started)
9a853f71
AV
2969 return;
2970
e326d22a
QT
2971 if (rsp->qpair->cpuid != smp_processor_id())
2972 qla_cpu_update(rsp->qpair, smp_processor_id());
2973
e315cd28
AC
2974 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
2975 pkt = (struct sts_entry_24xx *)rsp->ring_ptr;
9a853f71 2976
e315cd28
AC
2977 rsp->ring_index++;
2978 if (rsp->ring_index == rsp->length) {
2979 rsp->ring_index = 0;
2980 rsp->ring_ptr = rsp->ring;
9a853f71 2981 } else {
e315cd28 2982 rsp->ring_ptr++;
9a853f71
AV
2983 }
2984
2985 if (pkt->entry_status != 0) {
c5419e26 2986 if (qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt))
f83adb61 2987 goto process_err;
2d70c103 2988
9a853f71
AV
2989 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2990 wmb();
2991 continue;
2992 }
f83adb61 2993process_err:
9a853f71
AV
2994
2995 switch (pkt->entry_type) {
2996 case STATUS_TYPE:
73208dfd 2997 qla2x00_status_entry(vha, rsp, pkt);
9a853f71
AV
2998 break;
2999 case STATUS_CONT_TYPE:
2afa19a9 3000 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
9a853f71 3001 break;
2c3dfe3f 3002 case VP_RPT_ID_IOCB_TYPE:
e315cd28 3003 qla24xx_report_id_acquisition(vha,
2c3dfe3f
SJ
3004 (struct vp_rpt_id_entry_24xx *)pkt);
3005 break;
ac280b67
AV
3006 case LOGINOUT_PORT_IOCB_TYPE:
3007 qla24xx_logio_entry(vha, rsp->req,
3008 (struct logio_entry_24xx *)pkt);
3009 break;
f83adb61 3010 case CT_IOCB_TYPE:
9a069e19 3011 qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
9a069e19 3012 break;
f83adb61 3013 case ELS_IOCB_TYPE:
9a069e19
GM
3014 qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE);
3015 break;
2d70c103 3016 case ABTS_RECV_24XX:
2f424b9b
QT
3017 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3018 /* ensure that the ATIO queue is empty */
82de802a
QT
3019 qlt_handle_abts_recv(vha, rsp,
3020 (response_t *)pkt);
2f424b9b
QT
3021 break;
3022 } else {
2f424b9b
QT
3023 qlt_24xx_process_atio_queue(vha, 1);
3024 }
81881861 3025 /* fall through */
2d70c103
NB
3026 case ABTS_RESP_24XX:
3027 case CTIO_TYPE7:
f83adb61 3028 case CTIO_CRC2:
82de802a 3029 qlt_response_pkt_all_vps(vha, rsp, (response_t *)pkt);
2d70c103 3030 break;
e84067d7
DG
3031 case PT_LS4_REQUEST:
3032 qla24xx_nvme_ls4_iocb(vha, (struct pt_ls4_request *)pkt,
3033 rsp->req);
3034 break;
726b8548
QT
3035 case NOTIFY_ACK_TYPE:
3036 if (pkt->handle == QLA_TGT_SKIP_HANDLE)
82de802a
QT
3037 qlt_response_pkt_all_vps(vha, rsp,
3038 (response_t *)pkt);
726b8548
QT
3039 else
3040 qla24xxx_nack_iocb_entry(vha, rsp->req,
3041 (struct nack_to_isp *)pkt);
3042 break;
54883291
SK
3043 case MARKER_TYPE:
3044 /* Do nothing in this case, this check is to prevent it
3045 * from falling into default case
3046 */
3047 break;
4440e46d
AB
3048 case ABORT_IOCB_TYPE:
3049 qla24xx_abort_iocb_entry(vha, rsp->req,
3050 (struct abort_entry_24xx *)pkt);
3051 break;
726b8548
QT
3052 case MBX_IOCB_TYPE:
3053 qla24xx_mbx_iocb_entry(vha, rsp->req,
3054 (struct mbx_24xx_entry *)pkt);
3055 break;
2853192e
QT
3056 case VP_CTRL_IOCB_TYPE:
3057 qla_ctrlvp_completed(vha, rsp->req,
3058 (struct vp_ctrl_entry_24xx *)pkt);
3059 break;
9a853f71
AV
3060 default:
3061 /* Type Not Supported. */
7c3df132
SK
3062 ql_dbg(ql_dbg_async, vha, 0x5042,
3063 "Received unknown response pkt type %x "
9a853f71 3064 "entry status=%x.\n",
7c3df132 3065 pkt->entry_type, pkt->entry_status);
9a853f71
AV
3066 break;
3067 }
3068 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
3069 wmb();
3070 }
3071
3072 /* Adjust ring index */
7ec0effd 3073 if (IS_P3P_TYPE(ha)) {
a9083016
GM
3074 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82;
3075 WRT_REG_DWORD(&reg->rsp_q_out[0], rsp->ring_index);
726b8548 3076 } else {
a9083016 3077 WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index);
726b8548 3078 }
9a853f71
AV
3079}
3080
05236a05 3081static void
e315cd28 3082qla2xxx_check_risc_status(scsi_qla_host_t *vha)
05236a05
AV
3083{
3084 int rval;
3085 uint32_t cnt;
e315cd28 3086 struct qla_hw_data *ha = vha->hw;
05236a05
AV
3087 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3088
f73cb695
CD
3089 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3090 !IS_QLA27XX(ha))
05236a05
AV
3091 return;
3092
3093 rval = QLA_SUCCESS;
3094 WRT_REG_DWORD(&reg->iobase_addr, 0x7C00);
3095 RD_REG_DWORD(&reg->iobase_addr);
3096 WRT_REG_DWORD(&reg->iobase_window, 0x0001);
3097 for (cnt = 10000; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
3098 rval == QLA_SUCCESS; cnt--) {
3099 if (cnt) {
3100 WRT_REG_DWORD(&reg->iobase_window, 0x0001);
3101 udelay(10);
3102 } else
3103 rval = QLA_FUNCTION_TIMEOUT;
3104 }
3105 if (rval == QLA_SUCCESS)
3106 goto next_test;
3107
b2ec76c5 3108 rval = QLA_SUCCESS;
05236a05
AV
3109 WRT_REG_DWORD(&reg->iobase_window, 0x0003);
3110 for (cnt = 100; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
3111 rval == QLA_SUCCESS; cnt--) {
3112 if (cnt) {
3113 WRT_REG_DWORD(&reg->iobase_window, 0x0003);
3114 udelay(10);
3115 } else
3116 rval = QLA_FUNCTION_TIMEOUT;
3117 }
3118 if (rval != QLA_SUCCESS)
3119 goto done;
3120
3121next_test:
3122 if (RD_REG_DWORD(&reg->iobase_c8) & BIT_3)
7c3df132
SK
3123 ql_log(ql_log_info, vha, 0x504c,
3124 "Additional code -- 0x55AA.\n");
05236a05
AV
3125
3126done:
3127 WRT_REG_DWORD(&reg->iobase_window, 0x0000);
3128 RD_REG_DWORD(&reg->iobase_window);
3129}
3130
9a853f71 3131/**
6246b8a1 3132 * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP24xx.
807eb907 3133 * @irq: interrupt number
9a853f71 3134 * @dev_id: SCSI driver HA context
9a853f71
AV
3135 *
3136 * Called by system whenever the host adapter generates an interrupt.
3137 *
3138 * Returns handled flag.
3139 */
3140irqreturn_t
7d12e780 3141qla24xx_intr_handler(int irq, void *dev_id)
9a853f71 3142{
e315cd28
AC
3143 scsi_qla_host_t *vha;
3144 struct qla_hw_data *ha;
9a853f71
AV
3145 struct device_reg_24xx __iomem *reg;
3146 int status;
9a853f71
AV
3147 unsigned long iter;
3148 uint32_t stat;
3149 uint32_t hccr;
7d613ac6 3150 uint16_t mb[8];
e315cd28 3151 struct rsp_que *rsp;
43fac4d9 3152 unsigned long flags;
1073daa4 3153 bool process_atio = false;
9a853f71 3154
e315cd28
AC
3155 rsp = (struct rsp_que *) dev_id;
3156 if (!rsp) {
3256b435
CD
3157 ql_log(ql_log_info, NULL, 0x5059,
3158 "%s: NULL response queue pointer.\n", __func__);
9a853f71
AV
3159 return IRQ_NONE;
3160 }
3161
e315cd28 3162 ha = rsp->hw;
9a853f71
AV
3163 reg = &ha->iobase->isp24;
3164 status = 0;
3165
85880801
AV
3166 if (unlikely(pci_channel_offline(ha->pdev)))
3167 return IRQ_HANDLED;
3168
43fac4d9 3169 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 3170 vha = pci_get_drvdata(ha->pdev);
9a853f71
AV
3171 for (iter = 50; iter--; ) {
3172 stat = RD_REG_DWORD(&reg->host_status);
c821e0d5 3173 if (qla2x00_check_reg32_for_disconnect(vha, stat))
f3ddac19 3174 break;
9a853f71 3175 if (stat & HSRX_RISC_PAUSED) {
85880801 3176 if (unlikely(pci_channel_offline(ha->pdev)))
14e660e6
SJ
3177 break;
3178
9a853f71
AV
3179 hccr = RD_REG_DWORD(&reg->hccr);
3180
7c3df132
SK
3181 ql_log(ql_log_warn, vha, 0x504b,
3182 "RISC paused -- HCCR=%x, Dumping firmware.\n",
3183 hccr);
05236a05 3184
e315cd28 3185 qla2xxx_check_risc_status(vha);
05236a05 3186
e315cd28
AC
3187 ha->isp_ops->fw_dump(vha, 1);
3188 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
9a853f71
AV
3189 break;
3190 } else if ((stat & HSRX_RISC_INT) == 0)
3191 break;
3192
3193 switch (stat & 0xff) {
fafbda9f
AE
3194 case INTR_ROM_MB_SUCCESS:
3195 case INTR_ROM_MB_FAILED:
3196 case INTR_MB_SUCCESS:
3197 case INTR_MB_FAILED:
e315cd28 3198 qla24xx_mbx_completion(vha, MSW(stat));
9a853f71
AV
3199 status |= MBX_INTERRUPT;
3200
3201 break;
fafbda9f 3202 case INTR_ASYNC_EVENT:
9a853f71
AV
3203 mb[0] = MSW(stat);
3204 mb[1] = RD_REG_WORD(&reg->mailbox1);
3205 mb[2] = RD_REG_WORD(&reg->mailbox2);
3206 mb[3] = RD_REG_WORD(&reg->mailbox3);
73208dfd 3207 qla2x00_async_event(vha, rsp, mb);
9a853f71 3208 break;
fafbda9f
AE
3209 case INTR_RSP_QUE_UPDATE:
3210 case INTR_RSP_QUE_UPDATE_83XX:
2afa19a9 3211 qla24xx_process_response_queue(vha, rsp);
9a853f71 3212 break;
c9558869 3213 case INTR_ATIO_QUE_UPDATE_27XX:
1073daa4
QT
3214 case INTR_ATIO_QUE_UPDATE:
3215 process_atio = true;
2d70c103 3216 break;
1073daa4
QT
3217 case INTR_ATIO_RSP_QUE_UPDATE:
3218 process_atio = true;
2d70c103
NB
3219 qla24xx_process_response_queue(vha, rsp);
3220 break;
9a853f71 3221 default:
7c3df132
SK
3222 ql_dbg(ql_dbg_async, vha, 0x504f,
3223 "Unrecognized interrupt type (%d).\n", stat * 0xff);
9a853f71
AV
3224 break;
3225 }
3226 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
3227 RD_REG_DWORD_RELAXED(&reg->hccr);
cb860bbd
GM
3228 if (unlikely(IS_QLA83XX(ha) && (ha->pdev->revision == 1)))
3229 ndelay(3500);
9a853f71 3230 }
36439832 3231 qla2x00_handle_mbx_completion(ha, status);
43fac4d9 3232 spin_unlock_irqrestore(&ha->hardware_lock, flags);
9a853f71 3233
1073daa4
QT
3234 if (process_atio) {
3235 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
3236 qlt_24xx_process_atio_queue(vha, 0);
3237 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags);
3238 }
3239
9a853f71
AV
3240 return IRQ_HANDLED;
3241}
3242
a8488abe
AV
3243static irqreturn_t
3244qla24xx_msix_rsp_q(int irq, void *dev_id)
3245{
e315cd28
AC
3246 struct qla_hw_data *ha;
3247 struct rsp_que *rsp;
a8488abe 3248 struct device_reg_24xx __iomem *reg;
2afa19a9 3249 struct scsi_qla_host *vha;
0f19bc68 3250 unsigned long flags;
a8488abe 3251
e315cd28
AC
3252 rsp = (struct rsp_que *) dev_id;
3253 if (!rsp) {
3256b435
CD
3254 ql_log(ql_log_info, NULL, 0x505a,
3255 "%s: NULL response queue pointer.\n", __func__);
e315cd28
AC
3256 return IRQ_NONE;
3257 }
3258 ha = rsp->hw;
a8488abe
AV
3259 reg = &ha->iobase->isp24;
3260
0f19bc68 3261 spin_lock_irqsave(&ha->hardware_lock, flags);
a8488abe 3262
a67093d4 3263 vha = pci_get_drvdata(ha->pdev);
2afa19a9 3264 qla24xx_process_response_queue(vha, rsp);
3155754a 3265 if (!ha->flags.disable_msix_handshake) {
eb94114b
AC
3266 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
3267 RD_REG_DWORD_RELAXED(&reg->hccr);
3268 }
0f19bc68 3269 spin_unlock_irqrestore(&ha->hardware_lock, flags);
a8488abe
AV
3270
3271 return IRQ_HANDLED;
3272}
3273
3274static irqreturn_t
3275qla24xx_msix_default(int irq, void *dev_id)
3276{
e315cd28
AC
3277 scsi_qla_host_t *vha;
3278 struct qla_hw_data *ha;
3279 struct rsp_que *rsp;
a8488abe
AV
3280 struct device_reg_24xx __iomem *reg;
3281 int status;
a8488abe
AV
3282 uint32_t stat;
3283 uint32_t hccr;
7d613ac6 3284 uint16_t mb[8];
0f19bc68 3285 unsigned long flags;
1073daa4 3286 bool process_atio = false;
a8488abe 3287
e315cd28
AC
3288 rsp = (struct rsp_que *) dev_id;
3289 if (!rsp) {
3256b435
CD
3290 ql_log(ql_log_info, NULL, 0x505c,
3291 "%s: NULL response queue pointer.\n", __func__);
e315cd28
AC
3292 return IRQ_NONE;
3293 }
3294 ha = rsp->hw;
a8488abe
AV
3295 reg = &ha->iobase->isp24;
3296 status = 0;
3297
0f19bc68 3298 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 3299 vha = pci_get_drvdata(ha->pdev);
87f27015 3300 do {
a8488abe 3301 stat = RD_REG_DWORD(&reg->host_status);
c821e0d5 3302 if (qla2x00_check_reg32_for_disconnect(vha, stat))
f3ddac19 3303 break;
a8488abe 3304 if (stat & HSRX_RISC_PAUSED) {
85880801 3305 if (unlikely(pci_channel_offline(ha->pdev)))
14e660e6
SJ
3306 break;
3307
a8488abe
AV
3308 hccr = RD_REG_DWORD(&reg->hccr);
3309
7c3df132
SK
3310 ql_log(ql_log_info, vha, 0x5050,
3311 "RISC paused -- HCCR=%x, Dumping firmware.\n",
3312 hccr);
05236a05 3313
e315cd28 3314 qla2xxx_check_risc_status(vha);
05236a05 3315
e315cd28
AC
3316 ha->isp_ops->fw_dump(vha, 1);
3317 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
a8488abe
AV
3318 break;
3319 } else if ((stat & HSRX_RISC_INT) == 0)
3320 break;
3321
3322 switch (stat & 0xff) {
fafbda9f
AE
3323 case INTR_ROM_MB_SUCCESS:
3324 case INTR_ROM_MB_FAILED:
3325 case INTR_MB_SUCCESS:
3326 case INTR_MB_FAILED:
e315cd28 3327 qla24xx_mbx_completion(vha, MSW(stat));
a8488abe
AV
3328 status |= MBX_INTERRUPT;
3329
3330 break;
fafbda9f 3331 case INTR_ASYNC_EVENT:
a8488abe
AV
3332 mb[0] = MSW(stat);
3333 mb[1] = RD_REG_WORD(&reg->mailbox1);
3334 mb[2] = RD_REG_WORD(&reg->mailbox2);
3335 mb[3] = RD_REG_WORD(&reg->mailbox3);
73208dfd 3336 qla2x00_async_event(vha, rsp, mb);
a8488abe 3337 break;
fafbda9f
AE
3338 case INTR_RSP_QUE_UPDATE:
3339 case INTR_RSP_QUE_UPDATE_83XX:
2afa19a9 3340 qla24xx_process_response_queue(vha, rsp);
a8488abe 3341 break;
c9558869 3342 case INTR_ATIO_QUE_UPDATE_27XX:
1073daa4
QT
3343 case INTR_ATIO_QUE_UPDATE:
3344 process_atio = true;
2d70c103 3345 break;
1073daa4
QT
3346 case INTR_ATIO_RSP_QUE_UPDATE:
3347 process_atio = true;
2d70c103
NB
3348 qla24xx_process_response_queue(vha, rsp);
3349 break;
a8488abe 3350 default:
7c3df132
SK
3351 ql_dbg(ql_dbg_async, vha, 0x5051,
3352 "Unrecognized interrupt type (%d).\n", stat & 0xff);
a8488abe
AV
3353 break;
3354 }
3355 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
87f27015 3356 } while (0);
36439832 3357 qla2x00_handle_mbx_completion(ha, status);
0f19bc68 3358 spin_unlock_irqrestore(&ha->hardware_lock, flags);
a8488abe 3359
1073daa4
QT
3360 if (process_atio) {
3361 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
3362 qlt_24xx_process_atio_queue(vha, 0);
3363 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags);
3364 }
3365
a8488abe
AV
3366 return IRQ_HANDLED;
3367}
3368
d7459527
MH
3369irqreturn_t
3370qla2xxx_msix_rsp_q(int irq, void *dev_id)
3371{
3372 struct qla_hw_data *ha;
3373 struct qla_qpair *qpair;
3374 struct device_reg_24xx __iomem *reg;
3375 unsigned long flags;
3376
3377 qpair = dev_id;
3378 if (!qpair) {
3379 ql_log(ql_log_info, NULL, 0x505b,
3380 "%s: NULL response queue pointer.\n", __func__);
3381 return IRQ_NONE;
3382 }
3383 ha = qpair->hw;
3384
3385 /* Clear the interrupt, if enabled, for this response queue */
3386 if (unlikely(!ha->flags.disable_msix_handshake)) {
3387 reg = &ha->iobase->isp24;
3388 spin_lock_irqsave(&ha->hardware_lock, flags);
3389 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
3390 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3391 }
3392
3393 queue_work(ha->wq, &qpair->q_work);
3394
3395 return IRQ_HANDLED;
3396}
3397
a8488abe
AV
3398/* Interrupt handling helpers. */
3399
3400struct qla_init_msix_entry {
a8488abe 3401 const char *name;
476834c2 3402 irq_handler_t handler;
a8488abe
AV
3403};
3404
44a8f954 3405static const struct qla_init_msix_entry msix_entries[] = {
e326d22a
QT
3406 { "default", qla24xx_msix_default },
3407 { "rsp_q", qla24xx_msix_rsp_q },
3408 { "atio_q", qla83xx_msix_atio_q },
3409 { "qpair_multiq", qla2xxx_msix_rsp_q },
a8488abe
AV
3410};
3411
44a8f954 3412static const struct qla_init_msix_entry qla82xx_msix_entries[] = {
a9083016
GM
3413 { "qla2xxx (default)", qla82xx_msix_default },
3414 { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q },
3415};
3416
a8488abe 3417static int
73208dfd 3418qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
a8488abe
AV
3419{
3420 int i, ret;
a8488abe 3421 struct qla_msix_entry *qentry;
7c3df132 3422 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
67f2db87 3423 int min_vecs = QLA_BASE_VECTORS;
17e5fc58
CH
3424 struct irq_affinity desc = {
3425 .pre_vectors = QLA_BASE_VECTORS,
3426 };
3427
c9558869
HM
3428 if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) &&
3429 IS_ATIO_MSIX_CAPABLE(ha)) {
17e5fc58 3430 desc.pre_vectors++;
67f2db87
MH
3431 min_vecs++;
3432 }
17e5fc58 3433
f3e02695 3434 if (USER_CTRL_IRQ(ha) || !ha->mqiobase) {
09620eeb
QT
3435 /* user wants to control IRQ setting for target mode */
3436 ret = pci_alloc_irq_vectors(ha->pdev, min_vecs,
3437 ha->msix_count, PCI_IRQ_MSIX);
3438 } else
3439 ret = pci_alloc_irq_vectors_affinity(ha->pdev, min_vecs,
3440 ha->msix_count, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY,
3441 &desc);
73208dfd 3442
84e32a06
AG
3443 if (ret < 0) {
3444 ql_log(ql_log_fatal, vha, 0x00c7,
3445 "MSI-X: Failed to enable support, "
3446 "giving up -- %d/%d.\n",
3447 ha->msix_count, ret);
3448 goto msix_out;
3449 } else if (ret < ha->msix_count) {
7c3df132
SK
3450 ql_log(ql_log_warn, vha, 0x00c6,
3451 "MSI-X: Failed to enable support "
d7459527
MH
3452 "with %d vectors, using %d vectors.\n",
3453 ha->msix_count, ret);
cb43285f 3454 ha->msix_count = ret;
d7459527 3455 /* Recalculate queue values */
c38d1baf 3456 if (ha->mqiobase && (ql2xmqsupport || ql2xnvmeenable)) {
d7459527
MH
3457 ha->max_req_queues = ha->msix_count - 1;
3458
3459 /* ATIOQ needs 1 vector. That's 1 less QPair */
3460 if (QLA_TGT_MODE_ENABLED())
3461 ha->max_req_queues--;
3462
3463 ha->max_rsp_queues = ha->max_req_queues;
3464
3465 ha->max_qpairs = ha->max_req_queues - 1;
3466 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0190,
3467 "Adjusted Max no of queues pairs: %d.\n", ha->max_qpairs);
3468 }
73208dfd 3469 }
f0783d43 3470 vha->irq_offset = desc.pre_vectors;
6396bb22
KC
3471 ha->msix_entries = kcalloc(ha->msix_count,
3472 sizeof(struct qla_msix_entry),
3473 GFP_KERNEL);
73208dfd 3474 if (!ha->msix_entries) {
7c3df132
SK
3475 ql_log(ql_log_fatal, vha, 0x00c8,
3476 "Failed to allocate memory for ha->msix_entries.\n");
73208dfd 3477 ret = -ENOMEM;
a8488abe
AV
3478 goto msix_out;
3479 }
3480 ha->flags.msix_enabled = 1;
3481
73208dfd
AC
3482 for (i = 0; i < ha->msix_count; i++) {
3483 qentry = &ha->msix_entries[i];
4fa18345
MH
3484 qentry->vector = pci_irq_vector(ha->pdev, i);
3485 qentry->entry = i;
a8488abe 3486 qentry->have_irq = 0;
d7459527 3487 qentry->in_use = 0;
4fa18345 3488 qentry->handle = NULL;
a8488abe
AV
3489 }
3490
2afa19a9 3491 /* Enable MSI-X vectors for the base queue */
17e5fc58 3492 for (i = 0; i < QLA_BASE_VECTORS; i++) {
2afa19a9 3493 qentry = &ha->msix_entries[i];
4fa18345 3494 qentry->handle = rsp;
ef8d1d51 3495 rsp->msix = qentry;
d7459527 3496 scnprintf(qentry->name, sizeof(qentry->name),
e326d22a 3497 "qla2xxx%lu_%s", vha->host_no, msix_entries[i].name);
f324777e 3498 if (IS_P3P_TYPE(ha))
a9083016
GM
3499 ret = request_irq(qentry->vector,
3500 qla82xx_msix_entries[i].handler,
3501 0, qla82xx_msix_entries[i].name, rsp);
f324777e 3502 else
a9083016
GM
3503 ret = request_irq(qentry->vector,
3504 msix_entries[i].handler,
e326d22a 3505 0, qentry->name, rsp);
f324777e
CD
3506 if (ret)
3507 goto msix_register_fail;
3508 qentry->have_irq = 1;
093df737 3509 qentry->in_use = 1;
f324777e
CD
3510 }
3511
3512 /*
3513 * If target mode is enable, also request the vector for the ATIO
3514 * queue.
3515 */
c9558869
HM
3516 if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) &&
3517 IS_ATIO_MSIX_CAPABLE(ha)) {
093df737 3518 qentry = &ha->msix_entries[QLA_ATIO_VECTOR];
ef8d1d51 3519 rsp->msix = qentry;
d7459527
MH
3520 qentry->handle = rsp;
3521 scnprintf(qentry->name, sizeof(qentry->name),
e326d22a
QT
3522 "qla2xxx%lu_%s", vha->host_no,
3523 msix_entries[QLA_ATIO_VECTOR].name);
093df737 3524 qentry->in_use = 1;
f324777e 3525 ret = request_irq(qentry->vector,
093df737 3526 msix_entries[QLA_ATIO_VECTOR].handler,
e326d22a 3527 0, qentry->name, rsp);
2afa19a9 3528 qentry->have_irq = 1;
73208dfd 3529 }
73208dfd 3530
f324777e
CD
3531msix_register_fail:
3532 if (ret) {
3533 ql_log(ql_log_fatal, vha, 0x00cb,
3534 "MSI-X: unable to register handler -- %x/%d.\n",
3535 qentry->vector, ret);
4fa18345 3536 qla2x00_free_irqs(vha);
f324777e
CD
3537 ha->mqenable = 0;
3538 goto msix_out;
3539 }
3540
73208dfd 3541 /* Enable MSI-X vector for response queue update for queue 0 */
b7edfa23 3542 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
6246b8a1 3543 if (ha->msixbase && ha->mqiobase &&
d7459527
MH
3544 (ha->max_rsp_queues > 1 || ha->max_req_queues > 1 ||
3545 ql2xmqsupport))
6246b8a1
GM
3546 ha->mqenable = 1;
3547 } else
d7459527
MH
3548 if (ha->mqiobase &&
3549 (ha->max_rsp_queues > 1 || ha->max_req_queues > 1 ||
3550 ql2xmqsupport))
6246b8a1 3551 ha->mqenable = 1;
7c3df132
SK
3552 ql_dbg(ql_dbg_multiq, vha, 0xc005,
3553 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
3554 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
3555 ql_dbg(ql_dbg_init, vha, 0x0055,
3556 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
3557 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
73208dfd 3558
a8488abe
AV
3559msix_out:
3560 return ret;
3561}
3562
3563int
73208dfd 3564qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp)
a8488abe 3565{
7fa3e239 3566 int ret = QLA_FUNCTION_FAILED;
f73cb695 3567 device_reg_t *reg = ha->iobase;
7c3df132 3568 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
a8488abe
AV
3569
3570 /* If possible, enable MSI-X. */
e7240af5
HM
3571 if (ql2xenablemsix == 0 || (!IS_QLA2432(ha) && !IS_QLA2532(ha) &&
3572 !IS_QLA8432(ha) && !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha) &&
3573 !IS_QLAFX00(ha) && !IS_QLA27XX(ha)))
6377a7ae
BH
3574 goto skip_msi;
3575
e7240af5
HM
3576 if (ql2xenablemsix == 2)
3577 goto skip_msix;
3578
6377a7ae
BH
3579 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
3580 (ha->pdev->subsystem_device == 0x7040 ||
3581 ha->pdev->subsystem_device == 0x7041 ||
3582 ha->pdev->subsystem_device == 0x1705)) {
7c3df132
SK
3583 ql_log(ql_log_warn, vha, 0x0034,
3584 "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n",
6377a7ae 3585 ha->pdev->subsystem_vendor,
7c3df132 3586 ha->pdev->subsystem_device);
6377a7ae
BH
3587 goto skip_msi;
3588 }
a8488abe 3589
42cd4f5d 3590 if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) {
7c3df132
SK
3591 ql_log(ql_log_warn, vha, 0x0035,
3592 "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n",
42cd4f5d 3593 ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX);
a8488abe
AV
3594 goto skip_msix;
3595 }
3596
73208dfd 3597 ret = qla24xx_enable_msix(ha, rsp);
a8488abe 3598 if (!ret) {
7c3df132
SK
3599 ql_dbg(ql_dbg_init, vha, 0x0036,
3600 "MSI-X: Enabled (0x%X, 0x%X).\n",
3601 ha->chip_revision, ha->fw_attributes);
963b0fdd 3602 goto clear_risc_ints;
a8488abe 3603 }
7fa3e239 3604
a8488abe 3605skip_msix:
cbedb601 3606
7fa3e239
SC
3607 ql_log(ql_log_info, vha, 0x0037,
3608 "Falling back-to MSI mode -%d.\n", ret);
3609
3a03eb79 3610 if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) &&
f73cb695
CD
3611 !IS_QLA8001(ha) && !IS_P3P_TYPE(ha) && !IS_QLAFX00(ha) &&
3612 !IS_QLA27XX(ha))
cbedb601
AV
3613 goto skip_msi;
3614
4fa18345 3615 ret = pci_alloc_irq_vectors(ha->pdev, 1, 1, PCI_IRQ_MSI);
cbedb601 3616 if (!ret) {
7c3df132
SK
3617 ql_dbg(ql_dbg_init, vha, 0x0038,
3618 "MSI: Enabled.\n");
cbedb601 3619 ha->flags.msi_enabled = 1;
a9083016 3620 } else
7c3df132 3621 ql_log(ql_log_warn, vha, 0x0039,
7fa3e239
SC
3622 "Falling back-to INTa mode -- %d.\n", ret);
3623skip_msi:
a033b655
GM
3624
3625 /* Skip INTx on ISP82xx. */
3626 if (!ha->flags.msi_enabled && IS_QLA82XX(ha))
3627 return QLA_FUNCTION_FAILED;
3628
fd34f556 3629 ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler,
7992abfc
MH
3630 ha->flags.msi_enabled ? 0 : IRQF_SHARED,
3631 QLA2XXX_DRIVER_NAME, rsp);
963b0fdd 3632 if (ret) {
7c3df132 3633 ql_log(ql_log_warn, vha, 0x003a,
a8488abe
AV
3634 "Failed to reserve interrupt %d already in use.\n",
3635 ha->pdev->irq);
963b0fdd 3636 goto fail;
8ae6d9c7 3637 } else if (!ha->flags.msi_enabled) {
68d91cbd
SK
3638 ql_dbg(ql_dbg_init, vha, 0x0125,
3639 "INTa mode: Enabled.\n");
8ae6d9c7
GM
3640 ha->flags.mr_intr_valid = 1;
3641 }
7992abfc 3642
963b0fdd 3643clear_risc_ints:
4bb2efc4
JC
3644 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
3645 goto fail;
963b0fdd 3646
c6952483 3647 spin_lock_irq(&ha->hardware_lock);
4bb2efc4 3648 WRT_REG_WORD(&reg->isp.semaphore, 0);
c6952483 3649 spin_unlock_irq(&ha->hardware_lock);
a8488abe 3650
963b0fdd 3651fail:
a8488abe
AV
3652 return ret;
3653}
3654
3655void
e315cd28 3656qla2x00_free_irqs(scsi_qla_host_t *vha)
a8488abe 3657{
e315cd28 3658 struct qla_hw_data *ha = vha->hw;
9a347ff4 3659 struct rsp_que *rsp;
4fa18345
MH
3660 struct qla_msix_entry *qentry;
3661 int i;
9a347ff4
CD
3662
3663 /*
3664 * We need to check that ha->rsp_q_map is valid in case we are called
3665 * from a probe failure context.
3666 */
3667 if (!ha->rsp_q_map || !ha->rsp_q_map[0])
27873de9 3668 goto free_irqs;
9a347ff4 3669 rsp = ha->rsp_q_map[0];
a8488abe 3670
4fa18345
MH
3671 if (ha->flags.msix_enabled) {
3672 for (i = 0; i < ha->msix_count; i++) {
3673 qentry = &ha->msix_entries[i];
3674 if (qentry->have_irq) {
3675 irq_set_affinity_notifier(qentry->vector, NULL);
3676 free_irq(pci_irq_vector(ha->pdev, i), qentry->handle);
3677 }
3678 }
3679 kfree(ha->msix_entries);
3680 ha->msix_entries = NULL;
3681 ha->flags.msix_enabled = 0;
3682 ql_dbg(ql_dbg_init, vha, 0x0042,
3683 "Disabled MSI-X.\n");
3684 } else {
3685 free_irq(pci_irq_vector(ha->pdev, 0), rsp);
3686 }
e315cd28 3687
27873de9 3688free_irqs:
4fa18345 3689 pci_free_irq_vectors(ha->pdev);
a8488abe 3690}
73208dfd 3691
d7459527
MH
3692int qla25xx_request_irq(struct qla_hw_data *ha, struct qla_qpair *qpair,
3693 struct qla_msix_entry *msix, int vector_type)
73208dfd 3694{
44a8f954 3695 const struct qla_init_msix_entry *intr = &msix_entries[vector_type];
7c3df132 3696 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
73208dfd
AC
3697 int ret;
3698
d7459527
MH
3699 scnprintf(msix->name, sizeof(msix->name),
3700 "qla2xxx%lu_qpair%d", vha->host_no, qpair->id);
3701 ret = request_irq(msix->vector, intr->handler, 0, msix->name, qpair);
73208dfd 3702 if (ret) {
7c3df132
SK
3703 ql_log(ql_log_fatal, vha, 0x00e6,
3704 "MSI-X: Unable to register handler -- %x/%d.\n",
3705 msix->vector, ret);
73208dfd
AC
3706 return ret;
3707 }
3708 msix->have_irq = 1;
d7459527 3709 msix->handle = qpair;
73208dfd
AC
3710 return ret;
3711}