Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
fa90c54f | 2 | * QLogic Fibre Channel HBA Driver |
bd21eaf9 | 3 | * Copyright (c) 2003-2014 QLogic Corporation |
1da177e4 | 4 | * |
fa90c54f | 5 | * See LICENSE.qla2xxx for copyright and licensing details. |
1da177e4 LT |
6 | */ |
7 | #include "qla_def.h" | |
73208dfd | 8 | #include "qla_gbl.h" |
1da177e4 LT |
9 | |
10 | #include <linux/delay.h> | |
5a0e3ad6 | 11 | #include <linux/slab.h> |
0107109e | 12 | #include <linux/vmalloc.h> |
1da177e4 LT |
13 | |
14 | #include "qla_devtbl.h" | |
15 | ||
4e08df3f DM |
16 | #ifdef CONFIG_SPARC |
17 | #include <asm/prom.h> | |
4e08df3f DM |
18 | #endif |
19 | ||
2d70c103 NB |
20 | #include <target/target_core_base.h> |
21 | #include "qla_target.h" | |
22 | ||
1da177e4 LT |
23 | /* |
24 | * QLogic ISP2x00 Hardware Support Function Prototypes. | |
25 | */ | |
1da177e4 | 26 | static int qla2x00_isp_firmware(scsi_qla_host_t *); |
1da177e4 | 27 | static int qla2x00_setup_chip(scsi_qla_host_t *); |
1da177e4 LT |
28 | static int qla2x00_fw_ready(scsi_qla_host_t *); |
29 | static int qla2x00_configure_hba(scsi_qla_host_t *); | |
1da177e4 LT |
30 | static int qla2x00_configure_loop(scsi_qla_host_t *); |
31 | static int qla2x00_configure_local_loop(scsi_qla_host_t *); | |
1da177e4 | 32 | static int qla2x00_configure_fabric(scsi_qla_host_t *); |
726b8548 | 33 | static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *); |
1da177e4 | 34 | static int qla2x00_restart_isp(scsi_qla_host_t *); |
1da177e4 | 35 | |
4d4df193 HK |
36 | static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); |
37 | static int qla84xx_init_chip(scsi_qla_host_t *); | |
73208dfd | 38 | static int qla25xx_init_queues(struct qla_hw_data *); |
a5d42f4c | 39 | static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *); |
726b8548 QT |
40 | static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *, |
41 | struct event_arg *); | |
a5d42f4c DG |
42 | static void qla24xx_handle_prli_done_event(struct scsi_qla_host *, |
43 | struct event_arg *); | |
a4239945 | 44 | static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *); |
4d4df193 | 45 | |
ac280b67 AV |
46 | /* SRB Extensions ---------------------------------------------------------- */ |
47 | ||
9ba56b95 | 48 | void |
8e5f4ba0 | 49 | qla2x00_sp_timeout(struct timer_list *t) |
ac280b67 | 50 | { |
8e5f4ba0 | 51 | srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer); |
4916392b | 52 | struct srb_iocb *iocb; |
ac280b67 AV |
53 | struct req_que *req; |
54 | unsigned long flags; | |
bcc71cc3 | 55 | struct qla_hw_data *ha = sp->vha->hw; |
ac280b67 | 56 | |
ef801f07 | 57 | WARN_ON_ONCE(irqs_disabled()); |
bcc71cc3 | 58 | spin_lock_irqsave(&ha->hardware_lock, flags); |
f6145e86 | 59 | req = sp->qpair->req; |
ac280b67 | 60 | req->outstanding_cmds[sp->handle] = NULL; |
9ba56b95 | 61 | iocb = &sp->u.iocb_cmd; |
bcc71cc3 | 62 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
4916392b | 63 | iocb->timeout(sp); |
ac280b67 AV |
64 | } |
65 | ||
9ba56b95 | 66 | void |
25ff6af1 | 67 | qla2x00_sp_free(void *ptr) |
ac280b67 | 68 | { |
25ff6af1 | 69 | srb_t *sp = ptr; |
9ba56b95 | 70 | struct srb_iocb *iocb = &sp->u.iocb_cmd; |
ac280b67 | 71 | |
4d97cc53 | 72 | del_timer(&iocb->timer); |
25ff6af1 | 73 | qla2x00_rel_sp(sp); |
ac280b67 AV |
74 | } |
75 | ||
ac280b67 AV |
76 | /* Asynchronous Login/Logout Routines -------------------------------------- */ |
77 | ||
a9b6f722 | 78 | unsigned long |
5b91490e AV |
79 | qla2x00_get_async_timeout(struct scsi_qla_host *vha) |
80 | { | |
81 | unsigned long tmo; | |
82 | struct qla_hw_data *ha = vha->hw; | |
83 | ||
84 | /* Firmware should use switch negotiated r_a_tov for timeout. */ | |
85 | tmo = ha->r_a_tov / 10 * 2; | |
8ae6d9c7 GM |
86 | if (IS_QLAFX00(ha)) { |
87 | tmo = FX00_DEF_RATOV * 2; | |
88 | } else if (!IS_FWI2_CAPABLE(ha)) { | |
5b91490e AV |
89 | /* |
90 | * Except for earlier ISPs where the timeout is seeded from the | |
91 | * initialization control block. | |
92 | */ | |
93 | tmo = ha->login_timeout; | |
94 | } | |
95 | return tmo; | |
96 | } | |
ac280b67 | 97 | |
726b8548 | 98 | void |
9ba56b95 | 99 | qla2x00_async_iocb_timeout(void *data) |
ac280b67 | 100 | { |
25ff6af1 | 101 | srb_t *sp = data; |
ac280b67 | 102 | fc_port_t *fcport = sp->fcport; |
726b8548 | 103 | struct srb_iocb *lio = &sp->u.iocb_cmd; |
f6145e86 QT |
104 | int rc, h; |
105 | unsigned long flags; | |
ac280b67 | 106 | |
5c25d451 QT |
107 | if (fcport) { |
108 | ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, | |
109 | "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", | |
110 | sp->name, sp->handle, fcport->d_id.b24, fcport->port_name); | |
111 | ||
6d674927 | 112 | fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); |
5c25d451 QT |
113 | } else { |
114 | pr_info("Async-%s timeout - hdl=%x.\n", | |
115 | sp->name, sp->handle); | |
116 | } | |
726b8548 QT |
117 | |
118 | switch (sp->type) { | |
119 | case SRB_LOGIN_CMD: | |
f6145e86 QT |
120 | rc = qla24xx_async_abort_cmd(sp, false); |
121 | if (rc) { | |
122 | /* Retry as needed. */ | |
123 | lio->u.logio.data[0] = MBS_COMMAND_ERROR; | |
124 | lio->u.logio.data[1] = | |
125 | lio->u.logio.flags & SRB_LOGIN_RETRIED ? | |
126 | QLA_LOGIO_LOGIN_RETRIED : 0; | |
127 | spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); | |
128 | for (h = 1; h < sp->qpair->req->num_outstanding_cmds; | |
129 | h++) { | |
130 | if (sp->qpair->req->outstanding_cmds[h] == | |
131 | sp) { | |
132 | sp->qpair->req->outstanding_cmds[h] = | |
133 | NULL; | |
134 | break; | |
135 | } | |
136 | } | |
137 | spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); | |
138 | sp->done(sp, QLA_FUNCTION_TIMEOUT); | |
139 | } | |
726b8548 QT |
140 | break; |
141 | case SRB_LOGOUT_CMD: | |
726b8548 QT |
142 | case SRB_CT_PTHRU_CMD: |
143 | case SRB_MB_IOCB: | |
144 | case SRB_NACK_PLOGI: | |
145 | case SRB_NACK_PRLI: | |
146 | case SRB_NACK_LOGO: | |
2853192e | 147 | case SRB_CTRL_VP: |
f6145e86 QT |
148 | rc = qla24xx_async_abort_cmd(sp, false); |
149 | if (rc) { | |
150 | spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); | |
151 | for (h = 1; h < sp->qpair->req->num_outstanding_cmds; | |
152 | h++) { | |
153 | if (sp->qpair->req->outstanding_cmds[h] == | |
154 | sp) { | |
155 | sp->qpair->req->outstanding_cmds[h] = | |
156 | NULL; | |
157 | break; | |
158 | } | |
159 | } | |
160 | spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); | |
161 | sp->done(sp, QLA_FUNCTION_TIMEOUT); | |
162 | } | |
726b8548 | 163 | break; |
6ac52608 | 164 | } |
ac280b67 AV |
165 | } |
166 | ||
99b0bec7 | 167 | static void |
25ff6af1 | 168 | qla2x00_async_login_sp_done(void *ptr, int res) |
99b0bec7 | 169 | { |
25ff6af1 JC |
170 | srb_t *sp = ptr; |
171 | struct scsi_qla_host *vha = sp->vha; | |
9ba56b95 | 172 | struct srb_iocb *lio = &sp->u.iocb_cmd; |
726b8548 | 173 | struct event_arg ea; |
9ba56b95 | 174 | |
83548fe2 | 175 | ql_dbg(ql_dbg_disc, vha, 0x20dd, |
25ff6af1 | 176 | "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); |
726b8548 | 177 | |
6d674927 QT |
178 | sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); |
179 | ||
726b8548 QT |
180 | if (!test_bit(UNLOADING, &vha->dpc_flags)) { |
181 | memset(&ea, 0, sizeof(ea)); | |
182 | ea.event = FCME_PLOGI_DONE; | |
183 | ea.fcport = sp->fcport; | |
184 | ea.data[0] = lio->u.logio.data[0]; | |
185 | ea.data[1] = lio->u.logio.data[1]; | |
186 | ea.iop[0] = lio->u.logio.iop[0]; | |
187 | ea.iop[1] = lio->u.logio.iop[1]; | |
188 | ea.sp = sp; | |
189 | qla2x00_fcport_event_handler(vha, &ea); | |
190 | } | |
9ba56b95 | 191 | |
25ff6af1 | 192 | sp->free(sp); |
99b0bec7 AV |
193 | } |
194 | ||
48acad09 QT |
195 | static inline bool |
196 | fcport_is_smaller(fc_port_t *fcport) | |
197 | { | |
198 | if (wwn_to_u64(fcport->port_name) < | |
199 | wwn_to_u64(fcport->vha->port_name)) | |
200 | return true; | |
201 | else | |
202 | return false; | |
203 | } | |
204 | ||
205 | static inline bool | |
206 | fcport_is_bigger(fc_port_t *fcport) | |
207 | { | |
208 | return !fcport_is_smaller(fcport); | |
209 | } | |
210 | ||
ac280b67 AV |
211 | int |
212 | qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, | |
213 | uint16_t *data) | |
214 | { | |
ac280b67 | 215 | srb_t *sp; |
4916392b | 216 | struct srb_iocb *lio; |
726b8548 QT |
217 | int rval = QLA_FUNCTION_FAILED; |
218 | ||
219 | if (!vha->flags.online) | |
220 | goto done; | |
221 | ||
9ba56b95 | 222 | sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); |
ac280b67 AV |
223 | if (!sp) |
224 | goto done; | |
225 | ||
726b8548 QT |
226 | fcport->flags |= FCF_ASYNC_SENT; |
227 | fcport->logout_completed = 0; | |
228 | ||
a4239945 | 229 | fcport->disc_state = DSC_LOGIN_PEND; |
9ba56b95 GM |
230 | sp->type = SRB_LOGIN_CMD; |
231 | sp->name = "login"; | |
a4239945 QT |
232 | sp->gen1 = fcport->rscn_gen; |
233 | sp->gen2 = fcport->login_gen; | |
9ba56b95 GM |
234 | |
235 | lio = &sp->u.iocb_cmd; | |
3822263e | 236 | lio->timeout = qla2x00_async_iocb_timeout; |
e74e7d95 BH |
237 | qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); |
238 | ||
9ba56b95 | 239 | sp->done = qla2x00_async_login_sp_done; |
835aa4f2 | 240 | if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) |
48acad09 | 241 | lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY; |
835aa4f2 | 242 | else |
48acad09 | 243 | lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; |
a5d42f4c | 244 | |
835aa4f2 GM |
245 | if (fcport->fc4f_nvme) |
246 | lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI; | |
a5d42f4c | 247 | |
9fe278f4 GM |
248 | ql_dbg(ql_dbg_disc, vha, 0x2072, |
249 | "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x " | |
250 | "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id, | |
251 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
252 | fcport->login_retry); | |
253 | ||
ac280b67 | 254 | rval = qla2x00_start_sp(sp); |
080c9517 | 255 | if (rval != QLA_SUCCESS) { |
080c9517 CD |
256 | fcport->flags |= FCF_LOGIN_NEEDED; |
257 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
ac280b67 | 258 | goto done_free_sp; |
080c9517 | 259 | } |
ac280b67 | 260 | |
ac280b67 AV |
261 | return rval; |
262 | ||
263 | done_free_sp: | |
25ff6af1 | 264 | sp->free(sp); |
726b8548 | 265 | fcport->flags &= ~FCF_ASYNC_SENT; |
3dbec59b | 266 | done: |
fa83e658 | 267 | fcport->flags &= ~FCF_ASYNC_ACTIVE; |
ac280b67 AV |
268 | return rval; |
269 | } | |
270 | ||
99b0bec7 | 271 | static void |
25ff6af1 | 272 | qla2x00_async_logout_sp_done(void *ptr, int res) |
99b0bec7 | 273 | { |
25ff6af1 | 274 | srb_t *sp = ptr; |
9ba56b95 | 275 | |
6d674927 | 276 | sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); |
eaf75d18 QT |
277 | sp->fcport->login_gen++; |
278 | qlt_logo_completion_handler(sp->fcport, res); | |
25ff6af1 | 279 | sp->free(sp); |
99b0bec7 AV |
280 | } |
281 | ||
ac280b67 AV |
282 | int |
283 | qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) | |
284 | { | |
ac280b67 | 285 | srb_t *sp; |
4916392b | 286 | struct srb_iocb *lio; |
3dbec59b QT |
287 | int rval = QLA_FUNCTION_FAILED; |
288 | ||
289 | if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) | |
290 | return rval; | |
ac280b67 | 291 | |
726b8548 | 292 | fcport->flags |= FCF_ASYNC_SENT; |
9ba56b95 | 293 | sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); |
ac280b67 AV |
294 | if (!sp) |
295 | goto done; | |
296 | ||
9ba56b95 GM |
297 | sp->type = SRB_LOGOUT_CMD; |
298 | sp->name = "logout"; | |
9ba56b95 GM |
299 | |
300 | lio = &sp->u.iocb_cmd; | |
3822263e | 301 | lio->timeout = qla2x00_async_iocb_timeout; |
e74e7d95 BH |
302 | qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); |
303 | ||
9ba56b95 | 304 | sp->done = qla2x00_async_logout_sp_done; |
ac280b67 | 305 | |
7c3df132 | 306 | ql_dbg(ql_dbg_disc, vha, 0x2070, |
726b8548 | 307 | "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n", |
cfb0919c | 308 | sp->handle, fcport->loop_id, fcport->d_id.b.domain, |
726b8548 QT |
309 | fcport->d_id.b.area, fcport->d_id.b.al_pa, |
310 | fcport->port_name); | |
9fe278f4 GM |
311 | |
312 | rval = qla2x00_start_sp(sp); | |
313 | if (rval != QLA_SUCCESS) | |
314 | goto done_free_sp; | |
ac280b67 AV |
315 | return rval; |
316 | ||
317 | done_free_sp: | |
25ff6af1 | 318 | sp->free(sp); |
ac280b67 | 319 | done: |
fa83e658 | 320 | fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); |
ac280b67 AV |
321 | return rval; |
322 | } | |
11aea16a QT |
323 | |
324 | void | |
325 | qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport, | |
326 | uint16_t *data) | |
327 | { | |
fa83e658 | 328 | fcport->flags &= ~FCF_ASYNC_ACTIVE; |
11aea16a QT |
329 | /* Don't re-login in target mode */ |
330 | if (!fcport->tgt_session) | |
331 | qla2x00_mark_device_lost(vha, fcport, 1, 0); | |
332 | qlt_logo_completion_handler(fcport, data[0]); | |
333 | } | |
334 | ||
335 | static void | |
336 | qla2x00_async_prlo_sp_done(void *s, int res) | |
337 | { | |
338 | srb_t *sp = (srb_t *)s; | |
339 | struct srb_iocb *lio = &sp->u.iocb_cmd; | |
340 | struct scsi_qla_host *vha = sp->vha; | |
341 | ||
fa83e658 | 342 | sp->fcport->flags &= ~FCF_ASYNC_ACTIVE; |
11aea16a QT |
343 | if (!test_bit(UNLOADING, &vha->dpc_flags)) |
344 | qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport, | |
345 | lio->u.logio.data); | |
346 | sp->free(sp); | |
347 | } | |
348 | ||
349 | int | |
350 | qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport) | |
351 | { | |
352 | srb_t *sp; | |
353 | struct srb_iocb *lio; | |
354 | int rval; | |
355 | ||
356 | rval = QLA_FUNCTION_FAILED; | |
357 | sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); | |
358 | if (!sp) | |
359 | goto done; | |
360 | ||
361 | sp->type = SRB_PRLO_CMD; | |
362 | sp->name = "prlo"; | |
11aea16a QT |
363 | |
364 | lio = &sp->u.iocb_cmd; | |
365 | lio->timeout = qla2x00_async_iocb_timeout; | |
e74e7d95 BH |
366 | qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); |
367 | ||
11aea16a | 368 | sp->done = qla2x00_async_prlo_sp_done; |
11aea16a QT |
369 | |
370 | ql_dbg(ql_dbg_disc, vha, 0x2070, | |
371 | "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", | |
372 | sp->handle, fcport->loop_id, fcport->d_id.b.domain, | |
373 | fcport->d_id.b.area, fcport->d_id.b.al_pa); | |
f233e8c0 BK |
374 | |
375 | rval = qla2x00_start_sp(sp); | |
376 | if (rval != QLA_SUCCESS) | |
377 | goto done_free_sp; | |
378 | ||
11aea16a QT |
379 | return rval; |
380 | ||
381 | done_free_sp: | |
382 | sp->free(sp); | |
383 | done: | |
fa83e658 | 384 | fcport->flags &= ~FCF_ASYNC_ACTIVE; |
11aea16a QT |
385 | return rval; |
386 | } | |
387 | ||
f13515ac QT |
388 | static |
389 | void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea) | |
390 | { | |
0616e965 QT |
391 | struct fc_port *fcport = ea->fcport; |
392 | ||
393 | ql_dbg(ql_dbg_disc, vha, 0x20d2, | |
394 | "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n", | |
395 | __func__, fcport->port_name, fcport->disc_state, | |
396 | fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2, | |
397 | fcport->rscn_gen, ea->sp->gen1, fcport->loop_id); | |
398 | ||
399 | if (ea->data[0] != MBS_COMMAND_COMPLETE) { | |
a4239945 QT |
400 | ql_dbg(ql_dbg_disc, vha, 0x2066, |
401 | "%s %8phC: adisc fail: post delete\n", | |
402 | __func__, ea->fcport->port_name); | |
2d3fdbeb QT |
403 | /* deleted = 0 & logout_on_delete = force fw cleanup */ |
404 | fcport->deleted = 0; | |
405 | fcport->logout_on_delete = 1; | |
94cff6e1 | 406 | qlt_schedule_sess_for_deletion(ea->fcport); |
a4239945 QT |
407 | return; |
408 | } | |
a4239945 QT |
409 | |
410 | if (ea->fcport->disc_state == DSC_DELETE_PEND) | |
411 | return; | |
412 | ||
413 | if (ea->sp->gen2 != ea->fcport->login_gen) { | |
414 | /* target side must have changed it. */ | |
415 | ql_dbg(ql_dbg_disc, vha, 0x20d3, | |
0616e965 QT |
416 | "%s %8phC generation changed\n", |
417 | __func__, ea->fcport->port_name); | |
a4239945 QT |
418 | return; |
419 | } else if (ea->sp->gen1 != ea->fcport->rscn_gen) { | |
d4f7a16a | 420 | qla_rscn_replay(fcport); |
861d483d | 421 | qlt_schedule_sess_for_deletion(fcport); |
a4239945 QT |
422 | return; |
423 | } | |
424 | ||
425 | __qla24xx_handle_gpdb_event(vha, ea); | |
f13515ac | 426 | } |
ac280b67 | 427 | |
8f9a2148 | 428 | static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport) |
8777e431 QT |
429 | { |
430 | struct qla_work_evt *e; | |
431 | ||
432 | e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI); | |
433 | if (!e) | |
434 | return QLA_FUNCTION_FAILED; | |
435 | ||
436 | e->u.fcport.fcport = fcport; | |
437 | fcport->flags |= FCF_ASYNC_ACTIVE; | |
438 | return qla2x00_post_work(vha, e); | |
439 | } | |
440 | ||
5ff1d584 | 441 | static void |
25ff6af1 | 442 | qla2x00_async_adisc_sp_done(void *ptr, int res) |
5ff1d584 | 443 | { |
25ff6af1 JC |
444 | srb_t *sp = ptr; |
445 | struct scsi_qla_host *vha = sp->vha; | |
f13515ac | 446 | struct event_arg ea; |
0616e965 | 447 | struct srb_iocb *lio = &sp->u.iocb_cmd; |
f13515ac QT |
448 | |
449 | ql_dbg(ql_dbg_disc, vha, 0x2066, | |
450 | "Async done-%s res %x %8phC\n", | |
451 | sp->name, res, sp->fcport->port_name); | |
452 | ||
15b6c3c9 | 453 | sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); |
fa83e658 | 454 | |
f13515ac QT |
455 | memset(&ea, 0, sizeof(ea)); |
456 | ea.event = FCME_ADISC_DONE; | |
457 | ea.rc = res; | |
0616e965 QT |
458 | ea.data[0] = lio->u.logio.data[0]; |
459 | ea.data[1] = lio->u.logio.data[1]; | |
460 | ea.iop[0] = lio->u.logio.iop[0]; | |
461 | ea.iop[1] = lio->u.logio.iop[1]; | |
f13515ac QT |
462 | ea.fcport = sp->fcport; |
463 | ea.sp = sp; | |
464 | ||
465 | qla2x00_fcport_event_handler(vha, &ea); | |
9ba56b95 | 466 | |
25ff6af1 | 467 | sp->free(sp); |
5ff1d584 AV |
468 | } |
469 | ||
470 | int | |
471 | qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, | |
472 | uint16_t *data) | |
473 | { | |
5ff1d584 | 474 | srb_t *sp; |
4916392b | 475 | struct srb_iocb *lio; |
192c4e9b QT |
476 | int rval = QLA_FUNCTION_FAILED; |
477 | ||
478 | if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) | |
479 | return rval; | |
5ff1d584 | 480 | |
726b8548 | 481 | fcport->flags |= FCF_ASYNC_SENT; |
9ba56b95 | 482 | sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); |
5ff1d584 AV |
483 | if (!sp) |
484 | goto done; | |
485 | ||
9ba56b95 GM |
486 | sp->type = SRB_ADISC_CMD; |
487 | sp->name = "adisc"; | |
9ba56b95 GM |
488 | |
489 | lio = &sp->u.iocb_cmd; | |
3822263e | 490 | lio->timeout = qla2x00_async_iocb_timeout; |
8777e431 QT |
491 | sp->gen1 = fcport->rscn_gen; |
492 | sp->gen2 = fcport->login_gen; | |
e74e7d95 BH |
493 | qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); |
494 | ||
9ba56b95 | 495 | sp->done = qla2x00_async_adisc_sp_done; |
5ff1d584 | 496 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) |
4916392b | 497 | lio->u.logio.flags |= SRB_LOGIN_RETRIED; |
5ff1d584 | 498 | |
7c3df132 | 499 | ql_dbg(ql_dbg_disc, vha, 0x206f, |
f13515ac QT |
500 | "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n", |
501 | sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name); | |
9fe278f4 GM |
502 | |
503 | rval = qla2x00_start_sp(sp); | |
504 | if (rval != QLA_SUCCESS) | |
505 | goto done_free_sp; | |
506 | ||
5ff1d584 AV |
507 | return rval; |
508 | ||
509 | done_free_sp: | |
25ff6af1 | 510 | sp->free(sp); |
5ff1d584 | 511 | done: |
fa83e658 | 512 | fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); |
f13515ac | 513 | qla2x00_post_async_adisc_work(vha, fcport, data); |
726b8548 QT |
514 | return rval; |
515 | } | |
516 | ||
517 | static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, | |
518 | struct event_arg *ea) | |
519 | { | |
520 | fc_port_t *fcport, *conflict_fcport; | |
521 | struct get_name_list_extended *e; | |
522 | u16 i, n, found = 0, loop_id; | |
523 | port_id_t id; | |
524 | u64 wwn; | |
a4239945 QT |
525 | u16 data[2]; |
526 | u8 current_login_state; | |
726b8548 QT |
527 | |
528 | fcport = ea->fcport; | |
f352eeb7 QT |
529 | ql_dbg(ql_dbg_disc, vha, 0xffff, |
530 | "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n", | |
531 | __func__, fcport->port_name, fcport->disc_state, | |
532 | fcport->fw_login_state, ea->rc, | |
533 | fcport->login_gen, fcport->last_login_gen, | |
534 | fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id); | |
726b8548 | 535 | |
a4239945 QT |
536 | if (fcport->disc_state == DSC_DELETE_PEND) |
537 | return; | |
538 | ||
726b8548 QT |
539 | if (ea->rc) { /* rval */ |
540 | if (fcport->login_retry == 0) { | |
83548fe2 QT |
541 | ql_dbg(ql_dbg_disc, vha, 0x20de, |
542 | "GNL failed Port login retry %8phN, retry cnt=%d.\n", | |
543 | fcport->port_name, fcport->login_retry); | |
726b8548 QT |
544 | } |
545 | return; | |
546 | } | |
547 | ||
548 | if (fcport->last_rscn_gen != fcport->rscn_gen) { | |
d4f7a16a | 549 | qla_rscn_replay(fcport); |
861d483d | 550 | qlt_schedule_sess_for_deletion(fcport); |
726b8548 QT |
551 | return; |
552 | } else if (fcport->last_login_gen != fcport->login_gen) { | |
83548fe2 | 553 | ql_dbg(ql_dbg_disc, vha, 0x20e0, |
f352eeb7 QT |
554 | "%s %8phC login gen changed\n", |
555 | __func__, fcport->port_name); | |
726b8548 QT |
556 | return; |
557 | } | |
558 | ||
559 | n = ea->data[0] / sizeof(struct get_name_list_extended); | |
560 | ||
83548fe2 | 561 | ql_dbg(ql_dbg_disc, vha, 0x20e1, |
726b8548 QT |
562 | "%s %d %8phC n %d %02x%02x%02x lid %d \n", |
563 | __func__, __LINE__, fcport->port_name, n, | |
564 | fcport->d_id.b.domain, fcport->d_id.b.area, | |
565 | fcport->d_id.b.al_pa, fcport->loop_id); | |
566 | ||
567 | for (i = 0; i < n; i++) { | |
568 | e = &vha->gnl.l[i]; | |
569 | wwn = wwn_to_u64(e->port_name); | |
48acad09 QT |
570 | id.b.domain = e->port_id[2]; |
571 | id.b.area = e->port_id[1]; | |
572 | id.b.al_pa = e->port_id[0]; | |
573 | id.b.rsvd_1 = 0; | |
726b8548 QT |
574 | |
575 | if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE)) | |
576 | continue; | |
577 | ||
48acad09 QT |
578 | if (IS_SW_RESV_ADDR(id)) |
579 | continue; | |
580 | ||
726b8548 | 581 | found = 1; |
726b8548 QT |
582 | |
583 | loop_id = le16_to_cpu(e->nport_handle); | |
584 | loop_id = (loop_id & 0x7fff); | |
8777e431 QT |
585 | if (fcport->fc4f_nvme) |
586 | current_login_state = e->current_login_state >> 4; | |
587 | else | |
588 | current_login_state = e->current_login_state & 0xf; | |
589 | ||
726b8548 | 590 | |
83548fe2 | 591 | ql_dbg(ql_dbg_disc, vha, 0x20e2, |
8777e431 | 592 | "%s found %8phC CLS [%x|%x] nvme %d ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n", |
83548fe2 QT |
593 | __func__, fcport->port_name, |
594 | e->current_login_state, fcport->fw_login_state, | |
8777e431 | 595 | fcport->fc4f_nvme, id.b.domain, id.b.area, id.b.al_pa, |
83548fe2 QT |
596 | fcport->d_id.b.domain, fcport->d_id.b.area, |
597 | fcport->d_id.b.al_pa, loop_id, fcport->loop_id); | |
726b8548 | 598 | |
48acad09 QT |
599 | switch (fcport->disc_state) { |
600 | case DSC_DELETE_PEND: | |
601 | case DSC_DELETED: | |
602 | break; | |
603 | default: | |
8777e431 QT |
604 | if ((id.b24 != fcport->d_id.b24 && |
605 | fcport->d_id.b24) || | |
606 | (fcport->loop_id != FC_NO_LOOP_ID && | |
607 | fcport->loop_id != loop_id)) { | |
608 | ql_dbg(ql_dbg_disc, vha, 0x20e3, | |
609 | "%s %d %8phC post del sess\n", | |
610 | __func__, __LINE__, fcport->port_name); | |
48acad09 QT |
611 | qlt_schedule_sess_for_deletion(fcport); |
612 | return; | |
613 | } | |
614 | break; | |
726b8548 QT |
615 | } |
616 | ||
617 | fcport->loop_id = loop_id; | |
618 | ||
619 | wwn = wwn_to_u64(fcport->port_name); | |
620 | qlt_find_sess_invalidate_other(vha, wwn, | |
621 | id, loop_id, &conflict_fcport); | |
622 | ||
623 | if (conflict_fcport) { | |
624 | /* | |
625 | * Another share fcport share the same loop_id & | |
626 | * nport id. Conflict fcport needs to finish | |
627 | * cleanup before this fcport can proceed to login. | |
628 | */ | |
629 | conflict_fcport->conflict = fcport; | |
630 | fcport->login_pause = 1; | |
631 | } | |
632 | ||
48acad09 QT |
633 | switch (vha->hw->current_topology) { |
634 | default: | |
635 | switch (current_login_state) { | |
636 | case DSC_LS_PRLI_COMP: | |
637 | ql_dbg(ql_dbg_disc + ql_dbg_verbose, | |
638 | vha, 0x20e4, "%s %d %8phC post gpdb\n", | |
639 | __func__, __LINE__, fcport->port_name); | |
a4239945 | 640 | |
48acad09 QT |
641 | if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) |
642 | fcport->port_type = FCT_INITIATOR; | |
643 | else | |
644 | fcport->port_type = FCT_TARGET; | |
645 | data[0] = data[1] = 0; | |
646 | qla2x00_post_async_adisc_work(vha, fcport, | |
647 | data); | |
648 | break; | |
649 | case DSC_LS_PORT_UNAVAIL: | |
650 | default: | |
ec322937 HM |
651 | if (fcport->loop_id == FC_NO_LOOP_ID) { |
652 | qla2x00_find_new_loop_id(vha, fcport); | |
653 | fcport->fw_login_state = | |
654 | DSC_LS_PORT_UNAVAIL; | |
655 | } | |
656 | ql_dbg(ql_dbg_disc, vha, 0x20e5, | |
657 | "%s %d %8phC\n", __func__, __LINE__, | |
658 | fcport->port_name); | |
48acad09 QT |
659 | qla24xx_fcport_handle_login(vha, fcport); |
660 | break; | |
726b8548 | 661 | } |
726b8548 | 662 | break; |
48acad09 | 663 | case ISP_CFG_N: |
8777e431 QT |
664 | fcport->fw_login_state = current_login_state; |
665 | fcport->d_id = id; | |
48acad09 QT |
666 | switch (current_login_state) { |
667 | case DSC_LS_PRLI_COMP: | |
668 | if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) | |
669 | fcport->port_type = FCT_INITIATOR; | |
670 | else | |
671 | fcport->port_type = FCT_TARGET; | |
672 | ||
673 | data[0] = data[1] = 0; | |
674 | qla2x00_post_async_adisc_work(vha, fcport, | |
675 | data); | |
676 | break; | |
677 | case DSC_LS_PLOGI_COMP: | |
678 | if (fcport_is_bigger(fcport)) { | |
679 | /* local adapter is smaller */ | |
680 | if (fcport->loop_id != FC_NO_LOOP_ID) | |
681 | qla2x00_clear_loop_id(fcport); | |
682 | ||
683 | fcport->loop_id = loop_id; | |
684 | qla24xx_fcport_handle_login(vha, | |
685 | fcport); | |
686 | break; | |
687 | } | |
50435d42 | 688 | /* fall through */ |
48acad09 QT |
689 | default: |
690 | if (fcport_is_smaller(fcport)) { | |
691 | /* local adapter is bigger */ | |
692 | if (fcport->loop_id != FC_NO_LOOP_ID) | |
693 | qla2x00_clear_loop_id(fcport); | |
694 | ||
695 | fcport->loop_id = loop_id; | |
696 | qla24xx_fcport_handle_login(vha, | |
697 | fcport); | |
698 | } | |
699 | break; | |
700 | } | |
701 | break; | |
702 | } /* switch (ha->current_topology) */ | |
726b8548 QT |
703 | } |
704 | ||
705 | if (!found) { | |
48acad09 QT |
706 | switch (vha->hw->current_topology) { |
707 | case ISP_CFG_F: | |
708 | case ISP_CFG_FL: | |
709 | for (i = 0; i < n; i++) { | |
710 | e = &vha->gnl.l[i]; | |
711 | id.b.domain = e->port_id[0]; | |
712 | id.b.area = e->port_id[1]; | |
713 | id.b.al_pa = e->port_id[2]; | |
714 | id.b.rsvd_1 = 0; | |
715 | loop_id = le16_to_cpu(e->nport_handle); | |
716 | ||
717 | if (fcport->d_id.b24 == id.b24) { | |
718 | conflict_fcport = | |
719 | qla2x00_find_fcport_by_wwpn(vha, | |
720 | e->port_name, 0); | |
72f02ba6 LT |
721 | if (conflict_fcport) { |
722 | ql_dbg(ql_dbg_disc + ql_dbg_verbose, | |
723 | vha, 0x20e5, | |
724 | "%s %d %8phC post del sess\n", | |
725 | __func__, __LINE__, | |
726 | conflict_fcport->port_name); | |
727 | qlt_schedule_sess_for_deletion | |
728 | (conflict_fcport); | |
729 | } | |
36eb8ff6 | 730 | } |
48acad09 QT |
731 | /* |
732 | * FW already picked this loop id for | |
733 | * another fcport | |
734 | */ | |
735 | if (fcport->loop_id == loop_id) | |
736 | fcport->loop_id = FC_NO_LOOP_ID; | |
726b8548 | 737 | } |
48acad09 QT |
738 | qla24xx_fcport_handle_login(vha, fcport); |
739 | break; | |
740 | case ISP_CFG_N: | |
8777e431 QT |
741 | fcport->disc_state = DSC_DELETED; |
742 | if (time_after_eq(jiffies, fcport->dm_login_expire)) { | |
743 | if (fcport->n2n_link_reset_cnt < 2) { | |
744 | fcport->n2n_link_reset_cnt++; | |
745 | /* | |
746 | * remote port is not sending PLOGI. | |
747 | * Reset link to kick start his state | |
748 | * machine | |
749 | */ | |
750 | set_bit(N2N_LINK_RESET, | |
751 | &vha->dpc_flags); | |
752 | } else { | |
753 | if (fcport->n2n_chip_reset < 1) { | |
754 | ql_log(ql_log_info, vha, 0x705d, | |
755 | "Chip reset to bring laser down"); | |
756 | set_bit(ISP_ABORT_NEEDED, | |
757 | &vha->dpc_flags); | |
758 | fcport->n2n_chip_reset++; | |
759 | } else { | |
760 | ql_log(ql_log_info, vha, 0x705d, | |
761 | "Remote port %8ph is not coming back\n", | |
762 | fcport->port_name); | |
763 | fcport->scan_state = 0; | |
764 | } | |
765 | } | |
766 | qla2xxx_wake_dpc(vha); | |
767 | } else { | |
768 | /* | |
769 | * report port suppose to do PLOGI. Give him | |
770 | * more time. FW will catch it. | |
771 | */ | |
772 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
773 | } | |
48acad09 QT |
774 | break; |
775 | default: | |
776 | break; | |
726b8548 | 777 | } |
726b8548 QT |
778 | } |
779 | } /* gnl_event */ | |
780 | ||
781 | static void | |
25ff6af1 | 782 | qla24xx_async_gnl_sp_done(void *s, int res) |
726b8548 | 783 | { |
25ff6af1 JC |
784 | struct srb *sp = s; |
785 | struct scsi_qla_host *vha = sp->vha; | |
726b8548 QT |
786 | unsigned long flags; |
787 | struct fc_port *fcport = NULL, *tf; | |
788 | u16 i, n = 0, loop_id; | |
789 | struct event_arg ea; | |
790 | struct get_name_list_extended *e; | |
791 | u64 wwn; | |
792 | struct list_head h; | |
a4239945 | 793 | bool found = false; |
726b8548 | 794 | |
83548fe2 | 795 | ql_dbg(ql_dbg_disc, vha, 0x20e7, |
726b8548 QT |
796 | "Async done-%s res %x mb[1]=%x mb[2]=%x \n", |
797 | sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1], | |
798 | sp->u.iocb_cmd.u.mbx.in_mb[2]); | |
799 | ||
ef801f07 HM |
800 | if (res == QLA_FUNCTION_TIMEOUT) |
801 | return; | |
802 | ||
0aca7784 | 803 | sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE); |
726b8548 QT |
804 | memset(&ea, 0, sizeof(ea)); |
805 | ea.sp = sp; | |
806 | ea.rc = res; | |
807 | ea.event = FCME_GNL_DONE; | |
808 | ||
809 | if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= | |
810 | sizeof(struct get_name_list_extended)) { | |
811 | n = sp->u.iocb_cmd.u.mbx.in_mb[1] / | |
812 | sizeof(struct get_name_list_extended); | |
813 | ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */ | |
814 | } | |
815 | ||
816 | for (i = 0; i < n; i++) { | |
817 | e = &vha->gnl.l[i]; | |
818 | loop_id = le16_to_cpu(e->nport_handle); | |
819 | /* mask out reserve bit */ | |
820 | loop_id = (loop_id & 0x7fff); | |
821 | set_bit(loop_id, vha->hw->loop_id_map); | |
822 | wwn = wwn_to_u64(e->port_name); | |
823 | ||
83548fe2 | 824 | ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8, |
726b8548 QT |
825 | "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n", |
826 | __func__, (void *)&wwn, e->port_id[2], e->port_id[1], | |
827 | e->port_id[0], e->current_login_state, e->last_login_state, | |
828 | (loop_id & 0x7fff)); | |
829 | } | |
830 | ||
0aca7784 | 831 | spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); |
726b8548 QT |
832 | |
833 | INIT_LIST_HEAD(&h); | |
834 | fcport = tf = NULL; | |
835 | if (!list_empty(&vha->gnl.fcports)) | |
836 | list_splice_init(&vha->gnl.fcports, &h); | |
0aca7784 | 837 | spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); |
726b8548 QT |
838 | |
839 | list_for_each_entry_safe(fcport, tf, &h, gnl_entry) { | |
840 | list_del_init(&fcport->gnl_entry); | |
0aca7784 | 841 | spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); |
6d674927 | 842 | fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); |
0aca7784 | 843 | spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); |
726b8548 QT |
844 | ea.fcport = fcport; |
845 | ||
846 | qla2x00_fcport_event_handler(vha, &ea); | |
847 | } | |
848 | ||
a4239945 QT |
849 | /* create new fcport if fw has knowledge of new sessions */ |
850 | for (i = 0; i < n; i++) { | |
851 | port_id_t id; | |
852 | u64 wwnn; | |
853 | ||
854 | e = &vha->gnl.l[i]; | |
855 | wwn = wwn_to_u64(e->port_name); | |
856 | ||
857 | found = false; | |
858 | list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) { | |
859 | if (!memcmp((u8 *)&wwn, fcport->port_name, | |
860 | WWN_SIZE)) { | |
861 | found = true; | |
862 | break; | |
863 | } | |
864 | } | |
865 | ||
cf055fb0 | 866 | id.b.domain = e->port_id[2]; |
a4239945 | 867 | id.b.area = e->port_id[1]; |
cf055fb0 | 868 | id.b.al_pa = e->port_id[0]; |
a4239945 QT |
869 | id.b.rsvd_1 = 0; |
870 | ||
871 | if (!found && wwn && !IS_SW_RESV_ADDR(id)) { | |
872 | ql_dbg(ql_dbg_disc, vha, 0x2065, | |
cf055fb0 QT |
873 | "%s %d %8phC %06x post new sess\n", |
874 | __func__, __LINE__, (u8 *)&wwn, id.b24); | |
a4239945 QT |
875 | wwnn = wwn_to_u64(e->node_name); |
876 | qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn, | |
877 | (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN); | |
878 | } | |
879 | } | |
880 | ||
0aca7784 QT |
881 | spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); |
882 | vha->gnl.sent = 0; | |
726b8548 QT |
883 | spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); |
884 | ||
25ff6af1 | 885 | sp->free(sp); |
726b8548 QT |
886 | } |
887 | ||
888 | int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport) | |
889 | { | |
890 | srb_t *sp; | |
891 | struct srb_iocb *mbx; | |
892 | int rval = QLA_FUNCTION_FAILED; | |
893 | unsigned long flags; | |
894 | u16 *mb; | |
895 | ||
3dbec59b QT |
896 | if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) |
897 | return rval; | |
726b8548 | 898 | |
83548fe2 | 899 | ql_dbg(ql_dbg_disc, vha, 0x20d9, |
726b8548 QT |
900 | "Async-gnlist WWPN %8phC \n", fcport->port_name); |
901 | ||
0aca7784 QT |
902 | spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); |
903 | fcport->flags |= FCF_ASYNC_SENT; | |
726b8548 QT |
904 | fcport->disc_state = DSC_GNL; |
905 | fcport->last_rscn_gen = fcport->rscn_gen; | |
906 | fcport->last_login_gen = fcport->login_gen; | |
907 | ||
908 | list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports); | |
0aca7784 QT |
909 | if (vha->gnl.sent) { |
910 | spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); | |
911 | return QLA_SUCCESS; | |
912 | } | |
913 | vha->gnl.sent = 1; | |
914 | spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); | |
726b8548 QT |
915 | |
916 | sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); | |
917 | if (!sp) | |
918 | goto done; | |
3dbec59b | 919 | |
726b8548 QT |
920 | sp->type = SRB_MB_IOCB; |
921 | sp->name = "gnlist"; | |
922 | sp->gen1 = fcport->rscn_gen; | |
923 | sp->gen2 = fcport->login_gen; | |
924 | ||
e74e7d95 BH |
925 | mbx = &sp->u.iocb_cmd; |
926 | mbx->timeout = qla2x00_async_iocb_timeout; | |
726b8548 QT |
927 | qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2); |
928 | ||
929 | mb = sp->u.iocb_cmd.u.mbx.out_mb; | |
930 | mb[0] = MBC_PORT_NODE_NAME_LIST; | |
931 | mb[1] = BIT_2 | BIT_3; | |
932 | mb[2] = MSW(vha->gnl.ldma); | |
933 | mb[3] = LSW(vha->gnl.ldma); | |
934 | mb[6] = MSW(MSD(vha->gnl.ldma)); | |
935 | mb[7] = LSW(MSD(vha->gnl.ldma)); | |
936 | mb[8] = vha->gnl.size; | |
937 | mb[9] = vha->vp_idx; | |
938 | ||
726b8548 QT |
939 | sp->done = qla24xx_async_gnl_sp_done; |
940 | ||
83548fe2 QT |
941 | ql_dbg(ql_dbg_disc, vha, 0x20da, |
942 | "Async-%s - OUT WWPN %8phC hndl %x\n", | |
943 | sp->name, fcport->port_name, sp->handle); | |
726b8548 | 944 | |
f233e8c0 BK |
945 | rval = qla2x00_start_sp(sp); |
946 | if (rval != QLA_SUCCESS) | |
947 | goto done_free_sp; | |
948 | ||
726b8548 QT |
949 | return rval; |
950 | ||
951 | done_free_sp: | |
25ff6af1 | 952 | sp->free(sp); |
726b8548 | 953 | fcport->flags &= ~FCF_ASYNC_SENT; |
3dbec59b | 954 | done: |
726b8548 QT |
955 | return rval; |
956 | } | |
957 | ||
958 | int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport) | |
959 | { | |
960 | struct qla_work_evt *e; | |
961 | ||
962 | e = qla2x00_alloc_work(vha, QLA_EVT_GNL); | |
963 | if (!e) | |
964 | return QLA_FUNCTION_FAILED; | |
965 | ||
966 | e->u.fcport.fcport = fcport; | |
6d674927 | 967 | fcport->flags |= FCF_ASYNC_ACTIVE; |
726b8548 QT |
968 | return qla2x00_post_work(vha, e); |
969 | } | |
970 | ||
971 | static | |
25ff6af1 | 972 | void qla24xx_async_gpdb_sp_done(void *s, int res) |
726b8548 | 973 | { |
25ff6af1 JC |
974 | struct srb *sp = s; |
975 | struct scsi_qla_host *vha = sp->vha; | |
726b8548 | 976 | struct qla_hw_data *ha = vha->hw; |
726b8548 QT |
977 | fc_port_t *fcport = sp->fcport; |
978 | u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; | |
726b8548 QT |
979 | struct event_arg ea; |
980 | ||
83548fe2 | 981 | ql_dbg(ql_dbg_disc, vha, 0x20db, |
726b8548 QT |
982 | "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n", |
983 | sp->name, res, fcport->port_name, mb[1], mb[2]); | |
984 | ||
bcc71cc3 GM |
985 | if (res == QLA_FUNCTION_TIMEOUT) { |
986 | dma_pool_free(sp->vha->hw->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, | |
987 | sp->u.iocb_cmd.u.mbx.in_dma); | |
988 | return; | |
989 | } | |
990 | ||
ef801f07 | 991 | fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); |
726b8548 QT |
992 | memset(&ea, 0, sizeof(ea)); |
993 | ea.event = FCME_GPDB_DONE; | |
726b8548 QT |
994 | ea.fcport = fcport; |
995 | ea.sp = sp; | |
996 | ||
997 | qla2x00_fcport_event_handler(vha, &ea); | |
998 | ||
999 | dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, | |
1000 | sp->u.iocb_cmd.u.mbx.in_dma); | |
1001 | ||
25ff6af1 | 1002 | sp->free(sp); |
726b8548 QT |
1003 | } |
1004 | ||
a5d42f4c DG |
1005 | static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport) |
1006 | { | |
1007 | struct qla_work_evt *e; | |
1008 | ||
1009 | e = qla2x00_alloc_work(vha, QLA_EVT_PRLI); | |
1010 | if (!e) | |
1011 | return QLA_FUNCTION_FAILED; | |
1012 | ||
1013 | e->u.fcport.fcport = fcport; | |
1014 | ||
1015 | return qla2x00_post_work(vha, e); | |
1016 | } | |
1017 | ||
1018 | static void | |
1019 | qla2x00_async_prli_sp_done(void *ptr, int res) | |
1020 | { | |
1021 | srb_t *sp = ptr; | |
1022 | struct scsi_qla_host *vha = sp->vha; | |
1023 | struct srb_iocb *lio = &sp->u.iocb_cmd; | |
1024 | struct event_arg ea; | |
1025 | ||
1026 | ql_dbg(ql_dbg_disc, vha, 0x2129, | |
1027 | "%s %8phC res %d \n", __func__, | |
1028 | sp->fcport->port_name, res); | |
1029 | ||
1030 | sp->fcport->flags &= ~FCF_ASYNC_SENT; | |
1031 | ||
1032 | if (!test_bit(UNLOADING, &vha->dpc_flags)) { | |
1033 | memset(&ea, 0, sizeof(ea)); | |
1034 | ea.event = FCME_PRLI_DONE; | |
1035 | ea.fcport = sp->fcport; | |
1036 | ea.data[0] = lio->u.logio.data[0]; | |
1037 | ea.data[1] = lio->u.logio.data[1]; | |
1038 | ea.iop[0] = lio->u.logio.iop[0]; | |
1039 | ea.iop[1] = lio->u.logio.iop[1]; | |
1040 | ea.sp = sp; | |
1041 | ||
1042 | qla2x00_fcport_event_handler(vha, &ea); | |
1043 | } | |
1044 | ||
1045 | sp->free(sp); | |
1046 | } | |
1047 | ||
1048 | int | |
1049 | qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport) | |
1050 | { | |
1051 | srb_t *sp; | |
1052 | struct srb_iocb *lio; | |
1053 | int rval = QLA_FUNCTION_FAILED; | |
1054 | ||
1055 | if (!vha->flags.online) | |
1056 | return rval; | |
1057 | ||
1058 | if (fcport->fw_login_state == DSC_LS_PLOGI_PEND || | |
a5d42f4c DG |
1059 | fcport->fw_login_state == DSC_LS_PRLI_PEND) |
1060 | return rval; | |
1061 | ||
1062 | sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); | |
1063 | if (!sp) | |
1064 | return rval; | |
1065 | ||
1066 | fcport->flags |= FCF_ASYNC_SENT; | |
1067 | fcport->logout_completed = 0; | |
1068 | ||
1069 | sp->type = SRB_PRLI_CMD; | |
1070 | sp->name = "prli"; | |
a5d42f4c DG |
1071 | |
1072 | lio = &sp->u.iocb_cmd; | |
1073 | lio->timeout = qla2x00_async_iocb_timeout; | |
e74e7d95 BH |
1074 | qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); |
1075 | ||
a5d42f4c DG |
1076 | sp->done = qla2x00_async_prli_sp_done; |
1077 | lio->u.logio.flags = 0; | |
1078 | ||
1079 | if (fcport->fc4f_nvme) | |
1080 | lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI; | |
1081 | ||
f233e8c0 BK |
1082 | ql_dbg(ql_dbg_disc, vha, 0x211b, |
1083 | "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n", | |
1084 | fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24, | |
1085 | fcport->login_retry, fcport->fc4f_nvme ? "nvme" : "fc"); | |
1086 | ||
a5d42f4c DG |
1087 | rval = qla2x00_start_sp(sp); |
1088 | if (rval != QLA_SUCCESS) { | |
a5d42f4c DG |
1089 | fcport->flags |= FCF_LOGIN_NEEDED; |
1090 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
1091 | goto done_free_sp; | |
1092 | } | |
1093 | ||
a5d42f4c DG |
1094 | return rval; |
1095 | ||
1096 | done_free_sp: | |
1097 | sp->free(sp); | |
1098 | fcport->flags &= ~FCF_ASYNC_SENT; | |
1099 | return rval; | |
1100 | } | |
1101 | ||
a07fc0a4 | 1102 | int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) |
726b8548 QT |
1103 | { |
1104 | struct qla_work_evt *e; | |
1105 | ||
1106 | e = qla2x00_alloc_work(vha, QLA_EVT_GPDB); | |
1107 | if (!e) | |
1108 | return QLA_FUNCTION_FAILED; | |
1109 | ||
1110 | e->u.fcport.fcport = fcport; | |
1111 | e->u.fcport.opt = opt; | |
6d674927 | 1112 | fcport->flags |= FCF_ASYNC_ACTIVE; |
726b8548 QT |
1113 | return qla2x00_post_work(vha, e); |
1114 | } | |
1115 | ||
1116 | int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) | |
1117 | { | |
1118 | srb_t *sp; | |
1119 | struct srb_iocb *mbx; | |
1120 | int rval = QLA_FUNCTION_FAILED; | |
1121 | u16 *mb; | |
1122 | dma_addr_t pd_dma; | |
1123 | struct port_database_24xx *pd; | |
1124 | struct qla_hw_data *ha = vha->hw; | |
1125 | ||
3dbec59b QT |
1126 | if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) |
1127 | return rval; | |
726b8548 | 1128 | |
726b8548 QT |
1129 | fcport->disc_state = DSC_GPDB; |
1130 | ||
1131 | sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); | |
1132 | if (!sp) | |
1133 | goto done; | |
1134 | ||
3dbec59b | 1135 | fcport->flags |= FCF_ASYNC_SENT; |
e0824e69 JC |
1136 | sp->type = SRB_MB_IOCB; |
1137 | sp->name = "gpdb"; | |
1138 | sp->gen1 = fcport->rscn_gen; | |
1139 | sp->gen2 = fcport->login_gen; | |
e74e7d95 BH |
1140 | |
1141 | mbx = &sp->u.iocb_cmd; | |
1142 | mbx->timeout = qla2x00_async_iocb_timeout; | |
e0824e69 JC |
1143 | qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); |
1144 | ||
08eb7f45 | 1145 | pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); |
726b8548 | 1146 | if (pd == NULL) { |
83548fe2 QT |
1147 | ql_log(ql_log_warn, vha, 0xd043, |
1148 | "Failed to allocate port database structure.\n"); | |
726b8548 QT |
1149 | goto done_free_sp; |
1150 | } | |
726b8548 | 1151 | |
726b8548 QT |
1152 | mb = sp->u.iocb_cmd.u.mbx.out_mb; |
1153 | mb[0] = MBC_GET_PORT_DATABASE; | |
1154 | mb[1] = fcport->loop_id; | |
1155 | mb[2] = MSW(pd_dma); | |
1156 | mb[3] = LSW(pd_dma); | |
1157 | mb[6] = MSW(MSD(pd_dma)); | |
1158 | mb[7] = LSW(MSD(pd_dma)); | |
1159 | mb[9] = vha->vp_idx; | |
1160 | mb[10] = opt; | |
1161 | ||
726b8548 QT |
1162 | mbx->u.mbx.in = (void *)pd; |
1163 | mbx->u.mbx.in_dma = pd_dma; | |
1164 | ||
1165 | sp->done = qla24xx_async_gpdb_sp_done; | |
1166 | ||
83548fe2 QT |
1167 | ql_dbg(ql_dbg_disc, vha, 0x20dc, |
1168 | "Async-%s %8phC hndl %x opt %x\n", | |
1169 | sp->name, fcport->port_name, sp->handle, opt); | |
726b8548 | 1170 | |
9fe278f4 GM |
1171 | rval = qla2x00_start_sp(sp); |
1172 | if (rval != QLA_SUCCESS) | |
1173 | goto done_free_sp; | |
726b8548 QT |
1174 | return rval; |
1175 | ||
1176 | done_free_sp: | |
1177 | if (pd) | |
1178 | dma_pool_free(ha->s_dma_pool, pd, pd_dma); | |
1179 | ||
25ff6af1 | 1180 | sp->free(sp); |
726b8548 | 1181 | fcport->flags &= ~FCF_ASYNC_SENT; |
3dbec59b | 1182 | done: |
726b8548 | 1183 | qla24xx_post_gpdb_work(vha, fcport, opt); |
5ff1d584 AV |
1184 | return rval; |
1185 | } | |
1186 | ||
726b8548 | 1187 | static |
a4239945 | 1188 | void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) |
726b8548 | 1189 | { |
726b8548 QT |
1190 | unsigned long flags; |
1191 | ||
726b8548 | 1192 | spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); |
f13515ac | 1193 | ea->fcport->login_gen++; |
726b8548 QT |
1194 | ea->fcport->deleted = 0; |
1195 | ea->fcport->logout_on_delete = 1; | |
1196 | ||
1197 | if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) { | |
1198 | vha->fcport_count++; | |
1199 | ea->fcport->login_succ = 1; | |
1200 | ||
0aca7784 | 1201 | spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); |
cd4ed6b4 | 1202 | qla24xx_sched_upd_fcport(ea->fcport); |
0aca7784 | 1203 | spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); |
414d9ff3 QT |
1204 | } else if (ea->fcport->login_succ) { |
1205 | /* | |
1206 | * We have an existing session. A late RSCN delivery | |
1207 | * must have triggered the session to be re-validate. | |
a4239945 | 1208 | * Session is still valid. |
414d9ff3 | 1209 | */ |
5ef696aa QT |
1210 | ql_dbg(ql_dbg_disc, vha, 0x20d6, |
1211 | "%s %d %8phC session revalidate success\n", | |
a4239945 | 1212 | __func__, __LINE__, ea->fcport->port_name); |
8a7eac2f | 1213 | ea->fcport->disc_state = DSC_LOGIN_COMPLETE; |
726b8548 QT |
1214 | } |
1215 | spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); | |
a4239945 QT |
1216 | } |
1217 | ||
1218 | static | |
1219 | void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) | |
1220 | { | |
a4239945 QT |
1221 | fc_port_t *fcport = ea->fcport; |
1222 | struct port_database_24xx *pd; | |
1223 | struct srb *sp = ea->sp; | |
2b5b9647 | 1224 | uint8_t ls; |
a4239945 QT |
1225 | |
1226 | pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; | |
1227 | ||
1228 | fcport->flags &= ~FCF_ASYNC_SENT; | |
1229 | ||
1230 | ql_dbg(ql_dbg_disc, vha, 0x20d2, | |
8777e431 QT |
1231 | "%s %8phC DS %d LS %d nvme %x rc %d\n", __func__, fcport->port_name, |
1232 | fcport->disc_state, pd->current_login_state, fcport->fc4f_nvme, | |
1233 | ea->rc); | |
a4239945 QT |
1234 | |
1235 | if (fcport->disc_state == DSC_DELETE_PEND) | |
1236 | return; | |
726b8548 | 1237 | |
2b5b9647 DT |
1238 | if (fcport->fc4f_nvme) |
1239 | ls = pd->current_login_state >> 4; | |
1240 | else | |
1241 | ls = pd->current_login_state & 0xf; | |
1242 | ||
d4f7a16a HM |
1243 | if (ea->sp->gen2 != fcport->login_gen) { |
1244 | /* target side must have changed it. */ | |
1245 | ||
1246 | ql_dbg(ql_dbg_disc, vha, 0x20d3, | |
1247 | "%s %8phC generation changed\n", | |
1248 | __func__, fcport->port_name); | |
1249 | return; | |
1250 | } else if (ea->sp->gen1 != fcport->rscn_gen) { | |
1251 | qla_rscn_replay(fcport); | |
861d483d | 1252 | qlt_schedule_sess_for_deletion(fcport); |
d4f7a16a HM |
1253 | return; |
1254 | } | |
1255 | ||
2b5b9647 | 1256 | switch (ls) { |
a4239945 QT |
1257 | case PDS_PRLI_COMPLETE: |
1258 | __qla24xx_parse_gpdb(vha, fcport, pd); | |
1259 | break; | |
1260 | case PDS_PLOGI_PENDING: | |
1261 | case PDS_PLOGI_COMPLETE: | |
1262 | case PDS_PRLI_PENDING: | |
1263 | case PDS_PRLI2_PENDING: | |
8fde6977 QT |
1264 | /* Set discovery state back to GNL to Relogin attempt */ |
1265 | if (qla_dual_mode_enabled(vha) || | |
1266 | qla_ini_mode_enabled(vha)) { | |
1267 | fcport->disc_state = DSC_GNL; | |
1268 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
1269 | } | |
a4239945 QT |
1270 | return; |
1271 | case PDS_LOGO_PENDING: | |
1272 | case PDS_PORT_UNAVAILABLE: | |
1273 | default: | |
1274 | ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n", | |
1275 | __func__, __LINE__, fcport->port_name); | |
d8630bb9 | 1276 | qlt_schedule_sess_for_deletion(fcport); |
a4239945 QT |
1277 | return; |
1278 | } | |
1279 | __qla24xx_handle_gpdb_event(vha, ea); | |
1280 | } /* gpdb event */ | |
9cd883f0 QT |
1281 | |
1282 | static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport) | |
1283 | { | |
1284 | u8 login = 0; | |
040036bb | 1285 | int rc; |
9cd883f0 QT |
1286 | |
1287 | if (qla_tgt_mode_enabled(vha)) | |
1288 | return; | |
1289 | ||
1290 | if (qla_dual_mode_enabled(vha)) { | |
1291 | if (N2N_TOPO(vha->hw)) { | |
1292 | u64 mywwn, wwn; | |
1293 | ||
1294 | mywwn = wwn_to_u64(vha->port_name); | |
1295 | wwn = wwn_to_u64(fcport->port_name); | |
1296 | if (mywwn > wwn) | |
1297 | login = 1; | |
1298 | else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP) | |
1299 | && time_after_eq(jiffies, | |
1300 | fcport->plogi_nack_done_deadline)) | |
1301 | login = 1; | |
1302 | } else { | |
1303 | login = 1; | |
1304 | } | |
1305 | } else { | |
1306 | /* initiator mode */ | |
1307 | login = 1; | |
1308 | } | |
1309 | ||
0754d5e0 QT |
1310 | if (login && fcport->login_retry) { |
1311 | fcport->login_retry--; | |
040036bb QT |
1312 | if (fcport->loop_id == FC_NO_LOOP_ID) { |
1313 | fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; | |
1314 | rc = qla2x00_find_new_loop_id(vha, fcport); | |
1315 | if (rc) { | |
1316 | ql_dbg(ql_dbg_disc, vha, 0x20e6, | |
1317 | "%s %d %8phC post del sess - out of loopid\n", | |
1318 | __func__, __LINE__, fcport->port_name); | |
1319 | fcport->scan_state = 0; | |
94cff6e1 | 1320 | qlt_schedule_sess_for_deletion(fcport); |
040036bb QT |
1321 | return; |
1322 | } | |
1323 | } | |
9cd883f0 QT |
1324 | ql_dbg(ql_dbg_disc, vha, 0x20bf, |
1325 | "%s %d %8phC post login\n", | |
1326 | __func__, __LINE__, fcport->port_name); | |
9cd883f0 QT |
1327 | qla2x00_post_async_login_work(vha, fcport, NULL); |
1328 | } | |
1329 | } | |
1330 | ||
726b8548 QT |
1331 | int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) |
1332 | { | |
f13515ac | 1333 | u16 data[2]; |
a4239945 | 1334 | u64 wwn; |
cd4ed6b4 | 1335 | u16 sec; |
726b8548 | 1336 | |
0754d5e0 QT |
1337 | ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20d8, |
1338 | "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d\n", | |
726b8548 QT |
1339 | __func__, fcport->port_name, fcport->disc_state, |
1340 | fcport->fw_login_state, fcport->login_pause, fcport->flags, | |
1341 | fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen, | |
0754d5e0 | 1342 | fcport->login_gen, fcport->loop_id, fcport->scan_state); |
726b8548 | 1343 | |
a4239945 QT |
1344 | if (fcport->scan_state != QLA_FCPORT_FOUND) |
1345 | return 0; | |
726b8548 | 1346 | |
07ea4b60 HR |
1347 | if ((fcport->loop_id != FC_NO_LOOP_ID) && |
1348 | ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || | |
1349 | (fcport->fw_login_state == DSC_LS_PRLI_PEND))) | |
726b8548 QT |
1350 | return 0; |
1351 | ||
5b33469a | 1352 | if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { |
9cd883f0 QT |
1353 | if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { |
1354 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
5b33469a | 1355 | return 0; |
9cd883f0 | 1356 | } |
5b33469a QT |
1357 | } |
1358 | ||
726b8548 QT |
1359 | /* for pure Target Mode. Login will not be initiated */ |
1360 | if (vha->host->active_mode == MODE_TARGET) | |
1361 | return 0; | |
1362 | ||
1363 | if (fcport->flags & FCF_ASYNC_SENT) { | |
1364 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
1365 | return 0; | |
1366 | } | |
1367 | ||
1368 | switch (fcport->disc_state) { | |
1369 | case DSC_DELETED: | |
a4239945 | 1370 | wwn = wwn_to_u64(fcport->node_name); |
8777e431 QT |
1371 | switch (vha->hw->current_topology) { |
1372 | case ISP_CFG_N: | |
1373 | if (fcport_is_smaller(fcport)) { | |
1374 | /* this adapter is bigger */ | |
1375 | if (fcport->login_retry) { | |
1376 | if (fcport->loop_id == FC_NO_LOOP_ID) { | |
1377 | qla2x00_find_new_loop_id(vha, | |
1378 | fcport); | |
1379 | fcport->fw_login_state = | |
1380 | DSC_LS_PORT_UNAVAIL; | |
1381 | } | |
1382 | fcport->login_retry--; | |
1383 | qla_post_els_plogi_work(vha, fcport); | |
1384 | } else { | |
1385 | ql_log(ql_log_info, vha, 0x705d, | |
1386 | "Unable to reach remote port %8phC", | |
1387 | fcport->port_name); | |
1388 | } | |
1389 | } else { | |
1390 | qla24xx_post_gnl_work(vha, fcport); | |
1391 | } | |
1392 | break; | |
1393 | default: | |
1394 | if (wwn == 0) { | |
1395 | ql_dbg(ql_dbg_disc, vha, 0xffff, | |
1396 | "%s %d %8phC post GNNID\n", | |
1397 | __func__, __LINE__, fcport->port_name); | |
1398 | qla24xx_post_gnnid_work(vha, fcport); | |
1399 | } else if (fcport->loop_id == FC_NO_LOOP_ID) { | |
1400 | ql_dbg(ql_dbg_disc, vha, 0x20bd, | |
1401 | "%s %d %8phC post gnl\n", | |
1402 | __func__, __LINE__, fcport->port_name); | |
1403 | qla24xx_post_gnl_work(vha, fcport); | |
1404 | } else { | |
1405 | qla_chk_n2n_b4_login(vha, fcport); | |
1406 | } | |
1407 | break; | |
726b8548 QT |
1408 | } |
1409 | break; | |
1410 | ||
1411 | case DSC_GNL: | |
8777e431 QT |
1412 | switch (vha->hw->current_topology) { |
1413 | case ISP_CFG_N: | |
1414 | if ((fcport->current_login_state & 0xf) == 0x6) { | |
1415 | ql_dbg(ql_dbg_disc, vha, 0x2118, | |
1416 | "%s %d %8phC post GPDB work\n", | |
1417 | __func__, __LINE__, fcport->port_name); | |
1418 | fcport->chip_reset = | |
1419 | vha->hw->base_qpair->chip_reset; | |
1420 | qla24xx_post_gpdb_work(vha, fcport, 0); | |
1421 | } else { | |
1422 | ql_dbg(ql_dbg_disc, vha, 0x2118, | |
1423 | "%s %d %8phC post NVMe PRLI\n", | |
1424 | __func__, __LINE__, fcport->port_name); | |
1425 | qla24xx_post_prli_work(vha, fcport); | |
1426 | } | |
1427 | break; | |
1428 | default: | |
1429 | if (fcport->login_pause) { | |
1430 | fcport->last_rscn_gen = fcport->rscn_gen; | |
1431 | fcport->last_login_gen = fcport->login_gen; | |
1432 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
1433 | break; | |
1434 | } | |
1435 | qla_chk_n2n_b4_login(vha, fcport); | |
726b8548 QT |
1436 | break; |
1437 | } | |
726b8548 QT |
1438 | break; |
1439 | ||
1440 | case DSC_LOGIN_FAILED: | |
9cd883f0 QT |
1441 | if (N2N_TOPO(vha->hw)) |
1442 | qla_chk_n2n_b4_login(vha, fcport); | |
1443 | else | |
d4f7a16a | 1444 | qlt_schedule_sess_for_deletion(fcport); |
726b8548 QT |
1445 | break; |
1446 | ||
1447 | case DSC_LOGIN_COMPLETE: | |
1448 | /* recheck login state */ | |
f13515ac QT |
1449 | data[0] = data[1] = 0; |
1450 | qla2x00_post_async_adisc_work(vha, fcport, data); | |
726b8548 QT |
1451 | break; |
1452 | ||
1cbc0efc DT |
1453 | case DSC_LOGIN_PEND: |
1454 | if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) | |
1455 | qla24xx_post_prli_work(vha, fcport); | |
1456 | break; | |
1457 | ||
cd4ed6b4 QT |
1458 | case DSC_UPD_FCPORT: |
1459 | sec = jiffies_to_msecs(jiffies - | |
1460 | fcport->jiffies_at_registration)/1000; | |
1461 | if (fcport->sec_since_registration < sec && sec && | |
1462 | !(sec % 60)) { | |
1463 | fcport->sec_since_registration = sec; | |
1464 | ql_dbg(ql_dbg_disc, fcport->vha, 0xffff, | |
1465 | "%s %8phC - Slow Rport registration(%d Sec)\n", | |
1466 | __func__, fcport->port_name, sec); | |
1467 | } | |
1468 | ||
1469 | if (fcport->next_disc_state != DSC_DELETE_PEND) | |
1470 | fcport->next_disc_state = DSC_ADISC; | |
1471 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
1472 | break; | |
1473 | ||
726b8548 QT |
1474 | default: |
1475 | break; | |
1476 | } | |
1477 | ||
1478 | return 0; | |
1479 | } | |
1480 | ||
726b8548 | 1481 | int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id, |
a4239945 | 1482 | u8 *port_name, u8 *node_name, void *pla, u8 fc4_type) |
726b8548 QT |
1483 | { |
1484 | struct qla_work_evt *e; | |
1485 | e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS); | |
1486 | if (!e) | |
1487 | return QLA_FUNCTION_FAILED; | |
1488 | ||
1489 | e->u.new_sess.id = *id; | |
1490 | e->u.new_sess.pla = pla; | |
a4239945 | 1491 | e->u.new_sess.fc4_type = fc4_type; |
726b8548 | 1492 | memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE); |
a4239945 QT |
1493 | if (node_name) |
1494 | memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE); | |
726b8548 QT |
1495 | |
1496 | return qla2x00_post_work(vha, e); | |
1497 | } | |
1498 | ||
726b8548 QT |
1499 | static |
1500 | void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, | |
1501 | struct event_arg *ea) | |
1502 | { | |
1503 | fc_port_t *fcport = ea->fcport; | |
1504 | ||
83548fe2 QT |
1505 | ql_dbg(ql_dbg_disc, vha, 0x2102, |
1506 | "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", | |
1507 | __func__, fcport->port_name, fcport->disc_state, | |
1508 | fcport->fw_login_state, fcport->login_pause, | |
1509 | fcport->deleted, fcport->conflict, | |
1510 | fcport->last_rscn_gen, fcport->rscn_gen, | |
1511 | fcport->last_login_gen, fcport->login_gen, | |
1512 | fcport->flags); | |
726b8548 QT |
1513 | |
1514 | if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || | |
726b8548 QT |
1515 | (fcport->fw_login_state == DSC_LS_PRLI_PEND)) |
1516 | return; | |
1517 | ||
5b33469a | 1518 | if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { |
9cd883f0 QT |
1519 | if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { |
1520 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
5b33469a | 1521 | return; |
9cd883f0 | 1522 | } |
5b33469a QT |
1523 | } |
1524 | ||
726b8548 | 1525 | if (fcport->last_rscn_gen != fcport->rscn_gen) { |
83548fe2 | 1526 | ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gidpn\n", |
726b8548 QT |
1527 | __func__, __LINE__, fcport->port_name); |
1528 | ||
726b8548 QT |
1529 | return; |
1530 | } | |
1531 | ||
1532 | qla24xx_fcport_handle_login(vha, fcport); | |
1533 | } | |
1534 | ||
8777e431 | 1535 | |
8f9a2148 BVA |
1536 | static void qla_handle_els_plogi_done(scsi_qla_host_t *vha, |
1537 | struct event_arg *ea) | |
8777e431 QT |
1538 | { |
1539 | ql_dbg(ql_dbg_disc, vha, 0x2118, | |
1540 | "%s %d %8phC post PRLI\n", | |
1541 | __func__, __LINE__, ea->fcport->port_name); | |
1542 | qla24xx_post_prli_work(vha, ea->fcport); | |
1543 | } | |
1544 | ||
41dc529a | 1545 | void qla2x00_fcport_event_handler(scsi_qla_host_t *vha, struct event_arg *ea) |
726b8548 | 1546 | { |
bee8b846 | 1547 | fc_port_t *fcport; |
726b8548 QT |
1548 | |
1549 | switch (ea->event) { | |
1550 | case FCME_RELOGIN: | |
1551 | if (test_bit(UNLOADING, &vha->dpc_flags)) | |
1552 | return; | |
5ff1d584 | 1553 | |
726b8548 QT |
1554 | qla24xx_handle_relogin_event(vha, ea); |
1555 | break; | |
1556 | case FCME_RSCN: | |
1557 | if (test_bit(UNLOADING, &vha->dpc_flags)) | |
1558 | return; | |
d4f7a16a HM |
1559 | { |
1560 | unsigned long flags; | |
bee8b846 QT |
1561 | fcport = qla2x00_find_fcport_by_nportid |
1562 | (vha, &ea->id, 1); | |
cd4ed6b4 | 1563 | if (fcport) { |
cb873ba4 | 1564 | fcport->scan_needed = 1; |
cd4ed6b4 QT |
1565 | fcport->rscn_gen++; |
1566 | } | |
bee8b846 | 1567 | |
f352eeb7 QT |
1568 | spin_lock_irqsave(&vha->work_lock, flags); |
1569 | if (vha->scan.scan_flags == 0) { | |
1570 | ql_dbg(ql_dbg_disc, vha, 0xffff, | |
1571 | "%s: schedule\n", __func__); | |
1572 | vha->scan.scan_flags |= SF_QUEUED; | |
1573 | schedule_delayed_work(&vha->scan.scan_work, 5); | |
41dc529a | 1574 | } |
f352eeb7 | 1575 | spin_unlock_irqrestore(&vha->work_lock, flags); |
d4f7a16a | 1576 | } |
726b8548 | 1577 | break; |
726b8548 QT |
1578 | case FCME_GNL_DONE: |
1579 | qla24xx_handle_gnl_done_event(vha, ea); | |
1580 | break; | |
1581 | case FCME_GPSC_DONE: | |
a4239945 | 1582 | qla24xx_handle_gpsc_event(vha, ea); |
726b8548 QT |
1583 | break; |
1584 | case FCME_PLOGI_DONE: /* Initiator side sent LLIOCB */ | |
1585 | qla24xx_handle_plogi_done_event(vha, ea); | |
1586 | break; | |
a5d42f4c DG |
1587 | case FCME_PRLI_DONE: |
1588 | qla24xx_handle_prli_done_event(vha, ea); | |
1589 | break; | |
726b8548 QT |
1590 | case FCME_GPDB_DONE: |
1591 | qla24xx_handle_gpdb_event(vha, ea); | |
1592 | break; | |
1593 | case FCME_GPNID_DONE: | |
1594 | qla24xx_handle_gpnid_event(vha, ea); | |
1595 | break; | |
d3bae931 DG |
1596 | case FCME_GFFID_DONE: |
1597 | qla24xx_handle_gffid_event(vha, ea); | |
1598 | break; | |
f13515ac QT |
1599 | case FCME_ADISC_DONE: |
1600 | qla24xx_handle_adisc_event(vha, ea); | |
1601 | break; | |
a4239945 QT |
1602 | case FCME_GNNID_DONE: |
1603 | qla24xx_handle_gnnid_event(vha, ea); | |
1604 | break; | |
1605 | case FCME_GFPNID_DONE: | |
1606 | qla24xx_handle_gfpnid_event(vha, ea); | |
1607 | break; | |
8777e431 QT |
1608 | case FCME_ELS_PLOGI_DONE: |
1609 | qla_handle_els_plogi_done(vha, ea); | |
1610 | break; | |
726b8548 QT |
1611 | default: |
1612 | BUG_ON(1); | |
1613 | break; | |
1614 | } | |
5ff1d584 AV |
1615 | } |
1616 | ||
d4f7a16a HM |
1617 | /* |
1618 | * RSCN(s) came in for this fcport, but the RSCN(s) was not able | |
1619 | * to be consumed by the fcport | |
1620 | */ | |
1621 | void qla_rscn_replay(fc_port_t *fcport) | |
1622 | { | |
1623 | struct event_arg ea; | |
1624 | ||
1625 | switch (fcport->disc_state) { | |
1626 | case DSC_DELETE_PEND: | |
1627 | return; | |
1628 | default: | |
1629 | break; | |
1630 | } | |
1631 | ||
1632 | if (fcport->scan_needed) { | |
1633 | memset(&ea, 0, sizeof(ea)); | |
1634 | ea.event = FCME_RSCN; | |
1635 | ea.id = fcport->d_id; | |
1636 | ea.id.b.rsvd_1 = RSCN_PORT_ADDR; | |
d4f7a16a | 1637 | qla2x00_fcport_event_handler(fcport->vha, &ea); |
861d483d | 1638 | } |
d4f7a16a HM |
1639 | } |
1640 | ||
3822263e | 1641 | static void |
faef62d1 | 1642 | qla2x00_tmf_iocb_timeout(void *data) |
3822263e | 1643 | { |
25ff6af1 | 1644 | srb_t *sp = data; |
faef62d1 | 1645 | struct srb_iocb *tmf = &sp->u.iocb_cmd; |
3822263e | 1646 | |
faef62d1 AB |
1647 | tmf->u.tmf.comp_status = CS_TIMEOUT; |
1648 | complete(&tmf->u.tmf.comp); | |
1649 | } | |
9ba56b95 | 1650 | |
faef62d1 | 1651 | static void |
25ff6af1 | 1652 | qla2x00_tmf_sp_done(void *ptr, int res) |
faef62d1 | 1653 | { |
25ff6af1 | 1654 | srb_t *sp = ptr; |
faef62d1 | 1655 | struct srb_iocb *tmf = &sp->u.iocb_cmd; |
25ff6af1 | 1656 | |
faef62d1 | 1657 | complete(&tmf->u.tmf.comp); |
3822263e MI |
1658 | } |
1659 | ||
1660 | int | |
faef62d1 | 1661 | qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, |
3822263e MI |
1662 | uint32_t tag) |
1663 | { | |
1664 | struct scsi_qla_host *vha = fcport->vha; | |
faef62d1 | 1665 | struct srb_iocb *tm_iocb; |
3822263e | 1666 | srb_t *sp; |
faef62d1 | 1667 | int rval = QLA_FUNCTION_FAILED; |
3822263e | 1668 | |
9ba56b95 | 1669 | sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); |
3822263e MI |
1670 | if (!sp) |
1671 | goto done; | |
1672 | ||
faef62d1 | 1673 | tm_iocb = &sp->u.iocb_cmd; |
9ba56b95 GM |
1674 | sp->type = SRB_TM_CMD; |
1675 | sp->name = "tmf"; | |
e74e7d95 BH |
1676 | |
1677 | tm_iocb->timeout = qla2x00_tmf_iocb_timeout; | |
1678 | init_completion(&tm_iocb->u.tmf.comp); | |
faef62d1 | 1679 | qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); |
e74e7d95 | 1680 | |
faef62d1 AB |
1681 | tm_iocb->u.tmf.flags = flags; |
1682 | tm_iocb->u.tmf.lun = lun; | |
1683 | tm_iocb->u.tmf.data = tag; | |
1684 | sp->done = qla2x00_tmf_sp_done; | |
3822263e | 1685 | |
7c3df132 | 1686 | ql_dbg(ql_dbg_taskm, vha, 0x802f, |
cfb0919c CD |
1687 | "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", |
1688 | sp->handle, fcport->loop_id, fcport->d_id.b.domain, | |
1689 | fcport->d_id.b.area, fcport->d_id.b.al_pa); | |
faef62d1 | 1690 | |
9fe278f4 GM |
1691 | rval = qla2x00_start_sp(sp); |
1692 | if (rval != QLA_SUCCESS) | |
1693 | goto done_free_sp; | |
faef62d1 AB |
1694 | wait_for_completion(&tm_iocb->u.tmf.comp); |
1695 | ||
b4146c49 | 1696 | rval = tm_iocb->u.tmf.data; |
faef62d1 | 1697 | |
b4146c49 AG |
1698 | if (rval != QLA_SUCCESS) { |
1699 | ql_log(ql_log_warn, vha, 0x8030, | |
faef62d1 AB |
1700 | "TM IOCB failed (%x).\n", rval); |
1701 | } | |
1702 | ||
1703 | if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { | |
1704 | flags = tm_iocb->u.tmf.flags; | |
1705 | lun = (uint16_t)tm_iocb->u.tmf.lun; | |
1706 | ||
1707 | /* Issue Marker IOCB */ | |
9eb9c6dc | 1708 | qla2x00_marker(vha, vha->hw->base_qpair, |
92fff53b | 1709 | fcport->loop_id, lun, |
faef62d1 AB |
1710 | flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); |
1711 | } | |
3822263e MI |
1712 | |
1713 | done_free_sp: | |
25ff6af1 | 1714 | sp->free(sp); |
388a4995 | 1715 | fcport->flags &= ~FCF_ASYNC_SENT; |
3822263e MI |
1716 | done: |
1717 | return rval; | |
1718 | } | |
1719 | ||
4440e46d AB |
1720 | static void |
1721 | qla24xx_abort_iocb_timeout(void *data) | |
1722 | { | |
25ff6af1 | 1723 | srb_t *sp = data; |
4440e46d AB |
1724 | struct srb_iocb *abt = &sp->u.iocb_cmd; |
1725 | ||
1726 | abt->u.abt.comp_status = CS_TIMEOUT; | |
f6145e86 | 1727 | sp->done(sp, QLA_FUNCTION_TIMEOUT); |
4440e46d AB |
1728 | } |
1729 | ||
1730 | static void | |
25ff6af1 | 1731 | qla24xx_abort_sp_done(void *ptr, int res) |
4440e46d | 1732 | { |
25ff6af1 | 1733 | srb_t *sp = ptr; |
4440e46d AB |
1734 | struct srb_iocb *abt = &sp->u.iocb_cmd; |
1735 | ||
f6145e86 QT |
1736 | if (del_timer(&sp->u.iocb_cmd.timer)) { |
1737 | if (sp->flags & SRB_WAKEUP_ON_COMP) | |
1738 | complete(&abt->u.abt.comp); | |
1739 | else | |
1740 | sp->free(sp); | |
1741 | } | |
4440e46d AB |
1742 | } |
1743 | ||
15f30a57 | 1744 | int |
f6145e86 | 1745 | qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait) |
4440e46d | 1746 | { |
25ff6af1 | 1747 | scsi_qla_host_t *vha = cmd_sp->vha; |
4440e46d AB |
1748 | struct srb_iocb *abt_iocb; |
1749 | srb_t *sp; | |
1750 | int rval = QLA_FUNCTION_FAILED; | |
1751 | ||
6a629468 | 1752 | sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport, |
97a93cea | 1753 | GFP_ATOMIC); |
4440e46d AB |
1754 | if (!sp) |
1755 | goto done; | |
1756 | ||
1757 | abt_iocb = &sp->u.iocb_cmd; | |
1758 | sp->type = SRB_ABT_CMD; | |
1759 | sp->name = "abort"; | |
49cecca7 | 1760 | sp->qpair = cmd_sp->qpair; |
f6145e86 QT |
1761 | if (wait) |
1762 | sp->flags = SRB_WAKEUP_ON_COMP; | |
e74e7d95 BH |
1763 | |
1764 | abt_iocb->timeout = qla24xx_abort_iocb_timeout; | |
1765 | init_completion(&abt_iocb->u.abt.comp); | |
8bccfe0d QT |
1766 | /* FW can send 2 x ABTS's timeout/20s */ |
1767 | qla2x00_init_timer(sp, 42); | |
e74e7d95 | 1768 | |
4440e46d | 1769 | abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; |
49cecca7 | 1770 | abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id); |
b027a5ac | 1771 | |
4440e46d | 1772 | sp->done = qla24xx_abort_sp_done; |
4440e46d | 1773 | |
4440e46d | 1774 | ql_dbg(ql_dbg_async, vha, 0x507c, |
49cecca7 QT |
1775 | "Abort command issued - hdl=%x, type=%x\n", |
1776 | cmd_sp->handle, cmd_sp->type); | |
4440e46d | 1777 | |
9fe278f4 GM |
1778 | rval = qla2x00_start_sp(sp); |
1779 | if (rval != QLA_SUCCESS) | |
1780 | goto done_free_sp; | |
1781 | ||
f6145e86 QT |
1782 | if (wait) { |
1783 | wait_for_completion(&abt_iocb->u.abt.comp); | |
1784 | rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? | |
1785 | QLA_SUCCESS : QLA_FUNCTION_FAILED; | |
8235f4b5 QT |
1786 | } else { |
1787 | goto done; | |
f6145e86 | 1788 | } |
4440e46d AB |
1789 | |
1790 | done_free_sp: | |
25ff6af1 | 1791 | sp->free(sp); |
4440e46d AB |
1792 | done: |
1793 | return rval; | |
1794 | } | |
1795 | ||
1796 | int | |
1797 | qla24xx_async_abort_command(srb_t *sp) | |
1798 | { | |
1799 | unsigned long flags = 0; | |
1800 | ||
1801 | uint32_t handle; | |
1802 | fc_port_t *fcport = sp->fcport; | |
585def9b | 1803 | struct qla_qpair *qpair = sp->qpair; |
4440e46d | 1804 | struct scsi_qla_host *vha = fcport->vha; |
585def9b | 1805 | struct req_que *req = qpair->req; |
b027a5ac | 1806 | |
585def9b | 1807 | spin_lock_irqsave(qpair->qp_lock_ptr, flags); |
4440e46d AB |
1808 | for (handle = 1; handle < req->num_outstanding_cmds; handle++) { |
1809 | if (req->outstanding_cmds[handle] == sp) | |
1810 | break; | |
1811 | } | |
585def9b QT |
1812 | spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); |
1813 | ||
4440e46d AB |
1814 | if (handle == req->num_outstanding_cmds) { |
1815 | /* Command not found. */ | |
1816 | return QLA_FUNCTION_FAILED; | |
1817 | } | |
1818 | if (sp->type == SRB_FXIOCB_DCMD) | |
1819 | return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, | |
1820 | FXDISC_ABORT_IOCTL); | |
1821 | ||
f6145e86 | 1822 | return qla24xx_async_abort_cmd(sp, true); |
4440e46d AB |
1823 | } |
1824 | ||
a5d42f4c DG |
1825 | static void |
1826 | qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) | |
1827 | { | |
1828 | switch (ea->data[0]) { | |
1829 | case MBS_COMMAND_COMPLETE: | |
1830 | ql_dbg(ql_dbg_disc, vha, 0x2118, | |
1831 | "%s %d %8phC post gpdb\n", | |
1832 | __func__, __LINE__, ea->fcport->port_name); | |
1833 | ||
1834 | ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; | |
1835 | ea->fcport->logout_on_delete = 1; | |
03aaa89f DT |
1836 | ea->fcport->nvme_prli_service_param = ea->iop[0]; |
1837 | if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST) | |
1838 | ea->fcport->nvme_first_burst_size = | |
1839 | (ea->iop[1] & 0xffff) * 512; | |
1840 | else | |
1841 | ea->fcport->nvme_first_burst_size = 0; | |
a5d42f4c DG |
1842 | qla24xx_post_gpdb_work(vha, ea->fcport, 0); |
1843 | break; | |
1844 | default: | |
1cbc0efc DT |
1845 | if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) && |
1846 | (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */ | |
1847 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
1848 | ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP; | |
1849 | break; | |
1850 | } | |
1851 | ||
edd05de1 DG |
1852 | if (ea->fcport->n2n_flag) { |
1853 | ql_dbg(ql_dbg_disc, vha, 0x2118, | |
1854 | "%s %d %8phC post fc4 prli\n", | |
1855 | __func__, __LINE__, ea->fcport->port_name); | |
1856 | ea->fcport->fc4f_nvme = 0; | |
1857 | ea->fcport->n2n_flag = 0; | |
1858 | qla24xx_post_prli_work(vha, ea->fcport); | |
1859 | } | |
a5d42f4c DG |
1860 | ql_dbg(ql_dbg_disc, vha, 0x2119, |
1861 | "%s %d %8phC unhandle event of %x\n", | |
1862 | __func__, __LINE__, ea->fcport->port_name, ea->data[0]); | |
1863 | break; | |
1864 | } | |
1865 | } | |
1866 | ||
726b8548 QT |
1867 | static void |
1868 | qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) | |
ac280b67 | 1869 | { |
726b8548 | 1870 | port_id_t cid; /* conflict Nport id */ |
a084fd68 QT |
1871 | u16 lid; |
1872 | struct fc_port *conflict_fcport; | |
82abdcaf | 1873 | unsigned long flags; |
a4239945 QT |
1874 | struct fc_port *fcport = ea->fcport; |
1875 | ||
f352eeb7 QT |
1876 | ql_dbg(ql_dbg_disc, vha, 0xffff, |
1877 | "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n", | |
1878 | __func__, fcport->port_name, fcport->disc_state, | |
1879 | fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen, | |
861d483d | 1880 | ea->sp->gen1, fcport->rscn_gen, |
f352eeb7 QT |
1881 | ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]); |
1882 | ||
a4239945 QT |
1883 | if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || |
1884 | (fcport->fw_login_state == DSC_LS_PRLI_PEND)) { | |
1885 | ql_dbg(ql_dbg_disc, vha, 0x20ea, | |
1886 | "%s %d %8phC Remote is trying to login\n", | |
1887 | __func__, __LINE__, fcport->port_name); | |
1888 | return; | |
1889 | } | |
1890 | ||
1891 | if (fcport->disc_state == DSC_DELETE_PEND) | |
1892 | return; | |
1893 | ||
1894 | if (ea->sp->gen2 != fcport->login_gen) { | |
1895 | /* target side must have changed it. */ | |
1896 | ql_dbg(ql_dbg_disc, vha, 0x20d3, | |
f352eeb7 QT |
1897 | "%s %8phC generation changed\n", |
1898 | __func__, fcport->port_name); | |
1899 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
a4239945 QT |
1900 | return; |
1901 | } else if (ea->sp->gen1 != fcport->rscn_gen) { | |
861d483d QT |
1902 | ql_dbg(ql_dbg_disc, vha, 0x20d3, |
1903 | "%s %8phC RSCN generation changed\n", | |
1904 | __func__, fcport->port_name); | |
d4f7a16a | 1905 | qla_rscn_replay(fcport); |
861d483d | 1906 | qlt_schedule_sess_for_deletion(fcport); |
a4239945 QT |
1907 | return; |
1908 | } | |
ac280b67 | 1909 | |
726b8548 | 1910 | switch (ea->data[0]) { |
ac280b67 | 1911 | case MBS_COMMAND_COMPLETE: |
a4f92a32 AV |
1912 | /* |
1913 | * Driver must validate login state - If PRLI not complete, | |
1914 | * force a relogin attempt via implicit LOGO, PLOGI, and PRLI | |
1915 | * requests. | |
1916 | */ | |
a5d42f4c DG |
1917 | if (ea->fcport->fc4f_nvme) { |
1918 | ql_dbg(ql_dbg_disc, vha, 0x2117, | |
1919 | "%s %d %8phC post prli\n", | |
1920 | __func__, __LINE__, ea->fcport->port_name); | |
1921 | qla24xx_post_prli_work(vha, ea->fcport); | |
1922 | } else { | |
1923 | ql_dbg(ql_dbg_disc, vha, 0x20ea, | |
a084fd68 QT |
1924 | "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n", |
1925 | __func__, __LINE__, ea->fcport->port_name, | |
1926 | ea->fcport->loop_id, ea->fcport->d_id.b24); | |
1927 | ||
1928 | set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); | |
82abdcaf | 1929 | spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); |
a5d42f4c DG |
1930 | ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; |
1931 | ea->fcport->logout_on_delete = 1; | |
3515832c | 1932 | ea->fcport->send_els_logo = 0; |
82abdcaf QT |
1933 | ea->fcport->fw_login_state = DSC_LS_PRLI_COMP; |
1934 | spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); | |
1935 | ||
a5d42f4c DG |
1936 | qla24xx_post_gpdb_work(vha, ea->fcport, 0); |
1937 | } | |
ac280b67 AV |
1938 | break; |
1939 | case MBS_COMMAND_ERROR: | |
83548fe2 | 1940 | ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n", |
726b8548 QT |
1941 | __func__, __LINE__, ea->fcport->port_name, ea->data[1]); |
1942 | ||
1943 | ea->fcport->flags &= ~FCF_ASYNC_SENT; | |
1944 | ea->fcport->disc_state = DSC_LOGIN_FAILED; | |
1945 | if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED) | |
ac280b67 AV |
1946 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); |
1947 | else | |
726b8548 | 1948 | qla2x00_mark_device_lost(vha, ea->fcport, 1, 0); |
ac280b67 AV |
1949 | break; |
1950 | case MBS_LOOP_ID_USED: | |
726b8548 QT |
1951 | /* data[1] = IO PARAM 1 = nport ID */ |
1952 | cid.b.domain = (ea->iop[1] >> 16) & 0xff; | |
1953 | cid.b.area = (ea->iop[1] >> 8) & 0xff; | |
1954 | cid.b.al_pa = ea->iop[1] & 0xff; | |
1955 | cid.b.rsvd_1 = 0; | |
1956 | ||
83548fe2 | 1957 | ql_dbg(ql_dbg_disc, vha, 0x20ec, |
5c640053 | 1958 | "%s %d %8phC lid %#x in use with pid %06x post gnl\n", |
83548fe2 | 1959 | __func__, __LINE__, ea->fcport->port_name, |
5c640053 | 1960 | ea->fcport->loop_id, cid.b24); |
726b8548 | 1961 | |
5c640053 QT |
1962 | set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); |
1963 | ea->fcport->loop_id = FC_NO_LOOP_ID; | |
726b8548 QT |
1964 | qla24xx_post_gnl_work(vha, ea->fcport); |
1965 | break; | |
1966 | case MBS_PORT_ID_USED: | |
a084fd68 QT |
1967 | lid = ea->iop[1] & 0xffff; |
1968 | qlt_find_sess_invalidate_other(vha, | |
1969 | wwn_to_u64(ea->fcport->port_name), | |
1970 | ea->fcport->d_id, lid, &conflict_fcport); | |
1971 | ||
1972 | if (conflict_fcport) { | |
1973 | /* | |
1974 | * Another fcport share the same loop_id/nport id. | |
1975 | * Conflict fcport needs to finish cleanup before this | |
1976 | * fcport can proceed to login. | |
1977 | */ | |
1978 | conflict_fcport->conflict = ea->fcport; | |
1979 | ea->fcport->login_pause = 1; | |
1980 | ||
1981 | ql_dbg(ql_dbg_disc, vha, 0x20ed, | |
1982 | "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n", | |
1983 | __func__, __LINE__, ea->fcport->port_name, | |
1984 | ea->fcport->d_id.b24, lid); | |
a084fd68 QT |
1985 | } else { |
1986 | ql_dbg(ql_dbg_disc, vha, 0x20ed, | |
1987 | "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n", | |
1988 | __func__, __LINE__, ea->fcport->port_name, | |
1989 | ea->fcport->d_id.b24, lid); | |
1990 | ||
1991 | qla2x00_clear_loop_id(ea->fcport); | |
1992 | set_bit(lid, vha->hw->loop_id_map); | |
1993 | ea->fcport->loop_id = lid; | |
1994 | ea->fcport->keep_nport_handle = 0; | |
94cff6e1 | 1995 | qlt_schedule_sess_for_deletion(ea->fcport); |
a084fd68 | 1996 | } |
ac280b67 AV |
1997 | break; |
1998 | } | |
4916392b | 1999 | return; |
ac280b67 AV |
2000 | } |
2001 | ||
4916392b | 2002 | void |
ac280b67 AV |
2003 | qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, |
2004 | uint16_t *data) | |
2005 | { | |
a6ca8878 | 2006 | qlt_logo_completion_handler(fcport, data[0]); |
726b8548 | 2007 | fcport->login_gen++; |
fa83e658 | 2008 | fcport->flags &= ~FCF_ASYNC_ACTIVE; |
4916392b | 2009 | return; |
ac280b67 AV |
2010 | } |
2011 | ||
1da177e4 LT |
2012 | /****************************************************************************/ |
2013 | /* QLogic ISP2x00 Hardware Support Functions. */ | |
2014 | /****************************************************************************/ | |
2015 | ||
fa492630 | 2016 | static int |
7d613ac6 SV |
2017 | qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) |
2018 | { | |
2019 | int rval = QLA_SUCCESS; | |
2020 | struct qla_hw_data *ha = vha->hw; | |
2021 | uint32_t idc_major_ver, idc_minor_ver; | |
711aa7f7 | 2022 | uint16_t config[4]; |
7d613ac6 SV |
2023 | |
2024 | qla83xx_idc_lock(vha, 0); | |
2025 | ||
2026 | /* SV: TODO: Assign initialization timeout from | |
2027 | * flash-info / other param | |
2028 | */ | |
2029 | ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; | |
2030 | ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; | |
2031 | ||
2032 | /* Set our fcoe function presence */ | |
2033 | if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { | |
2034 | ql_dbg(ql_dbg_p3p, vha, 0xb077, | |
2035 | "Error while setting DRV-Presence.\n"); | |
2036 | rval = QLA_FUNCTION_FAILED; | |
2037 | goto exit; | |
2038 | } | |
2039 | ||
2040 | /* Decide the reset ownership */ | |
2041 | qla83xx_reset_ownership(vha); | |
2042 | ||
2043 | /* | |
2044 | * On first protocol driver load: | |
2045 | * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery | |
2046 | * register. | |
2047 | * Others: Check compatibility with current IDC Major version. | |
2048 | */ | |
2049 | qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); | |
2050 | if (ha->flags.nic_core_reset_owner) { | |
2051 | /* Set IDC Major version */ | |
2052 | idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; | |
2053 | qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); | |
2054 | ||
2055 | /* Clearing IDC-Lock-Recovery register */ | |
2056 | qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); | |
2057 | } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { | |
2058 | /* | |
2059 | * Clear further IDC participation if we are not compatible with | |
2060 | * the current IDC Major Version. | |
2061 | */ | |
2062 | ql_log(ql_log_warn, vha, 0xb07d, | |
2063 | "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", | |
2064 | idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); | |
2065 | __qla83xx_clear_drv_presence(vha); | |
2066 | rval = QLA_FUNCTION_FAILED; | |
2067 | goto exit; | |
2068 | } | |
2069 | /* Each function sets its supported Minor version. */ | |
2070 | qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); | |
2071 | idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); | |
2072 | qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); | |
2073 | ||
711aa7f7 SK |
2074 | if (ha->flags.nic_core_reset_owner) { |
2075 | memset(config, 0, sizeof(config)); | |
2076 | if (!qla81xx_get_port_config(vha, config)) | |
2077 | qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, | |
2078 | QLA8XXX_DEV_READY); | |
2079 | } | |
2080 | ||
7d613ac6 SV |
2081 | rval = qla83xx_idc_state_handler(vha); |
2082 | ||
2083 | exit: | |
2084 | qla83xx_idc_unlock(vha, 0); | |
2085 | ||
2086 | return rval; | |
2087 | } | |
2088 | ||
1da177e4 LT |
2089 | /* |
2090 | * qla2x00_initialize_adapter | |
2091 | * Initialize board. | |
2092 | * | |
2093 | * Input: | |
2094 | * ha = adapter block pointer. | |
2095 | * | |
2096 | * Returns: | |
2097 | * 0 = success | |
2098 | */ | |
2099 | int | |
e315cd28 | 2100 | qla2x00_initialize_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
2101 | { |
2102 | int rval; | |
e315cd28 | 2103 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 2104 | struct req_que *req = ha->req_q_map[0]; |
2533cf67 | 2105 | |
fc90adaf JC |
2106 | memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); |
2107 | memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); | |
2108 | ||
1da177e4 | 2109 | /* Clear adapter flags. */ |
e315cd28 | 2110 | vha->flags.online = 0; |
2533cf67 | 2111 | ha->flags.chip_reset_done = 0; |
e315cd28 | 2112 | vha->flags.reset_active = 0; |
85880801 AV |
2113 | ha->flags.pci_channel_io_perm_failure = 0; |
2114 | ha->flags.eeh_busy = 0; | |
fabbb8df | 2115 | vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); |
e315cd28 AC |
2116 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); |
2117 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
2118 | vha->device_flags = DFLG_NO_CABLE; | |
2119 | vha->dpc_flags = 0; | |
2120 | vha->flags.management_server_logged_in = 0; | |
2121 | vha->marker_needed = 0; | |
1da177e4 LT |
2122 | ha->isp_abort_cnt = 0; |
2123 | ha->beacon_blink_led = 0; | |
2124 | ||
73208dfd AC |
2125 | set_bit(0, ha->req_qid_map); |
2126 | set_bit(0, ha->rsp_qid_map); | |
2127 | ||
cfb0919c | 2128 | ql_dbg(ql_dbg_init, vha, 0x0040, |
7c3df132 | 2129 | "Configuring PCI space...\n"); |
e315cd28 | 2130 | rval = ha->isp_ops->pci_config(vha); |
1da177e4 | 2131 | if (rval) { |
7c3df132 SK |
2132 | ql_log(ql_log_warn, vha, 0x0044, |
2133 | "Unable to configure PCI space.\n"); | |
1da177e4 LT |
2134 | return (rval); |
2135 | } | |
2136 | ||
e315cd28 | 2137 | ha->isp_ops->reset_chip(vha); |
1da177e4 | 2138 | |
e315cd28 | 2139 | rval = qla2xxx_get_flash_info(vha); |
c00d8994 | 2140 | if (rval) { |
7c3df132 SK |
2141 | ql_log(ql_log_fatal, vha, 0x004f, |
2142 | "Unable to validate FLASH data.\n"); | |
7ec0effd AD |
2143 | return rval; |
2144 | } | |
2145 | ||
2146 | if (IS_QLA8044(ha)) { | |
2147 | qla8044_read_reset_template(vha); | |
2148 | ||
2149 | /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. | |
2150 | * If DONRESET_BIT0 is set, drivers should not set dev_state | |
2151 | * to NEED_RESET. But if NEED_RESET is set, drivers should | |
2152 | * should honor the reset. */ | |
2153 | if (ql2xdontresethba == 1) | |
2154 | qla8044_set_idc_dontreset(vha); | |
c00d8994 AV |
2155 | } |
2156 | ||
73208dfd | 2157 | ha->isp_ops->get_flash_version(vha, req->ring); |
cfb0919c | 2158 | ql_dbg(ql_dbg_init, vha, 0x0061, |
7c3df132 | 2159 | "Configure NVRAM parameters...\n"); |
0107109e | 2160 | |
e315cd28 | 2161 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 2162 | |
d4c760c2 AV |
2163 | if (ha->flags.disable_serdes) { |
2164 | /* Mask HBA via NVRAM settings? */ | |
7c3df132 | 2165 | ql_log(ql_log_info, vha, 0x0077, |
7b833558 | 2166 | "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); |
d4c760c2 AV |
2167 | return QLA_FUNCTION_FAILED; |
2168 | } | |
2169 | ||
cfb0919c | 2170 | ql_dbg(ql_dbg_init, vha, 0x0078, |
7c3df132 | 2171 | "Verifying loaded RISC code...\n"); |
1da177e4 | 2172 | |
e315cd28 AC |
2173 | if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { |
2174 | rval = ha->isp_ops->chip_diag(vha); | |
d19044c3 AV |
2175 | if (rval) |
2176 | return (rval); | |
e315cd28 | 2177 | rval = qla2x00_setup_chip(vha); |
d19044c3 AV |
2178 | if (rval) |
2179 | return (rval); | |
1da177e4 | 2180 | } |
a9083016 | 2181 | |
4d4df193 | 2182 | if (IS_QLA84XX(ha)) { |
e315cd28 | 2183 | ha->cs84xx = qla84xx_get_chip(vha); |
4d4df193 | 2184 | if (!ha->cs84xx) { |
7c3df132 | 2185 | ql_log(ql_log_warn, vha, 0x00d0, |
4d4df193 HK |
2186 | "Unable to configure ISP84XX.\n"); |
2187 | return QLA_FUNCTION_FAILED; | |
2188 | } | |
2189 | } | |
2d70c103 | 2190 | |
ead03855 | 2191 | if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) |
2d70c103 NB |
2192 | rval = qla2x00_init_rings(vha); |
2193 | ||
2533cf67 | 2194 | ha->flags.chip_reset_done = 1; |
1da177e4 | 2195 | |
9a069e19 | 2196 | if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { |
6c452a45 | 2197 | /* Issue verify 84xx FW IOCB to complete 84xx initialization */ |
9a069e19 GM |
2198 | rval = qla84xx_init_chip(vha); |
2199 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
2200 | ql_log(ql_log_warn, vha, 0x00d4, |
2201 | "Unable to initialize ISP84XX.\n"); | |
8d2b21db | 2202 | qla84xx_put_chip(vha); |
9a069e19 GM |
2203 | } |
2204 | } | |
2205 | ||
7d613ac6 SV |
2206 | /* Load the NIC Core f/w if we are the first protocol driver. */ |
2207 | if (IS_QLA8031(ha)) { | |
2208 | rval = qla83xx_nic_core_fw_load(vha); | |
2209 | if (rval) | |
2210 | ql_log(ql_log_warn, vha, 0x0124, | |
2211 | "Error in initializing NIC Core f/w.\n"); | |
2212 | } | |
2213 | ||
2f0f3f4f MI |
2214 | if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) |
2215 | qla24xx_read_fcp_prio_cfg(vha); | |
09ff701a | 2216 | |
c46e65c7 JC |
2217 | if (IS_P3P_TYPE(ha)) |
2218 | qla82xx_set_driver_version(vha, QLA2XXX_VERSION); | |
2219 | else | |
2220 | qla25xx_set_driver_version(vha, QLA2XXX_VERSION); | |
2221 | ||
1da177e4 LT |
2222 | return (rval); |
2223 | } | |
2224 | ||
2225 | /** | |
abbd8870 | 2226 | * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. |
2db6228d | 2227 | * @vha: HA context |
1da177e4 LT |
2228 | * |
2229 | * Returns 0 on success. | |
2230 | */ | |
abbd8870 | 2231 | int |
e315cd28 | 2232 | qla2100_pci_config(scsi_qla_host_t *vha) |
1da177e4 | 2233 | { |
a157b101 | 2234 | uint16_t w; |
abbd8870 | 2235 | unsigned long flags; |
e315cd28 | 2236 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 2237 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 2238 | |
1da177e4 | 2239 | pci_set_master(ha->pdev); |
af6177d8 | 2240 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 2241 | |
1da177e4 | 2242 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 2243 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
abbd8870 AV |
2244 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
2245 | ||
737faece | 2246 | pci_disable_rom(ha->pdev); |
1da177e4 LT |
2247 | |
2248 | /* Get PCI bus information. */ | |
2249 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 2250 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
1da177e4 LT |
2251 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
2252 | ||
abbd8870 AV |
2253 | return QLA_SUCCESS; |
2254 | } | |
1da177e4 | 2255 | |
abbd8870 AV |
2256 | /** |
2257 | * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. | |
2db6228d | 2258 | * @vha: HA context |
abbd8870 AV |
2259 | * |
2260 | * Returns 0 on success. | |
2261 | */ | |
2262 | int | |
e315cd28 | 2263 | qla2300_pci_config(scsi_qla_host_t *vha) |
abbd8870 | 2264 | { |
a157b101 | 2265 | uint16_t w; |
abbd8870 AV |
2266 | unsigned long flags = 0; |
2267 | uint32_t cnt; | |
e315cd28 | 2268 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 2269 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 2270 | |
abbd8870 | 2271 | pci_set_master(ha->pdev); |
af6177d8 | 2272 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 2273 | |
abbd8870 | 2274 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 2275 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
1da177e4 | 2276 | |
abbd8870 AV |
2277 | if (IS_QLA2322(ha) || IS_QLA6322(ha)) |
2278 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
a157b101 | 2279 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
1da177e4 | 2280 | |
abbd8870 AV |
2281 | /* |
2282 | * If this is a 2300 card and not 2312, reset the | |
2283 | * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, | |
2284 | * the 2310 also reports itself as a 2300 so we need to get the | |
2285 | * fb revision level -- a 6 indicates it really is a 2300 and | |
2286 | * not a 2310. | |
2287 | */ | |
2288 | if (IS_QLA2300(ha)) { | |
2289 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1da177e4 | 2290 | |
abbd8870 | 2291 | /* Pause RISC. */ |
3d71644c | 2292 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); |
abbd8870 | 2293 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 2294 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) |
abbd8870 | 2295 | break; |
1da177e4 | 2296 | |
abbd8870 AV |
2297 | udelay(10); |
2298 | } | |
1da177e4 | 2299 | |
abbd8870 | 2300 | /* Select FPM registers. */ |
3d71644c AV |
2301 | WRT_REG_WORD(®->ctrl_status, 0x20); |
2302 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
2303 | |
2304 | /* Get the fb rev level */ | |
3d71644c | 2305 | ha->fb_rev = RD_FB_CMD_REG(ha, reg); |
abbd8870 AV |
2306 | |
2307 | if (ha->fb_rev == FPM_2300) | |
a157b101 | 2308 | pci_clear_mwi(ha->pdev); |
abbd8870 AV |
2309 | |
2310 | /* Deselect FPM registers. */ | |
3d71644c AV |
2311 | WRT_REG_WORD(®->ctrl_status, 0x0); |
2312 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
2313 | |
2314 | /* Release RISC module. */ | |
3d71644c | 2315 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); |
abbd8870 | 2316 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 2317 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) |
abbd8870 AV |
2318 | break; |
2319 | ||
2320 | udelay(10); | |
1da177e4 | 2321 | } |
1da177e4 | 2322 | |
abbd8870 AV |
2323 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
2324 | } | |
1da177e4 | 2325 | |
abbd8870 AV |
2326 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); |
2327 | ||
737faece | 2328 | pci_disable_rom(ha->pdev); |
1da177e4 | 2329 | |
abbd8870 AV |
2330 | /* Get PCI bus information. */ |
2331 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 2332 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
abbd8870 AV |
2333 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
2334 | ||
2335 | return QLA_SUCCESS; | |
1da177e4 LT |
2336 | } |
2337 | ||
0107109e AV |
2338 | /** |
2339 | * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. | |
2db6228d | 2340 | * @vha: HA context |
0107109e AV |
2341 | * |
2342 | * Returns 0 on success. | |
2343 | */ | |
2344 | int | |
e315cd28 | 2345 | qla24xx_pci_config(scsi_qla_host_t *vha) |
0107109e | 2346 | { |
a157b101 | 2347 | uint16_t w; |
0107109e | 2348 | unsigned long flags = 0; |
e315cd28 | 2349 | struct qla_hw_data *ha = vha->hw; |
0107109e | 2350 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
0107109e AV |
2351 | |
2352 | pci_set_master(ha->pdev); | |
af6177d8 | 2353 | pci_try_set_mwi(ha->pdev); |
0107109e AV |
2354 | |
2355 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
a157b101 | 2356 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
0107109e AV |
2357 | w &= ~PCI_COMMAND_INTX_DISABLE; |
2358 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
2359 | ||
2360 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); | |
2361 | ||
2362 | /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ | |
f85ec187 AV |
2363 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) |
2364 | pcix_set_mmrbc(ha->pdev, 2048); | |
0107109e AV |
2365 | |
2366 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
e67f1321 | 2367 | if (pci_is_pcie(ha->pdev)) |
5ffd3a52 | 2368 | pcie_set_readrq(ha->pdev, 4096); |
0107109e | 2369 | |
737faece | 2370 | pci_disable_rom(ha->pdev); |
0107109e | 2371 | |
44c10138 | 2372 | ha->chip_revision = ha->pdev->revision; |
a8488abe | 2373 | |
0107109e AV |
2374 | /* Get PCI bus information. */ |
2375 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
2376 | ha->pci_attr = RD_REG_DWORD(®->ctrl_status); | |
2377 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
2378 | ||
2379 | return QLA_SUCCESS; | |
2380 | } | |
2381 | ||
c3a2f0df AV |
2382 | /** |
2383 | * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. | |
2db6228d | 2384 | * @vha: HA context |
c3a2f0df AV |
2385 | * |
2386 | * Returns 0 on success. | |
2387 | */ | |
2388 | int | |
e315cd28 | 2389 | qla25xx_pci_config(scsi_qla_host_t *vha) |
c3a2f0df AV |
2390 | { |
2391 | uint16_t w; | |
e315cd28 | 2392 | struct qla_hw_data *ha = vha->hw; |
c3a2f0df AV |
2393 | |
2394 | pci_set_master(ha->pdev); | |
2395 | pci_try_set_mwi(ha->pdev); | |
2396 | ||
2397 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
2398 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); | |
2399 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
2400 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
2401 | ||
2402 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
e67f1321 | 2403 | if (pci_is_pcie(ha->pdev)) |
5ffd3a52 | 2404 | pcie_set_readrq(ha->pdev, 4096); |
c3a2f0df | 2405 | |
737faece | 2406 | pci_disable_rom(ha->pdev); |
c3a2f0df AV |
2407 | |
2408 | ha->chip_revision = ha->pdev->revision; | |
2409 | ||
2410 | return QLA_SUCCESS; | |
2411 | } | |
2412 | ||
1da177e4 LT |
2413 | /** |
2414 | * qla2x00_isp_firmware() - Choose firmware image. | |
2db6228d | 2415 | * @vha: HA context |
1da177e4 LT |
2416 | * |
2417 | * Returns 0 on success. | |
2418 | */ | |
2419 | static int | |
e315cd28 | 2420 | qla2x00_isp_firmware(scsi_qla_host_t *vha) |
1da177e4 LT |
2421 | { |
2422 | int rval; | |
42e421b1 AV |
2423 | uint16_t loop_id, topo, sw_cap; |
2424 | uint8_t domain, area, al_pa; | |
e315cd28 | 2425 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2426 | |
2427 | /* Assume loading risc code */ | |
fa2a1ce5 | 2428 | rval = QLA_FUNCTION_FAILED; |
1da177e4 LT |
2429 | |
2430 | if (ha->flags.disable_risc_code_load) { | |
7c3df132 | 2431 | ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); |
1da177e4 LT |
2432 | |
2433 | /* Verify checksum of loaded RISC code. */ | |
e315cd28 | 2434 | rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); |
42e421b1 AV |
2435 | if (rval == QLA_SUCCESS) { |
2436 | /* And, verify we are not in ROM code. */ | |
e315cd28 | 2437 | rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, |
42e421b1 AV |
2438 | &area, &domain, &topo, &sw_cap); |
2439 | } | |
1da177e4 LT |
2440 | } |
2441 | ||
7c3df132 SK |
2442 | if (rval) |
2443 | ql_dbg(ql_dbg_init, vha, 0x007a, | |
2444 | "**** Load RISC code ****.\n"); | |
1da177e4 LT |
2445 | |
2446 | return (rval); | |
2447 | } | |
2448 | ||
2449 | /** | |
2450 | * qla2x00_reset_chip() - Reset ISP chip. | |
2db6228d | 2451 | * @vha: HA context |
1da177e4 LT |
2452 | * |
2453 | * Returns 0 on success. | |
2454 | */ | |
abbd8870 | 2455 | void |
e315cd28 | 2456 | qla2x00_reset_chip(scsi_qla_host_t *vha) |
1da177e4 LT |
2457 | { |
2458 | unsigned long flags = 0; | |
e315cd28 | 2459 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 2460 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 2461 | uint32_t cnt; |
1da177e4 LT |
2462 | uint16_t cmd; |
2463 | ||
85880801 AV |
2464 | if (unlikely(pci_channel_offline(ha->pdev))) |
2465 | return; | |
2466 | ||
fd34f556 | 2467 | ha->isp_ops->disable_intrs(ha); |
1da177e4 LT |
2468 | |
2469 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
2470 | ||
2471 | /* Turn off master enable */ | |
2472 | cmd = 0; | |
2473 | pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); | |
2474 | cmd &= ~PCI_COMMAND_MASTER; | |
2475 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
2476 | ||
2477 | if (!IS_QLA2100(ha)) { | |
2478 | /* Pause RISC. */ | |
2479 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); | |
2480 | if (IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
2481 | for (cnt = 0; cnt < 30000; cnt++) { | |
2482 | if ((RD_REG_WORD(®->hccr) & | |
2483 | HCCR_RISC_PAUSE) != 0) | |
2484 | break; | |
2485 | udelay(100); | |
2486 | } | |
2487 | } else { | |
2488 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
2489 | udelay(10); | |
2490 | } | |
2491 | ||
2492 | /* Select FPM registers. */ | |
2493 | WRT_REG_WORD(®->ctrl_status, 0x20); | |
2494 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
2495 | ||
2496 | /* FPM Soft Reset. */ | |
2497 | WRT_REG_WORD(®->fpm_diag_config, 0x100); | |
2498 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
2499 | ||
2500 | /* Toggle Fpm Reset. */ | |
2501 | if (!IS_QLA2200(ha)) { | |
2502 | WRT_REG_WORD(®->fpm_diag_config, 0x0); | |
2503 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
2504 | } | |
2505 | ||
2506 | /* Select frame buffer registers. */ | |
2507 | WRT_REG_WORD(®->ctrl_status, 0x10); | |
2508 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
2509 | ||
2510 | /* Reset frame buffer FIFOs. */ | |
2511 | if (IS_QLA2200(ha)) { | |
2512 | WRT_FB_CMD_REG(ha, reg, 0xa000); | |
2513 | RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ | |
2514 | } else { | |
2515 | WRT_FB_CMD_REG(ha, reg, 0x00fc); | |
2516 | ||
2517 | /* Read back fb_cmd until zero or 3 seconds max */ | |
2518 | for (cnt = 0; cnt < 3000; cnt++) { | |
2519 | if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) | |
2520 | break; | |
2521 | udelay(100); | |
2522 | } | |
2523 | } | |
2524 | ||
2525 | /* Select RISC module registers. */ | |
2526 | WRT_REG_WORD(®->ctrl_status, 0); | |
2527 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
2528 | ||
2529 | /* Reset RISC processor. */ | |
2530 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
2531 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
2532 | ||
2533 | /* Release RISC processor. */ | |
2534 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
2535 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
2536 | } | |
2537 | ||
2538 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
2539 | WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); | |
2540 | ||
2541 | /* Reset ISP chip. */ | |
2542 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
2543 | ||
2544 | /* Wait for RISC to recover from reset. */ | |
2545 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
2546 | /* | |
2547 | * It is necessary to for a delay here since the card doesn't | |
2548 | * respond to PCI reads during a reset. On some architectures | |
2549 | * this will result in an MCA. | |
2550 | */ | |
2551 | udelay(20); | |
2552 | for (cnt = 30000; cnt; cnt--) { | |
2553 | if ((RD_REG_WORD(®->ctrl_status) & | |
2554 | CSR_ISP_SOFT_RESET) == 0) | |
2555 | break; | |
2556 | udelay(100); | |
2557 | } | |
2558 | } else | |
2559 | udelay(10); | |
2560 | ||
2561 | /* Reset RISC processor. */ | |
2562 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
2563 | ||
2564 | WRT_REG_WORD(®->semaphore, 0); | |
2565 | ||
2566 | /* Release RISC processor. */ | |
2567 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
2568 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
2569 | ||
2570 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
2571 | for (cnt = 0; cnt < 30000; cnt++) { | |
ffb39f03 | 2572 | if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) |
1da177e4 | 2573 | break; |
1da177e4 LT |
2574 | |
2575 | udelay(100); | |
2576 | } | |
2577 | } else | |
2578 | udelay(100); | |
2579 | ||
2580 | /* Turn on master enable */ | |
2581 | cmd |= PCI_COMMAND_MASTER; | |
2582 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
2583 | ||
2584 | /* Disable RISC pause on FPM parity error. */ | |
2585 | if (!IS_QLA2100(ha)) { | |
2586 | WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); | |
2587 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
2588 | } | |
2589 | ||
2590 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
2591 | } | |
2592 | ||
b1d46989 MI |
2593 | /** |
2594 | * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. | |
2db6228d | 2595 | * @vha: HA context |
b1d46989 MI |
2596 | * |
2597 | * Returns 0 on success. | |
2598 | */ | |
fa492630 | 2599 | static int |
b1d46989 MI |
2600 | qla81xx_reset_mpi(scsi_qla_host_t *vha) |
2601 | { | |
2602 | uint16_t mb[4] = {0x1010, 0, 1, 0}; | |
2603 | ||
6246b8a1 GM |
2604 | if (!IS_QLA81XX(vha->hw)) |
2605 | return QLA_SUCCESS; | |
2606 | ||
b1d46989 MI |
2607 | return qla81xx_write_mpi_register(vha, mb); |
2608 | } | |
2609 | ||
0107109e | 2610 | /** |
88c26663 | 2611 | * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. |
2db6228d | 2612 | * @vha: HA context |
0107109e AV |
2613 | * |
2614 | * Returns 0 on success. | |
2615 | */ | |
d14e72fb | 2616 | static inline int |
e315cd28 | 2617 | qla24xx_reset_risc(scsi_qla_host_t *vha) |
0107109e AV |
2618 | { |
2619 | unsigned long flags = 0; | |
e315cd28 | 2620 | struct qla_hw_data *ha = vha->hw; |
0107109e | 2621 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
52c82823 | 2622 | uint32_t cnt; |
335a1cc9 | 2623 | uint16_t wd; |
b1d46989 | 2624 | static int abts_cnt; /* ISP abort retry counts */ |
d14e72fb | 2625 | int rval = QLA_SUCCESS; |
0107109e | 2626 | |
0107109e AV |
2627 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2628 | ||
2629 | /* Reset RISC. */ | |
2630 | WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
2631 | for (cnt = 0; cnt < 30000; cnt++) { | |
2632 | if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) | |
2633 | break; | |
2634 | ||
2635 | udelay(10); | |
2636 | } | |
2637 | ||
d14e72fb HM |
2638 | if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)) |
2639 | set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); | |
2640 | ||
2641 | ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, | |
2642 | "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", | |
2643 | RD_REG_DWORD(®->hccr), | |
2644 | RD_REG_DWORD(®->ctrl_status), | |
2645 | (RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)); | |
2646 | ||
0107109e AV |
2647 | WRT_REG_DWORD(®->ctrl_status, |
2648 | CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
335a1cc9 | 2649 | pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); |
88c26663 | 2650 | |
335a1cc9 | 2651 | udelay(100); |
d14e72fb | 2652 | |
88c26663 | 2653 | /* Wait for firmware to complete NVRAM accesses. */ |
52c82823 | 2654 | RD_REG_WORD(®->mailbox0); |
d14e72fb HM |
2655 | for (cnt = 10000; RD_REG_WORD(®->mailbox0) != 0 && |
2656 | rval == QLA_SUCCESS; cnt--) { | |
88c26663 | 2657 | barrier(); |
d14e72fb HM |
2658 | if (cnt) |
2659 | udelay(5); | |
2660 | else | |
2661 | rval = QLA_FUNCTION_TIMEOUT; | |
88c26663 AV |
2662 | } |
2663 | ||
d14e72fb HM |
2664 | if (rval == QLA_SUCCESS) |
2665 | set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); | |
2666 | ||
2667 | ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, | |
2668 | "HCCR: 0x%x, MailBox0 Status 0x%x\n", | |
2669 | RD_REG_DWORD(®->hccr), | |
2670 | RD_REG_DWORD(®->mailbox0)); | |
2671 | ||
335a1cc9 | 2672 | /* Wait for soft-reset to complete. */ |
52c82823 | 2673 | RD_REG_DWORD(®->ctrl_status); |
200ffb15 | 2674 | for (cnt = 0; cnt < 60; cnt++) { |
0107109e | 2675 | barrier(); |
d14e72fb HM |
2676 | if ((RD_REG_DWORD(®->ctrl_status) & |
2677 | CSRX_ISP_SOFT_RESET) == 0) | |
2678 | break; | |
2679 | ||
2680 | udelay(5); | |
0107109e | 2681 | } |
d14e72fb HM |
2682 | if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) |
2683 | set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); | |
2684 | ||
2685 | ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, | |
2686 | "HCCR: 0x%x, Soft Reset status: 0x%x\n", | |
2687 | RD_REG_DWORD(®->hccr), | |
2688 | RD_REG_DWORD(®->ctrl_status)); | |
0107109e | 2689 | |
b1d46989 MI |
2690 | /* If required, do an MPI FW reset now */ |
2691 | if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { | |
2692 | if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { | |
2693 | if (++abts_cnt < 5) { | |
2694 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
2695 | set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); | |
2696 | } else { | |
2697 | /* | |
2698 | * We exhausted the ISP abort retries. We have to | |
2699 | * set the board offline. | |
2700 | */ | |
2701 | abts_cnt = 0; | |
2702 | vha->flags.online = 0; | |
2703 | } | |
2704 | } | |
2705 | } | |
2706 | ||
0107109e AV |
2707 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); |
2708 | RD_REG_DWORD(®->hccr); | |
2709 | ||
2710 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
2711 | RD_REG_DWORD(®->hccr); | |
2712 | ||
2713 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); | |
2714 | RD_REG_DWORD(®->hccr); | |
2715 | ||
52c82823 | 2716 | RD_REG_WORD(®->mailbox0); |
200ffb15 | 2717 | for (cnt = 60; RD_REG_WORD(®->mailbox0) != 0 && |
d14e72fb | 2718 | rval == QLA_SUCCESS; cnt--) { |
0107109e | 2719 | barrier(); |
d14e72fb HM |
2720 | if (cnt) |
2721 | udelay(5); | |
2722 | else | |
2723 | rval = QLA_FUNCTION_TIMEOUT; | |
0107109e | 2724 | } |
d14e72fb HM |
2725 | if (rval == QLA_SUCCESS) |
2726 | set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); | |
2727 | ||
2728 | ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, | |
2729 | "Host Risc 0x%x, mailbox0 0x%x\n", | |
2730 | RD_REG_DWORD(®->hccr), | |
2731 | RD_REG_WORD(®->mailbox0)); | |
0107109e AV |
2732 | |
2733 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
124f85e6 | 2734 | |
d14e72fb HM |
2735 | ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, |
2736 | "Driver in %s mode\n", | |
2737 | IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); | |
2738 | ||
124f85e6 AV |
2739 | if (IS_NOPOLLING_TYPE(ha)) |
2740 | ha->isp_ops->enable_intrs(ha); | |
d14e72fb HM |
2741 | |
2742 | return rval; | |
0107109e AV |
2743 | } |
2744 | ||
4ea2c9c7 JC |
2745 | static void |
2746 | qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) | |
2747 | { | |
2748 | struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; | |
2749 | ||
2750 | WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); | |
2751 | *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET); | |
2752 | ||
2753 | } | |
2754 | ||
2755 | static void | |
2756 | qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) | |
2757 | { | |
2758 | struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; | |
2759 | ||
2760 | WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); | |
2761 | WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data); | |
2762 | } | |
2763 | ||
2764 | static void | |
2765 | qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) | |
2766 | { | |
4ea2c9c7 JC |
2767 | uint32_t wd32 = 0; |
2768 | uint delta_msec = 100; | |
2769 | uint elapsed_msec = 0; | |
2770 | uint timeout_msec; | |
2771 | ulong n; | |
2772 | ||
cc790764 JC |
2773 | if (vha->hw->pdev->subsystem_device != 0x0175 && |
2774 | vha->hw->pdev->subsystem_device != 0x0240) | |
4ea2c9c7 JC |
2775 | return; |
2776 | ||
8dd7e3a5 JC |
2777 | WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); |
2778 | udelay(100); | |
2779 | ||
4ea2c9c7 JC |
2780 | attempt: |
2781 | timeout_msec = TIMEOUT_SEMAPHORE; | |
2782 | n = timeout_msec / delta_msec; | |
2783 | while (n--) { | |
2784 | qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); | |
2785 | qla25xx_read_risc_sema_reg(vha, &wd32); | |
2786 | if (wd32 & RISC_SEMAPHORE) | |
2787 | break; | |
2788 | msleep(delta_msec); | |
2789 | elapsed_msec += delta_msec; | |
2790 | if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) | |
2791 | goto force; | |
2792 | } | |
2793 | ||
2794 | if (!(wd32 & RISC_SEMAPHORE)) | |
2795 | goto force; | |
2796 | ||
2797 | if (!(wd32 & RISC_SEMAPHORE_FORCE)) | |
2798 | goto acquired; | |
2799 | ||
2800 | qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); | |
2801 | timeout_msec = TIMEOUT_SEMAPHORE_FORCE; | |
2802 | n = timeout_msec / delta_msec; | |
2803 | while (n--) { | |
2804 | qla25xx_read_risc_sema_reg(vha, &wd32); | |
2805 | if (!(wd32 & RISC_SEMAPHORE_FORCE)) | |
2806 | break; | |
2807 | msleep(delta_msec); | |
2808 | elapsed_msec += delta_msec; | |
2809 | if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) | |
2810 | goto force; | |
2811 | } | |
2812 | ||
2813 | if (wd32 & RISC_SEMAPHORE_FORCE) | |
2814 | qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); | |
2815 | ||
2816 | goto attempt; | |
2817 | ||
2818 | force: | |
2819 | qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); | |
2820 | ||
2821 | acquired: | |
2822 | return; | |
2823 | } | |
2824 | ||
88c26663 AV |
2825 | /** |
2826 | * qla24xx_reset_chip() - Reset ISP24xx chip. | |
2db6228d | 2827 | * @vha: HA context |
88c26663 AV |
2828 | * |
2829 | * Returns 0 on success. | |
2830 | */ | |
2831 | void | |
e315cd28 | 2832 | qla24xx_reset_chip(scsi_qla_host_t *vha) |
88c26663 | 2833 | { |
e315cd28 | 2834 | struct qla_hw_data *ha = vha->hw; |
85880801 AV |
2835 | |
2836 | if (pci_channel_offline(ha->pdev) && | |
2837 | ha->flags.pci_channel_io_perm_failure) { | |
2838 | return; | |
2839 | } | |
2840 | ||
fd34f556 | 2841 | ha->isp_ops->disable_intrs(ha); |
88c26663 | 2842 | |
4ea2c9c7 JC |
2843 | qla25xx_manipulate_risc_semaphore(vha); |
2844 | ||
88c26663 | 2845 | /* Perform RISC reset. */ |
e315cd28 | 2846 | qla24xx_reset_risc(vha); |
88c26663 AV |
2847 | } |
2848 | ||
1da177e4 LT |
2849 | /** |
2850 | * qla2x00_chip_diag() - Test chip for proper operation. | |
2db6228d | 2851 | * @vha: HA context |
1da177e4 LT |
2852 | * |
2853 | * Returns 0 on success. | |
2854 | */ | |
abbd8870 | 2855 | int |
e315cd28 | 2856 | qla2x00_chip_diag(scsi_qla_host_t *vha) |
1da177e4 LT |
2857 | { |
2858 | int rval; | |
e315cd28 | 2859 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 2860 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 LT |
2861 | unsigned long flags = 0; |
2862 | uint16_t data; | |
2863 | uint32_t cnt; | |
2864 | uint16_t mb[5]; | |
73208dfd | 2865 | struct req_que *req = ha->req_q_map[0]; |
1da177e4 LT |
2866 | |
2867 | /* Assume a failed state */ | |
2868 | rval = QLA_FUNCTION_FAILED; | |
2869 | ||
da4704d9 BVA |
2870 | ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n", |
2871 | ®->flash_address); | |
1da177e4 LT |
2872 | |
2873 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
2874 | ||
2875 | /* Reset ISP chip. */ | |
2876 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
2877 | ||
2878 | /* | |
2879 | * We need to have a delay here since the card will not respond while | |
2880 | * in reset causing an MCA on some architectures. | |
2881 | */ | |
2882 | udelay(20); | |
2883 | data = qla2x00_debounce_register(®->ctrl_status); | |
2884 | for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { | |
2885 | udelay(5); | |
2886 | data = RD_REG_WORD(®->ctrl_status); | |
2887 | barrier(); | |
2888 | } | |
2889 | ||
2890 | if (!cnt) | |
2891 | goto chip_diag_failed; | |
2892 | ||
7c3df132 SK |
2893 | ql_dbg(ql_dbg_init, vha, 0x007c, |
2894 | "Reset register cleared by chip reset.\n"); | |
1da177e4 LT |
2895 | |
2896 | /* Reset RISC processor. */ | |
2897 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
2898 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
2899 | ||
2900 | /* Workaround for QLA2312 PCI parity error */ | |
2901 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
2902 | data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); | |
2903 | for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { | |
2904 | udelay(5); | |
2905 | data = RD_MAILBOX_REG(ha, reg, 0); | |
fa2a1ce5 | 2906 | barrier(); |
1da177e4 LT |
2907 | } |
2908 | } else | |
2909 | udelay(10); | |
2910 | ||
2911 | if (!cnt) | |
2912 | goto chip_diag_failed; | |
2913 | ||
2914 | /* Check product ID of chip */ | |
5a68a1c2 | 2915 | ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n"); |
1da177e4 LT |
2916 | |
2917 | mb[1] = RD_MAILBOX_REG(ha, reg, 1); | |
2918 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
2919 | mb[3] = RD_MAILBOX_REG(ha, reg, 3); | |
2920 | mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); | |
2921 | if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || | |
2922 | mb[3] != PROD_ID_3) { | |
7c3df132 SK |
2923 | ql_log(ql_log_warn, vha, 0x0062, |
2924 | "Wrong product ID = 0x%x,0x%x,0x%x.\n", | |
2925 | mb[1], mb[2], mb[3]); | |
1da177e4 LT |
2926 | |
2927 | goto chip_diag_failed; | |
2928 | } | |
2929 | ha->product_id[0] = mb[1]; | |
2930 | ha->product_id[1] = mb[2]; | |
2931 | ha->product_id[2] = mb[3]; | |
2932 | ha->product_id[3] = mb[4]; | |
2933 | ||
2934 | /* Adjust fw RISC transfer size */ | |
73208dfd | 2935 | if (req->length > 1024) |
1da177e4 LT |
2936 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; |
2937 | else | |
2938 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * | |
73208dfd | 2939 | req->length; |
1da177e4 LT |
2940 | |
2941 | if (IS_QLA2200(ha) && | |
2942 | RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { | |
2943 | /* Limit firmware transfer size with a 2200A */ | |
7c3df132 | 2944 | ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); |
1da177e4 | 2945 | |
ea5b6382 | 2946 | ha->device_type |= DT_ISP2200A; |
1da177e4 LT |
2947 | ha->fw_transfer_size = 128; |
2948 | } | |
2949 | ||
2950 | /* Wrap Incoming Mailboxes Test. */ | |
2951 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
2952 | ||
7c3df132 | 2953 | ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); |
e315cd28 | 2954 | rval = qla2x00_mbx_reg_test(vha); |
7c3df132 SK |
2955 | if (rval) |
2956 | ql_log(ql_log_warn, vha, 0x0080, | |
2957 | "Failed mailbox send register test.\n"); | |
2958 | else | |
1da177e4 LT |
2959 | /* Flag a successful rval */ |
2960 | rval = QLA_SUCCESS; | |
1da177e4 LT |
2961 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2962 | ||
2963 | chip_diag_failed: | |
2964 | if (rval) | |
7c3df132 SK |
2965 | ql_log(ql_log_info, vha, 0x0081, |
2966 | "Chip diagnostics **** FAILED ****.\n"); | |
1da177e4 LT |
2967 | |
2968 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
2969 | ||
2970 | return (rval); | |
2971 | } | |
2972 | ||
0107109e AV |
2973 | /** |
2974 | * qla24xx_chip_diag() - Test ISP24xx for proper operation. | |
2db6228d | 2975 | * @vha: HA context |
0107109e AV |
2976 | * |
2977 | * Returns 0 on success. | |
2978 | */ | |
2979 | int | |
e315cd28 | 2980 | qla24xx_chip_diag(scsi_qla_host_t *vha) |
0107109e AV |
2981 | { |
2982 | int rval; | |
e315cd28 | 2983 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 2984 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 2985 | |
7ec0effd | 2986 | if (IS_P3P_TYPE(ha)) |
a9083016 GM |
2987 | return QLA_SUCCESS; |
2988 | ||
73208dfd | 2989 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; |
0107109e | 2990 | |
e315cd28 | 2991 | rval = qla2x00_mbx_reg_test(vha); |
0107109e | 2992 | if (rval) { |
7c3df132 SK |
2993 | ql_log(ql_log_warn, vha, 0x0082, |
2994 | "Failed mailbox send register test.\n"); | |
0107109e AV |
2995 | } else { |
2996 | /* Flag a successful rval */ | |
2997 | rval = QLA_SUCCESS; | |
2998 | } | |
2999 | ||
3000 | return rval; | |
3001 | } | |
3002 | ||
ad0a0b01 QT |
3003 | static void |
3004 | qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) | |
0107109e | 3005 | { |
a7a167bf | 3006 | int rval; |
df613b96 AV |
3007 | dma_addr_t tc_dma; |
3008 | void *tc; | |
e315cd28 | 3009 | struct qla_hw_data *ha = vha->hw; |
a7a167bf | 3010 | |
ad0a0b01 | 3011 | if (ha->eft) { |
7c3df132 | 3012 | ql_dbg(ql_dbg_init, vha, 0x00bd, |
ad0a0b01 QT |
3013 | "%s: Offload Mem is already allocated.\n", |
3014 | __func__); | |
a7a167bf AV |
3015 | return; |
3016 | } | |
d4e3e04d | 3017 | |
ad0a0b01 | 3018 | if (IS_FWI2_CAPABLE(ha)) { |
df613b96 | 3019 | /* Allocate memory for Fibre Channel Event Buffer. */ |
f73cb695 CD |
3020 | if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && |
3021 | !IS_QLA27XX(ha)) | |
436a7b11 | 3022 | goto try_eft; |
df613b96 | 3023 | |
f73cb695 CD |
3024 | if (ha->fce) |
3025 | dma_free_coherent(&ha->pdev->dev, | |
3026 | FCE_SIZE, ha->fce, ha->fce_dma); | |
3027 | ||
3028 | /* Allocate memory for Fibre Channel Event Buffer. */ | |
750afb08 LC |
3029 | tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, |
3030 | GFP_KERNEL); | |
df613b96 | 3031 | if (!tc) { |
7c3df132 SK |
3032 | ql_log(ql_log_warn, vha, 0x00be, |
3033 | "Unable to allocate (%d KB) for FCE.\n", | |
3034 | FCE_SIZE / 1024); | |
17d98630 | 3035 | goto try_eft; |
df613b96 AV |
3036 | } |
3037 | ||
e315cd28 | 3038 | rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, |
df613b96 AV |
3039 | ha->fce_mb, &ha->fce_bufs); |
3040 | if (rval) { | |
7c3df132 SK |
3041 | ql_log(ql_log_warn, vha, 0x00bf, |
3042 | "Unable to initialize FCE (%d).\n", rval); | |
df613b96 AV |
3043 | dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, |
3044 | tc_dma); | |
3045 | ha->flags.fce_enabled = 0; | |
17d98630 | 3046 | goto try_eft; |
df613b96 | 3047 | } |
cfb0919c | 3048 | ql_dbg(ql_dbg_init, vha, 0x00c0, |
7c3df132 | 3049 | "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); |
df613b96 | 3050 | |
df613b96 AV |
3051 | ha->flags.fce_enabled = 1; |
3052 | ha->fce_dma = tc_dma; | |
3053 | ha->fce = tc; | |
f73cb695 | 3054 | |
436a7b11 | 3055 | try_eft: |
f73cb695 CD |
3056 | if (ha->eft) |
3057 | dma_free_coherent(&ha->pdev->dev, | |
3058 | EFT_SIZE, ha->eft, ha->eft_dma); | |
3059 | ||
436a7b11 | 3060 | /* Allocate memory for Extended Trace Buffer. */ |
750afb08 LC |
3061 | tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, |
3062 | GFP_KERNEL); | |
436a7b11 | 3063 | if (!tc) { |
7c3df132 SK |
3064 | ql_log(ql_log_warn, vha, 0x00c1, |
3065 | "Unable to allocate (%d KB) for EFT.\n", | |
3066 | EFT_SIZE / 1024); | |
ad0a0b01 | 3067 | goto eft_err; |
436a7b11 AV |
3068 | } |
3069 | ||
e315cd28 | 3070 | rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); |
436a7b11 | 3071 | if (rval) { |
7c3df132 SK |
3072 | ql_log(ql_log_warn, vha, 0x00c2, |
3073 | "Unable to initialize EFT (%d).\n", rval); | |
436a7b11 AV |
3074 | dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, |
3075 | tc_dma); | |
ad0a0b01 | 3076 | goto eft_err; |
436a7b11 | 3077 | } |
cfb0919c | 3078 | ql_dbg(ql_dbg_init, vha, 0x00c3, |
7c3df132 | 3079 | "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); |
436a7b11 | 3080 | |
436a7b11 AV |
3081 | ha->eft_dma = tc_dma; |
3082 | ha->eft = tc; | |
d4e3e04d | 3083 | } |
f73cb695 | 3084 | |
ad0a0b01 QT |
3085 | eft_err: |
3086 | return; | |
3087 | } | |
3088 | ||
3089 | void | |
3090 | qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) | |
3091 | { | |
3092 | uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, | |
3093 | eft_size, fce_size, mq_size; | |
3094 | struct qla_hw_data *ha = vha->hw; | |
3095 | struct req_que *req = ha->req_q_map[0]; | |
3096 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
3097 | struct qla2xxx_fw_dump *fw_dump; | |
3098 | ||
3099 | dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; | |
3100 | req_q_size = rsp_q_size = 0; | |
3101 | ||
3102 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { | |
3103 | fixed_size = sizeof(struct qla2100_fw_dump); | |
3104 | } else if (IS_QLA23XX(ha)) { | |
3105 | fixed_size = offsetof(struct qla2300_fw_dump, data_ram); | |
3106 | mem_size = (ha->fw_memory_size - 0x11000 + 1) * | |
3107 | sizeof(uint16_t); | |
3108 | } else if (IS_FWI2_CAPABLE(ha)) { | |
3109 | if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) | |
3110 | fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); | |
3111 | else if (IS_QLA81XX(ha)) | |
3112 | fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); | |
3113 | else if (IS_QLA25XX(ha)) | |
3114 | fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); | |
3115 | else | |
3116 | fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); | |
3117 | ||
3118 | mem_size = (ha->fw_memory_size - 0x100000 + 1) * | |
3119 | sizeof(uint32_t); | |
3120 | if (ha->mqenable) { | |
3121 | if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) | |
3122 | mq_size = sizeof(struct qla2xxx_mq_chain); | |
3123 | /* | |
3124 | * Allocate maximum buffer size for all queues. | |
3125 | * Resizing must be done at end-of-dump processing. | |
3126 | */ | |
3127 | mq_size += ha->max_req_queues * | |
3128 | (req->length * sizeof(request_t)); | |
3129 | mq_size += ha->max_rsp_queues * | |
3130 | (rsp->length * sizeof(response_t)); | |
3131 | } | |
3132 | if (ha->tgt.atio_ring) | |
3133 | mq_size += ha->tgt.atio_q_length * sizeof(request_t); | |
3134 | /* Allocate memory for Fibre Channel Event Buffer. */ | |
3135 | if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && | |
3136 | !IS_QLA27XX(ha)) | |
3137 | goto try_eft; | |
3138 | ||
3139 | fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; | |
3140 | try_eft: | |
3141 | ql_dbg(ql_dbg_init, vha, 0x00c3, | |
3142 | "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); | |
3143 | eft_size = EFT_SIZE; | |
3144 | } | |
3145 | ||
f73cb695 CD |
3146 | if (IS_QLA27XX(ha)) { |
3147 | if (!ha->fw_dump_template) { | |
3148 | ql_log(ql_log_warn, vha, 0x00ba, | |
3149 | "Failed missing fwdump template\n"); | |
3150 | return; | |
3151 | } | |
3152 | dump_size = qla27xx_fwdt_calculate_dump_size(vha); | |
3153 | ql_dbg(ql_dbg_init, vha, 0x00fa, | |
3154 | "-> allocating fwdump (%x bytes)...\n", dump_size); | |
3155 | goto allocate; | |
3156 | } | |
3157 | ||
73208dfd AC |
3158 | req_q_size = req->length * sizeof(request_t); |
3159 | rsp_q_size = rsp->length * sizeof(response_t); | |
a7a167bf | 3160 | dump_size = offsetof(struct qla2xxx_fw_dump, isp); |
2afa19a9 | 3161 | dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; |
bb99de67 AV |
3162 | ha->chain_offset = dump_size; |
3163 | dump_size += mq_size + fce_size; | |
d4e3e04d | 3164 | |
b945e777 QT |
3165 | if (ha->exchoffld_buf) |
3166 | dump_size += sizeof(struct qla2xxx_offld_chain) + | |
3167 | ha->exchoffld_size; | |
3168 | if (ha->exlogin_buf) | |
3169 | dump_size += sizeof(struct qla2xxx_offld_chain) + | |
3170 | ha->exlogin_size; | |
3171 | ||
f73cb695 | 3172 | allocate: |
ad0a0b01 QT |
3173 | if (!ha->fw_dump_len || dump_size != ha->fw_dump_len) { |
3174 | fw_dump = vmalloc(dump_size); | |
3175 | if (!fw_dump) { | |
3176 | ql_log(ql_log_warn, vha, 0x00c4, | |
3177 | "Unable to allocate (%d KB) for firmware dump.\n", | |
3178 | dump_size / 1024); | |
3179 | } else { | |
3180 | if (ha->fw_dump) | |
3181 | vfree(ha->fw_dump); | |
3182 | ha->fw_dump = fw_dump; | |
3183 | ||
3184 | ha->fw_dump_len = dump_size; | |
3185 | ql_dbg(ql_dbg_init, vha, 0x00c5, | |
3186 | "Allocated (%d KB) for firmware dump.\n", | |
3187 | dump_size / 1024); | |
3188 | ||
3189 | if (IS_QLA27XX(ha)) | |
3190 | return; | |
3191 | ||
3192 | ha->fw_dump->signature[0] = 'Q'; | |
3193 | ha->fw_dump->signature[1] = 'L'; | |
3194 | ha->fw_dump->signature[2] = 'G'; | |
3195 | ha->fw_dump->signature[3] = 'C'; | |
3196 | ha->fw_dump->version = htonl(1); | |
3197 | ||
3198 | ha->fw_dump->fixed_size = htonl(fixed_size); | |
3199 | ha->fw_dump->mem_size = htonl(mem_size); | |
3200 | ha->fw_dump->req_q_size = htonl(req_q_size); | |
3201 | ha->fw_dump->rsp_q_size = htonl(rsp_q_size); | |
3202 | ||
3203 | ha->fw_dump->eft_size = htonl(eft_size); | |
3204 | ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); | |
3205 | ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); | |
3206 | ||
3207 | ha->fw_dump->header_size = | |
3208 | htonl(offsetof(struct qla2xxx_fw_dump, isp)); | |
a7a167bf | 3209 | } |
a7a167bf | 3210 | } |
0107109e AV |
3211 | } |
3212 | ||
18e7555a AV |
3213 | static int |
3214 | qla81xx_mpi_sync(scsi_qla_host_t *vha) | |
3215 | { | |
3216 | #define MPS_MASK 0xe0 | |
3217 | int rval; | |
3218 | uint16_t dc; | |
3219 | uint32_t dw; | |
18e7555a AV |
3220 | |
3221 | if (!IS_QLA81XX(vha->hw)) | |
3222 | return QLA_SUCCESS; | |
3223 | ||
3224 | rval = qla2x00_write_ram_word(vha, 0x7c00, 1); | |
3225 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
3226 | ql_log(ql_log_warn, vha, 0x0105, |
3227 | "Unable to acquire semaphore.\n"); | |
18e7555a AV |
3228 | goto done; |
3229 | } | |
3230 | ||
3231 | pci_read_config_word(vha->hw->pdev, 0x54, &dc); | |
3232 | rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); | |
3233 | if (rval != QLA_SUCCESS) { | |
7c3df132 | 3234 | ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); |
18e7555a AV |
3235 | goto done_release; |
3236 | } | |
3237 | ||
3238 | dc &= MPS_MASK; | |
3239 | if (dc == (dw & MPS_MASK)) | |
3240 | goto done_release; | |
3241 | ||
3242 | dw &= ~MPS_MASK; | |
3243 | dw |= dc; | |
3244 | rval = qla2x00_write_ram_word(vha, 0x7a15, dw); | |
3245 | if (rval != QLA_SUCCESS) { | |
7c3df132 | 3246 | ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); |
18e7555a AV |
3247 | } |
3248 | ||
3249 | done_release: | |
3250 | rval = qla2x00_write_ram_word(vha, 0x7c00, 0); | |
3251 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
3252 | ql_log(ql_log_warn, vha, 0x006d, |
3253 | "Unable to release semaphore.\n"); | |
18e7555a AV |
3254 | } |
3255 | ||
3256 | done: | |
3257 | return rval; | |
3258 | } | |
3259 | ||
8d93f550 CD |
3260 | int |
3261 | qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) | |
3262 | { | |
3263 | /* Don't try to reallocate the array */ | |
3264 | if (req->outstanding_cmds) | |
3265 | return QLA_SUCCESS; | |
3266 | ||
d7459527 | 3267 | if (!IS_FWI2_CAPABLE(ha)) |
8d93f550 CD |
3268 | req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; |
3269 | else { | |
03e8c680 QT |
3270 | if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) |
3271 | req->num_outstanding_cmds = ha->cur_fw_xcb_count; | |
8d93f550 | 3272 | else |
03e8c680 | 3273 | req->num_outstanding_cmds = ha->cur_fw_iocb_count; |
8d93f550 CD |
3274 | } |
3275 | ||
6396bb22 KC |
3276 | req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, |
3277 | sizeof(srb_t *), | |
3278 | GFP_KERNEL); | |
8d93f550 CD |
3279 | |
3280 | if (!req->outstanding_cmds) { | |
3281 | /* | |
3282 | * Try to allocate a minimal size just so we can get through | |
3283 | * initialization. | |
3284 | */ | |
3285 | req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; | |
6396bb22 KC |
3286 | req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, |
3287 | sizeof(srb_t *), | |
3288 | GFP_KERNEL); | |
8d93f550 CD |
3289 | |
3290 | if (!req->outstanding_cmds) { | |
3291 | ql_log(ql_log_fatal, NULL, 0x0126, | |
3292 | "Failed to allocate memory for " | |
3293 | "outstanding_cmds for req_que %p.\n", req); | |
3294 | req->num_outstanding_cmds = 0; | |
3295 | return QLA_FUNCTION_FAILED; | |
3296 | } | |
3297 | } | |
3298 | ||
3299 | return QLA_SUCCESS; | |
3300 | } | |
3301 | ||
e4e3a2ce QT |
3302 | #define PRINT_FIELD(_field, _flag, _str) { \ |
3303 | if (a0->_field & _flag) {\ | |
3304 | if (p) {\ | |
3305 | strcat(ptr, "|");\ | |
3306 | ptr++;\ | |
3307 | leftover--;\ | |
3308 | } \ | |
3309 | len = snprintf(ptr, leftover, "%s", _str); \ | |
3310 | p = 1;\ | |
3311 | leftover -= len;\ | |
3312 | ptr += len; \ | |
3313 | } \ | |
3314 | } | |
3315 | ||
3316 | static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha) | |
3317 | { | |
3318 | #define STR_LEN 64 | |
3319 | struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data; | |
3320 | u8 str[STR_LEN], *ptr, p; | |
3321 | int leftover, len; | |
3322 | ||
3323 | memset(str, 0, STR_LEN); | |
3324 | snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name); | |
3325 | ql_dbg(ql_dbg_init, vha, 0x015a, | |
3326 | "SFP MFG Name: %s\n", str); | |
3327 | ||
3328 | memset(str, 0, STR_LEN); | |
3329 | snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn); | |
3330 | ql_dbg(ql_dbg_init, vha, 0x015c, | |
3331 | "SFP Part Name: %s\n", str); | |
3332 | ||
3333 | /* media */ | |
3334 | memset(str, 0, STR_LEN); | |
3335 | ptr = str; | |
3336 | leftover = STR_LEN; | |
3337 | p = len = 0; | |
3338 | PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX"); | |
3339 | PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair"); | |
3340 | PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax"); | |
3341 | PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax"); | |
3342 | PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um"); | |
3343 | PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um"); | |
3344 | PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode"); | |
3345 | ql_dbg(ql_dbg_init, vha, 0x0160, | |
3346 | "SFP Media: %s\n", str); | |
3347 | ||
3348 | /* link length */ | |
3349 | memset(str, 0, STR_LEN); | |
3350 | ptr = str; | |
3351 | leftover = STR_LEN; | |
3352 | p = len = 0; | |
3353 | PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long"); | |
3354 | PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short"); | |
3355 | PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate"); | |
3356 | PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long"); | |
3357 | PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium"); | |
3358 | ql_dbg(ql_dbg_init, vha, 0x0196, | |
3359 | "SFP Link Length: %s\n", str); | |
3360 | ||
3361 | memset(str, 0, STR_LEN); | |
3362 | ptr = str; | |
3363 | leftover = STR_LEN; | |
3364 | p = len = 0; | |
3365 | PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)"); | |
3366 | PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)"); | |
3367 | PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)"); | |
3368 | PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)"); | |
3369 | PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)"); | |
3370 | ql_dbg(ql_dbg_init, vha, 0x016e, | |
3371 | "SFP FC Link Tech: %s\n", str); | |
3372 | ||
3373 | if (a0->length_km) | |
3374 | ql_dbg(ql_dbg_init, vha, 0x016f, | |
3375 | "SFP Distant: %d km\n", a0->length_km); | |
3376 | if (a0->length_100m) | |
3377 | ql_dbg(ql_dbg_init, vha, 0x0170, | |
3378 | "SFP Distant: %d m\n", a0->length_100m*100); | |
3379 | if (a0->length_50um_10m) | |
3380 | ql_dbg(ql_dbg_init, vha, 0x0189, | |
3381 | "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10); | |
3382 | if (a0->length_62um_10m) | |
3383 | ql_dbg(ql_dbg_init, vha, 0x018a, | |
3384 | "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10); | |
3385 | if (a0->length_om4_10m) | |
3386 | ql_dbg(ql_dbg_init, vha, 0x0194, | |
3387 | "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10); | |
3388 | if (a0->length_om3_10m) | |
3389 | ql_dbg(ql_dbg_init, vha, 0x0195, | |
3390 | "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10); | |
3391 | } | |
3392 | ||
3393 | ||
3394 | /* | |
3395 | * Return Code: | |
3396 | * QLA_SUCCESS: no action | |
3397 | * QLA_INTERFACE_ERROR: SFP is not there. | |
3398 | * QLA_FUNCTION_FAILED: detected New SFP | |
3399 | */ | |
3400 | int | |
3401 | qla24xx_detect_sfp(scsi_qla_host_t *vha) | |
3402 | { | |
3403 | int rc = QLA_SUCCESS; | |
3404 | struct sff_8247_a0 *a; | |
3405 | struct qla_hw_data *ha = vha->hw; | |
3406 | ||
3407 | if (!AUTO_DETECT_SFP_SUPPORT(vha)) | |
3408 | goto out; | |
3409 | ||
3410 | rc = qla2x00_read_sfp_dev(vha, NULL, 0); | |
3411 | if (rc) | |
3412 | goto out; | |
3413 | ||
3414 | a = (struct sff_8247_a0 *)vha->hw->sfp_data; | |
3415 | qla2xxx_print_sfp_info(vha); | |
3416 | ||
3417 | if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) { | |
3418 | /* long range */ | |
3419 | ha->flags.detected_lr_sfp = 1; | |
3420 | ||
3421 | if (a->length_km > 5 || a->length_100m > 50) | |
3422 | ha->long_range_distance = LR_DISTANCE_10K; | |
3423 | else | |
3424 | ha->long_range_distance = LR_DISTANCE_5K; | |
3425 | ||
3426 | if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting) | |
3427 | ql_dbg(ql_dbg_async, vha, 0x507b, | |
3428 | "Detected Long Range SFP.\n"); | |
3429 | } else { | |
3430 | /* short range */ | |
3431 | ha->flags.detected_lr_sfp = 0; | |
3432 | if (ha->flags.using_lr_setting) | |
3433 | ql_dbg(ql_dbg_async, vha, 0x5084, | |
3434 | "Detected Short Range SFP.\n"); | |
3435 | } | |
3436 | ||
3437 | if (!vha->flags.init_done) | |
3438 | rc = QLA_SUCCESS; | |
3439 | out: | |
3440 | return rc; | |
3441 | } | |
3442 | ||
1da177e4 LT |
3443 | /** |
3444 | * qla2x00_setup_chip() - Load and start RISC firmware. | |
2db6228d | 3445 | * @vha: HA context |
1da177e4 LT |
3446 | * |
3447 | * Returns 0 on success. | |
3448 | */ | |
3449 | static int | |
e315cd28 | 3450 | qla2x00_setup_chip(scsi_qla_host_t *vha) |
1da177e4 | 3451 | { |
0107109e AV |
3452 | int rval; |
3453 | uint32_t srisc_address = 0; | |
e315cd28 | 3454 | struct qla_hw_data *ha = vha->hw; |
3db0652e AV |
3455 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
3456 | unsigned long flags; | |
dda772e8 | 3457 | uint16_t fw_major_version; |
3db0652e | 3458 | |
7ec0effd | 3459 | if (IS_P3P_TYPE(ha)) { |
a9083016 | 3460 | rval = ha->isp_ops->load_risc(vha, &srisc_address); |
14e303d9 AV |
3461 | if (rval == QLA_SUCCESS) { |
3462 | qla2x00_stop_firmware(vha); | |
a9083016 | 3463 | goto enable_82xx_npiv; |
14e303d9 | 3464 | } else |
b963752f | 3465 | goto failed; |
a9083016 GM |
3466 | } |
3467 | ||
3db0652e AV |
3468 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { |
3469 | /* Disable SRAM, Instruction RAM and GP RAM parity. */ | |
3470 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3471 | WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); | |
3472 | RD_REG_WORD(®->hccr); | |
3473 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
3474 | } | |
1da177e4 | 3475 | |
18e7555a AV |
3476 | qla81xx_mpi_sync(vha); |
3477 | ||
1da177e4 | 3478 | /* Load firmware sequences */ |
e315cd28 | 3479 | rval = ha->isp_ops->load_risc(vha, &srisc_address); |
0107109e | 3480 | if (rval == QLA_SUCCESS) { |
7c3df132 SK |
3481 | ql_dbg(ql_dbg_init, vha, 0x00c9, |
3482 | "Verifying Checksum of loaded RISC code.\n"); | |
1da177e4 | 3483 | |
e315cd28 | 3484 | rval = qla2x00_verify_checksum(vha, srisc_address); |
1da177e4 LT |
3485 | if (rval == QLA_SUCCESS) { |
3486 | /* Start firmware execution. */ | |
7c3df132 SK |
3487 | ql_dbg(ql_dbg_init, vha, 0x00ca, |
3488 | "Starting firmware.\n"); | |
1da177e4 | 3489 | |
b0d6cabd HM |
3490 | if (ql2xexlogins) |
3491 | ha->flags.exlogins_enabled = 1; | |
3492 | ||
99e1b683 | 3493 | if (qla_is_exch_offld_enabled(vha)) |
2f56a7f1 HM |
3494 | ha->flags.exchoffld_enabled = 1; |
3495 | ||
e315cd28 | 3496 | rval = qla2x00_execute_fw(vha, srisc_address); |
1da177e4 | 3497 | /* Retrieve firmware information. */ |
dda772e8 | 3498 | if (rval == QLA_SUCCESS) { |
e4e3a2ce QT |
3499 | qla24xx_detect_sfp(vha); |
3500 | ||
8b4673ba QT |
3501 | if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && |
3502 | (ha->zio_mode == QLA_ZIO_MODE_6)) | |
3503 | qla27xx_set_zio_threshold(vha, | |
3504 | ha->last_zio_threshold); | |
3505 | ||
b0d6cabd HM |
3506 | rval = qla2x00_set_exlogins_buffer(vha); |
3507 | if (rval != QLA_SUCCESS) | |
3508 | goto failed; | |
3509 | ||
2f56a7f1 HM |
3510 | rval = qla2x00_set_exchoffld_buffer(vha); |
3511 | if (rval != QLA_SUCCESS) | |
3512 | goto failed; | |
3513 | ||
a9083016 | 3514 | enable_82xx_npiv: |
dda772e8 | 3515 | fw_major_version = ha->fw_major_version; |
7ec0effd | 3516 | if (IS_P3P_TYPE(ha)) |
3173167f | 3517 | qla82xx_check_md_needed(vha); |
6246b8a1 GM |
3518 | else |
3519 | rval = qla2x00_get_fw_version(vha); | |
ca9e9c3e AV |
3520 | if (rval != QLA_SUCCESS) |
3521 | goto failed; | |
2c3dfe3f | 3522 | ha->flags.npiv_supported = 0; |
e315cd28 | 3523 | if (IS_QLA2XXX_MIDTYPE(ha) && |
946fb891 | 3524 | (ha->fw_attributes & BIT_2)) { |
2c3dfe3f | 3525 | ha->flags.npiv_supported = 1; |
4d0ea247 SJ |
3526 | if ((!ha->max_npiv_vports) || |
3527 | ((ha->max_npiv_vports + 1) % | |
eb66dc60 | 3528 | MIN_MULTI_ID_FABRIC)) |
4d0ea247 | 3529 | ha->max_npiv_vports = |
eb66dc60 | 3530 | MIN_MULTI_ID_FABRIC - 1; |
4d0ea247 | 3531 | } |
03e8c680 | 3532 | qla2x00_get_resource_cnts(vha); |
d743de66 | 3533 | |
8d93f550 CD |
3534 | /* |
3535 | * Allocate the array of outstanding commands | |
3536 | * now that we know the firmware resources. | |
3537 | */ | |
3538 | rval = qla2x00_alloc_outstanding_cmds(ha, | |
3539 | vha->req); | |
3540 | if (rval != QLA_SUCCESS) | |
3541 | goto failed; | |
3542 | ||
ad0a0b01 QT |
3543 | if (!fw_major_version && !(IS_P3P_TYPE(ha))) |
3544 | qla2x00_alloc_offload_mem(vha); | |
3545 | ||
3546 | if (ql2xallocfwdump && !(IS_P3P_TYPE(ha))) | |
08de2844 | 3547 | qla2x00_alloc_fw_dump(vha); |
ad0a0b01 | 3548 | |
3b6e5b9d CD |
3549 | } else { |
3550 | goto failed; | |
1da177e4 LT |
3551 | } |
3552 | } else { | |
7c3df132 SK |
3553 | ql_log(ql_log_fatal, vha, 0x00cd, |
3554 | "ISP Firmware failed checksum.\n"); | |
3555 | goto failed; | |
1da177e4 | 3556 | } |
c74d88a4 AV |
3557 | } else |
3558 | goto failed; | |
1da177e4 | 3559 | |
3db0652e AV |
3560 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { |
3561 | /* Enable proper parity. */ | |
3562 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3563 | if (IS_QLA2300(ha)) | |
3564 | /* SRAM parity */ | |
3565 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); | |
3566 | else | |
3567 | /* SRAM, Instruction RAM and GP RAM parity */ | |
3568 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); | |
3569 | RD_REG_WORD(®->hccr); | |
3570 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
3571 | } | |
3572 | ||
f3982d89 CD |
3573 | if (IS_QLA27XX(ha)) |
3574 | ha->flags.fac_supported = 1; | |
3575 | else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { | |
1d2874de JC |
3576 | uint32_t size; |
3577 | ||
3578 | rval = qla81xx_fac_get_sector_size(vha, &size); | |
3579 | if (rval == QLA_SUCCESS) { | |
3580 | ha->flags.fac_supported = 1; | |
3581 | ha->fdt_block_size = size << 2; | |
3582 | } else { | |
7c3df132 | 3583 | ql_log(ql_log_warn, vha, 0x00ce, |
1d2874de JC |
3584 | "Unsupported FAC firmware (%d.%02d.%02d).\n", |
3585 | ha->fw_major_version, ha->fw_minor_version, | |
3586 | ha->fw_subminor_version); | |
1ca60e3b | 3587 | |
f73cb695 | 3588 | if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { |
6246b8a1 GM |
3589 | ha->flags.fac_supported = 0; |
3590 | rval = QLA_SUCCESS; | |
3591 | } | |
1d2874de JC |
3592 | } |
3593 | } | |
ca9e9c3e | 3594 | failed: |
1da177e4 | 3595 | if (rval) { |
7c3df132 SK |
3596 | ql_log(ql_log_fatal, vha, 0x00cf, |
3597 | "Setup chip ****FAILED****.\n"); | |
1da177e4 LT |
3598 | } |
3599 | ||
3600 | return (rval); | |
3601 | } | |
3602 | ||
3603 | /** | |
3604 | * qla2x00_init_response_q_entries() - Initializes response queue entries. | |
2db6228d | 3605 | * @rsp: response queue |
1da177e4 LT |
3606 | * |
3607 | * Beginning of request ring has initialization control block already built | |
3608 | * by nvram config routine. | |
3609 | * | |
3610 | * Returns 0 on success. | |
3611 | */ | |
73208dfd AC |
3612 | void |
3613 | qla2x00_init_response_q_entries(struct rsp_que *rsp) | |
1da177e4 LT |
3614 | { |
3615 | uint16_t cnt; | |
3616 | response_t *pkt; | |
3617 | ||
2afa19a9 AC |
3618 | rsp->ring_ptr = rsp->ring; |
3619 | rsp->ring_index = 0; | |
3620 | rsp->status_srb = NULL; | |
e315cd28 AC |
3621 | pkt = rsp->ring_ptr; |
3622 | for (cnt = 0; cnt < rsp->length; cnt++) { | |
1da177e4 LT |
3623 | pkt->signature = RESPONSE_PROCESSED; |
3624 | pkt++; | |
3625 | } | |
1da177e4 LT |
3626 | } |
3627 | ||
3628 | /** | |
3629 | * qla2x00_update_fw_options() - Read and process firmware options. | |
2db6228d | 3630 | * @vha: HA context |
1da177e4 LT |
3631 | * |
3632 | * Returns 0 on success. | |
3633 | */ | |
abbd8870 | 3634 | void |
e315cd28 | 3635 | qla2x00_update_fw_options(scsi_qla_host_t *vha) |
1da177e4 LT |
3636 | { |
3637 | uint16_t swing, emphasis, tx_sens, rx_sens; | |
e315cd28 | 3638 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
3639 | |
3640 | memset(ha->fw_options, 0, sizeof(ha->fw_options)); | |
e315cd28 | 3641 | qla2x00_get_fw_options(vha, ha->fw_options); |
1da177e4 LT |
3642 | |
3643 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) | |
3644 | return; | |
3645 | ||
3646 | /* Serial Link options. */ | |
7c3df132 SK |
3647 | ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, |
3648 | "Serial link options.\n"); | |
3649 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, | |
3650 | (uint8_t *)&ha->fw_seriallink_options, | |
3651 | sizeof(ha->fw_seriallink_options)); | |
1da177e4 LT |
3652 | |
3653 | ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; | |
3654 | if (ha->fw_seriallink_options[3] & BIT_2) { | |
3655 | ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; | |
3656 | ||
3657 | /* 1G settings */ | |
3658 | swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); | |
3659 | emphasis = (ha->fw_seriallink_options[2] & | |
3660 | (BIT_4 | BIT_3)) >> 3; | |
3661 | tx_sens = ha->fw_seriallink_options[0] & | |
fa2a1ce5 | 3662 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
3663 | rx_sens = (ha->fw_seriallink_options[0] & |
3664 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
3665 | ha->fw_options[10] = (emphasis << 14) | (swing << 8); | |
3666 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
3667 | if (rx_sens == 0x0) | |
3668 | rx_sens = 0x3; | |
3669 | ha->fw_options[10] |= (tx_sens << 4) | rx_sens; | |
3670 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
3671 | ha->fw_options[10] |= BIT_5 | | |
3672 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
3673 | (tx_sens & (BIT_1 | BIT_0)); | |
3674 | ||
3675 | /* 2G settings */ | |
3676 | swing = (ha->fw_seriallink_options[2] & | |
3677 | (BIT_7 | BIT_6 | BIT_5)) >> 5; | |
3678 | emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); | |
3679 | tx_sens = ha->fw_seriallink_options[1] & | |
fa2a1ce5 | 3680 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
3681 | rx_sens = (ha->fw_seriallink_options[1] & |
3682 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
3683 | ha->fw_options[11] = (emphasis << 14) | (swing << 8); | |
3684 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
3685 | if (rx_sens == 0x0) | |
3686 | rx_sens = 0x3; | |
3687 | ha->fw_options[11] |= (tx_sens << 4) | rx_sens; | |
3688 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
3689 | ha->fw_options[11] |= BIT_5 | | |
3690 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
3691 | (tx_sens & (BIT_1 | BIT_0)); | |
3692 | } | |
3693 | ||
3694 | /* FCP2 options. */ | |
3695 | /* Return command IOCBs without waiting for an ABTS to complete. */ | |
3696 | ha->fw_options[3] |= BIT_13; | |
3697 | ||
3698 | /* LED scheme. */ | |
3699 | if (ha->flags.enable_led_scheme) | |
3700 | ha->fw_options[2] |= BIT_12; | |
3701 | ||
48c02fde | 3702 | /* Detect ISP6312. */ |
3703 | if (IS_QLA6312(ha)) | |
3704 | ha->fw_options[2] |= BIT_13; | |
3705 | ||
088d09d4 GM |
3706 | /* Set Retry FLOGI in case of P2P connection */ |
3707 | if (ha->operating_mode == P2P) { | |
3708 | ha->fw_options[2] |= BIT_3; | |
3709 | ql_dbg(ql_dbg_disc, vha, 0x2100, | |
3710 | "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", | |
3711 | __func__, ha->fw_options[2]); | |
3712 | } | |
3713 | ||
1da177e4 | 3714 | /* Update firmware options. */ |
e315cd28 | 3715 | qla2x00_set_fw_options(vha, ha->fw_options); |
1da177e4 LT |
3716 | } |
3717 | ||
0107109e | 3718 | void |
e315cd28 | 3719 | qla24xx_update_fw_options(scsi_qla_host_t *vha) |
0107109e AV |
3720 | { |
3721 | int rval; | |
e315cd28 | 3722 | struct qla_hw_data *ha = vha->hw; |
0107109e | 3723 | |
7ec0effd | 3724 | if (IS_P3P_TYPE(ha)) |
a9083016 GM |
3725 | return; |
3726 | ||
f198cafa HM |
3727 | /* Hold status IOCBs until ABTS response received. */ |
3728 | if (ql2xfwholdabts) | |
3729 | ha->fw_options[3] |= BIT_12; | |
3730 | ||
088d09d4 GM |
3731 | /* Set Retry FLOGI in case of P2P connection */ |
3732 | if (ha->operating_mode == P2P) { | |
3733 | ha->fw_options[2] |= BIT_3; | |
3734 | ql_dbg(ql_dbg_disc, vha, 0x2101, | |
3735 | "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", | |
3736 | __func__, ha->fw_options[2]); | |
3737 | } | |
3738 | ||
41dc529a | 3739 | /* Move PUREX, ABTS RX & RIDA to ATIOQ */ |
3c4810ff QT |
3740 | if (ql2xmvasynctoatio && |
3741 | (IS_QLA83XX(ha) || IS_QLA27XX(ha))) { | |
41dc529a QT |
3742 | if (qla_tgt_mode_enabled(vha) || |
3743 | qla_dual_mode_enabled(vha)) | |
3744 | ha->fw_options[2] |= BIT_11; | |
3745 | else | |
3746 | ha->fw_options[2] &= ~BIT_11; | |
3747 | } | |
3748 | ||
f7e761f5 QT |
3749 | if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { |
3750 | /* | |
3751 | * Tell FW to track each exchange to prevent | |
3752 | * driver from using stale exchange. | |
3753 | */ | |
3754 | if (qla_tgt_mode_enabled(vha) || | |
3755 | qla_dual_mode_enabled(vha)) | |
3756 | ha->fw_options[2] |= BIT_4; | |
3757 | else | |
3758 | ha->fw_options[2] &= ~BIT_4; | |
9ecf0b0d QT |
3759 | |
3760 | /* Reserve 1/2 of emergency exchanges for ELS.*/ | |
3761 | if (qla2xuseresexchforels) | |
3762 | ha->fw_options[2] |= BIT_8; | |
3763 | else | |
3764 | ha->fw_options[2] &= ~BIT_8; | |
f7e761f5 QT |
3765 | } |
3766 | ||
83548fe2 QT |
3767 | ql_dbg(ql_dbg_init, vha, 0x00e8, |
3768 | "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", | |
3769 | __func__, ha->fw_options[1], ha->fw_options[2], | |
3770 | ha->fw_options[3], vha->host->active_mode); | |
3c4810ff QT |
3771 | |
3772 | if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3]) | |
3773 | qla2x00_set_fw_options(vha, ha->fw_options); | |
41dc529a | 3774 | |
0107109e | 3775 | /* Update Serial Link options. */ |
f94097ed | 3776 | if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) |
0107109e AV |
3777 | return; |
3778 | ||
e315cd28 | 3779 | rval = qla2x00_set_serdes_params(vha, |
f94097ed | 3780 | le16_to_cpu(ha->fw_seriallink_options24[1]), |
3781 | le16_to_cpu(ha->fw_seriallink_options24[2]), | |
3782 | le16_to_cpu(ha->fw_seriallink_options24[3])); | |
0107109e | 3783 | if (rval != QLA_SUCCESS) { |
7c3df132 | 3784 | ql_log(ql_log_warn, vha, 0x0104, |
0107109e AV |
3785 | "Unable to update Serial Link options (%x).\n", rval); |
3786 | } | |
3787 | } | |
3788 | ||
abbd8870 | 3789 | void |
e315cd28 | 3790 | qla2x00_config_rings(struct scsi_qla_host *vha) |
abbd8870 | 3791 | { |
e315cd28 | 3792 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 3793 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
73208dfd AC |
3794 | struct req_que *req = ha->req_q_map[0]; |
3795 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
abbd8870 AV |
3796 | |
3797 | /* Setup ring parameters in initialization control block. */ | |
ad950360 BVA |
3798 | ha->init_cb->request_q_outpointer = cpu_to_le16(0); |
3799 | ha->init_cb->response_q_inpointer = cpu_to_le16(0); | |
e315cd28 AC |
3800 | ha->init_cb->request_q_length = cpu_to_le16(req->length); |
3801 | ha->init_cb->response_q_length = cpu_to_le16(rsp->length); | |
3802 | ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
3803 | ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
3804 | ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
3805 | ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
abbd8870 AV |
3806 | |
3807 | WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); | |
3808 | WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); | |
3809 | WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); | |
3810 | WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); | |
3811 | RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ | |
3812 | } | |
3813 | ||
0107109e | 3814 | void |
e315cd28 | 3815 | qla24xx_config_rings(struct scsi_qla_host *vha) |
0107109e | 3816 | { |
e315cd28 | 3817 | struct qla_hw_data *ha = vha->hw; |
118e2ef9 | 3818 | device_reg_t *reg = ISP_QUE_REG(ha, 0); |
73208dfd AC |
3819 | struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; |
3820 | struct qla_msix_entry *msix; | |
0107109e | 3821 | struct init_cb_24xx *icb; |
73208dfd AC |
3822 | uint16_t rid = 0; |
3823 | struct req_que *req = ha->req_q_map[0]; | |
3824 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
0107109e | 3825 | |
6246b8a1 | 3826 | /* Setup ring parameters in initialization control block. */ |
0107109e | 3827 | icb = (struct init_cb_24xx *)ha->init_cb; |
ad950360 BVA |
3828 | icb->request_q_outpointer = cpu_to_le16(0); |
3829 | icb->response_q_inpointer = cpu_to_le16(0); | |
e315cd28 AC |
3830 | icb->request_q_length = cpu_to_le16(req->length); |
3831 | icb->response_q_length = cpu_to_le16(rsp->length); | |
3832 | icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
3833 | icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
3834 | icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
3835 | icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
0107109e | 3836 | |
2d70c103 | 3837 | /* Setup ATIO queue dma pointers for target mode */ |
ad950360 | 3838 | icb->atio_q_inpointer = cpu_to_le16(0); |
2d70c103 NB |
3839 | icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); |
3840 | icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma)); | |
3841 | icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma)); | |
3842 | ||
7c6300e3 | 3843 | if (IS_SHADOW_REG_CAPABLE(ha)) |
ad950360 | 3844 | icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); |
7c6300e3 | 3845 | |
f73cb695 | 3846 | if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { |
ad950360 BVA |
3847 | icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); |
3848 | icb->rid = cpu_to_le16(rid); | |
73208dfd AC |
3849 | if (ha->flags.msix_enabled) { |
3850 | msix = &ha->msix_entries[1]; | |
83548fe2 | 3851 | ql_dbg(ql_dbg_init, vha, 0x0019, |
7c3df132 SK |
3852 | "Registering vector 0x%x for base que.\n", |
3853 | msix->entry); | |
73208dfd AC |
3854 | icb->msix = cpu_to_le16(msix->entry); |
3855 | } | |
3856 | /* Use alternate PCI bus number */ | |
3857 | if (MSB(rid)) | |
ad950360 | 3858 | icb->firmware_options_2 |= cpu_to_le32(BIT_19); |
73208dfd AC |
3859 | /* Use alternate PCI devfn */ |
3860 | if (LSB(rid)) | |
ad950360 | 3861 | icb->firmware_options_2 |= cpu_to_le32(BIT_18); |
73208dfd | 3862 | |
3155754a | 3863 | /* Use Disable MSIX Handshake mode for capable adapters */ |
6246b8a1 GM |
3864 | if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && |
3865 | (ha->flags.msix_enabled)) { | |
ad950360 | 3866 | icb->firmware_options_2 &= cpu_to_le32(~BIT_22); |
3155754a | 3867 | ha->flags.disable_msix_handshake = 1; |
7c3df132 SK |
3868 | ql_dbg(ql_dbg_init, vha, 0x00fe, |
3869 | "MSIX Handshake Disable Mode turned on.\n"); | |
3155754a | 3870 | } else { |
ad950360 | 3871 | icb->firmware_options_2 |= cpu_to_le32(BIT_22); |
3155754a | 3872 | } |
ad950360 | 3873 | icb->firmware_options_2 |= cpu_to_le32(BIT_23); |
73208dfd AC |
3874 | |
3875 | WRT_REG_DWORD(®->isp25mq.req_q_in, 0); | |
3876 | WRT_REG_DWORD(®->isp25mq.req_q_out, 0); | |
3877 | WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); | |
3878 | WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); | |
3879 | } else { | |
3880 | WRT_REG_DWORD(®->isp24.req_q_in, 0); | |
3881 | WRT_REG_DWORD(®->isp24.req_q_out, 0); | |
3882 | WRT_REG_DWORD(®->isp24.rsp_q_in, 0); | |
3883 | WRT_REG_DWORD(®->isp24.rsp_q_out, 0); | |
3884 | } | |
4910b524 | 3885 | |
aa230bc5 | 3886 | qlt_24xx_config_rings(vha); |
2d70c103 | 3887 | |
4910b524 AG |
3888 | /* If the user has configured the speed, set it here */ |
3889 | if (ha->set_data_rate) { | |
3890 | ql_dbg(ql_dbg_init, vha, 0x00fd, | |
3891 | "Speed set by user : %s Gbps \n", | |
3892 | qla2x00_get_link_speed_str(ha, ha->set_data_rate)); | |
3893 | icb->firmware_options_3 = (ha->set_data_rate << 13); | |
3894 | } | |
3895 | ||
73208dfd AC |
3896 | /* PCI posting */ |
3897 | RD_REG_DWORD(&ioreg->hccr); | |
0107109e AV |
3898 | } |
3899 | ||
1da177e4 LT |
3900 | /** |
3901 | * qla2x00_init_rings() - Initializes firmware. | |
2db6228d | 3902 | * @vha: HA context |
1da177e4 LT |
3903 | * |
3904 | * Beginning of request ring has initialization control block already built | |
3905 | * by nvram config routine. | |
3906 | * | |
3907 | * Returns 0 on success. | |
3908 | */ | |
8ae6d9c7 | 3909 | int |
e315cd28 | 3910 | qla2x00_init_rings(scsi_qla_host_t *vha) |
1da177e4 LT |
3911 | { |
3912 | int rval; | |
3913 | unsigned long flags = 0; | |
29bdccbe | 3914 | int cnt, que; |
e315cd28 | 3915 | struct qla_hw_data *ha = vha->hw; |
29bdccbe AC |
3916 | struct req_que *req; |
3917 | struct rsp_que *rsp; | |
2c3dfe3f SJ |
3918 | struct mid_init_cb_24xx *mid_init_cb = |
3919 | (struct mid_init_cb_24xx *) ha->init_cb; | |
1da177e4 LT |
3920 | |
3921 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3922 | ||
3923 | /* Clear outstanding commands array. */ | |
2afa19a9 | 3924 | for (que = 0; que < ha->max_req_queues; que++) { |
29bdccbe | 3925 | req = ha->req_q_map[que]; |
cb43285f | 3926 | if (!req || !test_bit(que, ha->req_qid_map)) |
29bdccbe | 3927 | continue; |
7c6300e3 JC |
3928 | req->out_ptr = (void *)(req->ring + req->length); |
3929 | *req->out_ptr = 0; | |
8d93f550 | 3930 | for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) |
29bdccbe | 3931 | req->outstanding_cmds[cnt] = NULL; |
1da177e4 | 3932 | |
2afa19a9 | 3933 | req->current_outstanding_cmd = 1; |
1da177e4 | 3934 | |
29bdccbe AC |
3935 | /* Initialize firmware. */ |
3936 | req->ring_ptr = req->ring; | |
3937 | req->ring_index = 0; | |
3938 | req->cnt = req->length; | |
3939 | } | |
1da177e4 | 3940 | |
2afa19a9 | 3941 | for (que = 0; que < ha->max_rsp_queues; que++) { |
29bdccbe | 3942 | rsp = ha->rsp_q_map[que]; |
cb43285f | 3943 | if (!rsp || !test_bit(que, ha->rsp_qid_map)) |
29bdccbe | 3944 | continue; |
7c6300e3 JC |
3945 | rsp->in_ptr = (void *)(rsp->ring + rsp->length); |
3946 | *rsp->in_ptr = 0; | |
29bdccbe | 3947 | /* Initialize response queue entries */ |
8ae6d9c7 GM |
3948 | if (IS_QLAFX00(ha)) |
3949 | qlafx00_init_response_q_entries(rsp); | |
3950 | else | |
3951 | qla2x00_init_response_q_entries(rsp); | |
29bdccbe | 3952 | } |
1da177e4 | 3953 | |
2d70c103 NB |
3954 | ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; |
3955 | ha->tgt.atio_ring_index = 0; | |
3956 | /* Initialize ATIO queue entries */ | |
3957 | qlt_init_atio_q_entries(vha); | |
3958 | ||
e315cd28 | 3959 | ha->isp_ops->config_rings(vha); |
1da177e4 LT |
3960 | |
3961 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
3962 | ||
8ae6d9c7 GM |
3963 | ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); |
3964 | ||
3965 | if (IS_QLAFX00(ha)) { | |
3966 | rval = qlafx00_init_firmware(vha, ha->init_cb_size); | |
3967 | goto next_check; | |
3968 | } | |
3969 | ||
1da177e4 | 3970 | /* Update any ISP specific firmware options before initialization. */ |
e315cd28 | 3971 | ha->isp_ops->update_fw_options(vha); |
1da177e4 | 3972 | |
605aa2bc | 3973 | if (ha->flags.npiv_supported) { |
45980cc2 | 3974 | if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) |
605aa2bc | 3975 | ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; |
c48339de | 3976 | mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); |
605aa2bc LC |
3977 | } |
3978 | ||
24a08138 | 3979 | if (IS_FWI2_CAPABLE(ha)) { |
ad950360 | 3980 | mid_init_cb->options = cpu_to_le16(BIT_1); |
24a08138 | 3981 | mid_init_cb->init_cb.execution_throttle = |
03e8c680 | 3982 | cpu_to_le16(ha->cur_fw_xcb_count); |
40f3862b JC |
3983 | ha->flags.dport_enabled = |
3984 | (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0; | |
3985 | ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", | |
3986 | (ha->flags.dport_enabled) ? "enabled" : "disabled"); | |
3987 | /* FA-WWPN Status */ | |
2486c627 | 3988 | ha->flags.fawwpn_enabled = |
40f3862b | 3989 | (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0; |
83548fe2 | 3990 | ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n", |
2486c627 | 3991 | (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); |
24a08138 | 3992 | } |
2c3dfe3f | 3993 | |
e315cd28 | 3994 | rval = qla2x00_init_firmware(vha, ha->init_cb_size); |
8ae6d9c7 | 3995 | next_check: |
1da177e4 | 3996 | if (rval) { |
7c3df132 SK |
3997 | ql_log(ql_log_fatal, vha, 0x00d2, |
3998 | "Init Firmware **** FAILED ****.\n"); | |
1da177e4 | 3999 | } else { |
7c3df132 SK |
4000 | ql_dbg(ql_dbg_init, vha, 0x00d3, |
4001 | "Init Firmware -- success.\n"); | |
4b60c827 | 4002 | QLA_FW_STARTED(ha); |
0645cb83 | 4003 | vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0; |
1da177e4 LT |
4004 | } |
4005 | ||
4006 | return (rval); | |
4007 | } | |
4008 | ||
4009 | /** | |
4010 | * qla2x00_fw_ready() - Waits for firmware ready. | |
2db6228d | 4011 | * @vha: HA context |
1da177e4 LT |
4012 | * |
4013 | * Returns 0 on success. | |
4014 | */ | |
4015 | static int | |
e315cd28 | 4016 | qla2x00_fw_ready(scsi_qla_host_t *vha) |
1da177e4 LT |
4017 | { |
4018 | int rval; | |
4d4df193 | 4019 | unsigned long wtime, mtime, cs84xx_time; |
1da177e4 LT |
4020 | uint16_t min_wait; /* Minimum wait time if loop is down */ |
4021 | uint16_t wait_time; /* Wait time if loop is coming ready */ | |
b5a340dd | 4022 | uint16_t state[6]; |
e315cd28 | 4023 | struct qla_hw_data *ha = vha->hw; |
1da177e4 | 4024 | |
8ae6d9c7 GM |
4025 | if (IS_QLAFX00(vha->hw)) |
4026 | return qlafx00_fw_ready(vha); | |
4027 | ||
1da177e4 LT |
4028 | rval = QLA_SUCCESS; |
4029 | ||
33461491 CD |
4030 | /* Time to wait for loop down */ |
4031 | if (IS_P3P_TYPE(ha)) | |
4032 | min_wait = 30; | |
4033 | else | |
4034 | min_wait = 20; | |
1da177e4 LT |
4035 | |
4036 | /* | |
4037 | * Firmware should take at most one RATOV to login, plus 5 seconds for | |
4038 | * our own processing. | |
4039 | */ | |
4040 | if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { | |
4041 | wait_time = min_wait; | |
4042 | } | |
4043 | ||
4044 | /* Min wait time if loop down */ | |
4045 | mtime = jiffies + (min_wait * HZ); | |
4046 | ||
4047 | /* wait time before firmware ready */ | |
4048 | wtime = jiffies + (wait_time * HZ); | |
4049 | ||
4050 | /* Wait for ISP to finish LIP */ | |
e315cd28 | 4051 | if (!vha->flags.init_done) |
7c3df132 SK |
4052 | ql_log(ql_log_info, vha, 0x801e, |
4053 | "Waiting for LIP to complete.\n"); | |
1da177e4 LT |
4054 | |
4055 | do { | |
5b939038 | 4056 | memset(state, -1, sizeof(state)); |
e315cd28 | 4057 | rval = qla2x00_get_firmware_state(vha, state); |
1da177e4 | 4058 | if (rval == QLA_SUCCESS) { |
4d4df193 | 4059 | if (state[0] < FSTATE_LOSS_OF_SYNC) { |
e315cd28 | 4060 | vha->device_flags &= ~DFLG_NO_CABLE; |
1da177e4 | 4061 | } |
4d4df193 | 4062 | if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { |
7c3df132 SK |
4063 | ql_dbg(ql_dbg_taskm, vha, 0x801f, |
4064 | "fw_state=%x 84xx=%x.\n", state[0], | |
4065 | state[2]); | |
4d4df193 HK |
4066 | if ((state[2] & FSTATE_LOGGED_IN) && |
4067 | (state[2] & FSTATE_WAITING_FOR_VERIFY)) { | |
7c3df132 SK |
4068 | ql_dbg(ql_dbg_taskm, vha, 0x8028, |
4069 | "Sending verify iocb.\n"); | |
4d4df193 HK |
4070 | |
4071 | cs84xx_time = jiffies; | |
e315cd28 | 4072 | rval = qla84xx_init_chip(vha); |
7c3df132 SK |
4073 | if (rval != QLA_SUCCESS) { |
4074 | ql_log(ql_log_warn, | |
cfb0919c | 4075 | vha, 0x8007, |
7c3df132 | 4076 | "Init chip failed.\n"); |
4d4df193 | 4077 | break; |
7c3df132 | 4078 | } |
4d4df193 HK |
4079 | |
4080 | /* Add time taken to initialize. */ | |
4081 | cs84xx_time = jiffies - cs84xx_time; | |
4082 | wtime += cs84xx_time; | |
4083 | mtime += cs84xx_time; | |
cfb0919c | 4084 | ql_dbg(ql_dbg_taskm, vha, 0x8008, |
7c3df132 SK |
4085 | "Increasing wait time by %ld. " |
4086 | "New time %ld.\n", cs84xx_time, | |
4087 | wtime); | |
4d4df193 HK |
4088 | } |
4089 | } else if (state[0] == FSTATE_READY) { | |
7c3df132 SK |
4090 | ql_dbg(ql_dbg_taskm, vha, 0x8037, |
4091 | "F/W Ready - OK.\n"); | |
1da177e4 | 4092 | |
e315cd28 | 4093 | qla2x00_get_retry_cnt(vha, &ha->retry_count, |
1da177e4 LT |
4094 | &ha->login_timeout, &ha->r_a_tov); |
4095 | ||
4096 | rval = QLA_SUCCESS; | |
4097 | break; | |
4098 | } | |
4099 | ||
4100 | rval = QLA_FUNCTION_FAILED; | |
4101 | ||
e315cd28 | 4102 | if (atomic_read(&vha->loop_down_timer) && |
4d4df193 | 4103 | state[0] != FSTATE_READY) { |
1da177e4 | 4104 | /* Loop down. Timeout on min_wait for states |
fa2a1ce5 AV |
4105 | * other than Wait for Login. |
4106 | */ | |
1da177e4 | 4107 | if (time_after_eq(jiffies, mtime)) { |
7c3df132 | 4108 | ql_log(ql_log_info, vha, 0x8038, |
1da177e4 LT |
4109 | "Cable is unplugged...\n"); |
4110 | ||
e315cd28 | 4111 | vha->device_flags |= DFLG_NO_CABLE; |
1da177e4 LT |
4112 | break; |
4113 | } | |
4114 | } | |
4115 | } else { | |
4116 | /* Mailbox cmd failed. Timeout on min_wait. */ | |
cdbb0a4f | 4117 | if (time_after_eq(jiffies, mtime) || |
7190575f | 4118 | ha->flags.isp82xx_fw_hung) |
1da177e4 LT |
4119 | break; |
4120 | } | |
4121 | ||
4122 | if (time_after_eq(jiffies, wtime)) | |
4123 | break; | |
4124 | ||
4125 | /* Delay for a while */ | |
4126 | msleep(500); | |
1da177e4 LT |
4127 | } while (1); |
4128 | ||
7c3df132 | 4129 | ql_dbg(ql_dbg_taskm, vha, 0x803a, |
b5a340dd JC |
4130 | "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], |
4131 | state[1], state[2], state[3], state[4], state[5], jiffies); | |
1da177e4 | 4132 | |
cfb0919c | 4133 | if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { |
7c3df132 SK |
4134 | ql_log(ql_log_warn, vha, 0x803b, |
4135 | "Firmware ready **** FAILED ****.\n"); | |
1da177e4 LT |
4136 | } |
4137 | ||
4138 | return (rval); | |
4139 | } | |
4140 | ||
4141 | /* | |
4142 | * qla2x00_configure_hba | |
4143 | * Setup adapter context. | |
4144 | * | |
4145 | * Input: | |
4146 | * ha = adapter state pointer. | |
4147 | * | |
4148 | * Returns: | |
4149 | * 0 = success | |
4150 | * | |
4151 | * Context: | |
4152 | * Kernel context. | |
4153 | */ | |
4154 | static int | |
e315cd28 | 4155 | qla2x00_configure_hba(scsi_qla_host_t *vha) |
1da177e4 LT |
4156 | { |
4157 | int rval; | |
4158 | uint16_t loop_id; | |
4159 | uint16_t topo; | |
2c3dfe3f | 4160 | uint16_t sw_cap; |
1da177e4 LT |
4161 | uint8_t al_pa; |
4162 | uint8_t area; | |
4163 | uint8_t domain; | |
4164 | char connect_type[22]; | |
e315cd28 | 4165 | struct qla_hw_data *ha = vha->hw; |
61e1b269 | 4166 | scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); |
482c9dc7 | 4167 | port_id_t id; |
9d1aa4e1 | 4168 | unsigned long flags; |
1da177e4 LT |
4169 | |
4170 | /* Get host addresses. */ | |
e315cd28 | 4171 | rval = qla2x00_get_adapter_id(vha, |
2c3dfe3f | 4172 | &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); |
1da177e4 | 4173 | if (rval != QLA_SUCCESS) { |
e315cd28 | 4174 | if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || |
6246b8a1 | 4175 | IS_CNA_CAPABLE(ha) || |
33135aa2 | 4176 | (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { |
7c3df132 SK |
4177 | ql_dbg(ql_dbg_disc, vha, 0x2008, |
4178 | "Loop is in a transition state.\n"); | |
33135aa2 | 4179 | } else { |
7c3df132 SK |
4180 | ql_log(ql_log_warn, vha, 0x2009, |
4181 | "Unable to get host loop ID.\n"); | |
61e1b269 JC |
4182 | if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && |
4183 | (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { | |
4184 | ql_log(ql_log_warn, vha, 0x1151, | |
4185 | "Doing link init.\n"); | |
4186 | if (qla24xx_link_initialize(vha) == QLA_SUCCESS) | |
4187 | return rval; | |
4188 | } | |
e315cd28 | 4189 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
33135aa2 | 4190 | } |
1da177e4 LT |
4191 | return (rval); |
4192 | } | |
4193 | ||
4194 | if (topo == 4) { | |
7c3df132 SK |
4195 | ql_log(ql_log_info, vha, 0x200a, |
4196 | "Cannot get topology - retrying.\n"); | |
1da177e4 LT |
4197 | return (QLA_FUNCTION_FAILED); |
4198 | } | |
4199 | ||
e315cd28 | 4200 | vha->loop_id = loop_id; |
1da177e4 LT |
4201 | |
4202 | /* initialize */ | |
4203 | ha->min_external_loopid = SNS_FIRST_LOOP_ID; | |
4204 | ha->operating_mode = LOOP; | |
2c3dfe3f | 4205 | ha->switch_cap = 0; |
1da177e4 LT |
4206 | |
4207 | switch (topo) { | |
4208 | case 0: | |
7c3df132 | 4209 | ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); |
1da177e4 LT |
4210 | ha->current_topology = ISP_CFG_NL; |
4211 | strcpy(connect_type, "(Loop)"); | |
4212 | break; | |
4213 | ||
4214 | case 1: | |
7c3df132 | 4215 | ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); |
2c3dfe3f | 4216 | ha->switch_cap = sw_cap; |
1da177e4 LT |
4217 | ha->current_topology = ISP_CFG_FL; |
4218 | strcpy(connect_type, "(FL_Port)"); | |
4219 | break; | |
4220 | ||
4221 | case 2: | |
7c3df132 | 4222 | ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); |
1da177e4 LT |
4223 | ha->operating_mode = P2P; |
4224 | ha->current_topology = ISP_CFG_N; | |
4225 | strcpy(connect_type, "(N_Port-to-N_Port)"); | |
4226 | break; | |
4227 | ||
4228 | case 3: | |
7c3df132 | 4229 | ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); |
2c3dfe3f | 4230 | ha->switch_cap = sw_cap; |
1da177e4 LT |
4231 | ha->operating_mode = P2P; |
4232 | ha->current_topology = ISP_CFG_F; | |
4233 | strcpy(connect_type, "(F_Port)"); | |
4234 | break; | |
4235 | ||
4236 | default: | |
7c3df132 SK |
4237 | ql_dbg(ql_dbg_disc, vha, 0x200f, |
4238 | "HBA in unknown topology %x, using NL.\n", topo); | |
1da177e4 LT |
4239 | ha->current_topology = ISP_CFG_NL; |
4240 | strcpy(connect_type, "(Loop)"); | |
4241 | break; | |
4242 | } | |
4243 | ||
4244 | /* Save Host port and loop ID. */ | |
4245 | /* byte order - Big Endian */ | |
482c9dc7 QT |
4246 | id.b.domain = domain; |
4247 | id.b.area = area; | |
4248 | id.b.al_pa = al_pa; | |
4249 | id.b.rsvd_1 = 0; | |
9d1aa4e1 | 4250 | spin_lock_irqsave(&ha->hardware_lock, flags); |
8777e431 QT |
4251 | if (!(topo == 2 && ha->flags.n2n_bigger)) |
4252 | qlt_update_host_map(vha, id); | |
9d1aa4e1 | 4253 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
2d70c103 | 4254 | |
e315cd28 | 4255 | if (!vha->flags.init_done) |
7c3df132 SK |
4256 | ql_log(ql_log_info, vha, 0x2010, |
4257 | "Topology - %s, Host Loop address 0x%x.\n", | |
e315cd28 | 4258 | connect_type, vha->loop_id); |
1da177e4 | 4259 | |
1da177e4 LT |
4260 | return(rval); |
4261 | } | |
4262 | ||
a9083016 | 4263 | inline void |
e315cd28 AC |
4264 | qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, |
4265 | char *def) | |
9bb9fcf2 AV |
4266 | { |
4267 | char *st, *en; | |
4268 | uint16_t index; | |
e315cd28 | 4269 | struct qla_hw_data *ha = vha->hw; |
ab671149 | 4270 | int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && |
6246b8a1 | 4271 | !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); |
9bb9fcf2 AV |
4272 | |
4273 | if (memcmp(model, BINZERO, len) != 0) { | |
4274 | strncpy(ha->model_number, model, len); | |
4275 | st = en = ha->model_number; | |
4276 | en += len - 1; | |
4277 | while (en > st) { | |
4278 | if (*en != 0x20 && *en != 0x00) | |
4279 | break; | |
4280 | *en-- = '\0'; | |
4281 | } | |
4282 | ||
4283 | index = (ha->pdev->subsystem_device & 0xff); | |
7d0dba17 AV |
4284 | if (use_tbl && |
4285 | ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
9bb9fcf2 | 4286 | index < QLA_MODEL_NAMES) |
1ee27146 JC |
4287 | strncpy(ha->model_desc, |
4288 | qla2x00_model_name[index * 2 + 1], | |
4289 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
4290 | } else { |
4291 | index = (ha->pdev->subsystem_device & 0xff); | |
7d0dba17 AV |
4292 | if (use_tbl && |
4293 | ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
9bb9fcf2 AV |
4294 | index < QLA_MODEL_NAMES) { |
4295 | strcpy(ha->model_number, | |
4296 | qla2x00_model_name[index * 2]); | |
1ee27146 JC |
4297 | strncpy(ha->model_desc, |
4298 | qla2x00_model_name[index * 2 + 1], | |
4299 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
4300 | } else { |
4301 | strcpy(ha->model_number, def); | |
4302 | } | |
4303 | } | |
1ee27146 | 4304 | if (IS_FWI2_CAPABLE(ha)) |
e315cd28 | 4305 | qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, |
1ee27146 | 4306 | sizeof(ha->model_desc)); |
9bb9fcf2 AV |
4307 | } |
4308 | ||
4e08df3f DM |
4309 | /* On sparc systems, obtain port and node WWN from firmware |
4310 | * properties. | |
4311 | */ | |
e315cd28 | 4312 | static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) |
4e08df3f DM |
4313 | { |
4314 | #ifdef CONFIG_SPARC | |
e315cd28 | 4315 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 4316 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
4317 | struct device_node *dp = pci_device_to_OF_node(pdev); |
4318 | const u8 *val; | |
4e08df3f DM |
4319 | int len; |
4320 | ||
4321 | val = of_get_property(dp, "port-wwn", &len); | |
4322 | if (val && len >= WWN_SIZE) | |
4323 | memcpy(nv->port_name, val, WWN_SIZE); | |
4324 | ||
4325 | val = of_get_property(dp, "node-wwn", &len); | |
4326 | if (val && len >= WWN_SIZE) | |
4327 | memcpy(nv->node_name, val, WWN_SIZE); | |
4328 | #endif | |
4329 | } | |
4330 | ||
1da177e4 LT |
4331 | /* |
4332 | * NVRAM configuration for ISP 2xxx | |
4333 | * | |
4334 | * Input: | |
4335 | * ha = adapter block pointer. | |
4336 | * | |
4337 | * Output: | |
4338 | * initialization control block in response_ring | |
4339 | * host adapters parameters in host adapter block | |
4340 | * | |
4341 | * Returns: | |
4342 | * 0 = success. | |
4343 | */ | |
abbd8870 | 4344 | int |
e315cd28 | 4345 | qla2x00_nvram_config(scsi_qla_host_t *vha) |
1da177e4 | 4346 | { |
4e08df3f | 4347 | int rval; |
0107109e AV |
4348 | uint8_t chksum = 0; |
4349 | uint16_t cnt; | |
4350 | uint8_t *dptr1, *dptr2; | |
e315cd28 | 4351 | struct qla_hw_data *ha = vha->hw; |
0107109e | 4352 | init_cb_t *icb = ha->init_cb; |
281afe19 SJ |
4353 | nvram_t *nv = ha->nvram; |
4354 | uint8_t *ptr = ha->nvram; | |
3d71644c | 4355 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 4356 | |
4e08df3f DM |
4357 | rval = QLA_SUCCESS; |
4358 | ||
1da177e4 | 4359 | /* Determine NVRAM starting address. */ |
0107109e | 4360 | ha->nvram_size = sizeof(nvram_t); |
1da177e4 LT |
4361 | ha->nvram_base = 0; |
4362 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) | |
4363 | if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) | |
4364 | ha->nvram_base = 0x80; | |
4365 | ||
4366 | /* Get NVRAM data and calculate checksum. */ | |
e315cd28 | 4367 | ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); |
0107109e AV |
4368 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) |
4369 | chksum += *ptr++; | |
1da177e4 | 4370 | |
7c3df132 SK |
4371 | ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, |
4372 | "Contents of NVRAM.\n"); | |
4373 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, | |
4374 | (uint8_t *)nv, ha->nvram_size); | |
1da177e4 LT |
4375 | |
4376 | /* Bad NVRAM data, set defaults parameters. */ | |
4377 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || | |
4378 | nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { | |
4379 | /* Reset NVRAM data. */ | |
7c3df132 | 4380 | ql_log(ql_log_warn, vha, 0x0064, |
9e336520 | 4381 | "Inconsistent NVRAM " |
7c3df132 SK |
4382 | "detected: checksum=0x%x id=%c version=0x%x.\n", |
4383 | chksum, nv->id[0], nv->nvram_version); | |
4384 | ql_log(ql_log_warn, vha, 0x0065, | |
4385 | "Falling back to " | |
4386 | "functioning (yet invalid -- WWPN) defaults.\n"); | |
4e08df3f DM |
4387 | |
4388 | /* | |
4389 | * Set default initialization control block. | |
4390 | */ | |
4391 | memset(nv, 0, ha->nvram_size); | |
4392 | nv->parameter_block_version = ICB_VERSION; | |
4393 | ||
4394 | if (IS_QLA23XX(ha)) { | |
4395 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
4396 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
4397 | nv->add_firmware_options[0] = BIT_5; | |
4398 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
98aee70d | 4399 | nv->frame_payload_size = 2048; |
4e08df3f DM |
4400 | nv->special_options[1] = BIT_7; |
4401 | } else if (IS_QLA2200(ha)) { | |
4402 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
4403 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
4404 | nv->add_firmware_options[0] = BIT_5; | |
4405 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
98aee70d | 4406 | nv->frame_payload_size = 1024; |
4e08df3f DM |
4407 | } else if (IS_QLA2100(ha)) { |
4408 | nv->firmware_options[0] = BIT_3 | BIT_1; | |
4409 | nv->firmware_options[1] = BIT_5; | |
98aee70d | 4410 | nv->frame_payload_size = 1024; |
4e08df3f DM |
4411 | } |
4412 | ||
ad950360 BVA |
4413 | nv->max_iocb_allocation = cpu_to_le16(256); |
4414 | nv->execution_throttle = cpu_to_le16(16); | |
4e08df3f DM |
4415 | nv->retry_count = 8; |
4416 | nv->retry_delay = 1; | |
4417 | ||
4418 | nv->port_name[0] = 33; | |
4419 | nv->port_name[3] = 224; | |
4420 | nv->port_name[4] = 139; | |
4421 | ||
e315cd28 | 4422 | qla2xxx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
4423 | |
4424 | nv->login_timeout = 4; | |
4425 | ||
4426 | /* | |
4427 | * Set default host adapter parameters | |
4428 | */ | |
4429 | nv->host_p[1] = BIT_2; | |
4430 | nv->reset_delay = 5; | |
4431 | nv->port_down_retry_count = 8; | |
ad950360 | 4432 | nv->max_luns_per_target = cpu_to_le16(8); |
4e08df3f DM |
4433 | nv->link_down_timeout = 60; |
4434 | ||
4435 | rval = 1; | |
1da177e4 LT |
4436 | } |
4437 | ||
4438 | #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) | |
4439 | /* | |
4440 | * The SN2 does not provide BIOS emulation which means you can't change | |
4441 | * potentially bogus BIOS settings. Force the use of default settings | |
4442 | * for link rate and frame size. Hope that the rest of the settings | |
4443 | * are valid. | |
4444 | */ | |
4445 | if (ia64_platform_is("sn2")) { | |
98aee70d | 4446 | nv->frame_payload_size = 2048; |
1da177e4 LT |
4447 | if (IS_QLA23XX(ha)) |
4448 | nv->special_options[1] = BIT_7; | |
4449 | } | |
4450 | #endif | |
4451 | ||
4452 | /* Reset Initialization control block */ | |
0107109e | 4453 | memset(icb, 0, ha->init_cb_size); |
1da177e4 LT |
4454 | |
4455 | /* | |
4456 | * Setup driver NVRAM options. | |
4457 | */ | |
4458 | nv->firmware_options[0] |= (BIT_6 | BIT_1); | |
4459 | nv->firmware_options[0] &= ~(BIT_5 | BIT_4); | |
4460 | nv->firmware_options[1] |= (BIT_5 | BIT_0); | |
4461 | nv->firmware_options[1] &= ~BIT_4; | |
4462 | ||
4463 | if (IS_QLA23XX(ha)) { | |
4464 | nv->firmware_options[0] |= BIT_2; | |
4465 | nv->firmware_options[0] &= ~BIT_3; | |
2d70c103 | 4466 | nv->special_options[0] &= ~BIT_6; |
0107109e | 4467 | nv->add_firmware_options[1] |= BIT_5 | BIT_4; |
1da177e4 LT |
4468 | |
4469 | if (IS_QLA2300(ha)) { | |
4470 | if (ha->fb_rev == FPM_2310) { | |
4471 | strcpy(ha->model_number, "QLA2310"); | |
4472 | } else { | |
4473 | strcpy(ha->model_number, "QLA2300"); | |
4474 | } | |
4475 | } else { | |
e315cd28 | 4476 | qla2x00_set_model_info(vha, nv->model_number, |
9bb9fcf2 | 4477 | sizeof(nv->model_number), "QLA23xx"); |
1da177e4 LT |
4478 | } |
4479 | } else if (IS_QLA2200(ha)) { | |
4480 | nv->firmware_options[0] |= BIT_2; | |
4481 | /* | |
4482 | * 'Point-to-point preferred, else loop' is not a safe | |
4483 | * connection mode setting. | |
4484 | */ | |
4485 | if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == | |
4486 | (BIT_5 | BIT_4)) { | |
4487 | /* Force 'loop preferred, else point-to-point'. */ | |
4488 | nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); | |
4489 | nv->add_firmware_options[0] |= BIT_5; | |
4490 | } | |
4491 | strcpy(ha->model_number, "QLA22xx"); | |
4492 | } else /*if (IS_QLA2100(ha))*/ { | |
4493 | strcpy(ha->model_number, "QLA2100"); | |
4494 | } | |
4495 | ||
4496 | /* | |
4497 | * Copy over NVRAM RISC parameter block to initialization control block. | |
4498 | */ | |
4499 | dptr1 = (uint8_t *)icb; | |
4500 | dptr2 = (uint8_t *)&nv->parameter_block_version; | |
4501 | cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; | |
4502 | while (cnt--) | |
4503 | *dptr1++ = *dptr2++; | |
4504 | ||
4505 | /* Copy 2nd half. */ | |
4506 | dptr1 = (uint8_t *)icb->add_firmware_options; | |
4507 | cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; | |
4508 | while (cnt--) | |
4509 | *dptr1++ = *dptr2++; | |
0eaaca4c | 4510 | ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); |
5341e868 AV |
4511 | /* Use alternate WWN? */ |
4512 | if (nv->host_p[1] & BIT_7) { | |
4513 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
4514 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
4515 | } | |
4516 | ||
1da177e4 LT |
4517 | /* Prepare nodename */ |
4518 | if ((icb->firmware_options[1] & BIT_6) == 0) { | |
4519 | /* | |
4520 | * Firmware will apply the following mask if the nodename was | |
4521 | * not provided. | |
4522 | */ | |
4523 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
4524 | icb->node_name[0] &= 0xF0; | |
4525 | } | |
4526 | ||
4527 | /* | |
4528 | * Set host adapter parameters. | |
4529 | */ | |
3ce8866c SK |
4530 | |
4531 | /* | |
4532 | * BIT_7 in the host-parameters section allows for modification to | |
4533 | * internal driver logging. | |
4534 | */ | |
0181944f | 4535 | if (nv->host_p[0] & BIT_7) |
cfb0919c | 4536 | ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; |
1da177e4 LT |
4537 | ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); |
4538 | /* Always load RISC code on non ISP2[12]00 chips. */ | |
4539 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) | |
4540 | ha->flags.disable_risc_code_load = 0; | |
4541 | ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); | |
4542 | ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); | |
4543 | ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); | |
06c22bd1 | 4544 | ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; |
d4c760c2 | 4545 | ha->flags.disable_serdes = 0; |
1da177e4 LT |
4546 | |
4547 | ha->operating_mode = | |
4548 | (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
4549 | ||
4550 | memcpy(ha->fw_seriallink_options, nv->seriallink_options, | |
4551 | sizeof(ha->fw_seriallink_options)); | |
4552 | ||
4553 | /* save HBA serial number */ | |
4554 | ha->serial0 = icb->port_name[5]; | |
4555 | ha->serial1 = icb->port_name[6]; | |
4556 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
4557 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
4558 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
1da177e4 | 4559 | |
ad950360 | 4560 | icb->execution_throttle = cpu_to_le16(0xFFFF); |
1da177e4 LT |
4561 | |
4562 | ha->retry_count = nv->retry_count; | |
4563 | ||
4564 | /* Set minimum login_timeout to 4 seconds. */ | |
5b91490e | 4565 | if (nv->login_timeout != ql2xlogintimeout) |
1da177e4 LT |
4566 | nv->login_timeout = ql2xlogintimeout; |
4567 | if (nv->login_timeout < 4) | |
4568 | nv->login_timeout = 4; | |
4569 | ha->login_timeout = nv->login_timeout; | |
1da177e4 | 4570 | |
00a537b8 AV |
4571 | /* Set minimum RATOV to 100 tenths of a second. */ |
4572 | ha->r_a_tov = 100; | |
1da177e4 | 4573 | |
1da177e4 LT |
4574 | ha->loop_reset_delay = nv->reset_delay; |
4575 | ||
1da177e4 LT |
4576 | /* Link Down Timeout = 0: |
4577 | * | |
4578 | * When Port Down timer expires we will start returning | |
4579 | * I/O's to OS with "DID_NO_CONNECT". | |
4580 | * | |
4581 | * Link Down Timeout != 0: | |
4582 | * | |
4583 | * The driver waits for the link to come up after link down | |
4584 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
fa2a1ce5 | 4585 | */ |
1da177e4 LT |
4586 | if (nv->link_down_timeout == 0) { |
4587 | ha->loop_down_abort_time = | |
354d6b21 | 4588 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); |
1da177e4 LT |
4589 | } else { |
4590 | ha->link_down_timeout = nv->link_down_timeout; | |
4591 | ha->loop_down_abort_time = | |
4592 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
fa2a1ce5 | 4593 | } |
1da177e4 | 4594 | |
1da177e4 LT |
4595 | /* |
4596 | * Need enough time to try and get the port back. | |
4597 | */ | |
4598 | ha->port_down_retry_count = nv->port_down_retry_count; | |
4599 | if (qlport_down_retry) | |
4600 | ha->port_down_retry_count = qlport_down_retry; | |
4601 | /* Set login_retry_count */ | |
4602 | ha->login_retry_count = nv->retry_count; | |
4603 | if (ha->port_down_retry_count == nv->port_down_retry_count && | |
4604 | ha->port_down_retry_count > 3) | |
4605 | ha->login_retry_count = ha->port_down_retry_count; | |
4606 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
4607 | ha->login_retry_count = ha->port_down_retry_count; | |
4608 | if (ql2xloginretrycount) | |
4609 | ha->login_retry_count = ql2xloginretrycount; | |
4610 | ||
ad950360 | 4611 | icb->lun_enables = cpu_to_le16(0); |
1da177e4 LT |
4612 | icb->command_resource_count = 0; |
4613 | icb->immediate_notify_resource_count = 0; | |
ad950360 | 4614 | icb->timeout = cpu_to_le16(0); |
1da177e4 LT |
4615 | |
4616 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { | |
4617 | /* Enable RIO */ | |
4618 | icb->firmware_options[0] &= ~BIT_3; | |
4619 | icb->add_firmware_options[0] &= | |
4620 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
4621 | icb->add_firmware_options[0] |= BIT_2; | |
4622 | icb->response_accumulation_timer = 3; | |
4623 | icb->interrupt_delay_timer = 5; | |
4624 | ||
e315cd28 | 4625 | vha->flags.process_response_queue = 1; |
1da177e4 | 4626 | } else { |
4fdfefe5 | 4627 | /* Enable ZIO. */ |
e315cd28 | 4628 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
4629 | ha->zio_mode = icb->add_firmware_options[0] & |
4630 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
4631 | ha->zio_timer = icb->interrupt_delay_timer ? | |
4632 | icb->interrupt_delay_timer: 2; | |
4633 | } | |
1da177e4 LT |
4634 | icb->add_firmware_options[0] &= |
4635 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
e315cd28 | 4636 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 4637 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d | 4638 | ha->zio_mode = QLA_ZIO_MODE_6; |
4639 | ||
7c3df132 | 4640 | ql_log(ql_log_info, vha, 0x0068, |
4fdfefe5 AV |
4641 | "ZIO mode %d enabled; timer delay (%d us).\n", |
4642 | ha->zio_mode, ha->zio_timer * 100); | |
1da177e4 | 4643 | |
4fdfefe5 AV |
4644 | icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; |
4645 | icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; | |
e315cd28 | 4646 | vha->flags.process_response_queue = 1; |
1da177e4 LT |
4647 | } |
4648 | } | |
4649 | ||
4e08df3f | 4650 | if (rval) { |
7c3df132 SK |
4651 | ql_log(ql_log_warn, vha, 0x0069, |
4652 | "NVRAM configuration failed.\n"); | |
4e08df3f DM |
4653 | } |
4654 | return (rval); | |
1da177e4 LT |
4655 | } |
4656 | ||
19a7b4ae JSEC |
4657 | static void |
4658 | qla2x00_rport_del(void *data) | |
4659 | { | |
4660 | fc_port_t *fcport = data; | |
d97994dc | 4661 | struct fc_rport *rport; |
044d78e1 | 4662 | unsigned long flags; |
d97994dc | 4663 | |
044d78e1 | 4664 | spin_lock_irqsave(fcport->vha->host->host_lock, flags); |
ac280b67 | 4665 | rport = fcport->drport ? fcport->drport: fcport->rport; |
d97994dc | 4666 | fcport->drport = NULL; |
044d78e1 | 4667 | spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); |
726b8548 | 4668 | if (rport) { |
83548fe2 QT |
4669 | ql_dbg(ql_dbg_disc, fcport->vha, 0x210b, |
4670 | "%s %8phN. rport %p roles %x\n", | |
4671 | __func__, fcport->port_name, rport, | |
4672 | rport->roles); | |
726b8548 | 4673 | |
d97994dc | 4674 | fc_remote_port_delete(rport); |
726b8548 | 4675 | } |
19a7b4ae JSEC |
4676 | } |
4677 | ||
1da177e4 LT |
4678 | /** |
4679 | * qla2x00_alloc_fcport() - Allocate a generic fcport. | |
2db6228d | 4680 | * @vha: HA context |
1da177e4 LT |
4681 | * @flags: allocation flags |
4682 | * | |
4683 | * Returns a pointer to the allocated fcport, or NULL, if none available. | |
4684 | */ | |
9a069e19 | 4685 | fc_port_t * |
e315cd28 | 4686 | qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) |
1da177e4 LT |
4687 | { |
4688 | fc_port_t *fcport; | |
4689 | ||
bbfbbbc1 MK |
4690 | fcport = kzalloc(sizeof(fc_port_t), flags); |
4691 | if (!fcport) | |
4692 | return NULL; | |
1da177e4 | 4693 | |
9ecd6564 QT |
4694 | fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev, |
4695 | sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma, | |
4696 | flags); | |
4697 | if (!fcport->ct_desc.ct_sns) { | |
4698 | ql_log(ql_log_warn, vha, 0xd049, | |
4699 | "Failed to allocate ct_sns request.\n"); | |
4700 | kfree(fcport); | |
4701 | return NULL; | |
4702 | } | |
4703 | ||
1da177e4 | 4704 | /* Setup fcport template structure. */ |
e315cd28 | 4705 | fcport->vha = vha; |
1da177e4 LT |
4706 | fcport->port_type = FCT_UNKNOWN; |
4707 | fcport->loop_id = FC_NO_LOOP_ID; | |
ec426e10 | 4708 | qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); |
ad3e0eda | 4709 | fcport->supported_classes = FC_COS_UNSPECIFIED; |
f635e48e | 4710 | fcport->fp_speed = PORT_SPEED_UNKNOWN; |
1da177e4 | 4711 | |
726b8548 QT |
4712 | fcport->disc_state = DSC_DELETED; |
4713 | fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; | |
4714 | fcport->deleted = QLA_SESS_DELETED; | |
4715 | fcport->login_retry = vha->hw->login_retry_count; | |
9ecd6564 | 4716 | fcport->chip_reset = vha->hw->base_qpair->chip_reset; |
726b8548 QT |
4717 | fcport->logout_on_delete = 1; |
4718 | ||
4719 | if (!fcport->ct_desc.ct_sns) { | |
83548fe2 | 4720 | ql_log(ql_log_warn, vha, 0xd049, |
726b8548 QT |
4721 | "Failed to allocate ct_sns request.\n"); |
4722 | kfree(fcport); | |
4723 | fcport = NULL; | |
4724 | } | |
9ecd6564 | 4725 | |
726b8548 | 4726 | INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn); |
cd4ed6b4 | 4727 | INIT_WORK(&fcport->reg_work, qla_register_fcport_fn); |
726b8548 QT |
4728 | INIT_LIST_HEAD(&fcport->gnl_entry); |
4729 | INIT_LIST_HEAD(&fcport->list); | |
4730 | ||
bbfbbbc1 | 4731 | return fcport; |
1da177e4 LT |
4732 | } |
4733 | ||
726b8548 QT |
4734 | void |
4735 | qla2x00_free_fcport(fc_port_t *fcport) | |
4736 | { | |
4737 | if (fcport->ct_desc.ct_sns) { | |
4738 | dma_free_coherent(&fcport->vha->hw->pdev->dev, | |
4739 | sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns, | |
4740 | fcport->ct_desc.ct_sns_dma); | |
4741 | ||
4742 | fcport->ct_desc.ct_sns = NULL; | |
4743 | } | |
4744 | kfree(fcport); | |
4745 | } | |
4746 | ||
1da177e4 LT |
4747 | /* |
4748 | * qla2x00_configure_loop | |
4749 | * Updates Fibre Channel Device Database with what is actually on loop. | |
4750 | * | |
4751 | * Input: | |
4752 | * ha = adapter block pointer. | |
4753 | * | |
4754 | * Returns: | |
4755 | * 0 = success. | |
4756 | * 1 = error. | |
4757 | * 2 = database was full and device was not configured. | |
4758 | */ | |
4759 | static int | |
e315cd28 | 4760 | qla2x00_configure_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
4761 | { |
4762 | int rval; | |
4763 | unsigned long flags, save_flags; | |
e315cd28 | 4764 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
4765 | rval = QLA_SUCCESS; |
4766 | ||
4767 | /* Get Initiator ID */ | |
e315cd28 AC |
4768 | if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { |
4769 | rval = qla2x00_configure_hba(vha); | |
1da177e4 | 4770 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
4771 | ql_dbg(ql_dbg_disc, vha, 0x2013, |
4772 | "Unable to configure HBA.\n"); | |
1da177e4 LT |
4773 | return (rval); |
4774 | } | |
4775 | } | |
4776 | ||
e315cd28 | 4777 | save_flags = flags = vha->dpc_flags; |
7c3df132 SK |
4778 | ql_dbg(ql_dbg_disc, vha, 0x2014, |
4779 | "Configure loop -- dpc flags = 0x%lx.\n", flags); | |
1da177e4 LT |
4780 | |
4781 | /* | |
4782 | * If we have both an RSCN and PORT UPDATE pending then handle them | |
4783 | * both at the same time. | |
4784 | */ | |
e315cd28 AC |
4785 | clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
4786 | clear_bit(RSCN_UPDATE, &vha->dpc_flags); | |
1da177e4 | 4787 | |
3064ff39 MH |
4788 | qla2x00_get_data_rate(vha); |
4789 | ||
1da177e4 LT |
4790 | /* Determine what we need to do */ |
4791 | if (ha->current_topology == ISP_CFG_FL && | |
4792 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
4793 | ||
1da177e4 LT |
4794 | set_bit(RSCN_UPDATE, &flags); |
4795 | ||
4796 | } else if (ha->current_topology == ISP_CFG_F && | |
4797 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
4798 | ||
1da177e4 LT |
4799 | set_bit(RSCN_UPDATE, &flags); |
4800 | clear_bit(LOCAL_LOOP_UPDATE, &flags); | |
21333b48 AV |
4801 | |
4802 | } else if (ha->current_topology == ISP_CFG_N) { | |
4803 | clear_bit(RSCN_UPDATE, &flags); | |
48acad09 QT |
4804 | if (qla_tgt_mode_enabled(vha)) { |
4805 | /* allow the other side to start the login */ | |
9cd883f0 QT |
4806 | clear_bit(LOCAL_LOOP_UPDATE, &flags); |
4807 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
9cd883f0 | 4808 | } |
41dc529a QT |
4809 | } else if (ha->current_topology == ISP_CFG_NL) { |
4810 | clear_bit(RSCN_UPDATE, &flags); | |
4811 | set_bit(LOCAL_LOOP_UPDATE, &flags); | |
e315cd28 | 4812 | } else if (!vha->flags.online || |
1da177e4 | 4813 | (test_bit(ABORT_ISP_ACTIVE, &flags))) { |
1da177e4 LT |
4814 | set_bit(RSCN_UPDATE, &flags); |
4815 | set_bit(LOCAL_LOOP_UPDATE, &flags); | |
4816 | } | |
4817 | ||
4818 | if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { | |
7c3df132 SK |
4819 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { |
4820 | ql_dbg(ql_dbg_disc, vha, 0x2015, | |
4821 | "Loop resync needed, failing.\n"); | |
1da177e4 | 4822 | rval = QLA_FUNCTION_FAILED; |
642ef983 | 4823 | } else |
e315cd28 | 4824 | rval = qla2x00_configure_local_loop(vha); |
1da177e4 LT |
4825 | } |
4826 | ||
4827 | if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { | |
7c3df132 | 4828 | if (LOOP_TRANSITION(vha)) { |
83548fe2 | 4829 | ql_dbg(ql_dbg_disc, vha, 0x2099, |
7c3df132 | 4830 | "Needs RSCN update and loop transition.\n"); |
1da177e4 | 4831 | rval = QLA_FUNCTION_FAILED; |
7c3df132 | 4832 | } |
e315cd28 AC |
4833 | else |
4834 | rval = qla2x00_configure_fabric(vha); | |
1da177e4 LT |
4835 | } |
4836 | ||
4837 | if (rval == QLA_SUCCESS) { | |
e315cd28 AC |
4838 | if (atomic_read(&vha->loop_down_timer) || |
4839 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { | |
1da177e4 LT |
4840 | rval = QLA_FUNCTION_FAILED; |
4841 | } else { | |
e315cd28 | 4842 | atomic_set(&vha->loop_state, LOOP_READY); |
7c3df132 SK |
4843 | ql_dbg(ql_dbg_disc, vha, 0x2069, |
4844 | "LOOP READY.\n"); | |
ec7193e2 | 4845 | ha->flags.fw_init_done = 1; |
3bb67df5 DKU |
4846 | |
4847 | /* | |
4848 | * Process any ATIO queue entries that came in | |
4849 | * while we weren't online. | |
4850 | */ | |
ead03855 QT |
4851 | if (qla_tgt_mode_enabled(vha) || |
4852 | qla_dual_mode_enabled(vha)) { | |
1073daa4 QT |
4853 | spin_lock_irqsave(&ha->tgt.atio_lock, flags); |
4854 | qlt_24xx_process_atio_queue(vha, 0); | |
4855 | spin_unlock_irqrestore(&ha->tgt.atio_lock, | |
4856 | flags); | |
3bb67df5 | 4857 | } |
1da177e4 LT |
4858 | } |
4859 | } | |
4860 | ||
4861 | if (rval) { | |
7c3df132 SK |
4862 | ql_dbg(ql_dbg_disc, vha, 0x206a, |
4863 | "%s *** FAILED ***.\n", __func__); | |
1da177e4 | 4864 | } else { |
7c3df132 SK |
4865 | ql_dbg(ql_dbg_disc, vha, 0x206b, |
4866 | "%s: exiting normally.\n", __func__); | |
1da177e4 LT |
4867 | } |
4868 | ||
cc3ef7bc | 4869 | /* Restore state if a resync event occurred during processing */ |
e315cd28 | 4870 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { |
1da177e4 | 4871 | if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) |
e315cd28 | 4872 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
f4658b6c | 4873 | if (test_bit(RSCN_UPDATE, &save_flags)) { |
e315cd28 | 4874 | set_bit(RSCN_UPDATE, &vha->dpc_flags); |
f4658b6c | 4875 | } |
1da177e4 LT |
4876 | } |
4877 | ||
4878 | return (rval); | |
4879 | } | |
4880 | ||
1da177e4 LT |
4881 | /* |
4882 | * qla2x00_configure_local_loop | |
4883 | * Updates Fibre Channel Device Database with local loop devices. | |
4884 | * | |
4885 | * Input: | |
4886 | * ha = adapter block pointer. | |
4887 | * | |
4888 | * Returns: | |
4889 | * 0 = success. | |
4890 | */ | |
4891 | static int | |
e315cd28 | 4892 | qla2x00_configure_local_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
4893 | { |
4894 | int rval, rval2; | |
4895 | int found_devs; | |
4896 | int found; | |
4897 | fc_port_t *fcport, *new_fcport; | |
4898 | ||
4899 | uint16_t index; | |
4900 | uint16_t entries; | |
4901 | char *id_iter; | |
4902 | uint16_t loop_id; | |
4903 | uint8_t domain, area, al_pa; | |
e315cd28 | 4904 | struct qla_hw_data *ha = vha->hw; |
41dc529a | 4905 | unsigned long flags; |
1da177e4 | 4906 | |
8777e431 QT |
4907 | /* Inititae N2N login. */ |
4908 | if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) { | |
4909 | /* borrowing */ | |
4910 | u32 *bp, i, sz; | |
4911 | ||
4912 | memset(ha->init_cb, 0, ha->init_cb_size); | |
4913 | sz = min_t(int, sizeof(struct els_plogi_payload), | |
4914 | ha->init_cb_size); | |
4915 | rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma, | |
4916 | (void *)ha->init_cb, sz); | |
4917 | if (rval == QLA_SUCCESS) { | |
4918 | bp = (uint32_t *)ha->init_cb; | |
4919 | for (i = 0; i < sz/4 ; i++, bp++) | |
4920 | *bp = cpu_to_be32(*bp); | |
4921 | ||
4922 | memcpy(&ha->plogi_els_payld.data, (void *)ha->init_cb, | |
4923 | sizeof(ha->plogi_els_payld.data)); | |
4924 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
4925 | } else { | |
4926 | ql_dbg(ql_dbg_init, vha, 0x00d1, | |
4927 | "PLOGI ELS param read fail.\n"); | |
4928 | } | |
4929 | return QLA_SUCCESS; | |
4930 | } | |
4931 | ||
1da177e4 LT |
4932 | found_devs = 0; |
4933 | new_fcport = NULL; | |
642ef983 | 4934 | entries = MAX_FIBRE_DEVICES_LOOP; |
1da177e4 | 4935 | |
1da177e4 | 4936 | /* Get list of logged in devices. */ |
642ef983 | 4937 | memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); |
e315cd28 | 4938 | rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, |
1da177e4 LT |
4939 | &entries); |
4940 | if (rval != QLA_SUCCESS) | |
4941 | goto cleanup_allocation; | |
4942 | ||
83548fe2 | 4943 | ql_dbg(ql_dbg_disc, vha, 0x2011, |
7c3df132 SK |
4944 | "Entries in ID list (%d).\n", entries); |
4945 | ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, | |
4946 | (uint8_t *)ha->gid_list, | |
4947 | entries * sizeof(struct gid_list_info)); | |
1da177e4 | 4948 | |
0e324e94 QT |
4949 | if (entries == 0) { |
4950 | spin_lock_irqsave(&vha->work_lock, flags); | |
4951 | vha->scan.scan_retry++; | |
4952 | spin_unlock_irqrestore(&vha->work_lock, flags); | |
4953 | ||
4954 | if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { | |
4955 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
4956 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
4957 | } | |
4958 | } else { | |
4959 | vha->scan.scan_retry = 0; | |
4960 | } | |
4961 | ||
9cd883f0 QT |
4962 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
4963 | fcport->scan_state = QLA_FCPORT_SCAN; | |
4964 | } | |
4965 | ||
1da177e4 | 4966 | /* Allocate temporary fcport for any new fcports discovered. */ |
e315cd28 | 4967 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 4968 | if (new_fcport == NULL) { |
83548fe2 | 4969 | ql_log(ql_log_warn, vha, 0x2012, |
7c3df132 | 4970 | "Memory allocation failed for fcport.\n"); |
1da177e4 LT |
4971 | rval = QLA_MEMORY_ALLOC_FAILED; |
4972 | goto cleanup_allocation; | |
4973 | } | |
4974 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
4975 | ||
1da177e4 LT |
4976 | /* Add devices to port list. */ |
4977 | id_iter = (char *)ha->gid_list; | |
4978 | for (index = 0; index < entries; index++) { | |
4979 | domain = ((struct gid_list_info *)id_iter)->domain; | |
4980 | area = ((struct gid_list_info *)id_iter)->area; | |
4981 | al_pa = ((struct gid_list_info *)id_iter)->al_pa; | |
abbd8870 | 4982 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) |
1da177e4 LT |
4983 | loop_id = (uint16_t) |
4984 | ((struct gid_list_info *)id_iter)->loop_id_2100; | |
abbd8870 | 4985 | else |
1da177e4 LT |
4986 | loop_id = le16_to_cpu( |
4987 | ((struct gid_list_info *)id_iter)->loop_id); | |
abbd8870 | 4988 | id_iter += ha->gid_list_info_size; |
1da177e4 LT |
4989 | |
4990 | /* Bypass reserved domain fields. */ | |
4991 | if ((domain & 0xf0) == 0xf0) | |
4992 | continue; | |
4993 | ||
4705f10e QT |
4994 | /* Bypass if not same domain and area of adapter. */ |
4995 | if (area && domain && ((area != vha->d_id.b.area) || | |
4996 | (domain != vha->d_id.b.domain)) && | |
4997 | (ha->current_topology == ISP_CFG_NL)) | |
4998 | continue; | |
4999 | ||
5000 | ||
1da177e4 LT |
5001 | /* Bypass invalid local loop ID. */ |
5002 | if (loop_id > LAST_LOCAL_LOOP_ID) | |
5003 | continue; | |
5004 | ||
41dc529a | 5005 | memset(new_fcport->port_name, 0, WWN_SIZE); |
370d550e | 5006 | |
1da177e4 LT |
5007 | /* Fill in member data. */ |
5008 | new_fcport->d_id.b.domain = domain; | |
5009 | new_fcport->d_id.b.area = area; | |
5010 | new_fcport->d_id.b.al_pa = al_pa; | |
5011 | new_fcport->loop_id = loop_id; | |
9cd883f0 | 5012 | new_fcport->scan_state = QLA_FCPORT_FOUND; |
41dc529a | 5013 | |
e315cd28 | 5014 | rval2 = qla2x00_get_port_database(vha, new_fcport, 0); |
1da177e4 | 5015 | if (rval2 != QLA_SUCCESS) { |
83548fe2 | 5016 | ql_dbg(ql_dbg_disc, vha, 0x2097, |
7c3df132 SK |
5017 | "Failed to retrieve fcport information " |
5018 | "-- get_port_database=%x, loop_id=0x%04x.\n", | |
5019 | rval2, new_fcport->loop_id); | |
edd05de1 DG |
5020 | /* Skip retry if N2N */ |
5021 | if (ha->current_topology != ISP_CFG_N) { | |
5022 | ql_dbg(ql_dbg_disc, vha, 0x2105, | |
5023 | "Scheduling resync.\n"); | |
5024 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
5025 | continue; | |
5026 | } | |
1da177e4 LT |
5027 | } |
5028 | ||
41dc529a | 5029 | spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); |
1da177e4 LT |
5030 | /* Check for matching device in port list. */ |
5031 | found = 0; | |
5032 | fcport = NULL; | |
e315cd28 | 5033 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
5034 | if (memcmp(new_fcport->port_name, fcport->port_name, |
5035 | WWN_SIZE)) | |
5036 | continue; | |
5037 | ||
ddb9b126 | 5038 | fcport->flags &= ~FCF_FABRIC_DEVICE; |
1da177e4 LT |
5039 | fcport->loop_id = new_fcport->loop_id; |
5040 | fcport->port_type = new_fcport->port_type; | |
5041 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
5042 | memcpy(fcport->node_name, new_fcport->node_name, | |
5043 | WWN_SIZE); | |
9cd883f0 | 5044 | fcport->scan_state = QLA_FCPORT_FOUND; |
1da177e4 LT |
5045 | found++; |
5046 | break; | |
5047 | } | |
5048 | ||
5049 | if (!found) { | |
5050 | /* New device, add to fcports list. */ | |
e315cd28 | 5051 | list_add_tail(&new_fcport->list, &vha->vp_fcports); |
1da177e4 LT |
5052 | |
5053 | /* Allocate a new replacement fcport. */ | |
5054 | fcport = new_fcport; | |
41dc529a QT |
5055 | |
5056 | spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); | |
5057 | ||
e315cd28 | 5058 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
41dc529a | 5059 | |
1da177e4 | 5060 | if (new_fcport == NULL) { |
83548fe2 | 5061 | ql_log(ql_log_warn, vha, 0xd031, |
7c3df132 | 5062 | "Failed to allocate memory for fcport.\n"); |
1da177e4 LT |
5063 | rval = QLA_MEMORY_ALLOC_FAILED; |
5064 | goto cleanup_allocation; | |
5065 | } | |
41dc529a | 5066 | spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); |
1da177e4 LT |
5067 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; |
5068 | } | |
5069 | ||
41dc529a QT |
5070 | spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); |
5071 | ||
d8b45213 | 5072 | /* Base iIDMA settings on HBA port speed. */ |
a3cbdfad | 5073 | fcport->fp_speed = ha->link_data_rate; |
d8b45213 | 5074 | |
1da177e4 LT |
5075 | found_devs++; |
5076 | } | |
5077 | ||
9cd883f0 QT |
5078 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
5079 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
5080 | break; | |
5081 | ||
5082 | if (fcport->scan_state == QLA_FCPORT_SCAN) { | |
5083 | if ((qla_dual_mode_enabled(vha) || | |
5084 | qla_ini_mode_enabled(vha)) && | |
5085 | atomic_read(&fcport->state) == FCS_ONLINE) { | |
5086 | qla2x00_mark_device_lost(vha, fcport, | |
5087 | ql2xplogiabsentdevice, 0); | |
5088 | if (fcport->loop_id != FC_NO_LOOP_ID && | |
5089 | (fcport->flags & FCF_FCP2_DEVICE) == 0 && | |
5090 | fcport->port_type != FCT_INITIATOR && | |
5091 | fcport->port_type != FCT_BROADCAST) { | |
5092 | ql_dbg(ql_dbg_disc, vha, 0x20f0, | |
5093 | "%s %d %8phC post del sess\n", | |
5094 | __func__, __LINE__, | |
5095 | fcport->port_name); | |
5096 | ||
d8630bb9 | 5097 | qlt_schedule_sess_for_deletion(fcport); |
9cd883f0 QT |
5098 | continue; |
5099 | } | |
5100 | } | |
5101 | } | |
5102 | ||
5103 | if (fcport->scan_state == QLA_FCPORT_FOUND) | |
5104 | qla24xx_fcport_handle_login(vha, fcport); | |
5105 | } | |
5106 | ||
1da177e4 | 5107 | cleanup_allocation: |
c9475cb0 | 5108 | kfree(new_fcport); |
1da177e4 LT |
5109 | |
5110 | if (rval != QLA_SUCCESS) { | |
83548fe2 | 5111 | ql_dbg(ql_dbg_disc, vha, 0x2098, |
7c3df132 | 5112 | "Configure local loop error exit: rval=%x.\n", rval); |
1da177e4 LT |
5113 | } |
5114 | ||
1da177e4 LT |
5115 | return (rval); |
5116 | } | |
5117 | ||
d8b45213 | 5118 | static void |
e315cd28 | 5119 | qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
d8b45213 | 5120 | { |
d8b45213 | 5121 | int rval; |
93f2bd67 | 5122 | uint16_t mb[MAILBOX_REGISTER_COUNT]; |
e315cd28 | 5123 | struct qla_hw_data *ha = vha->hw; |
d8b45213 | 5124 | |
c76f2c01 | 5125 | if (!IS_IIDMA_CAPABLE(ha)) |
d8b45213 AV |
5126 | return; |
5127 | ||
c9afb9a2 GM |
5128 | if (atomic_read(&fcport->state) != FCS_ONLINE) |
5129 | return; | |
5130 | ||
39bd9622 | 5131 | if (fcport->fp_speed == PORT_SPEED_UNKNOWN || |
413c2f33 HM |
5132 | fcport->fp_speed > ha->link_data_rate || |
5133 | !ha->flags.gpsc_supported) | |
d8b45213 AV |
5134 | return; |
5135 | ||
e315cd28 | 5136 | rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, |
a3cbdfad | 5137 | mb); |
d8b45213 | 5138 | if (rval != QLA_SUCCESS) { |
7c3df132 | 5139 | ql_dbg(ql_dbg_disc, vha, 0x2004, |
7b833558 OK |
5140 | "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", |
5141 | fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); | |
d8b45213 | 5142 | } else { |
7c3df132 | 5143 | ql_dbg(ql_dbg_disc, vha, 0x2005, |
33b28357 | 5144 | "iIDMA adjusted to %s GB/s (%X) on %8phN.\n", |
d0297c9a | 5145 | qla2x00_get_link_speed_str(ha, fcport->fp_speed), |
33b28357 | 5146 | fcport->fp_speed, fcport->port_name); |
d8b45213 AV |
5147 | } |
5148 | } | |
5149 | ||
cc28e0ac QT |
5150 | void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) |
5151 | { | |
5152 | qla2x00_iidma_fcport(vha, fcport); | |
5153 | qla24xx_update_fcport_fcp_prio(vha, fcport); | |
5154 | } | |
5155 | ||
5156 | int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) | |
5157 | { | |
5158 | struct qla_work_evt *e; | |
5159 | ||
5160 | e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA); | |
5161 | if (!e) | |
5162 | return QLA_FUNCTION_FAILED; | |
5163 | ||
5164 | e->u.fcport.fcport = fcport; | |
5165 | return qla2x00_post_work(vha, e); | |
5166 | } | |
5167 | ||
726b8548 | 5168 | /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/ |
23be331d | 5169 | static void |
e315cd28 | 5170 | qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) |
8482e118 | 5171 | { |
5172 | struct fc_rport_identifiers rport_ids; | |
bdf79621 | 5173 | struct fc_rport *rport; |
044d78e1 | 5174 | unsigned long flags; |
8482e118 | 5175 | |
b63d8b89 QT |
5176 | if (atomic_read(&fcport->state) == FCS_ONLINE) |
5177 | return; | |
5178 | ||
f8b02a85 AV |
5179 | rport_ids.node_name = wwn_to_u64(fcport->node_name); |
5180 | rport_ids.port_name = wwn_to_u64(fcport->port_name); | |
8482e118 | 5181 | rport_ids.port_id = fcport->d_id.b.domain << 16 | |
5182 | fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; | |
77d74143 | 5183 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
e315cd28 | 5184 | fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); |
77d74143 | 5185 | if (!rport) { |
7c3df132 SK |
5186 | ql_log(ql_log_warn, vha, 0x2006, |
5187 | "Unable to allocate fc remote port.\n"); | |
77d74143 AV |
5188 | return; |
5189 | } | |
2d70c103 | 5190 | |
044d78e1 | 5191 | spin_lock_irqsave(fcport->vha->host->host_lock, flags); |
19a7b4ae | 5192 | *((fc_port_t **)rport->dd_data) = fcport; |
044d78e1 | 5193 | spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); |
d97994dc | 5194 | |
ad3e0eda | 5195 | rport->supported_classes = fcport->supported_classes; |
77d74143 | 5196 | |
8482e118 | 5197 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
5198 | if (fcport->port_type == FCT_INITIATOR) | |
5199 | rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; | |
5200 | if (fcport->port_type == FCT_TARGET) | |
5201 | rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; | |
726b8548 | 5202 | |
83548fe2 QT |
5203 | ql_dbg(ql_dbg_disc, vha, 0x20ee, |
5204 | "%s %8phN. rport %p is %s mode\n", | |
5205 | __func__, fcport->port_name, rport, | |
5206 | (fcport->port_type == FCT_TARGET) ? "tgt" : "ini"); | |
726b8548 | 5207 | |
77d74143 | 5208 | fc_remote_port_rolechg(rport, rport_ids.roles); |
1da177e4 LT |
5209 | } |
5210 | ||
23be331d AB |
5211 | /* |
5212 | * qla2x00_update_fcport | |
5213 | * Updates device on list. | |
5214 | * | |
5215 | * Input: | |
5216 | * ha = adapter block pointer. | |
5217 | * fcport = port structure pointer. | |
5218 | * | |
5219 | * Return: | |
5220 | * 0 - Success | |
5221 | * BIT_0 - error | |
5222 | * | |
5223 | * Context: | |
5224 | * Kernel context. | |
5225 | */ | |
5226 | void | |
e315cd28 | 5227 | qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
23be331d | 5228 | { |
726b8548 QT |
5229 | if (IS_SW_RESV_ADDR(fcport->d_id)) |
5230 | return; | |
5231 | ||
cd4ed6b4 QT |
5232 | ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n", |
5233 | __func__, fcport->port_name); | |
5234 | ||
5235 | fcport->disc_state = DSC_UPD_FCPORT; | |
5236 | fcport->login_retry = vha->hw->login_retry_count; | |
b63d8b89 | 5237 | fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); |
b63d8b89 QT |
5238 | fcport->deleted = 0; |
5239 | fcport->logout_on_delete = 1; | |
5240 | fcport->login_retry = vha->hw->login_retry_count; | |
8777e431 | 5241 | fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0; |
23be331d | 5242 | |
8777e431 QT |
5243 | switch (vha->hw->current_topology) { |
5244 | case ISP_CFG_N: | |
5245 | case ISP_CFG_NL: | |
5246 | fcport->keep_nport_handle = 1; | |
5247 | break; | |
5248 | default: | |
5249 | break; | |
5250 | } | |
5251 | ||
aecf0434 QT |
5252 | qla2x00_iidma_fcport(vha, fcport); |
5253 | ||
e84067d7 DG |
5254 | if (fcport->fc4f_nvme) { |
5255 | qla_nvme_register_remote(vha, fcport); | |
b63d8b89 QT |
5256 | fcport->disc_state = DSC_LOGIN_COMPLETE; |
5257 | qla2x00_set_fcport_state(fcport, FCS_ONLINE); | |
e84067d7 DG |
5258 | return; |
5259 | } | |
5260 | ||
21090cbe | 5261 | qla24xx_update_fcport_fcp_prio(vha, fcport); |
d20ed91b | 5262 | |
726b8548 QT |
5263 | switch (vha->host->active_mode) { |
5264 | case MODE_INITIATOR: | |
d20ed91b | 5265 | qla2x00_reg_remote_port(vha, fcport); |
726b8548 QT |
5266 | break; |
5267 | case MODE_TARGET: | |
5268 | if (!vha->vha_tgt.qla_tgt->tgt_stop && | |
5269 | !vha->vha_tgt.qla_tgt->tgt_stopped) | |
5270 | qlt_fc_port_added(vha, fcport); | |
5271 | break; | |
5272 | case MODE_DUAL: | |
d20ed91b | 5273 | qla2x00_reg_remote_port(vha, fcport); |
726b8548 QT |
5274 | if (!vha->vha_tgt.qla_tgt->tgt_stop && |
5275 | !vha->vha_tgt.qla_tgt->tgt_stopped) | |
5276 | qlt_fc_port_added(vha, fcport); | |
5277 | break; | |
5278 | default: | |
5279 | break; | |
d20ed91b | 5280 | } |
cc28e0ac | 5281 | |
aecf0434 QT |
5282 | qla2x00_set_fcport_state(fcport, FCS_ONLINE); |
5283 | ||
cc28e0ac QT |
5284 | if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) { |
5285 | if (fcport->id_changed) { | |
5286 | fcport->id_changed = 0; | |
5287 | ql_dbg(ql_dbg_disc, vha, 0x20d7, | |
5288 | "%s %d %8phC post gfpnid fcp_cnt %d\n", | |
5289 | __func__, __LINE__, fcport->port_name, | |
5290 | vha->fcport_count); | |
5291 | qla24xx_post_gfpnid_work(vha, fcport); | |
5292 | } else { | |
5293 | ql_dbg(ql_dbg_disc, vha, 0x20d7, | |
5294 | "%s %d %8phC post gpsc fcp_cnt %d\n", | |
5295 | __func__, __LINE__, fcport->port_name, | |
5296 | vha->fcport_count); | |
5297 | qla24xx_post_gpsc_work(vha, fcport); | |
5298 | } | |
5299 | } | |
cd4ed6b4 QT |
5300 | |
5301 | fcport->disc_state = DSC_LOGIN_COMPLETE; | |
5302 | } | |
5303 | ||
5304 | void qla_register_fcport_fn(struct work_struct *work) | |
5305 | { | |
5306 | fc_port_t *fcport = container_of(work, struct fc_port, reg_work); | |
5307 | u32 rscn_gen = fcport->rscn_gen; | |
5308 | u16 data[2]; | |
5309 | ||
5310 | if (IS_SW_RESV_ADDR(fcport->d_id)) | |
5311 | return; | |
5312 | ||
5313 | qla2x00_update_fcport(fcport->vha, fcport); | |
5314 | ||
5315 | if (rscn_gen != fcport->rscn_gen) { | |
5316 | /* RSCN(s) came in while registration */ | |
5317 | switch (fcport->next_disc_state) { | |
5318 | case DSC_DELETE_PEND: | |
5319 | qlt_schedule_sess_for_deletion(fcport); | |
5320 | break; | |
5321 | case DSC_ADISC: | |
5322 | data[0] = data[1] = 0; | |
5323 | qla2x00_post_async_adisc_work(fcport->vha, fcport, | |
5324 | data); | |
5325 | break; | |
5326 | default: | |
5327 | break; | |
5328 | } | |
5329 | } | |
23be331d AB |
5330 | } |
5331 | ||
1da177e4 LT |
5332 | /* |
5333 | * qla2x00_configure_fabric | |
5334 | * Setup SNS devices with loop ID's. | |
5335 | * | |
5336 | * Input: | |
5337 | * ha = adapter block pointer. | |
5338 | * | |
5339 | * Returns: | |
5340 | * 0 = success. | |
5341 | * BIT_0 = error | |
5342 | */ | |
5343 | static int | |
e315cd28 | 5344 | qla2x00_configure_fabric(scsi_qla_host_t *vha) |
1da177e4 | 5345 | { |
b3b02e6e | 5346 | int rval; |
726b8548 | 5347 | fc_port_t *fcport; |
1da177e4 | 5348 | uint16_t mb[MAILBOX_REGISTER_COUNT]; |
0107109e | 5349 | uint16_t loop_id; |
1da177e4 | 5350 | LIST_HEAD(new_fcports); |
e315cd28 | 5351 | struct qla_hw_data *ha = vha->hw; |
df673274 | 5352 | int discovery_gen; |
1da177e4 LT |
5353 | |
5354 | /* If FL port exists, then SNS is present */ | |
e428924c | 5355 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
5356 | loop_id = NPH_F_PORT; |
5357 | else | |
5358 | loop_id = SNS_FL_PORT; | |
e315cd28 | 5359 | rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); |
1da177e4 | 5360 | if (rval != QLA_SUCCESS) { |
83548fe2 | 5361 | ql_dbg(ql_dbg_disc, vha, 0x20a0, |
7c3df132 | 5362 | "MBX_GET_PORT_NAME failed, No FL Port.\n"); |
1da177e4 | 5363 | |
e315cd28 | 5364 | vha->device_flags &= ~SWITCH_FOUND; |
1da177e4 LT |
5365 | return (QLA_SUCCESS); |
5366 | } | |
e315cd28 | 5367 | vha->device_flags |= SWITCH_FOUND; |
1da177e4 | 5368 | |
41dc529a QT |
5369 | |
5370 | if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { | |
5371 | rval = qla2x00_send_change_request(vha, 0x3, 0); | |
5372 | if (rval != QLA_SUCCESS) | |
5373 | ql_log(ql_log_warn, vha, 0x121, | |
5374 | "Failed to enable receiving of RSCN requests: 0x%x.\n", | |
5375 | rval); | |
5376 | } | |
5377 | ||
5378 | ||
1da177e4 | 5379 | do { |
726b8548 QT |
5380 | qla2x00_mgmt_svr_login(vha); |
5381 | ||
cca5335c AV |
5382 | /* FDMI support. */ |
5383 | if (ql2xfdmienable && | |
e315cd28 AC |
5384 | test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) |
5385 | qla2x00_fdmi_register(vha); | |
cca5335c | 5386 | |
1da177e4 | 5387 | /* Ensure we are logged into the SNS. */ |
a14c7711 | 5388 | loop_id = NPH_SNS_LID(ha); |
0b91d116 CD |
5389 | rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, |
5390 | 0xfc, mb, BIT_1|BIT_0); | |
a14c7711 JC |
5391 | if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { |
5392 | ql_dbg(ql_dbg_disc, vha, 0x20a1, | |
5393 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n", | |
5394 | loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval); | |
0b91d116 | 5395 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
e452ceb6 | 5396 | return rval; |
0b91d116 | 5397 | } |
e315cd28 AC |
5398 | if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { |
5399 | if (qla2x00_rft_id(vha)) { | |
1da177e4 | 5400 | /* EMPTY */ |
83548fe2 | 5401 | ql_dbg(ql_dbg_disc, vha, 0x20a2, |
7c3df132 | 5402 | "Register FC-4 TYPE failed.\n"); |
b98ae0d7 QT |
5403 | if (test_bit(LOOP_RESYNC_NEEDED, |
5404 | &vha->dpc_flags)) | |
5405 | break; | |
1da177e4 | 5406 | } |
d3bae931 | 5407 | if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) { |
1da177e4 | 5408 | /* EMPTY */ |
83548fe2 | 5409 | ql_dbg(ql_dbg_disc, vha, 0x209a, |
7c3df132 | 5410 | "Register FC-4 Features failed.\n"); |
b98ae0d7 QT |
5411 | if (test_bit(LOOP_RESYNC_NEEDED, |
5412 | &vha->dpc_flags)) | |
5413 | break; | |
1da177e4 | 5414 | } |
d3bae931 DG |
5415 | if (vha->flags.nvme_enabled) { |
5416 | if (qla2x00_rff_id(vha, FC_TYPE_NVME)) { | |
5417 | ql_dbg(ql_dbg_disc, vha, 0x2049, | |
5418 | "Register NVME FC Type Features failed.\n"); | |
5419 | } | |
5420 | } | |
e315cd28 | 5421 | if (qla2x00_rnn_id(vha)) { |
1da177e4 | 5422 | /* EMPTY */ |
83548fe2 | 5423 | ql_dbg(ql_dbg_disc, vha, 0x2104, |
7c3df132 | 5424 | "Register Node Name failed.\n"); |
b98ae0d7 QT |
5425 | if (test_bit(LOOP_RESYNC_NEEDED, |
5426 | &vha->dpc_flags)) | |
5427 | break; | |
e315cd28 | 5428 | } else if (qla2x00_rsnn_nn(vha)) { |
1da177e4 | 5429 | /* EMPTY */ |
83548fe2 | 5430 | ql_dbg(ql_dbg_disc, vha, 0x209b, |
0bf0efa1 | 5431 | "Register Symbolic Node Name failed.\n"); |
b98ae0d7 QT |
5432 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) |
5433 | break; | |
1da177e4 LT |
5434 | } |
5435 | } | |
5436 | ||
827210ba | 5437 | |
df673274 AP |
5438 | /* Mark the time right before querying FW for connected ports. |
5439 | * This process is long, asynchronous and by the time it's done, | |
5440 | * collected information might not be accurate anymore. E.g. | |
5441 | * disconnected port might have re-connected and a brand new | |
5442 | * session has been created. In this case session's generation | |
5443 | * will be newer than discovery_gen. */ | |
5444 | qlt_do_generation_tick(vha, &discovery_gen); | |
5445 | ||
a4239945 | 5446 | if (USE_ASYNC_SCAN(ha)) { |
33b28357 QT |
5447 | rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI, |
5448 | NULL); | |
a4239945 QT |
5449 | if (rval) |
5450 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
5451 | } else { | |
f352eeb7 QT |
5452 | list_for_each_entry(fcport, &vha->vp_fcports, list) |
5453 | fcport->scan_state = QLA_FCPORT_SCAN; | |
5454 | ||
a4239945 QT |
5455 | rval = qla2x00_find_all_fabric_devs(vha); |
5456 | } | |
1da177e4 LT |
5457 | if (rval != QLA_SUCCESS) |
5458 | break; | |
1da177e4 LT |
5459 | } while (0); |
5460 | ||
e84067d7 DG |
5461 | if (!vha->nvme_local_port && vha->flags.nvme_enabled) |
5462 | qla_nvme_register_hba(vha); | |
5463 | ||
726b8548 | 5464 | if (rval) |
7c3df132 SK |
5465 | ql_dbg(ql_dbg_disc, vha, 0x2068, |
5466 | "Configure fabric error exit rval=%d.\n", rval); | |
1da177e4 LT |
5467 | |
5468 | return (rval); | |
5469 | } | |
5470 | ||
1da177e4 LT |
5471 | /* |
5472 | * qla2x00_find_all_fabric_devs | |
5473 | * | |
5474 | * Input: | |
5475 | * ha = adapter block pointer. | |
5476 | * dev = database device entry pointer. | |
5477 | * | |
5478 | * Returns: | |
5479 | * 0 = success. | |
5480 | * | |
5481 | * Context: | |
5482 | * Kernel context. | |
5483 | */ | |
5484 | static int | |
726b8548 | 5485 | qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha) |
1da177e4 LT |
5486 | { |
5487 | int rval; | |
5488 | uint16_t loop_id; | |
726b8548 | 5489 | fc_port_t *fcport, *new_fcport; |
1da177e4 LT |
5490 | int found; |
5491 | ||
5492 | sw_info_t *swl; | |
5493 | int swl_idx; | |
5494 | int first_dev, last_dev; | |
1516ef44 | 5495 | port_id_t wrap = {}, nxt_d_id; |
e315cd28 | 5496 | struct qla_hw_data *ha = vha->hw; |
bb4cf5b7 | 5497 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); |
726b8548 | 5498 | unsigned long flags; |
1da177e4 LT |
5499 | |
5500 | rval = QLA_SUCCESS; | |
5501 | ||
5502 | /* Try GID_PT to get device list, else GAN. */ | |
7a67735b | 5503 | if (!ha->swl) |
642ef983 | 5504 | ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), |
7a67735b AV |
5505 | GFP_KERNEL); |
5506 | swl = ha->swl; | |
bbfbbbc1 | 5507 | if (!swl) { |
1da177e4 | 5508 | /*EMPTY*/ |
83548fe2 | 5509 | ql_dbg(ql_dbg_disc, vha, 0x209c, |
7c3df132 | 5510 | "GID_PT allocations failed, fallback on GA_NXT.\n"); |
1da177e4 | 5511 | } else { |
642ef983 | 5512 | memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); |
e315cd28 | 5513 | if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { |
1da177e4 | 5514 | swl = NULL; |
b98ae0d7 QT |
5515 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) |
5516 | return rval; | |
e315cd28 | 5517 | } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 | 5518 | swl = NULL; |
b98ae0d7 QT |
5519 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) |
5520 | return rval; | |
e315cd28 | 5521 | } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 | 5522 | swl = NULL; |
b98ae0d7 QT |
5523 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) |
5524 | return rval; | |
726b8548 QT |
5525 | } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) { |
5526 | swl = NULL; | |
b98ae0d7 QT |
5527 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) |
5528 | return rval; | |
1da177e4 | 5529 | } |
e8c72ba5 CD |
5530 | |
5531 | /* If other queries succeeded probe for FC-4 type */ | |
b98ae0d7 | 5532 | if (swl) { |
e8c72ba5 | 5533 | qla2x00_gff_id(vha, swl); |
b98ae0d7 QT |
5534 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) |
5535 | return rval; | |
5536 | } | |
1da177e4 LT |
5537 | } |
5538 | swl_idx = 0; | |
5539 | ||
5540 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 5541 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 5542 | if (new_fcport == NULL) { |
83548fe2 | 5543 | ql_log(ql_log_warn, vha, 0x209d, |
7c3df132 | 5544 | "Failed to allocate memory for fcport.\n"); |
1da177e4 LT |
5545 | return (QLA_MEMORY_ALLOC_FAILED); |
5546 | } | |
5547 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
5548 | /* Set start port ID scan at adapter ID. */ |
5549 | first_dev = 1; | |
5550 | last_dev = 0; | |
5551 | ||
5552 | /* Starting free loop ID. */ | |
e315cd28 AC |
5553 | loop_id = ha->min_external_loopid; |
5554 | for (; loop_id <= ha->max_loop_id; loop_id++) { | |
5555 | if (qla2x00_is_reserved_id(vha, loop_id)) | |
1da177e4 LT |
5556 | continue; |
5557 | ||
3a6478df GM |
5558 | if (ha->current_topology == ISP_CFG_FL && |
5559 | (atomic_read(&vha->loop_down_timer) || | |
5560 | LOOP_TRANSITION(vha))) { | |
bb2d52b2 AV |
5561 | atomic_set(&vha->loop_down_timer, 0); |
5562 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
5563 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
1da177e4 | 5564 | break; |
bb2d52b2 | 5565 | } |
1da177e4 LT |
5566 | |
5567 | if (swl != NULL) { | |
5568 | if (last_dev) { | |
5569 | wrap.b24 = new_fcport->d_id.b24; | |
5570 | } else { | |
5571 | new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; | |
5572 | memcpy(new_fcport->node_name, | |
5573 | swl[swl_idx].node_name, WWN_SIZE); | |
5574 | memcpy(new_fcport->port_name, | |
5575 | swl[swl_idx].port_name, WWN_SIZE); | |
d8b45213 AV |
5576 | memcpy(new_fcport->fabric_port_name, |
5577 | swl[swl_idx].fabric_port_name, WWN_SIZE); | |
5578 | new_fcport->fp_speed = swl[swl_idx].fp_speed; | |
e8c72ba5 | 5579 | new_fcport->fc4_type = swl[swl_idx].fc4_type; |
1da177e4 | 5580 | |
a5d42f4c | 5581 | new_fcport->nvme_flag = 0; |
1a28faa0 | 5582 | new_fcport->fc4f_nvme = 0; |
a5d42f4c DG |
5583 | if (vha->flags.nvme_enabled && |
5584 | swl[swl_idx].fc4f_nvme) { | |
5585 | new_fcport->fc4f_nvme = | |
5586 | swl[swl_idx].fc4f_nvme; | |
5587 | ql_log(ql_log_info, vha, 0x2131, | |
5588 | "FOUND: NVME port %8phC as FC Type 28h\n", | |
5589 | new_fcport->port_name); | |
5590 | } | |
5591 | ||
1da177e4 LT |
5592 | if (swl[swl_idx].d_id.b.rsvd_1 != 0) { |
5593 | last_dev = 1; | |
5594 | } | |
5595 | swl_idx++; | |
5596 | } | |
5597 | } else { | |
5598 | /* Send GA_NXT to the switch */ | |
e315cd28 | 5599 | rval = qla2x00_ga_nxt(vha, new_fcport); |
1da177e4 | 5600 | if (rval != QLA_SUCCESS) { |
83548fe2 | 5601 | ql_log(ql_log_warn, vha, 0x209e, |
7c3df132 SK |
5602 | "SNS scan failed -- assuming " |
5603 | "zero-entry result.\n"); | |
1da177e4 LT |
5604 | rval = QLA_SUCCESS; |
5605 | break; | |
5606 | } | |
5607 | } | |
5608 | ||
5609 | /* If wrap on switch device list, exit. */ | |
5610 | if (first_dev) { | |
5611 | wrap.b24 = new_fcport->d_id.b24; | |
5612 | first_dev = 0; | |
5613 | } else if (new_fcport->d_id.b24 == wrap.b24) { | |
83548fe2 | 5614 | ql_dbg(ql_dbg_disc, vha, 0x209f, |
7c3df132 SK |
5615 | "Device wrap (%02x%02x%02x).\n", |
5616 | new_fcport->d_id.b.domain, | |
5617 | new_fcport->d_id.b.area, | |
5618 | new_fcport->d_id.b.al_pa); | |
1da177e4 LT |
5619 | break; |
5620 | } | |
5621 | ||
2c3dfe3f | 5622 | /* Bypass if same physical adapter. */ |
e315cd28 | 5623 | if (new_fcport->d_id.b24 == base_vha->d_id.b24) |
1da177e4 LT |
5624 | continue; |
5625 | ||
2c3dfe3f | 5626 | /* Bypass virtual ports of the same host. */ |
bb4cf5b7 CD |
5627 | if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) |
5628 | continue; | |
2c3dfe3f | 5629 | |
f7d289f6 AV |
5630 | /* Bypass if same domain and area of adapter. */ |
5631 | if (((new_fcport->d_id.b24 & 0xffff00) == | |
e315cd28 | 5632 | (vha->d_id.b24 & 0xffff00)) && ha->current_topology == |
f7d289f6 AV |
5633 | ISP_CFG_FL) |
5634 | continue; | |
5635 | ||
1da177e4 LT |
5636 | /* Bypass reserved domain fields. */ |
5637 | if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) | |
5638 | continue; | |
5639 | ||
e8c72ba5 | 5640 | /* Bypass ports whose FCP-4 type is not FCP_SCSI */ |
4da26e16 CD |
5641 | if (ql2xgffidenable && |
5642 | (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && | |
5643 | new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) | |
e8c72ba5 CD |
5644 | continue; |
5645 | ||
726b8548 QT |
5646 | spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); |
5647 | ||
1da177e4 LT |
5648 | /* Locate matching device in database. */ |
5649 | found = 0; | |
e315cd28 | 5650 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
5651 | if (memcmp(new_fcport->port_name, fcport->port_name, |
5652 | WWN_SIZE)) | |
5653 | continue; | |
5654 | ||
827210ba | 5655 | fcport->scan_state = QLA_FCPORT_FOUND; |
b3b02e6e | 5656 | |
1da177e4 LT |
5657 | found++; |
5658 | ||
d8b45213 AV |
5659 | /* Update port state. */ |
5660 | memcpy(fcport->fabric_port_name, | |
5661 | new_fcport->fabric_port_name, WWN_SIZE); | |
5662 | fcport->fp_speed = new_fcport->fp_speed; | |
5663 | ||
1da177e4 | 5664 | /* |
b2032fd5 RD |
5665 | * If address the same and state FCS_ONLINE |
5666 | * (or in target mode), nothing changed. | |
1da177e4 LT |
5667 | */ |
5668 | if (fcport->d_id.b24 == new_fcport->d_id.b24 && | |
b2032fd5 | 5669 | (atomic_read(&fcport->state) == FCS_ONLINE || |
726b8548 | 5670 | (vha->host->active_mode == MODE_TARGET))) { |
1da177e4 LT |
5671 | break; |
5672 | } | |
5673 | ||
5674 | /* | |
5675 | * If device was not a fabric device before. | |
5676 | */ | |
5677 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
5678 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
5f16b331 | 5679 | qla2x00_clear_loop_id(fcport); |
1da177e4 LT |
5680 | fcport->flags |= (FCF_FABRIC_DEVICE | |
5681 | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
5682 | break; |
5683 | } | |
5684 | ||
5685 | /* | |
5686 | * Port ID changed or device was marked to be updated; | |
5687 | * Log it out if still logged in and mark it for | |
5688 | * relogin later. | |
5689 | */ | |
726b8548 | 5690 | if (qla_tgt_mode_enabled(base_vha)) { |
b2032fd5 RD |
5691 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, |
5692 | "port changed FC ID, %8phC" | |
5693 | " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", | |
5694 | fcport->port_name, | |
5695 | fcport->d_id.b.domain, | |
5696 | fcport->d_id.b.area, | |
5697 | fcport->d_id.b.al_pa, | |
5698 | fcport->loop_id, | |
5699 | new_fcport->d_id.b.domain, | |
5700 | new_fcport->d_id.b.area, | |
5701 | new_fcport->d_id.b.al_pa); | |
5702 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
5703 | break; | |
5704 | } | |
5705 | ||
1da177e4 LT |
5706 | fcport->d_id.b24 = new_fcport->d_id.b24; |
5707 | fcport->flags |= FCF_LOGIN_NEEDED; | |
1da177e4 LT |
5708 | break; |
5709 | } | |
5710 | ||
9dd9686b DT |
5711 | if (fcport->fc4f_nvme) { |
5712 | if (fcport->disc_state == DSC_DELETE_PEND) { | |
5713 | fcport->disc_state = DSC_GNL; | |
5714 | vha->fcport_count--; | |
5715 | fcport->login_succ = 0; | |
5716 | } | |
5717 | } | |
5718 | ||
726b8548 QT |
5719 | if (found) { |
5720 | spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); | |
1da177e4 | 5721 | continue; |
726b8548 | 5722 | } |
1da177e4 | 5723 | /* If device was not in our fcports list, then add it. */ |
b2032fd5 | 5724 | new_fcport->scan_state = QLA_FCPORT_FOUND; |
726b8548 QT |
5725 | list_add_tail(&new_fcport->list, &vha->vp_fcports); |
5726 | ||
5727 | spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); | |
5728 | ||
1da177e4 LT |
5729 | |
5730 | /* Allocate a new replacement fcport. */ | |
5731 | nxt_d_id.b24 = new_fcport->d_id.b24; | |
e315cd28 | 5732 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 5733 | if (new_fcport == NULL) { |
83548fe2 | 5734 | ql_log(ql_log_warn, vha, 0xd032, |
7c3df132 | 5735 | "Memory allocation failed for fcport.\n"); |
1da177e4 LT |
5736 | return (QLA_MEMORY_ALLOC_FAILED); |
5737 | } | |
5738 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
5739 | new_fcport->d_id.b24 = nxt_d_id.b24; | |
5740 | } | |
5741 | ||
726b8548 QT |
5742 | qla2x00_free_fcport(new_fcport); |
5743 | ||
5744 | /* | |
5745 | * Logout all previous fabric dev marked lost, except FCP2 devices. | |
5746 | */ | |
5747 | list_for_each_entry(fcport, &vha->vp_fcports, list) { | |
5748 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
5749 | break; | |
5750 | ||
5751 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || | |
5752 | (fcport->flags & FCF_LOGIN_NEEDED) == 0) | |
5753 | continue; | |
5754 | ||
5755 | if (fcport->scan_state == QLA_FCPORT_SCAN) { | |
5756 | if ((qla_dual_mode_enabled(vha) || | |
5757 | qla_ini_mode_enabled(vha)) && | |
5758 | atomic_read(&fcport->state) == FCS_ONLINE) { | |
5759 | qla2x00_mark_device_lost(vha, fcport, | |
5760 | ql2xplogiabsentdevice, 0); | |
5761 | if (fcport->loop_id != FC_NO_LOOP_ID && | |
5762 | (fcport->flags & FCF_FCP2_DEVICE) == 0 && | |
5763 | fcport->port_type != FCT_INITIATOR && | |
5764 | fcport->port_type != FCT_BROADCAST) { | |
83548fe2 | 5765 | ql_dbg(ql_dbg_disc, vha, 0x20f0, |
726b8548 QT |
5766 | "%s %d %8phC post del sess\n", |
5767 | __func__, __LINE__, | |
5768 | fcport->port_name); | |
d8630bb9 | 5769 | qlt_schedule_sess_for_deletion(fcport); |
726b8548 QT |
5770 | continue; |
5771 | } | |
5772 | } | |
5773 | } | |
1da177e4 | 5774 | |
726b8548 QT |
5775 | if (fcport->scan_state == QLA_FCPORT_FOUND) |
5776 | qla24xx_fcport_handle_login(vha, fcport); | |
5777 | } | |
1da177e4 LT |
5778 | return (rval); |
5779 | } | |
5780 | ||
5781 | /* | |
5782 | * qla2x00_find_new_loop_id | |
5783 | * Scan through our port list and find a new usable loop ID. | |
5784 | * | |
5785 | * Input: | |
5786 | * ha: adapter state pointer. | |
5787 | * dev: port structure pointer. | |
5788 | * | |
5789 | * Returns: | |
5790 | * qla2x00 local function return status code. | |
5791 | * | |
5792 | * Context: | |
5793 | * Kernel context. | |
5794 | */ | |
03bcfb57 | 5795 | int |
e315cd28 | 5796 | qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) |
1da177e4 LT |
5797 | { |
5798 | int rval; | |
e315cd28 | 5799 | struct qla_hw_data *ha = vha->hw; |
feafb7b1 | 5800 | unsigned long flags = 0; |
1da177e4 LT |
5801 | |
5802 | rval = QLA_SUCCESS; | |
5803 | ||
5f16b331 | 5804 | spin_lock_irqsave(&ha->vport_slock, flags); |
1da177e4 | 5805 | |
5f16b331 CD |
5806 | dev->loop_id = find_first_zero_bit(ha->loop_id_map, |
5807 | LOOPID_MAP_SIZE); | |
5808 | if (dev->loop_id >= LOOPID_MAP_SIZE || | |
5809 | qla2x00_is_reserved_id(vha, dev->loop_id)) { | |
5810 | dev->loop_id = FC_NO_LOOP_ID; | |
5811 | rval = QLA_FUNCTION_FAILED; | |
5812 | } else | |
5813 | set_bit(dev->loop_id, ha->loop_id_map); | |
1da177e4 | 5814 | |
5f16b331 | 5815 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
1da177e4 | 5816 | |
5f16b331 CD |
5817 | if (rval == QLA_SUCCESS) |
5818 | ql_dbg(ql_dbg_disc, dev->vha, 0x2086, | |
5819 | "Assigning new loopid=%x, portid=%x.\n", | |
5820 | dev->loop_id, dev->d_id.b24); | |
5821 | else | |
5822 | ql_log(ql_log_warn, dev->vha, 0x2087, | |
5823 | "No loop_id's available, portid=%x.\n", | |
5824 | dev->d_id.b24); | |
1da177e4 LT |
5825 | |
5826 | return (rval); | |
5827 | } | |
5828 | ||
1da177e4 | 5829 | |
f6602f3b QT |
5830 | /* FW does not set aside Loop id for MGMT Server/FFFFFAh */ |
5831 | int | |
5832 | qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha) | |
5833 | { | |
5834 | int loop_id = FC_NO_LOOP_ID; | |
5835 | int lid = NPH_MGMT_SERVER - vha->vp_idx; | |
5836 | unsigned long flags; | |
5837 | struct qla_hw_data *ha = vha->hw; | |
5838 | ||
5839 | if (vha->vp_idx == 0) { | |
5840 | set_bit(NPH_MGMT_SERVER, ha->loop_id_map); | |
5841 | return NPH_MGMT_SERVER; | |
5842 | } | |
5843 | ||
5844 | /* pick id from high and work down to low */ | |
5845 | spin_lock_irqsave(&ha->vport_slock, flags); | |
5846 | for (; lid > 0; lid--) { | |
5847 | if (!test_bit(lid, vha->hw->loop_id_map)) { | |
5848 | set_bit(lid, vha->hw->loop_id_map); | |
5849 | loop_id = lid; | |
5850 | break; | |
5851 | } | |
5852 | } | |
5853 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
5854 | ||
5855 | return loop_id; | |
5856 | } | |
5857 | ||
1da177e4 LT |
5858 | /* |
5859 | * qla2x00_fabric_login | |
5860 | * Issue fabric login command. | |
5861 | * | |
5862 | * Input: | |
5863 | * ha = adapter block pointer. | |
5864 | * device = pointer to FC device type structure. | |
5865 | * | |
5866 | * Returns: | |
5867 | * 0 - Login successfully | |
5868 | * 1 - Login failed | |
5869 | * 2 - Initiator device | |
5870 | * 3 - Fatal error | |
5871 | */ | |
5872 | int | |
e315cd28 | 5873 | qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
5874 | uint16_t *next_loopid) |
5875 | { | |
5876 | int rval; | |
5877 | int retry; | |
5878 | uint16_t tmp_loopid; | |
5879 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
e315cd28 | 5880 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
5881 | |
5882 | retry = 0; | |
5883 | tmp_loopid = 0; | |
5884 | ||
5885 | for (;;) { | |
7c3df132 SK |
5886 | ql_dbg(ql_dbg_disc, vha, 0x2000, |
5887 | "Trying Fabric Login w/loop id 0x%04x for port " | |
5888 | "%02x%02x%02x.\n", | |
5889 | fcport->loop_id, fcport->d_id.b.domain, | |
5890 | fcport->d_id.b.area, fcport->d_id.b.al_pa); | |
1da177e4 LT |
5891 | |
5892 | /* Login fcport on switch. */ | |
0b91d116 | 5893 | rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, |
1da177e4 LT |
5894 | fcport->d_id.b.domain, fcport->d_id.b.area, |
5895 | fcport->d_id.b.al_pa, mb, BIT_0); | |
0b91d116 CD |
5896 | if (rval != QLA_SUCCESS) { |
5897 | return rval; | |
5898 | } | |
1da177e4 LT |
5899 | if (mb[0] == MBS_PORT_ID_USED) { |
5900 | /* | |
5901 | * Device has another loop ID. The firmware team | |
0107109e AV |
5902 | * recommends the driver perform an implicit login with |
5903 | * the specified ID again. The ID we just used is save | |
5904 | * here so we return with an ID that can be tried by | |
5905 | * the next login. | |
1da177e4 LT |
5906 | */ |
5907 | retry++; | |
5908 | tmp_loopid = fcport->loop_id; | |
5909 | fcport->loop_id = mb[1]; | |
5910 | ||
7c3df132 SK |
5911 | ql_dbg(ql_dbg_disc, vha, 0x2001, |
5912 | "Fabric Login: port in use - next loop " | |
5913 | "id=0x%04x, port id= %02x%02x%02x.\n", | |
1da177e4 | 5914 | fcport->loop_id, fcport->d_id.b.domain, |
7c3df132 | 5915 | fcport->d_id.b.area, fcport->d_id.b.al_pa); |
1da177e4 LT |
5916 | |
5917 | } else if (mb[0] == MBS_COMMAND_COMPLETE) { | |
5918 | /* | |
5919 | * Login succeeded. | |
5920 | */ | |
5921 | if (retry) { | |
5922 | /* A retry occurred before. */ | |
5923 | *next_loopid = tmp_loopid; | |
5924 | } else { | |
5925 | /* | |
5926 | * No retry occurred before. Just increment the | |
5927 | * ID value for next login. | |
5928 | */ | |
5929 | *next_loopid = (fcport->loop_id + 1); | |
5930 | } | |
5931 | ||
5932 | if (mb[1] & BIT_0) { | |
5933 | fcport->port_type = FCT_INITIATOR; | |
5934 | } else { | |
5935 | fcport->port_type = FCT_TARGET; | |
5936 | if (mb[1] & BIT_1) { | |
8474f3a0 | 5937 | fcport->flags |= FCF_FCP2_DEVICE; |
1da177e4 LT |
5938 | } |
5939 | } | |
5940 | ||
ad3e0eda AV |
5941 | if (mb[10] & BIT_0) |
5942 | fcport->supported_classes |= FC_COS_CLASS2; | |
5943 | if (mb[10] & BIT_1) | |
5944 | fcport->supported_classes |= FC_COS_CLASS3; | |
5945 | ||
2d70c103 NB |
5946 | if (IS_FWI2_CAPABLE(ha)) { |
5947 | if (mb[10] & BIT_7) | |
5948 | fcport->flags |= | |
5949 | FCF_CONF_COMP_SUPPORTED; | |
5950 | } | |
5951 | ||
1da177e4 LT |
5952 | rval = QLA_SUCCESS; |
5953 | break; | |
5954 | } else if (mb[0] == MBS_LOOP_ID_USED) { | |
5955 | /* | |
5956 | * Loop ID already used, try next loop ID. | |
5957 | */ | |
5958 | fcport->loop_id++; | |
e315cd28 | 5959 | rval = qla2x00_find_new_loop_id(vha, fcport); |
1da177e4 LT |
5960 | if (rval != QLA_SUCCESS) { |
5961 | /* Ran out of loop IDs to use */ | |
5962 | break; | |
5963 | } | |
5964 | } else if (mb[0] == MBS_COMMAND_ERROR) { | |
5965 | /* | |
5966 | * Firmware possibly timed out during login. If NO | |
5967 | * retries are left to do then the device is declared | |
5968 | * dead. | |
5969 | */ | |
5970 | *next_loopid = fcport->loop_id; | |
e315cd28 | 5971 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
5972 | fcport->d_id.b.domain, fcport->d_id.b.area, |
5973 | fcport->d_id.b.al_pa); | |
e315cd28 | 5974 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 LT |
5975 | |
5976 | rval = 1; | |
5977 | break; | |
5978 | } else { | |
5979 | /* | |
5980 | * unrecoverable / not handled error | |
5981 | */ | |
7c3df132 SK |
5982 | ql_dbg(ql_dbg_disc, vha, 0x2002, |
5983 | "Failed=%x port_id=%02x%02x%02x loop_id=%x " | |
5984 | "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, | |
5985 | fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
5986 | fcport->loop_id, jiffies); | |
1da177e4 LT |
5987 | |
5988 | *next_loopid = fcport->loop_id; | |
e315cd28 | 5989 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
5990 | fcport->d_id.b.domain, fcport->d_id.b.area, |
5991 | fcport->d_id.b.al_pa); | |
5f16b331 | 5992 | qla2x00_clear_loop_id(fcport); |
0eedfcf0 | 5993 | fcport->login_retry = 0; |
1da177e4 LT |
5994 | |
5995 | rval = 3; | |
5996 | break; | |
5997 | } | |
5998 | } | |
5999 | ||
6000 | return (rval); | |
6001 | } | |
6002 | ||
6003 | /* | |
6004 | * qla2x00_local_device_login | |
6005 | * Issue local device login command. | |
6006 | * | |
6007 | * Input: | |
6008 | * ha = adapter block pointer. | |
6009 | * loop_id = loop id of device to login to. | |
6010 | * | |
6011 | * Returns (Where's the #define!!!!): | |
6012 | * 0 - Login successfully | |
6013 | * 1 - Login failed | |
6014 | * 3 - Fatal error | |
6015 | */ | |
6016 | int | |
e315cd28 | 6017 | qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) |
1da177e4 LT |
6018 | { |
6019 | int rval; | |
6020 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
6021 | ||
6022 | memset(mb, 0, sizeof(mb)); | |
e315cd28 | 6023 | rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); |
1da177e4 LT |
6024 | if (rval == QLA_SUCCESS) { |
6025 | /* Interrogate mailbox registers for any errors */ | |
6026 | if (mb[0] == MBS_COMMAND_ERROR) | |
6027 | rval = 1; | |
6028 | else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) | |
6029 | /* device not in PCB table */ | |
6030 | rval = 3; | |
6031 | } | |
6032 | ||
6033 | return (rval); | |
6034 | } | |
6035 | ||
6036 | /* | |
6037 | * qla2x00_loop_resync | |
6038 | * Resync with fibre channel devices. | |
6039 | * | |
6040 | * Input: | |
6041 | * ha = adapter block pointer. | |
6042 | * | |
6043 | * Returns: | |
6044 | * 0 = success | |
6045 | */ | |
6046 | int | |
e315cd28 | 6047 | qla2x00_loop_resync(scsi_qla_host_t *vha) |
1da177e4 | 6048 | { |
73208dfd | 6049 | int rval = QLA_SUCCESS; |
1da177e4 | 6050 | uint32_t wait_time; |
1da177e4 | 6051 | |
e315cd28 AC |
6052 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
6053 | if (vha->flags.online) { | |
6054 | if (!(rval = qla2x00_fw_ready(vha))) { | |
1da177e4 LT |
6055 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
6056 | wait_time = 256; | |
6057 | do { | |
8ae6d9c7 GM |
6058 | if (!IS_QLAFX00(vha->hw)) { |
6059 | /* | |
6060 | * Issue a marker after FW becomes | |
6061 | * ready. | |
6062 | */ | |
9eb9c6dc QT |
6063 | qla2x00_marker(vha, vha->hw->base_qpair, |
6064 | 0, 0, MK_SYNC_ALL); | |
8ae6d9c7 GM |
6065 | vha->marker_needed = 0; |
6066 | } | |
1da177e4 LT |
6067 | |
6068 | /* Remap devices on Loop. */ | |
e315cd28 | 6069 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
1da177e4 | 6070 | |
8ae6d9c7 GM |
6071 | if (IS_QLAFX00(vha->hw)) |
6072 | qlafx00_configure_devices(vha); | |
6073 | else | |
6074 | qla2x00_configure_loop(vha); | |
6075 | ||
1da177e4 | 6076 | wait_time--; |
e315cd28 AC |
6077 | } while (!atomic_read(&vha->loop_down_timer) && |
6078 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
6079 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
6080 | &vha->dpc_flags))); | |
1da177e4 | 6081 | } |
1da177e4 LT |
6082 | } |
6083 | ||
e315cd28 | 6084 | if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) |
1da177e4 | 6085 | return (QLA_FUNCTION_FAILED); |
1da177e4 | 6086 | |
e315cd28 | 6087 | if (rval) |
7c3df132 SK |
6088 | ql_dbg(ql_dbg_disc, vha, 0x206c, |
6089 | "%s *** FAILED ***.\n", __func__); | |
1da177e4 LT |
6090 | |
6091 | return (rval); | |
6092 | } | |
6093 | ||
579d12b5 SK |
6094 | /* |
6095 | * qla2x00_perform_loop_resync | |
6096 | * Description: This function will set the appropriate flags and call | |
6097 | * qla2x00_loop_resync. If successful loop will be resynced | |
6098 | * Arguments : scsi_qla_host_t pointer | |
6099 | * returm : Success or Failure | |
6100 | */ | |
6101 | ||
6102 | int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) | |
6103 | { | |
6104 | int32_t rval = 0; | |
6105 | ||
6106 | if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { | |
6107 | /*Configure the flags so that resync happens properly*/ | |
6108 | atomic_set(&ha->loop_down_timer, 0); | |
6109 | if (!(ha->device_flags & DFLG_NO_CABLE)) { | |
6110 | atomic_set(&ha->loop_state, LOOP_UP); | |
6111 | set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); | |
6112 | set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); | |
6113 | set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); | |
6114 | ||
6115 | rval = qla2x00_loop_resync(ha); | |
6116 | } else | |
6117 | atomic_set(&ha->loop_state, LOOP_DEAD); | |
6118 | ||
6119 | clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); | |
6120 | } | |
6121 | ||
6122 | return rval; | |
6123 | } | |
6124 | ||
d97994dc | 6125 | void |
67becc00 | 6126 | qla2x00_update_fcports(scsi_qla_host_t *base_vha) |
d97994dc | 6127 | { |
6128 | fc_port_t *fcport; | |
feafb7b1 AE |
6129 | struct scsi_qla_host *vha; |
6130 | struct qla_hw_data *ha = base_vha->hw; | |
6131 | unsigned long flags; | |
d97994dc | 6132 | |
feafb7b1 | 6133 | spin_lock_irqsave(&ha->vport_slock, flags); |
d97994dc | 6134 | /* Go with deferred removal of rport references. */ |
feafb7b1 AE |
6135 | list_for_each_entry(vha, &base_vha->hw->vp_list, list) { |
6136 | atomic_inc(&vha->vref_count); | |
6137 | list_for_each_entry(fcport, &vha->vp_fcports, list) { | |
8ae598d0 | 6138 | if (fcport->drport && |
feafb7b1 AE |
6139 | atomic_read(&fcport->state) != FCS_UNCONFIGURED) { |
6140 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
67becc00 | 6141 | qla2x00_rport_del(fcport); |
df673274 | 6142 | |
feafb7b1 AE |
6143 | spin_lock_irqsave(&ha->vport_slock, flags); |
6144 | } | |
6145 | } | |
6146 | atomic_dec(&vha->vref_count); | |
c4a9b538 | 6147 | wake_up(&vha->vref_waitq); |
feafb7b1 AE |
6148 | } |
6149 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
d97994dc | 6150 | } |
6151 | ||
7d613ac6 SV |
6152 | /* Assumes idc_lock always held on entry */ |
6153 | void | |
6154 | qla83xx_reset_ownership(scsi_qla_host_t *vha) | |
6155 | { | |
6156 | struct qla_hw_data *ha = vha->hw; | |
6157 | uint32_t drv_presence, drv_presence_mask; | |
6158 | uint32_t dev_part_info1, dev_part_info2, class_type; | |
6159 | uint32_t class_type_mask = 0x3; | |
6160 | uint16_t fcoe_other_function = 0xffff, i; | |
6161 | ||
7ec0effd AD |
6162 | if (IS_QLA8044(ha)) { |
6163 | drv_presence = qla8044_rd_direct(vha, | |
6164 | QLA8044_CRB_DRV_ACTIVE_INDEX); | |
6165 | dev_part_info1 = qla8044_rd_direct(vha, | |
6166 | QLA8044_CRB_DEV_PART_INFO_INDEX); | |
6167 | dev_part_info2 = qla8044_rd_direct(vha, | |
6168 | QLA8044_CRB_DEV_PART_INFO2); | |
6169 | } else { | |
6170 | qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); | |
6171 | qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); | |
6172 | qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); | |
6173 | } | |
7d613ac6 SV |
6174 | for (i = 0; i < 8; i++) { |
6175 | class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); | |
6176 | if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && | |
6177 | (i != ha->portnum)) { | |
6178 | fcoe_other_function = i; | |
6179 | break; | |
6180 | } | |
6181 | } | |
6182 | if (fcoe_other_function == 0xffff) { | |
6183 | for (i = 0; i < 8; i++) { | |
6184 | class_type = ((dev_part_info2 >> (i * 4)) & | |
6185 | class_type_mask); | |
6186 | if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && | |
6187 | ((i + 8) != ha->portnum)) { | |
6188 | fcoe_other_function = i + 8; | |
6189 | break; | |
6190 | } | |
6191 | } | |
6192 | } | |
6193 | /* | |
6194 | * Prepare drv-presence mask based on fcoe functions present. | |
6195 | * However consider only valid physical fcoe function numbers (0-15). | |
6196 | */ | |
6197 | drv_presence_mask = ~((1 << (ha->portnum)) | | |
6198 | ((fcoe_other_function == 0xffff) ? | |
6199 | 0 : (1 << (fcoe_other_function)))); | |
6200 | ||
6201 | /* We are the reset owner iff: | |
6202 | * - No other protocol drivers present. | |
6203 | * - This is the lowest among fcoe functions. */ | |
6204 | if (!(drv_presence & drv_presence_mask) && | |
6205 | (ha->portnum < fcoe_other_function)) { | |
6206 | ql_dbg(ql_dbg_p3p, vha, 0xb07f, | |
6207 | "This host is Reset owner.\n"); | |
6208 | ha->flags.nic_core_reset_owner = 1; | |
6209 | } | |
6210 | } | |
6211 | ||
fa492630 | 6212 | static int |
7d613ac6 SV |
6213 | __qla83xx_set_drv_ack(scsi_qla_host_t *vha) |
6214 | { | |
6215 | int rval = QLA_SUCCESS; | |
6216 | struct qla_hw_data *ha = vha->hw; | |
6217 | uint32_t drv_ack; | |
6218 | ||
6219 | rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); | |
6220 | if (rval == QLA_SUCCESS) { | |
6221 | drv_ack |= (1 << ha->portnum); | |
6222 | rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); | |
6223 | } | |
6224 | ||
6225 | return rval; | |
6226 | } | |
6227 | ||
fa492630 | 6228 | static int |
7d613ac6 SV |
6229 | __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) |
6230 | { | |
6231 | int rval = QLA_SUCCESS; | |
6232 | struct qla_hw_data *ha = vha->hw; | |
6233 | uint32_t drv_ack; | |
6234 | ||
6235 | rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); | |
6236 | if (rval == QLA_SUCCESS) { | |
6237 | drv_ack &= ~(1 << ha->portnum); | |
6238 | rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); | |
6239 | } | |
6240 | ||
6241 | return rval; | |
6242 | } | |
6243 | ||
fa492630 | 6244 | static const char * |
7d613ac6 SV |
6245 | qla83xx_dev_state_to_string(uint32_t dev_state) |
6246 | { | |
6247 | switch (dev_state) { | |
6248 | case QLA8XXX_DEV_COLD: | |
6249 | return "COLD/RE-INIT"; | |
6250 | case QLA8XXX_DEV_INITIALIZING: | |
6251 | return "INITIALIZING"; | |
6252 | case QLA8XXX_DEV_READY: | |
6253 | return "READY"; | |
6254 | case QLA8XXX_DEV_NEED_RESET: | |
6255 | return "NEED RESET"; | |
6256 | case QLA8XXX_DEV_NEED_QUIESCENT: | |
6257 | return "NEED QUIESCENT"; | |
6258 | case QLA8XXX_DEV_FAILED: | |
6259 | return "FAILED"; | |
6260 | case QLA8XXX_DEV_QUIESCENT: | |
6261 | return "QUIESCENT"; | |
6262 | default: | |
6263 | return "Unknown"; | |
6264 | } | |
6265 | } | |
6266 | ||
6267 | /* Assumes idc-lock always held on entry */ | |
6268 | void | |
6269 | qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) | |
6270 | { | |
6271 | struct qla_hw_data *ha = vha->hw; | |
6272 | uint32_t idc_audit_reg = 0, duration_secs = 0; | |
6273 | ||
6274 | switch (audit_type) { | |
6275 | case IDC_AUDIT_TIMESTAMP: | |
6276 | ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); | |
6277 | idc_audit_reg = (ha->portnum) | | |
6278 | (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); | |
6279 | qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); | |
6280 | break; | |
6281 | ||
6282 | case IDC_AUDIT_COMPLETION: | |
6283 | duration_secs = ((jiffies_to_msecs(jiffies) - | |
6284 | jiffies_to_msecs(ha->idc_audit_ts)) / 1000); | |
6285 | idc_audit_reg = (ha->portnum) | | |
6286 | (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); | |
6287 | qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); | |
6288 | break; | |
6289 | ||
6290 | default: | |
6291 | ql_log(ql_log_warn, vha, 0xb078, | |
6292 | "Invalid audit type specified.\n"); | |
6293 | break; | |
6294 | } | |
6295 | } | |
6296 | ||
6297 | /* Assumes idc_lock always held on entry */ | |
fa492630 | 6298 | static int |
7d613ac6 SV |
6299 | qla83xx_initiating_reset(scsi_qla_host_t *vha) |
6300 | { | |
6301 | struct qla_hw_data *ha = vha->hw; | |
6302 | uint32_t idc_control, dev_state; | |
6303 | ||
6304 | __qla83xx_get_idc_control(vha, &idc_control); | |
6305 | if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { | |
6306 | ql_log(ql_log_info, vha, 0xb080, | |
6307 | "NIC Core reset has been disabled. idc-control=0x%x\n", | |
6308 | idc_control); | |
6309 | return QLA_FUNCTION_FAILED; | |
6310 | } | |
6311 | ||
6312 | /* Set NEED-RESET iff in READY state and we are the reset-owner */ | |
6313 | qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); | |
6314 | if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { | |
6315 | qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, | |
6316 | QLA8XXX_DEV_NEED_RESET); | |
6317 | ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); | |
6318 | qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); | |
6319 | } else { | |
6320 | const char *state = qla83xx_dev_state_to_string(dev_state); | |
6321 | ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state); | |
6322 | ||
6323 | /* SV: XXX: Is timeout required here? */ | |
6324 | /* Wait for IDC state change READY -> NEED_RESET */ | |
6325 | while (dev_state == QLA8XXX_DEV_READY) { | |
6326 | qla83xx_idc_unlock(vha, 0); | |
6327 | msleep(200); | |
6328 | qla83xx_idc_lock(vha, 0); | |
6329 | qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); | |
6330 | } | |
6331 | } | |
6332 | ||
6333 | /* Send IDC ack by writing to drv-ack register */ | |
6334 | __qla83xx_set_drv_ack(vha); | |
6335 | ||
6336 | return QLA_SUCCESS; | |
6337 | } | |
6338 | ||
6339 | int | |
6340 | __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) | |
6341 | { | |
6342 | return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); | |
6343 | } | |
6344 | ||
7d613ac6 SV |
6345 | int |
6346 | __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) | |
6347 | { | |
6348 | return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); | |
6349 | } | |
6350 | ||
fa492630 | 6351 | static int |
7d613ac6 SV |
6352 | qla83xx_check_driver_presence(scsi_qla_host_t *vha) |
6353 | { | |
6354 | uint32_t drv_presence = 0; | |
6355 | struct qla_hw_data *ha = vha->hw; | |
6356 | ||
6357 | qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); | |
6358 | if (drv_presence & (1 << ha->portnum)) | |
6359 | return QLA_SUCCESS; | |
6360 | else | |
6361 | return QLA_TEST_FAILED; | |
6362 | } | |
6363 | ||
6364 | int | |
6365 | qla83xx_nic_core_reset(scsi_qla_host_t *vha) | |
6366 | { | |
6367 | int rval = QLA_SUCCESS; | |
6368 | struct qla_hw_data *ha = vha->hw; | |
6369 | ||
6370 | ql_dbg(ql_dbg_p3p, vha, 0xb058, | |
6371 | "Entered %s().\n", __func__); | |
6372 | ||
6373 | if (vha->device_flags & DFLG_DEV_FAILED) { | |
6374 | ql_log(ql_log_warn, vha, 0xb059, | |
6375 | "Device in unrecoverable FAILED state.\n"); | |
6376 | return QLA_FUNCTION_FAILED; | |
6377 | } | |
6378 | ||
6379 | qla83xx_idc_lock(vha, 0); | |
6380 | ||
6381 | if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { | |
6382 | ql_log(ql_log_warn, vha, 0xb05a, | |
6383 | "Function=0x%x has been removed from IDC participation.\n", | |
6384 | ha->portnum); | |
6385 | rval = QLA_FUNCTION_FAILED; | |
6386 | goto exit; | |
6387 | } | |
6388 | ||
6389 | qla83xx_reset_ownership(vha); | |
6390 | ||
6391 | rval = qla83xx_initiating_reset(vha); | |
6392 | ||
6393 | /* | |
6394 | * Perform reset if we are the reset-owner, | |
6395 | * else wait till IDC state changes to READY/FAILED. | |
6396 | */ | |
6397 | if (rval == QLA_SUCCESS) { | |
6398 | rval = qla83xx_idc_state_handler(vha); | |
6399 | ||
6400 | if (rval == QLA_SUCCESS) | |
6401 | ha->flags.nic_core_hung = 0; | |
6402 | __qla83xx_clear_drv_ack(vha); | |
6403 | } | |
6404 | ||
6405 | exit: | |
6406 | qla83xx_idc_unlock(vha, 0); | |
6407 | ||
6408 | ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); | |
6409 | ||
6410 | return rval; | |
6411 | } | |
6412 | ||
81178772 SK |
6413 | int |
6414 | qla2xxx_mctp_dump(scsi_qla_host_t *vha) | |
6415 | { | |
6416 | struct qla_hw_data *ha = vha->hw; | |
6417 | int rval = QLA_FUNCTION_FAILED; | |
6418 | ||
6419 | if (!IS_MCTP_CAPABLE(ha)) { | |
6420 | /* This message can be removed from the final version */ | |
6421 | ql_log(ql_log_info, vha, 0x506d, | |
6422 | "This board is not MCTP capable\n"); | |
6423 | return rval; | |
6424 | } | |
6425 | ||
6426 | if (!ha->mctp_dump) { | |
6427 | ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, | |
6428 | MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); | |
6429 | ||
6430 | if (!ha->mctp_dump) { | |
6431 | ql_log(ql_log_warn, vha, 0x506e, | |
6432 | "Failed to allocate memory for mctp dump\n"); | |
6433 | return rval; | |
6434 | } | |
6435 | } | |
6436 | ||
6437 | #define MCTP_DUMP_STR_ADDR 0x00000000 | |
6438 | rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, | |
6439 | MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); | |
6440 | if (rval != QLA_SUCCESS) { | |
6441 | ql_log(ql_log_warn, vha, 0x506f, | |
6442 | "Failed to capture mctp dump\n"); | |
6443 | } else { | |
6444 | ql_log(ql_log_info, vha, 0x5070, | |
6445 | "Mctp dump capture for host (%ld/%p).\n", | |
6446 | vha->host_no, ha->mctp_dump); | |
6447 | ha->mctp_dumped = 1; | |
6448 | } | |
6449 | ||
409ee0fe | 6450 | if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { |
81178772 SK |
6451 | ha->flags.nic_core_reset_hdlr_active = 1; |
6452 | rval = qla83xx_restart_nic_firmware(vha); | |
6453 | if (rval) | |
6454 | /* NIC Core reset failed. */ | |
6455 | ql_log(ql_log_warn, vha, 0x5071, | |
6456 | "Failed to restart nic firmware\n"); | |
6457 | else | |
6458 | ql_dbg(ql_dbg_p3p, vha, 0xb084, | |
6459 | "Restarted NIC firmware successfully.\n"); | |
6460 | ha->flags.nic_core_reset_hdlr_active = 0; | |
6461 | } | |
6462 | ||
6463 | return rval; | |
6464 | ||
6465 | } | |
6466 | ||
579d12b5 | 6467 | /* |
8fcd6b8b | 6468 | * qla2x00_quiesce_io |
579d12b5 SK |
6469 | * Description: This function will block the new I/Os |
6470 | * Its not aborting any I/Os as context | |
6471 | * is not destroyed during quiescence | |
6472 | * Arguments: scsi_qla_host_t | |
6473 | * return : void | |
6474 | */ | |
6475 | void | |
8fcd6b8b | 6476 | qla2x00_quiesce_io(scsi_qla_host_t *vha) |
579d12b5 SK |
6477 | { |
6478 | struct qla_hw_data *ha = vha->hw; | |
6479 | struct scsi_qla_host *vp; | |
6480 | ||
8fcd6b8b CD |
6481 | ql_dbg(ql_dbg_dpc, vha, 0x401d, |
6482 | "Quiescing I/O - ha=%p.\n", ha); | |
579d12b5 SK |
6483 | |
6484 | atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); | |
6485 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { | |
6486 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
6487 | qla2x00_mark_all_devices_lost(vha, 0); | |
6488 | list_for_each_entry(vp, &ha->vp_list, list) | |
8fcd6b8b | 6489 | qla2x00_mark_all_devices_lost(vp, 0); |
579d12b5 SK |
6490 | } else { |
6491 | if (!atomic_read(&vha->loop_down_timer)) | |
6492 | atomic_set(&vha->loop_down_timer, | |
6493 | LOOP_DOWN_TIME); | |
6494 | } | |
6495 | /* Wait for pending cmds to complete */ | |
6496 | qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); | |
6497 | } | |
6498 | ||
a9083016 GM |
6499 | void |
6500 | qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) | |
6501 | { | |
6502 | struct qla_hw_data *ha = vha->hw; | |
579d12b5 | 6503 | struct scsi_qla_host *vp; |
feafb7b1 | 6504 | unsigned long flags; |
6aef87be | 6505 | fc_port_t *fcport; |
7c3f8fd1 | 6506 | u16 i; |
a9083016 | 6507 | |
e46ef004 SK |
6508 | /* For ISP82XX, driver waits for completion of the commands. |
6509 | * online flag should be set. | |
6510 | */ | |
7ec0effd | 6511 | if (!(IS_P3P_TYPE(ha))) |
e46ef004 | 6512 | vha->flags.online = 0; |
a9083016 GM |
6513 | ha->flags.chip_reset_done = 0; |
6514 | clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
2be21fa2 | 6515 | vha->qla_stats.total_isp_aborts++; |
a9083016 | 6516 | |
7c3df132 SK |
6517 | ql_log(ql_log_info, vha, 0x00af, |
6518 | "Performing ISP error recovery - ha=%p.\n", ha); | |
a9083016 | 6519 | |
b2000805 | 6520 | ha->flags.purge_mbox = 1; |
e46ef004 SK |
6521 | /* For ISP82XX, reset_chip is just disabling interrupts. |
6522 | * Driver waits for the completion of the commands. | |
6523 | * the interrupts need to be enabled. | |
6524 | */ | |
7ec0effd | 6525 | if (!(IS_P3P_TYPE(ha))) |
a9083016 GM |
6526 | ha->isp_ops->reset_chip(vha); |
6527 | ||
5d74c87a | 6528 | ha->link_data_rate = PORT_SPEED_UNKNOWN; |
9cd883f0 QT |
6529 | SAVE_TOPO(ha); |
6530 | ha->flags.rida_fmt2 = 0; | |
ec7193e2 QT |
6531 | ha->flags.n2n_ae = 0; |
6532 | ha->flags.lip_ae = 0; | |
6533 | ha->current_topology = 0; | |
6534 | ha->flags.fw_started = 0; | |
6535 | ha->flags.fw_init_done = 0; | |
b2000805 QT |
6536 | ha->chip_reset++; |
6537 | ha->base_qpair->chip_reset = ha->chip_reset; | |
7c3f8fd1 QT |
6538 | for (i = 0; i < ha->max_qpairs; i++) { |
6539 | if (ha->queue_pair_map[i]) | |
6540 | ha->queue_pair_map[i]->chip_reset = | |
6541 | ha->base_qpair->chip_reset; | |
6542 | } | |
726b8548 | 6543 | |
b2000805 QT |
6544 | /* purge MBox commands */ |
6545 | if (atomic_read(&ha->num_pend_mbx_stage3)) { | |
6546 | clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); | |
6547 | complete(&ha->mbx_intr_comp); | |
6548 | } | |
6549 | ||
6550 | i = 0; | |
6551 | while (atomic_read(&ha->num_pend_mbx_stage3) || | |
6552 | atomic_read(&ha->num_pend_mbx_stage2) || | |
6553 | atomic_read(&ha->num_pend_mbx_stage1)) { | |
6554 | msleep(20); | |
6555 | i++; | |
6556 | if (i > 50) | |
6557 | break; | |
6558 | } | |
6559 | ha->flags.purge_mbox = 0; | |
6560 | ||
a9083016 GM |
6561 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); |
6562 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { | |
6563 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
6564 | qla2x00_mark_all_devices_lost(vha, 0); | |
feafb7b1 AE |
6565 | |
6566 | spin_lock_irqsave(&ha->vport_slock, flags); | |
579d12b5 | 6567 | list_for_each_entry(vp, &ha->vp_list, list) { |
feafb7b1 AE |
6568 | atomic_inc(&vp->vref_count); |
6569 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
6570 | ||
a9083016 | 6571 | qla2x00_mark_all_devices_lost(vp, 0); |
feafb7b1 AE |
6572 | |
6573 | spin_lock_irqsave(&ha->vport_slock, flags); | |
6574 | atomic_dec(&vp->vref_count); | |
6575 | } | |
6576 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
a9083016 GM |
6577 | } else { |
6578 | if (!atomic_read(&vha->loop_down_timer)) | |
6579 | atomic_set(&vha->loop_down_timer, | |
6580 | LOOP_DOWN_TIME); | |
6581 | } | |
6582 | ||
6aef87be AV |
6583 | /* Clear all async request states across all VPs. */ |
6584 | list_for_each_entry(fcport, &vha->vp_fcports, list) | |
6585 | fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); | |
6586 | spin_lock_irqsave(&ha->vport_slock, flags); | |
6587 | list_for_each_entry(vp, &ha->vp_list, list) { | |
6588 | atomic_inc(&vp->vref_count); | |
6589 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
6590 | ||
6591 | list_for_each_entry(fcport, &vp->vp_fcports, list) | |
6592 | fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); | |
6593 | ||
6594 | spin_lock_irqsave(&ha->vport_slock, flags); | |
6595 | atomic_dec(&vp->vref_count); | |
6596 | } | |
6597 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
6598 | ||
bddd2d65 LC |
6599 | if (!ha->flags.eeh_busy) { |
6600 | /* Make sure for ISP 82XX IO DMA is complete */ | |
7ec0effd | 6601 | if (IS_P3P_TYPE(ha)) { |
7190575f | 6602 | qla82xx_chip_reset_cleanup(vha); |
7c3df132 SK |
6603 | ql_log(ql_log_info, vha, 0x00b4, |
6604 | "Done chip reset cleanup.\n"); | |
a9083016 | 6605 | |
e46ef004 SK |
6606 | /* Done waiting for pending commands. |
6607 | * Reset the online flag. | |
6608 | */ | |
6609 | vha->flags.online = 0; | |
4d78c973 | 6610 | } |
a9083016 | 6611 | |
bddd2d65 LC |
6612 | /* Requeue all commands in outstanding command list. */ |
6613 | qla2x00_abort_all_cmds(vha, DID_RESET << 16); | |
6614 | } | |
b6a029e1 AE |
6615 | /* memory barrier */ |
6616 | wmb(); | |
a9083016 GM |
6617 | } |
6618 | ||
1da177e4 LT |
6619 | /* |
6620 | * qla2x00_abort_isp | |
6621 | * Resets ISP and aborts all outstanding commands. | |
6622 | * | |
6623 | * Input: | |
6624 | * ha = adapter block pointer. | |
6625 | * | |
6626 | * Returns: | |
6627 | * 0 = success | |
6628 | */ | |
6629 | int | |
e315cd28 | 6630 | qla2x00_abort_isp(scsi_qla_host_t *vha) |
1da177e4 | 6631 | { |
476e8978 | 6632 | int rval; |
1da177e4 | 6633 | uint8_t status = 0; |
e315cd28 AC |
6634 | struct qla_hw_data *ha = vha->hw; |
6635 | struct scsi_qla_host *vp; | |
73208dfd | 6636 | struct req_que *req = ha->req_q_map[0]; |
feafb7b1 | 6637 | unsigned long flags; |
1da177e4 | 6638 | |
e315cd28 | 6639 | if (vha->flags.online) { |
a9083016 | 6640 | qla2x00_abort_isp_cleanup(vha); |
1da177e4 | 6641 | |
a6171297 SV |
6642 | if (IS_QLA8031(ha)) { |
6643 | ql_dbg(ql_dbg_p3p, vha, 0xb05c, | |
6644 | "Clearing fcoe driver presence.\n"); | |
6645 | if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) | |
6646 | ql_dbg(ql_dbg_p3p, vha, 0xb073, | |
6647 | "Error while clearing DRV-Presence.\n"); | |
6648 | } | |
6649 | ||
85880801 AV |
6650 | if (unlikely(pci_channel_offline(ha->pdev) && |
6651 | ha->flags.pci_channel_io_perm_failure)) { | |
6652 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
6653 | status = 0; | |
6654 | return status; | |
6655 | } | |
6656 | ||
0645cb83 QT |
6657 | switch (vha->qlini_mode) { |
6658 | case QLA2XXX_INI_MODE_DISABLED: | |
6659 | if (!qla_tgt_mode_enabled(vha)) | |
6660 | return 0; | |
6661 | break; | |
6662 | case QLA2XXX_INI_MODE_DUAL: | |
6663 | if (!qla_dual_mode_enabled(vha)) | |
6664 | return 0; | |
6665 | break; | |
6666 | case QLA2XXX_INI_MODE_ENABLED: | |
6667 | default: | |
6668 | break; | |
6669 | } | |
6670 | ||
73208dfd | 6671 | ha->isp_ops->get_flash_version(vha, req->ring); |
30c47662 | 6672 | |
e315cd28 | 6673 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 6674 | |
e315cd28 AC |
6675 | if (!qla2x00_restart_isp(vha)) { |
6676 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
1da177e4 | 6677 | |
e315cd28 | 6678 | if (!atomic_read(&vha->loop_down_timer)) { |
1da177e4 LT |
6679 | /* |
6680 | * Issue marker command only when we are going | |
6681 | * to start the I/O . | |
6682 | */ | |
e315cd28 | 6683 | vha->marker_needed = 1; |
1da177e4 LT |
6684 | } |
6685 | ||
e315cd28 | 6686 | vha->flags.online = 1; |
1da177e4 | 6687 | |
fd34f556 | 6688 | ha->isp_ops->enable_intrs(ha); |
1da177e4 | 6689 | |
fa2a1ce5 | 6690 | ha->isp_abort_cnt = 0; |
e315cd28 | 6691 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
476e8978 | 6692 | |
6246b8a1 GM |
6693 | if (IS_QLA81XX(ha) || IS_QLA8031(ha)) |
6694 | qla2x00_get_fw_version(vha); | |
df613b96 AV |
6695 | if (ha->fce) { |
6696 | ha->flags.fce_enabled = 1; | |
6697 | memset(ha->fce, 0, | |
6698 | fce_calc_size(ha->fce_bufs)); | |
e315cd28 | 6699 | rval = qla2x00_enable_fce_trace(vha, |
df613b96 AV |
6700 | ha->fce_dma, ha->fce_bufs, ha->fce_mb, |
6701 | &ha->fce_bufs); | |
6702 | if (rval) { | |
7c3df132 | 6703 | ql_log(ql_log_warn, vha, 0x8033, |
df613b96 AV |
6704 | "Unable to reinitialize FCE " |
6705 | "(%d).\n", rval); | |
6706 | ha->flags.fce_enabled = 0; | |
6707 | } | |
6708 | } | |
436a7b11 AV |
6709 | |
6710 | if (ha->eft) { | |
6711 | memset(ha->eft, 0, EFT_SIZE); | |
e315cd28 | 6712 | rval = qla2x00_enable_eft_trace(vha, |
436a7b11 AV |
6713 | ha->eft_dma, EFT_NUM_BUFFERS); |
6714 | if (rval) { | |
7c3df132 | 6715 | ql_log(ql_log_warn, vha, 0x8034, |
436a7b11 AV |
6716 | "Unable to reinitialize EFT " |
6717 | "(%d).\n", rval); | |
6718 | } | |
6719 | } | |
1da177e4 | 6720 | } else { /* failed the ISP abort */ |
e315cd28 AC |
6721 | vha->flags.online = 1; |
6722 | if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { | |
1da177e4 | 6723 | if (ha->isp_abort_cnt == 0) { |
7c3df132 SK |
6724 | ql_log(ql_log_fatal, vha, 0x8035, |
6725 | "ISP error recover failed - " | |
6726 | "board disabled.\n"); | |
fa2a1ce5 | 6727 | /* |
1da177e4 LT |
6728 | * The next call disables the board |
6729 | * completely. | |
6730 | */ | |
1e4ac5d6 | 6731 | qla2x00_abort_isp_cleanup(vha); |
e315cd28 | 6732 | vha->flags.online = 0; |
1da177e4 | 6733 | clear_bit(ISP_ABORT_RETRY, |
e315cd28 | 6734 | &vha->dpc_flags); |
1da177e4 LT |
6735 | status = 0; |
6736 | } else { /* schedule another ISP abort */ | |
6737 | ha->isp_abort_cnt--; | |
7c3df132 SK |
6738 | ql_dbg(ql_dbg_taskm, vha, 0x8020, |
6739 | "ISP abort - retry remaining %d.\n", | |
6740 | ha->isp_abort_cnt); | |
1da177e4 LT |
6741 | status = 1; |
6742 | } | |
6743 | } else { | |
6744 | ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; | |
7c3df132 SK |
6745 | ql_dbg(ql_dbg_taskm, vha, 0x8021, |
6746 | "ISP error recovery - retrying (%d) " | |
6747 | "more times.\n", ha->isp_abort_cnt); | |
e315cd28 | 6748 | set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
1da177e4 LT |
6749 | status = 1; |
6750 | } | |
6751 | } | |
fa2a1ce5 | 6752 | |
1da177e4 LT |
6753 | } |
6754 | ||
e315cd28 | 6755 | if (!status) { |
7c3df132 | 6756 | ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); |
1608cc4a | 6757 | qla2x00_configure_hba(vha); |
feafb7b1 AE |
6758 | spin_lock_irqsave(&ha->vport_slock, flags); |
6759 | list_for_each_entry(vp, &ha->vp_list, list) { | |
6760 | if (vp->vp_idx) { | |
6761 | atomic_inc(&vp->vref_count); | |
6762 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
6763 | ||
e315cd28 | 6764 | qla2x00_vp_abort_isp(vp); |
feafb7b1 AE |
6765 | |
6766 | spin_lock_irqsave(&ha->vport_slock, flags); | |
6767 | atomic_dec(&vp->vref_count); | |
6768 | } | |
e315cd28 | 6769 | } |
feafb7b1 AE |
6770 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
6771 | ||
7d613ac6 SV |
6772 | if (IS_QLA8031(ha)) { |
6773 | ql_dbg(ql_dbg_p3p, vha, 0xb05d, | |
6774 | "Setting back fcoe driver presence.\n"); | |
6775 | if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) | |
6776 | ql_dbg(ql_dbg_p3p, vha, 0xb074, | |
6777 | "Error while setting DRV-Presence.\n"); | |
6778 | } | |
e315cd28 | 6779 | } else { |
d8424f68 JP |
6780 | ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", |
6781 | __func__); | |
1da177e4 LT |
6782 | } |
6783 | ||
6784 | return(status); | |
6785 | } | |
6786 | ||
6787 | /* | |
6788 | * qla2x00_restart_isp | |
6789 | * restarts the ISP after a reset | |
6790 | * | |
6791 | * Input: | |
6792 | * ha = adapter block pointer. | |
6793 | * | |
6794 | * Returns: | |
6795 | * 0 = success | |
6796 | */ | |
6797 | static int | |
e315cd28 | 6798 | qla2x00_restart_isp(scsi_qla_host_t *vha) |
1da177e4 | 6799 | { |
c6b2fca8 | 6800 | int status = 0; |
e315cd28 | 6801 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
6802 | |
6803 | /* If firmware needs to be loaded */ | |
e315cd28 AC |
6804 | if (qla2x00_isp_firmware(vha)) { |
6805 | vha->flags.online = 0; | |
6806 | status = ha->isp_ops->chip_diag(vha); | |
6807 | if (!status) | |
6808 | status = qla2x00_setup_chip(vha); | |
1da177e4 LT |
6809 | } |
6810 | ||
e315cd28 AC |
6811 | if (!status && !(status = qla2x00_init_rings(vha))) { |
6812 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
2533cf67 | 6813 | ha->flags.chip_reset_done = 1; |
7108b76e | 6814 | |
73208dfd AC |
6815 | /* Initialize the queues in use */ |
6816 | qla25xx_init_queues(ha); | |
6817 | ||
e315cd28 AC |
6818 | status = qla2x00_fw_ready(vha); |
6819 | if (!status) { | |
0107109e | 6820 | /* Issue a marker after FW becomes ready. */ |
9eb9c6dc | 6821 | qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); |
7108b76e | 6822 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
6823 | } |
6824 | ||
6825 | /* if no cable then assume it's good */ | |
e315cd28 | 6826 | if ((vha->device_flags & DFLG_NO_CABLE)) |
1da177e4 | 6827 | status = 0; |
1da177e4 LT |
6828 | } |
6829 | return (status); | |
6830 | } | |
6831 | ||
73208dfd AC |
6832 | static int |
6833 | qla25xx_init_queues(struct qla_hw_data *ha) | |
6834 | { | |
6835 | struct rsp_que *rsp = NULL; | |
6836 | struct req_que *req = NULL; | |
6837 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
6838 | int ret = -1; | |
6839 | int i; | |
6840 | ||
2afa19a9 | 6841 | for (i = 1; i < ha->max_rsp_queues; i++) { |
73208dfd | 6842 | rsp = ha->rsp_q_map[i]; |
cb43285f | 6843 | if (rsp && test_bit(i, ha->rsp_qid_map)) { |
73208dfd | 6844 | rsp->options &= ~BIT_0; |
618a7523 | 6845 | ret = qla25xx_init_rsp_que(base_vha, rsp); |
73208dfd | 6846 | if (ret != QLA_SUCCESS) |
7c3df132 SK |
6847 | ql_dbg(ql_dbg_init, base_vha, 0x00ff, |
6848 | "%s Rsp que: %d init failed.\n", | |
6849 | __func__, rsp->id); | |
73208dfd | 6850 | else |
7c3df132 SK |
6851 | ql_dbg(ql_dbg_init, base_vha, 0x0100, |
6852 | "%s Rsp que: %d inited.\n", | |
6853 | __func__, rsp->id); | |
73208dfd | 6854 | } |
2afa19a9 AC |
6855 | } |
6856 | for (i = 1; i < ha->max_req_queues; i++) { | |
73208dfd | 6857 | req = ha->req_q_map[i]; |
cb43285f QT |
6858 | if (req && test_bit(i, ha->req_qid_map)) { |
6859 | /* Clear outstanding commands array. */ | |
73208dfd | 6860 | req->options &= ~BIT_0; |
618a7523 | 6861 | ret = qla25xx_init_req_que(base_vha, req); |
73208dfd | 6862 | if (ret != QLA_SUCCESS) |
7c3df132 SK |
6863 | ql_dbg(ql_dbg_init, base_vha, 0x0101, |
6864 | "%s Req que: %d init failed.\n", | |
6865 | __func__, req->id); | |
73208dfd | 6866 | else |
7c3df132 SK |
6867 | ql_dbg(ql_dbg_init, base_vha, 0x0102, |
6868 | "%s Req que: %d inited.\n", | |
6869 | __func__, req->id); | |
73208dfd AC |
6870 | } |
6871 | } | |
6872 | return ret; | |
6873 | } | |
6874 | ||
1da177e4 LT |
6875 | /* |
6876 | * qla2x00_reset_adapter | |
6877 | * Reset adapter. | |
6878 | * | |
6879 | * Input: | |
6880 | * ha = adapter block pointer. | |
6881 | */ | |
abbd8870 | 6882 | void |
e315cd28 | 6883 | qla2x00_reset_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
6884 | { |
6885 | unsigned long flags = 0; | |
e315cd28 | 6886 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 6887 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 6888 | |
e315cd28 | 6889 | vha->flags.online = 0; |
fd34f556 | 6890 | ha->isp_ops->disable_intrs(ha); |
1da177e4 | 6891 | |
1da177e4 LT |
6892 | spin_lock_irqsave(&ha->hardware_lock, flags); |
6893 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
6894 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
6895 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
6896 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
6897 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
6898 | } | |
0107109e AV |
6899 | |
6900 | void | |
e315cd28 | 6901 | qla24xx_reset_adapter(scsi_qla_host_t *vha) |
0107109e AV |
6902 | { |
6903 | unsigned long flags = 0; | |
e315cd28 | 6904 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
6905 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
6906 | ||
7ec0effd | 6907 | if (IS_P3P_TYPE(ha)) |
a9083016 GM |
6908 | return; |
6909 | ||
e315cd28 | 6910 | vha->flags.online = 0; |
fd34f556 | 6911 | ha->isp_ops->disable_intrs(ha); |
0107109e AV |
6912 | |
6913 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
6914 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); | |
6915 | RD_REG_DWORD(®->hccr); | |
6916 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
6917 | RD_REG_DWORD(®->hccr); | |
6918 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
09ff36d3 AV |
6919 | |
6920 | if (IS_NOPOLLING_TYPE(ha)) | |
6921 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
6922 | } |
6923 | ||
4e08df3f DM |
6924 | /* On sparc systems, obtain port and node WWN from firmware |
6925 | * properties. | |
6926 | */ | |
e315cd28 AC |
6927 | static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, |
6928 | struct nvram_24xx *nv) | |
4e08df3f DM |
6929 | { |
6930 | #ifdef CONFIG_SPARC | |
e315cd28 | 6931 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 6932 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
6933 | struct device_node *dp = pci_device_to_OF_node(pdev); |
6934 | const u8 *val; | |
4e08df3f DM |
6935 | int len; |
6936 | ||
6937 | val = of_get_property(dp, "port-wwn", &len); | |
6938 | if (val && len >= WWN_SIZE) | |
6939 | memcpy(nv->port_name, val, WWN_SIZE); | |
6940 | ||
6941 | val = of_get_property(dp, "node-wwn", &len); | |
6942 | if (val && len >= WWN_SIZE) | |
6943 | memcpy(nv->node_name, val, WWN_SIZE); | |
6944 | #endif | |
6945 | } | |
6946 | ||
0107109e | 6947 | int |
e315cd28 | 6948 | qla24xx_nvram_config(scsi_qla_host_t *vha) |
0107109e | 6949 | { |
4e08df3f | 6950 | int rval; |
0107109e AV |
6951 | struct init_cb_24xx *icb; |
6952 | struct nvram_24xx *nv; | |
6953 | uint32_t *dptr; | |
6954 | uint8_t *dptr1, *dptr2; | |
6955 | uint32_t chksum; | |
6956 | uint16_t cnt; | |
e315cd28 | 6957 | struct qla_hw_data *ha = vha->hw; |
0107109e | 6958 | |
4e08df3f | 6959 | rval = QLA_SUCCESS; |
0107109e | 6960 | icb = (struct init_cb_24xx *)ha->init_cb; |
281afe19 | 6961 | nv = ha->nvram; |
0107109e AV |
6962 | |
6963 | /* Determine NVRAM starting address. */ | |
f73cb695 | 6964 | if (ha->port_no == 0) { |
e5b68a61 AC |
6965 | ha->nvram_base = FA_NVRAM_FUNC0_ADDR; |
6966 | ha->vpd_base = FA_NVRAM_VPD0_ADDR; | |
6967 | } else { | |
0107109e | 6968 | ha->nvram_base = FA_NVRAM_FUNC1_ADDR; |
6f641790 | 6969 | ha->vpd_base = FA_NVRAM_VPD1_ADDR; |
6970 | } | |
f73cb695 | 6971 | |
e5b68a61 AC |
6972 | ha->nvram_size = sizeof(struct nvram_24xx); |
6973 | ha->vpd_size = FA_NVRAM_VPD_SIZE; | |
0107109e | 6974 | |
281afe19 SJ |
6975 | /* Get VPD data into cache */ |
6976 | ha->vpd = ha->nvram + VPD_OFFSET; | |
e315cd28 | 6977 | ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, |
281afe19 SJ |
6978 | ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); |
6979 | ||
6980 | /* Get NVRAM data into cache and calculate checksum. */ | |
0107109e | 6981 | dptr = (uint32_t *)nv; |
e315cd28 | 6982 | ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, |
0107109e | 6983 | ha->nvram_size); |
da08ef5c JC |
6984 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) |
6985 | chksum += le32_to_cpu(*dptr); | |
0107109e | 6986 | |
7c3df132 SK |
6987 | ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, |
6988 | "Contents of NVRAM\n"); | |
6989 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, | |
6990 | (uint8_t *)nv, ha->nvram_size); | |
0107109e AV |
6991 | |
6992 | /* Bad NVRAM data, set defaults parameters. */ | |
6993 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
6994 | || nv->id[3] != ' ' || | |
ad950360 | 6995 | nv->nvram_version < cpu_to_le16(ICB_VERSION)) { |
0107109e | 6996 | /* Reset NVRAM data. */ |
7c3df132 | 6997 | ql_log(ql_log_warn, vha, 0x006b, |
9e336520 | 6998 | "Inconsistent NVRAM detected: checksum=0x%x id=%c " |
7c3df132 SK |
6999 | "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); |
7000 | ql_log(ql_log_warn, vha, 0x006c, | |
7001 | "Falling back to functioning (yet invalid -- WWPN) " | |
7002 | "defaults.\n"); | |
4e08df3f DM |
7003 | |
7004 | /* | |
7005 | * Set default initialization control block. | |
7006 | */ | |
7007 | memset(nv, 0, ha->nvram_size); | |
ad950360 BVA |
7008 | nv->nvram_version = cpu_to_le16(ICB_VERSION); |
7009 | nv->version = cpu_to_le16(ICB_VERSION); | |
98aee70d | 7010 | nv->frame_payload_size = 2048; |
ad950360 BVA |
7011 | nv->execution_throttle = cpu_to_le16(0xFFFF); |
7012 | nv->exchange_count = cpu_to_le16(0); | |
7013 | nv->hard_address = cpu_to_le16(124); | |
4e08df3f | 7014 | nv->port_name[0] = 0x21; |
f73cb695 | 7015 | nv->port_name[1] = 0x00 + ha->port_no + 1; |
4e08df3f DM |
7016 | nv->port_name[2] = 0x00; |
7017 | nv->port_name[3] = 0xe0; | |
7018 | nv->port_name[4] = 0x8b; | |
7019 | nv->port_name[5] = 0x1c; | |
7020 | nv->port_name[6] = 0x55; | |
7021 | nv->port_name[7] = 0x86; | |
7022 | nv->node_name[0] = 0x20; | |
7023 | nv->node_name[1] = 0x00; | |
7024 | nv->node_name[2] = 0x00; | |
7025 | nv->node_name[3] = 0xe0; | |
7026 | nv->node_name[4] = 0x8b; | |
7027 | nv->node_name[5] = 0x1c; | |
7028 | nv->node_name[6] = 0x55; | |
7029 | nv->node_name[7] = 0x86; | |
e315cd28 | 7030 | qla24xx_nvram_wwn_from_ofw(vha, nv); |
ad950360 BVA |
7031 | nv->login_retry_count = cpu_to_le16(8); |
7032 | nv->interrupt_delay_timer = cpu_to_le16(0); | |
7033 | nv->login_timeout = cpu_to_le16(0); | |
4e08df3f | 7034 | nv->firmware_options_1 = |
ad950360 BVA |
7035 | cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); |
7036 | nv->firmware_options_2 = cpu_to_le32(2 << 4); | |
7037 | nv->firmware_options_2 |= cpu_to_le32(BIT_12); | |
7038 | nv->firmware_options_3 = cpu_to_le32(2 << 13); | |
7039 | nv->host_p = cpu_to_le32(BIT_11|BIT_10); | |
7040 | nv->efi_parameters = cpu_to_le32(0); | |
4e08df3f | 7041 | nv->reset_delay = 5; |
ad950360 BVA |
7042 | nv->max_luns_per_target = cpu_to_le16(128); |
7043 | nv->port_down_retry_count = cpu_to_le16(30); | |
7044 | nv->link_down_timeout = cpu_to_le16(30); | |
4e08df3f DM |
7045 | |
7046 | rval = 1; | |
0107109e AV |
7047 | } |
7048 | ||
726b8548 | 7049 | if (qla_tgt_mode_enabled(vha)) { |
2d70c103 | 7050 | /* Don't enable full login after initial LIP */ |
ad950360 | 7051 | nv->firmware_options_1 &= cpu_to_le32(~BIT_13); |
2d70c103 | 7052 | /* Don't enable LIP full login for initiator */ |
ad950360 | 7053 | nv->host_p &= cpu_to_le32(~BIT_10); |
2d70c103 NB |
7054 | } |
7055 | ||
7056 | qlt_24xx_config_nvram_stage1(vha, nv); | |
7057 | ||
0107109e | 7058 | /* Reset Initialization control block */ |
e315cd28 | 7059 | memset(icb, 0, ha->init_cb_size); |
0107109e AV |
7060 | |
7061 | /* Copy 1st segment. */ | |
7062 | dptr1 = (uint8_t *)icb; | |
7063 | dptr2 = (uint8_t *)&nv->version; | |
7064 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
7065 | while (cnt--) | |
7066 | *dptr1++ = *dptr2++; | |
7067 | ||
7068 | icb->login_retry_count = nv->login_retry_count; | |
3ea66e28 | 7069 | icb->link_down_on_nos = nv->link_down_on_nos; |
0107109e AV |
7070 | |
7071 | /* Copy 2nd segment. */ | |
7072 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
7073 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
7074 | cnt = (uint8_t *)&icb->reserved_3 - | |
7075 | (uint8_t *)&icb->interrupt_delay_timer; | |
7076 | while (cnt--) | |
7077 | *dptr1++ = *dptr2++; | |
0eaaca4c | 7078 | ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); |
0107109e AV |
7079 | /* |
7080 | * Setup driver NVRAM options. | |
7081 | */ | |
e315cd28 | 7082 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), |
9bb9fcf2 | 7083 | "QLA2462"); |
0107109e | 7084 | |
2d70c103 NB |
7085 | qlt_24xx_config_nvram_stage2(vha, icb); |
7086 | ||
ad950360 | 7087 | if (nv->host_p & cpu_to_le32(BIT_15)) { |
2d70c103 | 7088 | /* Use alternate WWN? */ |
5341e868 AV |
7089 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); |
7090 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
7091 | } | |
7092 | ||
0107109e | 7093 | /* Prepare nodename */ |
ad950360 | 7094 | if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { |
0107109e AV |
7095 | /* |
7096 | * Firmware will apply the following mask if the nodename was | |
7097 | * not provided. | |
7098 | */ | |
7099 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
7100 | icb->node_name[0] &= 0xF0; | |
7101 | } | |
7102 | ||
7103 | /* Set host adapter parameters. */ | |
7104 | ha->flags.disable_risc_code_load = 0; | |
0c8c39af AV |
7105 | ha->flags.enable_lip_reset = 0; |
7106 | ha->flags.enable_lip_full_login = | |
7107 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
7108 | ha->flags.enable_target_reset = | |
7109 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
0107109e | 7110 | ha->flags.enable_led_scheme = 0; |
d4c760c2 | 7111 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; |
0107109e | 7112 | |
fd0e7e4d AV |
7113 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & |
7114 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
0107109e AV |
7115 | |
7116 | memcpy(ha->fw_seriallink_options24, nv->seriallink_options, | |
7117 | sizeof(ha->fw_seriallink_options24)); | |
7118 | ||
7119 | /* save HBA serial number */ | |
7120 | ha->serial0 = icb->port_name[5]; | |
7121 | ha->serial1 = icb->port_name[6]; | |
7122 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
7123 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
7124 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
0107109e | 7125 | |
ad950360 | 7126 | icb->execution_throttle = cpu_to_le16(0xFFFF); |
bc8fb3cb | 7127 | |
0107109e AV |
7128 | ha->retry_count = le16_to_cpu(nv->login_retry_count); |
7129 | ||
7130 | /* Set minimum login_timeout to 4 seconds. */ | |
7131 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
7132 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
7133 | if (le16_to_cpu(nv->login_timeout) < 4) | |
ad950360 | 7134 | nv->login_timeout = cpu_to_le16(4); |
0107109e | 7135 | ha->login_timeout = le16_to_cpu(nv->login_timeout); |
0107109e | 7136 | |
00a537b8 AV |
7137 | /* Set minimum RATOV to 100 tenths of a second. */ |
7138 | ha->r_a_tov = 100; | |
0107109e AV |
7139 | |
7140 | ha->loop_reset_delay = nv->reset_delay; | |
7141 | ||
7142 | /* Link Down Timeout = 0: | |
7143 | * | |
7144 | * When Port Down timer expires we will start returning | |
7145 | * I/O's to OS with "DID_NO_CONNECT". | |
7146 | * | |
7147 | * Link Down Timeout != 0: | |
7148 | * | |
7149 | * The driver waits for the link to come up after link down | |
7150 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
7151 | */ | |
7152 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
7153 | ha->loop_down_abort_time = | |
7154 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
7155 | } else { | |
7156 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
7157 | ha->loop_down_abort_time = | |
7158 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
7159 | } | |
7160 | ||
7161 | /* Need enough time to try and get the port back. */ | |
7162 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
7163 | if (qlport_down_retry) | |
7164 | ha->port_down_retry_count = qlport_down_retry; | |
7165 | ||
7166 | /* Set login_retry_count */ | |
7167 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
7168 | if (ha->port_down_retry_count == | |
7169 | le16_to_cpu(nv->port_down_retry_count) && | |
7170 | ha->port_down_retry_count > 3) | |
7171 | ha->login_retry_count = ha->port_down_retry_count; | |
7172 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
7173 | ha->login_retry_count = ha->port_down_retry_count; | |
7174 | if (ql2xloginretrycount) | |
7175 | ha->login_retry_count = ql2xloginretrycount; | |
7176 | ||
8777e431 QT |
7177 | /* N2N: driver will initiate Login instead of FW */ |
7178 | icb->firmware_options_3 |= BIT_8; | |
7179 | ||
4fdfefe5 | 7180 | /* Enable ZIO. */ |
e315cd28 | 7181 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
7182 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & |
7183 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
7184 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
7185 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
7186 | } | |
ad950360 | 7187 | icb->firmware_options_2 &= cpu_to_le32( |
4fdfefe5 | 7188 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); |
4fdfefe5 | 7189 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d | 7190 | ha->zio_mode = QLA_ZIO_MODE_6; |
7191 | ||
7c3df132 | 7192 | ql_log(ql_log_info, vha, 0x006f, |
4fdfefe5 AV |
7193 | "ZIO mode %d enabled; timer delay (%d us).\n", |
7194 | ha->zio_mode, ha->zio_timer * 100); | |
7195 | ||
7196 | icb->firmware_options_2 |= cpu_to_le32( | |
7197 | (uint32_t)ha->zio_mode); | |
7198 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
4fdfefe5 AV |
7199 | } |
7200 | ||
4e08df3f | 7201 | if (rval) { |
7c3df132 SK |
7202 | ql_log(ql_log_warn, vha, 0x0070, |
7203 | "NVRAM configuration failed.\n"); | |
4e08df3f DM |
7204 | } |
7205 | return (rval); | |
0107109e AV |
7206 | } |
7207 | ||
4243c115 SC |
7208 | uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha) |
7209 | { | |
7210 | struct qla27xx_image_status pri_image_status, sec_image_status; | |
7211 | uint8_t valid_pri_image, valid_sec_image; | |
7212 | uint32_t *wptr; | |
7213 | uint32_t cnt, chksum, size; | |
7214 | struct qla_hw_data *ha = vha->hw; | |
7215 | ||
7216 | valid_pri_image = valid_sec_image = 1; | |
7217 | ha->active_image = 0; | |
7218 | size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t); | |
7219 | ||
7220 | if (!ha->flt_region_img_status_pri) { | |
7221 | valid_pri_image = 0; | |
7222 | goto check_sec_image; | |
7223 | } | |
7224 | ||
7225 | qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status), | |
7226 | ha->flt_region_img_status_pri, size); | |
7227 | ||
7228 | if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { | |
7229 | ql_dbg(ql_dbg_init, vha, 0x018b, | |
7230 | "Primary image signature (0x%x) not valid\n", | |
7231 | pri_image_status.signature); | |
7232 | valid_pri_image = 0; | |
7233 | goto check_sec_image; | |
7234 | } | |
7235 | ||
7236 | wptr = (uint32_t *)(&pri_image_status); | |
7237 | cnt = size; | |
7238 | ||
da08ef5c JC |
7239 | for (chksum = 0; cnt--; wptr++) |
7240 | chksum += le32_to_cpu(*wptr); | |
41dc529a | 7241 | |
4243c115 SC |
7242 | if (chksum) { |
7243 | ql_dbg(ql_dbg_init, vha, 0x018c, | |
7244 | "Checksum validation failed for primary image (0x%x)\n", | |
7245 | chksum); | |
7246 | valid_pri_image = 0; | |
7247 | } | |
7248 | ||
7249 | check_sec_image: | |
7250 | if (!ha->flt_region_img_status_sec) { | |
7251 | valid_sec_image = 0; | |
7252 | goto check_valid_image; | |
7253 | } | |
7254 | ||
7255 | qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), | |
7256 | ha->flt_region_img_status_sec, size); | |
7257 | ||
7258 | if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { | |
7259 | ql_dbg(ql_dbg_init, vha, 0x018d, | |
7260 | "Secondary image signature(0x%x) not valid\n", | |
7261 | sec_image_status.signature); | |
7262 | valid_sec_image = 0; | |
7263 | goto check_valid_image; | |
7264 | } | |
7265 | ||
7266 | wptr = (uint32_t *)(&sec_image_status); | |
7267 | cnt = size; | |
da08ef5c JC |
7268 | for (chksum = 0; cnt--; wptr++) |
7269 | chksum += le32_to_cpu(*wptr); | |
4243c115 SC |
7270 | if (chksum) { |
7271 | ql_dbg(ql_dbg_init, vha, 0x018e, | |
7272 | "Checksum validation failed for secondary image (0x%x)\n", | |
7273 | chksum); | |
7274 | valid_sec_image = 0; | |
7275 | } | |
7276 | ||
7277 | check_valid_image: | |
7278 | if (valid_pri_image && (pri_image_status.image_status_mask & 0x1)) | |
7279 | ha->active_image = QLA27XX_PRIMARY_IMAGE; | |
7280 | if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) { | |
7281 | if (!ha->active_image || | |
7282 | pri_image_status.generation_number < | |
7283 | sec_image_status.generation_number) | |
7284 | ha->active_image = QLA27XX_SECONDARY_IMAGE; | |
7285 | } | |
7286 | ||
22ebde16 | 7287 | ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x018f, "%s image\n", |
4243c115 SC |
7288 | ha->active_image == 0 ? "default bootld and fw" : |
7289 | ha->active_image == 1 ? "primary" : | |
7290 | ha->active_image == 2 ? "secondary" : | |
7291 | "Invalid"); | |
7292 | ||
7293 | return ha->active_image; | |
7294 | } | |
7295 | ||
413975a0 | 7296 | static int |
cbc8eb67 AV |
7297 | qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, |
7298 | uint32_t faddr) | |
d1c61909 | 7299 | { |
73208dfd | 7300 | int rval = QLA_SUCCESS; |
d1c61909 | 7301 | int segments, fragment; |
d1c61909 AV |
7302 | uint32_t *dcode, dlen; |
7303 | uint32_t risc_addr; | |
7304 | uint32_t risc_size; | |
7305 | uint32_t i; | |
e315cd28 | 7306 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 7307 | struct req_que *req = ha->req_q_map[0]; |
eaac30be | 7308 | |
7c3df132 | 7309 | ql_dbg(ql_dbg_init, vha, 0x008b, |
cfb0919c | 7310 | "FW: Loading firmware from flash (%x).\n", faddr); |
eaac30be | 7311 | |
d1c61909 AV |
7312 | rval = QLA_SUCCESS; |
7313 | ||
7314 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 7315 | dcode = (uint32_t *)req->ring; |
d1c61909 AV |
7316 | *srisc_addr = 0; |
7317 | ||
4243c115 SC |
7318 | if (IS_QLA27XX(ha) && |
7319 | qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE) | |
7320 | faddr = ha->flt_region_fw_sec; | |
7321 | ||
d1c61909 | 7322 | /* Validate firmware image by checking version. */ |
e315cd28 | 7323 | qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); |
d1c61909 AV |
7324 | for (i = 0; i < 4; i++) |
7325 | dcode[i] = be32_to_cpu(dcode[i]); | |
7326 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
7327 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
7328 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
7329 | dcode[3] == 0)) { | |
7c3df132 SK |
7330 | ql_log(ql_log_fatal, vha, 0x008c, |
7331 | "Unable to verify the integrity of flash firmware " | |
7332 | "image.\n"); | |
7333 | ql_log(ql_log_fatal, vha, 0x008d, | |
7334 | "Firmware data: %08x %08x %08x %08x.\n", | |
7335 | dcode[0], dcode[1], dcode[2], dcode[3]); | |
d1c61909 AV |
7336 | |
7337 | return QLA_FUNCTION_FAILED; | |
7338 | } | |
7339 | ||
7340 | while (segments && rval == QLA_SUCCESS) { | |
7341 | /* Read segment's load information. */ | |
e315cd28 | 7342 | qla24xx_read_flash_data(vha, dcode, faddr, 4); |
d1c61909 AV |
7343 | |
7344 | risc_addr = be32_to_cpu(dcode[2]); | |
7345 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
7346 | risc_size = be32_to_cpu(dcode[3]); | |
7347 | ||
7348 | fragment = 0; | |
7349 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
7350 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
7351 | if (dlen > risc_size) | |
7352 | dlen = risc_size; | |
7353 | ||
7c3df132 SK |
7354 | ql_dbg(ql_dbg_init, vha, 0x008e, |
7355 | "Loading risc segment@ risc addr %x " | |
7356 | "number of dwords 0x%x offset 0x%x.\n", | |
7357 | risc_addr, dlen, faddr); | |
d1c61909 | 7358 | |
e315cd28 | 7359 | qla24xx_read_flash_data(vha, dcode, faddr, dlen); |
d1c61909 AV |
7360 | for (i = 0; i < dlen; i++) |
7361 | dcode[i] = swab32(dcode[i]); | |
7362 | ||
73208dfd | 7363 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
d1c61909 AV |
7364 | dlen); |
7365 | if (rval) { | |
7c3df132 SK |
7366 | ql_log(ql_log_fatal, vha, 0x008f, |
7367 | "Failed to load segment %d of firmware.\n", | |
7368 | fragment); | |
f261f7af | 7369 | return QLA_FUNCTION_FAILED; |
d1c61909 AV |
7370 | } |
7371 | ||
7372 | faddr += dlen; | |
7373 | risc_addr += dlen; | |
7374 | risc_size -= dlen; | |
7375 | fragment++; | |
7376 | } | |
7377 | ||
7378 | /* Next segment. */ | |
7379 | segments--; | |
7380 | } | |
7381 | ||
f73cb695 CD |
7382 | if (!IS_QLA27XX(ha)) |
7383 | return rval; | |
7384 | ||
7385 | if (ha->fw_dump_template) | |
7386 | vfree(ha->fw_dump_template); | |
7387 | ha->fw_dump_template = NULL; | |
7388 | ha->fw_dump_template_len = 0; | |
7389 | ||
7390 | ql_dbg(ql_dbg_init, vha, 0x0161, | |
7391 | "Loading fwdump template from %x\n", faddr); | |
7392 | qla24xx_read_flash_data(vha, dcode, faddr, 7); | |
7393 | risc_size = be32_to_cpu(dcode[2]); | |
7394 | ql_dbg(ql_dbg_init, vha, 0x0162, | |
7395 | "-> array size %x dwords\n", risc_size); | |
7396 | if (risc_size == 0 || risc_size == ~0) | |
7397 | goto default_template; | |
7398 | ||
7399 | dlen = (risc_size - 8) * sizeof(*dcode); | |
7400 | ql_dbg(ql_dbg_init, vha, 0x0163, | |
7401 | "-> template allocating %x bytes...\n", dlen); | |
7402 | ha->fw_dump_template = vmalloc(dlen); | |
7403 | if (!ha->fw_dump_template) { | |
7404 | ql_log(ql_log_warn, vha, 0x0164, | |
7405 | "Failed fwdump template allocate %x bytes.\n", risc_size); | |
7406 | goto default_template; | |
7407 | } | |
7408 | ||
7409 | faddr += 7; | |
7410 | risc_size -= 8; | |
7411 | dcode = ha->fw_dump_template; | |
7412 | qla24xx_read_flash_data(vha, dcode, faddr, risc_size); | |
7413 | for (i = 0; i < risc_size; i++) | |
7414 | dcode[i] = le32_to_cpu(dcode[i]); | |
7415 | ||
7416 | if (!qla27xx_fwdt_template_valid(dcode)) { | |
7417 | ql_log(ql_log_warn, vha, 0x0165, | |
7418 | "Failed fwdump template validate\n"); | |
7419 | goto default_template; | |
7420 | } | |
7421 | ||
7422 | dlen = qla27xx_fwdt_template_size(dcode); | |
7423 | ql_dbg(ql_dbg_init, vha, 0x0166, | |
7424 | "-> template size %x bytes\n", dlen); | |
7425 | if (dlen > risc_size * sizeof(*dcode)) { | |
7426 | ql_log(ql_log_warn, vha, 0x0167, | |
4fae52b5 | 7427 | "Failed fwdump template exceeds array by %zx bytes\n", |
383a298b | 7428 | (size_t)(dlen - risc_size * sizeof(*dcode))); |
f73cb695 CD |
7429 | goto default_template; |
7430 | } | |
7431 | ha->fw_dump_template_len = dlen; | |
7432 | return rval; | |
7433 | ||
7434 | default_template: | |
7435 | ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n"); | |
7436 | if (ha->fw_dump_template) | |
7437 | vfree(ha->fw_dump_template); | |
7438 | ha->fw_dump_template = NULL; | |
7439 | ha->fw_dump_template_len = 0; | |
7440 | ||
7441 | dlen = qla27xx_fwdt_template_default_size(); | |
7442 | ql_dbg(ql_dbg_init, vha, 0x0169, | |
7443 | "-> template allocating %x bytes...\n", dlen); | |
7444 | ha->fw_dump_template = vmalloc(dlen); | |
7445 | if (!ha->fw_dump_template) { | |
7446 | ql_log(ql_log_warn, vha, 0x016a, | |
7447 | "Failed fwdump template allocate %x bytes.\n", risc_size); | |
7448 | goto failed_template; | |
7449 | } | |
7450 | ||
7451 | dcode = ha->fw_dump_template; | |
7452 | risc_size = dlen / sizeof(*dcode); | |
7453 | memcpy(dcode, qla27xx_fwdt_template_default(), dlen); | |
7454 | for (i = 0; i < risc_size; i++) | |
7455 | dcode[i] = be32_to_cpu(dcode[i]); | |
7456 | ||
7457 | if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { | |
7458 | ql_log(ql_log_warn, vha, 0x016b, | |
7459 | "Failed fwdump template validate\n"); | |
7460 | goto failed_template; | |
7461 | } | |
7462 | ||
7463 | dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); | |
7464 | ql_dbg(ql_dbg_init, vha, 0x016c, | |
7465 | "-> template size %x bytes\n", dlen); | |
7466 | ha->fw_dump_template_len = dlen; | |
7467 | return rval; | |
7468 | ||
7469 | failed_template: | |
7470 | ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n"); | |
7471 | if (ha->fw_dump_template) | |
7472 | vfree(ha->fw_dump_template); | |
7473 | ha->fw_dump_template = NULL; | |
7474 | ha->fw_dump_template_len = 0; | |
d1c61909 AV |
7475 | return rval; |
7476 | } | |
7477 | ||
e9454a88 | 7478 | #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" |
d1c61909 | 7479 | |
0107109e | 7480 | int |
e315cd28 | 7481 | qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) |
5433383e AV |
7482 | { |
7483 | int rval; | |
7484 | int i, fragment; | |
7485 | uint16_t *wcode, *fwcode; | |
7486 | uint32_t risc_addr, risc_size, fwclen, wlen, *seg; | |
7487 | struct fw_blob *blob; | |
e315cd28 | 7488 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 7489 | struct req_que *req = ha->req_q_map[0]; |
5433383e AV |
7490 | |
7491 | /* Load firmware blob. */ | |
e315cd28 | 7492 | blob = qla2x00_request_firmware(vha); |
5433383e | 7493 | if (!blob) { |
7c3df132 | 7494 | ql_log(ql_log_info, vha, 0x0083, |
94bcf830 | 7495 | "Firmware image unavailable.\n"); |
7c3df132 SK |
7496 | ql_log(ql_log_info, vha, 0x0084, |
7497 | "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); | |
5433383e AV |
7498 | return QLA_FUNCTION_FAILED; |
7499 | } | |
7500 | ||
7501 | rval = QLA_SUCCESS; | |
7502 | ||
73208dfd | 7503 | wcode = (uint16_t *)req->ring; |
5433383e AV |
7504 | *srisc_addr = 0; |
7505 | fwcode = (uint16_t *)blob->fw->data; | |
7506 | fwclen = 0; | |
7507 | ||
7508 | /* Validate firmware image by checking version. */ | |
7509 | if (blob->fw->size < 8 * sizeof(uint16_t)) { | |
7c3df132 | 7510 | ql_log(ql_log_fatal, vha, 0x0085, |
5b5e0928 | 7511 | "Unable to verify integrity of firmware image (%zd).\n", |
5433383e AV |
7512 | blob->fw->size); |
7513 | goto fail_fw_integrity; | |
7514 | } | |
7515 | for (i = 0; i < 4; i++) | |
7516 | wcode[i] = be16_to_cpu(fwcode[i + 4]); | |
7517 | if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && | |
7518 | wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && | |
7519 | wcode[2] == 0 && wcode[3] == 0)) { | |
7c3df132 SK |
7520 | ql_log(ql_log_fatal, vha, 0x0086, |
7521 | "Unable to verify integrity of firmware image.\n"); | |
7522 | ql_log(ql_log_fatal, vha, 0x0087, | |
7523 | "Firmware data: %04x %04x %04x %04x.\n", | |
7524 | wcode[0], wcode[1], wcode[2], wcode[3]); | |
5433383e AV |
7525 | goto fail_fw_integrity; |
7526 | } | |
7527 | ||
7528 | seg = blob->segs; | |
7529 | while (*seg && rval == QLA_SUCCESS) { | |
7530 | risc_addr = *seg; | |
7531 | *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; | |
7532 | risc_size = be16_to_cpu(fwcode[3]); | |
7533 | ||
7534 | /* Validate firmware image size. */ | |
7535 | fwclen += risc_size * sizeof(uint16_t); | |
7536 | if (blob->fw->size < fwclen) { | |
7c3df132 | 7537 | ql_log(ql_log_fatal, vha, 0x0088, |
5433383e | 7538 | "Unable to verify integrity of firmware image " |
5b5e0928 | 7539 | "(%zd).\n", blob->fw->size); |
5433383e AV |
7540 | goto fail_fw_integrity; |
7541 | } | |
7542 | ||
7543 | fragment = 0; | |
7544 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
7545 | wlen = (uint16_t)(ha->fw_transfer_size >> 1); | |
7546 | if (wlen > risc_size) | |
7547 | wlen = risc_size; | |
7c3df132 SK |
7548 | ql_dbg(ql_dbg_init, vha, 0x0089, |
7549 | "Loading risc segment@ risc addr %x number of " | |
7550 | "words 0x%x.\n", risc_addr, wlen); | |
5433383e AV |
7551 | |
7552 | for (i = 0; i < wlen; i++) | |
7553 | wcode[i] = swab16(fwcode[i]); | |
7554 | ||
73208dfd | 7555 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
5433383e AV |
7556 | wlen); |
7557 | if (rval) { | |
7c3df132 SK |
7558 | ql_log(ql_log_fatal, vha, 0x008a, |
7559 | "Failed to load segment %d of firmware.\n", | |
7560 | fragment); | |
5433383e AV |
7561 | break; |
7562 | } | |
7563 | ||
7564 | fwcode += wlen; | |
7565 | risc_addr += wlen; | |
7566 | risc_size -= wlen; | |
7567 | fragment++; | |
7568 | } | |
7569 | ||
7570 | /* Next segment. */ | |
7571 | seg++; | |
7572 | } | |
7573 | return rval; | |
7574 | ||
7575 | fail_fw_integrity: | |
7576 | return QLA_FUNCTION_FAILED; | |
7577 | } | |
7578 | ||
eaac30be AV |
7579 | static int |
7580 | qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
0107109e AV |
7581 | { |
7582 | int rval; | |
7583 | int segments, fragment; | |
7584 | uint32_t *dcode, dlen; | |
7585 | uint32_t risc_addr; | |
7586 | uint32_t risc_size; | |
7587 | uint32_t i; | |
5433383e | 7588 | struct fw_blob *blob; |
f73cb695 CD |
7589 | const uint32_t *fwcode; |
7590 | uint32_t fwclen; | |
e315cd28 | 7591 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 7592 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 7593 | |
5433383e | 7594 | /* Load firmware blob. */ |
e315cd28 | 7595 | blob = qla2x00_request_firmware(vha); |
5433383e | 7596 | if (!blob) { |
7c3df132 | 7597 | ql_log(ql_log_warn, vha, 0x0090, |
94bcf830 | 7598 | "Firmware image unavailable.\n"); |
7c3df132 SK |
7599 | ql_log(ql_log_warn, vha, 0x0091, |
7600 | "Firmware images can be retrieved from: " | |
7601 | QLA_FW_URL ".\n"); | |
d1c61909 | 7602 | |
eaac30be | 7603 | return QLA_FUNCTION_FAILED; |
0107109e AV |
7604 | } |
7605 | ||
cfb0919c CD |
7606 | ql_dbg(ql_dbg_init, vha, 0x0092, |
7607 | "FW: Loading via request-firmware.\n"); | |
eaac30be | 7608 | |
0107109e AV |
7609 | rval = QLA_SUCCESS; |
7610 | ||
7611 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 7612 | dcode = (uint32_t *)req->ring; |
0107109e | 7613 | *srisc_addr = 0; |
5433383e | 7614 | fwcode = (uint32_t *)blob->fw->data; |
0107109e AV |
7615 | fwclen = 0; |
7616 | ||
7617 | /* Validate firmware image by checking version. */ | |
5433383e | 7618 | if (blob->fw->size < 8 * sizeof(uint32_t)) { |
7c3df132 | 7619 | ql_log(ql_log_fatal, vha, 0x0093, |
5b5e0928 | 7620 | "Unable to verify integrity of firmware image (%zd).\n", |
5433383e | 7621 | blob->fw->size); |
f73cb695 | 7622 | return QLA_FUNCTION_FAILED; |
0107109e AV |
7623 | } |
7624 | for (i = 0; i < 4; i++) | |
7625 | dcode[i] = be32_to_cpu(fwcode[i + 4]); | |
7626 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
7627 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
7628 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
7629 | dcode[3] == 0)) { | |
7c3df132 | 7630 | ql_log(ql_log_fatal, vha, 0x0094, |
5b5e0928 | 7631 | "Unable to verify integrity of firmware image (%zd).\n", |
7c3df132 SK |
7632 | blob->fw->size); |
7633 | ql_log(ql_log_fatal, vha, 0x0095, | |
7634 | "Firmware data: %08x %08x %08x %08x.\n", | |
7635 | dcode[0], dcode[1], dcode[2], dcode[3]); | |
f73cb695 | 7636 | return QLA_FUNCTION_FAILED; |
0107109e AV |
7637 | } |
7638 | ||
7639 | while (segments && rval == QLA_SUCCESS) { | |
7640 | risc_addr = be32_to_cpu(fwcode[2]); | |
7641 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
7642 | risc_size = be32_to_cpu(fwcode[3]); | |
7643 | ||
7644 | /* Validate firmware image size. */ | |
7645 | fwclen += risc_size * sizeof(uint32_t); | |
5433383e | 7646 | if (blob->fw->size < fwclen) { |
7c3df132 | 7647 | ql_log(ql_log_fatal, vha, 0x0096, |
5433383e | 7648 | "Unable to verify integrity of firmware image " |
5b5e0928 | 7649 | "(%zd).\n", blob->fw->size); |
f73cb695 | 7650 | return QLA_FUNCTION_FAILED; |
0107109e AV |
7651 | } |
7652 | ||
7653 | fragment = 0; | |
7654 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
7655 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
7656 | if (dlen > risc_size) | |
7657 | dlen = risc_size; | |
7658 | ||
7c3df132 SK |
7659 | ql_dbg(ql_dbg_init, vha, 0x0097, |
7660 | "Loading risc segment@ risc addr %x " | |
7661 | "number of dwords 0x%x.\n", risc_addr, dlen); | |
0107109e AV |
7662 | |
7663 | for (i = 0; i < dlen; i++) | |
7664 | dcode[i] = swab32(fwcode[i]); | |
7665 | ||
73208dfd | 7666 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
590f98e5 | 7667 | dlen); |
0107109e | 7668 | if (rval) { |
7c3df132 SK |
7669 | ql_log(ql_log_fatal, vha, 0x0098, |
7670 | "Failed to load segment %d of firmware.\n", | |
7671 | fragment); | |
f261f7af | 7672 | return QLA_FUNCTION_FAILED; |
0107109e AV |
7673 | } |
7674 | ||
7675 | fwcode += dlen; | |
7676 | risc_addr += dlen; | |
7677 | risc_size -= dlen; | |
7678 | fragment++; | |
7679 | } | |
7680 | ||
7681 | /* Next segment. */ | |
7682 | segments--; | |
7683 | } | |
f73cb695 CD |
7684 | |
7685 | if (!IS_QLA27XX(ha)) | |
7686 | return rval; | |
7687 | ||
7688 | if (ha->fw_dump_template) | |
7689 | vfree(ha->fw_dump_template); | |
7690 | ha->fw_dump_template = NULL; | |
7691 | ha->fw_dump_template_len = 0; | |
7692 | ||
7693 | ql_dbg(ql_dbg_init, vha, 0x171, | |
97ea702b CD |
7694 | "Loading fwdump template from %x\n", |
7695 | (uint32_t)((void *)fwcode - (void *)blob->fw->data)); | |
f73cb695 CD |
7696 | risc_size = be32_to_cpu(fwcode[2]); |
7697 | ql_dbg(ql_dbg_init, vha, 0x172, | |
7698 | "-> array size %x dwords\n", risc_size); | |
7699 | if (risc_size == 0 || risc_size == ~0) | |
7700 | goto default_template; | |
7701 | ||
7702 | dlen = (risc_size - 8) * sizeof(*fwcode); | |
7703 | ql_dbg(ql_dbg_init, vha, 0x0173, | |
7704 | "-> template allocating %x bytes...\n", dlen); | |
7705 | ha->fw_dump_template = vmalloc(dlen); | |
7706 | if (!ha->fw_dump_template) { | |
7707 | ql_log(ql_log_warn, vha, 0x0174, | |
7708 | "Failed fwdump template allocate %x bytes.\n", risc_size); | |
7709 | goto default_template; | |
7710 | } | |
7711 | ||
7712 | fwcode += 7; | |
7713 | risc_size -= 8; | |
7714 | dcode = ha->fw_dump_template; | |
7715 | for (i = 0; i < risc_size; i++) | |
7716 | dcode[i] = le32_to_cpu(fwcode[i]); | |
7717 | ||
7718 | if (!qla27xx_fwdt_template_valid(dcode)) { | |
7719 | ql_log(ql_log_warn, vha, 0x0175, | |
7720 | "Failed fwdump template validate\n"); | |
7721 | goto default_template; | |
7722 | } | |
7723 | ||
7724 | dlen = qla27xx_fwdt_template_size(dcode); | |
7725 | ql_dbg(ql_dbg_init, vha, 0x0176, | |
7726 | "-> template size %x bytes\n", dlen); | |
7727 | if (dlen > risc_size * sizeof(*fwcode)) { | |
7728 | ql_log(ql_log_warn, vha, 0x0177, | |
4fae52b5 | 7729 | "Failed fwdump template exceeds array by %zx bytes\n", |
383a298b | 7730 | (size_t)(dlen - risc_size * sizeof(*fwcode))); |
f73cb695 CD |
7731 | goto default_template; |
7732 | } | |
7733 | ha->fw_dump_template_len = dlen; | |
0107109e AV |
7734 | return rval; |
7735 | ||
f73cb695 CD |
7736 | default_template: |
7737 | ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n"); | |
7738 | if (ha->fw_dump_template) | |
7739 | vfree(ha->fw_dump_template); | |
7740 | ha->fw_dump_template = NULL; | |
7741 | ha->fw_dump_template_len = 0; | |
7742 | ||
7743 | dlen = qla27xx_fwdt_template_default_size(); | |
7744 | ql_dbg(ql_dbg_init, vha, 0x0179, | |
7745 | "-> template allocating %x bytes...\n", dlen); | |
7746 | ha->fw_dump_template = vmalloc(dlen); | |
7747 | if (!ha->fw_dump_template) { | |
7748 | ql_log(ql_log_warn, vha, 0x017a, | |
7749 | "Failed fwdump template allocate %x bytes.\n", risc_size); | |
7750 | goto failed_template; | |
7751 | } | |
7752 | ||
7753 | dcode = ha->fw_dump_template; | |
7754 | risc_size = dlen / sizeof(*fwcode); | |
7755 | fwcode = qla27xx_fwdt_template_default(); | |
7756 | for (i = 0; i < risc_size; i++) | |
7757 | dcode[i] = be32_to_cpu(fwcode[i]); | |
7758 | ||
7759 | if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { | |
7760 | ql_log(ql_log_warn, vha, 0x017b, | |
7761 | "Failed fwdump template validate\n"); | |
7762 | goto failed_template; | |
7763 | } | |
7764 | ||
7765 | dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); | |
7766 | ql_dbg(ql_dbg_init, vha, 0x017c, | |
7767 | "-> template size %x bytes\n", dlen); | |
7768 | ha->fw_dump_template_len = dlen; | |
7769 | return rval; | |
7770 | ||
7771 | failed_template: | |
7772 | ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n"); | |
7773 | if (ha->fw_dump_template) | |
7774 | vfree(ha->fw_dump_template); | |
7775 | ha->fw_dump_template = NULL; | |
7776 | ha->fw_dump_template_len = 0; | |
7777 | return rval; | |
0107109e | 7778 | } |
18c6c127 | 7779 | |
eaac30be AV |
7780 | int |
7781 | qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
7782 | { | |
7783 | int rval; | |
7784 | ||
e337d907 AV |
7785 | if (ql2xfwloadbin == 1) |
7786 | return qla81xx_load_risc(vha, srisc_addr); | |
7787 | ||
eaac30be AV |
7788 | /* |
7789 | * FW Load priority: | |
7790 | * 1) Firmware via request-firmware interface (.bin file). | |
7791 | * 2) Firmware residing in flash. | |
7792 | */ | |
7793 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
7794 | if (rval == QLA_SUCCESS) | |
7795 | return rval; | |
7796 | ||
cbc8eb67 AV |
7797 | return qla24xx_load_risc_flash(vha, srisc_addr, |
7798 | vha->hw->flt_region_fw); | |
eaac30be AV |
7799 | } |
7800 | ||
7801 | int | |
7802 | qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
7803 | { | |
7804 | int rval; | |
cbc8eb67 | 7805 | struct qla_hw_data *ha = vha->hw; |
eaac30be | 7806 | |
e337d907 | 7807 | if (ql2xfwloadbin == 2) |
cbc8eb67 | 7808 | goto try_blob_fw; |
e337d907 | 7809 | |
eaac30be AV |
7810 | /* |
7811 | * FW Load priority: | |
7812 | * 1) Firmware residing in flash. | |
7813 | * 2) Firmware via request-firmware interface (.bin file). | |
cbc8eb67 | 7814 | * 3) Golden-Firmware residing in flash -- limited operation. |
eaac30be | 7815 | */ |
cbc8eb67 | 7816 | rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); |
eaac30be AV |
7817 | if (rval == QLA_SUCCESS) |
7818 | return rval; | |
7819 | ||
cbc8eb67 AV |
7820 | try_blob_fw: |
7821 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
7822 | if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) | |
7823 | return rval; | |
7824 | ||
7c3df132 SK |
7825 | ql_log(ql_log_info, vha, 0x0099, |
7826 | "Attempting to fallback to golden firmware.\n"); | |
cbc8eb67 AV |
7827 | rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); |
7828 | if (rval != QLA_SUCCESS) | |
7829 | return rval; | |
7830 | ||
7c3df132 | 7831 | ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n"); |
cbc8eb67 | 7832 | ha->flags.running_gold_fw = 1; |
cbc8eb67 | 7833 | return rval; |
eaac30be AV |
7834 | } |
7835 | ||
18c6c127 | 7836 | void |
e315cd28 | 7837 | qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) |
18c6c127 AV |
7838 | { |
7839 | int ret, retries; | |
e315cd28 | 7840 | struct qla_hw_data *ha = vha->hw; |
18c6c127 | 7841 | |
85880801 AV |
7842 | if (ha->flags.pci_channel_io_perm_failure) |
7843 | return; | |
e428924c | 7844 | if (!IS_FWI2_CAPABLE(ha)) |
18c6c127 | 7845 | return; |
75edf81d AV |
7846 | if (!ha->fw_major_version) |
7847 | return; | |
ec7193e2 QT |
7848 | if (!ha->flags.fw_started) |
7849 | return; | |
18c6c127 | 7850 | |
e315cd28 | 7851 | ret = qla2x00_stop_firmware(vha); |
7c7f1f29 | 7852 | for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && |
b469a7cb | 7853 | ret != QLA_INVALID_COMMAND && retries ; retries--) { |
e315cd28 AC |
7854 | ha->isp_ops->reset_chip(vha); |
7855 | if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) | |
18c6c127 | 7856 | continue; |
e315cd28 | 7857 | if (qla2x00_setup_chip(vha) != QLA_SUCCESS) |
18c6c127 | 7858 | continue; |
7c3df132 SK |
7859 | ql_log(ql_log_info, vha, 0x8015, |
7860 | "Attempting retry of stop-firmware command.\n"); | |
e315cd28 | 7861 | ret = qla2x00_stop_firmware(vha); |
18c6c127 | 7862 | } |
ec7193e2 | 7863 | |
4b60c827 | 7864 | QLA_FW_STOPPED(ha); |
ec7193e2 | 7865 | ha->flags.fw_init_done = 0; |
18c6c127 | 7866 | } |
2c3dfe3f SJ |
7867 | |
7868 | int | |
e315cd28 | 7869 | qla24xx_configure_vhba(scsi_qla_host_t *vha) |
2c3dfe3f SJ |
7870 | { |
7871 | int rval = QLA_SUCCESS; | |
0b91d116 | 7872 | int rval2; |
2c3dfe3f | 7873 | uint16_t mb[MAILBOX_REGISTER_COUNT]; |
e315cd28 AC |
7874 | struct qla_hw_data *ha = vha->hw; |
7875 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
2c3dfe3f | 7876 | |
e315cd28 | 7877 | if (!vha->vp_idx) |
2c3dfe3f SJ |
7878 | return -EINVAL; |
7879 | ||
e315cd28 | 7880 | rval = qla2x00_fw_ready(base_vha); |
67c2e93a | 7881 | |
2c3dfe3f | 7882 | if (rval == QLA_SUCCESS) { |
e315cd28 | 7883 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); |
9eb9c6dc | 7884 | qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); |
2c3dfe3f SJ |
7885 | } |
7886 | ||
e315cd28 | 7887 | vha->flags.management_server_logged_in = 0; |
2c3dfe3f SJ |
7888 | |
7889 | /* Login to SNS first */ | |
0b91d116 CD |
7890 | rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, |
7891 | BIT_1); | |
7892 | if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { | |
7893 | if (rval2 == QLA_MEMORY_ALLOC_FAILED) | |
7894 | ql_dbg(ql_dbg_init, vha, 0x0120, | |
7895 | "Failed SNS login: loop_id=%x, rval2=%d\n", | |
7896 | NPH_SNS, rval2); | |
7897 | else | |
7898 | ql_dbg(ql_dbg_init, vha, 0x0103, | |
7899 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " | |
7900 | "mb[2]=%x mb[6]=%x mb[7]=%x.\n", | |
7901 | NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); | |
2c3dfe3f SJ |
7902 | return (QLA_FUNCTION_FAILED); |
7903 | } | |
7904 | ||
e315cd28 AC |
7905 | atomic_set(&vha->loop_down_timer, 0); |
7906 | atomic_set(&vha->loop_state, LOOP_UP); | |
7907 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
7908 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
7909 | rval = qla2x00_loop_resync(base_vha); | |
2c3dfe3f SJ |
7910 | |
7911 | return rval; | |
7912 | } | |
4d4df193 HK |
7913 | |
7914 | /* 84XX Support **************************************************************/ | |
7915 | ||
7916 | static LIST_HEAD(qla_cs84xx_list); | |
7917 | static DEFINE_MUTEX(qla_cs84xx_mutex); | |
7918 | ||
7919 | static struct qla_chip_state_84xx * | |
e315cd28 | 7920 | qla84xx_get_chip(struct scsi_qla_host *vha) |
4d4df193 HK |
7921 | { |
7922 | struct qla_chip_state_84xx *cs84xx; | |
e315cd28 | 7923 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
7924 | |
7925 | mutex_lock(&qla_cs84xx_mutex); | |
7926 | ||
7927 | /* Find any shared 84xx chip. */ | |
7928 | list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { | |
7929 | if (cs84xx->bus == ha->pdev->bus) { | |
7930 | kref_get(&cs84xx->kref); | |
7931 | goto done; | |
7932 | } | |
7933 | } | |
7934 | ||
7935 | cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); | |
7936 | if (!cs84xx) | |
7937 | goto done; | |
7938 | ||
7939 | kref_init(&cs84xx->kref); | |
7940 | spin_lock_init(&cs84xx->access_lock); | |
7941 | mutex_init(&cs84xx->fw_update_mutex); | |
7942 | cs84xx->bus = ha->pdev->bus; | |
7943 | ||
7944 | list_add_tail(&cs84xx->list, &qla_cs84xx_list); | |
7945 | done: | |
7946 | mutex_unlock(&qla_cs84xx_mutex); | |
7947 | return cs84xx; | |
7948 | } | |
7949 | ||
7950 | static void | |
7951 | __qla84xx_chip_release(struct kref *kref) | |
7952 | { | |
7953 | struct qla_chip_state_84xx *cs84xx = | |
7954 | container_of(kref, struct qla_chip_state_84xx, kref); | |
7955 | ||
7956 | mutex_lock(&qla_cs84xx_mutex); | |
7957 | list_del(&cs84xx->list); | |
7958 | mutex_unlock(&qla_cs84xx_mutex); | |
7959 | kfree(cs84xx); | |
7960 | } | |
7961 | ||
7962 | void | |
e315cd28 | 7963 | qla84xx_put_chip(struct scsi_qla_host *vha) |
4d4df193 | 7964 | { |
e315cd28 | 7965 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
7966 | if (ha->cs84xx) |
7967 | kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); | |
7968 | } | |
7969 | ||
7970 | static int | |
e315cd28 | 7971 | qla84xx_init_chip(scsi_qla_host_t *vha) |
4d4df193 HK |
7972 | { |
7973 | int rval; | |
7974 | uint16_t status[2]; | |
e315cd28 | 7975 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
7976 | |
7977 | mutex_lock(&ha->cs84xx->fw_update_mutex); | |
7978 | ||
e315cd28 | 7979 | rval = qla84xx_verify_chip(vha, status); |
4d4df193 HK |
7980 | |
7981 | mutex_unlock(&ha->cs84xx->fw_update_mutex); | |
7982 | ||
7983 | return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: | |
7984 | QLA_SUCCESS; | |
7985 | } | |
3a03eb79 AV |
7986 | |
7987 | /* 81XX Support **************************************************************/ | |
7988 | ||
7989 | int | |
7990 | qla81xx_nvram_config(scsi_qla_host_t *vha) | |
7991 | { | |
7992 | int rval; | |
7993 | struct init_cb_81xx *icb; | |
7994 | struct nvram_81xx *nv; | |
7995 | uint32_t *dptr; | |
7996 | uint8_t *dptr1, *dptr2; | |
7997 | uint32_t chksum; | |
7998 | uint16_t cnt; | |
7999 | struct qla_hw_data *ha = vha->hw; | |
8000 | ||
8001 | rval = QLA_SUCCESS; | |
8002 | icb = (struct init_cb_81xx *)ha->init_cb; | |
8003 | nv = ha->nvram; | |
8004 | ||
8005 | /* Determine NVRAM starting address. */ | |
8006 | ha->nvram_size = sizeof(struct nvram_81xx); | |
3a03eb79 | 8007 | ha->vpd_size = FA_NVRAM_VPD_SIZE; |
7ec0effd AD |
8008 | if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) |
8009 | ha->vpd_size = FA_VPD_SIZE_82XX; | |
3a03eb79 AV |
8010 | |
8011 | /* Get VPD data into cache */ | |
8012 | ha->vpd = ha->nvram + VPD_OFFSET; | |
3d79038f AV |
8013 | ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, |
8014 | ha->vpd_size); | |
3a03eb79 AV |
8015 | |
8016 | /* Get NVRAM data into cache and calculate checksum. */ | |
3d79038f | 8017 | ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, |
3a03eb79 | 8018 | ha->nvram_size); |
3d79038f | 8019 | dptr = (uint32_t *)nv; |
da08ef5c JC |
8020 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) |
8021 | chksum += le32_to_cpu(*dptr); | |
3a03eb79 | 8022 | |
7c3df132 SK |
8023 | ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, |
8024 | "Contents of NVRAM:\n"); | |
8025 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, | |
8026 | (uint8_t *)nv, ha->nvram_size); | |
3a03eb79 AV |
8027 | |
8028 | /* Bad NVRAM data, set defaults parameters. */ | |
8029 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
8030 | || nv->id[3] != ' ' || | |
ad950360 | 8031 | nv->nvram_version < cpu_to_le16(ICB_VERSION)) { |
3a03eb79 | 8032 | /* Reset NVRAM data. */ |
7c3df132 | 8033 | ql_log(ql_log_info, vha, 0x0073, |
9e336520 | 8034 | "Inconsistent NVRAM detected: checksum=0x%x id=%c " |
7c3df132 | 8035 | "version=0x%x.\n", chksum, nv->id[0], |
3a03eb79 | 8036 | le16_to_cpu(nv->nvram_version)); |
7c3df132 SK |
8037 | ql_log(ql_log_info, vha, 0x0074, |
8038 | "Falling back to functioning (yet invalid -- WWPN) " | |
8039 | "defaults.\n"); | |
3a03eb79 AV |
8040 | |
8041 | /* | |
8042 | * Set default initialization control block. | |
8043 | */ | |
8044 | memset(nv, 0, ha->nvram_size); | |
ad950360 BVA |
8045 | nv->nvram_version = cpu_to_le16(ICB_VERSION); |
8046 | nv->version = cpu_to_le16(ICB_VERSION); | |
98aee70d | 8047 | nv->frame_payload_size = 2048; |
ad950360 BVA |
8048 | nv->execution_throttle = cpu_to_le16(0xFFFF); |
8049 | nv->exchange_count = cpu_to_le16(0); | |
3a03eb79 | 8050 | nv->port_name[0] = 0x21; |
f73cb695 | 8051 | nv->port_name[1] = 0x00 + ha->port_no + 1; |
3a03eb79 AV |
8052 | nv->port_name[2] = 0x00; |
8053 | nv->port_name[3] = 0xe0; | |
8054 | nv->port_name[4] = 0x8b; | |
8055 | nv->port_name[5] = 0x1c; | |
8056 | nv->port_name[6] = 0x55; | |
8057 | nv->port_name[7] = 0x86; | |
8058 | nv->node_name[0] = 0x20; | |
8059 | nv->node_name[1] = 0x00; | |
8060 | nv->node_name[2] = 0x00; | |
8061 | nv->node_name[3] = 0xe0; | |
8062 | nv->node_name[4] = 0x8b; | |
8063 | nv->node_name[5] = 0x1c; | |
8064 | nv->node_name[6] = 0x55; | |
8065 | nv->node_name[7] = 0x86; | |
ad950360 BVA |
8066 | nv->login_retry_count = cpu_to_le16(8); |
8067 | nv->interrupt_delay_timer = cpu_to_le16(0); | |
8068 | nv->login_timeout = cpu_to_le16(0); | |
3a03eb79 | 8069 | nv->firmware_options_1 = |
ad950360 BVA |
8070 | cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); |
8071 | nv->firmware_options_2 = cpu_to_le32(2 << 4); | |
8072 | nv->firmware_options_2 |= cpu_to_le32(BIT_12); | |
8073 | nv->firmware_options_3 = cpu_to_le32(2 << 13); | |
8074 | nv->host_p = cpu_to_le32(BIT_11|BIT_10); | |
8075 | nv->efi_parameters = cpu_to_le32(0); | |
3a03eb79 | 8076 | nv->reset_delay = 5; |
ad950360 BVA |
8077 | nv->max_luns_per_target = cpu_to_le16(128); |
8078 | nv->port_down_retry_count = cpu_to_le16(30); | |
8079 | nv->link_down_timeout = cpu_to_le16(180); | |
eeebcc92 | 8080 | nv->enode_mac[0] = 0x00; |
6246b8a1 GM |
8081 | nv->enode_mac[1] = 0xC0; |
8082 | nv->enode_mac[2] = 0xDD; | |
3a03eb79 AV |
8083 | nv->enode_mac[3] = 0x04; |
8084 | nv->enode_mac[4] = 0x05; | |
f73cb695 | 8085 | nv->enode_mac[5] = 0x06 + ha->port_no + 1; |
3a03eb79 AV |
8086 | |
8087 | rval = 1; | |
8088 | } | |
8089 | ||
9e522cd8 AE |
8090 | if (IS_T10_PI_CAPABLE(ha)) |
8091 | nv->frame_payload_size &= ~7; | |
8092 | ||
aa230bc5 AE |
8093 | qlt_81xx_config_nvram_stage1(vha, nv); |
8094 | ||
3a03eb79 | 8095 | /* Reset Initialization control block */ |
773120e4 | 8096 | memset(icb, 0, ha->init_cb_size); |
3a03eb79 AV |
8097 | |
8098 | /* Copy 1st segment. */ | |
8099 | dptr1 = (uint8_t *)icb; | |
8100 | dptr2 = (uint8_t *)&nv->version; | |
8101 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
8102 | while (cnt--) | |
8103 | *dptr1++ = *dptr2++; | |
8104 | ||
8105 | icb->login_retry_count = nv->login_retry_count; | |
8106 | ||
8107 | /* Copy 2nd segment. */ | |
8108 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
8109 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
8110 | cnt = (uint8_t *)&icb->reserved_5 - | |
8111 | (uint8_t *)&icb->interrupt_delay_timer; | |
8112 | while (cnt--) | |
8113 | *dptr1++ = *dptr2++; | |
8114 | ||
8115 | memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); | |
8116 | /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ | |
8117 | if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { | |
69e5f1ea AV |
8118 | icb->enode_mac[0] = 0x00; |
8119 | icb->enode_mac[1] = 0xC0; | |
8120 | icb->enode_mac[2] = 0xDD; | |
3a03eb79 AV |
8121 | icb->enode_mac[3] = 0x04; |
8122 | icb->enode_mac[4] = 0x05; | |
f73cb695 | 8123 | icb->enode_mac[5] = 0x06 + ha->port_no + 1; |
3a03eb79 AV |
8124 | } |
8125 | ||
b64b0e8f AV |
8126 | /* Use extended-initialization control block. */ |
8127 | memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); | |
0eaaca4c | 8128 | ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); |
3a03eb79 AV |
8129 | /* |
8130 | * Setup driver NVRAM options. | |
8131 | */ | |
8132 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), | |
a9083016 | 8133 | "QLE8XXX"); |
3a03eb79 | 8134 | |
aa230bc5 AE |
8135 | qlt_81xx_config_nvram_stage2(vha, icb); |
8136 | ||
3a03eb79 | 8137 | /* Use alternate WWN? */ |
ad950360 | 8138 | if (nv->host_p & cpu_to_le32(BIT_15)) { |
3a03eb79 AV |
8139 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); |
8140 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
8141 | } | |
8142 | ||
8143 | /* Prepare nodename */ | |
ad950360 | 8144 | if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { |
3a03eb79 AV |
8145 | /* |
8146 | * Firmware will apply the following mask if the nodename was | |
8147 | * not provided. | |
8148 | */ | |
8149 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
8150 | icb->node_name[0] &= 0xF0; | |
8151 | } | |
8152 | ||
8153 | /* Set host adapter parameters. */ | |
8154 | ha->flags.disable_risc_code_load = 0; | |
8155 | ha->flags.enable_lip_reset = 0; | |
8156 | ha->flags.enable_lip_full_login = | |
8157 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
8158 | ha->flags.enable_target_reset = | |
8159 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
8160 | ha->flags.enable_led_scheme = 0; | |
8161 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; | |
8162 | ||
8163 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & | |
8164 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
8165 | ||
8166 | /* save HBA serial number */ | |
8167 | ha->serial0 = icb->port_name[5]; | |
8168 | ha->serial1 = icb->port_name[6]; | |
8169 | ha->serial2 = icb->port_name[7]; | |
8170 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); | |
8171 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
8172 | ||
ad950360 | 8173 | icb->execution_throttle = cpu_to_le16(0xFFFF); |
3a03eb79 AV |
8174 | |
8175 | ha->retry_count = le16_to_cpu(nv->login_retry_count); | |
8176 | ||
8177 | /* Set minimum login_timeout to 4 seconds. */ | |
8178 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
8179 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
8180 | if (le16_to_cpu(nv->login_timeout) < 4) | |
ad950360 | 8181 | nv->login_timeout = cpu_to_le16(4); |
3a03eb79 | 8182 | ha->login_timeout = le16_to_cpu(nv->login_timeout); |
3a03eb79 AV |
8183 | |
8184 | /* Set minimum RATOV to 100 tenths of a second. */ | |
8185 | ha->r_a_tov = 100; | |
8186 | ||
8187 | ha->loop_reset_delay = nv->reset_delay; | |
8188 | ||
8189 | /* Link Down Timeout = 0: | |
8190 | * | |
7ec0effd | 8191 | * When Port Down timer expires we will start returning |
3a03eb79 AV |
8192 | * I/O's to OS with "DID_NO_CONNECT". |
8193 | * | |
8194 | * Link Down Timeout != 0: | |
8195 | * | |
8196 | * The driver waits for the link to come up after link down | |
8197 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
8198 | */ | |
8199 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
8200 | ha->loop_down_abort_time = | |
8201 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
8202 | } else { | |
8203 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
8204 | ha->loop_down_abort_time = | |
8205 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
8206 | } | |
8207 | ||
8208 | /* Need enough time to try and get the port back. */ | |
8209 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
8210 | if (qlport_down_retry) | |
8211 | ha->port_down_retry_count = qlport_down_retry; | |
8212 | ||
8213 | /* Set login_retry_count */ | |
8214 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
8215 | if (ha->port_down_retry_count == | |
8216 | le16_to_cpu(nv->port_down_retry_count) && | |
8217 | ha->port_down_retry_count > 3) | |
8218 | ha->login_retry_count = ha->port_down_retry_count; | |
8219 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
8220 | ha->login_retry_count = ha->port_down_retry_count; | |
8221 | if (ql2xloginretrycount) | |
8222 | ha->login_retry_count = ql2xloginretrycount; | |
8223 | ||
6246b8a1 | 8224 | /* if not running MSI-X we need handshaking on interrupts */ |
f73cb695 | 8225 | if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha))) |
ad950360 | 8226 | icb->firmware_options_2 |= cpu_to_le32(BIT_22); |
6246b8a1 | 8227 | |
3a03eb79 AV |
8228 | /* Enable ZIO. */ |
8229 | if (!vha->flags.init_done) { | |
8230 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & | |
8231 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
8232 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
8233 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
8234 | } | |
ad950360 | 8235 | icb->firmware_options_2 &= cpu_to_le32( |
3a03eb79 AV |
8236 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); |
8237 | vha->flags.process_response_queue = 0; | |
8238 | if (ha->zio_mode != QLA_ZIO_DISABLED) { | |
8239 | ha->zio_mode = QLA_ZIO_MODE_6; | |
8240 | ||
7c3df132 | 8241 | ql_log(ql_log_info, vha, 0x0075, |
3a03eb79 | 8242 | "ZIO mode %d enabled; timer delay (%d us).\n", |
7c3df132 SK |
8243 | ha->zio_mode, |
8244 | ha->zio_timer * 100); | |
3a03eb79 AV |
8245 | |
8246 | icb->firmware_options_2 |= cpu_to_le32( | |
8247 | (uint32_t)ha->zio_mode); | |
8248 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
8249 | vha->flags.process_response_queue = 1; | |
8250 | } | |
8251 | ||
41dc529a | 8252 | /* enable RIDA Format2 */ |
48acad09 | 8253 | icb->firmware_options_3 |= BIT_0; |
41dc529a | 8254 | |
8777e431 QT |
8255 | /* N2N: driver will initiate Login instead of FW */ |
8256 | icb->firmware_options_3 |= BIT_8; | |
41dc529a | 8257 | |
edd05de1 DG |
8258 | if (IS_QLA27XX(ha)) { |
8259 | icb->firmware_options_3 |= BIT_8; | |
8260 | ql_dbg(ql_log_info, vha, 0x0075, | |
8261 | "Enabling direct connection.\n"); | |
8262 | } | |
8263 | ||
3a03eb79 | 8264 | if (rval) { |
7c3df132 SK |
8265 | ql_log(ql_log_warn, vha, 0x0076, |
8266 | "NVRAM configuration failed.\n"); | |
3a03eb79 AV |
8267 | } |
8268 | return (rval); | |
8269 | } | |
8270 | ||
a9083016 GM |
8271 | int |
8272 | qla82xx_restart_isp(scsi_qla_host_t *vha) | |
8273 | { | |
8274 | int status, rval; | |
a9083016 | 8275 | struct qla_hw_data *ha = vha->hw; |
a9083016 | 8276 | struct scsi_qla_host *vp; |
feafb7b1 | 8277 | unsigned long flags; |
a9083016 GM |
8278 | |
8279 | status = qla2x00_init_rings(vha); | |
8280 | if (!status) { | |
8281 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
8282 | ha->flags.chip_reset_done = 1; | |
8283 | ||
8284 | status = qla2x00_fw_ready(vha); | |
8285 | if (!status) { | |
a9083016 | 8286 | /* Issue a marker after FW becomes ready. */ |
9eb9c6dc | 8287 | qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); |
a9083016 | 8288 | vha->flags.online = 1; |
7108b76e | 8289 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
a9083016 GM |
8290 | } |
8291 | ||
8292 | /* if no cable then assume it's good */ | |
8293 | if ((vha->device_flags & DFLG_NO_CABLE)) | |
8294 | status = 0; | |
a9083016 GM |
8295 | } |
8296 | ||
8297 | if (!status) { | |
8298 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
8299 | ||
8300 | if (!atomic_read(&vha->loop_down_timer)) { | |
8301 | /* | |
8302 | * Issue marker command only when we are going | |
8303 | * to start the I/O . | |
8304 | */ | |
8305 | vha->marker_needed = 1; | |
8306 | } | |
8307 | ||
a9083016 GM |
8308 | ha->isp_ops->enable_intrs(ha); |
8309 | ||
8310 | ha->isp_abort_cnt = 0; | |
8311 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
8312 | ||
53296788 | 8313 | /* Update the firmware version */ |
3173167f | 8314 | status = qla82xx_check_md_needed(vha); |
53296788 | 8315 | |
a9083016 GM |
8316 | if (ha->fce) { |
8317 | ha->flags.fce_enabled = 1; | |
8318 | memset(ha->fce, 0, | |
8319 | fce_calc_size(ha->fce_bufs)); | |
8320 | rval = qla2x00_enable_fce_trace(vha, | |
8321 | ha->fce_dma, ha->fce_bufs, ha->fce_mb, | |
8322 | &ha->fce_bufs); | |
8323 | if (rval) { | |
cfb0919c | 8324 | ql_log(ql_log_warn, vha, 0x8001, |
7c3df132 SK |
8325 | "Unable to reinitialize FCE (%d).\n", |
8326 | rval); | |
a9083016 GM |
8327 | ha->flags.fce_enabled = 0; |
8328 | } | |
8329 | } | |
8330 | ||
8331 | if (ha->eft) { | |
8332 | memset(ha->eft, 0, EFT_SIZE); | |
8333 | rval = qla2x00_enable_eft_trace(vha, | |
8334 | ha->eft_dma, EFT_NUM_BUFFERS); | |
8335 | if (rval) { | |
cfb0919c | 8336 | ql_log(ql_log_warn, vha, 0x8010, |
7c3df132 SK |
8337 | "Unable to reinitialize EFT (%d).\n", |
8338 | rval); | |
a9083016 GM |
8339 | } |
8340 | } | |
a9083016 GM |
8341 | } |
8342 | ||
8343 | if (!status) { | |
cfb0919c | 8344 | ql_dbg(ql_dbg_taskm, vha, 0x8011, |
7c3df132 | 8345 | "qla82xx_restart_isp succeeded.\n"); |
feafb7b1 AE |
8346 | |
8347 | spin_lock_irqsave(&ha->vport_slock, flags); | |
8348 | list_for_each_entry(vp, &ha->vp_list, list) { | |
8349 | if (vp->vp_idx) { | |
8350 | atomic_inc(&vp->vref_count); | |
8351 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
8352 | ||
a9083016 | 8353 | qla2x00_vp_abort_isp(vp); |
feafb7b1 AE |
8354 | |
8355 | spin_lock_irqsave(&ha->vport_slock, flags); | |
8356 | atomic_dec(&vp->vref_count); | |
8357 | } | |
a9083016 | 8358 | } |
feafb7b1 AE |
8359 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
8360 | ||
a9083016 | 8361 | } else { |
cfb0919c | 8362 | ql_log(ql_log_warn, vha, 0x8016, |
7c3df132 | 8363 | "qla82xx_restart_isp **** FAILED ****.\n"); |
a9083016 GM |
8364 | } |
8365 | ||
8366 | return status; | |
8367 | } | |
8368 | ||
3a03eb79 | 8369 | void |
ae97c91e | 8370 | qla81xx_update_fw_options(scsi_qla_host_t *vha) |
3a03eb79 | 8371 | { |
ae97c91e AV |
8372 | struct qla_hw_data *ha = vha->hw; |
8373 | ||
f198cafa HM |
8374 | /* Hold status IOCBs until ABTS response received. */ |
8375 | if (ql2xfwholdabts) | |
8376 | ha->fw_options[3] |= BIT_12; | |
8377 | ||
088d09d4 GM |
8378 | /* Set Retry FLOGI in case of P2P connection */ |
8379 | if (ha->operating_mode == P2P) { | |
8380 | ha->fw_options[2] |= BIT_3; | |
8381 | ql_dbg(ql_dbg_disc, vha, 0x2103, | |
8382 | "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", | |
8383 | __func__, ha->fw_options[2]); | |
8384 | } | |
8385 | ||
41dc529a QT |
8386 | /* Move PUREX, ABTS RX & RIDA to ATIOQ */ |
8387 | if (ql2xmvasynctoatio) { | |
8388 | if (qla_tgt_mode_enabled(vha) || | |
8389 | qla_dual_mode_enabled(vha)) | |
8390 | ha->fw_options[2] |= BIT_11; | |
8391 | else | |
8392 | ha->fw_options[2] &= ~BIT_11; | |
8393 | } | |
8394 | ||
f7e761f5 | 8395 | if (qla_tgt_mode_enabled(vha) || |
2da52737 QT |
8396 | qla_dual_mode_enabled(vha)) { |
8397 | /* FW auto send SCSI status during */ | |
8398 | ha->fw_options[1] |= BIT_8; | |
8399 | ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8; | |
8400 | ||
8401 | /* FW perform Exchange validation */ | |
f7e761f5 | 8402 | ha->fw_options[2] |= BIT_4; |
2da52737 QT |
8403 | } else { |
8404 | ha->fw_options[1] &= ~BIT_8; | |
8405 | ha->fw_options[10] &= 0x00ff; | |
8406 | ||
f7e761f5 | 8407 | ha->fw_options[2] &= ~BIT_4; |
2da52737 | 8408 | } |
f7e761f5 | 8409 | |
41dc529a QT |
8410 | if (ql2xetsenable) { |
8411 | /* Enable ETS Burst. */ | |
8412 | memset(ha->fw_options, 0, sizeof(ha->fw_options)); | |
8413 | ha->fw_options[2] |= BIT_9; | |
8414 | } | |
8415 | ||
83548fe2 QT |
8416 | ql_dbg(ql_dbg_init, vha, 0x00e9, |
8417 | "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", | |
8418 | __func__, ha->fw_options[1], ha->fw_options[2], | |
8419 | ha->fw_options[3], vha->host->active_mode); | |
ae97c91e | 8420 | |
ae97c91e | 8421 | qla2x00_set_fw_options(vha, ha->fw_options); |
3a03eb79 | 8422 | } |
09ff701a SR |
8423 | |
8424 | /* | |
8425 | * qla24xx_get_fcp_prio | |
8426 | * Gets the fcp cmd priority value for the logged in port. | |
8427 | * Looks for a match of the port descriptors within | |
8428 | * each of the fcp prio config entries. If a match is found, | |
8429 | * the tag (priority) value is returned. | |
8430 | * | |
8431 | * Input: | |
21090cbe | 8432 | * vha = scsi host structure pointer. |
09ff701a SR |
8433 | * fcport = port structure pointer. |
8434 | * | |
8435 | * Return: | |
6c452a45 | 8436 | * non-zero (if found) |
f28a0a96 | 8437 | * -1 (if not found) |
09ff701a SR |
8438 | * |
8439 | * Context: | |
8440 | * Kernel context | |
8441 | */ | |
f28a0a96 | 8442 | static int |
09ff701a SR |
8443 | qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) |
8444 | { | |
8445 | int i, entries; | |
8446 | uint8_t pid_match, wwn_match; | |
f28a0a96 | 8447 | int priority; |
09ff701a SR |
8448 | uint32_t pid1, pid2; |
8449 | uint64_t wwn1, wwn2; | |
8450 | struct qla_fcp_prio_entry *pri_entry; | |
8451 | struct qla_hw_data *ha = vha->hw; | |
8452 | ||
8453 | if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) | |
f28a0a96 | 8454 | return -1; |
09ff701a | 8455 | |
f28a0a96 | 8456 | priority = -1; |
09ff701a SR |
8457 | entries = ha->fcp_prio_cfg->num_entries; |
8458 | pri_entry = &ha->fcp_prio_cfg->entry[0]; | |
8459 | ||
8460 | for (i = 0; i < entries; i++) { | |
8461 | pid_match = wwn_match = 0; | |
8462 | ||
8463 | if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { | |
8464 | pri_entry++; | |
8465 | continue; | |
8466 | } | |
8467 | ||
8468 | /* check source pid for a match */ | |
8469 | if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { | |
8470 | pid1 = pri_entry->src_pid & INVALID_PORT_ID; | |
8471 | pid2 = vha->d_id.b24 & INVALID_PORT_ID; | |
8472 | if (pid1 == INVALID_PORT_ID) | |
8473 | pid_match++; | |
8474 | else if (pid1 == pid2) | |
8475 | pid_match++; | |
8476 | } | |
8477 | ||
8478 | /* check destination pid for a match */ | |
8479 | if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { | |
8480 | pid1 = pri_entry->dst_pid & INVALID_PORT_ID; | |
8481 | pid2 = fcport->d_id.b24 & INVALID_PORT_ID; | |
8482 | if (pid1 == INVALID_PORT_ID) | |
8483 | pid_match++; | |
8484 | else if (pid1 == pid2) | |
8485 | pid_match++; | |
8486 | } | |
8487 | ||
8488 | /* check source WWN for a match */ | |
8489 | if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { | |
8490 | wwn1 = wwn_to_u64(vha->port_name); | |
8491 | wwn2 = wwn_to_u64(pri_entry->src_wwpn); | |
8492 | if (wwn2 == (uint64_t)-1) | |
8493 | wwn_match++; | |
8494 | else if (wwn1 == wwn2) | |
8495 | wwn_match++; | |
8496 | } | |
8497 | ||
8498 | /* check destination WWN for a match */ | |
8499 | if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { | |
8500 | wwn1 = wwn_to_u64(fcport->port_name); | |
8501 | wwn2 = wwn_to_u64(pri_entry->dst_wwpn); | |
8502 | if (wwn2 == (uint64_t)-1) | |
8503 | wwn_match++; | |
8504 | else if (wwn1 == wwn2) | |
8505 | wwn_match++; | |
8506 | } | |
8507 | ||
8508 | if (pid_match == 2 || wwn_match == 2) { | |
8509 | /* Found a matching entry */ | |
8510 | if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) | |
8511 | priority = pri_entry->tag; | |
8512 | break; | |
8513 | } | |
8514 | ||
8515 | pri_entry++; | |
8516 | } | |
8517 | ||
8518 | return priority; | |
8519 | } | |
8520 | ||
8521 | /* | |
8522 | * qla24xx_update_fcport_fcp_prio | |
8523 | * Activates fcp priority for the logged in fc port | |
8524 | * | |
8525 | * Input: | |
21090cbe | 8526 | * vha = scsi host structure pointer. |
09ff701a SR |
8527 | * fcp = port structure pointer. |
8528 | * | |
8529 | * Return: | |
8530 | * QLA_SUCCESS or QLA_FUNCTION_FAILED | |
8531 | * | |
8532 | * Context: | |
8533 | * Kernel context. | |
8534 | */ | |
8535 | int | |
21090cbe | 8536 | qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) |
09ff701a SR |
8537 | { |
8538 | int ret; | |
f28a0a96 | 8539 | int priority; |
09ff701a SR |
8540 | uint16_t mb[5]; |
8541 | ||
21090cbe MI |
8542 | if (fcport->port_type != FCT_TARGET || |
8543 | fcport->loop_id == FC_NO_LOOP_ID) | |
09ff701a SR |
8544 | return QLA_FUNCTION_FAILED; |
8545 | ||
21090cbe | 8546 | priority = qla24xx_get_fcp_prio(vha, fcport); |
f28a0a96 AV |
8547 | if (priority < 0) |
8548 | return QLA_FUNCTION_FAILED; | |
8549 | ||
7ec0effd | 8550 | if (IS_P3P_TYPE(vha->hw)) { |
a00f6296 SK |
8551 | fcport->fcp_prio = priority & 0xf; |
8552 | return QLA_SUCCESS; | |
8553 | } | |
8554 | ||
21090cbe | 8555 | ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); |
cfb0919c CD |
8556 | if (ret == QLA_SUCCESS) { |
8557 | if (fcport->fcp_prio != priority) | |
8558 | ql_dbg(ql_dbg_user, vha, 0x709e, | |
8559 | "Updated FCP_CMND priority - value=%d loop_id=%d " | |
8560 | "port_id=%02x%02x%02x.\n", priority, | |
8561 | fcport->loop_id, fcport->d_id.b.domain, | |
8562 | fcport->d_id.b.area, fcport->d_id.b.al_pa); | |
a00f6296 | 8563 | fcport->fcp_prio = priority & 0xf; |
cfb0919c | 8564 | } else |
7c3df132 | 8565 | ql_dbg(ql_dbg_user, vha, 0x704f, |
cfb0919c CD |
8566 | "Unable to update FCP_CMND priority - ret=0x%x for " |
8567 | "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, | |
8568 | fcport->d_id.b.domain, fcport->d_id.b.area, | |
8569 | fcport->d_id.b.al_pa); | |
09ff701a SR |
8570 | return ret; |
8571 | } | |
8572 | ||
8573 | /* | |
8574 | * qla24xx_update_all_fcp_prio | |
8575 | * Activates fcp priority for all the logged in ports | |
8576 | * | |
8577 | * Input: | |
8578 | * ha = adapter block pointer. | |
8579 | * | |
8580 | * Return: | |
8581 | * QLA_SUCCESS or QLA_FUNCTION_FAILED | |
8582 | * | |
8583 | * Context: | |
8584 | * Kernel context. | |
8585 | */ | |
8586 | int | |
8587 | qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) | |
8588 | { | |
8589 | int ret; | |
8590 | fc_port_t *fcport; | |
8591 | ||
8592 | ret = QLA_FUNCTION_FAILED; | |
8593 | /* We need to set priority for all logged in ports */ | |
8594 | list_for_each_entry(fcport, &vha->vp_fcports, list) | |
8595 | ret = qla24xx_update_fcport_fcp_prio(vha, fcport); | |
8596 | ||
8597 | return ret; | |
8598 | } | |
d7459527 | 8599 | |
82de802a QT |
8600 | struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, |
8601 | int vp_idx, bool startqp) | |
d7459527 MH |
8602 | { |
8603 | int rsp_id = 0; | |
8604 | int req_id = 0; | |
8605 | int i; | |
8606 | struct qla_hw_data *ha = vha->hw; | |
8607 | uint16_t qpair_id = 0; | |
8608 | struct qla_qpair *qpair = NULL; | |
8609 | struct qla_msix_entry *msix; | |
8610 | ||
8611 | if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) { | |
8612 | ql_log(ql_log_warn, vha, 0x00181, | |
8613 | "FW/Driver is not multi-queue capable.\n"); | |
8614 | return NULL; | |
8615 | } | |
8616 | ||
c38d1baf | 8617 | if (ql2xmqsupport || ql2xnvmeenable) { |
d7459527 MH |
8618 | qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); |
8619 | if (qpair == NULL) { | |
8620 | ql_log(ql_log_warn, vha, 0x0182, | |
8621 | "Failed to allocate memory for queue pair.\n"); | |
8622 | return NULL; | |
8623 | } | |
8624 | memset(qpair, 0, sizeof(struct qla_qpair)); | |
8625 | ||
8626 | qpair->hw = vha->hw; | |
25ff6af1 | 8627 | qpair->vha = vha; |
82de802a QT |
8628 | qpair->qp_lock_ptr = &qpair->qp_lock; |
8629 | spin_lock_init(&qpair->qp_lock); | |
af7bb382 | 8630 | qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0; |
d7459527 MH |
8631 | |
8632 | /* Assign available que pair id */ | |
8633 | mutex_lock(&ha->mq_lock); | |
8634 | qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs); | |
b95b9452 | 8635 | if (ha->num_qpairs >= ha->max_qpairs) { |
d7459527 MH |
8636 | mutex_unlock(&ha->mq_lock); |
8637 | ql_log(ql_log_warn, vha, 0x0183, | |
8638 | "No resources to create additional q pair.\n"); | |
8639 | goto fail_qid_map; | |
8640 | } | |
b95b9452 | 8641 | ha->num_qpairs++; |
d7459527 MH |
8642 | set_bit(qpair_id, ha->qpair_qid_map); |
8643 | ha->queue_pair_map[qpair_id] = qpair; | |
8644 | qpair->id = qpair_id; | |
8645 | qpair->vp_idx = vp_idx; | |
e6373f33 | 8646 | qpair->fw_started = ha->flags.fw_started; |
e326d22a | 8647 | INIT_LIST_HEAD(&qpair->hints_list); |
7c3f8fd1 QT |
8648 | qpair->chip_reset = ha->base_qpair->chip_reset; |
8649 | qpair->enable_class_2 = ha->base_qpair->enable_class_2; | |
8650 | qpair->enable_explicit_conf = | |
8651 | ha->base_qpair->enable_explicit_conf; | |
d7459527 MH |
8652 | |
8653 | for (i = 0; i < ha->msix_count; i++) { | |
093df737 | 8654 | msix = &ha->msix_entries[i]; |
d7459527 MH |
8655 | if (msix->in_use) |
8656 | continue; | |
8657 | qpair->msix = msix; | |
83548fe2 | 8658 | ql_dbg(ql_dbg_multiq, vha, 0xc00f, |
d7459527 MH |
8659 | "Vector %x selected for qpair\n", msix->vector); |
8660 | break; | |
8661 | } | |
8662 | if (!qpair->msix) { | |
8663 | ql_log(ql_log_warn, vha, 0x0184, | |
8664 | "Out of MSI-X vectors!.\n"); | |
8665 | goto fail_msix; | |
8666 | } | |
8667 | ||
8668 | qpair->msix->in_use = 1; | |
8669 | list_add_tail(&qpair->qp_list_elem, &vha->qp_list); | |
8abfa9e2 QT |
8670 | qpair->pdev = ha->pdev; |
8671 | if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) | |
8672 | qpair->reqq_start_iocbs = qla_83xx_start_iocbs; | |
d7459527 MH |
8673 | |
8674 | mutex_unlock(&ha->mq_lock); | |
8675 | ||
8676 | /* Create response queue first */ | |
82de802a | 8677 | rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp); |
d7459527 MH |
8678 | if (!rsp_id) { |
8679 | ql_log(ql_log_warn, vha, 0x0185, | |
8680 | "Failed to create response queue.\n"); | |
8681 | goto fail_rsp; | |
8682 | } | |
8683 | ||
8684 | qpair->rsp = ha->rsp_q_map[rsp_id]; | |
8685 | ||
8686 | /* Create request queue */ | |
82de802a QT |
8687 | req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos, |
8688 | startqp); | |
d7459527 MH |
8689 | if (!req_id) { |
8690 | ql_log(ql_log_warn, vha, 0x0186, | |
8691 | "Failed to create request queue.\n"); | |
8692 | goto fail_req; | |
8693 | } | |
8694 | ||
8695 | qpair->req = ha->req_q_map[req_id]; | |
8696 | qpair->rsp->req = qpair->req; | |
82de802a | 8697 | qpair->rsp->qpair = qpair; |
e326d22a QT |
8698 | /* init qpair to this cpu. Will adjust at run time. */ |
8699 | qla_cpu_update(qpair, smp_processor_id()); | |
d7459527 MH |
8700 | |
8701 | if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { | |
8702 | if (ha->fw_attributes & BIT_4) | |
8703 | qpair->difdix_supported = 1; | |
8704 | } | |
8705 | ||
8706 | qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); | |
8707 | if (!qpair->srb_mempool) { | |
83548fe2 | 8708 | ql_log(ql_log_warn, vha, 0xd036, |
d7459527 MH |
8709 | "Failed to create srb mempool for qpair %d\n", |
8710 | qpair->id); | |
8711 | goto fail_mempool; | |
8712 | } | |
8713 | ||
8714 | /* Mark as online */ | |
8715 | qpair->online = 1; | |
8716 | ||
8717 | if (!vha->flags.qpairs_available) | |
8718 | vha->flags.qpairs_available = 1; | |
8719 | ||
8720 | ql_dbg(ql_dbg_multiq, vha, 0xc00d, | |
8721 | "Request/Response queue pair created, id %d\n", | |
8722 | qpair->id); | |
8723 | ql_dbg(ql_dbg_init, vha, 0x0187, | |
8724 | "Request/Response queue pair created, id %d\n", | |
8725 | qpair->id); | |
8726 | } | |
8727 | return qpair; | |
8728 | ||
8729 | fail_mempool: | |
8730 | fail_req: | |
8731 | qla25xx_delete_rsp_que(vha, qpair->rsp); | |
8732 | fail_rsp: | |
8733 | mutex_lock(&ha->mq_lock); | |
8734 | qpair->msix->in_use = 0; | |
8735 | list_del(&qpair->qp_list_elem); | |
8736 | if (list_empty(&vha->qp_list)) | |
8737 | vha->flags.qpairs_available = 0; | |
8738 | fail_msix: | |
8739 | ha->queue_pair_map[qpair_id] = NULL; | |
8740 | clear_bit(qpair_id, ha->qpair_qid_map); | |
b95b9452 | 8741 | ha->num_qpairs--; |
d7459527 MH |
8742 | mutex_unlock(&ha->mq_lock); |
8743 | fail_qid_map: | |
8744 | kfree(qpair); | |
8745 | return NULL; | |
8746 | } | |
8747 | ||
8748 | int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair) | |
8749 | { | |
d65237c7 | 8750 | int ret = QLA_FUNCTION_FAILED; |
d7459527 MH |
8751 | struct qla_hw_data *ha = qpair->hw; |
8752 | ||
8753 | qpair->delete_in_progress = 1; | |
8754 | while (atomic_read(&qpair->ref_count)) | |
8755 | msleep(500); | |
8756 | ||
8757 | ret = qla25xx_delete_req_que(vha, qpair->req); | |
8758 | if (ret != QLA_SUCCESS) | |
8759 | goto fail; | |
7867b98d | 8760 | |
d7459527 MH |
8761 | ret = qla25xx_delete_rsp_que(vha, qpair->rsp); |
8762 | if (ret != QLA_SUCCESS) | |
8763 | goto fail; | |
8764 | ||
8765 | mutex_lock(&ha->mq_lock); | |
8766 | ha->queue_pair_map[qpair->id] = NULL; | |
8767 | clear_bit(qpair->id, ha->qpair_qid_map); | |
b95b9452 | 8768 | ha->num_qpairs--; |
d7459527 | 8769 | list_del(&qpair->qp_list_elem); |
d65237c7 | 8770 | if (list_empty(&vha->qp_list)) { |
d7459527 | 8771 | vha->flags.qpairs_available = 0; |
d65237c7 SC |
8772 | vha->flags.qpairs_req_created = 0; |
8773 | vha->flags.qpairs_rsp_created = 0; | |
8774 | } | |
d7459527 MH |
8775 | mempool_destroy(qpair->srb_mempool); |
8776 | kfree(qpair); | |
8777 | mutex_unlock(&ha->mq_lock); | |
8778 | ||
8779 | return QLA_SUCCESS; | |
8780 | fail: | |
8781 | return ret; | |
8782 | } |