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1a59d1b8 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
89a36810 AR |
2 | /* |
3 | * pmcraid.c -- driver for PMC Sierra MaxRAID controller adapters | |
4 | * | |
729c8456 AR |
5 | * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com> |
6 | * PMC-Sierra Inc | |
89a36810 AR |
7 | * |
8 | * Copyright (C) 2008, 2009 PMC Sierra Inc | |
89a36810 AR |
9 | */ |
10 | #include <linux/fs.h> | |
11 | #include <linux/init.h> | |
12 | #include <linux/types.h> | |
13 | #include <linux/errno.h> | |
14 | #include <linux/kernel.h> | |
15 | #include <linux/ioport.h> | |
16 | #include <linux/delay.h> | |
17 | #include <linux/pci.h> | |
18 | #include <linux/wait.h> | |
19 | #include <linux/spinlock.h> | |
20 | #include <linux/sched.h> | |
21 | #include <linux/interrupt.h> | |
22 | #include <linux/blkdev.h> | |
23 | #include <linux/firmware.h> | |
24 | #include <linux/module.h> | |
25 | #include <linux/moduleparam.h> | |
26 | #include <linux/hdreg.h> | |
89a36810 | 27 | #include <linux/io.h> |
5a0e3ad6 | 28 | #include <linux/slab.h> |
89a36810 AR |
29 | #include <asm/irq.h> |
30 | #include <asm/processor.h> | |
31 | #include <linux/libata.h> | |
32 | #include <linux/mutex.h> | |
9c9bd593 | 33 | #include <linux/ktime.h> |
89a36810 AR |
34 | #include <scsi/scsi.h> |
35 | #include <scsi/scsi_host.h> | |
34876402 | 36 | #include <scsi/scsi_device.h> |
89a36810 AR |
37 | #include <scsi/scsi_tcq.h> |
38 | #include <scsi/scsi_eh.h> | |
39 | #include <scsi/scsi_cmnd.h> | |
40 | #include <scsi/scsicam.h> | |
41 | ||
42 | #include "pmcraid.h" | |
43 | ||
44 | /* | |
45 | * Module configuration parameters | |
46 | */ | |
47 | static unsigned int pmcraid_debug_log; | |
48 | static unsigned int pmcraid_disable_aen; | |
49 | static unsigned int pmcraid_log_level = IOASC_LOG_LEVEL_MUST; | |
5da61410 | 50 | static unsigned int pmcraid_enable_msix; |
89a36810 AR |
51 | |
52 | /* | |
53 | * Data structures to support multiple adapters by the LLD. | |
54 | * pmcraid_adapter_count - count of configured adapters | |
55 | */ | |
56 | static atomic_t pmcraid_adapter_count = ATOMIC_INIT(0); | |
57 | ||
58 | /* | |
59 | * Supporting user-level control interface through IOCTL commands. | |
60 | * pmcraid_major - major number to use | |
61 | * pmcraid_minor - minor number(s) to use | |
62 | */ | |
63 | static unsigned int pmcraid_major; | |
64 | static struct class *pmcraid_class; | |
144b139c | 65 | static DECLARE_BITMAP(pmcraid_minor, PMCRAID_MAX_ADAPTERS); |
89a36810 AR |
66 | |
67 | /* | |
68 | * Module parameters | |
69 | */ | |
729c8456 | 70 | MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>"); |
89a36810 AR |
71 | MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver"); |
72 | MODULE_LICENSE("GPL"); | |
73 | MODULE_VERSION(PMCRAID_DRIVER_VERSION); | |
74 | ||
75 | module_param_named(log_level, pmcraid_log_level, uint, (S_IRUGO | S_IWUSR)); | |
76 | MODULE_PARM_DESC(log_level, | |
77 | "Enables firmware error code logging, default :1 high-severity" | |
78 | " errors, 2: all errors including high-severity errors," | |
79 | " 0: disables logging"); | |
80 | ||
81 | module_param_named(debug, pmcraid_debug_log, uint, (S_IRUGO | S_IWUSR)); | |
82 | MODULE_PARM_DESC(debug, | |
83 | "Enable driver verbose message logging. Set 1 to enable." | |
84 | "(default: 0)"); | |
85 | ||
86 | module_param_named(disable_aen, pmcraid_disable_aen, uint, (S_IRUGO | S_IWUSR)); | |
87 | MODULE_PARM_DESC(disable_aen, | |
88 | "Disable driver aen notifications to apps. Set 1 to disable." | |
89 | "(default: 0)"); | |
90 | ||
91 | /* chip specific constants for PMC MaxRAID controllers (same for | |
92 | * 0x5220 and 0x8010 | |
93 | */ | |
94 | static struct pmcraid_chip_details pmcraid_chip_cfg[] = { | |
95 | { | |
96 | .ioastatus = 0x0, | |
97 | .ioarrin = 0x00040, | |
98 | .mailbox = 0x7FC30, | |
99 | .global_intr_mask = 0x00034, | |
100 | .ioa_host_intr = 0x0009C, | |
101 | .ioa_host_intr_clr = 0x000A0, | |
c20c4267 | 102 | .ioa_host_msix_intr = 0x7FC40, |
89a36810 AR |
103 | .ioa_host_mask = 0x7FC28, |
104 | .ioa_host_mask_clr = 0x7FC28, | |
105 | .host_ioa_intr = 0x00020, | |
106 | .host_ioa_intr_clr = 0x00020, | |
107 | .transop_timeout = 300 | |
108 | } | |
109 | }; | |
110 | ||
111 | /* | |
112 | * PCI device ids supported by pmcraid driver | |
113 | */ | |
6f039790 | 114 | static struct pci_device_id pmcraid_pci_table[] = { |
89a36810 AR |
115 | { PCI_DEVICE(PCI_VENDOR_ID_PMC, PCI_DEVICE_ID_PMC_MAXRAID), |
116 | 0, 0, (kernel_ulong_t)&pmcraid_chip_cfg[0] | |
117 | }, | |
118 | {} | |
119 | }; | |
120 | ||
121 | MODULE_DEVICE_TABLE(pci, pmcraid_pci_table); | |
122 | ||
123 | ||
124 | ||
125 | /** | |
126 | * pmcraid_slave_alloc - Prepare for commands to a device | |
127 | * @scsi_dev: scsi device struct | |
128 | * | |
129 | * This function is called by mid-layer prior to sending any command to the new | |
130 | * device. Stores resource entry details of the device in scsi_device struct. | |
131 | * Queuecommand uses the resource handle and other details to fill up IOARCB | |
132 | * while sending commands to the device. | |
133 | * | |
134 | * Return value: | |
135 | * 0 on success / -ENXIO if device does not exist | |
136 | */ | |
137 | static int pmcraid_slave_alloc(struct scsi_device *scsi_dev) | |
138 | { | |
139 | struct pmcraid_resource_entry *temp, *res = NULL; | |
140 | struct pmcraid_instance *pinstance; | |
141 | u8 target, bus, lun; | |
142 | unsigned long lock_flags; | |
143 | int rc = -ENXIO; | |
c20c4267 AR |
144 | u16 fw_version; |
145 | ||
89a36810 AR |
146 | pinstance = shost_priv(scsi_dev->host); |
147 | ||
c20c4267 AR |
148 | fw_version = be16_to_cpu(pinstance->inq_data->fw_version); |
149 | ||
89a36810 AR |
150 | /* Driver exposes VSET and GSCSI resources only; all other device types |
151 | * are not exposed. Resource list is synchronized using resource lock | |
152 | * so any traversal or modifications to the list should be done inside | |
153 | * this lock | |
154 | */ | |
155 | spin_lock_irqsave(&pinstance->resource_lock, lock_flags); | |
156 | list_for_each_entry(temp, &pinstance->used_res_q, queue) { | |
157 | ||
729c8456 | 158 | /* do not expose VSETs with order-ids > MAX_VSET_TARGETS */ |
89a36810 | 159 | if (RES_IS_VSET(temp->cfg_entry)) { |
c20c4267 AR |
160 | if (fw_version <= PMCRAID_FW_VERSION_1) |
161 | target = temp->cfg_entry.unique_flags1; | |
162 | else | |
45c80be6 | 163 | target = le16_to_cpu(temp->cfg_entry.array_id) & 0xFF; |
c20c4267 | 164 | |
729c8456 | 165 | if (target > PMCRAID_MAX_VSET_TARGETS) |
89a36810 AR |
166 | continue; |
167 | bus = PMCRAID_VSET_BUS_ID; | |
168 | lun = 0; | |
169 | } else if (RES_IS_GSCSI(temp->cfg_entry)) { | |
170 | target = RES_TARGET(temp->cfg_entry.resource_address); | |
171 | bus = PMCRAID_PHYS_BUS_ID; | |
172 | lun = RES_LUN(temp->cfg_entry.resource_address); | |
173 | } else { | |
174 | continue; | |
175 | } | |
176 | ||
177 | if (bus == scsi_dev->channel && | |
178 | target == scsi_dev->id && | |
179 | lun == scsi_dev->lun) { | |
180 | res = temp; | |
181 | break; | |
182 | } | |
183 | } | |
184 | ||
185 | if (res) { | |
186 | res->scsi_dev = scsi_dev; | |
187 | scsi_dev->hostdata = res; | |
188 | res->change_detected = 0; | |
189 | atomic_set(&res->read_failures, 0); | |
190 | atomic_set(&res->write_failures, 0); | |
191 | rc = 0; | |
192 | } | |
193 | spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags); | |
194 | return rc; | |
195 | } | |
196 | ||
197 | /** | |
198 | * pmcraid_slave_configure - Configures a SCSI device | |
199 | * @scsi_dev: scsi device struct | |
200 | * | |
25985edc | 201 | * This function is executed by SCSI mid layer just after a device is first |
89a36810 AR |
202 | * scanned (i.e. it has responded to an INQUIRY). For VSET resources, the |
203 | * timeout value (default 30s) will be over-written to a higher value (60s) | |
204 | * and max_sectors value will be over-written to 512. It also sets queue depth | |
205 | * to host->cmd_per_lun value | |
206 | * | |
207 | * Return value: | |
208 | * 0 on success | |
209 | */ | |
210 | static int pmcraid_slave_configure(struct scsi_device *scsi_dev) | |
211 | { | |
212 | struct pmcraid_resource_entry *res = scsi_dev->hostdata; | |
213 | ||
214 | if (!res) | |
215 | return 0; | |
216 | ||
217 | /* LLD exposes VSETs and Enclosure devices only */ | |
218 | if (RES_IS_GSCSI(res->cfg_entry) && | |
219 | scsi_dev->type != TYPE_ENCLOSURE) | |
220 | return -ENXIO; | |
221 | ||
222 | pmcraid_info("configuring %x:%x:%x:%x\n", | |
223 | scsi_dev->host->unique_id, | |
224 | scsi_dev->channel, | |
225 | scsi_dev->id, | |
9cb78c16 | 226 | (u8)scsi_dev->lun); |
89a36810 AR |
227 | |
228 | if (RES_IS_GSCSI(res->cfg_entry)) { | |
229 | scsi_dev->allow_restart = 1; | |
230 | } else if (RES_IS_VSET(res->cfg_entry)) { | |
231 | scsi_dev->allow_restart = 1; | |
232 | blk_queue_rq_timeout(scsi_dev->request_queue, | |
233 | PMCRAID_VSET_IO_TIMEOUT); | |
086fa5ff | 234 | blk_queue_max_hw_sectors(scsi_dev->request_queue, |
89a36810 AR |
235 | PMCRAID_VSET_MAX_SECTORS); |
236 | } | |
237 | ||
c8b09f6f CH |
238 | /* |
239 | * We never want to report TCQ support for these types of devices. | |
240 | */ | |
241 | if (!RES_IS_GSCSI(res->cfg_entry) && !RES_IS_VSET(res->cfg_entry)) | |
242 | scsi_dev->tagged_supported = 0; | |
89a36810 AR |
243 | |
244 | return 0; | |
245 | } | |
246 | ||
247 | /** | |
248 | * pmcraid_slave_destroy - Unconfigure a SCSI device before removing it | |
249 | * | |
250 | * @scsi_dev: scsi device struct | |
251 | * | |
252 | * This is called by mid-layer before removing a device. Pointer assignments | |
253 | * done in pmcraid_slave_alloc will be reset to NULL here. | |
254 | * | |
255 | * Return value | |
256 | * none | |
257 | */ | |
258 | static void pmcraid_slave_destroy(struct scsi_device *scsi_dev) | |
259 | { | |
260 | struct pmcraid_resource_entry *res; | |
261 | ||
262 | res = (struct pmcraid_resource_entry *)scsi_dev->hostdata; | |
263 | ||
264 | if (res) | |
265 | res->scsi_dev = NULL; | |
266 | ||
267 | scsi_dev->hostdata = NULL; | |
268 | } | |
269 | ||
270 | /** | |
271 | * pmcraid_change_queue_depth - Change the device's queue depth | |
272 | * @scsi_dev: scsi device struct | |
273 | * @depth: depth to set | |
274 | * | |
275 | * Return value | |
c20c4267 | 276 | * actual depth set |
89a36810 | 277 | */ |
db5ed4df | 278 | static int pmcraid_change_queue_depth(struct scsi_device *scsi_dev, int depth) |
89a36810 AR |
279 | { |
280 | if (depth > PMCRAID_MAX_CMD_PER_LUN) | |
281 | depth = PMCRAID_MAX_CMD_PER_LUN; | |
db5ed4df | 282 | return scsi_change_queue_depth(scsi_dev, depth); |
89a36810 AR |
283 | } |
284 | ||
89a36810 AR |
285 | /** |
286 | * pmcraid_init_cmdblk - initializes a command block | |
287 | * | |
288 | * @cmd: pointer to struct pmcraid_cmd to be initialized | |
289 | * @index: if >=0 first time initialization; otherwise reinitialization | |
290 | * | |
291 | * Return Value | |
292 | * None | |
293 | */ | |
61b96d5b | 294 | static void pmcraid_init_cmdblk(struct pmcraid_cmd *cmd, int index) |
89a36810 AR |
295 | { |
296 | struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb); | |
297 | dma_addr_t dma_addr = cmd->ioa_cb_bus_addr; | |
298 | ||
299 | if (index >= 0) { | |
300 | /* first time initialization (called from probe) */ | |
301 | u32 ioasa_offset = | |
302 | offsetof(struct pmcraid_control_block, ioasa); | |
303 | ||
304 | cmd->index = index; | |
305 | ioarcb->response_handle = cpu_to_le32(index << 2); | |
306 | ioarcb->ioarcb_bus_addr = cpu_to_le64(dma_addr); | |
307 | ioarcb->ioasa_bus_addr = cpu_to_le64(dma_addr + ioasa_offset); | |
308 | ioarcb->ioasa_len = cpu_to_le16(sizeof(struct pmcraid_ioasa)); | |
309 | } else { | |
310 | /* re-initialization of various lengths, called once command is | |
311 | * processed by IOA | |
312 | */ | |
313 | memset(&cmd->ioa_cb->ioarcb.cdb, 0, PMCRAID_MAX_CDB_LEN); | |
c20c4267 | 314 | ioarcb->hrrq_id = 0; |
89a36810 AR |
315 | ioarcb->request_flags0 = 0; |
316 | ioarcb->request_flags1 = 0; | |
317 | ioarcb->cmd_timeout = 0; | |
45c80be6 | 318 | ioarcb->ioarcb_bus_addr &= cpu_to_le64(~0x1FULL); |
89a36810 AR |
319 | ioarcb->ioadl_bus_addr = 0; |
320 | ioarcb->ioadl_length = 0; | |
321 | ioarcb->data_transfer_length = 0; | |
322 | ioarcb->add_cmd_param_length = 0; | |
323 | ioarcb->add_cmd_param_offset = 0; | |
324 | cmd->ioa_cb->ioasa.ioasc = 0; | |
325 | cmd->ioa_cb->ioasa.residual_data_length = 0; | |
c20c4267 | 326 | cmd->time_left = 0; |
89a36810 AR |
327 | } |
328 | ||
329 | cmd->cmd_done = NULL; | |
330 | cmd->scsi_cmd = NULL; | |
331 | cmd->release = 0; | |
332 | cmd->completion_req = 0; | |
144b139c | 333 | cmd->sense_buffer = NULL; |
c20c4267 | 334 | cmd->sense_buffer_dma = 0; |
89a36810 | 335 | cmd->dma_handle = 0; |
242b5657 | 336 | timer_setup(&cmd->timer, NULL, 0); |
89a36810 AR |
337 | } |
338 | ||
339 | /** | |
340 | * pmcraid_reinit_cmdblk - reinitialize a command block | |
341 | * | |
342 | * @cmd: pointer to struct pmcraid_cmd to be reinitialized | |
343 | * | |
344 | * Return Value | |
345 | * None | |
346 | */ | |
347 | static void pmcraid_reinit_cmdblk(struct pmcraid_cmd *cmd) | |
348 | { | |
349 | pmcraid_init_cmdblk(cmd, -1); | |
350 | } | |
351 | ||
352 | /** | |
353 | * pmcraid_get_free_cmd - get a free cmd block from command block pool | |
354 | * @pinstance: adapter instance structure | |
355 | * | |
356 | * Return Value: | |
357 | * returns pointer to cmd block or NULL if no blocks are available | |
358 | */ | |
359 | static struct pmcraid_cmd *pmcraid_get_free_cmd( | |
360 | struct pmcraid_instance *pinstance | |
361 | ) | |
362 | { | |
363 | struct pmcraid_cmd *cmd = NULL; | |
364 | unsigned long lock_flags; | |
365 | ||
366 | /* free cmd block list is protected by free_pool_lock */ | |
367 | spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags); | |
368 | ||
369 | if (!list_empty(&pinstance->free_cmd_pool)) { | |
370 | cmd = list_entry(pinstance->free_cmd_pool.next, | |
371 | struct pmcraid_cmd, free_list); | |
372 | list_del(&cmd->free_list); | |
373 | } | |
374 | spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags); | |
375 | ||
376 | /* Initialize the command block before giving it the caller */ | |
377 | if (cmd != NULL) | |
378 | pmcraid_reinit_cmdblk(cmd); | |
379 | return cmd; | |
380 | } | |
381 | ||
382 | /** | |
383 | * pmcraid_return_cmd - return a completed command block back into free pool | |
384 | * @cmd: pointer to the command block | |
385 | * | |
386 | * Return Value: | |
387 | * nothing | |
388 | */ | |
61b96d5b | 389 | static void pmcraid_return_cmd(struct pmcraid_cmd *cmd) |
89a36810 AR |
390 | { |
391 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
392 | unsigned long lock_flags; | |
393 | ||
394 | spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags); | |
395 | list_add_tail(&cmd->free_list, &pinstance->free_cmd_pool); | |
396 | spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags); | |
397 | } | |
398 | ||
399 | /** | |
400 | * pmcraid_read_interrupts - reads IOA interrupts | |
401 | * | |
402 | * @pinstance: pointer to adapter instance structure | |
403 | * | |
404 | * Return value | |
405 | * interrupts read from IOA | |
406 | */ | |
407 | static u32 pmcraid_read_interrupts(struct pmcraid_instance *pinstance) | |
408 | { | |
c20c4267 AR |
409 | return (pinstance->interrupt_mode) ? |
410 | ioread32(pinstance->int_regs.ioa_host_msix_interrupt_reg) : | |
411 | ioread32(pinstance->int_regs.ioa_host_interrupt_reg); | |
89a36810 AR |
412 | } |
413 | ||
414 | /** | |
415 | * pmcraid_disable_interrupts - Masks and clears all specified interrupts | |
416 | * | |
417 | * @pinstance: pointer to per adapter instance structure | |
418 | * @intrs: interrupts to disable | |
419 | * | |
420 | * Return Value | |
421 | * None | |
422 | */ | |
423 | static void pmcraid_disable_interrupts( | |
424 | struct pmcraid_instance *pinstance, | |
425 | u32 intrs | |
426 | ) | |
427 | { | |
428 | u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg); | |
429 | u32 nmask = gmask | GLOBAL_INTERRUPT_MASK; | |
430 | ||
89a36810 | 431 | iowrite32(intrs, pinstance->int_regs.ioa_host_interrupt_clr_reg); |
c20c4267 AR |
432 | iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg); |
433 | ioread32(pinstance->int_regs.global_interrupt_mask_reg); | |
434 | ||
435 | if (!pinstance->interrupt_mode) { | |
436 | iowrite32(intrs, | |
437 | pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
438 | ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
439 | } | |
89a36810 AR |
440 | } |
441 | ||
442 | /** | |
443 | * pmcraid_enable_interrupts - Enables specified interrupts | |
444 | * | |
445 | * @pinstance: pointer to per adapter instance structure | |
3673b7b0 | 446 | * @intrs: interrupts to enable |
89a36810 AR |
447 | * |
448 | * Return Value | |
449 | * None | |
450 | */ | |
451 | static void pmcraid_enable_interrupts( | |
452 | struct pmcraid_instance *pinstance, | |
3673b7b0 | 453 | u32 intrs) |
89a36810 AR |
454 | { |
455 | u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg); | |
456 | u32 nmask = gmask & (~GLOBAL_INTERRUPT_MASK); | |
457 | ||
458 | iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg); | |
c20c4267 AR |
459 | |
460 | if (!pinstance->interrupt_mode) { | |
461 | iowrite32(~intrs, | |
462 | pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
463 | ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
464 | } | |
89a36810 AR |
465 | |
466 | pmcraid_info("enabled interrupts global mask = %x intr_mask = %x\n", | |
467 | ioread32(pinstance->int_regs.global_interrupt_mask_reg), | |
468 | ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg)); | |
469 | } | |
470 | ||
c20c4267 AR |
471 | /** |
472 | * pmcraid_clr_trans_op - clear trans to op interrupt | |
473 | * | |
474 | * @pinstance: pointer to per adapter instance structure | |
475 | * | |
476 | * Return Value | |
477 | * None | |
478 | */ | |
479 | static void pmcraid_clr_trans_op( | |
480 | struct pmcraid_instance *pinstance | |
481 | ) | |
482 | { | |
483 | unsigned long lock_flags; | |
484 | ||
485 | if (!pinstance->interrupt_mode) { | |
486 | iowrite32(INTRS_TRANSITION_TO_OPERATIONAL, | |
487 | pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
488 | ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
489 | iowrite32(INTRS_TRANSITION_TO_OPERATIONAL, | |
490 | pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
491 | ioread32(pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
492 | } | |
493 | ||
494 | if (pinstance->reset_cmd != NULL) { | |
495 | del_timer(&pinstance->reset_cmd->timer); | |
496 | spin_lock_irqsave( | |
497 | pinstance->host->host_lock, lock_flags); | |
498 | pinstance->reset_cmd->cmd_done(pinstance->reset_cmd); | |
499 | spin_unlock_irqrestore( | |
500 | pinstance->host->host_lock, lock_flags); | |
501 | } | |
502 | } | |
503 | ||
89a36810 AR |
504 | /** |
505 | * pmcraid_reset_type - Determine the required reset type | |
506 | * @pinstance: pointer to adapter instance structure | |
507 | * | |
508 | * IOA requires hard reset if any of the following conditions is true. | |
509 | * 1. If HRRQ valid interrupt is not masked | |
510 | * 2. IOA reset alert doorbell is set | |
511 | * 3. If there are any error interrupts | |
512 | */ | |
513 | static void pmcraid_reset_type(struct pmcraid_instance *pinstance) | |
514 | { | |
515 | u32 mask; | |
516 | u32 intrs; | |
517 | u32 alerts; | |
518 | ||
519 | mask = ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
520 | intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg); | |
521 | alerts = ioread32(pinstance->int_regs.host_ioa_interrupt_reg); | |
522 | ||
523 | if ((mask & INTRS_HRRQ_VALID) == 0 || | |
524 | (alerts & DOORBELL_IOA_RESET_ALERT) || | |
525 | (intrs & PMCRAID_ERROR_INTERRUPTS)) { | |
526 | pmcraid_info("IOA requires hard reset\n"); | |
527 | pinstance->ioa_hard_reset = 1; | |
528 | } | |
529 | ||
530 | /* If unit check is active, trigger the dump */ | |
531 | if (intrs & INTRS_IOA_UNIT_CHECK) | |
532 | pinstance->ioa_unit_check = 1; | |
533 | } | |
534 | ||
3673b7b0 | 535 | static void pmcraid_ioa_reset(struct pmcraid_cmd *); |
89a36810 AR |
536 | /** |
537 | * pmcraid_bist_done - completion function for PCI BIST | |
3673b7b0 | 538 | * @t: pointer to reset command |
89a36810 | 539 | * Return Value |
c20c4267 | 540 | * none |
89a36810 | 541 | */ |
242b5657 | 542 | static void pmcraid_bist_done(struct timer_list *t) |
89a36810 | 543 | { |
242b5657 | 544 | struct pmcraid_cmd *cmd = from_timer(cmd, t, timer); |
89a36810 AR |
545 | struct pmcraid_instance *pinstance = cmd->drv_inst; |
546 | unsigned long lock_flags; | |
547 | int rc; | |
548 | u16 pci_reg; | |
549 | ||
550 | rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg); | |
551 | ||
552 | /* If PCI config space can't be accessed wait for another two secs */ | |
553 | if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) && | |
c20c4267 | 554 | cmd->time_left > 0) { |
89a36810 | 555 | pmcraid_info("BIST not complete, waiting another 2 secs\n"); |
c20c4267 AR |
556 | cmd->timer.expires = jiffies + cmd->time_left; |
557 | cmd->time_left = 0; | |
89a36810 AR |
558 | add_timer(&cmd->timer); |
559 | } else { | |
c20c4267 | 560 | cmd->time_left = 0; |
89a36810 AR |
561 | pmcraid_info("BIST is complete, proceeding with reset\n"); |
562 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
563 | pmcraid_ioa_reset(cmd); | |
564 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
565 | } | |
566 | } | |
567 | ||
568 | /** | |
569 | * pmcraid_start_bist - starts BIST | |
570 | * @cmd: pointer to reset cmd | |
571 | * Return Value | |
572 | * none | |
573 | */ | |
574 | static void pmcraid_start_bist(struct pmcraid_cmd *cmd) | |
575 | { | |
576 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
577 | u32 doorbells, intrs; | |
578 | ||
579 | /* proceed with bist and wait for 2 seconds */ | |
580 | iowrite32(DOORBELL_IOA_START_BIST, | |
581 | pinstance->int_regs.host_ioa_interrupt_reg); | |
582 | doorbells = ioread32(pinstance->int_regs.host_ioa_interrupt_reg); | |
583 | intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg); | |
c20c4267 | 584 | pmcraid_info("doorbells after start bist: %x intrs: %x\n", |
89a36810 AR |
585 | doorbells, intrs); |
586 | ||
c20c4267 | 587 | cmd->time_left = msecs_to_jiffies(PMCRAID_BIST_TIMEOUT); |
89a36810 | 588 | cmd->timer.expires = jiffies + msecs_to_jiffies(PMCRAID_BIST_TIMEOUT); |
841b86f3 | 589 | cmd->timer.function = pmcraid_bist_done; |
89a36810 AR |
590 | add_timer(&cmd->timer); |
591 | } | |
592 | ||
593 | /** | |
594 | * pmcraid_reset_alert_done - completion routine for reset_alert | |
3673b7b0 | 595 | * @t: pointer to command block used in reset sequence |
89a36810 AR |
596 | * Return value |
597 | * None | |
598 | */ | |
242b5657 | 599 | static void pmcraid_reset_alert_done(struct timer_list *t) |
89a36810 | 600 | { |
242b5657 | 601 | struct pmcraid_cmd *cmd = from_timer(cmd, t, timer); |
89a36810 AR |
602 | struct pmcraid_instance *pinstance = cmd->drv_inst; |
603 | u32 status = ioread32(pinstance->ioa_status); | |
604 | unsigned long lock_flags; | |
605 | ||
606 | /* if the critical operation in progress bit is set or the wait times | |
607 | * out, invoke reset engine to proceed with hard reset. If there is | |
608 | * some more time to wait, restart the timer | |
609 | */ | |
610 | if (((status & INTRS_CRITICAL_OP_IN_PROGRESS) == 0) || | |
c20c4267 | 611 | cmd->time_left <= 0) { |
89a36810 AR |
612 | pmcraid_info("critical op is reset proceeding with reset\n"); |
613 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
614 | pmcraid_ioa_reset(cmd); | |
615 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
616 | } else { | |
617 | pmcraid_info("critical op is not yet reset waiting again\n"); | |
618 | /* restart timer if some more time is available to wait */ | |
c20c4267 | 619 | cmd->time_left -= PMCRAID_CHECK_FOR_RESET_TIMEOUT; |
89a36810 | 620 | cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT; |
841b86f3 | 621 | cmd->timer.function = pmcraid_reset_alert_done; |
89a36810 AR |
622 | add_timer(&cmd->timer); |
623 | } | |
624 | } | |
625 | ||
3673b7b0 | 626 | static void pmcraid_notify_ioastate(struct pmcraid_instance *, u32); |
89a36810 AR |
627 | /** |
628 | * pmcraid_reset_alert - alerts IOA for a possible reset | |
3673b7b0 | 629 | * @cmd: command block to be used for reset sequence. |
89a36810 AR |
630 | * |
631 | * Return Value | |
632 | * returns 0 if pci config-space is accessible and RESET_DOORBELL is | |
633 | * successfully written to IOA. Returns non-zero in case pci_config_space | |
634 | * is not accessible | |
635 | */ | |
636 | static void pmcraid_reset_alert(struct pmcraid_cmd *cmd) | |
637 | { | |
638 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
639 | u32 doorbells; | |
640 | int rc; | |
641 | u16 pci_reg; | |
642 | ||
643 | /* If we are able to access IOA PCI config space, alert IOA that we are | |
644 | * going to reset it soon. This enables IOA to preserv persistent error | |
645 | * data if any. In case memory space is not accessible, proceed with | |
646 | * BIST or slot_reset | |
647 | */ | |
648 | rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg); | |
649 | if ((rc == PCIBIOS_SUCCESSFUL) && (pci_reg & PCI_COMMAND_MEMORY)) { | |
650 | ||
651 | /* wait for IOA permission i.e until CRITICAL_OPERATION bit is | |
652 | * reset IOA doesn't generate any interrupts when CRITICAL | |
653 | * OPERATION bit is reset. A timer is started to wait for this | |
654 | * bit to be reset. | |
655 | */ | |
c20c4267 | 656 | cmd->time_left = PMCRAID_RESET_TIMEOUT; |
89a36810 | 657 | cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT; |
841b86f3 | 658 | cmd->timer.function = pmcraid_reset_alert_done; |
89a36810 AR |
659 | add_timer(&cmd->timer); |
660 | ||
661 | iowrite32(DOORBELL_IOA_RESET_ALERT, | |
662 | pinstance->int_regs.host_ioa_interrupt_reg); | |
663 | doorbells = | |
664 | ioread32(pinstance->int_regs.host_ioa_interrupt_reg); | |
665 | pmcraid_info("doorbells after reset alert: %x\n", doorbells); | |
666 | } else { | |
667 | pmcraid_info("PCI config is not accessible starting BIST\n"); | |
668 | pinstance->ioa_state = IOA_STATE_IN_HARD_RESET; | |
669 | pmcraid_start_bist(cmd); | |
670 | } | |
671 | } | |
672 | ||
673 | /** | |
674 | * pmcraid_timeout_handler - Timeout handler for internally generated ops | |
675 | * | |
3673b7b0 | 676 | * @t: pointer to command structure, that got timedout |
89a36810 AR |
677 | * |
678 | * This function blocks host requests and initiates an adapter reset. | |
679 | * | |
680 | * Return value: | |
681 | * None | |
682 | */ | |
242b5657 | 683 | static void pmcraid_timeout_handler(struct timer_list *t) |
89a36810 | 684 | { |
242b5657 | 685 | struct pmcraid_cmd *cmd = from_timer(cmd, t, timer); |
89a36810 AR |
686 | struct pmcraid_instance *pinstance = cmd->drv_inst; |
687 | unsigned long lock_flags; | |
688 | ||
34876402 | 689 | dev_info(&pinstance->pdev->dev, |
c20c4267 AR |
690 | "Adapter being reset due to cmd(CDB[0] = %x) timeout\n", |
691 | cmd->ioa_cb->ioarcb.cdb[0]); | |
89a36810 AR |
692 | |
693 | /* Command timeouts result in hard reset sequence. The command that got | |
694 | * timed out may be the one used as part of reset sequence. In this | |
695 | * case restart reset sequence using the same command block even if | |
696 | * reset is in progress. Otherwise fail this command and get a free | |
697 | * command block to restart the reset sequence. | |
698 | */ | |
699 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
700 | if (!pinstance->ioa_reset_in_progress) { | |
701 | pinstance->ioa_reset_attempts = 0; | |
702 | cmd = pmcraid_get_free_cmd(pinstance); | |
703 | ||
704 | /* If we are out of command blocks, just return here itself. | |
705 | * Some other command's timeout handler can do the reset job | |
706 | */ | |
707 | if (cmd == NULL) { | |
708 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
709 | lock_flags); | |
710 | pmcraid_err("no free cmnd block for timeout handler\n"); | |
711 | return; | |
712 | } | |
713 | ||
714 | pinstance->reset_cmd = cmd; | |
715 | pinstance->ioa_reset_in_progress = 1; | |
716 | } else { | |
717 | pmcraid_info("reset is already in progress\n"); | |
718 | ||
719 | if (pinstance->reset_cmd != cmd) { | |
720 | /* This command should have been given to IOA, this | |
721 | * command will be completed by fail_outstanding_cmds | |
722 | * anyway | |
723 | */ | |
724 | pmcraid_err("cmd is pending but reset in progress\n"); | |
725 | } | |
726 | ||
727 | /* If this command was being used as part of the reset | |
728 | * sequence, set cmd_done pointer to pmcraid_ioa_reset. This | |
729 | * causes fail_outstanding_commands not to return the command | |
730 | * block back to free pool | |
731 | */ | |
732 | if (cmd == pinstance->reset_cmd) | |
733 | cmd->cmd_done = pmcraid_ioa_reset; | |
89a36810 AR |
734 | } |
735 | ||
c20c4267 AR |
736 | /* Notify apps of important IOA bringup/bringdown sequences */ |
737 | if (pinstance->scn.ioa_state != PMC_DEVICE_EVENT_RESET_START && | |
738 | pinstance->scn.ioa_state != PMC_DEVICE_EVENT_SHUTDOWN_START) | |
739 | pmcraid_notify_ioastate(pinstance, | |
740 | PMC_DEVICE_EVENT_RESET_START); | |
741 | ||
89a36810 AR |
742 | pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; |
743 | scsi_block_requests(pinstance->host); | |
744 | pmcraid_reset_alert(cmd); | |
745 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
746 | } | |
747 | ||
748 | /** | |
749 | * pmcraid_internal_done - completion routine for internally generated cmds | |
750 | * | |
751 | * @cmd: command that got response from IOA | |
752 | * | |
753 | * Return Value: | |
754 | * none | |
755 | */ | |
756 | static void pmcraid_internal_done(struct pmcraid_cmd *cmd) | |
757 | { | |
758 | pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n", | |
759 | cmd->ioa_cb->ioarcb.cdb[0], | |
760 | le32_to_cpu(cmd->ioa_cb->ioasa.ioasc)); | |
761 | ||
762 | /* Some of the internal commands are sent with callers blocking for the | |
763 | * response. Same will be indicated as part of cmd->completion_req | |
764 | * field. Response path needs to wake up any waiters waiting for cmd | |
765 | * completion if this flag is set. | |
766 | */ | |
767 | if (cmd->completion_req) { | |
768 | cmd->completion_req = 0; | |
769 | complete(&cmd->wait_for_completion); | |
770 | } | |
771 | ||
772 | /* most of the internal commands are completed by caller itself, so | |
773 | * no need to return the command block back to free pool until we are | |
774 | * required to do so (e.g once done with initialization). | |
775 | */ | |
776 | if (cmd->release) { | |
777 | cmd->release = 0; | |
778 | pmcraid_return_cmd(cmd); | |
779 | } | |
780 | } | |
781 | ||
782 | /** | |
783 | * pmcraid_reinit_cfgtable_done - done function for cfg table reinitialization | |
784 | * | |
785 | * @cmd: command that got response from IOA | |
786 | * | |
787 | * This routine is called after driver re-reads configuration table due to a | |
788 | * lost CCN. It returns the command block back to free pool and schedules | |
789 | * worker thread to add/delete devices into the system. | |
790 | * | |
791 | * Return Value: | |
792 | * none | |
793 | */ | |
794 | static void pmcraid_reinit_cfgtable_done(struct pmcraid_cmd *cmd) | |
795 | { | |
796 | pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n", | |
797 | cmd->ioa_cb->ioarcb.cdb[0], | |
798 | le32_to_cpu(cmd->ioa_cb->ioasa.ioasc)); | |
799 | ||
800 | if (cmd->release) { | |
801 | cmd->release = 0; | |
802 | pmcraid_return_cmd(cmd); | |
803 | } | |
804 | pmcraid_info("scheduling worker for config table reinitialization\n"); | |
805 | schedule_work(&cmd->drv_inst->worker_q); | |
806 | } | |
807 | ||
808 | /** | |
809 | * pmcraid_erp_done - Process completion of SCSI error response from device | |
810 | * @cmd: pmcraid_command | |
811 | * | |
812 | * This function copies the sense buffer into the scsi_cmd struct and completes | |
813 | * scsi_cmd by calling scsi_done function. | |
814 | * | |
815 | * Return value: | |
816 | * none | |
817 | */ | |
818 | static void pmcraid_erp_done(struct pmcraid_cmd *cmd) | |
819 | { | |
820 | struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; | |
821 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
822 | u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); | |
823 | ||
824 | if (PMCRAID_IOASC_SENSE_KEY(ioasc) > 0) { | |
825 | scsi_cmd->result |= (DID_ERROR << 16); | |
34876402 AR |
826 | scmd_printk(KERN_INFO, scsi_cmd, |
827 | "command CDB[0] = %x failed with IOASC: 0x%08X\n", | |
828 | cmd->ioa_cb->ioarcb.cdb[0], ioasc); | |
89a36810 AR |
829 | } |
830 | ||
a9b9e3ad CH |
831 | if (cmd->sense_buffer) { |
832 | dma_unmap_single(&pinstance->pdev->dev, cmd->sense_buffer_dma, | |
833 | SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE); | |
89a36810 AR |
834 | cmd->sense_buffer = NULL; |
835 | cmd->sense_buffer_dma = 0; | |
836 | } | |
837 | ||
838 | scsi_dma_unmap(scsi_cmd); | |
839 | pmcraid_return_cmd(cmd); | |
f13cc234 | 840 | scsi_done(scsi_cmd); |
89a36810 AR |
841 | } |
842 | ||
843 | /** | |
3673b7b0 | 844 | * _pmcraid_fire_command - sends an IOA command to adapter |
89a36810 AR |
845 | * |
846 | * This function adds the given block into pending command list | |
847 | * and returns without waiting | |
848 | * | |
849 | * @cmd : command to be sent to the device | |
850 | * | |
851 | * Return Value | |
852 | * None | |
853 | */ | |
854 | static void _pmcraid_fire_command(struct pmcraid_cmd *cmd) | |
855 | { | |
856 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
857 | unsigned long lock_flags; | |
858 | ||
859 | /* Add this command block to pending cmd pool. We do this prior to | |
860 | * writting IOARCB to ioarrin because IOA might complete the command | |
861 | * by the time we are about to add it to the list. Response handler | |
c20c4267 | 862 | * (isr/tasklet) looks for cmd block in the pending pending list. |
89a36810 AR |
863 | */ |
864 | spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags); | |
865 | list_add_tail(&cmd->free_list, &pinstance->pending_cmd_pool); | |
866 | spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags); | |
867 | atomic_inc(&pinstance->outstanding_cmds); | |
868 | ||
869 | /* driver writes lower 32-bit value of IOARCB address only */ | |
870 | mb(); | |
45c80be6 | 871 | iowrite32(le64_to_cpu(cmd->ioa_cb->ioarcb.ioarcb_bus_addr), pinstance->ioarrin); |
89a36810 AR |
872 | } |
873 | ||
874 | /** | |
875 | * pmcraid_send_cmd - fires a command to IOA | |
876 | * | |
877 | * This function also sets up timeout function, and command completion | |
878 | * function | |
879 | * | |
880 | * @cmd: pointer to the command block to be fired to IOA | |
881 | * @cmd_done: command completion function, called once IOA responds | |
882 | * @timeout: timeout to wait for this command completion | |
883 | * @timeout_func: timeout handler | |
884 | * | |
885 | * Return value | |
886 | * none | |
887 | */ | |
888 | static void pmcraid_send_cmd( | |
889 | struct pmcraid_cmd *cmd, | |
890 | void (*cmd_done) (struct pmcraid_cmd *), | |
891 | unsigned long timeout, | |
242b5657 | 892 | void (*timeout_func) (struct timer_list *) |
89a36810 AR |
893 | ) |
894 | { | |
895 | /* initialize done function */ | |
896 | cmd->cmd_done = cmd_done; | |
897 | ||
898 | if (timeout_func) { | |
899 | /* setup timeout handler */ | |
89a36810 | 900 | cmd->timer.expires = jiffies + timeout; |
841b86f3 | 901 | cmd->timer.function = timeout_func; |
89a36810 AR |
902 | add_timer(&cmd->timer); |
903 | } | |
904 | ||
905 | /* fire the command to IOA */ | |
906 | _pmcraid_fire_command(cmd); | |
907 | } | |
908 | ||
c20c4267 AR |
909 | /** |
910 | * pmcraid_ioa_shutdown_done - completion function for IOA shutdown command | |
911 | * @cmd: pointer to the command block used for sending IOA shutdown command | |
912 | * | |
913 | * Return value | |
914 | * None | |
915 | */ | |
916 | static void pmcraid_ioa_shutdown_done(struct pmcraid_cmd *cmd) | |
917 | { | |
918 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
919 | unsigned long lock_flags; | |
920 | ||
921 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
922 | pmcraid_ioa_reset(cmd); | |
923 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
924 | } | |
925 | ||
89a36810 AR |
926 | /** |
927 | * pmcraid_ioa_shutdown - sends SHUTDOWN command to ioa | |
928 | * | |
929 | * @cmd: pointer to the command block used as part of reset sequence | |
930 | * | |
931 | * Return Value | |
932 | * None | |
933 | */ | |
934 | static void pmcraid_ioa_shutdown(struct pmcraid_cmd *cmd) | |
935 | { | |
936 | pmcraid_info("response for Cancel CCN CDB[0] = %x ioasc = %x\n", | |
937 | cmd->ioa_cb->ioarcb.cdb[0], | |
938 | le32_to_cpu(cmd->ioa_cb->ioasa.ioasc)); | |
939 | ||
940 | /* Note that commands sent during reset require next command to be sent | |
941 | * to IOA. Hence reinit the done function as well as timeout function | |
942 | */ | |
943 | pmcraid_reinit_cmdblk(cmd); | |
944 | cmd->ioa_cb->ioarcb.request_type = REQ_TYPE_IOACMD; | |
945 | cmd->ioa_cb->ioarcb.resource_handle = | |
946 | cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
947 | cmd->ioa_cb->ioarcb.cdb[0] = PMCRAID_IOA_SHUTDOWN; | |
948 | cmd->ioa_cb->ioarcb.cdb[1] = PMCRAID_SHUTDOWN_NORMAL; | |
949 | ||
950 | /* fire shutdown command to hardware. */ | |
951 | pmcraid_info("firing normal shutdown command (%d) to IOA\n", | |
952 | le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle)); | |
953 | ||
c20c4267 AR |
954 | pmcraid_notify_ioastate(cmd->drv_inst, PMC_DEVICE_EVENT_SHUTDOWN_START); |
955 | ||
956 | pmcraid_send_cmd(cmd, pmcraid_ioa_shutdown_done, | |
89a36810 AR |
957 | PMCRAID_SHUTDOWN_TIMEOUT, |
958 | pmcraid_timeout_handler); | |
959 | } | |
960 | ||
3673b7b0 | 961 | static void pmcraid_querycfg(struct pmcraid_cmd *); |
89a36810 | 962 | /** |
c20c4267 AR |
963 | * pmcraid_get_fwversion_done - completion function for get_fwversion |
964 | * | |
965 | * @cmd: pointer to command block used to send INQUIRY command | |
89a36810 AR |
966 | * |
967 | * Return Value | |
c20c4267 | 968 | * none |
89a36810 | 969 | */ |
c20c4267 AR |
970 | static void pmcraid_get_fwversion_done(struct pmcraid_cmd *cmd) |
971 | { | |
972 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
973 | u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); | |
974 | unsigned long lock_flags; | |
975 | ||
976 | /* configuration table entry size depends on firmware version. If fw | |
977 | * version is not known, it is not possible to interpret IOA config | |
978 | * table | |
979 | */ | |
980 | if (ioasc) { | |
981 | pmcraid_err("IOA Inquiry failed with %x\n", ioasc); | |
982 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
983 | pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; | |
984 | pmcraid_reset_alert(cmd); | |
985 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
986 | } else { | |
987 | pmcraid_querycfg(cmd); | |
988 | } | |
989 | } | |
990 | ||
991 | /** | |
992 | * pmcraid_get_fwversion - reads firmware version information | |
993 | * | |
994 | * @cmd: pointer to command block used to send INQUIRY command | |
995 | * | |
996 | * Return Value | |
997 | * none | |
998 | */ | |
999 | static void pmcraid_get_fwversion(struct pmcraid_cmd *cmd) | |
1000 | { | |
1001 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
b22ee87d | 1002 | struct pmcraid_ioadl_desc *ioadl; |
c20c4267 AR |
1003 | struct pmcraid_instance *pinstance = cmd->drv_inst; |
1004 | u16 data_size = sizeof(struct pmcraid_inquiry_data); | |
1005 | ||
1006 | pmcraid_reinit_cmdblk(cmd); | |
1007 | ioarcb->request_type = REQ_TYPE_SCSI; | |
1008 | ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
1009 | ioarcb->cdb[0] = INQUIRY; | |
1010 | ioarcb->cdb[1] = 1; | |
1011 | ioarcb->cdb[2] = 0xD0; | |
1012 | ioarcb->cdb[3] = (data_size >> 8) & 0xFF; | |
1013 | ioarcb->cdb[4] = data_size & 0xFF; | |
1014 | ||
1015 | /* Since entire inquiry data it can be part of IOARCB itself | |
1016 | */ | |
1017 | ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
1018 | offsetof(struct pmcraid_ioarcb, | |
1019 | add_data.u.ioadl[0])); | |
1020 | ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); | |
45c80be6 | 1021 | ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL)); |
c20c4267 AR |
1022 | |
1023 | ioarcb->request_flags0 |= NO_LINK_DESCS; | |
1024 | ioarcb->data_transfer_length = cpu_to_le32(data_size); | |
1025 | ioadl = &(ioarcb->add_data.u.ioadl[0]); | |
1026 | ioadl->flags = IOADL_FLAGS_LAST_DESC; | |
1027 | ioadl->address = cpu_to_le64(pinstance->inq_data_baddr); | |
1028 | ioadl->data_len = cpu_to_le32(data_size); | |
1029 | ||
1030 | pmcraid_send_cmd(cmd, pmcraid_get_fwversion_done, | |
1031 | PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler); | |
1032 | } | |
1033 | ||
1034 | /** | |
1035 | * pmcraid_identify_hrrq - registers host rrq buffers with IOA | |
1036 | * @cmd: pointer to command block to be used for identify hrrq | |
1037 | * | |
1038 | * Return Value | |
1039 | * none | |
1040 | */ | |
89a36810 AR |
1041 | static void pmcraid_identify_hrrq(struct pmcraid_cmd *cmd) |
1042 | { | |
1043 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
1044 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
c20c4267 | 1045 | int index = cmd->hrrq_index; |
89a36810 | 1046 | __be64 hrrq_addr = cpu_to_be64(pinstance->hrrq_start_bus_addr[index]); |
45c80be6 | 1047 | __be32 hrrq_size = cpu_to_be32(sizeof(u32) * PMCRAID_MAX_CMD); |
c20c4267 | 1048 | void (*done_function)(struct pmcraid_cmd *); |
89a36810 AR |
1049 | |
1050 | pmcraid_reinit_cmdblk(cmd); | |
c20c4267 AR |
1051 | cmd->hrrq_index = index + 1; |
1052 | ||
1053 | if (cmd->hrrq_index < pinstance->num_hrrq) { | |
1054 | done_function = pmcraid_identify_hrrq; | |
1055 | } else { | |
1056 | cmd->hrrq_index = 0; | |
1057 | done_function = pmcraid_get_fwversion; | |
1058 | } | |
89a36810 AR |
1059 | |
1060 | /* Initialize ioarcb */ | |
1061 | ioarcb->request_type = REQ_TYPE_IOACMD; | |
1062 | ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
1063 | ||
1064 | /* initialize the hrrq number where IOA will respond to this command */ | |
1065 | ioarcb->hrrq_id = index; | |
1066 | ioarcb->cdb[0] = PMCRAID_IDENTIFY_HRRQ; | |
1067 | ioarcb->cdb[1] = index; | |
1068 | ||
1069 | /* IOA expects 64-bit pci address to be written in B.E format | |
1070 | * (i.e cdb[2]=MSByte..cdb[9]=LSB. | |
1071 | */ | |
c20c4267 AR |
1072 | pmcraid_info("HRRQ_IDENTIFY with hrrq:ioarcb:index => %llx:%llx:%x\n", |
1073 | hrrq_addr, ioarcb->ioarcb_bus_addr, index); | |
89a36810 AR |
1074 | |
1075 | memcpy(&(ioarcb->cdb[2]), &hrrq_addr, sizeof(hrrq_addr)); | |
1076 | memcpy(&(ioarcb->cdb[10]), &hrrq_size, sizeof(hrrq_size)); | |
1077 | ||
1078 | /* Subsequent commands require HRRQ identification to be successful. | |
1079 | * Note that this gets called even during reset from SCSI mid-layer | |
1080 | * or tasklet | |
1081 | */ | |
c20c4267 | 1082 | pmcraid_send_cmd(cmd, done_function, |
89a36810 AR |
1083 | PMCRAID_INTERNAL_TIMEOUT, |
1084 | pmcraid_timeout_handler); | |
1085 | } | |
1086 | ||
1087 | static void pmcraid_process_ccn(struct pmcraid_cmd *cmd); | |
1088 | static void pmcraid_process_ldn(struct pmcraid_cmd *cmd); | |
1089 | ||
1090 | /** | |
1091 | * pmcraid_send_hcam_cmd - send an initialized command block(HCAM) to IOA | |
1092 | * | |
1093 | * @cmd: initialized command block pointer | |
1094 | * | |
1095 | * Return Value | |
1096 | * none | |
1097 | */ | |
1098 | static void pmcraid_send_hcam_cmd(struct pmcraid_cmd *cmd) | |
1099 | { | |
1100 | if (cmd->ioa_cb->ioarcb.cdb[1] == PMCRAID_HCAM_CODE_CONFIG_CHANGE) | |
1101 | atomic_set(&(cmd->drv_inst->ccn.ignore), 0); | |
1102 | else | |
1103 | atomic_set(&(cmd->drv_inst->ldn.ignore), 0); | |
1104 | ||
1105 | pmcraid_send_cmd(cmd, cmd->cmd_done, 0, NULL); | |
1106 | } | |
1107 | ||
1108 | /** | |
1109 | * pmcraid_init_hcam - send an initialized command block(HCAM) to IOA | |
1110 | * | |
1111 | * @pinstance: pointer to adapter instance structure | |
1112 | * @type: HCAM type | |
1113 | * | |
1114 | * Return Value | |
1115 | * pointer to initialized pmcraid_cmd structure or NULL | |
1116 | */ | |
1117 | static struct pmcraid_cmd *pmcraid_init_hcam | |
1118 | ( | |
1119 | struct pmcraid_instance *pinstance, | |
1120 | u8 type | |
1121 | ) | |
1122 | { | |
1123 | struct pmcraid_cmd *cmd; | |
1124 | struct pmcraid_ioarcb *ioarcb; | |
1125 | struct pmcraid_ioadl_desc *ioadl; | |
1126 | struct pmcraid_hostrcb *hcam; | |
1127 | void (*cmd_done) (struct pmcraid_cmd *); | |
1128 | dma_addr_t dma; | |
1129 | int rcb_size; | |
1130 | ||
1131 | cmd = pmcraid_get_free_cmd(pinstance); | |
1132 | ||
1133 | if (!cmd) { | |
1134 | pmcraid_err("no free command blocks for hcam\n"); | |
1135 | return cmd; | |
1136 | } | |
1137 | ||
1138 | if (type == PMCRAID_HCAM_CODE_CONFIG_CHANGE) { | |
c20c4267 | 1139 | rcb_size = sizeof(struct pmcraid_hcam_ccn_ext); |
89a36810 AR |
1140 | cmd_done = pmcraid_process_ccn; |
1141 | dma = pinstance->ccn.baddr + PMCRAID_AEN_HDR_SIZE; | |
1142 | hcam = &pinstance->ccn; | |
1143 | } else { | |
1144 | rcb_size = sizeof(struct pmcraid_hcam_ldn); | |
1145 | cmd_done = pmcraid_process_ldn; | |
1146 | dma = pinstance->ldn.baddr + PMCRAID_AEN_HDR_SIZE; | |
1147 | hcam = &pinstance->ldn; | |
1148 | } | |
1149 | ||
1150 | /* initialize command pointer used for HCAM registration */ | |
1151 | hcam->cmd = cmd; | |
1152 | ||
1153 | ioarcb = &cmd->ioa_cb->ioarcb; | |
1154 | ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
1155 | offsetof(struct pmcraid_ioarcb, | |
1156 | add_data.u.ioadl[0])); | |
1157 | ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); | |
1158 | ioadl = ioarcb->add_data.u.ioadl; | |
1159 | ||
1160 | /* Initialize ioarcb */ | |
1161 | ioarcb->request_type = REQ_TYPE_HCAM; | |
1162 | ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
1163 | ioarcb->cdb[0] = PMCRAID_HOST_CONTROLLED_ASYNC; | |
1164 | ioarcb->cdb[1] = type; | |
1165 | ioarcb->cdb[7] = (rcb_size >> 8) & 0xFF; | |
1166 | ioarcb->cdb[8] = (rcb_size) & 0xFF; | |
1167 | ||
1168 | ioarcb->data_transfer_length = cpu_to_le32(rcb_size); | |
1169 | ||
88197966 | 1170 | ioadl[0].flags |= IOADL_FLAGS_READ_LAST; |
89a36810 | 1171 | ioadl[0].data_len = cpu_to_le32(rcb_size); |
45c80be6 | 1172 | ioadl[0].address = cpu_to_le64(dma); |
89a36810 AR |
1173 | |
1174 | cmd->cmd_done = cmd_done; | |
1175 | return cmd; | |
1176 | } | |
1177 | ||
1178 | /** | |
1179 | * pmcraid_send_hcam - Send an HCAM to IOA | |
1180 | * @pinstance: ioa config struct | |
1181 | * @type: HCAM type | |
1182 | * | |
1183 | * This function will send a Host Controlled Async command to IOA. | |
1184 | * | |
1185 | * Return value: | |
c20c4267 | 1186 | * none |
89a36810 AR |
1187 | */ |
1188 | static void pmcraid_send_hcam(struct pmcraid_instance *pinstance, u8 type) | |
1189 | { | |
1190 | struct pmcraid_cmd *cmd = pmcraid_init_hcam(pinstance, type); | |
1191 | pmcraid_send_hcam_cmd(cmd); | |
1192 | } | |
1193 | ||
1194 | ||
1195 | /** | |
1196 | * pmcraid_prepare_cancel_cmd - prepares a command block to abort another | |
1197 | * | |
1198 | * @cmd: pointer to cmd that is used as cancelling command | |
1199 | * @cmd_to_cancel: pointer to the command that needs to be cancelled | |
1200 | */ | |
1201 | static void pmcraid_prepare_cancel_cmd( | |
1202 | struct pmcraid_cmd *cmd, | |
1203 | struct pmcraid_cmd *cmd_to_cancel | |
1204 | ) | |
1205 | { | |
1206 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
45c80be6 AB |
1207 | __be64 ioarcb_addr; |
1208 | ||
1209 | /* IOARCB address of the command to be cancelled is given in | |
1210 | * cdb[2]..cdb[9] is Big-Endian format. Note that length bits in | |
1211 | * IOARCB address are not masked. | |
1212 | */ | |
1213 | ioarcb_addr = cpu_to_be64(le64_to_cpu(cmd_to_cancel->ioa_cb->ioarcb.ioarcb_bus_addr)); | |
89a36810 AR |
1214 | |
1215 | /* Get the resource handle to where the command to be aborted has been | |
1216 | * sent. | |
1217 | */ | |
1218 | ioarcb->resource_handle = cmd_to_cancel->ioa_cb->ioarcb.resource_handle; | |
1219 | ioarcb->request_type = REQ_TYPE_IOACMD; | |
1220 | memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN); | |
1221 | ioarcb->cdb[0] = PMCRAID_ABORT_CMD; | |
1222 | ||
89a36810 AR |
1223 | memcpy(&(ioarcb->cdb[2]), &ioarcb_addr, sizeof(ioarcb_addr)); |
1224 | } | |
1225 | ||
1226 | /** | |
1227 | * pmcraid_cancel_hcam - sends ABORT task to abort a given HCAM | |
1228 | * | |
1229 | * @cmd: command to be used as cancelling command | |
1230 | * @type: HCAM type | |
1231 | * @cmd_done: op done function for the cancelling command | |
1232 | */ | |
1233 | static void pmcraid_cancel_hcam( | |
1234 | struct pmcraid_cmd *cmd, | |
1235 | u8 type, | |
1236 | void (*cmd_done) (struct pmcraid_cmd *) | |
1237 | ) | |
1238 | { | |
1239 | struct pmcraid_instance *pinstance; | |
1240 | struct pmcraid_hostrcb *hcam; | |
1241 | ||
1242 | pinstance = cmd->drv_inst; | |
1243 | hcam = (type == PMCRAID_HCAM_CODE_LOG_DATA) ? | |
1244 | &pinstance->ldn : &pinstance->ccn; | |
1245 | ||
1246 | /* prepare for cancelling previous hcam command. If the HCAM is | |
1247 | * currently not pending with IOA, we would have hcam->cmd as non-null | |
1248 | */ | |
1249 | if (hcam->cmd == NULL) | |
1250 | return; | |
1251 | ||
1252 | pmcraid_prepare_cancel_cmd(cmd, hcam->cmd); | |
1253 | ||
1254 | /* writing to IOARRIN must be protected by host_lock, as mid-layer | |
1255 | * schedule queuecommand while we are doing this | |
1256 | */ | |
1257 | pmcraid_send_cmd(cmd, cmd_done, | |
1258 | PMCRAID_INTERNAL_TIMEOUT, | |
1259 | pmcraid_timeout_handler); | |
1260 | } | |
1261 | ||
1262 | /** | |
1263 | * pmcraid_cancel_ccn - cancel CCN HCAM already registered with IOA | |
1264 | * | |
1265 | * @cmd: command block to be used for cancelling the HCAM | |
1266 | */ | |
1267 | static void pmcraid_cancel_ccn(struct pmcraid_cmd *cmd) | |
1268 | { | |
1269 | pmcraid_info("response for Cancel LDN CDB[0] = %x ioasc = %x\n", | |
1270 | cmd->ioa_cb->ioarcb.cdb[0], | |
1271 | le32_to_cpu(cmd->ioa_cb->ioasa.ioasc)); | |
1272 | ||
1273 | pmcraid_reinit_cmdblk(cmd); | |
1274 | ||
1275 | pmcraid_cancel_hcam(cmd, | |
1276 | PMCRAID_HCAM_CODE_CONFIG_CHANGE, | |
1277 | pmcraid_ioa_shutdown); | |
1278 | } | |
1279 | ||
1280 | /** | |
1281 | * pmcraid_cancel_ldn - cancel LDN HCAM already registered with IOA | |
1282 | * | |
1283 | * @cmd: command block to be used for cancelling the HCAM | |
1284 | */ | |
1285 | static void pmcraid_cancel_ldn(struct pmcraid_cmd *cmd) | |
1286 | { | |
1287 | pmcraid_cancel_hcam(cmd, | |
1288 | PMCRAID_HCAM_CODE_LOG_DATA, | |
1289 | pmcraid_cancel_ccn); | |
1290 | } | |
1291 | ||
1292 | /** | |
1293 | * pmcraid_expose_resource - check if the resource can be exposed to OS | |
1294 | * | |
c20c4267 | 1295 | * @fw_version: firmware version code |
89a36810 AR |
1296 | * @cfgte: pointer to configuration table entry of the resource |
1297 | * | |
1298 | * Return value: | |
c20c4267 | 1299 | * true if resource can be added to midlayer, false(0) otherwise |
89a36810 | 1300 | */ |
c20c4267 AR |
1301 | static int pmcraid_expose_resource(u16 fw_version, |
1302 | struct pmcraid_config_table_entry *cfgte) | |
89a36810 AR |
1303 | { |
1304 | int retval = 0; | |
1305 | ||
c20c4267 AR |
1306 | if (cfgte->resource_type == RES_TYPE_VSET) { |
1307 | if (fw_version <= PMCRAID_FW_VERSION_1) | |
1308 | retval = ((cfgte->unique_flags1 & 0x80) == 0); | |
1309 | else | |
1310 | retval = ((cfgte->unique_flags0 & 0x80) == 0 && | |
1311 | (cfgte->unique_flags1 & 0x80) == 0); | |
1312 | ||
1313 | } else if (cfgte->resource_type == RES_TYPE_GSCSI) | |
89a36810 AR |
1314 | retval = (RES_BUS(cfgte->resource_address) != |
1315 | PMCRAID_VIRTUAL_ENCL_BUS_ID); | |
1316 | return retval; | |
1317 | } | |
1318 | ||
1319 | /* attributes supported by pmcraid_event_family */ | |
1320 | enum { | |
1321 | PMCRAID_AEN_ATTR_UNSPEC, | |
1322 | PMCRAID_AEN_ATTR_EVENT, | |
1323 | __PMCRAID_AEN_ATTR_MAX, | |
1324 | }; | |
1325 | #define PMCRAID_AEN_ATTR_MAX (__PMCRAID_AEN_ATTR_MAX - 1) | |
1326 | ||
1327 | /* commands supported by pmcraid_event_family */ | |
1328 | enum { | |
1329 | PMCRAID_AEN_CMD_UNSPEC, | |
1330 | PMCRAID_AEN_CMD_EVENT, | |
1331 | __PMCRAID_AEN_CMD_MAX, | |
1332 | }; | |
1333 | #define PMCRAID_AEN_CMD_MAX (__PMCRAID_AEN_CMD_MAX - 1) | |
1334 | ||
5e53e689 JB |
1335 | static struct genl_multicast_group pmcraid_mcgrps[] = { |
1336 | { .name = "events", /* not really used - see ID discussion below */ }, | |
1337 | }; | |
1338 | ||
56989f6d | 1339 | static struct genl_family pmcraid_event_family __ro_after_init = { |
489111e5 | 1340 | .module = THIS_MODULE, |
89a36810 AR |
1341 | .name = "pmcraid", |
1342 | .version = 1, | |
5e53e689 JB |
1343 | .maxattr = PMCRAID_AEN_ATTR_MAX, |
1344 | .mcgrps = pmcraid_mcgrps, | |
1345 | .n_mcgrps = ARRAY_SIZE(pmcraid_mcgrps), | |
89a36810 AR |
1346 | }; |
1347 | ||
1348 | /** | |
1349 | * pmcraid_netlink_init - registers pmcraid_event_family | |
1350 | * | |
1351 | * Return value: | |
c20c4267 AR |
1352 | * 0 if the pmcraid_event_family is successfully registered |
1353 | * with netlink generic, non-zero otherwise | |
89a36810 | 1354 | */ |
56989f6d | 1355 | static int __init pmcraid_netlink_init(void) |
89a36810 AR |
1356 | { |
1357 | int result; | |
1358 | ||
1359 | result = genl_register_family(&pmcraid_event_family); | |
1360 | ||
1361 | if (result) | |
1362 | return result; | |
1363 | ||
1364 | pmcraid_info("registered NETLINK GENERIC group: %d\n", | |
1365 | pmcraid_event_family.id); | |
1366 | ||
1367 | return result; | |
1368 | } | |
1369 | ||
1370 | /** | |
1371 | * pmcraid_netlink_release - unregisters pmcraid_event_family | |
1372 | * | |
1373 | * Return value: | |
c20c4267 | 1374 | * none |
89a36810 AR |
1375 | */ |
1376 | static void pmcraid_netlink_release(void) | |
1377 | { | |
1378 | genl_unregister_family(&pmcraid_event_family); | |
1379 | } | |
1380 | ||
3673b7b0 | 1381 | /* |
89a36810 AR |
1382 | * pmcraid_notify_aen - sends event msg to user space application |
1383 | * @pinstance: pointer to adapter instance structure | |
89a36810 AR |
1384 | * |
1385 | * Return value: | |
1386 | * 0 if success, error value in case of any failure. | |
1387 | */ | |
c20c4267 AR |
1388 | static int pmcraid_notify_aen( |
1389 | struct pmcraid_instance *pinstance, | |
1390 | struct pmcraid_aen_msg *aen_msg, | |
3673b7b0 | 1391 | u32 data_size) |
89a36810 AR |
1392 | { |
1393 | struct sk_buff *skb; | |
89a36810 | 1394 | void *msg_header; |
c20c4267 | 1395 | u32 total_size, nla_genl_hdr_total_size; |
89a36810 AR |
1396 | int result; |
1397 | ||
89a36810 AR |
1398 | aen_msg->hostno = (pinstance->host->unique_id << 16 | |
1399 | MINOR(pinstance->cdev.dev)); | |
1400 | aen_msg->length = data_size; | |
c20c4267 | 1401 | |
89a36810 AR |
1402 | data_size += sizeof(*aen_msg); |
1403 | ||
1404 | total_size = nla_total_size(data_size); | |
c20c4267 AR |
1405 | /* Add GENL_HDR to total_size */ |
1406 | nla_genl_hdr_total_size = | |
1407 | (total_size + (GENL_HDRLEN + | |
1408 | ((struct genl_family *)&pmcraid_event_family)->hdrsize) | |
1409 | + NLMSG_HDRLEN); | |
1410 | skb = genlmsg_new(nla_genl_hdr_total_size, GFP_ATOMIC); | |
89a36810 AR |
1411 | |
1412 | ||
1413 | if (!skb) { | |
1414 | pmcraid_err("Failed to allocate aen data SKB of size: %x\n", | |
1415 | total_size); | |
1416 | return -ENOMEM; | |
1417 | } | |
1418 | ||
1419 | /* add the genetlink message header */ | |
1420 | msg_header = genlmsg_put(skb, 0, 0, | |
1421 | &pmcraid_event_family, 0, | |
1422 | PMCRAID_AEN_CMD_EVENT); | |
1423 | if (!msg_header) { | |
1424 | pmcraid_err("failed to copy command details\n"); | |
1425 | nlmsg_free(skb); | |
1426 | return -ENOMEM; | |
1427 | } | |
1428 | ||
1429 | result = nla_put(skb, PMCRAID_AEN_ATTR_EVENT, data_size, aen_msg); | |
1430 | ||
1431 | if (result) { | |
c20c4267 | 1432 | pmcraid_err("failed to copy AEN attribute data\n"); |
89a36810 AR |
1433 | nlmsg_free(skb); |
1434 | return -EINVAL; | |
1435 | } | |
1436 | ||
f6e2694e | 1437 | /* send genetlink multicast message to notify applications */ |
053c095a | 1438 | genlmsg_end(skb, msg_header); |
89a36810 | 1439 | |
5e53e689 JB |
1440 | result = genlmsg_multicast(&pmcraid_event_family, skb, |
1441 | 0, 0, GFP_ATOMIC); | |
89a36810 AR |
1442 | |
1443 | /* If there are no listeners, genlmsg_multicast may return non-zero | |
1444 | * value. | |
1445 | */ | |
1446 | if (result) | |
c20c4267 | 1447 | pmcraid_info("error (%x) sending aen event message\n", result); |
89a36810 AR |
1448 | return result; |
1449 | } | |
1450 | ||
c20c4267 AR |
1451 | /** |
1452 | * pmcraid_notify_ccn - notifies about CCN event msg to user space | |
1453 | * @pinstance: pointer adapter instance structure | |
1454 | * | |
1455 | * Return value: | |
1456 | * 0 if success, error value in case of any failure | |
1457 | */ | |
1458 | static int pmcraid_notify_ccn(struct pmcraid_instance *pinstance) | |
1459 | { | |
1460 | return pmcraid_notify_aen(pinstance, | |
1461 | pinstance->ccn.msg, | |
45c80be6 | 1462 | le32_to_cpu(pinstance->ccn.hcam->data_len) + |
c20c4267 AR |
1463 | sizeof(struct pmcraid_hcam_hdr)); |
1464 | } | |
1465 | ||
1466 | /** | |
1467 | * pmcraid_notify_ldn - notifies about CCN event msg to user space | |
1468 | * @pinstance: pointer adapter instance structure | |
1469 | * | |
1470 | * Return value: | |
1471 | * 0 if success, error value in case of any failure | |
1472 | */ | |
1473 | static int pmcraid_notify_ldn(struct pmcraid_instance *pinstance) | |
1474 | { | |
1475 | return pmcraid_notify_aen(pinstance, | |
1476 | pinstance->ldn.msg, | |
45c80be6 | 1477 | le32_to_cpu(pinstance->ldn.hcam->data_len) + |
c20c4267 AR |
1478 | sizeof(struct pmcraid_hcam_hdr)); |
1479 | } | |
1480 | ||
1481 | /** | |
1482 | * pmcraid_notify_ioastate - sends IOA state event msg to user space | |
1483 | * @pinstance: pointer adapter instance structure | |
1484 | * @evt: controller state event to be sent | |
1485 | * | |
1486 | * Return value: | |
1487 | * 0 if success, error value in case of any failure | |
1488 | */ | |
1489 | static void pmcraid_notify_ioastate(struct pmcraid_instance *pinstance, u32 evt) | |
1490 | { | |
1491 | pinstance->scn.ioa_state = evt; | |
1492 | pmcraid_notify_aen(pinstance, | |
1493 | &pinstance->scn.msg, | |
1494 | sizeof(u32)); | |
1495 | } | |
1496 | ||
89a36810 AR |
1497 | /** |
1498 | * pmcraid_handle_config_change - Handle a config change from the adapter | |
1499 | * @pinstance: pointer to per adapter instance structure | |
1500 | * | |
1501 | * Return value: | |
1502 | * none | |
1503 | */ | |
729c8456 | 1504 | |
89a36810 AR |
1505 | static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance) |
1506 | { | |
1507 | struct pmcraid_config_table_entry *cfg_entry; | |
1508 | struct pmcraid_hcam_ccn *ccn_hcam; | |
1509 | struct pmcraid_cmd *cmd; | |
1510 | struct pmcraid_cmd *cfgcmd; | |
1511 | struct pmcraid_resource_entry *res = NULL; | |
89a36810 AR |
1512 | unsigned long lock_flags; |
1513 | unsigned long host_lock_flags; | |
729c8456 AR |
1514 | u32 new_entry = 1; |
1515 | u32 hidden_entry = 0; | |
c20c4267 | 1516 | u16 fw_version; |
89a36810 AR |
1517 | int rc; |
1518 | ||
1519 | ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam; | |
1520 | cfg_entry = &ccn_hcam->cfg_entry; | |
c20c4267 | 1521 | fw_version = be16_to_cpu(pinstance->inq_data->fw_version); |
89a36810 | 1522 | |
592488a3 AR |
1523 | pmcraid_info("CCN(%x): %x timestamp: %llx type: %x lost: %x flags: %x \ |
1524 | res: %x:%x:%x:%x\n", | |
45c80be6 | 1525 | le32_to_cpu(pinstance->ccn.hcam->ilid), |
89a36810 | 1526 | pinstance->ccn.hcam->op_code, |
45c80be6 AB |
1527 | (le32_to_cpu(pinstance->ccn.hcam->timestamp1) | |
1528 | ((le32_to_cpu(pinstance->ccn.hcam->timestamp2) & 0xffffffffLL) << 32)), | |
89a36810 AR |
1529 | pinstance->ccn.hcam->notification_type, |
1530 | pinstance->ccn.hcam->notification_lost, | |
1531 | pinstance->ccn.hcam->flags, | |
1532 | pinstance->host->unique_id, | |
1533 | RES_IS_VSET(*cfg_entry) ? PMCRAID_VSET_BUS_ID : | |
1534 | (RES_IS_GSCSI(*cfg_entry) ? PMCRAID_PHYS_BUS_ID : | |
1535 | RES_BUS(cfg_entry->resource_address)), | |
c20c4267 AR |
1536 | RES_IS_VSET(*cfg_entry) ? |
1537 | (fw_version <= PMCRAID_FW_VERSION_1 ? | |
1538 | cfg_entry->unique_flags1 : | |
45c80be6 | 1539 | le16_to_cpu(cfg_entry->array_id) & 0xFF) : |
89a36810 AR |
1540 | RES_TARGET(cfg_entry->resource_address), |
1541 | RES_LUN(cfg_entry->resource_address)); | |
1542 | ||
1543 | ||
1544 | /* If this HCAM indicates a lost notification, read the config table */ | |
1545 | if (pinstance->ccn.hcam->notification_lost) { | |
1546 | cfgcmd = pmcraid_get_free_cmd(pinstance); | |
1547 | if (cfgcmd) { | |
1548 | pmcraid_info("lost CCN, reading config table\b"); | |
1549 | pinstance->reinit_cfg_table = 1; | |
1550 | pmcraid_querycfg(cfgcmd); | |
1551 | } else { | |
1552 | pmcraid_err("lost CCN, no free cmd for querycfg\n"); | |
1553 | } | |
1554 | goto out_notify_apps; | |
1555 | } | |
1556 | ||
1557 | /* If this resource is not going to be added to mid-layer, just notify | |
729c8456 AR |
1558 | * applications and return. If this notification is about hiding a VSET |
1559 | * resource, check if it was exposed already. | |
89a36810 | 1560 | */ |
729c8456 AR |
1561 | if (pinstance->ccn.hcam->notification_type == |
1562 | NOTIFICATION_TYPE_ENTRY_CHANGED && | |
c20c4267 | 1563 | cfg_entry->resource_type == RES_TYPE_VSET) { |
db269932 | 1564 | hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0; |
c20c4267 | 1565 | } else if (!pmcraid_expose_resource(fw_version, cfg_entry)) { |
89a36810 | 1566 | goto out_notify_apps; |
c20c4267 | 1567 | } |
89a36810 AR |
1568 | |
1569 | spin_lock_irqsave(&pinstance->resource_lock, lock_flags); | |
1570 | list_for_each_entry(res, &pinstance->used_res_q, queue) { | |
1571 | rc = memcmp(&res->cfg_entry.resource_address, | |
1572 | &cfg_entry->resource_address, | |
1573 | sizeof(cfg_entry->resource_address)); | |
1574 | if (!rc) { | |
1575 | new_entry = 0; | |
1576 | break; | |
1577 | } | |
1578 | } | |
1579 | ||
1580 | if (new_entry) { | |
1581 | ||
729c8456 AR |
1582 | if (hidden_entry) { |
1583 | spin_unlock_irqrestore(&pinstance->resource_lock, | |
1584 | lock_flags); | |
1585 | goto out_notify_apps; | |
1586 | } | |
1587 | ||
89a36810 AR |
1588 | /* If there are more number of resources than what driver can |
1589 | * manage, do not notify the applications about the CCN. Just | |
1590 | * ignore this notifications and re-register the same HCAM | |
1591 | */ | |
1592 | if (list_empty(&pinstance->free_res_q)) { | |
1593 | spin_unlock_irqrestore(&pinstance->resource_lock, | |
1594 | lock_flags); | |
1595 | pmcraid_err("too many resources attached\n"); | |
1596 | spin_lock_irqsave(pinstance->host->host_lock, | |
1597 | host_lock_flags); | |
1598 | pmcraid_send_hcam(pinstance, | |
1599 | PMCRAID_HCAM_CODE_CONFIG_CHANGE); | |
1600 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
1601 | host_lock_flags); | |
1602 | return; | |
1603 | } | |
1604 | ||
1605 | res = list_entry(pinstance->free_res_q.next, | |
1606 | struct pmcraid_resource_entry, queue); | |
1607 | ||
1608 | list_del(&res->queue); | |
1609 | res->scsi_dev = NULL; | |
1610 | res->reset_progress = 0; | |
1611 | list_add_tail(&res->queue, &pinstance->used_res_q); | |
1612 | } | |
1613 | ||
c20c4267 | 1614 | memcpy(&res->cfg_entry, cfg_entry, pinstance->config_table_entry_size); |
89a36810 AR |
1615 | |
1616 | if (pinstance->ccn.hcam->notification_type == | |
729c8456 | 1617 | NOTIFICATION_TYPE_ENTRY_DELETED || hidden_entry) { |
89a36810 | 1618 | if (res->scsi_dev) { |
c20c4267 AR |
1619 | if (fw_version <= PMCRAID_FW_VERSION_1) |
1620 | res->cfg_entry.unique_flags1 &= 0x7F; | |
1621 | else | |
45c80be6 | 1622 | res->cfg_entry.array_id &= cpu_to_le16(0xFF); |
89a36810 AR |
1623 | res->change_detected = RES_CHANGE_DEL; |
1624 | res->cfg_entry.resource_handle = | |
1625 | PMCRAID_INVALID_RES_HANDLE; | |
1626 | schedule_work(&pinstance->worker_q); | |
1627 | } else { | |
1628 | /* This may be one of the non-exposed resources */ | |
1629 | list_move_tail(&res->queue, &pinstance->free_res_q); | |
1630 | } | |
1631 | } else if (!res->scsi_dev) { | |
1632 | res->change_detected = RES_CHANGE_ADD; | |
1633 | schedule_work(&pinstance->worker_q); | |
1634 | } | |
1635 | spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags); | |
1636 | ||
1637 | out_notify_apps: | |
1638 | ||
1639 | /* Notify configuration changes to registered applications.*/ | |
1640 | if (!pmcraid_disable_aen) | |
c20c4267 | 1641 | pmcraid_notify_ccn(pinstance); |
89a36810 AR |
1642 | |
1643 | cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE); | |
1644 | if (cmd) | |
1645 | pmcraid_send_hcam_cmd(cmd); | |
1646 | } | |
1647 | ||
1648 | /** | |
1649 | * pmcraid_get_error_info - return error string for an ioasc | |
1650 | * @ioasc: ioasc code | |
1651 | * Return Value | |
1652 | * none | |
1653 | */ | |
1654 | static struct pmcraid_ioasc_error *pmcraid_get_error_info(u32 ioasc) | |
1655 | { | |
1656 | int i; | |
1657 | for (i = 0; i < ARRAY_SIZE(pmcraid_ioasc_error_table); i++) { | |
1658 | if (pmcraid_ioasc_error_table[i].ioasc_code == ioasc) | |
1659 | return &pmcraid_ioasc_error_table[i]; | |
1660 | } | |
1661 | return NULL; | |
1662 | } | |
1663 | ||
1664 | /** | |
1665 | * pmcraid_ioasc_logger - log IOASC information based user-settings | |
1666 | * @ioasc: ioasc code | |
1667 | * @cmd: pointer to command that resulted in 'ioasc' | |
1668 | */ | |
61b96d5b | 1669 | static void pmcraid_ioasc_logger(u32 ioasc, struct pmcraid_cmd *cmd) |
89a36810 AR |
1670 | { |
1671 | struct pmcraid_ioasc_error *error_info = pmcraid_get_error_info(ioasc); | |
1672 | ||
1673 | if (error_info == NULL || | |
1674 | cmd->drv_inst->current_log_level < error_info->log_level) | |
1675 | return; | |
1676 | ||
1677 | /* log the error string */ | |
c20c4267 | 1678 | pmcraid_err("cmd [%x] for resource %x failed with %x(%s)\n", |
89a36810 | 1679 | cmd->ioa_cb->ioarcb.cdb[0], |
45c80be6 AB |
1680 | le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle), |
1681 | ioasc, error_info->error_string); | |
89a36810 AR |
1682 | } |
1683 | ||
1684 | /** | |
1685 | * pmcraid_handle_error_log - Handle a config change (error log) from the IOA | |
1686 | * | |
1687 | * @pinstance: pointer to per adapter instance structure | |
1688 | * | |
1689 | * Return value: | |
1690 | * none | |
1691 | */ | |
1692 | static void pmcraid_handle_error_log(struct pmcraid_instance *pinstance) | |
1693 | { | |
1694 | struct pmcraid_hcam_ldn *hcam_ldn; | |
1695 | u32 ioasc; | |
1696 | ||
1697 | hcam_ldn = (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam; | |
1698 | ||
1699 | pmcraid_info | |
1700 | ("LDN(%x): %x type: %x lost: %x flags: %x overlay id: %x\n", | |
1701 | pinstance->ldn.hcam->ilid, | |
1702 | pinstance->ldn.hcam->op_code, | |
1703 | pinstance->ldn.hcam->notification_type, | |
1704 | pinstance->ldn.hcam->notification_lost, | |
1705 | pinstance->ldn.hcam->flags, | |
1706 | pinstance->ldn.hcam->overlay_id); | |
1707 | ||
1708 | /* log only the errors, no need to log informational log entries */ | |
1709 | if (pinstance->ldn.hcam->notification_type != | |
1710 | NOTIFICATION_TYPE_ERROR_LOG) | |
1711 | return; | |
1712 | ||
1713 | if (pinstance->ldn.hcam->notification_lost == | |
1714 | HOSTRCB_NOTIFICATIONS_LOST) | |
34876402 | 1715 | dev_info(&pinstance->pdev->dev, "Error notifications lost\n"); |
89a36810 AR |
1716 | |
1717 | ioasc = le32_to_cpu(hcam_ldn->error_log.fd_ioasc); | |
1718 | ||
1719 | if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET || | |
1720 | ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER) { | |
34876402 | 1721 | dev_info(&pinstance->pdev->dev, |
89a36810 AR |
1722 | "UnitAttention due to IOA Bus Reset\n"); |
1723 | scsi_report_bus_reset( | |
1724 | pinstance->host, | |
1725 | RES_BUS(hcam_ldn->error_log.fd_ra)); | |
1726 | } | |
1727 | ||
1728 | return; | |
1729 | } | |
1730 | ||
1731 | /** | |
1732 | * pmcraid_process_ccn - Op done function for a CCN. | |
1733 | * @cmd: pointer to command struct | |
1734 | * | |
1735 | * This function is the op done function for a configuration | |
1736 | * change notification | |
1737 | * | |
1738 | * Return value: | |
1739 | * none | |
1740 | */ | |
1741 | static void pmcraid_process_ccn(struct pmcraid_cmd *cmd) | |
1742 | { | |
1743 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
1744 | u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); | |
1745 | unsigned long lock_flags; | |
1746 | ||
1747 | pinstance->ccn.cmd = NULL; | |
1748 | pmcraid_return_cmd(cmd); | |
1749 | ||
1750 | /* If driver initiated IOA reset happened while this hcam was pending | |
1751 | * with IOA, or IOA bringdown sequence is in progress, no need to | |
1752 | * re-register the hcam | |
1753 | */ | |
1754 | if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET || | |
1755 | atomic_read(&pinstance->ccn.ignore) == 1) { | |
1756 | return; | |
1757 | } else if (ioasc) { | |
34876402 | 1758 | dev_info(&pinstance->pdev->dev, |
89a36810 AR |
1759 | "Host RCB (CCN) failed with IOASC: 0x%08X\n", ioasc); |
1760 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
1761 | pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE); | |
1762 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
1763 | } else { | |
1764 | pmcraid_handle_config_change(pinstance); | |
1765 | } | |
1766 | } | |
1767 | ||
3673b7b0 LJ |
1768 | static void pmcraid_initiate_reset(struct pmcraid_instance *); |
1769 | static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd); | |
89a36810 AR |
1770 | /** |
1771 | * pmcraid_process_ldn - op done function for an LDN | |
1772 | * @cmd: pointer to command block | |
1773 | * | |
1774 | * Return value | |
1775 | * none | |
1776 | */ | |
89a36810 AR |
1777 | static void pmcraid_process_ldn(struct pmcraid_cmd *cmd) |
1778 | { | |
1779 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
1780 | struct pmcraid_hcam_ldn *ldn_hcam = | |
1781 | (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam; | |
1782 | u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); | |
1783 | u32 fd_ioasc = le32_to_cpu(ldn_hcam->error_log.fd_ioasc); | |
1784 | unsigned long lock_flags; | |
1785 | ||
1786 | /* return the command block back to freepool */ | |
1787 | pinstance->ldn.cmd = NULL; | |
1788 | pmcraid_return_cmd(cmd); | |
1789 | ||
1790 | /* If driver initiated IOA reset happened while this hcam was pending | |
1791 | * with IOA, no need to re-register the hcam as reset engine will do it | |
1792 | * once reset sequence is complete | |
1793 | */ | |
1794 | if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET || | |
1795 | atomic_read(&pinstance->ccn.ignore) == 1) { | |
1796 | return; | |
1797 | } else if (!ioasc) { | |
1798 | pmcraid_handle_error_log(pinstance); | |
1799 | if (fd_ioasc == PMCRAID_IOASC_NR_IOA_RESET_REQUIRED) { | |
1800 | spin_lock_irqsave(pinstance->host->host_lock, | |
1801 | lock_flags); | |
1802 | pmcraid_initiate_reset(pinstance); | |
1803 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
1804 | lock_flags); | |
1805 | return; | |
1806 | } | |
592488a3 AR |
1807 | if (fd_ioasc == PMCRAID_IOASC_TIME_STAMP_OUT_OF_SYNC) { |
1808 | pinstance->timestamp_error = 1; | |
1809 | pmcraid_set_timestamp(cmd); | |
1810 | } | |
89a36810 | 1811 | } else { |
34876402 | 1812 | dev_info(&pinstance->pdev->dev, |
89a36810 AR |
1813 | "Host RCB(LDN) failed with IOASC: 0x%08X\n", ioasc); |
1814 | } | |
1815 | /* send netlink message for HCAM notification if enabled */ | |
1816 | if (!pmcraid_disable_aen) | |
c20c4267 | 1817 | pmcraid_notify_ldn(pinstance); |
89a36810 AR |
1818 | |
1819 | cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA); | |
1820 | if (cmd) | |
1821 | pmcraid_send_hcam_cmd(cmd); | |
1822 | } | |
1823 | ||
1824 | /** | |
1825 | * pmcraid_register_hcams - register HCAMs for CCN and LDN | |
1826 | * | |
1827 | * @pinstance: pointer per adapter instance structure | |
1828 | * | |
1829 | * Return Value | |
1830 | * none | |
1831 | */ | |
1832 | static void pmcraid_register_hcams(struct pmcraid_instance *pinstance) | |
1833 | { | |
1834 | pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE); | |
1835 | pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA); | |
1836 | } | |
1837 | ||
1838 | /** | |
1839 | * pmcraid_unregister_hcams - cancel HCAMs registered already | |
1840 | * @cmd: pointer to command used as part of reset sequence | |
1841 | */ | |
1842 | static void pmcraid_unregister_hcams(struct pmcraid_cmd *cmd) | |
1843 | { | |
1844 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
1845 | ||
1846 | /* During IOA bringdown, HCAM gets fired and tasklet proceeds with | |
1847 | * handling hcam response though it is not necessary. In order to | |
1848 | * prevent this, set 'ignore', so that bring-down sequence doesn't | |
1849 | * re-send any more hcams | |
1850 | */ | |
1851 | atomic_set(&pinstance->ccn.ignore, 1); | |
1852 | atomic_set(&pinstance->ldn.ignore, 1); | |
1853 | ||
1854 | /* If adapter reset was forced as part of runtime reset sequence, | |
c20c4267 AR |
1855 | * start the reset sequence. Reset will be triggered even in case |
1856 | * IOA unit_check. | |
89a36810 | 1857 | */ |
c20c4267 AR |
1858 | if ((pinstance->force_ioa_reset && !pinstance->ioa_bringdown) || |
1859 | pinstance->ioa_unit_check) { | |
89a36810 | 1860 | pinstance->force_ioa_reset = 0; |
c20c4267 | 1861 | pinstance->ioa_unit_check = 0; |
89a36810 AR |
1862 | pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; |
1863 | pmcraid_reset_alert(cmd); | |
1864 | return; | |
1865 | } | |
1866 | ||
1867 | /* Driver tries to cancel HCAMs by sending ABORT TASK for each HCAM | |
1868 | * one after the other. So CCN cancellation will be triggered by | |
1869 | * pmcraid_cancel_ldn itself. | |
1870 | */ | |
1871 | pmcraid_cancel_ldn(cmd); | |
1872 | } | |
1873 | ||
3673b7b0 LJ |
1874 | static void pmcraid_reinit_buffers(struct pmcraid_instance *); |
1875 | ||
89a36810 AR |
1876 | /** |
1877 | * pmcraid_reset_enable_ioa - re-enable IOA after a hard reset | |
1878 | * @pinstance: pointer to adapter instance structure | |
1879 | * Return Value | |
1880 | * 1 if TRANSITION_TO_OPERATIONAL is active, otherwise 0 | |
1881 | */ | |
89a36810 AR |
1882 | static int pmcraid_reset_enable_ioa(struct pmcraid_instance *pinstance) |
1883 | { | |
1884 | u32 intrs; | |
1885 | ||
1886 | pmcraid_reinit_buffers(pinstance); | |
1887 | intrs = pmcraid_read_interrupts(pinstance); | |
1888 | ||
1889 | pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS); | |
1890 | ||
1891 | if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) { | |
c20c4267 AR |
1892 | if (!pinstance->interrupt_mode) { |
1893 | iowrite32(INTRS_TRANSITION_TO_OPERATIONAL, | |
1894 | pinstance->int_regs. | |
1895 | ioa_host_interrupt_mask_reg); | |
1896 | iowrite32(INTRS_TRANSITION_TO_OPERATIONAL, | |
1897 | pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
1898 | } | |
89a36810 AR |
1899 | return 1; |
1900 | } else { | |
1901 | return 0; | |
1902 | } | |
1903 | } | |
1904 | ||
1905 | /** | |
1906 | * pmcraid_soft_reset - performs a soft reset and makes IOA become ready | |
1907 | * @cmd : pointer to reset command block | |
1908 | * | |
1909 | * Return Value | |
1910 | * none | |
1911 | */ | |
1912 | static void pmcraid_soft_reset(struct pmcraid_cmd *cmd) | |
1913 | { | |
1914 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
1915 | u32 int_reg; | |
1916 | u32 doorbell; | |
1917 | ||
1918 | /* There will be an interrupt when Transition to Operational bit is | |
1919 | * set so tasklet would execute next reset task. The timeout handler | |
1920 | * would re-initiate a reset | |
1921 | */ | |
1922 | cmd->cmd_done = pmcraid_ioa_reset; | |
89a36810 AR |
1923 | cmd->timer.expires = jiffies + |
1924 | msecs_to_jiffies(PMCRAID_TRANSOP_TIMEOUT); | |
841b86f3 | 1925 | cmd->timer.function = pmcraid_timeout_handler; |
89a36810 AR |
1926 | |
1927 | if (!timer_pending(&cmd->timer)) | |
1928 | add_timer(&cmd->timer); | |
1929 | ||
1930 | /* Enable destructive diagnostics on IOA if it is not yet in | |
1931 | * operational state | |
1932 | */ | |
1933 | doorbell = DOORBELL_RUNTIME_RESET | | |
1934 | DOORBELL_ENABLE_DESTRUCTIVE_DIAGS; | |
1935 | ||
c20c4267 AR |
1936 | /* Since we do RESET_ALERT and Start BIST we have to again write |
1937 | * MSIX Doorbell to indicate the interrupt mode | |
1938 | */ | |
1939 | if (pinstance->interrupt_mode) { | |
1940 | iowrite32(DOORBELL_INTR_MODE_MSIX, | |
1941 | pinstance->int_regs.host_ioa_interrupt_reg); | |
1942 | ioread32(pinstance->int_regs.host_ioa_interrupt_reg); | |
1943 | } | |
1944 | ||
89a36810 | 1945 | iowrite32(doorbell, pinstance->int_regs.host_ioa_interrupt_reg); |
c20c4267 | 1946 | ioread32(pinstance->int_regs.host_ioa_interrupt_reg), |
89a36810 | 1947 | int_reg = ioread32(pinstance->int_regs.ioa_host_interrupt_reg); |
c20c4267 | 1948 | |
89a36810 AR |
1949 | pmcraid_info("Waiting for IOA to become operational %x:%x\n", |
1950 | ioread32(pinstance->int_regs.host_ioa_interrupt_reg), | |
1951 | int_reg); | |
1952 | } | |
1953 | ||
1954 | /** | |
1955 | * pmcraid_get_dump - retrieves IOA dump in case of Unit Check interrupt | |
1956 | * | |
1957 | * @pinstance: pointer to adapter instance structure | |
1958 | * | |
1959 | * Return Value | |
1960 | * none | |
1961 | */ | |
1962 | static void pmcraid_get_dump(struct pmcraid_instance *pinstance) | |
1963 | { | |
1964 | pmcraid_info("%s is not yet implemented\n", __func__); | |
1965 | } | |
1966 | ||
1967 | /** | |
1968 | * pmcraid_fail_outstanding_cmds - Fails all outstanding ops. | |
1969 | * @pinstance: pointer to adapter instance structure | |
1970 | * | |
1971 | * This function fails all outstanding ops. If they are submitted to IOA | |
1972 | * already, it sends cancel all messages if IOA is still accepting IOARCBs, | |
1973 | * otherwise just completes the commands and returns the cmd blocks to free | |
1974 | * pool. | |
1975 | * | |
1976 | * Return value: | |
1977 | * none | |
1978 | */ | |
1979 | static void pmcraid_fail_outstanding_cmds(struct pmcraid_instance *pinstance) | |
1980 | { | |
1981 | struct pmcraid_cmd *cmd, *temp; | |
1982 | unsigned long lock_flags; | |
1983 | ||
1984 | /* pending command list is protected by pending_pool_lock. Its | |
1985 | * traversal must be done as within this lock | |
1986 | */ | |
1987 | spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags); | |
1988 | list_for_each_entry_safe(cmd, temp, &pinstance->pending_cmd_pool, | |
1989 | free_list) { | |
1990 | list_del(&cmd->free_list); | |
1991 | spin_unlock_irqrestore(&pinstance->pending_pool_lock, | |
1992 | lock_flags); | |
1993 | cmd->ioa_cb->ioasa.ioasc = | |
1994 | cpu_to_le32(PMCRAID_IOASC_IOA_WAS_RESET); | |
1995 | cmd->ioa_cb->ioasa.ilid = | |
45c80be6 | 1996 | cpu_to_le32(PMCRAID_DRIVER_ILID); |
89a36810 AR |
1997 | |
1998 | /* In case the command timer is still running */ | |
1999 | del_timer(&cmd->timer); | |
2000 | ||
2001 | /* If this is an IO command, complete it by invoking scsi_done | |
2002 | * function. If this is one of the internal commands other | |
2003 | * than pmcraid_ioa_reset and HCAM commands invoke cmd_done to | |
2004 | * complete it | |
2005 | */ | |
2006 | if (cmd->scsi_cmd) { | |
2007 | ||
2008 | struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; | |
2009 | __le32 resp = cmd->ioa_cb->ioarcb.response_handle; | |
2010 | ||
2011 | scsi_cmd->result |= DID_ERROR << 16; | |
2012 | ||
2013 | scsi_dma_unmap(scsi_cmd); | |
2014 | pmcraid_return_cmd(cmd); | |
2015 | ||
89a36810 AR |
2016 | pmcraid_info("failing(%d) CDB[0] = %x result: %x\n", |
2017 | le32_to_cpu(resp) >> 2, | |
2018 | cmd->ioa_cb->ioarcb.cdb[0], | |
2019 | scsi_cmd->result); | |
f13cc234 | 2020 | scsi_done(scsi_cmd); |
89a36810 AR |
2021 | } else if (cmd->cmd_done == pmcraid_internal_done || |
2022 | cmd->cmd_done == pmcraid_erp_done) { | |
2023 | cmd->cmd_done(cmd); | |
c20c4267 AR |
2024 | } else if (cmd->cmd_done != pmcraid_ioa_reset && |
2025 | cmd->cmd_done != pmcraid_ioa_shutdown_done) { | |
89a36810 AR |
2026 | pmcraid_return_cmd(cmd); |
2027 | } | |
2028 | ||
2029 | atomic_dec(&pinstance->outstanding_cmds); | |
2030 | spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags); | |
2031 | } | |
2032 | ||
2033 | spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags); | |
2034 | } | |
2035 | ||
2036 | /** | |
2037 | * pmcraid_ioa_reset - Implementation of IOA reset logic | |
2038 | * | |
2039 | * @cmd: pointer to the cmd block to be used for entire reset process | |
2040 | * | |
2041 | * This function executes most of the steps required for IOA reset. This gets | |
2042 | * called by user threads (modprobe/insmod/rmmod) timer, tasklet and midlayer's | |
25985edc | 2043 | * 'eh_' thread. Access to variables used for controlling the reset sequence is |
89a36810 AR |
2044 | * synchronized using host lock. Various functions called during reset process |
2045 | * would make use of a single command block, pointer to which is also stored in | |
2046 | * adapter instance structure. | |
2047 | * | |
2048 | * Return Value | |
2049 | * None | |
2050 | */ | |
2051 | static void pmcraid_ioa_reset(struct pmcraid_cmd *cmd) | |
2052 | { | |
2053 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
2054 | u8 reset_complete = 0; | |
2055 | ||
2056 | pinstance->ioa_reset_in_progress = 1; | |
2057 | ||
2058 | if (pinstance->reset_cmd != cmd) { | |
2059 | pmcraid_err("reset is called with different command block\n"); | |
2060 | pinstance->reset_cmd = cmd; | |
2061 | } | |
2062 | ||
2063 | pmcraid_info("reset_engine: state = %d, command = %p\n", | |
2064 | pinstance->ioa_state, cmd); | |
2065 | ||
2066 | switch (pinstance->ioa_state) { | |
2067 | ||
2068 | case IOA_STATE_DEAD: | |
2069 | /* If IOA is offline, whatever may be the reset reason, just | |
2070 | * return. callers might be waiting on the reset wait_q, wake | |
2071 | * up them | |
2072 | */ | |
2073 | pmcraid_err("IOA is offline no reset is possible\n"); | |
2074 | reset_complete = 1; | |
2075 | break; | |
2076 | ||
2077 | case IOA_STATE_IN_BRINGDOWN: | |
2078 | /* we enter here, once ioa shutdown command is processed by IOA | |
2079 | * Alert IOA for a possible reset. If reset alert fails, IOA | |
2080 | * goes through hard-reset | |
2081 | */ | |
2082 | pmcraid_disable_interrupts(pinstance, ~0); | |
2083 | pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; | |
2084 | pmcraid_reset_alert(cmd); | |
2085 | break; | |
2086 | ||
2087 | case IOA_STATE_UNKNOWN: | |
2088 | /* We may be called during probe or resume. Some pre-processing | |
2089 | * is required for prior to reset | |
2090 | */ | |
2091 | scsi_block_requests(pinstance->host); | |
2092 | ||
2093 | /* If asked to reset while IOA was processing responses or | |
2094 | * there are any error responses then IOA may require | |
2095 | * hard-reset. | |
2096 | */ | |
2097 | if (pinstance->ioa_hard_reset == 0) { | |
2098 | if (ioread32(pinstance->ioa_status) & | |
2099 | INTRS_TRANSITION_TO_OPERATIONAL) { | |
2100 | pmcraid_info("sticky bit set, bring-up\n"); | |
2101 | pinstance->ioa_state = IOA_STATE_IN_BRINGUP; | |
2102 | pmcraid_reinit_cmdblk(cmd); | |
2103 | pmcraid_identify_hrrq(cmd); | |
2104 | } else { | |
2105 | pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET; | |
2106 | pmcraid_soft_reset(cmd); | |
2107 | } | |
2108 | } else { | |
2109 | /* Alert IOA of a possible reset and wait for critical | |
2110 | * operation in progress bit to reset | |
2111 | */ | |
2112 | pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; | |
2113 | pmcraid_reset_alert(cmd); | |
2114 | } | |
2115 | break; | |
2116 | ||
2117 | case IOA_STATE_IN_RESET_ALERT: | |
2118 | /* If critical operation in progress bit is reset or wait gets | |
2119 | * timed out, reset proceeds with starting BIST on the IOA. | |
2120 | * pmcraid_ioa_hard_reset keeps a count of reset attempts. If | |
2121 | * they are 3 or more, reset engine marks IOA dead and returns | |
2122 | */ | |
2123 | pinstance->ioa_state = IOA_STATE_IN_HARD_RESET; | |
2124 | pmcraid_start_bist(cmd); | |
2125 | break; | |
2126 | ||
2127 | case IOA_STATE_IN_HARD_RESET: | |
2128 | pinstance->ioa_reset_attempts++; | |
2129 | ||
2130 | /* retry reset if we haven't reached maximum allowed limit */ | |
2131 | if (pinstance->ioa_reset_attempts > PMCRAID_RESET_ATTEMPTS) { | |
2132 | pinstance->ioa_reset_attempts = 0; | |
2133 | pmcraid_err("IOA didn't respond marking it as dead\n"); | |
2134 | pinstance->ioa_state = IOA_STATE_DEAD; | |
c20c4267 AR |
2135 | |
2136 | if (pinstance->ioa_bringdown) | |
2137 | pmcraid_notify_ioastate(pinstance, | |
2138 | PMC_DEVICE_EVENT_SHUTDOWN_FAILED); | |
2139 | else | |
2140 | pmcraid_notify_ioastate(pinstance, | |
2141 | PMC_DEVICE_EVENT_RESET_FAILED); | |
89a36810 AR |
2142 | reset_complete = 1; |
2143 | break; | |
2144 | } | |
2145 | ||
2146 | /* Once either bist or pci reset is done, restore PCI config | |
2147 | * space. If this fails, proceed with hard reset again | |
2148 | */ | |
1d3c16a8 | 2149 | pci_restore_state(pinstance->pdev); |
89a36810 AR |
2150 | |
2151 | /* fail all pending commands */ | |
2152 | pmcraid_fail_outstanding_cmds(pinstance); | |
2153 | ||
2154 | /* check if unit check is active, if so extract dump */ | |
2155 | if (pinstance->ioa_unit_check) { | |
2156 | pmcraid_info("unit check is active\n"); | |
2157 | pinstance->ioa_unit_check = 0; | |
2158 | pmcraid_get_dump(pinstance); | |
2159 | pinstance->ioa_reset_attempts--; | |
2160 | pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; | |
2161 | pmcraid_reset_alert(cmd); | |
2162 | break; | |
2163 | } | |
2164 | ||
2165 | /* if the reset reason is to bring-down the ioa, we might be | |
2166 | * done with the reset restore pci_config_space and complete | |
2167 | * the reset | |
2168 | */ | |
2169 | if (pinstance->ioa_bringdown) { | |
2170 | pmcraid_info("bringing down the adapter\n"); | |
2171 | pinstance->ioa_shutdown_type = SHUTDOWN_NONE; | |
2172 | pinstance->ioa_bringdown = 0; | |
2173 | pinstance->ioa_state = IOA_STATE_UNKNOWN; | |
c20c4267 AR |
2174 | pmcraid_notify_ioastate(pinstance, |
2175 | PMC_DEVICE_EVENT_SHUTDOWN_SUCCESS); | |
89a36810 AR |
2176 | reset_complete = 1; |
2177 | } else { | |
2178 | /* bring-up IOA, so proceed with soft reset | |
2179 | * Reinitialize hrrq_buffers and their indices also | |
2180 | * enable interrupts after a pci_restore_state | |
2181 | */ | |
2182 | if (pmcraid_reset_enable_ioa(pinstance)) { | |
2183 | pinstance->ioa_state = IOA_STATE_IN_BRINGUP; | |
2184 | pmcraid_info("bringing up the adapter\n"); | |
2185 | pmcraid_reinit_cmdblk(cmd); | |
2186 | pmcraid_identify_hrrq(cmd); | |
2187 | } else { | |
2188 | pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET; | |
2189 | pmcraid_soft_reset(cmd); | |
2190 | } | |
2191 | } | |
2192 | break; | |
2193 | ||
2194 | case IOA_STATE_IN_SOFT_RESET: | |
2195 | /* TRANSITION TO OPERATIONAL is on so start initialization | |
2196 | * sequence | |
2197 | */ | |
2198 | pmcraid_info("In softreset proceeding with bring-up\n"); | |
2199 | pinstance->ioa_state = IOA_STATE_IN_BRINGUP; | |
2200 | ||
2201 | /* Initialization commands start with HRRQ identification. From | |
2202 | * now on tasklet completes most of the commands as IOA is up | |
2203 | * and intrs are enabled | |
2204 | */ | |
2205 | pmcraid_identify_hrrq(cmd); | |
2206 | break; | |
2207 | ||
2208 | case IOA_STATE_IN_BRINGUP: | |
2209 | /* we are done with bringing up of IOA, change the ioa_state to | |
2210 | * operational and wake up any waiters | |
2211 | */ | |
2212 | pinstance->ioa_state = IOA_STATE_OPERATIONAL; | |
2213 | reset_complete = 1; | |
2214 | break; | |
2215 | ||
2216 | case IOA_STATE_OPERATIONAL: | |
2217 | default: | |
2218 | /* When IOA is operational and a reset is requested, check for | |
2219 | * the reset reason. If reset is to bring down IOA, unregister | |
2220 | * HCAMs and initiate shutdown; if adapter reset is forced then | |
2221 | * restart reset sequence again | |
2222 | */ | |
2223 | if (pinstance->ioa_shutdown_type == SHUTDOWN_NONE && | |
2224 | pinstance->force_ioa_reset == 0) { | |
c20c4267 AR |
2225 | pmcraid_notify_ioastate(pinstance, |
2226 | PMC_DEVICE_EVENT_RESET_SUCCESS); | |
89a36810 AR |
2227 | reset_complete = 1; |
2228 | } else { | |
2229 | if (pinstance->ioa_shutdown_type != SHUTDOWN_NONE) | |
2230 | pinstance->ioa_state = IOA_STATE_IN_BRINGDOWN; | |
2231 | pmcraid_reinit_cmdblk(cmd); | |
2232 | pmcraid_unregister_hcams(cmd); | |
2233 | } | |
2234 | break; | |
2235 | } | |
2236 | ||
2237 | /* reset will be completed if ioa_state is either DEAD or UNKNOWN or | |
2238 | * OPERATIONAL. Reset all control variables used during reset, wake up | |
2239 | * any waiting threads and let the SCSI mid-layer send commands. Note | |
2240 | * that host_lock must be held before invoking scsi_report_bus_reset. | |
2241 | */ | |
2242 | if (reset_complete) { | |
2243 | pinstance->ioa_reset_in_progress = 0; | |
2244 | pinstance->ioa_reset_attempts = 0; | |
2245 | pinstance->reset_cmd = NULL; | |
2246 | pinstance->ioa_shutdown_type = SHUTDOWN_NONE; | |
2247 | pinstance->ioa_bringdown = 0; | |
2248 | pmcraid_return_cmd(cmd); | |
2249 | ||
2250 | /* If target state is to bring up the adapter, proceed with | |
2251 | * hcam registration and resource exposure to mid-layer. | |
2252 | */ | |
2253 | if (pinstance->ioa_state == IOA_STATE_OPERATIONAL) | |
2254 | pmcraid_register_hcams(pinstance); | |
2255 | ||
2256 | wake_up_all(&pinstance->reset_wait_q); | |
2257 | } | |
2258 | ||
2259 | return; | |
2260 | } | |
2261 | ||
2262 | /** | |
2263 | * pmcraid_initiate_reset - initiates reset sequence. This is called from | |
2264 | * ISR/tasklet during error interrupts including IOA unit check. If reset | |
2265 | * is already in progress, it just returns, otherwise initiates IOA reset | |
2266 | * to bring IOA up to operational state. | |
2267 | * | |
2268 | * @pinstance: pointer to adapter instance structure | |
2269 | * | |
2270 | * Return value | |
2271 | * none | |
2272 | */ | |
2273 | static void pmcraid_initiate_reset(struct pmcraid_instance *pinstance) | |
2274 | { | |
2275 | struct pmcraid_cmd *cmd; | |
2276 | ||
2277 | /* If the reset is already in progress, just return, otherwise start | |
2278 | * reset sequence and return | |
2279 | */ | |
2280 | if (!pinstance->ioa_reset_in_progress) { | |
2281 | scsi_block_requests(pinstance->host); | |
2282 | cmd = pmcraid_get_free_cmd(pinstance); | |
2283 | ||
2284 | if (cmd == NULL) { | |
2285 | pmcraid_err("no cmnd blocks for initiate_reset\n"); | |
2286 | return; | |
2287 | } | |
2288 | ||
2289 | pinstance->ioa_shutdown_type = SHUTDOWN_NONE; | |
2290 | pinstance->reset_cmd = cmd; | |
2291 | pinstance->force_ioa_reset = 1; | |
c20c4267 AR |
2292 | pmcraid_notify_ioastate(pinstance, |
2293 | PMC_DEVICE_EVENT_RESET_START); | |
89a36810 AR |
2294 | pmcraid_ioa_reset(cmd); |
2295 | } | |
2296 | } | |
2297 | ||
2298 | /** | |
2299 | * pmcraid_reset_reload - utility routine for doing IOA reset either to bringup | |
2300 | * or bringdown IOA | |
2301 | * @pinstance: pointer adapter instance structure | |
2302 | * @shutdown_type: shutdown type to be used NONE, NORMAL or ABRREV | |
2303 | * @target_state: expected target state after reset | |
2304 | * | |
2305 | * Note: This command initiates reset and waits for its completion. Hence this | |
2306 | * should not be called from isr/timer/tasklet functions (timeout handlers, | |
2307 | * error response handlers and interrupt handlers). | |
2308 | * | |
2309 | * Return Value | |
2310 | * 1 in case ioa_state is not target_state, 0 otherwise. | |
2311 | */ | |
2312 | static int pmcraid_reset_reload( | |
2313 | struct pmcraid_instance *pinstance, | |
2314 | u8 shutdown_type, | |
2315 | u8 target_state | |
2316 | ) | |
2317 | { | |
2318 | struct pmcraid_cmd *reset_cmd = NULL; | |
2319 | unsigned long lock_flags; | |
2320 | int reset = 1; | |
2321 | ||
2322 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
2323 | ||
2324 | if (pinstance->ioa_reset_in_progress) { | |
2325 | pmcraid_info("reset_reload: reset is already in progress\n"); | |
2326 | ||
2327 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
2328 | ||
2329 | wait_event(pinstance->reset_wait_q, | |
2330 | !pinstance->ioa_reset_in_progress); | |
2331 | ||
2332 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
2333 | ||
2334 | if (pinstance->ioa_state == IOA_STATE_DEAD) { | |
89a36810 | 2335 | pmcraid_info("reset_reload: IOA is dead\n"); |
91402608 CH |
2336 | goto out_unlock; |
2337 | } | |
2338 | ||
2339 | if (pinstance->ioa_state == target_state) { | |
89a36810 | 2340 | reset = 0; |
91402608 | 2341 | goto out_unlock; |
89a36810 AR |
2342 | } |
2343 | } | |
2344 | ||
91402608 CH |
2345 | pmcraid_info("reset_reload: proceeding with reset\n"); |
2346 | scsi_block_requests(pinstance->host); | |
2347 | reset_cmd = pmcraid_get_free_cmd(pinstance); | |
2348 | if (reset_cmd == NULL) { | |
2349 | pmcraid_err("no free cmnd for reset_reload\n"); | |
2350 | goto out_unlock; | |
2351 | } | |
89a36810 | 2352 | |
91402608 CH |
2353 | if (shutdown_type == SHUTDOWN_NORMAL) |
2354 | pinstance->ioa_bringdown = 1; | |
89a36810 | 2355 | |
91402608 CH |
2356 | pinstance->ioa_shutdown_type = shutdown_type; |
2357 | pinstance->reset_cmd = reset_cmd; | |
2358 | pinstance->force_ioa_reset = reset; | |
2359 | pmcraid_info("reset_reload: initiating reset\n"); | |
2360 | pmcraid_ioa_reset(reset_cmd); | |
2361 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
2362 | pmcraid_info("reset_reload: waiting for reset to complete\n"); | |
2363 | wait_event(pinstance->reset_wait_q, | |
2364 | !pinstance->ioa_reset_in_progress); | |
89a36810 | 2365 | |
91402608 CH |
2366 | pmcraid_info("reset_reload: reset is complete !!\n"); |
2367 | scsi_unblock_requests(pinstance->host); | |
2368 | return pinstance->ioa_state != target_state; | |
89a36810 | 2369 | |
91402608 CH |
2370 | out_unlock: |
2371 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
89a36810 AR |
2372 | return reset; |
2373 | } | |
2374 | ||
2375 | /** | |
2376 | * pmcraid_reset_bringdown - wrapper over pmcraid_reset_reload to bringdown IOA | |
2377 | * | |
2378 | * @pinstance: pointer to adapter instance structure | |
2379 | * | |
2380 | * Return Value | |
2381 | * whatever is returned from pmcraid_reset_reload | |
2382 | */ | |
2383 | static int pmcraid_reset_bringdown(struct pmcraid_instance *pinstance) | |
2384 | { | |
2385 | return pmcraid_reset_reload(pinstance, | |
2386 | SHUTDOWN_NORMAL, | |
2387 | IOA_STATE_UNKNOWN); | |
2388 | } | |
2389 | ||
2390 | /** | |
2391 | * pmcraid_reset_bringup - wrapper over pmcraid_reset_reload to bring up IOA | |
2392 | * | |
2393 | * @pinstance: pointer to adapter instance structure | |
2394 | * | |
2395 | * Return Value | |
2396 | * whatever is returned from pmcraid_reset_reload | |
2397 | */ | |
2398 | static int pmcraid_reset_bringup(struct pmcraid_instance *pinstance) | |
2399 | { | |
c20c4267 AR |
2400 | pmcraid_notify_ioastate(pinstance, PMC_DEVICE_EVENT_RESET_START); |
2401 | ||
89a36810 AR |
2402 | return pmcraid_reset_reload(pinstance, |
2403 | SHUTDOWN_NONE, | |
2404 | IOA_STATE_OPERATIONAL); | |
2405 | } | |
2406 | ||
2407 | /** | |
2408 | * pmcraid_request_sense - Send request sense to a device | |
2409 | * @cmd: pmcraid command struct | |
2410 | * | |
2411 | * This function sends a request sense to a device as a result of a check | |
2412 | * condition. This method re-uses the same command block that failed earlier. | |
2413 | */ | |
2414 | static void pmcraid_request_sense(struct pmcraid_cmd *cmd) | |
2415 | { | |
2416 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
2417 | struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl; | |
a9b9e3ad | 2418 | struct device *dev = &cmd->drv_inst->pdev->dev; |
89a36810 | 2419 | |
a9b9e3ad CH |
2420 | cmd->sense_buffer = cmd->scsi_cmd->sense_buffer; |
2421 | cmd->sense_buffer_dma = dma_map_single(dev, cmd->sense_buffer, | |
2422 | SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE); | |
2423 | if (dma_mapping_error(dev, cmd->sense_buffer_dma)) { | |
89a36810 AR |
2424 | pmcraid_err |
2425 | ("couldn't allocate sense buffer for request sense\n"); | |
2426 | pmcraid_erp_done(cmd); | |
2427 | return; | |
2428 | } | |
2429 | ||
2430 | /* re-use the command block */ | |
2431 | memset(&cmd->ioa_cb->ioasa, 0, sizeof(struct pmcraid_ioasa)); | |
2432 | memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN); | |
2433 | ioarcb->request_flags0 = (SYNC_COMPLETE | | |
2434 | NO_LINK_DESCS | | |
2435 | INHIBIT_UL_CHECK); | |
2436 | ioarcb->request_type = REQ_TYPE_SCSI; | |
2437 | ioarcb->cdb[0] = REQUEST_SENSE; | |
2438 | ioarcb->cdb[4] = SCSI_SENSE_BUFFERSIZE; | |
2439 | ||
2440 | ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
2441 | offsetof(struct pmcraid_ioarcb, | |
2442 | add_data.u.ioadl[0])); | |
2443 | ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); | |
2444 | ||
2445 | ioarcb->data_transfer_length = cpu_to_le32(SCSI_SENSE_BUFFERSIZE); | |
2446 | ||
2447 | ioadl->address = cpu_to_le64(cmd->sense_buffer_dma); | |
2448 | ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE); | |
88197966 | 2449 | ioadl->flags = IOADL_FLAGS_LAST_DESC; |
89a36810 AR |
2450 | |
2451 | /* request sense might be called as part of error response processing | |
2452 | * which runs in tasklets context. It is possible that mid-layer might | |
2453 | * schedule queuecommand during this time, hence, writting to IOARRIN | |
2454 | * must be protect by host_lock | |
2455 | */ | |
2456 | pmcraid_send_cmd(cmd, pmcraid_erp_done, | |
2457 | PMCRAID_REQUEST_SENSE_TIMEOUT, | |
2458 | pmcraid_timeout_handler); | |
2459 | } | |
2460 | ||
2461 | /** | |
2462 | * pmcraid_cancel_all - cancel all outstanding IOARCBs as part of error recovery | |
2463 | * @cmd: command that failed | |
203654b4 | 2464 | * @need_sense: true if request_sense is required after cancel all |
89a36810 AR |
2465 | * |
2466 | * This function sends a cancel all to a device to clear the queue. | |
2467 | */ | |
203654b4 | 2468 | static void pmcraid_cancel_all(struct pmcraid_cmd *cmd, bool need_sense) |
89a36810 AR |
2469 | { |
2470 | struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; | |
2471 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
2472 | struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata; | |
89a36810 AR |
2473 | |
2474 | memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN); | |
2475 | ioarcb->request_flags0 = SYNC_OVERRIDE; | |
2476 | ioarcb->request_type = REQ_TYPE_IOACMD; | |
2477 | ioarcb->cdb[0] = PMCRAID_CANCEL_ALL_REQUESTS; | |
2478 | ||
2479 | if (RES_IS_GSCSI(res->cfg_entry)) | |
2480 | ioarcb->cdb[1] = PMCRAID_SYNC_COMPLETE_AFTER_CANCEL; | |
2481 | ||
2482 | ioarcb->ioadl_bus_addr = 0; | |
2483 | ioarcb->ioadl_length = 0; | |
2484 | ioarcb->data_transfer_length = 0; | |
45c80be6 | 2485 | ioarcb->ioarcb_bus_addr &= cpu_to_le64((~0x1FULL)); |
89a36810 AR |
2486 | |
2487 | /* writing to IOARRIN must be protected by host_lock, as mid-layer | |
2488 | * schedule queuecommand while we are doing this | |
2489 | */ | |
203654b4 CH |
2490 | pmcraid_send_cmd(cmd, need_sense ? |
2491 | pmcraid_erp_done : pmcraid_request_sense, | |
89a36810 AR |
2492 | PMCRAID_REQUEST_SENSE_TIMEOUT, |
2493 | pmcraid_timeout_handler); | |
2494 | } | |
2495 | ||
2496 | /** | |
2497 | * pmcraid_frame_auto_sense: frame fixed format sense information | |
2498 | * | |
2499 | * @cmd: pointer to failing command block | |
2500 | * | |
2501 | * Return value | |
2502 | * none | |
2503 | */ | |
2504 | static void pmcraid_frame_auto_sense(struct pmcraid_cmd *cmd) | |
2505 | { | |
2506 | u8 *sense_buf = cmd->scsi_cmd->sense_buffer; | |
2507 | struct pmcraid_resource_entry *res = cmd->scsi_cmd->device->hostdata; | |
2508 | struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa; | |
2509 | u32 ioasc = le32_to_cpu(ioasa->ioasc); | |
2510 | u32 failing_lba = 0; | |
2511 | ||
2512 | memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE); | |
2513 | cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION; | |
2514 | ||
2515 | if (RES_IS_VSET(res->cfg_entry) && | |
2516 | ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC && | |
2517 | ioasa->u.vset.failing_lba_hi != 0) { | |
2518 | ||
2519 | sense_buf[0] = 0x72; | |
2520 | sense_buf[1] = PMCRAID_IOASC_SENSE_KEY(ioasc); | |
2521 | sense_buf[2] = PMCRAID_IOASC_SENSE_CODE(ioasc); | |
2522 | sense_buf[3] = PMCRAID_IOASC_SENSE_QUAL(ioasc); | |
2523 | ||
2524 | sense_buf[7] = 12; | |
2525 | sense_buf[8] = 0; | |
2526 | sense_buf[9] = 0x0A; | |
2527 | sense_buf[10] = 0x80; | |
2528 | ||
2529 | failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_hi); | |
2530 | ||
2531 | sense_buf[12] = (failing_lba & 0xff000000) >> 24; | |
2532 | sense_buf[13] = (failing_lba & 0x00ff0000) >> 16; | |
2533 | sense_buf[14] = (failing_lba & 0x0000ff00) >> 8; | |
2534 | sense_buf[15] = failing_lba & 0x000000ff; | |
2535 | ||
2536 | failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_lo); | |
2537 | ||
2538 | sense_buf[16] = (failing_lba & 0xff000000) >> 24; | |
2539 | sense_buf[17] = (failing_lba & 0x00ff0000) >> 16; | |
2540 | sense_buf[18] = (failing_lba & 0x0000ff00) >> 8; | |
2541 | sense_buf[19] = failing_lba & 0x000000ff; | |
2542 | } else { | |
2543 | sense_buf[0] = 0x70; | |
2544 | sense_buf[2] = PMCRAID_IOASC_SENSE_KEY(ioasc); | |
2545 | sense_buf[12] = PMCRAID_IOASC_SENSE_CODE(ioasc); | |
2546 | sense_buf[13] = PMCRAID_IOASC_SENSE_QUAL(ioasc); | |
2547 | ||
2548 | if (ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC) { | |
2549 | if (RES_IS_VSET(res->cfg_entry)) | |
2550 | failing_lba = | |
2551 | le32_to_cpu(ioasa->u. | |
2552 | vset.failing_lba_lo); | |
2553 | sense_buf[0] |= 0x80; | |
2554 | sense_buf[3] = (failing_lba >> 24) & 0xff; | |
2555 | sense_buf[4] = (failing_lba >> 16) & 0xff; | |
2556 | sense_buf[5] = (failing_lba >> 8) & 0xff; | |
2557 | sense_buf[6] = failing_lba & 0xff; | |
2558 | } | |
2559 | ||
2560 | sense_buf[7] = 6; /* additional length */ | |
2561 | } | |
2562 | } | |
2563 | ||
2564 | /** | |
2565 | * pmcraid_error_handler - Error response handlers for a SCSI op | |
2566 | * @cmd: pointer to pmcraid_cmd that has failed | |
2567 | * | |
2568 | * This function determines whether or not to initiate ERP on the affected | |
2569 | * device. This is called from a tasklet, which doesn't hold any locks. | |
2570 | * | |
2571 | * Return value: | |
2572 | * 0 it caller can complete the request, otherwise 1 where in error | |
2573 | * handler itself completes the request and returns the command block | |
2574 | * back to free-pool | |
2575 | */ | |
2576 | static int pmcraid_error_handler(struct pmcraid_cmd *cmd) | |
2577 | { | |
2578 | struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; | |
2579 | struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata; | |
2580 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
2581 | struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa; | |
2582 | u32 ioasc = le32_to_cpu(ioasa->ioasc); | |
2583 | u32 masked_ioasc = ioasc & PMCRAID_IOASC_SENSE_MASK; | |
203654b4 | 2584 | bool sense_copied = false; |
89a36810 AR |
2585 | |
2586 | if (!res) { | |
2587 | pmcraid_info("resource pointer is NULL\n"); | |
2588 | return 0; | |
2589 | } | |
2590 | ||
2591 | /* If this was a SCSI read/write command keep count of errors */ | |
2592 | if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_READ_CMD) | |
2593 | atomic_inc(&res->read_failures); | |
2594 | else if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_WRITE_CMD) | |
2595 | atomic_inc(&res->write_failures); | |
2596 | ||
2597 | if (!RES_IS_GSCSI(res->cfg_entry) && | |
2598 | masked_ioasc != PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR) { | |
2599 | pmcraid_frame_auto_sense(cmd); | |
2600 | } | |
2601 | ||
2602 | /* Log IOASC/IOASA information based on user settings */ | |
2603 | pmcraid_ioasc_logger(ioasc, cmd); | |
2604 | ||
2605 | switch (masked_ioasc) { | |
2606 | ||
2607 | case PMCRAID_IOASC_AC_TERMINATED_BY_HOST: | |
2608 | scsi_cmd->result |= (DID_ABORT << 16); | |
2609 | break; | |
2610 | ||
2611 | case PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE: | |
2612 | case PMCRAID_IOASC_HW_CANNOT_COMMUNICATE: | |
2613 | scsi_cmd->result |= (DID_NO_CONNECT << 16); | |
2614 | break; | |
2615 | ||
2616 | case PMCRAID_IOASC_NR_SYNC_REQUIRED: | |
2617 | res->sync_reqd = 1; | |
2618 | scsi_cmd->result |= (DID_IMM_RETRY << 16); | |
2619 | break; | |
2620 | ||
2621 | case PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC: | |
2622 | scsi_cmd->result |= (DID_PASSTHROUGH << 16); | |
2623 | break; | |
2624 | ||
2625 | case PMCRAID_IOASC_UA_BUS_WAS_RESET: | |
2626 | case PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER: | |
2627 | if (!res->reset_progress) | |
2628 | scsi_report_bus_reset(pinstance->host, | |
2629 | scsi_cmd->device->channel); | |
2630 | scsi_cmd->result |= (DID_ERROR << 16); | |
2631 | break; | |
2632 | ||
2633 | case PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR: | |
2634 | scsi_cmd->result |= PMCRAID_IOASC_SENSE_STATUS(ioasc); | |
2635 | res->sync_reqd = 1; | |
2636 | ||
2637 | /* if check_condition is not active return with error otherwise | |
2638 | * get/frame the sense buffer | |
2639 | */ | |
2640 | if (PMCRAID_IOASC_SENSE_STATUS(ioasc) != | |
2641 | SAM_STAT_CHECK_CONDITION && | |
2642 | PMCRAID_IOASC_SENSE_STATUS(ioasc) != SAM_STAT_ACA_ACTIVE) | |
2643 | return 0; | |
2644 | ||
2645 | /* If we have auto sense data as part of IOASA pass it to | |
2646 | * mid-layer | |
2647 | */ | |
2648 | if (ioasa->auto_sense_length != 0) { | |
45c80be6 AB |
2649 | short sense_len = le16_to_cpu(ioasa->auto_sense_length); |
2650 | int data_size = min_t(u16, sense_len, | |
89a36810 AR |
2651 | SCSI_SENSE_BUFFERSIZE); |
2652 | ||
2653 | memcpy(scsi_cmd->sense_buffer, | |
2654 | ioasa->sense_data, | |
2655 | data_size); | |
203654b4 | 2656 | sense_copied = true; |
89a36810 AR |
2657 | } |
2658 | ||
a70757ba | 2659 | if (RES_IS_GSCSI(res->cfg_entry)) |
89a36810 | 2660 | pmcraid_cancel_all(cmd, sense_copied); |
a70757ba | 2661 | else if (sense_copied) |
89a36810 | 2662 | pmcraid_erp_done(cmd); |
a70757ba | 2663 | else |
89a36810 | 2664 | pmcraid_request_sense(cmd); |
89a36810 AR |
2665 | |
2666 | return 1; | |
2667 | ||
2668 | case PMCRAID_IOASC_NR_INIT_CMD_REQUIRED: | |
2669 | break; | |
2670 | ||
2671 | default: | |
2672 | if (PMCRAID_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR) | |
2673 | scsi_cmd->result |= (DID_ERROR << 16); | |
2674 | break; | |
2675 | } | |
2676 | return 0; | |
2677 | } | |
2678 | ||
2679 | /** | |
2680 | * pmcraid_reset_device - device reset handler functions | |
2681 | * | |
2682 | * @scsi_cmd: scsi command struct | |
3673b7b0 | 2683 | * @timeout: command timeout |
89a36810 AR |
2684 | * @modifier: reset modifier indicating the reset sequence to be performed |
2685 | * | |
2686 | * This function issues a device reset to the affected device. | |
2687 | * A LUN reset will be sent to the device first. If that does | |
2688 | * not work, a target reset will be sent. | |
2689 | * | |
2690 | * Return value: | |
2691 | * SUCCESS / FAILED | |
2692 | */ | |
2693 | static int pmcraid_reset_device( | |
2694 | struct scsi_cmnd *scsi_cmd, | |
2695 | unsigned long timeout, | |
3673b7b0 | 2696 | u8 modifier) |
89a36810 AR |
2697 | { |
2698 | struct pmcraid_cmd *cmd; | |
2699 | struct pmcraid_instance *pinstance; | |
2700 | struct pmcraid_resource_entry *res; | |
2701 | struct pmcraid_ioarcb *ioarcb; | |
2702 | unsigned long lock_flags; | |
2703 | u32 ioasc; | |
2704 | ||
2705 | pinstance = | |
2706 | (struct pmcraid_instance *)scsi_cmd->device->host->hostdata; | |
2707 | res = scsi_cmd->device->hostdata; | |
2708 | ||
2709 | if (!res) { | |
34876402 AR |
2710 | sdev_printk(KERN_ERR, scsi_cmd->device, |
2711 | "reset_device: NULL resource pointer\n"); | |
89a36810 AR |
2712 | return FAILED; |
2713 | } | |
2714 | ||
2715 | /* If adapter is currently going through reset/reload, return failed. | |
2716 | * This will force the mid-layer to call _eh_bus/host reset, which | |
2717 | * will then go to sleep and wait for the reset to complete | |
2718 | */ | |
2719 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
2720 | if (pinstance->ioa_reset_in_progress || | |
2721 | pinstance->ioa_state == IOA_STATE_DEAD) { | |
2722 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
2723 | return FAILED; | |
2724 | } | |
2725 | ||
2726 | res->reset_progress = 1; | |
2727 | pmcraid_info("Resetting %s resource with addr %x\n", | |
2728 | ((modifier & RESET_DEVICE_LUN) ? "LUN" : | |
2729 | ((modifier & RESET_DEVICE_TARGET) ? "TARGET" : "BUS")), | |
2730 | le32_to_cpu(res->cfg_entry.resource_address)); | |
2731 | ||
2732 | /* get a free cmd block */ | |
2733 | cmd = pmcraid_get_free_cmd(pinstance); | |
2734 | ||
2735 | if (cmd == NULL) { | |
2736 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
2737 | pmcraid_err("%s: no cmd blocks are available\n", __func__); | |
2738 | return FAILED; | |
2739 | } | |
2740 | ||
2741 | ioarcb = &cmd->ioa_cb->ioarcb; | |
2742 | ioarcb->resource_handle = res->cfg_entry.resource_handle; | |
2743 | ioarcb->request_type = REQ_TYPE_IOACMD; | |
2744 | ioarcb->cdb[0] = PMCRAID_RESET_DEVICE; | |
2745 | ||
2746 | /* Initialize reset modifier bits */ | |
2747 | if (modifier) | |
2748 | modifier = ENABLE_RESET_MODIFIER | modifier; | |
2749 | ||
2750 | ioarcb->cdb[1] = modifier; | |
2751 | ||
2752 | init_completion(&cmd->wait_for_completion); | |
2753 | cmd->completion_req = 1; | |
2754 | ||
2755 | pmcraid_info("cmd(CDB[0] = %x) for %x with index = %d\n", | |
2756 | cmd->ioa_cb->ioarcb.cdb[0], | |
2757 | le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle), | |
2758 | le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2); | |
2759 | ||
2760 | pmcraid_send_cmd(cmd, | |
2761 | pmcraid_internal_done, | |
2762 | timeout, | |
2763 | pmcraid_timeout_handler); | |
2764 | ||
2765 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
2766 | ||
2767 | /* RESET_DEVICE command completes after all pending IOARCBs are | |
2768 | * completed. Once this command is completed, pmcraind_internal_done | |
2769 | * will wake up the 'completion' queue. | |
2770 | */ | |
2771 | wait_for_completion(&cmd->wait_for_completion); | |
2772 | ||
2773 | /* complete the command here itself and return the command block | |
2774 | * to free list | |
2775 | */ | |
2776 | pmcraid_return_cmd(cmd); | |
2777 | res->reset_progress = 0; | |
2778 | ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); | |
2779 | ||
2780 | /* set the return value based on the returned ioasc */ | |
2781 | return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS; | |
2782 | } | |
2783 | ||
2784 | /** | |
2785 | * _pmcraid_io_done - helper for pmcraid_io_done function | |
2786 | * | |
2787 | * @cmd: pointer to pmcraid command struct | |
2788 | * @reslen: residual data length to be set in the ioasa | |
2789 | * @ioasc: ioasc either returned by IOA or set by driver itself. | |
2790 | * | |
2791 | * This function is invoked by pmcraid_io_done to complete mid-layer | |
2792 | * scsi ops. | |
2793 | * | |
2794 | * Return value: | |
2795 | * 0 if caller is required to return it to free_pool. Returns 1 if | |
2796 | * caller need not worry about freeing command block as error handler | |
2797 | * will take care of that. | |
2798 | */ | |
2799 | ||
2800 | static int _pmcraid_io_done(struct pmcraid_cmd *cmd, int reslen, int ioasc) | |
2801 | { | |
2802 | struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; | |
2803 | int rc = 0; | |
2804 | ||
2805 | scsi_set_resid(scsi_cmd, reslen); | |
2806 | ||
2807 | pmcraid_info("response(%d) CDB[0] = %x ioasc:result: %x:%x\n", | |
2808 | le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2, | |
2809 | cmd->ioa_cb->ioarcb.cdb[0], | |
2810 | ioasc, scsi_cmd->result); | |
2811 | ||
2812 | if (PMCRAID_IOASC_SENSE_KEY(ioasc) != 0) | |
2813 | rc = pmcraid_error_handler(cmd); | |
2814 | ||
2815 | if (rc == 0) { | |
2816 | scsi_dma_unmap(scsi_cmd); | |
f13cc234 | 2817 | scsi_done(scsi_cmd); |
89a36810 AR |
2818 | } |
2819 | ||
2820 | return rc; | |
2821 | } | |
2822 | ||
2823 | /** | |
2824 | * pmcraid_io_done - SCSI completion function | |
2825 | * | |
2826 | * @cmd: pointer to pmcraid command struct | |
2827 | * | |
2828 | * This function is invoked by tasklet/mid-layer error handler to completing | |
2829 | * the SCSI ops sent from mid-layer. | |
2830 | * | |
2831 | * Return value | |
2832 | * none | |
2833 | */ | |
2834 | ||
2835 | static void pmcraid_io_done(struct pmcraid_cmd *cmd) | |
2836 | { | |
2837 | u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); | |
2838 | u32 reslen = le32_to_cpu(cmd->ioa_cb->ioasa.residual_data_length); | |
2839 | ||
2840 | if (_pmcraid_io_done(cmd, reslen, ioasc) == 0) | |
2841 | pmcraid_return_cmd(cmd); | |
2842 | } | |
2843 | ||
2844 | /** | |
2845 | * pmcraid_abort_cmd - Aborts a single IOARCB already submitted to IOA | |
2846 | * | |
2847 | * @cmd: command block of the command to be aborted | |
2848 | * | |
2849 | * Return Value: | |
2850 | * returns pointer to command structure used as cancelling cmd | |
2851 | */ | |
2852 | static struct pmcraid_cmd *pmcraid_abort_cmd(struct pmcraid_cmd *cmd) | |
2853 | { | |
2854 | struct pmcraid_cmd *cancel_cmd; | |
2855 | struct pmcraid_instance *pinstance; | |
89a36810 AR |
2856 | |
2857 | pinstance = (struct pmcraid_instance *)cmd->drv_inst; | |
89a36810 AR |
2858 | |
2859 | cancel_cmd = pmcraid_get_free_cmd(pinstance); | |
2860 | ||
2861 | if (cancel_cmd == NULL) { | |
2862 | pmcraid_err("%s: no cmd blocks are available\n", __func__); | |
2863 | return NULL; | |
2864 | } | |
2865 | ||
2866 | pmcraid_prepare_cancel_cmd(cancel_cmd, cmd); | |
2867 | ||
2868 | pmcraid_info("aborting command CDB[0]= %x with index = %d\n", | |
2869 | cmd->ioa_cb->ioarcb.cdb[0], | |
45c80be6 | 2870 | le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2); |
89a36810 AR |
2871 | |
2872 | init_completion(&cancel_cmd->wait_for_completion); | |
2873 | cancel_cmd->completion_req = 1; | |
2874 | ||
2875 | pmcraid_info("command (%d) CDB[0] = %x for %x\n", | |
2876 | le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.response_handle) >> 2, | |
c20c4267 | 2877 | cancel_cmd->ioa_cb->ioarcb.cdb[0], |
89a36810 AR |
2878 | le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.resource_handle)); |
2879 | ||
2880 | pmcraid_send_cmd(cancel_cmd, | |
2881 | pmcraid_internal_done, | |
2882 | PMCRAID_INTERNAL_TIMEOUT, | |
2883 | pmcraid_timeout_handler); | |
2884 | return cancel_cmd; | |
2885 | } | |
2886 | ||
2887 | /** | |
2888 | * pmcraid_abort_complete - Waits for ABORT TASK completion | |
2889 | * | |
2890 | * @cancel_cmd: command block use as cancelling command | |
2891 | * | |
2892 | * Return Value: | |
2893 | * returns SUCCESS if ABORT TASK has good completion | |
2894 | * otherwise FAILED | |
2895 | */ | |
2896 | static int pmcraid_abort_complete(struct pmcraid_cmd *cancel_cmd) | |
2897 | { | |
2898 | struct pmcraid_resource_entry *res; | |
2899 | u32 ioasc; | |
2900 | ||
2901 | wait_for_completion(&cancel_cmd->wait_for_completion); | |
c20c4267 AR |
2902 | res = cancel_cmd->res; |
2903 | cancel_cmd->res = NULL; | |
89a36810 AR |
2904 | ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc); |
2905 | ||
2906 | /* If the abort task is not timed out we will get a Good completion | |
2907 | * as sense_key, otherwise we may get one the following responses | |
25985edc | 2908 | * due to subsequent bus reset or device reset. In case IOASC is |
89a36810 AR |
2909 | * NR_SYNC_REQUIRED, set sync_reqd flag for the corresponding resource |
2910 | */ | |
2911 | if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET || | |
2912 | ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) { | |
2913 | if (ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) | |
2914 | res->sync_reqd = 1; | |
2915 | ioasc = 0; | |
2916 | } | |
2917 | ||
2918 | /* complete the command here itself */ | |
2919 | pmcraid_return_cmd(cancel_cmd); | |
2920 | return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS; | |
2921 | } | |
2922 | ||
2923 | /** | |
2924 | * pmcraid_eh_abort_handler - entry point for aborting a single task on errors | |
2925 | * | |
2926 | * @scsi_cmd: scsi command struct given by mid-layer. When this is called | |
2927 | * mid-layer ensures that no other commands are queued. This | |
2928 | * never gets called under interrupt, but a separate eh thread. | |
2929 | * | |
2930 | * Return value: | |
2931 | * SUCCESS / FAILED | |
2932 | */ | |
2933 | static int pmcraid_eh_abort_handler(struct scsi_cmnd *scsi_cmd) | |
2934 | { | |
2935 | struct pmcraid_instance *pinstance; | |
2936 | struct pmcraid_cmd *cmd; | |
2937 | struct pmcraid_resource_entry *res; | |
2938 | unsigned long host_lock_flags; | |
2939 | unsigned long pending_lock_flags; | |
2940 | struct pmcraid_cmd *cancel_cmd = NULL; | |
2941 | int cmd_found = 0; | |
2942 | int rc = FAILED; | |
2943 | ||
2944 | pinstance = | |
2945 | (struct pmcraid_instance *)scsi_cmd->device->host->hostdata; | |
2946 | ||
34876402 AR |
2947 | scmd_printk(KERN_INFO, scsi_cmd, |
2948 | "I/O command timed out, aborting it.\n"); | |
89a36810 AR |
2949 | |
2950 | res = scsi_cmd->device->hostdata; | |
2951 | ||
2952 | if (res == NULL) | |
2953 | return rc; | |
2954 | ||
2955 | /* If we are currently going through reset/reload, return failed. | |
2956 | * This will force the mid-layer to eventually call | |
2957 | * pmcraid_eh_host_reset which will then go to sleep and wait for the | |
2958 | * reset to complete | |
2959 | */ | |
2960 | spin_lock_irqsave(pinstance->host->host_lock, host_lock_flags); | |
2961 | ||
2962 | if (pinstance->ioa_reset_in_progress || | |
2963 | pinstance->ioa_state == IOA_STATE_DEAD) { | |
2964 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
2965 | host_lock_flags); | |
2966 | return rc; | |
2967 | } | |
2968 | ||
2969 | /* loop over pending cmd list to find cmd corresponding to this | |
2970 | * scsi_cmd. Note that this command might not have been completed | |
2971 | * already. locking: all pending commands are protected with | |
2972 | * pending_pool_lock. | |
2973 | */ | |
2974 | spin_lock_irqsave(&pinstance->pending_pool_lock, pending_lock_flags); | |
2975 | list_for_each_entry(cmd, &pinstance->pending_cmd_pool, free_list) { | |
2976 | ||
2977 | if (cmd->scsi_cmd == scsi_cmd) { | |
2978 | cmd_found = 1; | |
2979 | break; | |
2980 | } | |
2981 | } | |
2982 | ||
2983 | spin_unlock_irqrestore(&pinstance->pending_pool_lock, | |
2984 | pending_lock_flags); | |
2985 | ||
2986 | /* If the command to be aborted was given to IOA and still pending with | |
2987 | * it, send ABORT_TASK to abort this and wait for its completion | |
2988 | */ | |
2989 | if (cmd_found) | |
2990 | cancel_cmd = pmcraid_abort_cmd(cmd); | |
2991 | ||
2992 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
2993 | host_lock_flags); | |
2994 | ||
2995 | if (cancel_cmd) { | |
c20c4267 | 2996 | cancel_cmd->res = cmd->scsi_cmd->device->hostdata; |
89a36810 AR |
2997 | rc = pmcraid_abort_complete(cancel_cmd); |
2998 | } | |
2999 | ||
3000 | return cmd_found ? rc : SUCCESS; | |
3001 | } | |
3002 | ||
3003 | /** | |
3673b7b0 | 3004 | * pmcraid_eh_device_reset_handler - bus/target/device reset handler callbacks |
89a36810 AR |
3005 | * |
3006 | * @scmd: pointer to scsi_cmd that was sent to the resource to be reset. | |
3007 | * | |
3008 | * All these routines invokve pmcraid_reset_device with appropriate parameters. | |
3009 | * Since these are called from mid-layer EH thread, no other IO will be queued | |
3010 | * to the resource being reset. However, control path (IOCTL) may be active so | |
3011 | * it is necessary to synchronize IOARRIN writes which pmcraid_reset_device | |
3012 | * takes care by locking/unlocking host_lock. | |
3013 | * | |
3014 | * Return value | |
c20c4267 | 3015 | * SUCCESS or FAILED |
89a36810 AR |
3016 | */ |
3017 | static int pmcraid_eh_device_reset_handler(struct scsi_cmnd *scmd) | |
3018 | { | |
34876402 AR |
3019 | scmd_printk(KERN_INFO, scmd, |
3020 | "resetting device due to an I/O command timeout.\n"); | |
89a36810 AR |
3021 | return pmcraid_reset_device(scmd, |
3022 | PMCRAID_INTERNAL_TIMEOUT, | |
3023 | RESET_DEVICE_LUN); | |
3024 | } | |
3025 | ||
3026 | static int pmcraid_eh_bus_reset_handler(struct scsi_cmnd *scmd) | |
3027 | { | |
34876402 AR |
3028 | scmd_printk(KERN_INFO, scmd, |
3029 | "Doing bus reset due to an I/O command timeout.\n"); | |
89a36810 AR |
3030 | return pmcraid_reset_device(scmd, |
3031 | PMCRAID_RESET_BUS_TIMEOUT, | |
3032 | RESET_DEVICE_BUS); | |
3033 | } | |
3034 | ||
3035 | static int pmcraid_eh_target_reset_handler(struct scsi_cmnd *scmd) | |
3036 | { | |
34876402 AR |
3037 | scmd_printk(KERN_INFO, scmd, |
3038 | "Doing target reset due to an I/O command timeout.\n"); | |
89a36810 AR |
3039 | return pmcraid_reset_device(scmd, |
3040 | PMCRAID_INTERNAL_TIMEOUT, | |
3041 | RESET_DEVICE_TARGET); | |
3042 | } | |
3043 | ||
3044 | /** | |
3045 | * pmcraid_eh_host_reset_handler - adapter reset handler callback | |
3046 | * | |
3047 | * @scmd: pointer to scsi_cmd that was sent to a resource of adapter | |
3048 | * | |
3049 | * Initiates adapter reset to bring it up to operational state | |
3050 | * | |
3051 | * Return value | |
c20c4267 | 3052 | * SUCCESS or FAILED |
89a36810 AR |
3053 | */ |
3054 | static int pmcraid_eh_host_reset_handler(struct scsi_cmnd *scmd) | |
3055 | { | |
3056 | unsigned long interval = 10000; /* 10 seconds interval */ | |
3057 | int waits = jiffies_to_msecs(PMCRAID_RESET_HOST_TIMEOUT) / interval; | |
3058 | struct pmcraid_instance *pinstance = | |
3059 | (struct pmcraid_instance *)(scmd->device->host->hostdata); | |
3060 | ||
3061 | ||
3062 | /* wait for an additional 150 seconds just in case firmware could come | |
3063 | * up and if it could complete all the pending commands excluding the | |
3064 | * two HCAM (CCN and LDN). | |
3065 | */ | |
3066 | while (waits--) { | |
3067 | if (atomic_read(&pinstance->outstanding_cmds) <= | |
3068 | PMCRAID_MAX_HCAM_CMD) | |
3069 | return SUCCESS; | |
3070 | msleep(interval); | |
3071 | } | |
3072 | ||
3073 | dev_err(&pinstance->pdev->dev, | |
3074 | "Adapter being reset due to an I/O command timeout.\n"); | |
3075 | return pmcraid_reset_bringup(pinstance) == 0 ? SUCCESS : FAILED; | |
3076 | } | |
3077 | ||
89a36810 AR |
3078 | /** |
3079 | * pmcraid_init_ioadls - initializes IOADL related fields in IOARCB | |
3080 | * @cmd: pmcraid command struct | |
3081 | * @sgcount: count of scatter-gather elements | |
3082 | * | |
3083 | * Return value | |
3084 | * returns pointer pmcraid_ioadl_desc, initialized to point to internal | |
3085 | * or external IOADLs | |
3086 | */ | |
61b96d5b | 3087 | static struct pmcraid_ioadl_desc * |
89a36810 AR |
3088 | pmcraid_init_ioadls(struct pmcraid_cmd *cmd, int sgcount) |
3089 | { | |
3090 | struct pmcraid_ioadl_desc *ioadl; | |
3091 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
3092 | int ioadl_count = 0; | |
3093 | ||
3094 | if (ioarcb->add_cmd_param_length) | |
45c80be6 AB |
3095 | ioadl_count = DIV_ROUND_UP(le16_to_cpu(ioarcb->add_cmd_param_length), 16); |
3096 | ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc) * sgcount); | |
89a36810 AR |
3097 | |
3098 | if ((sgcount + ioadl_count) > (ARRAY_SIZE(ioarcb->add_data.u.ioadl))) { | |
3099 | /* external ioadls start at offset 0x80 from control_block | |
3100 | * structure, re-using 24 out of 27 ioadls part of IOARCB. | |
3101 | * It is necessary to indicate to firmware that driver is | |
3102 | * using ioadls to be treated as external to IOARCB. | |
3103 | */ | |
45c80be6 | 3104 | ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL)); |
89a36810 AR |
3105 | ioarcb->ioadl_bus_addr = |
3106 | cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
3107 | offsetof(struct pmcraid_ioarcb, | |
3108 | add_data.u.ioadl[3])); | |
3109 | ioadl = &ioarcb->add_data.u.ioadl[3]; | |
3110 | } else { | |
3111 | ioarcb->ioadl_bus_addr = | |
3112 | cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
3113 | offsetof(struct pmcraid_ioarcb, | |
3114 | add_data.u.ioadl[ioadl_count])); | |
3115 | ||
3116 | ioadl = &ioarcb->add_data.u.ioadl[ioadl_count]; | |
3117 | ioarcb->ioarcb_bus_addr |= | |
45c80be6 | 3118 | cpu_to_le64(DIV_ROUND_CLOSEST(sgcount + ioadl_count, 8)); |
89a36810 AR |
3119 | } |
3120 | ||
3121 | return ioadl; | |
3122 | } | |
3123 | ||
3124 | /** | |
3125 | * pmcraid_build_ioadl - Build a scatter/gather list and map the buffer | |
3126 | * @pinstance: pointer to adapter instance structure | |
3127 | * @cmd: pmcraid command struct | |
3128 | * | |
3129 | * This function is invoked by queuecommand entry point while sending a command | |
3130 | * to firmware. This builds ioadl descriptors and sets up ioarcb fields. | |
3131 | * | |
3132 | * Return value: | |
c20c4267 | 3133 | * 0 on success or -1 on failure |
89a36810 AR |
3134 | */ |
3135 | static int pmcraid_build_ioadl( | |
3136 | struct pmcraid_instance *pinstance, | |
3137 | struct pmcraid_cmd *cmd | |
3138 | ) | |
3139 | { | |
3140 | int i, nseg; | |
3141 | struct scatterlist *sglist; | |
3142 | ||
3143 | struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; | |
3144 | struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb); | |
b22ee87d | 3145 | struct pmcraid_ioadl_desc *ioadl; |
89a36810 AR |
3146 | |
3147 | u32 length = scsi_bufflen(scsi_cmd); | |
3148 | ||
3149 | if (!length) | |
3150 | return 0; | |
3151 | ||
3152 | nseg = scsi_dma_map(scsi_cmd); | |
3153 | ||
3154 | if (nseg < 0) { | |
34876402 | 3155 | scmd_printk(KERN_ERR, scsi_cmd, "scsi_map_dma failed!\n"); |
89a36810 AR |
3156 | return -1; |
3157 | } else if (nseg > PMCRAID_MAX_IOADLS) { | |
3158 | scsi_dma_unmap(scsi_cmd); | |
34876402 | 3159 | scmd_printk(KERN_ERR, scsi_cmd, |
89a36810 AR |
3160 | "sg count is (%d) more than allowed!\n", nseg); |
3161 | return -1; | |
3162 | } | |
3163 | ||
3164 | /* Initialize IOARCB data transfer length fields */ | |
3165 | if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE) | |
3166 | ioarcb->request_flags0 |= TRANSFER_DIR_WRITE; | |
3167 | ||
3168 | ioarcb->request_flags0 |= NO_LINK_DESCS; | |
3169 | ioarcb->data_transfer_length = cpu_to_le32(length); | |
3170 | ioadl = pmcraid_init_ioadls(cmd, nseg); | |
3171 | ||
3172 | /* Initialize IOADL descriptor addresses */ | |
3173 | scsi_for_each_sg(scsi_cmd, sglist, nseg, i) { | |
3174 | ioadl[i].data_len = cpu_to_le32(sg_dma_len(sglist)); | |
3175 | ioadl[i].address = cpu_to_le64(sg_dma_address(sglist)); | |
3176 | ioadl[i].flags = 0; | |
3177 | } | |
3178 | /* setup last descriptor */ | |
88197966 | 3179 | ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC; |
89a36810 AR |
3180 | |
3181 | return 0; | |
3182 | } | |
3183 | ||
89a36810 | 3184 | /** |
3673b7b0 | 3185 | * pmcraid_queuecommand_lck - Queue a mid-layer request |
89a36810 | 3186 | * @scsi_cmd: scsi command struct |
89a36810 AR |
3187 | * |
3188 | * This function queues a request generated by the mid-layer. Midlayer calls | |
3189 | * this routine within host->lock. Some of the functions called by queuecommand | |
3190 | * would use cmd block queue locks (free_pool_lock and pending_pool_lock) | |
3191 | * | |
3192 | * Return value: | |
3193 | * 0 on success | |
3194 | * SCSI_MLQUEUE_DEVICE_BUSY if device is busy | |
3195 | * SCSI_MLQUEUE_HOST_BUSY if host is busy | |
3196 | */ | |
af049dfd | 3197 | static int pmcraid_queuecommand_lck(struct scsi_cmnd *scsi_cmd) |
89a36810 AR |
3198 | { |
3199 | struct pmcraid_instance *pinstance; | |
3200 | struct pmcraid_resource_entry *res; | |
3201 | struct pmcraid_ioarcb *ioarcb; | |
3202 | struct pmcraid_cmd *cmd; | |
c20c4267 | 3203 | u32 fw_version; |
89a36810 AR |
3204 | int rc = 0; |
3205 | ||
3206 | pinstance = | |
3207 | (struct pmcraid_instance *)scsi_cmd->device->host->hostdata; | |
c20c4267 | 3208 | fw_version = be16_to_cpu(pinstance->inq_data->fw_version); |
89a36810 AR |
3209 | res = scsi_cmd->device->hostdata; |
3210 | scsi_cmd->result = (DID_OK << 16); | |
3211 | ||
3212 | /* if adapter is marked as dead, set result to DID_NO_CONNECT complete | |
3213 | * the command | |
3214 | */ | |
3215 | if (pinstance->ioa_state == IOA_STATE_DEAD) { | |
3216 | pmcraid_info("IOA is dead, but queuecommand is scheduled\n"); | |
3217 | scsi_cmd->result = (DID_NO_CONNECT << 16); | |
f13cc234 | 3218 | scsi_done(scsi_cmd); |
89a36810 AR |
3219 | return 0; |
3220 | } | |
3221 | ||
3222 | /* If IOA reset is in progress, can't queue the commands */ | |
3223 | if (pinstance->ioa_reset_in_progress) | |
3224 | return SCSI_MLQUEUE_HOST_BUSY; | |
3225 | ||
c20c4267 AR |
3226 | /* Firmware doesn't support SYNCHRONIZE_CACHE command (0x35), complete |
3227 | * the command here itself with success return | |
3228 | */ | |
3229 | if (scsi_cmd->cmnd[0] == SYNCHRONIZE_CACHE) { | |
3230 | pmcraid_info("SYNC_CACHE(0x35), completing in driver itself\n"); | |
f13cc234 | 3231 | scsi_done(scsi_cmd); |
c20c4267 AR |
3232 | return 0; |
3233 | } | |
3234 | ||
89a36810 AR |
3235 | /* initialize the command and IOARCB to be sent to IOA */ |
3236 | cmd = pmcraid_get_free_cmd(pinstance); | |
3237 | ||
3238 | if (cmd == NULL) { | |
3239 | pmcraid_err("free command block is not available\n"); | |
3240 | return SCSI_MLQUEUE_HOST_BUSY; | |
3241 | } | |
3242 | ||
3243 | cmd->scsi_cmd = scsi_cmd; | |
3244 | ioarcb = &(cmd->ioa_cb->ioarcb); | |
3245 | memcpy(ioarcb->cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len); | |
3246 | ioarcb->resource_handle = res->cfg_entry.resource_handle; | |
3247 | ioarcb->request_type = REQ_TYPE_SCSI; | |
3248 | ||
c20c4267 AR |
3249 | /* set hrrq number where the IOA should respond to. Note that all cmds |
3250 | * generated internally uses hrrq_id 0, exception to this is the cmd | |
3251 | * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses | |
3252 | * hrrq_id assigned here in queuecommand | |
3253 | */ | |
3254 | ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) % | |
3255 | pinstance->num_hrrq; | |
89a36810 AR |
3256 | cmd->cmd_done = pmcraid_io_done; |
3257 | ||
3258 | if (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry)) { | |
3259 | if (scsi_cmd->underflow == 0) | |
3260 | ioarcb->request_flags0 |= INHIBIT_UL_CHECK; | |
3261 | ||
3262 | if (res->sync_reqd) { | |
3263 | ioarcb->request_flags0 |= SYNC_COMPLETE; | |
3264 | res->sync_reqd = 0; | |
3265 | } | |
3266 | ||
3267 | ioarcb->request_flags0 |= NO_LINK_DESCS; | |
50668633 CH |
3268 | |
3269 | if (scsi_cmd->flags & SCMD_TAGGED) | |
3270 | ioarcb->request_flags1 |= TASK_TAG_SIMPLE; | |
89a36810 AR |
3271 | |
3272 | if (RES_IS_GSCSI(res->cfg_entry)) | |
3273 | ioarcb->request_flags1 |= DELAY_AFTER_RESET; | |
3274 | } | |
3275 | ||
3276 | rc = pmcraid_build_ioadl(pinstance, cmd); | |
3277 | ||
3278 | pmcraid_info("command (%d) CDB[0] = %x for %x:%x:%x:%x\n", | |
3279 | le32_to_cpu(ioarcb->response_handle) >> 2, | |
3280 | scsi_cmd->cmnd[0], pinstance->host->unique_id, | |
3281 | RES_IS_VSET(res->cfg_entry) ? PMCRAID_VSET_BUS_ID : | |
3282 | PMCRAID_PHYS_BUS_ID, | |
3283 | RES_IS_VSET(res->cfg_entry) ? | |
c20c4267 AR |
3284 | (fw_version <= PMCRAID_FW_VERSION_1 ? |
3285 | res->cfg_entry.unique_flags1 : | |
45c80be6 | 3286 | le16_to_cpu(res->cfg_entry.array_id) & 0xFF) : |
89a36810 AR |
3287 | RES_TARGET(res->cfg_entry.resource_address), |
3288 | RES_LUN(res->cfg_entry.resource_address)); | |
3289 | ||
3290 | if (likely(rc == 0)) { | |
3291 | _pmcraid_fire_command(cmd); | |
3292 | } else { | |
3293 | pmcraid_err("queuecommand could not build ioadl\n"); | |
3294 | pmcraid_return_cmd(cmd); | |
3295 | rc = SCSI_MLQUEUE_HOST_BUSY; | |
3296 | } | |
3297 | ||
3298 | return rc; | |
3299 | } | |
3300 | ||
f281233d JG |
3301 | static DEF_SCSI_QCMD(pmcraid_queuecommand) |
3302 | ||
3673b7b0 | 3303 | /* |
89a36810 AR |
3304 | * pmcraid_open -char node "open" entry, allowed only users with admin access |
3305 | */ | |
3306 | static int pmcraid_chr_open(struct inode *inode, struct file *filep) | |
3307 | { | |
3308 | struct pmcraid_instance *pinstance; | |
3309 | ||
3310 | if (!capable(CAP_SYS_ADMIN)) | |
3311 | return -EACCES; | |
3312 | ||
3313 | /* Populate adapter instance * pointer for use by ioctl */ | |
3314 | pinstance = container_of(inode->i_cdev, struct pmcraid_instance, cdev); | |
3315 | filep->private_data = pinstance; | |
3316 | ||
3317 | return 0; | |
3318 | } | |
3319 | ||
3673b7b0 | 3320 | /* |
89a36810 AR |
3321 | * pmcraid_fasync - Async notifier registration from applications |
3322 | * | |
3323 | * This function adds the calling process to a driver global queue. When an | |
3324 | * event occurs, SIGIO will be sent to all processes in this queue. | |
3325 | */ | |
3326 | static int pmcraid_chr_fasync(int fd, struct file *filep, int mode) | |
3327 | { | |
3328 | struct pmcraid_instance *pinstance; | |
3329 | int rc; | |
3330 | ||
660bdddb | 3331 | pinstance = filep->private_data; |
89a36810 AR |
3332 | mutex_lock(&pinstance->aen_queue_lock); |
3333 | rc = fasync_helper(fd, filep, mode, &pinstance->aen_queue); | |
3334 | mutex_unlock(&pinstance->aen_queue_lock); | |
3335 | ||
3336 | return rc; | |
3337 | } | |
3338 | ||
89a36810 AR |
3339 | /** |
3340 | * pmcraid_ioctl_driver - ioctl handler for commands handled by driver itself | |
3341 | * | |
3342 | * @pinstance: pointer to adapter instance structure | |
3343 | * @cmd: ioctl command passed in | |
3344 | * @buflen: length of user_buffer | |
3345 | * @user_buffer: user buffer pointer | |
3346 | * | |
3347 | * Return Value | |
3348 | * 0 in case of success, otherwise appropriate error code | |
3349 | */ | |
3350 | static long pmcraid_ioctl_driver( | |
3351 | struct pmcraid_instance *pinstance, | |
3352 | unsigned int cmd, | |
3353 | unsigned int buflen, | |
3354 | void __user *user_buffer | |
3355 | ) | |
3356 | { | |
3357 | int rc = -ENOSYS; | |
3358 | ||
89a36810 AR |
3359 | switch (cmd) { |
3360 | case PMCRAID_IOCTL_RESET_ADAPTER: | |
3361 | pmcraid_reset_bringup(pinstance); | |
3362 | rc = 0; | |
3363 | break; | |
3364 | ||
3365 | default: | |
3366 | break; | |
3367 | } | |
3368 | ||
3369 | return rc; | |
3370 | } | |
3371 | ||
3372 | /** | |
3373 | * pmcraid_check_ioctl_buffer - check for proper access to user buffer | |
3374 | * | |
3375 | * @cmd: ioctl command | |
3376 | * @arg: user buffer | |
3377 | * @hdr: pointer to kernel memory for pmcraid_ioctl_header | |
3378 | * | |
3379 | * Return Value | |
3380 | * negetive error code if there are access issues, otherwise zero. | |
3381 | * Upon success, returns ioctl header copied out of user buffer. | |
3382 | */ | |
3383 | ||
3384 | static int pmcraid_check_ioctl_buffer( | |
3385 | int cmd, | |
3386 | void __user *arg, | |
3387 | struct pmcraid_ioctl_header *hdr | |
3388 | ) | |
3389 | { | |
edb88cef | 3390 | int rc; |
89a36810 AR |
3391 | |
3392 | if (copy_from_user(hdr, arg, sizeof(struct pmcraid_ioctl_header))) { | |
3393 | pmcraid_err("couldn't copy ioctl header from user buffer\n"); | |
3394 | return -EFAULT; | |
3395 | } | |
3396 | ||
3397 | /* check for valid driver signature */ | |
3398 | rc = memcmp(hdr->signature, | |
3399 | PMCRAID_IOCTL_SIGNATURE, | |
3400 | sizeof(hdr->signature)); | |
3401 | if (rc) { | |
3402 | pmcraid_err("signature verification failed\n"); | |
3403 | return -EINVAL; | |
3404 | } | |
3405 | ||
89a36810 AR |
3406 | return 0; |
3407 | } | |
3408 | ||
3673b7b0 | 3409 | /* |
89a36810 AR |
3410 | * pmcraid_ioctl - char node ioctl entry point |
3411 | */ | |
3412 | static long pmcraid_chr_ioctl( | |
3413 | struct file *filep, | |
3414 | unsigned int cmd, | |
3415 | unsigned long arg | |
3416 | ) | |
3417 | { | |
3418 | struct pmcraid_instance *pinstance = NULL; | |
3419 | struct pmcraid_ioctl_header *hdr = NULL; | |
3397623b | 3420 | void __user *argp = (void __user *)arg; |
89a36810 AR |
3421 | int retval = -ENOTTY; |
3422 | ||
a63ec376 | 3423 | hdr = kmalloc(sizeof(struct pmcraid_ioctl_header), GFP_KERNEL); |
89a36810 AR |
3424 | |
3425 | if (!hdr) { | |
4f91b114 | 3426 | pmcraid_err("failed to allocate memory for ioctl header\n"); |
89a36810 AR |
3427 | return -ENOMEM; |
3428 | } | |
3429 | ||
3397623b | 3430 | retval = pmcraid_check_ioctl_buffer(cmd, argp, hdr); |
89a36810 AR |
3431 | |
3432 | if (retval) { | |
3433 | pmcraid_info("chr_ioctl: header check failed\n"); | |
3434 | kfree(hdr); | |
3435 | return retval; | |
3436 | } | |
3437 | ||
660bdddb | 3438 | pinstance = filep->private_data; |
89a36810 AR |
3439 | |
3440 | if (!pinstance) { | |
3441 | pmcraid_info("adapter instance is not found\n"); | |
3442 | kfree(hdr); | |
3443 | return -ENOTTY; | |
3444 | } | |
3445 | ||
3446 | switch (_IOC_TYPE(cmd)) { | |
3447 | ||
89a36810 AR |
3448 | case PMCRAID_DRIVER_IOCTL: |
3449 | arg += sizeof(struct pmcraid_ioctl_header); | |
3397623b AB |
3450 | retval = pmcraid_ioctl_driver(pinstance, cmd, |
3451 | hdr->buffer_length, argp); | |
89a36810 AR |
3452 | break; |
3453 | ||
3454 | default: | |
3455 | retval = -ENOTTY; | |
3456 | break; | |
3457 | } | |
3458 | ||
3459 | kfree(hdr); | |
3460 | ||
3461 | return retval; | |
3462 | } | |
3463 | ||
3673b7b0 | 3464 | /* |
89a36810 AR |
3465 | * File operations structure for management interface |
3466 | */ | |
3467 | static const struct file_operations pmcraid_fops = { | |
3468 | .owner = THIS_MODULE, | |
3469 | .open = pmcraid_chr_open, | |
89a36810 AR |
3470 | .fasync = pmcraid_chr_fasync, |
3471 | .unlocked_ioctl = pmcraid_chr_ioctl, | |
1832f2d8 | 3472 | .compat_ioctl = compat_ptr_ioctl, |
6038f373 | 3473 | .llseek = noop_llseek, |
89a36810 AR |
3474 | }; |
3475 | ||
3476 | ||
3477 | ||
3478 | ||
3479 | /** | |
3480 | * pmcraid_show_log_level - Display adapter's error logging level | |
3481 | * @dev: class device struct | |
3673b7b0 | 3482 | * @attr: unused |
89a36810 AR |
3483 | * @buf: buffer |
3484 | * | |
3485 | * Return value: | |
3486 | * number of bytes printed to buffer | |
3487 | */ | |
3488 | static ssize_t pmcraid_show_log_level( | |
3489 | struct device *dev, | |
3490 | struct device_attribute *attr, | |
3491 | char *buf) | |
3492 | { | |
3493 | struct Scsi_Host *shost = class_to_shost(dev); | |
3494 | struct pmcraid_instance *pinstance = | |
3495 | (struct pmcraid_instance *)shost->hostdata; | |
3496 | return snprintf(buf, PAGE_SIZE, "%d\n", pinstance->current_log_level); | |
3497 | } | |
3498 | ||
3499 | /** | |
3500 | * pmcraid_store_log_level - Change the adapter's error logging level | |
3501 | * @dev: class device struct | |
3673b7b0 | 3502 | * @attr: unused |
89a36810 AR |
3503 | * @buf: buffer |
3504 | * @count: not used | |
3505 | * | |
3506 | * Return value: | |
3507 | * number of bytes printed to buffer | |
3508 | */ | |
3509 | static ssize_t pmcraid_store_log_level( | |
3510 | struct device *dev, | |
3511 | struct device_attribute *attr, | |
3512 | const char *buf, | |
3513 | size_t count | |
3514 | ) | |
3515 | { | |
3516 | struct Scsi_Host *shost; | |
3517 | struct pmcraid_instance *pinstance; | |
f7c65af5 | 3518 | u8 val; |
89a36810 | 3519 | |
f7c65af5 | 3520 | if (kstrtou8(buf, 10, &val)) |
89a36810 AR |
3521 | return -EINVAL; |
3522 | /* log-level should be from 0 to 2 */ | |
3523 | if (val > 2) | |
3524 | return -EINVAL; | |
3525 | ||
3526 | shost = class_to_shost(dev); | |
3527 | pinstance = (struct pmcraid_instance *)shost->hostdata; | |
3528 | pinstance->current_log_level = val; | |
3529 | ||
3530 | return strlen(buf); | |
3531 | } | |
3532 | ||
3533 | static struct device_attribute pmcraid_log_level_attr = { | |
3534 | .attr = { | |
3535 | .name = "log_level", | |
3536 | .mode = S_IRUGO | S_IWUSR, | |
3537 | }, | |
3538 | .show = pmcraid_show_log_level, | |
3539 | .store = pmcraid_store_log_level, | |
3540 | }; | |
3541 | ||
3542 | /** | |
3543 | * pmcraid_show_drv_version - Display driver version | |
3544 | * @dev: class device struct | |
3673b7b0 | 3545 | * @attr: unused |
89a36810 AR |
3546 | * @buf: buffer |
3547 | * | |
3548 | * Return value: | |
3549 | * number of bytes printed to buffer | |
3550 | */ | |
3551 | static ssize_t pmcraid_show_drv_version( | |
3552 | struct device *dev, | |
3553 | struct device_attribute *attr, | |
3554 | char *buf | |
3555 | ) | |
3556 | { | |
a1b66665 MM |
3557 | return snprintf(buf, PAGE_SIZE, "version: %s\n", |
3558 | PMCRAID_DRIVER_VERSION); | |
89a36810 AR |
3559 | } |
3560 | ||
3561 | static struct device_attribute pmcraid_driver_version_attr = { | |
3562 | .attr = { | |
3563 | .name = "drv_version", | |
3564 | .mode = S_IRUGO, | |
3565 | }, | |
3566 | .show = pmcraid_show_drv_version, | |
3567 | }; | |
3568 | ||
3569 | /** | |
a364a147 | 3570 | * pmcraid_show_adapter_id - Display driver assigned adapter id |
89a36810 | 3571 | * @dev: class device struct |
3673b7b0 | 3572 | * @attr: unused |
89a36810 AR |
3573 | * @buf: buffer |
3574 | * | |
3575 | * Return value: | |
3576 | * number of bytes printed to buffer | |
3577 | */ | |
3578 | static ssize_t pmcraid_show_adapter_id( | |
3579 | struct device *dev, | |
3580 | struct device_attribute *attr, | |
3581 | char *buf | |
3582 | ) | |
3583 | { | |
3584 | struct Scsi_Host *shost = class_to_shost(dev); | |
3585 | struct pmcraid_instance *pinstance = | |
3586 | (struct pmcraid_instance *)shost->hostdata; | |
3587 | u32 adapter_id = (pinstance->pdev->bus->number << 8) | | |
3588 | pinstance->pdev->devfn; | |
3589 | u32 aen_group = pmcraid_event_family.id; | |
3590 | ||
3591 | return snprintf(buf, PAGE_SIZE, | |
3592 | "adapter id: %d\nminor: %d\naen group: %d\n", | |
3593 | adapter_id, MINOR(pinstance->cdev.dev), aen_group); | |
3594 | } | |
3595 | ||
3596 | static struct device_attribute pmcraid_adapter_id_attr = { | |
3597 | .attr = { | |
3598 | .name = "adapter_id", | |
5a0ccb6b | 3599 | .mode = S_IRUGO, |
89a36810 AR |
3600 | }, |
3601 | .show = pmcraid_show_adapter_id, | |
3602 | }; | |
3603 | ||
646bed7e BVA |
3604 | static struct attribute *pmcraid_host_attrs[] = { |
3605 | &pmcraid_log_level_attr.attr, | |
3606 | &pmcraid_driver_version_attr.attr, | |
3607 | &pmcraid_adapter_id_attr.attr, | |
89a36810 AR |
3608 | NULL, |
3609 | }; | |
3610 | ||
646bed7e | 3611 | ATTRIBUTE_GROUPS(pmcraid_host); |
89a36810 AR |
3612 | |
3613 | /* host template structure for pmcraid driver */ | |
3614 | static struct scsi_host_template pmcraid_host_template = { | |
3615 | .module = THIS_MODULE, | |
3616 | .name = PMCRAID_DRIVER_NAME, | |
3617 | .queuecommand = pmcraid_queuecommand, | |
3618 | .eh_abort_handler = pmcraid_eh_abort_handler, | |
3619 | .eh_bus_reset_handler = pmcraid_eh_bus_reset_handler, | |
3620 | .eh_target_reset_handler = pmcraid_eh_target_reset_handler, | |
3621 | .eh_device_reset_handler = pmcraid_eh_device_reset_handler, | |
3622 | .eh_host_reset_handler = pmcraid_eh_host_reset_handler, | |
3623 | ||
3624 | .slave_alloc = pmcraid_slave_alloc, | |
3625 | .slave_configure = pmcraid_slave_configure, | |
3626 | .slave_destroy = pmcraid_slave_destroy, | |
3627 | .change_queue_depth = pmcraid_change_queue_depth, | |
89a36810 AR |
3628 | .can_queue = PMCRAID_MAX_IO_CMD, |
3629 | .this_id = -1, | |
3630 | .sg_tablesize = PMCRAID_MAX_IOADLS, | |
3631 | .max_sectors = PMCRAID_IOA_MAX_SECTORS, | |
54b2b50c | 3632 | .no_write_same = 1, |
89a36810 | 3633 | .cmd_per_lun = PMCRAID_MAX_CMD_PER_LUN, |
646bed7e | 3634 | .shost_groups = pmcraid_host_groups, |
2ecb204d | 3635 | .proc_name = PMCRAID_DRIVER_NAME, |
89a36810 AR |
3636 | }; |
3637 | ||
c20c4267 AR |
3638 | /* |
3639 | * pmcraid_isr_msix - implements MSI-X interrupt handling routine | |
3640 | * @irq: interrupt vector number | |
3641 | * @dev_id: pointer hrrq_vector | |
89a36810 AR |
3642 | * |
3643 | * Return Value | |
c20c4267 | 3644 | * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored |
89a36810 | 3645 | */ |
c20c4267 AR |
3646 | |
3647 | static irqreturn_t pmcraid_isr_msix(int irq, void *dev_id) | |
89a36810 | 3648 | { |
c20c4267 AR |
3649 | struct pmcraid_isr_param *hrrq_vector; |
3650 | struct pmcraid_instance *pinstance; | |
3651 | unsigned long lock_flags; | |
3652 | u32 intrs_val; | |
3653 | int hrrq_id; | |
3654 | ||
3655 | hrrq_vector = (struct pmcraid_isr_param *)dev_id; | |
3656 | hrrq_id = hrrq_vector->hrrq_id; | |
3657 | pinstance = hrrq_vector->drv_inst; | |
3658 | ||
3659 | if (!hrrq_id) { | |
3660 | /* Read the interrupt */ | |
3661 | intrs_val = pmcraid_read_interrupts(pinstance); | |
3662 | if (intrs_val && | |
3663 | ((ioread32(pinstance->int_regs.host_ioa_interrupt_reg) | |
3664 | & DOORBELL_INTR_MSIX_CLR) == 0)) { | |
3665 | /* Any error interrupts including unit_check, | |
3666 | * initiate IOA reset.In case of unit check indicate | |
3667 | * to reset_sequence that IOA unit checked and prepare | |
3668 | * for a dump during reset sequence | |
3669 | */ | |
3670 | if (intrs_val & PMCRAID_ERROR_INTERRUPTS) { | |
3671 | if (intrs_val & INTRS_IOA_UNIT_CHECK) | |
3672 | pinstance->ioa_unit_check = 1; | |
3673 | ||
3674 | pmcraid_err("ISR: error interrupts: %x \ | |
3675 | initiating reset\n", intrs_val); | |
3676 | spin_lock_irqsave(pinstance->host->host_lock, | |
3677 | lock_flags); | |
3678 | pmcraid_initiate_reset(pinstance); | |
3679 | spin_unlock_irqrestore( | |
3680 | pinstance->host->host_lock, | |
3681 | lock_flags); | |
3682 | } | |
3683 | /* If interrupt was as part of the ioa initialization, | |
3684 | * clear it. Delete the timer and wakeup the | |
3685 | * reset engine to proceed with reset sequence | |
3686 | */ | |
3687 | if (intrs_val & INTRS_TRANSITION_TO_OPERATIONAL) | |
3688 | pmcraid_clr_trans_op(pinstance); | |
3689 | ||
3690 | /* Clear the interrupt register by writing | |
3691 | * to host to ioa doorbell. Once done | |
3692 | * FW will clear the interrupt. | |
3693 | */ | |
3694 | iowrite32(DOORBELL_INTR_MSIX_CLR, | |
3695 | pinstance->int_regs.host_ioa_interrupt_reg); | |
3696 | ioread32(pinstance->int_regs.host_ioa_interrupt_reg); | |
3697 | ||
89a36810 | 3698 | |
c20c4267 AR |
3699 | } |
3700 | } | |
3701 | ||
3702 | tasklet_schedule(&(pinstance->isr_tasklet[hrrq_id])); | |
3703 | ||
3704 | return IRQ_HANDLED; | |
89a36810 AR |
3705 | } |
3706 | ||
3707 | /** | |
c20c4267 | 3708 | * pmcraid_isr - implements legacy interrupt handling routine |
89a36810 AR |
3709 | * |
3710 | * @irq: interrupt vector number | |
3711 | * @dev_id: pointer hrrq_vector | |
3712 | * | |
3713 | * Return Value | |
3714 | * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored | |
3715 | */ | |
3716 | static irqreturn_t pmcraid_isr(int irq, void *dev_id) | |
3717 | { | |
3718 | struct pmcraid_isr_param *hrrq_vector; | |
3719 | struct pmcraid_instance *pinstance; | |
89a36810 | 3720 | u32 intrs; |
c20c4267 AR |
3721 | unsigned long lock_flags; |
3722 | int hrrq_id = 0; | |
89a36810 AR |
3723 | |
3724 | /* In case of legacy interrupt mode where interrupts are shared across | |
3725 | * isrs, it may be possible that the current interrupt is not from IOA | |
3726 | */ | |
3727 | if (!dev_id) { | |
3728 | printk(KERN_INFO "%s(): NULL host pointer\n", __func__); | |
3729 | return IRQ_NONE; | |
3730 | } | |
89a36810 AR |
3731 | hrrq_vector = (struct pmcraid_isr_param *)dev_id; |
3732 | pinstance = hrrq_vector->drv_inst; | |
3733 | ||
89a36810 AR |
3734 | intrs = pmcraid_read_interrupts(pinstance); |
3735 | ||
c20c4267 | 3736 | if (unlikely((intrs & PMCRAID_PCI_INTERRUPTS) == 0)) |
89a36810 | 3737 | return IRQ_NONE; |
89a36810 AR |
3738 | |
3739 | /* Any error interrupts including unit_check, initiate IOA reset. | |
3740 | * In case of unit check indicate to reset_sequence that IOA unit | |
3741 | * checked and prepare for a dump during reset sequence | |
3742 | */ | |
3743 | if (intrs & PMCRAID_ERROR_INTERRUPTS) { | |
3744 | ||
3745 | if (intrs & INTRS_IOA_UNIT_CHECK) | |
3746 | pinstance->ioa_unit_check = 1; | |
3747 | ||
3748 | iowrite32(intrs, | |
3749 | pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
3750 | pmcraid_err("ISR: error interrupts: %x initiating reset\n", | |
3751 | intrs); | |
c20c4267 AR |
3752 | intrs = ioread32( |
3753 | pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
3754 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
89a36810 | 3755 | pmcraid_initiate_reset(pinstance); |
c20c4267 | 3756 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); |
89a36810 | 3757 | } else { |
c20c4267 AR |
3758 | /* If interrupt was as part of the ioa initialization, |
3759 | * clear. Delete the timer and wakeup the | |
3760 | * reset engine to proceed with reset sequence | |
3761 | */ | |
3762 | if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) { | |
3763 | pmcraid_clr_trans_op(pinstance); | |
3764 | } else { | |
3765 | iowrite32(intrs, | |
3766 | pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
3767 | ioread32( | |
3768 | pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
89a36810 | 3769 | |
c20c4267 AR |
3770 | tasklet_schedule( |
3771 | &(pinstance->isr_tasklet[hrrq_id])); | |
3772 | } | |
3773 | } | |
89a36810 AR |
3774 | |
3775 | return IRQ_HANDLED; | |
3776 | } | |
3777 | ||
3778 | ||
3779 | /** | |
3780 | * pmcraid_worker_function - worker thread function | |
3781 | * | |
3782 | * @workp: pointer to struct work queue | |
3783 | * | |
3784 | * Return Value | |
3785 | * None | |
3786 | */ | |
3787 | ||
3788 | static void pmcraid_worker_function(struct work_struct *workp) | |
3789 | { | |
3790 | struct pmcraid_instance *pinstance; | |
3791 | struct pmcraid_resource_entry *res; | |
3792 | struct pmcraid_resource_entry *temp; | |
3793 | struct scsi_device *sdev; | |
3794 | unsigned long lock_flags; | |
3795 | unsigned long host_lock_flags; | |
c20c4267 | 3796 | u16 fw_version; |
89a36810 AR |
3797 | u8 bus, target, lun; |
3798 | ||
3799 | pinstance = container_of(workp, struct pmcraid_instance, worker_q); | |
3800 | /* add resources only after host is added into system */ | |
3801 | if (!atomic_read(&pinstance->expose_resources)) | |
3802 | return; | |
3803 | ||
c20c4267 AR |
3804 | fw_version = be16_to_cpu(pinstance->inq_data->fw_version); |
3805 | ||
89a36810 AR |
3806 | spin_lock_irqsave(&pinstance->resource_lock, lock_flags); |
3807 | list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) { | |
3808 | ||
3809 | if (res->change_detected == RES_CHANGE_DEL && res->scsi_dev) { | |
3810 | sdev = res->scsi_dev; | |
3811 | ||
3812 | /* host_lock must be held before calling | |
3813 | * scsi_device_get | |
3814 | */ | |
3815 | spin_lock_irqsave(pinstance->host->host_lock, | |
3816 | host_lock_flags); | |
3817 | if (!scsi_device_get(sdev)) { | |
3818 | spin_unlock_irqrestore( | |
3819 | pinstance->host->host_lock, | |
3820 | host_lock_flags); | |
3821 | pmcraid_info("deleting %x from midlayer\n", | |
3822 | res->cfg_entry.resource_address); | |
3823 | list_move_tail(&res->queue, | |
3824 | &pinstance->free_res_q); | |
3825 | spin_unlock_irqrestore( | |
3826 | &pinstance->resource_lock, | |
3827 | lock_flags); | |
3828 | scsi_remove_device(sdev); | |
3829 | scsi_device_put(sdev); | |
3830 | spin_lock_irqsave(&pinstance->resource_lock, | |
3831 | lock_flags); | |
3832 | res->change_detected = 0; | |
3833 | } else { | |
3834 | spin_unlock_irqrestore( | |
3835 | pinstance->host->host_lock, | |
3836 | host_lock_flags); | |
3837 | } | |
3838 | } | |
3839 | } | |
3840 | ||
3841 | list_for_each_entry(res, &pinstance->used_res_q, queue) { | |
3842 | ||
3843 | if (res->change_detected == RES_CHANGE_ADD) { | |
3844 | ||
c20c4267 AR |
3845 | if (!pmcraid_expose_resource(fw_version, |
3846 | &res->cfg_entry)) | |
89a36810 AR |
3847 | continue; |
3848 | ||
3849 | if (RES_IS_VSET(res->cfg_entry)) { | |
3850 | bus = PMCRAID_VSET_BUS_ID; | |
c20c4267 AR |
3851 | if (fw_version <= PMCRAID_FW_VERSION_1) |
3852 | target = res->cfg_entry.unique_flags1; | |
3853 | else | |
45c80be6 | 3854 | target = le16_to_cpu(res->cfg_entry.array_id) & 0xFF; |
89a36810 AR |
3855 | lun = PMCRAID_VSET_LUN_ID; |
3856 | } else { | |
3857 | bus = PMCRAID_PHYS_BUS_ID; | |
3858 | target = | |
3859 | RES_TARGET( | |
3860 | res->cfg_entry.resource_address); | |
3861 | lun = RES_LUN(res->cfg_entry.resource_address); | |
3862 | } | |
3863 | ||
3864 | res->change_detected = 0; | |
3865 | spin_unlock_irqrestore(&pinstance->resource_lock, | |
3866 | lock_flags); | |
3867 | scsi_add_device(pinstance->host, bus, target, lun); | |
3868 | spin_lock_irqsave(&pinstance->resource_lock, | |
3869 | lock_flags); | |
3870 | } | |
3871 | } | |
3872 | ||
3873 | spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags); | |
3874 | } | |
3875 | ||
3876 | /** | |
3877 | * pmcraid_tasklet_function - Tasklet function | |
3878 | * | |
3879 | * @instance: pointer to msix param structure | |
3880 | * | |
3881 | * Return Value | |
3882 | * None | |
3883 | */ | |
c20c4267 | 3884 | static void pmcraid_tasklet_function(unsigned long instance) |
89a36810 AR |
3885 | { |
3886 | struct pmcraid_isr_param *hrrq_vector; | |
3887 | struct pmcraid_instance *pinstance; | |
3888 | unsigned long hrrq_lock_flags; | |
3889 | unsigned long pending_lock_flags; | |
3890 | unsigned long host_lock_flags; | |
3891 | spinlock_t *lockp; /* hrrq buffer lock */ | |
3892 | int id; | |
45c80be6 | 3893 | u32 resp; |
89a36810 AR |
3894 | |
3895 | hrrq_vector = (struct pmcraid_isr_param *)instance; | |
3896 | pinstance = hrrq_vector->drv_inst; | |
3897 | id = hrrq_vector->hrrq_id; | |
3898 | lockp = &(pinstance->hrrq_lock[id]); | |
89a36810 AR |
3899 | |
3900 | /* loop through each of the commands responded by IOA. Each HRRQ buf is | |
3901 | * protected by its own lock. Traversals must be done within this lock | |
3902 | * as there may be multiple tasklets running on multiple CPUs. Note | |
3903 | * that the lock is held just for picking up the response handle and | |
3904 | * manipulating hrrq_curr/toggle_bit values. | |
3905 | */ | |
3906 | spin_lock_irqsave(lockp, hrrq_lock_flags); | |
3907 | ||
3908 | resp = le32_to_cpu(*(pinstance->hrrq_curr[id])); | |
3909 | ||
3910 | while ((resp & HRRQ_TOGGLE_BIT) == | |
3911 | pinstance->host_toggle_bit[id]) { | |
3912 | ||
3913 | int cmd_index = resp >> 2; | |
3914 | struct pmcraid_cmd *cmd = NULL; | |
3915 | ||
89a36810 AR |
3916 | if (pinstance->hrrq_curr[id] < pinstance->hrrq_end[id]) { |
3917 | pinstance->hrrq_curr[id]++; | |
3918 | } else { | |
3919 | pinstance->hrrq_curr[id] = pinstance->hrrq_start[id]; | |
3920 | pinstance->host_toggle_bit[id] ^= 1u; | |
3921 | } | |
3922 | ||
c20c4267 AR |
3923 | if (cmd_index >= PMCRAID_MAX_CMD) { |
3924 | /* In case of invalid response handle, log message */ | |
3925 | pmcraid_err("Invalid response handle %d\n", cmd_index); | |
3926 | resp = le32_to_cpu(*(pinstance->hrrq_curr[id])); | |
3927 | continue; | |
3928 | } | |
3929 | ||
3930 | cmd = pinstance->cmd_list[cmd_index]; | |
89a36810 AR |
3931 | spin_unlock_irqrestore(lockp, hrrq_lock_flags); |
3932 | ||
3933 | spin_lock_irqsave(&pinstance->pending_pool_lock, | |
3934 | pending_lock_flags); | |
3935 | list_del(&cmd->free_list); | |
3936 | spin_unlock_irqrestore(&pinstance->pending_pool_lock, | |
3937 | pending_lock_flags); | |
3938 | del_timer(&cmd->timer); | |
3939 | atomic_dec(&pinstance->outstanding_cmds); | |
3940 | ||
3941 | if (cmd->cmd_done == pmcraid_ioa_reset) { | |
3942 | spin_lock_irqsave(pinstance->host->host_lock, | |
3943 | host_lock_flags); | |
3944 | cmd->cmd_done(cmd); | |
3945 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
3946 | host_lock_flags); | |
3947 | } else if (cmd->cmd_done != NULL) { | |
3948 | cmd->cmd_done(cmd); | |
3949 | } | |
3950 | /* loop over until we are done with all responses */ | |
3951 | spin_lock_irqsave(lockp, hrrq_lock_flags); | |
3952 | resp = le32_to_cpu(*(pinstance->hrrq_curr[id])); | |
3953 | } | |
3954 | ||
3955 | spin_unlock_irqrestore(lockp, hrrq_lock_flags); | |
3956 | } | |
3957 | ||
3958 | /** | |
3959 | * pmcraid_unregister_interrupt_handler - de-register interrupts handlers | |
3960 | * @pinstance: pointer to adapter instance structure | |
3961 | * | |
3962 | * This routine un-registers registered interrupt handler and | |
3963 | * also frees irqs/vectors. | |
3964 | * | |
3965 | * Retun Value | |
3966 | * None | |
3967 | */ | |
3968 | static | |
3969 | void pmcraid_unregister_interrupt_handler(struct pmcraid_instance *pinstance) | |
3970 | { | |
eab5c150 | 3971 | struct pci_dev *pdev = pinstance->pdev; |
c20c4267 AR |
3972 | int i; |
3973 | ||
3974 | for (i = 0; i < pinstance->num_hrrq; i++) | |
eab5c150 | 3975 | free_irq(pci_irq_vector(pdev, i), &pinstance->hrrq_vector[i]); |
c20c4267 | 3976 | |
eab5c150 CH |
3977 | pinstance->interrupt_mode = 0; |
3978 | pci_free_irq_vectors(pdev); | |
89a36810 AR |
3979 | } |
3980 | ||
3981 | /** | |
3982 | * pmcraid_register_interrupt_handler - registers interrupt handler | |
3983 | * @pinstance: pointer to per-adapter instance structure | |
3984 | * | |
3985 | * Return Value | |
3986 | * 0 on success, non-zero error code otherwise. | |
3987 | */ | |
3988 | static int | |
3989 | pmcraid_register_interrupt_handler(struct pmcraid_instance *pinstance) | |
3990 | { | |
3991 | struct pci_dev *pdev = pinstance->pdev; | |
eab5c150 CH |
3992 | unsigned int irq_flag = PCI_IRQ_LEGACY, flag; |
3993 | int num_hrrq, rc, i; | |
3994 | irq_handler_t isr; | |
89a36810 | 3995 | |
eab5c150 CH |
3996 | if (pmcraid_enable_msix) |
3997 | irq_flag |= PCI_IRQ_MSIX; | |
3998 | ||
3999 | num_hrrq = pci_alloc_irq_vectors(pdev, 1, PMCRAID_NUM_MSIX_VECTORS, | |
4000 | irq_flag); | |
4001 | if (num_hrrq < 0) | |
4002 | return num_hrrq; | |
4003 | ||
4004 | if (pdev->msix_enabled) { | |
4005 | flag = 0; | |
4006 | isr = pmcraid_isr_msix; | |
4007 | } else { | |
4008 | flag = IRQF_SHARED; | |
4009 | isr = pmcraid_isr; | |
4010 | } | |
4011 | ||
4012 | for (i = 0; i < num_hrrq; i++) { | |
4013 | struct pmcraid_isr_param *vec = &pinstance->hrrq_vector[i]; | |
4014 | ||
4015 | vec->hrrq_id = i; | |
4016 | vec->drv_inst = pinstance; | |
4017 | rc = request_irq(pci_irq_vector(pdev, i), isr, flag, | |
4018 | PMCRAID_DRIVER_NAME, vec); | |
4019 | if (rc) | |
4020 | goto out_unwind; | |
4021 | } | |
c20c4267 | 4022 | |
eab5c150 CH |
4023 | pinstance->num_hrrq = num_hrrq; |
4024 | if (pdev->msix_enabled) { | |
c20c4267 AR |
4025 | pinstance->interrupt_mode = 1; |
4026 | iowrite32(DOORBELL_INTR_MODE_MSIX, | |
4027 | pinstance->int_regs.host_ioa_interrupt_reg); | |
4028 | ioread32(pinstance->int_regs.host_ioa_interrupt_reg); | |
c20c4267 AR |
4029 | } |
4030 | ||
eab5c150 CH |
4031 | return 0; |
4032 | ||
4033 | out_unwind: | |
ec1e8adc | 4034 | while (--i >= 0) |
eab5c150 CH |
4035 | free_irq(pci_irq_vector(pdev, i), &pinstance->hrrq_vector[i]); |
4036 | pci_free_irq_vectors(pdev); | |
c20c4267 | 4037 | return rc; |
89a36810 AR |
4038 | } |
4039 | ||
4040 | /** | |
4041 | * pmcraid_release_cmd_blocks - release buufers allocated for command blocks | |
4042 | * @pinstance: per adapter instance structure pointer | |
4043 | * @max_index: number of buffer blocks to release | |
4044 | * | |
4045 | * Return Value | |
4046 | * None | |
4047 | */ | |
4048 | static void | |
4049 | pmcraid_release_cmd_blocks(struct pmcraid_instance *pinstance, int max_index) | |
4050 | { | |
4051 | int i; | |
4052 | for (i = 0; i < max_index; i++) { | |
4053 | kmem_cache_free(pinstance->cmd_cachep, pinstance->cmd_list[i]); | |
4054 | pinstance->cmd_list[i] = NULL; | |
4055 | } | |
4056 | kmem_cache_destroy(pinstance->cmd_cachep); | |
4057 | pinstance->cmd_cachep = NULL; | |
4058 | } | |
4059 | ||
4060 | /** | |
4061 | * pmcraid_release_control_blocks - releases buffers alloced for control blocks | |
4062 | * @pinstance: pointer to per adapter instance structure | |
4063 | * @max_index: number of buffers (from 0 onwards) to release | |
4064 | * | |
4065 | * This function assumes that the command blocks for which control blocks are | |
4066 | * linked are not released. | |
4067 | * | |
4068 | * Return Value | |
4069 | * None | |
4070 | */ | |
4071 | static void | |
4072 | pmcraid_release_control_blocks( | |
4073 | struct pmcraid_instance *pinstance, | |
4074 | int max_index | |
4075 | ) | |
4076 | { | |
4077 | int i; | |
4078 | ||
4079 | if (pinstance->control_pool == NULL) | |
4080 | return; | |
4081 | ||
4082 | for (i = 0; i < max_index; i++) { | |
a7ec87a9 | 4083 | dma_pool_free(pinstance->control_pool, |
89a36810 AR |
4084 | pinstance->cmd_list[i]->ioa_cb, |
4085 | pinstance->cmd_list[i]->ioa_cb_bus_addr); | |
4086 | pinstance->cmd_list[i]->ioa_cb = NULL; | |
4087 | pinstance->cmd_list[i]->ioa_cb_bus_addr = 0; | |
4088 | } | |
a7ec87a9 | 4089 | dma_pool_destroy(pinstance->control_pool); |
89a36810 AR |
4090 | pinstance->control_pool = NULL; |
4091 | } | |
4092 | ||
4093 | /** | |
4094 | * pmcraid_allocate_cmd_blocks - allocate memory for cmd block structures | |
3673b7b0 | 4095 | * @pinstance: pointer to per adapter instance structure |
89a36810 AR |
4096 | * |
4097 | * Allocates memory for command blocks using kernel slab allocator. | |
4098 | * | |
4099 | * Return Value | |
4100 | * 0 in case of success; -ENOMEM in case of failure | |
4101 | */ | |
6f039790 | 4102 | static int pmcraid_allocate_cmd_blocks(struct pmcraid_instance *pinstance) |
89a36810 AR |
4103 | { |
4104 | int i; | |
4105 | ||
4106 | sprintf(pinstance->cmd_pool_name, "pmcraid_cmd_pool_%d", | |
4107 | pinstance->host->unique_id); | |
4108 | ||
4109 | ||
4110 | pinstance->cmd_cachep = kmem_cache_create( | |
4111 | pinstance->cmd_pool_name, | |
4112 | sizeof(struct pmcraid_cmd), 0, | |
4113 | SLAB_HWCACHE_ALIGN, NULL); | |
4114 | if (!pinstance->cmd_cachep) | |
4115 | return -ENOMEM; | |
4116 | ||
4117 | for (i = 0; i < PMCRAID_MAX_CMD; i++) { | |
4118 | pinstance->cmd_list[i] = | |
4119 | kmem_cache_alloc(pinstance->cmd_cachep, GFP_KERNEL); | |
4120 | if (!pinstance->cmd_list[i]) { | |
4121 | pmcraid_release_cmd_blocks(pinstance, i); | |
4122 | return -ENOMEM; | |
4123 | } | |
4124 | } | |
4125 | return 0; | |
4126 | } | |
4127 | ||
4128 | /** | |
4129 | * pmcraid_allocate_control_blocks - allocates memory control blocks | |
4130 | * @pinstance : pointer to per adapter instance structure | |
4131 | * | |
4132 | * This function allocates PCI memory for DMAable buffers like IOARCB, IOADLs | |
4133 | * and IOASAs. This is called after command blocks are already allocated. | |
4134 | * | |
4135 | * Return Value | |
4136 | * 0 in case it can allocate all control blocks, otherwise -ENOMEM | |
4137 | */ | |
6f039790 | 4138 | static int pmcraid_allocate_control_blocks(struct pmcraid_instance *pinstance) |
89a36810 AR |
4139 | { |
4140 | int i; | |
4141 | ||
4142 | sprintf(pinstance->ctl_pool_name, "pmcraid_control_pool_%d", | |
4143 | pinstance->host->unique_id); | |
4144 | ||
4145 | pinstance->control_pool = | |
a7ec87a9 RP |
4146 | dma_pool_create(pinstance->ctl_pool_name, |
4147 | &pinstance->pdev->dev, | |
89a36810 AR |
4148 | sizeof(struct pmcraid_control_block), |
4149 | PMCRAID_IOARCB_ALIGNMENT, 0); | |
4150 | ||
4151 | if (!pinstance->control_pool) | |
4152 | return -ENOMEM; | |
4153 | ||
4154 | for (i = 0; i < PMCRAID_MAX_CMD; i++) { | |
4155 | pinstance->cmd_list[i]->ioa_cb = | |
f8f794a1 | 4156 | dma_pool_zalloc( |
89a36810 AR |
4157 | pinstance->control_pool, |
4158 | GFP_KERNEL, | |
4159 | &(pinstance->cmd_list[i]->ioa_cb_bus_addr)); | |
4160 | ||
4161 | if (!pinstance->cmd_list[i]->ioa_cb) { | |
4162 | pmcraid_release_control_blocks(pinstance, i); | |
4163 | return -ENOMEM; | |
4164 | } | |
89a36810 AR |
4165 | } |
4166 | return 0; | |
4167 | } | |
4168 | ||
4169 | /** | |
4170 | * pmcraid_release_host_rrqs - release memory allocated for hrrq buffer(s) | |
4171 | * @pinstance: pointer to per adapter instance structure | |
4172 | * @maxindex: size of hrrq buffer pointer array | |
4173 | * | |
4174 | * Return Value | |
4175 | * None | |
4176 | */ | |
4177 | static void | |
4178 | pmcraid_release_host_rrqs(struct pmcraid_instance *pinstance, int maxindex) | |
4179 | { | |
4180 | int i; | |
89a36810 | 4181 | |
371a6c32 CH |
4182 | for (i = 0; i < maxindex; i++) { |
4183 | dma_free_coherent(&pinstance->pdev->dev, | |
89a36810 AR |
4184 | HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD, |
4185 | pinstance->hrrq_start[i], | |
4186 | pinstance->hrrq_start_bus_addr[i]); | |
4187 | ||
4188 | /* reset pointers and toggle bit to zeros */ | |
4189 | pinstance->hrrq_start[i] = NULL; | |
4190 | pinstance->hrrq_start_bus_addr[i] = 0; | |
4191 | pinstance->host_toggle_bit[i] = 0; | |
4192 | } | |
4193 | } | |
4194 | ||
4195 | /** | |
4196 | * pmcraid_allocate_host_rrqs - Allocate and initialize host RRQ buffers | |
4197 | * @pinstance: pointer to per adapter instance structure | |
4198 | * | |
4199 | * Return value | |
4200 | * 0 hrrq buffers are allocated, -ENOMEM otherwise. | |
4201 | */ | |
6f039790 | 4202 | static int pmcraid_allocate_host_rrqs(struct pmcraid_instance *pinstance) |
89a36810 | 4203 | { |
c20c4267 | 4204 | int i, buffer_size; |
89a36810 | 4205 | |
c20c4267 | 4206 | buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD; |
89a36810 | 4207 | |
c20c4267 | 4208 | for (i = 0; i < pinstance->num_hrrq; i++) { |
89a36810 | 4209 | pinstance->hrrq_start[i] = |
371a6c32 CH |
4210 | dma_alloc_coherent(&pinstance->pdev->dev, buffer_size, |
4211 | &pinstance->hrrq_start_bus_addr[i], | |
4212 | GFP_KERNEL); | |
144b139c | 4213 | if (!pinstance->hrrq_start[i]) { |
c20c4267 AR |
4214 | pmcraid_err("pci_alloc failed for hrrq vector : %d\n", |
4215 | i); | |
89a36810 AR |
4216 | pmcraid_release_host_rrqs(pinstance, i); |
4217 | return -ENOMEM; | |
4218 | } | |
4219 | ||
89a36810 AR |
4220 | pinstance->hrrq_curr[i] = pinstance->hrrq_start[i]; |
4221 | pinstance->hrrq_end[i] = | |
c20c4267 | 4222 | pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1; |
89a36810 AR |
4223 | pinstance->host_toggle_bit[i] = 1; |
4224 | spin_lock_init(&pinstance->hrrq_lock[i]); | |
4225 | } | |
4226 | return 0; | |
4227 | } | |
4228 | ||
4229 | /** | |
4230 | * pmcraid_release_hcams - release HCAM buffers | |
4231 | * | |
4232 | * @pinstance: pointer to per adapter instance structure | |
4233 | * | |
4234 | * Return value | |
4235 | * none | |
4236 | */ | |
4237 | static void pmcraid_release_hcams(struct pmcraid_instance *pinstance) | |
4238 | { | |
4239 | if (pinstance->ccn.msg != NULL) { | |
371a6c32 | 4240 | dma_free_coherent(&pinstance->pdev->dev, |
89a36810 | 4241 | PMCRAID_AEN_HDR_SIZE + |
c20c4267 | 4242 | sizeof(struct pmcraid_hcam_ccn_ext), |
89a36810 AR |
4243 | pinstance->ccn.msg, |
4244 | pinstance->ccn.baddr); | |
4245 | ||
4246 | pinstance->ccn.msg = NULL; | |
4247 | pinstance->ccn.hcam = NULL; | |
4248 | pinstance->ccn.baddr = 0; | |
4249 | } | |
4250 | ||
4251 | if (pinstance->ldn.msg != NULL) { | |
371a6c32 | 4252 | dma_free_coherent(&pinstance->pdev->dev, |
89a36810 AR |
4253 | PMCRAID_AEN_HDR_SIZE + |
4254 | sizeof(struct pmcraid_hcam_ldn), | |
4255 | pinstance->ldn.msg, | |
4256 | pinstance->ldn.baddr); | |
4257 | ||
4258 | pinstance->ldn.msg = NULL; | |
4259 | pinstance->ldn.hcam = NULL; | |
4260 | pinstance->ldn.baddr = 0; | |
4261 | } | |
4262 | } | |
4263 | ||
4264 | /** | |
4265 | * pmcraid_allocate_hcams - allocates HCAM buffers | |
4266 | * @pinstance : pointer to per adapter instance structure | |
4267 | * | |
4268 | * Return Value: | |
4269 | * 0 in case of successful allocation, non-zero otherwise | |
4270 | */ | |
4271 | static int pmcraid_allocate_hcams(struct pmcraid_instance *pinstance) | |
4272 | { | |
371a6c32 | 4273 | pinstance->ccn.msg = dma_alloc_coherent(&pinstance->pdev->dev, |
89a36810 | 4274 | PMCRAID_AEN_HDR_SIZE + |
c20c4267 | 4275 | sizeof(struct pmcraid_hcam_ccn_ext), |
371a6c32 | 4276 | &pinstance->ccn.baddr, GFP_KERNEL); |
89a36810 | 4277 | |
371a6c32 | 4278 | pinstance->ldn.msg = dma_alloc_coherent(&pinstance->pdev->dev, |
89a36810 AR |
4279 | PMCRAID_AEN_HDR_SIZE + |
4280 | sizeof(struct pmcraid_hcam_ldn), | |
371a6c32 | 4281 | &pinstance->ldn.baddr, GFP_KERNEL); |
89a36810 AR |
4282 | |
4283 | if (pinstance->ldn.msg == NULL || pinstance->ccn.msg == NULL) { | |
4284 | pmcraid_release_hcams(pinstance); | |
4285 | } else { | |
4286 | pinstance->ccn.hcam = | |
4287 | (void *)pinstance->ccn.msg + PMCRAID_AEN_HDR_SIZE; | |
4288 | pinstance->ldn.hcam = | |
4289 | (void *)pinstance->ldn.msg + PMCRAID_AEN_HDR_SIZE; | |
4290 | ||
4291 | atomic_set(&pinstance->ccn.ignore, 0); | |
4292 | atomic_set(&pinstance->ldn.ignore, 0); | |
4293 | } | |
4294 | ||
4295 | return (pinstance->ldn.msg == NULL) ? -ENOMEM : 0; | |
4296 | } | |
4297 | ||
4298 | /** | |
4299 | * pmcraid_release_config_buffers - release config.table buffers | |
4300 | * @pinstance: pointer to per adapter instance structure | |
4301 | * | |
4302 | * Return Value | |
4303 | * none | |
4304 | */ | |
4305 | static void pmcraid_release_config_buffers(struct pmcraid_instance *pinstance) | |
4306 | { | |
4307 | if (pinstance->cfg_table != NULL && | |
4308 | pinstance->cfg_table_bus_addr != 0) { | |
371a6c32 | 4309 | dma_free_coherent(&pinstance->pdev->dev, |
89a36810 AR |
4310 | sizeof(struct pmcraid_config_table), |
4311 | pinstance->cfg_table, | |
4312 | pinstance->cfg_table_bus_addr); | |
4313 | pinstance->cfg_table = NULL; | |
4314 | pinstance->cfg_table_bus_addr = 0; | |
4315 | } | |
4316 | ||
4317 | if (pinstance->res_entries != NULL) { | |
4318 | int i; | |
4319 | ||
4320 | for (i = 0; i < PMCRAID_MAX_RESOURCES; i++) | |
4321 | list_del(&pinstance->res_entries[i].queue); | |
4322 | kfree(pinstance->res_entries); | |
4323 | pinstance->res_entries = NULL; | |
4324 | } | |
4325 | ||
4326 | pmcraid_release_hcams(pinstance); | |
4327 | } | |
4328 | ||
4329 | /** | |
4330 | * pmcraid_allocate_config_buffers - allocates DMAable memory for config table | |
4331 | * @pinstance : pointer to per adapter instance structure | |
4332 | * | |
4333 | * Return Value | |
4334 | * 0 for successful allocation, -ENOMEM for any failure | |
4335 | */ | |
6f039790 | 4336 | static int pmcraid_allocate_config_buffers(struct pmcraid_instance *pinstance) |
89a36810 AR |
4337 | { |
4338 | int i; | |
4339 | ||
4340 | pinstance->res_entries = | |
6396bb22 KC |
4341 | kcalloc(PMCRAID_MAX_RESOURCES, |
4342 | sizeof(struct pmcraid_resource_entry), | |
4343 | GFP_KERNEL); | |
89a36810 AR |
4344 | |
4345 | if (NULL == pinstance->res_entries) { | |
4346 | pmcraid_err("failed to allocate memory for resource table\n"); | |
4347 | return -ENOMEM; | |
4348 | } | |
4349 | ||
4350 | for (i = 0; i < PMCRAID_MAX_RESOURCES; i++) | |
4351 | list_add_tail(&pinstance->res_entries[i].queue, | |
4352 | &pinstance->free_res_q); | |
4353 | ||
371a6c32 | 4354 | pinstance->cfg_table = dma_alloc_coherent(&pinstance->pdev->dev, |
89a36810 | 4355 | sizeof(struct pmcraid_config_table), |
371a6c32 CH |
4356 | &pinstance->cfg_table_bus_addr, |
4357 | GFP_KERNEL); | |
89a36810 AR |
4358 | |
4359 | if (NULL == pinstance->cfg_table) { | |
4360 | pmcraid_err("couldn't alloc DMA memory for config table\n"); | |
4361 | pmcraid_release_config_buffers(pinstance); | |
4362 | return -ENOMEM; | |
4363 | } | |
4364 | ||
4365 | if (pmcraid_allocate_hcams(pinstance)) { | |
4366 | pmcraid_err("could not alloc DMA memory for HCAMS\n"); | |
4367 | pmcraid_release_config_buffers(pinstance); | |
4368 | return -ENOMEM; | |
4369 | } | |
4370 | ||
4371 | return 0; | |
4372 | } | |
4373 | ||
4374 | /** | |
4375 | * pmcraid_init_tasklets - registers tasklets for response handling | |
4376 | * | |
4377 | * @pinstance: pointer adapter instance structure | |
4378 | * | |
4379 | * Return value | |
4380 | * none | |
4381 | */ | |
4382 | static void pmcraid_init_tasklets(struct pmcraid_instance *pinstance) | |
4383 | { | |
4384 | int i; | |
4385 | for (i = 0; i < pinstance->num_hrrq; i++) | |
4386 | tasklet_init(&pinstance->isr_tasklet[i], | |
4387 | pmcraid_tasklet_function, | |
4388 | (unsigned long)&pinstance->hrrq_vector[i]); | |
4389 | } | |
4390 | ||
4391 | /** | |
4392 | * pmcraid_kill_tasklets - destroys tasklets registered for response handling | |
4393 | * | |
4394 | * @pinstance: pointer to adapter instance structure | |
4395 | * | |
4396 | * Return value | |
4397 | * none | |
4398 | */ | |
4399 | static void pmcraid_kill_tasklets(struct pmcraid_instance *pinstance) | |
4400 | { | |
4401 | int i; | |
4402 | for (i = 0; i < pinstance->num_hrrq; i++) | |
4403 | tasklet_kill(&pinstance->isr_tasklet[i]); | |
4404 | } | |
4405 | ||
c20c4267 AR |
4406 | /** |
4407 | * pmcraid_release_buffers - release per-adapter buffers allocated | |
4408 | * | |
4409 | * @pinstance: pointer to adapter soft state | |
4410 | * | |
4411 | * Return Value | |
4412 | * none | |
4413 | */ | |
4414 | static void pmcraid_release_buffers(struct pmcraid_instance *pinstance) | |
4415 | { | |
4416 | pmcraid_release_config_buffers(pinstance); | |
4417 | pmcraid_release_control_blocks(pinstance, PMCRAID_MAX_CMD); | |
4418 | pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD); | |
4419 | pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq); | |
4420 | ||
4421 | if (pinstance->inq_data != NULL) { | |
371a6c32 | 4422 | dma_free_coherent(&pinstance->pdev->dev, |
c20c4267 AR |
4423 | sizeof(struct pmcraid_inquiry_data), |
4424 | pinstance->inq_data, | |
4425 | pinstance->inq_data_baddr); | |
4426 | ||
4427 | pinstance->inq_data = NULL; | |
4428 | pinstance->inq_data_baddr = 0; | |
4429 | } | |
592488a3 AR |
4430 | |
4431 | if (pinstance->timestamp_data != NULL) { | |
371a6c32 | 4432 | dma_free_coherent(&pinstance->pdev->dev, |
592488a3 AR |
4433 | sizeof(struct pmcraid_timestamp_data), |
4434 | pinstance->timestamp_data, | |
4435 | pinstance->timestamp_data_baddr); | |
4436 | ||
4437 | pinstance->timestamp_data = NULL; | |
4438 | pinstance->timestamp_data_baddr = 0; | |
4439 | } | |
c20c4267 AR |
4440 | } |
4441 | ||
89a36810 AR |
4442 | /** |
4443 | * pmcraid_init_buffers - allocates memory and initializes various structures | |
4444 | * @pinstance: pointer to per adapter instance structure | |
4445 | * | |
4446 | * This routine pre-allocates memory based on the type of block as below: | |
4447 | * cmdblocks(PMCRAID_MAX_CMD): kernel memory using kernel's slab_allocator, | |
4448 | * IOARCBs(PMCRAID_MAX_CMD) : DMAable memory, using pci pool allocator | |
371a6c32 CH |
4449 | * config-table entries : DMAable memory using dma_alloc_coherent |
4450 | * HostRRQs : DMAable memory, using dma_alloc_coherent | |
89a36810 AR |
4451 | * |
4452 | * Return Value | |
4453 | * 0 in case all of the blocks are allocated, -ENOMEM otherwise. | |
4454 | */ | |
6f039790 | 4455 | static int pmcraid_init_buffers(struct pmcraid_instance *pinstance) |
89a36810 AR |
4456 | { |
4457 | int i; | |
4458 | ||
4459 | if (pmcraid_allocate_host_rrqs(pinstance)) { | |
4460 | pmcraid_err("couldn't allocate memory for %d host rrqs\n", | |
4461 | pinstance->num_hrrq); | |
4462 | return -ENOMEM; | |
4463 | } | |
4464 | ||
4465 | if (pmcraid_allocate_config_buffers(pinstance)) { | |
4466 | pmcraid_err("couldn't allocate memory for config buffers\n"); | |
4467 | pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq); | |
4468 | return -ENOMEM; | |
4469 | } | |
4470 | ||
4471 | if (pmcraid_allocate_cmd_blocks(pinstance)) { | |
c20c4267 | 4472 | pmcraid_err("couldn't allocate memory for cmd blocks\n"); |
89a36810 AR |
4473 | pmcraid_release_config_buffers(pinstance); |
4474 | pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq); | |
4475 | return -ENOMEM; | |
4476 | } | |
4477 | ||
4478 | if (pmcraid_allocate_control_blocks(pinstance)) { | |
c20c4267 | 4479 | pmcraid_err("couldn't allocate memory control blocks\n"); |
89a36810 AR |
4480 | pmcraid_release_config_buffers(pinstance); |
4481 | pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD); | |
4482 | pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq); | |
4483 | return -ENOMEM; | |
4484 | } | |
4485 | ||
c20c4267 | 4486 | /* allocate DMAable memory for page D0 INQUIRY buffer */ |
371a6c32 | 4487 | pinstance->inq_data = dma_alloc_coherent(&pinstance->pdev->dev, |
c20c4267 | 4488 | sizeof(struct pmcraid_inquiry_data), |
371a6c32 | 4489 | &pinstance->inq_data_baddr, GFP_KERNEL); |
c20c4267 AR |
4490 | if (pinstance->inq_data == NULL) { |
4491 | pmcraid_err("couldn't allocate DMA memory for INQUIRY\n"); | |
4492 | pmcraid_release_buffers(pinstance); | |
4493 | return -ENOMEM; | |
4494 | } | |
4495 | ||
592488a3 | 4496 | /* allocate DMAable memory for set timestamp data buffer */ |
371a6c32 | 4497 | pinstance->timestamp_data = dma_alloc_coherent(&pinstance->pdev->dev, |
592488a3 | 4498 | sizeof(struct pmcraid_timestamp_data), |
371a6c32 CH |
4499 | &pinstance->timestamp_data_baddr, |
4500 | GFP_KERNEL); | |
592488a3 AR |
4501 | if (pinstance->timestamp_data == NULL) { |
4502 | pmcraid_err("couldn't allocate DMA memory for \ | |
4503 | set time_stamp \n"); | |
4504 | pmcraid_release_buffers(pinstance); | |
4505 | return -ENOMEM; | |
4506 | } | |
4507 | ||
4508 | ||
89a36810 AR |
4509 | /* Initialize all the command blocks and add them to free pool. No |
4510 | * need to lock (free_pool_lock) as this is done in initialization | |
4511 | * itself | |
4512 | */ | |
4513 | for (i = 0; i < PMCRAID_MAX_CMD; i++) { | |
4514 | struct pmcraid_cmd *cmdp = pinstance->cmd_list[i]; | |
4515 | pmcraid_init_cmdblk(cmdp, i); | |
4516 | cmdp->drv_inst = pinstance; | |
4517 | list_add_tail(&cmdp->free_list, &pinstance->free_cmd_pool); | |
4518 | } | |
4519 | ||
4520 | return 0; | |
4521 | } | |
4522 | ||
4523 | /** | |
4524 | * pmcraid_reinit_buffers - resets various buffer pointers | |
4525 | * @pinstance: pointer to adapter instance | |
4526 | * Return value | |
c20c4267 | 4527 | * none |
89a36810 AR |
4528 | */ |
4529 | static void pmcraid_reinit_buffers(struct pmcraid_instance *pinstance) | |
4530 | { | |
4531 | int i; | |
4532 | int buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD; | |
4533 | ||
4534 | for (i = 0; i < pinstance->num_hrrq; i++) { | |
4535 | memset(pinstance->hrrq_start[i], 0, buffer_size); | |
4536 | pinstance->hrrq_curr[i] = pinstance->hrrq_start[i]; | |
4537 | pinstance->hrrq_end[i] = | |
4538 | pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1; | |
4539 | pinstance->host_toggle_bit[i] = 1; | |
4540 | } | |
4541 | } | |
4542 | ||
4543 | /** | |
4544 | * pmcraid_init_instance - initialize per instance data structure | |
4545 | * @pdev: pointer to pci device structure | |
4546 | * @host: pointer to Scsi_Host structure | |
4547 | * @mapped_pci_addr: memory mapped IOA configuration registers | |
4548 | * | |
4549 | * Return Value | |
4550 | * 0 on success, non-zero in case of any failure | |
4551 | */ | |
6f039790 GKH |
4552 | static int pmcraid_init_instance(struct pci_dev *pdev, struct Scsi_Host *host, |
4553 | void __iomem *mapped_pci_addr) | |
89a36810 AR |
4554 | { |
4555 | struct pmcraid_instance *pinstance = | |
4556 | (struct pmcraid_instance *)host->hostdata; | |
4557 | ||
4558 | pinstance->host = host; | |
4559 | pinstance->pdev = pdev; | |
4560 | ||
4561 | /* Initialize register addresses */ | |
4562 | pinstance->mapped_dma_addr = mapped_pci_addr; | |
4563 | ||
4564 | /* Initialize chip-specific details */ | |
4565 | { | |
4566 | struct pmcraid_chip_details *chip_cfg = pinstance->chip_cfg; | |
4567 | struct pmcraid_interrupts *pint_regs = &pinstance->int_regs; | |
4568 | ||
4569 | pinstance->ioarrin = mapped_pci_addr + chip_cfg->ioarrin; | |
4570 | ||
4571 | pint_regs->ioa_host_interrupt_reg = | |
4572 | mapped_pci_addr + chip_cfg->ioa_host_intr; | |
4573 | pint_regs->ioa_host_interrupt_clr_reg = | |
4574 | mapped_pci_addr + chip_cfg->ioa_host_intr_clr; | |
c20c4267 AR |
4575 | pint_regs->ioa_host_msix_interrupt_reg = |
4576 | mapped_pci_addr + chip_cfg->ioa_host_msix_intr; | |
89a36810 AR |
4577 | pint_regs->host_ioa_interrupt_reg = |
4578 | mapped_pci_addr + chip_cfg->host_ioa_intr; | |
4579 | pint_regs->host_ioa_interrupt_clr_reg = | |
4580 | mapped_pci_addr + chip_cfg->host_ioa_intr_clr; | |
4581 | ||
4582 | /* Current version of firmware exposes interrupt mask set | |
4583 | * and mask clr registers through memory mapped bar0. | |
4584 | */ | |
4585 | pinstance->mailbox = mapped_pci_addr + chip_cfg->mailbox; | |
4586 | pinstance->ioa_status = mapped_pci_addr + chip_cfg->ioastatus; | |
4587 | pint_regs->ioa_host_interrupt_mask_reg = | |
4588 | mapped_pci_addr + chip_cfg->ioa_host_mask; | |
4589 | pint_regs->ioa_host_interrupt_mask_clr_reg = | |
4590 | mapped_pci_addr + chip_cfg->ioa_host_mask_clr; | |
4591 | pint_regs->global_interrupt_mask_reg = | |
4592 | mapped_pci_addr + chip_cfg->global_intr_mask; | |
21a023ce | 4593 | } |
89a36810 AR |
4594 | |
4595 | pinstance->ioa_reset_attempts = 0; | |
4596 | init_waitqueue_head(&pinstance->reset_wait_q); | |
4597 | ||
4598 | atomic_set(&pinstance->outstanding_cmds, 0); | |
c20c4267 | 4599 | atomic_set(&pinstance->last_message_id, 0); |
89a36810 AR |
4600 | atomic_set(&pinstance->expose_resources, 0); |
4601 | ||
4602 | INIT_LIST_HEAD(&pinstance->free_res_q); | |
4603 | INIT_LIST_HEAD(&pinstance->used_res_q); | |
4604 | INIT_LIST_HEAD(&pinstance->free_cmd_pool); | |
4605 | INIT_LIST_HEAD(&pinstance->pending_cmd_pool); | |
4606 | ||
4607 | spin_lock_init(&pinstance->free_pool_lock); | |
4608 | spin_lock_init(&pinstance->pending_pool_lock); | |
4609 | spin_lock_init(&pinstance->resource_lock); | |
4610 | mutex_init(&pinstance->aen_queue_lock); | |
4611 | ||
4612 | /* Work-queue (Shared) for deferred processing error handling */ | |
4613 | INIT_WORK(&pinstance->worker_q, pmcraid_worker_function); | |
4614 | ||
4615 | /* Initialize the default log_level */ | |
4616 | pinstance->current_log_level = pmcraid_log_level; | |
4617 | ||
4618 | /* Setup variables required for reset engine */ | |
4619 | pinstance->ioa_state = IOA_STATE_UNKNOWN; | |
4620 | pinstance->reset_cmd = NULL; | |
4621 | return 0; | |
4622 | } | |
4623 | ||
89a36810 AR |
4624 | /** |
4625 | * pmcraid_shutdown - shutdown adapter controller. | |
4626 | * @pdev: pci device struct | |
4627 | * | |
4628 | * Issues an adapter shutdown to the card waits for its completion | |
4629 | * | |
4630 | * Return value | |
4631 | * none | |
4632 | */ | |
4633 | static void pmcraid_shutdown(struct pci_dev *pdev) | |
4634 | { | |
4635 | struct pmcraid_instance *pinstance = pci_get_drvdata(pdev); | |
4636 | pmcraid_reset_bringdown(pinstance); | |
4637 | } | |
4638 | ||
4639 | ||
3673b7b0 | 4640 | /* |
89a36810 AR |
4641 | * pmcraid_get_minor - returns unused minor number from minor number bitmap |
4642 | */ | |
4643 | static unsigned short pmcraid_get_minor(void) | |
4644 | { | |
4645 | int minor; | |
4646 | ||
36d9e0e8 | 4647 | minor = find_first_zero_bit(pmcraid_minor, PMCRAID_MAX_ADAPTERS); |
89a36810 AR |
4648 | __set_bit(minor, pmcraid_minor); |
4649 | return minor; | |
4650 | } | |
4651 | ||
3673b7b0 | 4652 | /* |
89a36810 AR |
4653 | * pmcraid_release_minor - releases given minor back to minor number bitmap |
4654 | */ | |
4655 | static void pmcraid_release_minor(unsigned short minor) | |
4656 | { | |
4657 | __clear_bit(minor, pmcraid_minor); | |
4658 | } | |
4659 | ||
4660 | /** | |
4661 | * pmcraid_setup_chrdev - allocates a minor number and registers a char device | |
4662 | * | |
4663 | * @pinstance: pointer to adapter instance for which to register device | |
4664 | * | |
4665 | * Return value | |
4666 | * 0 in case of success, otherwise non-zero | |
4667 | */ | |
4668 | static int pmcraid_setup_chrdev(struct pmcraid_instance *pinstance) | |
4669 | { | |
4670 | int minor; | |
4671 | int error; | |
4672 | ||
4673 | minor = pmcraid_get_minor(); | |
4674 | cdev_init(&pinstance->cdev, &pmcraid_fops); | |
4675 | pinstance->cdev.owner = THIS_MODULE; | |
4676 | ||
4677 | error = cdev_add(&pinstance->cdev, MKDEV(pmcraid_major, minor), 1); | |
4678 | ||
4679 | if (error) | |
4680 | pmcraid_release_minor(minor); | |
4681 | else | |
4682 | device_create(pmcraid_class, NULL, MKDEV(pmcraid_major, minor), | |
c20c4267 | 4683 | NULL, "%s%u", PMCRAID_DEVFILE, minor); |
89a36810 AR |
4684 | return error; |
4685 | } | |
4686 | ||
4687 | /** | |
4688 | * pmcraid_release_chrdev - unregisters per-adapter management interface | |
4689 | * | |
4690 | * @pinstance: pointer to adapter instance structure | |
4691 | * | |
4692 | * Return value | |
4693 | * none | |
4694 | */ | |
4695 | static void pmcraid_release_chrdev(struct pmcraid_instance *pinstance) | |
4696 | { | |
4697 | pmcraid_release_minor(MINOR(pinstance->cdev.dev)); | |
4698 | device_destroy(pmcraid_class, | |
4699 | MKDEV(pmcraid_major, MINOR(pinstance->cdev.dev))); | |
4700 | cdev_del(&pinstance->cdev); | |
4701 | } | |
4702 | ||
4703 | /** | |
4704 | * pmcraid_remove - IOA hot plug remove entry point | |
4705 | * @pdev: pci device struct | |
4706 | * | |
4707 | * Return value | |
4708 | * none | |
4709 | */ | |
6f039790 | 4710 | static void pmcraid_remove(struct pci_dev *pdev) |
89a36810 AR |
4711 | { |
4712 | struct pmcraid_instance *pinstance = pci_get_drvdata(pdev); | |
4713 | ||
4714 | /* remove the management interface (/dev file) for this device */ | |
4715 | pmcraid_release_chrdev(pinstance); | |
4716 | ||
4717 | /* remove host template from scsi midlayer */ | |
4718 | scsi_remove_host(pinstance->host); | |
4719 | ||
4720 | /* block requests from mid-layer */ | |
4721 | scsi_block_requests(pinstance->host); | |
4722 | ||
4723 | /* initiate shutdown adapter */ | |
4724 | pmcraid_shutdown(pdev); | |
4725 | ||
4726 | pmcraid_disable_interrupts(pinstance, ~0); | |
43829731 | 4727 | flush_work(&pinstance->worker_q); |
89a36810 AR |
4728 | |
4729 | pmcraid_kill_tasklets(pinstance); | |
4730 | pmcraid_unregister_interrupt_handler(pinstance); | |
4731 | pmcraid_release_buffers(pinstance); | |
4732 | iounmap(pinstance->mapped_dma_addr); | |
4733 | pci_release_regions(pdev); | |
4734 | scsi_host_put(pinstance->host); | |
4735 | pci_disable_device(pdev); | |
4736 | ||
4737 | return; | |
4738 | } | |
4739 | ||
89a36810 AR |
4740 | /** |
4741 | * pmcraid_suspend - driver suspend entry point for power management | |
ac85cca3 | 4742 | * @dev: Device structure |
89a36810 AR |
4743 | * |
4744 | * Return Value - 0 always | |
4745 | */ | |
ac85cca3 | 4746 | static int __maybe_unused pmcraid_suspend(struct device *dev) |
89a36810 | 4747 | { |
ac85cca3 | 4748 | struct pci_dev *pdev = to_pci_dev(dev); |
89a36810 AR |
4749 | struct pmcraid_instance *pinstance = pci_get_drvdata(pdev); |
4750 | ||
4751 | pmcraid_shutdown(pdev); | |
4752 | pmcraid_disable_interrupts(pinstance, ~0); | |
4753 | pmcraid_kill_tasklets(pinstance); | |
89a36810 | 4754 | pmcraid_unregister_interrupt_handler(pinstance); |
89a36810 AR |
4755 | |
4756 | return 0; | |
4757 | } | |
4758 | ||
4759 | /** | |
4760 | * pmcraid_resume - driver resume entry point PCI power management | |
ac85cca3 | 4761 | * @dev: Device structure |
89a36810 AR |
4762 | * |
4763 | * Return Value - 0 in case of success. Error code in case of any failure | |
4764 | */ | |
ac85cca3 | 4765 | static int __maybe_unused pmcraid_resume(struct device *dev) |
89a36810 | 4766 | { |
ac85cca3 | 4767 | struct pci_dev *pdev = to_pci_dev(dev); |
89a36810 AR |
4768 | struct pmcraid_instance *pinstance = pci_get_drvdata(pdev); |
4769 | struct Scsi_Host *host = pinstance->host; | |
ac85cca3 | 4770 | int rc = 0; |
89a36810 | 4771 | |
371a6c32 CH |
4772 | if (sizeof(dma_addr_t) == 4 || |
4773 | dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) | |
4774 | rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); | |
89a36810 AR |
4775 | |
4776 | if (rc == 0) | |
371a6c32 | 4777 | rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); |
89a36810 AR |
4778 | |
4779 | if (rc != 0) { | |
34876402 | 4780 | dev_err(&pdev->dev, "resume: Failed to set PCI DMA mask\n"); |
89a36810 AR |
4781 | goto disable_device; |
4782 | } | |
4783 | ||
c20c4267 | 4784 | pmcraid_disable_interrupts(pinstance, ~0); |
89a36810 | 4785 | atomic_set(&pinstance->outstanding_cmds, 0); |
89a36810 AR |
4786 | rc = pmcraid_register_interrupt_handler(pinstance); |
4787 | ||
4788 | if (rc) { | |
34876402 AR |
4789 | dev_err(&pdev->dev, |
4790 | "resume: couldn't register interrupt handlers\n"); | |
89a36810 AR |
4791 | rc = -ENODEV; |
4792 | goto release_host; | |
4793 | } | |
4794 | ||
4795 | pmcraid_init_tasklets(pinstance); | |
4796 | pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS); | |
4797 | ||
4798 | /* Start with hard reset sequence which brings up IOA to operational | |
4799 | * state as well as completes the reset sequence. | |
4800 | */ | |
4801 | pinstance->ioa_hard_reset = 1; | |
4802 | ||
4803 | /* Start IOA firmware initialization and bring card to Operational | |
4804 | * state. | |
4805 | */ | |
4806 | if (pmcraid_reset_bringup(pinstance)) { | |
c20c4267 | 4807 | dev_err(&pdev->dev, "couldn't initialize IOA\n"); |
89a36810 AR |
4808 | rc = -ENODEV; |
4809 | goto release_tasklets; | |
4810 | } | |
4811 | ||
4812 | return 0; | |
4813 | ||
4814 | release_tasklets: | |
c20c4267 | 4815 | pmcraid_disable_interrupts(pinstance, ~0); |
89a36810 AR |
4816 | pmcraid_kill_tasklets(pinstance); |
4817 | pmcraid_unregister_interrupt_handler(pinstance); | |
4818 | ||
4819 | release_host: | |
4820 | scsi_host_put(host); | |
4821 | ||
4822 | disable_device: | |
89a36810 AR |
4823 | |
4824 | return rc; | |
4825 | } | |
4826 | ||
89a36810 AR |
4827 | /** |
4828 | * pmcraid_complete_ioa_reset - Called by either timer or tasklet during | |
c20c4267 | 4829 | * completion of the ioa reset |
89a36810 AR |
4830 | * @cmd: pointer to reset command block |
4831 | */ | |
4832 | static void pmcraid_complete_ioa_reset(struct pmcraid_cmd *cmd) | |
4833 | { | |
4834 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
4835 | unsigned long flags; | |
4836 | ||
4837 | spin_lock_irqsave(pinstance->host->host_lock, flags); | |
4838 | pmcraid_ioa_reset(cmd); | |
4839 | spin_unlock_irqrestore(pinstance->host->host_lock, flags); | |
4840 | scsi_unblock_requests(pinstance->host); | |
4841 | schedule_work(&pinstance->worker_q); | |
4842 | } | |
4843 | ||
4844 | /** | |
4845 | * pmcraid_set_supported_devs - sends SET SUPPORTED DEVICES to IOAFP | |
4846 | * | |
4847 | * @cmd: pointer to pmcraid_cmd structure | |
4848 | * | |
4849 | * Return Value | |
4850 | * 0 for success or non-zero for failure cases | |
4851 | */ | |
4852 | static void pmcraid_set_supported_devs(struct pmcraid_cmd *cmd) | |
4853 | { | |
4854 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
4855 | void (*cmd_done) (struct pmcraid_cmd *) = pmcraid_complete_ioa_reset; | |
4856 | ||
4857 | pmcraid_reinit_cmdblk(cmd); | |
4858 | ||
4859 | ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
4860 | ioarcb->request_type = REQ_TYPE_IOACMD; | |
4861 | ioarcb->cdb[0] = PMCRAID_SET_SUPPORTED_DEVICES; | |
4862 | ioarcb->cdb[1] = ALL_DEVICES_SUPPORTED; | |
4863 | ||
4864 | /* If this was called as part of resource table reinitialization due to | |
4865 | * lost CCN, it is enough to return the command block back to free pool | |
4866 | * as part of set_supported_devs completion function. | |
4867 | */ | |
4868 | if (cmd->drv_inst->reinit_cfg_table) { | |
4869 | cmd->drv_inst->reinit_cfg_table = 0; | |
4870 | cmd->release = 1; | |
4871 | cmd_done = pmcraid_reinit_cfgtable_done; | |
4872 | } | |
4873 | ||
4874 | /* we will be done with the reset sequence after set supported devices, | |
4875 | * setup the done function to return the command block back to free | |
4876 | * pool | |
4877 | */ | |
4878 | pmcraid_send_cmd(cmd, | |
4879 | cmd_done, | |
4880 | PMCRAID_SET_SUP_DEV_TIMEOUT, | |
4881 | pmcraid_timeout_handler); | |
4882 | return; | |
4883 | } | |
4884 | ||
592488a3 AR |
4885 | /** |
4886 | * pmcraid_set_timestamp - set the timestamp to IOAFP | |
4887 | * | |
4888 | * @cmd: pointer to pmcraid_cmd structure | |
4889 | * | |
4890 | * Return Value | |
4891 | * 0 for success or non-zero for failure cases | |
4892 | */ | |
4893 | static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd) | |
4894 | { | |
4895 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
4896 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
4897 | __be32 time_stamp_len = cpu_to_be32(PMCRAID_TIMESTAMP_LEN); | |
b22ee87d | 4898 | struct pmcraid_ioadl_desc *ioadl; |
45c80be6 | 4899 | u64 timestamp; |
592488a3 | 4900 | |
9c9bd593 | 4901 | timestamp = ktime_get_real_seconds() * 1000; |
592488a3 AR |
4902 | |
4903 | pinstance->timestamp_data->timestamp[0] = (__u8)(timestamp); | |
4904 | pinstance->timestamp_data->timestamp[1] = (__u8)((timestamp) >> 8); | |
4905 | pinstance->timestamp_data->timestamp[2] = (__u8)((timestamp) >> 16); | |
4906 | pinstance->timestamp_data->timestamp[3] = (__u8)((timestamp) >> 24); | |
4907 | pinstance->timestamp_data->timestamp[4] = (__u8)((timestamp) >> 32); | |
4908 | pinstance->timestamp_data->timestamp[5] = (__u8)((timestamp) >> 40); | |
4909 | ||
4910 | pmcraid_reinit_cmdblk(cmd); | |
4911 | ioarcb->request_type = REQ_TYPE_SCSI; | |
4912 | ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
4913 | ioarcb->cdb[0] = PMCRAID_SCSI_SET_TIMESTAMP; | |
4914 | ioarcb->cdb[1] = PMCRAID_SCSI_SERVICE_ACTION; | |
4915 | memcpy(&(ioarcb->cdb[6]), &time_stamp_len, sizeof(time_stamp_len)); | |
4916 | ||
4917 | ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
4918 | offsetof(struct pmcraid_ioarcb, | |
4919 | add_data.u.ioadl[0])); | |
4920 | ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); | |
45c80be6 | 4921 | ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL)); |
592488a3 AR |
4922 | |
4923 | ioarcb->request_flags0 |= NO_LINK_DESCS; | |
4924 | ioarcb->request_flags0 |= TRANSFER_DIR_WRITE; | |
4925 | ioarcb->data_transfer_length = | |
4926 | cpu_to_le32(sizeof(struct pmcraid_timestamp_data)); | |
4927 | ioadl = &(ioarcb->add_data.u.ioadl[0]); | |
4928 | ioadl->flags = IOADL_FLAGS_LAST_DESC; | |
4929 | ioadl->address = cpu_to_le64(pinstance->timestamp_data_baddr); | |
4930 | ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_timestamp_data)); | |
4931 | ||
4932 | if (!pinstance->timestamp_error) { | |
4933 | pinstance->timestamp_error = 0; | |
4934 | pmcraid_send_cmd(cmd, pmcraid_set_supported_devs, | |
4935 | PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler); | |
4936 | } else { | |
4937 | pmcraid_send_cmd(cmd, pmcraid_return_cmd, | |
4938 | PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler); | |
4939 | return; | |
4940 | } | |
4941 | } | |
4942 | ||
4943 | ||
89a36810 AR |
4944 | /** |
4945 | * pmcraid_init_res_table - Initialize the resource table | |
4946 | * @cmd: pointer to pmcraid command struct | |
4947 | * | |
4948 | * This function looks through the existing resource table, comparing | |
4949 | * it with the config table. This function will take care of old/new | |
4950 | * devices and schedule adding/removing them from the mid-layer | |
4951 | * as appropriate. | |
4952 | * | |
4953 | * Return value | |
4954 | * None | |
4955 | */ | |
4956 | static void pmcraid_init_res_table(struct pmcraid_cmd *cmd) | |
4957 | { | |
4958 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
4959 | struct pmcraid_resource_entry *res, *temp; | |
4960 | struct pmcraid_config_table_entry *cfgte; | |
4961 | unsigned long lock_flags; | |
4962 | int found, rc, i; | |
c20c4267 | 4963 | u16 fw_version; |
89a36810 AR |
4964 | LIST_HEAD(old_res); |
4965 | ||
4966 | if (pinstance->cfg_table->flags & MICROCODE_UPDATE_REQUIRED) | |
34876402 | 4967 | pmcraid_err("IOA requires microcode download\n"); |
89a36810 | 4968 | |
c20c4267 AR |
4969 | fw_version = be16_to_cpu(pinstance->inq_data->fw_version); |
4970 | ||
89a36810 AR |
4971 | /* resource list is protected by pinstance->resource_lock. |
4972 | * init_res_table can be called from probe (user-thread) or runtime | |
4973 | * reset (timer/tasklet) | |
4974 | */ | |
4975 | spin_lock_irqsave(&pinstance->resource_lock, lock_flags); | |
4976 | ||
4977 | list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) | |
4978 | list_move_tail(&res->queue, &old_res); | |
4979 | ||
45c80be6 | 4980 | for (i = 0; i < le16_to_cpu(pinstance->cfg_table->num_entries); i++) { |
c20c4267 AR |
4981 | if (be16_to_cpu(pinstance->inq_data->fw_version) <= |
4982 | PMCRAID_FW_VERSION_1) | |
4983 | cfgte = &pinstance->cfg_table->entries[i]; | |
4984 | else | |
4985 | cfgte = (struct pmcraid_config_table_entry *) | |
4986 | &pinstance->cfg_table->entries_ext[i]; | |
89a36810 | 4987 | |
c20c4267 | 4988 | if (!pmcraid_expose_resource(fw_version, cfgte)) |
89a36810 AR |
4989 | continue; |
4990 | ||
4991 | found = 0; | |
4992 | ||
4993 | /* If this entry was already detected and initialized */ | |
4994 | list_for_each_entry_safe(res, temp, &old_res, queue) { | |
4995 | ||
4996 | rc = memcmp(&res->cfg_entry.resource_address, | |
4997 | &cfgte->resource_address, | |
4998 | sizeof(cfgte->resource_address)); | |
4999 | if (!rc) { | |
5000 | list_move_tail(&res->queue, | |
5001 | &pinstance->used_res_q); | |
5002 | found = 1; | |
5003 | break; | |
5004 | } | |
5005 | } | |
5006 | ||
5007 | /* If this is new entry, initialize it and add it the queue */ | |
5008 | if (!found) { | |
5009 | ||
5010 | if (list_empty(&pinstance->free_res_q)) { | |
34876402 | 5011 | pmcraid_err("Too many devices attached\n"); |
89a36810 AR |
5012 | break; |
5013 | } | |
5014 | ||
5015 | found = 1; | |
5016 | res = list_entry(pinstance->free_res_q.next, | |
5017 | struct pmcraid_resource_entry, queue); | |
5018 | ||
5019 | res->scsi_dev = NULL; | |
5020 | res->change_detected = RES_CHANGE_ADD; | |
5021 | res->reset_progress = 0; | |
5022 | list_move_tail(&res->queue, &pinstance->used_res_q); | |
5023 | } | |
5024 | ||
5025 | /* copy new configuration table entry details into driver | |
5026 | * maintained resource entry | |
5027 | */ | |
5028 | if (found) { | |
5029 | memcpy(&res->cfg_entry, cfgte, | |
c20c4267 | 5030 | pinstance->config_table_entry_size); |
89a36810 AR |
5031 | pmcraid_info("New res type:%x, vset:%x, addr:%x:\n", |
5032 | res->cfg_entry.resource_type, | |
c20c4267 AR |
5033 | (fw_version <= PMCRAID_FW_VERSION_1 ? |
5034 | res->cfg_entry.unique_flags1 : | |
45c80be6 | 5035 | le16_to_cpu(res->cfg_entry.array_id) & 0xFF), |
89a36810 AR |
5036 | le32_to_cpu(res->cfg_entry.resource_address)); |
5037 | } | |
5038 | } | |
5039 | ||
5040 | /* Detect any deleted entries, mark them for deletion from mid-layer */ | |
5041 | list_for_each_entry_safe(res, temp, &old_res, queue) { | |
5042 | ||
5043 | if (res->scsi_dev) { | |
5044 | res->change_detected = RES_CHANGE_DEL; | |
5045 | res->cfg_entry.resource_handle = | |
5046 | PMCRAID_INVALID_RES_HANDLE; | |
5047 | list_move_tail(&res->queue, &pinstance->used_res_q); | |
5048 | } else { | |
5049 | list_move_tail(&res->queue, &pinstance->free_res_q); | |
5050 | } | |
5051 | } | |
5052 | ||
5053 | /* release the resource list lock */ | |
5054 | spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags); | |
592488a3 | 5055 | pmcraid_set_timestamp(cmd); |
89a36810 AR |
5056 | } |
5057 | ||
5058 | /** | |
5059 | * pmcraid_querycfg - Send a Query IOA Config to the adapter. | |
5060 | * @cmd: pointer pmcraid_cmd struct | |
5061 | * | |
5062 | * This function sends a Query IOA Configuration command to the adapter to | |
5063 | * retrieve the IOA configuration table. | |
5064 | * | |
5065 | * Return value: | |
5066 | * none | |
5067 | */ | |
5068 | static void pmcraid_querycfg(struct pmcraid_cmd *cmd) | |
5069 | { | |
5070 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
b22ee87d | 5071 | struct pmcraid_ioadl_desc *ioadl; |
89a36810 | 5072 | struct pmcraid_instance *pinstance = cmd->drv_inst; |
45c80be6 | 5073 | __be32 cfg_table_size = cpu_to_be32(sizeof(struct pmcraid_config_table)); |
89a36810 | 5074 | |
c20c4267 AR |
5075 | if (be16_to_cpu(pinstance->inq_data->fw_version) <= |
5076 | PMCRAID_FW_VERSION_1) | |
5077 | pinstance->config_table_entry_size = | |
5078 | sizeof(struct pmcraid_config_table_entry); | |
5079 | else | |
5080 | pinstance->config_table_entry_size = | |
5081 | sizeof(struct pmcraid_config_table_entry_ext); | |
5082 | ||
89a36810 AR |
5083 | ioarcb->request_type = REQ_TYPE_IOACMD; |
5084 | ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
5085 | ||
5086 | ioarcb->cdb[0] = PMCRAID_QUERY_IOA_CONFIG; | |
5087 | ||
5088 | /* firmware requires 4-byte length field, specified in B.E format */ | |
5089 | memcpy(&(ioarcb->cdb[10]), &cfg_table_size, sizeof(cfg_table_size)); | |
5090 | ||
5091 | /* Since entire config table can be described by single IOADL, it can | |
5092 | * be part of IOARCB itself | |
5093 | */ | |
5094 | ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
5095 | offsetof(struct pmcraid_ioarcb, | |
5096 | add_data.u.ioadl[0])); | |
5097 | ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); | |
45c80be6 | 5098 | ioarcb->ioarcb_bus_addr &= cpu_to_le64(~0x1FULL); |
89a36810 AR |
5099 | |
5100 | ioarcb->request_flags0 |= NO_LINK_DESCS; | |
5101 | ioarcb->data_transfer_length = | |
5102 | cpu_to_le32(sizeof(struct pmcraid_config_table)); | |
5103 | ||
5104 | ioadl = &(ioarcb->add_data.u.ioadl[0]); | |
88197966 | 5105 | ioadl->flags = IOADL_FLAGS_LAST_DESC; |
89a36810 AR |
5106 | ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr); |
5107 | ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table)); | |
5108 | ||
5109 | pmcraid_send_cmd(cmd, pmcraid_init_res_table, | |
5110 | PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler); | |
5111 | } | |
5112 | ||
5113 | ||
5114 | /** | |
c20c4267 | 5115 | * pmcraid_probe - PCI probe entry pointer for PMC MaxRAID controller driver |
89a36810 AR |
5116 | * @pdev: pointer to pci device structure |
5117 | * @dev_id: pointer to device ids structure | |
5118 | * | |
5119 | * Return Value | |
5120 | * returns 0 if the device is claimed and successfully configured. | |
5121 | * returns non-zero error code in case of any failure | |
5122 | */ | |
6f039790 GKH |
5123 | static int pmcraid_probe(struct pci_dev *pdev, |
5124 | const struct pci_device_id *dev_id) | |
89a36810 AR |
5125 | { |
5126 | struct pmcraid_instance *pinstance; | |
5127 | struct Scsi_Host *host; | |
5128 | void __iomem *mapped_pci_addr; | |
5129 | int rc = PCIBIOS_SUCCESSFUL; | |
5130 | ||
5131 | if (atomic_read(&pmcraid_adapter_count) >= PMCRAID_MAX_ADAPTERS) { | |
5132 | pmcraid_err | |
5133 | ("maximum number(%d) of supported adapters reached\n", | |
5134 | atomic_read(&pmcraid_adapter_count)); | |
5135 | return -ENOMEM; | |
5136 | } | |
5137 | ||
5138 | atomic_inc(&pmcraid_adapter_count); | |
5139 | rc = pci_enable_device(pdev); | |
5140 | ||
5141 | if (rc) { | |
5142 | dev_err(&pdev->dev, "Cannot enable adapter\n"); | |
5143 | atomic_dec(&pmcraid_adapter_count); | |
5144 | return rc; | |
5145 | } | |
5146 | ||
5147 | dev_info(&pdev->dev, | |
5148 | "Found new IOA(%x:%x), Total IOA count: %d\n", | |
5149 | pdev->vendor, pdev->device, | |
5150 | atomic_read(&pmcraid_adapter_count)); | |
5151 | ||
5152 | rc = pci_request_regions(pdev, PMCRAID_DRIVER_NAME); | |
5153 | ||
5154 | if (rc < 0) { | |
5155 | dev_err(&pdev->dev, | |
5156 | "Couldn't register memory range of registers\n"); | |
5157 | goto out_disable_device; | |
5158 | } | |
5159 | ||
5160 | mapped_pci_addr = pci_iomap(pdev, 0, 0); | |
5161 | ||
5162 | if (!mapped_pci_addr) { | |
5163 | dev_err(&pdev->dev, "Couldn't map PCI registers memory\n"); | |
5164 | rc = -ENOMEM; | |
5165 | goto out_release_regions; | |
5166 | } | |
5167 | ||
5168 | pci_set_master(pdev); | |
5169 | ||
5170 | /* Firmware requires the system bus address of IOARCB to be within | |
5171 | * 32-bit addressable range though it has 64-bit IOARRIN register. | |
5172 | * However, firmware supports 64-bit streaming DMA buffers, whereas | |
371a6c32 | 5173 | * coherent buffers are to be 32-bit. Since dma_alloc_coherent always |
89a36810 | 5174 | * returns memory within 4GB (if not, change this logic), coherent |
25985edc | 5175 | * buffers are within firmware acceptable address ranges. |
89a36810 | 5176 | */ |
371a6c32 CH |
5177 | if (sizeof(dma_addr_t) == 4 || |
5178 | dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) | |
5179 | rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); | |
89a36810 AR |
5180 | |
5181 | /* firmware expects 32-bit DMA addresses for IOARRIN register; set 32 | |
371a6c32 | 5182 | * bit mask for dma_alloc_coherent to return addresses within 4GB |
89a36810 AR |
5183 | */ |
5184 | if (rc == 0) | |
371a6c32 | 5185 | rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); |
89a36810 AR |
5186 | |
5187 | if (rc != 0) { | |
5188 | dev_err(&pdev->dev, "Failed to set PCI DMA mask\n"); | |
5189 | goto cleanup_nomem; | |
5190 | } | |
5191 | ||
5192 | host = scsi_host_alloc(&pmcraid_host_template, | |
5193 | sizeof(struct pmcraid_instance)); | |
5194 | ||
5195 | if (!host) { | |
5196 | dev_err(&pdev->dev, "scsi_host_alloc failed!\n"); | |
5197 | rc = -ENOMEM; | |
5198 | goto cleanup_nomem; | |
5199 | } | |
5200 | ||
5201 | host->max_id = PMCRAID_MAX_NUM_TARGETS_PER_BUS; | |
5202 | host->max_lun = PMCRAID_MAX_NUM_LUNS_PER_TARGET; | |
5203 | host->unique_id = host->host_no; | |
5204 | host->max_channel = PMCRAID_MAX_BUS_TO_SCAN; | |
5205 | host->max_cmd_len = PMCRAID_MAX_CDB_LEN; | |
5206 | ||
5207 | /* zero out entire instance structure */ | |
5208 | pinstance = (struct pmcraid_instance *)host->hostdata; | |
5209 | memset(pinstance, 0, sizeof(*pinstance)); | |
5210 | ||
5211 | pinstance->chip_cfg = | |
5212 | (struct pmcraid_chip_details *)(dev_id->driver_data); | |
5213 | ||
5214 | rc = pmcraid_init_instance(pdev, host, mapped_pci_addr); | |
5215 | ||
5216 | if (rc < 0) { | |
5217 | dev_err(&pdev->dev, "failed to initialize adapter instance\n"); | |
5218 | goto out_scsi_host_put; | |
5219 | } | |
5220 | ||
5221 | pci_set_drvdata(pdev, pinstance); | |
5222 | ||
5223 | /* Save PCI config-space for use following the reset */ | |
5224 | rc = pci_save_state(pinstance->pdev); | |
5225 | ||
5226 | if (rc != 0) { | |
5227 | dev_err(&pdev->dev, "Failed to save PCI config space\n"); | |
5228 | goto out_scsi_host_put; | |
5229 | } | |
5230 | ||
5231 | pmcraid_disable_interrupts(pinstance, ~0); | |
5232 | ||
5233 | rc = pmcraid_register_interrupt_handler(pinstance); | |
5234 | ||
5235 | if (rc) { | |
34876402 | 5236 | dev_err(&pdev->dev, "couldn't register interrupt handler\n"); |
89a36810 AR |
5237 | goto out_scsi_host_put; |
5238 | } | |
5239 | ||
5240 | pmcraid_init_tasklets(pinstance); | |
5241 | ||
5242 | /* allocate verious buffers used by LLD.*/ | |
5243 | rc = pmcraid_init_buffers(pinstance); | |
5244 | ||
5245 | if (rc) { | |
5246 | pmcraid_err("couldn't allocate memory blocks\n"); | |
5247 | goto out_unregister_isr; | |
5248 | } | |
5249 | ||
5250 | /* check the reset type required */ | |
5251 | pmcraid_reset_type(pinstance); | |
5252 | ||
5253 | pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS); | |
5254 | ||
5255 | /* Start IOA firmware initialization and bring card to Operational | |
5256 | * state. | |
5257 | */ | |
5258 | pmcraid_info("starting IOA initialization sequence\n"); | |
5259 | if (pmcraid_reset_bringup(pinstance)) { | |
c20c4267 | 5260 | dev_err(&pdev->dev, "couldn't initialize IOA\n"); |
89a36810 AR |
5261 | rc = 1; |
5262 | goto out_release_bufs; | |
5263 | } | |
5264 | ||
5265 | /* Add adapter instance into mid-layer list */ | |
5266 | rc = scsi_add_host(pinstance->host, &pdev->dev); | |
5267 | if (rc != 0) { | |
5268 | pmcraid_err("couldn't add host into mid-layer: %d\n", rc); | |
5269 | goto out_release_bufs; | |
5270 | } | |
5271 | ||
5272 | scsi_scan_host(pinstance->host); | |
5273 | ||
5274 | rc = pmcraid_setup_chrdev(pinstance); | |
5275 | ||
5276 | if (rc != 0) { | |
5277 | pmcraid_err("couldn't create mgmt interface, error: %x\n", | |
5278 | rc); | |
5279 | goto out_remove_host; | |
5280 | } | |
5281 | ||
5282 | /* Schedule worker thread to handle CCN and take care of adding and | |
5283 | * removing devices to OS | |
5284 | */ | |
5285 | atomic_set(&pinstance->expose_resources, 1); | |
5286 | schedule_work(&pinstance->worker_q); | |
5287 | return rc; | |
5288 | ||
5289 | out_remove_host: | |
5290 | scsi_remove_host(host); | |
5291 | ||
5292 | out_release_bufs: | |
5293 | pmcraid_release_buffers(pinstance); | |
5294 | ||
5295 | out_unregister_isr: | |
5296 | pmcraid_kill_tasklets(pinstance); | |
5297 | pmcraid_unregister_interrupt_handler(pinstance); | |
5298 | ||
5299 | out_scsi_host_put: | |
5300 | scsi_host_put(host); | |
5301 | ||
5302 | cleanup_nomem: | |
5303 | iounmap(mapped_pci_addr); | |
5304 | ||
5305 | out_release_regions: | |
5306 | pci_release_regions(pdev); | |
5307 | ||
5308 | out_disable_device: | |
5309 | atomic_dec(&pmcraid_adapter_count); | |
89a36810 AR |
5310 | pci_disable_device(pdev); |
5311 | return -ENODEV; | |
5312 | } | |
5313 | ||
ac85cca3 VG |
5314 | static SIMPLE_DEV_PM_OPS(pmcraid_pm_ops, pmcraid_suspend, pmcraid_resume); |
5315 | ||
89a36810 | 5316 | /* |
18daf910 | 5317 | * PCI driver structure of pmcraid driver |
89a36810 AR |
5318 | */ |
5319 | static struct pci_driver pmcraid_driver = { | |
5320 | .name = PMCRAID_DRIVER_NAME, | |
5321 | .id_table = pmcraid_pci_table, | |
5322 | .probe = pmcraid_probe, | |
5323 | .remove = pmcraid_remove, | |
ac85cca3 | 5324 | .driver.pm = &pmcraid_pm_ops, |
89a36810 AR |
5325 | .shutdown = pmcraid_shutdown |
5326 | }; | |
5327 | ||
89a36810 AR |
5328 | /** |
5329 | * pmcraid_init - module load entry point | |
5330 | */ | |
5331 | static int __init pmcraid_init(void) | |
5332 | { | |
5333 | dev_t dev; | |
5334 | int error; | |
5335 | ||
a1b66665 MM |
5336 | pmcraid_info("%s Device Driver version: %s\n", |
5337 | PMCRAID_DRIVER_NAME, PMCRAID_DRIVER_VERSION); | |
89a36810 AR |
5338 | |
5339 | error = alloc_chrdev_region(&dev, 0, | |
5340 | PMCRAID_MAX_ADAPTERS, | |
5341 | PMCRAID_DEVFILE); | |
5342 | ||
5343 | if (error) { | |
5344 | pmcraid_err("failed to get a major number for adapters\n"); | |
5345 | goto out_init; | |
5346 | } | |
5347 | ||
5348 | pmcraid_major = MAJOR(dev); | |
5349 | pmcraid_class = class_create(THIS_MODULE, PMCRAID_DEVFILE); | |
5350 | ||
5351 | if (IS_ERR(pmcraid_class)) { | |
5352 | error = PTR_ERR(pmcraid_class); | |
278cee05 | 5353 | pmcraid_err("failed to register with sysfs, error = %x\n", |
89a36810 AR |
5354 | error); |
5355 | goto out_unreg_chrdev; | |
5356 | } | |
5357 | ||
89a36810 AR |
5358 | error = pmcraid_netlink_init(); |
5359 | ||
2d76a247 QL |
5360 | if (error) { |
5361 | class_destroy(pmcraid_class); | |
89a36810 | 5362 | goto out_unreg_chrdev; |
2d76a247 | 5363 | } |
89a36810 AR |
5364 | |
5365 | error = pci_register_driver(&pmcraid_driver); | |
5366 | ||
5367 | if (error == 0) | |
5368 | goto out_init; | |
5369 | ||
5370 | pmcraid_err("failed to register pmcraid driver, error = %x\n", | |
5371 | error); | |
5372 | class_destroy(pmcraid_class); | |
5373 | pmcraid_netlink_release(); | |
5374 | ||
5375 | out_unreg_chrdev: | |
5376 | unregister_chrdev_region(MKDEV(pmcraid_major, 0), PMCRAID_MAX_ADAPTERS); | |
34876402 | 5377 | |
89a36810 AR |
5378 | out_init: |
5379 | return error; | |
5380 | } | |
5381 | ||
5382 | /** | |
5383 | * pmcraid_exit - module unload entry point | |
5384 | */ | |
5385 | static void __exit pmcraid_exit(void) | |
5386 | { | |
5387 | pmcraid_netlink_release(); | |
89a36810 AR |
5388 | unregister_chrdev_region(MKDEV(pmcraid_major, 0), |
5389 | PMCRAID_MAX_ADAPTERS); | |
5390 | pci_unregister_driver(&pmcraid_driver); | |
592488a3 | 5391 | class_destroy(pmcraid_class); |
89a36810 AR |
5392 | } |
5393 | ||
5394 | module_init(pmcraid_init); | |
5395 | module_exit(pmcraid_exit); |