net/mlx4_core: drop useless LIST_HEAD
[linux-2.6-block.git] / drivers / scsi / pmcraid.c
CommitLineData
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1/*
2 * pmcraid.c -- driver for PMC Sierra MaxRAID controller adapters
3 *
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4 * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com>
5 * PMC-Sierra Inc
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6 *
7 * Copyright (C) 2008, 2009 PMC Sierra Inc
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307,
22 * USA
23 *
24 */
25#include <linux/fs.h>
26#include <linux/init.h>
27#include <linux/types.h>
28#include <linux/errno.h>
29#include <linux/kernel.h>
30#include <linux/ioport.h>
31#include <linux/delay.h>
32#include <linux/pci.h>
33#include <linux/wait.h>
34#include <linux/spinlock.h>
35#include <linux/sched.h>
36#include <linux/interrupt.h>
37#include <linux/blkdev.h>
38#include <linux/firmware.h>
39#include <linux/module.h>
40#include <linux/moduleparam.h>
41#include <linux/hdreg.h>
89a36810 42#include <linux/io.h>
5a0e3ad6 43#include <linux/slab.h>
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44#include <asm/irq.h>
45#include <asm/processor.h>
46#include <linux/libata.h>
47#include <linux/mutex.h>
9c9bd593 48#include <linux/ktime.h>
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49#include <scsi/scsi.h>
50#include <scsi/scsi_host.h>
34876402 51#include <scsi/scsi_device.h>
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52#include <scsi/scsi_tcq.h>
53#include <scsi/scsi_eh.h>
54#include <scsi/scsi_cmnd.h>
55#include <scsi/scsicam.h>
56
57#include "pmcraid.h"
58
59/*
60 * Module configuration parameters
61 */
62static unsigned int pmcraid_debug_log;
63static unsigned int pmcraid_disable_aen;
64static unsigned int pmcraid_log_level = IOASC_LOG_LEVEL_MUST;
5da61410 65static unsigned int pmcraid_enable_msix;
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66
67/*
68 * Data structures to support multiple adapters by the LLD.
69 * pmcraid_adapter_count - count of configured adapters
70 */
71static atomic_t pmcraid_adapter_count = ATOMIC_INIT(0);
72
73/*
74 * Supporting user-level control interface through IOCTL commands.
75 * pmcraid_major - major number to use
76 * pmcraid_minor - minor number(s) to use
77 */
78static unsigned int pmcraid_major;
79static struct class *pmcraid_class;
144b139c 80static DECLARE_BITMAP(pmcraid_minor, PMCRAID_MAX_ADAPTERS);
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81
82/*
83 * Module parameters
84 */
729c8456 85MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>");
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86MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver");
87MODULE_LICENSE("GPL");
88MODULE_VERSION(PMCRAID_DRIVER_VERSION);
89
90module_param_named(log_level, pmcraid_log_level, uint, (S_IRUGO | S_IWUSR));
91MODULE_PARM_DESC(log_level,
92 "Enables firmware error code logging, default :1 high-severity"
93 " errors, 2: all errors including high-severity errors,"
94 " 0: disables logging");
95
96module_param_named(debug, pmcraid_debug_log, uint, (S_IRUGO | S_IWUSR));
97MODULE_PARM_DESC(debug,
98 "Enable driver verbose message logging. Set 1 to enable."
99 "(default: 0)");
100
101module_param_named(disable_aen, pmcraid_disable_aen, uint, (S_IRUGO | S_IWUSR));
102MODULE_PARM_DESC(disable_aen,
103 "Disable driver aen notifications to apps. Set 1 to disable."
104 "(default: 0)");
105
106/* chip specific constants for PMC MaxRAID controllers (same for
107 * 0x5220 and 0x8010
108 */
109static struct pmcraid_chip_details pmcraid_chip_cfg[] = {
110 {
111 .ioastatus = 0x0,
112 .ioarrin = 0x00040,
113 .mailbox = 0x7FC30,
114 .global_intr_mask = 0x00034,
115 .ioa_host_intr = 0x0009C,
116 .ioa_host_intr_clr = 0x000A0,
c20c4267 117 .ioa_host_msix_intr = 0x7FC40,
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118 .ioa_host_mask = 0x7FC28,
119 .ioa_host_mask_clr = 0x7FC28,
120 .host_ioa_intr = 0x00020,
121 .host_ioa_intr_clr = 0x00020,
122 .transop_timeout = 300
123 }
124};
125
126/*
127 * PCI device ids supported by pmcraid driver
128 */
6f039790 129static struct pci_device_id pmcraid_pci_table[] = {
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130 { PCI_DEVICE(PCI_VENDOR_ID_PMC, PCI_DEVICE_ID_PMC_MAXRAID),
131 0, 0, (kernel_ulong_t)&pmcraid_chip_cfg[0]
132 },
133 {}
134};
135
136MODULE_DEVICE_TABLE(pci, pmcraid_pci_table);
137
138
139
140/**
141 * pmcraid_slave_alloc - Prepare for commands to a device
142 * @scsi_dev: scsi device struct
143 *
144 * This function is called by mid-layer prior to sending any command to the new
145 * device. Stores resource entry details of the device in scsi_device struct.
146 * Queuecommand uses the resource handle and other details to fill up IOARCB
147 * while sending commands to the device.
148 *
149 * Return value:
150 * 0 on success / -ENXIO if device does not exist
151 */
152static int pmcraid_slave_alloc(struct scsi_device *scsi_dev)
153{
154 struct pmcraid_resource_entry *temp, *res = NULL;
155 struct pmcraid_instance *pinstance;
156 u8 target, bus, lun;
157 unsigned long lock_flags;
158 int rc = -ENXIO;
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159 u16 fw_version;
160
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161 pinstance = shost_priv(scsi_dev->host);
162
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163 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
164
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165 /* Driver exposes VSET and GSCSI resources only; all other device types
166 * are not exposed. Resource list is synchronized using resource lock
167 * so any traversal or modifications to the list should be done inside
168 * this lock
169 */
170 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
171 list_for_each_entry(temp, &pinstance->used_res_q, queue) {
172
729c8456 173 /* do not expose VSETs with order-ids > MAX_VSET_TARGETS */
89a36810 174 if (RES_IS_VSET(temp->cfg_entry)) {
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175 if (fw_version <= PMCRAID_FW_VERSION_1)
176 target = temp->cfg_entry.unique_flags1;
177 else
45c80be6 178 target = le16_to_cpu(temp->cfg_entry.array_id) & 0xFF;
c20c4267 179
729c8456 180 if (target > PMCRAID_MAX_VSET_TARGETS)
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181 continue;
182 bus = PMCRAID_VSET_BUS_ID;
183 lun = 0;
184 } else if (RES_IS_GSCSI(temp->cfg_entry)) {
185 target = RES_TARGET(temp->cfg_entry.resource_address);
186 bus = PMCRAID_PHYS_BUS_ID;
187 lun = RES_LUN(temp->cfg_entry.resource_address);
188 } else {
189 continue;
190 }
191
192 if (bus == scsi_dev->channel &&
193 target == scsi_dev->id &&
194 lun == scsi_dev->lun) {
195 res = temp;
196 break;
197 }
198 }
199
200 if (res) {
201 res->scsi_dev = scsi_dev;
202 scsi_dev->hostdata = res;
203 res->change_detected = 0;
204 atomic_set(&res->read_failures, 0);
205 atomic_set(&res->write_failures, 0);
206 rc = 0;
207 }
208 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
209 return rc;
210}
211
212/**
213 * pmcraid_slave_configure - Configures a SCSI device
214 * @scsi_dev: scsi device struct
215 *
25985edc 216 * This function is executed by SCSI mid layer just after a device is first
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217 * scanned (i.e. it has responded to an INQUIRY). For VSET resources, the
218 * timeout value (default 30s) will be over-written to a higher value (60s)
219 * and max_sectors value will be over-written to 512. It also sets queue depth
220 * to host->cmd_per_lun value
221 *
222 * Return value:
223 * 0 on success
224 */
225static int pmcraid_slave_configure(struct scsi_device *scsi_dev)
226{
227 struct pmcraid_resource_entry *res = scsi_dev->hostdata;
228
229 if (!res)
230 return 0;
231
232 /* LLD exposes VSETs and Enclosure devices only */
233 if (RES_IS_GSCSI(res->cfg_entry) &&
234 scsi_dev->type != TYPE_ENCLOSURE)
235 return -ENXIO;
236
237 pmcraid_info("configuring %x:%x:%x:%x\n",
238 scsi_dev->host->unique_id,
239 scsi_dev->channel,
240 scsi_dev->id,
9cb78c16 241 (u8)scsi_dev->lun);
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242
243 if (RES_IS_GSCSI(res->cfg_entry)) {
244 scsi_dev->allow_restart = 1;
245 } else if (RES_IS_VSET(res->cfg_entry)) {
246 scsi_dev->allow_restart = 1;
247 blk_queue_rq_timeout(scsi_dev->request_queue,
248 PMCRAID_VSET_IO_TIMEOUT);
086fa5ff 249 blk_queue_max_hw_sectors(scsi_dev->request_queue,
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250 PMCRAID_VSET_MAX_SECTORS);
251 }
252
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253 /*
254 * We never want to report TCQ support for these types of devices.
255 */
256 if (!RES_IS_GSCSI(res->cfg_entry) && !RES_IS_VSET(res->cfg_entry))
257 scsi_dev->tagged_supported = 0;
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258
259 return 0;
260}
261
262/**
263 * pmcraid_slave_destroy - Unconfigure a SCSI device before removing it
264 *
265 * @scsi_dev: scsi device struct
266 *
267 * This is called by mid-layer before removing a device. Pointer assignments
268 * done in pmcraid_slave_alloc will be reset to NULL here.
269 *
270 * Return value
271 * none
272 */
273static void pmcraid_slave_destroy(struct scsi_device *scsi_dev)
274{
275 struct pmcraid_resource_entry *res;
276
277 res = (struct pmcraid_resource_entry *)scsi_dev->hostdata;
278
279 if (res)
280 res->scsi_dev = NULL;
281
282 scsi_dev->hostdata = NULL;
283}
284
285/**
286 * pmcraid_change_queue_depth - Change the device's queue depth
287 * @scsi_dev: scsi device struct
288 * @depth: depth to set
289 *
290 * Return value
c20c4267 291 * actual depth set
89a36810 292 */
db5ed4df 293static int pmcraid_change_queue_depth(struct scsi_device *scsi_dev, int depth)
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294{
295 if (depth > PMCRAID_MAX_CMD_PER_LUN)
296 depth = PMCRAID_MAX_CMD_PER_LUN;
db5ed4df 297 return scsi_change_queue_depth(scsi_dev, depth);
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298}
299
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300/**
301 * pmcraid_init_cmdblk - initializes a command block
302 *
303 * @cmd: pointer to struct pmcraid_cmd to be initialized
304 * @index: if >=0 first time initialization; otherwise reinitialization
305 *
306 * Return Value
307 * None
308 */
61b96d5b 309static void pmcraid_init_cmdblk(struct pmcraid_cmd *cmd, int index)
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310{
311 struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
312 dma_addr_t dma_addr = cmd->ioa_cb_bus_addr;
313
314 if (index >= 0) {
315 /* first time initialization (called from probe) */
316 u32 ioasa_offset =
317 offsetof(struct pmcraid_control_block, ioasa);
318
319 cmd->index = index;
320 ioarcb->response_handle = cpu_to_le32(index << 2);
321 ioarcb->ioarcb_bus_addr = cpu_to_le64(dma_addr);
322 ioarcb->ioasa_bus_addr = cpu_to_le64(dma_addr + ioasa_offset);
323 ioarcb->ioasa_len = cpu_to_le16(sizeof(struct pmcraid_ioasa));
324 } else {
325 /* re-initialization of various lengths, called once command is
326 * processed by IOA
327 */
328 memset(&cmd->ioa_cb->ioarcb.cdb, 0, PMCRAID_MAX_CDB_LEN);
c20c4267 329 ioarcb->hrrq_id = 0;
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330 ioarcb->request_flags0 = 0;
331 ioarcb->request_flags1 = 0;
332 ioarcb->cmd_timeout = 0;
45c80be6 333 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~0x1FULL);
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334 ioarcb->ioadl_bus_addr = 0;
335 ioarcb->ioadl_length = 0;
336 ioarcb->data_transfer_length = 0;
337 ioarcb->add_cmd_param_length = 0;
338 ioarcb->add_cmd_param_offset = 0;
339 cmd->ioa_cb->ioasa.ioasc = 0;
340 cmd->ioa_cb->ioasa.residual_data_length = 0;
c20c4267 341 cmd->time_left = 0;
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342 }
343
344 cmd->cmd_done = NULL;
345 cmd->scsi_cmd = NULL;
346 cmd->release = 0;
347 cmd->completion_req = 0;
144b139c 348 cmd->sense_buffer = NULL;
c20c4267 349 cmd->sense_buffer_dma = 0;
89a36810 350 cmd->dma_handle = 0;
242b5657 351 timer_setup(&cmd->timer, NULL, 0);
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352}
353
354/**
355 * pmcraid_reinit_cmdblk - reinitialize a command block
356 *
357 * @cmd: pointer to struct pmcraid_cmd to be reinitialized
358 *
359 * Return Value
360 * None
361 */
362static void pmcraid_reinit_cmdblk(struct pmcraid_cmd *cmd)
363{
364 pmcraid_init_cmdblk(cmd, -1);
365}
366
367/**
368 * pmcraid_get_free_cmd - get a free cmd block from command block pool
369 * @pinstance: adapter instance structure
370 *
371 * Return Value:
372 * returns pointer to cmd block or NULL if no blocks are available
373 */
374static struct pmcraid_cmd *pmcraid_get_free_cmd(
375 struct pmcraid_instance *pinstance
376)
377{
378 struct pmcraid_cmd *cmd = NULL;
379 unsigned long lock_flags;
380
381 /* free cmd block list is protected by free_pool_lock */
382 spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
383
384 if (!list_empty(&pinstance->free_cmd_pool)) {
385 cmd = list_entry(pinstance->free_cmd_pool.next,
386 struct pmcraid_cmd, free_list);
387 list_del(&cmd->free_list);
388 }
389 spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
390
391 /* Initialize the command block before giving it the caller */
392 if (cmd != NULL)
393 pmcraid_reinit_cmdblk(cmd);
394 return cmd;
395}
396
397/**
398 * pmcraid_return_cmd - return a completed command block back into free pool
399 * @cmd: pointer to the command block
400 *
401 * Return Value:
402 * nothing
403 */
61b96d5b 404static void pmcraid_return_cmd(struct pmcraid_cmd *cmd)
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405{
406 struct pmcraid_instance *pinstance = cmd->drv_inst;
407 unsigned long lock_flags;
408
409 spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
410 list_add_tail(&cmd->free_list, &pinstance->free_cmd_pool);
411 spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
412}
413
414/**
415 * pmcraid_read_interrupts - reads IOA interrupts
416 *
417 * @pinstance: pointer to adapter instance structure
418 *
419 * Return value
420 * interrupts read from IOA
421 */
422static u32 pmcraid_read_interrupts(struct pmcraid_instance *pinstance)
423{
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424 return (pinstance->interrupt_mode) ?
425 ioread32(pinstance->int_regs.ioa_host_msix_interrupt_reg) :
426 ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
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427}
428
429/**
430 * pmcraid_disable_interrupts - Masks and clears all specified interrupts
431 *
432 * @pinstance: pointer to per adapter instance structure
433 * @intrs: interrupts to disable
434 *
435 * Return Value
436 * None
437 */
438static void pmcraid_disable_interrupts(
439 struct pmcraid_instance *pinstance,
440 u32 intrs
441)
442{
443 u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
444 u32 nmask = gmask | GLOBAL_INTERRUPT_MASK;
445
89a36810 446 iowrite32(intrs, pinstance->int_regs.ioa_host_interrupt_clr_reg);
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447 iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
448 ioread32(pinstance->int_regs.global_interrupt_mask_reg);
449
450 if (!pinstance->interrupt_mode) {
451 iowrite32(intrs,
452 pinstance->int_regs.ioa_host_interrupt_mask_reg);
453 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
454 }
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455}
456
457/**
458 * pmcraid_enable_interrupts - Enables specified interrupts
459 *
460 * @pinstance: pointer to per adapter instance structure
461 * @intr: interrupts to enable
462 *
463 * Return Value
464 * None
465 */
466static void pmcraid_enable_interrupts(
467 struct pmcraid_instance *pinstance,
468 u32 intrs
469)
470{
471 u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
472 u32 nmask = gmask & (~GLOBAL_INTERRUPT_MASK);
473
474 iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
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475
476 if (!pinstance->interrupt_mode) {
477 iowrite32(~intrs,
478 pinstance->int_regs.ioa_host_interrupt_mask_reg);
479 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
480 }
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481
482 pmcraid_info("enabled interrupts global mask = %x intr_mask = %x\n",
483 ioread32(pinstance->int_regs.global_interrupt_mask_reg),
484 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg));
485}
486
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487/**
488 * pmcraid_clr_trans_op - clear trans to op interrupt
489 *
490 * @pinstance: pointer to per adapter instance structure
491 *
492 * Return Value
493 * None
494 */
495static void pmcraid_clr_trans_op(
496 struct pmcraid_instance *pinstance
497)
498{
499 unsigned long lock_flags;
500
501 if (!pinstance->interrupt_mode) {
502 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
503 pinstance->int_regs.ioa_host_interrupt_mask_reg);
504 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
505 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
506 pinstance->int_regs.ioa_host_interrupt_clr_reg);
507 ioread32(pinstance->int_regs.ioa_host_interrupt_clr_reg);
508 }
509
510 if (pinstance->reset_cmd != NULL) {
511 del_timer(&pinstance->reset_cmd->timer);
512 spin_lock_irqsave(
513 pinstance->host->host_lock, lock_flags);
514 pinstance->reset_cmd->cmd_done(pinstance->reset_cmd);
515 spin_unlock_irqrestore(
516 pinstance->host->host_lock, lock_flags);
517 }
518}
519
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520/**
521 * pmcraid_reset_type - Determine the required reset type
522 * @pinstance: pointer to adapter instance structure
523 *
524 * IOA requires hard reset if any of the following conditions is true.
525 * 1. If HRRQ valid interrupt is not masked
526 * 2. IOA reset alert doorbell is set
527 * 3. If there are any error interrupts
528 */
529static void pmcraid_reset_type(struct pmcraid_instance *pinstance)
530{
531 u32 mask;
532 u32 intrs;
533 u32 alerts;
534
535 mask = ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
536 intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
537 alerts = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
538
539 if ((mask & INTRS_HRRQ_VALID) == 0 ||
540 (alerts & DOORBELL_IOA_RESET_ALERT) ||
541 (intrs & PMCRAID_ERROR_INTERRUPTS)) {
542 pmcraid_info("IOA requires hard reset\n");
543 pinstance->ioa_hard_reset = 1;
544 }
545
546 /* If unit check is active, trigger the dump */
547 if (intrs & INTRS_IOA_UNIT_CHECK)
548 pinstance->ioa_unit_check = 1;
549}
550
551/**
552 * pmcraid_bist_done - completion function for PCI BIST
553 * @cmd: pointer to reset command
554 * Return Value
c20c4267 555 * none
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556 */
557
558static void pmcraid_ioa_reset(struct pmcraid_cmd *);
559
242b5657 560static void pmcraid_bist_done(struct timer_list *t)
89a36810 561{
242b5657 562 struct pmcraid_cmd *cmd = from_timer(cmd, t, timer);
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563 struct pmcraid_instance *pinstance = cmd->drv_inst;
564 unsigned long lock_flags;
565 int rc;
566 u16 pci_reg;
567
568 rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
569
570 /* If PCI config space can't be accessed wait for another two secs */
571 if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
c20c4267 572 cmd->time_left > 0) {
89a36810 573 pmcraid_info("BIST not complete, waiting another 2 secs\n");
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574 cmd->timer.expires = jiffies + cmd->time_left;
575 cmd->time_left = 0;
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576 add_timer(&cmd->timer);
577 } else {
c20c4267 578 cmd->time_left = 0;
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579 pmcraid_info("BIST is complete, proceeding with reset\n");
580 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
581 pmcraid_ioa_reset(cmd);
582 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
583 }
584}
585
586/**
587 * pmcraid_start_bist - starts BIST
588 * @cmd: pointer to reset cmd
589 * Return Value
590 * none
591 */
592static void pmcraid_start_bist(struct pmcraid_cmd *cmd)
593{
594 struct pmcraid_instance *pinstance = cmd->drv_inst;
595 u32 doorbells, intrs;
596
597 /* proceed with bist and wait for 2 seconds */
598 iowrite32(DOORBELL_IOA_START_BIST,
599 pinstance->int_regs.host_ioa_interrupt_reg);
600 doorbells = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
601 intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
c20c4267 602 pmcraid_info("doorbells after start bist: %x intrs: %x\n",
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603 doorbells, intrs);
604
c20c4267 605 cmd->time_left = msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
89a36810 606 cmd->timer.expires = jiffies + msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
841b86f3 607 cmd->timer.function = pmcraid_bist_done;
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608 add_timer(&cmd->timer);
609}
610
611/**
612 * pmcraid_reset_alert_done - completion routine for reset_alert
613 * @cmd: pointer to command block used in reset sequence
614 * Return value
615 * None
616 */
242b5657 617static void pmcraid_reset_alert_done(struct timer_list *t)
89a36810 618{
242b5657 619 struct pmcraid_cmd *cmd = from_timer(cmd, t, timer);
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620 struct pmcraid_instance *pinstance = cmd->drv_inst;
621 u32 status = ioread32(pinstance->ioa_status);
622 unsigned long lock_flags;
623
624 /* if the critical operation in progress bit is set or the wait times
625 * out, invoke reset engine to proceed with hard reset. If there is
626 * some more time to wait, restart the timer
627 */
628 if (((status & INTRS_CRITICAL_OP_IN_PROGRESS) == 0) ||
c20c4267 629 cmd->time_left <= 0) {
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630 pmcraid_info("critical op is reset proceeding with reset\n");
631 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
632 pmcraid_ioa_reset(cmd);
633 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
634 } else {
635 pmcraid_info("critical op is not yet reset waiting again\n");
636 /* restart timer if some more time is available to wait */
c20c4267 637 cmd->time_left -= PMCRAID_CHECK_FOR_RESET_TIMEOUT;
89a36810 638 cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
841b86f3 639 cmd->timer.function = pmcraid_reset_alert_done;
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640 add_timer(&cmd->timer);
641 }
642}
643
644/**
645 * pmcraid_reset_alert - alerts IOA for a possible reset
646 * @cmd : command block to be used for reset sequence.
647 *
648 * Return Value
649 * returns 0 if pci config-space is accessible and RESET_DOORBELL is
650 * successfully written to IOA. Returns non-zero in case pci_config_space
651 * is not accessible
652 */
c20c4267 653static void pmcraid_notify_ioastate(struct pmcraid_instance *, u32);
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654static void pmcraid_reset_alert(struct pmcraid_cmd *cmd)
655{
656 struct pmcraid_instance *pinstance = cmd->drv_inst;
657 u32 doorbells;
658 int rc;
659 u16 pci_reg;
660
661 /* If we are able to access IOA PCI config space, alert IOA that we are
662 * going to reset it soon. This enables IOA to preserv persistent error
663 * data if any. In case memory space is not accessible, proceed with
664 * BIST or slot_reset
665 */
666 rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
667 if ((rc == PCIBIOS_SUCCESSFUL) && (pci_reg & PCI_COMMAND_MEMORY)) {
668
669 /* wait for IOA permission i.e until CRITICAL_OPERATION bit is
670 * reset IOA doesn't generate any interrupts when CRITICAL
671 * OPERATION bit is reset. A timer is started to wait for this
672 * bit to be reset.
673 */
c20c4267 674 cmd->time_left = PMCRAID_RESET_TIMEOUT;
89a36810 675 cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
841b86f3 676 cmd->timer.function = pmcraid_reset_alert_done;
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677 add_timer(&cmd->timer);
678
679 iowrite32(DOORBELL_IOA_RESET_ALERT,
680 pinstance->int_regs.host_ioa_interrupt_reg);
681 doorbells =
682 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
683 pmcraid_info("doorbells after reset alert: %x\n", doorbells);
684 } else {
685 pmcraid_info("PCI config is not accessible starting BIST\n");
686 pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
687 pmcraid_start_bist(cmd);
688 }
689}
690
691/**
692 * pmcraid_timeout_handler - Timeout handler for internally generated ops
693 *
694 * @cmd : pointer to command structure, that got timedout
695 *
696 * This function blocks host requests and initiates an adapter reset.
697 *
698 * Return value:
699 * None
700 */
242b5657 701static void pmcraid_timeout_handler(struct timer_list *t)
89a36810 702{
242b5657 703 struct pmcraid_cmd *cmd = from_timer(cmd, t, timer);
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704 struct pmcraid_instance *pinstance = cmd->drv_inst;
705 unsigned long lock_flags;
706
34876402 707 dev_info(&pinstance->pdev->dev,
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708 "Adapter being reset due to cmd(CDB[0] = %x) timeout\n",
709 cmd->ioa_cb->ioarcb.cdb[0]);
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710
711 /* Command timeouts result in hard reset sequence. The command that got
712 * timed out may be the one used as part of reset sequence. In this
713 * case restart reset sequence using the same command block even if
714 * reset is in progress. Otherwise fail this command and get a free
715 * command block to restart the reset sequence.
716 */
717 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
718 if (!pinstance->ioa_reset_in_progress) {
719 pinstance->ioa_reset_attempts = 0;
720 cmd = pmcraid_get_free_cmd(pinstance);
721
722 /* If we are out of command blocks, just return here itself.
723 * Some other command's timeout handler can do the reset job
724 */
725 if (cmd == NULL) {
726 spin_unlock_irqrestore(pinstance->host->host_lock,
727 lock_flags);
728 pmcraid_err("no free cmnd block for timeout handler\n");
729 return;
730 }
731
732 pinstance->reset_cmd = cmd;
733 pinstance->ioa_reset_in_progress = 1;
734 } else {
735 pmcraid_info("reset is already in progress\n");
736
737 if (pinstance->reset_cmd != cmd) {
738 /* This command should have been given to IOA, this
739 * command will be completed by fail_outstanding_cmds
740 * anyway
741 */
742 pmcraid_err("cmd is pending but reset in progress\n");
743 }
744
745 /* If this command was being used as part of the reset
746 * sequence, set cmd_done pointer to pmcraid_ioa_reset. This
747 * causes fail_outstanding_commands not to return the command
748 * block back to free pool
749 */
750 if (cmd == pinstance->reset_cmd)
751 cmd->cmd_done = pmcraid_ioa_reset;
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752 }
753
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754 /* Notify apps of important IOA bringup/bringdown sequences */
755 if (pinstance->scn.ioa_state != PMC_DEVICE_EVENT_RESET_START &&
756 pinstance->scn.ioa_state != PMC_DEVICE_EVENT_SHUTDOWN_START)
757 pmcraid_notify_ioastate(pinstance,
758 PMC_DEVICE_EVENT_RESET_START);
759
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760 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
761 scsi_block_requests(pinstance->host);
762 pmcraid_reset_alert(cmd);
763 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
764}
765
766/**
767 * pmcraid_internal_done - completion routine for internally generated cmds
768 *
769 * @cmd: command that got response from IOA
770 *
771 * Return Value:
772 * none
773 */
774static void pmcraid_internal_done(struct pmcraid_cmd *cmd)
775{
776 pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
777 cmd->ioa_cb->ioarcb.cdb[0],
778 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
779
780 /* Some of the internal commands are sent with callers blocking for the
781 * response. Same will be indicated as part of cmd->completion_req
782 * field. Response path needs to wake up any waiters waiting for cmd
783 * completion if this flag is set.
784 */
785 if (cmd->completion_req) {
786 cmd->completion_req = 0;
787 complete(&cmd->wait_for_completion);
788 }
789
790 /* most of the internal commands are completed by caller itself, so
791 * no need to return the command block back to free pool until we are
792 * required to do so (e.g once done with initialization).
793 */
794 if (cmd->release) {
795 cmd->release = 0;
796 pmcraid_return_cmd(cmd);
797 }
798}
799
800/**
801 * pmcraid_reinit_cfgtable_done - done function for cfg table reinitialization
802 *
803 * @cmd: command that got response from IOA
804 *
805 * This routine is called after driver re-reads configuration table due to a
806 * lost CCN. It returns the command block back to free pool and schedules
807 * worker thread to add/delete devices into the system.
808 *
809 * Return Value:
810 * none
811 */
812static void pmcraid_reinit_cfgtable_done(struct pmcraid_cmd *cmd)
813{
814 pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
815 cmd->ioa_cb->ioarcb.cdb[0],
816 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
817
818 if (cmd->release) {
819 cmd->release = 0;
820 pmcraid_return_cmd(cmd);
821 }
822 pmcraid_info("scheduling worker for config table reinitialization\n");
823 schedule_work(&cmd->drv_inst->worker_q);
824}
825
826/**
827 * pmcraid_erp_done - Process completion of SCSI error response from device
828 * @cmd: pmcraid_command
829 *
830 * This function copies the sense buffer into the scsi_cmd struct and completes
831 * scsi_cmd by calling scsi_done function.
832 *
833 * Return value:
834 * none
835 */
836static void pmcraid_erp_done(struct pmcraid_cmd *cmd)
837{
838 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
839 struct pmcraid_instance *pinstance = cmd->drv_inst;
840 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
841
842 if (PMCRAID_IOASC_SENSE_KEY(ioasc) > 0) {
843 scsi_cmd->result |= (DID_ERROR << 16);
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844 scmd_printk(KERN_INFO, scsi_cmd,
845 "command CDB[0] = %x failed with IOASC: 0x%08X\n",
846 cmd->ioa_cb->ioarcb.cdb[0], ioasc);
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847 }
848
849 /* if we had allocated sense buffers for request sense, copy the sense
850 * release the buffers
851 */
852 if (cmd->sense_buffer != NULL) {
853 memcpy(scsi_cmd->sense_buffer,
854 cmd->sense_buffer,
855 SCSI_SENSE_BUFFERSIZE);
856 pci_free_consistent(pinstance->pdev,
857 SCSI_SENSE_BUFFERSIZE,
858 cmd->sense_buffer, cmd->sense_buffer_dma);
859 cmd->sense_buffer = NULL;
860 cmd->sense_buffer_dma = 0;
861 }
862
863 scsi_dma_unmap(scsi_cmd);
864 pmcraid_return_cmd(cmd);
865 scsi_cmd->scsi_done(scsi_cmd);
866}
867
868/**
869 * pmcraid_fire_command - sends an IOA command to adapter
870 *
871 * This function adds the given block into pending command list
872 * and returns without waiting
873 *
874 * @cmd : command to be sent to the device
875 *
876 * Return Value
877 * None
878 */
879static void _pmcraid_fire_command(struct pmcraid_cmd *cmd)
880{
881 struct pmcraid_instance *pinstance = cmd->drv_inst;
882 unsigned long lock_flags;
883
884 /* Add this command block to pending cmd pool. We do this prior to
885 * writting IOARCB to ioarrin because IOA might complete the command
886 * by the time we are about to add it to the list. Response handler
c20c4267 887 * (isr/tasklet) looks for cmd block in the pending pending list.
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888 */
889 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
890 list_add_tail(&cmd->free_list, &pinstance->pending_cmd_pool);
891 spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
892 atomic_inc(&pinstance->outstanding_cmds);
893
894 /* driver writes lower 32-bit value of IOARCB address only */
895 mb();
45c80be6 896 iowrite32(le64_to_cpu(cmd->ioa_cb->ioarcb.ioarcb_bus_addr), pinstance->ioarrin);
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897}
898
899/**
900 * pmcraid_send_cmd - fires a command to IOA
901 *
902 * This function also sets up timeout function, and command completion
903 * function
904 *
905 * @cmd: pointer to the command block to be fired to IOA
906 * @cmd_done: command completion function, called once IOA responds
907 * @timeout: timeout to wait for this command completion
908 * @timeout_func: timeout handler
909 *
910 * Return value
911 * none
912 */
913static void pmcraid_send_cmd(
914 struct pmcraid_cmd *cmd,
915 void (*cmd_done) (struct pmcraid_cmd *),
916 unsigned long timeout,
242b5657 917 void (*timeout_func) (struct timer_list *)
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918)
919{
920 /* initialize done function */
921 cmd->cmd_done = cmd_done;
922
923 if (timeout_func) {
924 /* setup timeout handler */
89a36810 925 cmd->timer.expires = jiffies + timeout;
841b86f3 926 cmd->timer.function = timeout_func;
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927 add_timer(&cmd->timer);
928 }
929
930 /* fire the command to IOA */
931 _pmcraid_fire_command(cmd);
932}
933
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934/**
935 * pmcraid_ioa_shutdown_done - completion function for IOA shutdown command
936 * @cmd: pointer to the command block used for sending IOA shutdown command
937 *
938 * Return value
939 * None
940 */
941static void pmcraid_ioa_shutdown_done(struct pmcraid_cmd *cmd)
942{
943 struct pmcraid_instance *pinstance = cmd->drv_inst;
944 unsigned long lock_flags;
945
946 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
947 pmcraid_ioa_reset(cmd);
948 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
949}
950
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951/**
952 * pmcraid_ioa_shutdown - sends SHUTDOWN command to ioa
953 *
954 * @cmd: pointer to the command block used as part of reset sequence
955 *
956 * Return Value
957 * None
958 */
959static void pmcraid_ioa_shutdown(struct pmcraid_cmd *cmd)
960{
961 pmcraid_info("response for Cancel CCN CDB[0] = %x ioasc = %x\n",
962 cmd->ioa_cb->ioarcb.cdb[0],
963 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
964
965 /* Note that commands sent during reset require next command to be sent
966 * to IOA. Hence reinit the done function as well as timeout function
967 */
968 pmcraid_reinit_cmdblk(cmd);
969 cmd->ioa_cb->ioarcb.request_type = REQ_TYPE_IOACMD;
970 cmd->ioa_cb->ioarcb.resource_handle =
971 cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
972 cmd->ioa_cb->ioarcb.cdb[0] = PMCRAID_IOA_SHUTDOWN;
973 cmd->ioa_cb->ioarcb.cdb[1] = PMCRAID_SHUTDOWN_NORMAL;
974
975 /* fire shutdown command to hardware. */
976 pmcraid_info("firing normal shutdown command (%d) to IOA\n",
977 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle));
978
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979 pmcraid_notify_ioastate(cmd->drv_inst, PMC_DEVICE_EVENT_SHUTDOWN_START);
980
981 pmcraid_send_cmd(cmd, pmcraid_ioa_shutdown_done,
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982 PMCRAID_SHUTDOWN_TIMEOUT,
983 pmcraid_timeout_handler);
984}
985
986/**
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987 * pmcraid_get_fwversion_done - completion function for get_fwversion
988 *
989 * @cmd: pointer to command block used to send INQUIRY command
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990 *
991 * Return Value
c20c4267 992 * none
89a36810 993 */
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994static void pmcraid_querycfg(struct pmcraid_cmd *);
995
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996static void pmcraid_get_fwversion_done(struct pmcraid_cmd *cmd)
997{
998 struct pmcraid_instance *pinstance = cmd->drv_inst;
999 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
1000 unsigned long lock_flags;
1001
1002 /* configuration table entry size depends on firmware version. If fw
1003 * version is not known, it is not possible to interpret IOA config
1004 * table
1005 */
1006 if (ioasc) {
1007 pmcraid_err("IOA Inquiry failed with %x\n", ioasc);
1008 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
1009 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
1010 pmcraid_reset_alert(cmd);
1011 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
1012 } else {
1013 pmcraid_querycfg(cmd);
1014 }
1015}
1016
1017/**
1018 * pmcraid_get_fwversion - reads firmware version information
1019 *
1020 * @cmd: pointer to command block used to send INQUIRY command
1021 *
1022 * Return Value
1023 * none
1024 */
1025static void pmcraid_get_fwversion(struct pmcraid_cmd *cmd)
1026{
1027 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
b22ee87d 1028 struct pmcraid_ioadl_desc *ioadl;
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1029 struct pmcraid_instance *pinstance = cmd->drv_inst;
1030 u16 data_size = sizeof(struct pmcraid_inquiry_data);
1031
1032 pmcraid_reinit_cmdblk(cmd);
1033 ioarcb->request_type = REQ_TYPE_SCSI;
1034 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1035 ioarcb->cdb[0] = INQUIRY;
1036 ioarcb->cdb[1] = 1;
1037 ioarcb->cdb[2] = 0xD0;
1038 ioarcb->cdb[3] = (data_size >> 8) & 0xFF;
1039 ioarcb->cdb[4] = data_size & 0xFF;
1040
1041 /* Since entire inquiry data it can be part of IOARCB itself
1042 */
1043 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
1044 offsetof(struct pmcraid_ioarcb,
1045 add_data.u.ioadl[0]));
1046 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
45c80be6 1047 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
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1048
1049 ioarcb->request_flags0 |= NO_LINK_DESCS;
1050 ioarcb->data_transfer_length = cpu_to_le32(data_size);
1051 ioadl = &(ioarcb->add_data.u.ioadl[0]);
1052 ioadl->flags = IOADL_FLAGS_LAST_DESC;
1053 ioadl->address = cpu_to_le64(pinstance->inq_data_baddr);
1054 ioadl->data_len = cpu_to_le32(data_size);
1055
1056 pmcraid_send_cmd(cmd, pmcraid_get_fwversion_done,
1057 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
1058}
1059
1060/**
1061 * pmcraid_identify_hrrq - registers host rrq buffers with IOA
1062 * @cmd: pointer to command block to be used for identify hrrq
1063 *
1064 * Return Value
1065 * none
1066 */
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1067static void pmcraid_identify_hrrq(struct pmcraid_cmd *cmd)
1068{
1069 struct pmcraid_instance *pinstance = cmd->drv_inst;
1070 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
c20c4267 1071 int index = cmd->hrrq_index;
89a36810 1072 __be64 hrrq_addr = cpu_to_be64(pinstance->hrrq_start_bus_addr[index]);
45c80be6 1073 __be32 hrrq_size = cpu_to_be32(sizeof(u32) * PMCRAID_MAX_CMD);
c20c4267 1074 void (*done_function)(struct pmcraid_cmd *);
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1075
1076 pmcraid_reinit_cmdblk(cmd);
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1077 cmd->hrrq_index = index + 1;
1078
1079 if (cmd->hrrq_index < pinstance->num_hrrq) {
1080 done_function = pmcraid_identify_hrrq;
1081 } else {
1082 cmd->hrrq_index = 0;
1083 done_function = pmcraid_get_fwversion;
1084 }
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1085
1086 /* Initialize ioarcb */
1087 ioarcb->request_type = REQ_TYPE_IOACMD;
1088 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1089
1090 /* initialize the hrrq number where IOA will respond to this command */
1091 ioarcb->hrrq_id = index;
1092 ioarcb->cdb[0] = PMCRAID_IDENTIFY_HRRQ;
1093 ioarcb->cdb[1] = index;
1094
1095 /* IOA expects 64-bit pci address to be written in B.E format
1096 * (i.e cdb[2]=MSByte..cdb[9]=LSB.
1097 */
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1098 pmcraid_info("HRRQ_IDENTIFY with hrrq:ioarcb:index => %llx:%llx:%x\n",
1099 hrrq_addr, ioarcb->ioarcb_bus_addr, index);
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1100
1101 memcpy(&(ioarcb->cdb[2]), &hrrq_addr, sizeof(hrrq_addr));
1102 memcpy(&(ioarcb->cdb[10]), &hrrq_size, sizeof(hrrq_size));
1103
1104 /* Subsequent commands require HRRQ identification to be successful.
1105 * Note that this gets called even during reset from SCSI mid-layer
1106 * or tasklet
1107 */
c20c4267 1108 pmcraid_send_cmd(cmd, done_function,
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1109 PMCRAID_INTERNAL_TIMEOUT,
1110 pmcraid_timeout_handler);
1111}
1112
1113static void pmcraid_process_ccn(struct pmcraid_cmd *cmd);
1114static void pmcraid_process_ldn(struct pmcraid_cmd *cmd);
1115
1116/**
1117 * pmcraid_send_hcam_cmd - send an initialized command block(HCAM) to IOA
1118 *
1119 * @cmd: initialized command block pointer
1120 *
1121 * Return Value
1122 * none
1123 */
1124static void pmcraid_send_hcam_cmd(struct pmcraid_cmd *cmd)
1125{
1126 if (cmd->ioa_cb->ioarcb.cdb[1] == PMCRAID_HCAM_CODE_CONFIG_CHANGE)
1127 atomic_set(&(cmd->drv_inst->ccn.ignore), 0);
1128 else
1129 atomic_set(&(cmd->drv_inst->ldn.ignore), 0);
1130
1131 pmcraid_send_cmd(cmd, cmd->cmd_done, 0, NULL);
1132}
1133
1134/**
1135 * pmcraid_init_hcam - send an initialized command block(HCAM) to IOA
1136 *
1137 * @pinstance: pointer to adapter instance structure
1138 * @type: HCAM type
1139 *
1140 * Return Value
1141 * pointer to initialized pmcraid_cmd structure or NULL
1142 */
1143static struct pmcraid_cmd *pmcraid_init_hcam
1144(
1145 struct pmcraid_instance *pinstance,
1146 u8 type
1147)
1148{
1149 struct pmcraid_cmd *cmd;
1150 struct pmcraid_ioarcb *ioarcb;
1151 struct pmcraid_ioadl_desc *ioadl;
1152 struct pmcraid_hostrcb *hcam;
1153 void (*cmd_done) (struct pmcraid_cmd *);
1154 dma_addr_t dma;
1155 int rcb_size;
1156
1157 cmd = pmcraid_get_free_cmd(pinstance);
1158
1159 if (!cmd) {
1160 pmcraid_err("no free command blocks for hcam\n");
1161 return cmd;
1162 }
1163
1164 if (type == PMCRAID_HCAM_CODE_CONFIG_CHANGE) {
c20c4267 1165 rcb_size = sizeof(struct pmcraid_hcam_ccn_ext);
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1166 cmd_done = pmcraid_process_ccn;
1167 dma = pinstance->ccn.baddr + PMCRAID_AEN_HDR_SIZE;
1168 hcam = &pinstance->ccn;
1169 } else {
1170 rcb_size = sizeof(struct pmcraid_hcam_ldn);
1171 cmd_done = pmcraid_process_ldn;
1172 dma = pinstance->ldn.baddr + PMCRAID_AEN_HDR_SIZE;
1173 hcam = &pinstance->ldn;
1174 }
1175
1176 /* initialize command pointer used for HCAM registration */
1177 hcam->cmd = cmd;
1178
1179 ioarcb = &cmd->ioa_cb->ioarcb;
1180 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
1181 offsetof(struct pmcraid_ioarcb,
1182 add_data.u.ioadl[0]));
1183 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
1184 ioadl = ioarcb->add_data.u.ioadl;
1185
1186 /* Initialize ioarcb */
1187 ioarcb->request_type = REQ_TYPE_HCAM;
1188 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1189 ioarcb->cdb[0] = PMCRAID_HOST_CONTROLLED_ASYNC;
1190 ioarcb->cdb[1] = type;
1191 ioarcb->cdb[7] = (rcb_size >> 8) & 0xFF;
1192 ioarcb->cdb[8] = (rcb_size) & 0xFF;
1193
1194 ioarcb->data_transfer_length = cpu_to_le32(rcb_size);
1195
88197966 1196 ioadl[0].flags |= IOADL_FLAGS_READ_LAST;
89a36810 1197 ioadl[0].data_len = cpu_to_le32(rcb_size);
45c80be6 1198 ioadl[0].address = cpu_to_le64(dma);
89a36810
AR
1199
1200 cmd->cmd_done = cmd_done;
1201 return cmd;
1202}
1203
1204/**
1205 * pmcraid_send_hcam - Send an HCAM to IOA
1206 * @pinstance: ioa config struct
1207 * @type: HCAM type
1208 *
1209 * This function will send a Host Controlled Async command to IOA.
1210 *
1211 * Return value:
c20c4267 1212 * none
89a36810
AR
1213 */
1214static void pmcraid_send_hcam(struct pmcraid_instance *pinstance, u8 type)
1215{
1216 struct pmcraid_cmd *cmd = pmcraid_init_hcam(pinstance, type);
1217 pmcraid_send_hcam_cmd(cmd);
1218}
1219
1220
1221/**
1222 * pmcraid_prepare_cancel_cmd - prepares a command block to abort another
1223 *
1224 * @cmd: pointer to cmd that is used as cancelling command
1225 * @cmd_to_cancel: pointer to the command that needs to be cancelled
1226 */
1227static void pmcraid_prepare_cancel_cmd(
1228 struct pmcraid_cmd *cmd,
1229 struct pmcraid_cmd *cmd_to_cancel
1230)
1231{
1232 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
45c80be6
AB
1233 __be64 ioarcb_addr;
1234
1235 /* IOARCB address of the command to be cancelled is given in
1236 * cdb[2]..cdb[9] is Big-Endian format. Note that length bits in
1237 * IOARCB address are not masked.
1238 */
1239 ioarcb_addr = cpu_to_be64(le64_to_cpu(cmd_to_cancel->ioa_cb->ioarcb.ioarcb_bus_addr));
89a36810
AR
1240
1241 /* Get the resource handle to where the command to be aborted has been
1242 * sent.
1243 */
1244 ioarcb->resource_handle = cmd_to_cancel->ioa_cb->ioarcb.resource_handle;
1245 ioarcb->request_type = REQ_TYPE_IOACMD;
1246 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
1247 ioarcb->cdb[0] = PMCRAID_ABORT_CMD;
1248
89a36810
AR
1249 memcpy(&(ioarcb->cdb[2]), &ioarcb_addr, sizeof(ioarcb_addr));
1250}
1251
1252/**
1253 * pmcraid_cancel_hcam - sends ABORT task to abort a given HCAM
1254 *
1255 * @cmd: command to be used as cancelling command
1256 * @type: HCAM type
1257 * @cmd_done: op done function for the cancelling command
1258 */
1259static void pmcraid_cancel_hcam(
1260 struct pmcraid_cmd *cmd,
1261 u8 type,
1262 void (*cmd_done) (struct pmcraid_cmd *)
1263)
1264{
1265 struct pmcraid_instance *pinstance;
1266 struct pmcraid_hostrcb *hcam;
1267
1268 pinstance = cmd->drv_inst;
1269 hcam = (type == PMCRAID_HCAM_CODE_LOG_DATA) ?
1270 &pinstance->ldn : &pinstance->ccn;
1271
1272 /* prepare for cancelling previous hcam command. If the HCAM is
1273 * currently not pending with IOA, we would have hcam->cmd as non-null
1274 */
1275 if (hcam->cmd == NULL)
1276 return;
1277
1278 pmcraid_prepare_cancel_cmd(cmd, hcam->cmd);
1279
1280 /* writing to IOARRIN must be protected by host_lock, as mid-layer
1281 * schedule queuecommand while we are doing this
1282 */
1283 pmcraid_send_cmd(cmd, cmd_done,
1284 PMCRAID_INTERNAL_TIMEOUT,
1285 pmcraid_timeout_handler);
1286}
1287
1288/**
1289 * pmcraid_cancel_ccn - cancel CCN HCAM already registered with IOA
1290 *
1291 * @cmd: command block to be used for cancelling the HCAM
1292 */
1293static void pmcraid_cancel_ccn(struct pmcraid_cmd *cmd)
1294{
1295 pmcraid_info("response for Cancel LDN CDB[0] = %x ioasc = %x\n",
1296 cmd->ioa_cb->ioarcb.cdb[0],
1297 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
1298
1299 pmcraid_reinit_cmdblk(cmd);
1300
1301 pmcraid_cancel_hcam(cmd,
1302 PMCRAID_HCAM_CODE_CONFIG_CHANGE,
1303 pmcraid_ioa_shutdown);
1304}
1305
1306/**
1307 * pmcraid_cancel_ldn - cancel LDN HCAM already registered with IOA
1308 *
1309 * @cmd: command block to be used for cancelling the HCAM
1310 */
1311static void pmcraid_cancel_ldn(struct pmcraid_cmd *cmd)
1312{
1313 pmcraid_cancel_hcam(cmd,
1314 PMCRAID_HCAM_CODE_LOG_DATA,
1315 pmcraid_cancel_ccn);
1316}
1317
1318/**
1319 * pmcraid_expose_resource - check if the resource can be exposed to OS
1320 *
c20c4267 1321 * @fw_version: firmware version code
89a36810
AR
1322 * @cfgte: pointer to configuration table entry of the resource
1323 *
1324 * Return value:
c20c4267 1325 * true if resource can be added to midlayer, false(0) otherwise
89a36810 1326 */
c20c4267
AR
1327static int pmcraid_expose_resource(u16 fw_version,
1328 struct pmcraid_config_table_entry *cfgte)
89a36810
AR
1329{
1330 int retval = 0;
1331
c20c4267
AR
1332 if (cfgte->resource_type == RES_TYPE_VSET) {
1333 if (fw_version <= PMCRAID_FW_VERSION_1)
1334 retval = ((cfgte->unique_flags1 & 0x80) == 0);
1335 else
1336 retval = ((cfgte->unique_flags0 & 0x80) == 0 &&
1337 (cfgte->unique_flags1 & 0x80) == 0);
1338
1339 } else if (cfgte->resource_type == RES_TYPE_GSCSI)
89a36810
AR
1340 retval = (RES_BUS(cfgte->resource_address) !=
1341 PMCRAID_VIRTUAL_ENCL_BUS_ID);
1342 return retval;
1343}
1344
1345/* attributes supported by pmcraid_event_family */
1346enum {
1347 PMCRAID_AEN_ATTR_UNSPEC,
1348 PMCRAID_AEN_ATTR_EVENT,
1349 __PMCRAID_AEN_ATTR_MAX,
1350};
1351#define PMCRAID_AEN_ATTR_MAX (__PMCRAID_AEN_ATTR_MAX - 1)
1352
1353/* commands supported by pmcraid_event_family */
1354enum {
1355 PMCRAID_AEN_CMD_UNSPEC,
1356 PMCRAID_AEN_CMD_EVENT,
1357 __PMCRAID_AEN_CMD_MAX,
1358};
1359#define PMCRAID_AEN_CMD_MAX (__PMCRAID_AEN_CMD_MAX - 1)
1360
5e53e689
JB
1361static struct genl_multicast_group pmcraid_mcgrps[] = {
1362 { .name = "events", /* not really used - see ID discussion below */ },
1363};
1364
56989f6d 1365static struct genl_family pmcraid_event_family __ro_after_init = {
489111e5 1366 .module = THIS_MODULE,
89a36810
AR
1367 .name = "pmcraid",
1368 .version = 1,
5e53e689
JB
1369 .maxattr = PMCRAID_AEN_ATTR_MAX,
1370 .mcgrps = pmcraid_mcgrps,
1371 .n_mcgrps = ARRAY_SIZE(pmcraid_mcgrps),
89a36810
AR
1372};
1373
1374/**
1375 * pmcraid_netlink_init - registers pmcraid_event_family
1376 *
1377 * Return value:
c20c4267
AR
1378 * 0 if the pmcraid_event_family is successfully registered
1379 * with netlink generic, non-zero otherwise
89a36810 1380 */
56989f6d 1381static int __init pmcraid_netlink_init(void)
89a36810
AR
1382{
1383 int result;
1384
1385 result = genl_register_family(&pmcraid_event_family);
1386
1387 if (result)
1388 return result;
1389
1390 pmcraid_info("registered NETLINK GENERIC group: %d\n",
1391 pmcraid_event_family.id);
1392
1393 return result;
1394}
1395
1396/**
1397 * pmcraid_netlink_release - unregisters pmcraid_event_family
1398 *
1399 * Return value:
c20c4267 1400 * none
89a36810
AR
1401 */
1402static void pmcraid_netlink_release(void)
1403{
1404 genl_unregister_family(&pmcraid_event_family);
1405}
1406
1407/**
1408 * pmcraid_notify_aen - sends event msg to user space application
1409 * @pinstance: pointer to adapter instance structure
1410 * @type: HCAM type
1411 *
1412 * Return value:
1413 * 0 if success, error value in case of any failure.
1414 */
c20c4267
AR
1415static int pmcraid_notify_aen(
1416 struct pmcraid_instance *pinstance,
1417 struct pmcraid_aen_msg *aen_msg,
1418 u32 data_size
1419)
89a36810
AR
1420{
1421 struct sk_buff *skb;
89a36810 1422 void *msg_header;
c20c4267 1423 u32 total_size, nla_genl_hdr_total_size;
89a36810
AR
1424 int result;
1425
89a36810
AR
1426 aen_msg->hostno = (pinstance->host->unique_id << 16 |
1427 MINOR(pinstance->cdev.dev));
1428 aen_msg->length = data_size;
c20c4267 1429
89a36810
AR
1430 data_size += sizeof(*aen_msg);
1431
1432 total_size = nla_total_size(data_size);
c20c4267
AR
1433 /* Add GENL_HDR to total_size */
1434 nla_genl_hdr_total_size =
1435 (total_size + (GENL_HDRLEN +
1436 ((struct genl_family *)&pmcraid_event_family)->hdrsize)
1437 + NLMSG_HDRLEN);
1438 skb = genlmsg_new(nla_genl_hdr_total_size, GFP_ATOMIC);
89a36810
AR
1439
1440
1441 if (!skb) {
1442 pmcraid_err("Failed to allocate aen data SKB of size: %x\n",
1443 total_size);
1444 return -ENOMEM;
1445 }
1446
1447 /* add the genetlink message header */
1448 msg_header = genlmsg_put(skb, 0, 0,
1449 &pmcraid_event_family, 0,
1450 PMCRAID_AEN_CMD_EVENT);
1451 if (!msg_header) {
1452 pmcraid_err("failed to copy command details\n");
1453 nlmsg_free(skb);
1454 return -ENOMEM;
1455 }
1456
1457 result = nla_put(skb, PMCRAID_AEN_ATTR_EVENT, data_size, aen_msg);
1458
1459 if (result) {
c20c4267 1460 pmcraid_err("failed to copy AEN attribute data\n");
89a36810
AR
1461 nlmsg_free(skb);
1462 return -EINVAL;
1463 }
1464
1465 /* send genetlink multicast message to notify appplications */
053c095a 1466 genlmsg_end(skb, msg_header);
89a36810 1467
5e53e689
JB
1468 result = genlmsg_multicast(&pmcraid_event_family, skb,
1469 0, 0, GFP_ATOMIC);
89a36810
AR
1470
1471 /* If there are no listeners, genlmsg_multicast may return non-zero
1472 * value.
1473 */
1474 if (result)
c20c4267 1475 pmcraid_info("error (%x) sending aen event message\n", result);
89a36810
AR
1476 return result;
1477}
1478
c20c4267
AR
1479/**
1480 * pmcraid_notify_ccn - notifies about CCN event msg to user space
1481 * @pinstance: pointer adapter instance structure
1482 *
1483 * Return value:
1484 * 0 if success, error value in case of any failure
1485 */
1486static int pmcraid_notify_ccn(struct pmcraid_instance *pinstance)
1487{
1488 return pmcraid_notify_aen(pinstance,
1489 pinstance->ccn.msg,
45c80be6 1490 le32_to_cpu(pinstance->ccn.hcam->data_len) +
c20c4267
AR
1491 sizeof(struct pmcraid_hcam_hdr));
1492}
1493
1494/**
1495 * pmcraid_notify_ldn - notifies about CCN event msg to user space
1496 * @pinstance: pointer adapter instance structure
1497 *
1498 * Return value:
1499 * 0 if success, error value in case of any failure
1500 */
1501static int pmcraid_notify_ldn(struct pmcraid_instance *pinstance)
1502{
1503 return pmcraid_notify_aen(pinstance,
1504 pinstance->ldn.msg,
45c80be6 1505 le32_to_cpu(pinstance->ldn.hcam->data_len) +
c20c4267
AR
1506 sizeof(struct pmcraid_hcam_hdr));
1507}
1508
1509/**
1510 * pmcraid_notify_ioastate - sends IOA state event msg to user space
1511 * @pinstance: pointer adapter instance structure
1512 * @evt: controller state event to be sent
1513 *
1514 * Return value:
1515 * 0 if success, error value in case of any failure
1516 */
1517static void pmcraid_notify_ioastate(struct pmcraid_instance *pinstance, u32 evt)
1518{
1519 pinstance->scn.ioa_state = evt;
1520 pmcraid_notify_aen(pinstance,
1521 &pinstance->scn.msg,
1522 sizeof(u32));
1523}
1524
89a36810
AR
1525/**
1526 * pmcraid_handle_config_change - Handle a config change from the adapter
1527 * @pinstance: pointer to per adapter instance structure
1528 *
1529 * Return value:
1530 * none
1531 */
729c8456 1532
89a36810
AR
1533static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
1534{
1535 struct pmcraid_config_table_entry *cfg_entry;
1536 struct pmcraid_hcam_ccn *ccn_hcam;
1537 struct pmcraid_cmd *cmd;
1538 struct pmcraid_cmd *cfgcmd;
1539 struct pmcraid_resource_entry *res = NULL;
89a36810
AR
1540 unsigned long lock_flags;
1541 unsigned long host_lock_flags;
729c8456
AR
1542 u32 new_entry = 1;
1543 u32 hidden_entry = 0;
c20c4267 1544 u16 fw_version;
89a36810
AR
1545 int rc;
1546
1547 ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam;
1548 cfg_entry = &ccn_hcam->cfg_entry;
c20c4267 1549 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
89a36810 1550
592488a3
AR
1551 pmcraid_info("CCN(%x): %x timestamp: %llx type: %x lost: %x flags: %x \
1552 res: %x:%x:%x:%x\n",
45c80be6 1553 le32_to_cpu(pinstance->ccn.hcam->ilid),
89a36810 1554 pinstance->ccn.hcam->op_code,
45c80be6
AB
1555 (le32_to_cpu(pinstance->ccn.hcam->timestamp1) |
1556 ((le32_to_cpu(pinstance->ccn.hcam->timestamp2) & 0xffffffffLL) << 32)),
89a36810
AR
1557 pinstance->ccn.hcam->notification_type,
1558 pinstance->ccn.hcam->notification_lost,
1559 pinstance->ccn.hcam->flags,
1560 pinstance->host->unique_id,
1561 RES_IS_VSET(*cfg_entry) ? PMCRAID_VSET_BUS_ID :
1562 (RES_IS_GSCSI(*cfg_entry) ? PMCRAID_PHYS_BUS_ID :
1563 RES_BUS(cfg_entry->resource_address)),
c20c4267
AR
1564 RES_IS_VSET(*cfg_entry) ?
1565 (fw_version <= PMCRAID_FW_VERSION_1 ?
1566 cfg_entry->unique_flags1 :
45c80be6 1567 le16_to_cpu(cfg_entry->array_id) & 0xFF) :
89a36810
AR
1568 RES_TARGET(cfg_entry->resource_address),
1569 RES_LUN(cfg_entry->resource_address));
1570
1571
1572 /* If this HCAM indicates a lost notification, read the config table */
1573 if (pinstance->ccn.hcam->notification_lost) {
1574 cfgcmd = pmcraid_get_free_cmd(pinstance);
1575 if (cfgcmd) {
1576 pmcraid_info("lost CCN, reading config table\b");
1577 pinstance->reinit_cfg_table = 1;
1578 pmcraid_querycfg(cfgcmd);
1579 } else {
1580 pmcraid_err("lost CCN, no free cmd for querycfg\n");
1581 }
1582 goto out_notify_apps;
1583 }
1584
1585 /* If this resource is not going to be added to mid-layer, just notify
729c8456
AR
1586 * applications and return. If this notification is about hiding a VSET
1587 * resource, check if it was exposed already.
89a36810 1588 */
729c8456
AR
1589 if (pinstance->ccn.hcam->notification_type ==
1590 NOTIFICATION_TYPE_ENTRY_CHANGED &&
c20c4267 1591 cfg_entry->resource_type == RES_TYPE_VSET) {
db269932 1592 hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0;
c20c4267 1593 } else if (!pmcraid_expose_resource(fw_version, cfg_entry)) {
89a36810 1594 goto out_notify_apps;
c20c4267 1595 }
89a36810
AR
1596
1597 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
1598 list_for_each_entry(res, &pinstance->used_res_q, queue) {
1599 rc = memcmp(&res->cfg_entry.resource_address,
1600 &cfg_entry->resource_address,
1601 sizeof(cfg_entry->resource_address));
1602 if (!rc) {
1603 new_entry = 0;
1604 break;
1605 }
1606 }
1607
1608 if (new_entry) {
1609
729c8456
AR
1610 if (hidden_entry) {
1611 spin_unlock_irqrestore(&pinstance->resource_lock,
1612 lock_flags);
1613 goto out_notify_apps;
1614 }
1615
89a36810
AR
1616 /* If there are more number of resources than what driver can
1617 * manage, do not notify the applications about the CCN. Just
1618 * ignore this notifications and re-register the same HCAM
1619 */
1620 if (list_empty(&pinstance->free_res_q)) {
1621 spin_unlock_irqrestore(&pinstance->resource_lock,
1622 lock_flags);
1623 pmcraid_err("too many resources attached\n");
1624 spin_lock_irqsave(pinstance->host->host_lock,
1625 host_lock_flags);
1626 pmcraid_send_hcam(pinstance,
1627 PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1628 spin_unlock_irqrestore(pinstance->host->host_lock,
1629 host_lock_flags);
1630 return;
1631 }
1632
1633 res = list_entry(pinstance->free_res_q.next,
1634 struct pmcraid_resource_entry, queue);
1635
1636 list_del(&res->queue);
1637 res->scsi_dev = NULL;
1638 res->reset_progress = 0;
1639 list_add_tail(&res->queue, &pinstance->used_res_q);
1640 }
1641
c20c4267 1642 memcpy(&res->cfg_entry, cfg_entry, pinstance->config_table_entry_size);
89a36810
AR
1643
1644 if (pinstance->ccn.hcam->notification_type ==
729c8456 1645 NOTIFICATION_TYPE_ENTRY_DELETED || hidden_entry) {
89a36810 1646 if (res->scsi_dev) {
c20c4267
AR
1647 if (fw_version <= PMCRAID_FW_VERSION_1)
1648 res->cfg_entry.unique_flags1 &= 0x7F;
1649 else
45c80be6 1650 res->cfg_entry.array_id &= cpu_to_le16(0xFF);
89a36810
AR
1651 res->change_detected = RES_CHANGE_DEL;
1652 res->cfg_entry.resource_handle =
1653 PMCRAID_INVALID_RES_HANDLE;
1654 schedule_work(&pinstance->worker_q);
1655 } else {
1656 /* This may be one of the non-exposed resources */
1657 list_move_tail(&res->queue, &pinstance->free_res_q);
1658 }
1659 } else if (!res->scsi_dev) {
1660 res->change_detected = RES_CHANGE_ADD;
1661 schedule_work(&pinstance->worker_q);
1662 }
1663 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
1664
1665out_notify_apps:
1666
1667 /* Notify configuration changes to registered applications.*/
1668 if (!pmcraid_disable_aen)
c20c4267 1669 pmcraid_notify_ccn(pinstance);
89a36810
AR
1670
1671 cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1672 if (cmd)
1673 pmcraid_send_hcam_cmd(cmd);
1674}
1675
1676/**
1677 * pmcraid_get_error_info - return error string for an ioasc
1678 * @ioasc: ioasc code
1679 * Return Value
1680 * none
1681 */
1682static struct pmcraid_ioasc_error *pmcraid_get_error_info(u32 ioasc)
1683{
1684 int i;
1685 for (i = 0; i < ARRAY_SIZE(pmcraid_ioasc_error_table); i++) {
1686 if (pmcraid_ioasc_error_table[i].ioasc_code == ioasc)
1687 return &pmcraid_ioasc_error_table[i];
1688 }
1689 return NULL;
1690}
1691
1692/**
1693 * pmcraid_ioasc_logger - log IOASC information based user-settings
1694 * @ioasc: ioasc code
1695 * @cmd: pointer to command that resulted in 'ioasc'
1696 */
61b96d5b 1697static void pmcraid_ioasc_logger(u32 ioasc, struct pmcraid_cmd *cmd)
89a36810
AR
1698{
1699 struct pmcraid_ioasc_error *error_info = pmcraid_get_error_info(ioasc);
1700
1701 if (error_info == NULL ||
1702 cmd->drv_inst->current_log_level < error_info->log_level)
1703 return;
1704
1705 /* log the error string */
c20c4267 1706 pmcraid_err("cmd [%x] for resource %x failed with %x(%s)\n",
89a36810 1707 cmd->ioa_cb->ioarcb.cdb[0],
45c80be6
AB
1708 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle),
1709 ioasc, error_info->error_string);
89a36810
AR
1710}
1711
1712/**
1713 * pmcraid_handle_error_log - Handle a config change (error log) from the IOA
1714 *
1715 * @pinstance: pointer to per adapter instance structure
1716 *
1717 * Return value:
1718 * none
1719 */
1720static void pmcraid_handle_error_log(struct pmcraid_instance *pinstance)
1721{
1722 struct pmcraid_hcam_ldn *hcam_ldn;
1723 u32 ioasc;
1724
1725 hcam_ldn = (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
1726
1727 pmcraid_info
1728 ("LDN(%x): %x type: %x lost: %x flags: %x overlay id: %x\n",
1729 pinstance->ldn.hcam->ilid,
1730 pinstance->ldn.hcam->op_code,
1731 pinstance->ldn.hcam->notification_type,
1732 pinstance->ldn.hcam->notification_lost,
1733 pinstance->ldn.hcam->flags,
1734 pinstance->ldn.hcam->overlay_id);
1735
1736 /* log only the errors, no need to log informational log entries */
1737 if (pinstance->ldn.hcam->notification_type !=
1738 NOTIFICATION_TYPE_ERROR_LOG)
1739 return;
1740
1741 if (pinstance->ldn.hcam->notification_lost ==
1742 HOSTRCB_NOTIFICATIONS_LOST)
34876402 1743 dev_info(&pinstance->pdev->dev, "Error notifications lost\n");
89a36810
AR
1744
1745 ioasc = le32_to_cpu(hcam_ldn->error_log.fd_ioasc);
1746
1747 if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
1748 ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER) {
34876402 1749 dev_info(&pinstance->pdev->dev,
89a36810
AR
1750 "UnitAttention due to IOA Bus Reset\n");
1751 scsi_report_bus_reset(
1752 pinstance->host,
1753 RES_BUS(hcam_ldn->error_log.fd_ra));
1754 }
1755
1756 return;
1757}
1758
1759/**
1760 * pmcraid_process_ccn - Op done function for a CCN.
1761 * @cmd: pointer to command struct
1762 *
1763 * This function is the op done function for a configuration
1764 * change notification
1765 *
1766 * Return value:
1767 * none
1768 */
1769static void pmcraid_process_ccn(struct pmcraid_cmd *cmd)
1770{
1771 struct pmcraid_instance *pinstance = cmd->drv_inst;
1772 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
1773 unsigned long lock_flags;
1774
1775 pinstance->ccn.cmd = NULL;
1776 pmcraid_return_cmd(cmd);
1777
1778 /* If driver initiated IOA reset happened while this hcam was pending
1779 * with IOA, or IOA bringdown sequence is in progress, no need to
1780 * re-register the hcam
1781 */
1782 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
1783 atomic_read(&pinstance->ccn.ignore) == 1) {
1784 return;
1785 } else if (ioasc) {
34876402 1786 dev_info(&pinstance->pdev->dev,
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AR
1787 "Host RCB (CCN) failed with IOASC: 0x%08X\n", ioasc);
1788 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
1789 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1790 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
1791 } else {
1792 pmcraid_handle_config_change(pinstance);
1793 }
1794}
1795
1796/**
1797 * pmcraid_process_ldn - op done function for an LDN
1798 * @cmd: pointer to command block
1799 *
1800 * Return value
1801 * none
1802 */
1803static void pmcraid_initiate_reset(struct pmcraid_instance *);
592488a3 1804static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd);
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1805
1806static void pmcraid_process_ldn(struct pmcraid_cmd *cmd)
1807{
1808 struct pmcraid_instance *pinstance = cmd->drv_inst;
1809 struct pmcraid_hcam_ldn *ldn_hcam =
1810 (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
1811 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
1812 u32 fd_ioasc = le32_to_cpu(ldn_hcam->error_log.fd_ioasc);
1813 unsigned long lock_flags;
1814
1815 /* return the command block back to freepool */
1816 pinstance->ldn.cmd = NULL;
1817 pmcraid_return_cmd(cmd);
1818
1819 /* If driver initiated IOA reset happened while this hcam was pending
1820 * with IOA, no need to re-register the hcam as reset engine will do it
1821 * once reset sequence is complete
1822 */
1823 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
1824 atomic_read(&pinstance->ccn.ignore) == 1) {
1825 return;
1826 } else if (!ioasc) {
1827 pmcraid_handle_error_log(pinstance);
1828 if (fd_ioasc == PMCRAID_IOASC_NR_IOA_RESET_REQUIRED) {
1829 spin_lock_irqsave(pinstance->host->host_lock,
1830 lock_flags);
1831 pmcraid_initiate_reset(pinstance);
1832 spin_unlock_irqrestore(pinstance->host->host_lock,
1833 lock_flags);
1834 return;
1835 }
592488a3
AR
1836 if (fd_ioasc == PMCRAID_IOASC_TIME_STAMP_OUT_OF_SYNC) {
1837 pinstance->timestamp_error = 1;
1838 pmcraid_set_timestamp(cmd);
1839 }
89a36810 1840 } else {
34876402 1841 dev_info(&pinstance->pdev->dev,
89a36810
AR
1842 "Host RCB(LDN) failed with IOASC: 0x%08X\n", ioasc);
1843 }
1844 /* send netlink message for HCAM notification if enabled */
1845 if (!pmcraid_disable_aen)
c20c4267 1846 pmcraid_notify_ldn(pinstance);
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1847
1848 cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
1849 if (cmd)
1850 pmcraid_send_hcam_cmd(cmd);
1851}
1852
1853/**
1854 * pmcraid_register_hcams - register HCAMs for CCN and LDN
1855 *
1856 * @pinstance: pointer per adapter instance structure
1857 *
1858 * Return Value
1859 * none
1860 */
1861static void pmcraid_register_hcams(struct pmcraid_instance *pinstance)
1862{
1863 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1864 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
1865}
1866
1867/**
1868 * pmcraid_unregister_hcams - cancel HCAMs registered already
1869 * @cmd: pointer to command used as part of reset sequence
1870 */
1871static void pmcraid_unregister_hcams(struct pmcraid_cmd *cmd)
1872{
1873 struct pmcraid_instance *pinstance = cmd->drv_inst;
1874
1875 /* During IOA bringdown, HCAM gets fired and tasklet proceeds with
1876 * handling hcam response though it is not necessary. In order to
1877 * prevent this, set 'ignore', so that bring-down sequence doesn't
1878 * re-send any more hcams
1879 */
1880 atomic_set(&pinstance->ccn.ignore, 1);
1881 atomic_set(&pinstance->ldn.ignore, 1);
1882
1883 /* If adapter reset was forced as part of runtime reset sequence,
c20c4267
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1884 * start the reset sequence. Reset will be triggered even in case
1885 * IOA unit_check.
89a36810 1886 */
c20c4267
AR
1887 if ((pinstance->force_ioa_reset && !pinstance->ioa_bringdown) ||
1888 pinstance->ioa_unit_check) {
89a36810 1889 pinstance->force_ioa_reset = 0;
c20c4267 1890 pinstance->ioa_unit_check = 0;
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1891 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
1892 pmcraid_reset_alert(cmd);
1893 return;
1894 }
1895
1896 /* Driver tries to cancel HCAMs by sending ABORT TASK for each HCAM
1897 * one after the other. So CCN cancellation will be triggered by
1898 * pmcraid_cancel_ldn itself.
1899 */
1900 pmcraid_cancel_ldn(cmd);
1901}
1902
1903/**
1904 * pmcraid_reset_enable_ioa - re-enable IOA after a hard reset
1905 * @pinstance: pointer to adapter instance structure
1906 * Return Value
1907 * 1 if TRANSITION_TO_OPERATIONAL is active, otherwise 0
1908 */
1909static void pmcraid_reinit_buffers(struct pmcraid_instance *);
1910
1911static int pmcraid_reset_enable_ioa(struct pmcraid_instance *pinstance)
1912{
1913 u32 intrs;
1914
1915 pmcraid_reinit_buffers(pinstance);
1916 intrs = pmcraid_read_interrupts(pinstance);
1917
1918 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
1919
1920 if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
c20c4267
AR
1921 if (!pinstance->interrupt_mode) {
1922 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
1923 pinstance->int_regs.
1924 ioa_host_interrupt_mask_reg);
1925 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
1926 pinstance->int_regs.ioa_host_interrupt_clr_reg);
1927 }
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AR
1928 return 1;
1929 } else {
1930 return 0;
1931 }
1932}
1933
1934/**
1935 * pmcraid_soft_reset - performs a soft reset and makes IOA become ready
1936 * @cmd : pointer to reset command block
1937 *
1938 * Return Value
1939 * none
1940 */
1941static void pmcraid_soft_reset(struct pmcraid_cmd *cmd)
1942{
1943 struct pmcraid_instance *pinstance = cmd->drv_inst;
1944 u32 int_reg;
1945 u32 doorbell;
1946
1947 /* There will be an interrupt when Transition to Operational bit is
1948 * set so tasklet would execute next reset task. The timeout handler
1949 * would re-initiate a reset
1950 */
1951 cmd->cmd_done = pmcraid_ioa_reset;
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1952 cmd->timer.expires = jiffies +
1953 msecs_to_jiffies(PMCRAID_TRANSOP_TIMEOUT);
841b86f3 1954 cmd->timer.function = pmcraid_timeout_handler;
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AR
1955
1956 if (!timer_pending(&cmd->timer))
1957 add_timer(&cmd->timer);
1958
1959 /* Enable destructive diagnostics on IOA if it is not yet in
1960 * operational state
1961 */
1962 doorbell = DOORBELL_RUNTIME_RESET |
1963 DOORBELL_ENABLE_DESTRUCTIVE_DIAGS;
1964
c20c4267
AR
1965 /* Since we do RESET_ALERT and Start BIST we have to again write
1966 * MSIX Doorbell to indicate the interrupt mode
1967 */
1968 if (pinstance->interrupt_mode) {
1969 iowrite32(DOORBELL_INTR_MODE_MSIX,
1970 pinstance->int_regs.host_ioa_interrupt_reg);
1971 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
1972 }
1973
89a36810 1974 iowrite32(doorbell, pinstance->int_regs.host_ioa_interrupt_reg);
c20c4267 1975 ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
89a36810 1976 int_reg = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
c20c4267 1977
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AR
1978 pmcraid_info("Waiting for IOA to become operational %x:%x\n",
1979 ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
1980 int_reg);
1981}
1982
1983/**
1984 * pmcraid_get_dump - retrieves IOA dump in case of Unit Check interrupt
1985 *
1986 * @pinstance: pointer to adapter instance structure
1987 *
1988 * Return Value
1989 * none
1990 */
1991static void pmcraid_get_dump(struct pmcraid_instance *pinstance)
1992{
1993 pmcraid_info("%s is not yet implemented\n", __func__);
1994}
1995
1996/**
1997 * pmcraid_fail_outstanding_cmds - Fails all outstanding ops.
1998 * @pinstance: pointer to adapter instance structure
1999 *
2000 * This function fails all outstanding ops. If they are submitted to IOA
2001 * already, it sends cancel all messages if IOA is still accepting IOARCBs,
2002 * otherwise just completes the commands and returns the cmd blocks to free
2003 * pool.
2004 *
2005 * Return value:
2006 * none
2007 */
2008static void pmcraid_fail_outstanding_cmds(struct pmcraid_instance *pinstance)
2009{
2010 struct pmcraid_cmd *cmd, *temp;
2011 unsigned long lock_flags;
2012
2013 /* pending command list is protected by pending_pool_lock. Its
2014 * traversal must be done as within this lock
2015 */
2016 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
2017 list_for_each_entry_safe(cmd, temp, &pinstance->pending_cmd_pool,
2018 free_list) {
2019 list_del(&cmd->free_list);
2020 spin_unlock_irqrestore(&pinstance->pending_pool_lock,
2021 lock_flags);
2022 cmd->ioa_cb->ioasa.ioasc =
2023 cpu_to_le32(PMCRAID_IOASC_IOA_WAS_RESET);
2024 cmd->ioa_cb->ioasa.ilid =
45c80be6 2025 cpu_to_le32(PMCRAID_DRIVER_ILID);
89a36810
AR
2026
2027 /* In case the command timer is still running */
2028 del_timer(&cmd->timer);
2029
2030 /* If this is an IO command, complete it by invoking scsi_done
2031 * function. If this is one of the internal commands other
2032 * than pmcraid_ioa_reset and HCAM commands invoke cmd_done to
2033 * complete it
2034 */
2035 if (cmd->scsi_cmd) {
2036
2037 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2038 __le32 resp = cmd->ioa_cb->ioarcb.response_handle;
2039
2040 scsi_cmd->result |= DID_ERROR << 16;
2041
2042 scsi_dma_unmap(scsi_cmd);
2043 pmcraid_return_cmd(cmd);
2044
89a36810
AR
2045 pmcraid_info("failing(%d) CDB[0] = %x result: %x\n",
2046 le32_to_cpu(resp) >> 2,
2047 cmd->ioa_cb->ioarcb.cdb[0],
2048 scsi_cmd->result);
2049 scsi_cmd->scsi_done(scsi_cmd);
2050 } else if (cmd->cmd_done == pmcraid_internal_done ||
2051 cmd->cmd_done == pmcraid_erp_done) {
2052 cmd->cmd_done(cmd);
c20c4267
AR
2053 } else if (cmd->cmd_done != pmcraid_ioa_reset &&
2054 cmd->cmd_done != pmcraid_ioa_shutdown_done) {
89a36810
AR
2055 pmcraid_return_cmd(cmd);
2056 }
2057
2058 atomic_dec(&pinstance->outstanding_cmds);
2059 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
2060 }
2061
2062 spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
2063}
2064
2065/**
2066 * pmcraid_ioa_reset - Implementation of IOA reset logic
2067 *
2068 * @cmd: pointer to the cmd block to be used for entire reset process
2069 *
2070 * This function executes most of the steps required for IOA reset. This gets
2071 * called by user threads (modprobe/insmod/rmmod) timer, tasklet and midlayer's
25985edc 2072 * 'eh_' thread. Access to variables used for controlling the reset sequence is
89a36810
AR
2073 * synchronized using host lock. Various functions called during reset process
2074 * would make use of a single command block, pointer to which is also stored in
2075 * adapter instance structure.
2076 *
2077 * Return Value
2078 * None
2079 */
2080static void pmcraid_ioa_reset(struct pmcraid_cmd *cmd)
2081{
2082 struct pmcraid_instance *pinstance = cmd->drv_inst;
2083 u8 reset_complete = 0;
2084
2085 pinstance->ioa_reset_in_progress = 1;
2086
2087 if (pinstance->reset_cmd != cmd) {
2088 pmcraid_err("reset is called with different command block\n");
2089 pinstance->reset_cmd = cmd;
2090 }
2091
2092 pmcraid_info("reset_engine: state = %d, command = %p\n",
2093 pinstance->ioa_state, cmd);
2094
2095 switch (pinstance->ioa_state) {
2096
2097 case IOA_STATE_DEAD:
2098 /* If IOA is offline, whatever may be the reset reason, just
2099 * return. callers might be waiting on the reset wait_q, wake
2100 * up them
2101 */
2102 pmcraid_err("IOA is offline no reset is possible\n");
2103 reset_complete = 1;
2104 break;
2105
2106 case IOA_STATE_IN_BRINGDOWN:
2107 /* we enter here, once ioa shutdown command is processed by IOA
2108 * Alert IOA for a possible reset. If reset alert fails, IOA
2109 * goes through hard-reset
2110 */
2111 pmcraid_disable_interrupts(pinstance, ~0);
2112 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
2113 pmcraid_reset_alert(cmd);
2114 break;
2115
2116 case IOA_STATE_UNKNOWN:
2117 /* We may be called during probe or resume. Some pre-processing
2118 * is required for prior to reset
2119 */
2120 scsi_block_requests(pinstance->host);
2121
2122 /* If asked to reset while IOA was processing responses or
2123 * there are any error responses then IOA may require
2124 * hard-reset.
2125 */
2126 if (pinstance->ioa_hard_reset == 0) {
2127 if (ioread32(pinstance->ioa_status) &
2128 INTRS_TRANSITION_TO_OPERATIONAL) {
2129 pmcraid_info("sticky bit set, bring-up\n");
2130 pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
2131 pmcraid_reinit_cmdblk(cmd);
2132 pmcraid_identify_hrrq(cmd);
2133 } else {
2134 pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
2135 pmcraid_soft_reset(cmd);
2136 }
2137 } else {
2138 /* Alert IOA of a possible reset and wait for critical
2139 * operation in progress bit to reset
2140 */
2141 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
2142 pmcraid_reset_alert(cmd);
2143 }
2144 break;
2145
2146 case IOA_STATE_IN_RESET_ALERT:
2147 /* If critical operation in progress bit is reset or wait gets
2148 * timed out, reset proceeds with starting BIST on the IOA.
2149 * pmcraid_ioa_hard_reset keeps a count of reset attempts. If
2150 * they are 3 or more, reset engine marks IOA dead and returns
2151 */
2152 pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
2153 pmcraid_start_bist(cmd);
2154 break;
2155
2156 case IOA_STATE_IN_HARD_RESET:
2157 pinstance->ioa_reset_attempts++;
2158
2159 /* retry reset if we haven't reached maximum allowed limit */
2160 if (pinstance->ioa_reset_attempts > PMCRAID_RESET_ATTEMPTS) {
2161 pinstance->ioa_reset_attempts = 0;
2162 pmcraid_err("IOA didn't respond marking it as dead\n");
2163 pinstance->ioa_state = IOA_STATE_DEAD;
c20c4267
AR
2164
2165 if (pinstance->ioa_bringdown)
2166 pmcraid_notify_ioastate(pinstance,
2167 PMC_DEVICE_EVENT_SHUTDOWN_FAILED);
2168 else
2169 pmcraid_notify_ioastate(pinstance,
2170 PMC_DEVICE_EVENT_RESET_FAILED);
89a36810
AR
2171 reset_complete = 1;
2172 break;
2173 }
2174
2175 /* Once either bist or pci reset is done, restore PCI config
2176 * space. If this fails, proceed with hard reset again
2177 */
1d3c16a8 2178 pci_restore_state(pinstance->pdev);
89a36810
AR
2179
2180 /* fail all pending commands */
2181 pmcraid_fail_outstanding_cmds(pinstance);
2182
2183 /* check if unit check is active, if so extract dump */
2184 if (pinstance->ioa_unit_check) {
2185 pmcraid_info("unit check is active\n");
2186 pinstance->ioa_unit_check = 0;
2187 pmcraid_get_dump(pinstance);
2188 pinstance->ioa_reset_attempts--;
2189 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
2190 pmcraid_reset_alert(cmd);
2191 break;
2192 }
2193
2194 /* if the reset reason is to bring-down the ioa, we might be
2195 * done with the reset restore pci_config_space and complete
2196 * the reset
2197 */
2198 if (pinstance->ioa_bringdown) {
2199 pmcraid_info("bringing down the adapter\n");
2200 pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
2201 pinstance->ioa_bringdown = 0;
2202 pinstance->ioa_state = IOA_STATE_UNKNOWN;
c20c4267
AR
2203 pmcraid_notify_ioastate(pinstance,
2204 PMC_DEVICE_EVENT_SHUTDOWN_SUCCESS);
89a36810
AR
2205 reset_complete = 1;
2206 } else {
2207 /* bring-up IOA, so proceed with soft reset
2208 * Reinitialize hrrq_buffers and their indices also
2209 * enable interrupts after a pci_restore_state
2210 */
2211 if (pmcraid_reset_enable_ioa(pinstance)) {
2212 pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
2213 pmcraid_info("bringing up the adapter\n");
2214 pmcraid_reinit_cmdblk(cmd);
2215 pmcraid_identify_hrrq(cmd);
2216 } else {
2217 pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
2218 pmcraid_soft_reset(cmd);
2219 }
2220 }
2221 break;
2222
2223 case IOA_STATE_IN_SOFT_RESET:
2224 /* TRANSITION TO OPERATIONAL is on so start initialization
2225 * sequence
2226 */
2227 pmcraid_info("In softreset proceeding with bring-up\n");
2228 pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
2229
2230 /* Initialization commands start with HRRQ identification. From
2231 * now on tasklet completes most of the commands as IOA is up
2232 * and intrs are enabled
2233 */
2234 pmcraid_identify_hrrq(cmd);
2235 break;
2236
2237 case IOA_STATE_IN_BRINGUP:
2238 /* we are done with bringing up of IOA, change the ioa_state to
2239 * operational and wake up any waiters
2240 */
2241 pinstance->ioa_state = IOA_STATE_OPERATIONAL;
2242 reset_complete = 1;
2243 break;
2244
2245 case IOA_STATE_OPERATIONAL:
2246 default:
2247 /* When IOA is operational and a reset is requested, check for
2248 * the reset reason. If reset is to bring down IOA, unregister
2249 * HCAMs and initiate shutdown; if adapter reset is forced then
2250 * restart reset sequence again
2251 */
2252 if (pinstance->ioa_shutdown_type == SHUTDOWN_NONE &&
2253 pinstance->force_ioa_reset == 0) {
c20c4267
AR
2254 pmcraid_notify_ioastate(pinstance,
2255 PMC_DEVICE_EVENT_RESET_SUCCESS);
89a36810
AR
2256 reset_complete = 1;
2257 } else {
2258 if (pinstance->ioa_shutdown_type != SHUTDOWN_NONE)
2259 pinstance->ioa_state = IOA_STATE_IN_BRINGDOWN;
2260 pmcraid_reinit_cmdblk(cmd);
2261 pmcraid_unregister_hcams(cmd);
2262 }
2263 break;
2264 }
2265
2266 /* reset will be completed if ioa_state is either DEAD or UNKNOWN or
2267 * OPERATIONAL. Reset all control variables used during reset, wake up
2268 * any waiting threads and let the SCSI mid-layer send commands. Note
2269 * that host_lock must be held before invoking scsi_report_bus_reset.
2270 */
2271 if (reset_complete) {
2272 pinstance->ioa_reset_in_progress = 0;
2273 pinstance->ioa_reset_attempts = 0;
2274 pinstance->reset_cmd = NULL;
2275 pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
2276 pinstance->ioa_bringdown = 0;
2277 pmcraid_return_cmd(cmd);
2278
2279 /* If target state is to bring up the adapter, proceed with
2280 * hcam registration and resource exposure to mid-layer.
2281 */
2282 if (pinstance->ioa_state == IOA_STATE_OPERATIONAL)
2283 pmcraid_register_hcams(pinstance);
2284
2285 wake_up_all(&pinstance->reset_wait_q);
2286 }
2287
2288 return;
2289}
2290
2291/**
2292 * pmcraid_initiate_reset - initiates reset sequence. This is called from
2293 * ISR/tasklet during error interrupts including IOA unit check. If reset
2294 * is already in progress, it just returns, otherwise initiates IOA reset
2295 * to bring IOA up to operational state.
2296 *
2297 * @pinstance: pointer to adapter instance structure
2298 *
2299 * Return value
2300 * none
2301 */
2302static void pmcraid_initiate_reset(struct pmcraid_instance *pinstance)
2303{
2304 struct pmcraid_cmd *cmd;
2305
2306 /* If the reset is already in progress, just return, otherwise start
2307 * reset sequence and return
2308 */
2309 if (!pinstance->ioa_reset_in_progress) {
2310 scsi_block_requests(pinstance->host);
2311 cmd = pmcraid_get_free_cmd(pinstance);
2312
2313 if (cmd == NULL) {
2314 pmcraid_err("no cmnd blocks for initiate_reset\n");
2315 return;
2316 }
2317
2318 pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
2319 pinstance->reset_cmd = cmd;
2320 pinstance->force_ioa_reset = 1;
c20c4267
AR
2321 pmcraid_notify_ioastate(pinstance,
2322 PMC_DEVICE_EVENT_RESET_START);
89a36810
AR
2323 pmcraid_ioa_reset(cmd);
2324 }
2325}
2326
2327/**
2328 * pmcraid_reset_reload - utility routine for doing IOA reset either to bringup
2329 * or bringdown IOA
2330 * @pinstance: pointer adapter instance structure
2331 * @shutdown_type: shutdown type to be used NONE, NORMAL or ABRREV
2332 * @target_state: expected target state after reset
2333 *
2334 * Note: This command initiates reset and waits for its completion. Hence this
2335 * should not be called from isr/timer/tasklet functions (timeout handlers,
2336 * error response handlers and interrupt handlers).
2337 *
2338 * Return Value
2339 * 1 in case ioa_state is not target_state, 0 otherwise.
2340 */
2341static int pmcraid_reset_reload(
2342 struct pmcraid_instance *pinstance,
2343 u8 shutdown_type,
2344 u8 target_state
2345)
2346{
2347 struct pmcraid_cmd *reset_cmd = NULL;
2348 unsigned long lock_flags;
2349 int reset = 1;
2350
2351 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
2352
2353 if (pinstance->ioa_reset_in_progress) {
2354 pmcraid_info("reset_reload: reset is already in progress\n");
2355
2356 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2357
2358 wait_event(pinstance->reset_wait_q,
2359 !pinstance->ioa_reset_in_progress);
2360
2361 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
2362
2363 if (pinstance->ioa_state == IOA_STATE_DEAD) {
89a36810 2364 pmcraid_info("reset_reload: IOA is dead\n");
91402608
CH
2365 goto out_unlock;
2366 }
2367
2368 if (pinstance->ioa_state == target_state) {
89a36810 2369 reset = 0;
91402608 2370 goto out_unlock;
89a36810
AR
2371 }
2372 }
2373
91402608
CH
2374 pmcraid_info("reset_reload: proceeding with reset\n");
2375 scsi_block_requests(pinstance->host);
2376 reset_cmd = pmcraid_get_free_cmd(pinstance);
2377 if (reset_cmd == NULL) {
2378 pmcraid_err("no free cmnd for reset_reload\n");
2379 goto out_unlock;
2380 }
89a36810 2381
91402608
CH
2382 if (shutdown_type == SHUTDOWN_NORMAL)
2383 pinstance->ioa_bringdown = 1;
89a36810 2384
91402608
CH
2385 pinstance->ioa_shutdown_type = shutdown_type;
2386 pinstance->reset_cmd = reset_cmd;
2387 pinstance->force_ioa_reset = reset;
2388 pmcraid_info("reset_reload: initiating reset\n");
2389 pmcraid_ioa_reset(reset_cmd);
2390 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2391 pmcraid_info("reset_reload: waiting for reset to complete\n");
2392 wait_event(pinstance->reset_wait_q,
2393 !pinstance->ioa_reset_in_progress);
89a36810 2394
91402608
CH
2395 pmcraid_info("reset_reload: reset is complete !!\n");
2396 scsi_unblock_requests(pinstance->host);
2397 return pinstance->ioa_state != target_state;
89a36810 2398
91402608
CH
2399out_unlock:
2400 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
89a36810
AR
2401 return reset;
2402}
2403
2404/**
2405 * pmcraid_reset_bringdown - wrapper over pmcraid_reset_reload to bringdown IOA
2406 *
2407 * @pinstance: pointer to adapter instance structure
2408 *
2409 * Return Value
2410 * whatever is returned from pmcraid_reset_reload
2411 */
2412static int pmcraid_reset_bringdown(struct pmcraid_instance *pinstance)
2413{
2414 return pmcraid_reset_reload(pinstance,
2415 SHUTDOWN_NORMAL,
2416 IOA_STATE_UNKNOWN);
2417}
2418
2419/**
2420 * pmcraid_reset_bringup - wrapper over pmcraid_reset_reload to bring up IOA
2421 *
2422 * @pinstance: pointer to adapter instance structure
2423 *
2424 * Return Value
2425 * whatever is returned from pmcraid_reset_reload
2426 */
2427static int pmcraid_reset_bringup(struct pmcraid_instance *pinstance)
2428{
c20c4267
AR
2429 pmcraid_notify_ioastate(pinstance, PMC_DEVICE_EVENT_RESET_START);
2430
89a36810
AR
2431 return pmcraid_reset_reload(pinstance,
2432 SHUTDOWN_NONE,
2433 IOA_STATE_OPERATIONAL);
2434}
2435
2436/**
2437 * pmcraid_request_sense - Send request sense to a device
2438 * @cmd: pmcraid command struct
2439 *
2440 * This function sends a request sense to a device as a result of a check
2441 * condition. This method re-uses the same command block that failed earlier.
2442 */
2443static void pmcraid_request_sense(struct pmcraid_cmd *cmd)
2444{
2445 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
2446 struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
2447
2448 /* allocate DMAable memory for sense buffers */
2449 cmd->sense_buffer = pci_alloc_consistent(cmd->drv_inst->pdev,
2450 SCSI_SENSE_BUFFERSIZE,
2451 &cmd->sense_buffer_dma);
2452
2453 if (cmd->sense_buffer == NULL) {
2454 pmcraid_err
2455 ("couldn't allocate sense buffer for request sense\n");
2456 pmcraid_erp_done(cmd);
2457 return;
2458 }
2459
2460 /* re-use the command block */
2461 memset(&cmd->ioa_cb->ioasa, 0, sizeof(struct pmcraid_ioasa));
2462 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
2463 ioarcb->request_flags0 = (SYNC_COMPLETE |
2464 NO_LINK_DESCS |
2465 INHIBIT_UL_CHECK);
2466 ioarcb->request_type = REQ_TYPE_SCSI;
2467 ioarcb->cdb[0] = REQUEST_SENSE;
2468 ioarcb->cdb[4] = SCSI_SENSE_BUFFERSIZE;
2469
2470 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
2471 offsetof(struct pmcraid_ioarcb,
2472 add_data.u.ioadl[0]));
2473 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
2474
2475 ioarcb->data_transfer_length = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
2476
2477 ioadl->address = cpu_to_le64(cmd->sense_buffer_dma);
2478 ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
88197966 2479 ioadl->flags = IOADL_FLAGS_LAST_DESC;
89a36810
AR
2480
2481 /* request sense might be called as part of error response processing
2482 * which runs in tasklets context. It is possible that mid-layer might
2483 * schedule queuecommand during this time, hence, writting to IOARRIN
2484 * must be protect by host_lock
2485 */
2486 pmcraid_send_cmd(cmd, pmcraid_erp_done,
2487 PMCRAID_REQUEST_SENSE_TIMEOUT,
2488 pmcraid_timeout_handler);
2489}
2490
2491/**
2492 * pmcraid_cancel_all - cancel all outstanding IOARCBs as part of error recovery
2493 * @cmd: command that failed
2494 * @sense: true if request_sense is required after cancel all
2495 *
2496 * This function sends a cancel all to a device to clear the queue.
2497 */
2498static void pmcraid_cancel_all(struct pmcraid_cmd *cmd, u32 sense)
2499{
2500 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2501 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
2502 struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
2503 void (*cmd_done) (struct pmcraid_cmd *) = sense ? pmcraid_erp_done
2504 : pmcraid_request_sense;
2505
2506 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
2507 ioarcb->request_flags0 = SYNC_OVERRIDE;
2508 ioarcb->request_type = REQ_TYPE_IOACMD;
2509 ioarcb->cdb[0] = PMCRAID_CANCEL_ALL_REQUESTS;
2510
2511 if (RES_IS_GSCSI(res->cfg_entry))
2512 ioarcb->cdb[1] = PMCRAID_SYNC_COMPLETE_AFTER_CANCEL;
2513
2514 ioarcb->ioadl_bus_addr = 0;
2515 ioarcb->ioadl_length = 0;
2516 ioarcb->data_transfer_length = 0;
45c80be6 2517 ioarcb->ioarcb_bus_addr &= cpu_to_le64((~0x1FULL));
89a36810
AR
2518
2519 /* writing to IOARRIN must be protected by host_lock, as mid-layer
2520 * schedule queuecommand while we are doing this
2521 */
2522 pmcraid_send_cmd(cmd, cmd_done,
2523 PMCRAID_REQUEST_SENSE_TIMEOUT,
2524 pmcraid_timeout_handler);
2525}
2526
2527/**
2528 * pmcraid_frame_auto_sense: frame fixed format sense information
2529 *
2530 * @cmd: pointer to failing command block
2531 *
2532 * Return value
2533 * none
2534 */
2535static void pmcraid_frame_auto_sense(struct pmcraid_cmd *cmd)
2536{
2537 u8 *sense_buf = cmd->scsi_cmd->sense_buffer;
2538 struct pmcraid_resource_entry *res = cmd->scsi_cmd->device->hostdata;
2539 struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
2540 u32 ioasc = le32_to_cpu(ioasa->ioasc);
2541 u32 failing_lba = 0;
2542
2543 memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
2544 cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
2545
2546 if (RES_IS_VSET(res->cfg_entry) &&
2547 ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC &&
2548 ioasa->u.vset.failing_lba_hi != 0) {
2549
2550 sense_buf[0] = 0x72;
2551 sense_buf[1] = PMCRAID_IOASC_SENSE_KEY(ioasc);
2552 sense_buf[2] = PMCRAID_IOASC_SENSE_CODE(ioasc);
2553 sense_buf[3] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
2554
2555 sense_buf[7] = 12;
2556 sense_buf[8] = 0;
2557 sense_buf[9] = 0x0A;
2558 sense_buf[10] = 0x80;
2559
2560 failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_hi);
2561
2562 sense_buf[12] = (failing_lba & 0xff000000) >> 24;
2563 sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
2564 sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
2565 sense_buf[15] = failing_lba & 0x000000ff;
2566
2567 failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_lo);
2568
2569 sense_buf[16] = (failing_lba & 0xff000000) >> 24;
2570 sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
2571 sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
2572 sense_buf[19] = failing_lba & 0x000000ff;
2573 } else {
2574 sense_buf[0] = 0x70;
2575 sense_buf[2] = PMCRAID_IOASC_SENSE_KEY(ioasc);
2576 sense_buf[12] = PMCRAID_IOASC_SENSE_CODE(ioasc);
2577 sense_buf[13] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
2578
2579 if (ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC) {
2580 if (RES_IS_VSET(res->cfg_entry))
2581 failing_lba =
2582 le32_to_cpu(ioasa->u.
2583 vset.failing_lba_lo);
2584 sense_buf[0] |= 0x80;
2585 sense_buf[3] = (failing_lba >> 24) & 0xff;
2586 sense_buf[4] = (failing_lba >> 16) & 0xff;
2587 sense_buf[5] = (failing_lba >> 8) & 0xff;
2588 sense_buf[6] = failing_lba & 0xff;
2589 }
2590
2591 sense_buf[7] = 6; /* additional length */
2592 }
2593}
2594
2595/**
2596 * pmcraid_error_handler - Error response handlers for a SCSI op
2597 * @cmd: pointer to pmcraid_cmd that has failed
2598 *
2599 * This function determines whether or not to initiate ERP on the affected
2600 * device. This is called from a tasklet, which doesn't hold any locks.
2601 *
2602 * Return value:
2603 * 0 it caller can complete the request, otherwise 1 where in error
2604 * handler itself completes the request and returns the command block
2605 * back to free-pool
2606 */
2607static int pmcraid_error_handler(struct pmcraid_cmd *cmd)
2608{
2609 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2610 struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
2611 struct pmcraid_instance *pinstance = cmd->drv_inst;
2612 struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
2613 u32 ioasc = le32_to_cpu(ioasa->ioasc);
2614 u32 masked_ioasc = ioasc & PMCRAID_IOASC_SENSE_MASK;
2615 u32 sense_copied = 0;
2616
2617 if (!res) {
2618 pmcraid_info("resource pointer is NULL\n");
2619 return 0;
2620 }
2621
2622 /* If this was a SCSI read/write command keep count of errors */
2623 if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_READ_CMD)
2624 atomic_inc(&res->read_failures);
2625 else if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_WRITE_CMD)
2626 atomic_inc(&res->write_failures);
2627
2628 if (!RES_IS_GSCSI(res->cfg_entry) &&
2629 masked_ioasc != PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR) {
2630 pmcraid_frame_auto_sense(cmd);
2631 }
2632
2633 /* Log IOASC/IOASA information based on user settings */
2634 pmcraid_ioasc_logger(ioasc, cmd);
2635
2636 switch (masked_ioasc) {
2637
2638 case PMCRAID_IOASC_AC_TERMINATED_BY_HOST:
2639 scsi_cmd->result |= (DID_ABORT << 16);
2640 break;
2641
2642 case PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE:
2643 case PMCRAID_IOASC_HW_CANNOT_COMMUNICATE:
2644 scsi_cmd->result |= (DID_NO_CONNECT << 16);
2645 break;
2646
2647 case PMCRAID_IOASC_NR_SYNC_REQUIRED:
2648 res->sync_reqd = 1;
2649 scsi_cmd->result |= (DID_IMM_RETRY << 16);
2650 break;
2651
2652 case PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC:
2653 scsi_cmd->result |= (DID_PASSTHROUGH << 16);
2654 break;
2655
2656 case PMCRAID_IOASC_UA_BUS_WAS_RESET:
2657 case PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER:
2658 if (!res->reset_progress)
2659 scsi_report_bus_reset(pinstance->host,
2660 scsi_cmd->device->channel);
2661 scsi_cmd->result |= (DID_ERROR << 16);
2662 break;
2663
2664 case PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR:
2665 scsi_cmd->result |= PMCRAID_IOASC_SENSE_STATUS(ioasc);
2666 res->sync_reqd = 1;
2667
2668 /* if check_condition is not active return with error otherwise
2669 * get/frame the sense buffer
2670 */
2671 if (PMCRAID_IOASC_SENSE_STATUS(ioasc) !=
2672 SAM_STAT_CHECK_CONDITION &&
2673 PMCRAID_IOASC_SENSE_STATUS(ioasc) != SAM_STAT_ACA_ACTIVE)
2674 return 0;
2675
2676 /* If we have auto sense data as part of IOASA pass it to
2677 * mid-layer
2678 */
2679 if (ioasa->auto_sense_length != 0) {
45c80be6
AB
2680 short sense_len = le16_to_cpu(ioasa->auto_sense_length);
2681 int data_size = min_t(u16, sense_len,
89a36810
AR
2682 SCSI_SENSE_BUFFERSIZE);
2683
2684 memcpy(scsi_cmd->sense_buffer,
2685 ioasa->sense_data,
2686 data_size);
2687 sense_copied = 1;
2688 }
2689
a70757ba 2690 if (RES_IS_GSCSI(res->cfg_entry))
89a36810 2691 pmcraid_cancel_all(cmd, sense_copied);
a70757ba 2692 else if (sense_copied)
89a36810 2693 pmcraid_erp_done(cmd);
a70757ba 2694 else
89a36810 2695 pmcraid_request_sense(cmd);
89a36810
AR
2696
2697 return 1;
2698
2699 case PMCRAID_IOASC_NR_INIT_CMD_REQUIRED:
2700 break;
2701
2702 default:
2703 if (PMCRAID_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
2704 scsi_cmd->result |= (DID_ERROR << 16);
2705 break;
2706 }
2707 return 0;
2708}
2709
2710/**
2711 * pmcraid_reset_device - device reset handler functions
2712 *
2713 * @scsi_cmd: scsi command struct
2714 * @modifier: reset modifier indicating the reset sequence to be performed
2715 *
2716 * This function issues a device reset to the affected device.
2717 * A LUN reset will be sent to the device first. If that does
2718 * not work, a target reset will be sent.
2719 *
2720 * Return value:
2721 * SUCCESS / FAILED
2722 */
2723static int pmcraid_reset_device(
2724 struct scsi_cmnd *scsi_cmd,
2725 unsigned long timeout,
2726 u8 modifier
2727)
2728{
2729 struct pmcraid_cmd *cmd;
2730 struct pmcraid_instance *pinstance;
2731 struct pmcraid_resource_entry *res;
2732 struct pmcraid_ioarcb *ioarcb;
2733 unsigned long lock_flags;
2734 u32 ioasc;
2735
2736 pinstance =
2737 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
2738 res = scsi_cmd->device->hostdata;
2739
2740 if (!res) {
34876402
AR
2741 sdev_printk(KERN_ERR, scsi_cmd->device,
2742 "reset_device: NULL resource pointer\n");
89a36810
AR
2743 return FAILED;
2744 }
2745
2746 /* If adapter is currently going through reset/reload, return failed.
2747 * This will force the mid-layer to call _eh_bus/host reset, which
2748 * will then go to sleep and wait for the reset to complete
2749 */
2750 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
2751 if (pinstance->ioa_reset_in_progress ||
2752 pinstance->ioa_state == IOA_STATE_DEAD) {
2753 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2754 return FAILED;
2755 }
2756
2757 res->reset_progress = 1;
2758 pmcraid_info("Resetting %s resource with addr %x\n",
2759 ((modifier & RESET_DEVICE_LUN) ? "LUN" :
2760 ((modifier & RESET_DEVICE_TARGET) ? "TARGET" : "BUS")),
2761 le32_to_cpu(res->cfg_entry.resource_address));
2762
2763 /* get a free cmd block */
2764 cmd = pmcraid_get_free_cmd(pinstance);
2765
2766 if (cmd == NULL) {
2767 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2768 pmcraid_err("%s: no cmd blocks are available\n", __func__);
2769 return FAILED;
2770 }
2771
2772 ioarcb = &cmd->ioa_cb->ioarcb;
2773 ioarcb->resource_handle = res->cfg_entry.resource_handle;
2774 ioarcb->request_type = REQ_TYPE_IOACMD;
2775 ioarcb->cdb[0] = PMCRAID_RESET_DEVICE;
2776
2777 /* Initialize reset modifier bits */
2778 if (modifier)
2779 modifier = ENABLE_RESET_MODIFIER | modifier;
2780
2781 ioarcb->cdb[1] = modifier;
2782
2783 init_completion(&cmd->wait_for_completion);
2784 cmd->completion_req = 1;
2785
2786 pmcraid_info("cmd(CDB[0] = %x) for %x with index = %d\n",
2787 cmd->ioa_cb->ioarcb.cdb[0],
2788 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle),
2789 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2);
2790
2791 pmcraid_send_cmd(cmd,
2792 pmcraid_internal_done,
2793 timeout,
2794 pmcraid_timeout_handler);
2795
2796 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2797
2798 /* RESET_DEVICE command completes after all pending IOARCBs are
2799 * completed. Once this command is completed, pmcraind_internal_done
2800 * will wake up the 'completion' queue.
2801 */
2802 wait_for_completion(&cmd->wait_for_completion);
2803
2804 /* complete the command here itself and return the command block
2805 * to free list
2806 */
2807 pmcraid_return_cmd(cmd);
2808 res->reset_progress = 0;
2809 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
2810
2811 /* set the return value based on the returned ioasc */
2812 return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
2813}
2814
2815/**
2816 * _pmcraid_io_done - helper for pmcraid_io_done function
2817 *
2818 * @cmd: pointer to pmcraid command struct
2819 * @reslen: residual data length to be set in the ioasa
2820 * @ioasc: ioasc either returned by IOA or set by driver itself.
2821 *
2822 * This function is invoked by pmcraid_io_done to complete mid-layer
2823 * scsi ops.
2824 *
2825 * Return value:
2826 * 0 if caller is required to return it to free_pool. Returns 1 if
2827 * caller need not worry about freeing command block as error handler
2828 * will take care of that.
2829 */
2830
2831static int _pmcraid_io_done(struct pmcraid_cmd *cmd, int reslen, int ioasc)
2832{
2833 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2834 int rc = 0;
2835
2836 scsi_set_resid(scsi_cmd, reslen);
2837
2838 pmcraid_info("response(%d) CDB[0] = %x ioasc:result: %x:%x\n",
2839 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
2840 cmd->ioa_cb->ioarcb.cdb[0],
2841 ioasc, scsi_cmd->result);
2842
2843 if (PMCRAID_IOASC_SENSE_KEY(ioasc) != 0)
2844 rc = pmcraid_error_handler(cmd);
2845
2846 if (rc == 0) {
2847 scsi_dma_unmap(scsi_cmd);
2848 scsi_cmd->scsi_done(scsi_cmd);
2849 }
2850
2851 return rc;
2852}
2853
2854/**
2855 * pmcraid_io_done - SCSI completion function
2856 *
2857 * @cmd: pointer to pmcraid command struct
2858 *
2859 * This function is invoked by tasklet/mid-layer error handler to completing
2860 * the SCSI ops sent from mid-layer.
2861 *
2862 * Return value
2863 * none
2864 */
2865
2866static void pmcraid_io_done(struct pmcraid_cmd *cmd)
2867{
2868 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
2869 u32 reslen = le32_to_cpu(cmd->ioa_cb->ioasa.residual_data_length);
2870
2871 if (_pmcraid_io_done(cmd, reslen, ioasc) == 0)
2872 pmcraid_return_cmd(cmd);
2873}
2874
2875/**
2876 * pmcraid_abort_cmd - Aborts a single IOARCB already submitted to IOA
2877 *
2878 * @cmd: command block of the command to be aborted
2879 *
2880 * Return Value:
2881 * returns pointer to command structure used as cancelling cmd
2882 */
2883static struct pmcraid_cmd *pmcraid_abort_cmd(struct pmcraid_cmd *cmd)
2884{
2885 struct pmcraid_cmd *cancel_cmd;
2886 struct pmcraid_instance *pinstance;
2887 struct pmcraid_resource_entry *res;
2888
2889 pinstance = (struct pmcraid_instance *)cmd->drv_inst;
2890 res = cmd->scsi_cmd->device->hostdata;
2891
2892 cancel_cmd = pmcraid_get_free_cmd(pinstance);
2893
2894 if (cancel_cmd == NULL) {
2895 pmcraid_err("%s: no cmd blocks are available\n", __func__);
2896 return NULL;
2897 }
2898
2899 pmcraid_prepare_cancel_cmd(cancel_cmd, cmd);
2900
2901 pmcraid_info("aborting command CDB[0]= %x with index = %d\n",
2902 cmd->ioa_cb->ioarcb.cdb[0],
45c80be6 2903 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2);
89a36810
AR
2904
2905 init_completion(&cancel_cmd->wait_for_completion);
2906 cancel_cmd->completion_req = 1;
2907
2908 pmcraid_info("command (%d) CDB[0] = %x for %x\n",
2909 le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.response_handle) >> 2,
c20c4267 2910 cancel_cmd->ioa_cb->ioarcb.cdb[0],
89a36810
AR
2911 le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.resource_handle));
2912
2913 pmcraid_send_cmd(cancel_cmd,
2914 pmcraid_internal_done,
2915 PMCRAID_INTERNAL_TIMEOUT,
2916 pmcraid_timeout_handler);
2917 return cancel_cmd;
2918}
2919
2920/**
2921 * pmcraid_abort_complete - Waits for ABORT TASK completion
2922 *
2923 * @cancel_cmd: command block use as cancelling command
2924 *
2925 * Return Value:
2926 * returns SUCCESS if ABORT TASK has good completion
2927 * otherwise FAILED
2928 */
2929static int pmcraid_abort_complete(struct pmcraid_cmd *cancel_cmd)
2930{
2931 struct pmcraid_resource_entry *res;
2932 u32 ioasc;
2933
2934 wait_for_completion(&cancel_cmd->wait_for_completion);
c20c4267
AR
2935 res = cancel_cmd->res;
2936 cancel_cmd->res = NULL;
89a36810
AR
2937 ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc);
2938
2939 /* If the abort task is not timed out we will get a Good completion
2940 * as sense_key, otherwise we may get one the following responses
25985edc 2941 * due to subsequent bus reset or device reset. In case IOASC is
89a36810
AR
2942 * NR_SYNC_REQUIRED, set sync_reqd flag for the corresponding resource
2943 */
2944 if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
2945 ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) {
2946 if (ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED)
2947 res->sync_reqd = 1;
2948 ioasc = 0;
2949 }
2950
2951 /* complete the command here itself */
2952 pmcraid_return_cmd(cancel_cmd);
2953 return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
2954}
2955
2956/**
2957 * pmcraid_eh_abort_handler - entry point for aborting a single task on errors
2958 *
2959 * @scsi_cmd: scsi command struct given by mid-layer. When this is called
2960 * mid-layer ensures that no other commands are queued. This
2961 * never gets called under interrupt, but a separate eh thread.
2962 *
2963 * Return value:
2964 * SUCCESS / FAILED
2965 */
2966static int pmcraid_eh_abort_handler(struct scsi_cmnd *scsi_cmd)
2967{
2968 struct pmcraid_instance *pinstance;
2969 struct pmcraid_cmd *cmd;
2970 struct pmcraid_resource_entry *res;
2971 unsigned long host_lock_flags;
2972 unsigned long pending_lock_flags;
2973 struct pmcraid_cmd *cancel_cmd = NULL;
2974 int cmd_found = 0;
2975 int rc = FAILED;
2976
2977 pinstance =
2978 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
2979
34876402
AR
2980 scmd_printk(KERN_INFO, scsi_cmd,
2981 "I/O command timed out, aborting it.\n");
89a36810
AR
2982
2983 res = scsi_cmd->device->hostdata;
2984
2985 if (res == NULL)
2986 return rc;
2987
2988 /* If we are currently going through reset/reload, return failed.
2989 * This will force the mid-layer to eventually call
2990 * pmcraid_eh_host_reset which will then go to sleep and wait for the
2991 * reset to complete
2992 */
2993 spin_lock_irqsave(pinstance->host->host_lock, host_lock_flags);
2994
2995 if (pinstance->ioa_reset_in_progress ||
2996 pinstance->ioa_state == IOA_STATE_DEAD) {
2997 spin_unlock_irqrestore(pinstance->host->host_lock,
2998 host_lock_flags);
2999 return rc;
3000 }
3001
3002 /* loop over pending cmd list to find cmd corresponding to this
3003 * scsi_cmd. Note that this command might not have been completed
3004 * already. locking: all pending commands are protected with
3005 * pending_pool_lock.
3006 */
3007 spin_lock_irqsave(&pinstance->pending_pool_lock, pending_lock_flags);
3008 list_for_each_entry(cmd, &pinstance->pending_cmd_pool, free_list) {
3009
3010 if (cmd->scsi_cmd == scsi_cmd) {
3011 cmd_found = 1;
3012 break;
3013 }
3014 }
3015
3016 spin_unlock_irqrestore(&pinstance->pending_pool_lock,
3017 pending_lock_flags);
3018
3019 /* If the command to be aborted was given to IOA and still pending with
3020 * it, send ABORT_TASK to abort this and wait for its completion
3021 */
3022 if (cmd_found)
3023 cancel_cmd = pmcraid_abort_cmd(cmd);
3024
3025 spin_unlock_irqrestore(pinstance->host->host_lock,
3026 host_lock_flags);
3027
3028 if (cancel_cmd) {
c20c4267 3029 cancel_cmd->res = cmd->scsi_cmd->device->hostdata;
89a36810
AR
3030 rc = pmcraid_abort_complete(cancel_cmd);
3031 }
3032
3033 return cmd_found ? rc : SUCCESS;
3034}
3035
3036/**
3037 * pmcraid_eh_xxxx_reset_handler - bus/target/device reset handler callbacks
3038 *
3039 * @scmd: pointer to scsi_cmd that was sent to the resource to be reset.
3040 *
3041 * All these routines invokve pmcraid_reset_device with appropriate parameters.
3042 * Since these are called from mid-layer EH thread, no other IO will be queued
3043 * to the resource being reset. However, control path (IOCTL) may be active so
3044 * it is necessary to synchronize IOARRIN writes which pmcraid_reset_device
3045 * takes care by locking/unlocking host_lock.
3046 *
3047 * Return value
c20c4267 3048 * SUCCESS or FAILED
89a36810
AR
3049 */
3050static int pmcraid_eh_device_reset_handler(struct scsi_cmnd *scmd)
3051{
34876402
AR
3052 scmd_printk(KERN_INFO, scmd,
3053 "resetting device due to an I/O command timeout.\n");
89a36810
AR
3054 return pmcraid_reset_device(scmd,
3055 PMCRAID_INTERNAL_TIMEOUT,
3056 RESET_DEVICE_LUN);
3057}
3058
3059static int pmcraid_eh_bus_reset_handler(struct scsi_cmnd *scmd)
3060{
34876402
AR
3061 scmd_printk(KERN_INFO, scmd,
3062 "Doing bus reset due to an I/O command timeout.\n");
89a36810
AR
3063 return pmcraid_reset_device(scmd,
3064 PMCRAID_RESET_BUS_TIMEOUT,
3065 RESET_DEVICE_BUS);
3066}
3067
3068static int pmcraid_eh_target_reset_handler(struct scsi_cmnd *scmd)
3069{
34876402
AR
3070 scmd_printk(KERN_INFO, scmd,
3071 "Doing target reset due to an I/O command timeout.\n");
89a36810
AR
3072 return pmcraid_reset_device(scmd,
3073 PMCRAID_INTERNAL_TIMEOUT,
3074 RESET_DEVICE_TARGET);
3075}
3076
3077/**
3078 * pmcraid_eh_host_reset_handler - adapter reset handler callback
3079 *
3080 * @scmd: pointer to scsi_cmd that was sent to a resource of adapter
3081 *
3082 * Initiates adapter reset to bring it up to operational state
3083 *
3084 * Return value
c20c4267 3085 * SUCCESS or FAILED
89a36810
AR
3086 */
3087static int pmcraid_eh_host_reset_handler(struct scsi_cmnd *scmd)
3088{
3089 unsigned long interval = 10000; /* 10 seconds interval */
3090 int waits = jiffies_to_msecs(PMCRAID_RESET_HOST_TIMEOUT) / interval;
3091 struct pmcraid_instance *pinstance =
3092 (struct pmcraid_instance *)(scmd->device->host->hostdata);
3093
3094
3095 /* wait for an additional 150 seconds just in case firmware could come
3096 * up and if it could complete all the pending commands excluding the
3097 * two HCAM (CCN and LDN).
3098 */
3099 while (waits--) {
3100 if (atomic_read(&pinstance->outstanding_cmds) <=
3101 PMCRAID_MAX_HCAM_CMD)
3102 return SUCCESS;
3103 msleep(interval);
3104 }
3105
3106 dev_err(&pinstance->pdev->dev,
3107 "Adapter being reset due to an I/O command timeout.\n");
3108 return pmcraid_reset_bringup(pinstance) == 0 ? SUCCESS : FAILED;
3109}
3110
89a36810
AR
3111/**
3112 * pmcraid_init_ioadls - initializes IOADL related fields in IOARCB
3113 * @cmd: pmcraid command struct
3114 * @sgcount: count of scatter-gather elements
3115 *
3116 * Return value
3117 * returns pointer pmcraid_ioadl_desc, initialized to point to internal
3118 * or external IOADLs
3119 */
61b96d5b 3120static struct pmcraid_ioadl_desc *
89a36810
AR
3121pmcraid_init_ioadls(struct pmcraid_cmd *cmd, int sgcount)
3122{
3123 struct pmcraid_ioadl_desc *ioadl;
3124 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
3125 int ioadl_count = 0;
3126
3127 if (ioarcb->add_cmd_param_length)
45c80be6
AB
3128 ioadl_count = DIV_ROUND_UP(le16_to_cpu(ioarcb->add_cmd_param_length), 16);
3129 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc) * sgcount);
89a36810
AR
3130
3131 if ((sgcount + ioadl_count) > (ARRAY_SIZE(ioarcb->add_data.u.ioadl))) {
3132 /* external ioadls start at offset 0x80 from control_block
3133 * structure, re-using 24 out of 27 ioadls part of IOARCB.
3134 * It is necessary to indicate to firmware that driver is
3135 * using ioadls to be treated as external to IOARCB.
3136 */
45c80be6 3137 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
89a36810
AR
3138 ioarcb->ioadl_bus_addr =
3139 cpu_to_le64((cmd->ioa_cb_bus_addr) +
3140 offsetof(struct pmcraid_ioarcb,
3141 add_data.u.ioadl[3]));
3142 ioadl = &ioarcb->add_data.u.ioadl[3];
3143 } else {
3144 ioarcb->ioadl_bus_addr =
3145 cpu_to_le64((cmd->ioa_cb_bus_addr) +
3146 offsetof(struct pmcraid_ioarcb,
3147 add_data.u.ioadl[ioadl_count]));
3148
3149 ioadl = &ioarcb->add_data.u.ioadl[ioadl_count];
3150 ioarcb->ioarcb_bus_addr |=
45c80be6 3151 cpu_to_le64(DIV_ROUND_CLOSEST(sgcount + ioadl_count, 8));
89a36810
AR
3152 }
3153
3154 return ioadl;
3155}
3156
3157/**
3158 * pmcraid_build_ioadl - Build a scatter/gather list and map the buffer
3159 * @pinstance: pointer to adapter instance structure
3160 * @cmd: pmcraid command struct
3161 *
3162 * This function is invoked by queuecommand entry point while sending a command
3163 * to firmware. This builds ioadl descriptors and sets up ioarcb fields.
3164 *
3165 * Return value:
c20c4267 3166 * 0 on success or -1 on failure
89a36810
AR
3167 */
3168static int pmcraid_build_ioadl(
3169 struct pmcraid_instance *pinstance,
3170 struct pmcraid_cmd *cmd
3171)
3172{
3173 int i, nseg;
3174 struct scatterlist *sglist;
3175
3176 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
3177 struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
b22ee87d 3178 struct pmcraid_ioadl_desc *ioadl;
89a36810
AR
3179
3180 u32 length = scsi_bufflen(scsi_cmd);
3181
3182 if (!length)
3183 return 0;
3184
3185 nseg = scsi_dma_map(scsi_cmd);
3186
3187 if (nseg < 0) {
34876402 3188 scmd_printk(KERN_ERR, scsi_cmd, "scsi_map_dma failed!\n");
89a36810
AR
3189 return -1;
3190 } else if (nseg > PMCRAID_MAX_IOADLS) {
3191 scsi_dma_unmap(scsi_cmd);
34876402 3192 scmd_printk(KERN_ERR, scsi_cmd,
89a36810
AR
3193 "sg count is (%d) more than allowed!\n", nseg);
3194 return -1;
3195 }
3196
3197 /* Initialize IOARCB data transfer length fields */
3198 if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE)
3199 ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
3200
3201 ioarcb->request_flags0 |= NO_LINK_DESCS;
3202 ioarcb->data_transfer_length = cpu_to_le32(length);
3203 ioadl = pmcraid_init_ioadls(cmd, nseg);
3204
3205 /* Initialize IOADL descriptor addresses */
3206 scsi_for_each_sg(scsi_cmd, sglist, nseg, i) {
3207 ioadl[i].data_len = cpu_to_le32(sg_dma_len(sglist));
3208 ioadl[i].address = cpu_to_le64(sg_dma_address(sglist));
3209 ioadl[i].flags = 0;
3210 }
3211 /* setup last descriptor */
88197966 3212 ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
89a36810
AR
3213
3214 return 0;
3215}
3216
3217/**
3218 * pmcraid_free_sglist - Frees an allocated SG buffer list
3219 * @sglist: scatter/gather list pointer
3220 *
3221 * Free a DMA'able memory previously allocated with pmcraid_alloc_sglist
3222 *
3223 * Return value:
c20c4267 3224 * none
89a36810
AR
3225 */
3226static void pmcraid_free_sglist(struct pmcraid_sglist *sglist)
3227{
ed4414ce 3228 sgl_free_order(sglist->scatterlist, sglist->order);
89a36810
AR
3229 kfree(sglist);
3230}
3231
3232/**
3233 * pmcraid_alloc_sglist - Allocates memory for a SG list
3234 * @buflen: buffer length
3235 *
3236 * Allocates a DMA'able buffer in chunks and assembles a scatter/gather
3237 * list.
3238 *
3239 * Return value
c20c4267 3240 * pointer to sglist / NULL on failure
89a36810
AR
3241 */
3242static struct pmcraid_sglist *pmcraid_alloc_sglist(int buflen)
3243{
3244 struct pmcraid_sglist *sglist;
89a36810
AR
3245 int sg_size;
3246 int order;
89a36810
AR
3247
3248 sg_size = buflen / (PMCRAID_MAX_IOADLS - 1);
3249 order = (sg_size > 0) ? get_order(sg_size) : 0;
89a36810
AR
3250
3251 /* Allocate a scatter/gather list for the DMA */
ed4414ce 3252 sglist = kzalloc(sizeof(struct pmcraid_sglist), GFP_KERNEL);
89a36810
AR
3253 if (sglist == NULL)
3254 return NULL;
3255
89a36810 3256 sglist->order = order;
ed4414ce
BVA
3257 sgl_alloc_order(buflen, order, false,
3258 GFP_KERNEL | GFP_DMA | __GFP_ZERO, &sglist->num_sg);
89a36810
AR
3259
3260 return sglist;
3261}
3262
3263/**
3264 * pmcraid_copy_sglist - Copy user buffer to kernel buffer's SG list
3265 * @sglist: scatter/gather list pointer
3266 * @buffer: buffer pointer
3267 * @len: buffer length
3268 * @direction: data transfer direction
3269 *
3270 * Copy a user buffer into a buffer allocated by pmcraid_alloc_sglist
3271 *
3272 * Return value:
3273 * 0 on success / other on failure
3274 */
3275static int pmcraid_copy_sglist(
3276 struct pmcraid_sglist *sglist,
3397623b 3277 void __user *buffer,
89a36810
AR
3278 u32 len,
3279 int direction
3280)
3281{
3282 struct scatterlist *scatterlist;
3283 void *kaddr;
3284 int bsize_elem;
3285 int i;
3286 int rc = 0;
3287
3288 /* Determine the actual number of bytes per element */
3289 bsize_elem = PAGE_SIZE * (1 << sglist->order);
3290
3291 scatterlist = sglist->scatterlist;
3292
3293 for (i = 0; i < (len / bsize_elem); i++, buffer += bsize_elem) {
3294 struct page *page = sg_page(&scatterlist[i]);
3295
3296 kaddr = kmap(page);
3297 if (direction == DMA_TO_DEVICE)
edb88cef 3298 rc = copy_from_user(kaddr, buffer, bsize_elem);
89a36810 3299 else
edb88cef 3300 rc = copy_to_user(buffer, kaddr, bsize_elem);
89a36810
AR
3301
3302 kunmap(page);
3303
3304 if (rc) {
3305 pmcraid_err("failed to copy user data into sg list\n");
3306 return -EFAULT;
3307 }
3308
3309 scatterlist[i].length = bsize_elem;
3310 }
3311
3312 if (len % bsize_elem) {
3313 struct page *page = sg_page(&scatterlist[i]);
3314
3315 kaddr = kmap(page);
3316
3317 if (direction == DMA_TO_DEVICE)
edb88cef 3318 rc = copy_from_user(kaddr, buffer, len % bsize_elem);
89a36810 3319 else
edb88cef 3320 rc = copy_to_user(buffer, kaddr, len % bsize_elem);
89a36810
AR
3321
3322 kunmap(page);
3323
3324 scatterlist[i].length = len % bsize_elem;
3325 }
3326
3327 if (rc) {
3328 pmcraid_err("failed to copy user data into sg list\n");
3329 rc = -EFAULT;
3330 }
3331
3332 return rc;
3333}
3334
3335/**
3336 * pmcraid_queuecommand - Queue a mid-layer request
3337 * @scsi_cmd: scsi command struct
3338 * @done: done function
3339 *
3340 * This function queues a request generated by the mid-layer. Midlayer calls
3341 * this routine within host->lock. Some of the functions called by queuecommand
3342 * would use cmd block queue locks (free_pool_lock and pending_pool_lock)
3343 *
3344 * Return value:
3345 * 0 on success
3346 * SCSI_MLQUEUE_DEVICE_BUSY if device is busy
3347 * SCSI_MLQUEUE_HOST_BUSY if host is busy
3348 */
f281233d 3349static int pmcraid_queuecommand_lck(
89a36810
AR
3350 struct scsi_cmnd *scsi_cmd,
3351 void (*done) (struct scsi_cmnd *)
3352)
3353{
3354 struct pmcraid_instance *pinstance;
3355 struct pmcraid_resource_entry *res;
3356 struct pmcraid_ioarcb *ioarcb;
3357 struct pmcraid_cmd *cmd;
c20c4267 3358 u32 fw_version;
89a36810
AR
3359 int rc = 0;
3360
3361 pinstance =
3362 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
c20c4267 3363 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
89a36810
AR
3364 scsi_cmd->scsi_done = done;
3365 res = scsi_cmd->device->hostdata;
3366 scsi_cmd->result = (DID_OK << 16);
3367
3368 /* if adapter is marked as dead, set result to DID_NO_CONNECT complete
3369 * the command
3370 */
3371 if (pinstance->ioa_state == IOA_STATE_DEAD) {
3372 pmcraid_info("IOA is dead, but queuecommand is scheduled\n");
3373 scsi_cmd->result = (DID_NO_CONNECT << 16);
3374 scsi_cmd->scsi_done(scsi_cmd);
3375 return 0;
3376 }
3377
3378 /* If IOA reset is in progress, can't queue the commands */
3379 if (pinstance->ioa_reset_in_progress)
3380 return SCSI_MLQUEUE_HOST_BUSY;
3381
c20c4267
AR
3382 /* Firmware doesn't support SYNCHRONIZE_CACHE command (0x35), complete
3383 * the command here itself with success return
3384 */
3385 if (scsi_cmd->cmnd[0] == SYNCHRONIZE_CACHE) {
3386 pmcraid_info("SYNC_CACHE(0x35), completing in driver itself\n");
3387 scsi_cmd->scsi_done(scsi_cmd);
3388 return 0;
3389 }
3390
89a36810
AR
3391 /* initialize the command and IOARCB to be sent to IOA */
3392 cmd = pmcraid_get_free_cmd(pinstance);
3393
3394 if (cmd == NULL) {
3395 pmcraid_err("free command block is not available\n");
3396 return SCSI_MLQUEUE_HOST_BUSY;
3397 }
3398
3399 cmd->scsi_cmd = scsi_cmd;
3400 ioarcb = &(cmd->ioa_cb->ioarcb);
3401 memcpy(ioarcb->cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
3402 ioarcb->resource_handle = res->cfg_entry.resource_handle;
3403 ioarcb->request_type = REQ_TYPE_SCSI;
3404
c20c4267
AR
3405 /* set hrrq number where the IOA should respond to. Note that all cmds
3406 * generated internally uses hrrq_id 0, exception to this is the cmd
3407 * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses
3408 * hrrq_id assigned here in queuecommand
3409 */
3410 ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
3411 pinstance->num_hrrq;
89a36810
AR
3412 cmd->cmd_done = pmcraid_io_done;
3413
3414 if (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry)) {
3415 if (scsi_cmd->underflow == 0)
3416 ioarcb->request_flags0 |= INHIBIT_UL_CHECK;
3417
3418 if (res->sync_reqd) {
3419 ioarcb->request_flags0 |= SYNC_COMPLETE;
3420 res->sync_reqd = 0;
3421 }
3422
3423 ioarcb->request_flags0 |= NO_LINK_DESCS;
50668633
CH
3424
3425 if (scsi_cmd->flags & SCMD_TAGGED)
3426 ioarcb->request_flags1 |= TASK_TAG_SIMPLE;
89a36810
AR
3427
3428 if (RES_IS_GSCSI(res->cfg_entry))
3429 ioarcb->request_flags1 |= DELAY_AFTER_RESET;
3430 }
3431
3432 rc = pmcraid_build_ioadl(pinstance, cmd);
3433
3434 pmcraid_info("command (%d) CDB[0] = %x for %x:%x:%x:%x\n",
3435 le32_to_cpu(ioarcb->response_handle) >> 2,
3436 scsi_cmd->cmnd[0], pinstance->host->unique_id,
3437 RES_IS_VSET(res->cfg_entry) ? PMCRAID_VSET_BUS_ID :
3438 PMCRAID_PHYS_BUS_ID,
3439 RES_IS_VSET(res->cfg_entry) ?
c20c4267
AR
3440 (fw_version <= PMCRAID_FW_VERSION_1 ?
3441 res->cfg_entry.unique_flags1 :
45c80be6 3442 le16_to_cpu(res->cfg_entry.array_id) & 0xFF) :
89a36810
AR
3443 RES_TARGET(res->cfg_entry.resource_address),
3444 RES_LUN(res->cfg_entry.resource_address));
3445
3446 if (likely(rc == 0)) {
3447 _pmcraid_fire_command(cmd);
3448 } else {
3449 pmcraid_err("queuecommand could not build ioadl\n");
3450 pmcraid_return_cmd(cmd);
3451 rc = SCSI_MLQUEUE_HOST_BUSY;
3452 }
3453
3454 return rc;
3455}
3456
f281233d
JG
3457static DEF_SCSI_QCMD(pmcraid_queuecommand)
3458
89a36810
AR
3459/**
3460 * pmcraid_open -char node "open" entry, allowed only users with admin access
3461 */
3462static int pmcraid_chr_open(struct inode *inode, struct file *filep)
3463{
3464 struct pmcraid_instance *pinstance;
3465
3466 if (!capable(CAP_SYS_ADMIN))
3467 return -EACCES;
3468
3469 /* Populate adapter instance * pointer for use by ioctl */
3470 pinstance = container_of(inode->i_cdev, struct pmcraid_instance, cdev);
3471 filep->private_data = pinstance;
3472
3473 return 0;
3474}
3475
89a36810
AR
3476/**
3477 * pmcraid_fasync - Async notifier registration from applications
3478 *
3479 * This function adds the calling process to a driver global queue. When an
3480 * event occurs, SIGIO will be sent to all processes in this queue.
3481 */
3482static int pmcraid_chr_fasync(int fd, struct file *filep, int mode)
3483{
3484 struct pmcraid_instance *pinstance;
3485 int rc;
3486
660bdddb 3487 pinstance = filep->private_data;
89a36810
AR
3488 mutex_lock(&pinstance->aen_queue_lock);
3489 rc = fasync_helper(fd, filep, mode, &pinstance->aen_queue);
3490 mutex_unlock(&pinstance->aen_queue_lock);
3491
3492 return rc;
3493}
3494
3495
3496/**
3497 * pmcraid_build_passthrough_ioadls - builds SG elements for passthrough
3498 * commands sent over IOCTL interface
3499 *
3500 * @cmd : pointer to struct pmcraid_cmd
3501 * @buflen : length of the request buffer
3502 * @direction : data transfer direction
3503 *
3504 * Return value
af901ca1 3505 * 0 on success, non-zero error code on failure
89a36810
AR
3506 */
3507static int pmcraid_build_passthrough_ioadls(
3508 struct pmcraid_cmd *cmd,
3509 int buflen,
3510 int direction
3511)
3512{
3513 struct pmcraid_sglist *sglist = NULL;
3514 struct scatterlist *sg = NULL;
3515 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
3516 struct pmcraid_ioadl_desc *ioadl;
3517 int i;
3518
3519 sglist = pmcraid_alloc_sglist(buflen);
3520
3521 if (!sglist) {
3522 pmcraid_err("can't allocate memory for passthrough SGls\n");
3523 return -ENOMEM;
3524 }
3525
3526 sglist->num_dma_sg = pci_map_sg(cmd->drv_inst->pdev,
3527 sglist->scatterlist,
3528 sglist->num_sg, direction);
3529
3530 if (!sglist->num_dma_sg || sglist->num_dma_sg > PMCRAID_MAX_IOADLS) {
3531 dev_err(&cmd->drv_inst->pdev->dev,
3532 "Failed to map passthrough buffer!\n");
3533 pmcraid_free_sglist(sglist);
3534 return -EIO;
3535 }
3536
3537 cmd->sglist = sglist;
3538 ioarcb->request_flags0 |= NO_LINK_DESCS;
3539
3540 ioadl = pmcraid_init_ioadls(cmd, sglist->num_dma_sg);
3541
3542 /* Initialize IOADL descriptor addresses */
3543 for_each_sg(sglist->scatterlist, sg, sglist->num_dma_sg, i) {
3544 ioadl[i].data_len = cpu_to_le32(sg_dma_len(sg));
3545 ioadl[i].address = cpu_to_le64(sg_dma_address(sg));
3546 ioadl[i].flags = 0;
3547 }
3548
3549 /* setup the last descriptor */
88197966 3550 ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
89a36810
AR
3551
3552 return 0;
3553}
3554
3555
3556/**
3557 * pmcraid_release_passthrough_ioadls - release passthrough ioadls
3558 *
3559 * @cmd: pointer to struct pmcraid_cmd for which ioadls were allocated
3560 * @buflen: size of the request buffer
3561 * @direction: data transfer direction
3562 *
3563 * Return value
af901ca1 3564 * 0 on success, non-zero error code on failure
89a36810
AR
3565 */
3566static void pmcraid_release_passthrough_ioadls(
3567 struct pmcraid_cmd *cmd,
3568 int buflen,
3569 int direction
3570)
3571{
3572 struct pmcraid_sglist *sglist = cmd->sglist;
3573
3574 if (buflen > 0) {
3575 pci_unmap_sg(cmd->drv_inst->pdev,
3576 sglist->scatterlist,
3577 sglist->num_sg,
3578 direction);
3579 pmcraid_free_sglist(sglist);
3580 cmd->sglist = NULL;
3581 }
3582}
3583
3584/**
3585 * pmcraid_ioctl_passthrough - handling passthrough IOCTL commands
3586 *
3587 * @pinstance: pointer to adapter instance structure
3588 * @cmd: ioctl code
3589 * @arg: pointer to pmcraid_passthrough_buffer user buffer
3590 *
3591 * Return value
af901ca1 3592 * 0 on success, non-zero error code on failure
89a36810
AR
3593 */
3594static long pmcraid_ioctl_passthrough(
3595 struct pmcraid_instance *pinstance,
3596 unsigned int ioctl_cmd,
3597 unsigned int buflen,
3397623b 3598 void __user *arg
89a36810
AR
3599)
3600{
3601 struct pmcraid_passthrough_ioctl_buffer *buffer;
3602 struct pmcraid_ioarcb *ioarcb;
3603 struct pmcraid_cmd *cmd;
3604 struct pmcraid_cmd *cancel_cmd;
3397623b 3605 void __user *request_buffer;
89a36810
AR
3606 unsigned long request_offset;
3607 unsigned long lock_flags;
3397623b 3608 void __user *ioasa;
c20c4267 3609 u32 ioasc;
89a36810
AR
3610 int request_size;
3611 int buffer_size;
3612 u8 access, direction;
3613 int rc = 0;
3614
3615 /* If IOA reset is in progress, wait 10 secs for reset to complete */
3616 if (pinstance->ioa_reset_in_progress) {
3617 rc = wait_event_interruptible_timeout(
3618 pinstance->reset_wait_q,
3619 !pinstance->ioa_reset_in_progress,
3620 msecs_to_jiffies(10000));
3621
3622 if (!rc)
3623 return -ETIMEDOUT;
3624 else if (rc < 0)
3625 return -ERESTARTSYS;
3626 }
3627
3628 /* If adapter is not in operational state, return error */
3629 if (pinstance->ioa_state != IOA_STATE_OPERATIONAL) {
3630 pmcraid_err("IOA is not operational\n");
3631 return -ENOTTY;
3632 }
3633
3634 buffer_size = sizeof(struct pmcraid_passthrough_ioctl_buffer);
3635 buffer = kmalloc(buffer_size, GFP_KERNEL);
3636
3637 if (!buffer) {
3638 pmcraid_err("no memory for passthrough buffer\n");
3639 return -ENOMEM;
3640 }
3641
3642 request_offset =
3643 offsetof(struct pmcraid_passthrough_ioctl_buffer, request_buffer);
3644
3645 request_buffer = arg + request_offset;
3646
edb88cef 3647 rc = copy_from_user(buffer, arg,
89a36810 3648 sizeof(struct pmcraid_passthrough_ioctl_buffer));
592488a3 3649
3397623b 3650 ioasa = arg + offsetof(struct pmcraid_passthrough_ioctl_buffer, ioasa);
592488a3 3651
89a36810
AR
3652 if (rc) {
3653 pmcraid_err("ioctl: can't copy passthrough buffer\n");
3654 rc = -EFAULT;
3655 goto out_free_buffer;
3656 }
3657
45c80be6 3658 request_size = le32_to_cpu(buffer->ioarcb.data_transfer_length);
89a36810
AR
3659
3660 if (buffer->ioarcb.request_flags0 & TRANSFER_DIR_WRITE) {
3661 access = VERIFY_READ;
3662 direction = DMA_TO_DEVICE;
3663 } else {
3664 access = VERIFY_WRITE;
3665 direction = DMA_FROM_DEVICE;
3666 }
3667
edb88cef 3668 if (request_size < 0) {
5f6279da
DR
3669 rc = -EINVAL;
3670 goto out_free_buffer;
89a36810
AR
3671 }
3672
3673 /* check if we have any additional command parameters */
45c80be6
AB
3674 if (le16_to_cpu(buffer->ioarcb.add_cmd_param_length)
3675 > PMCRAID_ADD_CMD_PARAM_LEN) {
89a36810
AR
3676 rc = -EINVAL;
3677 goto out_free_buffer;
3678 }
3679
3680 cmd = pmcraid_get_free_cmd(pinstance);
3681
3682 if (!cmd) {
3683 pmcraid_err("free command block is not available\n");
3684 rc = -ENOMEM;
3685 goto out_free_buffer;
3686 }
3687
3688 cmd->scsi_cmd = NULL;
3689 ioarcb = &(cmd->ioa_cb->ioarcb);
3690
3691 /* Copy the user-provided IOARCB stuff field by field */
3692 ioarcb->resource_handle = buffer->ioarcb.resource_handle;
3693 ioarcb->data_transfer_length = buffer->ioarcb.data_transfer_length;
3694 ioarcb->cmd_timeout = buffer->ioarcb.cmd_timeout;
3695 ioarcb->request_type = buffer->ioarcb.request_type;
3696 ioarcb->request_flags0 = buffer->ioarcb.request_flags0;
3697 ioarcb->request_flags1 = buffer->ioarcb.request_flags1;
3698 memcpy(ioarcb->cdb, buffer->ioarcb.cdb, PMCRAID_MAX_CDB_LEN);
3699
3700 if (buffer->ioarcb.add_cmd_param_length) {
3701 ioarcb->add_cmd_param_length =
3702 buffer->ioarcb.add_cmd_param_length;
3703 ioarcb->add_cmd_param_offset =
3704 buffer->ioarcb.add_cmd_param_offset;
3705 memcpy(ioarcb->add_data.u.add_cmd_params,
3706 buffer->ioarcb.add_data.u.add_cmd_params,
45c80be6 3707 le16_to_cpu(buffer->ioarcb.add_cmd_param_length));
89a36810
AR
3708 }
3709
c20c4267
AR
3710 /* set hrrq number where the IOA should respond to. Note that all cmds
3711 * generated internally uses hrrq_id 0, exception to this is the cmd
3712 * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses
3713 * hrrq_id assigned here in queuecommand
3714 */
3715 ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
3716 pinstance->num_hrrq;
3717
89a36810
AR
3718 if (request_size) {
3719 rc = pmcraid_build_passthrough_ioadls(cmd,
3720 request_size,
3721 direction);
3722 if (rc) {
3723 pmcraid_err("couldn't build passthrough ioadls\n");
2d76a247 3724 goto out_free_cmd;
89a36810
AR
3725 }
3726 }
3727
3728 /* If data is being written into the device, copy the data from user
3729 * buffers
3730 */
3731 if (direction == DMA_TO_DEVICE && request_size > 0) {
3732 rc = pmcraid_copy_sglist(cmd->sglist,
3733 request_buffer,
3734 request_size,
3735 direction);
3736 if (rc) {
3737 pmcraid_err("failed to copy user buffer\n");
3738 goto out_free_sglist;
3739 }
3740 }
3741
3742 /* passthrough ioctl is a blocking command so, put the user to sleep
3743 * until timeout. Note that a timeout value of 0 means, do timeout.
3744 */
3745 cmd->cmd_done = pmcraid_internal_done;
3746 init_completion(&cmd->wait_for_completion);
3747 cmd->completion_req = 1;
3748
3749 pmcraid_info("command(%d) (CDB[0] = %x) for %x\n",
3750 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
3751 cmd->ioa_cb->ioarcb.cdb[0],
3752 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle));
3753
3754 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
3755 _pmcraid_fire_command(cmd);
3756 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
3757
c20c4267
AR
3758 /* NOTE ! Remove the below line once abort_task is implemented
3759 * in firmware. This line disables ioctl command timeout handling logic
3760 * similar to IO command timeout handling, making ioctl commands to wait
3761 * until the command completion regardless of timeout value specified in
3762 * ioarcb
3763 */
3764 buffer->ioarcb.cmd_timeout = 0;
3765
89a36810
AR
3766 /* If command timeout is specified put caller to wait till that time,
3767 * otherwise it would be blocking wait. If command gets timed out, it
3768 * will be aborted.
3769 */
3770 if (buffer->ioarcb.cmd_timeout == 0) {
3771 wait_for_completion(&cmd->wait_for_completion);
3772 } else if (!wait_for_completion_timeout(
3773 &cmd->wait_for_completion,
45c80be6 3774 msecs_to_jiffies(le16_to_cpu(buffer->ioarcb.cmd_timeout) * 1000))) {
89a36810
AR
3775
3776 pmcraid_info("aborting cmd %d (CDB[0] = %x) due to timeout\n",
45c80be6 3777 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
89a36810
AR
3778 cmd->ioa_cb->ioarcb.cdb[0]);
3779
89a36810
AR
3780 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
3781 cancel_cmd = pmcraid_abort_cmd(cmd);
3782 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
3783
3784 if (cancel_cmd) {
3785 wait_for_completion(&cancel_cmd->wait_for_completion);
45c80be6 3786 ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc);
89a36810 3787 pmcraid_return_cmd(cancel_cmd);
c20c4267
AR
3788
3789 /* if abort task couldn't find the command i.e it got
3790 * completed prior to aborting, return good completion.
25985edc 3791 * if command got aborted successfully or there was IOA
c20c4267
AR
3792 * reset due to abort task itself getting timedout then
3793 * return -ETIMEDOUT
3794 */
3795 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
3796 PMCRAID_IOASC_SENSE_KEY(ioasc) == 0x00) {
3797 if (ioasc != PMCRAID_IOASC_GC_IOARCB_NOTFOUND)
3798 rc = -ETIMEDOUT;
3799 goto out_handle_response;
3800 }
89a36810
AR
3801 }
3802
c20c4267
AR
3803 /* no command block for abort task or abort task failed to abort
3804 * the IOARCB, then wait for 150 more seconds and initiate reset
3805 * sequence after timeout
3806 */
3807 if (!wait_for_completion_timeout(
3808 &cmd->wait_for_completion,
3809 msecs_to_jiffies(150 * 1000))) {
3810 pmcraid_reset_bringup(cmd->drv_inst);
3811 rc = -ETIMEDOUT;
3812 }
89a36810
AR
3813 }
3814
c20c4267 3815out_handle_response:
592488a3
AR
3816 /* copy entire IOASA buffer and return IOCTL success.
3817 * If copying IOASA to user-buffer fails, return
89a36810
AR
3818 * EFAULT
3819 */
592488a3
AR
3820 if (copy_to_user(ioasa, &cmd->ioa_cb->ioasa,
3821 sizeof(struct pmcraid_ioasa))) {
3822 pmcraid_err("failed to copy ioasa buffer to user\n");
3823 rc = -EFAULT;
89a36810 3824 }
c20c4267 3825
89a36810
AR
3826 /* If the data transfer was from device, copy the data onto user
3827 * buffers
3828 */
3829 else if (direction == DMA_FROM_DEVICE && request_size > 0) {
3830 rc = pmcraid_copy_sglist(cmd->sglist,
3831 request_buffer,
3832 request_size,
3833 direction);
3834 if (rc) {
3835 pmcraid_err("failed to copy user buffer\n");
3836 rc = -EFAULT;
3837 }
3838 }
3839
3840out_free_sglist:
3841 pmcraid_release_passthrough_ioadls(cmd, request_size, direction);
2d76a247
QL
3842
3843out_free_cmd:
89a36810
AR
3844 pmcraid_return_cmd(cmd);
3845
3846out_free_buffer:
3847 kfree(buffer);
3848
3849 return rc;
3850}
3851
3852
3853
3854
3855/**
3856 * pmcraid_ioctl_driver - ioctl handler for commands handled by driver itself
3857 *
3858 * @pinstance: pointer to adapter instance structure
3859 * @cmd: ioctl command passed in
3860 * @buflen: length of user_buffer
3861 * @user_buffer: user buffer pointer
3862 *
3863 * Return Value
3864 * 0 in case of success, otherwise appropriate error code
3865 */
3866static long pmcraid_ioctl_driver(
3867 struct pmcraid_instance *pinstance,
3868 unsigned int cmd,
3869 unsigned int buflen,
3870 void __user *user_buffer
3871)
3872{
3873 int rc = -ENOSYS;
3874
89a36810
AR
3875 switch (cmd) {
3876 case PMCRAID_IOCTL_RESET_ADAPTER:
3877 pmcraid_reset_bringup(pinstance);
3878 rc = 0;
3879 break;
3880
3881 default:
3882 break;
3883 }
3884
3885 return rc;
3886}
3887
3888/**
3889 * pmcraid_check_ioctl_buffer - check for proper access to user buffer
3890 *
3891 * @cmd: ioctl command
3892 * @arg: user buffer
3893 * @hdr: pointer to kernel memory for pmcraid_ioctl_header
3894 *
3895 * Return Value
3896 * negetive error code if there are access issues, otherwise zero.
3897 * Upon success, returns ioctl header copied out of user buffer.
3898 */
3899
3900static int pmcraid_check_ioctl_buffer(
3901 int cmd,
3902 void __user *arg,
3903 struct pmcraid_ioctl_header *hdr
3904)
3905{
edb88cef 3906 int rc;
89a36810
AR
3907
3908 if (copy_from_user(hdr, arg, sizeof(struct pmcraid_ioctl_header))) {
3909 pmcraid_err("couldn't copy ioctl header from user buffer\n");
3910 return -EFAULT;
3911 }
3912
3913 /* check for valid driver signature */
3914 rc = memcmp(hdr->signature,
3915 PMCRAID_IOCTL_SIGNATURE,
3916 sizeof(hdr->signature));
3917 if (rc) {
3918 pmcraid_err("signature verification failed\n");
3919 return -EINVAL;
3920 }
3921
89a36810
AR
3922 return 0;
3923}
3924
3925/**
3926 * pmcraid_ioctl - char node ioctl entry point
3927 */
3928static long pmcraid_chr_ioctl(
3929 struct file *filep,
3930 unsigned int cmd,
3931 unsigned long arg
3932)
3933{
3934 struct pmcraid_instance *pinstance = NULL;
3935 struct pmcraid_ioctl_header *hdr = NULL;
3397623b 3936 void __user *argp = (void __user *)arg;
89a36810
AR
3937 int retval = -ENOTTY;
3938
a63ec376 3939 hdr = kmalloc(sizeof(struct pmcraid_ioctl_header), GFP_KERNEL);
89a36810
AR
3940
3941 if (!hdr) {
4f91b114 3942 pmcraid_err("failed to allocate memory for ioctl header\n");
89a36810
AR
3943 return -ENOMEM;
3944 }
3945
3397623b 3946 retval = pmcraid_check_ioctl_buffer(cmd, argp, hdr);
89a36810
AR
3947
3948 if (retval) {
3949 pmcraid_info("chr_ioctl: header check failed\n");
3950 kfree(hdr);
3951 return retval;
3952 }
3953
660bdddb 3954 pinstance = filep->private_data;
89a36810
AR
3955
3956 if (!pinstance) {
3957 pmcraid_info("adapter instance is not found\n");
3958 kfree(hdr);
3959 return -ENOTTY;
3960 }
3961
3962 switch (_IOC_TYPE(cmd)) {
3963
3964 case PMCRAID_PASSTHROUGH_IOCTL:
3965 /* If ioctl code is to download microcode, we need to block
3966 * mid-layer requests.
3967 */
3968 if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
3969 scsi_block_requests(pinstance->host);
3970
3397623b
AB
3971 retval = pmcraid_ioctl_passthrough(pinstance, cmd,
3972 hdr->buffer_length, argp);
89a36810
AR
3973
3974 if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
3975 scsi_unblock_requests(pinstance->host);
3976 break;
3977
3978 case PMCRAID_DRIVER_IOCTL:
3979 arg += sizeof(struct pmcraid_ioctl_header);
3397623b
AB
3980 retval = pmcraid_ioctl_driver(pinstance, cmd,
3981 hdr->buffer_length, argp);
89a36810
AR
3982 break;
3983
3984 default:
3985 retval = -ENOTTY;
3986 break;
3987 }
3988
3989 kfree(hdr);
3990
3991 return retval;
3992}
3993
3994/**
3995 * File operations structure for management interface
3996 */
3997static const struct file_operations pmcraid_fops = {
3998 .owner = THIS_MODULE,
3999 .open = pmcraid_chr_open,
89a36810
AR
4000 .fasync = pmcraid_chr_fasync,
4001 .unlocked_ioctl = pmcraid_chr_ioctl,
4002#ifdef CONFIG_COMPAT
4003 .compat_ioctl = pmcraid_chr_ioctl,
4004#endif
6038f373 4005 .llseek = noop_llseek,
89a36810
AR
4006};
4007
4008
4009
4010
4011/**
4012 * pmcraid_show_log_level - Display adapter's error logging level
4013 * @dev: class device struct
4014 * @buf: buffer
4015 *
4016 * Return value:
4017 * number of bytes printed to buffer
4018 */
4019static ssize_t pmcraid_show_log_level(
4020 struct device *dev,
4021 struct device_attribute *attr,
4022 char *buf)
4023{
4024 struct Scsi_Host *shost = class_to_shost(dev);
4025 struct pmcraid_instance *pinstance =
4026 (struct pmcraid_instance *)shost->hostdata;
4027 return snprintf(buf, PAGE_SIZE, "%d\n", pinstance->current_log_level);
4028}
4029
4030/**
4031 * pmcraid_store_log_level - Change the adapter's error logging level
4032 * @dev: class device struct
4033 * @buf: buffer
4034 * @count: not used
4035 *
4036 * Return value:
4037 * number of bytes printed to buffer
4038 */
4039static ssize_t pmcraid_store_log_level(
4040 struct device *dev,
4041 struct device_attribute *attr,
4042 const char *buf,
4043 size_t count
4044)
4045{
4046 struct Scsi_Host *shost;
4047 struct pmcraid_instance *pinstance;
f7c65af5 4048 u8 val;
89a36810 4049
f7c65af5 4050 if (kstrtou8(buf, 10, &val))
89a36810
AR
4051 return -EINVAL;
4052 /* log-level should be from 0 to 2 */
4053 if (val > 2)
4054 return -EINVAL;
4055
4056 shost = class_to_shost(dev);
4057 pinstance = (struct pmcraid_instance *)shost->hostdata;
4058 pinstance->current_log_level = val;
4059
4060 return strlen(buf);
4061}
4062
4063static struct device_attribute pmcraid_log_level_attr = {
4064 .attr = {
4065 .name = "log_level",
4066 .mode = S_IRUGO | S_IWUSR,
4067 },
4068 .show = pmcraid_show_log_level,
4069 .store = pmcraid_store_log_level,
4070};
4071
4072/**
4073 * pmcraid_show_drv_version - Display driver version
4074 * @dev: class device struct
4075 * @buf: buffer
4076 *
4077 * Return value:
4078 * number of bytes printed to buffer
4079 */
4080static ssize_t pmcraid_show_drv_version(
4081 struct device *dev,
4082 struct device_attribute *attr,
4083 char *buf
4084)
4085{
a1b66665
MM
4086 return snprintf(buf, PAGE_SIZE, "version: %s\n",
4087 PMCRAID_DRIVER_VERSION);
89a36810
AR
4088}
4089
4090static struct device_attribute pmcraid_driver_version_attr = {
4091 .attr = {
4092 .name = "drv_version",
4093 .mode = S_IRUGO,
4094 },
4095 .show = pmcraid_show_drv_version,
4096};
4097
4098/**
4099 * pmcraid_show_io_adapter_id - Display driver assigned adapter id
4100 * @dev: class device struct
4101 * @buf: buffer
4102 *
4103 * Return value:
4104 * number of bytes printed to buffer
4105 */
4106static ssize_t pmcraid_show_adapter_id(
4107 struct device *dev,
4108 struct device_attribute *attr,
4109 char *buf
4110)
4111{
4112 struct Scsi_Host *shost = class_to_shost(dev);
4113 struct pmcraid_instance *pinstance =
4114 (struct pmcraid_instance *)shost->hostdata;
4115 u32 adapter_id = (pinstance->pdev->bus->number << 8) |
4116 pinstance->pdev->devfn;
4117 u32 aen_group = pmcraid_event_family.id;
4118
4119 return snprintf(buf, PAGE_SIZE,
4120 "adapter id: %d\nminor: %d\naen group: %d\n",
4121 adapter_id, MINOR(pinstance->cdev.dev), aen_group);
4122}
4123
4124static struct device_attribute pmcraid_adapter_id_attr = {
4125 .attr = {
4126 .name = "adapter_id",
5a0ccb6b 4127 .mode = S_IRUGO,
89a36810
AR
4128 },
4129 .show = pmcraid_show_adapter_id,
4130};
4131
4132static struct device_attribute *pmcraid_host_attrs[] = {
4133 &pmcraid_log_level_attr,
4134 &pmcraid_driver_version_attr,
4135 &pmcraid_adapter_id_attr,
4136 NULL,
4137};
4138
4139
4140/* host template structure for pmcraid driver */
4141static struct scsi_host_template pmcraid_host_template = {
4142 .module = THIS_MODULE,
4143 .name = PMCRAID_DRIVER_NAME,
4144 .queuecommand = pmcraid_queuecommand,
4145 .eh_abort_handler = pmcraid_eh_abort_handler,
4146 .eh_bus_reset_handler = pmcraid_eh_bus_reset_handler,
4147 .eh_target_reset_handler = pmcraid_eh_target_reset_handler,
4148 .eh_device_reset_handler = pmcraid_eh_device_reset_handler,
4149 .eh_host_reset_handler = pmcraid_eh_host_reset_handler,
4150
4151 .slave_alloc = pmcraid_slave_alloc,
4152 .slave_configure = pmcraid_slave_configure,
4153 .slave_destroy = pmcraid_slave_destroy,
4154 .change_queue_depth = pmcraid_change_queue_depth,
89a36810
AR
4155 .can_queue = PMCRAID_MAX_IO_CMD,
4156 .this_id = -1,
4157 .sg_tablesize = PMCRAID_MAX_IOADLS,
4158 .max_sectors = PMCRAID_IOA_MAX_SECTORS,
54b2b50c 4159 .no_write_same = 1,
89a36810
AR
4160 .cmd_per_lun = PMCRAID_MAX_CMD_PER_LUN,
4161 .use_clustering = ENABLE_CLUSTERING,
4162 .shost_attrs = pmcraid_host_attrs,
2ecb204d 4163 .proc_name = PMCRAID_DRIVER_NAME,
89a36810
AR
4164};
4165
c20c4267
AR
4166/*
4167 * pmcraid_isr_msix - implements MSI-X interrupt handling routine
4168 * @irq: interrupt vector number
4169 * @dev_id: pointer hrrq_vector
89a36810
AR
4170 *
4171 * Return Value
c20c4267 4172 * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored
89a36810 4173 */
c20c4267
AR
4174
4175static irqreturn_t pmcraid_isr_msix(int irq, void *dev_id)
89a36810 4176{
c20c4267
AR
4177 struct pmcraid_isr_param *hrrq_vector;
4178 struct pmcraid_instance *pinstance;
4179 unsigned long lock_flags;
4180 u32 intrs_val;
4181 int hrrq_id;
4182
4183 hrrq_vector = (struct pmcraid_isr_param *)dev_id;
4184 hrrq_id = hrrq_vector->hrrq_id;
4185 pinstance = hrrq_vector->drv_inst;
4186
4187 if (!hrrq_id) {
4188 /* Read the interrupt */
4189 intrs_val = pmcraid_read_interrupts(pinstance);
4190 if (intrs_val &&
4191 ((ioread32(pinstance->int_regs.host_ioa_interrupt_reg)
4192 & DOORBELL_INTR_MSIX_CLR) == 0)) {
4193 /* Any error interrupts including unit_check,
4194 * initiate IOA reset.In case of unit check indicate
4195 * to reset_sequence that IOA unit checked and prepare
4196 * for a dump during reset sequence
4197 */
4198 if (intrs_val & PMCRAID_ERROR_INTERRUPTS) {
4199 if (intrs_val & INTRS_IOA_UNIT_CHECK)
4200 pinstance->ioa_unit_check = 1;
4201
4202 pmcraid_err("ISR: error interrupts: %x \
4203 initiating reset\n", intrs_val);
4204 spin_lock_irqsave(pinstance->host->host_lock,
4205 lock_flags);
4206 pmcraid_initiate_reset(pinstance);
4207 spin_unlock_irqrestore(
4208 pinstance->host->host_lock,
4209 lock_flags);
4210 }
4211 /* If interrupt was as part of the ioa initialization,
4212 * clear it. Delete the timer and wakeup the
4213 * reset engine to proceed with reset sequence
4214 */
4215 if (intrs_val & INTRS_TRANSITION_TO_OPERATIONAL)
4216 pmcraid_clr_trans_op(pinstance);
4217
4218 /* Clear the interrupt register by writing
4219 * to host to ioa doorbell. Once done
4220 * FW will clear the interrupt.
4221 */
4222 iowrite32(DOORBELL_INTR_MSIX_CLR,
4223 pinstance->int_regs.host_ioa_interrupt_reg);
4224 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
4225
89a36810 4226
c20c4267
AR
4227 }
4228 }
4229
4230 tasklet_schedule(&(pinstance->isr_tasklet[hrrq_id]));
4231
4232 return IRQ_HANDLED;
89a36810
AR
4233}
4234
4235/**
c20c4267 4236 * pmcraid_isr - implements legacy interrupt handling routine
89a36810
AR
4237 *
4238 * @irq: interrupt vector number
4239 * @dev_id: pointer hrrq_vector
4240 *
4241 * Return Value
4242 * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored
4243 */
4244static irqreturn_t pmcraid_isr(int irq, void *dev_id)
4245{
4246 struct pmcraid_isr_param *hrrq_vector;
4247 struct pmcraid_instance *pinstance;
89a36810 4248 u32 intrs;
c20c4267
AR
4249 unsigned long lock_flags;
4250 int hrrq_id = 0;
89a36810
AR
4251
4252 /* In case of legacy interrupt mode where interrupts are shared across
4253 * isrs, it may be possible that the current interrupt is not from IOA
4254 */
4255 if (!dev_id) {
4256 printk(KERN_INFO "%s(): NULL host pointer\n", __func__);
4257 return IRQ_NONE;
4258 }
89a36810
AR
4259 hrrq_vector = (struct pmcraid_isr_param *)dev_id;
4260 pinstance = hrrq_vector->drv_inst;
4261
89a36810
AR
4262 intrs = pmcraid_read_interrupts(pinstance);
4263
c20c4267 4264 if (unlikely((intrs & PMCRAID_PCI_INTERRUPTS) == 0))
89a36810 4265 return IRQ_NONE;
89a36810
AR
4266
4267 /* Any error interrupts including unit_check, initiate IOA reset.
4268 * In case of unit check indicate to reset_sequence that IOA unit
4269 * checked and prepare for a dump during reset sequence
4270 */
4271 if (intrs & PMCRAID_ERROR_INTERRUPTS) {
4272
4273 if (intrs & INTRS_IOA_UNIT_CHECK)
4274 pinstance->ioa_unit_check = 1;
4275
4276 iowrite32(intrs,
4277 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4278 pmcraid_err("ISR: error interrupts: %x initiating reset\n",
4279 intrs);
c20c4267
AR
4280 intrs = ioread32(
4281 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4282 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
89a36810 4283 pmcraid_initiate_reset(pinstance);
c20c4267 4284 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
89a36810 4285 } else {
c20c4267
AR
4286 /* If interrupt was as part of the ioa initialization,
4287 * clear. Delete the timer and wakeup the
4288 * reset engine to proceed with reset sequence
4289 */
4290 if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
4291 pmcraid_clr_trans_op(pinstance);
4292 } else {
4293 iowrite32(intrs,
4294 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4295 ioread32(
4296 pinstance->int_regs.ioa_host_interrupt_clr_reg);
89a36810 4297
c20c4267
AR
4298 tasklet_schedule(
4299 &(pinstance->isr_tasklet[hrrq_id]));
4300 }
4301 }
89a36810
AR
4302
4303 return IRQ_HANDLED;
4304}
4305
4306
4307/**
4308 * pmcraid_worker_function - worker thread function
4309 *
4310 * @workp: pointer to struct work queue
4311 *
4312 * Return Value
4313 * None
4314 */
4315
4316static void pmcraid_worker_function(struct work_struct *workp)
4317{
4318 struct pmcraid_instance *pinstance;
4319 struct pmcraid_resource_entry *res;
4320 struct pmcraid_resource_entry *temp;
4321 struct scsi_device *sdev;
4322 unsigned long lock_flags;
4323 unsigned long host_lock_flags;
c20c4267 4324 u16 fw_version;
89a36810
AR
4325 u8 bus, target, lun;
4326
4327 pinstance = container_of(workp, struct pmcraid_instance, worker_q);
4328 /* add resources only after host is added into system */
4329 if (!atomic_read(&pinstance->expose_resources))
4330 return;
4331
c20c4267
AR
4332 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
4333
89a36810
AR
4334 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
4335 list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) {
4336
4337 if (res->change_detected == RES_CHANGE_DEL && res->scsi_dev) {
4338 sdev = res->scsi_dev;
4339
4340 /* host_lock must be held before calling
4341 * scsi_device_get
4342 */
4343 spin_lock_irqsave(pinstance->host->host_lock,
4344 host_lock_flags);
4345 if (!scsi_device_get(sdev)) {
4346 spin_unlock_irqrestore(
4347 pinstance->host->host_lock,
4348 host_lock_flags);
4349 pmcraid_info("deleting %x from midlayer\n",
4350 res->cfg_entry.resource_address);
4351 list_move_tail(&res->queue,
4352 &pinstance->free_res_q);
4353 spin_unlock_irqrestore(
4354 &pinstance->resource_lock,
4355 lock_flags);
4356 scsi_remove_device(sdev);
4357 scsi_device_put(sdev);
4358 spin_lock_irqsave(&pinstance->resource_lock,
4359 lock_flags);
4360 res->change_detected = 0;
4361 } else {
4362 spin_unlock_irqrestore(
4363 pinstance->host->host_lock,
4364 host_lock_flags);
4365 }
4366 }
4367 }
4368
4369 list_for_each_entry(res, &pinstance->used_res_q, queue) {
4370
4371 if (res->change_detected == RES_CHANGE_ADD) {
4372
c20c4267
AR
4373 if (!pmcraid_expose_resource(fw_version,
4374 &res->cfg_entry))
89a36810
AR
4375 continue;
4376
4377 if (RES_IS_VSET(res->cfg_entry)) {
4378 bus = PMCRAID_VSET_BUS_ID;
c20c4267
AR
4379 if (fw_version <= PMCRAID_FW_VERSION_1)
4380 target = res->cfg_entry.unique_flags1;
4381 else
45c80be6 4382 target = le16_to_cpu(res->cfg_entry.array_id) & 0xFF;
89a36810
AR
4383 lun = PMCRAID_VSET_LUN_ID;
4384 } else {
4385 bus = PMCRAID_PHYS_BUS_ID;
4386 target =
4387 RES_TARGET(
4388 res->cfg_entry.resource_address);
4389 lun = RES_LUN(res->cfg_entry.resource_address);
4390 }
4391
4392 res->change_detected = 0;
4393 spin_unlock_irqrestore(&pinstance->resource_lock,
4394 lock_flags);
4395 scsi_add_device(pinstance->host, bus, target, lun);
4396 spin_lock_irqsave(&pinstance->resource_lock,
4397 lock_flags);
4398 }
4399 }
4400
4401 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
4402}
4403
4404/**
4405 * pmcraid_tasklet_function - Tasklet function
4406 *
4407 * @instance: pointer to msix param structure
4408 *
4409 * Return Value
4410 * None
4411 */
c20c4267 4412static void pmcraid_tasklet_function(unsigned long instance)
89a36810
AR
4413{
4414 struct pmcraid_isr_param *hrrq_vector;
4415 struct pmcraid_instance *pinstance;
4416 unsigned long hrrq_lock_flags;
4417 unsigned long pending_lock_flags;
4418 unsigned long host_lock_flags;
4419 spinlock_t *lockp; /* hrrq buffer lock */
4420 int id;
45c80be6 4421 u32 resp;
89a36810
AR
4422
4423 hrrq_vector = (struct pmcraid_isr_param *)instance;
4424 pinstance = hrrq_vector->drv_inst;
4425 id = hrrq_vector->hrrq_id;
4426 lockp = &(pinstance->hrrq_lock[id]);
89a36810
AR
4427
4428 /* loop through each of the commands responded by IOA. Each HRRQ buf is
4429 * protected by its own lock. Traversals must be done within this lock
4430 * as there may be multiple tasklets running on multiple CPUs. Note
4431 * that the lock is held just for picking up the response handle and
4432 * manipulating hrrq_curr/toggle_bit values.
4433 */
4434 spin_lock_irqsave(lockp, hrrq_lock_flags);
4435
4436 resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
4437
4438 while ((resp & HRRQ_TOGGLE_BIT) ==
4439 pinstance->host_toggle_bit[id]) {
4440
4441 int cmd_index = resp >> 2;
4442 struct pmcraid_cmd *cmd = NULL;
4443
89a36810
AR
4444 if (pinstance->hrrq_curr[id] < pinstance->hrrq_end[id]) {
4445 pinstance->hrrq_curr[id]++;
4446 } else {
4447 pinstance->hrrq_curr[id] = pinstance->hrrq_start[id];
4448 pinstance->host_toggle_bit[id] ^= 1u;
4449 }
4450
c20c4267
AR
4451 if (cmd_index >= PMCRAID_MAX_CMD) {
4452 /* In case of invalid response handle, log message */
4453 pmcraid_err("Invalid response handle %d\n", cmd_index);
4454 resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
4455 continue;
4456 }
4457
4458 cmd = pinstance->cmd_list[cmd_index];
89a36810
AR
4459 spin_unlock_irqrestore(lockp, hrrq_lock_flags);
4460
4461 spin_lock_irqsave(&pinstance->pending_pool_lock,
4462 pending_lock_flags);
4463 list_del(&cmd->free_list);
4464 spin_unlock_irqrestore(&pinstance->pending_pool_lock,
4465 pending_lock_flags);
4466 del_timer(&cmd->timer);
4467 atomic_dec(&pinstance->outstanding_cmds);
4468
4469 if (cmd->cmd_done == pmcraid_ioa_reset) {
4470 spin_lock_irqsave(pinstance->host->host_lock,
4471 host_lock_flags);
4472 cmd->cmd_done(cmd);
4473 spin_unlock_irqrestore(pinstance->host->host_lock,
4474 host_lock_flags);
4475 } else if (cmd->cmd_done != NULL) {
4476 cmd->cmd_done(cmd);
4477 }
4478 /* loop over until we are done with all responses */
4479 spin_lock_irqsave(lockp, hrrq_lock_flags);
4480 resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
4481 }
4482
4483 spin_unlock_irqrestore(lockp, hrrq_lock_flags);
4484}
4485
4486/**
4487 * pmcraid_unregister_interrupt_handler - de-register interrupts handlers
4488 * @pinstance: pointer to adapter instance structure
4489 *
4490 * This routine un-registers registered interrupt handler and
4491 * also frees irqs/vectors.
4492 *
4493 * Retun Value
4494 * None
4495 */
4496static
4497void pmcraid_unregister_interrupt_handler(struct pmcraid_instance *pinstance)
4498{
eab5c150 4499 struct pci_dev *pdev = pinstance->pdev;
c20c4267
AR
4500 int i;
4501
4502 for (i = 0; i < pinstance->num_hrrq; i++)
eab5c150 4503 free_irq(pci_irq_vector(pdev, i), &pinstance->hrrq_vector[i]);
c20c4267 4504
eab5c150
CH
4505 pinstance->interrupt_mode = 0;
4506 pci_free_irq_vectors(pdev);
89a36810
AR
4507}
4508
4509/**
4510 * pmcraid_register_interrupt_handler - registers interrupt handler
4511 * @pinstance: pointer to per-adapter instance structure
4512 *
4513 * Return Value
4514 * 0 on success, non-zero error code otherwise.
4515 */
4516static int
4517pmcraid_register_interrupt_handler(struct pmcraid_instance *pinstance)
4518{
4519 struct pci_dev *pdev = pinstance->pdev;
eab5c150
CH
4520 unsigned int irq_flag = PCI_IRQ_LEGACY, flag;
4521 int num_hrrq, rc, i;
4522 irq_handler_t isr;
89a36810 4523
eab5c150
CH
4524 if (pmcraid_enable_msix)
4525 irq_flag |= PCI_IRQ_MSIX;
4526
4527 num_hrrq = pci_alloc_irq_vectors(pdev, 1, PMCRAID_NUM_MSIX_VECTORS,
4528 irq_flag);
4529 if (num_hrrq < 0)
4530 return num_hrrq;
4531
4532 if (pdev->msix_enabled) {
4533 flag = 0;
4534 isr = pmcraid_isr_msix;
4535 } else {
4536 flag = IRQF_SHARED;
4537 isr = pmcraid_isr;
4538 }
4539
4540 for (i = 0; i < num_hrrq; i++) {
4541 struct pmcraid_isr_param *vec = &pinstance->hrrq_vector[i];
4542
4543 vec->hrrq_id = i;
4544 vec->drv_inst = pinstance;
4545 rc = request_irq(pci_irq_vector(pdev, i), isr, flag,
4546 PMCRAID_DRIVER_NAME, vec);
4547 if (rc)
4548 goto out_unwind;
4549 }
c20c4267 4550
eab5c150
CH
4551 pinstance->num_hrrq = num_hrrq;
4552 if (pdev->msix_enabled) {
c20c4267
AR
4553 pinstance->interrupt_mode = 1;
4554 iowrite32(DOORBELL_INTR_MODE_MSIX,
4555 pinstance->int_regs.host_ioa_interrupt_reg);
4556 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
c20c4267
AR
4557 }
4558
eab5c150
CH
4559 return 0;
4560
4561out_unwind:
4562 while (--i > 0)
4563 free_irq(pci_irq_vector(pdev, i), &pinstance->hrrq_vector[i]);
4564 pci_free_irq_vectors(pdev);
c20c4267 4565 return rc;
89a36810
AR
4566}
4567
4568/**
4569 * pmcraid_release_cmd_blocks - release buufers allocated for command blocks
4570 * @pinstance: per adapter instance structure pointer
4571 * @max_index: number of buffer blocks to release
4572 *
4573 * Return Value
4574 * None
4575 */
4576static void
4577pmcraid_release_cmd_blocks(struct pmcraid_instance *pinstance, int max_index)
4578{
4579 int i;
4580 for (i = 0; i < max_index; i++) {
4581 kmem_cache_free(pinstance->cmd_cachep, pinstance->cmd_list[i]);
4582 pinstance->cmd_list[i] = NULL;
4583 }
4584 kmem_cache_destroy(pinstance->cmd_cachep);
4585 pinstance->cmd_cachep = NULL;
4586}
4587
4588/**
4589 * pmcraid_release_control_blocks - releases buffers alloced for control blocks
4590 * @pinstance: pointer to per adapter instance structure
4591 * @max_index: number of buffers (from 0 onwards) to release
4592 *
4593 * This function assumes that the command blocks for which control blocks are
4594 * linked are not released.
4595 *
4596 * Return Value
4597 * None
4598 */
4599static void
4600pmcraid_release_control_blocks(
4601 struct pmcraid_instance *pinstance,
4602 int max_index
4603)
4604{
4605 int i;
4606
4607 if (pinstance->control_pool == NULL)
4608 return;
4609
4610 for (i = 0; i < max_index; i++) {
a7ec87a9 4611 dma_pool_free(pinstance->control_pool,
89a36810
AR
4612 pinstance->cmd_list[i]->ioa_cb,
4613 pinstance->cmd_list[i]->ioa_cb_bus_addr);
4614 pinstance->cmd_list[i]->ioa_cb = NULL;
4615 pinstance->cmd_list[i]->ioa_cb_bus_addr = 0;
4616 }
a7ec87a9 4617 dma_pool_destroy(pinstance->control_pool);
89a36810
AR
4618 pinstance->control_pool = NULL;
4619}
4620
4621/**
4622 * pmcraid_allocate_cmd_blocks - allocate memory for cmd block structures
4623 * @pinstance - pointer to per adapter instance structure
4624 *
4625 * Allocates memory for command blocks using kernel slab allocator.
4626 *
4627 * Return Value
4628 * 0 in case of success; -ENOMEM in case of failure
4629 */
6f039790 4630static int pmcraid_allocate_cmd_blocks(struct pmcraid_instance *pinstance)
89a36810
AR
4631{
4632 int i;
4633
4634 sprintf(pinstance->cmd_pool_name, "pmcraid_cmd_pool_%d",
4635 pinstance->host->unique_id);
4636
4637
4638 pinstance->cmd_cachep = kmem_cache_create(
4639 pinstance->cmd_pool_name,
4640 sizeof(struct pmcraid_cmd), 0,
4641 SLAB_HWCACHE_ALIGN, NULL);
4642 if (!pinstance->cmd_cachep)
4643 return -ENOMEM;
4644
4645 for (i = 0; i < PMCRAID_MAX_CMD; i++) {
4646 pinstance->cmd_list[i] =
4647 kmem_cache_alloc(pinstance->cmd_cachep, GFP_KERNEL);
4648 if (!pinstance->cmd_list[i]) {
4649 pmcraid_release_cmd_blocks(pinstance, i);
4650 return -ENOMEM;
4651 }
4652 }
4653 return 0;
4654}
4655
4656/**
4657 * pmcraid_allocate_control_blocks - allocates memory control blocks
4658 * @pinstance : pointer to per adapter instance structure
4659 *
4660 * This function allocates PCI memory for DMAable buffers like IOARCB, IOADLs
4661 * and IOASAs. This is called after command blocks are already allocated.
4662 *
4663 * Return Value
4664 * 0 in case it can allocate all control blocks, otherwise -ENOMEM
4665 */
6f039790 4666static int pmcraid_allocate_control_blocks(struct pmcraid_instance *pinstance)
89a36810
AR
4667{
4668 int i;
4669
4670 sprintf(pinstance->ctl_pool_name, "pmcraid_control_pool_%d",
4671 pinstance->host->unique_id);
4672
4673 pinstance->control_pool =
a7ec87a9
RP
4674 dma_pool_create(pinstance->ctl_pool_name,
4675 &pinstance->pdev->dev,
89a36810
AR
4676 sizeof(struct pmcraid_control_block),
4677 PMCRAID_IOARCB_ALIGNMENT, 0);
4678
4679 if (!pinstance->control_pool)
4680 return -ENOMEM;
4681
4682 for (i = 0; i < PMCRAID_MAX_CMD; i++) {
4683 pinstance->cmd_list[i]->ioa_cb =
a7ec87a9 4684 dma_pool_alloc(
89a36810
AR
4685 pinstance->control_pool,
4686 GFP_KERNEL,
4687 &(pinstance->cmd_list[i]->ioa_cb_bus_addr));
4688
4689 if (!pinstance->cmd_list[i]->ioa_cb) {
4690 pmcraid_release_control_blocks(pinstance, i);
4691 return -ENOMEM;
4692 }
4693 memset(pinstance->cmd_list[i]->ioa_cb, 0,
4694 sizeof(struct pmcraid_control_block));
4695 }
4696 return 0;
4697}
4698
4699/**
4700 * pmcraid_release_host_rrqs - release memory allocated for hrrq buffer(s)
4701 * @pinstance: pointer to per adapter instance structure
4702 * @maxindex: size of hrrq buffer pointer array
4703 *
4704 * Return Value
4705 * None
4706 */
4707static void
4708pmcraid_release_host_rrqs(struct pmcraid_instance *pinstance, int maxindex)
4709{
4710 int i;
4711 for (i = 0; i < maxindex; i++) {
4712
4713 pci_free_consistent(pinstance->pdev,
4714 HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD,
4715 pinstance->hrrq_start[i],
4716 pinstance->hrrq_start_bus_addr[i]);
4717
4718 /* reset pointers and toggle bit to zeros */
4719 pinstance->hrrq_start[i] = NULL;
4720 pinstance->hrrq_start_bus_addr[i] = 0;
4721 pinstance->host_toggle_bit[i] = 0;
4722 }
4723}
4724
4725/**
4726 * pmcraid_allocate_host_rrqs - Allocate and initialize host RRQ buffers
4727 * @pinstance: pointer to per adapter instance structure
4728 *
4729 * Return value
4730 * 0 hrrq buffers are allocated, -ENOMEM otherwise.
4731 */
6f039790 4732static int pmcraid_allocate_host_rrqs(struct pmcraid_instance *pinstance)
89a36810 4733{
c20c4267 4734 int i, buffer_size;
89a36810 4735
c20c4267 4736 buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
89a36810 4737
c20c4267 4738 for (i = 0; i < pinstance->num_hrrq; i++) {
89a36810
AR
4739 pinstance->hrrq_start[i] =
4740 pci_alloc_consistent(
4741 pinstance->pdev,
4742 buffer_size,
4743 &(pinstance->hrrq_start_bus_addr[i]));
4744
144b139c 4745 if (!pinstance->hrrq_start[i]) {
c20c4267
AR
4746 pmcraid_err("pci_alloc failed for hrrq vector : %d\n",
4747 i);
89a36810
AR
4748 pmcraid_release_host_rrqs(pinstance, i);
4749 return -ENOMEM;
4750 }
4751
4752 memset(pinstance->hrrq_start[i], 0, buffer_size);
4753 pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
4754 pinstance->hrrq_end[i] =
c20c4267 4755 pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
89a36810
AR
4756 pinstance->host_toggle_bit[i] = 1;
4757 spin_lock_init(&pinstance->hrrq_lock[i]);
4758 }
4759 return 0;
4760}
4761
4762/**
4763 * pmcraid_release_hcams - release HCAM buffers
4764 *
4765 * @pinstance: pointer to per adapter instance structure
4766 *
4767 * Return value
4768 * none
4769 */
4770static void pmcraid_release_hcams(struct pmcraid_instance *pinstance)
4771{
4772 if (pinstance->ccn.msg != NULL) {
4773 pci_free_consistent(pinstance->pdev,
4774 PMCRAID_AEN_HDR_SIZE +
c20c4267 4775 sizeof(struct pmcraid_hcam_ccn_ext),
89a36810
AR
4776 pinstance->ccn.msg,
4777 pinstance->ccn.baddr);
4778
4779 pinstance->ccn.msg = NULL;
4780 pinstance->ccn.hcam = NULL;
4781 pinstance->ccn.baddr = 0;
4782 }
4783
4784 if (pinstance->ldn.msg != NULL) {
4785 pci_free_consistent(pinstance->pdev,
4786 PMCRAID_AEN_HDR_SIZE +
4787 sizeof(struct pmcraid_hcam_ldn),
4788 pinstance->ldn.msg,
4789 pinstance->ldn.baddr);
4790
4791 pinstance->ldn.msg = NULL;
4792 pinstance->ldn.hcam = NULL;
4793 pinstance->ldn.baddr = 0;
4794 }
4795}
4796
4797/**
4798 * pmcraid_allocate_hcams - allocates HCAM buffers
4799 * @pinstance : pointer to per adapter instance structure
4800 *
4801 * Return Value:
4802 * 0 in case of successful allocation, non-zero otherwise
4803 */
4804static int pmcraid_allocate_hcams(struct pmcraid_instance *pinstance)
4805{
4806 pinstance->ccn.msg = pci_alloc_consistent(
4807 pinstance->pdev,
4808 PMCRAID_AEN_HDR_SIZE +
c20c4267 4809 sizeof(struct pmcraid_hcam_ccn_ext),
89a36810
AR
4810 &(pinstance->ccn.baddr));
4811
4812 pinstance->ldn.msg = pci_alloc_consistent(
4813 pinstance->pdev,
4814 PMCRAID_AEN_HDR_SIZE +
4815 sizeof(struct pmcraid_hcam_ldn),
4816 &(pinstance->ldn.baddr));
4817
4818 if (pinstance->ldn.msg == NULL || pinstance->ccn.msg == NULL) {
4819 pmcraid_release_hcams(pinstance);
4820 } else {
4821 pinstance->ccn.hcam =
4822 (void *)pinstance->ccn.msg + PMCRAID_AEN_HDR_SIZE;
4823 pinstance->ldn.hcam =
4824 (void *)pinstance->ldn.msg + PMCRAID_AEN_HDR_SIZE;
4825
4826 atomic_set(&pinstance->ccn.ignore, 0);
4827 atomic_set(&pinstance->ldn.ignore, 0);
4828 }
4829
4830 return (pinstance->ldn.msg == NULL) ? -ENOMEM : 0;
4831}
4832
4833/**
4834 * pmcraid_release_config_buffers - release config.table buffers
4835 * @pinstance: pointer to per adapter instance structure
4836 *
4837 * Return Value
4838 * none
4839 */
4840static void pmcraid_release_config_buffers(struct pmcraid_instance *pinstance)
4841{
4842 if (pinstance->cfg_table != NULL &&
4843 pinstance->cfg_table_bus_addr != 0) {
4844 pci_free_consistent(pinstance->pdev,
4845 sizeof(struct pmcraid_config_table),
4846 pinstance->cfg_table,
4847 pinstance->cfg_table_bus_addr);
4848 pinstance->cfg_table = NULL;
4849 pinstance->cfg_table_bus_addr = 0;
4850 }
4851
4852 if (pinstance->res_entries != NULL) {
4853 int i;
4854
4855 for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
4856 list_del(&pinstance->res_entries[i].queue);
4857 kfree(pinstance->res_entries);
4858 pinstance->res_entries = NULL;
4859 }
4860
4861 pmcraid_release_hcams(pinstance);
4862}
4863
4864/**
4865 * pmcraid_allocate_config_buffers - allocates DMAable memory for config table
4866 * @pinstance : pointer to per adapter instance structure
4867 *
4868 * Return Value
4869 * 0 for successful allocation, -ENOMEM for any failure
4870 */
6f039790 4871static int pmcraid_allocate_config_buffers(struct pmcraid_instance *pinstance)
89a36810
AR
4872{
4873 int i;
4874
4875 pinstance->res_entries =
6396bb22
KC
4876 kcalloc(PMCRAID_MAX_RESOURCES,
4877 sizeof(struct pmcraid_resource_entry),
4878 GFP_KERNEL);
89a36810
AR
4879
4880 if (NULL == pinstance->res_entries) {
4881 pmcraid_err("failed to allocate memory for resource table\n");
4882 return -ENOMEM;
4883 }
4884
4885 for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
4886 list_add_tail(&pinstance->res_entries[i].queue,
4887 &pinstance->free_res_q);
4888
4889 pinstance->cfg_table =
4890 pci_alloc_consistent(pinstance->pdev,
4891 sizeof(struct pmcraid_config_table),
4892 &pinstance->cfg_table_bus_addr);
4893
4894 if (NULL == pinstance->cfg_table) {
4895 pmcraid_err("couldn't alloc DMA memory for config table\n");
4896 pmcraid_release_config_buffers(pinstance);
4897 return -ENOMEM;
4898 }
4899
4900 if (pmcraid_allocate_hcams(pinstance)) {
4901 pmcraid_err("could not alloc DMA memory for HCAMS\n");
4902 pmcraid_release_config_buffers(pinstance);
4903 return -ENOMEM;
4904 }
4905
4906 return 0;
4907}
4908
4909/**
4910 * pmcraid_init_tasklets - registers tasklets for response handling
4911 *
4912 * @pinstance: pointer adapter instance structure
4913 *
4914 * Return value
4915 * none
4916 */
4917static void pmcraid_init_tasklets(struct pmcraid_instance *pinstance)
4918{
4919 int i;
4920 for (i = 0; i < pinstance->num_hrrq; i++)
4921 tasklet_init(&pinstance->isr_tasklet[i],
4922 pmcraid_tasklet_function,
4923 (unsigned long)&pinstance->hrrq_vector[i]);
4924}
4925
4926/**
4927 * pmcraid_kill_tasklets - destroys tasklets registered for response handling
4928 *
4929 * @pinstance: pointer to adapter instance structure
4930 *
4931 * Return value
4932 * none
4933 */
4934static void pmcraid_kill_tasklets(struct pmcraid_instance *pinstance)
4935{
4936 int i;
4937 for (i = 0; i < pinstance->num_hrrq; i++)
4938 tasklet_kill(&pinstance->isr_tasklet[i]);
4939}
4940
c20c4267
AR
4941/**
4942 * pmcraid_release_buffers - release per-adapter buffers allocated
4943 *
4944 * @pinstance: pointer to adapter soft state
4945 *
4946 * Return Value
4947 * none
4948 */
4949static void pmcraid_release_buffers(struct pmcraid_instance *pinstance)
4950{
4951 pmcraid_release_config_buffers(pinstance);
4952 pmcraid_release_control_blocks(pinstance, PMCRAID_MAX_CMD);
4953 pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
4954 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
4955
4956 if (pinstance->inq_data != NULL) {
4957 pci_free_consistent(pinstance->pdev,
4958 sizeof(struct pmcraid_inquiry_data),
4959 pinstance->inq_data,
4960 pinstance->inq_data_baddr);
4961
4962 pinstance->inq_data = NULL;
4963 pinstance->inq_data_baddr = 0;
4964 }
592488a3
AR
4965
4966 if (pinstance->timestamp_data != NULL) {
4967 pci_free_consistent(pinstance->pdev,
4968 sizeof(struct pmcraid_timestamp_data),
4969 pinstance->timestamp_data,
4970 pinstance->timestamp_data_baddr);
4971
4972 pinstance->timestamp_data = NULL;
4973 pinstance->timestamp_data_baddr = 0;
4974 }
c20c4267
AR
4975}
4976
89a36810
AR
4977/**
4978 * pmcraid_init_buffers - allocates memory and initializes various structures
4979 * @pinstance: pointer to per adapter instance structure
4980 *
4981 * This routine pre-allocates memory based on the type of block as below:
4982 * cmdblocks(PMCRAID_MAX_CMD): kernel memory using kernel's slab_allocator,
4983 * IOARCBs(PMCRAID_MAX_CMD) : DMAable memory, using pci pool allocator
4984 * config-table entries : DMAable memory using pci_alloc_consistent
4985 * HostRRQs : DMAable memory, using pci_alloc_consistent
4986 *
4987 * Return Value
4988 * 0 in case all of the blocks are allocated, -ENOMEM otherwise.
4989 */
6f039790 4990static int pmcraid_init_buffers(struct pmcraid_instance *pinstance)
89a36810
AR
4991{
4992 int i;
4993
4994 if (pmcraid_allocate_host_rrqs(pinstance)) {
4995 pmcraid_err("couldn't allocate memory for %d host rrqs\n",
4996 pinstance->num_hrrq);
4997 return -ENOMEM;
4998 }
4999
5000 if (pmcraid_allocate_config_buffers(pinstance)) {
5001 pmcraid_err("couldn't allocate memory for config buffers\n");
5002 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
5003 return -ENOMEM;
5004 }
5005
5006 if (pmcraid_allocate_cmd_blocks(pinstance)) {
c20c4267 5007 pmcraid_err("couldn't allocate memory for cmd blocks\n");
89a36810
AR
5008 pmcraid_release_config_buffers(pinstance);
5009 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
5010 return -ENOMEM;
5011 }
5012
5013 if (pmcraid_allocate_control_blocks(pinstance)) {
c20c4267 5014 pmcraid_err("couldn't allocate memory control blocks\n");
89a36810
AR
5015 pmcraid_release_config_buffers(pinstance);
5016 pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
5017 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
5018 return -ENOMEM;
5019 }
5020
c20c4267
AR
5021 /* allocate DMAable memory for page D0 INQUIRY buffer */
5022 pinstance->inq_data = pci_alloc_consistent(
5023 pinstance->pdev,
5024 sizeof(struct pmcraid_inquiry_data),
5025 &pinstance->inq_data_baddr);
5026
5027 if (pinstance->inq_data == NULL) {
5028 pmcraid_err("couldn't allocate DMA memory for INQUIRY\n");
5029 pmcraid_release_buffers(pinstance);
5030 return -ENOMEM;
5031 }
5032
592488a3
AR
5033 /* allocate DMAable memory for set timestamp data buffer */
5034 pinstance->timestamp_data = pci_alloc_consistent(
5035 pinstance->pdev,
5036 sizeof(struct pmcraid_timestamp_data),
5037 &pinstance->timestamp_data_baddr);
5038
5039 if (pinstance->timestamp_data == NULL) {
5040 pmcraid_err("couldn't allocate DMA memory for \
5041 set time_stamp \n");
5042 pmcraid_release_buffers(pinstance);
5043 return -ENOMEM;
5044 }
5045
5046
89a36810
AR
5047 /* Initialize all the command blocks and add them to free pool. No
5048 * need to lock (free_pool_lock) as this is done in initialization
5049 * itself
5050 */
5051 for (i = 0; i < PMCRAID_MAX_CMD; i++) {
5052 struct pmcraid_cmd *cmdp = pinstance->cmd_list[i];
5053 pmcraid_init_cmdblk(cmdp, i);
5054 cmdp->drv_inst = pinstance;
5055 list_add_tail(&cmdp->free_list, &pinstance->free_cmd_pool);
5056 }
5057
5058 return 0;
5059}
5060
5061/**
5062 * pmcraid_reinit_buffers - resets various buffer pointers
5063 * @pinstance: pointer to adapter instance
5064 * Return value
c20c4267 5065 * none
89a36810
AR
5066 */
5067static void pmcraid_reinit_buffers(struct pmcraid_instance *pinstance)
5068{
5069 int i;
5070 int buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
5071
5072 for (i = 0; i < pinstance->num_hrrq; i++) {
5073 memset(pinstance->hrrq_start[i], 0, buffer_size);
5074 pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
5075 pinstance->hrrq_end[i] =
5076 pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
5077 pinstance->host_toggle_bit[i] = 1;
5078 }
5079}
5080
5081/**
5082 * pmcraid_init_instance - initialize per instance data structure
5083 * @pdev: pointer to pci device structure
5084 * @host: pointer to Scsi_Host structure
5085 * @mapped_pci_addr: memory mapped IOA configuration registers
5086 *
5087 * Return Value
5088 * 0 on success, non-zero in case of any failure
5089 */
6f039790
GKH
5090static int pmcraid_init_instance(struct pci_dev *pdev, struct Scsi_Host *host,
5091 void __iomem *mapped_pci_addr)
89a36810
AR
5092{
5093 struct pmcraid_instance *pinstance =
5094 (struct pmcraid_instance *)host->hostdata;
5095
5096 pinstance->host = host;
5097 pinstance->pdev = pdev;
5098
5099 /* Initialize register addresses */
5100 pinstance->mapped_dma_addr = mapped_pci_addr;
5101
5102 /* Initialize chip-specific details */
5103 {
5104 struct pmcraid_chip_details *chip_cfg = pinstance->chip_cfg;
5105 struct pmcraid_interrupts *pint_regs = &pinstance->int_regs;
5106
5107 pinstance->ioarrin = mapped_pci_addr + chip_cfg->ioarrin;
5108
5109 pint_regs->ioa_host_interrupt_reg =
5110 mapped_pci_addr + chip_cfg->ioa_host_intr;
5111 pint_regs->ioa_host_interrupt_clr_reg =
5112 mapped_pci_addr + chip_cfg->ioa_host_intr_clr;
c20c4267
AR
5113 pint_regs->ioa_host_msix_interrupt_reg =
5114 mapped_pci_addr + chip_cfg->ioa_host_msix_intr;
89a36810
AR
5115 pint_regs->host_ioa_interrupt_reg =
5116 mapped_pci_addr + chip_cfg->host_ioa_intr;
5117 pint_regs->host_ioa_interrupt_clr_reg =
5118 mapped_pci_addr + chip_cfg->host_ioa_intr_clr;
5119
5120 /* Current version of firmware exposes interrupt mask set
5121 * and mask clr registers through memory mapped bar0.
5122 */
5123 pinstance->mailbox = mapped_pci_addr + chip_cfg->mailbox;
5124 pinstance->ioa_status = mapped_pci_addr + chip_cfg->ioastatus;
5125 pint_regs->ioa_host_interrupt_mask_reg =
5126 mapped_pci_addr + chip_cfg->ioa_host_mask;
5127 pint_regs->ioa_host_interrupt_mask_clr_reg =
5128 mapped_pci_addr + chip_cfg->ioa_host_mask_clr;
5129 pint_regs->global_interrupt_mask_reg =
5130 mapped_pci_addr + chip_cfg->global_intr_mask;
5131 };
5132
5133 pinstance->ioa_reset_attempts = 0;
5134 init_waitqueue_head(&pinstance->reset_wait_q);
5135
5136 atomic_set(&pinstance->outstanding_cmds, 0);
c20c4267 5137 atomic_set(&pinstance->last_message_id, 0);
89a36810
AR
5138 atomic_set(&pinstance->expose_resources, 0);
5139
5140 INIT_LIST_HEAD(&pinstance->free_res_q);
5141 INIT_LIST_HEAD(&pinstance->used_res_q);
5142 INIT_LIST_HEAD(&pinstance->free_cmd_pool);
5143 INIT_LIST_HEAD(&pinstance->pending_cmd_pool);
5144
5145 spin_lock_init(&pinstance->free_pool_lock);
5146 spin_lock_init(&pinstance->pending_pool_lock);
5147 spin_lock_init(&pinstance->resource_lock);
5148 mutex_init(&pinstance->aen_queue_lock);
5149
5150 /* Work-queue (Shared) for deferred processing error handling */
5151 INIT_WORK(&pinstance->worker_q, pmcraid_worker_function);
5152
5153 /* Initialize the default log_level */
5154 pinstance->current_log_level = pmcraid_log_level;
5155
5156 /* Setup variables required for reset engine */
5157 pinstance->ioa_state = IOA_STATE_UNKNOWN;
5158 pinstance->reset_cmd = NULL;
5159 return 0;
5160}
5161
89a36810
AR
5162/**
5163 * pmcraid_shutdown - shutdown adapter controller.
5164 * @pdev: pci device struct
5165 *
5166 * Issues an adapter shutdown to the card waits for its completion
5167 *
5168 * Return value
5169 * none
5170 */
5171static void pmcraid_shutdown(struct pci_dev *pdev)
5172{
5173 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5174 pmcraid_reset_bringdown(pinstance);
5175}
5176
5177
5178/**
5179 * pmcraid_get_minor - returns unused minor number from minor number bitmap
5180 */
5181static unsigned short pmcraid_get_minor(void)
5182{
5183 int minor;
5184
36d9e0e8 5185 minor = find_first_zero_bit(pmcraid_minor, PMCRAID_MAX_ADAPTERS);
89a36810
AR
5186 __set_bit(minor, pmcraid_minor);
5187 return minor;
5188}
5189
5190/**
5191 * pmcraid_release_minor - releases given minor back to minor number bitmap
5192 */
5193static void pmcraid_release_minor(unsigned short minor)
5194{
5195 __clear_bit(minor, pmcraid_minor);
5196}
5197
5198/**
5199 * pmcraid_setup_chrdev - allocates a minor number and registers a char device
5200 *
5201 * @pinstance: pointer to adapter instance for which to register device
5202 *
5203 * Return value
5204 * 0 in case of success, otherwise non-zero
5205 */
5206static int pmcraid_setup_chrdev(struct pmcraid_instance *pinstance)
5207{
5208 int minor;
5209 int error;
5210
5211 minor = pmcraid_get_minor();
5212 cdev_init(&pinstance->cdev, &pmcraid_fops);
5213 pinstance->cdev.owner = THIS_MODULE;
5214
5215 error = cdev_add(&pinstance->cdev, MKDEV(pmcraid_major, minor), 1);
5216
5217 if (error)
5218 pmcraid_release_minor(minor);
5219 else
5220 device_create(pmcraid_class, NULL, MKDEV(pmcraid_major, minor),
c20c4267 5221 NULL, "%s%u", PMCRAID_DEVFILE, minor);
89a36810
AR
5222 return error;
5223}
5224
5225/**
5226 * pmcraid_release_chrdev - unregisters per-adapter management interface
5227 *
5228 * @pinstance: pointer to adapter instance structure
5229 *
5230 * Return value
5231 * none
5232 */
5233static void pmcraid_release_chrdev(struct pmcraid_instance *pinstance)
5234{
5235 pmcraid_release_minor(MINOR(pinstance->cdev.dev));
5236 device_destroy(pmcraid_class,
5237 MKDEV(pmcraid_major, MINOR(pinstance->cdev.dev)));
5238 cdev_del(&pinstance->cdev);
5239}
5240
5241/**
5242 * pmcraid_remove - IOA hot plug remove entry point
5243 * @pdev: pci device struct
5244 *
5245 * Return value
5246 * none
5247 */
6f039790 5248static void pmcraid_remove(struct pci_dev *pdev)
89a36810
AR
5249{
5250 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5251
5252 /* remove the management interface (/dev file) for this device */
5253 pmcraid_release_chrdev(pinstance);
5254
5255 /* remove host template from scsi midlayer */
5256 scsi_remove_host(pinstance->host);
5257
5258 /* block requests from mid-layer */
5259 scsi_block_requests(pinstance->host);
5260
5261 /* initiate shutdown adapter */
5262 pmcraid_shutdown(pdev);
5263
5264 pmcraid_disable_interrupts(pinstance, ~0);
43829731 5265 flush_work(&pinstance->worker_q);
89a36810
AR
5266
5267 pmcraid_kill_tasklets(pinstance);
5268 pmcraid_unregister_interrupt_handler(pinstance);
5269 pmcraid_release_buffers(pinstance);
5270 iounmap(pinstance->mapped_dma_addr);
5271 pci_release_regions(pdev);
5272 scsi_host_put(pinstance->host);
5273 pci_disable_device(pdev);
5274
5275 return;
5276}
5277
5278#ifdef CONFIG_PM
5279/**
5280 * pmcraid_suspend - driver suspend entry point for power management
5281 * @pdev: PCI device structure
5282 * @state: PCI power state to suspend routine
5283 *
5284 * Return Value - 0 always
5285 */
5286static int pmcraid_suspend(struct pci_dev *pdev, pm_message_t state)
5287{
5288 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5289
5290 pmcraid_shutdown(pdev);
5291 pmcraid_disable_interrupts(pinstance, ~0);
5292 pmcraid_kill_tasklets(pinstance);
5293 pci_set_drvdata(pinstance->pdev, pinstance);
5294 pmcraid_unregister_interrupt_handler(pinstance);
5295 pci_save_state(pdev);
5296 pci_disable_device(pdev);
5297 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5298
5299 return 0;
5300}
5301
5302/**
5303 * pmcraid_resume - driver resume entry point PCI power management
5304 * @pdev: PCI device structure
5305 *
5306 * Return Value - 0 in case of success. Error code in case of any failure
5307 */
5308static int pmcraid_resume(struct pci_dev *pdev)
5309{
5310 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5311 struct Scsi_Host *host = pinstance->host;
5312 int rc;
89a36810
AR
5313
5314 pci_set_power_state(pdev, PCI_D0);
5315 pci_enable_wake(pdev, PCI_D0, 0);
5316 pci_restore_state(pdev);
5317
5318 rc = pci_enable_device(pdev);
5319
5320 if (rc) {
34876402 5321 dev_err(&pdev->dev, "resume: Enable device failed\n");
89a36810
AR
5322 return rc;
5323 }
5324
5325 pci_set_master(pdev);
5326
5327 if ((sizeof(dma_addr_t) == 4) ||
5328 pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
5329 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
5330
5331 if (rc == 0)
5332 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
5333
5334 if (rc != 0) {
34876402 5335 dev_err(&pdev->dev, "resume: Failed to set PCI DMA mask\n");
89a36810
AR
5336 goto disable_device;
5337 }
5338
c20c4267 5339 pmcraid_disable_interrupts(pinstance, ~0);
89a36810 5340 atomic_set(&pinstance->outstanding_cmds, 0);
89a36810
AR
5341 rc = pmcraid_register_interrupt_handler(pinstance);
5342
5343 if (rc) {
34876402
AR
5344 dev_err(&pdev->dev,
5345 "resume: couldn't register interrupt handlers\n");
89a36810
AR
5346 rc = -ENODEV;
5347 goto release_host;
5348 }
5349
5350 pmcraid_init_tasklets(pinstance);
5351 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
5352
5353 /* Start with hard reset sequence which brings up IOA to operational
5354 * state as well as completes the reset sequence.
5355 */
5356 pinstance->ioa_hard_reset = 1;
5357
5358 /* Start IOA firmware initialization and bring card to Operational
5359 * state.
5360 */
5361 if (pmcraid_reset_bringup(pinstance)) {
c20c4267 5362 dev_err(&pdev->dev, "couldn't initialize IOA\n");
89a36810
AR
5363 rc = -ENODEV;
5364 goto release_tasklets;
5365 }
5366
5367 return 0;
5368
5369release_tasklets:
c20c4267 5370 pmcraid_disable_interrupts(pinstance, ~0);
89a36810
AR
5371 pmcraid_kill_tasklets(pinstance);
5372 pmcraid_unregister_interrupt_handler(pinstance);
5373
5374release_host:
5375 scsi_host_put(host);
5376
5377disable_device:
5378 pci_disable_device(pdev);
5379
5380 return rc;
5381}
5382
5383#else
5384
5385#define pmcraid_suspend NULL
5386#define pmcraid_resume NULL
5387
5388#endif /* CONFIG_PM */
5389
5390/**
5391 * pmcraid_complete_ioa_reset - Called by either timer or tasklet during
c20c4267 5392 * completion of the ioa reset
89a36810
AR
5393 * @cmd: pointer to reset command block
5394 */
5395static void pmcraid_complete_ioa_reset(struct pmcraid_cmd *cmd)
5396{
5397 struct pmcraid_instance *pinstance = cmd->drv_inst;
5398 unsigned long flags;
5399
5400 spin_lock_irqsave(pinstance->host->host_lock, flags);
5401 pmcraid_ioa_reset(cmd);
5402 spin_unlock_irqrestore(pinstance->host->host_lock, flags);
5403 scsi_unblock_requests(pinstance->host);
5404 schedule_work(&pinstance->worker_q);
5405}
5406
5407/**
5408 * pmcraid_set_supported_devs - sends SET SUPPORTED DEVICES to IOAFP
5409 *
5410 * @cmd: pointer to pmcraid_cmd structure
5411 *
5412 * Return Value
5413 * 0 for success or non-zero for failure cases
5414 */
5415static void pmcraid_set_supported_devs(struct pmcraid_cmd *cmd)
5416{
5417 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
5418 void (*cmd_done) (struct pmcraid_cmd *) = pmcraid_complete_ioa_reset;
5419
5420 pmcraid_reinit_cmdblk(cmd);
5421
5422 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
5423 ioarcb->request_type = REQ_TYPE_IOACMD;
5424 ioarcb->cdb[0] = PMCRAID_SET_SUPPORTED_DEVICES;
5425 ioarcb->cdb[1] = ALL_DEVICES_SUPPORTED;
5426
5427 /* If this was called as part of resource table reinitialization due to
5428 * lost CCN, it is enough to return the command block back to free pool
5429 * as part of set_supported_devs completion function.
5430 */
5431 if (cmd->drv_inst->reinit_cfg_table) {
5432 cmd->drv_inst->reinit_cfg_table = 0;
5433 cmd->release = 1;
5434 cmd_done = pmcraid_reinit_cfgtable_done;
5435 }
5436
5437 /* we will be done with the reset sequence after set supported devices,
5438 * setup the done function to return the command block back to free
5439 * pool
5440 */
5441 pmcraid_send_cmd(cmd,
5442 cmd_done,
5443 PMCRAID_SET_SUP_DEV_TIMEOUT,
5444 pmcraid_timeout_handler);
5445 return;
5446}
5447
592488a3
AR
5448/**
5449 * pmcraid_set_timestamp - set the timestamp to IOAFP
5450 *
5451 * @cmd: pointer to pmcraid_cmd structure
5452 *
5453 * Return Value
5454 * 0 for success or non-zero for failure cases
5455 */
5456static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd)
5457{
5458 struct pmcraid_instance *pinstance = cmd->drv_inst;
5459 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
5460 __be32 time_stamp_len = cpu_to_be32(PMCRAID_TIMESTAMP_LEN);
b22ee87d 5461 struct pmcraid_ioadl_desc *ioadl;
45c80be6 5462 u64 timestamp;
592488a3 5463
9c9bd593 5464 timestamp = ktime_get_real_seconds() * 1000;
592488a3
AR
5465
5466 pinstance->timestamp_data->timestamp[0] = (__u8)(timestamp);
5467 pinstance->timestamp_data->timestamp[1] = (__u8)((timestamp) >> 8);
5468 pinstance->timestamp_data->timestamp[2] = (__u8)((timestamp) >> 16);
5469 pinstance->timestamp_data->timestamp[3] = (__u8)((timestamp) >> 24);
5470 pinstance->timestamp_data->timestamp[4] = (__u8)((timestamp) >> 32);
5471 pinstance->timestamp_data->timestamp[5] = (__u8)((timestamp) >> 40);
5472
5473 pmcraid_reinit_cmdblk(cmd);
5474 ioarcb->request_type = REQ_TYPE_SCSI;
5475 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
5476 ioarcb->cdb[0] = PMCRAID_SCSI_SET_TIMESTAMP;
5477 ioarcb->cdb[1] = PMCRAID_SCSI_SERVICE_ACTION;
5478 memcpy(&(ioarcb->cdb[6]), &time_stamp_len, sizeof(time_stamp_len));
5479
5480 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
5481 offsetof(struct pmcraid_ioarcb,
5482 add_data.u.ioadl[0]));
5483 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
45c80be6 5484 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
592488a3
AR
5485
5486 ioarcb->request_flags0 |= NO_LINK_DESCS;
5487 ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
5488 ioarcb->data_transfer_length =
5489 cpu_to_le32(sizeof(struct pmcraid_timestamp_data));
5490 ioadl = &(ioarcb->add_data.u.ioadl[0]);
5491 ioadl->flags = IOADL_FLAGS_LAST_DESC;
5492 ioadl->address = cpu_to_le64(pinstance->timestamp_data_baddr);
5493 ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_timestamp_data));
5494
5495 if (!pinstance->timestamp_error) {
5496 pinstance->timestamp_error = 0;
5497 pmcraid_send_cmd(cmd, pmcraid_set_supported_devs,
5498 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
5499 } else {
5500 pmcraid_send_cmd(cmd, pmcraid_return_cmd,
5501 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
5502 return;
5503 }
5504}
5505
5506
89a36810
AR
5507/**
5508 * pmcraid_init_res_table - Initialize the resource table
5509 * @cmd: pointer to pmcraid command struct
5510 *
5511 * This function looks through the existing resource table, comparing
5512 * it with the config table. This function will take care of old/new
5513 * devices and schedule adding/removing them from the mid-layer
5514 * as appropriate.
5515 *
5516 * Return value
5517 * None
5518 */
5519static void pmcraid_init_res_table(struct pmcraid_cmd *cmd)
5520{
5521 struct pmcraid_instance *pinstance = cmd->drv_inst;
5522 struct pmcraid_resource_entry *res, *temp;
5523 struct pmcraid_config_table_entry *cfgte;
5524 unsigned long lock_flags;
5525 int found, rc, i;
c20c4267 5526 u16 fw_version;
89a36810
AR
5527 LIST_HEAD(old_res);
5528
5529 if (pinstance->cfg_table->flags & MICROCODE_UPDATE_REQUIRED)
34876402 5530 pmcraid_err("IOA requires microcode download\n");
89a36810 5531
c20c4267
AR
5532 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
5533
89a36810
AR
5534 /* resource list is protected by pinstance->resource_lock.
5535 * init_res_table can be called from probe (user-thread) or runtime
5536 * reset (timer/tasklet)
5537 */
5538 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
5539
5540 list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue)
5541 list_move_tail(&res->queue, &old_res);
5542
45c80be6 5543 for (i = 0; i < le16_to_cpu(pinstance->cfg_table->num_entries); i++) {
c20c4267
AR
5544 if (be16_to_cpu(pinstance->inq_data->fw_version) <=
5545 PMCRAID_FW_VERSION_1)
5546 cfgte = &pinstance->cfg_table->entries[i];
5547 else
5548 cfgte = (struct pmcraid_config_table_entry *)
5549 &pinstance->cfg_table->entries_ext[i];
89a36810 5550
c20c4267 5551 if (!pmcraid_expose_resource(fw_version, cfgte))
89a36810
AR
5552 continue;
5553
5554 found = 0;
5555
5556 /* If this entry was already detected and initialized */
5557 list_for_each_entry_safe(res, temp, &old_res, queue) {
5558
5559 rc = memcmp(&res->cfg_entry.resource_address,
5560 &cfgte->resource_address,
5561 sizeof(cfgte->resource_address));
5562 if (!rc) {
5563 list_move_tail(&res->queue,
5564 &pinstance->used_res_q);
5565 found = 1;
5566 break;
5567 }
5568 }
5569
5570 /* If this is new entry, initialize it and add it the queue */
5571 if (!found) {
5572
5573 if (list_empty(&pinstance->free_res_q)) {
34876402 5574 pmcraid_err("Too many devices attached\n");
89a36810
AR
5575 break;
5576 }
5577
5578 found = 1;
5579 res = list_entry(pinstance->free_res_q.next,
5580 struct pmcraid_resource_entry, queue);
5581
5582 res->scsi_dev = NULL;
5583 res->change_detected = RES_CHANGE_ADD;
5584 res->reset_progress = 0;
5585 list_move_tail(&res->queue, &pinstance->used_res_q);
5586 }
5587
5588 /* copy new configuration table entry details into driver
5589 * maintained resource entry
5590 */
5591 if (found) {
5592 memcpy(&res->cfg_entry, cfgte,
c20c4267 5593 pinstance->config_table_entry_size);
89a36810
AR
5594 pmcraid_info("New res type:%x, vset:%x, addr:%x:\n",
5595 res->cfg_entry.resource_type,
c20c4267
AR
5596 (fw_version <= PMCRAID_FW_VERSION_1 ?
5597 res->cfg_entry.unique_flags1 :
45c80be6 5598 le16_to_cpu(res->cfg_entry.array_id) & 0xFF),
89a36810
AR
5599 le32_to_cpu(res->cfg_entry.resource_address));
5600 }
5601 }
5602
5603 /* Detect any deleted entries, mark them for deletion from mid-layer */
5604 list_for_each_entry_safe(res, temp, &old_res, queue) {
5605
5606 if (res->scsi_dev) {
5607 res->change_detected = RES_CHANGE_DEL;
5608 res->cfg_entry.resource_handle =
5609 PMCRAID_INVALID_RES_HANDLE;
5610 list_move_tail(&res->queue, &pinstance->used_res_q);
5611 } else {
5612 list_move_tail(&res->queue, &pinstance->free_res_q);
5613 }
5614 }
5615
5616 /* release the resource list lock */
5617 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
592488a3 5618 pmcraid_set_timestamp(cmd);
89a36810
AR
5619}
5620
5621/**
5622 * pmcraid_querycfg - Send a Query IOA Config to the adapter.
5623 * @cmd: pointer pmcraid_cmd struct
5624 *
5625 * This function sends a Query IOA Configuration command to the adapter to
5626 * retrieve the IOA configuration table.
5627 *
5628 * Return value:
5629 * none
5630 */
5631static void pmcraid_querycfg(struct pmcraid_cmd *cmd)
5632{
5633 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
b22ee87d 5634 struct pmcraid_ioadl_desc *ioadl;
89a36810 5635 struct pmcraid_instance *pinstance = cmd->drv_inst;
45c80be6 5636 __be32 cfg_table_size = cpu_to_be32(sizeof(struct pmcraid_config_table));
89a36810 5637
c20c4267
AR
5638 if (be16_to_cpu(pinstance->inq_data->fw_version) <=
5639 PMCRAID_FW_VERSION_1)
5640 pinstance->config_table_entry_size =
5641 sizeof(struct pmcraid_config_table_entry);
5642 else
5643 pinstance->config_table_entry_size =
5644 sizeof(struct pmcraid_config_table_entry_ext);
5645
89a36810
AR
5646 ioarcb->request_type = REQ_TYPE_IOACMD;
5647 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
5648
5649 ioarcb->cdb[0] = PMCRAID_QUERY_IOA_CONFIG;
5650
5651 /* firmware requires 4-byte length field, specified in B.E format */
5652 memcpy(&(ioarcb->cdb[10]), &cfg_table_size, sizeof(cfg_table_size));
5653
5654 /* Since entire config table can be described by single IOADL, it can
5655 * be part of IOARCB itself
5656 */
5657 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
5658 offsetof(struct pmcraid_ioarcb,
5659 add_data.u.ioadl[0]));
5660 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
45c80be6 5661 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~0x1FULL);
89a36810
AR
5662
5663 ioarcb->request_flags0 |= NO_LINK_DESCS;
5664 ioarcb->data_transfer_length =
5665 cpu_to_le32(sizeof(struct pmcraid_config_table));
5666
5667 ioadl = &(ioarcb->add_data.u.ioadl[0]);
88197966 5668 ioadl->flags = IOADL_FLAGS_LAST_DESC;
89a36810
AR
5669 ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr);
5670 ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table));
5671
5672 pmcraid_send_cmd(cmd, pmcraid_init_res_table,
5673 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
5674}
5675
5676
5677/**
c20c4267 5678 * pmcraid_probe - PCI probe entry pointer for PMC MaxRAID controller driver
89a36810
AR
5679 * @pdev: pointer to pci device structure
5680 * @dev_id: pointer to device ids structure
5681 *
5682 * Return Value
5683 * returns 0 if the device is claimed and successfully configured.
5684 * returns non-zero error code in case of any failure
5685 */
6f039790
GKH
5686static int pmcraid_probe(struct pci_dev *pdev,
5687 const struct pci_device_id *dev_id)
89a36810
AR
5688{
5689 struct pmcraid_instance *pinstance;
5690 struct Scsi_Host *host;
5691 void __iomem *mapped_pci_addr;
5692 int rc = PCIBIOS_SUCCESSFUL;
5693
5694 if (atomic_read(&pmcraid_adapter_count) >= PMCRAID_MAX_ADAPTERS) {
5695 pmcraid_err
5696 ("maximum number(%d) of supported adapters reached\n",
5697 atomic_read(&pmcraid_adapter_count));
5698 return -ENOMEM;
5699 }
5700
5701 atomic_inc(&pmcraid_adapter_count);
5702 rc = pci_enable_device(pdev);
5703
5704 if (rc) {
5705 dev_err(&pdev->dev, "Cannot enable adapter\n");
5706 atomic_dec(&pmcraid_adapter_count);
5707 return rc;
5708 }
5709
5710 dev_info(&pdev->dev,
5711 "Found new IOA(%x:%x), Total IOA count: %d\n",
5712 pdev->vendor, pdev->device,
5713 atomic_read(&pmcraid_adapter_count));
5714
5715 rc = pci_request_regions(pdev, PMCRAID_DRIVER_NAME);
5716
5717 if (rc < 0) {
5718 dev_err(&pdev->dev,
5719 "Couldn't register memory range of registers\n");
5720 goto out_disable_device;
5721 }
5722
5723 mapped_pci_addr = pci_iomap(pdev, 0, 0);
5724
5725 if (!mapped_pci_addr) {
5726 dev_err(&pdev->dev, "Couldn't map PCI registers memory\n");
5727 rc = -ENOMEM;
5728 goto out_release_regions;
5729 }
5730
5731 pci_set_master(pdev);
5732
5733 /* Firmware requires the system bus address of IOARCB to be within
5734 * 32-bit addressable range though it has 64-bit IOARRIN register.
5735 * However, firmware supports 64-bit streaming DMA buffers, whereas
5736 * coherent buffers are to be 32-bit. Since pci_alloc_consistent always
5737 * returns memory within 4GB (if not, change this logic), coherent
25985edc 5738 * buffers are within firmware acceptable address ranges.
89a36810
AR
5739 */
5740 if ((sizeof(dma_addr_t) == 4) ||
5741 pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
5742 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
5743
5744 /* firmware expects 32-bit DMA addresses for IOARRIN register; set 32
5745 * bit mask for pci_alloc_consistent to return addresses within 4GB
5746 */
5747 if (rc == 0)
5748 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
5749
5750 if (rc != 0) {
5751 dev_err(&pdev->dev, "Failed to set PCI DMA mask\n");
5752 goto cleanup_nomem;
5753 }
5754
5755 host = scsi_host_alloc(&pmcraid_host_template,
5756 sizeof(struct pmcraid_instance));
5757
5758 if (!host) {
5759 dev_err(&pdev->dev, "scsi_host_alloc failed!\n");
5760 rc = -ENOMEM;
5761 goto cleanup_nomem;
5762 }
5763
5764 host->max_id = PMCRAID_MAX_NUM_TARGETS_PER_BUS;
5765 host->max_lun = PMCRAID_MAX_NUM_LUNS_PER_TARGET;
5766 host->unique_id = host->host_no;
5767 host->max_channel = PMCRAID_MAX_BUS_TO_SCAN;
5768 host->max_cmd_len = PMCRAID_MAX_CDB_LEN;
5769
5770 /* zero out entire instance structure */
5771 pinstance = (struct pmcraid_instance *)host->hostdata;
5772 memset(pinstance, 0, sizeof(*pinstance));
5773
5774 pinstance->chip_cfg =
5775 (struct pmcraid_chip_details *)(dev_id->driver_data);
5776
5777 rc = pmcraid_init_instance(pdev, host, mapped_pci_addr);
5778
5779 if (rc < 0) {
5780 dev_err(&pdev->dev, "failed to initialize adapter instance\n");
5781 goto out_scsi_host_put;
5782 }
5783
5784 pci_set_drvdata(pdev, pinstance);
5785
5786 /* Save PCI config-space for use following the reset */
5787 rc = pci_save_state(pinstance->pdev);
5788
5789 if (rc != 0) {
5790 dev_err(&pdev->dev, "Failed to save PCI config space\n");
5791 goto out_scsi_host_put;
5792 }
5793
5794 pmcraid_disable_interrupts(pinstance, ~0);
5795
5796 rc = pmcraid_register_interrupt_handler(pinstance);
5797
5798 if (rc) {
34876402 5799 dev_err(&pdev->dev, "couldn't register interrupt handler\n");
89a36810
AR
5800 goto out_scsi_host_put;
5801 }
5802
5803 pmcraid_init_tasklets(pinstance);
5804
5805 /* allocate verious buffers used by LLD.*/
5806 rc = pmcraid_init_buffers(pinstance);
5807
5808 if (rc) {
5809 pmcraid_err("couldn't allocate memory blocks\n");
5810 goto out_unregister_isr;
5811 }
5812
5813 /* check the reset type required */
5814 pmcraid_reset_type(pinstance);
5815
5816 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
5817
5818 /* Start IOA firmware initialization and bring card to Operational
5819 * state.
5820 */
5821 pmcraid_info("starting IOA initialization sequence\n");
5822 if (pmcraid_reset_bringup(pinstance)) {
c20c4267 5823 dev_err(&pdev->dev, "couldn't initialize IOA\n");
89a36810
AR
5824 rc = 1;
5825 goto out_release_bufs;
5826 }
5827
5828 /* Add adapter instance into mid-layer list */
5829 rc = scsi_add_host(pinstance->host, &pdev->dev);
5830 if (rc != 0) {
5831 pmcraid_err("couldn't add host into mid-layer: %d\n", rc);
5832 goto out_release_bufs;
5833 }
5834
5835 scsi_scan_host(pinstance->host);
5836
5837 rc = pmcraid_setup_chrdev(pinstance);
5838
5839 if (rc != 0) {
5840 pmcraid_err("couldn't create mgmt interface, error: %x\n",
5841 rc);
5842 goto out_remove_host;
5843 }
5844
5845 /* Schedule worker thread to handle CCN and take care of adding and
5846 * removing devices to OS
5847 */
5848 atomic_set(&pinstance->expose_resources, 1);
5849 schedule_work(&pinstance->worker_q);
5850 return rc;
5851
5852out_remove_host:
5853 scsi_remove_host(host);
5854
5855out_release_bufs:
5856 pmcraid_release_buffers(pinstance);
5857
5858out_unregister_isr:
5859 pmcraid_kill_tasklets(pinstance);
5860 pmcraid_unregister_interrupt_handler(pinstance);
5861
5862out_scsi_host_put:
5863 scsi_host_put(host);
5864
5865cleanup_nomem:
5866 iounmap(mapped_pci_addr);
5867
5868out_release_regions:
5869 pci_release_regions(pdev);
5870
5871out_disable_device:
5872 atomic_dec(&pmcraid_adapter_count);
89a36810
AR
5873 pci_disable_device(pdev);
5874 return -ENODEV;
5875}
5876
5877/*
5878 * PCI driver structure of pcmraid driver
5879 */
5880static struct pci_driver pmcraid_driver = {
5881 .name = PMCRAID_DRIVER_NAME,
5882 .id_table = pmcraid_pci_table,
5883 .probe = pmcraid_probe,
5884 .remove = pmcraid_remove,
5885 .suspend = pmcraid_suspend,
5886 .resume = pmcraid_resume,
5887 .shutdown = pmcraid_shutdown
5888};
5889
89a36810
AR
5890/**
5891 * pmcraid_init - module load entry point
5892 */
5893static int __init pmcraid_init(void)
5894{
5895 dev_t dev;
5896 int error;
5897
a1b66665
MM
5898 pmcraid_info("%s Device Driver version: %s\n",
5899 PMCRAID_DRIVER_NAME, PMCRAID_DRIVER_VERSION);
89a36810
AR
5900
5901 error = alloc_chrdev_region(&dev, 0,
5902 PMCRAID_MAX_ADAPTERS,
5903 PMCRAID_DEVFILE);
5904
5905 if (error) {
5906 pmcraid_err("failed to get a major number for adapters\n");
5907 goto out_init;
5908 }
5909
5910 pmcraid_major = MAJOR(dev);
5911 pmcraid_class = class_create(THIS_MODULE, PMCRAID_DEVFILE);
5912
5913 if (IS_ERR(pmcraid_class)) {
5914 error = PTR_ERR(pmcraid_class);
278cee05 5915 pmcraid_err("failed to register with sysfs, error = %x\n",
89a36810
AR
5916 error);
5917 goto out_unreg_chrdev;
5918 }
5919
89a36810
AR
5920 error = pmcraid_netlink_init();
5921
2d76a247
QL
5922 if (error) {
5923 class_destroy(pmcraid_class);
89a36810 5924 goto out_unreg_chrdev;
2d76a247 5925 }
89a36810
AR
5926
5927 error = pci_register_driver(&pmcraid_driver);
5928
5929 if (error == 0)
5930 goto out_init;
5931
5932 pmcraid_err("failed to register pmcraid driver, error = %x\n",
5933 error);
5934 class_destroy(pmcraid_class);
5935 pmcraid_netlink_release();
5936
5937out_unreg_chrdev:
5938 unregister_chrdev_region(MKDEV(pmcraid_major, 0), PMCRAID_MAX_ADAPTERS);
34876402 5939
89a36810
AR
5940out_init:
5941 return error;
5942}
5943
5944/**
5945 * pmcraid_exit - module unload entry point
5946 */
5947static void __exit pmcraid_exit(void)
5948{
5949 pmcraid_netlink_release();
89a36810
AR
5950 unregister_chrdev_region(MKDEV(pmcraid_major, 0),
5951 PMCRAID_MAX_ADAPTERS);
5952 pci_unregister_driver(&pmcraid_driver);
592488a3 5953 class_destroy(pmcraid_class);
89a36810
AR
5954}
5955
5956module_init(pmcraid_init);
5957module_exit(pmcraid_exit);