dbf9bfe6 |
1 | /* |
2 | * PMC-Sierra SPC 8001 SAS/SATA based host adapters driver |
3 | * |
4 | * Copyright (c) 2008-2009 USI Co., Ltd. |
5 | * All rights reserved. |
6 | * |
7 | * Redistribution and use in source and binary forms, with or without |
8 | * modification, are permitted provided that the following conditions |
9 | * are met: |
10 | * 1. Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions, and the following disclaimer, |
12 | * without modification. |
13 | * 2. Redistributions in binary form must reproduce at minimum a disclaimer |
14 | * substantially similar to the "NO WARRANTY" disclaimer below |
15 | * ("Disclaimer") and any redistribution must be conditioned upon |
16 | * including a substantially similar Disclaimer requirement for further |
17 | * binary redistribution. |
18 | * 3. Neither the names of the above-listed copyright holders nor the names |
19 | * of any contributors may be used to endorse or promote products derived |
20 | * from this software without specific prior written permission. |
21 | * |
22 | * Alternatively, this software may be distributed under the terms of the |
23 | * GNU General Public License ("GPL") version 2 as published by the Free |
24 | * Software Foundation. |
25 | * |
26 | * NO WARRANTY |
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR |
30 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
31 | * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
32 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
33 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
34 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
35 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING |
36 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
37 | * POSSIBILITY OF SUCH DAMAGES. |
38 | * |
39 | */ |
40 | |
41 | #include "pm8001_sas.h" |
42 | #include "pm8001_chips.h" |
43 | |
44 | static struct scsi_transport_template *pm8001_stt; |
45 | |
46 | static const struct pm8001_chip_info pm8001_chips[] = { |
47 | [chip_8001] = { 8, &pm8001_8001_dispatch,}, |
48 | }; |
49 | static int pm8001_id; |
50 | |
51 | LIST_HEAD(hba_list); |
52 | |
53 | /** |
54 | * The main structure which LLDD must register for scsi core. |
55 | */ |
56 | static struct scsi_host_template pm8001_sht = { |
57 | .module = THIS_MODULE, |
58 | .name = DRV_NAME, |
59 | .queuecommand = sas_queuecommand, |
60 | .target_alloc = sas_target_alloc, |
61 | .slave_configure = pm8001_slave_configure, |
62 | .slave_destroy = sas_slave_destroy, |
63 | .scan_finished = pm8001_scan_finished, |
64 | .scan_start = pm8001_scan_start, |
65 | .change_queue_depth = sas_change_queue_depth, |
66 | .change_queue_type = sas_change_queue_type, |
67 | .bios_param = sas_bios_param, |
68 | .can_queue = 1, |
69 | .cmd_per_lun = 1, |
70 | .this_id = -1, |
71 | .sg_tablesize = SG_ALL, |
72 | .max_sectors = SCSI_DEFAULT_MAX_SECTORS, |
73 | .use_clustering = ENABLE_CLUSTERING, |
74 | .eh_device_reset_handler = sas_eh_device_reset_handler, |
75 | .eh_bus_reset_handler = sas_eh_bus_reset_handler, |
76 | .slave_alloc = pm8001_slave_alloc, |
77 | .target_destroy = sas_target_destroy, |
78 | .ioctl = sas_ioctl, |
79 | .shost_attrs = pm8001_host_attrs, |
80 | }; |
81 | |
82 | /** |
83 | * Sas layer call this function to execute specific task. |
84 | */ |
85 | static struct sas_domain_function_template pm8001_transport_ops = { |
86 | .lldd_dev_found = pm8001_dev_found, |
87 | .lldd_dev_gone = pm8001_dev_gone, |
88 | |
89 | .lldd_execute_task = pm8001_queue_command, |
90 | .lldd_control_phy = pm8001_phy_control, |
91 | |
92 | .lldd_abort_task = pm8001_abort_task, |
93 | .lldd_abort_task_set = pm8001_abort_task_set, |
94 | .lldd_clear_aca = pm8001_clear_aca, |
95 | .lldd_clear_task_set = pm8001_clear_task_set, |
96 | .lldd_I_T_nexus_reset = pm8001_I_T_nexus_reset, |
97 | .lldd_lu_reset = pm8001_lu_reset, |
98 | .lldd_query_task = pm8001_query_task, |
99 | }; |
100 | |
101 | /** |
102 | *pm8001_phy_init - initiate our adapter phys |
103 | *@pm8001_ha: our hba structure. |
104 | *@phy_id: phy id. |
105 | */ |
106 | static void __devinit pm8001_phy_init(struct pm8001_hba_info *pm8001_ha, |
107 | int phy_id) |
108 | { |
109 | struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; |
110 | struct asd_sas_phy *sas_phy = &phy->sas_phy; |
111 | phy->phy_state = 0; |
112 | phy->pm8001_ha = pm8001_ha; |
113 | sas_phy->enabled = (phy_id < pm8001_ha->chip->n_phy) ? 1 : 0; |
114 | sas_phy->class = SAS; |
115 | sas_phy->iproto = SAS_PROTOCOL_ALL; |
116 | sas_phy->tproto = 0; |
117 | sas_phy->type = PHY_TYPE_PHYSICAL; |
118 | sas_phy->role = PHY_ROLE_INITIATOR; |
119 | sas_phy->oob_mode = OOB_NOT_CONNECTED; |
120 | sas_phy->linkrate = SAS_LINK_RATE_UNKNOWN; |
121 | sas_phy->id = phy_id; |
122 | sas_phy->sas_addr = &pm8001_ha->sas_addr[0]; |
123 | sas_phy->frame_rcvd = &phy->frame_rcvd[0]; |
124 | sas_phy->ha = (struct sas_ha_struct *)pm8001_ha->shost->hostdata; |
125 | sas_phy->lldd_phy = phy; |
126 | } |
127 | |
128 | /** |
129 | *pm8001_free - free hba |
130 | *@pm8001_ha: our hba structure. |
131 | * |
132 | */ |
133 | static void pm8001_free(struct pm8001_hba_info *pm8001_ha) |
134 | { |
135 | int i; |
136 | struct pm8001_wq *wq; |
137 | |
138 | if (!pm8001_ha) |
139 | return; |
140 | |
141 | for (i = 0; i < USI_MAX_MEMCNT; i++) { |
142 | if (pm8001_ha->memoryMap.region[i].virt_ptr != NULL) { |
143 | pci_free_consistent(pm8001_ha->pdev, |
144 | pm8001_ha->memoryMap.region[i].element_size, |
145 | pm8001_ha->memoryMap.region[i].virt_ptr, |
146 | pm8001_ha->memoryMap.region[i].phys_addr); |
147 | } |
148 | } |
149 | PM8001_CHIP_DISP->chip_iounmap(pm8001_ha); |
150 | if (pm8001_ha->shost) |
151 | scsi_host_put(pm8001_ha->shost); |
152 | list_for_each_entry(wq, &pm8001_ha->wq_list, entry) |
153 | cancel_delayed_work(&wq->work_q); |
154 | kfree(pm8001_ha->tags); |
155 | kfree(pm8001_ha); |
156 | } |
157 | |
158 | #ifdef PM8001_USE_TASKLET |
159 | static void pm8001_tasklet(unsigned long opaque) |
160 | { |
161 | struct pm8001_hba_info *pm8001_ha; |
162 | pm8001_ha = (struct pm8001_hba_info *)opaque;; |
163 | if (unlikely(!pm8001_ha)) |
164 | BUG_ON(1); |
165 | PM8001_CHIP_DISP->isr(pm8001_ha); |
166 | } |
167 | #endif |
168 | |
169 | |
170 | /** |
171 | * pm8001_interrupt - when HBA originate a interrupt,we should invoke this |
172 | * dispatcher to handle each case. |
173 | * @irq: irq number. |
174 | * @opaque: the passed general host adapter struct |
175 | */ |
176 | static irqreturn_t pm8001_interrupt(int irq, void *opaque) |
177 | { |
178 | struct pm8001_hba_info *pm8001_ha; |
179 | irqreturn_t ret = IRQ_HANDLED; |
180 | struct sas_ha_struct *sha = opaque; |
181 | pm8001_ha = sha->lldd_ha; |
182 | if (unlikely(!pm8001_ha)) |
183 | return IRQ_NONE; |
184 | if (!PM8001_CHIP_DISP->is_our_interupt(pm8001_ha)) |
185 | return IRQ_NONE; |
186 | #ifdef PM8001_USE_TASKLET |
187 | tasklet_schedule(&pm8001_ha->tasklet); |
188 | #else |
189 | ret = PM8001_CHIP_DISP->isr(pm8001_ha); |
190 | #endif |
191 | return ret; |
192 | } |
193 | |
194 | /** |
195 | * pm8001_alloc - initiate our hba structure and 6 DMAs area. |
196 | * @pm8001_ha:our hba structure. |
197 | * |
198 | */ |
199 | static int __devinit pm8001_alloc(struct pm8001_hba_info *pm8001_ha) |
200 | { |
201 | int i; |
202 | spin_lock_init(&pm8001_ha->lock); |
1cc943ae |
203 | for (i = 0; i < pm8001_ha->chip->n_phy; i++) { |
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204 | pm8001_phy_init(pm8001_ha, i); |
1cc943ae |
205 | pm8001_ha->port[i].wide_port_phymap = 0; |
206 | pm8001_ha->port[i].port_attached = 0; |
207 | pm8001_ha->port[i].port_state = 0; |
208 | INIT_LIST_HEAD(&pm8001_ha->port[i].list); |
209 | } |
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210 | |
97ee2088 |
211 | pm8001_ha->tags = kzalloc(PM8001_MAX_CCB, GFP_KERNEL); |
212 | if (!pm8001_ha->tags) |
213 | goto err_out; |
dbf9bfe6 |
214 | /* MPI Memory region 1 for AAP Event Log for fw */ |
215 | pm8001_ha->memoryMap.region[AAP1].num_elements = 1; |
216 | pm8001_ha->memoryMap.region[AAP1].element_size = PM8001_EVENT_LOG_SIZE; |
217 | pm8001_ha->memoryMap.region[AAP1].total_len = PM8001_EVENT_LOG_SIZE; |
218 | pm8001_ha->memoryMap.region[AAP1].alignment = 32; |
219 | |
220 | /* MPI Memory region 2 for IOP Event Log for fw */ |
221 | pm8001_ha->memoryMap.region[IOP].num_elements = 1; |
222 | pm8001_ha->memoryMap.region[IOP].element_size = PM8001_EVENT_LOG_SIZE; |
223 | pm8001_ha->memoryMap.region[IOP].total_len = PM8001_EVENT_LOG_SIZE; |
224 | pm8001_ha->memoryMap.region[IOP].alignment = 32; |
225 | |
226 | /* MPI Memory region 3 for consumer Index of inbound queues */ |
227 | pm8001_ha->memoryMap.region[CI].num_elements = 1; |
228 | pm8001_ha->memoryMap.region[CI].element_size = 4; |
229 | pm8001_ha->memoryMap.region[CI].total_len = 4; |
230 | pm8001_ha->memoryMap.region[CI].alignment = 4; |
231 | |
232 | /* MPI Memory region 4 for producer Index of outbound queues */ |
233 | pm8001_ha->memoryMap.region[PI].num_elements = 1; |
234 | pm8001_ha->memoryMap.region[PI].element_size = 4; |
235 | pm8001_ha->memoryMap.region[PI].total_len = 4; |
236 | pm8001_ha->memoryMap.region[PI].alignment = 4; |
237 | |
238 | /* MPI Memory region 5 inbound queues */ |
239 | pm8001_ha->memoryMap.region[IB].num_elements = 256; |
240 | pm8001_ha->memoryMap.region[IB].element_size = 64; |
241 | pm8001_ha->memoryMap.region[IB].total_len = 256 * 64; |
242 | pm8001_ha->memoryMap.region[IB].alignment = 64; |
243 | |
244 | /* MPI Memory region 6 inbound queues */ |
245 | pm8001_ha->memoryMap.region[OB].num_elements = 256; |
246 | pm8001_ha->memoryMap.region[OB].element_size = 64; |
247 | pm8001_ha->memoryMap.region[OB].total_len = 256 * 64; |
248 | pm8001_ha->memoryMap.region[OB].alignment = 64; |
249 | |
250 | /* Memory region write DMA*/ |
251 | pm8001_ha->memoryMap.region[NVMD].num_elements = 1; |
252 | pm8001_ha->memoryMap.region[NVMD].element_size = 4096; |
253 | pm8001_ha->memoryMap.region[NVMD].total_len = 4096; |
254 | /* Memory region for devices*/ |
255 | pm8001_ha->memoryMap.region[DEV_MEM].num_elements = 1; |
256 | pm8001_ha->memoryMap.region[DEV_MEM].element_size = PM8001_MAX_DEVICES * |
257 | sizeof(struct pm8001_device); |
258 | pm8001_ha->memoryMap.region[DEV_MEM].total_len = PM8001_MAX_DEVICES * |
259 | sizeof(struct pm8001_device); |
260 | |
261 | /* Memory region for ccb_info*/ |
262 | pm8001_ha->memoryMap.region[CCB_MEM].num_elements = 1; |
263 | pm8001_ha->memoryMap.region[CCB_MEM].element_size = PM8001_MAX_CCB * |
264 | sizeof(struct pm8001_ccb_info); |
265 | pm8001_ha->memoryMap.region[CCB_MEM].total_len = PM8001_MAX_CCB * |
266 | sizeof(struct pm8001_ccb_info); |
267 | |
268 | for (i = 0; i < USI_MAX_MEMCNT; i++) { |
269 | if (pm8001_mem_alloc(pm8001_ha->pdev, |
270 | &pm8001_ha->memoryMap.region[i].virt_ptr, |
271 | &pm8001_ha->memoryMap.region[i].phys_addr, |
272 | &pm8001_ha->memoryMap.region[i].phys_addr_hi, |
273 | &pm8001_ha->memoryMap.region[i].phys_addr_lo, |
274 | pm8001_ha->memoryMap.region[i].total_len, |
275 | pm8001_ha->memoryMap.region[i].alignment) != 0) { |
276 | PM8001_FAIL_DBG(pm8001_ha, |
277 | pm8001_printk("Mem%d alloc failed\n", |
278 | i)); |
279 | goto err_out; |
280 | } |
281 | } |
282 | |
283 | pm8001_ha->devices = pm8001_ha->memoryMap.region[DEV_MEM].virt_ptr; |
284 | for (i = 0; i < PM8001_MAX_DEVICES; i++) { |
285 | pm8001_ha->devices[i].dev_type = NO_DEVICE; |
286 | pm8001_ha->devices[i].id = i; |
287 | pm8001_ha->devices[i].device_id = PM8001_MAX_DEVICES; |
288 | pm8001_ha->devices[i].running_req = 0; |
289 | } |
290 | pm8001_ha->ccb_info = pm8001_ha->memoryMap.region[CCB_MEM].virt_ptr; |
291 | for (i = 0; i < PM8001_MAX_CCB; i++) { |
292 | pm8001_ha->ccb_info[i].ccb_dma_handle = |
293 | pm8001_ha->memoryMap.region[CCB_MEM].phys_addr + |
294 | i * sizeof(struct pm8001_ccb_info); |
97ee2088 |
295 | pm8001_ha->ccb_info[i].task = NULL; |
296 | pm8001_ha->ccb_info[i].ccb_tag = 0xffffffff; |
297 | pm8001_ha->ccb_info[i].device = NULL; |
dbf9bfe6 |
298 | ++pm8001_ha->tags_num; |
299 | } |
300 | pm8001_ha->flags = PM8001F_INIT_TIME; |
301 | /* Initialize tags */ |
302 | pm8001_tag_init(pm8001_ha); |
303 | return 0; |
304 | err_out: |
305 | return 1; |
306 | } |
307 | |
308 | /** |
309 | * pm8001_ioremap - remap the pci high physical address to kernal virtual |
310 | * address so that we can access them. |
311 | * @pm8001_ha:our hba structure. |
312 | */ |
313 | static int pm8001_ioremap(struct pm8001_hba_info *pm8001_ha) |
314 | { |
315 | u32 bar; |
316 | u32 logicalBar = 0; |
317 | struct pci_dev *pdev; |
318 | |
319 | pdev = pm8001_ha->pdev; |
320 | /* map pci mem (PMC pci base 0-3)*/ |
321 | for (bar = 0; bar < 6; bar++) { |
322 | /* |
323 | ** logical BARs for SPC: |
324 | ** bar 0 and 1 - logical BAR0 |
325 | ** bar 2 and 3 - logical BAR1 |
326 | ** bar4 - logical BAR2 |
327 | ** bar5 - logical BAR3 |
328 | ** Skip the appropriate assignments: |
329 | */ |
330 | if ((bar == 1) || (bar == 3)) |
331 | continue; |
332 | if (pci_resource_flags(pdev, bar) & IORESOURCE_MEM) { |
333 | pm8001_ha->io_mem[logicalBar].membase = |
334 | pci_resource_start(pdev, bar); |
335 | pm8001_ha->io_mem[logicalBar].membase &= |
336 | (u32)PCI_BASE_ADDRESS_MEM_MASK; |
337 | pm8001_ha->io_mem[logicalBar].memsize = |
338 | pci_resource_len(pdev, bar); |
339 | pm8001_ha->io_mem[logicalBar].memvirtaddr = |
340 | ioremap(pm8001_ha->io_mem[logicalBar].membase, |
341 | pm8001_ha->io_mem[logicalBar].memsize); |
342 | PM8001_INIT_DBG(pm8001_ha, |
343 | pm8001_printk("PCI: bar %d, logicalBar %d " |
344 | "virt_addr=%lx,len=%d\n", bar, logicalBar, |
345 | (unsigned long) |
346 | pm8001_ha->io_mem[logicalBar].memvirtaddr, |
347 | pm8001_ha->io_mem[logicalBar].memsize)); |
348 | } else { |
349 | pm8001_ha->io_mem[logicalBar].membase = 0; |
350 | pm8001_ha->io_mem[logicalBar].memsize = 0; |
351 | pm8001_ha->io_mem[logicalBar].memvirtaddr = 0; |
352 | } |
353 | logicalBar++; |
354 | } |
355 | return 0; |
356 | } |
357 | |
358 | /** |
359 | * pm8001_pci_alloc - initialize our ha card structure |
360 | * @pdev: pci device. |
361 | * @ent: ent |
362 | * @shost: scsi host struct which has been initialized before. |
363 | */ |
364 | static struct pm8001_hba_info *__devinit |
365 | pm8001_pci_alloc(struct pci_dev *pdev, u32 chip_id, struct Scsi_Host *shost) |
366 | { |
367 | struct pm8001_hba_info *pm8001_ha; |
368 | struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); |
369 | |
370 | |
371 | pm8001_ha = sha->lldd_ha; |
372 | if (!pm8001_ha) |
373 | return NULL; |
374 | |
375 | pm8001_ha->pdev = pdev; |
376 | pm8001_ha->dev = &pdev->dev; |
377 | pm8001_ha->chip_id = chip_id; |
378 | pm8001_ha->chip = &pm8001_chips[pm8001_ha->chip_id]; |
379 | pm8001_ha->irq = pdev->irq; |
380 | pm8001_ha->sas = sha; |
381 | pm8001_ha->shost = shost; |
382 | pm8001_ha->id = pm8001_id++; |
383 | INIT_LIST_HEAD(&pm8001_ha->wq_list); |
384 | pm8001_ha->logging_level = 0x01; |
385 | sprintf(pm8001_ha->name, "%s%d", DRV_NAME, pm8001_ha->id); |
386 | #ifdef PM8001_USE_TASKLET |
387 | tasklet_init(&pm8001_ha->tasklet, pm8001_tasklet, |
388 | (unsigned long)pm8001_ha); |
389 | #endif |
390 | pm8001_ioremap(pm8001_ha); |
391 | if (!pm8001_alloc(pm8001_ha)) |
392 | return pm8001_ha; |
393 | pm8001_free(pm8001_ha); |
394 | return NULL; |
395 | } |
396 | |
397 | /** |
398 | * pci_go_44 - pm8001 specified, its DMA is 44 bit rather than 64 bit |
399 | * @pdev: pci device. |
400 | */ |
401 | static int pci_go_44(struct pci_dev *pdev) |
402 | { |
403 | int rc; |
404 | |
405 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(44))) { |
406 | rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(44)); |
407 | if (rc) { |
408 | rc = pci_set_consistent_dma_mask(pdev, |
409 | DMA_BIT_MASK(32)); |
410 | if (rc) { |
411 | dev_printk(KERN_ERR, &pdev->dev, |
412 | "44-bit DMA enable failed\n"); |
413 | return rc; |
414 | } |
415 | } |
416 | } else { |
417 | rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); |
418 | if (rc) { |
419 | dev_printk(KERN_ERR, &pdev->dev, |
420 | "32-bit DMA enable failed\n"); |
421 | return rc; |
422 | } |
423 | rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); |
424 | if (rc) { |
425 | dev_printk(KERN_ERR, &pdev->dev, |
426 | "32-bit consistent DMA enable failed\n"); |
427 | return rc; |
428 | } |
429 | } |
430 | return rc; |
431 | } |
432 | |
433 | /** |
434 | * pm8001_prep_sas_ha_init - allocate memory in general hba struct && init them. |
435 | * @shost: scsi host which has been allocated outside. |
436 | * @chip_info: our ha struct. |
437 | */ |
438 | static int __devinit pm8001_prep_sas_ha_init(struct Scsi_Host * shost, |
439 | const struct pm8001_chip_info *chip_info) |
440 | { |
441 | int phy_nr, port_nr; |
442 | struct asd_sas_phy **arr_phy; |
443 | struct asd_sas_port **arr_port; |
444 | struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); |
445 | |
446 | phy_nr = chip_info->n_phy; |
447 | port_nr = phy_nr; |
448 | memset(sha, 0x00, sizeof(*sha)); |
449 | arr_phy = kcalloc(phy_nr, sizeof(void *), GFP_KERNEL); |
450 | if (!arr_phy) |
451 | goto exit; |
452 | arr_port = kcalloc(port_nr, sizeof(void *), GFP_KERNEL); |
453 | if (!arr_port) |
454 | goto exit_free2; |
455 | |
456 | sha->sas_phy = arr_phy; |
457 | sha->sas_port = arr_port; |
458 | sha->lldd_ha = kzalloc(sizeof(struct pm8001_hba_info), GFP_KERNEL); |
459 | if (!sha->lldd_ha) |
460 | goto exit_free1; |
461 | |
462 | shost->transportt = pm8001_stt; |
463 | shost->max_id = PM8001_MAX_DEVICES; |
464 | shost->max_lun = 8; |
465 | shost->max_channel = 0; |
466 | shost->unique_id = pm8001_id; |
467 | shost->max_cmd_len = 16; |
468 | shost->can_queue = PM8001_CAN_QUEUE; |
469 | shost->cmd_per_lun = 32; |
470 | return 0; |
471 | exit_free1: |
472 | kfree(arr_port); |
473 | exit_free2: |
474 | kfree(arr_phy); |
475 | exit: |
476 | return -1; |
477 | } |
478 | |
479 | /** |
480 | * pm8001_post_sas_ha_init - initialize general hba struct defined in libsas |
481 | * @shost: scsi host which has been allocated outside |
482 | * @chip_info: our ha struct. |
483 | */ |
484 | static void __devinit pm8001_post_sas_ha_init(struct Scsi_Host *shost, |
485 | const struct pm8001_chip_info *chip_info) |
486 | { |
487 | int i = 0; |
488 | struct pm8001_hba_info *pm8001_ha; |
489 | struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); |
490 | |
491 | pm8001_ha = sha->lldd_ha; |
492 | for (i = 0; i < chip_info->n_phy; i++) { |
493 | sha->sas_phy[i] = &pm8001_ha->phy[i].sas_phy; |
494 | sha->sas_port[i] = &pm8001_ha->port[i].sas_port; |
495 | } |
496 | sha->sas_ha_name = DRV_NAME; |
497 | sha->dev = pm8001_ha->dev; |
498 | |
499 | sha->lldd_module = THIS_MODULE; |
500 | sha->sas_addr = &pm8001_ha->sas_addr[0]; |
501 | sha->num_phys = chip_info->n_phy; |
502 | sha->lldd_max_execute_num = 1; |
503 | sha->lldd_queue_size = PM8001_CAN_QUEUE; |
504 | sha->core.shost = shost; |
505 | } |
506 | |
507 | /** |
508 | * pm8001_init_sas_add - initialize sas address |
509 | * @chip_info: our ha struct. |
510 | * |
511 | * Currently we just set the fixed SAS address to our HBA,for manufacture, |
512 | * it should read from the EEPROM |
513 | */ |
514 | static void pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha) |
515 | { |
516 | u8 i; |
517 | #ifdef PM8001_READ_VPD |
518 | DECLARE_COMPLETION_ONSTACK(completion); |
519 | pm8001_ha->nvmd_completion = &completion; |
520 | PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, 0, 0); |
521 | wait_for_completion(&completion); |
522 | for (i = 0; i < pm8001_ha->chip->n_phy; i++) { |
523 | memcpy(&pm8001_ha->phy[i].dev_sas_addr, pm8001_ha->sas_addr, |
524 | SAS_ADDR_SIZE); |
525 | PM8001_INIT_DBG(pm8001_ha, |
526 | pm8001_printk("phy %d sas_addr = %x \n", i, |
527 | (u64)pm8001_ha->phy[i].dev_sas_addr)); |
528 | } |
529 | #else |
530 | for (i = 0; i < pm8001_ha->chip->n_phy; i++) { |
531 | pm8001_ha->phy[i].dev_sas_addr = 0x500e004010000004ULL; |
532 | pm8001_ha->phy[i].dev_sas_addr = |
533 | cpu_to_be64((u64) |
534 | (*(u64 *)&pm8001_ha->phy[i].dev_sas_addr)); |
535 | } |
536 | memcpy(pm8001_ha->sas_addr, &pm8001_ha->phy[0].dev_sas_addr, |
537 | SAS_ADDR_SIZE); |
538 | #endif |
539 | } |
540 | |
541 | #ifdef PM8001_USE_MSIX |
542 | /** |
543 | * pm8001_setup_msix - enable MSI-X interrupt |
544 | * @chip_info: our ha struct. |
545 | * @irq_handler: irq_handler |
546 | */ |
547 | static u32 pm8001_setup_msix(struct pm8001_hba_info *pm8001_ha, |
548 | irq_handler_t irq_handler) |
549 | { |
550 | u32 i = 0, j = 0; |
551 | u32 number_of_intr = 1; |
552 | int flag = 0; |
553 | u32 max_entry; |
554 | int rc; |
555 | max_entry = sizeof(pm8001_ha->msix_entries) / |
556 | sizeof(pm8001_ha->msix_entries[0]); |
557 | flag |= IRQF_DISABLED; |
558 | for (i = 0; i < max_entry ; i++) |
559 | pm8001_ha->msix_entries[i].entry = i; |
560 | rc = pci_enable_msix(pm8001_ha->pdev, pm8001_ha->msix_entries, |
561 | number_of_intr); |
562 | pm8001_ha->number_of_intr = number_of_intr; |
563 | if (!rc) { |
564 | for (i = 0; i < number_of_intr; i++) { |
565 | if (request_irq(pm8001_ha->msix_entries[i].vector, |
566 | irq_handler, flag, DRV_NAME, |
567 | SHOST_TO_SAS_HA(pm8001_ha->shost))) { |
568 | for (j = 0; j < i; j++) |
569 | free_irq( |
570 | pm8001_ha->msix_entries[j].vector, |
571 | SHOST_TO_SAS_HA(pm8001_ha->shost)); |
572 | pci_disable_msix(pm8001_ha->pdev); |
573 | break; |
574 | } |
575 | } |
576 | } |
577 | return rc; |
578 | } |
579 | #endif |
580 | |
581 | /** |
582 | * pm8001_request_irq - register interrupt |
583 | * @chip_info: our ha struct. |
584 | */ |
585 | static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha) |
586 | { |
587 | struct pci_dev *pdev; |
588 | irq_handler_t irq_handler = pm8001_interrupt; |
97ee2088 |
589 | int rc; |
dbf9bfe6 |
590 | |
591 | pdev = pm8001_ha->pdev; |
592 | |
593 | #ifdef PM8001_USE_MSIX |
594 | if (pci_find_capability(pdev, PCI_CAP_ID_MSIX)) |
595 | return pm8001_setup_msix(pm8001_ha, irq_handler); |
596 | else |
597 | goto intx; |
598 | #endif |
599 | |
600 | intx: |
601 | /* intialize the INT-X interrupt */ |
602 | rc = request_irq(pdev->irq, irq_handler, IRQF_SHARED, DRV_NAME, |
603 | SHOST_TO_SAS_HA(pm8001_ha->shost)); |
604 | return rc; |
605 | } |
606 | |
607 | /** |
608 | * pm8001_pci_probe - probe supported device |
609 | * @pdev: pci device which kernel has been prepared for. |
610 | * @ent: pci device id |
611 | * |
612 | * This function is the main initialization function, when register a new |
613 | * pci driver it is invoked, all struct an hardware initilization should be done |
614 | * here, also, register interrupt |
615 | */ |
616 | static int __devinit pm8001_pci_probe(struct pci_dev *pdev, |
617 | const struct pci_device_id *ent) |
618 | { |
619 | unsigned int rc; |
620 | u32 pci_reg; |
621 | struct pm8001_hba_info *pm8001_ha; |
622 | struct Scsi_Host *shost = NULL; |
623 | const struct pm8001_chip_info *chip; |
624 | |
625 | dev_printk(KERN_INFO, &pdev->dev, |
626 | "pm8001: driver version %s\n", DRV_VERSION); |
627 | rc = pci_enable_device(pdev); |
628 | if (rc) |
629 | goto err_out_enable; |
630 | pci_set_master(pdev); |
631 | /* |
632 | * Enable pci slot busmaster by setting pci command register. |
633 | * This is required by FW for Cyclone card. |
634 | */ |
635 | |
636 | pci_read_config_dword(pdev, PCI_COMMAND, &pci_reg); |
637 | pci_reg |= 0x157; |
638 | pci_write_config_dword(pdev, PCI_COMMAND, pci_reg); |
639 | rc = pci_request_regions(pdev, DRV_NAME); |
640 | if (rc) |
641 | goto err_out_disable; |
642 | rc = pci_go_44(pdev); |
643 | if (rc) |
644 | goto err_out_regions; |
645 | |
646 | shost = scsi_host_alloc(&pm8001_sht, sizeof(void *)); |
647 | if (!shost) { |
648 | rc = -ENOMEM; |
649 | goto err_out_regions; |
650 | } |
651 | chip = &pm8001_chips[ent->driver_data]; |
652 | SHOST_TO_SAS_HA(shost) = |
653 | kcalloc(1, sizeof(struct sas_ha_struct), GFP_KERNEL); |
654 | if (!SHOST_TO_SAS_HA(shost)) { |
655 | rc = -ENOMEM; |
656 | goto err_out_free_host; |
657 | } |
658 | |
659 | rc = pm8001_prep_sas_ha_init(shost, chip); |
660 | if (rc) { |
661 | rc = -ENOMEM; |
662 | goto err_out_free; |
663 | } |
664 | pci_set_drvdata(pdev, SHOST_TO_SAS_HA(shost)); |
665 | pm8001_ha = pm8001_pci_alloc(pdev, chip_8001, shost); |
666 | if (!pm8001_ha) { |
667 | rc = -ENOMEM; |
668 | goto err_out_free; |
669 | } |
670 | list_add_tail(&pm8001_ha->list, &hba_list); |
671 | PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha, 0x252acbcd); |
672 | rc = PM8001_CHIP_DISP->chip_init(pm8001_ha); |
673 | if (rc) |
674 | goto err_out_ha_free; |
675 | |
676 | rc = scsi_add_host(shost, &pdev->dev); |
677 | if (rc) |
678 | goto err_out_ha_free; |
679 | rc = pm8001_request_irq(pm8001_ha); |
680 | if (rc) |
681 | goto err_out_shost; |
682 | |
683 | PM8001_CHIP_DISP->interrupt_enable(pm8001_ha); |
684 | pm8001_init_sas_add(pm8001_ha); |
685 | pm8001_post_sas_ha_init(shost, chip); |
686 | rc = sas_register_ha(SHOST_TO_SAS_HA(shost)); |
687 | if (rc) |
688 | goto err_out_shost; |
689 | scsi_scan_host(pm8001_ha->shost); |
690 | return 0; |
691 | |
692 | err_out_shost: |
693 | scsi_remove_host(pm8001_ha->shost); |
694 | err_out_ha_free: |
695 | pm8001_free(pm8001_ha); |
696 | err_out_free: |
697 | kfree(SHOST_TO_SAS_HA(shost)); |
698 | err_out_free_host: |
699 | kfree(shost); |
700 | err_out_regions: |
701 | pci_release_regions(pdev); |
702 | err_out_disable: |
703 | pci_disable_device(pdev); |
704 | err_out_enable: |
705 | return rc; |
706 | } |
707 | |
708 | static void __devexit pm8001_pci_remove(struct pci_dev *pdev) |
709 | { |
710 | struct sas_ha_struct *sha = pci_get_drvdata(pdev); |
711 | struct pm8001_hba_info *pm8001_ha; |
712 | int i; |
713 | pm8001_ha = sha->lldd_ha; |
714 | pci_set_drvdata(pdev, NULL); |
715 | sas_unregister_ha(sha); |
716 | sas_remove_host(pm8001_ha->shost); |
717 | list_del(&pm8001_ha->list); |
718 | scsi_remove_host(pm8001_ha->shost); |
719 | PM8001_CHIP_DISP->interrupt_disable(pm8001_ha); |
720 | PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha, 0x252acbcd); |
721 | |
722 | #ifdef PM8001_USE_MSIX |
723 | for (i = 0; i < pm8001_ha->number_of_intr; i++) |
724 | synchronize_irq(pm8001_ha->msix_entries[i].vector); |
725 | for (i = 0; i < pm8001_ha->number_of_intr; i++) |
726 | free_irq(pm8001_ha->msix_entries[i].vector, sha); |
727 | pci_disable_msix(pdev); |
728 | #else |
729 | free_irq(pm8001_ha->irq, sha); |
730 | #endif |
731 | #ifdef PM8001_USE_TASKLET |
732 | tasklet_kill(&pm8001_ha->tasklet); |
733 | #endif |
734 | pm8001_free(pm8001_ha); |
735 | kfree(sha->sas_phy); |
736 | kfree(sha->sas_port); |
737 | kfree(sha); |
738 | pci_release_regions(pdev); |
739 | pci_disable_device(pdev); |
740 | } |
741 | |
742 | /** |
743 | * pm8001_pci_suspend - power management suspend main entry point |
744 | * @pdev: PCI device struct |
745 | * @state: PM state change to (usually PCI_D3) |
746 | * |
747 | * Returns 0 success, anything else error. |
748 | */ |
749 | static int pm8001_pci_suspend(struct pci_dev *pdev, pm_message_t state) |
750 | { |
751 | struct sas_ha_struct *sha = pci_get_drvdata(pdev); |
752 | struct pm8001_hba_info *pm8001_ha; |
753 | int i , pos; |
754 | u32 device_state; |
755 | pm8001_ha = sha->lldd_ha; |
756 | flush_scheduled_work(); |
757 | scsi_block_requests(pm8001_ha->shost); |
758 | pos = pci_find_capability(pdev, PCI_CAP_ID_PM); |
759 | if (pos == 0) { |
760 | printk(KERN_ERR " PCI PM not supported\n"); |
761 | return -ENODEV; |
762 | } |
763 | PM8001_CHIP_DISP->interrupt_disable(pm8001_ha); |
764 | PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha, 0x252acbcd); |
765 | #ifdef PM8001_USE_MSIX |
766 | for (i = 0; i < pm8001_ha->number_of_intr; i++) |
767 | synchronize_irq(pm8001_ha->msix_entries[i].vector); |
768 | for (i = 0; i < pm8001_ha->number_of_intr; i++) |
769 | free_irq(pm8001_ha->msix_entries[i].vector, sha); |
770 | pci_disable_msix(pdev); |
771 | #else |
772 | free_irq(pm8001_ha->irq, sha); |
773 | #endif |
774 | #ifdef PM8001_USE_TASKLET |
775 | tasklet_kill(&pm8001_ha->tasklet); |
776 | #endif |
777 | device_state = pci_choose_state(pdev, state); |
778 | pm8001_printk("pdev=0x%p, slot=%s, entering " |
779 | "operating state [D%d]\n", pdev, |
780 | pm8001_ha->name, device_state); |
781 | pci_save_state(pdev); |
782 | pci_disable_device(pdev); |
783 | pci_set_power_state(pdev, device_state); |
784 | return 0; |
785 | } |
786 | |
787 | /** |
788 | * pm8001_pci_resume - power management resume main entry point |
789 | * @pdev: PCI device struct |
790 | * |
791 | * Returns 0 success, anything else error. |
792 | */ |
793 | static int pm8001_pci_resume(struct pci_dev *pdev) |
794 | { |
795 | struct sas_ha_struct *sha = pci_get_drvdata(pdev); |
796 | struct pm8001_hba_info *pm8001_ha; |
797 | int rc; |
798 | u32 device_state; |
799 | pm8001_ha = sha->lldd_ha; |
800 | device_state = pdev->current_state; |
801 | |
802 | pm8001_printk("pdev=0x%p, slot=%s, resuming from previous " |
803 | "operating state [D%d]\n", pdev, pm8001_ha->name, device_state); |
804 | |
805 | pci_set_power_state(pdev, PCI_D0); |
806 | pci_enable_wake(pdev, PCI_D0, 0); |
807 | pci_restore_state(pdev); |
808 | rc = pci_enable_device(pdev); |
809 | if (rc) { |
810 | pm8001_printk("slot=%s Enable device failed during resume\n", |
811 | pm8001_ha->name); |
812 | goto err_out_enable; |
813 | } |
814 | |
815 | pci_set_master(pdev); |
816 | rc = pci_go_44(pdev); |
817 | if (rc) |
818 | goto err_out_disable; |
819 | |
820 | PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha, 0x252acbcd); |
821 | rc = PM8001_CHIP_DISP->chip_init(pm8001_ha); |
822 | if (rc) |
823 | goto err_out_disable; |
824 | PM8001_CHIP_DISP->interrupt_disable(pm8001_ha); |
825 | rc = pm8001_request_irq(pm8001_ha); |
826 | if (rc) |
827 | goto err_out_disable; |
828 | #ifdef PM8001_USE_TASKLET |
829 | tasklet_init(&pm8001_ha->tasklet, pm8001_tasklet, |
830 | (unsigned long)pm8001_ha); |
831 | #endif |
832 | PM8001_CHIP_DISP->interrupt_enable(pm8001_ha); |
833 | scsi_unblock_requests(pm8001_ha->shost); |
834 | return 0; |
835 | |
836 | err_out_disable: |
837 | scsi_remove_host(pm8001_ha->shost); |
838 | pci_disable_device(pdev); |
839 | err_out_enable: |
840 | return rc; |
841 | } |
842 | |
843 | static struct pci_device_id __devinitdata pm8001_pci_table[] = { |
844 | { |
845 | PCI_VDEVICE(PMC_Sierra, 0x8001), chip_8001 |
846 | }, |
847 | { |
848 | PCI_DEVICE(0x117c, 0x0042), |
849 | .driver_data = chip_8001 |
850 | }, |
851 | {} /* terminate list */ |
852 | }; |
853 | |
854 | static struct pci_driver pm8001_pci_driver = { |
855 | .name = DRV_NAME, |
856 | .id_table = pm8001_pci_table, |
857 | .probe = pm8001_pci_probe, |
858 | .remove = __devexit_p(pm8001_pci_remove), |
859 | .suspend = pm8001_pci_suspend, |
860 | .resume = pm8001_pci_resume, |
861 | }; |
862 | |
863 | /** |
864 | * pm8001_init - initialize scsi transport template |
865 | */ |
866 | static int __init pm8001_init(void) |
867 | { |
868 | int rc; |
869 | pm8001_id = 0; |
870 | pm8001_stt = sas_domain_attach_transport(&pm8001_transport_ops); |
871 | if (!pm8001_stt) |
872 | return -ENOMEM; |
873 | rc = pci_register_driver(&pm8001_pci_driver); |
874 | if (rc) |
875 | goto err_out; |
876 | return 0; |
877 | err_out: |
878 | sas_release_transport(pm8001_stt); |
879 | return rc; |
880 | } |
881 | |
882 | static void __exit pm8001_exit(void) |
883 | { |
884 | pci_unregister_driver(&pm8001_pci_driver); |
885 | sas_release_transport(pm8001_stt); |
886 | } |
887 | |
888 | module_init(pm8001_init); |
889 | module_exit(pm8001_exit); |
890 | |
891 | MODULE_AUTHOR("Jack Wang <jack_wang@usish.com>"); |
892 | MODULE_DESCRIPTION("PMC-Sierra PM8001 SAS/SATA controller driver"); |
893 | MODULE_VERSION(DRV_VERSION); |
894 | MODULE_LICENSE("GPL"); |
895 | MODULE_DEVICE_TABLE(pci, pm8001_pci_table); |
896 | |