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scsi: mpt3sas: clear release bit when buffer reregistered
[linux-2.6-block.git] / drivers / scsi / mpt3sas / mpt3sas_base.h
CommitLineData
f92363d1
SR		 1/*
2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
4 *
5 * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.h
a4ffce0d 6 * Copyright (C) 2012-2014 LSI Corporation
a03bd153
SR		 7 * Copyright (C) 2013-2014 Avago Technologies
8 * (mailto: MPT-FusionLinux.pdl@avagotech.com)
f92363d1
SR		 9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version 2
13 * of the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * NO WARRANTY
21 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
22 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
24 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
25 * solely responsible for determining the appropriateness of using and
26 * distributing the Program and assumes all risks associated with its
27 * exercise of rights under this Agreement, including but not limited to
28 * the risks and costs of program errors, damage to or loss of data,
29 * programs or equipment, and unavailability or interruption of operations.
30
31 * DISCLAIMER OF LIABILITY
32 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
33 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
35 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
36 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
37 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
38 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
39
40 * You should have received a copy of the GNU General Public License
41 * along with this program; if not, write to the Free Software
42 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
43 * USA.
44 */
45
46#ifndef MPT3SAS_BASE_H_INCLUDED
47#define MPT3SAS_BASE_H_INCLUDED
48
49#include "mpi/mpi2_type.h"
50#include "mpi/mpi2.h"
51#include "mpi/mpi2_ioc.h"
52#include "mpi/mpi2_cnfg.h"
53#include "mpi/mpi2_init.h"
54#include "mpi/mpi2_raid.h"
55#include "mpi/mpi2_tool.h"
56#include "mpi/mpi2_sas.h"
016d5c35 57#include "mpi/mpi2_pci.h"
ff92b9dd 58#include "mpi/mpi2_image.h"
f92363d1
SR		 59
60#include <scsi/scsi.h>
61#include <scsi/scsi_cmnd.h>
62#include <scsi/scsi_device.h>
63#include <scsi/scsi_host.h>
64#include <scsi/scsi_tcq.h>
65#include <scsi/scsi_transport_sas.h>
66#include <scsi/scsi_dbg.h>
67#include <scsi/scsi_eh.h>
8a7e4c24
SR		 68#include <linux/pci.h>
69#include <linux/poll.h>
320e77ac 70#include <linux/irq_poll.h>
f92363d1
SR		 71
72#include "mpt3sas_debug.h"
73#include "mpt3sas_trigger_diag.h"
74
75/* driver versioning info */
76#define MPT3SAS_DRIVER_NAME "mpt3sas"
a03bd153 77#define MPT3SAS_AUTHOR "Avago Technologies <MPT-FusionLinux.pdl@avagotech.com>"
f92363d1 78#define MPT3SAS_DESCRIPTION "LSI MPT Fusion SAS 3.0 Device Driver"
6e0b7ca2
SP		 79#define MPT3SAS_DRIVER_VERSION "31.100.00.00"
80#define MPT3SAS_MAJOR_VERSION 31
4bcb298e 81#define MPT3SAS_MINOR_VERSION 100
e9ce9c86 82#define MPT3SAS_BUILD_VERSION 0
f92363d1
SR		 83#define MPT3SAS_RELEASE_VERSION 00
84
d0c627af
SR		 85#define MPT2SAS_DRIVER_NAME "mpt2sas"
86#define MPT2SAS_DESCRIPTION "LSI MPT Fusion SAS 2.0 Device Driver"
87#define MPT2SAS_DRIVER_VERSION "20.102.00.00"
88#define MPT2SAS_MAJOR_VERSION 20
89#define MPT2SAS_MINOR_VERSION 102
90#define MPT2SAS_BUILD_VERSION 0
91#define MPT2SAS_RELEASE_VERSION 00
92
f92363d1
SR		 93/*
94 * Set MPT3SAS_SG_DEPTH value based on user input.
95 */
65e8617f 96#define MPT_MAX_PHYS_SEGMENTS SG_CHUNK_SIZE
8a7e4c24 97#define MPT_MIN_PHYS_SEGMENTS 16
06f5f976 98#define MPT_KDUMP_MIN_PHYS_SEGMENTS 32
8a7e4c24 99
182ac784
SPS		 100#define MCPU_MAX_CHAINS_PER_IO 3
101
f92363d1
SR		 102#ifdef CONFIG_SCSI_MPT3SAS_MAX_SGE
103#define MPT3SAS_SG_DEPTH CONFIG_SCSI_MPT3SAS_MAX_SGE
104#else
8a7e4c24 105#define MPT3SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS
f92363d1
SR		 106#endif
107
8a7e4c24
SR		 108#ifdef CONFIG_SCSI_MPT2SAS_MAX_SGE
109#define MPT2SAS_SG_DEPTH CONFIG_SCSI_MPT2SAS_MAX_SGE
110#else
111#define MPT2SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS
112#endif
f92363d1
SR		 113
114/*
115 * Generic Defines
116 */
117#define MPT3SAS_SATA_QUEUE_DEPTH 32
118#define MPT3SAS_SAS_QUEUE_DEPTH 254
119#define MPT3SAS_RAID_QUEUE_DEPTH 128
06f5f976 120#define MPT3SAS_KDUMP_SCSI_IO_DEPTH 200
f92363d1 121
6c197093 122#define MPT3SAS_RAID_MAX_SECTORS 8192
016d5c35 123#define MPT3SAS_HOST_PAGE_SIZE_4K 12
d1b01d14 124#define MPT3SAS_NVME_QUEUE_DEPTH 128
f92363d1
SR		 125#define MPT_NAME_LENGTH 32 /* generic length of strings */
126#define MPT_STRING_LENGTH 64
22ae5a3c
SPS		 127#define MPI_FRAME_START_OFFSET 256
128#define REPLY_FREE_POOL_SIZE 512 /*(32 maxcredix *4)*(4 times)*/
f92363d1
SR		 129
130#define MPT_MAX_CALLBACKS 32
131
f92363d1 132#define INTERNAL_CMDS_COUNT 10 /* reserved cmds */
fd0331b3
SS		 133/* reserved for issuing internally framed scsi io cmds */
134#define INTERNAL_SCSIIO_CMDS_COUNT 3
f92363d1
SR		 135
136#define MPI3_HIM_MASK 0xFFFFFFFF /* mask every bit*/
137
138#define MPT3SAS_INVALID_DEVICE_HANDLE 0xFFFF
139
ebb3024e
SS		 140#define MAX_CHAIN_ELEMT_SZ 16
141#define DEFAULT_NUM_FWCHAIN_ELEMTS 8
142
3d29ed85 143#define FW_IMG_HDR_READ_TIMEOUT 15
02abcbc2
SP		 144
145#define IOC_OPERATIONAL_WAIT_COUNT 10
146
016d5c35
SPS		 147/*
148 * NVMe defines
149 */
150#define NVME_PRP_SIZE 8 /* PRP size */
016d5c35 151#define NVME_ERROR_RESPONSE_SIZE 16 /* Max NVME Error Response */
c1a6c5ac
C		 152#define NVME_TASK_ABORT_MIN_TIMEOUT 6
153#define NVME_TASK_ABORT_MAX_TIMEOUT 60
154#define NVME_TASK_MNGT_CUSTOM_MASK (0x0010)
016d5c35
SPS		 155#define NVME_PRP_PAGE_SIZE 4096 /* Page size */
156
84203b35
BVA		 157struct mpt3sas_nvme_cmd {
158 u8 rsvd[24];
159 __le64 prp1;
160 __le64 prp2;
161};
c1a6c5ac 162
f92363d1
SR		 163/*
164 * logging format
165 */
645a20c6
JP		 166#define ioc_err(ioc, fmt, ...) \
167 pr_err("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
168#define ioc_notice(ioc, fmt, ...) \
169 pr_notice("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
170#define ioc_warn(ioc, fmt, ...) \
171 pr_warn("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
172#define ioc_info(ioc, fmt, ...) \
173 pr_info("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
174
7786ab6a
SR		 175/*
176 * WarpDrive Specific Log codes
177 */
178
179#define MPT2_WARPDRIVE_LOGENTRY (0x8002)
180#define MPT2_WARPDRIVE_LC_SSDT (0x41)
181#define MPT2_WARPDRIVE_LC_SSDLW (0x43)
182#define MPT2_WARPDRIVE_LC_SSDLF (0x44)
183#define MPT2_WARPDRIVE_LC_BRMF (0x4D)
184
f92363d1
SR		 185/*
186 * per target private data
187 */
188#define MPT_TARGET_FLAGS_RAID_COMPONENT 0x01
189#define MPT_TARGET_FLAGS_VOLUME 0x02
190#define MPT_TARGET_FLAGS_DELETED 0x04
191#define MPT_TARGET_FASTPATH_IO 0x08
d88e1eab 192#define MPT_TARGET_FLAGS_PCIE_DEVICE 0x10
f92363d1 193
42081173
SR		 194#define SAS2_PCI_DEVICE_B0_REVISION (0x01)
195#define SAS3_PCI_DEVICE_C0_REVISION (0x02)
196
eb9c7ce5
SP		 197/* Atlas PCIe Switch Management Port */
198#define MPI26_ATLAS_PCIe_SWITCH_DEVID (0x00B2)
199
1117b31a
SR		 200/*
201 * Intel HBA branding
202 */
989e43c7
SR		 203#define MPT2SAS_INTEL_RMS25JB080_BRANDING \
204 "Intel(R) Integrated RAID Module RMS25JB080"
205#define MPT2SAS_INTEL_RMS25JB040_BRANDING \
206 "Intel(R) Integrated RAID Module RMS25JB040"
207#define MPT2SAS_INTEL_RMS25KB080_BRANDING \
208 "Intel(R) Integrated RAID Module RMS25KB080"
209#define MPT2SAS_INTEL_RMS25KB040_BRANDING \
210 "Intel(R) Integrated RAID Module RMS25KB040"
211#define MPT2SAS_INTEL_RMS25LB040_BRANDING \
212 "Intel(R) Integrated RAID Module RMS25LB040"
213#define MPT2SAS_INTEL_RMS25LB080_BRANDING \
214 "Intel(R) Integrated RAID Module RMS25LB080"
215#define MPT2SAS_INTEL_RMS2LL080_BRANDING \
216 "Intel Integrated RAID Module RMS2LL080"
217#define MPT2SAS_INTEL_RMS2LL040_BRANDING \
218 "Intel Integrated RAID Module RMS2LL040"
219#define MPT2SAS_INTEL_RS25GB008_BRANDING \
220 "Intel(R) RAID Controller RS25GB008"
221#define MPT2SAS_INTEL_SSD910_BRANDING \
222 "Intel(R) SSD 910 Series"
223
1117b31a
SR		 224#define MPT3SAS_INTEL_RMS3JC080_BRANDING \
225 "Intel(R) Integrated RAID Module RMS3JC080"
226#define MPT3SAS_INTEL_RS3GC008_BRANDING \
227 "Intel(R) RAID Controller RS3GC008"
228#define MPT3SAS_INTEL_RS3FC044_BRANDING \
229 "Intel(R) RAID Controller RS3FC044"
230#define MPT3SAS_INTEL_RS3UC080_BRANDING \
231 "Intel(R) RAID Controller RS3UC080"
f92363d1 232
1117b31a
SR		 233/*
234 * Intel HBA SSDIDs
235 */
989e43c7
SR		 236#define MPT2SAS_INTEL_RMS25JB080_SSDID 0x3516
237#define MPT2SAS_INTEL_RMS25JB040_SSDID 0x3517
238#define MPT2SAS_INTEL_RMS25KB080_SSDID 0x3518
239#define MPT2SAS_INTEL_RMS25KB040_SSDID 0x3519
240#define MPT2SAS_INTEL_RMS25LB040_SSDID 0x351A
241#define MPT2SAS_INTEL_RMS25LB080_SSDID 0x351B
242#define MPT2SAS_INTEL_RMS2LL080_SSDID 0x350E
243#define MPT2SAS_INTEL_RMS2LL040_SSDID 0x350F
244#define MPT2SAS_INTEL_RS25GB008_SSDID 0x3000
245#define MPT2SAS_INTEL_SSD910_SSDID 0x3700
246
247#define MPT3SAS_INTEL_RMS3JC080_SSDID 0x3521
248#define MPT3SAS_INTEL_RS3GC008_SSDID 0x3522
249#define MPT3SAS_INTEL_RS3FC044_SSDID 0x3523
250#define MPT3SAS_INTEL_RS3UC080_SSDID 0x3524
f92363d1 251
fb84dfc4
SR		 252/*
253 * Dell HBA branding
254 */
989e43c7
SR		 255#define MPT2SAS_DELL_BRANDING_SIZE 32
256
257#define MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING "Dell 6Gbps SAS HBA"
258#define MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING "Dell PERC H200 Adapter"
259#define MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING "Dell PERC H200 Integrated"
260#define MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING "Dell PERC H200 Modular"
261#define MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING "Dell PERC H200 Embedded"
262#define MPT2SAS_DELL_PERC_H200_BRANDING "Dell PERC H200"
263#define MPT2SAS_DELL_6GBPS_SAS_BRANDING "Dell 6Gbps SAS"
264
fb84dfc4
SR		 265#define MPT3SAS_DELL_12G_HBA_BRANDING \
266 "Dell 12Gbps HBA"
267
268/*
269 * Dell HBA SSDIDs
270 */
989e43c7
SR		 271#define MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID 0x1F1C
272#define MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID 0x1F1D
273#define MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID 0x1F1E
274#define MPT2SAS_DELL_PERC_H200_MODULAR_SSDID 0x1F1F
275#define MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID 0x1F20
276#define MPT2SAS_DELL_PERC_H200_SSDID 0x1F21
277#define MPT2SAS_DELL_6GBPS_SAS_SSDID 0x1F22
278
279#define MPT3SAS_DELL_12G_HBA_SSDID 0x1F46
fb84dfc4 280
38e4141e
SR		 281/*
282 * Cisco HBA branding
283 */
d8eb4a47 284#define MPT3SAS_CISCO_12G_8E_HBA_BRANDING \
989e43c7 285 "Cisco 9300-8E 12G SAS HBA"
d8eb4a47 286#define MPT3SAS_CISCO_12G_8I_HBA_BRANDING \
989e43c7 287 "Cisco 9300-8i 12G SAS HBA"
d8eb4a47 288#define MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING \
989e43c7 289 "Cisco 12G Modular SAS Pass through Controller"
d8eb4a47 290#define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING \
989e43c7 291 "UCS C3X60 12G SAS Pass through Controller"
38e4141e
SR		 292/*
293 * Cisco HBA SSSDIDs
294 */
d8eb4a47
SR		 295#define MPT3SAS_CISCO_12G_8E_HBA_SSDID 0x14C
296#define MPT3SAS_CISCO_12G_8I_HBA_SSDID 0x154
297#define MPT3SAS_CISCO_12G_AVILA_HBA_SSDID 0x155
298#define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID 0x156
38e4141e 299
f92363d1
SR		 300/*
301 * status bits for ioc->diag_buffer_status
302 */
303#define MPT3_DIAG_BUFFER_IS_REGISTERED (0x01)
304#define MPT3_DIAG_BUFFER_IS_RELEASED (0x02)
305#define MPT3_DIAG_BUFFER_IS_DIAG_RESET (0x04)
306
989e43c7
SR		 307/*
308 * HP HBA branding
309 */
310#define MPT2SAS_HP_3PAR_SSVID 0x1590
311
312#define MPT2SAS_HP_2_4_INTERNAL_BRANDING \
313 "HP H220 Host Bus Adapter"
314#define MPT2SAS_HP_2_4_EXTERNAL_BRANDING \
315 "HP H221 Host Bus Adapter"
316#define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING \
317 "HP H222 Host Bus Adapter"
318#define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING \
319 "HP H220i Host Bus Adapter"
320#define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING \
321 "HP H210i Host Bus Adapter"
322
323/*
324 * HO HBA SSDIDs
325 */
326#define MPT2SAS_HP_2_4_INTERNAL_SSDID 0x0041
327#define MPT2SAS_HP_2_4_EXTERNAL_SSDID 0x0042
328#define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID 0x0043
329#define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID 0x0044
330#define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID 0x0046
331
fb77bb53
SR		 332/*
333 * Combined Reply Queue constants,
334 * There are twelve Supplemental Reply Post Host Index Registers
335 * and each register is at offset 0x10 bytes from the previous one.
336 */
2b48be65 337#define MAX_COMBINED_MSIX_VECTORS(gen35) ((gen35 == 1) ? 16 : 8)
0bb337c9
SPS		 338#define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3 12
339#define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35 16
340#define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET (0x10)
f92363d1
SR		 341
342/* OEM Identifiers */
343#define MFG10_OEM_ID_INVALID (0x00000000)
344#define MFG10_OEM_ID_DELL (0x00000001)
345#define MFG10_OEM_ID_FSC (0x00000002)
346#define MFG10_OEM_ID_SUN (0x00000003)
347#define MFG10_OEM_ID_IBM (0x00000004)
348
349/* GENERIC Flags 0*/
350#define MFG10_GF0_OCE_DISABLED (0x00000001)
351#define MFG10_GF0_R1E_DRIVE_COUNT (0x00000002)
352#define MFG10_GF0_R10_DISPLAY (0x00000004)
353#define MFG10_GF0_SSD_DATA_SCRUB_DISABLE (0x00000008)
354#define MFG10_GF0_SINGLE_DRIVE_R0 (0x00000010)
355
3898f08e
SR		 356#define VIRTUAL_IO_FAILED_RETRY (0x32010081)
357
18fd3d8c 358/* High IOPs definitions */
5dd48a55 359#define MPT3SAS_DEVICE_HIGH_IOPS_DEPTH 8
18fd3d8c 360#define MPT3SAS_HIGH_IOPS_REPLY_QUEUES 8
5dd48a55 361#define MPT3SAS_HIGH_IOPS_BATCH_COUNT 16
18fd3d8c
SP		 362#define MPT3SAS_GEN35_MAX_MSIX_QUEUES 128
363
f92363d1
SR		 364/* OEM Specific Flags will come from OEM specific header files */
365struct Mpi2ManufacturingPage10_t {
366 MPI2_CONFIG_PAGE_HEADER Header; /* 00h */
367 U8 OEMIdentifier; /* 04h */
368 U8 Reserved1; /* 05h */
369 U16 Reserved2; /* 08h */
370 U32 Reserved3; /* 0Ch */
371 U32 GenericFlags0; /* 10h */
372 U32 GenericFlags1; /* 14h */
373 U32 Reserved4; /* 18h */
374 U32 OEMSpecificFlags0; /* 1Ch */
375 U32 OEMSpecificFlags1; /* 20h */
376 U32 Reserved5[18]; /* 24h - 60h*/
377};
378
379
380/* Miscellaneous options */
381struct Mpi2ManufacturingPage11_t {
382 MPI2_CONFIG_PAGE_HEADER Header; /* 00h */
383 __le32 Reserved1; /* 04h */
384 u8 Reserved2; /* 08h */
385 u8 EEDPTagMode; /* 09h */
386 u8 Reserved3; /* 0Ah */
387 u8 Reserved4; /* 0Bh */
c1a6c5ac
C		 388 __le32 Reserved5[8]; /* 0Ch-2Ch */
389 u16 AddlFlags2; /* 2Ch */
390 u8 AddlFlags3; /* 2Eh */
391 u8 Reserved6; /* 2Fh */
392 __le32 Reserved7[7]; /* 30h - 4Bh */
393 u8 NVMeAbortTO; /* 4Ch */
d04a6edf
SR		 394 u8 NumPerDevEvents; /* 4Dh */
395 u8 HostTraceBufferDecrementSizeKB; /* 4Eh */
396 u8 HostTraceBufferFlags; /* 4Fh */
397 u16 HostTraceBufferMaxSizeKB; /* 50h */
398 u16 HostTraceBufferMinSizeKB; /* 52h */
399 __le32 Reserved10[2]; /* 54h - 5Bh */
f92363d1
SR		 400};
401
402/**
403 * struct MPT3SAS_TARGET - starget private hostdata
404 * @starget: starget object
405 * @sas_address: target sas address
7786ab6a 406 * @raid_device: raid_device pointer to access volume data
f92363d1
SR		 407 * @handle: device handle
408 * @num_luns: number luns
409 * @flags: MPT_TARGET_FLAGS_XXX flags
410 * @deleted: target flaged for deletion
411 * @tm_busy: target is busy with TM request.
d88e1eab
SPS		 412 * @sas_dev: The sas_device associated with this target
413 * @pcie_dev: The pcie device associated with this target
f92363d1
SR		 414 */
415struct MPT3SAS_TARGET {
416 struct scsi_target *starget;
417 u64 sas_address;
7786ab6a 418 struct _raid_device *raid_device;
f92363d1
SR		 419 u16 handle;
420 int num_luns;
421 u32 flags;
422 u8 deleted;
423 u8 tm_busy;
d88e1eab
SPS		 424 struct _sas_device *sas_dev;
425 struct _pcie_device *pcie_dev;
f92363d1
SR		 426};
427
428
429/*
430 * per device private data
431 */
432#define MPT_DEVICE_FLAGS_INIT 0x01
f92363d1 433
7786ab6a
SR		 434#define MFG_PAGE10_HIDE_SSDS_MASK (0x00000003)
435#define MFG_PAGE10_HIDE_ALL_DISKS (0x00)
436#define MFG_PAGE10_EXPOSE_ALL_DISKS (0x01)
437#define MFG_PAGE10_HIDE_IF_VOL_PRESENT (0x02)
438
f92363d1
SR		 439/**
440 * struct MPT3SAS_DEVICE - sdev private hostdata
441 * @sas_target: starget private hostdata
442 * @lun: lun number
443 * @flags: MPT_DEVICE_XXX flags
444 * @configured_lun: lun is configured
445 * @block: device is in SDEV_BLOCK state
446 * @tlr_snoop_check: flag used in determining whether to disable TLR
447 * @eedp_enable: eedp support enable bit
448 * @eedp_type: 0(type_1), 1(type_2), 2(type_3)
449 * @eedp_block_length: block size
ffb58456 450 * @ata_command_pending: SATL passthrough outstanding for device
f92363d1
SR		 451 */
452struct MPT3SAS_DEVICE {
453 struct MPT3SAS_TARGET *sas_target;
454 unsigned int lun;
455 u32 flags;
456 u8 configured_lun;
457 u8 block;
458 u8 tlr_snoop_check;
30158dc9 459 u8 ignore_delay_remove;
307d9075
AM		 460 /* Iopriority Command Handling */
461 u8 ncq_prio_enable;
ffb58456
JB		 462 /*
463 * Bug workaround for SATL handling: the mpt2/3sas firmware
464 * doesn't return BUSY or TASK_SET_FULL for subsequent
465 * commands while a SATL pass through is in operation as the
466 * spec requires, it simply does nothing with them until the
467 * pass through completes, causing them possibly to timeout if
468 * the passthrough is a long executing command (like format or
469 * secure erase). This variable allows us to do the right
470 * thing while a SATL command is pending.
471 */
472 unsigned long ata_command_pending;
307d9075 473
f92363d1
SR		 474};
475
476#define MPT3_CMD_NOT_USED 0x8000 /* free */
477#define MPT3_CMD_COMPLETE 0x0001 /* completed */
478#define MPT3_CMD_PENDING 0x0002 /* pending */
479#define MPT3_CMD_REPLY_VALID 0x0004 /* reply is valid */
480#define MPT3_CMD_RESET 0x0008 /* host reset dropped the command */
481
482/**
483 * struct _internal_cmd - internal commands struct
484 * @mutex: mutex
485 * @done: completion
486 * @reply: reply message pointer
487 * @sense: sense data
488 * @status: MPT3_CMD_XXX status
489 * @smid: system message id
490 */
491struct _internal_cmd {
492 struct mutex mutex;
493 struct completion done;
494 void *reply;
495 void *sense;
496 u16 status;
497 u16 smid;
498};
499
500
501
502/**
503 * struct _sas_device - attached device information
504 * @list: sas device list
505 * @starget: starget object
506 * @sas_address: device sas address
507 * @device_name: retrieved from the SAS IDENTIFY frame.
508 * @handle: device handle
509 * @sas_address_parent: sas address of parent expander or sas host
510 * @enclosure_handle: enclosure handle
511 * @enclosure_logical_id: enclosure logical identifier
512 * @volume_handle: volume handle (valid when hidden raid member)
513 * @volume_wwid: volume unique identifier
514 * @device_info: bitfield provides detailed info about the device
515 * @id: target id
516 * @channel: target channel
517 * @slot: number number
518 * @phy: phy identifier provided in sas device page 0
f92363d1 519 * @responding: used in _scsih_sas_device_mark_responding
0f624c39
SR		 520 * @fast_path: fast path feature enable bit
521 * @pfa_led_on: flag for PFA LED status
e4bc7f5c
SR		 522 * @pend_sas_rphy_add: flag to check if device is in sas_rphy_add()
523 * addition routine.
75888956
SR		 524 * @chassis_slot: chassis slot
525 * @is_chassis_slot_valid: chassis slot valid or not
f92363d1
SR		 526 */
527struct _sas_device {
528 struct list_head list;
529 struct scsi_target *starget;
530 u64 sas_address;
531 u64 device_name;
532 u16 handle;
533 u64 sas_address_parent;
534 u16 enclosure_handle;
535 u64 enclosure_logical_id;
536 u16 volume_handle;
537 u64 volume_wwid;
538 u32 device_info;
539 int id;
540 int channel;
541 u16 slot;
542 u8 phy;
543 u8 responding;
544 u8 fast_path;
0f624c39 545 u8 pfa_led_on;
e4bc7f5c 546 u8 pend_sas_rphy_add;
e6d45e3e 547 u8 enclosure_level;
75888956
SR		 548 u8 chassis_slot;
549 u8 is_chassis_slot_valid;
310c8e40 550 u8 connector_name[5];
d1cb5e49 551 struct kref refcount;
f92363d1
SR		 552};
553
d1cb5e49
SR		 554static inline void sas_device_get(struct _sas_device *s)
555{
556 kref_get(&s->refcount);
557}
558
559static inline void sas_device_free(struct kref *r)
560{
561 kfree(container_of(r, struct _sas_device, refcount));
562}
563
564static inline void sas_device_put(struct _sas_device *s)
565{
566 kref_put(&s->refcount, sas_device_free);
567}
568
d88e1eab
SPS		 569/*
570 * struct _pcie_device - attached PCIe device information
571 * @list: pcie device list
572 * @starget: starget object
573 * @wwid: device WWID
574 * @handle: device handle
575 * @device_info: bitfield provides detailed info about the device
576 * @id: target id
577 * @channel: target channel
578 * @slot: slot number
579 * @port_num: port number
580 * @responding: used in _scsih_pcie_device_mark_responding
581 * @fast_path: fast path feature enable bit
582 * @nvme_mdts: MaximumDataTransferSize from PCIe Device Page 2 for
583 * NVMe device only
584 * @enclosure_handle: enclosure handle
585 * @enclosure_logical_id: enclosure logical identifier
586 * @enclosure_level: The level of device's enclosure from the controller
587 * @connector_name: ASCII value of the Connector's name
588 * @serial_number: pointer of serial number string allocated runtime
3c090ce3 589 * @access_status: Device's Access Status
d88e1eab
SPS		 590 * @refcount: reference count for deletion
591 */
592struct _pcie_device {
593 struct list_head list;
594 struct scsi_target *starget;
595 u64 wwid;
596 u16 handle;
597 u32 device_info;
598 int id;
599 int channel;
600 u16 slot;
601 u8 port_num;
602 u8 responding;
603 u8 fast_path;
604 u32 nvme_mdts;
605 u16 enclosure_handle;
606 u64 enclosure_logical_id;
607 u8 enclosure_level;
608 u8 connector_name[4];
609 u8 *serial_number;
c1a6c5ac 610 u8 reset_timeout;
3c090ce3 611 u8 access_status;
d88e1eab
SPS		 612 struct kref refcount;
613};
614/**
615 * pcie_device_get - Increment the pcie device reference count
616 *
617 * @p: pcie_device object
618 *
619 * When ever this function called it will increment the
620 * reference count of the pcie device for which this function called.
621 *
622 */
623static inline void pcie_device_get(struct _pcie_device *p)
624{
625 kref_get(&p->refcount);
626}
627
628/**
629 * pcie_device_free - Release the pcie device object
630 * @r - kref object
631 *
632 * Free's the pcie device object. It will be called when reference count
633 * reaches to zero.
634 */
635static inline void pcie_device_free(struct kref *r)
636{
637 kfree(container_of(r, struct _pcie_device, refcount));
638}
639
640/**
641 * pcie_device_put - Decrement the pcie device reference count
642 *
643 * @p: pcie_device object
644 *
645 * When ever this function called it will decrement the
646 * reference count of the pcie device for which this function called.
647 *
648 * When refernce count reaches to Zero, this will call pcie_device_free to the
649 * pcie_device object.
650 */
651static inline void pcie_device_put(struct _pcie_device *p)
652{
653 kref_put(&p->refcount, pcie_device_free);
654}
f92363d1
SR		 655/**
656 * struct _raid_device - raid volume link list
657 * @list: sas device list
658 * @starget: starget object
659 * @sdev: scsi device struct (volumes are single lun)
660 * @wwid: unique identifier for the volume
661 * @handle: device handle
7786ab6a 662 * @block_size: Block size of the volume
f92363d1
SR		 663 * @id: target id
664 * @channel: target channel
665 * @volume_type: the raid level
666 * @device_info: bitfield provides detailed info about the hidden components
667 * @num_pds: number of hidden raid components
668 * @responding: used in _scsih_raid_device_mark_responding
669 * @percent_complete: resync percent complete
7786ab6a
SR		 670 * @direct_io_enabled: Whether direct io to PDs are allowed or not
671 * @stripe_exponent: X where 2powX is the stripe sz in blocks
672 * @block_exponent: X where 2powX is the block sz in bytes
673 * @max_lba: Maximum number of LBA in the volume
674 * @stripe_sz: Stripe Size of the volume
675 * @device_info: Device info of the volume member disk
676 * @pd_handle: Array of handles of the physical drives for direct I/O in le16
f92363d1
SR		 677 */
678#define MPT_MAX_WARPDRIVE_PDS 8
679struct _raid_device {
680 struct list_head list;
681 struct scsi_target *starget;
682 struct scsi_device *sdev;
683 u64 wwid;
684 u16 handle;
7786ab6a 685 u16 block_sz;
f92363d1
SR		 686 int id;
687 int channel;
688 u8 volume_type;
689 u8 num_pds;
690 u8 responding;
691 u8 percent_complete;
7786ab6a
SR		 692 u8 direct_io_enabled;
693 u8 stripe_exponent;
694 u8 block_exponent;
695 u64 max_lba;
696 u32 stripe_sz;
f92363d1 697 u32 device_info;
7786ab6a 698 u16 pd_handle[MPT_MAX_WARPDRIVE_PDS];
f92363d1
SR		 699};
700
701/**
702 * struct _boot_device - boot device info
d88e1eab
SPS		 703 *
704 * @channel: sas, raid, or pcie channel
705 * @device: holds pointer for struct _sas_device, struct _raid_device or
706 * struct _pcie_device
f92363d1
SR		 707 */
708struct _boot_device {
d88e1eab 709 int channel;
f92363d1
SR		 710 void *device;
711};
712
713/**
714 * struct _sas_port - wide/narrow sas port information
715 * @port_list: list of ports belonging to expander
716 * @num_phys: number of phys belonging to this port
717 * @remote_identify: attached device identification
718 * @rphy: sas transport rphy object
719 * @port: sas transport wide/narrow port object
720 * @phy_list: _sas_phy list objects belonging to this port
721 */
722struct _sas_port {
723 struct list_head port_list;
724 u8 num_phys;
725 struct sas_identify remote_identify;
726 struct sas_rphy *rphy;
727 struct sas_port *port;
728 struct list_head phy_list;
729};
730
731/**
732 * struct _sas_phy - phy information
733 * @port_siblings: list of phys belonging to a port
734 * @identify: phy identification
735 * @remote_identify: attached device identification
736 * @phy: sas transport phy object
737 * @phy_id: unique phy id
738 * @handle: device handle for this phy
739 * @attached_handle: device handle for attached device
740 * @phy_belongs_to_port: port has been created for this phy
741 */
742struct _sas_phy {
743 struct list_head port_siblings;
744 struct sas_identify identify;
745 struct sas_identify remote_identify;
746 struct sas_phy *phy;
747 u8 phy_id;
748 u16 handle;
749 u16 attached_handle;
750 u8 phy_belongs_to_port;
751};
752
753/**
754 * struct _sas_node - sas_host/expander information
755 * @list: list of expanders
756 * @parent_dev: parent device class
757 * @num_phys: number phys belonging to this sas_host/expander
758 * @sas_address: sas address of this sas_host/expander
759 * @handle: handle for this sas_host/expander
760 * @sas_address_parent: sas address of parent expander or sas host
761 * @enclosure_handle: handle for this a member of an enclosure
762 * @device_info: bitwise defining capabilities of this sas_host/expander
763 * @responding: used in _scsih_expander_device_mark_responding
764 * @phy: a list of phys that make up this sas_host/expander
765 * @sas_port_list: list of ports attached to this sas_host/expander
766 */
767struct _sas_node {
768 struct list_head list;
769 struct device *parent_dev;
770 u8 num_phys;
771 u64 sas_address;
772 u16 handle;
773 u64 sas_address_parent;
774 u16 enclosure_handle;
775 u64 enclosure_logical_id;
776 u8 responding;
777 struct _sas_phy *phy;
778 struct list_head sas_port_list;
779};
780
22a923c3
C		 781
782/**
783 * struct _enclosure_node - enclosure information
784 * @list: list of enclosures
785 * @pg0: enclosure pg0;
786 */
787struct _enclosure_node {
788 struct list_head list;
789 Mpi2SasEnclosurePage0_t pg0;
790};
791
f92363d1
SR		 792/**
793 * enum reset_type - reset state
794 * @FORCE_BIG_HAMMER: issue diagnostic reset
795 * @SOFT_RESET: issue message_unit_reset, if fails to to big hammer
796 */
797enum reset_type {
798 FORCE_BIG_HAMMER,
799 SOFT_RESET,
800};
801
016d5c35
SPS		 802/**
803 * struct pcie_sg_list - PCIe SGL buffer (contiguous per I/O)
804 * @pcie_sgl: PCIe native SGL for NVMe devices
805 * @pcie_sgl_dma: physical address
806 */
807struct pcie_sg_list {
808 void *pcie_sgl;
809 dma_addr_t pcie_sgl_dma;
810};
811
f92363d1
SR		 812/**
813 * struct chain_tracker - firmware chain tracker
814 * @chain_buffer: chain buffer
815 * @chain_buffer_dma: physical address
816 * @tracker_list: list of free request (ioc->free_chain_list)
817 */
818struct chain_tracker {
819 void *chain_buffer;
820 dma_addr_t chain_buffer_dma;
93204b78
C		 821};
822
823struct chain_lookup {
824 struct chain_tracker *chains_per_smid;
825 atomic_t chain_offset;
f92363d1
SR		 826};
827
828/**
829 * struct scsiio_tracker - scsi mf request tracker
830 * @smid: system message id
f92363d1 831 * @cb_idx: callback index
7786ab6a 832 * @direct_io: To indicate whether I/O is direct (WARPDRIVE)
dbec4c90 833 * @chain_list: list of associated firmware chain tracker
03d1fb3a 834 * @msix_io: IO's msix
f92363d1
SR		 835 */
836struct scsiio_tracker {
837 u16 smid;
998c3001 838 struct scsi_cmnd *scmd;
f92363d1 839 u8 cb_idx;
7786ab6a 840 u8 direct_io;
016d5c35 841 struct pcie_sg_list pcie_sg_list;
f92363d1 842 struct list_head chain_list;
03d1fb3a 843 u16 msix_io;
f92363d1
SR		 844};
845
846/**
847 * struct request_tracker - firmware request tracker
848 * @smid: system message id
849 * @cb_idx: callback index
850 * @tracker_list: list of free request (ioc->free_list)
851 */
852struct request_tracker {
853 u16 smid;
854 u8 cb_idx;
855 struct list_head tracker_list;
856};
857
858/**
859 * struct _tr_list - target reset list
860 * @handle: device handle
861 * @state: state machine
862 */
863struct _tr_list {
864 struct list_head list;
865 u16 handle;
866 u16 state;
867};
868
fd0331b3
SS		 869/**
870 * struct _sc_list - delayed SAS_IO_UNIT_CONTROL message list
871 * @handle: device handle
872 */
873struct _sc_list {
874 struct list_head list;
875 u16 handle;
876};
877
878/**
879 * struct _event_ack_list - delayed event acknowledgment list
880 * @Event: Event ID
881 * @EventContext: used to track the event uniquely
882 */
883struct _event_ack_list {
884 struct list_head list;
cf6bf971
C		 885 U16 Event;
886 U32 EventContext;
fd0331b3 887};
f92363d1
SR		 888
889/**
890 * struct adapter_reply_queue - the reply queue struct
891 * @ioc: per adapter object
892 * @msix_index: msix index into vector table
893 * @vector: irq vector
894 * @reply_post_host_index: head index in the pool where FW completes IO
895 * @reply_post_free: reply post base virt address
896 * @name: the name registered to request_irq()
897 * @busy: isr is actively processing replies on another cpu
320e77ac
SP		 898 * @os_irq: irq number
899 * @irqpoll: irq_poll object
900 * @irq_poll_scheduled: Tells whether irq poll is scheduled or not
f92363d1
SR		 901 * @list: this list
902*/
903struct adapter_reply_queue {
904 struct MPT3SAS_ADAPTER *ioc;
905 u8 msix_index;
f92363d1
SR		 906 u32 reply_post_host_index;
907 Mpi2ReplyDescriptorsUnion_t *reply_post_free;
908 char name[MPT_NAME_LENGTH];
909 atomic_t busy;
320e77ac
SP		 910 u32 os_irq;
911 struct irq_poll irqpoll;
912 bool irq_poll_scheduled;
913 bool irq_line_enable;
f92363d1
SR		 914 struct list_head list;
915};
916
917typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr);
918
919/* SAS3.0 support */
920typedef int (*MPT_BUILD_SG_SCMD)(struct MPT3SAS_ADAPTER *ioc,
016d5c35 921 struct scsi_cmnd *scmd, u16 smid, struct _pcie_device *pcie_device);
f92363d1
SR		 922typedef void (*MPT_BUILD_SG)(struct MPT3SAS_ADAPTER *ioc, void *psge,
923 dma_addr_t data_out_dma, size_t data_out_sz,
924 dma_addr_t data_in_dma, size_t data_in_sz);
925typedef void (*MPT_BUILD_ZERO_LEN_SGE)(struct MPT3SAS_ADAPTER *ioc,
926 void *paddr);
927
016d5c35
SPS		 928/* SAS3.5 support */
929typedef void (*NVME_BUILD_PRP)(struct MPT3SAS_ADAPTER *ioc, u16 smid,
930 Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request,
931 dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
932 size_t data_in_sz);
933
81c16f83
SPS		 934/* To support atomic and non atomic descriptors*/
935typedef void (*PUT_SMID_IO_FP_HIP) (struct MPT3SAS_ADAPTER *ioc, u16 smid,
936 u16 funcdep);
937typedef void (*PUT_SMID_DEFAULT) (struct MPT3SAS_ADAPTER *ioc, u16 smid);
b8992029 938typedef u32 (*BASE_READ_REG) (const volatile void __iomem *addr);
5dd48a55
SP		 939/*
940 * To get high iops reply queue's msix index when high iops mode is enabled
941 * else get the msix index of general reply queues.
942 */
943typedef u8 (*GET_MSIX_INDEX) (struct MPT3SAS_ADAPTER *ioc,
944 struct scsi_cmnd *scmd);
f92363d1
SR		 945
946/* IOC Facts and Port Facts converted from little endian to cpu */
947union mpi3_version_union {
948 MPI2_VERSION_STRUCT Struct;
949 u32 Word;
950};
951
952struct mpt3sas_facts {
953 u16 MsgVersion;
954 u16 HeaderVersion;
955 u8 IOCNumber;
956 u8 VP_ID;
957 u8 VF_ID;
958 u16 IOCExceptions;
959 u16 IOCStatus;
960 u32 IOCLogInfo;
961 u8 MaxChainDepth;
962 u8 WhoInit;
963 u8 NumberOfPorts;
964 u8 MaxMSIxVectors;
965 u16 RequestCredit;
966 u16 ProductID;
967 u32 IOCCapabilities;
968 union mpi3_version_union FWVersion;
969 u16 IOCRequestFrameSize;
ebb3024e 970 u16 IOCMaxChainSegmentSize;
f92363d1
SR		 971 u16 MaxInitiators;
972 u16 MaxTargets;
973 u16 MaxSasExpanders;
974 u16 MaxEnclosures;
975 u16 ProtocolFlags;
976 u16 HighPriorityCredit;
977 u16 MaxReplyDescriptorPostQueueDepth;
978 u8 ReplyFrameSize;
979 u8 MaxVolumes;
980 u16 MaxDevHandle;
981 u16 MaxPersistentEntries;
982 u16 MinDevHandle;
016d5c35 983 u8 CurrentHostPageSize;
f92363d1
SR		 984};
985
986struct mpt3sas_port_facts {
987 u8 PortNumber;
988 u8 VP_ID;
989 u8 VF_ID;
990 u8 PortType;
991 u16 MaxPostedCmdBuffers;
992};
993
9b05c91a
SR		 994struct reply_post_struct {
995 Mpi2ReplyDescriptorsUnion_t *reply_post_free;
996 dma_addr_t reply_post_free_dma;
997};
998
f92363d1
SR		 999typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc);
1000/**
1001 * struct MPT3SAS_ADAPTER - per adapter struct
1002 * @list: ioc_list
1003 * @shost: shost object
1004 * @id: unique adapter id
1005 * @cpu_count: number online cpus
1006 * @name: generic ioc string
1007 * @tmp_string: tmp string used for logging
1008 * @pdev: pci pdev object
1009 * @pio_chip: physical io register space
1010 * @chip: memory mapped register space
1011 * @chip_phys: physical addrss prior to mapping
1012 * @logging_level: see mpt3sas_debug.h
1013 * @fwfault_debug: debuging FW timeouts
1014 * @ir_firmware: IR firmware present
1015 * @bars: bitmask of BAR's that must be configured
1016 * @mask_interrupts: ignore interrupt
9b05c91a 1017 * @dma_mask: used to set the consistent dma mask
d88e1eab
SPS		 1018 * @pci_access_mutex: Mutex to synchronize ioctl, sysfs show path and
1019 * pci resource handling
f92363d1
SR		 1020 * @fault_reset_work_q_name: fw fault work queue
1021 * @fault_reset_work_q: ""
1022 * @fault_reset_work: ""
1023 * @firmware_event_name: fw event work queue
1024 * @firmware_event_thread: ""
1025 * @fw_event_lock:
1026 * @fw_event_list: list of fw events
1027 * @aen_event_read_flag: event log was read
1028 * @broadcast_aen_busy: broadcast aen waiting to be serviced
1029 * @shost_recovery: host reset in progress
1030 * @ioc_reset_in_progress_lock:
1031 * @ioc_link_reset_in_progress: phy/hard reset in progress
1032 * @ignore_loginfos: ignore loginfos during task management
1033 * @remove_host: flag for when driver unloads, to avoid sending dev resets
1034 * @pci_error_recovery: flag to prevent ioc access until slot reset completes
1035 * @wait_for_discovery_to_complete: flag set at driver load time when
1036 * waiting on reporting devices
1037 * @is_driver_loading: flag set at driver load time
1038 * @port_enable_failed: flag set when port enable has failed
1039 * @start_scan: flag set from scan_start callback, cleared from _mpt3sas_fw_work
1040 * @start_scan_failed: means port enable failed, return's the ioc_status
1041 * @msix_enable: flag indicating msix is enabled
1042 * @msix_vector_count: number msix vectors
1043 * @cpu_msix_table: table for mapping cpus to msix index
1044 * @cpu_msix_table_sz: table size
51e3b2ad 1045 * @total_io_cnt: Gives total IO count, used to load balance the interrupts
5dd48a55
SP		 1046 * @high_iops_outstanding: used to load balance the interrupts
1047 * within high iops reply queues
51e3b2ad
SP		 1048 * @msix_load_balance: Enables load balancing of interrupts across
1049 * the multiple MSIXs
f92363d1 1050 * @schedule_dead_ioc_flush_running_cmds: callback to flush pending commands
288addd6
SP		 1051 * @thresh_hold: Max number of reply descriptors processed
1052 * before updating Host Index
3ac8e47b 1053 * @drv_support_bitmap: driver's supported feature bit map
f92363d1
SR		 1054 * @scsi_io_cb_idx: shost generated commands
1055 * @tm_cb_idx: task management commands
1056 * @scsih_cb_idx: scsih internal commands
1057 * @transport_cb_idx: transport internal commands
1058 * @ctl_cb_idx: clt internal commands
1059 * @base_cb_idx: base internal commands
1060 * @config_cb_idx: base internal commands
1061 * @tm_tr_cb_idx : device removal target reset handshake
1062 * @tm_tr_volume_cb_idx : volume removal target reset
1063 * @base_cmds:
1064 * @transport_cmds:
1065 * @scsih_cmds:
1066 * @tm_cmds:
1067 * @ctl_cmds:
1068 * @config_cmds:
1069 * @base_add_sg_single: handler for either 32/64 bit sgl's
1070 * @event_type: bits indicating which events to log
1071 * @event_context: unique id for each logged event
1072 * @event_log: event log pointer
1073 * @event_masks: events that are masked
1074 * @facts: static facts data
ffedeae1 1075 * @prev_fw_facts: previous fw facts data
f92363d1
SR		 1076 * @pfacts: static port facts data
1077 * @manu_pg0: static manufacturing page 0
1078 * @manu_pg10: static manufacturing page 10
1079 * @manu_pg11: static manufacturing page 11
1080 * @bios_pg2: static bios page 2
1081 * @bios_pg3: static bios page 3
1082 * @ioc_pg8: static ioc page 8
1083 * @iounit_pg0: static iounit page 0
1084 * @iounit_pg1: static iounit page 1
2d8ce8c9 1085 * @iounit_pg8: static iounit page 8
f92363d1
SR		 1086 * @sas_hba: sas host object
1087 * @sas_expander_list: expander object list
22a923c3 1088 * @enclosure_list: enclosure object list
f92363d1
SR		 1089 * @sas_node_lock:
1090 * @sas_device_list: sas device object list
1091 * @sas_device_init_list: sas device object list (used only at init time)
1092 * @sas_device_lock:
d88e1eab
SPS		 1093 * @pcie_device_list: pcie device object list
1094 * @pcie_device_init_list: pcie device object list (used only at init time)
1095 * @pcie_device_lock:
f92363d1
SR		 1096 * @io_missing_delay: time for IO completed by fw when PDR enabled
1097 * @device_missing_delay: time for device missing by fw when PDR enabled
1098 * @sas_id : used for setting volume target IDs
d88e1eab 1099 * @pcie_target_id: used for setting pcie target IDs
f92363d1
SR		 1100 * @blocking_handles: bitmask used to identify which devices need blocking
1101 * @pd_handles : bitmask for PD handles
1102 * @pd_handles_sz : size of pd_handle bitmask
1103 * @config_page_sz: config page size
1104 * @config_page: reserve memory for config page payload
1105 * @config_page_dma:
1106 * @hba_queue_depth: hba request queue depth
1107 * @sge_size: sg element size for either 32/64 bit
1108 * @scsiio_depth: SCSI_IO queue depth
1109 * @request_sz: per request frame size
1110 * @request: pool of request frames
1111 * @request_dma:
1112 * @request_dma_sz:
1113 * @scsi_lookup: firmware request tracker list
1114 * @scsi_lookup_lock:
1115 * @free_list: free list of request
1116 * @pending_io_count:
1117 * @reset_wq:
1118 * @chain: pool of chains
1119 * @chain_dma:
1120 * @max_sges_in_main_message: number sg elements in main message
1121 * @max_sges_in_chain_message: number sg elements per chain
1122 * @chains_needed_per_io: max chains per io
1123 * @chain_depth: total chains allocated
ebb3024e
SS		 1124 * @chain_segment_sz: gives the max number of
1125 * SGEs accommodate on single chain buffer
f92363d1
SR		 1126 * @hi_priority_smid:
1127 * @hi_priority:
1128 * @hi_priority_dma:
1129 * @hi_priority_depth:
1130 * @hpr_lookup:
1131 * @hpr_free_list:
1132 * @internal_smid:
1133 * @internal:
1134 * @internal_dma:
1135 * @internal_depth:
1136 * @internal_lookup:
1137 * @internal_free_list:
1138 * @sense: pool of sense
1139 * @sense_dma:
1140 * @sense_dma_pool:
1141 * @reply_depth: hba reply queue depth:
1142 * @reply_sz: per reply frame size:
1143 * @reply: pool of replys:
1144 * @reply_dma:
1145 * @reply_dma_pool:
1146 * @reply_free_queue_depth: reply free depth
1147 * @reply_free: pool for reply free queue (32 bit addr)
1148 * @reply_free_dma:
1149 * @reply_free_dma_pool:
1150 * @reply_free_host_index: tail index in pool to insert free replys
1151 * @reply_post_queue_depth: reply post queue depth
9b05c91a
SR		 1152 * @reply_post_struct: struct for reply_post_free physical & virt address
1153 * @rdpq_array_capable: FW supports multiple reply queue addresses in ioc_init
1154 * @rdpq_array_enable: rdpq_array support is enabled in the driver
1155 * @rdpq_array_enable_assigned: this ensures that rdpq_array_enable flag
1156 * is assigned only ones
f92363d1
SR		 1157 * @reply_queue_count: number of reply queue's
1158 * @reply_queue_list: link list contaning the reply queue info
fb77bb53
SR		 1159 * @msix96_vector: 96 MSI-X vector support
1160 * @replyPostRegisterIndex: index of next position in Reply Desc Post Queue
f92363d1
SR		 1161 * @delayed_tr_list: target reset link list
1162 * @delayed_tr_volume_list: volume target reset link list
fd0331b3
SS		 1163 * @delayed_sc_list:
1164 * @delayed_event_ack_list:
08c4d550
SR		 1165 * @temp_sensors_count: flag to carry the number of temperature sensors
1166 * @pci_access_mutex: Mutex to synchronize ioctl,sysfs show path and
1167 * pci resource handling. PCI resource freeing will lead to free
1168 * vital hardware/memory resource, which might be in use by cli/sysfs
1169 * path functions resulting in Null pointer reference followed by kernel
1170 * crash. To avoid the above race condition we use mutex syncrhonization
1171 * which ensures the syncrhonization between cli/sysfs_show path.
79c74d03 1172 * @atomic_desc_capable: Atomic Request Descriptor support.
5dd48a55 1173 * @GET_MSIX_INDEX: Get the msix index of high iops queues.
f92363d1
SR		 1174 */
1175struct MPT3SAS_ADAPTER {
1176 struct list_head list;
1177 struct Scsi_Host *shost;
1178 u8 id;
1179 int cpu_count;
1180 char name[MPT_NAME_LENGTH];
bbfd8e8b 1181 char driver_name[MPT_NAME_LENGTH - 8];
f92363d1
SR		 1182 char tmp_string[MPT_STRING_LENGTH];
1183 struct pci_dev *pdev;
1184 Mpi2SystemInterfaceRegs_t __iomem *chip;
6f9e09fd 1185 phys_addr_t chip_phys;
f92363d1
SR		 1186 int logging_level;
1187 int fwfault_debug;
1188 u8 ir_firmware;
1189 int bars;
1190 u8 mask_interrupts;
9b05c91a 1191 int dma_mask;
f92363d1
SR		 1192
1193 /* fw fault handler */
1194 char fault_reset_work_q_name[20];
1195 struct workqueue_struct *fault_reset_work_q;
1196 struct delayed_work fault_reset_work;
1197
1198 /* fw event handler */
1199 char firmware_event_name[20];
1200 struct workqueue_struct *firmware_event_thread;
1201 spinlock_t fw_event_lock;
1202 struct list_head fw_event_list;
1203
1204 /* misc flags */
1205 int aen_event_read_flag;
1206 u8 broadcast_aen_busy;
1207 u16 broadcast_aen_pending;
1208 u8 shost_recovery;
459325c4 1209 u8 got_task_abort_from_ioctl;
f92363d1
SR		 1210
1211 struct mutex reset_in_progress_mutex;
1212 spinlock_t ioc_reset_in_progress_lock;
1213 u8 ioc_link_reset_in_progress;
f92363d1
SR		 1214
1215 u8 ignore_loginfos;
1216 u8 remove_host;
1217 u8 pci_error_recovery;
1218 u8 wait_for_discovery_to_complete;
1219 u8 is_driver_loading;
1220 u8 port_enable_failed;
1221 u8 start_scan;
1222 u16 start_scan_failed;
1223
1224 u8 msix_enable;
1225 u16 msix_vector_count;
1226 u8 *cpu_msix_table;
1227 u16 cpu_msix_table_sz;
7786ab6a 1228 resource_size_t __iomem **reply_post_host_index;
f92363d1
SR		 1229 u32 ioc_reset_count;
1230 MPT3SAS_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds;
16e179bd 1231 u32 non_operational_loop;
51e3b2ad 1232 atomic64_t total_io_cnt;
5dd48a55 1233 atomic64_t high_iops_outstanding;
51e3b2ad 1234 bool msix_load_balance;
288addd6 1235 u16 thresh_hold;
18fd3d8c 1236 u8 high_iops_queues;
3ac8e47b 1237 u32 drv_support_bitmap;
8dc8d29a 1238 bool enable_sdev_max_qd;
f92363d1
SR		 1239
1240 /* internal commands, callback index */
1241 u8 scsi_io_cb_idx;
1242 u8 tm_cb_idx;
1243 u8 transport_cb_idx;
1244 u8 scsih_cb_idx;
1245 u8 ctl_cb_idx;
1246 u8 base_cb_idx;
1247 u8 port_enable_cb_idx;
1248 u8 config_cb_idx;
1249 u8 tm_tr_cb_idx;
1250 u8 tm_tr_volume_cb_idx;
1251 u8 tm_sas_control_cb_idx;
1252 struct _internal_cmd base_cmds;
1253 struct _internal_cmd port_enable_cmds;
1254 struct _internal_cmd transport_cmds;
1255 struct _internal_cmd scsih_cmds;
1256 struct _internal_cmd tm_cmds;
1257 struct _internal_cmd ctl_cmds;
1258 struct _internal_cmd config_cmds;
1259
1260 MPT_ADD_SGE base_add_sg_single;
1261
1262 /* function ptr for either IEEE or MPI sg elements */
1263 MPT_BUILD_SG_SCMD build_sg_scmd;
1264 MPT_BUILD_SG build_sg;
1265 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge;
f92363d1 1266 u16 sge_size_ieee;
d357e84d 1267 u16 hba_mpi_version_belonged;
f92363d1
SR		 1268
1269 /* function ptr for MPI sg elements only */
1270 MPT_BUILD_SG build_sg_mpi;
1271 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge_mpi;
1272
aff39e61
SPS		 1273 /* function ptr for NVMe PRP elements only */
1274 NVME_BUILD_PRP build_nvme_prp;
1275
f92363d1
SR		 1276 /* event log */
1277 u32 event_type[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1278 u32 event_context;
1279 void *event_log;
1280 u32 event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1281
c1a6c5ac
C		 1282 u8 tm_custom_handling;
1283 u8 nvme_abort_timeout;
1284
1285
f92363d1
SR		 1286 /* static config pages */
1287 struct mpt3sas_facts facts;
ffedeae1 1288 struct mpt3sas_facts prev_fw_facts;
f92363d1
SR		 1289 struct mpt3sas_port_facts *pfacts;
1290 Mpi2ManufacturingPage0_t manu_pg0;
1291 struct Mpi2ManufacturingPage10_t manu_pg10;
1292 struct Mpi2ManufacturingPage11_t manu_pg11;
1293 Mpi2BiosPage2_t bios_pg2;
1294 Mpi2BiosPage3_t bios_pg3;
1295 Mpi2IOCPage8_t ioc_pg8;
1296 Mpi2IOUnitPage0_t iounit_pg0;
1297 Mpi2IOUnitPage1_t iounit_pg1;
2d8ce8c9 1298 Mpi2IOUnitPage8_t iounit_pg8;
2426f209 1299 Mpi2IOCPage1_t ioc_pg1_copy;
f92363d1
SR		 1300
1301 struct _boot_device req_boot_device;
1302 struct _boot_device req_alt_boot_device;
1303 struct _boot_device current_boot_device;
1304
1305 /* sas hba, expander, and device list */
1306 struct _sas_node sas_hba;
1307 struct list_head sas_expander_list;
22a923c3 1308 struct list_head enclosure_list;
f92363d1
SR		 1309 spinlock_t sas_node_lock;
1310 struct list_head sas_device_list;
1311 struct list_head sas_device_init_list;
1312 spinlock_t sas_device_lock;
d88e1eab
SPS		 1313 struct list_head pcie_device_list;
1314 struct list_head pcie_device_init_list;
1315 spinlock_t pcie_device_lock;
1316
f92363d1
SR		 1317 struct list_head raid_device_list;
1318 spinlock_t raid_device_lock;
1319 u8 io_missing_delay;
1320 u16 device_missing_delay;
1321 int sas_id;
d88e1eab 1322 int pcie_target_id;
f92363d1
SR		 1323
1324 void *blocking_handles;
1325 void *pd_handles;
1326 u16 pd_handles_sz;
1327
c696f7b8
SPS		 1328 void *pend_os_device_add;
1329 u16 pend_os_device_add_sz;
1330
f92363d1
SR		 1331 /* config page */
1332 u16 config_page_sz;
1333 void *config_page;
1334 dma_addr_t config_page_dma;
182ac784 1335 void *config_vaddr;
f92363d1
SR		 1336
1337 /* scsiio request */
1338 u16 hba_queue_depth;
1339 u16 sge_size;
1340 u16 scsiio_depth;
1341 u16 request_sz;
1342 u8 *request;
1343 dma_addr_t request_dma;
1344 u32 request_dma_sz;
dbec4c90 1345 struct pcie_sg_list *pcie_sg_lookup;
f92363d1 1346 spinlock_t scsi_lookup_lock;
f92363d1
SR		 1347 int pending_io_count;
1348 wait_queue_head_t reset_wq;
1349
016d5c35
SPS		 1350 /* PCIe SGL */
1351 struct dma_pool *pcie_sgl_dma_pool;
1352 /* Host Page Size */
1353 u32 page_size;
1354
f92363d1 1355 /* chain */
93204b78 1356 struct chain_lookup *chain_lookup;
f92363d1
SR		 1357 struct list_head free_chain_list;
1358 struct dma_pool *chain_dma_pool;
1359 ulong chain_pages;
1360 u16 max_sges_in_main_message;
1361 u16 max_sges_in_chain_message;
1362 u16 chains_needed_per_io;
1363 u32 chain_depth;
ebb3024e 1364 u16 chain_segment_sz;
dbec4c90 1365 u16 chains_per_prp_buffer;
f92363d1
SR		 1366
1367 /* hi-priority queue */
1368 u16 hi_priority_smid;
1369 u8 *hi_priority;
1370 dma_addr_t hi_priority_dma;
1371 u16 hi_priority_depth;
1372 struct request_tracker *hpr_lookup;
1373 struct list_head hpr_free_list;
1374
1375 /* internal queue */
1376 u16 internal_smid;
1377 u8 *internal;
1378 dma_addr_t internal_dma;
1379 u16 internal_depth;
1380 struct request_tracker *internal_lookup;
1381 struct list_head internal_free_list;
1382
1383 /* sense */
1384 u8 *sense;
1385 dma_addr_t sense_dma;
1386 struct dma_pool *sense_dma_pool;
1387
1388 /* reply */
1389 u16 reply_sz;
1390 u8 *reply;
1391 dma_addr_t reply_dma;
1392 u32 reply_dma_max_address;
1393 u32 reply_dma_min_address;
1394 struct dma_pool *reply_dma_pool;
1395
1396 /* reply free queue */
1397 u16 reply_free_queue_depth;
1398 __le32 *reply_free;
1399 dma_addr_t reply_free_dma;
1400 struct dma_pool *reply_free_dma_pool;
1401 u32 reply_free_host_index;
1402
1403 /* reply post queue */
1404 u16 reply_post_queue_depth;
9b05c91a
SR		 1405 struct reply_post_struct *reply_post;
1406 u8 rdpq_array_capable;
1407 u8 rdpq_array_enable;
1408 u8 rdpq_array_enable_assigned;
f92363d1 1409 struct dma_pool *reply_post_free_dma_pool;
cd33223b
C		 1410 struct dma_pool *reply_post_free_array_dma_pool;
1411 Mpi2IOCInitRDPQArrayEntry *reply_post_free_array;
1412 dma_addr_t reply_post_free_array_dma;
f92363d1
SR		 1413 u8 reply_queue_count;
1414 struct list_head reply_queue_list;
1415
0bb337c9
SPS		 1416 u8 combined_reply_queue;
1417 u8 combined_reply_index_count;
610ef1e9 1418 u8 smp_affinity_enable;
fb77bb53
SR		 1419 /* reply post register index */
1420 resource_size_t **replyPostRegisterIndex;
1421
f92363d1
SR		 1422 struct list_head delayed_tr_list;
1423 struct list_head delayed_tr_volume_list;
fd0331b3
SS		 1424 struct list_head delayed_sc_list;
1425 struct list_head delayed_event_ack_list;
2d8ce8c9 1426 u8 temp_sensors_count;
08c4d550 1427 struct mutex pci_access_mutex;
f92363d1
SR		 1428
1429 /* diag buffer support */
1430 u8 *diag_buffer[MPI2_DIAG_BUF_TYPE_COUNT];
1431 u32 diag_buffer_sz[MPI2_DIAG_BUF_TYPE_COUNT];
1432 dma_addr_t diag_buffer_dma[MPI2_DIAG_BUF_TYPE_COUNT];
1433 u8 diag_buffer_status[MPI2_DIAG_BUF_TYPE_COUNT];
1434 u32 unique_id[MPI2_DIAG_BUF_TYPE_COUNT];
1435 u32 product_specific[MPI2_DIAG_BUF_TYPE_COUNT][23];
1436 u32 diagnostic_flags[MPI2_DIAG_BUF_TYPE_COUNT];
1437 u32 ring_buffer_offset;
1438 u32 ring_buffer_sz;
7786ab6a 1439 u8 is_warpdrive;
c520691b 1440 u8 is_mcpu_endpoint;
7786ab6a
SR		 1441 u8 hide_ir_msg;
1442 u8 mfg_pg10_hide_flag;
1443 u8 hide_drives;
f92363d1
SR		 1444 spinlock_t diag_trigger_lock;
1445 u8 diag_trigger_active;
79c74d03 1446 u8 atomic_desc_capable;
b8992029 1447 BASE_READ_REG base_readl;
f92363d1
SR		 1448 struct SL_WH_MASTER_TRIGGER_T diag_trigger_master;
1449 struct SL_WH_EVENT_TRIGGERS_T diag_trigger_event;
1450 struct SL_WH_SCSI_TRIGGERS_T diag_trigger_scsi;
1451 struct SL_WH_MPI_TRIGGERS_T diag_trigger_mpi;
c696f7b8
SPS		 1452 void *device_remove_in_progress;
1453 u16 device_remove_in_progress_sz;
998f26ae 1454 u8 is_gen35_ioc;
cc68e607 1455 u8 is_aero_ioc;
81c16f83 1456 PUT_SMID_IO_FP_HIP put_smid_scsi_io;
078a4cc1
SP		 1457 PUT_SMID_IO_FP_HIP put_smid_fast_path;
1458 PUT_SMID_IO_FP_HIP put_smid_hi_priority;
1459 PUT_SMID_DEFAULT put_smid_default;
5dd48a55 1460 GET_MSIX_INDEX get_msix_index_for_smlio;
f92363d1
SR		 1461};
1462
3ac8e47b
SP		 1463#define MPT_DRV_SUPPORT_BITMAP_MEMMOVE 0x00000001
1464
f92363d1
SR		 1465typedef u8 (*MPT_CALLBACK)(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1466 u32 reply);
1467
1468
1469/* base shared API */
1470extern struct list_head mpt3sas_ioc_list;
d357e84d 1471extern char driver_name[MPT_NAME_LENGTH];
08c4d550
SR		 1472/* spinlock on list operations over IOCs
1473 * Case: when multiple warpdrive cards(IOCs) are in use
1474 * Each IOC will added to the ioc list structure on initialization.
1475 * Watchdog threads run at regular intervals to check IOC for any
1476 * fault conditions which will trigger the dead_ioc thread to
1477 * deallocate pci resource, resulting deleting the IOC netry from list,
1478 * this deletion need to protected by spinlock to enusre that
1479 * ioc removal is syncrhonized, if not synchronized it might lead to
1480 * list_del corruption as the ioc list is traversed in cli path.
1481 */
1482extern spinlock_t gioc_lock;
d357e84d 1483
f92363d1
SR		 1484void mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc);
1485void mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc);
1486
1487int mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc);
1488void mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc);
1489int mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc);
1490void mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc);
22a923c3 1491void mpt3sas_free_enclosure_list(struct MPT3SAS_ADAPTER *ioc);
98c56ad3 1492int mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc,
f92363d1
SR		 1493 enum reset_type type);
1494
1495void *mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1496void *mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1497__le32 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc,
1498 u16 smid);
016d5c35 1499void *mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid);
d8335ae2 1500dma_addr_t mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid);
5f0dfb7a 1501void mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc);
f92363d1 1502
40114bde
SP		 1503void mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1504 u16 handle);
1505void mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1506 u16 msix_task);
1507void mpt3sas_base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1508void mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid);
f92363d1
SR		 1509/* hi-priority queue */
1510u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1511u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx,
dbec4c90
SPS		 1512 struct scsi_cmnd *scmd);
1513void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc,
1514 struct scsiio_tracker *st);
f92363d1
SR		 1515
1516u16 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1517void mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid);
f92363d1
SR		 1518void mpt3sas_base_initialize_callback_handler(void);
1519u8 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func);
1520void mpt3sas_base_release_callback_handler(u8 cb_idx);
1521
1522u8 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1523 u32 reply);
1524u8 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1525 u8 msix_index, u32 reply);
1526void *mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc,
1527 u32 phys_addr);
1528
1529u32 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked);
1530
1531void mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code);
1532int mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc,
1533 Mpi2SasIoUnitControlReply_t *mpi_reply,
1534 Mpi2SasIoUnitControlRequest_t *mpi_request);
1535int mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc,
1536 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request);
1537
1538void mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc,
1539 u32 *event_type);
1540
1541void mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc);
1542
1543void mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc,
1544 u16 device_missing_delay, u8 io_missing_delay);
1545
1546int mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc);
1547
c666d3be
SR		 1548void
1549mpt3sas_wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc);
1550
d37306ca
C		 1551u8 mpt3sas_base_check_cmd_timeout(struct MPT3SAS_ADAPTER *ioc,
1552 u8 status, void *mpi_request, int sz);
f4305749 1553int mpt3sas_wait_for_ioc(struct MPT3SAS_ADAPTER *ioc, int wait_count);
f92363d1
SR		 1554
1555/* scsih shared API */
dbec4c90
SPS		 1556struct scsi_cmnd *mpt3sas_scsih_scsi_lookup_get(struct MPT3SAS_ADAPTER *ioc,
1557 u16 smid);
f92363d1
SR		 1558u8 mpt3sas_scsih_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index,
1559 u32 reply);
c7a35705
BVA		 1560void mpt3sas_scsih_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1561void mpt3sas_scsih_after_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1562void mpt3sas_scsih_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
f92363d1 1563
c1a6c5ac
C		 1564int mpt3sas_scsih_issue_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle, u64 lun,
1565 u8 type, u16 smid_task, u16 msix_task, u8 timeout, u8 tr_method);
96902835 1566int mpt3sas_scsih_issue_locked_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle,
c1a6c5ac
C		 1567 u64 lun, u8 type, u16 smid_task, u16 msix_task,
1568 u8 timeout, u8 tr_method);
96902835 1569
f92363d1
SR		 1570void mpt3sas_scsih_set_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1571void mpt3sas_scsih_clear_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1572void mpt3sas_expander_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1573void mpt3sas_device_remove_by_sas_address(struct MPT3SAS_ADAPTER *ioc,
1574 u64 sas_address);
fd0331b3
SS		 1575u8 mpt3sas_check_for_pending_internal_cmds(struct MPT3SAS_ADAPTER *ioc,
1576 u16 smid);
f92363d1
SR		 1577
1578struct _sas_node *mpt3sas_scsih_expander_find_by_handle(
1579 struct MPT3SAS_ADAPTER *ioc, u16 handle);
1580struct _sas_node *mpt3sas_scsih_expander_find_by_sas_address(
1581 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
d1cb5e49
SR		 1582struct _sas_device *mpt3sas_get_sdev_by_addr(
1583 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1584struct _sas_device *__mpt3sas_get_sdev_by_addr(
1585 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
c102e00c
SPS		 1586struct _sas_device *mpt3sas_get_sdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1587 u16 handle);
1588struct _pcie_device *mpt3sas_get_pdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1589 u16 handle);
f92363d1
SR		 1590
1591void mpt3sas_port_enable_complete(struct MPT3SAS_ADAPTER *ioc);
c84b06a4
SR		 1592struct _raid_device *
1593mpt3sas_raid_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle);
8dc8d29a 1594void mpt3sas_scsih_change_queue_depth(struct scsi_device *sdev, int qdepth);
8a7e4c24 1595
f92363d1
SR		 1596/* config shared API */
1597u8 mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1598 u32 reply);
1599int mpt3sas_config_get_number_hba_phys(struct MPT3SAS_ADAPTER *ioc,
1600 u8 *num_phys);
1601int mpt3sas_config_get_manufacturing_pg0(struct MPT3SAS_ADAPTER *ioc,
1602 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page);
1603int mpt3sas_config_get_manufacturing_pg7(struct MPT3SAS_ADAPTER *ioc,
1604 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage7_t *config_page,
1605 u16 sz);
1606int mpt3sas_config_get_manufacturing_pg10(struct MPT3SAS_ADAPTER *ioc,
1607 Mpi2ConfigReply_t *mpi_reply,
1608 struct Mpi2ManufacturingPage10_t *config_page);
1609
1610int mpt3sas_config_get_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1611 Mpi2ConfigReply_t *mpi_reply,
1612 struct Mpi2ManufacturingPage11_t *config_page);
1613int mpt3sas_config_set_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1614 Mpi2ConfigReply_t *mpi_reply,
1615 struct Mpi2ManufacturingPage11_t *config_page);
1616
1617int mpt3sas_config_get_bios_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1618 *mpi_reply, Mpi2BiosPage2_t *config_page);
1619int mpt3sas_config_get_bios_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1620 *mpi_reply, Mpi2BiosPage3_t *config_page);
1621int mpt3sas_config_get_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1622 *mpi_reply, Mpi2IOUnitPage0_t *config_page);
1623int mpt3sas_config_get_sas_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1624 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage0_t *config_page,
1625 u32 form, u32 handle);
1626int mpt3sas_config_get_sas_device_pg1(struct MPT3SAS_ADAPTER *ioc,
1627 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage1_t *config_page,
1628 u32 form, u32 handle);
c102e00c
SPS		 1629int mpt3sas_config_get_pcie_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1630 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage0_t *config_page,
1631 u32 form, u32 handle);
1632int mpt3sas_config_get_pcie_device_pg2(struct MPT3SAS_ADAPTER *ioc,
1633 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage2_t *config_page,
1634 u32 form, u32 handle);
f92363d1
SR		 1635int mpt3sas_config_get_sas_iounit_pg0(struct MPT3SAS_ADAPTER *ioc,
1636 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage0_t *config_page,
1637 u16 sz);
1638int mpt3sas_config_get_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1639 *mpi_reply, Mpi2IOUnitPage1_t *config_page);
42263095
SR		 1640int mpt3sas_config_get_iounit_pg3(struct MPT3SAS_ADAPTER *ioc,
1641 Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage3_t *config_page, u16 sz);
f92363d1
SR		 1642int mpt3sas_config_set_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1643 *mpi_reply, Mpi2IOUnitPage1_t *config_page);
2d8ce8c9
SR		 1644int mpt3sas_config_get_iounit_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1645 *mpi_reply, Mpi2IOUnitPage8_t *config_page);
f92363d1
SR		 1646int mpt3sas_config_get_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1647 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1648 u16 sz);
1649int mpt3sas_config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1650 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1651 u16 sz);
2426f209
SP		 1652int mpt3sas_config_get_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1653 *mpi_reply, Mpi2IOCPage1_t *config_page);
1654int mpt3sas_config_set_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1655 *mpi_reply, Mpi2IOCPage1_t *config_page);
f92363d1
SR		 1656int mpt3sas_config_get_ioc_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1657 *mpi_reply, Mpi2IOCPage8_t *config_page);
1658int mpt3sas_config_get_expander_pg0(struct MPT3SAS_ADAPTER *ioc,
1659 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage0_t *config_page,
1660 u32 form, u32 handle);
1661int mpt3sas_config_get_expander_pg1(struct MPT3SAS_ADAPTER *ioc,
1662 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage1_t *config_page,
1663 u32 phy_number, u16 handle);
1664int mpt3sas_config_get_enclosure_pg0(struct MPT3SAS_ADAPTER *ioc,
1665 Mpi2ConfigReply_t *mpi_reply, Mpi2SasEnclosurePage0_t *config_page,
1666 u32 form, u32 handle);
1667int mpt3sas_config_get_phy_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1668 *mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number);
1669int mpt3sas_config_get_phy_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1670 *mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number);
1671int mpt3sas_config_get_raid_volume_pg1(struct MPT3SAS_ADAPTER *ioc,
1672 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
1673 u32 handle);
1674int mpt3sas_config_get_number_pds(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1675 u8 *num_pds);
1676int mpt3sas_config_get_raid_volume_pg0(struct MPT3SAS_ADAPTER *ioc,
1677 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form,
1678 u32 handle, u16 sz);
1679int mpt3sas_config_get_phys_disk_pg0(struct MPT3SAS_ADAPTER *ioc,
1680 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
1681 u32 form, u32 form_specific);
1682int mpt3sas_config_get_volume_handle(struct MPT3SAS_ADAPTER *ioc, u16 pd_handle,
1683 u16 *volume_handle);
1684int mpt3sas_config_get_volume_wwid(struct MPT3SAS_ADAPTER *ioc,
1685 u16 volume_handle, u64 *wwid);
1686
1687/* ctl shared API */
1688extern struct device_attribute *mpt3sas_host_attrs[];
1689extern struct device_attribute *mpt3sas_dev_attrs[];
c84b06a4
SR		 1690void mpt3sas_ctl_init(ushort hbas_to_enumerate);
1691void mpt3sas_ctl_exit(ushort hbas_to_enumerate);
f92363d1
SR		 1692u8 mpt3sas_ctl_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1693 u32 reply);
c7a35705
BVA		 1694void mpt3sas_ctl_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1695void mpt3sas_ctl_after_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1696void mpt3sas_ctl_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
f92363d1
SR		 1697u8 mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc,
1698 u8 msix_index, u32 reply);
1699void mpt3sas_ctl_add_to_event_log(struct MPT3SAS_ADAPTER *ioc,
1700 Mpi2EventNotificationReply_t *mpi_reply);
1701
1702void mpt3sas_enable_diag_buffer(struct MPT3SAS_ADAPTER *ioc,
ad61dd30 1703 u8 bits_to_register);
f92363d1
SR		 1704int mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type,
1705 u8 *issue_reset);
1706
1707/* transport shared API */
7497392a 1708extern struct scsi_transport_template *mpt3sas_transport_template;
f92363d1
SR		 1709u8 mpt3sas_transport_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1710 u32 reply);
1711struct _sas_port *mpt3sas_transport_port_add(struct MPT3SAS_ADAPTER *ioc,
1712 u16 handle, u64 sas_address);
1713void mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1714 u64 sas_address_parent);
1715int mpt3sas_transport_add_host_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy
1716 *mpt3sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev);
1717int mpt3sas_transport_add_expander_phy(struct MPT3SAS_ADAPTER *ioc,
1718 struct _sas_phy *mpt3sas_phy, Mpi2ExpanderPage1_t expander_pg1,
1719 struct device *parent_dev);
1720void mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc,
1721 u64 sas_address, u16 handle, u8 phy_number, u8 link_rate);
1722extern struct sas_function_template mpt3sas_transport_functions;
1723extern struct scsi_transport_template *mpt3sas_transport_template;
f92363d1
SR		 1724/* trigger data externs */
1725void mpt3sas_send_trigger_data_event(struct MPT3SAS_ADAPTER *ioc,
1726 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1727void mpt3sas_process_trigger_data(struct MPT3SAS_ADAPTER *ioc,
1728 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1729void mpt3sas_trigger_master(struct MPT3SAS_ADAPTER *ioc,
1730 u32 tigger_bitmask);
1731void mpt3sas_trigger_event(struct MPT3SAS_ADAPTER *ioc, u16 event,
1732 u16 log_entry_qualifier);
1733void mpt3sas_trigger_scsi(struct MPT3SAS_ADAPTER *ioc, u8 sense_key,
1734 u8 asc, u8 ascq);
1735void mpt3sas_trigger_mpi(struct MPT3SAS_ADAPTER *ioc, u16 ioc_status,
1736 u32 loginfo);
c84b06a4
SR		 1737
1738/* warpdrive APIs */
1739u8 mpt3sas_get_num_volumes(struct MPT3SAS_ADAPTER *ioc);
1740void mpt3sas_init_warpdrive_properties(struct MPT3SAS_ADAPTER *ioc,
1741 struct _raid_device *raid_device);
c84b06a4
SR		 1742void
1743mpt3sas_setup_direct_io(struct MPT3SAS_ADAPTER *ioc, struct scsi_cmnd *scmd,
dbec4c90 1744 struct _raid_device *raid_device, Mpi25SCSIIORequest_t *mpi_request);
c84b06a4 1745
307d9075
AM		 1746/* NCQ Prio Handling Check */
1747bool scsih_ncq_prio_supp(struct scsi_device *sdev);
1748
5bb309db
SP		 1749/**
1750 * _scsih_is_pcie_scsi_device - determines if device is an pcie scsi device
1751 * @device_info: bitfield providing information about the device.
1752 * Context: none
1753 *
1754 * Returns 1 if scsi device.
1755 */
1756static inline int
1757mpt3sas_scsih_is_pcie_scsi_device(u32 device_info)
1758{
1759 if ((device_info &
1760 MPI26_PCIE_DEVINFO_MASK_DEVICE_TYPE) == MPI26_PCIE_DEVINFO_SCSI)
1761 return 1;
1762 else
1763 return 0;
1764}
f92363d1 1765#endif /* MPT3SAS_BASE_H_INCLUDED */
Linux 6.x block layer and io_uring tree(s)