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megaraid_sas: update MAINTAINERS and copyright information for megaraid drivers
[linux-block.git] / drivers / scsi / megaraid / megaraid_sas_fp.c
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9c915a8c 1/*
2 * Linux MegaRAID driver for SAS based RAID controllers
3 *
e399065b
SS		 4 * Copyright (c) 2009-2013 LSI Corporation
5 * Copyright (c) 2013-2014 Avago Technologies
9c915a8c 6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
e399065b 18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
9c915a8c 19 *
20 * FILE: megaraid_sas_fp.c
21 *
e399065b 22 * Authors: Avago Technologies
9c915a8c 23 * Sumant Patro
24 * Varad Talamacki
25 * Manoj Jose
e399065b
SS		 26 * Kashyap Desai <kashyap.desai@avagotech.com>
27 * Sumit Saxena <sumit.saxena@avagotech.com>
9c915a8c 28 *
e399065b 29 * Send feedback to: megaraidlinux.pdl@avagotech.com
9c915a8c 30 *
e399065b
SS		 31 * Mail to: Avago Technologies, 350 West Trimble Road, Building 90,
32 * San Jose, California 95131
9c915a8c 33 */
34
35#include <linux/kernel.h>
36#include <linux/types.h>
37#include <linux/pci.h>
38#include <linux/list.h>
39#include <linux/moduleparam.h>
40#include <linux/module.h>
41#include <linux/spinlock.h>
42#include <linux/interrupt.h>
43#include <linux/delay.h>
9c915a8c 44#include <linux/uio.h>
45#include <linux/uaccess.h>
46#include <linux/fs.h>
47#include <linux/compat.h>
48#include <linux/blkdev.h>
49#include <linux/poll.h>
50
51#include <scsi/scsi.h>
52#include <scsi/scsi_cmnd.h>
53#include <scsi/scsi_device.h>
54#include <scsi/scsi_host.h>
55
56#include "megaraid_sas_fusion.h"
36807e67 57#include "megaraid_sas.h"
9c915a8c 58#include <asm/div64.h>
59
d2552ebe
SS		 60#define LB_PENDING_CMDS_DEFAULT 4
61static unsigned int lb_pending_cmds = LB_PENDING_CMDS_DEFAULT;
62module_param(lb_pending_cmds, int, S_IRUGO);
63MODULE_PARM_DESC(lb_pending_cmds, "Change raid-1 load balancing outstanding "
64 "threshold. Valid Values are 1-128. Default: 4");
65
66
9c915a8c 67#define ABS_DIFF(a, b) (((a) > (b)) ? ((a) - (b)) : ((b) - (a)))
68#define MR_LD_STATE_OPTIMAL 3
69#define FALSE 0
70#define TRUE 1
71
bc93d425
SS		 72#define SPAN_DEBUG 0
73#define SPAN_ROW_SIZE(map, ld, index_) (MR_LdSpanPtrGet(ld, index_, map)->spanRowSize)
74#define SPAN_ROW_DATA_SIZE(map_, ld, index_) (MR_LdSpanPtrGet(ld, index_, map)->spanRowDataSize)
75#define SPAN_INVALID 0xff
76
9c915a8c 77/* Prototypes */
51087a86 78static void mr_update_span_set(struct MR_DRV_RAID_MAP_ALL *map,
bc93d425
SS		 79 PLD_SPAN_INFO ldSpanInfo);
80static u8 mr_spanset_get_phy_params(struct megasas_instance *instance, u32 ld,
81 u64 stripRow, u16 stripRef, struct IO_REQUEST_INFO *io_info,
51087a86 82 struct RAID_CONTEXT *pRAID_Context, struct MR_DRV_RAID_MAP_ALL *map);
bc93d425 83static u64 get_row_from_strip(struct megasas_instance *instance, u32 ld,
51087a86 84 u64 strip, struct MR_DRV_RAID_MAP_ALL *map);
9c915a8c 85
86u32 mega_mod64(u64 dividend, u32 divisor)
87{
88 u64 d;
89 u32 remainder;
90
91 if (!divisor)
92 printk(KERN_ERR "megasas : DIVISOR is zero, in div fn\n");
93 d = dividend;
94 remainder = do_div(d, divisor);
95 return remainder;
96}
97
98/**
99 * @param dividend : Dividend
100 * @param divisor : Divisor
101 *
102 * @return quotient
103 **/
104u64 mega_div64_32(uint64_t dividend, uint32_t divisor)
105{
106 u32 remainder;
107 u64 d;
108
109 if (!divisor)
110 printk(KERN_ERR "megasas : DIVISOR is zero in mod fn\n");
111
112 d = dividend;
113 remainder = do_div(d, divisor);
114
115 return d;
116}
117
51087a86 118struct MR_LD_RAID *MR_LdRaidGet(u32 ld, struct MR_DRV_RAID_MAP_ALL *map)
9c915a8c 119{
120 return &map->raidMap.ldSpanMap[ld].ldRaid;
121}
122
123static struct MR_SPAN_BLOCK_INFO *MR_LdSpanInfoGet(u32 ld,
51087a86 124 struct MR_DRV_RAID_MAP_ALL
9c915a8c 125 *map)
126{
127 return &map->raidMap.ldSpanMap[ld].spanBlock[0];
128}
129
51087a86 130static u8 MR_LdDataArmGet(u32 ld, u32 armIdx, struct MR_DRV_RAID_MAP_ALL *map)
9c915a8c 131{
132 return map->raidMap.ldSpanMap[ld].dataArmMap[armIdx];
133}
134
51087a86 135u16 MR_ArPdGet(u32 ar, u32 arm, struct MR_DRV_RAID_MAP_ALL *map)
9c915a8c 136{
94cd65dd 137 return le16_to_cpu(map->raidMap.arMapInfo[ar].pd[arm]);
9c915a8c 138}
139
51087a86 140u16 MR_LdSpanArrayGet(u32 ld, u32 span, struct MR_DRV_RAID_MAP_ALL *map)
9c915a8c 141{
94cd65dd 142 return le16_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].span.arrayRef);
9c915a8c 143}
144
51087a86 145u16 MR_PdDevHandleGet(u32 pd, struct MR_DRV_RAID_MAP_ALL *map)
9c915a8c 146{
147 return map->raidMap.devHndlInfo[pd].curDevHdl;
148}
149
51087a86 150u16 MR_GetLDTgtId(u32 ld, struct MR_DRV_RAID_MAP_ALL *map)
9c915a8c 151{
be26374b 152 return le16_to_cpu(map->raidMap.ldSpanMap[ld].ldRaid.targetId);
9c915a8c 153}
154
51087a86 155u8 MR_TargetIdToLdGet(u32 ldTgtId, struct MR_DRV_RAID_MAP_ALL *map)
9c915a8c 156{
be26374b 157 return map->raidMap.ldTgtIdToLd[ldTgtId];
9c915a8c 158}
159
160static struct MR_LD_SPAN *MR_LdSpanPtrGet(u32 ld, u32 span,
51087a86 161 struct MR_DRV_RAID_MAP_ALL *map)
9c915a8c 162{
163 return &map->raidMap.ldSpanMap[ld].spanBlock[span].span;
164}
165
51087a86
SS		 166/*
167 * This function will Populate Driver Map using firmware raid map
168 */
169void MR_PopulateDrvRaidMap(struct megasas_instance *instance)
170{
171 struct fusion_context *fusion = instance->ctrl_context;
172 struct MR_FW_RAID_MAP_ALL *fw_map_old = NULL;
173 struct MR_FW_RAID_MAP *pFwRaidMap = NULL;
174 int i;
175
176
177 struct MR_DRV_RAID_MAP_ALL *drv_map =
178 fusion->ld_drv_map[(instance->map_id & 1)];
179 struct MR_DRV_RAID_MAP *pDrvRaidMap = &drv_map->raidMap;
180
181 if (instance->supportmax256vd) {
182 memcpy(fusion->ld_drv_map[instance->map_id & 1],
183 fusion->ld_map[instance->map_id & 1],
184 fusion->current_map_sz);
185 /* New Raid map will not set totalSize, so keep expected value
186 * for legacy code in ValidateMapInfo
187 */
188 pDrvRaidMap->totalSize = sizeof(struct MR_FW_RAID_MAP_EXT);
189 } else {
190 fw_map_old = (struct MR_FW_RAID_MAP_ALL *)
191 fusion->ld_map[(instance->map_id & 1)];
192 pFwRaidMap = &fw_map_old->raidMap;
193
194#if VD_EXT_DEBUG
195 for (i = 0; i < pFwRaidMap->ldCount; i++) {
196 dev_dbg(&instance->pdev->dev, "(%d) :Index 0x%x "
197 "Target Id 0x%x Seq Num 0x%x Size 0/%llx\n",
198 instance->unique_id, i,
199 fw_map_old->raidMap.ldSpanMap[i].ldRaid.targetId,
200 fw_map_old->raidMap.ldSpanMap[i].ldRaid.seqNum,
201 fw_map_old->raidMap.ldSpanMap[i].ldRaid.size);
202 }
203#endif
204
205 memset(drv_map, 0, fusion->drv_map_sz);
206 pDrvRaidMap->totalSize = pFwRaidMap->totalSize;
207 pDrvRaidMap->ldCount = pFwRaidMap->ldCount;
208 pDrvRaidMap->fpPdIoTimeoutSec = pFwRaidMap->fpPdIoTimeoutSec;
209 for (i = 0; i < MAX_RAIDMAP_LOGICAL_DRIVES + MAX_RAIDMAP_VIEWS; i++)
210 pDrvRaidMap->ldTgtIdToLd[i] =
211 (u8)pFwRaidMap->ldTgtIdToLd[i];
212 for (i = 0; i < pDrvRaidMap->ldCount; i++) {
213 pDrvRaidMap->ldSpanMap[i] = pFwRaidMap->ldSpanMap[i];
214#if VD_EXT_DEBUG
215 dev_dbg(&instance->pdev->dev,
216 "pFwRaidMap->ldSpanMap[%d].ldRaid.targetId 0x%x "
217 "pFwRaidMap->ldSpanMap[%d].ldRaid.seqNum 0x%x "
218 "size 0x%x\n", i, i,
219 pFwRaidMap->ldSpanMap[i].ldRaid.targetId,
220 pFwRaidMap->ldSpanMap[i].ldRaid.seqNum,
221 (u32)pFwRaidMap->ldSpanMap[i].ldRaid.rowSize);
222 dev_dbg(&instance->pdev->dev,
223 "pDrvRaidMap->ldSpanMap[%d].ldRaid.targetId 0x%x "
224 "pDrvRaidMap->ldSpanMap[%d].ldRaid.seqNum 0x%x "
225 "size 0x%x\n", i, i,
226 pDrvRaidMap->ldSpanMap[i].ldRaid.targetId,
227 pDrvRaidMap->ldSpanMap[i].ldRaid.seqNum,
228 (u32)pDrvRaidMap->ldSpanMap[i].ldRaid.rowSize);
229 dev_dbg(&instance->pdev->dev, "Driver raid map all %p "
230 "raid map %p LD RAID MAP %p/%p\n", drv_map,
231 pDrvRaidMap, &pFwRaidMap->ldSpanMap[i].ldRaid,
232 &pDrvRaidMap->ldSpanMap[i].ldRaid);
233#endif
234 }
235 memcpy(pDrvRaidMap->arMapInfo, pFwRaidMap->arMapInfo,
236 sizeof(struct MR_ARRAY_INFO) * MAX_RAIDMAP_ARRAYS);
237 memcpy(pDrvRaidMap->devHndlInfo, pFwRaidMap->devHndlInfo,
238 sizeof(struct MR_DEV_HANDLE_INFO) *
239 MAX_RAIDMAP_PHYSICAL_DEVICES);
240 }
241}
242
9c915a8c 243/*
244 * This function will validate Map info data provided by FW
245 */
bc93d425 246u8 MR_ValidateMapInfo(struct megasas_instance *instance)
9c915a8c 247{
51087a86
SS		 248 struct fusion_context *fusion;
249 struct MR_DRV_RAID_MAP_ALL *drv_map;
250 struct MR_DRV_RAID_MAP *pDrvRaidMap;
251 struct LD_LOAD_BALANCE_INFO *lbInfo;
252 PLD_SPAN_INFO ldSpanInfo;
94cd65dd
SS		 253 struct MR_LD_RAID *raid;
254 int ldCount, num_lds;
255 u16 ld;
51087a86 256 u32 expected_size;
94cd65dd 257
9c915a8c 258
51087a86
SS		 259 MR_PopulateDrvRaidMap(instance);
260
261 fusion = instance->ctrl_context;
262 drv_map = fusion->ld_drv_map[(instance->map_id & 1)];
263 pDrvRaidMap = &drv_map->raidMap;
264
265 lbInfo = fusion->load_balance_info;
266 ldSpanInfo = fusion->log_to_span;
267
268 if (instance->supportmax256vd)
269 expected_size = sizeof(struct MR_FW_RAID_MAP_EXT);
270 else
271 expected_size =
272 (sizeof(struct MR_FW_RAID_MAP) - sizeof(struct MR_LD_SPAN_MAP) +
273 (sizeof(struct MR_LD_SPAN_MAP) * le32_to_cpu(pDrvRaidMap->ldCount)));
274
275 if (le32_to_cpu(pDrvRaidMap->totalSize) != expected_size) {
276 dev_err(&instance->pdev->dev, "map info structure size 0x%x is not matching with ld count\n",
277 (unsigned int) expected_size);
278 dev_err(&instance->pdev->dev, "megasas: span map %x, pDrvRaidMap->totalSize : %x\n",
279 (unsigned int)sizeof(struct MR_LD_SPAN_MAP),
280 le32_to_cpu(pDrvRaidMap->totalSize));
9c915a8c 281 return 0;
282 }
283
bc93d425 284 if (instance->UnevenSpanSupport)
51087a86 285 mr_update_span_set(drv_map, ldSpanInfo);
bc93d425 286
51087a86 287 mr_update_load_balance_params(drv_map, lbInfo);
9c915a8c 288
51087a86 289 num_lds = le32_to_cpu(drv_map->raidMap.ldCount);
94cd65dd
SS		 290
291 /*Convert Raid capability values to CPU arch */
292 for (ldCount = 0; ldCount < num_lds; ldCount++) {
51087a86
SS		 293 ld = MR_TargetIdToLdGet(ldCount, drv_map);
294 raid = MR_LdRaidGet(ld, drv_map);
94cd65dd
SS		 295 le32_to_cpus((u32 *)&raid->capability);
296 }
297
9c915a8c 298 return 1;
299}
300
301u32 MR_GetSpanBlock(u32 ld, u64 row, u64 *span_blk,
51087a86 302 struct MR_DRV_RAID_MAP_ALL *map)
9c915a8c 303{
304 struct MR_SPAN_BLOCK_INFO *pSpanBlock = MR_LdSpanInfoGet(ld, map);
305 struct MR_QUAD_ELEMENT *quad;
306 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
307 u32 span, j;
308
309 for (span = 0; span < raid->spanDepth; span++, pSpanBlock++) {
310
94cd65dd 311 for (j = 0; j < le32_to_cpu(pSpanBlock->block_span_info.noElements); j++) {
9c915a8c 312 quad = &pSpanBlock->block_span_info.quad[j];
313
94cd65dd 314 if (le32_to_cpu(quad->diff) == 0)
bc93d425 315 return SPAN_INVALID;
94cd65dd
SS		 316 if (le64_to_cpu(quad->logStart) <= row && row <=
317 le64_to_cpu(quad->logEnd) && (mega_mod64(row - le64_to_cpu(quad->logStart),
318 le32_to_cpu(quad->diff))) == 0) {
9c915a8c 319 if (span_blk != NULL) {
320 u64 blk, debugBlk;
94cd65dd 321 blk = mega_div64_32((row-le64_to_cpu(quad->logStart)), le32_to_cpu(quad->diff));
9c915a8c 322 debugBlk = blk;
323
94cd65dd 324 blk = (blk + le64_to_cpu(quad->offsetInSpan)) << raid->stripeShift;
9c915a8c 325 *span_blk = blk;
326 }
327 return span;
328 }
329 }
330 }
bc93d425
SS		 331 return SPAN_INVALID;
332}
333
334/*
335******************************************************************************
336*
337* Function to print info about span set created in driver from FW raid map
338*
339* Inputs :
340* map - LD map
341* ldSpanInfo - ldSpanInfo per HBA instance
342*/
343#if SPAN_DEBUG
51087a86
SS		 344static int getSpanInfo(struct MR_DRV_RAID_MAP_ALL *map,
345 PLD_SPAN_INFO ldSpanInfo)
bc93d425
SS		 346{
347
348 u8 span;
349 u32 element;
350 struct MR_LD_RAID *raid;
351 LD_SPAN_SET *span_set;
352 struct MR_QUAD_ELEMENT *quad;
353 int ldCount;
354 u16 ld;
355
51087a86 356 for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES_EXT; ldCount++) {
bc93d425 357 ld = MR_TargetIdToLdGet(ldCount, map);
51087a86 358 if (ld >= MAX_LOGICAL_DRIVES_EXT)
bc93d425
SS		 359 continue;
360 raid = MR_LdRaidGet(ld, map);
361 dev_dbg(&instance->pdev->dev, "LD %x: span_depth=%x\n",
362 ld, raid->spanDepth);
363 for (span = 0; span < raid->spanDepth; span++)
364 dev_dbg(&instance->pdev->dev, "Span=%x,"
365 " number of quads=%x\n", span,
94cd65dd
SS		 366 le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
367 block_span_info.noElements));
bc93d425
SS		 368 for (element = 0; element < MAX_QUAD_DEPTH; element++) {
369 span_set = &(ldSpanInfo[ld].span_set[element]);
370 if (span_set->span_row_data_width == 0)
371 break;
372
373 dev_dbg(&instance->pdev->dev, "Span Set %x:"
374 "width=%x, diff=%x\n", element,
375 (unsigned int)span_set->span_row_data_width,
376 (unsigned int)span_set->diff);
377 dev_dbg(&instance->pdev->dev, "logical LBA"
378 "start=0x%08lx, end=0x%08lx\n",
379 (long unsigned int)span_set->log_start_lba,
380 (long unsigned int)span_set->log_end_lba);
381 dev_dbg(&instance->pdev->dev, "span row start=0x%08lx,"
382 " end=0x%08lx\n",
383 (long unsigned int)span_set->span_row_start,
384 (long unsigned int)span_set->span_row_end);
385 dev_dbg(&instance->pdev->dev, "data row start=0x%08lx,"
386 " end=0x%08lx\n",
387 (long unsigned int)span_set->data_row_start,
388 (long unsigned int)span_set->data_row_end);
389 dev_dbg(&instance->pdev->dev, "data strip start=0x%08lx,"
390 " end=0x%08lx\n",
391 (long unsigned int)span_set->data_strip_start,
392 (long unsigned int)span_set->data_strip_end);
393
394 for (span = 0; span < raid->spanDepth; span++) {
94cd65dd
SS		 395 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
396 block_span_info.noElements) >=
bc93d425
SS		 397 element + 1) {
398 quad = &map->raidMap.ldSpanMap[ld].
399 spanBlock[span].block_span_info.
400 quad[element];
401 dev_dbg(&instance->pdev->dev, "Span=%x,"
402 "Quad=%x, diff=%x\n", span,
94cd65dd 403 element, le32_to_cpu(quad->diff));
bc93d425
SS		 404 dev_dbg(&instance->pdev->dev,
405 "offset_in_span=0x%08lx\n",
94cd65dd 406 (long unsigned int)le64_to_cpu(quad->offsetInSpan));
bc93d425
SS		 407 dev_dbg(&instance->pdev->dev,
408 "logical start=0x%08lx, end=0x%08lx\n",
94cd65dd
SS		 409 (long unsigned int)le64_to_cpu(quad->logStart),
410 (long unsigned int)le64_to_cpu(quad->logEnd));
bc93d425
SS		 411 }
412 }
413 }
414 }
415 return 0;
416}
417#endif
418
419/*
420******************************************************************************
421*
422* This routine calculates the Span block for given row using spanset.
423*
424* Inputs :
425* instance - HBA instance
426* ld - Logical drive number
427* row - Row number
428* map - LD map
429*
430* Outputs :
431*
432* span - Span number
433* block - Absolute Block number in the physical disk
434* div_error - Devide error code.
435*/
436
437u32 mr_spanset_get_span_block(struct megasas_instance *instance,
51087a86 438 u32 ld, u64 row, u64 *span_blk, struct MR_DRV_RAID_MAP_ALL *map)
bc93d425
SS		 439{
440 struct fusion_context *fusion = instance->ctrl_context;
441 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
442 LD_SPAN_SET *span_set;
443 struct MR_QUAD_ELEMENT *quad;
444 u32 span, info;
445 PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
446
447 for (info = 0; info < MAX_QUAD_DEPTH; info++) {
448 span_set = &(ldSpanInfo[ld].span_set[info]);
449
450 if (span_set->span_row_data_width == 0)
451 break;
452
453 if (row > span_set->data_row_end)
454 continue;
455
456 for (span = 0; span < raid->spanDepth; span++)
94cd65dd
SS		 457 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
458 block_span_info.noElements) >= info+1) {
bc93d425
SS		 459 quad = &map->raidMap.ldSpanMap[ld].
460 spanBlock[span].
461 block_span_info.quad[info];
94cd65dd 462 if (le32_to_cpu(quad->diff == 0))
bc93d425 463 return SPAN_INVALID;
94cd65dd
SS		 464 if (le64_to_cpu(quad->logStart) <= row &&
465 row <= le64_to_cpu(quad->logEnd) &&
466 (mega_mod64(row - le64_to_cpu(quad->logStart),
467 le32_to_cpu(quad->diff))) == 0) {
bc93d425
SS		 468 if (span_blk != NULL) {
469 u64 blk;
470 blk = mega_div64_32
94cd65dd
SS		 471 ((row - le64_to_cpu(quad->logStart)),
472 le32_to_cpu(quad->diff));
473 blk = (blk + le64_to_cpu(quad->offsetInSpan))
bc93d425
SS		 474 << raid->stripeShift;
475 *span_blk = blk;
476 }
477 return span;
478 }
479 }
480 }
481 return SPAN_INVALID;
482}
483
484/*
485******************************************************************************
486*
487* This routine calculates the row for given strip using spanset.
488*
489* Inputs :
490* instance - HBA instance
491* ld - Logical drive number
492* Strip - Strip
493* map - LD map
494*
495* Outputs :
496*
497* row - row associated with strip
498*/
499
500static u64 get_row_from_strip(struct megasas_instance *instance,
51087a86 501 u32 ld, u64 strip, struct MR_DRV_RAID_MAP_ALL *map)
bc93d425
SS		 502{
503 struct fusion_context *fusion = instance->ctrl_context;
504 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
505 LD_SPAN_SET *span_set;
506 PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
507 u32 info, strip_offset, span, span_offset;
508 u64 span_set_Strip, span_set_Row, retval;
509
510 for (info = 0; info < MAX_QUAD_DEPTH; info++) {
511 span_set = &(ldSpanInfo[ld].span_set[info]);
512
513 if (span_set->span_row_data_width == 0)
514 break;
515 if (strip > span_set->data_strip_end)
516 continue;
517
518 span_set_Strip = strip - span_set->data_strip_start;
519 strip_offset = mega_mod64(span_set_Strip,
520 span_set->span_row_data_width);
521 span_set_Row = mega_div64_32(span_set_Strip,
522 span_set->span_row_data_width) * span_set->diff;
523 for (span = 0, span_offset = 0; span < raid->spanDepth; span++)
94cd65dd
SS		 524 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
525 block_span_info.noElements >= info+1)) {
bc93d425
SS		 526 if (strip_offset >=
527 span_set->strip_offset[span])
528 span_offset++;
529 else
530 break;
531 }
532#if SPAN_DEBUG
533 dev_info(&instance->pdev->dev, "Strip 0x%llx,"
534 "span_set_Strip 0x%llx, span_set_Row 0x%llx"
535 "data width 0x%llx span offset 0x%x\n", strip,
536 (unsigned long long)span_set_Strip,
537 (unsigned long long)span_set_Row,
538 (unsigned long long)span_set->span_row_data_width,
539 span_offset);
540 dev_info(&instance->pdev->dev, "For strip 0x%llx"
541 "row is 0x%llx\n", strip,
542 (unsigned long long) span_set->data_row_start +
543 (unsigned long long) span_set_Row + (span_offset - 1));
544#endif
545 retval = (span_set->data_row_start + span_set_Row +
546 (span_offset - 1));
547 return retval;
548 }
549 return -1LLU;
550}
551
552
553/*
554******************************************************************************
555*
556* This routine calculates the Start Strip for given row using spanset.
557*
558* Inputs :
559* instance - HBA instance
560* ld - Logical drive number
561* row - Row number
562* map - LD map
563*
564* Outputs :
565*
566* Strip - Start strip associated with row
567*/
568
569static u64 get_strip_from_row(struct megasas_instance *instance,
51087a86 570 u32 ld, u64 row, struct MR_DRV_RAID_MAP_ALL *map)
bc93d425
SS		 571{
572 struct fusion_context *fusion = instance->ctrl_context;
573 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
574 LD_SPAN_SET *span_set;
575 struct MR_QUAD_ELEMENT *quad;
576 PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
577 u32 span, info;
578 u64 strip;
579
580 for (info = 0; info < MAX_QUAD_DEPTH; info++) {
581 span_set = &(ldSpanInfo[ld].span_set[info]);
582
583 if (span_set->span_row_data_width == 0)
584 break;
585 if (row > span_set->data_row_end)
586 continue;
587
588 for (span = 0; span < raid->spanDepth; span++)
94cd65dd
SS		 589 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
590 block_span_info.noElements) >= info+1) {
bc93d425
SS		 591 quad = &map->raidMap.ldSpanMap[ld].
592 spanBlock[span].block_span_info.quad[info];
94cd65dd
SS		 593 if (le64_to_cpu(quad->logStart) <= row &&
594 row <= le64_to_cpu(quad->logEnd) &&
595 mega_mod64((row - le64_to_cpu(quad->logStart)),
596 le32_to_cpu(quad->diff)) == 0) {
bc93d425
SS		 597 strip = mega_div64_32
598 (((row - span_set->data_row_start)
94cd65dd
SS		 599 - le64_to_cpu(quad->logStart)),
600 le32_to_cpu(quad->diff));
bc93d425
SS		 601 strip *= span_set->span_row_data_width;
602 strip += span_set->data_strip_start;
603 strip += span_set->strip_offset[span];
604 return strip;
605 }
606 }
607 }
608 dev_err(&instance->pdev->dev, "get_strip_from_row"
609 "returns invalid strip for ld=%x, row=%lx\n",
610 ld, (long unsigned int)row);
611 return -1;
612}
613
614/*
615******************************************************************************
616*
617* This routine calculates the Physical Arm for given strip using spanset.
618*
619* Inputs :
620* instance - HBA instance
621* ld - Logical drive number
622* strip - Strip
623* map - LD map
624*
625* Outputs :
626*
627* Phys Arm - Phys Arm associated with strip
628*/
629
630static u32 get_arm_from_strip(struct megasas_instance *instance,
51087a86 631 u32 ld, u64 strip, struct MR_DRV_RAID_MAP_ALL *map)
bc93d425
SS		 632{
633 struct fusion_context *fusion = instance->ctrl_context;
634 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
635 LD_SPAN_SET *span_set;
636 PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
637 u32 info, strip_offset, span, span_offset, retval;
638
639 for (info = 0 ; info < MAX_QUAD_DEPTH; info++) {
640 span_set = &(ldSpanInfo[ld].span_set[info]);
641
642 if (span_set->span_row_data_width == 0)
643 break;
644 if (strip > span_set->data_strip_end)
645 continue;
646
647 strip_offset = (uint)mega_mod64
648 ((strip - span_set->data_strip_start),
649 span_set->span_row_data_width);
650
651 for (span = 0, span_offset = 0; span < raid->spanDepth; span++)
94cd65dd
SS		 652 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
653 block_span_info.noElements) >= info+1) {
bc93d425
SS		 654 if (strip_offset >=
655 span_set->strip_offset[span])
656 span_offset =
657 span_set->strip_offset[span];
658 else
659 break;
660 }
661#if SPAN_DEBUG
662 dev_info(&instance->pdev->dev, "get_arm_from_strip:"
663 "for ld=0x%x strip=0x%lx arm is 0x%x\n", ld,
664 (long unsigned int)strip, (strip_offset - span_offset));
665#endif
666 retval = (strip_offset - span_offset);
667 return retval;
668 }
669
670 dev_err(&instance->pdev->dev, "get_arm_from_strip"
671 "returns invalid arm for ld=%x strip=%lx\n",
672 ld, (long unsigned int)strip);
673
674 return -1;
675}
676
677/* This Function will return Phys arm */
678u8 get_arm(struct megasas_instance *instance, u32 ld, u8 span, u64 stripe,
51087a86 679 struct MR_DRV_RAID_MAP_ALL *map)
bc93d425
SS		 680{
681 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
682 /* Need to check correct default value */
683 u32 arm = 0;
684
685 switch (raid->level) {
686 case 0:
687 case 5:
688 case 6:
689 arm = mega_mod64(stripe, SPAN_ROW_SIZE(map, ld, span));
690 break;
691 case 1:
692 /* start with logical arm */
693 arm = get_arm_from_strip(instance, ld, stripe, map);
fec3c1b4 694 if (arm != -1U)
bc93d425
SS		 695 arm *= 2;
696 break;
697 }
698
699 return arm;
700}
701
702
703/*
704******************************************************************************
705*
706* This routine calculates the arm, span and block for the specified stripe and
707* reference in stripe using spanset
708*
709* Inputs :
710*
711* ld - Logical drive number
712* stripRow - Stripe number
713* stripRef - Reference in stripe
714*
715* Outputs :
716*
717* span - Span number
718* block - Absolute Block number in the physical disk
719*/
720static u8 mr_spanset_get_phy_params(struct megasas_instance *instance, u32 ld,
721 u64 stripRow, u16 stripRef, struct IO_REQUEST_INFO *io_info,
722 struct RAID_CONTEXT *pRAID_Context,
51087a86 723 struct MR_DRV_RAID_MAP_ALL *map)
bc93d425
SS		 724{
725 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
726 u32 pd, arRef;
727 u8 physArm, span;
728 u64 row;
729 u8 retval = TRUE;
730 u8 do_invader = 0;
731 u64 *pdBlock = &io_info->pdBlock;
732 u16 *pDevHandle = &io_info->devHandle;
733 u32 logArm, rowMod, armQ, arm;
734
735 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER ||
736 instance->pdev->device == PCI_DEVICE_ID_LSI_FURY))
737 do_invader = 1;
738
739 /*Get row and span from io_info for Uneven Span IO.*/
740 row = io_info->start_row;
741 span = io_info->start_span;
742
743
744 if (raid->level == 6) {
745 logArm = get_arm_from_strip(instance, ld, stripRow, map);
fec3c1b4 746 if (logArm == -1U)
bc93d425
SS		 747 return FALSE;
748 rowMod = mega_mod64(row, SPAN_ROW_SIZE(map, ld, span));
749 armQ = SPAN_ROW_SIZE(map, ld, span) - 1 - rowMod;
750 arm = armQ + 1 + logArm;
751 if (arm >= SPAN_ROW_SIZE(map, ld, span))
752 arm -= SPAN_ROW_SIZE(map, ld, span);
753 physArm = (u8)arm;
754 } else
755 /* Calculate the arm */
756 physArm = get_arm(instance, ld, span, stripRow, map);
757 if (physArm == 0xFF)
758 return FALSE;
759
760 arRef = MR_LdSpanArrayGet(ld, span, map);
761 pd = MR_ArPdGet(arRef, physArm, map);
762
763 if (pd != MR_PD_INVALID)
764 *pDevHandle = MR_PdDevHandleGet(pd, map);
765 else {
766 *pDevHandle = MR_PD_INVALID;
767 if ((raid->level >= 5) &&
768 (!do_invader || (do_invader &&
769 (raid->regTypeReqOnRead != REGION_TYPE_UNUSED))))
770 pRAID_Context->regLockFlags = REGION_TYPE_EXCLUSIVE;
771 else if (raid->level == 1) {
772 pd = MR_ArPdGet(arRef, physArm + 1, map);
773 if (pd != MR_PD_INVALID)
774 *pDevHandle = MR_PdDevHandleGet(pd, map);
775 }
776 }
777
94cd65dd 778 *pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk);
bc93d425
SS		 779 pRAID_Context->spanArm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) |
780 physArm;
d2552ebe 781 io_info->span_arm = pRAID_Context->spanArm;
bc93d425 782 return retval;
9c915a8c 783}
784
785/*
786******************************************************************************
787*
788* This routine calculates the arm, span and block for the specified stripe and
789* reference in stripe.
790*
791* Inputs :
792*
793* ld - Logical drive number
794* stripRow - Stripe number
795* stripRef - Reference in stripe
796*
797* Outputs :
798*
799* span - Span number
800* block - Absolute Block number in the physical disk
801*/
36807e67 802u8 MR_GetPhyParams(struct megasas_instance *instance, u32 ld, u64 stripRow,
bc93d425
SS		 803 u16 stripRef, struct IO_REQUEST_INFO *io_info,
804 struct RAID_CONTEXT *pRAID_Context,
51087a86 805 struct MR_DRV_RAID_MAP_ALL *map)
9c915a8c 806{
807 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
808 u32 pd, arRef;
809 u8 physArm, span;
810 u64 row;
811 u8 retval = TRUE;
21d3c710 812 u8 do_invader = 0;
bc93d425
SS		 813 u64 *pdBlock = &io_info->pdBlock;
814 u16 *pDevHandle = &io_info->devHandle;
21d3c710
SS		 815
816 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER ||
817 instance->pdev->device == PCI_DEVICE_ID_LSI_FURY))
818 do_invader = 1;
9c915a8c 819
820 row = mega_div64_32(stripRow, raid->rowDataSize);
821
822 if (raid->level == 6) {
823 /* logical arm within row */
824 u32 logArm = mega_mod64(stripRow, raid->rowDataSize);
825 u32 rowMod, armQ, arm;
826
827 if (raid->rowSize == 0)
828 return FALSE;
829 /* get logical row mod */
830 rowMod = mega_mod64(row, raid->rowSize);
831 armQ = raid->rowSize-1-rowMod; /* index of Q drive */
832 arm = armQ+1+logArm; /* data always logically follows Q */
833 if (arm >= raid->rowSize) /* handle wrap condition */
834 arm -= raid->rowSize;
835 physArm = (u8)arm;
836 } else {
837 if (raid->modFactor == 0)
838 return FALSE;
839 physArm = MR_LdDataArmGet(ld, mega_mod64(stripRow,
840 raid->modFactor),
841 map);
842 }
843
844 if (raid->spanDepth == 1) {
845 span = 0;
846 *pdBlock = row << raid->stripeShift;
847 } else {
bc93d425
SS		 848 span = (u8)MR_GetSpanBlock(ld, row, pdBlock, map);
849 if (span == SPAN_INVALID)
9c915a8c 850 return FALSE;
851 }
852
853 /* Get the array on which this span is present */
854 arRef = MR_LdSpanArrayGet(ld, span, map);
855 pd = MR_ArPdGet(arRef, physArm, map); /* Get the pd */
856
857 if (pd != MR_PD_INVALID)
858 /* Get dev handle from Pd. */
859 *pDevHandle = MR_PdDevHandleGet(pd, map);
860 else {
861 *pDevHandle = MR_PD_INVALID; /* set dev handle as invalid. */
36807e67 862 if ((raid->level >= 5) &&
21d3c710
SS		 863 (!do_invader || (do_invader &&
864 (raid->regTypeReqOnRead != REGION_TYPE_UNUSED))))
9c915a8c 865 pRAID_Context->regLockFlags = REGION_TYPE_EXCLUSIVE;
866 else if (raid->level == 1) {
867 /* Get alternate Pd. */
868 pd = MR_ArPdGet(arRef, physArm + 1, map);
869 if (pd != MR_PD_INVALID)
870 /* Get dev handle from Pd */
871 *pDevHandle = MR_PdDevHandleGet(pd, map);
872 }
9c915a8c 873 }
874
94cd65dd 875 *pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk);
9c915a8c 876 pRAID_Context->spanArm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) |
877 physArm;
d2552ebe 878 io_info->span_arm = pRAID_Context->spanArm;
9c915a8c 879 return retval;
880}
881
882/*
883******************************************************************************
884*
885* MR_BuildRaidContext function
886*
887* This function will initiate command processing. The start/end row and strip
888* information is calculated then the lock is acquired.
889* This function will return 0 if region lock was acquired OR return num strips
890*/
891u8
36807e67 892MR_BuildRaidContext(struct megasas_instance *instance,
893 struct IO_REQUEST_INFO *io_info,
9c915a8c 894 struct RAID_CONTEXT *pRAID_Context,
51087a86 895 struct MR_DRV_RAID_MAP_ALL *map, u8 **raidLUN)
9c915a8c 896{
897 struct MR_LD_RAID *raid;
898 u32 ld, stripSize, stripe_mask;
899 u64 endLba, endStrip, endRow, start_row, start_strip;
900 u64 regStart;
901 u32 regSize;
902 u8 num_strips, numRows;
903 u16 ref_in_start_stripe, ref_in_end_stripe;
904 u64 ldStartBlock;
905 u32 numBlocks, ldTgtId;
906 u8 isRead;
907 u8 retval = 0;
bc93d425
SS		 908 u8 startlba_span = SPAN_INVALID;
909 u64 *pdBlock = &io_info->pdBlock;
9c915a8c 910
911 ldStartBlock = io_info->ldStartBlock;
912 numBlocks = io_info->numBlocks;
913 ldTgtId = io_info->ldTgtId;
914 isRead = io_info->isRead;
bc93d425
SS		 915 io_info->IoforUnevenSpan = 0;
916 io_info->start_span = SPAN_INVALID;
9c915a8c 917
918 ld = MR_TargetIdToLdGet(ldTgtId, map);
919 raid = MR_LdRaidGet(ld, map);
920
bc93d425
SS		 921 /*
922 * if rowDataSize @RAID map and spanRowDataSize @SPAN INFO are zero
923 * return FALSE
924 */
925 if (raid->rowDataSize == 0) {
926 if (MR_LdSpanPtrGet(ld, 0, map)->spanRowDataSize == 0)
927 return FALSE;
928 else if (instance->UnevenSpanSupport) {
929 io_info->IoforUnevenSpan = 1;
930 } else {
931 dev_info(&instance->pdev->dev,
932 "raid->rowDataSize is 0, but has SPAN[0]"
933 "rowDataSize = 0x%0x,"
934 "but there is _NO_ UnevenSpanSupport\n",
935 MR_LdSpanPtrGet(ld, 0, map)->spanRowDataSize);
936 return FALSE;
937 }
938 }
939
9c915a8c 940 stripSize = 1 << raid->stripeShift;
941 stripe_mask = stripSize-1;
bc93d425
SS		 942
943
9c915a8c 944 /*
945 * calculate starting row and stripe, and number of strips and rows
946 */
947 start_strip = ldStartBlock >> raid->stripeShift;
948 ref_in_start_stripe = (u16)(ldStartBlock & stripe_mask);
949 endLba = ldStartBlock + numBlocks - 1;
950 ref_in_end_stripe = (u16)(endLba & stripe_mask);
951 endStrip = endLba >> raid->stripeShift;
952 num_strips = (u8)(endStrip - start_strip + 1); /* End strip */
bc93d425
SS		 953
954 if (io_info->IoforUnevenSpan) {
955 start_row = get_row_from_strip(instance, ld, start_strip, map);
956 endRow = get_row_from_strip(instance, ld, endStrip, map);
957 if (start_row == -1ULL || endRow == -1ULL) {
958 dev_info(&instance->pdev->dev, "return from %s %d."
959 "Send IO w/o region lock.\n",
960 __func__, __LINE__);
961 return FALSE;
962 }
963
964 if (raid->spanDepth == 1) {
965 startlba_span = 0;
966 *pdBlock = start_row << raid->stripeShift;
967 } else
968 startlba_span = (u8)mr_spanset_get_span_block(instance,
969 ld, start_row, pdBlock, map);
970 if (startlba_span == SPAN_INVALID) {
971 dev_info(&instance->pdev->dev, "return from %s %d"
972 "for row 0x%llx,start strip %llx"
973 "endSrip %llx\n", __func__, __LINE__,
974 (unsigned long long)start_row,
975 (unsigned long long)start_strip,
976 (unsigned long long)endStrip);
977 return FALSE;
978 }
979 io_info->start_span = startlba_span;
980 io_info->start_row = start_row;
981#if SPAN_DEBUG
982 dev_dbg(&instance->pdev->dev, "Check Span number from %s %d"
983 "for row 0x%llx, start strip 0x%llx end strip 0x%llx"
984 " span 0x%x\n", __func__, __LINE__,
985 (unsigned long long)start_row,
986 (unsigned long long)start_strip,
987 (unsigned long long)endStrip, startlba_span);
988 dev_dbg(&instance->pdev->dev, "start_row 0x%llx endRow 0x%llx"
989 "Start span 0x%x\n", (unsigned long long)start_row,
990 (unsigned long long)endRow, startlba_span);
991#endif
992 } else {
993 start_row = mega_div64_32(start_strip, raid->rowDataSize);
994 endRow = mega_div64_32(endStrip, raid->rowDataSize);
995 }
996 numRows = (u8)(endRow - start_row + 1);
9c915a8c 997
998 /*
999 * calculate region info.
1000 */
1001
1002 /* assume region is at the start of the first row */
1003 regStart = start_row << raid->stripeShift;
1004 /* assume this IO needs the full row - we'll adjust if not true */
1005 regSize = stripSize;
1006
c1529fa2 1007 /* Check if we can send this I/O via FastPath */
1008 if (raid->capability.fpCapable) {
1009 if (isRead)
1010 io_info->fpOkForIo = (raid->capability.fpReadCapable &&
1011 ((num_strips == 1) ||
1012 raid->capability.
1013 fpReadAcrossStripe));
1014 else
1015 io_info->fpOkForIo = (raid->capability.fpWriteCapable &&
1016 ((num_strips == 1) ||
1017 raid->capability.
1018 fpWriteAcrossStripe));
1019 } else
9c915a8c 1020 io_info->fpOkForIo = FALSE;
9c915a8c 1021
1022 if (numRows == 1) {
1023 /* single-strip IOs can always lock only the data needed */
1024 if (num_strips == 1) {
1025 regStart += ref_in_start_stripe;
1026 regSize = numBlocks;
1027 }
1028 /* multi-strip IOs always need to full stripe locked */
bc93d425
SS		 1029 } else if (io_info->IoforUnevenSpan == 0) {
1030 /*
1031 * For Even span region lock optimization.
1032 * If the start strip is the last in the start row
1033 */
9c915a8c 1034 if (start_strip == (start_row + 1) * raid->rowDataSize - 1) {
9c915a8c 1035 regStart += ref_in_start_stripe;
9c915a8c 1036 /* initialize count to sectors from startref to end
1037 of strip */
bc93d425 1038 regSize = stripSize - ref_in_start_stripe;
9c915a8c 1039 }
1040
bc93d425 1041 /* add complete rows in the middle of the transfer */
9c915a8c 1042 if (numRows > 2)
9c915a8c 1043 regSize += (numRows-2) << raid->stripeShift;
1044
bc93d425 1045 /* if IO ends within first strip of last row*/
9c915a8c 1046 if (endStrip == endRow*raid->rowDataSize)
1047 regSize += ref_in_end_stripe+1;
1048 else
1049 regSize += stripSize;
bc93d425
SS		 1050 } else {
1051 /*
1052 * For Uneven span region lock optimization.
1053 * If the start strip is the last in the start row
1054 */
1055 if (start_strip == (get_strip_from_row(instance, ld, start_row, map) +
1056 SPAN_ROW_DATA_SIZE(map, ld, startlba_span) - 1)) {
1057 regStart += ref_in_start_stripe;
1058 /* initialize count to sectors from
1059 * startRef to end of strip
1060 */
1061 regSize = stripSize - ref_in_start_stripe;
1062 }
1063 /* Add complete rows in the middle of the transfer*/
1064
1065 if (numRows > 2)
1066 /* Add complete rows in the middle of the transfer*/
1067 regSize += (numRows-2) << raid->stripeShift;
1068
1069 /* if IO ends within first strip of last row */
1070 if (endStrip == get_strip_from_row(instance, ld, endRow, map))
1071 regSize += ref_in_end_stripe + 1;
1072 else
1073 regSize += stripSize;
9c915a8c 1074 }
1075
26a077e7 1076 pRAID_Context->timeoutValue =
1077 cpu_to_le16(raid->fpIoTimeoutForLd ?
1078 raid->fpIoTimeoutForLd :
1079 map->raidMap.fpPdIoTimeoutSec);
21d3c710
SS		 1080 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) ||
1081 (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY))
36807e67 1082 pRAID_Context->regLockFlags = (isRead) ?
1083 raid->regTypeReqOnRead : raid->regTypeReqOnWrite;
1084 else
1085 pRAID_Context->regLockFlags = (isRead) ?
1086 REGION_TYPE_SHARED_READ : raid->regTypeReqOnWrite;
9c915a8c 1087 pRAID_Context->VirtualDiskTgtId = raid->targetId;
94cd65dd
SS		 1088 pRAID_Context->regLockRowLBA = cpu_to_le64(regStart);
1089 pRAID_Context->regLockLength = cpu_to_le32(regSize);
9c915a8c 1090 pRAID_Context->configSeqNum = raid->seqNum;
21c9e160 1091 /* save pointer to raid->LUN array */
1092 *raidLUN = raid->LUN;
1093
9c915a8c 1094
1095 /*Get Phy Params only if FP capable, or else leave it to MR firmware
1096 to do the calculation.*/
1097 if (io_info->fpOkForIo) {
bc93d425
SS		 1098 retval = io_info->IoforUnevenSpan ?
1099 mr_spanset_get_phy_params(instance, ld,
1100 start_strip, ref_in_start_stripe,
1101 io_info, pRAID_Context, map) :
1102 MR_GetPhyParams(instance, ld, start_strip,
1103 ref_in_start_stripe, io_info,
1104 pRAID_Context, map);
1105 /* If IO on an invalid Pd, then FP is not possible.*/
9c915a8c 1106 if (io_info->devHandle == MR_PD_INVALID)
1107 io_info->fpOkForIo = FALSE;
1108 return retval;
1109 } else if (isRead) {
1110 uint stripIdx;
1111 for (stripIdx = 0; stripIdx < num_strips; stripIdx++) {
bc93d425
SS		 1112 retval = io_info->IoforUnevenSpan ?
1113 mr_spanset_get_phy_params(instance, ld,
1114 start_strip + stripIdx,
1115 ref_in_start_stripe, io_info,
1116 pRAID_Context, map) :
1117 MR_GetPhyParams(instance, ld,
1118 start_strip + stripIdx, ref_in_start_stripe,
1119 io_info, pRAID_Context, map);
1120 if (!retval)
9c915a8c 1121 return TRUE;
1122 }
1123 }
bc93d425
SS		 1124
1125#if SPAN_DEBUG
1126 /* Just for testing what arm we get for strip.*/
1127 if (io_info->IoforUnevenSpan)
1128 get_arm_from_strip(instance, ld, start_strip, map);
1129#endif
9c915a8c 1130 return TRUE;
1131}
1132
bc93d425
SS		 1133/*
1134******************************************************************************
1135*
1136* This routine pepare spanset info from Valid Raid map and store it into
1137* local copy of ldSpanInfo per instance data structure.
1138*
1139* Inputs :
1140* map - LD map
1141* ldSpanInfo - ldSpanInfo per HBA instance
1142*
1143*/
51087a86 1144void mr_update_span_set(struct MR_DRV_RAID_MAP_ALL *map,
d2552ebe 1145 PLD_SPAN_INFO ldSpanInfo)
bc93d425
SS		 1146{
1147 u8 span, count;
1148 u32 element, span_row_width;
1149 u64 span_row;
1150 struct MR_LD_RAID *raid;
1151 LD_SPAN_SET *span_set, *span_set_prev;
1152 struct MR_QUAD_ELEMENT *quad;
1153 int ldCount;
1154 u16 ld;
1155
1156
51087a86 1157 for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES_EXT; ldCount++) {
bc93d425 1158 ld = MR_TargetIdToLdGet(ldCount, map);
51087a86 1159 if (ld >= MAX_LOGICAL_DRIVES_EXT)
bc93d425
SS		 1160 continue;
1161 raid = MR_LdRaidGet(ld, map);
1162 for (element = 0; element < MAX_QUAD_DEPTH; element++) {
1163 for (span = 0; span < raid->spanDepth; span++) {
94cd65dd
SS		 1164 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
1165 block_span_info.noElements) <
bc93d425
SS		 1166 element + 1)
1167 continue;
1168 span_set = &(ldSpanInfo[ld].span_set[element]);
1169 quad = &map->raidMap.ldSpanMap[ld].
1170 spanBlock[span].block_span_info.
1171 quad[element];
1172
94cd65dd 1173 span_set->diff = le32_to_cpu(quad->diff);
bc93d425
SS		 1174
1175 for (count = 0, span_row_width = 0;
1176 count < raid->spanDepth; count++) {
94cd65dd 1177 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].
bc93d425
SS		 1178 spanBlock[count].
1179 block_span_info.
94cd65dd 1180 noElements) >= element + 1) {
bc93d425
SS		 1181 span_set->strip_offset[count] =
1182 span_row_width;
1183 span_row_width +=
1184 MR_LdSpanPtrGet
1185 (ld, count, map)->spanRowDataSize;
1186 printk(KERN_INFO "megasas:"
1187 "span %x rowDataSize %x\n",
1188 count, MR_LdSpanPtrGet
1189 (ld, count, map)->spanRowDataSize);
1190 }
1191 }
1192
1193 span_set->span_row_data_width = span_row_width;
94cd65dd
SS		 1194 span_row = mega_div64_32(((le64_to_cpu(quad->logEnd) -
1195 le64_to_cpu(quad->logStart)) + le32_to_cpu(quad->diff)),
1196 le32_to_cpu(quad->diff));
bc93d425
SS		 1197
1198 if (element == 0) {
1199 span_set->log_start_lba = 0;
1200 span_set->log_end_lba =
1201 ((span_row << raid->stripeShift)
1202 * span_row_width) - 1;
1203
1204 span_set->span_row_start = 0;
1205 span_set->span_row_end = span_row - 1;
1206
1207 span_set->data_strip_start = 0;
1208 span_set->data_strip_end =
1209 (span_row * span_row_width) - 1;
1210
1211 span_set->data_row_start = 0;
1212 span_set->data_row_end =
94cd65dd 1213 (span_row * le32_to_cpu(quad->diff)) - 1;
bc93d425
SS		 1214 } else {
1215 span_set_prev = &(ldSpanInfo[ld].
1216 span_set[element - 1]);
1217 span_set->log_start_lba =
1218 span_set_prev->log_end_lba + 1;
1219 span_set->log_end_lba =
1220 span_set->log_start_lba +
1221 ((span_row << raid->stripeShift)
1222 * span_row_width) - 1;
1223
1224 span_set->span_row_start =
1225 span_set_prev->span_row_end + 1;
1226 span_set->span_row_end =
1227 span_set->span_row_start + span_row - 1;
1228
1229 span_set->data_strip_start =
1230 span_set_prev->data_strip_end + 1;
1231 span_set->data_strip_end =
1232 span_set->data_strip_start +
1233 (span_row * span_row_width) - 1;
1234
1235 span_set->data_row_start =
1236 span_set_prev->data_row_end + 1;
1237 span_set->data_row_end =
1238 span_set->data_row_start +
94cd65dd 1239 (span_row * le32_to_cpu(quad->diff)) - 1;
bc93d425
SS		 1240 }
1241 break;
1242 }
1243 if (span == raid->spanDepth)
1244 break;
1245 }
1246 }
1247#if SPAN_DEBUG
1248 getSpanInfo(map, ldSpanInfo);
1249#endif
1250
1251}
1252
d2552ebe
SS		 1253void mr_update_load_balance_params(struct MR_DRV_RAID_MAP_ALL *drv_map,
1254 struct LD_LOAD_BALANCE_INFO *lbInfo)
9c915a8c 1255{
1256 int ldCount;
1257 u16 ld;
1258 struct MR_LD_RAID *raid;
1259
d2552ebe
SS		 1260 if (lb_pending_cmds > 128 || lb_pending_cmds < 1)
1261 lb_pending_cmds = LB_PENDING_CMDS_DEFAULT;
1262
51087a86 1263 for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES_EXT; ldCount++) {
d2552ebe 1264 ld = MR_TargetIdToLdGet(ldCount, drv_map);
51087a86 1265 if (ld >= MAX_LOGICAL_DRIVES_EXT) {
9c915a8c 1266 lbInfo[ldCount].loadBalanceFlag = 0;
1267 continue;
1268 }
1269
d2552ebe
SS		 1270 raid = MR_LdRaidGet(ld, drv_map);
1271 if ((raid->level != 1) ||
1272 (raid->ldState != MR_LD_STATE_OPTIMAL)) {
9c915a8c 1273 lbInfo[ldCount].loadBalanceFlag = 0;
d2552ebe
SS		 1274 continue;
1275 }
1276 lbInfo[ldCount].loadBalanceFlag = 1;
9c915a8c 1277 }
1278}
1279
d2552ebe
SS		 1280u8 megasas_get_best_arm_pd(struct megasas_instance *instance,
1281 struct LD_LOAD_BALANCE_INFO *lbInfo, struct IO_REQUEST_INFO *io_info)
9c915a8c 1282{
d2552ebe
SS		 1283 struct fusion_context *fusion;
1284 struct MR_LD_RAID *raid;
1285 struct MR_DRV_RAID_MAP_ALL *drv_map;
1286 u16 pend0, pend1, ld;
9c915a8c 1287 u64 diff0, diff1;
d2552ebe
SS		 1288 u8 bestArm, pd0, pd1, span, arm;
1289 u32 arRef, span_row_size;
1290
1291 u64 block = io_info->ldStartBlock;
1292 u32 count = io_info->numBlocks;
1293
1294 span = ((io_info->span_arm & RAID_CTX_SPANARM_SPAN_MASK)
1295 >> RAID_CTX_SPANARM_SPAN_SHIFT);
1296 arm = (io_info->span_arm & RAID_CTX_SPANARM_ARM_MASK);
1297
1298
1299 fusion = instance->ctrl_context;
1300 drv_map = fusion->ld_drv_map[(instance->map_id & 1)];
1301 ld = MR_TargetIdToLdGet(io_info->ldTgtId, drv_map);
1302 raid = MR_LdRaidGet(ld, drv_map);
1303 span_row_size = instance->UnevenSpanSupport ?
1304 SPAN_ROW_SIZE(drv_map, ld, span) : raid->rowSize;
1305
1306 arRef = MR_LdSpanArrayGet(ld, span, drv_map);
1307 pd0 = MR_ArPdGet(arRef, arm, drv_map);
1308 pd1 = MR_ArPdGet(arRef, (arm + 1) >= span_row_size ?
1309 (arm + 1 - span_row_size) : arm + 1, drv_map);
9c915a8c 1310
1311 /* get the pending cmds for the data and mirror arms */
d2552ebe
SS		 1312 pend0 = atomic_read(&lbInfo->scsi_pending_cmds[pd0]);
1313 pend1 = atomic_read(&lbInfo->scsi_pending_cmds[pd1]);
9c915a8c 1314
1315 /* Determine the disk whose head is nearer to the req. block */
d2552ebe
SS		 1316 diff0 = ABS_DIFF(block, lbInfo->last_accessed_block[pd0]);
1317 diff1 = ABS_DIFF(block, lbInfo->last_accessed_block[pd1]);
1318 bestArm = (diff0 <= diff1 ? arm : arm ^ 1);
9c915a8c 1319
d2552ebe
SS		 1320 if ((bestArm == arm && pend0 > pend1 + lb_pending_cmds) ||
1321 (bestArm != arm && pend1 > pend0 + lb_pending_cmds))
9c915a8c 1322 bestArm ^= 1;
1323
1324 /* Update the last accessed block on the correct pd */
d2552ebe
SS		 1325 io_info->pd_after_lb = (bestArm == arm) ? pd0 : pd1;
1326 lbInfo->last_accessed_block[io_info->pd_after_lb] = block + count - 1;
1327 io_info->span_arm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) | bestArm;
1328#if SPAN_DEBUG
1329 if (arm != bestArm)
1330 dev_dbg(&instance->pdev->dev, "LSI Debug R1 Load balance "
1331 "occur - span 0x%x arm 0x%x bestArm 0x%x "
1332 "io_info->span_arm 0x%x\n",
1333 span, arm, bestArm, io_info->span_arm);
1334#endif
1335 return io_info->pd_after_lb;
9c915a8c 1336}
1337
d2552ebe
SS		 1338u16 get_updated_dev_handle(struct megasas_instance *instance,
1339 struct LD_LOAD_BALANCE_INFO *lbInfo, struct IO_REQUEST_INFO *io_info)
9c915a8c 1340{
d2552ebe 1341 u8 arm_pd;
9c915a8c 1342 u16 devHandle;
d2552ebe
SS		 1343 struct fusion_context *fusion;
1344 struct MR_DRV_RAID_MAP_ALL *drv_map;
9c915a8c 1345
d2552ebe
SS		 1346 fusion = instance->ctrl_context;
1347 drv_map = fusion->ld_drv_map[(instance->map_id & 1)];
9c915a8c 1348
d2552ebe
SS		 1349 /* get best new arm (PD ID) */
1350 arm_pd = megasas_get_best_arm_pd(instance, lbInfo, io_info);
1351 devHandle = MR_PdDevHandleGet(arm_pd, drv_map);
1352 atomic_inc(&lbInfo->scsi_pending_cmds[arm_pd]);
9c915a8c 1353 return devHandle;
1354}
Linux 6.x block layer and io_uring tree(s)