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1da177e4 LT |
1 | /* |
2 | * | |
3 | * Linux MegaRAID device driver | |
4 | * | |
5 | * Copyright (c) 2003-2004 LSI Logic Corporation. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the License, or (at your option) any later version. | |
11 | * | |
12 | * FILE : megaraid_mbox.h | |
13 | */ | |
14 | ||
15 | #ifndef _MEGARAID_H_ | |
16 | #define _MEGARAID_H_ | |
17 | ||
18 | ||
19 | #include "mega_common.h" | |
20 | #include "mbox_defs.h" | |
21 | #include "megaraid_ioctl.h" | |
22 | ||
23 | ||
cd96d96f SP |
24 | #define MEGARAID_VERSION "2.20.5.1" |
25 | #define MEGARAID_EXT_VERSION "(Release Date: Thu Nov 16 15:32:35 EST 2006)" | |
1da177e4 LT |
26 | |
27 | ||
28 | /* | |
29 | * Define some PCI values here until they are put in the kernel | |
30 | */ | |
31 | #define PCI_DEVICE_ID_PERC4_DI_DISCOVERY 0x000E | |
32 | #define PCI_SUBSYS_ID_PERC4_DI_DISCOVERY 0x0123 | |
33 | ||
34 | #define PCI_DEVICE_ID_PERC4_SC 0x1960 | |
35 | #define PCI_SUBSYS_ID_PERC4_SC 0x0520 | |
36 | ||
37 | #define PCI_DEVICE_ID_PERC4_DC 0x1960 | |
38 | #define PCI_SUBSYS_ID_PERC4_DC 0x0518 | |
39 | ||
672b2d38 | 40 | #define PCI_DEVICE_ID_VERDE 0x0407 |
1da177e4 LT |
41 | |
42 | #define PCI_DEVICE_ID_PERC4_DI_EVERGLADES 0x000F | |
43 | #define PCI_SUBSYS_ID_PERC4_DI_EVERGLADES 0x014A | |
44 | ||
45 | #define PCI_DEVICE_ID_PERC4E_SI_BIGBEND 0x0013 | |
46 | #define PCI_SUBSYS_ID_PERC4E_SI_BIGBEND 0x016c | |
47 | ||
48 | #define PCI_DEVICE_ID_PERC4E_DI_KOBUK 0x0013 | |
49 | #define PCI_SUBSYS_ID_PERC4E_DI_KOBUK 0x016d | |
50 | ||
51 | #define PCI_DEVICE_ID_PERC4E_DI_CORVETTE 0x0013 | |
52 | #define PCI_SUBSYS_ID_PERC4E_DI_CORVETTE 0x016e | |
53 | ||
54 | #define PCI_DEVICE_ID_PERC4E_DI_EXPEDITION 0x0013 | |
55 | #define PCI_SUBSYS_ID_PERC4E_DI_EXPEDITION 0x016f | |
56 | ||
57 | #define PCI_DEVICE_ID_PERC4E_DI_GUADALUPE 0x0013 | |
58 | #define PCI_SUBSYS_ID_PERC4E_DI_GUADALUPE 0x0170 | |
59 | ||
672b2d38 | 60 | #define PCI_DEVICE_ID_DOBSON 0x0408 |
1da177e4 LT |
61 | |
62 | #define PCI_DEVICE_ID_MEGARAID_SCSI_320_0 0x1960 | |
63 | #define PCI_SUBSYS_ID_MEGARAID_SCSI_320_0 0xA520 | |
64 | ||
65 | #define PCI_DEVICE_ID_MEGARAID_SCSI_320_1 0x1960 | |
66 | #define PCI_SUBSYS_ID_MEGARAID_SCSI_320_1 0x0520 | |
67 | ||
68 | #define PCI_DEVICE_ID_MEGARAID_SCSI_320_2 0x1960 | |
69 | #define PCI_SUBSYS_ID_MEGARAID_SCSI_320_2 0x0518 | |
70 | ||
1da177e4 LT |
71 | #define PCI_DEVICE_ID_MEGARAID_I4_133_RAID 0x1960 |
72 | #define PCI_SUBSYS_ID_MEGARAID_I4_133_RAID 0x0522 | |
73 | ||
74 | #define PCI_DEVICE_ID_MEGARAID_SATA_150_4 0x1960 | |
75 | #define PCI_SUBSYS_ID_MEGARAID_SATA_150_4 0x4523 | |
76 | ||
77 | #define PCI_DEVICE_ID_MEGARAID_SATA_150_6 0x1960 | |
78 | #define PCI_SUBSYS_ID_MEGARAID_SATA_150_6 0x0523 | |
79 | ||
672b2d38 | 80 | #define PCI_DEVICE_ID_LINDSAY 0x0409 |
1da177e4 LT |
81 | |
82 | #define PCI_DEVICE_ID_INTEL_RAID_SRCS16 0x1960 | |
83 | #define PCI_SUBSYS_ID_INTEL_RAID_SRCS16 0x0523 | |
84 | ||
1da177e4 LT |
85 | #define PCI_DEVICE_ID_INTEL_RAID_SRCU41L_LAKE_SHETEK 0x1960 |
86 | #define PCI_SUBSYS_ID_INTEL_RAID_SRCU41L_LAKE_SHETEK 0x0520 | |
87 | ||
1da177e4 LT |
88 | #define PCI_SUBSYS_ID_PERC3_QC 0x0471 |
89 | #define PCI_SUBSYS_ID_PERC3_DC 0x0493 | |
90 | #define PCI_SUBSYS_ID_PERC3_SC 0x0475 | |
69cd39e9 | 91 | #define PCI_SUBSYS_ID_CERC_ATA100_4CH 0x0511 |
1da177e4 | 92 | |
1da177e4 LT |
93 | |
94 | #define MBOX_MAX_SCSI_CMDS 128 // number of cmds reserved for kernel | |
95 | #define MBOX_MAX_USER_CMDS 32 // number of cmds for applications | |
96 | #define MBOX_DEF_CMD_PER_LUN 64 // default commands per lun | |
97 | #define MBOX_DEFAULT_SG_SIZE 26 // default sg size supported by all fw | |
98 | #define MBOX_MAX_SG_SIZE 32 // maximum scatter-gather list size | |
99 | #define MBOX_MAX_SECTORS 128 // maximum sectors per IO | |
100 | #define MBOX_TIMEOUT 30 // timeout value for internal cmds | |
101 | #define MBOX_BUSY_WAIT 10 // max usec to wait for busy mailbox | |
102 | #define MBOX_RESET_WAIT 180 // wait these many seconds in reset | |
103 | #define MBOX_RESET_EXT_WAIT 120 // extended wait reset | |
c005fb4f JS |
104 | #define MBOX_SYNC_WAIT_CNT 0xFFFF // wait loop index for synchronous mode |
105 | ||
106 | #define MBOX_SYNC_DELAY_200 200 // 200 micro-seconds | |
1da177e4 LT |
107 | |
108 | /* | |
109 | * maximum transfer that can happen through the firmware commands issued | |
110 | * internnaly from the driver. | |
111 | */ | |
112 | #define MBOX_IBUF_SIZE 4096 | |
113 | ||
114 | ||
115 | /** | |
116 | * mbox_ccb_t - command control block specific to mailbox based controllers | |
117 | * @raw_mbox : raw mailbox pointer | |
118 | * @mbox : mailbox | |
119 | * @mbox64 : extended mailbox | |
120 | * @mbox_dma_h : maibox dma address | |
121 | * @sgl64 : 64-bit scatter-gather list | |
122 | * @sgl32 : 32-bit scatter-gather list | |
123 | * @sgl_dma_h : dma handle for the scatter-gather list | |
124 | * @pthru : passthru structure | |
125 | * @pthru_dma_h : dma handle for the passthru structure | |
126 | * @epthru : extended passthru structure | |
127 | * @epthru_dma_h : dma handle for extended passthru structure | |
128 | * @buf_dma_h : dma handle for buffers w/o sg list | |
129 | * | |
130 | * command control block specific to the mailbox based controllers | |
131 | */ | |
132 | typedef struct { | |
133 | uint8_t *raw_mbox; | |
134 | mbox_t *mbox; | |
135 | mbox64_t *mbox64; | |
136 | dma_addr_t mbox_dma_h; | |
137 | mbox_sgl64 *sgl64; | |
138 | mbox_sgl32 *sgl32; | |
139 | dma_addr_t sgl_dma_h; | |
140 | mraid_passthru_t *pthru; | |
141 | dma_addr_t pthru_dma_h; | |
142 | mraid_epassthru_t *epthru; | |
143 | dma_addr_t epthru_dma_h; | |
144 | dma_addr_t buf_dma_h; | |
145 | } mbox_ccb_t; | |
146 | ||
147 | ||
148 | /** | |
149 | * mraid_device_t - adapter soft state structure for mailbox controllers | |
a69b74d3 RD |
150 | * @una_mbox64 : 64-bit mbox - unaligned |
151 | * @una_mbox64_dma : mbox dma addr - unaligned | |
152 | * @mbox : 32-bit mbox - aligned | |
153 | * @mbox64 : 64-bit mbox - aligned | |
154 | * @mbox_dma : mbox dma addr - aligned | |
155 | * @mailbox_lock : exclusion lock for the mailbox | |
156 | * @baseport : base port of hba memory | |
157 | * @baseaddr : mapped addr of hba memory | |
158 | * @mbox_pool : pool of mailboxes | |
159 | * @mbox_pool_handle : handle for the mailbox pool memory | |
160 | * @epthru_pool : a pool for extended passthru commands | |
161 | * @epthru_pool_handle : handle to the pool above | |
162 | * @sg_pool : pool of scatter-gather lists for this driver | |
163 | * @sg_pool_handle : handle to the pool above | |
164 | * @ccb_list : list of our command control blocks | |
165 | * @uccb_list : list of cmd control blocks for mgmt module | |
166 | * @umbox64 : array of mailbox for user commands (cmm) | |
167 | * @pdrv_state : array for state of each physical drive. | |
168 | * @last_disp : flag used to show device scanning | |
169 | * @hw_error : set if FW not responding | |
170 | * @fast_load : If set, skip physical device scanning | |
1da177e4 | 171 | * @channel_class : channel class, RAID or SCSI |
0c2cc433 | 172 | * @sysfs_mtx : mutex to serialize access to sysfs res. |
1da177e4 LT |
173 | * @sysfs_uioc : management packet to issue FW calls from sysfs |
174 | * @sysfs_mbox64 : mailbox packet to issue FW calls from sysfs | |
175 | * @sysfs_buffer : data buffer for FW commands issued from sysfs | |
176 | * @sysfs_buffer_dma : DMA buffer for FW commands issued from sysfs | |
177 | * @sysfs_wait_q : wait queue for sysfs operations | |
178 | * @random_del_supported : set if the random deletion is supported | |
179 | * @curr_ldmap : current LDID map | |
180 | * | |
181 | * Initialization structure for mailbox controllers: memory based and IO based | |
182 | * All the fields in this structure are LLD specific and may be discovered at | |
183 | * init() or start() time. | |
184 | * | |
185 | * NOTE: The fields of this structures are placed to minimize cache misses | |
186 | */ | |
187 | #define MAX_LD_EXTENDED64 64 | |
188 | typedef struct { | |
189 | mbox64_t *una_mbox64; | |
190 | dma_addr_t una_mbox64_dma; | |
191 | mbox_t *mbox; | |
192 | mbox64_t *mbox64; | |
193 | dma_addr_t mbox_dma; | |
194 | spinlock_t mailbox_lock; | |
195 | unsigned long baseport; | |
196 | void __iomem * baseaddr; | |
197 | struct mraid_pci_blk mbox_pool[MBOX_MAX_SCSI_CMDS]; | |
198 | struct dma_pool *mbox_pool_handle; | |
199 | struct mraid_pci_blk epthru_pool[MBOX_MAX_SCSI_CMDS]; | |
200 | struct dma_pool *epthru_pool_handle; | |
201 | struct mraid_pci_blk sg_pool[MBOX_MAX_SCSI_CMDS]; | |
202 | struct dma_pool *sg_pool_handle; | |
203 | mbox_ccb_t ccb_list[MBOX_MAX_SCSI_CMDS]; | |
204 | mbox_ccb_t uccb_list[MBOX_MAX_USER_CMDS]; | |
205 | mbox64_t umbox64[MBOX_MAX_USER_CMDS]; | |
206 | ||
207 | uint8_t pdrv_state[MBOX_MAX_PHYSICAL_DRIVES]; | |
208 | uint32_t last_disp; | |
209 | int hw_error; | |
210 | int fast_load; | |
211 | uint8_t channel_class; | |
0c2cc433 | 212 | struct mutex sysfs_mtx; |
1da177e4 LT |
213 | uioc_t *sysfs_uioc; |
214 | mbox64_t *sysfs_mbox64; | |
215 | caddr_t sysfs_buffer; | |
216 | dma_addr_t sysfs_buffer_dma; | |
217 | wait_queue_head_t sysfs_wait_q; | |
218 | int random_del_supported; | |
219 | uint16_t curr_ldmap[MAX_LD_EXTENDED64]; | |
220 | } mraid_device_t; | |
221 | ||
222 | // route to raid device from adapter | |
223 | #define ADAP2RAIDDEV(adp) ((mraid_device_t *)((adp)->raid_device)) | |
224 | ||
225 | #define MAILBOX_LOCK(rdev) (&(rdev)->mailbox_lock) | |
226 | ||
227 | // Find out if this channel is a RAID or SCSI | |
228 | #define IS_RAID_CH(rdev, ch) (((rdev)->channel_class >> (ch)) & 0x01) | |
229 | ||
230 | ||
231 | #define RDINDOOR(rdev) readl((rdev)->baseaddr + 0x20) | |
232 | #define RDOUTDOOR(rdev) readl((rdev)->baseaddr + 0x2C) | |
233 | #define WRINDOOR(rdev, value) writel(value, (rdev)->baseaddr + 0x20) | |
234 | #define WROUTDOOR(rdev, value) writel(value, (rdev)->baseaddr + 0x2C) | |
235 | ||
236 | #endif // _MEGARAID_H_ | |
237 | ||
238 | // vim: set ts=8 sw=8 tw=78: |