scsi: lpfc: Adapt partitioned XRI lists to efficient sharing
[linux-block.git] / drivers / scsi / lpfc / lpfc_sli.c
CommitLineData
dea3101e 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
128bddac 4 * Copyright (C) 2017-2018 Broadcom. All Rights Reserved. The term *
3e21d1cb 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
50611577 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
c44ce173 7 * EMULEX and SLI are trademarks of Emulex. *
d080abe0 8 * www.broadcom.com *
c44ce173 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e 10 * *
11 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC
12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
dea3101e 22 *******************************************************************/
23
dea3101e 24#include <linux/blkdev.h>
25#include <linux/pci.h>
26#include <linux/interrupt.h>
27#include <linux/delay.h>
5a0e3ad6 28#include <linux/slab.h>
1c2ba475 29#include <linux/lockdep.h>
dea3101e 30
91886523 31#include <scsi/scsi.h>
dea3101e 32#include <scsi/scsi_cmnd.h>
33#include <scsi/scsi_device.h>
34#include <scsi/scsi_host.h>
f888ba3c 35#include <scsi/scsi_transport_fc.h>
da0436e9 36#include <scsi/fc/fc_fs.h>
0d878419 37#include <linux/aer.h>
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38#ifdef CONFIG_X86
39#include <asm/set_memory.h>
40#endif
dea3101e 41
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42#include <linux/nvme-fc-driver.h>
43
da0436e9 44#include "lpfc_hw4.h"
dea3101e 45#include "lpfc_hw.h"
46#include "lpfc_sli.h"
da0436e9 47#include "lpfc_sli4.h"
ea2151b4 48#include "lpfc_nl.h"
dea3101e 49#include "lpfc_disc.h"
dea3101e 50#include "lpfc.h"
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51#include "lpfc_scsi.h"
52#include "lpfc_nvme.h"
f358dd0c 53#include "lpfc_nvmet.h"
dea3101e 54#include "lpfc_crtn.h"
55#include "lpfc_logmsg.h"
56#include "lpfc_compat.h"
858c9f6c 57#include "lpfc_debugfs.h"
04c68496 58#include "lpfc_vport.h"
61bda8f7 59#include "lpfc_version.h"
dea3101e 60
61/* There are only four IOCB completion types. */
62typedef enum _lpfc_iocb_type {
63 LPFC_UNKNOWN_IOCB,
64 LPFC_UNSOL_IOCB,
65 LPFC_SOL_IOCB,
66 LPFC_ABORT_IOCB
67} lpfc_iocb_type;
68
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69
70/* Provide function prototypes local to this module. */
71static int lpfc_sli_issue_mbox_s4(struct lpfc_hba *, LPFC_MBOXQ_t *,
72 uint32_t);
73static int lpfc_sli4_read_rev(struct lpfc_hba *, LPFC_MBOXQ_t *,
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74 uint8_t *, uint32_t *);
75static struct lpfc_iocbq *lpfc_sli4_els_wcqe_to_rspiocbq(struct lpfc_hba *,
76 struct lpfc_iocbq *);
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77static void lpfc_sli4_send_seq_to_ulp(struct lpfc_vport *,
78 struct hbq_dmabuf *);
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79static void lpfc_sli4_handle_mds_loopback(struct lpfc_vport *vport,
80 struct hbq_dmabuf *dmabuf);
895427bd 81static int lpfc_sli4_fp_handle_cqe(struct lpfc_hba *, struct lpfc_queue *,
0558056c 82 struct lpfc_cqe *);
895427bd 83static int lpfc_sli4_post_sgl_list(struct lpfc_hba *, struct list_head *,
8a9d2e80 84 int);
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85static void lpfc_sli4_hba_handle_eqe(struct lpfc_hba *phba,
86 struct lpfc_eqe *eqe, uint32_t qidx);
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87static bool lpfc_sli4_mbox_completions_pending(struct lpfc_hba *phba);
88static bool lpfc_sli4_process_missed_mbox_completions(struct lpfc_hba *phba);
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89static int lpfc_sli4_abort_nvme_io(struct lpfc_hba *phba,
90 struct lpfc_sli_ring *pring,
91 struct lpfc_iocbq *cmdiocb);
0558056c 92
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93static IOCB_t *
94lpfc_get_iocb_from_iocbq(struct lpfc_iocbq *iocbq)
95{
96 return &iocbq->iocb;
97}
98
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99#if defined(CONFIG_64BIT) && defined(__LITTLE_ENDIAN)
100/**
101 * lpfc_sli4_pcimem_bcopy - SLI4 memory copy function
102 * @srcp: Source memory pointer.
103 * @destp: Destination memory pointer.
104 * @cnt: Number of words required to be copied.
105 * Must be a multiple of sizeof(uint64_t)
106 *
107 * This function is used for copying data between driver memory
108 * and the SLI WQ. This function also changes the endianness
109 * of each word if native endianness is different from SLI
110 * endianness. This function can be called with or without
111 * lock.
112 **/
113void
114lpfc_sli4_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
115{
116 uint64_t *src = srcp;
117 uint64_t *dest = destp;
118 int i;
119
120 for (i = 0; i < (int)cnt; i += sizeof(uint64_t))
121 *dest++ = *src++;
122}
123#else
124#define lpfc_sli4_pcimem_bcopy(a, b, c) lpfc_sli_pcimem_bcopy(a, b, c)
125#endif
126
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127/**
128 * lpfc_sli4_wq_put - Put a Work Queue Entry on an Work Queue
129 * @q: The Work Queue to operate on.
130 * @wqe: The work Queue Entry to put on the Work queue.
131 *
132 * This routine will copy the contents of @wqe to the next available entry on
133 * the @q. This function will then ring the Work Queue Doorbell to signal the
134 * HBA to start processing the Work Queue Entry. This function returns 0 if
135 * successful. If no entries are available on @q then this function will return
136 * -ENOMEM.
137 * The caller is expected to hold the hbalock when calling this routine.
138 **/
cd22d605 139static int
205e8240 140lpfc_sli4_wq_put(struct lpfc_queue *q, union lpfc_wqe128 *wqe)
4f774513 141{
2e90f4b5 142 union lpfc_wqe *temp_wqe;
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143 struct lpfc_register doorbell;
144 uint32_t host_index;
027140ea 145 uint32_t idx;
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146 uint32_t i = 0;
147 uint8_t *tmp;
5cc167dd 148 u32 if_type;
4f774513 149
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150 /* sanity check on queue memory */
151 if (unlikely(!q))
152 return -ENOMEM;
153 temp_wqe = q->qe[q->host_index].wqe;
154
4f774513 155 /* If the host has not yet processed the next entry then we are done */
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156 idx = ((q->host_index + 1) % q->entry_count);
157 if (idx == q->hba_index) {
b84daac9 158 q->WQ_overflow++;
cd22d605 159 return -EBUSY;
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160 }
161 q->WQ_posted++;
4f774513 162 /* set consumption flag every once in a while */
ff78d8f9 163 if (!((q->host_index + 1) % q->entry_repost))
f0d9bccc 164 bf_set(wqe_wqec, &wqe->generic.wqe_com, 1);
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165 else
166 bf_set(wqe_wqec, &wqe->generic.wqe_com, 0);
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167 if (q->phba->sli3_options & LPFC_SLI4_PHWQ_ENABLED)
168 bf_set(wqe_wqid, &wqe->generic.wqe_com, q->queue_id);
48f8fdb4 169 lpfc_sli4_pcimem_bcopy(wqe, temp_wqe, q->entry_size);
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170 if (q->dpp_enable && q->phba->cfg_enable_dpp) {
171 /* write to DPP aperture taking advatage of Combined Writes */
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172 tmp = (uint8_t *)temp_wqe;
173#ifdef __raw_writeq
1351e69f 174 for (i = 0; i < q->entry_size; i += sizeof(uint64_t))
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175 __raw_writeq(*((uint64_t *)(tmp + i)),
176 q->dpp_regaddr + i);
177#else
178 for (i = 0; i < q->entry_size; i += sizeof(uint32_t))
179 __raw_writel(*((uint32_t *)(tmp + i)),
180 q->dpp_regaddr + i);
181#endif
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182 }
183 /* ensure WQE bcopy and DPP flushed before doorbell write */
6b3b3bdb 184 wmb();
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185
186 /* Update the host index before invoking device */
187 host_index = q->host_index;
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188
189 q->host_index = idx;
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190
191 /* Ring Doorbell */
192 doorbell.word0 = 0;
962bc51b 193 if (q->db_format == LPFC_DB_LIST_FORMAT) {
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194 if (q->dpp_enable && q->phba->cfg_enable_dpp) {
195 bf_set(lpfc_if6_wq_db_list_fm_num_posted, &doorbell, 1);
196 bf_set(lpfc_if6_wq_db_list_fm_dpp, &doorbell, 1);
197 bf_set(lpfc_if6_wq_db_list_fm_dpp_id, &doorbell,
198 q->dpp_id);
199 bf_set(lpfc_if6_wq_db_list_fm_id, &doorbell,
200 q->queue_id);
201 } else {
202 bf_set(lpfc_wq_db_list_fm_num_posted, &doorbell, 1);
1351e69f 203 bf_set(lpfc_wq_db_list_fm_id, &doorbell, q->queue_id);
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204
205 /* Leave bits <23:16> clear for if_type 6 dpp */
206 if_type = bf_get(lpfc_sli_intf_if_type,
207 &q->phba->sli4_hba.sli_intf);
208 if (if_type != LPFC_SLI_INTF_IF_TYPE_6)
209 bf_set(lpfc_wq_db_list_fm_index, &doorbell,
210 host_index);
1351e69f 211 }
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212 } else if (q->db_format == LPFC_DB_RING_FORMAT) {
213 bf_set(lpfc_wq_db_ring_fm_num_posted, &doorbell, 1);
214 bf_set(lpfc_wq_db_ring_fm_id, &doorbell, q->queue_id);
215 } else {
216 return -EINVAL;
217 }
218 writel(doorbell.word0, q->db_regaddr);
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219
220 return 0;
221}
222
223/**
224 * lpfc_sli4_wq_release - Updates internal hba index for WQ
225 * @q: The Work Queue to operate on.
226 * @index: The index to advance the hba index to.
227 *
228 * This routine will update the HBA index of a queue to reflect consumption of
229 * Work Queue Entries by the HBA. When the HBA indicates that it has consumed
230 * an entry the host calls this function to update the queue's internal
231 * pointers. This routine returns the number of entries that were consumed by
232 * the HBA.
233 **/
234static uint32_t
235lpfc_sli4_wq_release(struct lpfc_queue *q, uint32_t index)
236{
237 uint32_t released = 0;
238
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239 /* sanity check on queue memory */
240 if (unlikely(!q))
241 return 0;
242
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243 if (q->hba_index == index)
244 return 0;
245 do {
246 q->hba_index = ((q->hba_index + 1) % q->entry_count);
247 released++;
248 } while (q->hba_index != index);
249 return released;
250}
251
252/**
253 * lpfc_sli4_mq_put - Put a Mailbox Queue Entry on an Mailbox Queue
254 * @q: The Mailbox Queue to operate on.
255 * @wqe: The Mailbox Queue Entry to put on the Work queue.
256 *
257 * This routine will copy the contents of @mqe to the next available entry on
258 * the @q. This function will then ring the Work Queue Doorbell to signal the
259 * HBA to start processing the Work Queue Entry. This function returns 0 if
260 * successful. If no entries are available on @q then this function will return
261 * -ENOMEM.
262 * The caller is expected to hold the hbalock when calling this routine.
263 **/
264static uint32_t
265lpfc_sli4_mq_put(struct lpfc_queue *q, struct lpfc_mqe *mqe)
266{
2e90f4b5 267 struct lpfc_mqe *temp_mqe;
4f774513 268 struct lpfc_register doorbell;
4f774513 269
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270 /* sanity check on queue memory */
271 if (unlikely(!q))
272 return -ENOMEM;
273 temp_mqe = q->qe[q->host_index].mqe;
274
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275 /* If the host has not yet processed the next entry then we are done */
276 if (((q->host_index + 1) % q->entry_count) == q->hba_index)
277 return -ENOMEM;
48f8fdb4 278 lpfc_sli4_pcimem_bcopy(mqe, temp_mqe, q->entry_size);
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279 /* Save off the mailbox pointer for completion */
280 q->phba->mbox = (MAILBOX_t *)temp_mqe;
281
282 /* Update the host index before invoking device */
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283 q->host_index = ((q->host_index + 1) % q->entry_count);
284
285 /* Ring Doorbell */
286 doorbell.word0 = 0;
287 bf_set(lpfc_mq_doorbell_num_posted, &doorbell, 1);
288 bf_set(lpfc_mq_doorbell_id, &doorbell, q->queue_id);
289 writel(doorbell.word0, q->phba->sli4_hba.MQDBregaddr);
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290 return 0;
291}
292
293/**
294 * lpfc_sli4_mq_release - Updates internal hba index for MQ
295 * @q: The Mailbox Queue to operate on.
296 *
297 * This routine will update the HBA index of a queue to reflect consumption of
298 * a Mailbox Queue Entry by the HBA. When the HBA indicates that it has consumed
299 * an entry the host calls this function to update the queue's internal
300 * pointers. This routine returns the number of entries that were consumed by
301 * the HBA.
302 **/
303static uint32_t
304lpfc_sli4_mq_release(struct lpfc_queue *q)
305{
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306 /* sanity check on queue memory */
307 if (unlikely(!q))
308 return 0;
309
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310 /* Clear the mailbox pointer for completion */
311 q->phba->mbox = NULL;
312 q->hba_index = ((q->hba_index + 1) % q->entry_count);
313 return 1;
314}
315
316/**
317 * lpfc_sli4_eq_get - Gets the next valid EQE from a EQ
318 * @q: The Event Queue to get the first valid EQE from
319 *
320 * This routine will get the first valid Event Queue Entry from @q, update
321 * the queue's internal hba index, and return the EQE. If no valid EQEs are in
322 * the Queue (no more work to do), or the Queue is full of EQEs that have been
323 * processed, but not popped back to the HBA then this routine will return NULL.
324 **/
325static struct lpfc_eqe *
326lpfc_sli4_eq_get(struct lpfc_queue *q)
327{
7365f6fd 328 struct lpfc_hba *phba;
2e90f4b5 329 struct lpfc_eqe *eqe;
027140ea 330 uint32_t idx;
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331
332 /* sanity check on queue memory */
333 if (unlikely(!q))
334 return NULL;
7365f6fd 335 phba = q->phba;
2e90f4b5 336 eqe = q->qe[q->hba_index].eqe;
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337
338 /* If the next EQE is not valid then we are done */
7365f6fd 339 if (bf_get_le32(lpfc_eqe_valid, eqe) != q->qe_valid)
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340 return NULL;
341 /* If the host has not yet processed the next entry then we are done */
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342 idx = ((q->hba_index + 1) % q->entry_count);
343 if (idx == q->host_index)
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344 return NULL;
345
027140ea 346 q->hba_index = idx;
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347 /* if the index wrapped around, toggle the valid bit */
348 if (phba->sli4_hba.pc_sli4_params.eqav && !q->hba_index)
349 q->qe_valid = (q->qe_valid) ? 0 : 1;
350
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351
352 /*
353 * insert barrier for instruction interlock : data from the hardware
354 * must have the valid bit checked before it can be copied and acted
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355 * upon. Speculative instructions were allowing a bcopy at the start
356 * of lpfc_sli4_fp_handle_wcqe(), which is called immediately
357 * after our return, to copy data before the valid bit check above
358 * was done. As such, some of the copied data was stale. The barrier
359 * ensures the check is before any data is copied.
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360 */
361 mb();
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362 return eqe;
363}
364
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365/**
366 * lpfc_sli4_eq_clr_intr - Turn off interrupts from this EQ
367 * @q: The Event Queue to disable interrupts
368 *
369 **/
b71413dd 370inline void
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371lpfc_sli4_eq_clr_intr(struct lpfc_queue *q)
372{
373 struct lpfc_register doorbell;
374
375 doorbell.word0 = 0;
376 bf_set(lpfc_eqcq_doorbell_eqci, &doorbell, 1);
377 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_EVENT);
378 bf_set(lpfc_eqcq_doorbell_eqid_hi, &doorbell,
379 (q->queue_id >> LPFC_EQID_HI_FIELD_SHIFT));
380 bf_set(lpfc_eqcq_doorbell_eqid_lo, &doorbell, q->queue_id);
9dd35425 381 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
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382}
383
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384/**
385 * lpfc_sli4_if6_eq_clr_intr - Turn off interrupts from this EQ
386 * @q: The Event Queue to disable interrupts
387 *
388 **/
389inline void
390lpfc_sli4_if6_eq_clr_intr(struct lpfc_queue *q)
391{
392 struct lpfc_register doorbell;
393
394 doorbell.word0 = 0;
aad59d5d 395 bf_set(lpfc_if6_eq_doorbell_eqid, &doorbell, q->queue_id);
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396 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
397}
398
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399/**
400 * lpfc_sli4_eq_release - Indicates the host has finished processing an EQ
401 * @q: The Event Queue that the host has completed processing for.
402 * @arm: Indicates whether the host wants to arms this CQ.
403 *
404 * This routine will mark all Event Queue Entries on @q, from the last
405 * known completed entry to the last entry that was processed, as completed
406 * by clearing the valid bit for each completion queue entry. Then it will
407 * notify the HBA, by ringing the doorbell, that the EQEs have been processed.
408 * The internal host index in the @q will be updated by this routine to indicate
409 * that the host has finished processing the entries. The @arm parameter
410 * indicates that the queue should be rearmed when ringing the doorbell.
411 *
412 * This function will return the number of EQEs that were popped.
413 **/
414uint32_t
415lpfc_sli4_eq_release(struct lpfc_queue *q, bool arm)
416{
417 uint32_t released = 0;
7365f6fd 418 struct lpfc_hba *phba;
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419 struct lpfc_eqe *temp_eqe;
420 struct lpfc_register doorbell;
421
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422 /* sanity check on queue memory */
423 if (unlikely(!q))
424 return 0;
7365f6fd 425 phba = q->phba;
2e90f4b5 426
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427 /* while there are valid entries */
428 while (q->hba_index != q->host_index) {
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429 if (!phba->sli4_hba.pc_sli4_params.eqav) {
430 temp_eqe = q->qe[q->host_index].eqe;
431 bf_set_le32(lpfc_eqe_valid, temp_eqe, 0);
432 }
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433 released++;
434 q->host_index = ((q->host_index + 1) % q->entry_count);
435 }
436 if (unlikely(released == 0 && !arm))
437 return 0;
438
439 /* ring doorbell for number popped */
440 doorbell.word0 = 0;
441 if (arm) {
442 bf_set(lpfc_eqcq_doorbell_arm, &doorbell, 1);
443 bf_set(lpfc_eqcq_doorbell_eqci, &doorbell, 1);
444 }
445 bf_set(lpfc_eqcq_doorbell_num_released, &doorbell, released);
446 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_EVENT);
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447 bf_set(lpfc_eqcq_doorbell_eqid_hi, &doorbell,
448 (q->queue_id >> LPFC_EQID_HI_FIELD_SHIFT));
449 bf_set(lpfc_eqcq_doorbell_eqid_lo, &doorbell, q->queue_id);
9dd35425 450 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
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451 /* PCI read to flush PCI pipeline on re-arming for INTx mode */
452 if ((q->phba->intr_type == INTx) && (arm == LPFC_QUEUE_REARM))
9dd35425 453 readl(q->phba->sli4_hba.EQDBregaddr);
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454 return released;
455}
456
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457/**
458 * lpfc_sli4_if6_eq_release - Indicates the host has finished processing an EQ
459 * @q: The Event Queue that the host has completed processing for.
460 * @arm: Indicates whether the host wants to arms this CQ.
461 *
462 * This routine will mark all Event Queue Entries on @q, from the last
463 * known completed entry to the last entry that was processed, as completed
464 * by clearing the valid bit for each completion queue entry. Then it will
465 * notify the HBA, by ringing the doorbell, that the EQEs have been processed.
466 * The internal host index in the @q will be updated by this routine to indicate
467 * that the host has finished processing the entries. The @arm parameter
468 * indicates that the queue should be rearmed when ringing the doorbell.
469 *
470 * This function will return the number of EQEs that were popped.
471 **/
472uint32_t
473lpfc_sli4_if6_eq_release(struct lpfc_queue *q, bool arm)
474{
475 uint32_t released = 0;
7365f6fd 476 struct lpfc_hba *phba;
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477 struct lpfc_eqe *temp_eqe;
478 struct lpfc_register doorbell;
479
480 /* sanity check on queue memory */
481 if (unlikely(!q))
482 return 0;
7365f6fd 483 phba = q->phba;
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484
485 /* while there are valid entries */
486 while (q->hba_index != q->host_index) {
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487 if (!phba->sli4_hba.pc_sli4_params.eqav) {
488 temp_eqe = q->qe[q->host_index].eqe;
489 bf_set_le32(lpfc_eqe_valid, temp_eqe, 0);
490 }
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491 released++;
492 q->host_index = ((q->host_index + 1) % q->entry_count);
493 }
494 if (unlikely(released == 0 && !arm))
495 return 0;
496
497 /* ring doorbell for number popped */
498 doorbell.word0 = 0;
499 if (arm)
500 bf_set(lpfc_if6_eq_doorbell_arm, &doorbell, 1);
501 bf_set(lpfc_if6_eq_doorbell_num_released, &doorbell, released);
502 bf_set(lpfc_if6_eq_doorbell_eqid, &doorbell, q->queue_id);
503 writel(doorbell.word0, q->phba->sli4_hba.EQDBregaddr);
504 /* PCI read to flush PCI pipeline on re-arming for INTx mode */
505 if ((q->phba->intr_type == INTx) && (arm == LPFC_QUEUE_REARM))
506 readl(q->phba->sli4_hba.EQDBregaddr);
507 return released;
508}
509
4f774513
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510/**
511 * lpfc_sli4_cq_get - Gets the next valid CQE from a CQ
512 * @q: The Completion Queue to get the first valid CQE from
513 *
514 * This routine will get the first valid Completion Queue Entry from @q, update
515 * the queue's internal hba index, and return the CQE. If no valid CQEs are in
516 * the Queue (no more work to do), or the Queue is full of CQEs that have been
517 * processed, but not popped back to the HBA then this routine will return NULL.
518 **/
519static struct lpfc_cqe *
520lpfc_sli4_cq_get(struct lpfc_queue *q)
521{
7365f6fd 522 struct lpfc_hba *phba;
4f774513 523 struct lpfc_cqe *cqe;
027140ea 524 uint32_t idx;
4f774513 525
2e90f4b5
JS
526 /* sanity check on queue memory */
527 if (unlikely(!q))
528 return NULL;
7365f6fd
JS
529 phba = q->phba;
530 cqe = q->qe[q->hba_index].cqe;
2e90f4b5 531
4f774513 532 /* If the next CQE is not valid then we are done */
7365f6fd 533 if (bf_get_le32(lpfc_cqe_valid, cqe) != q->qe_valid)
4f774513
JS
534 return NULL;
535 /* If the host has not yet processed the next entry then we are done */
027140ea
JS
536 idx = ((q->hba_index + 1) % q->entry_count);
537 if (idx == q->host_index)
4f774513
JS
538 return NULL;
539
027140ea 540 q->hba_index = idx;
7365f6fd
JS
541 /* if the index wrapped around, toggle the valid bit */
542 if (phba->sli4_hba.pc_sli4_params.cqav && !q->hba_index)
543 q->qe_valid = (q->qe_valid) ? 0 : 1;
27f344eb
JS
544
545 /*
546 * insert barrier for instruction interlock : data from the hardware
547 * must have the valid bit checked before it can be copied and acted
2ea259ee
JS
548 * upon. Given what was seen in lpfc_sli4_cq_get() of speculative
549 * instructions allowing action on content before valid bit checked,
550 * add barrier here as well. May not be needed as "content" is a
551 * single 32-bit entity here (vs multi word structure for cq's).
27f344eb
JS
552 */
553 mb();
4f774513
JS
554 return cqe;
555}
556
557/**
558 * lpfc_sli4_cq_release - Indicates the host has finished processing a CQ
559 * @q: The Completion Queue that the host has completed processing for.
560 * @arm: Indicates whether the host wants to arms this CQ.
561 *
562 * This routine will mark all Completion queue entries on @q, from the last
563 * known completed entry to the last entry that was processed, as completed
564 * by clearing the valid bit for each completion queue entry. Then it will
565 * notify the HBA, by ringing the doorbell, that the CQEs have been processed.
566 * The internal host index in the @q will be updated by this routine to indicate
567 * that the host has finished processing the entries. The @arm parameter
568 * indicates that the queue should be rearmed when ringing the doorbell.
569 *
570 * This function will return the number of CQEs that were released.
571 **/
572uint32_t
573lpfc_sli4_cq_release(struct lpfc_queue *q, bool arm)
574{
575 uint32_t released = 0;
7365f6fd 576 struct lpfc_hba *phba;
4f774513
JS
577 struct lpfc_cqe *temp_qe;
578 struct lpfc_register doorbell;
579
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580 /* sanity check on queue memory */
581 if (unlikely(!q))
582 return 0;
7365f6fd
JS
583 phba = q->phba;
584
4f774513
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585 /* while there are valid entries */
586 while (q->hba_index != q->host_index) {
7365f6fd
JS
587 if (!phba->sli4_hba.pc_sli4_params.cqav) {
588 temp_qe = q->qe[q->host_index].cqe;
589 bf_set_le32(lpfc_cqe_valid, temp_qe, 0);
590 }
4f774513
JS
591 released++;
592 q->host_index = ((q->host_index + 1) % q->entry_count);
593 }
594 if (unlikely(released == 0 && !arm))
595 return 0;
596
597 /* ring doorbell for number popped */
598 doorbell.word0 = 0;
599 if (arm)
600 bf_set(lpfc_eqcq_doorbell_arm, &doorbell, 1);
601 bf_set(lpfc_eqcq_doorbell_num_released, &doorbell, released);
602 bf_set(lpfc_eqcq_doorbell_qt, &doorbell, LPFC_QUEUE_TYPE_COMPLETION);
6b5151fd
JS
603 bf_set(lpfc_eqcq_doorbell_cqid_hi, &doorbell,
604 (q->queue_id >> LPFC_CQID_HI_FIELD_SHIFT));
605 bf_set(lpfc_eqcq_doorbell_cqid_lo, &doorbell, q->queue_id);
9dd35425 606 writel(doorbell.word0, q->phba->sli4_hba.CQDBregaddr);
4f774513
JS
607 return released;
608}
609
27d6ac0a
JS
610/**
611 * lpfc_sli4_if6_cq_release - Indicates the host has finished processing a CQ
612 * @q: The Completion Queue that the host has completed processing for.
613 * @arm: Indicates whether the host wants to arms this CQ.
614 *
615 * This routine will mark all Completion queue entries on @q, from the last
616 * known completed entry to the last entry that was processed, as completed
617 * by clearing the valid bit for each completion queue entry. Then it will
618 * notify the HBA, by ringing the doorbell, that the CQEs have been processed.
619 * The internal host index in the @q will be updated by this routine to indicate
620 * that the host has finished processing the entries. The @arm parameter
621 * indicates that the queue should be rearmed when ringing the doorbell.
622 *
623 * This function will return the number of CQEs that were released.
624 **/
625uint32_t
626lpfc_sli4_if6_cq_release(struct lpfc_queue *q, bool arm)
627{
628 uint32_t released = 0;
7365f6fd 629 struct lpfc_hba *phba;
27d6ac0a
JS
630 struct lpfc_cqe *temp_qe;
631 struct lpfc_register doorbell;
632
633 /* sanity check on queue memory */
634 if (unlikely(!q))
635 return 0;
7365f6fd
JS
636 phba = q->phba;
637
27d6ac0a
JS
638 /* while there are valid entries */
639 while (q->hba_index != q->host_index) {
7365f6fd
JS
640 if (!phba->sli4_hba.pc_sli4_params.cqav) {
641 temp_qe = q->qe[q->host_index].cqe;
642 bf_set_le32(lpfc_cqe_valid, temp_qe, 0);
643 }
27d6ac0a
JS
644 released++;
645 q->host_index = ((q->host_index + 1) % q->entry_count);
646 }
647 if (unlikely(released == 0 && !arm))
648 return 0;
649
650 /* ring doorbell for number popped */
651 doorbell.word0 = 0;
652 if (arm)
653 bf_set(lpfc_if6_cq_doorbell_arm, &doorbell, 1);
654 bf_set(lpfc_if6_cq_doorbell_num_released, &doorbell, released);
655 bf_set(lpfc_if6_cq_doorbell_cqid, &doorbell, q->queue_id);
656 writel(doorbell.word0, q->phba->sli4_hba.CQDBregaddr);
657 return released;
658}
659
4f774513
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660/**
661 * lpfc_sli4_rq_put - Put a Receive Buffer Queue Entry on a Receive Queue
662 * @q: The Header Receive Queue to operate on.
663 * @wqe: The Receive Queue Entry to put on the Receive queue.
664 *
665 * This routine will copy the contents of @wqe to the next available entry on
666 * the @q. This function will then ring the Receive Queue Doorbell to signal the
667 * HBA to start processing the Receive Queue Entry. This function returns the
668 * index that the rqe was copied to if successful. If no entries are available
669 * on @q then this function will return -ENOMEM.
670 * The caller is expected to hold the hbalock when calling this routine.
671 **/
895427bd 672int
4f774513
JS
673lpfc_sli4_rq_put(struct lpfc_queue *hq, struct lpfc_queue *dq,
674 struct lpfc_rqe *hrqe, struct lpfc_rqe *drqe)
675{
2e90f4b5
JS
676 struct lpfc_rqe *temp_hrqe;
677 struct lpfc_rqe *temp_drqe;
4f774513 678 struct lpfc_register doorbell;
cbc5de1b
JS
679 int hq_put_index;
680 int dq_put_index;
4f774513 681
2e90f4b5
JS
682 /* sanity check on queue memory */
683 if (unlikely(!hq) || unlikely(!dq))
684 return -ENOMEM;
cbc5de1b
JS
685 hq_put_index = hq->host_index;
686 dq_put_index = dq->host_index;
687 temp_hrqe = hq->qe[hq_put_index].rqe;
688 temp_drqe = dq->qe[dq_put_index].rqe;
2e90f4b5 689
4f774513
JS
690 if (hq->type != LPFC_HRQ || dq->type != LPFC_DRQ)
691 return -EINVAL;
cbc5de1b 692 if (hq_put_index != dq_put_index)
4f774513
JS
693 return -EINVAL;
694 /* If the host has not yet processed the next entry then we are done */
cbc5de1b 695 if (((hq_put_index + 1) % hq->entry_count) == hq->hba_index)
4f774513 696 return -EBUSY;
48f8fdb4
JS
697 lpfc_sli4_pcimem_bcopy(hrqe, temp_hrqe, hq->entry_size);
698 lpfc_sli4_pcimem_bcopy(drqe, temp_drqe, dq->entry_size);
4f774513
JS
699
700 /* Update the host index to point to the next slot */
cbc5de1b
JS
701 hq->host_index = ((hq_put_index + 1) % hq->entry_count);
702 dq->host_index = ((dq_put_index + 1) % dq->entry_count);
61f3d4bf 703 hq->RQ_buf_posted++;
4f774513
JS
704
705 /* Ring The Header Receive Queue Doorbell */
73d91e50 706 if (!(hq->host_index % hq->entry_repost)) {
4f774513 707 doorbell.word0 = 0;
962bc51b
JS
708 if (hq->db_format == LPFC_DB_RING_FORMAT) {
709 bf_set(lpfc_rq_db_ring_fm_num_posted, &doorbell,
710 hq->entry_repost);
711 bf_set(lpfc_rq_db_ring_fm_id, &doorbell, hq->queue_id);
712 } else if (hq->db_format == LPFC_DB_LIST_FORMAT) {
713 bf_set(lpfc_rq_db_list_fm_num_posted, &doorbell,
714 hq->entry_repost);
715 bf_set(lpfc_rq_db_list_fm_index, &doorbell,
716 hq->host_index);
717 bf_set(lpfc_rq_db_list_fm_id, &doorbell, hq->queue_id);
718 } else {
719 return -EINVAL;
720 }
721 writel(doorbell.word0, hq->db_regaddr);
4f774513 722 }
cbc5de1b 723 return hq_put_index;
4f774513
JS
724}
725
726/**
727 * lpfc_sli4_rq_release - Updates internal hba index for RQ
728 * @q: The Header Receive Queue to operate on.
729 *
730 * This routine will update the HBA index of a queue to reflect consumption of
731 * one Receive Queue Entry by the HBA. When the HBA indicates that it has
732 * consumed an entry the host calls this function to update the queue's
733 * internal pointers. This routine returns the number of entries that were
734 * consumed by the HBA.
735 **/
736static uint32_t
737lpfc_sli4_rq_release(struct lpfc_queue *hq, struct lpfc_queue *dq)
738{
2e90f4b5
JS
739 /* sanity check on queue memory */
740 if (unlikely(!hq) || unlikely(!dq))
741 return 0;
742
4f774513
JS
743 if ((hq->type != LPFC_HRQ) || (dq->type != LPFC_DRQ))
744 return 0;
745 hq->hba_index = ((hq->hba_index + 1) % hq->entry_count);
746 dq->hba_index = ((dq->hba_index + 1) % dq->entry_count);
747 return 1;
748}
749
e59058c4 750/**
3621a710 751 * lpfc_cmd_iocb - Get next command iocb entry in the ring
e59058c4
JS
752 * @phba: Pointer to HBA context object.
753 * @pring: Pointer to driver SLI ring object.
754 *
755 * This function returns pointer to next command iocb entry
756 * in the command ring. The caller must hold hbalock to prevent
757 * other threads consume the next command iocb.
758 * SLI-2/SLI-3 provide different sized iocbs.
759 **/
ed957684
JS
760static inline IOCB_t *
761lpfc_cmd_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
762{
7e56aa25
JS
763 return (IOCB_t *) (((char *) pring->sli.sli3.cmdringaddr) +
764 pring->sli.sli3.cmdidx * phba->iocb_cmd_size);
ed957684
JS
765}
766
e59058c4 767/**
3621a710 768 * lpfc_resp_iocb - Get next response iocb entry in the ring
e59058c4
JS
769 * @phba: Pointer to HBA context object.
770 * @pring: Pointer to driver SLI ring object.
771 *
772 * This function returns pointer to next response iocb entry
773 * in the response ring. The caller must hold hbalock to make sure
774 * that no other thread consume the next response iocb.
775 * SLI-2/SLI-3 provide different sized iocbs.
776 **/
ed957684
JS
777static inline IOCB_t *
778lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
779{
7e56aa25
JS
780 return (IOCB_t *) (((char *) pring->sli.sli3.rspringaddr) +
781 pring->sli.sli3.rspidx * phba->iocb_rsp_size);
ed957684
JS
782}
783
e59058c4 784/**
3621a710 785 * __lpfc_sli_get_iocbq - Allocates an iocb object from iocb pool
e59058c4
JS
786 * @phba: Pointer to HBA context object.
787 *
788 * This function is called with hbalock held. This function
789 * allocates a new driver iocb object from the iocb pool. If the
790 * allocation is successful, it returns pointer to the newly
791 * allocated iocb object else it returns NULL.
792 **/
4f2e66c6 793struct lpfc_iocbq *
2e0fef85 794__lpfc_sli_get_iocbq(struct lpfc_hba *phba)
0bd4ca25
JSEC
795{
796 struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
797 struct lpfc_iocbq * iocbq = NULL;
798
1c2ba475
JT
799 lockdep_assert_held(&phba->hbalock);
800
0bd4ca25 801 list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
2a9bf3d0
JS
802 if (iocbq)
803 phba->iocb_cnt++;
804 if (phba->iocb_cnt > phba->iocb_max)
805 phba->iocb_max = phba->iocb_cnt;
0bd4ca25
JSEC
806 return iocbq;
807}
808
da0436e9
JS
809/**
810 * __lpfc_clear_active_sglq - Remove the active sglq for this XRI.
811 * @phba: Pointer to HBA context object.
812 * @xritag: XRI value.
813 *
814 * This function clears the sglq pointer from the array of acive
815 * sglq's. The xritag that is passed in is used to index into the
816 * array. Before the xritag can be used it needs to be adjusted
817 * by subtracting the xribase.
818 *
819 * Returns sglq ponter = success, NULL = Failure.
820 **/
895427bd 821struct lpfc_sglq *
da0436e9
JS
822__lpfc_clear_active_sglq(struct lpfc_hba *phba, uint16_t xritag)
823{
da0436e9 824 struct lpfc_sglq *sglq;
6d368e53
JS
825
826 sglq = phba->sli4_hba.lpfc_sglq_active_list[xritag];
827 phba->sli4_hba.lpfc_sglq_active_list[xritag] = NULL;
da0436e9
JS
828 return sglq;
829}
830
831/**
832 * __lpfc_get_active_sglq - Get the active sglq for this XRI.
833 * @phba: Pointer to HBA context object.
834 * @xritag: XRI value.
835 *
836 * This function returns the sglq pointer from the array of acive
837 * sglq's. The xritag that is passed in is used to index into the
838 * array. Before the xritag can be used it needs to be adjusted
839 * by subtracting the xribase.
840 *
841 * Returns sglq ponter = success, NULL = Failure.
842 **/
0f65ff68 843struct lpfc_sglq *
da0436e9
JS
844__lpfc_get_active_sglq(struct lpfc_hba *phba, uint16_t xritag)
845{
da0436e9 846 struct lpfc_sglq *sglq;
6d368e53
JS
847
848 sglq = phba->sli4_hba.lpfc_sglq_active_list[xritag];
da0436e9
JS
849 return sglq;
850}
851
19ca7609 852/**
1151e3ec 853 * lpfc_clr_rrq_active - Clears RRQ active bit in xri_bitmap.
19ca7609
JS
854 * @phba: Pointer to HBA context object.
855 * @xritag: xri used in this exchange.
856 * @rrq: The RRQ to be cleared.
857 *
19ca7609 858 **/
1151e3ec
JS
859void
860lpfc_clr_rrq_active(struct lpfc_hba *phba,
861 uint16_t xritag,
862 struct lpfc_node_rrq *rrq)
19ca7609 863{
1151e3ec 864 struct lpfc_nodelist *ndlp = NULL;
19ca7609 865
1151e3ec
JS
866 if ((rrq->vport) && NLP_CHK_NODE_ACT(rrq->ndlp))
867 ndlp = lpfc_findnode_did(rrq->vport, rrq->nlp_DID);
19ca7609
JS
868
869 /* The target DID could have been swapped (cable swap)
870 * we should use the ndlp from the findnode if it is
871 * available.
872 */
1151e3ec 873 if ((!ndlp) && rrq->ndlp)
19ca7609
JS
874 ndlp = rrq->ndlp;
875
1151e3ec
JS
876 if (!ndlp)
877 goto out;
878
cff261f6 879 if (test_and_clear_bit(xritag, ndlp->active_rrqs_xri_bitmap)) {
19ca7609
JS
880 rrq->send_rrq = 0;
881 rrq->xritag = 0;
882 rrq->rrq_stop_time = 0;
883 }
1151e3ec 884out:
19ca7609
JS
885 mempool_free(rrq, phba->rrq_pool);
886}
887
888/**
889 * lpfc_handle_rrq_active - Checks if RRQ has waithed RATOV.
890 * @phba: Pointer to HBA context object.
891 *
892 * This function is called with hbalock held. This function
893 * Checks if stop_time (ratov from setting rrq active) has
894 * been reached, if it has and the send_rrq flag is set then
895 * it will call lpfc_send_rrq. If the send_rrq flag is not set
896 * then it will just call the routine to clear the rrq and
897 * free the rrq resource.
898 * The timer is set to the next rrq that is going to expire before
899 * leaving the routine.
900 *
901 **/
902void
903lpfc_handle_rrq_active(struct lpfc_hba *phba)
904{
905 struct lpfc_node_rrq *rrq;
906 struct lpfc_node_rrq *nextrrq;
907 unsigned long next_time;
908 unsigned long iflags;
1151e3ec 909 LIST_HEAD(send_rrq);
19ca7609
JS
910
911 spin_lock_irqsave(&phba->hbalock, iflags);
912 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
256ec0d0 913 next_time = jiffies + msecs_to_jiffies(1000 * (phba->fc_ratov + 1));
19ca7609 914 list_for_each_entry_safe(rrq, nextrrq,
1151e3ec
JS
915 &phba->active_rrq_list, list) {
916 if (time_after(jiffies, rrq->rrq_stop_time))
917 list_move(&rrq->list, &send_rrq);
918 else if (time_before(rrq->rrq_stop_time, next_time))
19ca7609
JS
919 next_time = rrq->rrq_stop_time;
920 }
921 spin_unlock_irqrestore(&phba->hbalock, iflags);
06918ac5
JS
922 if ((!list_empty(&phba->active_rrq_list)) &&
923 (!(phba->pport->load_flag & FC_UNLOADING)))
19ca7609 924 mod_timer(&phba->rrq_tmr, next_time);
1151e3ec
JS
925 list_for_each_entry_safe(rrq, nextrrq, &send_rrq, list) {
926 list_del(&rrq->list);
927 if (!rrq->send_rrq)
928 /* this call will free the rrq */
929 lpfc_clr_rrq_active(phba, rrq->xritag, rrq);
930 else if (lpfc_send_rrq(phba, rrq)) {
931 /* if we send the rrq then the completion handler
932 * will clear the bit in the xribitmap.
933 */
934 lpfc_clr_rrq_active(phba, rrq->xritag,
935 rrq);
936 }
937 }
19ca7609
JS
938}
939
940/**
941 * lpfc_get_active_rrq - Get the active RRQ for this exchange.
942 * @vport: Pointer to vport context object.
943 * @xri: The xri used in the exchange.
944 * @did: The targets DID for this exchange.
945 *
946 * returns NULL = rrq not found in the phba->active_rrq_list.
947 * rrq = rrq for this xri and target.
948 **/
949struct lpfc_node_rrq *
950lpfc_get_active_rrq(struct lpfc_vport *vport, uint16_t xri, uint32_t did)
951{
952 struct lpfc_hba *phba = vport->phba;
953 struct lpfc_node_rrq *rrq;
954 struct lpfc_node_rrq *nextrrq;
955 unsigned long iflags;
956
957 if (phba->sli_rev != LPFC_SLI_REV4)
958 return NULL;
959 spin_lock_irqsave(&phba->hbalock, iflags);
960 list_for_each_entry_safe(rrq, nextrrq, &phba->active_rrq_list, list) {
961 if (rrq->vport == vport && rrq->xritag == xri &&
962 rrq->nlp_DID == did){
963 list_del(&rrq->list);
964 spin_unlock_irqrestore(&phba->hbalock, iflags);
965 return rrq;
966 }
967 }
968 spin_unlock_irqrestore(&phba->hbalock, iflags);
969 return NULL;
970}
971
972/**
973 * lpfc_cleanup_vports_rrqs - Remove and clear the active RRQ for this vport.
974 * @vport: Pointer to vport context object.
1151e3ec
JS
975 * @ndlp: Pointer to the lpfc_node_list structure.
976 * If ndlp is NULL Remove all active RRQs for this vport from the
977 * phba->active_rrq_list and clear the rrq.
978 * If ndlp is not NULL then only remove rrqs for this vport & this ndlp.
19ca7609
JS
979 **/
980void
1151e3ec 981lpfc_cleanup_vports_rrqs(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp)
19ca7609
JS
982
983{
984 struct lpfc_hba *phba = vport->phba;
985 struct lpfc_node_rrq *rrq;
986 struct lpfc_node_rrq *nextrrq;
987 unsigned long iflags;
1151e3ec 988 LIST_HEAD(rrq_list);
19ca7609
JS
989
990 if (phba->sli_rev != LPFC_SLI_REV4)
991 return;
1151e3ec
JS
992 if (!ndlp) {
993 lpfc_sli4_vport_delete_els_xri_aborted(vport);
994 lpfc_sli4_vport_delete_fcp_xri_aborted(vport);
19ca7609 995 }
1151e3ec
JS
996 spin_lock_irqsave(&phba->hbalock, iflags);
997 list_for_each_entry_safe(rrq, nextrrq, &phba->active_rrq_list, list)
998 if ((rrq->vport == vport) && (!ndlp || rrq->ndlp == ndlp))
999 list_move(&rrq->list, &rrq_list);
19ca7609 1000 spin_unlock_irqrestore(&phba->hbalock, iflags);
1151e3ec
JS
1001
1002 list_for_each_entry_safe(rrq, nextrrq, &rrq_list, list) {
1003 list_del(&rrq->list);
1004 lpfc_clr_rrq_active(phba, rrq->xritag, rrq);
1005 }
19ca7609
JS
1006}
1007
19ca7609 1008/**
1151e3ec 1009 * lpfc_test_rrq_active - Test RRQ bit in xri_bitmap.
19ca7609
JS
1010 * @phba: Pointer to HBA context object.
1011 * @ndlp: Targets nodelist pointer for this exchange.
1012 * @xritag the xri in the bitmap to test.
1013 *
1014 * This function is called with hbalock held. This function
1015 * returns 0 = rrq not active for this xri
1016 * 1 = rrq is valid for this xri.
1017 **/
1151e3ec
JS
1018int
1019lpfc_test_rrq_active(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp,
19ca7609
JS
1020 uint16_t xritag)
1021{
1c2ba475 1022 lockdep_assert_held(&phba->hbalock);
19ca7609
JS
1023 if (!ndlp)
1024 return 0;
cff261f6
JS
1025 if (!ndlp->active_rrqs_xri_bitmap)
1026 return 0;
1027 if (test_bit(xritag, ndlp->active_rrqs_xri_bitmap))
19ca7609
JS
1028 return 1;
1029 else
1030 return 0;
1031}
1032
1033/**
1034 * lpfc_set_rrq_active - set RRQ active bit in xri_bitmap.
1035 * @phba: Pointer to HBA context object.
1036 * @ndlp: nodelist pointer for this target.
1037 * @xritag: xri used in this exchange.
1038 * @rxid: Remote Exchange ID.
1039 * @send_rrq: Flag used to determine if we should send rrq els cmd.
1040 *
1041 * This function takes the hbalock.
1042 * The active bit is always set in the active rrq xri_bitmap even
1043 * if there is no slot avaiable for the other rrq information.
1044 *
1045 * returns 0 rrq actived for this xri
1046 * < 0 No memory or invalid ndlp.
1047 **/
1048int
1049lpfc_set_rrq_active(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp,
b42c07c8 1050 uint16_t xritag, uint16_t rxid, uint16_t send_rrq)
19ca7609 1051{
19ca7609 1052 unsigned long iflags;
b42c07c8
JS
1053 struct lpfc_node_rrq *rrq;
1054 int empty;
1055
1056 if (!ndlp)
1057 return -EINVAL;
1058
1059 if (!phba->cfg_enable_rrq)
1060 return -EINVAL;
19ca7609
JS
1061
1062 spin_lock_irqsave(&phba->hbalock, iflags);
b42c07c8
JS
1063 if (phba->pport->load_flag & FC_UNLOADING) {
1064 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
1065 goto out;
1066 }
1067
1068 /*
1069 * set the active bit even if there is no mem available.
1070 */
1071 if (NLP_CHK_FREE_REQ(ndlp))
1072 goto out;
1073
1074 if (ndlp->vport && (ndlp->vport->load_flag & FC_UNLOADING))
1075 goto out;
1076
cff261f6
JS
1077 if (!ndlp->active_rrqs_xri_bitmap)
1078 goto out;
1079
1080 if (test_and_set_bit(xritag, ndlp->active_rrqs_xri_bitmap))
b42c07c8
JS
1081 goto out;
1082
19ca7609 1083 spin_unlock_irqrestore(&phba->hbalock, iflags);
b42c07c8
JS
1084 rrq = mempool_alloc(phba->rrq_pool, GFP_KERNEL);
1085 if (!rrq) {
1086 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
1087 "3155 Unable to allocate RRQ xri:0x%x rxid:0x%x"
1088 " DID:0x%x Send:%d\n",
1089 xritag, rxid, ndlp->nlp_DID, send_rrq);
1090 return -EINVAL;
1091 }
e5771b4d
JS
1092 if (phba->cfg_enable_rrq == 1)
1093 rrq->send_rrq = send_rrq;
1094 else
1095 rrq->send_rrq = 0;
b42c07c8 1096 rrq->xritag = xritag;
256ec0d0
JS
1097 rrq->rrq_stop_time = jiffies +
1098 msecs_to_jiffies(1000 * (phba->fc_ratov + 1));
b42c07c8
JS
1099 rrq->ndlp = ndlp;
1100 rrq->nlp_DID = ndlp->nlp_DID;
1101 rrq->vport = ndlp->vport;
1102 rrq->rxid = rxid;
b42c07c8
JS
1103 spin_lock_irqsave(&phba->hbalock, iflags);
1104 empty = list_empty(&phba->active_rrq_list);
1105 list_add_tail(&rrq->list, &phba->active_rrq_list);
1106 phba->hba_flag |= HBA_RRQ_ACTIVE;
1107 if (empty)
1108 lpfc_worker_wake_up(phba);
1109 spin_unlock_irqrestore(&phba->hbalock, iflags);
1110 return 0;
1111out:
1112 spin_unlock_irqrestore(&phba->hbalock, iflags);
1113 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
1114 "2921 Can't set rrq active xri:0x%x rxid:0x%x"
1115 " DID:0x%x Send:%d\n",
1116 xritag, rxid, ndlp->nlp_DID, send_rrq);
1117 return -EINVAL;
19ca7609
JS
1118}
1119
da0436e9 1120/**
895427bd 1121 * __lpfc_sli_get_els_sglq - Allocates an iocb object from sgl pool
da0436e9 1122 * @phba: Pointer to HBA context object.
19ca7609 1123 * @piocb: Pointer to the iocbq.
da0436e9 1124 *
dafe8cea 1125 * This function is called with the ring lock held. This function
6d368e53 1126 * gets a new driver sglq object from the sglq list. If the
da0436e9
JS
1127 * list is not empty then it is successful, it returns pointer to the newly
1128 * allocated sglq object else it returns NULL.
1129 **/
1130static struct lpfc_sglq *
895427bd 1131__lpfc_sli_get_els_sglq(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq)
da0436e9 1132{
895427bd 1133 struct list_head *lpfc_els_sgl_list = &phba->sli4_hba.lpfc_els_sgl_list;
da0436e9 1134 struct lpfc_sglq *sglq = NULL;
19ca7609 1135 struct lpfc_sglq *start_sglq = NULL;
c490850a 1136 struct lpfc_io_buf *lpfc_cmd;
19ca7609
JS
1137 struct lpfc_nodelist *ndlp;
1138 int found = 0;
1139
1c2ba475
JT
1140 lockdep_assert_held(&phba->hbalock);
1141
19ca7609 1142 if (piocbq->iocb_flag & LPFC_IO_FCP) {
c490850a 1143 lpfc_cmd = (struct lpfc_io_buf *) piocbq->context1;
19ca7609 1144 ndlp = lpfc_cmd->rdata->pnode;
be858b65 1145 } else if ((piocbq->iocb.ulpCommand == CMD_GEN_REQUEST64_CR) &&
6c7cf486 1146 !(piocbq->iocb_flag & LPFC_IO_LIBDFC)) {
19ca7609 1147 ndlp = piocbq->context_un.ndlp;
6c7cf486
JS
1148 } else if (piocbq->iocb_flag & LPFC_IO_LIBDFC) {
1149 if (piocbq->iocb_flag & LPFC_IO_LOOPBACK)
1150 ndlp = NULL;
1151 else
1152 ndlp = piocbq->context_un.ndlp;
1153 } else {
19ca7609 1154 ndlp = piocbq->context1;
6c7cf486 1155 }
19ca7609 1156
895427bd
JS
1157 spin_lock(&phba->sli4_hba.sgl_list_lock);
1158 list_remove_head(lpfc_els_sgl_list, sglq, struct lpfc_sglq, list);
19ca7609
JS
1159 start_sglq = sglq;
1160 while (!found) {
1161 if (!sglq)
d11f54b7 1162 break;
895427bd
JS
1163 if (ndlp && ndlp->active_rrqs_xri_bitmap &&
1164 test_bit(sglq->sli4_lxritag,
1165 ndlp->active_rrqs_xri_bitmap)) {
19ca7609
JS
1166 /* This xri has an rrq outstanding for this DID.
1167 * put it back in the list and get another xri.
1168 */
895427bd 1169 list_add_tail(&sglq->list, lpfc_els_sgl_list);
19ca7609 1170 sglq = NULL;
895427bd 1171 list_remove_head(lpfc_els_sgl_list, sglq,
19ca7609
JS
1172 struct lpfc_sglq, list);
1173 if (sglq == start_sglq) {
14041bd1 1174 list_add_tail(&sglq->list, lpfc_els_sgl_list);
19ca7609
JS
1175 sglq = NULL;
1176 break;
1177 } else
1178 continue;
1179 }
1180 sglq->ndlp = ndlp;
1181 found = 1;
6d368e53 1182 phba->sli4_hba.lpfc_sglq_active_list[sglq->sli4_lxritag] = sglq;
19ca7609
JS
1183 sglq->state = SGL_ALLOCATED;
1184 }
895427bd 1185 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9
JS
1186 return sglq;
1187}
1188
f358dd0c
JS
1189/**
1190 * __lpfc_sli_get_nvmet_sglq - Allocates an iocb object from sgl pool
1191 * @phba: Pointer to HBA context object.
1192 * @piocb: Pointer to the iocbq.
1193 *
1194 * This function is called with the sgl_list lock held. This function
1195 * gets a new driver sglq object from the sglq list. If the
1196 * list is not empty then it is successful, it returns pointer to the newly
1197 * allocated sglq object else it returns NULL.
1198 **/
1199struct lpfc_sglq *
1200__lpfc_sli_get_nvmet_sglq(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq)
1201{
1202 struct list_head *lpfc_nvmet_sgl_list;
1203 struct lpfc_sglq *sglq = NULL;
1204
1205 lpfc_nvmet_sgl_list = &phba->sli4_hba.lpfc_nvmet_sgl_list;
1206
1207 lockdep_assert_held(&phba->sli4_hba.sgl_list_lock);
1208
1209 list_remove_head(lpfc_nvmet_sgl_list, sglq, struct lpfc_sglq, list);
1210 if (!sglq)
1211 return NULL;
1212 phba->sli4_hba.lpfc_sglq_active_list[sglq->sli4_lxritag] = sglq;
1213 sglq->state = SGL_ALLOCATED;
da0436e9
JS
1214 return sglq;
1215}
1216
e59058c4 1217/**
3621a710 1218 * lpfc_sli_get_iocbq - Allocates an iocb object from iocb pool
e59058c4
JS
1219 * @phba: Pointer to HBA context object.
1220 *
1221 * This function is called with no lock held. This function
1222 * allocates a new driver iocb object from the iocb pool. If the
1223 * allocation is successful, it returns pointer to the newly
1224 * allocated iocb object else it returns NULL.
1225 **/
2e0fef85
JS
1226struct lpfc_iocbq *
1227lpfc_sli_get_iocbq(struct lpfc_hba *phba)
1228{
1229 struct lpfc_iocbq * iocbq = NULL;
1230 unsigned long iflags;
1231
1232 spin_lock_irqsave(&phba->hbalock, iflags);
1233 iocbq = __lpfc_sli_get_iocbq(phba);
1234 spin_unlock_irqrestore(&phba->hbalock, iflags);
1235 return iocbq;
1236}
1237
4f774513
JS
1238/**
1239 * __lpfc_sli_release_iocbq_s4 - Release iocb to the iocb pool
1240 * @phba: Pointer to HBA context object.
1241 * @iocbq: Pointer to driver iocb object.
1242 *
1243 * This function is called with hbalock held to release driver
1244 * iocb object to the iocb pool. The iotag in the iocb object
1245 * does not change for each use of the iocb object. This function
1246 * clears all other fields of the iocb object when it is freed.
1247 * The sqlq structure that holds the xritag and phys and virtual
1248 * mappings for the scatter gather list is retrieved from the
1249 * active array of sglq. The get of the sglq pointer also clears
1250 * the entry in the array. If the status of the IO indiactes that
1251 * this IO was aborted then the sglq entry it put on the
1252 * lpfc_abts_els_sgl_list until the CQ_ABORTED_XRI is received. If the
1253 * IO has good status or fails for any other reason then the sglq
895427bd 1254 * entry is added to the free list (lpfc_els_sgl_list).
4f774513
JS
1255 **/
1256static void
1257__lpfc_sli_release_iocbq_s4(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1258{
1259 struct lpfc_sglq *sglq;
1260 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
2a9bf3d0 1261 unsigned long iflag = 0;
895427bd 1262 struct lpfc_sli_ring *pring;
4f774513 1263
1c2ba475
JT
1264 lockdep_assert_held(&phba->hbalock);
1265
4f774513
JS
1266 if (iocbq->sli4_xritag == NO_XRI)
1267 sglq = NULL;
1268 else
6d368e53
JS
1269 sglq = __lpfc_clear_active_sglq(phba, iocbq->sli4_lxritag);
1270
0e9bb8d7 1271
4f774513 1272 if (sglq) {
f358dd0c
JS
1273 if (iocbq->iocb_flag & LPFC_IO_NVMET) {
1274 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1275 iflag);
1276 sglq->state = SGL_FREED;
1277 sglq->ndlp = NULL;
1278 list_add_tail(&sglq->list,
1279 &phba->sli4_hba.lpfc_nvmet_sgl_list);
1280 spin_unlock_irqrestore(
1281 &phba->sli4_hba.sgl_list_lock, iflag);
1282 goto out;
1283 }
1284
895427bd 1285 pring = phba->sli4_hba.els_wq->pring;
0f65ff68
JS
1286 if ((iocbq->iocb_flag & LPFC_EXCHANGE_BUSY) &&
1287 (sglq->state != SGL_XRI_ABORTED)) {
895427bd
JS
1288 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1289 iflag);
4f774513 1290 list_add(&sglq->list,
895427bd 1291 &phba->sli4_hba.lpfc_abts_els_sgl_list);
4f774513 1292 spin_unlock_irqrestore(
895427bd 1293 &phba->sli4_hba.sgl_list_lock, iflag);
0f65ff68 1294 } else {
895427bd
JS
1295 spin_lock_irqsave(&phba->sli4_hba.sgl_list_lock,
1296 iflag);
0f65ff68 1297 sglq->state = SGL_FREED;
19ca7609 1298 sglq->ndlp = NULL;
fedd3b7b 1299 list_add_tail(&sglq->list,
895427bd
JS
1300 &phba->sli4_hba.lpfc_els_sgl_list);
1301 spin_unlock_irqrestore(
1302 &phba->sli4_hba.sgl_list_lock, iflag);
2a9bf3d0
JS
1303
1304 /* Check if TXQ queue needs to be serviced */
0e9bb8d7 1305 if (!list_empty(&pring->txq))
2a9bf3d0 1306 lpfc_worker_wake_up(phba);
0f65ff68 1307 }
4f774513
JS
1308 }
1309
f358dd0c 1310out:
4f774513
JS
1311 /*
1312 * Clean all volatile data fields, preserve iotag and node struct.
1313 */
1314 memset((char *)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
6d368e53 1315 iocbq->sli4_lxritag = NO_XRI;
4f774513 1316 iocbq->sli4_xritag = NO_XRI;
f358dd0c
JS
1317 iocbq->iocb_flag &= ~(LPFC_IO_NVME | LPFC_IO_NVMET |
1318 LPFC_IO_NVME_LS);
4f774513
JS
1319 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
1320}
1321
2a9bf3d0 1322
e59058c4 1323/**
3772a991 1324 * __lpfc_sli_release_iocbq_s3 - Release iocb to the iocb pool
e59058c4
JS
1325 * @phba: Pointer to HBA context object.
1326 * @iocbq: Pointer to driver iocb object.
1327 *
1328 * This function is called with hbalock held to release driver
1329 * iocb object to the iocb pool. The iotag in the iocb object
1330 * does not change for each use of the iocb object. This function
1331 * clears all other fields of the iocb object when it is freed.
1332 **/
a6ababd2 1333static void
3772a991 1334__lpfc_sli_release_iocbq_s3(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
604a3e30 1335{
2e0fef85 1336 size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
604a3e30 1337
1c2ba475 1338 lockdep_assert_held(&phba->hbalock);
0e9bb8d7 1339
604a3e30
JB
1340 /*
1341 * Clean all volatile data fields, preserve iotag and node struct.
1342 */
1343 memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
3772a991 1344 iocbq->sli4_xritag = NO_XRI;
604a3e30
JB
1345 list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
1346}
1347
3772a991
JS
1348/**
1349 * __lpfc_sli_release_iocbq - Release iocb to the iocb pool
1350 * @phba: Pointer to HBA context object.
1351 * @iocbq: Pointer to driver iocb object.
1352 *
1353 * This function is called with hbalock held to release driver
1354 * iocb object to the iocb pool. The iotag in the iocb object
1355 * does not change for each use of the iocb object. This function
1356 * clears all other fields of the iocb object when it is freed.
1357 **/
1358static void
1359__lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1360{
1c2ba475
JT
1361 lockdep_assert_held(&phba->hbalock);
1362
3772a991 1363 phba->__lpfc_sli_release_iocbq(phba, iocbq);
2a9bf3d0 1364 phba->iocb_cnt--;
3772a991
JS
1365}
1366
e59058c4 1367/**
3621a710 1368 * lpfc_sli_release_iocbq - Release iocb to the iocb pool
e59058c4
JS
1369 * @phba: Pointer to HBA context object.
1370 * @iocbq: Pointer to driver iocb object.
1371 *
1372 * This function is called with no lock held to release the iocb to
1373 * iocb pool.
1374 **/
2e0fef85
JS
1375void
1376lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1377{
1378 unsigned long iflags;
1379
1380 /*
1381 * Clean all volatile data fields, preserve iotag and node struct.
1382 */
1383 spin_lock_irqsave(&phba->hbalock, iflags);
1384 __lpfc_sli_release_iocbq(phba, iocbq);
1385 spin_unlock_irqrestore(&phba->hbalock, iflags);
1386}
1387
a257bf90
JS
1388/**
1389 * lpfc_sli_cancel_iocbs - Cancel all iocbs from a list.
1390 * @phba: Pointer to HBA context object.
1391 * @iocblist: List of IOCBs.
1392 * @ulpstatus: ULP status in IOCB command field.
1393 * @ulpWord4: ULP word-4 in IOCB command field.
1394 *
1395 * This function is called with a list of IOCBs to cancel. It cancels the IOCB
1396 * on the list by invoking the complete callback function associated with the
1397 * IOCB with the provided @ulpstatus and @ulpword4 set to the IOCB commond
1398 * fields.
1399 **/
1400void
1401lpfc_sli_cancel_iocbs(struct lpfc_hba *phba, struct list_head *iocblist,
1402 uint32_t ulpstatus, uint32_t ulpWord4)
1403{
1404 struct lpfc_iocbq *piocb;
1405
1406 while (!list_empty(iocblist)) {
1407 list_remove_head(iocblist, piocb, struct lpfc_iocbq, list);
a257bf90
JS
1408 if (!piocb->iocb_cmpl)
1409 lpfc_sli_release_iocbq(phba, piocb);
1410 else {
1411 piocb->iocb.ulpStatus = ulpstatus;
1412 piocb->iocb.un.ulpWord[4] = ulpWord4;
1413 (piocb->iocb_cmpl) (phba, piocb, piocb);
1414 }
1415 }
1416 return;
1417}
1418
e59058c4 1419/**
3621a710
JS
1420 * lpfc_sli_iocb_cmd_type - Get the iocb type
1421 * @iocb_cmnd: iocb command code.
e59058c4
JS
1422 *
1423 * This function is called by ring event handler function to get the iocb type.
1424 * This function translates the iocb command to an iocb command type used to
1425 * decide the final disposition of each completed IOCB.
1426 * The function returns
1427 * LPFC_UNKNOWN_IOCB if it is an unsupported iocb
1428 * LPFC_SOL_IOCB if it is a solicited iocb completion
1429 * LPFC_ABORT_IOCB if it is an abort iocb
1430 * LPFC_UNSOL_IOCB if it is an unsolicited iocb
1431 *
1432 * The caller is not required to hold any lock.
1433 **/
dea3101e 1434static lpfc_iocb_type
1435lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
1436{
1437 lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
1438
1439 if (iocb_cmnd > CMD_MAX_IOCB_CMD)
1440 return 0;
1441
1442 switch (iocb_cmnd) {
1443 case CMD_XMIT_SEQUENCE_CR:
1444 case CMD_XMIT_SEQUENCE_CX:
1445 case CMD_XMIT_BCAST_CN:
1446 case CMD_XMIT_BCAST_CX:
1447 case CMD_ELS_REQUEST_CR:
1448 case CMD_ELS_REQUEST_CX:
1449 case CMD_CREATE_XRI_CR:
1450 case CMD_CREATE_XRI_CX:
1451 case CMD_GET_RPI_CN:
1452 case CMD_XMIT_ELS_RSP_CX:
1453 case CMD_GET_RPI_CR:
1454 case CMD_FCP_IWRITE_CR:
1455 case CMD_FCP_IWRITE_CX:
1456 case CMD_FCP_IREAD_CR:
1457 case CMD_FCP_IREAD_CX:
1458 case CMD_FCP_ICMND_CR:
1459 case CMD_FCP_ICMND_CX:
f5603511
JS
1460 case CMD_FCP_TSEND_CX:
1461 case CMD_FCP_TRSP_CX:
1462 case CMD_FCP_TRECEIVE_CX:
1463 case CMD_FCP_AUTO_TRSP_CX:
dea3101e 1464 case CMD_ADAPTER_MSG:
1465 case CMD_ADAPTER_DUMP:
1466 case CMD_XMIT_SEQUENCE64_CR:
1467 case CMD_XMIT_SEQUENCE64_CX:
1468 case CMD_XMIT_BCAST64_CN:
1469 case CMD_XMIT_BCAST64_CX:
1470 case CMD_ELS_REQUEST64_CR:
1471 case CMD_ELS_REQUEST64_CX:
1472 case CMD_FCP_IWRITE64_CR:
1473 case CMD_FCP_IWRITE64_CX:
1474 case CMD_FCP_IREAD64_CR:
1475 case CMD_FCP_IREAD64_CX:
1476 case CMD_FCP_ICMND64_CR:
1477 case CMD_FCP_ICMND64_CX:
f5603511
JS
1478 case CMD_FCP_TSEND64_CX:
1479 case CMD_FCP_TRSP64_CX:
1480 case CMD_FCP_TRECEIVE64_CX:
dea3101e 1481 case CMD_GEN_REQUEST64_CR:
1482 case CMD_GEN_REQUEST64_CX:
1483 case CMD_XMIT_ELS_RSP64_CX:
da0436e9
JS
1484 case DSSCMD_IWRITE64_CR:
1485 case DSSCMD_IWRITE64_CX:
1486 case DSSCMD_IREAD64_CR:
1487 case DSSCMD_IREAD64_CX:
dea3101e 1488 type = LPFC_SOL_IOCB;
1489 break;
1490 case CMD_ABORT_XRI_CN:
1491 case CMD_ABORT_XRI_CX:
1492 case CMD_CLOSE_XRI_CN:
1493 case CMD_CLOSE_XRI_CX:
1494 case CMD_XRI_ABORTED_CX:
1495 case CMD_ABORT_MXRI64_CN:
6669f9bb 1496 case CMD_XMIT_BLS_RSP64_CX:
dea3101e 1497 type = LPFC_ABORT_IOCB;
1498 break;
1499 case CMD_RCV_SEQUENCE_CX:
1500 case CMD_RCV_ELS_REQ_CX:
1501 case CMD_RCV_SEQUENCE64_CX:
1502 case CMD_RCV_ELS_REQ64_CX:
57127f15 1503 case CMD_ASYNC_STATUS:
ed957684
JS
1504 case CMD_IOCB_RCV_SEQ64_CX:
1505 case CMD_IOCB_RCV_ELS64_CX:
1506 case CMD_IOCB_RCV_CONT64_CX:
3163f725 1507 case CMD_IOCB_RET_XRI64_CX:
dea3101e 1508 type = LPFC_UNSOL_IOCB;
1509 break;
3163f725
JS
1510 case CMD_IOCB_XMIT_MSEQ64_CR:
1511 case CMD_IOCB_XMIT_MSEQ64_CX:
1512 case CMD_IOCB_RCV_SEQ_LIST64_CX:
1513 case CMD_IOCB_RCV_ELS_LIST64_CX:
1514 case CMD_IOCB_CLOSE_EXTENDED_CN:
1515 case CMD_IOCB_ABORT_EXTENDED_CN:
1516 case CMD_IOCB_RET_HBQE64_CN:
1517 case CMD_IOCB_FCP_IBIDIR64_CR:
1518 case CMD_IOCB_FCP_IBIDIR64_CX:
1519 case CMD_IOCB_FCP_ITASKMGT64_CX:
1520 case CMD_IOCB_LOGENTRY_CN:
1521 case CMD_IOCB_LOGENTRY_ASYNC_CN:
1522 printk("%s - Unhandled SLI-3 Command x%x\n",
cadbd4a5 1523 __func__, iocb_cmnd);
3163f725
JS
1524 type = LPFC_UNKNOWN_IOCB;
1525 break;
dea3101e 1526 default:
1527 type = LPFC_UNKNOWN_IOCB;
1528 break;
1529 }
1530
1531 return type;
1532}
1533
e59058c4 1534/**
3621a710 1535 * lpfc_sli_ring_map - Issue config_ring mbox for all rings
e59058c4
JS
1536 * @phba: Pointer to HBA context object.
1537 *
1538 * This function is called from SLI initialization code
1539 * to configure every ring of the HBA's SLI interface. The
1540 * caller is not required to hold any lock. This function issues
1541 * a config_ring mailbox command for each ring.
1542 * This function returns zero if successful else returns a negative
1543 * error code.
1544 **/
dea3101e 1545static int
ed957684 1546lpfc_sli_ring_map(struct lpfc_hba *phba)
dea3101e 1547{
1548 struct lpfc_sli *psli = &phba->sli;
ed957684
JS
1549 LPFC_MBOXQ_t *pmb;
1550 MAILBOX_t *pmbox;
1551 int i, rc, ret = 0;
dea3101e 1552
ed957684
JS
1553 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1554 if (!pmb)
1555 return -ENOMEM;
04c68496 1556 pmbox = &pmb->u.mb;
ed957684 1557 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 1558 for (i = 0; i < psli->num_rings; i++) {
dea3101e 1559 lpfc_config_ring(phba, i, pmb);
1560 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
1561 if (rc != MBX_SUCCESS) {
92d7f7b0 1562 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 1563 "0446 Adapter failed to init (%d), "
dea3101e 1564 "mbxCmd x%x CFG_RING, mbxStatus x%x, "
1565 "ring %d\n",
e8b62011
JS
1566 rc, pmbox->mbxCommand,
1567 pmbox->mbxStatus, i);
2e0fef85 1568 phba->link_state = LPFC_HBA_ERROR;
ed957684
JS
1569 ret = -ENXIO;
1570 break;
dea3101e 1571 }
1572 }
ed957684
JS
1573 mempool_free(pmb, phba->mbox_mem_pool);
1574 return ret;
dea3101e 1575}
1576
e59058c4 1577/**
3621a710 1578 * lpfc_sli_ringtxcmpl_put - Adds new iocb to the txcmplq
e59058c4
JS
1579 * @phba: Pointer to HBA context object.
1580 * @pring: Pointer to driver SLI ring object.
1581 * @piocb: Pointer to the driver iocb object.
1582 *
1583 * This function is called with hbalock held. The function adds the
1584 * new iocb to txcmplq of the given ring. This function always returns
1585 * 0. If this function is called for ELS ring, this function checks if
1586 * there is a vport associated with the ELS command. This function also
1587 * starts els_tmofunc timer if this is an ELS command.
1588 **/
dea3101e 1589static int
2e0fef85
JS
1590lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
1591 struct lpfc_iocbq *piocb)
dea3101e 1592{
1c2ba475
JT
1593 lockdep_assert_held(&phba->hbalock);
1594
2319f847 1595 BUG_ON(!piocb);
22466da5 1596
dea3101e 1597 list_add_tail(&piocb->list, &pring->txcmplq);
4f2e66c6 1598 piocb->iocb_flag |= LPFC_IO_ON_TXCMPLQ;
c490850a 1599 pring->txcmplq_cnt++;
2a9bf3d0 1600
92d7f7b0
JS
1601 if ((unlikely(pring->ringno == LPFC_ELS_RING)) &&
1602 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
2319f847
MFO
1603 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
1604 BUG_ON(!piocb->vport);
1605 if (!(piocb->vport->load_flag & FC_UNLOADING))
1606 mod_timer(&piocb->vport->els_tmofunc,
1607 jiffies +
1608 msecs_to_jiffies(1000 * (phba->fc_ratov << 1)));
1609 }
dea3101e 1610
2e0fef85 1611 return 0;
dea3101e 1612}
1613
e59058c4 1614/**
3621a710 1615 * lpfc_sli_ringtx_get - Get first element of the txq
e59058c4
JS
1616 * @phba: Pointer to HBA context object.
1617 * @pring: Pointer to driver SLI ring object.
1618 *
1619 * This function is called with hbalock held to get next
1620 * iocb in txq of the given ring. If there is any iocb in
1621 * the txq, the function returns first iocb in the list after
1622 * removing the iocb from the list, else it returns NULL.
1623 **/
2a9bf3d0 1624struct lpfc_iocbq *
2e0fef85 1625lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 1626{
dea3101e 1627 struct lpfc_iocbq *cmd_iocb;
1628
1c2ba475
JT
1629 lockdep_assert_held(&phba->hbalock);
1630
858c9f6c 1631 list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
2e0fef85 1632 return cmd_iocb;
dea3101e 1633}
1634
e59058c4 1635/**
3621a710 1636 * lpfc_sli_next_iocb_slot - Get next iocb slot in the ring
e59058c4
JS
1637 * @phba: Pointer to HBA context object.
1638 * @pring: Pointer to driver SLI ring object.
1639 *
1640 * This function is called with hbalock held and the caller must post the
1641 * iocb without releasing the lock. If the caller releases the lock,
1642 * iocb slot returned by the function is not guaranteed to be available.
1643 * The function returns pointer to the next available iocb slot if there
1644 * is available slot in the ring, else it returns NULL.
1645 * If the get index of the ring is ahead of the put index, the function
1646 * will post an error attention event to the worker thread to take the
1647 * HBA to offline state.
1648 **/
dea3101e 1649static IOCB_t *
1650lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
1651{
34b02dcd 1652 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
7e56aa25 1653 uint32_t max_cmd_idx = pring->sli.sli3.numCiocb;
1c2ba475
JT
1654
1655 lockdep_assert_held(&phba->hbalock);
1656
7e56aa25
JS
1657 if ((pring->sli.sli3.next_cmdidx == pring->sli.sli3.cmdidx) &&
1658 (++pring->sli.sli3.next_cmdidx >= max_cmd_idx))
1659 pring->sli.sli3.next_cmdidx = 0;
dea3101e 1660
7e56aa25
JS
1661 if (unlikely(pring->sli.sli3.local_getidx ==
1662 pring->sli.sli3.next_cmdidx)) {
dea3101e 1663
7e56aa25 1664 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e 1665
7e56aa25 1666 if (unlikely(pring->sli.sli3.local_getidx >= max_cmd_idx)) {
dea3101e 1667 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 1668 "0315 Ring %d issue: portCmdGet %d "
025dfdaf 1669 "is bigger than cmd ring %d\n",
e8b62011 1670 pring->ringno,
7e56aa25
JS
1671 pring->sli.sli3.local_getidx,
1672 max_cmd_idx);
dea3101e 1673
2e0fef85 1674 phba->link_state = LPFC_HBA_ERROR;
dea3101e 1675 /*
1676 * All error attention handlers are posted to
1677 * worker thread
1678 */
1679 phba->work_ha |= HA_ERATT;
1680 phba->work_hs = HS_FFER3;
92d7f7b0 1681
5e9d9b82 1682 lpfc_worker_wake_up(phba);
dea3101e 1683
1684 return NULL;
1685 }
1686
7e56aa25 1687 if (pring->sli.sli3.local_getidx == pring->sli.sli3.next_cmdidx)
dea3101e 1688 return NULL;
1689 }
1690
ed957684 1691 return lpfc_cmd_iocb(phba, pring);
dea3101e 1692}
1693
e59058c4 1694/**
3621a710 1695 * lpfc_sli_next_iotag - Get an iotag for the iocb
e59058c4
JS
1696 * @phba: Pointer to HBA context object.
1697 * @iocbq: Pointer to driver iocb object.
1698 *
1699 * This function gets an iotag for the iocb. If there is no unused iotag and
1700 * the iocbq_lookup_len < 0xffff, this function allocates a bigger iotag_lookup
1701 * array and assigns a new iotag.
1702 * The function returns the allocated iotag if successful, else returns zero.
1703 * Zero is not a valid iotag.
1704 * The caller is not required to hold any lock.
1705 **/
604a3e30 1706uint16_t
2e0fef85 1707lpfc_sli_next_iotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
dea3101e 1708{
2e0fef85
JS
1709 struct lpfc_iocbq **new_arr;
1710 struct lpfc_iocbq **old_arr;
604a3e30
JB
1711 size_t new_len;
1712 struct lpfc_sli *psli = &phba->sli;
1713 uint16_t iotag;
dea3101e 1714
2e0fef85 1715 spin_lock_irq(&phba->hbalock);
604a3e30
JB
1716 iotag = psli->last_iotag;
1717 if(++iotag < psli->iocbq_lookup_len) {
1718 psli->last_iotag = iotag;
1719 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1720 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1721 iocbq->iotag = iotag;
1722 return iotag;
2e0fef85 1723 } else if (psli->iocbq_lookup_len < (0xffff
604a3e30
JB
1724 - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
1725 new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
2e0fef85 1726 spin_unlock_irq(&phba->hbalock);
6396bb22 1727 new_arr = kcalloc(new_len, sizeof(struct lpfc_iocbq *),
604a3e30
JB
1728 GFP_KERNEL);
1729 if (new_arr) {
2e0fef85 1730 spin_lock_irq(&phba->hbalock);
604a3e30
JB
1731 old_arr = psli->iocbq_lookup;
1732 if (new_len <= psli->iocbq_lookup_len) {
1733 /* highly unprobable case */
1734 kfree(new_arr);
1735 iotag = psli->last_iotag;
1736 if(++iotag < psli->iocbq_lookup_len) {
1737 psli->last_iotag = iotag;
1738 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1739 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1740 iocbq->iotag = iotag;
1741 return iotag;
1742 }
2e0fef85 1743 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1744 return 0;
1745 }
1746 if (psli->iocbq_lookup)
1747 memcpy(new_arr, old_arr,
1748 ((psli->last_iotag + 1) *
311464ec 1749 sizeof (struct lpfc_iocbq *)));
604a3e30
JB
1750 psli->iocbq_lookup = new_arr;
1751 psli->iocbq_lookup_len = new_len;
1752 psli->last_iotag = iotag;
1753 psli->iocbq_lookup[iotag] = iocbq;
2e0fef85 1754 spin_unlock_irq(&phba->hbalock);
604a3e30
JB
1755 iocbq->iotag = iotag;
1756 kfree(old_arr);
1757 return iotag;
1758 }
8f6d98d2 1759 } else
2e0fef85 1760 spin_unlock_irq(&phba->hbalock);
dea3101e 1761
bc73905a 1762 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011
JS
1763 "0318 Failed to allocate IOTAG.last IOTAG is %d\n",
1764 psli->last_iotag);
dea3101e 1765
604a3e30 1766 return 0;
dea3101e 1767}
1768
e59058c4 1769/**
3621a710 1770 * lpfc_sli_submit_iocb - Submit an iocb to the firmware
e59058c4
JS
1771 * @phba: Pointer to HBA context object.
1772 * @pring: Pointer to driver SLI ring object.
1773 * @iocb: Pointer to iocb slot in the ring.
1774 * @nextiocb: Pointer to driver iocb object which need to be
1775 * posted to firmware.
1776 *
1777 * This function is called with hbalock held to post a new iocb to
1778 * the firmware. This function copies the new iocb to ring iocb slot and
1779 * updates the ring pointers. It adds the new iocb to txcmplq if there is
1780 * a completion call back for this iocb else the function will free the
1781 * iocb object.
1782 **/
dea3101e 1783static void
1784lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
1785 IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
1786{
1c2ba475 1787 lockdep_assert_held(&phba->hbalock);
dea3101e 1788 /*
604a3e30 1789 * Set up an iotag
dea3101e 1790 */
604a3e30 1791 nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
dea3101e 1792
e2a0a9d6 1793
a58cbd52
JS
1794 if (pring->ringno == LPFC_ELS_RING) {
1795 lpfc_debugfs_slow_ring_trc(phba,
1796 "IOCB cmd ring: wd4:x%08x wd6:x%08x wd7:x%08x",
1797 *(((uint32_t *) &nextiocb->iocb) + 4),
1798 *(((uint32_t *) &nextiocb->iocb) + 6),
1799 *(((uint32_t *) &nextiocb->iocb) + 7));
1800 }
1801
dea3101e 1802 /*
1803 * Issue iocb command to adapter
1804 */
92d7f7b0 1805 lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, phba->iocb_cmd_size);
dea3101e 1806 wmb();
1807 pring->stats.iocb_cmd++;
1808
1809 /*
1810 * If there is no completion routine to call, we can release the
1811 * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
1812 * that have no rsp ring completion, iocb_cmpl MUST be NULL.
1813 */
1814 if (nextiocb->iocb_cmpl)
1815 lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
604a3e30 1816 else
2e0fef85 1817 __lpfc_sli_release_iocbq(phba, nextiocb);
dea3101e 1818
1819 /*
1820 * Let the HBA know what IOCB slot will be the next one the
1821 * driver will put a command into.
1822 */
7e56aa25
JS
1823 pring->sli.sli3.cmdidx = pring->sli.sli3.next_cmdidx;
1824 writel(pring->sli.sli3.cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
dea3101e 1825}
1826
e59058c4 1827/**
3621a710 1828 * lpfc_sli_update_full_ring - Update the chip attention register
e59058c4
JS
1829 * @phba: Pointer to HBA context object.
1830 * @pring: Pointer to driver SLI ring object.
1831 *
1832 * The caller is not required to hold any lock for calling this function.
1833 * This function updates the chip attention bits for the ring to inform firmware
1834 * that there are pending work to be done for this ring and requests an
1835 * interrupt when there is space available in the ring. This function is
1836 * called when the driver is unable to post more iocbs to the ring due
1837 * to unavailability of space in the ring.
1838 **/
dea3101e 1839static void
2e0fef85 1840lpfc_sli_update_full_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 1841{
1842 int ringno = pring->ringno;
1843
1844 pring->flag |= LPFC_CALL_RING_AVAILABLE;
1845
1846 wmb();
1847
1848 /*
1849 * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
1850 * The HBA will tell us when an IOCB entry is available.
1851 */
1852 writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
1853 readl(phba->CAregaddr); /* flush */
1854
1855 pring->stats.iocb_cmd_full++;
1856}
1857
e59058c4 1858/**
3621a710 1859 * lpfc_sli_update_ring - Update chip attention register
e59058c4
JS
1860 * @phba: Pointer to HBA context object.
1861 * @pring: Pointer to driver SLI ring object.
1862 *
1863 * This function updates the chip attention register bit for the
1864 * given ring to inform HBA that there is more work to be done
1865 * in this ring. The caller is not required to hold any lock.
1866 **/
dea3101e 1867static void
2e0fef85 1868lpfc_sli_update_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 1869{
1870 int ringno = pring->ringno;
1871
1872 /*
1873 * Tell the HBA that there is work to do in this ring.
1874 */
34b02dcd
JS
1875 if (!(phba->sli3_options & LPFC_SLI3_CRP_ENABLED)) {
1876 wmb();
1877 writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
1878 readl(phba->CAregaddr); /* flush */
1879 }
dea3101e 1880}
1881
e59058c4 1882/**
3621a710 1883 * lpfc_sli_resume_iocb - Process iocbs in the txq
e59058c4
JS
1884 * @phba: Pointer to HBA context object.
1885 * @pring: Pointer to driver SLI ring object.
1886 *
1887 * This function is called with hbalock held to post pending iocbs
1888 * in the txq to the firmware. This function is called when driver
1889 * detects space available in the ring.
1890 **/
dea3101e 1891static void
2e0fef85 1892lpfc_sli_resume_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
dea3101e 1893{
1894 IOCB_t *iocb;
1895 struct lpfc_iocbq *nextiocb;
1896
1c2ba475
JT
1897 lockdep_assert_held(&phba->hbalock);
1898
dea3101e 1899 /*
1900 * Check to see if:
1901 * (a) there is anything on the txq to send
1902 * (b) link is up
1903 * (c) link attention events can be processed (fcp ring only)
1904 * (d) IOCB processing is not blocked by the outstanding mbox command.
1905 */
0e9bb8d7
JS
1906
1907 if (lpfc_is_link_up(phba) &&
1908 (!list_empty(&pring->txq)) &&
895427bd 1909 (pring->ringno != LPFC_FCP_RING ||
0b727fea 1910 phba->sli.sli_flag & LPFC_PROCESS_LA)) {
dea3101e 1911
1912 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
1913 (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
1914 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
1915
1916 if (iocb)
1917 lpfc_sli_update_ring(phba, pring);
1918 else
1919 lpfc_sli_update_full_ring(phba, pring);
1920 }
1921
1922 return;
1923}
1924
e59058c4 1925/**
3621a710 1926 * lpfc_sli_next_hbq_slot - Get next hbq entry for the HBQ
e59058c4
JS
1927 * @phba: Pointer to HBA context object.
1928 * @hbqno: HBQ number.
1929 *
1930 * This function is called with hbalock held to get the next
1931 * available slot for the given HBQ. If there is free slot
1932 * available for the HBQ it will return pointer to the next available
1933 * HBQ entry else it will return NULL.
1934 **/
a6ababd2 1935static struct lpfc_hbq_entry *
ed957684
JS
1936lpfc_sli_next_hbq_slot(struct lpfc_hba *phba, uint32_t hbqno)
1937{
1938 struct hbq_s *hbqp = &phba->hbqs[hbqno];
1939
1c2ba475
JT
1940 lockdep_assert_held(&phba->hbalock);
1941
ed957684
JS
1942 if (hbqp->next_hbqPutIdx == hbqp->hbqPutIdx &&
1943 ++hbqp->next_hbqPutIdx >= hbqp->entry_count)
1944 hbqp->next_hbqPutIdx = 0;
1945
1946 if (unlikely(hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)) {
92d7f7b0 1947 uint32_t raw_index = phba->hbq_get[hbqno];
ed957684
JS
1948 uint32_t getidx = le32_to_cpu(raw_index);
1949
1950 hbqp->local_hbqGetIdx = getidx;
1951
1952 if (unlikely(hbqp->local_hbqGetIdx >= hbqp->entry_count)) {
1953 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 1954 LOG_SLI | LOG_VPORT,
e8b62011 1955 "1802 HBQ %d: local_hbqGetIdx "
ed957684 1956 "%u is > than hbqp->entry_count %u\n",
e8b62011 1957 hbqno, hbqp->local_hbqGetIdx,
ed957684
JS
1958 hbqp->entry_count);
1959
1960 phba->link_state = LPFC_HBA_ERROR;
1961 return NULL;
1962 }
1963
1964 if (hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)
1965 return NULL;
1966 }
1967
51ef4c26
JS
1968 return (struct lpfc_hbq_entry *) phba->hbqs[hbqno].hbq_virt +
1969 hbqp->hbqPutIdx;
ed957684
JS
1970}
1971
e59058c4 1972/**
3621a710 1973 * lpfc_sli_hbqbuf_free_all - Free all the hbq buffers
e59058c4
JS
1974 * @phba: Pointer to HBA context object.
1975 *
1976 * This function is called with no lock held to free all the
1977 * hbq buffers while uninitializing the SLI interface. It also
1978 * frees the HBQ buffers returned by the firmware but not yet
1979 * processed by the upper layers.
1980 **/
ed957684
JS
1981void
1982lpfc_sli_hbqbuf_free_all(struct lpfc_hba *phba)
1983{
92d7f7b0
JS
1984 struct lpfc_dmabuf *dmabuf, *next_dmabuf;
1985 struct hbq_dmabuf *hbq_buf;
3163f725 1986 unsigned long flags;
51ef4c26 1987 int i, hbq_count;
ed957684 1988
51ef4c26 1989 hbq_count = lpfc_sli_hbq_count();
ed957684 1990 /* Return all memory used by all HBQs */
3163f725 1991 spin_lock_irqsave(&phba->hbalock, flags);
51ef4c26
JS
1992 for (i = 0; i < hbq_count; ++i) {
1993 list_for_each_entry_safe(dmabuf, next_dmabuf,
1994 &phba->hbqs[i].hbq_buffer_list, list) {
1995 hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
1996 list_del(&hbq_buf->dbuf.list);
1997 (phba->hbqs[i].hbq_free_buffer)(phba, hbq_buf);
1998 }
a8adb832 1999 phba->hbqs[i].buffer_count = 0;
ed957684 2000 }
3163f725
JS
2001
2002 /* Mark the HBQs not in use */
2003 phba->hbq_in_use = 0;
2004 spin_unlock_irqrestore(&phba->hbalock, flags);
ed957684
JS
2005}
2006
e59058c4 2007/**
3621a710 2008 * lpfc_sli_hbq_to_firmware - Post the hbq buffer to firmware
e59058c4
JS
2009 * @phba: Pointer to HBA context object.
2010 * @hbqno: HBQ number.
2011 * @hbq_buf: Pointer to HBQ buffer.
2012 *
2013 * This function is called with the hbalock held to post a
2014 * hbq buffer to the firmware. If the function finds an empty
2015 * slot in the HBQ, it will post the buffer. The function will return
2016 * pointer to the hbq entry if it successfully post the buffer
2017 * else it will return NULL.
2018 **/
3772a991 2019static int
ed957684 2020lpfc_sli_hbq_to_firmware(struct lpfc_hba *phba, uint32_t hbqno,
92d7f7b0 2021 struct hbq_dmabuf *hbq_buf)
3772a991 2022{
1c2ba475 2023 lockdep_assert_held(&phba->hbalock);
3772a991
JS
2024 return phba->lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buf);
2025}
2026
2027/**
2028 * lpfc_sli_hbq_to_firmware_s3 - Post the hbq buffer to SLI3 firmware
2029 * @phba: Pointer to HBA context object.
2030 * @hbqno: HBQ number.
2031 * @hbq_buf: Pointer to HBQ buffer.
2032 *
2033 * This function is called with the hbalock held to post a hbq buffer to the
2034 * firmware. If the function finds an empty slot in the HBQ, it will post the
2035 * buffer and place it on the hbq_buffer_list. The function will return zero if
2036 * it successfully post the buffer else it will return an error.
2037 **/
2038static int
2039lpfc_sli_hbq_to_firmware_s3(struct lpfc_hba *phba, uint32_t hbqno,
2040 struct hbq_dmabuf *hbq_buf)
ed957684
JS
2041{
2042 struct lpfc_hbq_entry *hbqe;
92d7f7b0 2043 dma_addr_t physaddr = hbq_buf->dbuf.phys;
ed957684 2044
1c2ba475 2045 lockdep_assert_held(&phba->hbalock);
ed957684
JS
2046 /* Get next HBQ entry slot to use */
2047 hbqe = lpfc_sli_next_hbq_slot(phba, hbqno);
2048 if (hbqe) {
2049 struct hbq_s *hbqp = &phba->hbqs[hbqno];
2050
92d7f7b0
JS
2051 hbqe->bde.addrHigh = le32_to_cpu(putPaddrHigh(physaddr));
2052 hbqe->bde.addrLow = le32_to_cpu(putPaddrLow(physaddr));
895427bd 2053 hbqe->bde.tus.f.bdeSize = hbq_buf->total_size;
ed957684 2054 hbqe->bde.tus.f.bdeFlags = 0;
92d7f7b0
JS
2055 hbqe->bde.tus.w = le32_to_cpu(hbqe->bde.tus.w);
2056 hbqe->buffer_tag = le32_to_cpu(hbq_buf->tag);
2057 /* Sync SLIM */
ed957684
JS
2058 hbqp->hbqPutIdx = hbqp->next_hbqPutIdx;
2059 writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
92d7f7b0 2060 /* flush */
ed957684 2061 readl(phba->hbq_put + hbqno);
51ef4c26 2062 list_add_tail(&hbq_buf->dbuf.list, &hbqp->hbq_buffer_list);
3772a991
JS
2063 return 0;
2064 } else
2065 return -ENOMEM;
ed957684
JS
2066}
2067
4f774513
JS
2068/**
2069 * lpfc_sli_hbq_to_firmware_s4 - Post the hbq buffer to SLI4 firmware
2070 * @phba: Pointer to HBA context object.
2071 * @hbqno: HBQ number.
2072 * @hbq_buf: Pointer to HBQ buffer.
2073 *
2074 * This function is called with the hbalock held to post an RQE to the SLI4
2075 * firmware. If able to post the RQE to the RQ it will queue the hbq entry to
2076 * the hbq_buffer_list and return zero, otherwise it will return an error.
2077 **/
2078static int
2079lpfc_sli_hbq_to_firmware_s4(struct lpfc_hba *phba, uint32_t hbqno,
2080 struct hbq_dmabuf *hbq_buf)
2081{
2082 int rc;
2083 struct lpfc_rqe hrqe;
2084 struct lpfc_rqe drqe;
895427bd
JS
2085 struct lpfc_queue *hrq;
2086 struct lpfc_queue *drq;
2087
2088 if (hbqno != LPFC_ELS_HBQ)
2089 return 1;
2090 hrq = phba->sli4_hba.hdr_rq;
2091 drq = phba->sli4_hba.dat_rq;
4f774513 2092
1c2ba475 2093 lockdep_assert_held(&phba->hbalock);
4f774513
JS
2094 hrqe.address_lo = putPaddrLow(hbq_buf->hbuf.phys);
2095 hrqe.address_hi = putPaddrHigh(hbq_buf->hbuf.phys);
2096 drqe.address_lo = putPaddrLow(hbq_buf->dbuf.phys);
2097 drqe.address_hi = putPaddrHigh(hbq_buf->dbuf.phys);
895427bd 2098 rc = lpfc_sli4_rq_put(hrq, drq, &hrqe, &drqe);
4f774513
JS
2099 if (rc < 0)
2100 return rc;
895427bd 2101 hbq_buf->tag = (rc | (hbqno << 16));
4f774513
JS
2102 list_add_tail(&hbq_buf->dbuf.list, &phba->hbqs[hbqno].hbq_buffer_list);
2103 return 0;
2104}
2105
e59058c4 2106/* HBQ for ELS and CT traffic. */
92d7f7b0
JS
2107static struct lpfc_hbq_init lpfc_els_hbq = {
2108 .rn = 1,
def9c7a9 2109 .entry_count = 256,
92d7f7b0
JS
2110 .mask_count = 0,
2111 .profile = 0,
51ef4c26 2112 .ring_mask = (1 << LPFC_ELS_RING),
92d7f7b0 2113 .buffer_count = 0,
a257bf90
JS
2114 .init_count = 40,
2115 .add_count = 40,
92d7f7b0 2116};
ed957684 2117
e59058c4 2118/* Array of HBQs */
78b2d852 2119struct lpfc_hbq_init *lpfc_hbq_defs[] = {
92d7f7b0
JS
2120 &lpfc_els_hbq,
2121};
ed957684 2122
e59058c4 2123/**
3621a710 2124 * lpfc_sli_hbqbuf_fill_hbqs - Post more hbq buffers to HBQ
e59058c4
JS
2125 * @phba: Pointer to HBA context object.
2126 * @hbqno: HBQ number.
2127 * @count: Number of HBQ buffers to be posted.
2128 *
d7c255b2
JS
2129 * This function is called with no lock held to post more hbq buffers to the
2130 * given HBQ. The function returns the number of HBQ buffers successfully
2131 * posted.
e59058c4 2132 **/
311464ec 2133static int
92d7f7b0 2134lpfc_sli_hbqbuf_fill_hbqs(struct lpfc_hba *phba, uint32_t hbqno, uint32_t count)
ed957684 2135{
d7c255b2 2136 uint32_t i, posted = 0;
3163f725 2137 unsigned long flags;
92d7f7b0 2138 struct hbq_dmabuf *hbq_buffer;
d7c255b2 2139 LIST_HEAD(hbq_buf_list);
eafe1df9 2140 if (!phba->hbqs[hbqno].hbq_alloc_buffer)
51ef4c26 2141 return 0;
51ef4c26 2142
d7c255b2
JS
2143 if ((phba->hbqs[hbqno].buffer_count + count) >
2144 lpfc_hbq_defs[hbqno]->entry_count)
2145 count = lpfc_hbq_defs[hbqno]->entry_count -
2146 phba->hbqs[hbqno].buffer_count;
2147 if (!count)
2148 return 0;
2149 /* Allocate HBQ entries */
2150 for (i = 0; i < count; i++) {
2151 hbq_buffer = (phba->hbqs[hbqno].hbq_alloc_buffer)(phba);
2152 if (!hbq_buffer)
2153 break;
2154 list_add_tail(&hbq_buffer->dbuf.list, &hbq_buf_list);
2155 }
3163f725
JS
2156 /* Check whether HBQ is still in use */
2157 spin_lock_irqsave(&phba->hbalock, flags);
eafe1df9 2158 if (!phba->hbq_in_use)
d7c255b2
JS
2159 goto err;
2160 while (!list_empty(&hbq_buf_list)) {
2161 list_remove_head(&hbq_buf_list, hbq_buffer, struct hbq_dmabuf,
2162 dbuf.list);
2163 hbq_buffer->tag = (phba->hbqs[hbqno].buffer_count |
2164 (hbqno << 16));
3772a991 2165 if (!lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer)) {
a8adb832 2166 phba->hbqs[hbqno].buffer_count++;
d7c255b2
JS
2167 posted++;
2168 } else
51ef4c26 2169 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
ed957684 2170 }
3163f725 2171 spin_unlock_irqrestore(&phba->hbalock, flags);
d7c255b2
JS
2172 return posted;
2173err:
eafe1df9 2174 spin_unlock_irqrestore(&phba->hbalock, flags);
d7c255b2
JS
2175 while (!list_empty(&hbq_buf_list)) {
2176 list_remove_head(&hbq_buf_list, hbq_buffer, struct hbq_dmabuf,
2177 dbuf.list);
2178 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
2179 }
2180 return 0;
ed957684
JS
2181}
2182
e59058c4 2183/**
3621a710 2184 * lpfc_sli_hbqbuf_add_hbqs - Post more HBQ buffers to firmware
e59058c4
JS
2185 * @phba: Pointer to HBA context object.
2186 * @qno: HBQ number.
2187 *
2188 * This function posts more buffers to the HBQ. This function
d7c255b2
JS
2189 * is called with no lock held. The function returns the number of HBQ entries
2190 * successfully allocated.
e59058c4 2191 **/
92d7f7b0
JS
2192int
2193lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
ed957684 2194{
def9c7a9
JS
2195 if (phba->sli_rev == LPFC_SLI_REV4)
2196 return 0;
2197 else
2198 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
2199 lpfc_hbq_defs[qno]->add_count);
92d7f7b0 2200}
ed957684 2201
e59058c4 2202/**
3621a710 2203 * lpfc_sli_hbqbuf_init_hbqs - Post initial buffers to the HBQ
e59058c4
JS
2204 * @phba: Pointer to HBA context object.
2205 * @qno: HBQ queue number.
2206 *
2207 * This function is called from SLI initialization code path with
2208 * no lock held to post initial HBQ buffers to firmware. The
d7c255b2 2209 * function returns the number of HBQ entries successfully allocated.
e59058c4 2210 **/
a6ababd2 2211static int
92d7f7b0
JS
2212lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
2213{
def9c7a9
JS
2214 if (phba->sli_rev == LPFC_SLI_REV4)
2215 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
73d91e50 2216 lpfc_hbq_defs[qno]->entry_count);
def9c7a9
JS
2217 else
2218 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
2219 lpfc_hbq_defs[qno]->init_count);
ed957684
JS
2220}
2221
3772a991
JS
2222/**
2223 * lpfc_sli_hbqbuf_get - Remove the first hbq off of an hbq list
2224 * @phba: Pointer to HBA context object.
2225 * @hbqno: HBQ number.
2226 *
2227 * This function removes the first hbq buffer on an hbq list and returns a
2228 * pointer to that buffer. If it finds no buffers on the list it returns NULL.
2229 **/
2230static struct hbq_dmabuf *
2231lpfc_sli_hbqbuf_get(struct list_head *rb_list)
2232{
2233 struct lpfc_dmabuf *d_buf;
2234
2235 list_remove_head(rb_list, d_buf, struct lpfc_dmabuf, list);
2236 if (!d_buf)
2237 return NULL;
2238 return container_of(d_buf, struct hbq_dmabuf, dbuf);
2239}
2240
2d7dbc4c
JS
2241/**
2242 * lpfc_sli_rqbuf_get - Remove the first dma buffer off of an RQ list
2243 * @phba: Pointer to HBA context object.
2244 * @hbqno: HBQ number.
2245 *
2246 * This function removes the first RQ buffer on an RQ buffer list and returns a
2247 * pointer to that buffer. If it finds no buffers on the list it returns NULL.
2248 **/
2249static struct rqb_dmabuf *
2250lpfc_sli_rqbuf_get(struct lpfc_hba *phba, struct lpfc_queue *hrq)
2251{
2252 struct lpfc_dmabuf *h_buf;
2253 struct lpfc_rqb *rqbp;
2254
2255 rqbp = hrq->rqbp;
2256 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
2257 struct lpfc_dmabuf, list);
2258 if (!h_buf)
2259 return NULL;
2260 rqbp->buffer_count--;
2261 return container_of(h_buf, struct rqb_dmabuf, hbuf);
2262}
2263
e59058c4 2264/**
3621a710 2265 * lpfc_sli_hbqbuf_find - Find the hbq buffer associated with a tag
e59058c4
JS
2266 * @phba: Pointer to HBA context object.
2267 * @tag: Tag of the hbq buffer.
2268 *
71892418
SH
2269 * This function searches for the hbq buffer associated with the given tag in
2270 * the hbq buffer list. If it finds the hbq buffer, it returns the hbq_buffer
2271 * otherwise it returns NULL.
e59058c4 2272 **/
a6ababd2 2273static struct hbq_dmabuf *
92d7f7b0 2274lpfc_sli_hbqbuf_find(struct lpfc_hba *phba, uint32_t tag)
ed957684 2275{
92d7f7b0
JS
2276 struct lpfc_dmabuf *d_buf;
2277 struct hbq_dmabuf *hbq_buf;
51ef4c26
JS
2278 uint32_t hbqno;
2279
2280 hbqno = tag >> 16;
a0a74e45 2281 if (hbqno >= LPFC_MAX_HBQS)
51ef4c26 2282 return NULL;
ed957684 2283
3772a991 2284 spin_lock_irq(&phba->hbalock);
51ef4c26 2285 list_for_each_entry(d_buf, &phba->hbqs[hbqno].hbq_buffer_list, list) {
92d7f7b0 2286 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
51ef4c26 2287 if (hbq_buf->tag == tag) {
3772a991 2288 spin_unlock_irq(&phba->hbalock);
92d7f7b0 2289 return hbq_buf;
ed957684
JS
2290 }
2291 }
3772a991 2292 spin_unlock_irq(&phba->hbalock);
92d7f7b0 2293 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_VPORT,
e8b62011 2294 "1803 Bad hbq tag. Data: x%x x%x\n",
a8adb832 2295 tag, phba->hbqs[tag >> 16].buffer_count);
92d7f7b0 2296 return NULL;
ed957684
JS
2297}
2298
e59058c4 2299/**
3621a710 2300 * lpfc_sli_free_hbq - Give back the hbq buffer to firmware
e59058c4
JS
2301 * @phba: Pointer to HBA context object.
2302 * @hbq_buffer: Pointer to HBQ buffer.
2303 *
2304 * This function is called with hbalock. This function gives back
2305 * the hbq buffer to firmware. If the HBQ does not have space to
2306 * post the buffer, it will free the buffer.
2307 **/
ed957684 2308void
51ef4c26 2309lpfc_sli_free_hbq(struct lpfc_hba *phba, struct hbq_dmabuf *hbq_buffer)
ed957684
JS
2310{
2311 uint32_t hbqno;
2312
51ef4c26
JS
2313 if (hbq_buffer) {
2314 hbqno = hbq_buffer->tag >> 16;
3772a991 2315 if (lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer))
51ef4c26 2316 (phba->hbqs[hbqno].hbq_free_buffer)(phba, hbq_buffer);
ed957684
JS
2317 }
2318}
2319
e59058c4 2320/**
3621a710 2321 * lpfc_sli_chk_mbx_command - Check if the mailbox is a legitimate mailbox
e59058c4
JS
2322 * @mbxCommand: mailbox command code.
2323 *
2324 * This function is called by the mailbox event handler function to verify
2325 * that the completed mailbox command is a legitimate mailbox command. If the
2326 * completed mailbox is not known to the function, it will return MBX_SHUTDOWN
2327 * and the mailbox event handler will take the HBA offline.
2328 **/
dea3101e 2329static int
2330lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
2331{
2332 uint8_t ret;
2333
2334 switch (mbxCommand) {
2335 case MBX_LOAD_SM:
2336 case MBX_READ_NV:
2337 case MBX_WRITE_NV:
a8adb832 2338 case MBX_WRITE_VPARMS:
dea3101e 2339 case MBX_RUN_BIU_DIAG:
2340 case MBX_INIT_LINK:
2341 case MBX_DOWN_LINK:
2342 case MBX_CONFIG_LINK:
2343 case MBX_CONFIG_RING:
2344 case MBX_RESET_RING:
2345 case MBX_READ_CONFIG:
2346 case MBX_READ_RCONFIG:
2347 case MBX_READ_SPARM:
2348 case MBX_READ_STATUS:
2349 case MBX_READ_RPI:
2350 case MBX_READ_XRI:
2351 case MBX_READ_REV:
2352 case MBX_READ_LNK_STAT:
2353 case MBX_REG_LOGIN:
2354 case MBX_UNREG_LOGIN:
dea3101e 2355 case MBX_CLEAR_LA:
2356 case MBX_DUMP_MEMORY:
2357 case MBX_DUMP_CONTEXT:
2358 case MBX_RUN_DIAGS:
2359 case MBX_RESTART:
2360 case MBX_UPDATE_CFG:
2361 case MBX_DOWN_LOAD:
2362 case MBX_DEL_LD_ENTRY:
2363 case MBX_RUN_PROGRAM:
2364 case MBX_SET_MASK:
09372820 2365 case MBX_SET_VARIABLE:
dea3101e 2366 case MBX_UNREG_D_ID:
41415862 2367 case MBX_KILL_BOARD:
dea3101e 2368 case MBX_CONFIG_FARP:
41415862 2369 case MBX_BEACON:
dea3101e 2370 case MBX_LOAD_AREA:
2371 case MBX_RUN_BIU_DIAG64:
2372 case MBX_CONFIG_PORT:
2373 case MBX_READ_SPARM64:
2374 case MBX_READ_RPI64:
2375 case MBX_REG_LOGIN64:
76a95d75 2376 case MBX_READ_TOPOLOGY:
09372820 2377 case MBX_WRITE_WWN:
dea3101e 2378 case MBX_SET_DEBUG:
2379 case MBX_LOAD_EXP_ROM:
57127f15 2380 case MBX_ASYNCEVT_ENABLE:
92d7f7b0
JS
2381 case MBX_REG_VPI:
2382 case MBX_UNREG_VPI:
858c9f6c 2383 case MBX_HEARTBEAT:
84774a4d
JS
2384 case MBX_PORT_CAPABILITIES:
2385 case MBX_PORT_IOV_CONTROL:
04c68496
JS
2386 case MBX_SLI4_CONFIG:
2387 case MBX_SLI4_REQ_FTRS:
2388 case MBX_REG_FCFI:
2389 case MBX_UNREG_FCFI:
2390 case MBX_REG_VFI:
2391 case MBX_UNREG_VFI:
2392 case MBX_INIT_VPI:
2393 case MBX_INIT_VFI:
2394 case MBX_RESUME_RPI:
c7495937
JS
2395 case MBX_READ_EVENT_LOG_STATUS:
2396 case MBX_READ_EVENT_LOG:
dcf2a4e0
JS
2397 case MBX_SECURITY_MGMT:
2398 case MBX_AUTH_PORT:
940eb687 2399 case MBX_ACCESS_VDATA:
dea3101e 2400 ret = mbxCommand;
2401 break;
2402 default:
2403 ret = MBX_SHUTDOWN;
2404 break;
2405 }
2e0fef85 2406 return ret;
dea3101e 2407}
e59058c4
JS
2408
2409/**
3621a710 2410 * lpfc_sli_wake_mbox_wait - lpfc_sli_issue_mbox_wait mbox completion handler
e59058c4
JS
2411 * @phba: Pointer to HBA context object.
2412 * @pmboxq: Pointer to mailbox command.
2413 *
2414 * This is completion handler function for mailbox commands issued from
2415 * lpfc_sli_issue_mbox_wait function. This function is called by the
2416 * mailbox event handler function with no lock held. This function
2417 * will wake up thread waiting on the wait queue pointed by context1
2418 * of the mailbox.
2419 **/
04c68496 2420void
2e0fef85 2421lpfc_sli_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
dea3101e 2422{
858c9f6c 2423 unsigned long drvr_flag;
e29d74f8 2424 struct completion *pmbox_done;
dea3101e 2425
2426 /*
e29d74f8 2427 * If pmbox_done is empty, the driver thread gave up waiting and
dea3101e 2428 * continued running.
2429 */
7054a606 2430 pmboxq->mbox_flag |= LPFC_MBX_WAKE;
858c9f6c 2431 spin_lock_irqsave(&phba->hbalock, drvr_flag);
e29d74f8
JS
2432 pmbox_done = (struct completion *)pmboxq->context3;
2433 if (pmbox_done)
2434 complete(pmbox_done);
858c9f6c 2435 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 2436 return;
2437}
2438
e59058c4
JS
2439
2440/**
3621a710 2441 * lpfc_sli_def_mbox_cmpl - Default mailbox completion handler
e59058c4
JS
2442 * @phba: Pointer to HBA context object.
2443 * @pmb: Pointer to mailbox object.
2444 *
2445 * This function is the default mailbox completion handler. It
2446 * frees the memory resources associated with the completed mailbox
2447 * command. If the completed command is a REG_LOGIN mailbox command,
2448 * this function will issue a UREG_LOGIN to re-claim the RPI.
2449 **/
dea3101e 2450void
2e0fef85 2451lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
dea3101e 2452{
d439d286 2453 struct lpfc_vport *vport = pmb->vport;
dea3101e 2454 struct lpfc_dmabuf *mp;
d439d286 2455 struct lpfc_nodelist *ndlp;
5af5eee7 2456 struct Scsi_Host *shost;
04c68496 2457 uint16_t rpi, vpi;
7054a606
JS
2458 int rc;
2459
3e1f0718 2460 mp = (struct lpfc_dmabuf *)(pmb->ctx_buf);
7054a606 2461
dea3101e 2462 if (mp) {
2463 lpfc_mbuf_free(phba, mp->virt, mp->phys);
2464 kfree(mp);
2465 }
7054a606
JS
2466
2467 /*
2468 * If a REG_LOGIN succeeded after node is destroyed or node
2469 * is in re-discovery driver need to cleanup the RPI.
2470 */
2e0fef85 2471 if (!(phba->pport->load_flag & FC_UNLOADING) &&
04c68496
JS
2472 pmb->u.mb.mbxCommand == MBX_REG_LOGIN64 &&
2473 !pmb->u.mb.mbxStatus) {
2474 rpi = pmb->u.mb.un.varWords[0];
6d368e53 2475 vpi = pmb->u.mb.un.varRegLogin.vpi;
04c68496 2476 lpfc_unreg_login(phba, vpi, rpi, pmb);
de96e9c5 2477 pmb->vport = vport;
92d7f7b0 2478 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
7054a606
JS
2479 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
2480 if (rc != MBX_NOT_FINISHED)
2481 return;
2482 }
2483
695a814e
JS
2484 if ((pmb->u.mb.mbxCommand == MBX_REG_VPI) &&
2485 !(phba->pport->load_flag & FC_UNLOADING) &&
2486 !pmb->u.mb.mbxStatus) {
5af5eee7
JS
2487 shost = lpfc_shost_from_vport(vport);
2488 spin_lock_irq(shost->host_lock);
2489 vport->vpi_state |= LPFC_VPI_REGISTERED;
2490 vport->fc_flag &= ~FC_VPORT_NEEDS_REG_VPI;
2491 spin_unlock_irq(shost->host_lock);
695a814e
JS
2492 }
2493
d439d286 2494 if (pmb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 2495 ndlp = (struct lpfc_nodelist *)pmb->ctx_ndlp;
d439d286 2496 lpfc_nlp_put(ndlp);
dea16bda
JS
2497 pmb->ctx_buf = NULL;
2498 pmb->ctx_ndlp = NULL;
2499 }
2500
2501 if (pmb->u.mb.mbxCommand == MBX_UNREG_LOGIN) {
2502 ndlp = (struct lpfc_nodelist *)pmb->ctx_ndlp;
2503
2504 /* Check to see if there are any deferred events to process */
2505 if (ndlp) {
2506 lpfc_printf_vlog(
2507 vport,
2508 KERN_INFO, LOG_MBOX | LOG_DISCOVERY,
2509 "1438 UNREG cmpl deferred mbox x%x "
2510 "on NPort x%x Data: x%x x%x %p\n",
2511 ndlp->nlp_rpi, ndlp->nlp_DID,
2512 ndlp->nlp_flag, ndlp->nlp_defer_did, ndlp);
2513
2514 if ((ndlp->nlp_flag & NLP_UNREG_INP) &&
2515 (ndlp->nlp_defer_did != NLP_EVT_NOTHING_PENDING)) {
00292e03 2516 ndlp->nlp_flag &= ~NLP_UNREG_INP;
dea16bda
JS
2517 ndlp->nlp_defer_did = NLP_EVT_NOTHING_PENDING;
2518 lpfc_issue_els_plogi(vport, ndlp->nlp_DID, 0);
00292e03
JS
2519 } else {
2520 ndlp->nlp_flag &= ~NLP_UNREG_INP;
dea16bda 2521 }
dea16bda 2522 }
3e1f0718 2523 pmb->ctx_ndlp = NULL;
d439d286
JS
2524 }
2525
dcf2a4e0
JS
2526 /* Check security permission status on INIT_LINK mailbox command */
2527 if ((pmb->u.mb.mbxCommand == MBX_INIT_LINK) &&
2528 (pmb->u.mb.mbxStatus == MBXERR_SEC_NO_PERMISSION))
2529 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
2530 "2860 SLI authentication is required "
2531 "for INIT_LINK but has not done yet\n");
2532
04c68496
JS
2533 if (bf_get(lpfc_mqe_command, &pmb->u.mqe) == MBX_SLI4_CONFIG)
2534 lpfc_sli4_mbox_cmd_free(phba, pmb);
2535 else
2536 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 2537}
be6bb941
JS
2538 /**
2539 * lpfc_sli4_unreg_rpi_cmpl_clr - mailbox completion handler
2540 * @phba: Pointer to HBA context object.
2541 * @pmb: Pointer to mailbox object.
2542 *
2543 * This function is the unreg rpi mailbox completion handler. It
2544 * frees the memory resources associated with the completed mailbox
2545 * command. An additional refrenece is put on the ndlp to prevent
2546 * lpfc_nlp_release from freeing the rpi bit in the bitmask before
2547 * the unreg mailbox command completes, this routine puts the
2548 * reference back.
2549 *
2550 **/
2551void
2552lpfc_sli4_unreg_rpi_cmpl_clr(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
2553{
2554 struct lpfc_vport *vport = pmb->vport;
2555 struct lpfc_nodelist *ndlp;
2556
3e1f0718 2557 ndlp = pmb->ctx_ndlp;
be6bb941
JS
2558 if (pmb->u.mb.mbxCommand == MBX_UNREG_LOGIN) {
2559 if (phba->sli_rev == LPFC_SLI_REV4 &&
2560 (bf_get(lpfc_sli_intf_if_type,
27d6ac0a 2561 &phba->sli4_hba.sli_intf) >=
be6bb941
JS
2562 LPFC_SLI_INTF_IF_TYPE_2)) {
2563 if (ndlp) {
dea16bda
JS
2564 lpfc_printf_vlog(
2565 vport, KERN_INFO, LOG_MBOX | LOG_SLI,
2566 "0010 UNREG_LOGIN vpi:%x "
2567 "rpi:%x DID:%x defer x%x flg x%x "
2568 "map:%x %p\n",
2569 vport->vpi, ndlp->nlp_rpi,
2570 ndlp->nlp_DID, ndlp->nlp_defer_did,
2571 ndlp->nlp_flag,
2572 ndlp->nlp_usg_map, ndlp);
7c5e518c 2573 ndlp->nlp_flag &= ~NLP_LOGO_ACC;
be6bb941 2574 lpfc_nlp_put(ndlp);
dea16bda
JS
2575
2576 /* Check to see if there are any deferred
2577 * events to process
2578 */
2579 if ((ndlp->nlp_flag & NLP_UNREG_INP) &&
2580 (ndlp->nlp_defer_did !=
2581 NLP_EVT_NOTHING_PENDING)) {
2582 lpfc_printf_vlog(
2583 vport, KERN_INFO, LOG_DISCOVERY,
2584 "4111 UNREG cmpl deferred "
2585 "clr x%x on "
2586 "NPort x%x Data: x%x %p\n",
2587 ndlp->nlp_rpi, ndlp->nlp_DID,
2588 ndlp->nlp_defer_did, ndlp);
00292e03 2589 ndlp->nlp_flag &= ~NLP_UNREG_INP;
dea16bda
JS
2590 ndlp->nlp_defer_did =
2591 NLP_EVT_NOTHING_PENDING;
2592 lpfc_issue_els_plogi(
2593 vport, ndlp->nlp_DID, 0);
00292e03
JS
2594 } else {
2595 ndlp->nlp_flag &= ~NLP_UNREG_INP;
dea16bda 2596 }
be6bb941
JS
2597 }
2598 }
2599 }
2600
2601 mempool_free(pmb, phba->mbox_mem_pool);
2602}
dea3101e 2603
e59058c4 2604/**
3621a710 2605 * lpfc_sli_handle_mb_event - Handle mailbox completions from firmware
e59058c4
JS
2606 * @phba: Pointer to HBA context object.
2607 *
2608 * This function is called with no lock held. This function processes all
2609 * the completed mailbox commands and gives it to upper layers. The interrupt
2610 * service routine processes mailbox completion interrupt and adds completed
2611 * mailbox commands to the mboxq_cmpl queue and signals the worker thread.
2612 * Worker thread call lpfc_sli_handle_mb_event, which will return the
2613 * completed mailbox commands in mboxq_cmpl queue to the upper layers. This
2614 * function returns the mailbox commands to the upper layer by calling the
2615 * completion handler function of each mailbox.
2616 **/
dea3101e 2617int
2e0fef85 2618lpfc_sli_handle_mb_event(struct lpfc_hba *phba)
dea3101e 2619{
92d7f7b0 2620 MAILBOX_t *pmbox;
dea3101e 2621 LPFC_MBOXQ_t *pmb;
92d7f7b0
JS
2622 int rc;
2623 LIST_HEAD(cmplq);
dea3101e 2624
2625 phba->sli.slistat.mbox_event++;
2626
92d7f7b0
JS
2627 /* Get all completed mailboxe buffers into the cmplq */
2628 spin_lock_irq(&phba->hbalock);
2629 list_splice_init(&phba->sli.mboxq_cmpl, &cmplq);
2630 spin_unlock_irq(&phba->hbalock);
dea3101e 2631
92d7f7b0
JS
2632 /* Get a Mailbox buffer to setup mailbox commands for callback */
2633 do {
2634 list_remove_head(&cmplq, pmb, LPFC_MBOXQ_t, list);
2635 if (pmb == NULL)
2636 break;
2e0fef85 2637
04c68496 2638 pmbox = &pmb->u.mb;
dea3101e 2639
858c9f6c
JS
2640 if (pmbox->mbxCommand != MBX_HEARTBEAT) {
2641 if (pmb->vport) {
2642 lpfc_debugfs_disc_trc(pmb->vport,
2643 LPFC_DISC_TRC_MBOX_VPORT,
2644 "MBOX cmpl vport: cmd:x%x mb:x%x x%x",
2645 (uint32_t)pmbox->mbxCommand,
2646 pmbox->un.varWords[0],
2647 pmbox->un.varWords[1]);
2648 }
2649 else {
2650 lpfc_debugfs_disc_trc(phba->pport,
2651 LPFC_DISC_TRC_MBOX,
2652 "MBOX cmpl: cmd:x%x mb:x%x x%x",
2653 (uint32_t)pmbox->mbxCommand,
2654 pmbox->un.varWords[0],
2655 pmbox->un.varWords[1]);
2656 }
2657 }
2658
dea3101e 2659 /*
2660 * It is a fatal error if unknown mbox command completion.
2661 */
2662 if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
2663 MBX_SHUTDOWN) {
af901ca1 2664 /* Unknown mailbox command compl */
92d7f7b0 2665 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
e8b62011 2666 "(%d):0323 Unknown Mailbox command "
a183a15f 2667 "x%x (x%x/x%x) Cmpl\n",
92d7f7b0 2668 pmb->vport ? pmb->vport->vpi : 0,
04c68496 2669 pmbox->mbxCommand,
a183a15f
JS
2670 lpfc_sli_config_mbox_subsys_get(phba,
2671 pmb),
2672 lpfc_sli_config_mbox_opcode_get(phba,
2673 pmb));
2e0fef85 2674 phba->link_state = LPFC_HBA_ERROR;
dea3101e 2675 phba->work_hs = HS_FFER3;
2676 lpfc_handle_eratt(phba);
92d7f7b0 2677 continue;
dea3101e 2678 }
2679
dea3101e 2680 if (pmbox->mbxStatus) {
2681 phba->sli.slistat.mbox_stat_err++;
2682 if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
2683 /* Mbox cmd cmpl error - RETRYing */
92d7f7b0 2684 lpfc_printf_log(phba, KERN_INFO,
a183a15f
JS
2685 LOG_MBOX | LOG_SLI,
2686 "(%d):0305 Mbox cmd cmpl "
2687 "error - RETRYing Data: x%x "
2688 "(x%x/x%x) x%x x%x x%x\n",
2689 pmb->vport ? pmb->vport->vpi : 0,
2690 pmbox->mbxCommand,
2691 lpfc_sli_config_mbox_subsys_get(phba,
2692 pmb),
2693 lpfc_sli_config_mbox_opcode_get(phba,
2694 pmb),
2695 pmbox->mbxStatus,
2696 pmbox->un.varWords[0],
2697 pmb->vport->port_state);
dea3101e 2698 pmbox->mbxStatus = 0;
2699 pmbox->mbxOwner = OWN_HOST;
dea3101e 2700 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
04c68496 2701 if (rc != MBX_NOT_FINISHED)
92d7f7b0 2702 continue;
dea3101e 2703 }
2704 }
2705
2706 /* Mailbox cmd <cmd> Cmpl <cmpl> */
92d7f7b0 2707 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
a183a15f 2708 "(%d):0307 Mailbox cmd x%x (x%x/x%x) Cmpl x%p "
e74c03c8
JS
2709 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x "
2710 "x%x x%x x%x\n",
92d7f7b0 2711 pmb->vport ? pmb->vport->vpi : 0,
dea3101e 2712 pmbox->mbxCommand,
a183a15f
JS
2713 lpfc_sli_config_mbox_subsys_get(phba, pmb),
2714 lpfc_sli_config_mbox_opcode_get(phba, pmb),
dea3101e 2715 pmb->mbox_cmpl,
2716 *((uint32_t *) pmbox),
2717 pmbox->un.varWords[0],
2718 pmbox->un.varWords[1],
2719 pmbox->un.varWords[2],
2720 pmbox->un.varWords[3],
2721 pmbox->un.varWords[4],
2722 pmbox->un.varWords[5],
2723 pmbox->un.varWords[6],
e74c03c8
JS
2724 pmbox->un.varWords[7],
2725 pmbox->un.varWords[8],
2726 pmbox->un.varWords[9],
2727 pmbox->un.varWords[10]);
dea3101e 2728
92d7f7b0 2729 if (pmb->mbox_cmpl)
dea3101e 2730 pmb->mbox_cmpl(phba,pmb);
92d7f7b0
JS
2731 } while (1);
2732 return 0;
2733}
dea3101e 2734
e59058c4 2735/**
3621a710 2736 * lpfc_sli_get_buff - Get the buffer associated with the buffer tag
e59058c4
JS
2737 * @phba: Pointer to HBA context object.
2738 * @pring: Pointer to driver SLI ring object.
2739 * @tag: buffer tag.
2740 *
2741 * This function is called with no lock held. When QUE_BUFTAG_BIT bit
2742 * is set in the tag the buffer is posted for a particular exchange,
2743 * the function will return the buffer without replacing the buffer.
2744 * If the buffer is for unsolicited ELS or CT traffic, this function
2745 * returns the buffer and also posts another buffer to the firmware.
2746 **/
76bb24ef
JS
2747static struct lpfc_dmabuf *
2748lpfc_sli_get_buff(struct lpfc_hba *phba,
9f1e1b50
JS
2749 struct lpfc_sli_ring *pring,
2750 uint32_t tag)
76bb24ef 2751{
9f1e1b50
JS
2752 struct hbq_dmabuf *hbq_entry;
2753
76bb24ef
JS
2754 if (tag & QUE_BUFTAG_BIT)
2755 return lpfc_sli_ring_taggedbuf_get(phba, pring, tag);
9f1e1b50
JS
2756 hbq_entry = lpfc_sli_hbqbuf_find(phba, tag);
2757 if (!hbq_entry)
2758 return NULL;
2759 return &hbq_entry->dbuf;
76bb24ef 2760}
57127f15 2761
3772a991
JS
2762/**
2763 * lpfc_complete_unsol_iocb - Complete an unsolicited sequence
2764 * @phba: Pointer to HBA context object.
2765 * @pring: Pointer to driver SLI ring object.
2766 * @saveq: Pointer to the iocbq struct representing the sequence starting frame.
2767 * @fch_r_ctl: the r_ctl for the first frame of the sequence.
2768 * @fch_type: the type for the first frame of the sequence.
2769 *
2770 * This function is called with no lock held. This function uses the r_ctl and
2771 * type of the received sequence to find the correct callback function to call
2772 * to process the sequence.
2773 **/
2774static int
2775lpfc_complete_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2776 struct lpfc_iocbq *saveq, uint32_t fch_r_ctl,
2777 uint32_t fch_type)
2778{
2779 int i;
2780
f358dd0c
JS
2781 switch (fch_type) {
2782 case FC_TYPE_NVME:
d613b6a7 2783 lpfc_nvmet_unsol_ls_event(phba, pring, saveq);
f358dd0c
JS
2784 return 1;
2785 default:
2786 break;
2787 }
2788
3772a991
JS
2789 /* unSolicited Responses */
2790 if (pring->prt[0].profile) {
2791 if (pring->prt[0].lpfc_sli_rcv_unsol_event)
2792 (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
2793 saveq);
2794 return 1;
2795 }
2796 /* We must search, based on rctl / type
2797 for the right routine */
2798 for (i = 0; i < pring->num_mask; i++) {
2799 if ((pring->prt[i].rctl == fch_r_ctl) &&
2800 (pring->prt[i].type == fch_type)) {
2801 if (pring->prt[i].lpfc_sli_rcv_unsol_event)
2802 (pring->prt[i].lpfc_sli_rcv_unsol_event)
2803 (phba, pring, saveq);
2804 return 1;
2805 }
2806 }
2807 return 0;
2808}
e59058c4
JS
2809
2810/**
3621a710 2811 * lpfc_sli_process_unsol_iocb - Unsolicited iocb handler
e59058c4
JS
2812 * @phba: Pointer to HBA context object.
2813 * @pring: Pointer to driver SLI ring object.
2814 * @saveq: Pointer to the unsolicited iocb.
2815 *
2816 * This function is called with no lock held by the ring event handler
2817 * when there is an unsolicited iocb posted to the response ring by the
2818 * firmware. This function gets the buffer associated with the iocbs
2819 * and calls the event handler for the ring. This function handles both
2820 * qring buffers and hbq buffers.
2821 * When the function returns 1 the caller can free the iocb object otherwise
2822 * upper layer functions will free the iocb objects.
2823 **/
dea3101e 2824static int
2825lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2826 struct lpfc_iocbq *saveq)
2827{
2828 IOCB_t * irsp;
2829 WORD5 * w5p;
2830 uint32_t Rctl, Type;
76bb24ef 2831 struct lpfc_iocbq *iocbq;
3163f725 2832 struct lpfc_dmabuf *dmzbuf;
dea3101e 2833
dea3101e 2834 irsp = &(saveq->iocb);
57127f15
JS
2835
2836 if (irsp->ulpCommand == CMD_ASYNC_STATUS) {
2837 if (pring->lpfc_sli_rcv_async_status)
2838 pring->lpfc_sli_rcv_async_status(phba, pring, saveq);
2839 else
2840 lpfc_printf_log(phba,
2841 KERN_WARNING,
2842 LOG_SLI,
2843 "0316 Ring %d handler: unexpected "
2844 "ASYNC_STATUS iocb received evt_code "
2845 "0x%x\n",
2846 pring->ringno,
2847 irsp->un.asyncstat.evt_code);
2848 return 1;
2849 }
2850
3163f725
JS
2851 if ((irsp->ulpCommand == CMD_IOCB_RET_XRI64_CX) &&
2852 (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)) {
2853 if (irsp->ulpBdeCount > 0) {
2854 dmzbuf = lpfc_sli_get_buff(phba, pring,
2855 irsp->un.ulpWord[3]);
2856 lpfc_in_buf_free(phba, dmzbuf);
2857 }
2858
2859 if (irsp->ulpBdeCount > 1) {
2860 dmzbuf = lpfc_sli_get_buff(phba, pring,
2861 irsp->unsli3.sli3Words[3]);
2862 lpfc_in_buf_free(phba, dmzbuf);
2863 }
2864
2865 if (irsp->ulpBdeCount > 2) {
2866 dmzbuf = lpfc_sli_get_buff(phba, pring,
2867 irsp->unsli3.sli3Words[7]);
2868 lpfc_in_buf_free(phba, dmzbuf);
2869 }
2870
2871 return 1;
2872 }
2873
92d7f7b0 2874 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
76bb24ef
JS
2875 if (irsp->ulpBdeCount != 0) {
2876 saveq->context2 = lpfc_sli_get_buff(phba, pring,
2877 irsp->un.ulpWord[3]);
2878 if (!saveq->context2)
2879 lpfc_printf_log(phba,
2880 KERN_ERR,
2881 LOG_SLI,
2882 "0341 Ring %d Cannot find buffer for "
2883 "an unsolicited iocb. tag 0x%x\n",
2884 pring->ringno,
2885 irsp->un.ulpWord[3]);
76bb24ef
JS
2886 }
2887 if (irsp->ulpBdeCount == 2) {
2888 saveq->context3 = lpfc_sli_get_buff(phba, pring,
2889 irsp->unsli3.sli3Words[7]);
2890 if (!saveq->context3)
2891 lpfc_printf_log(phba,
2892 KERN_ERR,
2893 LOG_SLI,
2894 "0342 Ring %d Cannot find buffer for an"
2895 " unsolicited iocb. tag 0x%x\n",
2896 pring->ringno,
2897 irsp->unsli3.sli3Words[7]);
2898 }
2899 list_for_each_entry(iocbq, &saveq->list, list) {
76bb24ef 2900 irsp = &(iocbq->iocb);
76bb24ef
JS
2901 if (irsp->ulpBdeCount != 0) {
2902 iocbq->context2 = lpfc_sli_get_buff(phba, pring,
2903 irsp->un.ulpWord[3]);
9c2face6 2904 if (!iocbq->context2)
76bb24ef
JS
2905 lpfc_printf_log(phba,
2906 KERN_ERR,
2907 LOG_SLI,
2908 "0343 Ring %d Cannot find "
2909 "buffer for an unsolicited iocb"
2910 ". tag 0x%x\n", pring->ringno,
92d7f7b0 2911 irsp->un.ulpWord[3]);
76bb24ef
JS
2912 }
2913 if (irsp->ulpBdeCount == 2) {
2914 iocbq->context3 = lpfc_sli_get_buff(phba, pring,
51ef4c26 2915 irsp->unsli3.sli3Words[7]);
9c2face6 2916 if (!iocbq->context3)
76bb24ef
JS
2917 lpfc_printf_log(phba,
2918 KERN_ERR,
2919 LOG_SLI,
2920 "0344 Ring %d Cannot find "
2921 "buffer for an unsolicited "
2922 "iocb. tag 0x%x\n",
2923 pring->ringno,
2924 irsp->unsli3.sli3Words[7]);
2925 }
2926 }
92d7f7b0 2927 }
9c2face6
JS
2928 if (irsp->ulpBdeCount != 0 &&
2929 (irsp->ulpCommand == CMD_IOCB_RCV_CONT64_CX ||
2930 irsp->ulpStatus == IOSTAT_INTERMED_RSP)) {
2931 int found = 0;
2932
2933 /* search continue save q for same XRI */
2934 list_for_each_entry(iocbq, &pring->iocb_continue_saveq, clist) {
7851fe2c
JS
2935 if (iocbq->iocb.unsli3.rcvsli3.ox_id ==
2936 saveq->iocb.unsli3.rcvsli3.ox_id) {
9c2face6
JS
2937 list_add_tail(&saveq->list, &iocbq->list);
2938 found = 1;
2939 break;
2940 }
2941 }
2942 if (!found)
2943 list_add_tail(&saveq->clist,
2944 &pring->iocb_continue_saveq);
2945 if (saveq->iocb.ulpStatus != IOSTAT_INTERMED_RSP) {
2946 list_del_init(&iocbq->clist);
2947 saveq = iocbq;
2948 irsp = &(saveq->iocb);
2949 } else
2950 return 0;
2951 }
2952 if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX) ||
2953 (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX) ||
2954 (irsp->ulpCommand == CMD_IOCB_RCV_ELS64_CX)) {
6a9c52cf
JS
2955 Rctl = FC_RCTL_ELS_REQ;
2956 Type = FC_TYPE_ELS;
9c2face6
JS
2957 } else {
2958 w5p = (WORD5 *)&(saveq->iocb.un.ulpWord[5]);
2959 Rctl = w5p->hcsw.Rctl;
2960 Type = w5p->hcsw.Type;
2961
2962 /* Firmware Workaround */
2963 if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
2964 (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX ||
2965 irsp->ulpCommand == CMD_IOCB_RCV_SEQ64_CX)) {
6a9c52cf
JS
2966 Rctl = FC_RCTL_ELS_REQ;
2967 Type = FC_TYPE_ELS;
9c2face6
JS
2968 w5p->hcsw.Rctl = Rctl;
2969 w5p->hcsw.Type = Type;
2970 }
2971 }
92d7f7b0 2972
3772a991 2973 if (!lpfc_complete_unsol_iocb(phba, pring, saveq, Rctl, Type))
92d7f7b0 2974 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 2975 "0313 Ring %d handler: unexpected Rctl x%x "
92d7f7b0 2976 "Type x%x received\n",
e8b62011 2977 pring->ringno, Rctl, Type);
3772a991 2978
92d7f7b0 2979 return 1;
dea3101e 2980}
2981
e59058c4 2982/**
3621a710 2983 * lpfc_sli_iocbq_lookup - Find command iocb for the given response iocb
e59058c4
JS
2984 * @phba: Pointer to HBA context object.
2985 * @pring: Pointer to driver SLI ring object.
2986 * @prspiocb: Pointer to response iocb object.
2987 *
2988 * This function looks up the iocb_lookup table to get the command iocb
2989 * corresponding to the given response iocb using the iotag of the
341b2aa8
DK
2990 * response iocb. This function is called with the hbalock held
2991 * for sli3 devices or the ring_lock for sli4 devices.
e59058c4
JS
2992 * This function returns the command iocb object if it finds the command
2993 * iocb else returns NULL.
2994 **/
dea3101e 2995static struct lpfc_iocbq *
2e0fef85
JS
2996lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,
2997 struct lpfc_sli_ring *pring,
2998 struct lpfc_iocbq *prspiocb)
dea3101e 2999{
dea3101e 3000 struct lpfc_iocbq *cmd_iocb = NULL;
3001 uint16_t iotag;
1c2ba475 3002 lockdep_assert_held(&phba->hbalock);
dea3101e 3003
604a3e30
JB
3004 iotag = prspiocb->iocb.ulpIoTag;
3005
3006 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
3007 cmd_iocb = phba->sli.iocbq_lookup[iotag];
4f2e66c6 3008 if (cmd_iocb->iocb_flag & LPFC_IO_ON_TXCMPLQ) {
89533e9b
JS
3009 /* remove from txcmpl queue list */
3010 list_del_init(&cmd_iocb->list);
4f2e66c6 3011 cmd_iocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
c490850a 3012 pring->txcmplq_cnt--;
89533e9b 3013 return cmd_iocb;
2a9bf3d0 3014 }
dea3101e 3015 }
3016
dea3101e 3017 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
89533e9b 3018 "0317 iotag x%x is out of "
604a3e30 3019 "range: max iotag x%x wd0 x%x\n",
e8b62011 3020 iotag, phba->sli.last_iotag,
604a3e30 3021 *(((uint32_t *) &prspiocb->iocb) + 7));
dea3101e 3022 return NULL;
3023}
3024
3772a991
JS
3025/**
3026 * lpfc_sli_iocbq_lookup_by_tag - Find command iocb for the iotag
3027 * @phba: Pointer to HBA context object.
3028 * @pring: Pointer to driver SLI ring object.
3029 * @iotag: IOCB tag.
3030 *
3031 * This function looks up the iocb_lookup table to get the command iocb
3032 * corresponding to the given iotag. This function is called with the
3033 * hbalock held.
3034 * This function returns the command iocb object if it finds the command
3035 * iocb else returns NULL.
3036 **/
3037static struct lpfc_iocbq *
3038lpfc_sli_iocbq_lookup_by_tag(struct lpfc_hba *phba,
3039 struct lpfc_sli_ring *pring, uint16_t iotag)
3040{
895427bd 3041 struct lpfc_iocbq *cmd_iocb = NULL;
3772a991 3042
1c2ba475 3043 lockdep_assert_held(&phba->hbalock);
3772a991
JS
3044 if (iotag != 0 && iotag <= phba->sli.last_iotag) {
3045 cmd_iocb = phba->sli.iocbq_lookup[iotag];
4f2e66c6
JS
3046 if (cmd_iocb->iocb_flag & LPFC_IO_ON_TXCMPLQ) {
3047 /* remove from txcmpl queue list */
3048 list_del_init(&cmd_iocb->list);
3049 cmd_iocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
c490850a 3050 pring->txcmplq_cnt--;
4f2e66c6 3051 return cmd_iocb;
2a9bf3d0 3052 }
3772a991 3053 }
89533e9b 3054
3772a991 3055 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
895427bd
JS
3056 "0372 iotag x%x lookup error: max iotag (x%x) "
3057 "iocb_flag x%x\n",
3058 iotag, phba->sli.last_iotag,
3059 cmd_iocb ? cmd_iocb->iocb_flag : 0xffff);
3772a991
JS
3060 return NULL;
3061}
3062
e59058c4 3063/**
3621a710 3064 * lpfc_sli_process_sol_iocb - process solicited iocb completion
e59058c4
JS
3065 * @phba: Pointer to HBA context object.
3066 * @pring: Pointer to driver SLI ring object.
3067 * @saveq: Pointer to the response iocb to be processed.
3068 *
3069 * This function is called by the ring event handler for non-fcp
3070 * rings when there is a new response iocb in the response ring.
3071 * The caller is not required to hold any locks. This function
3072 * gets the command iocb associated with the response iocb and
3073 * calls the completion handler for the command iocb. If there
3074 * is no completion handler, the function will free the resources
3075 * associated with command iocb. If the response iocb is for
3076 * an already aborted command iocb, the status of the completion
3077 * is changed to IOSTAT_LOCAL_REJECT/IOERR_SLI_ABORTED.
3078 * This function always returns 1.
3079 **/
dea3101e 3080static int
2e0fef85 3081lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
dea3101e 3082 struct lpfc_iocbq *saveq)
3083{
2e0fef85 3084 struct lpfc_iocbq *cmdiocbp;
dea3101e 3085 int rc = 1;
3086 unsigned long iflag;
3087
3088 /* Based on the iotag field, get the cmd IOCB from the txcmplq */
341b2aa8
DK
3089 if (phba->sli_rev == LPFC_SLI_REV4)
3090 spin_lock_irqsave(&pring->ring_lock, iflag);
3091 else
3092 spin_lock_irqsave(&phba->hbalock, iflag);
604a3e30 3093 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
341b2aa8
DK
3094 if (phba->sli_rev == LPFC_SLI_REV4)
3095 spin_unlock_irqrestore(&pring->ring_lock, iflag);
3096 else
3097 spin_unlock_irqrestore(&phba->hbalock, iflag);
2e0fef85 3098
dea3101e 3099 if (cmdiocbp) {
3100 if (cmdiocbp->iocb_cmpl) {
ea2151b4
JS
3101 /*
3102 * If an ELS command failed send an event to mgmt
3103 * application.
3104 */
3105 if (saveq->iocb.ulpStatus &&
3106 (pring->ringno == LPFC_ELS_RING) &&
3107 (cmdiocbp->iocb.ulpCommand ==
3108 CMD_ELS_REQUEST64_CR))
3109 lpfc_send_els_failure_event(phba,
3110 cmdiocbp, saveq);
3111
dea3101e 3112 /*
3113 * Post all ELS completions to the worker thread.
3114 * All other are passed to the completion callback.
3115 */
3116 if (pring->ringno == LPFC_ELS_RING) {
341af102
JS
3117 if ((phba->sli_rev < LPFC_SLI_REV4) &&
3118 (cmdiocbp->iocb_flag &
3119 LPFC_DRIVER_ABORTED)) {
3120 spin_lock_irqsave(&phba->hbalock,
3121 iflag);
07951076
JS
3122 cmdiocbp->iocb_flag &=
3123 ~LPFC_DRIVER_ABORTED;
341af102
JS
3124 spin_unlock_irqrestore(&phba->hbalock,
3125 iflag);
07951076
JS
3126 saveq->iocb.ulpStatus =
3127 IOSTAT_LOCAL_REJECT;
3128 saveq->iocb.un.ulpWord[4] =
3129 IOERR_SLI_ABORTED;
0ff10d46
JS
3130
3131 /* Firmware could still be in progress
3132 * of DMAing payload, so don't free data
3133 * buffer till after a hbeat.
3134 */
341af102
JS
3135 spin_lock_irqsave(&phba->hbalock,
3136 iflag);
0ff10d46 3137 saveq->iocb_flag |= LPFC_DELAY_MEM_FREE;
341af102
JS
3138 spin_unlock_irqrestore(&phba->hbalock,
3139 iflag);
3140 }
0f65ff68
JS
3141 if (phba->sli_rev == LPFC_SLI_REV4) {
3142 if (saveq->iocb_flag &
3143 LPFC_EXCHANGE_BUSY) {
3144 /* Set cmdiocb flag for the
3145 * exchange busy so sgl (xri)
3146 * will not be released until
3147 * the abort xri is received
3148 * from hba.
3149 */
3150 spin_lock_irqsave(
3151 &phba->hbalock, iflag);
3152 cmdiocbp->iocb_flag |=
3153 LPFC_EXCHANGE_BUSY;
3154 spin_unlock_irqrestore(
3155 &phba->hbalock, iflag);
3156 }
3157 if (cmdiocbp->iocb_flag &
3158 LPFC_DRIVER_ABORTED) {
3159 /*
3160 * Clear LPFC_DRIVER_ABORTED
3161 * bit in case it was driver
3162 * initiated abort.
3163 */
3164 spin_lock_irqsave(
3165 &phba->hbalock, iflag);
3166 cmdiocbp->iocb_flag &=
3167 ~LPFC_DRIVER_ABORTED;
3168 spin_unlock_irqrestore(
3169 &phba->hbalock, iflag);
3170 cmdiocbp->iocb.ulpStatus =
3171 IOSTAT_LOCAL_REJECT;
3172 cmdiocbp->iocb.un.ulpWord[4] =
3173 IOERR_ABORT_REQUESTED;
3174 /*
3175 * For SLI4, irsiocb contains
3176 * NO_XRI in sli_xritag, it
3177 * shall not affect releasing
3178 * sgl (xri) process.
3179 */
3180 saveq->iocb.ulpStatus =
3181 IOSTAT_LOCAL_REJECT;
3182 saveq->iocb.un.ulpWord[4] =
3183 IOERR_SLI_ABORTED;
3184 spin_lock_irqsave(
3185 &phba->hbalock, iflag);
3186 saveq->iocb_flag |=
3187 LPFC_DELAY_MEM_FREE;
3188 spin_unlock_irqrestore(
3189 &phba->hbalock, iflag);
3190 }
07951076 3191 }
dea3101e 3192 }
2e0fef85 3193 (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
604a3e30
JB
3194 } else
3195 lpfc_sli_release_iocbq(phba, cmdiocbp);
dea3101e 3196 } else {
3197 /*
3198 * Unknown initiating command based on the response iotag.
3199 * This could be the case on the ELS ring because of
3200 * lpfc_els_abort().
3201 */
3202 if (pring->ringno != LPFC_ELS_RING) {
3203 /*
3204 * Ring <ringno> handler: unexpected completion IoTag
3205 * <IoTag>
3206 */
a257bf90 3207 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011
JS
3208 "0322 Ring %d handler: "
3209 "unexpected completion IoTag x%x "
3210 "Data: x%x x%x x%x x%x\n",
3211 pring->ringno,
3212 saveq->iocb.ulpIoTag,
3213 saveq->iocb.ulpStatus,
3214 saveq->iocb.un.ulpWord[4],
3215 saveq->iocb.ulpCommand,
3216 saveq->iocb.ulpContext);
dea3101e 3217 }
3218 }
68876920 3219
dea3101e 3220 return rc;
3221}
3222
e59058c4 3223/**
3621a710 3224 * lpfc_sli_rsp_pointers_error - Response ring pointer error handler
e59058c4
JS
3225 * @phba: Pointer to HBA context object.
3226 * @pring: Pointer to driver SLI ring object.
3227 *
3228 * This function is called from the iocb ring event handlers when
3229 * put pointer is ahead of the get pointer for a ring. This function signal
3230 * an error attention condition to the worker thread and the worker
3231 * thread will transition the HBA to offline state.
3232 **/
2e0fef85
JS
3233static void
3234lpfc_sli_rsp_pointers_error(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
875fbdfe 3235{
34b02dcd 3236 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
875fbdfe 3237 /*
025dfdaf 3238 * Ring <ringno> handler: portRspPut <portRspPut> is bigger than
875fbdfe
JSEC
3239 * rsp ring <portRspMax>
3240 */
3241 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 3242 "0312 Ring %d handler: portRspPut %d "
025dfdaf 3243 "is bigger than rsp ring %d\n",
e8b62011 3244 pring->ringno, le32_to_cpu(pgp->rspPutInx),
7e56aa25 3245 pring->sli.sli3.numRiocb);
875fbdfe 3246
2e0fef85 3247 phba->link_state = LPFC_HBA_ERROR;
875fbdfe
JSEC
3248
3249 /*
3250 * All error attention handlers are posted to
3251 * worker thread
3252 */
3253 phba->work_ha |= HA_ERATT;
3254 phba->work_hs = HS_FFER3;
92d7f7b0 3255
5e9d9b82 3256 lpfc_worker_wake_up(phba);
875fbdfe
JSEC
3257
3258 return;
3259}
3260
9399627f 3261/**
3621a710 3262 * lpfc_poll_eratt - Error attention polling timer timeout handler
9399627f
JS
3263 * @ptr: Pointer to address of HBA context object.
3264 *
3265 * This function is invoked by the Error Attention polling timer when the
3266 * timer times out. It will check the SLI Error Attention register for
3267 * possible attention events. If so, it will post an Error Attention event
3268 * and wake up worker thread to process it. Otherwise, it will set up the
3269 * Error Attention polling timer for the next poll.
3270 **/
f22eb4d3 3271void lpfc_poll_eratt(struct timer_list *t)
9399627f
JS
3272{
3273 struct lpfc_hba *phba;
eb016566 3274 uint32_t eratt = 0;
aa6fbb75 3275 uint64_t sli_intr, cnt;
9399627f 3276
f22eb4d3 3277 phba = from_timer(phba, t, eratt_poll);
9399627f 3278
aa6fbb75
JS
3279 /* Here we will also keep track of interrupts per sec of the hba */
3280 sli_intr = phba->sli.slistat.sli_intr;
3281
3282 if (phba->sli.slistat.sli_prev_intr > sli_intr)
3283 cnt = (((uint64_t)(-1) - phba->sli.slistat.sli_prev_intr) +
3284 sli_intr);
3285 else
3286 cnt = (sli_intr - phba->sli.slistat.sli_prev_intr);
3287
65791f1f
JS
3288 /* 64-bit integer division not supported on 32-bit x86 - use do_div */
3289 do_div(cnt, phba->eratt_poll_interval);
aa6fbb75
JS
3290 phba->sli.slistat.sli_ips = cnt;
3291
3292 phba->sli.slistat.sli_prev_intr = sli_intr;
3293
9399627f
JS
3294 /* Check chip HA register for error event */
3295 eratt = lpfc_sli_check_eratt(phba);
3296
3297 if (eratt)
3298 /* Tell the worker thread there is work to do */
3299 lpfc_worker_wake_up(phba);
3300 else
3301 /* Restart the timer for next eratt poll */
256ec0d0
JS
3302 mod_timer(&phba->eratt_poll,
3303 jiffies +
65791f1f 3304 msecs_to_jiffies(1000 * phba->eratt_poll_interval));
9399627f
JS
3305 return;
3306}
3307
875fbdfe 3308
e59058c4 3309/**
3621a710 3310 * lpfc_sli_handle_fast_ring_event - Handle ring events on FCP ring
e59058c4
JS
3311 * @phba: Pointer to HBA context object.
3312 * @pring: Pointer to driver SLI ring object.
3313 * @mask: Host attention register mask for this ring.
3314 *
3315 * This function is called from the interrupt context when there is a ring
3316 * event for the fcp ring. The caller does not hold any lock.
3317 * The function processes each response iocb in the response ring until it
25985edc 3318 * finds an iocb with LE bit set and chains all the iocbs up to the iocb with
e59058c4
JS
3319 * LE bit set. The function will call the completion handler of the command iocb
3320 * if the response iocb indicates a completion for a command iocb or it is
3321 * an abort completion. The function will call lpfc_sli_process_unsol_iocb
3322 * function if this is an unsolicited iocb.
dea3101e 3323 * This routine presumes LPFC_FCP_RING handling and doesn't bother
45ed1190
JS
3324 * to check it explicitly.
3325 */
3326int
2e0fef85
JS
3327lpfc_sli_handle_fast_ring_event(struct lpfc_hba *phba,
3328 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 3329{
34b02dcd 3330 struct lpfc_pgp *pgp = &phba->port_gp[pring->ringno];
dea3101e 3331 IOCB_t *irsp = NULL;
87f6eaff 3332 IOCB_t *entry = NULL;
dea3101e 3333 struct lpfc_iocbq *cmdiocbq = NULL;
3334 struct lpfc_iocbq rspiocbq;
dea3101e 3335 uint32_t status;
3336 uint32_t portRspPut, portRspMax;
3337 int rc = 1;
3338 lpfc_iocb_type type;
3339 unsigned long iflag;
3340 uint32_t rsp_cmpl = 0;
dea3101e 3341
2e0fef85 3342 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 3343 pring->stats.iocb_event++;
3344
dea3101e 3345 /*
3346 * The next available response entry should never exceed the maximum
3347 * entries. If it does, treat it as an adapter hardware error.
3348 */
7e56aa25 3349 portRspMax = pring->sli.sli3.numRiocb;
dea3101e 3350 portRspPut = le32_to_cpu(pgp->rspPutInx);
3351 if (unlikely(portRspPut >= portRspMax)) {
875fbdfe 3352 lpfc_sli_rsp_pointers_error(phba, pring);
2e0fef85 3353 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 3354 return 1;
3355 }
45ed1190
JS
3356 if (phba->fcp_ring_in_use) {
3357 spin_unlock_irqrestore(&phba->hbalock, iflag);
3358 return 1;
3359 } else
3360 phba->fcp_ring_in_use = 1;
dea3101e 3361
3362 rmb();
7e56aa25 3363 while (pring->sli.sli3.rspidx != portRspPut) {
87f6eaff
JSEC
3364 /*
3365 * Fetch an entry off the ring and copy it into a local data
3366 * structure. The copy involves a byte-swap since the
3367 * network byte order and pci byte orders are different.
3368 */
ed957684 3369 entry = lpfc_resp_iocb(phba, pring);
858c9f6c 3370 phba->last_completion_time = jiffies;
875fbdfe 3371
7e56aa25
JS
3372 if (++pring->sli.sli3.rspidx >= portRspMax)
3373 pring->sli.sli3.rspidx = 0;
875fbdfe 3374
87f6eaff
JSEC
3375 lpfc_sli_pcimem_bcopy((uint32_t *) entry,
3376 (uint32_t *) &rspiocbq.iocb,
ed957684 3377 phba->iocb_rsp_size);
a4bc3379 3378 INIT_LIST_HEAD(&(rspiocbq.list));
87f6eaff
JSEC
3379 irsp = &rspiocbq.iocb;
3380
dea3101e 3381 type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
3382 pring->stats.iocb_rsp++;
3383 rsp_cmpl++;
3384
3385 if (unlikely(irsp->ulpStatus)) {
92d7f7b0
JS
3386 /*
3387 * If resource errors reported from HBA, reduce
3388 * queuedepths of the SCSI device.
3389 */
3390 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
e3d2b802
JS
3391 ((irsp->un.ulpWord[4] & IOERR_PARAM_MASK) ==
3392 IOERR_NO_RESOURCES)) {
92d7f7b0 3393 spin_unlock_irqrestore(&phba->hbalock, iflag);
3772a991 3394 phba->lpfc_rampdown_queue_depth(phba);
92d7f7b0
JS
3395 spin_lock_irqsave(&phba->hbalock, iflag);
3396 }
3397
dea3101e 3398 /* Rsp ring <ringno> error: IOCB */
3399 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
e8b62011 3400 "0336 Rsp Ring %d error: IOCB Data: "
92d7f7b0 3401 "x%x x%x x%x x%x x%x x%x x%x x%x\n",
e8b62011 3402 pring->ringno,
92d7f7b0
JS
3403 irsp->un.ulpWord[0],
3404 irsp->un.ulpWord[1],
3405 irsp->un.ulpWord[2],
3406 irsp->un.ulpWord[3],
3407 irsp->un.ulpWord[4],
3408 irsp->un.ulpWord[5],
d7c255b2
JS
3409 *(uint32_t *)&irsp->un1,
3410 *((uint32_t *)&irsp->un1 + 1));
dea3101e 3411 }
3412
3413 switch (type) {
3414 case LPFC_ABORT_IOCB:
3415 case LPFC_SOL_IOCB:
3416 /*
3417 * Idle exchange closed via ABTS from port. No iocb
3418 * resources need to be recovered.
3419 */
3420 if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
dca9479b 3421 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 3422 "0333 IOCB cmd 0x%x"
dca9479b 3423 " processed. Skipping"
92d7f7b0 3424 " completion\n",
dca9479b 3425 irsp->ulpCommand);
dea3101e 3426 break;
3427 }
3428
604a3e30
JB
3429 cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
3430 &rspiocbq);
0f65ff68
JS
3431 if (unlikely(!cmdiocbq))
3432 break;
3433 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED)
3434 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
3435 if (cmdiocbq->iocb_cmpl) {
3436 spin_unlock_irqrestore(&phba->hbalock, iflag);
3437 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
3438 &rspiocbq);
3439 spin_lock_irqsave(&phba->hbalock, iflag);
3440 }
dea3101e 3441 break;
a4bc3379 3442 case LPFC_UNSOL_IOCB:
2e0fef85 3443 spin_unlock_irqrestore(&phba->hbalock, iflag);
a4bc3379 3444 lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
2e0fef85 3445 spin_lock_irqsave(&phba->hbalock, iflag);
a4bc3379 3446 break;
dea3101e 3447 default:
3448 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
3449 char adaptermsg[LPFC_MAX_ADPTMSG];
3450 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
3451 memcpy(&adaptermsg[0], (uint8_t *) irsp,
3452 MAX_MSG_DATA);
898eb71c
JP
3453 dev_warn(&((phba->pcidev)->dev),
3454 "lpfc%d: %s\n",
dea3101e 3455 phba->brd_no, adaptermsg);
3456 } else {
3457 /* Unknown IOCB command */
3458 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 3459 "0334 Unknown IOCB command "
92d7f7b0 3460 "Data: x%x, x%x x%x x%x x%x\n",
e8b62011 3461 type, irsp->ulpCommand,
92d7f7b0
JS
3462 irsp->ulpStatus,
3463 irsp->ulpIoTag,
3464 irsp->ulpContext);
dea3101e 3465 }
3466 break;
3467 }
3468
3469 /*
3470 * The response IOCB has been processed. Update the ring
3471 * pointer in SLIM. If the port response put pointer has not
3472 * been updated, sync the pgp->rspPutInx and fetch the new port
3473 * response put pointer.
3474 */
7e56aa25
JS
3475 writel(pring->sli.sli3.rspidx,
3476 &phba->host_gp[pring->ringno].rspGetInx);
dea3101e 3477
7e56aa25 3478 if (pring->sli.sli3.rspidx == portRspPut)
dea3101e 3479 portRspPut = le32_to_cpu(pgp->rspPutInx);
3480 }
3481
3482 if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
3483 pring->stats.iocb_rsp_full++;
3484 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
3485 writel(status, phba->CAregaddr);
3486 readl(phba->CAregaddr);
3487 }
3488 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
3489 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
3490 pring->stats.iocb_cmd_empty++;
3491
3492 /* Force update of the local copy of cmdGetInx */
7e56aa25 3493 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e 3494 lpfc_sli_resume_iocb(phba, pring);
3495
3496 if ((pring->lpfc_sli_cmd_available))
3497 (pring->lpfc_sli_cmd_available) (phba, pring);
3498
3499 }
3500
45ed1190 3501 phba->fcp_ring_in_use = 0;
2e0fef85 3502 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 3503 return rc;
3504}
3505
e59058c4 3506/**
3772a991
JS
3507 * lpfc_sli_sp_handle_rspiocb - Handle slow-path response iocb
3508 * @phba: Pointer to HBA context object.
3509 * @pring: Pointer to driver SLI ring object.
3510 * @rspiocbp: Pointer to driver response IOCB object.
3511 *
3512 * This function is called from the worker thread when there is a slow-path
3513 * response IOCB to process. This function chains all the response iocbs until
3514 * seeing the iocb with the LE bit set. The function will call
3515 * lpfc_sli_process_sol_iocb function if the response iocb indicates a
3516 * completion of a command iocb. The function will call the
3517 * lpfc_sli_process_unsol_iocb function if this is an unsolicited iocb.
3518 * The function frees the resources or calls the completion handler if this
3519 * iocb is an abort completion. The function returns NULL when the response
3520 * iocb has the LE bit set and all the chained iocbs are processed, otherwise
3521 * this function shall chain the iocb on to the iocb_continueq and return the
3522 * response iocb passed in.
3523 **/
3524static struct lpfc_iocbq *
3525lpfc_sli_sp_handle_rspiocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
3526 struct lpfc_iocbq *rspiocbp)
3527{
3528 struct lpfc_iocbq *saveq;
3529 struct lpfc_iocbq *cmdiocbp;
3530 struct lpfc_iocbq *next_iocb;
3531 IOCB_t *irsp = NULL;
3532 uint32_t free_saveq;
3533 uint8_t iocb_cmd_type;
3534 lpfc_iocb_type type;
3535 unsigned long iflag;
3536 int rc;
3537
3538 spin_lock_irqsave(&phba->hbalock, iflag);
3539 /* First add the response iocb to the countinueq list */
3540 list_add_tail(&rspiocbp->list, &(pring->iocb_continueq));
3541 pring->iocb_continueq_cnt++;
3542
70f23fd6 3543 /* Now, determine whether the list is completed for processing */
3772a991
JS
3544 irsp = &rspiocbp->iocb;
3545 if (irsp->ulpLe) {
3546 /*
3547 * By default, the driver expects to free all resources
3548 * associated with this iocb completion.
3549 */
3550 free_saveq = 1;
3551 saveq = list_get_first(&pring->iocb_continueq,
3552 struct lpfc_iocbq, list);
3553 irsp = &(saveq->iocb);
3554 list_del_init(&pring->iocb_continueq);
3555 pring->iocb_continueq_cnt = 0;
3556
3557 pring->stats.iocb_rsp++;
3558
3559 /*
3560 * If resource errors reported from HBA, reduce
3561 * queuedepths of the SCSI device.
3562 */
3563 if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
e3d2b802
JS
3564 ((irsp->un.ulpWord[4] & IOERR_PARAM_MASK) ==
3565 IOERR_NO_RESOURCES)) {
3772a991
JS
3566 spin_unlock_irqrestore(&phba->hbalock, iflag);
3567 phba->lpfc_rampdown_queue_depth(phba);
3568 spin_lock_irqsave(&phba->hbalock, iflag);
3569 }
3570
3571 if (irsp->ulpStatus) {
3572 /* Rsp ring <ringno> error: IOCB */
3573 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
3574 "0328 Rsp Ring %d error: "
3575 "IOCB Data: "
3576 "x%x x%x x%x x%x "
3577 "x%x x%x x%x x%x "
3578 "x%x x%x x%x x%x "
3579 "x%x x%x x%x x%x\n",
3580 pring->ringno,
3581 irsp->un.ulpWord[0],
3582 irsp->un.ulpWord[1],
3583 irsp->un.ulpWord[2],
3584 irsp->un.ulpWord[3],
3585 irsp->un.ulpWord[4],
3586 irsp->un.ulpWord[5],
3587 *(((uint32_t *) irsp) + 6),
3588 *(((uint32_t *) irsp) + 7),
3589 *(((uint32_t *) irsp) + 8),
3590 *(((uint32_t *) irsp) + 9),
3591 *(((uint32_t *) irsp) + 10),
3592 *(((uint32_t *) irsp) + 11),
3593 *(((uint32_t *) irsp) + 12),
3594 *(((uint32_t *) irsp) + 13),
3595 *(((uint32_t *) irsp) + 14),
3596 *(((uint32_t *) irsp) + 15));
3597 }
3598
3599 /*
3600 * Fetch the IOCB command type and call the correct completion
3601 * routine. Solicited and Unsolicited IOCBs on the ELS ring
3602 * get freed back to the lpfc_iocb_list by the discovery
3603 * kernel thread.
3604 */
3605 iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
3606 type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
3607 switch (type) {
3608 case LPFC_SOL_IOCB:
3609 spin_unlock_irqrestore(&phba->hbalock, iflag);
3610 rc = lpfc_sli_process_sol_iocb(phba, pring, saveq);
3611 spin_lock_irqsave(&phba->hbalock, iflag);
3612 break;
3613
3614 case LPFC_UNSOL_IOCB:
3615 spin_unlock_irqrestore(&phba->hbalock, iflag);
3616 rc = lpfc_sli_process_unsol_iocb(phba, pring, saveq);
3617 spin_lock_irqsave(&phba->hbalock, iflag);
3618 if (!rc)
3619 free_saveq = 0;
3620 break;
3621
3622 case LPFC_ABORT_IOCB:
3623 cmdiocbp = NULL;
3624 if (irsp->ulpCommand != CMD_XRI_ABORTED_CX)
3625 cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring,
3626 saveq);
3627 if (cmdiocbp) {
3628 /* Call the specified completion routine */
3629 if (cmdiocbp->iocb_cmpl) {
3630 spin_unlock_irqrestore(&phba->hbalock,
3631 iflag);
3632 (cmdiocbp->iocb_cmpl)(phba, cmdiocbp,
3633 saveq);
3634 spin_lock_irqsave(&phba->hbalock,
3635 iflag);
3636 } else
3637 __lpfc_sli_release_iocbq(phba,
3638 cmdiocbp);
3639 }
3640 break;
3641
3642 case LPFC_UNKNOWN_IOCB:
3643 if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
3644 char adaptermsg[LPFC_MAX_ADPTMSG];
3645 memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
3646 memcpy(&adaptermsg[0], (uint8_t *)irsp,
3647 MAX_MSG_DATA);
3648 dev_warn(&((phba->pcidev)->dev),
3649 "lpfc%d: %s\n",
3650 phba->brd_no, adaptermsg);
3651 } else {
3652 /* Unknown IOCB command */
3653 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3654 "0335 Unknown IOCB "
3655 "command Data: x%x "
3656 "x%x x%x x%x\n",
3657 irsp->ulpCommand,
3658 irsp->ulpStatus,
3659 irsp->ulpIoTag,
3660 irsp->ulpContext);
3661 }
3662 break;
3663 }
3664
3665 if (free_saveq) {
3666 list_for_each_entry_safe(rspiocbp, next_iocb,
3667 &saveq->list, list) {
61f35bff 3668 list_del_init(&rspiocbp->list);
3772a991
JS
3669 __lpfc_sli_release_iocbq(phba, rspiocbp);
3670 }
3671 __lpfc_sli_release_iocbq(phba, saveq);
3672 }
3673 rspiocbp = NULL;
3674 }
3675 spin_unlock_irqrestore(&phba->hbalock, iflag);
3676 return rspiocbp;
3677}
3678
3679/**
3680 * lpfc_sli_handle_slow_ring_event - Wrapper func for handling slow-path iocbs
e59058c4
JS
3681 * @phba: Pointer to HBA context object.
3682 * @pring: Pointer to driver SLI ring object.
3683 * @mask: Host attention register mask for this ring.
3684 *
3772a991
JS
3685 * This routine wraps the actual slow_ring event process routine from the
3686 * API jump table function pointer from the lpfc_hba struct.
e59058c4 3687 **/
3772a991 3688void
2e0fef85
JS
3689lpfc_sli_handle_slow_ring_event(struct lpfc_hba *phba,
3690 struct lpfc_sli_ring *pring, uint32_t mask)
3772a991
JS
3691{
3692 phba->lpfc_sli_handle_slow_ring_event(phba, pring, mask);
3693}
3694
3695/**
3696 * lpfc_sli_handle_slow_ring_event_s3 - Handle SLI3 ring event for non-FCP rings
3697 * @phba: Pointer to HBA context object.
3698 * @pring: Pointer to driver SLI ring object.
3699 * @mask: Host attention register mask for this ring.
3700 *
3701 * This function is called from the worker thread when there is a ring event
3702 * for non-fcp rings. The caller does not hold any lock. The function will
3703 * remove each response iocb in the response ring and calls the handle
3704 * response iocb routine (lpfc_sli_sp_handle_rspiocb) to process it.
3705 **/
3706static void
3707lpfc_sli_handle_slow_ring_event_s3(struct lpfc_hba *phba,
3708 struct lpfc_sli_ring *pring, uint32_t mask)
dea3101e 3709{
34b02dcd 3710 struct lpfc_pgp *pgp;
dea3101e 3711 IOCB_t *entry;
3712 IOCB_t *irsp = NULL;
3713 struct lpfc_iocbq *rspiocbp = NULL;
dea3101e 3714 uint32_t portRspPut, portRspMax;
dea3101e 3715 unsigned long iflag;
3772a991 3716 uint32_t status;
dea3101e 3717
34b02dcd 3718 pgp = &phba->port_gp[pring->ringno];
2e0fef85 3719 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 3720 pring->stats.iocb_event++;
3721
dea3101e 3722 /*
3723 * The next available response entry should never exceed the maximum
3724 * entries. If it does, treat it as an adapter hardware error.
3725 */
7e56aa25 3726 portRspMax = pring->sli.sli3.numRiocb;
dea3101e 3727 portRspPut = le32_to_cpu(pgp->rspPutInx);
3728 if (portRspPut >= portRspMax) {
3729 /*
025dfdaf 3730 * Ring <ringno> handler: portRspPut <portRspPut> is bigger than
dea3101e 3731 * rsp ring <portRspMax>
3732 */
ed957684 3733 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011 3734 "0303 Ring %d handler: portRspPut %d "
025dfdaf 3735 "is bigger than rsp ring %d\n",
e8b62011 3736 pring->ringno, portRspPut, portRspMax);
dea3101e 3737
2e0fef85
JS
3738 phba->link_state = LPFC_HBA_ERROR;
3739 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 3740
3741 phba->work_hs = HS_FFER3;
3742 lpfc_handle_eratt(phba);
3743
3772a991 3744 return;
dea3101e 3745 }
3746
3747 rmb();
7e56aa25 3748 while (pring->sli.sli3.rspidx != portRspPut) {
dea3101e 3749 /*
3750 * Build a completion list and call the appropriate handler.
3751 * The process is to get the next available response iocb, get
3752 * a free iocb from the list, copy the response data into the
3753 * free iocb, insert to the continuation list, and update the
3754 * next response index to slim. This process makes response
3755 * iocb's in the ring available to DMA as fast as possible but
3756 * pays a penalty for a copy operation. Since the iocb is
3757 * only 32 bytes, this penalty is considered small relative to
3758 * the PCI reads for register values and a slim write. When
3759 * the ulpLe field is set, the entire Command has been
3760 * received.
3761 */
ed957684
JS
3762 entry = lpfc_resp_iocb(phba, pring);
3763
858c9f6c 3764 phba->last_completion_time = jiffies;
2e0fef85 3765 rspiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e 3766 if (rspiocbp == NULL) {
3767 printk(KERN_ERR "%s: out of buffers! Failing "
cadbd4a5 3768 "completion.\n", __func__);
dea3101e 3769 break;
3770 }
3771
ed957684
JS
3772 lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb,
3773 phba->iocb_rsp_size);
dea3101e 3774 irsp = &rspiocbp->iocb;
3775
7e56aa25
JS
3776 if (++pring->sli.sli3.rspidx >= portRspMax)
3777 pring->sli.sli3.rspidx = 0;
dea3101e 3778
a58cbd52
JS
3779 if (pring->ringno == LPFC_ELS_RING) {
3780 lpfc_debugfs_slow_ring_trc(phba,
3781 "IOCB rsp ring: wd4:x%08x wd6:x%08x wd7:x%08x",
3782 *(((uint32_t *) irsp) + 4),
3783 *(((uint32_t *) irsp) + 6),
3784 *(((uint32_t *) irsp) + 7));
3785 }
3786
7e56aa25
JS
3787 writel(pring->sli.sli3.rspidx,
3788 &phba->host_gp[pring->ringno].rspGetInx);
dea3101e 3789
3772a991
JS
3790 spin_unlock_irqrestore(&phba->hbalock, iflag);
3791 /* Handle the response IOCB */
3792 rspiocbp = lpfc_sli_sp_handle_rspiocb(phba, pring, rspiocbp);
3793 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 3794
3795 /*
3796 * If the port response put pointer has not been updated, sync
3797 * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
3798 * response put pointer.
3799 */
7e56aa25 3800 if (pring->sli.sli3.rspidx == portRspPut) {
dea3101e 3801 portRspPut = le32_to_cpu(pgp->rspPutInx);
3802 }
7e56aa25 3803 } /* while (pring->sli.sli3.rspidx != portRspPut) */
dea3101e 3804
92d7f7b0 3805 if ((rspiocbp != NULL) && (mask & HA_R0RE_REQ)) {
dea3101e 3806 /* At least one response entry has been freed */
3807 pring->stats.iocb_rsp_full++;
3808 /* SET RxRE_RSP in Chip Att register */
3809 status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
3810 writel(status, phba->CAregaddr);
3811 readl(phba->CAregaddr); /* flush */
3812 }
3813 if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
3814 pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
3815 pring->stats.iocb_cmd_empty++;
3816
3817 /* Force update of the local copy of cmdGetInx */
7e56aa25 3818 pring->sli.sli3.local_getidx = le32_to_cpu(pgp->cmdGetInx);
dea3101e 3819 lpfc_sli_resume_iocb(phba, pring);
3820
3821 if ((pring->lpfc_sli_cmd_available))
3822 (pring->lpfc_sli_cmd_available) (phba, pring);
3823
3824 }
3825
2e0fef85 3826 spin_unlock_irqrestore(&phba->hbalock, iflag);
3772a991 3827 return;
dea3101e 3828}
3829
4f774513
JS
3830/**
3831 * lpfc_sli_handle_slow_ring_event_s4 - Handle SLI4 slow-path els events
3832 * @phba: Pointer to HBA context object.
3833 * @pring: Pointer to driver SLI ring object.
3834 * @mask: Host attention register mask for this ring.
3835 *
3836 * This function is called from the worker thread when there is a pending
3837 * ELS response iocb on the driver internal slow-path response iocb worker
3838 * queue. The caller does not hold any lock. The function will remove each
3839 * response iocb from the response worker queue and calls the handle
3840 * response iocb routine (lpfc_sli_sp_handle_rspiocb) to process it.
3841 **/
3842static void
3843lpfc_sli_handle_slow_ring_event_s4(struct lpfc_hba *phba,
3844 struct lpfc_sli_ring *pring, uint32_t mask)
3845{
3846 struct lpfc_iocbq *irspiocbq;
4d9ab994
JS
3847 struct hbq_dmabuf *dmabuf;
3848 struct lpfc_cq_event *cq_event;
4f774513 3849 unsigned long iflag;
0ef01a2d 3850 int count = 0;
4f774513 3851
45ed1190
JS
3852 spin_lock_irqsave(&phba->hbalock, iflag);
3853 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
3854 spin_unlock_irqrestore(&phba->hbalock, iflag);
3855 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
4f774513
JS
3856 /* Get the response iocb from the head of work queue */
3857 spin_lock_irqsave(&phba->hbalock, iflag);
45ed1190 3858 list_remove_head(&phba->sli4_hba.sp_queue_event,
4d9ab994 3859 cq_event, struct lpfc_cq_event, list);
4f774513 3860 spin_unlock_irqrestore(&phba->hbalock, iflag);
4d9ab994
JS
3861
3862 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
3863 case CQE_CODE_COMPL_WQE:
3864 irspiocbq = container_of(cq_event, struct lpfc_iocbq,
3865 cq_event);
45ed1190
JS
3866 /* Translate ELS WCQE to response IOCBQ */
3867 irspiocbq = lpfc_sli4_els_wcqe_to_rspiocbq(phba,
3868 irspiocbq);
3869 if (irspiocbq)
3870 lpfc_sli_sp_handle_rspiocb(phba, pring,
3871 irspiocbq);
0ef01a2d 3872 count++;
4d9ab994
JS
3873 break;
3874 case CQE_CODE_RECEIVE:
7851fe2c 3875 case CQE_CODE_RECEIVE_V1:
4d9ab994
JS
3876 dmabuf = container_of(cq_event, struct hbq_dmabuf,
3877 cq_event);
3878 lpfc_sli4_handle_received_buffer(phba, dmabuf);
0ef01a2d 3879 count++;
4d9ab994
JS
3880 break;
3881 default:
3882 break;
3883 }
0ef01a2d
JS
3884
3885 /* Limit the number of events to 64 to avoid soft lockups */
3886 if (count == 64)
3887 break;
4f774513
JS
3888 }
3889}
3890
e59058c4 3891/**
3621a710 3892 * lpfc_sli_abort_iocb_ring - Abort all iocbs in the ring
e59058c4
JS
3893 * @phba: Pointer to HBA context object.
3894 * @pring: Pointer to driver SLI ring object.
3895 *
3896 * This function aborts all iocbs in the given ring and frees all the iocb
3897 * objects in txq. This function issues an abort iocb for all the iocb commands
3898 * in txcmplq. The iocbs in the txcmplq is not guaranteed to complete before
3899 * the return of this function. The caller is not required to hold any locks.
3900 **/
2e0fef85 3901void
dea3101e 3902lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
3903{
2534ba75 3904 LIST_HEAD(completions);
dea3101e 3905 struct lpfc_iocbq *iocb, *next_iocb;
dea3101e 3906
92d7f7b0
JS
3907 if (pring->ringno == LPFC_ELS_RING) {
3908 lpfc_fabric_abort_hba(phba);
3909 }
3910
dea3101e 3911 /* Error everything on txq and txcmplq
3912 * First do the txq.
3913 */
db55fba8
JS
3914 if (phba->sli_rev >= LPFC_SLI_REV4) {
3915 spin_lock_irq(&pring->ring_lock);
3916 list_splice_init(&pring->txq, &completions);
3917 pring->txq_cnt = 0;
3918 spin_unlock_irq(&pring->ring_lock);
dea3101e 3919
db55fba8
JS
3920 spin_lock_irq(&phba->hbalock);
3921 /* Next issue ABTS for everything on the txcmplq */
3922 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
3923 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
3924 spin_unlock_irq(&phba->hbalock);
3925 } else {
3926 spin_lock_irq(&phba->hbalock);
3927 list_splice_init(&pring->txq, &completions);
3928 pring->txq_cnt = 0;
dea3101e 3929
db55fba8
JS
3930 /* Next issue ABTS for everything on the txcmplq */
3931 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
3932 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
3933 spin_unlock_irq(&phba->hbalock);
3934 }
dea3101e 3935
a257bf90
JS
3936 /* Cancel all the IOCBs from the completions list */
3937 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
3938 IOERR_SLI_ABORTED);
dea3101e 3939}
3940
895427bd
JS
3941/**
3942 * lpfc_sli_abort_wqe_ring - Abort all iocbs in the ring
3943 * @phba: Pointer to HBA context object.
3944 * @pring: Pointer to driver SLI ring object.
3945 *
3946 * This function aborts all iocbs in the given ring and frees all the iocb
3947 * objects in txq. This function issues an abort iocb for all the iocb commands
3948 * in txcmplq. The iocbs in the txcmplq is not guaranteed to complete before
3949 * the return of this function. The caller is not required to hold any locks.
3950 **/
3951void
3952lpfc_sli_abort_wqe_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
3953{
3954 LIST_HEAD(completions);
3955 struct lpfc_iocbq *iocb, *next_iocb;
3956
3957 if (pring->ringno == LPFC_ELS_RING)
3958 lpfc_fabric_abort_hba(phba);
3959
3960 spin_lock_irq(&phba->hbalock);
3961 /* Next issue ABTS for everything on the txcmplq */
3962 list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
3963 lpfc_sli4_abort_nvme_io(phba, pring, iocb);
3964 spin_unlock_irq(&phba->hbalock);
3965}
3966
3967
db55fba8
JS
3968/**
3969 * lpfc_sli_abort_fcp_rings - Abort all iocbs in all FCP rings
3970 * @phba: Pointer to HBA context object.
3971 * @pring: Pointer to driver SLI ring object.
3972 *
3973 * This function aborts all iocbs in FCP rings and frees all the iocb
3974 * objects in txq. This function issues an abort iocb for all the iocb commands
3975 * in txcmplq. The iocbs in the txcmplq is not guaranteed to complete before
3976 * the return of this function. The caller is not required to hold any locks.
3977 **/
3978void
3979lpfc_sli_abort_fcp_rings(struct lpfc_hba *phba)
3980{
3981 struct lpfc_sli *psli = &phba->sli;
3982 struct lpfc_sli_ring *pring;
3983 uint32_t i;
3984
3985 /* Look on all the FCP Rings for the iotag */
3986 if (phba->sli_rev >= LPFC_SLI_REV4) {
cdb42bec
JS
3987 for (i = 0; i < phba->cfg_hdw_queue; i++) {
3988 pring = phba->sli4_hba.hdwq[i].fcp_wq->pring;
db55fba8
JS
3989 lpfc_sli_abort_iocb_ring(phba, pring);
3990 }
3991 } else {
895427bd 3992 pring = &psli->sli3_ring[LPFC_FCP_RING];
db55fba8
JS
3993 lpfc_sli_abort_iocb_ring(phba, pring);
3994 }
3995}
3996
895427bd
JS
3997/**
3998 * lpfc_sli_abort_nvme_rings - Abort all wqes in all NVME rings
3999 * @phba: Pointer to HBA context object.
4000 *
4001 * This function aborts all wqes in NVME rings. This function issues an
4002 * abort wqe for all the outstanding IO commands in txcmplq. The iocbs in
4003 * the txcmplq is not guaranteed to complete before the return of this
4004 * function. The caller is not required to hold any locks.
4005 **/
4006void
4007lpfc_sli_abort_nvme_rings(struct lpfc_hba *phba)
4008{
4009 struct lpfc_sli_ring *pring;
4010 uint32_t i;
4011
cdb42bec
JS
4012 if ((phba->sli_rev < LPFC_SLI_REV4) ||
4013 !(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
895427bd
JS
4014 return;
4015
4016 /* Abort all IO on each NVME ring. */
cdb42bec
JS
4017 for (i = 0; i < phba->cfg_hdw_queue; i++) {
4018 pring = phba->sli4_hba.hdwq[i].nvme_wq->pring;
895427bd
JS
4019 lpfc_sli_abort_wqe_ring(phba, pring);
4020 }
4021}
4022
db55fba8 4023
a8e497d5 4024/**
3621a710 4025 * lpfc_sli_flush_fcp_rings - flush all iocbs in the fcp ring
a8e497d5
JS
4026 * @phba: Pointer to HBA context object.
4027 *
4028 * This function flushes all iocbs in the fcp ring and frees all the iocb
4029 * objects in txq and txcmplq. This function will not issue abort iocbs
4030 * for all the iocb commands in txcmplq, they will just be returned with
4031 * IOERR_SLI_DOWN. This function is invoked with EEH when device's PCI
4032 * slot has been permanently disabled.
4033 **/
4034void
4035lpfc_sli_flush_fcp_rings(struct lpfc_hba *phba)
4036{
4037 LIST_HEAD(txq);
4038 LIST_HEAD(txcmplq);
a8e497d5
JS
4039 struct lpfc_sli *psli = &phba->sli;
4040 struct lpfc_sli_ring *pring;
db55fba8 4041 uint32_t i;
c1dd9111 4042 struct lpfc_iocbq *piocb, *next_iocb;
a8e497d5
JS
4043
4044 spin_lock_irq(&phba->hbalock);
4f2e66c6
JS
4045 /* Indicate the I/O queues are flushed */
4046 phba->hba_flag |= HBA_FCP_IOQ_FLUSH;
a8e497d5
JS
4047 spin_unlock_irq(&phba->hbalock);
4048
db55fba8
JS
4049 /* Look on all the FCP Rings for the iotag */
4050 if (phba->sli_rev >= LPFC_SLI_REV4) {
cdb42bec
JS
4051 for (i = 0; i < phba->cfg_hdw_queue; i++) {
4052 pring = phba->sli4_hba.hdwq[i].fcp_wq->pring;
db55fba8
JS
4053
4054 spin_lock_irq(&pring->ring_lock);
4055 /* Retrieve everything on txq */
4056 list_splice_init(&pring->txq, &txq);
c1dd9111
JS
4057 list_for_each_entry_safe(piocb, next_iocb,
4058 &pring->txcmplq, list)
4059 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
db55fba8
JS
4060 /* Retrieve everything on the txcmplq */
4061 list_splice_init(&pring->txcmplq, &txcmplq);
4062 pring->txq_cnt = 0;
4063 pring->txcmplq_cnt = 0;
4064 spin_unlock_irq(&pring->ring_lock);
4065
4066 /* Flush the txq */
4067 lpfc_sli_cancel_iocbs(phba, &txq,
4068 IOSTAT_LOCAL_REJECT,
4069 IOERR_SLI_DOWN);
4070 /* Flush the txcmpq */
4071 lpfc_sli_cancel_iocbs(phba, &txcmplq,
4072 IOSTAT_LOCAL_REJECT,
4073 IOERR_SLI_DOWN);
4074 }
4075 } else {
895427bd 4076 pring = &psli->sli3_ring[LPFC_FCP_RING];
a8e497d5 4077
db55fba8
JS
4078 spin_lock_irq(&phba->hbalock);
4079 /* Retrieve everything on txq */
4080 list_splice_init(&pring->txq, &txq);
c1dd9111
JS
4081 list_for_each_entry_safe(piocb, next_iocb,
4082 &pring->txcmplq, list)
4083 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
db55fba8
JS
4084 /* Retrieve everything on the txcmplq */
4085 list_splice_init(&pring->txcmplq, &txcmplq);
4086 pring->txq_cnt = 0;
4087 pring->txcmplq_cnt = 0;
4088 spin_unlock_irq(&phba->hbalock);
4089
4090 /* Flush the txq */
4091 lpfc_sli_cancel_iocbs(phba, &txq, IOSTAT_LOCAL_REJECT,
4092 IOERR_SLI_DOWN);
4093 /* Flush the txcmpq */
4094 lpfc_sli_cancel_iocbs(phba, &txcmplq, IOSTAT_LOCAL_REJECT,
4095 IOERR_SLI_DOWN);
4096 }
a8e497d5
JS
4097}
4098
895427bd
JS
4099/**
4100 * lpfc_sli_flush_nvme_rings - flush all wqes in the nvme rings
4101 * @phba: Pointer to HBA context object.
4102 *
4103 * This function flushes all wqes in the nvme rings and frees all resources
4104 * in the txcmplq. This function does not issue abort wqes for the IO
4105 * commands in txcmplq, they will just be returned with
4106 * IOERR_SLI_DOWN. This function is invoked with EEH when device's PCI
4107 * slot has been permanently disabled.
4108 **/
4109void
4110lpfc_sli_flush_nvme_rings(struct lpfc_hba *phba)
4111{
4112 LIST_HEAD(txcmplq);
4113 struct lpfc_sli_ring *pring;
4114 uint32_t i;
c1dd9111 4115 struct lpfc_iocbq *piocb, *next_iocb;
895427bd 4116
cdb42bec
JS
4117 if ((phba->sli_rev < LPFC_SLI_REV4) ||
4118 !(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
895427bd
JS
4119 return;
4120
4121 /* Hint to other driver operations that a flush is in progress. */
4122 spin_lock_irq(&phba->hbalock);
4123 phba->hba_flag |= HBA_NVME_IOQ_FLUSH;
4124 spin_unlock_irq(&phba->hbalock);
4125
4126 /* Cycle through all NVME rings and complete each IO with
4127 * a local driver reason code. This is a flush so no
4128 * abort exchange to FW.
4129 */
cdb42bec
JS
4130 for (i = 0; i < phba->cfg_hdw_queue; i++) {
4131 pring = phba->sli4_hba.hdwq[i].nvme_wq->pring;
895427bd 4132
895427bd 4133 spin_lock_irq(&pring->ring_lock);
c1dd9111
JS
4134 list_for_each_entry_safe(piocb, next_iocb,
4135 &pring->txcmplq, list)
4136 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
4137 /* Retrieve everything on the txcmplq */
895427bd
JS
4138 list_splice_init(&pring->txcmplq, &txcmplq);
4139 pring->txcmplq_cnt = 0;
4140 spin_unlock_irq(&pring->ring_lock);
4141
4142 /* Flush the txcmpq &&&PAE */
4143 lpfc_sli_cancel_iocbs(phba, &txcmplq,
4144 IOSTAT_LOCAL_REJECT,
4145 IOERR_SLI_DOWN);
4146 }
4147}
4148
e59058c4 4149/**
3772a991 4150 * lpfc_sli_brdready_s3 - Check for sli3 host ready status
e59058c4
JS
4151 * @phba: Pointer to HBA context object.
4152 * @mask: Bit mask to be checked.
4153 *
4154 * This function reads the host status register and compares
4155 * with the provided bit mask to check if HBA completed
4156 * the restart. This function will wait in a loop for the
4157 * HBA to complete restart. If the HBA does not restart within
4158 * 15 iterations, the function will reset the HBA again. The
4159 * function returns 1 when HBA fail to restart otherwise returns
4160 * zero.
4161 **/
3772a991
JS
4162static int
4163lpfc_sli_brdready_s3(struct lpfc_hba *phba, uint32_t mask)
dea3101e 4164{
41415862
JW
4165 uint32_t status;
4166 int i = 0;
4167 int retval = 0;
dea3101e 4168
41415862 4169 /* Read the HBA Host Status Register */
9940b97b
JS
4170 if (lpfc_readl(phba->HSregaddr, &status))
4171 return 1;
dea3101e 4172
41415862
JW
4173 /*
4174 * Check status register every 100ms for 5 retries, then every
4175 * 500ms for 5, then every 2.5 sec for 5, then reset board and
4176 * every 2.5 sec for 4.
4177 * Break our of the loop if errors occurred during init.
4178 */
4179 while (((status & mask) != mask) &&
4180 !(status & HS_FFERM) &&
4181 i++ < 20) {
dea3101e 4182
41415862
JW
4183 if (i <= 5)
4184 msleep(10);
4185 else if (i <= 10)
4186 msleep(500);
4187 else
4188 msleep(2500);
dea3101e 4189
41415862 4190 if (i == 15) {
2e0fef85 4191 /* Do post */
92d7f7b0 4192 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862
JW
4193 lpfc_sli_brdrestart(phba);
4194 }
4195 /* Read the HBA Host Status Register */
9940b97b
JS
4196 if (lpfc_readl(phba->HSregaddr, &status)) {
4197 retval = 1;
4198 break;
4199 }
41415862 4200 }
dea3101e 4201
41415862
JW
4202 /* Check to see if any errors occurred during init */
4203 if ((status & HS_FFERM) || (i >= 20)) {
e40a02c1
JS
4204 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4205 "2751 Adapter failed to restart, "
4206 "status reg x%x, FW Data: A8 x%x AC x%x\n",
4207 status,
4208 readl(phba->MBslimaddr + 0xa8),
4209 readl(phba->MBslimaddr + 0xac));
2e0fef85 4210 phba->link_state = LPFC_HBA_ERROR;
41415862 4211 retval = 1;
dea3101e 4212 }
dea3101e 4213
41415862
JW
4214 return retval;
4215}
dea3101e 4216
da0436e9
JS
4217/**
4218 * lpfc_sli_brdready_s4 - Check for sli4 host ready status
4219 * @phba: Pointer to HBA context object.
4220 * @mask: Bit mask to be checked.
4221 *
4222 * This function checks the host status register to check if HBA is
4223 * ready. This function will wait in a loop for the HBA to be ready
4224 * If the HBA is not ready , the function will will reset the HBA PCI
4225 * function again. The function returns 1 when HBA fail to be ready
4226 * otherwise returns zero.
4227 **/
4228static int
4229lpfc_sli_brdready_s4(struct lpfc_hba *phba, uint32_t mask)
4230{
4231 uint32_t status;
4232 int retval = 0;
4233
4234 /* Read the HBA Host Status Register */
4235 status = lpfc_sli4_post_status_check(phba);
4236
4237 if (status) {
4238 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
4239 lpfc_sli_brdrestart(phba);
4240 status = lpfc_sli4_post_status_check(phba);
4241 }
4242
4243 /* Check to see if any errors occurred during init */
4244 if (status) {
4245 phba->link_state = LPFC_HBA_ERROR;
4246 retval = 1;
4247 } else
4248 phba->sli4_hba.intr_enable = 0;
4249
4250 return retval;
4251}
4252
4253/**
4254 * lpfc_sli_brdready - Wrapper func for checking the hba readyness
4255 * @phba: Pointer to HBA context object.
4256 * @mask: Bit mask to be checked.
4257 *
4258 * This routine wraps the actual SLI3 or SLI4 hba readyness check routine
4259 * from the API jump table function pointer from the lpfc_hba struct.
4260 **/
4261int
4262lpfc_sli_brdready(struct lpfc_hba *phba, uint32_t mask)
4263{
4264 return phba->lpfc_sli_brdready(phba, mask);
4265}
4266
9290831f
JS
4267#define BARRIER_TEST_PATTERN (0xdeadbeef)
4268
e59058c4 4269/**
3621a710 4270 * lpfc_reset_barrier - Make HBA ready for HBA reset
e59058c4
JS
4271 * @phba: Pointer to HBA context object.
4272 *
1b51197d
JS
4273 * This function is called before resetting an HBA. This function is called
4274 * with hbalock held and requests HBA to quiesce DMAs before a reset.
e59058c4 4275 **/
2e0fef85 4276void lpfc_reset_barrier(struct lpfc_hba *phba)
9290831f 4277{
65a29c16
JS
4278 uint32_t __iomem *resp_buf;
4279 uint32_t __iomem *mbox_buf;
9290831f 4280 volatile uint32_t mbox;
9940b97b 4281 uint32_t hc_copy, ha_copy, resp_data;
9290831f
JS
4282 int i;
4283 uint8_t hdrtype;
4284
1c2ba475
JT
4285 lockdep_assert_held(&phba->hbalock);
4286
9290831f
JS
4287 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
4288 if (hdrtype != 0x80 ||
4289 (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
4290 FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
4291 return;
4292
4293 /*
4294 * Tell the other part of the chip to suspend temporarily all
4295 * its DMA activity.
4296 */
65a29c16 4297 resp_buf = phba->MBslimaddr;
9290831f
JS
4298
4299 /* Disable the error attention */
9940b97b
JS
4300 if (lpfc_readl(phba->HCregaddr, &hc_copy))
4301 return;
9290831f
JS
4302 writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
4303 readl(phba->HCregaddr); /* flush */
2e0fef85 4304 phba->link_flag |= LS_IGNORE_ERATT;
9290831f 4305
9940b97b
JS
4306 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4307 return;
4308 if (ha_copy & HA_ERATT) {
9290831f
JS
4309 /* Clear Chip error bit */
4310 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4311 phba->pport->stopped = 1;
9290831f
JS
4312 }
4313
4314 mbox = 0;
4315 ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
4316 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
4317
4318 writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
65a29c16 4319 mbox_buf = phba->MBslimaddr;
9290831f
JS
4320 writel(mbox, mbox_buf);
4321
9940b97b
JS
4322 for (i = 0; i < 50; i++) {
4323 if (lpfc_readl((resp_buf + 1), &resp_data))
4324 return;
4325 if (resp_data != ~(BARRIER_TEST_PATTERN))
4326 mdelay(1);
4327 else
4328 break;
4329 }
4330 resp_data = 0;
4331 if (lpfc_readl((resp_buf + 1), &resp_data))
4332 return;
4333 if (resp_data != ~(BARRIER_TEST_PATTERN)) {
f4b4c68f 4334 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE ||
2e0fef85 4335 phba->pport->stopped)
9290831f
JS
4336 goto restore_hc;
4337 else
4338 goto clear_errat;
4339 }
4340
4341 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
9940b97b
JS
4342 resp_data = 0;
4343 for (i = 0; i < 500; i++) {
4344 if (lpfc_readl(resp_buf, &resp_data))
4345 return;
4346 if (resp_data != mbox)
4347 mdelay(1);
4348 else
4349 break;
4350 }
9290831f
JS
4351
4352clear_errat:
4353
9940b97b
JS
4354 while (++i < 500) {
4355 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4356 return;
4357 if (!(ha_copy & HA_ERATT))
4358 mdelay(1);
4359 else
4360 break;
4361 }
9290831f
JS
4362
4363 if (readl(phba->HAregaddr) & HA_ERATT) {
4364 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4365 phba->pport->stopped = 1;
9290831f
JS
4366 }
4367
4368restore_hc:
2e0fef85 4369 phba->link_flag &= ~LS_IGNORE_ERATT;
9290831f
JS
4370 writel(hc_copy, phba->HCregaddr);
4371 readl(phba->HCregaddr); /* flush */
4372}
4373
e59058c4 4374/**
3621a710 4375 * lpfc_sli_brdkill - Issue a kill_board mailbox command
e59058c4
JS
4376 * @phba: Pointer to HBA context object.
4377 *
4378 * This function issues a kill_board mailbox command and waits for
4379 * the error attention interrupt. This function is called for stopping
4380 * the firmware processing. The caller is not required to hold any
4381 * locks. This function calls lpfc_hba_down_post function to free
4382 * any pending commands after the kill. The function will return 1 when it
4383 * fails to kill the board else will return 0.
4384 **/
41415862 4385int
2e0fef85 4386lpfc_sli_brdkill(struct lpfc_hba *phba)
41415862
JW
4387{
4388 struct lpfc_sli *psli;
4389 LPFC_MBOXQ_t *pmb;
4390 uint32_t status;
4391 uint32_t ha_copy;
4392 int retval;
4393 int i = 0;
dea3101e 4394
41415862 4395 psli = &phba->sli;
dea3101e 4396
41415862 4397 /* Kill HBA */
ed957684 4398 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011
JS
4399 "0329 Kill HBA Data: x%x x%x\n",
4400 phba->pport->port_state, psli->sli_flag);
41415862 4401
98c9ea5c
JS
4402 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4403 if (!pmb)
41415862 4404 return 1;
41415862
JW
4405
4406 /* Disable the error attention */
2e0fef85 4407 spin_lock_irq(&phba->hbalock);
9940b97b
JS
4408 if (lpfc_readl(phba->HCregaddr, &status)) {
4409 spin_unlock_irq(&phba->hbalock);
4410 mempool_free(pmb, phba->mbox_mem_pool);
4411 return 1;
4412 }
41415862
JW
4413 status &= ~HC_ERINT_ENA;
4414 writel(status, phba->HCregaddr);
4415 readl(phba->HCregaddr); /* flush */
2e0fef85
JS
4416 phba->link_flag |= LS_IGNORE_ERATT;
4417 spin_unlock_irq(&phba->hbalock);
41415862
JW
4418
4419 lpfc_kill_board(phba, pmb);
4420 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
4421 retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4422
4423 if (retval != MBX_SUCCESS) {
4424 if (retval != MBX_BUSY)
4425 mempool_free(pmb, phba->mbox_mem_pool);
e40a02c1
JS
4426 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4427 "2752 KILL_BOARD command failed retval %d\n",
4428 retval);
2e0fef85
JS
4429 spin_lock_irq(&phba->hbalock);
4430 phba->link_flag &= ~LS_IGNORE_ERATT;
4431 spin_unlock_irq(&phba->hbalock);
41415862
JW
4432 return 1;
4433 }
4434
f4b4c68f
JS
4435 spin_lock_irq(&phba->hbalock);
4436 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
4437 spin_unlock_irq(&phba->hbalock);
9290831f 4438
41415862
JW
4439 mempool_free(pmb, phba->mbox_mem_pool);
4440
4441 /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
4442 * attention every 100ms for 3 seconds. If we don't get ERATT after
4443 * 3 seconds we still set HBA_ERROR state because the status of the
4444 * board is now undefined.
4445 */
9940b97b
JS
4446 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4447 return 1;
41415862
JW
4448 while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
4449 mdelay(100);
9940b97b
JS
4450 if (lpfc_readl(phba->HAregaddr, &ha_copy))
4451 return 1;
41415862
JW
4452 }
4453
4454 del_timer_sync(&psli->mbox_tmo);
9290831f
JS
4455 if (ha_copy & HA_ERATT) {
4456 writel(HA_ERATT, phba->HAregaddr);
2e0fef85 4457 phba->pport->stopped = 1;
9290831f 4458 }
2e0fef85 4459 spin_lock_irq(&phba->hbalock);
41415862 4460 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
04c68496 4461 psli->mbox_active = NULL;
2e0fef85
JS
4462 phba->link_flag &= ~LS_IGNORE_ERATT;
4463 spin_unlock_irq(&phba->hbalock);
41415862 4464
41415862 4465 lpfc_hba_down_post(phba);
2e0fef85 4466 phba->link_state = LPFC_HBA_ERROR;
41415862 4467
2e0fef85 4468 return ha_copy & HA_ERATT ? 0 : 1;
dea3101e 4469}
4470
e59058c4 4471/**
3772a991 4472 * lpfc_sli_brdreset - Reset a sli-2 or sli-3 HBA
e59058c4
JS
4473 * @phba: Pointer to HBA context object.
4474 *
4475 * This function resets the HBA by writing HC_INITFF to the control
4476 * register. After the HBA resets, this function resets all the iocb ring
4477 * indices. This function disables PCI layer parity checking during
4478 * the reset.
4479 * This function returns 0 always.
4480 * The caller is not required to hold any locks.
4481 **/
41415862 4482int
2e0fef85 4483lpfc_sli_brdreset(struct lpfc_hba *phba)
dea3101e 4484{
41415862 4485 struct lpfc_sli *psli;
dea3101e 4486 struct lpfc_sli_ring *pring;
41415862 4487 uint16_t cfg_value;
dea3101e 4488 int i;
dea3101e 4489
41415862 4490 psli = &phba->sli;
dea3101e 4491
41415862
JW
4492 /* Reset HBA */
4493 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 4494 "0325 Reset HBA Data: x%x x%x\n",
4492b739
JS
4495 (phba->pport) ? phba->pport->port_state : 0,
4496 psli->sli_flag);
dea3101e 4497
4498 /* perform board reset */
4499 phba->fc_eventTag = 0;
4d9ab994 4500 phba->link_events = 0;
4492b739
JS
4501 if (phba->pport) {
4502 phba->pport->fc_myDID = 0;
4503 phba->pport->fc_prevDID = 0;
4504 }
dea3101e 4505
41415862
JW
4506 /* Turn off parity checking and serr during the physical reset */
4507 pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
4508 pci_write_config_word(phba->pcidev, PCI_COMMAND,
4509 (cfg_value &
4510 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
4511
3772a991
JS
4512 psli->sli_flag &= ~(LPFC_SLI_ACTIVE | LPFC_PROCESS_LA);
4513
41415862
JW
4514 /* Now toggle INITFF bit in the Host Control Register */
4515 writel(HC_INITFF, phba->HCregaddr);
4516 mdelay(1);
4517 readl(phba->HCregaddr); /* flush */
4518 writel(0, phba->HCregaddr);
4519 readl(phba->HCregaddr); /* flush */
4520
4521 /* Restore PCI cmd register */
4522 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
dea3101e 4523
4524 /* Initialize relevant SLI info */
41415862 4525 for (i = 0; i < psli->num_rings; i++) {
895427bd 4526 pring = &psli->sli3_ring[i];
dea3101e 4527 pring->flag = 0;
7e56aa25
JS
4528 pring->sli.sli3.rspidx = 0;
4529 pring->sli.sli3.next_cmdidx = 0;
4530 pring->sli.sli3.local_getidx = 0;
4531 pring->sli.sli3.cmdidx = 0;
dea3101e 4532 pring->missbufcnt = 0;
4533 }
dea3101e 4534
2e0fef85 4535 phba->link_state = LPFC_WARM_START;
41415862
JW
4536 return 0;
4537}
4538
e59058c4 4539/**
da0436e9
JS
4540 * lpfc_sli4_brdreset - Reset a sli-4 HBA
4541 * @phba: Pointer to HBA context object.
4542 *
4543 * This function resets a SLI4 HBA. This function disables PCI layer parity
4544 * checking during resets the device. The caller is not required to hold
4545 * any locks.
4546 *
4547 * This function returns 0 always.
4548 **/
4549int
4550lpfc_sli4_brdreset(struct lpfc_hba *phba)
4551{
4552 struct lpfc_sli *psli = &phba->sli;
4553 uint16_t cfg_value;
0293635e 4554 int rc = 0;
da0436e9
JS
4555
4556 /* Reset HBA */
4557 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
0293635e
JS
4558 "0295 Reset HBA Data: x%x x%x x%x\n",
4559 phba->pport->port_state, psli->sli_flag,
4560 phba->hba_flag);
da0436e9
JS
4561
4562 /* perform board reset */
4563 phba->fc_eventTag = 0;
4d9ab994 4564 phba->link_events = 0;
da0436e9
JS
4565 phba->pport->fc_myDID = 0;
4566 phba->pport->fc_prevDID = 0;
4567
da0436e9
JS
4568 spin_lock_irq(&phba->hbalock);
4569 psli->sli_flag &= ~(LPFC_PROCESS_LA);
4570 phba->fcf.fcf_flag = 0;
da0436e9
JS
4571 spin_unlock_irq(&phba->hbalock);
4572
0293635e
JS
4573 /* SLI4 INTF 2: if FW dump is being taken skip INIT_PORT */
4574 if (phba->hba_flag & HBA_FW_DUMP_OP) {
4575 phba->hba_flag &= ~HBA_FW_DUMP_OP;
4576 return rc;
4577 }
4578
da0436e9
JS
4579 /* Now physically reset the device */
4580 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4581 "0389 Performing PCI function reset!\n");
be858b65
JS
4582
4583 /* Turn off parity checking and serr during the physical reset */
4584 pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
4585 pci_write_config_word(phba->pcidev, PCI_COMMAND, (cfg_value &
4586 ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
4587
88318816 4588 /* Perform FCoE PCI function reset before freeing queue memory */
27b01b82 4589 rc = lpfc_pci_function_reset(phba);
da0436e9 4590
be858b65
JS
4591 /* Restore PCI cmd register */
4592 pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
4593
27b01b82 4594 return rc;
da0436e9
JS
4595}
4596
4597/**
4598 * lpfc_sli_brdrestart_s3 - Restart a sli-3 hba
e59058c4
JS
4599 * @phba: Pointer to HBA context object.
4600 *
4601 * This function is called in the SLI initialization code path to
4602 * restart the HBA. The caller is not required to hold any lock.
4603 * This function writes MBX_RESTART mailbox command to the SLIM and
4604 * resets the HBA. At the end of the function, it calls lpfc_hba_down_post
4605 * function to free any pending commands. The function enables
4606 * POST only during the first initialization. The function returns zero.
4607 * The function does not guarantee completion of MBX_RESTART mailbox
4608 * command before the return of this function.
4609 **/
da0436e9
JS
4610static int
4611lpfc_sli_brdrestart_s3(struct lpfc_hba *phba)
41415862
JW
4612{
4613 MAILBOX_t *mb;
4614 struct lpfc_sli *psli;
41415862
JW
4615 volatile uint32_t word0;
4616 void __iomem *to_slim;
0d878419 4617 uint32_t hba_aer_enabled;
41415862 4618
2e0fef85 4619 spin_lock_irq(&phba->hbalock);
41415862 4620
0d878419
JS
4621 /* Take PCIe device Advanced Error Reporting (AER) state */
4622 hba_aer_enabled = phba->hba_flag & HBA_AER_ENABLED;
4623
41415862
JW
4624 psli = &phba->sli;
4625
4626 /* Restart HBA */
4627 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 4628 "0337 Restart HBA Data: x%x x%x\n",
4492b739
JS
4629 (phba->pport) ? phba->pport->port_state : 0,
4630 psli->sli_flag);
41415862
JW
4631
4632 word0 = 0;
4633 mb = (MAILBOX_t *) &word0;
4634 mb->mbxCommand = MBX_RESTART;
4635 mb->mbxHc = 1;
4636
9290831f
JS
4637 lpfc_reset_barrier(phba);
4638
41415862
JW
4639 to_slim = phba->MBslimaddr;
4640 writel(*(uint32_t *) mb, to_slim);
4641 readl(to_slim); /* flush */
4642
4643 /* Only skip post after fc_ffinit is completed */
4492b739 4644 if (phba->pport && phba->pport->port_state)
41415862 4645 word0 = 1; /* This is really setting up word1 */
eaf15d5b 4646 else
41415862 4647 word0 = 0; /* This is really setting up word1 */
65a29c16 4648 to_slim = phba->MBslimaddr + sizeof (uint32_t);
41415862
JW
4649 writel(*(uint32_t *) mb, to_slim);
4650 readl(to_slim); /* flush */
dea3101e 4651
41415862 4652 lpfc_sli_brdreset(phba);
4492b739
JS
4653 if (phba->pport)
4654 phba->pport->stopped = 0;
2e0fef85 4655 phba->link_state = LPFC_INIT_START;
da0436e9 4656 phba->hba_flag = 0;
2e0fef85 4657 spin_unlock_irq(&phba->hbalock);
41415862 4658
64ba8818 4659 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
c4d6204d 4660 psli->stats_start = ktime_get_seconds();
64ba8818 4661
eaf15d5b
JS
4662 /* Give the INITFF and Post time to settle. */
4663 mdelay(100);
41415862 4664
0d878419
JS
4665 /* Reset HBA AER if it was enabled, note hba_flag was reset above */
4666 if (hba_aer_enabled)
4667 pci_disable_pcie_error_reporting(phba->pcidev);
4668
41415862 4669 lpfc_hba_down_post(phba);
dea3101e 4670
4671 return 0;
4672}
4673
da0436e9
JS
4674/**
4675 * lpfc_sli_brdrestart_s4 - Restart the sli-4 hba
4676 * @phba: Pointer to HBA context object.
4677 *
4678 * This function is called in the SLI initialization code path to restart
4679 * a SLI4 HBA. The caller is not required to hold any lock.
4680 * At the end of the function, it calls lpfc_hba_down_post function to
4681 * free any pending commands.
4682 **/
4683static int
4684lpfc_sli_brdrestart_s4(struct lpfc_hba *phba)
4685{
4686 struct lpfc_sli *psli = &phba->sli;
75baf696 4687 uint32_t hba_aer_enabled;
27b01b82 4688 int rc;
da0436e9
JS
4689
4690 /* Restart HBA */
4691 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4692 "0296 Restart HBA Data: x%x x%x\n",
4693 phba->pport->port_state, psli->sli_flag);
4694
75baf696
JS
4695 /* Take PCIe device Advanced Error Reporting (AER) state */
4696 hba_aer_enabled = phba->hba_flag & HBA_AER_ENABLED;
4697
27b01b82 4698 rc = lpfc_sli4_brdreset(phba);
5a9eeff5
JS
4699 if (rc)
4700 return rc;
da0436e9
JS
4701
4702 spin_lock_irq(&phba->hbalock);
4703 phba->pport->stopped = 0;
4704 phba->link_state = LPFC_INIT_START;
4705 phba->hba_flag = 0;
4706 spin_unlock_irq(&phba->hbalock);
4707
4708 memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
c4d6204d 4709 psli->stats_start = ktime_get_seconds();
da0436e9 4710
75baf696
JS
4711 /* Reset HBA AER if it was enabled, note hba_flag was reset above */
4712 if (hba_aer_enabled)
4713 pci_disable_pcie_error_reporting(phba->pcidev);
4714
da0436e9 4715 lpfc_hba_down_post(phba);
569dbe84 4716 lpfc_sli4_queue_destroy(phba);
da0436e9 4717
27b01b82 4718 return rc;
da0436e9
JS
4719}
4720
4721/**
4722 * lpfc_sli_brdrestart - Wrapper func for restarting hba
4723 * @phba: Pointer to HBA context object.
4724 *
4725 * This routine wraps the actual SLI3 or SLI4 hba restart routine from the
4726 * API jump table function pointer from the lpfc_hba struct.
4727**/
4728int
4729lpfc_sli_brdrestart(struct lpfc_hba *phba)
4730{
4731 return phba->lpfc_sli_brdrestart(phba);
4732}
4733
e59058c4 4734/**
3621a710 4735 * lpfc_sli_chipset_init - Wait for the restart of the HBA after a restart
e59058c4
JS
4736 * @phba: Pointer to HBA context object.
4737 *
4738 * This function is called after a HBA restart to wait for successful
4739 * restart of the HBA. Successful restart of the HBA is indicated by
4740 * HS_FFRDY and HS_MBRDY bits. If the HBA fails to restart even after 15
4741 * iteration, the function will restart the HBA again. The function returns
4742 * zero if HBA successfully restarted else returns negative error code.
4743 **/
4492b739 4744int
dea3101e 4745lpfc_sli_chipset_init(struct lpfc_hba *phba)
4746{
4747 uint32_t status, i = 0;
4748
4749 /* Read the HBA Host Status Register */
9940b97b
JS
4750 if (lpfc_readl(phba->HSregaddr, &status))
4751 return -EIO;
dea3101e 4752
4753 /* Check status register to see what current state is */
4754 i = 0;
4755 while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
4756
dcf2a4e0
JS
4757 /* Check every 10ms for 10 retries, then every 100ms for 90
4758 * retries, then every 1 sec for 50 retires for a total of
4759 * ~60 seconds before reset the board again and check every
4760 * 1 sec for 50 retries. The up to 60 seconds before the
4761 * board ready is required by the Falcon FIPS zeroization
4762 * complete, and any reset the board in between shall cause
4763 * restart of zeroization, further delay the board ready.
dea3101e 4764 */
dcf2a4e0 4765 if (i++ >= 200) {
dea3101e 4766 /* Adapter failed to init, timeout, status reg
4767 <status> */
ed957684 4768 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4769 "0436 Adapter failed to init, "
09372820
JS
4770 "timeout, status reg x%x, "
4771 "FW Data: A8 x%x AC x%x\n", status,
4772 readl(phba->MBslimaddr + 0xa8),
4773 readl(phba->MBslimaddr + 0xac));
2e0fef85 4774 phba->link_state = LPFC_HBA_ERROR;
dea3101e 4775 return -ETIMEDOUT;
4776 }
4777
4778 /* Check to see if any errors occurred during init */
4779 if (status & HS_FFERM) {
4780 /* ERROR: During chipset initialization */
4781 /* Adapter failed to init, chipset, status reg
4782 <status> */
ed957684 4783 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4784 "0437 Adapter failed to init, "
09372820
JS
4785 "chipset, status reg x%x, "
4786 "FW Data: A8 x%x AC x%x\n", status,
4787 readl(phba->MBslimaddr + 0xa8),
4788 readl(phba->MBslimaddr + 0xac));
2e0fef85 4789 phba->link_state = LPFC_HBA_ERROR;
dea3101e 4790 return -EIO;
4791 }
4792
dcf2a4e0 4793 if (i <= 10)
dea3101e 4794 msleep(10);
dcf2a4e0
JS
4795 else if (i <= 100)
4796 msleep(100);
4797 else
4798 msleep(1000);
dea3101e 4799
dcf2a4e0
JS
4800 if (i == 150) {
4801 /* Do post */
92d7f7b0 4802 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 4803 lpfc_sli_brdrestart(phba);
dea3101e 4804 }
4805 /* Read the HBA Host Status Register */
9940b97b
JS
4806 if (lpfc_readl(phba->HSregaddr, &status))
4807 return -EIO;
dea3101e 4808 }
4809
4810 /* Check to see if any errors occurred during init */
4811 if (status & HS_FFERM) {
4812 /* ERROR: During chipset initialization */
4813 /* Adapter failed to init, chipset, status reg <status> */
ed957684 4814 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 4815 "0438 Adapter failed to init, chipset, "
09372820
JS
4816 "status reg x%x, "
4817 "FW Data: A8 x%x AC x%x\n", status,
4818 readl(phba->MBslimaddr + 0xa8),
4819 readl(phba->MBslimaddr + 0xac));
2e0fef85 4820 phba->link_state = LPFC_HBA_ERROR;
dea3101e 4821 return -EIO;
4822 }
4823
4824 /* Clear all interrupt enable conditions */
4825 writel(0, phba->HCregaddr);
4826 readl(phba->HCregaddr); /* flush */
4827
4828 /* setup host attn register */
4829 writel(0xffffffff, phba->HAregaddr);
4830 readl(phba->HAregaddr); /* flush */
4831 return 0;
4832}
4833
e59058c4 4834/**
3621a710 4835 * lpfc_sli_hbq_count - Get the number of HBQs to be configured
e59058c4
JS
4836 *
4837 * This function calculates and returns the number of HBQs required to be
4838 * configured.
4839 **/
78b2d852 4840int
ed957684
JS
4841lpfc_sli_hbq_count(void)
4842{
92d7f7b0 4843 return ARRAY_SIZE(lpfc_hbq_defs);
ed957684
JS
4844}
4845
e59058c4 4846/**
3621a710 4847 * lpfc_sli_hbq_entry_count - Calculate total number of hbq entries
e59058c4
JS
4848 *
4849 * This function adds the number of hbq entries in every HBQ to get
4850 * the total number of hbq entries required for the HBA and returns
4851 * the total count.
4852 **/
ed957684
JS
4853static int
4854lpfc_sli_hbq_entry_count(void)
4855{
4856 int hbq_count = lpfc_sli_hbq_count();
4857 int count = 0;
4858 int i;
4859
4860 for (i = 0; i < hbq_count; ++i)
92d7f7b0 4861 count += lpfc_hbq_defs[i]->entry_count;
ed957684
JS
4862 return count;
4863}
4864
e59058c4 4865/**
3621a710 4866 * lpfc_sli_hbq_size - Calculate memory required for all hbq entries
e59058c4
JS
4867 *
4868 * This function calculates amount of memory required for all hbq entries
4869 * to be configured and returns the total memory required.
4870 **/
dea3101e 4871int
ed957684
JS
4872lpfc_sli_hbq_size(void)
4873{
4874 return lpfc_sli_hbq_entry_count() * sizeof(struct lpfc_hbq_entry);
4875}
4876
e59058c4 4877/**
3621a710 4878 * lpfc_sli_hbq_setup - configure and initialize HBQs
e59058c4
JS
4879 * @phba: Pointer to HBA context object.
4880 *
4881 * This function is called during the SLI initialization to configure
4882 * all the HBQs and post buffers to the HBQ. The caller is not
4883 * required to hold any locks. This function will return zero if successful
4884 * else it will return negative error code.
4885 **/
ed957684
JS
4886static int
4887lpfc_sli_hbq_setup(struct lpfc_hba *phba)
4888{
4889 int hbq_count = lpfc_sli_hbq_count();
4890 LPFC_MBOXQ_t *pmb;
4891 MAILBOX_t *pmbox;
4892 uint32_t hbqno;
4893 uint32_t hbq_entry_index;
ed957684 4894
92d7f7b0
JS
4895 /* Get a Mailbox buffer to setup mailbox
4896 * commands for HBA initialization
4897 */
ed957684
JS
4898 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4899
4900 if (!pmb)
4901 return -ENOMEM;
4902
04c68496 4903 pmbox = &pmb->u.mb;
ed957684
JS
4904
4905 /* Initialize the struct lpfc_sli_hbq structure for each hbq */
4906 phba->link_state = LPFC_INIT_MBX_CMDS;
3163f725 4907 phba->hbq_in_use = 1;
ed957684
JS
4908
4909 hbq_entry_index = 0;
4910 for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
4911 phba->hbqs[hbqno].next_hbqPutIdx = 0;
4912 phba->hbqs[hbqno].hbqPutIdx = 0;
4913 phba->hbqs[hbqno].local_hbqGetIdx = 0;
4914 phba->hbqs[hbqno].entry_count =
92d7f7b0 4915 lpfc_hbq_defs[hbqno]->entry_count;
51ef4c26
JS
4916 lpfc_config_hbq(phba, hbqno, lpfc_hbq_defs[hbqno],
4917 hbq_entry_index, pmb);
ed957684
JS
4918 hbq_entry_index += phba->hbqs[hbqno].entry_count;
4919
4920 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
4921 /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
4922 mbxStatus <status>, ring <num> */
4923
4924 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 4925 LOG_SLI | LOG_VPORT,
e8b62011 4926 "1805 Adapter failed to init. "
ed957684 4927 "Data: x%x x%x x%x\n",
e8b62011 4928 pmbox->mbxCommand,
ed957684
JS
4929 pmbox->mbxStatus, hbqno);
4930
4931 phba->link_state = LPFC_HBA_ERROR;
4932 mempool_free(pmb, phba->mbox_mem_pool);
6e7288d9 4933 return -ENXIO;
ed957684
JS
4934 }
4935 }
4936 phba->hbq_count = hbq_count;
4937
ed957684
JS
4938 mempool_free(pmb, phba->mbox_mem_pool);
4939
92d7f7b0 4940 /* Initially populate or replenish the HBQs */
d7c255b2
JS
4941 for (hbqno = 0; hbqno < hbq_count; ++hbqno)
4942 lpfc_sli_hbqbuf_init_hbqs(phba, hbqno);
ed957684
JS
4943 return 0;
4944}
4945
4f774513
JS
4946/**
4947 * lpfc_sli4_rb_setup - Initialize and post RBs to HBA
4948 * @phba: Pointer to HBA context object.
4949 *
4950 * This function is called during the SLI initialization to configure
4951 * all the HBQs and post buffers to the HBQ. The caller is not
4952 * required to hold any locks. This function will return zero if successful
4953 * else it will return negative error code.
4954 **/
4955static int
4956lpfc_sli4_rb_setup(struct lpfc_hba *phba)
4957{
4958 phba->hbq_in_use = 1;
895427bd
JS
4959 phba->hbqs[LPFC_ELS_HBQ].entry_count =
4960 lpfc_hbq_defs[LPFC_ELS_HBQ]->entry_count;
4f774513 4961 phba->hbq_count = 1;
895427bd 4962 lpfc_sli_hbqbuf_init_hbqs(phba, LPFC_ELS_HBQ);
4f774513 4963 /* Initially populate or replenish the HBQs */
4f774513
JS
4964 return 0;
4965}
4966
e59058c4 4967/**
3621a710 4968 * lpfc_sli_config_port - Issue config port mailbox command
e59058c4
JS
4969 * @phba: Pointer to HBA context object.
4970 * @sli_mode: sli mode - 2/3
4971 *
183b8021 4972 * This function is called by the sli initialization code path
e59058c4
JS
4973 * to issue config_port mailbox command. This function restarts the
4974 * HBA firmware and issues a config_port mailbox command to configure
4975 * the SLI interface in the sli mode specified by sli_mode
4976 * variable. The caller is not required to hold any locks.
4977 * The function returns 0 if successful, else returns negative error
4978 * code.
4979 **/
9399627f
JS
4980int
4981lpfc_sli_config_port(struct lpfc_hba *phba, int sli_mode)
dea3101e 4982{
4983 LPFC_MBOXQ_t *pmb;
4984 uint32_t resetcount = 0, rc = 0, done = 0;
4985
4986 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4987 if (!pmb) {
2e0fef85 4988 phba->link_state = LPFC_HBA_ERROR;
dea3101e 4989 return -ENOMEM;
4990 }
4991
ed957684 4992 phba->sli_rev = sli_mode;
dea3101e 4993 while (resetcount < 2 && !done) {
2e0fef85 4994 spin_lock_irq(&phba->hbalock);
1c067a42 4995 phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
2e0fef85 4996 spin_unlock_irq(&phba->hbalock);
92d7f7b0 4997 phba->pport->port_state = LPFC_VPORT_UNKNOWN;
41415862 4998 lpfc_sli_brdrestart(phba);
dea3101e 4999 rc = lpfc_sli_chipset_init(phba);
5000 if (rc)
5001 break;
5002
2e0fef85 5003 spin_lock_irq(&phba->hbalock);
1c067a42 5004 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 5005 spin_unlock_irq(&phba->hbalock);
dea3101e 5006 resetcount++;
5007
ed957684
JS
5008 /* Call pre CONFIG_PORT mailbox command initialization. A
5009 * value of 0 means the call was successful. Any other
5010 * nonzero value is a failure, but if ERESTART is returned,
5011 * the driver may reset the HBA and try again.
5012 */
dea3101e 5013 rc = lpfc_config_port_prep(phba);
5014 if (rc == -ERESTART) {
ed957684 5015 phba->link_state = LPFC_LINK_UNKNOWN;
dea3101e 5016 continue;
34b02dcd 5017 } else if (rc)
dea3101e 5018 break;
6d368e53 5019
2e0fef85 5020 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 5021 lpfc_config_port(phba, pmb);
5022 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
34b02dcd
JS
5023 phba->sli3_options &= ~(LPFC_SLI3_NPIV_ENABLED |
5024 LPFC_SLI3_HBQ_ENABLED |
5025 LPFC_SLI3_CRP_ENABLED |
bc73905a 5026 LPFC_SLI3_DSS_ENABLED);
ed957684 5027 if (rc != MBX_SUCCESS) {
dea3101e 5028 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 5029 "0442 Adapter failed to init, mbxCmd x%x "
92d7f7b0 5030 "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
04c68496 5031 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus, 0);
2e0fef85 5032 spin_lock_irq(&phba->hbalock);
04c68496 5033 phba->sli.sli_flag &= ~LPFC_SLI_ACTIVE;
2e0fef85
JS
5034 spin_unlock_irq(&phba->hbalock);
5035 rc = -ENXIO;
04c68496
JS
5036 } else {
5037 /* Allow asynchronous mailbox command to go through */
5038 spin_lock_irq(&phba->hbalock);
5039 phba->sli.sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
5040 spin_unlock_irq(&phba->hbalock);
ed957684 5041 done = 1;
cb69f7de
JS
5042
5043 if ((pmb->u.mb.un.varCfgPort.casabt == 1) &&
5044 (pmb->u.mb.un.varCfgPort.gasabt == 0))
5045 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5046 "3110 Port did not grant ASABT\n");
04c68496 5047 }
dea3101e 5048 }
ed957684
JS
5049 if (!done) {
5050 rc = -EINVAL;
5051 goto do_prep_failed;
5052 }
04c68496
JS
5053 if (pmb->u.mb.un.varCfgPort.sli_mode == 3) {
5054 if (!pmb->u.mb.un.varCfgPort.cMA) {
34b02dcd
JS
5055 rc = -ENXIO;
5056 goto do_prep_failed;
5057 }
04c68496 5058 if (phba->max_vpi && pmb->u.mb.un.varCfgPort.gmv) {
34b02dcd 5059 phba->sli3_options |= LPFC_SLI3_NPIV_ENABLED;
04c68496
JS
5060 phba->max_vpi = pmb->u.mb.un.varCfgPort.max_vpi;
5061 phba->max_vports = (phba->max_vpi > phba->max_vports) ?
5062 phba->max_vpi : phba->max_vports;
5063
34b02dcd
JS
5064 } else
5065 phba->max_vpi = 0;
bc73905a
JS
5066 phba->fips_level = 0;
5067 phba->fips_spec_rev = 0;
5068 if (pmb->u.mb.un.varCfgPort.gdss) {
04c68496 5069 phba->sli3_options |= LPFC_SLI3_DSS_ENABLED;
bc73905a
JS
5070 phba->fips_level = pmb->u.mb.un.varCfgPort.fips_level;
5071 phba->fips_spec_rev = pmb->u.mb.un.varCfgPort.fips_rev;
5072 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5073 "2850 Security Crypto Active. FIPS x%d "
5074 "(Spec Rev: x%d)",
5075 phba->fips_level, phba->fips_spec_rev);
5076 }
5077 if (pmb->u.mb.un.varCfgPort.sec_err) {
5078 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5079 "2856 Config Port Security Crypto "
5080 "Error: x%x ",
5081 pmb->u.mb.un.varCfgPort.sec_err);
5082 }
04c68496 5083 if (pmb->u.mb.un.varCfgPort.gerbm)
34b02dcd 5084 phba->sli3_options |= LPFC_SLI3_HBQ_ENABLED;
04c68496 5085 if (pmb->u.mb.un.varCfgPort.gcrp)
34b02dcd 5086 phba->sli3_options |= LPFC_SLI3_CRP_ENABLED;
6e7288d9
JS
5087
5088 phba->hbq_get = phba->mbox->us.s3_pgp.hbq_get;
5089 phba->port_gp = phba->mbox->us.s3_pgp.port;
e2a0a9d6 5090
f44ac12f
JS
5091 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
5092 if (pmb->u.mb.un.varCfgPort.gbg == 0) {
5093 phba->cfg_enable_bg = 0;
5094 phba->sli3_options &= ~LPFC_SLI3_BG_ENABLED;
e2a0a9d6
JS
5095 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5096 "0443 Adapter did not grant "
5097 "BlockGuard\n");
f44ac12f 5098 }
e2a0a9d6 5099 }
34b02dcd 5100 } else {
8f34f4ce 5101 phba->hbq_get = NULL;
34b02dcd 5102 phba->port_gp = phba->mbox->us.s2.port;
d7c255b2 5103 phba->max_vpi = 0;
ed957684 5104 }
92d7f7b0 5105do_prep_failed:
ed957684
JS
5106 mempool_free(pmb, phba->mbox_mem_pool);
5107 return rc;
5108}
5109
e59058c4
JS
5110
5111/**
183b8021 5112 * lpfc_sli_hba_setup - SLI initialization function
e59058c4
JS
5113 * @phba: Pointer to HBA context object.
5114 *
183b8021
MY
5115 * This function is the main SLI initialization function. This function
5116 * is called by the HBA initialization code, HBA reset code and HBA
e59058c4
JS
5117 * error attention handler code. Caller is not required to hold any
5118 * locks. This function issues config_port mailbox command to configure
5119 * the SLI, setup iocb rings and HBQ rings. In the end the function
5120 * calls the config_port_post function to issue init_link mailbox
5121 * command and to start the discovery. The function will return zero
5122 * if successful, else it will return negative error code.
5123 **/
ed957684
JS
5124int
5125lpfc_sli_hba_setup(struct lpfc_hba *phba)
5126{
5127 uint32_t rc;
6d368e53
JS
5128 int mode = 3, i;
5129 int longs;
ed957684 5130
12247e81 5131 switch (phba->cfg_sli_mode) {
ed957684 5132 case 2:
78b2d852 5133 if (phba->cfg_enable_npiv) {
92d7f7b0 5134 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
12247e81 5135 "1824 NPIV enabled: Override sli_mode "
92d7f7b0 5136 "parameter (%d) to auto (0).\n",
12247e81 5137 phba->cfg_sli_mode);
92d7f7b0
JS
5138 break;
5139 }
ed957684
JS
5140 mode = 2;
5141 break;
5142 case 0:
5143 case 3:
5144 break;
5145 default:
92d7f7b0 5146 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
12247e81
JS
5147 "1819 Unrecognized sli_mode parameter: %d.\n",
5148 phba->cfg_sli_mode);
ed957684
JS
5149
5150 break;
5151 }
b5c53958 5152 phba->fcp_embed_io = 0; /* SLI4 FC support only */
ed957684 5153
9399627f
JS
5154 rc = lpfc_sli_config_port(phba, mode);
5155
12247e81 5156 if (rc && phba->cfg_sli_mode == 3)
92d7f7b0 5157 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
e8b62011
JS
5158 "1820 Unable to select SLI-3. "
5159 "Not supported by adapter.\n");
ed957684 5160 if (rc && mode != 2)
9399627f 5161 rc = lpfc_sli_config_port(phba, 2);
4597663f
JS
5162 else if (rc && mode == 2)
5163 rc = lpfc_sli_config_port(phba, 3);
ed957684 5164 if (rc)
dea3101e 5165 goto lpfc_sli_hba_setup_error;
5166
0d878419
JS
5167 /* Enable PCIe device Advanced Error Reporting (AER) if configured */
5168 if (phba->cfg_aer_support == 1 && !(phba->hba_flag & HBA_AER_ENABLED)) {
5169 rc = pci_enable_pcie_error_reporting(phba->pcidev);
5170 if (!rc) {
5171 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5172 "2709 This device supports "
5173 "Advanced Error Reporting (AER)\n");
5174 spin_lock_irq(&phba->hbalock);
5175 phba->hba_flag |= HBA_AER_ENABLED;
5176 spin_unlock_irq(&phba->hbalock);
5177 } else {
5178 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5179 "2708 This device does not support "
b069d7eb
JS
5180 "Advanced Error Reporting (AER): %d\n",
5181 rc);
0d878419
JS
5182 phba->cfg_aer_support = 0;
5183 }
5184 }
5185
ed957684
JS
5186 if (phba->sli_rev == 3) {
5187 phba->iocb_cmd_size = SLI3_IOCB_CMD_SIZE;
5188 phba->iocb_rsp_size = SLI3_IOCB_RSP_SIZE;
ed957684
JS
5189 } else {
5190 phba->iocb_cmd_size = SLI2_IOCB_CMD_SIZE;
5191 phba->iocb_rsp_size = SLI2_IOCB_RSP_SIZE;
92d7f7b0 5192 phba->sli3_options = 0;
ed957684
JS
5193 }
5194
5195 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
5196 "0444 Firmware in SLI %x mode. Max_vpi %d\n",
5197 phba->sli_rev, phba->max_vpi);
ed957684 5198 rc = lpfc_sli_ring_map(phba);
dea3101e 5199
5200 if (rc)
5201 goto lpfc_sli_hba_setup_error;
5202
6d368e53
JS
5203 /* Initialize VPIs. */
5204 if (phba->sli_rev == LPFC_SLI_REV3) {
5205 /*
5206 * The VPI bitmask and physical ID array are allocated
5207 * and initialized once only - at driver load. A port
5208 * reset doesn't need to reinitialize this memory.
5209 */
5210 if ((phba->vpi_bmask == NULL) && (phba->vpi_ids == NULL)) {
5211 longs = (phba->max_vpi + BITS_PER_LONG) / BITS_PER_LONG;
6396bb22
KC
5212 phba->vpi_bmask = kcalloc(longs,
5213 sizeof(unsigned long),
6d368e53
JS
5214 GFP_KERNEL);
5215 if (!phba->vpi_bmask) {
5216 rc = -ENOMEM;
5217 goto lpfc_sli_hba_setup_error;
5218 }
5219
6396bb22
KC
5220 phba->vpi_ids = kcalloc(phba->max_vpi + 1,
5221 sizeof(uint16_t),
5222 GFP_KERNEL);
6d368e53
JS
5223 if (!phba->vpi_ids) {
5224 kfree(phba->vpi_bmask);
5225 rc = -ENOMEM;
5226 goto lpfc_sli_hba_setup_error;
5227 }
5228 for (i = 0; i < phba->max_vpi; i++)
5229 phba->vpi_ids[i] = i;
5230 }
5231 }
5232
9399627f 5233 /* Init HBQs */
ed957684
JS
5234 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
5235 rc = lpfc_sli_hbq_setup(phba);
5236 if (rc)
5237 goto lpfc_sli_hba_setup_error;
5238 }
04c68496 5239 spin_lock_irq(&phba->hbalock);
dea3101e 5240 phba->sli.sli_flag |= LPFC_PROCESS_LA;
04c68496 5241 spin_unlock_irq(&phba->hbalock);
dea3101e 5242
5243 rc = lpfc_config_port_post(phba);
5244 if (rc)
5245 goto lpfc_sli_hba_setup_error;
5246
ed957684
JS
5247 return rc;
5248
92d7f7b0 5249lpfc_sli_hba_setup_error:
2e0fef85 5250 phba->link_state = LPFC_HBA_ERROR;
e40a02c1 5251 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 5252 "0445 Firmware initialization failed\n");
dea3101e 5253 return rc;
5254}
5255
e59058c4 5256/**
da0436e9
JS
5257 * lpfc_sli4_read_fcoe_params - Read fcoe params from conf region
5258 * @phba: Pointer to HBA context object.
5259 * @mboxq: mailbox pointer.
5260 * This function issue a dump mailbox command to read config region
5261 * 23 and parse the records in the region and populate driver
5262 * data structure.
e59058c4 5263 **/
da0436e9 5264static int
ff78d8f9 5265lpfc_sli4_read_fcoe_params(struct lpfc_hba *phba)
dea3101e 5266{
ff78d8f9 5267 LPFC_MBOXQ_t *mboxq;
da0436e9
JS
5268 struct lpfc_dmabuf *mp;
5269 struct lpfc_mqe *mqe;
5270 uint32_t data_length;
5271 int rc;
dea3101e 5272
da0436e9
JS
5273 /* Program the default value of vlan_id and fc_map */
5274 phba->valid_vlan = 0;
5275 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
5276 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
5277 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
2e0fef85 5278
ff78d8f9
JS
5279 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5280 if (!mboxq)
da0436e9
JS
5281 return -ENOMEM;
5282
ff78d8f9
JS
5283 mqe = &mboxq->u.mqe;
5284 if (lpfc_sli4_dump_cfg_rg23(phba, mboxq)) {
5285 rc = -ENOMEM;
5286 goto out_free_mboxq;
5287 }
5288
3e1f0718 5289 mp = (struct lpfc_dmabuf *)mboxq->ctx_buf;
da0436e9
JS
5290 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5291
5292 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
5293 "(%d):2571 Mailbox cmd x%x Status x%x "
5294 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x "
5295 "x%x x%x x%x x%x x%x x%x x%x x%x x%x "
5296 "CQ: x%x x%x x%x x%x\n",
5297 mboxq->vport ? mboxq->vport->vpi : 0,
5298 bf_get(lpfc_mqe_command, mqe),
5299 bf_get(lpfc_mqe_status, mqe),
5300 mqe->un.mb_words[0], mqe->un.mb_words[1],
5301 mqe->un.mb_words[2], mqe->un.mb_words[3],
5302 mqe->un.mb_words[4], mqe->un.mb_words[5],
5303 mqe->un.mb_words[6], mqe->un.mb_words[7],
5304 mqe->un.mb_words[8], mqe->un.mb_words[9],
5305 mqe->un.mb_words[10], mqe->un.mb_words[11],
5306 mqe->un.mb_words[12], mqe->un.mb_words[13],
5307 mqe->un.mb_words[14], mqe->un.mb_words[15],
5308 mqe->un.mb_words[16], mqe->un.mb_words[50],
5309 mboxq->mcqe.word0,
5310 mboxq->mcqe.mcqe_tag0, mboxq->mcqe.mcqe_tag1,
5311 mboxq->mcqe.trailer);
5312
5313 if (rc) {
5314 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5315 kfree(mp);
ff78d8f9
JS
5316 rc = -EIO;
5317 goto out_free_mboxq;
da0436e9
JS
5318 }
5319 data_length = mqe->un.mb_words[5];
a0c87cbd 5320 if (data_length > DMP_RGN23_SIZE) {
d11e31dd
JS
5321 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5322 kfree(mp);
ff78d8f9
JS
5323 rc = -EIO;
5324 goto out_free_mboxq;
d11e31dd 5325 }
dea3101e 5326
da0436e9
JS
5327 lpfc_parse_fcoe_conf(phba, mp->virt, data_length);
5328 lpfc_mbuf_free(phba, mp->virt, mp->phys);
5329 kfree(mp);
ff78d8f9
JS
5330 rc = 0;
5331
5332out_free_mboxq:
5333 mempool_free(mboxq, phba->mbox_mem_pool);
5334 return rc;
da0436e9 5335}
e59058c4
JS
5336
5337/**
da0436e9
JS
5338 * lpfc_sli4_read_rev - Issue READ_REV and collect vpd data
5339 * @phba: pointer to lpfc hba data structure.
5340 * @mboxq: pointer to the LPFC_MBOXQ_t structure.
5341 * @vpd: pointer to the memory to hold resulting port vpd data.
5342 * @vpd_size: On input, the number of bytes allocated to @vpd.
5343 * On output, the number of data bytes in @vpd.
e59058c4 5344 *
da0436e9
JS
5345 * This routine executes a READ_REV SLI4 mailbox command. In
5346 * addition, this routine gets the port vpd data.
5347 *
5348 * Return codes
af901ca1 5349 * 0 - successful
d439d286 5350 * -ENOMEM - could not allocated memory.
e59058c4 5351 **/
da0436e9
JS
5352static int
5353lpfc_sli4_read_rev(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq,
5354 uint8_t *vpd, uint32_t *vpd_size)
dea3101e 5355{
da0436e9
JS
5356 int rc = 0;
5357 uint32_t dma_size;
5358 struct lpfc_dmabuf *dmabuf;
5359 struct lpfc_mqe *mqe;
dea3101e 5360
da0436e9
JS
5361 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
5362 if (!dmabuf)
5363 return -ENOMEM;
5364
5365 /*
5366 * Get a DMA buffer for the vpd data resulting from the READ_REV
5367 * mailbox command.
a257bf90 5368 */
da0436e9 5369 dma_size = *vpd_size;
1aee383d
JP
5370 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev, dma_size,
5371 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
5372 if (!dmabuf->virt) {
5373 kfree(dmabuf);
5374 return -ENOMEM;
a257bf90
JS
5375 }
5376
da0436e9
JS
5377 /*
5378 * The SLI4 implementation of READ_REV conflicts at word1,
5379 * bits 31:16 and SLI4 adds vpd functionality not present
5380 * in SLI3. This code corrects the conflicts.
1dcb58e5 5381 */
da0436e9
JS
5382 lpfc_read_rev(phba, mboxq);
5383 mqe = &mboxq->u.mqe;
5384 mqe->un.read_rev.vpd_paddr_high = putPaddrHigh(dmabuf->phys);
5385 mqe->un.read_rev.vpd_paddr_low = putPaddrLow(dmabuf->phys);
5386 mqe->un.read_rev.word1 &= 0x0000FFFF;
5387 bf_set(lpfc_mbx_rd_rev_vpd, &mqe->un.read_rev, 1);
5388 bf_set(lpfc_mbx_rd_rev_avail_len, &mqe->un.read_rev, dma_size);
5389
5390 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5391 if (rc) {
5392 dma_free_coherent(&phba->pcidev->dev, dma_size,
5393 dmabuf->virt, dmabuf->phys);
def9c7a9 5394 kfree(dmabuf);
da0436e9
JS
5395 return -EIO;
5396 }
1dcb58e5 5397
da0436e9
JS
5398 /*
5399 * The available vpd length cannot be bigger than the
5400 * DMA buffer passed to the port. Catch the less than
5401 * case and update the caller's size.
5402 */
5403 if (mqe->un.read_rev.avail_vpd_len < *vpd_size)
5404 *vpd_size = mqe->un.read_rev.avail_vpd_len;
3772a991 5405
d7c47992
JS
5406 memcpy(vpd, dmabuf->virt, *vpd_size);
5407
da0436e9
JS
5408 dma_free_coherent(&phba->pcidev->dev, dma_size,
5409 dmabuf->virt, dmabuf->phys);
5410 kfree(dmabuf);
5411 return 0;
dea3101e 5412}
5413
cd1c8301
JS
5414/**
5415 * lpfc_sli4_retrieve_pport_name - Retrieve SLI4 device physical port name
5416 * @phba: pointer to lpfc hba data structure.
5417 *
5418 * This routine retrieves SLI4 device physical port name this PCI function
5419 * is attached to.
5420 *
5421 * Return codes
4907cb7b 5422 * 0 - successful
cd1c8301
JS
5423 * otherwise - failed to retrieve physical port name
5424 **/
5425static int
5426lpfc_sli4_retrieve_pport_name(struct lpfc_hba *phba)
5427{
5428 LPFC_MBOXQ_t *mboxq;
cd1c8301
JS
5429 struct lpfc_mbx_get_cntl_attributes *mbx_cntl_attr;
5430 struct lpfc_controller_attribute *cntl_attr;
5431 struct lpfc_mbx_get_port_name *get_port_name;
5432 void *virtaddr = NULL;
5433 uint32_t alloclen, reqlen;
5434 uint32_t shdr_status, shdr_add_status;
5435 union lpfc_sli4_cfg_shdr *shdr;
5436 char cport_name = 0;
5437 int rc;
5438
5439 /* We assume nothing at this point */
5440 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_INVAL;
5441 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_NON;
5442
5443 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5444 if (!mboxq)
5445 return -ENOMEM;
cd1c8301 5446 /* obtain link type and link number via READ_CONFIG */
ff78d8f9
JS
5447 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_INVAL;
5448 lpfc_sli4_read_config(phba);
5449 if (phba->sli4_hba.lnk_info.lnk_dv == LPFC_LNK_DAT_VAL)
5450 goto retrieve_ppname;
cd1c8301
JS
5451
5452 /* obtain link type and link number via COMMON_GET_CNTL_ATTRIBUTES */
5453 reqlen = sizeof(struct lpfc_mbx_get_cntl_attributes);
5454 alloclen = lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
5455 LPFC_MBOX_OPCODE_GET_CNTL_ATTRIBUTES, reqlen,
5456 LPFC_SLI4_MBX_NEMBED);
5457 if (alloclen < reqlen) {
5458 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5459 "3084 Allocated DMA memory size (%d) is "
5460 "less than the requested DMA memory size "
5461 "(%d)\n", alloclen, reqlen);
5462 rc = -ENOMEM;
5463 goto out_free_mboxq;
5464 }
5465 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5466 virtaddr = mboxq->sge_array->addr[0];
5467 mbx_cntl_attr = (struct lpfc_mbx_get_cntl_attributes *)virtaddr;
5468 shdr = &mbx_cntl_attr->cfg_shdr;
5469 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
5470 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
5471 if (shdr_status || shdr_add_status || rc) {
5472 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
5473 "3085 Mailbox x%x (x%x/x%x) failed, "
5474 "rc:x%x, status:x%x, add_status:x%x\n",
5475 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
5476 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
5477 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
5478 rc, shdr_status, shdr_add_status);
5479 rc = -ENXIO;
5480 goto out_free_mboxq;
5481 }
5482 cntl_attr = &mbx_cntl_attr->cntl_attr;
5483 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
5484 phba->sli4_hba.lnk_info.lnk_tp =
5485 bf_get(lpfc_cntl_attr_lnk_type, cntl_attr);
5486 phba->sli4_hba.lnk_info.lnk_no =
5487 bf_get(lpfc_cntl_attr_lnk_numb, cntl_attr);
5488 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5489 "3086 lnk_type:%d, lnk_numb:%d\n",
5490 phba->sli4_hba.lnk_info.lnk_tp,
5491 phba->sli4_hba.lnk_info.lnk_no);
5492
5493retrieve_ppname:
5494 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
5495 LPFC_MBOX_OPCODE_GET_PORT_NAME,
5496 sizeof(struct lpfc_mbx_get_port_name) -
5497 sizeof(struct lpfc_sli4_cfg_mhdr),
5498 LPFC_SLI4_MBX_EMBED);
5499 get_port_name = &mboxq->u.mqe.un.get_port_name;
5500 shdr = (union lpfc_sli4_cfg_shdr *)&get_port_name->header.cfg_shdr;
5501 bf_set(lpfc_mbox_hdr_version, &shdr->request, LPFC_OPCODE_VERSION_1);
5502 bf_set(lpfc_mbx_get_port_name_lnk_type, &get_port_name->u.request,
5503 phba->sli4_hba.lnk_info.lnk_tp);
5504 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5505 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
5506 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
5507 if (shdr_status || shdr_add_status || rc) {
5508 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
5509 "3087 Mailbox x%x (x%x/x%x) failed: "
5510 "rc:x%x, status:x%x, add_status:x%x\n",
5511 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
5512 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
5513 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
5514 rc, shdr_status, shdr_add_status);
5515 rc = -ENXIO;
5516 goto out_free_mboxq;
5517 }
5518 switch (phba->sli4_hba.lnk_info.lnk_no) {
5519 case LPFC_LINK_NUMBER_0:
5520 cport_name = bf_get(lpfc_mbx_get_port_name_name0,
5521 &get_port_name->u.response);
5522 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5523 break;
5524 case LPFC_LINK_NUMBER_1:
5525 cport_name = bf_get(lpfc_mbx_get_port_name_name1,
5526 &get_port_name->u.response);
5527 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5528 break;
5529 case LPFC_LINK_NUMBER_2:
5530 cport_name = bf_get(lpfc_mbx_get_port_name_name2,
5531 &get_port_name->u.response);
5532 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5533 break;
5534 case LPFC_LINK_NUMBER_3:
5535 cport_name = bf_get(lpfc_mbx_get_port_name_name3,
5536 &get_port_name->u.response);
5537 phba->sli4_hba.pport_name_sta = LPFC_SLI4_PPNAME_GET;
5538 break;
5539 default:
5540 break;
5541 }
5542
5543 if (phba->sli4_hba.pport_name_sta == LPFC_SLI4_PPNAME_GET) {
5544 phba->Port[0] = cport_name;
5545 phba->Port[1] = '\0';
5546 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5547 "3091 SLI get port name: %s\n", phba->Port);
5548 }
5549
5550out_free_mboxq:
5551 if (rc != MBX_TIMEOUT) {
5552 if (bf_get(lpfc_mqe_command, &mboxq->u.mqe) == MBX_SLI4_CONFIG)
5553 lpfc_sli4_mbox_cmd_free(phba, mboxq);
5554 else
5555 mempool_free(mboxq, phba->mbox_mem_pool);
5556 }
5557 return rc;
5558}
5559
e59058c4 5560/**
da0436e9
JS
5561 * lpfc_sli4_arm_cqeq_intr - Arm sli-4 device completion and event queues
5562 * @phba: pointer to lpfc hba data structure.
e59058c4 5563 *
da0436e9
JS
5564 * This routine is called to explicitly arm the SLI4 device's completion and
5565 * event queues
5566 **/
5567static void
5568lpfc_sli4_arm_cqeq_intr(struct lpfc_hba *phba)
5569{
895427bd 5570 int qidx;
b71413dd 5571 struct lpfc_sli4_hba *sli4_hba = &phba->sli4_hba;
cdb42bec 5572 struct lpfc_sli4_hdw_queue *qp;
da0436e9 5573
b71413dd
JS
5574 sli4_hba->sli4_cq_release(sli4_hba->mbx_cq, LPFC_QUEUE_REARM);
5575 sli4_hba->sli4_cq_release(sli4_hba->els_cq, LPFC_QUEUE_REARM);
5576 if (sli4_hba->nvmels_cq)
5577 sli4_hba->sli4_cq_release(sli4_hba->nvmels_cq,
895427bd
JS
5578 LPFC_QUEUE_REARM);
5579
cdb42bec
JS
5580 qp = sli4_hba->hdwq;
5581 if (sli4_hba->hdwq) {
5582 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
5583 sli4_hba->sli4_cq_release(qp[qidx].fcp_cq,
895427bd 5584 LPFC_QUEUE_REARM);
cdb42bec 5585 sli4_hba->sli4_cq_release(qp[qidx].nvme_cq,
895427bd 5586 LPFC_QUEUE_REARM);
cdb42bec 5587 }
1ba981fd 5588
cdb42bec
JS
5589 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++)
5590 sli4_hba->sli4_eq_release(qp[qidx].hba_eq,
5591 LPFC_QUEUE_REARM);
5592 }
1ba981fd 5593
2d7dbc4c
JS
5594 if (phba->nvmet_support) {
5595 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) {
b71413dd
JS
5596 sli4_hba->sli4_cq_release(
5597 sli4_hba->nvmet_cqset[qidx],
2d7dbc4c
JS
5598 LPFC_QUEUE_REARM);
5599 }
2e90f4b5 5600 }
da0436e9
JS
5601}
5602
6d368e53
JS
5603/**
5604 * lpfc_sli4_get_avail_extnt_rsrc - Get available resource extent count.
5605 * @phba: Pointer to HBA context object.
5606 * @type: The resource extent type.
b76f2dc9
JS
5607 * @extnt_count: buffer to hold port available extent count.
5608 * @extnt_size: buffer to hold element count per extent.
6d368e53 5609 *
b76f2dc9
JS
5610 * This function calls the port and retrievs the number of available
5611 * extents and their size for a particular extent type.
5612 *
5613 * Returns: 0 if successful. Nonzero otherwise.
6d368e53 5614 **/
b76f2dc9 5615int
6d368e53
JS
5616lpfc_sli4_get_avail_extnt_rsrc(struct lpfc_hba *phba, uint16_t type,
5617 uint16_t *extnt_count, uint16_t *extnt_size)
5618{
5619 int rc = 0;
5620 uint32_t length;
5621 uint32_t mbox_tmo;
5622 struct lpfc_mbx_get_rsrc_extent_info *rsrc_info;
5623 LPFC_MBOXQ_t *mbox;
5624
5625 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5626 if (!mbox)
5627 return -ENOMEM;
5628
5629 /* Find out how many extents are available for this resource type */
5630 length = (sizeof(struct lpfc_mbx_get_rsrc_extent_info) -
5631 sizeof(struct lpfc_sli4_cfg_mhdr));
5632 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
5633 LPFC_MBOX_OPCODE_GET_RSRC_EXTENT_INFO,
5634 length, LPFC_SLI4_MBX_EMBED);
5635
5636 /* Send an extents count of 0 - the GET doesn't use it. */
5637 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, 0, type,
5638 LPFC_SLI4_MBX_EMBED);
5639 if (unlikely(rc)) {
5640 rc = -EIO;
5641 goto err_exit;
5642 }
5643
5644 if (!phba->sli4_hba.intr_enable)
5645 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
5646 else {
a183a15f 5647 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
5648 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
5649 }
5650 if (unlikely(rc)) {
5651 rc = -EIO;
5652 goto err_exit;
5653 }
5654
5655 rsrc_info = &mbox->u.mqe.un.rsrc_extent_info;
5656 if (bf_get(lpfc_mbox_hdr_status,
5657 &rsrc_info->header.cfg_shdr.response)) {
5658 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
5659 "2930 Failed to get resource extents "
5660 "Status 0x%x Add'l Status 0x%x\n",
5661 bf_get(lpfc_mbox_hdr_status,
5662 &rsrc_info->header.cfg_shdr.response),
5663 bf_get(lpfc_mbox_hdr_add_status,
5664 &rsrc_info->header.cfg_shdr.response));
5665 rc = -EIO;
5666 goto err_exit;
5667 }
5668
5669 *extnt_count = bf_get(lpfc_mbx_get_rsrc_extent_info_cnt,
5670 &rsrc_info->u.rsp);
5671 *extnt_size = bf_get(lpfc_mbx_get_rsrc_extent_info_size,
5672 &rsrc_info->u.rsp);
8a9d2e80
JS
5673
5674 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5675 "3162 Retrieved extents type-%d from port: count:%d, "
5676 "size:%d\n", type, *extnt_count, *extnt_size);
5677
5678err_exit:
6d368e53
JS
5679 mempool_free(mbox, phba->mbox_mem_pool);
5680 return rc;
5681}
5682
5683/**
5684 * lpfc_sli4_chk_avail_extnt_rsrc - Check for available SLI4 resource extents.
5685 * @phba: Pointer to HBA context object.
5686 * @type: The extent type to check.
5687 *
5688 * This function reads the current available extents from the port and checks
5689 * if the extent count or extent size has changed since the last access.
5690 * Callers use this routine post port reset to understand if there is a
5691 * extent reprovisioning requirement.
5692 *
5693 * Returns:
5694 * -Error: error indicates problem.
5695 * 1: Extent count or size has changed.
5696 * 0: No changes.
5697 **/
5698static int
5699lpfc_sli4_chk_avail_extnt_rsrc(struct lpfc_hba *phba, uint16_t type)
5700{
5701 uint16_t curr_ext_cnt, rsrc_ext_cnt;
5702 uint16_t size_diff, rsrc_ext_size;
5703 int rc = 0;
5704 struct lpfc_rsrc_blks *rsrc_entry;
5705 struct list_head *rsrc_blk_list = NULL;
5706
5707 size_diff = 0;
5708 curr_ext_cnt = 0;
5709 rc = lpfc_sli4_get_avail_extnt_rsrc(phba, type,
5710 &rsrc_ext_cnt,
5711 &rsrc_ext_size);
5712 if (unlikely(rc))
5713 return -EIO;
5714
5715 switch (type) {
5716 case LPFC_RSC_TYPE_FCOE_RPI:
5717 rsrc_blk_list = &phba->sli4_hba.lpfc_rpi_blk_list;
5718 break;
5719 case LPFC_RSC_TYPE_FCOE_VPI:
5720 rsrc_blk_list = &phba->lpfc_vpi_blk_list;
5721 break;
5722 case LPFC_RSC_TYPE_FCOE_XRI:
5723 rsrc_blk_list = &phba->sli4_hba.lpfc_xri_blk_list;
5724 break;
5725 case LPFC_RSC_TYPE_FCOE_VFI:
5726 rsrc_blk_list = &phba->sli4_hba.lpfc_vfi_blk_list;
5727 break;
5728 default:
5729 break;
5730 }
5731
5732 list_for_each_entry(rsrc_entry, rsrc_blk_list, list) {
5733 curr_ext_cnt++;
5734 if (rsrc_entry->rsrc_size != rsrc_ext_size)
5735 size_diff++;
5736 }
5737
5738 if (curr_ext_cnt != rsrc_ext_cnt || size_diff != 0)
5739 rc = 1;
5740
5741 return rc;
5742}
5743
5744/**
5745 * lpfc_sli4_cfg_post_extnts -
5746 * @phba: Pointer to HBA context object.
5747 * @extnt_cnt - number of available extents.
5748 * @type - the extent type (rpi, xri, vfi, vpi).
5749 * @emb - buffer to hold either MBX_EMBED or MBX_NEMBED operation.
5750 * @mbox - pointer to the caller's allocated mailbox structure.
5751 *
5752 * This function executes the extents allocation request. It also
5753 * takes care of the amount of memory needed to allocate or get the
5754 * allocated extents. It is the caller's responsibility to evaluate
5755 * the response.
5756 *
5757 * Returns:
5758 * -Error: Error value describes the condition found.
5759 * 0: if successful
5760 **/
5761static int
8a9d2e80 5762lpfc_sli4_cfg_post_extnts(struct lpfc_hba *phba, uint16_t extnt_cnt,
6d368e53
JS
5763 uint16_t type, bool *emb, LPFC_MBOXQ_t *mbox)
5764{
5765 int rc = 0;
5766 uint32_t req_len;
5767 uint32_t emb_len;
5768 uint32_t alloc_len, mbox_tmo;
5769
5770 /* Calculate the total requested length of the dma memory */
8a9d2e80 5771 req_len = extnt_cnt * sizeof(uint16_t);
6d368e53
JS
5772
5773 /*
5774 * Calculate the size of an embedded mailbox. The uint32_t
5775 * accounts for extents-specific word.
5776 */
5777 emb_len = sizeof(MAILBOX_t) - sizeof(struct mbox_header) -
5778 sizeof(uint32_t);
5779
5780 /*
5781 * Presume the allocation and response will fit into an embedded
5782 * mailbox. If not true, reconfigure to a non-embedded mailbox.
5783 */
5784 *emb = LPFC_SLI4_MBX_EMBED;
5785 if (req_len > emb_len) {
8a9d2e80 5786 req_len = extnt_cnt * sizeof(uint16_t) +
6d368e53
JS
5787 sizeof(union lpfc_sli4_cfg_shdr) +
5788 sizeof(uint32_t);
5789 *emb = LPFC_SLI4_MBX_NEMBED;
5790 }
5791
5792 alloc_len = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
5793 LPFC_MBOX_OPCODE_ALLOC_RSRC_EXTENT,
5794 req_len, *emb);
5795 if (alloc_len < req_len) {
5796 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
b76f2dc9 5797 "2982 Allocated DMA memory size (x%x) is "
6d368e53
JS
5798 "less than the requested DMA memory "
5799 "size (x%x)\n", alloc_len, req_len);
5800 return -ENOMEM;
5801 }
8a9d2e80 5802 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, extnt_cnt, type, *emb);
6d368e53
JS
5803 if (unlikely(rc))
5804 return -EIO;
5805
5806 if (!phba->sli4_hba.intr_enable)
5807 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
5808 else {
a183a15f 5809 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
5810 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
5811 }
5812
5813 if (unlikely(rc))
5814 rc = -EIO;
5815 return rc;
5816}
5817
5818/**
5819 * lpfc_sli4_alloc_extent - Allocate an SLI4 resource extent.
5820 * @phba: Pointer to HBA context object.
5821 * @type: The resource extent type to allocate.
5822 *
5823 * This function allocates the number of elements for the specified
5824 * resource type.
5825 **/
5826static int
5827lpfc_sli4_alloc_extent(struct lpfc_hba *phba, uint16_t type)
5828{
5829 bool emb = false;
5830 uint16_t rsrc_id_cnt, rsrc_cnt, rsrc_size;
5831 uint16_t rsrc_id, rsrc_start, j, k;
5832 uint16_t *ids;
5833 int i, rc;
5834 unsigned long longs;
5835 unsigned long *bmask;
5836 struct lpfc_rsrc_blks *rsrc_blks;
5837 LPFC_MBOXQ_t *mbox;
5838 uint32_t length;
5839 struct lpfc_id_range *id_array = NULL;
5840 void *virtaddr = NULL;
5841 struct lpfc_mbx_nembed_rsrc_extent *n_rsrc;
5842 struct lpfc_mbx_alloc_rsrc_extents *rsrc_ext;
5843 struct list_head *ext_blk_list;
5844
5845 rc = lpfc_sli4_get_avail_extnt_rsrc(phba, type,
5846 &rsrc_cnt,
5847 &rsrc_size);
5848 if (unlikely(rc))
5849 return -EIO;
5850
5851 if ((rsrc_cnt == 0) || (rsrc_size == 0)) {
5852 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
5853 "3009 No available Resource Extents "
5854 "for resource type 0x%x: Count: 0x%x, "
5855 "Size 0x%x\n", type, rsrc_cnt,
5856 rsrc_size);
5857 return -ENOMEM;
5858 }
5859
8a9d2e80
JS
5860 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_INIT | LOG_SLI,
5861 "2903 Post resource extents type-0x%x: "
5862 "count:%d, size %d\n", type, rsrc_cnt, rsrc_size);
6d368e53
JS
5863
5864 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5865 if (!mbox)
5866 return -ENOMEM;
5867
8a9d2e80 5868 rc = lpfc_sli4_cfg_post_extnts(phba, rsrc_cnt, type, &emb, mbox);
6d368e53
JS
5869 if (unlikely(rc)) {
5870 rc = -EIO;
5871 goto err_exit;
5872 }
5873
5874 /*
5875 * Figure out where the response is located. Then get local pointers
5876 * to the response data. The port does not guarantee to respond to
5877 * all extents counts request so update the local variable with the
5878 * allocated count from the port.
5879 */
5880 if (emb == LPFC_SLI4_MBX_EMBED) {
5881 rsrc_ext = &mbox->u.mqe.un.alloc_rsrc_extents;
5882 id_array = &rsrc_ext->u.rsp.id[0];
5883 rsrc_cnt = bf_get(lpfc_mbx_rsrc_cnt, &rsrc_ext->u.rsp);
5884 } else {
5885 virtaddr = mbox->sge_array->addr[0];
5886 n_rsrc = (struct lpfc_mbx_nembed_rsrc_extent *) virtaddr;
5887 rsrc_cnt = bf_get(lpfc_mbx_rsrc_cnt, n_rsrc);
5888 id_array = &n_rsrc->id;
5889 }
5890
5891 longs = ((rsrc_cnt * rsrc_size) + BITS_PER_LONG - 1) / BITS_PER_LONG;
5892 rsrc_id_cnt = rsrc_cnt * rsrc_size;
5893
5894 /*
5895 * Based on the resource size and count, correct the base and max
5896 * resource values.
5897 */
5898 length = sizeof(struct lpfc_rsrc_blks);
5899 switch (type) {
5900 case LPFC_RSC_TYPE_FCOE_RPI:
6396bb22 5901 phba->sli4_hba.rpi_bmask = kcalloc(longs,
6d368e53
JS
5902 sizeof(unsigned long),
5903 GFP_KERNEL);
5904 if (unlikely(!phba->sli4_hba.rpi_bmask)) {
5905 rc = -ENOMEM;
5906 goto err_exit;
5907 }
6396bb22 5908 phba->sli4_hba.rpi_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
5909 sizeof(uint16_t),
5910 GFP_KERNEL);
5911 if (unlikely(!phba->sli4_hba.rpi_ids)) {
5912 kfree(phba->sli4_hba.rpi_bmask);
5913 rc = -ENOMEM;
5914 goto err_exit;
5915 }
5916
5917 /*
5918 * The next_rpi was initialized with the maximum available
5919 * count but the port may allocate a smaller number. Catch
5920 * that case and update the next_rpi.
5921 */
5922 phba->sli4_hba.next_rpi = rsrc_id_cnt;
5923
5924 /* Initialize local ptrs for common extent processing later. */
5925 bmask = phba->sli4_hba.rpi_bmask;
5926 ids = phba->sli4_hba.rpi_ids;
5927 ext_blk_list = &phba->sli4_hba.lpfc_rpi_blk_list;
5928 break;
5929 case LPFC_RSC_TYPE_FCOE_VPI:
6396bb22 5930 phba->vpi_bmask = kcalloc(longs, sizeof(unsigned long),
6d368e53
JS
5931 GFP_KERNEL);
5932 if (unlikely(!phba->vpi_bmask)) {
5933 rc = -ENOMEM;
5934 goto err_exit;
5935 }
6396bb22 5936 phba->vpi_ids = kcalloc(rsrc_id_cnt, sizeof(uint16_t),
6d368e53
JS
5937 GFP_KERNEL);
5938 if (unlikely(!phba->vpi_ids)) {
5939 kfree(phba->vpi_bmask);
5940 rc = -ENOMEM;
5941 goto err_exit;
5942 }
5943
5944 /* Initialize local ptrs for common extent processing later. */
5945 bmask = phba->vpi_bmask;
5946 ids = phba->vpi_ids;
5947 ext_blk_list = &phba->lpfc_vpi_blk_list;
5948 break;
5949 case LPFC_RSC_TYPE_FCOE_XRI:
6396bb22 5950 phba->sli4_hba.xri_bmask = kcalloc(longs,
6d368e53
JS
5951 sizeof(unsigned long),
5952 GFP_KERNEL);
5953 if (unlikely(!phba->sli4_hba.xri_bmask)) {
5954 rc = -ENOMEM;
5955 goto err_exit;
5956 }
8a9d2e80 5957 phba->sli4_hba.max_cfg_param.xri_used = 0;
6396bb22 5958 phba->sli4_hba.xri_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
5959 sizeof(uint16_t),
5960 GFP_KERNEL);
5961 if (unlikely(!phba->sli4_hba.xri_ids)) {
5962 kfree(phba->sli4_hba.xri_bmask);
5963 rc = -ENOMEM;
5964 goto err_exit;
5965 }
5966
5967 /* Initialize local ptrs for common extent processing later. */
5968 bmask = phba->sli4_hba.xri_bmask;
5969 ids = phba->sli4_hba.xri_ids;
5970 ext_blk_list = &phba->sli4_hba.lpfc_xri_blk_list;
5971 break;
5972 case LPFC_RSC_TYPE_FCOE_VFI:
6396bb22 5973 phba->sli4_hba.vfi_bmask = kcalloc(longs,
6d368e53
JS
5974 sizeof(unsigned long),
5975 GFP_KERNEL);
5976 if (unlikely(!phba->sli4_hba.vfi_bmask)) {
5977 rc = -ENOMEM;
5978 goto err_exit;
5979 }
6396bb22 5980 phba->sli4_hba.vfi_ids = kcalloc(rsrc_id_cnt,
6d368e53
JS
5981 sizeof(uint16_t),
5982 GFP_KERNEL);
5983 if (unlikely(!phba->sli4_hba.vfi_ids)) {
5984 kfree(phba->sli4_hba.vfi_bmask);
5985 rc = -ENOMEM;
5986 goto err_exit;
5987 }
5988
5989 /* Initialize local ptrs for common extent processing later. */
5990 bmask = phba->sli4_hba.vfi_bmask;
5991 ids = phba->sli4_hba.vfi_ids;
5992 ext_blk_list = &phba->sli4_hba.lpfc_vfi_blk_list;
5993 break;
5994 default:
5995 /* Unsupported Opcode. Fail call. */
5996 id_array = NULL;
5997 bmask = NULL;
5998 ids = NULL;
5999 ext_blk_list = NULL;
6000 goto err_exit;
6001 }
6002
6003 /*
6004 * Complete initializing the extent configuration with the
6005 * allocated ids assigned to this function. The bitmask serves
6006 * as an index into the array and manages the available ids. The
6007 * array just stores the ids communicated to the port via the wqes.
6008 */
6009 for (i = 0, j = 0, k = 0; i < rsrc_cnt; i++) {
6010 if ((i % 2) == 0)
6011 rsrc_id = bf_get(lpfc_mbx_rsrc_id_word4_0,
6012 &id_array[k]);
6013 else
6014 rsrc_id = bf_get(lpfc_mbx_rsrc_id_word4_1,
6015 &id_array[k]);
6016
6017 rsrc_blks = kzalloc(length, GFP_KERNEL);
6018 if (unlikely(!rsrc_blks)) {
6019 rc = -ENOMEM;
6020 kfree(bmask);
6021 kfree(ids);
6022 goto err_exit;
6023 }
6024 rsrc_blks->rsrc_start = rsrc_id;
6025 rsrc_blks->rsrc_size = rsrc_size;
6026 list_add_tail(&rsrc_blks->list, ext_blk_list);
6027 rsrc_start = rsrc_id;
895427bd 6028 if ((type == LPFC_RSC_TYPE_FCOE_XRI) && (j == 0)) {
5e5b511d 6029 phba->sli4_hba.io_xri_start = rsrc_start +
895427bd 6030 lpfc_sli4_get_iocb_cnt(phba);
895427bd 6031 }
6d368e53
JS
6032
6033 while (rsrc_id < (rsrc_start + rsrc_size)) {
6034 ids[j] = rsrc_id;
6035 rsrc_id++;
6036 j++;
6037 }
6038 /* Entire word processed. Get next word.*/
6039 if ((i % 2) == 1)
6040 k++;
6041 }
6042 err_exit:
6043 lpfc_sli4_mbox_cmd_free(phba, mbox);
6044 return rc;
6045}
6046
895427bd
JS
6047
6048
6d368e53
JS
6049/**
6050 * lpfc_sli4_dealloc_extent - Deallocate an SLI4 resource extent.
6051 * @phba: Pointer to HBA context object.
6052 * @type: the extent's type.
6053 *
6054 * This function deallocates all extents of a particular resource type.
6055 * SLI4 does not allow for deallocating a particular extent range. It
6056 * is the caller's responsibility to release all kernel memory resources.
6057 **/
6058static int
6059lpfc_sli4_dealloc_extent(struct lpfc_hba *phba, uint16_t type)
6060{
6061 int rc;
6062 uint32_t length, mbox_tmo = 0;
6063 LPFC_MBOXQ_t *mbox;
6064 struct lpfc_mbx_dealloc_rsrc_extents *dealloc_rsrc;
6065 struct lpfc_rsrc_blks *rsrc_blk, *rsrc_blk_next;
6066
6067 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6068 if (!mbox)
6069 return -ENOMEM;
6070
6071 /*
6072 * This function sends an embedded mailbox because it only sends the
6073 * the resource type. All extents of this type are released by the
6074 * port.
6075 */
6076 length = (sizeof(struct lpfc_mbx_dealloc_rsrc_extents) -
6077 sizeof(struct lpfc_sli4_cfg_mhdr));
6078 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6079 LPFC_MBOX_OPCODE_DEALLOC_RSRC_EXTENT,
6080 length, LPFC_SLI4_MBX_EMBED);
6081
6082 /* Send an extents count of 0 - the dealloc doesn't use it. */
6083 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, 0, type,
6084 LPFC_SLI4_MBX_EMBED);
6085 if (unlikely(rc)) {
6086 rc = -EIO;
6087 goto out_free_mbox;
6088 }
6089 if (!phba->sli4_hba.intr_enable)
6090 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6091 else {
a183a15f 6092 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
6093 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
6094 }
6095 if (unlikely(rc)) {
6096 rc = -EIO;
6097 goto out_free_mbox;
6098 }
6099
6100 dealloc_rsrc = &mbox->u.mqe.un.dealloc_rsrc_extents;
6101 if (bf_get(lpfc_mbox_hdr_status,
6102 &dealloc_rsrc->header.cfg_shdr.response)) {
6103 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
6104 "2919 Failed to release resource extents "
6105 "for type %d - Status 0x%x Add'l Status 0x%x. "
6106 "Resource memory not released.\n",
6107 type,
6108 bf_get(lpfc_mbox_hdr_status,
6109 &dealloc_rsrc->header.cfg_shdr.response),
6110 bf_get(lpfc_mbox_hdr_add_status,
6111 &dealloc_rsrc->header.cfg_shdr.response));
6112 rc = -EIO;
6113 goto out_free_mbox;
6114 }
6115
6116 /* Release kernel memory resources for the specific type. */
6117 switch (type) {
6118 case LPFC_RSC_TYPE_FCOE_VPI:
6119 kfree(phba->vpi_bmask);
6120 kfree(phba->vpi_ids);
6121 bf_set(lpfc_vpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6122 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6123 &phba->lpfc_vpi_blk_list, list) {
6124 list_del_init(&rsrc_blk->list);
6125 kfree(rsrc_blk);
6126 }
16a3a208 6127 phba->sli4_hba.max_cfg_param.vpi_used = 0;
6d368e53
JS
6128 break;
6129 case LPFC_RSC_TYPE_FCOE_XRI:
6130 kfree(phba->sli4_hba.xri_bmask);
6131 kfree(phba->sli4_hba.xri_ids);
6d368e53
JS
6132 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6133 &phba->sli4_hba.lpfc_xri_blk_list, list) {
6134 list_del_init(&rsrc_blk->list);
6135 kfree(rsrc_blk);
6136 }
6137 break;
6138 case LPFC_RSC_TYPE_FCOE_VFI:
6139 kfree(phba->sli4_hba.vfi_bmask);
6140 kfree(phba->sli4_hba.vfi_ids);
6141 bf_set(lpfc_vfi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6142 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6143 &phba->sli4_hba.lpfc_vfi_blk_list, list) {
6144 list_del_init(&rsrc_blk->list);
6145 kfree(rsrc_blk);
6146 }
6147 break;
6148 case LPFC_RSC_TYPE_FCOE_RPI:
6149 /* RPI bitmask and physical id array are cleaned up earlier. */
6150 list_for_each_entry_safe(rsrc_blk, rsrc_blk_next,
6151 &phba->sli4_hba.lpfc_rpi_blk_list, list) {
6152 list_del_init(&rsrc_blk->list);
6153 kfree(rsrc_blk);
6154 }
6155 break;
6156 default:
6157 break;
6158 }
6159
6160 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6161
6162 out_free_mbox:
6163 mempool_free(mbox, phba->mbox_mem_pool);
6164 return rc;
6165}
6166
bd4b3e5c 6167static void
7bdedb34
JS
6168lpfc_set_features(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox,
6169 uint32_t feature)
65791f1f 6170{
65791f1f 6171 uint32_t len;
65791f1f 6172
65791f1f
JS
6173 len = sizeof(struct lpfc_mbx_set_feature) -
6174 sizeof(struct lpfc_sli4_cfg_mhdr);
6175 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6176 LPFC_MBOX_OPCODE_SET_FEATURES, len,
6177 LPFC_SLI4_MBX_EMBED);
7bdedb34
JS
6178
6179 switch (feature) {
6180 case LPFC_SET_UE_RECOVERY:
6181 bf_set(lpfc_mbx_set_feature_UER,
6182 &mbox->u.mqe.un.set_feature, 1);
6183 mbox->u.mqe.un.set_feature.feature = LPFC_SET_UE_RECOVERY;
6184 mbox->u.mqe.un.set_feature.param_len = 8;
6185 break;
6186 case LPFC_SET_MDS_DIAGS:
6187 bf_set(lpfc_mbx_set_feature_mds,
6188 &mbox->u.mqe.un.set_feature, 1);
6189 bf_set(lpfc_mbx_set_feature_mds_deep_loopbk,
ae9e28f3 6190 &mbox->u.mqe.un.set_feature, 1);
7bdedb34
JS
6191 mbox->u.mqe.un.set_feature.feature = LPFC_SET_MDS_DIAGS;
6192 mbox->u.mqe.un.set_feature.param_len = 8;
6193 break;
65791f1f 6194 }
7bdedb34
JS
6195
6196 return;
65791f1f
JS
6197}
6198
1165a5c2
JS
6199/**
6200 * lpfc_ras_stop_fwlog: Disable FW logging by the adapter
6201 * @phba: Pointer to HBA context object.
6202 *
6203 * Disable FW logging into host memory on the adapter. To
6204 * be done before reading logs from the host memory.
6205 **/
6206void
6207lpfc_ras_stop_fwlog(struct lpfc_hba *phba)
6208{
6209 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6210
6211 ras_fwlog->ras_active = false;
6212
6213 /* Disable FW logging to host memory */
6214 writel(LPFC_CTL_PDEV_CTL_DDL_RAS,
6215 phba->sli4_hba.conf_regs_memmap_p + LPFC_CTL_PDEV_CTL_OFFSET);
6216}
6217
d2cc9bcd
JS
6218/**
6219 * lpfc_sli4_ras_dma_free - Free memory allocated for FW logging.
6220 * @phba: Pointer to HBA context object.
6221 *
6222 * This function is called to free memory allocated for RAS FW logging
6223 * support in the driver.
6224 **/
6225void
6226lpfc_sli4_ras_dma_free(struct lpfc_hba *phba)
6227{
6228 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6229 struct lpfc_dmabuf *dmabuf, *next;
6230
6231 if (!list_empty(&ras_fwlog->fwlog_buff_list)) {
6232 list_for_each_entry_safe(dmabuf, next,
6233 &ras_fwlog->fwlog_buff_list,
6234 list) {
6235 list_del(&dmabuf->list);
6236 dma_free_coherent(&phba->pcidev->dev,
6237 LPFC_RAS_MAX_ENTRY_SIZE,
6238 dmabuf->virt, dmabuf->phys);
6239 kfree(dmabuf);
6240 }
6241 }
6242
6243 if (ras_fwlog->lwpd.virt) {
6244 dma_free_coherent(&phba->pcidev->dev,
6245 sizeof(uint32_t) * 2,
6246 ras_fwlog->lwpd.virt,
6247 ras_fwlog->lwpd.phys);
6248 ras_fwlog->lwpd.virt = NULL;
6249 }
6250
6251 ras_fwlog->ras_active = false;
6252}
6253
6254/**
6255 * lpfc_sli4_ras_dma_alloc: Allocate memory for FW support
6256 * @phba: Pointer to HBA context object.
6257 * @fwlog_buff_count: Count of buffers to be created.
6258 *
6259 * This routine DMA memory for Log Write Position Data[LPWD] and buffer
6260 * to update FW log is posted to the adapter.
6261 * Buffer count is calculated based on module param ras_fwlog_buffsize
6262 * Size of each buffer posted to FW is 64K.
6263 **/
6264
6265static int
6266lpfc_sli4_ras_dma_alloc(struct lpfc_hba *phba,
6267 uint32_t fwlog_buff_count)
6268{
6269 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6270 struct lpfc_dmabuf *dmabuf;
6271 int rc = 0, i = 0;
6272
6273 /* Initialize List */
6274 INIT_LIST_HEAD(&ras_fwlog->fwlog_buff_list);
6275
6276 /* Allocate memory for the LWPD */
6277 ras_fwlog->lwpd.virt = dma_alloc_coherent(&phba->pcidev->dev,
6278 sizeof(uint32_t) * 2,
6279 &ras_fwlog->lwpd.phys,
6280 GFP_KERNEL);
6281 if (!ras_fwlog->lwpd.virt) {
cb34990b 6282 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d2cc9bcd
JS
6283 "6185 LWPD Memory Alloc Failed\n");
6284
6285 return -ENOMEM;
6286 }
6287
6288 ras_fwlog->fw_buffcount = fwlog_buff_count;
6289 for (i = 0; i < ras_fwlog->fw_buffcount; i++) {
6290 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
6291 GFP_KERNEL);
6292 if (!dmabuf) {
6293 rc = -ENOMEM;
6294 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6295 "6186 Memory Alloc failed FW logging");
6296 goto free_mem;
6297 }
6298
359d0ac1 6299 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev,
d2cc9bcd
JS
6300 LPFC_RAS_MAX_ENTRY_SIZE,
6301 &dmabuf->phys,
6302 GFP_KERNEL);
6303 if (!dmabuf->virt) {
6304 kfree(dmabuf);
6305 rc = -ENOMEM;
6306 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6307 "6187 DMA Alloc Failed FW logging");
6308 goto free_mem;
6309 }
d2cc9bcd
JS
6310 dmabuf->buffer_tag = i;
6311 list_add_tail(&dmabuf->list, &ras_fwlog->fwlog_buff_list);
6312 }
6313
6314free_mem:
6315 if (rc)
6316 lpfc_sli4_ras_dma_free(phba);
6317
6318 return rc;
6319}
6320
6321/**
6322 * lpfc_sli4_ras_mbox_cmpl: Completion handler for RAS MBX command
6323 * @phba: pointer to lpfc hba data structure.
6324 * @pmboxq: pointer to the driver internal queue element for mailbox command.
6325 *
6326 * Completion handler for driver's RAS MBX command to the device.
6327 **/
6328static void
6329lpfc_sli4_ras_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
6330{
6331 MAILBOX_t *mb;
6332 union lpfc_sli4_cfg_shdr *shdr;
6333 uint32_t shdr_status, shdr_add_status;
6334 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6335
6336 mb = &pmb->u.mb;
6337
6338 shdr = (union lpfc_sli4_cfg_shdr *)
6339 &pmb->u.mqe.un.ras_fwlog.header.cfg_shdr;
6340 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
6341 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
6342
6343 if (mb->mbxStatus != MBX_SUCCESS || shdr_status) {
cb34990b 6344 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
d2cc9bcd
JS
6345 "6188 FW LOG mailbox "
6346 "completed with status x%x add_status x%x,"
6347 " mbx status x%x\n",
6348 shdr_status, shdr_add_status, mb->mbxStatus);
cb34990b
JS
6349
6350 ras_fwlog->ras_hwsupport = false;
d2cc9bcd
JS
6351 goto disable_ras;
6352 }
6353
6354 ras_fwlog->ras_active = true;
6355 mempool_free(pmb, phba->mbox_mem_pool);
6356
6357 return;
6358
6359disable_ras:
6360 /* Free RAS DMA memory */
6361 lpfc_sli4_ras_dma_free(phba);
6362 mempool_free(pmb, phba->mbox_mem_pool);
6363}
6364
6365/**
6366 * lpfc_sli4_ras_fwlog_init: Initialize memory and post RAS MBX command
6367 * @phba: pointer to lpfc hba data structure.
6368 * @fwlog_level: Logging verbosity level.
6369 * @fwlog_enable: Enable/Disable logging.
6370 *
6371 * Initialize memory and post mailbox command to enable FW logging in host
6372 * memory.
6373 **/
6374int
6375lpfc_sli4_ras_fwlog_init(struct lpfc_hba *phba,
6376 uint32_t fwlog_level,
6377 uint32_t fwlog_enable)
6378{
6379 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6380 struct lpfc_mbx_set_ras_fwlog *mbx_fwlog = NULL;
6381 struct lpfc_dmabuf *dmabuf;
6382 LPFC_MBOXQ_t *mbox;
6383 uint32_t len = 0, fwlog_buffsize, fwlog_entry_count;
6384 int rc = 0;
6385
6386 fwlog_buffsize = (LPFC_RAS_MIN_BUFF_POST_SIZE *
6387 phba->cfg_ras_fwlog_buffsize);
6388 fwlog_entry_count = (fwlog_buffsize/LPFC_RAS_MAX_ENTRY_SIZE);
6389
6390 /*
6391 * If re-enabling FW logging support use earlier allocated
6392 * DMA buffers while posting MBX command.
6393 **/
6394 if (!ras_fwlog->lwpd.virt) {
6395 rc = lpfc_sli4_ras_dma_alloc(phba, fwlog_entry_count);
6396 if (rc) {
6397 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
cb34990b 6398 "6189 FW Log Memory Allocation Failed");
d2cc9bcd
JS
6399 return rc;
6400 }
6401 }
6402
6403 /* Setup Mailbox command */
6404 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6405 if (!mbox) {
cb34990b 6406 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d2cc9bcd
JS
6407 "6190 RAS MBX Alloc Failed");
6408 rc = -ENOMEM;
6409 goto mem_free;
6410 }
6411
6412 ras_fwlog->fw_loglevel = fwlog_level;
6413 len = (sizeof(struct lpfc_mbx_set_ras_fwlog) -
6414 sizeof(struct lpfc_sli4_cfg_mhdr));
6415
6416 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_LOWLEVEL,
6417 LPFC_MBOX_OPCODE_SET_DIAG_LOG_OPTION,
6418 len, LPFC_SLI4_MBX_EMBED);
6419
6420 mbx_fwlog = (struct lpfc_mbx_set_ras_fwlog *)&mbox->u.mqe.un.ras_fwlog;
6421 bf_set(lpfc_fwlog_enable, &mbx_fwlog->u.request,
6422 fwlog_enable);
6423 bf_set(lpfc_fwlog_loglvl, &mbx_fwlog->u.request,
6424 ras_fwlog->fw_loglevel);
6425 bf_set(lpfc_fwlog_buffcnt, &mbx_fwlog->u.request,
6426 ras_fwlog->fw_buffcount);
6427 bf_set(lpfc_fwlog_buffsz, &mbx_fwlog->u.request,
6428 LPFC_RAS_MAX_ENTRY_SIZE/SLI4_PAGE_SIZE);
6429
6430 /* Update DMA buffer address */
6431 list_for_each_entry(dmabuf, &ras_fwlog->fwlog_buff_list, list) {
6432 memset(dmabuf->virt, 0, LPFC_RAS_MAX_ENTRY_SIZE);
6433
6434 mbx_fwlog->u.request.buff_fwlog[dmabuf->buffer_tag].addr_lo =
6435 putPaddrLow(dmabuf->phys);
6436
6437 mbx_fwlog->u.request.buff_fwlog[dmabuf->buffer_tag].addr_hi =
6438 putPaddrHigh(dmabuf->phys);
6439 }
6440
6441 /* Update LPWD address */
6442 mbx_fwlog->u.request.lwpd.addr_lo = putPaddrLow(ras_fwlog->lwpd.phys);
6443 mbx_fwlog->u.request.lwpd.addr_hi = putPaddrHigh(ras_fwlog->lwpd.phys);
6444
6445 mbox->vport = phba->pport;
6446 mbox->mbox_cmpl = lpfc_sli4_ras_mbox_cmpl;
6447
6448 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT);
6449
6450 if (rc == MBX_NOT_FINISHED) {
cb34990b
JS
6451 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6452 "6191 FW-Log Mailbox failed. "
d2cc9bcd
JS
6453 "status %d mbxStatus : x%x", rc,
6454 bf_get(lpfc_mqe_status, &mbox->u.mqe));
6455 mempool_free(mbox, phba->mbox_mem_pool);
6456 rc = -EIO;
6457 goto mem_free;
6458 } else
6459 rc = 0;
6460mem_free:
6461 if (rc)
6462 lpfc_sli4_ras_dma_free(phba);
6463
6464 return rc;
6465}
6466
6467/**
6468 * lpfc_sli4_ras_setup - Check if RAS supported on the adapter
6469 * @phba: Pointer to HBA context object.
6470 *
6471 * Check if RAS is supported on the adapter and initialize it.
6472 **/
6473void
6474lpfc_sli4_ras_setup(struct lpfc_hba *phba)
6475{
6476 /* Check RAS FW Log needs to be enabled or not */
6477 if (lpfc_check_fwlog_support(phba))
6478 return;
6479
6480 lpfc_sli4_ras_fwlog_init(phba, phba->cfg_ras_fwlog_level,
6481 LPFC_RAS_ENABLE_LOGGING);
6482}
6483
6d368e53
JS
6484/**
6485 * lpfc_sli4_alloc_resource_identifiers - Allocate all SLI4 resource extents.
6486 * @phba: Pointer to HBA context object.
6487 *
6488 * This function allocates all SLI4 resource identifiers.
6489 **/
6490int
6491lpfc_sli4_alloc_resource_identifiers(struct lpfc_hba *phba)
6492{
6493 int i, rc, error = 0;
6494 uint16_t count, base;
6495 unsigned long longs;
6496
ff78d8f9
JS
6497 if (!phba->sli4_hba.rpi_hdrs_in_use)
6498 phba->sli4_hba.next_rpi = phba->sli4_hba.max_cfg_param.max_rpi;
6d368e53
JS
6499 if (phba->sli4_hba.extents_in_use) {
6500 /*
6501 * The port supports resource extents. The XRI, VPI, VFI, RPI
6502 * resource extent count must be read and allocated before
6503 * provisioning the resource id arrays.
6504 */
6505 if (bf_get(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags) ==
6506 LPFC_IDX_RSRC_RDY) {
6507 /*
6508 * Extent-based resources are set - the driver could
6509 * be in a port reset. Figure out if any corrective
6510 * actions need to be taken.
6511 */
6512 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6513 LPFC_RSC_TYPE_FCOE_VFI);
6514 if (rc != 0)
6515 error++;
6516 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6517 LPFC_RSC_TYPE_FCOE_VPI);
6518 if (rc != 0)
6519 error++;
6520 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6521 LPFC_RSC_TYPE_FCOE_XRI);
6522 if (rc != 0)
6523 error++;
6524 rc = lpfc_sli4_chk_avail_extnt_rsrc(phba,
6525 LPFC_RSC_TYPE_FCOE_RPI);
6526 if (rc != 0)
6527 error++;
6528
6529 /*
6530 * It's possible that the number of resources
6531 * provided to this port instance changed between
6532 * resets. Detect this condition and reallocate
6533 * resources. Otherwise, there is no action.
6534 */
6535 if (error) {
6536 lpfc_printf_log(phba, KERN_INFO,
6537 LOG_MBOX | LOG_INIT,
6538 "2931 Detected extent resource "
6539 "change. Reallocating all "
6540 "extents.\n");
6541 rc = lpfc_sli4_dealloc_extent(phba,
6542 LPFC_RSC_TYPE_FCOE_VFI);
6543 rc = lpfc_sli4_dealloc_extent(phba,
6544 LPFC_RSC_TYPE_FCOE_VPI);
6545 rc = lpfc_sli4_dealloc_extent(phba,
6546 LPFC_RSC_TYPE_FCOE_XRI);
6547 rc = lpfc_sli4_dealloc_extent(phba,
6548 LPFC_RSC_TYPE_FCOE_RPI);
6549 } else
6550 return 0;
6551 }
6552
6553 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_VFI);
6554 if (unlikely(rc))
6555 goto err_exit;
6556
6557 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_VPI);
6558 if (unlikely(rc))
6559 goto err_exit;
6560
6561 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_RPI);
6562 if (unlikely(rc))
6563 goto err_exit;
6564
6565 rc = lpfc_sli4_alloc_extent(phba, LPFC_RSC_TYPE_FCOE_XRI);
6566 if (unlikely(rc))
6567 goto err_exit;
6568 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags,
6569 LPFC_IDX_RSRC_RDY);
6570 return rc;
6571 } else {
6572 /*
6573 * The port does not support resource extents. The XRI, VPI,
6574 * VFI, RPI resource ids were determined from READ_CONFIG.
6575 * Just allocate the bitmasks and provision the resource id
6576 * arrays. If a port reset is active, the resources don't
6577 * need any action - just exit.
6578 */
6579 if (bf_get(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags) ==
ff78d8f9
JS
6580 LPFC_IDX_RSRC_RDY) {
6581 lpfc_sli4_dealloc_resource_identifiers(phba);
6582 lpfc_sli4_remove_rpis(phba);
6583 }
6d368e53
JS
6584 /* RPIs. */
6585 count = phba->sli4_hba.max_cfg_param.max_rpi;
0a630c27
JS
6586 if (count <= 0) {
6587 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6588 "3279 Invalid provisioning of "
6589 "rpi:%d\n", count);
6590 rc = -EINVAL;
6591 goto err_exit;
6592 }
6d368e53
JS
6593 base = phba->sli4_hba.max_cfg_param.rpi_base;
6594 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6595 phba->sli4_hba.rpi_bmask = kcalloc(longs,
6d368e53
JS
6596 sizeof(unsigned long),
6597 GFP_KERNEL);
6598 if (unlikely(!phba->sli4_hba.rpi_bmask)) {
6599 rc = -ENOMEM;
6600 goto err_exit;
6601 }
6396bb22 6602 phba->sli4_hba.rpi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6603 GFP_KERNEL);
6604 if (unlikely(!phba->sli4_hba.rpi_ids)) {
6605 rc = -ENOMEM;
6606 goto free_rpi_bmask;
6607 }
6608
6609 for (i = 0; i < count; i++)
6610 phba->sli4_hba.rpi_ids[i] = base + i;
6611
6612 /* VPIs. */
6613 count = phba->sli4_hba.max_cfg_param.max_vpi;
0a630c27
JS
6614 if (count <= 0) {
6615 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6616 "3280 Invalid provisioning of "
6617 "vpi:%d\n", count);
6618 rc = -EINVAL;
6619 goto free_rpi_ids;
6620 }
6d368e53
JS
6621 base = phba->sli4_hba.max_cfg_param.vpi_base;
6622 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6623 phba->vpi_bmask = kcalloc(longs, sizeof(unsigned long),
6d368e53
JS
6624 GFP_KERNEL);
6625 if (unlikely(!phba->vpi_bmask)) {
6626 rc = -ENOMEM;
6627 goto free_rpi_ids;
6628 }
6396bb22 6629 phba->vpi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6630 GFP_KERNEL);
6631 if (unlikely(!phba->vpi_ids)) {
6632 rc = -ENOMEM;
6633 goto free_vpi_bmask;
6634 }
6635
6636 for (i = 0; i < count; i++)
6637 phba->vpi_ids[i] = base + i;
6638
6639 /* XRIs. */
6640 count = phba->sli4_hba.max_cfg_param.max_xri;
0a630c27
JS
6641 if (count <= 0) {
6642 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6643 "3281 Invalid provisioning of "
6644 "xri:%d\n", count);
6645 rc = -EINVAL;
6646 goto free_vpi_ids;
6647 }
6d368e53
JS
6648 base = phba->sli4_hba.max_cfg_param.xri_base;
6649 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6650 phba->sli4_hba.xri_bmask = kcalloc(longs,
6d368e53
JS
6651 sizeof(unsigned long),
6652 GFP_KERNEL);
6653 if (unlikely(!phba->sli4_hba.xri_bmask)) {
6654 rc = -ENOMEM;
6655 goto free_vpi_ids;
6656 }
41899be7 6657 phba->sli4_hba.max_cfg_param.xri_used = 0;
6396bb22 6658 phba->sli4_hba.xri_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6659 GFP_KERNEL);
6660 if (unlikely(!phba->sli4_hba.xri_ids)) {
6661 rc = -ENOMEM;
6662 goto free_xri_bmask;
6663 }
6664
6665 for (i = 0; i < count; i++)
6666 phba->sli4_hba.xri_ids[i] = base + i;
6667
6668 /* VFIs. */
6669 count = phba->sli4_hba.max_cfg_param.max_vfi;
0a630c27
JS
6670 if (count <= 0) {
6671 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6672 "3282 Invalid provisioning of "
6673 "vfi:%d\n", count);
6674 rc = -EINVAL;
6675 goto free_xri_ids;
6676 }
6d368e53
JS
6677 base = phba->sli4_hba.max_cfg_param.vfi_base;
6678 longs = (count + BITS_PER_LONG - 1) / BITS_PER_LONG;
6396bb22 6679 phba->sli4_hba.vfi_bmask = kcalloc(longs,
6d368e53
JS
6680 sizeof(unsigned long),
6681 GFP_KERNEL);
6682 if (unlikely(!phba->sli4_hba.vfi_bmask)) {
6683 rc = -ENOMEM;
6684 goto free_xri_ids;
6685 }
6396bb22 6686 phba->sli4_hba.vfi_ids = kcalloc(count, sizeof(uint16_t),
6d368e53
JS
6687 GFP_KERNEL);
6688 if (unlikely(!phba->sli4_hba.vfi_ids)) {
6689 rc = -ENOMEM;
6690 goto free_vfi_bmask;
6691 }
6692
6693 for (i = 0; i < count; i++)
6694 phba->sli4_hba.vfi_ids[i] = base + i;
6695
6696 /*
6697 * Mark all resources ready. An HBA reset doesn't need
6698 * to reset the initialization.
6699 */
6700 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags,
6701 LPFC_IDX_RSRC_RDY);
6702 return 0;
6703 }
6704
6705 free_vfi_bmask:
6706 kfree(phba->sli4_hba.vfi_bmask);
cd60be49 6707 phba->sli4_hba.vfi_bmask = NULL;
6d368e53
JS
6708 free_xri_ids:
6709 kfree(phba->sli4_hba.xri_ids);
cd60be49 6710 phba->sli4_hba.xri_ids = NULL;
6d368e53
JS
6711 free_xri_bmask:
6712 kfree(phba->sli4_hba.xri_bmask);
cd60be49 6713 phba->sli4_hba.xri_bmask = NULL;
6d368e53
JS
6714 free_vpi_ids:
6715 kfree(phba->vpi_ids);
cd60be49 6716 phba->vpi_ids = NULL;
6d368e53
JS
6717 free_vpi_bmask:
6718 kfree(phba->vpi_bmask);
cd60be49 6719 phba->vpi_bmask = NULL;
6d368e53
JS
6720 free_rpi_ids:
6721 kfree(phba->sli4_hba.rpi_ids);
cd60be49 6722 phba->sli4_hba.rpi_ids = NULL;
6d368e53
JS
6723 free_rpi_bmask:
6724 kfree(phba->sli4_hba.rpi_bmask);
cd60be49 6725 phba->sli4_hba.rpi_bmask = NULL;
6d368e53
JS
6726 err_exit:
6727 return rc;
6728}
6729
6730/**
6731 * lpfc_sli4_dealloc_resource_identifiers - Deallocate all SLI4 resource extents.
6732 * @phba: Pointer to HBA context object.
6733 *
6734 * This function allocates the number of elements for the specified
6735 * resource type.
6736 **/
6737int
6738lpfc_sli4_dealloc_resource_identifiers(struct lpfc_hba *phba)
6739{
6740 if (phba->sli4_hba.extents_in_use) {
6741 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_VPI);
6742 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_RPI);
6743 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_XRI);
6744 lpfc_sli4_dealloc_extent(phba, LPFC_RSC_TYPE_FCOE_VFI);
6745 } else {
6746 kfree(phba->vpi_bmask);
16a3a208 6747 phba->sli4_hba.max_cfg_param.vpi_used = 0;
6d368e53
JS
6748 kfree(phba->vpi_ids);
6749 bf_set(lpfc_vpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6750 kfree(phba->sli4_hba.xri_bmask);
6751 kfree(phba->sli4_hba.xri_ids);
6d368e53
JS
6752 kfree(phba->sli4_hba.vfi_bmask);
6753 kfree(phba->sli4_hba.vfi_ids);
6754 bf_set(lpfc_vfi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6755 bf_set(lpfc_idx_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6756 }
6757
6758 return 0;
6759}
6760
b76f2dc9
JS
6761/**
6762 * lpfc_sli4_get_allocated_extnts - Get the port's allocated extents.
6763 * @phba: Pointer to HBA context object.
6764 * @type: The resource extent type.
6765 * @extnt_count: buffer to hold port extent count response
6766 * @extnt_size: buffer to hold port extent size response.
6767 *
6768 * This function calls the port to read the host allocated extents
6769 * for a particular type.
6770 **/
6771int
6772lpfc_sli4_get_allocated_extnts(struct lpfc_hba *phba, uint16_t type,
6773 uint16_t *extnt_cnt, uint16_t *extnt_size)
6774{
6775 bool emb;
6776 int rc = 0;
6777 uint16_t curr_blks = 0;
6778 uint32_t req_len, emb_len;
6779 uint32_t alloc_len, mbox_tmo;
6780 struct list_head *blk_list_head;
6781 struct lpfc_rsrc_blks *rsrc_blk;
6782 LPFC_MBOXQ_t *mbox;
6783 void *virtaddr = NULL;
6784 struct lpfc_mbx_nembed_rsrc_extent *n_rsrc;
6785 struct lpfc_mbx_alloc_rsrc_extents *rsrc_ext;
6786 union lpfc_sli4_cfg_shdr *shdr;
6787
6788 switch (type) {
6789 case LPFC_RSC_TYPE_FCOE_VPI:
6790 blk_list_head = &phba->lpfc_vpi_blk_list;
6791 break;
6792 case LPFC_RSC_TYPE_FCOE_XRI:
6793 blk_list_head = &phba->sli4_hba.lpfc_xri_blk_list;
6794 break;
6795 case LPFC_RSC_TYPE_FCOE_VFI:
6796 blk_list_head = &phba->sli4_hba.lpfc_vfi_blk_list;
6797 break;
6798 case LPFC_RSC_TYPE_FCOE_RPI:
6799 blk_list_head = &phba->sli4_hba.lpfc_rpi_blk_list;
6800 break;
6801 default:
6802 return -EIO;
6803 }
6804
6805 /* Count the number of extents currently allocatd for this type. */
6806 list_for_each_entry(rsrc_blk, blk_list_head, list) {
6807 if (curr_blks == 0) {
6808 /*
6809 * The GET_ALLOCATED mailbox does not return the size,
6810 * just the count. The size should be just the size
6811 * stored in the current allocated block and all sizes
6812 * for an extent type are the same so set the return
6813 * value now.
6814 */
6815 *extnt_size = rsrc_blk->rsrc_size;
6816 }
6817 curr_blks++;
6818 }
6819
b76f2dc9
JS
6820 /*
6821 * Calculate the size of an embedded mailbox. The uint32_t
6822 * accounts for extents-specific word.
6823 */
6824 emb_len = sizeof(MAILBOX_t) - sizeof(struct mbox_header) -
6825 sizeof(uint32_t);
6826
6827 /*
6828 * Presume the allocation and response will fit into an embedded
6829 * mailbox. If not true, reconfigure to a non-embedded mailbox.
6830 */
6831 emb = LPFC_SLI4_MBX_EMBED;
6832 req_len = emb_len;
6833 if (req_len > emb_len) {
6834 req_len = curr_blks * sizeof(uint16_t) +
6835 sizeof(union lpfc_sli4_cfg_shdr) +
6836 sizeof(uint32_t);
6837 emb = LPFC_SLI4_MBX_NEMBED;
6838 }
6839
6840 mbox = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6841 if (!mbox)
6842 return -ENOMEM;
6843 memset(mbox, 0, sizeof(LPFC_MBOXQ_t));
6844
6845 alloc_len = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
6846 LPFC_MBOX_OPCODE_GET_ALLOC_RSRC_EXTENT,
6847 req_len, emb);
6848 if (alloc_len < req_len) {
6849 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6850 "2983 Allocated DMA memory size (x%x) is "
6851 "less than the requested DMA memory "
6852 "size (x%x)\n", alloc_len, req_len);
6853 rc = -ENOMEM;
6854 goto err_exit;
6855 }
6856 rc = lpfc_sli4_mbox_rsrc_extent(phba, mbox, curr_blks, type, emb);
6857 if (unlikely(rc)) {
6858 rc = -EIO;
6859 goto err_exit;
6860 }
6861
6862 if (!phba->sli4_hba.intr_enable)
6863 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6864 else {
a183a15f 6865 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
b76f2dc9
JS
6866 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
6867 }
6868
6869 if (unlikely(rc)) {
6870 rc = -EIO;
6871 goto err_exit;
6872 }
6873
6874 /*
6875 * Figure out where the response is located. Then get local pointers
6876 * to the response data. The port does not guarantee to respond to
6877 * all extents counts request so update the local variable with the
6878 * allocated count from the port.
6879 */
6880 if (emb == LPFC_SLI4_MBX_EMBED) {
6881 rsrc_ext = &mbox->u.mqe.un.alloc_rsrc_extents;
6882 shdr = &rsrc_ext->header.cfg_shdr;
6883 *extnt_cnt = bf_get(lpfc_mbx_rsrc_cnt, &rsrc_ext->u.rsp);
6884 } else {
6885 virtaddr = mbox->sge_array->addr[0];
6886 n_rsrc = (struct lpfc_mbx_nembed_rsrc_extent *) virtaddr;
6887 shdr = &n_rsrc->cfg_shdr;
6888 *extnt_cnt = bf_get(lpfc_mbx_rsrc_cnt, n_rsrc);
6889 }
6890
6891 if (bf_get(lpfc_mbox_hdr_status, &shdr->response)) {
6892 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
6893 "2984 Failed to read allocated resources "
6894 "for type %d - Status 0x%x Add'l Status 0x%x.\n",
6895 type,
6896 bf_get(lpfc_mbox_hdr_status, &shdr->response),
6897 bf_get(lpfc_mbox_hdr_add_status, &shdr->response));
6898 rc = -EIO;
6899 goto err_exit;
6900 }
6901 err_exit:
6902 lpfc_sli4_mbox_cmd_free(phba, mbox);
6903 return rc;
6904}
6905
8a9d2e80 6906/**
0ef69968 6907 * lpfc_sli4_repost_sgl_list - Repost the buffers sgl pages as block
8a9d2e80 6908 * @phba: pointer to lpfc hba data structure.
895427bd
JS
6909 * @pring: Pointer to driver SLI ring object.
6910 * @sgl_list: linked link of sgl buffers to post
6911 * @cnt: number of linked list buffers
8a9d2e80 6912 *
895427bd 6913 * This routine walks the list of buffers that have been allocated and
8a9d2e80
JS
6914 * repost them to the port by using SGL block post. This is needed after a
6915 * pci_function_reset/warm_start or start. It attempts to construct blocks
895427bd
JS
6916 * of buffer sgls which contains contiguous xris and uses the non-embedded
6917 * SGL block post mailbox commands to post them to the port. For single
8a9d2e80
JS
6918 * buffer sgl with non-contiguous xri, if any, it shall use embedded SGL post
6919 * mailbox command for posting.
6920 *
6921 * Returns: 0 = success, non-zero failure.
6922 **/
6923static int
895427bd
JS
6924lpfc_sli4_repost_sgl_list(struct lpfc_hba *phba,
6925 struct list_head *sgl_list, int cnt)
8a9d2e80
JS
6926{
6927 struct lpfc_sglq *sglq_entry = NULL;
6928 struct lpfc_sglq *sglq_entry_next = NULL;
6929 struct lpfc_sglq *sglq_entry_first = NULL;
895427bd
JS
6930 int status, total_cnt;
6931 int post_cnt = 0, num_posted = 0, block_cnt = 0;
8a9d2e80
JS
6932 int last_xritag = NO_XRI;
6933 LIST_HEAD(prep_sgl_list);
6934 LIST_HEAD(blck_sgl_list);
6935 LIST_HEAD(allc_sgl_list);
6936 LIST_HEAD(post_sgl_list);
6937 LIST_HEAD(free_sgl_list);
6938
38c20673 6939 spin_lock_irq(&phba->hbalock);
895427bd
JS
6940 spin_lock(&phba->sli4_hba.sgl_list_lock);
6941 list_splice_init(sgl_list, &allc_sgl_list);
6942 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 6943 spin_unlock_irq(&phba->hbalock);
8a9d2e80 6944
895427bd 6945 total_cnt = cnt;
8a9d2e80
JS
6946 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
6947 &allc_sgl_list, list) {
6948 list_del_init(&sglq_entry->list);
6949 block_cnt++;
6950 if ((last_xritag != NO_XRI) &&
6951 (sglq_entry->sli4_xritag != last_xritag + 1)) {
6952 /* a hole in xri block, form a sgl posting block */
6953 list_splice_init(&prep_sgl_list, &blck_sgl_list);
6954 post_cnt = block_cnt - 1;
6955 /* prepare list for next posting block */
6956 list_add_tail(&sglq_entry->list, &prep_sgl_list);
6957 block_cnt = 1;
6958 } else {
6959 /* prepare list for next posting block */
6960 list_add_tail(&sglq_entry->list, &prep_sgl_list);
6961 /* enough sgls for non-embed sgl mbox command */
6962 if (block_cnt == LPFC_NEMBED_MBOX_SGL_CNT) {
6963 list_splice_init(&prep_sgl_list,
6964 &blck_sgl_list);
6965 post_cnt = block_cnt;
6966 block_cnt = 0;
6967 }
6968 }
6969 num_posted++;
6970
6971 /* keep track of last sgl's xritag */
6972 last_xritag = sglq_entry->sli4_xritag;
6973
895427bd
JS
6974 /* end of repost sgl list condition for buffers */
6975 if (num_posted == total_cnt) {
8a9d2e80
JS
6976 if (post_cnt == 0) {
6977 list_splice_init(&prep_sgl_list,
6978 &blck_sgl_list);
6979 post_cnt = block_cnt;
6980 } else if (block_cnt == 1) {
6981 status = lpfc_sli4_post_sgl(phba,
6982 sglq_entry->phys, 0,
6983 sglq_entry->sli4_xritag);
6984 if (!status) {
6985 /* successful, put sgl to posted list */
6986 list_add_tail(&sglq_entry->list,
6987 &post_sgl_list);
6988 } else {
6989 /* Failure, put sgl to free list */
6990 lpfc_printf_log(phba, KERN_WARNING,
6991 LOG_SLI,
895427bd 6992 "3159 Failed to post "
8a9d2e80
JS
6993 "sgl, xritag:x%x\n",
6994 sglq_entry->sli4_xritag);
6995 list_add_tail(&sglq_entry->list,
6996 &free_sgl_list);
711ea882 6997 total_cnt--;
8a9d2e80
JS
6998 }
6999 }
7000 }
7001
7002 /* continue until a nembed page worth of sgls */
7003 if (post_cnt == 0)
7004 continue;
7005
895427bd
JS
7006 /* post the buffer list sgls as a block */
7007 status = lpfc_sli4_post_sgl_list(phba, &blck_sgl_list,
7008 post_cnt);
8a9d2e80
JS
7009
7010 if (!status) {
7011 /* success, put sgl list to posted sgl list */
7012 list_splice_init(&blck_sgl_list, &post_sgl_list);
7013 } else {
7014 /* Failure, put sgl list to free sgl list */
7015 sglq_entry_first = list_first_entry(&blck_sgl_list,
7016 struct lpfc_sglq,
7017 list);
7018 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
895427bd 7019 "3160 Failed to post sgl-list, "
8a9d2e80
JS
7020 "xritag:x%x-x%x\n",
7021 sglq_entry_first->sli4_xritag,
7022 (sglq_entry_first->sli4_xritag +
7023 post_cnt - 1));
7024 list_splice_init(&blck_sgl_list, &free_sgl_list);
711ea882 7025 total_cnt -= post_cnt;
8a9d2e80
JS
7026 }
7027
7028 /* don't reset xirtag due to hole in xri block */
7029 if (block_cnt == 0)
7030 last_xritag = NO_XRI;
7031
895427bd 7032 /* reset sgl post count for next round of posting */
8a9d2e80
JS
7033 post_cnt = 0;
7034 }
7035
895427bd 7036 /* free the sgls failed to post */
8a9d2e80
JS
7037 lpfc_free_sgl_list(phba, &free_sgl_list);
7038
895427bd 7039 /* push sgls posted to the available list */
8a9d2e80 7040 if (!list_empty(&post_sgl_list)) {
38c20673 7041 spin_lock_irq(&phba->hbalock);
895427bd
JS
7042 spin_lock(&phba->sli4_hba.sgl_list_lock);
7043 list_splice_init(&post_sgl_list, sgl_list);
7044 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 7045 spin_unlock_irq(&phba->hbalock);
8a9d2e80
JS
7046 } else {
7047 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
895427bd 7048 "3161 Failure to post sgl to port.\n");
8a9d2e80
JS
7049 return -EIO;
7050 }
895427bd
JS
7051
7052 /* return the number of XRIs actually posted */
7053 return total_cnt;
8a9d2e80
JS
7054}
7055
0794d601 7056/**
5e5b511d 7057 * lpfc_sli4_repost_io_sgl_list - Repost all the allocated nvme buffer sgls
0794d601
JS
7058 * @phba: pointer to lpfc hba data structure.
7059 *
7060 * This routine walks the list of nvme buffers that have been allocated and
7061 * repost them to the port by using SGL block post. This is needed after a
7062 * pci_function_reset/warm_start or start. The lpfc_hba_down_post_s4 routine
7063 * is responsible for moving all nvme buffers on the lpfc_abts_nvme_sgl_list
5e5b511d 7064 * to the lpfc_io_buf_list. If the repost fails, reject all nvme buffers.
0794d601
JS
7065 *
7066 * Returns: 0 = success, non-zero failure.
7067 **/
7068int
5e5b511d 7069lpfc_sli4_repost_io_sgl_list(struct lpfc_hba *phba)
0794d601
JS
7070{
7071 LIST_HEAD(post_nblist);
7072 int num_posted, rc = 0;
7073
7074 /* get all NVME buffers need to repost to a local list */
5e5b511d 7075 lpfc_io_buf_flush(phba, &post_nblist);
0794d601
JS
7076
7077 /* post the list of nvme buffer sgls to port if available */
7078 if (!list_empty(&post_nblist)) {
5e5b511d
JS
7079 num_posted = lpfc_sli4_post_io_sgl_list(
7080 phba, &post_nblist, phba->sli4_hba.io_xri_cnt);
0794d601
JS
7081 /* failed to post any nvme buffer, return error */
7082 if (num_posted == 0)
7083 rc = -EIO;
7084 }
7085 return rc;
7086}
7087
61bda8f7
JS
7088void
7089lpfc_set_host_data(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox)
7090{
7091 uint32_t len;
7092
7093 len = sizeof(struct lpfc_mbx_set_host_data) -
7094 sizeof(struct lpfc_sli4_cfg_mhdr);
7095 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
7096 LPFC_MBOX_OPCODE_SET_HOST_DATA, len,
7097 LPFC_SLI4_MBX_EMBED);
7098
7099 mbox->u.mqe.un.set_host_data.param_id = LPFC_SET_HOST_OS_DRIVER_VERSION;
b2fd103b
JS
7100 mbox->u.mqe.un.set_host_data.param_len =
7101 LPFC_HOST_OS_DRIVER_VERSION_SIZE;
61bda8f7
JS
7102 snprintf(mbox->u.mqe.un.set_host_data.data,
7103 LPFC_HOST_OS_DRIVER_VERSION_SIZE,
7104 "Linux %s v"LPFC_DRIVER_VERSION,
7105 (phba->hba_flag & HBA_FCOE_MODE) ? "FCoE" : "FC");
7106}
7107
a8cf5dfe 7108int
6c621a22 7109lpfc_post_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *hrq,
a8cf5dfe 7110 struct lpfc_queue *drq, int count, int idx)
6c621a22
JS
7111{
7112 int rc, i;
7113 struct lpfc_rqe hrqe;
7114 struct lpfc_rqe drqe;
7115 struct lpfc_rqb *rqbp;
411de511 7116 unsigned long flags;
6c621a22
JS
7117 struct rqb_dmabuf *rqb_buffer;
7118 LIST_HEAD(rqb_buf_list);
7119
411de511 7120 spin_lock_irqsave(&phba->hbalock, flags);
6c621a22
JS
7121 rqbp = hrq->rqbp;
7122 for (i = 0; i < count; i++) {
7123 /* IF RQ is already full, don't bother */
7124 if (rqbp->buffer_count + i >= rqbp->entry_count - 1)
7125 break;
7126 rqb_buffer = rqbp->rqb_alloc_buffer(phba);
7127 if (!rqb_buffer)
7128 break;
7129 rqb_buffer->hrq = hrq;
7130 rqb_buffer->drq = drq;
a8cf5dfe 7131 rqb_buffer->idx = idx;
6c621a22
JS
7132 list_add_tail(&rqb_buffer->hbuf.list, &rqb_buf_list);
7133 }
7134 while (!list_empty(&rqb_buf_list)) {
7135 list_remove_head(&rqb_buf_list, rqb_buffer, struct rqb_dmabuf,
7136 hbuf.list);
7137
7138 hrqe.address_lo = putPaddrLow(rqb_buffer->hbuf.phys);
7139 hrqe.address_hi = putPaddrHigh(rqb_buffer->hbuf.phys);
7140 drqe.address_lo = putPaddrLow(rqb_buffer->dbuf.phys);
7141 drqe.address_hi = putPaddrHigh(rqb_buffer->dbuf.phys);
7142 rc = lpfc_sli4_rq_put(hrq, drq, &hrqe, &drqe);
7143 if (rc < 0) {
411de511
JS
7144 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7145 "6421 Cannot post to HRQ %d: %x %x %x "
7146 "DRQ %x %x\n",
7147 hrq->queue_id,
7148 hrq->host_index,
7149 hrq->hba_index,
7150 hrq->entry_count,
7151 drq->host_index,
7152 drq->hba_index);
6c621a22
JS
7153 rqbp->rqb_free_buffer(phba, rqb_buffer);
7154 } else {
7155 list_add_tail(&rqb_buffer->hbuf.list,
7156 &rqbp->rqb_buffer_list);
7157 rqbp->buffer_count++;
7158 }
7159 }
411de511 7160 spin_unlock_irqrestore(&phba->hbalock, flags);
6c621a22
JS
7161 return 1;
7162}
7163
da0436e9 7164/**
183b8021 7165 * lpfc_sli4_hba_setup - SLI4 device initialization PCI function
da0436e9
JS
7166 * @phba: Pointer to HBA context object.
7167 *
183b8021
MY
7168 * This function is the main SLI4 device initialization PCI function. This
7169 * function is called by the HBA initialization code, HBA reset code and
da0436e9
JS
7170 * HBA error attention handler code. Caller is not required to hold any
7171 * locks.
7172 **/
7173int
7174lpfc_sli4_hba_setup(struct lpfc_hba *phba)
7175{
c490850a 7176 int rc, i, cnt, len;
da0436e9
JS
7177 LPFC_MBOXQ_t *mboxq;
7178 struct lpfc_mqe *mqe;
7179 uint8_t *vpd;
7180 uint32_t vpd_size;
7181 uint32_t ftr_rsp = 0;
7182 struct Scsi_Host *shost = lpfc_shost_from_vport(phba->pport);
7183 struct lpfc_vport *vport = phba->pport;
7184 struct lpfc_dmabuf *mp;
2d7dbc4c 7185 struct lpfc_rqb *rqbp;
da0436e9
JS
7186
7187 /* Perform a PCI function reset to start from clean */
7188 rc = lpfc_pci_function_reset(phba);
7189 if (unlikely(rc))
7190 return -ENODEV;
7191
7192 /* Check the HBA Host Status Register for readyness */
7193 rc = lpfc_sli4_post_status_check(phba);
7194 if (unlikely(rc))
7195 return -ENODEV;
7196 else {
7197 spin_lock_irq(&phba->hbalock);
7198 phba->sli.sli_flag |= LPFC_SLI_ACTIVE;
7199 spin_unlock_irq(&phba->hbalock);
7200 }
7201
7202 /*
7203 * Allocate a single mailbox container for initializing the
7204 * port.
7205 */
7206 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
7207 if (!mboxq)
7208 return -ENOMEM;
7209
da0436e9 7210 /* Issue READ_REV to collect vpd and FW information. */
49198b37 7211 vpd_size = SLI4_PAGE_SIZE;
da0436e9
JS
7212 vpd = kzalloc(vpd_size, GFP_KERNEL);
7213 if (!vpd) {
7214 rc = -ENOMEM;
7215 goto out_free_mbox;
7216 }
7217
7218 rc = lpfc_sli4_read_rev(phba, mboxq, vpd, &vpd_size);
76a95d75
JS
7219 if (unlikely(rc)) {
7220 kfree(vpd);
7221 goto out_free_mbox;
7222 }
572709e2 7223
da0436e9 7224 mqe = &mboxq->u.mqe;
f1126688 7225 phba->sli_rev = bf_get(lpfc_mbx_rd_rev_sli_lvl, &mqe->un.read_rev);
b5c53958 7226 if (bf_get(lpfc_mbx_rd_rev_fcoe, &mqe->un.read_rev)) {
76a95d75 7227 phba->hba_flag |= HBA_FCOE_MODE;
b5c53958
JS
7228 phba->fcp_embed_io = 0; /* SLI4 FC support only */
7229 } else {
76a95d75 7230 phba->hba_flag &= ~HBA_FCOE_MODE;
b5c53958 7231 }
45ed1190
JS
7232
7233 if (bf_get(lpfc_mbx_rd_rev_cee_ver, &mqe->un.read_rev) ==
7234 LPFC_DCBX_CEE_MODE)
7235 phba->hba_flag |= HBA_FIP_SUPPORT;
7236 else
7237 phba->hba_flag &= ~HBA_FIP_SUPPORT;
7238
4f2e66c6
JS
7239 phba->hba_flag &= ~HBA_FCP_IOQ_FLUSH;
7240
c31098ce 7241 if (phba->sli_rev != LPFC_SLI_REV4) {
da0436e9
JS
7242 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7243 "0376 READ_REV Error. SLI Level %d "
7244 "FCoE enabled %d\n",
76a95d75 7245 phba->sli_rev, phba->hba_flag & HBA_FCOE_MODE);
da0436e9 7246 rc = -EIO;
76a95d75
JS
7247 kfree(vpd);
7248 goto out_free_mbox;
da0436e9 7249 }
cd1c8301 7250
ff78d8f9
JS
7251 /*
7252 * Continue initialization with default values even if driver failed
7253 * to read FCoE param config regions, only read parameters if the
7254 * board is FCoE
7255 */
7256 if (phba->hba_flag & HBA_FCOE_MODE &&
7257 lpfc_sli4_read_fcoe_params(phba))
7258 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_INIT,
7259 "2570 Failed to read FCoE parameters\n");
7260
cd1c8301
JS
7261 /*
7262 * Retrieve sli4 device physical port name, failure of doing it
7263 * is considered as non-fatal.
7264 */
7265 rc = lpfc_sli4_retrieve_pport_name(phba);
7266 if (!rc)
7267 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
7268 "3080 Successful retrieving SLI4 device "
7269 "physical port name: %s.\n", phba->Port);
7270
da0436e9
JS
7271 /*
7272 * Evaluate the read rev and vpd data. Populate the driver
7273 * state with the results. If this routine fails, the failure
7274 * is not fatal as the driver will use generic values.
7275 */
7276 rc = lpfc_parse_vpd(phba, vpd, vpd_size);
7277 if (unlikely(!rc)) {
7278 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7279 "0377 Error %d parsing vpd. "
7280 "Using defaults.\n", rc);
7281 rc = 0;
7282 }
76a95d75 7283 kfree(vpd);
da0436e9 7284
f1126688
JS
7285 /* Save information as VPD data */
7286 phba->vpd.rev.biuRev = mqe->un.read_rev.first_hw_rev;
7287 phba->vpd.rev.smRev = mqe->un.read_rev.second_hw_rev;
4e565cf0
JS
7288
7289 /*
7290 * This is because first G7 ASIC doesn't support the standard
7291 * 0x5a NVME cmd descriptor type/subtype
7292 */
7293 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
7294 LPFC_SLI_INTF_IF_TYPE_6) &&
7295 (phba->vpd.rev.biuRev == LPFC_G7_ASIC_1) &&
7296 (phba->vpd.rev.smRev == 0) &&
7297 (phba->cfg_nvme_embed_cmd == 1))
7298 phba->cfg_nvme_embed_cmd = 0;
7299
f1126688
JS
7300 phba->vpd.rev.endecRev = mqe->un.read_rev.third_hw_rev;
7301 phba->vpd.rev.fcphHigh = bf_get(lpfc_mbx_rd_rev_fcph_high,
7302 &mqe->un.read_rev);
7303 phba->vpd.rev.fcphLow = bf_get(lpfc_mbx_rd_rev_fcph_low,
7304 &mqe->un.read_rev);
7305 phba->vpd.rev.feaLevelHigh = bf_get(lpfc_mbx_rd_rev_ftr_lvl_high,
7306 &mqe->un.read_rev);
7307 phba->vpd.rev.feaLevelLow = bf_get(lpfc_mbx_rd_rev_ftr_lvl_low,
7308 &mqe->un.read_rev);
7309 phba->vpd.rev.sli1FwRev = mqe->un.read_rev.fw_id_rev;
7310 memcpy(phba->vpd.rev.sli1FwName, mqe->un.read_rev.fw_name, 16);
7311 phba->vpd.rev.sli2FwRev = mqe->un.read_rev.ulp_fw_id_rev;
7312 memcpy(phba->vpd.rev.sli2FwName, mqe->un.read_rev.ulp_fw_name, 16);
7313 phba->vpd.rev.opFwRev = mqe->un.read_rev.fw_id_rev;
7314 memcpy(phba->vpd.rev.opFwName, mqe->un.read_rev.fw_name, 16);
7315 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
7316 "(%d):0380 READ_REV Status x%x "
7317 "fw_rev:%s fcphHi:%x fcphLo:%x flHi:%x flLo:%x\n",
7318 mboxq->vport ? mboxq->vport->vpi : 0,
7319 bf_get(lpfc_mqe_status, mqe),
7320 phba->vpd.rev.opFwName,
7321 phba->vpd.rev.fcphHigh, phba->vpd.rev.fcphLow,
7322 phba->vpd.rev.feaLevelHigh, phba->vpd.rev.feaLevelLow);
da0436e9 7323
572709e2
JS
7324 /* Reset the DFT_LUN_Q_DEPTH to (max xri >> 3) */
7325 rc = (phba->sli4_hba.max_cfg_param.max_xri >> 3);
7326 if (phba->pport->cfg_lun_queue_depth > rc) {
7327 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7328 "3362 LUN queue depth changed from %d to %d\n",
7329 phba->pport->cfg_lun_queue_depth, rc);
7330 phba->pport->cfg_lun_queue_depth = rc;
7331 }
7332
65791f1f 7333 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
7bdedb34
JS
7334 LPFC_SLI_INTF_IF_TYPE_0) {
7335 lpfc_set_features(phba, mboxq, LPFC_SET_UE_RECOVERY);
7336 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7337 if (rc == MBX_SUCCESS) {
7338 phba->hba_flag |= HBA_RECOVERABLE_UE;
7339 /* Set 1Sec interval to detect UE */
7340 phba->eratt_poll_interval = 1;
7341 phba->sli4_hba.ue_to_sr = bf_get(
7342 lpfc_mbx_set_feature_UESR,
7343 &mboxq->u.mqe.un.set_feature);
7344 phba->sli4_hba.ue_to_rp = bf_get(
7345 lpfc_mbx_set_feature_UERP,
7346 &mboxq->u.mqe.un.set_feature);
7347 }
7348 }
7349
7350 if (phba->cfg_enable_mds_diags && phba->mds_diags_support) {
7351 /* Enable MDS Diagnostics only if the SLI Port supports it */
7352 lpfc_set_features(phba, mboxq, LPFC_SET_MDS_DIAGS);
7353 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7354 if (rc != MBX_SUCCESS)
7355 phba->mds_diags_support = 0;
7356 }
572709e2 7357
da0436e9
JS
7358 /*
7359 * Discover the port's supported feature set and match it against the
7360 * hosts requests.
7361 */
7362 lpfc_request_features(phba, mboxq);
7363 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7364 if (unlikely(rc)) {
7365 rc = -EIO;
76a95d75 7366 goto out_free_mbox;
da0436e9
JS
7367 }
7368
7369 /*
7370 * The port must support FCP initiator mode as this is the
7371 * only mode running in the host.
7372 */
7373 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_fcpi, &mqe->un.req_ftrs))) {
7374 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7375 "0378 No support for fcpi mode.\n");
7376 ftr_rsp++;
7377 }
0bc2b7c5
JS
7378
7379 /* Performance Hints are ONLY for FCoE */
7380 if (phba->hba_flag & HBA_FCOE_MODE) {
7381 if (bf_get(lpfc_mbx_rq_ftr_rsp_perfh, &mqe->un.req_ftrs))
7382 phba->sli3_options |= LPFC_SLI4_PERFH_ENABLED;
7383 else
7384 phba->sli3_options &= ~LPFC_SLI4_PERFH_ENABLED;
7385 }
7386
da0436e9
JS
7387 /*
7388 * If the port cannot support the host's requested features
7389 * then turn off the global config parameters to disable the
7390 * feature in the driver. This is not a fatal error.
7391 */
f44ac12f
JS
7392 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
7393 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_dif, &mqe->un.req_ftrs))) {
7394 phba->cfg_enable_bg = 0;
7395 phba->sli3_options &= ~LPFC_SLI3_BG_ENABLED;
bf08611b 7396 ftr_rsp++;
f44ac12f 7397 }
bf08611b 7398 }
da0436e9
JS
7399
7400 if (phba->max_vpi && phba->cfg_enable_npiv &&
7401 !(bf_get(lpfc_mbx_rq_ftr_rsp_npiv, &mqe->un.req_ftrs)))
7402 ftr_rsp++;
7403
7404 if (ftr_rsp) {
7405 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7406 "0379 Feature Mismatch Data: x%08x %08x "
7407 "x%x x%x x%x\n", mqe->un.req_ftrs.word2,
7408 mqe->un.req_ftrs.word3, phba->cfg_enable_bg,
7409 phba->cfg_enable_npiv, phba->max_vpi);
7410 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_dif, &mqe->un.req_ftrs)))
7411 phba->cfg_enable_bg = 0;
7412 if (!(bf_get(lpfc_mbx_rq_ftr_rsp_npiv, &mqe->un.req_ftrs)))
7413 phba->cfg_enable_npiv = 0;
7414 }
7415
7416 /* These SLI3 features are assumed in SLI4 */
7417 spin_lock_irq(&phba->hbalock);
7418 phba->sli3_options |= (LPFC_SLI3_NPIV_ENABLED | LPFC_SLI3_HBQ_ENABLED);
7419 spin_unlock_irq(&phba->hbalock);
7420
6d368e53
JS
7421 /*
7422 * Allocate all resources (xri,rpi,vpi,vfi) now. Subsequent
7423 * calls depends on these resources to complete port setup.
7424 */
7425 rc = lpfc_sli4_alloc_resource_identifiers(phba);
7426 if (rc) {
7427 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7428 "2920 Failed to alloc Resource IDs "
7429 "rc = x%x\n", rc);
7430 goto out_free_mbox;
7431 }
7432
61bda8f7
JS
7433 lpfc_set_host_data(phba, mboxq);
7434
7435 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7436 if (rc) {
7437 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
7438 "2134 Failed to set host os driver version %x",
7439 rc);
7440 }
7441
da0436e9 7442 /* Read the port's service parameters. */
9f1177a3
JS
7443 rc = lpfc_read_sparam(phba, mboxq, vport->vpi);
7444 if (rc) {
7445 phba->link_state = LPFC_HBA_ERROR;
7446 rc = -ENOMEM;
76a95d75 7447 goto out_free_mbox;
9f1177a3
JS
7448 }
7449
da0436e9
JS
7450 mboxq->vport = vport;
7451 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
3e1f0718 7452 mp = (struct lpfc_dmabuf *)mboxq->ctx_buf;
da0436e9
JS
7453 if (rc == MBX_SUCCESS) {
7454 memcpy(&vport->fc_sparam, mp->virt, sizeof(struct serv_parm));
7455 rc = 0;
7456 }
7457
7458 /*
7459 * This memory was allocated by the lpfc_read_sparam routine. Release
7460 * it to the mbuf pool.
7461 */
7462 lpfc_mbuf_free(phba, mp->virt, mp->phys);
7463 kfree(mp);
3e1f0718 7464 mboxq->ctx_buf = NULL;
da0436e9
JS
7465 if (unlikely(rc)) {
7466 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7467 "0382 READ_SPARAM command failed "
7468 "status %d, mbxStatus x%x\n",
7469 rc, bf_get(lpfc_mqe_status, mqe));
7470 phba->link_state = LPFC_HBA_ERROR;
7471 rc = -EIO;
76a95d75 7472 goto out_free_mbox;
da0436e9
JS
7473 }
7474
0558056c 7475 lpfc_update_vport_wwn(vport);
da0436e9
JS
7476
7477 /* Update the fc_host data structures with new wwn. */
7478 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
7479 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
7480
895427bd
JS
7481 /* Create all the SLI4 queues */
7482 rc = lpfc_sli4_queue_create(phba);
7483 if (rc) {
7484 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7485 "3089 Failed to allocate queues\n");
7486 rc = -ENODEV;
7487 goto out_free_mbox;
7488 }
7489 /* Set up all the queues to the device */
7490 rc = lpfc_sli4_queue_setup(phba);
7491 if (unlikely(rc)) {
7492 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7493 "0381 Error %d during queue setup.\n ", rc);
7494 goto out_stop_timers;
7495 }
7496 /* Initialize the driver internal SLI layer lists. */
7497 lpfc_sli4_setup(phba);
7498 lpfc_sli4_queue_init(phba);
7499
7500 /* update host els xri-sgl sizes and mappings */
7501 rc = lpfc_sli4_els_sgl_update(phba);
8a9d2e80
JS
7502 if (unlikely(rc)) {
7503 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7504 "1400 Failed to update xri-sgl size and "
7505 "mapping: %d\n", rc);
895427bd 7506 goto out_destroy_queue;
da0436e9
JS
7507 }
7508
8a9d2e80 7509 /* register the els sgl pool to the port */
895427bd
JS
7510 rc = lpfc_sli4_repost_sgl_list(phba, &phba->sli4_hba.lpfc_els_sgl_list,
7511 phba->sli4_hba.els_xri_cnt);
7512 if (unlikely(rc < 0)) {
8a9d2e80
JS
7513 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7514 "0582 Error %d during els sgl post "
7515 "operation\n", rc);
7516 rc = -ENODEV;
895427bd 7517 goto out_destroy_queue;
8a9d2e80 7518 }
895427bd 7519 phba->sli4_hba.els_xri_cnt = rc;
8a9d2e80 7520
f358dd0c
JS
7521 if (phba->nvmet_support) {
7522 /* update host nvmet xri-sgl sizes and mappings */
7523 rc = lpfc_sli4_nvmet_sgl_update(phba);
7524 if (unlikely(rc)) {
7525 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7526 "6308 Failed to update nvmet-sgl size "
7527 "and mapping: %d\n", rc);
7528 goto out_destroy_queue;
7529 }
7530
7531 /* register the nvmet sgl pool to the port */
7532 rc = lpfc_sli4_repost_sgl_list(
7533 phba,
7534 &phba->sli4_hba.lpfc_nvmet_sgl_list,
7535 phba->sli4_hba.nvmet_xri_cnt);
7536 if (unlikely(rc < 0)) {
7537 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7538 "3117 Error %d during nvmet "
7539 "sgl post\n", rc);
7540 rc = -ENODEV;
7541 goto out_destroy_queue;
7542 }
7543 phba->sli4_hba.nvmet_xri_cnt = rc;
6c621a22
JS
7544
7545 cnt = phba->cfg_iocb_cnt * 1024;
7546 /* We need 1 iocbq for every SGL, for IO processing */
7547 cnt += phba->sli4_hba.nvmet_xri_cnt;
f358dd0c 7548 } else {
0794d601 7549 /* update host common xri-sgl sizes and mappings */
5e5b511d 7550 rc = lpfc_sli4_io_sgl_update(phba);
895427bd
JS
7551 if (unlikely(rc)) {
7552 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
0794d601 7553 "6082 Failed to update nvme-sgl size "
895427bd
JS
7554 "and mapping: %d\n", rc);
7555 goto out_destroy_queue;
7556 }
7557
0794d601 7558 /* register the allocated common sgl pool to the port */
5e5b511d 7559 rc = lpfc_sli4_repost_io_sgl_list(phba);
895427bd
JS
7560 if (unlikely(rc)) {
7561 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
0794d601
JS
7562 "6116 Error %d during nvme sgl post "
7563 "operation\n", rc);
7564 /* Some NVME buffers were moved to abort nvme list */
7565 /* A pci function reset will repost them */
7566 rc = -ENODEV;
895427bd
JS
7567 goto out_destroy_queue;
7568 }
6c621a22 7569 cnt = phba->cfg_iocb_cnt * 1024;
11e644e2
JS
7570 }
7571
7572 if (!phba->sli.iocbq_lookup) {
6c621a22
JS
7573 /* Initialize and populate the iocb list per host */
7574 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11e644e2 7575 "2821 initialize iocb list %d total %d\n",
6c621a22
JS
7576 phba->cfg_iocb_cnt, cnt);
7577 rc = lpfc_init_iocb_list(phba, cnt);
7578 if (rc) {
7579 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11e644e2 7580 "1413 Failed to init iocb list.\n");
6c621a22
JS
7581 goto out_destroy_queue;
7582 }
895427bd
JS
7583 }
7584
11e644e2
JS
7585 if (phba->nvmet_support)
7586 lpfc_nvmet_create_targetport(phba);
7587
2d7dbc4c 7588 if (phba->nvmet_support && phba->cfg_nvmet_mrq) {
2d7dbc4c
JS
7589 /* Post initial buffers to all RQs created */
7590 for (i = 0; i < phba->cfg_nvmet_mrq; i++) {
7591 rqbp = phba->sli4_hba.nvmet_mrq_hdr[i]->rqbp;
7592 INIT_LIST_HEAD(&rqbp->rqb_buffer_list);
7593 rqbp->rqb_alloc_buffer = lpfc_sli4_nvmet_alloc;
7594 rqbp->rqb_free_buffer = lpfc_sli4_nvmet_free;
61f3d4bf 7595 rqbp->entry_count = LPFC_NVMET_RQE_DEF_COUNT;
2d7dbc4c
JS
7596 rqbp->buffer_count = 0;
7597
2d7dbc4c
JS
7598 lpfc_post_rq_buffer(
7599 phba, phba->sli4_hba.nvmet_mrq_hdr[i],
7600 phba->sli4_hba.nvmet_mrq_data[i],
2448e484 7601 phba->cfg_nvmet_mrq_post, i);
2d7dbc4c
JS
7602 }
7603 }
7604
da0436e9
JS
7605 /* Post the rpi header region to the device. */
7606 rc = lpfc_sli4_post_all_rpi_hdrs(phba);
7607 if (unlikely(rc)) {
7608 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7609 "0393 Error %d during rpi post operation\n",
7610 rc);
7611 rc = -ENODEV;
895427bd 7612 goto out_destroy_queue;
da0436e9 7613 }
97f2ecf1 7614 lpfc_sli4_node_prep(phba);
da0436e9 7615
895427bd 7616 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
2d7dbc4c 7617 if ((phba->nvmet_support == 0) || (phba->cfg_nvmet_mrq == 1)) {
895427bd
JS
7618 /*
7619 * The FC Port needs to register FCFI (index 0)
7620 */
7621 lpfc_reg_fcfi(phba, mboxq);
7622 mboxq->vport = phba->pport;
7623 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7624 if (rc != MBX_SUCCESS)
7625 goto out_unset_queue;
7626 rc = 0;
7627 phba->fcf.fcfi = bf_get(lpfc_reg_fcfi_fcfi,
7628 &mboxq->u.mqe.un.reg_fcfi);
2d7dbc4c
JS
7629 } else {
7630 /* We are a NVME Target mode with MRQ > 1 */
7631
7632 /* First register the FCFI */
7633 lpfc_reg_fcfi_mrq(phba, mboxq, 0);
7634 mboxq->vport = phba->pport;
7635 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7636 if (rc != MBX_SUCCESS)
7637 goto out_unset_queue;
7638 rc = 0;
7639 phba->fcf.fcfi = bf_get(lpfc_reg_fcfi_mrq_fcfi,
7640 &mboxq->u.mqe.un.reg_fcfi_mrq);
7641
7642 /* Next register the MRQs */
7643 lpfc_reg_fcfi_mrq(phba, mboxq, 1);
7644 mboxq->vport = phba->pport;
7645 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7646 if (rc != MBX_SUCCESS)
7647 goto out_unset_queue;
7648 rc = 0;
895427bd
JS
7649 }
7650 /* Check if the port is configured to be disabled */
7651 lpfc_sli_read_link_ste(phba);
da0436e9
JS
7652 }
7653
c490850a
JS
7654 /* Don't post more new bufs if repost already recovered
7655 * the nvme sgls.
7656 */
7657 if (phba->nvmet_support == 0) {
7658 if (phba->sli4_hba.io_xri_cnt == 0) {
7659 len = lpfc_new_io_buf(
7660 phba, phba->sli4_hba.io_xri_max);
7661 if (len == 0) {
7662 rc = -ENOMEM;
7663 goto out_unset_queue;
7664 }
7665
7666 if (phba->cfg_xri_rebalancing)
7667 lpfc_create_multixri_pools(phba);
7668 }
7669 } else {
7670 phba->cfg_xri_rebalancing = 0;
7671 }
7672
da0436e9
JS
7673 /* Arm the CQs and then EQs on device */
7674 lpfc_sli4_arm_cqeq_intr(phba);
7675
7676 /* Indicate device interrupt mode */
7677 phba->sli4_hba.intr_enable = 1;
7678
7679 /* Allow asynchronous mailbox command to go through */
7680 spin_lock_irq(&phba->hbalock);
7681 phba->sli.sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
7682 spin_unlock_irq(&phba->hbalock);
7683
7684 /* Post receive buffers to the device */
7685 lpfc_sli4_rb_setup(phba);
7686
fc2b989b
JS
7687 /* Reset HBA FCF states after HBA reset */
7688 phba->fcf.fcf_flag = 0;
7689 phba->fcf.current_rec.flag = 0;
7690
da0436e9 7691 /* Start the ELS watchdog timer */
8fa38513 7692 mod_timer(&vport->els_tmofunc,
256ec0d0 7693 jiffies + msecs_to_jiffies(1000 * (phba->fc_ratov * 2)));
da0436e9
JS
7694
7695 /* Start heart beat timer */
7696 mod_timer(&phba->hb_tmofunc,
256ec0d0 7697 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
da0436e9
JS
7698 phba->hb_outstanding = 0;
7699 phba->last_completion_time = jiffies;
7700
7701 /* Start error attention (ERATT) polling timer */
256ec0d0 7702 mod_timer(&phba->eratt_poll,
65791f1f 7703 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
da0436e9 7704
75baf696
JS
7705 /* Enable PCIe device Advanced Error Reporting (AER) if configured */
7706 if (phba->cfg_aer_support == 1 && !(phba->hba_flag & HBA_AER_ENABLED)) {
7707 rc = pci_enable_pcie_error_reporting(phba->pcidev);
7708 if (!rc) {
7709 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7710 "2829 This device supports "
7711 "Advanced Error Reporting (AER)\n");
7712 spin_lock_irq(&phba->hbalock);
7713 phba->hba_flag |= HBA_AER_ENABLED;
7714 spin_unlock_irq(&phba->hbalock);
7715 } else {
7716 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7717 "2830 This device does not support "
7718 "Advanced Error Reporting (AER)\n");
7719 phba->cfg_aer_support = 0;
7720 }
0a96e975 7721 rc = 0;
75baf696
JS
7722 }
7723
da0436e9
JS
7724 /*
7725 * The port is ready, set the host's link state to LINK_DOWN
7726 * in preparation for link interrupts.
7727 */
da0436e9
JS
7728 spin_lock_irq(&phba->hbalock);
7729 phba->link_state = LPFC_LINK_DOWN;
1dc5ec24
JS
7730
7731 /* Check if physical ports are trunked */
7732 if (bf_get(lpfc_conf_trunk_port0, &phba->sli4_hba))
7733 phba->trunk_link.link0.state = LPFC_LINK_DOWN;
7734 if (bf_get(lpfc_conf_trunk_port1, &phba->sli4_hba))
7735 phba->trunk_link.link1.state = LPFC_LINK_DOWN;
7736 if (bf_get(lpfc_conf_trunk_port2, &phba->sli4_hba))
7737 phba->trunk_link.link2.state = LPFC_LINK_DOWN;
7738 if (bf_get(lpfc_conf_trunk_port3, &phba->sli4_hba))
7739 phba->trunk_link.link3.state = LPFC_LINK_DOWN;
da0436e9 7740 spin_unlock_irq(&phba->hbalock);
1dc5ec24 7741
026abb87
JS
7742 if (!(phba->hba_flag & HBA_FCOE_MODE) &&
7743 (phba->hba_flag & LINK_DISABLED)) {
7744 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_SLI,
7745 "3103 Adapter Link is disabled.\n");
7746 lpfc_down_link(phba, mboxq);
7747 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7748 if (rc != MBX_SUCCESS) {
7749 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_SLI,
7750 "3104 Adapter failed to issue "
7751 "DOWN_LINK mbox cmd, rc:x%x\n", rc);
c490850a 7752 goto out_io_buff_free;
026abb87
JS
7753 }
7754 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
1b51197d
JS
7755 /* don't perform init_link on SLI4 FC port loopback test */
7756 if (!(phba->link_flag & LS_LOOPBACK_MODE)) {
7757 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
7758 if (rc)
c490850a 7759 goto out_io_buff_free;
1b51197d 7760 }
5350d872
JS
7761 }
7762 mempool_free(mboxq, phba->mbox_mem_pool);
7763 return rc;
c490850a
JS
7764out_io_buff_free:
7765 /* Free allocated IO Buffers */
7766 lpfc_io_free(phba);
76a95d75 7767out_unset_queue:
da0436e9 7768 /* Unset all the queues set up in this routine when error out */
5350d872
JS
7769 lpfc_sli4_queue_unset(phba);
7770out_destroy_queue:
6c621a22 7771 lpfc_free_iocb_list(phba);
5350d872 7772 lpfc_sli4_queue_destroy(phba);
da0436e9 7773out_stop_timers:
5350d872 7774 lpfc_stop_hba_timers(phba);
da0436e9
JS
7775out_free_mbox:
7776 mempool_free(mboxq, phba->mbox_mem_pool);
7777 return rc;
7778}
7779
7780/**
7781 * lpfc_mbox_timeout - Timeout call back function for mbox timer
7782 * @ptr: context object - pointer to hba structure.
7783 *
7784 * This is the callback function for mailbox timer. The mailbox
7785 * timer is armed when a new mailbox command is issued and the timer
7786 * is deleted when the mailbox complete. The function is called by
7787 * the kernel timer code when a mailbox does not complete within
7788 * expected time. This function wakes up the worker thread to
7789 * process the mailbox timeout and returns. All the processing is
7790 * done by the worker thread function lpfc_mbox_timeout_handler.
7791 **/
7792void
f22eb4d3 7793lpfc_mbox_timeout(struct timer_list *t)
da0436e9 7794{
f22eb4d3 7795 struct lpfc_hba *phba = from_timer(phba, t, sli.mbox_tmo);
da0436e9
JS
7796 unsigned long iflag;
7797 uint32_t tmo_posted;
7798
7799 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
7800 tmo_posted = phba->pport->work_port_events & WORKER_MBOX_TMO;
7801 if (!tmo_posted)
7802 phba->pport->work_port_events |= WORKER_MBOX_TMO;
7803 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
7804
7805 if (!tmo_posted)
7806 lpfc_worker_wake_up(phba);
7807 return;
7808}
7809
e8d3c3b1
JS
7810/**
7811 * lpfc_sli4_mbox_completions_pending - check to see if any mailbox completions
7812 * are pending
7813 * @phba: Pointer to HBA context object.
7814 *
7815 * This function checks if any mailbox completions are present on the mailbox
7816 * completion queue.
7817 **/
3bb11fc5 7818static bool
e8d3c3b1
JS
7819lpfc_sli4_mbox_completions_pending(struct lpfc_hba *phba)
7820{
7821
7822 uint32_t idx;
7823 struct lpfc_queue *mcq;
7824 struct lpfc_mcqe *mcqe;
7825 bool pending_completions = false;
7365f6fd 7826 uint8_t qe_valid;
e8d3c3b1
JS
7827
7828 if (unlikely(!phba) || (phba->sli_rev != LPFC_SLI_REV4))
7829 return false;
7830
7831 /* Check for completions on mailbox completion queue */
7832
7833 mcq = phba->sli4_hba.mbx_cq;
7834 idx = mcq->hba_index;
7365f6fd
JS
7835 qe_valid = mcq->qe_valid;
7836 while (bf_get_le32(lpfc_cqe_valid, mcq->qe[idx].cqe) == qe_valid) {
e8d3c3b1
JS
7837 mcqe = (struct lpfc_mcqe *)mcq->qe[idx].cqe;
7838 if (bf_get_le32(lpfc_trailer_completed, mcqe) &&
7839 (!bf_get_le32(lpfc_trailer_async, mcqe))) {
7840 pending_completions = true;
7841 break;
7842 }
7843 idx = (idx + 1) % mcq->entry_count;
7844 if (mcq->hba_index == idx)
7845 break;
7365f6fd
JS
7846
7847 /* if the index wrapped around, toggle the valid bit */
7848 if (phba->sli4_hba.pc_sli4_params.cqav && !idx)
7849 qe_valid = (qe_valid) ? 0 : 1;
e8d3c3b1
JS
7850 }
7851 return pending_completions;
7852
7853}
7854
7855/**
7856 * lpfc_sli4_process_missed_mbox_completions - process mbox completions
7857 * that were missed.
7858 * @phba: Pointer to HBA context object.
7859 *
7860 * For sli4, it is possible to miss an interrupt. As such mbox completions
7861 * maybe missed causing erroneous mailbox timeouts to occur. This function
7862 * checks to see if mbox completions are on the mailbox completion queue
7863 * and will process all the completions associated with the eq for the
7864 * mailbox completion queue.
7865 **/
7866bool
7867lpfc_sli4_process_missed_mbox_completions(struct lpfc_hba *phba)
7868{
b71413dd 7869 struct lpfc_sli4_hba *sli4_hba = &phba->sli4_hba;
e8d3c3b1
JS
7870 uint32_t eqidx;
7871 struct lpfc_queue *fpeq = NULL;
7872 struct lpfc_eqe *eqe;
7873 bool mbox_pending;
7874
7875 if (unlikely(!phba) || (phba->sli_rev != LPFC_SLI_REV4))
7876 return false;
7877
7878 /* Find the eq associated with the mcq */
7879
cdb42bec
JS
7880 if (sli4_hba->hdwq)
7881 for (eqidx = 0; eqidx < phba->cfg_hdw_queue; eqidx++)
7882 if (sli4_hba->hdwq[eqidx].hba_eq->queue_id ==
b71413dd 7883 sli4_hba->mbx_cq->assoc_qid) {
cdb42bec 7884 fpeq = sli4_hba->hdwq[eqidx].hba_eq;
e8d3c3b1
JS
7885 break;
7886 }
7887 if (!fpeq)
7888 return false;
7889
7890 /* Turn off interrupts from this EQ */
7891
b71413dd 7892 sli4_hba->sli4_eq_clr_intr(fpeq);
e8d3c3b1
JS
7893
7894 /* Check to see if a mbox completion is pending */
7895
7896 mbox_pending = lpfc_sli4_mbox_completions_pending(phba);
7897
7898 /*
7899 * If a mbox completion is pending, process all the events on EQ
7900 * associated with the mbox completion queue (this could include
7901 * mailbox commands, async events, els commands, receive queue data
7902 * and fcp commands)
7903 */
7904
7905 if (mbox_pending)
7906 while ((eqe = lpfc_sli4_eq_get(fpeq))) {
7907 lpfc_sli4_hba_handle_eqe(phba, eqe, eqidx);
7908 fpeq->EQ_processed++;
7909 }
7910
7911 /* Always clear and re-arm the EQ */
7912
b71413dd 7913 sli4_hba->sli4_eq_release(fpeq, LPFC_QUEUE_REARM);
e8d3c3b1
JS
7914
7915 return mbox_pending;
7916
7917}
da0436e9
JS
7918
7919/**
7920 * lpfc_mbox_timeout_handler - Worker thread function to handle mailbox timeout
7921 * @phba: Pointer to HBA context object.
7922 *
7923 * This function is called from worker thread when a mailbox command times out.
7924 * The caller is not required to hold any locks. This function will reset the
7925 * HBA and recover all the pending commands.
7926 **/
7927void
7928lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
7929{
7930 LPFC_MBOXQ_t *pmbox = phba->sli.mbox_active;
eb016566
JS
7931 MAILBOX_t *mb = NULL;
7932
da0436e9 7933 struct lpfc_sli *psli = &phba->sli;
da0436e9 7934
e8d3c3b1
JS
7935 /* If the mailbox completed, process the completion and return */
7936 if (lpfc_sli4_process_missed_mbox_completions(phba))
7937 return;
7938
eb016566
JS
7939 if (pmbox != NULL)
7940 mb = &pmbox->u.mb;
da0436e9
JS
7941 /* Check the pmbox pointer first. There is a race condition
7942 * between the mbox timeout handler getting executed in the
7943 * worklist and the mailbox actually completing. When this
7944 * race condition occurs, the mbox_active will be NULL.
7945 */
7946 spin_lock_irq(&phba->hbalock);
7947 if (pmbox == NULL) {
7948 lpfc_printf_log(phba, KERN_WARNING,
7949 LOG_MBOX | LOG_SLI,
7950 "0353 Active Mailbox cleared - mailbox timeout "
7951 "exiting\n");
7952 spin_unlock_irq(&phba->hbalock);
7953 return;
7954 }
7955
7956 /* Mbox cmd <mbxCommand> timeout */
7957 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7958 "0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
7959 mb->mbxCommand,
7960 phba->pport->port_state,
7961 phba->sli.sli_flag,
7962 phba->sli.mbox_active);
7963 spin_unlock_irq(&phba->hbalock);
7964
7965 /* Setting state unknown so lpfc_sli_abort_iocb_ring
7966 * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
25985edc 7967 * it to fail all outstanding SCSI IO.
da0436e9
JS
7968 */
7969 spin_lock_irq(&phba->pport->work_port_lock);
7970 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
7971 spin_unlock_irq(&phba->pport->work_port_lock);
7972 spin_lock_irq(&phba->hbalock);
7973 phba->link_state = LPFC_LINK_UNKNOWN;
f4b4c68f 7974 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
da0436e9
JS
7975 spin_unlock_irq(&phba->hbalock);
7976
db55fba8 7977 lpfc_sli_abort_fcp_rings(phba);
da0436e9
JS
7978
7979 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7980 "0345 Resetting board due to mailbox timeout\n");
7981
7982 /* Reset the HBA device */
7983 lpfc_reset_hba(phba);
7984}
7985
7986/**
7987 * lpfc_sli_issue_mbox_s3 - Issue an SLI3 mailbox command to firmware
7988 * @phba: Pointer to HBA context object.
7989 * @pmbox: Pointer to mailbox object.
7990 * @flag: Flag indicating how the mailbox need to be processed.
7991 *
7992 * This function is called by discovery code and HBA management code
7993 * to submit a mailbox command to firmware with SLI-3 interface spec. This
7994 * function gets the hbalock to protect the data structures.
7995 * The mailbox command can be submitted in polling mode, in which case
7996 * this function will wait in a polling loop for the completion of the
7997 * mailbox.
7998 * If the mailbox is submitted in no_wait mode (not polling) the
7999 * function will submit the command and returns immediately without waiting
8000 * for the mailbox completion. The no_wait is supported only when HBA
8001 * is in SLI2/SLI3 mode - interrupts are enabled.
8002 * The SLI interface allows only one mailbox pending at a time. If the
8003 * mailbox is issued in polling mode and there is already a mailbox
8004 * pending, then the function will return an error. If the mailbox is issued
8005 * in NO_WAIT mode and there is a mailbox pending already, the function
8006 * will return MBX_BUSY after queuing the mailbox into mailbox queue.
8007 * The sli layer owns the mailbox object until the completion of mailbox
8008 * command if this function return MBX_BUSY or MBX_SUCCESS. For all other
8009 * return codes the caller owns the mailbox command after the return of
8010 * the function.
e59058c4 8011 **/
3772a991
JS
8012static int
8013lpfc_sli_issue_mbox_s3(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox,
8014 uint32_t flag)
dea3101e 8015{
bf07bdea 8016 MAILBOX_t *mbx;
2e0fef85 8017 struct lpfc_sli *psli = &phba->sli;
dea3101e 8018 uint32_t status, evtctr;
9940b97b 8019 uint32_t ha_copy, hc_copy;
dea3101e 8020 int i;
09372820 8021 unsigned long timeout;
dea3101e 8022 unsigned long drvr_flag = 0;
34b02dcd 8023 uint32_t word0, ldata;
dea3101e 8024 void __iomem *to_slim;
58da1ffb
JS
8025 int processing_queue = 0;
8026
8027 spin_lock_irqsave(&phba->hbalock, drvr_flag);
8028 if (!pmbox) {
8568a4d2 8029 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
58da1ffb 8030 /* processing mbox queue from intr_handler */
3772a991
JS
8031 if (unlikely(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
8032 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8033 return MBX_SUCCESS;
8034 }
58da1ffb 8035 processing_queue = 1;
58da1ffb
JS
8036 pmbox = lpfc_mbox_get(phba);
8037 if (!pmbox) {
8038 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8039 return MBX_SUCCESS;
8040 }
8041 }
dea3101e 8042
ed957684 8043 if (pmbox->mbox_cmpl && pmbox->mbox_cmpl != lpfc_sli_def_mbox_cmpl &&
92d7f7b0 8044 pmbox->mbox_cmpl != lpfc_sli_wake_mbox_wait) {
ed957684 8045 if(!pmbox->vport) {
58da1ffb 8046 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
ed957684 8047 lpfc_printf_log(phba, KERN_ERR,
92d7f7b0 8048 LOG_MBOX | LOG_VPORT,
e8b62011 8049 "1806 Mbox x%x failed. No vport\n",
3772a991 8050 pmbox->u.mb.mbxCommand);
ed957684 8051 dump_stack();
58da1ffb 8052 goto out_not_finished;
ed957684
JS
8053 }
8054 }
8055
8d63f375 8056 /* If the PCI channel is in offline state, do not post mbox. */
58da1ffb
JS
8057 if (unlikely(pci_channel_offline(phba->pcidev))) {
8058 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8059 goto out_not_finished;
8060 }
8d63f375 8061
a257bf90
JS
8062 /* If HBA has a deferred error attention, fail the iocb. */
8063 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
8064 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8065 goto out_not_finished;
8066 }
8067
dea3101e 8068 psli = &phba->sli;
92d7f7b0 8069
bf07bdea 8070 mbx = &pmbox->u.mb;
dea3101e 8071 status = MBX_SUCCESS;
8072
2e0fef85
JS
8073 if (phba->link_state == LPFC_HBA_ERROR) {
8074 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
41415862
JW
8075
8076 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8077 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8078 "(%d):0311 Mailbox command x%x cannot "
8079 "issue Data: x%x x%x\n",
8080 pmbox->vport ? pmbox->vport->vpi : 0,
8081 pmbox->u.mb.mbxCommand, psli->sli_flag, flag);
58da1ffb 8082 goto out_not_finished;
41415862
JW
8083 }
8084
bf07bdea 8085 if (mbx->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT) {
9940b97b
JS
8086 if (lpfc_readl(phba->HCregaddr, &hc_copy) ||
8087 !(hc_copy & HC_MBINT_ENA)) {
8088 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8089 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
3772a991
JS
8090 "(%d):2528 Mailbox command x%x cannot "
8091 "issue Data: x%x x%x\n",
8092 pmbox->vport ? pmbox->vport->vpi : 0,
8093 pmbox->u.mb.mbxCommand, psli->sli_flag, flag);
9940b97b
JS
8094 goto out_not_finished;
8095 }
9290831f
JS
8096 }
8097
dea3101e 8098 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
8099 /* Polling for a mbox command when another one is already active
8100 * is not allowed in SLI. Also, the driver must have established
8101 * SLI2 mode to queue and process multiple mbox commands.
8102 */
8103
8104 if (flag & MBX_POLL) {
2e0fef85 8105 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8106
8107 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8108 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8109 "(%d):2529 Mailbox command x%x "
8110 "cannot issue Data: x%x x%x\n",
8111 pmbox->vport ? pmbox->vport->vpi : 0,
8112 pmbox->u.mb.mbxCommand,
8113 psli->sli_flag, flag);
58da1ffb 8114 goto out_not_finished;
dea3101e 8115 }
8116
3772a991 8117 if (!(psli->sli_flag & LPFC_SLI_ACTIVE)) {
2e0fef85 8118 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8119 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8120 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8121 "(%d):2530 Mailbox command x%x "
8122 "cannot issue Data: x%x x%x\n",
8123 pmbox->vport ? pmbox->vport->vpi : 0,
8124 pmbox->u.mb.mbxCommand,
8125 psli->sli_flag, flag);
58da1ffb 8126 goto out_not_finished;
dea3101e 8127 }
8128
dea3101e 8129 /* Another mailbox command is still being processed, queue this
8130 * command to be processed later.
8131 */
8132 lpfc_mbox_put(phba, pmbox);
8133
8134 /* Mbox cmd issue - BUSY */
ed957684 8135 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 8136 "(%d):0308 Mbox cmd issue - BUSY Data: "
92d7f7b0 8137 "x%x x%x x%x x%x\n",
92d7f7b0 8138 pmbox->vport ? pmbox->vport->vpi : 0xffffff,
e92974f6
JS
8139 mbx->mbxCommand,
8140 phba->pport ? phba->pport->port_state : 0xff,
92d7f7b0 8141 psli->sli_flag, flag);
dea3101e 8142
8143 psli->slistat.mbox_busy++;
2e0fef85 8144 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8145
858c9f6c
JS
8146 if (pmbox->vport) {
8147 lpfc_debugfs_disc_trc(pmbox->vport,
8148 LPFC_DISC_TRC_MBOX_VPORT,
8149 "MBOX Bsy vport: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8150 (uint32_t)mbx->mbxCommand,
8151 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8152 }
8153 else {
8154 lpfc_debugfs_disc_trc(phba->pport,
8155 LPFC_DISC_TRC_MBOX,
8156 "MBOX Bsy: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8157 (uint32_t)mbx->mbxCommand,
8158 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8159 }
8160
2e0fef85 8161 return MBX_BUSY;
dea3101e 8162 }
8163
dea3101e 8164 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
8165
8166 /* If we are not polling, we MUST be in SLI2 mode */
8167 if (flag != MBX_POLL) {
3772a991 8168 if (!(psli->sli_flag & LPFC_SLI_ACTIVE) &&
bf07bdea 8169 (mbx->mbxCommand != MBX_KILL_BOARD)) {
dea3101e 8170 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 8171 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
dea3101e 8172 /* Mbox command <mbxCommand> cannot issue */
3772a991
JS
8173 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8174 "(%d):2531 Mailbox command x%x "
8175 "cannot issue Data: x%x x%x\n",
8176 pmbox->vport ? pmbox->vport->vpi : 0,
8177 pmbox->u.mb.mbxCommand,
8178 psli->sli_flag, flag);
58da1ffb 8179 goto out_not_finished;
dea3101e 8180 }
8181 /* timeout active mbox command */
256ec0d0
JS
8182 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, pmbox) *
8183 1000);
8184 mod_timer(&psli->mbox_tmo, jiffies + timeout);
dea3101e 8185 }
8186
8187 /* Mailbox cmd <cmd> issue */
ed957684 8188 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
e8b62011 8189 "(%d):0309 Mailbox cmd x%x issue Data: x%x x%x "
92d7f7b0 8190 "x%x\n",
e8b62011 8191 pmbox->vport ? pmbox->vport->vpi : 0,
e92974f6
JS
8192 mbx->mbxCommand,
8193 phba->pport ? phba->pport->port_state : 0xff,
92d7f7b0 8194 psli->sli_flag, flag);
dea3101e 8195
bf07bdea 8196 if (mbx->mbxCommand != MBX_HEARTBEAT) {
858c9f6c
JS
8197 if (pmbox->vport) {
8198 lpfc_debugfs_disc_trc(pmbox->vport,
8199 LPFC_DISC_TRC_MBOX_VPORT,
8200 "MBOX Send vport: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8201 (uint32_t)mbx->mbxCommand,
8202 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8203 }
8204 else {
8205 lpfc_debugfs_disc_trc(phba->pport,
8206 LPFC_DISC_TRC_MBOX,
8207 "MBOX Send: cmd:x%x mb:x%x x%x",
bf07bdea
RD
8208 (uint32_t)mbx->mbxCommand,
8209 mbx->un.varWords[0], mbx->un.varWords[1]);
858c9f6c
JS
8210 }
8211 }
8212
dea3101e 8213 psli->slistat.mbox_cmd++;
8214 evtctr = psli->slistat.mbox_event;
8215
8216 /* next set own bit for the adapter and copy over command word */
bf07bdea 8217 mbx->mbxOwner = OWN_CHIP;
dea3101e 8218
3772a991 8219 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
7a470277
JS
8220 /* Populate mbox extension offset word. */
8221 if (pmbox->in_ext_byte_len || pmbox->out_ext_byte_len) {
bf07bdea 8222 *(((uint32_t *)mbx) + pmbox->mbox_offset_word)
7a470277
JS
8223 = (uint8_t *)phba->mbox_ext
8224 - (uint8_t *)phba->mbox;
8225 }
8226
8227 /* Copy the mailbox extension data */
3e1f0718
JS
8228 if (pmbox->in_ext_byte_len && pmbox->ctx_buf) {
8229 lpfc_sli_pcimem_bcopy(pmbox->ctx_buf,
8230 (uint8_t *)phba->mbox_ext,
8231 pmbox->in_ext_byte_len);
7a470277
JS
8232 }
8233 /* Copy command data to host SLIM area */
bf07bdea 8234 lpfc_sli_pcimem_bcopy(mbx, phba->mbox, MAILBOX_CMD_SIZE);
dea3101e 8235 } else {
7a470277
JS
8236 /* Populate mbox extension offset word. */
8237 if (pmbox->in_ext_byte_len || pmbox->out_ext_byte_len)
bf07bdea 8238 *(((uint32_t *)mbx) + pmbox->mbox_offset_word)
7a470277
JS
8239 = MAILBOX_HBA_EXT_OFFSET;
8240
8241 /* Copy the mailbox extension data */
3e1f0718 8242 if (pmbox->in_ext_byte_len && pmbox->ctx_buf)
7a470277
JS
8243 lpfc_memcpy_to_slim(phba->MBslimaddr +
8244 MAILBOX_HBA_EXT_OFFSET,
3e1f0718 8245 pmbox->ctx_buf, pmbox->in_ext_byte_len);
7a470277 8246
895427bd 8247 if (mbx->mbxCommand == MBX_CONFIG_PORT)
dea3101e 8248 /* copy command data into host mbox for cmpl */
895427bd
JS
8249 lpfc_sli_pcimem_bcopy(mbx, phba->mbox,
8250 MAILBOX_CMD_SIZE);
dea3101e 8251
8252 /* First copy mbox command data to HBA SLIM, skip past first
8253 word */
8254 to_slim = phba->MBslimaddr + sizeof (uint32_t);
bf07bdea 8255 lpfc_memcpy_to_slim(to_slim, &mbx->un.varWords[0],
dea3101e 8256 MAILBOX_CMD_SIZE - sizeof (uint32_t));
8257
8258 /* Next copy over first word, with mbxOwner set */
bf07bdea 8259 ldata = *((uint32_t *)mbx);
dea3101e 8260 to_slim = phba->MBslimaddr;
8261 writel(ldata, to_slim);
8262 readl(to_slim); /* flush */
8263
895427bd 8264 if (mbx->mbxCommand == MBX_CONFIG_PORT)
dea3101e 8265 /* switch over to host mailbox */
3772a991 8266 psli->sli_flag |= LPFC_SLI_ACTIVE;
dea3101e 8267 }
8268
8269 wmb();
dea3101e 8270
8271 switch (flag) {
8272 case MBX_NOWAIT:
09372820 8273 /* Set up reference to mailbox command */
dea3101e 8274 psli->mbox_active = pmbox;
09372820
JS
8275 /* Interrupt board to do it */
8276 writel(CA_MBATT, phba->CAregaddr);
8277 readl(phba->CAregaddr); /* flush */
8278 /* Don't wait for it to finish, just return */
dea3101e 8279 break;
8280
8281 case MBX_POLL:
09372820 8282 /* Set up null reference to mailbox command */
dea3101e 8283 psli->mbox_active = NULL;
09372820
JS
8284 /* Interrupt board to do it */
8285 writel(CA_MBATT, phba->CAregaddr);
8286 readl(phba->CAregaddr); /* flush */
8287
3772a991 8288 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 8289 /* First read mbox status word */
34b02dcd 8290 word0 = *((uint32_t *)phba->mbox);
dea3101e 8291 word0 = le32_to_cpu(word0);
8292 } else {
8293 /* First read mbox status word */
9940b97b
JS
8294 if (lpfc_readl(phba->MBslimaddr, &word0)) {
8295 spin_unlock_irqrestore(&phba->hbalock,
8296 drvr_flag);
8297 goto out_not_finished;
8298 }
dea3101e 8299 }
8300
8301 /* Read the HBA Host Attention Register */
9940b97b
JS
8302 if (lpfc_readl(phba->HAregaddr, &ha_copy)) {
8303 spin_unlock_irqrestore(&phba->hbalock,
8304 drvr_flag);
8305 goto out_not_finished;
8306 }
a183a15f
JS
8307 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, pmbox) *
8308 1000) + jiffies;
09372820 8309 i = 0;
dea3101e 8310 /* Wait for command to complete */
41415862
JW
8311 while (((word0 & OWN_CHIP) == OWN_CHIP) ||
8312 (!(ha_copy & HA_MBATT) &&
2e0fef85 8313 (phba->link_state > LPFC_WARM_START))) {
09372820 8314 if (time_after(jiffies, timeout)) {
dea3101e 8315 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
2e0fef85 8316 spin_unlock_irqrestore(&phba->hbalock,
dea3101e 8317 drvr_flag);
58da1ffb 8318 goto out_not_finished;
dea3101e 8319 }
8320
8321 /* Check if we took a mbox interrupt while we were
8322 polling */
8323 if (((word0 & OWN_CHIP) != OWN_CHIP)
8324 && (evtctr != psli->slistat.mbox_event))
8325 break;
8326
09372820
JS
8327 if (i++ > 10) {
8328 spin_unlock_irqrestore(&phba->hbalock,
8329 drvr_flag);
8330 msleep(1);
8331 spin_lock_irqsave(&phba->hbalock, drvr_flag);
8332 }
dea3101e 8333
3772a991 8334 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 8335 /* First copy command data */
34b02dcd 8336 word0 = *((uint32_t *)phba->mbox);
dea3101e 8337 word0 = le32_to_cpu(word0);
bf07bdea 8338 if (mbx->mbxCommand == MBX_CONFIG_PORT) {
dea3101e 8339 MAILBOX_t *slimmb;
34b02dcd 8340 uint32_t slimword0;
dea3101e 8341 /* Check real SLIM for any errors */
8342 slimword0 = readl(phba->MBslimaddr);
8343 slimmb = (MAILBOX_t *) & slimword0;
8344 if (((slimword0 & OWN_CHIP) != OWN_CHIP)
8345 && slimmb->mbxStatus) {
8346 psli->sli_flag &=
3772a991 8347 ~LPFC_SLI_ACTIVE;
dea3101e 8348 word0 = slimword0;
8349 }
8350 }
8351 } else {
8352 /* First copy command data */
8353 word0 = readl(phba->MBslimaddr);
8354 }
8355 /* Read the HBA Host Attention Register */
9940b97b
JS
8356 if (lpfc_readl(phba->HAregaddr, &ha_copy)) {
8357 spin_unlock_irqrestore(&phba->hbalock,
8358 drvr_flag);
8359 goto out_not_finished;
8360 }
dea3101e 8361 }
8362
3772a991 8363 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
dea3101e 8364 /* copy results back to user */
2ea259ee
JS
8365 lpfc_sli_pcimem_bcopy(phba->mbox, mbx,
8366 MAILBOX_CMD_SIZE);
7a470277 8367 /* Copy the mailbox extension data */
3e1f0718 8368 if (pmbox->out_ext_byte_len && pmbox->ctx_buf) {
7a470277 8369 lpfc_sli_pcimem_bcopy(phba->mbox_ext,
3e1f0718 8370 pmbox->ctx_buf,
7a470277
JS
8371 pmbox->out_ext_byte_len);
8372 }
dea3101e 8373 } else {
8374 /* First copy command data */
bf07bdea 8375 lpfc_memcpy_from_slim(mbx, phba->MBslimaddr,
2ea259ee 8376 MAILBOX_CMD_SIZE);
7a470277 8377 /* Copy the mailbox extension data */
3e1f0718
JS
8378 if (pmbox->out_ext_byte_len && pmbox->ctx_buf) {
8379 lpfc_memcpy_from_slim(
8380 pmbox->ctx_buf,
7a470277
JS
8381 phba->MBslimaddr +
8382 MAILBOX_HBA_EXT_OFFSET,
8383 pmbox->out_ext_byte_len);
dea3101e 8384 }
8385 }
8386
8387 writel(HA_MBATT, phba->HAregaddr);
8388 readl(phba->HAregaddr); /* flush */
8389
8390 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
bf07bdea 8391 status = mbx->mbxStatus;
dea3101e 8392 }
8393
2e0fef85
JS
8394 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
8395 return status;
58da1ffb
JS
8396
8397out_not_finished:
8398 if (processing_queue) {
da0436e9 8399 pmbox->u.mb.mbxStatus = MBX_NOT_FINISHED;
58da1ffb
JS
8400 lpfc_mbox_cmpl_put(phba, pmbox);
8401 }
8402 return MBX_NOT_FINISHED;
dea3101e 8403}
8404
f1126688
JS
8405/**
8406 * lpfc_sli4_async_mbox_block - Block posting SLI4 asynchronous mailbox command
8407 * @phba: Pointer to HBA context object.
8408 *
8409 * The function blocks the posting of SLI4 asynchronous mailbox commands from
8410 * the driver internal pending mailbox queue. It will then try to wait out the
8411 * possible outstanding mailbox command before return.
8412 *
8413 * Returns:
8414 * 0 - the outstanding mailbox command completed; otherwise, the wait for
8415 * the outstanding mailbox command timed out.
8416 **/
8417static int
8418lpfc_sli4_async_mbox_block(struct lpfc_hba *phba)
8419{
8420 struct lpfc_sli *psli = &phba->sli;
f1126688 8421 int rc = 0;
a183a15f 8422 unsigned long timeout = 0;
f1126688
JS
8423
8424 /* Mark the asynchronous mailbox command posting as blocked */
8425 spin_lock_irq(&phba->hbalock);
8426 psli->sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
f1126688
JS
8427 /* Determine how long we might wait for the active mailbox
8428 * command to be gracefully completed by firmware.
8429 */
a183a15f
JS
8430 if (phba->sli.mbox_active)
8431 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
8432 phba->sli.mbox_active) *
8433 1000) + jiffies;
8434 spin_unlock_irq(&phba->hbalock);
8435
e8d3c3b1
JS
8436 /* Make sure the mailbox is really active */
8437 if (timeout)
8438 lpfc_sli4_process_missed_mbox_completions(phba);
8439
f1126688
JS
8440 /* Wait for the outstnading mailbox command to complete */
8441 while (phba->sli.mbox_active) {
8442 /* Check active mailbox complete status every 2ms */
8443 msleep(2);
8444 if (time_after(jiffies, timeout)) {
8445 /* Timeout, marked the outstanding cmd not complete */
8446 rc = 1;
8447 break;
8448 }
8449 }
8450
8451 /* Can not cleanly block async mailbox command, fails it */
8452 if (rc) {
8453 spin_lock_irq(&phba->hbalock);
8454 psli->sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
8455 spin_unlock_irq(&phba->hbalock);
8456 }
8457 return rc;
8458}
8459
8460/**
8461 * lpfc_sli4_async_mbox_unblock - Block posting SLI4 async mailbox command
8462 * @phba: Pointer to HBA context object.
8463 *
8464 * The function unblocks and resume posting of SLI4 asynchronous mailbox
8465 * commands from the driver internal pending mailbox queue. It makes sure
8466 * that there is no outstanding mailbox command before resuming posting
8467 * asynchronous mailbox commands. If, for any reason, there is outstanding
8468 * mailbox command, it will try to wait it out before resuming asynchronous
8469 * mailbox command posting.
8470 **/
8471static void
8472lpfc_sli4_async_mbox_unblock(struct lpfc_hba *phba)
8473{
8474 struct lpfc_sli *psli = &phba->sli;
8475
8476 spin_lock_irq(&phba->hbalock);
8477 if (!(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
8478 /* Asynchronous mailbox posting is not blocked, do nothing */
8479 spin_unlock_irq(&phba->hbalock);
8480 return;
8481 }
8482
8483 /* Outstanding synchronous mailbox command is guaranteed to be done,
8484 * successful or timeout, after timing-out the outstanding mailbox
8485 * command shall always be removed, so just unblock posting async
8486 * mailbox command and resume
8487 */
8488 psli->sli_flag &= ~LPFC_SLI_ASYNC_MBX_BLK;
8489 spin_unlock_irq(&phba->hbalock);
8490
8491 /* wake up worker thread to post asynchronlous mailbox command */
8492 lpfc_worker_wake_up(phba);
8493}
8494
2d843edc
JS
8495/**
8496 * lpfc_sli4_wait_bmbx_ready - Wait for bootstrap mailbox register ready
8497 * @phba: Pointer to HBA context object.
8498 * @mboxq: Pointer to mailbox object.
8499 *
8500 * The function waits for the bootstrap mailbox register ready bit from
8501 * port for twice the regular mailbox command timeout value.
8502 *
8503 * 0 - no timeout on waiting for bootstrap mailbox register ready.
8504 * MBXERR_ERROR - wait for bootstrap mailbox register timed out.
8505 **/
8506static int
8507lpfc_sli4_wait_bmbx_ready(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
8508{
8509 uint32_t db_ready;
8510 unsigned long timeout;
8511 struct lpfc_register bmbx_reg;
8512
8513 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, mboxq)
8514 * 1000) + jiffies;
8515
8516 do {
8517 bmbx_reg.word0 = readl(phba->sli4_hba.BMBXregaddr);
8518 db_ready = bf_get(lpfc_bmbx_rdy, &bmbx_reg);
8519 if (!db_ready)
8520 msleep(2);
8521
8522 if (time_after(jiffies, timeout))
8523 return MBXERR_ERROR;
8524 } while (!db_ready);
8525
8526 return 0;
8527}
8528
da0436e9
JS
8529/**
8530 * lpfc_sli4_post_sync_mbox - Post an SLI4 mailbox to the bootstrap mailbox
8531 * @phba: Pointer to HBA context object.
8532 * @mboxq: Pointer to mailbox object.
8533 *
8534 * The function posts a mailbox to the port. The mailbox is expected
8535 * to be comletely filled in and ready for the port to operate on it.
8536 * This routine executes a synchronous completion operation on the
8537 * mailbox by polling for its completion.
8538 *
8539 * The caller must not be holding any locks when calling this routine.
8540 *
8541 * Returns:
8542 * MBX_SUCCESS - mailbox posted successfully
8543 * Any of the MBX error values.
8544 **/
8545static int
8546lpfc_sli4_post_sync_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
8547{
8548 int rc = MBX_SUCCESS;
8549 unsigned long iflag;
da0436e9
JS
8550 uint32_t mcqe_status;
8551 uint32_t mbx_cmnd;
da0436e9
JS
8552 struct lpfc_sli *psli = &phba->sli;
8553 struct lpfc_mqe *mb = &mboxq->u.mqe;
8554 struct lpfc_bmbx_create *mbox_rgn;
8555 struct dma_address *dma_address;
da0436e9
JS
8556
8557 /*
8558 * Only one mailbox can be active to the bootstrap mailbox region
8559 * at a time and there is no queueing provided.
8560 */
8561 spin_lock_irqsave(&phba->hbalock, iflag);
8562 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
8563 spin_unlock_irqrestore(&phba->hbalock, iflag);
8564 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8565 "(%d):2532 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8566 "cannot issue Data: x%x x%x\n",
8567 mboxq->vport ? mboxq->vport->vpi : 0,
8568 mboxq->u.mb.mbxCommand,
a183a15f
JS
8569 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8570 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8571 psli->sli_flag, MBX_POLL);
8572 return MBXERR_ERROR;
8573 }
8574 /* The server grabs the token and owns it until release */
8575 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
8576 phba->sli.mbox_active = mboxq;
8577 spin_unlock_irqrestore(&phba->hbalock, iflag);
8578
2d843edc
JS
8579 /* wait for bootstrap mbox register for readyness */
8580 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8581 if (rc)
8582 goto exit;
da0436e9
JS
8583 /*
8584 * Initialize the bootstrap memory region to avoid stale data areas
8585 * in the mailbox post. Then copy the caller's mailbox contents to
8586 * the bmbx mailbox region.
8587 */
8588 mbx_cmnd = bf_get(lpfc_mqe_command, mb);
8589 memset(phba->sli4_hba.bmbx.avirt, 0, sizeof(struct lpfc_bmbx_create));
48f8fdb4
JS
8590 lpfc_sli4_pcimem_bcopy(mb, phba->sli4_hba.bmbx.avirt,
8591 sizeof(struct lpfc_mqe));
da0436e9
JS
8592
8593 /* Post the high mailbox dma address to the port and wait for ready. */
8594 dma_address = &phba->sli4_hba.bmbx.dma_address;
8595 writel(dma_address->addr_hi, phba->sli4_hba.BMBXregaddr);
8596
2d843edc
JS
8597 /* wait for bootstrap mbox register for hi-address write done */
8598 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8599 if (rc)
8600 goto exit;
da0436e9
JS
8601
8602 /* Post the low mailbox dma address to the port. */
8603 writel(dma_address->addr_lo, phba->sli4_hba.BMBXregaddr);
da0436e9 8604
2d843edc
JS
8605 /* wait for bootstrap mbox register for low address write done */
8606 rc = lpfc_sli4_wait_bmbx_ready(phba, mboxq);
8607 if (rc)
8608 goto exit;
da0436e9
JS
8609
8610 /*
8611 * Read the CQ to ensure the mailbox has completed.
8612 * If so, update the mailbox status so that the upper layers
8613 * can complete the request normally.
8614 */
48f8fdb4
JS
8615 lpfc_sli4_pcimem_bcopy(phba->sli4_hba.bmbx.avirt, mb,
8616 sizeof(struct lpfc_mqe));
da0436e9 8617 mbox_rgn = (struct lpfc_bmbx_create *) phba->sli4_hba.bmbx.avirt;
48f8fdb4
JS
8618 lpfc_sli4_pcimem_bcopy(&mbox_rgn->mcqe, &mboxq->mcqe,
8619 sizeof(struct lpfc_mcqe));
da0436e9 8620 mcqe_status = bf_get(lpfc_mcqe_status, &mbox_rgn->mcqe);
0558056c
JS
8621 /*
8622 * When the CQE status indicates a failure and the mailbox status
8623 * indicates success then copy the CQE status into the mailbox status
8624 * (and prefix it with x4000).
8625 */
da0436e9 8626 if (mcqe_status != MB_CQE_STATUS_SUCCESS) {
0558056c
JS
8627 if (bf_get(lpfc_mqe_status, mb) == MBX_SUCCESS)
8628 bf_set(lpfc_mqe_status, mb,
8629 (LPFC_MBX_ERROR_RANGE | mcqe_status));
da0436e9 8630 rc = MBXERR_ERROR;
d7c47992
JS
8631 } else
8632 lpfc_sli4_swap_str(phba, mboxq);
da0436e9
JS
8633
8634 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
a183a15f 8635 "(%d):0356 Mailbox cmd x%x (x%x/x%x) Status x%x "
da0436e9
JS
8636 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x x%x x%x"
8637 " x%x x%x CQ: x%x x%x x%x x%x\n",
a183a15f
JS
8638 mboxq->vport ? mboxq->vport->vpi : 0, mbx_cmnd,
8639 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8640 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8641 bf_get(lpfc_mqe_status, mb),
8642 mb->un.mb_words[0], mb->un.mb_words[1],
8643 mb->un.mb_words[2], mb->un.mb_words[3],
8644 mb->un.mb_words[4], mb->un.mb_words[5],
8645 mb->un.mb_words[6], mb->un.mb_words[7],
8646 mb->un.mb_words[8], mb->un.mb_words[9],
8647 mb->un.mb_words[10], mb->un.mb_words[11],
8648 mb->un.mb_words[12], mboxq->mcqe.word0,
8649 mboxq->mcqe.mcqe_tag0, mboxq->mcqe.mcqe_tag1,
8650 mboxq->mcqe.trailer);
8651exit:
8652 /* We are holding the token, no needed for lock when release */
8653 spin_lock_irqsave(&phba->hbalock, iflag);
8654 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
8655 phba->sli.mbox_active = NULL;
8656 spin_unlock_irqrestore(&phba->hbalock, iflag);
8657 return rc;
8658}
8659
8660/**
8661 * lpfc_sli_issue_mbox_s4 - Issue an SLI4 mailbox command to firmware
8662 * @phba: Pointer to HBA context object.
8663 * @pmbox: Pointer to mailbox object.
8664 * @flag: Flag indicating how the mailbox need to be processed.
8665 *
8666 * This function is called by discovery code and HBA management code to submit
8667 * a mailbox command to firmware with SLI-4 interface spec.
8668 *
8669 * Return codes the caller owns the mailbox command after the return of the
8670 * function.
8671 **/
8672static int
8673lpfc_sli_issue_mbox_s4(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq,
8674 uint32_t flag)
8675{
8676 struct lpfc_sli *psli = &phba->sli;
8677 unsigned long iflags;
8678 int rc;
8679
b76f2dc9
JS
8680 /* dump from issue mailbox command if setup */
8681 lpfc_idiag_mbxacc_dump_issue_mbox(phba, &mboxq->u.mb);
8682
8fa38513
JS
8683 rc = lpfc_mbox_dev_check(phba);
8684 if (unlikely(rc)) {
8685 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8686 "(%d):2544 Mailbox command x%x (x%x/x%x) "
8fa38513
JS
8687 "cannot issue Data: x%x x%x\n",
8688 mboxq->vport ? mboxq->vport->vpi : 0,
8689 mboxq->u.mb.mbxCommand,
a183a15f
JS
8690 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8691 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
8fa38513
JS
8692 psli->sli_flag, flag);
8693 goto out_not_finished;
8694 }
8695
da0436e9
JS
8696 /* Detect polling mode and jump to a handler */
8697 if (!phba->sli4_hba.intr_enable) {
8698 if (flag == MBX_POLL)
8699 rc = lpfc_sli4_post_sync_mbox(phba, mboxq);
8700 else
8701 rc = -EIO;
8702 if (rc != MBX_SUCCESS)
0558056c 8703 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
da0436e9 8704 "(%d):2541 Mailbox command x%x "
cc459f19
JS
8705 "(x%x/x%x) failure: "
8706 "mqe_sta: x%x mcqe_sta: x%x/x%x "
8707 "Data: x%x x%x\n,",
da0436e9
JS
8708 mboxq->vport ? mboxq->vport->vpi : 0,
8709 mboxq->u.mb.mbxCommand,
a183a15f
JS
8710 lpfc_sli_config_mbox_subsys_get(phba,
8711 mboxq),
8712 lpfc_sli_config_mbox_opcode_get(phba,
8713 mboxq),
cc459f19
JS
8714 bf_get(lpfc_mqe_status, &mboxq->u.mqe),
8715 bf_get(lpfc_mcqe_status, &mboxq->mcqe),
8716 bf_get(lpfc_mcqe_ext_status,
8717 &mboxq->mcqe),
da0436e9
JS
8718 psli->sli_flag, flag);
8719 return rc;
8720 } else if (flag == MBX_POLL) {
f1126688
JS
8721 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
8722 "(%d):2542 Try to issue mailbox command "
7365f6fd 8723 "x%x (x%x/x%x) synchronously ahead of async "
f1126688 8724 "mailbox command queue: x%x x%x\n",
da0436e9
JS
8725 mboxq->vport ? mboxq->vport->vpi : 0,
8726 mboxq->u.mb.mbxCommand,
a183a15f
JS
8727 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8728 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9 8729 psli->sli_flag, flag);
f1126688
JS
8730 /* Try to block the asynchronous mailbox posting */
8731 rc = lpfc_sli4_async_mbox_block(phba);
8732 if (!rc) {
8733 /* Successfully blocked, now issue sync mbox cmd */
8734 rc = lpfc_sli4_post_sync_mbox(phba, mboxq);
8735 if (rc != MBX_SUCCESS)
cc459f19 8736 lpfc_printf_log(phba, KERN_WARNING,
a183a15f 8737 LOG_MBOX | LOG_SLI,
cc459f19
JS
8738 "(%d):2597 Sync Mailbox command "
8739 "x%x (x%x/x%x) failure: "
8740 "mqe_sta: x%x mcqe_sta: x%x/x%x "
8741 "Data: x%x x%x\n,",
8742 mboxq->vport ? mboxq->vport->vpi : 0,
a183a15f
JS
8743 mboxq->u.mb.mbxCommand,
8744 lpfc_sli_config_mbox_subsys_get(phba,
8745 mboxq),
8746 lpfc_sli_config_mbox_opcode_get(phba,
8747 mboxq),
cc459f19
JS
8748 bf_get(lpfc_mqe_status, &mboxq->u.mqe),
8749 bf_get(lpfc_mcqe_status, &mboxq->mcqe),
8750 bf_get(lpfc_mcqe_ext_status,
8751 &mboxq->mcqe),
a183a15f 8752 psli->sli_flag, flag);
f1126688
JS
8753 /* Unblock the async mailbox posting afterward */
8754 lpfc_sli4_async_mbox_unblock(phba);
8755 }
8756 return rc;
da0436e9
JS
8757 }
8758
8759 /* Now, interrupt mode asynchrous mailbox command */
8760 rc = lpfc_mbox_cmd_check(phba, mboxq);
8761 if (rc) {
8762 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8763 "(%d):2543 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8764 "cannot issue Data: x%x x%x\n",
8765 mboxq->vport ? mboxq->vport->vpi : 0,
8766 mboxq->u.mb.mbxCommand,
a183a15f
JS
8767 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8768 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8769 psli->sli_flag, flag);
8770 goto out_not_finished;
8771 }
da0436e9
JS
8772
8773 /* Put the mailbox command to the driver internal FIFO */
8774 psli->slistat.mbox_busy++;
8775 spin_lock_irqsave(&phba->hbalock, iflags);
8776 lpfc_mbox_put(phba, mboxq);
8777 spin_unlock_irqrestore(&phba->hbalock, iflags);
8778 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
8779 "(%d):0354 Mbox cmd issue - Enqueue Data: "
a183a15f 8780 "x%x (x%x/x%x) x%x x%x x%x\n",
da0436e9
JS
8781 mboxq->vport ? mboxq->vport->vpi : 0xffffff,
8782 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
a183a15f
JS
8783 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8784 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8785 phba->pport->port_state,
8786 psli->sli_flag, MBX_NOWAIT);
8787 /* Wake up worker thread to transport mailbox command from head */
8788 lpfc_worker_wake_up(phba);
8789
8790 return MBX_BUSY;
8791
8792out_not_finished:
8793 return MBX_NOT_FINISHED;
8794}
8795
8796/**
8797 * lpfc_sli4_post_async_mbox - Post an SLI4 mailbox command to device
8798 * @phba: Pointer to HBA context object.
8799 *
8800 * This function is called by worker thread to send a mailbox command to
8801 * SLI4 HBA firmware.
8802 *
8803 **/
8804int
8805lpfc_sli4_post_async_mbox(struct lpfc_hba *phba)
8806{
8807 struct lpfc_sli *psli = &phba->sli;
8808 LPFC_MBOXQ_t *mboxq;
8809 int rc = MBX_SUCCESS;
8810 unsigned long iflags;
8811 struct lpfc_mqe *mqe;
8812 uint32_t mbx_cmnd;
8813
8814 /* Check interrupt mode before post async mailbox command */
8815 if (unlikely(!phba->sli4_hba.intr_enable))
8816 return MBX_NOT_FINISHED;
8817
8818 /* Check for mailbox command service token */
8819 spin_lock_irqsave(&phba->hbalock, iflags);
8820 if (unlikely(psli->sli_flag & LPFC_SLI_ASYNC_MBX_BLK)) {
8821 spin_unlock_irqrestore(&phba->hbalock, iflags);
8822 return MBX_NOT_FINISHED;
8823 }
8824 if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
8825 spin_unlock_irqrestore(&phba->hbalock, iflags);
8826 return MBX_NOT_FINISHED;
8827 }
8828 if (unlikely(phba->sli.mbox_active)) {
8829 spin_unlock_irqrestore(&phba->hbalock, iflags);
8830 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
8831 "0384 There is pending active mailbox cmd\n");
8832 return MBX_NOT_FINISHED;
8833 }
8834 /* Take the mailbox command service token */
8835 psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
8836
8837 /* Get the next mailbox command from head of queue */
8838 mboxq = lpfc_mbox_get(phba);
8839
8840 /* If no more mailbox command waiting for post, we're done */
8841 if (!mboxq) {
8842 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
8843 spin_unlock_irqrestore(&phba->hbalock, iflags);
8844 return MBX_SUCCESS;
8845 }
8846 phba->sli.mbox_active = mboxq;
8847 spin_unlock_irqrestore(&phba->hbalock, iflags);
8848
8849 /* Check device readiness for posting mailbox command */
8850 rc = lpfc_mbox_dev_check(phba);
8851 if (unlikely(rc))
8852 /* Driver clean routine will clean up pending mailbox */
8853 goto out_not_finished;
8854
8855 /* Prepare the mbox command to be posted */
8856 mqe = &mboxq->u.mqe;
8857 mbx_cmnd = bf_get(lpfc_mqe_command, mqe);
8858
8859 /* Start timer for the mbox_tmo and log some mailbox post messages */
8860 mod_timer(&psli->mbox_tmo, (jiffies +
256ec0d0 8861 msecs_to_jiffies(1000 * lpfc_mbox_tmo_val(phba, mboxq))));
da0436e9
JS
8862
8863 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
a183a15f 8864 "(%d):0355 Mailbox cmd x%x (x%x/x%x) issue Data: "
da0436e9
JS
8865 "x%x x%x\n",
8866 mboxq->vport ? mboxq->vport->vpi : 0, mbx_cmnd,
a183a15f
JS
8867 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8868 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8869 phba->pport->port_state, psli->sli_flag);
8870
8871 if (mbx_cmnd != MBX_HEARTBEAT) {
8872 if (mboxq->vport) {
8873 lpfc_debugfs_disc_trc(mboxq->vport,
8874 LPFC_DISC_TRC_MBOX_VPORT,
8875 "MBOX Send vport: cmd:x%x mb:x%x x%x",
8876 mbx_cmnd, mqe->un.mb_words[0],
8877 mqe->un.mb_words[1]);
8878 } else {
8879 lpfc_debugfs_disc_trc(phba->pport,
8880 LPFC_DISC_TRC_MBOX,
8881 "MBOX Send: cmd:x%x mb:x%x x%x",
8882 mbx_cmnd, mqe->un.mb_words[0],
8883 mqe->un.mb_words[1]);
8884 }
8885 }
8886 psli->slistat.mbox_cmd++;
8887
8888 /* Post the mailbox command to the port */
8889 rc = lpfc_sli4_mq_put(phba->sli4_hba.mbx_wq, mqe);
8890 if (rc != MBX_SUCCESS) {
8891 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
a183a15f 8892 "(%d):2533 Mailbox command x%x (x%x/x%x) "
da0436e9
JS
8893 "cannot issue Data: x%x x%x\n",
8894 mboxq->vport ? mboxq->vport->vpi : 0,
8895 mboxq->u.mb.mbxCommand,
a183a15f
JS
8896 lpfc_sli_config_mbox_subsys_get(phba, mboxq),
8897 lpfc_sli_config_mbox_opcode_get(phba, mboxq),
da0436e9
JS
8898 psli->sli_flag, MBX_NOWAIT);
8899 goto out_not_finished;
8900 }
8901
8902 return rc;
8903
8904out_not_finished:
8905 spin_lock_irqsave(&phba->hbalock, iflags);
d7069f09
JS
8906 if (phba->sli.mbox_active) {
8907 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
8908 __lpfc_mbox_cmpl_put(phba, mboxq);
8909 /* Release the token */
8910 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
8911 phba->sli.mbox_active = NULL;
8912 }
da0436e9
JS
8913 spin_unlock_irqrestore(&phba->hbalock, iflags);
8914
8915 return MBX_NOT_FINISHED;
8916}
8917
8918/**
8919 * lpfc_sli_issue_mbox - Wrapper func for issuing mailbox command
8920 * @phba: Pointer to HBA context object.
8921 * @pmbox: Pointer to mailbox object.
8922 * @flag: Flag indicating how the mailbox need to be processed.
8923 *
8924 * This routine wraps the actual SLI3 or SLI4 mailbox issuing routine from
8925 * the API jump table function pointer from the lpfc_hba struct.
8926 *
8927 * Return codes the caller owns the mailbox command after the return of the
8928 * function.
8929 **/
8930int
8931lpfc_sli_issue_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox, uint32_t flag)
8932{
8933 return phba->lpfc_sli_issue_mbox(phba, pmbox, flag);
8934}
8935
8936/**
25985edc 8937 * lpfc_mbox_api_table_setup - Set up mbox api function jump table
da0436e9
JS
8938 * @phba: The hba struct for which this call is being executed.
8939 * @dev_grp: The HBA PCI-Device group number.
8940 *
8941 * This routine sets up the mbox interface API function jump table in @phba
8942 * struct.
8943 * Returns: 0 - success, -ENODEV - failure.
8944 **/
8945int
8946lpfc_mbox_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
8947{
8948
8949 switch (dev_grp) {
8950 case LPFC_PCI_DEV_LP:
8951 phba->lpfc_sli_issue_mbox = lpfc_sli_issue_mbox_s3;
8952 phba->lpfc_sli_handle_slow_ring_event =
8953 lpfc_sli_handle_slow_ring_event_s3;
8954 phba->lpfc_sli_hbq_to_firmware = lpfc_sli_hbq_to_firmware_s3;
8955 phba->lpfc_sli_brdrestart = lpfc_sli_brdrestart_s3;
8956 phba->lpfc_sli_brdready = lpfc_sli_brdready_s3;
8957 break;
8958 case LPFC_PCI_DEV_OC:
8959 phba->lpfc_sli_issue_mbox = lpfc_sli_issue_mbox_s4;
8960 phba->lpfc_sli_handle_slow_ring_event =
8961 lpfc_sli_handle_slow_ring_event_s4;
8962 phba->lpfc_sli_hbq_to_firmware = lpfc_sli_hbq_to_firmware_s4;
8963 phba->lpfc_sli_brdrestart = lpfc_sli_brdrestart_s4;
8964 phba->lpfc_sli_brdready = lpfc_sli_brdready_s4;
8965 break;
8966 default:
8967 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8968 "1420 Invalid HBA PCI-device group: 0x%x\n",
8969 dev_grp);
8970 return -ENODEV;
8971 break;
8972 }
8973 return 0;
8974}
8975
e59058c4 8976/**
3621a710 8977 * __lpfc_sli_ringtx_put - Add an iocb to the txq
e59058c4
JS
8978 * @phba: Pointer to HBA context object.
8979 * @pring: Pointer to driver SLI ring object.
8980 * @piocb: Pointer to address of newly added command iocb.
8981 *
8982 * This function is called with hbalock held to add a command
8983 * iocb to the txq when SLI layer cannot submit the command iocb
8984 * to the ring.
8985 **/
2a9bf3d0 8986void
92d7f7b0 8987__lpfc_sli_ringtx_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 8988 struct lpfc_iocbq *piocb)
dea3101e 8989{
1c2ba475 8990 lockdep_assert_held(&phba->hbalock);
dea3101e 8991 /* Insert the caller's iocb in the txq tail for later processing. */
8992 list_add_tail(&piocb->list, &pring->txq);
dea3101e 8993}
8994
e59058c4 8995/**
3621a710 8996 * lpfc_sli_next_iocb - Get the next iocb in the txq
e59058c4
JS
8997 * @phba: Pointer to HBA context object.
8998 * @pring: Pointer to driver SLI ring object.
8999 * @piocb: Pointer to address of newly added command iocb.
9000 *
9001 * This function is called with hbalock held before a new
9002 * iocb is submitted to the firmware. This function checks
9003 * txq to flush the iocbs in txq to Firmware before
9004 * submitting new iocbs to the Firmware.
9005 * If there are iocbs in the txq which need to be submitted
9006 * to firmware, lpfc_sli_next_iocb returns the first element
9007 * of the txq after dequeuing it from txq.
9008 * If there is no iocb in the txq then the function will return
9009 * *piocb and *piocb is set to NULL. Caller needs to check
9010 * *piocb to find if there are more commands in the txq.
9011 **/
dea3101e 9012static struct lpfc_iocbq *
9013lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 9014 struct lpfc_iocbq **piocb)
dea3101e 9015{
9016 struct lpfc_iocbq * nextiocb;
9017
1c2ba475
JT
9018 lockdep_assert_held(&phba->hbalock);
9019
dea3101e 9020 nextiocb = lpfc_sli_ringtx_get(phba, pring);
9021 if (!nextiocb) {
9022 nextiocb = *piocb;
9023 *piocb = NULL;
9024 }
9025
9026 return nextiocb;
9027}
9028
e59058c4 9029/**
3772a991 9030 * __lpfc_sli_issue_iocb_s3 - SLI3 device lockless ver of lpfc_sli_issue_iocb
e59058c4 9031 * @phba: Pointer to HBA context object.
3772a991 9032 * @ring_number: SLI ring number to issue iocb on.
e59058c4
JS
9033 * @piocb: Pointer to command iocb.
9034 * @flag: Flag indicating if this command can be put into txq.
9035 *
3772a991
JS
9036 * __lpfc_sli_issue_iocb_s3 is used by other functions in the driver to issue
9037 * an iocb command to an HBA with SLI-3 interface spec. If the PCI slot is
9038 * recovering from error state, if HBA is resetting or if LPFC_STOP_IOCB_EVENT
9039 * flag is turned on, the function returns IOCB_ERROR. When the link is down,
9040 * this function allows only iocbs for posting buffers. This function finds
9041 * next available slot in the command ring and posts the command to the
9042 * available slot and writes the port attention register to request HBA start
9043 * processing new iocb. If there is no slot available in the ring and
9044 * flag & SLI_IOCB_RET_IOCB is set, the new iocb is added to the txq, otherwise
9045 * the function returns IOCB_BUSY.
e59058c4 9046 *
3772a991
JS
9047 * This function is called with hbalock held. The function will return success
9048 * after it successfully submit the iocb to firmware or after adding to the
9049 * txq.
e59058c4 9050 **/
98c9ea5c 9051static int
3772a991 9052__lpfc_sli_issue_iocb_s3(struct lpfc_hba *phba, uint32_t ring_number,
dea3101e 9053 struct lpfc_iocbq *piocb, uint32_t flag)
9054{
9055 struct lpfc_iocbq *nextiocb;
9056 IOCB_t *iocb;
895427bd 9057 struct lpfc_sli_ring *pring = &phba->sli.sli3_ring[ring_number];
dea3101e 9058
1c2ba475
JT
9059 lockdep_assert_held(&phba->hbalock);
9060
92d7f7b0
JS
9061 if (piocb->iocb_cmpl && (!piocb->vport) &&
9062 (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
9063 (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
9064 lpfc_printf_log(phba, KERN_ERR,
9065 LOG_SLI | LOG_VPORT,
e8b62011 9066 "1807 IOCB x%x failed. No vport\n",
92d7f7b0
JS
9067 piocb->iocb.ulpCommand);
9068 dump_stack();
9069 return IOCB_ERROR;
9070 }
9071
9072
8d63f375
LV
9073 /* If the PCI channel is in offline state, do not post iocbs. */
9074 if (unlikely(pci_channel_offline(phba->pcidev)))
9075 return IOCB_ERROR;
9076
a257bf90
JS
9077 /* If HBA has a deferred error attention, fail the iocb. */
9078 if (unlikely(phba->hba_flag & DEFER_ERATT))
9079 return IOCB_ERROR;
9080
dea3101e 9081 /*
9082 * We should never get an IOCB if we are in a < LINK_DOWN state
9083 */
2e0fef85 9084 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
dea3101e 9085 return IOCB_ERROR;
9086
9087 /*
9088 * Check to see if we are blocking IOCB processing because of a
0b727fea 9089 * outstanding event.
dea3101e 9090 */
0b727fea 9091 if (unlikely(pring->flag & LPFC_STOP_IOCB_EVENT))
dea3101e 9092 goto iocb_busy;
9093
2e0fef85 9094 if (unlikely(phba->link_state == LPFC_LINK_DOWN)) {
dea3101e 9095 /*
2680eeaa 9096 * Only CREATE_XRI, CLOSE_XRI, and QUE_RING_BUF
dea3101e 9097 * can be issued if the link is not up.
9098 */
9099 switch (piocb->iocb.ulpCommand) {
84774a4d
JS
9100 case CMD_GEN_REQUEST64_CR:
9101 case CMD_GEN_REQUEST64_CX:
9102 if (!(phba->sli.sli_flag & LPFC_MENLO_MAINT) ||
9103 (piocb->iocb.un.genreq64.w5.hcsw.Rctl !=
6a9c52cf 9104 FC_RCTL_DD_UNSOL_CMD) ||
84774a4d
JS
9105 (piocb->iocb.un.genreq64.w5.hcsw.Type !=
9106 MENLO_TRANSPORT_TYPE))
9107
9108 goto iocb_busy;
9109 break;
dea3101e 9110 case CMD_QUE_RING_BUF_CN:
9111 case CMD_QUE_RING_BUF64_CN:
dea3101e 9112 /*
9113 * For IOCBs, like QUE_RING_BUF, that have no rsp ring
9114 * completion, iocb_cmpl MUST be 0.
9115 */
9116 if (piocb->iocb_cmpl)
9117 piocb->iocb_cmpl = NULL;
9118 /*FALLTHROUGH*/
9119 case CMD_CREATE_XRI_CR:
2680eeaa
JS
9120 case CMD_CLOSE_XRI_CN:
9121 case CMD_CLOSE_XRI_CX:
dea3101e 9122 break;
9123 default:
9124 goto iocb_busy;
9125 }
9126
9127 /*
9128 * For FCP commands, we must be in a state where we can process link
9129 * attention events.
9130 */
895427bd 9131 } else if (unlikely(pring->ringno == LPFC_FCP_RING &&
92d7f7b0 9132 !(phba->sli.sli_flag & LPFC_PROCESS_LA))) {
dea3101e 9133 goto iocb_busy;
92d7f7b0 9134 }
dea3101e 9135
dea3101e 9136 while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
9137 (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
9138 lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
9139
9140 if (iocb)
9141 lpfc_sli_update_ring(phba, pring);
9142 else
9143 lpfc_sli_update_full_ring(phba, pring);
9144
9145 if (!piocb)
9146 return IOCB_SUCCESS;
9147
9148 goto out_busy;
9149
9150 iocb_busy:
9151 pring->stats.iocb_cmd_delay++;
9152
9153 out_busy:
9154
9155 if (!(flag & SLI_IOCB_RET_IOCB)) {
92d7f7b0 9156 __lpfc_sli_ringtx_put(phba, pring, piocb);
dea3101e 9157 return IOCB_SUCCESS;
9158 }
9159
9160 return IOCB_BUSY;
9161}
9162
3772a991 9163/**
4f774513
JS
9164 * lpfc_sli4_bpl2sgl - Convert the bpl/bde to a sgl.
9165 * @phba: Pointer to HBA context object.
9166 * @piocb: Pointer to command iocb.
9167 * @sglq: Pointer to the scatter gather queue object.
9168 *
9169 * This routine converts the bpl or bde that is in the IOCB
9170 * to a sgl list for the sli4 hardware. The physical address
9171 * of the bpl/bde is converted back to a virtual address.
9172 * If the IOCB contains a BPL then the list of BDE's is
9173 * converted to sli4_sge's. If the IOCB contains a single
9174 * BDE then it is converted to a single sli_sge.
9175 * The IOCB is still in cpu endianess so the contents of
9176 * the bpl can be used without byte swapping.
9177 *
9178 * Returns valid XRI = Success, NO_XRI = Failure.
9179**/
9180static uint16_t
9181lpfc_sli4_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq,
9182 struct lpfc_sglq *sglq)
3772a991 9183{
4f774513
JS
9184 uint16_t xritag = NO_XRI;
9185 struct ulp_bde64 *bpl = NULL;
9186 struct ulp_bde64 bde;
9187 struct sli4_sge *sgl = NULL;
1b51197d 9188 struct lpfc_dmabuf *dmabuf;
4f774513
JS
9189 IOCB_t *icmd;
9190 int numBdes = 0;
9191 int i = 0;
63e801ce
JS
9192 uint32_t offset = 0; /* accumulated offset in the sg request list */
9193 int inbound = 0; /* number of sg reply entries inbound from firmware */
3772a991 9194
4f774513
JS
9195 if (!piocbq || !sglq)
9196 return xritag;
9197
9198 sgl = (struct sli4_sge *)sglq->sgl;
9199 icmd = &piocbq->iocb;
6b5151fd
JS
9200 if (icmd->ulpCommand == CMD_XMIT_BLS_RSP64_CX)
9201 return sglq->sli4_xritag;
4f774513
JS
9202 if (icmd->un.genreq64.bdl.bdeFlags == BUFF_TYPE_BLP_64) {
9203 numBdes = icmd->un.genreq64.bdl.bdeSize /
9204 sizeof(struct ulp_bde64);
9205 /* The addrHigh and addrLow fields within the IOCB
9206 * have not been byteswapped yet so there is no
9207 * need to swap them back.
9208 */
1b51197d
JS
9209 if (piocbq->context3)
9210 dmabuf = (struct lpfc_dmabuf *)piocbq->context3;
9211 else
9212 return xritag;
4f774513 9213
1b51197d 9214 bpl = (struct ulp_bde64 *)dmabuf->virt;
4f774513
JS
9215 if (!bpl)
9216 return xritag;
9217
9218 for (i = 0; i < numBdes; i++) {
9219 /* Should already be byte swapped. */
28baac74
JS
9220 sgl->addr_hi = bpl->addrHigh;
9221 sgl->addr_lo = bpl->addrLow;
9222
0558056c 9223 sgl->word2 = le32_to_cpu(sgl->word2);
4f774513
JS
9224 if ((i+1) == numBdes)
9225 bf_set(lpfc_sli4_sge_last, sgl, 1);
9226 else
9227 bf_set(lpfc_sli4_sge_last, sgl, 0);
28baac74
JS
9228 /* swap the size field back to the cpu so we
9229 * can assign it to the sgl.
9230 */
9231 bde.tus.w = le32_to_cpu(bpl->tus.w);
9232 sgl->sge_len = cpu_to_le32(bde.tus.f.bdeSize);
63e801ce
JS
9233 /* The offsets in the sgl need to be accumulated
9234 * separately for the request and reply lists.
9235 * The request is always first, the reply follows.
9236 */
9237 if (piocbq->iocb.ulpCommand == CMD_GEN_REQUEST64_CR) {
9238 /* add up the reply sg entries */
9239 if (bpl->tus.f.bdeFlags == BUFF_TYPE_BDE_64I)
9240 inbound++;
9241 /* first inbound? reset the offset */
9242 if (inbound == 1)
9243 offset = 0;
9244 bf_set(lpfc_sli4_sge_offset, sgl, offset);
f9bb2da1
JS
9245 bf_set(lpfc_sli4_sge_type, sgl,
9246 LPFC_SGE_TYPE_DATA);
63e801ce
JS
9247 offset += bde.tus.f.bdeSize;
9248 }
546fc854 9249 sgl->word2 = cpu_to_le32(sgl->word2);
4f774513
JS
9250 bpl++;
9251 sgl++;
9252 }
9253 } else if (icmd->un.genreq64.bdl.bdeFlags == BUFF_TYPE_BDE_64) {
9254 /* The addrHigh and addrLow fields of the BDE have not
9255 * been byteswapped yet so they need to be swapped
9256 * before putting them in the sgl.
9257 */
9258 sgl->addr_hi =
9259 cpu_to_le32(icmd->un.genreq64.bdl.addrHigh);
9260 sgl->addr_lo =
9261 cpu_to_le32(icmd->un.genreq64.bdl.addrLow);
0558056c 9262 sgl->word2 = le32_to_cpu(sgl->word2);
4f774513
JS
9263 bf_set(lpfc_sli4_sge_last, sgl, 1);
9264 sgl->word2 = cpu_to_le32(sgl->word2);
28baac74
JS
9265 sgl->sge_len =
9266 cpu_to_le32(icmd->un.genreq64.bdl.bdeSize);
4f774513
JS
9267 }
9268 return sglq->sli4_xritag;
3772a991 9269}
92d7f7b0 9270
e59058c4 9271/**
4f774513 9272 * lpfc_sli_iocb2wqe - Convert the IOCB to a work queue entry.
e59058c4 9273 * @phba: Pointer to HBA context object.
4f774513
JS
9274 * @piocb: Pointer to command iocb.
9275 * @wqe: Pointer to the work queue entry.
e59058c4 9276 *
4f774513
JS
9277 * This routine converts the iocb command to its Work Queue Entry
9278 * equivalent. The wqe pointer should not have any fields set when
9279 * this routine is called because it will memcpy over them.
9280 * This routine does not set the CQ_ID or the WQEC bits in the
9281 * wqe.
e59058c4 9282 *
4f774513 9283 * Returns: 0 = Success, IOCB_ERROR = Failure.
e59058c4 9284 **/
cf5bf97e 9285static int
4f774513 9286lpfc_sli4_iocb2wqe(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq,
205e8240 9287 union lpfc_wqe128 *wqe)
cf5bf97e 9288{
5ffc266e 9289 uint32_t xmit_len = 0, total_len = 0;
4f774513
JS
9290 uint8_t ct = 0;
9291 uint32_t fip;
9292 uint32_t abort_tag;
9293 uint8_t command_type = ELS_COMMAND_NON_FIP;
9294 uint8_t cmnd;
9295 uint16_t xritag;
dcf2a4e0
JS
9296 uint16_t abrt_iotag;
9297 struct lpfc_iocbq *abrtiocbq;
4f774513 9298 struct ulp_bde64 *bpl = NULL;
f0d9bccc 9299 uint32_t els_id = LPFC_ELS_ID_DEFAULT;
5ffc266e
JS
9300 int numBdes, i;
9301 struct ulp_bde64 bde;
c31098ce 9302 struct lpfc_nodelist *ndlp;
ff78d8f9 9303 uint32_t *pcmd;
1b51197d 9304 uint32_t if_type;
4f774513 9305
45ed1190 9306 fip = phba->hba_flag & HBA_FIP_SUPPORT;
4f774513 9307 /* The fcp commands will set command type */
0c287589 9308 if (iocbq->iocb_flag & LPFC_IO_FCP)
4f774513 9309 command_type = FCP_COMMAND;
c868595d 9310 else if (fip && (iocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK))
0c287589
JS
9311 command_type = ELS_COMMAND_FIP;
9312 else
9313 command_type = ELS_COMMAND_NON_FIP;
9314
b5c53958
JS
9315 if (phba->fcp_embed_io)
9316 memset(wqe, 0, sizeof(union lpfc_wqe128));
4f774513
JS
9317 /* Some of the fields are in the right position already */
9318 memcpy(wqe, &iocbq->iocb, sizeof(union lpfc_wqe));
ae9e28f3
JS
9319 if (iocbq->iocb.ulpCommand != CMD_SEND_FRAME) {
9320 /* The ct field has moved so reset */
9321 wqe->generic.wqe_com.word7 = 0;
9322 wqe->generic.wqe_com.word10 = 0;
9323 }
b5c53958
JS
9324
9325 abort_tag = (uint32_t) iocbq->iotag;
9326 xritag = iocbq->sli4_xritag;
4f774513
JS
9327 /* words0-2 bpl convert bde */
9328 if (iocbq->iocb.un.genreq64.bdl.bdeFlags == BUFF_TYPE_BLP_64) {
5ffc266e
JS
9329 numBdes = iocbq->iocb.un.genreq64.bdl.bdeSize /
9330 sizeof(struct ulp_bde64);
4f774513
JS
9331 bpl = (struct ulp_bde64 *)
9332 ((struct lpfc_dmabuf *)iocbq->context3)->virt;
9333 if (!bpl)
9334 return IOCB_ERROR;
cf5bf97e 9335
4f774513
JS
9336 /* Should already be byte swapped. */
9337 wqe->generic.bde.addrHigh = le32_to_cpu(bpl->addrHigh);
9338 wqe->generic.bde.addrLow = le32_to_cpu(bpl->addrLow);
9339 /* swap the size field back to the cpu so we
9340 * can assign it to the sgl.
9341 */
9342 wqe->generic.bde.tus.w = le32_to_cpu(bpl->tus.w);
5ffc266e
JS
9343 xmit_len = wqe->generic.bde.tus.f.bdeSize;
9344 total_len = 0;
9345 for (i = 0; i < numBdes; i++) {
9346 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
9347 total_len += bde.tus.f.bdeSize;
9348 }
4f774513 9349 } else
5ffc266e 9350 xmit_len = iocbq->iocb.un.fcpi64.bdl.bdeSize;
cf5bf97e 9351
4f774513
JS
9352 iocbq->iocb.ulpIoTag = iocbq->iotag;
9353 cmnd = iocbq->iocb.ulpCommand;
a4bc3379 9354
4f774513
JS
9355 switch (iocbq->iocb.ulpCommand) {
9356 case CMD_ELS_REQUEST64_CR:
93d1379e
JS
9357 if (iocbq->iocb_flag & LPFC_IO_LIBDFC)
9358 ndlp = iocbq->context_un.ndlp;
9359 else
9360 ndlp = (struct lpfc_nodelist *)iocbq->context1;
4f774513
JS
9361 if (!iocbq->iocb.ulpLe) {
9362 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
9363 "2007 Only Limited Edition cmd Format"
9364 " supported 0x%x\n",
9365 iocbq->iocb.ulpCommand);
9366 return IOCB_ERROR;
9367 }
ff78d8f9 9368
5ffc266e 9369 wqe->els_req.payload_len = xmit_len;
4f774513
JS
9370 /* Els_reguest64 has a TMO */
9371 bf_set(wqe_tmo, &wqe->els_req.wqe_com,
9372 iocbq->iocb.ulpTimeout);
9373 /* Need a VF for word 4 set the vf bit*/
9374 bf_set(els_req64_vf, &wqe->els_req, 0);
9375 /* And a VFID for word 12 */
9376 bf_set(els_req64_vfid, &wqe->els_req, 0);
4f774513 9377 ct = ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l);
f0d9bccc
JS
9378 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
9379 iocbq->iocb.ulpContext);
9380 bf_set(wqe_ct, &wqe->els_req.wqe_com, ct);
9381 bf_set(wqe_pu, &wqe->els_req.wqe_com, 0);
4f774513 9382 /* CCP CCPE PV PRI in word10 were set in the memcpy */
ff78d8f9 9383 if (command_type == ELS_COMMAND_FIP)
c868595d
JS
9384 els_id = ((iocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK)
9385 >> LPFC_FIP_ELS_ID_SHIFT);
ff78d8f9
JS
9386 pcmd = (uint32_t *) (((struct lpfc_dmabuf *)
9387 iocbq->context2)->virt);
1b51197d
JS
9388 if_type = bf_get(lpfc_sli_intf_if_type,
9389 &phba->sli4_hba.sli_intf);
27d6ac0a 9390 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
ff78d8f9 9391 if (pcmd && (*pcmd == ELS_CMD_FLOGI ||
cb69f7de 9392 *pcmd == ELS_CMD_SCR ||
6b5151fd 9393 *pcmd == ELS_CMD_FDISC ||
bdcd2b92 9394 *pcmd == ELS_CMD_LOGO ||
ff78d8f9
JS
9395 *pcmd == ELS_CMD_PLOGI)) {
9396 bf_set(els_req64_sp, &wqe->els_req, 1);
9397 bf_set(els_req64_sid, &wqe->els_req,
9398 iocbq->vport->fc_myDID);
939723a4
JS
9399 if ((*pcmd == ELS_CMD_FLOGI) &&
9400 !(phba->fc_topology ==
9401 LPFC_TOPOLOGY_LOOP))
9402 bf_set(els_req64_sid, &wqe->els_req, 0);
ff78d8f9
JS
9403 bf_set(wqe_ct, &wqe->els_req.wqe_com, 1);
9404 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
a7dd9c0f 9405 phba->vpi_ids[iocbq->vport->vpi]);
3ef6d24c 9406 } else if (pcmd && iocbq->context1) {
ff78d8f9
JS
9407 bf_set(wqe_ct, &wqe->els_req.wqe_com, 0);
9408 bf_set(wqe_ctxt_tag, &wqe->els_req.wqe_com,
9409 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
9410 }
c868595d 9411 }
6d368e53
JS
9412 bf_set(wqe_temp_rpi, &wqe->els_req.wqe_com,
9413 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
f0d9bccc
JS
9414 bf_set(wqe_els_id, &wqe->els_req.wqe_com, els_id);
9415 bf_set(wqe_dbde, &wqe->els_req.wqe_com, 1);
9416 bf_set(wqe_iod, &wqe->els_req.wqe_com, LPFC_WQE_IOD_READ);
9417 bf_set(wqe_qosd, &wqe->els_req.wqe_com, 1);
9418 bf_set(wqe_lenloc, &wqe->els_req.wqe_com, LPFC_WQE_LENLOC_NONE);
9419 bf_set(wqe_ebde_cnt, &wqe->els_req.wqe_com, 0);
af22741c 9420 wqe->els_req.max_response_payload_len = total_len - xmit_len;
7851fe2c 9421 break;
5ffc266e 9422 case CMD_XMIT_SEQUENCE64_CX:
f0d9bccc
JS
9423 bf_set(wqe_ctxt_tag, &wqe->xmit_sequence.wqe_com,
9424 iocbq->iocb.un.ulpWord[3]);
9425 bf_set(wqe_rcvoxid, &wqe->xmit_sequence.wqe_com,
7851fe2c 9426 iocbq->iocb.unsli3.rcvsli3.ox_id);
5ffc266e
JS
9427 /* The entire sequence is transmitted for this IOCB */
9428 xmit_len = total_len;
9429 cmnd = CMD_XMIT_SEQUENCE64_CR;
1b51197d
JS
9430 if (phba->link_flag & LS_LOOPBACK_MODE)
9431 bf_set(wqe_xo, &wqe->xmit_sequence.wge_ctl, 1);
4f774513 9432 case CMD_XMIT_SEQUENCE64_CR:
f0d9bccc
JS
9433 /* word3 iocb=io_tag32 wqe=reserved */
9434 wqe->xmit_sequence.rsvd3 = 0;
4f774513
JS
9435 /* word4 relative_offset memcpy */
9436 /* word5 r_ctl/df_ctl memcpy */
f0d9bccc
JS
9437 bf_set(wqe_pu, &wqe->xmit_sequence.wqe_com, 0);
9438 bf_set(wqe_dbde, &wqe->xmit_sequence.wqe_com, 1);
9439 bf_set(wqe_iod, &wqe->xmit_sequence.wqe_com,
9440 LPFC_WQE_IOD_WRITE);
9441 bf_set(wqe_lenloc, &wqe->xmit_sequence.wqe_com,
9442 LPFC_WQE_LENLOC_WORD12);
9443 bf_set(wqe_ebde_cnt, &wqe->xmit_sequence.wqe_com, 0);
5ffc266e
JS
9444 wqe->xmit_sequence.xmit_len = xmit_len;
9445 command_type = OTHER_COMMAND;
7851fe2c 9446 break;
4f774513 9447 case CMD_XMIT_BCAST64_CN:
f0d9bccc
JS
9448 /* word3 iocb=iotag32 wqe=seq_payload_len */
9449 wqe->xmit_bcast64.seq_payload_len = xmit_len;
4f774513
JS
9450 /* word4 iocb=rsvd wqe=rsvd */
9451 /* word5 iocb=rctl/type/df_ctl wqe=rctl/type/df_ctl memcpy */
9452 /* word6 iocb=ctxt_tag/io_tag wqe=ctxt_tag/xri */
f0d9bccc 9453 bf_set(wqe_ct, &wqe->xmit_bcast64.wqe_com,
4f774513 9454 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
f0d9bccc
JS
9455 bf_set(wqe_dbde, &wqe->xmit_bcast64.wqe_com, 1);
9456 bf_set(wqe_iod, &wqe->xmit_bcast64.wqe_com, LPFC_WQE_IOD_WRITE);
9457 bf_set(wqe_lenloc, &wqe->xmit_bcast64.wqe_com,
9458 LPFC_WQE_LENLOC_WORD3);
9459 bf_set(wqe_ebde_cnt, &wqe->xmit_bcast64.wqe_com, 0);
7851fe2c 9460 break;
4f774513
JS
9461 case CMD_FCP_IWRITE64_CR:
9462 command_type = FCP_COMMAND_DATA_OUT;
f0d9bccc
JS
9463 /* word3 iocb=iotag wqe=payload_offset_len */
9464 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
0ba4b219
JS
9465 bf_set(payload_offset_len, &wqe->fcp_iwrite,
9466 xmit_len + sizeof(struct fcp_rsp));
9467 bf_set(cmd_buff_len, &wqe->fcp_iwrite,
9468 0);
f0d9bccc
JS
9469 /* word4 iocb=parameter wqe=total_xfer_length memcpy */
9470 /* word5 iocb=initial_xfer_len wqe=initial_xfer_len memcpy */
9471 bf_set(wqe_erp, &wqe->fcp_iwrite.wqe_com,
9472 iocbq->iocb.ulpFCP2Rcvy);
9473 bf_set(wqe_lnk, &wqe->fcp_iwrite.wqe_com, iocbq->iocb.ulpXS);
9474 /* Always open the exchange */
f0d9bccc
JS
9475 bf_set(wqe_iod, &wqe->fcp_iwrite.wqe_com, LPFC_WQE_IOD_WRITE);
9476 bf_set(wqe_lenloc, &wqe->fcp_iwrite.wqe_com,
9477 LPFC_WQE_LENLOC_WORD4);
f0d9bccc 9478 bf_set(wqe_pu, &wqe->fcp_iwrite.wqe_com, iocbq->iocb.ulpPU);
acd6859b 9479 bf_set(wqe_dbde, &wqe->fcp_iwrite.wqe_com, 1);
1ba981fd
JS
9480 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9481 bf_set(wqe_oas, &wqe->fcp_iwrite.wqe_com, 1);
c92c841c
JS
9482 bf_set(wqe_ccpe, &wqe->fcp_iwrite.wqe_com, 1);
9483 if (iocbq->priority) {
9484 bf_set(wqe_ccp, &wqe->fcp_iwrite.wqe_com,
9485 (iocbq->priority << 1));
9486 } else {
1ba981fd
JS
9487 bf_set(wqe_ccp, &wqe->fcp_iwrite.wqe_com,
9488 (phba->cfg_XLanePriority << 1));
9489 }
9490 }
b5c53958
JS
9491 /* Note, word 10 is already initialized to 0 */
9492
414abe0a
JS
9493 /* Don't set PBDE for Perf hints, just lpfc_enable_pbde */
9494 if (phba->cfg_enable_pbde)
0bc2b7c5
JS
9495 bf_set(wqe_pbde, &wqe->fcp_iwrite.wqe_com, 1);
9496 else
9497 bf_set(wqe_pbde, &wqe->fcp_iwrite.wqe_com, 0);
9498
b5c53958 9499 if (phba->fcp_embed_io) {
c490850a 9500 struct lpfc_io_buf *lpfc_cmd;
b5c53958 9501 struct sli4_sge *sgl;
b5c53958
JS
9502 struct fcp_cmnd *fcp_cmnd;
9503 uint32_t *ptr;
9504
9505 /* 128 byte wqe support here */
b5c53958
JS
9506
9507 lpfc_cmd = iocbq->context1;
0794d601 9508 sgl = (struct sli4_sge *)lpfc_cmd->dma_sgl;
b5c53958
JS
9509 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9510
9511 /* Word 0-2 - FCP_CMND */
205e8240 9512 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9513 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9514 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9515 wqe->generic.bde.addrHigh = 0;
9516 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9517
205e8240
JS
9518 bf_set(wqe_wqes, &wqe->fcp_iwrite.wqe_com, 1);
9519 bf_set(wqe_dbde, &wqe->fcp_iwrite.wqe_com, 0);
b5c53958
JS
9520
9521 /* Word 22-29 FCP CMND Payload */
205e8240 9522 ptr = &wqe->words[22];
b5c53958
JS
9523 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9524 }
7851fe2c 9525 break;
4f774513 9526 case CMD_FCP_IREAD64_CR:
f0d9bccc
JS
9527 /* word3 iocb=iotag wqe=payload_offset_len */
9528 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
0ba4b219
JS
9529 bf_set(payload_offset_len, &wqe->fcp_iread,
9530 xmit_len + sizeof(struct fcp_rsp));
9531 bf_set(cmd_buff_len, &wqe->fcp_iread,
9532 0);
f0d9bccc
JS
9533 /* word4 iocb=parameter wqe=total_xfer_length memcpy */
9534 /* word5 iocb=initial_xfer_len wqe=initial_xfer_len memcpy */
9535 bf_set(wqe_erp, &wqe->fcp_iread.wqe_com,
9536 iocbq->iocb.ulpFCP2Rcvy);
9537 bf_set(wqe_lnk, &wqe->fcp_iread.wqe_com, iocbq->iocb.ulpXS);
f1126688 9538 /* Always open the exchange */
f0d9bccc
JS
9539 bf_set(wqe_iod, &wqe->fcp_iread.wqe_com, LPFC_WQE_IOD_READ);
9540 bf_set(wqe_lenloc, &wqe->fcp_iread.wqe_com,
9541 LPFC_WQE_LENLOC_WORD4);
f0d9bccc 9542 bf_set(wqe_pu, &wqe->fcp_iread.wqe_com, iocbq->iocb.ulpPU);
acd6859b 9543 bf_set(wqe_dbde, &wqe->fcp_iread.wqe_com, 1);
1ba981fd
JS
9544 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9545 bf_set(wqe_oas, &wqe->fcp_iread.wqe_com, 1);
c92c841c
JS
9546 bf_set(wqe_ccpe, &wqe->fcp_iread.wqe_com, 1);
9547 if (iocbq->priority) {
9548 bf_set(wqe_ccp, &wqe->fcp_iread.wqe_com,
9549 (iocbq->priority << 1));
9550 } else {
1ba981fd
JS
9551 bf_set(wqe_ccp, &wqe->fcp_iread.wqe_com,
9552 (phba->cfg_XLanePriority << 1));
9553 }
9554 }
b5c53958
JS
9555 /* Note, word 10 is already initialized to 0 */
9556
414abe0a
JS
9557 /* Don't set PBDE for Perf hints, just lpfc_enable_pbde */
9558 if (phba->cfg_enable_pbde)
0bc2b7c5
JS
9559 bf_set(wqe_pbde, &wqe->fcp_iread.wqe_com, 1);
9560 else
9561 bf_set(wqe_pbde, &wqe->fcp_iread.wqe_com, 0);
9562
b5c53958 9563 if (phba->fcp_embed_io) {
c490850a 9564 struct lpfc_io_buf *lpfc_cmd;
b5c53958 9565 struct sli4_sge *sgl;
b5c53958
JS
9566 struct fcp_cmnd *fcp_cmnd;
9567 uint32_t *ptr;
9568
9569 /* 128 byte wqe support here */
b5c53958
JS
9570
9571 lpfc_cmd = iocbq->context1;
0794d601 9572 sgl = (struct sli4_sge *)lpfc_cmd->dma_sgl;
b5c53958
JS
9573 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9574
9575 /* Word 0-2 - FCP_CMND */
205e8240 9576 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9577 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9578 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9579 wqe->generic.bde.addrHigh = 0;
9580 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9581
205e8240
JS
9582 bf_set(wqe_wqes, &wqe->fcp_iread.wqe_com, 1);
9583 bf_set(wqe_dbde, &wqe->fcp_iread.wqe_com, 0);
b5c53958
JS
9584
9585 /* Word 22-29 FCP CMND Payload */
205e8240 9586 ptr = &wqe->words[22];
b5c53958
JS
9587 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9588 }
7851fe2c 9589 break;
4f774513 9590 case CMD_FCP_ICMND64_CR:
0ba4b219
JS
9591 /* word3 iocb=iotag wqe=payload_offset_len */
9592 /* Add the FCP_CMD and FCP_RSP sizes to get the offset */
9593 bf_set(payload_offset_len, &wqe->fcp_icmd,
9594 xmit_len + sizeof(struct fcp_rsp));
9595 bf_set(cmd_buff_len, &wqe->fcp_icmd,
9596 0);
f0d9bccc 9597 /* word3 iocb=IO_TAG wqe=reserved */
f0d9bccc 9598 bf_set(wqe_pu, &wqe->fcp_icmd.wqe_com, 0);
4f774513 9599 /* Always open the exchange */
f0d9bccc
JS
9600 bf_set(wqe_dbde, &wqe->fcp_icmd.wqe_com, 1);
9601 bf_set(wqe_iod, &wqe->fcp_icmd.wqe_com, LPFC_WQE_IOD_WRITE);
9602 bf_set(wqe_qosd, &wqe->fcp_icmd.wqe_com, 1);
9603 bf_set(wqe_lenloc, &wqe->fcp_icmd.wqe_com,
9604 LPFC_WQE_LENLOC_NONE);
2a94aea4
JS
9605 bf_set(wqe_erp, &wqe->fcp_icmd.wqe_com,
9606 iocbq->iocb.ulpFCP2Rcvy);
1ba981fd
JS
9607 if (iocbq->iocb_flag & LPFC_IO_OAS) {
9608 bf_set(wqe_oas, &wqe->fcp_icmd.wqe_com, 1);
c92c841c
JS
9609 bf_set(wqe_ccpe, &wqe->fcp_icmd.wqe_com, 1);
9610 if (iocbq->priority) {
9611 bf_set(wqe_ccp, &wqe->fcp_icmd.wqe_com,
9612 (iocbq->priority << 1));
9613 } else {
1ba981fd
JS
9614 bf_set(wqe_ccp, &wqe->fcp_icmd.wqe_com,
9615 (phba->cfg_XLanePriority << 1));
9616 }
9617 }
b5c53958
JS
9618 /* Note, word 10 is already initialized to 0 */
9619
9620 if (phba->fcp_embed_io) {
c490850a 9621 struct lpfc_io_buf *lpfc_cmd;
b5c53958 9622 struct sli4_sge *sgl;
b5c53958
JS
9623 struct fcp_cmnd *fcp_cmnd;
9624 uint32_t *ptr;
9625
9626 /* 128 byte wqe support here */
b5c53958
JS
9627
9628 lpfc_cmd = iocbq->context1;
0794d601 9629 sgl = (struct sli4_sge *)lpfc_cmd->dma_sgl;
b5c53958
JS
9630 fcp_cmnd = lpfc_cmd->fcp_cmnd;
9631
9632 /* Word 0-2 - FCP_CMND */
205e8240 9633 wqe->generic.bde.tus.f.bdeFlags =
b5c53958 9634 BUFF_TYPE_BDE_IMMED;
205e8240
JS
9635 wqe->generic.bde.tus.f.bdeSize = sgl->sge_len;
9636 wqe->generic.bde.addrHigh = 0;
9637 wqe->generic.bde.addrLow = 88; /* Word 22 */
b5c53958 9638
205e8240
JS
9639 bf_set(wqe_wqes, &wqe->fcp_icmd.wqe_com, 1);
9640 bf_set(wqe_dbde, &wqe->fcp_icmd.wqe_com, 0);
b5c53958
JS
9641
9642 /* Word 22-29 FCP CMND Payload */
205e8240 9643 ptr = &wqe->words[22];
b5c53958
JS
9644 memcpy(ptr, fcp_cmnd, sizeof(struct fcp_cmnd));
9645 }
7851fe2c 9646 break;
4f774513 9647 case CMD_GEN_REQUEST64_CR:
63e801ce
JS
9648 /* For this command calculate the xmit length of the
9649 * request bde.
9650 */
9651 xmit_len = 0;
9652 numBdes = iocbq->iocb.un.genreq64.bdl.bdeSize /
9653 sizeof(struct ulp_bde64);
9654 for (i = 0; i < numBdes; i++) {
63e801ce 9655 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
546fc854
JS
9656 if (bde.tus.f.bdeFlags != BUFF_TYPE_BDE_64)
9657 break;
63e801ce
JS
9658 xmit_len += bde.tus.f.bdeSize;
9659 }
f0d9bccc
JS
9660 /* word3 iocb=IO_TAG wqe=request_payload_len */
9661 wqe->gen_req.request_payload_len = xmit_len;
9662 /* word4 iocb=parameter wqe=relative_offset memcpy */
9663 /* word5 [rctl, type, df_ctl, la] copied in memcpy */
4f774513
JS
9664 /* word6 context tag copied in memcpy */
9665 if (iocbq->iocb.ulpCt_h || iocbq->iocb.ulpCt_l) {
9666 ct = ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l);
9667 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
9668 "2015 Invalid CT %x command 0x%x\n",
9669 ct, iocbq->iocb.ulpCommand);
9670 return IOCB_ERROR;
9671 }
f0d9bccc
JS
9672 bf_set(wqe_ct, &wqe->gen_req.wqe_com, 0);
9673 bf_set(wqe_tmo, &wqe->gen_req.wqe_com, iocbq->iocb.ulpTimeout);
9674 bf_set(wqe_pu, &wqe->gen_req.wqe_com, iocbq->iocb.ulpPU);
9675 bf_set(wqe_dbde, &wqe->gen_req.wqe_com, 1);
9676 bf_set(wqe_iod, &wqe->gen_req.wqe_com, LPFC_WQE_IOD_READ);
9677 bf_set(wqe_qosd, &wqe->gen_req.wqe_com, 1);
9678 bf_set(wqe_lenloc, &wqe->gen_req.wqe_com, LPFC_WQE_LENLOC_NONE);
9679 bf_set(wqe_ebde_cnt, &wqe->gen_req.wqe_com, 0);
af22741c 9680 wqe->gen_req.max_response_payload_len = total_len - xmit_len;
4f774513 9681 command_type = OTHER_COMMAND;
7851fe2c 9682 break;
4f774513 9683 case CMD_XMIT_ELS_RSP64_CX:
c31098ce 9684 ndlp = (struct lpfc_nodelist *)iocbq->context1;
4f774513 9685 /* words0-2 BDE memcpy */
f0d9bccc
JS
9686 /* word3 iocb=iotag32 wqe=response_payload_len */
9687 wqe->xmit_els_rsp.response_payload_len = xmit_len;
939723a4
JS
9688 /* word4 */
9689 wqe->xmit_els_rsp.word4 = 0;
4f774513
JS
9690 /* word5 iocb=rsvd wge=did */
9691 bf_set(wqe_els_did, &wqe->xmit_els_rsp.wqe_dest,
939723a4
JS
9692 iocbq->iocb.un.xseq64.xmit_els_remoteID);
9693
9694 if_type = bf_get(lpfc_sli_intf_if_type,
9695 &phba->sli4_hba.sli_intf);
27d6ac0a 9696 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
939723a4
JS
9697 if (iocbq->vport->fc_flag & FC_PT2PT) {
9698 bf_set(els_rsp64_sp, &wqe->xmit_els_rsp, 1);
9699 bf_set(els_rsp64_sid, &wqe->xmit_els_rsp,
9700 iocbq->vport->fc_myDID);
9701 if (iocbq->vport->fc_myDID == Fabric_DID) {
9702 bf_set(wqe_els_did,
9703 &wqe->xmit_els_rsp.wqe_dest, 0);
9704 }
9705 }
9706 }
f0d9bccc
JS
9707 bf_set(wqe_ct, &wqe->xmit_els_rsp.wqe_com,
9708 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
9709 bf_set(wqe_pu, &wqe->xmit_els_rsp.wqe_com, iocbq->iocb.ulpPU);
9710 bf_set(wqe_rcvoxid, &wqe->xmit_els_rsp.wqe_com,
7851fe2c 9711 iocbq->iocb.unsli3.rcvsli3.ox_id);
4f774513 9712 if (!iocbq->iocb.ulpCt_h && iocbq->iocb.ulpCt_l)
f0d9bccc 9713 bf_set(wqe_ctxt_tag, &wqe->xmit_els_rsp.wqe_com,
6d368e53 9714 phba->vpi_ids[iocbq->vport->vpi]);
f0d9bccc
JS
9715 bf_set(wqe_dbde, &wqe->xmit_els_rsp.wqe_com, 1);
9716 bf_set(wqe_iod, &wqe->xmit_els_rsp.wqe_com, LPFC_WQE_IOD_WRITE);
9717 bf_set(wqe_qosd, &wqe->xmit_els_rsp.wqe_com, 1);
9718 bf_set(wqe_lenloc, &wqe->xmit_els_rsp.wqe_com,
9719 LPFC_WQE_LENLOC_WORD3);
9720 bf_set(wqe_ebde_cnt, &wqe->xmit_els_rsp.wqe_com, 0);
6d368e53
JS
9721 bf_set(wqe_rsp_temp_rpi, &wqe->xmit_els_rsp,
9722 phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]);
ff78d8f9
JS
9723 pcmd = (uint32_t *) (((struct lpfc_dmabuf *)
9724 iocbq->context2)->virt);
9725 if (phba->fc_topology == LPFC_TOPOLOGY_LOOP) {
939723a4
JS
9726 bf_set(els_rsp64_sp, &wqe->xmit_els_rsp, 1);
9727 bf_set(els_rsp64_sid, &wqe->xmit_els_rsp,
ff78d8f9 9728 iocbq->vport->fc_myDID);
939723a4
JS
9729 bf_set(wqe_ct, &wqe->xmit_els_rsp.wqe_com, 1);
9730 bf_set(wqe_ctxt_tag, &wqe->xmit_els_rsp.wqe_com,
ff78d8f9
JS
9731 phba->vpi_ids[phba->pport->vpi]);
9732 }
4f774513 9733 command_type = OTHER_COMMAND;
7851fe2c 9734 break;
4f774513
JS
9735 case CMD_CLOSE_XRI_CN:
9736 case CMD_ABORT_XRI_CN:
9737 case CMD_ABORT_XRI_CX:
9738 /* words 0-2 memcpy should be 0 rserved */
9739 /* port will send abts */
dcf2a4e0
JS
9740 abrt_iotag = iocbq->iocb.un.acxri.abortContextTag;
9741 if (abrt_iotag != 0 && abrt_iotag <= phba->sli.last_iotag) {
9742 abrtiocbq = phba->sli.iocbq_lookup[abrt_iotag];
9743 fip = abrtiocbq->iocb_flag & LPFC_FIP_ELS_ID_MASK;
9744 } else
9745 fip = 0;
9746
9747 if ((iocbq->iocb.ulpCommand == CMD_CLOSE_XRI_CN) || fip)
4f774513 9748 /*
dcf2a4e0
JS
9749 * The link is down, or the command was ELS_FIP
9750 * so the fw does not need to send abts
4f774513
JS
9751 * on the wire.
9752 */
9753 bf_set(abort_cmd_ia, &wqe->abort_cmd, 1);
9754 else
9755 bf_set(abort_cmd_ia, &wqe->abort_cmd, 0);
9756 bf_set(abort_cmd_criteria, &wqe->abort_cmd, T_XRI_TAG);
f0d9bccc
JS
9757 /* word5 iocb=CONTEXT_TAG|IO_TAG wqe=reserved */
9758 wqe->abort_cmd.rsrvd5 = 0;
9759 bf_set(wqe_ct, &wqe->abort_cmd.wqe_com,
4f774513
JS
9760 ((iocbq->iocb.ulpCt_h << 1) | iocbq->iocb.ulpCt_l));
9761 abort_tag = iocbq->iocb.un.acxri.abortIoTag;
4f774513
JS
9762 /*
9763 * The abort handler will send us CMD_ABORT_XRI_CN or
9764 * CMD_CLOSE_XRI_CN and the fw only accepts CMD_ABORT_XRI_CX
9765 */
f0d9bccc
JS
9766 bf_set(wqe_cmnd, &wqe->abort_cmd.wqe_com, CMD_ABORT_XRI_CX);
9767 bf_set(wqe_qosd, &wqe->abort_cmd.wqe_com, 1);
9768 bf_set(wqe_lenloc, &wqe->abort_cmd.wqe_com,
9769 LPFC_WQE_LENLOC_NONE);
4f774513
JS
9770 cmnd = CMD_ABORT_XRI_CX;
9771 command_type = OTHER_COMMAND;
9772 xritag = 0;
7851fe2c 9773 break;
6669f9bb 9774 case CMD_XMIT_BLS_RSP64_CX:
6b5151fd 9775 ndlp = (struct lpfc_nodelist *)iocbq->context1;
546fc854 9776 /* As BLS ABTS RSP WQE is very different from other WQEs,
6669f9bb
JS
9777 * we re-construct this WQE here based on information in
9778 * iocbq from scratch.
9779 */
9780 memset(wqe, 0, sizeof(union lpfc_wqe));
5ffc266e 9781 /* OX_ID is invariable to who sent ABTS to CT exchange */
6669f9bb 9782 bf_set(xmit_bls_rsp64_oxid, &wqe->xmit_bls_rsp,
546fc854
JS
9783 bf_get(lpfc_abts_oxid, &iocbq->iocb.un.bls_rsp));
9784 if (bf_get(lpfc_abts_orig, &iocbq->iocb.un.bls_rsp) ==
5ffc266e
JS
9785 LPFC_ABTS_UNSOL_INT) {
9786 /* ABTS sent by initiator to CT exchange, the
9787 * RX_ID field will be filled with the newly
9788 * allocated responder XRI.
9789 */
9790 bf_set(xmit_bls_rsp64_rxid, &wqe->xmit_bls_rsp,
9791 iocbq->sli4_xritag);
9792 } else {
9793 /* ABTS sent by responder to CT exchange, the
9794 * RX_ID field will be filled with the responder
9795 * RX_ID from ABTS.
9796 */
9797 bf_set(xmit_bls_rsp64_rxid, &wqe->xmit_bls_rsp,
546fc854 9798 bf_get(lpfc_abts_rxid, &iocbq->iocb.un.bls_rsp));
5ffc266e 9799 }
6669f9bb
JS
9800 bf_set(xmit_bls_rsp64_seqcnthi, &wqe->xmit_bls_rsp, 0xffff);
9801 bf_set(wqe_xmit_bls_pt, &wqe->xmit_bls_rsp.wqe_dest, 0x1);
6b5151fd
JS
9802
9803 /* Use CT=VPI */
9804 bf_set(wqe_els_did, &wqe->xmit_bls_rsp.wqe_dest,
9805 ndlp->nlp_DID);
9806 bf_set(xmit_bls_rsp64_temprpi, &wqe->xmit_bls_rsp,
9807 iocbq->iocb.ulpContext);
9808 bf_set(wqe_ct, &wqe->xmit_bls_rsp.wqe_com, 1);
6669f9bb 9809 bf_set(wqe_ctxt_tag, &wqe->xmit_bls_rsp.wqe_com,
6b5151fd 9810 phba->vpi_ids[phba->pport->vpi]);
f0d9bccc
JS
9811 bf_set(wqe_qosd, &wqe->xmit_bls_rsp.wqe_com, 1);
9812 bf_set(wqe_lenloc, &wqe->xmit_bls_rsp.wqe_com,
9813 LPFC_WQE_LENLOC_NONE);
6669f9bb
JS
9814 /* Overwrite the pre-set comnd type with OTHER_COMMAND */
9815 command_type = OTHER_COMMAND;
546fc854
JS
9816 if (iocbq->iocb.un.xseq64.w5.hcsw.Rctl == FC_RCTL_BA_RJT) {
9817 bf_set(xmit_bls_rsp64_rjt_vspec, &wqe->xmit_bls_rsp,
9818 bf_get(lpfc_vndr_code, &iocbq->iocb.un.bls_rsp));
9819 bf_set(xmit_bls_rsp64_rjt_expc, &wqe->xmit_bls_rsp,
9820 bf_get(lpfc_rsn_expln, &iocbq->iocb.un.bls_rsp));
9821 bf_set(xmit_bls_rsp64_rjt_rsnc, &wqe->xmit_bls_rsp,
9822 bf_get(lpfc_rsn_code, &iocbq->iocb.un.bls_rsp));
9823 }
9824
7851fe2c 9825 break;
ae9e28f3
JS
9826 case CMD_SEND_FRAME:
9827 bf_set(wqe_xri_tag, &wqe->generic.wqe_com, xritag);
9828 bf_set(wqe_reqtag, &wqe->generic.wqe_com, iocbq->iotag);
9829 return 0;
4f774513
JS
9830 case CMD_XRI_ABORTED_CX:
9831 case CMD_CREATE_XRI_CR: /* Do we expect to use this? */
4f774513
JS
9832 case CMD_IOCB_FCP_IBIDIR64_CR: /* bidirectional xfer */
9833 case CMD_FCP_TSEND64_CX: /* Target mode send xfer-ready */
9834 case CMD_FCP_TRSP64_CX: /* Target mode rcv */
9835 case CMD_FCP_AUTO_TRSP_CX: /* Auto target rsp */
9836 default:
9837 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
9838 "2014 Invalid command 0x%x\n",
9839 iocbq->iocb.ulpCommand);
9840 return IOCB_ERROR;
7851fe2c 9841 break;
4f774513 9842 }
6d368e53 9843
8012cc38
JS
9844 if (iocbq->iocb_flag & LPFC_IO_DIF_PASS)
9845 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_PASSTHRU);
9846 else if (iocbq->iocb_flag & LPFC_IO_DIF_STRIP)
9847 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_STRIP);
9848 else if (iocbq->iocb_flag & LPFC_IO_DIF_INSERT)
9849 bf_set(wqe_dif, &wqe->generic.wqe_com, LPFC_WQE_DIF_INSERT);
9850 iocbq->iocb_flag &= ~(LPFC_IO_DIF_PASS | LPFC_IO_DIF_STRIP |
9851 LPFC_IO_DIF_INSERT);
f0d9bccc
JS
9852 bf_set(wqe_xri_tag, &wqe->generic.wqe_com, xritag);
9853 bf_set(wqe_reqtag, &wqe->generic.wqe_com, iocbq->iotag);
9854 wqe->generic.wqe_com.abort_tag = abort_tag;
9855 bf_set(wqe_cmd_type, &wqe->generic.wqe_com, command_type);
9856 bf_set(wqe_cmnd, &wqe->generic.wqe_com, cmnd);
9857 bf_set(wqe_class, &wqe->generic.wqe_com, iocbq->iocb.ulpClass);
9858 bf_set(wqe_cqid, &wqe->generic.wqe_com, LPFC_WQE_CQ_ID_DEFAULT);
4f774513
JS
9859 return 0;
9860}
9861
9862/**
9863 * __lpfc_sli_issue_iocb_s4 - SLI4 device lockless ver of lpfc_sli_issue_iocb
9864 * @phba: Pointer to HBA context object.
9865 * @ring_number: SLI ring number to issue iocb on.
9866 * @piocb: Pointer to command iocb.
9867 * @flag: Flag indicating if this command can be put into txq.
9868 *
9869 * __lpfc_sli_issue_iocb_s4 is used by other functions in the driver to issue
9870 * an iocb command to an HBA with SLI-4 interface spec.
9871 *
9872 * This function is called with hbalock held. The function will return success
9873 * after it successfully submit the iocb to firmware or after adding to the
9874 * txq.
9875 **/
9876static int
9877__lpfc_sli_issue_iocb_s4(struct lpfc_hba *phba, uint32_t ring_number,
9878 struct lpfc_iocbq *piocb, uint32_t flag)
9879{
9880 struct lpfc_sglq *sglq;
205e8240 9881 union lpfc_wqe128 wqe;
1ba981fd 9882 struct lpfc_queue *wq;
895427bd 9883 struct lpfc_sli_ring *pring;
4f774513 9884
895427bd
JS
9885 /* Get the WQ */
9886 if ((piocb->iocb_flag & LPFC_IO_FCP) ||
9887 (piocb->iocb_flag & LPFC_USE_FCPWQIDX)) {
cdb42bec 9888 wq = phba->sli4_hba.hdwq[piocb->hba_wqidx].fcp_wq;
895427bd
JS
9889 } else {
9890 wq = phba->sli4_hba.els_wq;
9891 }
9892
9893 /* Get corresponding ring */
9894 pring = wq->pring;
1c2ba475 9895
b5c53958
JS
9896 /*
9897 * The WQE can be either 64 or 128 bytes,
b5c53958 9898 */
b5c53958 9899
895427bd
JS
9900 lockdep_assert_held(&phba->hbalock);
9901
4f774513
JS
9902 if (piocb->sli4_xritag == NO_XRI) {
9903 if (piocb->iocb.ulpCommand == CMD_ABORT_XRI_CN ||
6b5151fd 9904 piocb->iocb.ulpCommand == CMD_CLOSE_XRI_CN)
4f774513
JS
9905 sglq = NULL;
9906 else {
0e9bb8d7 9907 if (!list_empty(&pring->txq)) {
2a9bf3d0
JS
9908 if (!(flag & SLI_IOCB_RET_IOCB)) {
9909 __lpfc_sli_ringtx_put(phba,
9910 pring, piocb);
9911 return IOCB_SUCCESS;
9912 } else {
9913 return IOCB_BUSY;
9914 }
9915 } else {
895427bd 9916 sglq = __lpfc_sli_get_els_sglq(phba, piocb);
2a9bf3d0
JS
9917 if (!sglq) {
9918 if (!(flag & SLI_IOCB_RET_IOCB)) {
9919 __lpfc_sli_ringtx_put(phba,
9920 pring,
9921 piocb);
9922 return IOCB_SUCCESS;
9923 } else
9924 return IOCB_BUSY;
9925 }
9926 }
4f774513 9927 }
2ea259ee 9928 } else if (piocb->iocb_flag & LPFC_IO_FCP)
6d368e53
JS
9929 /* These IO's already have an XRI and a mapped sgl. */
9930 sglq = NULL;
2ea259ee 9931 else {
6d368e53
JS
9932 /*
9933 * This is a continuation of a commandi,(CX) so this
4f774513
JS
9934 * sglq is on the active list
9935 */
edccdc17 9936 sglq = __lpfc_get_active_sglq(phba, piocb->sli4_lxritag);
4f774513
JS
9937 if (!sglq)
9938 return IOCB_ERROR;
9939 }
9940
9941 if (sglq) {
6d368e53 9942 piocb->sli4_lxritag = sglq->sli4_lxritag;
2a9bf3d0 9943 piocb->sli4_xritag = sglq->sli4_xritag;
2a9bf3d0 9944 if (NO_XRI == lpfc_sli4_bpl2sgl(phba, piocb, sglq))
4f774513
JS
9945 return IOCB_ERROR;
9946 }
9947
205e8240 9948 if (lpfc_sli4_iocb2wqe(phba, piocb, &wqe))
4f774513
JS
9949 return IOCB_ERROR;
9950
205e8240 9951 if (lpfc_sli4_wq_put(wq, &wqe))
895427bd 9952 return IOCB_ERROR;
4f774513
JS
9953 lpfc_sli_ringtxcmpl_put(phba, pring, piocb);
9954
9955 return 0;
9956}
9957
9958/**
9959 * __lpfc_sli_issue_iocb - Wrapper func of lockless version for issuing iocb
9960 *
9961 * This routine wraps the actual lockless version for issusing IOCB function
9962 * pointer from the lpfc_hba struct.
9963 *
9964 * Return codes:
b5c53958
JS
9965 * IOCB_ERROR - Error
9966 * IOCB_SUCCESS - Success
9967 * IOCB_BUSY - Busy
4f774513 9968 **/
2a9bf3d0 9969int
4f774513
JS
9970__lpfc_sli_issue_iocb(struct lpfc_hba *phba, uint32_t ring_number,
9971 struct lpfc_iocbq *piocb, uint32_t flag)
9972{
9973 return phba->__lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
9974}
9975
9976/**
25985edc 9977 * lpfc_sli_api_table_setup - Set up sli api function jump table
4f774513
JS
9978 * @phba: The hba struct for which this call is being executed.
9979 * @dev_grp: The HBA PCI-Device group number.
9980 *
9981 * This routine sets up the SLI interface API function jump table in @phba
9982 * struct.
9983 * Returns: 0 - success, -ENODEV - failure.
9984 **/
9985int
9986lpfc_sli_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
9987{
9988
9989 switch (dev_grp) {
9990 case LPFC_PCI_DEV_LP:
9991 phba->__lpfc_sli_issue_iocb = __lpfc_sli_issue_iocb_s3;
9992 phba->__lpfc_sli_release_iocbq = __lpfc_sli_release_iocbq_s3;
9993 break;
9994 case LPFC_PCI_DEV_OC:
9995 phba->__lpfc_sli_issue_iocb = __lpfc_sli_issue_iocb_s4;
9996 phba->__lpfc_sli_release_iocbq = __lpfc_sli_release_iocbq_s4;
9997 break;
9998 default:
9999 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10000 "1419 Invalid HBA PCI-device group: 0x%x\n",
10001 dev_grp);
10002 return -ENODEV;
10003 break;
10004 }
10005 phba->lpfc_get_iocb_from_iocbq = lpfc_get_iocb_from_iocbq;
10006 return 0;
10007}
10008
a1efe163 10009/**
895427bd 10010 * lpfc_sli4_calc_ring - Calculates which ring to use
a1efe163 10011 * @phba: Pointer to HBA context object.
a1efe163
JS
10012 * @piocb: Pointer to command iocb.
10013 *
895427bd
JS
10014 * For SLI4 only, FCP IO can deferred to one fo many WQs, based on
10015 * hba_wqidx, thus we need to calculate the corresponding ring.
a1efe163 10016 * Since ABORTS must go on the same WQ of the command they are
895427bd 10017 * aborting, we use command's hba_wqidx.
a1efe163 10018 */
895427bd
JS
10019struct lpfc_sli_ring *
10020lpfc_sli4_calc_ring(struct lpfc_hba *phba, struct lpfc_iocbq *piocb)
9bd2bff5 10021{
c490850a 10022 struct lpfc_io_buf *lpfc_cmd;
5e5b511d 10023
895427bd 10024 if (piocb->iocb_flag & (LPFC_IO_FCP | LPFC_USE_FCPWQIDX)) {
cdb42bec 10025 if (unlikely(!phba->sli4_hba.hdwq))
7370d10a
JS
10026 return NULL;
10027 /*
10028 * for abort iocb hba_wqidx should already
10029 * be setup based on what work queue we used.
10030 */
10031 if (!(piocb->iocb_flag & LPFC_USE_FCPWQIDX)) {
c490850a 10032 lpfc_cmd = (struct lpfc_io_buf *)piocb->context1;
1fbf9742 10033 piocb->hba_wqidx = lpfc_cmd->hdwq_no;
7370d10a 10034 }
cdb42bec 10035 return phba->sli4_hba.hdwq[piocb->hba_wqidx].fcp_wq->pring;
895427bd
JS
10036 } else {
10037 if (unlikely(!phba->sli4_hba.els_wq))
10038 return NULL;
10039 piocb->hba_wqidx = 0;
10040 return phba->sli4_hba.els_wq->pring;
9bd2bff5 10041 }
9bd2bff5
JS
10042}
10043
4f774513
JS
10044/**
10045 * lpfc_sli_issue_iocb - Wrapper function for __lpfc_sli_issue_iocb
10046 * @phba: Pointer to HBA context object.
10047 * @pring: Pointer to driver SLI ring object.
10048 * @piocb: Pointer to command iocb.
10049 * @flag: Flag indicating if this command can be put into txq.
10050 *
10051 * lpfc_sli_issue_iocb is a wrapper around __lpfc_sli_issue_iocb
10052 * function. This function gets the hbalock and calls
10053 * __lpfc_sli_issue_iocb function and will return the error returned
10054 * by __lpfc_sli_issue_iocb function. This wrapper is used by
10055 * functions which do not hold hbalock.
10056 **/
10057int
10058lpfc_sli_issue_iocb(struct lpfc_hba *phba, uint32_t ring_number,
10059 struct lpfc_iocbq *piocb, uint32_t flag)
10060{
895427bd 10061 struct lpfc_hba_eq_hdl *hba_eq_hdl;
2a76a283 10062 struct lpfc_sli_ring *pring;
ba20c853
JS
10063 struct lpfc_queue *fpeq;
10064 struct lpfc_eqe *eqe;
4f774513 10065 unsigned long iflags;
2a76a283 10066 int rc, idx;
4f774513 10067
7e56aa25 10068 if (phba->sli_rev == LPFC_SLI_REV4) {
895427bd
JS
10069 pring = lpfc_sli4_calc_ring(phba, piocb);
10070 if (unlikely(pring == NULL))
9bd2bff5 10071 return IOCB_ERROR;
ba20c853 10072
9bd2bff5
JS
10073 spin_lock_irqsave(&pring->ring_lock, iflags);
10074 rc = __lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
10075 spin_unlock_irqrestore(&pring->ring_lock, iflags);
ba20c853 10076
9bd2bff5 10077 if (lpfc_fcp_look_ahead && (piocb->iocb_flag & LPFC_IO_FCP)) {
895427bd
JS
10078 idx = piocb->hba_wqidx;
10079 hba_eq_hdl = &phba->sli4_hba.hba_eq_hdl[idx];
4f774513 10080
895427bd 10081 if (atomic_dec_and_test(&hba_eq_hdl->hba_eq_in_use)) {
ba20c853 10082
9bd2bff5 10083 /* Get associated EQ with this index */
cdb42bec 10084 fpeq = phba->sli4_hba.hdwq[idx].hba_eq;
ba20c853 10085
9bd2bff5 10086 /* Turn off interrupts from this EQ */
b71413dd 10087 phba->sli4_hba.sli4_eq_clr_intr(fpeq);
ba20c853 10088
9bd2bff5
JS
10089 /*
10090 * Process all the events on FCP EQ
10091 */
10092 while ((eqe = lpfc_sli4_eq_get(fpeq))) {
10093 lpfc_sli4_hba_handle_eqe(phba,
10094 eqe, idx);
10095 fpeq->EQ_processed++;
ba20c853 10096 }
ba20c853 10097
9bd2bff5 10098 /* Always clear and re-arm the EQ */
b71413dd 10099 phba->sli4_hba.sli4_eq_release(fpeq,
9bd2bff5
JS
10100 LPFC_QUEUE_REARM);
10101 }
895427bd 10102 atomic_inc(&hba_eq_hdl->hba_eq_in_use);
2a76a283 10103 }
7e56aa25
JS
10104 } else {
10105 /* For now, SLI2/3 will still use hbalock */
10106 spin_lock_irqsave(&phba->hbalock, iflags);
10107 rc = __lpfc_sli_issue_iocb(phba, ring_number, piocb, flag);
10108 spin_unlock_irqrestore(&phba->hbalock, iflags);
10109 }
4f774513
JS
10110 return rc;
10111}
10112
10113/**
10114 * lpfc_extra_ring_setup - Extra ring setup function
10115 * @phba: Pointer to HBA context object.
10116 *
10117 * This function is called while driver attaches with the
10118 * HBA to setup the extra ring. The extra ring is used
10119 * only when driver needs to support target mode functionality
10120 * or IP over FC functionalities.
10121 *
895427bd 10122 * This function is called with no lock held. SLI3 only.
4f774513
JS
10123 **/
10124static int
10125lpfc_extra_ring_setup( struct lpfc_hba *phba)
10126{
10127 struct lpfc_sli *psli;
10128 struct lpfc_sli_ring *pring;
10129
10130 psli = &phba->sli;
10131
10132 /* Adjust cmd/rsp ring iocb entries more evenly */
10133
10134 /* Take some away from the FCP ring */
895427bd 10135 pring = &psli->sli3_ring[LPFC_FCP_RING];
7e56aa25
JS
10136 pring->sli.sli3.numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10137 pring->sli.sli3.numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10138 pring->sli.sli3.numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10139 pring->sli.sli3.numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
cf5bf97e 10140
a4bc3379 10141 /* and give them to the extra ring */
895427bd 10142 pring = &psli->sli3_ring[LPFC_EXTRA_RING];
a4bc3379 10143
7e56aa25
JS
10144 pring->sli.sli3.numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10145 pring->sli.sli3.numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10146 pring->sli.sli3.numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10147 pring->sli.sli3.numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
cf5bf97e
JW
10148
10149 /* Setup default profile for this ring */
10150 pring->iotag_max = 4096;
10151 pring->num_mask = 1;
10152 pring->prt[0].profile = 0; /* Mask 0 */
a4bc3379
JS
10153 pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
10154 pring->prt[0].type = phba->cfg_multi_ring_type;
cf5bf97e
JW
10155 pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
10156 return 0;
10157}
10158
cb69f7de
JS
10159/* lpfc_sli_abts_err_handler - handle a failed ABTS request from an SLI3 port.
10160 * @phba: Pointer to HBA context object.
10161 * @iocbq: Pointer to iocb object.
10162 *
10163 * The async_event handler calls this routine when it receives
10164 * an ASYNC_STATUS_CN event from the port. The port generates
10165 * this event when an Abort Sequence request to an rport fails
10166 * twice in succession. The abort could be originated by the
10167 * driver or by the port. The ABTS could have been for an ELS
10168 * or FCP IO. The port only generates this event when an ABTS
10169 * fails to complete after one retry.
10170 */
10171static void
10172lpfc_sli_abts_err_handler(struct lpfc_hba *phba,
10173 struct lpfc_iocbq *iocbq)
10174{
10175 struct lpfc_nodelist *ndlp = NULL;
10176 uint16_t rpi = 0, vpi = 0;
10177 struct lpfc_vport *vport = NULL;
10178
10179 /* The rpi in the ulpContext is vport-sensitive. */
10180 vpi = iocbq->iocb.un.asyncstat.sub_ctxt_tag;
10181 rpi = iocbq->iocb.ulpContext;
10182
10183 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
10184 "3092 Port generated ABTS async event "
10185 "on vpi %d rpi %d status 0x%x\n",
10186 vpi, rpi, iocbq->iocb.ulpStatus);
10187
10188 vport = lpfc_find_vport_by_vpid(phba, vpi);
10189 if (!vport)
10190 goto err_exit;
10191 ndlp = lpfc_findnode_rpi(vport, rpi);
10192 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp))
10193 goto err_exit;
10194
10195 if (iocbq->iocb.ulpStatus == IOSTAT_LOCAL_REJECT)
10196 lpfc_sli_abts_recover_port(vport, ndlp);
10197 return;
10198
10199 err_exit:
10200 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10201 "3095 Event Context not found, no "
10202 "action on vpi %d rpi %d status 0x%x, reason 0x%x\n",
10203 iocbq->iocb.ulpContext, iocbq->iocb.ulpStatus,
10204 vpi, rpi);
10205}
10206
10207/* lpfc_sli4_abts_err_handler - handle a failed ABTS request from an SLI4 port.
10208 * @phba: pointer to HBA context object.
10209 * @ndlp: nodelist pointer for the impacted rport.
10210 * @axri: pointer to the wcqe containing the failed exchange.
10211 *
10212 * The driver calls this routine when it receives an ABORT_XRI_FCP CQE from the
10213 * port. The port generates this event when an abort exchange request to an
10214 * rport fails twice in succession with no reply. The abort could be originated
10215 * by the driver or by the port. The ABTS could have been for an ELS or FCP IO.
10216 */
10217void
10218lpfc_sli4_abts_err_handler(struct lpfc_hba *phba,
10219 struct lpfc_nodelist *ndlp,
10220 struct sli4_wcqe_xri_aborted *axri)
10221{
10222 struct lpfc_vport *vport;
5c1db2ac 10223 uint32_t ext_status = 0;
cb69f7de 10224
6b5151fd 10225 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp)) {
cb69f7de
JS
10226 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10227 "3115 Node Context not found, driver "
10228 "ignoring abts err event\n");
6b5151fd
JS
10229 return;
10230 }
10231
cb69f7de
JS
10232 vport = ndlp->vport;
10233 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
10234 "3116 Port generated FCP XRI ABORT event on "
5c1db2ac 10235 "vpi %d rpi %d xri x%x status 0x%x parameter x%x\n",
8e668af5 10236 ndlp->vport->vpi, phba->sli4_hba.rpi_ids[ndlp->nlp_rpi],
cb69f7de 10237 bf_get(lpfc_wcqe_xa_xri, axri),
5c1db2ac
JS
10238 bf_get(lpfc_wcqe_xa_status, axri),
10239 axri->parameter);
cb69f7de 10240
5c1db2ac
JS
10241 /*
10242 * Catch the ABTS protocol failure case. Older OCe FW releases returned
10243 * LOCAL_REJECT and 0 for a failed ABTS exchange and later OCe and
10244 * LPe FW releases returned LOCAL_REJECT and SEQUENCE_TIMEOUT.
10245 */
e3d2b802 10246 ext_status = axri->parameter & IOERR_PARAM_MASK;
5c1db2ac
JS
10247 if ((bf_get(lpfc_wcqe_xa_status, axri) == IOSTAT_LOCAL_REJECT) &&
10248 ((ext_status == IOERR_SEQUENCE_TIMEOUT) || (ext_status == 0)))
cb69f7de
JS
10249 lpfc_sli_abts_recover_port(vport, ndlp);
10250}
10251
e59058c4 10252/**
3621a710 10253 * lpfc_sli_async_event_handler - ASYNC iocb handler function
e59058c4
JS
10254 * @phba: Pointer to HBA context object.
10255 * @pring: Pointer to driver SLI ring object.
10256 * @iocbq: Pointer to iocb object.
10257 *
10258 * This function is called by the slow ring event handler
10259 * function when there is an ASYNC event iocb in the ring.
10260 * This function is called with no lock held.
10261 * Currently this function handles only temperature related
10262 * ASYNC events. The function decodes the temperature sensor
10263 * event message and posts events for the management applications.
10264 **/
98c9ea5c 10265static void
57127f15
JS
10266lpfc_sli_async_event_handler(struct lpfc_hba * phba,
10267 struct lpfc_sli_ring * pring, struct lpfc_iocbq * iocbq)
10268{
10269 IOCB_t *icmd;
10270 uint16_t evt_code;
57127f15
JS
10271 struct temp_event temp_event_data;
10272 struct Scsi_Host *shost;
a257bf90 10273 uint32_t *iocb_w;
57127f15
JS
10274
10275 icmd = &iocbq->iocb;
10276 evt_code = icmd->un.asyncstat.evt_code;
57127f15 10277
cb69f7de
JS
10278 switch (evt_code) {
10279 case ASYNC_TEMP_WARN:
10280 case ASYNC_TEMP_SAFE:
10281 temp_event_data.data = (uint32_t) icmd->ulpContext;
10282 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
10283 if (evt_code == ASYNC_TEMP_WARN) {
10284 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
10285 lpfc_printf_log(phba, KERN_ERR, LOG_TEMP,
10286 "0347 Adapter is very hot, please take "
10287 "corrective action. temperature : %d Celsius\n",
10288 (uint32_t) icmd->ulpContext);
10289 } else {
10290 temp_event_data.event_code = LPFC_NORMAL_TEMP;
10291 lpfc_printf_log(phba, KERN_ERR, LOG_TEMP,
10292 "0340 Adapter temperature is OK now. "
10293 "temperature : %d Celsius\n",
10294 (uint32_t) icmd->ulpContext);
10295 }
10296
10297 /* Send temperature change event to applications */
10298 shost = lpfc_shost_from_vport(phba->pport);
10299 fc_host_post_vendor_event(shost, fc_get_event_number(),
10300 sizeof(temp_event_data), (char *) &temp_event_data,
10301 LPFC_NL_VENDOR_ID);
10302 break;
10303 case ASYNC_STATUS_CN:
10304 lpfc_sli_abts_err_handler(phba, iocbq);
10305 break;
10306 default:
a257bf90 10307 iocb_w = (uint32_t *) icmd;
cb69f7de 10308 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
76bb24ef 10309 "0346 Ring %d handler: unexpected ASYNC_STATUS"
e4e74273 10310 " evt_code 0x%x\n"
a257bf90
JS
10311 "W0 0x%08x W1 0x%08x W2 0x%08x W3 0x%08x\n"
10312 "W4 0x%08x W5 0x%08x W6 0x%08x W7 0x%08x\n"
10313 "W8 0x%08x W9 0x%08x W10 0x%08x W11 0x%08x\n"
10314 "W12 0x%08x W13 0x%08x W14 0x%08x W15 0x%08x\n",
cb69f7de 10315 pring->ringno, icmd->un.asyncstat.evt_code,
a257bf90
JS
10316 iocb_w[0], iocb_w[1], iocb_w[2], iocb_w[3],
10317 iocb_w[4], iocb_w[5], iocb_w[6], iocb_w[7],
10318 iocb_w[8], iocb_w[9], iocb_w[10], iocb_w[11],
10319 iocb_w[12], iocb_w[13], iocb_w[14], iocb_w[15]);
10320
cb69f7de 10321 break;
57127f15 10322 }
57127f15
JS
10323}
10324
10325
e59058c4 10326/**
895427bd 10327 * lpfc_sli4_setup - SLI ring setup function
e59058c4
JS
10328 * @phba: Pointer to HBA context object.
10329 *
10330 * lpfc_sli_setup sets up rings of the SLI interface with
10331 * number of iocbs per ring and iotags. This function is
10332 * called while driver attach to the HBA and before the
10333 * interrupts are enabled. So there is no need for locking.
10334 *
10335 * This function always returns 0.
10336 **/
dea3101e 10337int
895427bd
JS
10338lpfc_sli4_setup(struct lpfc_hba *phba)
10339{
10340 struct lpfc_sli_ring *pring;
10341
10342 pring = phba->sli4_hba.els_wq->pring;
10343 pring->num_mask = LPFC_MAX_RING_MASK;
10344 pring->prt[0].profile = 0; /* Mask 0 */
10345 pring->prt[0].rctl = FC_RCTL_ELS_REQ;
10346 pring->prt[0].type = FC_TYPE_ELS;
10347 pring->prt[0].lpfc_sli_rcv_unsol_event =
10348 lpfc_els_unsol_event;
10349 pring->prt[1].profile = 0; /* Mask 1 */
10350 pring->prt[1].rctl = FC_RCTL_ELS_REP;
10351 pring->prt[1].type = FC_TYPE_ELS;
10352 pring->prt[1].lpfc_sli_rcv_unsol_event =
10353 lpfc_els_unsol_event;
10354 pring->prt[2].profile = 0; /* Mask 2 */
10355 /* NameServer Inquiry */
10356 pring->prt[2].rctl = FC_RCTL_DD_UNSOL_CTL;
10357 /* NameServer */
10358 pring->prt[2].type = FC_TYPE_CT;
10359 pring->prt[2].lpfc_sli_rcv_unsol_event =
10360 lpfc_ct_unsol_event;
10361 pring->prt[3].profile = 0; /* Mask 3 */
10362 /* NameServer response */
10363 pring->prt[3].rctl = FC_RCTL_DD_SOL_CTL;
10364 /* NameServer */
10365 pring->prt[3].type = FC_TYPE_CT;
10366 pring->prt[3].lpfc_sli_rcv_unsol_event =
10367 lpfc_ct_unsol_event;
10368 return 0;
10369}
10370
10371/**
10372 * lpfc_sli_setup - SLI ring setup function
10373 * @phba: Pointer to HBA context object.
10374 *
10375 * lpfc_sli_setup sets up rings of the SLI interface with
10376 * number of iocbs per ring and iotags. This function is
10377 * called while driver attach to the HBA and before the
10378 * interrupts are enabled. So there is no need for locking.
10379 *
10380 * This function always returns 0. SLI3 only.
10381 **/
10382int
dea3101e 10383lpfc_sli_setup(struct lpfc_hba *phba)
10384{
ed957684 10385 int i, totiocbsize = 0;
dea3101e 10386 struct lpfc_sli *psli = &phba->sli;
10387 struct lpfc_sli_ring *pring;
10388
2a76a283 10389 psli->num_rings = MAX_SLI3_CONFIGURED_RINGS;
dea3101e 10390 psli->sli_flag = 0;
dea3101e 10391
604a3e30
JB
10392 psli->iocbq_lookup = NULL;
10393 psli->iocbq_lookup_len = 0;
10394 psli->last_iotag = 0;
10395
dea3101e 10396 for (i = 0; i < psli->num_rings; i++) {
895427bd 10397 pring = &psli->sli3_ring[i];
dea3101e 10398 switch (i) {
10399 case LPFC_FCP_RING: /* ring 0 - FCP */
10400 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10401 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
10402 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
10403 pring->sli.sli3.numCiocb +=
10404 SLI2_IOCB_CMD_R1XTRA_ENTRIES;
10405 pring->sli.sli3.numRiocb +=
10406 SLI2_IOCB_RSP_R1XTRA_ENTRIES;
10407 pring->sli.sli3.numCiocb +=
10408 SLI2_IOCB_CMD_R3XTRA_ENTRIES;
10409 pring->sli.sli3.numRiocb +=
10410 SLI2_IOCB_RSP_R3XTRA_ENTRIES;
10411 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10412 SLI3_IOCB_CMD_SIZE :
10413 SLI2_IOCB_CMD_SIZE;
7e56aa25 10414 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10415 SLI3_IOCB_RSP_SIZE :
10416 SLI2_IOCB_RSP_SIZE;
dea3101e 10417 pring->iotag_ctr = 0;
10418 pring->iotag_max =
92d7f7b0 10419 (phba->cfg_hba_queue_depth * 2);
dea3101e 10420 pring->fast_iotag = pring->iotag_max;
10421 pring->num_mask = 0;
10422 break;
a4bc3379 10423 case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
dea3101e 10424 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10425 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
10426 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
10427 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10428 SLI3_IOCB_CMD_SIZE :
10429 SLI2_IOCB_CMD_SIZE;
7e56aa25 10430 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10431 SLI3_IOCB_RSP_SIZE :
10432 SLI2_IOCB_RSP_SIZE;
2e0fef85 10433 pring->iotag_max = phba->cfg_hba_queue_depth;
dea3101e 10434 pring->num_mask = 0;
10435 break;
10436 case LPFC_ELS_RING: /* ring 2 - ELS / CT */
10437 /* numCiocb and numRiocb are used in config_port */
7e56aa25
JS
10438 pring->sli.sli3.numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
10439 pring->sli.sli3.numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
10440 pring->sli.sli3.sizeCiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10441 SLI3_IOCB_CMD_SIZE :
10442 SLI2_IOCB_CMD_SIZE;
7e56aa25 10443 pring->sli.sli3.sizeRiocb = (phba->sli_rev == 3) ?
92d7f7b0
JS
10444 SLI3_IOCB_RSP_SIZE :
10445 SLI2_IOCB_RSP_SIZE;
dea3101e 10446 pring->fast_iotag = 0;
10447 pring->iotag_ctr = 0;
10448 pring->iotag_max = 4096;
57127f15
JS
10449 pring->lpfc_sli_rcv_async_status =
10450 lpfc_sli_async_event_handler;
6669f9bb 10451 pring->num_mask = LPFC_MAX_RING_MASK;
dea3101e 10452 pring->prt[0].profile = 0; /* Mask 0 */
6a9c52cf
JS
10453 pring->prt[0].rctl = FC_RCTL_ELS_REQ;
10454 pring->prt[0].type = FC_TYPE_ELS;
dea3101e 10455 pring->prt[0].lpfc_sli_rcv_unsol_event =
92d7f7b0 10456 lpfc_els_unsol_event;
dea3101e 10457 pring->prt[1].profile = 0; /* Mask 1 */
6a9c52cf
JS
10458 pring->prt[1].rctl = FC_RCTL_ELS_REP;
10459 pring->prt[1].type = FC_TYPE_ELS;
dea3101e 10460 pring->prt[1].lpfc_sli_rcv_unsol_event =
92d7f7b0 10461 lpfc_els_unsol_event;
dea3101e 10462 pring->prt[2].profile = 0; /* Mask 2 */
10463 /* NameServer Inquiry */
6a9c52cf 10464 pring->prt[2].rctl = FC_RCTL_DD_UNSOL_CTL;
dea3101e 10465 /* NameServer */
6a9c52cf 10466 pring->prt[2].type = FC_TYPE_CT;
dea3101e 10467 pring->prt[2].lpfc_sli_rcv_unsol_event =
92d7f7b0 10468 lpfc_ct_unsol_event;
dea3101e 10469 pring->prt[3].profile = 0; /* Mask 3 */
10470 /* NameServer response */
6a9c52cf 10471 pring->prt[3].rctl = FC_RCTL_DD_SOL_CTL;
dea3101e 10472 /* NameServer */
6a9c52cf 10473 pring->prt[3].type = FC_TYPE_CT;
dea3101e 10474 pring->prt[3].lpfc_sli_rcv_unsol_event =
92d7f7b0 10475 lpfc_ct_unsol_event;
dea3101e 10476 break;
10477 }
7e56aa25
JS
10478 totiocbsize += (pring->sli.sli3.numCiocb *
10479 pring->sli.sli3.sizeCiocb) +
10480 (pring->sli.sli3.numRiocb * pring->sli.sli3.sizeRiocb);
dea3101e 10481 }
ed957684 10482 if (totiocbsize > MAX_SLIM_IOCB_SIZE) {
dea3101e 10483 /* Too many cmd / rsp ring entries in SLI2 SLIM */
e8b62011
JS
10484 printk(KERN_ERR "%d:0462 Too many cmd / rsp ring entries in "
10485 "SLI2 SLIM Data: x%x x%lx\n",
10486 phba->brd_no, totiocbsize,
10487 (unsigned long) MAX_SLIM_IOCB_SIZE);
dea3101e 10488 }
cf5bf97e
JW
10489 if (phba->cfg_multi_ring_support == 2)
10490 lpfc_extra_ring_setup(phba);
dea3101e 10491
10492 return 0;
10493}
10494
e59058c4 10495/**
895427bd 10496 * lpfc_sli4_queue_init - Queue initialization function
e59058c4
JS
10497 * @phba: Pointer to HBA context object.
10498 *
895427bd 10499 * lpfc_sli4_queue_init sets up mailbox queues and iocb queues for each
e59058c4
JS
10500 * ring. This function also initializes ring indices of each ring.
10501 * This function is called during the initialization of the SLI
10502 * interface of an HBA.
10503 * This function is called with no lock held and always returns
10504 * 1.
10505 **/
895427bd
JS
10506void
10507lpfc_sli4_queue_init(struct lpfc_hba *phba)
dea3101e 10508{
10509 struct lpfc_sli *psli;
10510 struct lpfc_sli_ring *pring;
604a3e30 10511 int i;
dea3101e 10512
10513 psli = &phba->sli;
2e0fef85 10514 spin_lock_irq(&phba->hbalock);
dea3101e 10515 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 10516 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e 10517 /* Initialize list headers for txq and txcmplq as double linked lists */
cdb42bec
JS
10518 for (i = 0; i < phba->cfg_hdw_queue; i++) {
10519 pring = phba->sli4_hba.hdwq[i].fcp_wq->pring;
895427bd
JS
10520 pring->flag = 0;
10521 pring->ringno = LPFC_FCP_RING;
c490850a 10522 pring->txcmplq_cnt = 0;
895427bd
JS
10523 INIT_LIST_HEAD(&pring->txq);
10524 INIT_LIST_HEAD(&pring->txcmplq);
10525 INIT_LIST_HEAD(&pring->iocb_continueq);
10526 spin_lock_init(&pring->ring_lock);
10527 }
10528 pring = phba->sli4_hba.els_wq->pring;
10529 pring->flag = 0;
10530 pring->ringno = LPFC_ELS_RING;
c490850a 10531 pring->txcmplq_cnt = 0;
895427bd
JS
10532 INIT_LIST_HEAD(&pring->txq);
10533 INIT_LIST_HEAD(&pring->txcmplq);
10534 INIT_LIST_HEAD(&pring->iocb_continueq);
10535 spin_lock_init(&pring->ring_lock);
dea3101e 10536
cdb42bec
JS
10537 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
10538 for (i = 0; i < phba->cfg_hdw_queue; i++) {
10539 pring = phba->sli4_hba.hdwq[i].nvme_wq->pring;
c490850a 10540 pring->flag = 0;
cdb42bec 10541 pring->ringno = LPFC_FCP_RING;
c490850a 10542 pring->txcmplq_cnt = 0;
cdb42bec
JS
10543 INIT_LIST_HEAD(&pring->txq);
10544 INIT_LIST_HEAD(&pring->txcmplq);
10545 INIT_LIST_HEAD(&pring->iocb_continueq);
10546 spin_lock_init(&pring->ring_lock);
10547 }
895427bd
JS
10548 pring = phba->sli4_hba.nvmels_wq->pring;
10549 pring->flag = 0;
10550 pring->ringno = LPFC_ELS_RING;
c490850a 10551 pring->txcmplq_cnt = 0;
895427bd
JS
10552 INIT_LIST_HEAD(&pring->txq);
10553 INIT_LIST_HEAD(&pring->txcmplq);
10554 INIT_LIST_HEAD(&pring->iocb_continueq);
10555 spin_lock_init(&pring->ring_lock);
10556 }
10557
895427bd
JS
10558 spin_unlock_irq(&phba->hbalock);
10559}
10560
10561/**
10562 * lpfc_sli_queue_init - Queue initialization function
10563 * @phba: Pointer to HBA context object.
10564 *
10565 * lpfc_sli_queue_init sets up mailbox queues and iocb queues for each
10566 * ring. This function also initializes ring indices of each ring.
10567 * This function is called during the initialization of the SLI
10568 * interface of an HBA.
10569 * This function is called with no lock held and always returns
10570 * 1.
10571 **/
10572void
10573lpfc_sli_queue_init(struct lpfc_hba *phba)
dea3101e 10574{
10575 struct lpfc_sli *psli;
10576 struct lpfc_sli_ring *pring;
604a3e30 10577 int i;
dea3101e 10578
10579 psli = &phba->sli;
2e0fef85 10580 spin_lock_irq(&phba->hbalock);
dea3101e 10581 INIT_LIST_HEAD(&psli->mboxq);
92d7f7b0 10582 INIT_LIST_HEAD(&psli->mboxq_cmpl);
dea3101e 10583 /* Initialize list headers for txq and txcmplq as double linked lists */
10584 for (i = 0; i < psli->num_rings; i++) {
895427bd 10585 pring = &psli->sli3_ring[i];
dea3101e 10586 pring->ringno = i;
7e56aa25
JS
10587 pring->sli.sli3.next_cmdidx = 0;
10588 pring->sli.sli3.local_getidx = 0;
10589 pring->sli.sli3.cmdidx = 0;
dea3101e 10590 INIT_LIST_HEAD(&pring->iocb_continueq);
9c2face6 10591 INIT_LIST_HEAD(&pring->iocb_continue_saveq);
dea3101e 10592 INIT_LIST_HEAD(&pring->postbufq);
895427bd
JS
10593 pring->flag = 0;
10594 INIT_LIST_HEAD(&pring->txq);
10595 INIT_LIST_HEAD(&pring->txcmplq);
7e56aa25 10596 spin_lock_init(&pring->ring_lock);
dea3101e 10597 }
2e0fef85 10598 spin_unlock_irq(&phba->hbalock);
dea3101e 10599}
10600
04c68496
JS
10601/**
10602 * lpfc_sli_mbox_sys_flush - Flush mailbox command sub-system
10603 * @phba: Pointer to HBA context object.
10604 *
10605 * This routine flushes the mailbox command subsystem. It will unconditionally
10606 * flush all the mailbox commands in the three possible stages in the mailbox
10607 * command sub-system: pending mailbox command queue; the outstanding mailbox
10608 * command; and completed mailbox command queue. It is caller's responsibility
10609 * to make sure that the driver is in the proper state to flush the mailbox
10610 * command sub-system. Namely, the posting of mailbox commands into the
10611 * pending mailbox command queue from the various clients must be stopped;
10612 * either the HBA is in a state that it will never works on the outstanding
10613 * mailbox command (such as in EEH or ERATT conditions) or the outstanding
10614 * mailbox command has been completed.
10615 **/
10616static void
10617lpfc_sli_mbox_sys_flush(struct lpfc_hba *phba)
10618{
10619 LIST_HEAD(completions);
10620 struct lpfc_sli *psli = &phba->sli;
10621 LPFC_MBOXQ_t *pmb;
10622 unsigned long iflag;
10623
523128e5
JS
10624 /* Disable softirqs, including timers from obtaining phba->hbalock */
10625 local_bh_disable();
10626
04c68496
JS
10627 /* Flush all the mailbox commands in the mbox system */
10628 spin_lock_irqsave(&phba->hbalock, iflag);
523128e5 10629
04c68496
JS
10630 /* The pending mailbox command queue */
10631 list_splice_init(&phba->sli.mboxq, &completions);
10632 /* The outstanding active mailbox command */
10633 if (psli->mbox_active) {
10634 list_add_tail(&psli->mbox_active->list, &completions);
10635 psli->mbox_active = NULL;
10636 psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
10637 }
10638 /* The completed mailbox command queue */
10639 list_splice_init(&phba->sli.mboxq_cmpl, &completions);
10640 spin_unlock_irqrestore(&phba->hbalock, iflag);
10641
523128e5
JS
10642 /* Enable softirqs again, done with phba->hbalock */
10643 local_bh_enable();
10644
04c68496
JS
10645 /* Return all flushed mailbox commands with MBX_NOT_FINISHED status */
10646 while (!list_empty(&completions)) {
10647 list_remove_head(&completions, pmb, LPFC_MBOXQ_t, list);
10648 pmb->u.mb.mbxStatus = MBX_NOT_FINISHED;
10649 if (pmb->mbox_cmpl)
10650 pmb->mbox_cmpl(phba, pmb);
10651 }
10652}
10653
e59058c4 10654/**
3621a710 10655 * lpfc_sli_host_down - Vport cleanup function
e59058c4
JS
10656 * @vport: Pointer to virtual port object.
10657 *
10658 * lpfc_sli_host_down is called to clean up the resources
10659 * associated with a vport before destroying virtual
10660 * port data structures.
10661 * This function does following operations:
10662 * - Free discovery resources associated with this virtual
10663 * port.
10664 * - Free iocbs associated with this virtual port in
10665 * the txq.
10666 * - Send abort for all iocb commands associated with this
10667 * vport in txcmplq.
10668 *
10669 * This function is called with no lock held and always returns 1.
10670 **/
92d7f7b0
JS
10671int
10672lpfc_sli_host_down(struct lpfc_vport *vport)
10673{
858c9f6c 10674 LIST_HEAD(completions);
92d7f7b0
JS
10675 struct lpfc_hba *phba = vport->phba;
10676 struct lpfc_sli *psli = &phba->sli;
895427bd 10677 struct lpfc_queue *qp = NULL;
92d7f7b0
JS
10678 struct lpfc_sli_ring *pring;
10679 struct lpfc_iocbq *iocb, *next_iocb;
92d7f7b0
JS
10680 int i;
10681 unsigned long flags = 0;
10682 uint16_t prev_pring_flag;
10683
10684 lpfc_cleanup_discovery_resources(vport);
10685
10686 spin_lock_irqsave(&phba->hbalock, flags);
92d7f7b0 10687
895427bd
JS
10688 /*
10689 * Error everything on the txq since these iocbs
10690 * have not been given to the FW yet.
10691 * Also issue ABTS for everything on the txcmplq
10692 */
10693 if (phba->sli_rev != LPFC_SLI_REV4) {
10694 for (i = 0; i < psli->num_rings; i++) {
10695 pring = &psli->sli3_ring[i];
10696 prev_pring_flag = pring->flag;
10697 /* Only slow rings */
10698 if (pring->ringno == LPFC_ELS_RING) {
10699 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10700 /* Set the lpfc data pending flag */
10701 set_bit(LPFC_DATA_READY, &phba->data_flags);
10702 }
10703 list_for_each_entry_safe(iocb, next_iocb,
10704 &pring->txq, list) {
10705 if (iocb->vport != vport)
10706 continue;
10707 list_move_tail(&iocb->list, &completions);
10708 }
10709 list_for_each_entry_safe(iocb, next_iocb,
10710 &pring->txcmplq, list) {
10711 if (iocb->vport != vport)
10712 continue;
10713 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
10714 }
10715 pring->flag = prev_pring_flag;
10716 }
10717 } else {
10718 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
10719 pring = qp->pring;
10720 if (!pring)
92d7f7b0 10721 continue;
895427bd
JS
10722 if (pring == phba->sli4_hba.els_wq->pring) {
10723 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10724 /* Set the lpfc data pending flag */
10725 set_bit(LPFC_DATA_READY, &phba->data_flags);
10726 }
10727 prev_pring_flag = pring->flag;
10728 spin_lock_irq(&pring->ring_lock);
10729 list_for_each_entry_safe(iocb, next_iocb,
10730 &pring->txq, list) {
10731 if (iocb->vport != vport)
10732 continue;
10733 list_move_tail(&iocb->list, &completions);
10734 }
10735 spin_unlock_irq(&pring->ring_lock);
10736 list_for_each_entry_safe(iocb, next_iocb,
10737 &pring->txcmplq, list) {
10738 if (iocb->vport != vport)
10739 continue;
10740 lpfc_sli_issue_abort_iotag(phba, pring, iocb);
10741 }
10742 pring->flag = prev_pring_flag;
92d7f7b0 10743 }
92d7f7b0 10744 }
92d7f7b0
JS
10745 spin_unlock_irqrestore(&phba->hbalock, flags);
10746
a257bf90
JS
10747 /* Cancel all the IOCBs from the completions list */
10748 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
10749 IOERR_SLI_DOWN);
92d7f7b0
JS
10750 return 1;
10751}
10752
e59058c4 10753/**
3621a710 10754 * lpfc_sli_hba_down - Resource cleanup function for the HBA
e59058c4
JS
10755 * @phba: Pointer to HBA context object.
10756 *
10757 * This function cleans up all iocb, buffers, mailbox commands
10758 * while shutting down the HBA. This function is called with no
10759 * lock held and always returns 1.
10760 * This function does the following to cleanup driver resources:
10761 * - Free discovery resources for each virtual port
10762 * - Cleanup any pending fabric iocbs
10763 * - Iterate through the iocb txq and free each entry
10764 * in the list.
10765 * - Free up any buffer posted to the HBA
10766 * - Free mailbox commands in the mailbox queue.
10767 **/
dea3101e 10768int
2e0fef85 10769lpfc_sli_hba_down(struct lpfc_hba *phba)
dea3101e 10770{
2534ba75 10771 LIST_HEAD(completions);
2e0fef85 10772 struct lpfc_sli *psli = &phba->sli;
895427bd 10773 struct lpfc_queue *qp = NULL;
dea3101e 10774 struct lpfc_sli_ring *pring;
0ff10d46 10775 struct lpfc_dmabuf *buf_ptr;
dea3101e 10776 unsigned long flags = 0;
04c68496
JS
10777 int i;
10778
10779 /* Shutdown the mailbox command sub-system */
618a5230 10780 lpfc_sli_mbox_sys_shutdown(phba, LPFC_MBX_WAIT);
dea3101e 10781
dea3101e 10782 lpfc_hba_down_prep(phba);
10783
523128e5
JS
10784 /* Disable softirqs, including timers from obtaining phba->hbalock */
10785 local_bh_disable();
10786
92d7f7b0
JS
10787 lpfc_fabric_abort_hba(phba);
10788
2e0fef85 10789 spin_lock_irqsave(&phba->hbalock, flags);
dea3101e 10790
895427bd
JS
10791 /*
10792 * Error everything on the txq since these iocbs
10793 * have not been given to the FW yet.
10794 */
10795 if (phba->sli_rev != LPFC_SLI_REV4) {
10796 for (i = 0; i < psli->num_rings; i++) {
10797 pring = &psli->sli3_ring[i];
10798 /* Only slow rings */
10799 if (pring->ringno == LPFC_ELS_RING) {
10800 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10801 /* Set the lpfc data pending flag */
10802 set_bit(LPFC_DATA_READY, &phba->data_flags);
10803 }
10804 list_splice_init(&pring->txq, &completions);
10805 }
10806 } else {
10807 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
10808 pring = qp->pring;
10809 if (!pring)
10810 continue;
10811 spin_lock_irq(&pring->ring_lock);
10812 list_splice_init(&pring->txq, &completions);
10813 spin_unlock_irq(&pring->ring_lock);
10814 if (pring == phba->sli4_hba.els_wq->pring) {
10815 pring->flag |= LPFC_DEFERRED_RING_EVENT;
10816 /* Set the lpfc data pending flag */
10817 set_bit(LPFC_DATA_READY, &phba->data_flags);
10818 }
10819 }
2534ba75 10820 }
2e0fef85 10821 spin_unlock_irqrestore(&phba->hbalock, flags);
dea3101e 10822
a257bf90
JS
10823 /* Cancel all the IOCBs from the completions list */
10824 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
10825 IOERR_SLI_DOWN);
dea3101e 10826
0ff10d46
JS
10827 spin_lock_irqsave(&phba->hbalock, flags);
10828 list_splice_init(&phba->elsbuf, &completions);
10829 phba->elsbuf_cnt = 0;
10830 phba->elsbuf_prev_cnt = 0;
10831 spin_unlock_irqrestore(&phba->hbalock, flags);
10832
10833 while (!list_empty(&completions)) {
10834 list_remove_head(&completions, buf_ptr,
10835 struct lpfc_dmabuf, list);
10836 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
10837 kfree(buf_ptr);
10838 }
10839
523128e5
JS
10840 /* Enable softirqs again, done with phba->hbalock */
10841 local_bh_enable();
10842
dea3101e 10843 /* Return any active mbox cmds */
10844 del_timer_sync(&psli->mbox_tmo);
2e0fef85 10845
da0436e9 10846 spin_lock_irqsave(&phba->pport->work_port_lock, flags);
2e0fef85 10847 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
da0436e9 10848 spin_unlock_irqrestore(&phba->pport->work_port_lock, flags);
2e0fef85 10849
da0436e9
JS
10850 return 1;
10851}
10852
e59058c4 10853/**
3621a710 10854 * lpfc_sli_pcimem_bcopy - SLI memory copy function
e59058c4
JS
10855 * @srcp: Source memory pointer.
10856 * @destp: Destination memory pointer.
10857 * @cnt: Number of words required to be copied.
10858 *
10859 * This function is used for copying data between driver memory
10860 * and the SLI memory. This function also changes the endianness
10861 * of each word if native endianness is different from SLI
10862 * endianness. This function can be called with or without
10863 * lock.
10864 **/
dea3101e 10865void
10866lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
10867{
10868 uint32_t *src = srcp;
10869 uint32_t *dest = destp;
10870 uint32_t ldata;
10871 int i;
10872
10873 for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
10874 ldata = *src;
10875 ldata = le32_to_cpu(ldata);
10876 *dest = ldata;
10877 src++;
10878 dest++;
10879 }
10880}
10881
e59058c4 10882
a0c87cbd
JS
10883/**
10884 * lpfc_sli_bemem_bcopy - SLI memory copy function
10885 * @srcp: Source memory pointer.
10886 * @destp: Destination memory pointer.
10887 * @cnt: Number of words required to be copied.
10888 *
10889 * This function is used for copying data between a data structure
10890 * with big endian representation to local endianness.
10891 * This function can be called with or without lock.
10892 **/
10893void
10894lpfc_sli_bemem_bcopy(void *srcp, void *destp, uint32_t cnt)
10895{
10896 uint32_t *src = srcp;
10897 uint32_t *dest = destp;
10898 uint32_t ldata;
10899 int i;
10900
10901 for (i = 0; i < (int)cnt; i += sizeof(uint32_t)) {
10902 ldata = *src;
10903 ldata = be32_to_cpu(ldata);
10904 *dest = ldata;
10905 src++;
10906 dest++;
10907 }
10908}
10909
e59058c4 10910/**
3621a710 10911 * lpfc_sli_ringpostbuf_put - Function to add a buffer to postbufq
e59058c4
JS
10912 * @phba: Pointer to HBA context object.
10913 * @pring: Pointer to driver SLI ring object.
10914 * @mp: Pointer to driver buffer object.
10915 *
10916 * This function is called with no lock held.
10917 * It always return zero after adding the buffer to the postbufq
10918 * buffer list.
10919 **/
dea3101e 10920int
2e0fef85
JS
10921lpfc_sli_ringpostbuf_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
10922 struct lpfc_dmabuf *mp)
dea3101e 10923{
10924 /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
10925 later */
2e0fef85 10926 spin_lock_irq(&phba->hbalock);
dea3101e 10927 list_add_tail(&mp->list, &pring->postbufq);
dea3101e 10928 pring->postbufq_cnt++;
2e0fef85 10929 spin_unlock_irq(&phba->hbalock);
dea3101e 10930 return 0;
10931}
10932
e59058c4 10933/**
3621a710 10934 * lpfc_sli_get_buffer_tag - allocates a tag for a CMD_QUE_XRI64_CX buffer
e59058c4
JS
10935 * @phba: Pointer to HBA context object.
10936 *
10937 * When HBQ is enabled, buffers are searched based on tags. This function
10938 * allocates a tag for buffer posted using CMD_QUE_XRI64_CX iocb. The
10939 * tag is bit wise or-ed with QUE_BUFTAG_BIT to make sure that the tag
10940 * does not conflict with tags of buffer posted for unsolicited events.
10941 * The function returns the allocated tag. The function is called with
10942 * no locks held.
10943 **/
76bb24ef
JS
10944uint32_t
10945lpfc_sli_get_buffer_tag(struct lpfc_hba *phba)
10946{
10947 spin_lock_irq(&phba->hbalock);
10948 phba->buffer_tag_count++;
10949 /*
10950 * Always set the QUE_BUFTAG_BIT to distiguish between
10951 * a tag assigned by HBQ.
10952 */
10953 phba->buffer_tag_count |= QUE_BUFTAG_BIT;
10954 spin_unlock_irq(&phba->hbalock);
10955 return phba->buffer_tag_count;
10956}
10957
e59058c4 10958/**
3621a710 10959 * lpfc_sli_ring_taggedbuf_get - find HBQ buffer associated with given tag
e59058c4
JS
10960 * @phba: Pointer to HBA context object.
10961 * @pring: Pointer to driver SLI ring object.
10962 * @tag: Buffer tag.
10963 *
10964 * Buffers posted using CMD_QUE_XRI64_CX iocb are in pring->postbufq
10965 * list. After HBA DMA data to these buffers, CMD_IOCB_RET_XRI64_CX
10966 * iocb is posted to the response ring with the tag of the buffer.
10967 * This function searches the pring->postbufq list using the tag
10968 * to find buffer associated with CMD_IOCB_RET_XRI64_CX
10969 * iocb. If the buffer is found then lpfc_dmabuf object of the
10970 * buffer is returned to the caller else NULL is returned.
10971 * This function is called with no lock held.
10972 **/
76bb24ef
JS
10973struct lpfc_dmabuf *
10974lpfc_sli_ring_taggedbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
10975 uint32_t tag)
10976{
10977 struct lpfc_dmabuf *mp, *next_mp;
10978 struct list_head *slp = &pring->postbufq;
10979
25985edc 10980 /* Search postbufq, from the beginning, looking for a match on tag */
76bb24ef
JS
10981 spin_lock_irq(&phba->hbalock);
10982 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
10983 if (mp->buffer_tag == tag) {
10984 list_del_init(&mp->list);
10985 pring->postbufq_cnt--;
10986 spin_unlock_irq(&phba->hbalock);
10987 return mp;
10988 }
10989 }
10990
10991 spin_unlock_irq(&phba->hbalock);
10992 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d7c255b2 10993 "0402 Cannot find virtual addr for buffer tag on "
76bb24ef
JS
10994 "ring %d Data x%lx x%p x%p x%x\n",
10995 pring->ringno, (unsigned long) tag,
10996 slp->next, slp->prev, pring->postbufq_cnt);
10997
10998 return NULL;
10999}
dea3101e 11000
e59058c4 11001/**
3621a710 11002 * lpfc_sli_ringpostbuf_get - search buffers for unsolicited CT and ELS events
e59058c4
JS
11003 * @phba: Pointer to HBA context object.
11004 * @pring: Pointer to driver SLI ring object.
11005 * @phys: DMA address of the buffer.
11006 *
11007 * This function searches the buffer list using the dma_address
11008 * of unsolicited event to find the driver's lpfc_dmabuf object
11009 * corresponding to the dma_address. The function returns the
11010 * lpfc_dmabuf object if a buffer is found else it returns NULL.
11011 * This function is called by the ct and els unsolicited event
11012 * handlers to get the buffer associated with the unsolicited
11013 * event.
11014 *
11015 * This function is called with no lock held.
11016 **/
dea3101e 11017struct lpfc_dmabuf *
11018lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
11019 dma_addr_t phys)
11020{
11021 struct lpfc_dmabuf *mp, *next_mp;
11022 struct list_head *slp = &pring->postbufq;
11023
25985edc 11024 /* Search postbufq, from the beginning, looking for a match on phys */
2e0fef85 11025 spin_lock_irq(&phba->hbalock);
dea3101e 11026 list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
11027 if (mp->phys == phys) {
11028 list_del_init(&mp->list);
11029 pring->postbufq_cnt--;
2e0fef85 11030 spin_unlock_irq(&phba->hbalock);
dea3101e 11031 return mp;
11032 }
11033 }
11034
2e0fef85 11035 spin_unlock_irq(&phba->hbalock);
dea3101e 11036 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 11037 "0410 Cannot find virtual addr for mapped buf on "
dea3101e 11038 "ring %d Data x%llx x%p x%p x%x\n",
e8b62011 11039 pring->ringno, (unsigned long long)phys,
dea3101e 11040 slp->next, slp->prev, pring->postbufq_cnt);
11041 return NULL;
11042}
11043
e59058c4 11044/**
3621a710 11045 * lpfc_sli_abort_els_cmpl - Completion handler for the els abort iocbs
e59058c4
JS
11046 * @phba: Pointer to HBA context object.
11047 * @cmdiocb: Pointer to driver command iocb object.
11048 * @rspiocb: Pointer to driver response iocb object.
11049 *
11050 * This function is the completion handler for the abort iocbs for
11051 * ELS commands. This function is called from the ELS ring event
11052 * handler with no lock held. This function frees memory resources
11053 * associated with the abort iocb.
11054 **/
dea3101e 11055static void
2e0fef85
JS
11056lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
11057 struct lpfc_iocbq *rspiocb)
dea3101e 11058{
2e0fef85 11059 IOCB_t *irsp = &rspiocb->iocb;
2680eeaa 11060 uint16_t abort_iotag, abort_context;
ff78d8f9 11061 struct lpfc_iocbq *abort_iocb = NULL;
2680eeaa
JS
11062
11063 if (irsp->ulpStatus) {
ff78d8f9
JS
11064
11065 /*
11066 * Assume that the port already completed and returned, or
11067 * will return the iocb. Just Log the message.
11068 */
2680eeaa
JS
11069 abort_context = cmdiocb->iocb.un.acxri.abortContextTag;
11070 abort_iotag = cmdiocb->iocb.un.acxri.abortIoTag;
11071
2e0fef85 11072 spin_lock_irq(&phba->hbalock);
45ed1190 11073 if (phba->sli_rev < LPFC_SLI_REV4) {
faa832e9
JS
11074 if (irsp->ulpCommand == CMD_ABORT_XRI_CX &&
11075 irsp->ulpStatus == IOSTAT_LOCAL_REJECT &&
11076 irsp->un.ulpWord[4] == IOERR_ABORT_REQUESTED) {
11077 spin_unlock_irq(&phba->hbalock);
11078 goto release_iocb;
11079 }
45ed1190
JS
11080 if (abort_iotag != 0 &&
11081 abort_iotag <= phba->sli.last_iotag)
11082 abort_iocb =
11083 phba->sli.iocbq_lookup[abort_iotag];
11084 } else
11085 /* For sli4 the abort_tag is the XRI,
11086 * so the abort routine puts the iotag of the iocb
11087 * being aborted in the context field of the abort
11088 * IOCB.
11089 */
11090 abort_iocb = phba->sli.iocbq_lookup[abort_context];
2680eeaa 11091
2a9bf3d0
JS
11092 lpfc_printf_log(phba, KERN_WARNING, LOG_ELS | LOG_SLI,
11093 "0327 Cannot abort els iocb %p "
11094 "with tag %x context %x, abort status %x, "
11095 "abort code %x\n",
11096 abort_iocb, abort_iotag, abort_context,
11097 irsp->ulpStatus, irsp->un.ulpWord[4]);
341af102 11098
ff78d8f9 11099 spin_unlock_irq(&phba->hbalock);
2680eeaa 11100 }
faa832e9 11101release_iocb:
604a3e30 11102 lpfc_sli_release_iocbq(phba, cmdiocb);
dea3101e 11103 return;
11104}
11105
e59058c4 11106/**
3621a710 11107 * lpfc_ignore_els_cmpl - Completion handler for aborted ELS command
e59058c4
JS
11108 * @phba: Pointer to HBA context object.
11109 * @cmdiocb: Pointer to driver command iocb object.
11110 * @rspiocb: Pointer to driver response iocb object.
11111 *
11112 * The function is called from SLI ring event handler with no
11113 * lock held. This function is the completion handler for ELS commands
11114 * which are aborted. The function frees memory resources used for
11115 * the aborted ELS commands.
11116 **/
92d7f7b0
JS
11117static void
11118lpfc_ignore_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
11119 struct lpfc_iocbq *rspiocb)
11120{
11121 IOCB_t *irsp = &rspiocb->iocb;
11122
11123 /* ELS cmd tag <ulpIoTag> completes */
11124 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
d7c255b2 11125 "0139 Ignoring ELS cmd tag x%x completion Data: "
92d7f7b0 11126 "x%x x%x x%x\n",
e8b62011 11127 irsp->ulpIoTag, irsp->ulpStatus,
92d7f7b0 11128 irsp->un.ulpWord[4], irsp->ulpTimeout);
858c9f6c
JS
11129 if (cmdiocb->iocb.ulpCommand == CMD_GEN_REQUEST64_CR)
11130 lpfc_ct_free_iocb(phba, cmdiocb);
11131 else
11132 lpfc_els_free_iocb(phba, cmdiocb);
92d7f7b0
JS
11133 return;
11134}
11135
e59058c4 11136/**
5af5eee7 11137 * lpfc_sli_abort_iotag_issue - Issue abort for a command iocb
e59058c4
JS
11138 * @phba: Pointer to HBA context object.
11139 * @pring: Pointer to driver SLI ring object.
11140 * @cmdiocb: Pointer to driver command iocb object.
11141 *
5af5eee7
JS
11142 * This function issues an abort iocb for the provided command iocb down to
11143 * the port. Other than the case the outstanding command iocb is an abort
11144 * request, this function issues abort out unconditionally. This function is
11145 * called with hbalock held. The function returns 0 when it fails due to
11146 * memory allocation failure or when the command iocb is an abort request.
e59058c4 11147 **/
5af5eee7
JS
11148static int
11149lpfc_sli_abort_iotag_issue(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
2e0fef85 11150 struct lpfc_iocbq *cmdiocb)
dea3101e 11151{
2e0fef85 11152 struct lpfc_vport *vport = cmdiocb->vport;
0bd4ca25 11153 struct lpfc_iocbq *abtsiocbp;
dea3101e 11154 IOCB_t *icmd = NULL;
11155 IOCB_t *iabt = NULL;
5af5eee7 11156 int retval;
7e56aa25 11157 unsigned long iflags;
faa832e9 11158 struct lpfc_nodelist *ndlp;
07951076 11159
1c2ba475
JT
11160 lockdep_assert_held(&phba->hbalock);
11161
92d7f7b0
JS
11162 /*
11163 * There are certain command types we don't want to abort. And we
11164 * don't want to abort commands that are already in the process of
11165 * being aborted.
07951076
JS
11166 */
11167 icmd = &cmdiocb->iocb;
2e0fef85 11168 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
92d7f7b0
JS
11169 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
11170 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
07951076
JS
11171 return 0;
11172
dea3101e 11173 /* issue ABTS for this IOCB based on iotag */
92d7f7b0 11174 abtsiocbp = __lpfc_sli_get_iocbq(phba);
dea3101e 11175 if (abtsiocbp == NULL)
11176 return 0;
dea3101e 11177
07951076 11178 /* This signals the response to set the correct status
341af102 11179 * before calling the completion handler
07951076
JS
11180 */
11181 cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
11182
dea3101e 11183 iabt = &abtsiocbp->iocb;
07951076
JS
11184 iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
11185 iabt->un.acxri.abortContextTag = icmd->ulpContext;
45ed1190 11186 if (phba->sli_rev == LPFC_SLI_REV4) {
da0436e9 11187 iabt->un.acxri.abortIoTag = cmdiocb->sli4_xritag;
45ed1190 11188 iabt->un.acxri.abortContextTag = cmdiocb->iotag;
faa832e9 11189 } else {
da0436e9 11190 iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
faa832e9
JS
11191 if (pring->ringno == LPFC_ELS_RING) {
11192 ndlp = (struct lpfc_nodelist *)(cmdiocb->context1);
11193 iabt->un.acxri.abortContextTag = ndlp->nlp_rpi;
11194 }
11195 }
07951076
JS
11196 iabt->ulpLe = 1;
11197 iabt->ulpClass = icmd->ulpClass;
dea3101e 11198
5ffc266e 11199 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11200 abtsiocbp->hba_wqidx = cmdiocb->hba_wqidx;
341af102
JS
11201 if (cmdiocb->iocb_flag & LPFC_IO_FCP)
11202 abtsiocbp->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11203 if (cmdiocb->iocb_flag & LPFC_IO_FOF)
11204 abtsiocbp->iocb_flag |= LPFC_IO_FOF;
5ffc266e 11205
2e0fef85 11206 if (phba->link_state >= LPFC_LINK_UP)
07951076
JS
11207 iabt->ulpCommand = CMD_ABORT_XRI_CN;
11208 else
11209 iabt->ulpCommand = CMD_CLOSE_XRI_CN;
dea3101e 11210
07951076 11211 abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
e6c6acc0 11212 abtsiocbp->vport = vport;
5b8bd0c9 11213
e8b62011
JS
11214 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI,
11215 "0339 Abort xri x%x, original iotag x%x, "
11216 "abort cmd iotag x%x\n",
2a9bf3d0 11217 iabt->un.acxri.abortIoTag,
e8b62011 11218 iabt->un.acxri.abortContextTag,
2a9bf3d0 11219 abtsiocbp->iotag);
7e56aa25
JS
11220
11221 if (phba->sli_rev == LPFC_SLI_REV4) {
895427bd
JS
11222 pring = lpfc_sli4_calc_ring(phba, abtsiocbp);
11223 if (unlikely(pring == NULL))
9bd2bff5 11224 return 0;
7e56aa25
JS
11225 /* Note: both hbalock and ring_lock need to be set here */
11226 spin_lock_irqsave(&pring->ring_lock, iflags);
11227 retval = __lpfc_sli_issue_iocb(phba, pring->ringno,
11228 abtsiocbp, 0);
11229 spin_unlock_irqrestore(&pring->ring_lock, iflags);
11230 } else {
11231 retval = __lpfc_sli_issue_iocb(phba, pring->ringno,
11232 abtsiocbp, 0);
11233 }
dea3101e 11234
d7c255b2
JS
11235 if (retval)
11236 __lpfc_sli_release_iocbq(phba, abtsiocbp);
5af5eee7
JS
11237
11238 /*
11239 * Caller to this routine should check for IOCB_ERROR
11240 * and handle it properly. This routine no longer removes
11241 * iocb off txcmplq and call compl in case of IOCB_ERROR.
11242 */
11243 return retval;
11244}
11245
11246/**
11247 * lpfc_sli_issue_abort_iotag - Abort function for a command iocb
11248 * @phba: Pointer to HBA context object.
11249 * @pring: Pointer to driver SLI ring object.
11250 * @cmdiocb: Pointer to driver command iocb object.
11251 *
11252 * This function issues an abort iocb for the provided command iocb. In case
11253 * of unloading, the abort iocb will not be issued to commands on the ELS
11254 * ring. Instead, the callback function shall be changed to those commands
11255 * so that nothing happens when them finishes. This function is called with
11256 * hbalock held. The function returns 0 when the command iocb is an abort
11257 * request.
11258 **/
11259int
11260lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
11261 struct lpfc_iocbq *cmdiocb)
11262{
11263 struct lpfc_vport *vport = cmdiocb->vport;
11264 int retval = IOCB_ERROR;
11265 IOCB_t *icmd = NULL;
11266
1c2ba475
JT
11267 lockdep_assert_held(&phba->hbalock);
11268
5af5eee7
JS
11269 /*
11270 * There are certain command types we don't want to abort. And we
11271 * don't want to abort commands that are already in the process of
11272 * being aborted.
11273 */
11274 icmd = &cmdiocb->iocb;
11275 if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
11276 icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
11277 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
11278 return 0;
11279
1234a6d5
DK
11280 if (!pring) {
11281 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
11282 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
11283 else
11284 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
11285 goto abort_iotag_exit;
11286 }
11287
5af5eee7
JS
11288 /*
11289 * If we're unloading, don't abort iocb on the ELS ring, but change
11290 * the callback so that nothing happens when it finishes.
11291 */
11292 if ((vport->load_flag & FC_UNLOADING) &&
11293 (pring->ringno == LPFC_ELS_RING)) {
11294 if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
11295 cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
11296 else
11297 cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
11298 goto abort_iotag_exit;
11299 }
11300
11301 /* Now, we try to issue the abort to the cmdiocb out */
11302 retval = lpfc_sli_abort_iotag_issue(phba, pring, cmdiocb);
11303
07951076 11304abort_iotag_exit:
2e0fef85
JS
11305 /*
11306 * Caller to this routine should check for IOCB_ERROR
11307 * and handle it properly. This routine no longer removes
11308 * iocb off txcmplq and call compl in case of IOCB_ERROR.
07951076 11309 */
2e0fef85 11310 return retval;
dea3101e 11311}
11312
895427bd
JS
11313/**
11314 * lpfc_sli4_abort_nvme_io - Issue abort for a command iocb
11315 * @phba: Pointer to HBA context object.
11316 * @pring: Pointer to driver SLI ring object.
11317 * @cmdiocb: Pointer to driver command iocb object.
11318 *
11319 * This function issues an abort iocb for the provided command iocb down to
11320 * the port. Other than the case the outstanding command iocb is an abort
11321 * request, this function issues abort out unconditionally. This function is
11322 * called with hbalock held. The function returns 0 when it fails due to
11323 * memory allocation failure or when the command iocb is an abort request.
11324 **/
11325static int
11326lpfc_sli4_abort_nvme_io(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
11327 struct lpfc_iocbq *cmdiocb)
11328{
11329 struct lpfc_vport *vport = cmdiocb->vport;
11330 struct lpfc_iocbq *abtsiocbp;
205e8240 11331 union lpfc_wqe128 *abts_wqe;
895427bd 11332 int retval;
1fbf9742 11333 int idx = cmdiocb->hba_wqidx;
895427bd
JS
11334
11335 /*
11336 * There are certain command types we don't want to abort. And we
11337 * don't want to abort commands that are already in the process of
11338 * being aborted.
11339 */
11340 if (cmdiocb->iocb.ulpCommand == CMD_ABORT_XRI_CN ||
11341 cmdiocb->iocb.ulpCommand == CMD_CLOSE_XRI_CN ||
11342 (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
11343 return 0;
11344
11345 /* issue ABTS for this io based on iotag */
11346 abtsiocbp = __lpfc_sli_get_iocbq(phba);
11347 if (abtsiocbp == NULL)
11348 return 0;
11349
11350 /* This signals the response to set the correct status
11351 * before calling the completion handler
11352 */
11353 cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
11354
11355 /* Complete prepping the abort wqe and issue to the FW. */
11356 abts_wqe = &abtsiocbp->wqe;
895427bd 11357
1c36833d
JS
11358 /* Clear any stale WQE contents */
11359 memset(abts_wqe, 0, sizeof(union lpfc_wqe));
11360 bf_set(abort_cmd_criteria, &abts_wqe->abort_cmd, T_XRI_TAG);
895427bd
JS
11361
11362 /* word 7 */
895427bd
JS
11363 bf_set(wqe_cmnd, &abts_wqe->abort_cmd.wqe_com, CMD_ABORT_XRI_CX);
11364 bf_set(wqe_class, &abts_wqe->abort_cmd.wqe_com,
11365 cmdiocb->iocb.ulpClass);
11366
11367 /* word 8 - tell the FW to abort the IO associated with this
11368 * outstanding exchange ID.
11369 */
11370 abts_wqe->abort_cmd.wqe_com.abort_tag = cmdiocb->sli4_xritag;
11371
11372 /* word 9 - this is the iotag for the abts_wqe completion. */
11373 bf_set(wqe_reqtag, &abts_wqe->abort_cmd.wqe_com,
11374 abtsiocbp->iotag);
11375
11376 /* word 10 */
895427bd
JS
11377 bf_set(wqe_qosd, &abts_wqe->abort_cmd.wqe_com, 1);
11378 bf_set(wqe_lenloc, &abts_wqe->abort_cmd.wqe_com, LPFC_WQE_LENLOC_NONE);
11379
11380 /* word 11 */
11381 bf_set(wqe_cmd_type, &abts_wqe->abort_cmd.wqe_com, OTHER_COMMAND);
11382 bf_set(wqe_wqec, &abts_wqe->abort_cmd.wqe_com, 1);
11383 bf_set(wqe_cqid, &abts_wqe->abort_cmd.wqe_com, LPFC_WQE_CQ_ID_DEFAULT);
11384
11385 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
11386 abtsiocbp->iocb_flag |= LPFC_IO_NVME;
11387 abtsiocbp->vport = vport;
01649561 11388 abtsiocbp->wqe_cmpl = lpfc_nvme_abort_fcreq_cmpl;
1fbf9742
JS
11389 retval = lpfc_sli4_issue_wqe(phba, &phba->sli4_hba.hdwq[idx],
11390 abtsiocbp);
cd22d605 11391 if (retval) {
895427bd
JS
11392 lpfc_printf_vlog(vport, KERN_ERR, LOG_NVME,
11393 "6147 Failed abts issue_wqe with status x%x "
11394 "for oxid x%x\n",
11395 retval, cmdiocb->sli4_xritag);
11396 lpfc_sli_release_iocbq(phba, abtsiocbp);
11397 return retval;
11398 }
11399
11400 lpfc_printf_vlog(vport, KERN_ERR, LOG_NVME,
11401 "6148 Drv Abort NVME Request Issued for "
11402 "ox_id x%x on reqtag x%x\n",
11403 cmdiocb->sli4_xritag,
11404 abtsiocbp->iotag);
11405
11406 return retval;
11407}
11408
5af5eee7
JS
11409/**
11410 * lpfc_sli_hba_iocb_abort - Abort all iocbs to an hba.
11411 * @phba: pointer to lpfc HBA data structure.
11412 *
11413 * This routine will abort all pending and outstanding iocbs to an HBA.
11414 **/
11415void
11416lpfc_sli_hba_iocb_abort(struct lpfc_hba *phba)
11417{
11418 struct lpfc_sli *psli = &phba->sli;
11419 struct lpfc_sli_ring *pring;
895427bd 11420 struct lpfc_queue *qp = NULL;
5af5eee7
JS
11421 int i;
11422
895427bd
JS
11423 if (phba->sli_rev != LPFC_SLI_REV4) {
11424 for (i = 0; i < psli->num_rings; i++) {
11425 pring = &psli->sli3_ring[i];
11426 lpfc_sli_abort_iocb_ring(phba, pring);
11427 }
11428 return;
11429 }
11430 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
11431 pring = qp->pring;
11432 if (!pring)
11433 continue;
db55fba8 11434 lpfc_sli_abort_iocb_ring(phba, pring);
5af5eee7
JS
11435 }
11436}
11437
e59058c4 11438/**
3621a710 11439 * lpfc_sli_validate_fcp_iocb - find commands associated with a vport or LUN
e59058c4
JS
11440 * @iocbq: Pointer to driver iocb object.
11441 * @vport: Pointer to driver virtual port object.
11442 * @tgt_id: SCSI ID of the target.
11443 * @lun_id: LUN ID of the scsi device.
11444 * @ctx_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST
11445 *
3621a710 11446 * This function acts as an iocb filter for functions which abort or count
e59058c4
JS
11447 * all FCP iocbs pending on a lun/SCSI target/SCSI host. It will return
11448 * 0 if the filtering criteria is met for the given iocb and will return
11449 * 1 if the filtering criteria is not met.
11450 * If ctx_cmd == LPFC_CTX_LUN, the function returns 0 only if the
11451 * given iocb is for the SCSI device specified by vport, tgt_id and
11452 * lun_id parameter.
11453 * If ctx_cmd == LPFC_CTX_TGT, the function returns 0 only if the
11454 * given iocb is for the SCSI target specified by vport and tgt_id
11455 * parameters.
11456 * If ctx_cmd == LPFC_CTX_HOST, the function returns 0 only if the
11457 * given iocb is for the SCSI host associated with the given vport.
11458 * This function is called with no locks held.
11459 **/
dea3101e 11460static int
51ef4c26
JS
11461lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, struct lpfc_vport *vport,
11462 uint16_t tgt_id, uint64_t lun_id,
0bd4ca25 11463 lpfc_ctx_cmd ctx_cmd)
dea3101e 11464{
c490850a 11465 struct lpfc_io_buf *lpfc_cmd;
dea3101e 11466 int rc = 1;
11467
b0e83012 11468 if (iocbq->vport != vport)
0bd4ca25
JSEC
11469 return rc;
11470
b0e83012
JS
11471 if (!(iocbq->iocb_flag & LPFC_IO_FCP) ||
11472 !(iocbq->iocb_flag & LPFC_IO_ON_TXCMPLQ))
51ef4c26
JS
11473 return rc;
11474
c490850a 11475 lpfc_cmd = container_of(iocbq, struct lpfc_io_buf, cur_iocbq);
0bd4ca25 11476
495a714c 11477 if (lpfc_cmd->pCmd == NULL)
dea3101e 11478 return rc;
11479
11480 switch (ctx_cmd) {
11481 case LPFC_CTX_LUN:
b0e83012 11482 if ((lpfc_cmd->rdata) && (lpfc_cmd->rdata->pnode) &&
495a714c
JS
11483 (lpfc_cmd->rdata->pnode->nlp_sid == tgt_id) &&
11484 (scsilun_to_int(&lpfc_cmd->fcp_cmnd->fcp_lun) == lun_id))
dea3101e 11485 rc = 0;
11486 break;
11487 case LPFC_CTX_TGT:
b0e83012 11488 if ((lpfc_cmd->rdata) && (lpfc_cmd->rdata->pnode) &&
495a714c 11489 (lpfc_cmd->rdata->pnode->nlp_sid == tgt_id))
dea3101e 11490 rc = 0;
11491 break;
dea3101e 11492 case LPFC_CTX_HOST:
11493 rc = 0;
11494 break;
11495 default:
11496 printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
cadbd4a5 11497 __func__, ctx_cmd);
dea3101e 11498 break;
11499 }
11500
11501 return rc;
11502}
11503
e59058c4 11504/**
3621a710 11505 * lpfc_sli_sum_iocb - Function to count the number of FCP iocbs pending
e59058c4
JS
11506 * @vport: Pointer to virtual port.
11507 * @tgt_id: SCSI ID of the target.
11508 * @lun_id: LUN ID of the scsi device.
11509 * @ctx_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11510 *
11511 * This function returns number of FCP commands pending for the vport.
11512 * When ctx_cmd == LPFC_CTX_LUN, the function returns number of FCP
11513 * commands pending on the vport associated with SCSI device specified
11514 * by tgt_id and lun_id parameters.
11515 * When ctx_cmd == LPFC_CTX_TGT, the function returns number of FCP
11516 * commands pending on the vport associated with SCSI target specified
11517 * by tgt_id parameter.
11518 * When ctx_cmd == LPFC_CTX_HOST, the function returns number of FCP
11519 * commands pending on the vport.
11520 * This function returns the number of iocbs which satisfy the filter.
11521 * This function is called without any lock held.
11522 **/
dea3101e 11523int
51ef4c26
JS
11524lpfc_sli_sum_iocb(struct lpfc_vport *vport, uint16_t tgt_id, uint64_t lun_id,
11525 lpfc_ctx_cmd ctx_cmd)
dea3101e 11526{
51ef4c26 11527 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC
11528 struct lpfc_iocbq *iocbq;
11529 int sum, i;
dea3101e 11530
31979008 11531 spin_lock_irq(&phba->hbalock);
0bd4ca25
JSEC
11532 for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
11533 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 11534
51ef4c26
JS
11535 if (lpfc_sli_validate_fcp_iocb (iocbq, vport, tgt_id, lun_id,
11536 ctx_cmd) == 0)
0bd4ca25 11537 sum++;
dea3101e 11538 }
31979008 11539 spin_unlock_irq(&phba->hbalock);
0bd4ca25 11540
dea3101e 11541 return sum;
11542}
11543
e59058c4 11544/**
3621a710 11545 * lpfc_sli_abort_fcp_cmpl - Completion handler function for aborted FCP IOCBs
e59058c4
JS
11546 * @phba: Pointer to HBA context object
11547 * @cmdiocb: Pointer to command iocb object.
11548 * @rspiocb: Pointer to response iocb object.
11549 *
11550 * This function is called when an aborted FCP iocb completes. This
11551 * function is called by the ring event handler with no lock held.
11552 * This function frees the iocb.
11553 **/
5eb95af0 11554void
2e0fef85
JS
11555lpfc_sli_abort_fcp_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
11556 struct lpfc_iocbq *rspiocb)
5eb95af0 11557{
cb69f7de 11558 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
8e668af5 11559 "3096 ABORT_XRI_CN completing on rpi x%x "
cb69f7de
JS
11560 "original iotag x%x, abort cmd iotag x%x "
11561 "status 0x%x, reason 0x%x\n",
11562 cmdiocb->iocb.un.acxri.abortContextTag,
11563 cmdiocb->iocb.un.acxri.abortIoTag,
11564 cmdiocb->iotag, rspiocb->iocb.ulpStatus,
11565 rspiocb->iocb.un.ulpWord[4]);
604a3e30 11566 lpfc_sli_release_iocbq(phba, cmdiocb);
5eb95af0
JSEC
11567 return;
11568}
11569
e59058c4 11570/**
3621a710 11571 * lpfc_sli_abort_iocb - issue abort for all commands on a host/target/LUN
e59058c4
JS
11572 * @vport: Pointer to virtual port.
11573 * @pring: Pointer to driver SLI ring object.
11574 * @tgt_id: SCSI ID of the target.
11575 * @lun_id: LUN ID of the scsi device.
11576 * @abort_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11577 *
11578 * This function sends an abort command for every SCSI command
11579 * associated with the given virtual port pending on the ring
11580 * filtered by lpfc_sli_validate_fcp_iocb function.
11581 * When abort_cmd == LPFC_CTX_LUN, the function sends abort only to the
11582 * FCP iocbs associated with lun specified by tgt_id and lun_id
11583 * parameters
11584 * When abort_cmd == LPFC_CTX_TGT, the function sends abort only to the
11585 * FCP iocbs associated with SCSI target specified by tgt_id parameter.
11586 * When abort_cmd == LPFC_CTX_HOST, the function sends abort to all
11587 * FCP iocbs associated with virtual port.
11588 * This function returns number of iocbs it failed to abort.
11589 * This function is called with no locks held.
11590 **/
dea3101e 11591int
51ef4c26
JS
11592lpfc_sli_abort_iocb(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
11593 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd abort_cmd)
dea3101e 11594{
51ef4c26 11595 struct lpfc_hba *phba = vport->phba;
0bd4ca25
JSEC
11596 struct lpfc_iocbq *iocbq;
11597 struct lpfc_iocbq *abtsiocb;
ecbb227e 11598 struct lpfc_sli_ring *pring_s4;
dea3101e 11599 IOCB_t *cmd = NULL;
dea3101e 11600 int errcnt = 0, ret_val = 0;
0bd4ca25 11601 int i;
dea3101e 11602
b0e83012
JS
11603 /* all I/Os are in process of being flushed */
11604 if (phba->hba_flag & HBA_FCP_IOQ_FLUSH)
11605 return errcnt;
11606
0bd4ca25
JSEC
11607 for (i = 1; i <= phba->sli.last_iotag; i++) {
11608 iocbq = phba->sli.iocbq_lookup[i];
dea3101e 11609
51ef4c26 11610 if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
2e0fef85 11611 abort_cmd) != 0)
dea3101e 11612 continue;
11613
afbd8d88
JS
11614 /*
11615 * If the iocbq is already being aborted, don't take a second
11616 * action, but do count it.
11617 */
11618 if (iocbq->iocb_flag & LPFC_DRIVER_ABORTED)
11619 continue;
11620
dea3101e 11621 /* issue ABTS for this IOCB based on iotag */
0bd4ca25 11622 abtsiocb = lpfc_sli_get_iocbq(phba);
dea3101e 11623 if (abtsiocb == NULL) {
11624 errcnt++;
11625 continue;
11626 }
dea3101e 11627
afbd8d88
JS
11628 /* indicate the IO is being aborted by the driver. */
11629 iocbq->iocb_flag |= LPFC_DRIVER_ABORTED;
11630
0bd4ca25 11631 cmd = &iocbq->iocb;
dea3101e 11632 abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
11633 abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
da0436e9
JS
11634 if (phba->sli_rev == LPFC_SLI_REV4)
11635 abtsiocb->iocb.un.acxri.abortIoTag = iocbq->sli4_xritag;
11636 else
11637 abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
dea3101e 11638 abtsiocb->iocb.ulpLe = 1;
11639 abtsiocb->iocb.ulpClass = cmd->ulpClass;
afbd8d88 11640 abtsiocb->vport = vport;
dea3101e 11641
5ffc266e 11642 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11643 abtsiocb->hba_wqidx = iocbq->hba_wqidx;
341af102
JS
11644 if (iocbq->iocb_flag & LPFC_IO_FCP)
11645 abtsiocb->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11646 if (iocbq->iocb_flag & LPFC_IO_FOF)
11647 abtsiocb->iocb_flag |= LPFC_IO_FOF;
5ffc266e 11648
2e0fef85 11649 if (lpfc_is_link_up(phba))
dea3101e 11650 abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
11651 else
11652 abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
11653
5eb95af0
JSEC
11654 /* Setup callback routine and issue the command. */
11655 abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
ecbb227e
JS
11656 if (phba->sli_rev == LPFC_SLI_REV4) {
11657 pring_s4 = lpfc_sli4_calc_ring(phba, iocbq);
11658 if (!pring_s4)
11659 continue;
11660 ret_val = lpfc_sli_issue_iocb(phba, pring_s4->ringno,
11661 abtsiocb, 0);
11662 } else
11663 ret_val = lpfc_sli_issue_iocb(phba, pring->ringno,
11664 abtsiocb, 0);
dea3101e 11665 if (ret_val == IOCB_ERROR) {
604a3e30 11666 lpfc_sli_release_iocbq(phba, abtsiocb);
dea3101e 11667 errcnt++;
11668 continue;
11669 }
11670 }
11671
11672 return errcnt;
11673}
11674
98912dda
JS
11675/**
11676 * lpfc_sli_abort_taskmgmt - issue abort for all commands on a host/target/LUN
11677 * @vport: Pointer to virtual port.
11678 * @pring: Pointer to driver SLI ring object.
11679 * @tgt_id: SCSI ID of the target.
11680 * @lun_id: LUN ID of the scsi device.
11681 * @taskmgmt_cmd: LPFC_CTX_LUN/LPFC_CTX_TGT/LPFC_CTX_HOST.
11682 *
11683 * This function sends an abort command for every SCSI command
11684 * associated with the given virtual port pending on the ring
11685 * filtered by lpfc_sli_validate_fcp_iocb function.
11686 * When taskmgmt_cmd == LPFC_CTX_LUN, the function sends abort only to the
11687 * FCP iocbs associated with lun specified by tgt_id and lun_id
11688 * parameters
11689 * When taskmgmt_cmd == LPFC_CTX_TGT, the function sends abort only to the
11690 * FCP iocbs associated with SCSI target specified by tgt_id parameter.
11691 * When taskmgmt_cmd == LPFC_CTX_HOST, the function sends abort to all
11692 * FCP iocbs associated with virtual port.
11693 * This function returns number of iocbs it aborted .
11694 * This function is called with no locks held right after a taskmgmt
11695 * command is sent.
11696 **/
11697int
11698lpfc_sli_abort_taskmgmt(struct lpfc_vport *vport, struct lpfc_sli_ring *pring,
11699 uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd cmd)
11700{
11701 struct lpfc_hba *phba = vport->phba;
c490850a 11702 struct lpfc_io_buf *lpfc_cmd;
98912dda 11703 struct lpfc_iocbq *abtsiocbq;
8c50d25c 11704 struct lpfc_nodelist *ndlp;
98912dda
JS
11705 struct lpfc_iocbq *iocbq;
11706 IOCB_t *icmd;
11707 int sum, i, ret_val;
11708 unsigned long iflags;
11709 struct lpfc_sli_ring *pring_s4;
98912dda 11710
59c68eaa 11711 spin_lock_irqsave(&phba->hbalock, iflags);
98912dda
JS
11712
11713 /* all I/Os are in process of being flushed */
11714 if (phba->hba_flag & HBA_FCP_IOQ_FLUSH) {
59c68eaa 11715 spin_unlock_irqrestore(&phba->hbalock, iflags);
98912dda
JS
11716 return 0;
11717 }
11718 sum = 0;
11719
11720 for (i = 1; i <= phba->sli.last_iotag; i++) {
11721 iocbq = phba->sli.iocbq_lookup[i];
11722
11723 if (lpfc_sli_validate_fcp_iocb(iocbq, vport, tgt_id, lun_id,
11724 cmd) != 0)
11725 continue;
11726
11727 /*
11728 * If the iocbq is already being aborted, don't take a second
11729 * action, but do count it.
11730 */
11731 if (iocbq->iocb_flag & LPFC_DRIVER_ABORTED)
11732 continue;
11733
11734 /* issue ABTS for this IOCB based on iotag */
11735 abtsiocbq = __lpfc_sli_get_iocbq(phba);
11736 if (abtsiocbq == NULL)
11737 continue;
11738
11739 icmd = &iocbq->iocb;
11740 abtsiocbq->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
11741 abtsiocbq->iocb.un.acxri.abortContextTag = icmd->ulpContext;
11742 if (phba->sli_rev == LPFC_SLI_REV4)
11743 abtsiocbq->iocb.un.acxri.abortIoTag =
11744 iocbq->sli4_xritag;
11745 else
11746 abtsiocbq->iocb.un.acxri.abortIoTag = icmd->ulpIoTag;
11747 abtsiocbq->iocb.ulpLe = 1;
11748 abtsiocbq->iocb.ulpClass = icmd->ulpClass;
11749 abtsiocbq->vport = vport;
11750
11751 /* ABTS WQE must go to the same WQ as the WQE to be aborted */
895427bd 11752 abtsiocbq->hba_wqidx = iocbq->hba_wqidx;
98912dda
JS
11753 if (iocbq->iocb_flag & LPFC_IO_FCP)
11754 abtsiocbq->iocb_flag |= LPFC_USE_FCPWQIDX;
9bd2bff5
JS
11755 if (iocbq->iocb_flag & LPFC_IO_FOF)
11756 abtsiocbq->iocb_flag |= LPFC_IO_FOF;
98912dda 11757
c490850a 11758 lpfc_cmd = container_of(iocbq, struct lpfc_io_buf, cur_iocbq);
8c50d25c
JS
11759 ndlp = lpfc_cmd->rdata->pnode;
11760
11761 if (lpfc_is_link_up(phba) &&
11762 (ndlp && ndlp->nlp_state == NLP_STE_MAPPED_NODE))
98912dda
JS
11763 abtsiocbq->iocb.ulpCommand = CMD_ABORT_XRI_CN;
11764 else
11765 abtsiocbq->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
11766
11767 /* Setup callback routine and issue the command. */
11768 abtsiocbq->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
11769
11770 /*
11771 * Indicate the IO is being aborted by the driver and set
11772 * the caller's flag into the aborted IO.
11773 */
11774 iocbq->iocb_flag |= LPFC_DRIVER_ABORTED;
11775
11776 if (phba->sli_rev == LPFC_SLI_REV4) {
59c68eaa
JS
11777 pring_s4 = lpfc_sli4_calc_ring(phba, abtsiocbq);
11778 if (!pring_s4)
895427bd 11779 continue;
98912dda 11780 /* Note: both hbalock and ring_lock must be set here */
59c68eaa 11781 spin_lock(&pring_s4->ring_lock);
98912dda
JS
11782 ret_val = __lpfc_sli_issue_iocb(phba, pring_s4->ringno,
11783 abtsiocbq, 0);
59c68eaa 11784 spin_unlock(&pring_s4->ring_lock);
98912dda
JS
11785 } else {
11786 ret_val = __lpfc_sli_issue_iocb(phba, pring->ringno,
11787 abtsiocbq, 0);
11788 }
11789
11790
11791 if (ret_val == IOCB_ERROR)
11792 __lpfc_sli_release_iocbq(phba, abtsiocbq);
11793 else
11794 sum++;
11795 }
59c68eaa 11796 spin_unlock_irqrestore(&phba->hbalock, iflags);
98912dda
JS
11797 return sum;
11798}
11799
e59058c4 11800/**
3621a710 11801 * lpfc_sli_wake_iocb_wait - lpfc_sli_issue_iocb_wait's completion handler
e59058c4
JS
11802 * @phba: Pointer to HBA context object.
11803 * @cmdiocbq: Pointer to command iocb.
11804 * @rspiocbq: Pointer to response iocb.
11805 *
11806 * This function is the completion handler for iocbs issued using
11807 * lpfc_sli_issue_iocb_wait function. This function is called by the
11808 * ring event handler function without any lock held. This function
11809 * can be called from both worker thread context and interrupt
11810 * context. This function also can be called from other thread which
11811 * cleans up the SLI layer objects.
11812 * This function copy the contents of the response iocb to the
11813 * response iocb memory object provided by the caller of
11814 * lpfc_sli_issue_iocb_wait and then wakes up the thread which
11815 * sleeps for the iocb completion.
11816 **/
68876920
JSEC
11817static void
11818lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
11819 struct lpfc_iocbq *cmdiocbq,
11820 struct lpfc_iocbq *rspiocbq)
dea3101e 11821{
68876920
JSEC
11822 wait_queue_head_t *pdone_q;
11823 unsigned long iflags;
c490850a 11824 struct lpfc_io_buf *lpfc_cmd;
dea3101e 11825
2e0fef85 11826 spin_lock_irqsave(&phba->hbalock, iflags);
5a0916b4
JS
11827 if (cmdiocbq->iocb_flag & LPFC_IO_WAKE_TMO) {
11828
11829 /*
11830 * A time out has occurred for the iocb. If a time out
11831 * completion handler has been supplied, call it. Otherwise,
11832 * just free the iocbq.
11833 */
11834
11835 spin_unlock_irqrestore(&phba->hbalock, iflags);
11836 cmdiocbq->iocb_cmpl = cmdiocbq->wait_iocb_cmpl;
11837 cmdiocbq->wait_iocb_cmpl = NULL;
11838 if (cmdiocbq->iocb_cmpl)
11839 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq, NULL);
11840 else
11841 lpfc_sli_release_iocbq(phba, cmdiocbq);
11842 return;
11843 }
11844
68876920
JSEC
11845 cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
11846 if (cmdiocbq->context2 && rspiocbq)
11847 memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
11848 &rspiocbq->iocb, sizeof(IOCB_t));
11849
0f65ff68
JS
11850 /* Set the exchange busy flag for task management commands */
11851 if ((cmdiocbq->iocb_flag & LPFC_IO_FCP) &&
11852 !(cmdiocbq->iocb_flag & LPFC_IO_LIBDFC)) {
c490850a 11853 lpfc_cmd = container_of(cmdiocbq, struct lpfc_io_buf,
0f65ff68
JS
11854 cur_iocbq);
11855 lpfc_cmd->exch_busy = rspiocbq->iocb_flag & LPFC_EXCHANGE_BUSY;
11856 }
11857
68876920 11858 pdone_q = cmdiocbq->context_un.wait_queue;
68876920
JSEC
11859 if (pdone_q)
11860 wake_up(pdone_q);
858c9f6c 11861 spin_unlock_irqrestore(&phba->hbalock, iflags);
dea3101e 11862 return;
11863}
11864
d11e31dd
JS
11865/**
11866 * lpfc_chk_iocb_flg - Test IOCB flag with lock held.
11867 * @phba: Pointer to HBA context object..
11868 * @piocbq: Pointer to command iocb.
11869 * @flag: Flag to test.
11870 *
11871 * This routine grabs the hbalock and then test the iocb_flag to
11872 * see if the passed in flag is set.
11873 * Returns:
11874 * 1 if flag is set.
11875 * 0 if flag is not set.
11876 **/
11877static int
11878lpfc_chk_iocb_flg(struct lpfc_hba *phba,
11879 struct lpfc_iocbq *piocbq, uint32_t flag)
11880{
11881 unsigned long iflags;
11882 int ret;
11883
11884 spin_lock_irqsave(&phba->hbalock, iflags);
11885 ret = piocbq->iocb_flag & flag;
11886 spin_unlock_irqrestore(&phba->hbalock, iflags);
11887 return ret;
11888
11889}
11890
e59058c4 11891/**
3621a710 11892 * lpfc_sli_issue_iocb_wait - Synchronous function to issue iocb commands
e59058c4
JS
11893 * @phba: Pointer to HBA context object..
11894 * @pring: Pointer to sli ring.
11895 * @piocb: Pointer to command iocb.
11896 * @prspiocbq: Pointer to response iocb.
11897 * @timeout: Timeout in number of seconds.
11898 *
11899 * This function issues the iocb to firmware and waits for the
5a0916b4
JS
11900 * iocb to complete. The iocb_cmpl field of the shall be used
11901 * to handle iocbs which time out. If the field is NULL, the
11902 * function shall free the iocbq structure. If more clean up is
11903 * needed, the caller is expected to provide a completion function
11904 * that will provide the needed clean up. If the iocb command is
11905 * not completed within timeout seconds, the function will either
11906 * free the iocbq structure (if iocb_cmpl == NULL) or execute the
11907 * completion function set in the iocb_cmpl field and then return
11908 * a status of IOCB_TIMEDOUT. The caller should not free the iocb
11909 * resources if this function returns IOCB_TIMEDOUT.
e59058c4
JS
11910 * The function waits for the iocb completion using an
11911 * non-interruptible wait.
11912 * This function will sleep while waiting for iocb completion.
11913 * So, this function should not be called from any context which
11914 * does not allow sleeping. Due to the same reason, this function
11915 * cannot be called with interrupt disabled.
11916 * This function assumes that the iocb completions occur while
11917 * this function sleep. So, this function cannot be called from
11918 * the thread which process iocb completion for this ring.
11919 * This function clears the iocb_flag of the iocb object before
11920 * issuing the iocb and the iocb completion handler sets this
11921 * flag and wakes this thread when the iocb completes.
11922 * The contents of the response iocb will be copied to prspiocbq
11923 * by the completion handler when the command completes.
11924 * This function returns IOCB_SUCCESS when success.
11925 * This function is called with no lock held.
11926 **/
dea3101e 11927int
2e0fef85 11928lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
da0436e9 11929 uint32_t ring_number,
2e0fef85
JS
11930 struct lpfc_iocbq *piocb,
11931 struct lpfc_iocbq *prspiocbq,
68876920 11932 uint32_t timeout)
dea3101e 11933{
7259f0d0 11934 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
68876920
JSEC
11935 long timeleft, timeout_req = 0;
11936 int retval = IOCB_SUCCESS;
875fbdfe 11937 uint32_t creg_val;
0e9bb8d7
JS
11938 struct lpfc_iocbq *iocb;
11939 int txq_cnt = 0;
11940 int txcmplq_cnt = 0;
895427bd 11941 struct lpfc_sli_ring *pring;
5a0916b4
JS
11942 unsigned long iflags;
11943 bool iocb_completed = true;
11944
895427bd
JS
11945 if (phba->sli_rev >= LPFC_SLI_REV4)
11946 pring = lpfc_sli4_calc_ring(phba, piocb);
11947 else
11948 pring = &phba->sli.sli3_ring[ring_number];
dea3101e 11949 /*
68876920
JSEC
11950 * If the caller has provided a response iocbq buffer, then context2
11951 * is NULL or its an error.
dea3101e 11952 */
68876920
JSEC
11953 if (prspiocbq) {
11954 if (piocb->context2)
11955 return IOCB_ERROR;
11956 piocb->context2 = prspiocbq;
dea3101e 11957 }
11958
5a0916b4 11959 piocb->wait_iocb_cmpl = piocb->iocb_cmpl;
68876920
JSEC
11960 piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
11961 piocb->context_un.wait_queue = &done_q;
5a0916b4 11962 piocb->iocb_flag &= ~(LPFC_IO_WAKE | LPFC_IO_WAKE_TMO);
dea3101e 11963
875fbdfe 11964 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
9940b97b
JS
11965 if (lpfc_readl(phba->HCregaddr, &creg_val))
11966 return IOCB_ERROR;
875fbdfe
JSEC
11967 creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
11968 writel(creg_val, phba->HCregaddr);
11969 readl(phba->HCregaddr); /* flush */
11970 }
11971
2a9bf3d0
JS
11972 retval = lpfc_sli_issue_iocb(phba, ring_number, piocb,
11973 SLI_IOCB_RET_IOCB);
68876920 11974 if (retval == IOCB_SUCCESS) {
256ec0d0 11975 timeout_req = msecs_to_jiffies(timeout * 1000);
68876920 11976 timeleft = wait_event_timeout(done_q,
d11e31dd 11977 lpfc_chk_iocb_flg(phba, piocb, LPFC_IO_WAKE),
68876920 11978 timeout_req);
5a0916b4
JS
11979 spin_lock_irqsave(&phba->hbalock, iflags);
11980 if (!(piocb->iocb_flag & LPFC_IO_WAKE)) {
11981
11982 /*
11983 * IOCB timed out. Inform the wake iocb wait
11984 * completion function and set local status
11985 */
dea3101e 11986
5a0916b4
JS
11987 iocb_completed = false;
11988 piocb->iocb_flag |= LPFC_IO_WAKE_TMO;
11989 }
11990 spin_unlock_irqrestore(&phba->hbalock, iflags);
11991 if (iocb_completed) {
7054a606 11992 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
e8b62011 11993 "0331 IOCB wake signaled\n");
53151bbb
JS
11994 /* Note: we are not indicating if the IOCB has a success
11995 * status or not - that's for the caller to check.
11996 * IOCB_SUCCESS means just that the command was sent and
11997 * completed. Not that it completed successfully.
11998 * */
7054a606 11999 } else if (timeleft == 0) {
68876920 12000 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS
12001 "0338 IOCB wait timeout error - no "
12002 "wake response Data x%x\n", timeout);
68876920 12003 retval = IOCB_TIMEDOUT;
7054a606 12004 } else {
68876920 12005 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e8b62011
JS
12006 "0330 IOCB wake NOT set, "
12007 "Data x%x x%lx\n",
68876920
JSEC
12008 timeout, (timeleft / jiffies));
12009 retval = IOCB_TIMEDOUT;
dea3101e 12010 }
2a9bf3d0 12011 } else if (retval == IOCB_BUSY) {
0e9bb8d7
JS
12012 if (phba->cfg_log_verbose & LOG_SLI) {
12013 list_for_each_entry(iocb, &pring->txq, list) {
12014 txq_cnt++;
12015 }
12016 list_for_each_entry(iocb, &pring->txcmplq, list) {
12017 txcmplq_cnt++;
12018 }
12019 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
12020 "2818 Max IOCBs %d txq cnt %d txcmplq cnt %d\n",
12021 phba->iocb_cnt, txq_cnt, txcmplq_cnt);
12022 }
2a9bf3d0 12023 return retval;
68876920
JSEC
12024 } else {
12025 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
d7c255b2 12026 "0332 IOCB wait issue failed, Data x%x\n",
e8b62011 12027 retval);
68876920 12028 retval = IOCB_ERROR;
dea3101e 12029 }
12030
875fbdfe 12031 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
9940b97b
JS
12032 if (lpfc_readl(phba->HCregaddr, &creg_val))
12033 return IOCB_ERROR;
875fbdfe
JSEC
12034 creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
12035 writel(creg_val, phba->HCregaddr);
12036 readl(phba->HCregaddr); /* flush */
12037 }
12038
68876920
JSEC
12039 if (prspiocbq)
12040 piocb->context2 = NULL;
12041
12042 piocb->context_un.wait_queue = NULL;
12043 piocb->iocb_cmpl = NULL;
dea3101e 12044 return retval;
12045}
68876920 12046
e59058c4 12047/**
3621a710 12048 * lpfc_sli_issue_mbox_wait - Synchronous function to issue mailbox
e59058c4
JS
12049 * @phba: Pointer to HBA context object.
12050 * @pmboxq: Pointer to driver mailbox object.
12051 * @timeout: Timeout in number of seconds.
12052 *
12053 * This function issues the mailbox to firmware and waits for the
12054 * mailbox command to complete. If the mailbox command is not
12055 * completed within timeout seconds, it returns MBX_TIMEOUT.
12056 * The function waits for the mailbox completion using an
12057 * interruptible wait. If the thread is woken up due to a
12058 * signal, MBX_TIMEOUT error is returned to the caller. Caller
12059 * should not free the mailbox resources, if this function returns
12060 * MBX_TIMEOUT.
12061 * This function will sleep while waiting for mailbox completion.
12062 * So, this function should not be called from any context which
12063 * does not allow sleeping. Due to the same reason, this function
12064 * cannot be called with interrupt disabled.
12065 * This function assumes that the mailbox completion occurs while
12066 * this function sleep. So, this function cannot be called from
12067 * the worker thread which processes mailbox completion.
12068 * This function is called in the context of HBA management
12069 * applications.
12070 * This function returns MBX_SUCCESS when successful.
12071 * This function is called with no lock held.
12072 **/
dea3101e 12073int
2e0fef85 12074lpfc_sli_issue_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq,
dea3101e 12075 uint32_t timeout)
12076{
e29d74f8 12077 struct completion mbox_done;
dea3101e 12078 int retval;
858c9f6c 12079 unsigned long flag;
dea3101e 12080
495a714c 12081 pmboxq->mbox_flag &= ~LPFC_MBX_WAKE;
dea3101e 12082 /* setup wake call as IOCB callback */
12083 pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
dea3101e 12084
e29d74f8
JS
12085 /* setup context3 field to pass wait_queue pointer to wake function */
12086 init_completion(&mbox_done);
12087 pmboxq->context3 = &mbox_done;
dea3101e 12088 /* now issue the command */
12089 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
dea3101e 12090 if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
e29d74f8
JS
12091 wait_for_completion_timeout(&mbox_done,
12092 msecs_to_jiffies(timeout * 1000));
7054a606 12093
858c9f6c 12094 spin_lock_irqsave(&phba->hbalock, flag);
e29d74f8 12095 pmboxq->context3 = NULL;
7054a606
JS
12096 /*
12097 * if LPFC_MBX_WAKE flag is set the mailbox is completed
12098 * else do not free the resources.
12099 */
d7c47992 12100 if (pmboxq->mbox_flag & LPFC_MBX_WAKE) {
dea3101e 12101 retval = MBX_SUCCESS;
d7c47992 12102 } else {
7054a606 12103 retval = MBX_TIMEOUT;
858c9f6c
JS
12104 pmboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
12105 }
12106 spin_unlock_irqrestore(&phba->hbalock, flag);
dea3101e 12107 }
dea3101e 12108 return retval;
12109}
12110
e59058c4 12111/**
3772a991 12112 * lpfc_sli_mbox_sys_shutdown - shutdown mailbox command sub-system
e59058c4
JS
12113 * @phba: Pointer to HBA context.
12114 *
3772a991
JS
12115 * This function is called to shutdown the driver's mailbox sub-system.
12116 * It first marks the mailbox sub-system is in a block state to prevent
12117 * the asynchronous mailbox command from issued off the pending mailbox
12118 * command queue. If the mailbox command sub-system shutdown is due to
12119 * HBA error conditions such as EEH or ERATT, this routine shall invoke
12120 * the mailbox sub-system flush routine to forcefully bring down the
12121 * mailbox sub-system. Otherwise, if it is due to normal condition (such
12122 * as with offline or HBA function reset), this routine will wait for the
12123 * outstanding mailbox command to complete before invoking the mailbox
12124 * sub-system flush routine to gracefully bring down mailbox sub-system.
e59058c4 12125 **/
3772a991 12126void
618a5230 12127lpfc_sli_mbox_sys_shutdown(struct lpfc_hba *phba, int mbx_action)
b4c02652 12128{
3772a991 12129 struct lpfc_sli *psli = &phba->sli;
3772a991 12130 unsigned long timeout;
b4c02652 12131
618a5230
JS
12132 if (mbx_action == LPFC_MBX_NO_WAIT) {
12133 /* delay 100ms for port state */
12134 msleep(100);
12135 lpfc_sli_mbox_sys_flush(phba);
12136 return;
12137 }
a183a15f 12138 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
d7069f09 12139
523128e5
JS
12140 /* Disable softirqs, including timers from obtaining phba->hbalock */
12141 local_bh_disable();
12142
3772a991
JS
12143 spin_lock_irq(&phba->hbalock);
12144 psli->sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
b4c02652 12145
3772a991 12146 if (psli->sli_flag & LPFC_SLI_ACTIVE) {
3772a991
JS
12147 /* Determine how long we might wait for the active mailbox
12148 * command to be gracefully completed by firmware.
12149 */
a183a15f
JS
12150 if (phba->sli.mbox_active)
12151 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
12152 phba->sli.mbox_active) *
12153 1000) + jiffies;
12154 spin_unlock_irq(&phba->hbalock);
12155
523128e5
JS
12156 /* Enable softirqs again, done with phba->hbalock */
12157 local_bh_enable();
12158
3772a991
JS
12159 while (phba->sli.mbox_active) {
12160 /* Check active mailbox complete status every 2ms */
12161 msleep(2);
12162 if (time_after(jiffies, timeout))
12163 /* Timeout, let the mailbox flush routine to
12164 * forcefully release active mailbox command
12165 */
12166 break;
12167 }
523128e5 12168 } else {
d7069f09
JS
12169 spin_unlock_irq(&phba->hbalock);
12170
523128e5
JS
12171 /* Enable softirqs again, done with phba->hbalock */
12172 local_bh_enable();
12173 }
12174
3772a991
JS
12175 lpfc_sli_mbox_sys_flush(phba);
12176}
ed957684 12177
3772a991
JS
12178/**
12179 * lpfc_sli_eratt_read - read sli-3 error attention events
12180 * @phba: Pointer to HBA context.
12181 *
12182 * This function is called to read the SLI3 device error attention registers
12183 * for possible error attention events. The caller must hold the hostlock
12184 * with spin_lock_irq().
12185 *
25985edc 12186 * This function returns 1 when there is Error Attention in the Host Attention
3772a991
JS
12187 * Register and returns 0 otherwise.
12188 **/
12189static int
12190lpfc_sli_eratt_read(struct lpfc_hba *phba)
12191{
12192 uint32_t ha_copy;
b4c02652 12193
3772a991 12194 /* Read chip Host Attention (HA) register */
9940b97b
JS
12195 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12196 goto unplug_err;
12197
3772a991
JS
12198 if (ha_copy & HA_ERATT) {
12199 /* Read host status register to retrieve error event */
9940b97b
JS
12200 if (lpfc_sli_read_hs(phba))
12201 goto unplug_err;
b4c02652 12202
3772a991
JS
12203 /* Check if there is a deferred error condition is active */
12204 if ((HS_FFER1 & phba->work_hs) &&
12205 ((HS_FFER2 | HS_FFER3 | HS_FFER4 | HS_FFER5 |
dcf2a4e0 12206 HS_FFER6 | HS_FFER7 | HS_FFER8) & phba->work_hs)) {
3772a991 12207 phba->hba_flag |= DEFER_ERATT;
3772a991
JS
12208 /* Clear all interrupt enable conditions */
12209 writel(0, phba->HCregaddr);
12210 readl(phba->HCregaddr);
12211 }
12212
12213 /* Set the driver HA work bitmap */
3772a991
JS
12214 phba->work_ha |= HA_ERATT;
12215 /* Indicate polling handles this ERATT */
12216 phba->hba_flag |= HBA_ERATT_HANDLED;
3772a991
JS
12217 return 1;
12218 }
12219 return 0;
9940b97b
JS
12220
12221unplug_err:
12222 /* Set the driver HS work bitmap */
12223 phba->work_hs |= UNPLUG_ERR;
12224 /* Set the driver HA work bitmap */
12225 phba->work_ha |= HA_ERATT;
12226 /* Indicate polling handles this ERATT */
12227 phba->hba_flag |= HBA_ERATT_HANDLED;
12228 return 1;
b4c02652
JS
12229}
12230
da0436e9
JS
12231/**
12232 * lpfc_sli4_eratt_read - read sli-4 error attention events
12233 * @phba: Pointer to HBA context.
12234 *
12235 * This function is called to read the SLI4 device error attention registers
12236 * for possible error attention events. The caller must hold the hostlock
12237 * with spin_lock_irq().
12238 *
25985edc 12239 * This function returns 1 when there is Error Attention in the Host Attention
da0436e9
JS
12240 * Register and returns 0 otherwise.
12241 **/
12242static int
12243lpfc_sli4_eratt_read(struct lpfc_hba *phba)
12244{
12245 uint32_t uerr_sta_hi, uerr_sta_lo;
2fcee4bf
JS
12246 uint32_t if_type, portsmphr;
12247 struct lpfc_register portstat_reg;
da0436e9 12248
2fcee4bf
JS
12249 /*
12250 * For now, use the SLI4 device internal unrecoverable error
da0436e9
JS
12251 * registers for error attention. This can be changed later.
12252 */
2fcee4bf
JS
12253 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
12254 switch (if_type) {
12255 case LPFC_SLI_INTF_IF_TYPE_0:
9940b97b
JS
12256 if (lpfc_readl(phba->sli4_hba.u.if_type0.UERRLOregaddr,
12257 &uerr_sta_lo) ||
12258 lpfc_readl(phba->sli4_hba.u.if_type0.UERRHIregaddr,
12259 &uerr_sta_hi)) {
12260 phba->work_hs |= UNPLUG_ERR;
12261 phba->work_ha |= HA_ERATT;
12262 phba->hba_flag |= HBA_ERATT_HANDLED;
12263 return 1;
12264 }
2fcee4bf
JS
12265 if ((~phba->sli4_hba.ue_mask_lo & uerr_sta_lo) ||
12266 (~phba->sli4_hba.ue_mask_hi & uerr_sta_hi)) {
12267 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12268 "1423 HBA Unrecoverable error: "
12269 "uerr_lo_reg=0x%x, uerr_hi_reg=0x%x, "
12270 "ue_mask_lo_reg=0x%x, "
12271 "ue_mask_hi_reg=0x%x\n",
12272 uerr_sta_lo, uerr_sta_hi,
12273 phba->sli4_hba.ue_mask_lo,
12274 phba->sli4_hba.ue_mask_hi);
12275 phba->work_status[0] = uerr_sta_lo;
12276 phba->work_status[1] = uerr_sta_hi;
12277 phba->work_ha |= HA_ERATT;
12278 phba->hba_flag |= HBA_ERATT_HANDLED;
12279 return 1;
12280 }
12281 break;
12282 case LPFC_SLI_INTF_IF_TYPE_2:
27d6ac0a 12283 case LPFC_SLI_INTF_IF_TYPE_6:
9940b97b
JS
12284 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
12285 &portstat_reg.word0) ||
12286 lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
12287 &portsmphr)){
12288 phba->work_hs |= UNPLUG_ERR;
12289 phba->work_ha |= HA_ERATT;
12290 phba->hba_flag |= HBA_ERATT_HANDLED;
12291 return 1;
12292 }
2fcee4bf
JS
12293 if (bf_get(lpfc_sliport_status_err, &portstat_reg)) {
12294 phba->work_status[0] =
12295 readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
12296 phba->work_status[1] =
12297 readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
12298 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2e90f4b5 12299 "2885 Port Status Event: "
2fcee4bf
JS
12300 "port status reg 0x%x, "
12301 "port smphr reg 0x%x, "
12302 "error 1=0x%x, error 2=0x%x\n",
12303 portstat_reg.word0,
12304 portsmphr,
12305 phba->work_status[0],
12306 phba->work_status[1]);
12307 phba->work_ha |= HA_ERATT;
12308 phba->hba_flag |= HBA_ERATT_HANDLED;
12309 return 1;
12310 }
12311 break;
12312 case LPFC_SLI_INTF_IF_TYPE_1:
12313 default:
a747c9ce 12314 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2fcee4bf
JS
12315 "2886 HBA Error Attention on unsupported "
12316 "if type %d.", if_type);
a747c9ce 12317 return 1;
da0436e9 12318 }
2fcee4bf 12319
da0436e9
JS
12320 return 0;
12321}
12322
e59058c4 12323/**
3621a710 12324 * lpfc_sli_check_eratt - check error attention events
9399627f
JS
12325 * @phba: Pointer to HBA context.
12326 *
3772a991 12327 * This function is called from timer soft interrupt context to check HBA's
9399627f
JS
12328 * error attention register bit for error attention events.
12329 *
25985edc 12330 * This function returns 1 when there is Error Attention in the Host Attention
9399627f
JS
12331 * Register and returns 0 otherwise.
12332 **/
12333int
12334lpfc_sli_check_eratt(struct lpfc_hba *phba)
12335{
12336 uint32_t ha_copy;
12337
12338 /* If somebody is waiting to handle an eratt, don't process it
12339 * here. The brdkill function will do this.
12340 */
12341 if (phba->link_flag & LS_IGNORE_ERATT)
12342 return 0;
12343
12344 /* Check if interrupt handler handles this ERATT */
12345 spin_lock_irq(&phba->hbalock);
12346 if (phba->hba_flag & HBA_ERATT_HANDLED) {
12347 /* Interrupt handler has handled ERATT */
12348 spin_unlock_irq(&phba->hbalock);
12349 return 0;
12350 }
12351
a257bf90
JS
12352 /*
12353 * If there is deferred error attention, do not check for error
12354 * attention
12355 */
12356 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
12357 spin_unlock_irq(&phba->hbalock);
12358 return 0;
12359 }
12360
3772a991
JS
12361 /* If PCI channel is offline, don't process it */
12362 if (unlikely(pci_channel_offline(phba->pcidev))) {
9399627f 12363 spin_unlock_irq(&phba->hbalock);
3772a991
JS
12364 return 0;
12365 }
12366
12367 switch (phba->sli_rev) {
12368 case LPFC_SLI_REV2:
12369 case LPFC_SLI_REV3:
12370 /* Read chip Host Attention (HA) register */
12371 ha_copy = lpfc_sli_eratt_read(phba);
12372 break;
da0436e9 12373 case LPFC_SLI_REV4:
2fcee4bf 12374 /* Read device Uncoverable Error (UERR) registers */
da0436e9
JS
12375 ha_copy = lpfc_sli4_eratt_read(phba);
12376 break;
3772a991
JS
12377 default:
12378 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12379 "0299 Invalid SLI revision (%d)\n",
12380 phba->sli_rev);
12381 ha_copy = 0;
12382 break;
9399627f
JS
12383 }
12384 spin_unlock_irq(&phba->hbalock);
3772a991
JS
12385
12386 return ha_copy;
12387}
12388
12389/**
12390 * lpfc_intr_state_check - Check device state for interrupt handling
12391 * @phba: Pointer to HBA context.
12392 *
12393 * This inline routine checks whether a device or its PCI slot is in a state
12394 * that the interrupt should be handled.
12395 *
12396 * This function returns 0 if the device or the PCI slot is in a state that
12397 * interrupt should be handled, otherwise -EIO.
12398 */
12399static inline int
12400lpfc_intr_state_check(struct lpfc_hba *phba)
12401{
12402 /* If the pci channel is offline, ignore all the interrupts */
12403 if (unlikely(pci_channel_offline(phba->pcidev)))
12404 return -EIO;
12405
12406 /* Update device level interrupt statistics */
12407 phba->sli.slistat.sli_intr++;
12408
12409 /* Ignore all interrupts during initialization. */
12410 if (unlikely(phba->link_state < LPFC_LINK_DOWN))
12411 return -EIO;
12412
9399627f
JS
12413 return 0;
12414}
12415
12416/**
3772a991 12417 * lpfc_sli_sp_intr_handler - Slow-path interrupt handler to SLI-3 device
e59058c4
JS
12418 * @irq: Interrupt number.
12419 * @dev_id: The device context pointer.
12420 *
9399627f 12421 * This function is directly called from the PCI layer as an interrupt
3772a991
JS
12422 * service routine when device with SLI-3 interface spec is enabled with
12423 * MSI-X multi-message interrupt mode and there are slow-path events in
12424 * the HBA. However, when the device is enabled with either MSI or Pin-IRQ
12425 * interrupt mode, this function is called as part of the device-level
12426 * interrupt handler. When the PCI slot is in error recovery or the HBA
12427 * is undergoing initialization, the interrupt handler will not process
12428 * the interrupt. The link attention and ELS ring attention events are
12429 * handled by the worker thread. The interrupt handler signals the worker
12430 * thread and returns for these events. This function is called without
12431 * any lock held. It gets the hbalock to access and update SLI data
9399627f
JS
12432 * structures.
12433 *
12434 * This function returns IRQ_HANDLED when interrupt is handled else it
12435 * returns IRQ_NONE.
e59058c4 12436 **/
dea3101e 12437irqreturn_t
3772a991 12438lpfc_sli_sp_intr_handler(int irq, void *dev_id)
dea3101e 12439{
2e0fef85 12440 struct lpfc_hba *phba;
a747c9ce 12441 uint32_t ha_copy, hc_copy;
dea3101e 12442 uint32_t work_ha_copy;
12443 unsigned long status;
5b75da2f 12444 unsigned long iflag;
dea3101e 12445 uint32_t control;
12446
92d7f7b0 12447 MAILBOX_t *mbox, *pmbox;
858c9f6c
JS
12448 struct lpfc_vport *vport;
12449 struct lpfc_nodelist *ndlp;
12450 struct lpfc_dmabuf *mp;
92d7f7b0
JS
12451 LPFC_MBOXQ_t *pmb;
12452 int rc;
12453
dea3101e 12454 /*
12455 * Get the driver's phba structure from the dev_id and
12456 * assume the HBA is not interrupting.
12457 */
9399627f 12458 phba = (struct lpfc_hba *)dev_id;
dea3101e 12459
12460 if (unlikely(!phba))
12461 return IRQ_NONE;
12462
dea3101e 12463 /*
9399627f
JS
12464 * Stuff needs to be attented to when this function is invoked as an
12465 * individual interrupt handler in MSI-X multi-message interrupt mode
dea3101e 12466 */
9399627f 12467 if (phba->intr_type == MSIX) {
3772a991
JS
12468 /* Check device state for handling interrupt */
12469 if (lpfc_intr_state_check(phba))
9399627f
JS
12470 return IRQ_NONE;
12471 /* Need to read HA REG for slow-path events */
5b75da2f 12472 spin_lock_irqsave(&phba->hbalock, iflag);
9940b97b
JS
12473 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12474 goto unplug_error;
9399627f
JS
12475 /* If somebody is waiting to handle an eratt don't process it
12476 * here. The brdkill function will do this.
12477 */
12478 if (phba->link_flag & LS_IGNORE_ERATT)
12479 ha_copy &= ~HA_ERATT;
12480 /* Check the need for handling ERATT in interrupt handler */
12481 if (ha_copy & HA_ERATT) {
12482 if (phba->hba_flag & HBA_ERATT_HANDLED)
12483 /* ERATT polling has handled ERATT */
12484 ha_copy &= ~HA_ERATT;
12485 else
12486 /* Indicate interrupt handler handles ERATT */
12487 phba->hba_flag |= HBA_ERATT_HANDLED;
12488 }
a257bf90
JS
12489
12490 /*
12491 * If there is deferred error attention, do not check for any
12492 * interrupt.
12493 */
12494 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
3772a991 12495 spin_unlock_irqrestore(&phba->hbalock, iflag);
a257bf90
JS
12496 return IRQ_NONE;
12497 }
12498
9399627f 12499 /* Clear up only attention source related to slow-path */
9940b97b
JS
12500 if (lpfc_readl(phba->HCregaddr, &hc_copy))
12501 goto unplug_error;
12502
a747c9ce
JS
12503 writel(hc_copy & ~(HC_MBINT_ENA | HC_R2INT_ENA |
12504 HC_LAINT_ENA | HC_ERINT_ENA),
12505 phba->HCregaddr);
9399627f
JS
12506 writel((ha_copy & (HA_MBATT | HA_R2_CLR_MSK)),
12507 phba->HAregaddr);
a747c9ce 12508 writel(hc_copy, phba->HCregaddr);
9399627f 12509 readl(phba->HAregaddr); /* flush */
5b75da2f 12510 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f
JS
12511 } else
12512 ha_copy = phba->ha_copy;
dea3101e 12513
dea3101e 12514 work_ha_copy = ha_copy & phba->work_ha_mask;
12515
9399627f 12516 if (work_ha_copy) {
dea3101e 12517 if (work_ha_copy & HA_LATT) {
12518 if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
12519 /*
12520 * Turn off Link Attention interrupts
12521 * until CLEAR_LA done
12522 */
5b75da2f 12523 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 12524 phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
9940b97b
JS
12525 if (lpfc_readl(phba->HCregaddr, &control))
12526 goto unplug_error;
dea3101e 12527 control &= ~HC_LAINT_ENA;
12528 writel(control, phba->HCregaddr);
12529 readl(phba->HCregaddr); /* flush */
5b75da2f 12530 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 12531 }
12532 else
12533 work_ha_copy &= ~HA_LATT;
12534 }
12535
9399627f 12536 if (work_ha_copy & ~(HA_ERATT | HA_MBATT | HA_LATT)) {
858c9f6c
JS
12537 /*
12538 * Turn off Slow Rings interrupts, LPFC_ELS_RING is
12539 * the only slow ring.
12540 */
12541 status = (work_ha_copy &
12542 (HA_RXMASK << (4*LPFC_ELS_RING)));
12543 status >>= (4*LPFC_ELS_RING);
12544 if (status & HA_RXMASK) {
5b75da2f 12545 spin_lock_irqsave(&phba->hbalock, iflag);
9940b97b
JS
12546 if (lpfc_readl(phba->HCregaddr, &control))
12547 goto unplug_error;
a58cbd52
JS
12548
12549 lpfc_debugfs_slow_ring_trc(phba,
12550 "ISR slow ring: ctl:x%x stat:x%x isrcnt:x%x",
12551 control, status,
12552 (uint32_t)phba->sli.slistat.sli_intr);
12553
858c9f6c 12554 if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
a58cbd52
JS
12555 lpfc_debugfs_slow_ring_trc(phba,
12556 "ISR Disable ring:"
12557 "pwork:x%x hawork:x%x wait:x%x",
12558 phba->work_ha, work_ha_copy,
12559 (uint32_t)((unsigned long)
5e9d9b82 12560 &phba->work_waitq));
a58cbd52 12561
858c9f6c
JS
12562 control &=
12563 ~(HC_R0INT_ENA << LPFC_ELS_RING);
dea3101e 12564 writel(control, phba->HCregaddr);
12565 readl(phba->HCregaddr); /* flush */
dea3101e 12566 }
a58cbd52
JS
12567 else {
12568 lpfc_debugfs_slow_ring_trc(phba,
12569 "ISR slow ring: pwork:"
12570 "x%x hawork:x%x wait:x%x",
12571 phba->work_ha, work_ha_copy,
12572 (uint32_t)((unsigned long)
5e9d9b82 12573 &phba->work_waitq));
a58cbd52 12574 }
5b75da2f 12575 spin_unlock_irqrestore(&phba->hbalock, iflag);
dea3101e 12576 }
12577 }
5b75da2f 12578 spin_lock_irqsave(&phba->hbalock, iflag);
a257bf90 12579 if (work_ha_copy & HA_ERATT) {
9940b97b
JS
12580 if (lpfc_sli_read_hs(phba))
12581 goto unplug_error;
a257bf90
JS
12582 /*
12583 * Check if there is a deferred error condition
12584 * is active
12585 */
12586 if ((HS_FFER1 & phba->work_hs) &&
12587 ((HS_FFER2 | HS_FFER3 | HS_FFER4 | HS_FFER5 |
dcf2a4e0
JS
12588 HS_FFER6 | HS_FFER7 | HS_FFER8) &
12589 phba->work_hs)) {
a257bf90
JS
12590 phba->hba_flag |= DEFER_ERATT;
12591 /* Clear all interrupt enable conditions */
12592 writel(0, phba->HCregaddr);
12593 readl(phba->HCregaddr);
12594 }
12595 }
12596
9399627f 12597 if ((work_ha_copy & HA_MBATT) && (phba->sli.mbox_active)) {
92d7f7b0 12598 pmb = phba->sli.mbox_active;
04c68496 12599 pmbox = &pmb->u.mb;
34b02dcd 12600 mbox = phba->mbox;
858c9f6c 12601 vport = pmb->vport;
92d7f7b0
JS
12602
12603 /* First check out the status word */
12604 lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof(uint32_t));
12605 if (pmbox->mbxOwner != OWN_HOST) {
5b75da2f 12606 spin_unlock_irqrestore(&phba->hbalock, iflag);
92d7f7b0
JS
12607 /*
12608 * Stray Mailbox Interrupt, mbxCommand <cmd>
12609 * mbxStatus <status>
12610 */
09372820 12611 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
92d7f7b0 12612 LOG_SLI,
e8b62011 12613 "(%d):0304 Stray Mailbox "
92d7f7b0
JS
12614 "Interrupt mbxCommand x%x "
12615 "mbxStatus x%x\n",
e8b62011 12616 (vport ? vport->vpi : 0),
92d7f7b0
JS
12617 pmbox->mbxCommand,
12618 pmbox->mbxStatus);
09372820
JS
12619 /* clear mailbox attention bit */
12620 work_ha_copy &= ~HA_MBATT;
12621 } else {
97eab634 12622 phba->sli.mbox_active = NULL;
5b75da2f 12623 spin_unlock_irqrestore(&phba->hbalock, iflag);
09372820
JS
12624 phba->last_completion_time = jiffies;
12625 del_timer(&phba->sli.mbox_tmo);
09372820
JS
12626 if (pmb->mbox_cmpl) {
12627 lpfc_sli_pcimem_bcopy(mbox, pmbox,
12628 MAILBOX_CMD_SIZE);
7a470277 12629 if (pmb->out_ext_byte_len &&
3e1f0718 12630 pmb->ctx_buf)
7a470277
JS
12631 lpfc_sli_pcimem_bcopy(
12632 phba->mbox_ext,
3e1f0718 12633 pmb->ctx_buf,
7a470277 12634 pmb->out_ext_byte_len);
09372820
JS
12635 }
12636 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
12637 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
12638
12639 lpfc_debugfs_disc_trc(vport,
12640 LPFC_DISC_TRC_MBOX_VPORT,
12641 "MBOX dflt rpi: : "
12642 "status:x%x rpi:x%x",
12643 (uint32_t)pmbox->mbxStatus,
12644 pmbox->un.varWords[0], 0);
12645
12646 if (!pmbox->mbxStatus) {
12647 mp = (struct lpfc_dmabuf *)
3e1f0718 12648 (pmb->ctx_buf);
09372820 12649 ndlp = (struct lpfc_nodelist *)
3e1f0718 12650 pmb->ctx_ndlp;
09372820
JS
12651
12652 /* Reg_LOGIN of dflt RPI was
12653 * successful. new lets get
12654 * rid of the RPI using the
12655 * same mbox buffer.
12656 */
12657 lpfc_unreg_login(phba,
12658 vport->vpi,
12659 pmbox->un.varWords[0],
12660 pmb);
12661 pmb->mbox_cmpl =
12662 lpfc_mbx_cmpl_dflt_rpi;
3e1f0718
JS
12663 pmb->ctx_buf = mp;
12664 pmb->ctx_ndlp = ndlp;
09372820 12665 pmb->vport = vport;
58da1ffb
JS
12666 rc = lpfc_sli_issue_mbox(phba,
12667 pmb,
12668 MBX_NOWAIT);
12669 if (rc != MBX_BUSY)
12670 lpfc_printf_log(phba,
12671 KERN_ERR,
12672 LOG_MBOX | LOG_SLI,
d7c255b2 12673 "0350 rc should have"
6a9c52cf 12674 "been MBX_BUSY\n");
3772a991
JS
12675 if (rc != MBX_NOT_FINISHED)
12676 goto send_current_mbox;
09372820 12677 }
858c9f6c 12678 }
5b75da2f
JS
12679 spin_lock_irqsave(
12680 &phba->pport->work_port_lock,
12681 iflag);
09372820
JS
12682 phba->pport->work_port_events &=
12683 ~WORKER_MBOX_TMO;
5b75da2f
JS
12684 spin_unlock_irqrestore(
12685 &phba->pport->work_port_lock,
12686 iflag);
09372820 12687 lpfc_mbox_cmpl_put(phba, pmb);
858c9f6c 12688 }
97eab634 12689 } else
5b75da2f 12690 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f 12691
92d7f7b0
JS
12692 if ((work_ha_copy & HA_MBATT) &&
12693 (phba->sli.mbox_active == NULL)) {
858c9f6c 12694send_current_mbox:
92d7f7b0 12695 /* Process next mailbox command if there is one */
58da1ffb
JS
12696 do {
12697 rc = lpfc_sli_issue_mbox(phba, NULL,
12698 MBX_NOWAIT);
12699 } while (rc == MBX_NOT_FINISHED);
12700 if (rc != MBX_SUCCESS)
12701 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
12702 LOG_SLI, "0349 rc should be "
6a9c52cf 12703 "MBX_SUCCESS\n");
92d7f7b0
JS
12704 }
12705
5b75da2f 12706 spin_lock_irqsave(&phba->hbalock, iflag);
dea3101e 12707 phba->work_ha |= work_ha_copy;
5b75da2f 12708 spin_unlock_irqrestore(&phba->hbalock, iflag);
5e9d9b82 12709 lpfc_worker_wake_up(phba);
dea3101e 12710 }
9399627f 12711 return IRQ_HANDLED;
9940b97b
JS
12712unplug_error:
12713 spin_unlock_irqrestore(&phba->hbalock, iflag);
12714 return IRQ_HANDLED;
dea3101e 12715
3772a991 12716} /* lpfc_sli_sp_intr_handler */
9399627f
JS
12717
12718/**
3772a991 12719 * lpfc_sli_fp_intr_handler - Fast-path interrupt handler to SLI-3 device.
9399627f
JS
12720 * @irq: Interrupt number.
12721 * @dev_id: The device context pointer.
12722 *
12723 * This function is directly called from the PCI layer as an interrupt
3772a991
JS
12724 * service routine when device with SLI-3 interface spec is enabled with
12725 * MSI-X multi-message interrupt mode and there is a fast-path FCP IOCB
12726 * ring event in the HBA. However, when the device is enabled with either
12727 * MSI or Pin-IRQ interrupt mode, this function is called as part of the
12728 * device-level interrupt handler. When the PCI slot is in error recovery
12729 * or the HBA is undergoing initialization, the interrupt handler will not
12730 * process the interrupt. The SCSI FCP fast-path ring event are handled in
12731 * the intrrupt context. This function is called without any lock held.
12732 * It gets the hbalock to access and update SLI data structures.
9399627f
JS
12733 *
12734 * This function returns IRQ_HANDLED when interrupt is handled else it
12735 * returns IRQ_NONE.
12736 **/
12737irqreturn_t
3772a991 12738lpfc_sli_fp_intr_handler(int irq, void *dev_id)
9399627f
JS
12739{
12740 struct lpfc_hba *phba;
12741 uint32_t ha_copy;
12742 unsigned long status;
5b75da2f 12743 unsigned long iflag;
895427bd 12744 struct lpfc_sli_ring *pring;
9399627f
JS
12745
12746 /* Get the driver's phba structure from the dev_id and
12747 * assume the HBA is not interrupting.
12748 */
12749 phba = (struct lpfc_hba *) dev_id;
12750
12751 if (unlikely(!phba))
12752 return IRQ_NONE;
12753
12754 /*
12755 * Stuff needs to be attented to when this function is invoked as an
12756 * individual interrupt handler in MSI-X multi-message interrupt mode
12757 */
12758 if (phba->intr_type == MSIX) {
3772a991
JS
12759 /* Check device state for handling interrupt */
12760 if (lpfc_intr_state_check(phba))
9399627f
JS
12761 return IRQ_NONE;
12762 /* Need to read HA REG for FCP ring and other ring events */
9940b97b
JS
12763 if (lpfc_readl(phba->HAregaddr, &ha_copy))
12764 return IRQ_HANDLED;
9399627f 12765 /* Clear up only attention source related to fast-path */
5b75da2f 12766 spin_lock_irqsave(&phba->hbalock, iflag);
a257bf90
JS
12767 /*
12768 * If there is deferred error attention, do not check for
12769 * any interrupt.
12770 */
12771 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
3772a991 12772 spin_unlock_irqrestore(&phba->hbalock, iflag);
a257bf90
JS
12773 return IRQ_NONE;
12774 }
9399627f
JS
12775 writel((ha_copy & (HA_R0_CLR_MSK | HA_R1_CLR_MSK)),
12776 phba->HAregaddr);
12777 readl(phba->HAregaddr); /* flush */
5b75da2f 12778 spin_unlock_irqrestore(&phba->hbalock, iflag);
9399627f
JS
12779 } else
12780 ha_copy = phba->ha_copy;
dea3101e 12781
12782 /*
9399627f 12783 * Process all events on FCP ring. Take the optimized path for FCP IO.
dea3101e 12784 */
9399627f
JS
12785 ha_copy &= ~(phba->work_ha_mask);
12786
12787 status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
dea3101e 12788 status >>= (4*LPFC_FCP_RING);
895427bd 12789 pring = &phba->sli.sli3_ring[LPFC_FCP_RING];
858c9f6c 12790 if (status & HA_RXMASK)
895427bd 12791 lpfc_sli_handle_fast_ring_event(phba, pring, status);
a4bc3379
JS
12792
12793 if (phba->cfg_multi_ring_support == 2) {
12794 /*
9399627f
JS
12795 * Process all events on extra ring. Take the optimized path
12796 * for extra ring IO.
a4bc3379 12797 */
9399627f 12798 status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
a4bc3379 12799 status >>= (4*LPFC_EXTRA_RING);
858c9f6c 12800 if (status & HA_RXMASK) {
a4bc3379 12801 lpfc_sli_handle_fast_ring_event(phba,
895427bd 12802 &phba->sli.sli3_ring[LPFC_EXTRA_RING],
a4bc3379
JS
12803 status);
12804 }
12805 }
dea3101e 12806 return IRQ_HANDLED;
3772a991 12807} /* lpfc_sli_fp_intr_handler */
9399627f
JS
12808
12809/**
3772a991 12810 * lpfc_sli_intr_handler - Device-level interrupt handler to SLI-3 device
9399627f
JS
12811 * @irq: Interrupt number.
12812 * @dev_id: The device context pointer.
12813 *
3772a991
JS
12814 * This function is the HBA device-level interrupt handler to device with
12815 * SLI-3 interface spec, called from the PCI layer when either MSI or
12816 * Pin-IRQ interrupt mode is enabled and there is an event in the HBA which
12817 * requires driver attention. This function invokes the slow-path interrupt
12818 * attention handling function and fast-path interrupt attention handling
12819 * function in turn to process the relevant HBA attention events. This
12820 * function is called without any lock held. It gets the hbalock to access
12821 * and update SLI data structures.
9399627f
JS
12822 *
12823 * This function returns IRQ_HANDLED when interrupt is handled, else it
12824 * returns IRQ_NONE.
12825 **/
12826irqreturn_t
3772a991 12827lpfc_sli_intr_handler(int irq, void *dev_id)
9399627f
JS
12828{
12829 struct lpfc_hba *phba;
12830 irqreturn_t sp_irq_rc, fp_irq_rc;
12831 unsigned long status1, status2;
a747c9ce 12832 uint32_t hc_copy;
9399627f
JS
12833
12834 /*
12835 * Get the driver's phba structure from the dev_id and
12836 * assume the HBA is not interrupting.
12837 */
12838 phba = (struct lpfc_hba *) dev_id;
12839
12840 if (unlikely(!phba))
12841 return IRQ_NONE;
12842
3772a991
JS
12843 /* Check device state for handling interrupt */
12844 if (lpfc_intr_state_check(phba))
9399627f
JS
12845 return IRQ_NONE;
12846
12847 spin_lock(&phba->hbalock);
9940b97b
JS
12848 if (lpfc_readl(phba->HAregaddr, &phba->ha_copy)) {
12849 spin_unlock(&phba->hbalock);
12850 return IRQ_HANDLED;
12851 }
12852
9399627f
JS
12853 if (unlikely(!phba->ha_copy)) {
12854 spin_unlock(&phba->hbalock);
12855 return IRQ_NONE;
12856 } else if (phba->ha_copy & HA_ERATT) {
12857 if (phba->hba_flag & HBA_ERATT_HANDLED)
12858 /* ERATT polling has handled ERATT */
12859 phba->ha_copy &= ~HA_ERATT;
12860 else
12861 /* Indicate interrupt handler handles ERATT */
12862 phba->hba_flag |= HBA_ERATT_HANDLED;
12863 }
12864
a257bf90
JS
12865 /*
12866 * If there is deferred error attention, do not check for any interrupt.
12867 */
12868 if (unlikely(phba->hba_flag & DEFER_ERATT)) {
ec21b3b0 12869 spin_unlock(&phba->hbalock);
a257bf90
JS
12870 return IRQ_NONE;
12871 }
12872
9399627f 12873 /* Clear attention sources except link and error attentions */
9940b97b
JS
12874 if (lpfc_readl(phba->HCregaddr, &hc_copy)) {
12875 spin_unlock(&phba->hbalock);
12876 return IRQ_HANDLED;
12877 }
a747c9ce
JS
12878 writel(hc_copy & ~(HC_MBINT_ENA | HC_R0INT_ENA | HC_R1INT_ENA
12879 | HC_R2INT_ENA | HC_LAINT_ENA | HC_ERINT_ENA),
12880 phba->HCregaddr);
9399627f 12881 writel((phba->ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
a747c9ce 12882 writel(hc_copy, phba->HCregaddr);
9399627f
JS
12883 readl(phba->HAregaddr); /* flush */
12884 spin_unlock(&phba->hbalock);
12885
12886 /*
12887 * Invokes slow-path host attention interrupt handling as appropriate.
12888 */
12889
12890 /* status of events with mailbox and link attention */
12891 status1 = phba->ha_copy & (HA_MBATT | HA_LATT | HA_ERATT);
12892
12893 /* status of events with ELS ring */
12894 status2 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_ELS_RING)));
12895 status2 >>= (4*LPFC_ELS_RING);
12896
12897 if (status1 || (status2 & HA_RXMASK))
3772a991 12898 sp_irq_rc = lpfc_sli_sp_intr_handler(irq, dev_id);
9399627f
JS
12899 else
12900 sp_irq_rc = IRQ_NONE;
12901
12902 /*
12903 * Invoke fast-path host attention interrupt handling as appropriate.
12904 */
12905
12906 /* status of events with FCP ring */
12907 status1 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
12908 status1 >>= (4*LPFC_FCP_RING);
12909
12910 /* status of events with extra ring */
12911 if (phba->cfg_multi_ring_support == 2) {
12912 status2 = (phba->ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
12913 status2 >>= (4*LPFC_EXTRA_RING);
12914 } else
12915 status2 = 0;
12916
12917 if ((status1 & HA_RXMASK) || (status2 & HA_RXMASK))
3772a991 12918 fp_irq_rc = lpfc_sli_fp_intr_handler(irq, dev_id);
9399627f
JS
12919 else
12920 fp_irq_rc = IRQ_NONE;
dea3101e 12921
9399627f
JS
12922 /* Return device-level interrupt handling status */
12923 return (sp_irq_rc == IRQ_HANDLED) ? sp_irq_rc : fp_irq_rc;
3772a991 12924} /* lpfc_sli_intr_handler */
4f774513 12925
4f774513
JS
12926/**
12927 * lpfc_sli4_els_xri_abort_event_proc - Process els xri abort event
12928 * @phba: pointer to lpfc hba data structure.
12929 *
12930 * This routine is invoked by the worker thread to process all the pending
12931 * SLI4 els abort xri events.
12932 **/
12933void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *phba)
12934{
12935 struct lpfc_cq_event *cq_event;
12936
12937 /* First, declare the els xri abort event has been handled */
12938 spin_lock_irq(&phba->hbalock);
12939 phba->hba_flag &= ~ELS_XRI_ABORT_EVENT;
12940 spin_unlock_irq(&phba->hbalock);
12941 /* Now, handle all the els xri abort events */
12942 while (!list_empty(&phba->sli4_hba.sp_els_xri_aborted_work_queue)) {
12943 /* Get the first event from the head of the event queue */
12944 spin_lock_irq(&phba->hbalock);
12945 list_remove_head(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
12946 cq_event, struct lpfc_cq_event, list);
12947 spin_unlock_irq(&phba->hbalock);
12948 /* Notify aborted XRI for ELS work queue */
12949 lpfc_sli4_els_xri_aborted(phba, &cq_event->cqe.wcqe_axri);
12950 /* Free the event processed back to the free pool */
12951 lpfc_sli4_cq_event_release(phba, cq_event);
12952 }
12953}
12954
341af102
JS
12955/**
12956 * lpfc_sli4_iocb_param_transfer - Transfer pIocbOut and cmpl status to pIocbIn
12957 * @phba: pointer to lpfc hba data structure
12958 * @pIocbIn: pointer to the rspiocbq
12959 * @pIocbOut: pointer to the cmdiocbq
12960 * @wcqe: pointer to the complete wcqe
12961 *
12962 * This routine transfers the fields of a command iocbq to a response iocbq
12963 * by copying all the IOCB fields from command iocbq and transferring the
12964 * completion status information from the complete wcqe.
12965 **/
4f774513 12966static void
341af102
JS
12967lpfc_sli4_iocb_param_transfer(struct lpfc_hba *phba,
12968 struct lpfc_iocbq *pIocbIn,
4f774513
JS
12969 struct lpfc_iocbq *pIocbOut,
12970 struct lpfc_wcqe_complete *wcqe)
12971{
af22741c 12972 int numBdes, i;
341af102 12973 unsigned long iflags;
af22741c
JS
12974 uint32_t status, max_response;
12975 struct lpfc_dmabuf *dmabuf;
12976 struct ulp_bde64 *bpl, bde;
4f774513
JS
12977 size_t offset = offsetof(struct lpfc_iocbq, iocb);
12978
12979 memcpy((char *)pIocbIn + offset, (char *)pIocbOut + offset,
12980 sizeof(struct lpfc_iocbq) - offset);
4f774513 12981 /* Map WCQE parameters into irspiocb parameters */
acd6859b
JS
12982 status = bf_get(lpfc_wcqe_c_status, wcqe);
12983 pIocbIn->iocb.ulpStatus = (status & LPFC_IOCB_STATUS_MASK);
4f774513
JS
12984 if (pIocbOut->iocb_flag & LPFC_IO_FCP)
12985 if (pIocbIn->iocb.ulpStatus == IOSTAT_FCP_RSP_ERROR)
12986 pIocbIn->iocb.un.fcpi.fcpi_parm =
12987 pIocbOut->iocb.un.fcpi.fcpi_parm -
12988 wcqe->total_data_placed;
12989 else
12990 pIocbIn->iocb.un.ulpWord[4] = wcqe->parameter;
695a814e 12991 else {
4f774513 12992 pIocbIn->iocb.un.ulpWord[4] = wcqe->parameter;
af22741c
JS
12993 switch (pIocbOut->iocb.ulpCommand) {
12994 case CMD_ELS_REQUEST64_CR:
12995 dmabuf = (struct lpfc_dmabuf *)pIocbOut->context3;
12996 bpl = (struct ulp_bde64 *)dmabuf->virt;
12997 bde.tus.w = le32_to_cpu(bpl[1].tus.w);
12998 max_response = bde.tus.f.bdeSize;
12999 break;
13000 case CMD_GEN_REQUEST64_CR:
13001 max_response = 0;
13002 if (!pIocbOut->context3)
13003 break;
13004 numBdes = pIocbOut->iocb.un.genreq64.bdl.bdeSize/
13005 sizeof(struct ulp_bde64);
13006 dmabuf = (struct lpfc_dmabuf *)pIocbOut->context3;
13007 bpl = (struct ulp_bde64 *)dmabuf->virt;
13008 for (i = 0; i < numBdes; i++) {
13009 bde.tus.w = le32_to_cpu(bpl[i].tus.w);
13010 if (bde.tus.f.bdeFlags != BUFF_TYPE_BDE_64)
13011 max_response += bde.tus.f.bdeSize;
13012 }
13013 break;
13014 default:
13015 max_response = wcqe->total_data_placed;
13016 break;
13017 }
13018 if (max_response < wcqe->total_data_placed)
13019 pIocbIn->iocb.un.genreq64.bdl.bdeSize = max_response;
13020 else
13021 pIocbIn->iocb.un.genreq64.bdl.bdeSize =
13022 wcqe->total_data_placed;
695a814e 13023 }
341af102 13024
acd6859b
JS
13025 /* Convert BG errors for completion status */
13026 if (status == CQE_STATUS_DI_ERROR) {
13027 pIocbIn->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
13028
13029 if (bf_get(lpfc_wcqe_c_bg_edir, wcqe))
13030 pIocbIn->iocb.un.ulpWord[4] = IOERR_RX_DMA_FAILED;
13031 else
13032 pIocbIn->iocb.un.ulpWord[4] = IOERR_TX_DMA_FAILED;
13033
13034 pIocbIn->iocb.unsli3.sli3_bg.bgstat = 0;
13035 if (bf_get(lpfc_wcqe_c_bg_ge, wcqe)) /* Guard Check failed */
13036 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13037 BGS_GUARD_ERR_MASK;
13038 if (bf_get(lpfc_wcqe_c_bg_ae, wcqe)) /* App Tag Check failed */
13039 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13040 BGS_APPTAG_ERR_MASK;
13041 if (bf_get(lpfc_wcqe_c_bg_re, wcqe)) /* Ref Tag Check failed */
13042 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13043 BGS_REFTAG_ERR_MASK;
13044
13045 /* Check to see if there was any good data before the error */
13046 if (bf_get(lpfc_wcqe_c_bg_tdpv, wcqe)) {
13047 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13048 BGS_HI_WATER_MARK_PRESENT_MASK;
13049 pIocbIn->iocb.unsli3.sli3_bg.bghm =
13050 wcqe->total_data_placed;
13051 }
13052
13053 /*
13054 * Set ALL the error bits to indicate we don't know what
13055 * type of error it is.
13056 */
13057 if (!pIocbIn->iocb.unsli3.sli3_bg.bgstat)
13058 pIocbIn->iocb.unsli3.sli3_bg.bgstat |=
13059 (BGS_REFTAG_ERR_MASK | BGS_APPTAG_ERR_MASK |
13060 BGS_GUARD_ERR_MASK);
13061 }
13062
341af102
JS
13063 /* Pick up HBA exchange busy condition */
13064 if (bf_get(lpfc_wcqe_c_xb, wcqe)) {
13065 spin_lock_irqsave(&phba->hbalock, iflags);
13066 pIocbIn->iocb_flag |= LPFC_EXCHANGE_BUSY;
13067 spin_unlock_irqrestore(&phba->hbalock, iflags);
13068 }
4f774513
JS
13069}
13070
45ed1190
JS
13071/**
13072 * lpfc_sli4_els_wcqe_to_rspiocbq - Get response iocbq from els wcqe
13073 * @phba: Pointer to HBA context object.
13074 * @wcqe: Pointer to work-queue completion queue entry.
13075 *
13076 * This routine handles an ELS work-queue completion event and construct
13077 * a pseudo response ELS IODBQ from the SLI4 ELS WCQE for the common
13078 * discovery engine to handle.
13079 *
13080 * Return: Pointer to the receive IOCBQ, NULL otherwise.
13081 **/
13082static struct lpfc_iocbq *
13083lpfc_sli4_els_wcqe_to_rspiocbq(struct lpfc_hba *phba,
13084 struct lpfc_iocbq *irspiocbq)
13085{
895427bd 13086 struct lpfc_sli_ring *pring;
45ed1190
JS
13087 struct lpfc_iocbq *cmdiocbq;
13088 struct lpfc_wcqe_complete *wcqe;
13089 unsigned long iflags;
13090
895427bd 13091 pring = lpfc_phba_elsring(phba);
1234a6d5
DK
13092 if (unlikely(!pring))
13093 return NULL;
895427bd 13094
45ed1190 13095 wcqe = &irspiocbq->cq_event.cqe.wcqe_cmpl;
7e56aa25 13096 spin_lock_irqsave(&pring->ring_lock, iflags);
45ed1190
JS
13097 pring->stats.iocb_event++;
13098 /* Look up the ELS command IOCB and create pseudo response IOCB */
13099 cmdiocbq = lpfc_sli_iocbq_lookup_by_tag(phba, pring,
13100 bf_get(lpfc_wcqe_c_request_tag, wcqe));
45ed1190 13101 if (unlikely(!cmdiocbq)) {
401bb416 13102 spin_unlock_irqrestore(&pring->ring_lock, iflags);
45ed1190
JS
13103 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13104 "0386 ELS complete with no corresponding "
401bb416
DK
13105 "cmdiocb: 0x%x 0x%x 0x%x 0x%x\n",
13106 wcqe->word0, wcqe->total_data_placed,
13107 wcqe->parameter, wcqe->word3);
45ed1190
JS
13108 lpfc_sli_release_iocbq(phba, irspiocbq);
13109 return NULL;
13110 }
13111
401bb416
DK
13112 /* Put the iocb back on the txcmplq */
13113 lpfc_sli_ringtxcmpl_put(phba, pring, cmdiocbq);
13114 spin_unlock_irqrestore(&pring->ring_lock, iflags);
13115
45ed1190 13116 /* Fake the irspiocbq and copy necessary response information */
341af102 13117 lpfc_sli4_iocb_param_transfer(phba, irspiocbq, cmdiocbq, wcqe);
45ed1190
JS
13118
13119 return irspiocbq;
13120}
13121
8a5ca109
JS
13122inline struct lpfc_cq_event *
13123lpfc_cq_event_setup(struct lpfc_hba *phba, void *entry, int size)
13124{
13125 struct lpfc_cq_event *cq_event;
13126
13127 /* Allocate a new internal CQ_EVENT entry */
13128 cq_event = lpfc_sli4_cq_event_alloc(phba);
13129 if (!cq_event) {
13130 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13131 "0602 Failed to alloc CQ_EVENT entry\n");
13132 return NULL;
13133 }
13134
13135 /* Move the CQE into the event */
13136 memcpy(&cq_event->cqe, entry, size);
13137 return cq_event;
13138}
13139
04c68496
JS
13140/**
13141 * lpfc_sli4_sp_handle_async_event - Handle an asynchroous event
13142 * @phba: Pointer to HBA context object.
13143 * @cqe: Pointer to mailbox completion queue entry.
13144 *
13145 * This routine process a mailbox completion queue entry with asynchrous
13146 * event.
13147 *
13148 * Return: true if work posted to worker thread, otherwise false.
13149 **/
13150static bool
13151lpfc_sli4_sp_handle_async_event(struct lpfc_hba *phba, struct lpfc_mcqe *mcqe)
13152{
13153 struct lpfc_cq_event *cq_event;
13154 unsigned long iflags;
13155
13156 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13157 "0392 Async Event: word0:x%x, word1:x%x, "
13158 "word2:x%x, word3:x%x\n", mcqe->word0,
13159 mcqe->mcqe_tag0, mcqe->mcqe_tag1, mcqe->trailer);
13160
8a5ca109
JS
13161 cq_event = lpfc_cq_event_setup(phba, mcqe, sizeof(struct lpfc_mcqe));
13162 if (!cq_event)
04c68496 13163 return false;
04c68496
JS
13164 spin_lock_irqsave(&phba->hbalock, iflags);
13165 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_asynce_work_queue);
13166 /* Set the async event flag */
13167 phba->hba_flag |= ASYNC_EVENT;
13168 spin_unlock_irqrestore(&phba->hbalock, iflags);
13169
13170 return true;
13171}
13172
13173/**
13174 * lpfc_sli4_sp_handle_mbox_event - Handle a mailbox completion event
13175 * @phba: Pointer to HBA context object.
13176 * @cqe: Pointer to mailbox completion queue entry.
13177 *
13178 * This routine process a mailbox completion queue entry with mailbox
13179 * completion event.
13180 *
13181 * Return: true if work posted to worker thread, otherwise false.
13182 **/
13183static bool
13184lpfc_sli4_sp_handle_mbox_event(struct lpfc_hba *phba, struct lpfc_mcqe *mcqe)
13185{
13186 uint32_t mcqe_status;
13187 MAILBOX_t *mbox, *pmbox;
13188 struct lpfc_mqe *mqe;
13189 struct lpfc_vport *vport;
13190 struct lpfc_nodelist *ndlp;
13191 struct lpfc_dmabuf *mp;
13192 unsigned long iflags;
13193 LPFC_MBOXQ_t *pmb;
13194 bool workposted = false;
13195 int rc;
13196
13197 /* If not a mailbox complete MCQE, out by checking mailbox consume */
13198 if (!bf_get(lpfc_trailer_completed, mcqe))
13199 goto out_no_mqe_complete;
13200
13201 /* Get the reference to the active mbox command */
13202 spin_lock_irqsave(&phba->hbalock, iflags);
13203 pmb = phba->sli.mbox_active;
13204 if (unlikely(!pmb)) {
13205 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
13206 "1832 No pending MBOX command to handle\n");
13207 spin_unlock_irqrestore(&phba->hbalock, iflags);
13208 goto out_no_mqe_complete;
13209 }
13210 spin_unlock_irqrestore(&phba->hbalock, iflags);
13211 mqe = &pmb->u.mqe;
13212 pmbox = (MAILBOX_t *)&pmb->u.mqe;
13213 mbox = phba->mbox;
13214 vport = pmb->vport;
13215
13216 /* Reset heartbeat timer */
13217 phba->last_completion_time = jiffies;
13218 del_timer(&phba->sli.mbox_tmo);
13219
13220 /* Move mbox data to caller's mailbox region, do endian swapping */
13221 if (pmb->mbox_cmpl && mbox)
48f8fdb4 13222 lpfc_sli4_pcimem_bcopy(mbox, mqe, sizeof(struct lpfc_mqe));
04c68496 13223
73d91e50
JS
13224 /*
13225 * For mcqe errors, conditionally move a modified error code to
13226 * the mbox so that the error will not be missed.
13227 */
13228 mcqe_status = bf_get(lpfc_mcqe_status, mcqe);
13229 if (mcqe_status != MB_CQE_STATUS_SUCCESS) {
13230 if (bf_get(lpfc_mqe_status, mqe) == MBX_SUCCESS)
13231 bf_set(lpfc_mqe_status, mqe,
13232 (LPFC_MBX_ERROR_RANGE | mcqe_status));
13233 }
04c68496
JS
13234 if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
13235 pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
13236 lpfc_debugfs_disc_trc(vport, LPFC_DISC_TRC_MBOX_VPORT,
13237 "MBOX dflt rpi: status:x%x rpi:x%x",
13238 mcqe_status,
13239 pmbox->un.varWords[0], 0);
13240 if (mcqe_status == MB_CQE_STATUS_SUCCESS) {
3e1f0718
JS
13241 mp = (struct lpfc_dmabuf *)(pmb->ctx_buf);
13242 ndlp = (struct lpfc_nodelist *)pmb->ctx_ndlp;
04c68496
JS
13243 /* Reg_LOGIN of dflt RPI was successful. Now lets get
13244 * RID of the PPI using the same mbox buffer.
13245 */
13246 lpfc_unreg_login(phba, vport->vpi,
13247 pmbox->un.varWords[0], pmb);
13248 pmb->mbox_cmpl = lpfc_mbx_cmpl_dflt_rpi;
3e1f0718
JS
13249 pmb->ctx_buf = mp;
13250 pmb->ctx_ndlp = ndlp;
04c68496
JS
13251 pmb->vport = vport;
13252 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
13253 if (rc != MBX_BUSY)
13254 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX |
13255 LOG_SLI, "0385 rc should "
13256 "have been MBX_BUSY\n");
13257 if (rc != MBX_NOT_FINISHED)
13258 goto send_current_mbox;
13259 }
13260 }
13261 spin_lock_irqsave(&phba->pport->work_port_lock, iflags);
13262 phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
13263 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflags);
13264
13265 /* There is mailbox completion work to do */
13266 spin_lock_irqsave(&phba->hbalock, iflags);
13267 __lpfc_mbox_cmpl_put(phba, pmb);
13268 phba->work_ha |= HA_MBATT;
13269 spin_unlock_irqrestore(&phba->hbalock, iflags);
13270 workposted = true;
13271
13272send_current_mbox:
13273 spin_lock_irqsave(&phba->hbalock, iflags);
13274 /* Release the mailbox command posting token */
13275 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
13276 /* Setting active mailbox pointer need to be in sync to flag clear */
13277 phba->sli.mbox_active = NULL;
13278 spin_unlock_irqrestore(&phba->hbalock, iflags);
13279 /* Wake up worker thread to post the next pending mailbox command */
13280 lpfc_worker_wake_up(phba);
13281out_no_mqe_complete:
13282 if (bf_get(lpfc_trailer_consumed, mcqe))
13283 lpfc_sli4_mq_release(phba->sli4_hba.mbx_wq);
13284 return workposted;
13285}
13286
13287/**
13288 * lpfc_sli4_sp_handle_mcqe - Process a mailbox completion queue entry
13289 * @phba: Pointer to HBA context object.
13290 * @cqe: Pointer to mailbox completion queue entry.
13291 *
13292 * This routine process a mailbox completion queue entry, it invokes the
13293 * proper mailbox complete handling or asynchrous event handling routine
13294 * according to the MCQE's async bit.
13295 *
13296 * Return: true if work posted to worker thread, otherwise false.
13297 **/
13298static bool
13299lpfc_sli4_sp_handle_mcqe(struct lpfc_hba *phba, struct lpfc_cqe *cqe)
13300{
13301 struct lpfc_mcqe mcqe;
13302 bool workposted;
13303
13304 /* Copy the mailbox MCQE and convert endian order as needed */
48f8fdb4 13305 lpfc_sli4_pcimem_bcopy(cqe, &mcqe, sizeof(struct lpfc_mcqe));
04c68496
JS
13306
13307 /* Invoke the proper event handling routine */
13308 if (!bf_get(lpfc_trailer_async, &mcqe))
13309 workposted = lpfc_sli4_sp_handle_mbox_event(phba, &mcqe);
13310 else
13311 workposted = lpfc_sli4_sp_handle_async_event(phba, &mcqe);
13312 return workposted;
13313}
13314
4f774513
JS
13315/**
13316 * lpfc_sli4_sp_handle_els_wcqe - Handle els work-queue completion event
13317 * @phba: Pointer to HBA context object.
2a76a283 13318 * @cq: Pointer to associated CQ
4f774513
JS
13319 * @wcqe: Pointer to work-queue completion queue entry.
13320 *
13321 * This routine handles an ELS work-queue completion event.
13322 *
13323 * Return: true if work posted to worker thread, otherwise false.
13324 **/
13325static bool
2a76a283 13326lpfc_sli4_sp_handle_els_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
13327 struct lpfc_wcqe_complete *wcqe)
13328{
4f774513
JS
13329 struct lpfc_iocbq *irspiocbq;
13330 unsigned long iflags;
2a76a283 13331 struct lpfc_sli_ring *pring = cq->pring;
0e9bb8d7
JS
13332 int txq_cnt = 0;
13333 int txcmplq_cnt = 0;
13334 int fcp_txcmplq_cnt = 0;
4f774513 13335
11f0e34f
JS
13336 /* Check for response status */
13337 if (unlikely(bf_get(lpfc_wcqe_c_status, wcqe))) {
13338 /* Log the error status */
13339 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13340 "0357 ELS CQE error: status=x%x: "
13341 "CQE: %08x %08x %08x %08x\n",
13342 bf_get(lpfc_wcqe_c_status, wcqe),
13343 wcqe->word0, wcqe->total_data_placed,
13344 wcqe->parameter, wcqe->word3);
13345 }
13346
45ed1190 13347 /* Get an irspiocbq for later ELS response processing use */
4f774513
JS
13348 irspiocbq = lpfc_sli_get_iocbq(phba);
13349 if (!irspiocbq) {
0e9bb8d7
JS
13350 if (!list_empty(&pring->txq))
13351 txq_cnt++;
13352 if (!list_empty(&pring->txcmplq))
13353 txcmplq_cnt++;
4f774513 13354 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2a9bf3d0
JS
13355 "0387 NO IOCBQ data: txq_cnt=%d iocb_cnt=%d "
13356 "fcp_txcmplq_cnt=%d, els_txcmplq_cnt=%d\n",
0e9bb8d7
JS
13357 txq_cnt, phba->iocb_cnt,
13358 fcp_txcmplq_cnt,
13359 txcmplq_cnt);
45ed1190 13360 return false;
4f774513 13361 }
4f774513 13362
45ed1190
JS
13363 /* Save off the slow-path queue event for work thread to process */
13364 memcpy(&irspiocbq->cq_event.cqe.wcqe_cmpl, wcqe, sizeof(*wcqe));
4f774513 13365 spin_lock_irqsave(&phba->hbalock, iflags);
4d9ab994 13366 list_add_tail(&irspiocbq->cq_event.list,
45ed1190
JS
13367 &phba->sli4_hba.sp_queue_event);
13368 phba->hba_flag |= HBA_SP_QUEUE_EVT;
4f774513 13369 spin_unlock_irqrestore(&phba->hbalock, iflags);
4f774513 13370
45ed1190 13371 return true;
4f774513
JS
13372}
13373
13374/**
13375 * lpfc_sli4_sp_handle_rel_wcqe - Handle slow-path WQ entry consumed event
13376 * @phba: Pointer to HBA context object.
13377 * @wcqe: Pointer to work-queue completion queue entry.
13378 *
3f8b6fb7 13379 * This routine handles slow-path WQ entry consumed event by invoking the
4f774513
JS
13380 * proper WQ release routine to the slow-path WQ.
13381 **/
13382static void
13383lpfc_sli4_sp_handle_rel_wcqe(struct lpfc_hba *phba,
13384 struct lpfc_wcqe_release *wcqe)
13385{
2e90f4b5
JS
13386 /* sanity check on queue memory */
13387 if (unlikely(!phba->sli4_hba.els_wq))
13388 return;
4f774513
JS
13389 /* Check for the slow-path ELS work queue */
13390 if (bf_get(lpfc_wcqe_r_wq_id, wcqe) == phba->sli4_hba.els_wq->queue_id)
13391 lpfc_sli4_wq_release(phba->sli4_hba.els_wq,
13392 bf_get(lpfc_wcqe_r_wqe_index, wcqe));
13393 else
13394 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13395 "2579 Slow-path wqe consume event carries "
13396 "miss-matched qid: wcqe-qid=x%x, sp-qid=x%x\n",
13397 bf_get(lpfc_wcqe_r_wqe_index, wcqe),
13398 phba->sli4_hba.els_wq->queue_id);
13399}
13400
13401/**
13402 * lpfc_sli4_sp_handle_abort_xri_wcqe - Handle a xri abort event
13403 * @phba: Pointer to HBA context object.
13404 * @cq: Pointer to a WQ completion queue.
13405 * @wcqe: Pointer to work-queue completion queue entry.
13406 *
13407 * This routine handles an XRI abort event.
13408 *
13409 * Return: true if work posted to worker thread, otherwise false.
13410 **/
13411static bool
13412lpfc_sli4_sp_handle_abort_xri_wcqe(struct lpfc_hba *phba,
13413 struct lpfc_queue *cq,
13414 struct sli4_wcqe_xri_aborted *wcqe)
13415{
13416 bool workposted = false;
13417 struct lpfc_cq_event *cq_event;
13418 unsigned long iflags;
13419
4f774513
JS
13420 switch (cq->subtype) {
13421 case LPFC_FCP:
5e5b511d
JS
13422 lpfc_sli4_fcp_xri_aborted(phba, wcqe, cq->hdwq);
13423 workposted = false;
4f774513 13424 break;
422c4cb7 13425 case LPFC_NVME_LS: /* NVME LS uses ELS resources */
4f774513 13426 case LPFC_ELS:
8a5ca109
JS
13427 cq_event = lpfc_cq_event_setup(
13428 phba, wcqe, sizeof(struct sli4_wcqe_xri_aborted));
13429 if (!cq_event)
13430 return false;
5e5b511d 13431 cq_event->hdwq = cq->hdwq;
4f774513
JS
13432 spin_lock_irqsave(&phba->hbalock, iflags);
13433 list_add_tail(&cq_event->list,
13434 &phba->sli4_hba.sp_els_xri_aborted_work_queue);
13435 /* Set the els xri abort event flag */
13436 phba->hba_flag |= ELS_XRI_ABORT_EVENT;
13437 spin_unlock_irqrestore(&phba->hbalock, iflags);
13438 workposted = true;
13439 break;
318083ad 13440 case LPFC_NVME:
8a5ca109
JS
13441 /* Notify aborted XRI for NVME work queue */
13442 if (phba->nvmet_support)
13443 lpfc_sli4_nvmet_xri_aborted(phba, wcqe);
13444 else
5e5b511d 13445 lpfc_sli4_nvme_xri_aborted(phba, wcqe, cq->hdwq);
8a5ca109
JS
13446
13447 workposted = false;
318083ad 13448 break;
4f774513
JS
13449 default:
13450 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
318083ad
JS
13451 "0603 Invalid CQ subtype %d: "
13452 "%08x %08x %08x %08x\n",
13453 cq->subtype, wcqe->word0, wcqe->parameter,
13454 wcqe->word2, wcqe->word3);
4f774513
JS
13455 workposted = false;
13456 break;
13457 }
13458 return workposted;
13459}
13460
e817e5d7
JS
13461#define FC_RCTL_MDS_DIAGS 0xF4
13462
4f774513
JS
13463/**
13464 * lpfc_sli4_sp_handle_rcqe - Process a receive-queue completion queue entry
13465 * @phba: Pointer to HBA context object.
13466 * @rcqe: Pointer to receive-queue completion queue entry.
13467 *
13468 * This routine process a receive-queue completion queue entry.
13469 *
13470 * Return: true if work posted to worker thread, otherwise false.
13471 **/
13472static bool
4d9ab994 13473lpfc_sli4_sp_handle_rcqe(struct lpfc_hba *phba, struct lpfc_rcqe *rcqe)
4f774513 13474{
4f774513 13475 bool workposted = false;
e817e5d7 13476 struct fc_frame_header *fc_hdr;
4f774513
JS
13477 struct lpfc_queue *hrq = phba->sli4_hba.hdr_rq;
13478 struct lpfc_queue *drq = phba->sli4_hba.dat_rq;
547077a4 13479 struct lpfc_nvmet_tgtport *tgtp;
4f774513 13480 struct hbq_dmabuf *dma_buf;
7851fe2c 13481 uint32_t status, rq_id;
4f774513
JS
13482 unsigned long iflags;
13483
2e90f4b5
JS
13484 /* sanity check on queue memory */
13485 if (unlikely(!hrq) || unlikely(!drq))
13486 return workposted;
13487
7851fe2c
JS
13488 if (bf_get(lpfc_cqe_code, rcqe) == CQE_CODE_RECEIVE_V1)
13489 rq_id = bf_get(lpfc_rcqe_rq_id_v1, rcqe);
13490 else
13491 rq_id = bf_get(lpfc_rcqe_rq_id, rcqe);
13492 if (rq_id != hrq->queue_id)
4f774513
JS
13493 goto out;
13494
4d9ab994 13495 status = bf_get(lpfc_rcqe_status, rcqe);
4f774513
JS
13496 switch (status) {
13497 case FC_STATUS_RQ_BUF_LEN_EXCEEDED:
13498 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13499 "2537 Receive Frame Truncated!!\n");
13500 case FC_STATUS_RQ_SUCCESS:
13501 spin_lock_irqsave(&phba->hbalock, iflags);
cbc5de1b 13502 lpfc_sli4_rq_release(hrq, drq);
4f774513
JS
13503 dma_buf = lpfc_sli_hbqbuf_get(&phba->hbqs[0].hbq_buffer_list);
13504 if (!dma_buf) {
b84daac9 13505 hrq->RQ_no_buf_found++;
4f774513
JS
13506 spin_unlock_irqrestore(&phba->hbalock, iflags);
13507 goto out;
13508 }
b84daac9 13509 hrq->RQ_rcv_buf++;
547077a4 13510 hrq->RQ_buf_posted--;
4d9ab994 13511 memcpy(&dma_buf->cq_event.cqe.rcqe_cmpl, rcqe, sizeof(*rcqe));
895427bd 13512
e817e5d7
JS
13513 fc_hdr = (struct fc_frame_header *)dma_buf->hbuf.virt;
13514
13515 if (fc_hdr->fh_r_ctl == FC_RCTL_MDS_DIAGS ||
13516 fc_hdr->fh_r_ctl == FC_RCTL_DD_UNSOL_DATA) {
13517 spin_unlock_irqrestore(&phba->hbalock, iflags);
13518 /* Handle MDS Loopback frames */
13519 lpfc_sli4_handle_mds_loopback(phba->pport, dma_buf);
13520 break;
13521 }
13522
13523 /* save off the frame for the work thread to process */
4d9ab994 13524 list_add_tail(&dma_buf->cq_event.list,
45ed1190 13525 &phba->sli4_hba.sp_queue_event);
4f774513 13526 /* Frame received */
45ed1190 13527 phba->hba_flag |= HBA_SP_QUEUE_EVT;
4f774513
JS
13528 spin_unlock_irqrestore(&phba->hbalock, iflags);
13529 workposted = true;
13530 break;
4f774513 13531 case FC_STATUS_INSUFF_BUF_FRM_DISC:
547077a4
JS
13532 if (phba->nvmet_support) {
13533 tgtp = phba->targetport->private;
13534 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_NVME,
13535 "6402 RQE Error x%x, posted %d err_cnt "
13536 "%d: %x %x %x\n",
13537 status, hrq->RQ_buf_posted,
13538 hrq->RQ_no_posted_buf,
13539 atomic_read(&tgtp->rcv_fcp_cmd_in),
13540 atomic_read(&tgtp->rcv_fcp_cmd_out),
13541 atomic_read(&tgtp->xmt_fcp_release));
13542 }
13543 /* fallthrough */
13544
13545 case FC_STATUS_INSUFF_BUF_NEED_BUF:
b84daac9 13546 hrq->RQ_no_posted_buf++;
4f774513
JS
13547 /* Post more buffers if possible */
13548 spin_lock_irqsave(&phba->hbalock, iflags);
13549 phba->hba_flag |= HBA_POST_RECEIVE_BUFFER;
13550 spin_unlock_irqrestore(&phba->hbalock, iflags);
13551 workposted = true;
13552 break;
13553 }
13554out:
13555 return workposted;
4f774513
JS
13556}
13557
4d9ab994
JS
13558/**
13559 * lpfc_sli4_sp_handle_cqe - Process a slow path completion queue entry
13560 * @phba: Pointer to HBA context object.
13561 * @cq: Pointer to the completion queue.
13562 * @wcqe: Pointer to a completion queue entry.
13563 *
25985edc 13564 * This routine process a slow-path work-queue or receive queue completion queue
4d9ab994
JS
13565 * entry.
13566 *
13567 * Return: true if work posted to worker thread, otherwise false.
13568 **/
13569static bool
13570lpfc_sli4_sp_handle_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13571 struct lpfc_cqe *cqe)
13572{
45ed1190 13573 struct lpfc_cqe cqevt;
4d9ab994
JS
13574 bool workposted = false;
13575
13576 /* Copy the work queue CQE and convert endian order if needed */
48f8fdb4 13577 lpfc_sli4_pcimem_bcopy(cqe, &cqevt, sizeof(struct lpfc_cqe));
4d9ab994
JS
13578
13579 /* Check and process for different type of WCQE and dispatch */
45ed1190 13580 switch (bf_get(lpfc_cqe_code, &cqevt)) {
4d9ab994 13581 case CQE_CODE_COMPL_WQE:
45ed1190 13582 /* Process the WQ/RQ complete event */
bc73905a 13583 phba->last_completion_time = jiffies;
2a76a283 13584 workposted = lpfc_sli4_sp_handle_els_wcqe(phba, cq,
45ed1190 13585 (struct lpfc_wcqe_complete *)&cqevt);
4d9ab994
JS
13586 break;
13587 case CQE_CODE_RELEASE_WQE:
13588 /* Process the WQ release event */
13589 lpfc_sli4_sp_handle_rel_wcqe(phba,
45ed1190 13590 (struct lpfc_wcqe_release *)&cqevt);
4d9ab994
JS
13591 break;
13592 case CQE_CODE_XRI_ABORTED:
13593 /* Process the WQ XRI abort event */
bc73905a 13594 phba->last_completion_time = jiffies;
4d9ab994 13595 workposted = lpfc_sli4_sp_handle_abort_xri_wcqe(phba, cq,
45ed1190 13596 (struct sli4_wcqe_xri_aborted *)&cqevt);
4d9ab994
JS
13597 break;
13598 case CQE_CODE_RECEIVE:
7851fe2c 13599 case CQE_CODE_RECEIVE_V1:
4d9ab994 13600 /* Process the RQ event */
bc73905a 13601 phba->last_completion_time = jiffies;
4d9ab994 13602 workposted = lpfc_sli4_sp_handle_rcqe(phba,
45ed1190 13603 (struct lpfc_rcqe *)&cqevt);
4d9ab994
JS
13604 break;
13605 default:
13606 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13607 "0388 Not a valid WCQE code: x%x\n",
45ed1190 13608 bf_get(lpfc_cqe_code, &cqevt));
4d9ab994
JS
13609 break;
13610 }
13611 return workposted;
13612}
13613
4f774513
JS
13614/**
13615 * lpfc_sli4_sp_handle_eqe - Process a slow-path event queue entry
13616 * @phba: Pointer to HBA context object.
13617 * @eqe: Pointer to fast-path event queue entry.
13618 *
13619 * This routine process a event queue entry from the slow-path event queue.
13620 * It will check the MajorCode and MinorCode to determine this is for a
13621 * completion event on a completion queue, if not, an error shall be logged
13622 * and just return. Otherwise, it will get to the corresponding completion
13623 * queue and process all the entries on that completion queue, rearm the
13624 * completion queue, and then return.
13625 *
13626 **/
f485c18d 13627static void
67d12733
JS
13628lpfc_sli4_sp_handle_eqe(struct lpfc_hba *phba, struct lpfc_eqe *eqe,
13629 struct lpfc_queue *speq)
4f774513 13630{
67d12733 13631 struct lpfc_queue *cq = NULL, *childq;
4f774513
JS
13632 uint16_t cqid;
13633
4f774513 13634 /* Get the reference to the corresponding CQ */
cb5172ea 13635 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
4f774513 13636
4f774513
JS
13637 list_for_each_entry(childq, &speq->child_list, list) {
13638 if (childq->queue_id == cqid) {
13639 cq = childq;
13640 break;
13641 }
13642 }
13643 if (unlikely(!cq)) {
75baf696
JS
13644 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
13645 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13646 "0365 Slow-path CQ identifier "
13647 "(%d) does not exist\n", cqid);
f485c18d 13648 return;
4f774513
JS
13649 }
13650
895427bd
JS
13651 /* Save EQ associated with this CQ */
13652 cq->assoc_qp = speq;
13653
f485c18d
DK
13654 if (!queue_work(phba->wq, &cq->spwork))
13655 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13656 "0390 Cannot schedule soft IRQ "
13657 "for CQ eqcqid=%d, cqid=%d on CPU %d\n",
13658 cqid, cq->queue_id, smp_processor_id());
13659}
13660
13661/**
13662 * lpfc_sli4_sp_process_cq - Process a slow-path event queue entry
13663 * @phba: Pointer to HBA context object.
13664 *
13665 * This routine process a event queue entry from the slow-path event queue.
13666 * It will check the MajorCode and MinorCode to determine this is for a
13667 * completion event on a completion queue, if not, an error shall be logged
13668 * and just return. Otherwise, it will get to the corresponding completion
13669 * queue and process all the entries on that completion queue, rearm the
13670 * completion queue, and then return.
13671 *
13672 **/
13673static void
13674lpfc_sli4_sp_process_cq(struct work_struct *work)
13675{
13676 struct lpfc_queue *cq =
13677 container_of(work, struct lpfc_queue, spwork);
13678 struct lpfc_hba *phba = cq->phba;
13679 struct lpfc_cqe *cqe;
13680 bool workposted = false;
13681 int ccount = 0;
13682
4f774513
JS
13683 /* Process all the entries to the CQ */
13684 switch (cq->type) {
13685 case LPFC_MCQ:
13686 while ((cqe = lpfc_sli4_cq_get(cq))) {
13687 workposted |= lpfc_sli4_sp_handle_mcqe(phba, cqe);
f485c18d 13688 if (!(++ccount % cq->entry_repost))
7869da18 13689 break;
b84daac9 13690 cq->CQ_mbox++;
4f774513
JS
13691 }
13692 break;
13693 case LPFC_WCQ:
13694 while ((cqe = lpfc_sli4_cq_get(cq))) {
c8a4ce0b
DK
13695 if (cq->subtype == LPFC_FCP ||
13696 cq->subtype == LPFC_NVME) {
13697#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
13698 if (phba->ktime_on)
13699 cq->isr_timestamp = ktime_get_ns();
13700 else
13701 cq->isr_timestamp = 0;
13702#endif
895427bd 13703 workposted |= lpfc_sli4_fp_handle_cqe(phba, cq,
0558056c 13704 cqe);
c8a4ce0b 13705 } else {
0558056c
JS
13706 workposted |= lpfc_sli4_sp_handle_cqe(phba, cq,
13707 cqe);
c8a4ce0b 13708 }
f485c18d 13709 if (!(++ccount % cq->entry_repost))
7869da18 13710 break;
4f774513 13711 }
b84daac9
JS
13712
13713 /* Track the max number of CQEs processed in 1 EQ */
f485c18d
DK
13714 if (ccount > cq->CQ_max_cqe)
13715 cq->CQ_max_cqe = ccount;
4f774513
JS
13716 break;
13717 default:
13718 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13719 "0370 Invalid completion queue type (%d)\n",
13720 cq->type);
f485c18d 13721 return;
4f774513
JS
13722 }
13723
13724 /* Catch the no cq entry condition, log an error */
f485c18d 13725 if (unlikely(ccount == 0))
4f774513
JS
13726 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13727 "0371 No entry from the CQ: identifier "
13728 "(x%x), type (%d)\n", cq->queue_id, cq->type);
13729
13730 /* In any case, flash and re-arm the RCQ */
b71413dd 13731 phba->sli4_hba.sli4_cq_release(cq, LPFC_QUEUE_REARM);
4f774513
JS
13732
13733 /* wake up worker thread if there are works to be done */
13734 if (workposted)
13735 lpfc_worker_wake_up(phba);
13736}
13737
13738/**
13739 * lpfc_sli4_fp_handle_fcp_wcqe - Process fast-path work queue completion entry
2a76a283
JS
13740 * @phba: Pointer to HBA context object.
13741 * @cq: Pointer to associated CQ
13742 * @wcqe: Pointer to work-queue completion queue entry.
4f774513
JS
13743 *
13744 * This routine process a fast-path work queue completion entry from fast-path
13745 * event queue for FCP command response completion.
13746 **/
13747static void
2a76a283 13748lpfc_sli4_fp_handle_fcp_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
13749 struct lpfc_wcqe_complete *wcqe)
13750{
2a76a283 13751 struct lpfc_sli_ring *pring = cq->pring;
4f774513
JS
13752 struct lpfc_iocbq *cmdiocbq;
13753 struct lpfc_iocbq irspiocbq;
13754 unsigned long iflags;
13755
4f774513
JS
13756 /* Check for response status */
13757 if (unlikely(bf_get(lpfc_wcqe_c_status, wcqe))) {
13758 /* If resource errors reported from HBA, reduce queue
13759 * depth of the SCSI device.
13760 */
e3d2b802
JS
13761 if (((bf_get(lpfc_wcqe_c_status, wcqe) ==
13762 IOSTAT_LOCAL_REJECT)) &&
13763 ((wcqe->parameter & IOERR_PARAM_MASK) ==
13764 IOERR_NO_RESOURCES))
4f774513 13765 phba->lpfc_rampdown_queue_depth(phba);
e3d2b802 13766
4f774513 13767 /* Log the error status */
11f0e34f
JS
13768 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
13769 "0373 FCP CQE error: status=x%x: "
13770 "CQE: %08x %08x %08x %08x\n",
4f774513 13771 bf_get(lpfc_wcqe_c_status, wcqe),
11f0e34f
JS
13772 wcqe->word0, wcqe->total_data_placed,
13773 wcqe->parameter, wcqe->word3);
4f774513
JS
13774 }
13775
13776 /* Look up the FCP command IOCB and create pseudo response IOCB */
7e56aa25
JS
13777 spin_lock_irqsave(&pring->ring_lock, iflags);
13778 pring->stats.iocb_event++;
4f774513
JS
13779 cmdiocbq = lpfc_sli_iocbq_lookup_by_tag(phba, pring,
13780 bf_get(lpfc_wcqe_c_request_tag, wcqe));
7e56aa25 13781 spin_unlock_irqrestore(&pring->ring_lock, iflags);
4f774513
JS
13782 if (unlikely(!cmdiocbq)) {
13783 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13784 "0374 FCP complete with no corresponding "
13785 "cmdiocb: iotag (%d)\n",
13786 bf_get(lpfc_wcqe_c_request_tag, wcqe));
13787 return;
13788 }
c8a4ce0b
DK
13789#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
13790 cmdiocbq->isr_timestamp = cq->isr_timestamp;
13791#endif
895427bd
JS
13792 if (cmdiocbq->iocb_cmpl == NULL) {
13793 if (cmdiocbq->wqe_cmpl) {
13794 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED) {
13795 spin_lock_irqsave(&phba->hbalock, iflags);
13796 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
13797 spin_unlock_irqrestore(&phba->hbalock, iflags);
13798 }
13799
13800 /* Pass the cmd_iocb and the wcqe to the upper layer */
13801 (cmdiocbq->wqe_cmpl)(phba, cmdiocbq, wcqe);
13802 return;
13803 }
4f774513
JS
13804 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13805 "0375 FCP cmdiocb not callback function "
13806 "iotag: (%d)\n",
13807 bf_get(lpfc_wcqe_c_request_tag, wcqe));
13808 return;
13809 }
13810
13811 /* Fake the irspiocb and copy necessary response information */
341af102 13812 lpfc_sli4_iocb_param_transfer(phba, &irspiocbq, cmdiocbq, wcqe);
4f774513 13813
0f65ff68
JS
13814 if (cmdiocbq->iocb_flag & LPFC_DRIVER_ABORTED) {
13815 spin_lock_irqsave(&phba->hbalock, iflags);
13816 cmdiocbq->iocb_flag &= ~LPFC_DRIVER_ABORTED;
13817 spin_unlock_irqrestore(&phba->hbalock, iflags);
13818 }
13819
4f774513
JS
13820 /* Pass the cmd_iocb and the rsp state to the upper layer */
13821 (cmdiocbq->iocb_cmpl)(phba, cmdiocbq, &irspiocbq);
13822}
13823
13824/**
13825 * lpfc_sli4_fp_handle_rel_wcqe - Handle fast-path WQ entry consumed event
13826 * @phba: Pointer to HBA context object.
13827 * @cq: Pointer to completion queue.
13828 * @wcqe: Pointer to work-queue completion queue entry.
13829 *
3f8b6fb7 13830 * This routine handles an fast-path WQ entry consumed event by invoking the
4f774513
JS
13831 * proper WQ release routine to the slow-path WQ.
13832 **/
13833static void
13834lpfc_sli4_fp_handle_rel_wcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13835 struct lpfc_wcqe_release *wcqe)
13836{
13837 struct lpfc_queue *childwq;
13838 bool wqid_matched = false;
895427bd 13839 uint16_t hba_wqid;
4f774513
JS
13840
13841 /* Check for fast-path FCP work queue release */
895427bd 13842 hba_wqid = bf_get(lpfc_wcqe_r_wq_id, wcqe);
4f774513 13843 list_for_each_entry(childwq, &cq->child_list, list) {
895427bd 13844 if (childwq->queue_id == hba_wqid) {
4f774513
JS
13845 lpfc_sli4_wq_release(childwq,
13846 bf_get(lpfc_wcqe_r_wqe_index, wcqe));
6e8e1c14
JS
13847 if (childwq->q_flag & HBA_NVMET_WQFULL)
13848 lpfc_nvmet_wqfull_process(phba, childwq);
4f774513
JS
13849 wqid_matched = true;
13850 break;
13851 }
13852 }
13853 /* Report warning log message if no match found */
13854 if (wqid_matched != true)
13855 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
13856 "2580 Fast-path wqe consume event carries "
895427bd 13857 "miss-matched qid: wcqe-qid=x%x\n", hba_wqid);
4f774513
JS
13858}
13859
13860/**
2d7dbc4c
JS
13861 * lpfc_sli4_nvmet_handle_rcqe - Process a receive-queue completion queue entry
13862 * @phba: Pointer to HBA context object.
13863 * @rcqe: Pointer to receive-queue completion queue entry.
4f774513 13864 *
2d7dbc4c
JS
13865 * This routine process a receive-queue completion queue entry.
13866 *
13867 * Return: true if work posted to worker thread, otherwise false.
13868 **/
13869static bool
13870lpfc_sli4_nvmet_handle_rcqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
13871 struct lpfc_rcqe *rcqe)
13872{
13873 bool workposted = false;
13874 struct lpfc_queue *hrq;
13875 struct lpfc_queue *drq;
13876 struct rqb_dmabuf *dma_buf;
13877 struct fc_frame_header *fc_hdr;
547077a4 13878 struct lpfc_nvmet_tgtport *tgtp;
2d7dbc4c
JS
13879 uint32_t status, rq_id;
13880 unsigned long iflags;
13881 uint32_t fctl, idx;
13882
13883 if ((phba->nvmet_support == 0) ||
13884 (phba->sli4_hba.nvmet_cqset == NULL))
13885 return workposted;
13886
13887 idx = cq->queue_id - phba->sli4_hba.nvmet_cqset[0]->queue_id;
13888 hrq = phba->sli4_hba.nvmet_mrq_hdr[idx];
13889 drq = phba->sli4_hba.nvmet_mrq_data[idx];
13890
13891 /* sanity check on queue memory */
13892 if (unlikely(!hrq) || unlikely(!drq))
13893 return workposted;
13894
13895 if (bf_get(lpfc_cqe_code, rcqe) == CQE_CODE_RECEIVE_V1)
13896 rq_id = bf_get(lpfc_rcqe_rq_id_v1, rcqe);
13897 else
13898 rq_id = bf_get(lpfc_rcqe_rq_id, rcqe);
13899
13900 if ((phba->nvmet_support == 0) ||
13901 (rq_id != hrq->queue_id))
13902 return workposted;
13903
13904 status = bf_get(lpfc_rcqe_status, rcqe);
13905 switch (status) {
13906 case FC_STATUS_RQ_BUF_LEN_EXCEEDED:
13907 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
13908 "6126 Receive Frame Truncated!!\n");
78e1d200 13909 /* Drop thru */
2d7dbc4c 13910 case FC_STATUS_RQ_SUCCESS:
2d7dbc4c 13911 spin_lock_irqsave(&phba->hbalock, iflags);
cbc5de1b 13912 lpfc_sli4_rq_release(hrq, drq);
2d7dbc4c
JS
13913 dma_buf = lpfc_sli_rqbuf_get(phba, hrq);
13914 if (!dma_buf) {
13915 hrq->RQ_no_buf_found++;
13916 spin_unlock_irqrestore(&phba->hbalock, iflags);
13917 goto out;
13918 }
13919 spin_unlock_irqrestore(&phba->hbalock, iflags);
13920 hrq->RQ_rcv_buf++;
547077a4 13921 hrq->RQ_buf_posted--;
2d7dbc4c
JS
13922 fc_hdr = (struct fc_frame_header *)dma_buf->hbuf.virt;
13923
13924 /* Just some basic sanity checks on FCP Command frame */
13925 fctl = (fc_hdr->fh_f_ctl[0] << 16 |
13926 fc_hdr->fh_f_ctl[1] << 8 |
13927 fc_hdr->fh_f_ctl[2]);
13928 if (((fctl &
13929 (FC_FC_FIRST_SEQ | FC_FC_END_SEQ | FC_FC_SEQ_INIT)) !=
13930 (FC_FC_FIRST_SEQ | FC_FC_END_SEQ | FC_FC_SEQ_INIT)) ||
13931 (fc_hdr->fh_seq_cnt != 0)) /* 0 byte swapped is still 0 */
13932 goto drop;
13933
13934 if (fc_hdr->fh_type == FC_TYPE_FCP) {
13935 dma_buf->bytes_recv = bf_get(lpfc_rcqe_length, rcqe);
d613b6a7 13936 lpfc_nvmet_unsol_fcp_event(
66d7ce93 13937 phba, idx, dma_buf,
c8a4ce0b 13938 cq->isr_timestamp);
2d7dbc4c
JS
13939 return false;
13940 }
13941drop:
13942 lpfc_in_buf_free(phba, &dma_buf->dbuf);
13943 break;
2d7dbc4c 13944 case FC_STATUS_INSUFF_BUF_FRM_DISC:
547077a4
JS
13945 if (phba->nvmet_support) {
13946 tgtp = phba->targetport->private;
13947 lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_NVME,
13948 "6401 RQE Error x%x, posted %d err_cnt "
13949 "%d: %x %x %x\n",
13950 status, hrq->RQ_buf_posted,
13951 hrq->RQ_no_posted_buf,
13952 atomic_read(&tgtp->rcv_fcp_cmd_in),
13953 atomic_read(&tgtp->rcv_fcp_cmd_out),
13954 atomic_read(&tgtp->xmt_fcp_release));
13955 }
13956 /* fallthrough */
13957
13958 case FC_STATUS_INSUFF_BUF_NEED_BUF:
2d7dbc4c
JS
13959 hrq->RQ_no_posted_buf++;
13960 /* Post more buffers if possible */
2d7dbc4c
JS
13961 break;
13962 }
13963out:
13964 return workposted;
13965}
13966
4f774513 13967/**
895427bd 13968 * lpfc_sli4_fp_handle_cqe - Process fast-path work queue completion entry
4f774513
JS
13969 * @cq: Pointer to the completion queue.
13970 * @eqe: Pointer to fast-path completion queue entry.
13971 *
13972 * This routine process a fast-path work queue completion entry from fast-path
13973 * event queue for FCP command response completion.
13974 **/
13975static int
895427bd 13976lpfc_sli4_fp_handle_cqe(struct lpfc_hba *phba, struct lpfc_queue *cq,
4f774513
JS
13977 struct lpfc_cqe *cqe)
13978{
13979 struct lpfc_wcqe_release wcqe;
13980 bool workposted = false;
13981
13982 /* Copy the work queue CQE and convert endian order if needed */
48f8fdb4 13983 lpfc_sli4_pcimem_bcopy(cqe, &wcqe, sizeof(struct lpfc_cqe));
4f774513
JS
13984
13985 /* Check and process for different type of WCQE and dispatch */
13986 switch (bf_get(lpfc_wcqe_c_code, &wcqe)) {
13987 case CQE_CODE_COMPL_WQE:
895427bd 13988 case CQE_CODE_NVME_ERSP:
b84daac9 13989 cq->CQ_wq++;
4f774513 13990 /* Process the WQ complete event */
98fc5dd9 13991 phba->last_completion_time = jiffies;
895427bd
JS
13992 if ((cq->subtype == LPFC_FCP) || (cq->subtype == LPFC_NVME))
13993 lpfc_sli4_fp_handle_fcp_wcqe(phba, cq,
13994 (struct lpfc_wcqe_complete *)&wcqe);
13995 if (cq->subtype == LPFC_NVME_LS)
13996 lpfc_sli4_fp_handle_fcp_wcqe(phba, cq,
4f774513
JS
13997 (struct lpfc_wcqe_complete *)&wcqe);
13998 break;
13999 case CQE_CODE_RELEASE_WQE:
b84daac9 14000 cq->CQ_release_wqe++;
4f774513
JS
14001 /* Process the WQ release event */
14002 lpfc_sli4_fp_handle_rel_wcqe(phba, cq,
14003 (struct lpfc_wcqe_release *)&wcqe);
14004 break;
14005 case CQE_CODE_XRI_ABORTED:
b84daac9 14006 cq->CQ_xri_aborted++;
4f774513 14007 /* Process the WQ XRI abort event */
bc73905a 14008 phba->last_completion_time = jiffies;
4f774513
JS
14009 workposted = lpfc_sli4_sp_handle_abort_xri_wcqe(phba, cq,
14010 (struct sli4_wcqe_xri_aborted *)&wcqe);
14011 break;
895427bd
JS
14012 case CQE_CODE_RECEIVE_V1:
14013 case CQE_CODE_RECEIVE:
14014 phba->last_completion_time = jiffies;
2d7dbc4c
JS
14015 if (cq->subtype == LPFC_NVMET) {
14016 workposted = lpfc_sli4_nvmet_handle_rcqe(
14017 phba, cq, (struct lpfc_rcqe *)&wcqe);
14018 }
895427bd 14019 break;
4f774513
JS
14020 default:
14021 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
895427bd 14022 "0144 Not a valid CQE code: x%x\n",
4f774513
JS
14023 bf_get(lpfc_wcqe_c_code, &wcqe));
14024 break;
14025 }
14026 return workposted;
14027}
14028
14029/**
67d12733 14030 * lpfc_sli4_hba_handle_eqe - Process a fast-path event queue entry
4f774513
JS
14031 * @phba: Pointer to HBA context object.
14032 * @eqe: Pointer to fast-path event queue entry.
14033 *
14034 * This routine process a event queue entry from the fast-path event queue.
14035 * It will check the MajorCode and MinorCode to determine this is for a
14036 * completion event on a completion queue, if not, an error shall be logged
14037 * and just return. Otherwise, it will get to the corresponding completion
14038 * queue and process all the entries on the completion queue, rearm the
14039 * completion queue, and then return.
14040 **/
f485c18d 14041static void
67d12733
JS
14042lpfc_sli4_hba_handle_eqe(struct lpfc_hba *phba, struct lpfc_eqe *eqe,
14043 uint32_t qidx)
4f774513 14044{
895427bd 14045 struct lpfc_queue *cq = NULL;
2d7dbc4c 14046 uint16_t cqid, id;
4f774513 14047
cb5172ea 14048 if (unlikely(bf_get_le32(lpfc_eqe_major_code, eqe) != 0)) {
4f774513 14049 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
67d12733 14050 "0366 Not a valid completion "
4f774513 14051 "event: majorcode=x%x, minorcode=x%x\n",
cb5172ea
JS
14052 bf_get_le32(lpfc_eqe_major_code, eqe),
14053 bf_get_le32(lpfc_eqe_minor_code, eqe));
f485c18d 14054 return;
4f774513
JS
14055 }
14056
67d12733
JS
14057 /* Get the reference to the corresponding CQ */
14058 cqid = bf_get_le32(lpfc_eqe_resource_id, eqe);
14059
cdb42bec 14060 /* First check for NVME/SCSI completion */
5e5b511d
JS
14061 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
14062 (cqid == phba->sli4_hba.hdwq[qidx].nvme_cq_map)) {
cdb42bec
JS
14063 /* Process NVME / NVMET command completion */
14064 cq = phba->sli4_hba.hdwq[qidx].nvme_cq;
14065 goto process_cq;
14066 }
14067
14068 if (cqid == phba->sli4_hba.hdwq[qidx].fcp_cq_map) {
14069 /* Process FCP command completion */
14070 cq = phba->sli4_hba.hdwq[qidx].fcp_cq;
14071 goto process_cq;
14072 }
14073
14074 /* Next check for NVMET completion */
2d7dbc4c
JS
14075 if (phba->cfg_nvmet_mrq && phba->sli4_hba.nvmet_cqset) {
14076 id = phba->sli4_hba.nvmet_cqset[0]->queue_id;
14077 if ((cqid >= id) && (cqid < (id + phba->cfg_nvmet_mrq))) {
14078 /* Process NVMET unsol rcv */
14079 cq = phba->sli4_hba.nvmet_cqset[cqid - id];
14080 goto process_cq;
14081 }
67d12733
JS
14082 }
14083
895427bd
JS
14084 if (phba->sli4_hba.nvmels_cq &&
14085 (cqid == phba->sli4_hba.nvmels_cq->queue_id)) {
14086 /* Process NVME unsol rcv */
14087 cq = phba->sli4_hba.nvmels_cq;
14088 }
14089
14090 /* Otherwise this is a Slow path event */
14091 if (cq == NULL) {
cdb42bec
JS
14092 lpfc_sli4_sp_handle_eqe(phba, eqe,
14093 phba->sli4_hba.hdwq[qidx].hba_eq);
f485c18d 14094 return;
4f774513
JS
14095 }
14096
895427bd 14097process_cq:
4f774513
JS
14098 if (unlikely(cqid != cq->queue_id)) {
14099 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14100 "0368 Miss-matched fast-path completion "
14101 "queue identifier: eqcqid=%d, fcpcqid=%d\n",
14102 cqid, cq->queue_id);
f485c18d 14103 return;
4f774513
JS
14104 }
14105
895427bd 14106 /* Save EQ associated with this CQ */
cdb42bec 14107 cq->assoc_qp = phba->sli4_hba.hdwq[qidx].hba_eq;
895427bd 14108
f485c18d
DK
14109 if (!queue_work(phba->wq, &cq->irqwork))
14110 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14111 "0363 Cannot schedule soft IRQ "
14112 "for CQ eqcqid=%d, cqid=%d on CPU %d\n",
14113 cqid, cq->queue_id, smp_processor_id());
14114}
14115
14116/**
14117 * lpfc_sli4_hba_process_cq - Process a fast-path event queue entry
14118 * @phba: Pointer to HBA context object.
14119 * @eqe: Pointer to fast-path event queue entry.
14120 *
14121 * This routine process a event queue entry from the fast-path event queue.
14122 * It will check the MajorCode and MinorCode to determine this is for a
14123 * completion event on a completion queue, if not, an error shall be logged
14124 * and just return. Otherwise, it will get to the corresponding completion
14125 * queue and process all the entries on the completion queue, rearm the
14126 * completion queue, and then return.
14127 **/
14128static void
14129lpfc_sli4_hba_process_cq(struct work_struct *work)
14130{
14131 struct lpfc_queue *cq =
14132 container_of(work, struct lpfc_queue, irqwork);
14133 struct lpfc_hba *phba = cq->phba;
14134 struct lpfc_cqe *cqe;
14135 bool workposted = false;
14136 int ccount = 0;
14137
4f774513
JS
14138 /* Process all the entries to the CQ */
14139 while ((cqe = lpfc_sli4_cq_get(cq))) {
c8a4ce0b
DK
14140#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
14141 if (phba->ktime_on)
14142 cq->isr_timestamp = ktime_get_ns();
14143 else
14144 cq->isr_timestamp = 0;
14145#endif
895427bd 14146 workposted |= lpfc_sli4_fp_handle_cqe(phba, cq, cqe);
f485c18d 14147 if (!(++ccount % cq->entry_repost))
7869da18 14148 break;
4f774513
JS
14149 }
14150
b84daac9 14151 /* Track the max number of CQEs processed in 1 EQ */
f485c18d
DK
14152 if (ccount > cq->CQ_max_cqe)
14153 cq->CQ_max_cqe = ccount;
14154 cq->assoc_qp->EQ_cqe_cnt += ccount;
b84daac9 14155
4f774513 14156 /* Catch the no cq entry condition */
f485c18d 14157 if (unlikely(ccount == 0))
4f774513
JS
14158 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14159 "0369 No entry from fast-path completion "
14160 "queue fcpcqid=%d\n", cq->queue_id);
14161
14162 /* In any case, flash and re-arm the CQ */
b71413dd 14163 phba->sli4_hba.sli4_cq_release(cq, LPFC_QUEUE_REARM);
4f774513
JS
14164
14165 /* wake up worker thread if there are works to be done */
14166 if (workposted)
14167 lpfc_worker_wake_up(phba);
14168}
14169
14170static void
14171lpfc_sli4_eq_flush(struct lpfc_hba *phba, struct lpfc_queue *eq)
14172{
14173 struct lpfc_eqe *eqe;
14174
14175 /* walk all the EQ entries and drop on the floor */
14176 while ((eqe = lpfc_sli4_eq_get(eq)))
14177 ;
14178
14179 /* Clear and re-arm the EQ */
b71413dd 14180 phba->sli4_hba.sli4_eq_release(eq, LPFC_QUEUE_REARM);
4f774513
JS
14181}
14182
1ba981fd 14183
4f774513 14184/**
67d12733 14185 * lpfc_sli4_hba_intr_handler - HBA interrupt handler to SLI-4 device
4f774513
JS
14186 * @irq: Interrupt number.
14187 * @dev_id: The device context pointer.
14188 *
14189 * This function is directly called from the PCI layer as an interrupt
14190 * service routine when device with SLI-4 interface spec is enabled with
14191 * MSI-X multi-message interrupt mode and there is a fast-path FCP IOCB
14192 * ring event in the HBA. However, when the device is enabled with either
14193 * MSI or Pin-IRQ interrupt mode, this function is called as part of the
14194 * device-level interrupt handler. When the PCI slot is in error recovery
14195 * or the HBA is undergoing initialization, the interrupt handler will not
14196 * process the interrupt. The SCSI FCP fast-path ring event are handled in
14197 * the intrrupt context. This function is called without any lock held.
14198 * It gets the hbalock to access and update SLI data structures. Note that,
14199 * the FCP EQ to FCP CQ are one-to-one map such that the FCP EQ index is
14200 * equal to that of FCP CQ index.
14201 *
67d12733
JS
14202 * The link attention and ELS ring attention events are handled
14203 * by the worker thread. The interrupt handler signals the worker thread
14204 * and returns for these events. This function is called without any lock
14205 * held. It gets the hbalock to access and update SLI data structures.
14206 *
4f774513
JS
14207 * This function returns IRQ_HANDLED when interrupt is handled else it
14208 * returns IRQ_NONE.
14209 **/
14210irqreturn_t
67d12733 14211lpfc_sli4_hba_intr_handler(int irq, void *dev_id)
4f774513
JS
14212{
14213 struct lpfc_hba *phba;
895427bd 14214 struct lpfc_hba_eq_hdl *hba_eq_hdl;
4f774513
JS
14215 struct lpfc_queue *fpeq;
14216 struct lpfc_eqe *eqe;
14217 unsigned long iflag;
14218 int ecount = 0;
895427bd 14219 int hba_eqidx;
4f774513
JS
14220
14221 /* Get the driver's phba structure from the dev_id */
895427bd
JS
14222 hba_eq_hdl = (struct lpfc_hba_eq_hdl *)dev_id;
14223 phba = hba_eq_hdl->phba;
14224 hba_eqidx = hba_eq_hdl->idx;
4f774513
JS
14225
14226 if (unlikely(!phba))
14227 return IRQ_NONE;
cdb42bec 14228 if (unlikely(!phba->sli4_hba.hdwq))
5350d872 14229 return IRQ_NONE;
4f774513
JS
14230
14231 /* Get to the EQ struct associated with this vector */
cdb42bec 14232 fpeq = phba->sli4_hba.hdwq[hba_eqidx].hba_eq;
2e90f4b5
JS
14233 if (unlikely(!fpeq))
14234 return IRQ_NONE;
4f774513 14235
ba20c853 14236 if (lpfc_fcp_look_ahead) {
895427bd 14237 if (atomic_dec_and_test(&hba_eq_hdl->hba_eq_in_use))
b71413dd 14238 phba->sli4_hba.sli4_eq_clr_intr(fpeq);
ba20c853 14239 else {
895427bd 14240 atomic_inc(&hba_eq_hdl->hba_eq_in_use);
ba20c853
JS
14241 return IRQ_NONE;
14242 }
14243 }
14244
4f774513
JS
14245 /* Check device state for handling interrupt */
14246 if (unlikely(lpfc_intr_state_check(phba))) {
14247 /* Check again for link_state with lock held */
14248 spin_lock_irqsave(&phba->hbalock, iflag);
14249 if (phba->link_state < LPFC_LINK_DOWN)
14250 /* Flush, clear interrupt, and rearm the EQ */
14251 lpfc_sli4_eq_flush(phba, fpeq);
14252 spin_unlock_irqrestore(&phba->hbalock, iflag);
ba20c853 14253 if (lpfc_fcp_look_ahead)
895427bd 14254 atomic_inc(&hba_eq_hdl->hba_eq_in_use);
4f774513
JS
14255 return IRQ_NONE;
14256 }
14257
14258 /*
14259 * Process all the event on FCP fast-path EQ
14260 */
14261 while ((eqe = lpfc_sli4_eq_get(fpeq))) {
f485c18d
DK
14262 lpfc_sli4_hba_handle_eqe(phba, eqe, hba_eqidx);
14263 if (!(++ecount % fpeq->entry_repost))
7869da18 14264 break;
b84daac9 14265 fpeq->EQ_processed++;
4f774513
JS
14266 }
14267
b84daac9
JS
14268 /* Track the max number of EQEs processed in 1 intr */
14269 if (ecount > fpeq->EQ_max_eqe)
14270 fpeq->EQ_max_eqe = ecount;
14271
4f774513 14272 /* Always clear and re-arm the fast-path EQ */
b71413dd 14273 phba->sli4_hba.sli4_eq_release(fpeq, LPFC_QUEUE_REARM);
4f774513
JS
14274
14275 if (unlikely(ecount == 0)) {
b84daac9 14276 fpeq->EQ_no_entry++;
ba20c853
JS
14277
14278 if (lpfc_fcp_look_ahead) {
895427bd 14279 atomic_inc(&hba_eq_hdl->hba_eq_in_use);
ba20c853
JS
14280 return IRQ_NONE;
14281 }
14282
4f774513
JS
14283 if (phba->intr_type == MSIX)
14284 /* MSI-X treated interrupt served as no EQ share INT */
14285 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
14286 "0358 MSI-X interrupt with no EQE\n");
14287 else
14288 /* Non MSI-X treated on interrupt as EQ share INT */
14289 return IRQ_NONE;
14290 }
14291
ba20c853 14292 if (lpfc_fcp_look_ahead)
895427bd
JS
14293 atomic_inc(&hba_eq_hdl->hba_eq_in_use);
14294
4f774513
JS
14295 return IRQ_HANDLED;
14296} /* lpfc_sli4_fp_intr_handler */
14297
14298/**
14299 * lpfc_sli4_intr_handler - Device-level interrupt handler for SLI-4 device
14300 * @irq: Interrupt number.
14301 * @dev_id: The device context pointer.
14302 *
14303 * This function is the device-level interrupt handler to device with SLI-4
14304 * interface spec, called from the PCI layer when either MSI or Pin-IRQ
14305 * interrupt mode is enabled and there is an event in the HBA which requires
14306 * driver attention. This function invokes the slow-path interrupt attention
14307 * handling function and fast-path interrupt attention handling function in
14308 * turn to process the relevant HBA attention events. This function is called
14309 * without any lock held. It gets the hbalock to access and update SLI data
14310 * structures.
14311 *
14312 * This function returns IRQ_HANDLED when interrupt is handled, else it
14313 * returns IRQ_NONE.
14314 **/
14315irqreturn_t
14316lpfc_sli4_intr_handler(int irq, void *dev_id)
14317{
14318 struct lpfc_hba *phba;
67d12733
JS
14319 irqreturn_t hba_irq_rc;
14320 bool hba_handled = false;
895427bd 14321 int qidx;
4f774513
JS
14322
14323 /* Get the driver's phba structure from the dev_id */
14324 phba = (struct lpfc_hba *)dev_id;
14325
14326 if (unlikely(!phba))
14327 return IRQ_NONE;
14328
4f774513
JS
14329 /*
14330 * Invoke fast-path host attention interrupt handling as appropriate.
14331 */
cdb42bec 14332 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
67d12733 14333 hba_irq_rc = lpfc_sli4_hba_intr_handler(irq,
895427bd 14334 &phba->sli4_hba.hba_eq_hdl[qidx]);
67d12733 14335 if (hba_irq_rc == IRQ_HANDLED)
1ba981fd
JS
14336 hba_handled |= true;
14337 }
14338
67d12733 14339 return (hba_handled == true) ? IRQ_HANDLED : IRQ_NONE;
4f774513
JS
14340} /* lpfc_sli4_intr_handler */
14341
14342/**
14343 * lpfc_sli4_queue_free - free a queue structure and associated memory
14344 * @queue: The queue structure to free.
14345 *
b595076a 14346 * This function frees a queue structure and the DMAable memory used for
4f774513
JS
14347 * the host resident queue. This function must be called after destroying the
14348 * queue on the HBA.
14349 **/
14350void
14351lpfc_sli4_queue_free(struct lpfc_queue *queue)
14352{
14353 struct lpfc_dmabuf *dmabuf;
14354
14355 if (!queue)
14356 return;
14357
14358 while (!list_empty(&queue->page_list)) {
14359 list_remove_head(&queue->page_list, dmabuf, struct lpfc_dmabuf,
14360 list);
81b96eda 14361 dma_free_coherent(&queue->phba->pcidev->dev, queue->page_size,
4f774513
JS
14362 dmabuf->virt, dmabuf->phys);
14363 kfree(dmabuf);
14364 }
895427bd
JS
14365 if (queue->rqbp) {
14366 lpfc_free_rq_buffer(queue->phba, queue);
14367 kfree(queue->rqbp);
14368 }
d1f525aa
JS
14369
14370 if (!list_empty(&queue->wq_list))
14371 list_del(&queue->wq_list);
14372
4f774513
JS
14373 kfree(queue);
14374 return;
14375}
14376
14377/**
14378 * lpfc_sli4_queue_alloc - Allocate and initialize a queue structure
14379 * @phba: The HBA that this queue is being created on.
81b96eda 14380 * @page_size: The size of a queue page
4f774513
JS
14381 * @entry_size: The size of each queue entry for this queue.
14382 * @entry count: The number of entries that this queue will handle.
14383 *
14384 * This function allocates a queue structure and the DMAable memory used for
14385 * the host resident queue. This function must be called before creating the
14386 * queue on the HBA.
14387 **/
14388struct lpfc_queue *
81b96eda
JS
14389lpfc_sli4_queue_alloc(struct lpfc_hba *phba, uint32_t page_size,
14390 uint32_t entry_size, uint32_t entry_count)
4f774513
JS
14391{
14392 struct lpfc_queue *queue;
14393 struct lpfc_dmabuf *dmabuf;
14394 int x, total_qe_count;
14395 void *dma_pointer;
cb5172ea 14396 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
4f774513 14397
cb5172ea 14398 if (!phba->sli4_hba.pc_sli4_params.supported)
81b96eda 14399 hw_page_size = page_size;
cb5172ea 14400
4f774513
JS
14401 queue = kzalloc(sizeof(struct lpfc_queue) +
14402 (sizeof(union sli4_qe) * entry_count), GFP_KERNEL);
14403 if (!queue)
14404 return NULL;
cb5172ea
JS
14405 queue->page_count = (ALIGN(entry_size * entry_count,
14406 hw_page_size))/hw_page_size;
895427bd
JS
14407
14408 /* If needed, Adjust page count to match the max the adapter supports */
4e87eb2f
EM
14409 if (phba->sli4_hba.pc_sli4_params.wqpcnt &&
14410 (queue->page_count > phba->sli4_hba.pc_sli4_params.wqpcnt))
895427bd
JS
14411 queue->page_count = phba->sli4_hba.pc_sli4_params.wqpcnt;
14412
4f774513 14413 INIT_LIST_HEAD(&queue->list);
895427bd 14414 INIT_LIST_HEAD(&queue->wq_list);
6e8e1c14 14415 INIT_LIST_HEAD(&queue->wqfull_list);
4f774513
JS
14416 INIT_LIST_HEAD(&queue->page_list);
14417 INIT_LIST_HEAD(&queue->child_list);
81b96eda
JS
14418
14419 /* Set queue parameters now. If the system cannot provide memory
14420 * resources, the free routine needs to know what was allocated.
14421 */
14422 queue->entry_size = entry_size;
14423 queue->entry_count = entry_count;
14424 queue->page_size = hw_page_size;
14425 queue->phba = phba;
14426
4f774513
JS
14427 for (x = 0, total_qe_count = 0; x < queue->page_count; x++) {
14428 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
14429 if (!dmabuf)
14430 goto out_fail;
1aee383d
JP
14431 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev,
14432 hw_page_size, &dmabuf->phys,
14433 GFP_KERNEL);
4f774513
JS
14434 if (!dmabuf->virt) {
14435 kfree(dmabuf);
14436 goto out_fail;
14437 }
14438 dmabuf->buffer_tag = x;
14439 list_add_tail(&dmabuf->list, &queue->page_list);
14440 /* initialize queue's entry array */
14441 dma_pointer = dmabuf->virt;
14442 for (; total_qe_count < entry_count &&
cb5172ea 14443 dma_pointer < (hw_page_size + dmabuf->virt);
4f774513
JS
14444 total_qe_count++, dma_pointer += entry_size) {
14445 queue->qe[total_qe_count].address = dma_pointer;
14446 }
14447 }
f485c18d
DK
14448 INIT_WORK(&queue->irqwork, lpfc_sli4_hba_process_cq);
14449 INIT_WORK(&queue->spwork, lpfc_sli4_sp_process_cq);
4f774513 14450
64eb4dcb
JS
14451 /* entry_repost will be set during q creation */
14452
4f774513
JS
14453 return queue;
14454out_fail:
14455 lpfc_sli4_queue_free(queue);
14456 return NULL;
14457}
14458
962bc51b
JS
14459/**
14460 * lpfc_dual_chute_pci_bar_map - Map pci base address register to host memory
14461 * @phba: HBA structure that indicates port to create a queue on.
14462 * @pci_barset: PCI BAR set flag.
14463 *
14464 * This function shall perform iomap of the specified PCI BAR address to host
14465 * memory address if not already done so and return it. The returned host
14466 * memory address can be NULL.
14467 */
14468static void __iomem *
14469lpfc_dual_chute_pci_bar_map(struct lpfc_hba *phba, uint16_t pci_barset)
14470{
962bc51b
JS
14471 if (!phba->pcidev)
14472 return NULL;
962bc51b
JS
14473
14474 switch (pci_barset) {
14475 case WQ_PCI_BAR_0_AND_1:
962bc51b
JS
14476 return phba->pci_bar0_memmap_p;
14477 case WQ_PCI_BAR_2_AND_3:
962bc51b
JS
14478 return phba->pci_bar2_memmap_p;
14479 case WQ_PCI_BAR_4_AND_5:
962bc51b
JS
14480 return phba->pci_bar4_memmap_p;
14481 default:
14482 break;
14483 }
14484 return NULL;
14485}
14486
173edbb2 14487/**
895427bd 14488 * lpfc_modify_hba_eq_delay - Modify Delay Multiplier on FCP EQs
173edbb2
JS
14489 * @phba: HBA structure that indicates port to create a queue on.
14490 * @startq: The starting FCP EQ to modify
14491 *
14492 * This function sends an MODIFY_EQ_DELAY mailbox command to the HBA.
43140ca6
JS
14493 * The command allows up to LPFC_MAX_EQ_DELAY_EQID_CNT EQ ID's to be
14494 * updated in one mailbox command.
173edbb2
JS
14495 *
14496 * The @phba struct is used to send mailbox command to HBA. The @startq
14497 * is used to get the starting FCP EQ to change.
14498 * This function is asynchronous and will wait for the mailbox
14499 * command to finish before continuing.
14500 *
14501 * On success this function will return a zero. If unable to allocate enough
14502 * memory this function will return -ENOMEM. If the queue create mailbox command
14503 * fails this function will return -ENXIO.
14504 **/
a2fc4aef 14505int
0cf07f84
JS
14506lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq,
14507 uint32_t numq, uint32_t imax)
173edbb2
JS
14508{
14509 struct lpfc_mbx_modify_eq_delay *eq_delay;
14510 LPFC_MBOXQ_t *mbox;
14511 struct lpfc_queue *eq;
14512 int cnt, rc, length, status = 0;
14513 uint32_t shdr_status, shdr_add_status;
0cf07f84 14514 uint32_t result, val;
895427bd 14515 int qidx;
173edbb2
JS
14516 union lpfc_sli4_cfg_shdr *shdr;
14517 uint16_t dmult;
14518
cdb42bec 14519 if (startq >= phba->cfg_hdw_queue)
173edbb2
JS
14520 return 0;
14521
14522 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
14523 if (!mbox)
14524 return -ENOMEM;
14525 length = (sizeof(struct lpfc_mbx_modify_eq_delay) -
14526 sizeof(struct lpfc_sli4_cfg_mhdr));
14527 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14528 LPFC_MBOX_OPCODE_MODIFY_EQ_DELAY,
14529 length, LPFC_SLI4_MBX_EMBED);
14530 eq_delay = &mbox->u.mqe.un.eq_delay;
14531
14532 /* Calculate delay multiper from maximum interrupt per second */
cdb42bec 14533 result = imax / phba->cfg_hdw_queue;
895427bd 14534 if (result > LPFC_DMULT_CONST || result == 0)
ee02006b
JS
14535 dmult = 0;
14536 else
14537 dmult = LPFC_DMULT_CONST/result - 1;
0cf07f84
JS
14538 if (dmult > LPFC_DMULT_MAX)
14539 dmult = LPFC_DMULT_MAX;
173edbb2
JS
14540
14541 cnt = 0;
cdb42bec
JS
14542 for (qidx = startq; qidx < phba->cfg_hdw_queue; qidx++) {
14543 eq = phba->sli4_hba.hdwq[qidx].hba_eq;
173edbb2
JS
14544 if (!eq)
14545 continue;
0cf07f84 14546 eq->q_mode = imax;
173edbb2
JS
14547 eq_delay->u.request.eq[cnt].eq_id = eq->queue_id;
14548 eq_delay->u.request.eq[cnt].phase = 0;
14549 eq_delay->u.request.eq[cnt].delay_multi = dmult;
14550 cnt++;
0cf07f84
JS
14551
14552 /* q_mode is only used for auto_imax */
14553 if (phba->sli.sli_flag & LPFC_SLI_USE_EQDR) {
14554 /* Use EQ Delay Register method for q_mode */
14555
14556 /* Convert for EQ Delay register */
14557 val = phba->cfg_fcp_imax;
14558 if (val) {
14559 /* First, interrupts per sec per EQ */
cdb42bec 14560 val = phba->cfg_fcp_imax / phba->cfg_hdw_queue;
0cf07f84
JS
14561
14562 /* us delay between each interrupt */
14563 val = LPFC_SEC_TO_USEC / val;
14564 }
14565 eq->q_mode = val;
14566 } else {
14567 eq->q_mode = imax;
14568 }
14569
14570 if (cnt >= numq)
173edbb2
JS
14571 break;
14572 }
14573 eq_delay->u.request.num_eq = cnt;
14574
14575 mbox->vport = phba->pport;
14576 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
3e1f0718
JS
14577 mbox->ctx_buf = NULL;
14578 mbox->ctx_ndlp = NULL;
173edbb2
JS
14579 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
14580 shdr = (union lpfc_sli4_cfg_shdr *) &eq_delay->header.cfg_shdr;
14581 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
14582 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
14583 if (shdr_status || shdr_add_status || rc) {
14584 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14585 "2512 MODIFY_EQ_DELAY mailbox failed with "
14586 "status x%x add_status x%x, mbx status x%x\n",
14587 shdr_status, shdr_add_status, rc);
14588 status = -ENXIO;
14589 }
14590 mempool_free(mbox, phba->mbox_mem_pool);
14591 return status;
14592}
14593
4f774513
JS
14594/**
14595 * lpfc_eq_create - Create an Event Queue on the HBA
14596 * @phba: HBA structure that indicates port to create a queue on.
14597 * @eq: The queue structure to use to create the event queue.
14598 * @imax: The maximum interrupt per second limit.
14599 *
14600 * This function creates an event queue, as detailed in @eq, on a port,
14601 * described by @phba by sending an EQ_CREATE mailbox command to the HBA.
14602 *
14603 * The @phba struct is used to send mailbox command to HBA. The @eq struct
14604 * is used to get the entry count and entry size that are necessary to
14605 * determine the number of pages to allocate and use for this queue. This
14606 * function will send the EQ_CREATE mailbox command to the HBA to setup the
14607 * event queue. This function is asynchronous and will wait for the mailbox
14608 * command to finish before continuing.
14609 *
14610 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
14611 * memory this function will return -ENOMEM. If the queue create mailbox command
14612 * fails this function will return -ENXIO.
4f774513 14613 **/
a2fc4aef 14614int
ee02006b 14615lpfc_eq_create(struct lpfc_hba *phba, struct lpfc_queue *eq, uint32_t imax)
4f774513
JS
14616{
14617 struct lpfc_mbx_eq_create *eq_create;
14618 LPFC_MBOXQ_t *mbox;
14619 int rc, length, status = 0;
14620 struct lpfc_dmabuf *dmabuf;
14621 uint32_t shdr_status, shdr_add_status;
14622 union lpfc_sli4_cfg_shdr *shdr;
14623 uint16_t dmult;
49198b37
JS
14624 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
14625
2e90f4b5
JS
14626 /* sanity check on queue memory */
14627 if (!eq)
14628 return -ENODEV;
49198b37
JS
14629 if (!phba->sli4_hba.pc_sli4_params.supported)
14630 hw_page_size = SLI4_PAGE_SIZE;
4f774513
JS
14631
14632 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
14633 if (!mbox)
14634 return -ENOMEM;
14635 length = (sizeof(struct lpfc_mbx_eq_create) -
14636 sizeof(struct lpfc_sli4_cfg_mhdr));
14637 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14638 LPFC_MBOX_OPCODE_EQ_CREATE,
14639 length, LPFC_SLI4_MBX_EMBED);
14640 eq_create = &mbox->u.mqe.un.eq_create;
7365f6fd 14641 shdr = (union lpfc_sli4_cfg_shdr *) &eq_create->header.cfg_shdr;
4f774513
JS
14642 bf_set(lpfc_mbx_eq_create_num_pages, &eq_create->u.request,
14643 eq->page_count);
14644 bf_set(lpfc_eq_context_size, &eq_create->u.request.context,
14645 LPFC_EQE_SIZE);
14646 bf_set(lpfc_eq_context_valid, &eq_create->u.request.context, 1);
7365f6fd
JS
14647
14648 /* Use version 2 of CREATE_EQ if eqav is set */
14649 if (phba->sli4_hba.pc_sli4_params.eqav) {
14650 bf_set(lpfc_mbox_hdr_version, &shdr->request,
14651 LPFC_Q_CREATE_VERSION_2);
14652 bf_set(lpfc_eq_context_autovalid, &eq_create->u.request.context,
14653 phba->sli4_hba.pc_sli4_params.eqav);
14654 }
14655
2c9c5a00
JS
14656 /* don't setup delay multiplier using EQ_CREATE */
14657 dmult = 0;
4f774513
JS
14658 bf_set(lpfc_eq_context_delay_multi, &eq_create->u.request.context,
14659 dmult);
14660 switch (eq->entry_count) {
14661 default:
14662 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14663 "0360 Unsupported EQ count. (%d)\n",
14664 eq->entry_count);
14665 if (eq->entry_count < 256)
14666 return -EINVAL;
14667 /* otherwise default to smallest count (drop through) */
14668 case 256:
14669 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14670 LPFC_EQ_CNT_256);
14671 break;
14672 case 512:
14673 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14674 LPFC_EQ_CNT_512);
14675 break;
14676 case 1024:
14677 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14678 LPFC_EQ_CNT_1024);
14679 break;
14680 case 2048:
14681 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14682 LPFC_EQ_CNT_2048);
14683 break;
14684 case 4096:
14685 bf_set(lpfc_eq_context_count, &eq_create->u.request.context,
14686 LPFC_EQ_CNT_4096);
14687 break;
14688 }
14689 list_for_each_entry(dmabuf, &eq->page_list, list) {
49198b37 14690 memset(dmabuf->virt, 0, hw_page_size);
4f774513
JS
14691 eq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
14692 putPaddrLow(dmabuf->phys);
14693 eq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
14694 putPaddrHigh(dmabuf->phys);
14695 }
14696 mbox->vport = phba->pport;
14697 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
3e1f0718
JS
14698 mbox->ctx_buf = NULL;
14699 mbox->ctx_ndlp = NULL;
4f774513 14700 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
4f774513
JS
14701 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
14702 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
14703 if (shdr_status || shdr_add_status || rc) {
14704 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14705 "2500 EQ_CREATE mailbox failed with "
14706 "status x%x add_status x%x, mbx status x%x\n",
14707 shdr_status, shdr_add_status, rc);
14708 status = -ENXIO;
14709 }
14710 eq->type = LPFC_EQ;
14711 eq->subtype = LPFC_NONE;
14712 eq->queue_id = bf_get(lpfc_mbx_eq_create_q_id, &eq_create->u.response);
14713 if (eq->queue_id == 0xFFFF)
14714 status = -ENXIO;
14715 eq->host_index = 0;
14716 eq->hba_index = 0;
64eb4dcb 14717 eq->entry_repost = LPFC_EQ_REPOST;
4f774513 14718
8fa38513 14719 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
14720 return status;
14721}
14722
14723/**
14724 * lpfc_cq_create - Create a Completion Queue on the HBA
14725 * @phba: HBA structure that indicates port to create a queue on.
14726 * @cq: The queue structure to use to create the completion queue.
14727 * @eq: The event queue to bind this completion queue to.
14728 *
14729 * This function creates a completion queue, as detailed in @wq, on a port,
14730 * described by @phba by sending a CQ_CREATE mailbox command to the HBA.
14731 *
14732 * The @phba struct is used to send mailbox command to HBA. The @cq struct
14733 * is used to get the entry count and entry size that are necessary to
14734 * determine the number of pages to allocate and use for this queue. The @eq
14735 * is used to indicate which event queue to bind this completion queue to. This
14736 * function will send the CQ_CREATE mailbox command to the HBA to setup the
14737 * completion queue. This function is asynchronous and will wait for the mailbox
14738 * command to finish before continuing.
14739 *
14740 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
14741 * memory this function will return -ENOMEM. If the queue create mailbox command
14742 * fails this function will return -ENXIO.
4f774513 14743 **/
a2fc4aef 14744int
4f774513
JS
14745lpfc_cq_create(struct lpfc_hba *phba, struct lpfc_queue *cq,
14746 struct lpfc_queue *eq, uint32_t type, uint32_t subtype)
14747{
14748 struct lpfc_mbx_cq_create *cq_create;
14749 struct lpfc_dmabuf *dmabuf;
14750 LPFC_MBOXQ_t *mbox;
14751 int rc, length, status = 0;
14752 uint32_t shdr_status, shdr_add_status;
14753 union lpfc_sli4_cfg_shdr *shdr;
49198b37 14754
2e90f4b5
JS
14755 /* sanity check on queue memory */
14756 if (!cq || !eq)
14757 return -ENODEV;
49198b37 14758
4f774513
JS
14759 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
14760 if (!mbox)
14761 return -ENOMEM;
14762 length = (sizeof(struct lpfc_mbx_cq_create) -
14763 sizeof(struct lpfc_sli4_cfg_mhdr));
14764 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
14765 LPFC_MBOX_OPCODE_CQ_CREATE,
14766 length, LPFC_SLI4_MBX_EMBED);
14767 cq_create = &mbox->u.mqe.un.cq_create;
5a6f133e 14768 shdr = (union lpfc_sli4_cfg_shdr *) &cq_create->header.cfg_shdr;
4f774513
JS
14769 bf_set(lpfc_mbx_cq_create_num_pages, &cq_create->u.request,
14770 cq->page_count);
14771 bf_set(lpfc_cq_context_event, &cq_create->u.request.context, 1);
14772 bf_set(lpfc_cq_context_valid, &cq_create->u.request.context, 1);
5a6f133e
JS
14773 bf_set(lpfc_mbox_hdr_version, &shdr->request,
14774 phba->sli4_hba.pc_sli4_params.cqv);
14775 if (phba->sli4_hba.pc_sli4_params.cqv == LPFC_Q_CREATE_VERSION_2) {
81b96eda
JS
14776 bf_set(lpfc_mbx_cq_create_page_size, &cq_create->u.request,
14777 (cq->page_size / SLI4_PAGE_SIZE));
5a6f133e
JS
14778 bf_set(lpfc_cq_eq_id_2, &cq_create->u.request.context,
14779 eq->queue_id);
7365f6fd
JS
14780 bf_set(lpfc_cq_context_autovalid, &cq_create->u.request.context,
14781 phba->sli4_hba.pc_sli4_params.cqav);
5a6f133e
JS
14782 } else {
14783 bf_set(lpfc_cq_eq_id, &cq_create->u.request.context,
14784 eq->queue_id);
14785 }
4f774513 14786 switch (cq->entry_count) {
81b96eda
JS
14787 case 2048:
14788 case 4096:
14789 if (phba->sli4_hba.pc_sli4_params.cqv ==
14790 LPFC_Q_CREATE_VERSION_2) {
14791 cq_create->u.request.context.lpfc_cq_context_count =
14792 cq->entry_count;
14793 bf_set(lpfc_cq_context_count,
14794 &cq_create->u.request.context,
14795 LPFC_CQ_CNT_WORD7);
14796 break;
14797 }
14798 /* Fall Thru */
4f774513
JS
14799 default:
14800 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2ea259ee 14801 "0361 Unsupported CQ count: "
64eb4dcb 14802 "entry cnt %d sz %d pg cnt %d\n",
2ea259ee 14803 cq->entry_count, cq->entry_size,
64eb4dcb 14804 cq->page_count);
4f4c1863
JS
14805 if (cq->entry_count < 256) {
14806 status = -EINVAL;
14807 goto out;
14808 }
4f774513
JS
14809 /* otherwise default to smallest count (drop through) */
14810 case 256:
14811 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
14812 LPFC_CQ_CNT_256);
14813 break;
14814 case 512:
14815 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
14816 LPFC_CQ_CNT_512);
14817 break;
14818 case 1024:
14819 bf_set(lpfc_cq_context_count, &cq_create->u.request.context,
14820 LPFC_CQ_CNT_1024);
14821 break;
14822 }
14823 list_for_each_entry(dmabuf, &cq->page_list, list) {
81b96eda 14824 memset(dmabuf->virt, 0, cq->page_size);
4f774513
JS
14825 cq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
14826 putPaddrLow(dmabuf->phys);
14827 cq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
14828 putPaddrHigh(dmabuf->phys);
14829 }
14830 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
14831
14832 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
14833 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
14834 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
14835 if (shdr_status || shdr_add_status || rc) {
14836 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14837 "2501 CQ_CREATE mailbox failed with "
14838 "status x%x add_status x%x, mbx status x%x\n",
14839 shdr_status, shdr_add_status, rc);
14840 status = -ENXIO;
14841 goto out;
14842 }
14843 cq->queue_id = bf_get(lpfc_mbx_cq_create_q_id, &cq_create->u.response);
14844 if (cq->queue_id == 0xFFFF) {
14845 status = -ENXIO;
14846 goto out;
14847 }
14848 /* link the cq onto the parent eq child list */
14849 list_add_tail(&cq->list, &eq->child_list);
14850 /* Set up completion queue's type and subtype */
14851 cq->type = type;
14852 cq->subtype = subtype;
14853 cq->queue_id = bf_get(lpfc_mbx_cq_create_q_id, &cq_create->u.response);
2a622bfb 14854 cq->assoc_qid = eq->queue_id;
4f774513
JS
14855 cq->host_index = 0;
14856 cq->hba_index = 0;
64eb4dcb 14857 cq->entry_repost = LPFC_CQ_REPOST;
4f774513 14858
8fa38513
JS
14859out:
14860 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
14861 return status;
14862}
14863
2d7dbc4c
JS
14864/**
14865 * lpfc_cq_create_set - Create a set of Completion Queues on the HBA for MRQ
14866 * @phba: HBA structure that indicates port to create a queue on.
14867 * @cqp: The queue structure array to use to create the completion queues.
cdb42bec 14868 * @hdwq: The hardware queue array with the EQ to bind completion queues to.
2d7dbc4c
JS
14869 *
14870 * This function creates a set of completion queue, s to support MRQ
14871 * as detailed in @cqp, on a port,
14872 * described by @phba by sending a CREATE_CQ_SET mailbox command to the HBA.
14873 *
14874 * The @phba struct is used to send mailbox command to HBA. The @cq struct
14875 * is used to get the entry count and entry size that are necessary to
14876 * determine the number of pages to allocate and use for this queue. The @eq
14877 * is used to indicate which event queue to bind this completion queue to. This
14878 * function will send the CREATE_CQ_SET mailbox command to the HBA to setup the
14879 * completion queue. This function is asynchronous and will wait for the mailbox
14880 * command to finish before continuing.
14881 *
14882 * On success this function will return a zero. If unable to allocate enough
14883 * memory this function will return -ENOMEM. If the queue create mailbox command
14884 * fails this function will return -ENXIO.
14885 **/
14886int
14887lpfc_cq_create_set(struct lpfc_hba *phba, struct lpfc_queue **cqp,
cdb42bec
JS
14888 struct lpfc_sli4_hdw_queue *hdwq, uint32_t type,
14889 uint32_t subtype)
2d7dbc4c
JS
14890{
14891 struct lpfc_queue *cq;
14892 struct lpfc_queue *eq;
14893 struct lpfc_mbx_cq_create_set *cq_set;
14894 struct lpfc_dmabuf *dmabuf;
14895 LPFC_MBOXQ_t *mbox;
14896 int rc, length, alloclen, status = 0;
14897 int cnt, idx, numcq, page_idx = 0;
14898 uint32_t shdr_status, shdr_add_status;
14899 union lpfc_sli4_cfg_shdr *shdr;
14900 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
14901
14902 /* sanity check on queue memory */
14903 numcq = phba->cfg_nvmet_mrq;
cdb42bec 14904 if (!cqp || !hdwq || !numcq)
2d7dbc4c 14905 return -ENODEV;
2d7dbc4c
JS
14906
14907 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
14908 if (!mbox)
14909 return -ENOMEM;
14910
14911 length = sizeof(struct lpfc_mbx_cq_create_set);
14912 length += ((numcq * cqp[0]->page_count) *
14913 sizeof(struct dma_address));
14914 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
14915 LPFC_MBOX_OPCODE_FCOE_CQ_CREATE_SET, length,
14916 LPFC_SLI4_MBX_NEMBED);
14917 if (alloclen < length) {
14918 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14919 "3098 Allocated DMA memory size (%d) is "
14920 "less than the requested DMA memory size "
14921 "(%d)\n", alloclen, length);
14922 status = -ENOMEM;
14923 goto out;
14924 }
14925 cq_set = mbox->sge_array->addr[0];
14926 shdr = (union lpfc_sli4_cfg_shdr *)&cq_set->cfg_shdr;
14927 bf_set(lpfc_mbox_hdr_version, &shdr->request, 0);
14928
14929 for (idx = 0; idx < numcq; idx++) {
14930 cq = cqp[idx];
cdb42bec 14931 eq = hdwq[idx].hba_eq;
2d7dbc4c
JS
14932 if (!cq || !eq) {
14933 status = -ENOMEM;
14934 goto out;
14935 }
81b96eda
JS
14936 if (!phba->sli4_hba.pc_sli4_params.supported)
14937 hw_page_size = cq->page_size;
2d7dbc4c
JS
14938
14939 switch (idx) {
14940 case 0:
14941 bf_set(lpfc_mbx_cq_create_set_page_size,
14942 &cq_set->u.request,
14943 (hw_page_size / SLI4_PAGE_SIZE));
14944 bf_set(lpfc_mbx_cq_create_set_num_pages,
14945 &cq_set->u.request, cq->page_count);
14946 bf_set(lpfc_mbx_cq_create_set_evt,
14947 &cq_set->u.request, 1);
14948 bf_set(lpfc_mbx_cq_create_set_valid,
14949 &cq_set->u.request, 1);
14950 bf_set(lpfc_mbx_cq_create_set_cqe_size,
14951 &cq_set->u.request, 0);
14952 bf_set(lpfc_mbx_cq_create_set_num_cq,
14953 &cq_set->u.request, numcq);
7365f6fd
JS
14954 bf_set(lpfc_mbx_cq_create_set_autovalid,
14955 &cq_set->u.request,
14956 phba->sli4_hba.pc_sli4_params.cqav);
2d7dbc4c 14957 switch (cq->entry_count) {
81b96eda
JS
14958 case 2048:
14959 case 4096:
14960 if (phba->sli4_hba.pc_sli4_params.cqv ==
14961 LPFC_Q_CREATE_VERSION_2) {
14962 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
14963 &cq_set->u.request,
14964 cq->entry_count);
14965 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
14966 &cq_set->u.request,
14967 LPFC_CQ_CNT_WORD7);
14968 break;
14969 }
14970 /* Fall Thru */
2d7dbc4c
JS
14971 default:
14972 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
14973 "3118 Bad CQ count. (%d)\n",
14974 cq->entry_count);
14975 if (cq->entry_count < 256) {
14976 status = -EINVAL;
14977 goto out;
14978 }
14979 /* otherwise default to smallest (drop thru) */
14980 case 256:
14981 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
14982 &cq_set->u.request, LPFC_CQ_CNT_256);
14983 break;
14984 case 512:
14985 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
14986 &cq_set->u.request, LPFC_CQ_CNT_512);
14987 break;
14988 case 1024:
14989 bf_set(lpfc_mbx_cq_create_set_cqe_cnt,
14990 &cq_set->u.request, LPFC_CQ_CNT_1024);
14991 break;
14992 }
14993 bf_set(lpfc_mbx_cq_create_set_eq_id0,
14994 &cq_set->u.request, eq->queue_id);
14995 break;
14996 case 1:
14997 bf_set(lpfc_mbx_cq_create_set_eq_id1,
14998 &cq_set->u.request, eq->queue_id);
14999 break;
15000 case 2:
15001 bf_set(lpfc_mbx_cq_create_set_eq_id2,
15002 &cq_set->u.request, eq->queue_id);
15003 break;
15004 case 3:
15005 bf_set(lpfc_mbx_cq_create_set_eq_id3,
15006 &cq_set->u.request, eq->queue_id);
15007 break;
15008 case 4:
15009 bf_set(lpfc_mbx_cq_create_set_eq_id4,
15010 &cq_set->u.request, eq->queue_id);
15011 break;
15012 case 5:
15013 bf_set(lpfc_mbx_cq_create_set_eq_id5,
15014 &cq_set->u.request, eq->queue_id);
15015 break;
15016 case 6:
15017 bf_set(lpfc_mbx_cq_create_set_eq_id6,
15018 &cq_set->u.request, eq->queue_id);
15019 break;
15020 case 7:
15021 bf_set(lpfc_mbx_cq_create_set_eq_id7,
15022 &cq_set->u.request, eq->queue_id);
15023 break;
15024 case 8:
15025 bf_set(lpfc_mbx_cq_create_set_eq_id8,
15026 &cq_set->u.request, eq->queue_id);
15027 break;
15028 case 9:
15029 bf_set(lpfc_mbx_cq_create_set_eq_id9,
15030 &cq_set->u.request, eq->queue_id);
15031 break;
15032 case 10:
15033 bf_set(lpfc_mbx_cq_create_set_eq_id10,
15034 &cq_set->u.request, eq->queue_id);
15035 break;
15036 case 11:
15037 bf_set(lpfc_mbx_cq_create_set_eq_id11,
15038 &cq_set->u.request, eq->queue_id);
15039 break;
15040 case 12:
15041 bf_set(lpfc_mbx_cq_create_set_eq_id12,
15042 &cq_set->u.request, eq->queue_id);
15043 break;
15044 case 13:
15045 bf_set(lpfc_mbx_cq_create_set_eq_id13,
15046 &cq_set->u.request, eq->queue_id);
15047 break;
15048 case 14:
15049 bf_set(lpfc_mbx_cq_create_set_eq_id14,
15050 &cq_set->u.request, eq->queue_id);
15051 break;
15052 case 15:
15053 bf_set(lpfc_mbx_cq_create_set_eq_id15,
15054 &cq_set->u.request, eq->queue_id);
15055 break;
15056 }
15057
15058 /* link the cq onto the parent eq child list */
15059 list_add_tail(&cq->list, &eq->child_list);
15060 /* Set up completion queue's type and subtype */
15061 cq->type = type;
15062 cq->subtype = subtype;
15063 cq->assoc_qid = eq->queue_id;
15064 cq->host_index = 0;
15065 cq->hba_index = 0;
64eb4dcb 15066 cq->entry_repost = LPFC_CQ_REPOST;
81b96eda 15067 cq->chann = idx;
2d7dbc4c
JS
15068
15069 rc = 0;
15070 list_for_each_entry(dmabuf, &cq->page_list, list) {
15071 memset(dmabuf->virt, 0, hw_page_size);
15072 cnt = page_idx + dmabuf->buffer_tag;
15073 cq_set->u.request.page[cnt].addr_lo =
15074 putPaddrLow(dmabuf->phys);
15075 cq_set->u.request.page[cnt].addr_hi =
15076 putPaddrHigh(dmabuf->phys);
15077 rc++;
15078 }
15079 page_idx += rc;
15080 }
15081
15082 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15083
15084 /* The IOCTL status is embedded in the mailbox subheader. */
15085 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15086 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15087 if (shdr_status || shdr_add_status || rc) {
15088 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15089 "3119 CQ_CREATE_SET mailbox failed with "
15090 "status x%x add_status x%x, mbx status x%x\n",
15091 shdr_status, shdr_add_status, rc);
15092 status = -ENXIO;
15093 goto out;
15094 }
15095 rc = bf_get(lpfc_mbx_cq_create_set_base_id, &cq_set->u.response);
15096 if (rc == 0xFFFF) {
15097 status = -ENXIO;
15098 goto out;
15099 }
15100
15101 for (idx = 0; idx < numcq; idx++) {
15102 cq = cqp[idx];
15103 cq->queue_id = rc + idx;
15104 }
15105
15106out:
15107 lpfc_sli4_mbox_cmd_free(phba, mbox);
15108 return status;
15109}
15110
b19a061a
JS
15111/**
15112 * lpfc_mq_create_fb_init - Send MCC_CREATE without async events registration
15113 * @phba: HBA structure that indicates port to create a queue on.
15114 * @mq: The queue structure to use to create the mailbox queue.
15115 * @mbox: An allocated pointer to type LPFC_MBOXQ_t
15116 * @cq: The completion queue to associate with this cq.
15117 *
15118 * This function provides failback (fb) functionality when the
15119 * mq_create_ext fails on older FW generations. It's purpose is identical
15120 * to mq_create_ext otherwise.
15121 *
15122 * This routine cannot fail as all attributes were previously accessed and
15123 * initialized in mq_create_ext.
15124 **/
15125static void
15126lpfc_mq_create_fb_init(struct lpfc_hba *phba, struct lpfc_queue *mq,
15127 LPFC_MBOXQ_t *mbox, struct lpfc_queue *cq)
15128{
15129 struct lpfc_mbx_mq_create *mq_create;
15130 struct lpfc_dmabuf *dmabuf;
15131 int length;
15132
15133 length = (sizeof(struct lpfc_mbx_mq_create) -
15134 sizeof(struct lpfc_sli4_cfg_mhdr));
15135 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
15136 LPFC_MBOX_OPCODE_MQ_CREATE,
15137 length, LPFC_SLI4_MBX_EMBED);
15138 mq_create = &mbox->u.mqe.un.mq_create;
15139 bf_set(lpfc_mbx_mq_create_num_pages, &mq_create->u.request,
15140 mq->page_count);
15141 bf_set(lpfc_mq_context_cq_id, &mq_create->u.request.context,
15142 cq->queue_id);
15143 bf_set(lpfc_mq_context_valid, &mq_create->u.request.context, 1);
15144 switch (mq->entry_count) {
15145 case 16:
5a6f133e
JS
15146 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15147 LPFC_MQ_RING_SIZE_16);
b19a061a
JS
15148 break;
15149 case 32:
5a6f133e
JS
15150 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15151 LPFC_MQ_RING_SIZE_32);
b19a061a
JS
15152 break;
15153 case 64:
5a6f133e
JS
15154 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15155 LPFC_MQ_RING_SIZE_64);
b19a061a
JS
15156 break;
15157 case 128:
5a6f133e
JS
15158 bf_set(lpfc_mq_context_ring_size, &mq_create->u.request.context,
15159 LPFC_MQ_RING_SIZE_128);
b19a061a
JS
15160 break;
15161 }
15162 list_for_each_entry(dmabuf, &mq->page_list, list) {
15163 mq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15164 putPaddrLow(dmabuf->phys);
15165 mq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15166 putPaddrHigh(dmabuf->phys);
15167 }
15168}
15169
04c68496
JS
15170/**
15171 * lpfc_mq_create - Create a mailbox Queue on the HBA
15172 * @phba: HBA structure that indicates port to create a queue on.
15173 * @mq: The queue structure to use to create the mailbox queue.
b19a061a
JS
15174 * @cq: The completion queue to associate with this cq.
15175 * @subtype: The queue's subtype.
04c68496
JS
15176 *
15177 * This function creates a mailbox queue, as detailed in @mq, on a port,
15178 * described by @phba by sending a MQ_CREATE mailbox command to the HBA.
15179 *
15180 * The @phba struct is used to send mailbox command to HBA. The @cq struct
15181 * is used to get the entry count and entry size that are necessary to
15182 * determine the number of pages to allocate and use for this queue. This
15183 * function will send the MQ_CREATE mailbox command to the HBA to setup the
15184 * mailbox queue. This function is asynchronous and will wait for the mailbox
15185 * command to finish before continuing.
15186 *
15187 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15188 * memory this function will return -ENOMEM. If the queue create mailbox command
15189 * fails this function will return -ENXIO.
04c68496 15190 **/
b19a061a 15191int32_t
04c68496
JS
15192lpfc_mq_create(struct lpfc_hba *phba, struct lpfc_queue *mq,
15193 struct lpfc_queue *cq, uint32_t subtype)
15194{
15195 struct lpfc_mbx_mq_create *mq_create;
b19a061a 15196 struct lpfc_mbx_mq_create_ext *mq_create_ext;
04c68496
JS
15197 struct lpfc_dmabuf *dmabuf;
15198 LPFC_MBOXQ_t *mbox;
15199 int rc, length, status = 0;
15200 uint32_t shdr_status, shdr_add_status;
15201 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15202 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
04c68496 15203
2e90f4b5
JS
15204 /* sanity check on queue memory */
15205 if (!mq || !cq)
15206 return -ENODEV;
49198b37
JS
15207 if (!phba->sli4_hba.pc_sli4_params.supported)
15208 hw_page_size = SLI4_PAGE_SIZE;
b19a061a 15209
04c68496
JS
15210 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15211 if (!mbox)
15212 return -ENOMEM;
b19a061a 15213 length = (sizeof(struct lpfc_mbx_mq_create_ext) -
04c68496
JS
15214 sizeof(struct lpfc_sli4_cfg_mhdr));
15215 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
b19a061a 15216 LPFC_MBOX_OPCODE_MQ_CREATE_EXT,
04c68496 15217 length, LPFC_SLI4_MBX_EMBED);
b19a061a
JS
15218
15219 mq_create_ext = &mbox->u.mqe.un.mq_create_ext;
5a6f133e 15220 shdr = (union lpfc_sli4_cfg_shdr *) &mq_create_ext->header.cfg_shdr;
70f3c073
JS
15221 bf_set(lpfc_mbx_mq_create_ext_num_pages,
15222 &mq_create_ext->u.request, mq->page_count);
15223 bf_set(lpfc_mbx_mq_create_ext_async_evt_link,
15224 &mq_create_ext->u.request, 1);
15225 bf_set(lpfc_mbx_mq_create_ext_async_evt_fip,
b19a061a
JS
15226 &mq_create_ext->u.request, 1);
15227 bf_set(lpfc_mbx_mq_create_ext_async_evt_group5,
15228 &mq_create_ext->u.request, 1);
70f3c073
JS
15229 bf_set(lpfc_mbx_mq_create_ext_async_evt_fc,
15230 &mq_create_ext->u.request, 1);
15231 bf_set(lpfc_mbx_mq_create_ext_async_evt_sli,
15232 &mq_create_ext->u.request, 1);
b19a061a 15233 bf_set(lpfc_mq_context_valid, &mq_create_ext->u.request.context, 1);
5a6f133e
JS
15234 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15235 phba->sli4_hba.pc_sli4_params.mqv);
15236 if (phba->sli4_hba.pc_sli4_params.mqv == LPFC_Q_CREATE_VERSION_1)
15237 bf_set(lpfc_mbx_mq_create_ext_cq_id, &mq_create_ext->u.request,
15238 cq->queue_id);
15239 else
15240 bf_set(lpfc_mq_context_cq_id, &mq_create_ext->u.request.context,
15241 cq->queue_id);
04c68496
JS
15242 switch (mq->entry_count) {
15243 default:
15244 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15245 "0362 Unsupported MQ count. (%d)\n",
15246 mq->entry_count);
4f4c1863
JS
15247 if (mq->entry_count < 16) {
15248 status = -EINVAL;
15249 goto out;
15250 }
04c68496
JS
15251 /* otherwise default to smallest count (drop through) */
15252 case 16:
5a6f133e
JS
15253 bf_set(lpfc_mq_context_ring_size,
15254 &mq_create_ext->u.request.context,
15255 LPFC_MQ_RING_SIZE_16);
04c68496
JS
15256 break;
15257 case 32:
5a6f133e
JS
15258 bf_set(lpfc_mq_context_ring_size,
15259 &mq_create_ext->u.request.context,
15260 LPFC_MQ_RING_SIZE_32);
04c68496
JS
15261 break;
15262 case 64:
5a6f133e
JS
15263 bf_set(lpfc_mq_context_ring_size,
15264 &mq_create_ext->u.request.context,
15265 LPFC_MQ_RING_SIZE_64);
04c68496
JS
15266 break;
15267 case 128:
5a6f133e
JS
15268 bf_set(lpfc_mq_context_ring_size,
15269 &mq_create_ext->u.request.context,
15270 LPFC_MQ_RING_SIZE_128);
04c68496
JS
15271 break;
15272 }
15273 list_for_each_entry(dmabuf, &mq->page_list, list) {
49198b37 15274 memset(dmabuf->virt, 0, hw_page_size);
b19a061a 15275 mq_create_ext->u.request.page[dmabuf->buffer_tag].addr_lo =
04c68496 15276 putPaddrLow(dmabuf->phys);
b19a061a 15277 mq_create_ext->u.request.page[dmabuf->buffer_tag].addr_hi =
04c68496
JS
15278 putPaddrHigh(dmabuf->phys);
15279 }
15280 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
b19a061a
JS
15281 mq->queue_id = bf_get(lpfc_mbx_mq_create_q_id,
15282 &mq_create_ext->u.response);
15283 if (rc != MBX_SUCCESS) {
15284 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15285 "2795 MQ_CREATE_EXT failed with "
15286 "status x%x. Failback to MQ_CREATE.\n",
15287 rc);
15288 lpfc_mq_create_fb_init(phba, mq, mbox, cq);
15289 mq_create = &mbox->u.mqe.un.mq_create;
15290 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15291 shdr = (union lpfc_sli4_cfg_shdr *) &mq_create->header.cfg_shdr;
15292 mq->queue_id = bf_get(lpfc_mbx_mq_create_q_id,
15293 &mq_create->u.response);
15294 }
15295
04c68496 15296 /* The IOCTL status is embedded in the mailbox subheader. */
04c68496
JS
15297 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15298 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15299 if (shdr_status || shdr_add_status || rc) {
15300 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15301 "2502 MQ_CREATE mailbox failed with "
15302 "status x%x add_status x%x, mbx status x%x\n",
15303 shdr_status, shdr_add_status, rc);
15304 status = -ENXIO;
15305 goto out;
15306 }
04c68496
JS
15307 if (mq->queue_id == 0xFFFF) {
15308 status = -ENXIO;
15309 goto out;
15310 }
15311 mq->type = LPFC_MQ;
2a622bfb 15312 mq->assoc_qid = cq->queue_id;
04c68496
JS
15313 mq->subtype = subtype;
15314 mq->host_index = 0;
15315 mq->hba_index = 0;
64eb4dcb 15316 mq->entry_repost = LPFC_MQ_REPOST;
04c68496
JS
15317
15318 /* link the mq onto the parent cq child list */
15319 list_add_tail(&mq->list, &cq->child_list);
15320out:
8fa38513 15321 mempool_free(mbox, phba->mbox_mem_pool);
04c68496
JS
15322 return status;
15323}
15324
4f774513
JS
15325/**
15326 * lpfc_wq_create - Create a Work Queue on the HBA
15327 * @phba: HBA structure that indicates port to create a queue on.
15328 * @wq: The queue structure to use to create the work queue.
15329 * @cq: The completion queue to bind this work queue to.
15330 * @subtype: The subtype of the work queue indicating its functionality.
15331 *
15332 * This function creates a work queue, as detailed in @wq, on a port, described
15333 * by @phba by sending a WQ_CREATE mailbox command to the HBA.
15334 *
15335 * The @phba struct is used to send mailbox command to HBA. The @wq struct
15336 * is used to get the entry count and entry size that are necessary to
15337 * determine the number of pages to allocate and use for this queue. The @cq
15338 * is used to indicate which completion queue to bind this work queue to. This
15339 * function will send the WQ_CREATE mailbox command to the HBA to setup the
15340 * work queue. This function is asynchronous and will wait for the mailbox
15341 * command to finish before continuing.
15342 *
15343 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15344 * memory this function will return -ENOMEM. If the queue create mailbox command
15345 * fails this function will return -ENXIO.
4f774513 15346 **/
a2fc4aef 15347int
4f774513
JS
15348lpfc_wq_create(struct lpfc_hba *phba, struct lpfc_queue *wq,
15349 struct lpfc_queue *cq, uint32_t subtype)
15350{
15351 struct lpfc_mbx_wq_create *wq_create;
15352 struct lpfc_dmabuf *dmabuf;
15353 LPFC_MBOXQ_t *mbox;
15354 int rc, length, status = 0;
15355 uint32_t shdr_status, shdr_add_status;
15356 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15357 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
5a6f133e 15358 struct dma_address *page;
962bc51b
JS
15359 void __iomem *bar_memmap_p;
15360 uint32_t db_offset;
15361 uint16_t pci_barset;
1351e69f
JS
15362 uint8_t dpp_barset;
15363 uint32_t dpp_offset;
15364 unsigned long pg_addr;
81b96eda 15365 uint8_t wq_create_version;
49198b37 15366
2e90f4b5
JS
15367 /* sanity check on queue memory */
15368 if (!wq || !cq)
15369 return -ENODEV;
49198b37 15370 if (!phba->sli4_hba.pc_sli4_params.supported)
81b96eda 15371 hw_page_size = wq->page_size;
4f774513
JS
15372
15373 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15374 if (!mbox)
15375 return -ENOMEM;
15376 length = (sizeof(struct lpfc_mbx_wq_create) -
15377 sizeof(struct lpfc_sli4_cfg_mhdr));
15378 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15379 LPFC_MBOX_OPCODE_FCOE_WQ_CREATE,
15380 length, LPFC_SLI4_MBX_EMBED);
15381 wq_create = &mbox->u.mqe.un.wq_create;
5a6f133e 15382 shdr = (union lpfc_sli4_cfg_shdr *) &wq_create->header.cfg_shdr;
4f774513
JS
15383 bf_set(lpfc_mbx_wq_create_num_pages, &wq_create->u.request,
15384 wq->page_count);
15385 bf_set(lpfc_mbx_wq_create_cq_id, &wq_create->u.request,
15386 cq->queue_id);
0c651878
JS
15387
15388 /* wqv is the earliest version supported, NOT the latest */
5a6f133e
JS
15389 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15390 phba->sli4_hba.pc_sli4_params.wqv);
962bc51b 15391
c176ffa0
JS
15392 if ((phba->sli4_hba.pc_sli4_params.wqsize & LPFC_WQ_SZ128_SUPPORT) ||
15393 (wq->page_size > SLI4_PAGE_SIZE))
81b96eda
JS
15394 wq_create_version = LPFC_Q_CREATE_VERSION_1;
15395 else
15396 wq_create_version = LPFC_Q_CREATE_VERSION_0;
15397
0c651878 15398
1351e69f
JS
15399 if (phba->sli4_hba.pc_sli4_params.wqsize & LPFC_WQ_SZ128_SUPPORT)
15400 wq_create_version = LPFC_Q_CREATE_VERSION_1;
15401 else
15402 wq_create_version = LPFC_Q_CREATE_VERSION_0;
15403
15404 switch (wq_create_version) {
0c651878 15405 case LPFC_Q_CREATE_VERSION_1:
5a6f133e
JS
15406 bf_set(lpfc_mbx_wq_create_wqe_count, &wq_create->u.request_1,
15407 wq->entry_count);
3f247de7
JS
15408 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15409 LPFC_Q_CREATE_VERSION_1);
15410
5a6f133e
JS
15411 switch (wq->entry_size) {
15412 default:
15413 case 64:
15414 bf_set(lpfc_mbx_wq_create_wqe_size,
15415 &wq_create->u.request_1,
15416 LPFC_WQ_WQE_SIZE_64);
15417 break;
15418 case 128:
15419 bf_set(lpfc_mbx_wq_create_wqe_size,
15420 &wq_create->u.request_1,
15421 LPFC_WQ_WQE_SIZE_128);
15422 break;
15423 }
1351e69f
JS
15424 /* Request DPP by default */
15425 bf_set(lpfc_mbx_wq_create_dpp_req, &wq_create->u.request_1, 1);
8ea73db4
JS
15426 bf_set(lpfc_mbx_wq_create_page_size,
15427 &wq_create->u.request_1,
81b96eda 15428 (wq->page_size / SLI4_PAGE_SIZE));
5a6f133e 15429 page = wq_create->u.request_1.page;
0c651878
JS
15430 break;
15431 default:
1351e69f
JS
15432 page = wq_create->u.request.page;
15433 break;
5a6f133e 15434 }
0c651878 15435
4f774513 15436 list_for_each_entry(dmabuf, &wq->page_list, list) {
49198b37 15437 memset(dmabuf->virt, 0, hw_page_size);
5a6f133e
JS
15438 page[dmabuf->buffer_tag].addr_lo = putPaddrLow(dmabuf->phys);
15439 page[dmabuf->buffer_tag].addr_hi = putPaddrHigh(dmabuf->phys);
4f774513 15440 }
962bc51b
JS
15441
15442 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
15443 bf_set(lpfc_mbx_wq_create_dua, &wq_create->u.request, 1);
15444
4f774513
JS
15445 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15446 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
15447 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15448 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15449 if (shdr_status || shdr_add_status || rc) {
15450 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15451 "2503 WQ_CREATE mailbox failed with "
15452 "status x%x add_status x%x, mbx status x%x\n",
15453 shdr_status, shdr_add_status, rc);
15454 status = -ENXIO;
15455 goto out;
15456 }
1351e69f
JS
15457
15458 if (wq_create_version == LPFC_Q_CREATE_VERSION_0)
15459 wq->queue_id = bf_get(lpfc_mbx_wq_create_q_id,
15460 &wq_create->u.response);
15461 else
15462 wq->queue_id = bf_get(lpfc_mbx_wq_create_v1_q_id,
15463 &wq_create->u.response_1);
15464
4f774513
JS
15465 if (wq->queue_id == 0xFFFF) {
15466 status = -ENXIO;
15467 goto out;
15468 }
1351e69f
JS
15469
15470 wq->db_format = LPFC_DB_LIST_FORMAT;
15471 if (wq_create_version == LPFC_Q_CREATE_VERSION_0) {
15472 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE) {
15473 wq->db_format = bf_get(lpfc_mbx_wq_create_db_format,
15474 &wq_create->u.response);
15475 if ((wq->db_format != LPFC_DB_LIST_FORMAT) &&
15476 (wq->db_format != LPFC_DB_RING_FORMAT)) {
15477 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15478 "3265 WQ[%d] doorbell format "
15479 "not supported: x%x\n",
15480 wq->queue_id, wq->db_format);
15481 status = -EINVAL;
15482 goto out;
15483 }
15484 pci_barset = bf_get(lpfc_mbx_wq_create_bar_set,
15485 &wq_create->u.response);
15486 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15487 pci_barset);
15488 if (!bar_memmap_p) {
15489 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15490 "3263 WQ[%d] failed to memmap "
15491 "pci barset:x%x\n",
15492 wq->queue_id, pci_barset);
15493 status = -ENOMEM;
15494 goto out;
15495 }
15496 db_offset = wq_create->u.response.doorbell_offset;
15497 if ((db_offset != LPFC_ULP0_WQ_DOORBELL) &&
15498 (db_offset != LPFC_ULP1_WQ_DOORBELL)) {
15499 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15500 "3252 WQ[%d] doorbell offset "
15501 "not supported: x%x\n",
15502 wq->queue_id, db_offset);
15503 status = -EINVAL;
15504 goto out;
15505 }
15506 wq->db_regaddr = bar_memmap_p + db_offset;
15507 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15508 "3264 WQ[%d]: barset:x%x, offset:x%x, "
15509 "format:x%x\n", wq->queue_id,
15510 pci_barset, db_offset, wq->db_format);
15511 } else
15512 wq->db_regaddr = phba->sli4_hba.WQDBregaddr;
962bc51b 15513 } else {
1351e69f
JS
15514 /* Check if DPP was honored by the firmware */
15515 wq->dpp_enable = bf_get(lpfc_mbx_wq_create_dpp_rsp,
15516 &wq_create->u.response_1);
15517 if (wq->dpp_enable) {
15518 pci_barset = bf_get(lpfc_mbx_wq_create_v1_bar_set,
15519 &wq_create->u.response_1);
15520 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15521 pci_barset);
15522 if (!bar_memmap_p) {
15523 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15524 "3267 WQ[%d] failed to memmap "
15525 "pci barset:x%x\n",
15526 wq->queue_id, pci_barset);
15527 status = -ENOMEM;
15528 goto out;
15529 }
15530 db_offset = wq_create->u.response_1.doorbell_offset;
15531 wq->db_regaddr = bar_memmap_p + db_offset;
15532 wq->dpp_id = bf_get(lpfc_mbx_wq_create_dpp_id,
15533 &wq_create->u.response_1);
15534 dpp_barset = bf_get(lpfc_mbx_wq_create_dpp_bar,
15535 &wq_create->u.response_1);
15536 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba,
15537 dpp_barset);
15538 if (!bar_memmap_p) {
15539 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15540 "3268 WQ[%d] failed to memmap "
15541 "pci barset:x%x\n",
15542 wq->queue_id, dpp_barset);
15543 status = -ENOMEM;
15544 goto out;
15545 }
15546 dpp_offset = wq_create->u.response_1.dpp_offset;
15547 wq->dpp_regaddr = bar_memmap_p + dpp_offset;
15548 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15549 "3271 WQ[%d]: barset:x%x, offset:x%x, "
15550 "dpp_id:x%x dpp_barset:x%x "
15551 "dpp_offset:x%x\n",
15552 wq->queue_id, pci_barset, db_offset,
15553 wq->dpp_id, dpp_barset, dpp_offset);
15554
15555 /* Enable combined writes for DPP aperture */
15556 pg_addr = (unsigned long)(wq->dpp_regaddr) & PAGE_MASK;
15557#ifdef CONFIG_X86
15558 rc = set_memory_wc(pg_addr, 1);
15559 if (rc) {
15560 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15561 "3272 Cannot setup Combined "
15562 "Write on WQ[%d] - disable DPP\n",
15563 wq->queue_id);
15564 phba->cfg_enable_dpp = 0;
15565 }
15566#else
15567 phba->cfg_enable_dpp = 0;
15568#endif
15569 } else
15570 wq->db_regaddr = phba->sli4_hba.WQDBregaddr;
962bc51b 15571 }
895427bd
JS
15572 wq->pring = kzalloc(sizeof(struct lpfc_sli_ring), GFP_KERNEL);
15573 if (wq->pring == NULL) {
15574 status = -ENOMEM;
15575 goto out;
15576 }
4f774513 15577 wq->type = LPFC_WQ;
2a622bfb 15578 wq->assoc_qid = cq->queue_id;
4f774513
JS
15579 wq->subtype = subtype;
15580 wq->host_index = 0;
15581 wq->hba_index = 0;
ff78d8f9 15582 wq->entry_repost = LPFC_RELEASE_NOTIFICATION_INTERVAL;
4f774513
JS
15583
15584 /* link the wq onto the parent cq child list */
15585 list_add_tail(&wq->list, &cq->child_list);
15586out:
8fa38513 15587 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
15588 return status;
15589}
15590
15591/**
15592 * lpfc_rq_create - Create a Receive Queue on the HBA
15593 * @phba: HBA structure that indicates port to create a queue on.
15594 * @hrq: The queue structure to use to create the header receive queue.
15595 * @drq: The queue structure to use to create the data receive queue.
15596 * @cq: The completion queue to bind this work queue to.
15597 *
15598 * This function creates a receive buffer queue pair , as detailed in @hrq and
15599 * @drq, on a port, described by @phba by sending a RQ_CREATE mailbox command
15600 * to the HBA.
15601 *
15602 * The @phba struct is used to send mailbox command to HBA. The @drq and @hrq
15603 * struct is used to get the entry count that is necessary to determine the
15604 * number of pages to use for this queue. The @cq is used to indicate which
15605 * completion queue to bind received buffers that are posted to these queues to.
15606 * This function will send the RQ_CREATE mailbox command to the HBA to setup the
15607 * receive queue pair. This function is asynchronous and will wait for the
15608 * mailbox command to finish before continuing.
15609 *
15610 * On success this function will return a zero. If unable to allocate enough
d439d286
JS
15611 * memory this function will return -ENOMEM. If the queue create mailbox command
15612 * fails this function will return -ENXIO.
4f774513 15613 **/
a2fc4aef 15614int
4f774513
JS
15615lpfc_rq_create(struct lpfc_hba *phba, struct lpfc_queue *hrq,
15616 struct lpfc_queue *drq, struct lpfc_queue *cq, uint32_t subtype)
15617{
15618 struct lpfc_mbx_rq_create *rq_create;
15619 struct lpfc_dmabuf *dmabuf;
15620 LPFC_MBOXQ_t *mbox;
15621 int rc, length, status = 0;
15622 uint32_t shdr_status, shdr_add_status;
15623 union lpfc_sli4_cfg_shdr *shdr;
49198b37 15624 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
962bc51b
JS
15625 void __iomem *bar_memmap_p;
15626 uint32_t db_offset;
15627 uint16_t pci_barset;
49198b37 15628
2e90f4b5
JS
15629 /* sanity check on queue memory */
15630 if (!hrq || !drq || !cq)
15631 return -ENODEV;
49198b37
JS
15632 if (!phba->sli4_hba.pc_sli4_params.supported)
15633 hw_page_size = SLI4_PAGE_SIZE;
4f774513
JS
15634
15635 if (hrq->entry_count != drq->entry_count)
15636 return -EINVAL;
15637 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15638 if (!mbox)
15639 return -ENOMEM;
15640 length = (sizeof(struct lpfc_mbx_rq_create) -
15641 sizeof(struct lpfc_sli4_cfg_mhdr));
15642 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15643 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE,
15644 length, LPFC_SLI4_MBX_EMBED);
15645 rq_create = &mbox->u.mqe.un.rq_create;
5a6f133e
JS
15646 shdr = (union lpfc_sli4_cfg_shdr *) &rq_create->header.cfg_shdr;
15647 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15648 phba->sli4_hba.pc_sli4_params.rqv);
15649 if (phba->sli4_hba.pc_sli4_params.rqv == LPFC_Q_CREATE_VERSION_1) {
15650 bf_set(lpfc_rq_context_rqe_count_1,
15651 &rq_create->u.request.context,
15652 hrq->entry_count);
15653 rq_create->u.request.context.buffer_size = LPFC_HDR_BUF_SIZE;
c31098ce
JS
15654 bf_set(lpfc_rq_context_rqe_size,
15655 &rq_create->u.request.context,
15656 LPFC_RQE_SIZE_8);
15657 bf_set(lpfc_rq_context_page_size,
15658 &rq_create->u.request.context,
8ea73db4 15659 LPFC_RQ_PAGE_SIZE_4096);
5a6f133e
JS
15660 } else {
15661 switch (hrq->entry_count) {
15662 default:
15663 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15664 "2535 Unsupported RQ count. (%d)\n",
15665 hrq->entry_count);
4f4c1863
JS
15666 if (hrq->entry_count < 512) {
15667 status = -EINVAL;
15668 goto out;
15669 }
5a6f133e
JS
15670 /* otherwise default to smallest count (drop through) */
15671 case 512:
15672 bf_set(lpfc_rq_context_rqe_count,
15673 &rq_create->u.request.context,
15674 LPFC_RQ_RING_SIZE_512);
15675 break;
15676 case 1024:
15677 bf_set(lpfc_rq_context_rqe_count,
15678 &rq_create->u.request.context,
15679 LPFC_RQ_RING_SIZE_1024);
15680 break;
15681 case 2048:
15682 bf_set(lpfc_rq_context_rqe_count,
15683 &rq_create->u.request.context,
15684 LPFC_RQ_RING_SIZE_2048);
15685 break;
15686 case 4096:
15687 bf_set(lpfc_rq_context_rqe_count,
15688 &rq_create->u.request.context,
15689 LPFC_RQ_RING_SIZE_4096);
15690 break;
15691 }
15692 bf_set(lpfc_rq_context_buf_size, &rq_create->u.request.context,
15693 LPFC_HDR_BUF_SIZE);
4f774513
JS
15694 }
15695 bf_set(lpfc_rq_context_cq_id, &rq_create->u.request.context,
15696 cq->queue_id);
15697 bf_set(lpfc_mbx_rq_create_num_pages, &rq_create->u.request,
15698 hrq->page_count);
4f774513 15699 list_for_each_entry(dmabuf, &hrq->page_list, list) {
49198b37 15700 memset(dmabuf->virt, 0, hw_page_size);
4f774513
JS
15701 rq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15702 putPaddrLow(dmabuf->phys);
15703 rq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15704 putPaddrHigh(dmabuf->phys);
15705 }
962bc51b
JS
15706 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
15707 bf_set(lpfc_mbx_rq_create_dua, &rq_create->u.request, 1);
15708
4f774513
JS
15709 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15710 /* The IOCTL status is embedded in the mailbox subheader. */
4f774513
JS
15711 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15712 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15713 if (shdr_status || shdr_add_status || rc) {
15714 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15715 "2504 RQ_CREATE mailbox failed with "
15716 "status x%x add_status x%x, mbx status x%x\n",
15717 shdr_status, shdr_add_status, rc);
15718 status = -ENXIO;
15719 goto out;
15720 }
15721 hrq->queue_id = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
15722 if (hrq->queue_id == 0xFFFF) {
15723 status = -ENXIO;
15724 goto out;
15725 }
962bc51b
JS
15726
15727 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE) {
15728 hrq->db_format = bf_get(lpfc_mbx_rq_create_db_format,
15729 &rq_create->u.response);
15730 if ((hrq->db_format != LPFC_DB_LIST_FORMAT) &&
15731 (hrq->db_format != LPFC_DB_RING_FORMAT)) {
15732 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15733 "3262 RQ [%d] doorbell format not "
15734 "supported: x%x\n", hrq->queue_id,
15735 hrq->db_format);
15736 status = -EINVAL;
15737 goto out;
15738 }
15739
15740 pci_barset = bf_get(lpfc_mbx_rq_create_bar_set,
15741 &rq_create->u.response);
15742 bar_memmap_p = lpfc_dual_chute_pci_bar_map(phba, pci_barset);
15743 if (!bar_memmap_p) {
15744 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15745 "3269 RQ[%d] failed to memmap pci "
15746 "barset:x%x\n", hrq->queue_id,
15747 pci_barset);
15748 status = -ENOMEM;
15749 goto out;
15750 }
15751
15752 db_offset = rq_create->u.response.doorbell_offset;
15753 if ((db_offset != LPFC_ULP0_RQ_DOORBELL) &&
15754 (db_offset != LPFC_ULP1_RQ_DOORBELL)) {
15755 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15756 "3270 RQ[%d] doorbell offset not "
15757 "supported: x%x\n", hrq->queue_id,
15758 db_offset);
15759 status = -EINVAL;
15760 goto out;
15761 }
15762 hrq->db_regaddr = bar_memmap_p + db_offset;
15763 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
a22e7db3
JS
15764 "3266 RQ[qid:%d]: barset:x%x, offset:x%x, "
15765 "format:x%x\n", hrq->queue_id, pci_barset,
15766 db_offset, hrq->db_format);
962bc51b
JS
15767 } else {
15768 hrq->db_format = LPFC_DB_RING_FORMAT;
15769 hrq->db_regaddr = phba->sli4_hba.RQDBregaddr;
15770 }
4f774513 15771 hrq->type = LPFC_HRQ;
2a622bfb 15772 hrq->assoc_qid = cq->queue_id;
4f774513
JS
15773 hrq->subtype = subtype;
15774 hrq->host_index = 0;
15775 hrq->hba_index = 0;
61f3d4bf 15776 hrq->entry_repost = LPFC_RQ_REPOST;
4f774513
JS
15777
15778 /* now create the data queue */
15779 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15780 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE,
15781 length, LPFC_SLI4_MBX_EMBED);
5a6f133e
JS
15782 bf_set(lpfc_mbox_hdr_version, &shdr->request,
15783 phba->sli4_hba.pc_sli4_params.rqv);
15784 if (phba->sli4_hba.pc_sli4_params.rqv == LPFC_Q_CREATE_VERSION_1) {
15785 bf_set(lpfc_rq_context_rqe_count_1,
c31098ce 15786 &rq_create->u.request.context, hrq->entry_count);
3c603be9
JS
15787 if (subtype == LPFC_NVMET)
15788 rq_create->u.request.context.buffer_size =
15789 LPFC_NVMET_DATA_BUF_SIZE;
15790 else
15791 rq_create->u.request.context.buffer_size =
15792 LPFC_DATA_BUF_SIZE;
c31098ce
JS
15793 bf_set(lpfc_rq_context_rqe_size, &rq_create->u.request.context,
15794 LPFC_RQE_SIZE_8);
15795 bf_set(lpfc_rq_context_page_size, &rq_create->u.request.context,
15796 (PAGE_SIZE/SLI4_PAGE_SIZE));
5a6f133e
JS
15797 } else {
15798 switch (drq->entry_count) {
15799 default:
15800 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15801 "2536 Unsupported RQ count. (%d)\n",
15802 drq->entry_count);
4f4c1863
JS
15803 if (drq->entry_count < 512) {
15804 status = -EINVAL;
15805 goto out;
15806 }
5a6f133e
JS
15807 /* otherwise default to smallest count (drop through) */
15808 case 512:
15809 bf_set(lpfc_rq_context_rqe_count,
15810 &rq_create->u.request.context,
15811 LPFC_RQ_RING_SIZE_512);
15812 break;
15813 case 1024:
15814 bf_set(lpfc_rq_context_rqe_count,
15815 &rq_create->u.request.context,
15816 LPFC_RQ_RING_SIZE_1024);
15817 break;
15818 case 2048:
15819 bf_set(lpfc_rq_context_rqe_count,
15820 &rq_create->u.request.context,
15821 LPFC_RQ_RING_SIZE_2048);
15822 break;
15823 case 4096:
15824 bf_set(lpfc_rq_context_rqe_count,
15825 &rq_create->u.request.context,
15826 LPFC_RQ_RING_SIZE_4096);
15827 break;
15828 }
3c603be9
JS
15829 if (subtype == LPFC_NVMET)
15830 bf_set(lpfc_rq_context_buf_size,
15831 &rq_create->u.request.context,
15832 LPFC_NVMET_DATA_BUF_SIZE);
15833 else
15834 bf_set(lpfc_rq_context_buf_size,
15835 &rq_create->u.request.context,
15836 LPFC_DATA_BUF_SIZE);
4f774513
JS
15837 }
15838 bf_set(lpfc_rq_context_cq_id, &rq_create->u.request.context,
15839 cq->queue_id);
15840 bf_set(lpfc_mbx_rq_create_num_pages, &rq_create->u.request,
15841 drq->page_count);
4f774513
JS
15842 list_for_each_entry(dmabuf, &drq->page_list, list) {
15843 rq_create->u.request.page[dmabuf->buffer_tag].addr_lo =
15844 putPaddrLow(dmabuf->phys);
15845 rq_create->u.request.page[dmabuf->buffer_tag].addr_hi =
15846 putPaddrHigh(dmabuf->phys);
15847 }
962bc51b
JS
15848 if (phba->sli4_hba.fw_func_mode & LPFC_DUA_MODE)
15849 bf_set(lpfc_mbx_rq_create_dua, &rq_create->u.request, 1);
4f774513
JS
15850 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
15851 /* The IOCTL status is embedded in the mailbox subheader. */
15852 shdr = (union lpfc_sli4_cfg_shdr *) &rq_create->header.cfg_shdr;
15853 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
15854 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
15855 if (shdr_status || shdr_add_status || rc) {
15856 status = -ENXIO;
15857 goto out;
15858 }
15859 drq->queue_id = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
15860 if (drq->queue_id == 0xFFFF) {
15861 status = -ENXIO;
15862 goto out;
15863 }
15864 drq->type = LPFC_DRQ;
2a622bfb 15865 drq->assoc_qid = cq->queue_id;
4f774513
JS
15866 drq->subtype = subtype;
15867 drq->host_index = 0;
15868 drq->hba_index = 0;
61f3d4bf 15869 drq->entry_repost = LPFC_RQ_REPOST;
4f774513
JS
15870
15871 /* link the header and data RQs onto the parent cq child list */
15872 list_add_tail(&hrq->list, &cq->child_list);
15873 list_add_tail(&drq->list, &cq->child_list);
15874
15875out:
8fa38513 15876 mempool_free(mbox, phba->mbox_mem_pool);
4f774513
JS
15877 return status;
15878}
15879
2d7dbc4c
JS
15880/**
15881 * lpfc_mrq_create - Create MRQ Receive Queues on the HBA
15882 * @phba: HBA structure that indicates port to create a queue on.
15883 * @hrqp: The queue structure array to use to create the header receive queues.
15884 * @drqp: The queue structure array to use to create the data receive queues.
15885 * @cqp: The completion queue array to bind these receive queues to.
15886 *
15887 * This function creates a receive buffer queue pair , as detailed in @hrq and
15888 * @drq, on a port, described by @phba by sending a RQ_CREATE mailbox command
15889 * to the HBA.
15890 *
15891 * The @phba struct is used to send mailbox command to HBA. The @drq and @hrq
15892 * struct is used to get the entry count that is necessary to determine the
15893 * number of pages to use for this queue. The @cq is used to indicate which
15894 * completion queue to bind received buffers that are posted to these queues to.
15895 * This function will send the RQ_CREATE mailbox command to the HBA to setup the
15896 * receive queue pair. This function is asynchronous and will wait for the
15897 * mailbox command to finish before continuing.
15898 *
15899 * On success this function will return a zero. If unable to allocate enough
15900 * memory this function will return -ENOMEM. If the queue create mailbox command
15901 * fails this function will return -ENXIO.
15902 **/
15903int
15904lpfc_mrq_create(struct lpfc_hba *phba, struct lpfc_queue **hrqp,
15905 struct lpfc_queue **drqp, struct lpfc_queue **cqp,
15906 uint32_t subtype)
15907{
15908 struct lpfc_queue *hrq, *drq, *cq;
15909 struct lpfc_mbx_rq_create_v2 *rq_create;
15910 struct lpfc_dmabuf *dmabuf;
15911 LPFC_MBOXQ_t *mbox;
15912 int rc, length, alloclen, status = 0;
15913 int cnt, idx, numrq, page_idx = 0;
15914 uint32_t shdr_status, shdr_add_status;
15915 union lpfc_sli4_cfg_shdr *shdr;
15916 uint32_t hw_page_size = phba->sli4_hba.pc_sli4_params.if_page_sz;
15917
15918 numrq = phba->cfg_nvmet_mrq;
15919 /* sanity check on array memory */
15920 if (!hrqp || !drqp || !cqp || !numrq)
15921 return -ENODEV;
15922 if (!phba->sli4_hba.pc_sli4_params.supported)
15923 hw_page_size = SLI4_PAGE_SIZE;
15924
15925 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
15926 if (!mbox)
15927 return -ENOMEM;
15928
15929 length = sizeof(struct lpfc_mbx_rq_create_v2);
15930 length += ((2 * numrq * hrqp[0]->page_count) *
15931 sizeof(struct dma_address));
15932
15933 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
15934 LPFC_MBOX_OPCODE_FCOE_RQ_CREATE, length,
15935 LPFC_SLI4_MBX_NEMBED);
15936 if (alloclen < length) {
15937 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
15938 "3099 Allocated DMA memory size (%d) is "
15939 "less than the requested DMA memory size "
15940 "(%d)\n", alloclen, length);
15941 status = -ENOMEM;
15942 goto out;
15943 }
15944
15945
15946
15947 rq_create = mbox->sge_array->addr[0];
15948 shdr = (union lpfc_sli4_cfg_shdr *)&rq_create->cfg_shdr;
15949
15950 bf_set(lpfc_mbox_hdr_version, &shdr->request, LPFC_Q_CREATE_VERSION_2);
15951 cnt = 0;
15952
15953 for (idx = 0; idx < numrq; idx++) {
15954 hrq = hrqp[idx];
15955 drq = drqp[idx];
15956 cq = cqp[idx];
15957
2d7dbc4c
JS
15958 /* sanity check on queue memory */
15959 if (!hrq || !drq || !cq) {
15960 status = -ENODEV;
15961 goto out;
15962 }
15963
7aabe84b
JS
15964 if (hrq->entry_count != drq->entry_count) {
15965 status = -EINVAL;
15966 goto out;
15967 }
15968
2d7dbc4c
JS
15969 if (idx == 0) {
15970 bf_set(lpfc_mbx_rq_create_num_pages,
15971 &rq_create->u.request,
15972 hrq->page_count);
15973 bf_set(lpfc_mbx_rq_create_rq_cnt,
15974 &rq_create->u.request, (numrq * 2));
15975 bf_set(lpfc_mbx_rq_create_dnb, &rq_create->u.request,
15976 1);
15977 bf_set(lpfc_rq_context_base_cq,
15978 &rq_create->u.request.context,
15979 cq->queue_id);
15980 bf_set(lpfc_rq_context_data_size,
15981 &rq_create->u.request.context,
3c603be9 15982 LPFC_NVMET_DATA_BUF_SIZE);
2d7dbc4c
JS
15983 bf_set(lpfc_rq_context_hdr_size,
15984 &rq_create->u.request.context,
15985 LPFC_HDR_BUF_SIZE);
15986 bf_set(lpfc_rq_context_rqe_count_1,
15987 &rq_create->u.request.context,
15988 hrq->entry_count);
15989 bf_set(lpfc_rq_context_rqe_size,
15990 &rq_create->u.request.context,
15991 LPFC_RQE_SIZE_8);
15992 bf_set(lpfc_rq_context_page_size,
15993 &rq_create->u.request.context,
15994 (PAGE_SIZE/SLI4_PAGE_SIZE));
15995 }
15996 rc = 0;
15997 list_for_each_entry(dmabuf, &hrq->page_list, list) {
15998 memset(dmabuf->virt, 0, hw_page_size);
15999 cnt = page_idx + dmabuf->buffer_tag;
16000 rq_create->u.request.page[cnt].addr_lo =
16001 putPaddrLow(dmabuf->phys);
16002 rq_create->u.request.page[cnt].addr_hi =
16003 putPaddrHigh(dmabuf->phys);
16004 rc++;
16005 }
16006 page_idx += rc;
16007
16008 rc = 0;
16009 list_for_each_entry(dmabuf, &drq->page_list, list) {
16010 memset(dmabuf->virt, 0, hw_page_size);
16011 cnt = page_idx + dmabuf->buffer_tag;
16012 rq_create->u.request.page[cnt].addr_lo =
16013 putPaddrLow(dmabuf->phys);
16014 rq_create->u.request.page[cnt].addr_hi =
16015 putPaddrHigh(dmabuf->phys);
16016 rc++;
16017 }
16018 page_idx += rc;
16019
16020 hrq->db_format = LPFC_DB_RING_FORMAT;
16021 hrq->db_regaddr = phba->sli4_hba.RQDBregaddr;
16022 hrq->type = LPFC_HRQ;
16023 hrq->assoc_qid = cq->queue_id;
16024 hrq->subtype = subtype;
16025 hrq->host_index = 0;
16026 hrq->hba_index = 0;
61f3d4bf 16027 hrq->entry_repost = LPFC_RQ_REPOST;
2d7dbc4c
JS
16028
16029 drq->db_format = LPFC_DB_RING_FORMAT;
16030 drq->db_regaddr = phba->sli4_hba.RQDBregaddr;
16031 drq->type = LPFC_DRQ;
16032 drq->assoc_qid = cq->queue_id;
16033 drq->subtype = subtype;
16034 drq->host_index = 0;
16035 drq->hba_index = 0;
61f3d4bf 16036 drq->entry_repost = LPFC_RQ_REPOST;
2d7dbc4c
JS
16037
16038 list_add_tail(&hrq->list, &cq->child_list);
16039 list_add_tail(&drq->list, &cq->child_list);
16040 }
16041
16042 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16043 /* The IOCTL status is embedded in the mailbox subheader. */
16044 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16045 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16046 if (shdr_status || shdr_add_status || rc) {
16047 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16048 "3120 RQ_CREATE mailbox failed with "
16049 "status x%x add_status x%x, mbx status x%x\n",
16050 shdr_status, shdr_add_status, rc);
16051 status = -ENXIO;
16052 goto out;
16053 }
16054 rc = bf_get(lpfc_mbx_rq_create_q_id, &rq_create->u.response);
16055 if (rc == 0xFFFF) {
16056 status = -ENXIO;
16057 goto out;
16058 }
16059
16060 /* Initialize all RQs with associated queue id */
16061 for (idx = 0; idx < numrq; idx++) {
16062 hrq = hrqp[idx];
16063 hrq->queue_id = rc + (2 * idx);
16064 drq = drqp[idx];
16065 drq->queue_id = rc + (2 * idx) + 1;
16066 }
16067
16068out:
16069 lpfc_sli4_mbox_cmd_free(phba, mbox);
16070 return status;
16071}
16072
4f774513
JS
16073/**
16074 * lpfc_eq_destroy - Destroy an event Queue on the HBA
16075 * @eq: The queue structure associated with the queue to destroy.
16076 *
16077 * This function destroys a queue, as detailed in @eq by sending an mailbox
16078 * command, specific to the type of queue, to the HBA.
16079 *
16080 * The @eq struct is used to get the queue ID of the queue to destroy.
16081 *
16082 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16083 * command fails this function will return -ENXIO.
4f774513 16084 **/
a2fc4aef 16085int
4f774513
JS
16086lpfc_eq_destroy(struct lpfc_hba *phba, struct lpfc_queue *eq)
16087{
16088 LPFC_MBOXQ_t *mbox;
16089 int rc, length, status = 0;
16090 uint32_t shdr_status, shdr_add_status;
16091 union lpfc_sli4_cfg_shdr *shdr;
16092
2e90f4b5 16093 /* sanity check on queue memory */
4f774513
JS
16094 if (!eq)
16095 return -ENODEV;
16096 mbox = mempool_alloc(eq->phba->mbox_mem_pool, GFP_KERNEL);
16097 if (!mbox)
16098 return -ENOMEM;
16099 length = (sizeof(struct lpfc_mbx_eq_destroy) -
16100 sizeof(struct lpfc_sli4_cfg_mhdr));
16101 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16102 LPFC_MBOX_OPCODE_EQ_DESTROY,
16103 length, LPFC_SLI4_MBX_EMBED);
16104 bf_set(lpfc_mbx_eq_destroy_q_id, &mbox->u.mqe.un.eq_destroy.u.request,
16105 eq->queue_id);
16106 mbox->vport = eq->phba->pport;
16107 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16108
16109 rc = lpfc_sli_issue_mbox(eq->phba, mbox, MBX_POLL);
16110 /* The IOCTL status is embedded in the mailbox subheader. */
16111 shdr = (union lpfc_sli4_cfg_shdr *)
16112 &mbox->u.mqe.un.eq_destroy.header.cfg_shdr;
16113 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16114 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16115 if (shdr_status || shdr_add_status || rc) {
16116 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16117 "2505 EQ_DESTROY mailbox failed with "
16118 "status x%x add_status x%x, mbx status x%x\n",
16119 shdr_status, shdr_add_status, rc);
16120 status = -ENXIO;
16121 }
16122
16123 /* Remove eq from any list */
16124 list_del_init(&eq->list);
8fa38513 16125 mempool_free(mbox, eq->phba->mbox_mem_pool);
4f774513
JS
16126 return status;
16127}
16128
16129/**
16130 * lpfc_cq_destroy - Destroy a Completion Queue on the HBA
16131 * @cq: The queue structure associated with the queue to destroy.
16132 *
16133 * This function destroys a queue, as detailed in @cq by sending an mailbox
16134 * command, specific to the type of queue, to the HBA.
16135 *
16136 * The @cq struct is used to get the queue ID of the queue to destroy.
16137 *
16138 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16139 * command fails this function will return -ENXIO.
4f774513 16140 **/
a2fc4aef 16141int
4f774513
JS
16142lpfc_cq_destroy(struct lpfc_hba *phba, struct lpfc_queue *cq)
16143{
16144 LPFC_MBOXQ_t *mbox;
16145 int rc, length, status = 0;
16146 uint32_t shdr_status, shdr_add_status;
16147 union lpfc_sli4_cfg_shdr *shdr;
16148
2e90f4b5 16149 /* sanity check on queue memory */
4f774513
JS
16150 if (!cq)
16151 return -ENODEV;
16152 mbox = mempool_alloc(cq->phba->mbox_mem_pool, GFP_KERNEL);
16153 if (!mbox)
16154 return -ENOMEM;
16155 length = (sizeof(struct lpfc_mbx_cq_destroy) -
16156 sizeof(struct lpfc_sli4_cfg_mhdr));
16157 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16158 LPFC_MBOX_OPCODE_CQ_DESTROY,
16159 length, LPFC_SLI4_MBX_EMBED);
16160 bf_set(lpfc_mbx_cq_destroy_q_id, &mbox->u.mqe.un.cq_destroy.u.request,
16161 cq->queue_id);
16162 mbox->vport = cq->phba->pport;
16163 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16164 rc = lpfc_sli_issue_mbox(cq->phba, mbox, MBX_POLL);
16165 /* The IOCTL status is embedded in the mailbox subheader. */
16166 shdr = (union lpfc_sli4_cfg_shdr *)
16167 &mbox->u.mqe.un.wq_create.header.cfg_shdr;
16168 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16169 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16170 if (shdr_status || shdr_add_status || rc) {
16171 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16172 "2506 CQ_DESTROY mailbox failed with "
16173 "status x%x add_status x%x, mbx status x%x\n",
16174 shdr_status, shdr_add_status, rc);
16175 status = -ENXIO;
16176 }
16177 /* Remove cq from any list */
16178 list_del_init(&cq->list);
8fa38513 16179 mempool_free(mbox, cq->phba->mbox_mem_pool);
4f774513
JS
16180 return status;
16181}
16182
04c68496
JS
16183/**
16184 * lpfc_mq_destroy - Destroy a Mailbox Queue on the HBA
16185 * @qm: The queue structure associated with the queue to destroy.
16186 *
16187 * This function destroys a queue, as detailed in @mq by sending an mailbox
16188 * command, specific to the type of queue, to the HBA.
16189 *
16190 * The @mq struct is used to get the queue ID of the queue to destroy.
16191 *
16192 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16193 * command fails this function will return -ENXIO.
04c68496 16194 **/
a2fc4aef 16195int
04c68496
JS
16196lpfc_mq_destroy(struct lpfc_hba *phba, struct lpfc_queue *mq)
16197{
16198 LPFC_MBOXQ_t *mbox;
16199 int rc, length, status = 0;
16200 uint32_t shdr_status, shdr_add_status;
16201 union lpfc_sli4_cfg_shdr *shdr;
16202
2e90f4b5 16203 /* sanity check on queue memory */
04c68496
JS
16204 if (!mq)
16205 return -ENODEV;
16206 mbox = mempool_alloc(mq->phba->mbox_mem_pool, GFP_KERNEL);
16207 if (!mbox)
16208 return -ENOMEM;
16209 length = (sizeof(struct lpfc_mbx_mq_destroy) -
16210 sizeof(struct lpfc_sli4_cfg_mhdr));
16211 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
16212 LPFC_MBOX_OPCODE_MQ_DESTROY,
16213 length, LPFC_SLI4_MBX_EMBED);
16214 bf_set(lpfc_mbx_mq_destroy_q_id, &mbox->u.mqe.un.mq_destroy.u.request,
16215 mq->queue_id);
16216 mbox->vport = mq->phba->pport;
16217 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16218 rc = lpfc_sli_issue_mbox(mq->phba, mbox, MBX_POLL);
16219 /* The IOCTL status is embedded in the mailbox subheader. */
16220 shdr = (union lpfc_sli4_cfg_shdr *)
16221 &mbox->u.mqe.un.mq_destroy.header.cfg_shdr;
16222 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16223 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16224 if (shdr_status || shdr_add_status || rc) {
16225 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16226 "2507 MQ_DESTROY mailbox failed with "
16227 "status x%x add_status x%x, mbx status x%x\n",
16228 shdr_status, shdr_add_status, rc);
16229 status = -ENXIO;
16230 }
16231 /* Remove mq from any list */
16232 list_del_init(&mq->list);
8fa38513 16233 mempool_free(mbox, mq->phba->mbox_mem_pool);
04c68496
JS
16234 return status;
16235}
16236
4f774513
JS
16237/**
16238 * lpfc_wq_destroy - Destroy a Work Queue on the HBA
16239 * @wq: The queue structure associated with the queue to destroy.
16240 *
16241 * This function destroys a queue, as detailed in @wq by sending an mailbox
16242 * command, specific to the type of queue, to the HBA.
16243 *
16244 * The @wq struct is used to get the queue ID of the queue to destroy.
16245 *
16246 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16247 * command fails this function will return -ENXIO.
4f774513 16248 **/
a2fc4aef 16249int
4f774513
JS
16250lpfc_wq_destroy(struct lpfc_hba *phba, struct lpfc_queue *wq)
16251{
16252 LPFC_MBOXQ_t *mbox;
16253 int rc, length, status = 0;
16254 uint32_t shdr_status, shdr_add_status;
16255 union lpfc_sli4_cfg_shdr *shdr;
16256
2e90f4b5 16257 /* sanity check on queue memory */
4f774513
JS
16258 if (!wq)
16259 return -ENODEV;
16260 mbox = mempool_alloc(wq->phba->mbox_mem_pool, GFP_KERNEL);
16261 if (!mbox)
16262 return -ENOMEM;
16263 length = (sizeof(struct lpfc_mbx_wq_destroy) -
16264 sizeof(struct lpfc_sli4_cfg_mhdr));
16265 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16266 LPFC_MBOX_OPCODE_FCOE_WQ_DESTROY,
16267 length, LPFC_SLI4_MBX_EMBED);
16268 bf_set(lpfc_mbx_wq_destroy_q_id, &mbox->u.mqe.un.wq_destroy.u.request,
16269 wq->queue_id);
16270 mbox->vport = wq->phba->pport;
16271 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16272 rc = lpfc_sli_issue_mbox(wq->phba, mbox, MBX_POLL);
16273 shdr = (union lpfc_sli4_cfg_shdr *)
16274 &mbox->u.mqe.un.wq_destroy.header.cfg_shdr;
16275 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16276 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16277 if (shdr_status || shdr_add_status || rc) {
16278 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16279 "2508 WQ_DESTROY mailbox failed with "
16280 "status x%x add_status x%x, mbx status x%x\n",
16281 shdr_status, shdr_add_status, rc);
16282 status = -ENXIO;
16283 }
16284 /* Remove wq from any list */
16285 list_del_init(&wq->list);
d1f525aa
JS
16286 kfree(wq->pring);
16287 wq->pring = NULL;
8fa38513 16288 mempool_free(mbox, wq->phba->mbox_mem_pool);
4f774513
JS
16289 return status;
16290}
16291
16292/**
16293 * lpfc_rq_destroy - Destroy a Receive Queue on the HBA
16294 * @rq: The queue structure associated with the queue to destroy.
16295 *
16296 * This function destroys a queue, as detailed in @rq by sending an mailbox
16297 * command, specific to the type of queue, to the HBA.
16298 *
16299 * The @rq struct is used to get the queue ID of the queue to destroy.
16300 *
16301 * On success this function will return a zero. If the queue destroy mailbox
d439d286 16302 * command fails this function will return -ENXIO.
4f774513 16303 **/
a2fc4aef 16304int
4f774513
JS
16305lpfc_rq_destroy(struct lpfc_hba *phba, struct lpfc_queue *hrq,
16306 struct lpfc_queue *drq)
16307{
16308 LPFC_MBOXQ_t *mbox;
16309 int rc, length, status = 0;
16310 uint32_t shdr_status, shdr_add_status;
16311 union lpfc_sli4_cfg_shdr *shdr;
16312
2e90f4b5 16313 /* sanity check on queue memory */
4f774513
JS
16314 if (!hrq || !drq)
16315 return -ENODEV;
16316 mbox = mempool_alloc(hrq->phba->mbox_mem_pool, GFP_KERNEL);
16317 if (!mbox)
16318 return -ENOMEM;
16319 length = (sizeof(struct lpfc_mbx_rq_destroy) -
fedd3b7b 16320 sizeof(struct lpfc_sli4_cfg_mhdr));
4f774513
JS
16321 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16322 LPFC_MBOX_OPCODE_FCOE_RQ_DESTROY,
16323 length, LPFC_SLI4_MBX_EMBED);
16324 bf_set(lpfc_mbx_rq_destroy_q_id, &mbox->u.mqe.un.rq_destroy.u.request,
16325 hrq->queue_id);
16326 mbox->vport = hrq->phba->pport;
16327 mbox->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
16328 rc = lpfc_sli_issue_mbox(hrq->phba, mbox, MBX_POLL);
16329 /* The IOCTL status is embedded in the mailbox subheader. */
16330 shdr = (union lpfc_sli4_cfg_shdr *)
16331 &mbox->u.mqe.un.rq_destroy.header.cfg_shdr;
16332 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16333 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16334 if (shdr_status || shdr_add_status || rc) {
16335 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16336 "2509 RQ_DESTROY mailbox failed with "
16337 "status x%x add_status x%x, mbx status x%x\n",
16338 shdr_status, shdr_add_status, rc);
16339 if (rc != MBX_TIMEOUT)
16340 mempool_free(mbox, hrq->phba->mbox_mem_pool);
16341 return -ENXIO;
16342 }
16343 bf_set(lpfc_mbx_rq_destroy_q_id, &mbox->u.mqe.un.rq_destroy.u.request,
16344 drq->queue_id);
16345 rc = lpfc_sli_issue_mbox(drq->phba, mbox, MBX_POLL);
16346 shdr = (union lpfc_sli4_cfg_shdr *)
16347 &mbox->u.mqe.un.rq_destroy.header.cfg_shdr;
16348 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16349 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16350 if (shdr_status || shdr_add_status || rc) {
16351 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16352 "2510 RQ_DESTROY mailbox failed with "
16353 "status x%x add_status x%x, mbx status x%x\n",
16354 shdr_status, shdr_add_status, rc);
16355 status = -ENXIO;
16356 }
16357 list_del_init(&hrq->list);
16358 list_del_init(&drq->list);
8fa38513 16359 mempool_free(mbox, hrq->phba->mbox_mem_pool);
4f774513
JS
16360 return status;
16361}
16362
16363/**
16364 * lpfc_sli4_post_sgl - Post scatter gather list for an XRI to HBA
16365 * @phba: The virtual port for which this call being executed.
16366 * @pdma_phys_addr0: Physical address of the 1st SGL page.
16367 * @pdma_phys_addr1: Physical address of the 2nd SGL page.
16368 * @xritag: the xritag that ties this io to the SGL pages.
16369 *
16370 * This routine will post the sgl pages for the IO that has the xritag
16371 * that is in the iocbq structure. The xritag is assigned during iocbq
16372 * creation and persists for as long as the driver is loaded.
16373 * if the caller has fewer than 256 scatter gather segments to map then
16374 * pdma_phys_addr1 should be 0.
16375 * If the caller needs to map more than 256 scatter gather segment then
16376 * pdma_phys_addr1 should be a valid physical address.
16377 * physical address for SGLs must be 64 byte aligned.
16378 * If you are going to map 2 SGL's then the first one must have 256 entries
16379 * the second sgl can have between 1 and 256 entries.
16380 *
16381 * Return codes:
16382 * 0 - Success
16383 * -ENXIO, -ENOMEM - Failure
16384 **/
16385int
16386lpfc_sli4_post_sgl(struct lpfc_hba *phba,
16387 dma_addr_t pdma_phys_addr0,
16388 dma_addr_t pdma_phys_addr1,
16389 uint16_t xritag)
16390{
16391 struct lpfc_mbx_post_sgl_pages *post_sgl_pages;
16392 LPFC_MBOXQ_t *mbox;
16393 int rc;
16394 uint32_t shdr_status, shdr_add_status;
6d368e53 16395 uint32_t mbox_tmo;
4f774513
JS
16396 union lpfc_sli4_cfg_shdr *shdr;
16397
16398 if (xritag == NO_XRI) {
16399 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16400 "0364 Invalid param:\n");
16401 return -EINVAL;
16402 }
16403
16404 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
16405 if (!mbox)
16406 return -ENOMEM;
16407
16408 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16409 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES,
16410 sizeof(struct lpfc_mbx_post_sgl_pages) -
fedd3b7b 16411 sizeof(struct lpfc_sli4_cfg_mhdr), LPFC_SLI4_MBX_EMBED);
4f774513
JS
16412
16413 post_sgl_pages = (struct lpfc_mbx_post_sgl_pages *)
16414 &mbox->u.mqe.un.post_sgl_pages;
16415 bf_set(lpfc_post_sgl_pages_xri, post_sgl_pages, xritag);
16416 bf_set(lpfc_post_sgl_pages_xricnt, post_sgl_pages, 1);
16417
16418 post_sgl_pages->sgl_pg_pairs[0].sgl_pg0_addr_lo =
16419 cpu_to_le32(putPaddrLow(pdma_phys_addr0));
16420 post_sgl_pages->sgl_pg_pairs[0].sgl_pg0_addr_hi =
16421 cpu_to_le32(putPaddrHigh(pdma_phys_addr0));
16422
16423 post_sgl_pages->sgl_pg_pairs[0].sgl_pg1_addr_lo =
16424 cpu_to_le32(putPaddrLow(pdma_phys_addr1));
16425 post_sgl_pages->sgl_pg_pairs[0].sgl_pg1_addr_hi =
16426 cpu_to_le32(putPaddrHigh(pdma_phys_addr1));
16427 if (!phba->sli4_hba.intr_enable)
16428 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
6d368e53 16429 else {
a183a15f 16430 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
6d368e53
JS
16431 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
16432 }
4f774513
JS
16433 /* The IOCTL status is embedded in the mailbox subheader. */
16434 shdr = (union lpfc_sli4_cfg_shdr *) &post_sgl_pages->header.cfg_shdr;
16435 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16436 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16437 if (rc != MBX_TIMEOUT)
16438 mempool_free(mbox, phba->mbox_mem_pool);
16439 if (shdr_status || shdr_add_status || rc) {
16440 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16441 "2511 POST_SGL mailbox failed with "
16442 "status x%x add_status x%x, mbx status x%x\n",
16443 shdr_status, shdr_add_status, rc);
4f774513
JS
16444 }
16445 return 0;
16446}
4f774513 16447
6d368e53 16448/**
88a2cfbb 16449 * lpfc_sli4_alloc_xri - Get an available rpi in the device's range
6d368e53
JS
16450 * @phba: pointer to lpfc hba data structure.
16451 *
16452 * This routine is invoked to post rpi header templates to the
88a2cfbb
JS
16453 * HBA consistent with the SLI-4 interface spec. This routine
16454 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
16455 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6d368e53 16456 *
88a2cfbb
JS
16457 * Returns
16458 * A nonzero rpi defined as rpi_base <= rpi < max_rpi if successful
16459 * LPFC_RPI_ALLOC_ERROR if no rpis are available.
16460 **/
5d8b8167 16461static uint16_t
6d368e53
JS
16462lpfc_sli4_alloc_xri(struct lpfc_hba *phba)
16463{
16464 unsigned long xri;
16465
16466 /*
16467 * Fetch the next logical xri. Because this index is logical,
16468 * the driver starts at 0 each time.
16469 */
16470 spin_lock_irq(&phba->hbalock);
16471 xri = find_next_zero_bit(phba->sli4_hba.xri_bmask,
16472 phba->sli4_hba.max_cfg_param.max_xri, 0);
16473 if (xri >= phba->sli4_hba.max_cfg_param.max_xri) {
16474 spin_unlock_irq(&phba->hbalock);
16475 return NO_XRI;
16476 } else {
16477 set_bit(xri, phba->sli4_hba.xri_bmask);
16478 phba->sli4_hba.max_cfg_param.xri_used++;
6d368e53 16479 }
6d368e53
JS
16480 spin_unlock_irq(&phba->hbalock);
16481 return xri;
16482}
16483
16484/**
16485 * lpfc_sli4_free_xri - Release an xri for reuse.
16486 * @phba: pointer to lpfc hba data structure.
16487 *
16488 * This routine is invoked to release an xri to the pool of
16489 * available rpis maintained by the driver.
16490 **/
5d8b8167 16491static void
6d368e53
JS
16492__lpfc_sli4_free_xri(struct lpfc_hba *phba, int xri)
16493{
16494 if (test_and_clear_bit(xri, phba->sli4_hba.xri_bmask)) {
6d368e53
JS
16495 phba->sli4_hba.max_cfg_param.xri_used--;
16496 }
16497}
16498
16499/**
16500 * lpfc_sli4_free_xri - Release an xri for reuse.
16501 * @phba: pointer to lpfc hba data structure.
16502 *
16503 * This routine is invoked to release an xri to the pool of
16504 * available rpis maintained by the driver.
16505 **/
16506void
16507lpfc_sli4_free_xri(struct lpfc_hba *phba, int xri)
16508{
16509 spin_lock_irq(&phba->hbalock);
16510 __lpfc_sli4_free_xri(phba, xri);
16511 spin_unlock_irq(&phba->hbalock);
16512}
16513
4f774513
JS
16514/**
16515 * lpfc_sli4_next_xritag - Get an xritag for the io
16516 * @phba: Pointer to HBA context object.
16517 *
16518 * This function gets an xritag for the iocb. If there is no unused xritag
16519 * it will return 0xffff.
16520 * The function returns the allocated xritag if successful, else returns zero.
16521 * Zero is not a valid xritag.
16522 * The caller is not required to hold any lock.
16523 **/
16524uint16_t
16525lpfc_sli4_next_xritag(struct lpfc_hba *phba)
16526{
6d368e53 16527 uint16_t xri_index;
4f774513 16528
6d368e53 16529 xri_index = lpfc_sli4_alloc_xri(phba);
81378052
JS
16530 if (xri_index == NO_XRI)
16531 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
16532 "2004 Failed to allocate XRI.last XRITAG is %d"
16533 " Max XRI is %d, Used XRI is %d\n",
16534 xri_index,
16535 phba->sli4_hba.max_cfg_param.max_xri,
16536 phba->sli4_hba.max_cfg_param.xri_used);
16537 return xri_index;
4f774513
JS
16538}
16539
16540/**
895427bd 16541 * lpfc_sli4_post_sgl_list - post a block of ELS sgls to the port.
4f774513 16542 * @phba: pointer to lpfc hba data structure.
8a9d2e80
JS
16543 * @post_sgl_list: pointer to els sgl entry list.
16544 * @count: number of els sgl entries on the list.
4f774513
JS
16545 *
16546 * This routine is invoked to post a block of driver's sgl pages to the
16547 * HBA using non-embedded mailbox command. No Lock is held. This routine
16548 * is only called when the driver is loading and after all IO has been
16549 * stopped.
16550 **/
8a9d2e80 16551static int
895427bd 16552lpfc_sli4_post_sgl_list(struct lpfc_hba *phba,
8a9d2e80
JS
16553 struct list_head *post_sgl_list,
16554 int post_cnt)
4f774513 16555{
8a9d2e80 16556 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
4f774513
JS
16557 struct lpfc_mbx_post_uembed_sgl_page1 *sgl;
16558 struct sgl_page_pairs *sgl_pg_pairs;
16559 void *viraddr;
16560 LPFC_MBOXQ_t *mbox;
16561 uint32_t reqlen, alloclen, pg_pairs;
16562 uint32_t mbox_tmo;
8a9d2e80
JS
16563 uint16_t xritag_start = 0;
16564 int rc = 0;
4f774513
JS
16565 uint32_t shdr_status, shdr_add_status;
16566 union lpfc_sli4_cfg_shdr *shdr;
16567
895427bd 16568 reqlen = post_cnt * sizeof(struct sgl_page_pairs) +
4f774513 16569 sizeof(union lpfc_sli4_cfg_shdr) + sizeof(uint32_t);
49198b37 16570 if (reqlen > SLI4_PAGE_SIZE) {
895427bd 16571 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4f774513
JS
16572 "2559 Block sgl registration required DMA "
16573 "size (%d) great than a page\n", reqlen);
16574 return -ENOMEM;
16575 }
895427bd 16576
4f774513 16577 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6d368e53 16578 if (!mbox)
4f774513 16579 return -ENOMEM;
4f774513
JS
16580
16581 /* Allocate DMA memory and set up the non-embedded mailbox command */
16582 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
16583 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES, reqlen,
16584 LPFC_SLI4_MBX_NEMBED);
16585
16586 if (alloclen < reqlen) {
16587 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
16588 "0285 Allocated DMA memory size (%d) is "
16589 "less than the requested DMA memory "
16590 "size (%d)\n", alloclen, reqlen);
16591 lpfc_sli4_mbox_cmd_free(phba, mbox);
16592 return -ENOMEM;
16593 }
4f774513 16594 /* Set up the SGL pages in the non-embedded DMA pages */
6d368e53 16595 viraddr = mbox->sge_array->addr[0];
4f774513
JS
16596 sgl = (struct lpfc_mbx_post_uembed_sgl_page1 *)viraddr;
16597 sgl_pg_pairs = &sgl->sgl_pg_pairs;
16598
8a9d2e80
JS
16599 pg_pairs = 0;
16600 list_for_each_entry_safe(sglq_entry, sglq_next, post_sgl_list, list) {
4f774513
JS
16601 /* Set up the sge entry */
16602 sgl_pg_pairs->sgl_pg0_addr_lo =
16603 cpu_to_le32(putPaddrLow(sglq_entry->phys));
16604 sgl_pg_pairs->sgl_pg0_addr_hi =
16605 cpu_to_le32(putPaddrHigh(sglq_entry->phys));
16606 sgl_pg_pairs->sgl_pg1_addr_lo =
16607 cpu_to_le32(putPaddrLow(0));
16608 sgl_pg_pairs->sgl_pg1_addr_hi =
16609 cpu_to_le32(putPaddrHigh(0));
6d368e53 16610
4f774513
JS
16611 /* Keep the first xritag on the list */
16612 if (pg_pairs == 0)
16613 xritag_start = sglq_entry->sli4_xritag;
16614 sgl_pg_pairs++;
8a9d2e80 16615 pg_pairs++;
4f774513 16616 }
6d368e53
JS
16617
16618 /* Complete initialization and perform endian conversion. */
4f774513 16619 bf_set(lpfc_post_sgl_pages_xri, sgl, xritag_start);
895427bd 16620 bf_set(lpfc_post_sgl_pages_xricnt, sgl, post_cnt);
4f774513 16621 sgl->word0 = cpu_to_le32(sgl->word0);
895427bd 16622
4f774513
JS
16623 if (!phba->sli4_hba.intr_enable)
16624 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
16625 else {
a183a15f 16626 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
4f774513
JS
16627 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
16628 }
16629 shdr = (union lpfc_sli4_cfg_shdr *) &sgl->cfg_shdr;
16630 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16631 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16632 if (rc != MBX_TIMEOUT)
16633 lpfc_sli4_mbox_cmd_free(phba, mbox);
16634 if (shdr_status || shdr_add_status || rc) {
16635 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
16636 "2513 POST_SGL_BLOCK mailbox command failed "
16637 "status x%x add_status x%x mbx status x%x\n",
16638 shdr_status, shdr_add_status, rc);
16639 rc = -ENXIO;
16640 }
16641 return rc;
16642}
16643
16644/**
5e5b511d 16645 * lpfc_sli4_post_io_sgl_block - post a block of nvme sgl list to firmware
4f774513 16646 * @phba: pointer to lpfc hba data structure.
0794d601 16647 * @nblist: pointer to nvme buffer list.
4f774513
JS
16648 * @count: number of scsi buffers on the list.
16649 *
16650 * This routine is invoked to post a block of @count scsi sgl pages from a
0794d601 16651 * SCSI buffer list @nblist to the HBA using non-embedded mailbox command.
4f774513
JS
16652 * No Lock is held.
16653 *
16654 **/
0794d601 16655static int
5e5b511d
JS
16656lpfc_sli4_post_io_sgl_block(struct lpfc_hba *phba, struct list_head *nblist,
16657 int count)
4f774513 16658{
c490850a 16659 struct lpfc_io_buf *lpfc_ncmd;
4f774513
JS
16660 struct lpfc_mbx_post_uembed_sgl_page1 *sgl;
16661 struct sgl_page_pairs *sgl_pg_pairs;
16662 void *viraddr;
16663 LPFC_MBOXQ_t *mbox;
16664 uint32_t reqlen, alloclen, pg_pairs;
16665 uint32_t mbox_tmo;
16666 uint16_t xritag_start = 0;
16667 int rc = 0;
16668 uint32_t shdr_status, shdr_add_status;
16669 dma_addr_t pdma_phys_bpl1;
16670 union lpfc_sli4_cfg_shdr *shdr;
16671
16672 /* Calculate the requested length of the dma memory */
8a9d2e80 16673 reqlen = count * sizeof(struct sgl_page_pairs) +
4f774513 16674 sizeof(union lpfc_sli4_cfg_shdr) + sizeof(uint32_t);
49198b37 16675 if (reqlen > SLI4_PAGE_SIZE) {
4f774513 16676 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
0794d601 16677 "6118 Block sgl registration required DMA "
4f774513
JS
16678 "size (%d) great than a page\n", reqlen);
16679 return -ENOMEM;
16680 }
16681 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
16682 if (!mbox) {
16683 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
0794d601 16684 "6119 Failed to allocate mbox cmd memory\n");
4f774513
JS
16685 return -ENOMEM;
16686 }
16687
16688 /* Allocate DMA memory and set up the non-embedded mailbox command */
16689 alloclen = lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
0794d601
JS
16690 LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES,
16691 reqlen, LPFC_SLI4_MBX_NEMBED);
4f774513
JS
16692
16693 if (alloclen < reqlen) {
16694 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
0794d601 16695 "6120 Allocated DMA memory size (%d) is "
4f774513
JS
16696 "less than the requested DMA memory "
16697 "size (%d)\n", alloclen, reqlen);
16698 lpfc_sli4_mbox_cmd_free(phba, mbox);
16699 return -ENOMEM;
16700 }
6d368e53 16701
4f774513 16702 /* Get the first SGE entry from the non-embedded DMA memory */
4f774513
JS
16703 viraddr = mbox->sge_array->addr[0];
16704
16705 /* Set up the SGL pages in the non-embedded DMA pages */
16706 sgl = (struct lpfc_mbx_post_uembed_sgl_page1 *)viraddr;
16707 sgl_pg_pairs = &sgl->sgl_pg_pairs;
16708
16709 pg_pairs = 0;
0794d601 16710 list_for_each_entry(lpfc_ncmd, nblist, list) {
4f774513
JS
16711 /* Set up the sge entry */
16712 sgl_pg_pairs->sgl_pg0_addr_lo =
0794d601 16713 cpu_to_le32(putPaddrLow(lpfc_ncmd->dma_phys_sgl));
4f774513 16714 sgl_pg_pairs->sgl_pg0_addr_hi =
0794d601 16715 cpu_to_le32(putPaddrHigh(lpfc_ncmd->dma_phys_sgl));
4f774513 16716 if (phba->cfg_sg_dma_buf_size > SGL_PAGE_SIZE)
0794d601
JS
16717 pdma_phys_bpl1 = lpfc_ncmd->dma_phys_sgl +
16718 SGL_PAGE_SIZE;
4f774513
JS
16719 else
16720 pdma_phys_bpl1 = 0;
16721 sgl_pg_pairs->sgl_pg1_addr_lo =
16722 cpu_to_le32(putPaddrLow(pdma_phys_bpl1));
16723 sgl_pg_pairs->sgl_pg1_addr_hi =
16724 cpu_to_le32(putPaddrHigh(pdma_phys_bpl1));
16725 /* Keep the first xritag on the list */
16726 if (pg_pairs == 0)
0794d601 16727 xritag_start = lpfc_ncmd->cur_iocbq.sli4_xritag;
4f774513
JS
16728 sgl_pg_pairs++;
16729 pg_pairs++;
16730 }
16731 bf_set(lpfc_post_sgl_pages_xri, sgl, xritag_start);
16732 bf_set(lpfc_post_sgl_pages_xricnt, sgl, pg_pairs);
16733 /* Perform endian conversion if necessary */
16734 sgl->word0 = cpu_to_le32(sgl->word0);
16735
0794d601 16736 if (!phba->sli4_hba.intr_enable) {
4f774513 16737 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
0794d601 16738 } else {
a183a15f 16739 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
4f774513
JS
16740 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
16741 }
0794d601 16742 shdr = (union lpfc_sli4_cfg_shdr *)&sgl->cfg_shdr;
4f774513
JS
16743 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
16744 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
16745 if (rc != MBX_TIMEOUT)
16746 lpfc_sli4_mbox_cmd_free(phba, mbox);
16747 if (shdr_status || shdr_add_status || rc) {
16748 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
0794d601 16749 "6125 POST_SGL_BLOCK mailbox command failed "
4f774513
JS
16750 "status x%x add_status x%x mbx status x%x\n",
16751 shdr_status, shdr_add_status, rc);
16752 rc = -ENXIO;
16753 }
16754 return rc;
16755}
16756
0794d601 16757/**
5e5b511d 16758 * lpfc_sli4_post_io_sgl_list - Post blocks of nvme buffer sgls from a list
0794d601
JS
16759 * @phba: pointer to lpfc hba data structure.
16760 * @post_nblist: pointer to the nvme buffer list.
16761 *
16762 * This routine walks a list of nvme buffers that was passed in. It attempts
16763 * to construct blocks of nvme buffer sgls which contains contiguous xris and
16764 * uses the non-embedded SGL block post mailbox commands to post to the port.
16765 * For single NVME buffer sgl with non-contiguous xri, if any, it shall use
16766 * embedded SGL post mailbox command for posting. The @post_nblist passed in
16767 * must be local list, thus no lock is needed when manipulate the list.
16768 *
16769 * Returns: 0 = failure, non-zero number of successfully posted buffers.
16770 **/
16771int
5e5b511d
JS
16772lpfc_sli4_post_io_sgl_list(struct lpfc_hba *phba,
16773 struct list_head *post_nblist, int sb_count)
0794d601 16774{
c490850a 16775 struct lpfc_io_buf *lpfc_ncmd, *lpfc_ncmd_next;
0794d601
JS
16776 int status, sgl_size;
16777 int post_cnt = 0, block_cnt = 0, num_posting = 0, num_posted = 0;
16778 dma_addr_t pdma_phys_sgl1;
16779 int last_xritag = NO_XRI;
16780 int cur_xritag;
0794d601
JS
16781 LIST_HEAD(prep_nblist);
16782 LIST_HEAD(blck_nblist);
16783 LIST_HEAD(nvme_nblist);
16784
16785 /* sanity check */
16786 if (sb_count <= 0)
16787 return -EINVAL;
16788
16789 sgl_size = phba->cfg_sg_dma_buf_size;
16790 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, post_nblist, list) {
16791 list_del_init(&lpfc_ncmd->list);
16792 block_cnt++;
16793 if ((last_xritag != NO_XRI) &&
16794 (lpfc_ncmd->cur_iocbq.sli4_xritag != last_xritag + 1)) {
16795 /* a hole in xri block, form a sgl posting block */
16796 list_splice_init(&prep_nblist, &blck_nblist);
16797 post_cnt = block_cnt - 1;
16798 /* prepare list for next posting block */
16799 list_add_tail(&lpfc_ncmd->list, &prep_nblist);
16800 block_cnt = 1;
16801 } else {
16802 /* prepare list for next posting block */
16803 list_add_tail(&lpfc_ncmd->list, &prep_nblist);
16804 /* enough sgls for non-embed sgl mbox command */
16805 if (block_cnt == LPFC_NEMBED_MBOX_SGL_CNT) {
16806 list_splice_init(&prep_nblist, &blck_nblist);
16807 post_cnt = block_cnt;
16808 block_cnt = 0;
16809 }
16810 }
16811 num_posting++;
16812 last_xritag = lpfc_ncmd->cur_iocbq.sli4_xritag;
16813
16814 /* end of repost sgl list condition for NVME buffers */
16815 if (num_posting == sb_count) {
16816 if (post_cnt == 0) {
16817 /* last sgl posting block */
16818 list_splice_init(&prep_nblist, &blck_nblist);
16819 post_cnt = block_cnt;
16820 } else if (block_cnt == 1) {
16821 /* last single sgl with non-contiguous xri */
16822 if (sgl_size > SGL_PAGE_SIZE)
16823 pdma_phys_sgl1 =
16824 lpfc_ncmd->dma_phys_sgl +
16825 SGL_PAGE_SIZE;
16826 else
16827 pdma_phys_sgl1 = 0;
16828 cur_xritag = lpfc_ncmd->cur_iocbq.sli4_xritag;
16829 status = lpfc_sli4_post_sgl(
16830 phba, lpfc_ncmd->dma_phys_sgl,
16831 pdma_phys_sgl1, cur_xritag);
16832 if (status) {
c490850a
JS
16833 /* Post error. Buffer unavailable. */
16834 lpfc_ncmd->flags |=
16835 LPFC_SBUF_NOT_POSTED;
0794d601 16836 } else {
c490850a
JS
16837 /* Post success. Bffer available. */
16838 lpfc_ncmd->flags &=
16839 ~LPFC_SBUF_NOT_POSTED;
0794d601
JS
16840 lpfc_ncmd->status = IOSTAT_SUCCESS;
16841 num_posted++;
16842 }
16843 /* success, put on NVME buffer sgl list */
16844 list_add_tail(&lpfc_ncmd->list, &nvme_nblist);
16845 }
16846 }
16847
16848 /* continue until a nembed page worth of sgls */
16849 if (post_cnt == 0)
16850 continue;
16851
16852 /* post block of NVME buffer list sgls */
5e5b511d
JS
16853 status = lpfc_sli4_post_io_sgl_block(phba, &blck_nblist,
16854 post_cnt);
0794d601
JS
16855
16856 /* don't reset xirtag due to hole in xri block */
16857 if (block_cnt == 0)
16858 last_xritag = NO_XRI;
16859
16860 /* reset NVME buffer post count for next round of posting */
16861 post_cnt = 0;
16862
16863 /* put posted NVME buffer-sgl posted on NVME buffer sgl list */
16864 while (!list_empty(&blck_nblist)) {
16865 list_remove_head(&blck_nblist, lpfc_ncmd,
c490850a 16866 struct lpfc_io_buf, list);
0794d601 16867 if (status) {
c490850a
JS
16868 /* Post error. Mark buffer unavailable. */
16869 lpfc_ncmd->flags |= LPFC_SBUF_NOT_POSTED;
0794d601 16870 } else {
c490850a
JS
16871 /* Post success, Mark buffer available. */
16872 lpfc_ncmd->flags &= ~LPFC_SBUF_NOT_POSTED;
0794d601
JS
16873 lpfc_ncmd->status = IOSTAT_SUCCESS;
16874 num_posted++;
16875 }
16876 list_add_tail(&lpfc_ncmd->list, &nvme_nblist);
16877 }
16878 }
16879 /* Push NVME buffers with sgl posted to the available list */
5e5b511d
JS
16880 lpfc_io_buf_replenish(phba, &nvme_nblist);
16881
0794d601
JS
16882 return num_posted;
16883}
16884
4f774513
JS
16885/**
16886 * lpfc_fc_frame_check - Check that this frame is a valid frame to handle
16887 * @phba: pointer to lpfc_hba struct that the frame was received on
16888 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
16889 *
16890 * This function checks the fields in the @fc_hdr to see if the FC frame is a
16891 * valid type of frame that the LPFC driver will handle. This function will
16892 * return a zero if the frame is a valid frame or a non zero value when the
16893 * frame does not pass the check.
16894 **/
16895static int
16896lpfc_fc_frame_check(struct lpfc_hba *phba, struct fc_frame_header *fc_hdr)
16897{
474ffb74 16898 /* make rctl_names static to save stack space */
4f774513 16899 struct fc_vft_header *fc_vft_hdr;
546fc854 16900 uint32_t *header = (uint32_t *) fc_hdr;
4f774513
JS
16901
16902 switch (fc_hdr->fh_r_ctl) {
16903 case FC_RCTL_DD_UNCAT: /* uncategorized information */
16904 case FC_RCTL_DD_SOL_DATA: /* solicited data */
16905 case FC_RCTL_DD_UNSOL_CTL: /* unsolicited control */
16906 case FC_RCTL_DD_SOL_CTL: /* solicited control or reply */
16907 case FC_RCTL_DD_UNSOL_DATA: /* unsolicited data */
16908 case FC_RCTL_DD_DATA_DESC: /* data descriptor */
16909 case FC_RCTL_DD_UNSOL_CMD: /* unsolicited command */
16910 case FC_RCTL_DD_CMD_STATUS: /* command status */
16911 case FC_RCTL_ELS_REQ: /* extended link services request */
16912 case FC_RCTL_ELS_REP: /* extended link services reply */
16913 case FC_RCTL_ELS4_REQ: /* FC-4 ELS request */
16914 case FC_RCTL_ELS4_REP: /* FC-4 ELS reply */
16915 case FC_RCTL_BA_NOP: /* basic link service NOP */
16916 case FC_RCTL_BA_ABTS: /* basic link service abort */
16917 case FC_RCTL_BA_RMC: /* remove connection */
16918 case FC_RCTL_BA_ACC: /* basic accept */
16919 case FC_RCTL_BA_RJT: /* basic reject */
16920 case FC_RCTL_BA_PRMT:
16921 case FC_RCTL_ACK_1: /* acknowledge_1 */
16922 case FC_RCTL_ACK_0: /* acknowledge_0 */
16923 case FC_RCTL_P_RJT: /* port reject */
16924 case FC_RCTL_F_RJT: /* fabric reject */
16925 case FC_RCTL_P_BSY: /* port busy */
16926 case FC_RCTL_F_BSY: /* fabric busy to data frame */
16927 case FC_RCTL_F_BSYL: /* fabric busy to link control frame */
16928 case FC_RCTL_LCR: /* link credit reset */
ae9e28f3 16929 case FC_RCTL_MDS_DIAGS: /* MDS Diagnostics */
4f774513
JS
16930 case FC_RCTL_END: /* end */
16931 break;
16932 case FC_RCTL_VFTH: /* Virtual Fabric tagging Header */
16933 fc_vft_hdr = (struct fc_vft_header *)fc_hdr;
16934 fc_hdr = &((struct fc_frame_header *)fc_vft_hdr)[1];
16935 return lpfc_fc_frame_check(phba, fc_hdr);
16936 default:
16937 goto drop;
16938 }
ae9e28f3 16939
4f774513
JS
16940 switch (fc_hdr->fh_type) {
16941 case FC_TYPE_BLS:
16942 case FC_TYPE_ELS:
16943 case FC_TYPE_FCP:
16944 case FC_TYPE_CT:
895427bd 16945 case FC_TYPE_NVME:
4f774513
JS
16946 break;
16947 case FC_TYPE_IP:
16948 case FC_TYPE_ILS:
16949 default:
16950 goto drop;
16951 }
546fc854 16952
4f774513 16953 lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
78e1d200 16954 "2538 Received frame rctl:x%x, type:x%x, "
88f43a08 16955 "frame Data:%08x %08x %08x %08x %08x %08x %08x\n",
78e1d200
JS
16956 fc_hdr->fh_r_ctl, fc_hdr->fh_type,
16957 be32_to_cpu(header[0]), be32_to_cpu(header[1]),
16958 be32_to_cpu(header[2]), be32_to_cpu(header[3]),
16959 be32_to_cpu(header[4]), be32_to_cpu(header[5]),
16960 be32_to_cpu(header[6]));
4f774513
JS
16961 return 0;
16962drop:
16963 lpfc_printf_log(phba, KERN_WARNING, LOG_ELS,
78e1d200
JS
16964 "2539 Dropped frame rctl:x%x type:x%x\n",
16965 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
4f774513
JS
16966 return 1;
16967}
16968
16969/**
16970 * lpfc_fc_hdr_get_vfi - Get the VFI from an FC frame
16971 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
16972 *
16973 * This function processes the FC header to retrieve the VFI from the VF
16974 * header, if one exists. This function will return the VFI if one exists
16975 * or 0 if no VSAN Header exists.
16976 **/
16977static uint32_t
16978lpfc_fc_hdr_get_vfi(struct fc_frame_header *fc_hdr)
16979{
16980 struct fc_vft_header *fc_vft_hdr = (struct fc_vft_header *)fc_hdr;
16981
16982 if (fc_hdr->fh_r_ctl != FC_RCTL_VFTH)
16983 return 0;
16984 return bf_get(fc_vft_hdr_vf_id, fc_vft_hdr);
16985}
16986
16987/**
16988 * lpfc_fc_frame_to_vport - Finds the vport that a frame is destined to
16989 * @phba: Pointer to the HBA structure to search for the vport on
16990 * @fc_hdr: A pointer to the FC Header data (In Big Endian Format)
16991 * @fcfi: The FC Fabric ID that the frame came from
16992 *
16993 * This function searches the @phba for a vport that matches the content of the
16994 * @fc_hdr passed in and the @fcfi. This function uses the @fc_hdr to fetch the
16995 * VFI, if the Virtual Fabric Tagging Header exists, and the DID. This function
16996 * returns the matching vport pointer or NULL if unable to match frame to a
16997 * vport.
16998 **/
16999static struct lpfc_vport *
17000lpfc_fc_frame_to_vport(struct lpfc_hba *phba, struct fc_frame_header *fc_hdr,
895427bd 17001 uint16_t fcfi, uint32_t did)
4f774513
JS
17002{
17003 struct lpfc_vport **vports;
17004 struct lpfc_vport *vport = NULL;
17005 int i;
939723a4 17006
bf08611b
JS
17007 if (did == Fabric_DID)
17008 return phba->pport;
939723a4
JS
17009 if ((phba->pport->fc_flag & FC_PT2PT) &&
17010 !(phba->link_state == LPFC_HBA_READY))
17011 return phba->pport;
17012
4f774513 17013 vports = lpfc_create_vport_work_array(phba);
895427bd 17014 if (vports != NULL) {
4f774513
JS
17015 for (i = 0; i <= phba->max_vpi && vports[i] != NULL; i++) {
17016 if (phba->fcf.fcfi == fcfi &&
17017 vports[i]->vfi == lpfc_fc_hdr_get_vfi(fc_hdr) &&
17018 vports[i]->fc_myDID == did) {
17019 vport = vports[i];
17020 break;
17021 }
17022 }
895427bd 17023 }
4f774513
JS
17024 lpfc_destroy_vport_work_array(phba, vports);
17025 return vport;
17026}
17027
45ed1190
JS
17028/**
17029 * lpfc_update_rcv_time_stamp - Update vport's rcv seq time stamp
17030 * @vport: The vport to work on.
17031 *
17032 * This function updates the receive sequence time stamp for this vport. The
17033 * receive sequence time stamp indicates the time that the last frame of the
17034 * the sequence that has been idle for the longest amount of time was received.
17035 * the driver uses this time stamp to indicate if any received sequences have
17036 * timed out.
17037 **/
5d8b8167 17038static void
45ed1190
JS
17039lpfc_update_rcv_time_stamp(struct lpfc_vport *vport)
17040{
17041 struct lpfc_dmabuf *h_buf;
17042 struct hbq_dmabuf *dmabuf = NULL;
17043
17044 /* get the oldest sequence on the rcv list */
17045 h_buf = list_get_first(&vport->rcv_buffer_list,
17046 struct lpfc_dmabuf, list);
17047 if (!h_buf)
17048 return;
17049 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17050 vport->rcv_buffer_time_stamp = dmabuf->time_stamp;
17051}
17052
17053/**
17054 * lpfc_cleanup_rcv_buffers - Cleans up all outstanding receive sequences.
17055 * @vport: The vport that the received sequences were sent to.
17056 *
17057 * This function cleans up all outstanding received sequences. This is called
17058 * by the driver when a link event or user action invalidates all the received
17059 * sequences.
17060 **/
17061void
17062lpfc_cleanup_rcv_buffers(struct lpfc_vport *vport)
17063{
17064 struct lpfc_dmabuf *h_buf, *hnext;
17065 struct lpfc_dmabuf *d_buf, *dnext;
17066 struct hbq_dmabuf *dmabuf = NULL;
17067
17068 /* start with the oldest sequence on the rcv list */
17069 list_for_each_entry_safe(h_buf, hnext, &vport->rcv_buffer_list, list) {
17070 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17071 list_del_init(&dmabuf->hbuf.list);
17072 list_for_each_entry_safe(d_buf, dnext,
17073 &dmabuf->dbuf.list, list) {
17074 list_del_init(&d_buf->list);
17075 lpfc_in_buf_free(vport->phba, d_buf);
17076 }
17077 lpfc_in_buf_free(vport->phba, &dmabuf->dbuf);
17078 }
17079}
17080
17081/**
17082 * lpfc_rcv_seq_check_edtov - Cleans up timed out receive sequences.
17083 * @vport: The vport that the received sequences were sent to.
17084 *
17085 * This function determines whether any received sequences have timed out by
17086 * first checking the vport's rcv_buffer_time_stamp. If this time_stamp
17087 * indicates that there is at least one timed out sequence this routine will
17088 * go through the received sequences one at a time from most inactive to most
17089 * active to determine which ones need to be cleaned up. Once it has determined
17090 * that a sequence needs to be cleaned up it will simply free up the resources
17091 * without sending an abort.
17092 **/
17093void
17094lpfc_rcv_seq_check_edtov(struct lpfc_vport *vport)
17095{
17096 struct lpfc_dmabuf *h_buf, *hnext;
17097 struct lpfc_dmabuf *d_buf, *dnext;
17098 struct hbq_dmabuf *dmabuf = NULL;
17099 unsigned long timeout;
17100 int abort_count = 0;
17101
17102 timeout = (msecs_to_jiffies(vport->phba->fc_edtov) +
17103 vport->rcv_buffer_time_stamp);
17104 if (list_empty(&vport->rcv_buffer_list) ||
17105 time_before(jiffies, timeout))
17106 return;
17107 /* start with the oldest sequence on the rcv list */
17108 list_for_each_entry_safe(h_buf, hnext, &vport->rcv_buffer_list, list) {
17109 dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17110 timeout = (msecs_to_jiffies(vport->phba->fc_edtov) +
17111 dmabuf->time_stamp);
17112 if (time_before(jiffies, timeout))
17113 break;
17114 abort_count++;
17115 list_del_init(&dmabuf->hbuf.list);
17116 list_for_each_entry_safe(d_buf, dnext,
17117 &dmabuf->dbuf.list, list) {
17118 list_del_init(&d_buf->list);
17119 lpfc_in_buf_free(vport->phba, d_buf);
17120 }
17121 lpfc_in_buf_free(vport->phba, &dmabuf->dbuf);
17122 }
17123 if (abort_count)
17124 lpfc_update_rcv_time_stamp(vport);
17125}
17126
4f774513
JS
17127/**
17128 * lpfc_fc_frame_add - Adds a frame to the vport's list of received sequences
17129 * @dmabuf: pointer to a dmabuf that describes the hdr and data of the FC frame
17130 *
17131 * This function searches through the existing incomplete sequences that have
17132 * been sent to this @vport. If the frame matches one of the incomplete
17133 * sequences then the dbuf in the @dmabuf is added to the list of frames that
17134 * make up that sequence. If no sequence is found that matches this frame then
17135 * the function will add the hbuf in the @dmabuf to the @vport's rcv_buffer_list
17136 * This function returns a pointer to the first dmabuf in the sequence list that
17137 * the frame was linked to.
17138 **/
17139static struct hbq_dmabuf *
17140lpfc_fc_frame_add(struct lpfc_vport *vport, struct hbq_dmabuf *dmabuf)
17141{
17142 struct fc_frame_header *new_hdr;
17143 struct fc_frame_header *temp_hdr;
17144 struct lpfc_dmabuf *d_buf;
17145 struct lpfc_dmabuf *h_buf;
17146 struct hbq_dmabuf *seq_dmabuf = NULL;
17147 struct hbq_dmabuf *temp_dmabuf = NULL;
4360ca9c 17148 uint8_t found = 0;
4f774513 17149
4d9ab994 17150 INIT_LIST_HEAD(&dmabuf->dbuf.list);
45ed1190 17151 dmabuf->time_stamp = jiffies;
4f774513 17152 new_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
4360ca9c 17153
4f774513
JS
17154 /* Use the hdr_buf to find the sequence that this frame belongs to */
17155 list_for_each_entry(h_buf, &vport->rcv_buffer_list, list) {
17156 temp_hdr = (struct fc_frame_header *)h_buf->virt;
17157 if ((temp_hdr->fh_seq_id != new_hdr->fh_seq_id) ||
17158 (temp_hdr->fh_ox_id != new_hdr->fh_ox_id) ||
17159 (memcmp(&temp_hdr->fh_s_id, &new_hdr->fh_s_id, 3)))
17160 continue;
17161 /* found a pending sequence that matches this frame */
17162 seq_dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17163 break;
17164 }
17165 if (!seq_dmabuf) {
17166 /*
17167 * This indicates first frame received for this sequence.
17168 * Queue the buffer on the vport's rcv_buffer_list.
17169 */
17170 list_add_tail(&dmabuf->hbuf.list, &vport->rcv_buffer_list);
45ed1190 17171 lpfc_update_rcv_time_stamp(vport);
4f774513
JS
17172 return dmabuf;
17173 }
17174 temp_hdr = seq_dmabuf->hbuf.virt;
eeead811
JS
17175 if (be16_to_cpu(new_hdr->fh_seq_cnt) <
17176 be16_to_cpu(temp_hdr->fh_seq_cnt)) {
4d9ab994
JS
17177 list_del_init(&seq_dmabuf->hbuf.list);
17178 list_add_tail(&dmabuf->hbuf.list, &vport->rcv_buffer_list);
17179 list_add_tail(&dmabuf->dbuf.list, &seq_dmabuf->dbuf.list);
45ed1190 17180 lpfc_update_rcv_time_stamp(vport);
4f774513
JS
17181 return dmabuf;
17182 }
45ed1190
JS
17183 /* move this sequence to the tail to indicate a young sequence */
17184 list_move_tail(&seq_dmabuf->hbuf.list, &vport->rcv_buffer_list);
17185 seq_dmabuf->time_stamp = jiffies;
17186 lpfc_update_rcv_time_stamp(vport);
eeead811
JS
17187 if (list_empty(&seq_dmabuf->dbuf.list)) {
17188 temp_hdr = dmabuf->hbuf.virt;
17189 list_add_tail(&dmabuf->dbuf.list, &seq_dmabuf->dbuf.list);
17190 return seq_dmabuf;
17191 }
4f774513 17192 /* find the correct place in the sequence to insert this frame */
4360ca9c
JS
17193 d_buf = list_entry(seq_dmabuf->dbuf.list.prev, typeof(*d_buf), list);
17194 while (!found) {
4f774513
JS
17195 temp_dmabuf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17196 temp_hdr = (struct fc_frame_header *)temp_dmabuf->hbuf.virt;
17197 /*
17198 * If the frame's sequence count is greater than the frame on
17199 * the list then insert the frame right after this frame
17200 */
eeead811
JS
17201 if (be16_to_cpu(new_hdr->fh_seq_cnt) >
17202 be16_to_cpu(temp_hdr->fh_seq_cnt)) {
4f774513 17203 list_add(&dmabuf->dbuf.list, &temp_dmabuf->dbuf.list);
4360ca9c
JS
17204 found = 1;
17205 break;
4f774513 17206 }
4360ca9c
JS
17207
17208 if (&d_buf->list == &seq_dmabuf->dbuf.list)
17209 break;
17210 d_buf = list_entry(d_buf->list.prev, typeof(*d_buf), list);
4f774513 17211 }
4360ca9c
JS
17212
17213 if (found)
17214 return seq_dmabuf;
4f774513
JS
17215 return NULL;
17216}
17217
6669f9bb
JS
17218/**
17219 * lpfc_sli4_abort_partial_seq - Abort partially assembled unsol sequence
17220 * @vport: pointer to a vitural port
17221 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17222 *
17223 * This function tries to abort from the partially assembed sequence, described
17224 * by the information from basic abbort @dmabuf. It checks to see whether such
17225 * partially assembled sequence held by the driver. If so, it shall free up all
17226 * the frames from the partially assembled sequence.
17227 *
17228 * Return
17229 * true -- if there is matching partially assembled sequence present and all
17230 * the frames freed with the sequence;
17231 * false -- if there is no matching partially assembled sequence present so
17232 * nothing got aborted in the lower layer driver
17233 **/
17234static bool
17235lpfc_sli4_abort_partial_seq(struct lpfc_vport *vport,
17236 struct hbq_dmabuf *dmabuf)
17237{
17238 struct fc_frame_header *new_hdr;
17239 struct fc_frame_header *temp_hdr;
17240 struct lpfc_dmabuf *d_buf, *n_buf, *h_buf;
17241 struct hbq_dmabuf *seq_dmabuf = NULL;
17242
17243 /* Use the hdr_buf to find the sequence that matches this frame */
17244 INIT_LIST_HEAD(&dmabuf->dbuf.list);
17245 INIT_LIST_HEAD(&dmabuf->hbuf.list);
17246 new_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
17247 list_for_each_entry(h_buf, &vport->rcv_buffer_list, list) {
17248 temp_hdr = (struct fc_frame_header *)h_buf->virt;
17249 if ((temp_hdr->fh_seq_id != new_hdr->fh_seq_id) ||
17250 (temp_hdr->fh_ox_id != new_hdr->fh_ox_id) ||
17251 (memcmp(&temp_hdr->fh_s_id, &new_hdr->fh_s_id, 3)))
17252 continue;
17253 /* found a pending sequence that matches this frame */
17254 seq_dmabuf = container_of(h_buf, struct hbq_dmabuf, hbuf);
17255 break;
17256 }
17257
17258 /* Free up all the frames from the partially assembled sequence */
17259 if (seq_dmabuf) {
17260 list_for_each_entry_safe(d_buf, n_buf,
17261 &seq_dmabuf->dbuf.list, list) {
17262 list_del_init(&d_buf->list);
17263 lpfc_in_buf_free(vport->phba, d_buf);
17264 }
17265 return true;
17266 }
17267 return false;
17268}
17269
6dd9e31c
JS
17270/**
17271 * lpfc_sli4_abort_ulp_seq - Abort assembled unsol sequence from ulp
17272 * @vport: pointer to a vitural port
17273 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17274 *
17275 * This function tries to abort from the assembed sequence from upper level
17276 * protocol, described by the information from basic abbort @dmabuf. It
17277 * checks to see whether such pending context exists at upper level protocol.
17278 * If so, it shall clean up the pending context.
17279 *
17280 * Return
17281 * true -- if there is matching pending context of the sequence cleaned
17282 * at ulp;
17283 * false -- if there is no matching pending context of the sequence present
17284 * at ulp.
17285 **/
17286static bool
17287lpfc_sli4_abort_ulp_seq(struct lpfc_vport *vport, struct hbq_dmabuf *dmabuf)
17288{
17289 struct lpfc_hba *phba = vport->phba;
17290 int handled;
17291
17292 /* Accepting abort at ulp with SLI4 only */
17293 if (phba->sli_rev < LPFC_SLI_REV4)
17294 return false;
17295
17296 /* Register all caring upper level protocols to attend abort */
17297 handled = lpfc_ct_handle_unsol_abort(phba, dmabuf);
17298 if (handled)
17299 return true;
17300
17301 return false;
17302}
17303
6669f9bb 17304/**
546fc854 17305 * lpfc_sli4_seq_abort_rsp_cmpl - BLS ABORT RSP seq abort iocb complete handler
6669f9bb
JS
17306 * @phba: Pointer to HBA context object.
17307 * @cmd_iocbq: pointer to the command iocbq structure.
17308 * @rsp_iocbq: pointer to the response iocbq structure.
17309 *
546fc854 17310 * This function handles the sequence abort response iocb command complete
6669f9bb
JS
17311 * event. It properly releases the memory allocated to the sequence abort
17312 * accept iocb.
17313 **/
17314static void
546fc854 17315lpfc_sli4_seq_abort_rsp_cmpl(struct lpfc_hba *phba,
6669f9bb
JS
17316 struct lpfc_iocbq *cmd_iocbq,
17317 struct lpfc_iocbq *rsp_iocbq)
17318{
6dd9e31c
JS
17319 struct lpfc_nodelist *ndlp;
17320
17321 if (cmd_iocbq) {
17322 ndlp = (struct lpfc_nodelist *)cmd_iocbq->context1;
17323 lpfc_nlp_put(ndlp);
17324 lpfc_nlp_not_used(ndlp);
6669f9bb 17325 lpfc_sli_release_iocbq(phba, cmd_iocbq);
6dd9e31c 17326 }
6b5151fd
JS
17327
17328 /* Failure means BLS ABORT RSP did not get delivered to remote node*/
17329 if (rsp_iocbq && rsp_iocbq->iocb.ulpStatus)
17330 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
17331 "3154 BLS ABORT RSP failed, data: x%x/x%x\n",
17332 rsp_iocbq->iocb.ulpStatus,
17333 rsp_iocbq->iocb.un.ulpWord[4]);
6669f9bb
JS
17334}
17335
6d368e53
JS
17336/**
17337 * lpfc_sli4_xri_inrange - check xri is in range of xris owned by driver.
17338 * @phba: Pointer to HBA context object.
17339 * @xri: xri id in transaction.
17340 *
17341 * This function validates the xri maps to the known range of XRIs allocated an
17342 * used by the driver.
17343 **/
7851fe2c 17344uint16_t
6d368e53
JS
17345lpfc_sli4_xri_inrange(struct lpfc_hba *phba,
17346 uint16_t xri)
17347{
a2fc4aef 17348 uint16_t i;
6d368e53
JS
17349
17350 for (i = 0; i < phba->sli4_hba.max_cfg_param.max_xri; i++) {
17351 if (xri == phba->sli4_hba.xri_ids[i])
17352 return i;
17353 }
17354 return NO_XRI;
17355}
17356
6669f9bb 17357/**
546fc854 17358 * lpfc_sli4_seq_abort_rsp - bls rsp to sequence abort
6669f9bb
JS
17359 * @phba: Pointer to HBA context object.
17360 * @fc_hdr: pointer to a FC frame header.
17361 *
546fc854 17362 * This function sends a basic response to a previous unsol sequence abort
6669f9bb
JS
17363 * event after aborting the sequence handling.
17364 **/
86c67379 17365void
6dd9e31c
JS
17366lpfc_sli4_seq_abort_rsp(struct lpfc_vport *vport,
17367 struct fc_frame_header *fc_hdr, bool aborted)
6669f9bb 17368{
6dd9e31c 17369 struct lpfc_hba *phba = vport->phba;
6669f9bb
JS
17370 struct lpfc_iocbq *ctiocb = NULL;
17371 struct lpfc_nodelist *ndlp;
ee0f4fe1 17372 uint16_t oxid, rxid, xri, lxri;
5ffc266e 17373 uint32_t sid, fctl;
6669f9bb 17374 IOCB_t *icmd;
546fc854 17375 int rc;
6669f9bb
JS
17376
17377 if (!lpfc_is_link_up(phba))
17378 return;
17379
17380 sid = sli4_sid_from_fc_hdr(fc_hdr);
17381 oxid = be16_to_cpu(fc_hdr->fh_ox_id);
5ffc266e 17382 rxid = be16_to_cpu(fc_hdr->fh_rx_id);
6669f9bb 17383
6dd9e31c 17384 ndlp = lpfc_findnode_did(vport, sid);
6669f9bb 17385 if (!ndlp) {
9d3d340d 17386 ndlp = lpfc_nlp_init(vport, sid);
6dd9e31c
JS
17387 if (!ndlp) {
17388 lpfc_printf_vlog(vport, KERN_WARNING, LOG_ELS,
17389 "1268 Failed to allocate ndlp for "
17390 "oxid:x%x SID:x%x\n", oxid, sid);
17391 return;
17392 }
6dd9e31c
JS
17393 /* Put ndlp onto pport node list */
17394 lpfc_enqueue_node(vport, ndlp);
17395 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
17396 /* re-setup ndlp without removing from node list */
17397 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
17398 if (!ndlp) {
17399 lpfc_printf_vlog(vport, KERN_WARNING, LOG_ELS,
17400 "3275 Failed to active ndlp found "
17401 "for oxid:x%x SID:x%x\n", oxid, sid);
17402 return;
17403 }
6669f9bb
JS
17404 }
17405
546fc854 17406 /* Allocate buffer for rsp iocb */
6669f9bb
JS
17407 ctiocb = lpfc_sli_get_iocbq(phba);
17408 if (!ctiocb)
17409 return;
17410
5ffc266e
JS
17411 /* Extract the F_CTL field from FC_HDR */
17412 fctl = sli4_fctl_from_fc_hdr(fc_hdr);
17413
6669f9bb 17414 icmd = &ctiocb->iocb;
6669f9bb 17415 icmd->un.xseq64.bdl.bdeSize = 0;
5ffc266e 17416 icmd->un.xseq64.bdl.ulpIoTag32 = 0;
6669f9bb
JS
17417 icmd->un.xseq64.w5.hcsw.Dfctl = 0;
17418 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_ACC;
17419 icmd->un.xseq64.w5.hcsw.Type = FC_TYPE_BLS;
17420
17421 /* Fill in the rest of iocb fields */
17422 icmd->ulpCommand = CMD_XMIT_BLS_RSP64_CX;
17423 icmd->ulpBdeCount = 0;
17424 icmd->ulpLe = 1;
17425 icmd->ulpClass = CLASS3;
6d368e53 17426 icmd->ulpContext = phba->sli4_hba.rpi_ids[ndlp->nlp_rpi];
6dd9e31c 17427 ctiocb->context1 = lpfc_nlp_get(ndlp);
6669f9bb 17428
6669f9bb
JS
17429 ctiocb->iocb_cmpl = NULL;
17430 ctiocb->vport = phba->pport;
546fc854 17431 ctiocb->iocb_cmpl = lpfc_sli4_seq_abort_rsp_cmpl;
6d368e53 17432 ctiocb->sli4_lxritag = NO_XRI;
546fc854
JS
17433 ctiocb->sli4_xritag = NO_XRI;
17434
ee0f4fe1
JS
17435 if (fctl & FC_FC_EX_CTX)
17436 /* Exchange responder sent the abort so we
17437 * own the oxid.
17438 */
17439 xri = oxid;
17440 else
17441 xri = rxid;
17442 lxri = lpfc_sli4_xri_inrange(phba, xri);
17443 if (lxri != NO_XRI)
17444 lpfc_set_rrq_active(phba, ndlp, lxri,
17445 (xri == oxid) ? rxid : oxid, 0);
6dd9e31c
JS
17446 /* For BA_ABTS from exchange responder, if the logical xri with
17447 * the oxid maps to the FCP XRI range, the port no longer has
17448 * that exchange context, send a BLS_RJT. Override the IOCB for
17449 * a BA_RJT.
17450 */
17451 if ((fctl & FC_FC_EX_CTX) &&
895427bd 17452 (lxri > lpfc_sli4_get_iocb_cnt(phba))) {
6dd9e31c
JS
17453 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_RJT;
17454 bf_set(lpfc_vndr_code, &icmd->un.bls_rsp, 0);
17455 bf_set(lpfc_rsn_expln, &icmd->un.bls_rsp, FC_BA_RJT_INV_XID);
17456 bf_set(lpfc_rsn_code, &icmd->un.bls_rsp, FC_BA_RJT_UNABLE);
17457 }
17458
17459 /* If BA_ABTS failed to abort a partially assembled receive sequence,
17460 * the driver no longer has that exchange, send a BLS_RJT. Override
17461 * the IOCB for a BA_RJT.
546fc854 17462 */
6dd9e31c 17463 if (aborted == false) {
546fc854
JS
17464 icmd->un.xseq64.w5.hcsw.Rctl = FC_RCTL_BA_RJT;
17465 bf_set(lpfc_vndr_code, &icmd->un.bls_rsp, 0);
17466 bf_set(lpfc_rsn_expln, &icmd->un.bls_rsp, FC_BA_RJT_INV_XID);
17467 bf_set(lpfc_rsn_code, &icmd->un.bls_rsp, FC_BA_RJT_UNABLE);
17468 }
6669f9bb 17469
5ffc266e
JS
17470 if (fctl & FC_FC_EX_CTX) {
17471 /* ABTS sent by responder to CT exchange, construction
17472 * of BA_ACC will use OX_ID from ABTS for the XRI_TAG
17473 * field and RX_ID from ABTS for RX_ID field.
17474 */
546fc854 17475 bf_set(lpfc_abts_orig, &icmd->un.bls_rsp, LPFC_ABTS_UNSOL_RSP);
5ffc266e
JS
17476 } else {
17477 /* ABTS sent by initiator to CT exchange, construction
17478 * of BA_ACC will need to allocate a new XRI as for the
f09c3acc 17479 * XRI_TAG field.
5ffc266e 17480 */
546fc854 17481 bf_set(lpfc_abts_orig, &icmd->un.bls_rsp, LPFC_ABTS_UNSOL_INT);
5ffc266e 17482 }
f09c3acc 17483 bf_set(lpfc_abts_rxid, &icmd->un.bls_rsp, rxid);
546fc854 17484 bf_set(lpfc_abts_oxid, &icmd->un.bls_rsp, oxid);
5ffc266e 17485
546fc854 17486 /* Xmit CT abts response on exchange <xid> */
6dd9e31c
JS
17487 lpfc_printf_vlog(vport, KERN_INFO, LOG_ELS,
17488 "1200 Send BLS cmd x%x on oxid x%x Data: x%x\n",
17489 icmd->un.xseq64.w5.hcsw.Rctl, oxid, phba->link_state);
546fc854
JS
17490
17491 rc = lpfc_sli_issue_iocb(phba, LPFC_ELS_RING, ctiocb, 0);
17492 if (rc == IOCB_ERROR) {
6dd9e31c
JS
17493 lpfc_printf_vlog(vport, KERN_ERR, LOG_ELS,
17494 "2925 Failed to issue CT ABTS RSP x%x on "
17495 "xri x%x, Data x%x\n",
17496 icmd->un.xseq64.w5.hcsw.Rctl, oxid,
17497 phba->link_state);
17498 lpfc_nlp_put(ndlp);
17499 ctiocb->context1 = NULL;
546fc854
JS
17500 lpfc_sli_release_iocbq(phba, ctiocb);
17501 }
6669f9bb
JS
17502}
17503
17504/**
17505 * lpfc_sli4_handle_unsol_abort - Handle sli-4 unsolicited abort event
17506 * @vport: Pointer to the vport on which this sequence was received
17507 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17508 *
17509 * This function handles an SLI-4 unsolicited abort event. If the unsolicited
17510 * receive sequence is only partially assembed by the driver, it shall abort
17511 * the partially assembled frames for the sequence. Otherwise, if the
17512 * unsolicited receive sequence has been completely assembled and passed to
17513 * the Upper Layer Protocol (UPL), it then mark the per oxid status for the
17514 * unsolicited sequence has been aborted. After that, it will issue a basic
17515 * accept to accept the abort.
17516 **/
5d8b8167 17517static void
6669f9bb
JS
17518lpfc_sli4_handle_unsol_abort(struct lpfc_vport *vport,
17519 struct hbq_dmabuf *dmabuf)
17520{
17521 struct lpfc_hba *phba = vport->phba;
17522 struct fc_frame_header fc_hdr;
5ffc266e 17523 uint32_t fctl;
6dd9e31c 17524 bool aborted;
6669f9bb 17525
6669f9bb
JS
17526 /* Make a copy of fc_hdr before the dmabuf being released */
17527 memcpy(&fc_hdr, dmabuf->hbuf.virt, sizeof(struct fc_frame_header));
5ffc266e 17528 fctl = sli4_fctl_from_fc_hdr(&fc_hdr);
6669f9bb 17529
5ffc266e 17530 if (fctl & FC_FC_EX_CTX) {
6dd9e31c
JS
17531 /* ABTS by responder to exchange, no cleanup needed */
17532 aborted = true;
5ffc266e 17533 } else {
6dd9e31c
JS
17534 /* ABTS by initiator to exchange, need to do cleanup */
17535 aborted = lpfc_sli4_abort_partial_seq(vport, dmabuf);
17536 if (aborted == false)
17537 aborted = lpfc_sli4_abort_ulp_seq(vport, dmabuf);
5ffc266e 17538 }
6dd9e31c
JS
17539 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17540
86c67379
JS
17541 if (phba->nvmet_support) {
17542 lpfc_nvmet_rcv_unsol_abort(vport, &fc_hdr);
17543 return;
17544 }
17545
6dd9e31c
JS
17546 /* Respond with BA_ACC or BA_RJT accordingly */
17547 lpfc_sli4_seq_abort_rsp(vport, &fc_hdr, aborted);
6669f9bb
JS
17548}
17549
4f774513
JS
17550/**
17551 * lpfc_seq_complete - Indicates if a sequence is complete
17552 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17553 *
17554 * This function checks the sequence, starting with the frame described by
17555 * @dmabuf, to see if all the frames associated with this sequence are present.
17556 * the frames associated with this sequence are linked to the @dmabuf using the
17557 * dbuf list. This function looks for two major things. 1) That the first frame
17558 * has a sequence count of zero. 2) There is a frame with last frame of sequence
17559 * set. 3) That there are no holes in the sequence count. The function will
17560 * return 1 when the sequence is complete, otherwise it will return 0.
17561 **/
17562static int
17563lpfc_seq_complete(struct hbq_dmabuf *dmabuf)
17564{
17565 struct fc_frame_header *hdr;
17566 struct lpfc_dmabuf *d_buf;
17567 struct hbq_dmabuf *seq_dmabuf;
17568 uint32_t fctl;
17569 int seq_count = 0;
17570
17571 hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
17572 /* make sure first fame of sequence has a sequence count of zero */
17573 if (hdr->fh_seq_cnt != seq_count)
17574 return 0;
17575 fctl = (hdr->fh_f_ctl[0] << 16 |
17576 hdr->fh_f_ctl[1] << 8 |
17577 hdr->fh_f_ctl[2]);
17578 /* If last frame of sequence we can return success. */
17579 if (fctl & FC_FC_END_SEQ)
17580 return 1;
17581 list_for_each_entry(d_buf, &dmabuf->dbuf.list, list) {
17582 seq_dmabuf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17583 hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
17584 /* If there is a hole in the sequence count then fail. */
eeead811 17585 if (++seq_count != be16_to_cpu(hdr->fh_seq_cnt))
4f774513
JS
17586 return 0;
17587 fctl = (hdr->fh_f_ctl[0] << 16 |
17588 hdr->fh_f_ctl[1] << 8 |
17589 hdr->fh_f_ctl[2]);
17590 /* If last frame of sequence we can return success. */
17591 if (fctl & FC_FC_END_SEQ)
17592 return 1;
17593 }
17594 return 0;
17595}
17596
17597/**
17598 * lpfc_prep_seq - Prep sequence for ULP processing
17599 * @vport: Pointer to the vport on which this sequence was received
17600 * @dmabuf: pointer to a dmabuf that describes the FC sequence
17601 *
17602 * This function takes a sequence, described by a list of frames, and creates
17603 * a list of iocbq structures to describe the sequence. This iocbq list will be
17604 * used to issue to the generic unsolicited sequence handler. This routine
17605 * returns a pointer to the first iocbq in the list. If the function is unable
17606 * to allocate an iocbq then it throw out the received frames that were not
17607 * able to be described and return a pointer to the first iocbq. If unable to
17608 * allocate any iocbqs (including the first) this function will return NULL.
17609 **/
17610static struct lpfc_iocbq *
17611lpfc_prep_seq(struct lpfc_vport *vport, struct hbq_dmabuf *seq_dmabuf)
17612{
7851fe2c 17613 struct hbq_dmabuf *hbq_buf;
4f774513
JS
17614 struct lpfc_dmabuf *d_buf, *n_buf;
17615 struct lpfc_iocbq *first_iocbq, *iocbq;
17616 struct fc_frame_header *fc_hdr;
17617 uint32_t sid;
7851fe2c 17618 uint32_t len, tot_len;
eeead811 17619 struct ulp_bde64 *pbde;
4f774513
JS
17620
17621 fc_hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
17622 /* remove from receive buffer list */
17623 list_del_init(&seq_dmabuf->hbuf.list);
45ed1190 17624 lpfc_update_rcv_time_stamp(vport);
4f774513 17625 /* get the Remote Port's SID */
6669f9bb 17626 sid = sli4_sid_from_fc_hdr(fc_hdr);
7851fe2c 17627 tot_len = 0;
4f774513
JS
17628 /* Get an iocbq struct to fill in. */
17629 first_iocbq = lpfc_sli_get_iocbq(vport->phba);
17630 if (first_iocbq) {
17631 /* Initialize the first IOCB. */
8fa38513 17632 first_iocbq->iocb.unsli3.rcvsli3.acc_len = 0;
4f774513 17633 first_iocbq->iocb.ulpStatus = IOSTAT_SUCCESS;
895427bd 17634 first_iocbq->vport = vport;
939723a4
JS
17635
17636 /* Check FC Header to see what TYPE of frame we are rcv'ing */
17637 if (sli4_type_from_fc_hdr(fc_hdr) == FC_TYPE_ELS) {
17638 first_iocbq->iocb.ulpCommand = CMD_IOCB_RCV_ELS64_CX;
17639 first_iocbq->iocb.un.rcvels.parmRo =
17640 sli4_did_from_fc_hdr(fc_hdr);
17641 first_iocbq->iocb.ulpPU = PARM_NPIV_DID;
17642 } else
17643 first_iocbq->iocb.ulpCommand = CMD_IOCB_RCV_SEQ64_CX;
7851fe2c
JS
17644 first_iocbq->iocb.ulpContext = NO_XRI;
17645 first_iocbq->iocb.unsli3.rcvsli3.ox_id =
17646 be16_to_cpu(fc_hdr->fh_ox_id);
17647 /* iocbq is prepped for internal consumption. Physical vpi. */
17648 first_iocbq->iocb.unsli3.rcvsli3.vpi =
17649 vport->phba->vpi_ids[vport->vpi];
4f774513 17650 /* put the first buffer into the first IOCBq */
48a5a664
JS
17651 tot_len = bf_get(lpfc_rcqe_length,
17652 &seq_dmabuf->cq_event.cqe.rcqe_cmpl);
17653
4f774513
JS
17654 first_iocbq->context2 = &seq_dmabuf->dbuf;
17655 first_iocbq->context3 = NULL;
17656 first_iocbq->iocb.ulpBdeCount = 1;
48a5a664
JS
17657 if (tot_len > LPFC_DATA_BUF_SIZE)
17658 first_iocbq->iocb.un.cont64[0].tus.f.bdeSize =
4f774513 17659 LPFC_DATA_BUF_SIZE;
48a5a664
JS
17660 else
17661 first_iocbq->iocb.un.cont64[0].tus.f.bdeSize = tot_len;
17662
4f774513 17663 first_iocbq->iocb.un.rcvels.remoteID = sid;
48a5a664 17664
7851fe2c 17665 first_iocbq->iocb.unsli3.rcvsli3.acc_len = tot_len;
4f774513
JS
17666 }
17667 iocbq = first_iocbq;
17668 /*
17669 * Each IOCBq can have two Buffers assigned, so go through the list
17670 * of buffers for this sequence and save two buffers in each IOCBq
17671 */
17672 list_for_each_entry_safe(d_buf, n_buf, &seq_dmabuf->dbuf.list, list) {
17673 if (!iocbq) {
17674 lpfc_in_buf_free(vport->phba, d_buf);
17675 continue;
17676 }
17677 if (!iocbq->context3) {
17678 iocbq->context3 = d_buf;
17679 iocbq->iocb.ulpBdeCount++;
7851fe2c
JS
17680 /* We need to get the size out of the right CQE */
17681 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17682 len = bf_get(lpfc_rcqe_length,
17683 &hbq_buf->cq_event.cqe.rcqe_cmpl);
48a5a664
JS
17684 pbde = (struct ulp_bde64 *)
17685 &iocbq->iocb.unsli3.sli3Words[4];
17686 if (len > LPFC_DATA_BUF_SIZE)
17687 pbde->tus.f.bdeSize = LPFC_DATA_BUF_SIZE;
17688 else
17689 pbde->tus.f.bdeSize = len;
17690
7851fe2c
JS
17691 iocbq->iocb.unsli3.rcvsli3.acc_len += len;
17692 tot_len += len;
4f774513
JS
17693 } else {
17694 iocbq = lpfc_sli_get_iocbq(vport->phba);
17695 if (!iocbq) {
17696 if (first_iocbq) {
17697 first_iocbq->iocb.ulpStatus =
17698 IOSTAT_FCP_RSP_ERROR;
17699 first_iocbq->iocb.un.ulpWord[4] =
17700 IOERR_NO_RESOURCES;
17701 }
17702 lpfc_in_buf_free(vport->phba, d_buf);
17703 continue;
17704 }
48a5a664
JS
17705 /* We need to get the size out of the right CQE */
17706 hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
17707 len = bf_get(lpfc_rcqe_length,
17708 &hbq_buf->cq_event.cqe.rcqe_cmpl);
4f774513
JS
17709 iocbq->context2 = d_buf;
17710 iocbq->context3 = NULL;
17711 iocbq->iocb.ulpBdeCount = 1;
48a5a664
JS
17712 if (len > LPFC_DATA_BUF_SIZE)
17713 iocbq->iocb.un.cont64[0].tus.f.bdeSize =
4f774513 17714 LPFC_DATA_BUF_SIZE;
48a5a664
JS
17715 else
17716 iocbq->iocb.un.cont64[0].tus.f.bdeSize = len;
7851fe2c 17717
7851fe2c
JS
17718 tot_len += len;
17719 iocbq->iocb.unsli3.rcvsli3.acc_len = tot_len;
17720
4f774513
JS
17721 iocbq->iocb.un.rcvels.remoteID = sid;
17722 list_add_tail(&iocbq->list, &first_iocbq->list);
17723 }
17724 }
17725 return first_iocbq;
17726}
17727
6669f9bb
JS
17728static void
17729lpfc_sli4_send_seq_to_ulp(struct lpfc_vport *vport,
17730 struct hbq_dmabuf *seq_dmabuf)
17731{
17732 struct fc_frame_header *fc_hdr;
17733 struct lpfc_iocbq *iocbq, *curr_iocb, *next_iocb;
17734 struct lpfc_hba *phba = vport->phba;
17735
17736 fc_hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
17737 iocbq = lpfc_prep_seq(vport, seq_dmabuf);
17738 if (!iocbq) {
17739 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
17740 "2707 Ring %d handler: Failed to allocate "
17741 "iocb Rctl x%x Type x%x received\n",
17742 LPFC_ELS_RING,
17743 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
17744 return;
17745 }
17746 if (!lpfc_complete_unsol_iocb(phba,
895427bd 17747 phba->sli4_hba.els_wq->pring,
6669f9bb
JS
17748 iocbq, fc_hdr->fh_r_ctl,
17749 fc_hdr->fh_type))
6d368e53 17750 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6669f9bb
JS
17751 "2540 Ring %d handler: unexpected Rctl "
17752 "x%x Type x%x received\n",
17753 LPFC_ELS_RING,
17754 fc_hdr->fh_r_ctl, fc_hdr->fh_type);
17755
17756 /* Free iocb created in lpfc_prep_seq */
17757 list_for_each_entry_safe(curr_iocb, next_iocb,
17758 &iocbq->list, list) {
17759 list_del_init(&curr_iocb->list);
17760 lpfc_sli_release_iocbq(phba, curr_iocb);
17761 }
17762 lpfc_sli_release_iocbq(phba, iocbq);
17763}
17764
ae9e28f3
JS
17765static void
17766lpfc_sli4_mds_loopback_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
17767 struct lpfc_iocbq *rspiocb)
17768{
17769 struct lpfc_dmabuf *pcmd = cmdiocb->context2;
17770
17771 if (pcmd && pcmd->virt)
771db5c0 17772 dma_pool_free(phba->lpfc_drb_pool, pcmd->virt, pcmd->phys);
ae9e28f3
JS
17773 kfree(pcmd);
17774 lpfc_sli_release_iocbq(phba, cmdiocb);
e817e5d7 17775 lpfc_drain_txq(phba);
ae9e28f3
JS
17776}
17777
17778static void
17779lpfc_sli4_handle_mds_loopback(struct lpfc_vport *vport,
17780 struct hbq_dmabuf *dmabuf)
17781{
17782 struct fc_frame_header *fc_hdr;
17783 struct lpfc_hba *phba = vport->phba;
17784 struct lpfc_iocbq *iocbq = NULL;
17785 union lpfc_wqe *wqe;
17786 struct lpfc_dmabuf *pcmd = NULL;
17787 uint32_t frame_len;
17788 int rc;
e817e5d7 17789 unsigned long iflags;
ae9e28f3
JS
17790
17791 fc_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
17792 frame_len = bf_get(lpfc_rcqe_length, &dmabuf->cq_event.cqe.rcqe_cmpl);
17793
17794 /* Send the received frame back */
17795 iocbq = lpfc_sli_get_iocbq(phba);
e817e5d7
JS
17796 if (!iocbq) {
17797 /* Queue cq event and wakeup worker thread to process it */
17798 spin_lock_irqsave(&phba->hbalock, iflags);
17799 list_add_tail(&dmabuf->cq_event.list,
17800 &phba->sli4_hba.sp_queue_event);
17801 phba->hba_flag |= HBA_SP_QUEUE_EVT;
17802 spin_unlock_irqrestore(&phba->hbalock, iflags);
17803 lpfc_worker_wake_up(phba);
17804 return;
17805 }
ae9e28f3
JS
17806
17807 /* Allocate buffer for command payload */
17808 pcmd = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
17809 if (pcmd)
771db5c0 17810 pcmd->virt = dma_pool_alloc(phba->lpfc_drb_pool, GFP_KERNEL,
ae9e28f3
JS
17811 &pcmd->phys);
17812 if (!pcmd || !pcmd->virt)
17813 goto exit;
17814
17815 INIT_LIST_HEAD(&pcmd->list);
17816
17817 /* copyin the payload */
17818 memcpy(pcmd->virt, dmabuf->dbuf.virt, frame_len);
17819
17820 /* fill in BDE's for command */
17821 iocbq->iocb.un.xseq64.bdl.addrHigh = putPaddrHigh(pcmd->phys);
17822 iocbq->iocb.un.xseq64.bdl.addrLow = putPaddrLow(pcmd->phys);
17823 iocbq->iocb.un.xseq64.bdl.bdeFlags = BUFF_TYPE_BDE_64;
17824 iocbq->iocb.un.xseq64.bdl.bdeSize = frame_len;
17825
17826 iocbq->context2 = pcmd;
17827 iocbq->vport = vport;
17828 iocbq->iocb_flag &= ~LPFC_FIP_ELS_ID_MASK;
17829 iocbq->iocb_flag |= LPFC_USE_FCPWQIDX;
17830
17831 /*
17832 * Setup rest of the iocb as though it were a WQE
17833 * Build the SEND_FRAME WQE
17834 */
17835 wqe = (union lpfc_wqe *)&iocbq->iocb;
17836
17837 wqe->send_frame.frame_len = frame_len;
17838 wqe->send_frame.fc_hdr_wd0 = be32_to_cpu(*((uint32_t *)fc_hdr));
17839 wqe->send_frame.fc_hdr_wd1 = be32_to_cpu(*((uint32_t *)fc_hdr + 1));
17840 wqe->send_frame.fc_hdr_wd2 = be32_to_cpu(*((uint32_t *)fc_hdr + 2));
17841 wqe->send_frame.fc_hdr_wd3 = be32_to_cpu(*((uint32_t *)fc_hdr + 3));
17842 wqe->send_frame.fc_hdr_wd4 = be32_to_cpu(*((uint32_t *)fc_hdr + 4));
17843 wqe->send_frame.fc_hdr_wd5 = be32_to_cpu(*((uint32_t *)fc_hdr + 5));
17844
17845 iocbq->iocb.ulpCommand = CMD_SEND_FRAME;
17846 iocbq->iocb.ulpLe = 1;
17847 iocbq->iocb_cmpl = lpfc_sli4_mds_loopback_cmpl;
17848 rc = lpfc_sli_issue_iocb(phba, LPFC_ELS_RING, iocbq, 0);
17849 if (rc == IOCB_ERROR)
17850 goto exit;
17851
17852 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17853 return;
17854
17855exit:
17856 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
17857 "2023 Unable to process MDS loopback frame\n");
17858 if (pcmd && pcmd->virt)
771db5c0 17859 dma_pool_free(phba->lpfc_drb_pool, pcmd->virt, pcmd->phys);
ae9e28f3 17860 kfree(pcmd);
401bb416
DK
17861 if (iocbq)
17862 lpfc_sli_release_iocbq(phba, iocbq);
ae9e28f3
JS
17863 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17864}
17865
4f774513
JS
17866/**
17867 * lpfc_sli4_handle_received_buffer - Handle received buffers from firmware
17868 * @phba: Pointer to HBA context object.
17869 *
17870 * This function is called with no lock held. This function processes all
17871 * the received buffers and gives it to upper layers when a received buffer
17872 * indicates that it is the final frame in the sequence. The interrupt
895427bd 17873 * service routine processes received buffers at interrupt contexts.
4f774513
JS
17874 * Worker thread calls lpfc_sli4_handle_received_buffer, which will call the
17875 * appropriate receive function when the final frame in a sequence is received.
17876 **/
4d9ab994
JS
17877void
17878lpfc_sli4_handle_received_buffer(struct lpfc_hba *phba,
17879 struct hbq_dmabuf *dmabuf)
4f774513 17880{
4d9ab994 17881 struct hbq_dmabuf *seq_dmabuf;
4f774513
JS
17882 struct fc_frame_header *fc_hdr;
17883 struct lpfc_vport *vport;
17884 uint32_t fcfi;
939723a4 17885 uint32_t did;
4f774513 17886
4f774513 17887 /* Process each received buffer */
4d9ab994 17888 fc_hdr = (struct fc_frame_header *)dmabuf->hbuf.virt;
2ea259ee 17889
e817e5d7
JS
17890 if (fc_hdr->fh_r_ctl == FC_RCTL_MDS_DIAGS ||
17891 fc_hdr->fh_r_ctl == FC_RCTL_DD_UNSOL_DATA) {
17892 vport = phba->pport;
17893 /* Handle MDS Loopback frames */
17894 lpfc_sli4_handle_mds_loopback(vport, dmabuf);
17895 return;
17896 }
17897
4d9ab994
JS
17898 /* check to see if this a valid type of frame */
17899 if (lpfc_fc_frame_check(phba, fc_hdr)) {
17900 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17901 return;
17902 }
2ea259ee 17903
7851fe2c
JS
17904 if ((bf_get(lpfc_cqe_code,
17905 &dmabuf->cq_event.cqe.rcqe_cmpl) == CQE_CODE_RECEIVE_V1))
17906 fcfi = bf_get(lpfc_rcqe_fcf_id_v1,
17907 &dmabuf->cq_event.cqe.rcqe_cmpl);
17908 else
17909 fcfi = bf_get(lpfc_rcqe_fcf_id,
17910 &dmabuf->cq_event.cqe.rcqe_cmpl);
939723a4 17911
895427bd
JS
17912 /* d_id this frame is directed to */
17913 did = sli4_did_from_fc_hdr(fc_hdr);
17914
17915 vport = lpfc_fc_frame_to_vport(phba, fc_hdr, fcfi, did);
939723a4 17916 if (!vport) {
4d9ab994
JS
17917 /* throw out the frame */
17918 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17919 return;
17920 }
939723a4 17921
939723a4
JS
17922 /* vport is registered unless we rcv a FLOGI directed to Fabric_DID */
17923 if (!(vport->vpi_state & LPFC_VPI_REGISTERED) &&
17924 (did != Fabric_DID)) {
17925 /*
17926 * Throw out the frame if we are not pt2pt.
17927 * The pt2pt protocol allows for discovery frames
17928 * to be received without a registered VPI.
17929 */
17930 if (!(vport->fc_flag & FC_PT2PT) ||
17931 (phba->link_state == LPFC_HBA_READY)) {
17932 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17933 return;
17934 }
17935 }
17936
6669f9bb
JS
17937 /* Handle the basic abort sequence (BA_ABTS) event */
17938 if (fc_hdr->fh_r_ctl == FC_RCTL_BA_ABTS) {
17939 lpfc_sli4_handle_unsol_abort(vport, dmabuf);
17940 return;
17941 }
17942
4d9ab994
JS
17943 /* Link this frame */
17944 seq_dmabuf = lpfc_fc_frame_add(vport, dmabuf);
17945 if (!seq_dmabuf) {
17946 /* unable to add frame to vport - throw it out */
17947 lpfc_in_buf_free(phba, &dmabuf->dbuf);
17948 return;
17949 }
17950 /* If not last frame in sequence continue processing frames. */
def9c7a9 17951 if (!lpfc_seq_complete(seq_dmabuf))
4d9ab994 17952 return;
def9c7a9 17953
6669f9bb
JS
17954 /* Send the complete sequence to the upper layer protocol */
17955 lpfc_sli4_send_seq_to_ulp(vport, seq_dmabuf);
4f774513 17956}
6fb120a7
JS
17957
17958/**
17959 * lpfc_sli4_post_all_rpi_hdrs - Post the rpi header memory region to the port
17960 * @phba: pointer to lpfc hba data structure.
17961 *
17962 * This routine is invoked to post rpi header templates to the
17963 * HBA consistent with the SLI-4 interface spec. This routine
49198b37
JS
17964 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
17965 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6fb120a7
JS
17966 *
17967 * This routine does not require any locks. It's usage is expected
17968 * to be driver load or reset recovery when the driver is
17969 * sequential.
17970 *
17971 * Return codes
af901ca1 17972 * 0 - successful
d439d286 17973 * -EIO - The mailbox failed to complete successfully.
6fb120a7
JS
17974 * When this error occurs, the driver is not guaranteed
17975 * to have any rpi regions posted to the device and
17976 * must either attempt to repost the regions or take a
17977 * fatal error.
17978 **/
17979int
17980lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *phba)
17981{
17982 struct lpfc_rpi_hdr *rpi_page;
17983 uint32_t rc = 0;
6d368e53
JS
17984 uint16_t lrpi = 0;
17985
17986 /* SLI4 ports that support extents do not require RPI headers. */
17987 if (!phba->sli4_hba.rpi_hdrs_in_use)
17988 goto exit;
17989 if (phba->sli4_hba.extents_in_use)
17990 return -EIO;
6fb120a7 17991
6fb120a7 17992 list_for_each_entry(rpi_page, &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
6d368e53
JS
17993 /*
17994 * Assign the rpi headers a physical rpi only if the driver
17995 * has not initialized those resources. A port reset only
17996 * needs the headers posted.
17997 */
17998 if (bf_get(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags) !=
17999 LPFC_RPI_RSRC_RDY)
18000 rpi_page->start_rpi = phba->sli4_hba.rpi_ids[lrpi];
18001
6fb120a7
JS
18002 rc = lpfc_sli4_post_rpi_hdr(phba, rpi_page);
18003 if (rc != MBX_SUCCESS) {
18004 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18005 "2008 Error %d posting all rpi "
18006 "headers\n", rc);
18007 rc = -EIO;
18008 break;
18009 }
18010 }
18011
6d368e53
JS
18012 exit:
18013 bf_set(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags,
18014 LPFC_RPI_RSRC_RDY);
6fb120a7
JS
18015 return rc;
18016}
18017
18018/**
18019 * lpfc_sli4_post_rpi_hdr - Post an rpi header memory region to the port
18020 * @phba: pointer to lpfc hba data structure.
18021 * @rpi_page: pointer to the rpi memory region.
18022 *
18023 * This routine is invoked to post a single rpi header to the
18024 * HBA consistent with the SLI-4 interface spec. This memory region
18025 * maps up to 64 rpi context regions.
18026 *
18027 * Return codes
af901ca1 18028 * 0 - successful
d439d286
JS
18029 * -ENOMEM - No available memory
18030 * -EIO - The mailbox failed to complete successfully.
6fb120a7
JS
18031 **/
18032int
18033lpfc_sli4_post_rpi_hdr(struct lpfc_hba *phba, struct lpfc_rpi_hdr *rpi_page)
18034{
18035 LPFC_MBOXQ_t *mboxq;
18036 struct lpfc_mbx_post_hdr_tmpl *hdr_tmpl;
18037 uint32_t rc = 0;
6fb120a7
JS
18038 uint32_t shdr_status, shdr_add_status;
18039 union lpfc_sli4_cfg_shdr *shdr;
18040
6d368e53
JS
18041 /* SLI4 ports that support extents do not require RPI headers. */
18042 if (!phba->sli4_hba.rpi_hdrs_in_use)
18043 return rc;
18044 if (phba->sli4_hba.extents_in_use)
18045 return -EIO;
18046
6fb120a7
JS
18047 /* The port is notified of the header region via a mailbox command. */
18048 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18049 if (!mboxq) {
18050 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18051 "2001 Unable to allocate memory for issuing "
18052 "SLI_CONFIG_SPECIAL mailbox command\n");
18053 return -ENOMEM;
18054 }
18055
18056 /* Post all rpi memory regions to the port. */
18057 hdr_tmpl = &mboxq->u.mqe.un.hdr_tmpl;
6fb120a7
JS
18058 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_FCOE,
18059 LPFC_MBOX_OPCODE_FCOE_POST_HDR_TEMPLATE,
18060 sizeof(struct lpfc_mbx_post_hdr_tmpl) -
fedd3b7b
JS
18061 sizeof(struct lpfc_sli4_cfg_mhdr),
18062 LPFC_SLI4_MBX_EMBED);
6d368e53
JS
18063
18064
18065 /* Post the physical rpi to the port for this rpi header. */
6fb120a7
JS
18066 bf_set(lpfc_mbx_post_hdr_tmpl_rpi_offset, hdr_tmpl,
18067 rpi_page->start_rpi);
6d368e53
JS
18068 bf_set(lpfc_mbx_post_hdr_tmpl_page_cnt,
18069 hdr_tmpl, rpi_page->page_count);
18070
6fb120a7
JS
18071 hdr_tmpl->rpi_paddr_lo = putPaddrLow(rpi_page->dmabuf->phys);
18072 hdr_tmpl->rpi_paddr_hi = putPaddrHigh(rpi_page->dmabuf->phys);
f1126688 18073 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
6fb120a7
JS
18074 shdr = (union lpfc_sli4_cfg_shdr *) &hdr_tmpl->header.cfg_shdr;
18075 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
18076 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
18077 if (rc != MBX_TIMEOUT)
18078 mempool_free(mboxq, phba->mbox_mem_pool);
18079 if (shdr_status || shdr_add_status || rc) {
18080 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18081 "2514 POST_RPI_HDR mailbox failed with "
18082 "status x%x add_status x%x, mbx status x%x\n",
18083 shdr_status, shdr_add_status, rc);
18084 rc = -ENXIO;
845d9e8d
JS
18085 } else {
18086 /*
18087 * The next_rpi stores the next logical module-64 rpi value used
18088 * to post physical rpis in subsequent rpi postings.
18089 */
18090 spin_lock_irq(&phba->hbalock);
18091 phba->sli4_hba.next_rpi = rpi_page->next_rpi;
18092 spin_unlock_irq(&phba->hbalock);
6fb120a7
JS
18093 }
18094 return rc;
18095}
18096
18097/**
18098 * lpfc_sli4_alloc_rpi - Get an available rpi in the device's range
18099 * @phba: pointer to lpfc hba data structure.
18100 *
18101 * This routine is invoked to post rpi header templates to the
18102 * HBA consistent with the SLI-4 interface spec. This routine
49198b37
JS
18103 * posts a SLI4_PAGE_SIZE memory region to the port to hold up to
18104 * SLI4_PAGE_SIZE modulo 64 rpi context headers.
6fb120a7
JS
18105 *
18106 * Returns
af901ca1 18107 * A nonzero rpi defined as rpi_base <= rpi < max_rpi if successful
6fb120a7
JS
18108 * LPFC_RPI_ALLOC_ERROR if no rpis are available.
18109 **/
18110int
18111lpfc_sli4_alloc_rpi(struct lpfc_hba *phba)
18112{
6d368e53
JS
18113 unsigned long rpi;
18114 uint16_t max_rpi, rpi_limit;
18115 uint16_t rpi_remaining, lrpi = 0;
6fb120a7 18116 struct lpfc_rpi_hdr *rpi_hdr;
4902b381 18117 unsigned long iflag;
6fb120a7 18118
6fb120a7 18119 /*
6d368e53
JS
18120 * Fetch the next logical rpi. Because this index is logical,
18121 * the driver starts at 0 each time.
6fb120a7 18122 */
4902b381 18123 spin_lock_irqsave(&phba->hbalock, iflag);
be6bb941
JS
18124 max_rpi = phba->sli4_hba.max_cfg_param.max_rpi;
18125 rpi_limit = phba->sli4_hba.next_rpi;
18126
6d368e53
JS
18127 rpi = find_next_zero_bit(phba->sli4_hba.rpi_bmask, rpi_limit, 0);
18128 if (rpi >= rpi_limit)
6fb120a7
JS
18129 rpi = LPFC_RPI_ALLOC_ERROR;
18130 else {
18131 set_bit(rpi, phba->sli4_hba.rpi_bmask);
18132 phba->sli4_hba.max_cfg_param.rpi_used++;
18133 phba->sli4_hba.rpi_count++;
18134 }
be6bb941
JS
18135 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
18136 "0001 rpi:%x max:%x lim:%x\n",
18137 (int) rpi, max_rpi, rpi_limit);
6fb120a7
JS
18138
18139 /*
18140 * Don't try to allocate more rpi header regions if the device limit
6d368e53 18141 * has been exhausted.
6fb120a7
JS
18142 */
18143 if ((rpi == LPFC_RPI_ALLOC_ERROR) &&
18144 (phba->sli4_hba.rpi_count >= max_rpi)) {
4902b381 18145 spin_unlock_irqrestore(&phba->hbalock, iflag);
6fb120a7
JS
18146 return rpi;
18147 }
18148
6d368e53
JS
18149 /*
18150 * RPI header postings are not required for SLI4 ports capable of
18151 * extents.
18152 */
18153 if (!phba->sli4_hba.rpi_hdrs_in_use) {
4902b381 18154 spin_unlock_irqrestore(&phba->hbalock, iflag);
6d368e53
JS
18155 return rpi;
18156 }
18157
6fb120a7
JS
18158 /*
18159 * If the driver is running low on rpi resources, allocate another
18160 * page now. Note that the next_rpi value is used because
18161 * it represents how many are actually in use whereas max_rpi notes
18162 * how many are supported max by the device.
18163 */
6d368e53 18164 rpi_remaining = phba->sli4_hba.next_rpi - phba->sli4_hba.rpi_count;
4902b381 18165 spin_unlock_irqrestore(&phba->hbalock, iflag);
6fb120a7
JS
18166 if (rpi_remaining < LPFC_RPI_LOW_WATER_MARK) {
18167 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
18168 if (!rpi_hdr) {
18169 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18170 "2002 Error Could not grow rpi "
18171 "count\n");
18172 } else {
6d368e53
JS
18173 lrpi = rpi_hdr->start_rpi;
18174 rpi_hdr->start_rpi = phba->sli4_hba.rpi_ids[lrpi];
6fb120a7
JS
18175 lpfc_sli4_post_rpi_hdr(phba, rpi_hdr);
18176 }
18177 }
18178
18179 return rpi;
18180}
18181
d7c47992
JS
18182/**
18183 * lpfc_sli4_free_rpi - Release an rpi for reuse.
18184 * @phba: pointer to lpfc hba data structure.
18185 *
18186 * This routine is invoked to release an rpi to the pool of
18187 * available rpis maintained by the driver.
18188 **/
5d8b8167 18189static void
d7c47992
JS
18190__lpfc_sli4_free_rpi(struct lpfc_hba *phba, int rpi)
18191{
18192 if (test_and_clear_bit(rpi, phba->sli4_hba.rpi_bmask)) {
18193 phba->sli4_hba.rpi_count--;
18194 phba->sli4_hba.max_cfg_param.rpi_used--;
18195 }
18196}
18197
6fb120a7
JS
18198/**
18199 * lpfc_sli4_free_rpi - Release an rpi for reuse.
18200 * @phba: pointer to lpfc hba data structure.
18201 *
18202 * This routine is invoked to release an rpi to the pool of
18203 * available rpis maintained by the driver.
18204 **/
18205void
18206lpfc_sli4_free_rpi(struct lpfc_hba *phba, int rpi)
18207{
18208 spin_lock_irq(&phba->hbalock);
d7c47992 18209 __lpfc_sli4_free_rpi(phba, rpi);
6fb120a7
JS
18210 spin_unlock_irq(&phba->hbalock);
18211}
18212
18213/**
18214 * lpfc_sli4_remove_rpis - Remove the rpi bitmask region
18215 * @phba: pointer to lpfc hba data structure.
18216 *
18217 * This routine is invoked to remove the memory region that
18218 * provided rpi via a bitmask.
18219 **/
18220void
18221lpfc_sli4_remove_rpis(struct lpfc_hba *phba)
18222{
18223 kfree(phba->sli4_hba.rpi_bmask);
6d368e53
JS
18224 kfree(phba->sli4_hba.rpi_ids);
18225 bf_set(lpfc_rpi_rsrc_rdy, &phba->sli4_hba.sli4_flags, 0);
6fb120a7
JS
18226}
18227
18228/**
18229 * lpfc_sli4_resume_rpi - Remove the rpi bitmask region
18230 * @phba: pointer to lpfc hba data structure.
18231 *
18232 * This routine is invoked to remove the memory region that
18233 * provided rpi via a bitmask.
18234 **/
18235int
6b5151fd
JS
18236lpfc_sli4_resume_rpi(struct lpfc_nodelist *ndlp,
18237 void (*cmpl)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *arg)
6fb120a7
JS
18238{
18239 LPFC_MBOXQ_t *mboxq;
18240 struct lpfc_hba *phba = ndlp->phba;
18241 int rc;
18242
18243 /* The port is notified of the header region via a mailbox command. */
18244 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18245 if (!mboxq)
18246 return -ENOMEM;
18247
18248 /* Post all rpi memory regions to the port. */
18249 lpfc_resume_rpi(mboxq, ndlp);
6b5151fd
JS
18250 if (cmpl) {
18251 mboxq->mbox_cmpl = cmpl;
3e1f0718
JS
18252 mboxq->ctx_buf = arg;
18253 mboxq->ctx_ndlp = ndlp;
72859909
JS
18254 } else
18255 mboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
6b5151fd 18256 mboxq->vport = ndlp->vport;
6fb120a7
JS
18257 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18258 if (rc == MBX_NOT_FINISHED) {
18259 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18260 "2010 Resume RPI Mailbox failed "
18261 "status %d, mbxStatus x%x\n", rc,
18262 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
18263 mempool_free(mboxq, phba->mbox_mem_pool);
18264 return -EIO;
18265 }
18266 return 0;
18267}
18268
18269/**
18270 * lpfc_sli4_init_vpi - Initialize a vpi with the port
76a95d75 18271 * @vport: Pointer to the vport for which the vpi is being initialized
6fb120a7 18272 *
76a95d75 18273 * This routine is invoked to activate a vpi with the port.
6fb120a7
JS
18274 *
18275 * Returns:
18276 * 0 success
18277 * -Evalue otherwise
18278 **/
18279int
76a95d75 18280lpfc_sli4_init_vpi(struct lpfc_vport *vport)
6fb120a7
JS
18281{
18282 LPFC_MBOXQ_t *mboxq;
18283 int rc = 0;
6a9c52cf 18284 int retval = MBX_SUCCESS;
6fb120a7 18285 uint32_t mbox_tmo;
76a95d75 18286 struct lpfc_hba *phba = vport->phba;
6fb120a7
JS
18287 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18288 if (!mboxq)
18289 return -ENOMEM;
76a95d75 18290 lpfc_init_vpi(phba, mboxq, vport->vpi);
a183a15f 18291 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
6fb120a7 18292 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
6fb120a7 18293 if (rc != MBX_SUCCESS) {
76a95d75 18294 lpfc_printf_vlog(vport, KERN_ERR, LOG_SLI,
6fb120a7
JS
18295 "2022 INIT VPI Mailbox failed "
18296 "status %d, mbxStatus x%x\n", rc,
18297 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
6a9c52cf 18298 retval = -EIO;
6fb120a7 18299 }
6a9c52cf 18300 if (rc != MBX_TIMEOUT)
76a95d75 18301 mempool_free(mboxq, vport->phba->mbox_mem_pool);
6a9c52cf
JS
18302
18303 return retval;
6fb120a7
JS
18304}
18305
18306/**
18307 * lpfc_mbx_cmpl_add_fcf_record - add fcf mbox completion handler.
18308 * @phba: pointer to lpfc hba data structure.
18309 * @mboxq: Pointer to mailbox object.
18310 *
18311 * This routine is invoked to manually add a single FCF record. The caller
18312 * must pass a completely initialized FCF_Record. This routine takes
18313 * care of the nonembedded mailbox operations.
18314 **/
18315static void
18316lpfc_mbx_cmpl_add_fcf_record(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
18317{
18318 void *virt_addr;
18319 union lpfc_sli4_cfg_shdr *shdr;
18320 uint32_t shdr_status, shdr_add_status;
18321
18322 virt_addr = mboxq->sge_array->addr[0];
18323 /* The IOCTL status is embedded in the mailbox subheader. */
18324 shdr = (union lpfc_sli4_cfg_shdr *) virt_addr;
18325 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
18326 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
18327
18328 if ((shdr_status || shdr_add_status) &&
18329 (shdr_status != STATUS_FCF_IN_USE))
18330 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18331 "2558 ADD_FCF_RECORD mailbox failed with "
18332 "status x%x add_status x%x\n",
18333 shdr_status, shdr_add_status);
18334
18335 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18336}
18337
18338/**
18339 * lpfc_sli4_add_fcf_record - Manually add an FCF Record.
18340 * @phba: pointer to lpfc hba data structure.
18341 * @fcf_record: pointer to the initialized fcf record to add.
18342 *
18343 * This routine is invoked to manually add a single FCF record. The caller
18344 * must pass a completely initialized FCF_Record. This routine takes
18345 * care of the nonembedded mailbox operations.
18346 **/
18347int
18348lpfc_sli4_add_fcf_record(struct lpfc_hba *phba, struct fcf_record *fcf_record)
18349{
18350 int rc = 0;
18351 LPFC_MBOXQ_t *mboxq;
18352 uint8_t *bytep;
18353 void *virt_addr;
6fb120a7
JS
18354 struct lpfc_mbx_sge sge;
18355 uint32_t alloc_len, req_len;
18356 uint32_t fcfindex;
18357
18358 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18359 if (!mboxq) {
18360 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18361 "2009 Failed to allocate mbox for ADD_FCF cmd\n");
18362 return -ENOMEM;
18363 }
18364
18365 req_len = sizeof(struct fcf_record) + sizeof(union lpfc_sli4_cfg_shdr) +
18366 sizeof(uint32_t);
18367
18368 /* Allocate DMA memory and set up the non-embedded mailbox command */
18369 alloc_len = lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_FCOE,
18370 LPFC_MBOX_OPCODE_FCOE_ADD_FCF,
18371 req_len, LPFC_SLI4_MBX_NEMBED);
18372 if (alloc_len < req_len) {
18373 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18374 "2523 Allocated DMA memory size (x%x) is "
18375 "less than the requested DMA memory "
18376 "size (x%x)\n", alloc_len, req_len);
18377 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18378 return -ENOMEM;
18379 }
18380
18381 /*
18382 * Get the first SGE entry from the non-embedded DMA memory. This
18383 * routine only uses a single SGE.
18384 */
18385 lpfc_sli4_mbx_sge_get(mboxq, 0, &sge);
6fb120a7
JS
18386 virt_addr = mboxq->sge_array->addr[0];
18387 /*
18388 * Configure the FCF record for FCFI 0. This is the driver's
18389 * hardcoded default and gets used in nonFIP mode.
18390 */
18391 fcfindex = bf_get(lpfc_fcf_record_fcf_index, fcf_record);
18392 bytep = virt_addr + sizeof(union lpfc_sli4_cfg_shdr);
18393 lpfc_sli_pcimem_bcopy(&fcfindex, bytep, sizeof(uint32_t));
18394
18395 /*
18396 * Copy the fcf_index and the FCF Record Data. The data starts after
18397 * the FCoE header plus word10. The data copy needs to be endian
18398 * correct.
18399 */
18400 bytep += sizeof(uint32_t);
18401 lpfc_sli_pcimem_bcopy(fcf_record, bytep, sizeof(struct fcf_record));
18402 mboxq->vport = phba->pport;
18403 mboxq->mbox_cmpl = lpfc_mbx_cmpl_add_fcf_record;
18404 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18405 if (rc == MBX_NOT_FINISHED) {
18406 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18407 "2515 ADD_FCF_RECORD mailbox failed with "
18408 "status 0x%x\n", rc);
18409 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18410 rc = -EIO;
18411 } else
18412 rc = 0;
18413
18414 return rc;
18415}
18416
18417/**
18418 * lpfc_sli4_build_dflt_fcf_record - Build the driver's default FCF Record.
18419 * @phba: pointer to lpfc hba data structure.
18420 * @fcf_record: pointer to the fcf record to write the default data.
18421 * @fcf_index: FCF table entry index.
18422 *
18423 * This routine is invoked to build the driver's default FCF record. The
18424 * values used are hardcoded. This routine handles memory initialization.
18425 *
18426 **/
18427void
18428lpfc_sli4_build_dflt_fcf_record(struct lpfc_hba *phba,
18429 struct fcf_record *fcf_record,
18430 uint16_t fcf_index)
18431{
18432 memset(fcf_record, 0, sizeof(struct fcf_record));
18433 fcf_record->max_rcv_size = LPFC_FCOE_MAX_RCV_SIZE;
18434 fcf_record->fka_adv_period = LPFC_FCOE_FKA_ADV_PER;
18435 fcf_record->fip_priority = LPFC_FCOE_FIP_PRIORITY;
18436 bf_set(lpfc_fcf_record_mac_0, fcf_record, phba->fc_map[0]);
18437 bf_set(lpfc_fcf_record_mac_1, fcf_record, phba->fc_map[1]);
18438 bf_set(lpfc_fcf_record_mac_2, fcf_record, phba->fc_map[2]);
18439 bf_set(lpfc_fcf_record_mac_3, fcf_record, LPFC_FCOE_FCF_MAC3);
18440 bf_set(lpfc_fcf_record_mac_4, fcf_record, LPFC_FCOE_FCF_MAC4);
18441 bf_set(lpfc_fcf_record_mac_5, fcf_record, LPFC_FCOE_FCF_MAC5);
18442 bf_set(lpfc_fcf_record_fc_map_0, fcf_record, phba->fc_map[0]);
18443 bf_set(lpfc_fcf_record_fc_map_1, fcf_record, phba->fc_map[1]);
18444 bf_set(lpfc_fcf_record_fc_map_2, fcf_record, phba->fc_map[2]);
18445 bf_set(lpfc_fcf_record_fcf_valid, fcf_record, 1);
0c287589 18446 bf_set(lpfc_fcf_record_fcf_avail, fcf_record, 1);
6fb120a7
JS
18447 bf_set(lpfc_fcf_record_fcf_index, fcf_record, fcf_index);
18448 bf_set(lpfc_fcf_record_mac_addr_prov, fcf_record,
18449 LPFC_FCF_FPMA | LPFC_FCF_SPMA);
18450 /* Set the VLAN bit map */
18451 if (phba->valid_vlan) {
18452 fcf_record->vlan_bitmap[phba->vlan_id / 8]
18453 = 1 << (phba->vlan_id % 8);
18454 }
18455}
18456
18457/**
0c9ab6f5 18458 * lpfc_sli4_fcf_scan_read_fcf_rec - Read hba fcf record for fcf scan.
6fb120a7
JS
18459 * @phba: pointer to lpfc hba data structure.
18460 * @fcf_index: FCF table entry offset.
18461 *
0c9ab6f5
JS
18462 * This routine is invoked to scan the entire FCF table by reading FCF
18463 * record and processing it one at a time starting from the @fcf_index
18464 * for initial FCF discovery or fast FCF failover rediscovery.
18465 *
25985edc 18466 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5 18467 * otherwise.
6fb120a7
JS
18468 **/
18469int
0c9ab6f5 18470lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
6fb120a7
JS
18471{
18472 int rc = 0, error;
18473 LPFC_MBOXQ_t *mboxq;
6fb120a7 18474
32b9793f 18475 phba->fcoe_eventtag_at_fcf_scan = phba->fcoe_eventtag;
80c17849 18476 phba->fcoe_cvl_eventtag_attn = phba->fcoe_cvl_eventtag;
6fb120a7
JS
18477 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18478 if (!mboxq) {
18479 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
18480 "2000 Failed to allocate mbox for "
18481 "READ_FCF cmd\n");
4d9ab994 18482 error = -ENOMEM;
0c9ab6f5 18483 goto fail_fcf_scan;
6fb120a7 18484 }
ecfd03c6 18485 /* Construct the read FCF record mailbox command */
0c9ab6f5 18486 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
ecfd03c6
JS
18487 if (rc) {
18488 error = -EINVAL;
0c9ab6f5 18489 goto fail_fcf_scan;
6fb120a7 18490 }
ecfd03c6 18491 /* Issue the mailbox command asynchronously */
6fb120a7 18492 mboxq->vport = phba->pport;
0c9ab6f5 18493 mboxq->mbox_cmpl = lpfc_mbx_cmpl_fcf_scan_read_fcf_rec;
a93ff37a
JS
18494
18495 spin_lock_irq(&phba->hbalock);
18496 phba->hba_flag |= FCF_TS_INPROG;
18497 spin_unlock_irq(&phba->hbalock);
18498
6fb120a7 18499 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
ecfd03c6 18500 if (rc == MBX_NOT_FINISHED)
6fb120a7 18501 error = -EIO;
ecfd03c6 18502 else {
38b92ef8
JS
18503 /* Reset eligible FCF count for new scan */
18504 if (fcf_index == LPFC_FCOE_FCF_GET_FIRST)
999d813f 18505 phba->fcf.eligible_fcf_cnt = 0;
6fb120a7 18506 error = 0;
32b9793f 18507 }
0c9ab6f5 18508fail_fcf_scan:
4d9ab994
JS
18509 if (error) {
18510 if (mboxq)
18511 lpfc_sli4_mbox_cmd_free(phba, mboxq);
a93ff37a 18512 /* FCF scan failed, clear FCF_TS_INPROG flag */
4d9ab994 18513 spin_lock_irq(&phba->hbalock);
a93ff37a 18514 phba->hba_flag &= ~FCF_TS_INPROG;
4d9ab994
JS
18515 spin_unlock_irq(&phba->hbalock);
18516 }
6fb120a7
JS
18517 return error;
18518}
a0c87cbd 18519
0c9ab6f5 18520/**
a93ff37a 18521 * lpfc_sli4_fcf_rr_read_fcf_rec - Read hba fcf record for roundrobin fcf.
0c9ab6f5
JS
18522 * @phba: pointer to lpfc hba data structure.
18523 * @fcf_index: FCF table entry offset.
18524 *
18525 * This routine is invoked to read an FCF record indicated by @fcf_index
a93ff37a 18526 * and to use it for FLOGI roundrobin FCF failover.
0c9ab6f5 18527 *
25985edc 18528 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5
JS
18529 * otherwise.
18530 **/
18531int
18532lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
18533{
18534 int rc = 0, error;
18535 LPFC_MBOXQ_t *mboxq;
18536
18537 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18538 if (!mboxq) {
18539 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_INIT,
18540 "2763 Failed to allocate mbox for "
18541 "READ_FCF cmd\n");
18542 error = -ENOMEM;
18543 goto fail_fcf_read;
18544 }
18545 /* Construct the read FCF record mailbox command */
18546 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
18547 if (rc) {
18548 error = -EINVAL;
18549 goto fail_fcf_read;
18550 }
18551 /* Issue the mailbox command asynchronously */
18552 mboxq->vport = phba->pport;
18553 mboxq->mbox_cmpl = lpfc_mbx_cmpl_fcf_rr_read_fcf_rec;
18554 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18555 if (rc == MBX_NOT_FINISHED)
18556 error = -EIO;
18557 else
18558 error = 0;
18559
18560fail_fcf_read:
18561 if (error && mboxq)
18562 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18563 return error;
18564}
18565
18566/**
18567 * lpfc_sli4_read_fcf_rec - Read hba fcf record for update eligible fcf bmask.
18568 * @phba: pointer to lpfc hba data structure.
18569 * @fcf_index: FCF table entry offset.
18570 *
18571 * This routine is invoked to read an FCF record indicated by @fcf_index to
a93ff37a 18572 * determine whether it's eligible for FLOGI roundrobin failover list.
0c9ab6f5 18573 *
25985edc 18574 * Return 0 if the mailbox command is submitted successfully, none 0
0c9ab6f5
JS
18575 * otherwise.
18576 **/
18577int
18578lpfc_sli4_read_fcf_rec(struct lpfc_hba *phba, uint16_t fcf_index)
18579{
18580 int rc = 0, error;
18581 LPFC_MBOXQ_t *mboxq;
18582
18583 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18584 if (!mboxq) {
18585 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_INIT,
18586 "2758 Failed to allocate mbox for "
18587 "READ_FCF cmd\n");
18588 error = -ENOMEM;
18589 goto fail_fcf_read;
18590 }
18591 /* Construct the read FCF record mailbox command */
18592 rc = lpfc_sli4_mbx_read_fcf_rec(phba, mboxq, fcf_index);
18593 if (rc) {
18594 error = -EINVAL;
18595 goto fail_fcf_read;
18596 }
18597 /* Issue the mailbox command asynchronously */
18598 mboxq->vport = phba->pport;
18599 mboxq->mbox_cmpl = lpfc_mbx_cmpl_read_fcf_rec;
18600 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_NOWAIT);
18601 if (rc == MBX_NOT_FINISHED)
18602 error = -EIO;
18603 else
18604 error = 0;
18605
18606fail_fcf_read:
18607 if (error && mboxq)
18608 lpfc_sli4_mbox_cmd_free(phba, mboxq);
18609 return error;
18610}
18611
7d791df7 18612/**
f5cb5304 18613 * lpfc_check_next_fcf_pri_level
7d791df7
JS
18614 * phba pointer to the lpfc_hba struct for this port.
18615 * This routine is called from the lpfc_sli4_fcf_rr_next_index_get
18616 * routine when the rr_bmask is empty. The FCF indecies are put into the
18617 * rr_bmask based on their priority level. Starting from the highest priority
18618 * to the lowest. The most likely FCF candidate will be in the highest
18619 * priority group. When this routine is called it searches the fcf_pri list for
18620 * next lowest priority group and repopulates the rr_bmask with only those
18621 * fcf_indexes.
18622 * returns:
18623 * 1=success 0=failure
18624 **/
5d8b8167 18625static int
7d791df7
JS
18626lpfc_check_next_fcf_pri_level(struct lpfc_hba *phba)
18627{
18628 uint16_t next_fcf_pri;
18629 uint16_t last_index;
18630 struct lpfc_fcf_pri *fcf_pri;
18631 int rc;
18632 int ret = 0;
18633
18634 last_index = find_first_bit(phba->fcf.fcf_rr_bmask,
18635 LPFC_SLI4_FCF_TBL_INDX_MAX);
18636 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
18637 "3060 Last IDX %d\n", last_index);
2562669c
JS
18638
18639 /* Verify the priority list has 2 or more entries */
18640 spin_lock_irq(&phba->hbalock);
18641 if (list_empty(&phba->fcf.fcf_pri_list) ||
18642 list_is_singular(&phba->fcf.fcf_pri_list)) {
18643 spin_unlock_irq(&phba->hbalock);
7d791df7
JS
18644 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
18645 "3061 Last IDX %d\n", last_index);
18646 return 0; /* Empty rr list */
18647 }
2562669c
JS
18648 spin_unlock_irq(&phba->hbalock);
18649
7d791df7
JS
18650 next_fcf_pri = 0;
18651 /*
18652 * Clear the rr_bmask and set all of the bits that are at this
18653 * priority.
18654 */
18655 memset(phba->fcf.fcf_rr_bmask, 0,
18656 sizeof(*phba->fcf.fcf_rr_bmask));
18657 spin_lock_irq(&phba->hbalock);
18658 list_for_each_entry(fcf_pri, &phba->fcf.fcf_pri_list, list) {
18659 if (fcf_pri->fcf_rec.flag & LPFC_FCF_FLOGI_FAILED)
18660 continue;
18661 /*
18662 * the 1st priority that has not FLOGI failed
18663 * will be the highest.
18664 */
18665 if (!next_fcf_pri)
18666 next_fcf_pri = fcf_pri->fcf_rec.priority;
18667 spin_unlock_irq(&phba->hbalock);
18668 if (fcf_pri->fcf_rec.priority == next_fcf_pri) {
18669 rc = lpfc_sli4_fcf_rr_index_set(phba,
18670 fcf_pri->fcf_rec.fcf_index);
18671 if (rc)
18672 return 0;
18673 }
18674 spin_lock_irq(&phba->hbalock);
18675 }
18676 /*
18677 * if next_fcf_pri was not set above and the list is not empty then
18678 * we have failed flogis on all of them. So reset flogi failed
4907cb7b 18679 * and start at the beginning.
7d791df7
JS
18680 */
18681 if (!next_fcf_pri && !list_empty(&phba->fcf.fcf_pri_list)) {
18682 list_for_each_entry(fcf_pri, &phba->fcf.fcf_pri_list, list) {
18683 fcf_pri->fcf_rec.flag &= ~LPFC_FCF_FLOGI_FAILED;
18684 /*
18685 * the 1st priority that has not FLOGI failed
18686 * will be the highest.
18687 */
18688 if (!next_fcf_pri)
18689 next_fcf_pri = fcf_pri->fcf_rec.priority;
18690 spin_unlock_irq(&phba->hbalock);
18691 if (fcf_pri->fcf_rec.priority == next_fcf_pri) {
18692 rc = lpfc_sli4_fcf_rr_index_set(phba,
18693 fcf_pri->fcf_rec.fcf_index);
18694 if (rc)
18695 return 0;
18696 }
18697 spin_lock_irq(&phba->hbalock);
18698 }
18699 } else
18700 ret = 1;
18701 spin_unlock_irq(&phba->hbalock);
18702
18703 return ret;
18704}
0c9ab6f5
JS
18705/**
18706 * lpfc_sli4_fcf_rr_next_index_get - Get next eligible fcf record index
18707 * @phba: pointer to lpfc hba data structure.
18708 *
18709 * This routine is to get the next eligible FCF record index in a round
18710 * robin fashion. If the next eligible FCF record index equals to the
a93ff37a 18711 * initial roundrobin FCF record index, LPFC_FCOE_FCF_NEXT_NONE (0xFFFF)
0c9ab6f5
JS
18712 * shall be returned, otherwise, the next eligible FCF record's index
18713 * shall be returned.
18714 **/
18715uint16_t
18716lpfc_sli4_fcf_rr_next_index_get(struct lpfc_hba *phba)
18717{
18718 uint16_t next_fcf_index;
18719
421c6622 18720initial_priority:
3804dc84 18721 /* Search start from next bit of currently registered FCF index */
421c6622
JS
18722 next_fcf_index = phba->fcf.current_rec.fcf_indx;
18723
7d791df7 18724next_priority:
421c6622
JS
18725 /* Determine the next fcf index to check */
18726 next_fcf_index = (next_fcf_index + 1) % LPFC_SLI4_FCF_TBL_INDX_MAX;
0c9ab6f5
JS
18727 next_fcf_index = find_next_bit(phba->fcf.fcf_rr_bmask,
18728 LPFC_SLI4_FCF_TBL_INDX_MAX,
3804dc84
JS
18729 next_fcf_index);
18730
0c9ab6f5 18731 /* Wrap around condition on phba->fcf.fcf_rr_bmask */
7d791df7
JS
18732 if (next_fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
18733 /*
18734 * If we have wrapped then we need to clear the bits that
18735 * have been tested so that we can detect when we should
18736 * change the priority level.
18737 */
0c9ab6f5
JS
18738 next_fcf_index = find_next_bit(phba->fcf.fcf_rr_bmask,
18739 LPFC_SLI4_FCF_TBL_INDX_MAX, 0);
7d791df7
JS
18740 }
18741
3804dc84
JS
18742
18743 /* Check roundrobin failover list empty condition */
7d791df7
JS
18744 if (next_fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX ||
18745 next_fcf_index == phba->fcf.current_rec.fcf_indx) {
18746 /*
18747 * If next fcf index is not found check if there are lower
18748 * Priority level fcf's in the fcf_priority list.
18749 * Set up the rr_bmask with all of the avaiable fcf bits
18750 * at that level and continue the selection process.
18751 */
18752 if (lpfc_check_next_fcf_pri_level(phba))
421c6622 18753 goto initial_priority;
3804dc84
JS
18754 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP,
18755 "2844 No roundrobin failover FCF available\n");
036cad1f
JS
18756
18757 return LPFC_FCOE_FCF_NEXT_NONE;
3804dc84
JS
18758 }
18759
7d791df7
JS
18760 if (next_fcf_index < LPFC_SLI4_FCF_TBL_INDX_MAX &&
18761 phba->fcf.fcf_pri[next_fcf_index].fcf_rec.flag &
f5cb5304
JS
18762 LPFC_FCF_FLOGI_FAILED) {
18763 if (list_is_singular(&phba->fcf.fcf_pri_list))
18764 return LPFC_FCOE_FCF_NEXT_NONE;
18765
7d791df7 18766 goto next_priority;
f5cb5304 18767 }
7d791df7 18768
3804dc84 18769 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a
JS
18770 "2845 Get next roundrobin failover FCF (x%x)\n",
18771 next_fcf_index);
18772
0c9ab6f5
JS
18773 return next_fcf_index;
18774}
18775
18776/**
18777 * lpfc_sli4_fcf_rr_index_set - Set bmask with eligible fcf record index
18778 * @phba: pointer to lpfc hba data structure.
18779 *
18780 * This routine sets the FCF record index in to the eligible bmask for
a93ff37a 18781 * roundrobin failover search. It checks to make sure that the index
0c9ab6f5
JS
18782 * does not go beyond the range of the driver allocated bmask dimension
18783 * before setting the bit.
18784 *
18785 * Returns 0 if the index bit successfully set, otherwise, it returns
18786 * -EINVAL.
18787 **/
18788int
18789lpfc_sli4_fcf_rr_index_set(struct lpfc_hba *phba, uint16_t fcf_index)
18790{
18791 if (fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
18792 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
a93ff37a
JS
18793 "2610 FCF (x%x) reached driver's book "
18794 "keeping dimension:x%x\n",
0c9ab6f5
JS
18795 fcf_index, LPFC_SLI4_FCF_TBL_INDX_MAX);
18796 return -EINVAL;
18797 }
18798 /* Set the eligible FCF record index bmask */
18799 set_bit(fcf_index, phba->fcf.fcf_rr_bmask);
18800
3804dc84 18801 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 18802 "2790 Set FCF (x%x) to roundrobin FCF failover "
3804dc84
JS
18803 "bmask\n", fcf_index);
18804
0c9ab6f5
JS
18805 return 0;
18806}
18807
18808/**
3804dc84 18809 * lpfc_sli4_fcf_rr_index_clear - Clear bmask from eligible fcf record index
0c9ab6f5
JS
18810 * @phba: pointer to lpfc hba data structure.
18811 *
18812 * This routine clears the FCF record index from the eligible bmask for
a93ff37a 18813 * roundrobin failover search. It checks to make sure that the index
0c9ab6f5
JS
18814 * does not go beyond the range of the driver allocated bmask dimension
18815 * before clearing the bit.
18816 **/
18817void
18818lpfc_sli4_fcf_rr_index_clear(struct lpfc_hba *phba, uint16_t fcf_index)
18819{
9a803a74 18820 struct lpfc_fcf_pri *fcf_pri, *fcf_pri_next;
0c9ab6f5
JS
18821 if (fcf_index >= LPFC_SLI4_FCF_TBL_INDX_MAX) {
18822 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
a93ff37a
JS
18823 "2762 FCF (x%x) reached driver's book "
18824 "keeping dimension:x%x\n",
0c9ab6f5
JS
18825 fcf_index, LPFC_SLI4_FCF_TBL_INDX_MAX);
18826 return;
18827 }
18828 /* Clear the eligible FCF record index bmask */
7d791df7 18829 spin_lock_irq(&phba->hbalock);
9a803a74
JS
18830 list_for_each_entry_safe(fcf_pri, fcf_pri_next, &phba->fcf.fcf_pri_list,
18831 list) {
7d791df7
JS
18832 if (fcf_pri->fcf_rec.fcf_index == fcf_index) {
18833 list_del_init(&fcf_pri->list);
18834 break;
18835 }
18836 }
18837 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 18838 clear_bit(fcf_index, phba->fcf.fcf_rr_bmask);
3804dc84
JS
18839
18840 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 18841 "2791 Clear FCF (x%x) from roundrobin failover "
3804dc84 18842 "bmask\n", fcf_index);
0c9ab6f5
JS
18843}
18844
ecfd03c6
JS
18845/**
18846 * lpfc_mbx_cmpl_redisc_fcf_table - completion routine for rediscover FCF table
18847 * @phba: pointer to lpfc hba data structure.
18848 *
18849 * This routine is the completion routine for the rediscover FCF table mailbox
18850 * command. If the mailbox command returned failure, it will try to stop the
18851 * FCF rediscover wait timer.
18852 **/
5d8b8167 18853static void
ecfd03c6
JS
18854lpfc_mbx_cmpl_redisc_fcf_table(struct lpfc_hba *phba, LPFC_MBOXQ_t *mbox)
18855{
18856 struct lpfc_mbx_redisc_fcf_tbl *redisc_fcf;
18857 uint32_t shdr_status, shdr_add_status;
18858
18859 redisc_fcf = &mbox->u.mqe.un.redisc_fcf_tbl;
18860
18861 shdr_status = bf_get(lpfc_mbox_hdr_status,
18862 &redisc_fcf->header.cfg_shdr.response);
18863 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
18864 &redisc_fcf->header.cfg_shdr.response);
18865 if (shdr_status || shdr_add_status) {
0c9ab6f5 18866 lpfc_printf_log(phba, KERN_ERR, LOG_FIP,
ecfd03c6
JS
18867 "2746 Requesting for FCF rediscovery failed "
18868 "status x%x add_status x%x\n",
18869 shdr_status, shdr_add_status);
0c9ab6f5 18870 if (phba->fcf.fcf_flag & FCF_ACVL_DISC) {
fc2b989b 18871 spin_lock_irq(&phba->hbalock);
0c9ab6f5 18872 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
fc2b989b
JS
18873 spin_unlock_irq(&phba->hbalock);
18874 /*
18875 * CVL event triggered FCF rediscover request failed,
18876 * last resort to re-try current registered FCF entry.
18877 */
18878 lpfc_retry_pport_discovery(phba);
18879 } else {
18880 spin_lock_irq(&phba->hbalock);
0c9ab6f5 18881 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
fc2b989b
JS
18882 spin_unlock_irq(&phba->hbalock);
18883 /*
18884 * DEAD FCF event triggered FCF rediscover request
18885 * failed, last resort to fail over as a link down
18886 * to FCF registration.
18887 */
18888 lpfc_sli4_fcf_dead_failthrough(phba);
18889 }
0c9ab6f5
JS
18890 } else {
18891 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 18892 "2775 Start FCF rediscover quiescent timer\n");
ecfd03c6
JS
18893 /*
18894 * Start FCF rediscovery wait timer for pending FCF
18895 * before rescan FCF record table.
18896 */
18897 lpfc_fcf_redisc_wait_start_timer(phba);
0c9ab6f5 18898 }
ecfd03c6
JS
18899
18900 mempool_free(mbox, phba->mbox_mem_pool);
18901}
18902
18903/**
3804dc84 18904 * lpfc_sli4_redisc_fcf_table - Request to rediscover entire FCF table by port.
ecfd03c6
JS
18905 * @phba: pointer to lpfc hba data structure.
18906 *
18907 * This routine is invoked to request for rediscovery of the entire FCF table
18908 * by the port.
18909 **/
18910int
18911lpfc_sli4_redisc_fcf_table(struct lpfc_hba *phba)
18912{
18913 LPFC_MBOXQ_t *mbox;
18914 struct lpfc_mbx_redisc_fcf_tbl *redisc_fcf;
18915 int rc, length;
18916
0c9ab6f5
JS
18917 /* Cancel retry delay timers to all vports before FCF rediscover */
18918 lpfc_cancel_all_vport_retry_delay_timer(phba);
18919
ecfd03c6
JS
18920 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18921 if (!mbox) {
18922 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
18923 "2745 Failed to allocate mbox for "
18924 "requesting FCF rediscover.\n");
18925 return -ENOMEM;
18926 }
18927
18928 length = (sizeof(struct lpfc_mbx_redisc_fcf_tbl) -
18929 sizeof(struct lpfc_sli4_cfg_mhdr));
18930 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_FCOE,
18931 LPFC_MBOX_OPCODE_FCOE_REDISCOVER_FCF,
18932 length, LPFC_SLI4_MBX_EMBED);
18933
18934 redisc_fcf = &mbox->u.mqe.un.redisc_fcf_tbl;
18935 /* Set count to 0 for invalidating the entire FCF database */
18936 bf_set(lpfc_mbx_redisc_fcf_count, redisc_fcf, 0);
18937
18938 /* Issue the mailbox command asynchronously */
18939 mbox->vport = phba->pport;
18940 mbox->mbox_cmpl = lpfc_mbx_cmpl_redisc_fcf_table;
18941 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_NOWAIT);
18942
18943 if (rc == MBX_NOT_FINISHED) {
18944 mempool_free(mbox, phba->mbox_mem_pool);
18945 return -EIO;
18946 }
18947 return 0;
18948}
18949
fc2b989b
JS
18950/**
18951 * lpfc_sli4_fcf_dead_failthrough - Failthrough routine to fcf dead event
18952 * @phba: pointer to lpfc hba data structure.
18953 *
18954 * This function is the failover routine as a last resort to the FCF DEAD
18955 * event when driver failed to perform fast FCF failover.
18956 **/
18957void
18958lpfc_sli4_fcf_dead_failthrough(struct lpfc_hba *phba)
18959{
18960 uint32_t link_state;
18961
18962 /*
18963 * Last resort as FCF DEAD event failover will treat this as
18964 * a link down, but save the link state because we don't want
18965 * it to be changed to Link Down unless it is already down.
18966 */
18967 link_state = phba->link_state;
18968 lpfc_linkdown(phba);
18969 phba->link_state = link_state;
18970
18971 /* Unregister FCF if no devices connected to it */
18972 lpfc_unregister_unused_fcf(phba);
18973}
18974
a0c87cbd 18975/**
026abb87 18976 * lpfc_sli_get_config_region23 - Get sli3 port region 23 data.
a0c87cbd 18977 * @phba: pointer to lpfc hba data structure.
026abb87 18978 * @rgn23_data: pointer to configure region 23 data.
a0c87cbd 18979 *
026abb87
JS
18980 * This function gets SLI3 port configure region 23 data through memory dump
18981 * mailbox command. When it successfully retrieves data, the size of the data
18982 * will be returned, otherwise, 0 will be returned.
a0c87cbd 18983 **/
026abb87
JS
18984static uint32_t
18985lpfc_sli_get_config_region23(struct lpfc_hba *phba, char *rgn23_data)
a0c87cbd
JS
18986{
18987 LPFC_MBOXQ_t *pmb = NULL;
18988 MAILBOX_t *mb;
026abb87 18989 uint32_t offset = 0;
a0c87cbd
JS
18990 int rc;
18991
026abb87
JS
18992 if (!rgn23_data)
18993 return 0;
18994
a0c87cbd
JS
18995 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
18996 if (!pmb) {
18997 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
026abb87
JS
18998 "2600 failed to allocate mailbox memory\n");
18999 return 0;
a0c87cbd
JS
19000 }
19001 mb = &pmb->u.mb;
19002
a0c87cbd
JS
19003 do {
19004 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_23);
19005 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
19006
19007 if (rc != MBX_SUCCESS) {
19008 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
026abb87
JS
19009 "2601 failed to read config "
19010 "region 23, rc 0x%x Status 0x%x\n",
19011 rc, mb->mbxStatus);
a0c87cbd
JS
19012 mb->un.varDmp.word_cnt = 0;
19013 }
19014 /*
19015 * dump mem may return a zero when finished or we got a
19016 * mailbox error, either way we are done.
19017 */
19018 if (mb->un.varDmp.word_cnt == 0)
19019 break;
19020 if (mb->un.varDmp.word_cnt > DMP_RGN23_SIZE - offset)
19021 mb->un.varDmp.word_cnt = DMP_RGN23_SIZE - offset;
19022
19023 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
026abb87
JS
19024 rgn23_data + offset,
19025 mb->un.varDmp.word_cnt);
a0c87cbd
JS
19026 offset += mb->un.varDmp.word_cnt;
19027 } while (mb->un.varDmp.word_cnt && offset < DMP_RGN23_SIZE);
19028
026abb87
JS
19029 mempool_free(pmb, phba->mbox_mem_pool);
19030 return offset;
19031}
19032
19033/**
19034 * lpfc_sli4_get_config_region23 - Get sli4 port region 23 data.
19035 * @phba: pointer to lpfc hba data structure.
19036 * @rgn23_data: pointer to configure region 23 data.
19037 *
19038 * This function gets SLI4 port configure region 23 data through memory dump
19039 * mailbox command. When it successfully retrieves data, the size of the data
19040 * will be returned, otherwise, 0 will be returned.
19041 **/
19042static uint32_t
19043lpfc_sli4_get_config_region23(struct lpfc_hba *phba, char *rgn23_data)
19044{
19045 LPFC_MBOXQ_t *mboxq = NULL;
19046 struct lpfc_dmabuf *mp = NULL;
19047 struct lpfc_mqe *mqe;
19048 uint32_t data_length = 0;
19049 int rc;
19050
19051 if (!rgn23_data)
19052 return 0;
19053
19054 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19055 if (!mboxq) {
19056 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19057 "3105 failed to allocate mailbox memory\n");
19058 return 0;
19059 }
19060
19061 if (lpfc_sli4_dump_cfg_rg23(phba, mboxq))
19062 goto out;
19063 mqe = &mboxq->u.mqe;
3e1f0718 19064 mp = (struct lpfc_dmabuf *)mboxq->ctx_buf;
026abb87
JS
19065 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
19066 if (rc)
19067 goto out;
19068 data_length = mqe->un.mb_words[5];
19069 if (data_length == 0)
19070 goto out;
19071 if (data_length > DMP_RGN23_SIZE) {
19072 data_length = 0;
19073 goto out;
19074 }
19075 lpfc_sli_pcimem_bcopy((char *)mp->virt, rgn23_data, data_length);
19076out:
19077 mempool_free(mboxq, phba->mbox_mem_pool);
19078 if (mp) {
19079 lpfc_mbuf_free(phba, mp->virt, mp->phys);
19080 kfree(mp);
19081 }
19082 return data_length;
19083}
19084
19085/**
19086 * lpfc_sli_read_link_ste - Read region 23 to decide if link is disabled.
19087 * @phba: pointer to lpfc hba data structure.
19088 *
19089 * This function read region 23 and parse TLV for port status to
19090 * decide if the user disaled the port. If the TLV indicates the
19091 * port is disabled, the hba_flag is set accordingly.
19092 **/
19093void
19094lpfc_sli_read_link_ste(struct lpfc_hba *phba)
19095{
19096 uint8_t *rgn23_data = NULL;
19097 uint32_t if_type, data_size, sub_tlv_len, tlv_offset;
19098 uint32_t offset = 0;
19099
19100 /* Get adapter Region 23 data */
19101 rgn23_data = kzalloc(DMP_RGN23_SIZE, GFP_KERNEL);
19102 if (!rgn23_data)
19103 goto out;
19104
19105 if (phba->sli_rev < LPFC_SLI_REV4)
19106 data_size = lpfc_sli_get_config_region23(phba, rgn23_data);
19107 else {
19108 if_type = bf_get(lpfc_sli_intf_if_type,
19109 &phba->sli4_hba.sli_intf);
19110 if (if_type == LPFC_SLI_INTF_IF_TYPE_0)
19111 goto out;
19112 data_size = lpfc_sli4_get_config_region23(phba, rgn23_data);
19113 }
a0c87cbd
JS
19114
19115 if (!data_size)
19116 goto out;
19117
19118 /* Check the region signature first */
19119 if (memcmp(&rgn23_data[offset], LPFC_REGION23_SIGNATURE, 4)) {
19120 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19121 "2619 Config region 23 has bad signature\n");
19122 goto out;
19123 }
19124 offset += 4;
19125
19126 /* Check the data structure version */
19127 if (rgn23_data[offset] != LPFC_REGION23_VERSION) {
19128 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19129 "2620 Config region 23 has bad version\n");
19130 goto out;
19131 }
19132 offset += 4;
19133
19134 /* Parse TLV entries in the region */
19135 while (offset < data_size) {
19136 if (rgn23_data[offset] == LPFC_REGION23_LAST_REC)
19137 break;
19138 /*
19139 * If the TLV is not driver specific TLV or driver id is
19140 * not linux driver id, skip the record.
19141 */
19142 if ((rgn23_data[offset] != DRIVER_SPECIFIC_TYPE) ||
19143 (rgn23_data[offset + 2] != LINUX_DRIVER_ID) ||
19144 (rgn23_data[offset + 3] != 0)) {
19145 offset += rgn23_data[offset + 1] * 4 + 4;
19146 continue;
19147 }
19148
19149 /* Driver found a driver specific TLV in the config region */
19150 sub_tlv_len = rgn23_data[offset + 1] * 4;
19151 offset += 4;
19152 tlv_offset = 0;
19153
19154 /*
19155 * Search for configured port state sub-TLV.
19156 */
19157 while ((offset < data_size) &&
19158 (tlv_offset < sub_tlv_len)) {
19159 if (rgn23_data[offset] == LPFC_REGION23_LAST_REC) {
19160 offset += 4;
19161 tlv_offset += 4;
19162 break;
19163 }
19164 if (rgn23_data[offset] != PORT_STE_TYPE) {
19165 offset += rgn23_data[offset + 1] * 4 + 4;
19166 tlv_offset += rgn23_data[offset + 1] * 4 + 4;
19167 continue;
19168 }
19169
19170 /* This HBA contains PORT_STE configured */
19171 if (!rgn23_data[offset + 2])
19172 phba->hba_flag |= LINK_DISABLED;
19173
19174 goto out;
19175 }
19176 }
026abb87 19177
a0c87cbd 19178out:
a0c87cbd
JS
19179 kfree(rgn23_data);
19180 return;
19181}
695a814e 19182
52d52440
JS
19183/**
19184 * lpfc_wr_object - write an object to the firmware
19185 * @phba: HBA structure that indicates port to create a queue on.
19186 * @dmabuf_list: list of dmabufs to write to the port.
19187 * @size: the total byte value of the objects to write to the port.
19188 * @offset: the current offset to be used to start the transfer.
19189 *
19190 * This routine will create a wr_object mailbox command to send to the port.
19191 * the mailbox command will be constructed using the dma buffers described in
19192 * @dmabuf_list to create a list of BDEs. This routine will fill in as many
19193 * BDEs that the imbedded mailbox can support. The @offset variable will be
19194 * used to indicate the starting offset of the transfer and will also return
19195 * the offset after the write object mailbox has completed. @size is used to
19196 * determine the end of the object and whether the eof bit should be set.
19197 *
19198 * Return 0 is successful and offset will contain the the new offset to use
19199 * for the next write.
19200 * Return negative value for error cases.
19201 **/
19202int
19203lpfc_wr_object(struct lpfc_hba *phba, struct list_head *dmabuf_list,
19204 uint32_t size, uint32_t *offset)
19205{
19206 struct lpfc_mbx_wr_object *wr_object;
19207 LPFC_MBOXQ_t *mbox;
19208 int rc = 0, i = 0;
5021267a 19209 uint32_t shdr_status, shdr_add_status, shdr_change_status;
52d52440 19210 uint32_t mbox_tmo;
52d52440
JS
19211 struct lpfc_dmabuf *dmabuf;
19212 uint32_t written = 0;
5021267a 19213 bool check_change_status = false;
52d52440
JS
19214
19215 mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
19216 if (!mbox)
19217 return -ENOMEM;
19218
19219 lpfc_sli4_config(phba, mbox, LPFC_MBOX_SUBSYSTEM_COMMON,
19220 LPFC_MBOX_OPCODE_WRITE_OBJECT,
19221 sizeof(struct lpfc_mbx_wr_object) -
19222 sizeof(struct lpfc_sli4_cfg_mhdr), LPFC_SLI4_MBX_EMBED);
19223
19224 wr_object = (struct lpfc_mbx_wr_object *)&mbox->u.mqe.un.wr_object;
19225 wr_object->u.request.write_offset = *offset;
19226 sprintf((uint8_t *)wr_object->u.request.object_name, "/");
19227 wr_object->u.request.object_name[0] =
19228 cpu_to_le32(wr_object->u.request.object_name[0]);
19229 bf_set(lpfc_wr_object_eof, &wr_object->u.request, 0);
19230 list_for_each_entry(dmabuf, dmabuf_list, list) {
19231 if (i >= LPFC_MBX_WR_CONFIG_MAX_BDE || written >= size)
19232 break;
19233 wr_object->u.request.bde[i].addrLow = putPaddrLow(dmabuf->phys);
19234 wr_object->u.request.bde[i].addrHigh =
19235 putPaddrHigh(dmabuf->phys);
19236 if (written + SLI4_PAGE_SIZE >= size) {
19237 wr_object->u.request.bde[i].tus.f.bdeSize =
19238 (size - written);
19239 written += (size - written);
19240 bf_set(lpfc_wr_object_eof, &wr_object->u.request, 1);
5021267a
JS
19241 bf_set(lpfc_wr_object_eas, &wr_object->u.request, 1);
19242 check_change_status = true;
52d52440
JS
19243 } else {
19244 wr_object->u.request.bde[i].tus.f.bdeSize =
19245 SLI4_PAGE_SIZE;
19246 written += SLI4_PAGE_SIZE;
19247 }
19248 i++;
19249 }
19250 wr_object->u.request.bde_count = i;
19251 bf_set(lpfc_wr_object_write_length, &wr_object->u.request, written);
19252 if (!phba->sli4_hba.intr_enable)
19253 rc = lpfc_sli_issue_mbox(phba, mbox, MBX_POLL);
19254 else {
a183a15f 19255 mbox_tmo = lpfc_mbox_tmo_val(phba, mbox);
52d52440
JS
19256 rc = lpfc_sli_issue_mbox_wait(phba, mbox, mbox_tmo);
19257 }
19258 /* The IOCTL status is embedded in the mailbox subheader. */
5021267a
JS
19259 shdr_status = bf_get(lpfc_mbox_hdr_status,
19260 &wr_object->header.cfg_shdr.response);
19261 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
19262 &wr_object->header.cfg_shdr.response);
19263 if (check_change_status) {
19264 shdr_change_status = bf_get(lpfc_wr_object_change_status,
19265 &wr_object->u.response);
19266 switch (shdr_change_status) {
19267 case (LPFC_CHANGE_STATUS_PHYS_DEV_RESET):
19268 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19269 "3198 Firmware write complete: System "
19270 "reboot required to instantiate\n");
19271 break;
19272 case (LPFC_CHANGE_STATUS_FW_RESET):
19273 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19274 "3199 Firmware write complete: Firmware"
19275 " reset required to instantiate\n");
19276 break;
19277 case (LPFC_CHANGE_STATUS_PORT_MIGRATION):
19278 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19279 "3200 Firmware write complete: Port "
19280 "Migration or PCI Reset required to "
19281 "instantiate\n");
19282 break;
19283 case (LPFC_CHANGE_STATUS_PCI_RESET):
19284 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
19285 "3201 Firmware write complete: PCI "
19286 "Reset required to instantiate\n");
19287 break;
19288 default:
19289 break;
19290 }
19291 }
52d52440
JS
19292 if (rc != MBX_TIMEOUT)
19293 mempool_free(mbox, phba->mbox_mem_pool);
19294 if (shdr_status || shdr_add_status || rc) {
19295 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
19296 "3025 Write Object mailbox failed with "
19297 "status x%x add_status x%x, mbx status x%x\n",
19298 shdr_status, shdr_add_status, rc);
19299 rc = -ENXIO;
1feb8204 19300 *offset = shdr_add_status;
52d52440
JS
19301 } else
19302 *offset += wr_object->u.response.actual_write_length;
19303 return rc;
19304}
19305
695a814e
JS
19306/**
19307 * lpfc_cleanup_pending_mbox - Free up vport discovery mailbox commands.
19308 * @vport: pointer to vport data structure.
19309 *
19310 * This function iterate through the mailboxq and clean up all REG_LOGIN
19311 * and REG_VPI mailbox commands associated with the vport. This function
19312 * is called when driver want to restart discovery of the vport due to
19313 * a Clear Virtual Link event.
19314 **/
19315void
19316lpfc_cleanup_pending_mbox(struct lpfc_vport *vport)
19317{
19318 struct lpfc_hba *phba = vport->phba;
19319 LPFC_MBOXQ_t *mb, *nextmb;
19320 struct lpfc_dmabuf *mp;
78730cfe 19321 struct lpfc_nodelist *ndlp;
d439d286 19322 struct lpfc_nodelist *act_mbx_ndlp = NULL;
589a52d6 19323 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
d439d286 19324 LIST_HEAD(mbox_cmd_list);
63e801ce 19325 uint8_t restart_loop;
695a814e 19326
d439d286 19327 /* Clean up internally queued mailbox commands with the vport */
695a814e
JS
19328 spin_lock_irq(&phba->hbalock);
19329 list_for_each_entry_safe(mb, nextmb, &phba->sli.mboxq, list) {
19330 if (mb->vport != vport)
19331 continue;
19332
19333 if ((mb->u.mb.mbxCommand != MBX_REG_LOGIN64) &&
19334 (mb->u.mb.mbxCommand != MBX_REG_VPI))
19335 continue;
19336
d439d286
JS
19337 list_del(&mb->list);
19338 list_add_tail(&mb->list, &mbox_cmd_list);
19339 }
19340 /* Clean up active mailbox command with the vport */
19341 mb = phba->sli.mbox_active;
19342 if (mb && (mb->vport == vport)) {
19343 if ((mb->u.mb.mbxCommand == MBX_REG_LOGIN64) ||
19344 (mb->u.mb.mbxCommand == MBX_REG_VPI))
19345 mb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
19346 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 19347 act_mbx_ndlp = (struct lpfc_nodelist *)mb->ctx_ndlp;
d439d286
JS
19348 /* Put reference count for delayed processing */
19349 act_mbx_ndlp = lpfc_nlp_get(act_mbx_ndlp);
19350 /* Unregister the RPI when mailbox complete */
19351 mb->mbox_flag |= LPFC_MBX_IMED_UNREG;
19352 }
19353 }
63e801ce
JS
19354 /* Cleanup any mailbox completions which are not yet processed */
19355 do {
19356 restart_loop = 0;
19357 list_for_each_entry(mb, &phba->sli.mboxq_cmpl, list) {
19358 /*
19359 * If this mailox is already processed or it is
19360 * for another vport ignore it.
19361 */
19362 if ((mb->vport != vport) ||
19363 (mb->mbox_flag & LPFC_MBX_IMED_UNREG))
19364 continue;
19365
19366 if ((mb->u.mb.mbxCommand != MBX_REG_LOGIN64) &&
19367 (mb->u.mb.mbxCommand != MBX_REG_VPI))
19368 continue;
19369
19370 mb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
19371 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 19372 ndlp = (struct lpfc_nodelist *)mb->ctx_ndlp;
63e801ce
JS
19373 /* Unregister the RPI when mailbox complete */
19374 mb->mbox_flag |= LPFC_MBX_IMED_UNREG;
19375 restart_loop = 1;
19376 spin_unlock_irq(&phba->hbalock);
19377 spin_lock(shost->host_lock);
19378 ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
19379 spin_unlock(shost->host_lock);
19380 spin_lock_irq(&phba->hbalock);
19381 break;
19382 }
19383 }
19384 } while (restart_loop);
19385
d439d286
JS
19386 spin_unlock_irq(&phba->hbalock);
19387
19388 /* Release the cleaned-up mailbox commands */
19389 while (!list_empty(&mbox_cmd_list)) {
19390 list_remove_head(&mbox_cmd_list, mb, LPFC_MBOXQ_t, list);
695a814e 19391 if (mb->u.mb.mbxCommand == MBX_REG_LOGIN64) {
3e1f0718 19392 mp = (struct lpfc_dmabuf *)(mb->ctx_buf);
695a814e
JS
19393 if (mp) {
19394 __lpfc_mbuf_free(phba, mp->virt, mp->phys);
19395 kfree(mp);
19396 }
3e1f0718
JS
19397 mb->ctx_buf = NULL;
19398 ndlp = (struct lpfc_nodelist *)mb->ctx_ndlp;
19399 mb->ctx_ndlp = NULL;
78730cfe 19400 if (ndlp) {
ec21b3b0 19401 spin_lock(shost->host_lock);
589a52d6 19402 ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
ec21b3b0 19403 spin_unlock(shost->host_lock);
78730cfe 19404 lpfc_nlp_put(ndlp);
78730cfe 19405 }
695a814e 19406 }
695a814e
JS
19407 mempool_free(mb, phba->mbox_mem_pool);
19408 }
d439d286
JS
19409
19410 /* Release the ndlp with the cleaned-up active mailbox command */
19411 if (act_mbx_ndlp) {
19412 spin_lock(shost->host_lock);
19413 act_mbx_ndlp->nlp_flag &= ~NLP_IGNR_REG_CMPL;
19414 spin_unlock(shost->host_lock);
19415 lpfc_nlp_put(act_mbx_ndlp);
695a814e 19416 }
695a814e
JS
19417}
19418
2a9bf3d0
JS
19419/**
19420 * lpfc_drain_txq - Drain the txq
19421 * @phba: Pointer to HBA context object.
19422 *
19423 * This function attempt to submit IOCBs on the txq
19424 * to the adapter. For SLI4 adapters, the txq contains
19425 * ELS IOCBs that have been deferred because the there
19426 * are no SGLs. This congestion can occur with large
19427 * vport counts during node discovery.
19428 **/
19429
19430uint32_t
19431lpfc_drain_txq(struct lpfc_hba *phba)
19432{
19433 LIST_HEAD(completions);
895427bd 19434 struct lpfc_sli_ring *pring;
2e706377 19435 struct lpfc_iocbq *piocbq = NULL;
2a9bf3d0
JS
19436 unsigned long iflags = 0;
19437 char *fail_msg = NULL;
19438 struct lpfc_sglq *sglq;
205e8240 19439 union lpfc_wqe128 wqe;
a2fc4aef 19440 uint32_t txq_cnt = 0;
dc19e3b4 19441 struct lpfc_queue *wq;
2a9bf3d0 19442
dc19e3b4
JS
19443 if (phba->link_flag & LS_MDS_LOOPBACK) {
19444 /* MDS WQE are posted only to first WQ*/
cdb42bec 19445 wq = phba->sli4_hba.hdwq[0].fcp_wq;
dc19e3b4
JS
19446 if (unlikely(!wq))
19447 return 0;
19448 pring = wq->pring;
19449 } else {
19450 wq = phba->sli4_hba.els_wq;
19451 if (unlikely(!wq))
19452 return 0;
19453 pring = lpfc_phba_elsring(phba);
19454 }
19455
19456 if (unlikely(!pring) || list_empty(&pring->txq))
1234a6d5 19457 return 0;
895427bd 19458
398d81c9 19459 spin_lock_irqsave(&pring->ring_lock, iflags);
0e9bb8d7
JS
19460 list_for_each_entry(piocbq, &pring->txq, list) {
19461 txq_cnt++;
19462 }
19463
19464 if (txq_cnt > pring->txq_max)
19465 pring->txq_max = txq_cnt;
2a9bf3d0 19466
398d81c9 19467 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0 19468
0e9bb8d7 19469 while (!list_empty(&pring->txq)) {
398d81c9 19470 spin_lock_irqsave(&pring->ring_lock, iflags);
2a9bf3d0 19471
19ca7609 19472 piocbq = lpfc_sli_ringtx_get(phba, pring);
a629852a 19473 if (!piocbq) {
398d81c9 19474 spin_unlock_irqrestore(&pring->ring_lock, iflags);
a629852a
JS
19475 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
19476 "2823 txq empty and txq_cnt is %d\n ",
0e9bb8d7 19477 txq_cnt);
a629852a
JS
19478 break;
19479 }
895427bd 19480 sglq = __lpfc_sli_get_els_sglq(phba, piocbq);
2a9bf3d0 19481 if (!sglq) {
19ca7609 19482 __lpfc_sli_ringtx_put(phba, pring, piocbq);
398d81c9 19483 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0 19484 break;
2a9bf3d0 19485 }
0e9bb8d7 19486 txq_cnt--;
2a9bf3d0
JS
19487
19488 /* The xri and iocb resources secured,
19489 * attempt to issue request
19490 */
6d368e53 19491 piocbq->sli4_lxritag = sglq->sli4_lxritag;
2a9bf3d0
JS
19492 piocbq->sli4_xritag = sglq->sli4_xritag;
19493 if (NO_XRI == lpfc_sli4_bpl2sgl(phba, piocbq, sglq))
19494 fail_msg = "to convert bpl to sgl";
205e8240 19495 else if (lpfc_sli4_iocb2wqe(phba, piocbq, &wqe))
2a9bf3d0 19496 fail_msg = "to convert iocb to wqe";
dc19e3b4 19497 else if (lpfc_sli4_wq_put(wq, &wqe))
2a9bf3d0
JS
19498 fail_msg = " - Wq is full";
19499 else
19500 lpfc_sli_ringtxcmpl_put(phba, pring, piocbq);
19501
19502 if (fail_msg) {
19503 /* Failed means we can't issue and need to cancel */
19504 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
19505 "2822 IOCB failed %s iotag 0x%x "
19506 "xri 0x%x\n",
19507 fail_msg,
19508 piocbq->iotag, piocbq->sli4_xritag);
19509 list_add_tail(&piocbq->list, &completions);
19510 }
398d81c9 19511 spin_unlock_irqrestore(&pring->ring_lock, iflags);
2a9bf3d0
JS
19512 }
19513
2a9bf3d0
JS
19514 /* Cancel all the IOCBs that cannot be issued */
19515 lpfc_sli_cancel_iocbs(phba, &completions, IOSTAT_LOCAL_REJECT,
19516 IOERR_SLI_ABORTED);
19517
0e9bb8d7 19518 return txq_cnt;
2a9bf3d0 19519}
895427bd
JS
19520
19521/**
19522 * lpfc_wqe_bpl2sgl - Convert the bpl/bde to a sgl.
19523 * @phba: Pointer to HBA context object.
19524 * @pwqe: Pointer to command WQE.
19525 * @sglq: Pointer to the scatter gather queue object.
19526 *
19527 * This routine converts the bpl or bde that is in the WQE
19528 * to a sgl list for the sli4 hardware. The physical address
19529 * of the bpl/bde is converted back to a virtual address.
19530 * If the WQE contains a BPL then the list of BDE's is
19531 * converted to sli4_sge's. If the WQE contains a single
19532 * BDE then it is converted to a single sli_sge.
19533 * The WQE is still in cpu endianness so the contents of
19534 * the bpl can be used without byte swapping.
19535 *
19536 * Returns valid XRI = Success, NO_XRI = Failure.
19537 */
19538static uint16_t
19539lpfc_wqe_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *pwqeq,
19540 struct lpfc_sglq *sglq)
19541{
19542 uint16_t xritag = NO_XRI;
19543 struct ulp_bde64 *bpl = NULL;
19544 struct ulp_bde64 bde;
19545 struct sli4_sge *sgl = NULL;
19546 struct lpfc_dmabuf *dmabuf;
205e8240 19547 union lpfc_wqe128 *wqe;
895427bd
JS
19548 int numBdes = 0;
19549 int i = 0;
19550 uint32_t offset = 0; /* accumulated offset in the sg request list */
19551 int inbound = 0; /* number of sg reply entries inbound from firmware */
19552 uint32_t cmd;
19553
19554 if (!pwqeq || !sglq)
19555 return xritag;
19556
19557 sgl = (struct sli4_sge *)sglq->sgl;
19558 wqe = &pwqeq->wqe;
19559 pwqeq->iocb.ulpIoTag = pwqeq->iotag;
19560
19561 cmd = bf_get(wqe_cmnd, &wqe->generic.wqe_com);
19562 if (cmd == CMD_XMIT_BLS_RSP64_WQE)
19563 return sglq->sli4_xritag;
19564 numBdes = pwqeq->rsvd2;
19565 if (numBdes) {
19566 /* The addrHigh and addrLow fields within the WQE
19567 * have not been byteswapped yet so there is no
19568 * need to swap them back.
19569 */
19570 if (pwqeq->context3)
19571 dmabuf = (struct lpfc_dmabuf *)pwqeq->context3;
19572 else
19573 return xritag;
19574
19575 bpl = (struct ulp_bde64 *)dmabuf->virt;
19576 if (!bpl)
19577 return xritag;
19578
19579 for (i = 0; i < numBdes; i++) {
19580 /* Should already be byte swapped. */
19581 sgl->addr_hi = bpl->addrHigh;
19582 sgl->addr_lo = bpl->addrLow;
19583
19584 sgl->word2 = le32_to_cpu(sgl->word2);
19585 if ((i+1) == numBdes)
19586 bf_set(lpfc_sli4_sge_last, sgl, 1);
19587 else
19588 bf_set(lpfc_sli4_sge_last, sgl, 0);
19589 /* swap the size field back to the cpu so we
19590 * can assign it to the sgl.
19591 */
19592 bde.tus.w = le32_to_cpu(bpl->tus.w);
19593 sgl->sge_len = cpu_to_le32(bde.tus.f.bdeSize);
19594 /* The offsets in the sgl need to be accumulated
19595 * separately for the request and reply lists.
19596 * The request is always first, the reply follows.
19597 */
19598 switch (cmd) {
19599 case CMD_GEN_REQUEST64_WQE:
19600 /* add up the reply sg entries */
19601 if (bpl->tus.f.bdeFlags == BUFF_TYPE_BDE_64I)
19602 inbound++;
19603 /* first inbound? reset the offset */
19604 if (inbound == 1)
19605 offset = 0;
19606 bf_set(lpfc_sli4_sge_offset, sgl, offset);
19607 bf_set(lpfc_sli4_sge_type, sgl,
19608 LPFC_SGE_TYPE_DATA);
19609 offset += bde.tus.f.bdeSize;
19610 break;
19611 case CMD_FCP_TRSP64_WQE:
19612 bf_set(lpfc_sli4_sge_offset, sgl, 0);
19613 bf_set(lpfc_sli4_sge_type, sgl,
19614 LPFC_SGE_TYPE_DATA);
19615 break;
19616 case CMD_FCP_TSEND64_WQE:
19617 case CMD_FCP_TRECEIVE64_WQE:
19618 bf_set(lpfc_sli4_sge_type, sgl,
19619 bpl->tus.f.bdeFlags);
19620 if (i < 3)
19621 offset = 0;
19622 else
19623 offset += bde.tus.f.bdeSize;
19624 bf_set(lpfc_sli4_sge_offset, sgl, offset);
19625 break;
19626 }
19627 sgl->word2 = cpu_to_le32(sgl->word2);
19628 bpl++;
19629 sgl++;
19630 }
19631 } else if (wqe->gen_req.bde.tus.f.bdeFlags == BUFF_TYPE_BDE_64) {
19632 /* The addrHigh and addrLow fields of the BDE have not
19633 * been byteswapped yet so they need to be swapped
19634 * before putting them in the sgl.
19635 */
19636 sgl->addr_hi = cpu_to_le32(wqe->gen_req.bde.addrHigh);
19637 sgl->addr_lo = cpu_to_le32(wqe->gen_req.bde.addrLow);
19638 sgl->word2 = le32_to_cpu(sgl->word2);
19639 bf_set(lpfc_sli4_sge_last, sgl, 1);
19640 sgl->word2 = cpu_to_le32(sgl->word2);
19641 sgl->sge_len = cpu_to_le32(wqe->gen_req.bde.tus.f.bdeSize);
19642 }
19643 return sglq->sli4_xritag;
19644}
19645
19646/**
19647 * lpfc_sli4_issue_wqe - Issue an SLI4 Work Queue Entry (WQE)
19648 * @phba: Pointer to HBA context object.
19649 * @ring_number: Base sli ring number
19650 * @pwqe: Pointer to command WQE.
19651 **/
19652int
1fbf9742 19653lpfc_sli4_issue_wqe(struct lpfc_hba *phba, struct lpfc_sli4_hdw_queue *qp,
895427bd
JS
19654 struct lpfc_iocbq *pwqe)
19655{
205e8240 19656 union lpfc_wqe128 *wqe = &pwqe->wqe;
f358dd0c 19657 struct lpfc_nvmet_rcv_ctx *ctxp;
895427bd
JS
19658 struct lpfc_queue *wq;
19659 struct lpfc_sglq *sglq;
19660 struct lpfc_sli_ring *pring;
19661 unsigned long iflags;
cd22d605 19662 uint32_t ret = 0;
895427bd
JS
19663
19664 /* NVME_LS and NVME_LS ABTS requests. */
19665 if (pwqe->iocb_flag & LPFC_IO_NVME_LS) {
19666 pring = phba->sli4_hba.nvmels_wq->pring;
19667 spin_lock_irqsave(&pring->ring_lock, iflags);
19668 sglq = __lpfc_sli_get_els_sglq(phba, pwqe);
19669 if (!sglq) {
19670 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19671 return WQE_BUSY;
19672 }
19673 pwqe->sli4_lxritag = sglq->sli4_lxritag;
19674 pwqe->sli4_xritag = sglq->sli4_xritag;
19675 if (lpfc_wqe_bpl2sgl(phba, pwqe, sglq) == NO_XRI) {
19676 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19677 return WQE_ERROR;
19678 }
19679 bf_set(wqe_xri_tag, &pwqe->wqe.xmit_bls_rsp.wqe_com,
19680 pwqe->sli4_xritag);
cd22d605
DK
19681 ret = lpfc_sli4_wq_put(phba->sli4_hba.nvmels_wq, wqe);
19682 if (ret) {
895427bd 19683 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 19684 return ret;
895427bd 19685 }
cd22d605 19686
895427bd
JS
19687 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
19688 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19689 return 0;
19690 }
19691
19692 /* NVME_FCREQ and NVME_ABTS requests */
19693 if (pwqe->iocb_flag & LPFC_IO_NVME) {
19694 /* Get the IO distribution (hba_wqidx) for WQ assignment. */
1fbf9742
JS
19695 wq = qp->nvme_wq;
19696 pring = wq->pring;
19697
19698 bf_set(wqe_cqid, &wqe->generic.wqe_com, qp->nvme_cq_map);
895427bd
JS
19699
19700 spin_lock_irqsave(&pring->ring_lock, iflags);
cd22d605
DK
19701 ret = lpfc_sli4_wq_put(wq, wqe);
19702 if (ret) {
895427bd 19703 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 19704 return ret;
895427bd
JS
19705 }
19706 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
19707 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19708 return 0;
19709 }
19710
f358dd0c
JS
19711 /* NVMET requests */
19712 if (pwqe->iocb_flag & LPFC_IO_NVMET) {
19713 /* Get the IO distribution (hba_wqidx) for WQ assignment. */
1fbf9742
JS
19714 wq = qp->nvme_wq;
19715 pring = wq->pring;
f358dd0c 19716
f358dd0c 19717 ctxp = pwqe->context2;
6c621a22 19718 sglq = ctxp->ctxbuf->sglq;
f358dd0c
JS
19719 if (pwqe->sli4_xritag == NO_XRI) {
19720 pwqe->sli4_lxritag = sglq->sli4_lxritag;
19721 pwqe->sli4_xritag = sglq->sli4_xritag;
19722 }
19723 bf_set(wqe_xri_tag, &pwqe->wqe.xmit_bls_rsp.wqe_com,
19724 pwqe->sli4_xritag);
1fbf9742
JS
19725 bf_set(wqe_cqid, &wqe->generic.wqe_com, qp->nvme_cq_map);
19726
19727 spin_lock_irqsave(&pring->ring_lock, iflags);
cd22d605
DK
19728 ret = lpfc_sli4_wq_put(wq, wqe);
19729 if (ret) {
f358dd0c 19730 spin_unlock_irqrestore(&pring->ring_lock, iflags);
cd22d605 19731 return ret;
f358dd0c
JS
19732 }
19733 lpfc_sli_ringtxcmpl_put(phba, pring, pwqe);
19734 spin_unlock_irqrestore(&pring->ring_lock, iflags);
19735 return 0;
19736 }
895427bd
JS
19737 return WQE_ERROR;
19738}
c490850a
JS
19739
19740#ifdef LPFC_MXP_STAT
19741/**
19742 * lpfc_snapshot_mxp - Snapshot pbl, pvt and busy count
19743 * @phba: pointer to lpfc hba data structure.
19744 * @hwqid: belong to which HWQ.
19745 *
19746 * The purpose of this routine is to take a snapshot of pbl, pvt and busy count
19747 * 15 seconds after a test case is running.
19748 *
19749 * The user should call lpfc_debugfs_multixripools_write before running a test
19750 * case to clear stat_snapshot_taken. Then the user starts a test case. During
19751 * test case is running, stat_snapshot_taken is incremented by 1 every time when
19752 * this routine is called from heartbeat timer. When stat_snapshot_taken is
19753 * equal to LPFC_MXP_SNAPSHOT_TAKEN, a snapshot is taken.
19754 **/
19755void lpfc_snapshot_mxp(struct lpfc_hba *phba, u32 hwqid)
19756{
19757 struct lpfc_sli4_hdw_queue *qp;
19758 struct lpfc_multixri_pool *multixri_pool;
19759 struct lpfc_pvt_pool *pvt_pool;
19760 struct lpfc_pbl_pool *pbl_pool;
19761 u32 txcmplq_cnt;
19762
19763 qp = &phba->sli4_hba.hdwq[hwqid];
19764 multixri_pool = qp->p_multixri_pool;
19765 if (!multixri_pool)
19766 return;
19767
19768 if (multixri_pool->stat_snapshot_taken == LPFC_MXP_SNAPSHOT_TAKEN) {
19769 pvt_pool = &qp->p_multixri_pool->pvt_pool;
19770 pbl_pool = &qp->p_multixri_pool->pbl_pool;
19771 txcmplq_cnt = qp->fcp_wq->pring->txcmplq_cnt;
19772 if (qp->nvme_wq)
19773 txcmplq_cnt += qp->nvme_wq->pring->txcmplq_cnt;
19774
19775 multixri_pool->stat_pbl_count = pbl_pool->count;
19776 multixri_pool->stat_pvt_count = pvt_pool->count;
19777 multixri_pool->stat_busy_count = txcmplq_cnt;
19778 }
19779
19780 multixri_pool->stat_snapshot_taken++;
19781}
19782#endif
19783
19784/**
19785 * lpfc_adjust_pvt_pool_count - Adjust private pool count
19786 * @phba: pointer to lpfc hba data structure.
19787 * @hwqid: belong to which HWQ.
19788 *
19789 * This routine moves some XRIs from private to public pool when private pool
19790 * is not busy.
19791 **/
19792void lpfc_adjust_pvt_pool_count(struct lpfc_hba *phba, u32 hwqid)
19793{
19794 struct lpfc_multixri_pool *multixri_pool;
19795 u32 io_req_count;
19796 u32 prev_io_req_count;
19797
19798 multixri_pool = phba->sli4_hba.hdwq[hwqid].p_multixri_pool;
19799 if (!multixri_pool)
19800 return;
19801 io_req_count = multixri_pool->io_req_count;
19802 prev_io_req_count = multixri_pool->prev_io_req_count;
19803
19804 if (prev_io_req_count != io_req_count) {
19805 /* Private pool is busy */
19806 multixri_pool->prev_io_req_count = io_req_count;
19807 } else {
19808 /* Private pool is not busy.
19809 * Move XRIs from private to public pool.
19810 */
19811 lpfc_move_xri_pvt_to_pbl(phba, hwqid);
19812 }
19813}
19814
19815/**
19816 * lpfc_adjust_high_watermark - Adjust high watermark
19817 * @phba: pointer to lpfc hba data structure.
19818 * @hwqid: belong to which HWQ.
19819 *
19820 * This routine sets high watermark as number of outstanding XRIs,
19821 * but make sure the new value is between xri_limit/2 and xri_limit.
19822 **/
19823void lpfc_adjust_high_watermark(struct lpfc_hba *phba, u32 hwqid)
19824{
19825 u32 new_watermark;
19826 u32 watermark_max;
19827 u32 watermark_min;
19828 u32 xri_limit;
19829 u32 txcmplq_cnt;
19830 u32 abts_io_bufs;
19831 struct lpfc_multixri_pool *multixri_pool;
19832 struct lpfc_sli4_hdw_queue *qp;
19833
19834 qp = &phba->sli4_hba.hdwq[hwqid];
19835 multixri_pool = qp->p_multixri_pool;
19836 if (!multixri_pool)
19837 return;
19838 xri_limit = multixri_pool->xri_limit;
19839
19840 watermark_max = xri_limit;
19841 watermark_min = xri_limit / 2;
19842
19843 txcmplq_cnt = qp->fcp_wq->pring->txcmplq_cnt;
19844 abts_io_bufs = qp->abts_scsi_io_bufs;
19845 if (qp->nvme_wq) {
19846 txcmplq_cnt += qp->nvme_wq->pring->txcmplq_cnt;
19847 abts_io_bufs += qp->abts_nvme_io_bufs;
19848 }
19849
19850 new_watermark = txcmplq_cnt + abts_io_bufs;
19851 new_watermark = min(watermark_max, new_watermark);
19852 new_watermark = max(watermark_min, new_watermark);
19853 multixri_pool->pvt_pool.high_watermark = new_watermark;
19854
19855#ifdef LPFC_MXP_STAT
19856 multixri_pool->stat_max_hwm = max(multixri_pool->stat_max_hwm,
19857 new_watermark);
19858#endif
19859}
19860
19861/**
19862 * lpfc_move_xri_pvt_to_pbl - Move some XRIs from private to public pool
19863 * @phba: pointer to lpfc hba data structure.
19864 * @hwqid: belong to which HWQ.
19865 *
19866 * This routine is called from hearbeat timer when pvt_pool is idle.
19867 * All free XRIs are moved from private to public pool on hwqid with 2 steps.
19868 * The first step moves (all - low_watermark) amount of XRIs.
19869 * The second step moves the rest of XRIs.
19870 **/
19871void lpfc_move_xri_pvt_to_pbl(struct lpfc_hba *phba, u32 hwqid)
19872{
19873 struct lpfc_pbl_pool *pbl_pool;
19874 struct lpfc_pvt_pool *pvt_pool;
19875 struct lpfc_io_buf *lpfc_ncmd;
19876 struct lpfc_io_buf *lpfc_ncmd_next;
19877 unsigned long iflag;
19878 struct list_head tmp_list;
19879 u32 tmp_count;
19880
19881 pbl_pool = &phba->sli4_hba.hdwq[hwqid].p_multixri_pool->pbl_pool;
19882 pvt_pool = &phba->sli4_hba.hdwq[hwqid].p_multixri_pool->pvt_pool;
19883 tmp_count = 0;
19884
19885 spin_lock_irqsave(&pbl_pool->lock, iflag);
19886 spin_lock(&pvt_pool->lock);
19887
19888 if (pvt_pool->count > pvt_pool->low_watermark) {
19889 /* Step 1: move (all - low_watermark) from pvt_pool
19890 * to pbl_pool
19891 */
19892
19893 /* Move low watermark of bufs from pvt_pool to tmp_list */
19894 INIT_LIST_HEAD(&tmp_list);
19895 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
19896 &pvt_pool->list, list) {
19897 list_move_tail(&lpfc_ncmd->list, &tmp_list);
19898 tmp_count++;
19899 if (tmp_count >= pvt_pool->low_watermark)
19900 break;
19901 }
19902
19903 /* Move all bufs from pvt_pool to pbl_pool */
19904 list_splice_init(&pvt_pool->list, &pbl_pool->list);
19905
19906 /* Move all bufs from tmp_list to pvt_pool */
19907 list_splice(&tmp_list, &pvt_pool->list);
19908
19909 pbl_pool->count += (pvt_pool->count - tmp_count);
19910 pvt_pool->count = tmp_count;
19911 } else {
19912 /* Step 2: move the rest from pvt_pool to pbl_pool */
19913 list_splice_init(&pvt_pool->list, &pbl_pool->list);
19914 pbl_pool->count += pvt_pool->count;
19915 pvt_pool->count = 0;
19916 }
19917
19918 spin_unlock(&pvt_pool->lock);
19919 spin_unlock_irqrestore(&pbl_pool->lock, iflag);
19920}
19921
19922/**
19923 * _lpfc_move_xri_pbl_to_pvt - Move some XRIs from public to private pool
19924 * @phba: pointer to lpfc hba data structure
19925 * @pbl_pool: specified public free XRI pool
19926 * @pvt_pool: specified private free XRI pool
19927 * @count: number of XRIs to move
19928 *
19929 * This routine tries to move some free common bufs from the specified pbl_pool
19930 * to the specified pvt_pool. It might move less than count XRIs if there's not
19931 * enough in public pool.
19932 *
19933 * Return:
19934 * true - if XRIs are successfully moved from the specified pbl_pool to the
19935 * specified pvt_pool
19936 * false - if the specified pbl_pool is empty or locked by someone else
19937 **/
19938static bool
19939_lpfc_move_xri_pbl_to_pvt(struct lpfc_hba *phba, struct lpfc_pbl_pool *pbl_pool,
19940 struct lpfc_pvt_pool *pvt_pool, u32 count)
19941{
19942 struct lpfc_io_buf *lpfc_ncmd;
19943 struct lpfc_io_buf *lpfc_ncmd_next;
19944 unsigned long iflag;
19945 int ret;
19946
19947 ret = spin_trylock_irqsave(&pbl_pool->lock, iflag);
19948 if (ret) {
19949 if (pbl_pool->count) {
19950 /* Move a batch of XRIs from public to private pool */
19951 spin_lock(&pvt_pool->lock);
19952 list_for_each_entry_safe(lpfc_ncmd,
19953 lpfc_ncmd_next,
19954 &pbl_pool->list,
19955 list) {
19956 list_move_tail(&lpfc_ncmd->list,
19957 &pvt_pool->list);
19958 pvt_pool->count++;
19959 pbl_pool->count--;
19960 count--;
19961 if (count == 0)
19962 break;
19963 }
19964
19965 spin_unlock(&pvt_pool->lock);
19966 spin_unlock_irqrestore(&pbl_pool->lock, iflag);
19967 return true;
19968 }
19969 spin_unlock_irqrestore(&pbl_pool->lock, iflag);
19970 }
19971
19972 return false;
19973}
19974
19975/**
19976 * lpfc_move_xri_pbl_to_pvt - Move some XRIs from public to private pool
19977 * @phba: pointer to lpfc hba data structure.
19978 * @hwqid: belong to which HWQ.
19979 * @count: number of XRIs to move
19980 *
19981 * This routine tries to find some free common bufs in one of public pools with
19982 * Round Robin method. The search always starts from local hwqid, then the next
19983 * HWQ which was found last time (rrb_next_hwqid). Once a public pool is found,
19984 * a batch of free common bufs are moved to private pool on hwqid.
19985 * It might move less than count XRIs if there's not enough in public pool.
19986 **/
19987void lpfc_move_xri_pbl_to_pvt(struct lpfc_hba *phba, u32 hwqid, u32 count)
19988{
19989 struct lpfc_multixri_pool *multixri_pool;
19990 struct lpfc_multixri_pool *next_multixri_pool;
19991 struct lpfc_pvt_pool *pvt_pool;
19992 struct lpfc_pbl_pool *pbl_pool;
19993 u32 next_hwqid;
19994 u32 hwq_count;
19995 int ret;
19996
19997 multixri_pool = phba->sli4_hba.hdwq[hwqid].p_multixri_pool;
19998 pvt_pool = &multixri_pool->pvt_pool;
19999 pbl_pool = &multixri_pool->pbl_pool;
20000
20001 /* Check if local pbl_pool is available */
20002 ret = _lpfc_move_xri_pbl_to_pvt(phba, pbl_pool, pvt_pool, count);
20003 if (ret) {
20004#ifdef LPFC_MXP_STAT
20005 multixri_pool->local_pbl_hit_count++;
20006#endif
20007 return;
20008 }
20009
20010 hwq_count = phba->cfg_hdw_queue;
20011
20012 /* Get the next hwqid which was found last time */
20013 next_hwqid = multixri_pool->rrb_next_hwqid;
20014
20015 do {
20016 /* Go to next hwq */
20017 next_hwqid = (next_hwqid + 1) % hwq_count;
20018
20019 next_multixri_pool =
20020 phba->sli4_hba.hdwq[next_hwqid].p_multixri_pool;
20021 pbl_pool = &next_multixri_pool->pbl_pool;
20022
20023 /* Check if the public free xri pool is available */
20024 ret = _lpfc_move_xri_pbl_to_pvt(
20025 phba, pbl_pool, pvt_pool, count);
20026
20027 /* Exit while-loop if success or all hwqid are checked */
20028 } while (!ret && next_hwqid != multixri_pool->rrb_next_hwqid);
20029
20030 /* Starting point for the next time */
20031 multixri_pool->rrb_next_hwqid = next_hwqid;
20032
20033 if (!ret) {
20034 /* stats: all public pools are empty*/
20035 multixri_pool->pbl_empty_count++;
20036 }
20037
20038#ifdef LPFC_MXP_STAT
20039 if (ret) {
20040 if (next_hwqid == hwqid)
20041 multixri_pool->local_pbl_hit_count++;
20042 else
20043 multixri_pool->other_pbl_hit_count++;
20044 }
20045#endif
20046}
20047
20048/**
20049 * lpfc_keep_pvt_pool_above_lowwm - Keep pvt_pool above low watermark
20050 * @phba: pointer to lpfc hba data structure.
20051 * @qp: belong to which HWQ.
20052 *
20053 * This routine get a batch of XRIs from pbl_pool if pvt_pool is less than
20054 * low watermark.
20055 **/
20056void lpfc_keep_pvt_pool_above_lowwm(struct lpfc_hba *phba, u32 hwqid)
20057{
20058 struct lpfc_multixri_pool *multixri_pool;
20059 struct lpfc_pvt_pool *pvt_pool;
20060
20061 multixri_pool = phba->sli4_hba.hdwq[hwqid].p_multixri_pool;
20062 pvt_pool = &multixri_pool->pvt_pool;
20063
20064 if (pvt_pool->count < pvt_pool->low_watermark)
20065 lpfc_move_xri_pbl_to_pvt(phba, hwqid, XRI_BATCH);
20066}
20067
20068/**
20069 * lpfc_release_io_buf - Return one IO buf back to free pool
20070 * @phba: pointer to lpfc hba data structure.
20071 * @lpfc_ncmd: IO buf to be returned.
20072 * @qp: belong to which HWQ.
20073 *
20074 * This routine returns one IO buf back to free pool. If this is an urgent IO,
20075 * the IO buf is returned to expedite pool. If cfg_xri_rebalancing==1,
20076 * the IO buf is returned to pbl_pool or pvt_pool based on watermark and
20077 * xri_limit. If cfg_xri_rebalancing==0, the IO buf is returned to
20078 * lpfc_io_buf_list_put.
20079 **/
20080void lpfc_release_io_buf(struct lpfc_hba *phba, struct lpfc_io_buf *lpfc_ncmd,
20081 struct lpfc_sli4_hdw_queue *qp)
20082{
20083 unsigned long iflag;
20084 struct lpfc_pbl_pool *pbl_pool;
20085 struct lpfc_pvt_pool *pvt_pool;
20086 struct lpfc_epd_pool *epd_pool;
20087 u32 txcmplq_cnt;
20088 u32 xri_owned;
20089 u32 xri_limit;
20090 u32 abts_io_bufs;
20091
20092 /* MUST zero fields if buffer is reused by another protocol */
20093 lpfc_ncmd->nvmeCmd = NULL;
20094 lpfc_ncmd->cur_iocbq.wqe_cmpl = NULL;
20095 lpfc_ncmd->cur_iocbq.iocb_cmpl = NULL;
20096
20097 if (phba->cfg_xri_rebalancing) {
20098 if (lpfc_ncmd->expedite) {
20099 /* Return to expedite pool */
20100 epd_pool = &phba->epd_pool;
20101 spin_lock_irqsave(&epd_pool->lock, iflag);
20102 list_add_tail(&lpfc_ncmd->list, &epd_pool->list);
20103 epd_pool->count++;
20104 spin_unlock_irqrestore(&epd_pool->lock, iflag);
20105 return;
20106 }
20107
20108 /* Avoid invalid access if an IO sneaks in and is being rejected
20109 * just _after_ xri pools are destroyed in lpfc_offline.
20110 * Nothing much can be done at this point.
20111 */
20112 if (!qp->p_multixri_pool)
20113 return;
20114
20115 pbl_pool = &qp->p_multixri_pool->pbl_pool;
20116 pvt_pool = &qp->p_multixri_pool->pvt_pool;
20117
20118 txcmplq_cnt = qp->fcp_wq->pring->txcmplq_cnt;
20119 abts_io_bufs = qp->abts_scsi_io_bufs;
20120 if (qp->nvme_wq) {
20121 txcmplq_cnt += qp->nvme_wq->pring->txcmplq_cnt;
20122 abts_io_bufs += qp->abts_nvme_io_bufs;
20123 }
20124
20125 xri_owned = pvt_pool->count + txcmplq_cnt + abts_io_bufs;
20126 xri_limit = qp->p_multixri_pool->xri_limit;
20127
20128#ifdef LPFC_MXP_STAT
20129 if (xri_owned <= xri_limit)
20130 qp->p_multixri_pool->below_limit_count++;
20131 else
20132 qp->p_multixri_pool->above_limit_count++;
20133#endif
20134
20135 /* XRI goes to either public or private free xri pool
20136 * based on watermark and xri_limit
20137 */
20138 if ((pvt_pool->count < pvt_pool->low_watermark) ||
20139 (xri_owned < xri_limit &&
20140 pvt_pool->count < pvt_pool->high_watermark)) {
20141 spin_lock_irqsave(&pvt_pool->lock, iflag);
20142 list_add_tail(&lpfc_ncmd->list,
20143 &pvt_pool->list);
20144 pvt_pool->count++;
20145 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
20146 } else {
20147 spin_lock_irqsave(&pbl_pool->lock, iflag);
20148 list_add_tail(&lpfc_ncmd->list,
20149 &pbl_pool->list);
20150 pbl_pool->count++;
20151 spin_unlock_irqrestore(&pbl_pool->lock, iflag);
20152 }
20153 } else {
20154 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
20155 list_add_tail(&lpfc_ncmd->list,
20156 &qp->lpfc_io_buf_list_put);
20157 qp->put_io_bufs++;
20158 spin_unlock_irqrestore(&qp->io_buf_list_put_lock,
20159 iflag);
20160 }
20161}
20162
20163/**
20164 * lpfc_get_io_buf_from_private_pool - Get one free IO buf from private pool
20165 * @phba: pointer to lpfc hba data structure.
20166 * @pvt_pool: pointer to private pool data structure.
20167 * @ndlp: pointer to lpfc nodelist data structure.
20168 *
20169 * This routine tries to get one free IO buf from private pool.
20170 *
20171 * Return:
20172 * pointer to one free IO buf - if private pool is not empty
20173 * NULL - if private pool is empty
20174 **/
20175static struct lpfc_io_buf *
20176lpfc_get_io_buf_from_private_pool(struct lpfc_hba *phba,
20177 struct lpfc_pvt_pool *pvt_pool,
20178 struct lpfc_nodelist *ndlp)
20179{
20180 struct lpfc_io_buf *lpfc_ncmd;
20181 struct lpfc_io_buf *lpfc_ncmd_next;
20182 unsigned long iflag;
20183
20184 spin_lock_irqsave(&pvt_pool->lock, iflag);
20185 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
20186 &pvt_pool->list, list) {
20187 if (lpfc_test_rrq_active(
20188 phba, ndlp, lpfc_ncmd->cur_iocbq.sli4_lxritag))
20189 continue;
20190 list_del(&lpfc_ncmd->list);
20191 pvt_pool->count--;
20192 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
20193 return lpfc_ncmd;
20194 }
20195 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
20196
20197 return NULL;
20198}
20199
20200/**
20201 * lpfc_get_io_buf_from_expedite_pool - Get one free IO buf from expedite pool
20202 * @phba: pointer to lpfc hba data structure.
20203 *
20204 * This routine tries to get one free IO buf from expedite pool.
20205 *
20206 * Return:
20207 * pointer to one free IO buf - if expedite pool is not empty
20208 * NULL - if expedite pool is empty
20209 **/
20210static struct lpfc_io_buf *
20211lpfc_get_io_buf_from_expedite_pool(struct lpfc_hba *phba)
20212{
20213 struct lpfc_io_buf *lpfc_ncmd;
20214 struct lpfc_io_buf *lpfc_ncmd_next;
20215 unsigned long iflag;
20216 struct lpfc_epd_pool *epd_pool;
20217
20218 epd_pool = &phba->epd_pool;
20219 lpfc_ncmd = NULL;
20220
20221 spin_lock_irqsave(&epd_pool->lock, iflag);
20222 if (epd_pool->count > 0) {
20223 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
20224 &epd_pool->list, list) {
20225 list_del(&lpfc_ncmd->list);
20226 epd_pool->count--;
20227 break;
20228 }
20229 }
20230 spin_unlock_irqrestore(&epd_pool->lock, iflag);
20231
20232 return lpfc_ncmd;
20233}
20234
20235/**
20236 * lpfc_get_io_buf_from_multixri_pools - Get one free IO bufs
20237 * @phba: pointer to lpfc hba data structure.
20238 * @ndlp: pointer to lpfc nodelist data structure.
20239 * @hwqid: belong to which HWQ
20240 * @expedite: 1 means this request is urgent.
20241 *
20242 * This routine will do the following actions and then return a pointer to
20243 * one free IO buf.
20244 *
20245 * 1. If private free xri count is empty, move some XRIs from public to
20246 * private pool.
20247 * 2. Get one XRI from private free xri pool.
20248 * 3. If we fail to get one from pvt_pool and this is an expedite request,
20249 * get one free xri from expedite pool.
20250 *
20251 * Note: ndlp is only used on SCSI side for RRQ testing.
20252 * The caller should pass NULL for ndlp on NVME side.
20253 *
20254 * Return:
20255 * pointer to one free IO buf - if private pool is not empty
20256 * NULL - if private pool is empty
20257 **/
20258static struct lpfc_io_buf *
20259lpfc_get_io_buf_from_multixri_pools(struct lpfc_hba *phba,
20260 struct lpfc_nodelist *ndlp,
20261 int hwqid, int expedite)
20262{
20263 struct lpfc_sli4_hdw_queue *qp;
20264 struct lpfc_multixri_pool *multixri_pool;
20265 struct lpfc_pvt_pool *pvt_pool;
20266 struct lpfc_io_buf *lpfc_ncmd;
20267
20268 qp = &phba->sli4_hba.hdwq[hwqid];
20269 lpfc_ncmd = NULL;
20270 multixri_pool = qp->p_multixri_pool;
20271 pvt_pool = &multixri_pool->pvt_pool;
20272 multixri_pool->io_req_count++;
20273
20274 /* If pvt_pool is empty, move some XRIs from public to private pool */
20275 if (pvt_pool->count == 0)
20276 lpfc_move_xri_pbl_to_pvt(phba, hwqid, XRI_BATCH);
20277
20278 /* Get one XRI from private free xri pool */
20279 lpfc_ncmd = lpfc_get_io_buf_from_private_pool(phba, pvt_pool, ndlp);
20280
20281 if (lpfc_ncmd) {
20282 lpfc_ncmd->hdwq = qp;
20283 lpfc_ncmd->hdwq_no = hwqid;
20284 } else if (expedite) {
20285 /* If we fail to get one from pvt_pool and this is an expedite
20286 * request, get one free xri from expedite pool.
20287 */
20288 lpfc_ncmd = lpfc_get_io_buf_from_expedite_pool(phba);
20289 }
20290
20291 return lpfc_ncmd;
20292}
20293
20294static inline struct lpfc_io_buf *
20295lpfc_io_buf(struct lpfc_hba *phba, struct lpfc_nodelist *ndlp, int idx)
20296{
20297 struct lpfc_sli4_hdw_queue *qp;
20298 struct lpfc_io_buf *lpfc_cmd, *lpfc_cmd_next;
20299
20300 qp = &phba->sli4_hba.hdwq[idx];
20301 list_for_each_entry_safe(lpfc_cmd, lpfc_cmd_next,
20302 &qp->lpfc_io_buf_list_get, list) {
20303 if (lpfc_test_rrq_active(phba, ndlp,
20304 lpfc_cmd->cur_iocbq.sli4_lxritag))
20305 continue;
20306
20307 if (lpfc_cmd->flags & LPFC_SBUF_NOT_POSTED)
20308 continue;
20309
20310 list_del_init(&lpfc_cmd->list);
20311 qp->get_io_bufs--;
20312 lpfc_cmd->hdwq = qp;
20313 lpfc_cmd->hdwq_no = idx;
20314 return lpfc_cmd;
20315 }
20316 return NULL;
20317}
20318
20319/**
20320 * lpfc_get_io_buf - Get one IO buffer from free pool
20321 * @phba: The HBA for which this call is being executed.
20322 * @ndlp: pointer to lpfc nodelist data structure.
20323 * @hwqid: belong to which HWQ
20324 * @expedite: 1 means this request is urgent.
20325 *
20326 * This routine gets one IO buffer from free pool. If cfg_xri_rebalancing==1,
20327 * removes a IO buffer from multiXRI pools. If cfg_xri_rebalancing==0, removes
20328 * a IO buffer from head of @hdwq io_buf_list and returns to caller.
20329 *
20330 * Note: ndlp is only used on SCSI side for RRQ testing.
20331 * The caller should pass NULL for ndlp on NVME side.
20332 *
20333 * Return codes:
20334 * NULL - Error
20335 * Pointer to lpfc_io_buf - Success
20336 **/
20337struct lpfc_io_buf *lpfc_get_io_buf(struct lpfc_hba *phba,
20338 struct lpfc_nodelist *ndlp,
20339 u32 hwqid, int expedite)
20340{
20341 struct lpfc_sli4_hdw_queue *qp;
20342 unsigned long iflag;
20343 struct lpfc_io_buf *lpfc_cmd;
20344
20345 qp = &phba->sli4_hba.hdwq[hwqid];
20346 lpfc_cmd = NULL;
20347
20348 if (phba->cfg_xri_rebalancing)
20349 lpfc_cmd = lpfc_get_io_buf_from_multixri_pools(
20350 phba, ndlp, hwqid, expedite);
20351 else {
20352 spin_lock_irqsave(&qp->io_buf_list_get_lock, iflag);
20353 if (qp->get_io_bufs > LPFC_NVME_EXPEDITE_XRICNT || expedite)
20354 lpfc_cmd = lpfc_io_buf(phba, ndlp, hwqid);
20355 if (!lpfc_cmd) {
20356 spin_lock(&qp->io_buf_list_put_lock);
20357 list_splice(&qp->lpfc_io_buf_list_put,
20358 &qp->lpfc_io_buf_list_get);
20359 qp->get_io_bufs += qp->put_io_bufs;
20360 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put);
20361 qp->put_io_bufs = 0;
20362 spin_unlock(&qp->io_buf_list_put_lock);
20363 if (qp->get_io_bufs > LPFC_NVME_EXPEDITE_XRICNT ||
20364 expedite)
20365 lpfc_cmd = lpfc_io_buf(phba, ndlp, hwqid);
20366 }
20367 spin_unlock_irqrestore(&qp->io_buf_list_get_lock, iflag);
20368 }
20369
20370 return lpfc_cmd;
20371}