Commit | Line | Data |
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dea3101e | 1 | /******************************************************************* |
2 | * This file is part of the Emulex Linux Device Driver for * | |
c44ce173 | 3 | * Fibre Channel Host Bus Adapters. * |
0d041215 | 4 | * Copyright (C) 2017-2019 Broadcom. All Rights Reserved. The term * |
3e21d1cb | 5 | * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * |
50611577 | 6 | * Copyright (C) 2004-2016 Emulex. All rights reserved. * |
c44ce173 | 7 | * EMULEX and SLI are trademarks of Emulex. * |
d080abe0 | 8 | * www.broadcom.com * |
c44ce173 | 9 | * Portions Copyright (C) 2004-2005 Christoph Hellwig * |
dea3101e | 10 | * * |
11 | * This program is free software; you can redistribute it and/or * | |
c44ce173 JSEC |
12 | * modify it under the terms of version 2 of the GNU General * |
13 | * Public License as published by the Free Software Foundation. * | |
14 | * This program is distributed in the hope that it will be useful. * | |
15 | * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * | |
16 | * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * | |
17 | * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * | |
18 | * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * | |
19 | * TO BE LEGALLY INVALID. See the GNU General Public License for * | |
20 | * more details, a copy of which can be found in the file COPYING * | |
21 | * included with this package. * | |
dea3101e | 22 | *******************************************************************/ |
23 | ||
dea3101e | 24 | #include <linux/blkdev.h> |
25 | #include <linux/delay.h> | |
26 | #include <linux/dma-mapping.h> | |
27 | #include <linux/idr.h> | |
28 | #include <linux/interrupt.h> | |
acf3368f | 29 | #include <linux/module.h> |
dea3101e | 30 | #include <linux/kthread.h> |
31 | #include <linux/pci.h> | |
32 | #include <linux/spinlock.h> | |
92d7f7b0 | 33 | #include <linux/ctype.h> |
0d878419 | 34 | #include <linux/aer.h> |
5a0e3ad6 | 35 | #include <linux/slab.h> |
52d52440 | 36 | #include <linux/firmware.h> |
3ef6d24c | 37 | #include <linux/miscdevice.h> |
7bb03bbf | 38 | #include <linux/percpu.h> |
895427bd | 39 | #include <linux/msi.h> |
6a828b0f | 40 | #include <linux/irq.h> |
286871a6 | 41 | #include <linux/bitops.h> |
31f06d2e | 42 | #include <linux/crash_dump.h> |
dea3101e | 43 | |
91886523 | 44 | #include <scsi/scsi.h> |
dea3101e | 45 | #include <scsi/scsi_device.h> |
46 | #include <scsi/scsi_host.h> | |
47 | #include <scsi/scsi_transport_fc.h> | |
86c67379 JS |
48 | #include <scsi/scsi_tcq.h> |
49 | #include <scsi/fc/fc_fs.h> | |
50 | ||
51 | #include <linux/nvme-fc-driver.h> | |
dea3101e | 52 | |
da0436e9 | 53 | #include "lpfc_hw4.h" |
dea3101e | 54 | #include "lpfc_hw.h" |
55 | #include "lpfc_sli.h" | |
da0436e9 | 56 | #include "lpfc_sli4.h" |
ea2151b4 | 57 | #include "lpfc_nl.h" |
dea3101e | 58 | #include "lpfc_disc.h" |
dea3101e | 59 | #include "lpfc.h" |
895427bd JS |
60 | #include "lpfc_scsi.h" |
61 | #include "lpfc_nvme.h" | |
86c67379 | 62 | #include "lpfc_nvmet.h" |
dea3101e | 63 | #include "lpfc_logmsg.h" |
64 | #include "lpfc_crtn.h" | |
92d7f7b0 | 65 | #include "lpfc_vport.h" |
dea3101e | 66 | #include "lpfc_version.h" |
12f44457 | 67 | #include "lpfc_ids.h" |
dea3101e | 68 | |
81301a9b JS |
69 | char *_dump_buf_data; |
70 | unsigned long _dump_buf_data_order; | |
71 | char *_dump_buf_dif; | |
72 | unsigned long _dump_buf_dif_order; | |
73 | spinlock_t _dump_buf_lock; | |
74 | ||
7bb03bbf | 75 | /* Used when mapping IRQ vectors in a driver centric manner */ |
d7b761b0 | 76 | static uint32_t lpfc_present_cpu; |
7bb03bbf | 77 | |
dea3101e | 78 | static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *); |
79 | static int lpfc_post_rcv_buf(struct lpfc_hba *); | |
5350d872 | 80 | static int lpfc_sli4_queue_verify(struct lpfc_hba *); |
da0436e9 JS |
81 | static int lpfc_create_bootstrap_mbox(struct lpfc_hba *); |
82 | static int lpfc_setup_endian_order(struct lpfc_hba *); | |
da0436e9 | 83 | static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *); |
8a9d2e80 | 84 | static void lpfc_free_els_sgl_list(struct lpfc_hba *); |
f358dd0c | 85 | static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *); |
8a9d2e80 | 86 | static void lpfc_init_sgl_list(struct lpfc_hba *); |
da0436e9 JS |
87 | static int lpfc_init_active_sgl_array(struct lpfc_hba *); |
88 | static void lpfc_free_active_sgl(struct lpfc_hba *); | |
89 | static int lpfc_hba_down_post_s3(struct lpfc_hba *phba); | |
90 | static int lpfc_hba_down_post_s4(struct lpfc_hba *phba); | |
91 | static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *); | |
92 | static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *); | |
93 | static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *); | |
618a5230 JS |
94 | static void lpfc_sli4_disable_intr(struct lpfc_hba *); |
95 | static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t); | |
1ba981fd | 96 | static void lpfc_sli4_oas_verify(struct lpfc_hba *phba); |
6a828b0f | 97 | static uint16_t lpfc_find_cpu_handle(struct lpfc_hba *, uint16_t, int); |
aa6ff309 | 98 | static void lpfc_setup_bg(struct lpfc_hba *, struct Scsi_Host *); |
dea3101e | 99 | |
100 | static struct scsi_transport_template *lpfc_transport_template = NULL; | |
92d7f7b0 | 101 | static struct scsi_transport_template *lpfc_vport_transport_template = NULL; |
dea3101e | 102 | static DEFINE_IDR(lpfc_hba_index); |
f358dd0c | 103 | #define LPFC_NVMET_BUF_POST 254 |
dea3101e | 104 | |
e59058c4 | 105 | /** |
3621a710 | 106 | * lpfc_config_port_prep - Perform lpfc initialization prior to config port |
e59058c4 JS |
107 | * @phba: pointer to lpfc hba data structure. |
108 | * | |
109 | * This routine will do LPFC initialization prior to issuing the CONFIG_PORT | |
110 | * mailbox command. It retrieves the revision information from the HBA and | |
111 | * collects the Vital Product Data (VPD) about the HBA for preparing the | |
112 | * configuration of the HBA. | |
113 | * | |
114 | * Return codes: | |
115 | * 0 - success. | |
116 | * -ERESTART - requests the SLI layer to reset the HBA and try again. | |
117 | * Any other value - indicates an error. | |
118 | **/ | |
dea3101e | 119 | int |
2e0fef85 | 120 | lpfc_config_port_prep(struct lpfc_hba *phba) |
dea3101e | 121 | { |
122 | lpfc_vpd_t *vp = &phba->vpd; | |
123 | int i = 0, rc; | |
124 | LPFC_MBOXQ_t *pmb; | |
125 | MAILBOX_t *mb; | |
126 | char *lpfc_vpd_data = NULL; | |
127 | uint16_t offset = 0; | |
128 | static char licensed[56] = | |
129 | "key unlock for use with gnu public licensed code only\0"; | |
65a29c16 | 130 | static int init_key = 1; |
dea3101e | 131 | |
132 | pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); | |
133 | if (!pmb) { | |
2e0fef85 | 134 | phba->link_state = LPFC_HBA_ERROR; |
dea3101e | 135 | return -ENOMEM; |
136 | } | |
137 | ||
04c68496 | 138 | mb = &pmb->u.mb; |
2e0fef85 | 139 | phba->link_state = LPFC_INIT_MBX_CMDS; |
dea3101e | 140 | |
141 | if (lpfc_is_LC_HBA(phba->pcidev->device)) { | |
65a29c16 JS |
142 | if (init_key) { |
143 | uint32_t *ptext = (uint32_t *) licensed; | |
dea3101e | 144 | |
65a29c16 JS |
145 | for (i = 0; i < 56; i += sizeof (uint32_t), ptext++) |
146 | *ptext = cpu_to_be32(*ptext); | |
147 | init_key = 0; | |
148 | } | |
dea3101e | 149 | |
150 | lpfc_read_nv(phba, pmb); | |
151 | memset((char*)mb->un.varRDnvp.rsvd3, 0, | |
152 | sizeof (mb->un.varRDnvp.rsvd3)); | |
153 | memcpy((char*)mb->un.varRDnvp.rsvd3, licensed, | |
154 | sizeof (licensed)); | |
155 | ||
156 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); | |
157 | ||
158 | if (rc != MBX_SUCCESS) { | |
ed957684 | 159 | lpfc_printf_log(phba, KERN_ERR, LOG_MBOX, |
e8b62011 | 160 | "0324 Config Port initialization " |
dea3101e | 161 | "error, mbxCmd x%x READ_NVPARM, " |
162 | "mbxStatus x%x\n", | |
dea3101e | 163 | mb->mbxCommand, mb->mbxStatus); |
164 | mempool_free(pmb, phba->mbox_mem_pool); | |
165 | return -ERESTART; | |
166 | } | |
167 | memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename, | |
2e0fef85 JS |
168 | sizeof(phba->wwnn)); |
169 | memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname, | |
170 | sizeof(phba->wwpn)); | |
dea3101e | 171 | } |
172 | ||
dfb75133 MW |
173 | /* |
174 | * Clear all option bits except LPFC_SLI3_BG_ENABLED, | |
175 | * which was already set in lpfc_get_cfgparam() | |
176 | */ | |
177 | phba->sli3_options &= (uint32_t)LPFC_SLI3_BG_ENABLED; | |
92d7f7b0 | 178 | |
dea3101e | 179 | /* Setup and issue mailbox READ REV command */ |
180 | lpfc_read_rev(phba, pmb); | |
181 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); | |
182 | if (rc != MBX_SUCCESS) { | |
ed957684 | 183 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
e8b62011 | 184 | "0439 Adapter failed to init, mbxCmd x%x " |
dea3101e | 185 | "READ_REV, mbxStatus x%x\n", |
dea3101e | 186 | mb->mbxCommand, mb->mbxStatus); |
187 | mempool_free( pmb, phba->mbox_mem_pool); | |
188 | return -ERESTART; | |
189 | } | |
190 | ||
92d7f7b0 | 191 | |
1de933f3 JSEC |
192 | /* |
193 | * The value of rr must be 1 since the driver set the cv field to 1. | |
194 | * This setting requires the FW to set all revision fields. | |
dea3101e | 195 | */ |
1de933f3 | 196 | if (mb->un.varRdRev.rr == 0) { |
dea3101e | 197 | vp->rev.rBit = 0; |
1de933f3 | 198 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
e8b62011 JS |
199 | "0440 Adapter failed to init, READ_REV has " |
200 | "missing revision information.\n"); | |
dea3101e | 201 | mempool_free(pmb, phba->mbox_mem_pool); |
202 | return -ERESTART; | |
dea3101e | 203 | } |
204 | ||
495a714c JS |
205 | if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) { |
206 | mempool_free(pmb, phba->mbox_mem_pool); | |
ed957684 | 207 | return -EINVAL; |
495a714c | 208 | } |
ed957684 | 209 | |
dea3101e | 210 | /* Save information as VPD data */ |
1de933f3 | 211 | vp->rev.rBit = 1; |
92d7f7b0 | 212 | memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t)); |
1de933f3 JSEC |
213 | vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev; |
214 | memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16); | |
215 | vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev; | |
216 | memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16); | |
dea3101e | 217 | vp->rev.biuRev = mb->un.varRdRev.biuRev; |
218 | vp->rev.smRev = mb->un.varRdRev.smRev; | |
219 | vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev; | |
220 | vp->rev.endecRev = mb->un.varRdRev.endecRev; | |
221 | vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh; | |
222 | vp->rev.fcphLow = mb->un.varRdRev.fcphLow; | |
223 | vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh; | |
224 | vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow; | |
225 | vp->rev.postKernRev = mb->un.varRdRev.postKernRev; | |
226 | vp->rev.opFwRev = mb->un.varRdRev.opFwRev; | |
227 | ||
92d7f7b0 JS |
228 | /* If the sli feature level is less then 9, we must |
229 | * tear down all RPIs and VPIs on link down if NPIV | |
230 | * is enabled. | |
231 | */ | |
232 | if (vp->rev.feaLevelHigh < 9) | |
233 | phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN; | |
234 | ||
dea3101e | 235 | if (lpfc_is_LC_HBA(phba->pcidev->device)) |
236 | memcpy(phba->RandomData, (char *)&mb->un.varWords[24], | |
237 | sizeof (phba->RandomData)); | |
238 | ||
dea3101e | 239 | /* Get adapter VPD information */ |
dea3101e | 240 | lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL); |
241 | if (!lpfc_vpd_data) | |
d7c255b2 | 242 | goto out_free_mbox; |
dea3101e | 243 | do { |
a0c87cbd | 244 | lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD); |
dea3101e | 245 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); |
246 | ||
247 | if (rc != MBX_SUCCESS) { | |
248 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
e8b62011 | 249 | "0441 VPD not present on adapter, " |
dea3101e | 250 | "mbxCmd x%x DUMP VPD, mbxStatus x%x\n", |
dea3101e | 251 | mb->mbxCommand, mb->mbxStatus); |
74b72a59 | 252 | mb->un.varDmp.word_cnt = 0; |
dea3101e | 253 | } |
04c68496 JS |
254 | /* dump mem may return a zero when finished or we got a |
255 | * mailbox error, either way we are done. | |
256 | */ | |
257 | if (mb->un.varDmp.word_cnt == 0) | |
258 | break; | |
74b72a59 JW |
259 | if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset) |
260 | mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset; | |
d7c255b2 JS |
261 | lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET, |
262 | lpfc_vpd_data + offset, | |
92d7f7b0 | 263 | mb->un.varDmp.word_cnt); |
dea3101e | 264 | offset += mb->un.varDmp.word_cnt; |
74b72a59 JW |
265 | } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE); |
266 | lpfc_parse_vpd(phba, lpfc_vpd_data, offset); | |
dea3101e | 267 | |
268 | kfree(lpfc_vpd_data); | |
dea3101e | 269 | out_free_mbox: |
270 | mempool_free(pmb, phba->mbox_mem_pool); | |
271 | return 0; | |
272 | } | |
273 | ||
e59058c4 | 274 | /** |
3621a710 | 275 | * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd |
e59058c4 JS |
276 | * @phba: pointer to lpfc hba data structure. |
277 | * @pmboxq: pointer to the driver internal queue element for mailbox command. | |
278 | * | |
279 | * This is the completion handler for driver's configuring asynchronous event | |
280 | * mailbox command to the device. If the mailbox command returns successfully, | |
281 | * it will set internal async event support flag to 1; otherwise, it will | |
282 | * set internal async event support flag to 0. | |
283 | **/ | |
57127f15 JS |
284 | static void |
285 | lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq) | |
286 | { | |
04c68496 | 287 | if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS) |
57127f15 JS |
288 | phba->temp_sensor_support = 1; |
289 | else | |
290 | phba->temp_sensor_support = 0; | |
291 | mempool_free(pmboxq, phba->mbox_mem_pool); | |
292 | return; | |
293 | } | |
294 | ||
97207482 | 295 | /** |
3621a710 | 296 | * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler |
97207482 JS |
297 | * @phba: pointer to lpfc hba data structure. |
298 | * @pmboxq: pointer to the driver internal queue element for mailbox command. | |
299 | * | |
300 | * This is the completion handler for dump mailbox command for getting | |
301 | * wake up parameters. When this command complete, the response contain | |
302 | * Option rom version of the HBA. This function translate the version number | |
303 | * into a human readable string and store it in OptionROMVersion. | |
304 | **/ | |
305 | static void | |
306 | lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq) | |
307 | { | |
308 | struct prog_id *prg; | |
309 | uint32_t prog_id_word; | |
310 | char dist = ' '; | |
311 | /* character array used for decoding dist type. */ | |
312 | char dist_char[] = "nabx"; | |
313 | ||
04c68496 | 314 | if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) { |
9f1e1b50 | 315 | mempool_free(pmboxq, phba->mbox_mem_pool); |
97207482 | 316 | return; |
9f1e1b50 | 317 | } |
97207482 JS |
318 | |
319 | prg = (struct prog_id *) &prog_id_word; | |
320 | ||
321 | /* word 7 contain option rom version */ | |
04c68496 | 322 | prog_id_word = pmboxq->u.mb.un.varWords[7]; |
97207482 JS |
323 | |
324 | /* Decode the Option rom version word to a readable string */ | |
325 | if (prg->dist < 4) | |
326 | dist = dist_char[prg->dist]; | |
327 | ||
328 | if ((prg->dist == 3) && (prg->num == 0)) | |
a2fc4aef | 329 | snprintf(phba->OptionROMVersion, 32, "%d.%d%d", |
97207482 JS |
330 | prg->ver, prg->rev, prg->lev); |
331 | else | |
a2fc4aef | 332 | snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d", |
97207482 JS |
333 | prg->ver, prg->rev, prg->lev, |
334 | dist, prg->num); | |
9f1e1b50 | 335 | mempool_free(pmboxq, phba->mbox_mem_pool); |
97207482 JS |
336 | return; |
337 | } | |
338 | ||
0558056c JS |
339 | /** |
340 | * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname, | |
341 | * cfg_soft_wwnn, cfg_soft_wwpn | |
342 | * @vport: pointer to lpfc vport data structure. | |
343 | * | |
344 | * | |
345 | * Return codes | |
346 | * None. | |
347 | **/ | |
348 | void | |
349 | lpfc_update_vport_wwn(struct lpfc_vport *vport) | |
350 | { | |
aeb3c817 JS |
351 | uint8_t vvvl = vport->fc_sparam.cmn.valid_vendor_ver_level; |
352 | u32 *fawwpn_key = (u32 *)&vport->fc_sparam.un.vendorVersion[0]; | |
353 | ||
0558056c JS |
354 | /* If the soft name exists then update it using the service params */ |
355 | if (vport->phba->cfg_soft_wwnn) | |
356 | u64_to_wwn(vport->phba->cfg_soft_wwnn, | |
357 | vport->fc_sparam.nodeName.u.wwn); | |
358 | if (vport->phba->cfg_soft_wwpn) | |
359 | u64_to_wwn(vport->phba->cfg_soft_wwpn, | |
360 | vport->fc_sparam.portName.u.wwn); | |
361 | ||
362 | /* | |
363 | * If the name is empty or there exists a soft name | |
364 | * then copy the service params name, otherwise use the fc name | |
365 | */ | |
366 | if (vport->fc_nodename.u.wwn[0] == 0 || vport->phba->cfg_soft_wwnn) | |
367 | memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName, | |
368 | sizeof(struct lpfc_name)); | |
369 | else | |
370 | memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename, | |
371 | sizeof(struct lpfc_name)); | |
372 | ||
aeb3c817 JS |
373 | /* |
374 | * If the port name has changed, then set the Param changes flag | |
375 | * to unreg the login | |
376 | */ | |
377 | if (vport->fc_portname.u.wwn[0] != 0 && | |
378 | memcmp(&vport->fc_portname, &vport->fc_sparam.portName, | |
379 | sizeof(struct lpfc_name))) | |
380 | vport->vport_flag |= FAWWPN_PARAM_CHG; | |
381 | ||
382 | if (vport->fc_portname.u.wwn[0] == 0 || | |
383 | vport->phba->cfg_soft_wwpn || | |
384 | (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR) || | |
385 | vport->vport_flag & FAWWPN_SET) { | |
0558056c JS |
386 | memcpy(&vport->fc_portname, &vport->fc_sparam.portName, |
387 | sizeof(struct lpfc_name)); | |
aeb3c817 JS |
388 | vport->vport_flag &= ~FAWWPN_SET; |
389 | if (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR) | |
390 | vport->vport_flag |= FAWWPN_SET; | |
391 | } | |
0558056c JS |
392 | else |
393 | memcpy(&vport->fc_sparam.portName, &vport->fc_portname, | |
394 | sizeof(struct lpfc_name)); | |
395 | } | |
396 | ||
e59058c4 | 397 | /** |
3621a710 | 398 | * lpfc_config_port_post - Perform lpfc initialization after config port |
e59058c4 JS |
399 | * @phba: pointer to lpfc hba data structure. |
400 | * | |
401 | * This routine will do LPFC initialization after the CONFIG_PORT mailbox | |
402 | * command call. It performs all internal resource and state setups on the | |
403 | * port: post IOCB buffers, enable appropriate host interrupt attentions, | |
404 | * ELS ring timers, etc. | |
405 | * | |
406 | * Return codes | |
407 | * 0 - success. | |
408 | * Any other value - error. | |
409 | **/ | |
dea3101e | 410 | int |
2e0fef85 | 411 | lpfc_config_port_post(struct lpfc_hba *phba) |
dea3101e | 412 | { |
2e0fef85 | 413 | struct lpfc_vport *vport = phba->pport; |
a257bf90 | 414 | struct Scsi_Host *shost = lpfc_shost_from_vport(vport); |
dea3101e | 415 | LPFC_MBOXQ_t *pmb; |
416 | MAILBOX_t *mb; | |
417 | struct lpfc_dmabuf *mp; | |
418 | struct lpfc_sli *psli = &phba->sli; | |
419 | uint32_t status, timeout; | |
2e0fef85 JS |
420 | int i, j; |
421 | int rc; | |
dea3101e | 422 | |
7af67051 JS |
423 | spin_lock_irq(&phba->hbalock); |
424 | /* | |
425 | * If the Config port completed correctly the HBA is not | |
426 | * over heated any more. | |
427 | */ | |
428 | if (phba->over_temp_state == HBA_OVER_TEMP) | |
429 | phba->over_temp_state = HBA_NORMAL_TEMP; | |
430 | spin_unlock_irq(&phba->hbalock); | |
431 | ||
dea3101e | 432 | pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); |
433 | if (!pmb) { | |
2e0fef85 | 434 | phba->link_state = LPFC_HBA_ERROR; |
dea3101e | 435 | return -ENOMEM; |
436 | } | |
04c68496 | 437 | mb = &pmb->u.mb; |
dea3101e | 438 | |
dea3101e | 439 | /* Get login parameters for NID. */ |
9f1177a3 JS |
440 | rc = lpfc_read_sparam(phba, pmb, 0); |
441 | if (rc) { | |
442 | mempool_free(pmb, phba->mbox_mem_pool); | |
443 | return -ENOMEM; | |
444 | } | |
445 | ||
ed957684 | 446 | pmb->vport = vport; |
dea3101e | 447 | if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { |
ed957684 | 448 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
e8b62011 | 449 | "0448 Adapter failed init, mbxCmd x%x " |
dea3101e | 450 | "READ_SPARM mbxStatus x%x\n", |
dea3101e | 451 | mb->mbxCommand, mb->mbxStatus); |
2e0fef85 | 452 | phba->link_state = LPFC_HBA_ERROR; |
3e1f0718 | 453 | mp = (struct lpfc_dmabuf *)pmb->ctx_buf; |
9f1177a3 | 454 | mempool_free(pmb, phba->mbox_mem_pool); |
dea3101e | 455 | lpfc_mbuf_free(phba, mp->virt, mp->phys); |
456 | kfree(mp); | |
457 | return -EIO; | |
458 | } | |
459 | ||
3e1f0718 | 460 | mp = (struct lpfc_dmabuf *)pmb->ctx_buf; |
dea3101e | 461 | |
2e0fef85 | 462 | memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm)); |
dea3101e | 463 | lpfc_mbuf_free(phba, mp->virt, mp->phys); |
464 | kfree(mp); | |
3e1f0718 | 465 | pmb->ctx_buf = NULL; |
0558056c | 466 | lpfc_update_vport_wwn(vport); |
a257bf90 JS |
467 | |
468 | /* Update the fc_host data structures with new wwn. */ | |
469 | fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn); | |
470 | fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn); | |
21e9a0a5 | 471 | fc_host_max_npiv_vports(shost) = phba->max_vpi; |
a257bf90 | 472 | |
dea3101e | 473 | /* If no serial number in VPD data, use low 6 bytes of WWNN */ |
474 | /* This should be consolidated into parse_vpd ? - mr */ | |
475 | if (phba->SerialNumber[0] == 0) { | |
476 | uint8_t *outptr; | |
477 | ||
2e0fef85 | 478 | outptr = &vport->fc_nodename.u.s.IEEE[0]; |
dea3101e | 479 | for (i = 0; i < 12; i++) { |
480 | status = *outptr++; | |
481 | j = ((status & 0xf0) >> 4); | |
482 | if (j <= 9) | |
483 | phba->SerialNumber[i] = | |
484 | (char)((uint8_t) 0x30 + (uint8_t) j); | |
485 | else | |
486 | phba->SerialNumber[i] = | |
487 | (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); | |
488 | i++; | |
489 | j = (status & 0xf); | |
490 | if (j <= 9) | |
491 | phba->SerialNumber[i] = | |
492 | (char)((uint8_t) 0x30 + (uint8_t) j); | |
493 | else | |
494 | phba->SerialNumber[i] = | |
495 | (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); | |
496 | } | |
497 | } | |
498 | ||
dea3101e | 499 | lpfc_read_config(phba, pmb); |
ed957684 | 500 | pmb->vport = vport; |
dea3101e | 501 | if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { |
ed957684 | 502 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
e8b62011 | 503 | "0453 Adapter failed to init, mbxCmd x%x " |
dea3101e | 504 | "READ_CONFIG, mbxStatus x%x\n", |
dea3101e | 505 | mb->mbxCommand, mb->mbxStatus); |
2e0fef85 | 506 | phba->link_state = LPFC_HBA_ERROR; |
dea3101e | 507 | mempool_free( pmb, phba->mbox_mem_pool); |
508 | return -EIO; | |
509 | } | |
510 | ||
a0c87cbd JS |
511 | /* Check if the port is disabled */ |
512 | lpfc_sli_read_link_ste(phba); | |
513 | ||
dea3101e | 514 | /* Reset the DFT_HBA_Q_DEPTH to the max xri */ |
572709e2 JS |
515 | i = (mb->un.varRdConfig.max_xri + 1); |
516 | if (phba->cfg_hba_queue_depth > i) { | |
517 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
518 | "3359 HBA queue depth changed from %d to %d\n", | |
519 | phba->cfg_hba_queue_depth, i); | |
520 | phba->cfg_hba_queue_depth = i; | |
521 | } | |
522 | ||
523 | /* Reset the DFT_LUN_Q_DEPTH to (max xri >> 3) */ | |
524 | i = (mb->un.varRdConfig.max_xri >> 3); | |
525 | if (phba->pport->cfg_lun_queue_depth > i) { | |
526 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
527 | "3360 LUN queue depth changed from %d to %d\n", | |
528 | phba->pport->cfg_lun_queue_depth, i); | |
529 | phba->pport->cfg_lun_queue_depth = i; | |
530 | } | |
dea3101e | 531 | |
532 | phba->lmt = mb->un.varRdConfig.lmt; | |
74b72a59 JW |
533 | |
534 | /* Get the default values for Model Name and Description */ | |
535 | lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); | |
536 | ||
2e0fef85 | 537 | phba->link_state = LPFC_LINK_DOWN; |
dea3101e | 538 | |
0b727fea | 539 | /* Only process IOCBs on ELS ring till hba_state is READY */ |
895427bd JS |
540 | if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr) |
541 | psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT; | |
542 | if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr) | |
543 | psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT; | |
dea3101e | 544 | |
545 | /* Post receive buffers for desired rings */ | |
ed957684 JS |
546 | if (phba->sli_rev != 3) |
547 | lpfc_post_rcv_buf(phba); | |
dea3101e | 548 | |
9399627f JS |
549 | /* |
550 | * Configure HBA MSI-X attention conditions to messages if MSI-X mode | |
551 | */ | |
552 | if (phba->intr_type == MSIX) { | |
553 | rc = lpfc_config_msi(phba, pmb); | |
554 | if (rc) { | |
555 | mempool_free(pmb, phba->mbox_mem_pool); | |
556 | return -EIO; | |
557 | } | |
558 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); | |
559 | if (rc != MBX_SUCCESS) { | |
560 | lpfc_printf_log(phba, KERN_ERR, LOG_MBOX, | |
561 | "0352 Config MSI mailbox command " | |
562 | "failed, mbxCmd x%x, mbxStatus x%x\n", | |
04c68496 JS |
563 | pmb->u.mb.mbxCommand, |
564 | pmb->u.mb.mbxStatus); | |
9399627f JS |
565 | mempool_free(pmb, phba->mbox_mem_pool); |
566 | return -EIO; | |
567 | } | |
568 | } | |
569 | ||
04c68496 | 570 | spin_lock_irq(&phba->hbalock); |
9399627f JS |
571 | /* Initialize ERATT handling flag */ |
572 | phba->hba_flag &= ~HBA_ERATT_HANDLED; | |
573 | ||
dea3101e | 574 | /* Enable appropriate host interrupts */ |
9940b97b JS |
575 | if (lpfc_readl(phba->HCregaddr, &status)) { |
576 | spin_unlock_irq(&phba->hbalock); | |
577 | return -EIO; | |
578 | } | |
dea3101e | 579 | status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA; |
580 | if (psli->num_rings > 0) | |
581 | status |= HC_R0INT_ENA; | |
582 | if (psli->num_rings > 1) | |
583 | status |= HC_R1INT_ENA; | |
584 | if (psli->num_rings > 2) | |
585 | status |= HC_R2INT_ENA; | |
586 | if (psli->num_rings > 3) | |
587 | status |= HC_R3INT_ENA; | |
588 | ||
875fbdfe JSEC |
589 | if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) && |
590 | (phba->cfg_poll & DISABLE_FCP_RING_INT)) | |
9399627f | 591 | status &= ~(HC_R0INT_ENA); |
875fbdfe | 592 | |
dea3101e | 593 | writel(status, phba->HCregaddr); |
594 | readl(phba->HCregaddr); /* flush */ | |
2e0fef85 | 595 | spin_unlock_irq(&phba->hbalock); |
dea3101e | 596 | |
9399627f JS |
597 | /* Set up ring-0 (ELS) timer */ |
598 | timeout = phba->fc_ratov * 2; | |
256ec0d0 JS |
599 | mod_timer(&vport->els_tmofunc, |
600 | jiffies + msecs_to_jiffies(1000 * timeout)); | |
9399627f | 601 | /* Set up heart beat (HB) timer */ |
256ec0d0 JS |
602 | mod_timer(&phba->hb_tmofunc, |
603 | jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL)); | |
858c9f6c JS |
604 | phba->hb_outstanding = 0; |
605 | phba->last_completion_time = jiffies; | |
9399627f | 606 | /* Set up error attention (ERATT) polling timer */ |
256ec0d0 | 607 | mod_timer(&phba->eratt_poll, |
65791f1f | 608 | jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval)); |
dea3101e | 609 | |
a0c87cbd JS |
610 | if (phba->hba_flag & LINK_DISABLED) { |
611 | lpfc_printf_log(phba, | |
612 | KERN_ERR, LOG_INIT, | |
613 | "2598 Adapter Link is disabled.\n"); | |
614 | lpfc_down_link(phba, pmb); | |
615 | pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; | |
616 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); | |
617 | if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) { | |
618 | lpfc_printf_log(phba, | |
619 | KERN_ERR, LOG_INIT, | |
620 | "2599 Adapter failed to issue DOWN_LINK" | |
621 | " mbox command rc 0x%x\n", rc); | |
622 | ||
623 | mempool_free(pmb, phba->mbox_mem_pool); | |
624 | return -EIO; | |
625 | } | |
e40a02c1 | 626 | } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) { |
026abb87 JS |
627 | mempool_free(pmb, phba->mbox_mem_pool); |
628 | rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT); | |
629 | if (rc) | |
630 | return rc; | |
dea3101e | 631 | } |
632 | /* MBOX buffer will be freed in mbox compl */ | |
57127f15 | 633 | pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); |
9f1177a3 JS |
634 | if (!pmb) { |
635 | phba->link_state = LPFC_HBA_ERROR; | |
636 | return -ENOMEM; | |
637 | } | |
638 | ||
57127f15 JS |
639 | lpfc_config_async(phba, pmb, LPFC_ELS_RING); |
640 | pmb->mbox_cmpl = lpfc_config_async_cmpl; | |
641 | pmb->vport = phba->pport; | |
642 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); | |
dea3101e | 643 | |
57127f15 JS |
644 | if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { |
645 | lpfc_printf_log(phba, | |
646 | KERN_ERR, | |
647 | LOG_INIT, | |
648 | "0456 Adapter failed to issue " | |
e4e74273 | 649 | "ASYNCEVT_ENABLE mbox status x%x\n", |
57127f15 JS |
650 | rc); |
651 | mempool_free(pmb, phba->mbox_mem_pool); | |
652 | } | |
97207482 JS |
653 | |
654 | /* Get Option rom version */ | |
655 | pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); | |
9f1177a3 JS |
656 | if (!pmb) { |
657 | phba->link_state = LPFC_HBA_ERROR; | |
658 | return -ENOMEM; | |
659 | } | |
660 | ||
97207482 JS |
661 | lpfc_dump_wakeup_param(phba, pmb); |
662 | pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl; | |
663 | pmb->vport = phba->pport; | |
664 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); | |
665 | ||
666 | if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { | |
667 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "0435 Adapter failed " | |
e4e74273 | 668 | "to get Option ROM version status x%x\n", rc); |
97207482 JS |
669 | mempool_free(pmb, phba->mbox_mem_pool); |
670 | } | |
671 | ||
d7c255b2 | 672 | return 0; |
ce8b3ce5 JS |
673 | } |
674 | ||
84d1b006 JS |
675 | /** |
676 | * lpfc_hba_init_link - Initialize the FC link | |
677 | * @phba: pointer to lpfc hba data structure. | |
6e7288d9 | 678 | * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT |
84d1b006 JS |
679 | * |
680 | * This routine will issue the INIT_LINK mailbox command call. | |
681 | * It is available to other drivers through the lpfc_hba data | |
682 | * structure for use as a delayed link up mechanism with the | |
683 | * module parameter lpfc_suppress_link_up. | |
684 | * | |
685 | * Return code | |
686 | * 0 - success | |
687 | * Any other value - error | |
688 | **/ | |
e399b228 | 689 | static int |
6e7288d9 | 690 | lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag) |
1b51197d JS |
691 | { |
692 | return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag); | |
693 | } | |
694 | ||
695 | /** | |
696 | * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology | |
697 | * @phba: pointer to lpfc hba data structure. | |
698 | * @fc_topology: desired fc topology. | |
699 | * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT | |
700 | * | |
701 | * This routine will issue the INIT_LINK mailbox command call. | |
702 | * It is available to other drivers through the lpfc_hba data | |
703 | * structure for use as a delayed link up mechanism with the | |
704 | * module parameter lpfc_suppress_link_up. | |
705 | * | |
706 | * Return code | |
707 | * 0 - success | |
708 | * Any other value - error | |
709 | **/ | |
710 | int | |
711 | lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology, | |
712 | uint32_t flag) | |
84d1b006 JS |
713 | { |
714 | struct lpfc_vport *vport = phba->pport; | |
715 | LPFC_MBOXQ_t *pmb; | |
716 | MAILBOX_t *mb; | |
717 | int rc; | |
718 | ||
719 | pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); | |
720 | if (!pmb) { | |
721 | phba->link_state = LPFC_HBA_ERROR; | |
722 | return -ENOMEM; | |
723 | } | |
724 | mb = &pmb->u.mb; | |
725 | pmb->vport = vport; | |
726 | ||
026abb87 JS |
727 | if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) || |
728 | ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) && | |
729 | !(phba->lmt & LMT_1Gb)) || | |
730 | ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) && | |
731 | !(phba->lmt & LMT_2Gb)) || | |
732 | ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) && | |
733 | !(phba->lmt & LMT_4Gb)) || | |
734 | ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) && | |
735 | !(phba->lmt & LMT_8Gb)) || | |
736 | ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) && | |
737 | !(phba->lmt & LMT_10Gb)) || | |
738 | ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) && | |
d38dd52c JS |
739 | !(phba->lmt & LMT_16Gb)) || |
740 | ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) && | |
fbd8a6ba JS |
741 | !(phba->lmt & LMT_32Gb)) || |
742 | ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_64G) && | |
743 | !(phba->lmt & LMT_64Gb))) { | |
026abb87 JS |
744 | /* Reset link speed to auto */ |
745 | lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT, | |
746 | "1302 Invalid speed for this board:%d " | |
747 | "Reset link speed to auto.\n", | |
748 | phba->cfg_link_speed); | |
749 | phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO; | |
750 | } | |
1b51197d | 751 | lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed); |
84d1b006 | 752 | pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; |
1b51197d JS |
753 | if (phba->sli_rev < LPFC_SLI_REV4) |
754 | lpfc_set_loopback_flag(phba); | |
6e7288d9 | 755 | rc = lpfc_sli_issue_mbox(phba, pmb, flag); |
76a95d75 | 756 | if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { |
84d1b006 JS |
757 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
758 | "0498 Adapter failed to init, mbxCmd x%x " | |
759 | "INIT_LINK, mbxStatus x%x\n", | |
760 | mb->mbxCommand, mb->mbxStatus); | |
76a95d75 JS |
761 | if (phba->sli_rev <= LPFC_SLI_REV3) { |
762 | /* Clear all interrupt enable conditions */ | |
763 | writel(0, phba->HCregaddr); | |
764 | readl(phba->HCregaddr); /* flush */ | |
765 | /* Clear all pending interrupts */ | |
766 | writel(0xffffffff, phba->HAregaddr); | |
767 | readl(phba->HAregaddr); /* flush */ | |
768 | } | |
84d1b006 | 769 | phba->link_state = LPFC_HBA_ERROR; |
6e7288d9 | 770 | if (rc != MBX_BUSY || flag == MBX_POLL) |
84d1b006 JS |
771 | mempool_free(pmb, phba->mbox_mem_pool); |
772 | return -EIO; | |
773 | } | |
e40a02c1 | 774 | phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK; |
6e7288d9 JS |
775 | if (flag == MBX_POLL) |
776 | mempool_free(pmb, phba->mbox_mem_pool); | |
84d1b006 JS |
777 | |
778 | return 0; | |
779 | } | |
780 | ||
781 | /** | |
782 | * lpfc_hba_down_link - this routine downs the FC link | |
6e7288d9 JS |
783 | * @phba: pointer to lpfc hba data structure. |
784 | * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT | |
84d1b006 JS |
785 | * |
786 | * This routine will issue the DOWN_LINK mailbox command call. | |
787 | * It is available to other drivers through the lpfc_hba data | |
788 | * structure for use to stop the link. | |
789 | * | |
790 | * Return code | |
791 | * 0 - success | |
792 | * Any other value - error | |
793 | **/ | |
e399b228 | 794 | static int |
6e7288d9 | 795 | lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag) |
84d1b006 JS |
796 | { |
797 | LPFC_MBOXQ_t *pmb; | |
798 | int rc; | |
799 | ||
800 | pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); | |
801 | if (!pmb) { | |
802 | phba->link_state = LPFC_HBA_ERROR; | |
803 | return -ENOMEM; | |
804 | } | |
805 | ||
806 | lpfc_printf_log(phba, | |
807 | KERN_ERR, LOG_INIT, | |
808 | "0491 Adapter Link is disabled.\n"); | |
809 | lpfc_down_link(phba, pmb); | |
810 | pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; | |
6e7288d9 | 811 | rc = lpfc_sli_issue_mbox(phba, pmb, flag); |
84d1b006 JS |
812 | if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) { |
813 | lpfc_printf_log(phba, | |
814 | KERN_ERR, LOG_INIT, | |
815 | "2522 Adapter failed to issue DOWN_LINK" | |
816 | " mbox command rc 0x%x\n", rc); | |
817 | ||
818 | mempool_free(pmb, phba->mbox_mem_pool); | |
819 | return -EIO; | |
820 | } | |
6e7288d9 JS |
821 | if (flag == MBX_POLL) |
822 | mempool_free(pmb, phba->mbox_mem_pool); | |
823 | ||
84d1b006 JS |
824 | return 0; |
825 | } | |
826 | ||
e59058c4 | 827 | /** |
3621a710 | 828 | * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset |
e59058c4 JS |
829 | * @phba: pointer to lpfc HBA data structure. |
830 | * | |
831 | * This routine will do LPFC uninitialization before the HBA is reset when | |
832 | * bringing down the SLI Layer. | |
833 | * | |
834 | * Return codes | |
835 | * 0 - success. | |
836 | * Any other value - error. | |
837 | **/ | |
dea3101e | 838 | int |
2e0fef85 | 839 | lpfc_hba_down_prep(struct lpfc_hba *phba) |
dea3101e | 840 | { |
1b32f6aa JS |
841 | struct lpfc_vport **vports; |
842 | int i; | |
3772a991 JS |
843 | |
844 | if (phba->sli_rev <= LPFC_SLI_REV3) { | |
845 | /* Disable interrupts */ | |
846 | writel(0, phba->HCregaddr); | |
847 | readl(phba->HCregaddr); /* flush */ | |
848 | } | |
dea3101e | 849 | |
1b32f6aa JS |
850 | if (phba->pport->load_flag & FC_UNLOADING) |
851 | lpfc_cleanup_discovery_resources(phba->pport); | |
852 | else { | |
853 | vports = lpfc_create_vport_work_array(phba); | |
854 | if (vports != NULL) | |
3772a991 JS |
855 | for (i = 0; i <= phba->max_vports && |
856 | vports[i] != NULL; i++) | |
1b32f6aa JS |
857 | lpfc_cleanup_discovery_resources(vports[i]); |
858 | lpfc_destroy_vport_work_array(phba, vports); | |
7f5f3d0d JS |
859 | } |
860 | return 0; | |
dea3101e | 861 | } |
862 | ||
68e814f5 JS |
863 | /** |
864 | * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free | |
865 | * rspiocb which got deferred | |
866 | * | |
867 | * @phba: pointer to lpfc HBA data structure. | |
868 | * | |
869 | * This routine will cleanup completed slow path events after HBA is reset | |
870 | * when bringing down the SLI Layer. | |
871 | * | |
872 | * | |
873 | * Return codes | |
874 | * void. | |
875 | **/ | |
876 | static void | |
877 | lpfc_sli4_free_sp_events(struct lpfc_hba *phba) | |
878 | { | |
879 | struct lpfc_iocbq *rspiocbq; | |
880 | struct hbq_dmabuf *dmabuf; | |
881 | struct lpfc_cq_event *cq_event; | |
882 | ||
883 | spin_lock_irq(&phba->hbalock); | |
884 | phba->hba_flag &= ~HBA_SP_QUEUE_EVT; | |
885 | spin_unlock_irq(&phba->hbalock); | |
886 | ||
887 | while (!list_empty(&phba->sli4_hba.sp_queue_event)) { | |
888 | /* Get the response iocb from the head of work queue */ | |
889 | spin_lock_irq(&phba->hbalock); | |
890 | list_remove_head(&phba->sli4_hba.sp_queue_event, | |
891 | cq_event, struct lpfc_cq_event, list); | |
892 | spin_unlock_irq(&phba->hbalock); | |
893 | ||
894 | switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) { | |
895 | case CQE_CODE_COMPL_WQE: | |
896 | rspiocbq = container_of(cq_event, struct lpfc_iocbq, | |
897 | cq_event); | |
898 | lpfc_sli_release_iocbq(phba, rspiocbq); | |
899 | break; | |
900 | case CQE_CODE_RECEIVE: | |
901 | case CQE_CODE_RECEIVE_V1: | |
902 | dmabuf = container_of(cq_event, struct hbq_dmabuf, | |
903 | cq_event); | |
904 | lpfc_in_buf_free(phba, &dmabuf->dbuf); | |
905 | } | |
906 | } | |
907 | } | |
908 | ||
e59058c4 | 909 | /** |
bcece5f5 | 910 | * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset |
e59058c4 JS |
911 | * @phba: pointer to lpfc HBA data structure. |
912 | * | |
bcece5f5 JS |
913 | * This routine will cleanup posted ELS buffers after the HBA is reset |
914 | * when bringing down the SLI Layer. | |
915 | * | |
e59058c4 JS |
916 | * |
917 | * Return codes | |
bcece5f5 | 918 | * void. |
e59058c4 | 919 | **/ |
bcece5f5 JS |
920 | static void |
921 | lpfc_hba_free_post_buf(struct lpfc_hba *phba) | |
41415862 JW |
922 | { |
923 | struct lpfc_sli *psli = &phba->sli; | |
924 | struct lpfc_sli_ring *pring; | |
925 | struct lpfc_dmabuf *mp, *next_mp; | |
07eab624 JS |
926 | LIST_HEAD(buflist); |
927 | int count; | |
41415862 | 928 | |
92d7f7b0 JS |
929 | if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) |
930 | lpfc_sli_hbqbuf_free_all(phba); | |
931 | else { | |
932 | /* Cleanup preposted buffers on the ELS ring */ | |
895427bd | 933 | pring = &psli->sli3_ring[LPFC_ELS_RING]; |
07eab624 JS |
934 | spin_lock_irq(&phba->hbalock); |
935 | list_splice_init(&pring->postbufq, &buflist); | |
936 | spin_unlock_irq(&phba->hbalock); | |
937 | ||
938 | count = 0; | |
939 | list_for_each_entry_safe(mp, next_mp, &buflist, list) { | |
92d7f7b0 | 940 | list_del(&mp->list); |
07eab624 | 941 | count++; |
92d7f7b0 JS |
942 | lpfc_mbuf_free(phba, mp->virt, mp->phys); |
943 | kfree(mp); | |
944 | } | |
07eab624 JS |
945 | |
946 | spin_lock_irq(&phba->hbalock); | |
947 | pring->postbufq_cnt -= count; | |
bcece5f5 | 948 | spin_unlock_irq(&phba->hbalock); |
41415862 | 949 | } |
bcece5f5 JS |
950 | } |
951 | ||
952 | /** | |
953 | * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset | |
954 | * @phba: pointer to lpfc HBA data structure. | |
955 | * | |
956 | * This routine will cleanup the txcmplq after the HBA is reset when bringing | |
957 | * down the SLI Layer. | |
958 | * | |
959 | * Return codes | |
960 | * void | |
961 | **/ | |
962 | static void | |
963 | lpfc_hba_clean_txcmplq(struct lpfc_hba *phba) | |
964 | { | |
965 | struct lpfc_sli *psli = &phba->sli; | |
895427bd | 966 | struct lpfc_queue *qp = NULL; |
bcece5f5 JS |
967 | struct lpfc_sli_ring *pring; |
968 | LIST_HEAD(completions); | |
969 | int i; | |
c1dd9111 | 970 | struct lpfc_iocbq *piocb, *next_iocb; |
bcece5f5 | 971 | |
895427bd JS |
972 | if (phba->sli_rev != LPFC_SLI_REV4) { |
973 | for (i = 0; i < psli->num_rings; i++) { | |
974 | pring = &psli->sli3_ring[i]; | |
bcece5f5 | 975 | spin_lock_irq(&phba->hbalock); |
895427bd JS |
976 | /* At this point in time the HBA is either reset or DOA |
977 | * Nothing should be on txcmplq as it will | |
978 | * NEVER complete. | |
979 | */ | |
980 | list_splice_init(&pring->txcmplq, &completions); | |
981 | pring->txcmplq_cnt = 0; | |
bcece5f5 | 982 | spin_unlock_irq(&phba->hbalock); |
09372820 | 983 | |
895427bd JS |
984 | lpfc_sli_abort_iocb_ring(phba, pring); |
985 | } | |
a257bf90 | 986 | /* Cancel all the IOCBs from the completions list */ |
895427bd JS |
987 | lpfc_sli_cancel_iocbs(phba, &completions, |
988 | IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED); | |
989 | return; | |
990 | } | |
991 | list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) { | |
992 | pring = qp->pring; | |
993 | if (!pring) | |
994 | continue; | |
995 | spin_lock_irq(&pring->ring_lock); | |
c1dd9111 JS |
996 | list_for_each_entry_safe(piocb, next_iocb, |
997 | &pring->txcmplq, list) | |
998 | piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ; | |
895427bd JS |
999 | list_splice_init(&pring->txcmplq, &completions); |
1000 | pring->txcmplq_cnt = 0; | |
1001 | spin_unlock_irq(&pring->ring_lock); | |
41415862 JW |
1002 | lpfc_sli_abort_iocb_ring(phba, pring); |
1003 | } | |
895427bd JS |
1004 | /* Cancel all the IOCBs from the completions list */ |
1005 | lpfc_sli_cancel_iocbs(phba, &completions, | |
1006 | IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED); | |
bcece5f5 | 1007 | } |
41415862 | 1008 | |
bcece5f5 JS |
1009 | /** |
1010 | * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset | |
1011 | int i; | |
1012 | * @phba: pointer to lpfc HBA data structure. | |
1013 | * | |
1014 | * This routine will do uninitialization after the HBA is reset when bring | |
1015 | * down the SLI Layer. | |
1016 | * | |
1017 | * Return codes | |
1018 | * 0 - success. | |
1019 | * Any other value - error. | |
1020 | **/ | |
1021 | static int | |
1022 | lpfc_hba_down_post_s3(struct lpfc_hba *phba) | |
1023 | { | |
1024 | lpfc_hba_free_post_buf(phba); | |
1025 | lpfc_hba_clean_txcmplq(phba); | |
41415862 JW |
1026 | return 0; |
1027 | } | |
5af5eee7 | 1028 | |
da0436e9 JS |
1029 | /** |
1030 | * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset | |
1031 | * @phba: pointer to lpfc HBA data structure. | |
1032 | * | |
1033 | * This routine will do uninitialization after the HBA is reset when bring | |
1034 | * down the SLI Layer. | |
1035 | * | |
1036 | * Return codes | |
af901ca1 | 1037 | * 0 - success. |
da0436e9 JS |
1038 | * Any other value - error. |
1039 | **/ | |
1040 | static int | |
1041 | lpfc_hba_down_post_s4(struct lpfc_hba *phba) | |
1042 | { | |
c490850a | 1043 | struct lpfc_io_buf *psb, *psb_next; |
86c67379 | 1044 | struct lpfc_nvmet_rcv_ctx *ctxp, *ctxp_next; |
5e5b511d | 1045 | struct lpfc_sli4_hdw_queue *qp; |
da0436e9 | 1046 | LIST_HEAD(aborts); |
895427bd | 1047 | LIST_HEAD(nvme_aborts); |
86c67379 | 1048 | LIST_HEAD(nvmet_aborts); |
0f65ff68 | 1049 | struct lpfc_sglq *sglq_entry = NULL; |
5e5b511d | 1050 | int cnt, idx; |
0f65ff68 | 1051 | |
895427bd JS |
1052 | |
1053 | lpfc_sli_hbqbuf_free_all(phba); | |
bcece5f5 JS |
1054 | lpfc_hba_clean_txcmplq(phba); |
1055 | ||
da0436e9 JS |
1056 | /* At this point in time the HBA is either reset or DOA. Either |
1057 | * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be | |
895427bd | 1058 | * on the lpfc_els_sgl_list so that it can either be freed if the |
da0436e9 JS |
1059 | * driver is unloading or reposted if the driver is restarting |
1060 | * the port. | |
1061 | */ | |
895427bd | 1062 | spin_lock_irq(&phba->hbalock); /* required for lpfc_els_sgl_list and */ |
da0436e9 | 1063 | /* scsl_buf_list */ |
895427bd | 1064 | /* sgl_list_lock required because worker thread uses this |
da0436e9 JS |
1065 | * list. |
1066 | */ | |
895427bd | 1067 | spin_lock(&phba->sli4_hba.sgl_list_lock); |
0f65ff68 JS |
1068 | list_for_each_entry(sglq_entry, |
1069 | &phba->sli4_hba.lpfc_abts_els_sgl_list, list) | |
1070 | sglq_entry->state = SGL_FREED; | |
1071 | ||
da0436e9 | 1072 | list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list, |
895427bd JS |
1073 | &phba->sli4_hba.lpfc_els_sgl_list); |
1074 | ||
f358dd0c | 1075 | |
895427bd | 1076 | spin_unlock(&phba->sli4_hba.sgl_list_lock); |
5e5b511d JS |
1077 | |
1078 | /* abts_xxxx_buf_list_lock required because worker thread uses this | |
da0436e9 JS |
1079 | * list. |
1080 | */ | |
5e5b511d JS |
1081 | cnt = 0; |
1082 | for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { | |
1083 | qp = &phba->sli4_hba.hdwq[idx]; | |
da0436e9 | 1084 | |
5e5b511d JS |
1085 | spin_lock(&qp->abts_scsi_buf_list_lock); |
1086 | list_splice_init(&qp->lpfc_abts_scsi_buf_list, | |
1087 | &aborts); | |
68e814f5 | 1088 | |
0794d601 | 1089 | list_for_each_entry_safe(psb, psb_next, &aborts, list) { |
86c67379 JS |
1090 | psb->pCmd = NULL; |
1091 | psb->status = IOSTAT_SUCCESS; | |
cf1a1d3e | 1092 | cnt++; |
86c67379 | 1093 | } |
5e5b511d JS |
1094 | spin_lock(&qp->io_buf_list_put_lock); |
1095 | list_splice_init(&aborts, &qp->lpfc_io_buf_list_put); | |
1096 | qp->put_io_bufs += qp->abts_scsi_io_bufs; | |
1097 | qp->abts_scsi_io_bufs = 0; | |
1098 | spin_unlock(&qp->io_buf_list_put_lock); | |
1099 | spin_unlock(&qp->abts_scsi_buf_list_lock); | |
86c67379 | 1100 | |
5e5b511d JS |
1101 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { |
1102 | spin_lock(&qp->abts_nvme_buf_list_lock); | |
1103 | list_splice_init(&qp->lpfc_abts_nvme_buf_list, | |
1104 | &nvme_aborts); | |
1105 | list_for_each_entry_safe(psb, psb_next, &nvme_aborts, | |
1106 | list) { | |
1107 | psb->pCmd = NULL; | |
1108 | psb->status = IOSTAT_SUCCESS; | |
1109 | cnt++; | |
1110 | } | |
1111 | spin_lock(&qp->io_buf_list_put_lock); | |
1112 | qp->put_io_bufs += qp->abts_nvme_io_bufs; | |
1113 | qp->abts_nvme_io_bufs = 0; | |
1114 | list_splice_init(&nvme_aborts, | |
1115 | &qp->lpfc_io_buf_list_put); | |
1116 | spin_unlock(&qp->io_buf_list_put_lock); | |
1117 | spin_unlock(&qp->abts_nvme_buf_list_lock); | |
68e814f5 | 1118 | |
86c67379 | 1119 | } |
5e5b511d | 1120 | } |
731eedcb | 1121 | spin_unlock_irq(&phba->hbalock); |
86c67379 | 1122 | |
5e5b511d | 1123 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { |
731eedcb | 1124 | spin_lock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock); |
5e5b511d JS |
1125 | list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list, |
1126 | &nvmet_aborts); | |
731eedcb | 1127 | spin_unlock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock); |
86c67379 JS |
1128 | list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) { |
1129 | ctxp->flag &= ~(LPFC_NVMET_XBUSY | LPFC_NVMET_ABORT_OP); | |
6c621a22 | 1130 | lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf); |
86c67379 | 1131 | } |
895427bd | 1132 | } |
895427bd | 1133 | |
68e814f5 | 1134 | lpfc_sli4_free_sp_events(phba); |
5e5b511d | 1135 | return cnt; |
da0436e9 JS |
1136 | } |
1137 | ||
1138 | /** | |
1139 | * lpfc_hba_down_post - Wrapper func for hba down post routine | |
1140 | * @phba: pointer to lpfc HBA data structure. | |
1141 | * | |
1142 | * This routine wraps the actual SLI3 or SLI4 routine for performing | |
1143 | * uninitialization after the HBA is reset when bring down the SLI Layer. | |
1144 | * | |
1145 | * Return codes | |
af901ca1 | 1146 | * 0 - success. |
da0436e9 JS |
1147 | * Any other value - error. |
1148 | **/ | |
1149 | int | |
1150 | lpfc_hba_down_post(struct lpfc_hba *phba) | |
1151 | { | |
1152 | return (*phba->lpfc_hba_down_post)(phba); | |
1153 | } | |
41415862 | 1154 | |
e59058c4 | 1155 | /** |
3621a710 | 1156 | * lpfc_hb_timeout - The HBA-timer timeout handler |
e59058c4 JS |
1157 | * @ptr: unsigned long holds the pointer to lpfc hba data structure. |
1158 | * | |
1159 | * This is the HBA-timer timeout handler registered to the lpfc driver. When | |
1160 | * this timer fires, a HBA timeout event shall be posted to the lpfc driver | |
1161 | * work-port-events bitmap and the worker thread is notified. This timeout | |
1162 | * event will be used by the worker thread to invoke the actual timeout | |
1163 | * handler routine, lpfc_hb_timeout_handler. Any periodical operations will | |
1164 | * be performed in the timeout handler and the HBA timeout event bit shall | |
1165 | * be cleared by the worker thread after it has taken the event bitmap out. | |
1166 | **/ | |
a6ababd2 | 1167 | static void |
f22eb4d3 | 1168 | lpfc_hb_timeout(struct timer_list *t) |
858c9f6c JS |
1169 | { |
1170 | struct lpfc_hba *phba; | |
5e9d9b82 | 1171 | uint32_t tmo_posted; |
858c9f6c JS |
1172 | unsigned long iflag; |
1173 | ||
f22eb4d3 | 1174 | phba = from_timer(phba, t, hb_tmofunc); |
9399627f JS |
1175 | |
1176 | /* Check for heart beat timeout conditions */ | |
858c9f6c | 1177 | spin_lock_irqsave(&phba->pport->work_port_lock, iflag); |
5e9d9b82 JS |
1178 | tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO; |
1179 | if (!tmo_posted) | |
858c9f6c JS |
1180 | phba->pport->work_port_events |= WORKER_HB_TMO; |
1181 | spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag); | |
1182 | ||
9399627f | 1183 | /* Tell the worker thread there is work to do */ |
5e9d9b82 JS |
1184 | if (!tmo_posted) |
1185 | lpfc_worker_wake_up(phba); | |
858c9f6c JS |
1186 | return; |
1187 | } | |
1188 | ||
19ca7609 JS |
1189 | /** |
1190 | * lpfc_rrq_timeout - The RRQ-timer timeout handler | |
1191 | * @ptr: unsigned long holds the pointer to lpfc hba data structure. | |
1192 | * | |
1193 | * This is the RRQ-timer timeout handler registered to the lpfc driver. When | |
1194 | * this timer fires, a RRQ timeout event shall be posted to the lpfc driver | |
1195 | * work-port-events bitmap and the worker thread is notified. This timeout | |
1196 | * event will be used by the worker thread to invoke the actual timeout | |
1197 | * handler routine, lpfc_rrq_handler. Any periodical operations will | |
1198 | * be performed in the timeout handler and the RRQ timeout event bit shall | |
1199 | * be cleared by the worker thread after it has taken the event bitmap out. | |
1200 | **/ | |
1201 | static void | |
f22eb4d3 | 1202 | lpfc_rrq_timeout(struct timer_list *t) |
19ca7609 JS |
1203 | { |
1204 | struct lpfc_hba *phba; | |
19ca7609 JS |
1205 | unsigned long iflag; |
1206 | ||
f22eb4d3 | 1207 | phba = from_timer(phba, t, rrq_tmr); |
19ca7609 | 1208 | spin_lock_irqsave(&phba->pport->work_port_lock, iflag); |
06918ac5 JS |
1209 | if (!(phba->pport->load_flag & FC_UNLOADING)) |
1210 | phba->hba_flag |= HBA_RRQ_ACTIVE; | |
1211 | else | |
1212 | phba->hba_flag &= ~HBA_RRQ_ACTIVE; | |
19ca7609 | 1213 | spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag); |
06918ac5 JS |
1214 | |
1215 | if (!(phba->pport->load_flag & FC_UNLOADING)) | |
1216 | lpfc_worker_wake_up(phba); | |
19ca7609 JS |
1217 | } |
1218 | ||
e59058c4 | 1219 | /** |
3621a710 | 1220 | * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function |
e59058c4 JS |
1221 | * @phba: pointer to lpfc hba data structure. |
1222 | * @pmboxq: pointer to the driver internal queue element for mailbox command. | |
1223 | * | |
1224 | * This is the callback function to the lpfc heart-beat mailbox command. | |
1225 | * If configured, the lpfc driver issues the heart-beat mailbox command to | |
1226 | * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the | |
1227 | * heart-beat mailbox command is issued, the driver shall set up heart-beat | |
1228 | * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks | |
1229 | * heart-beat outstanding state. Once the mailbox command comes back and | |
1230 | * no error conditions detected, the heart-beat mailbox command timer is | |
1231 | * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding | |
1232 | * state is cleared for the next heart-beat. If the timer expired with the | |
1233 | * heart-beat outstanding state set, the driver will put the HBA offline. | |
1234 | **/ | |
858c9f6c JS |
1235 | static void |
1236 | lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq) | |
1237 | { | |
1238 | unsigned long drvr_flag; | |
1239 | ||
1240 | spin_lock_irqsave(&phba->hbalock, drvr_flag); | |
1241 | phba->hb_outstanding = 0; | |
1242 | spin_unlock_irqrestore(&phba->hbalock, drvr_flag); | |
1243 | ||
9399627f | 1244 | /* Check and reset heart-beat timer is necessary */ |
858c9f6c JS |
1245 | mempool_free(pmboxq, phba->mbox_mem_pool); |
1246 | if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) && | |
1247 | !(phba->link_state == LPFC_HBA_ERROR) && | |
51ef4c26 | 1248 | !(phba->pport->load_flag & FC_UNLOADING)) |
858c9f6c | 1249 | mod_timer(&phba->hb_tmofunc, |
256ec0d0 JS |
1250 | jiffies + |
1251 | msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL)); | |
858c9f6c JS |
1252 | return; |
1253 | } | |
1254 | ||
32517fc0 JS |
1255 | static void |
1256 | lpfc_hb_eq_delay_work(struct work_struct *work) | |
1257 | { | |
1258 | struct lpfc_hba *phba = container_of(to_delayed_work(work), | |
1259 | struct lpfc_hba, eq_delay_work); | |
1260 | struct lpfc_eq_intr_info *eqi, *eqi_new; | |
1261 | struct lpfc_queue *eq, *eq_next; | |
1262 | unsigned char *eqcnt = NULL; | |
1263 | uint32_t usdelay; | |
1264 | int i; | |
8d34a59c | 1265 | bool update = false; |
32517fc0 JS |
1266 | |
1267 | if (!phba->cfg_auto_imax || phba->pport->load_flag & FC_UNLOADING) | |
1268 | return; | |
1269 | ||
1270 | if (phba->link_state == LPFC_HBA_ERROR || | |
1271 | phba->pport->fc_flag & FC_OFFLINE_MODE) | |
1272 | goto requeue; | |
1273 | ||
1274 | eqcnt = kcalloc(num_possible_cpus(), sizeof(unsigned char), | |
1275 | GFP_KERNEL); | |
1276 | if (!eqcnt) | |
1277 | goto requeue; | |
1278 | ||
8d34a59c JS |
1279 | if (phba->cfg_irq_chann > 1) { |
1280 | /* Loop thru all IRQ vectors */ | |
1281 | for (i = 0; i < phba->cfg_irq_chann; i++) { | |
1282 | /* Get the EQ corresponding to the IRQ vector */ | |
1283 | eq = phba->sli4_hba.hba_eq_hdl[i].eq; | |
1284 | if (!eq) | |
1285 | continue; | |
1286 | if (eq->q_mode) { | |
1287 | update = true; | |
1288 | break; | |
1289 | } | |
1290 | if (eqcnt[eq->last_cpu] < 2) | |
1291 | eqcnt[eq->last_cpu]++; | |
1292 | } | |
1293 | } else | |
1294 | update = true; | |
32517fc0 JS |
1295 | |
1296 | for_each_present_cpu(i) { | |
32517fc0 | 1297 | eqi = per_cpu_ptr(phba->sli4_hba.eq_info, i); |
8d34a59c JS |
1298 | if (!update && eqcnt[i] < 2) { |
1299 | eqi->icnt = 0; | |
1300 | continue; | |
1301 | } | |
32517fc0 JS |
1302 | |
1303 | usdelay = (eqi->icnt / LPFC_IMAX_THRESHOLD) * | |
1304 | LPFC_EQ_DELAY_STEP; | |
1305 | if (usdelay > LPFC_MAX_AUTO_EQ_DELAY) | |
1306 | usdelay = LPFC_MAX_AUTO_EQ_DELAY; | |
1307 | ||
1308 | eqi->icnt = 0; | |
1309 | ||
1310 | list_for_each_entry_safe(eq, eq_next, &eqi->list, cpu_list) { | |
1311 | if (eq->last_cpu != i) { | |
1312 | eqi_new = per_cpu_ptr(phba->sli4_hba.eq_info, | |
1313 | eq->last_cpu); | |
1314 | list_move_tail(&eq->cpu_list, &eqi_new->list); | |
1315 | continue; | |
1316 | } | |
1317 | if (usdelay != eq->q_mode) | |
1318 | lpfc_modify_hba_eq_delay(phba, eq->hdwq, 1, | |
1319 | usdelay); | |
1320 | } | |
1321 | } | |
1322 | ||
1323 | kfree(eqcnt); | |
1324 | ||
1325 | requeue: | |
1326 | queue_delayed_work(phba->wq, &phba->eq_delay_work, | |
1327 | msecs_to_jiffies(LPFC_EQ_DELAY_MSECS)); | |
1328 | } | |
1329 | ||
c490850a JS |
1330 | /** |
1331 | * lpfc_hb_mxp_handler - Multi-XRI pools handler to adjust XRI distribution | |
1332 | * @phba: pointer to lpfc hba data structure. | |
1333 | * | |
1334 | * For each heartbeat, this routine does some heuristic methods to adjust | |
1335 | * XRI distribution. The goal is to fully utilize free XRIs. | |
1336 | **/ | |
1337 | static void lpfc_hb_mxp_handler(struct lpfc_hba *phba) | |
1338 | { | |
1339 | u32 i; | |
1340 | u32 hwq_count; | |
1341 | ||
1342 | hwq_count = phba->cfg_hdw_queue; | |
1343 | for (i = 0; i < hwq_count; i++) { | |
1344 | /* Adjust XRIs in private pool */ | |
1345 | lpfc_adjust_pvt_pool_count(phba, i); | |
1346 | ||
1347 | /* Adjust high watermark */ | |
1348 | lpfc_adjust_high_watermark(phba, i); | |
1349 | ||
1350 | #ifdef LPFC_MXP_STAT | |
1351 | /* Snapshot pbl, pvt and busy count */ | |
1352 | lpfc_snapshot_mxp(phba, i); | |
1353 | #endif | |
1354 | } | |
1355 | } | |
1356 | ||
e59058c4 | 1357 | /** |
3621a710 | 1358 | * lpfc_hb_timeout_handler - The HBA-timer timeout handler |
e59058c4 JS |
1359 | * @phba: pointer to lpfc hba data structure. |
1360 | * | |
1361 | * This is the actual HBA-timer timeout handler to be invoked by the worker | |
1362 | * thread whenever the HBA timer fired and HBA-timeout event posted. This | |
1363 | * handler performs any periodic operations needed for the device. If such | |
1364 | * periodic event has already been attended to either in the interrupt handler | |
1365 | * or by processing slow-ring or fast-ring events within the HBA-timer | |
1366 | * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets | |
1367 | * the timer for the next timeout period. If lpfc heart-beat mailbox command | |
1368 | * is configured and there is no heart-beat mailbox command outstanding, a | |
1369 | * heart-beat mailbox is issued and timer set properly. Otherwise, if there | |
1370 | * has been a heart-beat mailbox command outstanding, the HBA shall be put | |
1371 | * to offline. | |
1372 | **/ | |
858c9f6c JS |
1373 | void |
1374 | lpfc_hb_timeout_handler(struct lpfc_hba *phba) | |
1375 | { | |
45ed1190 | 1376 | struct lpfc_vport **vports; |
858c9f6c | 1377 | LPFC_MBOXQ_t *pmboxq; |
0ff10d46 | 1378 | struct lpfc_dmabuf *buf_ptr; |
45ed1190 | 1379 | int retval, i; |
858c9f6c | 1380 | struct lpfc_sli *psli = &phba->sli; |
0ff10d46 | 1381 | LIST_HEAD(completions); |
858c9f6c | 1382 | |
c490850a JS |
1383 | if (phba->cfg_xri_rebalancing) { |
1384 | /* Multi-XRI pools handler */ | |
1385 | lpfc_hb_mxp_handler(phba); | |
1386 | } | |
858c9f6c | 1387 | |
45ed1190 JS |
1388 | vports = lpfc_create_vport_work_array(phba); |
1389 | if (vports != NULL) | |
4258e98e | 1390 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { |
45ed1190 | 1391 | lpfc_rcv_seq_check_edtov(vports[i]); |
4258e98e JS |
1392 | lpfc_fdmi_num_disc_check(vports[i]); |
1393 | } | |
45ed1190 JS |
1394 | lpfc_destroy_vport_work_array(phba, vports); |
1395 | ||
858c9f6c | 1396 | if ((phba->link_state == LPFC_HBA_ERROR) || |
51ef4c26 | 1397 | (phba->pport->load_flag & FC_UNLOADING) || |
858c9f6c JS |
1398 | (phba->pport->fc_flag & FC_OFFLINE_MODE)) |
1399 | return; | |
1400 | ||
1401 | spin_lock_irq(&phba->pport->work_port_lock); | |
858c9f6c | 1402 | |
256ec0d0 JS |
1403 | if (time_after(phba->last_completion_time + |
1404 | msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL), | |
1405 | jiffies)) { | |
858c9f6c JS |
1406 | spin_unlock_irq(&phba->pport->work_port_lock); |
1407 | if (!phba->hb_outstanding) | |
1408 | mod_timer(&phba->hb_tmofunc, | |
256ec0d0 JS |
1409 | jiffies + |
1410 | msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL)); | |
858c9f6c JS |
1411 | else |
1412 | mod_timer(&phba->hb_tmofunc, | |
256ec0d0 JS |
1413 | jiffies + |
1414 | msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT)); | |
858c9f6c JS |
1415 | return; |
1416 | } | |
1417 | spin_unlock_irq(&phba->pport->work_port_lock); | |
1418 | ||
0ff10d46 JS |
1419 | if (phba->elsbuf_cnt && |
1420 | (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) { | |
1421 | spin_lock_irq(&phba->hbalock); | |
1422 | list_splice_init(&phba->elsbuf, &completions); | |
1423 | phba->elsbuf_cnt = 0; | |
1424 | phba->elsbuf_prev_cnt = 0; | |
1425 | spin_unlock_irq(&phba->hbalock); | |
1426 | ||
1427 | while (!list_empty(&completions)) { | |
1428 | list_remove_head(&completions, buf_ptr, | |
1429 | struct lpfc_dmabuf, list); | |
1430 | lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys); | |
1431 | kfree(buf_ptr); | |
1432 | } | |
1433 | } | |
1434 | phba->elsbuf_prev_cnt = phba->elsbuf_cnt; | |
1435 | ||
858c9f6c | 1436 | /* If there is no heart beat outstanding, issue a heartbeat command */ |
13815c83 JS |
1437 | if (phba->cfg_enable_hba_heartbeat) { |
1438 | if (!phba->hb_outstanding) { | |
bc73905a JS |
1439 | if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) && |
1440 | (list_empty(&psli->mboxq))) { | |
1441 | pmboxq = mempool_alloc(phba->mbox_mem_pool, | |
1442 | GFP_KERNEL); | |
1443 | if (!pmboxq) { | |
1444 | mod_timer(&phba->hb_tmofunc, | |
1445 | jiffies + | |
256ec0d0 JS |
1446 | msecs_to_jiffies(1000 * |
1447 | LPFC_HB_MBOX_INTERVAL)); | |
bc73905a JS |
1448 | return; |
1449 | } | |
1450 | ||
1451 | lpfc_heart_beat(phba, pmboxq); | |
1452 | pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl; | |
1453 | pmboxq->vport = phba->pport; | |
1454 | retval = lpfc_sli_issue_mbox(phba, pmboxq, | |
1455 | MBX_NOWAIT); | |
1456 | ||
1457 | if (retval != MBX_BUSY && | |
1458 | retval != MBX_SUCCESS) { | |
1459 | mempool_free(pmboxq, | |
1460 | phba->mbox_mem_pool); | |
1461 | mod_timer(&phba->hb_tmofunc, | |
1462 | jiffies + | |
256ec0d0 JS |
1463 | msecs_to_jiffies(1000 * |
1464 | LPFC_HB_MBOX_INTERVAL)); | |
bc73905a JS |
1465 | return; |
1466 | } | |
1467 | phba->skipped_hb = 0; | |
1468 | phba->hb_outstanding = 1; | |
1469 | } else if (time_before_eq(phba->last_completion_time, | |
1470 | phba->skipped_hb)) { | |
1471 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
1472 | "2857 Last completion time not " | |
1473 | " updated in %d ms\n", | |
1474 | jiffies_to_msecs(jiffies | |
1475 | - phba->last_completion_time)); | |
1476 | } else | |
1477 | phba->skipped_hb = jiffies; | |
1478 | ||
858c9f6c | 1479 | mod_timer(&phba->hb_tmofunc, |
256ec0d0 JS |
1480 | jiffies + |
1481 | msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT)); | |
858c9f6c | 1482 | return; |
13815c83 JS |
1483 | } else { |
1484 | /* | |
1485 | * If heart beat timeout called with hb_outstanding set | |
dcf2a4e0 JS |
1486 | * we need to give the hb mailbox cmd a chance to |
1487 | * complete or TMO. | |
13815c83 | 1488 | */ |
dcf2a4e0 JS |
1489 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, |
1490 | "0459 Adapter heartbeat still out" | |
1491 | "standing:last compl time was %d ms.\n", | |
1492 | jiffies_to_msecs(jiffies | |
1493 | - phba->last_completion_time)); | |
1494 | mod_timer(&phba->hb_tmofunc, | |
256ec0d0 JS |
1495 | jiffies + |
1496 | msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT)); | |
858c9f6c | 1497 | } |
4258e98e JS |
1498 | } else { |
1499 | mod_timer(&phba->hb_tmofunc, | |
1500 | jiffies + | |
1501 | msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL)); | |
858c9f6c JS |
1502 | } |
1503 | } | |
1504 | ||
e59058c4 | 1505 | /** |
3621a710 | 1506 | * lpfc_offline_eratt - Bring lpfc offline on hardware error attention |
e59058c4 JS |
1507 | * @phba: pointer to lpfc hba data structure. |
1508 | * | |
1509 | * This routine is called to bring the HBA offline when HBA hardware error | |
1510 | * other than Port Error 6 has been detected. | |
1511 | **/ | |
09372820 JS |
1512 | static void |
1513 | lpfc_offline_eratt(struct lpfc_hba *phba) | |
1514 | { | |
1515 | struct lpfc_sli *psli = &phba->sli; | |
1516 | ||
1517 | spin_lock_irq(&phba->hbalock); | |
f4b4c68f | 1518 | psli->sli_flag &= ~LPFC_SLI_ACTIVE; |
09372820 | 1519 | spin_unlock_irq(&phba->hbalock); |
618a5230 | 1520 | lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); |
09372820 JS |
1521 | |
1522 | lpfc_offline(phba); | |
1523 | lpfc_reset_barrier(phba); | |
f4b4c68f | 1524 | spin_lock_irq(&phba->hbalock); |
09372820 | 1525 | lpfc_sli_brdreset(phba); |
f4b4c68f | 1526 | spin_unlock_irq(&phba->hbalock); |
09372820 JS |
1527 | lpfc_hba_down_post(phba); |
1528 | lpfc_sli_brdready(phba, HS_MBRDY); | |
1529 | lpfc_unblock_mgmt_io(phba); | |
1530 | phba->link_state = LPFC_HBA_ERROR; | |
1531 | return; | |
1532 | } | |
1533 | ||
da0436e9 JS |
1534 | /** |
1535 | * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention | |
1536 | * @phba: pointer to lpfc hba data structure. | |
1537 | * | |
1538 | * This routine is called to bring a SLI4 HBA offline when HBA hardware error | |
1539 | * other than Port Error 6 has been detected. | |
1540 | **/ | |
a88dbb6a | 1541 | void |
da0436e9 JS |
1542 | lpfc_sli4_offline_eratt(struct lpfc_hba *phba) |
1543 | { | |
946727dc JS |
1544 | spin_lock_irq(&phba->hbalock); |
1545 | phba->link_state = LPFC_HBA_ERROR; | |
1546 | spin_unlock_irq(&phba->hbalock); | |
1547 | ||
618a5230 | 1548 | lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); |
84f2ddf8 JS |
1549 | lpfc_sli_flush_fcp_rings(phba); |
1550 | lpfc_sli_flush_nvme_rings(phba); | |
da0436e9 | 1551 | lpfc_offline(phba); |
da0436e9 | 1552 | lpfc_hba_down_post(phba); |
da0436e9 | 1553 | lpfc_unblock_mgmt_io(phba); |
da0436e9 JS |
1554 | } |
1555 | ||
a257bf90 JS |
1556 | /** |
1557 | * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler | |
1558 | * @phba: pointer to lpfc hba data structure. | |
1559 | * | |
1560 | * This routine is invoked to handle the deferred HBA hardware error | |
1561 | * conditions. This type of error is indicated by HBA by setting ER1 | |
1562 | * and another ER bit in the host status register. The driver will | |
1563 | * wait until the ER1 bit clears before handling the error condition. | |
1564 | **/ | |
1565 | static void | |
1566 | lpfc_handle_deferred_eratt(struct lpfc_hba *phba) | |
1567 | { | |
1568 | uint32_t old_host_status = phba->work_hs; | |
a257bf90 JS |
1569 | struct lpfc_sli *psli = &phba->sli; |
1570 | ||
f4b4c68f JS |
1571 | /* If the pci channel is offline, ignore possible errors, |
1572 | * since we cannot communicate with the pci card anyway. | |
1573 | */ | |
1574 | if (pci_channel_offline(phba->pcidev)) { | |
1575 | spin_lock_irq(&phba->hbalock); | |
1576 | phba->hba_flag &= ~DEFER_ERATT; | |
1577 | spin_unlock_irq(&phba->hbalock); | |
1578 | return; | |
1579 | } | |
1580 | ||
a257bf90 JS |
1581 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
1582 | "0479 Deferred Adapter Hardware Error " | |
1583 | "Data: x%x x%x x%x\n", | |
1584 | phba->work_hs, | |
1585 | phba->work_status[0], phba->work_status[1]); | |
1586 | ||
1587 | spin_lock_irq(&phba->hbalock); | |
f4b4c68f | 1588 | psli->sli_flag &= ~LPFC_SLI_ACTIVE; |
a257bf90 JS |
1589 | spin_unlock_irq(&phba->hbalock); |
1590 | ||
1591 | ||
1592 | /* | |
1593 | * Firmware stops when it triggred erratt. That could cause the I/Os | |
1594 | * dropped by the firmware. Error iocb (I/O) on txcmplq and let the | |
1595 | * SCSI layer retry it after re-establishing link. | |
1596 | */ | |
db55fba8 | 1597 | lpfc_sli_abort_fcp_rings(phba); |
a257bf90 JS |
1598 | |
1599 | /* | |
1600 | * There was a firmware error. Take the hba offline and then | |
1601 | * attempt to restart it. | |
1602 | */ | |
618a5230 | 1603 | lpfc_offline_prep(phba, LPFC_MBX_WAIT); |
a257bf90 JS |
1604 | lpfc_offline(phba); |
1605 | ||
1606 | /* Wait for the ER1 bit to clear.*/ | |
1607 | while (phba->work_hs & HS_FFER1) { | |
1608 | msleep(100); | |
9940b97b JS |
1609 | if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) { |
1610 | phba->work_hs = UNPLUG_ERR ; | |
1611 | break; | |
1612 | } | |
a257bf90 JS |
1613 | /* If driver is unloading let the worker thread continue */ |
1614 | if (phba->pport->load_flag & FC_UNLOADING) { | |
1615 | phba->work_hs = 0; | |
1616 | break; | |
1617 | } | |
1618 | } | |
1619 | ||
1620 | /* | |
1621 | * This is to ptrotect against a race condition in which | |
1622 | * first write to the host attention register clear the | |
1623 | * host status register. | |
1624 | */ | |
1625 | if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING))) | |
1626 | phba->work_hs = old_host_status & ~HS_FFER1; | |
1627 | ||
3772a991 | 1628 | spin_lock_irq(&phba->hbalock); |
a257bf90 | 1629 | phba->hba_flag &= ~DEFER_ERATT; |
3772a991 | 1630 | spin_unlock_irq(&phba->hbalock); |
a257bf90 JS |
1631 | phba->work_status[0] = readl(phba->MBslimaddr + 0xa8); |
1632 | phba->work_status[1] = readl(phba->MBslimaddr + 0xac); | |
1633 | } | |
1634 | ||
3772a991 JS |
1635 | static void |
1636 | lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba) | |
1637 | { | |
1638 | struct lpfc_board_event_header board_event; | |
1639 | struct Scsi_Host *shost; | |
1640 | ||
1641 | board_event.event_type = FC_REG_BOARD_EVENT; | |
1642 | board_event.subcategory = LPFC_EVENT_PORTINTERR; | |
1643 | shost = lpfc_shost_from_vport(phba->pport); | |
1644 | fc_host_post_vendor_event(shost, fc_get_event_number(), | |
1645 | sizeof(board_event), | |
1646 | (char *) &board_event, | |
1647 | LPFC_NL_VENDOR_ID); | |
1648 | } | |
1649 | ||
e59058c4 | 1650 | /** |
3772a991 | 1651 | * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler |
e59058c4 JS |
1652 | * @phba: pointer to lpfc hba data structure. |
1653 | * | |
1654 | * This routine is invoked to handle the following HBA hardware error | |
1655 | * conditions: | |
1656 | * 1 - HBA error attention interrupt | |
1657 | * 2 - DMA ring index out of range | |
1658 | * 3 - Mailbox command came back as unknown | |
1659 | **/ | |
3772a991 JS |
1660 | static void |
1661 | lpfc_handle_eratt_s3(struct lpfc_hba *phba) | |
dea3101e | 1662 | { |
2e0fef85 | 1663 | struct lpfc_vport *vport = phba->pport; |
2e0fef85 | 1664 | struct lpfc_sli *psli = &phba->sli; |
d2873e4c | 1665 | uint32_t event_data; |
57127f15 JS |
1666 | unsigned long temperature; |
1667 | struct temp_event temp_event_data; | |
92d7f7b0 | 1668 | struct Scsi_Host *shost; |
2e0fef85 | 1669 | |
8d63f375 | 1670 | /* If the pci channel is offline, ignore possible errors, |
3772a991 JS |
1671 | * since we cannot communicate with the pci card anyway. |
1672 | */ | |
1673 | if (pci_channel_offline(phba->pcidev)) { | |
1674 | spin_lock_irq(&phba->hbalock); | |
1675 | phba->hba_flag &= ~DEFER_ERATT; | |
1676 | spin_unlock_irq(&phba->hbalock); | |
8d63f375 | 1677 | return; |
3772a991 JS |
1678 | } |
1679 | ||
13815c83 JS |
1680 | /* If resets are disabled then leave the HBA alone and return */ |
1681 | if (!phba->cfg_enable_hba_reset) | |
1682 | return; | |
dea3101e | 1683 | |
ea2151b4 | 1684 | /* Send an internal error event to mgmt application */ |
3772a991 | 1685 | lpfc_board_errevt_to_mgmt(phba); |
ea2151b4 | 1686 | |
a257bf90 JS |
1687 | if (phba->hba_flag & DEFER_ERATT) |
1688 | lpfc_handle_deferred_eratt(phba); | |
1689 | ||
dcf2a4e0 JS |
1690 | if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) { |
1691 | if (phba->work_hs & HS_FFER6) | |
1692 | /* Re-establishing Link */ | |
1693 | lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT, | |
1694 | "1301 Re-establishing Link " | |
1695 | "Data: x%x x%x x%x\n", | |
1696 | phba->work_hs, phba->work_status[0], | |
1697 | phba->work_status[1]); | |
1698 | if (phba->work_hs & HS_FFER8) | |
1699 | /* Device Zeroization */ | |
1700 | lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT, | |
1701 | "2861 Host Authentication device " | |
1702 | "zeroization Data:x%x x%x x%x\n", | |
1703 | phba->work_hs, phba->work_status[0], | |
1704 | phba->work_status[1]); | |
58da1ffb | 1705 | |
92d7f7b0 | 1706 | spin_lock_irq(&phba->hbalock); |
f4b4c68f | 1707 | psli->sli_flag &= ~LPFC_SLI_ACTIVE; |
92d7f7b0 | 1708 | spin_unlock_irq(&phba->hbalock); |
dea3101e | 1709 | |
1710 | /* | |
1711 | * Firmware stops when it triggled erratt with HS_FFER6. | |
1712 | * That could cause the I/Os dropped by the firmware. | |
1713 | * Error iocb (I/O) on txcmplq and let the SCSI layer | |
1714 | * retry it after re-establishing link. | |
1715 | */ | |
db55fba8 | 1716 | lpfc_sli_abort_fcp_rings(phba); |
dea3101e | 1717 | |
dea3101e | 1718 | /* |
1719 | * There was a firmware error. Take the hba offline and then | |
1720 | * attempt to restart it. | |
1721 | */ | |
618a5230 | 1722 | lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); |
dea3101e | 1723 | lpfc_offline(phba); |
41415862 | 1724 | lpfc_sli_brdrestart(phba); |
dea3101e | 1725 | if (lpfc_online(phba) == 0) { /* Initialize the HBA */ |
46fa311e | 1726 | lpfc_unblock_mgmt_io(phba); |
dea3101e | 1727 | return; |
1728 | } | |
46fa311e | 1729 | lpfc_unblock_mgmt_io(phba); |
57127f15 JS |
1730 | } else if (phba->work_hs & HS_CRIT_TEMP) { |
1731 | temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET); | |
1732 | temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; | |
1733 | temp_event_data.event_code = LPFC_CRIT_TEMP; | |
1734 | temp_event_data.data = (uint32_t)temperature; | |
1735 | ||
1736 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
d7c255b2 | 1737 | "0406 Adapter maximum temperature exceeded " |
57127f15 JS |
1738 | "(%ld), taking this port offline " |
1739 | "Data: x%x x%x x%x\n", | |
1740 | temperature, phba->work_hs, | |
1741 | phba->work_status[0], phba->work_status[1]); | |
1742 | ||
1743 | shost = lpfc_shost_from_vport(phba->pport); | |
1744 | fc_host_post_vendor_event(shost, fc_get_event_number(), | |
1745 | sizeof(temp_event_data), | |
1746 | (char *) &temp_event_data, | |
1747 | SCSI_NL_VID_TYPE_PCI | |
1748 | | PCI_VENDOR_ID_EMULEX); | |
1749 | ||
7af67051 | 1750 | spin_lock_irq(&phba->hbalock); |
7af67051 JS |
1751 | phba->over_temp_state = HBA_OVER_TEMP; |
1752 | spin_unlock_irq(&phba->hbalock); | |
09372820 | 1753 | lpfc_offline_eratt(phba); |
57127f15 | 1754 | |
dea3101e | 1755 | } else { |
1756 | /* The if clause above forces this code path when the status | |
9399627f JS |
1757 | * failure is a value other than FFER6. Do not call the offline |
1758 | * twice. This is the adapter hardware error path. | |
dea3101e | 1759 | */ |
1760 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
e8b62011 | 1761 | "0457 Adapter Hardware Error " |
dea3101e | 1762 | "Data: x%x x%x x%x\n", |
e8b62011 | 1763 | phba->work_hs, |
dea3101e | 1764 | phba->work_status[0], phba->work_status[1]); |
1765 | ||
d2873e4c | 1766 | event_data = FC_REG_DUMP_EVENT; |
92d7f7b0 | 1767 | shost = lpfc_shost_from_vport(vport); |
2e0fef85 | 1768 | fc_host_post_vendor_event(shost, fc_get_event_number(), |
d2873e4c JS |
1769 | sizeof(event_data), (char *) &event_data, |
1770 | SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX); | |
1771 | ||
09372820 | 1772 | lpfc_offline_eratt(phba); |
dea3101e | 1773 | } |
9399627f | 1774 | return; |
dea3101e | 1775 | } |
1776 | ||
618a5230 JS |
1777 | /** |
1778 | * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg | |
1779 | * @phba: pointer to lpfc hba data structure. | |
1780 | * @mbx_action: flag for mailbox shutdown action. | |
1781 | * | |
1782 | * This routine is invoked to perform an SLI4 port PCI function reset in | |
1783 | * response to port status register polling attention. It waits for port | |
1784 | * status register (ERR, RDY, RN) bits before proceeding with function reset. | |
1785 | * During this process, interrupt vectors are freed and later requested | |
1786 | * for handling possible port resource change. | |
1787 | **/ | |
1788 | static int | |
e10b2022 JS |
1789 | lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action, |
1790 | bool en_rn_msg) | |
618a5230 JS |
1791 | { |
1792 | int rc; | |
1793 | uint32_t intr_mode; | |
1794 | ||
27d6ac0a | 1795 | if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >= |
65791f1f JS |
1796 | LPFC_SLI_INTF_IF_TYPE_2) { |
1797 | /* | |
1798 | * On error status condition, driver need to wait for port | |
1799 | * ready before performing reset. | |
1800 | */ | |
1801 | rc = lpfc_sli4_pdev_status_reg_wait(phba); | |
0e916ee7 | 1802 | if (rc) |
65791f1f JS |
1803 | return rc; |
1804 | } | |
0e916ee7 | 1805 | |
65791f1f JS |
1806 | /* need reset: attempt for port recovery */ |
1807 | if (en_rn_msg) | |
1808 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
1809 | "2887 Reset Needed: Attempting Port " | |
1810 | "Recovery...\n"); | |
1811 | lpfc_offline_prep(phba, mbx_action); | |
84f2ddf8 JS |
1812 | lpfc_sli_flush_fcp_rings(phba); |
1813 | lpfc_sli_flush_nvme_rings(phba); | |
65791f1f JS |
1814 | lpfc_offline(phba); |
1815 | /* release interrupt for possible resource change */ | |
1816 | lpfc_sli4_disable_intr(phba); | |
5a9eeff5 JS |
1817 | rc = lpfc_sli_brdrestart(phba); |
1818 | if (rc) { | |
1819 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
1820 | "6309 Failed to restart board\n"); | |
1821 | return rc; | |
1822 | } | |
65791f1f JS |
1823 | /* request and enable interrupt */ |
1824 | intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); | |
1825 | if (intr_mode == LPFC_INTR_ERROR) { | |
1826 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
1827 | "3175 Failed to enable interrupt\n"); | |
1828 | return -EIO; | |
618a5230 | 1829 | } |
65791f1f JS |
1830 | phba->intr_mode = intr_mode; |
1831 | rc = lpfc_online(phba); | |
1832 | if (rc == 0) | |
1833 | lpfc_unblock_mgmt_io(phba); | |
1834 | ||
618a5230 JS |
1835 | return rc; |
1836 | } | |
1837 | ||
da0436e9 JS |
1838 | /** |
1839 | * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler | |
1840 | * @phba: pointer to lpfc hba data structure. | |
1841 | * | |
1842 | * This routine is invoked to handle the SLI4 HBA hardware error attention | |
1843 | * conditions. | |
1844 | **/ | |
1845 | static void | |
1846 | lpfc_handle_eratt_s4(struct lpfc_hba *phba) | |
1847 | { | |
1848 | struct lpfc_vport *vport = phba->pport; | |
1849 | uint32_t event_data; | |
1850 | struct Scsi_Host *shost; | |
2fcee4bf | 1851 | uint32_t if_type; |
2e90f4b5 JS |
1852 | struct lpfc_register portstat_reg = {0}; |
1853 | uint32_t reg_err1, reg_err2; | |
1854 | uint32_t uerrlo_reg, uemasklo_reg; | |
65791f1f | 1855 | uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2; |
e10b2022 | 1856 | bool en_rn_msg = true; |
946727dc | 1857 | struct temp_event temp_event_data; |
65791f1f JS |
1858 | struct lpfc_register portsmphr_reg; |
1859 | int rc, i; | |
da0436e9 JS |
1860 | |
1861 | /* If the pci channel is offline, ignore possible errors, since | |
1862 | * we cannot communicate with the pci card anyway. | |
1863 | */ | |
32a93100 JS |
1864 | if (pci_channel_offline(phba->pcidev)) { |
1865 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
1866 | "3166 pci channel is offline\n"); | |
1867 | lpfc_sli4_offline_eratt(phba); | |
da0436e9 | 1868 | return; |
32a93100 | 1869 | } |
da0436e9 | 1870 | |
65791f1f | 1871 | memset(&portsmphr_reg, 0, sizeof(portsmphr_reg)); |
2fcee4bf JS |
1872 | if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); |
1873 | switch (if_type) { | |
1874 | case LPFC_SLI_INTF_IF_TYPE_0: | |
2e90f4b5 JS |
1875 | pci_rd_rc1 = lpfc_readl( |
1876 | phba->sli4_hba.u.if_type0.UERRLOregaddr, | |
1877 | &uerrlo_reg); | |
1878 | pci_rd_rc2 = lpfc_readl( | |
1879 | phba->sli4_hba.u.if_type0.UEMASKLOregaddr, | |
1880 | &uemasklo_reg); | |
1881 | /* consider PCI bus read error as pci_channel_offline */ | |
1882 | if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO) | |
1883 | return; | |
65791f1f JS |
1884 | if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) { |
1885 | lpfc_sli4_offline_eratt(phba); | |
1886 | return; | |
1887 | } | |
1888 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
1889 | "7623 Checking UE recoverable"); | |
1890 | ||
1891 | for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) { | |
1892 | if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr, | |
1893 | &portsmphr_reg.word0)) | |
1894 | continue; | |
1895 | ||
1896 | smphr_port_status = bf_get(lpfc_port_smphr_port_status, | |
1897 | &portsmphr_reg); | |
1898 | if ((smphr_port_status & LPFC_PORT_SEM_MASK) == | |
1899 | LPFC_PORT_SEM_UE_RECOVERABLE) | |
1900 | break; | |
1901 | /*Sleep for 1Sec, before checking SEMAPHORE */ | |
1902 | msleep(1000); | |
1903 | } | |
1904 | ||
1905 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
1906 | "4827 smphr_port_status x%x : Waited %dSec", | |
1907 | smphr_port_status, i); | |
1908 | ||
1909 | /* Recoverable UE, reset the HBA device */ | |
1910 | if ((smphr_port_status & LPFC_PORT_SEM_MASK) == | |
1911 | LPFC_PORT_SEM_UE_RECOVERABLE) { | |
1912 | for (i = 0; i < 20; i++) { | |
1913 | msleep(1000); | |
1914 | if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr, | |
1915 | &portsmphr_reg.word0) && | |
1916 | (LPFC_POST_STAGE_PORT_READY == | |
1917 | bf_get(lpfc_port_smphr_port_status, | |
1918 | &portsmphr_reg))) { | |
1919 | rc = lpfc_sli4_port_sta_fn_reset(phba, | |
1920 | LPFC_MBX_NO_WAIT, en_rn_msg); | |
1921 | if (rc == 0) | |
1922 | return; | |
1923 | lpfc_printf_log(phba, | |
1924 | KERN_ERR, LOG_INIT, | |
1925 | "4215 Failed to recover UE"); | |
1926 | break; | |
1927 | } | |
1928 | } | |
1929 | } | |
1930 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
1931 | "7624 Firmware not ready: Failing UE recovery," | |
1932 | " waited %dSec", i); | |
8c24a4f6 | 1933 | phba->link_state = LPFC_HBA_ERROR; |
2fcee4bf | 1934 | break; |
946727dc | 1935 | |
2fcee4bf | 1936 | case LPFC_SLI_INTF_IF_TYPE_2: |
27d6ac0a | 1937 | case LPFC_SLI_INTF_IF_TYPE_6: |
2e90f4b5 JS |
1938 | pci_rd_rc1 = lpfc_readl( |
1939 | phba->sli4_hba.u.if_type2.STATUSregaddr, | |
1940 | &portstat_reg.word0); | |
1941 | /* consider PCI bus read error as pci_channel_offline */ | |
6b5151fd JS |
1942 | if (pci_rd_rc1 == -EIO) { |
1943 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
1944 | "3151 PCI bus read access failure: x%x\n", | |
1945 | readl(phba->sli4_hba.u.if_type2.STATUSregaddr)); | |
32a93100 | 1946 | lpfc_sli4_offline_eratt(phba); |
2e90f4b5 | 1947 | return; |
6b5151fd | 1948 | } |
2e90f4b5 JS |
1949 | reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr); |
1950 | reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr); | |
2fcee4bf | 1951 | if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) { |
2fcee4bf JS |
1952 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
1953 | "2889 Port Overtemperature event, " | |
946727dc JS |
1954 | "taking port offline Data: x%x x%x\n", |
1955 | reg_err1, reg_err2); | |
1956 | ||
310429ef | 1957 | phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE; |
946727dc JS |
1958 | temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; |
1959 | temp_event_data.event_code = LPFC_CRIT_TEMP; | |
1960 | temp_event_data.data = 0xFFFFFFFF; | |
1961 | ||
1962 | shost = lpfc_shost_from_vport(phba->pport); | |
1963 | fc_host_post_vendor_event(shost, fc_get_event_number(), | |
1964 | sizeof(temp_event_data), | |
1965 | (char *)&temp_event_data, | |
1966 | SCSI_NL_VID_TYPE_PCI | |
1967 | | PCI_VENDOR_ID_EMULEX); | |
1968 | ||
2fcee4bf JS |
1969 | spin_lock_irq(&phba->hbalock); |
1970 | phba->over_temp_state = HBA_OVER_TEMP; | |
1971 | spin_unlock_irq(&phba->hbalock); | |
1972 | lpfc_sli4_offline_eratt(phba); | |
946727dc | 1973 | return; |
2fcee4bf | 1974 | } |
2e90f4b5 | 1975 | if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && |
e10b2022 | 1976 | reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) { |
2e90f4b5 | 1977 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
e10b2022 JS |
1978 | "3143 Port Down: Firmware Update " |
1979 | "Detected\n"); | |
1980 | en_rn_msg = false; | |
1981 | } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && | |
2e90f4b5 JS |
1982 | reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP) |
1983 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
1984 | "3144 Port Down: Debug Dump\n"); | |
1985 | else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && | |
1986 | reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON) | |
1987 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
1988 | "3145 Port Down: Provisioning\n"); | |
618a5230 | 1989 | |
946727dc JS |
1990 | /* If resets are disabled then leave the HBA alone and return */ |
1991 | if (!phba->cfg_enable_hba_reset) | |
1992 | return; | |
1993 | ||
618a5230 | 1994 | /* Check port status register for function reset */ |
e10b2022 JS |
1995 | rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT, |
1996 | en_rn_msg); | |
618a5230 JS |
1997 | if (rc == 0) { |
1998 | /* don't report event on forced debug dump */ | |
1999 | if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && | |
2000 | reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP) | |
2001 | return; | |
2002 | else | |
2003 | break; | |
2fcee4bf | 2004 | } |
618a5230 | 2005 | /* fall through for not able to recover */ |
6b5151fd | 2006 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
8c24a4f6 JS |
2007 | "3152 Unrecoverable error\n"); |
2008 | phba->link_state = LPFC_HBA_ERROR; | |
2fcee4bf JS |
2009 | break; |
2010 | case LPFC_SLI_INTF_IF_TYPE_1: | |
2011 | default: | |
2012 | break; | |
2013 | } | |
2e90f4b5 JS |
2014 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, |
2015 | "3123 Report dump event to upper layer\n"); | |
2016 | /* Send an internal error event to mgmt application */ | |
2017 | lpfc_board_errevt_to_mgmt(phba); | |
2018 | ||
2019 | event_data = FC_REG_DUMP_EVENT; | |
2020 | shost = lpfc_shost_from_vport(vport); | |
2021 | fc_host_post_vendor_event(shost, fc_get_event_number(), | |
2022 | sizeof(event_data), (char *) &event_data, | |
2023 | SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX); | |
da0436e9 JS |
2024 | } |
2025 | ||
2026 | /** | |
2027 | * lpfc_handle_eratt - Wrapper func for handling hba error attention | |
2028 | * @phba: pointer to lpfc HBA data structure. | |
2029 | * | |
2030 | * This routine wraps the actual SLI3 or SLI4 hba error attention handling | |
2031 | * routine from the API jump table function pointer from the lpfc_hba struct. | |
2032 | * | |
2033 | * Return codes | |
af901ca1 | 2034 | * 0 - success. |
da0436e9 JS |
2035 | * Any other value - error. |
2036 | **/ | |
2037 | void | |
2038 | lpfc_handle_eratt(struct lpfc_hba *phba) | |
2039 | { | |
2040 | (*phba->lpfc_handle_eratt)(phba); | |
2041 | } | |
2042 | ||
e59058c4 | 2043 | /** |
3621a710 | 2044 | * lpfc_handle_latt - The HBA link event handler |
e59058c4 JS |
2045 | * @phba: pointer to lpfc hba data structure. |
2046 | * | |
2047 | * This routine is invoked from the worker thread to handle a HBA host | |
895427bd | 2048 | * attention link event. SLI3 only. |
e59058c4 | 2049 | **/ |
dea3101e | 2050 | void |
2e0fef85 | 2051 | lpfc_handle_latt(struct lpfc_hba *phba) |
dea3101e | 2052 | { |
2e0fef85 JS |
2053 | struct lpfc_vport *vport = phba->pport; |
2054 | struct lpfc_sli *psli = &phba->sli; | |
dea3101e | 2055 | LPFC_MBOXQ_t *pmb; |
2056 | volatile uint32_t control; | |
2057 | struct lpfc_dmabuf *mp; | |
09372820 | 2058 | int rc = 0; |
dea3101e | 2059 | |
2060 | pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); | |
09372820 JS |
2061 | if (!pmb) { |
2062 | rc = 1; | |
dea3101e | 2063 | goto lpfc_handle_latt_err_exit; |
09372820 | 2064 | } |
dea3101e | 2065 | |
2066 | mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); | |
09372820 JS |
2067 | if (!mp) { |
2068 | rc = 2; | |
dea3101e | 2069 | goto lpfc_handle_latt_free_pmb; |
09372820 | 2070 | } |
dea3101e | 2071 | |
2072 | mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys); | |
09372820 JS |
2073 | if (!mp->virt) { |
2074 | rc = 3; | |
dea3101e | 2075 | goto lpfc_handle_latt_free_mp; |
09372820 | 2076 | } |
dea3101e | 2077 | |
6281bfe0 | 2078 | /* Cleanup any outstanding ELS commands */ |
549e55cd | 2079 | lpfc_els_flush_all_cmd(phba); |
dea3101e | 2080 | |
2081 | psli->slistat.link_event++; | |
76a95d75 JS |
2082 | lpfc_read_topology(phba, pmb, mp); |
2083 | pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; | |
2e0fef85 | 2084 | pmb->vport = vport; |
0d2b6b83 | 2085 | /* Block ELS IOCBs until we have processed this mbox command */ |
895427bd | 2086 | phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT; |
0b727fea | 2087 | rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT); |
09372820 JS |
2088 | if (rc == MBX_NOT_FINISHED) { |
2089 | rc = 4; | |
14691150 | 2090 | goto lpfc_handle_latt_free_mbuf; |
09372820 | 2091 | } |
dea3101e | 2092 | |
2093 | /* Clear Link Attention in HA REG */ | |
2e0fef85 | 2094 | spin_lock_irq(&phba->hbalock); |
dea3101e | 2095 | writel(HA_LATT, phba->HAregaddr); |
2096 | readl(phba->HAregaddr); /* flush */ | |
2e0fef85 | 2097 | spin_unlock_irq(&phba->hbalock); |
dea3101e | 2098 | |
2099 | return; | |
2100 | ||
14691150 | 2101 | lpfc_handle_latt_free_mbuf: |
895427bd | 2102 | phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT; |
14691150 | 2103 | lpfc_mbuf_free(phba, mp->virt, mp->phys); |
dea3101e | 2104 | lpfc_handle_latt_free_mp: |
2105 | kfree(mp); | |
2106 | lpfc_handle_latt_free_pmb: | |
1dcb58e5 | 2107 | mempool_free(pmb, phba->mbox_mem_pool); |
dea3101e | 2108 | lpfc_handle_latt_err_exit: |
2109 | /* Enable Link attention interrupts */ | |
2e0fef85 | 2110 | spin_lock_irq(&phba->hbalock); |
dea3101e | 2111 | psli->sli_flag |= LPFC_PROCESS_LA; |
2112 | control = readl(phba->HCregaddr); | |
2113 | control |= HC_LAINT_ENA; | |
2114 | writel(control, phba->HCregaddr); | |
2115 | readl(phba->HCregaddr); /* flush */ | |
2116 | ||
2117 | /* Clear Link Attention in HA REG */ | |
2118 | writel(HA_LATT, phba->HAregaddr); | |
2119 | readl(phba->HAregaddr); /* flush */ | |
2e0fef85 | 2120 | spin_unlock_irq(&phba->hbalock); |
dea3101e | 2121 | lpfc_linkdown(phba); |
2e0fef85 | 2122 | phba->link_state = LPFC_HBA_ERROR; |
dea3101e | 2123 | |
09372820 JS |
2124 | lpfc_printf_log(phba, KERN_ERR, LOG_MBOX, |
2125 | "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc); | |
dea3101e | 2126 | |
2127 | return; | |
2128 | } | |
2129 | ||
e59058c4 | 2130 | /** |
3621a710 | 2131 | * lpfc_parse_vpd - Parse VPD (Vital Product Data) |
e59058c4 JS |
2132 | * @phba: pointer to lpfc hba data structure. |
2133 | * @vpd: pointer to the vital product data. | |
2134 | * @len: length of the vital product data in bytes. | |
2135 | * | |
2136 | * This routine parses the Vital Product Data (VPD). The VPD is treated as | |
2137 | * an array of characters. In this routine, the ModelName, ProgramType, and | |
2138 | * ModelDesc, etc. fields of the phba data structure will be populated. | |
2139 | * | |
2140 | * Return codes | |
2141 | * 0 - pointer to the VPD passed in is NULL | |
2142 | * 1 - success | |
2143 | **/ | |
3772a991 | 2144 | int |
2e0fef85 | 2145 | lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len) |
dea3101e | 2146 | { |
2147 | uint8_t lenlo, lenhi; | |
07da60c1 | 2148 | int Length; |
dea3101e | 2149 | int i, j; |
2150 | int finished = 0; | |
2151 | int index = 0; | |
2152 | ||
2153 | if (!vpd) | |
2154 | return 0; | |
2155 | ||
2156 | /* Vital Product */ | |
ed957684 | 2157 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
e8b62011 | 2158 | "0455 Vital Product Data: x%x x%x x%x x%x\n", |
dea3101e | 2159 | (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2], |
2160 | (uint32_t) vpd[3]); | |
74b72a59 | 2161 | while (!finished && (index < (len - 4))) { |
dea3101e | 2162 | switch (vpd[index]) { |
2163 | case 0x82: | |
74b72a59 | 2164 | case 0x91: |
dea3101e | 2165 | index += 1; |
2166 | lenlo = vpd[index]; | |
2167 | index += 1; | |
2168 | lenhi = vpd[index]; | |
2169 | index += 1; | |
2170 | i = ((((unsigned short)lenhi) << 8) + lenlo); | |
2171 | index += i; | |
2172 | break; | |
2173 | case 0x90: | |
2174 | index += 1; | |
2175 | lenlo = vpd[index]; | |
2176 | index += 1; | |
2177 | lenhi = vpd[index]; | |
2178 | index += 1; | |
2179 | Length = ((((unsigned short)lenhi) << 8) + lenlo); | |
74b72a59 JW |
2180 | if (Length > len - index) |
2181 | Length = len - index; | |
dea3101e | 2182 | while (Length > 0) { |
2183 | /* Look for Serial Number */ | |
2184 | if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) { | |
2185 | index += 2; | |
2186 | i = vpd[index]; | |
2187 | index += 1; | |
2188 | j = 0; | |
2189 | Length -= (3+i); | |
2190 | while(i--) { | |
2191 | phba->SerialNumber[j++] = vpd[index++]; | |
2192 | if (j == 31) | |
2193 | break; | |
2194 | } | |
2195 | phba->SerialNumber[j] = 0; | |
2196 | continue; | |
2197 | } | |
2198 | else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) { | |
2199 | phba->vpd_flag |= VPD_MODEL_DESC; | |
2200 | index += 2; | |
2201 | i = vpd[index]; | |
2202 | index += 1; | |
2203 | j = 0; | |
2204 | Length -= (3+i); | |
2205 | while(i--) { | |
2206 | phba->ModelDesc[j++] = vpd[index++]; | |
2207 | if (j == 255) | |
2208 | break; | |
2209 | } | |
2210 | phba->ModelDesc[j] = 0; | |
2211 | continue; | |
2212 | } | |
2213 | else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) { | |
2214 | phba->vpd_flag |= VPD_MODEL_NAME; | |
2215 | index += 2; | |
2216 | i = vpd[index]; | |
2217 | index += 1; | |
2218 | j = 0; | |
2219 | Length -= (3+i); | |
2220 | while(i--) { | |
2221 | phba->ModelName[j++] = vpd[index++]; | |
2222 | if (j == 79) | |
2223 | break; | |
2224 | } | |
2225 | phba->ModelName[j] = 0; | |
2226 | continue; | |
2227 | } | |
2228 | else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) { | |
2229 | phba->vpd_flag |= VPD_PROGRAM_TYPE; | |
2230 | index += 2; | |
2231 | i = vpd[index]; | |
2232 | index += 1; | |
2233 | j = 0; | |
2234 | Length -= (3+i); | |
2235 | while(i--) { | |
2236 | phba->ProgramType[j++] = vpd[index++]; | |
2237 | if (j == 255) | |
2238 | break; | |
2239 | } | |
2240 | phba->ProgramType[j] = 0; | |
2241 | continue; | |
2242 | } | |
2243 | else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) { | |
2244 | phba->vpd_flag |= VPD_PORT; | |
2245 | index += 2; | |
2246 | i = vpd[index]; | |
2247 | index += 1; | |
2248 | j = 0; | |
2249 | Length -= (3+i); | |
2250 | while(i--) { | |
cd1c8301 JS |
2251 | if ((phba->sli_rev == LPFC_SLI_REV4) && |
2252 | (phba->sli4_hba.pport_name_sta == | |
2253 | LPFC_SLI4_PPNAME_GET)) { | |
2254 | j++; | |
2255 | index++; | |
2256 | } else | |
2257 | phba->Port[j++] = vpd[index++]; | |
2258 | if (j == 19) | |
2259 | break; | |
dea3101e | 2260 | } |
cd1c8301 JS |
2261 | if ((phba->sli_rev != LPFC_SLI_REV4) || |
2262 | (phba->sli4_hba.pport_name_sta == | |
2263 | LPFC_SLI4_PPNAME_NON)) | |
2264 | phba->Port[j] = 0; | |
dea3101e | 2265 | continue; |
2266 | } | |
2267 | else { | |
2268 | index += 2; | |
2269 | i = vpd[index]; | |
2270 | index += 1; | |
2271 | index += i; | |
2272 | Length -= (3 + i); | |
2273 | } | |
2274 | } | |
2275 | finished = 0; | |
2276 | break; | |
2277 | case 0x78: | |
2278 | finished = 1; | |
2279 | break; | |
2280 | default: | |
2281 | index ++; | |
2282 | break; | |
2283 | } | |
74b72a59 | 2284 | } |
dea3101e | 2285 | |
2286 | return(1); | |
2287 | } | |
2288 | ||
e59058c4 | 2289 | /** |
3621a710 | 2290 | * lpfc_get_hba_model_desc - Retrieve HBA device model name and description |
e59058c4 JS |
2291 | * @phba: pointer to lpfc hba data structure. |
2292 | * @mdp: pointer to the data structure to hold the derived model name. | |
2293 | * @descp: pointer to the data structure to hold the derived description. | |
2294 | * | |
2295 | * This routine retrieves HBA's description based on its registered PCI device | |
2296 | * ID. The @descp passed into this function points to an array of 256 chars. It | |
2297 | * shall be returned with the model name, maximum speed, and the host bus type. | |
2298 | * The @mdp passed into this function points to an array of 80 chars. When the | |
2299 | * function returns, the @mdp will be filled with the model name. | |
2300 | **/ | |
dea3101e | 2301 | static void |
2e0fef85 | 2302 | lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp) |
dea3101e | 2303 | { |
2304 | lpfc_vpd_t *vp; | |
fefcb2b6 | 2305 | uint16_t dev_id = phba->pcidev->device; |
74b72a59 | 2306 | int max_speed; |
84774a4d | 2307 | int GE = 0; |
da0436e9 | 2308 | int oneConnect = 0; /* default is not a oneConnect */ |
74b72a59 | 2309 | struct { |
a747c9ce JS |
2310 | char *name; |
2311 | char *bus; | |
2312 | char *function; | |
2313 | } m = {"<Unknown>", "", ""}; | |
74b72a59 JW |
2314 | |
2315 | if (mdp && mdp[0] != '\0' | |
2316 | && descp && descp[0] != '\0') | |
2317 | return; | |
2318 | ||
fbd8a6ba JS |
2319 | if (phba->lmt & LMT_64Gb) |
2320 | max_speed = 64; | |
2321 | else if (phba->lmt & LMT_32Gb) | |
d38dd52c JS |
2322 | max_speed = 32; |
2323 | else if (phba->lmt & LMT_16Gb) | |
c0c11512 JS |
2324 | max_speed = 16; |
2325 | else if (phba->lmt & LMT_10Gb) | |
74b72a59 JW |
2326 | max_speed = 10; |
2327 | else if (phba->lmt & LMT_8Gb) | |
2328 | max_speed = 8; | |
2329 | else if (phba->lmt & LMT_4Gb) | |
2330 | max_speed = 4; | |
2331 | else if (phba->lmt & LMT_2Gb) | |
2332 | max_speed = 2; | |
4169d868 | 2333 | else if (phba->lmt & LMT_1Gb) |
74b72a59 | 2334 | max_speed = 1; |
4169d868 JS |
2335 | else |
2336 | max_speed = 0; | |
dea3101e | 2337 | |
2338 | vp = &phba->vpd; | |
dea3101e | 2339 | |
e4adb204 | 2340 | switch (dev_id) { |
06325e74 | 2341 | case PCI_DEVICE_ID_FIREFLY: |
12222f4f JS |
2342 | m = (typeof(m)){"LP6000", "PCI", |
2343 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
06325e74 | 2344 | break; |
dea3101e | 2345 | case PCI_DEVICE_ID_SUPERFLY: |
2346 | if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3) | |
12222f4f | 2347 | m = (typeof(m)){"LP7000", "PCI", ""}; |
dea3101e | 2348 | else |
12222f4f JS |
2349 | m = (typeof(m)){"LP7000E", "PCI", ""}; |
2350 | m.function = "Obsolete, Unsupported Fibre Channel Adapter"; | |
dea3101e | 2351 | break; |
2352 | case PCI_DEVICE_ID_DRAGONFLY: | |
a747c9ce | 2353 | m = (typeof(m)){"LP8000", "PCI", |
12222f4f | 2354 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
dea3101e | 2355 | break; |
2356 | case PCI_DEVICE_ID_CENTAUR: | |
2357 | if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID) | |
12222f4f | 2358 | m = (typeof(m)){"LP9002", "PCI", ""}; |
dea3101e | 2359 | else |
12222f4f JS |
2360 | m = (typeof(m)){"LP9000", "PCI", ""}; |
2361 | m.function = "Obsolete, Unsupported Fibre Channel Adapter"; | |
dea3101e | 2362 | break; |
2363 | case PCI_DEVICE_ID_RFLY: | |
a747c9ce | 2364 | m = (typeof(m)){"LP952", "PCI", |
12222f4f | 2365 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
dea3101e | 2366 | break; |
2367 | case PCI_DEVICE_ID_PEGASUS: | |
a747c9ce | 2368 | m = (typeof(m)){"LP9802", "PCI-X", |
12222f4f | 2369 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
dea3101e | 2370 | break; |
2371 | case PCI_DEVICE_ID_THOR: | |
a747c9ce | 2372 | m = (typeof(m)){"LP10000", "PCI-X", |
12222f4f | 2373 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
dea3101e | 2374 | break; |
2375 | case PCI_DEVICE_ID_VIPER: | |
a747c9ce | 2376 | m = (typeof(m)){"LPX1000", "PCI-X", |
12222f4f | 2377 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
dea3101e | 2378 | break; |
2379 | case PCI_DEVICE_ID_PFLY: | |
a747c9ce | 2380 | m = (typeof(m)){"LP982", "PCI-X", |
12222f4f | 2381 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
dea3101e | 2382 | break; |
2383 | case PCI_DEVICE_ID_TFLY: | |
a747c9ce | 2384 | m = (typeof(m)){"LP1050", "PCI-X", |
12222f4f | 2385 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
dea3101e | 2386 | break; |
2387 | case PCI_DEVICE_ID_HELIOS: | |
a747c9ce | 2388 | m = (typeof(m)){"LP11000", "PCI-X2", |
12222f4f | 2389 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
dea3101e | 2390 | break; |
e4adb204 | 2391 | case PCI_DEVICE_ID_HELIOS_SCSP: |
a747c9ce | 2392 | m = (typeof(m)){"LP11000-SP", "PCI-X2", |
12222f4f | 2393 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
e4adb204 JSEC |
2394 | break; |
2395 | case PCI_DEVICE_ID_HELIOS_DCSP: | |
a747c9ce | 2396 | m = (typeof(m)){"LP11002-SP", "PCI-X2", |
12222f4f | 2397 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
e4adb204 JSEC |
2398 | break; |
2399 | case PCI_DEVICE_ID_NEPTUNE: | |
12222f4f JS |
2400 | m = (typeof(m)){"LPe1000", "PCIe", |
2401 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
e4adb204 JSEC |
2402 | break; |
2403 | case PCI_DEVICE_ID_NEPTUNE_SCSP: | |
12222f4f JS |
2404 | m = (typeof(m)){"LPe1000-SP", "PCIe", |
2405 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
e4adb204 JSEC |
2406 | break; |
2407 | case PCI_DEVICE_ID_NEPTUNE_DCSP: | |
12222f4f JS |
2408 | m = (typeof(m)){"LPe1002-SP", "PCIe", |
2409 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
e4adb204 | 2410 | break; |
dea3101e | 2411 | case PCI_DEVICE_ID_BMID: |
a747c9ce | 2412 | m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"}; |
dea3101e | 2413 | break; |
2414 | case PCI_DEVICE_ID_BSMB: | |
12222f4f JS |
2415 | m = (typeof(m)){"LP111", "PCI-X2", |
2416 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
dea3101e | 2417 | break; |
2418 | case PCI_DEVICE_ID_ZEPHYR: | |
a747c9ce | 2419 | m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"}; |
dea3101e | 2420 | break; |
e4adb204 | 2421 | case PCI_DEVICE_ID_ZEPHYR_SCSP: |
a747c9ce | 2422 | m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"}; |
e4adb204 JSEC |
2423 | break; |
2424 | case PCI_DEVICE_ID_ZEPHYR_DCSP: | |
a747c9ce | 2425 | m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"}; |
a257bf90 | 2426 | GE = 1; |
e4adb204 | 2427 | break; |
dea3101e | 2428 | case PCI_DEVICE_ID_ZMID: |
a747c9ce | 2429 | m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"}; |
dea3101e | 2430 | break; |
2431 | case PCI_DEVICE_ID_ZSMB: | |
a747c9ce | 2432 | m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"}; |
dea3101e | 2433 | break; |
2434 | case PCI_DEVICE_ID_LP101: | |
12222f4f JS |
2435 | m = (typeof(m)){"LP101", "PCI-X", |
2436 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
dea3101e | 2437 | break; |
2438 | case PCI_DEVICE_ID_LP10000S: | |
12222f4f JS |
2439 | m = (typeof(m)){"LP10000-S", "PCI", |
2440 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
06325e74 | 2441 | break; |
e4adb204 | 2442 | case PCI_DEVICE_ID_LP11000S: |
12222f4f JS |
2443 | m = (typeof(m)){"LP11000-S", "PCI-X2", |
2444 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
18a3b596 | 2445 | break; |
e4adb204 | 2446 | case PCI_DEVICE_ID_LPE11000S: |
12222f4f JS |
2447 | m = (typeof(m)){"LPe11000-S", "PCIe", |
2448 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
5cc36b3c | 2449 | break; |
b87eab38 | 2450 | case PCI_DEVICE_ID_SAT: |
a747c9ce | 2451 | m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"}; |
b87eab38 JS |
2452 | break; |
2453 | case PCI_DEVICE_ID_SAT_MID: | |
a747c9ce | 2454 | m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"}; |
b87eab38 JS |
2455 | break; |
2456 | case PCI_DEVICE_ID_SAT_SMB: | |
a747c9ce | 2457 | m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"}; |
b87eab38 JS |
2458 | break; |
2459 | case PCI_DEVICE_ID_SAT_DCSP: | |
a747c9ce | 2460 | m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"}; |
b87eab38 JS |
2461 | break; |
2462 | case PCI_DEVICE_ID_SAT_SCSP: | |
a747c9ce | 2463 | m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"}; |
b87eab38 JS |
2464 | break; |
2465 | case PCI_DEVICE_ID_SAT_S: | |
a747c9ce | 2466 | m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"}; |
b87eab38 | 2467 | break; |
84774a4d | 2468 | case PCI_DEVICE_ID_HORNET: |
12222f4f JS |
2469 | m = (typeof(m)){"LP21000", "PCIe", |
2470 | "Obsolete, Unsupported FCoE Adapter"}; | |
84774a4d JS |
2471 | GE = 1; |
2472 | break; | |
2473 | case PCI_DEVICE_ID_PROTEUS_VF: | |
a747c9ce | 2474 | m = (typeof(m)){"LPev12000", "PCIe IOV", |
12222f4f | 2475 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
84774a4d JS |
2476 | break; |
2477 | case PCI_DEVICE_ID_PROTEUS_PF: | |
a747c9ce | 2478 | m = (typeof(m)){"LPev12000", "PCIe IOV", |
12222f4f | 2479 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
84774a4d JS |
2480 | break; |
2481 | case PCI_DEVICE_ID_PROTEUS_S: | |
a747c9ce | 2482 | m = (typeof(m)){"LPemv12002-S", "PCIe IOV", |
12222f4f | 2483 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
84774a4d | 2484 | break; |
da0436e9 JS |
2485 | case PCI_DEVICE_ID_TIGERSHARK: |
2486 | oneConnect = 1; | |
a747c9ce | 2487 | m = (typeof(m)){"OCe10100", "PCIe", "FCoE"}; |
da0436e9 | 2488 | break; |
a747c9ce | 2489 | case PCI_DEVICE_ID_TOMCAT: |
6669f9bb | 2490 | oneConnect = 1; |
a747c9ce JS |
2491 | m = (typeof(m)){"OCe11100", "PCIe", "FCoE"}; |
2492 | break; | |
2493 | case PCI_DEVICE_ID_FALCON: | |
2494 | m = (typeof(m)){"LPSe12002-ML1-E", "PCIe", | |
2495 | "EmulexSecure Fibre"}; | |
6669f9bb | 2496 | break; |
98fc5dd9 JS |
2497 | case PCI_DEVICE_ID_BALIUS: |
2498 | m = (typeof(m)){"LPVe12002", "PCIe Shared I/O", | |
12222f4f | 2499 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
98fc5dd9 | 2500 | break; |
085c647c | 2501 | case PCI_DEVICE_ID_LANCER_FC: |
c0c11512 | 2502 | m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"}; |
085c647c | 2503 | break; |
12222f4f JS |
2504 | case PCI_DEVICE_ID_LANCER_FC_VF: |
2505 | m = (typeof(m)){"LPe16000", "PCIe", | |
2506 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
2507 | break; | |
085c647c JS |
2508 | case PCI_DEVICE_ID_LANCER_FCOE: |
2509 | oneConnect = 1; | |
079b5c91 | 2510 | m = (typeof(m)){"OCe15100", "PCIe", "FCoE"}; |
085c647c | 2511 | break; |
12222f4f JS |
2512 | case PCI_DEVICE_ID_LANCER_FCOE_VF: |
2513 | oneConnect = 1; | |
2514 | m = (typeof(m)){"OCe15100", "PCIe", | |
2515 | "Obsolete, Unsupported FCoE"}; | |
2516 | break; | |
d38dd52c JS |
2517 | case PCI_DEVICE_ID_LANCER_G6_FC: |
2518 | m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"}; | |
2519 | break; | |
c238b9b6 JS |
2520 | case PCI_DEVICE_ID_LANCER_G7_FC: |
2521 | m = (typeof(m)){"LPe36000", "PCIe", "Fibre Channel Adapter"}; | |
2522 | break; | |
f8cafd38 JS |
2523 | case PCI_DEVICE_ID_SKYHAWK: |
2524 | case PCI_DEVICE_ID_SKYHAWK_VF: | |
2525 | oneConnect = 1; | |
2526 | m = (typeof(m)){"OCe14000", "PCIe", "FCoE"}; | |
2527 | break; | |
5cc36b3c | 2528 | default: |
a747c9ce | 2529 | m = (typeof(m)){"Unknown", "", ""}; |
e4adb204 | 2530 | break; |
dea3101e | 2531 | } |
74b72a59 JW |
2532 | |
2533 | if (mdp && mdp[0] == '\0') | |
2534 | snprintf(mdp, 79,"%s", m.name); | |
c0c11512 JS |
2535 | /* |
2536 | * oneConnect hba requires special processing, they are all initiators | |
da0436e9 JS |
2537 | * and we put the port number on the end |
2538 | */ | |
2539 | if (descp && descp[0] == '\0') { | |
2540 | if (oneConnect) | |
2541 | snprintf(descp, 255, | |
4169d868 | 2542 | "Emulex OneConnect %s, %s Initiator %s", |
a747c9ce | 2543 | m.name, m.function, |
da0436e9 | 2544 | phba->Port); |
4169d868 JS |
2545 | else if (max_speed == 0) |
2546 | snprintf(descp, 255, | |
290237d2 | 2547 | "Emulex %s %s %s", |
4169d868 | 2548 | m.name, m.bus, m.function); |
da0436e9 JS |
2549 | else |
2550 | snprintf(descp, 255, | |
2551 | "Emulex %s %d%s %s %s", | |
a747c9ce JS |
2552 | m.name, max_speed, (GE) ? "GE" : "Gb", |
2553 | m.bus, m.function); | |
da0436e9 | 2554 | } |
dea3101e | 2555 | } |
2556 | ||
e59058c4 | 2557 | /** |
3621a710 | 2558 | * lpfc_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring |
e59058c4 JS |
2559 | * @phba: pointer to lpfc hba data structure. |
2560 | * @pring: pointer to a IOCB ring. | |
2561 | * @cnt: the number of IOCBs to be posted to the IOCB ring. | |
2562 | * | |
2563 | * This routine posts a given number of IOCBs with the associated DMA buffer | |
2564 | * descriptors specified by the cnt argument to the given IOCB ring. | |
2565 | * | |
2566 | * Return codes | |
2567 | * The number of IOCBs NOT able to be posted to the IOCB ring. | |
2568 | **/ | |
dea3101e | 2569 | int |
495a714c | 2570 | lpfc_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt) |
dea3101e | 2571 | { |
2572 | IOCB_t *icmd; | |
0bd4ca25 | 2573 | struct lpfc_iocbq *iocb; |
dea3101e | 2574 | struct lpfc_dmabuf *mp1, *mp2; |
2575 | ||
2576 | cnt += pring->missbufcnt; | |
2577 | ||
2578 | /* While there are buffers to post */ | |
2579 | while (cnt > 0) { | |
2580 | /* Allocate buffer for command iocb */ | |
0bd4ca25 | 2581 | iocb = lpfc_sli_get_iocbq(phba); |
dea3101e | 2582 | if (iocb == NULL) { |
2583 | pring->missbufcnt = cnt; | |
2584 | return cnt; | |
2585 | } | |
dea3101e | 2586 | icmd = &iocb->iocb; |
2587 | ||
2588 | /* 2 buffers can be posted per command */ | |
2589 | /* Allocate buffer to post */ | |
2590 | mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); | |
2591 | if (mp1) | |
98c9ea5c JS |
2592 | mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys); |
2593 | if (!mp1 || !mp1->virt) { | |
c9475cb0 | 2594 | kfree(mp1); |
604a3e30 | 2595 | lpfc_sli_release_iocbq(phba, iocb); |
dea3101e | 2596 | pring->missbufcnt = cnt; |
2597 | return cnt; | |
2598 | } | |
2599 | ||
2600 | INIT_LIST_HEAD(&mp1->list); | |
2601 | /* Allocate buffer to post */ | |
2602 | if (cnt > 1) { | |
2603 | mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); | |
2604 | if (mp2) | |
2605 | mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI, | |
2606 | &mp2->phys); | |
98c9ea5c | 2607 | if (!mp2 || !mp2->virt) { |
c9475cb0 | 2608 | kfree(mp2); |
dea3101e | 2609 | lpfc_mbuf_free(phba, mp1->virt, mp1->phys); |
2610 | kfree(mp1); | |
604a3e30 | 2611 | lpfc_sli_release_iocbq(phba, iocb); |
dea3101e | 2612 | pring->missbufcnt = cnt; |
2613 | return cnt; | |
2614 | } | |
2615 | ||
2616 | INIT_LIST_HEAD(&mp2->list); | |
2617 | } else { | |
2618 | mp2 = NULL; | |
2619 | } | |
2620 | ||
2621 | icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys); | |
2622 | icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys); | |
2623 | icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE; | |
2624 | icmd->ulpBdeCount = 1; | |
2625 | cnt--; | |
2626 | if (mp2) { | |
2627 | icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys); | |
2628 | icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys); | |
2629 | icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE; | |
2630 | cnt--; | |
2631 | icmd->ulpBdeCount = 2; | |
2632 | } | |
2633 | ||
2634 | icmd->ulpCommand = CMD_QUE_RING_BUF64_CN; | |
2635 | icmd->ulpLe = 1; | |
2636 | ||
3772a991 JS |
2637 | if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) == |
2638 | IOCB_ERROR) { | |
dea3101e | 2639 | lpfc_mbuf_free(phba, mp1->virt, mp1->phys); |
2640 | kfree(mp1); | |
2641 | cnt++; | |
2642 | if (mp2) { | |
2643 | lpfc_mbuf_free(phba, mp2->virt, mp2->phys); | |
2644 | kfree(mp2); | |
2645 | cnt++; | |
2646 | } | |
604a3e30 | 2647 | lpfc_sli_release_iocbq(phba, iocb); |
dea3101e | 2648 | pring->missbufcnt = cnt; |
dea3101e | 2649 | return cnt; |
2650 | } | |
dea3101e | 2651 | lpfc_sli_ringpostbuf_put(phba, pring, mp1); |
92d7f7b0 | 2652 | if (mp2) |
dea3101e | 2653 | lpfc_sli_ringpostbuf_put(phba, pring, mp2); |
dea3101e | 2654 | } |
2655 | pring->missbufcnt = 0; | |
2656 | return 0; | |
2657 | } | |
2658 | ||
e59058c4 | 2659 | /** |
3621a710 | 2660 | * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring |
e59058c4 JS |
2661 | * @phba: pointer to lpfc hba data structure. |
2662 | * | |
2663 | * This routine posts initial receive IOCB buffers to the ELS ring. The | |
2664 | * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is | |
895427bd | 2665 | * set to 64 IOCBs. SLI3 only. |
e59058c4 JS |
2666 | * |
2667 | * Return codes | |
2668 | * 0 - success (currently always success) | |
2669 | **/ | |
dea3101e | 2670 | static int |
2e0fef85 | 2671 | lpfc_post_rcv_buf(struct lpfc_hba *phba) |
dea3101e | 2672 | { |
2673 | struct lpfc_sli *psli = &phba->sli; | |
2674 | ||
2675 | /* Ring 0, ELS / CT buffers */ | |
895427bd | 2676 | lpfc_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0); |
dea3101e | 2677 | /* Ring 2 - FCP no buffers needed */ |
2678 | ||
2679 | return 0; | |
2680 | } | |
2681 | ||
2682 | #define S(N,V) (((V)<<(N))|((V)>>(32-(N)))) | |
2683 | ||
e59058c4 | 2684 | /** |
3621a710 | 2685 | * lpfc_sha_init - Set up initial array of hash table entries |
e59058c4 JS |
2686 | * @HashResultPointer: pointer to an array as hash table. |
2687 | * | |
2688 | * This routine sets up the initial values to the array of hash table entries | |
2689 | * for the LC HBAs. | |
2690 | **/ | |
dea3101e | 2691 | static void |
2692 | lpfc_sha_init(uint32_t * HashResultPointer) | |
2693 | { | |
2694 | HashResultPointer[0] = 0x67452301; | |
2695 | HashResultPointer[1] = 0xEFCDAB89; | |
2696 | HashResultPointer[2] = 0x98BADCFE; | |
2697 | HashResultPointer[3] = 0x10325476; | |
2698 | HashResultPointer[4] = 0xC3D2E1F0; | |
2699 | } | |
2700 | ||
e59058c4 | 2701 | /** |
3621a710 | 2702 | * lpfc_sha_iterate - Iterate initial hash table with the working hash table |
e59058c4 JS |
2703 | * @HashResultPointer: pointer to an initial/result hash table. |
2704 | * @HashWorkingPointer: pointer to an working hash table. | |
2705 | * | |
2706 | * This routine iterates an initial hash table pointed by @HashResultPointer | |
2707 | * with the values from the working hash table pointeed by @HashWorkingPointer. | |
2708 | * The results are putting back to the initial hash table, returned through | |
2709 | * the @HashResultPointer as the result hash table. | |
2710 | **/ | |
dea3101e | 2711 | static void |
2712 | lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer) | |
2713 | { | |
2714 | int t; | |
2715 | uint32_t TEMP; | |
2716 | uint32_t A, B, C, D, E; | |
2717 | t = 16; | |
2718 | do { | |
2719 | HashWorkingPointer[t] = | |
2720 | S(1, | |
2721 | HashWorkingPointer[t - 3] ^ HashWorkingPointer[t - | |
2722 | 8] ^ | |
2723 | HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]); | |
2724 | } while (++t <= 79); | |
2725 | t = 0; | |
2726 | A = HashResultPointer[0]; | |
2727 | B = HashResultPointer[1]; | |
2728 | C = HashResultPointer[2]; | |
2729 | D = HashResultPointer[3]; | |
2730 | E = HashResultPointer[4]; | |
2731 | ||
2732 | do { | |
2733 | if (t < 20) { | |
2734 | TEMP = ((B & C) | ((~B) & D)) + 0x5A827999; | |
2735 | } else if (t < 40) { | |
2736 | TEMP = (B ^ C ^ D) + 0x6ED9EBA1; | |
2737 | } else if (t < 60) { | |
2738 | TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC; | |
2739 | } else { | |
2740 | TEMP = (B ^ C ^ D) + 0xCA62C1D6; | |
2741 | } | |
2742 | TEMP += S(5, A) + E + HashWorkingPointer[t]; | |
2743 | E = D; | |
2744 | D = C; | |
2745 | C = S(30, B); | |
2746 | B = A; | |
2747 | A = TEMP; | |
2748 | } while (++t <= 79); | |
2749 | ||
2750 | HashResultPointer[0] += A; | |
2751 | HashResultPointer[1] += B; | |
2752 | HashResultPointer[2] += C; | |
2753 | HashResultPointer[3] += D; | |
2754 | HashResultPointer[4] += E; | |
2755 | ||
2756 | } | |
2757 | ||
e59058c4 | 2758 | /** |
3621a710 | 2759 | * lpfc_challenge_key - Create challenge key based on WWPN of the HBA |
e59058c4 JS |
2760 | * @RandomChallenge: pointer to the entry of host challenge random number array. |
2761 | * @HashWorking: pointer to the entry of the working hash array. | |
2762 | * | |
2763 | * This routine calculates the working hash array referred by @HashWorking | |
2764 | * from the challenge random numbers associated with the host, referred by | |
2765 | * @RandomChallenge. The result is put into the entry of the working hash | |
2766 | * array and returned by reference through @HashWorking. | |
2767 | **/ | |
dea3101e | 2768 | static void |
2769 | lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking) | |
2770 | { | |
2771 | *HashWorking = (*RandomChallenge ^ *HashWorking); | |
2772 | } | |
2773 | ||
e59058c4 | 2774 | /** |
3621a710 | 2775 | * lpfc_hba_init - Perform special handling for LC HBA initialization |
e59058c4 JS |
2776 | * @phba: pointer to lpfc hba data structure. |
2777 | * @hbainit: pointer to an array of unsigned 32-bit integers. | |
2778 | * | |
2779 | * This routine performs the special handling for LC HBA initialization. | |
2780 | **/ | |
dea3101e | 2781 | void |
2782 | lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit) | |
2783 | { | |
2784 | int t; | |
2785 | uint32_t *HashWorking; | |
2e0fef85 | 2786 | uint32_t *pwwnn = (uint32_t *) phba->wwnn; |
dea3101e | 2787 | |
bbfbbbc1 | 2788 | HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL); |
dea3101e | 2789 | if (!HashWorking) |
2790 | return; | |
2791 | ||
dea3101e | 2792 | HashWorking[0] = HashWorking[78] = *pwwnn++; |
2793 | HashWorking[1] = HashWorking[79] = *pwwnn; | |
2794 | ||
2795 | for (t = 0; t < 7; t++) | |
2796 | lpfc_challenge_key(phba->RandomData + t, HashWorking + t); | |
2797 | ||
2798 | lpfc_sha_init(hbainit); | |
2799 | lpfc_sha_iterate(hbainit, HashWorking); | |
2800 | kfree(HashWorking); | |
2801 | } | |
2802 | ||
e59058c4 | 2803 | /** |
3621a710 | 2804 | * lpfc_cleanup - Performs vport cleanups before deleting a vport |
e59058c4 JS |
2805 | * @vport: pointer to a virtual N_Port data structure. |
2806 | * | |
2807 | * This routine performs the necessary cleanups before deleting the @vport. | |
2808 | * It invokes the discovery state machine to perform necessary state | |
2809 | * transitions and to release the ndlps associated with the @vport. Note, | |
2810 | * the physical port is treated as @vport 0. | |
2811 | **/ | |
87af33fe | 2812 | void |
2e0fef85 | 2813 | lpfc_cleanup(struct lpfc_vport *vport) |
dea3101e | 2814 | { |
87af33fe | 2815 | struct lpfc_hba *phba = vport->phba; |
dea3101e | 2816 | struct lpfc_nodelist *ndlp, *next_ndlp; |
a8adb832 | 2817 | int i = 0; |
dea3101e | 2818 | |
87af33fe JS |
2819 | if (phba->link_state > LPFC_LINK_DOWN) |
2820 | lpfc_port_link_failure(vport); | |
2821 | ||
2822 | list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) { | |
e47c9093 JS |
2823 | if (!NLP_CHK_NODE_ACT(ndlp)) { |
2824 | ndlp = lpfc_enable_node(vport, ndlp, | |
2825 | NLP_STE_UNUSED_NODE); | |
2826 | if (!ndlp) | |
2827 | continue; | |
2828 | spin_lock_irq(&phba->ndlp_lock); | |
2829 | NLP_SET_FREE_REQ(ndlp); | |
2830 | spin_unlock_irq(&phba->ndlp_lock); | |
2831 | /* Trigger the release of the ndlp memory */ | |
2832 | lpfc_nlp_put(ndlp); | |
2833 | continue; | |
2834 | } | |
2835 | spin_lock_irq(&phba->ndlp_lock); | |
2836 | if (NLP_CHK_FREE_REQ(ndlp)) { | |
2837 | /* The ndlp should not be in memory free mode already */ | |
2838 | spin_unlock_irq(&phba->ndlp_lock); | |
2839 | continue; | |
2840 | } else | |
2841 | /* Indicate request for freeing ndlp memory */ | |
2842 | NLP_SET_FREE_REQ(ndlp); | |
2843 | spin_unlock_irq(&phba->ndlp_lock); | |
2844 | ||
58da1ffb JS |
2845 | if (vport->port_type != LPFC_PHYSICAL_PORT && |
2846 | ndlp->nlp_DID == Fabric_DID) { | |
2847 | /* Just free up ndlp with Fabric_DID for vports */ | |
2848 | lpfc_nlp_put(ndlp); | |
2849 | continue; | |
2850 | } | |
2851 | ||
eff4a01b JS |
2852 | /* take care of nodes in unused state before the state |
2853 | * machine taking action. | |
2854 | */ | |
2855 | if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) { | |
2856 | lpfc_nlp_put(ndlp); | |
2857 | continue; | |
2858 | } | |
2859 | ||
87af33fe JS |
2860 | if (ndlp->nlp_type & NLP_FABRIC) |
2861 | lpfc_disc_state_machine(vport, ndlp, NULL, | |
2862 | NLP_EVT_DEVICE_RECOVERY); | |
e47c9093 | 2863 | |
87af33fe JS |
2864 | lpfc_disc_state_machine(vport, ndlp, NULL, |
2865 | NLP_EVT_DEVICE_RM); | |
2866 | } | |
2867 | ||
a8adb832 JS |
2868 | /* At this point, ALL ndlp's should be gone |
2869 | * because of the previous NLP_EVT_DEVICE_RM. | |
2870 | * Lets wait for this to happen, if needed. | |
2871 | */ | |
87af33fe | 2872 | while (!list_empty(&vport->fc_nodes)) { |
a8adb832 | 2873 | if (i++ > 3000) { |
87af33fe | 2874 | lpfc_printf_vlog(vport, KERN_ERR, LOG_DISCOVERY, |
a8adb832 | 2875 | "0233 Nodelist not empty\n"); |
e47c9093 JS |
2876 | list_for_each_entry_safe(ndlp, next_ndlp, |
2877 | &vport->fc_nodes, nlp_listp) { | |
2878 | lpfc_printf_vlog(ndlp->vport, KERN_ERR, | |
2879 | LOG_NODE, | |
32350664 | 2880 | "0282 did:x%x ndlp:x%px " |
e47c9093 JS |
2881 | "usgmap:x%x refcnt:%d\n", |
2882 | ndlp->nlp_DID, (void *)ndlp, | |
2883 | ndlp->nlp_usg_map, | |
2c935bc5 | 2884 | kref_read(&ndlp->kref)); |
e47c9093 | 2885 | } |
a8adb832 | 2886 | break; |
87af33fe | 2887 | } |
a8adb832 JS |
2888 | |
2889 | /* Wait for any activity on ndlps to settle */ | |
2890 | msleep(10); | |
87af33fe | 2891 | } |
1151e3ec | 2892 | lpfc_cleanup_vports_rrqs(vport, NULL); |
dea3101e | 2893 | } |
2894 | ||
e59058c4 | 2895 | /** |
3621a710 | 2896 | * lpfc_stop_vport_timers - Stop all the timers associated with a vport |
e59058c4 JS |
2897 | * @vport: pointer to a virtual N_Port data structure. |
2898 | * | |
2899 | * This routine stops all the timers associated with a @vport. This function | |
2900 | * is invoked before disabling or deleting a @vport. Note that the physical | |
2901 | * port is treated as @vport 0. | |
2902 | **/ | |
92d7f7b0 JS |
2903 | void |
2904 | lpfc_stop_vport_timers(struct lpfc_vport *vport) | |
dea3101e | 2905 | { |
92d7f7b0 | 2906 | del_timer_sync(&vport->els_tmofunc); |
92494144 | 2907 | del_timer_sync(&vport->delayed_disc_tmo); |
92d7f7b0 JS |
2908 | lpfc_can_disctmo(vport); |
2909 | return; | |
dea3101e | 2910 | } |
2911 | ||
ecfd03c6 JS |
2912 | /** |
2913 | * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer | |
2914 | * @phba: pointer to lpfc hba data structure. | |
2915 | * | |
2916 | * This routine stops the SLI4 FCF rediscover wait timer if it's on. The | |
2917 | * caller of this routine should already hold the host lock. | |
2918 | **/ | |
2919 | void | |
2920 | __lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba) | |
2921 | { | |
5ac6b303 JS |
2922 | /* Clear pending FCF rediscovery wait flag */ |
2923 | phba->fcf.fcf_flag &= ~FCF_REDISC_PEND; | |
2924 | ||
ecfd03c6 JS |
2925 | /* Now, try to stop the timer */ |
2926 | del_timer(&phba->fcf.redisc_wait); | |
2927 | } | |
2928 | ||
2929 | /** | |
2930 | * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer | |
2931 | * @phba: pointer to lpfc hba data structure. | |
2932 | * | |
2933 | * This routine stops the SLI4 FCF rediscover wait timer if it's on. It | |
2934 | * checks whether the FCF rediscovery wait timer is pending with the host | |
2935 | * lock held before proceeding with disabling the timer and clearing the | |
2936 | * wait timer pendig flag. | |
2937 | **/ | |
2938 | void | |
2939 | lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba) | |
2940 | { | |
2941 | spin_lock_irq(&phba->hbalock); | |
2942 | if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) { | |
2943 | /* FCF rediscovery timer already fired or stopped */ | |
2944 | spin_unlock_irq(&phba->hbalock); | |
2945 | return; | |
2946 | } | |
2947 | __lpfc_sli4_stop_fcf_redisc_wait_timer(phba); | |
5ac6b303 JS |
2948 | /* Clear failover in progress flags */ |
2949 | phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC); | |
ecfd03c6 JS |
2950 | spin_unlock_irq(&phba->hbalock); |
2951 | } | |
2952 | ||
e59058c4 | 2953 | /** |
3772a991 | 2954 | * lpfc_stop_hba_timers - Stop all the timers associated with an HBA |
e59058c4 JS |
2955 | * @phba: pointer to lpfc hba data structure. |
2956 | * | |
2957 | * This routine stops all the timers associated with a HBA. This function is | |
2958 | * invoked before either putting a HBA offline or unloading the driver. | |
2959 | **/ | |
3772a991 JS |
2960 | void |
2961 | lpfc_stop_hba_timers(struct lpfc_hba *phba) | |
dea3101e | 2962 | { |
cdb42bec JS |
2963 | if (phba->pport) |
2964 | lpfc_stop_vport_timers(phba->pport); | |
32517fc0 | 2965 | cancel_delayed_work_sync(&phba->eq_delay_work); |
2e0fef85 | 2966 | del_timer_sync(&phba->sli.mbox_tmo); |
92d7f7b0 | 2967 | del_timer_sync(&phba->fabric_block_timer); |
9399627f | 2968 | del_timer_sync(&phba->eratt_poll); |
3772a991 | 2969 | del_timer_sync(&phba->hb_tmofunc); |
1151e3ec JS |
2970 | if (phba->sli_rev == LPFC_SLI_REV4) { |
2971 | del_timer_sync(&phba->rrq_tmr); | |
2972 | phba->hba_flag &= ~HBA_RRQ_ACTIVE; | |
2973 | } | |
3772a991 JS |
2974 | phba->hb_outstanding = 0; |
2975 | ||
2976 | switch (phba->pci_dev_grp) { | |
2977 | case LPFC_PCI_DEV_LP: | |
2978 | /* Stop any LightPulse device specific driver timers */ | |
2979 | del_timer_sync(&phba->fcp_poll_timer); | |
2980 | break; | |
2981 | case LPFC_PCI_DEV_OC: | |
cc0e5f1c | 2982 | /* Stop any OneConnect device specific driver timers */ |
ecfd03c6 | 2983 | lpfc_sli4_stop_fcf_redisc_wait_timer(phba); |
3772a991 JS |
2984 | break; |
2985 | default: | |
2986 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
2987 | "0297 Invalid device group (x%x)\n", | |
2988 | phba->pci_dev_grp); | |
2989 | break; | |
2990 | } | |
2e0fef85 | 2991 | return; |
dea3101e | 2992 | } |
2993 | ||
e59058c4 | 2994 | /** |
3621a710 | 2995 | * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked |
e59058c4 JS |
2996 | * @phba: pointer to lpfc hba data structure. |
2997 | * | |
2998 | * This routine marks a HBA's management interface as blocked. Once the HBA's | |
2999 | * management interface is marked as blocked, all the user space access to | |
3000 | * the HBA, whether they are from sysfs interface or libdfc interface will | |
3001 | * all be blocked. The HBA is set to block the management interface when the | |
3002 | * driver prepares the HBA interface for online or offline. | |
3003 | **/ | |
a6ababd2 | 3004 | static void |
618a5230 | 3005 | lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action) |
a6ababd2 AB |
3006 | { |
3007 | unsigned long iflag; | |
6e7288d9 JS |
3008 | uint8_t actcmd = MBX_HEARTBEAT; |
3009 | unsigned long timeout; | |
3010 | ||
a6ababd2 AB |
3011 | spin_lock_irqsave(&phba->hbalock, iflag); |
3012 | phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO; | |
618a5230 JS |
3013 | spin_unlock_irqrestore(&phba->hbalock, iflag); |
3014 | if (mbx_action == LPFC_MBX_NO_WAIT) | |
3015 | return; | |
3016 | timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies; | |
3017 | spin_lock_irqsave(&phba->hbalock, iflag); | |
a183a15f | 3018 | if (phba->sli.mbox_active) { |
6e7288d9 | 3019 | actcmd = phba->sli.mbox_active->u.mb.mbxCommand; |
a183a15f JS |
3020 | /* Determine how long we might wait for the active mailbox |
3021 | * command to be gracefully completed by firmware. | |
3022 | */ | |
3023 | timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, | |
3024 | phba->sli.mbox_active) * 1000) + jiffies; | |
3025 | } | |
a6ababd2 | 3026 | spin_unlock_irqrestore(&phba->hbalock, iflag); |
a183a15f | 3027 | |
6e7288d9 JS |
3028 | /* Wait for the outstnading mailbox command to complete */ |
3029 | while (phba->sli.mbox_active) { | |
3030 | /* Check active mailbox complete status every 2ms */ | |
3031 | msleep(2); | |
3032 | if (time_after(jiffies, timeout)) { | |
3033 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
3034 | "2813 Mgmt IO is Blocked %x " | |
3035 | "- mbox cmd %x still active\n", | |
3036 | phba->sli.sli_flag, actcmd); | |
3037 | break; | |
3038 | } | |
3039 | } | |
a6ababd2 AB |
3040 | } |
3041 | ||
6b5151fd JS |
3042 | /** |
3043 | * lpfc_sli4_node_prep - Assign RPIs for active nodes. | |
3044 | * @phba: pointer to lpfc hba data structure. | |
3045 | * | |
3046 | * Allocate RPIs for all active remote nodes. This is needed whenever | |
3047 | * an SLI4 adapter is reset and the driver is not unloading. Its purpose | |
3048 | * is to fixup the temporary rpi assignments. | |
3049 | **/ | |
3050 | void | |
3051 | lpfc_sli4_node_prep(struct lpfc_hba *phba) | |
3052 | { | |
3053 | struct lpfc_nodelist *ndlp, *next_ndlp; | |
3054 | struct lpfc_vport **vports; | |
9d3d340d JS |
3055 | int i, rpi; |
3056 | unsigned long flags; | |
6b5151fd JS |
3057 | |
3058 | if (phba->sli_rev != LPFC_SLI_REV4) | |
3059 | return; | |
3060 | ||
3061 | vports = lpfc_create_vport_work_array(phba); | |
9d3d340d JS |
3062 | if (vports == NULL) |
3063 | return; | |
6b5151fd | 3064 | |
9d3d340d JS |
3065 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { |
3066 | if (vports[i]->load_flag & FC_UNLOADING) | |
3067 | continue; | |
3068 | ||
3069 | list_for_each_entry_safe(ndlp, next_ndlp, | |
3070 | &vports[i]->fc_nodes, | |
3071 | nlp_listp) { | |
3072 | if (!NLP_CHK_NODE_ACT(ndlp)) | |
3073 | continue; | |
3074 | rpi = lpfc_sli4_alloc_rpi(phba); | |
3075 | if (rpi == LPFC_RPI_ALLOC_ERROR) { | |
3076 | spin_lock_irqsave(&phba->ndlp_lock, flags); | |
3077 | NLP_CLR_NODE_ACT(ndlp); | |
3078 | spin_unlock_irqrestore(&phba->ndlp_lock, flags); | |
3079 | continue; | |
6b5151fd | 3080 | } |
9d3d340d JS |
3081 | ndlp->nlp_rpi = rpi; |
3082 | lpfc_printf_vlog(ndlp->vport, KERN_INFO, LOG_NODE, | |
3083 | "0009 rpi:%x DID:%x " | |
32350664 | 3084 | "flg:%x map:%x x%px\n", ndlp->nlp_rpi, |
9d3d340d JS |
3085 | ndlp->nlp_DID, ndlp->nlp_flag, |
3086 | ndlp->nlp_usg_map, ndlp); | |
6b5151fd JS |
3087 | } |
3088 | } | |
3089 | lpfc_destroy_vport_work_array(phba, vports); | |
3090 | } | |
3091 | ||
c490850a JS |
3092 | /** |
3093 | * lpfc_create_expedite_pool - create expedite pool | |
3094 | * @phba: pointer to lpfc hba data structure. | |
3095 | * | |
3096 | * This routine moves a batch of XRIs from lpfc_io_buf_list_put of HWQ 0 | |
3097 | * to expedite pool. Mark them as expedite. | |
3098 | **/ | |
3999df75 | 3099 | static void lpfc_create_expedite_pool(struct lpfc_hba *phba) |
c490850a JS |
3100 | { |
3101 | struct lpfc_sli4_hdw_queue *qp; | |
3102 | struct lpfc_io_buf *lpfc_ncmd; | |
3103 | struct lpfc_io_buf *lpfc_ncmd_next; | |
3104 | struct lpfc_epd_pool *epd_pool; | |
3105 | unsigned long iflag; | |
3106 | ||
3107 | epd_pool = &phba->epd_pool; | |
3108 | qp = &phba->sli4_hba.hdwq[0]; | |
3109 | ||
3110 | spin_lock_init(&epd_pool->lock); | |
3111 | spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); | |
3112 | spin_lock(&epd_pool->lock); | |
3113 | INIT_LIST_HEAD(&epd_pool->list); | |
3114 | list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, | |
3115 | &qp->lpfc_io_buf_list_put, list) { | |
3116 | list_move_tail(&lpfc_ncmd->list, &epd_pool->list); | |
3117 | lpfc_ncmd->expedite = true; | |
3118 | qp->put_io_bufs--; | |
3119 | epd_pool->count++; | |
3120 | if (epd_pool->count >= XRI_BATCH) | |
3121 | break; | |
3122 | } | |
3123 | spin_unlock(&epd_pool->lock); | |
3124 | spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); | |
3125 | } | |
3126 | ||
3127 | /** | |
3128 | * lpfc_destroy_expedite_pool - destroy expedite pool | |
3129 | * @phba: pointer to lpfc hba data structure. | |
3130 | * | |
3131 | * This routine returns XRIs from expedite pool to lpfc_io_buf_list_put | |
3132 | * of HWQ 0. Clear the mark. | |
3133 | **/ | |
3999df75 | 3134 | static void lpfc_destroy_expedite_pool(struct lpfc_hba *phba) |
c490850a JS |
3135 | { |
3136 | struct lpfc_sli4_hdw_queue *qp; | |
3137 | struct lpfc_io_buf *lpfc_ncmd; | |
3138 | struct lpfc_io_buf *lpfc_ncmd_next; | |
3139 | struct lpfc_epd_pool *epd_pool; | |
3140 | unsigned long iflag; | |
3141 | ||
3142 | epd_pool = &phba->epd_pool; | |
3143 | qp = &phba->sli4_hba.hdwq[0]; | |
3144 | ||
3145 | spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); | |
3146 | spin_lock(&epd_pool->lock); | |
3147 | list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, | |
3148 | &epd_pool->list, list) { | |
3149 | list_move_tail(&lpfc_ncmd->list, | |
3150 | &qp->lpfc_io_buf_list_put); | |
3151 | lpfc_ncmd->flags = false; | |
3152 | qp->put_io_bufs++; | |
3153 | epd_pool->count--; | |
3154 | } | |
3155 | spin_unlock(&epd_pool->lock); | |
3156 | spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); | |
3157 | } | |
3158 | ||
3159 | /** | |
3160 | * lpfc_create_multixri_pools - create multi-XRI pools | |
3161 | * @phba: pointer to lpfc hba data structure. | |
3162 | * | |
3163 | * This routine initialize public, private per HWQ. Then, move XRIs from | |
3164 | * lpfc_io_buf_list_put to public pool. High and low watermark are also | |
3165 | * Initialized. | |
3166 | **/ | |
3167 | void lpfc_create_multixri_pools(struct lpfc_hba *phba) | |
3168 | { | |
3169 | u32 i, j; | |
3170 | u32 hwq_count; | |
3171 | u32 count_per_hwq; | |
3172 | struct lpfc_io_buf *lpfc_ncmd; | |
3173 | struct lpfc_io_buf *lpfc_ncmd_next; | |
3174 | unsigned long iflag; | |
3175 | struct lpfc_sli4_hdw_queue *qp; | |
3176 | struct lpfc_multixri_pool *multixri_pool; | |
3177 | struct lpfc_pbl_pool *pbl_pool; | |
3178 | struct lpfc_pvt_pool *pvt_pool; | |
3179 | ||
3180 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
3181 | "1234 num_hdw_queue=%d num_present_cpu=%d common_xri_cnt=%d\n", | |
3182 | phba->cfg_hdw_queue, phba->sli4_hba.num_present_cpu, | |
3183 | phba->sli4_hba.io_xri_cnt); | |
3184 | ||
3185 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) | |
3186 | lpfc_create_expedite_pool(phba); | |
3187 | ||
3188 | hwq_count = phba->cfg_hdw_queue; | |
3189 | count_per_hwq = phba->sli4_hba.io_xri_cnt / hwq_count; | |
3190 | ||
3191 | for (i = 0; i < hwq_count; i++) { | |
3192 | multixri_pool = kzalloc(sizeof(*multixri_pool), GFP_KERNEL); | |
3193 | ||
3194 | if (!multixri_pool) { | |
3195 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
3196 | "1238 Failed to allocate memory for " | |
3197 | "multixri_pool\n"); | |
3198 | ||
3199 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) | |
3200 | lpfc_destroy_expedite_pool(phba); | |
3201 | ||
3202 | j = 0; | |
3203 | while (j < i) { | |
3204 | qp = &phba->sli4_hba.hdwq[j]; | |
3205 | kfree(qp->p_multixri_pool); | |
3206 | j++; | |
3207 | } | |
3208 | phba->cfg_xri_rebalancing = 0; | |
3209 | return; | |
3210 | } | |
3211 | ||
3212 | qp = &phba->sli4_hba.hdwq[i]; | |
3213 | qp->p_multixri_pool = multixri_pool; | |
3214 | ||
3215 | multixri_pool->xri_limit = count_per_hwq; | |
3216 | multixri_pool->rrb_next_hwqid = i; | |
3217 | ||
3218 | /* Deal with public free xri pool */ | |
3219 | pbl_pool = &multixri_pool->pbl_pool; | |
3220 | spin_lock_init(&pbl_pool->lock); | |
3221 | spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); | |
3222 | spin_lock(&pbl_pool->lock); | |
3223 | INIT_LIST_HEAD(&pbl_pool->list); | |
3224 | list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, | |
3225 | &qp->lpfc_io_buf_list_put, list) { | |
3226 | list_move_tail(&lpfc_ncmd->list, &pbl_pool->list); | |
3227 | qp->put_io_bufs--; | |
3228 | pbl_pool->count++; | |
3229 | } | |
3230 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
3231 | "1235 Moved %d buffers from PUT list over to pbl_pool[%d]\n", | |
3232 | pbl_pool->count, i); | |
3233 | spin_unlock(&pbl_pool->lock); | |
3234 | spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); | |
3235 | ||
3236 | /* Deal with private free xri pool */ | |
3237 | pvt_pool = &multixri_pool->pvt_pool; | |
3238 | pvt_pool->high_watermark = multixri_pool->xri_limit / 2; | |
3239 | pvt_pool->low_watermark = XRI_BATCH; | |
3240 | spin_lock_init(&pvt_pool->lock); | |
3241 | spin_lock_irqsave(&pvt_pool->lock, iflag); | |
3242 | INIT_LIST_HEAD(&pvt_pool->list); | |
3243 | pvt_pool->count = 0; | |
3244 | spin_unlock_irqrestore(&pvt_pool->lock, iflag); | |
3245 | } | |
3246 | } | |
3247 | ||
3248 | /** | |
3249 | * lpfc_destroy_multixri_pools - destroy multi-XRI pools | |
3250 | * @phba: pointer to lpfc hba data structure. | |
3251 | * | |
3252 | * This routine returns XRIs from public/private to lpfc_io_buf_list_put. | |
3253 | **/ | |
3999df75 | 3254 | static void lpfc_destroy_multixri_pools(struct lpfc_hba *phba) |
c490850a JS |
3255 | { |
3256 | u32 i; | |
3257 | u32 hwq_count; | |
3258 | struct lpfc_io_buf *lpfc_ncmd; | |
3259 | struct lpfc_io_buf *lpfc_ncmd_next; | |
3260 | unsigned long iflag; | |
3261 | struct lpfc_sli4_hdw_queue *qp; | |
3262 | struct lpfc_multixri_pool *multixri_pool; | |
3263 | struct lpfc_pbl_pool *pbl_pool; | |
3264 | struct lpfc_pvt_pool *pvt_pool; | |
3265 | ||
3266 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) | |
3267 | lpfc_destroy_expedite_pool(phba); | |
3268 | ||
c66a9197 JS |
3269 | if (!(phba->pport->load_flag & FC_UNLOADING)) { |
3270 | lpfc_sli_flush_fcp_rings(phba); | |
3271 | ||
3272 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) | |
3273 | lpfc_sli_flush_nvme_rings(phba); | |
3274 | } | |
3275 | ||
c490850a JS |
3276 | hwq_count = phba->cfg_hdw_queue; |
3277 | ||
3278 | for (i = 0; i < hwq_count; i++) { | |
3279 | qp = &phba->sli4_hba.hdwq[i]; | |
3280 | multixri_pool = qp->p_multixri_pool; | |
3281 | if (!multixri_pool) | |
3282 | continue; | |
3283 | ||
3284 | qp->p_multixri_pool = NULL; | |
3285 | ||
3286 | spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); | |
3287 | ||
3288 | /* Deal with public free xri pool */ | |
3289 | pbl_pool = &multixri_pool->pbl_pool; | |
3290 | spin_lock(&pbl_pool->lock); | |
3291 | ||
3292 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
3293 | "1236 Moving %d buffers from pbl_pool[%d] TO PUT list\n", | |
3294 | pbl_pool->count, i); | |
3295 | ||
3296 | list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, | |
3297 | &pbl_pool->list, list) { | |
3298 | list_move_tail(&lpfc_ncmd->list, | |
3299 | &qp->lpfc_io_buf_list_put); | |
3300 | qp->put_io_bufs++; | |
3301 | pbl_pool->count--; | |
3302 | } | |
3303 | ||
3304 | INIT_LIST_HEAD(&pbl_pool->list); | |
3305 | pbl_pool->count = 0; | |
3306 | ||
3307 | spin_unlock(&pbl_pool->lock); | |
3308 | ||
3309 | /* Deal with private free xri pool */ | |
3310 | pvt_pool = &multixri_pool->pvt_pool; | |
3311 | spin_lock(&pvt_pool->lock); | |
3312 | ||
3313 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
3314 | "1237 Moving %d buffers from pvt_pool[%d] TO PUT list\n", | |
3315 | pvt_pool->count, i); | |
3316 | ||
3317 | list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, | |
3318 | &pvt_pool->list, list) { | |
3319 | list_move_tail(&lpfc_ncmd->list, | |
3320 | &qp->lpfc_io_buf_list_put); | |
3321 | qp->put_io_bufs++; | |
3322 | pvt_pool->count--; | |
3323 | } | |
3324 | ||
3325 | INIT_LIST_HEAD(&pvt_pool->list); | |
3326 | pvt_pool->count = 0; | |
3327 | ||
3328 | spin_unlock(&pvt_pool->lock); | |
3329 | spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); | |
3330 | ||
3331 | kfree(multixri_pool); | |
3332 | } | |
3333 | } | |
3334 | ||
e59058c4 | 3335 | /** |
3621a710 | 3336 | * lpfc_online - Initialize and bring a HBA online |
e59058c4 JS |
3337 | * @phba: pointer to lpfc hba data structure. |
3338 | * | |
3339 | * This routine initializes the HBA and brings a HBA online. During this | |
3340 | * process, the management interface is blocked to prevent user space access | |
3341 | * to the HBA interfering with the driver initialization. | |
3342 | * | |
3343 | * Return codes | |
3344 | * 0 - successful | |
3345 | * 1 - failed | |
3346 | **/ | |
dea3101e | 3347 | int |
2e0fef85 | 3348 | lpfc_online(struct lpfc_hba *phba) |
dea3101e | 3349 | { |
372bd282 | 3350 | struct lpfc_vport *vport; |
549e55cd | 3351 | struct lpfc_vport **vports; |
a145fda3 | 3352 | int i, error = 0; |
16a3a208 | 3353 | bool vpis_cleared = false; |
2e0fef85 | 3354 | |
dea3101e | 3355 | if (!phba) |
3356 | return 0; | |
372bd282 | 3357 | vport = phba->pport; |
dea3101e | 3358 | |
2e0fef85 | 3359 | if (!(vport->fc_flag & FC_OFFLINE_MODE)) |
dea3101e | 3360 | return 0; |
3361 | ||
ed957684 | 3362 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, |
e8b62011 | 3363 | "0458 Bring Adapter online\n"); |
dea3101e | 3364 | |
618a5230 | 3365 | lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT); |
46fa311e | 3366 | |
da0436e9 JS |
3367 | if (phba->sli_rev == LPFC_SLI_REV4) { |
3368 | if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */ | |
3369 | lpfc_unblock_mgmt_io(phba); | |
3370 | return 1; | |
3371 | } | |
16a3a208 JS |
3372 | spin_lock_irq(&phba->hbalock); |
3373 | if (!phba->sli4_hba.max_cfg_param.vpi_used) | |
3374 | vpis_cleared = true; | |
3375 | spin_unlock_irq(&phba->hbalock); | |
a145fda3 DK |
3376 | |
3377 | /* Reestablish the local initiator port. | |
3378 | * The offline process destroyed the previous lport. | |
3379 | */ | |
3380 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME && | |
3381 | !phba->nvmet_support) { | |
3382 | error = lpfc_nvme_create_localport(phba->pport); | |
3383 | if (error) | |
3384 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
3385 | "6132 NVME restore reg failed " | |
3386 | "on nvmei error x%x\n", error); | |
3387 | } | |
da0436e9 | 3388 | } else { |
895427bd | 3389 | lpfc_sli_queue_init(phba); |
da0436e9 JS |
3390 | if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */ |
3391 | lpfc_unblock_mgmt_io(phba); | |
3392 | return 1; | |
3393 | } | |
46fa311e | 3394 | } |
dea3101e | 3395 | |
549e55cd | 3396 | vports = lpfc_create_vport_work_array(phba); |
aeb6641f | 3397 | if (vports != NULL) { |
da0436e9 | 3398 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { |
549e55cd JS |
3399 | struct Scsi_Host *shost; |
3400 | shost = lpfc_shost_from_vport(vports[i]); | |
3401 | spin_lock_irq(shost->host_lock); | |
3402 | vports[i]->fc_flag &= ~FC_OFFLINE_MODE; | |
3403 | if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED) | |
3404 | vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI; | |
16a3a208 | 3405 | if (phba->sli_rev == LPFC_SLI_REV4) { |
1c6834a7 | 3406 | vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI; |
16a3a208 JS |
3407 | if ((vpis_cleared) && |
3408 | (vports[i]->port_type != | |
3409 | LPFC_PHYSICAL_PORT)) | |
3410 | vports[i]->vpi = 0; | |
3411 | } | |
549e55cd JS |
3412 | spin_unlock_irq(shost->host_lock); |
3413 | } | |
aeb6641f AB |
3414 | } |
3415 | lpfc_destroy_vport_work_array(phba, vports); | |
dea3101e | 3416 | |
c490850a JS |
3417 | if (phba->cfg_xri_rebalancing) |
3418 | lpfc_create_multixri_pools(phba); | |
3419 | ||
46fa311e | 3420 | lpfc_unblock_mgmt_io(phba); |
dea3101e | 3421 | return 0; |
3422 | } | |
3423 | ||
e59058c4 | 3424 | /** |
3621a710 | 3425 | * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked |
e59058c4 JS |
3426 | * @phba: pointer to lpfc hba data structure. |
3427 | * | |
3428 | * This routine marks a HBA's management interface as not blocked. Once the | |
3429 | * HBA's management interface is marked as not blocked, all the user space | |
3430 | * access to the HBA, whether they are from sysfs interface or libdfc | |
3431 | * interface will be allowed. The HBA is set to block the management interface | |
3432 | * when the driver prepares the HBA interface for online or offline and then | |
3433 | * set to unblock the management interface afterwards. | |
3434 | **/ | |
46fa311e JS |
3435 | void |
3436 | lpfc_unblock_mgmt_io(struct lpfc_hba * phba) | |
3437 | { | |
3438 | unsigned long iflag; | |
3439 | ||
2e0fef85 JS |
3440 | spin_lock_irqsave(&phba->hbalock, iflag); |
3441 | phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO; | |
3442 | spin_unlock_irqrestore(&phba->hbalock, iflag); | |
46fa311e JS |
3443 | } |
3444 | ||
e59058c4 | 3445 | /** |
3621a710 | 3446 | * lpfc_offline_prep - Prepare a HBA to be brought offline |
e59058c4 JS |
3447 | * @phba: pointer to lpfc hba data structure. |
3448 | * | |
3449 | * This routine is invoked to prepare a HBA to be brought offline. It performs | |
3450 | * unregistration login to all the nodes on all vports and flushes the mailbox | |
3451 | * queue to make it ready to be brought offline. | |
3452 | **/ | |
46fa311e | 3453 | void |
618a5230 | 3454 | lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action) |
46fa311e | 3455 | { |
2e0fef85 | 3456 | struct lpfc_vport *vport = phba->pport; |
46fa311e | 3457 | struct lpfc_nodelist *ndlp, *next_ndlp; |
87af33fe | 3458 | struct lpfc_vport **vports; |
72100cc4 | 3459 | struct Scsi_Host *shost; |
87af33fe | 3460 | int i; |
dea3101e | 3461 | |
2e0fef85 | 3462 | if (vport->fc_flag & FC_OFFLINE_MODE) |
46fa311e | 3463 | return; |
dea3101e | 3464 | |
618a5230 | 3465 | lpfc_block_mgmt_io(phba, mbx_action); |
dea3101e | 3466 | |
3467 | lpfc_linkdown(phba); | |
3468 | ||
87af33fe JS |
3469 | /* Issue an unreg_login to all nodes on all vports */ |
3470 | vports = lpfc_create_vport_work_array(phba); | |
3471 | if (vports != NULL) { | |
da0436e9 | 3472 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { |
a8adb832 JS |
3473 | if (vports[i]->load_flag & FC_UNLOADING) |
3474 | continue; | |
72100cc4 JS |
3475 | shost = lpfc_shost_from_vport(vports[i]); |
3476 | spin_lock_irq(shost->host_lock); | |
c868595d | 3477 | vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED; |
695a814e JS |
3478 | vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI; |
3479 | vports[i]->fc_flag &= ~FC_VFI_REGISTERED; | |
72100cc4 | 3480 | spin_unlock_irq(shost->host_lock); |
695a814e | 3481 | |
87af33fe JS |
3482 | shost = lpfc_shost_from_vport(vports[i]); |
3483 | list_for_each_entry_safe(ndlp, next_ndlp, | |
3484 | &vports[i]->fc_nodes, | |
3485 | nlp_listp) { | |
e47c9093 JS |
3486 | if (!NLP_CHK_NODE_ACT(ndlp)) |
3487 | continue; | |
87af33fe JS |
3488 | if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) |
3489 | continue; | |
3490 | if (ndlp->nlp_type & NLP_FABRIC) { | |
3491 | lpfc_disc_state_machine(vports[i], ndlp, | |
3492 | NULL, NLP_EVT_DEVICE_RECOVERY); | |
3493 | lpfc_disc_state_machine(vports[i], ndlp, | |
3494 | NULL, NLP_EVT_DEVICE_RM); | |
3495 | } | |
3496 | spin_lock_irq(shost->host_lock); | |
3497 | ndlp->nlp_flag &= ~NLP_NPR_ADISC; | |
401ee0c1 | 3498 | spin_unlock_irq(shost->host_lock); |
6b5151fd JS |
3499 | /* |
3500 | * Whenever an SLI4 port goes offline, free the | |
401ee0c1 JS |
3501 | * RPI. Get a new RPI when the adapter port |
3502 | * comes back online. | |
6b5151fd | 3503 | */ |
be6bb941 JS |
3504 | if (phba->sli_rev == LPFC_SLI_REV4) { |
3505 | lpfc_printf_vlog(ndlp->vport, | |
3506 | KERN_INFO, LOG_NODE, | |
3507 | "0011 lpfc_offline: " | |
32350664 | 3508 | "ndlp:x%px did %x " |
be6bb941 JS |
3509 | "usgmap:x%x rpi:%x\n", |
3510 | ndlp, ndlp->nlp_DID, | |
3511 | ndlp->nlp_usg_map, | |
3512 | ndlp->nlp_rpi); | |
3513 | ||
6b5151fd | 3514 | lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi); |
be6bb941 | 3515 | } |
87af33fe JS |
3516 | lpfc_unreg_rpi(vports[i], ndlp); |
3517 | } | |
3518 | } | |
3519 | } | |
09372820 | 3520 | lpfc_destroy_vport_work_array(phba, vports); |
dea3101e | 3521 | |
618a5230 | 3522 | lpfc_sli_mbox_sys_shutdown(phba, mbx_action); |
f485c18d DK |
3523 | |
3524 | if (phba->wq) | |
3525 | flush_workqueue(phba->wq); | |
46fa311e JS |
3526 | } |
3527 | ||
e59058c4 | 3528 | /** |
3621a710 | 3529 | * lpfc_offline - Bring a HBA offline |
e59058c4 JS |
3530 | * @phba: pointer to lpfc hba data structure. |
3531 | * | |
3532 | * This routine actually brings a HBA offline. It stops all the timers | |
3533 | * associated with the HBA, brings down the SLI layer, and eventually | |
3534 | * marks the HBA as in offline state for the upper layer protocol. | |
3535 | **/ | |
46fa311e | 3536 | void |
2e0fef85 | 3537 | lpfc_offline(struct lpfc_hba *phba) |
46fa311e | 3538 | { |
549e55cd JS |
3539 | struct Scsi_Host *shost; |
3540 | struct lpfc_vport **vports; | |
3541 | int i; | |
46fa311e | 3542 | |
549e55cd | 3543 | if (phba->pport->fc_flag & FC_OFFLINE_MODE) |
46fa311e | 3544 | return; |
688a8863 | 3545 | |
da0436e9 JS |
3546 | /* stop port and all timers associated with this hba */ |
3547 | lpfc_stop_port(phba); | |
4b40d02b DK |
3548 | |
3549 | /* Tear down the local and target port registrations. The | |
3550 | * nvme transports need to cleanup. | |
3551 | */ | |
3552 | lpfc_nvmet_destroy_targetport(phba); | |
3553 | lpfc_nvme_destroy_localport(phba->pport); | |
3554 | ||
51ef4c26 JS |
3555 | vports = lpfc_create_vport_work_array(phba); |
3556 | if (vports != NULL) | |
da0436e9 | 3557 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) |
51ef4c26 | 3558 | lpfc_stop_vport_timers(vports[i]); |
09372820 | 3559 | lpfc_destroy_vport_work_array(phba, vports); |
92d7f7b0 | 3560 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, |
e8b62011 | 3561 | "0460 Bring Adapter offline\n"); |
dea3101e | 3562 | /* Bring down the SLI Layer and cleanup. The HBA is offline |
3563 | now. */ | |
3564 | lpfc_sli_hba_down(phba); | |
92d7f7b0 | 3565 | spin_lock_irq(&phba->hbalock); |
7054a606 | 3566 | phba->work_ha = 0; |
92d7f7b0 | 3567 | spin_unlock_irq(&phba->hbalock); |
549e55cd JS |
3568 | vports = lpfc_create_vport_work_array(phba); |
3569 | if (vports != NULL) | |
da0436e9 | 3570 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { |
549e55cd | 3571 | shost = lpfc_shost_from_vport(vports[i]); |
549e55cd JS |
3572 | spin_lock_irq(shost->host_lock); |
3573 | vports[i]->work_port_events = 0; | |
3574 | vports[i]->fc_flag |= FC_OFFLINE_MODE; | |
3575 | spin_unlock_irq(shost->host_lock); | |
3576 | } | |
09372820 | 3577 | lpfc_destroy_vport_work_array(phba, vports); |
c490850a JS |
3578 | |
3579 | if (phba->cfg_xri_rebalancing) | |
3580 | lpfc_destroy_multixri_pools(phba); | |
dea3101e | 3581 | } |
3582 | ||
e59058c4 | 3583 | /** |
3621a710 | 3584 | * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists |
e59058c4 JS |
3585 | * @phba: pointer to lpfc hba data structure. |
3586 | * | |
3587 | * This routine is to free all the SCSI buffers and IOCBs from the driver | |
3588 | * list back to kernel. It is called from lpfc_pci_remove_one to free | |
3589 | * the internal resources before the device is removed from the system. | |
e59058c4 | 3590 | **/ |
8a9d2e80 | 3591 | static void |
2e0fef85 | 3592 | lpfc_scsi_free(struct lpfc_hba *phba) |
dea3101e | 3593 | { |
c490850a | 3594 | struct lpfc_io_buf *sb, *sb_next; |
dea3101e | 3595 | |
895427bd JS |
3596 | if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)) |
3597 | return; | |
3598 | ||
2e0fef85 | 3599 | spin_lock_irq(&phba->hbalock); |
a40fc5f0 | 3600 | |
dea3101e | 3601 | /* Release all the lpfc_scsi_bufs maintained by this host. */ |
a40fc5f0 JS |
3602 | |
3603 | spin_lock(&phba->scsi_buf_list_put_lock); | |
3604 | list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put, | |
3605 | list) { | |
dea3101e | 3606 | list_del(&sb->list); |
771db5c0 | 3607 | dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data, |
92d7f7b0 | 3608 | sb->dma_handle); |
dea3101e | 3609 | kfree(sb); |
3610 | phba->total_scsi_bufs--; | |
3611 | } | |
a40fc5f0 JS |
3612 | spin_unlock(&phba->scsi_buf_list_put_lock); |
3613 | ||
3614 | spin_lock(&phba->scsi_buf_list_get_lock); | |
3615 | list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get, | |
3616 | list) { | |
dea3101e | 3617 | list_del(&sb->list); |
771db5c0 | 3618 | dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data, |
92d7f7b0 | 3619 | sb->dma_handle); |
dea3101e | 3620 | kfree(sb); |
3621 | phba->total_scsi_bufs--; | |
3622 | } | |
a40fc5f0 | 3623 | spin_unlock(&phba->scsi_buf_list_get_lock); |
2e0fef85 | 3624 | spin_unlock_irq(&phba->hbalock); |
8a9d2e80 | 3625 | } |
0794d601 | 3626 | |
895427bd | 3627 | /** |
5e5b511d | 3628 | * lpfc_io_free - Free all the IO buffers and IOCBs from driver lists |
895427bd JS |
3629 | * @phba: pointer to lpfc hba data structure. |
3630 | * | |
0794d601 | 3631 | * This routine is to free all the IO buffers and IOCBs from the driver |
895427bd JS |
3632 | * list back to kernel. It is called from lpfc_pci_remove_one to free |
3633 | * the internal resources before the device is removed from the system. | |
3634 | **/ | |
c490850a | 3635 | void |
5e5b511d | 3636 | lpfc_io_free(struct lpfc_hba *phba) |
895427bd | 3637 | { |
c490850a | 3638 | struct lpfc_io_buf *lpfc_ncmd, *lpfc_ncmd_next; |
5e5b511d JS |
3639 | struct lpfc_sli4_hdw_queue *qp; |
3640 | int idx; | |
895427bd | 3641 | |
5e5b511d JS |
3642 | for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { |
3643 | qp = &phba->sli4_hba.hdwq[idx]; | |
3644 | /* Release all the lpfc_nvme_bufs maintained by this host. */ | |
3645 | spin_lock(&qp->io_buf_list_put_lock); | |
3646 | list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, | |
3647 | &qp->lpfc_io_buf_list_put, | |
3648 | list) { | |
3649 | list_del(&lpfc_ncmd->list); | |
3650 | qp->put_io_bufs--; | |
3651 | dma_pool_free(phba->lpfc_sg_dma_buf_pool, | |
3652 | lpfc_ncmd->data, lpfc_ncmd->dma_handle); | |
d79c9e9d JS |
3653 | if (phba->cfg_xpsgl && !phba->nvmet_support) |
3654 | lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd); | |
3655 | lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd); | |
5e5b511d JS |
3656 | kfree(lpfc_ncmd); |
3657 | qp->total_io_bufs--; | |
3658 | } | |
3659 | spin_unlock(&qp->io_buf_list_put_lock); | |
3660 | ||
3661 | spin_lock(&qp->io_buf_list_get_lock); | |
3662 | list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, | |
3663 | &qp->lpfc_io_buf_list_get, | |
3664 | list) { | |
3665 | list_del(&lpfc_ncmd->list); | |
3666 | qp->get_io_bufs--; | |
3667 | dma_pool_free(phba->lpfc_sg_dma_buf_pool, | |
3668 | lpfc_ncmd->data, lpfc_ncmd->dma_handle); | |
d79c9e9d JS |
3669 | if (phba->cfg_xpsgl && !phba->nvmet_support) |
3670 | lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd); | |
3671 | lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd); | |
5e5b511d JS |
3672 | kfree(lpfc_ncmd); |
3673 | qp->total_io_bufs--; | |
3674 | } | |
3675 | spin_unlock(&qp->io_buf_list_get_lock); | |
895427bd | 3676 | } |
895427bd | 3677 | } |
0794d601 | 3678 | |
8a9d2e80 | 3679 | /** |
895427bd | 3680 | * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping |
8a9d2e80 JS |
3681 | * @phba: pointer to lpfc hba data structure. |
3682 | * | |
3683 | * This routine first calculates the sizes of the current els and allocated | |
3684 | * scsi sgl lists, and then goes through all sgls to updates the physical | |
3685 | * XRIs assigned due to port function reset. During port initialization, the | |
3686 | * current els and allocated scsi sgl lists are 0s. | |
3687 | * | |
3688 | * Return codes | |
3689 | * 0 - successful (for now, it always returns 0) | |
3690 | **/ | |
3691 | int | |
895427bd | 3692 | lpfc_sli4_els_sgl_update(struct lpfc_hba *phba) |
8a9d2e80 JS |
3693 | { |
3694 | struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL; | |
895427bd | 3695 | uint16_t i, lxri, xri_cnt, els_xri_cnt; |
8a9d2e80 | 3696 | LIST_HEAD(els_sgl_list); |
8a9d2e80 JS |
3697 | int rc; |
3698 | ||
3699 | /* | |
3700 | * update on pci function's els xri-sgl list | |
3701 | */ | |
3702 | els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); | |
895427bd | 3703 | |
8a9d2e80 JS |
3704 | if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) { |
3705 | /* els xri-sgl expanded */ | |
3706 | xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt; | |
3707 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
3708 | "3157 ELS xri-sgl count increased from " | |
3709 | "%d to %d\n", phba->sli4_hba.els_xri_cnt, | |
3710 | els_xri_cnt); | |
3711 | /* allocate the additional els sgls */ | |
3712 | for (i = 0; i < xri_cnt; i++) { | |
3713 | sglq_entry = kzalloc(sizeof(struct lpfc_sglq), | |
3714 | GFP_KERNEL); | |
3715 | if (sglq_entry == NULL) { | |
3716 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
3717 | "2562 Failure to allocate an " | |
3718 | "ELS sgl entry:%d\n", i); | |
3719 | rc = -ENOMEM; | |
3720 | goto out_free_mem; | |
3721 | } | |
3722 | sglq_entry->buff_type = GEN_BUFF_TYPE; | |
3723 | sglq_entry->virt = lpfc_mbuf_alloc(phba, 0, | |
3724 | &sglq_entry->phys); | |
3725 | if (sglq_entry->virt == NULL) { | |
3726 | kfree(sglq_entry); | |
3727 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
3728 | "2563 Failure to allocate an " | |
3729 | "ELS mbuf:%d\n", i); | |
3730 | rc = -ENOMEM; | |
3731 | goto out_free_mem; | |
3732 | } | |
3733 | sglq_entry->sgl = sglq_entry->virt; | |
3734 | memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE); | |
3735 | sglq_entry->state = SGL_FREED; | |
3736 | list_add_tail(&sglq_entry->list, &els_sgl_list); | |
3737 | } | |
38c20673 | 3738 | spin_lock_irq(&phba->hbalock); |
895427bd JS |
3739 | spin_lock(&phba->sli4_hba.sgl_list_lock); |
3740 | list_splice_init(&els_sgl_list, | |
3741 | &phba->sli4_hba.lpfc_els_sgl_list); | |
3742 | spin_unlock(&phba->sli4_hba.sgl_list_lock); | |
38c20673 | 3743 | spin_unlock_irq(&phba->hbalock); |
8a9d2e80 JS |
3744 | } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) { |
3745 | /* els xri-sgl shrinked */ | |
3746 | xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt; | |
3747 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
3748 | "3158 ELS xri-sgl count decreased from " | |
3749 | "%d to %d\n", phba->sli4_hba.els_xri_cnt, | |
3750 | els_xri_cnt); | |
3751 | spin_lock_irq(&phba->hbalock); | |
895427bd JS |
3752 | spin_lock(&phba->sli4_hba.sgl_list_lock); |
3753 | list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, | |
3754 | &els_sgl_list); | |
8a9d2e80 JS |
3755 | /* release extra els sgls from list */ |
3756 | for (i = 0; i < xri_cnt; i++) { | |
3757 | list_remove_head(&els_sgl_list, | |
3758 | sglq_entry, struct lpfc_sglq, list); | |
3759 | if (sglq_entry) { | |
895427bd JS |
3760 | __lpfc_mbuf_free(phba, sglq_entry->virt, |
3761 | sglq_entry->phys); | |
8a9d2e80 JS |
3762 | kfree(sglq_entry); |
3763 | } | |
3764 | } | |
895427bd JS |
3765 | list_splice_init(&els_sgl_list, |
3766 | &phba->sli4_hba.lpfc_els_sgl_list); | |
3767 | spin_unlock(&phba->sli4_hba.sgl_list_lock); | |
8a9d2e80 JS |
3768 | spin_unlock_irq(&phba->hbalock); |
3769 | } else | |
3770 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
3771 | "3163 ELS xri-sgl count unchanged: %d\n", | |
3772 | els_xri_cnt); | |
3773 | phba->sli4_hba.els_xri_cnt = els_xri_cnt; | |
3774 | ||
3775 | /* update xris to els sgls on the list */ | |
3776 | sglq_entry = NULL; | |
3777 | sglq_entry_next = NULL; | |
3778 | list_for_each_entry_safe(sglq_entry, sglq_entry_next, | |
895427bd | 3779 | &phba->sli4_hba.lpfc_els_sgl_list, list) { |
8a9d2e80 JS |
3780 | lxri = lpfc_sli4_next_xritag(phba); |
3781 | if (lxri == NO_XRI) { | |
3782 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
3783 | "2400 Failed to allocate xri for " | |
3784 | "ELS sgl\n"); | |
3785 | rc = -ENOMEM; | |
3786 | goto out_free_mem; | |
3787 | } | |
3788 | sglq_entry->sli4_lxritag = lxri; | |
3789 | sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; | |
3790 | } | |
895427bd JS |
3791 | return 0; |
3792 | ||
3793 | out_free_mem: | |
3794 | lpfc_free_els_sgl_list(phba); | |
3795 | return rc; | |
3796 | } | |
3797 | ||
f358dd0c JS |
3798 | /** |
3799 | * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping | |
3800 | * @phba: pointer to lpfc hba data structure. | |
3801 | * | |
3802 | * This routine first calculates the sizes of the current els and allocated | |
3803 | * scsi sgl lists, and then goes through all sgls to updates the physical | |
3804 | * XRIs assigned due to port function reset. During port initialization, the | |
3805 | * current els and allocated scsi sgl lists are 0s. | |
3806 | * | |
3807 | * Return codes | |
3808 | * 0 - successful (for now, it always returns 0) | |
3809 | **/ | |
3810 | int | |
3811 | lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba) | |
3812 | { | |
3813 | struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL; | |
3814 | uint16_t i, lxri, xri_cnt, els_xri_cnt; | |
6c621a22 | 3815 | uint16_t nvmet_xri_cnt; |
f358dd0c JS |
3816 | LIST_HEAD(nvmet_sgl_list); |
3817 | int rc; | |
3818 | ||
3819 | /* | |
3820 | * update on pci function's nvmet xri-sgl list | |
3821 | */ | |
3822 | els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); | |
61f3d4bf | 3823 | |
6c621a22 JS |
3824 | /* For NVMET, ALL remaining XRIs are dedicated for IO processing */ |
3825 | nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt; | |
f358dd0c JS |
3826 | if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) { |
3827 | /* els xri-sgl expanded */ | |
3828 | xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt; | |
3829 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
3830 | "6302 NVMET xri-sgl cnt grew from %d to %d\n", | |
3831 | phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt); | |
3832 | /* allocate the additional nvmet sgls */ | |
3833 | for (i = 0; i < xri_cnt; i++) { | |
3834 | sglq_entry = kzalloc(sizeof(struct lpfc_sglq), | |
3835 | GFP_KERNEL); | |
3836 | if (sglq_entry == NULL) { | |
3837 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
3838 | "6303 Failure to allocate an " | |
3839 | "NVMET sgl entry:%d\n", i); | |
3840 | rc = -ENOMEM; | |
3841 | goto out_free_mem; | |
3842 | } | |
3843 | sglq_entry->buff_type = NVMET_BUFF_TYPE; | |
3844 | sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0, | |
3845 | &sglq_entry->phys); | |
3846 | if (sglq_entry->virt == NULL) { | |
3847 | kfree(sglq_entry); | |
3848 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
3849 | "6304 Failure to allocate an " | |
3850 | "NVMET buf:%d\n", i); | |
3851 | rc = -ENOMEM; | |
3852 | goto out_free_mem; | |
3853 | } | |
3854 | sglq_entry->sgl = sglq_entry->virt; | |
3855 | memset(sglq_entry->sgl, 0, | |
3856 | phba->cfg_sg_dma_buf_size); | |
3857 | sglq_entry->state = SGL_FREED; | |
3858 | list_add_tail(&sglq_entry->list, &nvmet_sgl_list); | |
3859 | } | |
3860 | spin_lock_irq(&phba->hbalock); | |
3861 | spin_lock(&phba->sli4_hba.sgl_list_lock); | |
3862 | list_splice_init(&nvmet_sgl_list, | |
3863 | &phba->sli4_hba.lpfc_nvmet_sgl_list); | |
3864 | spin_unlock(&phba->sli4_hba.sgl_list_lock); | |
3865 | spin_unlock_irq(&phba->hbalock); | |
3866 | } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) { | |
3867 | /* nvmet xri-sgl shrunk */ | |
3868 | xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt; | |
3869 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
3870 | "6305 NVMET xri-sgl count decreased from " | |
3871 | "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt, | |
3872 | nvmet_xri_cnt); | |
3873 | spin_lock_irq(&phba->hbalock); | |
3874 | spin_lock(&phba->sli4_hba.sgl_list_lock); | |
3875 | list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, | |
3876 | &nvmet_sgl_list); | |
3877 | /* release extra nvmet sgls from list */ | |
3878 | for (i = 0; i < xri_cnt; i++) { | |
3879 | list_remove_head(&nvmet_sgl_list, | |
3880 | sglq_entry, struct lpfc_sglq, list); | |
3881 | if (sglq_entry) { | |
3882 | lpfc_nvmet_buf_free(phba, sglq_entry->virt, | |
3883 | sglq_entry->phys); | |
3884 | kfree(sglq_entry); | |
3885 | } | |
3886 | } | |
3887 | list_splice_init(&nvmet_sgl_list, | |
3888 | &phba->sli4_hba.lpfc_nvmet_sgl_list); | |
3889 | spin_unlock(&phba->sli4_hba.sgl_list_lock); | |
3890 | spin_unlock_irq(&phba->hbalock); | |
3891 | } else | |
3892 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
3893 | "6306 NVMET xri-sgl count unchanged: %d\n", | |
3894 | nvmet_xri_cnt); | |
3895 | phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt; | |
3896 | ||
3897 | /* update xris to nvmet sgls on the list */ | |
3898 | sglq_entry = NULL; | |
3899 | sglq_entry_next = NULL; | |
3900 | list_for_each_entry_safe(sglq_entry, sglq_entry_next, | |
3901 | &phba->sli4_hba.lpfc_nvmet_sgl_list, list) { | |
3902 | lxri = lpfc_sli4_next_xritag(phba); | |
3903 | if (lxri == NO_XRI) { | |
3904 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
3905 | "6307 Failed to allocate xri for " | |
3906 | "NVMET sgl\n"); | |
3907 | rc = -ENOMEM; | |
3908 | goto out_free_mem; | |
3909 | } | |
3910 | sglq_entry->sli4_lxritag = lxri; | |
3911 | sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; | |
3912 | } | |
3913 | return 0; | |
3914 | ||
3915 | out_free_mem: | |
3916 | lpfc_free_nvmet_sgl_list(phba); | |
3917 | return rc; | |
3918 | } | |
3919 | ||
5e5b511d JS |
3920 | int |
3921 | lpfc_io_buf_flush(struct lpfc_hba *phba, struct list_head *cbuf) | |
3922 | { | |
3923 | LIST_HEAD(blist); | |
3924 | struct lpfc_sli4_hdw_queue *qp; | |
c490850a JS |
3925 | struct lpfc_io_buf *lpfc_cmd; |
3926 | struct lpfc_io_buf *iobufp, *prev_iobufp; | |
5e5b511d JS |
3927 | int idx, cnt, xri, inserted; |
3928 | ||
3929 | cnt = 0; | |
3930 | for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { | |
3931 | qp = &phba->sli4_hba.hdwq[idx]; | |
3932 | spin_lock_irq(&qp->io_buf_list_get_lock); | |
3933 | spin_lock(&qp->io_buf_list_put_lock); | |
3934 | ||
3935 | /* Take everything off the get and put lists */ | |
3936 | list_splice_init(&qp->lpfc_io_buf_list_get, &blist); | |
3937 | list_splice(&qp->lpfc_io_buf_list_put, &blist); | |
3938 | INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get); | |
3939 | INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put); | |
3940 | cnt += qp->get_io_bufs + qp->put_io_bufs; | |
3941 | qp->get_io_bufs = 0; | |
3942 | qp->put_io_bufs = 0; | |
3943 | qp->total_io_bufs = 0; | |
3944 | spin_unlock(&qp->io_buf_list_put_lock); | |
3945 | spin_unlock_irq(&qp->io_buf_list_get_lock); | |
3946 | } | |
3947 | ||
3948 | /* | |
3949 | * Take IO buffers off blist and put on cbuf sorted by XRI. | |
3950 | * This is because POST_SGL takes a sequential range of XRIs | |
3951 | * to post to the firmware. | |
3952 | */ | |
3953 | for (idx = 0; idx < cnt; idx++) { | |
c490850a | 3954 | list_remove_head(&blist, lpfc_cmd, struct lpfc_io_buf, list); |
5e5b511d JS |
3955 | if (!lpfc_cmd) |
3956 | return cnt; | |
3957 | if (idx == 0) { | |
3958 | list_add_tail(&lpfc_cmd->list, cbuf); | |
3959 | continue; | |
3960 | } | |
3961 | xri = lpfc_cmd->cur_iocbq.sli4_xritag; | |
3962 | inserted = 0; | |
3963 | prev_iobufp = NULL; | |
3964 | list_for_each_entry(iobufp, cbuf, list) { | |
3965 | if (xri < iobufp->cur_iocbq.sli4_xritag) { | |
3966 | if (prev_iobufp) | |
3967 | list_add(&lpfc_cmd->list, | |
3968 | &prev_iobufp->list); | |
3969 | else | |
3970 | list_add(&lpfc_cmd->list, cbuf); | |
3971 | inserted = 1; | |
3972 | break; | |
3973 | } | |
3974 | prev_iobufp = iobufp; | |
3975 | } | |
3976 | if (!inserted) | |
3977 | list_add_tail(&lpfc_cmd->list, cbuf); | |
3978 | } | |
3979 | return cnt; | |
3980 | } | |
3981 | ||
3982 | int | |
3983 | lpfc_io_buf_replenish(struct lpfc_hba *phba, struct list_head *cbuf) | |
3984 | { | |
3985 | struct lpfc_sli4_hdw_queue *qp; | |
c490850a | 3986 | struct lpfc_io_buf *lpfc_cmd; |
5e5b511d JS |
3987 | int idx, cnt; |
3988 | ||
3989 | qp = phba->sli4_hba.hdwq; | |
3990 | cnt = 0; | |
3991 | while (!list_empty(cbuf)) { | |
3992 | for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { | |
3993 | list_remove_head(cbuf, lpfc_cmd, | |
c490850a | 3994 | struct lpfc_io_buf, list); |
5e5b511d JS |
3995 | if (!lpfc_cmd) |
3996 | return cnt; | |
3997 | cnt++; | |
3998 | qp = &phba->sli4_hba.hdwq[idx]; | |
1fbf9742 JS |
3999 | lpfc_cmd->hdwq_no = idx; |
4000 | lpfc_cmd->hdwq = qp; | |
5e5b511d JS |
4001 | lpfc_cmd->cur_iocbq.wqe_cmpl = NULL; |
4002 | lpfc_cmd->cur_iocbq.iocb_cmpl = NULL; | |
4003 | spin_lock(&qp->io_buf_list_put_lock); | |
4004 | list_add_tail(&lpfc_cmd->list, | |
4005 | &qp->lpfc_io_buf_list_put); | |
4006 | qp->put_io_bufs++; | |
4007 | qp->total_io_bufs++; | |
4008 | spin_unlock(&qp->io_buf_list_put_lock); | |
4009 | } | |
4010 | } | |
4011 | return cnt; | |
4012 | } | |
4013 | ||
895427bd | 4014 | /** |
5e5b511d | 4015 | * lpfc_sli4_io_sgl_update - update xri-sgl sizing and mapping |
895427bd JS |
4016 | * @phba: pointer to lpfc hba data structure. |
4017 | * | |
4018 | * This routine first calculates the sizes of the current els and allocated | |
4019 | * scsi sgl lists, and then goes through all sgls to updates the physical | |
4020 | * XRIs assigned due to port function reset. During port initialization, the | |
4021 | * current els and allocated scsi sgl lists are 0s. | |
4022 | * | |
4023 | * Return codes | |
4024 | * 0 - successful (for now, it always returns 0) | |
4025 | **/ | |
4026 | int | |
5e5b511d | 4027 | lpfc_sli4_io_sgl_update(struct lpfc_hba *phba) |
895427bd | 4028 | { |
c490850a | 4029 | struct lpfc_io_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL; |
0794d601 | 4030 | uint16_t i, lxri, els_xri_cnt; |
5e5b511d JS |
4031 | uint16_t io_xri_cnt, io_xri_max; |
4032 | LIST_HEAD(io_sgl_list); | |
0794d601 | 4033 | int rc, cnt; |
8a9d2e80 | 4034 | |
895427bd | 4035 | /* |
0794d601 | 4036 | * update on pci function's allocated nvme xri-sgl list |
895427bd | 4037 | */ |
8a9d2e80 | 4038 | |
0794d601 JS |
4039 | /* maximum number of xris available for nvme buffers */ |
4040 | els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); | |
5e5b511d JS |
4041 | io_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt; |
4042 | phba->sli4_hba.io_xri_max = io_xri_max; | |
895427bd | 4043 | |
e8c0a779 | 4044 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, |
0794d601 JS |
4045 | "6074 Current allocated XRI sgl count:%d, " |
4046 | "maximum XRI count:%d\n", | |
5e5b511d JS |
4047 | phba->sli4_hba.io_xri_cnt, |
4048 | phba->sli4_hba.io_xri_max); | |
8a9d2e80 | 4049 | |
5e5b511d | 4050 | cnt = lpfc_io_buf_flush(phba, &io_sgl_list); |
8a9d2e80 | 4051 | |
5e5b511d | 4052 | if (phba->sli4_hba.io_xri_cnt > phba->sli4_hba.io_xri_max) { |
0794d601 | 4053 | /* max nvme xri shrunk below the allocated nvme buffers */ |
5e5b511d JS |
4054 | io_xri_cnt = phba->sli4_hba.io_xri_cnt - |
4055 | phba->sli4_hba.io_xri_max; | |
0794d601 | 4056 | /* release the extra allocated nvme buffers */ |
5e5b511d JS |
4057 | for (i = 0; i < io_xri_cnt; i++) { |
4058 | list_remove_head(&io_sgl_list, lpfc_ncmd, | |
c490850a | 4059 | struct lpfc_io_buf, list); |
0794d601 | 4060 | if (lpfc_ncmd) { |
771db5c0 | 4061 | dma_pool_free(phba->lpfc_sg_dma_buf_pool, |
0794d601 JS |
4062 | lpfc_ncmd->data, |
4063 | lpfc_ncmd->dma_handle); | |
4064 | kfree(lpfc_ncmd); | |
a2fc4aef | 4065 | } |
8a9d2e80 | 4066 | } |
5e5b511d | 4067 | phba->sli4_hba.io_xri_cnt -= io_xri_cnt; |
8a9d2e80 JS |
4068 | } |
4069 | ||
0794d601 JS |
4070 | /* update xris associated to remaining allocated nvme buffers */ |
4071 | lpfc_ncmd = NULL; | |
4072 | lpfc_ncmd_next = NULL; | |
5e5b511d | 4073 | phba->sli4_hba.io_xri_cnt = cnt; |
0794d601 | 4074 | list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, |
5e5b511d | 4075 | &io_sgl_list, list) { |
8a9d2e80 JS |
4076 | lxri = lpfc_sli4_next_xritag(phba); |
4077 | if (lxri == NO_XRI) { | |
4078 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
0794d601 JS |
4079 | "6075 Failed to allocate xri for " |
4080 | "nvme buffer\n"); | |
8a9d2e80 JS |
4081 | rc = -ENOMEM; |
4082 | goto out_free_mem; | |
4083 | } | |
0794d601 JS |
4084 | lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri; |
4085 | lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri]; | |
8a9d2e80 | 4086 | } |
5e5b511d | 4087 | cnt = lpfc_io_buf_replenish(phba, &io_sgl_list); |
dea3101e | 4088 | return 0; |
8a9d2e80 JS |
4089 | |
4090 | out_free_mem: | |
5e5b511d | 4091 | lpfc_io_free(phba); |
8a9d2e80 | 4092 | return rc; |
dea3101e | 4093 | } |
4094 | ||
0794d601 | 4095 | /** |
5e5b511d | 4096 | * lpfc_new_io_buf - IO buffer allocator for HBA with SLI4 IF spec |
0794d601 JS |
4097 | * @vport: The virtual port for which this call being executed. |
4098 | * @num_to_allocate: The requested number of buffers to allocate. | |
4099 | * | |
4100 | * This routine allocates nvme buffers for device with SLI-4 interface spec, | |
4101 | * the nvme buffer contains all the necessary information needed to initiate | |
4102 | * an I/O. After allocating up to @num_to_allocate IO buffers and put | |
4103 | * them on a list, it post them to the port by using SGL block post. | |
4104 | * | |
4105 | * Return codes: | |
5e5b511d | 4106 | * int - number of IO buffers that were allocated and posted. |
0794d601 JS |
4107 | * 0 = failure, less than num_to_alloc is a partial failure. |
4108 | **/ | |
4109 | int | |
5e5b511d | 4110 | lpfc_new_io_buf(struct lpfc_hba *phba, int num_to_alloc) |
0794d601 | 4111 | { |
c490850a | 4112 | struct lpfc_io_buf *lpfc_ncmd; |
0794d601 JS |
4113 | struct lpfc_iocbq *pwqeq; |
4114 | uint16_t iotag, lxri = 0; | |
4115 | int bcnt, num_posted; | |
4116 | LIST_HEAD(prep_nblist); | |
4117 | LIST_HEAD(post_nblist); | |
4118 | LIST_HEAD(nvme_nblist); | |
4119 | ||
4120 | /* Sanity check to ensure our sizing is right for both SCSI and NVME */ | |
c490850a | 4121 | if (sizeof(struct lpfc_io_buf) > LPFC_COMMON_IO_BUF_SZ) { |
0794d601 | 4122 | lpfc_printf_log(phba, KERN_ERR, LOG_FCP, |
f996861b | 4123 | "6426 Common buffer size %zd exceeds %d\n", |
c490850a JS |
4124 | sizeof(struct lpfc_io_buf), |
4125 | LPFC_COMMON_IO_BUF_SZ); | |
0794d601 JS |
4126 | return 0; |
4127 | } | |
4128 | ||
5e5b511d | 4129 | phba->sli4_hba.io_xri_cnt = 0; |
0794d601 JS |
4130 | for (bcnt = 0; bcnt < num_to_alloc; bcnt++) { |
4131 | lpfc_ncmd = kzalloc(LPFC_COMMON_IO_BUF_SZ, GFP_KERNEL); | |
4132 | if (!lpfc_ncmd) | |
4133 | break; | |
4134 | /* | |
4135 | * Get memory from the pci pool to map the virt space to | |
4136 | * pci bus space for an I/O. The DMA buffer includes the | |
4137 | * number of SGE's necessary to support the sg_tablesize. | |
4138 | */ | |
a5c990ee TM |
4139 | lpfc_ncmd->data = dma_pool_zalloc(phba->lpfc_sg_dma_buf_pool, |
4140 | GFP_KERNEL, | |
4141 | &lpfc_ncmd->dma_handle); | |
0794d601 JS |
4142 | if (!lpfc_ncmd->data) { |
4143 | kfree(lpfc_ncmd); | |
4144 | break; | |
4145 | } | |
0794d601 | 4146 | |
d79c9e9d JS |
4147 | if (phba->cfg_xpsgl && !phba->nvmet_support) { |
4148 | INIT_LIST_HEAD(&lpfc_ncmd->dma_sgl_xtra_list); | |
4149 | } else { | |
4150 | /* | |
4151 | * 4K Page alignment is CRITICAL to BlockGuard, double | |
4152 | * check to be sure. | |
4153 | */ | |
4154 | if ((phba->sli3_options & LPFC_SLI3_BG_ENABLED) && | |
4155 | (((unsigned long)(lpfc_ncmd->data) & | |
4156 | (unsigned long)(SLI4_PAGE_SIZE - 1)) != 0)) { | |
4157 | lpfc_printf_log(phba, KERN_ERR, LOG_FCP, | |
4158 | "3369 Memory alignment err: " | |
4159 | "addr=%lx\n", | |
4160 | (unsigned long)lpfc_ncmd->data); | |
4161 | dma_pool_free(phba->lpfc_sg_dma_buf_pool, | |
4162 | lpfc_ncmd->data, | |
4163 | lpfc_ncmd->dma_handle); | |
4164 | kfree(lpfc_ncmd); | |
4165 | break; | |
4166 | } | |
0794d601 JS |
4167 | } |
4168 | ||
d79c9e9d JS |
4169 | INIT_LIST_HEAD(&lpfc_ncmd->dma_cmd_rsp_list); |
4170 | ||
0794d601 JS |
4171 | lxri = lpfc_sli4_next_xritag(phba); |
4172 | if (lxri == NO_XRI) { | |
4173 | dma_pool_free(phba->lpfc_sg_dma_buf_pool, | |
4174 | lpfc_ncmd->data, lpfc_ncmd->dma_handle); | |
4175 | kfree(lpfc_ncmd); | |
4176 | break; | |
4177 | } | |
4178 | pwqeq = &lpfc_ncmd->cur_iocbq; | |
4179 | ||
4180 | /* Allocate iotag for lpfc_ncmd->cur_iocbq. */ | |
4181 | iotag = lpfc_sli_next_iotag(phba, pwqeq); | |
4182 | if (iotag == 0) { | |
4183 | dma_pool_free(phba->lpfc_sg_dma_buf_pool, | |
4184 | lpfc_ncmd->data, lpfc_ncmd->dma_handle); | |
4185 | kfree(lpfc_ncmd); | |
4186 | lpfc_printf_log(phba, KERN_ERR, LOG_NVME_IOERR, | |
4187 | "6121 Failed to allocate IOTAG for" | |
4188 | " XRI:0x%x\n", lxri); | |
4189 | lpfc_sli4_free_xri(phba, lxri); | |
4190 | break; | |
4191 | } | |
4192 | pwqeq->sli4_lxritag = lxri; | |
4193 | pwqeq->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; | |
4194 | pwqeq->context1 = lpfc_ncmd; | |
4195 | ||
4196 | /* Initialize local short-hand pointers. */ | |
4197 | lpfc_ncmd->dma_sgl = lpfc_ncmd->data; | |
4198 | lpfc_ncmd->dma_phys_sgl = lpfc_ncmd->dma_handle; | |
4199 | lpfc_ncmd->cur_iocbq.context1 = lpfc_ncmd; | |
c2017260 | 4200 | spin_lock_init(&lpfc_ncmd->buf_lock); |
0794d601 JS |
4201 | |
4202 | /* add the nvme buffer to a post list */ | |
4203 | list_add_tail(&lpfc_ncmd->list, &post_nblist); | |
5e5b511d | 4204 | phba->sli4_hba.io_xri_cnt++; |
0794d601 JS |
4205 | } |
4206 | lpfc_printf_log(phba, KERN_INFO, LOG_NVME, | |
4207 | "6114 Allocate %d out of %d requested new NVME " | |
4208 | "buffers\n", bcnt, num_to_alloc); | |
4209 | ||
4210 | /* post the list of nvme buffer sgls to port if available */ | |
4211 | if (!list_empty(&post_nblist)) | |
5e5b511d | 4212 | num_posted = lpfc_sli4_post_io_sgl_list( |
0794d601 JS |
4213 | phba, &post_nblist, bcnt); |
4214 | else | |
4215 | num_posted = 0; | |
4216 | ||
4217 | return num_posted; | |
4218 | } | |
4219 | ||
96418b5e JS |
4220 | static uint64_t |
4221 | lpfc_get_wwpn(struct lpfc_hba *phba) | |
4222 | { | |
4223 | uint64_t wwn; | |
4224 | int rc; | |
4225 | LPFC_MBOXQ_t *mboxq; | |
4226 | MAILBOX_t *mb; | |
4227 | ||
96418b5e JS |
4228 | mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, |
4229 | GFP_KERNEL); | |
4230 | if (!mboxq) | |
4231 | return (uint64_t)-1; | |
4232 | ||
4233 | /* First get WWN of HBA instance */ | |
4234 | lpfc_read_nv(phba, mboxq); | |
4235 | rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
4236 | if (rc != MBX_SUCCESS) { | |
4237 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
4238 | "6019 Mailbox failed , mbxCmd x%x " | |
4239 | "READ_NV, mbxStatus x%x\n", | |
4240 | bf_get(lpfc_mqe_command, &mboxq->u.mqe), | |
4241 | bf_get(lpfc_mqe_status, &mboxq->u.mqe)); | |
4242 | mempool_free(mboxq, phba->mbox_mem_pool); | |
4243 | return (uint64_t) -1; | |
4244 | } | |
4245 | mb = &mboxq->u.mb; | |
4246 | memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t)); | |
4247 | /* wwn is WWPN of HBA instance */ | |
4248 | mempool_free(mboxq, phba->mbox_mem_pool); | |
4249 | if (phba->sli_rev == LPFC_SLI_REV4) | |
4250 | return be64_to_cpu(wwn); | |
4251 | else | |
286871a6 | 4252 | return rol64(wwn, 32); |
96418b5e JS |
4253 | } |
4254 | ||
e59058c4 | 4255 | /** |
3621a710 | 4256 | * lpfc_create_port - Create an FC port |
e59058c4 JS |
4257 | * @phba: pointer to lpfc hba data structure. |
4258 | * @instance: a unique integer ID to this FC port. | |
4259 | * @dev: pointer to the device data structure. | |
4260 | * | |
4261 | * This routine creates a FC port for the upper layer protocol. The FC port | |
4262 | * can be created on top of either a physical port or a virtual port provided | |
4263 | * by the HBA. This routine also allocates a SCSI host data structure (shost) | |
4264 | * and associates the FC port created before adding the shost into the SCSI | |
4265 | * layer. | |
4266 | * | |
4267 | * Return codes | |
4268 | * @vport - pointer to the virtual N_Port data structure. | |
4269 | * NULL - port create failed. | |
4270 | **/ | |
2e0fef85 | 4271 | struct lpfc_vport * |
3de2a653 | 4272 | lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev) |
47a8617c | 4273 | { |
2e0fef85 | 4274 | struct lpfc_vport *vport; |
895427bd | 4275 | struct Scsi_Host *shost = NULL; |
2e0fef85 | 4276 | int error = 0; |
96418b5e JS |
4277 | int i; |
4278 | uint64_t wwn; | |
4279 | bool use_no_reset_hba = false; | |
56bc8028 | 4280 | int rc; |
96418b5e | 4281 | |
56bc8028 JS |
4282 | if (lpfc_no_hba_reset_cnt) { |
4283 | if (phba->sli_rev < LPFC_SLI_REV4 && | |
4284 | dev == &phba->pcidev->dev) { | |
4285 | /* Reset the port first */ | |
4286 | lpfc_sli_brdrestart(phba); | |
4287 | rc = lpfc_sli_chipset_init(phba); | |
4288 | if (rc) | |
4289 | return NULL; | |
4290 | } | |
4291 | wwn = lpfc_get_wwpn(phba); | |
4292 | } | |
96418b5e JS |
4293 | |
4294 | for (i = 0; i < lpfc_no_hba_reset_cnt; i++) { | |
4295 | if (wwn == lpfc_no_hba_reset[i]) { | |
4296 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
4297 | "6020 Setting use_no_reset port=%llx\n", | |
4298 | wwn); | |
4299 | use_no_reset_hba = true; | |
4300 | break; | |
4301 | } | |
4302 | } | |
47a8617c | 4303 | |
895427bd JS |
4304 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) { |
4305 | if (dev != &phba->pcidev->dev) { | |
4306 | shost = scsi_host_alloc(&lpfc_vport_template, | |
4307 | sizeof(struct lpfc_vport)); | |
4308 | } else { | |
96418b5e | 4309 | if (!use_no_reset_hba) |
895427bd JS |
4310 | shost = scsi_host_alloc(&lpfc_template, |
4311 | sizeof(struct lpfc_vport)); | |
4312 | else | |
96418b5e | 4313 | shost = scsi_host_alloc(&lpfc_template_no_hr, |
895427bd JS |
4314 | sizeof(struct lpfc_vport)); |
4315 | } | |
4316 | } else if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
4317 | shost = scsi_host_alloc(&lpfc_template_nvme, | |
ea4142f6 JS |
4318 | sizeof(struct lpfc_vport)); |
4319 | } | |
2e0fef85 JS |
4320 | if (!shost) |
4321 | goto out; | |
47a8617c | 4322 | |
2e0fef85 JS |
4323 | vport = (struct lpfc_vport *) shost->hostdata; |
4324 | vport->phba = phba; | |
2e0fef85 | 4325 | vport->load_flag |= FC_LOADING; |
92d7f7b0 | 4326 | vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI; |
7f5f3d0d | 4327 | vport->fc_rscn_flush = 0; |
3de2a653 | 4328 | lpfc_get_vport_cfgparam(vport); |
895427bd | 4329 | |
f6e84790 JS |
4330 | /* Adjust value in vport */ |
4331 | vport->cfg_enable_fc4_type = phba->cfg_enable_fc4_type; | |
4332 | ||
2e0fef85 JS |
4333 | shost->unique_id = instance; |
4334 | shost->max_id = LPFC_MAX_TARGET; | |
3de2a653 | 4335 | shost->max_lun = vport->cfg_max_luns; |
2e0fef85 JS |
4336 | shost->this_id = -1; |
4337 | shost->max_cmd_len = 16; | |
6a828b0f | 4338 | |
da0436e9 | 4339 | if (phba->sli_rev == LPFC_SLI_REV4) { |
6a828b0f JS |
4340 | if (phba->cfg_fcp_io_sched == LPFC_FCP_SCHED_BY_HDWQ) |
4341 | shost->nr_hw_queues = phba->cfg_hdw_queue; | |
4342 | else | |
4343 | shost->nr_hw_queues = phba->sli4_hba.num_present_cpu; | |
4344 | ||
28baac74 | 4345 | shost->dma_boundary = |
cb5172ea | 4346 | phba->sli4_hba.pc_sli4_params.sge_supp_len-1; |
d79c9e9d JS |
4347 | |
4348 | if (phba->cfg_xpsgl && !phba->nvmet_support) | |
4349 | shost->sg_tablesize = LPFC_MAX_SG_TABLESIZE; | |
4350 | else | |
4351 | shost->sg_tablesize = phba->cfg_scsi_seg_cnt; | |
ace44e48 JS |
4352 | } else |
4353 | /* SLI-3 has a limited number of hardware queues (3), | |
4354 | * thus there is only one for FCP processing. | |
4355 | */ | |
4356 | shost->nr_hw_queues = 1; | |
81301a9b | 4357 | |
47a8617c | 4358 | /* |
2e0fef85 JS |
4359 | * Set initial can_queue value since 0 is no longer supported and |
4360 | * scsi_add_host will fail. This will be adjusted later based on the | |
4361 | * max xri value determined in hba setup. | |
47a8617c | 4362 | */ |
2e0fef85 | 4363 | shost->can_queue = phba->cfg_hba_queue_depth - 10; |
3de2a653 | 4364 | if (dev != &phba->pcidev->dev) { |
92d7f7b0 JS |
4365 | shost->transportt = lpfc_vport_transport_template; |
4366 | vport->port_type = LPFC_NPIV_PORT; | |
4367 | } else { | |
4368 | shost->transportt = lpfc_transport_template; | |
4369 | vport->port_type = LPFC_PHYSICAL_PORT; | |
4370 | } | |
47a8617c | 4371 | |
2e0fef85 JS |
4372 | /* Initialize all internally managed lists. */ |
4373 | INIT_LIST_HEAD(&vport->fc_nodes); | |
da0436e9 | 4374 | INIT_LIST_HEAD(&vport->rcv_buffer_list); |
2e0fef85 | 4375 | spin_lock_init(&vport->work_port_lock); |
47a8617c | 4376 | |
f22eb4d3 | 4377 | timer_setup(&vport->fc_disctmo, lpfc_disc_timeout, 0); |
47a8617c | 4378 | |
f22eb4d3 | 4379 | timer_setup(&vport->els_tmofunc, lpfc_els_timeout, 0); |
92494144 | 4380 | |
f22eb4d3 | 4381 | timer_setup(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo, 0); |
92494144 | 4382 | |
aa6ff309 JS |
4383 | if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) |
4384 | lpfc_setup_bg(phba, shost); | |
4385 | ||
d139b9bd | 4386 | error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev); |
2e0fef85 JS |
4387 | if (error) |
4388 | goto out_put_shost; | |
47a8617c | 4389 | |
523128e5 | 4390 | spin_lock_irq(&phba->port_list_lock); |
2e0fef85 | 4391 | list_add_tail(&vport->listentry, &phba->port_list); |
523128e5 | 4392 | spin_unlock_irq(&phba->port_list_lock); |
2e0fef85 | 4393 | return vport; |
47a8617c | 4394 | |
2e0fef85 JS |
4395 | out_put_shost: |
4396 | scsi_host_put(shost); | |
4397 | out: | |
4398 | return NULL; | |
47a8617c JS |
4399 | } |
4400 | ||
e59058c4 | 4401 | /** |
3621a710 | 4402 | * destroy_port - destroy an FC port |
e59058c4 JS |
4403 | * @vport: pointer to an lpfc virtual N_Port data structure. |
4404 | * | |
4405 | * This routine destroys a FC port from the upper layer protocol. All the | |
4406 | * resources associated with the port are released. | |
4407 | **/ | |
2e0fef85 JS |
4408 | void |
4409 | destroy_port(struct lpfc_vport *vport) | |
47a8617c | 4410 | { |
92d7f7b0 JS |
4411 | struct Scsi_Host *shost = lpfc_shost_from_vport(vport); |
4412 | struct lpfc_hba *phba = vport->phba; | |
47a8617c | 4413 | |
858c9f6c | 4414 | lpfc_debugfs_terminate(vport); |
92d7f7b0 JS |
4415 | fc_remove_host(shost); |
4416 | scsi_remove_host(shost); | |
47a8617c | 4417 | |
523128e5 | 4418 | spin_lock_irq(&phba->port_list_lock); |
92d7f7b0 | 4419 | list_del_init(&vport->listentry); |
523128e5 | 4420 | spin_unlock_irq(&phba->port_list_lock); |
47a8617c | 4421 | |
92d7f7b0 | 4422 | lpfc_cleanup(vport); |
47a8617c | 4423 | return; |
47a8617c JS |
4424 | } |
4425 | ||
e59058c4 | 4426 | /** |
3621a710 | 4427 | * lpfc_get_instance - Get a unique integer ID |
e59058c4 JS |
4428 | * |
4429 | * This routine allocates a unique integer ID from lpfc_hba_index pool. It | |
4430 | * uses the kernel idr facility to perform the task. | |
4431 | * | |
4432 | * Return codes: | |
4433 | * instance - a unique integer ID allocated as the new instance. | |
4434 | * -1 - lpfc get instance failed. | |
4435 | **/ | |
92d7f7b0 JS |
4436 | int |
4437 | lpfc_get_instance(void) | |
4438 | { | |
ab516036 TH |
4439 | int ret; |
4440 | ||
4441 | ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL); | |
4442 | return ret < 0 ? -1 : ret; | |
47a8617c JS |
4443 | } |
4444 | ||
e59058c4 | 4445 | /** |
3621a710 | 4446 | * lpfc_scan_finished - method for SCSI layer to detect whether scan is done |
e59058c4 JS |
4447 | * @shost: pointer to SCSI host data structure. |
4448 | * @time: elapsed time of the scan in jiffies. | |
4449 | * | |
4450 | * This routine is called by the SCSI layer with a SCSI host to determine | |
4451 | * whether the scan host is finished. | |
4452 | * | |
4453 | * Note: there is no scan_start function as adapter initialization will have | |
4454 | * asynchronously kicked off the link initialization. | |
4455 | * | |
4456 | * Return codes | |
4457 | * 0 - SCSI host scan is not over yet. | |
4458 | * 1 - SCSI host scan is over. | |
4459 | **/ | |
47a8617c JS |
4460 | int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time) |
4461 | { | |
2e0fef85 JS |
4462 | struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; |
4463 | struct lpfc_hba *phba = vport->phba; | |
858c9f6c | 4464 | int stat = 0; |
47a8617c | 4465 | |
858c9f6c JS |
4466 | spin_lock_irq(shost->host_lock); |
4467 | ||
51ef4c26 | 4468 | if (vport->load_flag & FC_UNLOADING) { |
858c9f6c JS |
4469 | stat = 1; |
4470 | goto finished; | |
4471 | } | |
256ec0d0 | 4472 | if (time >= msecs_to_jiffies(30 * 1000)) { |
2e0fef85 | 4473 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
e8b62011 JS |
4474 | "0461 Scanning longer than 30 " |
4475 | "seconds. Continuing initialization\n"); | |
858c9f6c | 4476 | stat = 1; |
47a8617c | 4477 | goto finished; |
2e0fef85 | 4478 | } |
256ec0d0 JS |
4479 | if (time >= msecs_to_jiffies(15 * 1000) && |
4480 | phba->link_state <= LPFC_LINK_DOWN) { | |
2e0fef85 | 4481 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
e8b62011 JS |
4482 | "0465 Link down longer than 15 " |
4483 | "seconds. Continuing initialization\n"); | |
858c9f6c | 4484 | stat = 1; |
47a8617c | 4485 | goto finished; |
2e0fef85 | 4486 | } |
47a8617c | 4487 | |
2e0fef85 | 4488 | if (vport->port_state != LPFC_VPORT_READY) |
858c9f6c | 4489 | goto finished; |
2e0fef85 | 4490 | if (vport->num_disc_nodes || vport->fc_prli_sent) |
858c9f6c | 4491 | goto finished; |
256ec0d0 | 4492 | if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000)) |
858c9f6c | 4493 | goto finished; |
2e0fef85 | 4494 | if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0) |
858c9f6c JS |
4495 | goto finished; |
4496 | ||
4497 | stat = 1; | |
47a8617c JS |
4498 | |
4499 | finished: | |
858c9f6c JS |
4500 | spin_unlock_irq(shost->host_lock); |
4501 | return stat; | |
92d7f7b0 | 4502 | } |
47a8617c | 4503 | |
3999df75 | 4504 | static void lpfc_host_supported_speeds_set(struct Scsi_Host *shost) |
cd71348a JS |
4505 | { |
4506 | struct lpfc_vport *vport = (struct lpfc_vport *)shost->hostdata; | |
4507 | struct lpfc_hba *phba = vport->phba; | |
4508 | ||
4509 | fc_host_supported_speeds(shost) = 0; | |
1dc5ec24 JS |
4510 | if (phba->lmt & LMT_128Gb) |
4511 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_128GBIT; | |
cd71348a JS |
4512 | if (phba->lmt & LMT_64Gb) |
4513 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_64GBIT; | |
4514 | if (phba->lmt & LMT_32Gb) | |
4515 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT; | |
4516 | if (phba->lmt & LMT_16Gb) | |
4517 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT; | |
4518 | if (phba->lmt & LMT_10Gb) | |
4519 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT; | |
4520 | if (phba->lmt & LMT_8Gb) | |
4521 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT; | |
4522 | if (phba->lmt & LMT_4Gb) | |
4523 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT; | |
4524 | if (phba->lmt & LMT_2Gb) | |
4525 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT; | |
4526 | if (phba->lmt & LMT_1Gb) | |
4527 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT; | |
4528 | } | |
4529 | ||
e59058c4 | 4530 | /** |
3621a710 | 4531 | * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port |
e59058c4 JS |
4532 | * @shost: pointer to SCSI host data structure. |
4533 | * | |
4534 | * This routine initializes a given SCSI host attributes on a FC port. The | |
4535 | * SCSI host can be either on top of a physical port or a virtual port. | |
4536 | **/ | |
92d7f7b0 JS |
4537 | void lpfc_host_attrib_init(struct Scsi_Host *shost) |
4538 | { | |
4539 | struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; | |
4540 | struct lpfc_hba *phba = vport->phba; | |
47a8617c | 4541 | /* |
2e0fef85 | 4542 | * Set fixed host attributes. Must done after lpfc_sli_hba_setup(). |
47a8617c JS |
4543 | */ |
4544 | ||
2e0fef85 JS |
4545 | fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn); |
4546 | fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn); | |
47a8617c JS |
4547 | fc_host_supported_classes(shost) = FC_COS_CLASS3; |
4548 | ||
4549 | memset(fc_host_supported_fc4s(shost), 0, | |
2e0fef85 | 4550 | sizeof(fc_host_supported_fc4s(shost))); |
47a8617c JS |
4551 | fc_host_supported_fc4s(shost)[2] = 1; |
4552 | fc_host_supported_fc4s(shost)[7] = 1; | |
4553 | ||
92d7f7b0 JS |
4554 | lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost), |
4555 | sizeof fc_host_symbolic_name(shost)); | |
47a8617c | 4556 | |
cd71348a | 4557 | lpfc_host_supported_speeds_set(shost); |
47a8617c JS |
4558 | |
4559 | fc_host_maxframe_size(shost) = | |
2e0fef85 JS |
4560 | (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) | |
4561 | (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb; | |
47a8617c | 4562 | |
0af5d708 MC |
4563 | fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo; |
4564 | ||
47a8617c JS |
4565 | /* This value is also unchanging */ |
4566 | memset(fc_host_active_fc4s(shost), 0, | |
2e0fef85 | 4567 | sizeof(fc_host_active_fc4s(shost))); |
47a8617c JS |
4568 | fc_host_active_fc4s(shost)[2] = 1; |
4569 | fc_host_active_fc4s(shost)[7] = 1; | |
4570 | ||
92d7f7b0 | 4571 | fc_host_max_npiv_vports(shost) = phba->max_vpi; |
47a8617c | 4572 | spin_lock_irq(shost->host_lock); |
51ef4c26 | 4573 | vport->load_flag &= ~FC_LOADING; |
47a8617c | 4574 | spin_unlock_irq(shost->host_lock); |
47a8617c | 4575 | } |
dea3101e | 4576 | |
e59058c4 | 4577 | /** |
da0436e9 | 4578 | * lpfc_stop_port_s3 - Stop SLI3 device port |
e59058c4 JS |
4579 | * @phba: pointer to lpfc hba data structure. |
4580 | * | |
da0436e9 JS |
4581 | * This routine is invoked to stop an SLI3 device port, it stops the device |
4582 | * from generating interrupts and stops the device driver's timers for the | |
4583 | * device. | |
e59058c4 | 4584 | **/ |
da0436e9 JS |
4585 | static void |
4586 | lpfc_stop_port_s3(struct lpfc_hba *phba) | |
db2378e0 | 4587 | { |
da0436e9 JS |
4588 | /* Clear all interrupt enable conditions */ |
4589 | writel(0, phba->HCregaddr); | |
4590 | readl(phba->HCregaddr); /* flush */ | |
4591 | /* Clear all pending interrupts */ | |
4592 | writel(0xffffffff, phba->HAregaddr); | |
4593 | readl(phba->HAregaddr); /* flush */ | |
db2378e0 | 4594 | |
da0436e9 JS |
4595 | /* Reset some HBA SLI setup states */ |
4596 | lpfc_stop_hba_timers(phba); | |
4597 | phba->pport->work_port_events = 0; | |
4598 | } | |
db2378e0 | 4599 | |
da0436e9 JS |
4600 | /** |
4601 | * lpfc_stop_port_s4 - Stop SLI4 device port | |
4602 | * @phba: pointer to lpfc hba data structure. | |
4603 | * | |
4604 | * This routine is invoked to stop an SLI4 device port, it stops the device | |
4605 | * from generating interrupts and stops the device driver's timers for the | |
4606 | * device. | |
4607 | **/ | |
4608 | static void | |
4609 | lpfc_stop_port_s4(struct lpfc_hba *phba) | |
4610 | { | |
4611 | /* Reset some HBA SLI4 setup states */ | |
4612 | lpfc_stop_hba_timers(phba); | |
cdb42bec JS |
4613 | if (phba->pport) |
4614 | phba->pport->work_port_events = 0; | |
da0436e9 | 4615 | phba->sli4_hba.intr_enable = 0; |
da0436e9 | 4616 | } |
9399627f | 4617 | |
da0436e9 JS |
4618 | /** |
4619 | * lpfc_stop_port - Wrapper function for stopping hba port | |
4620 | * @phba: Pointer to HBA context object. | |
4621 | * | |
4622 | * This routine wraps the actual SLI3 or SLI4 hba stop port routine from | |
4623 | * the API jump table function pointer from the lpfc_hba struct. | |
4624 | **/ | |
4625 | void | |
4626 | lpfc_stop_port(struct lpfc_hba *phba) | |
4627 | { | |
4628 | phba->lpfc_stop_port(phba); | |
f485c18d DK |
4629 | |
4630 | if (phba->wq) | |
4631 | flush_workqueue(phba->wq); | |
da0436e9 | 4632 | } |
db2378e0 | 4633 | |
ecfd03c6 JS |
4634 | /** |
4635 | * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer | |
4636 | * @phba: Pointer to hba for which this call is being executed. | |
4637 | * | |
4638 | * This routine starts the timer waiting for the FCF rediscovery to complete. | |
4639 | **/ | |
4640 | void | |
4641 | lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba) | |
4642 | { | |
4643 | unsigned long fcf_redisc_wait_tmo = | |
4644 | (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO)); | |
4645 | /* Start fcf rediscovery wait period timer */ | |
4646 | mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo); | |
4647 | spin_lock_irq(&phba->hbalock); | |
4648 | /* Allow action to new fcf asynchronous event */ | |
4649 | phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE); | |
4650 | /* Mark the FCF rediscovery pending state */ | |
4651 | phba->fcf.fcf_flag |= FCF_REDISC_PEND; | |
4652 | spin_unlock_irq(&phba->hbalock); | |
4653 | } | |
4654 | ||
4655 | /** | |
4656 | * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout | |
4657 | * @ptr: Map to lpfc_hba data structure pointer. | |
4658 | * | |
4659 | * This routine is invoked when waiting for FCF table rediscover has been | |
4660 | * timed out. If new FCF record(s) has (have) been discovered during the | |
4661 | * wait period, a new FCF event shall be added to the FCOE async event | |
4662 | * list, and then worker thread shall be waked up for processing from the | |
4663 | * worker thread context. | |
4664 | **/ | |
e399b228 | 4665 | static void |
f22eb4d3 | 4666 | lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list *t) |
ecfd03c6 | 4667 | { |
f22eb4d3 | 4668 | struct lpfc_hba *phba = from_timer(phba, t, fcf.redisc_wait); |
ecfd03c6 JS |
4669 | |
4670 | /* Don't send FCF rediscovery event if timer cancelled */ | |
4671 | spin_lock_irq(&phba->hbalock); | |
4672 | if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) { | |
4673 | spin_unlock_irq(&phba->hbalock); | |
4674 | return; | |
4675 | } | |
4676 | /* Clear FCF rediscovery timer pending flag */ | |
4677 | phba->fcf.fcf_flag &= ~FCF_REDISC_PEND; | |
4678 | /* FCF rediscovery event to worker thread */ | |
4679 | phba->fcf.fcf_flag |= FCF_REDISC_EVT; | |
4680 | spin_unlock_irq(&phba->hbalock); | |
0c9ab6f5 | 4681 | lpfc_printf_log(phba, KERN_INFO, LOG_FIP, |
a93ff37a | 4682 | "2776 FCF rediscover quiescent timer expired\n"); |
ecfd03c6 JS |
4683 | /* wake up worker thread */ |
4684 | lpfc_worker_wake_up(phba); | |
4685 | } | |
4686 | ||
e59058c4 | 4687 | /** |
da0436e9 | 4688 | * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code |
e59058c4 | 4689 | * @phba: pointer to lpfc hba data structure. |
da0436e9 | 4690 | * @acqe_link: pointer to the async link completion queue entry. |
e59058c4 | 4691 | * |
23288b78 | 4692 | * This routine is to parse the SLI4 link-attention link fault code. |
e59058c4 | 4693 | **/ |
23288b78 | 4694 | static void |
da0436e9 JS |
4695 | lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba, |
4696 | struct lpfc_acqe_link *acqe_link) | |
db2378e0 | 4697 | { |
da0436e9 JS |
4698 | switch (bf_get(lpfc_acqe_link_fault, acqe_link)) { |
4699 | case LPFC_ASYNC_LINK_FAULT_NONE: | |
4700 | case LPFC_ASYNC_LINK_FAULT_LOCAL: | |
4701 | case LPFC_ASYNC_LINK_FAULT_REMOTE: | |
23288b78 | 4702 | case LPFC_ASYNC_LINK_FAULT_LR_LRR: |
da0436e9 JS |
4703 | break; |
4704 | default: | |
4705 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
23288b78 | 4706 | "0398 Unknown link fault code: x%x\n", |
da0436e9 | 4707 | bf_get(lpfc_acqe_link_fault, acqe_link)); |
da0436e9 JS |
4708 | break; |
4709 | } | |
db2378e0 JS |
4710 | } |
4711 | ||
5b75da2f | 4712 | /** |
da0436e9 | 4713 | * lpfc_sli4_parse_latt_type - Parse sli4 link attention type |
5b75da2f | 4714 | * @phba: pointer to lpfc hba data structure. |
da0436e9 | 4715 | * @acqe_link: pointer to the async link completion queue entry. |
5b75da2f | 4716 | * |
da0436e9 JS |
4717 | * This routine is to parse the SLI4 link attention type and translate it |
4718 | * into the base driver's link attention type coding. | |
5b75da2f | 4719 | * |
da0436e9 JS |
4720 | * Return: Link attention type in terms of base driver's coding. |
4721 | **/ | |
4722 | static uint8_t | |
4723 | lpfc_sli4_parse_latt_type(struct lpfc_hba *phba, | |
4724 | struct lpfc_acqe_link *acqe_link) | |
5b75da2f | 4725 | { |
da0436e9 | 4726 | uint8_t att_type; |
5b75da2f | 4727 | |
da0436e9 JS |
4728 | switch (bf_get(lpfc_acqe_link_status, acqe_link)) { |
4729 | case LPFC_ASYNC_LINK_STATUS_DOWN: | |
4730 | case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN: | |
76a95d75 | 4731 | att_type = LPFC_ATT_LINK_DOWN; |
da0436e9 JS |
4732 | break; |
4733 | case LPFC_ASYNC_LINK_STATUS_UP: | |
4734 | /* Ignore physical link up events - wait for logical link up */ | |
76a95d75 | 4735 | att_type = LPFC_ATT_RESERVED; |
da0436e9 JS |
4736 | break; |
4737 | case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP: | |
76a95d75 | 4738 | att_type = LPFC_ATT_LINK_UP; |
da0436e9 JS |
4739 | break; |
4740 | default: | |
4741 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
4742 | "0399 Invalid link attention type: x%x\n", | |
4743 | bf_get(lpfc_acqe_link_status, acqe_link)); | |
76a95d75 | 4744 | att_type = LPFC_ATT_RESERVED; |
da0436e9 | 4745 | break; |
5b75da2f | 4746 | } |
da0436e9 | 4747 | return att_type; |
5b75da2f JS |
4748 | } |
4749 | ||
8b68cd52 JS |
4750 | /** |
4751 | * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed | |
4752 | * @phba: pointer to lpfc hba data structure. | |
4753 | * | |
4754 | * This routine is to get an SLI3 FC port's link speed in Mbps. | |
4755 | * | |
4756 | * Return: link speed in terms of Mbps. | |
4757 | **/ | |
4758 | uint32_t | |
4759 | lpfc_sli_port_speed_get(struct lpfc_hba *phba) | |
4760 | { | |
4761 | uint32_t link_speed; | |
4762 | ||
4763 | if (!lpfc_is_link_up(phba)) | |
4764 | return 0; | |
4765 | ||
a085e87c JS |
4766 | if (phba->sli_rev <= LPFC_SLI_REV3) { |
4767 | switch (phba->fc_linkspeed) { | |
4768 | case LPFC_LINK_SPEED_1GHZ: | |
4769 | link_speed = 1000; | |
4770 | break; | |
4771 | case LPFC_LINK_SPEED_2GHZ: | |
4772 | link_speed = 2000; | |
4773 | break; | |
4774 | case LPFC_LINK_SPEED_4GHZ: | |
4775 | link_speed = 4000; | |
4776 | break; | |
4777 | case LPFC_LINK_SPEED_8GHZ: | |
4778 | link_speed = 8000; | |
4779 | break; | |
4780 | case LPFC_LINK_SPEED_10GHZ: | |
4781 | link_speed = 10000; | |
4782 | break; | |
4783 | case LPFC_LINK_SPEED_16GHZ: | |
4784 | link_speed = 16000; | |
4785 | break; | |
4786 | default: | |
4787 | link_speed = 0; | |
4788 | } | |
4789 | } else { | |
4790 | if (phba->sli4_hba.link_state.logical_speed) | |
4791 | link_speed = | |
4792 | phba->sli4_hba.link_state.logical_speed; | |
4793 | else | |
4794 | link_speed = phba->sli4_hba.link_state.speed; | |
8b68cd52 JS |
4795 | } |
4796 | return link_speed; | |
4797 | } | |
4798 | ||
4799 | /** | |
4800 | * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed | |
4801 | * @phba: pointer to lpfc hba data structure. | |
4802 | * @evt_code: asynchronous event code. | |
4803 | * @speed_code: asynchronous event link speed code. | |
4804 | * | |
4805 | * This routine is to parse the giving SLI4 async event link speed code into | |
4806 | * value of Mbps for the link speed. | |
4807 | * | |
4808 | * Return: link speed in terms of Mbps. | |
4809 | **/ | |
4810 | static uint32_t | |
4811 | lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code, | |
4812 | uint8_t speed_code) | |
4813 | { | |
4814 | uint32_t port_speed; | |
4815 | ||
4816 | switch (evt_code) { | |
4817 | case LPFC_TRAILER_CODE_LINK: | |
4818 | switch (speed_code) { | |
26d830ec | 4819 | case LPFC_ASYNC_LINK_SPEED_ZERO: |
8b68cd52 JS |
4820 | port_speed = 0; |
4821 | break; | |
26d830ec | 4822 | case LPFC_ASYNC_LINK_SPEED_10MBPS: |
8b68cd52 JS |
4823 | port_speed = 10; |
4824 | break; | |
26d830ec | 4825 | case LPFC_ASYNC_LINK_SPEED_100MBPS: |
8b68cd52 JS |
4826 | port_speed = 100; |
4827 | break; | |
26d830ec | 4828 | case LPFC_ASYNC_LINK_SPEED_1GBPS: |
8b68cd52 JS |
4829 | port_speed = 1000; |
4830 | break; | |
26d830ec | 4831 | case LPFC_ASYNC_LINK_SPEED_10GBPS: |
8b68cd52 JS |
4832 | port_speed = 10000; |
4833 | break; | |
26d830ec JS |
4834 | case LPFC_ASYNC_LINK_SPEED_20GBPS: |
4835 | port_speed = 20000; | |
4836 | break; | |
4837 | case LPFC_ASYNC_LINK_SPEED_25GBPS: | |
4838 | port_speed = 25000; | |
4839 | break; | |
4840 | case LPFC_ASYNC_LINK_SPEED_40GBPS: | |
4841 | port_speed = 40000; | |
4842 | break; | |
8b68cd52 JS |
4843 | default: |
4844 | port_speed = 0; | |
4845 | } | |
4846 | break; | |
4847 | case LPFC_TRAILER_CODE_FC: | |
4848 | switch (speed_code) { | |
26d830ec | 4849 | case LPFC_FC_LA_SPEED_UNKNOWN: |
8b68cd52 JS |
4850 | port_speed = 0; |
4851 | break; | |
26d830ec | 4852 | case LPFC_FC_LA_SPEED_1G: |
8b68cd52 JS |
4853 | port_speed = 1000; |
4854 | break; | |
26d830ec | 4855 | case LPFC_FC_LA_SPEED_2G: |
8b68cd52 JS |
4856 | port_speed = 2000; |
4857 | break; | |
26d830ec | 4858 | case LPFC_FC_LA_SPEED_4G: |
8b68cd52 JS |
4859 | port_speed = 4000; |
4860 | break; | |
26d830ec | 4861 | case LPFC_FC_LA_SPEED_8G: |
8b68cd52 JS |
4862 | port_speed = 8000; |
4863 | break; | |
26d830ec | 4864 | case LPFC_FC_LA_SPEED_10G: |
8b68cd52 JS |
4865 | port_speed = 10000; |
4866 | break; | |
26d830ec | 4867 | case LPFC_FC_LA_SPEED_16G: |
8b68cd52 JS |
4868 | port_speed = 16000; |
4869 | break; | |
d38dd52c JS |
4870 | case LPFC_FC_LA_SPEED_32G: |
4871 | port_speed = 32000; | |
4872 | break; | |
fbd8a6ba JS |
4873 | case LPFC_FC_LA_SPEED_64G: |
4874 | port_speed = 64000; | |
4875 | break; | |
1dc5ec24 JS |
4876 | case LPFC_FC_LA_SPEED_128G: |
4877 | port_speed = 128000; | |
4878 | break; | |
8b68cd52 JS |
4879 | default: |
4880 | port_speed = 0; | |
4881 | } | |
4882 | break; | |
4883 | default: | |
4884 | port_speed = 0; | |
4885 | } | |
4886 | return port_speed; | |
4887 | } | |
4888 | ||
da0436e9 | 4889 | /** |
70f3c073 | 4890 | * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event |
da0436e9 JS |
4891 | * @phba: pointer to lpfc hba data structure. |
4892 | * @acqe_link: pointer to the async link completion queue entry. | |
4893 | * | |
70f3c073 | 4894 | * This routine is to handle the SLI4 asynchronous FCoE link event. |
da0436e9 JS |
4895 | **/ |
4896 | static void | |
4897 | lpfc_sli4_async_link_evt(struct lpfc_hba *phba, | |
4898 | struct lpfc_acqe_link *acqe_link) | |
4899 | { | |
4900 | struct lpfc_dmabuf *mp; | |
4901 | LPFC_MBOXQ_t *pmb; | |
4902 | MAILBOX_t *mb; | |
76a95d75 | 4903 | struct lpfc_mbx_read_top *la; |
da0436e9 | 4904 | uint8_t att_type; |
76a95d75 | 4905 | int rc; |
da0436e9 JS |
4906 | |
4907 | att_type = lpfc_sli4_parse_latt_type(phba, acqe_link); | |
76a95d75 | 4908 | if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP) |
da0436e9 | 4909 | return; |
32b9793f | 4910 | phba->fcoe_eventtag = acqe_link->event_tag; |
da0436e9 JS |
4911 | pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); |
4912 | if (!pmb) { | |
4913 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
4914 | "0395 The mboxq allocation failed\n"); | |
4915 | return; | |
4916 | } | |
4917 | mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); | |
4918 | if (!mp) { | |
4919 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
4920 | "0396 The lpfc_dmabuf allocation failed\n"); | |
4921 | goto out_free_pmb; | |
4922 | } | |
4923 | mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys); | |
4924 | if (!mp->virt) { | |
4925 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
4926 | "0397 The mbuf allocation failed\n"); | |
4927 | goto out_free_dmabuf; | |
4928 | } | |
4929 | ||
4930 | /* Cleanup any outstanding ELS commands */ | |
4931 | lpfc_els_flush_all_cmd(phba); | |
4932 | ||
4933 | /* Block ELS IOCBs until we have done process link event */ | |
895427bd | 4934 | phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT; |
da0436e9 JS |
4935 | |
4936 | /* Update link event statistics */ | |
4937 | phba->sli.slistat.link_event++; | |
4938 | ||
76a95d75 JS |
4939 | /* Create lpfc_handle_latt mailbox command from link ACQE */ |
4940 | lpfc_read_topology(phba, pmb, mp); | |
4941 | pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; | |
da0436e9 JS |
4942 | pmb->vport = phba->pport; |
4943 | ||
da0436e9 JS |
4944 | /* Keep the link status for extra SLI4 state machine reference */ |
4945 | phba->sli4_hba.link_state.speed = | |
8b68cd52 JS |
4946 | lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK, |
4947 | bf_get(lpfc_acqe_link_speed, acqe_link)); | |
da0436e9 JS |
4948 | phba->sli4_hba.link_state.duplex = |
4949 | bf_get(lpfc_acqe_link_duplex, acqe_link); | |
4950 | phba->sli4_hba.link_state.status = | |
4951 | bf_get(lpfc_acqe_link_status, acqe_link); | |
70f3c073 JS |
4952 | phba->sli4_hba.link_state.type = |
4953 | bf_get(lpfc_acqe_link_type, acqe_link); | |
4954 | phba->sli4_hba.link_state.number = | |
4955 | bf_get(lpfc_acqe_link_number, acqe_link); | |
da0436e9 JS |
4956 | phba->sli4_hba.link_state.fault = |
4957 | bf_get(lpfc_acqe_link_fault, acqe_link); | |
65467b6b | 4958 | phba->sli4_hba.link_state.logical_speed = |
8b68cd52 JS |
4959 | bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10; |
4960 | ||
70f3c073 | 4961 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, |
c31098ce JS |
4962 | "2900 Async FC/FCoE Link event - Speed:%dGBit " |
4963 | "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d " | |
4964 | "Logical speed:%dMbps Fault:%d\n", | |
70f3c073 JS |
4965 | phba->sli4_hba.link_state.speed, |
4966 | phba->sli4_hba.link_state.topology, | |
4967 | phba->sli4_hba.link_state.status, | |
4968 | phba->sli4_hba.link_state.type, | |
4969 | phba->sli4_hba.link_state.number, | |
8b68cd52 | 4970 | phba->sli4_hba.link_state.logical_speed, |
70f3c073 | 4971 | phba->sli4_hba.link_state.fault); |
76a95d75 JS |
4972 | /* |
4973 | * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch | |
4974 | * topology info. Note: Optional for non FC-AL ports. | |
4975 | */ | |
4976 | if (!(phba->hba_flag & HBA_FCOE_MODE)) { | |
4977 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); | |
4978 | if (rc == MBX_NOT_FINISHED) | |
4979 | goto out_free_dmabuf; | |
4980 | return; | |
4981 | } | |
4982 | /* | |
4983 | * For FCoE Mode: fill in all the topology information we need and call | |
4984 | * the READ_TOPOLOGY completion routine to continue without actually | |
4985 | * sending the READ_TOPOLOGY mailbox command to the port. | |
4986 | */ | |
23288b78 | 4987 | /* Initialize completion status */ |
76a95d75 | 4988 | mb = &pmb->u.mb; |
23288b78 JS |
4989 | mb->mbxStatus = MBX_SUCCESS; |
4990 | ||
4991 | /* Parse port fault information field */ | |
4992 | lpfc_sli4_parse_latt_fault(phba, acqe_link); | |
76a95d75 JS |
4993 | |
4994 | /* Parse and translate link attention fields */ | |
4995 | la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop; | |
4996 | la->eventTag = acqe_link->event_tag; | |
4997 | bf_set(lpfc_mbx_read_top_att_type, la, att_type); | |
4998 | bf_set(lpfc_mbx_read_top_link_spd, la, | |
a085e87c | 4999 | (bf_get(lpfc_acqe_link_speed, acqe_link))); |
76a95d75 JS |
5000 | |
5001 | /* Fake the the following irrelvant fields */ | |
5002 | bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT); | |
5003 | bf_set(lpfc_mbx_read_top_alpa_granted, la, 0); | |
5004 | bf_set(lpfc_mbx_read_top_il, la, 0); | |
5005 | bf_set(lpfc_mbx_read_top_pb, la, 0); | |
5006 | bf_set(lpfc_mbx_read_top_fa, la, 0); | |
5007 | bf_set(lpfc_mbx_read_top_mm, la, 0); | |
da0436e9 JS |
5008 | |
5009 | /* Invoke the lpfc_handle_latt mailbox command callback function */ | |
76a95d75 | 5010 | lpfc_mbx_cmpl_read_topology(phba, pmb); |
da0436e9 | 5011 | |
5b75da2f | 5012 | return; |
da0436e9 JS |
5013 | |
5014 | out_free_dmabuf: | |
5015 | kfree(mp); | |
5016 | out_free_pmb: | |
5017 | mempool_free(pmb, phba->mbox_mem_pool); | |
5018 | } | |
5019 | ||
1dc5ec24 JS |
5020 | /** |
5021 | * lpfc_async_link_speed_to_read_top - Parse async evt link speed code to read | |
5022 | * topology. | |
5023 | * @phba: pointer to lpfc hba data structure. | |
5024 | * @evt_code: asynchronous event code. | |
5025 | * @speed_code: asynchronous event link speed code. | |
5026 | * | |
5027 | * This routine is to parse the giving SLI4 async event link speed code into | |
5028 | * value of Read topology link speed. | |
5029 | * | |
5030 | * Return: link speed in terms of Read topology. | |
5031 | **/ | |
5032 | static uint8_t | |
5033 | lpfc_async_link_speed_to_read_top(struct lpfc_hba *phba, uint8_t speed_code) | |
5034 | { | |
5035 | uint8_t port_speed; | |
5036 | ||
5037 | switch (speed_code) { | |
5038 | case LPFC_FC_LA_SPEED_1G: | |
5039 | port_speed = LPFC_LINK_SPEED_1GHZ; | |
5040 | break; | |
5041 | case LPFC_FC_LA_SPEED_2G: | |
5042 | port_speed = LPFC_LINK_SPEED_2GHZ; | |
5043 | break; | |
5044 | case LPFC_FC_LA_SPEED_4G: | |
5045 | port_speed = LPFC_LINK_SPEED_4GHZ; | |
5046 | break; | |
5047 | case LPFC_FC_LA_SPEED_8G: | |
5048 | port_speed = LPFC_LINK_SPEED_8GHZ; | |
5049 | break; | |
5050 | case LPFC_FC_LA_SPEED_16G: | |
5051 | port_speed = LPFC_LINK_SPEED_16GHZ; | |
5052 | break; | |
5053 | case LPFC_FC_LA_SPEED_32G: | |
5054 | port_speed = LPFC_LINK_SPEED_32GHZ; | |
5055 | break; | |
5056 | case LPFC_FC_LA_SPEED_64G: | |
5057 | port_speed = LPFC_LINK_SPEED_64GHZ; | |
5058 | break; | |
5059 | case LPFC_FC_LA_SPEED_128G: | |
5060 | port_speed = LPFC_LINK_SPEED_128GHZ; | |
5061 | break; | |
5062 | case LPFC_FC_LA_SPEED_256G: | |
5063 | port_speed = LPFC_LINK_SPEED_256GHZ; | |
5064 | break; | |
5065 | default: | |
5066 | port_speed = 0; | |
5067 | break; | |
5068 | } | |
5069 | ||
5070 | return port_speed; | |
5071 | } | |
5072 | ||
5073 | #define trunk_link_status(__idx)\ | |
5074 | bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\ | |
5075 | ((phba->trunk_link.link##__idx.state == LPFC_LINK_UP) ?\ | |
5076 | "Link up" : "Link down") : "NA" | |
5077 | /* Did port __idx reported an error */ | |
5078 | #define trunk_port_fault(__idx)\ | |
5079 | bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\ | |
5080 | (port_fault & (1 << __idx) ? "YES" : "NO") : "NA" | |
5081 | ||
5082 | static void | |
5083 | lpfc_update_trunk_link_status(struct lpfc_hba *phba, | |
5084 | struct lpfc_acqe_fc_la *acqe_fc) | |
5085 | { | |
5086 | uint8_t port_fault = bf_get(lpfc_acqe_fc_la_trunk_linkmask, acqe_fc); | |
5087 | uint8_t err = bf_get(lpfc_acqe_fc_la_trunk_fault, acqe_fc); | |
5088 | ||
5089 | phba->sli4_hba.link_state.speed = | |
5090 | lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC, | |
5091 | bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); | |
5092 | ||
5093 | phba->sli4_hba.link_state.logical_speed = | |
b8e6f136 | 5094 | bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10; |
1dc5ec24 JS |
5095 | /* We got FC link speed, convert to fc_linkspeed (READ_TOPOLOGY) */ |
5096 | phba->fc_linkspeed = | |
5097 | lpfc_async_link_speed_to_read_top( | |
5098 | phba, | |
5099 | bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); | |
5100 | ||
5101 | if (bf_get(lpfc_acqe_fc_la_trunk_config_port0, acqe_fc)) { | |
5102 | phba->trunk_link.link0.state = | |
5103 | bf_get(lpfc_acqe_fc_la_trunk_link_status_port0, acqe_fc) | |
5104 | ? LPFC_LINK_UP : LPFC_LINK_DOWN; | |
529b3ddc | 5105 | phba->trunk_link.link0.fault = port_fault & 0x1 ? err : 0; |
1dc5ec24 JS |
5106 | } |
5107 | if (bf_get(lpfc_acqe_fc_la_trunk_config_port1, acqe_fc)) { | |
5108 | phba->trunk_link.link1.state = | |
5109 | bf_get(lpfc_acqe_fc_la_trunk_link_status_port1, acqe_fc) | |
5110 | ? LPFC_LINK_UP : LPFC_LINK_DOWN; | |
529b3ddc | 5111 | phba->trunk_link.link1.fault = port_fault & 0x2 ? err : 0; |
1dc5ec24 JS |
5112 | } |
5113 | if (bf_get(lpfc_acqe_fc_la_trunk_config_port2, acqe_fc)) { | |
5114 | phba->trunk_link.link2.state = | |
5115 | bf_get(lpfc_acqe_fc_la_trunk_link_status_port2, acqe_fc) | |
5116 | ? LPFC_LINK_UP : LPFC_LINK_DOWN; | |
529b3ddc | 5117 | phba->trunk_link.link2.fault = port_fault & 0x4 ? err : 0; |
1dc5ec24 JS |
5118 | } |
5119 | if (bf_get(lpfc_acqe_fc_la_trunk_config_port3, acqe_fc)) { | |
5120 | phba->trunk_link.link3.state = | |
5121 | bf_get(lpfc_acqe_fc_la_trunk_link_status_port3, acqe_fc) | |
5122 | ? LPFC_LINK_UP : LPFC_LINK_DOWN; | |
529b3ddc | 5123 | phba->trunk_link.link3.fault = port_fault & 0x8 ? err : 0; |
1dc5ec24 JS |
5124 | } |
5125 | ||
5126 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
5127 | "2910 Async FC Trunking Event - Speed:%d\n" | |
5128 | "\tLogical speed:%d " | |
5129 | "port0: %s port1: %s port2: %s port3: %s\n", | |
5130 | phba->sli4_hba.link_state.speed, | |
5131 | phba->sli4_hba.link_state.logical_speed, | |
5132 | trunk_link_status(0), trunk_link_status(1), | |
5133 | trunk_link_status(2), trunk_link_status(3)); | |
5134 | ||
5135 | if (port_fault) | |
5136 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
5137 | "3202 trunk error:0x%x (%s) seen on port0:%s " | |
5138 | /* | |
5139 | * SLI-4: We have only 0xA error codes | |
5140 | * defined as of now. print an appropriate | |
5141 | * message in case driver needs to be updated. | |
5142 | */ | |
5143 | "port1:%s port2:%s port3:%s\n", err, err > 0xA ? | |
5144 | "UNDEFINED. update driver." : trunk_errmsg[err], | |
5145 | trunk_port_fault(0), trunk_port_fault(1), | |
5146 | trunk_port_fault(2), trunk_port_fault(3)); | |
5147 | } | |
5148 | ||
5149 | ||
70f3c073 JS |
5150 | /** |
5151 | * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event | |
5152 | * @phba: pointer to lpfc hba data structure. | |
5153 | * @acqe_fc: pointer to the async fc completion queue entry. | |
5154 | * | |
5155 | * This routine is to handle the SLI4 asynchronous FC event. It will simply log | |
5156 | * that the event was received and then issue a read_topology mailbox command so | |
5157 | * that the rest of the driver will treat it the same as SLI3. | |
5158 | **/ | |
5159 | static void | |
5160 | lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc) | |
5161 | { | |
5162 | struct lpfc_dmabuf *mp; | |
5163 | LPFC_MBOXQ_t *pmb; | |
7bdedb34 JS |
5164 | MAILBOX_t *mb; |
5165 | struct lpfc_mbx_read_top *la; | |
70f3c073 JS |
5166 | int rc; |
5167 | ||
5168 | if (bf_get(lpfc_trailer_type, acqe_fc) != | |
5169 | LPFC_FC_LA_EVENT_TYPE_FC_LINK) { | |
5170 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
5171 | "2895 Non FC link Event detected.(%d)\n", | |
5172 | bf_get(lpfc_trailer_type, acqe_fc)); | |
5173 | return; | |
5174 | } | |
1dc5ec24 JS |
5175 | |
5176 | if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) == | |
5177 | LPFC_FC_LA_TYPE_TRUNKING_EVENT) { | |
5178 | lpfc_update_trunk_link_status(phba, acqe_fc); | |
5179 | return; | |
5180 | } | |
5181 | ||
70f3c073 JS |
5182 | /* Keep the link status for extra SLI4 state machine reference */ |
5183 | phba->sli4_hba.link_state.speed = | |
8b68cd52 JS |
5184 | lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC, |
5185 | bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); | |
70f3c073 JS |
5186 | phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL; |
5187 | phba->sli4_hba.link_state.topology = | |
5188 | bf_get(lpfc_acqe_fc_la_topology, acqe_fc); | |
5189 | phba->sli4_hba.link_state.status = | |
5190 | bf_get(lpfc_acqe_fc_la_att_type, acqe_fc); | |
5191 | phba->sli4_hba.link_state.type = | |
5192 | bf_get(lpfc_acqe_fc_la_port_type, acqe_fc); | |
5193 | phba->sli4_hba.link_state.number = | |
5194 | bf_get(lpfc_acqe_fc_la_port_number, acqe_fc); | |
5195 | phba->sli4_hba.link_state.fault = | |
5196 | bf_get(lpfc_acqe_link_fault, acqe_fc); | |
b8e6f136 JS |
5197 | |
5198 | if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) == | |
5199 | LPFC_FC_LA_TYPE_LINK_DOWN) | |
5200 | phba->sli4_hba.link_state.logical_speed = 0; | |
5201 | else if (!phba->sli4_hba.conf_trunk) | |
5202 | phba->sli4_hba.link_state.logical_speed = | |
8b68cd52 | 5203 | bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10; |
b8e6f136 | 5204 | |
70f3c073 JS |
5205 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, |
5206 | "2896 Async FC event - Speed:%dGBaud Topology:x%x " | |
5207 | "LA Type:x%x Port Type:%d Port Number:%d Logical speed:" | |
5208 | "%dMbps Fault:%d\n", | |
5209 | phba->sli4_hba.link_state.speed, | |
5210 | phba->sli4_hba.link_state.topology, | |
5211 | phba->sli4_hba.link_state.status, | |
5212 | phba->sli4_hba.link_state.type, | |
5213 | phba->sli4_hba.link_state.number, | |
8b68cd52 | 5214 | phba->sli4_hba.link_state.logical_speed, |
70f3c073 JS |
5215 | phba->sli4_hba.link_state.fault); |
5216 | pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); | |
5217 | if (!pmb) { | |
5218 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
5219 | "2897 The mboxq allocation failed\n"); | |
5220 | return; | |
5221 | } | |
5222 | mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); | |
5223 | if (!mp) { | |
5224 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
5225 | "2898 The lpfc_dmabuf allocation failed\n"); | |
5226 | goto out_free_pmb; | |
5227 | } | |
5228 | mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys); | |
5229 | if (!mp->virt) { | |
5230 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
5231 | "2899 The mbuf allocation failed\n"); | |
5232 | goto out_free_dmabuf; | |
5233 | } | |
5234 | ||
5235 | /* Cleanup any outstanding ELS commands */ | |
5236 | lpfc_els_flush_all_cmd(phba); | |
5237 | ||
5238 | /* Block ELS IOCBs until we have done process link event */ | |
895427bd | 5239 | phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT; |
70f3c073 JS |
5240 | |
5241 | /* Update link event statistics */ | |
5242 | phba->sli.slistat.link_event++; | |
5243 | ||
5244 | /* Create lpfc_handle_latt mailbox command from link ACQE */ | |
5245 | lpfc_read_topology(phba, pmb, mp); | |
5246 | pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; | |
5247 | pmb->vport = phba->pport; | |
5248 | ||
7bdedb34 | 5249 | if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) { |
ae9e28f3 JS |
5250 | phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK); |
5251 | ||
5252 | switch (phba->sli4_hba.link_state.status) { | |
5253 | case LPFC_FC_LA_TYPE_MDS_LINK_DOWN: | |
5254 | phba->link_flag |= LS_MDS_LINK_DOWN; | |
5255 | break; | |
5256 | case LPFC_FC_LA_TYPE_MDS_LOOPBACK: | |
5257 | phba->link_flag |= LS_MDS_LOOPBACK; | |
5258 | break; | |
5259 | default: | |
5260 | break; | |
5261 | } | |
5262 | ||
23288b78 | 5263 | /* Initialize completion status */ |
7bdedb34 | 5264 | mb = &pmb->u.mb; |
23288b78 JS |
5265 | mb->mbxStatus = MBX_SUCCESS; |
5266 | ||
5267 | /* Parse port fault information field */ | |
5268 | lpfc_sli4_parse_latt_fault(phba, (void *)acqe_fc); | |
7bdedb34 JS |
5269 | |
5270 | /* Parse and translate link attention fields */ | |
5271 | la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop; | |
5272 | la->eventTag = acqe_fc->event_tag; | |
7bdedb34 | 5273 | |
aeb3c817 JS |
5274 | if (phba->sli4_hba.link_state.status == |
5275 | LPFC_FC_LA_TYPE_UNEXP_WWPN) { | |
5276 | bf_set(lpfc_mbx_read_top_att_type, la, | |
5277 | LPFC_FC_LA_TYPE_UNEXP_WWPN); | |
5278 | } else { | |
5279 | bf_set(lpfc_mbx_read_top_att_type, la, | |
5280 | LPFC_FC_LA_TYPE_LINK_DOWN); | |
5281 | } | |
7bdedb34 JS |
5282 | /* Invoke the mailbox command callback function */ |
5283 | lpfc_mbx_cmpl_read_topology(phba, pmb); | |
5284 | ||
5285 | return; | |
5286 | } | |
5287 | ||
70f3c073 JS |
5288 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); |
5289 | if (rc == MBX_NOT_FINISHED) | |
5290 | goto out_free_dmabuf; | |
5291 | return; | |
5292 | ||
5293 | out_free_dmabuf: | |
5294 | kfree(mp); | |
5295 | out_free_pmb: | |
5296 | mempool_free(pmb, phba->mbox_mem_pool); | |
5297 | } | |
5298 | ||
5299 | /** | |
5300 | * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event | |
5301 | * @phba: pointer to lpfc hba data structure. | |
5302 | * @acqe_fc: pointer to the async SLI completion queue entry. | |
5303 | * | |
5304 | * This routine is to handle the SLI4 asynchronous SLI events. | |
5305 | **/ | |
5306 | static void | |
5307 | lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli) | |
5308 | { | |
4b8bae08 | 5309 | char port_name; |
8c1312e1 | 5310 | char message[128]; |
4b8bae08 | 5311 | uint8_t status; |
946727dc | 5312 | uint8_t evt_type; |
448193b5 | 5313 | uint8_t operational = 0; |
946727dc | 5314 | struct temp_event temp_event_data; |
4b8bae08 | 5315 | struct lpfc_acqe_misconfigured_event *misconfigured; |
946727dc | 5316 | struct Scsi_Host *shost; |
cd71348a JS |
5317 | struct lpfc_vport **vports; |
5318 | int rc, i; | |
946727dc JS |
5319 | |
5320 | evt_type = bf_get(lpfc_trailer_type, acqe_sli); | |
4b8bae08 | 5321 | |
448193b5 JS |
5322 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, |
5323 | "2901 Async SLI event - Event Data1:x%08x Event Data2:" | |
5324 | "x%08x SLI Event Type:%d\n", | |
5325 | acqe_sli->event_data1, acqe_sli->event_data2, | |
5326 | evt_type); | |
4b8bae08 JS |
5327 | |
5328 | port_name = phba->Port[0]; | |
5329 | if (port_name == 0x00) | |
5330 | port_name = '?'; /* get port name is empty */ | |
5331 | ||
946727dc JS |
5332 | switch (evt_type) { |
5333 | case LPFC_SLI_EVENT_TYPE_OVER_TEMP: | |
5334 | temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; | |
5335 | temp_event_data.event_code = LPFC_THRESHOLD_TEMP; | |
5336 | temp_event_data.data = (uint32_t)acqe_sli->event_data1; | |
5337 | ||
5338 | lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, | |
5339 | "3190 Over Temperature:%d Celsius- Port Name %c\n", | |
5340 | acqe_sli->event_data1, port_name); | |
5341 | ||
310429ef | 5342 | phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE; |
946727dc JS |
5343 | shost = lpfc_shost_from_vport(phba->pport); |
5344 | fc_host_post_vendor_event(shost, fc_get_event_number(), | |
5345 | sizeof(temp_event_data), | |
5346 | (char *)&temp_event_data, | |
5347 | SCSI_NL_VID_TYPE_PCI | |
5348 | | PCI_VENDOR_ID_EMULEX); | |
5349 | break; | |
5350 | case LPFC_SLI_EVENT_TYPE_NORM_TEMP: | |
5351 | temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; | |
5352 | temp_event_data.event_code = LPFC_NORMAL_TEMP; | |
5353 | temp_event_data.data = (uint32_t)acqe_sli->event_data1; | |
5354 | ||
5355 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
5356 | "3191 Normal Temperature:%d Celsius - Port Name %c\n", | |
5357 | acqe_sli->event_data1, port_name); | |
5358 | ||
5359 | shost = lpfc_shost_from_vport(phba->pport); | |
5360 | fc_host_post_vendor_event(shost, fc_get_event_number(), | |
5361 | sizeof(temp_event_data), | |
5362 | (char *)&temp_event_data, | |
5363 | SCSI_NL_VID_TYPE_PCI | |
5364 | | PCI_VENDOR_ID_EMULEX); | |
5365 | break; | |
5366 | case LPFC_SLI_EVENT_TYPE_MISCONFIGURED: | |
5367 | misconfigured = (struct lpfc_acqe_misconfigured_event *) | |
4b8bae08 JS |
5368 | &acqe_sli->event_data1; |
5369 | ||
946727dc JS |
5370 | /* fetch the status for this port */ |
5371 | switch (phba->sli4_hba.lnk_info.lnk_no) { | |
5372 | case LPFC_LINK_NUMBER_0: | |
448193b5 JS |
5373 | status = bf_get(lpfc_sli_misconfigured_port0_state, |
5374 | &misconfigured->theEvent); | |
5375 | operational = bf_get(lpfc_sli_misconfigured_port0_op, | |
4b8bae08 | 5376 | &misconfigured->theEvent); |
946727dc JS |
5377 | break; |
5378 | case LPFC_LINK_NUMBER_1: | |
448193b5 JS |
5379 | status = bf_get(lpfc_sli_misconfigured_port1_state, |
5380 | &misconfigured->theEvent); | |
5381 | operational = bf_get(lpfc_sli_misconfigured_port1_op, | |
4b8bae08 | 5382 | &misconfigured->theEvent); |
946727dc JS |
5383 | break; |
5384 | case LPFC_LINK_NUMBER_2: | |
448193b5 JS |
5385 | status = bf_get(lpfc_sli_misconfigured_port2_state, |
5386 | &misconfigured->theEvent); | |
5387 | operational = bf_get(lpfc_sli_misconfigured_port2_op, | |
4b8bae08 | 5388 | &misconfigured->theEvent); |
946727dc JS |
5389 | break; |
5390 | case LPFC_LINK_NUMBER_3: | |
448193b5 JS |
5391 | status = bf_get(lpfc_sli_misconfigured_port3_state, |
5392 | &misconfigured->theEvent); | |
5393 | operational = bf_get(lpfc_sli_misconfigured_port3_op, | |
4b8bae08 | 5394 | &misconfigured->theEvent); |
946727dc JS |
5395 | break; |
5396 | default: | |
448193b5 JS |
5397 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, |
5398 | "3296 " | |
5399 | "LPFC_SLI_EVENT_TYPE_MISCONFIGURED " | |
5400 | "event: Invalid link %d", | |
5401 | phba->sli4_hba.lnk_info.lnk_no); | |
5402 | return; | |
946727dc | 5403 | } |
4b8bae08 | 5404 | |
448193b5 JS |
5405 | /* Skip if optic state unchanged */ |
5406 | if (phba->sli4_hba.lnk_info.optic_state == status) | |
5407 | return; | |
5408 | ||
946727dc JS |
5409 | switch (status) { |
5410 | case LPFC_SLI_EVENT_STATUS_VALID: | |
448193b5 JS |
5411 | sprintf(message, "Physical Link is functional"); |
5412 | break; | |
946727dc JS |
5413 | case LPFC_SLI_EVENT_STATUS_NOT_PRESENT: |
5414 | sprintf(message, "Optics faulted/incorrectly " | |
5415 | "installed/not installed - Reseat optics, " | |
5416 | "if issue not resolved, replace."); | |
5417 | break; | |
5418 | case LPFC_SLI_EVENT_STATUS_WRONG_TYPE: | |
5419 | sprintf(message, | |
5420 | "Optics of two types installed - Remove one " | |
5421 | "optic or install matching pair of optics."); | |
5422 | break; | |
5423 | case LPFC_SLI_EVENT_STATUS_UNSUPPORTED: | |
5424 | sprintf(message, "Incompatible optics - Replace with " | |
292098be | 5425 | "compatible optics for card to function."); |
946727dc | 5426 | break; |
448193b5 JS |
5427 | case LPFC_SLI_EVENT_STATUS_UNQUALIFIED: |
5428 | sprintf(message, "Unqualified optics - Replace with " | |
5429 | "Avago optics for Warranty and Technical " | |
5430 | "Support - Link is%s operational", | |
2ea259ee | 5431 | (operational) ? " not" : ""); |
448193b5 JS |
5432 | break; |
5433 | case LPFC_SLI_EVENT_STATUS_UNCERTIFIED: | |
5434 | sprintf(message, "Uncertified optics - Replace with " | |
5435 | "Avago-certified optics to enable link " | |
5436 | "operation - Link is%s operational", | |
2ea259ee | 5437 | (operational) ? " not" : ""); |
448193b5 | 5438 | break; |
946727dc JS |
5439 | default: |
5440 | /* firmware is reporting a status we don't know about */ | |
5441 | sprintf(message, "Unknown event status x%02x", status); | |
5442 | break; | |
5443 | } | |
cd71348a JS |
5444 | |
5445 | /* Issue READ_CONFIG mbox command to refresh supported speeds */ | |
5446 | rc = lpfc_sli4_read_config(phba); | |
3952e91f | 5447 | if (rc) { |
cd71348a JS |
5448 | phba->lmt = 0; |
5449 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
5450 | "3194 Unable to retrieve supported " | |
3952e91f | 5451 | "speeds, rc = 0x%x\n", rc); |
cd71348a JS |
5452 | } |
5453 | vports = lpfc_create_vport_work_array(phba); | |
5454 | if (vports != NULL) { | |
5455 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; | |
5456 | i++) { | |
5457 | shost = lpfc_shost_from_vport(vports[i]); | |
5458 | lpfc_host_supported_speeds_set(shost); | |
5459 | } | |
5460 | } | |
5461 | lpfc_destroy_vport_work_array(phba, vports); | |
5462 | ||
448193b5 | 5463 | phba->sli4_hba.lnk_info.optic_state = status; |
946727dc | 5464 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, |
448193b5 | 5465 | "3176 Port Name %c %s\n", port_name, message); |
946727dc JS |
5466 | break; |
5467 | case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT: | |
5468 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
5469 | "3192 Remote DPort Test Initiated - " | |
5470 | "Event Data1:x%08x Event Data2: x%08x\n", | |
5471 | acqe_sli->event_data1, acqe_sli->event_data2); | |
4b8bae08 JS |
5472 | break; |
5473 | default: | |
946727dc JS |
5474 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, |
5475 | "3193 Async SLI event - Event Data1:x%08x Event Data2:" | |
5476 | "x%08x SLI Event Type:%d\n", | |
5477 | acqe_sli->event_data1, acqe_sli->event_data2, | |
5478 | evt_type); | |
4b8bae08 JS |
5479 | break; |
5480 | } | |
70f3c073 JS |
5481 | } |
5482 | ||
fc2b989b JS |
5483 | /** |
5484 | * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport | |
5485 | * @vport: pointer to vport data structure. | |
5486 | * | |
5487 | * This routine is to perform Clear Virtual Link (CVL) on a vport in | |
5488 | * response to a CVL event. | |
5489 | * | |
5490 | * Return the pointer to the ndlp with the vport if successful, otherwise | |
5491 | * return NULL. | |
5492 | **/ | |
5493 | static struct lpfc_nodelist * | |
5494 | lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport) | |
5495 | { | |
5496 | struct lpfc_nodelist *ndlp; | |
5497 | struct Scsi_Host *shost; | |
5498 | struct lpfc_hba *phba; | |
5499 | ||
5500 | if (!vport) | |
5501 | return NULL; | |
fc2b989b JS |
5502 | phba = vport->phba; |
5503 | if (!phba) | |
5504 | return NULL; | |
78730cfe JS |
5505 | ndlp = lpfc_findnode_did(vport, Fabric_DID); |
5506 | if (!ndlp) { | |
5507 | /* Cannot find existing Fabric ndlp, so allocate a new one */ | |
9d3d340d | 5508 | ndlp = lpfc_nlp_init(vport, Fabric_DID); |
78730cfe JS |
5509 | if (!ndlp) |
5510 | return 0; | |
78730cfe JS |
5511 | /* Set the node type */ |
5512 | ndlp->nlp_type |= NLP_FABRIC; | |
5513 | /* Put ndlp onto node list */ | |
5514 | lpfc_enqueue_node(vport, ndlp); | |
5515 | } else if (!NLP_CHK_NODE_ACT(ndlp)) { | |
5516 | /* re-setup ndlp without removing from node list */ | |
5517 | ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE); | |
5518 | if (!ndlp) | |
5519 | return 0; | |
5520 | } | |
63e801ce JS |
5521 | if ((phba->pport->port_state < LPFC_FLOGI) && |
5522 | (phba->pport->port_state != LPFC_VPORT_FAILED)) | |
fc2b989b JS |
5523 | return NULL; |
5524 | /* If virtual link is not yet instantiated ignore CVL */ | |
63e801ce JS |
5525 | if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC) |
5526 | && (vport->port_state != LPFC_VPORT_FAILED)) | |
fc2b989b JS |
5527 | return NULL; |
5528 | shost = lpfc_shost_from_vport(vport); | |
5529 | if (!shost) | |
5530 | return NULL; | |
5531 | lpfc_linkdown_port(vport); | |
5532 | lpfc_cleanup_pending_mbox(vport); | |
5533 | spin_lock_irq(shost->host_lock); | |
5534 | vport->fc_flag |= FC_VPORT_CVL_RCVD; | |
5535 | spin_unlock_irq(shost->host_lock); | |
5536 | ||
5537 | return ndlp; | |
5538 | } | |
5539 | ||
5540 | /** | |
5541 | * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports | |
5542 | * @vport: pointer to lpfc hba data structure. | |
5543 | * | |
5544 | * This routine is to perform Clear Virtual Link (CVL) on all vports in | |
5545 | * response to a FCF dead event. | |
5546 | **/ | |
5547 | static void | |
5548 | lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba) | |
5549 | { | |
5550 | struct lpfc_vport **vports; | |
5551 | int i; | |
5552 | ||
5553 | vports = lpfc_create_vport_work_array(phba); | |
5554 | if (vports) | |
5555 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) | |
5556 | lpfc_sli4_perform_vport_cvl(vports[i]); | |
5557 | lpfc_destroy_vport_work_array(phba, vports); | |
5558 | } | |
5559 | ||
da0436e9 | 5560 | /** |
76a95d75 | 5561 | * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event |
da0436e9 JS |
5562 | * @phba: pointer to lpfc hba data structure. |
5563 | * @acqe_link: pointer to the async fcoe completion queue entry. | |
5564 | * | |
5565 | * This routine is to handle the SLI4 asynchronous fcoe event. | |
5566 | **/ | |
5567 | static void | |
76a95d75 | 5568 | lpfc_sli4_async_fip_evt(struct lpfc_hba *phba, |
70f3c073 | 5569 | struct lpfc_acqe_fip *acqe_fip) |
da0436e9 | 5570 | { |
70f3c073 | 5571 | uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip); |
da0436e9 | 5572 | int rc; |
6669f9bb JS |
5573 | struct lpfc_vport *vport; |
5574 | struct lpfc_nodelist *ndlp; | |
5575 | struct Scsi_Host *shost; | |
695a814e JS |
5576 | int active_vlink_present; |
5577 | struct lpfc_vport **vports; | |
5578 | int i; | |
da0436e9 | 5579 | |
70f3c073 JS |
5580 | phba->fc_eventTag = acqe_fip->event_tag; |
5581 | phba->fcoe_eventtag = acqe_fip->event_tag; | |
da0436e9 | 5582 | switch (event_type) { |
70f3c073 JS |
5583 | case LPFC_FIP_EVENT_TYPE_NEW_FCF: |
5584 | case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD: | |
5585 | if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF) | |
999d813f JS |
5586 | lpfc_printf_log(phba, KERN_ERR, LOG_FIP | |
5587 | LOG_DISCOVERY, | |
a93ff37a JS |
5588 | "2546 New FCF event, evt_tag:x%x, " |
5589 | "index:x%x\n", | |
70f3c073 JS |
5590 | acqe_fip->event_tag, |
5591 | acqe_fip->index); | |
999d813f JS |
5592 | else |
5593 | lpfc_printf_log(phba, KERN_WARNING, LOG_FIP | | |
5594 | LOG_DISCOVERY, | |
a93ff37a JS |
5595 | "2788 FCF param modified event, " |
5596 | "evt_tag:x%x, index:x%x\n", | |
70f3c073 JS |
5597 | acqe_fip->event_tag, |
5598 | acqe_fip->index); | |
38b92ef8 | 5599 | if (phba->fcf.fcf_flag & FCF_DISCOVERY) { |
0c9ab6f5 JS |
5600 | /* |
5601 | * During period of FCF discovery, read the FCF | |
5602 | * table record indexed by the event to update | |
a93ff37a | 5603 | * FCF roundrobin failover eligible FCF bmask. |
0c9ab6f5 JS |
5604 | */ |
5605 | lpfc_printf_log(phba, KERN_INFO, LOG_FIP | | |
5606 | LOG_DISCOVERY, | |
a93ff37a JS |
5607 | "2779 Read FCF (x%x) for updating " |
5608 | "roundrobin FCF failover bmask\n", | |
70f3c073 JS |
5609 | acqe_fip->index); |
5610 | rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index); | |
0c9ab6f5 | 5611 | } |
38b92ef8 JS |
5612 | |
5613 | /* If the FCF discovery is in progress, do nothing. */ | |
3804dc84 | 5614 | spin_lock_irq(&phba->hbalock); |
a93ff37a | 5615 | if (phba->hba_flag & FCF_TS_INPROG) { |
38b92ef8 JS |
5616 | spin_unlock_irq(&phba->hbalock); |
5617 | break; | |
5618 | } | |
5619 | /* If fast FCF failover rescan event is pending, do nothing */ | |
036cad1f | 5620 | if (phba->fcf.fcf_flag & (FCF_REDISC_EVT | FCF_REDISC_PEND)) { |
38b92ef8 JS |
5621 | spin_unlock_irq(&phba->hbalock); |
5622 | break; | |
5623 | } | |
5624 | ||
c2b9712e JS |
5625 | /* If the FCF has been in discovered state, do nothing. */ |
5626 | if (phba->fcf.fcf_flag & FCF_SCAN_DONE) { | |
3804dc84 JS |
5627 | spin_unlock_irq(&phba->hbalock); |
5628 | break; | |
5629 | } | |
5630 | spin_unlock_irq(&phba->hbalock); | |
38b92ef8 | 5631 | |
0c9ab6f5 JS |
5632 | /* Otherwise, scan the entire FCF table and re-discover SAN */ |
5633 | lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, | |
a93ff37a JS |
5634 | "2770 Start FCF table scan per async FCF " |
5635 | "event, evt_tag:x%x, index:x%x\n", | |
70f3c073 | 5636 | acqe_fip->event_tag, acqe_fip->index); |
0c9ab6f5 JS |
5637 | rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, |
5638 | LPFC_FCOE_FCF_GET_FIRST); | |
da0436e9 | 5639 | if (rc) |
0c9ab6f5 JS |
5640 | lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY, |
5641 | "2547 Issue FCF scan read FCF mailbox " | |
a93ff37a | 5642 | "command failed (x%x)\n", rc); |
da0436e9 JS |
5643 | break; |
5644 | ||
70f3c073 | 5645 | case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL: |
da0436e9 | 5646 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, |
e4e74273 | 5647 | "2548 FCF Table full count 0x%x tag 0x%x\n", |
70f3c073 JS |
5648 | bf_get(lpfc_acqe_fip_fcf_count, acqe_fip), |
5649 | acqe_fip->event_tag); | |
da0436e9 JS |
5650 | break; |
5651 | ||
70f3c073 | 5652 | case LPFC_FIP_EVENT_TYPE_FCF_DEAD: |
80c17849 | 5653 | phba->fcoe_cvl_eventtag = acqe_fip->event_tag; |
0c9ab6f5 | 5654 | lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY, |
a93ff37a | 5655 | "2549 FCF (x%x) disconnected from network, " |
70f3c073 | 5656 | "tag:x%x\n", acqe_fip->index, acqe_fip->event_tag); |
38b92ef8 JS |
5657 | /* |
5658 | * If we are in the middle of FCF failover process, clear | |
5659 | * the corresponding FCF bit in the roundrobin bitmap. | |
da0436e9 | 5660 | */ |
fc2b989b | 5661 | spin_lock_irq(&phba->hbalock); |
a1cadfef JS |
5662 | if ((phba->fcf.fcf_flag & FCF_DISCOVERY) && |
5663 | (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) { | |
fc2b989b | 5664 | spin_unlock_irq(&phba->hbalock); |
0c9ab6f5 | 5665 | /* Update FLOGI FCF failover eligible FCF bmask */ |
70f3c073 | 5666 | lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index); |
fc2b989b JS |
5667 | break; |
5668 | } | |
38b92ef8 JS |
5669 | spin_unlock_irq(&phba->hbalock); |
5670 | ||
5671 | /* If the event is not for currently used fcf do nothing */ | |
70f3c073 | 5672 | if (phba->fcf.current_rec.fcf_indx != acqe_fip->index) |
38b92ef8 JS |
5673 | break; |
5674 | ||
5675 | /* | |
5676 | * Otherwise, request the port to rediscover the entire FCF | |
5677 | * table for a fast recovery from case that the current FCF | |
5678 | * is no longer valid as we are not in the middle of FCF | |
5679 | * failover process already. | |
5680 | */ | |
c2b9712e JS |
5681 | spin_lock_irq(&phba->hbalock); |
5682 | /* Mark the fast failover process in progress */ | |
5683 | phba->fcf.fcf_flag |= FCF_DEAD_DISC; | |
5684 | spin_unlock_irq(&phba->hbalock); | |
5685 | ||
5686 | lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, | |
5687 | "2771 Start FCF fast failover process due to " | |
5688 | "FCF DEAD event: evt_tag:x%x, fcf_index:x%x " | |
5689 | "\n", acqe_fip->event_tag, acqe_fip->index); | |
5690 | rc = lpfc_sli4_redisc_fcf_table(phba); | |
5691 | if (rc) { | |
5692 | lpfc_printf_log(phba, KERN_ERR, LOG_FIP | | |
5693 | LOG_DISCOVERY, | |
7afc0ce9 | 5694 | "2772 Issue FCF rediscover mailbox " |
c2b9712e JS |
5695 | "command failed, fail through to FCF " |
5696 | "dead event\n"); | |
5697 | spin_lock_irq(&phba->hbalock); | |
5698 | phba->fcf.fcf_flag &= ~FCF_DEAD_DISC; | |
5699 | spin_unlock_irq(&phba->hbalock); | |
5700 | /* | |
5701 | * Last resort will fail over by treating this | |
5702 | * as a link down to FCF registration. | |
5703 | */ | |
5704 | lpfc_sli4_fcf_dead_failthrough(phba); | |
5705 | } else { | |
5706 | /* Reset FCF roundrobin bmask for new discovery */ | |
5707 | lpfc_sli4_clear_fcf_rr_bmask(phba); | |
5708 | /* | |
5709 | * Handling fast FCF failover to a DEAD FCF event is | |
5710 | * considered equalivant to receiving CVL to all vports. | |
5711 | */ | |
5712 | lpfc_sli4_perform_all_vport_cvl(phba); | |
5713 | } | |
da0436e9 | 5714 | break; |
70f3c073 | 5715 | case LPFC_FIP_EVENT_TYPE_CVL: |
80c17849 | 5716 | phba->fcoe_cvl_eventtag = acqe_fip->event_tag; |
0c9ab6f5 | 5717 | lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY, |
6669f9bb | 5718 | "2718 Clear Virtual Link Received for VPI 0x%x" |
70f3c073 | 5719 | " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag); |
6d368e53 | 5720 | |
6669f9bb | 5721 | vport = lpfc_find_vport_by_vpid(phba, |
5248a749 | 5722 | acqe_fip->index); |
fc2b989b | 5723 | ndlp = lpfc_sli4_perform_vport_cvl(vport); |
6669f9bb JS |
5724 | if (!ndlp) |
5725 | break; | |
695a814e JS |
5726 | active_vlink_present = 0; |
5727 | ||
5728 | vports = lpfc_create_vport_work_array(phba); | |
5729 | if (vports) { | |
5730 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; | |
5731 | i++) { | |
5732 | if ((!(vports[i]->fc_flag & | |
5733 | FC_VPORT_CVL_RCVD)) && | |
5734 | (vports[i]->port_state > LPFC_FDISC)) { | |
5735 | active_vlink_present = 1; | |
5736 | break; | |
5737 | } | |
5738 | } | |
5739 | lpfc_destroy_vport_work_array(phba, vports); | |
5740 | } | |
5741 | ||
cc82355a JS |
5742 | /* |
5743 | * Don't re-instantiate if vport is marked for deletion. | |
5744 | * If we are here first then vport_delete is going to wait | |
5745 | * for discovery to complete. | |
5746 | */ | |
5747 | if (!(vport->load_flag & FC_UNLOADING) && | |
5748 | active_vlink_present) { | |
695a814e JS |
5749 | /* |
5750 | * If there are other active VLinks present, | |
5751 | * re-instantiate the Vlink using FDISC. | |
5752 | */ | |
256ec0d0 JS |
5753 | mod_timer(&ndlp->nlp_delayfunc, |
5754 | jiffies + msecs_to_jiffies(1000)); | |
fc2b989b | 5755 | shost = lpfc_shost_from_vport(vport); |
6669f9bb JS |
5756 | spin_lock_irq(shost->host_lock); |
5757 | ndlp->nlp_flag |= NLP_DELAY_TMO; | |
5758 | spin_unlock_irq(shost->host_lock); | |
695a814e JS |
5759 | ndlp->nlp_last_elscmd = ELS_CMD_FDISC; |
5760 | vport->port_state = LPFC_FDISC; | |
5761 | } else { | |
ecfd03c6 JS |
5762 | /* |
5763 | * Otherwise, we request port to rediscover | |
5764 | * the entire FCF table for a fast recovery | |
5765 | * from possible case that the current FCF | |
0c9ab6f5 JS |
5766 | * is no longer valid if we are not already |
5767 | * in the FCF failover process. | |
ecfd03c6 | 5768 | */ |
fc2b989b | 5769 | spin_lock_irq(&phba->hbalock); |
0c9ab6f5 | 5770 | if (phba->fcf.fcf_flag & FCF_DISCOVERY) { |
fc2b989b JS |
5771 | spin_unlock_irq(&phba->hbalock); |
5772 | break; | |
5773 | } | |
5774 | /* Mark the fast failover process in progress */ | |
0c9ab6f5 | 5775 | phba->fcf.fcf_flag |= FCF_ACVL_DISC; |
fc2b989b | 5776 | spin_unlock_irq(&phba->hbalock); |
0c9ab6f5 JS |
5777 | lpfc_printf_log(phba, KERN_INFO, LOG_FIP | |
5778 | LOG_DISCOVERY, | |
a93ff37a | 5779 | "2773 Start FCF failover per CVL, " |
70f3c073 | 5780 | "evt_tag:x%x\n", acqe_fip->event_tag); |
ecfd03c6 | 5781 | rc = lpfc_sli4_redisc_fcf_table(phba); |
fc2b989b | 5782 | if (rc) { |
0c9ab6f5 JS |
5783 | lpfc_printf_log(phba, KERN_ERR, LOG_FIP | |
5784 | LOG_DISCOVERY, | |
5785 | "2774 Issue FCF rediscover " | |
7afc0ce9 | 5786 | "mailbox command failed, " |
0c9ab6f5 | 5787 | "through to CVL event\n"); |
fc2b989b | 5788 | spin_lock_irq(&phba->hbalock); |
0c9ab6f5 | 5789 | phba->fcf.fcf_flag &= ~FCF_ACVL_DISC; |
fc2b989b | 5790 | spin_unlock_irq(&phba->hbalock); |
ecfd03c6 JS |
5791 | /* |
5792 | * Last resort will be re-try on the | |
5793 | * the current registered FCF entry. | |
5794 | */ | |
5795 | lpfc_retry_pport_discovery(phba); | |
38b92ef8 JS |
5796 | } else |
5797 | /* | |
5798 | * Reset FCF roundrobin bmask for new | |
5799 | * discovery. | |
5800 | */ | |
7d791df7 | 5801 | lpfc_sli4_clear_fcf_rr_bmask(phba); |
6669f9bb JS |
5802 | } |
5803 | break; | |
da0436e9 JS |
5804 | default: |
5805 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
5806 | "0288 Unknown FCoE event type 0x%x event tag " | |
70f3c073 | 5807 | "0x%x\n", event_type, acqe_fip->event_tag); |
da0436e9 JS |
5808 | break; |
5809 | } | |
5810 | } | |
5811 | ||
5812 | /** | |
5813 | * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event | |
5814 | * @phba: pointer to lpfc hba data structure. | |
5815 | * @acqe_link: pointer to the async dcbx completion queue entry. | |
5816 | * | |
5817 | * This routine is to handle the SLI4 asynchronous dcbx event. | |
5818 | **/ | |
5819 | static void | |
5820 | lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba, | |
5821 | struct lpfc_acqe_dcbx *acqe_dcbx) | |
5822 | { | |
4d9ab994 | 5823 | phba->fc_eventTag = acqe_dcbx->event_tag; |
da0436e9 JS |
5824 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, |
5825 | "0290 The SLI4 DCBX asynchronous event is not " | |
5826 | "handled yet\n"); | |
5827 | } | |
5828 | ||
b19a061a JS |
5829 | /** |
5830 | * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event | |
5831 | * @phba: pointer to lpfc hba data structure. | |
5832 | * @acqe_link: pointer to the async grp5 completion queue entry. | |
5833 | * | |
5834 | * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event | |
5835 | * is an asynchronous notified of a logical link speed change. The Port | |
5836 | * reports the logical link speed in units of 10Mbps. | |
5837 | **/ | |
5838 | static void | |
5839 | lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba, | |
5840 | struct lpfc_acqe_grp5 *acqe_grp5) | |
5841 | { | |
5842 | uint16_t prev_ll_spd; | |
5843 | ||
5844 | phba->fc_eventTag = acqe_grp5->event_tag; | |
5845 | phba->fcoe_eventtag = acqe_grp5->event_tag; | |
5846 | prev_ll_spd = phba->sli4_hba.link_state.logical_speed; | |
5847 | phba->sli4_hba.link_state.logical_speed = | |
8b68cd52 | 5848 | (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10; |
b19a061a JS |
5849 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, |
5850 | "2789 GRP5 Async Event: Updating logical link speed " | |
8b68cd52 JS |
5851 | "from %dMbps to %dMbps\n", prev_ll_spd, |
5852 | phba->sli4_hba.link_state.logical_speed); | |
b19a061a JS |
5853 | } |
5854 | ||
da0436e9 JS |
5855 | /** |
5856 | * lpfc_sli4_async_event_proc - Process all the pending asynchronous event | |
5857 | * @phba: pointer to lpfc hba data structure. | |
5858 | * | |
5859 | * This routine is invoked by the worker thread to process all the pending | |
5860 | * SLI4 asynchronous events. | |
5861 | **/ | |
5862 | void lpfc_sli4_async_event_proc(struct lpfc_hba *phba) | |
5863 | { | |
5864 | struct lpfc_cq_event *cq_event; | |
5865 | ||
5866 | /* First, declare the async event has been handled */ | |
5867 | spin_lock_irq(&phba->hbalock); | |
5868 | phba->hba_flag &= ~ASYNC_EVENT; | |
5869 | spin_unlock_irq(&phba->hbalock); | |
5870 | /* Now, handle all the async events */ | |
5871 | while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) { | |
5872 | /* Get the first event from the head of the event queue */ | |
5873 | spin_lock_irq(&phba->hbalock); | |
5874 | list_remove_head(&phba->sli4_hba.sp_asynce_work_queue, | |
5875 | cq_event, struct lpfc_cq_event, list); | |
5876 | spin_unlock_irq(&phba->hbalock); | |
5877 | /* Process the asynchronous event */ | |
5878 | switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) { | |
5879 | case LPFC_TRAILER_CODE_LINK: | |
5880 | lpfc_sli4_async_link_evt(phba, | |
5881 | &cq_event->cqe.acqe_link); | |
5882 | break; | |
5883 | case LPFC_TRAILER_CODE_FCOE: | |
70f3c073 | 5884 | lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip); |
da0436e9 JS |
5885 | break; |
5886 | case LPFC_TRAILER_CODE_DCBX: | |
5887 | lpfc_sli4_async_dcbx_evt(phba, | |
5888 | &cq_event->cqe.acqe_dcbx); | |
5889 | break; | |
b19a061a JS |
5890 | case LPFC_TRAILER_CODE_GRP5: |
5891 | lpfc_sli4_async_grp5_evt(phba, | |
5892 | &cq_event->cqe.acqe_grp5); | |
5893 | break; | |
70f3c073 JS |
5894 | case LPFC_TRAILER_CODE_FC: |
5895 | lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc); | |
5896 | break; | |
5897 | case LPFC_TRAILER_CODE_SLI: | |
5898 | lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli); | |
5899 | break; | |
da0436e9 JS |
5900 | default: |
5901 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
5902 | "1804 Invalid asynchrous event code: " | |
5903 | "x%x\n", bf_get(lpfc_trailer_code, | |
5904 | &cq_event->cqe.mcqe_cmpl)); | |
5905 | break; | |
5906 | } | |
5907 | /* Free the completion event processed to the free pool */ | |
5908 | lpfc_sli4_cq_event_release(phba, cq_event); | |
5909 | } | |
5910 | } | |
5911 | ||
ecfd03c6 JS |
5912 | /** |
5913 | * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event | |
5914 | * @phba: pointer to lpfc hba data structure. | |
5915 | * | |
5916 | * This routine is invoked by the worker thread to process FCF table | |
5917 | * rediscovery pending completion event. | |
5918 | **/ | |
5919 | void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba) | |
5920 | { | |
5921 | int rc; | |
5922 | ||
5923 | spin_lock_irq(&phba->hbalock); | |
5924 | /* Clear FCF rediscovery timeout event */ | |
5925 | phba->fcf.fcf_flag &= ~FCF_REDISC_EVT; | |
5926 | /* Clear driver fast failover FCF record flag */ | |
5927 | phba->fcf.failover_rec.flag = 0; | |
5928 | /* Set state for FCF fast failover */ | |
5929 | phba->fcf.fcf_flag |= FCF_REDISC_FOV; | |
5930 | spin_unlock_irq(&phba->hbalock); | |
5931 | ||
5932 | /* Scan FCF table from the first entry to re-discover SAN */ | |
0c9ab6f5 | 5933 | lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, |
a93ff37a | 5934 | "2777 Start post-quiescent FCF table scan\n"); |
0c9ab6f5 | 5935 | rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST); |
ecfd03c6 | 5936 | if (rc) |
0c9ab6f5 JS |
5937 | lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY, |
5938 | "2747 Issue FCF scan read FCF mailbox " | |
5939 | "command failed 0x%x\n", rc); | |
ecfd03c6 JS |
5940 | } |
5941 | ||
da0436e9 JS |
5942 | /** |
5943 | * lpfc_api_table_setup - Set up per hba pci-device group func api jump table | |
5944 | * @phba: pointer to lpfc hba data structure. | |
5945 | * @dev_grp: The HBA PCI-Device group number. | |
5946 | * | |
5947 | * This routine is invoked to set up the per HBA PCI-Device group function | |
5948 | * API jump table entries. | |
5949 | * | |
5950 | * Return: 0 if success, otherwise -ENODEV | |
5951 | **/ | |
5952 | int | |
5953 | lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp) | |
5954 | { | |
5955 | int rc; | |
5956 | ||
5957 | /* Set up lpfc PCI-device group */ | |
5958 | phba->pci_dev_grp = dev_grp; | |
5959 | ||
5960 | /* The LPFC_PCI_DEV_OC uses SLI4 */ | |
5961 | if (dev_grp == LPFC_PCI_DEV_OC) | |
5962 | phba->sli_rev = LPFC_SLI_REV4; | |
5963 | ||
5964 | /* Set up device INIT API function jump table */ | |
5965 | rc = lpfc_init_api_table_setup(phba, dev_grp); | |
5966 | if (rc) | |
5967 | return -ENODEV; | |
5968 | /* Set up SCSI API function jump table */ | |
5969 | rc = lpfc_scsi_api_table_setup(phba, dev_grp); | |
5970 | if (rc) | |
5971 | return -ENODEV; | |
5972 | /* Set up SLI API function jump table */ | |
5973 | rc = lpfc_sli_api_table_setup(phba, dev_grp); | |
5974 | if (rc) | |
5975 | return -ENODEV; | |
5976 | /* Set up MBOX API function jump table */ | |
5977 | rc = lpfc_mbox_api_table_setup(phba, dev_grp); | |
5978 | if (rc) | |
5979 | return -ENODEV; | |
5980 | ||
5981 | return 0; | |
5b75da2f JS |
5982 | } |
5983 | ||
5984 | /** | |
3621a710 | 5985 | * lpfc_log_intr_mode - Log the active interrupt mode |
5b75da2f JS |
5986 | * @phba: pointer to lpfc hba data structure. |
5987 | * @intr_mode: active interrupt mode adopted. | |
5988 | * | |
5989 | * This routine it invoked to log the currently used active interrupt mode | |
5990 | * to the device. | |
3772a991 JS |
5991 | **/ |
5992 | static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode) | |
5b75da2f JS |
5993 | { |
5994 | switch (intr_mode) { | |
5995 | case 0: | |
5996 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
5997 | "0470 Enable INTx interrupt mode.\n"); | |
5998 | break; | |
5999 | case 1: | |
6000 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
6001 | "0481 Enabled MSI interrupt mode.\n"); | |
6002 | break; | |
6003 | case 2: | |
6004 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
6005 | "0480 Enabled MSI-X interrupt mode.\n"); | |
6006 | break; | |
6007 | default: | |
6008 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
6009 | "0482 Illegal interrupt mode.\n"); | |
6010 | break; | |
6011 | } | |
6012 | return; | |
6013 | } | |
6014 | ||
5b75da2f | 6015 | /** |
3772a991 | 6016 | * lpfc_enable_pci_dev - Enable a generic PCI device. |
5b75da2f JS |
6017 | * @phba: pointer to lpfc hba data structure. |
6018 | * | |
3772a991 JS |
6019 | * This routine is invoked to enable the PCI device that is common to all |
6020 | * PCI devices. | |
5b75da2f JS |
6021 | * |
6022 | * Return codes | |
af901ca1 | 6023 | * 0 - successful |
3772a991 | 6024 | * other values - error |
5b75da2f | 6025 | **/ |
3772a991 JS |
6026 | static int |
6027 | lpfc_enable_pci_dev(struct lpfc_hba *phba) | |
5b75da2f | 6028 | { |
3772a991 | 6029 | struct pci_dev *pdev; |
5b75da2f | 6030 | |
3772a991 JS |
6031 | /* Obtain PCI device reference */ |
6032 | if (!phba->pcidev) | |
6033 | goto out_error; | |
6034 | else | |
6035 | pdev = phba->pcidev; | |
3772a991 JS |
6036 | /* Enable PCI device */ |
6037 | if (pci_enable_device_mem(pdev)) | |
6038 | goto out_error; | |
6039 | /* Request PCI resource for the device */ | |
e0c0483c | 6040 | if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME)) |
3772a991 JS |
6041 | goto out_disable_device; |
6042 | /* Set up device as PCI master and save state for EEH */ | |
6043 | pci_set_master(pdev); | |
6044 | pci_try_set_mwi(pdev); | |
6045 | pci_save_state(pdev); | |
5b75da2f | 6046 | |
0558056c | 6047 | /* PCIe EEH recovery on powerpc platforms needs fundamental reset */ |
453193e0 | 6048 | if (pci_is_pcie(pdev)) |
0558056c JS |
6049 | pdev->needs_freset = 1; |
6050 | ||
3772a991 | 6051 | return 0; |
5b75da2f | 6052 | |
3772a991 JS |
6053 | out_disable_device: |
6054 | pci_disable_device(pdev); | |
6055 | out_error: | |
079b5c91 | 6056 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
e0c0483c | 6057 | "1401 Failed to enable pci device\n"); |
3772a991 | 6058 | return -ENODEV; |
5b75da2f JS |
6059 | } |
6060 | ||
6061 | /** | |
3772a991 | 6062 | * lpfc_disable_pci_dev - Disable a generic PCI device. |
5b75da2f JS |
6063 | * @phba: pointer to lpfc hba data structure. |
6064 | * | |
3772a991 JS |
6065 | * This routine is invoked to disable the PCI device that is common to all |
6066 | * PCI devices. | |
5b75da2f JS |
6067 | **/ |
6068 | static void | |
3772a991 | 6069 | lpfc_disable_pci_dev(struct lpfc_hba *phba) |
5b75da2f | 6070 | { |
3772a991 | 6071 | struct pci_dev *pdev; |
5b75da2f | 6072 | |
3772a991 JS |
6073 | /* Obtain PCI device reference */ |
6074 | if (!phba->pcidev) | |
6075 | return; | |
6076 | else | |
6077 | pdev = phba->pcidev; | |
3772a991 | 6078 | /* Release PCI resource and disable PCI device */ |
e0c0483c | 6079 | pci_release_mem_regions(pdev); |
3772a991 | 6080 | pci_disable_device(pdev); |
5b75da2f JS |
6081 | |
6082 | return; | |
6083 | } | |
6084 | ||
e59058c4 | 6085 | /** |
3772a991 JS |
6086 | * lpfc_reset_hba - Reset a hba |
6087 | * @phba: pointer to lpfc hba data structure. | |
e59058c4 | 6088 | * |
3772a991 JS |
6089 | * This routine is invoked to reset a hba device. It brings the HBA |
6090 | * offline, performs a board restart, and then brings the board back | |
6091 | * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up | |
6092 | * on outstanding mailbox commands. | |
e59058c4 | 6093 | **/ |
3772a991 JS |
6094 | void |
6095 | lpfc_reset_hba(struct lpfc_hba *phba) | |
dea3101e | 6096 | { |
3772a991 JS |
6097 | /* If resets are disabled then set error state and return. */ |
6098 | if (!phba->cfg_enable_hba_reset) { | |
6099 | phba->link_state = LPFC_HBA_ERROR; | |
6100 | return; | |
6101 | } | |
ee62021a JS |
6102 | if (phba->sli.sli_flag & LPFC_SLI_ACTIVE) |
6103 | lpfc_offline_prep(phba, LPFC_MBX_WAIT); | |
6104 | else | |
6105 | lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); | |
3772a991 JS |
6106 | lpfc_offline(phba); |
6107 | lpfc_sli_brdrestart(phba); | |
6108 | lpfc_online(phba); | |
6109 | lpfc_unblock_mgmt_io(phba); | |
6110 | } | |
dea3101e | 6111 | |
0a96e975 JS |
6112 | /** |
6113 | * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions | |
6114 | * @phba: pointer to lpfc hba data structure. | |
6115 | * | |
6116 | * This function enables the PCI SR-IOV virtual functions to a physical | |
6117 | * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to | |
6118 | * enable the number of virtual functions to the physical function. As | |
6119 | * not all devices support SR-IOV, the return code from the pci_enable_sriov() | |
6120 | * API call does not considered as an error condition for most of the device. | |
6121 | **/ | |
6122 | uint16_t | |
6123 | lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba) | |
6124 | { | |
6125 | struct pci_dev *pdev = phba->pcidev; | |
6126 | uint16_t nr_virtfn; | |
6127 | int pos; | |
6128 | ||
0a96e975 JS |
6129 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); |
6130 | if (pos == 0) | |
6131 | return 0; | |
6132 | ||
6133 | pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn); | |
6134 | return nr_virtfn; | |
6135 | } | |
6136 | ||
912e3acd JS |
6137 | /** |
6138 | * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions | |
6139 | * @phba: pointer to lpfc hba data structure. | |
6140 | * @nr_vfn: number of virtual functions to be enabled. | |
6141 | * | |
6142 | * This function enables the PCI SR-IOV virtual functions to a physical | |
6143 | * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to | |
6144 | * enable the number of virtual functions to the physical function. As | |
6145 | * not all devices support SR-IOV, the return code from the pci_enable_sriov() | |
6146 | * API call does not considered as an error condition for most of the device. | |
6147 | **/ | |
6148 | int | |
6149 | lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn) | |
6150 | { | |
6151 | struct pci_dev *pdev = phba->pcidev; | |
0a96e975 | 6152 | uint16_t max_nr_vfn; |
912e3acd JS |
6153 | int rc; |
6154 | ||
0a96e975 JS |
6155 | max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba); |
6156 | if (nr_vfn > max_nr_vfn) { | |
6157 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
6158 | "3057 Requested vfs (%d) greater than " | |
6159 | "supported vfs (%d)", nr_vfn, max_nr_vfn); | |
6160 | return -EINVAL; | |
6161 | } | |
6162 | ||
912e3acd JS |
6163 | rc = pci_enable_sriov(pdev, nr_vfn); |
6164 | if (rc) { | |
6165 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
6166 | "2806 Failed to enable sriov on this device " | |
6167 | "with vfn number nr_vf:%d, rc:%d\n", | |
6168 | nr_vfn, rc); | |
6169 | } else | |
6170 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
6171 | "2807 Successful enable sriov on this device " | |
6172 | "with vfn number nr_vf:%d\n", nr_vfn); | |
6173 | return rc; | |
6174 | } | |
6175 | ||
3772a991 | 6176 | /** |
895427bd | 6177 | * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources. |
3772a991 JS |
6178 | * @phba: pointer to lpfc hba data structure. |
6179 | * | |
895427bd JS |
6180 | * This routine is invoked to set up the driver internal resources before the |
6181 | * device specific resource setup to support the HBA device it attached to. | |
3772a991 JS |
6182 | * |
6183 | * Return codes | |
895427bd JS |
6184 | * 0 - successful |
6185 | * other values - error | |
3772a991 JS |
6186 | **/ |
6187 | static int | |
895427bd | 6188 | lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba) |
3772a991 | 6189 | { |
895427bd | 6190 | struct lpfc_sli *psli = &phba->sli; |
dea3101e | 6191 | |
2e0fef85 | 6192 | /* |
895427bd | 6193 | * Driver resources common to all SLI revisions |
2e0fef85 | 6194 | */ |
895427bd JS |
6195 | atomic_set(&phba->fast_event_count, 0); |
6196 | spin_lock_init(&phba->hbalock); | |
dea3101e | 6197 | |
895427bd JS |
6198 | /* Initialize ndlp management spinlock */ |
6199 | spin_lock_init(&phba->ndlp_lock); | |
6200 | ||
523128e5 JS |
6201 | /* Initialize port_list spinlock */ |
6202 | spin_lock_init(&phba->port_list_lock); | |
895427bd | 6203 | INIT_LIST_HEAD(&phba->port_list); |
523128e5 | 6204 | |
895427bd JS |
6205 | INIT_LIST_HEAD(&phba->work_list); |
6206 | init_waitqueue_head(&phba->wait_4_mlo_m_q); | |
6207 | ||
6208 | /* Initialize the wait queue head for the kernel thread */ | |
6209 | init_waitqueue_head(&phba->work_waitq); | |
6210 | ||
6211 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
f358dd0c | 6212 | "1403 Protocols supported %s %s %s\n", |
895427bd JS |
6213 | ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ? |
6214 | "SCSI" : " "), | |
6215 | ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ? | |
f358dd0c JS |
6216 | "NVME" : " "), |
6217 | (phba->nvmet_support ? "NVMET" : " ")); | |
895427bd | 6218 | |
0794d601 JS |
6219 | /* Initialize the IO buffer list used by driver for SLI3 SCSI */ |
6220 | spin_lock_init(&phba->scsi_buf_list_get_lock); | |
6221 | INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get); | |
6222 | spin_lock_init(&phba->scsi_buf_list_put_lock); | |
6223 | INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put); | |
895427bd JS |
6224 | |
6225 | /* Initialize the fabric iocb list */ | |
6226 | INIT_LIST_HEAD(&phba->fabric_iocb_list); | |
6227 | ||
6228 | /* Initialize list to save ELS buffers */ | |
6229 | INIT_LIST_HEAD(&phba->elsbuf); | |
6230 | ||
6231 | /* Initialize FCF connection rec list */ | |
6232 | INIT_LIST_HEAD(&phba->fcf_conn_rec_list); | |
6233 | ||
6234 | /* Initialize OAS configuration list */ | |
6235 | spin_lock_init(&phba->devicelock); | |
6236 | INIT_LIST_HEAD(&phba->luns); | |
858c9f6c | 6237 | |
3772a991 | 6238 | /* MBOX heartbeat timer */ |
f22eb4d3 | 6239 | timer_setup(&psli->mbox_tmo, lpfc_mbox_timeout, 0); |
3772a991 | 6240 | /* Fabric block timer */ |
f22eb4d3 | 6241 | timer_setup(&phba->fabric_block_timer, lpfc_fabric_block_timeout, 0); |
3772a991 | 6242 | /* EA polling mode timer */ |
f22eb4d3 | 6243 | timer_setup(&phba->eratt_poll, lpfc_poll_eratt, 0); |
895427bd | 6244 | /* Heartbeat timer */ |
f22eb4d3 | 6245 | timer_setup(&phba->hb_tmofunc, lpfc_hb_timeout, 0); |
895427bd | 6246 | |
32517fc0 JS |
6247 | INIT_DELAYED_WORK(&phba->eq_delay_work, lpfc_hb_eq_delay_work); |
6248 | ||
895427bd JS |
6249 | return 0; |
6250 | } | |
6251 | ||
6252 | /** | |
6253 | * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev | |
6254 | * @phba: pointer to lpfc hba data structure. | |
6255 | * | |
6256 | * This routine is invoked to set up the driver internal resources specific to | |
6257 | * support the SLI-3 HBA device it attached to. | |
6258 | * | |
6259 | * Return codes | |
6260 | * 0 - successful | |
6261 | * other values - error | |
6262 | **/ | |
6263 | static int | |
6264 | lpfc_sli_driver_resource_setup(struct lpfc_hba *phba) | |
6265 | { | |
0794d601 | 6266 | int rc, entry_sz; |
895427bd JS |
6267 | |
6268 | /* | |
6269 | * Initialize timers used by driver | |
6270 | */ | |
6271 | ||
6272 | /* FCP polling mode timer */ | |
f22eb4d3 | 6273 | timer_setup(&phba->fcp_poll_timer, lpfc_poll_timeout, 0); |
dea3101e | 6274 | |
3772a991 JS |
6275 | /* Host attention work mask setup */ |
6276 | phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT); | |
6277 | phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4)); | |
dea3101e | 6278 | |
3772a991 JS |
6279 | /* Get all the module params for configuring this host */ |
6280 | lpfc_get_cfgparam(phba); | |
895427bd JS |
6281 | /* Set up phase-1 common device driver resources */ |
6282 | ||
6283 | rc = lpfc_setup_driver_resource_phase1(phba); | |
6284 | if (rc) | |
6285 | return -ENODEV; | |
6286 | ||
49198b37 JS |
6287 | if (phba->pcidev->device == PCI_DEVICE_ID_HORNET) { |
6288 | phba->menlo_flag |= HBA_MENLO_SUPPORT; | |
6289 | /* check for menlo minimum sg count */ | |
6290 | if (phba->cfg_sg_seg_cnt < LPFC_DEFAULT_MENLO_SG_SEG_CNT) | |
6291 | phba->cfg_sg_seg_cnt = LPFC_DEFAULT_MENLO_SG_SEG_CNT; | |
6292 | } | |
6293 | ||
895427bd | 6294 | if (!phba->sli.sli3_ring) |
6396bb22 KC |
6295 | phba->sli.sli3_ring = kcalloc(LPFC_SLI3_MAX_RING, |
6296 | sizeof(struct lpfc_sli_ring), | |
6297 | GFP_KERNEL); | |
895427bd | 6298 | if (!phba->sli.sli3_ring) |
2a76a283 JS |
6299 | return -ENOMEM; |
6300 | ||
dea3101e | 6301 | /* |
96f7077f | 6302 | * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size |
3772a991 | 6303 | * used to create the sg_dma_buf_pool must be dynamically calculated. |
dea3101e | 6304 | */ |
3772a991 | 6305 | |
96f7077f JS |
6306 | /* Initialize the host templates the configured values. */ |
6307 | lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt; | |
96418b5e JS |
6308 | lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt; |
6309 | lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt; | |
96f7077f | 6310 | |
0794d601 JS |
6311 | if (phba->sli_rev == LPFC_SLI_REV4) |
6312 | entry_sz = sizeof(struct sli4_sge); | |
6313 | else | |
6314 | entry_sz = sizeof(struct ulp_bde64); | |
6315 | ||
96f7077f | 6316 | /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */ |
3772a991 | 6317 | if (phba->cfg_enable_bg) { |
96f7077f JS |
6318 | /* |
6319 | * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd, | |
6320 | * the FCP rsp, and a BDE for each. Sice we have no control | |
6321 | * over how many protection data segments the SCSI Layer | |
6322 | * will hand us (ie: there could be one for every block | |
6323 | * in the IO), we just allocate enough BDEs to accomidate | |
6324 | * our max amount and we need to limit lpfc_sg_seg_cnt to | |
6325 | * minimize the risk of running out. | |
6326 | */ | |
6327 | phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + | |
6328 | sizeof(struct fcp_rsp) + | |
0794d601 | 6329 | (LPFC_MAX_SG_SEG_CNT * entry_sz); |
96f7077f JS |
6330 | |
6331 | if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF) | |
6332 | phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF; | |
6333 | ||
6334 | /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */ | |
6335 | phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT; | |
6336 | } else { | |
6337 | /* | |
6338 | * The scsi_buf for a regular I/O will hold the FCP cmnd, | |
6339 | * the FCP rsp, a BDE for each, and a BDE for up to | |
6340 | * cfg_sg_seg_cnt data segments. | |
6341 | */ | |
6342 | phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + | |
6343 | sizeof(struct fcp_rsp) + | |
0794d601 | 6344 | ((phba->cfg_sg_seg_cnt + 2) * entry_sz); |
96f7077f JS |
6345 | |
6346 | /* Total BDEs in BPL for scsi_sg_list */ | |
6347 | phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2; | |
901a920f | 6348 | } |
dea3101e | 6349 | |
96f7077f JS |
6350 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, |
6351 | "9088 sg_tablesize:%d dmabuf_size:%d total_bde:%d\n", | |
6352 | phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size, | |
6353 | phba->cfg_total_seg_cnt); | |
dea3101e | 6354 | |
3772a991 JS |
6355 | phba->max_vpi = LPFC_MAX_VPI; |
6356 | /* This will be set to correct value after config_port mbox */ | |
6357 | phba->max_vports = 0; | |
dea3101e | 6358 | |
3772a991 JS |
6359 | /* |
6360 | * Initialize the SLI Layer to run with lpfc HBAs. | |
6361 | */ | |
6362 | lpfc_sli_setup(phba); | |
895427bd | 6363 | lpfc_sli_queue_init(phba); |
ed957684 | 6364 | |
3772a991 JS |
6365 | /* Allocate device driver memory */ |
6366 | if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ)) | |
6367 | return -ENOMEM; | |
51ef4c26 | 6368 | |
d79c9e9d JS |
6369 | phba->lpfc_sg_dma_buf_pool = |
6370 | dma_pool_create("lpfc_sg_dma_buf_pool", | |
6371 | &phba->pcidev->dev, phba->cfg_sg_dma_buf_size, | |
6372 | BPL_ALIGN_SZ, 0); | |
6373 | ||
6374 | if (!phba->lpfc_sg_dma_buf_pool) | |
6375 | goto fail_free_mem; | |
6376 | ||
6377 | phba->lpfc_cmd_rsp_buf_pool = | |
6378 | dma_pool_create("lpfc_cmd_rsp_buf_pool", | |
6379 | &phba->pcidev->dev, | |
6380 | sizeof(struct fcp_cmnd) + | |
6381 | sizeof(struct fcp_rsp), | |
6382 | BPL_ALIGN_SZ, 0); | |
6383 | ||
6384 | if (!phba->lpfc_cmd_rsp_buf_pool) | |
6385 | goto fail_free_dma_buf_pool; | |
6386 | ||
912e3acd JS |
6387 | /* |
6388 | * Enable sr-iov virtual functions if supported and configured | |
6389 | * through the module parameter. | |
6390 | */ | |
6391 | if (phba->cfg_sriov_nr_virtfn > 0) { | |
6392 | rc = lpfc_sli_probe_sriov_nr_virtfn(phba, | |
6393 | phba->cfg_sriov_nr_virtfn); | |
6394 | if (rc) { | |
6395 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
6396 | "2808 Requested number of SR-IOV " | |
6397 | "virtual functions (%d) is not " | |
6398 | "supported\n", | |
6399 | phba->cfg_sriov_nr_virtfn); | |
6400 | phba->cfg_sriov_nr_virtfn = 0; | |
6401 | } | |
6402 | } | |
6403 | ||
3772a991 | 6404 | return 0; |
d79c9e9d JS |
6405 | |
6406 | fail_free_dma_buf_pool: | |
6407 | dma_pool_destroy(phba->lpfc_sg_dma_buf_pool); | |
6408 | phba->lpfc_sg_dma_buf_pool = NULL; | |
6409 | fail_free_mem: | |
6410 | lpfc_mem_free(phba); | |
6411 | return -ENOMEM; | |
3772a991 | 6412 | } |
ed957684 | 6413 | |
3772a991 JS |
6414 | /** |
6415 | * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev | |
6416 | * @phba: pointer to lpfc hba data structure. | |
6417 | * | |
6418 | * This routine is invoked to unset the driver internal resources set up | |
6419 | * specific for supporting the SLI-3 HBA device it attached to. | |
6420 | **/ | |
6421 | static void | |
6422 | lpfc_sli_driver_resource_unset(struct lpfc_hba *phba) | |
6423 | { | |
6424 | /* Free device driver memory allocated */ | |
6425 | lpfc_mem_free_all(phba); | |
3163f725 | 6426 | |
3772a991 JS |
6427 | return; |
6428 | } | |
dea3101e | 6429 | |
3772a991 | 6430 | /** |
da0436e9 | 6431 | * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev |
3772a991 JS |
6432 | * @phba: pointer to lpfc hba data structure. |
6433 | * | |
da0436e9 JS |
6434 | * This routine is invoked to set up the driver internal resources specific to |
6435 | * support the SLI-4 HBA device it attached to. | |
3772a991 JS |
6436 | * |
6437 | * Return codes | |
af901ca1 | 6438 | * 0 - successful |
da0436e9 | 6439 | * other values - error |
3772a991 JS |
6440 | **/ |
6441 | static int | |
da0436e9 | 6442 | lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba) |
3772a991 | 6443 | { |
28baac74 | 6444 | LPFC_MBOXQ_t *mboxq; |
f358dd0c | 6445 | MAILBOX_t *mb; |
895427bd | 6446 | int rc, i, max_buf_size; |
28baac74 JS |
6447 | uint8_t pn_page[LPFC_MAX_SUPPORTED_PAGES] = {0}; |
6448 | struct lpfc_mqe *mqe; | |
09294d46 | 6449 | int longs; |
81e6a637 | 6450 | int extra; |
f358dd0c | 6451 | uint64_t wwn; |
b92dc72d JS |
6452 | u32 if_type; |
6453 | u32 if_fam; | |
da0436e9 | 6454 | |
895427bd | 6455 | phba->sli4_hba.num_present_cpu = lpfc_present_cpu; |
222e9239 | 6456 | phba->sli4_hba.num_possible_cpu = num_possible_cpus(); |
895427bd JS |
6457 | phba->sli4_hba.curr_disp_cpu = 0; |
6458 | ||
716d3bc5 JS |
6459 | /* Get all the module params for configuring this host */ |
6460 | lpfc_get_cfgparam(phba); | |
6461 | ||
895427bd JS |
6462 | /* Set up phase-1 common device driver resources */ |
6463 | rc = lpfc_setup_driver_resource_phase1(phba); | |
6464 | if (rc) | |
6465 | return -ENODEV; | |
6466 | ||
da0436e9 JS |
6467 | /* Before proceed, wait for POST done and device ready */ |
6468 | rc = lpfc_sli4_post_status_check(phba); | |
6469 | if (rc) | |
6470 | return -ENODEV; | |
6471 | ||
3cee98db JS |
6472 | /* Allocate all driver workqueues here */ |
6473 | ||
6474 | /* The lpfc_wq workqueue for deferred irq use */ | |
6475 | phba->wq = alloc_workqueue("lpfc_wq", WQ_MEM_RECLAIM, 0); | |
6476 | ||
3772a991 | 6477 | /* |
da0436e9 | 6478 | * Initialize timers used by driver |
3772a991 | 6479 | */ |
3772a991 | 6480 | |
f22eb4d3 | 6481 | timer_setup(&phba->rrq_tmr, lpfc_rrq_timeout, 0); |
3772a991 | 6482 | |
ecfd03c6 | 6483 | /* FCF rediscover timer */ |
f22eb4d3 | 6484 | timer_setup(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo, 0); |
ecfd03c6 | 6485 | |
7ad20aa9 JS |
6486 | /* |
6487 | * Control structure for handling external multi-buffer mailbox | |
6488 | * command pass-through. | |
6489 | */ | |
6490 | memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0, | |
6491 | sizeof(struct lpfc_mbox_ext_buf_ctx)); | |
6492 | INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list); | |
6493 | ||
da0436e9 | 6494 | phba->max_vpi = LPFC_MAX_VPI; |
67d12733 | 6495 | |
da0436e9 JS |
6496 | /* This will be set to correct value after the read_config mbox */ |
6497 | phba->max_vports = 0; | |
3772a991 | 6498 | |
da0436e9 JS |
6499 | /* Program the default value of vlan_id and fc_map */ |
6500 | phba->valid_vlan = 0; | |
6501 | phba->fc_map[0] = LPFC_FCOE_FCF_MAP0; | |
6502 | phba->fc_map[1] = LPFC_FCOE_FCF_MAP1; | |
6503 | phba->fc_map[2] = LPFC_FCOE_FCF_MAP2; | |
3772a991 | 6504 | |
2a76a283 JS |
6505 | /* |
6506 | * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands | |
895427bd JS |
6507 | * we will associate a new ring, for each EQ/CQ/WQ tuple. |
6508 | * The WQ create will allocate the ring. | |
2a76a283 | 6509 | */ |
09294d46 | 6510 | |
da0436e9 | 6511 | /* Initialize buffer queue management fields */ |
895427bd | 6512 | INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list); |
da0436e9 JS |
6513 | phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc; |
6514 | phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free; | |
3772a991 | 6515 | |
da0436e9 JS |
6516 | /* |
6517 | * Initialize the SLI Layer to run with lpfc SLI4 HBAs. | |
6518 | */ | |
895427bd JS |
6519 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) { |
6520 | /* Initialize the Abort scsi buffer list used by driver */ | |
6521 | spin_lock_init(&phba->sli4_hba.abts_scsi_buf_list_lock); | |
6522 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_scsi_buf_list); | |
6523 | } | |
6524 | ||
6525 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
6526 | /* Initialize the Abort nvme buffer list used by driver */ | |
5e5b511d | 6527 | spin_lock_init(&phba->sli4_hba.abts_nvmet_buf_list_lock); |
86c67379 | 6528 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); |
a8cf5dfe | 6529 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list); |
79d8c4ce JS |
6530 | spin_lock_init(&phba->sli4_hba.t_active_list_lock); |
6531 | INIT_LIST_HEAD(&phba->sli4_hba.t_active_ctx_list); | |
895427bd JS |
6532 | } |
6533 | ||
da0436e9 | 6534 | /* This abort list used by worker thread */ |
895427bd | 6535 | spin_lock_init(&phba->sli4_hba.sgl_list_lock); |
a8cf5dfe | 6536 | spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock); |
3772a991 | 6537 | |
da0436e9 | 6538 | /* |
6d368e53 | 6539 | * Initialize driver internal slow-path work queues |
da0436e9 | 6540 | */ |
3772a991 | 6541 | |
da0436e9 JS |
6542 | /* Driver internel slow-path CQ Event pool */ |
6543 | INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool); | |
6544 | /* Response IOCB work queue list */ | |
45ed1190 | 6545 | INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event); |
da0436e9 JS |
6546 | /* Asynchronous event CQ Event work queue list */ |
6547 | INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue); | |
6548 | /* Fast-path XRI aborted CQ Event work queue list */ | |
6549 | INIT_LIST_HEAD(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue); | |
6550 | /* Slow-path XRI aborted CQ Event work queue list */ | |
6551 | INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue); | |
6552 | /* Receive queue CQ Event work queue list */ | |
6553 | INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue); | |
6554 | ||
6d368e53 JS |
6555 | /* Initialize extent block lists. */ |
6556 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list); | |
6557 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list); | |
6558 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list); | |
6559 | INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list); | |
6560 | ||
d1f525aa JS |
6561 | /* Initialize mboxq lists. If the early init routines fail |
6562 | * these lists need to be correctly initialized. | |
6563 | */ | |
6564 | INIT_LIST_HEAD(&phba->sli.mboxq); | |
6565 | INIT_LIST_HEAD(&phba->sli.mboxq_cmpl); | |
6566 | ||
448193b5 JS |
6567 | /* initialize optic_state to 0xFF */ |
6568 | phba->sli4_hba.lnk_info.optic_state = 0xff; | |
6569 | ||
da0436e9 JS |
6570 | /* Allocate device driver memory */ |
6571 | rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ); | |
6572 | if (rc) | |
6573 | return -ENOMEM; | |
6574 | ||
2fcee4bf | 6575 | /* IF Type 2 ports get initialized now. */ |
27d6ac0a | 6576 | if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >= |
2fcee4bf JS |
6577 | LPFC_SLI_INTF_IF_TYPE_2) { |
6578 | rc = lpfc_pci_function_reset(phba); | |
895427bd JS |
6579 | if (unlikely(rc)) { |
6580 | rc = -ENODEV; | |
6581 | goto out_free_mem; | |
6582 | } | |
946727dc | 6583 | phba->temp_sensor_support = 1; |
2fcee4bf JS |
6584 | } |
6585 | ||
da0436e9 JS |
6586 | /* Create the bootstrap mailbox command */ |
6587 | rc = lpfc_create_bootstrap_mbox(phba); | |
6588 | if (unlikely(rc)) | |
6589 | goto out_free_mem; | |
6590 | ||
6591 | /* Set up the host's endian order with the device. */ | |
6592 | rc = lpfc_setup_endian_order(phba); | |
6593 | if (unlikely(rc)) | |
6594 | goto out_free_bsmbx; | |
6595 | ||
6596 | /* Set up the hba's configuration parameters. */ | |
6597 | rc = lpfc_sli4_read_config(phba); | |
cff261f6 JS |
6598 | if (unlikely(rc)) |
6599 | goto out_free_bsmbx; | |
6600 | rc = lpfc_mem_alloc_active_rrq_pool_s4(phba); | |
da0436e9 JS |
6601 | if (unlikely(rc)) |
6602 | goto out_free_bsmbx; | |
6603 | ||
2fcee4bf JS |
6604 | /* IF Type 0 ports get initialized now. */ |
6605 | if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == | |
6606 | LPFC_SLI_INTF_IF_TYPE_0) { | |
6607 | rc = lpfc_pci_function_reset(phba); | |
6608 | if (unlikely(rc)) | |
6609 | goto out_free_bsmbx; | |
6610 | } | |
da0436e9 | 6611 | |
cb5172ea JS |
6612 | mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, |
6613 | GFP_KERNEL); | |
6614 | if (!mboxq) { | |
6615 | rc = -ENOMEM; | |
6616 | goto out_free_bsmbx; | |
6617 | } | |
6618 | ||
f358dd0c | 6619 | /* Check for NVMET being configured */ |
895427bd | 6620 | phba->nvmet_support = 0; |
f358dd0c JS |
6621 | if (lpfc_enable_nvmet_cnt) { |
6622 | ||
6623 | /* First get WWN of HBA instance */ | |
6624 | lpfc_read_nv(phba, mboxq); | |
6625 | rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
6626 | if (rc != MBX_SUCCESS) { | |
6627 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
6628 | "6016 Mailbox failed , mbxCmd x%x " | |
6629 | "READ_NV, mbxStatus x%x\n", | |
6630 | bf_get(lpfc_mqe_command, &mboxq->u.mqe), | |
6631 | bf_get(lpfc_mqe_status, &mboxq->u.mqe)); | |
d1f525aa | 6632 | mempool_free(mboxq, phba->mbox_mem_pool); |
f358dd0c JS |
6633 | rc = -EIO; |
6634 | goto out_free_bsmbx; | |
6635 | } | |
6636 | mb = &mboxq->u.mb; | |
6637 | memcpy(&wwn, (char *)mb->un.varRDnvp.nodename, | |
6638 | sizeof(uint64_t)); | |
6639 | wwn = cpu_to_be64(wwn); | |
6640 | phba->sli4_hba.wwnn.u.name = wwn; | |
6641 | memcpy(&wwn, (char *)mb->un.varRDnvp.portname, | |
6642 | sizeof(uint64_t)); | |
6643 | /* wwn is WWPN of HBA instance */ | |
6644 | wwn = cpu_to_be64(wwn); | |
6645 | phba->sli4_hba.wwpn.u.name = wwn; | |
6646 | ||
6647 | /* Check to see if it matches any module parameter */ | |
6648 | for (i = 0; i < lpfc_enable_nvmet_cnt; i++) { | |
6649 | if (wwn == lpfc_enable_nvmet[i]) { | |
7d708033 | 6650 | #if (IS_ENABLED(CONFIG_NVME_TARGET_FC)) |
3c603be9 JS |
6651 | if (lpfc_nvmet_mem_alloc(phba)) |
6652 | break; | |
6653 | ||
6654 | phba->nvmet_support = 1; /* a match */ | |
6655 | ||
f358dd0c JS |
6656 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
6657 | "6017 NVME Target %016llx\n", | |
6658 | wwn); | |
7d708033 JS |
6659 | #else |
6660 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
6661 | "6021 Can't enable NVME Target." | |
6662 | " NVME_TARGET_FC infrastructure" | |
6663 | " is not in kernel\n"); | |
6664 | #endif | |
c490850a JS |
6665 | /* Not supported for NVMET */ |
6666 | phba->cfg_xri_rebalancing = 0; | |
3c603be9 | 6667 | break; |
f358dd0c JS |
6668 | } |
6669 | } | |
6670 | } | |
895427bd JS |
6671 | |
6672 | lpfc_nvme_mod_param_dep(phba); | |
6673 | ||
fedd3b7b | 6674 | /* Get the Supported Pages if PORT_CAPABILITIES is supported by port. */ |
cb5172ea JS |
6675 | lpfc_supported_pages(mboxq); |
6676 | rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
fedd3b7b JS |
6677 | if (!rc) { |
6678 | mqe = &mboxq->u.mqe; | |
6679 | memcpy(&pn_page[0], ((uint8_t *)&mqe->un.supp_pages.word3), | |
6680 | LPFC_MAX_SUPPORTED_PAGES); | |
6681 | for (i = 0; i < LPFC_MAX_SUPPORTED_PAGES; i++) { | |
6682 | switch (pn_page[i]) { | |
6683 | case LPFC_SLI4_PARAMETERS: | |
6684 | phba->sli4_hba.pc_sli4_params.supported = 1; | |
6685 | break; | |
6686 | default: | |
6687 | break; | |
6688 | } | |
6689 | } | |
6690 | /* Read the port's SLI4 Parameters capabilities if supported. */ | |
6691 | if (phba->sli4_hba.pc_sli4_params.supported) | |
6692 | rc = lpfc_pc_sli4_params_get(phba, mboxq); | |
6693 | if (rc) { | |
6694 | mempool_free(mboxq, phba->mbox_mem_pool); | |
6695 | rc = -EIO; | |
6696 | goto out_free_bsmbx; | |
cb5172ea JS |
6697 | } |
6698 | } | |
65791f1f | 6699 | |
fedd3b7b JS |
6700 | /* |
6701 | * Get sli4 parameters that override parameters from Port capabilities. | |
6d368e53 JS |
6702 | * If this call fails, it isn't critical unless the SLI4 parameters come |
6703 | * back in conflict. | |
fedd3b7b | 6704 | */ |
6d368e53 JS |
6705 | rc = lpfc_get_sli4_parameters(phba, mboxq); |
6706 | if (rc) { | |
b92dc72d JS |
6707 | if_type = bf_get(lpfc_sli_intf_if_type, |
6708 | &phba->sli4_hba.sli_intf); | |
6709 | if_fam = bf_get(lpfc_sli_intf_sli_family, | |
6710 | &phba->sli4_hba.sli_intf); | |
6d368e53 JS |
6711 | if (phba->sli4_hba.extents_in_use && |
6712 | phba->sli4_hba.rpi_hdrs_in_use) { | |
6713 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
6714 | "2999 Unsupported SLI4 Parameters " | |
6715 | "Extents and RPI headers enabled.\n"); | |
b92dc72d JS |
6716 | if (if_type == LPFC_SLI_INTF_IF_TYPE_0 && |
6717 | if_fam == LPFC_SLI_INTF_FAMILY_BE2) { | |
6718 | mempool_free(mboxq, phba->mbox_mem_pool); | |
6719 | rc = -EIO; | |
6720 | goto out_free_bsmbx; | |
6721 | } | |
6722 | } | |
6723 | if (!(if_type == LPFC_SLI_INTF_IF_TYPE_0 && | |
6724 | if_fam == LPFC_SLI_INTF_FAMILY_BE2)) { | |
6725 | mempool_free(mboxq, phba->mbox_mem_pool); | |
6726 | rc = -EIO; | |
6727 | goto out_free_bsmbx; | |
6d368e53 JS |
6728 | } |
6729 | } | |
895427bd | 6730 | |
d79c9e9d JS |
6731 | /* |
6732 | * 1 for cmd, 1 for rsp, NVME adds an extra one | |
6733 | * for boundary conditions in its max_sgl_segment template. | |
6734 | */ | |
6735 | extra = 2; | |
6736 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) | |
6737 | extra++; | |
6738 | ||
6739 | /* | |
6740 | * It doesn't matter what family our adapter is in, we are | |
6741 | * limited to 2 Pages, 512 SGEs, for our SGL. | |
6742 | * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp | |
6743 | */ | |
6744 | max_buf_size = (2 * SLI4_PAGE_SIZE); | |
6745 | ||
6746 | /* | |
6747 | * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size | |
6748 | * used to create the sg_dma_buf_pool must be calculated. | |
6749 | */ | |
6750 | if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) { | |
6751 | /* Both cfg_enable_bg and cfg_external_dif code paths */ | |
6752 | ||
6753 | /* | |
6754 | * The scsi_buf for a T10-DIF I/O holds the FCP cmnd, | |
6755 | * the FCP rsp, and a SGE. Sice we have no control | |
6756 | * over how many protection segments the SCSI Layer | |
6757 | * will hand us (ie: there could be one for every block | |
6758 | * in the IO), just allocate enough SGEs to accomidate | |
6759 | * our max amount and we need to limit lpfc_sg_seg_cnt | |
6760 | * to minimize the risk of running out. | |
6761 | */ | |
6762 | phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + | |
6763 | sizeof(struct fcp_rsp) + max_buf_size; | |
6764 | ||
6765 | /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */ | |
6766 | phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT; | |
6767 | ||
6768 | /* | |
6769 | * If supporting DIF, reduce the seg count for scsi to | |
6770 | * allow room for the DIF sges. | |
6771 | */ | |
6772 | if (phba->cfg_enable_bg && | |
6773 | phba->cfg_sg_seg_cnt > LPFC_MAX_BG_SLI4_SEG_CNT_DIF) | |
6774 | phba->cfg_scsi_seg_cnt = LPFC_MAX_BG_SLI4_SEG_CNT_DIF; | |
6775 | else | |
6776 | phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt; | |
6777 | ||
6778 | } else { | |
6779 | /* | |
6780 | * The scsi_buf for a regular I/O holds the FCP cmnd, | |
6781 | * the FCP rsp, a SGE for each, and a SGE for up to | |
6782 | * cfg_sg_seg_cnt data segments. | |
6783 | */ | |
6784 | phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + | |
6785 | sizeof(struct fcp_rsp) + | |
6786 | ((phba->cfg_sg_seg_cnt + extra) * | |
6787 | sizeof(struct sli4_sge)); | |
6788 | ||
6789 | /* Total SGEs for scsi_sg_list */ | |
6790 | phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + extra; | |
6791 | phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt; | |
6792 | ||
6793 | /* | |
6794 | * NOTE: if (phba->cfg_sg_seg_cnt + extra) <= 256 we only | |
6795 | * need to post 1 page for the SGL. | |
6796 | */ | |
6797 | } | |
6798 | ||
6799 | if (phba->cfg_xpsgl && !phba->nvmet_support) | |
6800 | phba->cfg_sg_dma_buf_size = LPFC_DEFAULT_XPSGL_SIZE; | |
6801 | else if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ) | |
6802 | phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ; | |
6803 | else | |
6804 | phba->cfg_sg_dma_buf_size = | |
6805 | SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size); | |
6806 | ||
6807 | phba->border_sge_num = phba->cfg_sg_dma_buf_size / | |
6808 | sizeof(struct sli4_sge); | |
6809 | ||
6810 | /* Limit to LPFC_MAX_NVME_SEG_CNT for NVME. */ | |
6811 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
6812 | if (phba->cfg_sg_seg_cnt > LPFC_MAX_NVME_SEG_CNT) { | |
6813 | lpfc_printf_log(phba, KERN_INFO, LOG_NVME | LOG_INIT, | |
6814 | "6300 Reducing NVME sg segment " | |
6815 | "cnt to %d\n", | |
6816 | LPFC_MAX_NVME_SEG_CNT); | |
6817 | phba->cfg_nvme_seg_cnt = LPFC_MAX_NVME_SEG_CNT; | |
6818 | } else | |
6819 | phba->cfg_nvme_seg_cnt = phba->cfg_sg_seg_cnt; | |
6820 | } | |
6821 | ||
6822 | /* Initialize the host templates with the updated values. */ | |
6823 | lpfc_vport_template.sg_tablesize = phba->cfg_scsi_seg_cnt; | |
6824 | lpfc_template.sg_tablesize = phba->cfg_scsi_seg_cnt; | |
6825 | lpfc_template_no_hr.sg_tablesize = phba->cfg_scsi_seg_cnt; | |
6826 | ||
6827 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, | |
6828 | "9087 sg_seg_cnt:%d dmabuf_size:%d " | |
6829 | "total:%d scsi:%d nvme:%d\n", | |
6830 | phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size, | |
6831 | phba->cfg_total_seg_cnt, phba->cfg_scsi_seg_cnt, | |
6832 | phba->cfg_nvme_seg_cnt); | |
6833 | ||
6834 | if (phba->cfg_sg_dma_buf_size < SLI4_PAGE_SIZE) | |
6835 | i = phba->cfg_sg_dma_buf_size; | |
6836 | else | |
6837 | i = SLI4_PAGE_SIZE; | |
6838 | ||
6839 | phba->lpfc_sg_dma_buf_pool = | |
6840 | dma_pool_create("lpfc_sg_dma_buf_pool", | |
6841 | &phba->pcidev->dev, | |
6842 | phba->cfg_sg_dma_buf_size, | |
6843 | i, 0); | |
6844 | if (!phba->lpfc_sg_dma_buf_pool) | |
6845 | goto out_free_bsmbx; | |
6846 | ||
6847 | phba->lpfc_cmd_rsp_buf_pool = | |
6848 | dma_pool_create("lpfc_cmd_rsp_buf_pool", | |
6849 | &phba->pcidev->dev, | |
6850 | sizeof(struct fcp_cmnd) + | |
6851 | sizeof(struct fcp_rsp), | |
6852 | i, 0); | |
6853 | if (!phba->lpfc_cmd_rsp_buf_pool) | |
6854 | goto out_free_sg_dma_buf; | |
6855 | ||
cb5172ea | 6856 | mempool_free(mboxq, phba->mbox_mem_pool); |
1ba981fd JS |
6857 | |
6858 | /* Verify OAS is supported */ | |
6859 | lpfc_sli4_oas_verify(phba); | |
1ba981fd | 6860 | |
d2cc9bcd JS |
6861 | /* Verify RAS support on adapter */ |
6862 | lpfc_sli4_ras_init(phba); | |
6863 | ||
5350d872 JS |
6864 | /* Verify all the SLI4 queues */ |
6865 | rc = lpfc_sli4_queue_verify(phba); | |
da0436e9 | 6866 | if (rc) |
d79c9e9d | 6867 | goto out_free_cmd_rsp_buf; |
da0436e9 JS |
6868 | |
6869 | /* Create driver internal CQE event pool */ | |
6870 | rc = lpfc_sli4_cq_event_pool_create(phba); | |
6871 | if (rc) | |
d79c9e9d | 6872 | goto out_free_cmd_rsp_buf; |
da0436e9 | 6873 | |
8a9d2e80 JS |
6874 | /* Initialize sgl lists per host */ |
6875 | lpfc_init_sgl_list(phba); | |
6876 | ||
6877 | /* Allocate and initialize active sgl array */ | |
da0436e9 JS |
6878 | rc = lpfc_init_active_sgl_array(phba); |
6879 | if (rc) { | |
6880 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
6881 | "1430 Failed to initialize sgl list.\n"); | |
8a9d2e80 | 6882 | goto out_destroy_cq_event_pool; |
da0436e9 | 6883 | } |
da0436e9 JS |
6884 | rc = lpfc_sli4_init_rpi_hdrs(phba); |
6885 | if (rc) { | |
6886 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
6887 | "1432 Failed to initialize rpi headers.\n"); | |
6888 | goto out_free_active_sgl; | |
6889 | } | |
6890 | ||
a93ff37a | 6891 | /* Allocate eligible FCF bmask memory for FCF roundrobin failover */ |
0c9ab6f5 | 6892 | longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG; |
6396bb22 | 6893 | phba->fcf.fcf_rr_bmask = kcalloc(longs, sizeof(unsigned long), |
0c9ab6f5 JS |
6894 | GFP_KERNEL); |
6895 | if (!phba->fcf.fcf_rr_bmask) { | |
6896 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
6897 | "2759 Failed allocate memory for FCF round " | |
6898 | "robin failover bmask\n"); | |
0558056c | 6899 | rc = -ENOMEM; |
0c9ab6f5 JS |
6900 | goto out_remove_rpi_hdrs; |
6901 | } | |
6902 | ||
6a828b0f | 6903 | phba->sli4_hba.hba_eq_hdl = kcalloc(phba->cfg_irq_chann, |
cdb42bec JS |
6904 | sizeof(struct lpfc_hba_eq_hdl), |
6905 | GFP_KERNEL); | |
895427bd | 6906 | if (!phba->sli4_hba.hba_eq_hdl) { |
67d12733 JS |
6907 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
6908 | "2572 Failed allocate memory for " | |
6909 | "fast-path per-EQ handle array\n"); | |
6910 | rc = -ENOMEM; | |
6911 | goto out_free_fcf_rr_bmask; | |
da0436e9 JS |
6912 | } |
6913 | ||
222e9239 | 6914 | phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_possible_cpu, |
895427bd JS |
6915 | sizeof(struct lpfc_vector_map_info), |
6916 | GFP_KERNEL); | |
7bb03bbf JS |
6917 | if (!phba->sli4_hba.cpu_map) { |
6918 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
6919 | "3327 Failed allocate memory for msi-x " | |
6920 | "interrupt vector mapping\n"); | |
6921 | rc = -ENOMEM; | |
895427bd | 6922 | goto out_free_hba_eq_hdl; |
7bb03bbf | 6923 | } |
b246de17 | 6924 | |
32517fc0 JS |
6925 | phba->sli4_hba.eq_info = alloc_percpu(struct lpfc_eq_intr_info); |
6926 | if (!phba->sli4_hba.eq_info) { | |
6927 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
6928 | "3321 Failed allocation for per_cpu stats\n"); | |
6929 | rc = -ENOMEM; | |
6930 | goto out_free_hba_cpu_map; | |
6931 | } | |
912e3acd JS |
6932 | /* |
6933 | * Enable sr-iov virtual functions if supported and configured | |
6934 | * through the module parameter. | |
6935 | */ | |
6936 | if (phba->cfg_sriov_nr_virtfn > 0) { | |
6937 | rc = lpfc_sli_probe_sriov_nr_virtfn(phba, | |
6938 | phba->cfg_sriov_nr_virtfn); | |
6939 | if (rc) { | |
6940 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
6941 | "3020 Requested number of SR-IOV " | |
6942 | "virtual functions (%d) is not " | |
6943 | "supported\n", | |
6944 | phba->cfg_sriov_nr_virtfn); | |
6945 | phba->cfg_sriov_nr_virtfn = 0; | |
6946 | } | |
6947 | } | |
6948 | ||
5248a749 | 6949 | return 0; |
da0436e9 | 6950 | |
32517fc0 JS |
6951 | out_free_hba_cpu_map: |
6952 | kfree(phba->sli4_hba.cpu_map); | |
895427bd JS |
6953 | out_free_hba_eq_hdl: |
6954 | kfree(phba->sli4_hba.hba_eq_hdl); | |
0c9ab6f5 JS |
6955 | out_free_fcf_rr_bmask: |
6956 | kfree(phba->fcf.fcf_rr_bmask); | |
da0436e9 JS |
6957 | out_remove_rpi_hdrs: |
6958 | lpfc_sli4_remove_rpi_hdrs(phba); | |
6959 | out_free_active_sgl: | |
6960 | lpfc_free_active_sgl(phba); | |
da0436e9 JS |
6961 | out_destroy_cq_event_pool: |
6962 | lpfc_sli4_cq_event_pool_destroy(phba); | |
d79c9e9d JS |
6963 | out_free_cmd_rsp_buf: |
6964 | dma_pool_destroy(phba->lpfc_cmd_rsp_buf_pool); | |
6965 | phba->lpfc_cmd_rsp_buf_pool = NULL; | |
6966 | out_free_sg_dma_buf: | |
6967 | dma_pool_destroy(phba->lpfc_sg_dma_buf_pool); | |
6968 | phba->lpfc_sg_dma_buf_pool = NULL; | |
da0436e9 JS |
6969 | out_free_bsmbx: |
6970 | lpfc_destroy_bootstrap_mbox(phba); | |
6971 | out_free_mem: | |
6972 | lpfc_mem_free(phba); | |
6973 | return rc; | |
6974 | } | |
6975 | ||
6976 | /** | |
6977 | * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev | |
6978 | * @phba: pointer to lpfc hba data structure. | |
6979 | * | |
6980 | * This routine is invoked to unset the driver internal resources set up | |
6981 | * specific for supporting the SLI-4 HBA device it attached to. | |
6982 | **/ | |
6983 | static void | |
6984 | lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba) | |
6985 | { | |
6986 | struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry; | |
6987 | ||
32517fc0 JS |
6988 | free_percpu(phba->sli4_hba.eq_info); |
6989 | ||
7bb03bbf JS |
6990 | /* Free memory allocated for msi-x interrupt vector to CPU mapping */ |
6991 | kfree(phba->sli4_hba.cpu_map); | |
222e9239 | 6992 | phba->sli4_hba.num_possible_cpu = 0; |
7bb03bbf | 6993 | phba->sli4_hba.num_present_cpu = 0; |
76fd07a6 | 6994 | phba->sli4_hba.curr_disp_cpu = 0; |
7bb03bbf | 6995 | |
da0436e9 | 6996 | /* Free memory allocated for fast-path work queue handles */ |
895427bd | 6997 | kfree(phba->sli4_hba.hba_eq_hdl); |
da0436e9 JS |
6998 | |
6999 | /* Free the allocated rpi headers. */ | |
7000 | lpfc_sli4_remove_rpi_hdrs(phba); | |
d11e31dd | 7001 | lpfc_sli4_remove_rpis(phba); |
da0436e9 | 7002 | |
0c9ab6f5 JS |
7003 | /* Free eligible FCF index bmask */ |
7004 | kfree(phba->fcf.fcf_rr_bmask); | |
7005 | ||
da0436e9 JS |
7006 | /* Free the ELS sgl list */ |
7007 | lpfc_free_active_sgl(phba); | |
8a9d2e80 | 7008 | lpfc_free_els_sgl_list(phba); |
f358dd0c | 7009 | lpfc_free_nvmet_sgl_list(phba); |
da0436e9 | 7010 | |
da0436e9 JS |
7011 | /* Free the completion queue EQ event pool */ |
7012 | lpfc_sli4_cq_event_release_all(phba); | |
7013 | lpfc_sli4_cq_event_pool_destroy(phba); | |
7014 | ||
6d368e53 JS |
7015 | /* Release resource identifiers. */ |
7016 | lpfc_sli4_dealloc_resource_identifiers(phba); | |
7017 | ||
da0436e9 JS |
7018 | /* Free the bsmbx region. */ |
7019 | lpfc_destroy_bootstrap_mbox(phba); | |
7020 | ||
7021 | /* Free the SLI Layer memory with SLI4 HBAs */ | |
7022 | lpfc_mem_free_all(phba); | |
7023 | ||
7024 | /* Free the current connect table */ | |
7025 | list_for_each_entry_safe(conn_entry, next_conn_entry, | |
4d9ab994 JS |
7026 | &phba->fcf_conn_rec_list, list) { |
7027 | list_del_init(&conn_entry->list); | |
da0436e9 | 7028 | kfree(conn_entry); |
4d9ab994 | 7029 | } |
da0436e9 JS |
7030 | |
7031 | return; | |
7032 | } | |
7033 | ||
7034 | /** | |
25985edc | 7035 | * lpfc_init_api_table_setup - Set up init api function jump table |
da0436e9 JS |
7036 | * @phba: The hba struct for which this call is being executed. |
7037 | * @dev_grp: The HBA PCI-Device group number. | |
7038 | * | |
7039 | * This routine sets up the device INIT interface API function jump table | |
7040 | * in @phba struct. | |
7041 | * | |
7042 | * Returns: 0 - success, -ENODEV - failure. | |
7043 | **/ | |
7044 | int | |
7045 | lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp) | |
7046 | { | |
84d1b006 JS |
7047 | phba->lpfc_hba_init_link = lpfc_hba_init_link; |
7048 | phba->lpfc_hba_down_link = lpfc_hba_down_link; | |
7f86059a | 7049 | phba->lpfc_selective_reset = lpfc_selective_reset; |
da0436e9 JS |
7050 | switch (dev_grp) { |
7051 | case LPFC_PCI_DEV_LP: | |
7052 | phba->lpfc_hba_down_post = lpfc_hba_down_post_s3; | |
7053 | phba->lpfc_handle_eratt = lpfc_handle_eratt_s3; | |
7054 | phba->lpfc_stop_port = lpfc_stop_port_s3; | |
7055 | break; | |
7056 | case LPFC_PCI_DEV_OC: | |
7057 | phba->lpfc_hba_down_post = lpfc_hba_down_post_s4; | |
7058 | phba->lpfc_handle_eratt = lpfc_handle_eratt_s4; | |
7059 | phba->lpfc_stop_port = lpfc_stop_port_s4; | |
7060 | break; | |
7061 | default: | |
7062 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
7063 | "1431 Invalid HBA PCI-device group: 0x%x\n", | |
7064 | dev_grp); | |
7065 | return -ENODEV; | |
7066 | break; | |
7067 | } | |
7068 | return 0; | |
7069 | } | |
7070 | ||
da0436e9 JS |
7071 | /** |
7072 | * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources. | |
7073 | * @phba: pointer to lpfc hba data structure. | |
7074 | * | |
7075 | * This routine is invoked to set up the driver internal resources after the | |
7076 | * device specific resource setup to support the HBA device it attached to. | |
7077 | * | |
7078 | * Return codes | |
af901ca1 | 7079 | * 0 - successful |
da0436e9 JS |
7080 | * other values - error |
7081 | **/ | |
7082 | static int | |
7083 | lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba) | |
7084 | { | |
7085 | int error; | |
7086 | ||
7087 | /* Startup the kernel thread for this host adapter. */ | |
7088 | phba->worker_thread = kthread_run(lpfc_do_work, phba, | |
7089 | "lpfc_worker_%d", phba->brd_no); | |
7090 | if (IS_ERR(phba->worker_thread)) { | |
7091 | error = PTR_ERR(phba->worker_thread); | |
7092 | return error; | |
3772a991 JS |
7093 | } |
7094 | ||
7095 | return 0; | |
7096 | } | |
7097 | ||
7098 | /** | |
7099 | * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources. | |
7100 | * @phba: pointer to lpfc hba data structure. | |
7101 | * | |
7102 | * This routine is invoked to unset the driver internal resources set up after | |
7103 | * the device specific resource setup for supporting the HBA device it | |
7104 | * attached to. | |
7105 | **/ | |
7106 | static void | |
7107 | lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba) | |
7108 | { | |
f485c18d DK |
7109 | if (phba->wq) { |
7110 | flush_workqueue(phba->wq); | |
7111 | destroy_workqueue(phba->wq); | |
7112 | phba->wq = NULL; | |
7113 | } | |
7114 | ||
3772a991 | 7115 | /* Stop kernel worker thread */ |
0cdb84ec JS |
7116 | if (phba->worker_thread) |
7117 | kthread_stop(phba->worker_thread); | |
3772a991 JS |
7118 | } |
7119 | ||
7120 | /** | |
7121 | * lpfc_free_iocb_list - Free iocb list. | |
7122 | * @phba: pointer to lpfc hba data structure. | |
7123 | * | |
7124 | * This routine is invoked to free the driver's IOCB list and memory. | |
7125 | **/ | |
6c621a22 | 7126 | void |
3772a991 JS |
7127 | lpfc_free_iocb_list(struct lpfc_hba *phba) |
7128 | { | |
7129 | struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL; | |
7130 | ||
7131 | spin_lock_irq(&phba->hbalock); | |
7132 | list_for_each_entry_safe(iocbq_entry, iocbq_next, | |
7133 | &phba->lpfc_iocb_list, list) { | |
7134 | list_del(&iocbq_entry->list); | |
7135 | kfree(iocbq_entry); | |
7136 | phba->total_iocbq_bufs--; | |
98c9ea5c | 7137 | } |
3772a991 JS |
7138 | spin_unlock_irq(&phba->hbalock); |
7139 | ||
7140 | return; | |
7141 | } | |
7142 | ||
7143 | /** | |
7144 | * lpfc_init_iocb_list - Allocate and initialize iocb list. | |
7145 | * @phba: pointer to lpfc hba data structure. | |
7146 | * | |
7147 | * This routine is invoked to allocate and initizlize the driver's IOCB | |
7148 | * list and set up the IOCB tag array accordingly. | |
7149 | * | |
7150 | * Return codes | |
af901ca1 | 7151 | * 0 - successful |
3772a991 JS |
7152 | * other values - error |
7153 | **/ | |
6c621a22 | 7154 | int |
3772a991 JS |
7155 | lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count) |
7156 | { | |
7157 | struct lpfc_iocbq *iocbq_entry = NULL; | |
7158 | uint16_t iotag; | |
7159 | int i; | |
dea3101e | 7160 | |
7161 | /* Initialize and populate the iocb list per host. */ | |
7162 | INIT_LIST_HEAD(&phba->lpfc_iocb_list); | |
3772a991 | 7163 | for (i = 0; i < iocb_count; i++) { |
dd00cc48 | 7164 | iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL); |
dea3101e | 7165 | if (iocbq_entry == NULL) { |
7166 | printk(KERN_ERR "%s: only allocated %d iocbs of " | |
7167 | "expected %d count. Unloading driver.\n", | |
cadbd4a5 | 7168 | __func__, i, LPFC_IOCB_LIST_CNT); |
dea3101e | 7169 | goto out_free_iocbq; |
7170 | } | |
7171 | ||
604a3e30 JB |
7172 | iotag = lpfc_sli_next_iotag(phba, iocbq_entry); |
7173 | if (iotag == 0) { | |
3772a991 | 7174 | kfree(iocbq_entry); |
604a3e30 | 7175 | printk(KERN_ERR "%s: failed to allocate IOTAG. " |
3772a991 | 7176 | "Unloading driver.\n", __func__); |
604a3e30 JB |
7177 | goto out_free_iocbq; |
7178 | } | |
6d368e53 | 7179 | iocbq_entry->sli4_lxritag = NO_XRI; |
3772a991 | 7180 | iocbq_entry->sli4_xritag = NO_XRI; |
2e0fef85 JS |
7181 | |
7182 | spin_lock_irq(&phba->hbalock); | |
dea3101e | 7183 | list_add(&iocbq_entry->list, &phba->lpfc_iocb_list); |
7184 | phba->total_iocbq_bufs++; | |
2e0fef85 | 7185 | spin_unlock_irq(&phba->hbalock); |
dea3101e | 7186 | } |
7187 | ||
3772a991 | 7188 | return 0; |
dea3101e | 7189 | |
3772a991 JS |
7190 | out_free_iocbq: |
7191 | lpfc_free_iocb_list(phba); | |
dea3101e | 7192 | |
3772a991 JS |
7193 | return -ENOMEM; |
7194 | } | |
5e9d9b82 | 7195 | |
3772a991 | 7196 | /** |
8a9d2e80 | 7197 | * lpfc_free_sgl_list - Free a given sgl list. |
da0436e9 | 7198 | * @phba: pointer to lpfc hba data structure. |
8a9d2e80 | 7199 | * @sglq_list: pointer to the head of sgl list. |
3772a991 | 7200 | * |
8a9d2e80 | 7201 | * This routine is invoked to free a give sgl list and memory. |
3772a991 | 7202 | **/ |
8a9d2e80 JS |
7203 | void |
7204 | lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list) | |
3772a991 | 7205 | { |
da0436e9 | 7206 | struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL; |
8a9d2e80 JS |
7207 | |
7208 | list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) { | |
7209 | list_del(&sglq_entry->list); | |
7210 | lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys); | |
7211 | kfree(sglq_entry); | |
7212 | } | |
7213 | } | |
7214 | ||
7215 | /** | |
7216 | * lpfc_free_els_sgl_list - Free els sgl list. | |
7217 | * @phba: pointer to lpfc hba data structure. | |
7218 | * | |
7219 | * This routine is invoked to free the driver's els sgl list and memory. | |
7220 | **/ | |
7221 | static void | |
7222 | lpfc_free_els_sgl_list(struct lpfc_hba *phba) | |
7223 | { | |
da0436e9 | 7224 | LIST_HEAD(sglq_list); |
dea3101e | 7225 | |
8a9d2e80 | 7226 | /* Retrieve all els sgls from driver list */ |
da0436e9 | 7227 | spin_lock_irq(&phba->hbalock); |
895427bd JS |
7228 | spin_lock(&phba->sli4_hba.sgl_list_lock); |
7229 | list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list); | |
7230 | spin_unlock(&phba->sli4_hba.sgl_list_lock); | |
da0436e9 | 7231 | spin_unlock_irq(&phba->hbalock); |
dea3101e | 7232 | |
8a9d2e80 JS |
7233 | /* Now free the sgl list */ |
7234 | lpfc_free_sgl_list(phba, &sglq_list); | |
da0436e9 | 7235 | } |
92d7f7b0 | 7236 | |
f358dd0c JS |
7237 | /** |
7238 | * lpfc_free_nvmet_sgl_list - Free nvmet sgl list. | |
7239 | * @phba: pointer to lpfc hba data structure. | |
7240 | * | |
7241 | * This routine is invoked to free the driver's nvmet sgl list and memory. | |
7242 | **/ | |
7243 | static void | |
7244 | lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba) | |
7245 | { | |
7246 | struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL; | |
7247 | LIST_HEAD(sglq_list); | |
7248 | ||
7249 | /* Retrieve all nvmet sgls from driver list */ | |
7250 | spin_lock_irq(&phba->hbalock); | |
7251 | spin_lock(&phba->sli4_hba.sgl_list_lock); | |
7252 | list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list); | |
7253 | spin_unlock(&phba->sli4_hba.sgl_list_lock); | |
7254 | spin_unlock_irq(&phba->hbalock); | |
7255 | ||
7256 | /* Now free the sgl list */ | |
7257 | list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) { | |
7258 | list_del(&sglq_entry->list); | |
7259 | lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys); | |
7260 | kfree(sglq_entry); | |
7261 | } | |
4b40d02b DK |
7262 | |
7263 | /* Update the nvmet_xri_cnt to reflect no current sgls. | |
7264 | * The next initialization cycle sets the count and allocates | |
7265 | * the sgls over again. | |
7266 | */ | |
7267 | phba->sli4_hba.nvmet_xri_cnt = 0; | |
f358dd0c JS |
7268 | } |
7269 | ||
da0436e9 JS |
7270 | /** |
7271 | * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs. | |
7272 | * @phba: pointer to lpfc hba data structure. | |
7273 | * | |
7274 | * This routine is invoked to allocate the driver's active sgl memory. | |
7275 | * This array will hold the sglq_entry's for active IOs. | |
7276 | **/ | |
7277 | static int | |
7278 | lpfc_init_active_sgl_array(struct lpfc_hba *phba) | |
7279 | { | |
7280 | int size; | |
7281 | size = sizeof(struct lpfc_sglq *); | |
7282 | size *= phba->sli4_hba.max_cfg_param.max_xri; | |
7283 | ||
7284 | phba->sli4_hba.lpfc_sglq_active_list = | |
7285 | kzalloc(size, GFP_KERNEL); | |
7286 | if (!phba->sli4_hba.lpfc_sglq_active_list) | |
7287 | return -ENOMEM; | |
7288 | return 0; | |
3772a991 JS |
7289 | } |
7290 | ||
7291 | /** | |
da0436e9 | 7292 | * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs. |
3772a991 JS |
7293 | * @phba: pointer to lpfc hba data structure. |
7294 | * | |
da0436e9 JS |
7295 | * This routine is invoked to walk through the array of active sglq entries |
7296 | * and free all of the resources. | |
7297 | * This is just a place holder for now. | |
3772a991 JS |
7298 | **/ |
7299 | static void | |
da0436e9 | 7300 | lpfc_free_active_sgl(struct lpfc_hba *phba) |
3772a991 | 7301 | { |
da0436e9 | 7302 | kfree(phba->sli4_hba.lpfc_sglq_active_list); |
3772a991 JS |
7303 | } |
7304 | ||
7305 | /** | |
da0436e9 | 7306 | * lpfc_init_sgl_list - Allocate and initialize sgl list. |
3772a991 JS |
7307 | * @phba: pointer to lpfc hba data structure. |
7308 | * | |
da0436e9 JS |
7309 | * This routine is invoked to allocate and initizlize the driver's sgl |
7310 | * list and set up the sgl xritag tag array accordingly. | |
3772a991 | 7311 | * |
3772a991 | 7312 | **/ |
8a9d2e80 | 7313 | static void |
da0436e9 | 7314 | lpfc_init_sgl_list(struct lpfc_hba *phba) |
3772a991 | 7315 | { |
da0436e9 | 7316 | /* Initialize and populate the sglq list per host/VF. */ |
895427bd | 7317 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list); |
da0436e9 | 7318 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list); |
f358dd0c | 7319 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list); |
86c67379 | 7320 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); |
da0436e9 | 7321 | |
8a9d2e80 JS |
7322 | /* els xri-sgl book keeping */ |
7323 | phba->sli4_hba.els_xri_cnt = 0; | |
0ff10d46 | 7324 | |
895427bd | 7325 | /* nvme xri-buffer book keeping */ |
5e5b511d | 7326 | phba->sli4_hba.io_xri_cnt = 0; |
da0436e9 JS |
7327 | } |
7328 | ||
7329 | /** | |
7330 | * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port | |
7331 | * @phba: pointer to lpfc hba data structure. | |
7332 | * | |
7333 | * This routine is invoked to post rpi header templates to the | |
88a2cfbb | 7334 | * port for those SLI4 ports that do not support extents. This routine |
da0436e9 | 7335 | * posts a PAGE_SIZE memory region to the port to hold up to |
88a2cfbb JS |
7336 | * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine |
7337 | * and should be called only when interrupts are disabled. | |
da0436e9 JS |
7338 | * |
7339 | * Return codes | |
af901ca1 | 7340 | * 0 - successful |
88a2cfbb | 7341 | * -ERROR - otherwise. |
da0436e9 JS |
7342 | **/ |
7343 | int | |
7344 | lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba) | |
7345 | { | |
7346 | int rc = 0; | |
da0436e9 JS |
7347 | struct lpfc_rpi_hdr *rpi_hdr; |
7348 | ||
7349 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list); | |
ff78d8f9 | 7350 | if (!phba->sli4_hba.rpi_hdrs_in_use) |
6d368e53 | 7351 | return rc; |
6d368e53 JS |
7352 | if (phba->sli4_hba.extents_in_use) |
7353 | return -EIO; | |
da0436e9 JS |
7354 | |
7355 | rpi_hdr = lpfc_sli4_create_rpi_hdr(phba); | |
7356 | if (!rpi_hdr) { | |
7357 | lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI, | |
7358 | "0391 Error during rpi post operation\n"); | |
7359 | lpfc_sli4_remove_rpis(phba); | |
7360 | rc = -ENODEV; | |
7361 | } | |
7362 | ||
7363 | return rc; | |
7364 | } | |
7365 | ||
7366 | /** | |
7367 | * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region | |
7368 | * @phba: pointer to lpfc hba data structure. | |
7369 | * | |
7370 | * This routine is invoked to allocate a single 4KB memory region to | |
7371 | * support rpis and stores them in the phba. This single region | |
7372 | * provides support for up to 64 rpis. The region is used globally | |
7373 | * by the device. | |
7374 | * | |
7375 | * Returns: | |
7376 | * A valid rpi hdr on success. | |
7377 | * A NULL pointer on any failure. | |
7378 | **/ | |
7379 | struct lpfc_rpi_hdr * | |
7380 | lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba) | |
7381 | { | |
7382 | uint16_t rpi_limit, curr_rpi_range; | |
7383 | struct lpfc_dmabuf *dmabuf; | |
7384 | struct lpfc_rpi_hdr *rpi_hdr; | |
7385 | ||
6d368e53 JS |
7386 | /* |
7387 | * If the SLI4 port supports extents, posting the rpi header isn't | |
7388 | * required. Set the expected maximum count and let the actual value | |
7389 | * get set when extents are fully allocated. | |
7390 | */ | |
7391 | if (!phba->sli4_hba.rpi_hdrs_in_use) | |
7392 | return NULL; | |
7393 | if (phba->sli4_hba.extents_in_use) | |
7394 | return NULL; | |
7395 | ||
7396 | /* The limit on the logical index is just the max_rpi count. */ | |
845d9e8d | 7397 | rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi; |
da0436e9 JS |
7398 | |
7399 | spin_lock_irq(&phba->hbalock); | |
6d368e53 JS |
7400 | /* |
7401 | * Establish the starting RPI in this header block. The starting | |
7402 | * rpi is normalized to a zero base because the physical rpi is | |
7403 | * port based. | |
7404 | */ | |
97f2ecf1 | 7405 | curr_rpi_range = phba->sli4_hba.next_rpi; |
da0436e9 JS |
7406 | spin_unlock_irq(&phba->hbalock); |
7407 | ||
845d9e8d JS |
7408 | /* Reached full RPI range */ |
7409 | if (curr_rpi_range == rpi_limit) | |
6d368e53 | 7410 | return NULL; |
845d9e8d | 7411 | |
da0436e9 JS |
7412 | /* |
7413 | * First allocate the protocol header region for the port. The | |
7414 | * port expects a 4KB DMA-mapped memory region that is 4K aligned. | |
7415 | */ | |
7416 | dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); | |
7417 | if (!dmabuf) | |
7418 | return NULL; | |
7419 | ||
750afb08 LC |
7420 | dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, |
7421 | LPFC_HDR_TEMPLATE_SIZE, | |
7422 | &dmabuf->phys, GFP_KERNEL); | |
da0436e9 JS |
7423 | if (!dmabuf->virt) { |
7424 | rpi_hdr = NULL; | |
7425 | goto err_free_dmabuf; | |
7426 | } | |
7427 | ||
da0436e9 JS |
7428 | if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) { |
7429 | rpi_hdr = NULL; | |
7430 | goto err_free_coherent; | |
7431 | } | |
7432 | ||
7433 | /* Save the rpi header data for cleanup later. */ | |
7434 | rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL); | |
7435 | if (!rpi_hdr) | |
7436 | goto err_free_coherent; | |
7437 | ||
7438 | rpi_hdr->dmabuf = dmabuf; | |
7439 | rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE; | |
7440 | rpi_hdr->page_count = 1; | |
7441 | spin_lock_irq(&phba->hbalock); | |
6d368e53 JS |
7442 | |
7443 | /* The rpi_hdr stores the logical index only. */ | |
7444 | rpi_hdr->start_rpi = curr_rpi_range; | |
845d9e8d | 7445 | rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT; |
da0436e9 JS |
7446 | list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list); |
7447 | ||
da0436e9 JS |
7448 | spin_unlock_irq(&phba->hbalock); |
7449 | return rpi_hdr; | |
7450 | ||
7451 | err_free_coherent: | |
7452 | dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE, | |
7453 | dmabuf->virt, dmabuf->phys); | |
7454 | err_free_dmabuf: | |
7455 | kfree(dmabuf); | |
7456 | return NULL; | |
7457 | } | |
7458 | ||
7459 | /** | |
7460 | * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions | |
7461 | * @phba: pointer to lpfc hba data structure. | |
7462 | * | |
7463 | * This routine is invoked to remove all memory resources allocated | |
6d368e53 JS |
7464 | * to support rpis for SLI4 ports not supporting extents. This routine |
7465 | * presumes the caller has released all rpis consumed by fabric or port | |
7466 | * logins and is prepared to have the header pages removed. | |
da0436e9 JS |
7467 | **/ |
7468 | void | |
7469 | lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba) | |
7470 | { | |
7471 | struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr; | |
7472 | ||
6d368e53 JS |
7473 | if (!phba->sli4_hba.rpi_hdrs_in_use) |
7474 | goto exit; | |
7475 | ||
da0436e9 JS |
7476 | list_for_each_entry_safe(rpi_hdr, next_rpi_hdr, |
7477 | &phba->sli4_hba.lpfc_rpi_hdr_list, list) { | |
7478 | list_del(&rpi_hdr->list); | |
7479 | dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len, | |
7480 | rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys); | |
7481 | kfree(rpi_hdr->dmabuf); | |
7482 | kfree(rpi_hdr); | |
7483 | } | |
6d368e53 JS |
7484 | exit: |
7485 | /* There are no rpis available to the port now. */ | |
7486 | phba->sli4_hba.next_rpi = 0; | |
da0436e9 JS |
7487 | } |
7488 | ||
7489 | /** | |
7490 | * lpfc_hba_alloc - Allocate driver hba data structure for a device. | |
7491 | * @pdev: pointer to pci device data structure. | |
7492 | * | |
7493 | * This routine is invoked to allocate the driver hba data structure for an | |
7494 | * HBA device. If the allocation is successful, the phba reference to the | |
7495 | * PCI device data structure is set. | |
7496 | * | |
7497 | * Return codes | |
af901ca1 | 7498 | * pointer to @phba - successful |
da0436e9 JS |
7499 | * NULL - error |
7500 | **/ | |
7501 | static struct lpfc_hba * | |
7502 | lpfc_hba_alloc(struct pci_dev *pdev) | |
7503 | { | |
7504 | struct lpfc_hba *phba; | |
7505 | ||
7506 | /* Allocate memory for HBA structure */ | |
7507 | phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL); | |
7508 | if (!phba) { | |
e34ccdfe | 7509 | dev_err(&pdev->dev, "failed to allocate hba struct\n"); |
da0436e9 JS |
7510 | return NULL; |
7511 | } | |
7512 | ||
7513 | /* Set reference to PCI device in HBA structure */ | |
7514 | phba->pcidev = pdev; | |
7515 | ||
7516 | /* Assign an unused board number */ | |
7517 | phba->brd_no = lpfc_get_instance(); | |
7518 | if (phba->brd_no < 0) { | |
7519 | kfree(phba); | |
7520 | return NULL; | |
7521 | } | |
65791f1f | 7522 | phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL; |
da0436e9 | 7523 | |
4fede78f | 7524 | spin_lock_init(&phba->ct_ev_lock); |
f1c3b0fc JS |
7525 | INIT_LIST_HEAD(&phba->ct_ev_waiters); |
7526 | ||
da0436e9 JS |
7527 | return phba; |
7528 | } | |
7529 | ||
7530 | /** | |
7531 | * lpfc_hba_free - Free driver hba data structure with a device. | |
7532 | * @phba: pointer to lpfc hba data structure. | |
7533 | * | |
7534 | * This routine is invoked to free the driver hba data structure with an | |
7535 | * HBA device. | |
7536 | **/ | |
7537 | static void | |
7538 | lpfc_hba_free(struct lpfc_hba *phba) | |
7539 | { | |
5e5b511d JS |
7540 | if (phba->sli_rev == LPFC_SLI_REV4) |
7541 | kfree(phba->sli4_hba.hdwq); | |
7542 | ||
da0436e9 JS |
7543 | /* Release the driver assigned board number */ |
7544 | idr_remove(&lpfc_hba_index, phba->brd_no); | |
7545 | ||
895427bd JS |
7546 | /* Free memory allocated with sli3 rings */ |
7547 | kfree(phba->sli.sli3_ring); | |
7548 | phba->sli.sli3_ring = NULL; | |
2a76a283 | 7549 | |
da0436e9 JS |
7550 | kfree(phba); |
7551 | return; | |
7552 | } | |
7553 | ||
7554 | /** | |
7555 | * lpfc_create_shost - Create hba physical port with associated scsi host. | |
7556 | * @phba: pointer to lpfc hba data structure. | |
7557 | * | |
7558 | * This routine is invoked to create HBA physical port and associate a SCSI | |
7559 | * host with it. | |
7560 | * | |
7561 | * Return codes | |
af901ca1 | 7562 | * 0 - successful |
da0436e9 JS |
7563 | * other values - error |
7564 | **/ | |
7565 | static int | |
7566 | lpfc_create_shost(struct lpfc_hba *phba) | |
7567 | { | |
7568 | struct lpfc_vport *vport; | |
7569 | struct Scsi_Host *shost; | |
7570 | ||
7571 | /* Initialize HBA FC structure */ | |
7572 | phba->fc_edtov = FF_DEF_EDTOV; | |
7573 | phba->fc_ratov = FF_DEF_RATOV; | |
7574 | phba->fc_altov = FF_DEF_ALTOV; | |
7575 | phba->fc_arbtov = FF_DEF_ARBTOV; | |
7576 | ||
d7c47992 | 7577 | atomic_set(&phba->sdev_cnt, 0); |
da0436e9 JS |
7578 | vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev); |
7579 | if (!vport) | |
7580 | return -ENODEV; | |
7581 | ||
7582 | shost = lpfc_shost_from_vport(vport); | |
7583 | phba->pport = vport; | |
2ea259ee | 7584 | |
f358dd0c JS |
7585 | if (phba->nvmet_support) { |
7586 | /* Only 1 vport (pport) will support NVME target */ | |
7587 | if (phba->txrdy_payload_pool == NULL) { | |
771db5c0 RP |
7588 | phba->txrdy_payload_pool = dma_pool_create( |
7589 | "txrdy_pool", &phba->pcidev->dev, | |
f358dd0c JS |
7590 | TXRDY_PAYLOAD_LEN, 16, 0); |
7591 | if (phba->txrdy_payload_pool) { | |
7592 | phba->targetport = NULL; | |
7593 | phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME; | |
7594 | lpfc_printf_log(phba, KERN_INFO, | |
7595 | LOG_INIT | LOG_NVME_DISC, | |
7596 | "6076 NVME Target Found\n"); | |
7597 | } | |
7598 | } | |
7599 | } | |
7600 | ||
da0436e9 JS |
7601 | lpfc_debugfs_initialize(vport); |
7602 | /* Put reference to SCSI host to driver's device private data */ | |
7603 | pci_set_drvdata(phba->pcidev, shost); | |
2e0fef85 | 7604 | |
4258e98e JS |
7605 | /* |
7606 | * At this point we are fully registered with PSA. In addition, | |
7607 | * any initial discovery should be completed. | |
7608 | */ | |
7609 | vport->load_flag |= FC_ALLOW_FDMI; | |
8663cbbe JS |
7610 | if (phba->cfg_enable_SmartSAN || |
7611 | (phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT)) { | |
4258e98e JS |
7612 | |
7613 | /* Setup appropriate attribute masks */ | |
7614 | vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR; | |
8663cbbe | 7615 | if (phba->cfg_enable_SmartSAN) |
4258e98e JS |
7616 | vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR; |
7617 | else | |
7618 | vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR; | |
7619 | } | |
3772a991 JS |
7620 | return 0; |
7621 | } | |
db2378e0 | 7622 | |
3772a991 JS |
7623 | /** |
7624 | * lpfc_destroy_shost - Destroy hba physical port with associated scsi host. | |
7625 | * @phba: pointer to lpfc hba data structure. | |
7626 | * | |
7627 | * This routine is invoked to destroy HBA physical port and the associated | |
7628 | * SCSI host. | |
7629 | **/ | |
7630 | static void | |
7631 | lpfc_destroy_shost(struct lpfc_hba *phba) | |
7632 | { | |
7633 | struct lpfc_vport *vport = phba->pport; | |
7634 | ||
7635 | /* Destroy physical port that associated with the SCSI host */ | |
7636 | destroy_port(vport); | |
7637 | ||
7638 | return; | |
7639 | } | |
7640 | ||
7641 | /** | |
7642 | * lpfc_setup_bg - Setup Block guard structures and debug areas. | |
7643 | * @phba: pointer to lpfc hba data structure. | |
7644 | * @shost: the shost to be used to detect Block guard settings. | |
7645 | * | |
7646 | * This routine sets up the local Block guard protocol settings for @shost. | |
7647 | * This routine also allocates memory for debugging bg buffers. | |
7648 | **/ | |
7649 | static void | |
7650 | lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost) | |
7651 | { | |
bbeb79b9 JS |
7652 | uint32_t old_mask; |
7653 | uint32_t old_guard; | |
7654 | ||
3772a991 | 7655 | int pagecnt = 10; |
b3b98b74 | 7656 | if (phba->cfg_prot_mask && phba->cfg_prot_guard) { |
3772a991 JS |
7657 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
7658 | "1478 Registering BlockGuard with the " | |
7659 | "SCSI layer\n"); | |
bbeb79b9 | 7660 | |
b3b98b74 JS |
7661 | old_mask = phba->cfg_prot_mask; |
7662 | old_guard = phba->cfg_prot_guard; | |
bbeb79b9 JS |
7663 | |
7664 | /* Only allow supported values */ | |
b3b98b74 | 7665 | phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION | |
bbeb79b9 JS |
7666 | SHOST_DIX_TYPE0_PROTECTION | |
7667 | SHOST_DIX_TYPE1_PROTECTION); | |
b3b98b74 JS |
7668 | phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP | |
7669 | SHOST_DIX_GUARD_CRC); | |
bbeb79b9 JS |
7670 | |
7671 | /* DIF Type 1 protection for profiles AST1/C1 is end to end */ | |
b3b98b74 JS |
7672 | if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION) |
7673 | phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION; | |
bbeb79b9 | 7674 | |
b3b98b74 JS |
7675 | if (phba->cfg_prot_mask && phba->cfg_prot_guard) { |
7676 | if ((old_mask != phba->cfg_prot_mask) || | |
7677 | (old_guard != phba->cfg_prot_guard)) | |
bbeb79b9 JS |
7678 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
7679 | "1475 Registering BlockGuard with the " | |
7680 | "SCSI layer: mask %d guard %d\n", | |
b3b98b74 JS |
7681 | phba->cfg_prot_mask, |
7682 | phba->cfg_prot_guard); | |
bbeb79b9 | 7683 | |
b3b98b74 JS |
7684 | scsi_host_set_prot(shost, phba->cfg_prot_mask); |
7685 | scsi_host_set_guard(shost, phba->cfg_prot_guard); | |
bbeb79b9 JS |
7686 | } else |
7687 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
7688 | "1479 Not Registering BlockGuard with the SCSI " | |
7689 | "layer, Bad protection parameters: %d %d\n", | |
7690 | old_mask, old_guard); | |
3772a991 | 7691 | } |
bbeb79b9 | 7692 | |
3772a991 JS |
7693 | if (!_dump_buf_data) { |
7694 | while (pagecnt) { | |
7695 | spin_lock_init(&_dump_buf_lock); | |
7696 | _dump_buf_data = | |
7697 | (char *) __get_free_pages(GFP_KERNEL, pagecnt); | |
7698 | if (_dump_buf_data) { | |
6a9c52cf JS |
7699 | lpfc_printf_log(phba, KERN_ERR, LOG_BG, |
7700 | "9043 BLKGRD: allocated %d pages for " | |
32350664 | 7701 | "_dump_buf_data at x%px\n", |
3772a991 JS |
7702 | (1 << pagecnt), _dump_buf_data); |
7703 | _dump_buf_data_order = pagecnt; | |
7704 | memset(_dump_buf_data, 0, | |
7705 | ((1 << PAGE_SHIFT) << pagecnt)); | |
7706 | break; | |
7707 | } else | |
7708 | --pagecnt; | |
7709 | } | |
7710 | if (!_dump_buf_data_order) | |
6a9c52cf JS |
7711 | lpfc_printf_log(phba, KERN_ERR, LOG_BG, |
7712 | "9044 BLKGRD: ERROR unable to allocate " | |
3772a991 JS |
7713 | "memory for hexdump\n"); |
7714 | } else | |
6a9c52cf | 7715 | lpfc_printf_log(phba, KERN_ERR, LOG_BG, |
32350664 | 7716 | "9045 BLKGRD: already allocated _dump_buf_data=x%px" |
3772a991 JS |
7717 | "\n", _dump_buf_data); |
7718 | if (!_dump_buf_dif) { | |
7719 | while (pagecnt) { | |
7720 | _dump_buf_dif = | |
7721 | (char *) __get_free_pages(GFP_KERNEL, pagecnt); | |
7722 | if (_dump_buf_dif) { | |
6a9c52cf JS |
7723 | lpfc_printf_log(phba, KERN_ERR, LOG_BG, |
7724 | "9046 BLKGRD: allocated %d pages for " | |
32350664 | 7725 | "_dump_buf_dif at x%px\n", |
3772a991 JS |
7726 | (1 << pagecnt), _dump_buf_dif); |
7727 | _dump_buf_dif_order = pagecnt; | |
7728 | memset(_dump_buf_dif, 0, | |
7729 | ((1 << PAGE_SHIFT) << pagecnt)); | |
7730 | break; | |
7731 | } else | |
7732 | --pagecnt; | |
7733 | } | |
7734 | if (!_dump_buf_dif_order) | |
6a9c52cf JS |
7735 | lpfc_printf_log(phba, KERN_ERR, LOG_BG, |
7736 | "9047 BLKGRD: ERROR unable to allocate " | |
3772a991 JS |
7737 | "memory for hexdump\n"); |
7738 | } else | |
6a9c52cf | 7739 | lpfc_printf_log(phba, KERN_ERR, LOG_BG, |
32350664 | 7740 | "9048 BLKGRD: already allocated _dump_buf_dif=x%px\n", |
3772a991 JS |
7741 | _dump_buf_dif); |
7742 | } | |
7743 | ||
7744 | /** | |
7745 | * lpfc_post_init_setup - Perform necessary device post initialization setup. | |
7746 | * @phba: pointer to lpfc hba data structure. | |
7747 | * | |
7748 | * This routine is invoked to perform all the necessary post initialization | |
7749 | * setup for the device. | |
7750 | **/ | |
7751 | static void | |
7752 | lpfc_post_init_setup(struct lpfc_hba *phba) | |
7753 | { | |
7754 | struct Scsi_Host *shost; | |
7755 | struct lpfc_adapter_event_header adapter_event; | |
7756 | ||
7757 | /* Get the default values for Model Name and Description */ | |
7758 | lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); | |
7759 | ||
7760 | /* | |
7761 | * hba setup may have changed the hba_queue_depth so we need to | |
7762 | * adjust the value of can_queue. | |
7763 | */ | |
7764 | shost = pci_get_drvdata(phba->pcidev); | |
7765 | shost->can_queue = phba->cfg_hba_queue_depth - 10; | |
3772a991 JS |
7766 | |
7767 | lpfc_host_attrib_init(shost); | |
7768 | ||
7769 | if (phba->cfg_poll & DISABLE_FCP_RING_INT) { | |
7770 | spin_lock_irq(shost->host_lock); | |
7771 | lpfc_poll_start_timer(phba); | |
7772 | spin_unlock_irq(shost->host_lock); | |
7773 | } | |
7774 | ||
7775 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
7776 | "0428 Perform SCSI scan\n"); | |
7777 | /* Send board arrival event to upper layer */ | |
7778 | adapter_event.event_type = FC_REG_ADAPTER_EVENT; | |
7779 | adapter_event.subcategory = LPFC_EVENT_ARRIVAL; | |
7780 | fc_host_post_vendor_event(shost, fc_get_event_number(), | |
7781 | sizeof(adapter_event), | |
7782 | (char *) &adapter_event, | |
7783 | LPFC_NL_VENDOR_ID); | |
7784 | return; | |
7785 | } | |
7786 | ||
7787 | /** | |
7788 | * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space. | |
7789 | * @phba: pointer to lpfc hba data structure. | |
7790 | * | |
7791 | * This routine is invoked to set up the PCI device memory space for device | |
7792 | * with SLI-3 interface spec. | |
7793 | * | |
7794 | * Return codes | |
af901ca1 | 7795 | * 0 - successful |
3772a991 JS |
7796 | * other values - error |
7797 | **/ | |
7798 | static int | |
7799 | lpfc_sli_pci_mem_setup(struct lpfc_hba *phba) | |
7800 | { | |
f30e1bfd | 7801 | struct pci_dev *pdev = phba->pcidev; |
3772a991 JS |
7802 | unsigned long bar0map_len, bar2map_len; |
7803 | int i, hbq_count; | |
7804 | void *ptr; | |
56de8357 | 7805 | int error; |
3772a991 | 7806 | |
f30e1bfd | 7807 | if (!pdev) |
56de8357 | 7808 | return -ENODEV; |
3772a991 JS |
7809 | |
7810 | /* Set the device DMA mask size */ | |
56de8357 HR |
7811 | error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); |
7812 | if (error) | |
7813 | error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); | |
7814 | if (error) | |
f30e1bfd | 7815 | return error; |
56de8357 | 7816 | error = -ENODEV; |
3772a991 JS |
7817 | |
7818 | /* Get the bus address of Bar0 and Bar2 and the number of bytes | |
7819 | * required by each mapping. | |
7820 | */ | |
7821 | phba->pci_bar0_map = pci_resource_start(pdev, 0); | |
7822 | bar0map_len = pci_resource_len(pdev, 0); | |
7823 | ||
7824 | phba->pci_bar2_map = pci_resource_start(pdev, 2); | |
7825 | bar2map_len = pci_resource_len(pdev, 2); | |
7826 | ||
7827 | /* Map HBA SLIM to a kernel virtual address. */ | |
7828 | phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len); | |
7829 | if (!phba->slim_memmap_p) { | |
7830 | dev_printk(KERN_ERR, &pdev->dev, | |
7831 | "ioremap failed for SLIM memory.\n"); | |
7832 | goto out; | |
7833 | } | |
7834 | ||
7835 | /* Map HBA Control Registers to a kernel virtual address. */ | |
7836 | phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len); | |
7837 | if (!phba->ctrl_regs_memmap_p) { | |
7838 | dev_printk(KERN_ERR, &pdev->dev, | |
7839 | "ioremap failed for HBA control registers.\n"); | |
7840 | goto out_iounmap_slim; | |
7841 | } | |
7842 | ||
7843 | /* Allocate memory for SLI-2 structures */ | |
750afb08 LC |
7844 | phba->slim2p.virt = dma_alloc_coherent(&pdev->dev, SLI2_SLIM_SIZE, |
7845 | &phba->slim2p.phys, GFP_KERNEL); | |
3772a991 JS |
7846 | if (!phba->slim2p.virt) |
7847 | goto out_iounmap; | |
7848 | ||
3772a991 | 7849 | phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx); |
7a470277 JS |
7850 | phba->mbox_ext = (phba->slim2p.virt + |
7851 | offsetof(struct lpfc_sli2_slim, mbx_ext_words)); | |
3772a991 JS |
7852 | phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb)); |
7853 | phba->IOCBs = (phba->slim2p.virt + | |
7854 | offsetof(struct lpfc_sli2_slim, IOCBs)); | |
7855 | ||
7856 | phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev, | |
7857 | lpfc_sli_hbq_size(), | |
7858 | &phba->hbqslimp.phys, | |
7859 | GFP_KERNEL); | |
7860 | if (!phba->hbqslimp.virt) | |
7861 | goto out_free_slim; | |
7862 | ||
7863 | hbq_count = lpfc_sli_hbq_count(); | |
7864 | ptr = phba->hbqslimp.virt; | |
7865 | for (i = 0; i < hbq_count; ++i) { | |
7866 | phba->hbqs[i].hbq_virt = ptr; | |
7867 | INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list); | |
7868 | ptr += (lpfc_hbq_defs[i]->entry_count * | |
7869 | sizeof(struct lpfc_hbq_entry)); | |
7870 | } | |
7871 | phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc; | |
7872 | phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free; | |
7873 | ||
7874 | memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size()); | |
7875 | ||
3772a991 JS |
7876 | phba->MBslimaddr = phba->slim_memmap_p; |
7877 | phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET; | |
7878 | phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET; | |
7879 | phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET; | |
7880 | phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET; | |
7881 | ||
7882 | return 0; | |
7883 | ||
7884 | out_free_slim: | |
7885 | dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, | |
7886 | phba->slim2p.virt, phba->slim2p.phys); | |
7887 | out_iounmap: | |
7888 | iounmap(phba->ctrl_regs_memmap_p); | |
7889 | out_iounmap_slim: | |
7890 | iounmap(phba->slim_memmap_p); | |
7891 | out: | |
7892 | return error; | |
7893 | } | |
7894 | ||
7895 | /** | |
7896 | * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space. | |
7897 | * @phba: pointer to lpfc hba data structure. | |
7898 | * | |
7899 | * This routine is invoked to unset the PCI device memory space for device | |
7900 | * with SLI-3 interface spec. | |
7901 | **/ | |
7902 | static void | |
7903 | lpfc_sli_pci_mem_unset(struct lpfc_hba *phba) | |
7904 | { | |
7905 | struct pci_dev *pdev; | |
7906 | ||
7907 | /* Obtain PCI device reference */ | |
7908 | if (!phba->pcidev) | |
7909 | return; | |
7910 | else | |
7911 | pdev = phba->pcidev; | |
7912 | ||
7913 | /* Free coherent DMA memory allocated */ | |
7914 | dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(), | |
7915 | phba->hbqslimp.virt, phba->hbqslimp.phys); | |
7916 | dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, | |
7917 | phba->slim2p.virt, phba->slim2p.phys); | |
7918 | ||
7919 | /* I/O memory unmap */ | |
7920 | iounmap(phba->ctrl_regs_memmap_p); | |
7921 | iounmap(phba->slim_memmap_p); | |
7922 | ||
7923 | return; | |
7924 | } | |
7925 | ||
7926 | /** | |
da0436e9 | 7927 | * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status |
3772a991 JS |
7928 | * @phba: pointer to lpfc hba data structure. |
7929 | * | |
da0436e9 JS |
7930 | * This routine is invoked to wait for SLI4 device Power On Self Test (POST) |
7931 | * done and check status. | |
3772a991 | 7932 | * |
da0436e9 | 7933 | * Return 0 if successful, otherwise -ENODEV. |
3772a991 | 7934 | **/ |
da0436e9 JS |
7935 | int |
7936 | lpfc_sli4_post_status_check(struct lpfc_hba *phba) | |
3772a991 | 7937 | { |
2fcee4bf JS |
7938 | struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg; |
7939 | struct lpfc_register reg_data; | |
7940 | int i, port_error = 0; | |
7941 | uint32_t if_type; | |
3772a991 | 7942 | |
9940b97b JS |
7943 | memset(&portsmphr_reg, 0, sizeof(portsmphr_reg)); |
7944 | memset(®_data, 0, sizeof(reg_data)); | |
2fcee4bf | 7945 | if (!phba->sli4_hba.PSMPHRregaddr) |
da0436e9 | 7946 | return -ENODEV; |
3772a991 | 7947 | |
da0436e9 JS |
7948 | /* Wait up to 30 seconds for the SLI Port POST done and ready */ |
7949 | for (i = 0; i < 3000; i++) { | |
9940b97b JS |
7950 | if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr, |
7951 | &portsmphr_reg.word0) || | |
7952 | (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) { | |
2fcee4bf | 7953 | /* Port has a fatal POST error, break out */ |
da0436e9 JS |
7954 | port_error = -ENODEV; |
7955 | break; | |
7956 | } | |
2fcee4bf JS |
7957 | if (LPFC_POST_STAGE_PORT_READY == |
7958 | bf_get(lpfc_port_smphr_port_status, &portsmphr_reg)) | |
da0436e9 | 7959 | break; |
da0436e9 | 7960 | msleep(10); |
3772a991 JS |
7961 | } |
7962 | ||
2fcee4bf JS |
7963 | /* |
7964 | * If there was a port error during POST, then don't proceed with | |
7965 | * other register reads as the data may not be valid. Just exit. | |
7966 | */ | |
7967 | if (port_error) { | |
da0436e9 | 7968 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
2fcee4bf JS |
7969 | "1408 Port Failed POST - portsmphr=0x%x, " |
7970 | "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, " | |
7971 | "scr2=x%x, hscratch=x%x, pstatus=x%x\n", | |
7972 | portsmphr_reg.word0, | |
7973 | bf_get(lpfc_port_smphr_perr, &portsmphr_reg), | |
7974 | bf_get(lpfc_port_smphr_sfi, &portsmphr_reg), | |
7975 | bf_get(lpfc_port_smphr_nip, &portsmphr_reg), | |
7976 | bf_get(lpfc_port_smphr_ipc, &portsmphr_reg), | |
7977 | bf_get(lpfc_port_smphr_scr1, &portsmphr_reg), | |
7978 | bf_get(lpfc_port_smphr_scr2, &portsmphr_reg), | |
7979 | bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg), | |
7980 | bf_get(lpfc_port_smphr_port_status, &portsmphr_reg)); | |
7981 | } else { | |
28baac74 | 7982 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
2fcee4bf JS |
7983 | "2534 Device Info: SLIFamily=0x%x, " |
7984 | "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, " | |
7985 | "SLIHint_2=0x%x, FT=0x%x\n", | |
28baac74 JS |
7986 | bf_get(lpfc_sli_intf_sli_family, |
7987 | &phba->sli4_hba.sli_intf), | |
7988 | bf_get(lpfc_sli_intf_slirev, | |
7989 | &phba->sli4_hba.sli_intf), | |
085c647c JS |
7990 | bf_get(lpfc_sli_intf_if_type, |
7991 | &phba->sli4_hba.sli_intf), | |
7992 | bf_get(lpfc_sli_intf_sli_hint1, | |
28baac74 | 7993 | &phba->sli4_hba.sli_intf), |
085c647c JS |
7994 | bf_get(lpfc_sli_intf_sli_hint2, |
7995 | &phba->sli4_hba.sli_intf), | |
7996 | bf_get(lpfc_sli_intf_func_type, | |
28baac74 | 7997 | &phba->sli4_hba.sli_intf)); |
2fcee4bf JS |
7998 | /* |
7999 | * Check for other Port errors during the initialization | |
8000 | * process. Fail the load if the port did not come up | |
8001 | * correctly. | |
8002 | */ | |
8003 | if_type = bf_get(lpfc_sli_intf_if_type, | |
8004 | &phba->sli4_hba.sli_intf); | |
8005 | switch (if_type) { | |
8006 | case LPFC_SLI_INTF_IF_TYPE_0: | |
8007 | phba->sli4_hba.ue_mask_lo = | |
8008 | readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr); | |
8009 | phba->sli4_hba.ue_mask_hi = | |
8010 | readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr); | |
8011 | uerrlo_reg.word0 = | |
8012 | readl(phba->sli4_hba.u.if_type0.UERRLOregaddr); | |
8013 | uerrhi_reg.word0 = | |
8014 | readl(phba->sli4_hba.u.if_type0.UERRHIregaddr); | |
8015 | if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) || | |
8016 | (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) { | |
8017 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8018 | "1422 Unrecoverable Error " | |
8019 | "Detected during POST " | |
8020 | "uerr_lo_reg=0x%x, " | |
8021 | "uerr_hi_reg=0x%x, " | |
8022 | "ue_mask_lo_reg=0x%x, " | |
8023 | "ue_mask_hi_reg=0x%x\n", | |
8024 | uerrlo_reg.word0, | |
8025 | uerrhi_reg.word0, | |
8026 | phba->sli4_hba.ue_mask_lo, | |
8027 | phba->sli4_hba.ue_mask_hi); | |
8028 | port_error = -ENODEV; | |
8029 | } | |
8030 | break; | |
8031 | case LPFC_SLI_INTF_IF_TYPE_2: | |
27d6ac0a | 8032 | case LPFC_SLI_INTF_IF_TYPE_6: |
2fcee4bf | 8033 | /* Final checks. The port status should be clean. */ |
9940b97b JS |
8034 | if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr, |
8035 | ®_data.word0) || | |
0558056c JS |
8036 | (bf_get(lpfc_sliport_status_err, ®_data) && |
8037 | !bf_get(lpfc_sliport_status_rn, ®_data))) { | |
2fcee4bf JS |
8038 | phba->work_status[0] = |
8039 | readl(phba->sli4_hba.u.if_type2. | |
8040 | ERR1regaddr); | |
8041 | phba->work_status[1] = | |
8042 | readl(phba->sli4_hba.u.if_type2. | |
8043 | ERR2regaddr); | |
8044 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8fcb8acd JS |
8045 | "2888 Unrecoverable port error " |
8046 | "following POST: port status reg " | |
8047 | "0x%x, port_smphr reg 0x%x, " | |
2fcee4bf JS |
8048 | "error 1=0x%x, error 2=0x%x\n", |
8049 | reg_data.word0, | |
8050 | portsmphr_reg.word0, | |
8051 | phba->work_status[0], | |
8052 | phba->work_status[1]); | |
8053 | port_error = -ENODEV; | |
8054 | } | |
8055 | break; | |
8056 | case LPFC_SLI_INTF_IF_TYPE_1: | |
8057 | default: | |
8058 | break; | |
8059 | } | |
28baac74 | 8060 | } |
da0436e9 JS |
8061 | return port_error; |
8062 | } | |
3772a991 | 8063 | |
da0436e9 JS |
8064 | /** |
8065 | * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map. | |
8066 | * @phba: pointer to lpfc hba data structure. | |
2fcee4bf | 8067 | * @if_type: The SLI4 interface type getting configured. |
da0436e9 JS |
8068 | * |
8069 | * This routine is invoked to set up SLI4 BAR0 PCI config space register | |
8070 | * memory map. | |
8071 | **/ | |
8072 | static void | |
2fcee4bf JS |
8073 | lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type) |
8074 | { | |
8075 | switch (if_type) { | |
8076 | case LPFC_SLI_INTF_IF_TYPE_0: | |
8077 | phba->sli4_hba.u.if_type0.UERRLOregaddr = | |
8078 | phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO; | |
8079 | phba->sli4_hba.u.if_type0.UERRHIregaddr = | |
8080 | phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI; | |
8081 | phba->sli4_hba.u.if_type0.UEMASKLOregaddr = | |
8082 | phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO; | |
8083 | phba->sli4_hba.u.if_type0.UEMASKHIregaddr = | |
8084 | phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI; | |
8085 | phba->sli4_hba.SLIINTFregaddr = | |
8086 | phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF; | |
8087 | break; | |
8088 | case LPFC_SLI_INTF_IF_TYPE_2: | |
0cf07f84 JS |
8089 | phba->sli4_hba.u.if_type2.EQDregaddr = |
8090 | phba->sli4_hba.conf_regs_memmap_p + | |
8091 | LPFC_CTL_PORT_EQ_DELAY_OFFSET; | |
2fcee4bf | 8092 | phba->sli4_hba.u.if_type2.ERR1regaddr = |
88a2cfbb JS |
8093 | phba->sli4_hba.conf_regs_memmap_p + |
8094 | LPFC_CTL_PORT_ER1_OFFSET; | |
2fcee4bf | 8095 | phba->sli4_hba.u.if_type2.ERR2regaddr = |
88a2cfbb JS |
8096 | phba->sli4_hba.conf_regs_memmap_p + |
8097 | LPFC_CTL_PORT_ER2_OFFSET; | |
2fcee4bf | 8098 | phba->sli4_hba.u.if_type2.CTRLregaddr = |
88a2cfbb JS |
8099 | phba->sli4_hba.conf_regs_memmap_p + |
8100 | LPFC_CTL_PORT_CTL_OFFSET; | |
2fcee4bf | 8101 | phba->sli4_hba.u.if_type2.STATUSregaddr = |
88a2cfbb JS |
8102 | phba->sli4_hba.conf_regs_memmap_p + |
8103 | LPFC_CTL_PORT_STA_OFFSET; | |
2fcee4bf JS |
8104 | phba->sli4_hba.SLIINTFregaddr = |
8105 | phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF; | |
8106 | phba->sli4_hba.PSMPHRregaddr = | |
88a2cfbb JS |
8107 | phba->sli4_hba.conf_regs_memmap_p + |
8108 | LPFC_CTL_PORT_SEM_OFFSET; | |
2fcee4bf | 8109 | phba->sli4_hba.RQDBregaddr = |
962bc51b JS |
8110 | phba->sli4_hba.conf_regs_memmap_p + |
8111 | LPFC_ULP0_RQ_DOORBELL; | |
2fcee4bf | 8112 | phba->sli4_hba.WQDBregaddr = |
962bc51b JS |
8113 | phba->sli4_hba.conf_regs_memmap_p + |
8114 | LPFC_ULP0_WQ_DOORBELL; | |
9dd35425 | 8115 | phba->sli4_hba.CQDBregaddr = |
2fcee4bf | 8116 | phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL; |
9dd35425 | 8117 | phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr; |
2fcee4bf JS |
8118 | phba->sli4_hba.MQDBregaddr = |
8119 | phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL; | |
8120 | phba->sli4_hba.BMBXregaddr = | |
8121 | phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX; | |
8122 | break; | |
27d6ac0a JS |
8123 | case LPFC_SLI_INTF_IF_TYPE_6: |
8124 | phba->sli4_hba.u.if_type2.EQDregaddr = | |
8125 | phba->sli4_hba.conf_regs_memmap_p + | |
8126 | LPFC_CTL_PORT_EQ_DELAY_OFFSET; | |
8127 | phba->sli4_hba.u.if_type2.ERR1regaddr = | |
8128 | phba->sli4_hba.conf_regs_memmap_p + | |
8129 | LPFC_CTL_PORT_ER1_OFFSET; | |
8130 | phba->sli4_hba.u.if_type2.ERR2regaddr = | |
8131 | phba->sli4_hba.conf_regs_memmap_p + | |
8132 | LPFC_CTL_PORT_ER2_OFFSET; | |
8133 | phba->sli4_hba.u.if_type2.CTRLregaddr = | |
8134 | phba->sli4_hba.conf_regs_memmap_p + | |
8135 | LPFC_CTL_PORT_CTL_OFFSET; | |
8136 | phba->sli4_hba.u.if_type2.STATUSregaddr = | |
8137 | phba->sli4_hba.conf_regs_memmap_p + | |
8138 | LPFC_CTL_PORT_STA_OFFSET; | |
8139 | phba->sli4_hba.PSMPHRregaddr = | |
8140 | phba->sli4_hba.conf_regs_memmap_p + | |
8141 | LPFC_CTL_PORT_SEM_OFFSET; | |
8142 | phba->sli4_hba.BMBXregaddr = | |
8143 | phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX; | |
8144 | break; | |
2fcee4bf JS |
8145 | case LPFC_SLI_INTF_IF_TYPE_1: |
8146 | default: | |
8147 | dev_printk(KERN_ERR, &phba->pcidev->dev, | |
8148 | "FATAL - unsupported SLI4 interface type - %d\n", | |
8149 | if_type); | |
8150 | break; | |
8151 | } | |
da0436e9 | 8152 | } |
3772a991 | 8153 | |
da0436e9 JS |
8154 | /** |
8155 | * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map. | |
8156 | * @phba: pointer to lpfc hba data structure. | |
8157 | * | |
27d6ac0a | 8158 | * This routine is invoked to set up SLI4 BAR1 register memory map. |
da0436e9 JS |
8159 | **/ |
8160 | static void | |
27d6ac0a | 8161 | lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba, uint32_t if_type) |
da0436e9 | 8162 | { |
27d6ac0a JS |
8163 | switch (if_type) { |
8164 | case LPFC_SLI_INTF_IF_TYPE_0: | |
8165 | phba->sli4_hba.PSMPHRregaddr = | |
8166 | phba->sli4_hba.ctrl_regs_memmap_p + | |
8167 | LPFC_SLIPORT_IF0_SMPHR; | |
8168 | phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + | |
8169 | LPFC_HST_ISR0; | |
8170 | phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + | |
8171 | LPFC_HST_IMR0; | |
8172 | phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + | |
8173 | LPFC_HST_ISCR0; | |
8174 | break; | |
8175 | case LPFC_SLI_INTF_IF_TYPE_6: | |
8176 | phba->sli4_hba.RQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + | |
8177 | LPFC_IF6_RQ_DOORBELL; | |
8178 | phba->sli4_hba.WQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + | |
8179 | LPFC_IF6_WQ_DOORBELL; | |
8180 | phba->sli4_hba.CQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + | |
8181 | LPFC_IF6_CQ_DOORBELL; | |
8182 | phba->sli4_hba.EQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + | |
8183 | LPFC_IF6_EQ_DOORBELL; | |
8184 | phba->sli4_hba.MQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + | |
8185 | LPFC_IF6_MQ_DOORBELL; | |
8186 | break; | |
8187 | case LPFC_SLI_INTF_IF_TYPE_2: | |
8188 | case LPFC_SLI_INTF_IF_TYPE_1: | |
8189 | default: | |
8190 | dev_err(&phba->pcidev->dev, | |
8191 | "FATAL - unsupported SLI4 interface type - %d\n", | |
8192 | if_type); | |
8193 | break; | |
8194 | } | |
3772a991 JS |
8195 | } |
8196 | ||
8197 | /** | |
da0436e9 | 8198 | * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map. |
3772a991 | 8199 | * @phba: pointer to lpfc hba data structure. |
da0436e9 | 8200 | * @vf: virtual function number |
3772a991 | 8201 | * |
da0436e9 JS |
8202 | * This routine is invoked to set up SLI4 BAR2 doorbell register memory map |
8203 | * based on the given viftual function number, @vf. | |
8204 | * | |
8205 | * Return 0 if successful, otherwise -ENODEV. | |
3772a991 | 8206 | **/ |
da0436e9 JS |
8207 | static int |
8208 | lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf) | |
3772a991 | 8209 | { |
da0436e9 JS |
8210 | if (vf > LPFC_VIR_FUNC_MAX) |
8211 | return -ENODEV; | |
3772a991 | 8212 | |
da0436e9 | 8213 | phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + |
962bc51b JS |
8214 | vf * LPFC_VFR_PAGE_SIZE + |
8215 | LPFC_ULP0_RQ_DOORBELL); | |
da0436e9 | 8216 | phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + |
962bc51b JS |
8217 | vf * LPFC_VFR_PAGE_SIZE + |
8218 | LPFC_ULP0_WQ_DOORBELL); | |
9dd35425 JS |
8219 | phba->sli4_hba.CQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + |
8220 | vf * LPFC_VFR_PAGE_SIZE + | |
8221 | LPFC_EQCQ_DOORBELL); | |
8222 | phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr; | |
da0436e9 JS |
8223 | phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + |
8224 | vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL); | |
8225 | phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p + | |
8226 | vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX); | |
8227 | return 0; | |
3772a991 JS |
8228 | } |
8229 | ||
8230 | /** | |
da0436e9 | 8231 | * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox |
3772a991 JS |
8232 | * @phba: pointer to lpfc hba data structure. |
8233 | * | |
da0436e9 JS |
8234 | * This routine is invoked to create the bootstrap mailbox |
8235 | * region consistent with the SLI-4 interface spec. This | |
8236 | * routine allocates all memory necessary to communicate | |
8237 | * mailbox commands to the port and sets up all alignment | |
8238 | * needs. No locks are expected to be held when calling | |
8239 | * this routine. | |
3772a991 JS |
8240 | * |
8241 | * Return codes | |
af901ca1 | 8242 | * 0 - successful |
d439d286 | 8243 | * -ENOMEM - could not allocated memory. |
da0436e9 | 8244 | **/ |
3772a991 | 8245 | static int |
da0436e9 | 8246 | lpfc_create_bootstrap_mbox(struct lpfc_hba *phba) |
3772a991 | 8247 | { |
da0436e9 JS |
8248 | uint32_t bmbx_size; |
8249 | struct lpfc_dmabuf *dmabuf; | |
8250 | struct dma_address *dma_address; | |
8251 | uint32_t pa_addr; | |
8252 | uint64_t phys_addr; | |
8253 | ||
8254 | dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); | |
8255 | if (!dmabuf) | |
8256 | return -ENOMEM; | |
3772a991 | 8257 | |
da0436e9 JS |
8258 | /* |
8259 | * The bootstrap mailbox region is comprised of 2 parts | |
8260 | * plus an alignment restriction of 16 bytes. | |
8261 | */ | |
8262 | bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1); | |
750afb08 LC |
8263 | dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, bmbx_size, |
8264 | &dmabuf->phys, GFP_KERNEL); | |
da0436e9 JS |
8265 | if (!dmabuf->virt) { |
8266 | kfree(dmabuf); | |
8267 | return -ENOMEM; | |
3772a991 JS |
8268 | } |
8269 | ||
da0436e9 JS |
8270 | /* |
8271 | * Initialize the bootstrap mailbox pointers now so that the register | |
8272 | * operations are simple later. The mailbox dma address is required | |
8273 | * to be 16-byte aligned. Also align the virtual memory as each | |
8274 | * maibox is copied into the bmbx mailbox region before issuing the | |
8275 | * command to the port. | |
8276 | */ | |
8277 | phba->sli4_hba.bmbx.dmabuf = dmabuf; | |
8278 | phba->sli4_hba.bmbx.bmbx_size = bmbx_size; | |
8279 | ||
8280 | phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt, | |
8281 | LPFC_ALIGN_16_BYTE); | |
8282 | phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys, | |
8283 | LPFC_ALIGN_16_BYTE); | |
8284 | ||
8285 | /* | |
8286 | * Set the high and low physical addresses now. The SLI4 alignment | |
8287 | * requirement is 16 bytes and the mailbox is posted to the port | |
8288 | * as two 30-bit addresses. The other data is a bit marking whether | |
8289 | * the 30-bit address is the high or low address. | |
8290 | * Upcast bmbx aphys to 64bits so shift instruction compiles | |
8291 | * clean on 32 bit machines. | |
8292 | */ | |
8293 | dma_address = &phba->sli4_hba.bmbx.dma_address; | |
8294 | phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys; | |
8295 | pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff); | |
8296 | dma_address->addr_hi = (uint32_t) ((pa_addr << 2) | | |
8297 | LPFC_BMBX_BIT1_ADDR_HI); | |
8298 | ||
8299 | pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff); | |
8300 | dma_address->addr_lo = (uint32_t) ((pa_addr << 2) | | |
8301 | LPFC_BMBX_BIT1_ADDR_LO); | |
8302 | return 0; | |
3772a991 JS |
8303 | } |
8304 | ||
8305 | /** | |
da0436e9 | 8306 | * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources |
3772a991 JS |
8307 | * @phba: pointer to lpfc hba data structure. |
8308 | * | |
da0436e9 JS |
8309 | * This routine is invoked to teardown the bootstrap mailbox |
8310 | * region and release all host resources. This routine requires | |
8311 | * the caller to ensure all mailbox commands recovered, no | |
8312 | * additional mailbox comands are sent, and interrupts are disabled | |
8313 | * before calling this routine. | |
8314 | * | |
8315 | **/ | |
3772a991 | 8316 | static void |
da0436e9 | 8317 | lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba) |
3772a991 | 8318 | { |
da0436e9 JS |
8319 | dma_free_coherent(&phba->pcidev->dev, |
8320 | phba->sli4_hba.bmbx.bmbx_size, | |
8321 | phba->sli4_hba.bmbx.dmabuf->virt, | |
8322 | phba->sli4_hba.bmbx.dmabuf->phys); | |
8323 | ||
8324 | kfree(phba->sli4_hba.bmbx.dmabuf); | |
8325 | memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx)); | |
3772a991 JS |
8326 | } |
8327 | ||
8328 | /** | |
da0436e9 | 8329 | * lpfc_sli4_read_config - Get the config parameters. |
3772a991 JS |
8330 | * @phba: pointer to lpfc hba data structure. |
8331 | * | |
da0436e9 JS |
8332 | * This routine is invoked to read the configuration parameters from the HBA. |
8333 | * The configuration parameters are used to set the base and maximum values | |
8334 | * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource | |
8335 | * allocation for the port. | |
3772a991 JS |
8336 | * |
8337 | * Return codes | |
af901ca1 | 8338 | * 0 - successful |
25985edc | 8339 | * -ENOMEM - No available memory |
d439d286 | 8340 | * -EIO - The mailbox failed to complete successfully. |
3772a991 | 8341 | **/ |
ff78d8f9 | 8342 | int |
da0436e9 | 8343 | lpfc_sli4_read_config(struct lpfc_hba *phba) |
3772a991 | 8344 | { |
da0436e9 JS |
8345 | LPFC_MBOXQ_t *pmb; |
8346 | struct lpfc_mbx_read_config *rd_config; | |
912e3acd JS |
8347 | union lpfc_sli4_cfg_shdr *shdr; |
8348 | uint32_t shdr_status, shdr_add_status; | |
8349 | struct lpfc_mbx_get_func_cfg *get_func_cfg; | |
8350 | struct lpfc_rsrc_desc_fcfcoe *desc; | |
8aa134a8 | 8351 | char *pdesc_0; |
c691816e | 8352 | uint16_t forced_link_speed; |
6a828b0f | 8353 | uint32_t if_type, qmin; |
8aa134a8 | 8354 | int length, i, rc = 0, rc2; |
3772a991 | 8355 | |
da0436e9 JS |
8356 | pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); |
8357 | if (!pmb) { | |
8358 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
8359 | "2011 Unable to allocate memory for issuing " | |
8360 | "SLI_CONFIG_SPECIAL mailbox command\n"); | |
8361 | return -ENOMEM; | |
3772a991 JS |
8362 | } |
8363 | ||
da0436e9 | 8364 | lpfc_read_config(phba, pmb); |
3772a991 | 8365 | |
da0436e9 JS |
8366 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); |
8367 | if (rc != MBX_SUCCESS) { | |
8368 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
8369 | "2012 Mailbox failed , mbxCmd x%x " | |
8370 | "READ_CONFIG, mbxStatus x%x\n", | |
8371 | bf_get(lpfc_mqe_command, &pmb->u.mqe), | |
8372 | bf_get(lpfc_mqe_status, &pmb->u.mqe)); | |
8373 | rc = -EIO; | |
8374 | } else { | |
8375 | rd_config = &pmb->u.mqe.un.rd_config; | |
ff78d8f9 JS |
8376 | if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) { |
8377 | phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL; | |
8378 | phba->sli4_hba.lnk_info.lnk_tp = | |
8379 | bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config); | |
8380 | phba->sli4_hba.lnk_info.lnk_no = | |
8381 | bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config); | |
8382 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
8383 | "3081 lnk_type:%d, lnk_numb:%d\n", | |
8384 | phba->sli4_hba.lnk_info.lnk_tp, | |
8385 | phba->sli4_hba.lnk_info.lnk_no); | |
8386 | } else | |
8387 | lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, | |
8388 | "3082 Mailbox (x%x) returned ldv:x0\n", | |
8389 | bf_get(lpfc_mqe_command, &pmb->u.mqe)); | |
44fd7fe3 JS |
8390 | if (bf_get(lpfc_mbx_rd_conf_bbscn_def, rd_config)) { |
8391 | phba->bbcredit_support = 1; | |
8392 | phba->sli4_hba.bbscn_params.word0 = rd_config->word8; | |
8393 | } | |
8394 | ||
1dc5ec24 JS |
8395 | phba->sli4_hba.conf_trunk = |
8396 | bf_get(lpfc_mbx_rd_conf_trunk, rd_config); | |
6d368e53 JS |
8397 | phba->sli4_hba.extents_in_use = |
8398 | bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config); | |
da0436e9 JS |
8399 | phba->sli4_hba.max_cfg_param.max_xri = |
8400 | bf_get(lpfc_mbx_rd_conf_xri_count, rd_config); | |
31f06d2e JS |
8401 | /* Reduce resource usage in kdump environment */ |
8402 | if (is_kdump_kernel() && | |
8403 | phba->sli4_hba.max_cfg_param.max_xri > 512) | |
8404 | phba->sli4_hba.max_cfg_param.max_xri = 512; | |
da0436e9 JS |
8405 | phba->sli4_hba.max_cfg_param.xri_base = |
8406 | bf_get(lpfc_mbx_rd_conf_xri_base, rd_config); | |
8407 | phba->sli4_hba.max_cfg_param.max_vpi = | |
8408 | bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config); | |
8b47ae69 JS |
8409 | /* Limit the max we support */ |
8410 | if (phba->sli4_hba.max_cfg_param.max_vpi > LPFC_MAX_VPORTS) | |
8411 | phba->sli4_hba.max_cfg_param.max_vpi = LPFC_MAX_VPORTS; | |
da0436e9 JS |
8412 | phba->sli4_hba.max_cfg_param.vpi_base = |
8413 | bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config); | |
8414 | phba->sli4_hba.max_cfg_param.max_rpi = | |
8415 | bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config); | |
8416 | phba->sli4_hba.max_cfg_param.rpi_base = | |
8417 | bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config); | |
8418 | phba->sli4_hba.max_cfg_param.max_vfi = | |
8419 | bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config); | |
8420 | phba->sli4_hba.max_cfg_param.vfi_base = | |
8421 | bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config); | |
8422 | phba->sli4_hba.max_cfg_param.max_fcfi = | |
8423 | bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config); | |
da0436e9 JS |
8424 | phba->sli4_hba.max_cfg_param.max_eq = |
8425 | bf_get(lpfc_mbx_rd_conf_eq_count, rd_config); | |
8426 | phba->sli4_hba.max_cfg_param.max_rq = | |
8427 | bf_get(lpfc_mbx_rd_conf_rq_count, rd_config); | |
8428 | phba->sli4_hba.max_cfg_param.max_wq = | |
8429 | bf_get(lpfc_mbx_rd_conf_wq_count, rd_config); | |
8430 | phba->sli4_hba.max_cfg_param.max_cq = | |
8431 | bf_get(lpfc_mbx_rd_conf_cq_count, rd_config); | |
8432 | phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config); | |
8433 | phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base; | |
8434 | phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base; | |
8435 | phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base; | |
5ffc266e JS |
8436 | phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ? |
8437 | (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0; | |
da0436e9 JS |
8438 | phba->max_vports = phba->max_vpi; |
8439 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
6d368e53 JS |
8440 | "2003 cfg params Extents? %d " |
8441 | "XRI(B:%d M:%d), " | |
da0436e9 JS |
8442 | "VPI(B:%d M:%d) " |
8443 | "VFI(B:%d M:%d) " | |
8444 | "RPI(B:%d M:%d) " | |
2ea259ee | 8445 | "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d\n", |
6d368e53 | 8446 | phba->sli4_hba.extents_in_use, |
da0436e9 JS |
8447 | phba->sli4_hba.max_cfg_param.xri_base, |
8448 | phba->sli4_hba.max_cfg_param.max_xri, | |
8449 | phba->sli4_hba.max_cfg_param.vpi_base, | |
8450 | phba->sli4_hba.max_cfg_param.max_vpi, | |
8451 | phba->sli4_hba.max_cfg_param.vfi_base, | |
8452 | phba->sli4_hba.max_cfg_param.max_vfi, | |
8453 | phba->sli4_hba.max_cfg_param.rpi_base, | |
8454 | phba->sli4_hba.max_cfg_param.max_rpi, | |
2ea259ee JS |
8455 | phba->sli4_hba.max_cfg_param.max_fcfi, |
8456 | phba->sli4_hba.max_cfg_param.max_eq, | |
8457 | phba->sli4_hba.max_cfg_param.max_cq, | |
8458 | phba->sli4_hba.max_cfg_param.max_wq, | |
8459 | phba->sli4_hba.max_cfg_param.max_rq); | |
8460 | ||
d38f33b3 | 8461 | /* |
6a828b0f JS |
8462 | * Calculate queue resources based on how |
8463 | * many WQ/CQ/EQs are available. | |
d38f33b3 | 8464 | */ |
6a828b0f JS |
8465 | qmin = phba->sli4_hba.max_cfg_param.max_wq; |
8466 | if (phba->sli4_hba.max_cfg_param.max_cq < qmin) | |
8467 | qmin = phba->sli4_hba.max_cfg_param.max_cq; | |
8468 | if (phba->sli4_hba.max_cfg_param.max_eq < qmin) | |
8469 | qmin = phba->sli4_hba.max_cfg_param.max_eq; | |
8470 | /* | |
8471 | * Whats left after this can go toward NVME / FCP. | |
8472 | * The minus 4 accounts for ELS, NVME LS, MBOX | |
8473 | * plus one extra. When configured for | |
8474 | * NVMET, FCP io channel WQs are not created. | |
8475 | */ | |
8476 | qmin -= 4; | |
d38f33b3 | 8477 | |
6a828b0f JS |
8478 | /* If NVME is configured, double the number of CQ/WQs needed */ |
8479 | if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) && | |
8480 | !phba->nvmet_support) | |
8481 | qmin /= 2; | |
8482 | ||
8483 | /* Check to see if there is enough for NVME */ | |
8484 | if ((phba->cfg_irq_chann > qmin) || | |
8485 | (phba->cfg_hdw_queue > qmin)) { | |
8486 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
8487 | "2005 Reducing Queues: " | |
8488 | "WQ %d CQ %d EQ %d: min %d: " | |
8489 | "IRQ %d HDWQ %d\n", | |
d38f33b3 JS |
8490 | phba->sli4_hba.max_cfg_param.max_wq, |
8491 | phba->sli4_hba.max_cfg_param.max_cq, | |
6a828b0f JS |
8492 | phba->sli4_hba.max_cfg_param.max_eq, |
8493 | qmin, phba->cfg_irq_chann, | |
cdb42bec | 8494 | phba->cfg_hdw_queue); |
d38f33b3 | 8495 | |
6a828b0f JS |
8496 | if (phba->cfg_irq_chann > qmin) |
8497 | phba->cfg_irq_chann = qmin; | |
8498 | if (phba->cfg_hdw_queue > qmin) | |
8499 | phba->cfg_hdw_queue = qmin; | |
d38f33b3 | 8500 | } |
3772a991 | 8501 | } |
912e3acd JS |
8502 | |
8503 | if (rc) | |
8504 | goto read_cfg_out; | |
da0436e9 | 8505 | |
c691816e JS |
8506 | /* Update link speed if forced link speed is supported */ |
8507 | if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); | |
27d6ac0a | 8508 | if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) { |
c691816e JS |
8509 | forced_link_speed = |
8510 | bf_get(lpfc_mbx_rd_conf_link_speed, rd_config); | |
8511 | if (forced_link_speed) { | |
8512 | phba->hba_flag |= HBA_FORCED_LINK_SPEED; | |
8513 | ||
8514 | switch (forced_link_speed) { | |
8515 | case LINK_SPEED_1G: | |
8516 | phba->cfg_link_speed = | |
8517 | LPFC_USER_LINK_SPEED_1G; | |
8518 | break; | |
8519 | case LINK_SPEED_2G: | |
8520 | phba->cfg_link_speed = | |
8521 | LPFC_USER_LINK_SPEED_2G; | |
8522 | break; | |
8523 | case LINK_SPEED_4G: | |
8524 | phba->cfg_link_speed = | |
8525 | LPFC_USER_LINK_SPEED_4G; | |
8526 | break; | |
8527 | case LINK_SPEED_8G: | |
8528 | phba->cfg_link_speed = | |
8529 | LPFC_USER_LINK_SPEED_8G; | |
8530 | break; | |
8531 | case LINK_SPEED_10G: | |
8532 | phba->cfg_link_speed = | |
8533 | LPFC_USER_LINK_SPEED_10G; | |
8534 | break; | |
8535 | case LINK_SPEED_16G: | |
8536 | phba->cfg_link_speed = | |
8537 | LPFC_USER_LINK_SPEED_16G; | |
8538 | break; | |
8539 | case LINK_SPEED_32G: | |
8540 | phba->cfg_link_speed = | |
8541 | LPFC_USER_LINK_SPEED_32G; | |
8542 | break; | |
fbd8a6ba JS |
8543 | case LINK_SPEED_64G: |
8544 | phba->cfg_link_speed = | |
8545 | LPFC_USER_LINK_SPEED_64G; | |
8546 | break; | |
c691816e JS |
8547 | case 0xffff: |
8548 | phba->cfg_link_speed = | |
8549 | LPFC_USER_LINK_SPEED_AUTO; | |
8550 | break; | |
8551 | default: | |
8552 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
8553 | "0047 Unrecognized link " | |
8554 | "speed : %d\n", | |
8555 | forced_link_speed); | |
8556 | phba->cfg_link_speed = | |
8557 | LPFC_USER_LINK_SPEED_AUTO; | |
8558 | } | |
8559 | } | |
8560 | } | |
8561 | ||
da0436e9 | 8562 | /* Reset the DFT_HBA_Q_DEPTH to the max xri */ |
572709e2 JS |
8563 | length = phba->sli4_hba.max_cfg_param.max_xri - |
8564 | lpfc_sli4_get_els_iocb_cnt(phba); | |
8565 | if (phba->cfg_hba_queue_depth > length) { | |
8566 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
8567 | "3361 HBA queue depth changed from %d to %d\n", | |
8568 | phba->cfg_hba_queue_depth, length); | |
8569 | phba->cfg_hba_queue_depth = length; | |
8570 | } | |
912e3acd | 8571 | |
27d6ac0a | 8572 | if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) < |
912e3acd JS |
8573 | LPFC_SLI_INTF_IF_TYPE_2) |
8574 | goto read_cfg_out; | |
8575 | ||
8576 | /* get the pf# and vf# for SLI4 if_type 2 port */ | |
8577 | length = (sizeof(struct lpfc_mbx_get_func_cfg) - | |
8578 | sizeof(struct lpfc_sli4_cfg_mhdr)); | |
8579 | lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON, | |
8580 | LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG, | |
8581 | length, LPFC_SLI4_MBX_EMBED); | |
8582 | ||
8aa134a8 | 8583 | rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); |
912e3acd JS |
8584 | shdr = (union lpfc_sli4_cfg_shdr *) |
8585 | &pmb->u.mqe.un.sli4_config.header.cfg_shdr; | |
8586 | shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); | |
8587 | shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response); | |
8aa134a8 | 8588 | if (rc2 || shdr_status || shdr_add_status) { |
912e3acd JS |
8589 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, |
8590 | "3026 Mailbox failed , mbxCmd x%x " | |
8591 | "GET_FUNCTION_CONFIG, mbxStatus x%x\n", | |
8592 | bf_get(lpfc_mqe_command, &pmb->u.mqe), | |
8593 | bf_get(lpfc_mqe_status, &pmb->u.mqe)); | |
912e3acd JS |
8594 | goto read_cfg_out; |
8595 | } | |
8596 | ||
8597 | /* search for fc_fcoe resrouce descriptor */ | |
8598 | get_func_cfg = &pmb->u.mqe.un.get_func_cfg; | |
912e3acd | 8599 | |
8aa134a8 JS |
8600 | pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0]; |
8601 | desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0; | |
8602 | length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc); | |
8603 | if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD) | |
8604 | length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH; | |
8605 | else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH) | |
8606 | goto read_cfg_out; | |
8607 | ||
912e3acd | 8608 | for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) { |
8aa134a8 | 8609 | desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i); |
912e3acd | 8610 | if (LPFC_RSRC_DESC_TYPE_FCFCOE == |
8aa134a8 | 8611 | bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) { |
912e3acd JS |
8612 | phba->sli4_hba.iov.pf_number = |
8613 | bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc); | |
8614 | phba->sli4_hba.iov.vf_number = | |
8615 | bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc); | |
8616 | break; | |
8617 | } | |
8618 | } | |
8619 | ||
8620 | if (i < LPFC_RSRC_DESC_MAX_NUM) | |
8621 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
8622 | "3027 GET_FUNCTION_CONFIG: pf_number:%d, " | |
8623 | "vf_number:%d\n", phba->sli4_hba.iov.pf_number, | |
8624 | phba->sli4_hba.iov.vf_number); | |
8aa134a8 | 8625 | else |
912e3acd JS |
8626 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, |
8627 | "3028 GET_FUNCTION_CONFIG: failed to find " | |
c4dba187 | 8628 | "Resource Descriptor:x%x\n", |
912e3acd | 8629 | LPFC_RSRC_DESC_TYPE_FCFCOE); |
912e3acd JS |
8630 | |
8631 | read_cfg_out: | |
8632 | mempool_free(pmb, phba->mbox_mem_pool); | |
da0436e9 | 8633 | return rc; |
3772a991 JS |
8634 | } |
8635 | ||
8636 | /** | |
2fcee4bf | 8637 | * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port. |
3772a991 JS |
8638 | * @phba: pointer to lpfc hba data structure. |
8639 | * | |
2fcee4bf JS |
8640 | * This routine is invoked to setup the port-side endian order when |
8641 | * the port if_type is 0. This routine has no function for other | |
8642 | * if_types. | |
da0436e9 JS |
8643 | * |
8644 | * Return codes | |
af901ca1 | 8645 | * 0 - successful |
25985edc | 8646 | * -ENOMEM - No available memory |
d439d286 | 8647 | * -EIO - The mailbox failed to complete successfully. |
3772a991 | 8648 | **/ |
da0436e9 JS |
8649 | static int |
8650 | lpfc_setup_endian_order(struct lpfc_hba *phba) | |
3772a991 | 8651 | { |
da0436e9 | 8652 | LPFC_MBOXQ_t *mboxq; |
2fcee4bf | 8653 | uint32_t if_type, rc = 0; |
da0436e9 JS |
8654 | uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0, |
8655 | HOST_ENDIAN_HIGH_WORD1}; | |
3772a991 | 8656 | |
2fcee4bf JS |
8657 | if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); |
8658 | switch (if_type) { | |
8659 | case LPFC_SLI_INTF_IF_TYPE_0: | |
8660 | mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, | |
8661 | GFP_KERNEL); | |
8662 | if (!mboxq) { | |
8663 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8664 | "0492 Unable to allocate memory for " | |
8665 | "issuing SLI_CONFIG_SPECIAL mailbox " | |
8666 | "command\n"); | |
8667 | return -ENOMEM; | |
8668 | } | |
3772a991 | 8669 | |
2fcee4bf JS |
8670 | /* |
8671 | * The SLI4_CONFIG_SPECIAL mailbox command requires the first | |
8672 | * two words to contain special data values and no other data. | |
8673 | */ | |
8674 | memset(mboxq, 0, sizeof(LPFC_MBOXQ_t)); | |
8675 | memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data)); | |
8676 | rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
8677 | if (rc != MBX_SUCCESS) { | |
8678 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8679 | "0493 SLI_CONFIG_SPECIAL mailbox " | |
8680 | "failed with status x%x\n", | |
8681 | rc); | |
8682 | rc = -EIO; | |
8683 | } | |
8684 | mempool_free(mboxq, phba->mbox_mem_pool); | |
8685 | break; | |
27d6ac0a | 8686 | case LPFC_SLI_INTF_IF_TYPE_6: |
2fcee4bf JS |
8687 | case LPFC_SLI_INTF_IF_TYPE_2: |
8688 | case LPFC_SLI_INTF_IF_TYPE_1: | |
8689 | default: | |
8690 | break; | |
da0436e9 | 8691 | } |
da0436e9 | 8692 | return rc; |
3772a991 JS |
8693 | } |
8694 | ||
8695 | /** | |
895427bd | 8696 | * lpfc_sli4_queue_verify - Verify and update EQ counts |
3772a991 JS |
8697 | * @phba: pointer to lpfc hba data structure. |
8698 | * | |
895427bd JS |
8699 | * This routine is invoked to check the user settable queue counts for EQs. |
8700 | * After this routine is called the counts will be set to valid values that | |
5350d872 JS |
8701 | * adhere to the constraints of the system's interrupt vectors and the port's |
8702 | * queue resources. | |
da0436e9 JS |
8703 | * |
8704 | * Return codes | |
af901ca1 | 8705 | * 0 - successful |
25985edc | 8706 | * -ENOMEM - No available memory |
3772a991 | 8707 | **/ |
da0436e9 | 8708 | static int |
5350d872 | 8709 | lpfc_sli4_queue_verify(struct lpfc_hba *phba) |
3772a991 | 8710 | { |
da0436e9 | 8711 | /* |
67d12733 | 8712 | * Sanity check for configured queue parameters against the run-time |
da0436e9 JS |
8713 | * device parameters |
8714 | */ | |
3772a991 | 8715 | |
bcb24f65 | 8716 | if (phba->nvmet_support) { |
6a828b0f JS |
8717 | if (phba->cfg_irq_chann < phba->cfg_nvmet_mrq) |
8718 | phba->cfg_nvmet_mrq = phba->cfg_irq_chann; | |
982ab128 JS |
8719 | if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX) |
8720 | phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX; | |
bcb24f65 | 8721 | } |
895427bd JS |
8722 | |
8723 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
6a828b0f JS |
8724 | "2574 IO channels: hdwQ %d IRQ %d MRQ: %d\n", |
8725 | phba->cfg_hdw_queue, phba->cfg_irq_chann, | |
8726 | phba->cfg_nvmet_mrq); | |
3772a991 | 8727 | |
da0436e9 JS |
8728 | /* Get EQ depth from module parameter, fake the default for now */ |
8729 | phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B; | |
8730 | phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT; | |
3772a991 | 8731 | |
5350d872 JS |
8732 | /* Get CQ depth from module parameter, fake the default for now */ |
8733 | phba->sli4_hba.cq_esize = LPFC_CQE_SIZE; | |
8734 | phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT; | |
895427bd JS |
8735 | return 0; |
8736 | } | |
8737 | ||
8738 | static int | |
8739 | lpfc_alloc_nvme_wq_cq(struct lpfc_hba *phba, int wqidx) | |
8740 | { | |
8741 | struct lpfc_queue *qdesc; | |
c1a21ebc | 8742 | int cpu; |
5350d872 | 8743 | |
c1a21ebc | 8744 | cpu = lpfc_find_cpu_handle(phba, wqidx, LPFC_FIND_BY_HDWQ); |
a51e41b6 | 8745 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, |
81b96eda | 8746 | phba->sli4_hba.cq_esize, |
c1a21ebc | 8747 | LPFC_CQE_EXP_COUNT, cpu); |
895427bd JS |
8748 | if (!qdesc) { |
8749 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8750 | "0508 Failed allocate fast-path NVME CQ (%d)\n", | |
8751 | wqidx); | |
8752 | return 1; | |
8753 | } | |
7365f6fd | 8754 | qdesc->qe_valid = 1; |
5e5b511d | 8755 | qdesc->hdwq = wqidx; |
c1a21ebc | 8756 | qdesc->chann = cpu; |
cdb42bec | 8757 | phba->sli4_hba.hdwq[wqidx].nvme_cq = qdesc; |
895427bd | 8758 | |
a51e41b6 | 8759 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, |
c1a21ebc JS |
8760 | LPFC_WQE128_SIZE, LPFC_WQE_EXP_COUNT, |
8761 | cpu); | |
895427bd JS |
8762 | if (!qdesc) { |
8763 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8764 | "0509 Failed allocate fast-path NVME WQ (%d)\n", | |
8765 | wqidx); | |
8766 | return 1; | |
8767 | } | |
5e5b511d | 8768 | qdesc->hdwq = wqidx; |
6a828b0f | 8769 | qdesc->chann = wqidx; |
cdb42bec | 8770 | phba->sli4_hba.hdwq[wqidx].nvme_wq = qdesc; |
895427bd JS |
8771 | list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); |
8772 | return 0; | |
8773 | } | |
8774 | ||
8775 | static int | |
8776 | lpfc_alloc_fcp_wq_cq(struct lpfc_hba *phba, int wqidx) | |
8777 | { | |
8778 | struct lpfc_queue *qdesc; | |
c176ffa0 | 8779 | uint32_t wqesize; |
c1a21ebc | 8780 | int cpu; |
895427bd | 8781 | |
c1a21ebc | 8782 | cpu = lpfc_find_cpu_handle(phba, wqidx, LPFC_FIND_BY_HDWQ); |
895427bd | 8783 | /* Create Fast Path FCP CQs */ |
c176ffa0 | 8784 | if (phba->enab_exp_wqcq_pages) |
a51e41b6 JS |
8785 | /* Increase the CQ size when WQEs contain an embedded cdb */ |
8786 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, | |
8787 | phba->sli4_hba.cq_esize, | |
c1a21ebc | 8788 | LPFC_CQE_EXP_COUNT, cpu); |
a51e41b6 JS |
8789 | |
8790 | else | |
8791 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, | |
8792 | phba->sli4_hba.cq_esize, | |
c1a21ebc | 8793 | phba->sli4_hba.cq_ecount, cpu); |
895427bd JS |
8794 | if (!qdesc) { |
8795 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8796 | "0499 Failed allocate fast-path FCP CQ (%d)\n", wqidx); | |
8797 | return 1; | |
8798 | } | |
7365f6fd | 8799 | qdesc->qe_valid = 1; |
5e5b511d | 8800 | qdesc->hdwq = wqidx; |
c1a21ebc | 8801 | qdesc->chann = cpu; |
cdb42bec | 8802 | phba->sli4_hba.hdwq[wqidx].fcp_cq = qdesc; |
895427bd JS |
8803 | |
8804 | /* Create Fast Path FCP WQs */ | |
c176ffa0 | 8805 | if (phba->enab_exp_wqcq_pages) { |
a51e41b6 | 8806 | /* Increase the WQ size when WQEs contain an embedded cdb */ |
c176ffa0 JS |
8807 | wqesize = (phba->fcp_embed_io) ? |
8808 | LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize; | |
a51e41b6 | 8809 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, |
c176ffa0 | 8810 | wqesize, |
c1a21ebc | 8811 | LPFC_WQE_EXP_COUNT, cpu); |
c176ffa0 | 8812 | } else |
a51e41b6 JS |
8813 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
8814 | phba->sli4_hba.wq_esize, | |
c1a21ebc | 8815 | phba->sli4_hba.wq_ecount, cpu); |
c176ffa0 | 8816 | |
895427bd JS |
8817 | if (!qdesc) { |
8818 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8819 | "0503 Failed allocate fast-path FCP WQ (%d)\n", | |
8820 | wqidx); | |
8821 | return 1; | |
8822 | } | |
5e5b511d | 8823 | qdesc->hdwq = wqidx; |
6a828b0f | 8824 | qdesc->chann = wqidx; |
cdb42bec | 8825 | phba->sli4_hba.hdwq[wqidx].fcp_wq = qdesc; |
895427bd | 8826 | list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); |
5350d872 | 8827 | return 0; |
5350d872 JS |
8828 | } |
8829 | ||
8830 | /** | |
8831 | * lpfc_sli4_queue_create - Create all the SLI4 queues | |
8832 | * @phba: pointer to lpfc hba data structure. | |
8833 | * | |
8834 | * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA | |
8835 | * operation. For each SLI4 queue type, the parameters such as queue entry | |
8836 | * count (queue depth) shall be taken from the module parameter. For now, | |
8837 | * we just use some constant number as place holder. | |
8838 | * | |
8839 | * Return codes | |
4907cb7b | 8840 | * 0 - successful |
5350d872 JS |
8841 | * -ENOMEM - No availble memory |
8842 | * -EIO - The mailbox failed to complete successfully. | |
8843 | **/ | |
8844 | int | |
8845 | lpfc_sli4_queue_create(struct lpfc_hba *phba) | |
8846 | { | |
8847 | struct lpfc_queue *qdesc; | |
657add4e | 8848 | int idx, cpu, eqcpu; |
5e5b511d | 8849 | struct lpfc_sli4_hdw_queue *qp; |
657add4e JS |
8850 | struct lpfc_vector_map_info *cpup; |
8851 | struct lpfc_vector_map_info *eqcpup; | |
32517fc0 | 8852 | struct lpfc_eq_intr_info *eqi; |
5350d872 JS |
8853 | |
8854 | /* | |
67d12733 | 8855 | * Create HBA Record arrays. |
895427bd | 8856 | * Both NVME and FCP will share that same vectors / EQs |
5350d872 | 8857 | */ |
67d12733 JS |
8858 | phba->sli4_hba.mq_esize = LPFC_MQE_SIZE; |
8859 | phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT; | |
8860 | phba->sli4_hba.wq_esize = LPFC_WQE_SIZE; | |
8861 | phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT; | |
8862 | phba->sli4_hba.rq_esize = LPFC_RQE_SIZE; | |
8863 | phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT; | |
895427bd JS |
8864 | phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B; |
8865 | phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT; | |
8866 | phba->sli4_hba.cq_esize = LPFC_CQE_SIZE; | |
8867 | phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT; | |
67d12733 | 8868 | |
cdb42bec | 8869 | if (!phba->sli4_hba.hdwq) { |
5e5b511d JS |
8870 | phba->sli4_hba.hdwq = kcalloc( |
8871 | phba->cfg_hdw_queue, sizeof(struct lpfc_sli4_hdw_queue), | |
8872 | GFP_KERNEL); | |
8873 | if (!phba->sli4_hba.hdwq) { | |
895427bd | 8874 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
5e5b511d JS |
8875 | "6427 Failed allocate memory for " |
8876 | "fast-path Hardware Queue array\n"); | |
895427bd JS |
8877 | goto out_error; |
8878 | } | |
5e5b511d JS |
8879 | /* Prepare hardware queues to take IO buffers */ |
8880 | for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { | |
8881 | qp = &phba->sli4_hba.hdwq[idx]; | |
8882 | spin_lock_init(&qp->io_buf_list_get_lock); | |
8883 | spin_lock_init(&qp->io_buf_list_put_lock); | |
8884 | INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get); | |
8885 | INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put); | |
8886 | qp->get_io_bufs = 0; | |
8887 | qp->put_io_bufs = 0; | |
8888 | qp->total_io_bufs = 0; | |
8889 | spin_lock_init(&qp->abts_scsi_buf_list_lock); | |
8890 | INIT_LIST_HEAD(&qp->lpfc_abts_scsi_buf_list); | |
8891 | qp->abts_scsi_io_bufs = 0; | |
8892 | spin_lock_init(&qp->abts_nvme_buf_list_lock); | |
8893 | INIT_LIST_HEAD(&qp->lpfc_abts_nvme_buf_list); | |
8894 | qp->abts_nvme_io_bufs = 0; | |
d79c9e9d JS |
8895 | INIT_LIST_HEAD(&qp->sgl_list); |
8896 | INIT_LIST_HEAD(&qp->cmd_rsp_buf_list); | |
8897 | spin_lock_init(&qp->hdwq_lock); | |
895427bd | 8898 | } |
67d12733 JS |
8899 | } |
8900 | ||
cdb42bec | 8901 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { |
2d7dbc4c JS |
8902 | if (phba->nvmet_support) { |
8903 | phba->sli4_hba.nvmet_cqset = kcalloc( | |
8904 | phba->cfg_nvmet_mrq, | |
8905 | sizeof(struct lpfc_queue *), | |
8906 | GFP_KERNEL); | |
8907 | if (!phba->sli4_hba.nvmet_cqset) { | |
8908 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8909 | "3121 Fail allocate memory for " | |
8910 | "fast-path CQ set array\n"); | |
8911 | goto out_error; | |
8912 | } | |
8913 | phba->sli4_hba.nvmet_mrq_hdr = kcalloc( | |
8914 | phba->cfg_nvmet_mrq, | |
8915 | sizeof(struct lpfc_queue *), | |
8916 | GFP_KERNEL); | |
8917 | if (!phba->sli4_hba.nvmet_mrq_hdr) { | |
8918 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8919 | "3122 Fail allocate memory for " | |
8920 | "fast-path RQ set hdr array\n"); | |
8921 | goto out_error; | |
8922 | } | |
8923 | phba->sli4_hba.nvmet_mrq_data = kcalloc( | |
8924 | phba->cfg_nvmet_mrq, | |
8925 | sizeof(struct lpfc_queue *), | |
8926 | GFP_KERNEL); | |
8927 | if (!phba->sli4_hba.nvmet_mrq_data) { | |
8928 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8929 | "3124 Fail allocate memory for " | |
8930 | "fast-path RQ set data array\n"); | |
8931 | goto out_error; | |
8932 | } | |
8933 | } | |
da0436e9 | 8934 | } |
67d12733 | 8935 | |
895427bd | 8936 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list); |
67d12733 | 8937 | |
895427bd | 8938 | /* Create HBA Event Queues (EQs) */ |
657add4e JS |
8939 | for_each_present_cpu(cpu) { |
8940 | /* We only want to create 1 EQ per vector, even though | |
8941 | * multiple CPUs might be using that vector. so only | |
8942 | * selects the CPUs that are LPFC_CPU_FIRST_IRQ. | |
6a828b0f | 8943 | */ |
657add4e JS |
8944 | cpup = &phba->sli4_hba.cpu_map[cpu]; |
8945 | if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) | |
6a828b0f | 8946 | continue; |
657add4e JS |
8947 | |
8948 | /* Get a ptr to the Hardware Queue associated with this CPU */ | |
8949 | qp = &phba->sli4_hba.hdwq[cpup->hdwq]; | |
8950 | ||
8951 | /* Allocate an EQ */ | |
81b96eda JS |
8952 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
8953 | phba->sli4_hba.eq_esize, | |
c1a21ebc | 8954 | phba->sli4_hba.eq_ecount, cpu); |
da0436e9 JS |
8955 | if (!qdesc) { |
8956 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
657add4e JS |
8957 | "0497 Failed allocate EQ (%d)\n", |
8958 | cpup->hdwq); | |
67d12733 | 8959 | goto out_error; |
da0436e9 | 8960 | } |
7365f6fd | 8961 | qdesc->qe_valid = 1; |
657add4e | 8962 | qdesc->hdwq = cpup->hdwq; |
3ad348d9 | 8963 | qdesc->chann = cpu; /* First CPU this EQ is affinitized to */ |
32517fc0 | 8964 | qdesc->last_cpu = qdesc->chann; |
657add4e JS |
8965 | |
8966 | /* Save the allocated EQ in the Hardware Queue */ | |
8967 | qp->hba_eq = qdesc; | |
8968 | ||
32517fc0 JS |
8969 | eqi = per_cpu_ptr(phba->sli4_hba.eq_info, qdesc->last_cpu); |
8970 | list_add(&qdesc->cpu_list, &eqi->list); | |
895427bd | 8971 | } |
67d12733 | 8972 | |
657add4e JS |
8973 | /* Now we need to populate the other Hardware Queues, that share |
8974 | * an IRQ vector, with the associated EQ ptr. | |
8975 | */ | |
8976 | for_each_present_cpu(cpu) { | |
8977 | cpup = &phba->sli4_hba.cpu_map[cpu]; | |
8978 | ||
8979 | /* Check for EQ already allocated in previous loop */ | |
8980 | if (cpup->flag & LPFC_CPU_FIRST_IRQ) | |
8981 | continue; | |
8982 | ||
8983 | /* Check for multiple CPUs per hdwq */ | |
8984 | qp = &phba->sli4_hba.hdwq[cpup->hdwq]; | |
8985 | if (qp->hba_eq) | |
8986 | continue; | |
8987 | ||
8988 | /* We need to share an EQ for this hdwq */ | |
8989 | eqcpu = lpfc_find_cpu_handle(phba, cpup->eq, LPFC_FIND_BY_EQ); | |
8990 | eqcpup = &phba->sli4_hba.cpu_map[eqcpu]; | |
8991 | qp->hba_eq = phba->sli4_hba.hdwq[eqcpup->hdwq].hba_eq; | |
8992 | } | |
67d12733 | 8993 | |
cdb42bec | 8994 | /* Allocate SCSI SLI4 CQ/WQs */ |
6a828b0f | 8995 | for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { |
895427bd | 8996 | if (lpfc_alloc_fcp_wq_cq(phba, idx)) |
67d12733 | 8997 | goto out_error; |
6a828b0f | 8998 | } |
da0436e9 | 8999 | |
cdb42bec JS |
9000 | /* Allocate NVME SLI4 CQ/WQs */ |
9001 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
6a828b0f | 9002 | for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { |
cdb42bec JS |
9003 | if (lpfc_alloc_nvme_wq_cq(phba, idx)) |
9004 | goto out_error; | |
6a828b0f | 9005 | } |
67d12733 | 9006 | |
cdb42bec JS |
9007 | if (phba->nvmet_support) { |
9008 | for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) { | |
c1a21ebc JS |
9009 | cpu = lpfc_find_cpu_handle(phba, idx, |
9010 | LPFC_FIND_BY_HDWQ); | |
cdb42bec JS |
9011 | qdesc = lpfc_sli4_queue_alloc( |
9012 | phba, | |
81b96eda JS |
9013 | LPFC_DEFAULT_PAGE_SIZE, |
9014 | phba->sli4_hba.cq_esize, | |
c1a21ebc JS |
9015 | phba->sli4_hba.cq_ecount, |
9016 | cpu); | |
cdb42bec JS |
9017 | if (!qdesc) { |
9018 | lpfc_printf_log( | |
9019 | phba, KERN_ERR, LOG_INIT, | |
9020 | "3142 Failed allocate NVME " | |
9021 | "CQ Set (%d)\n", idx); | |
9022 | goto out_error; | |
9023 | } | |
9024 | qdesc->qe_valid = 1; | |
5e5b511d | 9025 | qdesc->hdwq = idx; |
c1a21ebc | 9026 | qdesc->chann = cpu; |
cdb42bec | 9027 | phba->sli4_hba.nvmet_cqset[idx] = qdesc; |
2d7dbc4c | 9028 | } |
2d7dbc4c JS |
9029 | } |
9030 | } | |
9031 | ||
da0436e9 | 9032 | /* |
67d12733 | 9033 | * Create Slow Path Completion Queues (CQs) |
da0436e9 JS |
9034 | */ |
9035 | ||
c1a21ebc | 9036 | cpu = lpfc_find_cpu_handle(phba, 0, LPFC_FIND_BY_EQ); |
da0436e9 | 9037 | /* Create slow-path Mailbox Command Complete Queue */ |
81b96eda JS |
9038 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
9039 | phba->sli4_hba.cq_esize, | |
c1a21ebc | 9040 | phba->sli4_hba.cq_ecount, cpu); |
da0436e9 JS |
9041 | if (!qdesc) { |
9042 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9043 | "0500 Failed allocate slow-path mailbox CQ\n"); | |
67d12733 | 9044 | goto out_error; |
da0436e9 | 9045 | } |
7365f6fd | 9046 | qdesc->qe_valid = 1; |
da0436e9 JS |
9047 | phba->sli4_hba.mbx_cq = qdesc; |
9048 | ||
9049 | /* Create slow-path ELS Complete Queue */ | |
81b96eda JS |
9050 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
9051 | phba->sli4_hba.cq_esize, | |
c1a21ebc | 9052 | phba->sli4_hba.cq_ecount, cpu); |
da0436e9 JS |
9053 | if (!qdesc) { |
9054 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9055 | "0501 Failed allocate slow-path ELS CQ\n"); | |
67d12733 | 9056 | goto out_error; |
da0436e9 | 9057 | } |
7365f6fd | 9058 | qdesc->qe_valid = 1; |
6a828b0f | 9059 | qdesc->chann = 0; |
da0436e9 JS |
9060 | phba->sli4_hba.els_cq = qdesc; |
9061 | ||
da0436e9 | 9062 | |
5350d872 | 9063 | /* |
67d12733 | 9064 | * Create Slow Path Work Queues (WQs) |
5350d872 | 9065 | */ |
da0436e9 JS |
9066 | |
9067 | /* Create Mailbox Command Queue */ | |
da0436e9 | 9068 | |
81b96eda JS |
9069 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
9070 | phba->sli4_hba.mq_esize, | |
c1a21ebc | 9071 | phba->sli4_hba.mq_ecount, cpu); |
da0436e9 JS |
9072 | if (!qdesc) { |
9073 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9074 | "0505 Failed allocate slow-path MQ\n"); | |
67d12733 | 9075 | goto out_error; |
da0436e9 | 9076 | } |
6a828b0f | 9077 | qdesc->chann = 0; |
da0436e9 JS |
9078 | phba->sli4_hba.mbx_wq = qdesc; |
9079 | ||
9080 | /* | |
67d12733 | 9081 | * Create ELS Work Queues |
da0436e9 | 9082 | */ |
da0436e9 JS |
9083 | |
9084 | /* Create slow-path ELS Work Queue */ | |
81b96eda JS |
9085 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
9086 | phba->sli4_hba.wq_esize, | |
c1a21ebc | 9087 | phba->sli4_hba.wq_ecount, cpu); |
da0436e9 JS |
9088 | if (!qdesc) { |
9089 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9090 | "0504 Failed allocate slow-path ELS WQ\n"); | |
67d12733 | 9091 | goto out_error; |
da0436e9 | 9092 | } |
6a828b0f | 9093 | qdesc->chann = 0; |
da0436e9 | 9094 | phba->sli4_hba.els_wq = qdesc; |
895427bd JS |
9095 | list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); |
9096 | ||
9097 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
9098 | /* Create NVME LS Complete Queue */ | |
81b96eda JS |
9099 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
9100 | phba->sli4_hba.cq_esize, | |
c1a21ebc | 9101 | phba->sli4_hba.cq_ecount, cpu); |
895427bd JS |
9102 | if (!qdesc) { |
9103 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9104 | "6079 Failed allocate NVME LS CQ\n"); | |
9105 | goto out_error; | |
9106 | } | |
6a828b0f | 9107 | qdesc->chann = 0; |
7365f6fd | 9108 | qdesc->qe_valid = 1; |
895427bd JS |
9109 | phba->sli4_hba.nvmels_cq = qdesc; |
9110 | ||
9111 | /* Create NVME LS Work Queue */ | |
81b96eda JS |
9112 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
9113 | phba->sli4_hba.wq_esize, | |
c1a21ebc | 9114 | phba->sli4_hba.wq_ecount, cpu); |
895427bd JS |
9115 | if (!qdesc) { |
9116 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9117 | "6080 Failed allocate NVME LS WQ\n"); | |
9118 | goto out_error; | |
9119 | } | |
6a828b0f | 9120 | qdesc->chann = 0; |
895427bd JS |
9121 | phba->sli4_hba.nvmels_wq = qdesc; |
9122 | list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); | |
9123 | } | |
da0436e9 | 9124 | |
da0436e9 JS |
9125 | /* |
9126 | * Create Receive Queue (RQ) | |
9127 | */ | |
da0436e9 JS |
9128 | |
9129 | /* Create Receive Queue for header */ | |
81b96eda JS |
9130 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
9131 | phba->sli4_hba.rq_esize, | |
c1a21ebc | 9132 | phba->sli4_hba.rq_ecount, cpu); |
da0436e9 JS |
9133 | if (!qdesc) { |
9134 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9135 | "0506 Failed allocate receive HRQ\n"); | |
67d12733 | 9136 | goto out_error; |
da0436e9 JS |
9137 | } |
9138 | phba->sli4_hba.hdr_rq = qdesc; | |
9139 | ||
9140 | /* Create Receive Queue for data */ | |
81b96eda JS |
9141 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
9142 | phba->sli4_hba.rq_esize, | |
c1a21ebc | 9143 | phba->sli4_hba.rq_ecount, cpu); |
da0436e9 JS |
9144 | if (!qdesc) { |
9145 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9146 | "0507 Failed allocate receive DRQ\n"); | |
67d12733 | 9147 | goto out_error; |
da0436e9 JS |
9148 | } |
9149 | phba->sli4_hba.dat_rq = qdesc; | |
9150 | ||
cdb42bec JS |
9151 | if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) && |
9152 | phba->nvmet_support) { | |
2d7dbc4c | 9153 | for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) { |
c1a21ebc JS |
9154 | cpu = lpfc_find_cpu_handle(phba, idx, |
9155 | LPFC_FIND_BY_HDWQ); | |
2d7dbc4c JS |
9156 | /* Create NVMET Receive Queue for header */ |
9157 | qdesc = lpfc_sli4_queue_alloc(phba, | |
81b96eda | 9158 | LPFC_DEFAULT_PAGE_SIZE, |
2d7dbc4c | 9159 | phba->sli4_hba.rq_esize, |
c1a21ebc JS |
9160 | LPFC_NVMET_RQE_DEF_COUNT, |
9161 | cpu); | |
2d7dbc4c JS |
9162 | if (!qdesc) { |
9163 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9164 | "3146 Failed allocate " | |
9165 | "receive HRQ\n"); | |
9166 | goto out_error; | |
9167 | } | |
5e5b511d | 9168 | qdesc->hdwq = idx; |
2d7dbc4c JS |
9169 | phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc; |
9170 | ||
9171 | /* Only needed for header of RQ pair */ | |
c1a21ebc JS |
9172 | qdesc->rqbp = kzalloc_node(sizeof(*qdesc->rqbp), |
9173 | GFP_KERNEL, | |
9174 | cpu_to_node(cpu)); | |
2d7dbc4c JS |
9175 | if (qdesc->rqbp == NULL) { |
9176 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9177 | "6131 Failed allocate " | |
9178 | "Header RQBP\n"); | |
9179 | goto out_error; | |
9180 | } | |
9181 | ||
4b40d02b DK |
9182 | /* Put list in known state in case driver load fails. */ |
9183 | INIT_LIST_HEAD(&qdesc->rqbp->rqb_buffer_list); | |
9184 | ||
2d7dbc4c JS |
9185 | /* Create NVMET Receive Queue for data */ |
9186 | qdesc = lpfc_sli4_queue_alloc(phba, | |
81b96eda | 9187 | LPFC_DEFAULT_PAGE_SIZE, |
2d7dbc4c | 9188 | phba->sli4_hba.rq_esize, |
c1a21ebc JS |
9189 | LPFC_NVMET_RQE_DEF_COUNT, |
9190 | cpu); | |
2d7dbc4c JS |
9191 | if (!qdesc) { |
9192 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9193 | "3156 Failed allocate " | |
9194 | "receive DRQ\n"); | |
9195 | goto out_error; | |
9196 | } | |
5e5b511d | 9197 | qdesc->hdwq = idx; |
2d7dbc4c JS |
9198 | phba->sli4_hba.nvmet_mrq_data[idx] = qdesc; |
9199 | } | |
9200 | } | |
9201 | ||
4c47efc1 JS |
9202 | #if defined(BUILD_NVME) |
9203 | /* Clear NVME stats */ | |
9204 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
9205 | for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { | |
9206 | memset(&phba->sli4_hba.hdwq[idx].nvme_cstat, 0, | |
9207 | sizeof(phba->sli4_hba.hdwq[idx].nvme_cstat)); | |
9208 | } | |
9209 | } | |
9210 | #endif | |
9211 | ||
9212 | /* Clear SCSI stats */ | |
9213 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) { | |
9214 | for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { | |
9215 | memset(&phba->sli4_hba.hdwq[idx].scsi_cstat, 0, | |
9216 | sizeof(phba->sli4_hba.hdwq[idx].scsi_cstat)); | |
9217 | } | |
9218 | } | |
9219 | ||
da0436e9 JS |
9220 | return 0; |
9221 | ||
da0436e9 | 9222 | out_error: |
67d12733 | 9223 | lpfc_sli4_queue_destroy(phba); |
da0436e9 JS |
9224 | return -ENOMEM; |
9225 | } | |
9226 | ||
895427bd JS |
9227 | static inline void |
9228 | __lpfc_sli4_release_queue(struct lpfc_queue **qp) | |
9229 | { | |
9230 | if (*qp != NULL) { | |
9231 | lpfc_sli4_queue_free(*qp); | |
9232 | *qp = NULL; | |
9233 | } | |
9234 | } | |
9235 | ||
9236 | static inline void | |
9237 | lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max) | |
9238 | { | |
9239 | int idx; | |
9240 | ||
9241 | if (*qs == NULL) | |
9242 | return; | |
9243 | ||
9244 | for (idx = 0; idx < max; idx++) | |
9245 | __lpfc_sli4_release_queue(&(*qs)[idx]); | |
9246 | ||
9247 | kfree(*qs); | |
9248 | *qs = NULL; | |
9249 | } | |
9250 | ||
9251 | static inline void | |
6a828b0f | 9252 | lpfc_sli4_release_hdwq(struct lpfc_hba *phba) |
895427bd | 9253 | { |
6a828b0f | 9254 | struct lpfc_sli4_hdw_queue *hdwq; |
657add4e | 9255 | struct lpfc_queue *eq; |
cdb42bec JS |
9256 | uint32_t idx; |
9257 | ||
6a828b0f | 9258 | hdwq = phba->sli4_hba.hdwq; |
6a828b0f | 9259 | |
657add4e JS |
9260 | /* Loop thru all Hardware Queues */ |
9261 | for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { | |
9262 | /* Free the CQ/WQ corresponding to the Hardware Queue */ | |
cdb42bec JS |
9263 | lpfc_sli4_queue_free(hdwq[idx].fcp_cq); |
9264 | lpfc_sli4_queue_free(hdwq[idx].nvme_cq); | |
9265 | lpfc_sli4_queue_free(hdwq[idx].fcp_wq); | |
9266 | lpfc_sli4_queue_free(hdwq[idx].nvme_wq); | |
657add4e | 9267 | hdwq[idx].hba_eq = NULL; |
cdb42bec JS |
9268 | hdwq[idx].fcp_cq = NULL; |
9269 | hdwq[idx].nvme_cq = NULL; | |
9270 | hdwq[idx].fcp_wq = NULL; | |
9271 | hdwq[idx].nvme_wq = NULL; | |
d79c9e9d JS |
9272 | if (phba->cfg_xpsgl && !phba->nvmet_support) |
9273 | lpfc_free_sgl_per_hdwq(phba, &hdwq[idx]); | |
9274 | lpfc_free_cmd_rsp_buf_per_hdwq(phba, &hdwq[idx]); | |
895427bd | 9275 | } |
657add4e JS |
9276 | /* Loop thru all IRQ vectors */ |
9277 | for (idx = 0; idx < phba->cfg_irq_chann; idx++) { | |
9278 | /* Free the EQ corresponding to the IRQ vector */ | |
9279 | eq = phba->sli4_hba.hba_eq_hdl[idx].eq; | |
9280 | lpfc_sli4_queue_free(eq); | |
9281 | phba->sli4_hba.hba_eq_hdl[idx].eq = NULL; | |
9282 | } | |
895427bd JS |
9283 | } |
9284 | ||
da0436e9 JS |
9285 | /** |
9286 | * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues | |
9287 | * @phba: pointer to lpfc hba data structure. | |
9288 | * | |
9289 | * This routine is invoked to release all the SLI4 queues with the FCoE HBA | |
9290 | * operation. | |
9291 | * | |
9292 | * Return codes | |
af901ca1 | 9293 | * 0 - successful |
25985edc | 9294 | * -ENOMEM - No available memory |
d439d286 | 9295 | * -EIO - The mailbox failed to complete successfully. |
da0436e9 | 9296 | **/ |
5350d872 | 9297 | void |
da0436e9 JS |
9298 | lpfc_sli4_queue_destroy(struct lpfc_hba *phba) |
9299 | { | |
4645f7b5 JS |
9300 | /* |
9301 | * Set FREE_INIT before beginning to free the queues. | |
9302 | * Wait until the users of queues to acknowledge to | |
9303 | * release queues by clearing FREE_WAIT. | |
9304 | */ | |
9305 | spin_lock_irq(&phba->hbalock); | |
9306 | phba->sli.sli_flag |= LPFC_QUEUE_FREE_INIT; | |
9307 | while (phba->sli.sli_flag & LPFC_QUEUE_FREE_WAIT) { | |
9308 | spin_unlock_irq(&phba->hbalock); | |
9309 | msleep(20); | |
9310 | spin_lock_irq(&phba->hbalock); | |
9311 | } | |
9312 | spin_unlock_irq(&phba->hbalock); | |
9313 | ||
895427bd | 9314 | /* Release HBA eqs */ |
cdb42bec | 9315 | if (phba->sli4_hba.hdwq) |
6a828b0f | 9316 | lpfc_sli4_release_hdwq(phba); |
895427bd | 9317 | |
bcb24f65 JS |
9318 | if (phba->nvmet_support) { |
9319 | lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset, | |
9320 | phba->cfg_nvmet_mrq); | |
2d7dbc4c | 9321 | |
bcb24f65 JS |
9322 | lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr, |
9323 | phba->cfg_nvmet_mrq); | |
9324 | lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data, | |
9325 | phba->cfg_nvmet_mrq); | |
9326 | } | |
2d7dbc4c | 9327 | |
895427bd JS |
9328 | /* Release mailbox command work queue */ |
9329 | __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq); | |
9330 | ||
9331 | /* Release ELS work queue */ | |
9332 | __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq); | |
9333 | ||
9334 | /* Release ELS work queue */ | |
9335 | __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq); | |
9336 | ||
9337 | /* Release unsolicited receive queue */ | |
9338 | __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq); | |
9339 | __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq); | |
9340 | ||
9341 | /* Release ELS complete queue */ | |
9342 | __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq); | |
9343 | ||
9344 | /* Release NVME LS complete queue */ | |
9345 | __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq); | |
9346 | ||
9347 | /* Release mailbox command complete queue */ | |
9348 | __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq); | |
9349 | ||
9350 | /* Everything on this list has been freed */ | |
9351 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list); | |
4645f7b5 JS |
9352 | |
9353 | /* Done with freeing the queues */ | |
9354 | spin_lock_irq(&phba->hbalock); | |
9355 | phba->sli.sli_flag &= ~LPFC_QUEUE_FREE_INIT; | |
9356 | spin_unlock_irq(&phba->hbalock); | |
895427bd JS |
9357 | } |
9358 | ||
895427bd JS |
9359 | int |
9360 | lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq) | |
9361 | { | |
9362 | struct lpfc_rqb *rqbp; | |
9363 | struct lpfc_dmabuf *h_buf; | |
9364 | struct rqb_dmabuf *rqb_buffer; | |
9365 | ||
9366 | rqbp = rq->rqbp; | |
9367 | while (!list_empty(&rqbp->rqb_buffer_list)) { | |
9368 | list_remove_head(&rqbp->rqb_buffer_list, h_buf, | |
9369 | struct lpfc_dmabuf, list); | |
9370 | ||
9371 | rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf); | |
9372 | (rqbp->rqb_free_buffer)(phba, rqb_buffer); | |
9373 | rqbp->buffer_count--; | |
67d12733 | 9374 | } |
895427bd JS |
9375 | return 1; |
9376 | } | |
67d12733 | 9377 | |
895427bd JS |
9378 | static int |
9379 | lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq, | |
9380 | struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map, | |
9381 | int qidx, uint32_t qtype) | |
9382 | { | |
9383 | struct lpfc_sli_ring *pring; | |
9384 | int rc; | |
9385 | ||
9386 | if (!eq || !cq || !wq) { | |
9387 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9388 | "6085 Fast-path %s (%d) not allocated\n", | |
9389 | ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx); | |
9390 | return -ENOMEM; | |
9391 | } | |
9392 | ||
9393 | /* create the Cq first */ | |
9394 | rc = lpfc_cq_create(phba, cq, eq, | |
9395 | (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype); | |
9396 | if (rc) { | |
9397 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9398 | "6086 Failed setup of CQ (%d), rc = 0x%x\n", | |
9399 | qidx, (uint32_t)rc); | |
9400 | return rc; | |
67d12733 JS |
9401 | } |
9402 | ||
895427bd | 9403 | if (qtype != LPFC_MBOX) { |
cdb42bec | 9404 | /* Setup cq_map for fast lookup */ |
895427bd JS |
9405 | if (cq_map) |
9406 | *cq_map = cq->queue_id; | |
da0436e9 | 9407 | |
895427bd JS |
9408 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
9409 | "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n", | |
9410 | qidx, cq->queue_id, qidx, eq->queue_id); | |
da0436e9 | 9411 | |
895427bd JS |
9412 | /* create the wq */ |
9413 | rc = lpfc_wq_create(phba, wq, cq, qtype); | |
9414 | if (rc) { | |
9415 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
c835c085 | 9416 | "4618 Fail setup fastpath WQ (%d), rc = 0x%x\n", |
895427bd JS |
9417 | qidx, (uint32_t)rc); |
9418 | /* no need to tear down cq - caller will do so */ | |
9419 | return rc; | |
9420 | } | |
da0436e9 | 9421 | |
895427bd JS |
9422 | /* Bind this CQ/WQ to the NVME ring */ |
9423 | pring = wq->pring; | |
9424 | pring->sli.sli4.wqp = (void *)wq; | |
9425 | cq->pring = pring; | |
da0436e9 | 9426 | |
895427bd JS |
9427 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
9428 | "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n", | |
9429 | qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id); | |
9430 | } else { | |
9431 | rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX); | |
9432 | if (rc) { | |
9433 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9434 | "0539 Failed setup of slow-path MQ: " | |
9435 | "rc = 0x%x\n", rc); | |
9436 | /* no need to tear down cq - caller will do so */ | |
9437 | return rc; | |
9438 | } | |
da0436e9 | 9439 | |
895427bd JS |
9440 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
9441 | "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n", | |
9442 | phba->sli4_hba.mbx_wq->queue_id, | |
9443 | phba->sli4_hba.mbx_cq->queue_id); | |
67d12733 | 9444 | } |
da0436e9 | 9445 | |
895427bd | 9446 | return 0; |
da0436e9 JS |
9447 | } |
9448 | ||
6a828b0f JS |
9449 | /** |
9450 | * lpfc_setup_cq_lookup - Setup the CQ lookup table | |
9451 | * @phba: pointer to lpfc hba data structure. | |
9452 | * | |
9453 | * This routine will populate the cq_lookup table by all | |
9454 | * available CQ queue_id's. | |
9455 | **/ | |
3999df75 | 9456 | static void |
6a828b0f JS |
9457 | lpfc_setup_cq_lookup(struct lpfc_hba *phba) |
9458 | { | |
9459 | struct lpfc_queue *eq, *childq; | |
6a828b0f JS |
9460 | int qidx; |
9461 | ||
6a828b0f JS |
9462 | memset(phba->sli4_hba.cq_lookup, 0, |
9463 | (sizeof(struct lpfc_queue *) * (phba->sli4_hba.cq_max + 1))); | |
657add4e | 9464 | /* Loop thru all IRQ vectors */ |
6a828b0f | 9465 | for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { |
657add4e JS |
9466 | /* Get the EQ corresponding to the IRQ vector */ |
9467 | eq = phba->sli4_hba.hba_eq_hdl[qidx].eq; | |
6a828b0f JS |
9468 | if (!eq) |
9469 | continue; | |
657add4e | 9470 | /* Loop through all CQs associated with that EQ */ |
6a828b0f JS |
9471 | list_for_each_entry(childq, &eq->child_list, list) { |
9472 | if (childq->queue_id > phba->sli4_hba.cq_max) | |
9473 | continue; | |
9474 | if ((childq->subtype == LPFC_FCP) || | |
9475 | (childq->subtype == LPFC_NVME)) | |
9476 | phba->sli4_hba.cq_lookup[childq->queue_id] = | |
9477 | childq; | |
9478 | } | |
9479 | } | |
9480 | } | |
9481 | ||
da0436e9 JS |
9482 | /** |
9483 | * lpfc_sli4_queue_setup - Set up all the SLI4 queues | |
9484 | * @phba: pointer to lpfc hba data structure. | |
9485 | * | |
9486 | * This routine is invoked to set up all the SLI4 queues for the FCoE HBA | |
9487 | * operation. | |
9488 | * | |
9489 | * Return codes | |
af901ca1 | 9490 | * 0 - successful |
25985edc | 9491 | * -ENOMEM - No available memory |
d439d286 | 9492 | * -EIO - The mailbox failed to complete successfully. |
da0436e9 JS |
9493 | **/ |
9494 | int | |
9495 | lpfc_sli4_queue_setup(struct lpfc_hba *phba) | |
9496 | { | |
962bc51b JS |
9497 | uint32_t shdr_status, shdr_add_status; |
9498 | union lpfc_sli4_cfg_shdr *shdr; | |
657add4e | 9499 | struct lpfc_vector_map_info *cpup; |
cdb42bec | 9500 | struct lpfc_sli4_hdw_queue *qp; |
962bc51b | 9501 | LPFC_MBOXQ_t *mboxq; |
657add4e | 9502 | int qidx, cpu; |
cb733e35 | 9503 | uint32_t length, usdelay; |
895427bd | 9504 | int rc = -ENOMEM; |
962bc51b JS |
9505 | |
9506 | /* Check for dual-ULP support */ | |
9507 | mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); | |
9508 | if (!mboxq) { | |
9509 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9510 | "3249 Unable to allocate memory for " | |
9511 | "QUERY_FW_CFG mailbox command\n"); | |
9512 | return -ENOMEM; | |
9513 | } | |
9514 | length = (sizeof(struct lpfc_mbx_query_fw_config) - | |
9515 | sizeof(struct lpfc_sli4_cfg_mhdr)); | |
9516 | lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, | |
9517 | LPFC_MBOX_OPCODE_QUERY_FW_CFG, | |
9518 | length, LPFC_SLI4_MBX_EMBED); | |
9519 | ||
9520 | rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
9521 | ||
9522 | shdr = (union lpfc_sli4_cfg_shdr *) | |
9523 | &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; | |
9524 | shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); | |
9525 | shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response); | |
9526 | if (shdr_status || shdr_add_status || rc) { | |
9527 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9528 | "3250 QUERY_FW_CFG mailbox failed with status " | |
9529 | "x%x add_status x%x, mbx status x%x\n", | |
9530 | shdr_status, shdr_add_status, rc); | |
9531 | if (rc != MBX_TIMEOUT) | |
9532 | mempool_free(mboxq, phba->mbox_mem_pool); | |
9533 | rc = -ENXIO; | |
9534 | goto out_error; | |
9535 | } | |
9536 | ||
9537 | phba->sli4_hba.fw_func_mode = | |
9538 | mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode; | |
9539 | phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode; | |
9540 | phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode; | |
8b017a30 JS |
9541 | phba->sli4_hba.physical_port = |
9542 | mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port; | |
962bc51b JS |
9543 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
9544 | "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, " | |
9545 | "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode, | |
9546 | phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode); | |
9547 | ||
9548 | if (rc != MBX_TIMEOUT) | |
9549 | mempool_free(mboxq, phba->mbox_mem_pool); | |
da0436e9 JS |
9550 | |
9551 | /* | |
67d12733 | 9552 | * Set up HBA Event Queues (EQs) |
da0436e9 | 9553 | */ |
cdb42bec | 9554 | qp = phba->sli4_hba.hdwq; |
da0436e9 | 9555 | |
67d12733 | 9556 | /* Set up HBA event queue */ |
cdb42bec | 9557 | if (!qp) { |
2e90f4b5 JS |
9558 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
9559 | "3147 Fast-path EQs not allocated\n"); | |
1b51197d | 9560 | rc = -ENOMEM; |
67d12733 | 9561 | goto out_error; |
2e90f4b5 | 9562 | } |
657add4e JS |
9563 | |
9564 | /* Loop thru all IRQ vectors */ | |
6a828b0f | 9565 | for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { |
657add4e JS |
9566 | /* Create HBA Event Queues (EQs) in order */ |
9567 | for_each_present_cpu(cpu) { | |
9568 | cpup = &phba->sli4_hba.cpu_map[cpu]; | |
9569 | ||
9570 | /* Look for the CPU thats using that vector with | |
9571 | * LPFC_CPU_FIRST_IRQ set. | |
9572 | */ | |
9573 | if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) | |
9574 | continue; | |
9575 | if (qidx != cpup->eq) | |
9576 | continue; | |
9577 | ||
9578 | /* Create an EQ for that vector */ | |
9579 | rc = lpfc_eq_create(phba, qp[cpup->hdwq].hba_eq, | |
9580 | phba->cfg_fcp_imax); | |
9581 | if (rc) { | |
9582 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9583 | "0523 Failed setup of fast-path" | |
9584 | " EQ (%d), rc = 0x%x\n", | |
9585 | cpup->eq, (uint32_t)rc); | |
9586 | goto out_destroy; | |
9587 | } | |
9588 | ||
9589 | /* Save the EQ for that vector in the hba_eq_hdl */ | |
9590 | phba->sli4_hba.hba_eq_hdl[cpup->eq].eq = | |
9591 | qp[cpup->hdwq].hba_eq; | |
9592 | ||
9593 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
9594 | "2584 HBA EQ setup: queue[%d]-id=%d\n", | |
9595 | cpup->eq, | |
9596 | qp[cpup->hdwq].hba_eq->queue_id); | |
da0436e9 | 9597 | } |
67d12733 JS |
9598 | } |
9599 | ||
657add4e | 9600 | /* Loop thru all Hardware Queues */ |
cdb42bec JS |
9601 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { |
9602 | for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { | |
657add4e JS |
9603 | cpu = lpfc_find_cpu_handle(phba, qidx, |
9604 | LPFC_FIND_BY_HDWQ); | |
9605 | cpup = &phba->sli4_hba.cpu_map[cpu]; | |
9606 | ||
9607 | /* Create the CQ/WQ corresponding to the | |
9608 | * Hardware Queue | |
9609 | */ | |
895427bd | 9610 | rc = lpfc_create_wq_cq(phba, |
657add4e | 9611 | phba->sli4_hba.hdwq[cpup->hdwq].hba_eq, |
cdb42bec JS |
9612 | qp[qidx].nvme_cq, |
9613 | qp[qidx].nvme_wq, | |
9614 | &phba->sli4_hba.hdwq[qidx].nvme_cq_map, | |
895427bd JS |
9615 | qidx, LPFC_NVME); |
9616 | if (rc) { | |
9617 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9618 | "6123 Failed to setup fastpath " | |
9619 | "NVME WQ/CQ (%d), rc = 0x%x\n", | |
9620 | qidx, (uint32_t)rc); | |
9621 | goto out_destroy; | |
9622 | } | |
9623 | } | |
67d12733 JS |
9624 | } |
9625 | ||
cdb42bec | 9626 | for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { |
657add4e JS |
9627 | cpu = lpfc_find_cpu_handle(phba, qidx, LPFC_FIND_BY_HDWQ); |
9628 | cpup = &phba->sli4_hba.cpu_map[cpu]; | |
9629 | ||
9630 | /* Create the CQ/WQ corresponding to the Hardware Queue */ | |
cdb42bec | 9631 | rc = lpfc_create_wq_cq(phba, |
657add4e | 9632 | phba->sli4_hba.hdwq[cpup->hdwq].hba_eq, |
cdb42bec JS |
9633 | qp[qidx].fcp_cq, |
9634 | qp[qidx].fcp_wq, | |
9635 | &phba->sli4_hba.hdwq[qidx].fcp_cq_map, | |
9636 | qidx, LPFC_FCP); | |
9637 | if (rc) { | |
67d12733 | 9638 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
895427bd JS |
9639 | "0535 Failed to setup fastpath " |
9640 | "FCP WQ/CQ (%d), rc = 0x%x\n", | |
9641 | qidx, (uint32_t)rc); | |
cdb42bec | 9642 | goto out_destroy; |
895427bd | 9643 | } |
67d12733 | 9644 | } |
895427bd | 9645 | |
da0436e9 | 9646 | /* |
895427bd | 9647 | * Set up Slow Path Complete Queues (CQs) |
da0436e9 JS |
9648 | */ |
9649 | ||
895427bd | 9650 | /* Set up slow-path MBOX CQ/MQ */ |
da0436e9 | 9651 | |
895427bd | 9652 | if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) { |
da0436e9 | 9653 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
895427bd JS |
9654 | "0528 %s not allocated\n", |
9655 | phba->sli4_hba.mbx_cq ? | |
d1f525aa | 9656 | "Mailbox WQ" : "Mailbox CQ"); |
1b51197d | 9657 | rc = -ENOMEM; |
895427bd | 9658 | goto out_destroy; |
da0436e9 | 9659 | } |
da0436e9 | 9660 | |
cdb42bec | 9661 | rc = lpfc_create_wq_cq(phba, qp[0].hba_eq, |
d1f525aa JS |
9662 | phba->sli4_hba.mbx_cq, |
9663 | phba->sli4_hba.mbx_wq, | |
9664 | NULL, 0, LPFC_MBOX); | |
da0436e9 JS |
9665 | if (rc) { |
9666 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
895427bd JS |
9667 | "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n", |
9668 | (uint32_t)rc); | |
9669 | goto out_destroy; | |
da0436e9 | 9670 | } |
2d7dbc4c JS |
9671 | if (phba->nvmet_support) { |
9672 | if (!phba->sli4_hba.nvmet_cqset) { | |
9673 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9674 | "3165 Fast-path NVME CQ Set " | |
9675 | "array not allocated\n"); | |
9676 | rc = -ENOMEM; | |
9677 | goto out_destroy; | |
9678 | } | |
9679 | if (phba->cfg_nvmet_mrq > 1) { | |
9680 | rc = lpfc_cq_create_set(phba, | |
9681 | phba->sli4_hba.nvmet_cqset, | |
cdb42bec | 9682 | qp, |
2d7dbc4c JS |
9683 | LPFC_WCQ, LPFC_NVMET); |
9684 | if (rc) { | |
9685 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9686 | "3164 Failed setup of NVME CQ " | |
9687 | "Set, rc = 0x%x\n", | |
9688 | (uint32_t)rc); | |
9689 | goto out_destroy; | |
9690 | } | |
9691 | } else { | |
9692 | /* Set up NVMET Receive Complete Queue */ | |
9693 | rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0], | |
cdb42bec | 9694 | qp[0].hba_eq, |
2d7dbc4c JS |
9695 | LPFC_WCQ, LPFC_NVMET); |
9696 | if (rc) { | |
9697 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9698 | "6089 Failed setup NVMET CQ: " | |
9699 | "rc = 0x%x\n", (uint32_t)rc); | |
9700 | goto out_destroy; | |
9701 | } | |
81b96eda JS |
9702 | phba->sli4_hba.nvmet_cqset[0]->chann = 0; |
9703 | ||
2d7dbc4c JS |
9704 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
9705 | "6090 NVMET CQ setup: cq-id=%d, " | |
9706 | "parent eq-id=%d\n", | |
9707 | phba->sli4_hba.nvmet_cqset[0]->queue_id, | |
cdb42bec | 9708 | qp[0].hba_eq->queue_id); |
2d7dbc4c JS |
9709 | } |
9710 | } | |
da0436e9 | 9711 | |
895427bd JS |
9712 | /* Set up slow-path ELS WQ/CQ */ |
9713 | if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) { | |
da0436e9 | 9714 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
895427bd JS |
9715 | "0530 ELS %s not allocated\n", |
9716 | phba->sli4_hba.els_cq ? "WQ" : "CQ"); | |
1b51197d | 9717 | rc = -ENOMEM; |
895427bd | 9718 | goto out_destroy; |
da0436e9 | 9719 | } |
cdb42bec JS |
9720 | rc = lpfc_create_wq_cq(phba, qp[0].hba_eq, |
9721 | phba->sli4_hba.els_cq, | |
9722 | phba->sli4_hba.els_wq, | |
9723 | NULL, 0, LPFC_ELS); | |
da0436e9 JS |
9724 | if (rc) { |
9725 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
cdb42bec JS |
9726 | "0525 Failed setup of ELS WQ/CQ: rc = 0x%x\n", |
9727 | (uint32_t)rc); | |
895427bd | 9728 | goto out_destroy; |
da0436e9 JS |
9729 | } |
9730 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
9731 | "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n", | |
9732 | phba->sli4_hba.els_wq->queue_id, | |
9733 | phba->sli4_hba.els_cq->queue_id); | |
9734 | ||
cdb42bec | 9735 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { |
895427bd JS |
9736 | /* Set up NVME LS Complete Queue */ |
9737 | if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) { | |
9738 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9739 | "6091 LS %s not allocated\n", | |
9740 | phba->sli4_hba.nvmels_cq ? "WQ" : "CQ"); | |
9741 | rc = -ENOMEM; | |
9742 | goto out_destroy; | |
9743 | } | |
cdb42bec JS |
9744 | rc = lpfc_create_wq_cq(phba, qp[0].hba_eq, |
9745 | phba->sli4_hba.nvmels_cq, | |
9746 | phba->sli4_hba.nvmels_wq, | |
9747 | NULL, 0, LPFC_NVME_LS); | |
895427bd JS |
9748 | if (rc) { |
9749 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
cdb42bec JS |
9750 | "0526 Failed setup of NVVME LS WQ/CQ: " |
9751 | "rc = 0x%x\n", (uint32_t)rc); | |
895427bd JS |
9752 | goto out_destroy; |
9753 | } | |
9754 | ||
9755 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
9756 | "6096 ELS WQ setup: wq-id=%d, " | |
9757 | "parent cq-id=%d\n", | |
9758 | phba->sli4_hba.nvmels_wq->queue_id, | |
9759 | phba->sli4_hba.nvmels_cq->queue_id); | |
9760 | } | |
9761 | ||
2d7dbc4c JS |
9762 | /* |
9763 | * Create NVMET Receive Queue (RQ) | |
9764 | */ | |
9765 | if (phba->nvmet_support) { | |
9766 | if ((!phba->sli4_hba.nvmet_cqset) || | |
9767 | (!phba->sli4_hba.nvmet_mrq_hdr) || | |
9768 | (!phba->sli4_hba.nvmet_mrq_data)) { | |
9769 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9770 | "6130 MRQ CQ Queues not " | |
9771 | "allocated\n"); | |
9772 | rc = -ENOMEM; | |
9773 | goto out_destroy; | |
9774 | } | |
9775 | if (phba->cfg_nvmet_mrq > 1) { | |
9776 | rc = lpfc_mrq_create(phba, | |
9777 | phba->sli4_hba.nvmet_mrq_hdr, | |
9778 | phba->sli4_hba.nvmet_mrq_data, | |
9779 | phba->sli4_hba.nvmet_cqset, | |
9780 | LPFC_NVMET); | |
9781 | if (rc) { | |
9782 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9783 | "6098 Failed setup of NVMET " | |
9784 | "MRQ: rc = 0x%x\n", | |
9785 | (uint32_t)rc); | |
9786 | goto out_destroy; | |
9787 | } | |
9788 | ||
9789 | } else { | |
9790 | rc = lpfc_rq_create(phba, | |
9791 | phba->sli4_hba.nvmet_mrq_hdr[0], | |
9792 | phba->sli4_hba.nvmet_mrq_data[0], | |
9793 | phba->sli4_hba.nvmet_cqset[0], | |
9794 | LPFC_NVMET); | |
9795 | if (rc) { | |
9796 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9797 | "6057 Failed setup of NVMET " | |
9798 | "Receive Queue: rc = 0x%x\n", | |
9799 | (uint32_t)rc); | |
9800 | goto out_destroy; | |
9801 | } | |
9802 | ||
9803 | lpfc_printf_log( | |
9804 | phba, KERN_INFO, LOG_INIT, | |
9805 | "6099 NVMET RQ setup: hdr-rq-id=%d, " | |
9806 | "dat-rq-id=%d parent cq-id=%d\n", | |
9807 | phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id, | |
9808 | phba->sli4_hba.nvmet_mrq_data[0]->queue_id, | |
9809 | phba->sli4_hba.nvmet_cqset[0]->queue_id); | |
9810 | ||
9811 | } | |
9812 | } | |
9813 | ||
da0436e9 JS |
9814 | if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) { |
9815 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9816 | "0540 Receive Queue not allocated\n"); | |
1b51197d | 9817 | rc = -ENOMEM; |
895427bd | 9818 | goto out_destroy; |
da0436e9 | 9819 | } |
73d91e50 | 9820 | |
da0436e9 | 9821 | rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq, |
4d9ab994 | 9822 | phba->sli4_hba.els_cq, LPFC_USOL); |
da0436e9 JS |
9823 | if (rc) { |
9824 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9825 | "0541 Failed setup of Receive Queue: " | |
a2fc4aef | 9826 | "rc = 0x%x\n", (uint32_t)rc); |
895427bd | 9827 | goto out_destroy; |
da0436e9 | 9828 | } |
73d91e50 | 9829 | |
da0436e9 JS |
9830 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
9831 | "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d " | |
9832 | "parent cq-id=%d\n", | |
9833 | phba->sli4_hba.hdr_rq->queue_id, | |
9834 | phba->sli4_hba.dat_rq->queue_id, | |
4d9ab994 | 9835 | phba->sli4_hba.els_cq->queue_id); |
1ba981fd | 9836 | |
cb733e35 JS |
9837 | if (phba->cfg_fcp_imax) |
9838 | usdelay = LPFC_SEC_TO_USEC / phba->cfg_fcp_imax; | |
9839 | else | |
9840 | usdelay = 0; | |
9841 | ||
6a828b0f | 9842 | for (qidx = 0; qidx < phba->cfg_irq_chann; |
cdb42bec | 9843 | qidx += LPFC_MAX_EQ_DELAY_EQID_CNT) |
0cf07f84 | 9844 | lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT, |
cb733e35 | 9845 | usdelay); |
43140ca6 | 9846 | |
6a828b0f JS |
9847 | if (phba->sli4_hba.cq_max) { |
9848 | kfree(phba->sli4_hba.cq_lookup); | |
9849 | phba->sli4_hba.cq_lookup = kcalloc((phba->sli4_hba.cq_max + 1), | |
9850 | sizeof(struct lpfc_queue *), GFP_KERNEL); | |
9851 | if (!phba->sli4_hba.cq_lookup) { | |
1ba981fd | 9852 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
6a828b0f JS |
9853 | "0549 Failed setup of CQ Lookup table: " |
9854 | "size 0x%x\n", phba->sli4_hba.cq_max); | |
fad28e3d | 9855 | rc = -ENOMEM; |
895427bd | 9856 | goto out_destroy; |
1ba981fd | 9857 | } |
6a828b0f | 9858 | lpfc_setup_cq_lookup(phba); |
1ba981fd | 9859 | } |
da0436e9 JS |
9860 | return 0; |
9861 | ||
895427bd JS |
9862 | out_destroy: |
9863 | lpfc_sli4_queue_unset(phba); | |
da0436e9 JS |
9864 | out_error: |
9865 | return rc; | |
9866 | } | |
9867 | ||
9868 | /** | |
9869 | * lpfc_sli4_queue_unset - Unset all the SLI4 queues | |
9870 | * @phba: pointer to lpfc hba data structure. | |
9871 | * | |
9872 | * This routine is invoked to unset all the SLI4 queues with the FCoE HBA | |
9873 | * operation. | |
9874 | * | |
9875 | * Return codes | |
af901ca1 | 9876 | * 0 - successful |
25985edc | 9877 | * -ENOMEM - No available memory |
d439d286 | 9878 | * -EIO - The mailbox failed to complete successfully. |
da0436e9 JS |
9879 | **/ |
9880 | void | |
9881 | lpfc_sli4_queue_unset(struct lpfc_hba *phba) | |
9882 | { | |
cdb42bec | 9883 | struct lpfc_sli4_hdw_queue *qp; |
657add4e | 9884 | struct lpfc_queue *eq; |
895427bd | 9885 | int qidx; |
da0436e9 JS |
9886 | |
9887 | /* Unset mailbox command work queue */ | |
895427bd JS |
9888 | if (phba->sli4_hba.mbx_wq) |
9889 | lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq); | |
9890 | ||
9891 | /* Unset NVME LS work queue */ | |
9892 | if (phba->sli4_hba.nvmels_wq) | |
9893 | lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq); | |
9894 | ||
da0436e9 | 9895 | /* Unset ELS work queue */ |
019c0d66 | 9896 | if (phba->sli4_hba.els_wq) |
895427bd JS |
9897 | lpfc_wq_destroy(phba, phba->sli4_hba.els_wq); |
9898 | ||
da0436e9 | 9899 | /* Unset unsolicited receive queue */ |
895427bd JS |
9900 | if (phba->sli4_hba.hdr_rq) |
9901 | lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq, | |
9902 | phba->sli4_hba.dat_rq); | |
9903 | ||
da0436e9 | 9904 | /* Unset mailbox command complete queue */ |
895427bd JS |
9905 | if (phba->sli4_hba.mbx_cq) |
9906 | lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq); | |
9907 | ||
da0436e9 | 9908 | /* Unset ELS complete queue */ |
895427bd JS |
9909 | if (phba->sli4_hba.els_cq) |
9910 | lpfc_cq_destroy(phba, phba->sli4_hba.els_cq); | |
9911 | ||
9912 | /* Unset NVME LS complete queue */ | |
9913 | if (phba->sli4_hba.nvmels_cq) | |
9914 | lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq); | |
9915 | ||
bcb24f65 JS |
9916 | if (phba->nvmet_support) { |
9917 | /* Unset NVMET MRQ queue */ | |
9918 | if (phba->sli4_hba.nvmet_mrq_hdr) { | |
9919 | for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) | |
9920 | lpfc_rq_destroy( | |
9921 | phba, | |
2d7dbc4c JS |
9922 | phba->sli4_hba.nvmet_mrq_hdr[qidx], |
9923 | phba->sli4_hba.nvmet_mrq_data[qidx]); | |
bcb24f65 | 9924 | } |
2d7dbc4c | 9925 | |
bcb24f65 JS |
9926 | /* Unset NVMET CQ Set complete queue */ |
9927 | if (phba->sli4_hba.nvmet_cqset) { | |
9928 | for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) | |
9929 | lpfc_cq_destroy( | |
9930 | phba, phba->sli4_hba.nvmet_cqset[qidx]); | |
9931 | } | |
2d7dbc4c JS |
9932 | } |
9933 | ||
cdb42bec JS |
9934 | /* Unset fast-path SLI4 queues */ |
9935 | if (phba->sli4_hba.hdwq) { | |
657add4e | 9936 | /* Loop thru all Hardware Queues */ |
cdb42bec | 9937 | for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { |
657add4e | 9938 | /* Destroy the CQ/WQ corresponding to Hardware Queue */ |
cdb42bec JS |
9939 | qp = &phba->sli4_hba.hdwq[qidx]; |
9940 | lpfc_wq_destroy(phba, qp->fcp_wq); | |
9941 | lpfc_wq_destroy(phba, qp->nvme_wq); | |
9942 | lpfc_cq_destroy(phba, qp->fcp_cq); | |
9943 | lpfc_cq_destroy(phba, qp->nvme_cq); | |
657add4e JS |
9944 | } |
9945 | /* Loop thru all IRQ vectors */ | |
9946 | for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { | |
9947 | /* Destroy the EQ corresponding to the IRQ vector */ | |
9948 | eq = phba->sli4_hba.hba_eq_hdl[qidx].eq; | |
9949 | lpfc_eq_destroy(phba, eq); | |
cdb42bec JS |
9950 | } |
9951 | } | |
895427bd | 9952 | |
6a828b0f JS |
9953 | kfree(phba->sli4_hba.cq_lookup); |
9954 | phba->sli4_hba.cq_lookup = NULL; | |
9955 | phba->sli4_hba.cq_max = 0; | |
da0436e9 JS |
9956 | } |
9957 | ||
9958 | /** | |
9959 | * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool | |
9960 | * @phba: pointer to lpfc hba data structure. | |
9961 | * | |
9962 | * This routine is invoked to allocate and set up a pool of completion queue | |
9963 | * events. The body of the completion queue event is a completion queue entry | |
9964 | * CQE. For now, this pool is used for the interrupt service routine to queue | |
9965 | * the following HBA completion queue events for the worker thread to process: | |
9966 | * - Mailbox asynchronous events | |
9967 | * - Receive queue completion unsolicited events | |
9968 | * Later, this can be used for all the slow-path events. | |
9969 | * | |
9970 | * Return codes | |
af901ca1 | 9971 | * 0 - successful |
25985edc | 9972 | * -ENOMEM - No available memory |
da0436e9 JS |
9973 | **/ |
9974 | static int | |
9975 | lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba) | |
9976 | { | |
9977 | struct lpfc_cq_event *cq_event; | |
9978 | int i; | |
9979 | ||
9980 | for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) { | |
9981 | cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL); | |
9982 | if (!cq_event) | |
9983 | goto out_pool_create_fail; | |
9984 | list_add_tail(&cq_event->list, | |
9985 | &phba->sli4_hba.sp_cqe_event_pool); | |
9986 | } | |
9987 | return 0; | |
9988 | ||
9989 | out_pool_create_fail: | |
9990 | lpfc_sli4_cq_event_pool_destroy(phba); | |
9991 | return -ENOMEM; | |
9992 | } | |
9993 | ||
9994 | /** | |
9995 | * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool | |
9996 | * @phba: pointer to lpfc hba data structure. | |
9997 | * | |
9998 | * This routine is invoked to free the pool of completion queue events at | |
9999 | * driver unload time. Note that, it is the responsibility of the driver | |
10000 | * cleanup routine to free all the outstanding completion-queue events | |
10001 | * allocated from this pool back into the pool before invoking this routine | |
10002 | * to destroy the pool. | |
10003 | **/ | |
10004 | static void | |
10005 | lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba) | |
10006 | { | |
10007 | struct lpfc_cq_event *cq_event, *next_cq_event; | |
10008 | ||
10009 | list_for_each_entry_safe(cq_event, next_cq_event, | |
10010 | &phba->sli4_hba.sp_cqe_event_pool, list) { | |
10011 | list_del(&cq_event->list); | |
10012 | kfree(cq_event); | |
10013 | } | |
10014 | } | |
10015 | ||
10016 | /** | |
10017 | * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool | |
10018 | * @phba: pointer to lpfc hba data structure. | |
10019 | * | |
10020 | * This routine is the lock free version of the API invoked to allocate a | |
10021 | * completion-queue event from the free pool. | |
10022 | * | |
10023 | * Return: Pointer to the newly allocated completion-queue event if successful | |
10024 | * NULL otherwise. | |
10025 | **/ | |
10026 | struct lpfc_cq_event * | |
10027 | __lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba) | |
10028 | { | |
10029 | struct lpfc_cq_event *cq_event = NULL; | |
10030 | ||
10031 | list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event, | |
10032 | struct lpfc_cq_event, list); | |
10033 | return cq_event; | |
10034 | } | |
10035 | ||
10036 | /** | |
10037 | * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool | |
10038 | * @phba: pointer to lpfc hba data structure. | |
10039 | * | |
10040 | * This routine is the lock version of the API invoked to allocate a | |
10041 | * completion-queue event from the free pool. | |
10042 | * | |
10043 | * Return: Pointer to the newly allocated completion-queue event if successful | |
10044 | * NULL otherwise. | |
10045 | **/ | |
10046 | struct lpfc_cq_event * | |
10047 | lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba) | |
10048 | { | |
10049 | struct lpfc_cq_event *cq_event; | |
10050 | unsigned long iflags; | |
10051 | ||
10052 | spin_lock_irqsave(&phba->hbalock, iflags); | |
10053 | cq_event = __lpfc_sli4_cq_event_alloc(phba); | |
10054 | spin_unlock_irqrestore(&phba->hbalock, iflags); | |
10055 | return cq_event; | |
10056 | } | |
10057 | ||
10058 | /** | |
10059 | * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool | |
10060 | * @phba: pointer to lpfc hba data structure. | |
10061 | * @cq_event: pointer to the completion queue event to be freed. | |
10062 | * | |
10063 | * This routine is the lock free version of the API invoked to release a | |
10064 | * completion-queue event back into the free pool. | |
10065 | **/ | |
10066 | void | |
10067 | __lpfc_sli4_cq_event_release(struct lpfc_hba *phba, | |
10068 | struct lpfc_cq_event *cq_event) | |
10069 | { | |
10070 | list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool); | |
10071 | } | |
10072 | ||
10073 | /** | |
10074 | * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool | |
10075 | * @phba: pointer to lpfc hba data structure. | |
10076 | * @cq_event: pointer to the completion queue event to be freed. | |
10077 | * | |
10078 | * This routine is the lock version of the API invoked to release a | |
10079 | * completion-queue event back into the free pool. | |
10080 | **/ | |
10081 | void | |
10082 | lpfc_sli4_cq_event_release(struct lpfc_hba *phba, | |
10083 | struct lpfc_cq_event *cq_event) | |
10084 | { | |
10085 | unsigned long iflags; | |
10086 | spin_lock_irqsave(&phba->hbalock, iflags); | |
10087 | __lpfc_sli4_cq_event_release(phba, cq_event); | |
10088 | spin_unlock_irqrestore(&phba->hbalock, iflags); | |
10089 | } | |
10090 | ||
10091 | /** | |
10092 | * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool | |
10093 | * @phba: pointer to lpfc hba data structure. | |
10094 | * | |
10095 | * This routine is to free all the pending completion-queue events to the | |
10096 | * back into the free pool for device reset. | |
10097 | **/ | |
10098 | static void | |
10099 | lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba) | |
10100 | { | |
10101 | LIST_HEAD(cqelist); | |
10102 | struct lpfc_cq_event *cqe; | |
10103 | unsigned long iflags; | |
10104 | ||
10105 | /* Retrieve all the pending WCQEs from pending WCQE lists */ | |
10106 | spin_lock_irqsave(&phba->hbalock, iflags); | |
10107 | /* Pending FCP XRI abort events */ | |
10108 | list_splice_init(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue, | |
10109 | &cqelist); | |
10110 | /* Pending ELS XRI abort events */ | |
10111 | list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue, | |
10112 | &cqelist); | |
10113 | /* Pending asynnc events */ | |
10114 | list_splice_init(&phba->sli4_hba.sp_asynce_work_queue, | |
10115 | &cqelist); | |
10116 | spin_unlock_irqrestore(&phba->hbalock, iflags); | |
10117 | ||
10118 | while (!list_empty(&cqelist)) { | |
10119 | list_remove_head(&cqelist, cqe, struct lpfc_cq_event, list); | |
10120 | lpfc_sli4_cq_event_release(phba, cqe); | |
10121 | } | |
10122 | } | |
10123 | ||
10124 | /** | |
10125 | * lpfc_pci_function_reset - Reset pci function. | |
10126 | * @phba: pointer to lpfc hba data structure. | |
10127 | * | |
10128 | * This routine is invoked to request a PCI function reset. It will destroys | |
10129 | * all resources assigned to the PCI function which originates this request. | |
10130 | * | |
10131 | * Return codes | |
af901ca1 | 10132 | * 0 - successful |
25985edc | 10133 | * -ENOMEM - No available memory |
d439d286 | 10134 | * -EIO - The mailbox failed to complete successfully. |
da0436e9 JS |
10135 | **/ |
10136 | int | |
10137 | lpfc_pci_function_reset(struct lpfc_hba *phba) | |
10138 | { | |
10139 | LPFC_MBOXQ_t *mboxq; | |
2fcee4bf | 10140 | uint32_t rc = 0, if_type; |
da0436e9 | 10141 | uint32_t shdr_status, shdr_add_status; |
2f6fa2c9 JS |
10142 | uint32_t rdy_chk; |
10143 | uint32_t port_reset = 0; | |
da0436e9 | 10144 | union lpfc_sli4_cfg_shdr *shdr; |
2fcee4bf | 10145 | struct lpfc_register reg_data; |
2b81f942 | 10146 | uint16_t devid; |
da0436e9 | 10147 | |
2fcee4bf JS |
10148 | if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); |
10149 | switch (if_type) { | |
10150 | case LPFC_SLI_INTF_IF_TYPE_0: | |
10151 | mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, | |
10152 | GFP_KERNEL); | |
10153 | if (!mboxq) { | |
10154 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
10155 | "0494 Unable to allocate memory for " | |
10156 | "issuing SLI_FUNCTION_RESET mailbox " | |
10157 | "command\n"); | |
10158 | return -ENOMEM; | |
10159 | } | |
da0436e9 | 10160 | |
2fcee4bf JS |
10161 | /* Setup PCI function reset mailbox-ioctl command */ |
10162 | lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, | |
10163 | LPFC_MBOX_OPCODE_FUNCTION_RESET, 0, | |
10164 | LPFC_SLI4_MBX_EMBED); | |
10165 | rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
10166 | shdr = (union lpfc_sli4_cfg_shdr *) | |
10167 | &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; | |
10168 | shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); | |
10169 | shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, | |
10170 | &shdr->response); | |
10171 | if (rc != MBX_TIMEOUT) | |
10172 | mempool_free(mboxq, phba->mbox_mem_pool); | |
10173 | if (shdr_status || shdr_add_status || rc) { | |
10174 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
10175 | "0495 SLI_FUNCTION_RESET mailbox " | |
10176 | "failed with status x%x add_status x%x," | |
10177 | " mbx status x%x\n", | |
10178 | shdr_status, shdr_add_status, rc); | |
10179 | rc = -ENXIO; | |
10180 | } | |
10181 | break; | |
10182 | case LPFC_SLI_INTF_IF_TYPE_2: | |
27d6ac0a | 10183 | case LPFC_SLI_INTF_IF_TYPE_6: |
2f6fa2c9 JS |
10184 | wait: |
10185 | /* | |
10186 | * Poll the Port Status Register and wait for RDY for | |
10187 | * up to 30 seconds. If the port doesn't respond, treat | |
10188 | * it as an error. | |
10189 | */ | |
77d093fb | 10190 | for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) { |
2f6fa2c9 JS |
10191 | if (lpfc_readl(phba->sli4_hba.u.if_type2. |
10192 | STATUSregaddr, ®_data.word0)) { | |
10193 | rc = -ENODEV; | |
10194 | goto out; | |
10195 | } | |
10196 | if (bf_get(lpfc_sliport_status_rdy, ®_data)) | |
10197 | break; | |
10198 | msleep(20); | |
10199 | } | |
10200 | ||
10201 | if (!bf_get(lpfc_sliport_status_rdy, ®_data)) { | |
10202 | phba->work_status[0] = readl( | |
10203 | phba->sli4_hba.u.if_type2.ERR1regaddr); | |
10204 | phba->work_status[1] = readl( | |
10205 | phba->sli4_hba.u.if_type2.ERR2regaddr); | |
10206 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
10207 | "2890 Port not ready, port status reg " | |
10208 | "0x%x error 1=0x%x, error 2=0x%x\n", | |
10209 | reg_data.word0, | |
10210 | phba->work_status[0], | |
10211 | phba->work_status[1]); | |
10212 | rc = -ENODEV; | |
10213 | goto out; | |
10214 | } | |
10215 | ||
10216 | if (!port_reset) { | |
10217 | /* | |
10218 | * Reset the port now | |
10219 | */ | |
2fcee4bf JS |
10220 | reg_data.word0 = 0; |
10221 | bf_set(lpfc_sliport_ctrl_end, ®_data, | |
10222 | LPFC_SLIPORT_LITTLE_ENDIAN); | |
10223 | bf_set(lpfc_sliport_ctrl_ip, ®_data, | |
10224 | LPFC_SLIPORT_INIT_PORT); | |
10225 | writel(reg_data.word0, phba->sli4_hba.u.if_type2. | |
10226 | CTRLregaddr); | |
8fcb8acd | 10227 | /* flush */ |
2b81f942 JS |
10228 | pci_read_config_word(phba->pcidev, |
10229 | PCI_DEVICE_ID, &devid); | |
2fcee4bf | 10230 | |
2f6fa2c9 JS |
10231 | port_reset = 1; |
10232 | msleep(20); | |
10233 | goto wait; | |
10234 | } else if (bf_get(lpfc_sliport_status_rn, ®_data)) { | |
10235 | rc = -ENODEV; | |
10236 | goto out; | |
2fcee4bf JS |
10237 | } |
10238 | break; | |
2f6fa2c9 | 10239 | |
2fcee4bf JS |
10240 | case LPFC_SLI_INTF_IF_TYPE_1: |
10241 | default: | |
10242 | break; | |
da0436e9 | 10243 | } |
2fcee4bf | 10244 | |
73d91e50 | 10245 | out: |
2fcee4bf | 10246 | /* Catch the not-ready port failure after a port reset. */ |
2f6fa2c9 | 10247 | if (rc) { |
229adb0e JS |
10248 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
10249 | "3317 HBA not functional: IP Reset Failed " | |
2f6fa2c9 | 10250 | "try: echo fw_reset > board_mode\n"); |
2fcee4bf | 10251 | rc = -ENODEV; |
229adb0e | 10252 | } |
2fcee4bf | 10253 | |
da0436e9 JS |
10254 | return rc; |
10255 | } | |
10256 | ||
da0436e9 JS |
10257 | /** |
10258 | * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space. | |
10259 | * @phba: pointer to lpfc hba data structure. | |
10260 | * | |
10261 | * This routine is invoked to set up the PCI device memory space for device | |
10262 | * with SLI-4 interface spec. | |
10263 | * | |
10264 | * Return codes | |
af901ca1 | 10265 | * 0 - successful |
da0436e9 JS |
10266 | * other values - error |
10267 | **/ | |
10268 | static int | |
10269 | lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba) | |
10270 | { | |
f30e1bfd | 10271 | struct pci_dev *pdev = phba->pcidev; |
da0436e9 | 10272 | unsigned long bar0map_len, bar1map_len, bar2map_len; |
3a487ff7 | 10273 | int error; |
2fcee4bf | 10274 | uint32_t if_type; |
da0436e9 | 10275 | |
f30e1bfd | 10276 | if (!pdev) |
56de8357 | 10277 | return -ENODEV; |
da0436e9 JS |
10278 | |
10279 | /* Set the device DMA mask size */ | |
56de8357 HR |
10280 | error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); |
10281 | if (error) | |
10282 | error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); | |
10283 | if (error) | |
f30e1bfd | 10284 | return error; |
da0436e9 | 10285 | |
2fcee4bf JS |
10286 | /* |
10287 | * The BARs and register set definitions and offset locations are | |
10288 | * dependent on the if_type. | |
10289 | */ | |
10290 | if (pci_read_config_dword(pdev, LPFC_SLI_INTF, | |
10291 | &phba->sli4_hba.sli_intf.word0)) { | |
3a487ff7 | 10292 | return -ENODEV; |
2fcee4bf JS |
10293 | } |
10294 | ||
10295 | /* There is no SLI3 failback for SLI4 devices. */ | |
10296 | if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) != | |
10297 | LPFC_SLI_INTF_VALID) { | |
10298 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
10299 | "2894 SLI_INTF reg contents invalid " | |
10300 | "sli_intf reg 0x%x\n", | |
10301 | phba->sli4_hba.sli_intf.word0); | |
3a487ff7 | 10302 | return -ENODEV; |
2fcee4bf JS |
10303 | } |
10304 | ||
10305 | if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); | |
10306 | /* | |
10307 | * Get the bus address of SLI4 device Bar regions and the | |
10308 | * number of bytes required by each mapping. The mapping of the | |
10309 | * particular PCI BARs regions is dependent on the type of | |
10310 | * SLI4 device. | |
da0436e9 | 10311 | */ |
f5ca6f2e JS |
10312 | if (pci_resource_start(pdev, PCI_64BIT_BAR0)) { |
10313 | phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0); | |
10314 | bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0); | |
2fcee4bf JS |
10315 | |
10316 | /* | |
10317 | * Map SLI4 PCI Config Space Register base to a kernel virtual | |
10318 | * addr | |
10319 | */ | |
10320 | phba->sli4_hba.conf_regs_memmap_p = | |
10321 | ioremap(phba->pci_bar0_map, bar0map_len); | |
10322 | if (!phba->sli4_hba.conf_regs_memmap_p) { | |
10323 | dev_printk(KERN_ERR, &pdev->dev, | |
10324 | "ioremap failed for SLI4 PCI config " | |
10325 | "registers.\n"); | |
3a487ff7 | 10326 | return -ENODEV; |
2fcee4bf | 10327 | } |
f5ca6f2e | 10328 | phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p; |
2fcee4bf JS |
10329 | /* Set up BAR0 PCI config space register memory map */ |
10330 | lpfc_sli4_bar0_register_memmap(phba, if_type); | |
1dfb5a47 JS |
10331 | } else { |
10332 | phba->pci_bar0_map = pci_resource_start(pdev, 1); | |
10333 | bar0map_len = pci_resource_len(pdev, 1); | |
27d6ac0a | 10334 | if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) { |
2fcee4bf JS |
10335 | dev_printk(KERN_ERR, &pdev->dev, |
10336 | "FATAL - No BAR0 mapping for SLI4, if_type 2\n"); | |
3a487ff7 | 10337 | return -ENODEV; |
2fcee4bf JS |
10338 | } |
10339 | phba->sli4_hba.conf_regs_memmap_p = | |
da0436e9 | 10340 | ioremap(phba->pci_bar0_map, bar0map_len); |
2fcee4bf JS |
10341 | if (!phba->sli4_hba.conf_regs_memmap_p) { |
10342 | dev_printk(KERN_ERR, &pdev->dev, | |
10343 | "ioremap failed for SLI4 PCI config " | |
10344 | "registers.\n"); | |
3a487ff7 | 10345 | return -ENODEV; |
2fcee4bf JS |
10346 | } |
10347 | lpfc_sli4_bar0_register_memmap(phba, if_type); | |
da0436e9 JS |
10348 | } |
10349 | ||
e4b9794e JS |
10350 | if (if_type == LPFC_SLI_INTF_IF_TYPE_0) { |
10351 | if (pci_resource_start(pdev, PCI_64BIT_BAR2)) { | |
10352 | /* | |
10353 | * Map SLI4 if type 0 HBA Control Register base to a | |
10354 | * kernel virtual address and setup the registers. | |
10355 | */ | |
10356 | phba->pci_bar1_map = pci_resource_start(pdev, | |
10357 | PCI_64BIT_BAR2); | |
10358 | bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2); | |
10359 | phba->sli4_hba.ctrl_regs_memmap_p = | |
10360 | ioremap(phba->pci_bar1_map, | |
10361 | bar1map_len); | |
10362 | if (!phba->sli4_hba.ctrl_regs_memmap_p) { | |
10363 | dev_err(&pdev->dev, | |
10364 | "ioremap failed for SLI4 HBA " | |
10365 | "control registers.\n"); | |
10366 | error = -ENOMEM; | |
10367 | goto out_iounmap_conf; | |
10368 | } | |
10369 | phba->pci_bar2_memmap_p = | |
10370 | phba->sli4_hba.ctrl_regs_memmap_p; | |
27d6ac0a | 10371 | lpfc_sli4_bar1_register_memmap(phba, if_type); |
e4b9794e JS |
10372 | } else { |
10373 | error = -ENOMEM; | |
2fcee4bf JS |
10374 | goto out_iounmap_conf; |
10375 | } | |
da0436e9 JS |
10376 | } |
10377 | ||
27d6ac0a JS |
10378 | if ((if_type == LPFC_SLI_INTF_IF_TYPE_6) && |
10379 | (pci_resource_start(pdev, PCI_64BIT_BAR2))) { | |
10380 | /* | |
10381 | * Map SLI4 if type 6 HBA Doorbell Register base to a kernel | |
10382 | * virtual address and setup the registers. | |
10383 | */ | |
10384 | phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2); | |
10385 | bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2); | |
10386 | phba->sli4_hba.drbl_regs_memmap_p = | |
10387 | ioremap(phba->pci_bar1_map, bar1map_len); | |
10388 | if (!phba->sli4_hba.drbl_regs_memmap_p) { | |
10389 | dev_err(&pdev->dev, | |
10390 | "ioremap failed for SLI4 HBA doorbell registers.\n"); | |
3a487ff7 | 10391 | error = -ENOMEM; |
27d6ac0a JS |
10392 | goto out_iounmap_conf; |
10393 | } | |
10394 | phba->pci_bar2_memmap_p = phba->sli4_hba.drbl_regs_memmap_p; | |
10395 | lpfc_sli4_bar1_register_memmap(phba, if_type); | |
10396 | } | |
10397 | ||
e4b9794e JS |
10398 | if (if_type == LPFC_SLI_INTF_IF_TYPE_0) { |
10399 | if (pci_resource_start(pdev, PCI_64BIT_BAR4)) { | |
10400 | /* | |
10401 | * Map SLI4 if type 0 HBA Doorbell Register base to | |
10402 | * a kernel virtual address and setup the registers. | |
10403 | */ | |
10404 | phba->pci_bar2_map = pci_resource_start(pdev, | |
10405 | PCI_64BIT_BAR4); | |
10406 | bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4); | |
10407 | phba->sli4_hba.drbl_regs_memmap_p = | |
10408 | ioremap(phba->pci_bar2_map, | |
10409 | bar2map_len); | |
10410 | if (!phba->sli4_hba.drbl_regs_memmap_p) { | |
10411 | dev_err(&pdev->dev, | |
10412 | "ioremap failed for SLI4 HBA" | |
10413 | " doorbell registers.\n"); | |
10414 | error = -ENOMEM; | |
10415 | goto out_iounmap_ctrl; | |
10416 | } | |
10417 | phba->pci_bar4_memmap_p = | |
10418 | phba->sli4_hba.drbl_regs_memmap_p; | |
10419 | error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0); | |
10420 | if (error) | |
10421 | goto out_iounmap_all; | |
10422 | } else { | |
10423 | error = -ENOMEM; | |
2fcee4bf | 10424 | goto out_iounmap_all; |
e4b9794e | 10425 | } |
da0436e9 JS |
10426 | } |
10427 | ||
1351e69f JS |
10428 | if (if_type == LPFC_SLI_INTF_IF_TYPE_6 && |
10429 | pci_resource_start(pdev, PCI_64BIT_BAR4)) { | |
10430 | /* | |
10431 | * Map SLI4 if type 6 HBA DPP Register base to a kernel | |
10432 | * virtual address and setup the registers. | |
10433 | */ | |
10434 | phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4); | |
10435 | bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4); | |
10436 | phba->sli4_hba.dpp_regs_memmap_p = | |
10437 | ioremap(phba->pci_bar2_map, bar2map_len); | |
10438 | if (!phba->sli4_hba.dpp_regs_memmap_p) { | |
10439 | dev_err(&pdev->dev, | |
10440 | "ioremap failed for SLI4 HBA dpp registers.\n"); | |
3a487ff7 | 10441 | error = -ENOMEM; |
1351e69f JS |
10442 | goto out_iounmap_ctrl; |
10443 | } | |
10444 | phba->pci_bar4_memmap_p = phba->sli4_hba.dpp_regs_memmap_p; | |
10445 | } | |
10446 | ||
b71413dd | 10447 | /* Set up the EQ/CQ register handeling functions now */ |
27d6ac0a JS |
10448 | switch (if_type) { |
10449 | case LPFC_SLI_INTF_IF_TYPE_0: | |
10450 | case LPFC_SLI_INTF_IF_TYPE_2: | |
b71413dd | 10451 | phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_eq_clr_intr; |
32517fc0 JS |
10452 | phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_write_eq_db; |
10453 | phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_write_cq_db; | |
27d6ac0a JS |
10454 | break; |
10455 | case LPFC_SLI_INTF_IF_TYPE_6: | |
10456 | phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_if6_eq_clr_intr; | |
32517fc0 JS |
10457 | phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_if6_write_eq_db; |
10458 | phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_if6_write_cq_db; | |
27d6ac0a JS |
10459 | break; |
10460 | default: | |
10461 | break; | |
b71413dd JS |
10462 | } |
10463 | ||
da0436e9 JS |
10464 | return 0; |
10465 | ||
10466 | out_iounmap_all: | |
10467 | iounmap(phba->sli4_hba.drbl_regs_memmap_p); | |
10468 | out_iounmap_ctrl: | |
10469 | iounmap(phba->sli4_hba.ctrl_regs_memmap_p); | |
10470 | out_iounmap_conf: | |
10471 | iounmap(phba->sli4_hba.conf_regs_memmap_p); | |
3a487ff7 | 10472 | |
da0436e9 JS |
10473 | return error; |
10474 | } | |
10475 | ||
10476 | /** | |
10477 | * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space. | |
10478 | * @phba: pointer to lpfc hba data structure. | |
10479 | * | |
10480 | * This routine is invoked to unset the PCI device memory space for device | |
10481 | * with SLI-4 interface spec. | |
10482 | **/ | |
10483 | static void | |
10484 | lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba) | |
10485 | { | |
2e90f4b5 JS |
10486 | uint32_t if_type; |
10487 | if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); | |
da0436e9 | 10488 | |
2e90f4b5 JS |
10489 | switch (if_type) { |
10490 | case LPFC_SLI_INTF_IF_TYPE_0: | |
10491 | iounmap(phba->sli4_hba.drbl_regs_memmap_p); | |
10492 | iounmap(phba->sli4_hba.ctrl_regs_memmap_p); | |
10493 | iounmap(phba->sli4_hba.conf_regs_memmap_p); | |
10494 | break; | |
10495 | case LPFC_SLI_INTF_IF_TYPE_2: | |
10496 | iounmap(phba->sli4_hba.conf_regs_memmap_p); | |
10497 | break; | |
27d6ac0a JS |
10498 | case LPFC_SLI_INTF_IF_TYPE_6: |
10499 | iounmap(phba->sli4_hba.drbl_regs_memmap_p); | |
10500 | iounmap(phba->sli4_hba.conf_regs_memmap_p); | |
10501 | break; | |
2e90f4b5 JS |
10502 | case LPFC_SLI_INTF_IF_TYPE_1: |
10503 | default: | |
10504 | dev_printk(KERN_ERR, &phba->pcidev->dev, | |
10505 | "FATAL - unsupported SLI4 interface type - %d\n", | |
10506 | if_type); | |
10507 | break; | |
10508 | } | |
da0436e9 JS |
10509 | } |
10510 | ||
10511 | /** | |
10512 | * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device | |
10513 | * @phba: pointer to lpfc hba data structure. | |
10514 | * | |
10515 | * This routine is invoked to enable the MSI-X interrupt vectors to device | |
45ffac19 | 10516 | * with SLI-3 interface specs. |
da0436e9 JS |
10517 | * |
10518 | * Return codes | |
af901ca1 | 10519 | * 0 - successful |
da0436e9 JS |
10520 | * other values - error |
10521 | **/ | |
10522 | static int | |
10523 | lpfc_sli_enable_msix(struct lpfc_hba *phba) | |
10524 | { | |
45ffac19 | 10525 | int rc; |
da0436e9 JS |
10526 | LPFC_MBOXQ_t *pmb; |
10527 | ||
10528 | /* Set up MSI-X multi-message vectors */ | |
45ffac19 CH |
10529 | rc = pci_alloc_irq_vectors(phba->pcidev, |
10530 | LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX); | |
10531 | if (rc < 0) { | |
da0436e9 JS |
10532 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
10533 | "0420 PCI enable MSI-X failed (%d)\n", rc); | |
029165ac | 10534 | goto vec_fail_out; |
da0436e9 | 10535 | } |
45ffac19 | 10536 | |
da0436e9 JS |
10537 | /* |
10538 | * Assign MSI-X vectors to interrupt handlers | |
10539 | */ | |
10540 | ||
10541 | /* vector-0 is associated to slow-path handler */ | |
45ffac19 | 10542 | rc = request_irq(pci_irq_vector(phba->pcidev, 0), |
ed243d37 | 10543 | &lpfc_sli_sp_intr_handler, 0, |
da0436e9 JS |
10544 | LPFC_SP_DRIVER_HANDLER_NAME, phba); |
10545 | if (rc) { | |
10546 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
10547 | "0421 MSI-X slow-path request_irq failed " | |
10548 | "(%d)\n", rc); | |
10549 | goto msi_fail_out; | |
10550 | } | |
10551 | ||
10552 | /* vector-1 is associated to fast-path handler */ | |
45ffac19 | 10553 | rc = request_irq(pci_irq_vector(phba->pcidev, 1), |
ed243d37 | 10554 | &lpfc_sli_fp_intr_handler, 0, |
da0436e9 JS |
10555 | LPFC_FP_DRIVER_HANDLER_NAME, phba); |
10556 | ||
10557 | if (rc) { | |
10558 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
10559 | "0429 MSI-X fast-path request_irq failed " | |
10560 | "(%d)\n", rc); | |
10561 | goto irq_fail_out; | |
10562 | } | |
10563 | ||
10564 | /* | |
10565 | * Configure HBA MSI-X attention conditions to messages | |
10566 | */ | |
10567 | pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); | |
10568 | ||
10569 | if (!pmb) { | |
10570 | rc = -ENOMEM; | |
10571 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
10572 | "0474 Unable to allocate memory for issuing " | |
10573 | "MBOX_CONFIG_MSI command\n"); | |
10574 | goto mem_fail_out; | |
10575 | } | |
10576 | rc = lpfc_config_msi(phba, pmb); | |
10577 | if (rc) | |
10578 | goto mbx_fail_out; | |
10579 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); | |
10580 | if (rc != MBX_SUCCESS) { | |
10581 | lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX, | |
10582 | "0351 Config MSI mailbox command failed, " | |
10583 | "mbxCmd x%x, mbxStatus x%x\n", | |
10584 | pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus); | |
10585 | goto mbx_fail_out; | |
10586 | } | |
10587 | ||
10588 | /* Free memory allocated for mailbox command */ | |
10589 | mempool_free(pmb, phba->mbox_mem_pool); | |
10590 | return rc; | |
10591 | ||
10592 | mbx_fail_out: | |
10593 | /* Free memory allocated for mailbox command */ | |
10594 | mempool_free(pmb, phba->mbox_mem_pool); | |
10595 | ||
10596 | mem_fail_out: | |
10597 | /* free the irq already requested */ | |
45ffac19 | 10598 | free_irq(pci_irq_vector(phba->pcidev, 1), phba); |
da0436e9 JS |
10599 | |
10600 | irq_fail_out: | |
10601 | /* free the irq already requested */ | |
45ffac19 | 10602 | free_irq(pci_irq_vector(phba->pcidev, 0), phba); |
da0436e9 JS |
10603 | |
10604 | msi_fail_out: | |
10605 | /* Unconfigure MSI-X capability structure */ | |
45ffac19 | 10606 | pci_free_irq_vectors(phba->pcidev); |
029165ac AG |
10607 | |
10608 | vec_fail_out: | |
da0436e9 JS |
10609 | return rc; |
10610 | } | |
10611 | ||
da0436e9 JS |
10612 | /** |
10613 | * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device. | |
10614 | * @phba: pointer to lpfc hba data structure. | |
10615 | * | |
10616 | * This routine is invoked to enable the MSI interrupt mode to device with | |
10617 | * SLI-3 interface spec. The kernel function pci_enable_msi() is called to | |
10618 | * enable the MSI vector. The device driver is responsible for calling the | |
10619 | * request_irq() to register MSI vector with a interrupt the handler, which | |
10620 | * is done in this function. | |
10621 | * | |
10622 | * Return codes | |
af901ca1 | 10623 | * 0 - successful |
da0436e9 JS |
10624 | * other values - error |
10625 | */ | |
10626 | static int | |
10627 | lpfc_sli_enable_msi(struct lpfc_hba *phba) | |
10628 | { | |
10629 | int rc; | |
10630 | ||
10631 | rc = pci_enable_msi(phba->pcidev); | |
10632 | if (!rc) | |
10633 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
10634 | "0462 PCI enable MSI mode success.\n"); | |
10635 | else { | |
10636 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
10637 | "0471 PCI enable MSI mode failed (%d)\n", rc); | |
10638 | return rc; | |
10639 | } | |
10640 | ||
10641 | rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler, | |
ed243d37 | 10642 | 0, LPFC_DRIVER_NAME, phba); |
da0436e9 JS |
10643 | if (rc) { |
10644 | pci_disable_msi(phba->pcidev); | |
10645 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
10646 | "0478 MSI request_irq failed (%d)\n", rc); | |
10647 | } | |
10648 | return rc; | |
10649 | } | |
10650 | ||
da0436e9 JS |
10651 | /** |
10652 | * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device. | |
10653 | * @phba: pointer to lpfc hba data structure. | |
10654 | * | |
10655 | * This routine is invoked to enable device interrupt and associate driver's | |
10656 | * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface | |
10657 | * spec. Depends on the interrupt mode configured to the driver, the driver | |
10658 | * will try to fallback from the configured interrupt mode to an interrupt | |
10659 | * mode which is supported by the platform, kernel, and device in the order | |
10660 | * of: | |
10661 | * MSI-X -> MSI -> IRQ. | |
10662 | * | |
10663 | * Return codes | |
af901ca1 | 10664 | * 0 - successful |
da0436e9 JS |
10665 | * other values - error |
10666 | **/ | |
10667 | static uint32_t | |
10668 | lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode) | |
10669 | { | |
10670 | uint32_t intr_mode = LPFC_INTR_ERROR; | |
10671 | int retval; | |
10672 | ||
10673 | if (cfg_mode == 2) { | |
10674 | /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */ | |
10675 | retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3); | |
10676 | if (!retval) { | |
10677 | /* Now, try to enable MSI-X interrupt mode */ | |
10678 | retval = lpfc_sli_enable_msix(phba); | |
10679 | if (!retval) { | |
10680 | /* Indicate initialization to MSI-X mode */ | |
10681 | phba->intr_type = MSIX; | |
10682 | intr_mode = 2; | |
10683 | } | |
10684 | } | |
10685 | } | |
10686 | ||
10687 | /* Fallback to MSI if MSI-X initialization failed */ | |
10688 | if (cfg_mode >= 1 && phba->intr_type == NONE) { | |
10689 | retval = lpfc_sli_enable_msi(phba); | |
10690 | if (!retval) { | |
10691 | /* Indicate initialization to MSI mode */ | |
10692 | phba->intr_type = MSI; | |
10693 | intr_mode = 1; | |
10694 | } | |
10695 | } | |
10696 | ||
10697 | /* Fallback to INTx if both MSI-X/MSI initalization failed */ | |
10698 | if (phba->intr_type == NONE) { | |
10699 | retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler, | |
10700 | IRQF_SHARED, LPFC_DRIVER_NAME, phba); | |
10701 | if (!retval) { | |
10702 | /* Indicate initialization to INTx mode */ | |
10703 | phba->intr_type = INTx; | |
10704 | intr_mode = 0; | |
10705 | } | |
10706 | } | |
10707 | return intr_mode; | |
10708 | } | |
10709 | ||
10710 | /** | |
10711 | * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device. | |
10712 | * @phba: pointer to lpfc hba data structure. | |
10713 | * | |
10714 | * This routine is invoked to disable device interrupt and disassociate the | |
10715 | * driver's interrupt handler(s) from interrupt vector(s) to device with | |
10716 | * SLI-3 interface spec. Depending on the interrupt mode, the driver will | |
10717 | * release the interrupt vector(s) for the message signaled interrupt. | |
10718 | **/ | |
10719 | static void | |
10720 | lpfc_sli_disable_intr(struct lpfc_hba *phba) | |
10721 | { | |
45ffac19 CH |
10722 | int nr_irqs, i; |
10723 | ||
da0436e9 | 10724 | if (phba->intr_type == MSIX) |
45ffac19 CH |
10725 | nr_irqs = LPFC_MSIX_VECTORS; |
10726 | else | |
10727 | nr_irqs = 1; | |
10728 | ||
10729 | for (i = 0; i < nr_irqs; i++) | |
10730 | free_irq(pci_irq_vector(phba->pcidev, i), phba); | |
10731 | pci_free_irq_vectors(phba->pcidev); | |
da0436e9 JS |
10732 | |
10733 | /* Reset interrupt management states */ | |
10734 | phba->intr_type = NONE; | |
10735 | phba->sli.slistat.sli_intr = 0; | |
da0436e9 JS |
10736 | } |
10737 | ||
6a828b0f | 10738 | /** |
657add4e | 10739 | * lpfc_find_cpu_handle - Find the CPU that corresponds to the specified Queue |
6a828b0f JS |
10740 | * @phba: pointer to lpfc hba data structure. |
10741 | * @id: EQ vector index or Hardware Queue index | |
10742 | * @match: LPFC_FIND_BY_EQ = match by EQ | |
10743 | * LPFC_FIND_BY_HDWQ = match by Hardware Queue | |
657add4e | 10744 | * Return the CPU that matches the selection criteria |
6a828b0f JS |
10745 | */ |
10746 | static uint16_t | |
10747 | lpfc_find_cpu_handle(struct lpfc_hba *phba, uint16_t id, int match) | |
10748 | { | |
10749 | struct lpfc_vector_map_info *cpup; | |
10750 | int cpu; | |
10751 | ||
657add4e | 10752 | /* Loop through all CPUs */ |
222e9239 JS |
10753 | for_each_present_cpu(cpu) { |
10754 | cpup = &phba->sli4_hba.cpu_map[cpu]; | |
657add4e JS |
10755 | |
10756 | /* If we are matching by EQ, there may be multiple CPUs using | |
10757 | * using the same vector, so select the one with | |
10758 | * LPFC_CPU_FIRST_IRQ set. | |
10759 | */ | |
6a828b0f | 10760 | if ((match == LPFC_FIND_BY_EQ) && |
657add4e | 10761 | (cpup->flag & LPFC_CPU_FIRST_IRQ) && |
6a828b0f JS |
10762 | (cpup->irq != LPFC_VECTOR_MAP_EMPTY) && |
10763 | (cpup->eq == id)) | |
10764 | return cpu; | |
657add4e JS |
10765 | |
10766 | /* If matching by HDWQ, select the first CPU that matches */ | |
6a828b0f JS |
10767 | if ((match == LPFC_FIND_BY_HDWQ) && (cpup->hdwq == id)) |
10768 | return cpu; | |
6a828b0f JS |
10769 | } |
10770 | return 0; | |
10771 | } | |
10772 | ||
6a828b0f JS |
10773 | #ifdef CONFIG_X86 |
10774 | /** | |
10775 | * lpfc_find_hyper - Determine if the CPU map entry is hyper-threaded | |
10776 | * @phba: pointer to lpfc hba data structure. | |
10777 | * @cpu: CPU map index | |
10778 | * @phys_id: CPU package physical id | |
10779 | * @core_id: CPU core id | |
10780 | */ | |
10781 | static int | |
10782 | lpfc_find_hyper(struct lpfc_hba *phba, int cpu, | |
10783 | uint16_t phys_id, uint16_t core_id) | |
10784 | { | |
10785 | struct lpfc_vector_map_info *cpup; | |
10786 | int idx; | |
10787 | ||
222e9239 JS |
10788 | for_each_present_cpu(idx) { |
10789 | cpup = &phba->sli4_hba.cpu_map[idx]; | |
6a828b0f JS |
10790 | /* Does the cpup match the one we are looking for */ |
10791 | if ((cpup->phys_id == phys_id) && | |
10792 | (cpup->core_id == core_id) && | |
222e9239 | 10793 | (cpu != idx)) |
6a828b0f | 10794 | return 1; |
6a828b0f JS |
10795 | } |
10796 | return 0; | |
10797 | } | |
10798 | #endif | |
10799 | ||
7bb03bbf | 10800 | /** |
895427bd | 10801 | * lpfc_cpu_affinity_check - Check vector CPU affinity mappings |
7bb03bbf | 10802 | * @phba: pointer to lpfc hba data structure. |
895427bd JS |
10803 | * @vectors: number of msix vectors allocated. |
10804 | * | |
10805 | * The routine will figure out the CPU affinity assignment for every | |
6a828b0f | 10806 | * MSI-X vector allocated for the HBA. |
895427bd JS |
10807 | * In addition, the CPU to IO channel mapping will be calculated |
10808 | * and the phba->sli4_hba.cpu_map array will reflect this. | |
7bb03bbf | 10809 | */ |
895427bd JS |
10810 | static void |
10811 | lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors) | |
7bb03bbf | 10812 | { |
3ad348d9 | 10813 | int i, cpu, idx, next_idx, new_cpu, start_cpu, first_cpu; |
6a828b0f JS |
10814 | int max_phys_id, min_phys_id; |
10815 | int max_core_id, min_core_id; | |
7bb03bbf | 10816 | struct lpfc_vector_map_info *cpup; |
d9954a2d | 10817 | struct lpfc_vector_map_info *new_cpup; |
75508a8b | 10818 | const struct cpumask *maskp; |
7bb03bbf JS |
10819 | #ifdef CONFIG_X86 |
10820 | struct cpuinfo_x86 *cpuinfo; | |
10821 | #endif | |
7bb03bbf JS |
10822 | |
10823 | /* Init cpu_map array */ | |
d9954a2d JS |
10824 | for_each_possible_cpu(cpu) { |
10825 | cpup = &phba->sli4_hba.cpu_map[cpu]; | |
10826 | cpup->phys_id = LPFC_VECTOR_MAP_EMPTY; | |
10827 | cpup->core_id = LPFC_VECTOR_MAP_EMPTY; | |
10828 | cpup->hdwq = LPFC_VECTOR_MAP_EMPTY; | |
10829 | cpup->eq = LPFC_VECTOR_MAP_EMPTY; | |
10830 | cpup->irq = LPFC_VECTOR_MAP_EMPTY; | |
10831 | cpup->flag = 0; | |
10832 | } | |
7bb03bbf | 10833 | |
6a828b0f | 10834 | max_phys_id = 0; |
d9954a2d | 10835 | min_phys_id = LPFC_VECTOR_MAP_EMPTY; |
6a828b0f | 10836 | max_core_id = 0; |
d9954a2d | 10837 | min_core_id = LPFC_VECTOR_MAP_EMPTY; |
7bb03bbf JS |
10838 | |
10839 | /* Update CPU map with physical id and core id of each CPU */ | |
222e9239 JS |
10840 | for_each_present_cpu(cpu) { |
10841 | cpup = &phba->sli4_hba.cpu_map[cpu]; | |
7bb03bbf JS |
10842 | #ifdef CONFIG_X86 |
10843 | cpuinfo = &cpu_data(cpu); | |
10844 | cpup->phys_id = cpuinfo->phys_proc_id; | |
10845 | cpup->core_id = cpuinfo->cpu_core_id; | |
d9954a2d JS |
10846 | if (lpfc_find_hyper(phba, cpu, cpup->phys_id, cpup->core_id)) |
10847 | cpup->flag |= LPFC_CPU_MAP_HYPER; | |
7bb03bbf JS |
10848 | #else |
10849 | /* No distinction between CPUs for other platforms */ | |
10850 | cpup->phys_id = 0; | |
6a828b0f | 10851 | cpup->core_id = cpu; |
7bb03bbf | 10852 | #endif |
6a828b0f | 10853 | |
b3295c2a | 10854 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
3ad348d9 JS |
10855 | "3328 CPU %d physid %d coreid %d flag x%x\n", |
10856 | cpu, cpup->phys_id, cpup->core_id, cpup->flag); | |
6a828b0f JS |
10857 | |
10858 | if (cpup->phys_id > max_phys_id) | |
10859 | max_phys_id = cpup->phys_id; | |
10860 | if (cpup->phys_id < min_phys_id) | |
10861 | min_phys_id = cpup->phys_id; | |
10862 | ||
10863 | if (cpup->core_id > max_core_id) | |
10864 | max_core_id = cpup->core_id; | |
10865 | if (cpup->core_id < min_core_id) | |
10866 | min_core_id = cpup->core_id; | |
7bb03bbf | 10867 | } |
7bb03bbf | 10868 | |
32517fc0 JS |
10869 | for_each_possible_cpu(i) { |
10870 | struct lpfc_eq_intr_info *eqi = | |
10871 | per_cpu_ptr(phba->sli4_hba.eq_info, i); | |
10872 | ||
10873 | INIT_LIST_HEAD(&eqi->list); | |
10874 | eqi->icnt = 0; | |
10875 | } | |
10876 | ||
d9954a2d JS |
10877 | /* This loop sets up all CPUs that are affinitized with a |
10878 | * irq vector assigned to the driver. All affinitized CPUs | |
657add4e | 10879 | * will get a link to that vectors IRQ and EQ. |
d9954a2d | 10880 | */ |
75508a8b | 10881 | for (idx = 0; idx < phba->cfg_irq_chann; idx++) { |
657add4e | 10882 | /* Get a CPU mask for all CPUs affinitized to this vector */ |
75508a8b JS |
10883 | maskp = pci_irq_get_affinity(phba->pcidev, idx); |
10884 | if (!maskp) | |
10885 | continue; | |
10886 | ||
657add4e JS |
10887 | i = 0; |
10888 | /* Loop through all CPUs associated with vector idx */ | |
75508a8b | 10889 | for_each_cpu_and(cpu, maskp, cpu_present_mask) { |
657add4e | 10890 | /* Set the EQ index and IRQ for that vector */ |
75508a8b | 10891 | cpup = &phba->sli4_hba.cpu_map[cpu]; |
6a828b0f | 10892 | cpup->eq = idx; |
6a828b0f JS |
10893 | cpup->irq = pci_irq_vector(phba->pcidev, idx); |
10894 | ||
657add4e JS |
10895 | /* If this is the first CPU thats assigned to this |
10896 | * vector, set LPFC_CPU_FIRST_IRQ. | |
10897 | */ | |
10898 | if (!i) | |
10899 | cpup->flag |= LPFC_CPU_FIRST_IRQ; | |
10900 | i++; | |
3ad348d9 JS |
10901 | |
10902 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
10903 | "3336 Set Affinity: CPU %d " | |
10904 | "irq %d eq %d flag x%x\n", | |
10905 | cpu, cpup->irq, cpup->eq, cpup->flag); | |
6a828b0f | 10906 | } |
b3295c2a | 10907 | } |
d9954a2d JS |
10908 | |
10909 | /* After looking at each irq vector assigned to this pcidev, its | |
10910 | * possible to see that not ALL CPUs have been accounted for. | |
657add4e JS |
10911 | * Next we will set any unassigned (unaffinitized) cpu map |
10912 | * entries to a IRQ on the same phys_id. | |
d9954a2d JS |
10913 | */ |
10914 | first_cpu = cpumask_first(cpu_present_mask); | |
10915 | start_cpu = first_cpu; | |
10916 | ||
10917 | for_each_present_cpu(cpu) { | |
10918 | cpup = &phba->sli4_hba.cpu_map[cpu]; | |
10919 | ||
10920 | /* Is this CPU entry unassigned */ | |
10921 | if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) { | |
10922 | /* Mark CPU as IRQ not assigned by the kernel */ | |
10923 | cpup->flag |= LPFC_CPU_MAP_UNASSIGN; | |
10924 | ||
657add4e | 10925 | /* If so, find a new_cpup thats on the the SAME |
d9954a2d JS |
10926 | * phys_id as cpup. start_cpu will start where we |
10927 | * left off so all unassigned entries don't get assgined | |
10928 | * the IRQ of the first entry. | |
10929 | */ | |
10930 | new_cpu = start_cpu; | |
10931 | for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { | |
10932 | new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; | |
10933 | if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) && | |
10934 | (new_cpup->irq != LPFC_VECTOR_MAP_EMPTY) && | |
10935 | (new_cpup->phys_id == cpup->phys_id)) | |
10936 | goto found_same; | |
10937 | new_cpu = cpumask_next( | |
10938 | new_cpu, cpu_present_mask); | |
10939 | if (new_cpu == nr_cpumask_bits) | |
10940 | new_cpu = first_cpu; | |
10941 | } | |
10942 | /* At this point, we leave the CPU as unassigned */ | |
10943 | continue; | |
10944 | found_same: | |
10945 | /* We found a matching phys_id, so copy the IRQ info */ | |
10946 | cpup->eq = new_cpup->eq; | |
d9954a2d JS |
10947 | cpup->irq = new_cpup->irq; |
10948 | ||
10949 | /* Bump start_cpu to the next slot to minmize the | |
10950 | * chance of having multiple unassigned CPU entries | |
10951 | * selecting the same IRQ. | |
10952 | */ | |
10953 | start_cpu = cpumask_next(new_cpu, cpu_present_mask); | |
10954 | if (start_cpu == nr_cpumask_bits) | |
10955 | start_cpu = first_cpu; | |
10956 | ||
657add4e | 10957 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
d9954a2d | 10958 | "3337 Set Affinity: CPU %d " |
657add4e | 10959 | "irq %d from id %d same " |
d9954a2d | 10960 | "phys_id (%d)\n", |
657add4e | 10961 | cpu, cpup->irq, new_cpu, cpup->phys_id); |
d9954a2d JS |
10962 | } |
10963 | } | |
10964 | ||
10965 | /* Set any unassigned cpu map entries to a IRQ on any phys_id */ | |
10966 | start_cpu = first_cpu; | |
10967 | ||
10968 | for_each_present_cpu(cpu) { | |
10969 | cpup = &phba->sli4_hba.cpu_map[cpu]; | |
10970 | ||
10971 | /* Is this entry unassigned */ | |
10972 | if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) { | |
10973 | /* Mark it as IRQ not assigned by the kernel */ | |
10974 | cpup->flag |= LPFC_CPU_MAP_UNASSIGN; | |
10975 | ||
657add4e | 10976 | /* If so, find a new_cpup thats on ANY phys_id |
d9954a2d JS |
10977 | * as the cpup. start_cpu will start where we |
10978 | * left off so all unassigned entries don't get | |
10979 | * assigned the IRQ of the first entry. | |
10980 | */ | |
10981 | new_cpu = start_cpu; | |
10982 | for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { | |
10983 | new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; | |
10984 | if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) && | |
10985 | (new_cpup->irq != LPFC_VECTOR_MAP_EMPTY)) | |
10986 | goto found_any; | |
10987 | new_cpu = cpumask_next( | |
10988 | new_cpu, cpu_present_mask); | |
10989 | if (new_cpu == nr_cpumask_bits) | |
10990 | new_cpu = first_cpu; | |
10991 | } | |
10992 | /* We should never leave an entry unassigned */ | |
10993 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
10994 | "3339 Set Affinity: CPU %d " | |
657add4e JS |
10995 | "irq %d UNASSIGNED\n", |
10996 | cpup->hdwq, cpup->irq); | |
d9954a2d JS |
10997 | continue; |
10998 | found_any: | |
10999 | /* We found an available entry, copy the IRQ info */ | |
11000 | cpup->eq = new_cpup->eq; | |
d9954a2d JS |
11001 | cpup->irq = new_cpup->irq; |
11002 | ||
11003 | /* Bump start_cpu to the next slot to minmize the | |
11004 | * chance of having multiple unassigned CPU entries | |
11005 | * selecting the same IRQ. | |
11006 | */ | |
11007 | start_cpu = cpumask_next(new_cpu, cpu_present_mask); | |
11008 | if (start_cpu == nr_cpumask_bits) | |
11009 | start_cpu = first_cpu; | |
11010 | ||
657add4e | 11011 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
d9954a2d | 11012 | "3338 Set Affinity: CPU %d " |
657add4e JS |
11013 | "irq %d from id %d (%d/%d)\n", |
11014 | cpu, cpup->irq, new_cpu, | |
d9954a2d JS |
11015 | new_cpup->phys_id, new_cpup->core_id); |
11016 | } | |
11017 | } | |
657add4e | 11018 | |
3ad348d9 JS |
11019 | /* Assign hdwq indices that are unique across all cpus in the map |
11020 | * that are also FIRST_CPUs. | |
11021 | */ | |
11022 | idx = 0; | |
11023 | for_each_present_cpu(cpu) { | |
11024 | cpup = &phba->sli4_hba.cpu_map[cpu]; | |
11025 | ||
11026 | /* Only FIRST IRQs get a hdwq index assignment. */ | |
11027 | if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) | |
11028 | continue; | |
11029 | ||
11030 | /* 1 to 1, the first LPFC_CPU_FIRST_IRQ cpus to a unique hdwq */ | |
11031 | cpup->hdwq = idx; | |
11032 | idx++; | |
11033 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11034 | "3333 Set Affinity: CPU %d (phys %d core %d): " | |
11035 | "hdwq %d eq %d irq %d flg x%x\n", | |
11036 | cpu, cpup->phys_id, cpup->core_id, | |
11037 | cpup->hdwq, cpup->eq, cpup->irq, cpup->flag); | |
11038 | } | |
657add4e JS |
11039 | /* Finally we need to associate a hdwq with each cpu_map entry |
11040 | * This will be 1 to 1 - hdwq to cpu, unless there are less | |
11041 | * hardware queues then CPUs. For that case we will just round-robin | |
11042 | * the available hardware queues as they get assigned to CPUs. | |
3ad348d9 JS |
11043 | * The next_idx is the idx from the FIRST_CPU loop above to account |
11044 | * for irq_chann < hdwq. The idx is used for round-robin assignments | |
11045 | * and needs to start at 0. | |
657add4e | 11046 | */ |
3ad348d9 | 11047 | next_idx = idx; |
657add4e | 11048 | start_cpu = 0; |
3ad348d9 | 11049 | idx = 0; |
657add4e JS |
11050 | for_each_present_cpu(cpu) { |
11051 | cpup = &phba->sli4_hba.cpu_map[cpu]; | |
657add4e | 11052 | |
3ad348d9 JS |
11053 | /* FIRST cpus are already mapped. */ |
11054 | if (cpup->flag & LPFC_CPU_FIRST_IRQ) | |
11055 | continue; | |
11056 | ||
11057 | /* If the cfg_irq_chann < cfg_hdw_queue, set the hdwq | |
11058 | * of the unassigned cpus to the next idx so that all | |
11059 | * hdw queues are fully utilized. | |
11060 | */ | |
11061 | if (next_idx < phba->cfg_hdw_queue) { | |
11062 | cpup->hdwq = next_idx; | |
11063 | next_idx++; | |
11064 | continue; | |
11065 | } | |
11066 | ||
11067 | /* Not a First CPU and all hdw_queues are used. Reuse a | |
11068 | * Hardware Queue for another CPU, so be smart about it | |
11069 | * and pick one that has its IRQ/EQ mapped to the same phys_id | |
11070 | * (CPU package) and core_id. | |
11071 | */ | |
11072 | new_cpu = start_cpu; | |
11073 | for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { | |
11074 | new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; | |
11075 | if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY && | |
11076 | new_cpup->phys_id == cpup->phys_id && | |
11077 | new_cpup->core_id == cpup->core_id) { | |
11078 | goto found_hdwq; | |
657add4e | 11079 | } |
3ad348d9 JS |
11080 | new_cpu = cpumask_next(new_cpu, cpu_present_mask); |
11081 | if (new_cpu == nr_cpumask_bits) | |
11082 | new_cpu = first_cpu; | |
11083 | } | |
657add4e | 11084 | |
3ad348d9 JS |
11085 | /* If we can't match both phys_id and core_id, |
11086 | * settle for just a phys_id match. | |
11087 | */ | |
11088 | new_cpu = start_cpu; | |
11089 | for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { | |
11090 | new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; | |
11091 | if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY && | |
11092 | new_cpup->phys_id == cpup->phys_id) | |
11093 | goto found_hdwq; | |
11094 | ||
11095 | new_cpu = cpumask_next(new_cpu, cpu_present_mask); | |
11096 | if (new_cpu == nr_cpumask_bits) | |
11097 | new_cpu = first_cpu; | |
657add4e | 11098 | } |
3ad348d9 JS |
11099 | |
11100 | /* Otherwise just round robin on cfg_hdw_queue */ | |
11101 | cpup->hdwq = idx % phba->cfg_hdw_queue; | |
11102 | idx++; | |
11103 | goto logit; | |
11104 | found_hdwq: | |
11105 | /* We found an available entry, copy the IRQ info */ | |
11106 | start_cpu = cpumask_next(new_cpu, cpu_present_mask); | |
11107 | if (start_cpu == nr_cpumask_bits) | |
11108 | start_cpu = first_cpu; | |
11109 | cpup->hdwq = new_cpup->hdwq; | |
11110 | logit: | |
657add4e JS |
11111 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
11112 | "3335 Set Affinity: CPU %d (phys %d core %d): " | |
11113 | "hdwq %d eq %d irq %d flg x%x\n", | |
11114 | cpu, cpup->phys_id, cpup->core_id, | |
11115 | cpup->hdwq, cpup->eq, cpup->irq, cpup->flag); | |
657add4e JS |
11116 | } |
11117 | ||
11118 | /* The cpu_map array will be used later during initialization | |
11119 | * when EQ / CQ / WQs are allocated and configured. | |
11120 | */ | |
b3295c2a | 11121 | return; |
7bb03bbf | 11122 | } |
7bb03bbf | 11123 | |
da0436e9 JS |
11124 | /** |
11125 | * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device | |
11126 | * @phba: pointer to lpfc hba data structure. | |
11127 | * | |
11128 | * This routine is invoked to enable the MSI-X interrupt vectors to device | |
45ffac19 | 11129 | * with SLI-4 interface spec. |
da0436e9 JS |
11130 | * |
11131 | * Return codes | |
af901ca1 | 11132 | * 0 - successful |
da0436e9 JS |
11133 | * other values - error |
11134 | **/ | |
11135 | static int | |
11136 | lpfc_sli4_enable_msix(struct lpfc_hba *phba) | |
11137 | { | |
75baf696 | 11138 | int vectors, rc, index; |
b83d005e | 11139 | char *name; |
da0436e9 JS |
11140 | |
11141 | /* Set up MSI-X multi-message vectors */ | |
6a828b0f | 11142 | vectors = phba->cfg_irq_chann; |
45ffac19 | 11143 | |
f358dd0c | 11144 | rc = pci_alloc_irq_vectors(phba->pcidev, |
75508a8b | 11145 | 1, |
f358dd0c | 11146 | vectors, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); |
4f871e1b | 11147 | if (rc < 0) { |
da0436e9 JS |
11148 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
11149 | "0484 PCI enable MSI-X failed (%d)\n", rc); | |
029165ac | 11150 | goto vec_fail_out; |
da0436e9 | 11151 | } |
4f871e1b | 11152 | vectors = rc; |
75baf696 | 11153 | |
7bb03bbf | 11154 | /* Assign MSI-X vectors to interrupt handlers */ |
67d12733 | 11155 | for (index = 0; index < vectors; index++) { |
b83d005e JS |
11156 | name = phba->sli4_hba.hba_eq_hdl[index].handler_name; |
11157 | memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ); | |
11158 | snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ, | |
4305f183 | 11159 | LPFC_DRIVER_HANDLER_NAME"%d", index); |
da0436e9 | 11160 | |
895427bd JS |
11161 | phba->sli4_hba.hba_eq_hdl[index].idx = index; |
11162 | phba->sli4_hba.hba_eq_hdl[index].phba = phba; | |
7370d10a JS |
11163 | rc = request_irq(pci_irq_vector(phba->pcidev, index), |
11164 | &lpfc_sli4_hba_intr_handler, 0, | |
11165 | name, | |
11166 | &phba->sli4_hba.hba_eq_hdl[index]); | |
da0436e9 JS |
11167 | if (rc) { |
11168 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
11169 | "0486 MSI-X fast-path (%d) " | |
11170 | "request_irq failed (%d)\n", index, rc); | |
11171 | goto cfg_fail_out; | |
11172 | } | |
11173 | } | |
11174 | ||
6a828b0f | 11175 | if (vectors != phba->cfg_irq_chann) { |
82c3e9ba JS |
11176 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
11177 | "3238 Reducing IO channels to match number of " | |
11178 | "MSI-X vectors, requested %d got %d\n", | |
6a828b0f JS |
11179 | phba->cfg_irq_chann, vectors); |
11180 | if (phba->cfg_irq_chann > vectors) | |
11181 | phba->cfg_irq_chann = vectors; | |
982ab128 | 11182 | if (phba->nvmet_support && (phba->cfg_nvmet_mrq > vectors)) |
cdb42bec | 11183 | phba->cfg_nvmet_mrq = vectors; |
82c3e9ba | 11184 | } |
7bb03bbf | 11185 | |
da0436e9 JS |
11186 | return rc; |
11187 | ||
11188 | cfg_fail_out: | |
11189 | /* free the irq already requested */ | |
895427bd JS |
11190 | for (--index; index >= 0; index--) |
11191 | free_irq(pci_irq_vector(phba->pcidev, index), | |
11192 | &phba->sli4_hba.hba_eq_hdl[index]); | |
da0436e9 | 11193 | |
da0436e9 | 11194 | /* Unconfigure MSI-X capability structure */ |
45ffac19 | 11195 | pci_free_irq_vectors(phba->pcidev); |
029165ac AG |
11196 | |
11197 | vec_fail_out: | |
da0436e9 JS |
11198 | return rc; |
11199 | } | |
11200 | ||
da0436e9 JS |
11201 | /** |
11202 | * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device | |
11203 | * @phba: pointer to lpfc hba data structure. | |
11204 | * | |
11205 | * This routine is invoked to enable the MSI interrupt mode to device with | |
07b1b914 JS |
11206 | * SLI-4 interface spec. The kernel function pci_alloc_irq_vectors() is |
11207 | * called to enable the MSI vector. The device driver is responsible for | |
11208 | * calling the request_irq() to register MSI vector with a interrupt the | |
11209 | * handler, which is done in this function. | |
da0436e9 JS |
11210 | * |
11211 | * Return codes | |
af901ca1 | 11212 | * 0 - successful |
da0436e9 JS |
11213 | * other values - error |
11214 | **/ | |
11215 | static int | |
11216 | lpfc_sli4_enable_msi(struct lpfc_hba *phba) | |
11217 | { | |
11218 | int rc, index; | |
11219 | ||
07b1b914 JS |
11220 | rc = pci_alloc_irq_vectors(phba->pcidev, 1, 1, |
11221 | PCI_IRQ_MSI | PCI_IRQ_AFFINITY); | |
11222 | if (rc > 0) | |
da0436e9 JS |
11223 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
11224 | "0487 PCI enable MSI mode success.\n"); | |
11225 | else { | |
11226 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
11227 | "0488 PCI enable MSI mode failed (%d)\n", rc); | |
07b1b914 | 11228 | return rc ? rc : -1; |
da0436e9 JS |
11229 | } |
11230 | ||
11231 | rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler, | |
ed243d37 | 11232 | 0, LPFC_DRIVER_NAME, phba); |
da0436e9 | 11233 | if (rc) { |
07b1b914 | 11234 | pci_free_irq_vectors(phba->pcidev); |
da0436e9 JS |
11235 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, |
11236 | "0490 MSI request_irq failed (%d)\n", rc); | |
75baf696 | 11237 | return rc; |
da0436e9 JS |
11238 | } |
11239 | ||
6a828b0f | 11240 | for (index = 0; index < phba->cfg_irq_chann; index++) { |
895427bd JS |
11241 | phba->sli4_hba.hba_eq_hdl[index].idx = index; |
11242 | phba->sli4_hba.hba_eq_hdl[index].phba = phba; | |
da0436e9 JS |
11243 | } |
11244 | ||
75baf696 | 11245 | return 0; |
da0436e9 JS |
11246 | } |
11247 | ||
da0436e9 JS |
11248 | /** |
11249 | * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device | |
11250 | * @phba: pointer to lpfc hba data structure. | |
11251 | * | |
11252 | * This routine is invoked to enable device interrupt and associate driver's | |
11253 | * interrupt handler(s) to interrupt vector(s) to device with SLI-4 | |
11254 | * interface spec. Depends on the interrupt mode configured to the driver, | |
11255 | * the driver will try to fallback from the configured interrupt mode to an | |
11256 | * interrupt mode which is supported by the platform, kernel, and device in | |
11257 | * the order of: | |
11258 | * MSI-X -> MSI -> IRQ. | |
11259 | * | |
11260 | * Return codes | |
af901ca1 | 11261 | * 0 - successful |
da0436e9 JS |
11262 | * other values - error |
11263 | **/ | |
11264 | static uint32_t | |
11265 | lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode) | |
11266 | { | |
11267 | uint32_t intr_mode = LPFC_INTR_ERROR; | |
895427bd | 11268 | int retval, idx; |
da0436e9 JS |
11269 | |
11270 | if (cfg_mode == 2) { | |
11271 | /* Preparation before conf_msi mbox cmd */ | |
11272 | retval = 0; | |
11273 | if (!retval) { | |
11274 | /* Now, try to enable MSI-X interrupt mode */ | |
11275 | retval = lpfc_sli4_enable_msix(phba); | |
11276 | if (!retval) { | |
11277 | /* Indicate initialization to MSI-X mode */ | |
11278 | phba->intr_type = MSIX; | |
11279 | intr_mode = 2; | |
11280 | } | |
11281 | } | |
11282 | } | |
11283 | ||
11284 | /* Fallback to MSI if MSI-X initialization failed */ | |
11285 | if (cfg_mode >= 1 && phba->intr_type == NONE) { | |
11286 | retval = lpfc_sli4_enable_msi(phba); | |
11287 | if (!retval) { | |
11288 | /* Indicate initialization to MSI mode */ | |
11289 | phba->intr_type = MSI; | |
11290 | intr_mode = 1; | |
11291 | } | |
11292 | } | |
11293 | ||
11294 | /* Fallback to INTx if both MSI-X/MSI initalization failed */ | |
11295 | if (phba->intr_type == NONE) { | |
11296 | retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler, | |
11297 | IRQF_SHARED, LPFC_DRIVER_NAME, phba); | |
11298 | if (!retval) { | |
895427bd JS |
11299 | struct lpfc_hba_eq_hdl *eqhdl; |
11300 | ||
da0436e9 JS |
11301 | /* Indicate initialization to INTx mode */ |
11302 | phba->intr_type = INTx; | |
11303 | intr_mode = 0; | |
895427bd | 11304 | |
6a828b0f | 11305 | for (idx = 0; idx < phba->cfg_irq_chann; idx++) { |
895427bd JS |
11306 | eqhdl = &phba->sli4_hba.hba_eq_hdl[idx]; |
11307 | eqhdl->idx = idx; | |
11308 | eqhdl->phba = phba; | |
1ba981fd | 11309 | } |
da0436e9 JS |
11310 | } |
11311 | } | |
11312 | return intr_mode; | |
11313 | } | |
11314 | ||
11315 | /** | |
11316 | * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device | |
11317 | * @phba: pointer to lpfc hba data structure. | |
11318 | * | |
11319 | * This routine is invoked to disable device interrupt and disassociate | |
11320 | * the driver's interrupt handler(s) from interrupt vector(s) to device | |
11321 | * with SLI-4 interface spec. Depending on the interrupt mode, the driver | |
11322 | * will release the interrupt vector(s) for the message signaled interrupt. | |
11323 | **/ | |
11324 | static void | |
11325 | lpfc_sli4_disable_intr(struct lpfc_hba *phba) | |
11326 | { | |
11327 | /* Disable the currently initialized interrupt mode */ | |
45ffac19 CH |
11328 | if (phba->intr_type == MSIX) { |
11329 | int index; | |
11330 | ||
11331 | /* Free up MSI-X multi-message vectors */ | |
6a828b0f | 11332 | for (index = 0; index < phba->cfg_irq_chann; index++) { |
b3295c2a JS |
11333 | irq_set_affinity_hint( |
11334 | pci_irq_vector(phba->pcidev, index), | |
11335 | NULL); | |
895427bd JS |
11336 | free_irq(pci_irq_vector(phba->pcidev, index), |
11337 | &phba->sli4_hba.hba_eq_hdl[index]); | |
b3295c2a | 11338 | } |
45ffac19 | 11339 | } else { |
da0436e9 | 11340 | free_irq(phba->pcidev->irq, phba); |
45ffac19 CH |
11341 | } |
11342 | ||
11343 | pci_free_irq_vectors(phba->pcidev); | |
da0436e9 JS |
11344 | |
11345 | /* Reset interrupt management states */ | |
11346 | phba->intr_type = NONE; | |
11347 | phba->sli.slistat.sli_intr = 0; | |
da0436e9 JS |
11348 | } |
11349 | ||
11350 | /** | |
11351 | * lpfc_unset_hba - Unset SLI3 hba device initialization | |
11352 | * @phba: pointer to lpfc hba data structure. | |
11353 | * | |
11354 | * This routine is invoked to unset the HBA device initialization steps to | |
11355 | * a device with SLI-3 interface spec. | |
11356 | **/ | |
11357 | static void | |
11358 | lpfc_unset_hba(struct lpfc_hba *phba) | |
11359 | { | |
11360 | struct lpfc_vport *vport = phba->pport; | |
11361 | struct Scsi_Host *shost = lpfc_shost_from_vport(vport); | |
11362 | ||
11363 | spin_lock_irq(shost->host_lock); | |
11364 | vport->load_flag |= FC_UNLOADING; | |
11365 | spin_unlock_irq(shost->host_lock); | |
11366 | ||
72859909 JS |
11367 | kfree(phba->vpi_bmask); |
11368 | kfree(phba->vpi_ids); | |
11369 | ||
da0436e9 JS |
11370 | lpfc_stop_hba_timers(phba); |
11371 | ||
11372 | phba->pport->work_port_events = 0; | |
11373 | ||
11374 | lpfc_sli_hba_down(phba); | |
11375 | ||
11376 | lpfc_sli_brdrestart(phba); | |
11377 | ||
11378 | lpfc_sli_disable_intr(phba); | |
11379 | ||
11380 | return; | |
11381 | } | |
11382 | ||
5af5eee7 JS |
11383 | /** |
11384 | * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy | |
11385 | * @phba: Pointer to HBA context object. | |
11386 | * | |
11387 | * This function is called in the SLI4 code path to wait for completion | |
11388 | * of device's XRIs exchange busy. It will check the XRI exchange busy | |
11389 | * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after | |
11390 | * that, it will check the XRI exchange busy on outstanding FCP and ELS | |
11391 | * I/Os every 30 seconds, log error message, and wait forever. Only when | |
11392 | * all XRI exchange busy complete, the driver unload shall proceed with | |
11393 | * invoking the function reset ioctl mailbox command to the CNA and the | |
11394 | * the rest of the driver unload resource release. | |
11395 | **/ | |
11396 | static void | |
11397 | lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba) | |
11398 | { | |
5e5b511d JS |
11399 | struct lpfc_sli4_hdw_queue *qp; |
11400 | int idx, ccnt, fcnt; | |
5af5eee7 | 11401 | int wait_time = 0; |
5e5b511d | 11402 | int io_xri_cmpl = 1; |
86c67379 | 11403 | int nvmet_xri_cmpl = 1; |
895427bd | 11404 | int fcp_xri_cmpl = 1; |
5af5eee7 JS |
11405 | int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list); |
11406 | ||
c3725bdc JS |
11407 | /* Driver just aborted IOs during the hba_unset process. Pause |
11408 | * here to give the HBA time to complete the IO and get entries | |
11409 | * into the abts lists. | |
11410 | */ | |
11411 | msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1 * 5); | |
11412 | ||
11413 | /* Wait for NVME pending IO to flush back to transport. */ | |
11414 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) | |
11415 | lpfc_nvme_wait_for_io_drain(phba); | |
11416 | ||
5e5b511d JS |
11417 | ccnt = 0; |
11418 | fcnt = 0; | |
11419 | for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { | |
11420 | qp = &phba->sli4_hba.hdwq[idx]; | |
11421 | fcp_xri_cmpl = list_empty( | |
11422 | &qp->lpfc_abts_scsi_buf_list); | |
11423 | if (!fcp_xri_cmpl) /* if list is NOT empty */ | |
11424 | fcnt++; | |
11425 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
11426 | io_xri_cmpl = list_empty( | |
11427 | &qp->lpfc_abts_nvme_buf_list); | |
11428 | if (!io_xri_cmpl) /* if list is NOT empty */ | |
11429 | ccnt++; | |
11430 | } | |
11431 | } | |
11432 | if (ccnt) | |
11433 | io_xri_cmpl = 0; | |
11434 | if (fcnt) | |
11435 | fcp_xri_cmpl = 0; | |
11436 | ||
86c67379 | 11437 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { |
86c67379 JS |
11438 | nvmet_xri_cmpl = |
11439 | list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); | |
11440 | } | |
895427bd | 11441 | |
5e5b511d | 11442 | while (!fcp_xri_cmpl || !els_xri_cmpl || !io_xri_cmpl || |
f358dd0c | 11443 | !nvmet_xri_cmpl) { |
5af5eee7 | 11444 | if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) { |
68c9b55d JS |
11445 | if (!nvmet_xri_cmpl) |
11446 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11447 | "6424 NVMET XRI exchange busy " | |
11448 | "wait time: %d seconds.\n", | |
11449 | wait_time/1000); | |
5e5b511d | 11450 | if (!io_xri_cmpl) |
895427bd JS |
11451 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
11452 | "6100 NVME XRI exchange busy " | |
11453 | "wait time: %d seconds.\n", | |
11454 | wait_time/1000); | |
5af5eee7 JS |
11455 | if (!fcp_xri_cmpl) |
11456 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11457 | "2877 FCP XRI exchange busy " | |
11458 | "wait time: %d seconds.\n", | |
11459 | wait_time/1000); | |
11460 | if (!els_xri_cmpl) | |
11461 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11462 | "2878 ELS XRI exchange busy " | |
11463 | "wait time: %d seconds.\n", | |
11464 | wait_time/1000); | |
11465 | msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2); | |
11466 | wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2; | |
11467 | } else { | |
11468 | msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1); | |
11469 | wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1; | |
11470 | } | |
5e5b511d JS |
11471 | |
11472 | ccnt = 0; | |
11473 | fcnt = 0; | |
11474 | for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { | |
11475 | qp = &phba->sli4_hba.hdwq[idx]; | |
11476 | fcp_xri_cmpl = list_empty( | |
11477 | &qp->lpfc_abts_scsi_buf_list); | |
11478 | if (!fcp_xri_cmpl) /* if list is NOT empty */ | |
11479 | fcnt++; | |
11480 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
11481 | io_xri_cmpl = list_empty( | |
11482 | &qp->lpfc_abts_nvme_buf_list); | |
11483 | if (!io_xri_cmpl) /* if list is NOT empty */ | |
11484 | ccnt++; | |
11485 | } | |
11486 | } | |
11487 | if (ccnt) | |
11488 | io_xri_cmpl = 0; | |
11489 | if (fcnt) | |
11490 | fcp_xri_cmpl = 0; | |
11491 | ||
86c67379 | 11492 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { |
86c67379 JS |
11493 | nvmet_xri_cmpl = list_empty( |
11494 | &phba->sli4_hba.lpfc_abts_nvmet_ctx_list); | |
11495 | } | |
5af5eee7 JS |
11496 | els_xri_cmpl = |
11497 | list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list); | |
f358dd0c | 11498 | |
5af5eee7 JS |
11499 | } |
11500 | } | |
11501 | ||
da0436e9 JS |
11502 | /** |
11503 | * lpfc_sli4_hba_unset - Unset the fcoe hba | |
11504 | * @phba: Pointer to HBA context object. | |
11505 | * | |
11506 | * This function is called in the SLI4 code path to reset the HBA's FCoE | |
11507 | * function. The caller is not required to hold any lock. This routine | |
11508 | * issues PCI function reset mailbox command to reset the FCoE function. | |
11509 | * At the end of the function, it calls lpfc_hba_down_post function to | |
11510 | * free any pending commands. | |
11511 | **/ | |
11512 | static void | |
11513 | lpfc_sli4_hba_unset(struct lpfc_hba *phba) | |
11514 | { | |
11515 | int wait_cnt = 0; | |
11516 | LPFC_MBOXQ_t *mboxq; | |
912e3acd | 11517 | struct pci_dev *pdev = phba->pcidev; |
da0436e9 JS |
11518 | |
11519 | lpfc_stop_hba_timers(phba); | |
cdb42bec JS |
11520 | if (phba->pport) |
11521 | phba->sli4_hba.intr_enable = 0; | |
da0436e9 JS |
11522 | |
11523 | /* | |
11524 | * Gracefully wait out the potential current outstanding asynchronous | |
11525 | * mailbox command. | |
11526 | */ | |
11527 | ||
11528 | /* First, block any pending async mailbox command from posted */ | |
11529 | spin_lock_irq(&phba->hbalock); | |
11530 | phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK; | |
11531 | spin_unlock_irq(&phba->hbalock); | |
11532 | /* Now, trying to wait it out if we can */ | |
11533 | while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) { | |
11534 | msleep(10); | |
11535 | if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT) | |
11536 | break; | |
11537 | } | |
11538 | /* Forcefully release the outstanding mailbox command if timed out */ | |
11539 | if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) { | |
11540 | spin_lock_irq(&phba->hbalock); | |
11541 | mboxq = phba->sli.mbox_active; | |
11542 | mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED; | |
11543 | __lpfc_mbox_cmpl_put(phba, mboxq); | |
11544 | phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; | |
11545 | phba->sli.mbox_active = NULL; | |
11546 | spin_unlock_irq(&phba->hbalock); | |
11547 | } | |
11548 | ||
5af5eee7 JS |
11549 | /* Abort all iocbs associated with the hba */ |
11550 | lpfc_sli_hba_iocb_abort(phba); | |
11551 | ||
11552 | /* Wait for completion of device XRI exchange busy */ | |
11553 | lpfc_sli4_xri_exchange_busy_wait(phba); | |
11554 | ||
da0436e9 JS |
11555 | /* Disable PCI subsystem interrupt */ |
11556 | lpfc_sli4_disable_intr(phba); | |
11557 | ||
912e3acd JS |
11558 | /* Disable SR-IOV if enabled */ |
11559 | if (phba->cfg_sriov_nr_virtfn) | |
11560 | pci_disable_sriov(pdev); | |
11561 | ||
da0436e9 JS |
11562 | /* Stop kthread signal shall trigger work_done one more time */ |
11563 | kthread_stop(phba->worker_thread); | |
11564 | ||
d2cc9bcd | 11565 | /* Disable FW logging to host memory */ |
1165a5c2 | 11566 | lpfc_ras_stop_fwlog(phba); |
d2cc9bcd | 11567 | |
d1f525aa JS |
11568 | /* Unset the queues shared with the hardware then release all |
11569 | * allocated resources. | |
11570 | */ | |
11571 | lpfc_sli4_queue_unset(phba); | |
11572 | lpfc_sli4_queue_destroy(phba); | |
11573 | ||
3677a3a7 JS |
11574 | /* Reset SLI4 HBA FCoE function */ |
11575 | lpfc_pci_function_reset(phba); | |
11576 | ||
1165a5c2 JS |
11577 | /* Free RAS DMA memory */ |
11578 | if (phba->ras_fwlog.ras_enabled) | |
11579 | lpfc_sli4_ras_dma_free(phba); | |
11580 | ||
da0436e9 | 11581 | /* Stop the SLI4 device port */ |
1ffdd2c0 JS |
11582 | if (phba->pport) |
11583 | phba->pport->work_port_events = 0; | |
da0436e9 JS |
11584 | } |
11585 | ||
28baac74 JS |
11586 | /** |
11587 | * lpfc_pc_sli4_params_get - Get the SLI4_PARAMS port capabilities. | |
11588 | * @phba: Pointer to HBA context object. | |
11589 | * @mboxq: Pointer to the mailboxq memory for the mailbox command response. | |
11590 | * | |
11591 | * This function is called in the SLI4 code path to read the port's | |
11592 | * sli4 capabilities. | |
11593 | * | |
11594 | * This function may be be called from any context that can block-wait | |
11595 | * for the completion. The expectation is that this routine is called | |
11596 | * typically from probe_one or from the online routine. | |
11597 | **/ | |
11598 | int | |
11599 | lpfc_pc_sli4_params_get(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq) | |
11600 | { | |
11601 | int rc; | |
11602 | struct lpfc_mqe *mqe; | |
11603 | struct lpfc_pc_sli4_params *sli4_params; | |
11604 | uint32_t mbox_tmo; | |
11605 | ||
11606 | rc = 0; | |
11607 | mqe = &mboxq->u.mqe; | |
11608 | ||
11609 | /* Read the port's SLI4 Parameters port capabilities */ | |
fedd3b7b | 11610 | lpfc_pc_sli4_params(mboxq); |
28baac74 JS |
11611 | if (!phba->sli4_hba.intr_enable) |
11612 | rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
11613 | else { | |
a183a15f | 11614 | mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq); |
28baac74 JS |
11615 | rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo); |
11616 | } | |
11617 | ||
11618 | if (unlikely(rc)) | |
11619 | return 1; | |
11620 | ||
11621 | sli4_params = &phba->sli4_hba.pc_sli4_params; | |
11622 | sli4_params->if_type = bf_get(if_type, &mqe->un.sli4_params); | |
11623 | sli4_params->sli_rev = bf_get(sli_rev, &mqe->un.sli4_params); | |
11624 | sli4_params->sli_family = bf_get(sli_family, &mqe->un.sli4_params); | |
11625 | sli4_params->featurelevel_1 = bf_get(featurelevel_1, | |
11626 | &mqe->un.sli4_params); | |
11627 | sli4_params->featurelevel_2 = bf_get(featurelevel_2, | |
11628 | &mqe->un.sli4_params); | |
11629 | sli4_params->proto_types = mqe->un.sli4_params.word3; | |
11630 | sli4_params->sge_supp_len = mqe->un.sli4_params.sge_supp_len; | |
11631 | sli4_params->if_page_sz = bf_get(if_page_sz, &mqe->un.sli4_params); | |
11632 | sli4_params->rq_db_window = bf_get(rq_db_window, &mqe->un.sli4_params); | |
11633 | sli4_params->loopbk_scope = bf_get(loopbk_scope, &mqe->un.sli4_params); | |
11634 | sli4_params->eq_pages_max = bf_get(eq_pages, &mqe->un.sli4_params); | |
11635 | sli4_params->eqe_size = bf_get(eqe_size, &mqe->un.sli4_params); | |
11636 | sli4_params->cq_pages_max = bf_get(cq_pages, &mqe->un.sli4_params); | |
11637 | sli4_params->cqe_size = bf_get(cqe_size, &mqe->un.sli4_params); | |
11638 | sli4_params->mq_pages_max = bf_get(mq_pages, &mqe->un.sli4_params); | |
11639 | sli4_params->mqe_size = bf_get(mqe_size, &mqe->un.sli4_params); | |
11640 | sli4_params->mq_elem_cnt = bf_get(mq_elem_cnt, &mqe->un.sli4_params); | |
11641 | sli4_params->wq_pages_max = bf_get(wq_pages, &mqe->un.sli4_params); | |
11642 | sli4_params->wqe_size = bf_get(wqe_size, &mqe->un.sli4_params); | |
11643 | sli4_params->rq_pages_max = bf_get(rq_pages, &mqe->un.sli4_params); | |
11644 | sli4_params->rqe_size = bf_get(rqe_size, &mqe->un.sli4_params); | |
11645 | sli4_params->hdr_pages_max = bf_get(hdr_pages, &mqe->un.sli4_params); | |
11646 | sli4_params->hdr_size = bf_get(hdr_size, &mqe->un.sli4_params); | |
11647 | sli4_params->hdr_pp_align = bf_get(hdr_pp_align, &mqe->un.sli4_params); | |
11648 | sli4_params->sgl_pages_max = bf_get(sgl_pages, &mqe->un.sli4_params); | |
11649 | sli4_params->sgl_pp_align = bf_get(sgl_pp_align, &mqe->un.sli4_params); | |
0558056c JS |
11650 | |
11651 | /* Make sure that sge_supp_len can be handled by the driver */ | |
11652 | if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE) | |
11653 | sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE; | |
11654 | ||
28baac74 JS |
11655 | return rc; |
11656 | } | |
11657 | ||
fedd3b7b JS |
11658 | /** |
11659 | * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS. | |
11660 | * @phba: Pointer to HBA context object. | |
11661 | * @mboxq: Pointer to the mailboxq memory for the mailbox command response. | |
11662 | * | |
11663 | * This function is called in the SLI4 code path to read the port's | |
11664 | * sli4 capabilities. | |
11665 | * | |
11666 | * This function may be be called from any context that can block-wait | |
11667 | * for the completion. The expectation is that this routine is called | |
11668 | * typically from probe_one or from the online routine. | |
11669 | **/ | |
11670 | int | |
11671 | lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq) | |
11672 | { | |
11673 | int rc; | |
11674 | struct lpfc_mqe *mqe = &mboxq->u.mqe; | |
11675 | struct lpfc_pc_sli4_params *sli4_params; | |
a183a15f | 11676 | uint32_t mbox_tmo; |
fedd3b7b | 11677 | int length; |
bf316c78 | 11678 | bool exp_wqcq_pages = true; |
fedd3b7b JS |
11679 | struct lpfc_sli4_parameters *mbx_sli4_parameters; |
11680 | ||
6d368e53 JS |
11681 | /* |
11682 | * By default, the driver assumes the SLI4 port requires RPI | |
11683 | * header postings. The SLI4_PARAM response will correct this | |
11684 | * assumption. | |
11685 | */ | |
11686 | phba->sli4_hba.rpi_hdrs_in_use = 1; | |
11687 | ||
fedd3b7b JS |
11688 | /* Read the port's SLI4 Config Parameters */ |
11689 | length = (sizeof(struct lpfc_mbx_get_sli4_parameters) - | |
11690 | sizeof(struct lpfc_sli4_cfg_mhdr)); | |
11691 | lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, | |
11692 | LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS, | |
11693 | length, LPFC_SLI4_MBX_EMBED); | |
11694 | if (!phba->sli4_hba.intr_enable) | |
11695 | rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
a183a15f JS |
11696 | else { |
11697 | mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq); | |
11698 | rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo); | |
11699 | } | |
fedd3b7b JS |
11700 | if (unlikely(rc)) |
11701 | return rc; | |
11702 | sli4_params = &phba->sli4_hba.pc_sli4_params; | |
11703 | mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters; | |
11704 | sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters); | |
11705 | sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters); | |
11706 | sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters); | |
11707 | sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1, | |
11708 | mbx_sli4_parameters); | |
11709 | sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2, | |
11710 | mbx_sli4_parameters); | |
11711 | if (bf_get(cfg_phwq, mbx_sli4_parameters)) | |
11712 | phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED; | |
11713 | else | |
11714 | phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED; | |
11715 | sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len; | |
11716 | sli4_params->loopbk_scope = bf_get(loopbk_scope, mbx_sli4_parameters); | |
1ba981fd | 11717 | sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters); |
fedd3b7b JS |
11718 | sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters); |
11719 | sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters); | |
11720 | sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters); | |
11721 | sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters); | |
7365f6fd JS |
11722 | sli4_params->eqav = bf_get(cfg_eqav, mbx_sli4_parameters); |
11723 | sli4_params->cqav = bf_get(cfg_cqav, mbx_sli4_parameters); | |
0c651878 | 11724 | sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters); |
66e9e6bf | 11725 | sli4_params->bv1s = bf_get(cfg_bv1s, mbx_sli4_parameters); |
fedd3b7b JS |
11726 | sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt, |
11727 | mbx_sli4_parameters); | |
895427bd | 11728 | sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters); |
fedd3b7b JS |
11729 | sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align, |
11730 | mbx_sli4_parameters); | |
6d368e53 JS |
11731 | phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters); |
11732 | phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters); | |
c15e0704 | 11733 | |
d79c9e9d JS |
11734 | /* Check for Extended Pre-Registered SGL support */ |
11735 | phba->cfg_xpsgl = bf_get(cfg_xpsgl, mbx_sli4_parameters); | |
11736 | ||
c15e0704 JS |
11737 | /* Check for firmware nvme support */ |
11738 | rc = (bf_get(cfg_nvme, mbx_sli4_parameters) && | |
11739 | bf_get(cfg_xib, mbx_sli4_parameters)); | |
11740 | ||
11741 | if (rc) { | |
11742 | /* Save this to indicate the Firmware supports NVME */ | |
11743 | sli4_params->nvme = 1; | |
11744 | ||
11745 | /* Firmware NVME support, check driver FC4 NVME support */ | |
11746 | if (phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) { | |
11747 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME, | |
11748 | "6133 Disabling NVME support: " | |
11749 | "FC4 type not supported: x%x\n", | |
11750 | phba->cfg_enable_fc4_type); | |
11751 | goto fcponly; | |
11752 | } | |
11753 | } else { | |
11754 | /* No firmware NVME support, check driver FC4 NVME support */ | |
11755 | sli4_params->nvme = 0; | |
11756 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
11757 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME, | |
11758 | "6101 Disabling NVME support: Not " | |
11759 | "supported by firmware (%d %d) x%x\n", | |
11760 | bf_get(cfg_nvme, mbx_sli4_parameters), | |
11761 | bf_get(cfg_xib, mbx_sli4_parameters), | |
11762 | phba->cfg_enable_fc4_type); | |
11763 | fcponly: | |
11764 | phba->nvme_support = 0; | |
11765 | phba->nvmet_support = 0; | |
11766 | phba->cfg_nvmet_mrq = 0; | |
6a224b47 | 11767 | phba->cfg_nvme_seg_cnt = 0; |
c15e0704 JS |
11768 | |
11769 | /* If no FC4 type support, move to just SCSI support */ | |
11770 | if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)) | |
11771 | return -ENODEV; | |
11772 | phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP; | |
11773 | } | |
895427bd | 11774 | } |
0558056c | 11775 | |
c26c265b JS |
11776 | /* If the NVME FC4 type is enabled, scale the sg_seg_cnt to |
11777 | * accommodate 512K and 1M IOs in a single nvme buf and supply | |
11778 | * enough NVME LS iocb buffers for larger connectivity counts. | |
11779 | */ | |
11780 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
11781 | phba->cfg_sg_seg_cnt = LPFC_MAX_NVME_SEG_CNT; | |
11782 | phba->cfg_iocb_cnt = 5; | |
11783 | } | |
11784 | ||
414abe0a JS |
11785 | /* Only embed PBDE for if_type 6, PBDE support requires xib be set */ |
11786 | if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) != | |
11787 | LPFC_SLI_INTF_IF_TYPE_6) || (!bf_get(cfg_xib, mbx_sli4_parameters))) | |
11788 | phba->cfg_enable_pbde = 0; | |
0bc2b7c5 | 11789 | |
20aefac3 JS |
11790 | /* |
11791 | * To support Suppress Response feature we must satisfy 3 conditions. | |
11792 | * lpfc_suppress_rsp module parameter must be set (default). | |
11793 | * In SLI4-Parameters Descriptor: | |
11794 | * Extended Inline Buffers (XIB) must be supported. | |
11795 | * Suppress Response IU Not Supported (SRIUNS) must NOT be supported | |
11796 | * (double negative). | |
11797 | */ | |
11798 | if (phba->cfg_suppress_rsp && bf_get(cfg_xib, mbx_sli4_parameters) && | |
11799 | !(bf_get(cfg_nosr, mbx_sli4_parameters))) | |
f358dd0c | 11800 | phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP; |
20aefac3 JS |
11801 | else |
11802 | phba->cfg_suppress_rsp = 0; | |
f358dd0c | 11803 | |
0cf07f84 JS |
11804 | if (bf_get(cfg_eqdr, mbx_sli4_parameters)) |
11805 | phba->sli.sli_flag |= LPFC_SLI_USE_EQDR; | |
11806 | ||
0558056c JS |
11807 | /* Make sure that sge_supp_len can be handled by the driver */ |
11808 | if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE) | |
11809 | sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE; | |
11810 | ||
b5c53958 | 11811 | /* |
c176ffa0 JS |
11812 | * Check whether the adapter supports an embedded copy of the |
11813 | * FCP CMD IU within the WQE for FCP_Ixxx commands. In order | |
11814 | * to use this option, 128-byte WQEs must be used. | |
b5c53958 JS |
11815 | */ |
11816 | if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters)) | |
11817 | phba->fcp_embed_io = 1; | |
11818 | else | |
11819 | phba->fcp_embed_io = 0; | |
7bdedb34 | 11820 | |
0bc2b7c5 | 11821 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME, |
414abe0a | 11822 | "6422 XIB %d PBDE %d: FCP %d NVME %d %d %d\n", |
0bc2b7c5 | 11823 | bf_get(cfg_xib, mbx_sli4_parameters), |
414abe0a JS |
11824 | phba->cfg_enable_pbde, |
11825 | phba->fcp_embed_io, phba->nvme_support, | |
4e565cf0 | 11826 | phba->cfg_nvme_embed_cmd, phba->cfg_suppress_rsp); |
0bc2b7c5 | 11827 | |
bf316c78 JS |
11828 | if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == |
11829 | LPFC_SLI_INTF_IF_TYPE_2) && | |
11830 | (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) == | |
c221768b | 11831 | LPFC_SLI_INTF_FAMILY_LNCR_A0)) |
bf316c78 JS |
11832 | exp_wqcq_pages = false; |
11833 | ||
c176ffa0 JS |
11834 | if ((bf_get(cfg_cqpsize, mbx_sli4_parameters) & LPFC_CQ_16K_PAGE_SZ) && |
11835 | (bf_get(cfg_wqpsize, mbx_sli4_parameters) & LPFC_WQ_16K_PAGE_SZ) && | |
bf316c78 | 11836 | exp_wqcq_pages && |
c176ffa0 JS |
11837 | (sli4_params->wqsize & LPFC_WQ_SZ128_SUPPORT)) |
11838 | phba->enab_exp_wqcq_pages = 1; | |
11839 | else | |
11840 | phba->enab_exp_wqcq_pages = 0; | |
7bdedb34 JS |
11841 | /* |
11842 | * Check if the SLI port supports MDS Diagnostics | |
11843 | */ | |
11844 | if (bf_get(cfg_mds_diags, mbx_sli4_parameters)) | |
11845 | phba->mds_diags_support = 1; | |
11846 | else | |
11847 | phba->mds_diags_support = 0; | |
d2cc9bcd | 11848 | |
fedd3b7b JS |
11849 | return 0; |
11850 | } | |
11851 | ||
da0436e9 JS |
11852 | /** |
11853 | * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem. | |
11854 | * @pdev: pointer to PCI device | |
11855 | * @pid: pointer to PCI device identifier | |
11856 | * | |
11857 | * This routine is to be called to attach a device with SLI-3 interface spec | |
11858 | * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is | |
11859 | * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific | |
11860 | * information of the device and driver to see if the driver state that it can | |
11861 | * support this kind of device. If the match is successful, the driver core | |
11862 | * invokes this routine. If this routine determines it can claim the HBA, it | |
11863 | * does all the initialization that it needs to do to handle the HBA properly. | |
11864 | * | |
11865 | * Return code | |
11866 | * 0 - driver can claim the device | |
11867 | * negative value - driver can not claim the device | |
11868 | **/ | |
6f039790 | 11869 | static int |
da0436e9 JS |
11870 | lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid) |
11871 | { | |
11872 | struct lpfc_hba *phba; | |
11873 | struct lpfc_vport *vport = NULL; | |
6669f9bb | 11874 | struct Scsi_Host *shost = NULL; |
da0436e9 JS |
11875 | int error; |
11876 | uint32_t cfg_mode, intr_mode; | |
11877 | ||
11878 | /* Allocate memory for HBA structure */ | |
11879 | phba = lpfc_hba_alloc(pdev); | |
11880 | if (!phba) | |
11881 | return -ENOMEM; | |
11882 | ||
11883 | /* Perform generic PCI device enabling operation */ | |
11884 | error = lpfc_enable_pci_dev(phba); | |
079b5c91 | 11885 | if (error) |
da0436e9 | 11886 | goto out_free_phba; |
da0436e9 JS |
11887 | |
11888 | /* Set up SLI API function jump table for PCI-device group-0 HBAs */ | |
11889 | error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP); | |
11890 | if (error) | |
11891 | goto out_disable_pci_dev; | |
11892 | ||
11893 | /* Set up SLI-3 specific device PCI memory space */ | |
11894 | error = lpfc_sli_pci_mem_setup(phba); | |
11895 | if (error) { | |
11896 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11897 | "1402 Failed to set up pci memory space.\n"); | |
11898 | goto out_disable_pci_dev; | |
11899 | } | |
11900 | ||
da0436e9 JS |
11901 | /* Set up SLI-3 specific device driver resources */ |
11902 | error = lpfc_sli_driver_resource_setup(phba); | |
11903 | if (error) { | |
11904 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11905 | "1404 Failed to set up driver resource.\n"); | |
11906 | goto out_unset_pci_mem_s3; | |
11907 | } | |
11908 | ||
11909 | /* Initialize and populate the iocb list per host */ | |
d1f525aa | 11910 | |
da0436e9 JS |
11911 | error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT); |
11912 | if (error) { | |
11913 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11914 | "1405 Failed to initialize iocb list.\n"); | |
11915 | goto out_unset_driver_resource_s3; | |
11916 | } | |
11917 | ||
11918 | /* Set up common device driver resources */ | |
11919 | error = lpfc_setup_driver_resource_phase2(phba); | |
11920 | if (error) { | |
11921 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11922 | "1406 Failed to set up driver resource.\n"); | |
11923 | goto out_free_iocb_list; | |
11924 | } | |
11925 | ||
079b5c91 JS |
11926 | /* Get the default values for Model Name and Description */ |
11927 | lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); | |
11928 | ||
da0436e9 JS |
11929 | /* Create SCSI host to the physical port */ |
11930 | error = lpfc_create_shost(phba); | |
11931 | if (error) { | |
11932 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11933 | "1407 Failed to create scsi host.\n"); | |
11934 | goto out_unset_driver_resource; | |
11935 | } | |
11936 | ||
11937 | /* Configure sysfs attributes */ | |
11938 | vport = phba->pport; | |
11939 | error = lpfc_alloc_sysfs_attr(vport); | |
11940 | if (error) { | |
11941 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11942 | "1476 Failed to allocate sysfs attr\n"); | |
11943 | goto out_destroy_shost; | |
11944 | } | |
11945 | ||
6669f9bb | 11946 | shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */ |
da0436e9 JS |
11947 | /* Now, trying to enable interrupt and bring up the device */ |
11948 | cfg_mode = phba->cfg_use_msi; | |
11949 | while (true) { | |
11950 | /* Put device to a known state before enabling interrupt */ | |
11951 | lpfc_stop_port(phba); | |
11952 | /* Configure and enable interrupt */ | |
11953 | intr_mode = lpfc_sli_enable_intr(phba, cfg_mode); | |
11954 | if (intr_mode == LPFC_INTR_ERROR) { | |
11955 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11956 | "0431 Failed to enable interrupt.\n"); | |
11957 | error = -ENODEV; | |
11958 | goto out_free_sysfs_attr; | |
11959 | } | |
11960 | /* SLI-3 HBA setup */ | |
11961 | if (lpfc_sli_hba_setup(phba)) { | |
11962 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11963 | "1477 Failed to set up hba\n"); | |
11964 | error = -ENODEV; | |
11965 | goto out_remove_device; | |
11966 | } | |
11967 | ||
11968 | /* Wait 50ms for the interrupts of previous mailbox commands */ | |
11969 | msleep(50); | |
11970 | /* Check active interrupts on message signaled interrupts */ | |
11971 | if (intr_mode == 0 || | |
11972 | phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) { | |
11973 | /* Log the current active interrupt mode */ | |
11974 | phba->intr_mode = intr_mode; | |
11975 | lpfc_log_intr_mode(phba, intr_mode); | |
11976 | break; | |
11977 | } else { | |
11978 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
11979 | "0447 Configure interrupt mode (%d) " | |
11980 | "failed active interrupt test.\n", | |
11981 | intr_mode); | |
11982 | /* Disable the current interrupt mode */ | |
11983 | lpfc_sli_disable_intr(phba); | |
11984 | /* Try next level of interrupt mode */ | |
11985 | cfg_mode = --intr_mode; | |
11986 | } | |
11987 | } | |
11988 | ||
11989 | /* Perform post initialization setup */ | |
11990 | lpfc_post_init_setup(phba); | |
11991 | ||
11992 | /* Check if there are static vports to be created. */ | |
11993 | lpfc_create_static_vport(phba); | |
11994 | ||
11995 | return 0; | |
11996 | ||
11997 | out_remove_device: | |
11998 | lpfc_unset_hba(phba); | |
11999 | out_free_sysfs_attr: | |
12000 | lpfc_free_sysfs_attr(vport); | |
12001 | out_destroy_shost: | |
12002 | lpfc_destroy_shost(phba); | |
12003 | out_unset_driver_resource: | |
12004 | lpfc_unset_driver_resource_phase2(phba); | |
12005 | out_free_iocb_list: | |
12006 | lpfc_free_iocb_list(phba); | |
12007 | out_unset_driver_resource_s3: | |
12008 | lpfc_sli_driver_resource_unset(phba); | |
12009 | out_unset_pci_mem_s3: | |
12010 | lpfc_sli_pci_mem_unset(phba); | |
12011 | out_disable_pci_dev: | |
12012 | lpfc_disable_pci_dev(phba); | |
6669f9bb JS |
12013 | if (shost) |
12014 | scsi_host_put(shost); | |
da0436e9 JS |
12015 | out_free_phba: |
12016 | lpfc_hba_free(phba); | |
12017 | return error; | |
12018 | } | |
12019 | ||
12020 | /** | |
12021 | * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem. | |
12022 | * @pdev: pointer to PCI device | |
12023 | * | |
12024 | * This routine is to be called to disattach a device with SLI-3 interface | |
12025 | * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is | |
12026 | * removed from PCI bus, it performs all the necessary cleanup for the HBA | |
12027 | * device to be removed from the PCI subsystem properly. | |
12028 | **/ | |
6f039790 | 12029 | static void |
da0436e9 JS |
12030 | lpfc_pci_remove_one_s3(struct pci_dev *pdev) |
12031 | { | |
12032 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
12033 | struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; | |
12034 | struct lpfc_vport **vports; | |
12035 | struct lpfc_hba *phba = vport->phba; | |
12036 | int i; | |
da0436e9 JS |
12037 | |
12038 | spin_lock_irq(&phba->hbalock); | |
12039 | vport->load_flag |= FC_UNLOADING; | |
12040 | spin_unlock_irq(&phba->hbalock); | |
12041 | ||
12042 | lpfc_free_sysfs_attr(vport); | |
12043 | ||
12044 | /* Release all the vports against this physical port */ | |
12045 | vports = lpfc_create_vport_work_array(phba); | |
12046 | if (vports != NULL) | |
587a37f6 JS |
12047 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { |
12048 | if (vports[i]->port_type == LPFC_PHYSICAL_PORT) | |
12049 | continue; | |
da0436e9 | 12050 | fc_vport_terminate(vports[i]->fc_vport); |
587a37f6 | 12051 | } |
da0436e9 JS |
12052 | lpfc_destroy_vport_work_array(phba, vports); |
12053 | ||
12054 | /* Remove FC host and then SCSI host with the physical port */ | |
12055 | fc_remove_host(shost); | |
12056 | scsi_remove_host(shost); | |
d613b6a7 | 12057 | |
da0436e9 JS |
12058 | lpfc_cleanup(vport); |
12059 | ||
12060 | /* | |
12061 | * Bring down the SLI Layer. This step disable all interrupts, | |
12062 | * clears the rings, discards all mailbox commands, and resets | |
12063 | * the HBA. | |
12064 | */ | |
12065 | ||
48e34d0f | 12066 | /* HBA interrupt will be disabled after this call */ |
da0436e9 JS |
12067 | lpfc_sli_hba_down(phba); |
12068 | /* Stop kthread signal shall trigger work_done one more time */ | |
12069 | kthread_stop(phba->worker_thread); | |
12070 | /* Final cleanup of txcmplq and reset the HBA */ | |
12071 | lpfc_sli_brdrestart(phba); | |
12072 | ||
72859909 JS |
12073 | kfree(phba->vpi_bmask); |
12074 | kfree(phba->vpi_ids); | |
12075 | ||
da0436e9 | 12076 | lpfc_stop_hba_timers(phba); |
523128e5 | 12077 | spin_lock_irq(&phba->port_list_lock); |
da0436e9 | 12078 | list_del_init(&vport->listentry); |
523128e5 | 12079 | spin_unlock_irq(&phba->port_list_lock); |
da0436e9 JS |
12080 | |
12081 | lpfc_debugfs_terminate(vport); | |
12082 | ||
912e3acd JS |
12083 | /* Disable SR-IOV if enabled */ |
12084 | if (phba->cfg_sriov_nr_virtfn) | |
12085 | pci_disable_sriov(pdev); | |
12086 | ||
da0436e9 JS |
12087 | /* Disable interrupt */ |
12088 | lpfc_sli_disable_intr(phba); | |
12089 | ||
da0436e9 JS |
12090 | scsi_host_put(shost); |
12091 | ||
12092 | /* | |
12093 | * Call scsi_free before mem_free since scsi bufs are released to their | |
12094 | * corresponding pools here. | |
12095 | */ | |
12096 | lpfc_scsi_free(phba); | |
0794d601 JS |
12097 | lpfc_free_iocb_list(phba); |
12098 | ||
da0436e9 JS |
12099 | lpfc_mem_free_all(phba); |
12100 | ||
12101 | dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(), | |
12102 | phba->hbqslimp.virt, phba->hbqslimp.phys); | |
12103 | ||
12104 | /* Free resources associated with SLI2 interface */ | |
12105 | dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, | |
12106 | phba->slim2p.virt, phba->slim2p.phys); | |
12107 | ||
12108 | /* unmap adapter SLIM and Control Registers */ | |
12109 | iounmap(phba->ctrl_regs_memmap_p); | |
12110 | iounmap(phba->slim_memmap_p); | |
12111 | ||
12112 | lpfc_hba_free(phba); | |
12113 | ||
e0c0483c | 12114 | pci_release_mem_regions(pdev); |
da0436e9 JS |
12115 | pci_disable_device(pdev); |
12116 | } | |
12117 | ||
12118 | /** | |
12119 | * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt | |
12120 | * @pdev: pointer to PCI device | |
12121 | * @msg: power management message | |
12122 | * | |
12123 | * This routine is to be called from the kernel's PCI subsystem to support | |
12124 | * system Power Management (PM) to device with SLI-3 interface spec. When | |
12125 | * PM invokes this method, it quiesces the device by stopping the driver's | |
12126 | * worker thread for the device, turning off device's interrupt and DMA, | |
12127 | * and bring the device offline. Note that as the driver implements the | |
12128 | * minimum PM requirements to a power-aware driver's PM support for the | |
12129 | * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE) | |
12130 | * to the suspend() method call will be treated as SUSPEND and the driver will | |
12131 | * fully reinitialize its device during resume() method call, the driver will | |
12132 | * set device to PCI_D3hot state in PCI config space instead of setting it | |
12133 | * according to the @msg provided by the PM. | |
12134 | * | |
12135 | * Return code | |
12136 | * 0 - driver suspended the device | |
12137 | * Error otherwise | |
12138 | **/ | |
12139 | static int | |
12140 | lpfc_pci_suspend_one_s3(struct pci_dev *pdev, pm_message_t msg) | |
12141 | { | |
12142 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
12143 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
12144 | ||
12145 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
12146 | "0473 PCI device Power Management suspend.\n"); | |
12147 | ||
12148 | /* Bring down the device */ | |
618a5230 | 12149 | lpfc_offline_prep(phba, LPFC_MBX_WAIT); |
da0436e9 JS |
12150 | lpfc_offline(phba); |
12151 | kthread_stop(phba->worker_thread); | |
12152 | ||
12153 | /* Disable interrupt from device */ | |
12154 | lpfc_sli_disable_intr(phba); | |
12155 | ||
12156 | /* Save device state to PCI config space */ | |
12157 | pci_save_state(pdev); | |
12158 | pci_set_power_state(pdev, PCI_D3hot); | |
12159 | ||
12160 | return 0; | |
12161 | } | |
12162 | ||
12163 | /** | |
12164 | * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt | |
12165 | * @pdev: pointer to PCI device | |
12166 | * | |
12167 | * This routine is to be called from the kernel's PCI subsystem to support | |
12168 | * system Power Management (PM) to device with SLI-3 interface spec. When PM | |
12169 | * invokes this method, it restores the device's PCI config space state and | |
12170 | * fully reinitializes the device and brings it online. Note that as the | |
12171 | * driver implements the minimum PM requirements to a power-aware driver's | |
12172 | * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, | |
12173 | * FREEZE) to the suspend() method call will be treated as SUSPEND and the | |
12174 | * driver will fully reinitialize its device during resume() method call, | |
12175 | * the device will be set to PCI_D0 directly in PCI config space before | |
12176 | * restoring the state. | |
12177 | * | |
12178 | * Return code | |
12179 | * 0 - driver suspended the device | |
12180 | * Error otherwise | |
12181 | **/ | |
12182 | static int | |
12183 | lpfc_pci_resume_one_s3(struct pci_dev *pdev) | |
12184 | { | |
12185 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
12186 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
12187 | uint32_t intr_mode; | |
12188 | int error; | |
12189 | ||
12190 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
12191 | "0452 PCI device Power Management resume.\n"); | |
12192 | ||
12193 | /* Restore device state from PCI config space */ | |
12194 | pci_set_power_state(pdev, PCI_D0); | |
12195 | pci_restore_state(pdev); | |
0d878419 | 12196 | |
1dfb5a47 JS |
12197 | /* |
12198 | * As the new kernel behavior of pci_restore_state() API call clears | |
12199 | * device saved_state flag, need to save the restored state again. | |
12200 | */ | |
12201 | pci_save_state(pdev); | |
12202 | ||
da0436e9 JS |
12203 | if (pdev->is_busmaster) |
12204 | pci_set_master(pdev); | |
12205 | ||
12206 | /* Startup the kernel thread for this host adapter. */ | |
12207 | phba->worker_thread = kthread_run(lpfc_do_work, phba, | |
12208 | "lpfc_worker_%d", phba->brd_no); | |
12209 | if (IS_ERR(phba->worker_thread)) { | |
12210 | error = PTR_ERR(phba->worker_thread); | |
12211 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12212 | "0434 PM resume failed to start worker " | |
12213 | "thread: error=x%x.\n", error); | |
12214 | return error; | |
12215 | } | |
12216 | ||
12217 | /* Configure and enable interrupt */ | |
12218 | intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode); | |
12219 | if (intr_mode == LPFC_INTR_ERROR) { | |
12220 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12221 | "0430 PM resume Failed to enable interrupt\n"); | |
12222 | return -EIO; | |
12223 | } else | |
12224 | phba->intr_mode = intr_mode; | |
12225 | ||
12226 | /* Restart HBA and bring it online */ | |
12227 | lpfc_sli_brdrestart(phba); | |
12228 | lpfc_online(phba); | |
12229 | ||
12230 | /* Log the current active interrupt mode */ | |
12231 | lpfc_log_intr_mode(phba, phba->intr_mode); | |
12232 | ||
12233 | return 0; | |
12234 | } | |
12235 | ||
891478a2 JS |
12236 | /** |
12237 | * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover | |
12238 | * @phba: pointer to lpfc hba data structure. | |
12239 | * | |
12240 | * This routine is called to prepare the SLI3 device for PCI slot recover. It | |
e2af0d2e | 12241 | * aborts all the outstanding SCSI I/Os to the pci device. |
891478a2 JS |
12242 | **/ |
12243 | static void | |
12244 | lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba) | |
12245 | { | |
12246 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12247 | "2723 PCI channel I/O abort preparing for recovery\n"); | |
e2af0d2e JS |
12248 | |
12249 | /* | |
12250 | * There may be errored I/Os through HBA, abort all I/Os on txcmplq | |
12251 | * and let the SCSI mid-layer to retry them to recover. | |
12252 | */ | |
db55fba8 | 12253 | lpfc_sli_abort_fcp_rings(phba); |
891478a2 JS |
12254 | } |
12255 | ||
0d878419 JS |
12256 | /** |
12257 | * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset | |
12258 | * @phba: pointer to lpfc hba data structure. | |
12259 | * | |
12260 | * This routine is called to prepare the SLI3 device for PCI slot reset. It | |
12261 | * disables the device interrupt and pci device, and aborts the internal FCP | |
12262 | * pending I/Os. | |
12263 | **/ | |
12264 | static void | |
12265 | lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba) | |
12266 | { | |
0d878419 | 12267 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
891478a2 | 12268 | "2710 PCI channel disable preparing for reset\n"); |
e2af0d2e | 12269 | |
75baf696 | 12270 | /* Block any management I/Os to the device */ |
618a5230 | 12271 | lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT); |
75baf696 | 12272 | |
e2af0d2e JS |
12273 | /* Block all SCSI devices' I/Os on the host */ |
12274 | lpfc_scsi_dev_block(phba); | |
12275 | ||
ea714f3d JS |
12276 | /* Flush all driver's outstanding SCSI I/Os as we are to reset */ |
12277 | lpfc_sli_flush_fcp_rings(phba); | |
12278 | ||
e2af0d2e JS |
12279 | /* stop all timers */ |
12280 | lpfc_stop_hba_timers(phba); | |
12281 | ||
0d878419 JS |
12282 | /* Disable interrupt and pci device */ |
12283 | lpfc_sli_disable_intr(phba); | |
12284 | pci_disable_device(phba->pcidev); | |
0d878419 JS |
12285 | } |
12286 | ||
12287 | /** | |
12288 | * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable | |
12289 | * @phba: pointer to lpfc hba data structure. | |
12290 | * | |
12291 | * This routine is called to prepare the SLI3 device for PCI slot permanently | |
12292 | * disabling. It blocks the SCSI transport layer traffic and flushes the FCP | |
12293 | * pending I/Os. | |
12294 | **/ | |
12295 | static void | |
75baf696 | 12296 | lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba) |
0d878419 JS |
12297 | { |
12298 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
891478a2 | 12299 | "2711 PCI channel permanent disable for failure\n"); |
e2af0d2e JS |
12300 | /* Block all SCSI devices' I/Os on the host */ |
12301 | lpfc_scsi_dev_block(phba); | |
12302 | ||
12303 | /* stop all timers */ | |
12304 | lpfc_stop_hba_timers(phba); | |
12305 | ||
0d878419 JS |
12306 | /* Clean up all driver's outstanding SCSI I/Os */ |
12307 | lpfc_sli_flush_fcp_rings(phba); | |
12308 | } | |
12309 | ||
da0436e9 JS |
12310 | /** |
12311 | * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error | |
12312 | * @pdev: pointer to PCI device. | |
12313 | * @state: the current PCI connection state. | |
12314 | * | |
12315 | * This routine is called from the PCI subsystem for I/O error handling to | |
12316 | * device with SLI-3 interface spec. This function is called by the PCI | |
12317 | * subsystem after a PCI bus error affecting this device has been detected. | |
12318 | * When this function is invoked, it will need to stop all the I/Os and | |
12319 | * interrupt(s) to the device. Once that is done, it will return | |
12320 | * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery | |
12321 | * as desired. | |
12322 | * | |
12323 | * Return codes | |
0d878419 | 12324 | * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link |
da0436e9 JS |
12325 | * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery |
12326 | * PCI_ERS_RESULT_DISCONNECT - device could not be recovered | |
12327 | **/ | |
12328 | static pci_ers_result_t | |
12329 | lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state) | |
12330 | { | |
12331 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
12332 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
da0436e9 | 12333 | |
0d878419 JS |
12334 | switch (state) { |
12335 | case pci_channel_io_normal: | |
891478a2 JS |
12336 | /* Non-fatal error, prepare for recovery */ |
12337 | lpfc_sli_prep_dev_for_recover(phba); | |
0d878419 JS |
12338 | return PCI_ERS_RESULT_CAN_RECOVER; |
12339 | case pci_channel_io_frozen: | |
12340 | /* Fatal error, prepare for slot reset */ | |
12341 | lpfc_sli_prep_dev_for_reset(phba); | |
12342 | return PCI_ERS_RESULT_NEED_RESET; | |
12343 | case pci_channel_io_perm_failure: | |
12344 | /* Permanent failure, prepare for device down */ | |
75baf696 | 12345 | lpfc_sli_prep_dev_for_perm_failure(phba); |
da0436e9 | 12346 | return PCI_ERS_RESULT_DISCONNECT; |
0d878419 JS |
12347 | default: |
12348 | /* Unknown state, prepare and request slot reset */ | |
12349 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12350 | "0472 Unknown PCI error state: x%x\n", state); | |
12351 | lpfc_sli_prep_dev_for_reset(phba); | |
12352 | return PCI_ERS_RESULT_NEED_RESET; | |
da0436e9 | 12353 | } |
da0436e9 JS |
12354 | } |
12355 | ||
12356 | /** | |
12357 | * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch. | |
12358 | * @pdev: pointer to PCI device. | |
12359 | * | |
12360 | * This routine is called from the PCI subsystem for error handling to | |
12361 | * device with SLI-3 interface spec. This is called after PCI bus has been | |
12362 | * reset to restart the PCI card from scratch, as if from a cold-boot. | |
12363 | * During the PCI subsystem error recovery, after driver returns | |
12364 | * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error | |
12365 | * recovery and then call this routine before calling the .resume method | |
12366 | * to recover the device. This function will initialize the HBA device, | |
12367 | * enable the interrupt, but it will just put the HBA to offline state | |
12368 | * without passing any I/O traffic. | |
12369 | * | |
12370 | * Return codes | |
12371 | * PCI_ERS_RESULT_RECOVERED - the device has been recovered | |
12372 | * PCI_ERS_RESULT_DISCONNECT - device could not be recovered | |
12373 | */ | |
12374 | static pci_ers_result_t | |
12375 | lpfc_io_slot_reset_s3(struct pci_dev *pdev) | |
12376 | { | |
12377 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
12378 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
12379 | struct lpfc_sli *psli = &phba->sli; | |
12380 | uint32_t intr_mode; | |
12381 | ||
12382 | dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n"); | |
12383 | if (pci_enable_device_mem(pdev)) { | |
12384 | printk(KERN_ERR "lpfc: Cannot re-enable " | |
12385 | "PCI device after reset.\n"); | |
12386 | return PCI_ERS_RESULT_DISCONNECT; | |
12387 | } | |
12388 | ||
12389 | pci_restore_state(pdev); | |
1dfb5a47 JS |
12390 | |
12391 | /* | |
12392 | * As the new kernel behavior of pci_restore_state() API call clears | |
12393 | * device saved_state flag, need to save the restored state again. | |
12394 | */ | |
12395 | pci_save_state(pdev); | |
12396 | ||
da0436e9 JS |
12397 | if (pdev->is_busmaster) |
12398 | pci_set_master(pdev); | |
12399 | ||
12400 | spin_lock_irq(&phba->hbalock); | |
12401 | psli->sli_flag &= ~LPFC_SLI_ACTIVE; | |
12402 | spin_unlock_irq(&phba->hbalock); | |
12403 | ||
12404 | /* Configure and enable interrupt */ | |
12405 | intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode); | |
12406 | if (intr_mode == LPFC_INTR_ERROR) { | |
12407 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12408 | "0427 Cannot re-enable interrupt after " | |
12409 | "slot reset.\n"); | |
12410 | return PCI_ERS_RESULT_DISCONNECT; | |
12411 | } else | |
12412 | phba->intr_mode = intr_mode; | |
12413 | ||
75baf696 | 12414 | /* Take device offline, it will perform cleanup */ |
618a5230 | 12415 | lpfc_offline_prep(phba, LPFC_MBX_WAIT); |
da0436e9 JS |
12416 | lpfc_offline(phba); |
12417 | lpfc_sli_brdrestart(phba); | |
12418 | ||
12419 | /* Log the current active interrupt mode */ | |
12420 | lpfc_log_intr_mode(phba, phba->intr_mode); | |
12421 | ||
12422 | return PCI_ERS_RESULT_RECOVERED; | |
12423 | } | |
12424 | ||
12425 | /** | |
12426 | * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device. | |
12427 | * @pdev: pointer to PCI device | |
12428 | * | |
12429 | * This routine is called from the PCI subsystem for error handling to device | |
12430 | * with SLI-3 interface spec. It is called when kernel error recovery tells | |
12431 | * the lpfc driver that it is ok to resume normal PCI operation after PCI bus | |
12432 | * error recovery. After this call, traffic can start to flow from this device | |
12433 | * again. | |
12434 | */ | |
12435 | static void | |
12436 | lpfc_io_resume_s3(struct pci_dev *pdev) | |
12437 | { | |
12438 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
12439 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
3772a991 | 12440 | |
e2af0d2e | 12441 | /* Bring device online, it will be no-op for non-fatal error resume */ |
da0436e9 JS |
12442 | lpfc_online(phba); |
12443 | } | |
3772a991 | 12444 | |
da0436e9 JS |
12445 | /** |
12446 | * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve | |
12447 | * @phba: pointer to lpfc hba data structure. | |
12448 | * | |
12449 | * returns the number of ELS/CT IOCBs to reserve | |
12450 | **/ | |
12451 | int | |
12452 | lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba) | |
12453 | { | |
12454 | int max_xri = phba->sli4_hba.max_cfg_param.max_xri; | |
12455 | ||
f1126688 JS |
12456 | if (phba->sli_rev == LPFC_SLI_REV4) { |
12457 | if (max_xri <= 100) | |
6a9c52cf | 12458 | return 10; |
f1126688 | 12459 | else if (max_xri <= 256) |
6a9c52cf | 12460 | return 25; |
f1126688 | 12461 | else if (max_xri <= 512) |
6a9c52cf | 12462 | return 50; |
f1126688 | 12463 | else if (max_xri <= 1024) |
6a9c52cf | 12464 | return 100; |
8a9d2e80 | 12465 | else if (max_xri <= 1536) |
6a9c52cf | 12466 | return 150; |
8a9d2e80 JS |
12467 | else if (max_xri <= 2048) |
12468 | return 200; | |
12469 | else | |
12470 | return 250; | |
f1126688 JS |
12471 | } else |
12472 | return 0; | |
3772a991 JS |
12473 | } |
12474 | ||
895427bd JS |
12475 | /** |
12476 | * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve | |
12477 | * @phba: pointer to lpfc hba data structure. | |
12478 | * | |
f358dd0c | 12479 | * returns the number of ELS/CT + NVMET IOCBs to reserve |
895427bd JS |
12480 | **/ |
12481 | int | |
12482 | lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba) | |
12483 | { | |
12484 | int max_xri = lpfc_sli4_get_els_iocb_cnt(phba); | |
12485 | ||
f358dd0c JS |
12486 | if (phba->nvmet_support) |
12487 | max_xri += LPFC_NVMET_BUF_POST; | |
895427bd JS |
12488 | return max_xri; |
12489 | } | |
12490 | ||
12491 | ||
1feb8204 JS |
12492 | static void |
12493 | lpfc_log_write_firmware_error(struct lpfc_hba *phba, uint32_t offset, | |
12494 | uint32_t magic_number, uint32_t ftype, uint32_t fid, uint32_t fsize, | |
12495 | const struct firmware *fw) | |
12496 | { | |
a72d56b2 JS |
12497 | if ((offset == ADD_STATUS_FW_NOT_SUPPORTED) || |
12498 | (phba->pcidev->device == PCI_DEVICE_ID_LANCER_G6_FC && | |
12499 | magic_number != MAGIC_NUMER_G6) || | |
12500 | (phba->pcidev->device == PCI_DEVICE_ID_LANCER_G7_FC && | |
12501 | magic_number != MAGIC_NUMER_G7)) | |
1feb8204 JS |
12502 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
12503 | "3030 This firmware version is not supported on " | |
12504 | "this HBA model. Device:%x Magic:%x Type:%x " | |
12505 | "ID:%x Size %d %zd\n", | |
12506 | phba->pcidev->device, magic_number, ftype, fid, | |
12507 | fsize, fw->size); | |
12508 | else | |
12509 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12510 | "3022 FW Download failed. Device:%x Magic:%x Type:%x " | |
12511 | "ID:%x Size %d %zd\n", | |
12512 | phba->pcidev->device, magic_number, ftype, fid, | |
12513 | fsize, fw->size); | |
12514 | } | |
12515 | ||
12516 | ||
52d52440 JS |
12517 | /** |
12518 | * lpfc_write_firmware - attempt to write a firmware image to the port | |
52d52440 | 12519 | * @fw: pointer to firmware image returned from request_firmware. |
ce396282 | 12520 | * @phba: pointer to lpfc hba data structure. |
52d52440 | 12521 | * |
52d52440 | 12522 | **/ |
ce396282 JS |
12523 | static void |
12524 | lpfc_write_firmware(const struct firmware *fw, void *context) | |
52d52440 | 12525 | { |
ce396282 | 12526 | struct lpfc_hba *phba = (struct lpfc_hba *)context; |
6b5151fd | 12527 | char fwrev[FW_REV_STR_SIZE]; |
ce396282 | 12528 | struct lpfc_grp_hdr *image; |
52d52440 JS |
12529 | struct list_head dma_buffer_list; |
12530 | int i, rc = 0; | |
12531 | struct lpfc_dmabuf *dmabuf, *next; | |
12532 | uint32_t offset = 0, temp_offset = 0; | |
6b6ef5db | 12533 | uint32_t magic_number, ftype, fid, fsize; |
52d52440 | 12534 | |
c71ab861 | 12535 | /* It can be null in no-wait mode, sanity check */ |
ce396282 JS |
12536 | if (!fw) { |
12537 | rc = -ENXIO; | |
12538 | goto out; | |
12539 | } | |
12540 | image = (struct lpfc_grp_hdr *)fw->data; | |
12541 | ||
6b6ef5db JS |
12542 | magic_number = be32_to_cpu(image->magic_number); |
12543 | ftype = bf_get_be32(lpfc_grp_hdr_file_type, image); | |
1feb8204 | 12544 | fid = bf_get_be32(lpfc_grp_hdr_id, image); |
6b6ef5db JS |
12545 | fsize = be32_to_cpu(image->size); |
12546 | ||
52d52440 | 12547 | INIT_LIST_HEAD(&dma_buffer_list); |
52d52440 | 12548 | lpfc_decode_firmware_rev(phba, fwrev, 1); |
88a2cfbb | 12549 | if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) { |
52d52440 | 12550 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
ce396282 | 12551 | "3023 Updating Firmware, Current Version:%s " |
52d52440 | 12552 | "New Version:%s\n", |
88a2cfbb | 12553 | fwrev, image->revision); |
52d52440 JS |
12554 | for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) { |
12555 | dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), | |
12556 | GFP_KERNEL); | |
12557 | if (!dmabuf) { | |
12558 | rc = -ENOMEM; | |
ce396282 | 12559 | goto release_out; |
52d52440 JS |
12560 | } |
12561 | dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, | |
12562 | SLI4_PAGE_SIZE, | |
12563 | &dmabuf->phys, | |
12564 | GFP_KERNEL); | |
12565 | if (!dmabuf->virt) { | |
12566 | kfree(dmabuf); | |
12567 | rc = -ENOMEM; | |
ce396282 | 12568 | goto release_out; |
52d52440 JS |
12569 | } |
12570 | list_add_tail(&dmabuf->list, &dma_buffer_list); | |
12571 | } | |
12572 | while (offset < fw->size) { | |
12573 | temp_offset = offset; | |
12574 | list_for_each_entry(dmabuf, &dma_buffer_list, list) { | |
079b5c91 | 12575 | if (temp_offset + SLI4_PAGE_SIZE > fw->size) { |
52d52440 JS |
12576 | memcpy(dmabuf->virt, |
12577 | fw->data + temp_offset, | |
079b5c91 JS |
12578 | fw->size - temp_offset); |
12579 | temp_offset = fw->size; | |
52d52440 JS |
12580 | break; |
12581 | } | |
52d52440 JS |
12582 | memcpy(dmabuf->virt, fw->data + temp_offset, |
12583 | SLI4_PAGE_SIZE); | |
88a2cfbb | 12584 | temp_offset += SLI4_PAGE_SIZE; |
52d52440 JS |
12585 | } |
12586 | rc = lpfc_wr_object(phba, &dma_buffer_list, | |
12587 | (fw->size - offset), &offset); | |
1feb8204 JS |
12588 | if (rc) { |
12589 | lpfc_log_write_firmware_error(phba, offset, | |
12590 | magic_number, ftype, fid, fsize, fw); | |
ce396282 | 12591 | goto release_out; |
1feb8204 | 12592 | } |
52d52440 JS |
12593 | } |
12594 | rc = offset; | |
1feb8204 JS |
12595 | } else |
12596 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12597 | "3029 Skipped Firmware update, Current " | |
12598 | "Version:%s New Version:%s\n", | |
12599 | fwrev, image->revision); | |
ce396282 JS |
12600 | |
12601 | release_out: | |
52d52440 JS |
12602 | list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) { |
12603 | list_del(&dmabuf->list); | |
12604 | dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE, | |
12605 | dmabuf->virt, dmabuf->phys); | |
12606 | kfree(dmabuf); | |
12607 | } | |
ce396282 JS |
12608 | release_firmware(fw); |
12609 | out: | |
12610 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
c71ab861 | 12611 | "3024 Firmware update done: %d.\n", rc); |
ce396282 | 12612 | return; |
52d52440 JS |
12613 | } |
12614 | ||
c71ab861 JS |
12615 | /** |
12616 | * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade | |
12617 | * @phba: pointer to lpfc hba data structure. | |
12618 | * | |
12619 | * This routine is called to perform Linux generic firmware upgrade on device | |
12620 | * that supports such feature. | |
12621 | **/ | |
12622 | int | |
12623 | lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade) | |
12624 | { | |
12625 | uint8_t file_name[ELX_MODEL_NAME_SIZE]; | |
12626 | int ret; | |
12627 | const struct firmware *fw; | |
12628 | ||
12629 | /* Only supported on SLI4 interface type 2 for now */ | |
27d6ac0a | 12630 | if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) < |
c71ab861 JS |
12631 | LPFC_SLI_INTF_IF_TYPE_2) |
12632 | return -EPERM; | |
12633 | ||
12634 | snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName); | |
12635 | ||
12636 | if (fw_upgrade == INT_FW_UPGRADE) { | |
12637 | ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG, | |
12638 | file_name, &phba->pcidev->dev, | |
12639 | GFP_KERNEL, (void *)phba, | |
12640 | lpfc_write_firmware); | |
12641 | } else if (fw_upgrade == RUN_FW_UPGRADE) { | |
12642 | ret = request_firmware(&fw, file_name, &phba->pcidev->dev); | |
12643 | if (!ret) | |
12644 | lpfc_write_firmware(fw, (void *)phba); | |
12645 | } else { | |
12646 | ret = -EINVAL; | |
12647 | } | |
12648 | ||
12649 | return ret; | |
12650 | } | |
12651 | ||
3772a991 | 12652 | /** |
da0436e9 | 12653 | * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys |
3772a991 JS |
12654 | * @pdev: pointer to PCI device |
12655 | * @pid: pointer to PCI device identifier | |
12656 | * | |
da0436e9 JS |
12657 | * This routine is called from the kernel's PCI subsystem to device with |
12658 | * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is | |
3772a991 | 12659 | * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific |
da0436e9 JS |
12660 | * information of the device and driver to see if the driver state that it |
12661 | * can support this kind of device. If the match is successful, the driver | |
12662 | * core invokes this routine. If this routine determines it can claim the HBA, | |
12663 | * it does all the initialization that it needs to do to handle the HBA | |
12664 | * properly. | |
3772a991 JS |
12665 | * |
12666 | * Return code | |
12667 | * 0 - driver can claim the device | |
12668 | * negative value - driver can not claim the device | |
12669 | **/ | |
6f039790 | 12670 | static int |
da0436e9 | 12671 | lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid) |
3772a991 JS |
12672 | { |
12673 | struct lpfc_hba *phba; | |
12674 | struct lpfc_vport *vport = NULL; | |
6669f9bb | 12675 | struct Scsi_Host *shost = NULL; |
6c621a22 | 12676 | int error; |
3772a991 JS |
12677 | uint32_t cfg_mode, intr_mode; |
12678 | ||
12679 | /* Allocate memory for HBA structure */ | |
12680 | phba = lpfc_hba_alloc(pdev); | |
12681 | if (!phba) | |
12682 | return -ENOMEM; | |
12683 | ||
12684 | /* Perform generic PCI device enabling operation */ | |
12685 | error = lpfc_enable_pci_dev(phba); | |
079b5c91 | 12686 | if (error) |
3772a991 | 12687 | goto out_free_phba; |
3772a991 | 12688 | |
da0436e9 JS |
12689 | /* Set up SLI API function jump table for PCI-device group-1 HBAs */ |
12690 | error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC); | |
3772a991 JS |
12691 | if (error) |
12692 | goto out_disable_pci_dev; | |
12693 | ||
da0436e9 JS |
12694 | /* Set up SLI-4 specific device PCI memory space */ |
12695 | error = lpfc_sli4_pci_mem_setup(phba); | |
3772a991 JS |
12696 | if (error) { |
12697 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
da0436e9 | 12698 | "1410 Failed to set up pci memory space.\n"); |
3772a991 JS |
12699 | goto out_disable_pci_dev; |
12700 | } | |
12701 | ||
da0436e9 JS |
12702 | /* Set up SLI-4 Specific device driver resources */ |
12703 | error = lpfc_sli4_driver_resource_setup(phba); | |
3772a991 JS |
12704 | if (error) { |
12705 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
da0436e9 JS |
12706 | "1412 Failed to set up driver resource.\n"); |
12707 | goto out_unset_pci_mem_s4; | |
3772a991 JS |
12708 | } |
12709 | ||
19ca7609 | 12710 | INIT_LIST_HEAD(&phba->active_rrq_list); |
7d791df7 | 12711 | INIT_LIST_HEAD(&phba->fcf.fcf_pri_list); |
19ca7609 | 12712 | |
3772a991 JS |
12713 | /* Set up common device driver resources */ |
12714 | error = lpfc_setup_driver_resource_phase2(phba); | |
12715 | if (error) { | |
12716 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
da0436e9 | 12717 | "1414 Failed to set up driver resource.\n"); |
6c621a22 | 12718 | goto out_unset_driver_resource_s4; |
3772a991 JS |
12719 | } |
12720 | ||
079b5c91 JS |
12721 | /* Get the default values for Model Name and Description */ |
12722 | lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); | |
12723 | ||
3772a991 | 12724 | /* Now, trying to enable interrupt and bring up the device */ |
5b75da2f | 12725 | cfg_mode = phba->cfg_use_msi; |
5b75da2f | 12726 | |
7b15db32 | 12727 | /* Put device to a known state before enabling interrupt */ |
cdb42bec | 12728 | phba->pport = NULL; |
7b15db32 | 12729 | lpfc_stop_port(phba); |
895427bd | 12730 | |
7b15db32 JS |
12731 | /* Configure and enable interrupt */ |
12732 | intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode); | |
12733 | if (intr_mode == LPFC_INTR_ERROR) { | |
12734 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12735 | "0426 Failed to enable interrupt.\n"); | |
12736 | error = -ENODEV; | |
cdb42bec | 12737 | goto out_unset_driver_resource; |
7b15db32 JS |
12738 | } |
12739 | /* Default to single EQ for non-MSI-X */ | |
895427bd | 12740 | if (phba->intr_type != MSIX) { |
6a828b0f | 12741 | phba->cfg_irq_chann = 1; |
2d7dbc4c | 12742 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { |
2d7dbc4c JS |
12743 | if (phba->nvmet_support) |
12744 | phba->cfg_nvmet_mrq = 1; | |
12745 | } | |
cdb42bec | 12746 | } |
6a828b0f | 12747 | lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann); |
cdb42bec JS |
12748 | |
12749 | /* Create SCSI host to the physical port */ | |
12750 | error = lpfc_create_shost(phba); | |
12751 | if (error) { | |
12752 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12753 | "1415 Failed to create scsi host.\n"); | |
12754 | goto out_disable_intr; | |
12755 | } | |
12756 | vport = phba->pport; | |
12757 | shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */ | |
12758 | ||
12759 | /* Configure sysfs attributes */ | |
12760 | error = lpfc_alloc_sysfs_attr(vport); | |
12761 | if (error) { | |
12762 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12763 | "1416 Failed to allocate sysfs attr\n"); | |
12764 | goto out_destroy_shost; | |
895427bd JS |
12765 | } |
12766 | ||
7b15db32 JS |
12767 | /* Set up SLI-4 HBA */ |
12768 | if (lpfc_sli4_hba_setup(phba)) { | |
12769 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12770 | "1421 Failed to set up hba\n"); | |
12771 | error = -ENODEV; | |
cdb42bec | 12772 | goto out_free_sysfs_attr; |
98c9ea5c | 12773 | } |
858c9f6c | 12774 | |
7b15db32 JS |
12775 | /* Log the current active interrupt mode */ |
12776 | phba->intr_mode = intr_mode; | |
12777 | lpfc_log_intr_mode(phba, intr_mode); | |
12778 | ||
3772a991 JS |
12779 | /* Perform post initialization setup */ |
12780 | lpfc_post_init_setup(phba); | |
dea3101e | 12781 | |
01649561 JS |
12782 | /* NVME support in FW earlier in the driver load corrects the |
12783 | * FC4 type making a check for nvme_support unnecessary. | |
12784 | */ | |
0794d601 JS |
12785 | if (phba->nvmet_support == 0) { |
12786 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
12787 | /* Create NVME binding with nvme_fc_transport. This | |
12788 | * ensures the vport is initialized. If the localport | |
12789 | * create fails, it should not unload the driver to | |
12790 | * support field issues. | |
12791 | */ | |
12792 | error = lpfc_nvme_create_localport(vport); | |
12793 | if (error) { | |
12794 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12795 | "6004 NVME registration " | |
12796 | "failed, error x%x\n", | |
12797 | error); | |
12798 | } | |
01649561 JS |
12799 | } |
12800 | } | |
895427bd | 12801 | |
c71ab861 JS |
12802 | /* check for firmware upgrade or downgrade */ |
12803 | if (phba->cfg_request_firmware_upgrade) | |
db6f1c2f | 12804 | lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE); |
52d52440 | 12805 | |
1c6834a7 JS |
12806 | /* Check if there are static vports to be created. */ |
12807 | lpfc_create_static_vport(phba); | |
d2cc9bcd JS |
12808 | |
12809 | /* Enable RAS FW log support */ | |
12810 | lpfc_sli4_ras_setup(phba); | |
12811 | ||
dea3101e | 12812 | return 0; |
12813 | ||
5b75da2f JS |
12814 | out_free_sysfs_attr: |
12815 | lpfc_free_sysfs_attr(vport); | |
3772a991 JS |
12816 | out_destroy_shost: |
12817 | lpfc_destroy_shost(phba); | |
cdb42bec JS |
12818 | out_disable_intr: |
12819 | lpfc_sli4_disable_intr(phba); | |
3772a991 JS |
12820 | out_unset_driver_resource: |
12821 | lpfc_unset_driver_resource_phase2(phba); | |
da0436e9 JS |
12822 | out_unset_driver_resource_s4: |
12823 | lpfc_sli4_driver_resource_unset(phba); | |
12824 | out_unset_pci_mem_s4: | |
12825 | lpfc_sli4_pci_mem_unset(phba); | |
3772a991 JS |
12826 | out_disable_pci_dev: |
12827 | lpfc_disable_pci_dev(phba); | |
6669f9bb JS |
12828 | if (shost) |
12829 | scsi_host_put(shost); | |
2e0fef85 | 12830 | out_free_phba: |
3772a991 | 12831 | lpfc_hba_free(phba); |
dea3101e | 12832 | return error; |
12833 | } | |
12834 | ||
e59058c4 | 12835 | /** |
da0436e9 | 12836 | * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem |
e59058c4 JS |
12837 | * @pdev: pointer to PCI device |
12838 | * | |
da0436e9 JS |
12839 | * This routine is called from the kernel's PCI subsystem to device with |
12840 | * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is | |
3772a991 JS |
12841 | * removed from PCI bus, it performs all the necessary cleanup for the HBA |
12842 | * device to be removed from the PCI subsystem properly. | |
e59058c4 | 12843 | **/ |
6f039790 | 12844 | static void |
da0436e9 | 12845 | lpfc_pci_remove_one_s4(struct pci_dev *pdev) |
dea3101e | 12846 | { |
da0436e9 | 12847 | struct Scsi_Host *shost = pci_get_drvdata(pdev); |
2e0fef85 | 12848 | struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; |
eada272d | 12849 | struct lpfc_vport **vports; |
da0436e9 | 12850 | struct lpfc_hba *phba = vport->phba; |
eada272d | 12851 | int i; |
8a4df120 | 12852 | |
da0436e9 | 12853 | /* Mark the device unloading flag */ |
549e55cd | 12854 | spin_lock_irq(&phba->hbalock); |
51ef4c26 | 12855 | vport->load_flag |= FC_UNLOADING; |
549e55cd | 12856 | spin_unlock_irq(&phba->hbalock); |
2e0fef85 | 12857 | |
da0436e9 | 12858 | /* Free the HBA sysfs attributes */ |
858c9f6c JS |
12859 | lpfc_free_sysfs_attr(vport); |
12860 | ||
eada272d JS |
12861 | /* Release all the vports against this physical port */ |
12862 | vports = lpfc_create_vport_work_array(phba); | |
12863 | if (vports != NULL) | |
587a37f6 JS |
12864 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { |
12865 | if (vports[i]->port_type == LPFC_PHYSICAL_PORT) | |
12866 | continue; | |
eada272d | 12867 | fc_vport_terminate(vports[i]->fc_vport); |
587a37f6 | 12868 | } |
eada272d JS |
12869 | lpfc_destroy_vport_work_array(phba, vports); |
12870 | ||
12871 | /* Remove FC host and then SCSI host with the physical port */ | |
858c9f6c JS |
12872 | fc_remove_host(shost); |
12873 | scsi_remove_host(shost); | |
da0436e9 | 12874 | |
d613b6a7 JS |
12875 | /* Perform ndlp cleanup on the physical port. The nvme and nvmet |
12876 | * localports are destroyed after to cleanup all transport memory. | |
895427bd | 12877 | */ |
87af33fe | 12878 | lpfc_cleanup(vport); |
d613b6a7 JS |
12879 | lpfc_nvmet_destroy_targetport(phba); |
12880 | lpfc_nvme_destroy_localport(vport); | |
87af33fe | 12881 | |
c490850a JS |
12882 | /* De-allocate multi-XRI pools */ |
12883 | if (phba->cfg_xri_rebalancing) | |
12884 | lpfc_destroy_multixri_pools(phba); | |
12885 | ||
281d6190 JS |
12886 | /* |
12887 | * Bring down the SLI Layer. This step disables all interrupts, | |
12888 | * clears the rings, discards all mailbox commands, and resets | |
12889 | * the HBA FCoE function. | |
12890 | */ | |
12891 | lpfc_debugfs_terminate(vport); | |
a257bf90 | 12892 | |
1901762f | 12893 | lpfc_stop_hba_timers(phba); |
523128e5 | 12894 | spin_lock_irq(&phba->port_list_lock); |
858c9f6c | 12895 | list_del_init(&vport->listentry); |
523128e5 | 12896 | spin_unlock_irq(&phba->port_list_lock); |
858c9f6c | 12897 | |
3677a3a7 | 12898 | /* Perform scsi free before driver resource_unset since scsi |
da0436e9 | 12899 | * buffers are released to their corresponding pools here. |
2e0fef85 | 12900 | */ |
5e5b511d | 12901 | lpfc_io_free(phba); |
01649561 | 12902 | lpfc_free_iocb_list(phba); |
5e5b511d | 12903 | lpfc_sli4_hba_unset(phba); |
67d12733 | 12904 | |
0cdb84ec | 12905 | lpfc_unset_driver_resource_phase2(phba); |
da0436e9 | 12906 | lpfc_sli4_driver_resource_unset(phba); |
ed957684 | 12907 | |
da0436e9 JS |
12908 | /* Unmap adapter Control and Doorbell registers */ |
12909 | lpfc_sli4_pci_mem_unset(phba); | |
2e0fef85 | 12910 | |
da0436e9 JS |
12911 | /* Release PCI resources and disable device's PCI function */ |
12912 | scsi_host_put(shost); | |
12913 | lpfc_disable_pci_dev(phba); | |
2e0fef85 | 12914 | |
da0436e9 | 12915 | /* Finally, free the driver's device data structure */ |
3772a991 | 12916 | lpfc_hba_free(phba); |
2e0fef85 | 12917 | |
da0436e9 | 12918 | return; |
dea3101e | 12919 | } |
12920 | ||
3a55b532 | 12921 | /** |
da0436e9 | 12922 | * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt |
3a55b532 JS |
12923 | * @pdev: pointer to PCI device |
12924 | * @msg: power management message | |
12925 | * | |
da0436e9 JS |
12926 | * This routine is called from the kernel's PCI subsystem to support system |
12927 | * Power Management (PM) to device with SLI-4 interface spec. When PM invokes | |
12928 | * this method, it quiesces the device by stopping the driver's worker | |
12929 | * thread for the device, turning off device's interrupt and DMA, and bring | |
12930 | * the device offline. Note that as the driver implements the minimum PM | |
12931 | * requirements to a power-aware driver's PM support for suspend/resume -- all | |
12932 | * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend() | |
12933 | * method call will be treated as SUSPEND and the driver will fully | |
12934 | * reinitialize its device during resume() method call, the driver will set | |
12935 | * device to PCI_D3hot state in PCI config space instead of setting it | |
3772a991 | 12936 | * according to the @msg provided by the PM. |
3a55b532 JS |
12937 | * |
12938 | * Return code | |
3772a991 JS |
12939 | * 0 - driver suspended the device |
12940 | * Error otherwise | |
3a55b532 JS |
12941 | **/ |
12942 | static int | |
da0436e9 | 12943 | lpfc_pci_suspend_one_s4(struct pci_dev *pdev, pm_message_t msg) |
3a55b532 JS |
12944 | { |
12945 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
12946 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
12947 | ||
12948 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
75baf696 | 12949 | "2843 PCI device Power Management suspend.\n"); |
3a55b532 JS |
12950 | |
12951 | /* Bring down the device */ | |
618a5230 | 12952 | lpfc_offline_prep(phba, LPFC_MBX_WAIT); |
3a55b532 JS |
12953 | lpfc_offline(phba); |
12954 | kthread_stop(phba->worker_thread); | |
12955 | ||
12956 | /* Disable interrupt from device */ | |
da0436e9 | 12957 | lpfc_sli4_disable_intr(phba); |
5350d872 | 12958 | lpfc_sli4_queue_destroy(phba); |
3a55b532 JS |
12959 | |
12960 | /* Save device state to PCI config space */ | |
12961 | pci_save_state(pdev); | |
12962 | pci_set_power_state(pdev, PCI_D3hot); | |
12963 | ||
12964 | return 0; | |
12965 | } | |
12966 | ||
12967 | /** | |
da0436e9 | 12968 | * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt |
3a55b532 JS |
12969 | * @pdev: pointer to PCI device |
12970 | * | |
da0436e9 JS |
12971 | * This routine is called from the kernel's PCI subsystem to support system |
12972 | * Power Management (PM) to device with SLI-4 interface spac. When PM invokes | |
12973 | * this method, it restores the device's PCI config space state and fully | |
12974 | * reinitializes the device and brings it online. Note that as the driver | |
12975 | * implements the minimum PM requirements to a power-aware driver's PM for | |
12976 | * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE) | |
12977 | * to the suspend() method call will be treated as SUSPEND and the driver | |
12978 | * will fully reinitialize its device during resume() method call, the device | |
12979 | * will be set to PCI_D0 directly in PCI config space before restoring the | |
12980 | * state. | |
3a55b532 JS |
12981 | * |
12982 | * Return code | |
3772a991 JS |
12983 | * 0 - driver suspended the device |
12984 | * Error otherwise | |
3a55b532 JS |
12985 | **/ |
12986 | static int | |
da0436e9 | 12987 | lpfc_pci_resume_one_s4(struct pci_dev *pdev) |
3a55b532 JS |
12988 | { |
12989 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
12990 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
5b75da2f | 12991 | uint32_t intr_mode; |
3a55b532 JS |
12992 | int error; |
12993 | ||
12994 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
da0436e9 | 12995 | "0292 PCI device Power Management resume.\n"); |
3a55b532 JS |
12996 | |
12997 | /* Restore device state from PCI config space */ | |
12998 | pci_set_power_state(pdev, PCI_D0); | |
12999 | pci_restore_state(pdev); | |
1dfb5a47 JS |
13000 | |
13001 | /* | |
13002 | * As the new kernel behavior of pci_restore_state() API call clears | |
13003 | * device saved_state flag, need to save the restored state again. | |
13004 | */ | |
13005 | pci_save_state(pdev); | |
13006 | ||
3a55b532 JS |
13007 | if (pdev->is_busmaster) |
13008 | pci_set_master(pdev); | |
13009 | ||
da0436e9 | 13010 | /* Startup the kernel thread for this host adapter. */ |
3a55b532 JS |
13011 | phba->worker_thread = kthread_run(lpfc_do_work, phba, |
13012 | "lpfc_worker_%d", phba->brd_no); | |
13013 | if (IS_ERR(phba->worker_thread)) { | |
13014 | error = PTR_ERR(phba->worker_thread); | |
13015 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
da0436e9 | 13016 | "0293 PM resume failed to start worker " |
3a55b532 JS |
13017 | "thread: error=x%x.\n", error); |
13018 | return error; | |
13019 | } | |
13020 | ||
5b75da2f | 13021 | /* Configure and enable interrupt */ |
da0436e9 | 13022 | intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); |
5b75da2f | 13023 | if (intr_mode == LPFC_INTR_ERROR) { |
3a55b532 | 13024 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
da0436e9 | 13025 | "0294 PM resume Failed to enable interrupt\n"); |
5b75da2f JS |
13026 | return -EIO; |
13027 | } else | |
13028 | phba->intr_mode = intr_mode; | |
3a55b532 JS |
13029 | |
13030 | /* Restart HBA and bring it online */ | |
13031 | lpfc_sli_brdrestart(phba); | |
13032 | lpfc_online(phba); | |
13033 | ||
5b75da2f JS |
13034 | /* Log the current active interrupt mode */ |
13035 | lpfc_log_intr_mode(phba, phba->intr_mode); | |
13036 | ||
3a55b532 JS |
13037 | return 0; |
13038 | } | |
13039 | ||
75baf696 JS |
13040 | /** |
13041 | * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover | |
13042 | * @phba: pointer to lpfc hba data structure. | |
13043 | * | |
13044 | * This routine is called to prepare the SLI4 device for PCI slot recover. It | |
13045 | * aborts all the outstanding SCSI I/Os to the pci device. | |
13046 | **/ | |
13047 | static void | |
13048 | lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba) | |
13049 | { | |
75baf696 JS |
13050 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
13051 | "2828 PCI channel I/O abort preparing for recovery\n"); | |
13052 | /* | |
13053 | * There may be errored I/Os through HBA, abort all I/Os on txcmplq | |
13054 | * and let the SCSI mid-layer to retry them to recover. | |
13055 | */ | |
db55fba8 | 13056 | lpfc_sli_abort_fcp_rings(phba); |
75baf696 JS |
13057 | } |
13058 | ||
13059 | /** | |
13060 | * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset | |
13061 | * @phba: pointer to lpfc hba data structure. | |
13062 | * | |
13063 | * This routine is called to prepare the SLI4 device for PCI slot reset. It | |
13064 | * disables the device interrupt and pci device, and aborts the internal FCP | |
13065 | * pending I/Os. | |
13066 | **/ | |
13067 | static void | |
13068 | lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba) | |
13069 | { | |
13070 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
13071 | "2826 PCI channel disable preparing for reset\n"); | |
13072 | ||
13073 | /* Block any management I/Os to the device */ | |
618a5230 | 13074 | lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT); |
75baf696 JS |
13075 | |
13076 | /* Block all SCSI devices' I/Os on the host */ | |
13077 | lpfc_scsi_dev_block(phba); | |
13078 | ||
ea714f3d JS |
13079 | /* Flush all driver's outstanding SCSI I/Os as we are to reset */ |
13080 | lpfc_sli_flush_fcp_rings(phba); | |
13081 | ||
c3725bdc JS |
13082 | /* Flush the outstanding NVME IOs if fc4 type enabled. */ |
13083 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) | |
13084 | lpfc_sli_flush_nvme_rings(phba); | |
13085 | ||
75baf696 JS |
13086 | /* stop all timers */ |
13087 | lpfc_stop_hba_timers(phba); | |
13088 | ||
13089 | /* Disable interrupt and pci device */ | |
13090 | lpfc_sli4_disable_intr(phba); | |
5350d872 | 13091 | lpfc_sli4_queue_destroy(phba); |
75baf696 | 13092 | pci_disable_device(phba->pcidev); |
75baf696 JS |
13093 | } |
13094 | ||
13095 | /** | |
13096 | * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable | |
13097 | * @phba: pointer to lpfc hba data structure. | |
13098 | * | |
13099 | * This routine is called to prepare the SLI4 device for PCI slot permanently | |
13100 | * disabling. It blocks the SCSI transport layer traffic and flushes the FCP | |
13101 | * pending I/Os. | |
13102 | **/ | |
13103 | static void | |
13104 | lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba) | |
13105 | { | |
13106 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
13107 | "2827 PCI channel permanent disable for failure\n"); | |
13108 | ||
13109 | /* Block all SCSI devices' I/Os on the host */ | |
13110 | lpfc_scsi_dev_block(phba); | |
13111 | ||
13112 | /* stop all timers */ | |
13113 | lpfc_stop_hba_timers(phba); | |
13114 | ||
13115 | /* Clean up all driver's outstanding SCSI I/Os */ | |
13116 | lpfc_sli_flush_fcp_rings(phba); | |
c3725bdc JS |
13117 | |
13118 | /* Flush the outstanding NVME IOs if fc4 type enabled. */ | |
13119 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) | |
13120 | lpfc_sli_flush_nvme_rings(phba); | |
75baf696 JS |
13121 | } |
13122 | ||
8d63f375 | 13123 | /** |
da0436e9 | 13124 | * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device |
e59058c4 JS |
13125 | * @pdev: pointer to PCI device. |
13126 | * @state: the current PCI connection state. | |
8d63f375 | 13127 | * |
da0436e9 JS |
13128 | * This routine is called from the PCI subsystem for error handling to device |
13129 | * with SLI-4 interface spec. This function is called by the PCI subsystem | |
13130 | * after a PCI bus error affecting this device has been detected. When this | |
13131 | * function is invoked, it will need to stop all the I/Os and interrupt(s) | |
13132 | * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET | |
13133 | * for the PCI subsystem to perform proper recovery as desired. | |
e59058c4 JS |
13134 | * |
13135 | * Return codes | |
3772a991 JS |
13136 | * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery |
13137 | * PCI_ERS_RESULT_DISCONNECT - device could not be recovered | |
e59058c4 | 13138 | **/ |
3772a991 | 13139 | static pci_ers_result_t |
da0436e9 | 13140 | lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state) |
8d63f375 | 13141 | { |
75baf696 JS |
13142 | struct Scsi_Host *shost = pci_get_drvdata(pdev); |
13143 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
13144 | ||
13145 | switch (state) { | |
13146 | case pci_channel_io_normal: | |
13147 | /* Non-fatal error, prepare for recovery */ | |
13148 | lpfc_sli4_prep_dev_for_recover(phba); | |
13149 | return PCI_ERS_RESULT_CAN_RECOVER; | |
13150 | case pci_channel_io_frozen: | |
13151 | /* Fatal error, prepare for slot reset */ | |
13152 | lpfc_sli4_prep_dev_for_reset(phba); | |
13153 | return PCI_ERS_RESULT_NEED_RESET; | |
13154 | case pci_channel_io_perm_failure: | |
13155 | /* Permanent failure, prepare for device down */ | |
13156 | lpfc_sli4_prep_dev_for_perm_failure(phba); | |
13157 | return PCI_ERS_RESULT_DISCONNECT; | |
13158 | default: | |
13159 | /* Unknown state, prepare and request slot reset */ | |
13160 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
13161 | "2825 Unknown PCI error state: x%x\n", state); | |
13162 | lpfc_sli4_prep_dev_for_reset(phba); | |
13163 | return PCI_ERS_RESULT_NEED_RESET; | |
13164 | } | |
8d63f375 LV |
13165 | } |
13166 | ||
13167 | /** | |
da0436e9 | 13168 | * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch |
e59058c4 JS |
13169 | * @pdev: pointer to PCI device. |
13170 | * | |
da0436e9 JS |
13171 | * This routine is called from the PCI subsystem for error handling to device |
13172 | * with SLI-4 interface spec. It is called after PCI bus has been reset to | |
13173 | * restart the PCI card from scratch, as if from a cold-boot. During the | |
13174 | * PCI subsystem error recovery, after the driver returns | |
3772a991 | 13175 | * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error |
da0436e9 JS |
13176 | * recovery and then call this routine before calling the .resume method to |
13177 | * recover the device. This function will initialize the HBA device, enable | |
13178 | * the interrupt, but it will just put the HBA to offline state without | |
13179 | * passing any I/O traffic. | |
8d63f375 | 13180 | * |
e59058c4 | 13181 | * Return codes |
3772a991 JS |
13182 | * PCI_ERS_RESULT_RECOVERED - the device has been recovered |
13183 | * PCI_ERS_RESULT_DISCONNECT - device could not be recovered | |
8d63f375 | 13184 | */ |
3772a991 | 13185 | static pci_ers_result_t |
da0436e9 | 13186 | lpfc_io_slot_reset_s4(struct pci_dev *pdev) |
8d63f375 | 13187 | { |
75baf696 JS |
13188 | struct Scsi_Host *shost = pci_get_drvdata(pdev); |
13189 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
13190 | struct lpfc_sli *psli = &phba->sli; | |
13191 | uint32_t intr_mode; | |
13192 | ||
13193 | dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n"); | |
13194 | if (pci_enable_device_mem(pdev)) { | |
13195 | printk(KERN_ERR "lpfc: Cannot re-enable " | |
13196 | "PCI device after reset.\n"); | |
13197 | return PCI_ERS_RESULT_DISCONNECT; | |
13198 | } | |
13199 | ||
13200 | pci_restore_state(pdev); | |
0a96e975 JS |
13201 | |
13202 | /* | |
13203 | * As the new kernel behavior of pci_restore_state() API call clears | |
13204 | * device saved_state flag, need to save the restored state again. | |
13205 | */ | |
13206 | pci_save_state(pdev); | |
13207 | ||
75baf696 JS |
13208 | if (pdev->is_busmaster) |
13209 | pci_set_master(pdev); | |
13210 | ||
13211 | spin_lock_irq(&phba->hbalock); | |
13212 | psli->sli_flag &= ~LPFC_SLI_ACTIVE; | |
13213 | spin_unlock_irq(&phba->hbalock); | |
13214 | ||
13215 | /* Configure and enable interrupt */ | |
13216 | intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); | |
13217 | if (intr_mode == LPFC_INTR_ERROR) { | |
13218 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
13219 | "2824 Cannot re-enable interrupt after " | |
13220 | "slot reset.\n"); | |
13221 | return PCI_ERS_RESULT_DISCONNECT; | |
13222 | } else | |
13223 | phba->intr_mode = intr_mode; | |
13224 | ||
13225 | /* Log the current active interrupt mode */ | |
13226 | lpfc_log_intr_mode(phba, phba->intr_mode); | |
13227 | ||
8d63f375 LV |
13228 | return PCI_ERS_RESULT_RECOVERED; |
13229 | } | |
13230 | ||
13231 | /** | |
da0436e9 | 13232 | * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device |
e59058c4 | 13233 | * @pdev: pointer to PCI device |
8d63f375 | 13234 | * |
3772a991 | 13235 | * This routine is called from the PCI subsystem for error handling to device |
da0436e9 | 13236 | * with SLI-4 interface spec. It is called when kernel error recovery tells |
3772a991 JS |
13237 | * the lpfc driver that it is ok to resume normal PCI operation after PCI bus |
13238 | * error recovery. After this call, traffic can start to flow from this device | |
13239 | * again. | |
da0436e9 | 13240 | **/ |
3772a991 | 13241 | static void |
da0436e9 | 13242 | lpfc_io_resume_s4(struct pci_dev *pdev) |
8d63f375 | 13243 | { |
75baf696 JS |
13244 | struct Scsi_Host *shost = pci_get_drvdata(pdev); |
13245 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
13246 | ||
13247 | /* | |
13248 | * In case of slot reset, as function reset is performed through | |
13249 | * mailbox command which needs DMA to be enabled, this operation | |
13250 | * has to be moved to the io resume phase. Taking device offline | |
13251 | * will perform the necessary cleanup. | |
13252 | */ | |
13253 | if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) { | |
13254 | /* Perform device reset */ | |
618a5230 | 13255 | lpfc_offline_prep(phba, LPFC_MBX_WAIT); |
75baf696 JS |
13256 | lpfc_offline(phba); |
13257 | lpfc_sli_brdrestart(phba); | |
13258 | /* Bring the device back online */ | |
13259 | lpfc_online(phba); | |
13260 | } | |
8d63f375 LV |
13261 | } |
13262 | ||
3772a991 JS |
13263 | /** |
13264 | * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem | |
13265 | * @pdev: pointer to PCI device | |
13266 | * @pid: pointer to PCI device identifier | |
13267 | * | |
13268 | * This routine is to be registered to the kernel's PCI subsystem. When an | |
13269 | * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks | |
13270 | * at PCI device-specific information of the device and driver to see if the | |
13271 | * driver state that it can support this kind of device. If the match is | |
13272 | * successful, the driver core invokes this routine. This routine dispatches | |
13273 | * the action to the proper SLI-3 or SLI-4 device probing routine, which will | |
13274 | * do all the initialization that it needs to do to handle the HBA device | |
13275 | * properly. | |
13276 | * | |
13277 | * Return code | |
13278 | * 0 - driver can claim the device | |
13279 | * negative value - driver can not claim the device | |
13280 | **/ | |
6f039790 | 13281 | static int |
3772a991 JS |
13282 | lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid) |
13283 | { | |
13284 | int rc; | |
8fa38513 | 13285 | struct lpfc_sli_intf intf; |
3772a991 | 13286 | |
28baac74 | 13287 | if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0)) |
3772a991 JS |
13288 | return -ENODEV; |
13289 | ||
8fa38513 | 13290 | if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) && |
28baac74 | 13291 | (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4)) |
da0436e9 | 13292 | rc = lpfc_pci_probe_one_s4(pdev, pid); |
8fa38513 | 13293 | else |
3772a991 | 13294 | rc = lpfc_pci_probe_one_s3(pdev, pid); |
8fa38513 | 13295 | |
3772a991 JS |
13296 | return rc; |
13297 | } | |
13298 | ||
13299 | /** | |
13300 | * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem | |
13301 | * @pdev: pointer to PCI device | |
13302 | * | |
13303 | * This routine is to be registered to the kernel's PCI subsystem. When an | |
13304 | * Emulex HBA is removed from PCI bus, the driver core invokes this routine. | |
13305 | * This routine dispatches the action to the proper SLI-3 or SLI-4 device | |
13306 | * remove routine, which will perform all the necessary cleanup for the | |
13307 | * device to be removed from the PCI subsystem properly. | |
13308 | **/ | |
6f039790 | 13309 | static void |
3772a991 JS |
13310 | lpfc_pci_remove_one(struct pci_dev *pdev) |
13311 | { | |
13312 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
13313 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
13314 | ||
13315 | switch (phba->pci_dev_grp) { | |
13316 | case LPFC_PCI_DEV_LP: | |
13317 | lpfc_pci_remove_one_s3(pdev); | |
13318 | break; | |
da0436e9 JS |
13319 | case LPFC_PCI_DEV_OC: |
13320 | lpfc_pci_remove_one_s4(pdev); | |
13321 | break; | |
3772a991 JS |
13322 | default: |
13323 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
13324 | "1424 Invalid PCI device group: 0x%x\n", | |
13325 | phba->pci_dev_grp); | |
13326 | break; | |
13327 | } | |
13328 | return; | |
13329 | } | |
13330 | ||
13331 | /** | |
13332 | * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management | |
13333 | * @pdev: pointer to PCI device | |
13334 | * @msg: power management message | |
13335 | * | |
13336 | * This routine is to be registered to the kernel's PCI subsystem to support | |
13337 | * system Power Management (PM). When PM invokes this method, it dispatches | |
13338 | * the action to the proper SLI-3 or SLI-4 device suspend routine, which will | |
13339 | * suspend the device. | |
13340 | * | |
13341 | * Return code | |
13342 | * 0 - driver suspended the device | |
13343 | * Error otherwise | |
13344 | **/ | |
13345 | static int | |
13346 | lpfc_pci_suspend_one(struct pci_dev *pdev, pm_message_t msg) | |
13347 | { | |
13348 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
13349 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
13350 | int rc = -ENODEV; | |
13351 | ||
13352 | switch (phba->pci_dev_grp) { | |
13353 | case LPFC_PCI_DEV_LP: | |
13354 | rc = lpfc_pci_suspend_one_s3(pdev, msg); | |
13355 | break; | |
da0436e9 JS |
13356 | case LPFC_PCI_DEV_OC: |
13357 | rc = lpfc_pci_suspend_one_s4(pdev, msg); | |
13358 | break; | |
3772a991 JS |
13359 | default: |
13360 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
13361 | "1425 Invalid PCI device group: 0x%x\n", | |
13362 | phba->pci_dev_grp); | |
13363 | break; | |
13364 | } | |
13365 | return rc; | |
13366 | } | |
13367 | ||
13368 | /** | |
13369 | * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management | |
13370 | * @pdev: pointer to PCI device | |
13371 | * | |
13372 | * This routine is to be registered to the kernel's PCI subsystem to support | |
13373 | * system Power Management (PM). When PM invokes this method, it dispatches | |
13374 | * the action to the proper SLI-3 or SLI-4 device resume routine, which will | |
13375 | * resume the device. | |
13376 | * | |
13377 | * Return code | |
13378 | * 0 - driver suspended the device | |
13379 | * Error otherwise | |
13380 | **/ | |
13381 | static int | |
13382 | lpfc_pci_resume_one(struct pci_dev *pdev) | |
13383 | { | |
13384 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
13385 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
13386 | int rc = -ENODEV; | |
13387 | ||
13388 | switch (phba->pci_dev_grp) { | |
13389 | case LPFC_PCI_DEV_LP: | |
13390 | rc = lpfc_pci_resume_one_s3(pdev); | |
13391 | break; | |
da0436e9 JS |
13392 | case LPFC_PCI_DEV_OC: |
13393 | rc = lpfc_pci_resume_one_s4(pdev); | |
13394 | break; | |
3772a991 JS |
13395 | default: |
13396 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
13397 | "1426 Invalid PCI device group: 0x%x\n", | |
13398 | phba->pci_dev_grp); | |
13399 | break; | |
13400 | } | |
13401 | return rc; | |
13402 | } | |
13403 | ||
13404 | /** | |
13405 | * lpfc_io_error_detected - lpfc method for handling PCI I/O error | |
13406 | * @pdev: pointer to PCI device. | |
13407 | * @state: the current PCI connection state. | |
13408 | * | |
13409 | * This routine is registered to the PCI subsystem for error handling. This | |
13410 | * function is called by the PCI subsystem after a PCI bus error affecting | |
13411 | * this device has been detected. When this routine is invoked, it dispatches | |
13412 | * the action to the proper SLI-3 or SLI-4 device error detected handling | |
13413 | * routine, which will perform the proper error detected operation. | |
13414 | * | |
13415 | * Return codes | |
13416 | * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery | |
13417 | * PCI_ERS_RESULT_DISCONNECT - device could not be recovered | |
13418 | **/ | |
13419 | static pci_ers_result_t | |
13420 | lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) | |
13421 | { | |
13422 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
13423 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
13424 | pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT; | |
13425 | ||
13426 | switch (phba->pci_dev_grp) { | |
13427 | case LPFC_PCI_DEV_LP: | |
13428 | rc = lpfc_io_error_detected_s3(pdev, state); | |
13429 | break; | |
da0436e9 JS |
13430 | case LPFC_PCI_DEV_OC: |
13431 | rc = lpfc_io_error_detected_s4(pdev, state); | |
13432 | break; | |
3772a991 JS |
13433 | default: |
13434 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
13435 | "1427 Invalid PCI device group: 0x%x\n", | |
13436 | phba->pci_dev_grp); | |
13437 | break; | |
13438 | } | |
13439 | return rc; | |
13440 | } | |
13441 | ||
13442 | /** | |
13443 | * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch | |
13444 | * @pdev: pointer to PCI device. | |
13445 | * | |
13446 | * This routine is registered to the PCI subsystem for error handling. This | |
13447 | * function is called after PCI bus has been reset to restart the PCI card | |
13448 | * from scratch, as if from a cold-boot. When this routine is invoked, it | |
13449 | * dispatches the action to the proper SLI-3 or SLI-4 device reset handling | |
13450 | * routine, which will perform the proper device reset. | |
13451 | * | |
13452 | * Return codes | |
13453 | * PCI_ERS_RESULT_RECOVERED - the device has been recovered | |
13454 | * PCI_ERS_RESULT_DISCONNECT - device could not be recovered | |
13455 | **/ | |
13456 | static pci_ers_result_t | |
13457 | lpfc_io_slot_reset(struct pci_dev *pdev) | |
13458 | { | |
13459 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
13460 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
13461 | pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT; | |
13462 | ||
13463 | switch (phba->pci_dev_grp) { | |
13464 | case LPFC_PCI_DEV_LP: | |
13465 | rc = lpfc_io_slot_reset_s3(pdev); | |
13466 | break; | |
da0436e9 JS |
13467 | case LPFC_PCI_DEV_OC: |
13468 | rc = lpfc_io_slot_reset_s4(pdev); | |
13469 | break; | |
3772a991 JS |
13470 | default: |
13471 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
13472 | "1428 Invalid PCI device group: 0x%x\n", | |
13473 | phba->pci_dev_grp); | |
13474 | break; | |
13475 | } | |
13476 | return rc; | |
13477 | } | |
13478 | ||
13479 | /** | |
13480 | * lpfc_io_resume - lpfc method for resuming PCI I/O operation | |
13481 | * @pdev: pointer to PCI device | |
13482 | * | |
13483 | * This routine is registered to the PCI subsystem for error handling. It | |
13484 | * is called when kernel error recovery tells the lpfc driver that it is | |
13485 | * OK to resume normal PCI operation after PCI bus error recovery. When | |
13486 | * this routine is invoked, it dispatches the action to the proper SLI-3 | |
13487 | * or SLI-4 device io_resume routine, which will resume the device operation. | |
13488 | **/ | |
13489 | static void | |
13490 | lpfc_io_resume(struct pci_dev *pdev) | |
13491 | { | |
13492 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
13493 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
13494 | ||
13495 | switch (phba->pci_dev_grp) { | |
13496 | case LPFC_PCI_DEV_LP: | |
13497 | lpfc_io_resume_s3(pdev); | |
13498 | break; | |
da0436e9 JS |
13499 | case LPFC_PCI_DEV_OC: |
13500 | lpfc_io_resume_s4(pdev); | |
13501 | break; | |
3772a991 JS |
13502 | default: |
13503 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
13504 | "1429 Invalid PCI device group: 0x%x\n", | |
13505 | phba->pci_dev_grp); | |
13506 | break; | |
13507 | } | |
13508 | return; | |
13509 | } | |
13510 | ||
1ba981fd JS |
13511 | /** |
13512 | * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter | |
13513 | * @phba: pointer to lpfc hba data structure. | |
13514 | * | |
13515 | * This routine checks to see if OAS is supported for this adapter. If | |
13516 | * supported, the configure Flash Optimized Fabric flag is set. Otherwise, | |
13517 | * the enable oas flag is cleared and the pool created for OAS device data | |
13518 | * is destroyed. | |
13519 | * | |
13520 | **/ | |
c7092975 | 13521 | static void |
1ba981fd JS |
13522 | lpfc_sli4_oas_verify(struct lpfc_hba *phba) |
13523 | { | |
13524 | ||
13525 | if (!phba->cfg_EnableXLane) | |
13526 | return; | |
13527 | ||
13528 | if (phba->sli4_hba.pc_sli4_params.oas_supported) { | |
13529 | phba->cfg_fof = 1; | |
13530 | } else { | |
f38fa0bb | 13531 | phba->cfg_fof = 0; |
1ba981fd JS |
13532 | if (phba->device_data_mem_pool) |
13533 | mempool_destroy(phba->device_data_mem_pool); | |
13534 | phba->device_data_mem_pool = NULL; | |
13535 | } | |
13536 | ||
13537 | return; | |
13538 | } | |
13539 | ||
d2cc9bcd JS |
13540 | /** |
13541 | * lpfc_sli4_ras_init - Verify RAS-FW log is supported by this adapter | |
13542 | * @phba: pointer to lpfc hba data structure. | |
13543 | * | |
13544 | * This routine checks to see if RAS is supported by the adapter. Check the | |
13545 | * function through which RAS support enablement is to be done. | |
13546 | **/ | |
13547 | void | |
13548 | lpfc_sli4_ras_init(struct lpfc_hba *phba) | |
13549 | { | |
13550 | switch (phba->pcidev->device) { | |
13551 | case PCI_DEVICE_ID_LANCER_G6_FC: | |
13552 | case PCI_DEVICE_ID_LANCER_G7_FC: | |
13553 | phba->ras_fwlog.ras_hwsupport = true; | |
cb34990b JS |
13554 | if (phba->cfg_ras_fwlog_func == PCI_FUNC(phba->pcidev->devfn) && |
13555 | phba->cfg_ras_fwlog_buffsize) | |
d2cc9bcd JS |
13556 | phba->ras_fwlog.ras_enabled = true; |
13557 | else | |
13558 | phba->ras_fwlog.ras_enabled = false; | |
13559 | break; | |
13560 | default: | |
13561 | phba->ras_fwlog.ras_hwsupport = false; | |
13562 | } | |
13563 | } | |
13564 | ||
1ba981fd | 13565 | |
dea3101e | 13566 | MODULE_DEVICE_TABLE(pci, lpfc_id_table); |
13567 | ||
a55b2d21 | 13568 | static const struct pci_error_handlers lpfc_err_handler = { |
8d63f375 LV |
13569 | .error_detected = lpfc_io_error_detected, |
13570 | .slot_reset = lpfc_io_slot_reset, | |
13571 | .resume = lpfc_io_resume, | |
13572 | }; | |
13573 | ||
dea3101e | 13574 | static struct pci_driver lpfc_driver = { |
13575 | .name = LPFC_DRIVER_NAME, | |
13576 | .id_table = lpfc_id_table, | |
13577 | .probe = lpfc_pci_probe_one, | |
6f039790 | 13578 | .remove = lpfc_pci_remove_one, |
85e8a239 | 13579 | .shutdown = lpfc_pci_remove_one, |
3a55b532 | 13580 | .suspend = lpfc_pci_suspend_one, |
3772a991 | 13581 | .resume = lpfc_pci_resume_one, |
2e0fef85 | 13582 | .err_handler = &lpfc_err_handler, |
dea3101e | 13583 | }; |
13584 | ||
3ef6d24c | 13585 | static const struct file_operations lpfc_mgmt_fop = { |
858feacd | 13586 | .owner = THIS_MODULE, |
3ef6d24c JS |
13587 | }; |
13588 | ||
13589 | static struct miscdevice lpfc_mgmt_dev = { | |
13590 | .minor = MISC_DYNAMIC_MINOR, | |
13591 | .name = "lpfcmgmt", | |
13592 | .fops = &lpfc_mgmt_fop, | |
13593 | }; | |
13594 | ||
e59058c4 | 13595 | /** |
3621a710 | 13596 | * lpfc_init - lpfc module initialization routine |
e59058c4 JS |
13597 | * |
13598 | * This routine is to be invoked when the lpfc module is loaded into the | |
13599 | * kernel. The special kernel macro module_init() is used to indicate the | |
13600 | * role of this routine to the kernel as lpfc module entry point. | |
13601 | * | |
13602 | * Return codes | |
13603 | * 0 - successful | |
13604 | * -ENOMEM - FC attach transport failed | |
13605 | * all others - failed | |
13606 | */ | |
dea3101e | 13607 | static int __init |
13608 | lpfc_init(void) | |
13609 | { | |
13610 | int error = 0; | |
13611 | ||
13612 | printk(LPFC_MODULE_DESC "\n"); | |
c44ce173 | 13613 | printk(LPFC_COPYRIGHT "\n"); |
dea3101e | 13614 | |
3ef6d24c JS |
13615 | error = misc_register(&lpfc_mgmt_dev); |
13616 | if (error) | |
13617 | printk(KERN_ERR "Could not register lpfcmgmt device, " | |
13618 | "misc_register returned with status %d", error); | |
13619 | ||
458c083e JS |
13620 | lpfc_transport_functions.vport_create = lpfc_vport_create; |
13621 | lpfc_transport_functions.vport_delete = lpfc_vport_delete; | |
dea3101e | 13622 | lpfc_transport_template = |
13623 | fc_attach_transport(&lpfc_transport_functions); | |
7ee5d43e | 13624 | if (lpfc_transport_template == NULL) |
dea3101e | 13625 | return -ENOMEM; |
458c083e JS |
13626 | lpfc_vport_transport_template = |
13627 | fc_attach_transport(&lpfc_vport_transport_functions); | |
13628 | if (lpfc_vport_transport_template == NULL) { | |
13629 | fc_release_transport(lpfc_transport_template); | |
13630 | return -ENOMEM; | |
7ee5d43e | 13631 | } |
5fd11085 | 13632 | lpfc_nvme_cmd_template(); |
bd3061ba | 13633 | lpfc_nvmet_cmd_template(); |
7bb03bbf JS |
13634 | |
13635 | /* Initialize in case vector mapping is needed */ | |
2ea259ee | 13636 | lpfc_present_cpu = num_present_cpus(); |
7bb03bbf | 13637 | |
dea3101e | 13638 | error = pci_register_driver(&lpfc_driver); |
92d7f7b0 | 13639 | if (error) { |
dea3101e | 13640 | fc_release_transport(lpfc_transport_template); |
458c083e | 13641 | fc_release_transport(lpfc_vport_transport_template); |
92d7f7b0 | 13642 | } |
dea3101e | 13643 | |
13644 | return error; | |
13645 | } | |
13646 | ||
e59058c4 | 13647 | /** |
3621a710 | 13648 | * lpfc_exit - lpfc module removal routine |
e59058c4 JS |
13649 | * |
13650 | * This routine is invoked when the lpfc module is removed from the kernel. | |
13651 | * The special kernel macro module_exit() is used to indicate the role of | |
13652 | * this routine to the kernel as lpfc module exit point. | |
13653 | */ | |
dea3101e | 13654 | static void __exit |
13655 | lpfc_exit(void) | |
13656 | { | |
3ef6d24c | 13657 | misc_deregister(&lpfc_mgmt_dev); |
dea3101e | 13658 | pci_unregister_driver(&lpfc_driver); |
13659 | fc_release_transport(lpfc_transport_template); | |
458c083e | 13660 | fc_release_transport(lpfc_vport_transport_template); |
81301a9b | 13661 | if (_dump_buf_data) { |
6a9c52cf | 13662 | printk(KERN_ERR "9062 BLKGRD: freeing %lu pages for " |
32350664 | 13663 | "_dump_buf_data at x%px\n", |
81301a9b JS |
13664 | (1L << _dump_buf_data_order), _dump_buf_data); |
13665 | free_pages((unsigned long)_dump_buf_data, _dump_buf_data_order); | |
13666 | } | |
13667 | ||
13668 | if (_dump_buf_dif) { | |
6a9c52cf | 13669 | printk(KERN_ERR "9049 BLKGRD: freeing %lu pages for " |
32350664 | 13670 | "_dump_buf_dif at x%px\n", |
81301a9b JS |
13671 | (1L << _dump_buf_dif_order), _dump_buf_dif); |
13672 | free_pages((unsigned long)_dump_buf_dif, _dump_buf_dif_order); | |
13673 | } | |
7973967f | 13674 | idr_destroy(&lpfc_hba_index); |
dea3101e | 13675 | } |
13676 | ||
13677 | module_init(lpfc_init); | |
13678 | module_exit(lpfc_exit); | |
13679 | MODULE_LICENSE("GPL"); | |
13680 | MODULE_DESCRIPTION(LPFC_MODULE_DESC); | |
d080abe0 | 13681 | MODULE_AUTHOR("Broadcom"); |
dea3101e | 13682 | MODULE_VERSION("0:" LPFC_DRIVER_VERSION); |