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scsi: lpfc: Fix SCSI io host reset causing kernel crash
[linux-2.6-block.git] / drivers / scsi / lpfc / lpfc_init.c
CommitLineData
dea3101e 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
d080abe0
JS		 4 * Copyright (C) 2017 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Limited and/or its subsidiaries. *
50611577 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
c44ce173 7 * EMULEX and SLI are trademarks of Emulex. *
d080abe0 8 * www.broadcom.com *
c44ce173 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e 10 * *
11 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC		 12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
dea3101e 22 *******************************************************************/
23
dea3101e 24#include <linux/blkdev.h>
25#include <linux/delay.h>
26#include <linux/dma-mapping.h>
27#include <linux/idr.h>
28#include <linux/interrupt.h>
acf3368f 29#include <linux/module.h>
dea3101e 30#include <linux/kthread.h>
31#include <linux/pci.h>
32#include <linux/spinlock.h>
92d7f7b0 33#include <linux/ctype.h>
0d878419 34#include <linux/aer.h>
5a0e3ad6 35#include <linux/slab.h>
52d52440 36#include <linux/firmware.h>
3ef6d24c 37#include <linux/miscdevice.h>
7bb03bbf 38#include <linux/percpu.h>
895427bd 39#include <linux/msi.h>
286871a6 40#include <linux/bitops.h>
dea3101e 41
91886523 42#include <scsi/scsi.h>
dea3101e 43#include <scsi/scsi_device.h>
44#include <scsi/scsi_host.h>
45#include <scsi/scsi_transport_fc.h>
86c67379
JS		 46#include <scsi/scsi_tcq.h>
47#include <scsi/fc/fc_fs.h>
48
49#include <linux/nvme-fc-driver.h>
dea3101e 50
da0436e9 51#include "lpfc_hw4.h"
dea3101e 52#include "lpfc_hw.h"
53#include "lpfc_sli.h"
da0436e9 54#include "lpfc_sli4.h"
ea2151b4 55#include "lpfc_nl.h"
dea3101e 56#include "lpfc_disc.h"
dea3101e 57#include "lpfc.h"
895427bd
JS		 58#include "lpfc_scsi.h"
59#include "lpfc_nvme.h"
86c67379 60#include "lpfc_nvmet.h"
dea3101e 61#include "lpfc_logmsg.h"
62#include "lpfc_crtn.h"
92d7f7b0 63#include "lpfc_vport.h"
dea3101e 64#include "lpfc_version.h"
12f44457 65#include "lpfc_ids.h"
dea3101e 66
81301a9b
JS		 67char *_dump_buf_data;
68unsigned long _dump_buf_data_order;
69char *_dump_buf_dif;
70unsigned long _dump_buf_dif_order;
71spinlock_t _dump_buf_lock;
72
7bb03bbf 73/* Used when mapping IRQ vectors in a driver centric manner */
b246de17
JS		 74uint16_t *lpfc_used_cpu;
75uint32_t lpfc_present_cpu;
7bb03bbf 76
dea3101e 77static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
78static int lpfc_post_rcv_buf(struct lpfc_hba *);
5350d872 79static int lpfc_sli4_queue_verify(struct lpfc_hba *);
da0436e9
JS		 80static int lpfc_create_bootstrap_mbox(struct lpfc_hba *);
81static int lpfc_setup_endian_order(struct lpfc_hba *);
da0436e9 82static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *);
8a9d2e80 83static void lpfc_free_els_sgl_list(struct lpfc_hba *);
f358dd0c 84static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *);
8a9d2e80 85static void lpfc_init_sgl_list(struct lpfc_hba *);
da0436e9
JS		 86static int lpfc_init_active_sgl_array(struct lpfc_hba *);
87static void lpfc_free_active_sgl(struct lpfc_hba *);
88static int lpfc_hba_down_post_s3(struct lpfc_hba *phba);
89static int lpfc_hba_down_post_s4(struct lpfc_hba *phba);
90static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *);
91static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *);
92static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *);
618a5230
JS		 93static void lpfc_sli4_disable_intr(struct lpfc_hba *);
94static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t);
1ba981fd 95static void lpfc_sli4_oas_verify(struct lpfc_hba *phba);
dea3101e 96
97static struct scsi_transport_template *lpfc_transport_template = NULL;
92d7f7b0 98static struct scsi_transport_template *lpfc_vport_transport_template = NULL;
dea3101e 99static DEFINE_IDR(lpfc_hba_index);
f358dd0c 100#define LPFC_NVMET_BUF_POST 254
dea3101e 101
e59058c4 102/**
3621a710 103 * lpfc_config_port_prep - Perform lpfc initialization prior to config port
e59058c4
JS		 104 * @phba: pointer to lpfc hba data structure.
105 *
106 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT
107 * mailbox command. It retrieves the revision information from the HBA and
108 * collects the Vital Product Data (VPD) about the HBA for preparing the
109 * configuration of the HBA.
110 *
111 * Return codes:
112 * 0 - success.
113 * -ERESTART - requests the SLI layer to reset the HBA and try again.
114 * Any other value - indicates an error.
115 **/
dea3101e 116int
2e0fef85 117lpfc_config_port_prep(struct lpfc_hba *phba)
dea3101e 118{
119 lpfc_vpd_t *vp = &phba->vpd;
120 int i = 0, rc;
121 LPFC_MBOXQ_t *pmb;
122 MAILBOX_t *mb;
123 char *lpfc_vpd_data = NULL;
124 uint16_t offset = 0;
125 static char licensed[56] =
126 "key unlock for use with gnu public licensed code only\0";
65a29c16 127 static int init_key = 1;
dea3101e 128
129 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
130 if (!pmb) {
2e0fef85 131 phba->link_state = LPFC_HBA_ERROR;
dea3101e 132 return -ENOMEM;
133 }
134
04c68496 135 mb = &pmb->u.mb;
2e0fef85 136 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 137
138 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
65a29c16
JS		 139 if (init_key) {
140 uint32_t *ptext = (uint32_t *) licensed;
dea3101e 141
65a29c16
JS		 142 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
143 *ptext = cpu_to_be32(*ptext);
144 init_key = 0;
145 }
dea3101e 146
147 lpfc_read_nv(phba, pmb);
148 memset((char*)mb->un.varRDnvp.rsvd3, 0,
149 sizeof (mb->un.varRDnvp.rsvd3));
150 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
151 sizeof (licensed));
152
153 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
154
155 if (rc != MBX_SUCCESS) {
ed957684 156 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
e8b62011 157 "0324 Config Port initialization "
dea3101e 158 "error, mbxCmd x%x READ_NVPARM, "
159 "mbxStatus x%x\n",
dea3101e 160 mb->mbxCommand, mb->mbxStatus);
161 mempool_free(pmb, phba->mbox_mem_pool);
162 return -ERESTART;
163 }
164 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
2e0fef85
JS		 165 sizeof(phba->wwnn));
166 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname,
167 sizeof(phba->wwpn));
dea3101e 168 }
169
92d7f7b0
JS		 170 phba->sli3_options = 0x0;
171
dea3101e 172 /* Setup and issue mailbox READ REV command */
173 lpfc_read_rev(phba, pmb);
174 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
175 if (rc != MBX_SUCCESS) {
ed957684 176 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 177 "0439 Adapter failed to init, mbxCmd x%x "
dea3101e 178 "READ_REV, mbxStatus x%x\n",
dea3101e 179 mb->mbxCommand, mb->mbxStatus);
180 mempool_free( pmb, phba->mbox_mem_pool);
181 return -ERESTART;
182 }
183
92d7f7b0 184
1de933f3
JSEC		 185 /*
186 * The value of rr must be 1 since the driver set the cv field to 1.
187 * This setting requires the FW to set all revision fields.
dea3101e 188 */
1de933f3 189 if (mb->un.varRdRev.rr == 0) {
dea3101e 190 vp->rev.rBit = 0;
1de933f3 191 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS		 192 "0440 Adapter failed to init, READ_REV has "
193 "missing revision information.\n");
dea3101e 194 mempool_free(pmb, phba->mbox_mem_pool);
195 return -ERESTART;
dea3101e 196 }
197
495a714c
JS		 198 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) {
199 mempool_free(pmb, phba->mbox_mem_pool);
ed957684 200 return -EINVAL;
495a714c 201 }
ed957684 202
dea3101e 203 /* Save information as VPD data */
1de933f3 204 vp->rev.rBit = 1;
92d7f7b0 205 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t));
1de933f3
JSEC		 206 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
207 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
208 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
209 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
dea3101e 210 vp->rev.biuRev = mb->un.varRdRev.biuRev;
211 vp->rev.smRev = mb->un.varRdRev.smRev;
212 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
213 vp->rev.endecRev = mb->un.varRdRev.endecRev;
214 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
215 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
216 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
217 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
218 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
219 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
220
92d7f7b0
JS		 221 /* If the sli feature level is less then 9, we must
222 * tear down all RPIs and VPIs on link down if NPIV
223 * is enabled.
224 */
225 if (vp->rev.feaLevelHigh < 9)
226 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN;
227
dea3101e 228 if (lpfc_is_LC_HBA(phba->pcidev->device))
229 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
230 sizeof (phba->RandomData));
231
dea3101e 232 /* Get adapter VPD information */
dea3101e 233 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
234 if (!lpfc_vpd_data)
d7c255b2 235 goto out_free_mbox;
dea3101e 236 do {
a0c87cbd 237 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD);
dea3101e 238 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
239
240 if (rc != MBX_SUCCESS) {
241 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 242 "0441 VPD not present on adapter, "
dea3101e 243 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
dea3101e 244 mb->mbxCommand, mb->mbxStatus);
74b72a59 245 mb->un.varDmp.word_cnt = 0;
dea3101e 246 }
04c68496
JS		 247 /* dump mem may return a zero when finished or we got a
248 * mailbox error, either way we are done.
249 */
250 if (mb->un.varDmp.word_cnt == 0)
251 break;
74b72a59
JW		 252 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
253 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
d7c255b2
JS		 254 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
255 lpfc_vpd_data + offset,
92d7f7b0 256 mb->un.varDmp.word_cnt);
dea3101e 257 offset += mb->un.varDmp.word_cnt;
74b72a59
JW		 258 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
259 lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
dea3101e 260
261 kfree(lpfc_vpd_data);
dea3101e 262out_free_mbox:
263 mempool_free(pmb, phba->mbox_mem_pool);
264 return 0;
265}
266
e59058c4 267/**
3621a710 268 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd
e59058c4
JS		 269 * @phba: pointer to lpfc hba data structure.
270 * @pmboxq: pointer to the driver internal queue element for mailbox command.
271 *
272 * This is the completion handler for driver's configuring asynchronous event
273 * mailbox command to the device. If the mailbox command returns successfully,
274 * it will set internal async event support flag to 1; otherwise, it will
275 * set internal async event support flag to 0.
276 **/
57127f15
JS		 277static void
278lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
279{
04c68496 280 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS)
57127f15
JS		 281 phba->temp_sensor_support = 1;
282 else
283 phba->temp_sensor_support = 0;
284 mempool_free(pmboxq, phba->mbox_mem_pool);
285 return;
286}
287
97207482 288/**
3621a710 289 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler
97207482
JS		 290 * @phba: pointer to lpfc hba data structure.
291 * @pmboxq: pointer to the driver internal queue element for mailbox command.
292 *
293 * This is the completion handler for dump mailbox command for getting
294 * wake up parameters. When this command complete, the response contain
295 * Option rom version of the HBA. This function translate the version number
296 * into a human readable string and store it in OptionROMVersion.
297 **/
298static void
299lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
300{
301 struct prog_id *prg;
302 uint32_t prog_id_word;
303 char dist = ' ';
304 /* character array used for decoding dist type. */
305 char dist_char[] = "nabx";
306
04c68496 307 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) {
9f1e1b50 308 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482 309 return;
9f1e1b50 310 }
97207482
JS		 311
312 prg = (struct prog_id *) &prog_id_word;
313
314 /* word 7 contain option rom version */
04c68496 315 prog_id_word = pmboxq->u.mb.un.varWords[7];
97207482
JS		 316
317 /* Decode the Option rom version word to a readable string */
318 if (prg->dist < 4)
319 dist = dist_char[prg->dist];
320
321 if ((prg->dist == 3) && (prg->num == 0))
a2fc4aef 322 snprintf(phba->OptionROMVersion, 32, "%d.%d%d",
97207482
JS		 323 prg->ver, prg->rev, prg->lev);
324 else
a2fc4aef 325 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d",
97207482
JS		 326 prg->ver, prg->rev, prg->lev,
327 dist, prg->num);
9f1e1b50 328 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482
JS		 329 return;
330}
331
0558056c
JS		 332/**
333 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname,
334 * cfg_soft_wwnn, cfg_soft_wwpn
335 * @vport: pointer to lpfc vport data structure.
336 *
337 *
338 * Return codes
339 * None.
340 **/
341void
342lpfc_update_vport_wwn(struct lpfc_vport *vport)
343{
aeb3c817
JS		 344 uint8_t vvvl = vport->fc_sparam.cmn.valid_vendor_ver_level;
345 u32 *fawwpn_key = (u32 *)&vport->fc_sparam.un.vendorVersion[0];
346
0558056c
JS		 347 /* If the soft name exists then update it using the service params */
348 if (vport->phba->cfg_soft_wwnn)
349 u64_to_wwn(vport->phba->cfg_soft_wwnn,
350 vport->fc_sparam.nodeName.u.wwn);
351 if (vport->phba->cfg_soft_wwpn)
352 u64_to_wwn(vport->phba->cfg_soft_wwpn,
353 vport->fc_sparam.portName.u.wwn);
354
355 /*
356 * If the name is empty or there exists a soft name
357 * then copy the service params name, otherwise use the fc name
358 */
359 if (vport->fc_nodename.u.wwn[0] == 0 || vport->phba->cfg_soft_wwnn)
360 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
361 sizeof(struct lpfc_name));
362 else
363 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename,
364 sizeof(struct lpfc_name));
365
aeb3c817
JS		 366 /*
367 * If the port name has changed, then set the Param changes flag
368 * to unreg the login
369 */
370 if (vport->fc_portname.u.wwn[0] != 0 &&
371 memcmp(&vport->fc_portname, &vport->fc_sparam.portName,
372 sizeof(struct lpfc_name)))
373 vport->vport_flag |= FAWWPN_PARAM_CHG;
374
375 if (vport->fc_portname.u.wwn[0] == 0 ||
376 vport->phba->cfg_soft_wwpn ||
377 (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR) ||
378 vport->vport_flag & FAWWPN_SET) {
0558056c
JS		 379 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
380 sizeof(struct lpfc_name));
aeb3c817
JS		 381 vport->vport_flag &= ~FAWWPN_SET;
382 if (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR)
383 vport->vport_flag |= FAWWPN_SET;
384 }
0558056c
JS		 385 else
386 memcpy(&vport->fc_sparam.portName, &vport->fc_portname,
387 sizeof(struct lpfc_name));
388}
389
e59058c4 390/**
3621a710 391 * lpfc_config_port_post - Perform lpfc initialization after config port
e59058c4
JS		 392 * @phba: pointer to lpfc hba data structure.
393 *
394 * This routine will do LPFC initialization after the CONFIG_PORT mailbox
395 * command call. It performs all internal resource and state setups on the
396 * port: post IOCB buffers, enable appropriate host interrupt attentions,
397 * ELS ring timers, etc.
398 *
399 * Return codes
400 * 0 - success.
401 * Any other value - error.
402 **/
dea3101e 403int
2e0fef85 404lpfc_config_port_post(struct lpfc_hba *phba)
dea3101e 405{
2e0fef85 406 struct lpfc_vport *vport = phba->pport;
a257bf90 407 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
dea3101e 408 LPFC_MBOXQ_t *pmb;
409 MAILBOX_t *mb;
410 struct lpfc_dmabuf *mp;
411 struct lpfc_sli *psli = &phba->sli;
412 uint32_t status, timeout;
2e0fef85
JS		 413 int i, j;
414 int rc;
dea3101e 415
7af67051
JS		 416 spin_lock_irq(&phba->hbalock);
417 /*
418 * If the Config port completed correctly the HBA is not
419 * over heated any more.
420 */
421 if (phba->over_temp_state == HBA_OVER_TEMP)
422 phba->over_temp_state = HBA_NORMAL_TEMP;
423 spin_unlock_irq(&phba->hbalock);
424
dea3101e 425 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
426 if (!pmb) {
2e0fef85 427 phba->link_state = LPFC_HBA_ERROR;
dea3101e 428 return -ENOMEM;
429 }
04c68496 430 mb = &pmb->u.mb;
dea3101e 431
dea3101e 432 /* Get login parameters for NID. */
9f1177a3
JS		 433 rc = lpfc_read_sparam(phba, pmb, 0);
434 if (rc) {
435 mempool_free(pmb, phba->mbox_mem_pool);
436 return -ENOMEM;
437 }
438
ed957684 439 pmb->vport = vport;
dea3101e 440 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 441 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 442 "0448 Adapter failed init, mbxCmd x%x "
dea3101e 443 "READ_SPARM mbxStatus x%x\n",
dea3101e 444 mb->mbxCommand, mb->mbxStatus);
2e0fef85 445 phba->link_state = LPFC_HBA_ERROR;
dea3101e 446 mp = (struct lpfc_dmabuf *) pmb->context1;
9f1177a3 447 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 448 lpfc_mbuf_free(phba, mp->virt, mp->phys);
449 kfree(mp);
450 return -EIO;
451 }
452
453 mp = (struct lpfc_dmabuf *) pmb->context1;
454
2e0fef85 455 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm));
dea3101e 456 lpfc_mbuf_free(phba, mp->virt, mp->phys);
457 kfree(mp);
458 pmb->context1 = NULL;
0558056c 459 lpfc_update_vport_wwn(vport);
a257bf90
JS		 460
461 /* Update the fc_host data structures with new wwn. */
462 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
463 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
21e9a0a5 464 fc_host_max_npiv_vports(shost) = phba->max_vpi;
a257bf90 465
dea3101e 466 /* If no serial number in VPD data, use low 6 bytes of WWNN */
467 /* This should be consolidated into parse_vpd ? - mr */
468 if (phba->SerialNumber[0] == 0) {
469 uint8_t *outptr;
470
2e0fef85 471 outptr = &vport->fc_nodename.u.s.IEEE[0];
dea3101e 472 for (i = 0; i < 12; i++) {
473 status = *outptr++;
474 j = ((status & 0xf0) >> 4);
475 if (j <= 9)
476 phba->SerialNumber[i] =
477 (char)((uint8_t) 0x30 + (uint8_t) j);
478 else
479 phba->SerialNumber[i] =
480 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
481 i++;
482 j = (status & 0xf);
483 if (j <= 9)
484 phba->SerialNumber[i] =
485 (char)((uint8_t) 0x30 + (uint8_t) j);
486 else
487 phba->SerialNumber[i] =
488 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
489 }
490 }
491
dea3101e 492 lpfc_read_config(phba, pmb);
ed957684 493 pmb->vport = vport;
dea3101e 494 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 495 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 496 "0453 Adapter failed to init, mbxCmd x%x "
dea3101e 497 "READ_CONFIG, mbxStatus x%x\n",
dea3101e 498 mb->mbxCommand, mb->mbxStatus);
2e0fef85 499 phba->link_state = LPFC_HBA_ERROR;
dea3101e 500 mempool_free( pmb, phba->mbox_mem_pool);
501 return -EIO;
502 }
503
a0c87cbd
JS		 504 /* Check if the port is disabled */
505 lpfc_sli_read_link_ste(phba);
506
dea3101e 507 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS		 508 i = (mb->un.varRdConfig.max_xri + 1);
509 if (phba->cfg_hba_queue_depth > i) {
510 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
511 "3359 HBA queue depth changed from %d to %d\n",
512 phba->cfg_hba_queue_depth, i);
513 phba->cfg_hba_queue_depth = i;
514 }
515
516 /* Reset the DFT_LUN_Q_DEPTH to (max xri >> 3) */
517 i = (mb->un.varRdConfig.max_xri >> 3);
518 if (phba->pport->cfg_lun_queue_depth > i) {
519 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
520 "3360 LUN queue depth changed from %d to %d\n",
521 phba->pport->cfg_lun_queue_depth, i);
522 phba->pport->cfg_lun_queue_depth = i;
523 }
dea3101e 524
525 phba->lmt = mb->un.varRdConfig.lmt;
74b72a59
JW		 526
527 /* Get the default values for Model Name and Description */
528 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
529
2e0fef85 530 phba->link_state = LPFC_LINK_DOWN;
dea3101e 531
0b727fea 532 /* Only process IOCBs on ELS ring till hba_state is READY */
895427bd
JS		 533 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr)
534 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT;
535 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr)
536 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT;
dea3101e 537
538 /* Post receive buffers for desired rings */
ed957684
JS		 539 if (phba->sli_rev != 3)
540 lpfc_post_rcv_buf(phba);
dea3101e 541
9399627f
JS		 542 /*
543 * Configure HBA MSI-X attention conditions to messages if MSI-X mode
544 */
545 if (phba->intr_type == MSIX) {
546 rc = lpfc_config_msi(phba, pmb);
547 if (rc) {
548 mempool_free(pmb, phba->mbox_mem_pool);
549 return -EIO;
550 }
551 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
552 if (rc != MBX_SUCCESS) {
553 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
554 "0352 Config MSI mailbox command "
555 "failed, mbxCmd x%x, mbxStatus x%x\n",
04c68496
JS		 556 pmb->u.mb.mbxCommand,
557 pmb->u.mb.mbxStatus);
9399627f
JS		 558 mempool_free(pmb, phba->mbox_mem_pool);
559 return -EIO;
560 }
561 }
562
04c68496 563 spin_lock_irq(&phba->hbalock);
9399627f
JS		 564 /* Initialize ERATT handling flag */
565 phba->hba_flag &= ~HBA_ERATT_HANDLED;
566
dea3101e 567 /* Enable appropriate host interrupts */
9940b97b
JS		 568 if (lpfc_readl(phba->HCregaddr, &status)) {
569 spin_unlock_irq(&phba->hbalock);
570 return -EIO;
571 }
dea3101e 572 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
573 if (psli->num_rings > 0)
574 status |= HC_R0INT_ENA;
575 if (psli->num_rings > 1)
576 status |= HC_R1INT_ENA;
577 if (psli->num_rings > 2)
578 status |= HC_R2INT_ENA;
579 if (psli->num_rings > 3)
580 status |= HC_R3INT_ENA;
581
875fbdfe
JSEC		 582 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
583 (phba->cfg_poll & DISABLE_FCP_RING_INT))
9399627f 584 status &= ~(HC_R0INT_ENA);
875fbdfe 585
dea3101e 586 writel(status, phba->HCregaddr);
587 readl(phba->HCregaddr); /* flush */
2e0fef85 588 spin_unlock_irq(&phba->hbalock);
dea3101e 589
9399627f
JS		 590 /* Set up ring-0 (ELS) timer */
591 timeout = phba->fc_ratov * 2;
256ec0d0
JS		 592 mod_timer(&vport->els_tmofunc,
593 jiffies + msecs_to_jiffies(1000 * timeout));
9399627f 594 /* Set up heart beat (HB) timer */
256ec0d0
JS		 595 mod_timer(&phba->hb_tmofunc,
596 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS		 597 phba->hb_outstanding = 0;
598 phba->last_completion_time = jiffies;
9399627f 599 /* Set up error attention (ERATT) polling timer */
256ec0d0 600 mod_timer(&phba->eratt_poll,
65791f1f 601 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
dea3101e 602
a0c87cbd
JS		 603 if (phba->hba_flag & LINK_DISABLED) {
604 lpfc_printf_log(phba,
605 KERN_ERR, LOG_INIT,
606 "2598 Adapter Link is disabled.\n");
607 lpfc_down_link(phba, pmb);
608 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
609 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
610 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
611 lpfc_printf_log(phba,
612 KERN_ERR, LOG_INIT,
613 "2599 Adapter failed to issue DOWN_LINK"
614 " mbox command rc 0x%x\n", rc);
615
616 mempool_free(pmb, phba->mbox_mem_pool);
617 return -EIO;
618 }
e40a02c1 619 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
026abb87
JS		 620 mempool_free(pmb, phba->mbox_mem_pool);
621 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
622 if (rc)
623 return rc;
dea3101e 624 }
625 /* MBOX buffer will be freed in mbox compl */
57127f15 626 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS		 627 if (!pmb) {
628 phba->link_state = LPFC_HBA_ERROR;
629 return -ENOMEM;
630 }
631
57127f15
JS		 632 lpfc_config_async(phba, pmb, LPFC_ELS_RING);
633 pmb->mbox_cmpl = lpfc_config_async_cmpl;
634 pmb->vport = phba->pport;
635 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
dea3101e 636
57127f15
JS		 637 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
638 lpfc_printf_log(phba,
639 KERN_ERR,
640 LOG_INIT,
641 "0456 Adapter failed to issue "
e4e74273 642 "ASYNCEVT_ENABLE mbox status x%x\n",
57127f15
JS		 643 rc);
644 mempool_free(pmb, phba->mbox_mem_pool);
645 }
97207482
JS		 646
647 /* Get Option rom version */
648 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS		 649 if (!pmb) {
650 phba->link_state = LPFC_HBA_ERROR;
651 return -ENOMEM;
652 }
653
97207482
JS		 654 lpfc_dump_wakeup_param(phba, pmb);
655 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl;
656 pmb->vport = phba->pport;
657 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
658
659 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
660 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "0435 Adapter failed "
e4e74273 661 "to get Option ROM version status x%x\n", rc);
97207482
JS		 662 mempool_free(pmb, phba->mbox_mem_pool);
663 }
664
d7c255b2 665 return 0;
ce8b3ce5
JS		 666}
667
84d1b006
JS		 668/**
669 * lpfc_hba_init_link - Initialize the FC link
670 * @phba: pointer to lpfc hba data structure.
6e7288d9 671 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS		 672 *
673 * This routine will issue the INIT_LINK mailbox command call.
674 * It is available to other drivers through the lpfc_hba data
675 * structure for use as a delayed link up mechanism with the
676 * module parameter lpfc_suppress_link_up.
677 *
678 * Return code
679 * 0 - success
680 * Any other value - error
681 **/
e399b228 682static int
6e7288d9 683lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag)
1b51197d
JS		 684{
685 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag);
686}
687
688/**
689 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology
690 * @phba: pointer to lpfc hba data structure.
691 * @fc_topology: desired fc topology.
692 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
693 *
694 * This routine will issue the INIT_LINK mailbox command call.
695 * It is available to other drivers through the lpfc_hba data
696 * structure for use as a delayed link up mechanism with the
697 * module parameter lpfc_suppress_link_up.
698 *
699 * Return code
700 * 0 - success
701 * Any other value - error
702 **/
703int
704lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology,
705 uint32_t flag)
84d1b006
JS		 706{
707 struct lpfc_vport *vport = phba->pport;
708 LPFC_MBOXQ_t *pmb;
709 MAILBOX_t *mb;
710 int rc;
711
712 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
713 if (!pmb) {
714 phba->link_state = LPFC_HBA_ERROR;
715 return -ENOMEM;
716 }
717 mb = &pmb->u.mb;
718 pmb->vport = vport;
719
026abb87
JS		 720 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) ||
721 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) &&
722 !(phba->lmt & LMT_1Gb)) ||
723 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) &&
724 !(phba->lmt & LMT_2Gb)) ||
725 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) &&
726 !(phba->lmt & LMT_4Gb)) ||
727 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) &&
728 !(phba->lmt & LMT_8Gb)) ||
729 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) &&
730 !(phba->lmt & LMT_10Gb)) ||
731 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) &&
d38dd52c
JS		 732 !(phba->lmt & LMT_16Gb)) ||
733 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) &&
734 !(phba->lmt & LMT_32Gb))) {
026abb87
JS		 735 /* Reset link speed to auto */
736 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
737 "1302 Invalid speed for this board:%d "
738 "Reset link speed to auto.\n",
739 phba->cfg_link_speed);
740 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO;
741 }
1b51197d 742 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed);
84d1b006 743 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
1b51197d
JS		 744 if (phba->sli_rev < LPFC_SLI_REV4)
745 lpfc_set_loopback_flag(phba);
6e7288d9 746 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
76a95d75 747 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
84d1b006
JS		 748 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
749 "0498 Adapter failed to init, mbxCmd x%x "
750 "INIT_LINK, mbxStatus x%x\n",
751 mb->mbxCommand, mb->mbxStatus);
76a95d75
JS		 752 if (phba->sli_rev <= LPFC_SLI_REV3) {
753 /* Clear all interrupt enable conditions */
754 writel(0, phba->HCregaddr);
755 readl(phba->HCregaddr); /* flush */
756 /* Clear all pending interrupts */
757 writel(0xffffffff, phba->HAregaddr);
758 readl(phba->HAregaddr); /* flush */
759 }
84d1b006 760 phba->link_state = LPFC_HBA_ERROR;
6e7288d9 761 if (rc != MBX_BUSY || flag == MBX_POLL)
84d1b006
JS		 762 mempool_free(pmb, phba->mbox_mem_pool);
763 return -EIO;
764 }
e40a02c1 765 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK;
6e7288d9
JS		 766 if (flag == MBX_POLL)
767 mempool_free(pmb, phba->mbox_mem_pool);
84d1b006
JS		 768
769 return 0;
770}
771
772/**
773 * lpfc_hba_down_link - this routine downs the FC link
6e7288d9
JS		 774 * @phba: pointer to lpfc hba data structure.
775 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS		 776 *
777 * This routine will issue the DOWN_LINK mailbox command call.
778 * It is available to other drivers through the lpfc_hba data
779 * structure for use to stop the link.
780 *
781 * Return code
782 * 0 - success
783 * Any other value - error
784 **/
e399b228 785static int
6e7288d9 786lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag)
84d1b006
JS		 787{
788 LPFC_MBOXQ_t *pmb;
789 int rc;
790
791 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
792 if (!pmb) {
793 phba->link_state = LPFC_HBA_ERROR;
794 return -ENOMEM;
795 }
796
797 lpfc_printf_log(phba,
798 KERN_ERR, LOG_INIT,
799 "0491 Adapter Link is disabled.\n");
800 lpfc_down_link(phba, pmb);
801 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
6e7288d9 802 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
84d1b006
JS		 803 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
804 lpfc_printf_log(phba,
805 KERN_ERR, LOG_INIT,
806 "2522 Adapter failed to issue DOWN_LINK"
807 " mbox command rc 0x%x\n", rc);
808
809 mempool_free(pmb, phba->mbox_mem_pool);
810 return -EIO;
811 }
6e7288d9
JS		 812 if (flag == MBX_POLL)
813 mempool_free(pmb, phba->mbox_mem_pool);
814
84d1b006
JS		 815 return 0;
816}
817
e59058c4 818/**
3621a710 819 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset
e59058c4
JS		 820 * @phba: pointer to lpfc HBA data structure.
821 *
822 * This routine will do LPFC uninitialization before the HBA is reset when
823 * bringing down the SLI Layer.
824 *
825 * Return codes
826 * 0 - success.
827 * Any other value - error.
828 **/
dea3101e 829int
2e0fef85 830lpfc_hba_down_prep(struct lpfc_hba *phba)
dea3101e 831{
1b32f6aa
JS		 832 struct lpfc_vport **vports;
833 int i;
3772a991
JS		 834
835 if (phba->sli_rev <= LPFC_SLI_REV3) {
836 /* Disable interrupts */
837 writel(0, phba->HCregaddr);
838 readl(phba->HCregaddr); /* flush */
839 }
dea3101e 840
1b32f6aa
JS		 841 if (phba->pport->load_flag & FC_UNLOADING)
842 lpfc_cleanup_discovery_resources(phba->pport);
843 else {
844 vports = lpfc_create_vport_work_array(phba);
845 if (vports != NULL)
3772a991
JS		 846 for (i = 0; i <= phba->max_vports &&
847 vports[i] != NULL; i++)
1b32f6aa
JS		 848 lpfc_cleanup_discovery_resources(vports[i]);
849 lpfc_destroy_vport_work_array(phba, vports);
7f5f3d0d
JS		 850 }
851 return 0;
dea3101e 852}
853
68e814f5
JS		 854/**
855 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free
856 * rspiocb which got deferred
857 *
858 * @phba: pointer to lpfc HBA data structure.
859 *
860 * This routine will cleanup completed slow path events after HBA is reset
861 * when bringing down the SLI Layer.
862 *
863 *
864 * Return codes
865 * void.
866 **/
867static void
868lpfc_sli4_free_sp_events(struct lpfc_hba *phba)
869{
870 struct lpfc_iocbq *rspiocbq;
871 struct hbq_dmabuf *dmabuf;
872 struct lpfc_cq_event *cq_event;
873
874 spin_lock_irq(&phba->hbalock);
875 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
876 spin_unlock_irq(&phba->hbalock);
877
878 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
879 /* Get the response iocb from the head of work queue */
880 spin_lock_irq(&phba->hbalock);
881 list_remove_head(&phba->sli4_hba.sp_queue_event,
882 cq_event, struct lpfc_cq_event, list);
883 spin_unlock_irq(&phba->hbalock);
884
885 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
886 case CQE_CODE_COMPL_WQE:
887 rspiocbq = container_of(cq_event, struct lpfc_iocbq,
888 cq_event);
889 lpfc_sli_release_iocbq(phba, rspiocbq);
890 break;
891 case CQE_CODE_RECEIVE:
892 case CQE_CODE_RECEIVE_V1:
893 dmabuf = container_of(cq_event, struct hbq_dmabuf,
894 cq_event);
895 lpfc_in_buf_free(phba, &dmabuf->dbuf);
896 }
897 }
898}
899
e59058c4 900/**
bcece5f5 901 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset
e59058c4
JS		 902 * @phba: pointer to lpfc HBA data structure.
903 *
bcece5f5
JS		 904 * This routine will cleanup posted ELS buffers after the HBA is reset
905 * when bringing down the SLI Layer.
906 *
e59058c4
JS		 907 *
908 * Return codes
bcece5f5 909 * void.
e59058c4 910 **/
bcece5f5
JS		 911static void
912lpfc_hba_free_post_buf(struct lpfc_hba *phba)
41415862
JW		 913{
914 struct lpfc_sli *psli = &phba->sli;
915 struct lpfc_sli_ring *pring;
916 struct lpfc_dmabuf *mp, *next_mp;
07eab624
JS		 917 LIST_HEAD(buflist);
918 int count;
41415862 919
92d7f7b0
JS		 920 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)
921 lpfc_sli_hbqbuf_free_all(phba);
922 else {
923 /* Cleanup preposted buffers on the ELS ring */
895427bd 924 pring = &psli->sli3_ring[LPFC_ELS_RING];
07eab624
JS		 925 spin_lock_irq(&phba->hbalock);
926 list_splice_init(&pring->postbufq, &buflist);
927 spin_unlock_irq(&phba->hbalock);
928
929 count = 0;
930 list_for_each_entry_safe(mp, next_mp, &buflist, list) {
92d7f7b0 931 list_del(&mp->list);
07eab624 932 count++;
92d7f7b0
JS		 933 lpfc_mbuf_free(phba, mp->virt, mp->phys);
934 kfree(mp);
935 }
07eab624
JS		 936
937 spin_lock_irq(&phba->hbalock);
938 pring->postbufq_cnt -= count;
bcece5f5 939 spin_unlock_irq(&phba->hbalock);
41415862 940 }
bcece5f5
JS		 941}
942
943/**
944 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset
945 * @phba: pointer to lpfc HBA data structure.
946 *
947 * This routine will cleanup the txcmplq after the HBA is reset when bringing
948 * down the SLI Layer.
949 *
950 * Return codes
951 * void
952 **/
953static void
954lpfc_hba_clean_txcmplq(struct lpfc_hba *phba)
955{
956 struct lpfc_sli *psli = &phba->sli;
895427bd 957 struct lpfc_queue *qp = NULL;
bcece5f5
JS		 958 struct lpfc_sli_ring *pring;
959 LIST_HEAD(completions);
960 int i;
c1dd9111 961 struct lpfc_iocbq *piocb, *next_iocb;
bcece5f5 962
895427bd
JS		 963 if (phba->sli_rev != LPFC_SLI_REV4) {
964 for (i = 0; i < psli->num_rings; i++) {
965 pring = &psli->sli3_ring[i];
bcece5f5 966 spin_lock_irq(&phba->hbalock);
895427bd
JS		 967 /* At this point in time the HBA is either reset or DOA
968 * Nothing should be on txcmplq as it will
969 * NEVER complete.
970 */
971 list_splice_init(&pring->txcmplq, &completions);
972 pring->txcmplq_cnt = 0;
bcece5f5 973 spin_unlock_irq(&phba->hbalock);
09372820 974
895427bd
JS		 975 lpfc_sli_abort_iocb_ring(phba, pring);
976 }
a257bf90 977 /* Cancel all the IOCBs from the completions list */
895427bd
JS		 978 lpfc_sli_cancel_iocbs(phba, &completions,
979 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
980 return;
981 }
982 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
983 pring = qp->pring;
984 if (!pring)
985 continue;
986 spin_lock_irq(&pring->ring_lock);
c1dd9111
JS		 987 list_for_each_entry_safe(piocb, next_iocb,
988 &pring->txcmplq, list)
989 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
895427bd
JS		 990 list_splice_init(&pring->txcmplq, &completions);
991 pring->txcmplq_cnt = 0;
992 spin_unlock_irq(&pring->ring_lock);
41415862
JW		 993 lpfc_sli_abort_iocb_ring(phba, pring);
994 }
895427bd
JS		 995 /* Cancel all the IOCBs from the completions list */
996 lpfc_sli_cancel_iocbs(phba, &completions,
997 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
bcece5f5 998}
41415862 999
bcece5f5
JS		 1000/**
1001 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset
1002 int i;
1003 * @phba: pointer to lpfc HBA data structure.
1004 *
1005 * This routine will do uninitialization after the HBA is reset when bring
1006 * down the SLI Layer.
1007 *
1008 * Return codes
1009 * 0 - success.
1010 * Any other value - error.
1011 **/
1012static int
1013lpfc_hba_down_post_s3(struct lpfc_hba *phba)
1014{
1015 lpfc_hba_free_post_buf(phba);
1016 lpfc_hba_clean_txcmplq(phba);
41415862
JW		 1017 return 0;
1018}
5af5eee7 1019
da0436e9
JS		 1020/**
1021 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset
1022 * @phba: pointer to lpfc HBA data structure.
1023 *
1024 * This routine will do uninitialization after the HBA is reset when bring
1025 * down the SLI Layer.
1026 *
1027 * Return codes
af901ca1 1028 * 0 - success.
da0436e9
JS		 1029 * Any other value - error.
1030 **/
1031static int
1032lpfc_hba_down_post_s4(struct lpfc_hba *phba)
1033{
1034 struct lpfc_scsi_buf *psb, *psb_next;
86c67379 1035 struct lpfc_nvmet_rcv_ctx *ctxp, *ctxp_next;
da0436e9 1036 LIST_HEAD(aborts);
895427bd 1037 LIST_HEAD(nvme_aborts);
86c67379 1038 LIST_HEAD(nvmet_aborts);
da0436e9 1039 unsigned long iflag = 0;
0f65ff68 1040 struct lpfc_sglq *sglq_entry = NULL;
cf1a1d3e 1041 int cnt;
0f65ff68 1042
895427bd
JS		 1043
1044 lpfc_sli_hbqbuf_free_all(phba);
bcece5f5
JS		 1045 lpfc_hba_clean_txcmplq(phba);
1046
da0436e9
JS		 1047 /* At this point in time the HBA is either reset or DOA. Either
1048 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be
895427bd 1049 * on the lpfc_els_sgl_list so that it can either be freed if the
da0436e9
JS		 1050 * driver is unloading or reposted if the driver is restarting
1051 * the port.
1052 */
895427bd 1053 spin_lock_irq(&phba->hbalock); /* required for lpfc_els_sgl_list and */
da0436e9 1054 /* scsl_buf_list */
895427bd 1055 /* sgl_list_lock required because worker thread uses this
da0436e9
JS		 1056 * list.
1057 */
895427bd 1058 spin_lock(&phba->sli4_hba.sgl_list_lock);
0f65ff68
JS		 1059 list_for_each_entry(sglq_entry,
1060 &phba->sli4_hba.lpfc_abts_els_sgl_list, list)
1061 sglq_entry->state = SGL_FREED;
1062
da0436e9 1063 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
895427bd
JS		 1064 &phba->sli4_hba.lpfc_els_sgl_list);
1065
f358dd0c 1066
895427bd 1067 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9
JS		 1068 /* abts_scsi_buf_list_lock required because worker thread uses this
1069 * list.
1070 */
895427bd
JS		 1071 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
1072 spin_lock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1073 list_splice_init(&phba->sli4_hba.lpfc_abts_scsi_buf_list,
1074 &aborts);
1075 spin_unlock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1076 }
1077
1078 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1079 spin_lock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1080 list_splice_init(&phba->sli4_hba.lpfc_abts_nvme_buf_list,
1081 &nvme_aborts);
86c67379
JS		 1082 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list,
1083 &nvmet_aborts);
895427bd
JS		 1084 spin_unlock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1085 }
1086
da0436e9
JS		 1087 spin_unlock_irq(&phba->hbalock);
1088
1089 list_for_each_entry_safe(psb, psb_next, &aborts, list) {
1090 psb->pCmd = NULL;
1091 psb->status = IOSTAT_SUCCESS;
1092 }
a40fc5f0
JS		 1093 spin_lock_irqsave(&phba->scsi_buf_list_put_lock, iflag);
1094 list_splice(&aborts, &phba->lpfc_scsi_buf_list_put);
1095 spin_unlock_irqrestore(&phba->scsi_buf_list_put_lock, iflag);
68e814f5 1096
86c67379 1097 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
cf1a1d3e 1098 cnt = 0;
86c67379
JS		 1099 list_for_each_entry_safe(psb, psb_next, &nvme_aborts, list) {
1100 psb->pCmd = NULL;
1101 psb->status = IOSTAT_SUCCESS;
cf1a1d3e 1102 cnt++;
86c67379
JS		 1103 }
1104 spin_lock_irqsave(&phba->nvme_buf_list_put_lock, iflag);
cf1a1d3e 1105 phba->put_nvme_bufs += cnt;
86c67379
JS		 1106 list_splice(&nvme_aborts, &phba->lpfc_nvme_buf_list_put);
1107 spin_unlock_irqrestore(&phba->nvme_buf_list_put_lock, iflag);
1108
1109 list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) {
1110 ctxp->flag &= ~(LPFC_NVMET_XBUSY | LPFC_NVMET_ABORT_OP);
6c621a22 1111 lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf);
86c67379 1112 }
895427bd 1113 }
895427bd 1114
68e814f5 1115 lpfc_sli4_free_sp_events(phba);
da0436e9
JS		 1116 return 0;
1117}
1118
1119/**
1120 * lpfc_hba_down_post - Wrapper func for hba down post routine
1121 * @phba: pointer to lpfc HBA data structure.
1122 *
1123 * This routine wraps the actual SLI3 or SLI4 routine for performing
1124 * uninitialization after the HBA is reset when bring down the SLI Layer.
1125 *
1126 * Return codes
af901ca1 1127 * 0 - success.
da0436e9
JS		 1128 * Any other value - error.
1129 **/
1130int
1131lpfc_hba_down_post(struct lpfc_hba *phba)
1132{
1133 return (*phba->lpfc_hba_down_post)(phba);
1134}
41415862 1135
e59058c4 1136/**
3621a710 1137 * lpfc_hb_timeout - The HBA-timer timeout handler
e59058c4
JS		 1138 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1139 *
1140 * This is the HBA-timer timeout handler registered to the lpfc driver. When
1141 * this timer fires, a HBA timeout event shall be posted to the lpfc driver
1142 * work-port-events bitmap and the worker thread is notified. This timeout
1143 * event will be used by the worker thread to invoke the actual timeout
1144 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will
1145 * be performed in the timeout handler and the HBA timeout event bit shall
1146 * be cleared by the worker thread after it has taken the event bitmap out.
1147 **/
a6ababd2 1148static void
f22eb4d3 1149lpfc_hb_timeout(struct timer_list *t)
858c9f6c
JS		 1150{
1151 struct lpfc_hba *phba;
5e9d9b82 1152 uint32_t tmo_posted;
858c9f6c
JS		 1153 unsigned long iflag;
1154
f22eb4d3 1155 phba = from_timer(phba, t, hb_tmofunc);
9399627f
JS		 1156
1157 /* Check for heart beat timeout conditions */
858c9f6c 1158 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
5e9d9b82
JS		 1159 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO;
1160 if (!tmo_posted)
858c9f6c
JS		 1161 phba->pport->work_port_events |= WORKER_HB_TMO;
1162 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1163
9399627f 1164 /* Tell the worker thread there is work to do */
5e9d9b82
JS		 1165 if (!tmo_posted)
1166 lpfc_worker_wake_up(phba);
858c9f6c
JS		 1167 return;
1168}
1169
19ca7609
JS		 1170/**
1171 * lpfc_rrq_timeout - The RRQ-timer timeout handler
1172 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1173 *
1174 * This is the RRQ-timer timeout handler registered to the lpfc driver. When
1175 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver
1176 * work-port-events bitmap and the worker thread is notified. This timeout
1177 * event will be used by the worker thread to invoke the actual timeout
1178 * handler routine, lpfc_rrq_handler. Any periodical operations will
1179 * be performed in the timeout handler and the RRQ timeout event bit shall
1180 * be cleared by the worker thread after it has taken the event bitmap out.
1181 **/
1182static void
f22eb4d3 1183lpfc_rrq_timeout(struct timer_list *t)
19ca7609
JS		 1184{
1185 struct lpfc_hba *phba;
19ca7609
JS		 1186 unsigned long iflag;
1187
f22eb4d3 1188 phba = from_timer(phba, t, rrq_tmr);
19ca7609 1189 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
06918ac5
JS		 1190 if (!(phba->pport->load_flag & FC_UNLOADING))
1191 phba->hba_flag |= HBA_RRQ_ACTIVE;
1192 else
1193 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
19ca7609 1194 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
06918ac5
JS		 1195
1196 if (!(phba->pport->load_flag & FC_UNLOADING))
1197 lpfc_worker_wake_up(phba);
19ca7609
JS		 1198}
1199
e59058c4 1200/**
3621a710 1201 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function
e59058c4
JS		 1202 * @phba: pointer to lpfc hba data structure.
1203 * @pmboxq: pointer to the driver internal queue element for mailbox command.
1204 *
1205 * This is the callback function to the lpfc heart-beat mailbox command.
1206 * If configured, the lpfc driver issues the heart-beat mailbox command to
1207 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the
1208 * heart-beat mailbox command is issued, the driver shall set up heart-beat
1209 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks
1210 * heart-beat outstanding state. Once the mailbox command comes back and
1211 * no error conditions detected, the heart-beat mailbox command timer is
1212 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding
1213 * state is cleared for the next heart-beat. If the timer expired with the
1214 * heart-beat outstanding state set, the driver will put the HBA offline.
1215 **/
858c9f6c
JS		 1216static void
1217lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
1218{
1219 unsigned long drvr_flag;
1220
1221 spin_lock_irqsave(&phba->hbalock, drvr_flag);
1222 phba->hb_outstanding = 0;
1223 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
1224
9399627f 1225 /* Check and reset heart-beat timer is necessary */
858c9f6c
JS		 1226 mempool_free(pmboxq, phba->mbox_mem_pool);
1227 if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) &&
1228 !(phba->link_state == LPFC_HBA_ERROR) &&
51ef4c26 1229 !(phba->pport->load_flag & FC_UNLOADING))
858c9f6c 1230 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1231 jiffies +
1232 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS		 1233 return;
1234}
1235
e59058c4 1236/**
3621a710 1237 * lpfc_hb_timeout_handler - The HBA-timer timeout handler
e59058c4
JS		 1238 * @phba: pointer to lpfc hba data structure.
1239 *
1240 * This is the actual HBA-timer timeout handler to be invoked by the worker
1241 * thread whenever the HBA timer fired and HBA-timeout event posted. This
1242 * handler performs any periodic operations needed for the device. If such
1243 * periodic event has already been attended to either in the interrupt handler
1244 * or by processing slow-ring or fast-ring events within the HBA-timer
1245 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets
1246 * the timer for the next timeout period. If lpfc heart-beat mailbox command
1247 * is configured and there is no heart-beat mailbox command outstanding, a
1248 * heart-beat mailbox is issued and timer set properly. Otherwise, if there
1249 * has been a heart-beat mailbox command outstanding, the HBA shall be put
1250 * to offline.
1251 **/
858c9f6c
JS		 1252void
1253lpfc_hb_timeout_handler(struct lpfc_hba *phba)
1254{
45ed1190 1255 struct lpfc_vport **vports;
858c9f6c 1256 LPFC_MBOXQ_t *pmboxq;
0ff10d46 1257 struct lpfc_dmabuf *buf_ptr;
45ed1190 1258 int retval, i;
858c9f6c 1259 struct lpfc_sli *psli = &phba->sli;
0ff10d46 1260 LIST_HEAD(completions);
0cf07f84
JS		 1261 struct lpfc_queue *qp;
1262 unsigned long time_elapsed;
1263 uint32_t tick_cqe, max_cqe, val;
1264 uint64_t tot, data1, data2, data3;
66d7ce93 1265 struct lpfc_nvmet_tgtport *tgtp;
0cf07f84
JS		 1266 struct lpfc_register reg_data;
1267 void __iomem *eqdreg = phba->sli4_hba.u.if_type2.EQDregaddr;
858c9f6c 1268
45ed1190
JS		 1269 vports = lpfc_create_vport_work_array(phba);
1270 if (vports != NULL)
4258e98e 1271 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
45ed1190 1272 lpfc_rcv_seq_check_edtov(vports[i]);
4258e98e
JS		 1273 lpfc_fdmi_num_disc_check(vports[i]);
1274 }
45ed1190
JS		 1275 lpfc_destroy_vport_work_array(phba, vports);
1276
858c9f6c 1277 if ((phba->link_state == LPFC_HBA_ERROR) ||
51ef4c26 1278 (phba->pport->load_flag & FC_UNLOADING) ||
858c9f6c
JS		 1279 (phba->pport->fc_flag & FC_OFFLINE_MODE))
1280 return;
1281
0cf07f84
JS		 1282 if (phba->cfg_auto_imax) {
1283 if (!phba->last_eqdelay_time) {
1284 phba->last_eqdelay_time = jiffies;
1285 goto skip_eqdelay;
1286 }
1287 time_elapsed = jiffies - phba->last_eqdelay_time;
1288 phba->last_eqdelay_time = jiffies;
1289
1290 tot = 0xffff;
1291 /* Check outstanding IO count */
1292 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1293 if (phba->nvmet_support) {
66d7ce93
DK		 1294 tgtp = phba->targetport->private;
1295 /* Calculate outstanding IOs */
1296 tot = atomic_read(&tgtp->rcv_fcp_cmd_drop);
1297 tot += atomic_read(&tgtp->xmt_fcp_release);
1298 tot = atomic_read(&tgtp->rcv_fcp_cmd_in) - tot;
0cf07f84
JS		 1299 } else {
1300 tot = atomic_read(&phba->fc4NvmeIoCmpls);
1301 data1 = atomic_read(
1302 &phba->fc4NvmeInputRequests);
1303 data2 = atomic_read(
1304 &phba->fc4NvmeOutputRequests);
1305 data3 = atomic_read(
1306 &phba->fc4NvmeControlRequests);
1307 tot = (data1 + data2 + data3) - tot;
1308 }
1309 }
1310
1311 /* Interrupts per sec per EQ */
1312 val = phba->cfg_fcp_imax / phba->io_channel_irqs;
1313 tick_cqe = val / CONFIG_HZ; /* Per tick per EQ */
1314
1315 /* Assume 1 CQE/ISR, calc max CQEs allowed for time duration */
1316 max_cqe = time_elapsed * tick_cqe;
1317
1318 for (i = 0; i < phba->io_channel_irqs; i++) {
1319 /* Fast-path EQ */
1320 qp = phba->sli4_hba.hba_eq[i];
1321 if (!qp)
1322 continue;
1323
1324 /* Use no EQ delay if we don't have many outstanding
1325 * IOs, or if we are only processing 1 CQE/ISR or less.
1326 * Otherwise, assume we can process up to lpfc_fcp_imax
1327 * interrupts per HBA.
1328 */
1329 if (tot < LPFC_NODELAY_MAX_IO ||
1330 qp->EQ_cqe_cnt <= max_cqe)
1331 val = 0;
1332 else
1333 val = phba->cfg_fcp_imax;
1334
1335 if (phba->sli.sli_flag & LPFC_SLI_USE_EQDR) {
1336 /* Use EQ Delay Register method */
1337
1338 /* Convert for EQ Delay register */
1339 if (val) {
1340 /* First, interrupts per sec per EQ */
1341 val = phba->cfg_fcp_imax /
1342 phba->io_channel_irqs;
1343
1344 /* us delay between each interrupt */
1345 val = LPFC_SEC_TO_USEC / val;
1346 }
1347 if (val != qp->q_mode) {
1348 reg_data.word0 = 0;
1349 bf_set(lpfc_sliport_eqdelay_id,
1350 &reg_data, qp->queue_id);
1351 bf_set(lpfc_sliport_eqdelay_delay,
1352 &reg_data, val);
1353 writel(reg_data.word0, eqdreg);
1354 }
1355 } else {
1356 /* Use mbox command method */
1357 if (val != qp->q_mode)
1358 lpfc_modify_hba_eq_delay(phba, i,
1359 1, val);
1360 }
1361
1362 /*
1363 * val is cfg_fcp_imax or 0 for mbox delay or us delay
1364 * between interrupts for EQDR.
1365 */
1366 qp->q_mode = val;
1367 qp->EQ_cqe_cnt = 0;
1368 }
1369 }
1370
1371skip_eqdelay:
858c9f6c 1372 spin_lock_irq(&phba->pport->work_port_lock);
858c9f6c 1373
256ec0d0
JS		 1374 if (time_after(phba->last_completion_time +
1375 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL),
1376 jiffies)) {
858c9f6c
JS		 1377 spin_unlock_irq(&phba->pport->work_port_lock);
1378 if (!phba->hb_outstanding)
1379 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1380 jiffies +
1381 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS		 1382 else
1383 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1384 jiffies +
1385 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c
JS		 1386 return;
1387 }
1388 spin_unlock_irq(&phba->pport->work_port_lock);
1389
0ff10d46
JS		 1390 if (phba->elsbuf_cnt &&
1391 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) {
1392 spin_lock_irq(&phba->hbalock);
1393 list_splice_init(&phba->elsbuf, &completions);
1394 phba->elsbuf_cnt = 0;
1395 phba->elsbuf_prev_cnt = 0;
1396 spin_unlock_irq(&phba->hbalock);
1397
1398 while (!list_empty(&completions)) {
1399 list_remove_head(&completions, buf_ptr,
1400 struct lpfc_dmabuf, list);
1401 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
1402 kfree(buf_ptr);
1403 }
1404 }
1405 phba->elsbuf_prev_cnt = phba->elsbuf_cnt;
1406
858c9f6c 1407 /* If there is no heart beat outstanding, issue a heartbeat command */
13815c83
JS		 1408 if (phba->cfg_enable_hba_heartbeat) {
1409 if (!phba->hb_outstanding) {
bc73905a
JS		 1410 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) &&
1411 (list_empty(&psli->mboxq))) {
1412 pmboxq = mempool_alloc(phba->mbox_mem_pool,
1413 GFP_KERNEL);
1414 if (!pmboxq) {
1415 mod_timer(&phba->hb_tmofunc,
1416 jiffies +
256ec0d0
JS		 1417 msecs_to_jiffies(1000 *
1418 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS		 1419 return;
1420 }
1421
1422 lpfc_heart_beat(phba, pmboxq);
1423 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl;
1424 pmboxq->vport = phba->pport;
1425 retval = lpfc_sli_issue_mbox(phba, pmboxq,
1426 MBX_NOWAIT);
1427
1428 if (retval != MBX_BUSY &&
1429 retval != MBX_SUCCESS) {
1430 mempool_free(pmboxq,
1431 phba->mbox_mem_pool);
1432 mod_timer(&phba->hb_tmofunc,
1433 jiffies +
256ec0d0
JS		 1434 msecs_to_jiffies(1000 *
1435 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS		 1436 return;
1437 }
1438 phba->skipped_hb = 0;
1439 phba->hb_outstanding = 1;
1440 } else if (time_before_eq(phba->last_completion_time,
1441 phba->skipped_hb)) {
1442 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
1443 "2857 Last completion time not "
1444 " updated in %d ms\n",
1445 jiffies_to_msecs(jiffies
1446 - phba->last_completion_time));
1447 } else
1448 phba->skipped_hb = jiffies;
1449
858c9f6c 1450 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1451 jiffies +
1452 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1453 return;
13815c83
JS		 1454 } else {
1455 /*
1456 * If heart beat timeout called with hb_outstanding set
dcf2a4e0
JS		 1457 * we need to give the hb mailbox cmd a chance to
1458 * complete or TMO.
13815c83 1459 */
dcf2a4e0
JS		 1460 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1461 "0459 Adapter heartbeat still out"
1462 "standing:last compl time was %d ms.\n",
1463 jiffies_to_msecs(jiffies
1464 - phba->last_completion_time));
1465 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1466 jiffies +
1467 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1468 }
4258e98e
JS		 1469 } else {
1470 mod_timer(&phba->hb_tmofunc,
1471 jiffies +
1472 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS		 1473 }
1474}
1475
e59058c4 1476/**
3621a710 1477 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention
e59058c4
JS		 1478 * @phba: pointer to lpfc hba data structure.
1479 *
1480 * This routine is called to bring the HBA offline when HBA hardware error
1481 * other than Port Error 6 has been detected.
1482 **/
09372820
JS		 1483static void
1484lpfc_offline_eratt(struct lpfc_hba *phba)
1485{
1486 struct lpfc_sli *psli = &phba->sli;
1487
1488 spin_lock_irq(&phba->hbalock);
f4b4c68f 1489 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
09372820 1490 spin_unlock_irq(&phba->hbalock);
618a5230 1491 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
09372820
JS		 1492
1493 lpfc_offline(phba);
1494 lpfc_reset_barrier(phba);
f4b4c68f 1495 spin_lock_irq(&phba->hbalock);
09372820 1496 lpfc_sli_brdreset(phba);
f4b4c68f 1497 spin_unlock_irq(&phba->hbalock);
09372820
JS		 1498 lpfc_hba_down_post(phba);
1499 lpfc_sli_brdready(phba, HS_MBRDY);
1500 lpfc_unblock_mgmt_io(phba);
1501 phba->link_state = LPFC_HBA_ERROR;
1502 return;
1503}
1504
da0436e9
JS		 1505/**
1506 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention
1507 * @phba: pointer to lpfc hba data structure.
1508 *
1509 * This routine is called to bring a SLI4 HBA offline when HBA hardware error
1510 * other than Port Error 6 has been detected.
1511 **/
a88dbb6a 1512void
da0436e9
JS		 1513lpfc_sli4_offline_eratt(struct lpfc_hba *phba)
1514{
946727dc
JS		 1515 spin_lock_irq(&phba->hbalock);
1516 phba->link_state = LPFC_HBA_ERROR;
1517 spin_unlock_irq(&phba->hbalock);
1518
618a5230 1519 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
da0436e9 1520 lpfc_offline(phba);
da0436e9 1521 lpfc_hba_down_post(phba);
da0436e9 1522 lpfc_unblock_mgmt_io(phba);
da0436e9
JS		 1523}
1524
a257bf90
JS		 1525/**
1526 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler
1527 * @phba: pointer to lpfc hba data structure.
1528 *
1529 * This routine is invoked to handle the deferred HBA hardware error
1530 * conditions. This type of error is indicated by HBA by setting ER1
1531 * and another ER bit in the host status register. The driver will
1532 * wait until the ER1 bit clears before handling the error condition.
1533 **/
1534static void
1535lpfc_handle_deferred_eratt(struct lpfc_hba *phba)
1536{
1537 uint32_t old_host_status = phba->work_hs;
a257bf90
JS		 1538 struct lpfc_sli *psli = &phba->sli;
1539
f4b4c68f
JS		 1540 /* If the pci channel is offline, ignore possible errors,
1541 * since we cannot communicate with the pci card anyway.
1542 */
1543 if (pci_channel_offline(phba->pcidev)) {
1544 spin_lock_irq(&phba->hbalock);
1545 phba->hba_flag &= ~DEFER_ERATT;
1546 spin_unlock_irq(&phba->hbalock);
1547 return;
1548 }
1549
a257bf90
JS		 1550 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1551 "0479 Deferred Adapter Hardware Error "
1552 "Data: x%x x%x x%x\n",
1553 phba->work_hs,
1554 phba->work_status[0], phba->work_status[1]);
1555
1556 spin_lock_irq(&phba->hbalock);
f4b4c68f 1557 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
a257bf90
JS		 1558 spin_unlock_irq(&phba->hbalock);
1559
1560
1561 /*
1562 * Firmware stops when it triggred erratt. That could cause the I/Os
1563 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the
1564 * SCSI layer retry it after re-establishing link.
1565 */
db55fba8 1566 lpfc_sli_abort_fcp_rings(phba);
a257bf90
JS		 1567
1568 /*
1569 * There was a firmware error. Take the hba offline and then
1570 * attempt to restart it.
1571 */
618a5230 1572 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
a257bf90
JS		 1573 lpfc_offline(phba);
1574
1575 /* Wait for the ER1 bit to clear.*/
1576 while (phba->work_hs & HS_FFER1) {
1577 msleep(100);
9940b97b
JS		 1578 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) {
1579 phba->work_hs = UNPLUG_ERR ;
1580 break;
1581 }
a257bf90
JS		 1582 /* If driver is unloading let the worker thread continue */
1583 if (phba->pport->load_flag & FC_UNLOADING) {
1584 phba->work_hs = 0;
1585 break;
1586 }
1587 }
1588
1589 /*
1590 * This is to ptrotect against a race condition in which
1591 * first write to the host attention register clear the
1592 * host status register.
1593 */
1594 if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING)))
1595 phba->work_hs = old_host_status & ~HS_FFER1;
1596
3772a991 1597 spin_lock_irq(&phba->hbalock);
a257bf90 1598 phba->hba_flag &= ~DEFER_ERATT;
3772a991 1599 spin_unlock_irq(&phba->hbalock);
a257bf90
JS		 1600 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
1601 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
1602}
1603
3772a991
JS		 1604static void
1605lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba)
1606{
1607 struct lpfc_board_event_header board_event;
1608 struct Scsi_Host *shost;
1609
1610 board_event.event_type = FC_REG_BOARD_EVENT;
1611 board_event.subcategory = LPFC_EVENT_PORTINTERR;
1612 shost = lpfc_shost_from_vport(phba->pport);
1613 fc_host_post_vendor_event(shost, fc_get_event_number(),
1614 sizeof(board_event),
1615 (char *) &board_event,
1616 LPFC_NL_VENDOR_ID);
1617}
1618
e59058c4 1619/**
3772a991 1620 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler
e59058c4
JS		 1621 * @phba: pointer to lpfc hba data structure.
1622 *
1623 * This routine is invoked to handle the following HBA hardware error
1624 * conditions:
1625 * 1 - HBA error attention interrupt
1626 * 2 - DMA ring index out of range
1627 * 3 - Mailbox command came back as unknown
1628 **/
3772a991
JS		 1629static void
1630lpfc_handle_eratt_s3(struct lpfc_hba *phba)
dea3101e 1631{
2e0fef85 1632 struct lpfc_vport *vport = phba->pport;
2e0fef85 1633 struct lpfc_sli *psli = &phba->sli;
d2873e4c 1634 uint32_t event_data;
57127f15
JS		 1635 unsigned long temperature;
1636 struct temp_event temp_event_data;
92d7f7b0 1637 struct Scsi_Host *shost;
2e0fef85 1638
8d63f375 1639 /* If the pci channel is offline, ignore possible errors,
3772a991
JS		 1640 * since we cannot communicate with the pci card anyway.
1641 */
1642 if (pci_channel_offline(phba->pcidev)) {
1643 spin_lock_irq(&phba->hbalock);
1644 phba->hba_flag &= ~DEFER_ERATT;
1645 spin_unlock_irq(&phba->hbalock);
8d63f375 1646 return;
3772a991
JS		 1647 }
1648
13815c83
JS		 1649 /* If resets are disabled then leave the HBA alone and return */
1650 if (!phba->cfg_enable_hba_reset)
1651 return;
dea3101e 1652
ea2151b4 1653 /* Send an internal error event to mgmt application */
3772a991 1654 lpfc_board_errevt_to_mgmt(phba);
ea2151b4 1655
a257bf90
JS		 1656 if (phba->hba_flag & DEFER_ERATT)
1657 lpfc_handle_deferred_eratt(phba);
1658
dcf2a4e0
JS		 1659 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) {
1660 if (phba->work_hs & HS_FFER6)
1661 /* Re-establishing Link */
1662 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1663 "1301 Re-establishing Link "
1664 "Data: x%x x%x x%x\n",
1665 phba->work_hs, phba->work_status[0],
1666 phba->work_status[1]);
1667 if (phba->work_hs & HS_FFER8)
1668 /* Device Zeroization */
1669 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1670 "2861 Host Authentication device "
1671 "zeroization Data:x%x x%x x%x\n",
1672 phba->work_hs, phba->work_status[0],
1673 phba->work_status[1]);
58da1ffb 1674
92d7f7b0 1675 spin_lock_irq(&phba->hbalock);
f4b4c68f 1676 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
92d7f7b0 1677 spin_unlock_irq(&phba->hbalock);
dea3101e 1678
1679 /*
1680 * Firmware stops when it triggled erratt with HS_FFER6.
1681 * That could cause the I/Os dropped by the firmware.
1682 * Error iocb (I/O) on txcmplq and let the SCSI layer
1683 * retry it after re-establishing link.
1684 */
db55fba8 1685 lpfc_sli_abort_fcp_rings(phba);
dea3101e 1686
dea3101e 1687 /*
1688 * There was a firmware error. Take the hba offline and then
1689 * attempt to restart it.
1690 */
618a5230 1691 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
dea3101e 1692 lpfc_offline(phba);
41415862 1693 lpfc_sli_brdrestart(phba);
dea3101e 1694 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
46fa311e 1695 lpfc_unblock_mgmt_io(phba);
dea3101e 1696 return;
1697 }
46fa311e 1698 lpfc_unblock_mgmt_io(phba);
57127f15
JS		 1699 } else if (phba->work_hs & HS_CRIT_TEMP) {
1700 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET);
1701 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1702 temp_event_data.event_code = LPFC_CRIT_TEMP;
1703 temp_event_data.data = (uint32_t)temperature;
1704
1705 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d7c255b2 1706 "0406 Adapter maximum temperature exceeded "
57127f15
JS		 1707 "(%ld), taking this port offline "
1708 "Data: x%x x%x x%x\n",
1709 temperature, phba->work_hs,
1710 phba->work_status[0], phba->work_status[1]);
1711
1712 shost = lpfc_shost_from_vport(phba->pport);
1713 fc_host_post_vendor_event(shost, fc_get_event_number(),
1714 sizeof(temp_event_data),
1715 (char *) &temp_event_data,
1716 SCSI_NL_VID_TYPE_PCI
1717 | PCI_VENDOR_ID_EMULEX);
1718
7af67051 1719 spin_lock_irq(&phba->hbalock);
7af67051
JS		 1720 phba->over_temp_state = HBA_OVER_TEMP;
1721 spin_unlock_irq(&phba->hbalock);
09372820 1722 lpfc_offline_eratt(phba);
57127f15 1723
dea3101e 1724 } else {
1725 /* The if clause above forces this code path when the status
9399627f
JS		 1726 * failure is a value other than FFER6. Do not call the offline
1727 * twice. This is the adapter hardware error path.
dea3101e 1728 */
1729 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 1730 "0457 Adapter Hardware Error "
dea3101e 1731 "Data: x%x x%x x%x\n",
e8b62011 1732 phba->work_hs,
dea3101e 1733 phba->work_status[0], phba->work_status[1]);
1734
d2873e4c 1735 event_data = FC_REG_DUMP_EVENT;
92d7f7b0 1736 shost = lpfc_shost_from_vport(vport);
2e0fef85 1737 fc_host_post_vendor_event(shost, fc_get_event_number(),
d2873e4c
JS		 1738 sizeof(event_data), (char *) &event_data,
1739 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
1740
09372820 1741 lpfc_offline_eratt(phba);
dea3101e 1742 }
9399627f 1743 return;
dea3101e 1744}
1745
618a5230
JS		 1746/**
1747 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg
1748 * @phba: pointer to lpfc hba data structure.
1749 * @mbx_action: flag for mailbox shutdown action.
1750 *
1751 * This routine is invoked to perform an SLI4 port PCI function reset in
1752 * response to port status register polling attention. It waits for port
1753 * status register (ERR, RDY, RN) bits before proceeding with function reset.
1754 * During this process, interrupt vectors are freed and later requested
1755 * for handling possible port resource change.
1756 **/
1757static int
e10b2022
JS		 1758lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action,
1759 bool en_rn_msg)
618a5230
JS		 1760{
1761 int rc;
1762 uint32_t intr_mode;
1763
65791f1f
JS		 1764 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
1765 LPFC_SLI_INTF_IF_TYPE_2) {
1766 /*
1767 * On error status condition, driver need to wait for port
1768 * ready before performing reset.
1769 */
1770 rc = lpfc_sli4_pdev_status_reg_wait(phba);
0e916ee7 1771 if (rc)
65791f1f
JS		 1772 return rc;
1773 }
0e916ee7 1774
65791f1f
JS		 1775 /* need reset: attempt for port recovery */
1776 if (en_rn_msg)
1777 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1778 "2887 Reset Needed: Attempting Port "
1779 "Recovery...\n");
1780 lpfc_offline_prep(phba, mbx_action);
1781 lpfc_offline(phba);
1782 /* release interrupt for possible resource change */
1783 lpfc_sli4_disable_intr(phba);
1784 lpfc_sli_brdrestart(phba);
1785 /* request and enable interrupt */
1786 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
1787 if (intr_mode == LPFC_INTR_ERROR) {
1788 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1789 "3175 Failed to enable interrupt\n");
1790 return -EIO;
618a5230 1791 }
65791f1f
JS		 1792 phba->intr_mode = intr_mode;
1793 rc = lpfc_online(phba);
1794 if (rc == 0)
1795 lpfc_unblock_mgmt_io(phba);
1796
618a5230
JS		 1797 return rc;
1798}
1799
da0436e9
JS		 1800/**
1801 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler
1802 * @phba: pointer to lpfc hba data structure.
1803 *
1804 * This routine is invoked to handle the SLI4 HBA hardware error attention
1805 * conditions.
1806 **/
1807static void
1808lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1809{
1810 struct lpfc_vport *vport = phba->pport;
1811 uint32_t event_data;
1812 struct Scsi_Host *shost;
2fcee4bf 1813 uint32_t if_type;
2e90f4b5
JS		 1814 struct lpfc_register portstat_reg = {0};
1815 uint32_t reg_err1, reg_err2;
1816 uint32_t uerrlo_reg, uemasklo_reg;
65791f1f 1817 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2;
e10b2022 1818 bool en_rn_msg = true;
946727dc 1819 struct temp_event temp_event_data;
65791f1f
JS		 1820 struct lpfc_register portsmphr_reg;
1821 int rc, i;
da0436e9
JS		 1822
1823 /* If the pci channel is offline, ignore possible errors, since
1824 * we cannot communicate with the pci card anyway.
1825 */
1826 if (pci_channel_offline(phba->pcidev))
1827 return;
da0436e9 1828
65791f1f 1829 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
2fcee4bf
JS		 1830 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
1831 switch (if_type) {
1832 case LPFC_SLI_INTF_IF_TYPE_0:
2e90f4b5
JS		 1833 pci_rd_rc1 = lpfc_readl(
1834 phba->sli4_hba.u.if_type0.UERRLOregaddr,
1835 &uerrlo_reg);
1836 pci_rd_rc2 = lpfc_readl(
1837 phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
1838 &uemasklo_reg);
1839 /* consider PCI bus read error as pci_channel_offline */
1840 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO)
1841 return;
65791f1f
JS		 1842 if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) {
1843 lpfc_sli4_offline_eratt(phba);
1844 return;
1845 }
1846 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1847 "7623 Checking UE recoverable");
1848
1849 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
1850 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1851 &portsmphr_reg.word0))
1852 continue;
1853
1854 smphr_port_status = bf_get(lpfc_port_smphr_port_status,
1855 &portsmphr_reg);
1856 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1857 LPFC_PORT_SEM_UE_RECOVERABLE)
1858 break;
1859 /*Sleep for 1Sec, before checking SEMAPHORE */
1860 msleep(1000);
1861 }
1862
1863 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1864 "4827 smphr_port_status x%x : Waited %dSec",
1865 smphr_port_status, i);
1866
1867 /* Recoverable UE, reset the HBA device */
1868 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1869 LPFC_PORT_SEM_UE_RECOVERABLE) {
1870 for (i = 0; i < 20; i++) {
1871 msleep(1000);
1872 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1873 &portsmphr_reg.word0) &&
1874 (LPFC_POST_STAGE_PORT_READY ==
1875 bf_get(lpfc_port_smphr_port_status,
1876 &portsmphr_reg))) {
1877 rc = lpfc_sli4_port_sta_fn_reset(phba,
1878 LPFC_MBX_NO_WAIT, en_rn_msg);
1879 if (rc == 0)
1880 return;
1881 lpfc_printf_log(phba,
1882 KERN_ERR, LOG_INIT,
1883 "4215 Failed to recover UE");
1884 break;
1885 }
1886 }
1887 }
1888 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1889 "7624 Firmware not ready: Failing UE recovery,"
1890 " waited %dSec", i);
2fcee4bf
JS		 1891 lpfc_sli4_offline_eratt(phba);
1892 break;
946727dc 1893
2fcee4bf 1894 case LPFC_SLI_INTF_IF_TYPE_2:
2e90f4b5
JS		 1895 pci_rd_rc1 = lpfc_readl(
1896 phba->sli4_hba.u.if_type2.STATUSregaddr,
1897 &portstat_reg.word0);
1898 /* consider PCI bus read error as pci_channel_offline */
6b5151fd
JS		 1899 if (pci_rd_rc1 == -EIO) {
1900 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1901 "3151 PCI bus read access failure: x%x\n",
1902 readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
2e90f4b5 1903 return;
6b5151fd 1904 }
2e90f4b5
JS		 1905 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
1906 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
2fcee4bf 1907 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
2fcee4bf
JS		 1908 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1909 "2889 Port Overtemperature event, "
946727dc
JS		 1910 "taking port offline Data: x%x x%x\n",
1911 reg_err1, reg_err2);
1912
310429ef 1913 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS		 1914 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1915 temp_event_data.event_code = LPFC_CRIT_TEMP;
1916 temp_event_data.data = 0xFFFFFFFF;
1917
1918 shost = lpfc_shost_from_vport(phba->pport);
1919 fc_host_post_vendor_event(shost, fc_get_event_number(),
1920 sizeof(temp_event_data),
1921 (char *)&temp_event_data,
1922 SCSI_NL_VID_TYPE_PCI
1923 | PCI_VENDOR_ID_EMULEX);
1924
2fcee4bf
JS		 1925 spin_lock_irq(&phba->hbalock);
1926 phba->over_temp_state = HBA_OVER_TEMP;
1927 spin_unlock_irq(&phba->hbalock);
1928 lpfc_sli4_offline_eratt(phba);
946727dc 1929 return;
2fcee4bf 1930 }
2e90f4b5 1931 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
e10b2022 1932 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) {
2e90f4b5 1933 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e10b2022
JS		 1934 "3143 Port Down: Firmware Update "
1935 "Detected\n");
1936 en_rn_msg = false;
1937 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2e90f4b5
JS		 1938 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1939 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1940 "3144 Port Down: Debug Dump\n");
1941 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1942 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON)
1943 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1944 "3145 Port Down: Provisioning\n");
618a5230 1945
946727dc
JS		 1946 /* If resets are disabled then leave the HBA alone and return */
1947 if (!phba->cfg_enable_hba_reset)
1948 return;
1949
618a5230 1950 /* Check port status register for function reset */
e10b2022
JS		 1951 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT,
1952 en_rn_msg);
618a5230
JS		 1953 if (rc == 0) {
1954 /* don't report event on forced debug dump */
1955 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1956 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1957 return;
1958 else
1959 break;
2fcee4bf 1960 }
618a5230 1961 /* fall through for not able to recover */
6b5151fd
JS		 1962 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1963 "3152 Unrecoverable error, bring the port "
1964 "offline\n");
2fcee4bf
JS		 1965 lpfc_sli4_offline_eratt(phba);
1966 break;
1967 case LPFC_SLI_INTF_IF_TYPE_1:
1968 default:
1969 break;
1970 }
2e90f4b5
JS		 1971 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1972 "3123 Report dump event to upper layer\n");
1973 /* Send an internal error event to mgmt application */
1974 lpfc_board_errevt_to_mgmt(phba);
1975
1976 event_data = FC_REG_DUMP_EVENT;
1977 shost = lpfc_shost_from_vport(vport);
1978 fc_host_post_vendor_event(shost, fc_get_event_number(),
1979 sizeof(event_data), (char *) &event_data,
1980 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
da0436e9
JS		 1981}
1982
1983/**
1984 * lpfc_handle_eratt - Wrapper func for handling hba error attention
1985 * @phba: pointer to lpfc HBA data structure.
1986 *
1987 * This routine wraps the actual SLI3 or SLI4 hba error attention handling
1988 * routine from the API jump table function pointer from the lpfc_hba struct.
1989 *
1990 * Return codes
af901ca1 1991 * 0 - success.
da0436e9
JS		 1992 * Any other value - error.
1993 **/
1994void
1995lpfc_handle_eratt(struct lpfc_hba *phba)
1996{
1997 (*phba->lpfc_handle_eratt)(phba);
1998}
1999
e59058c4 2000/**
3621a710 2001 * lpfc_handle_latt - The HBA link event handler
e59058c4
JS		 2002 * @phba: pointer to lpfc hba data structure.
2003 *
2004 * This routine is invoked from the worker thread to handle a HBA host
895427bd 2005 * attention link event. SLI3 only.
e59058c4 2006 **/
dea3101e 2007void
2e0fef85 2008lpfc_handle_latt(struct lpfc_hba *phba)
dea3101e 2009{
2e0fef85
JS		 2010 struct lpfc_vport *vport = phba->pport;
2011 struct lpfc_sli *psli = &phba->sli;
dea3101e 2012 LPFC_MBOXQ_t *pmb;
2013 volatile uint32_t control;
2014 struct lpfc_dmabuf *mp;
09372820 2015 int rc = 0;
dea3101e 2016
2017 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
09372820
JS		 2018 if (!pmb) {
2019 rc = 1;
dea3101e 2020 goto lpfc_handle_latt_err_exit;
09372820 2021 }
dea3101e 2022
2023 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
09372820
JS		 2024 if (!mp) {
2025 rc = 2;
dea3101e 2026 goto lpfc_handle_latt_free_pmb;
09372820 2027 }
dea3101e 2028
2029 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
09372820
JS		 2030 if (!mp->virt) {
2031 rc = 3;
dea3101e 2032 goto lpfc_handle_latt_free_mp;
09372820 2033 }
dea3101e 2034
6281bfe0 2035 /* Cleanup any outstanding ELS commands */
549e55cd 2036 lpfc_els_flush_all_cmd(phba);
dea3101e 2037
2038 psli->slistat.link_event++;
76a95d75
JS		 2039 lpfc_read_topology(phba, pmb, mp);
2040 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
2e0fef85 2041 pmb->vport = vport;
0d2b6b83 2042 /* Block ELS IOCBs until we have processed this mbox command */
895427bd 2043 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
0b727fea 2044 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT);
09372820
JS		 2045 if (rc == MBX_NOT_FINISHED) {
2046 rc = 4;
14691150 2047 goto lpfc_handle_latt_free_mbuf;
09372820 2048 }
dea3101e 2049
2050 /* Clear Link Attention in HA REG */
2e0fef85 2051 spin_lock_irq(&phba->hbalock);
dea3101e 2052 writel(HA_LATT, phba->HAregaddr);
2053 readl(phba->HAregaddr); /* flush */
2e0fef85 2054 spin_unlock_irq(&phba->hbalock);
dea3101e 2055
2056 return;
2057
14691150 2058lpfc_handle_latt_free_mbuf:
895427bd 2059 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
14691150 2060 lpfc_mbuf_free(phba, mp->virt, mp->phys);
dea3101e 2061lpfc_handle_latt_free_mp:
2062 kfree(mp);
2063lpfc_handle_latt_free_pmb:
1dcb58e5 2064 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 2065lpfc_handle_latt_err_exit:
2066 /* Enable Link attention interrupts */
2e0fef85 2067 spin_lock_irq(&phba->hbalock);
dea3101e 2068 psli->sli_flag |= LPFC_PROCESS_LA;
2069 control = readl(phba->HCregaddr);
2070 control |= HC_LAINT_ENA;
2071 writel(control, phba->HCregaddr);
2072 readl(phba->HCregaddr); /* flush */
2073
2074 /* Clear Link Attention in HA REG */
2075 writel(HA_LATT, phba->HAregaddr);
2076 readl(phba->HAregaddr); /* flush */
2e0fef85 2077 spin_unlock_irq(&phba->hbalock);
dea3101e 2078 lpfc_linkdown(phba);
2e0fef85 2079 phba->link_state = LPFC_HBA_ERROR;
dea3101e 2080
09372820
JS		 2081 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
2082 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc);
dea3101e 2083
2084 return;
2085}
2086
e59058c4 2087/**
3621a710 2088 * lpfc_parse_vpd - Parse VPD (Vital Product Data)
e59058c4
JS		 2089 * @phba: pointer to lpfc hba data structure.
2090 * @vpd: pointer to the vital product data.
2091 * @len: length of the vital product data in bytes.
2092 *
2093 * This routine parses the Vital Product Data (VPD). The VPD is treated as
2094 * an array of characters. In this routine, the ModelName, ProgramType, and
2095 * ModelDesc, etc. fields of the phba data structure will be populated.
2096 *
2097 * Return codes
2098 * 0 - pointer to the VPD passed in is NULL
2099 * 1 - success
2100 **/
3772a991 2101int
2e0fef85 2102lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len)
dea3101e 2103{
2104 uint8_t lenlo, lenhi;
07da60c1 2105 int Length;
dea3101e 2106 int i, j;
2107 int finished = 0;
2108 int index = 0;
2109
2110 if (!vpd)
2111 return 0;
2112
2113 /* Vital Product */
ed957684 2114 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 2115 "0455 Vital Product Data: x%x x%x x%x x%x\n",
dea3101e 2116 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
2117 (uint32_t) vpd[3]);
74b72a59 2118 while (!finished && (index < (len - 4))) {
dea3101e 2119 switch (vpd[index]) {
2120 case 0x82:
74b72a59 2121 case 0x91:
dea3101e 2122 index += 1;
2123 lenlo = vpd[index];
2124 index += 1;
2125 lenhi = vpd[index];
2126 index += 1;
2127 i = ((((unsigned short)lenhi) << 8) + lenlo);
2128 index += i;
2129 break;
2130 case 0x90:
2131 index += 1;
2132 lenlo = vpd[index];
2133 index += 1;
2134 lenhi = vpd[index];
2135 index += 1;
2136 Length = ((((unsigned short)lenhi) << 8) + lenlo);
74b72a59
JW		 2137 if (Length > len - index)
2138 Length = len - index;
dea3101e 2139 while (Length > 0) {
2140 /* Look for Serial Number */
2141 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
2142 index += 2;
2143 i = vpd[index];
2144 index += 1;
2145 j = 0;
2146 Length -= (3+i);
2147 while(i--) {
2148 phba->SerialNumber[j++] = vpd[index++];
2149 if (j == 31)
2150 break;
2151 }
2152 phba->SerialNumber[j] = 0;
2153 continue;
2154 }
2155 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
2156 phba->vpd_flag |= VPD_MODEL_DESC;
2157 index += 2;
2158 i = vpd[index];
2159 index += 1;
2160 j = 0;
2161 Length -= (3+i);
2162 while(i--) {
2163 phba->ModelDesc[j++] = vpd[index++];
2164 if (j == 255)
2165 break;
2166 }
2167 phba->ModelDesc[j] = 0;
2168 continue;
2169 }
2170 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
2171 phba->vpd_flag |= VPD_MODEL_NAME;
2172 index += 2;
2173 i = vpd[index];
2174 index += 1;
2175 j = 0;
2176 Length -= (3+i);
2177 while(i--) {
2178 phba->ModelName[j++] = vpd[index++];
2179 if (j == 79)
2180 break;
2181 }
2182 phba->ModelName[j] = 0;
2183 continue;
2184 }
2185 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
2186 phba->vpd_flag |= VPD_PROGRAM_TYPE;
2187 index += 2;
2188 i = vpd[index];
2189 index += 1;
2190 j = 0;
2191 Length -= (3+i);
2192 while(i--) {
2193 phba->ProgramType[j++] = vpd[index++];
2194 if (j == 255)
2195 break;
2196 }
2197 phba->ProgramType[j] = 0;
2198 continue;
2199 }
2200 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
2201 phba->vpd_flag |= VPD_PORT;
2202 index += 2;
2203 i = vpd[index];
2204 index += 1;
2205 j = 0;
2206 Length -= (3+i);
2207 while(i--) {
cd1c8301
JS		 2208 if ((phba->sli_rev == LPFC_SLI_REV4) &&
2209 (phba->sli4_hba.pport_name_sta ==
2210 LPFC_SLI4_PPNAME_GET)) {
2211 j++;
2212 index++;
2213 } else
2214 phba->Port[j++] = vpd[index++];
2215 if (j == 19)
2216 break;
dea3101e 2217 }
cd1c8301
JS		 2218 if ((phba->sli_rev != LPFC_SLI_REV4) ||
2219 (phba->sli4_hba.pport_name_sta ==
2220 LPFC_SLI4_PPNAME_NON))
2221 phba->Port[j] = 0;
dea3101e 2222 continue;
2223 }
2224 else {
2225 index += 2;
2226 i = vpd[index];
2227 index += 1;
2228 index += i;
2229 Length -= (3 + i);
2230 }
2231 }
2232 finished = 0;
2233 break;
2234 case 0x78:
2235 finished = 1;
2236 break;
2237 default:
2238 index ++;
2239 break;
2240 }
74b72a59 2241 }
dea3101e 2242
2243 return(1);
2244}
2245
e59058c4 2246/**
3621a710 2247 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description
e59058c4
JS		 2248 * @phba: pointer to lpfc hba data structure.
2249 * @mdp: pointer to the data structure to hold the derived model name.
2250 * @descp: pointer to the data structure to hold the derived description.
2251 *
2252 * This routine retrieves HBA's description based on its registered PCI device
2253 * ID. The @descp passed into this function points to an array of 256 chars. It
2254 * shall be returned with the model name, maximum speed, and the host bus type.
2255 * The @mdp passed into this function points to an array of 80 chars. When the
2256 * function returns, the @mdp will be filled with the model name.
2257 **/
dea3101e 2258static void
2e0fef85 2259lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
dea3101e 2260{
2261 lpfc_vpd_t *vp;
fefcb2b6 2262 uint16_t dev_id = phba->pcidev->device;
74b72a59 2263 int max_speed;
84774a4d 2264 int GE = 0;
da0436e9 2265 int oneConnect = 0; /* default is not a oneConnect */
74b72a59 2266 struct {
a747c9ce
JS		 2267 char *name;
2268 char *bus;
2269 char *function;
2270 } m = {"<Unknown>", "", ""};
74b72a59
JW		 2271
2272 if (mdp && mdp[0] != '\0'
2273 && descp && descp[0] != '\0')
2274 return;
2275
d38dd52c
JS		 2276 if (phba->lmt & LMT_32Gb)
2277 max_speed = 32;
2278 else if (phba->lmt & LMT_16Gb)
c0c11512
JS		 2279 max_speed = 16;
2280 else if (phba->lmt & LMT_10Gb)
74b72a59
JW		 2281 max_speed = 10;
2282 else if (phba->lmt & LMT_8Gb)
2283 max_speed = 8;
2284 else if (phba->lmt & LMT_4Gb)
2285 max_speed = 4;
2286 else if (phba->lmt & LMT_2Gb)
2287 max_speed = 2;
4169d868 2288 else if (phba->lmt & LMT_1Gb)
74b72a59 2289 max_speed = 1;
4169d868
JS		 2290 else
2291 max_speed = 0;
dea3101e 2292
2293 vp = &phba->vpd;
dea3101e 2294
e4adb204 2295 switch (dev_id) {
06325e74 2296 case PCI_DEVICE_ID_FIREFLY:
12222f4f
JS		 2297 m = (typeof(m)){"LP6000", "PCI",
2298 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2299 break;
dea3101e 2300 case PCI_DEVICE_ID_SUPERFLY:
2301 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
12222f4f 2302 m = (typeof(m)){"LP7000", "PCI", ""};
dea3101e 2303 else
12222f4f
JS		 2304 m = (typeof(m)){"LP7000E", "PCI", ""};
2305 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e 2306 break;
2307 case PCI_DEVICE_ID_DRAGONFLY:
a747c9ce 2308 m = (typeof(m)){"LP8000", "PCI",
12222f4f 2309 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2310 break;
2311 case PCI_DEVICE_ID_CENTAUR:
2312 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
12222f4f 2313 m = (typeof(m)){"LP9002", "PCI", ""};
dea3101e 2314 else
12222f4f
JS		 2315 m = (typeof(m)){"LP9000", "PCI", ""};
2316 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e 2317 break;
2318 case PCI_DEVICE_ID_RFLY:
a747c9ce 2319 m = (typeof(m)){"LP952", "PCI",
12222f4f 2320 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2321 break;
2322 case PCI_DEVICE_ID_PEGASUS:
a747c9ce 2323 m = (typeof(m)){"LP9802", "PCI-X",
12222f4f 2324 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2325 break;
2326 case PCI_DEVICE_ID_THOR:
a747c9ce 2327 m = (typeof(m)){"LP10000", "PCI-X",
12222f4f 2328 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2329 break;
2330 case PCI_DEVICE_ID_VIPER:
a747c9ce 2331 m = (typeof(m)){"LPX1000", "PCI-X",
12222f4f 2332 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2333 break;
2334 case PCI_DEVICE_ID_PFLY:
a747c9ce 2335 m = (typeof(m)){"LP982", "PCI-X",
12222f4f 2336 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2337 break;
2338 case PCI_DEVICE_ID_TFLY:
a747c9ce 2339 m = (typeof(m)){"LP1050", "PCI-X",
12222f4f 2340 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2341 break;
2342 case PCI_DEVICE_ID_HELIOS:
a747c9ce 2343 m = (typeof(m)){"LP11000", "PCI-X2",
12222f4f 2344 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2345 break;
e4adb204 2346 case PCI_DEVICE_ID_HELIOS_SCSP:
a747c9ce 2347 m = (typeof(m)){"LP11000-SP", "PCI-X2",
12222f4f 2348 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC		 2349 break;
2350 case PCI_DEVICE_ID_HELIOS_DCSP:
a747c9ce 2351 m = (typeof(m)){"LP11002-SP", "PCI-X2",
12222f4f 2352 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC		 2353 break;
2354 case PCI_DEVICE_ID_NEPTUNE:
12222f4f
JS		 2355 m = (typeof(m)){"LPe1000", "PCIe",
2356 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC		 2357 break;
2358 case PCI_DEVICE_ID_NEPTUNE_SCSP:
12222f4f
JS		 2359 m = (typeof(m)){"LPe1000-SP", "PCIe",
2360 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC		 2361 break;
2362 case PCI_DEVICE_ID_NEPTUNE_DCSP:
12222f4f
JS		 2363 m = (typeof(m)){"LPe1002-SP", "PCIe",
2364 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204 2365 break;
dea3101e 2366 case PCI_DEVICE_ID_BMID:
a747c9ce 2367 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"};
dea3101e 2368 break;
2369 case PCI_DEVICE_ID_BSMB:
12222f4f
JS		 2370 m = (typeof(m)){"LP111", "PCI-X2",
2371 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2372 break;
2373 case PCI_DEVICE_ID_ZEPHYR:
a747c9ce 2374 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
dea3101e 2375 break;
e4adb204 2376 case PCI_DEVICE_ID_ZEPHYR_SCSP:
a747c9ce 2377 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
e4adb204
JSEC		 2378 break;
2379 case PCI_DEVICE_ID_ZEPHYR_DCSP:
a747c9ce 2380 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"};
a257bf90 2381 GE = 1;
e4adb204 2382 break;
dea3101e 2383 case PCI_DEVICE_ID_ZMID:
a747c9ce 2384 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"};
dea3101e 2385 break;
2386 case PCI_DEVICE_ID_ZSMB:
a747c9ce 2387 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"};
dea3101e 2388 break;
2389 case PCI_DEVICE_ID_LP101:
12222f4f
JS		 2390 m = (typeof(m)){"LP101", "PCI-X",
2391 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2392 break;
2393 case PCI_DEVICE_ID_LP10000S:
12222f4f
JS		 2394 m = (typeof(m)){"LP10000-S", "PCI",
2395 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2396 break;
e4adb204 2397 case PCI_DEVICE_ID_LP11000S:
12222f4f
JS		 2398 m = (typeof(m)){"LP11000-S", "PCI-X2",
2399 "Obsolete, Unsupported Fibre Channel Adapter"};
18a3b596 2400 break;
e4adb204 2401 case PCI_DEVICE_ID_LPE11000S:
12222f4f
JS		 2402 m = (typeof(m)){"LPe11000-S", "PCIe",
2403 "Obsolete, Unsupported Fibre Channel Adapter"};
5cc36b3c 2404 break;
b87eab38 2405 case PCI_DEVICE_ID_SAT:
a747c9ce 2406 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2407 break;
2408 case PCI_DEVICE_ID_SAT_MID:
a747c9ce 2409 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2410 break;
2411 case PCI_DEVICE_ID_SAT_SMB:
a747c9ce 2412 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2413 break;
2414 case PCI_DEVICE_ID_SAT_DCSP:
a747c9ce 2415 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2416 break;
2417 case PCI_DEVICE_ID_SAT_SCSP:
a747c9ce 2418 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2419 break;
2420 case PCI_DEVICE_ID_SAT_S:
a747c9ce 2421 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"};
b87eab38 2422 break;
84774a4d 2423 case PCI_DEVICE_ID_HORNET:
12222f4f
JS		 2424 m = (typeof(m)){"LP21000", "PCIe",
2425 "Obsolete, Unsupported FCoE Adapter"};
84774a4d
JS		 2426 GE = 1;
2427 break;
2428 case PCI_DEVICE_ID_PROTEUS_VF:
a747c9ce 2429 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2430 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS		 2431 break;
2432 case PCI_DEVICE_ID_PROTEUS_PF:
a747c9ce 2433 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2434 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS		 2435 break;
2436 case PCI_DEVICE_ID_PROTEUS_S:
a747c9ce 2437 m = (typeof(m)){"LPemv12002-S", "PCIe IOV",
12222f4f 2438 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d 2439 break;
da0436e9
JS		 2440 case PCI_DEVICE_ID_TIGERSHARK:
2441 oneConnect = 1;
a747c9ce 2442 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"};
da0436e9 2443 break;
a747c9ce 2444 case PCI_DEVICE_ID_TOMCAT:
6669f9bb 2445 oneConnect = 1;
a747c9ce
JS		 2446 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"};
2447 break;
2448 case PCI_DEVICE_ID_FALCON:
2449 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe",
2450 "EmulexSecure Fibre"};
6669f9bb 2451 break;
98fc5dd9
JS		 2452 case PCI_DEVICE_ID_BALIUS:
2453 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O",
12222f4f 2454 "Obsolete, Unsupported Fibre Channel Adapter"};
98fc5dd9 2455 break;
085c647c 2456 case PCI_DEVICE_ID_LANCER_FC:
c0c11512 2457 m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"};
085c647c 2458 break;
12222f4f
JS		 2459 case PCI_DEVICE_ID_LANCER_FC_VF:
2460 m = (typeof(m)){"LPe16000", "PCIe",
2461 "Obsolete, Unsupported Fibre Channel Adapter"};
2462 break;
085c647c
JS		 2463 case PCI_DEVICE_ID_LANCER_FCOE:
2464 oneConnect = 1;
079b5c91 2465 m = (typeof(m)){"OCe15100", "PCIe", "FCoE"};
085c647c 2466 break;
12222f4f
JS		 2467 case PCI_DEVICE_ID_LANCER_FCOE_VF:
2468 oneConnect = 1;
2469 m = (typeof(m)){"OCe15100", "PCIe",
2470 "Obsolete, Unsupported FCoE"};
2471 break;
d38dd52c
JS		 2472 case PCI_DEVICE_ID_LANCER_G6_FC:
2473 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"};
2474 break;
f8cafd38
JS		 2475 case PCI_DEVICE_ID_SKYHAWK:
2476 case PCI_DEVICE_ID_SKYHAWK_VF:
2477 oneConnect = 1;
2478 m = (typeof(m)){"OCe14000", "PCIe", "FCoE"};
2479 break;
5cc36b3c 2480 default:
a747c9ce 2481 m = (typeof(m)){"Unknown", "", ""};
e4adb204 2482 break;
dea3101e 2483 }
74b72a59
JW		 2484
2485 if (mdp && mdp[0] == '\0')
2486 snprintf(mdp, 79,"%s", m.name);
c0c11512
JS		 2487 /*
2488 * oneConnect hba requires special processing, they are all initiators
da0436e9
JS		 2489 * and we put the port number on the end
2490 */
2491 if (descp && descp[0] == '\0') {
2492 if (oneConnect)
2493 snprintf(descp, 255,
4169d868 2494 "Emulex OneConnect %s, %s Initiator %s",
a747c9ce 2495 m.name, m.function,
da0436e9 2496 phba->Port);
4169d868
JS		 2497 else if (max_speed == 0)
2498 snprintf(descp, 255,
290237d2 2499 "Emulex %s %s %s",
4169d868 2500 m.name, m.bus, m.function);
da0436e9
JS		 2501 else
2502 snprintf(descp, 255,
2503 "Emulex %s %d%s %s %s",
a747c9ce
JS		 2504 m.name, max_speed, (GE) ? "GE" : "Gb",
2505 m.bus, m.function);
da0436e9 2506 }
dea3101e 2507}
2508
e59058c4 2509/**
3621a710 2510 * lpfc_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring
e59058c4
JS		 2511 * @phba: pointer to lpfc hba data structure.
2512 * @pring: pointer to a IOCB ring.
2513 * @cnt: the number of IOCBs to be posted to the IOCB ring.
2514 *
2515 * This routine posts a given number of IOCBs with the associated DMA buffer
2516 * descriptors specified by the cnt argument to the given IOCB ring.
2517 *
2518 * Return codes
2519 * The number of IOCBs NOT able to be posted to the IOCB ring.
2520 **/
dea3101e 2521int
495a714c 2522lpfc_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt)
dea3101e 2523{
2524 IOCB_t *icmd;
0bd4ca25 2525 struct lpfc_iocbq *iocb;
dea3101e 2526 struct lpfc_dmabuf *mp1, *mp2;
2527
2528 cnt += pring->missbufcnt;
2529
2530 /* While there are buffers to post */
2531 while (cnt > 0) {
2532 /* Allocate buffer for command iocb */
0bd4ca25 2533 iocb = lpfc_sli_get_iocbq(phba);
dea3101e 2534 if (iocb == NULL) {
2535 pring->missbufcnt = cnt;
2536 return cnt;
2537 }
dea3101e 2538 icmd = &iocb->iocb;
2539
2540 /* 2 buffers can be posted per command */
2541 /* Allocate buffer to post */
2542 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2543 if (mp1)
98c9ea5c
JS		 2544 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys);
2545 if (!mp1 || !mp1->virt) {
c9475cb0 2546 kfree(mp1);
604a3e30 2547 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2548 pring->missbufcnt = cnt;
2549 return cnt;
2550 }
2551
2552 INIT_LIST_HEAD(&mp1->list);
2553 /* Allocate buffer to post */
2554 if (cnt > 1) {
2555 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2556 if (mp2)
2557 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
2558 &mp2->phys);
98c9ea5c 2559 if (!mp2 || !mp2->virt) {
c9475cb0 2560 kfree(mp2);
dea3101e 2561 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2562 kfree(mp1);
604a3e30 2563 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2564 pring->missbufcnt = cnt;
2565 return cnt;
2566 }
2567
2568 INIT_LIST_HEAD(&mp2->list);
2569 } else {
2570 mp2 = NULL;
2571 }
2572
2573 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
2574 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
2575 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
2576 icmd->ulpBdeCount = 1;
2577 cnt--;
2578 if (mp2) {
2579 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
2580 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
2581 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
2582 cnt--;
2583 icmd->ulpBdeCount = 2;
2584 }
2585
2586 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
2587 icmd->ulpLe = 1;
2588
3772a991
JS		 2589 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) ==
2590 IOCB_ERROR) {
dea3101e 2591 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2592 kfree(mp1);
2593 cnt++;
2594 if (mp2) {
2595 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
2596 kfree(mp2);
2597 cnt++;
2598 }
604a3e30 2599 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2600 pring->missbufcnt = cnt;
dea3101e 2601 return cnt;
2602 }
dea3101e 2603 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
92d7f7b0 2604 if (mp2)
dea3101e 2605 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
dea3101e 2606 }
2607 pring->missbufcnt = 0;
2608 return 0;
2609}
2610
e59058c4 2611/**
3621a710 2612 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring
e59058c4
JS		 2613 * @phba: pointer to lpfc hba data structure.
2614 *
2615 * This routine posts initial receive IOCB buffers to the ELS ring. The
2616 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is
895427bd 2617 * set to 64 IOCBs. SLI3 only.
e59058c4
JS		 2618 *
2619 * Return codes
2620 * 0 - success (currently always success)
2621 **/
dea3101e 2622static int
2e0fef85 2623lpfc_post_rcv_buf(struct lpfc_hba *phba)
dea3101e 2624{
2625 struct lpfc_sli *psli = &phba->sli;
2626
2627 /* Ring 0, ELS / CT buffers */
895427bd 2628 lpfc_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0);
dea3101e 2629 /* Ring 2 - FCP no buffers needed */
2630
2631 return 0;
2632}
2633
2634#define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
2635
e59058c4 2636/**
3621a710 2637 * lpfc_sha_init - Set up initial array of hash table entries
e59058c4
JS		 2638 * @HashResultPointer: pointer to an array as hash table.
2639 *
2640 * This routine sets up the initial values to the array of hash table entries
2641 * for the LC HBAs.
2642 **/
dea3101e 2643static void
2644lpfc_sha_init(uint32_t * HashResultPointer)
2645{
2646 HashResultPointer[0] = 0x67452301;
2647 HashResultPointer[1] = 0xEFCDAB89;
2648 HashResultPointer[2] = 0x98BADCFE;
2649 HashResultPointer[3] = 0x10325476;
2650 HashResultPointer[4] = 0xC3D2E1F0;
2651}
2652
e59058c4 2653/**
3621a710 2654 * lpfc_sha_iterate - Iterate initial hash table with the working hash table
e59058c4
JS		 2655 * @HashResultPointer: pointer to an initial/result hash table.
2656 * @HashWorkingPointer: pointer to an working hash table.
2657 *
2658 * This routine iterates an initial hash table pointed by @HashResultPointer
2659 * with the values from the working hash table pointeed by @HashWorkingPointer.
2660 * The results are putting back to the initial hash table, returned through
2661 * the @HashResultPointer as the result hash table.
2662 **/
dea3101e 2663static void
2664lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
2665{
2666 int t;
2667 uint32_t TEMP;
2668 uint32_t A, B, C, D, E;
2669 t = 16;
2670 do {
2671 HashWorkingPointer[t] =
2672 S(1,
2673 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
2674 8] ^
2675 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
2676 } while (++t <= 79);
2677 t = 0;
2678 A = HashResultPointer[0];
2679 B = HashResultPointer[1];
2680 C = HashResultPointer[2];
2681 D = HashResultPointer[3];
2682 E = HashResultPointer[4];
2683
2684 do {
2685 if (t < 20) {
2686 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
2687 } else if (t < 40) {
2688 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
2689 } else if (t < 60) {
2690 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
2691 } else {
2692 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
2693 }
2694 TEMP += S(5, A) + E + HashWorkingPointer[t];
2695 E = D;
2696 D = C;
2697 C = S(30, B);
2698 B = A;
2699 A = TEMP;
2700 } while (++t <= 79);
2701
2702 HashResultPointer[0] += A;
2703 HashResultPointer[1] += B;
2704 HashResultPointer[2] += C;
2705 HashResultPointer[3] += D;
2706 HashResultPointer[4] += E;
2707
2708}
2709
e59058c4 2710/**
3621a710 2711 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA
e59058c4
JS		 2712 * @RandomChallenge: pointer to the entry of host challenge random number array.
2713 * @HashWorking: pointer to the entry of the working hash array.
2714 *
2715 * This routine calculates the working hash array referred by @HashWorking
2716 * from the challenge random numbers associated with the host, referred by
2717 * @RandomChallenge. The result is put into the entry of the working hash
2718 * array and returned by reference through @HashWorking.
2719 **/
dea3101e 2720static void
2721lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
2722{
2723 *HashWorking = (*RandomChallenge ^ *HashWorking);
2724}
2725
e59058c4 2726/**
3621a710 2727 * lpfc_hba_init - Perform special handling for LC HBA initialization
e59058c4
JS		 2728 * @phba: pointer to lpfc hba data structure.
2729 * @hbainit: pointer to an array of unsigned 32-bit integers.
2730 *
2731 * This routine performs the special handling for LC HBA initialization.
2732 **/
dea3101e 2733void
2734lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
2735{
2736 int t;
2737 uint32_t *HashWorking;
2e0fef85 2738 uint32_t *pwwnn = (uint32_t *) phba->wwnn;
dea3101e 2739
bbfbbbc1 2740 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL);
dea3101e 2741 if (!HashWorking)
2742 return;
2743
dea3101e 2744 HashWorking[0] = HashWorking[78] = *pwwnn++;
2745 HashWorking[1] = HashWorking[79] = *pwwnn;
2746
2747 for (t = 0; t < 7; t++)
2748 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
2749
2750 lpfc_sha_init(hbainit);
2751 lpfc_sha_iterate(hbainit, HashWorking);
2752 kfree(HashWorking);
2753}
2754
e59058c4 2755/**
3621a710 2756 * lpfc_cleanup - Performs vport cleanups before deleting a vport
e59058c4
JS		 2757 * @vport: pointer to a virtual N_Port data structure.
2758 *
2759 * This routine performs the necessary cleanups before deleting the @vport.
2760 * It invokes the discovery state machine to perform necessary state
2761 * transitions and to release the ndlps associated with the @vport. Note,
2762 * the physical port is treated as @vport 0.
2763 **/
87af33fe 2764void
2e0fef85 2765lpfc_cleanup(struct lpfc_vport *vport)
dea3101e 2766{
87af33fe 2767 struct lpfc_hba *phba = vport->phba;
dea3101e 2768 struct lpfc_nodelist *ndlp, *next_ndlp;
a8adb832 2769 int i = 0;
dea3101e 2770
87af33fe
JS		 2771 if (phba->link_state > LPFC_LINK_DOWN)
2772 lpfc_port_link_failure(vport);
2773
2774 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) {
e47c9093
JS		 2775 if (!NLP_CHK_NODE_ACT(ndlp)) {
2776 ndlp = lpfc_enable_node(vport, ndlp,
2777 NLP_STE_UNUSED_NODE);
2778 if (!ndlp)
2779 continue;
2780 spin_lock_irq(&phba->ndlp_lock);
2781 NLP_SET_FREE_REQ(ndlp);
2782 spin_unlock_irq(&phba->ndlp_lock);
2783 /* Trigger the release of the ndlp memory */
2784 lpfc_nlp_put(ndlp);
2785 continue;
2786 }
2787 spin_lock_irq(&phba->ndlp_lock);
2788 if (NLP_CHK_FREE_REQ(ndlp)) {
2789 /* The ndlp should not be in memory free mode already */
2790 spin_unlock_irq(&phba->ndlp_lock);
2791 continue;
2792 } else
2793 /* Indicate request for freeing ndlp memory */
2794 NLP_SET_FREE_REQ(ndlp);
2795 spin_unlock_irq(&phba->ndlp_lock);
2796
58da1ffb
JS		 2797 if (vport->port_type != LPFC_PHYSICAL_PORT &&
2798 ndlp->nlp_DID == Fabric_DID) {
2799 /* Just free up ndlp with Fabric_DID for vports */
2800 lpfc_nlp_put(ndlp);
2801 continue;
2802 }
2803
eff4a01b
JS		 2804 /* take care of nodes in unused state before the state
2805 * machine taking action.
2806 */
2807 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) {
2808 lpfc_nlp_put(ndlp);
2809 continue;
2810 }
2811
87af33fe
JS		 2812 if (ndlp->nlp_type & NLP_FABRIC)
2813 lpfc_disc_state_machine(vport, ndlp, NULL,
2814 NLP_EVT_DEVICE_RECOVERY);
e47c9093 2815
87af33fe
JS		 2816 lpfc_disc_state_machine(vport, ndlp, NULL,
2817 NLP_EVT_DEVICE_RM);
2818 }
2819
a8adb832
JS		 2820 /* At this point, ALL ndlp's should be gone
2821 * because of the previous NLP_EVT_DEVICE_RM.
2822 * Lets wait for this to happen, if needed.
2823 */
87af33fe 2824 while (!list_empty(&vport->fc_nodes)) {
a8adb832 2825 if (i++ > 3000) {
87af33fe 2826 lpfc_printf_vlog(vport, KERN_ERR, LOG_DISCOVERY,
a8adb832 2827 "0233 Nodelist not empty\n");
e47c9093
JS		 2828 list_for_each_entry_safe(ndlp, next_ndlp,
2829 &vport->fc_nodes, nlp_listp) {
2830 lpfc_printf_vlog(ndlp->vport, KERN_ERR,
2831 LOG_NODE,
d7c255b2 2832 "0282 did:x%x ndlp:x%p "
e47c9093
JS		 2833 "usgmap:x%x refcnt:%d\n",
2834 ndlp->nlp_DID, (void *)ndlp,
2835 ndlp->nlp_usg_map,
2c935bc5 2836 kref_read(&ndlp->kref));
e47c9093 2837 }
a8adb832 2838 break;
87af33fe 2839 }
a8adb832
JS		 2840
2841 /* Wait for any activity on ndlps to settle */
2842 msleep(10);
87af33fe 2843 }
1151e3ec 2844 lpfc_cleanup_vports_rrqs(vport, NULL);
dea3101e 2845}
2846
e59058c4 2847/**
3621a710 2848 * lpfc_stop_vport_timers - Stop all the timers associated with a vport
e59058c4
JS		 2849 * @vport: pointer to a virtual N_Port data structure.
2850 *
2851 * This routine stops all the timers associated with a @vport. This function
2852 * is invoked before disabling or deleting a @vport. Note that the physical
2853 * port is treated as @vport 0.
2854 **/
92d7f7b0
JS		 2855void
2856lpfc_stop_vport_timers(struct lpfc_vport *vport)
dea3101e 2857{
92d7f7b0 2858 del_timer_sync(&vport->els_tmofunc);
92494144 2859 del_timer_sync(&vport->delayed_disc_tmo);
92d7f7b0
JS		 2860 lpfc_can_disctmo(vport);
2861 return;
dea3101e 2862}
2863
ecfd03c6
JS		 2864/**
2865 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2866 * @phba: pointer to lpfc hba data structure.
2867 *
2868 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The
2869 * caller of this routine should already hold the host lock.
2870 **/
2871void
2872__lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2873{
5ac6b303
JS		 2874 /* Clear pending FCF rediscovery wait flag */
2875 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
2876
ecfd03c6
JS		 2877 /* Now, try to stop the timer */
2878 del_timer(&phba->fcf.redisc_wait);
2879}
2880
2881/**
2882 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2883 * @phba: pointer to lpfc hba data structure.
2884 *
2885 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It
2886 * checks whether the FCF rediscovery wait timer is pending with the host
2887 * lock held before proceeding with disabling the timer and clearing the
2888 * wait timer pendig flag.
2889 **/
2890void
2891lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2892{
2893 spin_lock_irq(&phba->hbalock);
2894 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
2895 /* FCF rediscovery timer already fired or stopped */
2896 spin_unlock_irq(&phba->hbalock);
2897 return;
2898 }
2899 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
5ac6b303
JS		 2900 /* Clear failover in progress flags */
2901 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC);
ecfd03c6
JS		 2902 spin_unlock_irq(&phba->hbalock);
2903}
2904
e59058c4 2905/**
3772a991 2906 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA
e59058c4
JS		 2907 * @phba: pointer to lpfc hba data structure.
2908 *
2909 * This routine stops all the timers associated with a HBA. This function is
2910 * invoked before either putting a HBA offline or unloading the driver.
2911 **/
3772a991
JS		 2912void
2913lpfc_stop_hba_timers(struct lpfc_hba *phba)
dea3101e 2914{
51ef4c26 2915 lpfc_stop_vport_timers(phba->pport);
2e0fef85 2916 del_timer_sync(&phba->sli.mbox_tmo);
92d7f7b0 2917 del_timer_sync(&phba->fabric_block_timer);
9399627f 2918 del_timer_sync(&phba->eratt_poll);
3772a991 2919 del_timer_sync(&phba->hb_tmofunc);
1151e3ec
JS		 2920 if (phba->sli_rev == LPFC_SLI_REV4) {
2921 del_timer_sync(&phba->rrq_tmr);
2922 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
2923 }
3772a991
JS		 2924 phba->hb_outstanding = 0;
2925
2926 switch (phba->pci_dev_grp) {
2927 case LPFC_PCI_DEV_LP:
2928 /* Stop any LightPulse device specific driver timers */
2929 del_timer_sync(&phba->fcp_poll_timer);
2930 break;
2931 case LPFC_PCI_DEV_OC:
2932 /* Stop any OneConnect device sepcific driver timers */
ecfd03c6 2933 lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3772a991
JS		 2934 break;
2935 default:
2936 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2937 "0297 Invalid device group (x%x)\n",
2938 phba->pci_dev_grp);
2939 break;
2940 }
2e0fef85 2941 return;
dea3101e 2942}
2943
e59058c4 2944/**
3621a710 2945 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked
e59058c4
JS		 2946 * @phba: pointer to lpfc hba data structure.
2947 *
2948 * This routine marks a HBA's management interface as blocked. Once the HBA's
2949 * management interface is marked as blocked, all the user space access to
2950 * the HBA, whether they are from sysfs interface or libdfc interface will
2951 * all be blocked. The HBA is set to block the management interface when the
2952 * driver prepares the HBA interface for online or offline.
2953 **/
a6ababd2 2954static void
618a5230 2955lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action)
a6ababd2
AB		 2956{
2957 unsigned long iflag;
6e7288d9
JS		 2958 uint8_t actcmd = MBX_HEARTBEAT;
2959 unsigned long timeout;
2960
a6ababd2
AB		 2961 spin_lock_irqsave(&phba->hbalock, iflag);
2962 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO;
618a5230
JS		 2963 spin_unlock_irqrestore(&phba->hbalock, iflag);
2964 if (mbx_action == LPFC_MBX_NO_WAIT)
2965 return;
2966 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
2967 spin_lock_irqsave(&phba->hbalock, iflag);
a183a15f 2968 if (phba->sli.mbox_active) {
6e7288d9 2969 actcmd = phba->sli.mbox_active->u.mb.mbxCommand;
a183a15f
JS		 2970 /* Determine how long we might wait for the active mailbox
2971 * command to be gracefully completed by firmware.
2972 */
2973 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
2974 phba->sli.mbox_active) * 1000) + jiffies;
2975 }
a6ababd2 2976 spin_unlock_irqrestore(&phba->hbalock, iflag);
a183a15f 2977
6e7288d9
JS		 2978 /* Wait for the outstnading mailbox command to complete */
2979 while (phba->sli.mbox_active) {
2980 /* Check active mailbox complete status every 2ms */
2981 msleep(2);
2982 if (time_after(jiffies, timeout)) {
2983 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2984 "2813 Mgmt IO is Blocked %x "
2985 "- mbox cmd %x still active\n",
2986 phba->sli.sli_flag, actcmd);
2987 break;
2988 }
2989 }
a6ababd2
AB		 2990}
2991
6b5151fd
JS		 2992/**
2993 * lpfc_sli4_node_prep - Assign RPIs for active nodes.
2994 * @phba: pointer to lpfc hba data structure.
2995 *
2996 * Allocate RPIs for all active remote nodes. This is needed whenever
2997 * an SLI4 adapter is reset and the driver is not unloading. Its purpose
2998 * is to fixup the temporary rpi assignments.
2999 **/
3000void
3001lpfc_sli4_node_prep(struct lpfc_hba *phba)
3002{
3003 struct lpfc_nodelist *ndlp, *next_ndlp;
3004 struct lpfc_vport **vports;
9d3d340d
JS		 3005 int i, rpi;
3006 unsigned long flags;
6b5151fd
JS		 3007
3008 if (phba->sli_rev != LPFC_SLI_REV4)
3009 return;
3010
3011 vports = lpfc_create_vport_work_array(phba);
9d3d340d
JS		 3012 if (vports == NULL)
3013 return;
6b5151fd 3014
9d3d340d
JS		 3015 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3016 if (vports[i]->load_flag & FC_UNLOADING)
3017 continue;
3018
3019 list_for_each_entry_safe(ndlp, next_ndlp,
3020 &vports[i]->fc_nodes,
3021 nlp_listp) {
3022 if (!NLP_CHK_NODE_ACT(ndlp))
3023 continue;
3024 rpi = lpfc_sli4_alloc_rpi(phba);
3025 if (rpi == LPFC_RPI_ALLOC_ERROR) {
3026 spin_lock_irqsave(&phba->ndlp_lock, flags);
3027 NLP_CLR_NODE_ACT(ndlp);
3028 spin_unlock_irqrestore(&phba->ndlp_lock, flags);
3029 continue;
6b5151fd 3030 }
9d3d340d
JS		 3031 ndlp->nlp_rpi = rpi;
3032 lpfc_printf_vlog(ndlp->vport, KERN_INFO, LOG_NODE,
3033 "0009 rpi:%x DID:%x "
3034 "flg:%x map:%x %p\n", ndlp->nlp_rpi,
3035 ndlp->nlp_DID, ndlp->nlp_flag,
3036 ndlp->nlp_usg_map, ndlp);
6b5151fd
JS		 3037 }
3038 }
3039 lpfc_destroy_vport_work_array(phba, vports);
3040}
3041
e59058c4 3042/**
3621a710 3043 * lpfc_online - Initialize and bring a HBA online
e59058c4
JS		 3044 * @phba: pointer to lpfc hba data structure.
3045 *
3046 * This routine initializes the HBA and brings a HBA online. During this
3047 * process, the management interface is blocked to prevent user space access
3048 * to the HBA interfering with the driver initialization.
3049 *
3050 * Return codes
3051 * 0 - successful
3052 * 1 - failed
3053 **/
dea3101e 3054int
2e0fef85 3055lpfc_online(struct lpfc_hba *phba)
dea3101e 3056{
372bd282 3057 struct lpfc_vport *vport;
549e55cd 3058 struct lpfc_vport **vports;
a145fda3 3059 int i, error = 0;
16a3a208 3060 bool vpis_cleared = false;
2e0fef85 3061
dea3101e 3062 if (!phba)
3063 return 0;
372bd282 3064 vport = phba->pport;
dea3101e 3065
2e0fef85 3066 if (!(vport->fc_flag & FC_OFFLINE_MODE))
dea3101e 3067 return 0;
3068
ed957684 3069 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 3070 "0458 Bring Adapter online\n");
dea3101e 3071
618a5230 3072 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
46fa311e 3073
da0436e9
JS		 3074 if (phba->sli_rev == LPFC_SLI_REV4) {
3075 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */
3076 lpfc_unblock_mgmt_io(phba);
3077 return 1;
3078 }
16a3a208
JS		 3079 spin_lock_irq(&phba->hbalock);
3080 if (!phba->sli4_hba.max_cfg_param.vpi_used)
3081 vpis_cleared = true;
3082 spin_unlock_irq(&phba->hbalock);
a145fda3
DK		 3083
3084 /* Reestablish the local initiator port.
3085 * The offline process destroyed the previous lport.
3086 */
3087 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME &&
3088 !phba->nvmet_support) {
3089 error = lpfc_nvme_create_localport(phba->pport);
3090 if (error)
3091 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
3092 "6132 NVME restore reg failed "
3093 "on nvmei error x%x\n", error);
3094 }
da0436e9 3095 } else {
895427bd 3096 lpfc_sli_queue_init(phba);
da0436e9
JS		 3097 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */
3098 lpfc_unblock_mgmt_io(phba);
3099 return 1;
3100 }
46fa311e 3101 }
dea3101e 3102
549e55cd 3103 vports = lpfc_create_vport_work_array(phba);
aeb6641f 3104 if (vports != NULL) {
da0436e9 3105 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd
JS		 3106 struct Scsi_Host *shost;
3107 shost = lpfc_shost_from_vport(vports[i]);
3108 spin_lock_irq(shost->host_lock);
3109 vports[i]->fc_flag &= ~FC_OFFLINE_MODE;
3110 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)
3111 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
16a3a208 3112 if (phba->sli_rev == LPFC_SLI_REV4) {
1c6834a7 3113 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI;
16a3a208
JS		 3114 if ((vpis_cleared) &&
3115 (vports[i]->port_type !=
3116 LPFC_PHYSICAL_PORT))
3117 vports[i]->vpi = 0;
3118 }
549e55cd
JS		 3119 spin_unlock_irq(shost->host_lock);
3120 }
aeb6641f
AB		 3121 }
3122 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3123
46fa311e 3124 lpfc_unblock_mgmt_io(phba);
dea3101e 3125 return 0;
3126}
3127
e59058c4 3128/**
3621a710 3129 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked
e59058c4
JS		 3130 * @phba: pointer to lpfc hba data structure.
3131 *
3132 * This routine marks a HBA's management interface as not blocked. Once the
3133 * HBA's management interface is marked as not blocked, all the user space
3134 * access to the HBA, whether they are from sysfs interface or libdfc
3135 * interface will be allowed. The HBA is set to block the management interface
3136 * when the driver prepares the HBA interface for online or offline and then
3137 * set to unblock the management interface afterwards.
3138 **/
46fa311e
JS		 3139void
3140lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
3141{
3142 unsigned long iflag;
3143
2e0fef85
JS		 3144 spin_lock_irqsave(&phba->hbalock, iflag);
3145 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO;
3146 spin_unlock_irqrestore(&phba->hbalock, iflag);
46fa311e
JS		 3147}
3148
e59058c4 3149/**
3621a710 3150 * lpfc_offline_prep - Prepare a HBA to be brought offline
e59058c4
JS		 3151 * @phba: pointer to lpfc hba data structure.
3152 *
3153 * This routine is invoked to prepare a HBA to be brought offline. It performs
3154 * unregistration login to all the nodes on all vports and flushes the mailbox
3155 * queue to make it ready to be brought offline.
3156 **/
46fa311e 3157void
618a5230 3158lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action)
46fa311e 3159{
2e0fef85 3160 struct lpfc_vport *vport = phba->pport;
46fa311e 3161 struct lpfc_nodelist *ndlp, *next_ndlp;
87af33fe 3162 struct lpfc_vport **vports;
72100cc4 3163 struct Scsi_Host *shost;
87af33fe 3164 int i;
dea3101e 3165
2e0fef85 3166 if (vport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3167 return;
dea3101e 3168
618a5230 3169 lpfc_block_mgmt_io(phba, mbx_action);
dea3101e 3170
3171 lpfc_linkdown(phba);
3172
87af33fe
JS		 3173 /* Issue an unreg_login to all nodes on all vports */
3174 vports = lpfc_create_vport_work_array(phba);
3175 if (vports != NULL) {
da0436e9 3176 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
a8adb832
JS		 3177 if (vports[i]->load_flag & FC_UNLOADING)
3178 continue;
72100cc4
JS		 3179 shost = lpfc_shost_from_vport(vports[i]);
3180 spin_lock_irq(shost->host_lock);
c868595d 3181 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
695a814e
JS		 3182 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
3183 vports[i]->fc_flag &= ~FC_VFI_REGISTERED;
72100cc4 3184 spin_unlock_irq(shost->host_lock);
695a814e 3185
87af33fe
JS		 3186 shost = lpfc_shost_from_vport(vports[i]);
3187 list_for_each_entry_safe(ndlp, next_ndlp,
3188 &vports[i]->fc_nodes,
3189 nlp_listp) {
e47c9093
JS		 3190 if (!NLP_CHK_NODE_ACT(ndlp))
3191 continue;
87af33fe
JS		 3192 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE)
3193 continue;
3194 if (ndlp->nlp_type & NLP_FABRIC) {
3195 lpfc_disc_state_machine(vports[i], ndlp,
3196 NULL, NLP_EVT_DEVICE_RECOVERY);
3197 lpfc_disc_state_machine(vports[i], ndlp,
3198 NULL, NLP_EVT_DEVICE_RM);
3199 }
3200 spin_lock_irq(shost->host_lock);
3201 ndlp->nlp_flag &= ~NLP_NPR_ADISC;
401ee0c1 3202 spin_unlock_irq(shost->host_lock);
6b5151fd
JS		 3203 /*
3204 * Whenever an SLI4 port goes offline, free the
401ee0c1
JS		 3205 * RPI. Get a new RPI when the adapter port
3206 * comes back online.
6b5151fd 3207 */
be6bb941
JS		 3208 if (phba->sli_rev == LPFC_SLI_REV4) {
3209 lpfc_printf_vlog(ndlp->vport,
3210 KERN_INFO, LOG_NODE,
3211 "0011 lpfc_offline: "
3212 "ndlp:x%p did %x "
3213 "usgmap:x%x rpi:%x\n",
3214 ndlp, ndlp->nlp_DID,
3215 ndlp->nlp_usg_map,
3216 ndlp->nlp_rpi);
3217
6b5151fd 3218 lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi);
be6bb941 3219 }
87af33fe
JS		 3220 lpfc_unreg_rpi(vports[i], ndlp);
3221 }
3222 }
3223 }
09372820 3224 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3225
618a5230 3226 lpfc_sli_mbox_sys_shutdown(phba, mbx_action);
f485c18d
DK		 3227
3228 if (phba->wq)
3229 flush_workqueue(phba->wq);
46fa311e
JS		 3230}
3231
e59058c4 3232/**
3621a710 3233 * lpfc_offline - Bring a HBA offline
e59058c4
JS		 3234 * @phba: pointer to lpfc hba data structure.
3235 *
3236 * This routine actually brings a HBA offline. It stops all the timers
3237 * associated with the HBA, brings down the SLI layer, and eventually
3238 * marks the HBA as in offline state for the upper layer protocol.
3239 **/
46fa311e 3240void
2e0fef85 3241lpfc_offline(struct lpfc_hba *phba)
46fa311e 3242{
549e55cd
JS		 3243 struct Scsi_Host *shost;
3244 struct lpfc_vport **vports;
3245 int i;
46fa311e 3246
549e55cd 3247 if (phba->pport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3248 return;
688a8863 3249
da0436e9
JS		 3250 /* stop port and all timers associated with this hba */
3251 lpfc_stop_port(phba);
4b40d02b
DK		 3252
3253 /* Tear down the local and target port registrations. The
3254 * nvme transports need to cleanup.
3255 */
3256 lpfc_nvmet_destroy_targetport(phba);
3257 lpfc_nvme_destroy_localport(phba->pport);
3258
51ef4c26
JS		 3259 vports = lpfc_create_vport_work_array(phba);
3260 if (vports != NULL)
da0436e9 3261 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
51ef4c26 3262 lpfc_stop_vport_timers(vports[i]);
09372820 3263 lpfc_destroy_vport_work_array(phba, vports);
92d7f7b0 3264 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 3265 "0460 Bring Adapter offline\n");
dea3101e 3266 /* Bring down the SLI Layer and cleanup. The HBA is offline
3267 now. */
3268 lpfc_sli_hba_down(phba);
92d7f7b0 3269 spin_lock_irq(&phba->hbalock);
7054a606 3270 phba->work_ha = 0;
92d7f7b0 3271 spin_unlock_irq(&phba->hbalock);
549e55cd
JS		 3272 vports = lpfc_create_vport_work_array(phba);
3273 if (vports != NULL)
da0436e9 3274 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd 3275 shost = lpfc_shost_from_vport(vports[i]);
549e55cd
JS		 3276 spin_lock_irq(shost->host_lock);
3277 vports[i]->work_port_events = 0;
3278 vports[i]->fc_flag |= FC_OFFLINE_MODE;
3279 spin_unlock_irq(shost->host_lock);
3280 }
09372820 3281 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3282}
3283
e59058c4 3284/**
3621a710 3285 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists
e59058c4
JS		 3286 * @phba: pointer to lpfc hba data structure.
3287 *
3288 * This routine is to free all the SCSI buffers and IOCBs from the driver
3289 * list back to kernel. It is called from lpfc_pci_remove_one to free
3290 * the internal resources before the device is removed from the system.
e59058c4 3291 **/
8a9d2e80 3292static void
2e0fef85 3293lpfc_scsi_free(struct lpfc_hba *phba)
dea3101e 3294{
3295 struct lpfc_scsi_buf *sb, *sb_next;
dea3101e 3296
895427bd
JS		 3297 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3298 return;
3299
2e0fef85 3300 spin_lock_irq(&phba->hbalock);
a40fc5f0 3301
dea3101e 3302 /* Release all the lpfc_scsi_bufs maintained by this host. */
a40fc5f0
JS		 3303
3304 spin_lock(&phba->scsi_buf_list_put_lock);
3305 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put,
3306 list) {
dea3101e 3307 list_del(&sb->list);
771db5c0 3308 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3309 sb->dma_handle);
dea3101e 3310 kfree(sb);
3311 phba->total_scsi_bufs--;
3312 }
a40fc5f0
JS		 3313 spin_unlock(&phba->scsi_buf_list_put_lock);
3314
3315 spin_lock(&phba->scsi_buf_list_get_lock);
3316 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get,
3317 list) {
dea3101e 3318 list_del(&sb->list);
771db5c0 3319 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3320 sb->dma_handle);
dea3101e 3321 kfree(sb);
3322 phba->total_scsi_bufs--;
3323 }
a40fc5f0 3324 spin_unlock(&phba->scsi_buf_list_get_lock);
2e0fef85 3325 spin_unlock_irq(&phba->hbalock);
8a9d2e80 3326}
895427bd
JS		 3327/**
3328 * lpfc_nvme_free - Free all the NVME buffers and IOCBs from driver lists
3329 * @phba: pointer to lpfc hba data structure.
3330 *
3331 * This routine is to free all the NVME buffers and IOCBs from the driver
3332 * list back to kernel. It is called from lpfc_pci_remove_one to free
3333 * the internal resources before the device is removed from the system.
3334 **/
3335static void
3336lpfc_nvme_free(struct lpfc_hba *phba)
3337{
3338 struct lpfc_nvme_buf *lpfc_ncmd, *lpfc_ncmd_next;
895427bd
JS		 3339
3340 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3341 return;
3342
3343 spin_lock_irq(&phba->hbalock);
3344
3345 /* Release all the lpfc_nvme_bufs maintained by this host. */
3346 spin_lock(&phba->nvme_buf_list_put_lock);
3347 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3348 &phba->lpfc_nvme_buf_list_put, list) {
3349 list_del(&lpfc_ncmd->list);
cf1a1d3e 3350 phba->put_nvme_bufs--;
771db5c0 3351 dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
895427bd
JS		 3352 lpfc_ncmd->dma_handle);
3353 kfree(lpfc_ncmd);
3354 phba->total_nvme_bufs--;
3355 }
3356 spin_unlock(&phba->nvme_buf_list_put_lock);
3357
3358 spin_lock(&phba->nvme_buf_list_get_lock);
3359 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3360 &phba->lpfc_nvme_buf_list_get, list) {
3361 list_del(&lpfc_ncmd->list);
cf1a1d3e 3362 phba->get_nvme_bufs--;
771db5c0 3363 dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
895427bd
JS		 3364 lpfc_ncmd->dma_handle);
3365 kfree(lpfc_ncmd);
3366 phba->total_nvme_bufs--;
3367 }
3368 spin_unlock(&phba->nvme_buf_list_get_lock);
895427bd
JS		 3369 spin_unlock_irq(&phba->hbalock);
3370}
8a9d2e80 3371/**
895427bd 3372 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping
8a9d2e80
JS		 3373 * @phba: pointer to lpfc hba data structure.
3374 *
3375 * This routine first calculates the sizes of the current els and allocated
3376 * scsi sgl lists, and then goes through all sgls to updates the physical
3377 * XRIs assigned due to port function reset. During port initialization, the
3378 * current els and allocated scsi sgl lists are 0s.
3379 *
3380 * Return codes
3381 * 0 - successful (for now, it always returns 0)
3382 **/
3383int
895427bd 3384lpfc_sli4_els_sgl_update(struct lpfc_hba *phba)
8a9d2e80
JS		 3385{
3386 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
895427bd 3387 uint16_t i, lxri, xri_cnt, els_xri_cnt;
8a9d2e80 3388 LIST_HEAD(els_sgl_list);
8a9d2e80
JS		 3389 int rc;
3390
3391 /*
3392 * update on pci function's els xri-sgl list
3393 */
3394 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
895427bd 3395
8a9d2e80
JS		 3396 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
3397 /* els xri-sgl expanded */
3398 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
3399 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3400 "3157 ELS xri-sgl count increased from "
3401 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3402 els_xri_cnt);
3403 /* allocate the additional els sgls */
3404 for (i = 0; i < xri_cnt; i++) {
3405 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3406 GFP_KERNEL);
3407 if (sglq_entry == NULL) {
3408 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3409 "2562 Failure to allocate an "
3410 "ELS sgl entry:%d\n", i);
3411 rc = -ENOMEM;
3412 goto out_free_mem;
3413 }
3414 sglq_entry->buff_type = GEN_BUFF_TYPE;
3415 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0,
3416 &sglq_entry->phys);
3417 if (sglq_entry->virt == NULL) {
3418 kfree(sglq_entry);
3419 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3420 "2563 Failure to allocate an "
3421 "ELS mbuf:%d\n", i);
3422 rc = -ENOMEM;
3423 goto out_free_mem;
3424 }
3425 sglq_entry->sgl = sglq_entry->virt;
3426 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE);
3427 sglq_entry->state = SGL_FREED;
3428 list_add_tail(&sglq_entry->list, &els_sgl_list);
3429 }
38c20673 3430 spin_lock_irq(&phba->hbalock);
895427bd
JS		 3431 spin_lock(&phba->sli4_hba.sgl_list_lock);
3432 list_splice_init(&els_sgl_list,
3433 &phba->sli4_hba.lpfc_els_sgl_list);
3434 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 3435 spin_unlock_irq(&phba->hbalock);
8a9d2e80
JS		 3436 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
3437 /* els xri-sgl shrinked */
3438 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
3439 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3440 "3158 ELS xri-sgl count decreased from "
3441 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3442 els_xri_cnt);
3443 spin_lock_irq(&phba->hbalock);
895427bd
JS		 3444 spin_lock(&phba->sli4_hba.sgl_list_lock);
3445 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list,
3446 &els_sgl_list);
8a9d2e80
JS		 3447 /* release extra els sgls from list */
3448 for (i = 0; i < xri_cnt; i++) {
3449 list_remove_head(&els_sgl_list,
3450 sglq_entry, struct lpfc_sglq, list);
3451 if (sglq_entry) {
895427bd
JS		 3452 __lpfc_mbuf_free(phba, sglq_entry->virt,
3453 sglq_entry->phys);
8a9d2e80
JS		 3454 kfree(sglq_entry);
3455 }
3456 }
895427bd
JS		 3457 list_splice_init(&els_sgl_list,
3458 &phba->sli4_hba.lpfc_els_sgl_list);
3459 spin_unlock(&phba->sli4_hba.sgl_list_lock);
8a9d2e80
JS		 3460 spin_unlock_irq(&phba->hbalock);
3461 } else
3462 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3463 "3163 ELS xri-sgl count unchanged: %d\n",
3464 els_xri_cnt);
3465 phba->sli4_hba.els_xri_cnt = els_xri_cnt;
3466
3467 /* update xris to els sgls on the list */
3468 sglq_entry = NULL;
3469 sglq_entry_next = NULL;
3470 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
895427bd 3471 &phba->sli4_hba.lpfc_els_sgl_list, list) {
8a9d2e80
JS		 3472 lxri = lpfc_sli4_next_xritag(phba);
3473 if (lxri == NO_XRI) {
3474 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3475 "2400 Failed to allocate xri for "
3476 "ELS sgl\n");
3477 rc = -ENOMEM;
3478 goto out_free_mem;
3479 }
3480 sglq_entry->sli4_lxritag = lxri;
3481 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3482 }
895427bd
JS		 3483 return 0;
3484
3485out_free_mem:
3486 lpfc_free_els_sgl_list(phba);
3487 return rc;
3488}
3489
f358dd0c
JS		 3490/**
3491 * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping
3492 * @phba: pointer to lpfc hba data structure.
3493 *
3494 * This routine first calculates the sizes of the current els and allocated
3495 * scsi sgl lists, and then goes through all sgls to updates the physical
3496 * XRIs assigned due to port function reset. During port initialization, the
3497 * current els and allocated scsi sgl lists are 0s.
3498 *
3499 * Return codes
3500 * 0 - successful (for now, it always returns 0)
3501 **/
3502int
3503lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba)
3504{
3505 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
3506 uint16_t i, lxri, xri_cnt, els_xri_cnt;
6c621a22 3507 uint16_t nvmet_xri_cnt;
f358dd0c
JS		 3508 LIST_HEAD(nvmet_sgl_list);
3509 int rc;
3510
3511 /*
3512 * update on pci function's nvmet xri-sgl list
3513 */
3514 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
61f3d4bf 3515
6c621a22
JS		 3516 /* For NVMET, ALL remaining XRIs are dedicated for IO processing */
3517 nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
f358dd0c
JS		 3518 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) {
3519 /* els xri-sgl expanded */
3520 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt;
3521 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3522 "6302 NVMET xri-sgl cnt grew from %d to %d\n",
3523 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt);
3524 /* allocate the additional nvmet sgls */
3525 for (i = 0; i < xri_cnt; i++) {
3526 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3527 GFP_KERNEL);
3528 if (sglq_entry == NULL) {
3529 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3530 "6303 Failure to allocate an "
3531 "NVMET sgl entry:%d\n", i);
3532 rc = -ENOMEM;
3533 goto out_free_mem;
3534 }
3535 sglq_entry->buff_type = NVMET_BUFF_TYPE;
3536 sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0,
3537 &sglq_entry->phys);
3538 if (sglq_entry->virt == NULL) {
3539 kfree(sglq_entry);
3540 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3541 "6304 Failure to allocate an "
3542 "NVMET buf:%d\n", i);
3543 rc = -ENOMEM;
3544 goto out_free_mem;
3545 }
3546 sglq_entry->sgl = sglq_entry->virt;
3547 memset(sglq_entry->sgl, 0,
3548 phba->cfg_sg_dma_buf_size);
3549 sglq_entry->state = SGL_FREED;
3550 list_add_tail(&sglq_entry->list, &nvmet_sgl_list);
3551 }
3552 spin_lock_irq(&phba->hbalock);
3553 spin_lock(&phba->sli4_hba.sgl_list_lock);
3554 list_splice_init(&nvmet_sgl_list,
3555 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3556 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3557 spin_unlock_irq(&phba->hbalock);
3558 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) {
3559 /* nvmet xri-sgl shrunk */
3560 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt;
3561 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3562 "6305 NVMET xri-sgl count decreased from "
3563 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt,
3564 nvmet_xri_cnt);
3565 spin_lock_irq(&phba->hbalock);
3566 spin_lock(&phba->sli4_hba.sgl_list_lock);
3567 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list,
3568 &nvmet_sgl_list);
3569 /* release extra nvmet sgls from list */
3570 for (i = 0; i < xri_cnt; i++) {
3571 list_remove_head(&nvmet_sgl_list,
3572 sglq_entry, struct lpfc_sglq, list);
3573 if (sglq_entry) {
3574 lpfc_nvmet_buf_free(phba, sglq_entry->virt,
3575 sglq_entry->phys);
3576 kfree(sglq_entry);
3577 }
3578 }
3579 list_splice_init(&nvmet_sgl_list,
3580 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3581 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3582 spin_unlock_irq(&phba->hbalock);
3583 } else
3584 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3585 "6306 NVMET xri-sgl count unchanged: %d\n",
3586 nvmet_xri_cnt);
3587 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt;
3588
3589 /* update xris to nvmet sgls on the list */
3590 sglq_entry = NULL;
3591 sglq_entry_next = NULL;
3592 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
3593 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) {
3594 lxri = lpfc_sli4_next_xritag(phba);
3595 if (lxri == NO_XRI) {
3596 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3597 "6307 Failed to allocate xri for "
3598 "NVMET sgl\n");
3599 rc = -ENOMEM;
3600 goto out_free_mem;
3601 }
3602 sglq_entry->sli4_lxritag = lxri;
3603 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3604 }
3605 return 0;
3606
3607out_free_mem:
3608 lpfc_free_nvmet_sgl_list(phba);
3609 return rc;
3610}
3611
895427bd
JS		 3612/**
3613 * lpfc_sli4_scsi_sgl_update - update xri-sgl sizing and mapping
3614 * @phba: pointer to lpfc hba data structure.
3615 *
3616 * This routine first calculates the sizes of the current els and allocated
3617 * scsi sgl lists, and then goes through all sgls to updates the physical
3618 * XRIs assigned due to port function reset. During port initialization, the
3619 * current els and allocated scsi sgl lists are 0s.
3620 *
3621 * Return codes
3622 * 0 - successful (for now, it always returns 0)
3623 **/
3624int
3625lpfc_sli4_scsi_sgl_update(struct lpfc_hba *phba)
3626{
3627 struct lpfc_scsi_buf *psb, *psb_next;
3628 uint16_t i, lxri, els_xri_cnt, scsi_xri_cnt;
3629 LIST_HEAD(scsi_sgl_list);
3630 int rc;
8a9d2e80
JS		 3631
3632 /*
895427bd 3633 * update on pci function's els xri-sgl list
8a9d2e80 3634 */
895427bd 3635 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
8a9d2e80
JS		 3636 phba->total_scsi_bufs = 0;
3637
895427bd
JS		 3638 /*
3639 * update on pci function's allocated scsi xri-sgl list
3640 */
8a9d2e80
JS		 3641 /* maximum number of xris available for scsi buffers */
3642 phba->sli4_hba.scsi_xri_max = phba->sli4_hba.max_cfg_param.max_xri -
3643 els_xri_cnt;
3644
895427bd
JS		 3645 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3646 return 0;
3647
3648 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3649 phba->sli4_hba.scsi_xri_max = /* Split them up */
3650 (phba->sli4_hba.scsi_xri_max *
3651 phba->cfg_xri_split) / 100;
8a9d2e80 3652
a40fc5f0 3653 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3654 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS		 3655 list_splice_init(&phba->lpfc_scsi_buf_list_get, &scsi_sgl_list);
3656 list_splice(&phba->lpfc_scsi_buf_list_put, &scsi_sgl_list);
164cecd1 3657 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3658 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80 3659
e8c0a779
JS		 3660 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3661 "6060 Current allocated SCSI xri-sgl count:%d, "
3662 "maximum SCSI xri count:%d (split:%d)\n",
3663 phba->sli4_hba.scsi_xri_cnt,
3664 phba->sli4_hba.scsi_xri_max, phba->cfg_xri_split);
3665
8a9d2e80
JS		 3666 if (phba->sli4_hba.scsi_xri_cnt > phba->sli4_hba.scsi_xri_max) {
3667 /* max scsi xri shrinked below the allocated scsi buffers */
3668 scsi_xri_cnt = phba->sli4_hba.scsi_xri_cnt -
3669 phba->sli4_hba.scsi_xri_max;
3670 /* release the extra allocated scsi buffers */
3671 for (i = 0; i < scsi_xri_cnt; i++) {
3672 list_remove_head(&scsi_sgl_list, psb,
3673 struct lpfc_scsi_buf, list);
a2fc4aef 3674 if (psb) {
771db5c0 3675 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
a2fc4aef
JS		 3676 psb->data, psb->dma_handle);
3677 kfree(psb);
3678 }
8a9d2e80 3679 }
a40fc5f0 3680 spin_lock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80 3681 phba->sli4_hba.scsi_xri_cnt -= scsi_xri_cnt;
a40fc5f0 3682 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80
JS		 3683 }
3684
3685 /* update xris associated to remaining allocated scsi buffers */
3686 psb = NULL;
3687 psb_next = NULL;
3688 list_for_each_entry_safe(psb, psb_next, &scsi_sgl_list, list) {
3689 lxri = lpfc_sli4_next_xritag(phba);
3690 if (lxri == NO_XRI) {
3691 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3692 "2560 Failed to allocate xri for "
3693 "scsi buffer\n");
3694 rc = -ENOMEM;
3695 goto out_free_mem;
3696 }
3697 psb->cur_iocbq.sli4_lxritag = lxri;
3698 psb->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3699 }
a40fc5f0 3700 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3701 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS		 3702 list_splice_init(&scsi_sgl_list, &phba->lpfc_scsi_buf_list_get);
3703 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
164cecd1 3704 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3705 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
dea3101e 3706 return 0;
8a9d2e80
JS		 3707
3708out_free_mem:
8a9d2e80
JS		 3709 lpfc_scsi_free(phba);
3710 return rc;
dea3101e 3711}
3712
96418b5e
JS		 3713static uint64_t
3714lpfc_get_wwpn(struct lpfc_hba *phba)
3715{
3716 uint64_t wwn;
3717 int rc;
3718 LPFC_MBOXQ_t *mboxq;
3719 MAILBOX_t *mb;
3720
96418b5e
JS		 3721 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
3722 GFP_KERNEL);
3723 if (!mboxq)
3724 return (uint64_t)-1;
3725
3726 /* First get WWN of HBA instance */
3727 lpfc_read_nv(phba, mboxq);
3728 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
3729 if (rc != MBX_SUCCESS) {
3730 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3731 "6019 Mailbox failed , mbxCmd x%x "
3732 "READ_NV, mbxStatus x%x\n",
3733 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
3734 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
3735 mempool_free(mboxq, phba->mbox_mem_pool);
3736 return (uint64_t) -1;
3737 }
3738 mb = &mboxq->u.mb;
3739 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t));
3740 /* wwn is WWPN of HBA instance */
3741 mempool_free(mboxq, phba->mbox_mem_pool);
3742 if (phba->sli_rev == LPFC_SLI_REV4)
3743 return be64_to_cpu(wwn);
3744 else
286871a6 3745 return rol64(wwn, 32);
96418b5e
JS		 3746}
3747
895427bd
JS		 3748/**
3749 * lpfc_sli4_nvme_sgl_update - update xri-sgl sizing and mapping
3750 * @phba: pointer to lpfc hba data structure.
3751 *
3752 * This routine first calculates the sizes of the current els and allocated
3753 * scsi sgl lists, and then goes through all sgls to updates the physical
3754 * XRIs assigned due to port function reset. During port initialization, the
3755 * current els and allocated scsi sgl lists are 0s.
3756 *
3757 * Return codes
3758 * 0 - successful (for now, it always returns 0)
3759 **/
3760int
3761lpfc_sli4_nvme_sgl_update(struct lpfc_hba *phba)
3762{
3763 struct lpfc_nvme_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL;
3764 uint16_t i, lxri, els_xri_cnt;
3765 uint16_t nvme_xri_cnt, nvme_xri_max;
3766 LIST_HEAD(nvme_sgl_list);
cf1a1d3e 3767 int rc, cnt;
895427bd
JS		 3768
3769 phba->total_nvme_bufs = 0;
cf1a1d3e
JS		 3770 phba->get_nvme_bufs = 0;
3771 phba->put_nvme_bufs = 0;
895427bd
JS		 3772
3773 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3774 return 0;
3775 /*
3776 * update on pci function's allocated nvme xri-sgl list
3777 */
3778
3779 /* maximum number of xris available for nvme buffers */
3780 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
3781 nvme_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
3782 phba->sli4_hba.nvme_xri_max = nvme_xri_max;
3783 phba->sli4_hba.nvme_xri_max -= phba->sli4_hba.scsi_xri_max;
3784
3785 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3786 "6074 Current allocated NVME xri-sgl count:%d, "
3787 "maximum NVME xri count:%d\n",
3788 phba->sli4_hba.nvme_xri_cnt,
3789 phba->sli4_hba.nvme_xri_max);
3790
3791 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3792 spin_lock(&phba->nvme_buf_list_put_lock);
3793 list_splice_init(&phba->lpfc_nvme_buf_list_get, &nvme_sgl_list);
3794 list_splice(&phba->lpfc_nvme_buf_list_put, &nvme_sgl_list);
cf1a1d3e
JS		 3795 cnt = phba->get_nvme_bufs + phba->put_nvme_bufs;
3796 phba->get_nvme_bufs = 0;
3797 phba->put_nvme_bufs = 0;
895427bd
JS		 3798 spin_unlock(&phba->nvme_buf_list_put_lock);
3799 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3800
3801 if (phba->sli4_hba.nvme_xri_cnt > phba->sli4_hba.nvme_xri_max) {
3802 /* max nvme xri shrunk below the allocated nvme buffers */
3803 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3804 nvme_xri_cnt = phba->sli4_hba.nvme_xri_cnt -
3805 phba->sli4_hba.nvme_xri_max;
3806 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3807 /* release the extra allocated nvme buffers */
3808 for (i = 0; i < nvme_xri_cnt; i++) {
3809 list_remove_head(&nvme_sgl_list, lpfc_ncmd,
3810 struct lpfc_nvme_buf, list);
3811 if (lpfc_ncmd) {
771db5c0 3812 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
895427bd
JS		 3813 lpfc_ncmd->data,
3814 lpfc_ncmd->dma_handle);
3815 kfree(lpfc_ncmd);
3816 }
3817 }
3818 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3819 phba->sli4_hba.nvme_xri_cnt -= nvme_xri_cnt;
3820 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3821 }
3822
3823 /* update xris associated to remaining allocated nvme buffers */
3824 lpfc_ncmd = NULL;
3825 lpfc_ncmd_next = NULL;
3826 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3827 &nvme_sgl_list, list) {
3828 lxri = lpfc_sli4_next_xritag(phba);
3829 if (lxri == NO_XRI) {
3830 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3831 "6075 Failed to allocate xri for "
3832 "nvme buffer\n");
3833 rc = -ENOMEM;
3834 goto out_free_mem;
3835 }
3836 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri;
3837 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3838 }
3839 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3840 spin_lock(&phba->nvme_buf_list_put_lock);
3841 list_splice_init(&nvme_sgl_list, &phba->lpfc_nvme_buf_list_get);
cf1a1d3e 3842 phba->get_nvme_bufs = cnt;
895427bd
JS		 3843 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
3844 spin_unlock(&phba->nvme_buf_list_put_lock);
3845 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3846 return 0;
3847
3848out_free_mem:
3849 lpfc_nvme_free(phba);
3850 return rc;
3851}
3852
e59058c4 3853/**
3621a710 3854 * lpfc_create_port - Create an FC port
e59058c4
JS		 3855 * @phba: pointer to lpfc hba data structure.
3856 * @instance: a unique integer ID to this FC port.
3857 * @dev: pointer to the device data structure.
3858 *
3859 * This routine creates a FC port for the upper layer protocol. The FC port
3860 * can be created on top of either a physical port or a virtual port provided
3861 * by the HBA. This routine also allocates a SCSI host data structure (shost)
3862 * and associates the FC port created before adding the shost into the SCSI
3863 * layer.
3864 *
3865 * Return codes
3866 * @vport - pointer to the virtual N_Port data structure.
3867 * NULL - port create failed.
3868 **/
2e0fef85 3869struct lpfc_vport *
3de2a653 3870lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
47a8617c 3871{
2e0fef85 3872 struct lpfc_vport *vport;
895427bd 3873 struct Scsi_Host *shost = NULL;
2e0fef85 3874 int error = 0;
96418b5e
JS		 3875 int i;
3876 uint64_t wwn;
3877 bool use_no_reset_hba = false;
56bc8028 3878 int rc;
96418b5e 3879
56bc8028
JS		 3880 if (lpfc_no_hba_reset_cnt) {
3881 if (phba->sli_rev < LPFC_SLI_REV4 &&
3882 dev == &phba->pcidev->dev) {
3883 /* Reset the port first */
3884 lpfc_sli_brdrestart(phba);
3885 rc = lpfc_sli_chipset_init(phba);
3886 if (rc)
3887 return NULL;
3888 }
3889 wwn = lpfc_get_wwpn(phba);
3890 }
96418b5e
JS		 3891
3892 for (i = 0; i < lpfc_no_hba_reset_cnt; i++) {
3893 if (wwn == lpfc_no_hba_reset[i]) {
3894 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3895 "6020 Setting use_no_reset port=%llx\n",
3896 wwn);
3897 use_no_reset_hba = true;
3898 break;
3899 }
3900 }
47a8617c 3901
895427bd
JS		 3902 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
3903 if (dev != &phba->pcidev->dev) {
3904 shost = scsi_host_alloc(&lpfc_vport_template,
3905 sizeof(struct lpfc_vport));
3906 } else {
96418b5e 3907 if (!use_no_reset_hba)
895427bd
JS		 3908 shost = scsi_host_alloc(&lpfc_template,
3909 sizeof(struct lpfc_vport));
3910 else
96418b5e 3911 shost = scsi_host_alloc(&lpfc_template_no_hr,
895427bd
JS		 3912 sizeof(struct lpfc_vport));
3913 }
3914 } else if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
3915 shost = scsi_host_alloc(&lpfc_template_nvme,
ea4142f6
JS		 3916 sizeof(struct lpfc_vport));
3917 }
2e0fef85
JS		 3918 if (!shost)
3919 goto out;
47a8617c 3920
2e0fef85
JS		 3921 vport = (struct lpfc_vport *) shost->hostdata;
3922 vport->phba = phba;
2e0fef85 3923 vport->load_flag |= FC_LOADING;
92d7f7b0 3924 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
7f5f3d0d 3925 vport->fc_rscn_flush = 0;
3de2a653 3926 lpfc_get_vport_cfgparam(vport);
895427bd 3927
2e0fef85
JS		 3928 shost->unique_id = instance;
3929 shost->max_id = LPFC_MAX_TARGET;
3de2a653 3930 shost->max_lun = vport->cfg_max_luns;
2e0fef85
JS		 3931 shost->this_id = -1;
3932 shost->max_cmd_len = 16;
8b0dff14 3933 shost->nr_hw_queues = phba->cfg_fcp_io_channel;
da0436e9 3934 if (phba->sli_rev == LPFC_SLI_REV4) {
28baac74 3935 shost->dma_boundary =
cb5172ea 3936 phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
da0436e9
JS		 3937 shost->sg_tablesize = phba->cfg_sg_seg_cnt;
3938 }
81301a9b 3939
47a8617c 3940 /*
2e0fef85
JS		 3941 * Set initial can_queue value since 0 is no longer supported and
3942 * scsi_add_host will fail. This will be adjusted later based on the
3943 * max xri value determined in hba setup.
47a8617c 3944 */
2e0fef85 3945 shost->can_queue = phba->cfg_hba_queue_depth - 10;
3de2a653 3946 if (dev != &phba->pcidev->dev) {
92d7f7b0
JS		 3947 shost->transportt = lpfc_vport_transport_template;
3948 vport->port_type = LPFC_NPIV_PORT;
3949 } else {
3950 shost->transportt = lpfc_transport_template;
3951 vport->port_type = LPFC_PHYSICAL_PORT;
3952 }
47a8617c 3953
2e0fef85
JS		 3954 /* Initialize all internally managed lists. */
3955 INIT_LIST_HEAD(&vport->fc_nodes);
da0436e9 3956 INIT_LIST_HEAD(&vport->rcv_buffer_list);
2e0fef85 3957 spin_lock_init(&vport->work_port_lock);
47a8617c 3958
f22eb4d3 3959 timer_setup(&vport->fc_disctmo, lpfc_disc_timeout, 0);
47a8617c 3960
f22eb4d3 3961 timer_setup(&vport->els_tmofunc, lpfc_els_timeout, 0);
92494144 3962
f22eb4d3 3963 timer_setup(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo, 0);
92494144 3964
d139b9bd 3965 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev);
2e0fef85
JS		 3966 if (error)
3967 goto out_put_shost;
47a8617c 3968
549e55cd 3969 spin_lock_irq(&phba->hbalock);
2e0fef85 3970 list_add_tail(&vport->listentry, &phba->port_list);
549e55cd 3971 spin_unlock_irq(&phba->hbalock);
2e0fef85 3972 return vport;
47a8617c 3973
2e0fef85
JS		 3974out_put_shost:
3975 scsi_host_put(shost);
3976out:
3977 return NULL;
47a8617c
JS		 3978}
3979
e59058c4 3980/**
3621a710 3981 * destroy_port - destroy an FC port
e59058c4
JS		 3982 * @vport: pointer to an lpfc virtual N_Port data structure.
3983 *
3984 * This routine destroys a FC port from the upper layer protocol. All the
3985 * resources associated with the port are released.
3986 **/
2e0fef85
JS		 3987void
3988destroy_port(struct lpfc_vport *vport)
47a8617c 3989{
92d7f7b0
JS		 3990 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
3991 struct lpfc_hba *phba = vport->phba;
47a8617c 3992
858c9f6c 3993 lpfc_debugfs_terminate(vport);
92d7f7b0
JS		 3994 fc_remove_host(shost);
3995 scsi_remove_host(shost);
47a8617c 3996
92d7f7b0
JS		 3997 spin_lock_irq(&phba->hbalock);
3998 list_del_init(&vport->listentry);
3999 spin_unlock_irq(&phba->hbalock);
47a8617c 4000
92d7f7b0 4001 lpfc_cleanup(vport);
47a8617c 4002 return;
47a8617c
JS		 4003}
4004
e59058c4 4005/**
3621a710 4006 * lpfc_get_instance - Get a unique integer ID
e59058c4
JS		 4007 *
4008 * This routine allocates a unique integer ID from lpfc_hba_index pool. It
4009 * uses the kernel idr facility to perform the task.
4010 *
4011 * Return codes:
4012 * instance - a unique integer ID allocated as the new instance.
4013 * -1 - lpfc get instance failed.
4014 **/
92d7f7b0
JS		 4015int
4016lpfc_get_instance(void)
4017{
ab516036
TH		 4018 int ret;
4019
4020 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL);
4021 return ret < 0 ? -1 : ret;
47a8617c
JS		 4022}
4023
e59058c4 4024/**
3621a710 4025 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done
e59058c4
JS		 4026 * @shost: pointer to SCSI host data structure.
4027 * @time: elapsed time of the scan in jiffies.
4028 *
4029 * This routine is called by the SCSI layer with a SCSI host to determine
4030 * whether the scan host is finished.
4031 *
4032 * Note: there is no scan_start function as adapter initialization will have
4033 * asynchronously kicked off the link initialization.
4034 *
4035 * Return codes
4036 * 0 - SCSI host scan is not over yet.
4037 * 1 - SCSI host scan is over.
4038 **/
47a8617c
JS		 4039int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time)
4040{
2e0fef85
JS		 4041 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4042 struct lpfc_hba *phba = vport->phba;
858c9f6c 4043 int stat = 0;
47a8617c 4044
858c9f6c
JS		 4045 spin_lock_irq(shost->host_lock);
4046
51ef4c26 4047 if (vport->load_flag & FC_UNLOADING) {
858c9f6c
JS		 4048 stat = 1;
4049 goto finished;
4050 }
256ec0d0 4051 if (time >= msecs_to_jiffies(30 * 1000)) {
2e0fef85 4052 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS		 4053 "0461 Scanning longer than 30 "
4054 "seconds. Continuing initialization\n");
858c9f6c 4055 stat = 1;
47a8617c 4056 goto finished;
2e0fef85 4057 }
256ec0d0
JS		 4058 if (time >= msecs_to_jiffies(15 * 1000) &&
4059 phba->link_state <= LPFC_LINK_DOWN) {
2e0fef85 4060 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS		 4061 "0465 Link down longer than 15 "
4062 "seconds. Continuing initialization\n");
858c9f6c 4063 stat = 1;
47a8617c 4064 goto finished;
2e0fef85 4065 }
47a8617c 4066
2e0fef85 4067 if (vport->port_state != LPFC_VPORT_READY)
858c9f6c 4068 goto finished;
2e0fef85 4069 if (vport->num_disc_nodes || vport->fc_prli_sent)
858c9f6c 4070 goto finished;
256ec0d0 4071 if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000))
858c9f6c 4072 goto finished;
2e0fef85 4073 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0)
858c9f6c
JS		 4074 goto finished;
4075
4076 stat = 1;
47a8617c
JS		 4077
4078finished:
858c9f6c
JS		 4079 spin_unlock_irq(shost->host_lock);
4080 return stat;
92d7f7b0 4081}
47a8617c 4082
e59058c4 4083/**
3621a710 4084 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port
e59058c4
JS		 4085 * @shost: pointer to SCSI host data structure.
4086 *
4087 * This routine initializes a given SCSI host attributes on a FC port. The
4088 * SCSI host can be either on top of a physical port or a virtual port.
4089 **/
92d7f7b0
JS		 4090void lpfc_host_attrib_init(struct Scsi_Host *shost)
4091{
4092 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4093 struct lpfc_hba *phba = vport->phba;
47a8617c 4094 /*
2e0fef85 4095 * Set fixed host attributes. Must done after lpfc_sli_hba_setup().
47a8617c
JS		 4096 */
4097
2e0fef85
JS		 4098 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
4099 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
47a8617c
JS		 4100 fc_host_supported_classes(shost) = FC_COS_CLASS3;
4101
4102 memset(fc_host_supported_fc4s(shost), 0,
2e0fef85 4103 sizeof(fc_host_supported_fc4s(shost)));
47a8617c
JS		 4104 fc_host_supported_fc4s(shost)[2] = 1;
4105 fc_host_supported_fc4s(shost)[7] = 1;
4106
92d7f7b0
JS		 4107 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost),
4108 sizeof fc_host_symbolic_name(shost));
47a8617c
JS		 4109
4110 fc_host_supported_speeds(shost) = 0;
d38dd52c
JS		 4111 if (phba->lmt & LMT_32Gb)
4112 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT;
88a2cfbb
JS		 4113 if (phba->lmt & LMT_16Gb)
4114 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT;
47a8617c
JS		 4115 if (phba->lmt & LMT_10Gb)
4116 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT;
a8adb832
JS		 4117 if (phba->lmt & LMT_8Gb)
4118 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT;
47a8617c
JS		 4119 if (phba->lmt & LMT_4Gb)
4120 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT;
4121 if (phba->lmt & LMT_2Gb)
4122 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT;
4123 if (phba->lmt & LMT_1Gb)
4124 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT;
4125
4126 fc_host_maxframe_size(shost) =
2e0fef85
JS		 4127 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
4128 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb;
47a8617c 4129
0af5d708
MC		 4130 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo;
4131
47a8617c
JS		 4132 /* This value is also unchanging */
4133 memset(fc_host_active_fc4s(shost), 0,
2e0fef85 4134 sizeof(fc_host_active_fc4s(shost)));
47a8617c
JS		 4135 fc_host_active_fc4s(shost)[2] = 1;
4136 fc_host_active_fc4s(shost)[7] = 1;
4137
92d7f7b0 4138 fc_host_max_npiv_vports(shost) = phba->max_vpi;
47a8617c 4139 spin_lock_irq(shost->host_lock);
51ef4c26 4140 vport->load_flag &= ~FC_LOADING;
47a8617c 4141 spin_unlock_irq(shost->host_lock);
47a8617c 4142}
dea3101e 4143
e59058c4 4144/**
da0436e9 4145 * lpfc_stop_port_s3 - Stop SLI3 device port
e59058c4
JS		 4146 * @phba: pointer to lpfc hba data structure.
4147 *
da0436e9
JS		 4148 * This routine is invoked to stop an SLI3 device port, it stops the device
4149 * from generating interrupts and stops the device driver's timers for the
4150 * device.
e59058c4 4151 **/
da0436e9
JS		 4152static void
4153lpfc_stop_port_s3(struct lpfc_hba *phba)
db2378e0 4154{
da0436e9
JS		 4155 /* Clear all interrupt enable conditions */
4156 writel(0, phba->HCregaddr);
4157 readl(phba->HCregaddr); /* flush */
4158 /* Clear all pending interrupts */
4159 writel(0xffffffff, phba->HAregaddr);
4160 readl(phba->HAregaddr); /* flush */
db2378e0 4161
da0436e9
JS		 4162 /* Reset some HBA SLI setup states */
4163 lpfc_stop_hba_timers(phba);
4164 phba->pport->work_port_events = 0;
4165}
db2378e0 4166
da0436e9
JS		 4167/**
4168 * lpfc_stop_port_s4 - Stop SLI4 device port
4169 * @phba: pointer to lpfc hba data structure.
4170 *
4171 * This routine is invoked to stop an SLI4 device port, it stops the device
4172 * from generating interrupts and stops the device driver's timers for the
4173 * device.
4174 **/
4175static void
4176lpfc_stop_port_s4(struct lpfc_hba *phba)
4177{
4178 /* Reset some HBA SLI4 setup states */
4179 lpfc_stop_hba_timers(phba);
4180 phba->pport->work_port_events = 0;
4181 phba->sli4_hba.intr_enable = 0;
da0436e9 4182}
9399627f 4183
da0436e9
JS		 4184/**
4185 * lpfc_stop_port - Wrapper function for stopping hba port
4186 * @phba: Pointer to HBA context object.
4187 *
4188 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from
4189 * the API jump table function pointer from the lpfc_hba struct.
4190 **/
4191void
4192lpfc_stop_port(struct lpfc_hba *phba)
4193{
4194 phba->lpfc_stop_port(phba);
f485c18d
DK		 4195
4196 if (phba->wq)
4197 flush_workqueue(phba->wq);
da0436e9 4198}
db2378e0 4199
ecfd03c6
JS		 4200/**
4201 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer
4202 * @phba: Pointer to hba for which this call is being executed.
4203 *
4204 * This routine starts the timer waiting for the FCF rediscovery to complete.
4205 **/
4206void
4207lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba)
4208{
4209 unsigned long fcf_redisc_wait_tmo =
4210 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO));
4211 /* Start fcf rediscovery wait period timer */
4212 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo);
4213 spin_lock_irq(&phba->hbalock);
4214 /* Allow action to new fcf asynchronous event */
4215 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
4216 /* Mark the FCF rediscovery pending state */
4217 phba->fcf.fcf_flag |= FCF_REDISC_PEND;
4218 spin_unlock_irq(&phba->hbalock);
4219}
4220
4221/**
4222 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout
4223 * @ptr: Map to lpfc_hba data structure pointer.
4224 *
4225 * This routine is invoked when waiting for FCF table rediscover has been
4226 * timed out. If new FCF record(s) has (have) been discovered during the
4227 * wait period, a new FCF event shall be added to the FCOE async event
4228 * list, and then worker thread shall be waked up for processing from the
4229 * worker thread context.
4230 **/
e399b228 4231static void
f22eb4d3 4232lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list *t)
ecfd03c6 4233{
f22eb4d3 4234 struct lpfc_hba *phba = from_timer(phba, t, fcf.redisc_wait);
ecfd03c6
JS		 4235
4236 /* Don't send FCF rediscovery event if timer cancelled */
4237 spin_lock_irq(&phba->hbalock);
4238 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
4239 spin_unlock_irq(&phba->hbalock);
4240 return;
4241 }
4242 /* Clear FCF rediscovery timer pending flag */
4243 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
4244 /* FCF rediscovery event to worker thread */
4245 phba->fcf.fcf_flag |= FCF_REDISC_EVT;
4246 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 4247 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 4248 "2776 FCF rediscover quiescent timer expired\n");
ecfd03c6
JS		 4249 /* wake up worker thread */
4250 lpfc_worker_wake_up(phba);
4251}
4252
e59058c4 4253/**
da0436e9 4254 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code
e59058c4 4255 * @phba: pointer to lpfc hba data structure.
da0436e9 4256 * @acqe_link: pointer to the async link completion queue entry.
e59058c4 4257 *
da0436e9
JS		 4258 * This routine is to parse the SLI4 link-attention link fault code and
4259 * translate it into the base driver's read link attention mailbox command
4260 * status.
4261 *
4262 * Return: Link-attention status in terms of base driver's coding.
e59058c4 4263 **/
da0436e9
JS		 4264static uint16_t
4265lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba,
4266 struct lpfc_acqe_link *acqe_link)
db2378e0 4267{
da0436e9 4268 uint16_t latt_fault;
9399627f 4269
da0436e9
JS		 4270 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) {
4271 case LPFC_ASYNC_LINK_FAULT_NONE:
4272 case LPFC_ASYNC_LINK_FAULT_LOCAL:
4273 case LPFC_ASYNC_LINK_FAULT_REMOTE:
4274 latt_fault = 0;
4275 break;
4276 default:
4277 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4278 "0398 Invalid link fault code: x%x\n",
4279 bf_get(lpfc_acqe_link_fault, acqe_link));
4280 latt_fault = MBXERR_ERROR;
4281 break;
4282 }
4283 return latt_fault;
db2378e0
JS		 4284}
4285
5b75da2f 4286/**
da0436e9 4287 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type
5b75da2f 4288 * @phba: pointer to lpfc hba data structure.
da0436e9 4289 * @acqe_link: pointer to the async link completion queue entry.
5b75da2f 4290 *
da0436e9
JS		 4291 * This routine is to parse the SLI4 link attention type and translate it
4292 * into the base driver's link attention type coding.
5b75da2f 4293 *
da0436e9
JS		 4294 * Return: Link attention type in terms of base driver's coding.
4295 **/
4296static uint8_t
4297lpfc_sli4_parse_latt_type(struct lpfc_hba *phba,
4298 struct lpfc_acqe_link *acqe_link)
5b75da2f 4299{
da0436e9 4300 uint8_t att_type;
5b75da2f 4301
da0436e9
JS		 4302 switch (bf_get(lpfc_acqe_link_status, acqe_link)) {
4303 case LPFC_ASYNC_LINK_STATUS_DOWN:
4304 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN:
76a95d75 4305 att_type = LPFC_ATT_LINK_DOWN;
da0436e9
JS		 4306 break;
4307 case LPFC_ASYNC_LINK_STATUS_UP:
4308 /* Ignore physical link up events - wait for logical link up */
76a95d75 4309 att_type = LPFC_ATT_RESERVED;
da0436e9
JS		 4310 break;
4311 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP:
76a95d75 4312 att_type = LPFC_ATT_LINK_UP;
da0436e9
JS		 4313 break;
4314 default:
4315 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4316 "0399 Invalid link attention type: x%x\n",
4317 bf_get(lpfc_acqe_link_status, acqe_link));
76a95d75 4318 att_type = LPFC_ATT_RESERVED;
da0436e9 4319 break;
5b75da2f 4320 }
da0436e9 4321 return att_type;
5b75da2f
JS		 4322}
4323
8b68cd52
JS		 4324/**
4325 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed
4326 * @phba: pointer to lpfc hba data structure.
4327 *
4328 * This routine is to get an SLI3 FC port's link speed in Mbps.
4329 *
4330 * Return: link speed in terms of Mbps.
4331 **/
4332uint32_t
4333lpfc_sli_port_speed_get(struct lpfc_hba *phba)
4334{
4335 uint32_t link_speed;
4336
4337 if (!lpfc_is_link_up(phba))
4338 return 0;
4339
a085e87c
JS		 4340 if (phba->sli_rev <= LPFC_SLI_REV3) {
4341 switch (phba->fc_linkspeed) {
4342 case LPFC_LINK_SPEED_1GHZ:
4343 link_speed = 1000;
4344 break;
4345 case LPFC_LINK_SPEED_2GHZ:
4346 link_speed = 2000;
4347 break;
4348 case LPFC_LINK_SPEED_4GHZ:
4349 link_speed = 4000;
4350 break;
4351 case LPFC_LINK_SPEED_8GHZ:
4352 link_speed = 8000;
4353 break;
4354 case LPFC_LINK_SPEED_10GHZ:
4355 link_speed = 10000;
4356 break;
4357 case LPFC_LINK_SPEED_16GHZ:
4358 link_speed = 16000;
4359 break;
4360 default:
4361 link_speed = 0;
4362 }
4363 } else {
4364 if (phba->sli4_hba.link_state.logical_speed)
4365 link_speed =
4366 phba->sli4_hba.link_state.logical_speed;
4367 else
4368 link_speed = phba->sli4_hba.link_state.speed;
8b68cd52
JS		 4369 }
4370 return link_speed;
4371}
4372
4373/**
4374 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed
4375 * @phba: pointer to lpfc hba data structure.
4376 * @evt_code: asynchronous event code.
4377 * @speed_code: asynchronous event link speed code.
4378 *
4379 * This routine is to parse the giving SLI4 async event link speed code into
4380 * value of Mbps for the link speed.
4381 *
4382 * Return: link speed in terms of Mbps.
4383 **/
4384static uint32_t
4385lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code,
4386 uint8_t speed_code)
4387{
4388 uint32_t port_speed;
4389
4390 switch (evt_code) {
4391 case LPFC_TRAILER_CODE_LINK:
4392 switch (speed_code) {
26d830ec 4393 case LPFC_ASYNC_LINK_SPEED_ZERO:
8b68cd52
JS		 4394 port_speed = 0;
4395 break;
26d830ec 4396 case LPFC_ASYNC_LINK_SPEED_10MBPS:
8b68cd52
JS		 4397 port_speed = 10;
4398 break;
26d830ec 4399 case LPFC_ASYNC_LINK_SPEED_100MBPS:
8b68cd52
JS		 4400 port_speed = 100;
4401 break;
26d830ec 4402 case LPFC_ASYNC_LINK_SPEED_1GBPS:
8b68cd52
JS		 4403 port_speed = 1000;
4404 break;
26d830ec 4405 case LPFC_ASYNC_LINK_SPEED_10GBPS:
8b68cd52
JS		 4406 port_speed = 10000;
4407 break;
26d830ec
JS		 4408 case LPFC_ASYNC_LINK_SPEED_20GBPS:
4409 port_speed = 20000;
4410 break;
4411 case LPFC_ASYNC_LINK_SPEED_25GBPS:
4412 port_speed = 25000;
4413 break;
4414 case LPFC_ASYNC_LINK_SPEED_40GBPS:
4415 port_speed = 40000;
4416 break;
8b68cd52
JS		 4417 default:
4418 port_speed = 0;
4419 }
4420 break;
4421 case LPFC_TRAILER_CODE_FC:
4422 switch (speed_code) {
26d830ec 4423 case LPFC_FC_LA_SPEED_UNKNOWN:
8b68cd52
JS		 4424 port_speed = 0;
4425 break;
26d830ec 4426 case LPFC_FC_LA_SPEED_1G:
8b68cd52
JS		 4427 port_speed = 1000;
4428 break;
26d830ec 4429 case LPFC_FC_LA_SPEED_2G:
8b68cd52
JS		 4430 port_speed = 2000;
4431 break;
26d830ec 4432 case LPFC_FC_LA_SPEED_4G:
8b68cd52
JS		 4433 port_speed = 4000;
4434 break;
26d830ec 4435 case LPFC_FC_LA_SPEED_8G:
8b68cd52
JS		 4436 port_speed = 8000;
4437 break;
26d830ec 4438 case LPFC_FC_LA_SPEED_10G:
8b68cd52
JS		 4439 port_speed = 10000;
4440 break;
26d830ec 4441 case LPFC_FC_LA_SPEED_16G:
8b68cd52
JS		 4442 port_speed = 16000;
4443 break;
d38dd52c
JS		 4444 case LPFC_FC_LA_SPEED_32G:
4445 port_speed = 32000;
4446 break;
8b68cd52
JS		 4447 default:
4448 port_speed = 0;
4449 }
4450 break;
4451 default:
4452 port_speed = 0;
4453 }
4454 return port_speed;
4455}
4456
da0436e9 4457/**
70f3c073 4458 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event
da0436e9
JS		 4459 * @phba: pointer to lpfc hba data structure.
4460 * @acqe_link: pointer to the async link completion queue entry.
4461 *
70f3c073 4462 * This routine is to handle the SLI4 asynchronous FCoE link event.
da0436e9
JS		 4463 **/
4464static void
4465lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
4466 struct lpfc_acqe_link *acqe_link)
4467{
4468 struct lpfc_dmabuf *mp;
4469 LPFC_MBOXQ_t *pmb;
4470 MAILBOX_t *mb;
76a95d75 4471 struct lpfc_mbx_read_top *la;
da0436e9 4472 uint8_t att_type;
76a95d75 4473 int rc;
da0436e9
JS		 4474
4475 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link);
76a95d75 4476 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP)
da0436e9 4477 return;
32b9793f 4478 phba->fcoe_eventtag = acqe_link->event_tag;
da0436e9
JS		 4479 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4480 if (!pmb) {
4481 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4482 "0395 The mboxq allocation failed\n");
4483 return;
4484 }
4485 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4486 if (!mp) {
4487 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4488 "0396 The lpfc_dmabuf allocation failed\n");
4489 goto out_free_pmb;
4490 }
4491 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4492 if (!mp->virt) {
4493 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4494 "0397 The mbuf allocation failed\n");
4495 goto out_free_dmabuf;
4496 }
4497
4498 /* Cleanup any outstanding ELS commands */
4499 lpfc_els_flush_all_cmd(phba);
4500
4501 /* Block ELS IOCBs until we have done process link event */
895427bd 4502 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
da0436e9
JS		 4503
4504 /* Update link event statistics */
4505 phba->sli.slistat.link_event++;
4506
76a95d75
JS		 4507 /* Create lpfc_handle_latt mailbox command from link ACQE */
4508 lpfc_read_topology(phba, pmb, mp);
4509 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
da0436e9
JS		 4510 pmb->vport = phba->pport;
4511
da0436e9
JS		 4512 /* Keep the link status for extra SLI4 state machine reference */
4513 phba->sli4_hba.link_state.speed =
8b68cd52
JS		 4514 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK,
4515 bf_get(lpfc_acqe_link_speed, acqe_link));
da0436e9
JS		 4516 phba->sli4_hba.link_state.duplex =
4517 bf_get(lpfc_acqe_link_duplex, acqe_link);
4518 phba->sli4_hba.link_state.status =
4519 bf_get(lpfc_acqe_link_status, acqe_link);
70f3c073
JS		 4520 phba->sli4_hba.link_state.type =
4521 bf_get(lpfc_acqe_link_type, acqe_link);
4522 phba->sli4_hba.link_state.number =
4523 bf_get(lpfc_acqe_link_number, acqe_link);
da0436e9
JS		 4524 phba->sli4_hba.link_state.fault =
4525 bf_get(lpfc_acqe_link_fault, acqe_link);
65467b6b 4526 phba->sli4_hba.link_state.logical_speed =
8b68cd52
JS		 4527 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10;
4528
70f3c073 4529 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
c31098ce
JS		 4530 "2900 Async FC/FCoE Link event - Speed:%dGBit "
4531 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d "
4532 "Logical speed:%dMbps Fault:%d\n",
70f3c073
JS		 4533 phba->sli4_hba.link_state.speed,
4534 phba->sli4_hba.link_state.topology,
4535 phba->sli4_hba.link_state.status,
4536 phba->sli4_hba.link_state.type,
4537 phba->sli4_hba.link_state.number,
8b68cd52 4538 phba->sli4_hba.link_state.logical_speed,
70f3c073 4539 phba->sli4_hba.link_state.fault);
76a95d75
JS		 4540 /*
4541 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch
4542 * topology info. Note: Optional for non FC-AL ports.
4543 */
4544 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
4545 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4546 if (rc == MBX_NOT_FINISHED)
4547 goto out_free_dmabuf;
4548 return;
4549 }
4550 /*
4551 * For FCoE Mode: fill in all the topology information we need and call
4552 * the READ_TOPOLOGY completion routine to continue without actually
4553 * sending the READ_TOPOLOGY mailbox command to the port.
4554 */
4555 /* Parse and translate status field */
4556 mb = &pmb->u.mb;
4557 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba, acqe_link);
4558
4559 /* Parse and translate link attention fields */
4560 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop;
4561 la->eventTag = acqe_link->event_tag;
4562 bf_set(lpfc_mbx_read_top_att_type, la, att_type);
4563 bf_set(lpfc_mbx_read_top_link_spd, la,
a085e87c 4564 (bf_get(lpfc_acqe_link_speed, acqe_link)));
76a95d75
JS		 4565
4566 /* Fake the the following irrelvant fields */
4567 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT);
4568 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0);
4569 bf_set(lpfc_mbx_read_top_il, la, 0);
4570 bf_set(lpfc_mbx_read_top_pb, la, 0);
4571 bf_set(lpfc_mbx_read_top_fa, la, 0);
4572 bf_set(lpfc_mbx_read_top_mm, la, 0);
da0436e9
JS		 4573
4574 /* Invoke the lpfc_handle_latt mailbox command callback function */
76a95d75 4575 lpfc_mbx_cmpl_read_topology(phba, pmb);
da0436e9 4576
5b75da2f 4577 return;
da0436e9
JS		 4578
4579out_free_dmabuf:
4580 kfree(mp);
4581out_free_pmb:
4582 mempool_free(pmb, phba->mbox_mem_pool);
4583}
4584
70f3c073
JS		 4585/**
4586 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event
4587 * @phba: pointer to lpfc hba data structure.
4588 * @acqe_fc: pointer to the async fc completion queue entry.
4589 *
4590 * This routine is to handle the SLI4 asynchronous FC event. It will simply log
4591 * that the event was received and then issue a read_topology mailbox command so
4592 * that the rest of the driver will treat it the same as SLI3.
4593 **/
4594static void
4595lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc)
4596{
4597 struct lpfc_dmabuf *mp;
4598 LPFC_MBOXQ_t *pmb;
7bdedb34
JS		 4599 MAILBOX_t *mb;
4600 struct lpfc_mbx_read_top *la;
70f3c073
JS		 4601 int rc;
4602
4603 if (bf_get(lpfc_trailer_type, acqe_fc) !=
4604 LPFC_FC_LA_EVENT_TYPE_FC_LINK) {
4605 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4606 "2895 Non FC link Event detected.(%d)\n",
4607 bf_get(lpfc_trailer_type, acqe_fc));
4608 return;
4609 }
4610 /* Keep the link status for extra SLI4 state machine reference */
4611 phba->sli4_hba.link_state.speed =
8b68cd52
JS		 4612 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
4613 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
70f3c073
JS		 4614 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
4615 phba->sli4_hba.link_state.topology =
4616 bf_get(lpfc_acqe_fc_la_topology, acqe_fc);
4617 phba->sli4_hba.link_state.status =
4618 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc);
4619 phba->sli4_hba.link_state.type =
4620 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc);
4621 phba->sli4_hba.link_state.number =
4622 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc);
4623 phba->sli4_hba.link_state.fault =
4624 bf_get(lpfc_acqe_link_fault, acqe_fc);
4625 phba->sli4_hba.link_state.logical_speed =
8b68cd52 4626 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
70f3c073
JS		 4627 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4628 "2896 Async FC event - Speed:%dGBaud Topology:x%x "
4629 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:"
4630 "%dMbps Fault:%d\n",
4631 phba->sli4_hba.link_state.speed,
4632 phba->sli4_hba.link_state.topology,
4633 phba->sli4_hba.link_state.status,
4634 phba->sli4_hba.link_state.type,
4635 phba->sli4_hba.link_state.number,
8b68cd52 4636 phba->sli4_hba.link_state.logical_speed,
70f3c073
JS		 4637 phba->sli4_hba.link_state.fault);
4638 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4639 if (!pmb) {
4640 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4641 "2897 The mboxq allocation failed\n");
4642 return;
4643 }
4644 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4645 if (!mp) {
4646 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4647 "2898 The lpfc_dmabuf allocation failed\n");
4648 goto out_free_pmb;
4649 }
4650 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4651 if (!mp->virt) {
4652 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4653 "2899 The mbuf allocation failed\n");
4654 goto out_free_dmabuf;
4655 }
4656
4657 /* Cleanup any outstanding ELS commands */
4658 lpfc_els_flush_all_cmd(phba);
4659
4660 /* Block ELS IOCBs until we have done process link event */
895427bd 4661 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
70f3c073
JS		 4662
4663 /* Update link event statistics */
4664 phba->sli.slistat.link_event++;
4665
4666 /* Create lpfc_handle_latt mailbox command from link ACQE */
4667 lpfc_read_topology(phba, pmb, mp);
4668 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
4669 pmb->vport = phba->pport;
4670
7bdedb34 4671 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
ae9e28f3
JS		 4672 phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK);
4673
4674 switch (phba->sli4_hba.link_state.status) {
4675 case LPFC_FC_LA_TYPE_MDS_LINK_DOWN:
4676 phba->link_flag |= LS_MDS_LINK_DOWN;
4677 break;
4678 case LPFC_FC_LA_TYPE_MDS_LOOPBACK:
4679 phba->link_flag |= LS_MDS_LOOPBACK;
4680 break;
4681 default:
4682 break;
4683 }
4684
7bdedb34
JS		 4685 /* Parse and translate status field */
4686 mb = &pmb->u.mb;
4687 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba,
4688 (void *)acqe_fc);
4689
4690 /* Parse and translate link attention fields */
4691 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop;
4692 la->eventTag = acqe_fc->event_tag;
7bdedb34 4693
aeb3c817
JS		 4694 if (phba->sli4_hba.link_state.status ==
4695 LPFC_FC_LA_TYPE_UNEXP_WWPN) {
4696 bf_set(lpfc_mbx_read_top_att_type, la,
4697 LPFC_FC_LA_TYPE_UNEXP_WWPN);
4698 } else {
4699 bf_set(lpfc_mbx_read_top_att_type, la,
4700 LPFC_FC_LA_TYPE_LINK_DOWN);
4701 }
7bdedb34
JS		 4702 /* Invoke the mailbox command callback function */
4703 lpfc_mbx_cmpl_read_topology(phba, pmb);
4704
4705 return;
4706 }
4707
70f3c073
JS		 4708 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4709 if (rc == MBX_NOT_FINISHED)
4710 goto out_free_dmabuf;
4711 return;
4712
4713out_free_dmabuf:
4714 kfree(mp);
4715out_free_pmb:
4716 mempool_free(pmb, phba->mbox_mem_pool);
4717}
4718
4719/**
4720 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event
4721 * @phba: pointer to lpfc hba data structure.
4722 * @acqe_fc: pointer to the async SLI completion queue entry.
4723 *
4724 * This routine is to handle the SLI4 asynchronous SLI events.
4725 **/
4726static void
4727lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
4728{
4b8bae08 4729 char port_name;
8c1312e1 4730 char message[128];
4b8bae08 4731 uint8_t status;
946727dc 4732 uint8_t evt_type;
448193b5 4733 uint8_t operational = 0;
946727dc 4734 struct temp_event temp_event_data;
4b8bae08 4735 struct lpfc_acqe_misconfigured_event *misconfigured;
946727dc
JS		 4736 struct Scsi_Host *shost;
4737
4738 evt_type = bf_get(lpfc_trailer_type, acqe_sli);
4b8bae08 4739
448193b5
JS		 4740 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4741 "2901 Async SLI event - Event Data1:x%08x Event Data2:"
4742 "x%08x SLI Event Type:%d\n",
4743 acqe_sli->event_data1, acqe_sli->event_data2,
4744 evt_type);
4b8bae08
JS		 4745
4746 port_name = phba->Port[0];
4747 if (port_name == 0x00)
4748 port_name = '?'; /* get port name is empty */
4749
946727dc
JS		 4750 switch (evt_type) {
4751 case LPFC_SLI_EVENT_TYPE_OVER_TEMP:
4752 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4753 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
4754 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4755
4756 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
4757 "3190 Over Temperature:%d Celsius- Port Name %c\n",
4758 acqe_sli->event_data1, port_name);
4759
310429ef 4760 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS		 4761 shost = lpfc_shost_from_vport(phba->pport);
4762 fc_host_post_vendor_event(shost, fc_get_event_number(),
4763 sizeof(temp_event_data),
4764 (char *)&temp_event_data,
4765 SCSI_NL_VID_TYPE_PCI
4766 | PCI_VENDOR_ID_EMULEX);
4767 break;
4768 case LPFC_SLI_EVENT_TYPE_NORM_TEMP:
4769 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4770 temp_event_data.event_code = LPFC_NORMAL_TEMP;
4771 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4772
4773 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4774 "3191 Normal Temperature:%d Celsius - Port Name %c\n",
4775 acqe_sli->event_data1, port_name);
4776
4777 shost = lpfc_shost_from_vport(phba->pport);
4778 fc_host_post_vendor_event(shost, fc_get_event_number(),
4779 sizeof(temp_event_data),
4780 (char *)&temp_event_data,
4781 SCSI_NL_VID_TYPE_PCI
4782 | PCI_VENDOR_ID_EMULEX);
4783 break;
4784 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED:
4785 misconfigured = (struct lpfc_acqe_misconfigured_event *)
4b8bae08
JS		 4786 &acqe_sli->event_data1;
4787
946727dc
JS		 4788 /* fetch the status for this port */
4789 switch (phba->sli4_hba.lnk_info.lnk_no) {
4790 case LPFC_LINK_NUMBER_0:
448193b5
JS		 4791 status = bf_get(lpfc_sli_misconfigured_port0_state,
4792 &misconfigured->theEvent);
4793 operational = bf_get(lpfc_sli_misconfigured_port0_op,
4b8bae08 4794 &misconfigured->theEvent);
946727dc
JS		 4795 break;
4796 case LPFC_LINK_NUMBER_1:
448193b5
JS		 4797 status = bf_get(lpfc_sli_misconfigured_port1_state,
4798 &misconfigured->theEvent);
4799 operational = bf_get(lpfc_sli_misconfigured_port1_op,
4b8bae08 4800 &misconfigured->theEvent);
946727dc
JS		 4801 break;
4802 case LPFC_LINK_NUMBER_2:
448193b5
JS		 4803 status = bf_get(lpfc_sli_misconfigured_port2_state,
4804 &misconfigured->theEvent);
4805 operational = bf_get(lpfc_sli_misconfigured_port2_op,
4b8bae08 4806 &misconfigured->theEvent);
946727dc
JS		 4807 break;
4808 case LPFC_LINK_NUMBER_3:
448193b5
JS		 4809 status = bf_get(lpfc_sli_misconfigured_port3_state,
4810 &misconfigured->theEvent);
4811 operational = bf_get(lpfc_sli_misconfigured_port3_op,
4b8bae08 4812 &misconfigured->theEvent);
946727dc
JS		 4813 break;
4814 default:
448193b5
JS		 4815 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4816 "3296 "
4817 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED "
4818 "event: Invalid link %d",
4819 phba->sli4_hba.lnk_info.lnk_no);
4820 return;
946727dc 4821 }
4b8bae08 4822
448193b5
JS		 4823 /* Skip if optic state unchanged */
4824 if (phba->sli4_hba.lnk_info.optic_state == status)
4825 return;
4826
946727dc
JS		 4827 switch (status) {
4828 case LPFC_SLI_EVENT_STATUS_VALID:
448193b5
JS		 4829 sprintf(message, "Physical Link is functional");
4830 break;
946727dc
JS		 4831 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT:
4832 sprintf(message, "Optics faulted/incorrectly "
4833 "installed/not installed - Reseat optics, "
4834 "if issue not resolved, replace.");
4835 break;
4836 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE:
4837 sprintf(message,
4838 "Optics of two types installed - Remove one "
4839 "optic or install matching pair of optics.");
4840 break;
4841 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED:
4842 sprintf(message, "Incompatible optics - Replace with "
292098be 4843 "compatible optics for card to function.");
946727dc 4844 break;
448193b5
JS		 4845 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED:
4846 sprintf(message, "Unqualified optics - Replace with "
4847 "Avago optics for Warranty and Technical "
4848 "Support - Link is%s operational",
2ea259ee 4849 (operational) ? " not" : "");
448193b5
JS		 4850 break;
4851 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED:
4852 sprintf(message, "Uncertified optics - Replace with "
4853 "Avago-certified optics to enable link "
4854 "operation - Link is%s operational",
2ea259ee 4855 (operational) ? " not" : "");
448193b5 4856 break;
946727dc
JS		 4857 default:
4858 /* firmware is reporting a status we don't know about */
4859 sprintf(message, "Unknown event status x%02x", status);
4860 break;
4861 }
448193b5 4862 phba->sli4_hba.lnk_info.optic_state = status;
946727dc 4863 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
448193b5 4864 "3176 Port Name %c %s\n", port_name, message);
946727dc
JS		 4865 break;
4866 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT:
4867 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4868 "3192 Remote DPort Test Initiated - "
4869 "Event Data1:x%08x Event Data2: x%08x\n",
4870 acqe_sli->event_data1, acqe_sli->event_data2);
4b8bae08
JS		 4871 break;
4872 default:
946727dc
JS		 4873 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4874 "3193 Async SLI event - Event Data1:x%08x Event Data2:"
4875 "x%08x SLI Event Type:%d\n",
4876 acqe_sli->event_data1, acqe_sli->event_data2,
4877 evt_type);
4b8bae08
JS		 4878 break;
4879 }
70f3c073
JS		 4880}
4881
fc2b989b
JS		 4882/**
4883 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport
4884 * @vport: pointer to vport data structure.
4885 *
4886 * This routine is to perform Clear Virtual Link (CVL) on a vport in
4887 * response to a CVL event.
4888 *
4889 * Return the pointer to the ndlp with the vport if successful, otherwise
4890 * return NULL.
4891 **/
4892static struct lpfc_nodelist *
4893lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport)
4894{
4895 struct lpfc_nodelist *ndlp;
4896 struct Scsi_Host *shost;
4897 struct lpfc_hba *phba;
4898
4899 if (!vport)
4900 return NULL;
fc2b989b
JS		 4901 phba = vport->phba;
4902 if (!phba)
4903 return NULL;
78730cfe
JS		 4904 ndlp = lpfc_findnode_did(vport, Fabric_DID);
4905 if (!ndlp) {
4906 /* Cannot find existing Fabric ndlp, so allocate a new one */
9d3d340d 4907 ndlp = lpfc_nlp_init(vport, Fabric_DID);
78730cfe
JS		 4908 if (!ndlp)
4909 return 0;
78730cfe
JS		 4910 /* Set the node type */
4911 ndlp->nlp_type |= NLP_FABRIC;
4912 /* Put ndlp onto node list */
4913 lpfc_enqueue_node(vport, ndlp);
4914 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
4915 /* re-setup ndlp without removing from node list */
4916 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
4917 if (!ndlp)
4918 return 0;
4919 }
63e801ce
JS		 4920 if ((phba->pport->port_state < LPFC_FLOGI) &&
4921 (phba->pport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS		 4922 return NULL;
4923 /* If virtual link is not yet instantiated ignore CVL */
63e801ce
JS		 4924 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)
4925 && (vport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS		 4926 return NULL;
4927 shost = lpfc_shost_from_vport(vport);
4928 if (!shost)
4929 return NULL;
4930 lpfc_linkdown_port(vport);
4931 lpfc_cleanup_pending_mbox(vport);
4932 spin_lock_irq(shost->host_lock);
4933 vport->fc_flag |= FC_VPORT_CVL_RCVD;
4934 spin_unlock_irq(shost->host_lock);
4935
4936 return ndlp;
4937}
4938
4939/**
4940 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports
4941 * @vport: pointer to lpfc hba data structure.
4942 *
4943 * This routine is to perform Clear Virtual Link (CVL) on all vports in
4944 * response to a FCF dead event.
4945 **/
4946static void
4947lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba)
4948{
4949 struct lpfc_vport **vports;
4950 int i;
4951
4952 vports = lpfc_create_vport_work_array(phba);
4953 if (vports)
4954 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
4955 lpfc_sli4_perform_vport_cvl(vports[i]);
4956 lpfc_destroy_vport_work_array(phba, vports);
4957}
4958
da0436e9 4959/**
76a95d75 4960 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event
da0436e9
JS		 4961 * @phba: pointer to lpfc hba data structure.
4962 * @acqe_link: pointer to the async fcoe completion queue entry.
4963 *
4964 * This routine is to handle the SLI4 asynchronous fcoe event.
4965 **/
4966static void
76a95d75 4967lpfc_sli4_async_fip_evt(struct lpfc_hba *phba,
70f3c073 4968 struct lpfc_acqe_fip *acqe_fip)
da0436e9 4969{
70f3c073 4970 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
da0436e9 4971 int rc;
6669f9bb
JS		 4972 struct lpfc_vport *vport;
4973 struct lpfc_nodelist *ndlp;
4974 struct Scsi_Host *shost;
695a814e
JS		 4975 int active_vlink_present;
4976 struct lpfc_vport **vports;
4977 int i;
da0436e9 4978
70f3c073
JS		 4979 phba->fc_eventTag = acqe_fip->event_tag;
4980 phba->fcoe_eventtag = acqe_fip->event_tag;
da0436e9 4981 switch (event_type) {
70f3c073
JS		 4982 case LPFC_FIP_EVENT_TYPE_NEW_FCF:
4983 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD:
4984 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF)
999d813f
JS		 4985 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4986 LOG_DISCOVERY,
a93ff37a
JS		 4987 "2546 New FCF event, evt_tag:x%x, "
4988 "index:x%x\n",
70f3c073
JS		 4989 acqe_fip->event_tag,
4990 acqe_fip->index);
999d813f
JS		 4991 else
4992 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP |
4993 LOG_DISCOVERY,
a93ff37a
JS		 4994 "2788 FCF param modified event, "
4995 "evt_tag:x%x, index:x%x\n",
70f3c073
JS		 4996 acqe_fip->event_tag,
4997 acqe_fip->index);
38b92ef8 4998 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
0c9ab6f5
JS		 4999 /*
5000 * During period of FCF discovery, read the FCF
5001 * table record indexed by the event to update
a93ff37a 5002 * FCF roundrobin failover eligible FCF bmask.
0c9ab6f5
JS		 5003 */
5004 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
5005 LOG_DISCOVERY,
a93ff37a
JS		 5006 "2779 Read FCF (x%x) for updating "
5007 "roundrobin FCF failover bmask\n",
70f3c073
JS		 5008 acqe_fip->index);
5009 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index);
0c9ab6f5 5010 }
38b92ef8
JS		 5011
5012 /* If the FCF discovery is in progress, do nothing. */
3804dc84 5013 spin_lock_irq(&phba->hbalock);
a93ff37a 5014 if (phba->hba_flag & FCF_TS_INPROG) {
38b92ef8
JS		 5015 spin_unlock_irq(&phba->hbalock);
5016 break;
5017 }
5018 /* If fast FCF failover rescan event is pending, do nothing */
5019 if (phba->fcf.fcf_flag & FCF_REDISC_EVT) {
5020 spin_unlock_irq(&phba->hbalock);
5021 break;
5022 }
5023
c2b9712e
JS		 5024 /* If the FCF has been in discovered state, do nothing. */
5025 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) {
3804dc84
JS		 5026 spin_unlock_irq(&phba->hbalock);
5027 break;
5028 }
5029 spin_unlock_irq(&phba->hbalock);
38b92ef8 5030
0c9ab6f5
JS		 5031 /* Otherwise, scan the entire FCF table and re-discover SAN */
5032 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a
JS		 5033 "2770 Start FCF table scan per async FCF "
5034 "event, evt_tag:x%x, index:x%x\n",
70f3c073 5035 acqe_fip->event_tag, acqe_fip->index);
0c9ab6f5
JS		 5036 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba,
5037 LPFC_FCOE_FCF_GET_FIRST);
da0436e9 5038 if (rc)
0c9ab6f5
JS		 5039 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5040 "2547 Issue FCF scan read FCF mailbox "
a93ff37a 5041 "command failed (x%x)\n", rc);
da0436e9
JS		 5042 break;
5043
70f3c073 5044 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL:
da0436e9 5045 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e4e74273 5046 "2548 FCF Table full count 0x%x tag 0x%x\n",
70f3c073
JS		 5047 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip),
5048 acqe_fip->event_tag);
da0436e9
JS		 5049 break;
5050
70f3c073 5051 case LPFC_FIP_EVENT_TYPE_FCF_DEAD:
80c17849 5052 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 5053 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
a93ff37a 5054 "2549 FCF (x%x) disconnected from network, "
70f3c073 5055 "tag:x%x\n", acqe_fip->index, acqe_fip->event_tag);
38b92ef8
JS		 5056 /*
5057 * If we are in the middle of FCF failover process, clear
5058 * the corresponding FCF bit in the roundrobin bitmap.
da0436e9 5059 */
fc2b989b 5060 spin_lock_irq(&phba->hbalock);
a1cadfef
JS		 5061 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) &&
5062 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) {
fc2b989b 5063 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 5064 /* Update FLOGI FCF failover eligible FCF bmask */
70f3c073 5065 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index);
fc2b989b
JS		 5066 break;
5067 }
38b92ef8
JS		 5068 spin_unlock_irq(&phba->hbalock);
5069
5070 /* If the event is not for currently used fcf do nothing */
70f3c073 5071 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index)
38b92ef8
JS		 5072 break;
5073
5074 /*
5075 * Otherwise, request the port to rediscover the entire FCF
5076 * table for a fast recovery from case that the current FCF
5077 * is no longer valid as we are not in the middle of FCF
5078 * failover process already.
5079 */
c2b9712e
JS		 5080 spin_lock_irq(&phba->hbalock);
5081 /* Mark the fast failover process in progress */
5082 phba->fcf.fcf_flag |= FCF_DEAD_DISC;
5083 spin_unlock_irq(&phba->hbalock);
5084
5085 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
5086 "2771 Start FCF fast failover process due to "
5087 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x "
5088 "\n", acqe_fip->event_tag, acqe_fip->index);
5089 rc = lpfc_sli4_redisc_fcf_table(phba);
5090 if (rc) {
5091 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
5092 LOG_DISCOVERY,
5093 "2772 Issue FCF rediscover mabilbox "
5094 "command failed, fail through to FCF "
5095 "dead event\n");
5096 spin_lock_irq(&phba->hbalock);
5097 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
5098 spin_unlock_irq(&phba->hbalock);
5099 /*
5100 * Last resort will fail over by treating this
5101 * as a link down to FCF registration.
5102 */
5103 lpfc_sli4_fcf_dead_failthrough(phba);
5104 } else {
5105 /* Reset FCF roundrobin bmask for new discovery */
5106 lpfc_sli4_clear_fcf_rr_bmask(phba);
5107 /*
5108 * Handling fast FCF failover to a DEAD FCF event is
5109 * considered equalivant to receiving CVL to all vports.
5110 */
5111 lpfc_sli4_perform_all_vport_cvl(phba);
5112 }
da0436e9 5113 break;
70f3c073 5114 case LPFC_FIP_EVENT_TYPE_CVL:
80c17849 5115 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 5116 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
6669f9bb 5117 "2718 Clear Virtual Link Received for VPI 0x%x"
70f3c073 5118 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag);
6d368e53 5119
6669f9bb 5120 vport = lpfc_find_vport_by_vpid(phba,
5248a749 5121 acqe_fip->index);
fc2b989b 5122 ndlp = lpfc_sli4_perform_vport_cvl(vport);
6669f9bb
JS		 5123 if (!ndlp)
5124 break;
695a814e
JS		 5125 active_vlink_present = 0;
5126
5127 vports = lpfc_create_vport_work_array(phba);
5128 if (vports) {
5129 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
5130 i++) {
5131 if ((!(vports[i]->fc_flag &
5132 FC_VPORT_CVL_RCVD)) &&
5133 (vports[i]->port_state > LPFC_FDISC)) {
5134 active_vlink_present = 1;
5135 break;
5136 }
5137 }
5138 lpfc_destroy_vport_work_array(phba, vports);
5139 }
5140
cc82355a
JS		 5141 /*
5142 * Don't re-instantiate if vport is marked for deletion.
5143 * If we are here first then vport_delete is going to wait
5144 * for discovery to complete.
5145 */
5146 if (!(vport->load_flag & FC_UNLOADING) &&
5147 active_vlink_present) {
695a814e
JS		 5148 /*
5149 * If there are other active VLinks present,
5150 * re-instantiate the Vlink using FDISC.
5151 */
256ec0d0
JS		 5152 mod_timer(&ndlp->nlp_delayfunc,
5153 jiffies + msecs_to_jiffies(1000));
fc2b989b 5154 shost = lpfc_shost_from_vport(vport);
6669f9bb
JS		 5155 spin_lock_irq(shost->host_lock);
5156 ndlp->nlp_flag |= NLP_DELAY_TMO;
5157 spin_unlock_irq(shost->host_lock);
695a814e
JS		 5158 ndlp->nlp_last_elscmd = ELS_CMD_FDISC;
5159 vport->port_state = LPFC_FDISC;
5160 } else {
ecfd03c6
JS		 5161 /*
5162 * Otherwise, we request port to rediscover
5163 * the entire FCF table for a fast recovery
5164 * from possible case that the current FCF
0c9ab6f5
JS		 5165 * is no longer valid if we are not already
5166 * in the FCF failover process.
ecfd03c6 5167 */
fc2b989b 5168 spin_lock_irq(&phba->hbalock);
0c9ab6f5 5169 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
fc2b989b
JS		 5170 spin_unlock_irq(&phba->hbalock);
5171 break;
5172 }
5173 /* Mark the fast failover process in progress */
0c9ab6f5 5174 phba->fcf.fcf_flag |= FCF_ACVL_DISC;
fc2b989b 5175 spin_unlock_irq(&phba->hbalock);
0c9ab6f5
JS		 5176 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
5177 LOG_DISCOVERY,
a93ff37a 5178 "2773 Start FCF failover per CVL, "
70f3c073 5179 "evt_tag:x%x\n", acqe_fip->event_tag);
ecfd03c6 5180 rc = lpfc_sli4_redisc_fcf_table(phba);
fc2b989b 5181 if (rc) {
0c9ab6f5
JS		 5182 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
5183 LOG_DISCOVERY,
5184 "2774 Issue FCF rediscover "
5185 "mabilbox command failed, "
5186 "through to CVL event\n");
fc2b989b 5187 spin_lock_irq(&phba->hbalock);
0c9ab6f5 5188 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
fc2b989b 5189 spin_unlock_irq(&phba->hbalock);
ecfd03c6
JS		 5190 /*
5191 * Last resort will be re-try on the
5192 * the current registered FCF entry.
5193 */
5194 lpfc_retry_pport_discovery(phba);
38b92ef8
JS		 5195 } else
5196 /*
5197 * Reset FCF roundrobin bmask for new
5198 * discovery.
5199 */
7d791df7 5200 lpfc_sli4_clear_fcf_rr_bmask(phba);
6669f9bb
JS		 5201 }
5202 break;
da0436e9
JS		 5203 default:
5204 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5205 "0288 Unknown FCoE event type 0x%x event tag "
70f3c073 5206 "0x%x\n", event_type, acqe_fip->event_tag);
da0436e9
JS		 5207 break;
5208 }
5209}
5210
5211/**
5212 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event
5213 * @phba: pointer to lpfc hba data structure.
5214 * @acqe_link: pointer to the async dcbx completion queue entry.
5215 *
5216 * This routine is to handle the SLI4 asynchronous dcbx event.
5217 **/
5218static void
5219lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba,
5220 struct lpfc_acqe_dcbx *acqe_dcbx)
5221{
4d9ab994 5222 phba->fc_eventTag = acqe_dcbx->event_tag;
da0436e9
JS		 5223 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5224 "0290 The SLI4 DCBX asynchronous event is not "
5225 "handled yet\n");
5226}
5227
b19a061a
JS		 5228/**
5229 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event
5230 * @phba: pointer to lpfc hba data structure.
5231 * @acqe_link: pointer to the async grp5 completion queue entry.
5232 *
5233 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event
5234 * is an asynchronous notified of a logical link speed change. The Port
5235 * reports the logical link speed in units of 10Mbps.
5236 **/
5237static void
5238lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba,
5239 struct lpfc_acqe_grp5 *acqe_grp5)
5240{
5241 uint16_t prev_ll_spd;
5242
5243 phba->fc_eventTag = acqe_grp5->event_tag;
5244 phba->fcoe_eventtag = acqe_grp5->event_tag;
5245 prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
5246 phba->sli4_hba.link_state.logical_speed =
8b68cd52 5247 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10;
b19a061a
JS		 5248 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5249 "2789 GRP5 Async Event: Updating logical link speed "
8b68cd52
JS		 5250 "from %dMbps to %dMbps\n", prev_ll_spd,
5251 phba->sli4_hba.link_state.logical_speed);
b19a061a
JS		 5252}
5253
da0436e9
JS		 5254/**
5255 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event
5256 * @phba: pointer to lpfc hba data structure.
5257 *
5258 * This routine is invoked by the worker thread to process all the pending
5259 * SLI4 asynchronous events.
5260 **/
5261void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
5262{
5263 struct lpfc_cq_event *cq_event;
5264
5265 /* First, declare the async event has been handled */
5266 spin_lock_irq(&phba->hbalock);
5267 phba->hba_flag &= ~ASYNC_EVENT;
5268 spin_unlock_irq(&phba->hbalock);
5269 /* Now, handle all the async events */
5270 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
5271 /* Get the first event from the head of the event queue */
5272 spin_lock_irq(&phba->hbalock);
5273 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
5274 cq_event, struct lpfc_cq_event, list);
5275 spin_unlock_irq(&phba->hbalock);
5276 /* Process the asynchronous event */
5277 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) {
5278 case LPFC_TRAILER_CODE_LINK:
5279 lpfc_sli4_async_link_evt(phba,
5280 &cq_event->cqe.acqe_link);
5281 break;
5282 case LPFC_TRAILER_CODE_FCOE:
70f3c073 5283 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip);
da0436e9
JS		 5284 break;
5285 case LPFC_TRAILER_CODE_DCBX:
5286 lpfc_sli4_async_dcbx_evt(phba,
5287 &cq_event->cqe.acqe_dcbx);
5288 break;
b19a061a
JS		 5289 case LPFC_TRAILER_CODE_GRP5:
5290 lpfc_sli4_async_grp5_evt(phba,
5291 &cq_event->cqe.acqe_grp5);
5292 break;
70f3c073
JS		 5293 case LPFC_TRAILER_CODE_FC:
5294 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc);
5295 break;
5296 case LPFC_TRAILER_CODE_SLI:
5297 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli);
5298 break;
da0436e9
JS		 5299 default:
5300 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5301 "1804 Invalid asynchrous event code: "
5302 "x%x\n", bf_get(lpfc_trailer_code,
5303 &cq_event->cqe.mcqe_cmpl));
5304 break;
5305 }
5306 /* Free the completion event processed to the free pool */
5307 lpfc_sli4_cq_event_release(phba, cq_event);
5308 }
5309}
5310
ecfd03c6
JS		 5311/**
5312 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event
5313 * @phba: pointer to lpfc hba data structure.
5314 *
5315 * This routine is invoked by the worker thread to process FCF table
5316 * rediscovery pending completion event.
5317 **/
5318void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba)
5319{
5320 int rc;
5321
5322 spin_lock_irq(&phba->hbalock);
5323 /* Clear FCF rediscovery timeout event */
5324 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT;
5325 /* Clear driver fast failover FCF record flag */
5326 phba->fcf.failover_rec.flag = 0;
5327 /* Set state for FCF fast failover */
5328 phba->fcf.fcf_flag |= FCF_REDISC_FOV;
5329 spin_unlock_irq(&phba->hbalock);
5330
5331 /* Scan FCF table from the first entry to re-discover SAN */
0c9ab6f5 5332 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a 5333 "2777 Start post-quiescent FCF table scan\n");
0c9ab6f5 5334 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST);
ecfd03c6 5335 if (rc)
0c9ab6f5
JS		 5336 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5337 "2747 Issue FCF scan read FCF mailbox "
5338 "command failed 0x%x\n", rc);
ecfd03c6
JS		 5339}
5340
da0436e9
JS		 5341/**
5342 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table
5343 * @phba: pointer to lpfc hba data structure.
5344 * @dev_grp: The HBA PCI-Device group number.
5345 *
5346 * This routine is invoked to set up the per HBA PCI-Device group function
5347 * API jump table entries.
5348 *
5349 * Return: 0 if success, otherwise -ENODEV
5350 **/
5351int
5352lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
5353{
5354 int rc;
5355
5356 /* Set up lpfc PCI-device group */
5357 phba->pci_dev_grp = dev_grp;
5358
5359 /* The LPFC_PCI_DEV_OC uses SLI4 */
5360 if (dev_grp == LPFC_PCI_DEV_OC)
5361 phba->sli_rev = LPFC_SLI_REV4;
5362
5363 /* Set up device INIT API function jump table */
5364 rc = lpfc_init_api_table_setup(phba, dev_grp);
5365 if (rc)
5366 return -ENODEV;
5367 /* Set up SCSI API function jump table */
5368 rc = lpfc_scsi_api_table_setup(phba, dev_grp);
5369 if (rc)
5370 return -ENODEV;
5371 /* Set up SLI API function jump table */
5372 rc = lpfc_sli_api_table_setup(phba, dev_grp);
5373 if (rc)
5374 return -ENODEV;
5375 /* Set up MBOX API function jump table */
5376 rc = lpfc_mbox_api_table_setup(phba, dev_grp);
5377 if (rc)
5378 return -ENODEV;
5379
5380 return 0;
5b75da2f
JS		 5381}
5382
5383/**
3621a710 5384 * lpfc_log_intr_mode - Log the active interrupt mode
5b75da2f
JS		 5385 * @phba: pointer to lpfc hba data structure.
5386 * @intr_mode: active interrupt mode adopted.
5387 *
5388 * This routine it invoked to log the currently used active interrupt mode
5389 * to the device.
3772a991
JS		 5390 **/
5391static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode)
5b75da2f
JS		 5392{
5393 switch (intr_mode) {
5394 case 0:
5395 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5396 "0470 Enable INTx interrupt mode.\n");
5397 break;
5398 case 1:
5399 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5400 "0481 Enabled MSI interrupt mode.\n");
5401 break;
5402 case 2:
5403 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5404 "0480 Enabled MSI-X interrupt mode.\n");
5405 break;
5406 default:
5407 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5408 "0482 Illegal interrupt mode.\n");
5409 break;
5410 }
5411 return;
5412}
5413
5b75da2f 5414/**
3772a991 5415 * lpfc_enable_pci_dev - Enable a generic PCI device.
5b75da2f
JS		 5416 * @phba: pointer to lpfc hba data structure.
5417 *
3772a991
JS		 5418 * This routine is invoked to enable the PCI device that is common to all
5419 * PCI devices.
5b75da2f
JS		 5420 *
5421 * Return codes
af901ca1 5422 * 0 - successful
3772a991 5423 * other values - error
5b75da2f 5424 **/
3772a991
JS		 5425static int
5426lpfc_enable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5427{
3772a991 5428 struct pci_dev *pdev;
5b75da2f 5429
3772a991
JS		 5430 /* Obtain PCI device reference */
5431 if (!phba->pcidev)
5432 goto out_error;
5433 else
5434 pdev = phba->pcidev;
3772a991
JS		 5435 /* Enable PCI device */
5436 if (pci_enable_device_mem(pdev))
5437 goto out_error;
5438 /* Request PCI resource for the device */
e0c0483c 5439 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME))
3772a991
JS		 5440 goto out_disable_device;
5441 /* Set up device as PCI master and save state for EEH */
5442 pci_set_master(pdev);
5443 pci_try_set_mwi(pdev);
5444 pci_save_state(pdev);
5b75da2f 5445
0558056c 5446 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */
453193e0 5447 if (pci_is_pcie(pdev))
0558056c
JS		 5448 pdev->needs_freset = 1;
5449
3772a991 5450 return 0;
5b75da2f 5451
3772a991
JS		 5452out_disable_device:
5453 pci_disable_device(pdev);
5454out_error:
079b5c91 5455 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e0c0483c 5456 "1401 Failed to enable pci device\n");
3772a991 5457 return -ENODEV;
5b75da2f
JS		 5458}
5459
5460/**
3772a991 5461 * lpfc_disable_pci_dev - Disable a generic PCI device.
5b75da2f
JS		 5462 * @phba: pointer to lpfc hba data structure.
5463 *
3772a991
JS		 5464 * This routine is invoked to disable the PCI device that is common to all
5465 * PCI devices.
5b75da2f
JS		 5466 **/
5467static void
3772a991 5468lpfc_disable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5469{
3772a991 5470 struct pci_dev *pdev;
5b75da2f 5471
3772a991
JS		 5472 /* Obtain PCI device reference */
5473 if (!phba->pcidev)
5474 return;
5475 else
5476 pdev = phba->pcidev;
3772a991 5477 /* Release PCI resource and disable PCI device */
e0c0483c 5478 pci_release_mem_regions(pdev);
3772a991 5479 pci_disable_device(pdev);
5b75da2f
JS		 5480
5481 return;
5482}
5483
e59058c4 5484/**
3772a991
JS		 5485 * lpfc_reset_hba - Reset a hba
5486 * @phba: pointer to lpfc hba data structure.
e59058c4 5487 *
3772a991
JS		 5488 * This routine is invoked to reset a hba device. It brings the HBA
5489 * offline, performs a board restart, and then brings the board back
5490 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up
5491 * on outstanding mailbox commands.
e59058c4 5492 **/
3772a991
JS		 5493void
5494lpfc_reset_hba(struct lpfc_hba *phba)
dea3101e 5495{
3772a991
JS		 5496 /* If resets are disabled then set error state and return. */
5497 if (!phba->cfg_enable_hba_reset) {
5498 phba->link_state = LPFC_HBA_ERROR;
5499 return;
5500 }
ee62021a
JS		 5501 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
5502 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
5503 else
5504 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
3772a991
JS		 5505 lpfc_offline(phba);
5506 lpfc_sli_brdrestart(phba);
5507 lpfc_online(phba);
5508 lpfc_unblock_mgmt_io(phba);
5509}
dea3101e 5510
0a96e975
JS		 5511/**
5512 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions
5513 * @phba: pointer to lpfc hba data structure.
5514 *
5515 * This function enables the PCI SR-IOV virtual functions to a physical
5516 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5517 * enable the number of virtual functions to the physical function. As
5518 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5519 * API call does not considered as an error condition for most of the device.
5520 **/
5521uint16_t
5522lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba)
5523{
5524 struct pci_dev *pdev = phba->pcidev;
5525 uint16_t nr_virtfn;
5526 int pos;
5527
0a96e975
JS		 5528 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
5529 if (pos == 0)
5530 return 0;
5531
5532 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn);
5533 return nr_virtfn;
5534}
5535
912e3acd
JS		 5536/**
5537 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions
5538 * @phba: pointer to lpfc hba data structure.
5539 * @nr_vfn: number of virtual functions to be enabled.
5540 *
5541 * This function enables the PCI SR-IOV virtual functions to a physical
5542 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5543 * enable the number of virtual functions to the physical function. As
5544 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5545 * API call does not considered as an error condition for most of the device.
5546 **/
5547int
5548lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn)
5549{
5550 struct pci_dev *pdev = phba->pcidev;
0a96e975 5551 uint16_t max_nr_vfn;
912e3acd
JS		 5552 int rc;
5553
0a96e975
JS		 5554 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba);
5555 if (nr_vfn > max_nr_vfn) {
5556 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5557 "3057 Requested vfs (%d) greater than "
5558 "supported vfs (%d)", nr_vfn, max_nr_vfn);
5559 return -EINVAL;
5560 }
5561
912e3acd
JS		 5562 rc = pci_enable_sriov(pdev, nr_vfn);
5563 if (rc) {
5564 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5565 "2806 Failed to enable sriov on this device "
5566 "with vfn number nr_vf:%d, rc:%d\n",
5567 nr_vfn, rc);
5568 } else
5569 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5570 "2807 Successful enable sriov on this device "
5571 "with vfn number nr_vf:%d\n", nr_vfn);
5572 return rc;
5573}
5574
3772a991 5575/**
895427bd 5576 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources.
3772a991
JS		 5577 * @phba: pointer to lpfc hba data structure.
5578 *
895427bd
JS		 5579 * This routine is invoked to set up the driver internal resources before the
5580 * device specific resource setup to support the HBA device it attached to.
3772a991
JS		 5581 *
5582 * Return codes
895427bd
JS		 5583 * 0 - successful
5584 * other values - error
3772a991
JS		 5585 **/
5586static int
895427bd 5587lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
3772a991 5588{
895427bd 5589 struct lpfc_sli *psli = &phba->sli;
dea3101e 5590
2e0fef85 5591 /*
895427bd 5592 * Driver resources common to all SLI revisions
2e0fef85 5593 */
895427bd
JS		 5594 atomic_set(&phba->fast_event_count, 0);
5595 spin_lock_init(&phba->hbalock);
dea3101e 5596
895427bd
JS		 5597 /* Initialize ndlp management spinlock */
5598 spin_lock_init(&phba->ndlp_lock);
5599
5600 INIT_LIST_HEAD(&phba->port_list);
5601 INIT_LIST_HEAD(&phba->work_list);
5602 init_waitqueue_head(&phba->wait_4_mlo_m_q);
5603
5604 /* Initialize the wait queue head for the kernel thread */
5605 init_waitqueue_head(&phba->work_waitq);
5606
5607 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
f358dd0c 5608 "1403 Protocols supported %s %s %s\n",
895427bd
JS		 5609 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ?
5610 "SCSI" : " "),
5611 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ?
f358dd0c
JS		 5612 "NVME" : " "),
5613 (phba->nvmet_support ? "NVMET" : " "));
895427bd
JS		 5614
5615 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5616 /* Initialize the scsi buffer list used by driver for scsi IO */
5617 spin_lock_init(&phba->scsi_buf_list_get_lock);
5618 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get);
5619 spin_lock_init(&phba->scsi_buf_list_put_lock);
5620 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
5621 }
5622
5623 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
5624 (phba->nvmet_support == 0)) {
5625 /* Initialize the NVME buffer list used by driver for NVME IO */
5626 spin_lock_init(&phba->nvme_buf_list_get_lock);
5627 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_get);
cf1a1d3e 5628 phba->get_nvme_bufs = 0;
895427bd
JS		 5629 spin_lock_init(&phba->nvme_buf_list_put_lock);
5630 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
cf1a1d3e 5631 phba->put_nvme_bufs = 0;
895427bd
JS		 5632 }
5633
5634 /* Initialize the fabric iocb list */
5635 INIT_LIST_HEAD(&phba->fabric_iocb_list);
5636
5637 /* Initialize list to save ELS buffers */
5638 INIT_LIST_HEAD(&phba->elsbuf);
5639
5640 /* Initialize FCF connection rec list */
5641 INIT_LIST_HEAD(&phba->fcf_conn_rec_list);
5642
5643 /* Initialize OAS configuration list */
5644 spin_lock_init(&phba->devicelock);
5645 INIT_LIST_HEAD(&phba->luns);
858c9f6c 5646
3772a991 5647 /* MBOX heartbeat timer */
f22eb4d3 5648 timer_setup(&psli->mbox_tmo, lpfc_mbox_timeout, 0);
3772a991 5649 /* Fabric block timer */
f22eb4d3 5650 timer_setup(&phba->fabric_block_timer, lpfc_fabric_block_timeout, 0);
3772a991 5651 /* EA polling mode timer */
f22eb4d3 5652 timer_setup(&phba->eratt_poll, lpfc_poll_eratt, 0);
895427bd 5653 /* Heartbeat timer */
f22eb4d3 5654 timer_setup(&phba->hb_tmofunc, lpfc_hb_timeout, 0);
895427bd
JS		 5655
5656 return 0;
5657}
5658
5659/**
5660 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev
5661 * @phba: pointer to lpfc hba data structure.
5662 *
5663 * This routine is invoked to set up the driver internal resources specific to
5664 * support the SLI-3 HBA device it attached to.
5665 *
5666 * Return codes
5667 * 0 - successful
5668 * other values - error
5669 **/
5670static int
5671lpfc_sli_driver_resource_setup(struct lpfc_hba *phba)
5672{
5673 int rc;
5674
5675 /*
5676 * Initialize timers used by driver
5677 */
5678
5679 /* FCP polling mode timer */
f22eb4d3 5680 timer_setup(&phba->fcp_poll_timer, lpfc_poll_timeout, 0);
dea3101e 5681
3772a991
JS		 5682 /* Host attention work mask setup */
5683 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT);
5684 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
dea3101e 5685
3772a991
JS		 5686 /* Get all the module params for configuring this host */
5687 lpfc_get_cfgparam(phba);
895427bd
JS		 5688 /* Set up phase-1 common device driver resources */
5689
5690 rc = lpfc_setup_driver_resource_phase1(phba);
5691 if (rc)
5692 return -ENODEV;
5693
49198b37
JS		 5694 if (phba->pcidev->device == PCI_DEVICE_ID_HORNET) {
5695 phba->menlo_flag |= HBA_MENLO_SUPPORT;
5696 /* check for menlo minimum sg count */
5697 if (phba->cfg_sg_seg_cnt < LPFC_DEFAULT_MENLO_SG_SEG_CNT)
5698 phba->cfg_sg_seg_cnt = LPFC_DEFAULT_MENLO_SG_SEG_CNT;
5699 }
5700
895427bd
JS		 5701 if (!phba->sli.sli3_ring)
5702 phba->sli.sli3_ring = kzalloc(LPFC_SLI3_MAX_RING *
2a76a283 5703 sizeof(struct lpfc_sli_ring), GFP_KERNEL);
895427bd 5704 if (!phba->sli.sli3_ring)
2a76a283
JS		 5705 return -ENOMEM;
5706
dea3101e 5707 /*
96f7077f 5708 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size
3772a991 5709 * used to create the sg_dma_buf_pool must be dynamically calculated.
dea3101e 5710 */
3772a991 5711
96f7077f
JS		 5712 /* Initialize the host templates the configured values. */
5713 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96418b5e
JS		 5714 lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt;
5715 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f
JS		 5716
5717 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */
3772a991 5718 if (phba->cfg_enable_bg) {
96f7077f
JS		 5719 /*
5720 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd,
5721 * the FCP rsp, and a BDE for each. Sice we have no control
5722 * over how many protection data segments the SCSI Layer
5723 * will hand us (ie: there could be one for every block
5724 * in the IO), we just allocate enough BDEs to accomidate
5725 * our max amount and we need to limit lpfc_sg_seg_cnt to
5726 * minimize the risk of running out.
5727 */
5728 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5729 sizeof(struct fcp_rsp) +
5730 (LPFC_MAX_SG_SEG_CNT * sizeof(struct ulp_bde64));
5731
5732 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF)
5733 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF;
5734
5735 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */
5736 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT;
5737 } else {
5738 /*
5739 * The scsi_buf for a regular I/O will hold the FCP cmnd,
5740 * the FCP rsp, a BDE for each, and a BDE for up to
5741 * cfg_sg_seg_cnt data segments.
5742 */
5743 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5744 sizeof(struct fcp_rsp) +
5745 ((phba->cfg_sg_seg_cnt + 2) * sizeof(struct ulp_bde64));
5746
5747 /* Total BDEs in BPL for scsi_sg_list */
5748 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
901a920f 5749 }
dea3101e 5750
96f7077f
JS		 5751 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5752 "9088 sg_tablesize:%d dmabuf_size:%d total_bde:%d\n",
5753 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5754 phba->cfg_total_seg_cnt);
dea3101e 5755
3772a991
JS		 5756 phba->max_vpi = LPFC_MAX_VPI;
5757 /* This will be set to correct value after config_port mbox */
5758 phba->max_vports = 0;
dea3101e 5759
3772a991
JS		 5760 /*
5761 * Initialize the SLI Layer to run with lpfc HBAs.
5762 */
5763 lpfc_sli_setup(phba);
895427bd 5764 lpfc_sli_queue_init(phba);
ed957684 5765
3772a991
JS		 5766 /* Allocate device driver memory */
5767 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ))
5768 return -ENOMEM;
51ef4c26 5769
912e3acd
JS		 5770 /*
5771 * Enable sr-iov virtual functions if supported and configured
5772 * through the module parameter.
5773 */
5774 if (phba->cfg_sriov_nr_virtfn > 0) {
5775 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
5776 phba->cfg_sriov_nr_virtfn);
5777 if (rc) {
5778 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5779 "2808 Requested number of SR-IOV "
5780 "virtual functions (%d) is not "
5781 "supported\n",
5782 phba->cfg_sriov_nr_virtfn);
5783 phba->cfg_sriov_nr_virtfn = 0;
5784 }
5785 }
5786
3772a991
JS		 5787 return 0;
5788}
ed957684 5789
3772a991
JS		 5790/**
5791 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev
5792 * @phba: pointer to lpfc hba data structure.
5793 *
5794 * This routine is invoked to unset the driver internal resources set up
5795 * specific for supporting the SLI-3 HBA device it attached to.
5796 **/
5797static void
5798lpfc_sli_driver_resource_unset(struct lpfc_hba *phba)
5799{
5800 /* Free device driver memory allocated */
5801 lpfc_mem_free_all(phba);
3163f725 5802
3772a991
JS		 5803 return;
5804}
dea3101e 5805
3772a991 5806/**
da0436e9 5807 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev
3772a991
JS		 5808 * @phba: pointer to lpfc hba data structure.
5809 *
da0436e9
JS		 5810 * This routine is invoked to set up the driver internal resources specific to
5811 * support the SLI-4 HBA device it attached to.
3772a991
JS		 5812 *
5813 * Return codes
af901ca1 5814 * 0 - successful
da0436e9 5815 * other values - error
3772a991
JS		 5816 **/
5817static int
da0436e9 5818lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
3772a991 5819{
28baac74 5820 LPFC_MBOXQ_t *mboxq;
f358dd0c 5821 MAILBOX_t *mb;
895427bd 5822 int rc, i, max_buf_size;
28baac74
JS		 5823 uint8_t pn_page[LPFC_MAX_SUPPORTED_PAGES] = {0};
5824 struct lpfc_mqe *mqe;
09294d46 5825 int longs;
1ba981fd 5826 int fof_vectors = 0;
81e6a637 5827 int extra;
f358dd0c 5828 uint64_t wwn;
da0436e9 5829
895427bd
JS		 5830 phba->sli4_hba.num_online_cpu = num_online_cpus();
5831 phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
5832 phba->sli4_hba.curr_disp_cpu = 0;
5833
716d3bc5
JS		 5834 /* Get all the module params for configuring this host */
5835 lpfc_get_cfgparam(phba);
5836
895427bd
JS		 5837 /* Set up phase-1 common device driver resources */
5838 rc = lpfc_setup_driver_resource_phase1(phba);
5839 if (rc)
5840 return -ENODEV;
5841
da0436e9
JS		 5842 /* Before proceed, wait for POST done and device ready */
5843 rc = lpfc_sli4_post_status_check(phba);
5844 if (rc)
5845 return -ENODEV;
5846
3772a991 5847 /*
da0436e9 5848 * Initialize timers used by driver
3772a991 5849 */
3772a991 5850
f22eb4d3 5851 timer_setup(&phba->rrq_tmr, lpfc_rrq_timeout, 0);
3772a991 5852
ecfd03c6 5853 /* FCF rediscover timer */
f22eb4d3 5854 timer_setup(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo, 0);
ecfd03c6 5855
7ad20aa9
JS		 5856 /*
5857 * Control structure for handling external multi-buffer mailbox
5858 * command pass-through.
5859 */
5860 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0,
5861 sizeof(struct lpfc_mbox_ext_buf_ctx));
5862 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list);
5863
da0436e9 5864 phba->max_vpi = LPFC_MAX_VPI;
67d12733 5865
da0436e9
JS		 5866 /* This will be set to correct value after the read_config mbox */
5867 phba->max_vports = 0;
3772a991 5868
da0436e9
JS		 5869 /* Program the default value of vlan_id and fc_map */
5870 phba->valid_vlan = 0;
5871 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
5872 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
5873 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
3772a991 5874
2a76a283
JS		 5875 /*
5876 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands
895427bd
JS		 5877 * we will associate a new ring, for each EQ/CQ/WQ tuple.
5878 * The WQ create will allocate the ring.
2a76a283 5879 */
09294d46 5880
81e6a637
JS		 5881 /*
5882 * 1 for cmd, 1 for rsp, NVME adds an extra one
5883 * for boundary conditions in its max_sgl_segment template.
5884 */
5885 extra = 2;
5886 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
5887 extra++;
5888
da0436e9 5889 /*
09294d46
JS		 5890 * It doesn't matter what family our adapter is in, we are
5891 * limited to 2 Pages, 512 SGEs, for our SGL.
5892 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp
5893 */
5894 max_buf_size = (2 * SLI4_PAGE_SIZE);
81e6a637
JS		 5895 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SGL_SEG_CNT - extra)
5896 phba->cfg_sg_seg_cnt = LPFC_MAX_SGL_SEG_CNT - extra;
09294d46 5897
da0436e9 5898 /*
895427bd
JS		 5899 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size
5900 * used to create the sg_dma_buf_pool must be calculated.
da0436e9 5901 */
96f7077f
JS		 5902 if (phba->cfg_enable_bg) {
5903 /*
895427bd
JS		 5904 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd,
5905 * the FCP rsp, and a SGE. Sice we have no control
5906 * over how many protection segments the SCSI Layer
96f7077f 5907 * will hand us (ie: there could be one for every block
895427bd
JS		 5908 * in the IO), just allocate enough SGEs to accomidate
5909 * our max amount and we need to limit lpfc_sg_seg_cnt
5910 * to minimize the risk of running out.
96f7077f
JS		 5911 */
5912 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd 5913 sizeof(struct fcp_rsp) + max_buf_size;
96f7077f
JS		 5914
5915 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */
5916 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT;
5917
5918 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SLI4_SEG_CNT_DIF)
895427bd
JS		 5919 phba->cfg_sg_seg_cnt =
5920 LPFC_MAX_SG_SLI4_SEG_CNT_DIF;
96f7077f
JS		 5921 } else {
5922 /*
895427bd 5923 * The scsi_buf for a regular I/O holds the FCP cmnd,
96f7077f
JS		 5924 * the FCP rsp, a SGE for each, and a SGE for up to
5925 * cfg_sg_seg_cnt data segments.
5926 */
5927 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd 5928 sizeof(struct fcp_rsp) +
81e6a637 5929 ((phba->cfg_sg_seg_cnt + extra) *
895427bd 5930 sizeof(struct sli4_sge));
96f7077f
JS		 5931
5932 /* Total SGEs for scsi_sg_list */
81e6a637 5933 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + extra;
895427bd 5934
96f7077f 5935 /*
81e6a637 5936 * NOTE: if (phba->cfg_sg_seg_cnt + extra) <= 256 we only
895427bd 5937 * need to post 1 page for the SGL.
96f7077f 5938 */
085c647c 5939 }
acd6859b 5940
96f7077f
JS		 5941 /* Initialize the host templates with the updated values. */
5942 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
5943 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96418b5e 5944 lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f
JS		 5945
5946 if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ)
5947 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ;
5948 else
5949 phba->cfg_sg_dma_buf_size =
5950 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size);
5951
5952 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5953 "9087 sg_tablesize:%d dmabuf_size:%d total_sge:%d\n",
5954 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5955 phba->cfg_total_seg_cnt);
3772a991 5956
da0436e9 5957 /* Initialize buffer queue management fields */
895427bd 5958 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list);
da0436e9
JS		 5959 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc;
5960 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free;
3772a991 5961
da0436e9
JS		 5962 /*
5963 * Initialize the SLI Layer to run with lpfc SLI4 HBAs.
5964 */
895427bd
JS		 5965 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5966 /* Initialize the Abort scsi buffer list used by driver */
5967 spin_lock_init(&phba->sli4_hba.abts_scsi_buf_list_lock);
5968 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
5969 }
5970
5971 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
5972 /* Initialize the Abort nvme buffer list used by driver */
5973 spin_lock_init(&phba->sli4_hba.abts_nvme_buf_list_lock);
5974 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
86c67379 5975 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
a8cf5dfe 5976 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list);
895427bd
JS		 5977 }
5978
da0436e9 5979 /* This abort list used by worker thread */
895427bd 5980 spin_lock_init(&phba->sli4_hba.sgl_list_lock);
a8cf5dfe 5981 spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock);
3772a991 5982
da0436e9 5983 /*
6d368e53 5984 * Initialize driver internal slow-path work queues
da0436e9 5985 */
3772a991 5986
da0436e9
JS		 5987 /* Driver internel slow-path CQ Event pool */
5988 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
5989 /* Response IOCB work queue list */
45ed1190 5990 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
da0436e9
JS		 5991 /* Asynchronous event CQ Event work queue list */
5992 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
5993 /* Fast-path XRI aborted CQ Event work queue list */
5994 INIT_LIST_HEAD(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue);
5995 /* Slow-path XRI aborted CQ Event work queue list */
5996 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
5997 /* Receive queue CQ Event work queue list */
5998 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
5999
6d368e53
JS		 6000 /* Initialize extent block lists. */
6001 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
6002 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
6003 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
6004 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list);
6005
d1f525aa
JS		 6006 /* Initialize mboxq lists. If the early init routines fail
6007 * these lists need to be correctly initialized.
6008 */
6009 INIT_LIST_HEAD(&phba->sli.mboxq);
6010 INIT_LIST_HEAD(&phba->sli.mboxq_cmpl);
6011
448193b5
JS		 6012 /* initialize optic_state to 0xFF */
6013 phba->sli4_hba.lnk_info.optic_state = 0xff;
6014
da0436e9
JS		 6015 /* Allocate device driver memory */
6016 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ);
6017 if (rc)
6018 return -ENOMEM;
6019
2fcee4bf
JS		 6020 /* IF Type 2 ports get initialized now. */
6021 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
6022 LPFC_SLI_INTF_IF_TYPE_2) {
6023 rc = lpfc_pci_function_reset(phba);
895427bd
JS		 6024 if (unlikely(rc)) {
6025 rc = -ENODEV;
6026 goto out_free_mem;
6027 }
946727dc 6028 phba->temp_sensor_support = 1;
2fcee4bf
JS		 6029 }
6030
da0436e9
JS		 6031 /* Create the bootstrap mailbox command */
6032 rc = lpfc_create_bootstrap_mbox(phba);
6033 if (unlikely(rc))
6034 goto out_free_mem;
6035
6036 /* Set up the host's endian order with the device. */
6037 rc = lpfc_setup_endian_order(phba);
6038 if (unlikely(rc))
6039 goto out_free_bsmbx;
6040
6041 /* Set up the hba's configuration parameters. */
6042 rc = lpfc_sli4_read_config(phba);
cff261f6
JS		 6043 if (unlikely(rc))
6044 goto out_free_bsmbx;
6045 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba);
da0436e9
JS		 6046 if (unlikely(rc))
6047 goto out_free_bsmbx;
6048
2fcee4bf
JS		 6049 /* IF Type 0 ports get initialized now. */
6050 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
6051 LPFC_SLI_INTF_IF_TYPE_0) {
6052 rc = lpfc_pci_function_reset(phba);
6053 if (unlikely(rc))
6054 goto out_free_bsmbx;
6055 }
da0436e9 6056
cb5172ea
JS		 6057 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
6058 GFP_KERNEL);
6059 if (!mboxq) {
6060 rc = -ENOMEM;
6061 goto out_free_bsmbx;
6062 }
6063
f358dd0c 6064 /* Check for NVMET being configured */
895427bd 6065 phba->nvmet_support = 0;
f358dd0c
JS		 6066 if (lpfc_enable_nvmet_cnt) {
6067
6068 /* First get WWN of HBA instance */
6069 lpfc_read_nv(phba, mboxq);
6070 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
6071 if (rc != MBX_SUCCESS) {
6072 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6073 "6016 Mailbox failed , mbxCmd x%x "
6074 "READ_NV, mbxStatus x%x\n",
6075 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
6076 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
d1f525aa 6077 mempool_free(mboxq, phba->mbox_mem_pool);
f358dd0c
JS		 6078 rc = -EIO;
6079 goto out_free_bsmbx;
6080 }
6081 mb = &mboxq->u.mb;
6082 memcpy(&wwn, (char *)mb->un.varRDnvp.nodename,
6083 sizeof(uint64_t));
6084 wwn = cpu_to_be64(wwn);
6085 phba->sli4_hba.wwnn.u.name = wwn;
6086 memcpy(&wwn, (char *)mb->un.varRDnvp.portname,
6087 sizeof(uint64_t));
6088 /* wwn is WWPN of HBA instance */
6089 wwn = cpu_to_be64(wwn);
6090 phba->sli4_hba.wwpn.u.name = wwn;
6091
6092 /* Check to see if it matches any module parameter */
6093 for (i = 0; i < lpfc_enable_nvmet_cnt; i++) {
6094 if (wwn == lpfc_enable_nvmet[i]) {
7d708033 6095#if (IS_ENABLED(CONFIG_NVME_TARGET_FC))
3c603be9
JS		 6096 if (lpfc_nvmet_mem_alloc(phba))
6097 break;
6098
6099 phba->nvmet_support = 1; /* a match */
6100
f358dd0c
JS		 6101 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6102 "6017 NVME Target %016llx\n",
6103 wwn);
7d708033
JS		 6104#else
6105 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6106 "6021 Can't enable NVME Target."
6107 " NVME_TARGET_FC infrastructure"
6108 " is not in kernel\n");
6109#endif
3c603be9 6110 break;
f358dd0c
JS		 6111 }
6112 }
6113 }
895427bd
JS		 6114
6115 lpfc_nvme_mod_param_dep(phba);
6116
fedd3b7b 6117 /* Get the Supported Pages if PORT_CAPABILITIES is supported by port. */
cb5172ea
JS		 6118 lpfc_supported_pages(mboxq);
6119 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
fedd3b7b
JS		 6120 if (!rc) {
6121 mqe = &mboxq->u.mqe;
6122 memcpy(&pn_page[0], ((uint8_t *)&mqe->un.supp_pages.word3),
6123 LPFC_MAX_SUPPORTED_PAGES);
6124 for (i = 0; i < LPFC_MAX_SUPPORTED_PAGES; i++) {
6125 switch (pn_page[i]) {
6126 case LPFC_SLI4_PARAMETERS:
6127 phba->sli4_hba.pc_sli4_params.supported = 1;
6128 break;
6129 default:
6130 break;
6131 }
6132 }
6133 /* Read the port's SLI4 Parameters capabilities if supported. */
6134 if (phba->sli4_hba.pc_sli4_params.supported)
6135 rc = lpfc_pc_sli4_params_get(phba, mboxq);
6136 if (rc) {
6137 mempool_free(mboxq, phba->mbox_mem_pool);
6138 rc = -EIO;
6139 goto out_free_bsmbx;
cb5172ea
JS		 6140 }
6141 }
65791f1f 6142
fedd3b7b
JS		 6143 /*
6144 * Get sli4 parameters that override parameters from Port capabilities.
6d368e53
JS		 6145 * If this call fails, it isn't critical unless the SLI4 parameters come
6146 * back in conflict.
fedd3b7b 6147 */
6d368e53
JS		 6148 rc = lpfc_get_sli4_parameters(phba, mboxq);
6149 if (rc) {
6150 if (phba->sli4_hba.extents_in_use &&
6151 phba->sli4_hba.rpi_hdrs_in_use) {
6152 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6153 "2999 Unsupported SLI4 Parameters "
6154 "Extents and RPI headers enabled.\n");
6d368e53 6155 }
895427bd 6156 mempool_free(mboxq, phba->mbox_mem_pool);
5c756065 6157 rc = -EIO;
895427bd 6158 goto out_free_bsmbx;
6d368e53 6159 }
895427bd 6160
cb5172ea 6161 mempool_free(mboxq, phba->mbox_mem_pool);
1ba981fd
JS		 6162
6163 /* Verify OAS is supported */
6164 lpfc_sli4_oas_verify(phba);
6165 if (phba->cfg_fof)
6166 fof_vectors = 1;
6167
5350d872
JS		 6168 /* Verify all the SLI4 queues */
6169 rc = lpfc_sli4_queue_verify(phba);
da0436e9
JS		 6170 if (rc)
6171 goto out_free_bsmbx;
6172
6173 /* Create driver internal CQE event pool */
6174 rc = lpfc_sli4_cq_event_pool_create(phba);
6175 if (rc)
5350d872 6176 goto out_free_bsmbx;
da0436e9 6177
8a9d2e80
JS		 6178 /* Initialize sgl lists per host */
6179 lpfc_init_sgl_list(phba);
6180
6181 /* Allocate and initialize active sgl array */
da0436e9
JS		 6182 rc = lpfc_init_active_sgl_array(phba);
6183 if (rc) {
6184 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6185 "1430 Failed to initialize sgl list.\n");
8a9d2e80 6186 goto out_destroy_cq_event_pool;
da0436e9 6187 }
da0436e9
JS		 6188 rc = lpfc_sli4_init_rpi_hdrs(phba);
6189 if (rc) {
6190 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6191 "1432 Failed to initialize rpi headers.\n");
6192 goto out_free_active_sgl;
6193 }
6194
a93ff37a 6195 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */
0c9ab6f5
JS		 6196 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG;
6197 phba->fcf.fcf_rr_bmask = kzalloc(longs * sizeof(unsigned long),
6198 GFP_KERNEL);
6199 if (!phba->fcf.fcf_rr_bmask) {
6200 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6201 "2759 Failed allocate memory for FCF round "
6202 "robin failover bmask\n");
0558056c 6203 rc = -ENOMEM;
0c9ab6f5
JS		 6204 goto out_remove_rpi_hdrs;
6205 }
6206
895427bd
JS		 6207 phba->sli4_hba.hba_eq_hdl = kcalloc(fof_vectors + phba->io_channel_irqs,
6208 sizeof(struct lpfc_hba_eq_hdl),
6209 GFP_KERNEL);
6210 if (!phba->sli4_hba.hba_eq_hdl) {
67d12733
JS		 6211 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6212 "2572 Failed allocate memory for "
6213 "fast-path per-EQ handle array\n");
6214 rc = -ENOMEM;
6215 goto out_free_fcf_rr_bmask;
da0436e9
JS		 6216 }
6217
895427bd
JS		 6218 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_present_cpu,
6219 sizeof(struct lpfc_vector_map_info),
6220 GFP_KERNEL);
7bb03bbf
JS		 6221 if (!phba->sli4_hba.cpu_map) {
6222 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6223 "3327 Failed allocate memory for msi-x "
6224 "interrupt vector mapping\n");
6225 rc = -ENOMEM;
895427bd 6226 goto out_free_hba_eq_hdl;
7bb03bbf 6227 }
b246de17 6228 if (lpfc_used_cpu == NULL) {
895427bd
JS		 6229 lpfc_used_cpu = kcalloc(lpfc_present_cpu, sizeof(uint16_t),
6230 GFP_KERNEL);
b246de17
JS		 6231 if (!lpfc_used_cpu) {
6232 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6233 "3335 Failed allocate memory for msi-x "
6234 "interrupt vector mapping\n");
6235 kfree(phba->sli4_hba.cpu_map);
6236 rc = -ENOMEM;
895427bd 6237 goto out_free_hba_eq_hdl;
b246de17
JS		 6238 }
6239 for (i = 0; i < lpfc_present_cpu; i++)
6240 lpfc_used_cpu[i] = LPFC_VECTOR_MAP_EMPTY;
6241 }
6242
912e3acd
JS		 6243 /*
6244 * Enable sr-iov virtual functions if supported and configured
6245 * through the module parameter.
6246 */
6247 if (phba->cfg_sriov_nr_virtfn > 0) {
6248 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
6249 phba->cfg_sriov_nr_virtfn);
6250 if (rc) {
6251 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6252 "3020 Requested number of SR-IOV "
6253 "virtual functions (%d) is not "
6254 "supported\n",
6255 phba->cfg_sriov_nr_virtfn);
6256 phba->cfg_sriov_nr_virtfn = 0;
6257 }
6258 }
6259
5248a749 6260 return 0;
da0436e9 6261
895427bd
JS		 6262out_free_hba_eq_hdl:
6263 kfree(phba->sli4_hba.hba_eq_hdl);
0c9ab6f5
JS		 6264out_free_fcf_rr_bmask:
6265 kfree(phba->fcf.fcf_rr_bmask);
da0436e9
JS		 6266out_remove_rpi_hdrs:
6267 lpfc_sli4_remove_rpi_hdrs(phba);
6268out_free_active_sgl:
6269 lpfc_free_active_sgl(phba);
da0436e9
JS		 6270out_destroy_cq_event_pool:
6271 lpfc_sli4_cq_event_pool_destroy(phba);
da0436e9
JS		 6272out_free_bsmbx:
6273 lpfc_destroy_bootstrap_mbox(phba);
6274out_free_mem:
6275 lpfc_mem_free(phba);
6276 return rc;
6277}
6278
6279/**
6280 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev
6281 * @phba: pointer to lpfc hba data structure.
6282 *
6283 * This routine is invoked to unset the driver internal resources set up
6284 * specific for supporting the SLI-4 HBA device it attached to.
6285 **/
6286static void
6287lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
6288{
6289 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry;
6290
7bb03bbf
JS		 6291 /* Free memory allocated for msi-x interrupt vector to CPU mapping */
6292 kfree(phba->sli4_hba.cpu_map);
6293 phba->sli4_hba.num_present_cpu = 0;
6294 phba->sli4_hba.num_online_cpu = 0;
76fd07a6 6295 phba->sli4_hba.curr_disp_cpu = 0;
7bb03bbf 6296
da0436e9 6297 /* Free memory allocated for fast-path work queue handles */
895427bd 6298 kfree(phba->sli4_hba.hba_eq_hdl);
da0436e9
JS		 6299
6300 /* Free the allocated rpi headers. */
6301 lpfc_sli4_remove_rpi_hdrs(phba);
d11e31dd 6302 lpfc_sli4_remove_rpis(phba);
da0436e9 6303
0c9ab6f5
JS		 6304 /* Free eligible FCF index bmask */
6305 kfree(phba->fcf.fcf_rr_bmask);
6306
da0436e9
JS		 6307 /* Free the ELS sgl list */
6308 lpfc_free_active_sgl(phba);
8a9d2e80 6309 lpfc_free_els_sgl_list(phba);
f358dd0c 6310 lpfc_free_nvmet_sgl_list(phba);
da0436e9 6311
da0436e9
JS		 6312 /* Free the completion queue EQ event pool */
6313 lpfc_sli4_cq_event_release_all(phba);
6314 lpfc_sli4_cq_event_pool_destroy(phba);
6315
6d368e53
JS		 6316 /* Release resource identifiers. */
6317 lpfc_sli4_dealloc_resource_identifiers(phba);
6318
da0436e9
JS		 6319 /* Free the bsmbx region. */
6320 lpfc_destroy_bootstrap_mbox(phba);
6321
6322 /* Free the SLI Layer memory with SLI4 HBAs */
6323 lpfc_mem_free_all(phba);
6324
6325 /* Free the current connect table */
6326 list_for_each_entry_safe(conn_entry, next_conn_entry,
4d9ab994
JS		 6327 &phba->fcf_conn_rec_list, list) {
6328 list_del_init(&conn_entry->list);
da0436e9 6329 kfree(conn_entry);
4d9ab994 6330 }
da0436e9
JS		 6331
6332 return;
6333}
6334
6335/**
25985edc 6336 * lpfc_init_api_table_setup - Set up init api function jump table
da0436e9
JS		 6337 * @phba: The hba struct for which this call is being executed.
6338 * @dev_grp: The HBA PCI-Device group number.
6339 *
6340 * This routine sets up the device INIT interface API function jump table
6341 * in @phba struct.
6342 *
6343 * Returns: 0 - success, -ENODEV - failure.
6344 **/
6345int
6346lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
6347{
84d1b006
JS		 6348 phba->lpfc_hba_init_link = lpfc_hba_init_link;
6349 phba->lpfc_hba_down_link = lpfc_hba_down_link;
7f86059a 6350 phba->lpfc_selective_reset = lpfc_selective_reset;
da0436e9
JS		 6351 switch (dev_grp) {
6352 case LPFC_PCI_DEV_LP:
6353 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3;
6354 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3;
6355 phba->lpfc_stop_port = lpfc_stop_port_s3;
6356 break;
6357 case LPFC_PCI_DEV_OC:
6358 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4;
6359 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4;
6360 phba->lpfc_stop_port = lpfc_stop_port_s4;
6361 break;
6362 default:
6363 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6364 "1431 Invalid HBA PCI-device group: 0x%x\n",
6365 dev_grp);
6366 return -ENODEV;
6367 break;
6368 }
6369 return 0;
6370}
6371
da0436e9
JS		 6372/**
6373 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources.
6374 * @phba: pointer to lpfc hba data structure.
6375 *
6376 * This routine is invoked to set up the driver internal resources after the
6377 * device specific resource setup to support the HBA device it attached to.
6378 *
6379 * Return codes
af901ca1 6380 * 0 - successful
da0436e9
JS		 6381 * other values - error
6382 **/
6383static int
6384lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba)
6385{
6386 int error;
6387
6388 /* Startup the kernel thread for this host adapter. */
6389 phba->worker_thread = kthread_run(lpfc_do_work, phba,
6390 "lpfc_worker_%d", phba->brd_no);
6391 if (IS_ERR(phba->worker_thread)) {
6392 error = PTR_ERR(phba->worker_thread);
6393 return error;
3772a991
JS		 6394 }
6395
f485c18d
DK		 6396 /* workqueue for deferred irq use */
6397 phba->wq = alloc_workqueue("lpfc_wq", WQ_MEM_RECLAIM, 0);
6398
3772a991
JS		 6399 return 0;
6400}
6401
6402/**
6403 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources.
6404 * @phba: pointer to lpfc hba data structure.
6405 *
6406 * This routine is invoked to unset the driver internal resources set up after
6407 * the device specific resource setup for supporting the HBA device it
6408 * attached to.
6409 **/
6410static void
6411lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba)
6412{
f485c18d
DK		 6413 if (phba->wq) {
6414 flush_workqueue(phba->wq);
6415 destroy_workqueue(phba->wq);
6416 phba->wq = NULL;
6417 }
6418
3772a991
JS		 6419 /* Stop kernel worker thread */
6420 kthread_stop(phba->worker_thread);
6421}
6422
6423/**
6424 * lpfc_free_iocb_list - Free iocb list.
6425 * @phba: pointer to lpfc hba data structure.
6426 *
6427 * This routine is invoked to free the driver's IOCB list and memory.
6428 **/
6c621a22 6429void
3772a991
JS		 6430lpfc_free_iocb_list(struct lpfc_hba *phba)
6431{
6432 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
6433
6434 spin_lock_irq(&phba->hbalock);
6435 list_for_each_entry_safe(iocbq_entry, iocbq_next,
6436 &phba->lpfc_iocb_list, list) {
6437 list_del(&iocbq_entry->list);
6438 kfree(iocbq_entry);
6439 phba->total_iocbq_bufs--;
98c9ea5c 6440 }
3772a991
JS		 6441 spin_unlock_irq(&phba->hbalock);
6442
6443 return;
6444}
6445
6446/**
6447 * lpfc_init_iocb_list - Allocate and initialize iocb list.
6448 * @phba: pointer to lpfc hba data structure.
6449 *
6450 * This routine is invoked to allocate and initizlize the driver's IOCB
6451 * list and set up the IOCB tag array accordingly.
6452 *
6453 * Return codes
af901ca1 6454 * 0 - successful
3772a991
JS		 6455 * other values - error
6456 **/
6c621a22 6457int
3772a991
JS		 6458lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count)
6459{
6460 struct lpfc_iocbq *iocbq_entry = NULL;
6461 uint16_t iotag;
6462 int i;
dea3101e 6463
6464 /* Initialize and populate the iocb list per host. */
6465 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
3772a991 6466 for (i = 0; i < iocb_count; i++) {
dd00cc48 6467 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
dea3101e 6468 if (iocbq_entry == NULL) {
6469 printk(KERN_ERR "%s: only allocated %d iocbs of "
6470 "expected %d count. Unloading driver.\n",
cadbd4a5 6471 __func__, i, LPFC_IOCB_LIST_CNT);
dea3101e 6472 goto out_free_iocbq;
6473 }
6474
604a3e30
JB		 6475 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
6476 if (iotag == 0) {
3772a991 6477 kfree(iocbq_entry);
604a3e30 6478 printk(KERN_ERR "%s: failed to allocate IOTAG. "
3772a991 6479 "Unloading driver.\n", __func__);
604a3e30
JB		 6480 goto out_free_iocbq;
6481 }
6d368e53 6482 iocbq_entry->sli4_lxritag = NO_XRI;
3772a991 6483 iocbq_entry->sli4_xritag = NO_XRI;
2e0fef85
JS		 6484
6485 spin_lock_irq(&phba->hbalock);
dea3101e 6486 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
6487 phba->total_iocbq_bufs++;
2e0fef85 6488 spin_unlock_irq(&phba->hbalock);
dea3101e 6489 }
6490
3772a991 6491 return 0;
dea3101e 6492
3772a991
JS		 6493out_free_iocbq:
6494 lpfc_free_iocb_list(phba);
dea3101e 6495
3772a991
JS		 6496 return -ENOMEM;
6497}
5e9d9b82 6498
3772a991 6499/**
8a9d2e80 6500 * lpfc_free_sgl_list - Free a given sgl list.
da0436e9 6501 * @phba: pointer to lpfc hba data structure.
8a9d2e80 6502 * @sglq_list: pointer to the head of sgl list.
3772a991 6503 *
8a9d2e80 6504 * This routine is invoked to free a give sgl list and memory.
3772a991 6505 **/
8a9d2e80
JS		 6506void
6507lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list)
3772a991 6508{
da0436e9 6509 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8a9d2e80
JS		 6510
6511 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) {
6512 list_del(&sglq_entry->list);
6513 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys);
6514 kfree(sglq_entry);
6515 }
6516}
6517
6518/**
6519 * lpfc_free_els_sgl_list - Free els sgl list.
6520 * @phba: pointer to lpfc hba data structure.
6521 *
6522 * This routine is invoked to free the driver's els sgl list and memory.
6523 **/
6524static void
6525lpfc_free_els_sgl_list(struct lpfc_hba *phba)
6526{
da0436e9 6527 LIST_HEAD(sglq_list);
dea3101e 6528
8a9d2e80 6529 /* Retrieve all els sgls from driver list */
da0436e9 6530 spin_lock_irq(&phba->hbalock);
895427bd
JS		 6531 spin_lock(&phba->sli4_hba.sgl_list_lock);
6532 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list);
6533 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9 6534 spin_unlock_irq(&phba->hbalock);
dea3101e 6535
8a9d2e80
JS		 6536 /* Now free the sgl list */
6537 lpfc_free_sgl_list(phba, &sglq_list);
da0436e9 6538}
92d7f7b0 6539
f358dd0c
JS		 6540/**
6541 * lpfc_free_nvmet_sgl_list - Free nvmet sgl list.
6542 * @phba: pointer to lpfc hba data structure.
6543 *
6544 * This routine is invoked to free the driver's nvmet sgl list and memory.
6545 **/
6546static void
6547lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba)
6548{
6549 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
6550 LIST_HEAD(sglq_list);
6551
6552 /* Retrieve all nvmet sgls from driver list */
6553 spin_lock_irq(&phba->hbalock);
6554 spin_lock(&phba->sli4_hba.sgl_list_lock);
6555 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list);
6556 spin_unlock(&phba->sli4_hba.sgl_list_lock);
6557 spin_unlock_irq(&phba->hbalock);
6558
6559 /* Now free the sgl list */
6560 list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) {
6561 list_del(&sglq_entry->list);
6562 lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys);
6563 kfree(sglq_entry);
6564 }
4b40d02b
DK		 6565
6566 /* Update the nvmet_xri_cnt to reflect no current sgls.
6567 * The next initialization cycle sets the count and allocates
6568 * the sgls over again.
6569 */
6570 phba->sli4_hba.nvmet_xri_cnt = 0;
f358dd0c
JS		 6571}
6572
da0436e9
JS		 6573/**
6574 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs.
6575 * @phba: pointer to lpfc hba data structure.
6576 *
6577 * This routine is invoked to allocate the driver's active sgl memory.
6578 * This array will hold the sglq_entry's for active IOs.
6579 **/
6580static int
6581lpfc_init_active_sgl_array(struct lpfc_hba *phba)
6582{
6583 int size;
6584 size = sizeof(struct lpfc_sglq *);
6585 size *= phba->sli4_hba.max_cfg_param.max_xri;
6586
6587 phba->sli4_hba.lpfc_sglq_active_list =
6588 kzalloc(size, GFP_KERNEL);
6589 if (!phba->sli4_hba.lpfc_sglq_active_list)
6590 return -ENOMEM;
6591 return 0;
3772a991
JS		 6592}
6593
6594/**
da0436e9 6595 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs.
3772a991
JS		 6596 * @phba: pointer to lpfc hba data structure.
6597 *
da0436e9
JS		 6598 * This routine is invoked to walk through the array of active sglq entries
6599 * and free all of the resources.
6600 * This is just a place holder for now.
3772a991
JS		 6601 **/
6602static void
da0436e9 6603lpfc_free_active_sgl(struct lpfc_hba *phba)
3772a991 6604{
da0436e9 6605 kfree(phba->sli4_hba.lpfc_sglq_active_list);
3772a991
JS		 6606}
6607
6608/**
da0436e9 6609 * lpfc_init_sgl_list - Allocate and initialize sgl list.
3772a991
JS		 6610 * @phba: pointer to lpfc hba data structure.
6611 *
da0436e9
JS		 6612 * This routine is invoked to allocate and initizlize the driver's sgl
6613 * list and set up the sgl xritag tag array accordingly.
3772a991 6614 *
3772a991 6615 **/
8a9d2e80 6616static void
da0436e9 6617lpfc_init_sgl_list(struct lpfc_hba *phba)
3772a991 6618{
da0436e9 6619 /* Initialize and populate the sglq list per host/VF. */
895427bd 6620 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list);
da0436e9 6621 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c 6622 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list);
86c67379 6623 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
da0436e9 6624
8a9d2e80
JS		 6625 /* els xri-sgl book keeping */
6626 phba->sli4_hba.els_xri_cnt = 0;
0ff10d46 6627
8a9d2e80 6628 /* scsi xri-buffer book keeping */
da0436e9 6629 phba->sli4_hba.scsi_xri_cnt = 0;
895427bd
JS		 6630
6631 /* nvme xri-buffer book keeping */
6632 phba->sli4_hba.nvme_xri_cnt = 0;
da0436e9
JS		 6633}
6634
6635/**
6636 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port
6637 * @phba: pointer to lpfc hba data structure.
6638 *
6639 * This routine is invoked to post rpi header templates to the
88a2cfbb 6640 * port for those SLI4 ports that do not support extents. This routine
da0436e9 6641 * posts a PAGE_SIZE memory region to the port to hold up to
88a2cfbb
JS		 6642 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine
6643 * and should be called only when interrupts are disabled.
da0436e9
JS		 6644 *
6645 * Return codes
af901ca1 6646 * 0 - successful
88a2cfbb 6647 * -ERROR - otherwise.
da0436e9
JS		 6648 **/
6649int
6650lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba)
6651{
6652 int rc = 0;
da0436e9
JS		 6653 struct lpfc_rpi_hdr *rpi_hdr;
6654
6655 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
ff78d8f9 6656 if (!phba->sli4_hba.rpi_hdrs_in_use)
6d368e53 6657 return rc;
6d368e53
JS		 6658 if (phba->sli4_hba.extents_in_use)
6659 return -EIO;
da0436e9
JS		 6660
6661 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
6662 if (!rpi_hdr) {
6663 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
6664 "0391 Error during rpi post operation\n");
6665 lpfc_sli4_remove_rpis(phba);
6666 rc = -ENODEV;
6667 }
6668
6669 return rc;
6670}
6671
6672/**
6673 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region
6674 * @phba: pointer to lpfc hba data structure.
6675 *
6676 * This routine is invoked to allocate a single 4KB memory region to
6677 * support rpis and stores them in the phba. This single region
6678 * provides support for up to 64 rpis. The region is used globally
6679 * by the device.
6680 *
6681 * Returns:
6682 * A valid rpi hdr on success.
6683 * A NULL pointer on any failure.
6684 **/
6685struct lpfc_rpi_hdr *
6686lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba)
6687{
6688 uint16_t rpi_limit, curr_rpi_range;
6689 struct lpfc_dmabuf *dmabuf;
6690 struct lpfc_rpi_hdr *rpi_hdr;
6691
6d368e53
JS		 6692 /*
6693 * If the SLI4 port supports extents, posting the rpi header isn't
6694 * required. Set the expected maximum count and let the actual value
6695 * get set when extents are fully allocated.
6696 */
6697 if (!phba->sli4_hba.rpi_hdrs_in_use)
6698 return NULL;
6699 if (phba->sli4_hba.extents_in_use)
6700 return NULL;
6701
6702 /* The limit on the logical index is just the max_rpi count. */
845d9e8d 6703 rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi;
da0436e9
JS		 6704
6705 spin_lock_irq(&phba->hbalock);
6d368e53
JS		 6706 /*
6707 * Establish the starting RPI in this header block. The starting
6708 * rpi is normalized to a zero base because the physical rpi is
6709 * port based.
6710 */
97f2ecf1 6711 curr_rpi_range = phba->sli4_hba.next_rpi;
da0436e9
JS		 6712 spin_unlock_irq(&phba->hbalock);
6713
845d9e8d
JS		 6714 /* Reached full RPI range */
6715 if (curr_rpi_range == rpi_limit)
6d368e53 6716 return NULL;
845d9e8d 6717
da0436e9
JS		 6718 /*
6719 * First allocate the protocol header region for the port. The
6720 * port expects a 4KB DMA-mapped memory region that is 4K aligned.
6721 */
6722 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
6723 if (!dmabuf)
6724 return NULL;
6725
1aee383d
JP		 6726 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev,
6727 LPFC_HDR_TEMPLATE_SIZE,
6728 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS		 6729 if (!dmabuf->virt) {
6730 rpi_hdr = NULL;
6731 goto err_free_dmabuf;
6732 }
6733
da0436e9
JS		 6734 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) {
6735 rpi_hdr = NULL;
6736 goto err_free_coherent;
6737 }
6738
6739 /* Save the rpi header data for cleanup later. */
6740 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL);
6741 if (!rpi_hdr)
6742 goto err_free_coherent;
6743
6744 rpi_hdr->dmabuf = dmabuf;
6745 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE;
6746 rpi_hdr->page_count = 1;
6747 spin_lock_irq(&phba->hbalock);
6d368e53
JS		 6748
6749 /* The rpi_hdr stores the logical index only. */
6750 rpi_hdr->start_rpi = curr_rpi_range;
845d9e8d 6751 rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT;
da0436e9
JS		 6752 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
6753
da0436e9
JS		 6754 spin_unlock_irq(&phba->hbalock);
6755 return rpi_hdr;
6756
6757 err_free_coherent:
6758 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE,
6759 dmabuf->virt, dmabuf->phys);
6760 err_free_dmabuf:
6761 kfree(dmabuf);
6762 return NULL;
6763}
6764
6765/**
6766 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions
6767 * @phba: pointer to lpfc hba data structure.
6768 *
6769 * This routine is invoked to remove all memory resources allocated
6d368e53
JS		 6770 * to support rpis for SLI4 ports not supporting extents. This routine
6771 * presumes the caller has released all rpis consumed by fabric or port
6772 * logins and is prepared to have the header pages removed.
da0436e9
JS		 6773 **/
6774void
6775lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba)
6776{
6777 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr;
6778
6d368e53
JS		 6779 if (!phba->sli4_hba.rpi_hdrs_in_use)
6780 goto exit;
6781
da0436e9
JS		 6782 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr,
6783 &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
6784 list_del(&rpi_hdr->list);
6785 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len,
6786 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys);
6787 kfree(rpi_hdr->dmabuf);
6788 kfree(rpi_hdr);
6789 }
6d368e53
JS		 6790 exit:
6791 /* There are no rpis available to the port now. */
6792 phba->sli4_hba.next_rpi = 0;
da0436e9
JS		 6793}
6794
6795/**
6796 * lpfc_hba_alloc - Allocate driver hba data structure for a device.
6797 * @pdev: pointer to pci device data structure.
6798 *
6799 * This routine is invoked to allocate the driver hba data structure for an
6800 * HBA device. If the allocation is successful, the phba reference to the
6801 * PCI device data structure is set.
6802 *
6803 * Return codes
af901ca1 6804 * pointer to @phba - successful
da0436e9
JS		 6805 * NULL - error
6806 **/
6807static struct lpfc_hba *
6808lpfc_hba_alloc(struct pci_dev *pdev)
6809{
6810 struct lpfc_hba *phba;
6811
6812 /* Allocate memory for HBA structure */
6813 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL);
6814 if (!phba) {
e34ccdfe 6815 dev_err(&pdev->dev, "failed to allocate hba struct\n");
da0436e9
JS		 6816 return NULL;
6817 }
6818
6819 /* Set reference to PCI device in HBA structure */
6820 phba->pcidev = pdev;
6821
6822 /* Assign an unused board number */
6823 phba->brd_no = lpfc_get_instance();
6824 if (phba->brd_no < 0) {
6825 kfree(phba);
6826 return NULL;
6827 }
65791f1f 6828 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL;
da0436e9 6829
4fede78f 6830 spin_lock_init(&phba->ct_ev_lock);
f1c3b0fc
JS		 6831 INIT_LIST_HEAD(&phba->ct_ev_waiters);
6832
da0436e9
JS		 6833 return phba;
6834}
6835
6836/**
6837 * lpfc_hba_free - Free driver hba data structure with a device.
6838 * @phba: pointer to lpfc hba data structure.
6839 *
6840 * This routine is invoked to free the driver hba data structure with an
6841 * HBA device.
6842 **/
6843static void
6844lpfc_hba_free(struct lpfc_hba *phba)
6845{
6846 /* Release the driver assigned board number */
6847 idr_remove(&lpfc_hba_index, phba->brd_no);
6848
895427bd
JS		 6849 /* Free memory allocated with sli3 rings */
6850 kfree(phba->sli.sli3_ring);
6851 phba->sli.sli3_ring = NULL;
2a76a283 6852
da0436e9
JS		 6853 kfree(phba);
6854 return;
6855}
6856
6857/**
6858 * lpfc_create_shost - Create hba physical port with associated scsi host.
6859 * @phba: pointer to lpfc hba data structure.
6860 *
6861 * This routine is invoked to create HBA physical port and associate a SCSI
6862 * host with it.
6863 *
6864 * Return codes
af901ca1 6865 * 0 - successful
da0436e9
JS		 6866 * other values - error
6867 **/
6868static int
6869lpfc_create_shost(struct lpfc_hba *phba)
6870{
6871 struct lpfc_vport *vport;
6872 struct Scsi_Host *shost;
6873
6874 /* Initialize HBA FC structure */
6875 phba->fc_edtov = FF_DEF_EDTOV;
6876 phba->fc_ratov = FF_DEF_RATOV;
6877 phba->fc_altov = FF_DEF_ALTOV;
6878 phba->fc_arbtov = FF_DEF_ARBTOV;
6879
d7c47992 6880 atomic_set(&phba->sdev_cnt, 0);
2cee7808
JS		 6881 atomic_set(&phba->fc4ScsiInputRequests, 0);
6882 atomic_set(&phba->fc4ScsiOutputRequests, 0);
6883 atomic_set(&phba->fc4ScsiControlRequests, 0);
6884 atomic_set(&phba->fc4ScsiIoCmpls, 0);
6885 atomic_set(&phba->fc4NvmeInputRequests, 0);
6886 atomic_set(&phba->fc4NvmeOutputRequests, 0);
6887 atomic_set(&phba->fc4NvmeControlRequests, 0);
6888 atomic_set(&phba->fc4NvmeIoCmpls, 0);
6889 atomic_set(&phba->fc4NvmeLsRequests, 0);
6890 atomic_set(&phba->fc4NvmeLsCmpls, 0);
da0436e9
JS		 6891 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev);
6892 if (!vport)
6893 return -ENODEV;
6894
6895 shost = lpfc_shost_from_vport(vport);
6896 phba->pport = vport;
2ea259ee 6897
f358dd0c
JS		 6898 if (phba->nvmet_support) {
6899 /* Only 1 vport (pport) will support NVME target */
6900 if (phba->txrdy_payload_pool == NULL) {
771db5c0
RP		 6901 phba->txrdy_payload_pool = dma_pool_create(
6902 "txrdy_pool", &phba->pcidev->dev,
f358dd0c
JS		 6903 TXRDY_PAYLOAD_LEN, 16, 0);
6904 if (phba->txrdy_payload_pool) {
6905 phba->targetport = NULL;
6906 phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME;
6907 lpfc_printf_log(phba, KERN_INFO,
6908 LOG_INIT | LOG_NVME_DISC,
6909 "6076 NVME Target Found\n");
6910 }
6911 }
6912 }
6913
da0436e9
JS		 6914 lpfc_debugfs_initialize(vport);
6915 /* Put reference to SCSI host to driver's device private data */
6916 pci_set_drvdata(phba->pcidev, shost);
2e0fef85 6917
4258e98e
JS		 6918 /*
6919 * At this point we are fully registered with PSA. In addition,
6920 * any initial discovery should be completed.
6921 */
6922 vport->load_flag |= FC_ALLOW_FDMI;
8663cbbe
JS		 6923 if (phba->cfg_enable_SmartSAN ||
6924 (phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT)) {
4258e98e
JS		 6925
6926 /* Setup appropriate attribute masks */
6927 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR;
8663cbbe 6928 if (phba->cfg_enable_SmartSAN)
4258e98e
JS		 6929 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR;
6930 else
6931 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR;
6932 }
3772a991
JS		 6933 return 0;
6934}
db2378e0 6935
3772a991
JS		 6936/**
6937 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host.
6938 * @phba: pointer to lpfc hba data structure.
6939 *
6940 * This routine is invoked to destroy HBA physical port and the associated
6941 * SCSI host.
6942 **/
6943static void
6944lpfc_destroy_shost(struct lpfc_hba *phba)
6945{
6946 struct lpfc_vport *vport = phba->pport;
6947
6948 /* Destroy physical port that associated with the SCSI host */
6949 destroy_port(vport);
6950
6951 return;
6952}
6953
6954/**
6955 * lpfc_setup_bg - Setup Block guard structures and debug areas.
6956 * @phba: pointer to lpfc hba data structure.
6957 * @shost: the shost to be used to detect Block guard settings.
6958 *
6959 * This routine sets up the local Block guard protocol settings for @shost.
6960 * This routine also allocates memory for debugging bg buffers.
6961 **/
6962static void
6963lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost)
6964{
bbeb79b9
JS		 6965 uint32_t old_mask;
6966 uint32_t old_guard;
6967
3772a991 6968 int pagecnt = 10;
b3b98b74 6969 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
3772a991
JS		 6970 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
6971 "1478 Registering BlockGuard with the "
6972 "SCSI layer\n");
bbeb79b9 6973
b3b98b74
JS		 6974 old_mask = phba->cfg_prot_mask;
6975 old_guard = phba->cfg_prot_guard;
bbeb79b9
JS		 6976
6977 /* Only allow supported values */
b3b98b74 6978 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION |
bbeb79b9
JS		 6979 SHOST_DIX_TYPE0_PROTECTION |
6980 SHOST_DIX_TYPE1_PROTECTION);
b3b98b74
JS		 6981 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP |
6982 SHOST_DIX_GUARD_CRC);
bbeb79b9
JS		 6983
6984 /* DIF Type 1 protection for profiles AST1/C1 is end to end */
b3b98b74
JS		 6985 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION)
6986 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION;
bbeb79b9 6987
b3b98b74
JS		 6988 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
6989 if ((old_mask != phba->cfg_prot_mask) ||
6990 (old_guard != phba->cfg_prot_guard))
bbeb79b9
JS		 6991 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6992 "1475 Registering BlockGuard with the "
6993 "SCSI layer: mask %d guard %d\n",
b3b98b74
JS		 6994 phba->cfg_prot_mask,
6995 phba->cfg_prot_guard);
bbeb79b9 6996
b3b98b74
JS		 6997 scsi_host_set_prot(shost, phba->cfg_prot_mask);
6998 scsi_host_set_guard(shost, phba->cfg_prot_guard);
bbeb79b9
JS		 6999 } else
7000 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7001 "1479 Not Registering BlockGuard with the SCSI "
7002 "layer, Bad protection parameters: %d %d\n",
7003 old_mask, old_guard);
3772a991 7004 }
bbeb79b9 7005
3772a991
JS		 7006 if (!_dump_buf_data) {
7007 while (pagecnt) {
7008 spin_lock_init(&_dump_buf_lock);
7009 _dump_buf_data =
7010 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
7011 if (_dump_buf_data) {
6a9c52cf
JS		 7012 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7013 "9043 BLKGRD: allocated %d pages for "
3772a991
JS		 7014 "_dump_buf_data at 0x%p\n",
7015 (1 << pagecnt), _dump_buf_data);
7016 _dump_buf_data_order = pagecnt;
7017 memset(_dump_buf_data, 0,
7018 ((1 << PAGE_SHIFT) << pagecnt));
7019 break;
7020 } else
7021 --pagecnt;
7022 }
7023 if (!_dump_buf_data_order)
6a9c52cf
JS		 7024 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7025 "9044 BLKGRD: ERROR unable to allocate "
3772a991
JS		 7026 "memory for hexdump\n");
7027 } else
6a9c52cf
JS		 7028 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7029 "9045 BLKGRD: already allocated _dump_buf_data=0x%p"
3772a991
JS		 7030 "\n", _dump_buf_data);
7031 if (!_dump_buf_dif) {
7032 while (pagecnt) {
7033 _dump_buf_dif =
7034 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
7035 if (_dump_buf_dif) {
6a9c52cf
JS		 7036 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7037 "9046 BLKGRD: allocated %d pages for "
3772a991
JS		 7038 "_dump_buf_dif at 0x%p\n",
7039 (1 << pagecnt), _dump_buf_dif);
7040 _dump_buf_dif_order = pagecnt;
7041 memset(_dump_buf_dif, 0,
7042 ((1 << PAGE_SHIFT) << pagecnt));
7043 break;
7044 } else
7045 --pagecnt;
7046 }
7047 if (!_dump_buf_dif_order)
6a9c52cf
JS		 7048 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7049 "9047 BLKGRD: ERROR unable to allocate "
3772a991
JS		 7050 "memory for hexdump\n");
7051 } else
6a9c52cf
JS		 7052 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7053 "9048 BLKGRD: already allocated _dump_buf_dif=0x%p\n",
3772a991
JS		 7054 _dump_buf_dif);
7055}
7056
7057/**
7058 * lpfc_post_init_setup - Perform necessary device post initialization setup.
7059 * @phba: pointer to lpfc hba data structure.
7060 *
7061 * This routine is invoked to perform all the necessary post initialization
7062 * setup for the device.
7063 **/
7064static void
7065lpfc_post_init_setup(struct lpfc_hba *phba)
7066{
7067 struct Scsi_Host *shost;
7068 struct lpfc_adapter_event_header adapter_event;
7069
7070 /* Get the default values for Model Name and Description */
7071 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
7072
7073 /*
7074 * hba setup may have changed the hba_queue_depth so we need to
7075 * adjust the value of can_queue.
7076 */
7077 shost = pci_get_drvdata(phba->pcidev);
7078 shost->can_queue = phba->cfg_hba_queue_depth - 10;
7079 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED)
7080 lpfc_setup_bg(phba, shost);
7081
7082 lpfc_host_attrib_init(shost);
7083
7084 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
7085 spin_lock_irq(shost->host_lock);
7086 lpfc_poll_start_timer(phba);
7087 spin_unlock_irq(shost->host_lock);
7088 }
7089
7090 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7091 "0428 Perform SCSI scan\n");
7092 /* Send board arrival event to upper layer */
7093 adapter_event.event_type = FC_REG_ADAPTER_EVENT;
7094 adapter_event.subcategory = LPFC_EVENT_ARRIVAL;
7095 fc_host_post_vendor_event(shost, fc_get_event_number(),
7096 sizeof(adapter_event),
7097 (char *) &adapter_event,
7098 LPFC_NL_VENDOR_ID);
7099 return;
7100}
7101
7102/**
7103 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space.
7104 * @phba: pointer to lpfc hba data structure.
7105 *
7106 * This routine is invoked to set up the PCI device memory space for device
7107 * with SLI-3 interface spec.
7108 *
7109 * Return codes
af901ca1 7110 * 0 - successful
3772a991
JS		 7111 * other values - error
7112 **/
7113static int
7114lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
7115{
7116 struct pci_dev *pdev;
7117 unsigned long bar0map_len, bar2map_len;
7118 int i, hbq_count;
7119 void *ptr;
7120 int error = -ENODEV;
7121
7122 /* Obtain PCI device reference */
7123 if (!phba->pcidev)
7124 return error;
7125 else
7126 pdev = phba->pcidev;
7127
7128 /* Set the device DMA mask size */
8e68597d
MR		 7129 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
7130 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
7131 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
7132 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
3772a991 7133 return error;
8e68597d
MR		 7134 }
7135 }
3772a991
JS		 7136
7137 /* Get the bus address of Bar0 and Bar2 and the number of bytes
7138 * required by each mapping.
7139 */
7140 phba->pci_bar0_map = pci_resource_start(pdev, 0);
7141 bar0map_len = pci_resource_len(pdev, 0);
7142
7143 phba->pci_bar2_map = pci_resource_start(pdev, 2);
7144 bar2map_len = pci_resource_len(pdev, 2);
7145
7146 /* Map HBA SLIM to a kernel virtual address. */
7147 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
7148 if (!phba->slim_memmap_p) {
7149 dev_printk(KERN_ERR, &pdev->dev,
7150 "ioremap failed for SLIM memory.\n");
7151 goto out;
7152 }
7153
7154 /* Map HBA Control Registers to a kernel virtual address. */
7155 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
7156 if (!phba->ctrl_regs_memmap_p) {
7157 dev_printk(KERN_ERR, &pdev->dev,
7158 "ioremap failed for HBA control registers.\n");
7159 goto out_iounmap_slim;
7160 }
7161
7162 /* Allocate memory for SLI-2 structures */
1aee383d
JP		 7163 phba->slim2p.virt = dma_zalloc_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7164 &phba->slim2p.phys, GFP_KERNEL);
3772a991
JS		 7165 if (!phba->slim2p.virt)
7166 goto out_iounmap;
7167
3772a991 7168 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx);
7a470277
JS		 7169 phba->mbox_ext = (phba->slim2p.virt +
7170 offsetof(struct lpfc_sli2_slim, mbx_ext_words));
3772a991
JS		 7171 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb));
7172 phba->IOCBs = (phba->slim2p.virt +
7173 offsetof(struct lpfc_sli2_slim, IOCBs));
7174
7175 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev,
7176 lpfc_sli_hbq_size(),
7177 &phba->hbqslimp.phys,
7178 GFP_KERNEL);
7179 if (!phba->hbqslimp.virt)
7180 goto out_free_slim;
7181
7182 hbq_count = lpfc_sli_hbq_count();
7183 ptr = phba->hbqslimp.virt;
7184 for (i = 0; i < hbq_count; ++i) {
7185 phba->hbqs[i].hbq_virt = ptr;
7186 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list);
7187 ptr += (lpfc_hbq_defs[i]->entry_count *
7188 sizeof(struct lpfc_hbq_entry));
7189 }
7190 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc;
7191 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free;
7192
7193 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size());
7194
3772a991
JS		 7195 phba->MBslimaddr = phba->slim_memmap_p;
7196 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
7197 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
7198 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
7199 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
7200
7201 return 0;
7202
7203out_free_slim:
7204 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7205 phba->slim2p.virt, phba->slim2p.phys);
7206out_iounmap:
7207 iounmap(phba->ctrl_regs_memmap_p);
7208out_iounmap_slim:
7209 iounmap(phba->slim_memmap_p);
7210out:
7211 return error;
7212}
7213
7214/**
7215 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space.
7216 * @phba: pointer to lpfc hba data structure.
7217 *
7218 * This routine is invoked to unset the PCI device memory space for device
7219 * with SLI-3 interface spec.
7220 **/
7221static void
7222lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
7223{
7224 struct pci_dev *pdev;
7225
7226 /* Obtain PCI device reference */
7227 if (!phba->pcidev)
7228 return;
7229 else
7230 pdev = phba->pcidev;
7231
7232 /* Free coherent DMA memory allocated */
7233 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
7234 phba->hbqslimp.virt, phba->hbqslimp.phys);
7235 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7236 phba->slim2p.virt, phba->slim2p.phys);
7237
7238 /* I/O memory unmap */
7239 iounmap(phba->ctrl_regs_memmap_p);
7240 iounmap(phba->slim_memmap_p);
7241
7242 return;
7243}
7244
7245/**
da0436e9 7246 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status
3772a991
JS		 7247 * @phba: pointer to lpfc hba data structure.
7248 *
da0436e9
JS		 7249 * This routine is invoked to wait for SLI4 device Power On Self Test (POST)
7250 * done and check status.
3772a991 7251 *
da0436e9 7252 * Return 0 if successful, otherwise -ENODEV.
3772a991 7253 **/
da0436e9
JS		 7254int
7255lpfc_sli4_post_status_check(struct lpfc_hba *phba)
3772a991 7256{
2fcee4bf
JS		 7257 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg;
7258 struct lpfc_register reg_data;
7259 int i, port_error = 0;
7260 uint32_t if_type;
3772a991 7261
9940b97b
JS		 7262 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
7263 memset(&reg_data, 0, sizeof(reg_data));
2fcee4bf 7264 if (!phba->sli4_hba.PSMPHRregaddr)
da0436e9 7265 return -ENODEV;
3772a991 7266
da0436e9
JS		 7267 /* Wait up to 30 seconds for the SLI Port POST done and ready */
7268 for (i = 0; i < 3000; i++) {
9940b97b
JS		 7269 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
7270 &portsmphr_reg.word0) ||
7271 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) {
2fcee4bf 7272 /* Port has a fatal POST error, break out */
da0436e9
JS		 7273 port_error = -ENODEV;
7274 break;
7275 }
2fcee4bf
JS		 7276 if (LPFC_POST_STAGE_PORT_READY ==
7277 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))
da0436e9 7278 break;
da0436e9 7279 msleep(10);
3772a991
JS		 7280 }
7281
2fcee4bf
JS		 7282 /*
7283 * If there was a port error during POST, then don't proceed with
7284 * other register reads as the data may not be valid. Just exit.
7285 */
7286 if (port_error) {
da0436e9 7287 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2fcee4bf
JS		 7288 "1408 Port Failed POST - portsmphr=0x%x, "
7289 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, "
7290 "scr2=x%x, hscratch=x%x, pstatus=x%x\n",
7291 portsmphr_reg.word0,
7292 bf_get(lpfc_port_smphr_perr, &portsmphr_reg),
7293 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg),
7294 bf_get(lpfc_port_smphr_nip, &portsmphr_reg),
7295 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg),
7296 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg),
7297 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg),
7298 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg),
7299 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg));
7300 } else {
28baac74 7301 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
2fcee4bf
JS		 7302 "2534 Device Info: SLIFamily=0x%x, "
7303 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, "
7304 "SLIHint_2=0x%x, FT=0x%x\n",
28baac74
JS		 7305 bf_get(lpfc_sli_intf_sli_family,
7306 &phba->sli4_hba.sli_intf),
7307 bf_get(lpfc_sli_intf_slirev,
7308 &phba->sli4_hba.sli_intf),
085c647c
JS		 7309 bf_get(lpfc_sli_intf_if_type,
7310 &phba->sli4_hba.sli_intf),
7311 bf_get(lpfc_sli_intf_sli_hint1,
28baac74 7312 &phba->sli4_hba.sli_intf),
085c647c
JS		 7313 bf_get(lpfc_sli_intf_sli_hint2,
7314 &phba->sli4_hba.sli_intf),
7315 bf_get(lpfc_sli_intf_func_type,
28baac74 7316 &phba->sli4_hba.sli_intf));
2fcee4bf
JS		 7317 /*
7318 * Check for other Port errors during the initialization
7319 * process. Fail the load if the port did not come up
7320 * correctly.
7321 */
7322 if_type = bf_get(lpfc_sli_intf_if_type,
7323 &phba->sli4_hba.sli_intf);
7324 switch (if_type) {
7325 case LPFC_SLI_INTF_IF_TYPE_0:
7326 phba->sli4_hba.ue_mask_lo =
7327 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
7328 phba->sli4_hba.ue_mask_hi =
7329 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
7330 uerrlo_reg.word0 =
7331 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
7332 uerrhi_reg.word0 =
7333 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
7334 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
7335 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
7336 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7337 "1422 Unrecoverable Error "
7338 "Detected during POST "
7339 "uerr_lo_reg=0x%x, "
7340 "uerr_hi_reg=0x%x, "
7341 "ue_mask_lo_reg=0x%x, "
7342 "ue_mask_hi_reg=0x%x\n",
7343 uerrlo_reg.word0,
7344 uerrhi_reg.word0,
7345 phba->sli4_hba.ue_mask_lo,
7346 phba->sli4_hba.ue_mask_hi);
7347 port_error = -ENODEV;
7348 }
7349 break;
7350 case LPFC_SLI_INTF_IF_TYPE_2:
7351 /* Final checks. The port status should be clean. */
9940b97b
JS		 7352 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
7353 &reg_data.word0) ||
0558056c
JS		 7354 (bf_get(lpfc_sliport_status_err, &reg_data) &&
7355 !bf_get(lpfc_sliport_status_rn, &reg_data))) {
2fcee4bf
JS		 7356 phba->work_status[0] =
7357 readl(phba->sli4_hba.u.if_type2.
7358 ERR1regaddr);
7359 phba->work_status[1] =
7360 readl(phba->sli4_hba.u.if_type2.
7361 ERR2regaddr);
7362 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8fcb8acd
JS		 7363 "2888 Unrecoverable port error "
7364 "following POST: port status reg "
7365 "0x%x, port_smphr reg 0x%x, "
2fcee4bf
JS		 7366 "error 1=0x%x, error 2=0x%x\n",
7367 reg_data.word0,
7368 portsmphr_reg.word0,
7369 phba->work_status[0],
7370 phba->work_status[1]);
7371 port_error = -ENODEV;
7372 }
7373 break;
7374 case LPFC_SLI_INTF_IF_TYPE_1:
7375 default:
7376 break;
7377 }
28baac74 7378 }
da0436e9
JS		 7379 return port_error;
7380}
3772a991 7381
da0436e9
JS		 7382/**
7383 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map.
7384 * @phba: pointer to lpfc hba data structure.
2fcee4bf 7385 * @if_type: The SLI4 interface type getting configured.
da0436e9
JS		 7386 *
7387 * This routine is invoked to set up SLI4 BAR0 PCI config space register
7388 * memory map.
7389 **/
7390static void
2fcee4bf
JS		 7391lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
7392{
7393 switch (if_type) {
7394 case LPFC_SLI_INTF_IF_TYPE_0:
7395 phba->sli4_hba.u.if_type0.UERRLOregaddr =
7396 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
7397 phba->sli4_hba.u.if_type0.UERRHIregaddr =
7398 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
7399 phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
7400 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
7401 phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
7402 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
7403 phba->sli4_hba.SLIINTFregaddr =
7404 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7405 break;
7406 case LPFC_SLI_INTF_IF_TYPE_2:
0cf07f84
JS		 7407 phba->sli4_hba.u.if_type2.EQDregaddr =
7408 phba->sli4_hba.conf_regs_memmap_p +
7409 LPFC_CTL_PORT_EQ_DELAY_OFFSET;
2fcee4bf 7410 phba->sli4_hba.u.if_type2.ERR1regaddr =
88a2cfbb
JS		 7411 phba->sli4_hba.conf_regs_memmap_p +
7412 LPFC_CTL_PORT_ER1_OFFSET;
2fcee4bf 7413 phba->sli4_hba.u.if_type2.ERR2regaddr =
88a2cfbb
JS		 7414 phba->sli4_hba.conf_regs_memmap_p +
7415 LPFC_CTL_PORT_ER2_OFFSET;
2fcee4bf 7416 phba->sli4_hba.u.if_type2.CTRLregaddr =
88a2cfbb
JS		 7417 phba->sli4_hba.conf_regs_memmap_p +
7418 LPFC_CTL_PORT_CTL_OFFSET;
2fcee4bf 7419 phba->sli4_hba.u.if_type2.STATUSregaddr =
88a2cfbb
JS		 7420 phba->sli4_hba.conf_regs_memmap_p +
7421 LPFC_CTL_PORT_STA_OFFSET;
2fcee4bf
JS		 7422 phba->sli4_hba.SLIINTFregaddr =
7423 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7424 phba->sli4_hba.PSMPHRregaddr =
88a2cfbb
JS		 7425 phba->sli4_hba.conf_regs_memmap_p +
7426 LPFC_CTL_PORT_SEM_OFFSET;
2fcee4bf 7427 phba->sli4_hba.RQDBregaddr =
962bc51b
JS		 7428 phba->sli4_hba.conf_regs_memmap_p +
7429 LPFC_ULP0_RQ_DOORBELL;
2fcee4bf 7430 phba->sli4_hba.WQDBregaddr =
962bc51b
JS		 7431 phba->sli4_hba.conf_regs_memmap_p +
7432 LPFC_ULP0_WQ_DOORBELL;
2fcee4bf
JS		 7433 phba->sli4_hba.EQCQDBregaddr =
7434 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
7435 phba->sli4_hba.MQDBregaddr =
7436 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
7437 phba->sli4_hba.BMBXregaddr =
7438 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
7439 break;
7440 case LPFC_SLI_INTF_IF_TYPE_1:
7441 default:
7442 dev_printk(KERN_ERR, &phba->pcidev->dev,
7443 "FATAL - unsupported SLI4 interface type - %d\n",
7444 if_type);
7445 break;
7446 }
da0436e9 7447}
3772a991 7448
da0436e9
JS		 7449/**
7450 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map.
7451 * @phba: pointer to lpfc hba data structure.
7452 *
7453 * This routine is invoked to set up SLI4 BAR1 control status register (CSR)
7454 * memory map.
7455 **/
7456static void
7457lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba)
7458{
2fcee4bf
JS		 7459 phba->sli4_hba.PSMPHRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
7460 LPFC_SLIPORT_IF0_SMPHR;
da0436e9 7461 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7462 LPFC_HST_ISR0;
da0436e9 7463 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7464 LPFC_HST_IMR0;
da0436e9 7465 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7466 LPFC_HST_ISCR0;
3772a991
JS		 7467}
7468
7469/**
da0436e9 7470 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map.
3772a991 7471 * @phba: pointer to lpfc hba data structure.
da0436e9 7472 * @vf: virtual function number
3772a991 7473 *
da0436e9
JS		 7474 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map
7475 * based on the given viftual function number, @vf.
7476 *
7477 * Return 0 if successful, otherwise -ENODEV.
3772a991 7478 **/
da0436e9
JS		 7479static int
7480lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf)
3772a991 7481{
da0436e9
JS		 7482 if (vf > LPFC_VIR_FUNC_MAX)
7483 return -ENODEV;
3772a991 7484
da0436e9 7485 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS		 7486 vf * LPFC_VFR_PAGE_SIZE +
7487 LPFC_ULP0_RQ_DOORBELL);
da0436e9 7488 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS		 7489 vf * LPFC_VFR_PAGE_SIZE +
7490 LPFC_ULP0_WQ_DOORBELL);
da0436e9
JS		 7491 phba->sli4_hba.EQCQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7492 vf * LPFC_VFR_PAGE_SIZE + LPFC_EQCQ_DOORBELL);
7493 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7494 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL);
7495 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7496 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX);
7497 return 0;
3772a991
JS		 7498}
7499
7500/**
da0436e9 7501 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox
3772a991
JS		 7502 * @phba: pointer to lpfc hba data structure.
7503 *
da0436e9
JS		 7504 * This routine is invoked to create the bootstrap mailbox
7505 * region consistent with the SLI-4 interface spec. This
7506 * routine allocates all memory necessary to communicate
7507 * mailbox commands to the port and sets up all alignment
7508 * needs. No locks are expected to be held when calling
7509 * this routine.
3772a991
JS		 7510 *
7511 * Return codes
af901ca1 7512 * 0 - successful
d439d286 7513 * -ENOMEM - could not allocated memory.
da0436e9 7514 **/
3772a991 7515static int
da0436e9 7516lpfc_create_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7517{
da0436e9
JS		 7518 uint32_t bmbx_size;
7519 struct lpfc_dmabuf *dmabuf;
7520 struct dma_address *dma_address;
7521 uint32_t pa_addr;
7522 uint64_t phys_addr;
7523
7524 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
7525 if (!dmabuf)
7526 return -ENOMEM;
3772a991 7527
da0436e9
JS		 7528 /*
7529 * The bootstrap mailbox region is comprised of 2 parts
7530 * plus an alignment restriction of 16 bytes.
7531 */
7532 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1);
1aee383d
JP		 7533 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev, bmbx_size,
7534 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS		 7535 if (!dmabuf->virt) {
7536 kfree(dmabuf);
7537 return -ENOMEM;
3772a991
JS		 7538 }
7539
da0436e9
JS		 7540 /*
7541 * Initialize the bootstrap mailbox pointers now so that the register
7542 * operations are simple later. The mailbox dma address is required
7543 * to be 16-byte aligned. Also align the virtual memory as each
7544 * maibox is copied into the bmbx mailbox region before issuing the
7545 * command to the port.
7546 */
7547 phba->sli4_hba.bmbx.dmabuf = dmabuf;
7548 phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
7549
7550 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
7551 LPFC_ALIGN_16_BYTE);
7552 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
7553 LPFC_ALIGN_16_BYTE);
7554
7555 /*
7556 * Set the high and low physical addresses now. The SLI4 alignment
7557 * requirement is 16 bytes and the mailbox is posted to the port
7558 * as two 30-bit addresses. The other data is a bit marking whether
7559 * the 30-bit address is the high or low address.
7560 * Upcast bmbx aphys to 64bits so shift instruction compiles
7561 * clean on 32 bit machines.
7562 */
7563 dma_address = &phba->sli4_hba.bmbx.dma_address;
7564 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
7565 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff);
7566 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) |
7567 LPFC_BMBX_BIT1_ADDR_HI);
7568
7569 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
7570 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) |
7571 LPFC_BMBX_BIT1_ADDR_LO);
7572 return 0;
3772a991
JS		 7573}
7574
7575/**
da0436e9 7576 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources
3772a991
JS		 7577 * @phba: pointer to lpfc hba data structure.
7578 *
da0436e9
JS		 7579 * This routine is invoked to teardown the bootstrap mailbox
7580 * region and release all host resources. This routine requires
7581 * the caller to ensure all mailbox commands recovered, no
7582 * additional mailbox comands are sent, and interrupts are disabled
7583 * before calling this routine.
7584 *
7585 **/
3772a991 7586static void
da0436e9 7587lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7588{
da0436e9
JS		 7589 dma_free_coherent(&phba->pcidev->dev,
7590 phba->sli4_hba.bmbx.bmbx_size,
7591 phba->sli4_hba.bmbx.dmabuf->virt,
7592 phba->sli4_hba.bmbx.dmabuf->phys);
7593
7594 kfree(phba->sli4_hba.bmbx.dmabuf);
7595 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
3772a991
JS		 7596}
7597
7598/**
da0436e9 7599 * lpfc_sli4_read_config - Get the config parameters.
3772a991
JS		 7600 * @phba: pointer to lpfc hba data structure.
7601 *
da0436e9
JS		 7602 * This routine is invoked to read the configuration parameters from the HBA.
7603 * The configuration parameters are used to set the base and maximum values
7604 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource
7605 * allocation for the port.
3772a991
JS		 7606 *
7607 * Return codes
af901ca1 7608 * 0 - successful
25985edc 7609 * -ENOMEM - No available memory
d439d286 7610 * -EIO - The mailbox failed to complete successfully.
3772a991 7611 **/
ff78d8f9 7612int
da0436e9 7613lpfc_sli4_read_config(struct lpfc_hba *phba)
3772a991 7614{
da0436e9
JS		 7615 LPFC_MBOXQ_t *pmb;
7616 struct lpfc_mbx_read_config *rd_config;
912e3acd
JS		 7617 union lpfc_sli4_cfg_shdr *shdr;
7618 uint32_t shdr_status, shdr_add_status;
7619 struct lpfc_mbx_get_func_cfg *get_func_cfg;
7620 struct lpfc_rsrc_desc_fcfcoe *desc;
8aa134a8 7621 char *pdesc_0;
c691816e
JS		 7622 uint16_t forced_link_speed;
7623 uint32_t if_type;
8aa134a8 7624 int length, i, rc = 0, rc2;
3772a991 7625
da0436e9
JS		 7626 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
7627 if (!pmb) {
7628 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7629 "2011 Unable to allocate memory for issuing "
7630 "SLI_CONFIG_SPECIAL mailbox command\n");
7631 return -ENOMEM;
3772a991
JS		 7632 }
7633
da0436e9 7634 lpfc_read_config(phba, pmb);
3772a991 7635
da0436e9
JS		 7636 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
7637 if (rc != MBX_SUCCESS) {
7638 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7639 "2012 Mailbox failed , mbxCmd x%x "
7640 "READ_CONFIG, mbxStatus x%x\n",
7641 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7642 bf_get(lpfc_mqe_status, &pmb->u.mqe));
7643 rc = -EIO;
7644 } else {
7645 rd_config = &pmb->u.mqe.un.rd_config;
ff78d8f9
JS		 7646 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) {
7647 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
7648 phba->sli4_hba.lnk_info.lnk_tp =
7649 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config);
7650 phba->sli4_hba.lnk_info.lnk_no =
7651 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config);
7652 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7653 "3081 lnk_type:%d, lnk_numb:%d\n",
7654 phba->sli4_hba.lnk_info.lnk_tp,
7655 phba->sli4_hba.lnk_info.lnk_no);
7656 } else
7657 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
7658 "3082 Mailbox (x%x) returned ldv:x0\n",
7659 bf_get(lpfc_mqe_command, &pmb->u.mqe));
44fd7fe3
JS		 7660 if (bf_get(lpfc_mbx_rd_conf_bbscn_def, rd_config)) {
7661 phba->bbcredit_support = 1;
7662 phba->sli4_hba.bbscn_params.word0 = rd_config->word8;
7663 }
7664
6d368e53
JS		 7665 phba->sli4_hba.extents_in_use =
7666 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config);
da0436e9
JS		 7667 phba->sli4_hba.max_cfg_param.max_xri =
7668 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config);
7669 phba->sli4_hba.max_cfg_param.xri_base =
7670 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config);
7671 phba->sli4_hba.max_cfg_param.max_vpi =
7672 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config);
7673 phba->sli4_hba.max_cfg_param.vpi_base =
7674 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config);
7675 phba->sli4_hba.max_cfg_param.max_rpi =
7676 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config);
7677 phba->sli4_hba.max_cfg_param.rpi_base =
7678 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config);
7679 phba->sli4_hba.max_cfg_param.max_vfi =
7680 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config);
7681 phba->sli4_hba.max_cfg_param.vfi_base =
7682 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config);
7683 phba->sli4_hba.max_cfg_param.max_fcfi =
7684 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config);
da0436e9
JS		 7685 phba->sli4_hba.max_cfg_param.max_eq =
7686 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config);
7687 phba->sli4_hba.max_cfg_param.max_rq =
7688 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config);
7689 phba->sli4_hba.max_cfg_param.max_wq =
7690 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config);
7691 phba->sli4_hba.max_cfg_param.max_cq =
7692 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config);
7693 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config);
7694 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
7695 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
7696 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
5ffc266e
JS		 7697 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
7698 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
da0436e9
JS		 7699 phba->max_vports = phba->max_vpi;
7700 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6d368e53
JS		 7701 "2003 cfg params Extents? %d "
7702 "XRI(B:%d M:%d), "
da0436e9
JS		 7703 "VPI(B:%d M:%d) "
7704 "VFI(B:%d M:%d) "
7705 "RPI(B:%d M:%d) "
2ea259ee 7706 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d\n",
6d368e53 7707 phba->sli4_hba.extents_in_use,
da0436e9
JS		 7708 phba->sli4_hba.max_cfg_param.xri_base,
7709 phba->sli4_hba.max_cfg_param.max_xri,
7710 phba->sli4_hba.max_cfg_param.vpi_base,
7711 phba->sli4_hba.max_cfg_param.max_vpi,
7712 phba->sli4_hba.max_cfg_param.vfi_base,
7713 phba->sli4_hba.max_cfg_param.max_vfi,
7714 phba->sli4_hba.max_cfg_param.rpi_base,
7715 phba->sli4_hba.max_cfg_param.max_rpi,
2ea259ee
JS		 7716 phba->sli4_hba.max_cfg_param.max_fcfi,
7717 phba->sli4_hba.max_cfg_param.max_eq,
7718 phba->sli4_hba.max_cfg_param.max_cq,
7719 phba->sli4_hba.max_cfg_param.max_wq,
7720 phba->sli4_hba.max_cfg_param.max_rq);
7721
3772a991 7722 }
912e3acd
JS		 7723
7724 if (rc)
7725 goto read_cfg_out;
da0436e9 7726
c691816e
JS		 7727 /* Update link speed if forced link speed is supported */
7728 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7729 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
7730 forced_link_speed =
7731 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config);
7732 if (forced_link_speed) {
7733 phba->hba_flag |= HBA_FORCED_LINK_SPEED;
7734
7735 switch (forced_link_speed) {
7736 case LINK_SPEED_1G:
7737 phba->cfg_link_speed =
7738 LPFC_USER_LINK_SPEED_1G;
7739 break;
7740 case LINK_SPEED_2G:
7741 phba->cfg_link_speed =
7742 LPFC_USER_LINK_SPEED_2G;
7743 break;
7744 case LINK_SPEED_4G:
7745 phba->cfg_link_speed =
7746 LPFC_USER_LINK_SPEED_4G;
7747 break;
7748 case LINK_SPEED_8G:
7749 phba->cfg_link_speed =
7750 LPFC_USER_LINK_SPEED_8G;
7751 break;
7752 case LINK_SPEED_10G:
7753 phba->cfg_link_speed =
7754 LPFC_USER_LINK_SPEED_10G;
7755 break;
7756 case LINK_SPEED_16G:
7757 phba->cfg_link_speed =
7758 LPFC_USER_LINK_SPEED_16G;
7759 break;
7760 case LINK_SPEED_32G:
7761 phba->cfg_link_speed =
7762 LPFC_USER_LINK_SPEED_32G;
7763 break;
7764 case 0xffff:
7765 phba->cfg_link_speed =
7766 LPFC_USER_LINK_SPEED_AUTO;
7767 break;
7768 default:
7769 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7770 "0047 Unrecognized link "
7771 "speed : %d\n",
7772 forced_link_speed);
7773 phba->cfg_link_speed =
7774 LPFC_USER_LINK_SPEED_AUTO;
7775 }
7776 }
7777 }
7778
da0436e9 7779 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS		 7780 length = phba->sli4_hba.max_cfg_param.max_xri -
7781 lpfc_sli4_get_els_iocb_cnt(phba);
7782 if (phba->cfg_hba_queue_depth > length) {
7783 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7784 "3361 HBA queue depth changed from %d to %d\n",
7785 phba->cfg_hba_queue_depth, length);
7786 phba->cfg_hba_queue_depth = length;
7787 }
912e3acd
JS		 7788
7789 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
7790 LPFC_SLI_INTF_IF_TYPE_2)
7791 goto read_cfg_out;
7792
7793 /* get the pf# and vf# for SLI4 if_type 2 port */
7794 length = (sizeof(struct lpfc_mbx_get_func_cfg) -
7795 sizeof(struct lpfc_sli4_cfg_mhdr));
7796 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON,
7797 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG,
7798 length, LPFC_SLI4_MBX_EMBED);
7799
8aa134a8 7800 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
912e3acd
JS		 7801 shdr = (union lpfc_sli4_cfg_shdr *)
7802 &pmb->u.mqe.un.sli4_config.header.cfg_shdr;
7803 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
7804 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8aa134a8 7805 if (rc2 || shdr_status || shdr_add_status) {
912e3acd
JS		 7806 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7807 "3026 Mailbox failed , mbxCmd x%x "
7808 "GET_FUNCTION_CONFIG, mbxStatus x%x\n",
7809 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7810 bf_get(lpfc_mqe_status, &pmb->u.mqe));
912e3acd
JS		 7811 goto read_cfg_out;
7812 }
7813
7814 /* search for fc_fcoe resrouce descriptor */
7815 get_func_cfg = &pmb->u.mqe.un.get_func_cfg;
912e3acd 7816
8aa134a8
JS		 7817 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0];
7818 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0;
7819 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc);
7820 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD)
7821 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH;
7822 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH)
7823 goto read_cfg_out;
7824
912e3acd 7825 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) {
8aa134a8 7826 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i);
912e3acd 7827 if (LPFC_RSRC_DESC_TYPE_FCFCOE ==
8aa134a8 7828 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) {
912e3acd
JS		 7829 phba->sli4_hba.iov.pf_number =
7830 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc);
7831 phba->sli4_hba.iov.vf_number =
7832 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc);
7833 break;
7834 }
7835 }
7836
7837 if (i < LPFC_RSRC_DESC_MAX_NUM)
7838 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7839 "3027 GET_FUNCTION_CONFIG: pf_number:%d, "
7840 "vf_number:%d\n", phba->sli4_hba.iov.pf_number,
7841 phba->sli4_hba.iov.vf_number);
8aa134a8 7842 else
912e3acd
JS		 7843 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7844 "3028 GET_FUNCTION_CONFIG: failed to find "
7845 "Resrouce Descriptor:x%x\n",
7846 LPFC_RSRC_DESC_TYPE_FCFCOE);
912e3acd
JS		 7847
7848read_cfg_out:
7849 mempool_free(pmb, phba->mbox_mem_pool);
da0436e9 7850 return rc;
3772a991
JS		 7851}
7852
7853/**
2fcee4bf 7854 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port.
3772a991
JS		 7855 * @phba: pointer to lpfc hba data structure.
7856 *
2fcee4bf
JS		 7857 * This routine is invoked to setup the port-side endian order when
7858 * the port if_type is 0. This routine has no function for other
7859 * if_types.
da0436e9
JS		 7860 *
7861 * Return codes
af901ca1 7862 * 0 - successful
25985edc 7863 * -ENOMEM - No available memory
d439d286 7864 * -EIO - The mailbox failed to complete successfully.
3772a991 7865 **/
da0436e9
JS		 7866static int
7867lpfc_setup_endian_order(struct lpfc_hba *phba)
3772a991 7868{
da0436e9 7869 LPFC_MBOXQ_t *mboxq;
2fcee4bf 7870 uint32_t if_type, rc = 0;
da0436e9
JS		 7871 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0,
7872 HOST_ENDIAN_HIGH_WORD1};
3772a991 7873
2fcee4bf
JS		 7874 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7875 switch (if_type) {
7876 case LPFC_SLI_INTF_IF_TYPE_0:
7877 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
7878 GFP_KERNEL);
7879 if (!mboxq) {
7880 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7881 "0492 Unable to allocate memory for "
7882 "issuing SLI_CONFIG_SPECIAL mailbox "
7883 "command\n");
7884 return -ENOMEM;
7885 }
3772a991 7886
2fcee4bf
JS		 7887 /*
7888 * The SLI4_CONFIG_SPECIAL mailbox command requires the first
7889 * two words to contain special data values and no other data.
7890 */
7891 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t));
7892 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data));
7893 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7894 if (rc != MBX_SUCCESS) {
7895 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7896 "0493 SLI_CONFIG_SPECIAL mailbox "
7897 "failed with status x%x\n",
7898 rc);
7899 rc = -EIO;
7900 }
7901 mempool_free(mboxq, phba->mbox_mem_pool);
7902 break;
7903 case LPFC_SLI_INTF_IF_TYPE_2:
7904 case LPFC_SLI_INTF_IF_TYPE_1:
7905 default:
7906 break;
da0436e9 7907 }
da0436e9 7908 return rc;
3772a991
JS		 7909}
7910
7911/**
895427bd 7912 * lpfc_sli4_queue_verify - Verify and update EQ counts
3772a991
JS		 7913 * @phba: pointer to lpfc hba data structure.
7914 *
895427bd
JS		 7915 * This routine is invoked to check the user settable queue counts for EQs.
7916 * After this routine is called the counts will be set to valid values that
5350d872
JS		 7917 * adhere to the constraints of the system's interrupt vectors and the port's
7918 * queue resources.
da0436e9
JS		 7919 *
7920 * Return codes
af901ca1 7921 * 0 - successful
25985edc 7922 * -ENOMEM - No available memory
3772a991 7923 **/
da0436e9 7924static int
5350d872 7925lpfc_sli4_queue_verify(struct lpfc_hba *phba)
3772a991 7926{
895427bd 7927 int io_channel;
1ba981fd 7928 int fof_vectors = phba->cfg_fof ? 1 : 0;
3772a991 7929
da0436e9 7930 /*
67d12733 7931 * Sanity check for configured queue parameters against the run-time
da0436e9
JS		 7932 * device parameters
7933 */
3772a991 7934
67d12733 7935 /* Sanity check on HBA EQ parameters */
895427bd 7936 io_channel = phba->io_channel_irqs;
67d12733 7937
895427bd 7938 if (phba->sli4_hba.num_online_cpu < io_channel) {
82c3e9ba
JS		 7939 lpfc_printf_log(phba,
7940 KERN_ERR, LOG_INIT,
90695ee0 7941 "3188 Reducing IO channels to match number of "
7bb03bbf 7942 "online CPUs: from %d to %d\n",
895427bd
JS		 7943 io_channel, phba->sli4_hba.num_online_cpu);
7944 io_channel = phba->sli4_hba.num_online_cpu;
90695ee0
JS		 7945 }
7946
895427bd 7947 if (io_channel + fof_vectors > phba->sli4_hba.max_cfg_param.max_eq) {
82c3e9ba
JS		 7948 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7949 "2575 Reducing IO channels to match number of "
7950 "available EQs: from %d to %d\n",
895427bd 7951 io_channel,
82c3e9ba 7952 phba->sli4_hba.max_cfg_param.max_eq);
895427bd 7953 io_channel = phba->sli4_hba.max_cfg_param.max_eq - fof_vectors;
da0436e9 7954 }
67d12733 7955
895427bd
JS		 7956 /* The actual number of FCP / NVME event queues adopted */
7957 if (io_channel != phba->io_channel_irqs)
7958 phba->io_channel_irqs = io_channel;
7959 if (phba->cfg_fcp_io_channel > io_channel)
7960 phba->cfg_fcp_io_channel = io_channel;
7961 if (phba->cfg_nvme_io_channel > io_channel)
7962 phba->cfg_nvme_io_channel = io_channel;
bcb24f65
JS		 7963 if (phba->nvmet_support) {
7964 if (phba->cfg_nvme_io_channel < phba->cfg_nvmet_mrq)
7965 phba->cfg_nvmet_mrq = phba->cfg_nvme_io_channel;
7966 }
7967 if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX)
7968 phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX;
895427bd
JS		 7969
7970 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2d7dbc4c 7971 "2574 IO channels: irqs %d fcp %d nvme %d MRQ: %d\n",
895427bd 7972 phba->io_channel_irqs, phba->cfg_fcp_io_channel,
2d7dbc4c 7973 phba->cfg_nvme_io_channel, phba->cfg_nvmet_mrq);
3772a991 7974
da0436e9
JS		 7975 /* Get EQ depth from module parameter, fake the default for now */
7976 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
7977 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
3772a991 7978
5350d872
JS		 7979 /* Get CQ depth from module parameter, fake the default for now */
7980 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
7981 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
895427bd
JS		 7982 return 0;
7983}
7984
7985static int
7986lpfc_alloc_nvme_wq_cq(struct lpfc_hba *phba, int wqidx)
7987{
7988 struct lpfc_queue *qdesc;
5350d872 7989
a51e41b6 7990 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
81b96eda 7991 phba->sli4_hba.cq_esize,
a51e41b6 7992 LPFC_CQE_EXP_COUNT);
895427bd
JS		 7993 if (!qdesc) {
7994 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7995 "0508 Failed allocate fast-path NVME CQ (%d)\n",
7996 wqidx);
7997 return 1;
7998 }
7999 phba->sli4_hba.nvme_cq[wqidx] = qdesc;
8000
a51e41b6
JS		 8001 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
8002 LPFC_WQE128_SIZE, LPFC_WQE_EXP_COUNT);
895427bd
JS		 8003 if (!qdesc) {
8004 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8005 "0509 Failed allocate fast-path NVME WQ (%d)\n",
8006 wqidx);
8007 return 1;
8008 }
8009 phba->sli4_hba.nvme_wq[wqidx] = qdesc;
8010 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8011 return 0;
8012}
8013
8014static int
8015lpfc_alloc_fcp_wq_cq(struct lpfc_hba *phba, int wqidx)
8016{
8017 struct lpfc_queue *qdesc;
c176ffa0 8018 uint32_t wqesize;
895427bd
JS		 8019
8020 /* Create Fast Path FCP CQs */
c176ffa0 8021 if (phba->enab_exp_wqcq_pages)
a51e41b6
JS		 8022 /* Increase the CQ size when WQEs contain an embedded cdb */
8023 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
8024 phba->sli4_hba.cq_esize,
8025 LPFC_CQE_EXP_COUNT);
8026
8027 else
8028 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8029 phba->sli4_hba.cq_esize,
8030 phba->sli4_hba.cq_ecount);
895427bd
JS		 8031 if (!qdesc) {
8032 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8033 "0499 Failed allocate fast-path FCP CQ (%d)\n", wqidx);
8034 return 1;
8035 }
8036 phba->sli4_hba.fcp_cq[wqidx] = qdesc;
8037
8038 /* Create Fast Path FCP WQs */
c176ffa0 8039 if (phba->enab_exp_wqcq_pages) {
a51e41b6 8040 /* Increase the WQ size when WQEs contain an embedded cdb */
c176ffa0
JS		 8041 wqesize = (phba->fcp_embed_io) ?
8042 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
a51e41b6 8043 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
c176ffa0 8044 wqesize,
a51e41b6 8045 LPFC_WQE_EXP_COUNT);
c176ffa0 8046 } else
a51e41b6
JS		 8047 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8048 phba->sli4_hba.wq_esize,
8049 phba->sli4_hba.wq_ecount);
c176ffa0 8050
895427bd
JS		 8051 if (!qdesc) {
8052 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8053 "0503 Failed allocate fast-path FCP WQ (%d)\n",
8054 wqidx);
8055 return 1;
8056 }
8057 phba->sli4_hba.fcp_wq[wqidx] = qdesc;
8058 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
5350d872 8059 return 0;
5350d872
JS		 8060}
8061
8062/**
8063 * lpfc_sli4_queue_create - Create all the SLI4 queues
8064 * @phba: pointer to lpfc hba data structure.
8065 *
8066 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA
8067 * operation. For each SLI4 queue type, the parameters such as queue entry
8068 * count (queue depth) shall be taken from the module parameter. For now,
8069 * we just use some constant number as place holder.
8070 *
8071 * Return codes
4907cb7b 8072 * 0 - successful
5350d872
JS		 8073 * -ENOMEM - No availble memory
8074 * -EIO - The mailbox failed to complete successfully.
8075 **/
8076int
8077lpfc_sli4_queue_create(struct lpfc_hba *phba)
8078{
8079 struct lpfc_queue *qdesc;
d1f525aa 8080 int idx, io_channel;
5350d872
JS		 8081
8082 /*
67d12733 8083 * Create HBA Record arrays.
895427bd 8084 * Both NVME and FCP will share that same vectors / EQs
5350d872 8085 */
895427bd
JS		 8086 io_channel = phba->io_channel_irqs;
8087 if (!io_channel)
67d12733 8088 return -ERANGE;
5350d872 8089
67d12733
JS		 8090 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
8091 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
8092 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
8093 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
8094 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
8095 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
895427bd
JS		 8096 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
8097 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
8098 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
8099 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
67d12733 8100
895427bd
JS		 8101 phba->sli4_hba.hba_eq = kcalloc(io_channel,
8102 sizeof(struct lpfc_queue *),
8103 GFP_KERNEL);
67d12733
JS		 8104 if (!phba->sli4_hba.hba_eq) {
8105 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8106 "2576 Failed allocate memory for "
8107 "fast-path EQ record array\n");
8108 goto out_error;
8109 }
8110
895427bd
JS		 8111 if (phba->cfg_fcp_io_channel) {
8112 phba->sli4_hba.fcp_cq = kcalloc(phba->cfg_fcp_io_channel,
8113 sizeof(struct lpfc_queue *),
8114 GFP_KERNEL);
8115 if (!phba->sli4_hba.fcp_cq) {
8116 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8117 "2577 Failed allocate memory for "
8118 "fast-path CQ record array\n");
8119 goto out_error;
8120 }
8121 phba->sli4_hba.fcp_wq = kcalloc(phba->cfg_fcp_io_channel,
8122 sizeof(struct lpfc_queue *),
8123 GFP_KERNEL);
8124 if (!phba->sli4_hba.fcp_wq) {
8125 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8126 "2578 Failed allocate memory for "
8127 "fast-path FCP WQ record array\n");
8128 goto out_error;
8129 }
8130 /*
8131 * Since the first EQ can have multiple CQs associated with it,
8132 * this array is used to quickly see if we have a FCP fast-path
8133 * CQ match.
8134 */
8135 phba->sli4_hba.fcp_cq_map = kcalloc(phba->cfg_fcp_io_channel,
8136 sizeof(uint16_t),
8137 GFP_KERNEL);
8138 if (!phba->sli4_hba.fcp_cq_map) {
8139 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8140 "2545 Failed allocate memory for "
8141 "fast-path CQ map\n");
8142 goto out_error;
8143 }
67d12733
JS		 8144 }
8145
895427bd
JS		 8146 if (phba->cfg_nvme_io_channel) {
8147 phba->sli4_hba.nvme_cq = kcalloc(phba->cfg_nvme_io_channel,
8148 sizeof(struct lpfc_queue *),
8149 GFP_KERNEL);
8150 if (!phba->sli4_hba.nvme_cq) {
8151 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8152 "6077 Failed allocate memory for "
8153 "fast-path CQ record array\n");
8154 goto out_error;
8155 }
da0436e9 8156
895427bd
JS		 8157 phba->sli4_hba.nvme_wq = kcalloc(phba->cfg_nvme_io_channel,
8158 sizeof(struct lpfc_queue *),
8159 GFP_KERNEL);
8160 if (!phba->sli4_hba.nvme_wq) {
8161 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8162 "2581 Failed allocate memory for "
8163 "fast-path NVME WQ record array\n");
8164 goto out_error;
8165 }
8166
8167 /*
8168 * Since the first EQ can have multiple CQs associated with it,
8169 * this array is used to quickly see if we have a NVME fast-path
8170 * CQ match.
8171 */
8172 phba->sli4_hba.nvme_cq_map = kcalloc(phba->cfg_nvme_io_channel,
8173 sizeof(uint16_t),
8174 GFP_KERNEL);
8175 if (!phba->sli4_hba.nvme_cq_map) {
8176 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8177 "6078 Failed allocate memory for "
8178 "fast-path CQ map\n");
8179 goto out_error;
8180 }
2d7dbc4c
JS		 8181
8182 if (phba->nvmet_support) {
8183 phba->sli4_hba.nvmet_cqset = kcalloc(
8184 phba->cfg_nvmet_mrq,
8185 sizeof(struct lpfc_queue *),
8186 GFP_KERNEL);
8187 if (!phba->sli4_hba.nvmet_cqset) {
8188 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8189 "3121 Fail allocate memory for "
8190 "fast-path CQ set array\n");
8191 goto out_error;
8192 }
8193 phba->sli4_hba.nvmet_mrq_hdr = kcalloc(
8194 phba->cfg_nvmet_mrq,
8195 sizeof(struct lpfc_queue *),
8196 GFP_KERNEL);
8197 if (!phba->sli4_hba.nvmet_mrq_hdr) {
8198 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8199 "3122 Fail allocate memory for "
8200 "fast-path RQ set hdr array\n");
8201 goto out_error;
8202 }
8203 phba->sli4_hba.nvmet_mrq_data = kcalloc(
8204 phba->cfg_nvmet_mrq,
8205 sizeof(struct lpfc_queue *),
8206 GFP_KERNEL);
8207 if (!phba->sli4_hba.nvmet_mrq_data) {
8208 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8209 "3124 Fail allocate memory for "
8210 "fast-path RQ set data array\n");
8211 goto out_error;
8212 }
8213 }
da0436e9 8214 }
67d12733 8215
895427bd 8216 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
67d12733 8217
895427bd
JS		 8218 /* Create HBA Event Queues (EQs) */
8219 for (idx = 0; idx < io_channel; idx++) {
67d12733 8220 /* Create EQs */
81b96eda
JS		 8221 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8222 phba->sli4_hba.eq_esize,
da0436e9
JS		 8223 phba->sli4_hba.eq_ecount);
8224 if (!qdesc) {
8225 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
67d12733
JS		 8226 "0497 Failed allocate EQ (%d)\n", idx);
8227 goto out_error;
da0436e9 8228 }
67d12733 8229 phba->sli4_hba.hba_eq[idx] = qdesc;
895427bd 8230 }
67d12733 8231
895427bd 8232 /* FCP and NVME io channels are not required to be balanced */
67d12733 8233
895427bd
JS		 8234 for (idx = 0; idx < phba->cfg_fcp_io_channel; idx++)
8235 if (lpfc_alloc_fcp_wq_cq(phba, idx))
67d12733 8236 goto out_error;
da0436e9 8237
895427bd
JS		 8238 for (idx = 0; idx < phba->cfg_nvme_io_channel; idx++)
8239 if (lpfc_alloc_nvme_wq_cq(phba, idx))
8240 goto out_error;
67d12733 8241
2d7dbc4c
JS		 8242 if (phba->nvmet_support) {
8243 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
8244 qdesc = lpfc_sli4_queue_alloc(phba,
81b96eda
JS		 8245 LPFC_DEFAULT_PAGE_SIZE,
8246 phba->sli4_hba.cq_esize,
8247 phba->sli4_hba.cq_ecount);
2d7dbc4c
JS		 8248 if (!qdesc) {
8249 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8250 "3142 Failed allocate NVME "
8251 "CQ Set (%d)\n", idx);
8252 goto out_error;
8253 }
8254 phba->sli4_hba.nvmet_cqset[idx] = qdesc;
8255 }
8256 }
8257
da0436e9 8258 /*
67d12733 8259 * Create Slow Path Completion Queues (CQs)
da0436e9
JS		 8260 */
8261
da0436e9 8262 /* Create slow-path Mailbox Command Complete Queue */
81b96eda
JS		 8263 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8264 phba->sli4_hba.cq_esize,
da0436e9
JS		 8265 phba->sli4_hba.cq_ecount);
8266 if (!qdesc) {
8267 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8268 "0500 Failed allocate slow-path mailbox CQ\n");
67d12733 8269 goto out_error;
da0436e9
JS		 8270 }
8271 phba->sli4_hba.mbx_cq = qdesc;
8272
8273 /* Create slow-path ELS Complete Queue */
81b96eda
JS		 8274 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8275 phba->sli4_hba.cq_esize,
da0436e9
JS		 8276 phba->sli4_hba.cq_ecount);
8277 if (!qdesc) {
8278 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8279 "0501 Failed allocate slow-path ELS CQ\n");
67d12733 8280 goto out_error;
da0436e9
JS		 8281 }
8282 phba->sli4_hba.els_cq = qdesc;
8283
da0436e9 8284
5350d872 8285 /*
67d12733 8286 * Create Slow Path Work Queues (WQs)
5350d872 8287 */
da0436e9
JS		 8288
8289 /* Create Mailbox Command Queue */
da0436e9 8290
81b96eda
JS		 8291 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8292 phba->sli4_hba.mq_esize,
da0436e9
JS		 8293 phba->sli4_hba.mq_ecount);
8294 if (!qdesc) {
8295 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8296 "0505 Failed allocate slow-path MQ\n");
67d12733 8297 goto out_error;
da0436e9
JS		 8298 }
8299 phba->sli4_hba.mbx_wq = qdesc;
8300
8301 /*
67d12733 8302 * Create ELS Work Queues
da0436e9 8303 */
da0436e9
JS		 8304
8305 /* Create slow-path ELS Work Queue */
81b96eda
JS		 8306 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8307 phba->sli4_hba.wq_esize,
da0436e9
JS		 8308 phba->sli4_hba.wq_ecount);
8309 if (!qdesc) {
8310 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8311 "0504 Failed allocate slow-path ELS WQ\n");
67d12733 8312 goto out_error;
da0436e9
JS		 8313 }
8314 phba->sli4_hba.els_wq = qdesc;
895427bd
JS		 8315 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8316
8317 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8318 /* Create NVME LS Complete Queue */
81b96eda
JS		 8319 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8320 phba->sli4_hba.cq_esize,
895427bd
JS		 8321 phba->sli4_hba.cq_ecount);
8322 if (!qdesc) {
8323 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8324 "6079 Failed allocate NVME LS CQ\n");
8325 goto out_error;
8326 }
8327 phba->sli4_hba.nvmels_cq = qdesc;
8328
8329 /* Create NVME LS Work Queue */
81b96eda
JS		 8330 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8331 phba->sli4_hba.wq_esize,
895427bd
JS		 8332 phba->sli4_hba.wq_ecount);
8333 if (!qdesc) {
8334 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8335 "6080 Failed allocate NVME LS WQ\n");
8336 goto out_error;
8337 }
8338 phba->sli4_hba.nvmels_wq = qdesc;
8339 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8340 }
da0436e9 8341
da0436e9
JS		 8342 /*
8343 * Create Receive Queue (RQ)
8344 */
da0436e9
JS		 8345
8346 /* Create Receive Queue for header */
81b96eda
JS		 8347 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8348 phba->sli4_hba.rq_esize,
da0436e9
JS		 8349 phba->sli4_hba.rq_ecount);
8350 if (!qdesc) {
8351 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8352 "0506 Failed allocate receive HRQ\n");
67d12733 8353 goto out_error;
da0436e9
JS		 8354 }
8355 phba->sli4_hba.hdr_rq = qdesc;
8356
8357 /* Create Receive Queue for data */
81b96eda
JS		 8358 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8359 phba->sli4_hba.rq_esize,
da0436e9
JS		 8360 phba->sli4_hba.rq_ecount);
8361 if (!qdesc) {
8362 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8363 "0507 Failed allocate receive DRQ\n");
67d12733 8364 goto out_error;
da0436e9
JS		 8365 }
8366 phba->sli4_hba.dat_rq = qdesc;
8367
2d7dbc4c
JS		 8368 if (phba->nvmet_support) {
8369 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
8370 /* Create NVMET Receive Queue for header */
8371 qdesc = lpfc_sli4_queue_alloc(phba,
81b96eda 8372 LPFC_DEFAULT_PAGE_SIZE,
2d7dbc4c 8373 phba->sli4_hba.rq_esize,
61f3d4bf 8374 LPFC_NVMET_RQE_DEF_COUNT);
2d7dbc4c
JS		 8375 if (!qdesc) {
8376 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8377 "3146 Failed allocate "
8378 "receive HRQ\n");
8379 goto out_error;
8380 }
8381 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc;
8382
8383 /* Only needed for header of RQ pair */
8384 qdesc->rqbp = kzalloc(sizeof(struct lpfc_rqb),
8385 GFP_KERNEL);
8386 if (qdesc->rqbp == NULL) {
8387 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8388 "6131 Failed allocate "
8389 "Header RQBP\n");
8390 goto out_error;
8391 }
8392
4b40d02b
DK		 8393 /* Put list in known state in case driver load fails. */
8394 INIT_LIST_HEAD(&qdesc->rqbp->rqb_buffer_list);
8395
2d7dbc4c
JS		 8396 /* Create NVMET Receive Queue for data */
8397 qdesc = lpfc_sli4_queue_alloc(phba,
81b96eda 8398 LPFC_DEFAULT_PAGE_SIZE,
2d7dbc4c 8399 phba->sli4_hba.rq_esize,
61f3d4bf 8400 LPFC_NVMET_RQE_DEF_COUNT);
2d7dbc4c
JS		 8401 if (!qdesc) {
8402 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8403 "3156 Failed allocate "
8404 "receive DRQ\n");
8405 goto out_error;
8406 }
8407 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc;
8408 }
8409 }
8410
1ba981fd
JS		 8411 /* Create the Queues needed for Flash Optimized Fabric operations */
8412 if (phba->cfg_fof)
8413 lpfc_fof_queue_create(phba);
da0436e9
JS		 8414 return 0;
8415
da0436e9 8416out_error:
67d12733 8417 lpfc_sli4_queue_destroy(phba);
da0436e9
JS		 8418 return -ENOMEM;
8419}
8420
895427bd
JS		 8421static inline void
8422__lpfc_sli4_release_queue(struct lpfc_queue **qp)
8423{
8424 if (*qp != NULL) {
8425 lpfc_sli4_queue_free(*qp);
8426 *qp = NULL;
8427 }
8428}
8429
8430static inline void
8431lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max)
8432{
8433 int idx;
8434
8435 if (*qs == NULL)
8436 return;
8437
8438 for (idx = 0; idx < max; idx++)
8439 __lpfc_sli4_release_queue(&(*qs)[idx]);
8440
8441 kfree(*qs);
8442 *qs = NULL;
8443}
8444
8445static inline void
8446lpfc_sli4_release_queue_map(uint16_t **qmap)
8447{
8448 if (*qmap != NULL) {
8449 kfree(*qmap);
8450 *qmap = NULL;
8451 }
8452}
8453
da0436e9
JS		 8454/**
8455 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues
8456 * @phba: pointer to lpfc hba data structure.
8457 *
8458 * This routine is invoked to release all the SLI4 queues with the FCoE HBA
8459 * operation.
8460 *
8461 * Return codes
af901ca1 8462 * 0 - successful
25985edc 8463 * -ENOMEM - No available memory
d439d286 8464 * -EIO - The mailbox failed to complete successfully.
da0436e9 8465 **/
5350d872 8466void
da0436e9
JS		 8467lpfc_sli4_queue_destroy(struct lpfc_hba *phba)
8468{
1ba981fd
JS		 8469 if (phba->cfg_fof)
8470 lpfc_fof_queue_destroy(phba);
8471
895427bd
JS		 8472 /* Release HBA eqs */
8473 lpfc_sli4_release_queues(&phba->sli4_hba.hba_eq, phba->io_channel_irqs);
8474
8475 /* Release FCP cqs */
8476 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_cq,
d1f525aa 8477 phba->cfg_fcp_io_channel);
895427bd
JS		 8478
8479 /* Release FCP wqs */
8480 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_wq,
d1f525aa 8481 phba->cfg_fcp_io_channel);
895427bd
JS		 8482
8483 /* Release FCP CQ mapping array */
8484 lpfc_sli4_release_queue_map(&phba->sli4_hba.fcp_cq_map);
8485
8486 /* Release NVME cqs */
8487 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_cq,
8488 phba->cfg_nvme_io_channel);
8489
8490 /* Release NVME wqs */
8491 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_wq,
8492 phba->cfg_nvme_io_channel);
8493
8494 /* Release NVME CQ mapping array */
8495 lpfc_sli4_release_queue_map(&phba->sli4_hba.nvme_cq_map);
8496
bcb24f65
JS		 8497 if (phba->nvmet_support) {
8498 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset,
8499 phba->cfg_nvmet_mrq);
2d7dbc4c 8500
bcb24f65
JS		 8501 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr,
8502 phba->cfg_nvmet_mrq);
8503 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data,
8504 phba->cfg_nvmet_mrq);
8505 }
2d7dbc4c 8506
895427bd
JS		 8507 /* Release mailbox command work queue */
8508 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq);
8509
8510 /* Release ELS work queue */
8511 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq);
8512
8513 /* Release ELS work queue */
8514 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq);
8515
8516 /* Release unsolicited receive queue */
8517 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq);
8518 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq);
8519
8520 /* Release ELS complete queue */
8521 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq);
8522
8523 /* Release NVME LS complete queue */
8524 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq);
8525
8526 /* Release mailbox command complete queue */
8527 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq);
8528
8529 /* Everything on this list has been freed */
8530 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
8531}
8532
895427bd
JS		 8533int
8534lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq)
8535{
8536 struct lpfc_rqb *rqbp;
8537 struct lpfc_dmabuf *h_buf;
8538 struct rqb_dmabuf *rqb_buffer;
8539
8540 rqbp = rq->rqbp;
8541 while (!list_empty(&rqbp->rqb_buffer_list)) {
8542 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
8543 struct lpfc_dmabuf, list);
8544
8545 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf);
8546 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
8547 rqbp->buffer_count--;
67d12733 8548 }
895427bd
JS		 8549 return 1;
8550}
67d12733 8551
895427bd
JS		 8552static int
8553lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq,
8554 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map,
8555 int qidx, uint32_t qtype)
8556{
8557 struct lpfc_sli_ring *pring;
8558 int rc;
8559
8560 if (!eq || !cq || !wq) {
8561 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8562 "6085 Fast-path %s (%d) not allocated\n",
8563 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx);
8564 return -ENOMEM;
8565 }
8566
8567 /* create the Cq first */
8568 rc = lpfc_cq_create(phba, cq, eq,
8569 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype);
8570 if (rc) {
8571 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8572 "6086 Failed setup of CQ (%d), rc = 0x%x\n",
8573 qidx, (uint32_t)rc);
8574 return rc;
67d12733 8575 }
81b96eda 8576 cq->chann = qidx;
67d12733 8577
895427bd
JS		 8578 if (qtype != LPFC_MBOX) {
8579 /* Setup nvme_cq_map for fast lookup */
8580 if (cq_map)
8581 *cq_map = cq->queue_id;
da0436e9 8582
895427bd
JS		 8583 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8584 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n",
8585 qidx, cq->queue_id, qidx, eq->queue_id);
da0436e9 8586
895427bd
JS		 8587 /* create the wq */
8588 rc = lpfc_wq_create(phba, wq, cq, qtype);
8589 if (rc) {
8590 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8591 "6123 Fail setup fastpath WQ (%d), rc = 0x%x\n",
8592 qidx, (uint32_t)rc);
8593 /* no need to tear down cq - caller will do so */
8594 return rc;
8595 }
81b96eda 8596 wq->chann = qidx;
da0436e9 8597
895427bd
JS		 8598 /* Bind this CQ/WQ to the NVME ring */
8599 pring = wq->pring;
8600 pring->sli.sli4.wqp = (void *)wq;
8601 cq->pring = pring;
da0436e9 8602
895427bd
JS		 8603 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8604 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n",
8605 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id);
8606 } else {
8607 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX);
8608 if (rc) {
8609 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8610 "0539 Failed setup of slow-path MQ: "
8611 "rc = 0x%x\n", rc);
8612 /* no need to tear down cq - caller will do so */
8613 return rc;
8614 }
da0436e9 8615
895427bd
JS		 8616 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8617 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n",
8618 phba->sli4_hba.mbx_wq->queue_id,
8619 phba->sli4_hba.mbx_cq->queue_id);
67d12733 8620 }
da0436e9 8621
895427bd 8622 return 0;
da0436e9
JS		 8623}
8624
8625/**
8626 * lpfc_sli4_queue_setup - Set up all the SLI4 queues
8627 * @phba: pointer to lpfc hba data structure.
8628 *
8629 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA
8630 * operation.
8631 *
8632 * Return codes
af901ca1 8633 * 0 - successful
25985edc 8634 * -ENOMEM - No available memory
d439d286 8635 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS		 8636 **/
8637int
8638lpfc_sli4_queue_setup(struct lpfc_hba *phba)
8639{
962bc51b
JS		 8640 uint32_t shdr_status, shdr_add_status;
8641 union lpfc_sli4_cfg_shdr *shdr;
8642 LPFC_MBOXQ_t *mboxq;
895427bd
JS		 8643 int qidx;
8644 uint32_t length, io_channel;
8645 int rc = -ENOMEM;
962bc51b
JS		 8646
8647 /* Check for dual-ULP support */
8648 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
8649 if (!mboxq) {
8650 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8651 "3249 Unable to allocate memory for "
8652 "QUERY_FW_CFG mailbox command\n");
8653 return -ENOMEM;
8654 }
8655 length = (sizeof(struct lpfc_mbx_query_fw_config) -
8656 sizeof(struct lpfc_sli4_cfg_mhdr));
8657 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
8658 LPFC_MBOX_OPCODE_QUERY_FW_CFG,
8659 length, LPFC_SLI4_MBX_EMBED);
8660
8661 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
8662
8663 shdr = (union lpfc_sli4_cfg_shdr *)
8664 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
8665 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
8666 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8667 if (shdr_status || shdr_add_status || rc) {
8668 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8669 "3250 QUERY_FW_CFG mailbox failed with status "
8670 "x%x add_status x%x, mbx status x%x\n",
8671 shdr_status, shdr_add_status, rc);
8672 if (rc != MBX_TIMEOUT)
8673 mempool_free(mboxq, phba->mbox_mem_pool);
8674 rc = -ENXIO;
8675 goto out_error;
8676 }
8677
8678 phba->sli4_hba.fw_func_mode =
8679 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode;
8680 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode;
8681 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode;
8b017a30
JS		 8682 phba->sli4_hba.physical_port =
8683 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port;
962bc51b
JS		 8684 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8685 "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, "
8686 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode,
8687 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode);
8688
8689 if (rc != MBX_TIMEOUT)
8690 mempool_free(mboxq, phba->mbox_mem_pool);
da0436e9
JS		 8691
8692 /*
67d12733 8693 * Set up HBA Event Queues (EQs)
da0436e9 8694 */
895427bd 8695 io_channel = phba->io_channel_irqs;
da0436e9 8696
67d12733 8697 /* Set up HBA event queue */
895427bd 8698 if (io_channel && !phba->sli4_hba.hba_eq) {
2e90f4b5
JS		 8699 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8700 "3147 Fast-path EQs not allocated\n");
1b51197d 8701 rc = -ENOMEM;
67d12733 8702 goto out_error;
2e90f4b5 8703 }
895427bd
JS		 8704 for (qidx = 0; qidx < io_channel; qidx++) {
8705 if (!phba->sli4_hba.hba_eq[qidx]) {
da0436e9
JS		 8706 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8707 "0522 Fast-path EQ (%d) not "
895427bd 8708 "allocated\n", qidx);
1b51197d 8709 rc = -ENOMEM;
895427bd 8710 goto out_destroy;
da0436e9 8711 }
895427bd
JS		 8712 rc = lpfc_eq_create(phba, phba->sli4_hba.hba_eq[qidx],
8713 phba->cfg_fcp_imax);
da0436e9
JS		 8714 if (rc) {
8715 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8716 "0523 Failed setup of fast-path EQ "
895427bd 8717 "(%d), rc = 0x%x\n", qidx,
a2fc4aef 8718 (uint32_t)rc);
895427bd 8719 goto out_destroy;
da0436e9
JS		 8720 }
8721 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
895427bd
JS		 8722 "2584 HBA EQ setup: queue[%d]-id=%d\n",
8723 qidx, phba->sli4_hba.hba_eq[qidx]->queue_id);
67d12733
JS		 8724 }
8725
895427bd
JS		 8726 if (phba->cfg_nvme_io_channel) {
8727 if (!phba->sli4_hba.nvme_cq || !phba->sli4_hba.nvme_wq) {
67d12733 8728 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8729 "6084 Fast-path NVME %s array not allocated\n",
8730 (phba->sli4_hba.nvme_cq) ? "CQ" : "WQ");
67d12733 8731 rc = -ENOMEM;
895427bd 8732 goto out_destroy;
67d12733
JS		 8733 }
8734
895427bd
JS		 8735 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++) {
8736 rc = lpfc_create_wq_cq(phba,
8737 phba->sli4_hba.hba_eq[
8738 qidx % io_channel],
8739 phba->sli4_hba.nvme_cq[qidx],
8740 phba->sli4_hba.nvme_wq[qidx],
8741 &phba->sli4_hba.nvme_cq_map[qidx],
8742 qidx, LPFC_NVME);
8743 if (rc) {
8744 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8745 "6123 Failed to setup fastpath "
8746 "NVME WQ/CQ (%d), rc = 0x%x\n",
8747 qidx, (uint32_t)rc);
8748 goto out_destroy;
8749 }
8750 }
67d12733
JS		 8751 }
8752
895427bd
JS		 8753 if (phba->cfg_fcp_io_channel) {
8754 /* Set up fast-path FCP Response Complete Queue */
8755 if (!phba->sli4_hba.fcp_cq || !phba->sli4_hba.fcp_wq) {
67d12733 8756 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8757 "3148 Fast-path FCP %s array not allocated\n",
8758 phba->sli4_hba.fcp_cq ? "WQ" : "CQ");
67d12733 8759 rc = -ENOMEM;
895427bd 8760 goto out_destroy;
67d12733
JS		 8761 }
8762
895427bd
JS		 8763 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++) {
8764 rc = lpfc_create_wq_cq(phba,
8765 phba->sli4_hba.hba_eq[
8766 qidx % io_channel],
8767 phba->sli4_hba.fcp_cq[qidx],
8768 phba->sli4_hba.fcp_wq[qidx],
8769 &phba->sli4_hba.fcp_cq_map[qidx],
8770 qidx, LPFC_FCP);
8771 if (rc) {
8772 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8773 "0535 Failed to setup fastpath "
8774 "FCP WQ/CQ (%d), rc = 0x%x\n",
8775 qidx, (uint32_t)rc);
8776 goto out_destroy;
8777 }
8778 }
67d12733 8779 }
895427bd 8780
da0436e9 8781 /*
895427bd 8782 * Set up Slow Path Complete Queues (CQs)
da0436e9
JS		 8783 */
8784
895427bd 8785 /* Set up slow-path MBOX CQ/MQ */
da0436e9 8786
895427bd 8787 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) {
da0436e9 8788 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8789 "0528 %s not allocated\n",
8790 phba->sli4_hba.mbx_cq ?
d1f525aa 8791 "Mailbox WQ" : "Mailbox CQ");
1b51197d 8792 rc = -ENOMEM;
895427bd 8793 goto out_destroy;
da0436e9 8794 }
da0436e9 8795
895427bd 8796 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
d1f525aa
JS		 8797 phba->sli4_hba.mbx_cq,
8798 phba->sli4_hba.mbx_wq,
8799 NULL, 0, LPFC_MBOX);
da0436e9
JS		 8800 if (rc) {
8801 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8802 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n",
8803 (uint32_t)rc);
8804 goto out_destroy;
da0436e9 8805 }
2d7dbc4c
JS		 8806 if (phba->nvmet_support) {
8807 if (!phba->sli4_hba.nvmet_cqset) {
8808 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8809 "3165 Fast-path NVME CQ Set "
8810 "array not allocated\n");
8811 rc = -ENOMEM;
8812 goto out_destroy;
8813 }
8814 if (phba->cfg_nvmet_mrq > 1) {
8815 rc = lpfc_cq_create_set(phba,
8816 phba->sli4_hba.nvmet_cqset,
8817 phba->sli4_hba.hba_eq,
8818 LPFC_WCQ, LPFC_NVMET);
8819 if (rc) {
8820 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8821 "3164 Failed setup of NVME CQ "
8822 "Set, rc = 0x%x\n",
8823 (uint32_t)rc);
8824 goto out_destroy;
8825 }
8826 } else {
8827 /* Set up NVMET Receive Complete Queue */
8828 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0],
8829 phba->sli4_hba.hba_eq[0],
8830 LPFC_WCQ, LPFC_NVMET);
8831 if (rc) {
8832 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8833 "6089 Failed setup NVMET CQ: "
8834 "rc = 0x%x\n", (uint32_t)rc);
8835 goto out_destroy;
8836 }
81b96eda
JS		 8837 phba->sli4_hba.nvmet_cqset[0]->chann = 0;
8838
2d7dbc4c
JS		 8839 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8840 "6090 NVMET CQ setup: cq-id=%d, "
8841 "parent eq-id=%d\n",
8842 phba->sli4_hba.nvmet_cqset[0]->queue_id,
8843 phba->sli4_hba.hba_eq[0]->queue_id);
8844 }
8845 }
da0436e9 8846
895427bd
JS		 8847 /* Set up slow-path ELS WQ/CQ */
8848 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) {
da0436e9 8849 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8850 "0530 ELS %s not allocated\n",
8851 phba->sli4_hba.els_cq ? "WQ" : "CQ");
1b51197d 8852 rc = -ENOMEM;
895427bd 8853 goto out_destroy;
da0436e9 8854 }
895427bd
JS		 8855 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8856 phba->sli4_hba.els_cq,
8857 phba->sli4_hba.els_wq,
8858 NULL, 0, LPFC_ELS);
da0436e9
JS		 8859 if (rc) {
8860 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8861 "0529 Failed setup of ELS WQ/CQ: rc = 0x%x\n",
8862 (uint32_t)rc);
8863 goto out_destroy;
da0436e9
JS		 8864 }
8865 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8866 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n",
8867 phba->sli4_hba.els_wq->queue_id,
8868 phba->sli4_hba.els_cq->queue_id);
8869
895427bd
JS		 8870 if (phba->cfg_nvme_io_channel) {
8871 /* Set up NVME LS Complete Queue */
8872 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) {
8873 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8874 "6091 LS %s not allocated\n",
8875 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ");
8876 rc = -ENOMEM;
8877 goto out_destroy;
8878 }
8879 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8880 phba->sli4_hba.nvmels_cq,
8881 phba->sli4_hba.nvmels_wq,
8882 NULL, 0, LPFC_NVME_LS);
8883 if (rc) {
8884 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8885 "0529 Failed setup of NVVME LS WQ/CQ: "
8886 "rc = 0x%x\n", (uint32_t)rc);
8887 goto out_destroy;
8888 }
8889
8890 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8891 "6096 ELS WQ setup: wq-id=%d, "
8892 "parent cq-id=%d\n",
8893 phba->sli4_hba.nvmels_wq->queue_id,
8894 phba->sli4_hba.nvmels_cq->queue_id);
8895 }
8896
2d7dbc4c
JS		 8897 /*
8898 * Create NVMET Receive Queue (RQ)
8899 */
8900 if (phba->nvmet_support) {
8901 if ((!phba->sli4_hba.nvmet_cqset) ||
8902 (!phba->sli4_hba.nvmet_mrq_hdr) ||
8903 (!phba->sli4_hba.nvmet_mrq_data)) {
8904 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8905 "6130 MRQ CQ Queues not "
8906 "allocated\n");
8907 rc = -ENOMEM;
8908 goto out_destroy;
8909 }
8910 if (phba->cfg_nvmet_mrq > 1) {
8911 rc = lpfc_mrq_create(phba,
8912 phba->sli4_hba.nvmet_mrq_hdr,
8913 phba->sli4_hba.nvmet_mrq_data,
8914 phba->sli4_hba.nvmet_cqset,
8915 LPFC_NVMET);
8916 if (rc) {
8917 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8918 "6098 Failed setup of NVMET "
8919 "MRQ: rc = 0x%x\n",
8920 (uint32_t)rc);
8921 goto out_destroy;
8922 }
8923
8924 } else {
8925 rc = lpfc_rq_create(phba,
8926 phba->sli4_hba.nvmet_mrq_hdr[0],
8927 phba->sli4_hba.nvmet_mrq_data[0],
8928 phba->sli4_hba.nvmet_cqset[0],
8929 LPFC_NVMET);
8930 if (rc) {
8931 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8932 "6057 Failed setup of NVMET "
8933 "Receive Queue: rc = 0x%x\n",
8934 (uint32_t)rc);
8935 goto out_destroy;
8936 }
8937
8938 lpfc_printf_log(
8939 phba, KERN_INFO, LOG_INIT,
8940 "6099 NVMET RQ setup: hdr-rq-id=%d, "
8941 "dat-rq-id=%d parent cq-id=%d\n",
8942 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id,
8943 phba->sli4_hba.nvmet_mrq_data[0]->queue_id,
8944 phba->sli4_hba.nvmet_cqset[0]->queue_id);
8945
8946 }
8947 }
8948
da0436e9
JS		 8949 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
8950 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8951 "0540 Receive Queue not allocated\n");
1b51197d 8952 rc = -ENOMEM;
895427bd 8953 goto out_destroy;
da0436e9 8954 }
73d91e50 8955
da0436e9 8956 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
4d9ab994 8957 phba->sli4_hba.els_cq, LPFC_USOL);
da0436e9
JS		 8958 if (rc) {
8959 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8960 "0541 Failed setup of Receive Queue: "
a2fc4aef 8961 "rc = 0x%x\n", (uint32_t)rc);
895427bd 8962 goto out_destroy;
da0436e9 8963 }
73d91e50 8964
da0436e9
JS		 8965 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8966 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d "
8967 "parent cq-id=%d\n",
8968 phba->sli4_hba.hdr_rq->queue_id,
8969 phba->sli4_hba.dat_rq->queue_id,
4d9ab994 8970 phba->sli4_hba.els_cq->queue_id);
1ba981fd
JS		 8971
8972 if (phba->cfg_fof) {
8973 rc = lpfc_fof_queue_setup(phba);
8974 if (rc) {
8975 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8976 "0549 Failed setup of FOF Queues: "
8977 "rc = 0x%x\n", rc);
895427bd 8978 goto out_destroy;
1ba981fd
JS		 8979 }
8980 }
2c9c5a00 8981
43140ca6 8982 for (qidx = 0; qidx < io_channel; qidx += LPFC_MAX_EQ_DELAY_EQID_CNT)
0cf07f84
JS		 8983 lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT,
8984 phba->cfg_fcp_imax);
43140ca6 8985
da0436e9
JS		 8986 return 0;
8987
895427bd
JS		 8988out_destroy:
8989 lpfc_sli4_queue_unset(phba);
da0436e9
JS		 8990out_error:
8991 return rc;
8992}
8993
8994/**
8995 * lpfc_sli4_queue_unset - Unset all the SLI4 queues
8996 * @phba: pointer to lpfc hba data structure.
8997 *
8998 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA
8999 * operation.
9000 *
9001 * Return codes
af901ca1 9002 * 0 - successful
25985edc 9003 * -ENOMEM - No available memory
d439d286 9004 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS		 9005 **/
9006void
9007lpfc_sli4_queue_unset(struct lpfc_hba *phba)
9008{
895427bd 9009 int qidx;
da0436e9 9010
1ba981fd
JS		 9011 /* Unset the queues created for Flash Optimized Fabric operations */
9012 if (phba->cfg_fof)
9013 lpfc_fof_queue_destroy(phba);
895427bd 9014
da0436e9 9015 /* Unset mailbox command work queue */
895427bd
JS		 9016 if (phba->sli4_hba.mbx_wq)
9017 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
9018
9019 /* Unset NVME LS work queue */
9020 if (phba->sli4_hba.nvmels_wq)
9021 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq);
9022
da0436e9 9023 /* Unset ELS work queue */
019c0d66 9024 if (phba->sli4_hba.els_wq)
895427bd
JS		 9025 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
9026
da0436e9 9027 /* Unset unsolicited receive queue */
895427bd
JS		 9028 if (phba->sli4_hba.hdr_rq)
9029 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq,
9030 phba->sli4_hba.dat_rq);
9031
da0436e9 9032 /* Unset FCP work queue */
895427bd
JS		 9033 if (phba->sli4_hba.fcp_wq)
9034 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
9035 lpfc_wq_destroy(phba, phba->sli4_hba.fcp_wq[qidx]);
9036
9037 /* Unset NVME work queue */
9038 if (phba->sli4_hba.nvme_wq) {
9039 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
9040 lpfc_wq_destroy(phba, phba->sli4_hba.nvme_wq[qidx]);
67d12733 9041 }
895427bd 9042
da0436e9 9043 /* Unset mailbox command complete queue */
895427bd
JS		 9044 if (phba->sli4_hba.mbx_cq)
9045 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
9046
da0436e9 9047 /* Unset ELS complete queue */
895427bd
JS		 9048 if (phba->sli4_hba.els_cq)
9049 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
9050
9051 /* Unset NVME LS complete queue */
9052 if (phba->sli4_hba.nvmels_cq)
9053 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq);
9054
9055 /* Unset NVME response complete queue */
9056 if (phba->sli4_hba.nvme_cq)
9057 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
9058 lpfc_cq_destroy(phba, phba->sli4_hba.nvme_cq[qidx]);
9059
bcb24f65
JS		 9060 if (phba->nvmet_support) {
9061 /* Unset NVMET MRQ queue */
9062 if (phba->sli4_hba.nvmet_mrq_hdr) {
9063 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
9064 lpfc_rq_destroy(
9065 phba,
2d7dbc4c
JS		 9066 phba->sli4_hba.nvmet_mrq_hdr[qidx],
9067 phba->sli4_hba.nvmet_mrq_data[qidx]);
bcb24f65 9068 }
2d7dbc4c 9069
bcb24f65
JS		 9070 /* Unset NVMET CQ Set complete queue */
9071 if (phba->sli4_hba.nvmet_cqset) {
9072 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
9073 lpfc_cq_destroy(
9074 phba, phba->sli4_hba.nvmet_cqset[qidx]);
9075 }
2d7dbc4c
JS		 9076 }
9077
da0436e9 9078 /* Unset FCP response complete queue */
895427bd
JS		 9079 if (phba->sli4_hba.fcp_cq)
9080 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
9081 lpfc_cq_destroy(phba, phba->sli4_hba.fcp_cq[qidx]);
9082
da0436e9 9083 /* Unset fast-path event queue */
895427bd
JS		 9084 if (phba->sli4_hba.hba_eq)
9085 for (qidx = 0; qidx < phba->io_channel_irqs; qidx++)
9086 lpfc_eq_destroy(phba, phba->sli4_hba.hba_eq[qidx]);
da0436e9
JS		 9087}
9088
9089/**
9090 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool
9091 * @phba: pointer to lpfc hba data structure.
9092 *
9093 * This routine is invoked to allocate and set up a pool of completion queue
9094 * events. The body of the completion queue event is a completion queue entry
9095 * CQE. For now, this pool is used for the interrupt service routine to queue
9096 * the following HBA completion queue events for the worker thread to process:
9097 * - Mailbox asynchronous events
9098 * - Receive queue completion unsolicited events
9099 * Later, this can be used for all the slow-path events.
9100 *
9101 * Return codes
af901ca1 9102 * 0 - successful
25985edc 9103 * -ENOMEM - No available memory
da0436e9
JS		 9104 **/
9105static int
9106lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba)
9107{
9108 struct lpfc_cq_event *cq_event;
9109 int i;
9110
9111 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
9112 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL);
9113 if (!cq_event)
9114 goto out_pool_create_fail;
9115 list_add_tail(&cq_event->list,
9116 &phba->sli4_hba.sp_cqe_event_pool);
9117 }
9118 return 0;
9119
9120out_pool_create_fail:
9121 lpfc_sli4_cq_event_pool_destroy(phba);
9122 return -ENOMEM;
9123}
9124
9125/**
9126 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool
9127 * @phba: pointer to lpfc hba data structure.
9128 *
9129 * This routine is invoked to free the pool of completion queue events at
9130 * driver unload time. Note that, it is the responsibility of the driver
9131 * cleanup routine to free all the outstanding completion-queue events
9132 * allocated from this pool back into the pool before invoking this routine
9133 * to destroy the pool.
9134 **/
9135static void
9136lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba)
9137{
9138 struct lpfc_cq_event *cq_event, *next_cq_event;
9139
9140 list_for_each_entry_safe(cq_event, next_cq_event,
9141 &phba->sli4_hba.sp_cqe_event_pool, list) {
9142 list_del(&cq_event->list);
9143 kfree(cq_event);
9144 }
9145}
9146
9147/**
9148 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
9149 * @phba: pointer to lpfc hba data structure.
9150 *
9151 * This routine is the lock free version of the API invoked to allocate a
9152 * completion-queue event from the free pool.
9153 *
9154 * Return: Pointer to the newly allocated completion-queue event if successful
9155 * NULL otherwise.
9156 **/
9157struct lpfc_cq_event *
9158__lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
9159{
9160 struct lpfc_cq_event *cq_event = NULL;
9161
9162 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
9163 struct lpfc_cq_event, list);
9164 return cq_event;
9165}
9166
9167/**
9168 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
9169 * @phba: pointer to lpfc hba data structure.
9170 *
9171 * This routine is the lock version of the API invoked to allocate a
9172 * completion-queue event from the free pool.
9173 *
9174 * Return: Pointer to the newly allocated completion-queue event if successful
9175 * NULL otherwise.
9176 **/
9177struct lpfc_cq_event *
9178lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
9179{
9180 struct lpfc_cq_event *cq_event;
9181 unsigned long iflags;
9182
9183 spin_lock_irqsave(&phba->hbalock, iflags);
9184 cq_event = __lpfc_sli4_cq_event_alloc(phba);
9185 spin_unlock_irqrestore(&phba->hbalock, iflags);
9186 return cq_event;
9187}
9188
9189/**
9190 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
9191 * @phba: pointer to lpfc hba data structure.
9192 * @cq_event: pointer to the completion queue event to be freed.
9193 *
9194 * This routine is the lock free version of the API invoked to release a
9195 * completion-queue event back into the free pool.
9196 **/
9197void
9198__lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
9199 struct lpfc_cq_event *cq_event)
9200{
9201 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
9202}
9203
9204/**
9205 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
9206 * @phba: pointer to lpfc hba data structure.
9207 * @cq_event: pointer to the completion queue event to be freed.
9208 *
9209 * This routine is the lock version of the API invoked to release a
9210 * completion-queue event back into the free pool.
9211 **/
9212void
9213lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
9214 struct lpfc_cq_event *cq_event)
9215{
9216 unsigned long iflags;
9217 spin_lock_irqsave(&phba->hbalock, iflags);
9218 __lpfc_sli4_cq_event_release(phba, cq_event);
9219 spin_unlock_irqrestore(&phba->hbalock, iflags);
9220}
9221
9222/**
9223 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool
9224 * @phba: pointer to lpfc hba data structure.
9225 *
9226 * This routine is to free all the pending completion-queue events to the
9227 * back into the free pool for device reset.
9228 **/
9229static void
9230lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba)
9231{
9232 LIST_HEAD(cqelist);
9233 struct lpfc_cq_event *cqe;
9234 unsigned long iflags;
9235
9236 /* Retrieve all the pending WCQEs from pending WCQE lists */
9237 spin_lock_irqsave(&phba->hbalock, iflags);
9238 /* Pending FCP XRI abort events */
9239 list_splice_init(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue,
9240 &cqelist);
9241 /* Pending ELS XRI abort events */
9242 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
9243 &cqelist);
9244 /* Pending asynnc events */
9245 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
9246 &cqelist);
9247 spin_unlock_irqrestore(&phba->hbalock, iflags);
9248
9249 while (!list_empty(&cqelist)) {
9250 list_remove_head(&cqelist, cqe, struct lpfc_cq_event, list);
9251 lpfc_sli4_cq_event_release(phba, cqe);
9252 }
9253}
9254
9255/**
9256 * lpfc_pci_function_reset - Reset pci function.
9257 * @phba: pointer to lpfc hba data structure.
9258 *
9259 * This routine is invoked to request a PCI function reset. It will destroys
9260 * all resources assigned to the PCI function which originates this request.
9261 *
9262 * Return codes
af901ca1 9263 * 0 - successful
25985edc 9264 * -ENOMEM - No available memory
d439d286 9265 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS		 9266 **/
9267int
9268lpfc_pci_function_reset(struct lpfc_hba *phba)
9269{
9270 LPFC_MBOXQ_t *mboxq;
2fcee4bf 9271 uint32_t rc = 0, if_type;
da0436e9 9272 uint32_t shdr_status, shdr_add_status;
2f6fa2c9
JS		 9273 uint32_t rdy_chk;
9274 uint32_t port_reset = 0;
da0436e9 9275 union lpfc_sli4_cfg_shdr *shdr;
2fcee4bf 9276 struct lpfc_register reg_data;
2b81f942 9277 uint16_t devid;
da0436e9 9278
2fcee4bf
JS		 9279 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9280 switch (if_type) {
9281 case LPFC_SLI_INTF_IF_TYPE_0:
9282 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
9283 GFP_KERNEL);
9284 if (!mboxq) {
9285 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9286 "0494 Unable to allocate memory for "
9287 "issuing SLI_FUNCTION_RESET mailbox "
9288 "command\n");
9289 return -ENOMEM;
9290 }
da0436e9 9291
2fcee4bf
JS		 9292 /* Setup PCI function reset mailbox-ioctl command */
9293 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
9294 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0,
9295 LPFC_SLI4_MBX_EMBED);
9296 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
9297 shdr = (union lpfc_sli4_cfg_shdr *)
9298 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
9299 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
9300 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
9301 &shdr->response);
9302 if (rc != MBX_TIMEOUT)
9303 mempool_free(mboxq, phba->mbox_mem_pool);
9304 if (shdr_status || shdr_add_status || rc) {
9305 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9306 "0495 SLI_FUNCTION_RESET mailbox "
9307 "failed with status x%x add_status x%x,"
9308 " mbx status x%x\n",
9309 shdr_status, shdr_add_status, rc);
9310 rc = -ENXIO;
9311 }
9312 break;
9313 case LPFC_SLI_INTF_IF_TYPE_2:
2f6fa2c9
JS		 9314wait:
9315 /*
9316 * Poll the Port Status Register and wait for RDY for
9317 * up to 30 seconds. If the port doesn't respond, treat
9318 * it as an error.
9319 */
77d093fb 9320 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) {
2f6fa2c9
JS		 9321 if (lpfc_readl(phba->sli4_hba.u.if_type2.
9322 STATUSregaddr, &reg_data.word0)) {
9323 rc = -ENODEV;
9324 goto out;
9325 }
9326 if (bf_get(lpfc_sliport_status_rdy, &reg_data))
9327 break;
9328 msleep(20);
9329 }
9330
9331 if (!bf_get(lpfc_sliport_status_rdy, &reg_data)) {
9332 phba->work_status[0] = readl(
9333 phba->sli4_hba.u.if_type2.ERR1regaddr);
9334 phba->work_status[1] = readl(
9335 phba->sli4_hba.u.if_type2.ERR2regaddr);
9336 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9337 "2890 Port not ready, port status reg "
9338 "0x%x error 1=0x%x, error 2=0x%x\n",
9339 reg_data.word0,
9340 phba->work_status[0],
9341 phba->work_status[1]);
9342 rc = -ENODEV;
9343 goto out;
9344 }
9345
9346 if (!port_reset) {
9347 /*
9348 * Reset the port now
9349 */
2fcee4bf
JS		 9350 reg_data.word0 = 0;
9351 bf_set(lpfc_sliport_ctrl_end, &reg_data,
9352 LPFC_SLIPORT_LITTLE_ENDIAN);
9353 bf_set(lpfc_sliport_ctrl_ip, &reg_data,
9354 LPFC_SLIPORT_INIT_PORT);
9355 writel(reg_data.word0, phba->sli4_hba.u.if_type2.
9356 CTRLregaddr);
8fcb8acd 9357 /* flush */
2b81f942
JS		 9358 pci_read_config_word(phba->pcidev,
9359 PCI_DEVICE_ID, &devid);
2fcee4bf 9360
2f6fa2c9
JS		 9361 port_reset = 1;
9362 msleep(20);
9363 goto wait;
9364 } else if (bf_get(lpfc_sliport_status_rn, &reg_data)) {
9365 rc = -ENODEV;
9366 goto out;
2fcee4bf
JS		 9367 }
9368 break;
2f6fa2c9 9369
2fcee4bf
JS		 9370 case LPFC_SLI_INTF_IF_TYPE_1:
9371 default:
9372 break;
da0436e9 9373 }
2fcee4bf 9374
73d91e50 9375out:
2fcee4bf 9376 /* Catch the not-ready port failure after a port reset. */
2f6fa2c9 9377 if (rc) {
229adb0e
JS		 9378 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9379 "3317 HBA not functional: IP Reset Failed "
2f6fa2c9 9380 "try: echo fw_reset > board_mode\n");
2fcee4bf 9381 rc = -ENODEV;
229adb0e 9382 }
2fcee4bf 9383
da0436e9
JS		 9384 return rc;
9385}
9386
da0436e9
JS		 9387/**
9388 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space.
9389 * @phba: pointer to lpfc hba data structure.
9390 *
9391 * This routine is invoked to set up the PCI device memory space for device
9392 * with SLI-4 interface spec.
9393 *
9394 * Return codes
af901ca1 9395 * 0 - successful
da0436e9
JS		 9396 * other values - error
9397 **/
9398static int
9399lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
9400{
9401 struct pci_dev *pdev;
9402 unsigned long bar0map_len, bar1map_len, bar2map_len;
9403 int error = -ENODEV;
2fcee4bf 9404 uint32_t if_type;
da0436e9
JS		 9405
9406 /* Obtain PCI device reference */
9407 if (!phba->pcidev)
9408 return error;
9409 else
9410 pdev = phba->pcidev;
9411
9412 /* Set the device DMA mask size */
8e68597d
MR		 9413 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
9414 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
9415 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
9416 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
da0436e9 9417 return error;
8e68597d
MR		 9418 }
9419 }
da0436e9 9420
2fcee4bf
JS		 9421 /*
9422 * The BARs and register set definitions and offset locations are
9423 * dependent on the if_type.
9424 */
9425 if (pci_read_config_dword(pdev, LPFC_SLI_INTF,
9426 &phba->sli4_hba.sli_intf.word0)) {
9427 return error;
9428 }
9429
9430 /* There is no SLI3 failback for SLI4 devices. */
9431 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
9432 LPFC_SLI_INTF_VALID) {
9433 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9434 "2894 SLI_INTF reg contents invalid "
9435 "sli_intf reg 0x%x\n",
9436 phba->sli4_hba.sli_intf.word0);
9437 return error;
9438 }
9439
9440 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9441 /*
9442 * Get the bus address of SLI4 device Bar regions and the
9443 * number of bytes required by each mapping. The mapping of the
9444 * particular PCI BARs regions is dependent on the type of
9445 * SLI4 device.
da0436e9 9446 */
f5ca6f2e
JS		 9447 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) {
9448 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0);
9449 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0);
2fcee4bf
JS		 9450
9451 /*
9452 * Map SLI4 PCI Config Space Register base to a kernel virtual
9453 * addr
9454 */
9455 phba->sli4_hba.conf_regs_memmap_p =
9456 ioremap(phba->pci_bar0_map, bar0map_len);
9457 if (!phba->sli4_hba.conf_regs_memmap_p) {
9458 dev_printk(KERN_ERR, &pdev->dev,
9459 "ioremap failed for SLI4 PCI config "
9460 "registers.\n");
9461 goto out;
9462 }
f5ca6f2e 9463 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
2fcee4bf
JS		 9464 /* Set up BAR0 PCI config space register memory map */
9465 lpfc_sli4_bar0_register_memmap(phba, if_type);
1dfb5a47
JS		 9466 } else {
9467 phba->pci_bar0_map = pci_resource_start(pdev, 1);
9468 bar0map_len = pci_resource_len(pdev, 1);
2fcee4bf
JS		 9469 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
9470 dev_printk(KERN_ERR, &pdev->dev,
9471 "FATAL - No BAR0 mapping for SLI4, if_type 2\n");
9472 goto out;
9473 }
9474 phba->sli4_hba.conf_regs_memmap_p =
da0436e9 9475 ioremap(phba->pci_bar0_map, bar0map_len);
2fcee4bf
JS		 9476 if (!phba->sli4_hba.conf_regs_memmap_p) {
9477 dev_printk(KERN_ERR, &pdev->dev,
9478 "ioremap failed for SLI4 PCI config "
9479 "registers.\n");
9480 goto out;
9481 }
9482 lpfc_sli4_bar0_register_memmap(phba, if_type);
da0436e9
JS		 9483 }
9484
e4b9794e
JS		 9485 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
9486 if (pci_resource_start(pdev, PCI_64BIT_BAR2)) {
9487 /*
9488 * Map SLI4 if type 0 HBA Control Register base to a
9489 * kernel virtual address and setup the registers.
9490 */
9491 phba->pci_bar1_map = pci_resource_start(pdev,
9492 PCI_64BIT_BAR2);
9493 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
9494 phba->sli4_hba.ctrl_regs_memmap_p =
9495 ioremap(phba->pci_bar1_map,
9496 bar1map_len);
9497 if (!phba->sli4_hba.ctrl_regs_memmap_p) {
9498 dev_err(&pdev->dev,
9499 "ioremap failed for SLI4 HBA "
9500 "control registers.\n");
9501 error = -ENOMEM;
9502 goto out_iounmap_conf;
9503 }
9504 phba->pci_bar2_memmap_p =
9505 phba->sli4_hba.ctrl_regs_memmap_p;
9506 lpfc_sli4_bar1_register_memmap(phba);
9507 } else {
9508 error = -ENOMEM;
2fcee4bf
JS		 9509 goto out_iounmap_conf;
9510 }
da0436e9
JS		 9511 }
9512
e4b9794e
JS		 9513 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
9514 if (pci_resource_start(pdev, PCI_64BIT_BAR4)) {
9515 /*
9516 * Map SLI4 if type 0 HBA Doorbell Register base to
9517 * a kernel virtual address and setup the registers.
9518 */
9519 phba->pci_bar2_map = pci_resource_start(pdev,
9520 PCI_64BIT_BAR4);
9521 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
9522 phba->sli4_hba.drbl_regs_memmap_p =
9523 ioremap(phba->pci_bar2_map,
9524 bar2map_len);
9525 if (!phba->sli4_hba.drbl_regs_memmap_p) {
9526 dev_err(&pdev->dev,
9527 "ioremap failed for SLI4 HBA"
9528 " doorbell registers.\n");
9529 error = -ENOMEM;
9530 goto out_iounmap_ctrl;
9531 }
9532 phba->pci_bar4_memmap_p =
9533 phba->sli4_hba.drbl_regs_memmap_p;
9534 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
9535 if (error)
9536 goto out_iounmap_all;
9537 } else {
9538 error = -ENOMEM;
2fcee4bf 9539 goto out_iounmap_all;
e4b9794e 9540 }
da0436e9
JS		 9541 }
9542
da0436e9
JS		 9543 return 0;
9544
9545out_iounmap_all:
9546 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
9547out_iounmap_ctrl:
9548 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
9549out_iounmap_conf:
9550 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9551out:
9552 return error;
9553}
9554
9555/**
9556 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space.
9557 * @phba: pointer to lpfc hba data structure.
9558 *
9559 * This routine is invoked to unset the PCI device memory space for device
9560 * with SLI-4 interface spec.
9561 **/
9562static void
9563lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba)
9564{
2e90f4b5
JS		 9565 uint32_t if_type;
9566 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
da0436e9 9567
2e90f4b5
JS		 9568 switch (if_type) {
9569 case LPFC_SLI_INTF_IF_TYPE_0:
9570 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
9571 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
9572 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9573 break;
9574 case LPFC_SLI_INTF_IF_TYPE_2:
9575 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9576 break;
9577 case LPFC_SLI_INTF_IF_TYPE_1:
9578 default:
9579 dev_printk(KERN_ERR, &phba->pcidev->dev,
9580 "FATAL - unsupported SLI4 interface type - %d\n",
9581 if_type);
9582 break;
9583 }
da0436e9
JS		 9584}
9585
9586/**
9587 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device
9588 * @phba: pointer to lpfc hba data structure.
9589 *
9590 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9591 * with SLI-3 interface specs.
da0436e9
JS		 9592 *
9593 * Return codes
af901ca1 9594 * 0 - successful
da0436e9
JS		 9595 * other values - error
9596 **/
9597static int
9598lpfc_sli_enable_msix(struct lpfc_hba *phba)
9599{
45ffac19 9600 int rc;
da0436e9
JS		 9601 LPFC_MBOXQ_t *pmb;
9602
9603 /* Set up MSI-X multi-message vectors */
45ffac19
CH		 9604 rc = pci_alloc_irq_vectors(phba->pcidev,
9605 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX);
9606 if (rc < 0) {
da0436e9
JS		 9607 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9608 "0420 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9609 goto vec_fail_out;
da0436e9 9610 }
45ffac19 9611
da0436e9
JS		 9612 /*
9613 * Assign MSI-X vectors to interrupt handlers
9614 */
9615
9616 /* vector-0 is associated to slow-path handler */
45ffac19 9617 rc = request_irq(pci_irq_vector(phba->pcidev, 0),
ed243d37 9618 &lpfc_sli_sp_intr_handler, 0,
da0436e9
JS		 9619 LPFC_SP_DRIVER_HANDLER_NAME, phba);
9620 if (rc) {
9621 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9622 "0421 MSI-X slow-path request_irq failed "
9623 "(%d)\n", rc);
9624 goto msi_fail_out;
9625 }
9626
9627 /* vector-1 is associated to fast-path handler */
45ffac19 9628 rc = request_irq(pci_irq_vector(phba->pcidev, 1),
ed243d37 9629 &lpfc_sli_fp_intr_handler, 0,
da0436e9
JS		 9630 LPFC_FP_DRIVER_HANDLER_NAME, phba);
9631
9632 if (rc) {
9633 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9634 "0429 MSI-X fast-path request_irq failed "
9635 "(%d)\n", rc);
9636 goto irq_fail_out;
9637 }
9638
9639 /*
9640 * Configure HBA MSI-X attention conditions to messages
9641 */
9642 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9643
9644 if (!pmb) {
9645 rc = -ENOMEM;
9646 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9647 "0474 Unable to allocate memory for issuing "
9648 "MBOX_CONFIG_MSI command\n");
9649 goto mem_fail_out;
9650 }
9651 rc = lpfc_config_msi(phba, pmb);
9652 if (rc)
9653 goto mbx_fail_out;
9654 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
9655 if (rc != MBX_SUCCESS) {
9656 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX,
9657 "0351 Config MSI mailbox command failed, "
9658 "mbxCmd x%x, mbxStatus x%x\n",
9659 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus);
9660 goto mbx_fail_out;
9661 }
9662
9663 /* Free memory allocated for mailbox command */
9664 mempool_free(pmb, phba->mbox_mem_pool);
9665 return rc;
9666
9667mbx_fail_out:
9668 /* Free memory allocated for mailbox command */
9669 mempool_free(pmb, phba->mbox_mem_pool);
9670
9671mem_fail_out:
9672 /* free the irq already requested */
45ffac19 9673 free_irq(pci_irq_vector(phba->pcidev, 1), phba);
da0436e9
JS		 9674
9675irq_fail_out:
9676 /* free the irq already requested */
45ffac19 9677 free_irq(pci_irq_vector(phba->pcidev, 0), phba);
da0436e9
JS		 9678
9679msi_fail_out:
9680 /* Unconfigure MSI-X capability structure */
45ffac19 9681 pci_free_irq_vectors(phba->pcidev);
029165ac
AG		 9682
9683vec_fail_out:
da0436e9
JS		 9684 return rc;
9685}
9686
da0436e9
JS		 9687/**
9688 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device.
9689 * @phba: pointer to lpfc hba data structure.
9690 *
9691 * This routine is invoked to enable the MSI interrupt mode to device with
9692 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to
9693 * enable the MSI vector. The device driver is responsible for calling the
9694 * request_irq() to register MSI vector with a interrupt the handler, which
9695 * is done in this function.
9696 *
9697 * Return codes
af901ca1 9698 * 0 - successful
da0436e9
JS		 9699 * other values - error
9700 */
9701static int
9702lpfc_sli_enable_msi(struct lpfc_hba *phba)
9703{
9704 int rc;
9705
9706 rc = pci_enable_msi(phba->pcidev);
9707 if (!rc)
9708 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9709 "0462 PCI enable MSI mode success.\n");
9710 else {
9711 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9712 "0471 PCI enable MSI mode failed (%d)\n", rc);
9713 return rc;
9714 }
9715
9716 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
ed243d37 9717 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS		 9718 if (rc) {
9719 pci_disable_msi(phba->pcidev);
9720 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9721 "0478 MSI request_irq failed (%d)\n", rc);
9722 }
9723 return rc;
9724}
9725
da0436e9
JS		 9726/**
9727 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device.
9728 * @phba: pointer to lpfc hba data structure.
9729 *
9730 * This routine is invoked to enable device interrupt and associate driver's
9731 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface
9732 * spec. Depends on the interrupt mode configured to the driver, the driver
9733 * will try to fallback from the configured interrupt mode to an interrupt
9734 * mode which is supported by the platform, kernel, and device in the order
9735 * of:
9736 * MSI-X -> MSI -> IRQ.
9737 *
9738 * Return codes
af901ca1 9739 * 0 - successful
da0436e9
JS		 9740 * other values - error
9741 **/
9742static uint32_t
9743lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9744{
9745 uint32_t intr_mode = LPFC_INTR_ERROR;
9746 int retval;
9747
9748 if (cfg_mode == 2) {
9749 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */
9750 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3);
9751 if (!retval) {
9752 /* Now, try to enable MSI-X interrupt mode */
9753 retval = lpfc_sli_enable_msix(phba);
9754 if (!retval) {
9755 /* Indicate initialization to MSI-X mode */
9756 phba->intr_type = MSIX;
9757 intr_mode = 2;
9758 }
9759 }
9760 }
9761
9762 /* Fallback to MSI if MSI-X initialization failed */
9763 if (cfg_mode >= 1 && phba->intr_type == NONE) {
9764 retval = lpfc_sli_enable_msi(phba);
9765 if (!retval) {
9766 /* Indicate initialization to MSI mode */
9767 phba->intr_type = MSI;
9768 intr_mode = 1;
9769 }
9770 }
9771
9772 /* Fallback to INTx if both MSI-X/MSI initalization failed */
9773 if (phba->intr_type == NONE) {
9774 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
9775 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
9776 if (!retval) {
9777 /* Indicate initialization to INTx mode */
9778 phba->intr_type = INTx;
9779 intr_mode = 0;
9780 }
9781 }
9782 return intr_mode;
9783}
9784
9785/**
9786 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device.
9787 * @phba: pointer to lpfc hba data structure.
9788 *
9789 * This routine is invoked to disable device interrupt and disassociate the
9790 * driver's interrupt handler(s) from interrupt vector(s) to device with
9791 * SLI-3 interface spec. Depending on the interrupt mode, the driver will
9792 * release the interrupt vector(s) for the message signaled interrupt.
9793 **/
9794static void
9795lpfc_sli_disable_intr(struct lpfc_hba *phba)
9796{
45ffac19
CH		 9797 int nr_irqs, i;
9798
da0436e9 9799 if (phba->intr_type == MSIX)
45ffac19
CH		 9800 nr_irqs = LPFC_MSIX_VECTORS;
9801 else
9802 nr_irqs = 1;
9803
9804 for (i = 0; i < nr_irqs; i++)
9805 free_irq(pci_irq_vector(phba->pcidev, i), phba);
9806 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS		 9807
9808 /* Reset interrupt management states */
9809 phba->intr_type = NONE;
9810 phba->sli.slistat.sli_intr = 0;
da0436e9
JS		 9811}
9812
7bb03bbf 9813/**
895427bd 9814 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings
7bb03bbf 9815 * @phba: pointer to lpfc hba data structure.
895427bd
JS		 9816 * @vectors: number of msix vectors allocated.
9817 *
9818 * The routine will figure out the CPU affinity assignment for every
9819 * MSI-X vector allocated for the HBA. The hba_eq_hdl will be updated
9820 * with a pointer to the CPU mask that defines ALL the CPUs this vector
9821 * can be associated with. If the vector can be unquely associated with
9822 * a single CPU, that CPU will be recorded in hba_eq_hdl[index].cpu.
9823 * In addition, the CPU to IO channel mapping will be calculated
9824 * and the phba->sli4_hba.cpu_map array will reflect this.
7bb03bbf 9825 */
895427bd
JS		 9826static void
9827lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
7bb03bbf
JS		 9828{
9829 struct lpfc_vector_map_info *cpup;
895427bd
JS		 9830 int index = 0;
9831 int vec = 0;
7bb03bbf 9832 int cpu;
7bb03bbf
JS		 9833#ifdef CONFIG_X86
9834 struct cpuinfo_x86 *cpuinfo;
9835#endif
7bb03bbf
JS		 9836
9837 /* Init cpu_map array */
9838 memset(phba->sli4_hba.cpu_map, 0xff,
9839 (sizeof(struct lpfc_vector_map_info) *
895427bd 9840 phba->sli4_hba.num_present_cpu));
7bb03bbf
JS		 9841
9842 /* Update CPU map with physical id and core id of each CPU */
9843 cpup = phba->sli4_hba.cpu_map;
9844 for (cpu = 0; cpu < phba->sli4_hba.num_present_cpu; cpu++) {
9845#ifdef CONFIG_X86
9846 cpuinfo = &cpu_data(cpu);
9847 cpup->phys_id = cpuinfo->phys_proc_id;
9848 cpup->core_id = cpuinfo->cpu_core_id;
9849#else
9850 /* No distinction between CPUs for other platforms */
9851 cpup->phys_id = 0;
9852 cpup->core_id = 0;
9853#endif
895427bd
JS		 9854 cpup->channel_id = index; /* For now round robin */
9855 cpup->irq = pci_irq_vector(phba->pcidev, vec);
9856 vec++;
9857 if (vec >= vectors)
9858 vec = 0;
9859 index++;
9860 if (index >= phba->cfg_fcp_io_channel)
9861 index = 0;
7bb03bbf
JS		 9862 cpup++;
9863 }
7bb03bbf
JS		 9864}
9865
9866
da0436e9
JS		 9867/**
9868 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device
9869 * @phba: pointer to lpfc hba data structure.
9870 *
9871 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9872 * with SLI-4 interface spec.
da0436e9
JS		 9873 *
9874 * Return codes
af901ca1 9875 * 0 - successful
da0436e9
JS		 9876 * other values - error
9877 **/
9878static int
9879lpfc_sli4_enable_msix(struct lpfc_hba *phba)
9880{
75baf696 9881 int vectors, rc, index;
b83d005e 9882 char *name;
da0436e9
JS		 9883
9884 /* Set up MSI-X multi-message vectors */
895427bd 9885 vectors = phba->io_channel_irqs;
45ffac19 9886 if (phba->cfg_fof)
1ba981fd 9887 vectors++;
45ffac19 9888
f358dd0c
JS		 9889 rc = pci_alloc_irq_vectors(phba->pcidev,
9890 (phba->nvmet_support) ? 1 : 2,
9891 vectors, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
4f871e1b 9892 if (rc < 0) {
da0436e9
JS		 9893 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9894 "0484 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9895 goto vec_fail_out;
da0436e9 9896 }
4f871e1b 9897 vectors = rc;
75baf696 9898
7bb03bbf 9899 /* Assign MSI-X vectors to interrupt handlers */
67d12733 9900 for (index = 0; index < vectors; index++) {
b83d005e
JS		 9901 name = phba->sli4_hba.hba_eq_hdl[index].handler_name;
9902 memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ);
9903 snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ,
4305f183 9904 LPFC_DRIVER_HANDLER_NAME"%d", index);
da0436e9 9905
895427bd
JS		 9906 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9907 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
9908 atomic_set(&phba->sli4_hba.hba_eq_hdl[index].hba_eq_in_use, 1);
1ba981fd 9909 if (phba->cfg_fof && (index == (vectors - 1)))
45ffac19 9910 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9911 &lpfc_sli4_fof_intr_handler, 0,
b83d005e 9912 name,
895427bd 9913 &phba->sli4_hba.hba_eq_hdl[index]);
1ba981fd 9914 else
45ffac19 9915 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9916 &lpfc_sli4_hba_intr_handler, 0,
b83d005e 9917 name,
895427bd 9918 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9
JS		 9919 if (rc) {
9920 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9921 "0486 MSI-X fast-path (%d) "
9922 "request_irq failed (%d)\n", index, rc);
9923 goto cfg_fail_out;
9924 }
9925 }
9926
1ba981fd
JS		 9927 if (phba->cfg_fof)
9928 vectors--;
9929
895427bd 9930 if (vectors != phba->io_channel_irqs) {
82c3e9ba
JS		 9931 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9932 "3238 Reducing IO channels to match number of "
9933 "MSI-X vectors, requested %d got %d\n",
895427bd
JS		 9934 phba->io_channel_irqs, vectors);
9935 if (phba->cfg_fcp_io_channel > vectors)
9936 phba->cfg_fcp_io_channel = vectors;
9937 if (phba->cfg_nvme_io_channel > vectors)
9938 phba->cfg_nvme_io_channel = vectors;
9939 if (phba->cfg_fcp_io_channel > phba->cfg_nvme_io_channel)
9940 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
9941 else
9942 phba->io_channel_irqs = phba->cfg_nvme_io_channel;
82c3e9ba 9943 }
895427bd 9944 lpfc_cpu_affinity_check(phba, vectors);
7bb03bbf 9945
da0436e9
JS		 9946 return rc;
9947
9948cfg_fail_out:
9949 /* free the irq already requested */
895427bd
JS		 9950 for (--index; index >= 0; index--)
9951 free_irq(pci_irq_vector(phba->pcidev, index),
9952 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9 9953
da0436e9 9954 /* Unconfigure MSI-X capability structure */
45ffac19 9955 pci_free_irq_vectors(phba->pcidev);
029165ac
AG		 9956
9957vec_fail_out:
da0436e9
JS		 9958 return rc;
9959}
9960
da0436e9
JS		 9961/**
9962 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device
9963 * @phba: pointer to lpfc hba data structure.
9964 *
9965 * This routine is invoked to enable the MSI interrupt mode to device with
9966 * SLI-4 interface spec. The kernel function pci_enable_msi() is called
9967 * to enable the MSI vector. The device driver is responsible for calling
9968 * the request_irq() to register MSI vector with a interrupt the handler,
9969 * which is done in this function.
9970 *
9971 * Return codes
af901ca1 9972 * 0 - successful
da0436e9
JS		 9973 * other values - error
9974 **/
9975static int
9976lpfc_sli4_enable_msi(struct lpfc_hba *phba)
9977{
9978 int rc, index;
9979
9980 rc = pci_enable_msi(phba->pcidev);
9981 if (!rc)
9982 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9983 "0487 PCI enable MSI mode success.\n");
9984 else {
9985 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9986 "0488 PCI enable MSI mode failed (%d)\n", rc);
9987 return rc;
9988 }
9989
9990 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
ed243d37 9991 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS		 9992 if (rc) {
9993 pci_disable_msi(phba->pcidev);
9994 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9995 "0490 MSI request_irq failed (%d)\n", rc);
75baf696 9996 return rc;
da0436e9
JS		 9997 }
9998
895427bd
JS		 9999 for (index = 0; index < phba->io_channel_irqs; index++) {
10000 phba->sli4_hba.hba_eq_hdl[index].idx = index;
10001 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
da0436e9
JS		 10002 }
10003
1ba981fd 10004 if (phba->cfg_fof) {
895427bd
JS		 10005 phba->sli4_hba.hba_eq_hdl[index].idx = index;
10006 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
1ba981fd 10007 }
75baf696 10008 return 0;
da0436e9
JS		 10009}
10010
da0436e9
JS		 10011/**
10012 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device
10013 * @phba: pointer to lpfc hba data structure.
10014 *
10015 * This routine is invoked to enable device interrupt and associate driver's
10016 * interrupt handler(s) to interrupt vector(s) to device with SLI-4
10017 * interface spec. Depends on the interrupt mode configured to the driver,
10018 * the driver will try to fallback from the configured interrupt mode to an
10019 * interrupt mode which is supported by the platform, kernel, and device in
10020 * the order of:
10021 * MSI-X -> MSI -> IRQ.
10022 *
10023 * Return codes
af901ca1 10024 * 0 - successful
da0436e9
JS		 10025 * other values - error
10026 **/
10027static uint32_t
10028lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
10029{
10030 uint32_t intr_mode = LPFC_INTR_ERROR;
895427bd 10031 int retval, idx;
da0436e9
JS		 10032
10033 if (cfg_mode == 2) {
10034 /* Preparation before conf_msi mbox cmd */
10035 retval = 0;
10036 if (!retval) {
10037 /* Now, try to enable MSI-X interrupt mode */
10038 retval = lpfc_sli4_enable_msix(phba);
10039 if (!retval) {
10040 /* Indicate initialization to MSI-X mode */
10041 phba->intr_type = MSIX;
10042 intr_mode = 2;
10043 }
10044 }
10045 }
10046
10047 /* Fallback to MSI if MSI-X initialization failed */
10048 if (cfg_mode >= 1 && phba->intr_type == NONE) {
10049 retval = lpfc_sli4_enable_msi(phba);
10050 if (!retval) {
10051 /* Indicate initialization to MSI mode */
10052 phba->intr_type = MSI;
10053 intr_mode = 1;
10054 }
10055 }
10056
10057 /* Fallback to INTx if both MSI-X/MSI initalization failed */
10058 if (phba->intr_type == NONE) {
10059 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
10060 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
10061 if (!retval) {
895427bd
JS		 10062 struct lpfc_hba_eq_hdl *eqhdl;
10063
da0436e9
JS		 10064 /* Indicate initialization to INTx mode */
10065 phba->intr_type = INTx;
10066 intr_mode = 0;
895427bd
JS		 10067
10068 for (idx = 0; idx < phba->io_channel_irqs; idx++) {
10069 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
10070 eqhdl->idx = idx;
10071 eqhdl->phba = phba;
10072 atomic_set(&eqhdl->hba_eq_in_use, 1);
da0436e9 10073 }
1ba981fd 10074 if (phba->cfg_fof) {
895427bd
JS		 10075 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
10076 eqhdl->idx = idx;
10077 eqhdl->phba = phba;
10078 atomic_set(&eqhdl->hba_eq_in_use, 1);
1ba981fd 10079 }
da0436e9
JS		 10080 }
10081 }
10082 return intr_mode;
10083}
10084
10085/**
10086 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device
10087 * @phba: pointer to lpfc hba data structure.
10088 *
10089 * This routine is invoked to disable device interrupt and disassociate
10090 * the driver's interrupt handler(s) from interrupt vector(s) to device
10091 * with SLI-4 interface spec. Depending on the interrupt mode, the driver
10092 * will release the interrupt vector(s) for the message signaled interrupt.
10093 **/
10094static void
10095lpfc_sli4_disable_intr(struct lpfc_hba *phba)
10096{
10097 /* Disable the currently initialized interrupt mode */
45ffac19
CH		 10098 if (phba->intr_type == MSIX) {
10099 int index;
10100
10101 /* Free up MSI-X multi-message vectors */
895427bd
JS		 10102 for (index = 0; index < phba->io_channel_irqs; index++)
10103 free_irq(pci_irq_vector(phba->pcidev, index),
10104 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19
CH		 10105
10106 if (phba->cfg_fof)
895427bd
JS		 10107 free_irq(pci_irq_vector(phba->pcidev, index),
10108 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19 10109 } else {
da0436e9 10110 free_irq(phba->pcidev->irq, phba);
45ffac19
CH		 10111 }
10112
10113 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS		 10114
10115 /* Reset interrupt management states */
10116 phba->intr_type = NONE;
10117 phba->sli.slistat.sli_intr = 0;
da0436e9
JS		 10118}
10119
10120/**
10121 * lpfc_unset_hba - Unset SLI3 hba device initialization
10122 * @phba: pointer to lpfc hba data structure.
10123 *
10124 * This routine is invoked to unset the HBA device initialization steps to
10125 * a device with SLI-3 interface spec.
10126 **/
10127static void
10128lpfc_unset_hba(struct lpfc_hba *phba)
10129{
10130 struct lpfc_vport *vport = phba->pport;
10131 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
10132
10133 spin_lock_irq(shost->host_lock);
10134 vport->load_flag |= FC_UNLOADING;
10135 spin_unlock_irq(shost->host_lock);
10136
72859909
JS		 10137 kfree(phba->vpi_bmask);
10138 kfree(phba->vpi_ids);
10139
da0436e9
JS		 10140 lpfc_stop_hba_timers(phba);
10141
10142 phba->pport->work_port_events = 0;
10143
10144 lpfc_sli_hba_down(phba);
10145
10146 lpfc_sli_brdrestart(phba);
10147
10148 lpfc_sli_disable_intr(phba);
10149
10150 return;
10151}
10152
5af5eee7
JS		 10153/**
10154 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy
10155 * @phba: Pointer to HBA context object.
10156 *
10157 * This function is called in the SLI4 code path to wait for completion
10158 * of device's XRIs exchange busy. It will check the XRI exchange busy
10159 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after
10160 * that, it will check the XRI exchange busy on outstanding FCP and ELS
10161 * I/Os every 30 seconds, log error message, and wait forever. Only when
10162 * all XRI exchange busy complete, the driver unload shall proceed with
10163 * invoking the function reset ioctl mailbox command to the CNA and the
10164 * the rest of the driver unload resource release.
10165 **/
10166static void
10167lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba)
10168{
10169 int wait_time = 0;
895427bd 10170 int nvme_xri_cmpl = 1;
86c67379 10171 int nvmet_xri_cmpl = 1;
895427bd 10172 int fcp_xri_cmpl = 1;
5af5eee7
JS		 10173 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
10174
c3725bdc
JS		 10175 /* Driver just aborted IOs during the hba_unset process. Pause
10176 * here to give the HBA time to complete the IO and get entries
10177 * into the abts lists.
10178 */
10179 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1 * 5);
10180
10181 /* Wait for NVME pending IO to flush back to transport. */
10182 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
10183 lpfc_nvme_wait_for_io_drain(phba);
10184
895427bd
JS		 10185 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
10186 fcp_xri_cmpl =
10187 list_empty(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
86c67379 10188 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd
JS		 10189 nvme_xri_cmpl =
10190 list_empty(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
86c67379
JS		 10191 nvmet_xri_cmpl =
10192 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
10193 }
895427bd 10194
f358dd0c
JS		 10195 while (!fcp_xri_cmpl || !els_xri_cmpl || !nvme_xri_cmpl ||
10196 !nvmet_xri_cmpl) {
5af5eee7 10197 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) {
895427bd
JS		 10198 if (!nvme_xri_cmpl)
10199 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10200 "6100 NVME XRI exchange busy "
10201 "wait time: %d seconds.\n",
10202 wait_time/1000);
5af5eee7
JS		 10203 if (!fcp_xri_cmpl)
10204 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10205 "2877 FCP XRI exchange busy "
10206 "wait time: %d seconds.\n",
10207 wait_time/1000);
10208 if (!els_xri_cmpl)
10209 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10210 "2878 ELS XRI exchange busy "
10211 "wait time: %d seconds.\n",
10212 wait_time/1000);
10213 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2);
10214 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2;
10215 } else {
10216 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1);
10217 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1;
10218 }
86c67379 10219 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd
JS		 10220 nvme_xri_cmpl = list_empty(
10221 &phba->sli4_hba.lpfc_abts_nvme_buf_list);
86c67379
JS		 10222 nvmet_xri_cmpl = list_empty(
10223 &phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
10224 }
895427bd
JS		 10225
10226 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
10227 fcp_xri_cmpl = list_empty(
10228 &phba->sli4_hba.lpfc_abts_scsi_buf_list);
10229
5af5eee7
JS		 10230 els_xri_cmpl =
10231 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c 10232
5af5eee7
JS		 10233 }
10234}
10235
da0436e9
JS		 10236/**
10237 * lpfc_sli4_hba_unset - Unset the fcoe hba
10238 * @phba: Pointer to HBA context object.
10239 *
10240 * This function is called in the SLI4 code path to reset the HBA's FCoE
10241 * function. The caller is not required to hold any lock. This routine
10242 * issues PCI function reset mailbox command to reset the FCoE function.
10243 * At the end of the function, it calls lpfc_hba_down_post function to
10244 * free any pending commands.
10245 **/
10246static void
10247lpfc_sli4_hba_unset(struct lpfc_hba *phba)
10248{
10249 int wait_cnt = 0;
10250 LPFC_MBOXQ_t *mboxq;
912e3acd 10251 struct pci_dev *pdev = phba->pcidev;
da0436e9
JS		 10252
10253 lpfc_stop_hba_timers(phba);
10254 phba->sli4_hba.intr_enable = 0;
10255
10256 /*
10257 * Gracefully wait out the potential current outstanding asynchronous
10258 * mailbox command.
10259 */
10260
10261 /* First, block any pending async mailbox command from posted */
10262 spin_lock_irq(&phba->hbalock);
10263 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
10264 spin_unlock_irq(&phba->hbalock);
10265 /* Now, trying to wait it out if we can */
10266 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
10267 msleep(10);
10268 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT)
10269 break;
10270 }
10271 /* Forcefully release the outstanding mailbox command if timed out */
10272 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
10273 spin_lock_irq(&phba->hbalock);
10274 mboxq = phba->sli.mbox_active;
10275 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
10276 __lpfc_mbox_cmpl_put(phba, mboxq);
10277 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
10278 phba->sli.mbox_active = NULL;
10279 spin_unlock_irq(&phba->hbalock);
10280 }
10281
5af5eee7
JS		 10282 /* Abort all iocbs associated with the hba */
10283 lpfc_sli_hba_iocb_abort(phba);
10284
10285 /* Wait for completion of device XRI exchange busy */
10286 lpfc_sli4_xri_exchange_busy_wait(phba);
10287
da0436e9
JS		 10288 /* Disable PCI subsystem interrupt */
10289 lpfc_sli4_disable_intr(phba);
10290
912e3acd
JS		 10291 /* Disable SR-IOV if enabled */
10292 if (phba->cfg_sriov_nr_virtfn)
10293 pci_disable_sriov(pdev);
10294
da0436e9
JS		 10295 /* Stop kthread signal shall trigger work_done one more time */
10296 kthread_stop(phba->worker_thread);
10297
d1f525aa
JS		 10298 /* Unset the queues shared with the hardware then release all
10299 * allocated resources.
10300 */
10301 lpfc_sli4_queue_unset(phba);
10302 lpfc_sli4_queue_destroy(phba);
10303
3677a3a7
JS		 10304 /* Reset SLI4 HBA FCoE function */
10305 lpfc_pci_function_reset(phba);
10306
da0436e9
JS		 10307 /* Stop the SLI4 device port */
10308 phba->pport->work_port_events = 0;
10309}
10310
28baac74
JS		 10311 /**
10312 * lpfc_pc_sli4_params_get - Get the SLI4_PARAMS port capabilities.
10313 * @phba: Pointer to HBA context object.
10314 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
10315 *
10316 * This function is called in the SLI4 code path to read the port's
10317 * sli4 capabilities.
10318 *
10319 * This function may be be called from any context that can block-wait
10320 * for the completion. The expectation is that this routine is called
10321 * typically from probe_one or from the online routine.
10322 **/
10323int
10324lpfc_pc_sli4_params_get(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
10325{
10326 int rc;
10327 struct lpfc_mqe *mqe;
10328 struct lpfc_pc_sli4_params *sli4_params;
10329 uint32_t mbox_tmo;
10330
10331 rc = 0;
10332 mqe = &mboxq->u.mqe;
10333
10334 /* Read the port's SLI4 Parameters port capabilities */
fedd3b7b 10335 lpfc_pc_sli4_params(mboxq);
28baac74
JS		 10336 if (!phba->sli4_hba.intr_enable)
10337 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
10338 else {
a183a15f 10339 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
28baac74
JS		 10340 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
10341 }
10342
10343 if (unlikely(rc))
10344 return 1;
10345
10346 sli4_params = &phba->sli4_hba.pc_sli4_params;
10347 sli4_params->if_type = bf_get(if_type, &mqe->un.sli4_params);
10348 sli4_params->sli_rev = bf_get(sli_rev, &mqe->un.sli4_params);
10349 sli4_params->sli_family = bf_get(sli_family, &mqe->un.sli4_params);
10350 sli4_params->featurelevel_1 = bf_get(featurelevel_1,
10351 &mqe->un.sli4_params);
10352 sli4_params->featurelevel_2 = bf_get(featurelevel_2,
10353 &mqe->un.sli4_params);
10354 sli4_params->proto_types = mqe->un.sli4_params.word3;
10355 sli4_params->sge_supp_len = mqe->un.sli4_params.sge_supp_len;
10356 sli4_params->if_page_sz = bf_get(if_page_sz, &mqe->un.sli4_params);
10357 sli4_params->rq_db_window = bf_get(rq_db_window, &mqe->un.sli4_params);
10358 sli4_params->loopbk_scope = bf_get(loopbk_scope, &mqe->un.sli4_params);
10359 sli4_params->eq_pages_max = bf_get(eq_pages, &mqe->un.sli4_params);
10360 sli4_params->eqe_size = bf_get(eqe_size, &mqe->un.sli4_params);
10361 sli4_params->cq_pages_max = bf_get(cq_pages, &mqe->un.sli4_params);
10362 sli4_params->cqe_size = bf_get(cqe_size, &mqe->un.sli4_params);
10363 sli4_params->mq_pages_max = bf_get(mq_pages, &mqe->un.sli4_params);
10364 sli4_params->mqe_size = bf_get(mqe_size, &mqe->un.sli4_params);
10365 sli4_params->mq_elem_cnt = bf_get(mq_elem_cnt, &mqe->un.sli4_params);
10366 sli4_params->wq_pages_max = bf_get(wq_pages, &mqe->un.sli4_params);
10367 sli4_params->wqe_size = bf_get(wqe_size, &mqe->un.sli4_params);
10368 sli4_params->rq_pages_max = bf_get(rq_pages, &mqe->un.sli4_params);
10369 sli4_params->rqe_size = bf_get(rqe_size, &mqe->un.sli4_params);
10370 sli4_params->hdr_pages_max = bf_get(hdr_pages, &mqe->un.sli4_params);
10371 sli4_params->hdr_size = bf_get(hdr_size, &mqe->un.sli4_params);
10372 sli4_params->hdr_pp_align = bf_get(hdr_pp_align, &mqe->un.sli4_params);
10373 sli4_params->sgl_pages_max = bf_get(sgl_pages, &mqe->un.sli4_params);
10374 sli4_params->sgl_pp_align = bf_get(sgl_pp_align, &mqe->un.sli4_params);
0558056c
JS		 10375
10376 /* Make sure that sge_supp_len can be handled by the driver */
10377 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
10378 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
10379
28baac74
JS		 10380 return rc;
10381}
10382
fedd3b7b
JS		 10383/**
10384 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS.
10385 * @phba: Pointer to HBA context object.
10386 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
10387 *
10388 * This function is called in the SLI4 code path to read the port's
10389 * sli4 capabilities.
10390 *
10391 * This function may be be called from any context that can block-wait
10392 * for the completion. The expectation is that this routine is called
10393 * typically from probe_one or from the online routine.
10394 **/
10395int
10396lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
10397{
10398 int rc;
10399 struct lpfc_mqe *mqe = &mboxq->u.mqe;
10400 struct lpfc_pc_sli4_params *sli4_params;
a183a15f 10401 uint32_t mbox_tmo;
fedd3b7b
JS		 10402 int length;
10403 struct lpfc_sli4_parameters *mbx_sli4_parameters;
10404
6d368e53
JS		 10405 /*
10406 * By default, the driver assumes the SLI4 port requires RPI
10407 * header postings. The SLI4_PARAM response will correct this
10408 * assumption.
10409 */
10410 phba->sli4_hba.rpi_hdrs_in_use = 1;
10411
fedd3b7b
JS		 10412 /* Read the port's SLI4 Config Parameters */
10413 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
10414 sizeof(struct lpfc_sli4_cfg_mhdr));
10415 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
10416 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
10417 length, LPFC_SLI4_MBX_EMBED);
10418 if (!phba->sli4_hba.intr_enable)
10419 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
a183a15f
JS		 10420 else {
10421 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
10422 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
10423 }
fedd3b7b
JS		 10424 if (unlikely(rc))
10425 return rc;
10426 sli4_params = &phba->sli4_hba.pc_sli4_params;
10427 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
10428 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters);
10429 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters);
10430 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters);
10431 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1,
10432 mbx_sli4_parameters);
10433 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2,
10434 mbx_sli4_parameters);
10435 if (bf_get(cfg_phwq, mbx_sli4_parameters))
10436 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED;
10437 else
10438 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED;
10439 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len;
10440 sli4_params->loopbk_scope = bf_get(loopbk_scope, mbx_sli4_parameters);
1ba981fd 10441 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters);
fedd3b7b
JS		 10442 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters);
10443 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters);
10444 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters);
10445 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters);
0c651878 10446 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters);
fedd3b7b
JS		 10447 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt,
10448 mbx_sli4_parameters);
895427bd 10449 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters);
fedd3b7b
JS		 10450 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align,
10451 mbx_sli4_parameters);
6d368e53
JS		 10452 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
10453 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
895427bd
JS		 10454 phba->nvme_support = (bf_get(cfg_nvme, mbx_sli4_parameters) &&
10455 bf_get(cfg_xib, mbx_sli4_parameters));
10456
10457 if ((phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) ||
10458 !phba->nvme_support) {
10459 phba->nvme_support = 0;
10460 phba->nvmet_support = 0;
bcb24f65 10461 phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_OFF;
895427bd
JS		 10462 phba->cfg_nvme_io_channel = 0;
10463 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
10464 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
10465 "6101 Disabling NVME support: "
10466 "Not supported by firmware: %d %d\n",
10467 bf_get(cfg_nvme, mbx_sli4_parameters),
10468 bf_get(cfg_xib, mbx_sli4_parameters));
10469
10470 /* If firmware doesn't support NVME, just use SCSI support */
10471 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
10472 return -ENODEV;
10473 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
10474 }
0558056c 10475
f358dd0c
JS		 10476 if (bf_get(cfg_xib, mbx_sli4_parameters) && phba->cfg_suppress_rsp)
10477 phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP;
10478
0cf07f84
JS		 10479 if (bf_get(cfg_eqdr, mbx_sli4_parameters))
10480 phba->sli.sli_flag |= LPFC_SLI_USE_EQDR;
10481
0558056c
JS		 10482 /* Make sure that sge_supp_len can be handled by the driver */
10483 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
10484 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
10485
b5c53958 10486 /*
c176ffa0
JS		 10487 * Check whether the adapter supports an embedded copy of the
10488 * FCP CMD IU within the WQE for FCP_Ixxx commands. In order
10489 * to use this option, 128-byte WQEs must be used.
b5c53958
JS		 10490 */
10491 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters))
10492 phba->fcp_embed_io = 1;
10493 else
10494 phba->fcp_embed_io = 0;
7bdedb34 10495
c176ffa0
JS		 10496 if ((bf_get(cfg_cqpsize, mbx_sli4_parameters) & LPFC_CQ_16K_PAGE_SZ) &&
10497 (bf_get(cfg_wqpsize, mbx_sli4_parameters) & LPFC_WQ_16K_PAGE_SZ) &&
10498 (sli4_params->wqsize & LPFC_WQ_SZ128_SUPPORT))
10499 phba->enab_exp_wqcq_pages = 1;
10500 else
10501 phba->enab_exp_wqcq_pages = 0;
7bdedb34
JS		 10502 /*
10503 * Check if the SLI port supports MDS Diagnostics
10504 */
10505 if (bf_get(cfg_mds_diags, mbx_sli4_parameters))
10506 phba->mds_diags_support = 1;
10507 else
10508 phba->mds_diags_support = 0;
fedd3b7b
JS		 10509 return 0;
10510}
10511
da0436e9
JS		 10512/**
10513 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
10514 * @pdev: pointer to PCI device
10515 * @pid: pointer to PCI device identifier
10516 *
10517 * This routine is to be called to attach a device with SLI-3 interface spec
10518 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
10519 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
10520 * information of the device and driver to see if the driver state that it can
10521 * support this kind of device. If the match is successful, the driver core
10522 * invokes this routine. If this routine determines it can claim the HBA, it
10523 * does all the initialization that it needs to do to handle the HBA properly.
10524 *
10525 * Return code
10526 * 0 - driver can claim the device
10527 * negative value - driver can not claim the device
10528 **/
6f039790 10529static int
da0436e9
JS		 10530lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid)
10531{
10532 struct lpfc_hba *phba;
10533 struct lpfc_vport *vport = NULL;
6669f9bb 10534 struct Scsi_Host *shost = NULL;
da0436e9
JS		 10535 int error;
10536 uint32_t cfg_mode, intr_mode;
10537
10538 /* Allocate memory for HBA structure */
10539 phba = lpfc_hba_alloc(pdev);
10540 if (!phba)
10541 return -ENOMEM;
10542
10543 /* Perform generic PCI device enabling operation */
10544 error = lpfc_enable_pci_dev(phba);
079b5c91 10545 if (error)
da0436e9 10546 goto out_free_phba;
da0436e9
JS		 10547
10548 /* Set up SLI API function jump table for PCI-device group-0 HBAs */
10549 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP);
10550 if (error)
10551 goto out_disable_pci_dev;
10552
10553 /* Set up SLI-3 specific device PCI memory space */
10554 error = lpfc_sli_pci_mem_setup(phba);
10555 if (error) {
10556 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10557 "1402 Failed to set up pci memory space.\n");
10558 goto out_disable_pci_dev;
10559 }
10560
da0436e9
JS		 10561 /* Set up SLI-3 specific device driver resources */
10562 error = lpfc_sli_driver_resource_setup(phba);
10563 if (error) {
10564 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10565 "1404 Failed to set up driver resource.\n");
10566 goto out_unset_pci_mem_s3;
10567 }
10568
10569 /* Initialize and populate the iocb list per host */
d1f525aa 10570
da0436e9
JS		 10571 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT);
10572 if (error) {
10573 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10574 "1405 Failed to initialize iocb list.\n");
10575 goto out_unset_driver_resource_s3;
10576 }
10577
10578 /* Set up common device driver resources */
10579 error = lpfc_setup_driver_resource_phase2(phba);
10580 if (error) {
10581 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10582 "1406 Failed to set up driver resource.\n");
10583 goto out_free_iocb_list;
10584 }
10585
079b5c91
JS		 10586 /* Get the default values for Model Name and Description */
10587 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
10588
da0436e9
JS		 10589 /* Create SCSI host to the physical port */
10590 error = lpfc_create_shost(phba);
10591 if (error) {
10592 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10593 "1407 Failed to create scsi host.\n");
10594 goto out_unset_driver_resource;
10595 }
10596
10597 /* Configure sysfs attributes */
10598 vport = phba->pport;
10599 error = lpfc_alloc_sysfs_attr(vport);
10600 if (error) {
10601 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10602 "1476 Failed to allocate sysfs attr\n");
10603 goto out_destroy_shost;
10604 }
10605
6669f9bb 10606 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
da0436e9
JS		 10607 /* Now, trying to enable interrupt and bring up the device */
10608 cfg_mode = phba->cfg_use_msi;
10609 while (true) {
10610 /* Put device to a known state before enabling interrupt */
10611 lpfc_stop_port(phba);
10612 /* Configure and enable interrupt */
10613 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode);
10614 if (intr_mode == LPFC_INTR_ERROR) {
10615 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10616 "0431 Failed to enable interrupt.\n");
10617 error = -ENODEV;
10618 goto out_free_sysfs_attr;
10619 }
10620 /* SLI-3 HBA setup */
10621 if (lpfc_sli_hba_setup(phba)) {
10622 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10623 "1477 Failed to set up hba\n");
10624 error = -ENODEV;
10625 goto out_remove_device;
10626 }
10627
10628 /* Wait 50ms for the interrupts of previous mailbox commands */
10629 msleep(50);
10630 /* Check active interrupts on message signaled interrupts */
10631 if (intr_mode == 0 ||
10632 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) {
10633 /* Log the current active interrupt mode */
10634 phba->intr_mode = intr_mode;
10635 lpfc_log_intr_mode(phba, intr_mode);
10636 break;
10637 } else {
10638 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10639 "0447 Configure interrupt mode (%d) "
10640 "failed active interrupt test.\n",
10641 intr_mode);
10642 /* Disable the current interrupt mode */
10643 lpfc_sli_disable_intr(phba);
10644 /* Try next level of interrupt mode */
10645 cfg_mode = --intr_mode;
10646 }
10647 }
10648
10649 /* Perform post initialization setup */
10650 lpfc_post_init_setup(phba);
10651
10652 /* Check if there are static vports to be created. */
10653 lpfc_create_static_vport(phba);
10654
10655 return 0;
10656
10657out_remove_device:
10658 lpfc_unset_hba(phba);
10659out_free_sysfs_attr:
10660 lpfc_free_sysfs_attr(vport);
10661out_destroy_shost:
10662 lpfc_destroy_shost(phba);
10663out_unset_driver_resource:
10664 lpfc_unset_driver_resource_phase2(phba);
10665out_free_iocb_list:
10666 lpfc_free_iocb_list(phba);
10667out_unset_driver_resource_s3:
10668 lpfc_sli_driver_resource_unset(phba);
10669out_unset_pci_mem_s3:
10670 lpfc_sli_pci_mem_unset(phba);
10671out_disable_pci_dev:
10672 lpfc_disable_pci_dev(phba);
6669f9bb
JS		 10673 if (shost)
10674 scsi_host_put(shost);
da0436e9
JS		 10675out_free_phba:
10676 lpfc_hba_free(phba);
10677 return error;
10678}
10679
10680/**
10681 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem.
10682 * @pdev: pointer to PCI device
10683 *
10684 * This routine is to be called to disattach a device with SLI-3 interface
10685 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
10686 * removed from PCI bus, it performs all the necessary cleanup for the HBA
10687 * device to be removed from the PCI subsystem properly.
10688 **/
6f039790 10689static void
da0436e9
JS		 10690lpfc_pci_remove_one_s3(struct pci_dev *pdev)
10691{
10692 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10693 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
10694 struct lpfc_vport **vports;
10695 struct lpfc_hba *phba = vport->phba;
10696 int i;
da0436e9
JS		 10697
10698 spin_lock_irq(&phba->hbalock);
10699 vport->load_flag |= FC_UNLOADING;
10700 spin_unlock_irq(&phba->hbalock);
10701
10702 lpfc_free_sysfs_attr(vport);
10703
10704 /* Release all the vports against this physical port */
10705 vports = lpfc_create_vport_work_array(phba);
10706 if (vports != NULL)
587a37f6
JS		 10707 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
10708 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
10709 continue;
da0436e9 10710 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 10711 }
da0436e9
JS		 10712 lpfc_destroy_vport_work_array(phba, vports);
10713
10714 /* Remove FC host and then SCSI host with the physical port */
10715 fc_remove_host(shost);
10716 scsi_remove_host(shost);
d613b6a7 10717
da0436e9
JS		 10718 lpfc_cleanup(vport);
10719
10720 /*
10721 * Bring down the SLI Layer. This step disable all interrupts,
10722 * clears the rings, discards all mailbox commands, and resets
10723 * the HBA.
10724 */
10725
48e34d0f 10726 /* HBA interrupt will be disabled after this call */
da0436e9
JS		 10727 lpfc_sli_hba_down(phba);
10728 /* Stop kthread signal shall trigger work_done one more time */
10729 kthread_stop(phba->worker_thread);
10730 /* Final cleanup of txcmplq and reset the HBA */
10731 lpfc_sli_brdrestart(phba);
10732
72859909
JS		 10733 kfree(phba->vpi_bmask);
10734 kfree(phba->vpi_ids);
10735
da0436e9
JS		 10736 lpfc_stop_hba_timers(phba);
10737 spin_lock_irq(&phba->hbalock);
10738 list_del_init(&vport->listentry);
10739 spin_unlock_irq(&phba->hbalock);
10740
10741 lpfc_debugfs_terminate(vport);
10742
912e3acd
JS		 10743 /* Disable SR-IOV if enabled */
10744 if (phba->cfg_sriov_nr_virtfn)
10745 pci_disable_sriov(pdev);
10746
da0436e9
JS		 10747 /* Disable interrupt */
10748 lpfc_sli_disable_intr(phba);
10749
da0436e9
JS		 10750 scsi_host_put(shost);
10751
10752 /*
10753 * Call scsi_free before mem_free since scsi bufs are released to their
10754 * corresponding pools here.
10755 */
10756 lpfc_scsi_free(phba);
10757 lpfc_mem_free_all(phba);
10758
10759 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
10760 phba->hbqslimp.virt, phba->hbqslimp.phys);
10761
10762 /* Free resources associated with SLI2 interface */
10763 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
10764 phba->slim2p.virt, phba->slim2p.phys);
10765
10766 /* unmap adapter SLIM and Control Registers */
10767 iounmap(phba->ctrl_regs_memmap_p);
10768 iounmap(phba->slim_memmap_p);
10769
10770 lpfc_hba_free(phba);
10771
e0c0483c 10772 pci_release_mem_regions(pdev);
da0436e9
JS		 10773 pci_disable_device(pdev);
10774}
10775
10776/**
10777 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt
10778 * @pdev: pointer to PCI device
10779 * @msg: power management message
10780 *
10781 * This routine is to be called from the kernel's PCI subsystem to support
10782 * system Power Management (PM) to device with SLI-3 interface spec. When
10783 * PM invokes this method, it quiesces the device by stopping the driver's
10784 * worker thread for the device, turning off device's interrupt and DMA,
10785 * and bring the device offline. Note that as the driver implements the
10786 * minimum PM requirements to a power-aware driver's PM support for the
10787 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
10788 * to the suspend() method call will be treated as SUSPEND and the driver will
10789 * fully reinitialize its device during resume() method call, the driver will
10790 * set device to PCI_D3hot state in PCI config space instead of setting it
10791 * according to the @msg provided by the PM.
10792 *
10793 * Return code
10794 * 0 - driver suspended the device
10795 * Error otherwise
10796 **/
10797static int
10798lpfc_pci_suspend_one_s3(struct pci_dev *pdev, pm_message_t msg)
10799{
10800 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10801 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10802
10803 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10804 "0473 PCI device Power Management suspend.\n");
10805
10806 /* Bring down the device */
618a5230 10807 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS		 10808 lpfc_offline(phba);
10809 kthread_stop(phba->worker_thread);
10810
10811 /* Disable interrupt from device */
10812 lpfc_sli_disable_intr(phba);
10813
10814 /* Save device state to PCI config space */
10815 pci_save_state(pdev);
10816 pci_set_power_state(pdev, PCI_D3hot);
10817
10818 return 0;
10819}
10820
10821/**
10822 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt
10823 * @pdev: pointer to PCI device
10824 *
10825 * This routine is to be called from the kernel's PCI subsystem to support
10826 * system Power Management (PM) to device with SLI-3 interface spec. When PM
10827 * invokes this method, it restores the device's PCI config space state and
10828 * fully reinitializes the device and brings it online. Note that as the
10829 * driver implements the minimum PM requirements to a power-aware driver's
10830 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE,
10831 * FREEZE) to the suspend() method call will be treated as SUSPEND and the
10832 * driver will fully reinitialize its device during resume() method call,
10833 * the device will be set to PCI_D0 directly in PCI config space before
10834 * restoring the state.
10835 *
10836 * Return code
10837 * 0 - driver suspended the device
10838 * Error otherwise
10839 **/
10840static int
10841lpfc_pci_resume_one_s3(struct pci_dev *pdev)
10842{
10843 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10844 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10845 uint32_t intr_mode;
10846 int error;
10847
10848 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10849 "0452 PCI device Power Management resume.\n");
10850
10851 /* Restore device state from PCI config space */
10852 pci_set_power_state(pdev, PCI_D0);
10853 pci_restore_state(pdev);
0d878419 10854
1dfb5a47
JS		 10855 /*
10856 * As the new kernel behavior of pci_restore_state() API call clears
10857 * device saved_state flag, need to save the restored state again.
10858 */
10859 pci_save_state(pdev);
10860
da0436e9
JS		 10861 if (pdev->is_busmaster)
10862 pci_set_master(pdev);
10863
10864 /* Startup the kernel thread for this host adapter. */
10865 phba->worker_thread = kthread_run(lpfc_do_work, phba,
10866 "lpfc_worker_%d", phba->brd_no);
10867 if (IS_ERR(phba->worker_thread)) {
10868 error = PTR_ERR(phba->worker_thread);
10869 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10870 "0434 PM resume failed to start worker "
10871 "thread: error=x%x.\n", error);
10872 return error;
10873 }
10874
10875 /* Configure and enable interrupt */
10876 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
10877 if (intr_mode == LPFC_INTR_ERROR) {
10878 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10879 "0430 PM resume Failed to enable interrupt\n");
10880 return -EIO;
10881 } else
10882 phba->intr_mode = intr_mode;
10883
10884 /* Restart HBA and bring it online */
10885 lpfc_sli_brdrestart(phba);
10886 lpfc_online(phba);
10887
10888 /* Log the current active interrupt mode */
10889 lpfc_log_intr_mode(phba, phba->intr_mode);
10890
10891 return 0;
10892}
10893
891478a2
JS		 10894/**
10895 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover
10896 * @phba: pointer to lpfc hba data structure.
10897 *
10898 * This routine is called to prepare the SLI3 device for PCI slot recover. It
e2af0d2e 10899 * aborts all the outstanding SCSI I/Os to the pci device.
891478a2
JS		 10900 **/
10901static void
10902lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
10903{
10904 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10905 "2723 PCI channel I/O abort preparing for recovery\n");
e2af0d2e
JS		 10906
10907 /*
10908 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
10909 * and let the SCSI mid-layer to retry them to recover.
10910 */
db55fba8 10911 lpfc_sli_abort_fcp_rings(phba);
891478a2
JS		 10912}
10913
0d878419
JS		 10914/**
10915 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset
10916 * @phba: pointer to lpfc hba data structure.
10917 *
10918 * This routine is called to prepare the SLI3 device for PCI slot reset. It
10919 * disables the device interrupt and pci device, and aborts the internal FCP
10920 * pending I/Os.
10921 **/
10922static void
10923lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba)
10924{
0d878419 10925 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10926 "2710 PCI channel disable preparing for reset\n");
e2af0d2e 10927
75baf696 10928 /* Block any management I/Os to the device */
618a5230 10929 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
75baf696 10930
e2af0d2e
JS		 10931 /* Block all SCSI devices' I/Os on the host */
10932 lpfc_scsi_dev_block(phba);
10933
ea714f3d
JS		 10934 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
10935 lpfc_sli_flush_fcp_rings(phba);
10936
e2af0d2e
JS		 10937 /* stop all timers */
10938 lpfc_stop_hba_timers(phba);
10939
0d878419
JS		 10940 /* Disable interrupt and pci device */
10941 lpfc_sli_disable_intr(phba);
10942 pci_disable_device(phba->pcidev);
0d878419
JS		 10943}
10944
10945/**
10946 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable
10947 * @phba: pointer to lpfc hba data structure.
10948 *
10949 * This routine is called to prepare the SLI3 device for PCI slot permanently
10950 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
10951 * pending I/Os.
10952 **/
10953static void
75baf696 10954lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba)
0d878419
JS		 10955{
10956 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10957 "2711 PCI channel permanent disable for failure\n");
e2af0d2e
JS		 10958 /* Block all SCSI devices' I/Os on the host */
10959 lpfc_scsi_dev_block(phba);
10960
10961 /* stop all timers */
10962 lpfc_stop_hba_timers(phba);
10963
0d878419
JS		 10964 /* Clean up all driver's outstanding SCSI I/Os */
10965 lpfc_sli_flush_fcp_rings(phba);
10966}
10967
da0436e9
JS		 10968/**
10969 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error
10970 * @pdev: pointer to PCI device.
10971 * @state: the current PCI connection state.
10972 *
10973 * This routine is called from the PCI subsystem for I/O error handling to
10974 * device with SLI-3 interface spec. This function is called by the PCI
10975 * subsystem after a PCI bus error affecting this device has been detected.
10976 * When this function is invoked, it will need to stop all the I/Os and
10977 * interrupt(s) to the device. Once that is done, it will return
10978 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery
10979 * as desired.
10980 *
10981 * Return codes
0d878419 10982 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link
da0436e9
JS		 10983 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
10984 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
10985 **/
10986static pci_ers_result_t
10987lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
10988{
10989 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10990 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
da0436e9 10991
0d878419
JS		 10992 switch (state) {
10993 case pci_channel_io_normal:
891478a2
JS		 10994 /* Non-fatal error, prepare for recovery */
10995 lpfc_sli_prep_dev_for_recover(phba);
0d878419
JS		 10996 return PCI_ERS_RESULT_CAN_RECOVER;
10997 case pci_channel_io_frozen:
10998 /* Fatal error, prepare for slot reset */
10999 lpfc_sli_prep_dev_for_reset(phba);
11000 return PCI_ERS_RESULT_NEED_RESET;
11001 case pci_channel_io_perm_failure:
11002 /* Permanent failure, prepare for device down */
75baf696 11003 lpfc_sli_prep_dev_for_perm_failure(phba);
da0436e9 11004 return PCI_ERS_RESULT_DISCONNECT;
0d878419
JS		 11005 default:
11006 /* Unknown state, prepare and request slot reset */
11007 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11008 "0472 Unknown PCI error state: x%x\n", state);
11009 lpfc_sli_prep_dev_for_reset(phba);
11010 return PCI_ERS_RESULT_NEED_RESET;
da0436e9 11011 }
da0436e9
JS		 11012}
11013
11014/**
11015 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch.
11016 * @pdev: pointer to PCI device.
11017 *
11018 * This routine is called from the PCI subsystem for error handling to
11019 * device with SLI-3 interface spec. This is called after PCI bus has been
11020 * reset to restart the PCI card from scratch, as if from a cold-boot.
11021 * During the PCI subsystem error recovery, after driver returns
11022 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
11023 * recovery and then call this routine before calling the .resume method
11024 * to recover the device. This function will initialize the HBA device,
11025 * enable the interrupt, but it will just put the HBA to offline state
11026 * without passing any I/O traffic.
11027 *
11028 * Return codes
11029 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11030 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
11031 */
11032static pci_ers_result_t
11033lpfc_io_slot_reset_s3(struct pci_dev *pdev)
11034{
11035 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11036 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11037 struct lpfc_sli *psli = &phba->sli;
11038 uint32_t intr_mode;
11039
11040 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
11041 if (pci_enable_device_mem(pdev)) {
11042 printk(KERN_ERR "lpfc: Cannot re-enable "
11043 "PCI device after reset.\n");
11044 return PCI_ERS_RESULT_DISCONNECT;
11045 }
11046
11047 pci_restore_state(pdev);
1dfb5a47
JS		 11048
11049 /*
11050 * As the new kernel behavior of pci_restore_state() API call clears
11051 * device saved_state flag, need to save the restored state again.
11052 */
11053 pci_save_state(pdev);
11054
da0436e9
JS		 11055 if (pdev->is_busmaster)
11056 pci_set_master(pdev);
11057
11058 spin_lock_irq(&phba->hbalock);
11059 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
11060 spin_unlock_irq(&phba->hbalock);
11061
11062 /* Configure and enable interrupt */
11063 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
11064 if (intr_mode == LPFC_INTR_ERROR) {
11065 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11066 "0427 Cannot re-enable interrupt after "
11067 "slot reset.\n");
11068 return PCI_ERS_RESULT_DISCONNECT;
11069 } else
11070 phba->intr_mode = intr_mode;
11071
75baf696 11072 /* Take device offline, it will perform cleanup */
618a5230 11073 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS		 11074 lpfc_offline(phba);
11075 lpfc_sli_brdrestart(phba);
11076
11077 /* Log the current active interrupt mode */
11078 lpfc_log_intr_mode(phba, phba->intr_mode);
11079
11080 return PCI_ERS_RESULT_RECOVERED;
11081}
11082
11083/**
11084 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device.
11085 * @pdev: pointer to PCI device
11086 *
11087 * This routine is called from the PCI subsystem for error handling to device
11088 * with SLI-3 interface spec. It is called when kernel error recovery tells
11089 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
11090 * error recovery. After this call, traffic can start to flow from this device
11091 * again.
11092 */
11093static void
11094lpfc_io_resume_s3(struct pci_dev *pdev)
11095{
11096 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11097 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
3772a991 11098
e2af0d2e 11099 /* Bring device online, it will be no-op for non-fatal error resume */
da0436e9 11100 lpfc_online(phba);
0d878419
JS		 11101
11102 /* Clean up Advanced Error Reporting (AER) if needed */
11103 if (phba->hba_flag & HBA_AER_ENABLED)
11104 pci_cleanup_aer_uncorrect_error_status(pdev);
da0436e9 11105}
3772a991 11106
da0436e9
JS		 11107/**
11108 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve
11109 * @phba: pointer to lpfc hba data structure.
11110 *
11111 * returns the number of ELS/CT IOCBs to reserve
11112 **/
11113int
11114lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba)
11115{
11116 int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
11117
f1126688
JS		 11118 if (phba->sli_rev == LPFC_SLI_REV4) {
11119 if (max_xri <= 100)
6a9c52cf 11120 return 10;
f1126688 11121 else if (max_xri <= 256)
6a9c52cf 11122 return 25;
f1126688 11123 else if (max_xri <= 512)
6a9c52cf 11124 return 50;
f1126688 11125 else if (max_xri <= 1024)
6a9c52cf 11126 return 100;
8a9d2e80 11127 else if (max_xri <= 1536)
6a9c52cf 11128 return 150;
8a9d2e80
JS		 11129 else if (max_xri <= 2048)
11130 return 200;
11131 else
11132 return 250;
f1126688
JS		 11133 } else
11134 return 0;
3772a991
JS		 11135}
11136
895427bd
JS		 11137/**
11138 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve
11139 * @phba: pointer to lpfc hba data structure.
11140 *
f358dd0c 11141 * returns the number of ELS/CT + NVMET IOCBs to reserve
895427bd
JS		 11142 **/
11143int
11144lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba)
11145{
11146 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba);
11147
f358dd0c
JS		 11148 if (phba->nvmet_support)
11149 max_xri += LPFC_NVMET_BUF_POST;
895427bd
JS		 11150 return max_xri;
11151}
11152
11153
52d52440
JS		 11154/**
11155 * lpfc_write_firmware - attempt to write a firmware image to the port
52d52440 11156 * @fw: pointer to firmware image returned from request_firmware.
ce396282 11157 * @phba: pointer to lpfc hba data structure.
52d52440 11158 *
52d52440 11159 **/
ce396282
JS		 11160static void
11161lpfc_write_firmware(const struct firmware *fw, void *context)
52d52440 11162{
ce396282 11163 struct lpfc_hba *phba = (struct lpfc_hba *)context;
6b5151fd 11164 char fwrev[FW_REV_STR_SIZE];
ce396282 11165 struct lpfc_grp_hdr *image;
52d52440
JS		 11166 struct list_head dma_buffer_list;
11167 int i, rc = 0;
11168 struct lpfc_dmabuf *dmabuf, *next;
11169 uint32_t offset = 0, temp_offset = 0;
6b6ef5db 11170 uint32_t magic_number, ftype, fid, fsize;
52d52440 11171
c71ab861 11172 /* It can be null in no-wait mode, sanity check */
ce396282
JS		 11173 if (!fw) {
11174 rc = -ENXIO;
11175 goto out;
11176 }
11177 image = (struct lpfc_grp_hdr *)fw->data;
11178
6b6ef5db
JS		 11179 magic_number = be32_to_cpu(image->magic_number);
11180 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image);
11181 fid = bf_get_be32(lpfc_grp_hdr_id, image),
11182 fsize = be32_to_cpu(image->size);
11183
52d52440 11184 INIT_LIST_HEAD(&dma_buffer_list);
6b6ef5db
JS		 11185 if ((magic_number != LPFC_GROUP_OJECT_MAGIC_G5 &&
11186 magic_number != LPFC_GROUP_OJECT_MAGIC_G6) ||
11187 ftype != LPFC_FILE_TYPE_GROUP || fsize != fw->size) {
52d52440
JS		 11188 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11189 "3022 Invalid FW image found. "
efe583c6 11190 "Magic:%x Type:%x ID:%x Size %d %zd\n",
6b6ef5db 11191 magic_number, ftype, fid, fsize, fw->size);
ce396282
JS		 11192 rc = -EINVAL;
11193 goto release_out;
52d52440
JS		 11194 }
11195 lpfc_decode_firmware_rev(phba, fwrev, 1);
88a2cfbb 11196 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) {
52d52440 11197 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
ce396282 11198 "3023 Updating Firmware, Current Version:%s "
52d52440 11199 "New Version:%s\n",
88a2cfbb 11200 fwrev, image->revision);
52d52440
JS		 11201 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) {
11202 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
11203 GFP_KERNEL);
11204 if (!dmabuf) {
11205 rc = -ENOMEM;
ce396282 11206 goto release_out;
52d52440
JS		 11207 }
11208 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
11209 SLI4_PAGE_SIZE,
11210 &dmabuf->phys,
11211 GFP_KERNEL);
11212 if (!dmabuf->virt) {
11213 kfree(dmabuf);
11214 rc = -ENOMEM;
ce396282 11215 goto release_out;
52d52440
JS		 11216 }
11217 list_add_tail(&dmabuf->list, &dma_buffer_list);
11218 }
11219 while (offset < fw->size) {
11220 temp_offset = offset;
11221 list_for_each_entry(dmabuf, &dma_buffer_list, list) {
079b5c91 11222 if (temp_offset + SLI4_PAGE_SIZE > fw->size) {
52d52440
JS		 11223 memcpy(dmabuf->virt,
11224 fw->data + temp_offset,
079b5c91
JS		 11225 fw->size - temp_offset);
11226 temp_offset = fw->size;
52d52440
JS		 11227 break;
11228 }
52d52440
JS		 11229 memcpy(dmabuf->virt, fw->data + temp_offset,
11230 SLI4_PAGE_SIZE);
88a2cfbb 11231 temp_offset += SLI4_PAGE_SIZE;
52d52440
JS		 11232 }
11233 rc = lpfc_wr_object(phba, &dma_buffer_list,
11234 (fw->size - offset), &offset);
ce396282
JS		 11235 if (rc)
11236 goto release_out;
52d52440
JS		 11237 }
11238 rc = offset;
11239 }
ce396282
JS		 11240
11241release_out:
52d52440
JS		 11242 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) {
11243 list_del(&dmabuf->list);
11244 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
11245 dmabuf->virt, dmabuf->phys);
11246 kfree(dmabuf);
11247 }
ce396282
JS		 11248 release_firmware(fw);
11249out:
11250 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
c71ab861 11251 "3024 Firmware update done: %d.\n", rc);
ce396282 11252 return;
52d52440
JS		 11253}
11254
c71ab861
JS		 11255/**
11256 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade
11257 * @phba: pointer to lpfc hba data structure.
11258 *
11259 * This routine is called to perform Linux generic firmware upgrade on device
11260 * that supports such feature.
11261 **/
11262int
11263lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade)
11264{
11265 uint8_t file_name[ELX_MODEL_NAME_SIZE];
11266 int ret;
11267 const struct firmware *fw;
11268
11269 /* Only supported on SLI4 interface type 2 for now */
11270 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
11271 LPFC_SLI_INTF_IF_TYPE_2)
11272 return -EPERM;
11273
11274 snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName);
11275
11276 if (fw_upgrade == INT_FW_UPGRADE) {
11277 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
11278 file_name, &phba->pcidev->dev,
11279 GFP_KERNEL, (void *)phba,
11280 lpfc_write_firmware);
11281 } else if (fw_upgrade == RUN_FW_UPGRADE) {
11282 ret = request_firmware(&fw, file_name, &phba->pcidev->dev);
11283 if (!ret)
11284 lpfc_write_firmware(fw, (void *)phba);
11285 } else {
11286 ret = -EINVAL;
11287 }
11288
11289 return ret;
11290}
11291
3772a991 11292/**
da0436e9 11293 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys
3772a991
JS		 11294 * @pdev: pointer to PCI device
11295 * @pid: pointer to PCI device identifier
11296 *
da0436e9
JS		 11297 * This routine is called from the kernel's PCI subsystem to device with
11298 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991 11299 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
da0436e9
JS		 11300 * information of the device and driver to see if the driver state that it
11301 * can support this kind of device. If the match is successful, the driver
11302 * core invokes this routine. If this routine determines it can claim the HBA,
11303 * it does all the initialization that it needs to do to handle the HBA
11304 * properly.
3772a991
JS		 11305 *
11306 * Return code
11307 * 0 - driver can claim the device
11308 * negative value - driver can not claim the device
11309 **/
6f039790 11310static int
da0436e9 11311lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
3772a991
JS		 11312{
11313 struct lpfc_hba *phba;
11314 struct lpfc_vport *vport = NULL;
6669f9bb 11315 struct Scsi_Host *shost = NULL;
6c621a22 11316 int error;
3772a991
JS		 11317 uint32_t cfg_mode, intr_mode;
11318
11319 /* Allocate memory for HBA structure */
11320 phba = lpfc_hba_alloc(pdev);
11321 if (!phba)
11322 return -ENOMEM;
11323
11324 /* Perform generic PCI device enabling operation */
11325 error = lpfc_enable_pci_dev(phba);
079b5c91 11326 if (error)
3772a991 11327 goto out_free_phba;
3772a991 11328
da0436e9
JS		 11329 /* Set up SLI API function jump table for PCI-device group-1 HBAs */
11330 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC);
3772a991
JS		 11331 if (error)
11332 goto out_disable_pci_dev;
11333
da0436e9
JS		 11334 /* Set up SLI-4 specific device PCI memory space */
11335 error = lpfc_sli4_pci_mem_setup(phba);
3772a991
JS		 11336 if (error) {
11337 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11338 "1410 Failed to set up pci memory space.\n");
3772a991
JS		 11339 goto out_disable_pci_dev;
11340 }
11341
da0436e9
JS		 11342 /* Set up SLI-4 Specific device driver resources */
11343 error = lpfc_sli4_driver_resource_setup(phba);
3772a991
JS		 11344 if (error) {
11345 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9
JS		 11346 "1412 Failed to set up driver resource.\n");
11347 goto out_unset_pci_mem_s4;
3772a991
JS		 11348 }
11349
19ca7609 11350 INIT_LIST_HEAD(&phba->active_rrq_list);
7d791df7 11351 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list);
19ca7609 11352
3772a991
JS		 11353 /* Set up common device driver resources */
11354 error = lpfc_setup_driver_resource_phase2(phba);
11355 if (error) {
11356 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11357 "1414 Failed to set up driver resource.\n");
6c621a22 11358 goto out_unset_driver_resource_s4;
3772a991
JS		 11359 }
11360
079b5c91
JS		 11361 /* Get the default values for Model Name and Description */
11362 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
11363
3772a991
JS		 11364 /* Create SCSI host to the physical port */
11365 error = lpfc_create_shost(phba);
11366 if (error) {
11367 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11368 "1415 Failed to create scsi host.\n");
3772a991
JS		 11369 goto out_unset_driver_resource;
11370 }
9399627f 11371
5b75da2f 11372 /* Configure sysfs attributes */
3772a991
JS		 11373 vport = phba->pport;
11374 error = lpfc_alloc_sysfs_attr(vport);
11375 if (error) {
9399627f 11376 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11377 "1416 Failed to allocate sysfs attr\n");
3772a991 11378 goto out_destroy_shost;
98c9ea5c 11379 }
875fbdfe 11380
6669f9bb 11381 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
3772a991 11382 /* Now, trying to enable interrupt and bring up the device */
5b75da2f 11383 cfg_mode = phba->cfg_use_msi;
5b75da2f 11384
7b15db32
JS		 11385 /* Put device to a known state before enabling interrupt */
11386 lpfc_stop_port(phba);
895427bd 11387
7b15db32
JS		 11388 /* Configure and enable interrupt */
11389 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode);
11390 if (intr_mode == LPFC_INTR_ERROR) {
11391 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11392 "0426 Failed to enable interrupt.\n");
11393 error = -ENODEV;
11394 goto out_free_sysfs_attr;
11395 }
11396 /* Default to single EQ for non-MSI-X */
895427bd
JS		 11397 if (phba->intr_type != MSIX) {
11398 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
11399 phba->cfg_fcp_io_channel = 1;
2d7dbc4c 11400 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd 11401 phba->cfg_nvme_io_channel = 1;
2d7dbc4c
JS		 11402 if (phba->nvmet_support)
11403 phba->cfg_nvmet_mrq = 1;
11404 }
895427bd
JS		 11405 phba->io_channel_irqs = 1;
11406 }
11407
7b15db32
JS		 11408 /* Set up SLI-4 HBA */
11409 if (lpfc_sli4_hba_setup(phba)) {
11410 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11411 "1421 Failed to set up hba\n");
11412 error = -ENODEV;
11413 goto out_disable_intr;
98c9ea5c 11414 }
858c9f6c 11415
7b15db32
JS		 11416 /* Log the current active interrupt mode */
11417 phba->intr_mode = intr_mode;
11418 lpfc_log_intr_mode(phba, intr_mode);
11419
3772a991
JS		 11420 /* Perform post initialization setup */
11421 lpfc_post_init_setup(phba);
dea3101e 11422
01649561
JS		 11423 /* NVME support in FW earlier in the driver load corrects the
11424 * FC4 type making a check for nvme_support unnecessary.
11425 */
11426 if ((phba->nvmet_support == 0) &&
11427 (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)) {
11428 /* Create NVME binding with nvme_fc_transport. This
d1f525aa
JS		 11429 * ensures the vport is initialized. If the localport
11430 * create fails, it should not unload the driver to
11431 * support field issues.
01649561
JS		 11432 */
11433 error = lpfc_nvme_create_localport(vport);
11434 if (error) {
11435 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11436 "6004 NVME registration failed, "
11437 "error x%x\n",
11438 error);
01649561
JS		 11439 }
11440 }
895427bd 11441
c71ab861
JS		 11442 /* check for firmware upgrade or downgrade */
11443 if (phba->cfg_request_firmware_upgrade)
db6f1c2f 11444 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE);
52d52440 11445
1c6834a7
JS		 11446 /* Check if there are static vports to be created. */
11447 lpfc_create_static_vport(phba);
dea3101e 11448 return 0;
11449
da0436e9
JS		 11450out_disable_intr:
11451 lpfc_sli4_disable_intr(phba);
5b75da2f
JS		 11452out_free_sysfs_attr:
11453 lpfc_free_sysfs_attr(vport);
3772a991
JS		 11454out_destroy_shost:
11455 lpfc_destroy_shost(phba);
11456out_unset_driver_resource:
11457 lpfc_unset_driver_resource_phase2(phba);
da0436e9
JS		 11458out_unset_driver_resource_s4:
11459 lpfc_sli4_driver_resource_unset(phba);
11460out_unset_pci_mem_s4:
11461 lpfc_sli4_pci_mem_unset(phba);
3772a991
JS		 11462out_disable_pci_dev:
11463 lpfc_disable_pci_dev(phba);
6669f9bb
JS		 11464 if (shost)
11465 scsi_host_put(shost);
2e0fef85 11466out_free_phba:
3772a991 11467 lpfc_hba_free(phba);
dea3101e 11468 return error;
11469}
11470
e59058c4 11471/**
da0436e9 11472 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem
e59058c4
JS		 11473 * @pdev: pointer to PCI device
11474 *
da0436e9
JS		 11475 * This routine is called from the kernel's PCI subsystem to device with
11476 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991
JS		 11477 * removed from PCI bus, it performs all the necessary cleanup for the HBA
11478 * device to be removed from the PCI subsystem properly.
e59058c4 11479 **/
6f039790 11480static void
da0436e9 11481lpfc_pci_remove_one_s4(struct pci_dev *pdev)
dea3101e 11482{
da0436e9 11483 struct Scsi_Host *shost = pci_get_drvdata(pdev);
2e0fef85 11484 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
eada272d 11485 struct lpfc_vport **vports;
da0436e9 11486 struct lpfc_hba *phba = vport->phba;
eada272d 11487 int i;
8a4df120 11488
da0436e9 11489 /* Mark the device unloading flag */
549e55cd 11490 spin_lock_irq(&phba->hbalock);
51ef4c26 11491 vport->load_flag |= FC_UNLOADING;
549e55cd 11492 spin_unlock_irq(&phba->hbalock);
2e0fef85 11493
da0436e9 11494 /* Free the HBA sysfs attributes */
858c9f6c
JS		 11495 lpfc_free_sysfs_attr(vport);
11496
eada272d
JS		 11497 /* Release all the vports against this physical port */
11498 vports = lpfc_create_vport_work_array(phba);
11499 if (vports != NULL)
587a37f6
JS		 11500 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
11501 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
11502 continue;
eada272d 11503 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 11504 }
eada272d
JS		 11505 lpfc_destroy_vport_work_array(phba, vports);
11506
11507 /* Remove FC host and then SCSI host with the physical port */
858c9f6c
JS		 11508 fc_remove_host(shost);
11509 scsi_remove_host(shost);
da0436e9 11510
d613b6a7
JS		 11511 /* Perform ndlp cleanup on the physical port. The nvme and nvmet
11512 * localports are destroyed after to cleanup all transport memory.
895427bd 11513 */
87af33fe 11514 lpfc_cleanup(vport);
d613b6a7
JS		 11515 lpfc_nvmet_destroy_targetport(phba);
11516 lpfc_nvme_destroy_localport(vport);
87af33fe 11517
281d6190
JS		 11518 /*
11519 * Bring down the SLI Layer. This step disables all interrupts,
11520 * clears the rings, discards all mailbox commands, and resets
11521 * the HBA FCoE function.
11522 */
11523 lpfc_debugfs_terminate(vport);
11524 lpfc_sli4_hba_unset(phba);
a257bf90 11525
1901762f 11526 lpfc_stop_hba_timers(phba);
858c9f6c
JS		 11527 spin_lock_irq(&phba->hbalock);
11528 list_del_init(&vport->listentry);
11529 spin_unlock_irq(&phba->hbalock);
11530
3677a3a7 11531 /* Perform scsi free before driver resource_unset since scsi
da0436e9 11532 * buffers are released to their corresponding pools here.
2e0fef85
JS		 11533 */
11534 lpfc_scsi_free(phba);
895427bd 11535 lpfc_nvme_free(phba);
01649561 11536 lpfc_free_iocb_list(phba);
67d12733 11537
da0436e9 11538 lpfc_sli4_driver_resource_unset(phba);
ed957684 11539
da0436e9
JS		 11540 /* Unmap adapter Control and Doorbell registers */
11541 lpfc_sli4_pci_mem_unset(phba);
2e0fef85 11542
da0436e9
JS		 11543 /* Release PCI resources and disable device's PCI function */
11544 scsi_host_put(shost);
11545 lpfc_disable_pci_dev(phba);
2e0fef85 11546
da0436e9 11547 /* Finally, free the driver's device data structure */
3772a991 11548 lpfc_hba_free(phba);
2e0fef85 11549
da0436e9 11550 return;
dea3101e 11551}
11552
3a55b532 11553/**
da0436e9 11554 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt
3a55b532
JS		 11555 * @pdev: pointer to PCI device
11556 * @msg: power management message
11557 *
da0436e9
JS		 11558 * This routine is called from the kernel's PCI subsystem to support system
11559 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes
11560 * this method, it quiesces the device by stopping the driver's worker
11561 * thread for the device, turning off device's interrupt and DMA, and bring
11562 * the device offline. Note that as the driver implements the minimum PM
11563 * requirements to a power-aware driver's PM support for suspend/resume -- all
11564 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend()
11565 * method call will be treated as SUSPEND and the driver will fully
11566 * reinitialize its device during resume() method call, the driver will set
11567 * device to PCI_D3hot state in PCI config space instead of setting it
3772a991 11568 * according to the @msg provided by the PM.
3a55b532
JS		 11569 *
11570 * Return code
3772a991
JS		 11571 * 0 - driver suspended the device
11572 * Error otherwise
3a55b532
JS		 11573 **/
11574static int
da0436e9 11575lpfc_pci_suspend_one_s4(struct pci_dev *pdev, pm_message_t msg)
3a55b532
JS		 11576{
11577 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11578 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11579
11580 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
75baf696 11581 "2843 PCI device Power Management suspend.\n");
3a55b532
JS		 11582
11583 /* Bring down the device */
618a5230 11584 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
3a55b532
JS		 11585 lpfc_offline(phba);
11586 kthread_stop(phba->worker_thread);
11587
11588 /* Disable interrupt from device */
da0436e9 11589 lpfc_sli4_disable_intr(phba);
5350d872 11590 lpfc_sli4_queue_destroy(phba);
3a55b532
JS		 11591
11592 /* Save device state to PCI config space */
11593 pci_save_state(pdev);
11594 pci_set_power_state(pdev, PCI_D3hot);
11595
11596 return 0;
11597}
11598
11599/**
da0436e9 11600 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt
3a55b532
JS		 11601 * @pdev: pointer to PCI device
11602 *
da0436e9
JS		 11603 * This routine is called from the kernel's PCI subsystem to support system
11604 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes
11605 * this method, it restores the device's PCI config space state and fully
11606 * reinitializes the device and brings it online. Note that as the driver
11607 * implements the minimum PM requirements to a power-aware driver's PM for
11608 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
11609 * to the suspend() method call will be treated as SUSPEND and the driver
11610 * will fully reinitialize its device during resume() method call, the device
11611 * will be set to PCI_D0 directly in PCI config space before restoring the
11612 * state.
3a55b532
JS		 11613 *
11614 * Return code
3772a991
JS		 11615 * 0 - driver suspended the device
11616 * Error otherwise
3a55b532
JS		 11617 **/
11618static int
da0436e9 11619lpfc_pci_resume_one_s4(struct pci_dev *pdev)
3a55b532
JS		 11620{
11621 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11622 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
5b75da2f 11623 uint32_t intr_mode;
3a55b532
JS		 11624 int error;
11625
11626 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
da0436e9 11627 "0292 PCI device Power Management resume.\n");
3a55b532
JS		 11628
11629 /* Restore device state from PCI config space */
11630 pci_set_power_state(pdev, PCI_D0);
11631 pci_restore_state(pdev);
1dfb5a47
JS		 11632
11633 /*
11634 * As the new kernel behavior of pci_restore_state() API call clears
11635 * device saved_state flag, need to save the restored state again.
11636 */
11637 pci_save_state(pdev);
11638
3a55b532
JS		 11639 if (pdev->is_busmaster)
11640 pci_set_master(pdev);
11641
da0436e9 11642 /* Startup the kernel thread for this host adapter. */
3a55b532
JS		 11643 phba->worker_thread = kthread_run(lpfc_do_work, phba,
11644 "lpfc_worker_%d", phba->brd_no);
11645 if (IS_ERR(phba->worker_thread)) {
11646 error = PTR_ERR(phba->worker_thread);
11647 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11648 "0293 PM resume failed to start worker "
3a55b532
JS		 11649 "thread: error=x%x.\n", error);
11650 return error;
11651 }
11652
5b75da2f 11653 /* Configure and enable interrupt */
da0436e9 11654 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
5b75da2f 11655 if (intr_mode == LPFC_INTR_ERROR) {
3a55b532 11656 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11657 "0294 PM resume Failed to enable interrupt\n");
5b75da2f
JS		 11658 return -EIO;
11659 } else
11660 phba->intr_mode = intr_mode;
3a55b532
JS		 11661
11662 /* Restart HBA and bring it online */
11663 lpfc_sli_brdrestart(phba);
11664 lpfc_online(phba);
11665
5b75da2f
JS		 11666 /* Log the current active interrupt mode */
11667 lpfc_log_intr_mode(phba, phba->intr_mode);
11668
3a55b532
JS		 11669 return 0;
11670}
11671
75baf696
JS		 11672/**
11673 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover
11674 * @phba: pointer to lpfc hba data structure.
11675 *
11676 * This routine is called to prepare the SLI4 device for PCI slot recover. It
11677 * aborts all the outstanding SCSI I/Os to the pci device.
11678 **/
11679static void
11680lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba)
11681{
75baf696
JS		 11682 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11683 "2828 PCI channel I/O abort preparing for recovery\n");
11684 /*
11685 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
11686 * and let the SCSI mid-layer to retry them to recover.
11687 */
db55fba8 11688 lpfc_sli_abort_fcp_rings(phba);
75baf696
JS		 11689}
11690
11691/**
11692 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset
11693 * @phba: pointer to lpfc hba data structure.
11694 *
11695 * This routine is called to prepare the SLI4 device for PCI slot reset. It
11696 * disables the device interrupt and pci device, and aborts the internal FCP
11697 * pending I/Os.
11698 **/
11699static void
11700lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba)
11701{
11702 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11703 "2826 PCI channel disable preparing for reset\n");
11704
11705 /* Block any management I/Os to the device */
618a5230 11706 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT);
75baf696
JS		 11707
11708 /* Block all SCSI devices' I/Os on the host */
11709 lpfc_scsi_dev_block(phba);
11710
ea714f3d
JS		 11711 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
11712 lpfc_sli_flush_fcp_rings(phba);
11713
c3725bdc
JS		 11714 /* Flush the outstanding NVME IOs if fc4 type enabled. */
11715 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
11716 lpfc_sli_flush_nvme_rings(phba);
11717
75baf696
JS		 11718 /* stop all timers */
11719 lpfc_stop_hba_timers(phba);
11720
11721 /* Disable interrupt and pci device */
11722 lpfc_sli4_disable_intr(phba);
5350d872 11723 lpfc_sli4_queue_destroy(phba);
75baf696 11724 pci_disable_device(phba->pcidev);
75baf696
JS		 11725}
11726
11727/**
11728 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable
11729 * @phba: pointer to lpfc hba data structure.
11730 *
11731 * This routine is called to prepare the SLI4 device for PCI slot permanently
11732 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
11733 * pending I/Os.
11734 **/
11735static void
11736lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba)
11737{
11738 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11739 "2827 PCI channel permanent disable for failure\n");
11740
11741 /* Block all SCSI devices' I/Os on the host */
11742 lpfc_scsi_dev_block(phba);
11743
11744 /* stop all timers */
11745 lpfc_stop_hba_timers(phba);
11746
11747 /* Clean up all driver's outstanding SCSI I/Os */
11748 lpfc_sli_flush_fcp_rings(phba);
c3725bdc
JS		 11749
11750 /* Flush the outstanding NVME IOs if fc4 type enabled. */
11751 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
11752 lpfc_sli_flush_nvme_rings(phba);
75baf696
JS		 11753}
11754
8d63f375 11755/**
da0436e9 11756 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device
e59058c4
JS		 11757 * @pdev: pointer to PCI device.
11758 * @state: the current PCI connection state.
8d63f375 11759 *
da0436e9
JS		 11760 * This routine is called from the PCI subsystem for error handling to device
11761 * with SLI-4 interface spec. This function is called by the PCI subsystem
11762 * after a PCI bus error affecting this device has been detected. When this
11763 * function is invoked, it will need to stop all the I/Os and interrupt(s)
11764 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET
11765 * for the PCI subsystem to perform proper recovery as desired.
e59058c4
JS		 11766 *
11767 * Return codes
3772a991
JS		 11768 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
11769 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
e59058c4 11770 **/
3772a991 11771static pci_ers_result_t
da0436e9 11772lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state)
8d63f375 11773{
75baf696
JS		 11774 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11775 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11776
11777 switch (state) {
11778 case pci_channel_io_normal:
11779 /* Non-fatal error, prepare for recovery */
11780 lpfc_sli4_prep_dev_for_recover(phba);
11781 return PCI_ERS_RESULT_CAN_RECOVER;
11782 case pci_channel_io_frozen:
11783 /* Fatal error, prepare for slot reset */
11784 lpfc_sli4_prep_dev_for_reset(phba);
11785 return PCI_ERS_RESULT_NEED_RESET;
11786 case pci_channel_io_perm_failure:
11787 /* Permanent failure, prepare for device down */
11788 lpfc_sli4_prep_dev_for_perm_failure(phba);
11789 return PCI_ERS_RESULT_DISCONNECT;
11790 default:
11791 /* Unknown state, prepare and request slot reset */
11792 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11793 "2825 Unknown PCI error state: x%x\n", state);
11794 lpfc_sli4_prep_dev_for_reset(phba);
11795 return PCI_ERS_RESULT_NEED_RESET;
11796 }
8d63f375
LV		 11797}
11798
11799/**
da0436e9 11800 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch
e59058c4
JS		 11801 * @pdev: pointer to PCI device.
11802 *
da0436e9
JS		 11803 * This routine is called from the PCI subsystem for error handling to device
11804 * with SLI-4 interface spec. It is called after PCI bus has been reset to
11805 * restart the PCI card from scratch, as if from a cold-boot. During the
11806 * PCI subsystem error recovery, after the driver returns
3772a991 11807 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
da0436e9
JS		 11808 * recovery and then call this routine before calling the .resume method to
11809 * recover the device. This function will initialize the HBA device, enable
11810 * the interrupt, but it will just put the HBA to offline state without
11811 * passing any I/O traffic.
8d63f375 11812 *
e59058c4 11813 * Return codes
3772a991
JS		 11814 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11815 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
8d63f375 11816 */
3772a991 11817static pci_ers_result_t
da0436e9 11818lpfc_io_slot_reset_s4(struct pci_dev *pdev)
8d63f375 11819{
75baf696
JS		 11820 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11821 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11822 struct lpfc_sli *psli = &phba->sli;
11823 uint32_t intr_mode;
11824
11825 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
11826 if (pci_enable_device_mem(pdev)) {
11827 printk(KERN_ERR "lpfc: Cannot re-enable "
11828 "PCI device after reset.\n");
11829 return PCI_ERS_RESULT_DISCONNECT;
11830 }
11831
11832 pci_restore_state(pdev);
0a96e975
JS		 11833
11834 /*
11835 * As the new kernel behavior of pci_restore_state() API call clears
11836 * device saved_state flag, need to save the restored state again.
11837 */
11838 pci_save_state(pdev);
11839
75baf696
JS		 11840 if (pdev->is_busmaster)
11841 pci_set_master(pdev);
11842
11843 spin_lock_irq(&phba->hbalock);
11844 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
11845 spin_unlock_irq(&phba->hbalock);
11846
11847 /* Configure and enable interrupt */
11848 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
11849 if (intr_mode == LPFC_INTR_ERROR) {
11850 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11851 "2824 Cannot re-enable interrupt after "
11852 "slot reset.\n");
11853 return PCI_ERS_RESULT_DISCONNECT;
11854 } else
11855 phba->intr_mode = intr_mode;
11856
11857 /* Log the current active interrupt mode */
11858 lpfc_log_intr_mode(phba, phba->intr_mode);
11859
8d63f375
LV		 11860 return PCI_ERS_RESULT_RECOVERED;
11861}
11862
11863/**
da0436e9 11864 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device
e59058c4 11865 * @pdev: pointer to PCI device
8d63f375 11866 *
3772a991 11867 * This routine is called from the PCI subsystem for error handling to device
da0436e9 11868 * with SLI-4 interface spec. It is called when kernel error recovery tells
3772a991
JS		 11869 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
11870 * error recovery. After this call, traffic can start to flow from this device
11871 * again.
da0436e9 11872 **/
3772a991 11873static void
da0436e9 11874lpfc_io_resume_s4(struct pci_dev *pdev)
8d63f375 11875{
75baf696
JS		 11876 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11877 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11878
11879 /*
11880 * In case of slot reset, as function reset is performed through
11881 * mailbox command which needs DMA to be enabled, this operation
11882 * has to be moved to the io resume phase. Taking device offline
11883 * will perform the necessary cleanup.
11884 */
11885 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) {
11886 /* Perform device reset */
618a5230 11887 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
75baf696
JS		 11888 lpfc_offline(phba);
11889 lpfc_sli_brdrestart(phba);
11890 /* Bring the device back online */
11891 lpfc_online(phba);
11892 }
11893
11894 /* Clean up Advanced Error Reporting (AER) if needed */
11895 if (phba->hba_flag & HBA_AER_ENABLED)
11896 pci_cleanup_aer_uncorrect_error_status(pdev);
8d63f375
LV		 11897}
11898
3772a991
JS		 11899/**
11900 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem
11901 * @pdev: pointer to PCI device
11902 * @pid: pointer to PCI device identifier
11903 *
11904 * This routine is to be registered to the kernel's PCI subsystem. When an
11905 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks
11906 * at PCI device-specific information of the device and driver to see if the
11907 * driver state that it can support this kind of device. If the match is
11908 * successful, the driver core invokes this routine. This routine dispatches
11909 * the action to the proper SLI-3 or SLI-4 device probing routine, which will
11910 * do all the initialization that it needs to do to handle the HBA device
11911 * properly.
11912 *
11913 * Return code
11914 * 0 - driver can claim the device
11915 * negative value - driver can not claim the device
11916 **/
6f039790 11917static int
3772a991
JS		 11918lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
11919{
11920 int rc;
8fa38513 11921 struct lpfc_sli_intf intf;
3772a991 11922
28baac74 11923 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
3772a991
JS		 11924 return -ENODEV;
11925
8fa38513 11926 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
28baac74 11927 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
da0436e9 11928 rc = lpfc_pci_probe_one_s4(pdev, pid);
8fa38513 11929 else
3772a991 11930 rc = lpfc_pci_probe_one_s3(pdev, pid);
8fa38513 11931
3772a991
JS		 11932 return rc;
11933}
11934
11935/**
11936 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem
11937 * @pdev: pointer to PCI device
11938 *
11939 * This routine is to be registered to the kernel's PCI subsystem. When an
11940 * Emulex HBA is removed from PCI bus, the driver core invokes this routine.
11941 * This routine dispatches the action to the proper SLI-3 or SLI-4 device
11942 * remove routine, which will perform all the necessary cleanup for the
11943 * device to be removed from the PCI subsystem properly.
11944 **/
6f039790 11945static void
3772a991
JS		 11946lpfc_pci_remove_one(struct pci_dev *pdev)
11947{
11948 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11949 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11950
11951 switch (phba->pci_dev_grp) {
11952 case LPFC_PCI_DEV_LP:
11953 lpfc_pci_remove_one_s3(pdev);
11954 break;
da0436e9
JS		 11955 case LPFC_PCI_DEV_OC:
11956 lpfc_pci_remove_one_s4(pdev);
11957 break;
3772a991
JS		 11958 default:
11959 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11960 "1424 Invalid PCI device group: 0x%x\n",
11961 phba->pci_dev_grp);
11962 break;
11963 }
11964 return;
11965}
11966
11967/**
11968 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management
11969 * @pdev: pointer to PCI device
11970 * @msg: power management message
11971 *
11972 * This routine is to be registered to the kernel's PCI subsystem to support
11973 * system Power Management (PM). When PM invokes this method, it dispatches
11974 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will
11975 * suspend the device.
11976 *
11977 * Return code
11978 * 0 - driver suspended the device
11979 * Error otherwise
11980 **/
11981static int
11982lpfc_pci_suspend_one(struct pci_dev *pdev, pm_message_t msg)
11983{
11984 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11985 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11986 int rc = -ENODEV;
11987
11988 switch (phba->pci_dev_grp) {
11989 case LPFC_PCI_DEV_LP:
11990 rc = lpfc_pci_suspend_one_s3(pdev, msg);
11991 break;
da0436e9
JS		 11992 case LPFC_PCI_DEV_OC:
11993 rc = lpfc_pci_suspend_one_s4(pdev, msg);
11994 break;
3772a991
JS		 11995 default:
11996 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11997 "1425 Invalid PCI device group: 0x%x\n",
11998 phba->pci_dev_grp);
11999 break;
12000 }
12001 return rc;
12002}
12003
12004/**
12005 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management
12006 * @pdev: pointer to PCI device
12007 *
12008 * This routine is to be registered to the kernel's PCI subsystem to support
12009 * system Power Management (PM). When PM invokes this method, it dispatches
12010 * the action to the proper SLI-3 or SLI-4 device resume routine, which will
12011 * resume the device.
12012 *
12013 * Return code
12014 * 0 - driver suspended the device
12015 * Error otherwise
12016 **/
12017static int
12018lpfc_pci_resume_one(struct pci_dev *pdev)
12019{
12020 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12021 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12022 int rc = -ENODEV;
12023
12024 switch (phba->pci_dev_grp) {
12025 case LPFC_PCI_DEV_LP:
12026 rc = lpfc_pci_resume_one_s3(pdev);
12027 break;
da0436e9
JS		 12028 case LPFC_PCI_DEV_OC:
12029 rc = lpfc_pci_resume_one_s4(pdev);
12030 break;
3772a991
JS		 12031 default:
12032 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12033 "1426 Invalid PCI device group: 0x%x\n",
12034 phba->pci_dev_grp);
12035 break;
12036 }
12037 return rc;
12038}
12039
12040/**
12041 * lpfc_io_error_detected - lpfc method for handling PCI I/O error
12042 * @pdev: pointer to PCI device.
12043 * @state: the current PCI connection state.
12044 *
12045 * This routine is registered to the PCI subsystem for error handling. This
12046 * function is called by the PCI subsystem after a PCI bus error affecting
12047 * this device has been detected. When this routine is invoked, it dispatches
12048 * the action to the proper SLI-3 or SLI-4 device error detected handling
12049 * routine, which will perform the proper error detected operation.
12050 *
12051 * Return codes
12052 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
12053 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
12054 **/
12055static pci_ers_result_t
12056lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
12057{
12058 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12059 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12060 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
12061
12062 switch (phba->pci_dev_grp) {
12063 case LPFC_PCI_DEV_LP:
12064 rc = lpfc_io_error_detected_s3(pdev, state);
12065 break;
da0436e9
JS		 12066 case LPFC_PCI_DEV_OC:
12067 rc = lpfc_io_error_detected_s4(pdev, state);
12068 break;
3772a991
JS		 12069 default:
12070 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12071 "1427 Invalid PCI device group: 0x%x\n",
12072 phba->pci_dev_grp);
12073 break;
12074 }
12075 return rc;
12076}
12077
12078/**
12079 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch
12080 * @pdev: pointer to PCI device.
12081 *
12082 * This routine is registered to the PCI subsystem for error handling. This
12083 * function is called after PCI bus has been reset to restart the PCI card
12084 * from scratch, as if from a cold-boot. When this routine is invoked, it
12085 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling
12086 * routine, which will perform the proper device reset.
12087 *
12088 * Return codes
12089 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
12090 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
12091 **/
12092static pci_ers_result_t
12093lpfc_io_slot_reset(struct pci_dev *pdev)
12094{
12095 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12096 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12097 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
12098
12099 switch (phba->pci_dev_grp) {
12100 case LPFC_PCI_DEV_LP:
12101 rc = lpfc_io_slot_reset_s3(pdev);
12102 break;
da0436e9
JS		 12103 case LPFC_PCI_DEV_OC:
12104 rc = lpfc_io_slot_reset_s4(pdev);
12105 break;
3772a991
JS		 12106 default:
12107 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12108 "1428 Invalid PCI device group: 0x%x\n",
12109 phba->pci_dev_grp);
12110 break;
12111 }
12112 return rc;
12113}
12114
12115/**
12116 * lpfc_io_resume - lpfc method for resuming PCI I/O operation
12117 * @pdev: pointer to PCI device
12118 *
12119 * This routine is registered to the PCI subsystem for error handling. It
12120 * is called when kernel error recovery tells the lpfc driver that it is
12121 * OK to resume normal PCI operation after PCI bus error recovery. When
12122 * this routine is invoked, it dispatches the action to the proper SLI-3
12123 * or SLI-4 device io_resume routine, which will resume the device operation.
12124 **/
12125static void
12126lpfc_io_resume(struct pci_dev *pdev)
12127{
12128 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12129 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12130
12131 switch (phba->pci_dev_grp) {
12132 case LPFC_PCI_DEV_LP:
12133 lpfc_io_resume_s3(pdev);
12134 break;
da0436e9
JS		 12135 case LPFC_PCI_DEV_OC:
12136 lpfc_io_resume_s4(pdev);
12137 break;
3772a991
JS		 12138 default:
12139 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12140 "1429 Invalid PCI device group: 0x%x\n",
12141 phba->pci_dev_grp);
12142 break;
12143 }
12144 return;
12145}
12146
1ba981fd
JS		 12147/**
12148 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter
12149 * @phba: pointer to lpfc hba data structure.
12150 *
12151 * This routine checks to see if OAS is supported for this adapter. If
12152 * supported, the configure Flash Optimized Fabric flag is set. Otherwise,
12153 * the enable oas flag is cleared and the pool created for OAS device data
12154 * is destroyed.
12155 *
12156 **/
12157void
12158lpfc_sli4_oas_verify(struct lpfc_hba *phba)
12159{
12160
12161 if (!phba->cfg_EnableXLane)
12162 return;
12163
12164 if (phba->sli4_hba.pc_sli4_params.oas_supported) {
12165 phba->cfg_fof = 1;
12166 } else {
f38fa0bb 12167 phba->cfg_fof = 0;
1ba981fd
JS		 12168 if (phba->device_data_mem_pool)
12169 mempool_destroy(phba->device_data_mem_pool);
12170 phba->device_data_mem_pool = NULL;
12171 }
12172
12173 return;
12174}
12175
12176/**
12177 * lpfc_fof_queue_setup - Set up all the fof queues
12178 * @phba: pointer to lpfc hba data structure.
12179 *
12180 * This routine is invoked to set up all the fof queues for the FC HBA
12181 * operation.
12182 *
12183 * Return codes
12184 * 0 - successful
12185 * -ENOMEM - No available memory
12186 **/
12187int
12188lpfc_fof_queue_setup(struct lpfc_hba *phba)
12189{
895427bd 12190 struct lpfc_sli_ring *pring;
1ba981fd
JS		 12191 int rc;
12192
12193 rc = lpfc_eq_create(phba, phba->sli4_hba.fof_eq, LPFC_MAX_IMAX);
12194 if (rc)
12195 return -ENOMEM;
12196
f38fa0bb 12197 if (phba->cfg_fof) {
1ba981fd
JS		 12198
12199 rc = lpfc_cq_create(phba, phba->sli4_hba.oas_cq,
12200 phba->sli4_hba.fof_eq, LPFC_WCQ, LPFC_FCP);
12201 if (rc)
12202 goto out_oas_cq;
12203
12204 rc = lpfc_wq_create(phba, phba->sli4_hba.oas_wq,
12205 phba->sli4_hba.oas_cq, LPFC_FCP);
12206 if (rc)
12207 goto out_oas_wq;
12208
895427bd
JS		 12209 /* Bind this CQ/WQ to the NVME ring */
12210 pring = phba->sli4_hba.oas_wq->pring;
12211 pring->sli.sli4.wqp =
12212 (void *)phba->sli4_hba.oas_wq;
12213 phba->sli4_hba.oas_cq->pring = pring;
1ba981fd
JS		 12214 }
12215
12216 return 0;
12217
12218out_oas_wq:
f38fa0bb 12219 lpfc_cq_destroy(phba, phba->sli4_hba.oas_cq);
1ba981fd
JS		 12220out_oas_cq:
12221 lpfc_eq_destroy(phba, phba->sli4_hba.fof_eq);
12222 return rc;
12223
12224}
12225
12226/**
12227 * lpfc_fof_queue_create - Create all the fof queues
12228 * @phba: pointer to lpfc hba data structure.
12229 *
12230 * This routine is invoked to allocate all the fof queues for the FC HBA
12231 * operation. For each SLI4 queue type, the parameters such as queue entry
12232 * count (queue depth) shall be taken from the module parameter. For now,
12233 * we just use some constant number as place holder.
12234 *
12235 * Return codes
12236 * 0 - successful
12237 * -ENOMEM - No availble memory
12238 * -EIO - The mailbox failed to complete successfully.
12239 **/
12240int
12241lpfc_fof_queue_create(struct lpfc_hba *phba)
12242{
12243 struct lpfc_queue *qdesc;
c176ffa0 12244 uint32_t wqesize;
1ba981fd
JS		 12245
12246 /* Create FOF EQ */
81b96eda
JS		 12247 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
12248 phba->sli4_hba.eq_esize,
1ba981fd
JS		 12249 phba->sli4_hba.eq_ecount);
12250 if (!qdesc)
12251 goto out_error;
12252
12253 phba->sli4_hba.fof_eq = qdesc;
12254
f38fa0bb 12255 if (phba->cfg_fof) {
1ba981fd
JS		 12256
12257 /* Create OAS CQ */
c176ffa0 12258 if (phba->enab_exp_wqcq_pages)
a51e41b6
JS		 12259 qdesc = lpfc_sli4_queue_alloc(phba,
12260 LPFC_EXPANDED_PAGE_SIZE,
12261 phba->sli4_hba.cq_esize,
12262 LPFC_CQE_EXP_COUNT);
12263 else
12264 qdesc = lpfc_sli4_queue_alloc(phba,
12265 LPFC_DEFAULT_PAGE_SIZE,
12266 phba->sli4_hba.cq_esize,
12267 phba->sli4_hba.cq_ecount);
1ba981fd
JS		 12268 if (!qdesc)
12269 goto out_error;
12270
12271 phba->sli4_hba.oas_cq = qdesc;
12272
12273 /* Create OAS WQ */
c176ffa0
JS		 12274 if (phba->enab_exp_wqcq_pages) {
12275 wqesize = (phba->fcp_embed_io) ?
12276 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
a51e41b6
JS		 12277 qdesc = lpfc_sli4_queue_alloc(phba,
12278 LPFC_EXPANDED_PAGE_SIZE,
c176ffa0 12279 wqesize,
a51e41b6 12280 LPFC_WQE_EXP_COUNT);
c176ffa0 12281 } else
a51e41b6
JS		 12282 qdesc = lpfc_sli4_queue_alloc(phba,
12283 LPFC_DEFAULT_PAGE_SIZE,
12284 phba->sli4_hba.wq_esize,
12285 phba->sli4_hba.wq_ecount);
c176ffa0 12286
1ba981fd
JS		 12287 if (!qdesc)
12288 goto out_error;
12289
12290 phba->sli4_hba.oas_wq = qdesc;
895427bd 12291 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
1ba981fd
JS		 12292
12293 }
12294 return 0;
12295
12296out_error:
12297 lpfc_fof_queue_destroy(phba);
12298 return -ENOMEM;
12299}
12300
12301/**
12302 * lpfc_fof_queue_destroy - Destroy all the fof queues
12303 * @phba: pointer to lpfc hba data structure.
12304 *
12305 * This routine is invoked to release all the SLI4 queues with the FC HBA
12306 * operation.
12307 *
12308 * Return codes
12309 * 0 - successful
12310 **/
12311int
12312lpfc_fof_queue_destroy(struct lpfc_hba *phba)
12313{
12314 /* Release FOF Event queue */
12315 if (phba->sli4_hba.fof_eq != NULL) {
12316 lpfc_sli4_queue_free(phba->sli4_hba.fof_eq);
12317 phba->sli4_hba.fof_eq = NULL;
12318 }
12319
12320 /* Release OAS Completion queue */
12321 if (phba->sli4_hba.oas_cq != NULL) {
12322 lpfc_sli4_queue_free(phba->sli4_hba.oas_cq);
12323 phba->sli4_hba.oas_cq = NULL;
12324 }
12325
12326 /* Release OAS Work queue */
12327 if (phba->sli4_hba.oas_wq != NULL) {
12328 lpfc_sli4_queue_free(phba->sli4_hba.oas_wq);
12329 phba->sli4_hba.oas_wq = NULL;
12330 }
12331 return 0;
12332}
12333
dea3101e 12334MODULE_DEVICE_TABLE(pci, lpfc_id_table);
12335
a55b2d21 12336static const struct pci_error_handlers lpfc_err_handler = {
8d63f375
LV		 12337 .error_detected = lpfc_io_error_detected,
12338 .slot_reset = lpfc_io_slot_reset,
12339 .resume = lpfc_io_resume,
12340};
12341
dea3101e 12342static struct pci_driver lpfc_driver = {
12343 .name = LPFC_DRIVER_NAME,
12344 .id_table = lpfc_id_table,
12345 .probe = lpfc_pci_probe_one,
6f039790 12346 .remove = lpfc_pci_remove_one,
85e8a239 12347 .shutdown = lpfc_pci_remove_one,
3a55b532 12348 .suspend = lpfc_pci_suspend_one,
3772a991 12349 .resume = lpfc_pci_resume_one,
2e0fef85 12350 .err_handler = &lpfc_err_handler,
dea3101e 12351};
12352
3ef6d24c 12353static const struct file_operations lpfc_mgmt_fop = {
858feacd 12354 .owner = THIS_MODULE,
3ef6d24c
JS		 12355};
12356
12357static struct miscdevice lpfc_mgmt_dev = {
12358 .minor = MISC_DYNAMIC_MINOR,
12359 .name = "lpfcmgmt",
12360 .fops = &lpfc_mgmt_fop,
12361};
12362
e59058c4 12363/**
3621a710 12364 * lpfc_init - lpfc module initialization routine
e59058c4
JS		 12365 *
12366 * This routine is to be invoked when the lpfc module is loaded into the
12367 * kernel. The special kernel macro module_init() is used to indicate the
12368 * role of this routine to the kernel as lpfc module entry point.
12369 *
12370 * Return codes
12371 * 0 - successful
12372 * -ENOMEM - FC attach transport failed
12373 * all others - failed
12374 */
dea3101e 12375static int __init
12376lpfc_init(void)
12377{
12378 int error = 0;
12379
12380 printk(LPFC_MODULE_DESC "\n");
c44ce173 12381 printk(LPFC_COPYRIGHT "\n");
dea3101e 12382
3ef6d24c
JS		 12383 error = misc_register(&lpfc_mgmt_dev);
12384 if (error)
12385 printk(KERN_ERR "Could not register lpfcmgmt device, "
12386 "misc_register returned with status %d", error);
12387
458c083e
JS		 12388 lpfc_transport_functions.vport_create = lpfc_vport_create;
12389 lpfc_transport_functions.vport_delete = lpfc_vport_delete;
dea3101e 12390 lpfc_transport_template =
12391 fc_attach_transport(&lpfc_transport_functions);
7ee5d43e 12392 if (lpfc_transport_template == NULL)
dea3101e 12393 return -ENOMEM;
458c083e
JS		 12394 lpfc_vport_transport_template =
12395 fc_attach_transport(&lpfc_vport_transport_functions);
12396 if (lpfc_vport_transport_template == NULL) {
12397 fc_release_transport(lpfc_transport_template);
12398 return -ENOMEM;
7ee5d43e 12399 }
7bb03bbf
JS		 12400
12401 /* Initialize in case vector mapping is needed */
b246de17 12402 lpfc_used_cpu = NULL;
2ea259ee 12403 lpfc_present_cpu = num_present_cpus();
7bb03bbf 12404
dea3101e 12405 error = pci_register_driver(&lpfc_driver);
92d7f7b0 12406 if (error) {
dea3101e 12407 fc_release_transport(lpfc_transport_template);
458c083e 12408 fc_release_transport(lpfc_vport_transport_template);
92d7f7b0 12409 }
dea3101e 12410
12411 return error;
12412}
12413
e59058c4 12414/**
3621a710 12415 * lpfc_exit - lpfc module removal routine
e59058c4
JS		 12416 *
12417 * This routine is invoked when the lpfc module is removed from the kernel.
12418 * The special kernel macro module_exit() is used to indicate the role of
12419 * this routine to the kernel as lpfc module exit point.
12420 */
dea3101e 12421static void __exit
12422lpfc_exit(void)
12423{
3ef6d24c 12424 misc_deregister(&lpfc_mgmt_dev);
dea3101e 12425 pci_unregister_driver(&lpfc_driver);
12426 fc_release_transport(lpfc_transport_template);
458c083e 12427 fc_release_transport(lpfc_vport_transport_template);
81301a9b 12428 if (_dump_buf_data) {
6a9c52cf
JS		 12429 printk(KERN_ERR "9062 BLKGRD: freeing %lu pages for "
12430 "_dump_buf_data at 0x%p\n",
81301a9b
JS		 12431 (1L << _dump_buf_data_order), _dump_buf_data);
12432 free_pages((unsigned long)_dump_buf_data, _dump_buf_data_order);
12433 }
12434
12435 if (_dump_buf_dif) {
6a9c52cf
JS		 12436 printk(KERN_ERR "9049 BLKGRD: freeing %lu pages for "
12437 "_dump_buf_dif at 0x%p\n",
81301a9b
JS		 12438 (1L << _dump_buf_dif_order), _dump_buf_dif);
12439 free_pages((unsigned long)_dump_buf_dif, _dump_buf_dif_order);
12440 }
b246de17 12441 kfree(lpfc_used_cpu);
7973967f 12442 idr_destroy(&lpfc_hba_index);
dea3101e 12443}
12444
12445module_init(lpfc_init);
12446module_exit(lpfc_exit);
12447MODULE_LICENSE("GPL");
12448MODULE_DESCRIPTION(LPFC_MODULE_DESC);
d080abe0 12449MODULE_AUTHOR("Broadcom");
dea3101e 12450MODULE_VERSION("0:" LPFC_DRIVER_VERSION);
Linux 6.x block layer and io_uring tree(s)