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scsi: lpfc: Fix receive PRLI handling
[linux-2.6-block.git] / drivers / scsi / lpfc / lpfc_init.c
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dea3101e 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
d080abe0
JS		 4 * Copyright (C) 2017 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Limited and/or its subsidiaries. *
50611577 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
c44ce173 7 * EMULEX and SLI are trademarks of Emulex. *
d080abe0 8 * www.broadcom.com *
c44ce173 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e 10 * *
11 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC		 12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
dea3101e 22 *******************************************************************/
23
dea3101e 24#include <linux/blkdev.h>
25#include <linux/delay.h>
26#include <linux/dma-mapping.h>
27#include <linux/idr.h>
28#include <linux/interrupt.h>
acf3368f 29#include <linux/module.h>
dea3101e 30#include <linux/kthread.h>
31#include <linux/pci.h>
32#include <linux/spinlock.h>
92d7f7b0 33#include <linux/ctype.h>
0d878419 34#include <linux/aer.h>
5a0e3ad6 35#include <linux/slab.h>
52d52440 36#include <linux/firmware.h>
3ef6d24c 37#include <linux/miscdevice.h>
7bb03bbf 38#include <linux/percpu.h>
895427bd 39#include <linux/msi.h>
286871a6 40#include <linux/bitops.h>
dea3101e 41
91886523 42#include <scsi/scsi.h>
dea3101e 43#include <scsi/scsi_device.h>
44#include <scsi/scsi_host.h>
45#include <scsi/scsi_transport_fc.h>
86c67379
JS		 46#include <scsi/scsi_tcq.h>
47#include <scsi/fc/fc_fs.h>
48
49#include <linux/nvme-fc-driver.h>
dea3101e 50
da0436e9 51#include "lpfc_hw4.h"
dea3101e 52#include "lpfc_hw.h"
53#include "lpfc_sli.h"
da0436e9 54#include "lpfc_sli4.h"
ea2151b4 55#include "lpfc_nl.h"
dea3101e 56#include "lpfc_disc.h"
dea3101e 57#include "lpfc.h"
895427bd
JS		 58#include "lpfc_scsi.h"
59#include "lpfc_nvme.h"
86c67379 60#include "lpfc_nvmet.h"
dea3101e 61#include "lpfc_logmsg.h"
62#include "lpfc_crtn.h"
92d7f7b0 63#include "lpfc_vport.h"
dea3101e 64#include "lpfc_version.h"
12f44457 65#include "lpfc_ids.h"
dea3101e 66
81301a9b
JS		 67char *_dump_buf_data;
68unsigned long _dump_buf_data_order;
69char *_dump_buf_dif;
70unsigned long _dump_buf_dif_order;
71spinlock_t _dump_buf_lock;
72
7bb03bbf 73/* Used when mapping IRQ vectors in a driver centric manner */
b246de17
JS		 74uint16_t *lpfc_used_cpu;
75uint32_t lpfc_present_cpu;
7bb03bbf 76
dea3101e 77static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
78static int lpfc_post_rcv_buf(struct lpfc_hba *);
5350d872 79static int lpfc_sli4_queue_verify(struct lpfc_hba *);
da0436e9
JS		 80static int lpfc_create_bootstrap_mbox(struct lpfc_hba *);
81static int lpfc_setup_endian_order(struct lpfc_hba *);
da0436e9 82static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *);
8a9d2e80 83static void lpfc_free_els_sgl_list(struct lpfc_hba *);
f358dd0c 84static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *);
8a9d2e80 85static void lpfc_init_sgl_list(struct lpfc_hba *);
da0436e9
JS		 86static int lpfc_init_active_sgl_array(struct lpfc_hba *);
87static void lpfc_free_active_sgl(struct lpfc_hba *);
88static int lpfc_hba_down_post_s3(struct lpfc_hba *phba);
89static int lpfc_hba_down_post_s4(struct lpfc_hba *phba);
90static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *);
91static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *);
92static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *);
618a5230
JS		 93static void lpfc_sli4_disable_intr(struct lpfc_hba *);
94static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t);
1ba981fd 95static void lpfc_sli4_oas_verify(struct lpfc_hba *phba);
dea3101e 96
97static struct scsi_transport_template *lpfc_transport_template = NULL;
92d7f7b0 98static struct scsi_transport_template *lpfc_vport_transport_template = NULL;
dea3101e 99static DEFINE_IDR(lpfc_hba_index);
f358dd0c 100#define LPFC_NVMET_BUF_POST 254
dea3101e 101
e59058c4 102/**
3621a710 103 * lpfc_config_port_prep - Perform lpfc initialization prior to config port
e59058c4
JS		 104 * @phba: pointer to lpfc hba data structure.
105 *
106 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT
107 * mailbox command. It retrieves the revision information from the HBA and
108 * collects the Vital Product Data (VPD) about the HBA for preparing the
109 * configuration of the HBA.
110 *
111 * Return codes:
112 * 0 - success.
113 * -ERESTART - requests the SLI layer to reset the HBA and try again.
114 * Any other value - indicates an error.
115 **/
dea3101e 116int
2e0fef85 117lpfc_config_port_prep(struct lpfc_hba *phba)
dea3101e 118{
119 lpfc_vpd_t *vp = &phba->vpd;
120 int i = 0, rc;
121 LPFC_MBOXQ_t *pmb;
122 MAILBOX_t *mb;
123 char *lpfc_vpd_data = NULL;
124 uint16_t offset = 0;
125 static char licensed[56] =
126 "key unlock for use with gnu public licensed code only\0";
65a29c16 127 static int init_key = 1;
dea3101e 128
129 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
130 if (!pmb) {
2e0fef85 131 phba->link_state = LPFC_HBA_ERROR;
dea3101e 132 return -ENOMEM;
133 }
134
04c68496 135 mb = &pmb->u.mb;
2e0fef85 136 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 137
138 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
65a29c16
JS		 139 if (init_key) {
140 uint32_t *ptext = (uint32_t *) licensed;
dea3101e 141
65a29c16
JS		 142 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
143 *ptext = cpu_to_be32(*ptext);
144 init_key = 0;
145 }
dea3101e 146
147 lpfc_read_nv(phba, pmb);
148 memset((char*)mb->un.varRDnvp.rsvd3, 0,
149 sizeof (mb->un.varRDnvp.rsvd3));
150 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
151 sizeof (licensed));
152
153 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
154
155 if (rc != MBX_SUCCESS) {
ed957684 156 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
e8b62011 157 "0324 Config Port initialization "
dea3101e 158 "error, mbxCmd x%x READ_NVPARM, "
159 "mbxStatus x%x\n",
dea3101e 160 mb->mbxCommand, mb->mbxStatus);
161 mempool_free(pmb, phba->mbox_mem_pool);
162 return -ERESTART;
163 }
164 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
2e0fef85
JS		 165 sizeof(phba->wwnn));
166 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname,
167 sizeof(phba->wwpn));
dea3101e 168 }
169
92d7f7b0
JS		 170 phba->sli3_options = 0x0;
171
dea3101e 172 /* Setup and issue mailbox READ REV command */
173 lpfc_read_rev(phba, pmb);
174 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
175 if (rc != MBX_SUCCESS) {
ed957684 176 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 177 "0439 Adapter failed to init, mbxCmd x%x "
dea3101e 178 "READ_REV, mbxStatus x%x\n",
dea3101e 179 mb->mbxCommand, mb->mbxStatus);
180 mempool_free( pmb, phba->mbox_mem_pool);
181 return -ERESTART;
182 }
183
92d7f7b0 184
1de933f3
JSEC		 185 /*
186 * The value of rr must be 1 since the driver set the cv field to 1.
187 * This setting requires the FW to set all revision fields.
dea3101e 188 */
1de933f3 189 if (mb->un.varRdRev.rr == 0) {
dea3101e 190 vp->rev.rBit = 0;
1de933f3 191 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS		 192 "0440 Adapter failed to init, READ_REV has "
193 "missing revision information.\n");
dea3101e 194 mempool_free(pmb, phba->mbox_mem_pool);
195 return -ERESTART;
dea3101e 196 }
197
495a714c
JS		 198 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) {
199 mempool_free(pmb, phba->mbox_mem_pool);
ed957684 200 return -EINVAL;
495a714c 201 }
ed957684 202
dea3101e 203 /* Save information as VPD data */
1de933f3 204 vp->rev.rBit = 1;
92d7f7b0 205 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t));
1de933f3
JSEC		 206 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
207 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
208 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
209 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
dea3101e 210 vp->rev.biuRev = mb->un.varRdRev.biuRev;
211 vp->rev.smRev = mb->un.varRdRev.smRev;
212 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
213 vp->rev.endecRev = mb->un.varRdRev.endecRev;
214 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
215 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
216 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
217 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
218 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
219 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
220
92d7f7b0
JS		 221 /* If the sli feature level is less then 9, we must
222 * tear down all RPIs and VPIs on link down if NPIV
223 * is enabled.
224 */
225 if (vp->rev.feaLevelHigh < 9)
226 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN;
227
dea3101e 228 if (lpfc_is_LC_HBA(phba->pcidev->device))
229 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
230 sizeof (phba->RandomData));
231
dea3101e 232 /* Get adapter VPD information */
dea3101e 233 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
234 if (!lpfc_vpd_data)
d7c255b2 235 goto out_free_mbox;
dea3101e 236 do {
a0c87cbd 237 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD);
dea3101e 238 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
239
240 if (rc != MBX_SUCCESS) {
241 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 242 "0441 VPD not present on adapter, "
dea3101e 243 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
dea3101e 244 mb->mbxCommand, mb->mbxStatus);
74b72a59 245 mb->un.varDmp.word_cnt = 0;
dea3101e 246 }
04c68496
JS		 247 /* dump mem may return a zero when finished or we got a
248 * mailbox error, either way we are done.
249 */
250 if (mb->un.varDmp.word_cnt == 0)
251 break;
74b72a59
JW		 252 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
253 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
d7c255b2
JS		 254 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
255 lpfc_vpd_data + offset,
92d7f7b0 256 mb->un.varDmp.word_cnt);
dea3101e 257 offset += mb->un.varDmp.word_cnt;
74b72a59
JW		 258 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
259 lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
dea3101e 260
261 kfree(lpfc_vpd_data);
dea3101e 262out_free_mbox:
263 mempool_free(pmb, phba->mbox_mem_pool);
264 return 0;
265}
266
e59058c4 267/**
3621a710 268 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd
e59058c4
JS		 269 * @phba: pointer to lpfc hba data structure.
270 * @pmboxq: pointer to the driver internal queue element for mailbox command.
271 *
272 * This is the completion handler for driver's configuring asynchronous event
273 * mailbox command to the device. If the mailbox command returns successfully,
274 * it will set internal async event support flag to 1; otherwise, it will
275 * set internal async event support flag to 0.
276 **/
57127f15
JS		 277static void
278lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
279{
04c68496 280 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS)
57127f15
JS		 281 phba->temp_sensor_support = 1;
282 else
283 phba->temp_sensor_support = 0;
284 mempool_free(pmboxq, phba->mbox_mem_pool);
285 return;
286}
287
97207482 288/**
3621a710 289 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler
97207482
JS		 290 * @phba: pointer to lpfc hba data structure.
291 * @pmboxq: pointer to the driver internal queue element for mailbox command.
292 *
293 * This is the completion handler for dump mailbox command for getting
294 * wake up parameters. When this command complete, the response contain
295 * Option rom version of the HBA. This function translate the version number
296 * into a human readable string and store it in OptionROMVersion.
297 **/
298static void
299lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
300{
301 struct prog_id *prg;
302 uint32_t prog_id_word;
303 char dist = ' ';
304 /* character array used for decoding dist type. */
305 char dist_char[] = "nabx";
306
04c68496 307 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) {
9f1e1b50 308 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482 309 return;
9f1e1b50 310 }
97207482
JS		 311
312 prg = (struct prog_id *) &prog_id_word;
313
314 /* word 7 contain option rom version */
04c68496 315 prog_id_word = pmboxq->u.mb.un.varWords[7];
97207482
JS		 316
317 /* Decode the Option rom version word to a readable string */
318 if (prg->dist < 4)
319 dist = dist_char[prg->dist];
320
321 if ((prg->dist == 3) && (prg->num == 0))
a2fc4aef 322 snprintf(phba->OptionROMVersion, 32, "%d.%d%d",
97207482
JS		 323 prg->ver, prg->rev, prg->lev);
324 else
a2fc4aef 325 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d",
97207482
JS		 326 prg->ver, prg->rev, prg->lev,
327 dist, prg->num);
9f1e1b50 328 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482
JS		 329 return;
330}
331
0558056c
JS		 332/**
333 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname,
334 * cfg_soft_wwnn, cfg_soft_wwpn
335 * @vport: pointer to lpfc vport data structure.
336 *
337 *
338 * Return codes
339 * None.
340 **/
341void
342lpfc_update_vport_wwn(struct lpfc_vport *vport)
343{
aeb3c817
JS		 344 uint8_t vvvl = vport->fc_sparam.cmn.valid_vendor_ver_level;
345 u32 *fawwpn_key = (u32 *)&vport->fc_sparam.un.vendorVersion[0];
346
0558056c
JS		 347 /* If the soft name exists then update it using the service params */
348 if (vport->phba->cfg_soft_wwnn)
349 u64_to_wwn(vport->phba->cfg_soft_wwnn,
350 vport->fc_sparam.nodeName.u.wwn);
351 if (vport->phba->cfg_soft_wwpn)
352 u64_to_wwn(vport->phba->cfg_soft_wwpn,
353 vport->fc_sparam.portName.u.wwn);
354
355 /*
356 * If the name is empty or there exists a soft name
357 * then copy the service params name, otherwise use the fc name
358 */
359 if (vport->fc_nodename.u.wwn[0] == 0 || vport->phba->cfg_soft_wwnn)
360 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
361 sizeof(struct lpfc_name));
362 else
363 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename,
364 sizeof(struct lpfc_name));
365
aeb3c817
JS		 366 /*
367 * If the port name has changed, then set the Param changes flag
368 * to unreg the login
369 */
370 if (vport->fc_portname.u.wwn[0] != 0 &&
371 memcmp(&vport->fc_portname, &vport->fc_sparam.portName,
372 sizeof(struct lpfc_name)))
373 vport->vport_flag |= FAWWPN_PARAM_CHG;
374
375 if (vport->fc_portname.u.wwn[0] == 0 ||
376 vport->phba->cfg_soft_wwpn ||
377 (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR) ||
378 vport->vport_flag & FAWWPN_SET) {
0558056c
JS		 379 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
380 sizeof(struct lpfc_name));
aeb3c817
JS		 381 vport->vport_flag &= ~FAWWPN_SET;
382 if (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR)
383 vport->vport_flag |= FAWWPN_SET;
384 }
0558056c
JS		 385 else
386 memcpy(&vport->fc_sparam.portName, &vport->fc_portname,
387 sizeof(struct lpfc_name));
388}
389
e59058c4 390/**
3621a710 391 * lpfc_config_port_post - Perform lpfc initialization after config port
e59058c4
JS		 392 * @phba: pointer to lpfc hba data structure.
393 *
394 * This routine will do LPFC initialization after the CONFIG_PORT mailbox
395 * command call. It performs all internal resource and state setups on the
396 * port: post IOCB buffers, enable appropriate host interrupt attentions,
397 * ELS ring timers, etc.
398 *
399 * Return codes
400 * 0 - success.
401 * Any other value - error.
402 **/
dea3101e 403int
2e0fef85 404lpfc_config_port_post(struct lpfc_hba *phba)
dea3101e 405{
2e0fef85 406 struct lpfc_vport *vport = phba->pport;
a257bf90 407 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
dea3101e 408 LPFC_MBOXQ_t *pmb;
409 MAILBOX_t *mb;
410 struct lpfc_dmabuf *mp;
411 struct lpfc_sli *psli = &phba->sli;
412 uint32_t status, timeout;
2e0fef85
JS		 413 int i, j;
414 int rc;
dea3101e 415
7af67051
JS		 416 spin_lock_irq(&phba->hbalock);
417 /*
418 * If the Config port completed correctly the HBA is not
419 * over heated any more.
420 */
421 if (phba->over_temp_state == HBA_OVER_TEMP)
422 phba->over_temp_state = HBA_NORMAL_TEMP;
423 spin_unlock_irq(&phba->hbalock);
424
dea3101e 425 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
426 if (!pmb) {
2e0fef85 427 phba->link_state = LPFC_HBA_ERROR;
dea3101e 428 return -ENOMEM;
429 }
04c68496 430 mb = &pmb->u.mb;
dea3101e 431
dea3101e 432 /* Get login parameters for NID. */
9f1177a3
JS		 433 rc = lpfc_read_sparam(phba, pmb, 0);
434 if (rc) {
435 mempool_free(pmb, phba->mbox_mem_pool);
436 return -ENOMEM;
437 }
438
ed957684 439 pmb->vport = vport;
dea3101e 440 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 441 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 442 "0448 Adapter failed init, mbxCmd x%x "
dea3101e 443 "READ_SPARM mbxStatus x%x\n",
dea3101e 444 mb->mbxCommand, mb->mbxStatus);
2e0fef85 445 phba->link_state = LPFC_HBA_ERROR;
dea3101e 446 mp = (struct lpfc_dmabuf *) pmb->context1;
9f1177a3 447 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 448 lpfc_mbuf_free(phba, mp->virt, mp->phys);
449 kfree(mp);
450 return -EIO;
451 }
452
453 mp = (struct lpfc_dmabuf *) pmb->context1;
454
2e0fef85 455 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm));
dea3101e 456 lpfc_mbuf_free(phba, mp->virt, mp->phys);
457 kfree(mp);
458 pmb->context1 = NULL;
0558056c 459 lpfc_update_vport_wwn(vport);
a257bf90
JS		 460
461 /* Update the fc_host data structures with new wwn. */
462 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
463 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
21e9a0a5 464 fc_host_max_npiv_vports(shost) = phba->max_vpi;
a257bf90 465
dea3101e 466 /* If no serial number in VPD data, use low 6 bytes of WWNN */
467 /* This should be consolidated into parse_vpd ? - mr */
468 if (phba->SerialNumber[0] == 0) {
469 uint8_t *outptr;
470
2e0fef85 471 outptr = &vport->fc_nodename.u.s.IEEE[0];
dea3101e 472 for (i = 0; i < 12; i++) {
473 status = *outptr++;
474 j = ((status & 0xf0) >> 4);
475 if (j <= 9)
476 phba->SerialNumber[i] =
477 (char)((uint8_t) 0x30 + (uint8_t) j);
478 else
479 phba->SerialNumber[i] =
480 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
481 i++;
482 j = (status & 0xf);
483 if (j <= 9)
484 phba->SerialNumber[i] =
485 (char)((uint8_t) 0x30 + (uint8_t) j);
486 else
487 phba->SerialNumber[i] =
488 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
489 }
490 }
491
dea3101e 492 lpfc_read_config(phba, pmb);
ed957684 493 pmb->vport = vport;
dea3101e 494 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 495 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 496 "0453 Adapter failed to init, mbxCmd x%x "
dea3101e 497 "READ_CONFIG, mbxStatus x%x\n",
dea3101e 498 mb->mbxCommand, mb->mbxStatus);
2e0fef85 499 phba->link_state = LPFC_HBA_ERROR;
dea3101e 500 mempool_free( pmb, phba->mbox_mem_pool);
501 return -EIO;
502 }
503
a0c87cbd
JS		 504 /* Check if the port is disabled */
505 lpfc_sli_read_link_ste(phba);
506
dea3101e 507 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS		 508 i = (mb->un.varRdConfig.max_xri + 1);
509 if (phba->cfg_hba_queue_depth > i) {
510 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
511 "3359 HBA queue depth changed from %d to %d\n",
512 phba->cfg_hba_queue_depth, i);
513 phba->cfg_hba_queue_depth = i;
514 }
515
516 /* Reset the DFT_LUN_Q_DEPTH to (max xri >> 3) */
517 i = (mb->un.varRdConfig.max_xri >> 3);
518 if (phba->pport->cfg_lun_queue_depth > i) {
519 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
520 "3360 LUN queue depth changed from %d to %d\n",
521 phba->pport->cfg_lun_queue_depth, i);
522 phba->pport->cfg_lun_queue_depth = i;
523 }
dea3101e 524
525 phba->lmt = mb->un.varRdConfig.lmt;
74b72a59
JW		 526
527 /* Get the default values for Model Name and Description */
528 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
529
2e0fef85 530 phba->link_state = LPFC_LINK_DOWN;
dea3101e 531
0b727fea 532 /* Only process IOCBs on ELS ring till hba_state is READY */
895427bd
JS		 533 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr)
534 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT;
535 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr)
536 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT;
dea3101e 537
538 /* Post receive buffers for desired rings */
ed957684
JS		 539 if (phba->sli_rev != 3)
540 lpfc_post_rcv_buf(phba);
dea3101e 541
9399627f
JS		 542 /*
543 * Configure HBA MSI-X attention conditions to messages if MSI-X mode
544 */
545 if (phba->intr_type == MSIX) {
546 rc = lpfc_config_msi(phba, pmb);
547 if (rc) {
548 mempool_free(pmb, phba->mbox_mem_pool);
549 return -EIO;
550 }
551 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
552 if (rc != MBX_SUCCESS) {
553 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
554 "0352 Config MSI mailbox command "
555 "failed, mbxCmd x%x, mbxStatus x%x\n",
04c68496
JS		 556 pmb->u.mb.mbxCommand,
557 pmb->u.mb.mbxStatus);
9399627f
JS		 558 mempool_free(pmb, phba->mbox_mem_pool);
559 return -EIO;
560 }
561 }
562
04c68496 563 spin_lock_irq(&phba->hbalock);
9399627f
JS		 564 /* Initialize ERATT handling flag */
565 phba->hba_flag &= ~HBA_ERATT_HANDLED;
566
dea3101e 567 /* Enable appropriate host interrupts */
9940b97b
JS		 568 if (lpfc_readl(phba->HCregaddr, &status)) {
569 spin_unlock_irq(&phba->hbalock);
570 return -EIO;
571 }
dea3101e 572 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
573 if (psli->num_rings > 0)
574 status |= HC_R0INT_ENA;
575 if (psli->num_rings > 1)
576 status |= HC_R1INT_ENA;
577 if (psli->num_rings > 2)
578 status |= HC_R2INT_ENA;
579 if (psli->num_rings > 3)
580 status |= HC_R3INT_ENA;
581
875fbdfe
JSEC		 582 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
583 (phba->cfg_poll & DISABLE_FCP_RING_INT))
9399627f 584 status &= ~(HC_R0INT_ENA);
875fbdfe 585
dea3101e 586 writel(status, phba->HCregaddr);
587 readl(phba->HCregaddr); /* flush */
2e0fef85 588 spin_unlock_irq(&phba->hbalock);
dea3101e 589
9399627f
JS		 590 /* Set up ring-0 (ELS) timer */
591 timeout = phba->fc_ratov * 2;
256ec0d0
JS		 592 mod_timer(&vport->els_tmofunc,
593 jiffies + msecs_to_jiffies(1000 * timeout));
9399627f 594 /* Set up heart beat (HB) timer */
256ec0d0
JS		 595 mod_timer(&phba->hb_tmofunc,
596 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS		 597 phba->hb_outstanding = 0;
598 phba->last_completion_time = jiffies;
9399627f 599 /* Set up error attention (ERATT) polling timer */
256ec0d0 600 mod_timer(&phba->eratt_poll,
65791f1f 601 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
dea3101e 602
a0c87cbd
JS		 603 if (phba->hba_flag & LINK_DISABLED) {
604 lpfc_printf_log(phba,
605 KERN_ERR, LOG_INIT,
606 "2598 Adapter Link is disabled.\n");
607 lpfc_down_link(phba, pmb);
608 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
609 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
610 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
611 lpfc_printf_log(phba,
612 KERN_ERR, LOG_INIT,
613 "2599 Adapter failed to issue DOWN_LINK"
614 " mbox command rc 0x%x\n", rc);
615
616 mempool_free(pmb, phba->mbox_mem_pool);
617 return -EIO;
618 }
e40a02c1 619 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
026abb87
JS		 620 mempool_free(pmb, phba->mbox_mem_pool);
621 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
622 if (rc)
623 return rc;
dea3101e 624 }
625 /* MBOX buffer will be freed in mbox compl */
57127f15 626 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS		 627 if (!pmb) {
628 phba->link_state = LPFC_HBA_ERROR;
629 return -ENOMEM;
630 }
631
57127f15
JS		 632 lpfc_config_async(phba, pmb, LPFC_ELS_RING);
633 pmb->mbox_cmpl = lpfc_config_async_cmpl;
634 pmb->vport = phba->pport;
635 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
dea3101e 636
57127f15
JS		 637 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
638 lpfc_printf_log(phba,
639 KERN_ERR,
640 LOG_INIT,
641 "0456 Adapter failed to issue "
e4e74273 642 "ASYNCEVT_ENABLE mbox status x%x\n",
57127f15
JS		 643 rc);
644 mempool_free(pmb, phba->mbox_mem_pool);
645 }
97207482
JS		 646
647 /* Get Option rom version */
648 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS		 649 if (!pmb) {
650 phba->link_state = LPFC_HBA_ERROR;
651 return -ENOMEM;
652 }
653
97207482
JS		 654 lpfc_dump_wakeup_param(phba, pmb);
655 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl;
656 pmb->vport = phba->pport;
657 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
658
659 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
660 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "0435 Adapter failed "
e4e74273 661 "to get Option ROM version status x%x\n", rc);
97207482
JS		 662 mempool_free(pmb, phba->mbox_mem_pool);
663 }
664
d7c255b2 665 return 0;
ce8b3ce5
JS		 666}
667
84d1b006
JS		 668/**
669 * lpfc_hba_init_link - Initialize the FC link
670 * @phba: pointer to lpfc hba data structure.
6e7288d9 671 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS		 672 *
673 * This routine will issue the INIT_LINK mailbox command call.
674 * It is available to other drivers through the lpfc_hba data
675 * structure for use as a delayed link up mechanism with the
676 * module parameter lpfc_suppress_link_up.
677 *
678 * Return code
679 * 0 - success
680 * Any other value - error
681 **/
e399b228 682static int
6e7288d9 683lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag)
1b51197d
JS		 684{
685 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag);
686}
687
688/**
689 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology
690 * @phba: pointer to lpfc hba data structure.
691 * @fc_topology: desired fc topology.
692 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
693 *
694 * This routine will issue the INIT_LINK mailbox command call.
695 * It is available to other drivers through the lpfc_hba data
696 * structure for use as a delayed link up mechanism with the
697 * module parameter lpfc_suppress_link_up.
698 *
699 * Return code
700 * 0 - success
701 * Any other value - error
702 **/
703int
704lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology,
705 uint32_t flag)
84d1b006
JS		 706{
707 struct lpfc_vport *vport = phba->pport;
708 LPFC_MBOXQ_t *pmb;
709 MAILBOX_t *mb;
710 int rc;
711
712 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
713 if (!pmb) {
714 phba->link_state = LPFC_HBA_ERROR;
715 return -ENOMEM;
716 }
717 mb = &pmb->u.mb;
718 pmb->vport = vport;
719
026abb87
JS		 720 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) ||
721 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) &&
722 !(phba->lmt & LMT_1Gb)) ||
723 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) &&
724 !(phba->lmt & LMT_2Gb)) ||
725 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) &&
726 !(phba->lmt & LMT_4Gb)) ||
727 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) &&
728 !(phba->lmt & LMT_8Gb)) ||
729 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) &&
730 !(phba->lmt & LMT_10Gb)) ||
731 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) &&
d38dd52c
JS		 732 !(phba->lmt & LMT_16Gb)) ||
733 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) &&
734 !(phba->lmt & LMT_32Gb))) {
026abb87
JS		 735 /* Reset link speed to auto */
736 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
737 "1302 Invalid speed for this board:%d "
738 "Reset link speed to auto.\n",
739 phba->cfg_link_speed);
740 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO;
741 }
1b51197d 742 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed);
84d1b006 743 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
1b51197d
JS		 744 if (phba->sli_rev < LPFC_SLI_REV4)
745 lpfc_set_loopback_flag(phba);
6e7288d9 746 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
76a95d75 747 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
84d1b006
JS		 748 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
749 "0498 Adapter failed to init, mbxCmd x%x "
750 "INIT_LINK, mbxStatus x%x\n",
751 mb->mbxCommand, mb->mbxStatus);
76a95d75
JS		 752 if (phba->sli_rev <= LPFC_SLI_REV3) {
753 /* Clear all interrupt enable conditions */
754 writel(0, phba->HCregaddr);
755 readl(phba->HCregaddr); /* flush */
756 /* Clear all pending interrupts */
757 writel(0xffffffff, phba->HAregaddr);
758 readl(phba->HAregaddr); /* flush */
759 }
84d1b006 760 phba->link_state = LPFC_HBA_ERROR;
6e7288d9 761 if (rc != MBX_BUSY || flag == MBX_POLL)
84d1b006
JS		 762 mempool_free(pmb, phba->mbox_mem_pool);
763 return -EIO;
764 }
e40a02c1 765 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK;
6e7288d9
JS		 766 if (flag == MBX_POLL)
767 mempool_free(pmb, phba->mbox_mem_pool);
84d1b006
JS		 768
769 return 0;
770}
771
772/**
773 * lpfc_hba_down_link - this routine downs the FC link
6e7288d9
JS		 774 * @phba: pointer to lpfc hba data structure.
775 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS		 776 *
777 * This routine will issue the DOWN_LINK mailbox command call.
778 * It is available to other drivers through the lpfc_hba data
779 * structure for use to stop the link.
780 *
781 * Return code
782 * 0 - success
783 * Any other value - error
784 **/
e399b228 785static int
6e7288d9 786lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag)
84d1b006
JS		 787{
788 LPFC_MBOXQ_t *pmb;
789 int rc;
790
791 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
792 if (!pmb) {
793 phba->link_state = LPFC_HBA_ERROR;
794 return -ENOMEM;
795 }
796
797 lpfc_printf_log(phba,
798 KERN_ERR, LOG_INIT,
799 "0491 Adapter Link is disabled.\n");
800 lpfc_down_link(phba, pmb);
801 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
6e7288d9 802 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
84d1b006
JS		 803 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
804 lpfc_printf_log(phba,
805 KERN_ERR, LOG_INIT,
806 "2522 Adapter failed to issue DOWN_LINK"
807 " mbox command rc 0x%x\n", rc);
808
809 mempool_free(pmb, phba->mbox_mem_pool);
810 return -EIO;
811 }
6e7288d9
JS		 812 if (flag == MBX_POLL)
813 mempool_free(pmb, phba->mbox_mem_pool);
814
84d1b006
JS		 815 return 0;
816}
817
e59058c4 818/**
3621a710 819 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset
e59058c4
JS		 820 * @phba: pointer to lpfc HBA data structure.
821 *
822 * This routine will do LPFC uninitialization before the HBA is reset when
823 * bringing down the SLI Layer.
824 *
825 * Return codes
826 * 0 - success.
827 * Any other value - error.
828 **/
dea3101e 829int
2e0fef85 830lpfc_hba_down_prep(struct lpfc_hba *phba)
dea3101e 831{
1b32f6aa
JS		 832 struct lpfc_vport **vports;
833 int i;
3772a991
JS		 834
835 if (phba->sli_rev <= LPFC_SLI_REV3) {
836 /* Disable interrupts */
837 writel(0, phba->HCregaddr);
838 readl(phba->HCregaddr); /* flush */
839 }
dea3101e 840
1b32f6aa
JS		 841 if (phba->pport->load_flag & FC_UNLOADING)
842 lpfc_cleanup_discovery_resources(phba->pport);
843 else {
844 vports = lpfc_create_vport_work_array(phba);
845 if (vports != NULL)
3772a991
JS		 846 for (i = 0; i <= phba->max_vports &&
847 vports[i] != NULL; i++)
1b32f6aa
JS		 848 lpfc_cleanup_discovery_resources(vports[i]);
849 lpfc_destroy_vport_work_array(phba, vports);
7f5f3d0d
JS		 850 }
851 return 0;
dea3101e 852}
853
68e814f5
JS		 854/**
855 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free
856 * rspiocb which got deferred
857 *
858 * @phba: pointer to lpfc HBA data structure.
859 *
860 * This routine will cleanup completed slow path events after HBA is reset
861 * when bringing down the SLI Layer.
862 *
863 *
864 * Return codes
865 * void.
866 **/
867static void
868lpfc_sli4_free_sp_events(struct lpfc_hba *phba)
869{
870 struct lpfc_iocbq *rspiocbq;
871 struct hbq_dmabuf *dmabuf;
872 struct lpfc_cq_event *cq_event;
873
874 spin_lock_irq(&phba->hbalock);
875 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
876 spin_unlock_irq(&phba->hbalock);
877
878 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
879 /* Get the response iocb from the head of work queue */
880 spin_lock_irq(&phba->hbalock);
881 list_remove_head(&phba->sli4_hba.sp_queue_event,
882 cq_event, struct lpfc_cq_event, list);
883 spin_unlock_irq(&phba->hbalock);
884
885 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
886 case CQE_CODE_COMPL_WQE:
887 rspiocbq = container_of(cq_event, struct lpfc_iocbq,
888 cq_event);
889 lpfc_sli_release_iocbq(phba, rspiocbq);
890 break;
891 case CQE_CODE_RECEIVE:
892 case CQE_CODE_RECEIVE_V1:
893 dmabuf = container_of(cq_event, struct hbq_dmabuf,
894 cq_event);
895 lpfc_in_buf_free(phba, &dmabuf->dbuf);
896 }
897 }
898}
899
e59058c4 900/**
bcece5f5 901 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset
e59058c4
JS		 902 * @phba: pointer to lpfc HBA data structure.
903 *
bcece5f5
JS		 904 * This routine will cleanup posted ELS buffers after the HBA is reset
905 * when bringing down the SLI Layer.
906 *
e59058c4
JS		 907 *
908 * Return codes
bcece5f5 909 * void.
e59058c4 910 **/
bcece5f5
JS		 911static void
912lpfc_hba_free_post_buf(struct lpfc_hba *phba)
41415862
JW		 913{
914 struct lpfc_sli *psli = &phba->sli;
915 struct lpfc_sli_ring *pring;
916 struct lpfc_dmabuf *mp, *next_mp;
07eab624
JS		 917 LIST_HEAD(buflist);
918 int count;
41415862 919
92d7f7b0
JS		 920 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)
921 lpfc_sli_hbqbuf_free_all(phba);
922 else {
923 /* Cleanup preposted buffers on the ELS ring */
895427bd 924 pring = &psli->sli3_ring[LPFC_ELS_RING];
07eab624
JS		 925 spin_lock_irq(&phba->hbalock);
926 list_splice_init(&pring->postbufq, &buflist);
927 spin_unlock_irq(&phba->hbalock);
928
929 count = 0;
930 list_for_each_entry_safe(mp, next_mp, &buflist, list) {
92d7f7b0 931 list_del(&mp->list);
07eab624 932 count++;
92d7f7b0
JS		 933 lpfc_mbuf_free(phba, mp->virt, mp->phys);
934 kfree(mp);
935 }
07eab624
JS		 936
937 spin_lock_irq(&phba->hbalock);
938 pring->postbufq_cnt -= count;
bcece5f5 939 spin_unlock_irq(&phba->hbalock);
41415862 940 }
bcece5f5
JS		 941}
942
943/**
944 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset
945 * @phba: pointer to lpfc HBA data structure.
946 *
947 * This routine will cleanup the txcmplq after the HBA is reset when bringing
948 * down the SLI Layer.
949 *
950 * Return codes
951 * void
952 **/
953static void
954lpfc_hba_clean_txcmplq(struct lpfc_hba *phba)
955{
956 struct lpfc_sli *psli = &phba->sli;
895427bd 957 struct lpfc_queue *qp = NULL;
bcece5f5
JS		 958 struct lpfc_sli_ring *pring;
959 LIST_HEAD(completions);
960 int i;
961
895427bd
JS		 962 if (phba->sli_rev != LPFC_SLI_REV4) {
963 for (i = 0; i < psli->num_rings; i++) {
964 pring = &psli->sli3_ring[i];
bcece5f5 965 spin_lock_irq(&phba->hbalock);
895427bd
JS		 966 /* At this point in time the HBA is either reset or DOA
967 * Nothing should be on txcmplq as it will
968 * NEVER complete.
969 */
970 list_splice_init(&pring->txcmplq, &completions);
971 pring->txcmplq_cnt = 0;
bcece5f5 972 spin_unlock_irq(&phba->hbalock);
09372820 973
895427bd
JS		 974 lpfc_sli_abort_iocb_ring(phba, pring);
975 }
a257bf90 976 /* Cancel all the IOCBs from the completions list */
895427bd
JS		 977 lpfc_sli_cancel_iocbs(phba, &completions,
978 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
979 return;
980 }
981 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
982 pring = qp->pring;
983 if (!pring)
984 continue;
985 spin_lock_irq(&pring->ring_lock);
986 list_splice_init(&pring->txcmplq, &completions);
987 pring->txcmplq_cnt = 0;
988 spin_unlock_irq(&pring->ring_lock);
41415862
JW		 989 lpfc_sli_abort_iocb_ring(phba, pring);
990 }
895427bd
JS		 991 /* Cancel all the IOCBs from the completions list */
992 lpfc_sli_cancel_iocbs(phba, &completions,
993 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
bcece5f5 994}
41415862 995
bcece5f5
JS		 996/**
997 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset
998 int i;
999 * @phba: pointer to lpfc HBA data structure.
1000 *
1001 * This routine will do uninitialization after the HBA is reset when bring
1002 * down the SLI Layer.
1003 *
1004 * Return codes
1005 * 0 - success.
1006 * Any other value - error.
1007 **/
1008static int
1009lpfc_hba_down_post_s3(struct lpfc_hba *phba)
1010{
1011 lpfc_hba_free_post_buf(phba);
1012 lpfc_hba_clean_txcmplq(phba);
41415862
JW		 1013 return 0;
1014}
5af5eee7 1015
da0436e9
JS		 1016/**
1017 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset
1018 * @phba: pointer to lpfc HBA data structure.
1019 *
1020 * This routine will do uninitialization after the HBA is reset when bring
1021 * down the SLI Layer.
1022 *
1023 * Return codes
af901ca1 1024 * 0 - success.
da0436e9
JS		 1025 * Any other value - error.
1026 **/
1027static int
1028lpfc_hba_down_post_s4(struct lpfc_hba *phba)
1029{
1030 struct lpfc_scsi_buf *psb, *psb_next;
86c67379 1031 struct lpfc_nvmet_rcv_ctx *ctxp, *ctxp_next;
da0436e9 1032 LIST_HEAD(aborts);
895427bd 1033 LIST_HEAD(nvme_aborts);
86c67379 1034 LIST_HEAD(nvmet_aborts);
da0436e9 1035 unsigned long iflag = 0;
0f65ff68 1036 struct lpfc_sglq *sglq_entry = NULL;
cf1a1d3e 1037 int cnt;
0f65ff68 1038
895427bd
JS		 1039
1040 lpfc_sli_hbqbuf_free_all(phba);
bcece5f5
JS		 1041 lpfc_hba_clean_txcmplq(phba);
1042
da0436e9
JS		 1043 /* At this point in time the HBA is either reset or DOA. Either
1044 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be
895427bd 1045 * on the lpfc_els_sgl_list so that it can either be freed if the
da0436e9
JS		 1046 * driver is unloading or reposted if the driver is restarting
1047 * the port.
1048 */
895427bd 1049 spin_lock_irq(&phba->hbalock); /* required for lpfc_els_sgl_list and */
da0436e9 1050 /* scsl_buf_list */
895427bd 1051 /* sgl_list_lock required because worker thread uses this
da0436e9
JS		 1052 * list.
1053 */
895427bd 1054 spin_lock(&phba->sli4_hba.sgl_list_lock);
0f65ff68
JS		 1055 list_for_each_entry(sglq_entry,
1056 &phba->sli4_hba.lpfc_abts_els_sgl_list, list)
1057 sglq_entry->state = SGL_FREED;
1058
da0436e9 1059 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
895427bd
JS		 1060 &phba->sli4_hba.lpfc_els_sgl_list);
1061
f358dd0c 1062
895427bd 1063 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9
JS		 1064 /* abts_scsi_buf_list_lock required because worker thread uses this
1065 * list.
1066 */
895427bd
JS		 1067 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
1068 spin_lock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1069 list_splice_init(&phba->sli4_hba.lpfc_abts_scsi_buf_list,
1070 &aborts);
1071 spin_unlock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1072 }
1073
1074 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1075 spin_lock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1076 list_splice_init(&phba->sli4_hba.lpfc_abts_nvme_buf_list,
1077 &nvme_aborts);
86c67379
JS		 1078 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list,
1079 &nvmet_aborts);
895427bd
JS		 1080 spin_unlock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1081 }
1082
da0436e9
JS		 1083 spin_unlock_irq(&phba->hbalock);
1084
1085 list_for_each_entry_safe(psb, psb_next, &aborts, list) {
1086 psb->pCmd = NULL;
1087 psb->status = IOSTAT_SUCCESS;
1088 }
a40fc5f0
JS		 1089 spin_lock_irqsave(&phba->scsi_buf_list_put_lock, iflag);
1090 list_splice(&aborts, &phba->lpfc_scsi_buf_list_put);
1091 spin_unlock_irqrestore(&phba->scsi_buf_list_put_lock, iflag);
68e814f5 1092
86c67379 1093 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
cf1a1d3e 1094 cnt = 0;
86c67379
JS		 1095 list_for_each_entry_safe(psb, psb_next, &nvme_aborts, list) {
1096 psb->pCmd = NULL;
1097 psb->status = IOSTAT_SUCCESS;
cf1a1d3e 1098 cnt++;
86c67379
JS		 1099 }
1100 spin_lock_irqsave(&phba->nvme_buf_list_put_lock, iflag);
cf1a1d3e 1101 phba->put_nvme_bufs += cnt;
86c67379
JS		 1102 list_splice(&nvme_aborts, &phba->lpfc_nvme_buf_list_put);
1103 spin_unlock_irqrestore(&phba->nvme_buf_list_put_lock, iflag);
1104
1105 list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) {
1106 ctxp->flag &= ~(LPFC_NVMET_XBUSY | LPFC_NVMET_ABORT_OP);
6c621a22 1107 lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf);
86c67379 1108 }
895427bd 1109 }
895427bd 1110
68e814f5 1111 lpfc_sli4_free_sp_events(phba);
da0436e9
JS		 1112 return 0;
1113}
1114
1115/**
1116 * lpfc_hba_down_post - Wrapper func for hba down post routine
1117 * @phba: pointer to lpfc HBA data structure.
1118 *
1119 * This routine wraps the actual SLI3 or SLI4 routine for performing
1120 * uninitialization after the HBA is reset when bring down the SLI Layer.
1121 *
1122 * Return codes
af901ca1 1123 * 0 - success.
da0436e9
JS		 1124 * Any other value - error.
1125 **/
1126int
1127lpfc_hba_down_post(struct lpfc_hba *phba)
1128{
1129 return (*phba->lpfc_hba_down_post)(phba);
1130}
41415862 1131
e59058c4 1132/**
3621a710 1133 * lpfc_hb_timeout - The HBA-timer timeout handler
e59058c4
JS		 1134 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1135 *
1136 * This is the HBA-timer timeout handler registered to the lpfc driver. When
1137 * this timer fires, a HBA timeout event shall be posted to the lpfc driver
1138 * work-port-events bitmap and the worker thread is notified. This timeout
1139 * event will be used by the worker thread to invoke the actual timeout
1140 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will
1141 * be performed in the timeout handler and the HBA timeout event bit shall
1142 * be cleared by the worker thread after it has taken the event bitmap out.
1143 **/
a6ababd2 1144static void
f22eb4d3 1145lpfc_hb_timeout(struct timer_list *t)
858c9f6c
JS		 1146{
1147 struct lpfc_hba *phba;
5e9d9b82 1148 uint32_t tmo_posted;
858c9f6c
JS		 1149 unsigned long iflag;
1150
f22eb4d3 1151 phba = from_timer(phba, t, hb_tmofunc);
9399627f
JS		 1152
1153 /* Check for heart beat timeout conditions */
858c9f6c 1154 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
5e9d9b82
JS		 1155 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO;
1156 if (!tmo_posted)
858c9f6c
JS		 1157 phba->pport->work_port_events |= WORKER_HB_TMO;
1158 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1159
9399627f 1160 /* Tell the worker thread there is work to do */
5e9d9b82
JS		 1161 if (!tmo_posted)
1162 lpfc_worker_wake_up(phba);
858c9f6c
JS		 1163 return;
1164}
1165
19ca7609
JS		 1166/**
1167 * lpfc_rrq_timeout - The RRQ-timer timeout handler
1168 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1169 *
1170 * This is the RRQ-timer timeout handler registered to the lpfc driver. When
1171 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver
1172 * work-port-events bitmap and the worker thread is notified. This timeout
1173 * event will be used by the worker thread to invoke the actual timeout
1174 * handler routine, lpfc_rrq_handler. Any periodical operations will
1175 * be performed in the timeout handler and the RRQ timeout event bit shall
1176 * be cleared by the worker thread after it has taken the event bitmap out.
1177 **/
1178static void
f22eb4d3 1179lpfc_rrq_timeout(struct timer_list *t)
19ca7609
JS		 1180{
1181 struct lpfc_hba *phba;
19ca7609
JS		 1182 unsigned long iflag;
1183
f22eb4d3 1184 phba = from_timer(phba, t, rrq_tmr);
19ca7609 1185 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
06918ac5
JS		 1186 if (!(phba->pport->load_flag & FC_UNLOADING))
1187 phba->hba_flag |= HBA_RRQ_ACTIVE;
1188 else
1189 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
19ca7609 1190 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
06918ac5
JS		 1191
1192 if (!(phba->pport->load_flag & FC_UNLOADING))
1193 lpfc_worker_wake_up(phba);
19ca7609
JS		 1194}
1195
e59058c4 1196/**
3621a710 1197 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function
e59058c4
JS		 1198 * @phba: pointer to lpfc hba data structure.
1199 * @pmboxq: pointer to the driver internal queue element for mailbox command.
1200 *
1201 * This is the callback function to the lpfc heart-beat mailbox command.
1202 * If configured, the lpfc driver issues the heart-beat mailbox command to
1203 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the
1204 * heart-beat mailbox command is issued, the driver shall set up heart-beat
1205 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks
1206 * heart-beat outstanding state. Once the mailbox command comes back and
1207 * no error conditions detected, the heart-beat mailbox command timer is
1208 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding
1209 * state is cleared for the next heart-beat. If the timer expired with the
1210 * heart-beat outstanding state set, the driver will put the HBA offline.
1211 **/
858c9f6c
JS		 1212static void
1213lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
1214{
1215 unsigned long drvr_flag;
1216
1217 spin_lock_irqsave(&phba->hbalock, drvr_flag);
1218 phba->hb_outstanding = 0;
1219 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
1220
9399627f 1221 /* Check and reset heart-beat timer is necessary */
858c9f6c
JS		 1222 mempool_free(pmboxq, phba->mbox_mem_pool);
1223 if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) &&
1224 !(phba->link_state == LPFC_HBA_ERROR) &&
51ef4c26 1225 !(phba->pport->load_flag & FC_UNLOADING))
858c9f6c 1226 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1227 jiffies +
1228 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS		 1229 return;
1230}
1231
e59058c4 1232/**
3621a710 1233 * lpfc_hb_timeout_handler - The HBA-timer timeout handler
e59058c4
JS		 1234 * @phba: pointer to lpfc hba data structure.
1235 *
1236 * This is the actual HBA-timer timeout handler to be invoked by the worker
1237 * thread whenever the HBA timer fired and HBA-timeout event posted. This
1238 * handler performs any periodic operations needed for the device. If such
1239 * periodic event has already been attended to either in the interrupt handler
1240 * or by processing slow-ring or fast-ring events within the HBA-timer
1241 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets
1242 * the timer for the next timeout period. If lpfc heart-beat mailbox command
1243 * is configured and there is no heart-beat mailbox command outstanding, a
1244 * heart-beat mailbox is issued and timer set properly. Otherwise, if there
1245 * has been a heart-beat mailbox command outstanding, the HBA shall be put
1246 * to offline.
1247 **/
858c9f6c
JS		 1248void
1249lpfc_hb_timeout_handler(struct lpfc_hba *phba)
1250{
45ed1190 1251 struct lpfc_vport **vports;
858c9f6c 1252 LPFC_MBOXQ_t *pmboxq;
0ff10d46 1253 struct lpfc_dmabuf *buf_ptr;
45ed1190 1254 int retval, i;
858c9f6c 1255 struct lpfc_sli *psli = &phba->sli;
0ff10d46 1256 LIST_HEAD(completions);
0cf07f84
JS		 1257 struct lpfc_queue *qp;
1258 unsigned long time_elapsed;
1259 uint32_t tick_cqe, max_cqe, val;
1260 uint64_t tot, data1, data2, data3;
66d7ce93 1261 struct lpfc_nvmet_tgtport *tgtp;
0cf07f84
JS		 1262 struct lpfc_register reg_data;
1263 void __iomem *eqdreg = phba->sli4_hba.u.if_type2.EQDregaddr;
858c9f6c 1264
45ed1190
JS		 1265 vports = lpfc_create_vport_work_array(phba);
1266 if (vports != NULL)
4258e98e 1267 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
45ed1190 1268 lpfc_rcv_seq_check_edtov(vports[i]);
4258e98e
JS		 1269 lpfc_fdmi_num_disc_check(vports[i]);
1270 }
45ed1190
JS		 1271 lpfc_destroy_vport_work_array(phba, vports);
1272
858c9f6c 1273 if ((phba->link_state == LPFC_HBA_ERROR) ||
51ef4c26 1274 (phba->pport->load_flag & FC_UNLOADING) ||
858c9f6c
JS		 1275 (phba->pport->fc_flag & FC_OFFLINE_MODE))
1276 return;
1277
0cf07f84
JS		 1278 if (phba->cfg_auto_imax) {
1279 if (!phba->last_eqdelay_time) {
1280 phba->last_eqdelay_time = jiffies;
1281 goto skip_eqdelay;
1282 }
1283 time_elapsed = jiffies - phba->last_eqdelay_time;
1284 phba->last_eqdelay_time = jiffies;
1285
1286 tot = 0xffff;
1287 /* Check outstanding IO count */
1288 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1289 if (phba->nvmet_support) {
66d7ce93
DK		 1290 tgtp = phba->targetport->private;
1291 /* Calculate outstanding IOs */
1292 tot = atomic_read(&tgtp->rcv_fcp_cmd_drop);
1293 tot += atomic_read(&tgtp->xmt_fcp_release);
1294 tot = atomic_read(&tgtp->rcv_fcp_cmd_in) - tot;
0cf07f84
JS		 1295 } else {
1296 tot = atomic_read(&phba->fc4NvmeIoCmpls);
1297 data1 = atomic_read(
1298 &phba->fc4NvmeInputRequests);
1299 data2 = atomic_read(
1300 &phba->fc4NvmeOutputRequests);
1301 data3 = atomic_read(
1302 &phba->fc4NvmeControlRequests);
1303 tot = (data1 + data2 + data3) - tot;
1304 }
1305 }
1306
1307 /* Interrupts per sec per EQ */
1308 val = phba->cfg_fcp_imax / phba->io_channel_irqs;
1309 tick_cqe = val / CONFIG_HZ; /* Per tick per EQ */
1310
1311 /* Assume 1 CQE/ISR, calc max CQEs allowed for time duration */
1312 max_cqe = time_elapsed * tick_cqe;
1313
1314 for (i = 0; i < phba->io_channel_irqs; i++) {
1315 /* Fast-path EQ */
1316 qp = phba->sli4_hba.hba_eq[i];
1317 if (!qp)
1318 continue;
1319
1320 /* Use no EQ delay if we don't have many outstanding
1321 * IOs, or if we are only processing 1 CQE/ISR or less.
1322 * Otherwise, assume we can process up to lpfc_fcp_imax
1323 * interrupts per HBA.
1324 */
1325 if (tot < LPFC_NODELAY_MAX_IO ||
1326 qp->EQ_cqe_cnt <= max_cqe)
1327 val = 0;
1328 else
1329 val = phba->cfg_fcp_imax;
1330
1331 if (phba->sli.sli_flag & LPFC_SLI_USE_EQDR) {
1332 /* Use EQ Delay Register method */
1333
1334 /* Convert for EQ Delay register */
1335 if (val) {
1336 /* First, interrupts per sec per EQ */
1337 val = phba->cfg_fcp_imax /
1338 phba->io_channel_irqs;
1339
1340 /* us delay between each interrupt */
1341 val = LPFC_SEC_TO_USEC / val;
1342 }
1343 if (val != qp->q_mode) {
1344 reg_data.word0 = 0;
1345 bf_set(lpfc_sliport_eqdelay_id,
1346 &reg_data, qp->queue_id);
1347 bf_set(lpfc_sliport_eqdelay_delay,
1348 &reg_data, val);
1349 writel(reg_data.word0, eqdreg);
1350 }
1351 } else {
1352 /* Use mbox command method */
1353 if (val != qp->q_mode)
1354 lpfc_modify_hba_eq_delay(phba, i,
1355 1, val);
1356 }
1357
1358 /*
1359 * val is cfg_fcp_imax or 0 for mbox delay or us delay
1360 * between interrupts for EQDR.
1361 */
1362 qp->q_mode = val;
1363 qp->EQ_cqe_cnt = 0;
1364 }
1365 }
1366
1367skip_eqdelay:
858c9f6c 1368 spin_lock_irq(&phba->pport->work_port_lock);
858c9f6c 1369
256ec0d0
JS		 1370 if (time_after(phba->last_completion_time +
1371 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL),
1372 jiffies)) {
858c9f6c
JS		 1373 spin_unlock_irq(&phba->pport->work_port_lock);
1374 if (!phba->hb_outstanding)
1375 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1376 jiffies +
1377 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS		 1378 else
1379 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1380 jiffies +
1381 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c
JS		 1382 return;
1383 }
1384 spin_unlock_irq(&phba->pport->work_port_lock);
1385
0ff10d46
JS		 1386 if (phba->elsbuf_cnt &&
1387 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) {
1388 spin_lock_irq(&phba->hbalock);
1389 list_splice_init(&phba->elsbuf, &completions);
1390 phba->elsbuf_cnt = 0;
1391 phba->elsbuf_prev_cnt = 0;
1392 spin_unlock_irq(&phba->hbalock);
1393
1394 while (!list_empty(&completions)) {
1395 list_remove_head(&completions, buf_ptr,
1396 struct lpfc_dmabuf, list);
1397 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
1398 kfree(buf_ptr);
1399 }
1400 }
1401 phba->elsbuf_prev_cnt = phba->elsbuf_cnt;
1402
858c9f6c 1403 /* If there is no heart beat outstanding, issue a heartbeat command */
13815c83
JS		 1404 if (phba->cfg_enable_hba_heartbeat) {
1405 if (!phba->hb_outstanding) {
bc73905a
JS		 1406 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) &&
1407 (list_empty(&psli->mboxq))) {
1408 pmboxq = mempool_alloc(phba->mbox_mem_pool,
1409 GFP_KERNEL);
1410 if (!pmboxq) {
1411 mod_timer(&phba->hb_tmofunc,
1412 jiffies +
256ec0d0
JS		 1413 msecs_to_jiffies(1000 *
1414 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS		 1415 return;
1416 }
1417
1418 lpfc_heart_beat(phba, pmboxq);
1419 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl;
1420 pmboxq->vport = phba->pport;
1421 retval = lpfc_sli_issue_mbox(phba, pmboxq,
1422 MBX_NOWAIT);
1423
1424 if (retval != MBX_BUSY &&
1425 retval != MBX_SUCCESS) {
1426 mempool_free(pmboxq,
1427 phba->mbox_mem_pool);
1428 mod_timer(&phba->hb_tmofunc,
1429 jiffies +
256ec0d0
JS		 1430 msecs_to_jiffies(1000 *
1431 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS		 1432 return;
1433 }
1434 phba->skipped_hb = 0;
1435 phba->hb_outstanding = 1;
1436 } else if (time_before_eq(phba->last_completion_time,
1437 phba->skipped_hb)) {
1438 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
1439 "2857 Last completion time not "
1440 " updated in %d ms\n",
1441 jiffies_to_msecs(jiffies
1442 - phba->last_completion_time));
1443 } else
1444 phba->skipped_hb = jiffies;
1445
858c9f6c 1446 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1447 jiffies +
1448 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1449 return;
13815c83
JS		 1450 } else {
1451 /*
1452 * If heart beat timeout called with hb_outstanding set
dcf2a4e0
JS		 1453 * we need to give the hb mailbox cmd a chance to
1454 * complete or TMO.
13815c83 1455 */
dcf2a4e0
JS		 1456 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1457 "0459 Adapter heartbeat still out"
1458 "standing:last compl time was %d ms.\n",
1459 jiffies_to_msecs(jiffies
1460 - phba->last_completion_time));
1461 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1462 jiffies +
1463 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1464 }
4258e98e
JS		 1465 } else {
1466 mod_timer(&phba->hb_tmofunc,
1467 jiffies +
1468 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS		 1469 }
1470}
1471
e59058c4 1472/**
3621a710 1473 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention
e59058c4
JS		 1474 * @phba: pointer to lpfc hba data structure.
1475 *
1476 * This routine is called to bring the HBA offline when HBA hardware error
1477 * other than Port Error 6 has been detected.
1478 **/
09372820
JS		 1479static void
1480lpfc_offline_eratt(struct lpfc_hba *phba)
1481{
1482 struct lpfc_sli *psli = &phba->sli;
1483
1484 spin_lock_irq(&phba->hbalock);
f4b4c68f 1485 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
09372820 1486 spin_unlock_irq(&phba->hbalock);
618a5230 1487 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
09372820
JS		 1488
1489 lpfc_offline(phba);
1490 lpfc_reset_barrier(phba);
f4b4c68f 1491 spin_lock_irq(&phba->hbalock);
09372820 1492 lpfc_sli_brdreset(phba);
f4b4c68f 1493 spin_unlock_irq(&phba->hbalock);
09372820
JS		 1494 lpfc_hba_down_post(phba);
1495 lpfc_sli_brdready(phba, HS_MBRDY);
1496 lpfc_unblock_mgmt_io(phba);
1497 phba->link_state = LPFC_HBA_ERROR;
1498 return;
1499}
1500
da0436e9
JS		 1501/**
1502 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention
1503 * @phba: pointer to lpfc hba data structure.
1504 *
1505 * This routine is called to bring a SLI4 HBA offline when HBA hardware error
1506 * other than Port Error 6 has been detected.
1507 **/
a88dbb6a 1508void
da0436e9
JS		 1509lpfc_sli4_offline_eratt(struct lpfc_hba *phba)
1510{
946727dc
JS		 1511 spin_lock_irq(&phba->hbalock);
1512 phba->link_state = LPFC_HBA_ERROR;
1513 spin_unlock_irq(&phba->hbalock);
1514
618a5230 1515 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
da0436e9 1516 lpfc_offline(phba);
da0436e9 1517 lpfc_hba_down_post(phba);
da0436e9 1518 lpfc_unblock_mgmt_io(phba);
da0436e9
JS		 1519}
1520
a257bf90
JS		 1521/**
1522 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler
1523 * @phba: pointer to lpfc hba data structure.
1524 *
1525 * This routine is invoked to handle the deferred HBA hardware error
1526 * conditions. This type of error is indicated by HBA by setting ER1
1527 * and another ER bit in the host status register. The driver will
1528 * wait until the ER1 bit clears before handling the error condition.
1529 **/
1530static void
1531lpfc_handle_deferred_eratt(struct lpfc_hba *phba)
1532{
1533 uint32_t old_host_status = phba->work_hs;
a257bf90
JS		 1534 struct lpfc_sli *psli = &phba->sli;
1535
f4b4c68f
JS		 1536 /* If the pci channel is offline, ignore possible errors,
1537 * since we cannot communicate with the pci card anyway.
1538 */
1539 if (pci_channel_offline(phba->pcidev)) {
1540 spin_lock_irq(&phba->hbalock);
1541 phba->hba_flag &= ~DEFER_ERATT;
1542 spin_unlock_irq(&phba->hbalock);
1543 return;
1544 }
1545
a257bf90
JS		 1546 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1547 "0479 Deferred Adapter Hardware Error "
1548 "Data: x%x x%x x%x\n",
1549 phba->work_hs,
1550 phba->work_status[0], phba->work_status[1]);
1551
1552 spin_lock_irq(&phba->hbalock);
f4b4c68f 1553 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
a257bf90
JS		 1554 spin_unlock_irq(&phba->hbalock);
1555
1556
1557 /*
1558 * Firmware stops when it triggred erratt. That could cause the I/Os
1559 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the
1560 * SCSI layer retry it after re-establishing link.
1561 */
db55fba8 1562 lpfc_sli_abort_fcp_rings(phba);
a257bf90
JS		 1563
1564 /*
1565 * There was a firmware error. Take the hba offline and then
1566 * attempt to restart it.
1567 */
618a5230 1568 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
a257bf90
JS		 1569 lpfc_offline(phba);
1570
1571 /* Wait for the ER1 bit to clear.*/
1572 while (phba->work_hs & HS_FFER1) {
1573 msleep(100);
9940b97b
JS		 1574 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) {
1575 phba->work_hs = UNPLUG_ERR ;
1576 break;
1577 }
a257bf90
JS		 1578 /* If driver is unloading let the worker thread continue */
1579 if (phba->pport->load_flag & FC_UNLOADING) {
1580 phba->work_hs = 0;
1581 break;
1582 }
1583 }
1584
1585 /*
1586 * This is to ptrotect against a race condition in which
1587 * first write to the host attention register clear the
1588 * host status register.
1589 */
1590 if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING)))
1591 phba->work_hs = old_host_status & ~HS_FFER1;
1592
3772a991 1593 spin_lock_irq(&phba->hbalock);
a257bf90 1594 phba->hba_flag &= ~DEFER_ERATT;
3772a991 1595 spin_unlock_irq(&phba->hbalock);
a257bf90
JS		 1596 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
1597 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
1598}
1599
3772a991
JS		 1600static void
1601lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba)
1602{
1603 struct lpfc_board_event_header board_event;
1604 struct Scsi_Host *shost;
1605
1606 board_event.event_type = FC_REG_BOARD_EVENT;
1607 board_event.subcategory = LPFC_EVENT_PORTINTERR;
1608 shost = lpfc_shost_from_vport(phba->pport);
1609 fc_host_post_vendor_event(shost, fc_get_event_number(),
1610 sizeof(board_event),
1611 (char *) &board_event,
1612 LPFC_NL_VENDOR_ID);
1613}
1614
e59058c4 1615/**
3772a991 1616 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler
e59058c4
JS		 1617 * @phba: pointer to lpfc hba data structure.
1618 *
1619 * This routine is invoked to handle the following HBA hardware error
1620 * conditions:
1621 * 1 - HBA error attention interrupt
1622 * 2 - DMA ring index out of range
1623 * 3 - Mailbox command came back as unknown
1624 **/
3772a991
JS		 1625static void
1626lpfc_handle_eratt_s3(struct lpfc_hba *phba)
dea3101e 1627{
2e0fef85 1628 struct lpfc_vport *vport = phba->pport;
2e0fef85 1629 struct lpfc_sli *psli = &phba->sli;
d2873e4c 1630 uint32_t event_data;
57127f15
JS		 1631 unsigned long temperature;
1632 struct temp_event temp_event_data;
92d7f7b0 1633 struct Scsi_Host *shost;
2e0fef85 1634
8d63f375 1635 /* If the pci channel is offline, ignore possible errors,
3772a991
JS		 1636 * since we cannot communicate with the pci card anyway.
1637 */
1638 if (pci_channel_offline(phba->pcidev)) {
1639 spin_lock_irq(&phba->hbalock);
1640 phba->hba_flag &= ~DEFER_ERATT;
1641 spin_unlock_irq(&phba->hbalock);
8d63f375 1642 return;
3772a991
JS		 1643 }
1644
13815c83
JS		 1645 /* If resets are disabled then leave the HBA alone and return */
1646 if (!phba->cfg_enable_hba_reset)
1647 return;
dea3101e 1648
ea2151b4 1649 /* Send an internal error event to mgmt application */
3772a991 1650 lpfc_board_errevt_to_mgmt(phba);
ea2151b4 1651
a257bf90
JS		 1652 if (phba->hba_flag & DEFER_ERATT)
1653 lpfc_handle_deferred_eratt(phba);
1654
dcf2a4e0
JS		 1655 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) {
1656 if (phba->work_hs & HS_FFER6)
1657 /* Re-establishing Link */
1658 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1659 "1301 Re-establishing Link "
1660 "Data: x%x x%x x%x\n",
1661 phba->work_hs, phba->work_status[0],
1662 phba->work_status[1]);
1663 if (phba->work_hs & HS_FFER8)
1664 /* Device Zeroization */
1665 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1666 "2861 Host Authentication device "
1667 "zeroization Data:x%x x%x x%x\n",
1668 phba->work_hs, phba->work_status[0],
1669 phba->work_status[1]);
58da1ffb 1670
92d7f7b0 1671 spin_lock_irq(&phba->hbalock);
f4b4c68f 1672 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
92d7f7b0 1673 spin_unlock_irq(&phba->hbalock);
dea3101e 1674
1675 /*
1676 * Firmware stops when it triggled erratt with HS_FFER6.
1677 * That could cause the I/Os dropped by the firmware.
1678 * Error iocb (I/O) on txcmplq and let the SCSI layer
1679 * retry it after re-establishing link.
1680 */
db55fba8 1681 lpfc_sli_abort_fcp_rings(phba);
dea3101e 1682
dea3101e 1683 /*
1684 * There was a firmware error. Take the hba offline and then
1685 * attempt to restart it.
1686 */
618a5230 1687 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
dea3101e 1688 lpfc_offline(phba);
41415862 1689 lpfc_sli_brdrestart(phba);
dea3101e 1690 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
46fa311e 1691 lpfc_unblock_mgmt_io(phba);
dea3101e 1692 return;
1693 }
46fa311e 1694 lpfc_unblock_mgmt_io(phba);
57127f15
JS		 1695 } else if (phba->work_hs & HS_CRIT_TEMP) {
1696 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET);
1697 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1698 temp_event_data.event_code = LPFC_CRIT_TEMP;
1699 temp_event_data.data = (uint32_t)temperature;
1700
1701 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d7c255b2 1702 "0406 Adapter maximum temperature exceeded "
57127f15
JS		 1703 "(%ld), taking this port offline "
1704 "Data: x%x x%x x%x\n",
1705 temperature, phba->work_hs,
1706 phba->work_status[0], phba->work_status[1]);
1707
1708 shost = lpfc_shost_from_vport(phba->pport);
1709 fc_host_post_vendor_event(shost, fc_get_event_number(),
1710 sizeof(temp_event_data),
1711 (char *) &temp_event_data,
1712 SCSI_NL_VID_TYPE_PCI
1713 | PCI_VENDOR_ID_EMULEX);
1714
7af67051 1715 spin_lock_irq(&phba->hbalock);
7af67051
JS		 1716 phba->over_temp_state = HBA_OVER_TEMP;
1717 spin_unlock_irq(&phba->hbalock);
09372820 1718 lpfc_offline_eratt(phba);
57127f15 1719
dea3101e 1720 } else {
1721 /* The if clause above forces this code path when the status
9399627f
JS		 1722 * failure is a value other than FFER6. Do not call the offline
1723 * twice. This is the adapter hardware error path.
dea3101e 1724 */
1725 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 1726 "0457 Adapter Hardware Error "
dea3101e 1727 "Data: x%x x%x x%x\n",
e8b62011 1728 phba->work_hs,
dea3101e 1729 phba->work_status[0], phba->work_status[1]);
1730
d2873e4c 1731 event_data = FC_REG_DUMP_EVENT;
92d7f7b0 1732 shost = lpfc_shost_from_vport(vport);
2e0fef85 1733 fc_host_post_vendor_event(shost, fc_get_event_number(),
d2873e4c
JS		 1734 sizeof(event_data), (char *) &event_data,
1735 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
1736
09372820 1737 lpfc_offline_eratt(phba);
dea3101e 1738 }
9399627f 1739 return;
dea3101e 1740}
1741
618a5230
JS		 1742/**
1743 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg
1744 * @phba: pointer to lpfc hba data structure.
1745 * @mbx_action: flag for mailbox shutdown action.
1746 *
1747 * This routine is invoked to perform an SLI4 port PCI function reset in
1748 * response to port status register polling attention. It waits for port
1749 * status register (ERR, RDY, RN) bits before proceeding with function reset.
1750 * During this process, interrupt vectors are freed and later requested
1751 * for handling possible port resource change.
1752 **/
1753static int
e10b2022
JS		 1754lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action,
1755 bool en_rn_msg)
618a5230
JS		 1756{
1757 int rc;
1758 uint32_t intr_mode;
1759
65791f1f
JS		 1760 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
1761 LPFC_SLI_INTF_IF_TYPE_2) {
1762 /*
1763 * On error status condition, driver need to wait for port
1764 * ready before performing reset.
1765 */
1766 rc = lpfc_sli4_pdev_status_reg_wait(phba);
0e916ee7 1767 if (rc)
65791f1f
JS		 1768 return rc;
1769 }
0e916ee7 1770
65791f1f
JS		 1771 /* need reset: attempt for port recovery */
1772 if (en_rn_msg)
1773 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1774 "2887 Reset Needed: Attempting Port "
1775 "Recovery...\n");
1776 lpfc_offline_prep(phba, mbx_action);
1777 lpfc_offline(phba);
1778 /* release interrupt for possible resource change */
1779 lpfc_sli4_disable_intr(phba);
1780 lpfc_sli_brdrestart(phba);
1781 /* request and enable interrupt */
1782 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
1783 if (intr_mode == LPFC_INTR_ERROR) {
1784 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1785 "3175 Failed to enable interrupt\n");
1786 return -EIO;
618a5230 1787 }
65791f1f
JS		 1788 phba->intr_mode = intr_mode;
1789 rc = lpfc_online(phba);
1790 if (rc == 0)
1791 lpfc_unblock_mgmt_io(phba);
1792
618a5230
JS		 1793 return rc;
1794}
1795
da0436e9
JS		 1796/**
1797 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler
1798 * @phba: pointer to lpfc hba data structure.
1799 *
1800 * This routine is invoked to handle the SLI4 HBA hardware error attention
1801 * conditions.
1802 **/
1803static void
1804lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1805{
1806 struct lpfc_vport *vport = phba->pport;
1807 uint32_t event_data;
1808 struct Scsi_Host *shost;
2fcee4bf 1809 uint32_t if_type;
2e90f4b5
JS		 1810 struct lpfc_register portstat_reg = {0};
1811 uint32_t reg_err1, reg_err2;
1812 uint32_t uerrlo_reg, uemasklo_reg;
65791f1f 1813 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2;
e10b2022 1814 bool en_rn_msg = true;
946727dc 1815 struct temp_event temp_event_data;
65791f1f
JS		 1816 struct lpfc_register portsmphr_reg;
1817 int rc, i;
da0436e9
JS		 1818
1819 /* If the pci channel is offline, ignore possible errors, since
1820 * we cannot communicate with the pci card anyway.
1821 */
1822 if (pci_channel_offline(phba->pcidev))
1823 return;
da0436e9 1824
65791f1f 1825 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
2fcee4bf
JS		 1826 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
1827 switch (if_type) {
1828 case LPFC_SLI_INTF_IF_TYPE_0:
2e90f4b5
JS		 1829 pci_rd_rc1 = lpfc_readl(
1830 phba->sli4_hba.u.if_type0.UERRLOregaddr,
1831 &uerrlo_reg);
1832 pci_rd_rc2 = lpfc_readl(
1833 phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
1834 &uemasklo_reg);
1835 /* consider PCI bus read error as pci_channel_offline */
1836 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO)
1837 return;
65791f1f
JS		 1838 if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) {
1839 lpfc_sli4_offline_eratt(phba);
1840 return;
1841 }
1842 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1843 "7623 Checking UE recoverable");
1844
1845 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
1846 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1847 &portsmphr_reg.word0))
1848 continue;
1849
1850 smphr_port_status = bf_get(lpfc_port_smphr_port_status,
1851 &portsmphr_reg);
1852 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1853 LPFC_PORT_SEM_UE_RECOVERABLE)
1854 break;
1855 /*Sleep for 1Sec, before checking SEMAPHORE */
1856 msleep(1000);
1857 }
1858
1859 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1860 "4827 smphr_port_status x%x : Waited %dSec",
1861 smphr_port_status, i);
1862
1863 /* Recoverable UE, reset the HBA device */
1864 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1865 LPFC_PORT_SEM_UE_RECOVERABLE) {
1866 for (i = 0; i < 20; i++) {
1867 msleep(1000);
1868 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1869 &portsmphr_reg.word0) &&
1870 (LPFC_POST_STAGE_PORT_READY ==
1871 bf_get(lpfc_port_smphr_port_status,
1872 &portsmphr_reg))) {
1873 rc = lpfc_sli4_port_sta_fn_reset(phba,
1874 LPFC_MBX_NO_WAIT, en_rn_msg);
1875 if (rc == 0)
1876 return;
1877 lpfc_printf_log(phba,
1878 KERN_ERR, LOG_INIT,
1879 "4215 Failed to recover UE");
1880 break;
1881 }
1882 }
1883 }
1884 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1885 "7624 Firmware not ready: Failing UE recovery,"
1886 " waited %dSec", i);
2fcee4bf
JS		 1887 lpfc_sli4_offline_eratt(phba);
1888 break;
946727dc 1889
2fcee4bf 1890 case LPFC_SLI_INTF_IF_TYPE_2:
2e90f4b5
JS		 1891 pci_rd_rc1 = lpfc_readl(
1892 phba->sli4_hba.u.if_type2.STATUSregaddr,
1893 &portstat_reg.word0);
1894 /* consider PCI bus read error as pci_channel_offline */
6b5151fd
JS		 1895 if (pci_rd_rc1 == -EIO) {
1896 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1897 "3151 PCI bus read access failure: x%x\n",
1898 readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
2e90f4b5 1899 return;
6b5151fd 1900 }
2e90f4b5
JS		 1901 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
1902 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
2fcee4bf 1903 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
2fcee4bf
JS		 1904 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1905 "2889 Port Overtemperature event, "
946727dc
JS		 1906 "taking port offline Data: x%x x%x\n",
1907 reg_err1, reg_err2);
1908
310429ef 1909 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS		 1910 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1911 temp_event_data.event_code = LPFC_CRIT_TEMP;
1912 temp_event_data.data = 0xFFFFFFFF;
1913
1914 shost = lpfc_shost_from_vport(phba->pport);
1915 fc_host_post_vendor_event(shost, fc_get_event_number(),
1916 sizeof(temp_event_data),
1917 (char *)&temp_event_data,
1918 SCSI_NL_VID_TYPE_PCI
1919 | PCI_VENDOR_ID_EMULEX);
1920
2fcee4bf
JS		 1921 spin_lock_irq(&phba->hbalock);
1922 phba->over_temp_state = HBA_OVER_TEMP;
1923 spin_unlock_irq(&phba->hbalock);
1924 lpfc_sli4_offline_eratt(phba);
946727dc 1925 return;
2fcee4bf 1926 }
2e90f4b5 1927 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
e10b2022 1928 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) {
2e90f4b5 1929 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e10b2022
JS		 1930 "3143 Port Down: Firmware Update "
1931 "Detected\n");
1932 en_rn_msg = false;
1933 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2e90f4b5
JS		 1934 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1935 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1936 "3144 Port Down: Debug Dump\n");
1937 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1938 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON)
1939 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1940 "3145 Port Down: Provisioning\n");
618a5230 1941
946727dc
JS		 1942 /* If resets are disabled then leave the HBA alone and return */
1943 if (!phba->cfg_enable_hba_reset)
1944 return;
1945
618a5230 1946 /* Check port status register for function reset */
e10b2022
JS		 1947 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT,
1948 en_rn_msg);
618a5230
JS		 1949 if (rc == 0) {
1950 /* don't report event on forced debug dump */
1951 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1952 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1953 return;
1954 else
1955 break;
2fcee4bf 1956 }
618a5230 1957 /* fall through for not able to recover */
6b5151fd
JS		 1958 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1959 "3152 Unrecoverable error, bring the port "
1960 "offline\n");
2fcee4bf
JS		 1961 lpfc_sli4_offline_eratt(phba);
1962 break;
1963 case LPFC_SLI_INTF_IF_TYPE_1:
1964 default:
1965 break;
1966 }
2e90f4b5
JS		 1967 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1968 "3123 Report dump event to upper layer\n");
1969 /* Send an internal error event to mgmt application */
1970 lpfc_board_errevt_to_mgmt(phba);
1971
1972 event_data = FC_REG_DUMP_EVENT;
1973 shost = lpfc_shost_from_vport(vport);
1974 fc_host_post_vendor_event(shost, fc_get_event_number(),
1975 sizeof(event_data), (char *) &event_data,
1976 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
da0436e9
JS		 1977}
1978
1979/**
1980 * lpfc_handle_eratt - Wrapper func for handling hba error attention
1981 * @phba: pointer to lpfc HBA data structure.
1982 *
1983 * This routine wraps the actual SLI3 or SLI4 hba error attention handling
1984 * routine from the API jump table function pointer from the lpfc_hba struct.
1985 *
1986 * Return codes
af901ca1 1987 * 0 - success.
da0436e9
JS		 1988 * Any other value - error.
1989 **/
1990void
1991lpfc_handle_eratt(struct lpfc_hba *phba)
1992{
1993 (*phba->lpfc_handle_eratt)(phba);
1994}
1995
e59058c4 1996/**
3621a710 1997 * lpfc_handle_latt - The HBA link event handler
e59058c4
JS		 1998 * @phba: pointer to lpfc hba data structure.
1999 *
2000 * This routine is invoked from the worker thread to handle a HBA host
895427bd 2001 * attention link event. SLI3 only.
e59058c4 2002 **/
dea3101e 2003void
2e0fef85 2004lpfc_handle_latt(struct lpfc_hba *phba)
dea3101e 2005{
2e0fef85
JS		 2006 struct lpfc_vport *vport = phba->pport;
2007 struct lpfc_sli *psli = &phba->sli;
dea3101e 2008 LPFC_MBOXQ_t *pmb;
2009 volatile uint32_t control;
2010 struct lpfc_dmabuf *mp;
09372820 2011 int rc = 0;
dea3101e 2012
2013 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
09372820
JS		 2014 if (!pmb) {
2015 rc = 1;
dea3101e 2016 goto lpfc_handle_latt_err_exit;
09372820 2017 }
dea3101e 2018
2019 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
09372820
JS		 2020 if (!mp) {
2021 rc = 2;
dea3101e 2022 goto lpfc_handle_latt_free_pmb;
09372820 2023 }
dea3101e 2024
2025 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
09372820
JS		 2026 if (!mp->virt) {
2027 rc = 3;
dea3101e 2028 goto lpfc_handle_latt_free_mp;
09372820 2029 }
dea3101e 2030
6281bfe0 2031 /* Cleanup any outstanding ELS commands */
549e55cd 2032 lpfc_els_flush_all_cmd(phba);
dea3101e 2033
2034 psli->slistat.link_event++;
76a95d75
JS		 2035 lpfc_read_topology(phba, pmb, mp);
2036 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
2e0fef85 2037 pmb->vport = vport;
0d2b6b83 2038 /* Block ELS IOCBs until we have processed this mbox command */
895427bd 2039 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
0b727fea 2040 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT);
09372820
JS		 2041 if (rc == MBX_NOT_FINISHED) {
2042 rc = 4;
14691150 2043 goto lpfc_handle_latt_free_mbuf;
09372820 2044 }
dea3101e 2045
2046 /* Clear Link Attention in HA REG */
2e0fef85 2047 spin_lock_irq(&phba->hbalock);
dea3101e 2048 writel(HA_LATT, phba->HAregaddr);
2049 readl(phba->HAregaddr); /* flush */
2e0fef85 2050 spin_unlock_irq(&phba->hbalock);
dea3101e 2051
2052 return;
2053
14691150 2054lpfc_handle_latt_free_mbuf:
895427bd 2055 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
14691150 2056 lpfc_mbuf_free(phba, mp->virt, mp->phys);
dea3101e 2057lpfc_handle_latt_free_mp:
2058 kfree(mp);
2059lpfc_handle_latt_free_pmb:
1dcb58e5 2060 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 2061lpfc_handle_latt_err_exit:
2062 /* Enable Link attention interrupts */
2e0fef85 2063 spin_lock_irq(&phba->hbalock);
dea3101e 2064 psli->sli_flag |= LPFC_PROCESS_LA;
2065 control = readl(phba->HCregaddr);
2066 control |= HC_LAINT_ENA;
2067 writel(control, phba->HCregaddr);
2068 readl(phba->HCregaddr); /* flush */
2069
2070 /* Clear Link Attention in HA REG */
2071 writel(HA_LATT, phba->HAregaddr);
2072 readl(phba->HAregaddr); /* flush */
2e0fef85 2073 spin_unlock_irq(&phba->hbalock);
dea3101e 2074 lpfc_linkdown(phba);
2e0fef85 2075 phba->link_state = LPFC_HBA_ERROR;
dea3101e 2076
09372820
JS		 2077 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
2078 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc);
dea3101e 2079
2080 return;
2081}
2082
e59058c4 2083/**
3621a710 2084 * lpfc_parse_vpd - Parse VPD (Vital Product Data)
e59058c4
JS		 2085 * @phba: pointer to lpfc hba data structure.
2086 * @vpd: pointer to the vital product data.
2087 * @len: length of the vital product data in bytes.
2088 *
2089 * This routine parses the Vital Product Data (VPD). The VPD is treated as
2090 * an array of characters. In this routine, the ModelName, ProgramType, and
2091 * ModelDesc, etc. fields of the phba data structure will be populated.
2092 *
2093 * Return codes
2094 * 0 - pointer to the VPD passed in is NULL
2095 * 1 - success
2096 **/
3772a991 2097int
2e0fef85 2098lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len)
dea3101e 2099{
2100 uint8_t lenlo, lenhi;
07da60c1 2101 int Length;
dea3101e 2102 int i, j;
2103 int finished = 0;
2104 int index = 0;
2105
2106 if (!vpd)
2107 return 0;
2108
2109 /* Vital Product */
ed957684 2110 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 2111 "0455 Vital Product Data: x%x x%x x%x x%x\n",
dea3101e 2112 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
2113 (uint32_t) vpd[3]);
74b72a59 2114 while (!finished && (index < (len - 4))) {
dea3101e 2115 switch (vpd[index]) {
2116 case 0x82:
74b72a59 2117 case 0x91:
dea3101e 2118 index += 1;
2119 lenlo = vpd[index];
2120 index += 1;
2121 lenhi = vpd[index];
2122 index += 1;
2123 i = ((((unsigned short)lenhi) << 8) + lenlo);
2124 index += i;
2125 break;
2126 case 0x90:
2127 index += 1;
2128 lenlo = vpd[index];
2129 index += 1;
2130 lenhi = vpd[index];
2131 index += 1;
2132 Length = ((((unsigned short)lenhi) << 8) + lenlo);
74b72a59
JW		 2133 if (Length > len - index)
2134 Length = len - index;
dea3101e 2135 while (Length > 0) {
2136 /* Look for Serial Number */
2137 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
2138 index += 2;
2139 i = vpd[index];
2140 index += 1;
2141 j = 0;
2142 Length -= (3+i);
2143 while(i--) {
2144 phba->SerialNumber[j++] = vpd[index++];
2145 if (j == 31)
2146 break;
2147 }
2148 phba->SerialNumber[j] = 0;
2149 continue;
2150 }
2151 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
2152 phba->vpd_flag |= VPD_MODEL_DESC;
2153 index += 2;
2154 i = vpd[index];
2155 index += 1;
2156 j = 0;
2157 Length -= (3+i);
2158 while(i--) {
2159 phba->ModelDesc[j++] = vpd[index++];
2160 if (j == 255)
2161 break;
2162 }
2163 phba->ModelDesc[j] = 0;
2164 continue;
2165 }
2166 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
2167 phba->vpd_flag |= VPD_MODEL_NAME;
2168 index += 2;
2169 i = vpd[index];
2170 index += 1;
2171 j = 0;
2172 Length -= (3+i);
2173 while(i--) {
2174 phba->ModelName[j++] = vpd[index++];
2175 if (j == 79)
2176 break;
2177 }
2178 phba->ModelName[j] = 0;
2179 continue;
2180 }
2181 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
2182 phba->vpd_flag |= VPD_PROGRAM_TYPE;
2183 index += 2;
2184 i = vpd[index];
2185 index += 1;
2186 j = 0;
2187 Length -= (3+i);
2188 while(i--) {
2189 phba->ProgramType[j++] = vpd[index++];
2190 if (j == 255)
2191 break;
2192 }
2193 phba->ProgramType[j] = 0;
2194 continue;
2195 }
2196 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
2197 phba->vpd_flag |= VPD_PORT;
2198 index += 2;
2199 i = vpd[index];
2200 index += 1;
2201 j = 0;
2202 Length -= (3+i);
2203 while(i--) {
cd1c8301
JS		 2204 if ((phba->sli_rev == LPFC_SLI_REV4) &&
2205 (phba->sli4_hba.pport_name_sta ==
2206 LPFC_SLI4_PPNAME_GET)) {
2207 j++;
2208 index++;
2209 } else
2210 phba->Port[j++] = vpd[index++];
2211 if (j == 19)
2212 break;
dea3101e 2213 }
cd1c8301
JS		 2214 if ((phba->sli_rev != LPFC_SLI_REV4) ||
2215 (phba->sli4_hba.pport_name_sta ==
2216 LPFC_SLI4_PPNAME_NON))
2217 phba->Port[j] = 0;
dea3101e 2218 continue;
2219 }
2220 else {
2221 index += 2;
2222 i = vpd[index];
2223 index += 1;
2224 index += i;
2225 Length -= (3 + i);
2226 }
2227 }
2228 finished = 0;
2229 break;
2230 case 0x78:
2231 finished = 1;
2232 break;
2233 default:
2234 index ++;
2235 break;
2236 }
74b72a59 2237 }
dea3101e 2238
2239 return(1);
2240}
2241
e59058c4 2242/**
3621a710 2243 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description
e59058c4
JS		 2244 * @phba: pointer to lpfc hba data structure.
2245 * @mdp: pointer to the data structure to hold the derived model name.
2246 * @descp: pointer to the data structure to hold the derived description.
2247 *
2248 * This routine retrieves HBA's description based on its registered PCI device
2249 * ID. The @descp passed into this function points to an array of 256 chars. It
2250 * shall be returned with the model name, maximum speed, and the host bus type.
2251 * The @mdp passed into this function points to an array of 80 chars. When the
2252 * function returns, the @mdp will be filled with the model name.
2253 **/
dea3101e 2254static void
2e0fef85 2255lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
dea3101e 2256{
2257 lpfc_vpd_t *vp;
fefcb2b6 2258 uint16_t dev_id = phba->pcidev->device;
74b72a59 2259 int max_speed;
84774a4d 2260 int GE = 0;
da0436e9 2261 int oneConnect = 0; /* default is not a oneConnect */
74b72a59 2262 struct {
a747c9ce
JS		 2263 char *name;
2264 char *bus;
2265 char *function;
2266 } m = {"<Unknown>", "", ""};
74b72a59
JW		 2267
2268 if (mdp && mdp[0] != '\0'
2269 && descp && descp[0] != '\0')
2270 return;
2271
d38dd52c
JS		 2272 if (phba->lmt & LMT_32Gb)
2273 max_speed = 32;
2274 else if (phba->lmt & LMT_16Gb)
c0c11512
JS		 2275 max_speed = 16;
2276 else if (phba->lmt & LMT_10Gb)
74b72a59
JW		 2277 max_speed = 10;
2278 else if (phba->lmt & LMT_8Gb)
2279 max_speed = 8;
2280 else if (phba->lmt & LMT_4Gb)
2281 max_speed = 4;
2282 else if (phba->lmt & LMT_2Gb)
2283 max_speed = 2;
4169d868 2284 else if (phba->lmt & LMT_1Gb)
74b72a59 2285 max_speed = 1;
4169d868
JS		 2286 else
2287 max_speed = 0;
dea3101e 2288
2289 vp = &phba->vpd;
dea3101e 2290
e4adb204 2291 switch (dev_id) {
06325e74 2292 case PCI_DEVICE_ID_FIREFLY:
12222f4f
JS		 2293 m = (typeof(m)){"LP6000", "PCI",
2294 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2295 break;
dea3101e 2296 case PCI_DEVICE_ID_SUPERFLY:
2297 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
12222f4f 2298 m = (typeof(m)){"LP7000", "PCI", ""};
dea3101e 2299 else
12222f4f
JS		 2300 m = (typeof(m)){"LP7000E", "PCI", ""};
2301 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e 2302 break;
2303 case PCI_DEVICE_ID_DRAGONFLY:
a747c9ce 2304 m = (typeof(m)){"LP8000", "PCI",
12222f4f 2305 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2306 break;
2307 case PCI_DEVICE_ID_CENTAUR:
2308 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
12222f4f 2309 m = (typeof(m)){"LP9002", "PCI", ""};
dea3101e 2310 else
12222f4f
JS		 2311 m = (typeof(m)){"LP9000", "PCI", ""};
2312 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e 2313 break;
2314 case PCI_DEVICE_ID_RFLY:
a747c9ce 2315 m = (typeof(m)){"LP952", "PCI",
12222f4f 2316 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2317 break;
2318 case PCI_DEVICE_ID_PEGASUS:
a747c9ce 2319 m = (typeof(m)){"LP9802", "PCI-X",
12222f4f 2320 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2321 break;
2322 case PCI_DEVICE_ID_THOR:
a747c9ce 2323 m = (typeof(m)){"LP10000", "PCI-X",
12222f4f 2324 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2325 break;
2326 case PCI_DEVICE_ID_VIPER:
a747c9ce 2327 m = (typeof(m)){"LPX1000", "PCI-X",
12222f4f 2328 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2329 break;
2330 case PCI_DEVICE_ID_PFLY:
a747c9ce 2331 m = (typeof(m)){"LP982", "PCI-X",
12222f4f 2332 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2333 break;
2334 case PCI_DEVICE_ID_TFLY:
a747c9ce 2335 m = (typeof(m)){"LP1050", "PCI-X",
12222f4f 2336 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2337 break;
2338 case PCI_DEVICE_ID_HELIOS:
a747c9ce 2339 m = (typeof(m)){"LP11000", "PCI-X2",
12222f4f 2340 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2341 break;
e4adb204 2342 case PCI_DEVICE_ID_HELIOS_SCSP:
a747c9ce 2343 m = (typeof(m)){"LP11000-SP", "PCI-X2",
12222f4f 2344 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC		 2345 break;
2346 case PCI_DEVICE_ID_HELIOS_DCSP:
a747c9ce 2347 m = (typeof(m)){"LP11002-SP", "PCI-X2",
12222f4f 2348 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC		 2349 break;
2350 case PCI_DEVICE_ID_NEPTUNE:
12222f4f
JS		 2351 m = (typeof(m)){"LPe1000", "PCIe",
2352 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC		 2353 break;
2354 case PCI_DEVICE_ID_NEPTUNE_SCSP:
12222f4f
JS		 2355 m = (typeof(m)){"LPe1000-SP", "PCIe",
2356 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC		 2357 break;
2358 case PCI_DEVICE_ID_NEPTUNE_DCSP:
12222f4f
JS		 2359 m = (typeof(m)){"LPe1002-SP", "PCIe",
2360 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204 2361 break;
dea3101e 2362 case PCI_DEVICE_ID_BMID:
a747c9ce 2363 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"};
dea3101e 2364 break;
2365 case PCI_DEVICE_ID_BSMB:
12222f4f
JS		 2366 m = (typeof(m)){"LP111", "PCI-X2",
2367 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2368 break;
2369 case PCI_DEVICE_ID_ZEPHYR:
a747c9ce 2370 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
dea3101e 2371 break;
e4adb204 2372 case PCI_DEVICE_ID_ZEPHYR_SCSP:
a747c9ce 2373 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
e4adb204
JSEC		 2374 break;
2375 case PCI_DEVICE_ID_ZEPHYR_DCSP:
a747c9ce 2376 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"};
a257bf90 2377 GE = 1;
e4adb204 2378 break;
dea3101e 2379 case PCI_DEVICE_ID_ZMID:
a747c9ce 2380 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"};
dea3101e 2381 break;
2382 case PCI_DEVICE_ID_ZSMB:
a747c9ce 2383 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"};
dea3101e 2384 break;
2385 case PCI_DEVICE_ID_LP101:
12222f4f
JS		 2386 m = (typeof(m)){"LP101", "PCI-X",
2387 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2388 break;
2389 case PCI_DEVICE_ID_LP10000S:
12222f4f
JS		 2390 m = (typeof(m)){"LP10000-S", "PCI",
2391 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2392 break;
e4adb204 2393 case PCI_DEVICE_ID_LP11000S:
12222f4f
JS		 2394 m = (typeof(m)){"LP11000-S", "PCI-X2",
2395 "Obsolete, Unsupported Fibre Channel Adapter"};
18a3b596 2396 break;
e4adb204 2397 case PCI_DEVICE_ID_LPE11000S:
12222f4f
JS		 2398 m = (typeof(m)){"LPe11000-S", "PCIe",
2399 "Obsolete, Unsupported Fibre Channel Adapter"};
5cc36b3c 2400 break;
b87eab38 2401 case PCI_DEVICE_ID_SAT:
a747c9ce 2402 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2403 break;
2404 case PCI_DEVICE_ID_SAT_MID:
a747c9ce 2405 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2406 break;
2407 case PCI_DEVICE_ID_SAT_SMB:
a747c9ce 2408 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2409 break;
2410 case PCI_DEVICE_ID_SAT_DCSP:
a747c9ce 2411 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2412 break;
2413 case PCI_DEVICE_ID_SAT_SCSP:
a747c9ce 2414 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2415 break;
2416 case PCI_DEVICE_ID_SAT_S:
a747c9ce 2417 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"};
b87eab38 2418 break;
84774a4d 2419 case PCI_DEVICE_ID_HORNET:
12222f4f
JS		 2420 m = (typeof(m)){"LP21000", "PCIe",
2421 "Obsolete, Unsupported FCoE Adapter"};
84774a4d
JS		 2422 GE = 1;
2423 break;
2424 case PCI_DEVICE_ID_PROTEUS_VF:
a747c9ce 2425 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2426 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS		 2427 break;
2428 case PCI_DEVICE_ID_PROTEUS_PF:
a747c9ce 2429 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2430 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS		 2431 break;
2432 case PCI_DEVICE_ID_PROTEUS_S:
a747c9ce 2433 m = (typeof(m)){"LPemv12002-S", "PCIe IOV",
12222f4f 2434 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d 2435 break;
da0436e9
JS		 2436 case PCI_DEVICE_ID_TIGERSHARK:
2437 oneConnect = 1;
a747c9ce 2438 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"};
da0436e9 2439 break;
a747c9ce 2440 case PCI_DEVICE_ID_TOMCAT:
6669f9bb 2441 oneConnect = 1;
a747c9ce
JS		 2442 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"};
2443 break;
2444 case PCI_DEVICE_ID_FALCON:
2445 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe",
2446 "EmulexSecure Fibre"};
6669f9bb 2447 break;
98fc5dd9
JS		 2448 case PCI_DEVICE_ID_BALIUS:
2449 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O",
12222f4f 2450 "Obsolete, Unsupported Fibre Channel Adapter"};
98fc5dd9 2451 break;
085c647c 2452 case PCI_DEVICE_ID_LANCER_FC:
c0c11512 2453 m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"};
085c647c 2454 break;
12222f4f
JS		 2455 case PCI_DEVICE_ID_LANCER_FC_VF:
2456 m = (typeof(m)){"LPe16000", "PCIe",
2457 "Obsolete, Unsupported Fibre Channel Adapter"};
2458 break;
085c647c
JS		 2459 case PCI_DEVICE_ID_LANCER_FCOE:
2460 oneConnect = 1;
079b5c91 2461 m = (typeof(m)){"OCe15100", "PCIe", "FCoE"};
085c647c 2462 break;
12222f4f
JS		 2463 case PCI_DEVICE_ID_LANCER_FCOE_VF:
2464 oneConnect = 1;
2465 m = (typeof(m)){"OCe15100", "PCIe",
2466 "Obsolete, Unsupported FCoE"};
2467 break;
d38dd52c
JS		 2468 case PCI_DEVICE_ID_LANCER_G6_FC:
2469 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"};
2470 break;
f8cafd38
JS		 2471 case PCI_DEVICE_ID_SKYHAWK:
2472 case PCI_DEVICE_ID_SKYHAWK_VF:
2473 oneConnect = 1;
2474 m = (typeof(m)){"OCe14000", "PCIe", "FCoE"};
2475 break;
5cc36b3c 2476 default:
a747c9ce 2477 m = (typeof(m)){"Unknown", "", ""};
e4adb204 2478 break;
dea3101e 2479 }
74b72a59
JW		 2480
2481 if (mdp && mdp[0] == '\0')
2482 snprintf(mdp, 79,"%s", m.name);
c0c11512
JS		 2483 /*
2484 * oneConnect hba requires special processing, they are all initiators
da0436e9
JS		 2485 * and we put the port number on the end
2486 */
2487 if (descp && descp[0] == '\0') {
2488 if (oneConnect)
2489 snprintf(descp, 255,
4169d868 2490 "Emulex OneConnect %s, %s Initiator %s",
a747c9ce 2491 m.name, m.function,
da0436e9 2492 phba->Port);
4169d868
JS		 2493 else if (max_speed == 0)
2494 snprintf(descp, 255,
290237d2 2495 "Emulex %s %s %s",
4169d868 2496 m.name, m.bus, m.function);
da0436e9
JS		 2497 else
2498 snprintf(descp, 255,
2499 "Emulex %s %d%s %s %s",
a747c9ce
JS		 2500 m.name, max_speed, (GE) ? "GE" : "Gb",
2501 m.bus, m.function);
da0436e9 2502 }
dea3101e 2503}
2504
e59058c4 2505/**
3621a710 2506 * lpfc_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring
e59058c4
JS		 2507 * @phba: pointer to lpfc hba data structure.
2508 * @pring: pointer to a IOCB ring.
2509 * @cnt: the number of IOCBs to be posted to the IOCB ring.
2510 *
2511 * This routine posts a given number of IOCBs with the associated DMA buffer
2512 * descriptors specified by the cnt argument to the given IOCB ring.
2513 *
2514 * Return codes
2515 * The number of IOCBs NOT able to be posted to the IOCB ring.
2516 **/
dea3101e 2517int
495a714c 2518lpfc_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt)
dea3101e 2519{
2520 IOCB_t *icmd;
0bd4ca25 2521 struct lpfc_iocbq *iocb;
dea3101e 2522 struct lpfc_dmabuf *mp1, *mp2;
2523
2524 cnt += pring->missbufcnt;
2525
2526 /* While there are buffers to post */
2527 while (cnt > 0) {
2528 /* Allocate buffer for command iocb */
0bd4ca25 2529 iocb = lpfc_sli_get_iocbq(phba);
dea3101e 2530 if (iocb == NULL) {
2531 pring->missbufcnt = cnt;
2532 return cnt;
2533 }
dea3101e 2534 icmd = &iocb->iocb;
2535
2536 /* 2 buffers can be posted per command */
2537 /* Allocate buffer to post */
2538 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2539 if (mp1)
98c9ea5c
JS		 2540 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys);
2541 if (!mp1 || !mp1->virt) {
c9475cb0 2542 kfree(mp1);
604a3e30 2543 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2544 pring->missbufcnt = cnt;
2545 return cnt;
2546 }
2547
2548 INIT_LIST_HEAD(&mp1->list);
2549 /* Allocate buffer to post */
2550 if (cnt > 1) {
2551 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2552 if (mp2)
2553 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
2554 &mp2->phys);
98c9ea5c 2555 if (!mp2 || !mp2->virt) {
c9475cb0 2556 kfree(mp2);
dea3101e 2557 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2558 kfree(mp1);
604a3e30 2559 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2560 pring->missbufcnt = cnt;
2561 return cnt;
2562 }
2563
2564 INIT_LIST_HEAD(&mp2->list);
2565 } else {
2566 mp2 = NULL;
2567 }
2568
2569 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
2570 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
2571 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
2572 icmd->ulpBdeCount = 1;
2573 cnt--;
2574 if (mp2) {
2575 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
2576 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
2577 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
2578 cnt--;
2579 icmd->ulpBdeCount = 2;
2580 }
2581
2582 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
2583 icmd->ulpLe = 1;
2584
3772a991
JS		 2585 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) ==
2586 IOCB_ERROR) {
dea3101e 2587 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2588 kfree(mp1);
2589 cnt++;
2590 if (mp2) {
2591 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
2592 kfree(mp2);
2593 cnt++;
2594 }
604a3e30 2595 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2596 pring->missbufcnt = cnt;
dea3101e 2597 return cnt;
2598 }
dea3101e 2599 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
92d7f7b0 2600 if (mp2)
dea3101e 2601 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
dea3101e 2602 }
2603 pring->missbufcnt = 0;
2604 return 0;
2605}
2606
e59058c4 2607/**
3621a710 2608 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring
e59058c4
JS		 2609 * @phba: pointer to lpfc hba data structure.
2610 *
2611 * This routine posts initial receive IOCB buffers to the ELS ring. The
2612 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is
895427bd 2613 * set to 64 IOCBs. SLI3 only.
e59058c4
JS		 2614 *
2615 * Return codes
2616 * 0 - success (currently always success)
2617 **/
dea3101e 2618static int
2e0fef85 2619lpfc_post_rcv_buf(struct lpfc_hba *phba)
dea3101e 2620{
2621 struct lpfc_sli *psli = &phba->sli;
2622
2623 /* Ring 0, ELS / CT buffers */
895427bd 2624 lpfc_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0);
dea3101e 2625 /* Ring 2 - FCP no buffers needed */
2626
2627 return 0;
2628}
2629
2630#define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
2631
e59058c4 2632/**
3621a710 2633 * lpfc_sha_init - Set up initial array of hash table entries
e59058c4
JS		 2634 * @HashResultPointer: pointer to an array as hash table.
2635 *
2636 * This routine sets up the initial values to the array of hash table entries
2637 * for the LC HBAs.
2638 **/
dea3101e 2639static void
2640lpfc_sha_init(uint32_t * HashResultPointer)
2641{
2642 HashResultPointer[0] = 0x67452301;
2643 HashResultPointer[1] = 0xEFCDAB89;
2644 HashResultPointer[2] = 0x98BADCFE;
2645 HashResultPointer[3] = 0x10325476;
2646 HashResultPointer[4] = 0xC3D2E1F0;
2647}
2648
e59058c4 2649/**
3621a710 2650 * lpfc_sha_iterate - Iterate initial hash table with the working hash table
e59058c4
JS		 2651 * @HashResultPointer: pointer to an initial/result hash table.
2652 * @HashWorkingPointer: pointer to an working hash table.
2653 *
2654 * This routine iterates an initial hash table pointed by @HashResultPointer
2655 * with the values from the working hash table pointeed by @HashWorkingPointer.
2656 * The results are putting back to the initial hash table, returned through
2657 * the @HashResultPointer as the result hash table.
2658 **/
dea3101e 2659static void
2660lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
2661{
2662 int t;
2663 uint32_t TEMP;
2664 uint32_t A, B, C, D, E;
2665 t = 16;
2666 do {
2667 HashWorkingPointer[t] =
2668 S(1,
2669 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
2670 8] ^
2671 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
2672 } while (++t <= 79);
2673 t = 0;
2674 A = HashResultPointer[0];
2675 B = HashResultPointer[1];
2676 C = HashResultPointer[2];
2677 D = HashResultPointer[3];
2678 E = HashResultPointer[4];
2679
2680 do {
2681 if (t < 20) {
2682 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
2683 } else if (t < 40) {
2684 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
2685 } else if (t < 60) {
2686 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
2687 } else {
2688 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
2689 }
2690 TEMP += S(5, A) + E + HashWorkingPointer[t];
2691 E = D;
2692 D = C;
2693 C = S(30, B);
2694 B = A;
2695 A = TEMP;
2696 } while (++t <= 79);
2697
2698 HashResultPointer[0] += A;
2699 HashResultPointer[1] += B;
2700 HashResultPointer[2] += C;
2701 HashResultPointer[3] += D;
2702 HashResultPointer[4] += E;
2703
2704}
2705
e59058c4 2706/**
3621a710 2707 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA
e59058c4
JS		 2708 * @RandomChallenge: pointer to the entry of host challenge random number array.
2709 * @HashWorking: pointer to the entry of the working hash array.
2710 *
2711 * This routine calculates the working hash array referred by @HashWorking
2712 * from the challenge random numbers associated with the host, referred by
2713 * @RandomChallenge. The result is put into the entry of the working hash
2714 * array and returned by reference through @HashWorking.
2715 **/
dea3101e 2716static void
2717lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
2718{
2719 *HashWorking = (*RandomChallenge ^ *HashWorking);
2720}
2721
e59058c4 2722/**
3621a710 2723 * lpfc_hba_init - Perform special handling for LC HBA initialization
e59058c4
JS		 2724 * @phba: pointer to lpfc hba data structure.
2725 * @hbainit: pointer to an array of unsigned 32-bit integers.
2726 *
2727 * This routine performs the special handling for LC HBA initialization.
2728 **/
dea3101e 2729void
2730lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
2731{
2732 int t;
2733 uint32_t *HashWorking;
2e0fef85 2734 uint32_t *pwwnn = (uint32_t *) phba->wwnn;
dea3101e 2735
bbfbbbc1 2736 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL);
dea3101e 2737 if (!HashWorking)
2738 return;
2739
dea3101e 2740 HashWorking[0] = HashWorking[78] = *pwwnn++;
2741 HashWorking[1] = HashWorking[79] = *pwwnn;
2742
2743 for (t = 0; t < 7; t++)
2744 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
2745
2746 lpfc_sha_init(hbainit);
2747 lpfc_sha_iterate(hbainit, HashWorking);
2748 kfree(HashWorking);
2749}
2750
e59058c4 2751/**
3621a710 2752 * lpfc_cleanup - Performs vport cleanups before deleting a vport
e59058c4
JS		 2753 * @vport: pointer to a virtual N_Port data structure.
2754 *
2755 * This routine performs the necessary cleanups before deleting the @vport.
2756 * It invokes the discovery state machine to perform necessary state
2757 * transitions and to release the ndlps associated with the @vport. Note,
2758 * the physical port is treated as @vport 0.
2759 **/
87af33fe 2760void
2e0fef85 2761lpfc_cleanup(struct lpfc_vport *vport)
dea3101e 2762{
87af33fe 2763 struct lpfc_hba *phba = vport->phba;
dea3101e 2764 struct lpfc_nodelist *ndlp, *next_ndlp;
a8adb832 2765 int i = 0;
dea3101e 2766
87af33fe
JS		 2767 if (phba->link_state > LPFC_LINK_DOWN)
2768 lpfc_port_link_failure(vport);
2769
2770 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) {
e47c9093
JS		 2771 if (!NLP_CHK_NODE_ACT(ndlp)) {
2772 ndlp = lpfc_enable_node(vport, ndlp,
2773 NLP_STE_UNUSED_NODE);
2774 if (!ndlp)
2775 continue;
2776 spin_lock_irq(&phba->ndlp_lock);
2777 NLP_SET_FREE_REQ(ndlp);
2778 spin_unlock_irq(&phba->ndlp_lock);
2779 /* Trigger the release of the ndlp memory */
2780 lpfc_nlp_put(ndlp);
2781 continue;
2782 }
2783 spin_lock_irq(&phba->ndlp_lock);
2784 if (NLP_CHK_FREE_REQ(ndlp)) {
2785 /* The ndlp should not be in memory free mode already */
2786 spin_unlock_irq(&phba->ndlp_lock);
2787 continue;
2788 } else
2789 /* Indicate request for freeing ndlp memory */
2790 NLP_SET_FREE_REQ(ndlp);
2791 spin_unlock_irq(&phba->ndlp_lock);
2792
58da1ffb
JS		 2793 if (vport->port_type != LPFC_PHYSICAL_PORT &&
2794 ndlp->nlp_DID == Fabric_DID) {
2795 /* Just free up ndlp with Fabric_DID for vports */
2796 lpfc_nlp_put(ndlp);
2797 continue;
2798 }
2799
eff4a01b
JS		 2800 /* take care of nodes in unused state before the state
2801 * machine taking action.
2802 */
2803 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) {
2804 lpfc_nlp_put(ndlp);
2805 continue;
2806 }
2807
87af33fe
JS		 2808 if (ndlp->nlp_type & NLP_FABRIC)
2809 lpfc_disc_state_machine(vport, ndlp, NULL,
2810 NLP_EVT_DEVICE_RECOVERY);
e47c9093 2811
87af33fe
JS		 2812 lpfc_disc_state_machine(vport, ndlp, NULL,
2813 NLP_EVT_DEVICE_RM);
2814 }
2815
a8adb832
JS		 2816 /* At this point, ALL ndlp's should be gone
2817 * because of the previous NLP_EVT_DEVICE_RM.
2818 * Lets wait for this to happen, if needed.
2819 */
87af33fe 2820 while (!list_empty(&vport->fc_nodes)) {
a8adb832 2821 if (i++ > 3000) {
87af33fe 2822 lpfc_printf_vlog(vport, KERN_ERR, LOG_DISCOVERY,
a8adb832 2823 "0233 Nodelist not empty\n");
e47c9093
JS		 2824 list_for_each_entry_safe(ndlp, next_ndlp,
2825 &vport->fc_nodes, nlp_listp) {
2826 lpfc_printf_vlog(ndlp->vport, KERN_ERR,
2827 LOG_NODE,
d7c255b2 2828 "0282 did:x%x ndlp:x%p "
e47c9093
JS		 2829 "usgmap:x%x refcnt:%d\n",
2830 ndlp->nlp_DID, (void *)ndlp,
2831 ndlp->nlp_usg_map,
2c935bc5 2832 kref_read(&ndlp->kref));
e47c9093 2833 }
a8adb832 2834 break;
87af33fe 2835 }
a8adb832
JS		 2836
2837 /* Wait for any activity on ndlps to settle */
2838 msleep(10);
87af33fe 2839 }
1151e3ec 2840 lpfc_cleanup_vports_rrqs(vport, NULL);
dea3101e 2841}
2842
e59058c4 2843/**
3621a710 2844 * lpfc_stop_vport_timers - Stop all the timers associated with a vport
e59058c4
JS		 2845 * @vport: pointer to a virtual N_Port data structure.
2846 *
2847 * This routine stops all the timers associated with a @vport. This function
2848 * is invoked before disabling or deleting a @vport. Note that the physical
2849 * port is treated as @vport 0.
2850 **/
92d7f7b0
JS		 2851void
2852lpfc_stop_vport_timers(struct lpfc_vport *vport)
dea3101e 2853{
92d7f7b0 2854 del_timer_sync(&vport->els_tmofunc);
92494144 2855 del_timer_sync(&vport->delayed_disc_tmo);
92d7f7b0
JS		 2856 lpfc_can_disctmo(vport);
2857 return;
dea3101e 2858}
2859
ecfd03c6
JS		 2860/**
2861 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2862 * @phba: pointer to lpfc hba data structure.
2863 *
2864 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The
2865 * caller of this routine should already hold the host lock.
2866 **/
2867void
2868__lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2869{
5ac6b303
JS		 2870 /* Clear pending FCF rediscovery wait flag */
2871 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
2872
ecfd03c6
JS		 2873 /* Now, try to stop the timer */
2874 del_timer(&phba->fcf.redisc_wait);
2875}
2876
2877/**
2878 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2879 * @phba: pointer to lpfc hba data structure.
2880 *
2881 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It
2882 * checks whether the FCF rediscovery wait timer is pending with the host
2883 * lock held before proceeding with disabling the timer and clearing the
2884 * wait timer pendig flag.
2885 **/
2886void
2887lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2888{
2889 spin_lock_irq(&phba->hbalock);
2890 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
2891 /* FCF rediscovery timer already fired or stopped */
2892 spin_unlock_irq(&phba->hbalock);
2893 return;
2894 }
2895 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
5ac6b303
JS		 2896 /* Clear failover in progress flags */
2897 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC);
ecfd03c6
JS		 2898 spin_unlock_irq(&phba->hbalock);
2899}
2900
e59058c4 2901/**
3772a991 2902 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA
e59058c4
JS		 2903 * @phba: pointer to lpfc hba data structure.
2904 *
2905 * This routine stops all the timers associated with a HBA. This function is
2906 * invoked before either putting a HBA offline or unloading the driver.
2907 **/
3772a991
JS		 2908void
2909lpfc_stop_hba_timers(struct lpfc_hba *phba)
dea3101e 2910{
51ef4c26 2911 lpfc_stop_vport_timers(phba->pport);
2e0fef85 2912 del_timer_sync(&phba->sli.mbox_tmo);
92d7f7b0 2913 del_timer_sync(&phba->fabric_block_timer);
9399627f 2914 del_timer_sync(&phba->eratt_poll);
3772a991 2915 del_timer_sync(&phba->hb_tmofunc);
1151e3ec
JS		 2916 if (phba->sli_rev == LPFC_SLI_REV4) {
2917 del_timer_sync(&phba->rrq_tmr);
2918 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
2919 }
3772a991
JS		 2920 phba->hb_outstanding = 0;
2921
2922 switch (phba->pci_dev_grp) {
2923 case LPFC_PCI_DEV_LP:
2924 /* Stop any LightPulse device specific driver timers */
2925 del_timer_sync(&phba->fcp_poll_timer);
2926 break;
2927 case LPFC_PCI_DEV_OC:
2928 /* Stop any OneConnect device sepcific driver timers */
ecfd03c6 2929 lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3772a991
JS		 2930 break;
2931 default:
2932 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2933 "0297 Invalid device group (x%x)\n",
2934 phba->pci_dev_grp);
2935 break;
2936 }
2e0fef85 2937 return;
dea3101e 2938}
2939
e59058c4 2940/**
3621a710 2941 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked
e59058c4
JS		 2942 * @phba: pointer to lpfc hba data structure.
2943 *
2944 * This routine marks a HBA's management interface as blocked. Once the HBA's
2945 * management interface is marked as blocked, all the user space access to
2946 * the HBA, whether they are from sysfs interface or libdfc interface will
2947 * all be blocked. The HBA is set to block the management interface when the
2948 * driver prepares the HBA interface for online or offline.
2949 **/
a6ababd2 2950static void
618a5230 2951lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action)
a6ababd2
AB		 2952{
2953 unsigned long iflag;
6e7288d9
JS		 2954 uint8_t actcmd = MBX_HEARTBEAT;
2955 unsigned long timeout;
2956
a6ababd2
AB		 2957 spin_lock_irqsave(&phba->hbalock, iflag);
2958 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO;
618a5230
JS		 2959 spin_unlock_irqrestore(&phba->hbalock, iflag);
2960 if (mbx_action == LPFC_MBX_NO_WAIT)
2961 return;
2962 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
2963 spin_lock_irqsave(&phba->hbalock, iflag);
a183a15f 2964 if (phba->sli.mbox_active) {
6e7288d9 2965 actcmd = phba->sli.mbox_active->u.mb.mbxCommand;
a183a15f
JS		 2966 /* Determine how long we might wait for the active mailbox
2967 * command to be gracefully completed by firmware.
2968 */
2969 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
2970 phba->sli.mbox_active) * 1000) + jiffies;
2971 }
a6ababd2 2972 spin_unlock_irqrestore(&phba->hbalock, iflag);
a183a15f 2973
6e7288d9
JS		 2974 /* Wait for the outstnading mailbox command to complete */
2975 while (phba->sli.mbox_active) {
2976 /* Check active mailbox complete status every 2ms */
2977 msleep(2);
2978 if (time_after(jiffies, timeout)) {
2979 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2980 "2813 Mgmt IO is Blocked %x "
2981 "- mbox cmd %x still active\n",
2982 phba->sli.sli_flag, actcmd);
2983 break;
2984 }
2985 }
a6ababd2
AB		 2986}
2987
6b5151fd
JS		 2988/**
2989 * lpfc_sli4_node_prep - Assign RPIs for active nodes.
2990 * @phba: pointer to lpfc hba data structure.
2991 *
2992 * Allocate RPIs for all active remote nodes. This is needed whenever
2993 * an SLI4 adapter is reset and the driver is not unloading. Its purpose
2994 * is to fixup the temporary rpi assignments.
2995 **/
2996void
2997lpfc_sli4_node_prep(struct lpfc_hba *phba)
2998{
2999 struct lpfc_nodelist *ndlp, *next_ndlp;
3000 struct lpfc_vport **vports;
9d3d340d
JS		 3001 int i, rpi;
3002 unsigned long flags;
6b5151fd
JS		 3003
3004 if (phba->sli_rev != LPFC_SLI_REV4)
3005 return;
3006
3007 vports = lpfc_create_vport_work_array(phba);
9d3d340d
JS		 3008 if (vports == NULL)
3009 return;
6b5151fd 3010
9d3d340d
JS		 3011 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3012 if (vports[i]->load_flag & FC_UNLOADING)
3013 continue;
3014
3015 list_for_each_entry_safe(ndlp, next_ndlp,
3016 &vports[i]->fc_nodes,
3017 nlp_listp) {
3018 if (!NLP_CHK_NODE_ACT(ndlp))
3019 continue;
3020 rpi = lpfc_sli4_alloc_rpi(phba);
3021 if (rpi == LPFC_RPI_ALLOC_ERROR) {
3022 spin_lock_irqsave(&phba->ndlp_lock, flags);
3023 NLP_CLR_NODE_ACT(ndlp);
3024 spin_unlock_irqrestore(&phba->ndlp_lock, flags);
3025 continue;
6b5151fd 3026 }
9d3d340d
JS		 3027 ndlp->nlp_rpi = rpi;
3028 lpfc_printf_vlog(ndlp->vport, KERN_INFO, LOG_NODE,
3029 "0009 rpi:%x DID:%x "
3030 "flg:%x map:%x %p\n", ndlp->nlp_rpi,
3031 ndlp->nlp_DID, ndlp->nlp_flag,
3032 ndlp->nlp_usg_map, ndlp);
6b5151fd
JS		 3033 }
3034 }
3035 lpfc_destroy_vport_work_array(phba, vports);
3036}
3037
e59058c4 3038/**
3621a710 3039 * lpfc_online - Initialize and bring a HBA online
e59058c4
JS		 3040 * @phba: pointer to lpfc hba data structure.
3041 *
3042 * This routine initializes the HBA and brings a HBA online. During this
3043 * process, the management interface is blocked to prevent user space access
3044 * to the HBA interfering with the driver initialization.
3045 *
3046 * Return codes
3047 * 0 - successful
3048 * 1 - failed
3049 **/
dea3101e 3050int
2e0fef85 3051lpfc_online(struct lpfc_hba *phba)
dea3101e 3052{
372bd282 3053 struct lpfc_vport *vport;
549e55cd 3054 struct lpfc_vport **vports;
a145fda3 3055 int i, error = 0;
16a3a208 3056 bool vpis_cleared = false;
2e0fef85 3057
dea3101e 3058 if (!phba)
3059 return 0;
372bd282 3060 vport = phba->pport;
dea3101e 3061
2e0fef85 3062 if (!(vport->fc_flag & FC_OFFLINE_MODE))
dea3101e 3063 return 0;
3064
ed957684 3065 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 3066 "0458 Bring Adapter online\n");
dea3101e 3067
618a5230 3068 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
46fa311e 3069
da0436e9
JS		 3070 if (phba->sli_rev == LPFC_SLI_REV4) {
3071 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */
3072 lpfc_unblock_mgmt_io(phba);
3073 return 1;
3074 }
16a3a208
JS		 3075 spin_lock_irq(&phba->hbalock);
3076 if (!phba->sli4_hba.max_cfg_param.vpi_used)
3077 vpis_cleared = true;
3078 spin_unlock_irq(&phba->hbalock);
a145fda3
DK		 3079
3080 /* Reestablish the local initiator port.
3081 * The offline process destroyed the previous lport.
3082 */
3083 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME &&
3084 !phba->nvmet_support) {
3085 error = lpfc_nvme_create_localport(phba->pport);
3086 if (error)
3087 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
3088 "6132 NVME restore reg failed "
3089 "on nvmei error x%x\n", error);
3090 }
da0436e9 3091 } else {
895427bd 3092 lpfc_sli_queue_init(phba);
da0436e9
JS		 3093 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */
3094 lpfc_unblock_mgmt_io(phba);
3095 return 1;
3096 }
46fa311e 3097 }
dea3101e 3098
549e55cd 3099 vports = lpfc_create_vport_work_array(phba);
aeb6641f 3100 if (vports != NULL) {
da0436e9 3101 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd
JS		 3102 struct Scsi_Host *shost;
3103 shost = lpfc_shost_from_vport(vports[i]);
3104 spin_lock_irq(shost->host_lock);
3105 vports[i]->fc_flag &= ~FC_OFFLINE_MODE;
3106 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)
3107 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
16a3a208 3108 if (phba->sli_rev == LPFC_SLI_REV4) {
1c6834a7 3109 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI;
16a3a208
JS		 3110 if ((vpis_cleared) &&
3111 (vports[i]->port_type !=
3112 LPFC_PHYSICAL_PORT))
3113 vports[i]->vpi = 0;
3114 }
549e55cd
JS		 3115 spin_unlock_irq(shost->host_lock);
3116 }
aeb6641f
AB		 3117 }
3118 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3119
46fa311e 3120 lpfc_unblock_mgmt_io(phba);
dea3101e 3121 return 0;
3122}
3123
e59058c4 3124/**
3621a710 3125 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked
e59058c4
JS		 3126 * @phba: pointer to lpfc hba data structure.
3127 *
3128 * This routine marks a HBA's management interface as not blocked. Once the
3129 * HBA's management interface is marked as not blocked, all the user space
3130 * access to the HBA, whether they are from sysfs interface or libdfc
3131 * interface will be allowed. The HBA is set to block the management interface
3132 * when the driver prepares the HBA interface for online or offline and then
3133 * set to unblock the management interface afterwards.
3134 **/
46fa311e
JS		 3135void
3136lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
3137{
3138 unsigned long iflag;
3139
2e0fef85
JS		 3140 spin_lock_irqsave(&phba->hbalock, iflag);
3141 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO;
3142 spin_unlock_irqrestore(&phba->hbalock, iflag);
46fa311e
JS		 3143}
3144
e59058c4 3145/**
3621a710 3146 * lpfc_offline_prep - Prepare a HBA to be brought offline
e59058c4
JS		 3147 * @phba: pointer to lpfc hba data structure.
3148 *
3149 * This routine is invoked to prepare a HBA to be brought offline. It performs
3150 * unregistration login to all the nodes on all vports and flushes the mailbox
3151 * queue to make it ready to be brought offline.
3152 **/
46fa311e 3153void
618a5230 3154lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action)
46fa311e 3155{
2e0fef85 3156 struct lpfc_vport *vport = phba->pport;
46fa311e 3157 struct lpfc_nodelist *ndlp, *next_ndlp;
87af33fe 3158 struct lpfc_vport **vports;
72100cc4 3159 struct Scsi_Host *shost;
87af33fe 3160 int i;
dea3101e 3161
2e0fef85 3162 if (vport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3163 return;
dea3101e 3164
618a5230 3165 lpfc_block_mgmt_io(phba, mbx_action);
dea3101e 3166
3167 lpfc_linkdown(phba);
3168
87af33fe
JS		 3169 /* Issue an unreg_login to all nodes on all vports */
3170 vports = lpfc_create_vport_work_array(phba);
3171 if (vports != NULL) {
da0436e9 3172 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
a8adb832
JS		 3173 if (vports[i]->load_flag & FC_UNLOADING)
3174 continue;
72100cc4
JS		 3175 shost = lpfc_shost_from_vport(vports[i]);
3176 spin_lock_irq(shost->host_lock);
c868595d 3177 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
695a814e
JS		 3178 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
3179 vports[i]->fc_flag &= ~FC_VFI_REGISTERED;
72100cc4 3180 spin_unlock_irq(shost->host_lock);
695a814e 3181
87af33fe
JS		 3182 shost = lpfc_shost_from_vport(vports[i]);
3183 list_for_each_entry_safe(ndlp, next_ndlp,
3184 &vports[i]->fc_nodes,
3185 nlp_listp) {
e47c9093
JS		 3186 if (!NLP_CHK_NODE_ACT(ndlp))
3187 continue;
87af33fe
JS		 3188 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE)
3189 continue;
3190 if (ndlp->nlp_type & NLP_FABRIC) {
3191 lpfc_disc_state_machine(vports[i], ndlp,
3192 NULL, NLP_EVT_DEVICE_RECOVERY);
3193 lpfc_disc_state_machine(vports[i], ndlp,
3194 NULL, NLP_EVT_DEVICE_RM);
3195 }
3196 spin_lock_irq(shost->host_lock);
3197 ndlp->nlp_flag &= ~NLP_NPR_ADISC;
401ee0c1 3198 spin_unlock_irq(shost->host_lock);
6b5151fd
JS		 3199 /*
3200 * Whenever an SLI4 port goes offline, free the
401ee0c1
JS		 3201 * RPI. Get a new RPI when the adapter port
3202 * comes back online.
6b5151fd 3203 */
be6bb941
JS		 3204 if (phba->sli_rev == LPFC_SLI_REV4) {
3205 lpfc_printf_vlog(ndlp->vport,
3206 KERN_INFO, LOG_NODE,
3207 "0011 lpfc_offline: "
3208 "ndlp:x%p did %x "
3209 "usgmap:x%x rpi:%x\n",
3210 ndlp, ndlp->nlp_DID,
3211 ndlp->nlp_usg_map,
3212 ndlp->nlp_rpi);
3213
6b5151fd 3214 lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi);
be6bb941 3215 }
87af33fe
JS		 3216 lpfc_unreg_rpi(vports[i], ndlp);
3217 }
3218 }
3219 }
09372820 3220 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3221
618a5230 3222 lpfc_sli_mbox_sys_shutdown(phba, mbx_action);
f485c18d
DK		 3223
3224 if (phba->wq)
3225 flush_workqueue(phba->wq);
46fa311e
JS		 3226}
3227
e59058c4 3228/**
3621a710 3229 * lpfc_offline - Bring a HBA offline
e59058c4
JS		 3230 * @phba: pointer to lpfc hba data structure.
3231 *
3232 * This routine actually brings a HBA offline. It stops all the timers
3233 * associated with the HBA, brings down the SLI layer, and eventually
3234 * marks the HBA as in offline state for the upper layer protocol.
3235 **/
46fa311e 3236void
2e0fef85 3237lpfc_offline(struct lpfc_hba *phba)
46fa311e 3238{
549e55cd
JS		 3239 struct Scsi_Host *shost;
3240 struct lpfc_vport **vports;
3241 int i;
46fa311e 3242
549e55cd 3243 if (phba->pport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3244 return;
688a8863 3245
da0436e9
JS		 3246 /* stop port and all timers associated with this hba */
3247 lpfc_stop_port(phba);
4b40d02b
DK		 3248
3249 /* Tear down the local and target port registrations. The
3250 * nvme transports need to cleanup.
3251 */
3252 lpfc_nvmet_destroy_targetport(phba);
3253 lpfc_nvme_destroy_localport(phba->pport);
3254
51ef4c26
JS		 3255 vports = lpfc_create_vport_work_array(phba);
3256 if (vports != NULL)
da0436e9 3257 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
51ef4c26 3258 lpfc_stop_vport_timers(vports[i]);
09372820 3259 lpfc_destroy_vport_work_array(phba, vports);
92d7f7b0 3260 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 3261 "0460 Bring Adapter offline\n");
dea3101e 3262 /* Bring down the SLI Layer and cleanup. The HBA is offline
3263 now. */
3264 lpfc_sli_hba_down(phba);
92d7f7b0 3265 spin_lock_irq(&phba->hbalock);
7054a606 3266 phba->work_ha = 0;
92d7f7b0 3267 spin_unlock_irq(&phba->hbalock);
549e55cd
JS		 3268 vports = lpfc_create_vport_work_array(phba);
3269 if (vports != NULL)
da0436e9 3270 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd 3271 shost = lpfc_shost_from_vport(vports[i]);
549e55cd
JS		 3272 spin_lock_irq(shost->host_lock);
3273 vports[i]->work_port_events = 0;
3274 vports[i]->fc_flag |= FC_OFFLINE_MODE;
3275 spin_unlock_irq(shost->host_lock);
3276 }
09372820 3277 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3278}
3279
e59058c4 3280/**
3621a710 3281 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists
e59058c4
JS		 3282 * @phba: pointer to lpfc hba data structure.
3283 *
3284 * This routine is to free all the SCSI buffers and IOCBs from the driver
3285 * list back to kernel. It is called from lpfc_pci_remove_one to free
3286 * the internal resources before the device is removed from the system.
e59058c4 3287 **/
8a9d2e80 3288static void
2e0fef85 3289lpfc_scsi_free(struct lpfc_hba *phba)
dea3101e 3290{
3291 struct lpfc_scsi_buf *sb, *sb_next;
dea3101e 3292
895427bd
JS		 3293 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3294 return;
3295
2e0fef85 3296 spin_lock_irq(&phba->hbalock);
a40fc5f0 3297
dea3101e 3298 /* Release all the lpfc_scsi_bufs maintained by this host. */
a40fc5f0
JS		 3299
3300 spin_lock(&phba->scsi_buf_list_put_lock);
3301 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put,
3302 list) {
dea3101e 3303 list_del(&sb->list);
771db5c0 3304 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3305 sb->dma_handle);
dea3101e 3306 kfree(sb);
3307 phba->total_scsi_bufs--;
3308 }
a40fc5f0
JS		 3309 spin_unlock(&phba->scsi_buf_list_put_lock);
3310
3311 spin_lock(&phba->scsi_buf_list_get_lock);
3312 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get,
3313 list) {
dea3101e 3314 list_del(&sb->list);
771db5c0 3315 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3316 sb->dma_handle);
dea3101e 3317 kfree(sb);
3318 phba->total_scsi_bufs--;
3319 }
a40fc5f0 3320 spin_unlock(&phba->scsi_buf_list_get_lock);
2e0fef85 3321 spin_unlock_irq(&phba->hbalock);
8a9d2e80 3322}
895427bd
JS		 3323/**
3324 * lpfc_nvme_free - Free all the NVME buffers and IOCBs from driver lists
3325 * @phba: pointer to lpfc hba data structure.
3326 *
3327 * This routine is to free all the NVME buffers and IOCBs from the driver
3328 * list back to kernel. It is called from lpfc_pci_remove_one to free
3329 * the internal resources before the device is removed from the system.
3330 **/
3331static void
3332lpfc_nvme_free(struct lpfc_hba *phba)
3333{
3334 struct lpfc_nvme_buf *lpfc_ncmd, *lpfc_ncmd_next;
895427bd
JS		 3335
3336 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3337 return;
3338
3339 spin_lock_irq(&phba->hbalock);
3340
3341 /* Release all the lpfc_nvme_bufs maintained by this host. */
3342 spin_lock(&phba->nvme_buf_list_put_lock);
3343 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3344 &phba->lpfc_nvme_buf_list_put, list) {
3345 list_del(&lpfc_ncmd->list);
cf1a1d3e 3346 phba->put_nvme_bufs--;
771db5c0 3347 dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
895427bd
JS		 3348 lpfc_ncmd->dma_handle);
3349 kfree(lpfc_ncmd);
3350 phba->total_nvme_bufs--;
3351 }
3352 spin_unlock(&phba->nvme_buf_list_put_lock);
3353
3354 spin_lock(&phba->nvme_buf_list_get_lock);
3355 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3356 &phba->lpfc_nvme_buf_list_get, list) {
3357 list_del(&lpfc_ncmd->list);
cf1a1d3e 3358 phba->get_nvme_bufs--;
771db5c0 3359 dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
895427bd
JS		 3360 lpfc_ncmd->dma_handle);
3361 kfree(lpfc_ncmd);
3362 phba->total_nvme_bufs--;
3363 }
3364 spin_unlock(&phba->nvme_buf_list_get_lock);
895427bd
JS		 3365 spin_unlock_irq(&phba->hbalock);
3366}
8a9d2e80 3367/**
895427bd 3368 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping
8a9d2e80
JS		 3369 * @phba: pointer to lpfc hba data structure.
3370 *
3371 * This routine first calculates the sizes of the current els and allocated
3372 * scsi sgl lists, and then goes through all sgls to updates the physical
3373 * XRIs assigned due to port function reset. During port initialization, the
3374 * current els and allocated scsi sgl lists are 0s.
3375 *
3376 * Return codes
3377 * 0 - successful (for now, it always returns 0)
3378 **/
3379int
895427bd 3380lpfc_sli4_els_sgl_update(struct lpfc_hba *phba)
8a9d2e80
JS		 3381{
3382 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
895427bd 3383 uint16_t i, lxri, xri_cnt, els_xri_cnt;
8a9d2e80 3384 LIST_HEAD(els_sgl_list);
8a9d2e80
JS		 3385 int rc;
3386
3387 /*
3388 * update on pci function's els xri-sgl list
3389 */
3390 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
895427bd 3391
8a9d2e80
JS		 3392 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
3393 /* els xri-sgl expanded */
3394 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
3395 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3396 "3157 ELS xri-sgl count increased from "
3397 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3398 els_xri_cnt);
3399 /* allocate the additional els sgls */
3400 for (i = 0; i < xri_cnt; i++) {
3401 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3402 GFP_KERNEL);
3403 if (sglq_entry == NULL) {
3404 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3405 "2562 Failure to allocate an "
3406 "ELS sgl entry:%d\n", i);
3407 rc = -ENOMEM;
3408 goto out_free_mem;
3409 }
3410 sglq_entry->buff_type = GEN_BUFF_TYPE;
3411 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0,
3412 &sglq_entry->phys);
3413 if (sglq_entry->virt == NULL) {
3414 kfree(sglq_entry);
3415 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3416 "2563 Failure to allocate an "
3417 "ELS mbuf:%d\n", i);
3418 rc = -ENOMEM;
3419 goto out_free_mem;
3420 }
3421 sglq_entry->sgl = sglq_entry->virt;
3422 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE);
3423 sglq_entry->state = SGL_FREED;
3424 list_add_tail(&sglq_entry->list, &els_sgl_list);
3425 }
38c20673 3426 spin_lock_irq(&phba->hbalock);
895427bd
JS		 3427 spin_lock(&phba->sli4_hba.sgl_list_lock);
3428 list_splice_init(&els_sgl_list,
3429 &phba->sli4_hba.lpfc_els_sgl_list);
3430 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 3431 spin_unlock_irq(&phba->hbalock);
8a9d2e80
JS		 3432 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
3433 /* els xri-sgl shrinked */
3434 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
3435 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3436 "3158 ELS xri-sgl count decreased from "
3437 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3438 els_xri_cnt);
3439 spin_lock_irq(&phba->hbalock);
895427bd
JS		 3440 spin_lock(&phba->sli4_hba.sgl_list_lock);
3441 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list,
3442 &els_sgl_list);
8a9d2e80
JS		 3443 /* release extra els sgls from list */
3444 for (i = 0; i < xri_cnt; i++) {
3445 list_remove_head(&els_sgl_list,
3446 sglq_entry, struct lpfc_sglq, list);
3447 if (sglq_entry) {
895427bd
JS		 3448 __lpfc_mbuf_free(phba, sglq_entry->virt,
3449 sglq_entry->phys);
8a9d2e80
JS		 3450 kfree(sglq_entry);
3451 }
3452 }
895427bd
JS		 3453 list_splice_init(&els_sgl_list,
3454 &phba->sli4_hba.lpfc_els_sgl_list);
3455 spin_unlock(&phba->sli4_hba.sgl_list_lock);
8a9d2e80
JS		 3456 spin_unlock_irq(&phba->hbalock);
3457 } else
3458 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3459 "3163 ELS xri-sgl count unchanged: %d\n",
3460 els_xri_cnt);
3461 phba->sli4_hba.els_xri_cnt = els_xri_cnt;
3462
3463 /* update xris to els sgls on the list */
3464 sglq_entry = NULL;
3465 sglq_entry_next = NULL;
3466 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
895427bd 3467 &phba->sli4_hba.lpfc_els_sgl_list, list) {
8a9d2e80
JS		 3468 lxri = lpfc_sli4_next_xritag(phba);
3469 if (lxri == NO_XRI) {
3470 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3471 "2400 Failed to allocate xri for "
3472 "ELS sgl\n");
3473 rc = -ENOMEM;
3474 goto out_free_mem;
3475 }
3476 sglq_entry->sli4_lxritag = lxri;
3477 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3478 }
895427bd
JS		 3479 return 0;
3480
3481out_free_mem:
3482 lpfc_free_els_sgl_list(phba);
3483 return rc;
3484}
3485
f358dd0c
JS		 3486/**
3487 * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping
3488 * @phba: pointer to lpfc hba data structure.
3489 *
3490 * This routine first calculates the sizes of the current els and allocated
3491 * scsi sgl lists, and then goes through all sgls to updates the physical
3492 * XRIs assigned due to port function reset. During port initialization, the
3493 * current els and allocated scsi sgl lists are 0s.
3494 *
3495 * Return codes
3496 * 0 - successful (for now, it always returns 0)
3497 **/
3498int
3499lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba)
3500{
3501 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
3502 uint16_t i, lxri, xri_cnt, els_xri_cnt;
6c621a22 3503 uint16_t nvmet_xri_cnt;
f358dd0c
JS		 3504 LIST_HEAD(nvmet_sgl_list);
3505 int rc;
3506
3507 /*
3508 * update on pci function's nvmet xri-sgl list
3509 */
3510 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
61f3d4bf 3511
6c621a22
JS		 3512 /* For NVMET, ALL remaining XRIs are dedicated for IO processing */
3513 nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
f358dd0c
JS		 3514 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) {
3515 /* els xri-sgl expanded */
3516 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt;
3517 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3518 "6302 NVMET xri-sgl cnt grew from %d to %d\n",
3519 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt);
3520 /* allocate the additional nvmet sgls */
3521 for (i = 0; i < xri_cnt; i++) {
3522 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3523 GFP_KERNEL);
3524 if (sglq_entry == NULL) {
3525 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3526 "6303 Failure to allocate an "
3527 "NVMET sgl entry:%d\n", i);
3528 rc = -ENOMEM;
3529 goto out_free_mem;
3530 }
3531 sglq_entry->buff_type = NVMET_BUFF_TYPE;
3532 sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0,
3533 &sglq_entry->phys);
3534 if (sglq_entry->virt == NULL) {
3535 kfree(sglq_entry);
3536 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3537 "6304 Failure to allocate an "
3538 "NVMET buf:%d\n", i);
3539 rc = -ENOMEM;
3540 goto out_free_mem;
3541 }
3542 sglq_entry->sgl = sglq_entry->virt;
3543 memset(sglq_entry->sgl, 0,
3544 phba->cfg_sg_dma_buf_size);
3545 sglq_entry->state = SGL_FREED;
3546 list_add_tail(&sglq_entry->list, &nvmet_sgl_list);
3547 }
3548 spin_lock_irq(&phba->hbalock);
3549 spin_lock(&phba->sli4_hba.sgl_list_lock);
3550 list_splice_init(&nvmet_sgl_list,
3551 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3552 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3553 spin_unlock_irq(&phba->hbalock);
3554 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) {
3555 /* nvmet xri-sgl shrunk */
3556 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt;
3557 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3558 "6305 NVMET xri-sgl count decreased from "
3559 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt,
3560 nvmet_xri_cnt);
3561 spin_lock_irq(&phba->hbalock);
3562 spin_lock(&phba->sli4_hba.sgl_list_lock);
3563 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list,
3564 &nvmet_sgl_list);
3565 /* release extra nvmet sgls from list */
3566 for (i = 0; i < xri_cnt; i++) {
3567 list_remove_head(&nvmet_sgl_list,
3568 sglq_entry, struct lpfc_sglq, list);
3569 if (sglq_entry) {
3570 lpfc_nvmet_buf_free(phba, sglq_entry->virt,
3571 sglq_entry->phys);
3572 kfree(sglq_entry);
3573 }
3574 }
3575 list_splice_init(&nvmet_sgl_list,
3576 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3577 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3578 spin_unlock_irq(&phba->hbalock);
3579 } else
3580 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3581 "6306 NVMET xri-sgl count unchanged: %d\n",
3582 nvmet_xri_cnt);
3583 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt;
3584
3585 /* update xris to nvmet sgls on the list */
3586 sglq_entry = NULL;
3587 sglq_entry_next = NULL;
3588 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
3589 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) {
3590 lxri = lpfc_sli4_next_xritag(phba);
3591 if (lxri == NO_XRI) {
3592 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3593 "6307 Failed to allocate xri for "
3594 "NVMET sgl\n");
3595 rc = -ENOMEM;
3596 goto out_free_mem;
3597 }
3598 sglq_entry->sli4_lxritag = lxri;
3599 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3600 }
3601 return 0;
3602
3603out_free_mem:
3604 lpfc_free_nvmet_sgl_list(phba);
3605 return rc;
3606}
3607
895427bd
JS		 3608/**
3609 * lpfc_sli4_scsi_sgl_update - update xri-sgl sizing and mapping
3610 * @phba: pointer to lpfc hba data structure.
3611 *
3612 * This routine first calculates the sizes of the current els and allocated
3613 * scsi sgl lists, and then goes through all sgls to updates the physical
3614 * XRIs assigned due to port function reset. During port initialization, the
3615 * current els and allocated scsi sgl lists are 0s.
3616 *
3617 * Return codes
3618 * 0 - successful (for now, it always returns 0)
3619 **/
3620int
3621lpfc_sli4_scsi_sgl_update(struct lpfc_hba *phba)
3622{
3623 struct lpfc_scsi_buf *psb, *psb_next;
3624 uint16_t i, lxri, els_xri_cnt, scsi_xri_cnt;
3625 LIST_HEAD(scsi_sgl_list);
3626 int rc;
8a9d2e80
JS		 3627
3628 /*
895427bd 3629 * update on pci function's els xri-sgl list
8a9d2e80 3630 */
895427bd 3631 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
8a9d2e80
JS		 3632 phba->total_scsi_bufs = 0;
3633
895427bd
JS		 3634 /*
3635 * update on pci function's allocated scsi xri-sgl list
3636 */
8a9d2e80
JS		 3637 /* maximum number of xris available for scsi buffers */
3638 phba->sli4_hba.scsi_xri_max = phba->sli4_hba.max_cfg_param.max_xri -
3639 els_xri_cnt;
3640
895427bd
JS		 3641 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3642 return 0;
3643
3644 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3645 phba->sli4_hba.scsi_xri_max = /* Split them up */
3646 (phba->sli4_hba.scsi_xri_max *
3647 phba->cfg_xri_split) / 100;
8a9d2e80 3648
a40fc5f0 3649 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3650 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS		 3651 list_splice_init(&phba->lpfc_scsi_buf_list_get, &scsi_sgl_list);
3652 list_splice(&phba->lpfc_scsi_buf_list_put, &scsi_sgl_list);
164cecd1 3653 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3654 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80 3655
e8c0a779
JS		 3656 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3657 "6060 Current allocated SCSI xri-sgl count:%d, "
3658 "maximum SCSI xri count:%d (split:%d)\n",
3659 phba->sli4_hba.scsi_xri_cnt,
3660 phba->sli4_hba.scsi_xri_max, phba->cfg_xri_split);
3661
8a9d2e80
JS		 3662 if (phba->sli4_hba.scsi_xri_cnt > phba->sli4_hba.scsi_xri_max) {
3663 /* max scsi xri shrinked below the allocated scsi buffers */
3664 scsi_xri_cnt = phba->sli4_hba.scsi_xri_cnt -
3665 phba->sli4_hba.scsi_xri_max;
3666 /* release the extra allocated scsi buffers */
3667 for (i = 0; i < scsi_xri_cnt; i++) {
3668 list_remove_head(&scsi_sgl_list, psb,
3669 struct lpfc_scsi_buf, list);
a2fc4aef 3670 if (psb) {
771db5c0 3671 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
a2fc4aef
JS		 3672 psb->data, psb->dma_handle);
3673 kfree(psb);
3674 }
8a9d2e80 3675 }
a40fc5f0 3676 spin_lock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80 3677 phba->sli4_hba.scsi_xri_cnt -= scsi_xri_cnt;
a40fc5f0 3678 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80
JS		 3679 }
3680
3681 /* update xris associated to remaining allocated scsi buffers */
3682 psb = NULL;
3683 psb_next = NULL;
3684 list_for_each_entry_safe(psb, psb_next, &scsi_sgl_list, list) {
3685 lxri = lpfc_sli4_next_xritag(phba);
3686 if (lxri == NO_XRI) {
3687 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3688 "2560 Failed to allocate xri for "
3689 "scsi buffer\n");
3690 rc = -ENOMEM;
3691 goto out_free_mem;
3692 }
3693 psb->cur_iocbq.sli4_lxritag = lxri;
3694 psb->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3695 }
a40fc5f0 3696 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3697 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS		 3698 list_splice_init(&scsi_sgl_list, &phba->lpfc_scsi_buf_list_get);
3699 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
164cecd1 3700 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3701 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
dea3101e 3702 return 0;
8a9d2e80
JS		 3703
3704out_free_mem:
8a9d2e80
JS		 3705 lpfc_scsi_free(phba);
3706 return rc;
dea3101e 3707}
3708
96418b5e
JS		 3709static uint64_t
3710lpfc_get_wwpn(struct lpfc_hba *phba)
3711{
3712 uint64_t wwn;
3713 int rc;
3714 LPFC_MBOXQ_t *mboxq;
3715 MAILBOX_t *mb;
3716
96418b5e
JS		 3717 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
3718 GFP_KERNEL);
3719 if (!mboxq)
3720 return (uint64_t)-1;
3721
3722 /* First get WWN of HBA instance */
3723 lpfc_read_nv(phba, mboxq);
3724 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
3725 if (rc != MBX_SUCCESS) {
3726 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3727 "6019 Mailbox failed , mbxCmd x%x "
3728 "READ_NV, mbxStatus x%x\n",
3729 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
3730 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
3731 mempool_free(mboxq, phba->mbox_mem_pool);
3732 return (uint64_t) -1;
3733 }
3734 mb = &mboxq->u.mb;
3735 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t));
3736 /* wwn is WWPN of HBA instance */
3737 mempool_free(mboxq, phba->mbox_mem_pool);
3738 if (phba->sli_rev == LPFC_SLI_REV4)
3739 return be64_to_cpu(wwn);
3740 else
286871a6 3741 return rol64(wwn, 32);
96418b5e
JS		 3742}
3743
895427bd
JS		 3744/**
3745 * lpfc_sli4_nvme_sgl_update - update xri-sgl sizing and mapping
3746 * @phba: pointer to lpfc hba data structure.
3747 *
3748 * This routine first calculates the sizes of the current els and allocated
3749 * scsi sgl lists, and then goes through all sgls to updates the physical
3750 * XRIs assigned due to port function reset. During port initialization, the
3751 * current els and allocated scsi sgl lists are 0s.
3752 *
3753 * Return codes
3754 * 0 - successful (for now, it always returns 0)
3755 **/
3756int
3757lpfc_sli4_nvme_sgl_update(struct lpfc_hba *phba)
3758{
3759 struct lpfc_nvme_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL;
3760 uint16_t i, lxri, els_xri_cnt;
3761 uint16_t nvme_xri_cnt, nvme_xri_max;
3762 LIST_HEAD(nvme_sgl_list);
cf1a1d3e 3763 int rc, cnt;
895427bd
JS		 3764
3765 phba->total_nvme_bufs = 0;
cf1a1d3e
JS		 3766 phba->get_nvme_bufs = 0;
3767 phba->put_nvme_bufs = 0;
895427bd
JS		 3768
3769 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3770 return 0;
3771 /*
3772 * update on pci function's allocated nvme xri-sgl list
3773 */
3774
3775 /* maximum number of xris available for nvme buffers */
3776 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
3777 nvme_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
3778 phba->sli4_hba.nvme_xri_max = nvme_xri_max;
3779 phba->sli4_hba.nvme_xri_max -= phba->sli4_hba.scsi_xri_max;
3780
3781 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3782 "6074 Current allocated NVME xri-sgl count:%d, "
3783 "maximum NVME xri count:%d\n",
3784 phba->sli4_hba.nvme_xri_cnt,
3785 phba->sli4_hba.nvme_xri_max);
3786
3787 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3788 spin_lock(&phba->nvme_buf_list_put_lock);
3789 list_splice_init(&phba->lpfc_nvme_buf_list_get, &nvme_sgl_list);
3790 list_splice(&phba->lpfc_nvme_buf_list_put, &nvme_sgl_list);
cf1a1d3e
JS		 3791 cnt = phba->get_nvme_bufs + phba->put_nvme_bufs;
3792 phba->get_nvme_bufs = 0;
3793 phba->put_nvme_bufs = 0;
895427bd
JS		 3794 spin_unlock(&phba->nvme_buf_list_put_lock);
3795 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3796
3797 if (phba->sli4_hba.nvme_xri_cnt > phba->sli4_hba.nvme_xri_max) {
3798 /* max nvme xri shrunk below the allocated nvme buffers */
3799 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3800 nvme_xri_cnt = phba->sli4_hba.nvme_xri_cnt -
3801 phba->sli4_hba.nvme_xri_max;
3802 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3803 /* release the extra allocated nvme buffers */
3804 for (i = 0; i < nvme_xri_cnt; i++) {
3805 list_remove_head(&nvme_sgl_list, lpfc_ncmd,
3806 struct lpfc_nvme_buf, list);
3807 if (lpfc_ncmd) {
771db5c0 3808 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
895427bd
JS		 3809 lpfc_ncmd->data,
3810 lpfc_ncmd->dma_handle);
3811 kfree(lpfc_ncmd);
3812 }
3813 }
3814 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3815 phba->sli4_hba.nvme_xri_cnt -= nvme_xri_cnt;
3816 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3817 }
3818
3819 /* update xris associated to remaining allocated nvme buffers */
3820 lpfc_ncmd = NULL;
3821 lpfc_ncmd_next = NULL;
3822 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3823 &nvme_sgl_list, list) {
3824 lxri = lpfc_sli4_next_xritag(phba);
3825 if (lxri == NO_XRI) {
3826 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3827 "6075 Failed to allocate xri for "
3828 "nvme buffer\n");
3829 rc = -ENOMEM;
3830 goto out_free_mem;
3831 }
3832 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri;
3833 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3834 }
3835 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3836 spin_lock(&phba->nvme_buf_list_put_lock);
3837 list_splice_init(&nvme_sgl_list, &phba->lpfc_nvme_buf_list_get);
cf1a1d3e 3838 phba->get_nvme_bufs = cnt;
895427bd
JS		 3839 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
3840 spin_unlock(&phba->nvme_buf_list_put_lock);
3841 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3842 return 0;
3843
3844out_free_mem:
3845 lpfc_nvme_free(phba);
3846 return rc;
3847}
3848
e59058c4 3849/**
3621a710 3850 * lpfc_create_port - Create an FC port
e59058c4
JS		 3851 * @phba: pointer to lpfc hba data structure.
3852 * @instance: a unique integer ID to this FC port.
3853 * @dev: pointer to the device data structure.
3854 *
3855 * This routine creates a FC port for the upper layer protocol. The FC port
3856 * can be created on top of either a physical port or a virtual port provided
3857 * by the HBA. This routine also allocates a SCSI host data structure (shost)
3858 * and associates the FC port created before adding the shost into the SCSI
3859 * layer.
3860 *
3861 * Return codes
3862 * @vport - pointer to the virtual N_Port data structure.
3863 * NULL - port create failed.
3864 **/
2e0fef85 3865struct lpfc_vport *
3de2a653 3866lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
47a8617c 3867{
2e0fef85 3868 struct lpfc_vport *vport;
895427bd 3869 struct Scsi_Host *shost = NULL;
2e0fef85 3870 int error = 0;
96418b5e
JS		 3871 int i;
3872 uint64_t wwn;
3873 bool use_no_reset_hba = false;
56bc8028 3874 int rc;
96418b5e 3875
56bc8028
JS		 3876 if (lpfc_no_hba_reset_cnt) {
3877 if (phba->sli_rev < LPFC_SLI_REV4 &&
3878 dev == &phba->pcidev->dev) {
3879 /* Reset the port first */
3880 lpfc_sli_brdrestart(phba);
3881 rc = lpfc_sli_chipset_init(phba);
3882 if (rc)
3883 return NULL;
3884 }
3885 wwn = lpfc_get_wwpn(phba);
3886 }
96418b5e
JS		 3887
3888 for (i = 0; i < lpfc_no_hba_reset_cnt; i++) {
3889 if (wwn == lpfc_no_hba_reset[i]) {
3890 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3891 "6020 Setting use_no_reset port=%llx\n",
3892 wwn);
3893 use_no_reset_hba = true;
3894 break;
3895 }
3896 }
47a8617c 3897
895427bd
JS		 3898 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
3899 if (dev != &phba->pcidev->dev) {
3900 shost = scsi_host_alloc(&lpfc_vport_template,
3901 sizeof(struct lpfc_vport));
3902 } else {
96418b5e 3903 if (!use_no_reset_hba)
895427bd
JS		 3904 shost = scsi_host_alloc(&lpfc_template,
3905 sizeof(struct lpfc_vport));
3906 else
96418b5e 3907 shost = scsi_host_alloc(&lpfc_template_no_hr,
895427bd
JS		 3908 sizeof(struct lpfc_vport));
3909 }
3910 } else if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
3911 shost = scsi_host_alloc(&lpfc_template_nvme,
ea4142f6
JS		 3912 sizeof(struct lpfc_vport));
3913 }
2e0fef85
JS		 3914 if (!shost)
3915 goto out;
47a8617c 3916
2e0fef85
JS		 3917 vport = (struct lpfc_vport *) shost->hostdata;
3918 vport->phba = phba;
2e0fef85 3919 vport->load_flag |= FC_LOADING;
92d7f7b0 3920 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
7f5f3d0d 3921 vport->fc_rscn_flush = 0;
3de2a653 3922 lpfc_get_vport_cfgparam(vport);
895427bd 3923
2e0fef85
JS		 3924 shost->unique_id = instance;
3925 shost->max_id = LPFC_MAX_TARGET;
3de2a653 3926 shost->max_lun = vport->cfg_max_luns;
2e0fef85
JS		 3927 shost->this_id = -1;
3928 shost->max_cmd_len = 16;
8b0dff14 3929 shost->nr_hw_queues = phba->cfg_fcp_io_channel;
da0436e9 3930 if (phba->sli_rev == LPFC_SLI_REV4) {
28baac74 3931 shost->dma_boundary =
cb5172ea 3932 phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
da0436e9
JS		 3933 shost->sg_tablesize = phba->cfg_sg_seg_cnt;
3934 }
81301a9b 3935
47a8617c 3936 /*
2e0fef85
JS		 3937 * Set initial can_queue value since 0 is no longer supported and
3938 * scsi_add_host will fail. This will be adjusted later based on the
3939 * max xri value determined in hba setup.
47a8617c 3940 */
2e0fef85 3941 shost->can_queue = phba->cfg_hba_queue_depth - 10;
3de2a653 3942 if (dev != &phba->pcidev->dev) {
92d7f7b0
JS		 3943 shost->transportt = lpfc_vport_transport_template;
3944 vport->port_type = LPFC_NPIV_PORT;
3945 } else {
3946 shost->transportt = lpfc_transport_template;
3947 vport->port_type = LPFC_PHYSICAL_PORT;
3948 }
47a8617c 3949
2e0fef85
JS		 3950 /* Initialize all internally managed lists. */
3951 INIT_LIST_HEAD(&vport->fc_nodes);
da0436e9 3952 INIT_LIST_HEAD(&vport->rcv_buffer_list);
2e0fef85 3953 spin_lock_init(&vport->work_port_lock);
47a8617c 3954
f22eb4d3 3955 timer_setup(&vport->fc_disctmo, lpfc_disc_timeout, 0);
47a8617c 3956
f22eb4d3 3957 timer_setup(&vport->els_tmofunc, lpfc_els_timeout, 0);
92494144 3958
f22eb4d3 3959 timer_setup(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo, 0);
92494144 3960
d139b9bd 3961 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev);
2e0fef85
JS		 3962 if (error)
3963 goto out_put_shost;
47a8617c 3964
549e55cd 3965 spin_lock_irq(&phba->hbalock);
2e0fef85 3966 list_add_tail(&vport->listentry, &phba->port_list);
549e55cd 3967 spin_unlock_irq(&phba->hbalock);
2e0fef85 3968 return vport;
47a8617c 3969
2e0fef85
JS		 3970out_put_shost:
3971 scsi_host_put(shost);
3972out:
3973 return NULL;
47a8617c
JS		 3974}
3975
e59058c4 3976/**
3621a710 3977 * destroy_port - destroy an FC port
e59058c4
JS		 3978 * @vport: pointer to an lpfc virtual N_Port data structure.
3979 *
3980 * This routine destroys a FC port from the upper layer protocol. All the
3981 * resources associated with the port are released.
3982 **/
2e0fef85
JS		 3983void
3984destroy_port(struct lpfc_vport *vport)
47a8617c 3985{
92d7f7b0
JS		 3986 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
3987 struct lpfc_hba *phba = vport->phba;
47a8617c 3988
858c9f6c 3989 lpfc_debugfs_terminate(vport);
92d7f7b0
JS		 3990 fc_remove_host(shost);
3991 scsi_remove_host(shost);
47a8617c 3992
92d7f7b0
JS		 3993 spin_lock_irq(&phba->hbalock);
3994 list_del_init(&vport->listentry);
3995 spin_unlock_irq(&phba->hbalock);
47a8617c 3996
92d7f7b0 3997 lpfc_cleanup(vport);
47a8617c 3998 return;
47a8617c
JS		 3999}
4000
e59058c4 4001/**
3621a710 4002 * lpfc_get_instance - Get a unique integer ID
e59058c4
JS		 4003 *
4004 * This routine allocates a unique integer ID from lpfc_hba_index pool. It
4005 * uses the kernel idr facility to perform the task.
4006 *
4007 * Return codes:
4008 * instance - a unique integer ID allocated as the new instance.
4009 * -1 - lpfc get instance failed.
4010 **/
92d7f7b0
JS		 4011int
4012lpfc_get_instance(void)
4013{
ab516036
TH		 4014 int ret;
4015
4016 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL);
4017 return ret < 0 ? -1 : ret;
47a8617c
JS		 4018}
4019
e59058c4 4020/**
3621a710 4021 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done
e59058c4
JS		 4022 * @shost: pointer to SCSI host data structure.
4023 * @time: elapsed time of the scan in jiffies.
4024 *
4025 * This routine is called by the SCSI layer with a SCSI host to determine
4026 * whether the scan host is finished.
4027 *
4028 * Note: there is no scan_start function as adapter initialization will have
4029 * asynchronously kicked off the link initialization.
4030 *
4031 * Return codes
4032 * 0 - SCSI host scan is not over yet.
4033 * 1 - SCSI host scan is over.
4034 **/
47a8617c
JS		 4035int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time)
4036{
2e0fef85
JS		 4037 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4038 struct lpfc_hba *phba = vport->phba;
858c9f6c 4039 int stat = 0;
47a8617c 4040
858c9f6c
JS		 4041 spin_lock_irq(shost->host_lock);
4042
51ef4c26 4043 if (vport->load_flag & FC_UNLOADING) {
858c9f6c
JS		 4044 stat = 1;
4045 goto finished;
4046 }
256ec0d0 4047 if (time >= msecs_to_jiffies(30 * 1000)) {
2e0fef85 4048 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS		 4049 "0461 Scanning longer than 30 "
4050 "seconds. Continuing initialization\n");
858c9f6c 4051 stat = 1;
47a8617c 4052 goto finished;
2e0fef85 4053 }
256ec0d0
JS		 4054 if (time >= msecs_to_jiffies(15 * 1000) &&
4055 phba->link_state <= LPFC_LINK_DOWN) {
2e0fef85 4056 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS		 4057 "0465 Link down longer than 15 "
4058 "seconds. Continuing initialization\n");
858c9f6c 4059 stat = 1;
47a8617c 4060 goto finished;
2e0fef85 4061 }
47a8617c 4062
2e0fef85 4063 if (vport->port_state != LPFC_VPORT_READY)
858c9f6c 4064 goto finished;
2e0fef85 4065 if (vport->num_disc_nodes || vport->fc_prli_sent)
858c9f6c 4066 goto finished;
256ec0d0 4067 if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000))
858c9f6c 4068 goto finished;
2e0fef85 4069 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0)
858c9f6c
JS		 4070 goto finished;
4071
4072 stat = 1;
47a8617c
JS		 4073
4074finished:
858c9f6c
JS		 4075 spin_unlock_irq(shost->host_lock);
4076 return stat;
92d7f7b0 4077}
47a8617c 4078
e59058c4 4079/**
3621a710 4080 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port
e59058c4
JS		 4081 * @shost: pointer to SCSI host data structure.
4082 *
4083 * This routine initializes a given SCSI host attributes on a FC port. The
4084 * SCSI host can be either on top of a physical port or a virtual port.
4085 **/
92d7f7b0
JS		 4086void lpfc_host_attrib_init(struct Scsi_Host *shost)
4087{
4088 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4089 struct lpfc_hba *phba = vport->phba;
47a8617c 4090 /*
2e0fef85 4091 * Set fixed host attributes. Must done after lpfc_sli_hba_setup().
47a8617c
JS		 4092 */
4093
2e0fef85
JS		 4094 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
4095 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
47a8617c
JS		 4096 fc_host_supported_classes(shost) = FC_COS_CLASS3;
4097
4098 memset(fc_host_supported_fc4s(shost), 0,
2e0fef85 4099 sizeof(fc_host_supported_fc4s(shost)));
47a8617c
JS		 4100 fc_host_supported_fc4s(shost)[2] = 1;
4101 fc_host_supported_fc4s(shost)[7] = 1;
4102
92d7f7b0
JS		 4103 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost),
4104 sizeof fc_host_symbolic_name(shost));
47a8617c
JS		 4105
4106 fc_host_supported_speeds(shost) = 0;
d38dd52c
JS		 4107 if (phba->lmt & LMT_32Gb)
4108 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT;
88a2cfbb
JS		 4109 if (phba->lmt & LMT_16Gb)
4110 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT;
47a8617c
JS		 4111 if (phba->lmt & LMT_10Gb)
4112 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT;
a8adb832
JS		 4113 if (phba->lmt & LMT_8Gb)
4114 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT;
47a8617c
JS		 4115 if (phba->lmt & LMT_4Gb)
4116 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT;
4117 if (phba->lmt & LMT_2Gb)
4118 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT;
4119 if (phba->lmt & LMT_1Gb)
4120 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT;
4121
4122 fc_host_maxframe_size(shost) =
2e0fef85
JS		 4123 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
4124 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb;
47a8617c 4125
0af5d708
MC		 4126 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo;
4127
47a8617c
JS		 4128 /* This value is also unchanging */
4129 memset(fc_host_active_fc4s(shost), 0,
2e0fef85 4130 sizeof(fc_host_active_fc4s(shost)));
47a8617c
JS		 4131 fc_host_active_fc4s(shost)[2] = 1;
4132 fc_host_active_fc4s(shost)[7] = 1;
4133
92d7f7b0 4134 fc_host_max_npiv_vports(shost) = phba->max_vpi;
47a8617c 4135 spin_lock_irq(shost->host_lock);
51ef4c26 4136 vport->load_flag &= ~FC_LOADING;
47a8617c 4137 spin_unlock_irq(shost->host_lock);
47a8617c 4138}
dea3101e 4139
e59058c4 4140/**
da0436e9 4141 * lpfc_stop_port_s3 - Stop SLI3 device port
e59058c4
JS		 4142 * @phba: pointer to lpfc hba data structure.
4143 *
da0436e9
JS		 4144 * This routine is invoked to stop an SLI3 device port, it stops the device
4145 * from generating interrupts and stops the device driver's timers for the
4146 * device.
e59058c4 4147 **/
da0436e9
JS		 4148static void
4149lpfc_stop_port_s3(struct lpfc_hba *phba)
db2378e0 4150{
da0436e9
JS		 4151 /* Clear all interrupt enable conditions */
4152 writel(0, phba->HCregaddr);
4153 readl(phba->HCregaddr); /* flush */
4154 /* Clear all pending interrupts */
4155 writel(0xffffffff, phba->HAregaddr);
4156 readl(phba->HAregaddr); /* flush */
db2378e0 4157
da0436e9
JS		 4158 /* Reset some HBA SLI setup states */
4159 lpfc_stop_hba_timers(phba);
4160 phba->pport->work_port_events = 0;
4161}
db2378e0 4162
da0436e9
JS		 4163/**
4164 * lpfc_stop_port_s4 - Stop SLI4 device port
4165 * @phba: pointer to lpfc hba data structure.
4166 *
4167 * This routine is invoked to stop an SLI4 device port, it stops the device
4168 * from generating interrupts and stops the device driver's timers for the
4169 * device.
4170 **/
4171static void
4172lpfc_stop_port_s4(struct lpfc_hba *phba)
4173{
4174 /* Reset some HBA SLI4 setup states */
4175 lpfc_stop_hba_timers(phba);
4176 phba->pport->work_port_events = 0;
4177 phba->sli4_hba.intr_enable = 0;
da0436e9 4178}
9399627f 4179
da0436e9
JS		 4180/**
4181 * lpfc_stop_port - Wrapper function for stopping hba port
4182 * @phba: Pointer to HBA context object.
4183 *
4184 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from
4185 * the API jump table function pointer from the lpfc_hba struct.
4186 **/
4187void
4188lpfc_stop_port(struct lpfc_hba *phba)
4189{
4190 phba->lpfc_stop_port(phba);
f485c18d
DK		 4191
4192 if (phba->wq)
4193 flush_workqueue(phba->wq);
da0436e9 4194}
db2378e0 4195
ecfd03c6
JS		 4196/**
4197 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer
4198 * @phba: Pointer to hba for which this call is being executed.
4199 *
4200 * This routine starts the timer waiting for the FCF rediscovery to complete.
4201 **/
4202void
4203lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba)
4204{
4205 unsigned long fcf_redisc_wait_tmo =
4206 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO));
4207 /* Start fcf rediscovery wait period timer */
4208 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo);
4209 spin_lock_irq(&phba->hbalock);
4210 /* Allow action to new fcf asynchronous event */
4211 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
4212 /* Mark the FCF rediscovery pending state */
4213 phba->fcf.fcf_flag |= FCF_REDISC_PEND;
4214 spin_unlock_irq(&phba->hbalock);
4215}
4216
4217/**
4218 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout
4219 * @ptr: Map to lpfc_hba data structure pointer.
4220 *
4221 * This routine is invoked when waiting for FCF table rediscover has been
4222 * timed out. If new FCF record(s) has (have) been discovered during the
4223 * wait period, a new FCF event shall be added to the FCOE async event
4224 * list, and then worker thread shall be waked up for processing from the
4225 * worker thread context.
4226 **/
e399b228 4227static void
f22eb4d3 4228lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list *t)
ecfd03c6 4229{
f22eb4d3 4230 struct lpfc_hba *phba = from_timer(phba, t, fcf.redisc_wait);
ecfd03c6
JS		 4231
4232 /* Don't send FCF rediscovery event if timer cancelled */
4233 spin_lock_irq(&phba->hbalock);
4234 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
4235 spin_unlock_irq(&phba->hbalock);
4236 return;
4237 }
4238 /* Clear FCF rediscovery timer pending flag */
4239 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
4240 /* FCF rediscovery event to worker thread */
4241 phba->fcf.fcf_flag |= FCF_REDISC_EVT;
4242 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 4243 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 4244 "2776 FCF rediscover quiescent timer expired\n");
ecfd03c6
JS		 4245 /* wake up worker thread */
4246 lpfc_worker_wake_up(phba);
4247}
4248
e59058c4 4249/**
da0436e9 4250 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code
e59058c4 4251 * @phba: pointer to lpfc hba data structure.
da0436e9 4252 * @acqe_link: pointer to the async link completion queue entry.
e59058c4 4253 *
da0436e9
JS		 4254 * This routine is to parse the SLI4 link-attention link fault code and
4255 * translate it into the base driver's read link attention mailbox command
4256 * status.
4257 *
4258 * Return: Link-attention status in terms of base driver's coding.
e59058c4 4259 **/
da0436e9
JS		 4260static uint16_t
4261lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba,
4262 struct lpfc_acqe_link *acqe_link)
db2378e0 4263{
da0436e9 4264 uint16_t latt_fault;
9399627f 4265
da0436e9
JS		 4266 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) {
4267 case LPFC_ASYNC_LINK_FAULT_NONE:
4268 case LPFC_ASYNC_LINK_FAULT_LOCAL:
4269 case LPFC_ASYNC_LINK_FAULT_REMOTE:
4270 latt_fault = 0;
4271 break;
4272 default:
4273 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4274 "0398 Invalid link fault code: x%x\n",
4275 bf_get(lpfc_acqe_link_fault, acqe_link));
4276 latt_fault = MBXERR_ERROR;
4277 break;
4278 }
4279 return latt_fault;
db2378e0
JS		 4280}
4281
5b75da2f 4282/**
da0436e9 4283 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type
5b75da2f 4284 * @phba: pointer to lpfc hba data structure.
da0436e9 4285 * @acqe_link: pointer to the async link completion queue entry.
5b75da2f 4286 *
da0436e9
JS		 4287 * This routine is to parse the SLI4 link attention type and translate it
4288 * into the base driver's link attention type coding.
5b75da2f 4289 *
da0436e9
JS		 4290 * Return: Link attention type in terms of base driver's coding.
4291 **/
4292static uint8_t
4293lpfc_sli4_parse_latt_type(struct lpfc_hba *phba,
4294 struct lpfc_acqe_link *acqe_link)
5b75da2f 4295{
da0436e9 4296 uint8_t att_type;
5b75da2f 4297
da0436e9
JS		 4298 switch (bf_get(lpfc_acqe_link_status, acqe_link)) {
4299 case LPFC_ASYNC_LINK_STATUS_DOWN:
4300 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN:
76a95d75 4301 att_type = LPFC_ATT_LINK_DOWN;
da0436e9
JS		 4302 break;
4303 case LPFC_ASYNC_LINK_STATUS_UP:
4304 /* Ignore physical link up events - wait for logical link up */
76a95d75 4305 att_type = LPFC_ATT_RESERVED;
da0436e9
JS		 4306 break;
4307 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP:
76a95d75 4308 att_type = LPFC_ATT_LINK_UP;
da0436e9
JS		 4309 break;
4310 default:
4311 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4312 "0399 Invalid link attention type: x%x\n",
4313 bf_get(lpfc_acqe_link_status, acqe_link));
76a95d75 4314 att_type = LPFC_ATT_RESERVED;
da0436e9 4315 break;
5b75da2f 4316 }
da0436e9 4317 return att_type;
5b75da2f
JS		 4318}
4319
8b68cd52
JS		 4320/**
4321 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed
4322 * @phba: pointer to lpfc hba data structure.
4323 *
4324 * This routine is to get an SLI3 FC port's link speed in Mbps.
4325 *
4326 * Return: link speed in terms of Mbps.
4327 **/
4328uint32_t
4329lpfc_sli_port_speed_get(struct lpfc_hba *phba)
4330{
4331 uint32_t link_speed;
4332
4333 if (!lpfc_is_link_up(phba))
4334 return 0;
4335
a085e87c
JS		 4336 if (phba->sli_rev <= LPFC_SLI_REV3) {
4337 switch (phba->fc_linkspeed) {
4338 case LPFC_LINK_SPEED_1GHZ:
4339 link_speed = 1000;
4340 break;
4341 case LPFC_LINK_SPEED_2GHZ:
4342 link_speed = 2000;
4343 break;
4344 case LPFC_LINK_SPEED_4GHZ:
4345 link_speed = 4000;
4346 break;
4347 case LPFC_LINK_SPEED_8GHZ:
4348 link_speed = 8000;
4349 break;
4350 case LPFC_LINK_SPEED_10GHZ:
4351 link_speed = 10000;
4352 break;
4353 case LPFC_LINK_SPEED_16GHZ:
4354 link_speed = 16000;
4355 break;
4356 default:
4357 link_speed = 0;
4358 }
4359 } else {
4360 if (phba->sli4_hba.link_state.logical_speed)
4361 link_speed =
4362 phba->sli4_hba.link_state.logical_speed;
4363 else
4364 link_speed = phba->sli4_hba.link_state.speed;
8b68cd52
JS		 4365 }
4366 return link_speed;
4367}
4368
4369/**
4370 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed
4371 * @phba: pointer to lpfc hba data structure.
4372 * @evt_code: asynchronous event code.
4373 * @speed_code: asynchronous event link speed code.
4374 *
4375 * This routine is to parse the giving SLI4 async event link speed code into
4376 * value of Mbps for the link speed.
4377 *
4378 * Return: link speed in terms of Mbps.
4379 **/
4380static uint32_t
4381lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code,
4382 uint8_t speed_code)
4383{
4384 uint32_t port_speed;
4385
4386 switch (evt_code) {
4387 case LPFC_TRAILER_CODE_LINK:
4388 switch (speed_code) {
26d830ec 4389 case LPFC_ASYNC_LINK_SPEED_ZERO:
8b68cd52
JS		 4390 port_speed = 0;
4391 break;
26d830ec 4392 case LPFC_ASYNC_LINK_SPEED_10MBPS:
8b68cd52
JS		 4393 port_speed = 10;
4394 break;
26d830ec 4395 case LPFC_ASYNC_LINK_SPEED_100MBPS:
8b68cd52
JS		 4396 port_speed = 100;
4397 break;
26d830ec 4398 case LPFC_ASYNC_LINK_SPEED_1GBPS:
8b68cd52
JS		 4399 port_speed = 1000;
4400 break;
26d830ec 4401 case LPFC_ASYNC_LINK_SPEED_10GBPS:
8b68cd52
JS		 4402 port_speed = 10000;
4403 break;
26d830ec
JS		 4404 case LPFC_ASYNC_LINK_SPEED_20GBPS:
4405 port_speed = 20000;
4406 break;
4407 case LPFC_ASYNC_LINK_SPEED_25GBPS:
4408 port_speed = 25000;
4409 break;
4410 case LPFC_ASYNC_LINK_SPEED_40GBPS:
4411 port_speed = 40000;
4412 break;
8b68cd52
JS		 4413 default:
4414 port_speed = 0;
4415 }
4416 break;
4417 case LPFC_TRAILER_CODE_FC:
4418 switch (speed_code) {
26d830ec 4419 case LPFC_FC_LA_SPEED_UNKNOWN:
8b68cd52
JS		 4420 port_speed = 0;
4421 break;
26d830ec 4422 case LPFC_FC_LA_SPEED_1G:
8b68cd52
JS		 4423 port_speed = 1000;
4424 break;
26d830ec 4425 case LPFC_FC_LA_SPEED_2G:
8b68cd52
JS		 4426 port_speed = 2000;
4427 break;
26d830ec 4428 case LPFC_FC_LA_SPEED_4G:
8b68cd52
JS		 4429 port_speed = 4000;
4430 break;
26d830ec 4431 case LPFC_FC_LA_SPEED_8G:
8b68cd52
JS		 4432 port_speed = 8000;
4433 break;
26d830ec 4434 case LPFC_FC_LA_SPEED_10G:
8b68cd52
JS		 4435 port_speed = 10000;
4436 break;
26d830ec 4437 case LPFC_FC_LA_SPEED_16G:
8b68cd52
JS		 4438 port_speed = 16000;
4439 break;
d38dd52c
JS		 4440 case LPFC_FC_LA_SPEED_32G:
4441 port_speed = 32000;
4442 break;
8b68cd52
JS		 4443 default:
4444 port_speed = 0;
4445 }
4446 break;
4447 default:
4448 port_speed = 0;
4449 }
4450 return port_speed;
4451}
4452
da0436e9 4453/**
70f3c073 4454 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event
da0436e9
JS		 4455 * @phba: pointer to lpfc hba data structure.
4456 * @acqe_link: pointer to the async link completion queue entry.
4457 *
70f3c073 4458 * This routine is to handle the SLI4 asynchronous FCoE link event.
da0436e9
JS		 4459 **/
4460static void
4461lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
4462 struct lpfc_acqe_link *acqe_link)
4463{
4464 struct lpfc_dmabuf *mp;
4465 LPFC_MBOXQ_t *pmb;
4466 MAILBOX_t *mb;
76a95d75 4467 struct lpfc_mbx_read_top *la;
da0436e9 4468 uint8_t att_type;
76a95d75 4469 int rc;
da0436e9
JS		 4470
4471 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link);
76a95d75 4472 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP)
da0436e9 4473 return;
32b9793f 4474 phba->fcoe_eventtag = acqe_link->event_tag;
da0436e9
JS		 4475 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4476 if (!pmb) {
4477 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4478 "0395 The mboxq allocation failed\n");
4479 return;
4480 }
4481 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4482 if (!mp) {
4483 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4484 "0396 The lpfc_dmabuf allocation failed\n");
4485 goto out_free_pmb;
4486 }
4487 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4488 if (!mp->virt) {
4489 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4490 "0397 The mbuf allocation failed\n");
4491 goto out_free_dmabuf;
4492 }
4493
4494 /* Cleanup any outstanding ELS commands */
4495 lpfc_els_flush_all_cmd(phba);
4496
4497 /* Block ELS IOCBs until we have done process link event */
895427bd 4498 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
da0436e9
JS		 4499
4500 /* Update link event statistics */
4501 phba->sli.slistat.link_event++;
4502
76a95d75
JS		 4503 /* Create lpfc_handle_latt mailbox command from link ACQE */
4504 lpfc_read_topology(phba, pmb, mp);
4505 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
da0436e9
JS		 4506 pmb->vport = phba->pport;
4507
da0436e9
JS		 4508 /* Keep the link status for extra SLI4 state machine reference */
4509 phba->sli4_hba.link_state.speed =
8b68cd52
JS		 4510 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK,
4511 bf_get(lpfc_acqe_link_speed, acqe_link));
da0436e9
JS		 4512 phba->sli4_hba.link_state.duplex =
4513 bf_get(lpfc_acqe_link_duplex, acqe_link);
4514 phba->sli4_hba.link_state.status =
4515 bf_get(lpfc_acqe_link_status, acqe_link);
70f3c073
JS		 4516 phba->sli4_hba.link_state.type =
4517 bf_get(lpfc_acqe_link_type, acqe_link);
4518 phba->sli4_hba.link_state.number =
4519 bf_get(lpfc_acqe_link_number, acqe_link);
da0436e9
JS		 4520 phba->sli4_hba.link_state.fault =
4521 bf_get(lpfc_acqe_link_fault, acqe_link);
65467b6b 4522 phba->sli4_hba.link_state.logical_speed =
8b68cd52
JS		 4523 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10;
4524
70f3c073 4525 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
c31098ce
JS		 4526 "2900 Async FC/FCoE Link event - Speed:%dGBit "
4527 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d "
4528 "Logical speed:%dMbps Fault:%d\n",
70f3c073
JS		 4529 phba->sli4_hba.link_state.speed,
4530 phba->sli4_hba.link_state.topology,
4531 phba->sli4_hba.link_state.status,
4532 phba->sli4_hba.link_state.type,
4533 phba->sli4_hba.link_state.number,
8b68cd52 4534 phba->sli4_hba.link_state.logical_speed,
70f3c073 4535 phba->sli4_hba.link_state.fault);
76a95d75
JS		 4536 /*
4537 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch
4538 * topology info. Note: Optional for non FC-AL ports.
4539 */
4540 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
4541 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4542 if (rc == MBX_NOT_FINISHED)
4543 goto out_free_dmabuf;
4544 return;
4545 }
4546 /*
4547 * For FCoE Mode: fill in all the topology information we need and call
4548 * the READ_TOPOLOGY completion routine to continue without actually
4549 * sending the READ_TOPOLOGY mailbox command to the port.
4550 */
4551 /* Parse and translate status field */
4552 mb = &pmb->u.mb;
4553 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba, acqe_link);
4554
4555 /* Parse and translate link attention fields */
4556 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop;
4557 la->eventTag = acqe_link->event_tag;
4558 bf_set(lpfc_mbx_read_top_att_type, la, att_type);
4559 bf_set(lpfc_mbx_read_top_link_spd, la,
a085e87c 4560 (bf_get(lpfc_acqe_link_speed, acqe_link)));
76a95d75
JS		 4561
4562 /* Fake the the following irrelvant fields */
4563 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT);
4564 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0);
4565 bf_set(lpfc_mbx_read_top_il, la, 0);
4566 bf_set(lpfc_mbx_read_top_pb, la, 0);
4567 bf_set(lpfc_mbx_read_top_fa, la, 0);
4568 bf_set(lpfc_mbx_read_top_mm, la, 0);
da0436e9
JS		 4569
4570 /* Invoke the lpfc_handle_latt mailbox command callback function */
76a95d75 4571 lpfc_mbx_cmpl_read_topology(phba, pmb);
da0436e9 4572
5b75da2f 4573 return;
da0436e9
JS		 4574
4575out_free_dmabuf:
4576 kfree(mp);
4577out_free_pmb:
4578 mempool_free(pmb, phba->mbox_mem_pool);
4579}
4580
70f3c073
JS		 4581/**
4582 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event
4583 * @phba: pointer to lpfc hba data structure.
4584 * @acqe_fc: pointer to the async fc completion queue entry.
4585 *
4586 * This routine is to handle the SLI4 asynchronous FC event. It will simply log
4587 * that the event was received and then issue a read_topology mailbox command so
4588 * that the rest of the driver will treat it the same as SLI3.
4589 **/
4590static void
4591lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc)
4592{
4593 struct lpfc_dmabuf *mp;
4594 LPFC_MBOXQ_t *pmb;
7bdedb34
JS		 4595 MAILBOX_t *mb;
4596 struct lpfc_mbx_read_top *la;
70f3c073
JS		 4597 int rc;
4598
4599 if (bf_get(lpfc_trailer_type, acqe_fc) !=
4600 LPFC_FC_LA_EVENT_TYPE_FC_LINK) {
4601 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4602 "2895 Non FC link Event detected.(%d)\n",
4603 bf_get(lpfc_trailer_type, acqe_fc));
4604 return;
4605 }
4606 /* Keep the link status for extra SLI4 state machine reference */
4607 phba->sli4_hba.link_state.speed =
8b68cd52
JS		 4608 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
4609 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
70f3c073
JS		 4610 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
4611 phba->sli4_hba.link_state.topology =
4612 bf_get(lpfc_acqe_fc_la_topology, acqe_fc);
4613 phba->sli4_hba.link_state.status =
4614 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc);
4615 phba->sli4_hba.link_state.type =
4616 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc);
4617 phba->sli4_hba.link_state.number =
4618 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc);
4619 phba->sli4_hba.link_state.fault =
4620 bf_get(lpfc_acqe_link_fault, acqe_fc);
4621 phba->sli4_hba.link_state.logical_speed =
8b68cd52 4622 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
70f3c073
JS		 4623 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4624 "2896 Async FC event - Speed:%dGBaud Topology:x%x "
4625 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:"
4626 "%dMbps Fault:%d\n",
4627 phba->sli4_hba.link_state.speed,
4628 phba->sli4_hba.link_state.topology,
4629 phba->sli4_hba.link_state.status,
4630 phba->sli4_hba.link_state.type,
4631 phba->sli4_hba.link_state.number,
8b68cd52 4632 phba->sli4_hba.link_state.logical_speed,
70f3c073
JS		 4633 phba->sli4_hba.link_state.fault);
4634 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4635 if (!pmb) {
4636 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4637 "2897 The mboxq allocation failed\n");
4638 return;
4639 }
4640 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4641 if (!mp) {
4642 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4643 "2898 The lpfc_dmabuf allocation failed\n");
4644 goto out_free_pmb;
4645 }
4646 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4647 if (!mp->virt) {
4648 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4649 "2899 The mbuf allocation failed\n");
4650 goto out_free_dmabuf;
4651 }
4652
4653 /* Cleanup any outstanding ELS commands */
4654 lpfc_els_flush_all_cmd(phba);
4655
4656 /* Block ELS IOCBs until we have done process link event */
895427bd 4657 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
70f3c073
JS		 4658
4659 /* Update link event statistics */
4660 phba->sli.slistat.link_event++;
4661
4662 /* Create lpfc_handle_latt mailbox command from link ACQE */
4663 lpfc_read_topology(phba, pmb, mp);
4664 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
4665 pmb->vport = phba->pport;
4666
7bdedb34 4667 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
ae9e28f3
JS		 4668 phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK);
4669
4670 switch (phba->sli4_hba.link_state.status) {
4671 case LPFC_FC_LA_TYPE_MDS_LINK_DOWN:
4672 phba->link_flag |= LS_MDS_LINK_DOWN;
4673 break;
4674 case LPFC_FC_LA_TYPE_MDS_LOOPBACK:
4675 phba->link_flag |= LS_MDS_LOOPBACK;
4676 break;
4677 default:
4678 break;
4679 }
4680
7bdedb34
JS		 4681 /* Parse and translate status field */
4682 mb = &pmb->u.mb;
4683 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba,
4684 (void *)acqe_fc);
4685
4686 /* Parse and translate link attention fields */
4687 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop;
4688 la->eventTag = acqe_fc->event_tag;
7bdedb34 4689
aeb3c817
JS		 4690 if (phba->sli4_hba.link_state.status ==
4691 LPFC_FC_LA_TYPE_UNEXP_WWPN) {
4692 bf_set(lpfc_mbx_read_top_att_type, la,
4693 LPFC_FC_LA_TYPE_UNEXP_WWPN);
4694 } else {
4695 bf_set(lpfc_mbx_read_top_att_type, la,
4696 LPFC_FC_LA_TYPE_LINK_DOWN);
4697 }
7bdedb34
JS		 4698 /* Invoke the mailbox command callback function */
4699 lpfc_mbx_cmpl_read_topology(phba, pmb);
4700
4701 return;
4702 }
4703
70f3c073
JS		 4704 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4705 if (rc == MBX_NOT_FINISHED)
4706 goto out_free_dmabuf;
4707 return;
4708
4709out_free_dmabuf:
4710 kfree(mp);
4711out_free_pmb:
4712 mempool_free(pmb, phba->mbox_mem_pool);
4713}
4714
4715/**
4716 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event
4717 * @phba: pointer to lpfc hba data structure.
4718 * @acqe_fc: pointer to the async SLI completion queue entry.
4719 *
4720 * This routine is to handle the SLI4 asynchronous SLI events.
4721 **/
4722static void
4723lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
4724{
4b8bae08 4725 char port_name;
8c1312e1 4726 char message[128];
4b8bae08 4727 uint8_t status;
946727dc 4728 uint8_t evt_type;
448193b5 4729 uint8_t operational = 0;
946727dc 4730 struct temp_event temp_event_data;
4b8bae08 4731 struct lpfc_acqe_misconfigured_event *misconfigured;
946727dc
JS		 4732 struct Scsi_Host *shost;
4733
4734 evt_type = bf_get(lpfc_trailer_type, acqe_sli);
4b8bae08 4735
448193b5
JS		 4736 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4737 "2901 Async SLI event - Event Data1:x%08x Event Data2:"
4738 "x%08x SLI Event Type:%d\n",
4739 acqe_sli->event_data1, acqe_sli->event_data2,
4740 evt_type);
4b8bae08
JS		 4741
4742 port_name = phba->Port[0];
4743 if (port_name == 0x00)
4744 port_name = '?'; /* get port name is empty */
4745
946727dc
JS		 4746 switch (evt_type) {
4747 case LPFC_SLI_EVENT_TYPE_OVER_TEMP:
4748 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4749 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
4750 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4751
4752 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
4753 "3190 Over Temperature:%d Celsius- Port Name %c\n",
4754 acqe_sli->event_data1, port_name);
4755
310429ef 4756 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS		 4757 shost = lpfc_shost_from_vport(phba->pport);
4758 fc_host_post_vendor_event(shost, fc_get_event_number(),
4759 sizeof(temp_event_data),
4760 (char *)&temp_event_data,
4761 SCSI_NL_VID_TYPE_PCI
4762 | PCI_VENDOR_ID_EMULEX);
4763 break;
4764 case LPFC_SLI_EVENT_TYPE_NORM_TEMP:
4765 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4766 temp_event_data.event_code = LPFC_NORMAL_TEMP;
4767 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4768
4769 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4770 "3191 Normal Temperature:%d Celsius - Port Name %c\n",
4771 acqe_sli->event_data1, port_name);
4772
4773 shost = lpfc_shost_from_vport(phba->pport);
4774 fc_host_post_vendor_event(shost, fc_get_event_number(),
4775 sizeof(temp_event_data),
4776 (char *)&temp_event_data,
4777 SCSI_NL_VID_TYPE_PCI
4778 | PCI_VENDOR_ID_EMULEX);
4779 break;
4780 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED:
4781 misconfigured = (struct lpfc_acqe_misconfigured_event *)
4b8bae08
JS		 4782 &acqe_sli->event_data1;
4783
946727dc
JS		 4784 /* fetch the status for this port */
4785 switch (phba->sli4_hba.lnk_info.lnk_no) {
4786 case LPFC_LINK_NUMBER_0:
448193b5
JS		 4787 status = bf_get(lpfc_sli_misconfigured_port0_state,
4788 &misconfigured->theEvent);
4789 operational = bf_get(lpfc_sli_misconfigured_port0_op,
4b8bae08 4790 &misconfigured->theEvent);
946727dc
JS		 4791 break;
4792 case LPFC_LINK_NUMBER_1:
448193b5
JS		 4793 status = bf_get(lpfc_sli_misconfigured_port1_state,
4794 &misconfigured->theEvent);
4795 operational = bf_get(lpfc_sli_misconfigured_port1_op,
4b8bae08 4796 &misconfigured->theEvent);
946727dc
JS		 4797 break;
4798 case LPFC_LINK_NUMBER_2:
448193b5
JS		 4799 status = bf_get(lpfc_sli_misconfigured_port2_state,
4800 &misconfigured->theEvent);
4801 operational = bf_get(lpfc_sli_misconfigured_port2_op,
4b8bae08 4802 &misconfigured->theEvent);
946727dc
JS		 4803 break;
4804 case LPFC_LINK_NUMBER_3:
448193b5
JS		 4805 status = bf_get(lpfc_sli_misconfigured_port3_state,
4806 &misconfigured->theEvent);
4807 operational = bf_get(lpfc_sli_misconfigured_port3_op,
4b8bae08 4808 &misconfigured->theEvent);
946727dc
JS		 4809 break;
4810 default:
448193b5
JS		 4811 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4812 "3296 "
4813 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED "
4814 "event: Invalid link %d",
4815 phba->sli4_hba.lnk_info.lnk_no);
4816 return;
946727dc 4817 }
4b8bae08 4818
448193b5
JS		 4819 /* Skip if optic state unchanged */
4820 if (phba->sli4_hba.lnk_info.optic_state == status)
4821 return;
4822
946727dc
JS		 4823 switch (status) {
4824 case LPFC_SLI_EVENT_STATUS_VALID:
448193b5
JS		 4825 sprintf(message, "Physical Link is functional");
4826 break;
946727dc
JS		 4827 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT:
4828 sprintf(message, "Optics faulted/incorrectly "
4829 "installed/not installed - Reseat optics, "
4830 "if issue not resolved, replace.");
4831 break;
4832 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE:
4833 sprintf(message,
4834 "Optics of two types installed - Remove one "
4835 "optic or install matching pair of optics.");
4836 break;
4837 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED:
4838 sprintf(message, "Incompatible optics - Replace with "
292098be 4839 "compatible optics for card to function.");
946727dc 4840 break;
448193b5
JS		 4841 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED:
4842 sprintf(message, "Unqualified optics - Replace with "
4843 "Avago optics for Warranty and Technical "
4844 "Support - Link is%s operational",
2ea259ee 4845 (operational) ? " not" : "");
448193b5
JS		 4846 break;
4847 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED:
4848 sprintf(message, "Uncertified optics - Replace with "
4849 "Avago-certified optics to enable link "
4850 "operation - Link is%s operational",
2ea259ee 4851 (operational) ? " not" : "");
448193b5 4852 break;
946727dc
JS		 4853 default:
4854 /* firmware is reporting a status we don't know about */
4855 sprintf(message, "Unknown event status x%02x", status);
4856 break;
4857 }
448193b5 4858 phba->sli4_hba.lnk_info.optic_state = status;
946727dc 4859 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
448193b5 4860 "3176 Port Name %c %s\n", port_name, message);
946727dc
JS		 4861 break;
4862 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT:
4863 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4864 "3192 Remote DPort Test Initiated - "
4865 "Event Data1:x%08x Event Data2: x%08x\n",
4866 acqe_sli->event_data1, acqe_sli->event_data2);
4b8bae08
JS		 4867 break;
4868 default:
946727dc
JS		 4869 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4870 "3193 Async SLI event - Event Data1:x%08x Event Data2:"
4871 "x%08x SLI Event Type:%d\n",
4872 acqe_sli->event_data1, acqe_sli->event_data2,
4873 evt_type);
4b8bae08
JS		 4874 break;
4875 }
70f3c073
JS		 4876}
4877
fc2b989b
JS		 4878/**
4879 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport
4880 * @vport: pointer to vport data structure.
4881 *
4882 * This routine is to perform Clear Virtual Link (CVL) on a vport in
4883 * response to a CVL event.
4884 *
4885 * Return the pointer to the ndlp with the vport if successful, otherwise
4886 * return NULL.
4887 **/
4888static struct lpfc_nodelist *
4889lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport)
4890{
4891 struct lpfc_nodelist *ndlp;
4892 struct Scsi_Host *shost;
4893 struct lpfc_hba *phba;
4894
4895 if (!vport)
4896 return NULL;
fc2b989b
JS		 4897 phba = vport->phba;
4898 if (!phba)
4899 return NULL;
78730cfe
JS		 4900 ndlp = lpfc_findnode_did(vport, Fabric_DID);
4901 if (!ndlp) {
4902 /* Cannot find existing Fabric ndlp, so allocate a new one */
9d3d340d 4903 ndlp = lpfc_nlp_init(vport, Fabric_DID);
78730cfe
JS		 4904 if (!ndlp)
4905 return 0;
78730cfe
JS		 4906 /* Set the node type */
4907 ndlp->nlp_type |= NLP_FABRIC;
4908 /* Put ndlp onto node list */
4909 lpfc_enqueue_node(vport, ndlp);
4910 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
4911 /* re-setup ndlp without removing from node list */
4912 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
4913 if (!ndlp)
4914 return 0;
4915 }
63e801ce
JS		 4916 if ((phba->pport->port_state < LPFC_FLOGI) &&
4917 (phba->pport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS		 4918 return NULL;
4919 /* If virtual link is not yet instantiated ignore CVL */
63e801ce
JS		 4920 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)
4921 && (vport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS		 4922 return NULL;
4923 shost = lpfc_shost_from_vport(vport);
4924 if (!shost)
4925 return NULL;
4926 lpfc_linkdown_port(vport);
4927 lpfc_cleanup_pending_mbox(vport);
4928 spin_lock_irq(shost->host_lock);
4929 vport->fc_flag |= FC_VPORT_CVL_RCVD;
4930 spin_unlock_irq(shost->host_lock);
4931
4932 return ndlp;
4933}
4934
4935/**
4936 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports
4937 * @vport: pointer to lpfc hba data structure.
4938 *
4939 * This routine is to perform Clear Virtual Link (CVL) on all vports in
4940 * response to a FCF dead event.
4941 **/
4942static void
4943lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba)
4944{
4945 struct lpfc_vport **vports;
4946 int i;
4947
4948 vports = lpfc_create_vport_work_array(phba);
4949 if (vports)
4950 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
4951 lpfc_sli4_perform_vport_cvl(vports[i]);
4952 lpfc_destroy_vport_work_array(phba, vports);
4953}
4954
da0436e9 4955/**
76a95d75 4956 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event
da0436e9
JS		 4957 * @phba: pointer to lpfc hba data structure.
4958 * @acqe_link: pointer to the async fcoe completion queue entry.
4959 *
4960 * This routine is to handle the SLI4 asynchronous fcoe event.
4961 **/
4962static void
76a95d75 4963lpfc_sli4_async_fip_evt(struct lpfc_hba *phba,
70f3c073 4964 struct lpfc_acqe_fip *acqe_fip)
da0436e9 4965{
70f3c073 4966 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
da0436e9 4967 int rc;
6669f9bb
JS		 4968 struct lpfc_vport *vport;
4969 struct lpfc_nodelist *ndlp;
4970 struct Scsi_Host *shost;
695a814e
JS		 4971 int active_vlink_present;
4972 struct lpfc_vport **vports;
4973 int i;
da0436e9 4974
70f3c073
JS		 4975 phba->fc_eventTag = acqe_fip->event_tag;
4976 phba->fcoe_eventtag = acqe_fip->event_tag;
da0436e9 4977 switch (event_type) {
70f3c073
JS		 4978 case LPFC_FIP_EVENT_TYPE_NEW_FCF:
4979 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD:
4980 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF)
999d813f
JS		 4981 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4982 LOG_DISCOVERY,
a93ff37a
JS		 4983 "2546 New FCF event, evt_tag:x%x, "
4984 "index:x%x\n",
70f3c073
JS		 4985 acqe_fip->event_tag,
4986 acqe_fip->index);
999d813f
JS		 4987 else
4988 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP |
4989 LOG_DISCOVERY,
a93ff37a
JS		 4990 "2788 FCF param modified event, "
4991 "evt_tag:x%x, index:x%x\n",
70f3c073
JS		 4992 acqe_fip->event_tag,
4993 acqe_fip->index);
38b92ef8 4994 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
0c9ab6f5
JS		 4995 /*
4996 * During period of FCF discovery, read the FCF
4997 * table record indexed by the event to update
a93ff37a 4998 * FCF roundrobin failover eligible FCF bmask.
0c9ab6f5
JS		 4999 */
5000 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
5001 LOG_DISCOVERY,
a93ff37a
JS		 5002 "2779 Read FCF (x%x) for updating "
5003 "roundrobin FCF failover bmask\n",
70f3c073
JS		 5004 acqe_fip->index);
5005 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index);
0c9ab6f5 5006 }
38b92ef8
JS		 5007
5008 /* If the FCF discovery is in progress, do nothing. */
3804dc84 5009 spin_lock_irq(&phba->hbalock);
a93ff37a 5010 if (phba->hba_flag & FCF_TS_INPROG) {
38b92ef8
JS		 5011 spin_unlock_irq(&phba->hbalock);
5012 break;
5013 }
5014 /* If fast FCF failover rescan event is pending, do nothing */
5015 if (phba->fcf.fcf_flag & FCF_REDISC_EVT) {
5016 spin_unlock_irq(&phba->hbalock);
5017 break;
5018 }
5019
c2b9712e
JS		 5020 /* If the FCF has been in discovered state, do nothing. */
5021 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) {
3804dc84
JS		 5022 spin_unlock_irq(&phba->hbalock);
5023 break;
5024 }
5025 spin_unlock_irq(&phba->hbalock);
38b92ef8 5026
0c9ab6f5
JS		 5027 /* Otherwise, scan the entire FCF table and re-discover SAN */
5028 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a
JS		 5029 "2770 Start FCF table scan per async FCF "
5030 "event, evt_tag:x%x, index:x%x\n",
70f3c073 5031 acqe_fip->event_tag, acqe_fip->index);
0c9ab6f5
JS		 5032 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba,
5033 LPFC_FCOE_FCF_GET_FIRST);
da0436e9 5034 if (rc)
0c9ab6f5
JS		 5035 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5036 "2547 Issue FCF scan read FCF mailbox "
a93ff37a 5037 "command failed (x%x)\n", rc);
da0436e9
JS		 5038 break;
5039
70f3c073 5040 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL:
da0436e9 5041 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e4e74273 5042 "2548 FCF Table full count 0x%x tag 0x%x\n",
70f3c073
JS		 5043 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip),
5044 acqe_fip->event_tag);
da0436e9
JS		 5045 break;
5046
70f3c073 5047 case LPFC_FIP_EVENT_TYPE_FCF_DEAD:
80c17849 5048 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 5049 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
a93ff37a 5050 "2549 FCF (x%x) disconnected from network, "
70f3c073 5051 "tag:x%x\n", acqe_fip->index, acqe_fip->event_tag);
38b92ef8
JS		 5052 /*
5053 * If we are in the middle of FCF failover process, clear
5054 * the corresponding FCF bit in the roundrobin bitmap.
da0436e9 5055 */
fc2b989b 5056 spin_lock_irq(&phba->hbalock);
a1cadfef
JS		 5057 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) &&
5058 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) {
fc2b989b 5059 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 5060 /* Update FLOGI FCF failover eligible FCF bmask */
70f3c073 5061 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index);
fc2b989b
JS		 5062 break;
5063 }
38b92ef8
JS		 5064 spin_unlock_irq(&phba->hbalock);
5065
5066 /* If the event is not for currently used fcf do nothing */
70f3c073 5067 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index)
38b92ef8
JS		 5068 break;
5069
5070 /*
5071 * Otherwise, request the port to rediscover the entire FCF
5072 * table for a fast recovery from case that the current FCF
5073 * is no longer valid as we are not in the middle of FCF
5074 * failover process already.
5075 */
c2b9712e
JS		 5076 spin_lock_irq(&phba->hbalock);
5077 /* Mark the fast failover process in progress */
5078 phba->fcf.fcf_flag |= FCF_DEAD_DISC;
5079 spin_unlock_irq(&phba->hbalock);
5080
5081 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
5082 "2771 Start FCF fast failover process due to "
5083 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x "
5084 "\n", acqe_fip->event_tag, acqe_fip->index);
5085 rc = lpfc_sli4_redisc_fcf_table(phba);
5086 if (rc) {
5087 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
5088 LOG_DISCOVERY,
5089 "2772 Issue FCF rediscover mabilbox "
5090 "command failed, fail through to FCF "
5091 "dead event\n");
5092 spin_lock_irq(&phba->hbalock);
5093 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
5094 spin_unlock_irq(&phba->hbalock);
5095 /*
5096 * Last resort will fail over by treating this
5097 * as a link down to FCF registration.
5098 */
5099 lpfc_sli4_fcf_dead_failthrough(phba);
5100 } else {
5101 /* Reset FCF roundrobin bmask for new discovery */
5102 lpfc_sli4_clear_fcf_rr_bmask(phba);
5103 /*
5104 * Handling fast FCF failover to a DEAD FCF event is
5105 * considered equalivant to receiving CVL to all vports.
5106 */
5107 lpfc_sli4_perform_all_vport_cvl(phba);
5108 }
da0436e9 5109 break;
70f3c073 5110 case LPFC_FIP_EVENT_TYPE_CVL:
80c17849 5111 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 5112 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
6669f9bb 5113 "2718 Clear Virtual Link Received for VPI 0x%x"
70f3c073 5114 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag);
6d368e53 5115
6669f9bb 5116 vport = lpfc_find_vport_by_vpid(phba,
5248a749 5117 acqe_fip->index);
fc2b989b 5118 ndlp = lpfc_sli4_perform_vport_cvl(vport);
6669f9bb
JS		 5119 if (!ndlp)
5120 break;
695a814e
JS		 5121 active_vlink_present = 0;
5122
5123 vports = lpfc_create_vport_work_array(phba);
5124 if (vports) {
5125 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
5126 i++) {
5127 if ((!(vports[i]->fc_flag &
5128 FC_VPORT_CVL_RCVD)) &&
5129 (vports[i]->port_state > LPFC_FDISC)) {
5130 active_vlink_present = 1;
5131 break;
5132 }
5133 }
5134 lpfc_destroy_vport_work_array(phba, vports);
5135 }
5136
cc82355a
JS		 5137 /*
5138 * Don't re-instantiate if vport is marked for deletion.
5139 * If we are here first then vport_delete is going to wait
5140 * for discovery to complete.
5141 */
5142 if (!(vport->load_flag & FC_UNLOADING) &&
5143 active_vlink_present) {
695a814e
JS		 5144 /*
5145 * If there are other active VLinks present,
5146 * re-instantiate the Vlink using FDISC.
5147 */
256ec0d0
JS		 5148 mod_timer(&ndlp->nlp_delayfunc,
5149 jiffies + msecs_to_jiffies(1000));
fc2b989b 5150 shost = lpfc_shost_from_vport(vport);
6669f9bb
JS		 5151 spin_lock_irq(shost->host_lock);
5152 ndlp->nlp_flag |= NLP_DELAY_TMO;
5153 spin_unlock_irq(shost->host_lock);
695a814e
JS		 5154 ndlp->nlp_last_elscmd = ELS_CMD_FDISC;
5155 vport->port_state = LPFC_FDISC;
5156 } else {
ecfd03c6
JS		 5157 /*
5158 * Otherwise, we request port to rediscover
5159 * the entire FCF table for a fast recovery
5160 * from possible case that the current FCF
0c9ab6f5
JS		 5161 * is no longer valid if we are not already
5162 * in the FCF failover process.
ecfd03c6 5163 */
fc2b989b 5164 spin_lock_irq(&phba->hbalock);
0c9ab6f5 5165 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
fc2b989b
JS		 5166 spin_unlock_irq(&phba->hbalock);
5167 break;
5168 }
5169 /* Mark the fast failover process in progress */
0c9ab6f5 5170 phba->fcf.fcf_flag |= FCF_ACVL_DISC;
fc2b989b 5171 spin_unlock_irq(&phba->hbalock);
0c9ab6f5
JS		 5172 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
5173 LOG_DISCOVERY,
a93ff37a 5174 "2773 Start FCF failover per CVL, "
70f3c073 5175 "evt_tag:x%x\n", acqe_fip->event_tag);
ecfd03c6 5176 rc = lpfc_sli4_redisc_fcf_table(phba);
fc2b989b 5177 if (rc) {
0c9ab6f5
JS		 5178 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
5179 LOG_DISCOVERY,
5180 "2774 Issue FCF rediscover "
5181 "mabilbox command failed, "
5182 "through to CVL event\n");
fc2b989b 5183 spin_lock_irq(&phba->hbalock);
0c9ab6f5 5184 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
fc2b989b 5185 spin_unlock_irq(&phba->hbalock);
ecfd03c6
JS		 5186 /*
5187 * Last resort will be re-try on the
5188 * the current registered FCF entry.
5189 */
5190 lpfc_retry_pport_discovery(phba);
38b92ef8
JS		 5191 } else
5192 /*
5193 * Reset FCF roundrobin bmask for new
5194 * discovery.
5195 */
7d791df7 5196 lpfc_sli4_clear_fcf_rr_bmask(phba);
6669f9bb
JS		 5197 }
5198 break;
da0436e9
JS		 5199 default:
5200 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5201 "0288 Unknown FCoE event type 0x%x event tag "
70f3c073 5202 "0x%x\n", event_type, acqe_fip->event_tag);
da0436e9
JS		 5203 break;
5204 }
5205}
5206
5207/**
5208 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event
5209 * @phba: pointer to lpfc hba data structure.
5210 * @acqe_link: pointer to the async dcbx completion queue entry.
5211 *
5212 * This routine is to handle the SLI4 asynchronous dcbx event.
5213 **/
5214static void
5215lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba,
5216 struct lpfc_acqe_dcbx *acqe_dcbx)
5217{
4d9ab994 5218 phba->fc_eventTag = acqe_dcbx->event_tag;
da0436e9
JS		 5219 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5220 "0290 The SLI4 DCBX asynchronous event is not "
5221 "handled yet\n");
5222}
5223
b19a061a
JS		 5224/**
5225 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event
5226 * @phba: pointer to lpfc hba data structure.
5227 * @acqe_link: pointer to the async grp5 completion queue entry.
5228 *
5229 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event
5230 * is an asynchronous notified of a logical link speed change. The Port
5231 * reports the logical link speed in units of 10Mbps.
5232 **/
5233static void
5234lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba,
5235 struct lpfc_acqe_grp5 *acqe_grp5)
5236{
5237 uint16_t prev_ll_spd;
5238
5239 phba->fc_eventTag = acqe_grp5->event_tag;
5240 phba->fcoe_eventtag = acqe_grp5->event_tag;
5241 prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
5242 phba->sli4_hba.link_state.logical_speed =
8b68cd52 5243 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10;
b19a061a
JS		 5244 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5245 "2789 GRP5 Async Event: Updating logical link speed "
8b68cd52
JS		 5246 "from %dMbps to %dMbps\n", prev_ll_spd,
5247 phba->sli4_hba.link_state.logical_speed);
b19a061a
JS		 5248}
5249
da0436e9
JS		 5250/**
5251 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event
5252 * @phba: pointer to lpfc hba data structure.
5253 *
5254 * This routine is invoked by the worker thread to process all the pending
5255 * SLI4 asynchronous events.
5256 **/
5257void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
5258{
5259 struct lpfc_cq_event *cq_event;
5260
5261 /* First, declare the async event has been handled */
5262 spin_lock_irq(&phba->hbalock);
5263 phba->hba_flag &= ~ASYNC_EVENT;
5264 spin_unlock_irq(&phba->hbalock);
5265 /* Now, handle all the async events */
5266 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
5267 /* Get the first event from the head of the event queue */
5268 spin_lock_irq(&phba->hbalock);
5269 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
5270 cq_event, struct lpfc_cq_event, list);
5271 spin_unlock_irq(&phba->hbalock);
5272 /* Process the asynchronous event */
5273 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) {
5274 case LPFC_TRAILER_CODE_LINK:
5275 lpfc_sli4_async_link_evt(phba,
5276 &cq_event->cqe.acqe_link);
5277 break;
5278 case LPFC_TRAILER_CODE_FCOE:
70f3c073 5279 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip);
da0436e9
JS		 5280 break;
5281 case LPFC_TRAILER_CODE_DCBX:
5282 lpfc_sli4_async_dcbx_evt(phba,
5283 &cq_event->cqe.acqe_dcbx);
5284 break;
b19a061a
JS		 5285 case LPFC_TRAILER_CODE_GRP5:
5286 lpfc_sli4_async_grp5_evt(phba,
5287 &cq_event->cqe.acqe_grp5);
5288 break;
70f3c073
JS		 5289 case LPFC_TRAILER_CODE_FC:
5290 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc);
5291 break;
5292 case LPFC_TRAILER_CODE_SLI:
5293 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli);
5294 break;
da0436e9
JS		 5295 default:
5296 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5297 "1804 Invalid asynchrous event code: "
5298 "x%x\n", bf_get(lpfc_trailer_code,
5299 &cq_event->cqe.mcqe_cmpl));
5300 break;
5301 }
5302 /* Free the completion event processed to the free pool */
5303 lpfc_sli4_cq_event_release(phba, cq_event);
5304 }
5305}
5306
ecfd03c6
JS		 5307/**
5308 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event
5309 * @phba: pointer to lpfc hba data structure.
5310 *
5311 * This routine is invoked by the worker thread to process FCF table
5312 * rediscovery pending completion event.
5313 **/
5314void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba)
5315{
5316 int rc;
5317
5318 spin_lock_irq(&phba->hbalock);
5319 /* Clear FCF rediscovery timeout event */
5320 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT;
5321 /* Clear driver fast failover FCF record flag */
5322 phba->fcf.failover_rec.flag = 0;
5323 /* Set state for FCF fast failover */
5324 phba->fcf.fcf_flag |= FCF_REDISC_FOV;
5325 spin_unlock_irq(&phba->hbalock);
5326
5327 /* Scan FCF table from the first entry to re-discover SAN */
0c9ab6f5 5328 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a 5329 "2777 Start post-quiescent FCF table scan\n");
0c9ab6f5 5330 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST);
ecfd03c6 5331 if (rc)
0c9ab6f5
JS		 5332 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5333 "2747 Issue FCF scan read FCF mailbox "
5334 "command failed 0x%x\n", rc);
ecfd03c6
JS		 5335}
5336
da0436e9
JS		 5337/**
5338 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table
5339 * @phba: pointer to lpfc hba data structure.
5340 * @dev_grp: The HBA PCI-Device group number.
5341 *
5342 * This routine is invoked to set up the per HBA PCI-Device group function
5343 * API jump table entries.
5344 *
5345 * Return: 0 if success, otherwise -ENODEV
5346 **/
5347int
5348lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
5349{
5350 int rc;
5351
5352 /* Set up lpfc PCI-device group */
5353 phba->pci_dev_grp = dev_grp;
5354
5355 /* The LPFC_PCI_DEV_OC uses SLI4 */
5356 if (dev_grp == LPFC_PCI_DEV_OC)
5357 phba->sli_rev = LPFC_SLI_REV4;
5358
5359 /* Set up device INIT API function jump table */
5360 rc = lpfc_init_api_table_setup(phba, dev_grp);
5361 if (rc)
5362 return -ENODEV;
5363 /* Set up SCSI API function jump table */
5364 rc = lpfc_scsi_api_table_setup(phba, dev_grp);
5365 if (rc)
5366 return -ENODEV;
5367 /* Set up SLI API function jump table */
5368 rc = lpfc_sli_api_table_setup(phba, dev_grp);
5369 if (rc)
5370 return -ENODEV;
5371 /* Set up MBOX API function jump table */
5372 rc = lpfc_mbox_api_table_setup(phba, dev_grp);
5373 if (rc)
5374 return -ENODEV;
5375
5376 return 0;
5b75da2f
JS		 5377}
5378
5379/**
3621a710 5380 * lpfc_log_intr_mode - Log the active interrupt mode
5b75da2f
JS		 5381 * @phba: pointer to lpfc hba data structure.
5382 * @intr_mode: active interrupt mode adopted.
5383 *
5384 * This routine it invoked to log the currently used active interrupt mode
5385 * to the device.
3772a991
JS		 5386 **/
5387static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode)
5b75da2f
JS		 5388{
5389 switch (intr_mode) {
5390 case 0:
5391 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5392 "0470 Enable INTx interrupt mode.\n");
5393 break;
5394 case 1:
5395 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5396 "0481 Enabled MSI interrupt mode.\n");
5397 break;
5398 case 2:
5399 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5400 "0480 Enabled MSI-X interrupt mode.\n");
5401 break;
5402 default:
5403 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5404 "0482 Illegal interrupt mode.\n");
5405 break;
5406 }
5407 return;
5408}
5409
5b75da2f 5410/**
3772a991 5411 * lpfc_enable_pci_dev - Enable a generic PCI device.
5b75da2f
JS		 5412 * @phba: pointer to lpfc hba data structure.
5413 *
3772a991
JS		 5414 * This routine is invoked to enable the PCI device that is common to all
5415 * PCI devices.
5b75da2f
JS		 5416 *
5417 * Return codes
af901ca1 5418 * 0 - successful
3772a991 5419 * other values - error
5b75da2f 5420 **/
3772a991
JS		 5421static int
5422lpfc_enable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5423{
3772a991 5424 struct pci_dev *pdev;
5b75da2f 5425
3772a991
JS		 5426 /* Obtain PCI device reference */
5427 if (!phba->pcidev)
5428 goto out_error;
5429 else
5430 pdev = phba->pcidev;
3772a991
JS		 5431 /* Enable PCI device */
5432 if (pci_enable_device_mem(pdev))
5433 goto out_error;
5434 /* Request PCI resource for the device */
e0c0483c 5435 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME))
3772a991
JS		 5436 goto out_disable_device;
5437 /* Set up device as PCI master and save state for EEH */
5438 pci_set_master(pdev);
5439 pci_try_set_mwi(pdev);
5440 pci_save_state(pdev);
5b75da2f 5441
0558056c 5442 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */
453193e0 5443 if (pci_is_pcie(pdev))
0558056c
JS		 5444 pdev->needs_freset = 1;
5445
3772a991 5446 return 0;
5b75da2f 5447
3772a991
JS		 5448out_disable_device:
5449 pci_disable_device(pdev);
5450out_error:
079b5c91 5451 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e0c0483c 5452 "1401 Failed to enable pci device\n");
3772a991 5453 return -ENODEV;
5b75da2f
JS		 5454}
5455
5456/**
3772a991 5457 * lpfc_disable_pci_dev - Disable a generic PCI device.
5b75da2f
JS		 5458 * @phba: pointer to lpfc hba data structure.
5459 *
3772a991
JS		 5460 * This routine is invoked to disable the PCI device that is common to all
5461 * PCI devices.
5b75da2f
JS		 5462 **/
5463static void
3772a991 5464lpfc_disable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5465{
3772a991 5466 struct pci_dev *pdev;
5b75da2f 5467
3772a991
JS		 5468 /* Obtain PCI device reference */
5469 if (!phba->pcidev)
5470 return;
5471 else
5472 pdev = phba->pcidev;
3772a991 5473 /* Release PCI resource and disable PCI device */
e0c0483c 5474 pci_release_mem_regions(pdev);
3772a991 5475 pci_disable_device(pdev);
5b75da2f
JS		 5476
5477 return;
5478}
5479
e59058c4 5480/**
3772a991
JS		 5481 * lpfc_reset_hba - Reset a hba
5482 * @phba: pointer to lpfc hba data structure.
e59058c4 5483 *
3772a991
JS		 5484 * This routine is invoked to reset a hba device. It brings the HBA
5485 * offline, performs a board restart, and then brings the board back
5486 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up
5487 * on outstanding mailbox commands.
e59058c4 5488 **/
3772a991
JS		 5489void
5490lpfc_reset_hba(struct lpfc_hba *phba)
dea3101e 5491{
3772a991
JS		 5492 /* If resets are disabled then set error state and return. */
5493 if (!phba->cfg_enable_hba_reset) {
5494 phba->link_state = LPFC_HBA_ERROR;
5495 return;
5496 }
ee62021a
JS		 5497 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
5498 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
5499 else
5500 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
3772a991
JS		 5501 lpfc_offline(phba);
5502 lpfc_sli_brdrestart(phba);
5503 lpfc_online(phba);
5504 lpfc_unblock_mgmt_io(phba);
5505}
dea3101e 5506
0a96e975
JS		 5507/**
5508 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions
5509 * @phba: pointer to lpfc hba data structure.
5510 *
5511 * This function enables the PCI SR-IOV virtual functions to a physical
5512 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5513 * enable the number of virtual functions to the physical function. As
5514 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5515 * API call does not considered as an error condition for most of the device.
5516 **/
5517uint16_t
5518lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba)
5519{
5520 struct pci_dev *pdev = phba->pcidev;
5521 uint16_t nr_virtfn;
5522 int pos;
5523
0a96e975
JS		 5524 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
5525 if (pos == 0)
5526 return 0;
5527
5528 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn);
5529 return nr_virtfn;
5530}
5531
912e3acd
JS		 5532/**
5533 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions
5534 * @phba: pointer to lpfc hba data structure.
5535 * @nr_vfn: number of virtual functions to be enabled.
5536 *
5537 * This function enables the PCI SR-IOV virtual functions to a physical
5538 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5539 * enable the number of virtual functions to the physical function. As
5540 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5541 * API call does not considered as an error condition for most of the device.
5542 **/
5543int
5544lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn)
5545{
5546 struct pci_dev *pdev = phba->pcidev;
0a96e975 5547 uint16_t max_nr_vfn;
912e3acd
JS		 5548 int rc;
5549
0a96e975
JS		 5550 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba);
5551 if (nr_vfn > max_nr_vfn) {
5552 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5553 "3057 Requested vfs (%d) greater than "
5554 "supported vfs (%d)", nr_vfn, max_nr_vfn);
5555 return -EINVAL;
5556 }
5557
912e3acd
JS		 5558 rc = pci_enable_sriov(pdev, nr_vfn);
5559 if (rc) {
5560 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5561 "2806 Failed to enable sriov on this device "
5562 "with vfn number nr_vf:%d, rc:%d\n",
5563 nr_vfn, rc);
5564 } else
5565 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5566 "2807 Successful enable sriov on this device "
5567 "with vfn number nr_vf:%d\n", nr_vfn);
5568 return rc;
5569}
5570
3772a991 5571/**
895427bd 5572 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources.
3772a991
JS		 5573 * @phba: pointer to lpfc hba data structure.
5574 *
895427bd
JS		 5575 * This routine is invoked to set up the driver internal resources before the
5576 * device specific resource setup to support the HBA device it attached to.
3772a991
JS		 5577 *
5578 * Return codes
895427bd
JS		 5579 * 0 - successful
5580 * other values - error
3772a991
JS		 5581 **/
5582static int
895427bd 5583lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
3772a991 5584{
895427bd 5585 struct lpfc_sli *psli = &phba->sli;
dea3101e 5586
2e0fef85 5587 /*
895427bd 5588 * Driver resources common to all SLI revisions
2e0fef85 5589 */
895427bd
JS		 5590 atomic_set(&phba->fast_event_count, 0);
5591 spin_lock_init(&phba->hbalock);
dea3101e 5592
895427bd
JS		 5593 /* Initialize ndlp management spinlock */
5594 spin_lock_init(&phba->ndlp_lock);
5595
5596 INIT_LIST_HEAD(&phba->port_list);
5597 INIT_LIST_HEAD(&phba->work_list);
5598 init_waitqueue_head(&phba->wait_4_mlo_m_q);
5599
5600 /* Initialize the wait queue head for the kernel thread */
5601 init_waitqueue_head(&phba->work_waitq);
5602
5603 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
f358dd0c 5604 "1403 Protocols supported %s %s %s\n",
895427bd
JS		 5605 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ?
5606 "SCSI" : " "),
5607 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ?
f358dd0c
JS		 5608 "NVME" : " "),
5609 (phba->nvmet_support ? "NVMET" : " "));
895427bd
JS		 5610
5611 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5612 /* Initialize the scsi buffer list used by driver for scsi IO */
5613 spin_lock_init(&phba->scsi_buf_list_get_lock);
5614 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get);
5615 spin_lock_init(&phba->scsi_buf_list_put_lock);
5616 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
5617 }
5618
5619 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
5620 (phba->nvmet_support == 0)) {
5621 /* Initialize the NVME buffer list used by driver for NVME IO */
5622 spin_lock_init(&phba->nvme_buf_list_get_lock);
5623 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_get);
cf1a1d3e 5624 phba->get_nvme_bufs = 0;
895427bd
JS		 5625 spin_lock_init(&phba->nvme_buf_list_put_lock);
5626 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
cf1a1d3e 5627 phba->put_nvme_bufs = 0;
895427bd
JS		 5628 }
5629
5630 /* Initialize the fabric iocb list */
5631 INIT_LIST_HEAD(&phba->fabric_iocb_list);
5632
5633 /* Initialize list to save ELS buffers */
5634 INIT_LIST_HEAD(&phba->elsbuf);
5635
5636 /* Initialize FCF connection rec list */
5637 INIT_LIST_HEAD(&phba->fcf_conn_rec_list);
5638
5639 /* Initialize OAS configuration list */
5640 spin_lock_init(&phba->devicelock);
5641 INIT_LIST_HEAD(&phba->luns);
858c9f6c 5642
3772a991 5643 /* MBOX heartbeat timer */
f22eb4d3 5644 timer_setup(&psli->mbox_tmo, lpfc_mbox_timeout, 0);
3772a991 5645 /* Fabric block timer */
f22eb4d3 5646 timer_setup(&phba->fabric_block_timer, lpfc_fabric_block_timeout, 0);
3772a991 5647 /* EA polling mode timer */
f22eb4d3 5648 timer_setup(&phba->eratt_poll, lpfc_poll_eratt, 0);
895427bd 5649 /* Heartbeat timer */
f22eb4d3 5650 timer_setup(&phba->hb_tmofunc, lpfc_hb_timeout, 0);
895427bd
JS		 5651
5652 return 0;
5653}
5654
5655/**
5656 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev
5657 * @phba: pointer to lpfc hba data structure.
5658 *
5659 * This routine is invoked to set up the driver internal resources specific to
5660 * support the SLI-3 HBA device it attached to.
5661 *
5662 * Return codes
5663 * 0 - successful
5664 * other values - error
5665 **/
5666static int
5667lpfc_sli_driver_resource_setup(struct lpfc_hba *phba)
5668{
5669 int rc;
5670
5671 /*
5672 * Initialize timers used by driver
5673 */
5674
5675 /* FCP polling mode timer */
f22eb4d3 5676 timer_setup(&phba->fcp_poll_timer, lpfc_poll_timeout, 0);
dea3101e 5677
3772a991
JS		 5678 /* Host attention work mask setup */
5679 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT);
5680 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
dea3101e 5681
3772a991
JS		 5682 /* Get all the module params for configuring this host */
5683 lpfc_get_cfgparam(phba);
895427bd
JS		 5684 /* Set up phase-1 common device driver resources */
5685
5686 rc = lpfc_setup_driver_resource_phase1(phba);
5687 if (rc)
5688 return -ENODEV;
5689
49198b37
JS		 5690 if (phba->pcidev->device == PCI_DEVICE_ID_HORNET) {
5691 phba->menlo_flag |= HBA_MENLO_SUPPORT;
5692 /* check for menlo minimum sg count */
5693 if (phba->cfg_sg_seg_cnt < LPFC_DEFAULT_MENLO_SG_SEG_CNT)
5694 phba->cfg_sg_seg_cnt = LPFC_DEFAULT_MENLO_SG_SEG_CNT;
5695 }
5696
895427bd
JS		 5697 if (!phba->sli.sli3_ring)
5698 phba->sli.sli3_ring = kzalloc(LPFC_SLI3_MAX_RING *
2a76a283 5699 sizeof(struct lpfc_sli_ring), GFP_KERNEL);
895427bd 5700 if (!phba->sli.sli3_ring)
2a76a283
JS		 5701 return -ENOMEM;
5702
dea3101e 5703 /*
96f7077f 5704 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size
3772a991 5705 * used to create the sg_dma_buf_pool must be dynamically calculated.
dea3101e 5706 */
3772a991 5707
96f7077f
JS		 5708 /* Initialize the host templates the configured values. */
5709 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96418b5e
JS		 5710 lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt;
5711 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f
JS		 5712
5713 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */
3772a991 5714 if (phba->cfg_enable_bg) {
96f7077f
JS		 5715 /*
5716 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd,
5717 * the FCP rsp, and a BDE for each. Sice we have no control
5718 * over how many protection data segments the SCSI Layer
5719 * will hand us (ie: there could be one for every block
5720 * in the IO), we just allocate enough BDEs to accomidate
5721 * our max amount and we need to limit lpfc_sg_seg_cnt to
5722 * minimize the risk of running out.
5723 */
5724 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5725 sizeof(struct fcp_rsp) +
5726 (LPFC_MAX_SG_SEG_CNT * sizeof(struct ulp_bde64));
5727
5728 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF)
5729 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF;
5730
5731 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */
5732 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT;
5733 } else {
5734 /*
5735 * The scsi_buf for a regular I/O will hold the FCP cmnd,
5736 * the FCP rsp, a BDE for each, and a BDE for up to
5737 * cfg_sg_seg_cnt data segments.
5738 */
5739 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5740 sizeof(struct fcp_rsp) +
5741 ((phba->cfg_sg_seg_cnt + 2) * sizeof(struct ulp_bde64));
5742
5743 /* Total BDEs in BPL for scsi_sg_list */
5744 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
901a920f 5745 }
dea3101e 5746
96f7077f
JS		 5747 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5748 "9088 sg_tablesize:%d dmabuf_size:%d total_bde:%d\n",
5749 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5750 phba->cfg_total_seg_cnt);
dea3101e 5751
3772a991
JS		 5752 phba->max_vpi = LPFC_MAX_VPI;
5753 /* This will be set to correct value after config_port mbox */
5754 phba->max_vports = 0;
dea3101e 5755
3772a991
JS		 5756 /*
5757 * Initialize the SLI Layer to run with lpfc HBAs.
5758 */
5759 lpfc_sli_setup(phba);
895427bd 5760 lpfc_sli_queue_init(phba);
ed957684 5761
3772a991
JS		 5762 /* Allocate device driver memory */
5763 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ))
5764 return -ENOMEM;
51ef4c26 5765
912e3acd
JS		 5766 /*
5767 * Enable sr-iov virtual functions if supported and configured
5768 * through the module parameter.
5769 */
5770 if (phba->cfg_sriov_nr_virtfn > 0) {
5771 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
5772 phba->cfg_sriov_nr_virtfn);
5773 if (rc) {
5774 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5775 "2808 Requested number of SR-IOV "
5776 "virtual functions (%d) is not "
5777 "supported\n",
5778 phba->cfg_sriov_nr_virtfn);
5779 phba->cfg_sriov_nr_virtfn = 0;
5780 }
5781 }
5782
3772a991
JS		 5783 return 0;
5784}
ed957684 5785
3772a991
JS		 5786/**
5787 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev
5788 * @phba: pointer to lpfc hba data structure.
5789 *
5790 * This routine is invoked to unset the driver internal resources set up
5791 * specific for supporting the SLI-3 HBA device it attached to.
5792 **/
5793static void
5794lpfc_sli_driver_resource_unset(struct lpfc_hba *phba)
5795{
5796 /* Free device driver memory allocated */
5797 lpfc_mem_free_all(phba);
3163f725 5798
3772a991
JS		 5799 return;
5800}
dea3101e 5801
3772a991 5802/**
da0436e9 5803 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev
3772a991
JS		 5804 * @phba: pointer to lpfc hba data structure.
5805 *
da0436e9
JS		 5806 * This routine is invoked to set up the driver internal resources specific to
5807 * support the SLI-4 HBA device it attached to.
3772a991
JS		 5808 *
5809 * Return codes
af901ca1 5810 * 0 - successful
da0436e9 5811 * other values - error
3772a991
JS		 5812 **/
5813static int
da0436e9 5814lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
3772a991 5815{
28baac74 5816 LPFC_MBOXQ_t *mboxq;
f358dd0c 5817 MAILBOX_t *mb;
895427bd 5818 int rc, i, max_buf_size;
28baac74
JS		 5819 uint8_t pn_page[LPFC_MAX_SUPPORTED_PAGES] = {0};
5820 struct lpfc_mqe *mqe;
09294d46 5821 int longs;
1ba981fd 5822 int fof_vectors = 0;
81e6a637 5823 int extra;
f358dd0c 5824 uint64_t wwn;
da0436e9 5825
895427bd
JS		 5826 phba->sli4_hba.num_online_cpu = num_online_cpus();
5827 phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
5828 phba->sli4_hba.curr_disp_cpu = 0;
5829
716d3bc5
JS		 5830 /* Get all the module params for configuring this host */
5831 lpfc_get_cfgparam(phba);
5832
895427bd
JS		 5833 /* Set up phase-1 common device driver resources */
5834 rc = lpfc_setup_driver_resource_phase1(phba);
5835 if (rc)
5836 return -ENODEV;
5837
da0436e9
JS		 5838 /* Before proceed, wait for POST done and device ready */
5839 rc = lpfc_sli4_post_status_check(phba);
5840 if (rc)
5841 return -ENODEV;
5842
3772a991 5843 /*
da0436e9 5844 * Initialize timers used by driver
3772a991 5845 */
3772a991 5846
f22eb4d3 5847 timer_setup(&phba->rrq_tmr, lpfc_rrq_timeout, 0);
3772a991 5848
ecfd03c6 5849 /* FCF rediscover timer */
f22eb4d3 5850 timer_setup(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo, 0);
ecfd03c6 5851
7ad20aa9
JS		 5852 /*
5853 * Control structure for handling external multi-buffer mailbox
5854 * command pass-through.
5855 */
5856 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0,
5857 sizeof(struct lpfc_mbox_ext_buf_ctx));
5858 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list);
5859
da0436e9 5860 phba->max_vpi = LPFC_MAX_VPI;
67d12733 5861
da0436e9
JS		 5862 /* This will be set to correct value after the read_config mbox */
5863 phba->max_vports = 0;
3772a991 5864
da0436e9
JS		 5865 /* Program the default value of vlan_id and fc_map */
5866 phba->valid_vlan = 0;
5867 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
5868 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
5869 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
3772a991 5870
2a76a283
JS		 5871 /*
5872 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands
895427bd
JS		 5873 * we will associate a new ring, for each EQ/CQ/WQ tuple.
5874 * The WQ create will allocate the ring.
2a76a283 5875 */
09294d46 5876
81e6a637
JS		 5877 /*
5878 * 1 for cmd, 1 for rsp, NVME adds an extra one
5879 * for boundary conditions in its max_sgl_segment template.
5880 */
5881 extra = 2;
5882 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
5883 extra++;
5884
da0436e9 5885 /*
09294d46
JS		 5886 * It doesn't matter what family our adapter is in, we are
5887 * limited to 2 Pages, 512 SGEs, for our SGL.
5888 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp
5889 */
5890 max_buf_size = (2 * SLI4_PAGE_SIZE);
81e6a637
JS		 5891 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SGL_SEG_CNT - extra)
5892 phba->cfg_sg_seg_cnt = LPFC_MAX_SGL_SEG_CNT - extra;
09294d46 5893
da0436e9 5894 /*
895427bd
JS		 5895 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size
5896 * used to create the sg_dma_buf_pool must be calculated.
da0436e9 5897 */
96f7077f
JS		 5898 if (phba->cfg_enable_bg) {
5899 /*
895427bd
JS		 5900 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd,
5901 * the FCP rsp, and a SGE. Sice we have no control
5902 * over how many protection segments the SCSI Layer
96f7077f 5903 * will hand us (ie: there could be one for every block
895427bd
JS		 5904 * in the IO), just allocate enough SGEs to accomidate
5905 * our max amount and we need to limit lpfc_sg_seg_cnt
5906 * to minimize the risk of running out.
96f7077f
JS		 5907 */
5908 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd 5909 sizeof(struct fcp_rsp) + max_buf_size;
96f7077f
JS		 5910
5911 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */
5912 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT;
5913
5914 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SLI4_SEG_CNT_DIF)
895427bd
JS		 5915 phba->cfg_sg_seg_cnt =
5916 LPFC_MAX_SG_SLI4_SEG_CNT_DIF;
96f7077f
JS		 5917 } else {
5918 /*
895427bd 5919 * The scsi_buf for a regular I/O holds the FCP cmnd,
96f7077f
JS		 5920 * the FCP rsp, a SGE for each, and a SGE for up to
5921 * cfg_sg_seg_cnt data segments.
5922 */
5923 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd 5924 sizeof(struct fcp_rsp) +
81e6a637 5925 ((phba->cfg_sg_seg_cnt + extra) *
895427bd 5926 sizeof(struct sli4_sge));
96f7077f
JS		 5927
5928 /* Total SGEs for scsi_sg_list */
81e6a637 5929 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + extra;
895427bd 5930
96f7077f 5931 /*
81e6a637 5932 * NOTE: if (phba->cfg_sg_seg_cnt + extra) <= 256 we only
895427bd 5933 * need to post 1 page for the SGL.
96f7077f 5934 */
085c647c 5935 }
acd6859b 5936
96f7077f
JS		 5937 /* Initialize the host templates with the updated values. */
5938 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
5939 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96418b5e 5940 lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f
JS		 5941
5942 if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ)
5943 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ;
5944 else
5945 phba->cfg_sg_dma_buf_size =
5946 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size);
5947
5948 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5949 "9087 sg_tablesize:%d dmabuf_size:%d total_sge:%d\n",
5950 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5951 phba->cfg_total_seg_cnt);
3772a991 5952
da0436e9 5953 /* Initialize buffer queue management fields */
895427bd 5954 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list);
da0436e9
JS		 5955 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc;
5956 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free;
3772a991 5957
da0436e9
JS		 5958 /*
5959 * Initialize the SLI Layer to run with lpfc SLI4 HBAs.
5960 */
895427bd
JS		 5961 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5962 /* Initialize the Abort scsi buffer list used by driver */
5963 spin_lock_init(&phba->sli4_hba.abts_scsi_buf_list_lock);
5964 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
5965 }
5966
5967 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
5968 /* Initialize the Abort nvme buffer list used by driver */
5969 spin_lock_init(&phba->sli4_hba.abts_nvme_buf_list_lock);
5970 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
86c67379 5971 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
a8cf5dfe 5972 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list);
895427bd
JS		 5973 }
5974
da0436e9 5975 /* This abort list used by worker thread */
895427bd 5976 spin_lock_init(&phba->sli4_hba.sgl_list_lock);
a8cf5dfe 5977 spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock);
3772a991 5978
da0436e9 5979 /*
6d368e53 5980 * Initialize driver internal slow-path work queues
da0436e9 5981 */
3772a991 5982
da0436e9
JS		 5983 /* Driver internel slow-path CQ Event pool */
5984 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
5985 /* Response IOCB work queue list */
45ed1190 5986 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
da0436e9
JS		 5987 /* Asynchronous event CQ Event work queue list */
5988 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
5989 /* Fast-path XRI aborted CQ Event work queue list */
5990 INIT_LIST_HEAD(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue);
5991 /* Slow-path XRI aborted CQ Event work queue list */
5992 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
5993 /* Receive queue CQ Event work queue list */
5994 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
5995
6d368e53
JS		 5996 /* Initialize extent block lists. */
5997 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
5998 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
5999 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
6000 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list);
6001
d1f525aa
JS		 6002 /* Initialize mboxq lists. If the early init routines fail
6003 * these lists need to be correctly initialized.
6004 */
6005 INIT_LIST_HEAD(&phba->sli.mboxq);
6006 INIT_LIST_HEAD(&phba->sli.mboxq_cmpl);
6007
448193b5
JS		 6008 /* initialize optic_state to 0xFF */
6009 phba->sli4_hba.lnk_info.optic_state = 0xff;
6010
da0436e9
JS		 6011 /* Allocate device driver memory */
6012 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ);
6013 if (rc)
6014 return -ENOMEM;
6015
2fcee4bf
JS		 6016 /* IF Type 2 ports get initialized now. */
6017 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
6018 LPFC_SLI_INTF_IF_TYPE_2) {
6019 rc = lpfc_pci_function_reset(phba);
895427bd
JS		 6020 if (unlikely(rc)) {
6021 rc = -ENODEV;
6022 goto out_free_mem;
6023 }
946727dc 6024 phba->temp_sensor_support = 1;
2fcee4bf
JS		 6025 }
6026
da0436e9
JS		 6027 /* Create the bootstrap mailbox command */
6028 rc = lpfc_create_bootstrap_mbox(phba);
6029 if (unlikely(rc))
6030 goto out_free_mem;
6031
6032 /* Set up the host's endian order with the device. */
6033 rc = lpfc_setup_endian_order(phba);
6034 if (unlikely(rc))
6035 goto out_free_bsmbx;
6036
6037 /* Set up the hba's configuration parameters. */
6038 rc = lpfc_sli4_read_config(phba);
cff261f6
JS		 6039 if (unlikely(rc))
6040 goto out_free_bsmbx;
6041 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba);
da0436e9
JS		 6042 if (unlikely(rc))
6043 goto out_free_bsmbx;
6044
2fcee4bf
JS		 6045 /* IF Type 0 ports get initialized now. */
6046 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
6047 LPFC_SLI_INTF_IF_TYPE_0) {
6048 rc = lpfc_pci_function_reset(phba);
6049 if (unlikely(rc))
6050 goto out_free_bsmbx;
6051 }
da0436e9 6052
cb5172ea
JS		 6053 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
6054 GFP_KERNEL);
6055 if (!mboxq) {
6056 rc = -ENOMEM;
6057 goto out_free_bsmbx;
6058 }
6059
f358dd0c 6060 /* Check for NVMET being configured */
895427bd 6061 phba->nvmet_support = 0;
f358dd0c
JS		 6062 if (lpfc_enable_nvmet_cnt) {
6063
6064 /* First get WWN of HBA instance */
6065 lpfc_read_nv(phba, mboxq);
6066 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
6067 if (rc != MBX_SUCCESS) {
6068 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6069 "6016 Mailbox failed , mbxCmd x%x "
6070 "READ_NV, mbxStatus x%x\n",
6071 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
6072 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
d1f525aa 6073 mempool_free(mboxq, phba->mbox_mem_pool);
f358dd0c
JS		 6074 rc = -EIO;
6075 goto out_free_bsmbx;
6076 }
6077 mb = &mboxq->u.mb;
6078 memcpy(&wwn, (char *)mb->un.varRDnvp.nodename,
6079 sizeof(uint64_t));
6080 wwn = cpu_to_be64(wwn);
6081 phba->sli4_hba.wwnn.u.name = wwn;
6082 memcpy(&wwn, (char *)mb->un.varRDnvp.portname,
6083 sizeof(uint64_t));
6084 /* wwn is WWPN of HBA instance */
6085 wwn = cpu_to_be64(wwn);
6086 phba->sli4_hba.wwpn.u.name = wwn;
6087
6088 /* Check to see if it matches any module parameter */
6089 for (i = 0; i < lpfc_enable_nvmet_cnt; i++) {
6090 if (wwn == lpfc_enable_nvmet[i]) {
7d708033 6091#if (IS_ENABLED(CONFIG_NVME_TARGET_FC))
3c603be9
JS		 6092 if (lpfc_nvmet_mem_alloc(phba))
6093 break;
6094
6095 phba->nvmet_support = 1; /* a match */
6096
f358dd0c
JS		 6097 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6098 "6017 NVME Target %016llx\n",
6099 wwn);
7d708033
JS		 6100#else
6101 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6102 "6021 Can't enable NVME Target."
6103 " NVME_TARGET_FC infrastructure"
6104 " is not in kernel\n");
6105#endif
3c603be9 6106 break;
f358dd0c
JS		 6107 }
6108 }
6109 }
895427bd
JS		 6110
6111 lpfc_nvme_mod_param_dep(phba);
6112
fedd3b7b 6113 /* Get the Supported Pages if PORT_CAPABILITIES is supported by port. */
cb5172ea
JS		 6114 lpfc_supported_pages(mboxq);
6115 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
fedd3b7b
JS		 6116 if (!rc) {
6117 mqe = &mboxq->u.mqe;
6118 memcpy(&pn_page[0], ((uint8_t *)&mqe->un.supp_pages.word3),
6119 LPFC_MAX_SUPPORTED_PAGES);
6120 for (i = 0; i < LPFC_MAX_SUPPORTED_PAGES; i++) {
6121 switch (pn_page[i]) {
6122 case LPFC_SLI4_PARAMETERS:
6123 phba->sli4_hba.pc_sli4_params.supported = 1;
6124 break;
6125 default:
6126 break;
6127 }
6128 }
6129 /* Read the port's SLI4 Parameters capabilities if supported. */
6130 if (phba->sli4_hba.pc_sli4_params.supported)
6131 rc = lpfc_pc_sli4_params_get(phba, mboxq);
6132 if (rc) {
6133 mempool_free(mboxq, phba->mbox_mem_pool);
6134 rc = -EIO;
6135 goto out_free_bsmbx;
cb5172ea
JS		 6136 }
6137 }
65791f1f 6138
fedd3b7b
JS		 6139 /*
6140 * Get sli4 parameters that override parameters from Port capabilities.
6d368e53
JS		 6141 * If this call fails, it isn't critical unless the SLI4 parameters come
6142 * back in conflict.
fedd3b7b 6143 */
6d368e53
JS		 6144 rc = lpfc_get_sli4_parameters(phba, mboxq);
6145 if (rc) {
6146 if (phba->sli4_hba.extents_in_use &&
6147 phba->sli4_hba.rpi_hdrs_in_use) {
6148 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6149 "2999 Unsupported SLI4 Parameters "
6150 "Extents and RPI headers enabled.\n");
6d368e53 6151 }
895427bd 6152 mempool_free(mboxq, phba->mbox_mem_pool);
5c756065 6153 rc = -EIO;
895427bd 6154 goto out_free_bsmbx;
6d368e53 6155 }
895427bd 6156
cb5172ea 6157 mempool_free(mboxq, phba->mbox_mem_pool);
1ba981fd
JS		 6158
6159 /* Verify OAS is supported */
6160 lpfc_sli4_oas_verify(phba);
6161 if (phba->cfg_fof)
6162 fof_vectors = 1;
6163
5350d872
JS		 6164 /* Verify all the SLI4 queues */
6165 rc = lpfc_sli4_queue_verify(phba);
da0436e9
JS		 6166 if (rc)
6167 goto out_free_bsmbx;
6168
6169 /* Create driver internal CQE event pool */
6170 rc = lpfc_sli4_cq_event_pool_create(phba);
6171 if (rc)
5350d872 6172 goto out_free_bsmbx;
da0436e9 6173
8a9d2e80
JS		 6174 /* Initialize sgl lists per host */
6175 lpfc_init_sgl_list(phba);
6176
6177 /* Allocate and initialize active sgl array */
da0436e9
JS		 6178 rc = lpfc_init_active_sgl_array(phba);
6179 if (rc) {
6180 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6181 "1430 Failed to initialize sgl list.\n");
8a9d2e80 6182 goto out_destroy_cq_event_pool;
da0436e9 6183 }
da0436e9
JS		 6184 rc = lpfc_sli4_init_rpi_hdrs(phba);
6185 if (rc) {
6186 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6187 "1432 Failed to initialize rpi headers.\n");
6188 goto out_free_active_sgl;
6189 }
6190
a93ff37a 6191 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */
0c9ab6f5
JS		 6192 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG;
6193 phba->fcf.fcf_rr_bmask = kzalloc(longs * sizeof(unsigned long),
6194 GFP_KERNEL);
6195 if (!phba->fcf.fcf_rr_bmask) {
6196 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6197 "2759 Failed allocate memory for FCF round "
6198 "robin failover bmask\n");
0558056c 6199 rc = -ENOMEM;
0c9ab6f5
JS		 6200 goto out_remove_rpi_hdrs;
6201 }
6202
895427bd
JS		 6203 phba->sli4_hba.hba_eq_hdl = kcalloc(fof_vectors + phba->io_channel_irqs,
6204 sizeof(struct lpfc_hba_eq_hdl),
6205 GFP_KERNEL);
6206 if (!phba->sli4_hba.hba_eq_hdl) {
67d12733
JS		 6207 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6208 "2572 Failed allocate memory for "
6209 "fast-path per-EQ handle array\n");
6210 rc = -ENOMEM;
6211 goto out_free_fcf_rr_bmask;
da0436e9
JS		 6212 }
6213
895427bd
JS		 6214 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_present_cpu,
6215 sizeof(struct lpfc_vector_map_info),
6216 GFP_KERNEL);
7bb03bbf
JS		 6217 if (!phba->sli4_hba.cpu_map) {
6218 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6219 "3327 Failed allocate memory for msi-x "
6220 "interrupt vector mapping\n");
6221 rc = -ENOMEM;
895427bd 6222 goto out_free_hba_eq_hdl;
7bb03bbf 6223 }
b246de17 6224 if (lpfc_used_cpu == NULL) {
895427bd
JS		 6225 lpfc_used_cpu = kcalloc(lpfc_present_cpu, sizeof(uint16_t),
6226 GFP_KERNEL);
b246de17
JS		 6227 if (!lpfc_used_cpu) {
6228 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6229 "3335 Failed allocate memory for msi-x "
6230 "interrupt vector mapping\n");
6231 kfree(phba->sli4_hba.cpu_map);
6232 rc = -ENOMEM;
895427bd 6233 goto out_free_hba_eq_hdl;
b246de17
JS		 6234 }
6235 for (i = 0; i < lpfc_present_cpu; i++)
6236 lpfc_used_cpu[i] = LPFC_VECTOR_MAP_EMPTY;
6237 }
6238
912e3acd
JS		 6239 /*
6240 * Enable sr-iov virtual functions if supported and configured
6241 * through the module parameter.
6242 */
6243 if (phba->cfg_sriov_nr_virtfn > 0) {
6244 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
6245 phba->cfg_sriov_nr_virtfn);
6246 if (rc) {
6247 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6248 "3020 Requested number of SR-IOV "
6249 "virtual functions (%d) is not "
6250 "supported\n",
6251 phba->cfg_sriov_nr_virtfn);
6252 phba->cfg_sriov_nr_virtfn = 0;
6253 }
6254 }
6255
5248a749 6256 return 0;
da0436e9 6257
895427bd
JS		 6258out_free_hba_eq_hdl:
6259 kfree(phba->sli4_hba.hba_eq_hdl);
0c9ab6f5
JS		 6260out_free_fcf_rr_bmask:
6261 kfree(phba->fcf.fcf_rr_bmask);
da0436e9
JS		 6262out_remove_rpi_hdrs:
6263 lpfc_sli4_remove_rpi_hdrs(phba);
6264out_free_active_sgl:
6265 lpfc_free_active_sgl(phba);
da0436e9
JS		 6266out_destroy_cq_event_pool:
6267 lpfc_sli4_cq_event_pool_destroy(phba);
da0436e9
JS		 6268out_free_bsmbx:
6269 lpfc_destroy_bootstrap_mbox(phba);
6270out_free_mem:
6271 lpfc_mem_free(phba);
6272 return rc;
6273}
6274
6275/**
6276 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev
6277 * @phba: pointer to lpfc hba data structure.
6278 *
6279 * This routine is invoked to unset the driver internal resources set up
6280 * specific for supporting the SLI-4 HBA device it attached to.
6281 **/
6282static void
6283lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
6284{
6285 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry;
6286
7bb03bbf
JS		 6287 /* Free memory allocated for msi-x interrupt vector to CPU mapping */
6288 kfree(phba->sli4_hba.cpu_map);
6289 phba->sli4_hba.num_present_cpu = 0;
6290 phba->sli4_hba.num_online_cpu = 0;
76fd07a6 6291 phba->sli4_hba.curr_disp_cpu = 0;
7bb03bbf 6292
da0436e9 6293 /* Free memory allocated for fast-path work queue handles */
895427bd 6294 kfree(phba->sli4_hba.hba_eq_hdl);
da0436e9
JS		 6295
6296 /* Free the allocated rpi headers. */
6297 lpfc_sli4_remove_rpi_hdrs(phba);
d11e31dd 6298 lpfc_sli4_remove_rpis(phba);
da0436e9 6299
0c9ab6f5
JS		 6300 /* Free eligible FCF index bmask */
6301 kfree(phba->fcf.fcf_rr_bmask);
6302
da0436e9
JS		 6303 /* Free the ELS sgl list */
6304 lpfc_free_active_sgl(phba);
8a9d2e80 6305 lpfc_free_els_sgl_list(phba);
f358dd0c 6306 lpfc_free_nvmet_sgl_list(phba);
da0436e9 6307
da0436e9
JS		 6308 /* Free the completion queue EQ event pool */
6309 lpfc_sli4_cq_event_release_all(phba);
6310 lpfc_sli4_cq_event_pool_destroy(phba);
6311
6d368e53
JS		 6312 /* Release resource identifiers. */
6313 lpfc_sli4_dealloc_resource_identifiers(phba);
6314
da0436e9
JS		 6315 /* Free the bsmbx region. */
6316 lpfc_destroy_bootstrap_mbox(phba);
6317
6318 /* Free the SLI Layer memory with SLI4 HBAs */
6319 lpfc_mem_free_all(phba);
6320
6321 /* Free the current connect table */
6322 list_for_each_entry_safe(conn_entry, next_conn_entry,
4d9ab994
JS		 6323 &phba->fcf_conn_rec_list, list) {
6324 list_del_init(&conn_entry->list);
da0436e9 6325 kfree(conn_entry);
4d9ab994 6326 }
da0436e9
JS		 6327
6328 return;
6329}
6330
6331/**
25985edc 6332 * lpfc_init_api_table_setup - Set up init api function jump table
da0436e9
JS		 6333 * @phba: The hba struct for which this call is being executed.
6334 * @dev_grp: The HBA PCI-Device group number.
6335 *
6336 * This routine sets up the device INIT interface API function jump table
6337 * in @phba struct.
6338 *
6339 * Returns: 0 - success, -ENODEV - failure.
6340 **/
6341int
6342lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
6343{
84d1b006
JS		 6344 phba->lpfc_hba_init_link = lpfc_hba_init_link;
6345 phba->lpfc_hba_down_link = lpfc_hba_down_link;
7f86059a 6346 phba->lpfc_selective_reset = lpfc_selective_reset;
da0436e9
JS		 6347 switch (dev_grp) {
6348 case LPFC_PCI_DEV_LP:
6349 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3;
6350 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3;
6351 phba->lpfc_stop_port = lpfc_stop_port_s3;
6352 break;
6353 case LPFC_PCI_DEV_OC:
6354 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4;
6355 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4;
6356 phba->lpfc_stop_port = lpfc_stop_port_s4;
6357 break;
6358 default:
6359 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6360 "1431 Invalid HBA PCI-device group: 0x%x\n",
6361 dev_grp);
6362 return -ENODEV;
6363 break;
6364 }
6365 return 0;
6366}
6367
da0436e9
JS		 6368/**
6369 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources.
6370 * @phba: pointer to lpfc hba data structure.
6371 *
6372 * This routine is invoked to set up the driver internal resources after the
6373 * device specific resource setup to support the HBA device it attached to.
6374 *
6375 * Return codes
af901ca1 6376 * 0 - successful
da0436e9
JS		 6377 * other values - error
6378 **/
6379static int
6380lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba)
6381{
6382 int error;
6383
6384 /* Startup the kernel thread for this host adapter. */
6385 phba->worker_thread = kthread_run(lpfc_do_work, phba,
6386 "lpfc_worker_%d", phba->brd_no);
6387 if (IS_ERR(phba->worker_thread)) {
6388 error = PTR_ERR(phba->worker_thread);
6389 return error;
3772a991
JS		 6390 }
6391
f485c18d
DK		 6392 /* workqueue for deferred irq use */
6393 phba->wq = alloc_workqueue("lpfc_wq", WQ_MEM_RECLAIM, 0);
6394
3772a991
JS		 6395 return 0;
6396}
6397
6398/**
6399 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources.
6400 * @phba: pointer to lpfc hba data structure.
6401 *
6402 * This routine is invoked to unset the driver internal resources set up after
6403 * the device specific resource setup for supporting the HBA device it
6404 * attached to.
6405 **/
6406static void
6407lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba)
6408{
f485c18d
DK		 6409 if (phba->wq) {
6410 flush_workqueue(phba->wq);
6411 destroy_workqueue(phba->wq);
6412 phba->wq = NULL;
6413 }
6414
3772a991
JS		 6415 /* Stop kernel worker thread */
6416 kthread_stop(phba->worker_thread);
6417}
6418
6419/**
6420 * lpfc_free_iocb_list - Free iocb list.
6421 * @phba: pointer to lpfc hba data structure.
6422 *
6423 * This routine is invoked to free the driver's IOCB list and memory.
6424 **/
6c621a22 6425void
3772a991
JS		 6426lpfc_free_iocb_list(struct lpfc_hba *phba)
6427{
6428 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
6429
6430 spin_lock_irq(&phba->hbalock);
6431 list_for_each_entry_safe(iocbq_entry, iocbq_next,
6432 &phba->lpfc_iocb_list, list) {
6433 list_del(&iocbq_entry->list);
6434 kfree(iocbq_entry);
6435 phba->total_iocbq_bufs--;
98c9ea5c 6436 }
3772a991
JS		 6437 spin_unlock_irq(&phba->hbalock);
6438
6439 return;
6440}
6441
6442/**
6443 * lpfc_init_iocb_list - Allocate and initialize iocb list.
6444 * @phba: pointer to lpfc hba data structure.
6445 *
6446 * This routine is invoked to allocate and initizlize the driver's IOCB
6447 * list and set up the IOCB tag array accordingly.
6448 *
6449 * Return codes
af901ca1 6450 * 0 - successful
3772a991
JS		 6451 * other values - error
6452 **/
6c621a22 6453int
3772a991
JS		 6454lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count)
6455{
6456 struct lpfc_iocbq *iocbq_entry = NULL;
6457 uint16_t iotag;
6458 int i;
dea3101e 6459
6460 /* Initialize and populate the iocb list per host. */
6461 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
3772a991 6462 for (i = 0; i < iocb_count; i++) {
dd00cc48 6463 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
dea3101e 6464 if (iocbq_entry == NULL) {
6465 printk(KERN_ERR "%s: only allocated %d iocbs of "
6466 "expected %d count. Unloading driver.\n",
cadbd4a5 6467 __func__, i, LPFC_IOCB_LIST_CNT);
dea3101e 6468 goto out_free_iocbq;
6469 }
6470
604a3e30
JB		 6471 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
6472 if (iotag == 0) {
3772a991 6473 kfree(iocbq_entry);
604a3e30 6474 printk(KERN_ERR "%s: failed to allocate IOTAG. "
3772a991 6475 "Unloading driver.\n", __func__);
604a3e30
JB		 6476 goto out_free_iocbq;
6477 }
6d368e53 6478 iocbq_entry->sli4_lxritag = NO_XRI;
3772a991 6479 iocbq_entry->sli4_xritag = NO_XRI;
2e0fef85
JS		 6480
6481 spin_lock_irq(&phba->hbalock);
dea3101e 6482 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
6483 phba->total_iocbq_bufs++;
2e0fef85 6484 spin_unlock_irq(&phba->hbalock);
dea3101e 6485 }
6486
3772a991 6487 return 0;
dea3101e 6488
3772a991
JS		 6489out_free_iocbq:
6490 lpfc_free_iocb_list(phba);
dea3101e 6491
3772a991
JS		 6492 return -ENOMEM;
6493}
5e9d9b82 6494
3772a991 6495/**
8a9d2e80 6496 * lpfc_free_sgl_list - Free a given sgl list.
da0436e9 6497 * @phba: pointer to lpfc hba data structure.
8a9d2e80 6498 * @sglq_list: pointer to the head of sgl list.
3772a991 6499 *
8a9d2e80 6500 * This routine is invoked to free a give sgl list and memory.
3772a991 6501 **/
8a9d2e80
JS		 6502void
6503lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list)
3772a991 6504{
da0436e9 6505 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8a9d2e80
JS		 6506
6507 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) {
6508 list_del(&sglq_entry->list);
6509 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys);
6510 kfree(sglq_entry);
6511 }
6512}
6513
6514/**
6515 * lpfc_free_els_sgl_list - Free els sgl list.
6516 * @phba: pointer to lpfc hba data structure.
6517 *
6518 * This routine is invoked to free the driver's els sgl list and memory.
6519 **/
6520static void
6521lpfc_free_els_sgl_list(struct lpfc_hba *phba)
6522{
da0436e9 6523 LIST_HEAD(sglq_list);
dea3101e 6524
8a9d2e80 6525 /* Retrieve all els sgls from driver list */
da0436e9 6526 spin_lock_irq(&phba->hbalock);
895427bd
JS		 6527 spin_lock(&phba->sli4_hba.sgl_list_lock);
6528 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list);
6529 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9 6530 spin_unlock_irq(&phba->hbalock);
dea3101e 6531
8a9d2e80
JS		 6532 /* Now free the sgl list */
6533 lpfc_free_sgl_list(phba, &sglq_list);
da0436e9 6534}
92d7f7b0 6535
f358dd0c
JS		 6536/**
6537 * lpfc_free_nvmet_sgl_list - Free nvmet sgl list.
6538 * @phba: pointer to lpfc hba data structure.
6539 *
6540 * This routine is invoked to free the driver's nvmet sgl list and memory.
6541 **/
6542static void
6543lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba)
6544{
6545 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
6546 LIST_HEAD(sglq_list);
6547
6548 /* Retrieve all nvmet sgls from driver list */
6549 spin_lock_irq(&phba->hbalock);
6550 spin_lock(&phba->sli4_hba.sgl_list_lock);
6551 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list);
6552 spin_unlock(&phba->sli4_hba.sgl_list_lock);
6553 spin_unlock_irq(&phba->hbalock);
6554
6555 /* Now free the sgl list */
6556 list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) {
6557 list_del(&sglq_entry->list);
6558 lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys);
6559 kfree(sglq_entry);
6560 }
4b40d02b
DK		 6561
6562 /* Update the nvmet_xri_cnt to reflect no current sgls.
6563 * The next initialization cycle sets the count and allocates
6564 * the sgls over again.
6565 */
6566 phba->sli4_hba.nvmet_xri_cnt = 0;
f358dd0c
JS		 6567}
6568
da0436e9
JS		 6569/**
6570 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs.
6571 * @phba: pointer to lpfc hba data structure.
6572 *
6573 * This routine is invoked to allocate the driver's active sgl memory.
6574 * This array will hold the sglq_entry's for active IOs.
6575 **/
6576static int
6577lpfc_init_active_sgl_array(struct lpfc_hba *phba)
6578{
6579 int size;
6580 size = sizeof(struct lpfc_sglq *);
6581 size *= phba->sli4_hba.max_cfg_param.max_xri;
6582
6583 phba->sli4_hba.lpfc_sglq_active_list =
6584 kzalloc(size, GFP_KERNEL);
6585 if (!phba->sli4_hba.lpfc_sglq_active_list)
6586 return -ENOMEM;
6587 return 0;
3772a991
JS		 6588}
6589
6590/**
da0436e9 6591 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs.
3772a991
JS		 6592 * @phba: pointer to lpfc hba data structure.
6593 *
da0436e9
JS		 6594 * This routine is invoked to walk through the array of active sglq entries
6595 * and free all of the resources.
6596 * This is just a place holder for now.
3772a991
JS		 6597 **/
6598static void
da0436e9 6599lpfc_free_active_sgl(struct lpfc_hba *phba)
3772a991 6600{
da0436e9 6601 kfree(phba->sli4_hba.lpfc_sglq_active_list);
3772a991
JS		 6602}
6603
6604/**
da0436e9 6605 * lpfc_init_sgl_list - Allocate and initialize sgl list.
3772a991
JS		 6606 * @phba: pointer to lpfc hba data structure.
6607 *
da0436e9
JS		 6608 * This routine is invoked to allocate and initizlize the driver's sgl
6609 * list and set up the sgl xritag tag array accordingly.
3772a991 6610 *
3772a991 6611 **/
8a9d2e80 6612static void
da0436e9 6613lpfc_init_sgl_list(struct lpfc_hba *phba)
3772a991 6614{
da0436e9 6615 /* Initialize and populate the sglq list per host/VF. */
895427bd 6616 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list);
da0436e9 6617 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c 6618 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list);
86c67379 6619 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
da0436e9 6620
8a9d2e80
JS		 6621 /* els xri-sgl book keeping */
6622 phba->sli4_hba.els_xri_cnt = 0;
0ff10d46 6623
8a9d2e80 6624 /* scsi xri-buffer book keeping */
da0436e9 6625 phba->sli4_hba.scsi_xri_cnt = 0;
895427bd
JS		 6626
6627 /* nvme xri-buffer book keeping */
6628 phba->sli4_hba.nvme_xri_cnt = 0;
da0436e9
JS		 6629}
6630
6631/**
6632 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port
6633 * @phba: pointer to lpfc hba data structure.
6634 *
6635 * This routine is invoked to post rpi header templates to the
88a2cfbb 6636 * port for those SLI4 ports that do not support extents. This routine
da0436e9 6637 * posts a PAGE_SIZE memory region to the port to hold up to
88a2cfbb
JS		 6638 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine
6639 * and should be called only when interrupts are disabled.
da0436e9
JS		 6640 *
6641 * Return codes
af901ca1 6642 * 0 - successful
88a2cfbb 6643 * -ERROR - otherwise.
da0436e9
JS		 6644 **/
6645int
6646lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba)
6647{
6648 int rc = 0;
da0436e9
JS		 6649 struct lpfc_rpi_hdr *rpi_hdr;
6650
6651 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
ff78d8f9 6652 if (!phba->sli4_hba.rpi_hdrs_in_use)
6d368e53 6653 return rc;
6d368e53
JS		 6654 if (phba->sli4_hba.extents_in_use)
6655 return -EIO;
da0436e9
JS		 6656
6657 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
6658 if (!rpi_hdr) {
6659 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
6660 "0391 Error during rpi post operation\n");
6661 lpfc_sli4_remove_rpis(phba);
6662 rc = -ENODEV;
6663 }
6664
6665 return rc;
6666}
6667
6668/**
6669 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region
6670 * @phba: pointer to lpfc hba data structure.
6671 *
6672 * This routine is invoked to allocate a single 4KB memory region to
6673 * support rpis and stores them in the phba. This single region
6674 * provides support for up to 64 rpis. The region is used globally
6675 * by the device.
6676 *
6677 * Returns:
6678 * A valid rpi hdr on success.
6679 * A NULL pointer on any failure.
6680 **/
6681struct lpfc_rpi_hdr *
6682lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba)
6683{
6684 uint16_t rpi_limit, curr_rpi_range;
6685 struct lpfc_dmabuf *dmabuf;
6686 struct lpfc_rpi_hdr *rpi_hdr;
6687
6d368e53
JS		 6688 /*
6689 * If the SLI4 port supports extents, posting the rpi header isn't
6690 * required. Set the expected maximum count and let the actual value
6691 * get set when extents are fully allocated.
6692 */
6693 if (!phba->sli4_hba.rpi_hdrs_in_use)
6694 return NULL;
6695 if (phba->sli4_hba.extents_in_use)
6696 return NULL;
6697
6698 /* The limit on the logical index is just the max_rpi count. */
845d9e8d 6699 rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi;
da0436e9
JS		 6700
6701 spin_lock_irq(&phba->hbalock);
6d368e53
JS		 6702 /*
6703 * Establish the starting RPI in this header block. The starting
6704 * rpi is normalized to a zero base because the physical rpi is
6705 * port based.
6706 */
97f2ecf1 6707 curr_rpi_range = phba->sli4_hba.next_rpi;
da0436e9
JS		 6708 spin_unlock_irq(&phba->hbalock);
6709
845d9e8d
JS		 6710 /* Reached full RPI range */
6711 if (curr_rpi_range == rpi_limit)
6d368e53 6712 return NULL;
845d9e8d 6713
da0436e9
JS		 6714 /*
6715 * First allocate the protocol header region for the port. The
6716 * port expects a 4KB DMA-mapped memory region that is 4K aligned.
6717 */
6718 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
6719 if (!dmabuf)
6720 return NULL;
6721
1aee383d
JP		 6722 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev,
6723 LPFC_HDR_TEMPLATE_SIZE,
6724 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS		 6725 if (!dmabuf->virt) {
6726 rpi_hdr = NULL;
6727 goto err_free_dmabuf;
6728 }
6729
da0436e9
JS		 6730 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) {
6731 rpi_hdr = NULL;
6732 goto err_free_coherent;
6733 }
6734
6735 /* Save the rpi header data for cleanup later. */
6736 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL);
6737 if (!rpi_hdr)
6738 goto err_free_coherent;
6739
6740 rpi_hdr->dmabuf = dmabuf;
6741 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE;
6742 rpi_hdr->page_count = 1;
6743 spin_lock_irq(&phba->hbalock);
6d368e53
JS		 6744
6745 /* The rpi_hdr stores the logical index only. */
6746 rpi_hdr->start_rpi = curr_rpi_range;
845d9e8d 6747 rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT;
da0436e9
JS		 6748 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
6749
da0436e9
JS		 6750 spin_unlock_irq(&phba->hbalock);
6751 return rpi_hdr;
6752
6753 err_free_coherent:
6754 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE,
6755 dmabuf->virt, dmabuf->phys);
6756 err_free_dmabuf:
6757 kfree(dmabuf);
6758 return NULL;
6759}
6760
6761/**
6762 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions
6763 * @phba: pointer to lpfc hba data structure.
6764 *
6765 * This routine is invoked to remove all memory resources allocated
6d368e53
JS		 6766 * to support rpis for SLI4 ports not supporting extents. This routine
6767 * presumes the caller has released all rpis consumed by fabric or port
6768 * logins and is prepared to have the header pages removed.
da0436e9
JS		 6769 **/
6770void
6771lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba)
6772{
6773 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr;
6774
6d368e53
JS		 6775 if (!phba->sli4_hba.rpi_hdrs_in_use)
6776 goto exit;
6777
da0436e9
JS		 6778 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr,
6779 &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
6780 list_del(&rpi_hdr->list);
6781 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len,
6782 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys);
6783 kfree(rpi_hdr->dmabuf);
6784 kfree(rpi_hdr);
6785 }
6d368e53
JS		 6786 exit:
6787 /* There are no rpis available to the port now. */
6788 phba->sli4_hba.next_rpi = 0;
da0436e9
JS		 6789}
6790
6791/**
6792 * lpfc_hba_alloc - Allocate driver hba data structure for a device.
6793 * @pdev: pointer to pci device data structure.
6794 *
6795 * This routine is invoked to allocate the driver hba data structure for an
6796 * HBA device. If the allocation is successful, the phba reference to the
6797 * PCI device data structure is set.
6798 *
6799 * Return codes
af901ca1 6800 * pointer to @phba - successful
da0436e9
JS		 6801 * NULL - error
6802 **/
6803static struct lpfc_hba *
6804lpfc_hba_alloc(struct pci_dev *pdev)
6805{
6806 struct lpfc_hba *phba;
6807
6808 /* Allocate memory for HBA structure */
6809 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL);
6810 if (!phba) {
e34ccdfe 6811 dev_err(&pdev->dev, "failed to allocate hba struct\n");
da0436e9
JS		 6812 return NULL;
6813 }
6814
6815 /* Set reference to PCI device in HBA structure */
6816 phba->pcidev = pdev;
6817
6818 /* Assign an unused board number */
6819 phba->brd_no = lpfc_get_instance();
6820 if (phba->brd_no < 0) {
6821 kfree(phba);
6822 return NULL;
6823 }
65791f1f 6824 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL;
da0436e9 6825
4fede78f 6826 spin_lock_init(&phba->ct_ev_lock);
f1c3b0fc
JS		 6827 INIT_LIST_HEAD(&phba->ct_ev_waiters);
6828
da0436e9
JS		 6829 return phba;
6830}
6831
6832/**
6833 * lpfc_hba_free - Free driver hba data structure with a device.
6834 * @phba: pointer to lpfc hba data structure.
6835 *
6836 * This routine is invoked to free the driver hba data structure with an
6837 * HBA device.
6838 **/
6839static void
6840lpfc_hba_free(struct lpfc_hba *phba)
6841{
6842 /* Release the driver assigned board number */
6843 idr_remove(&lpfc_hba_index, phba->brd_no);
6844
895427bd
JS		 6845 /* Free memory allocated with sli3 rings */
6846 kfree(phba->sli.sli3_ring);
6847 phba->sli.sli3_ring = NULL;
2a76a283 6848
da0436e9
JS		 6849 kfree(phba);
6850 return;
6851}
6852
6853/**
6854 * lpfc_create_shost - Create hba physical port with associated scsi host.
6855 * @phba: pointer to lpfc hba data structure.
6856 *
6857 * This routine is invoked to create HBA physical port and associate a SCSI
6858 * host with it.
6859 *
6860 * Return codes
af901ca1 6861 * 0 - successful
da0436e9
JS		 6862 * other values - error
6863 **/
6864static int
6865lpfc_create_shost(struct lpfc_hba *phba)
6866{
6867 struct lpfc_vport *vport;
6868 struct Scsi_Host *shost;
6869
6870 /* Initialize HBA FC structure */
6871 phba->fc_edtov = FF_DEF_EDTOV;
6872 phba->fc_ratov = FF_DEF_RATOV;
6873 phba->fc_altov = FF_DEF_ALTOV;
6874 phba->fc_arbtov = FF_DEF_ARBTOV;
6875
d7c47992 6876 atomic_set(&phba->sdev_cnt, 0);
2cee7808
JS		 6877 atomic_set(&phba->fc4ScsiInputRequests, 0);
6878 atomic_set(&phba->fc4ScsiOutputRequests, 0);
6879 atomic_set(&phba->fc4ScsiControlRequests, 0);
6880 atomic_set(&phba->fc4ScsiIoCmpls, 0);
6881 atomic_set(&phba->fc4NvmeInputRequests, 0);
6882 atomic_set(&phba->fc4NvmeOutputRequests, 0);
6883 atomic_set(&phba->fc4NvmeControlRequests, 0);
6884 atomic_set(&phba->fc4NvmeIoCmpls, 0);
6885 atomic_set(&phba->fc4NvmeLsRequests, 0);
6886 atomic_set(&phba->fc4NvmeLsCmpls, 0);
da0436e9
JS		 6887 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev);
6888 if (!vport)
6889 return -ENODEV;
6890
6891 shost = lpfc_shost_from_vport(vport);
6892 phba->pport = vport;
2ea259ee 6893
f358dd0c
JS		 6894 if (phba->nvmet_support) {
6895 /* Only 1 vport (pport) will support NVME target */
6896 if (phba->txrdy_payload_pool == NULL) {
771db5c0
RP		 6897 phba->txrdy_payload_pool = dma_pool_create(
6898 "txrdy_pool", &phba->pcidev->dev,
f358dd0c
JS		 6899 TXRDY_PAYLOAD_LEN, 16, 0);
6900 if (phba->txrdy_payload_pool) {
6901 phba->targetport = NULL;
6902 phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME;
6903 lpfc_printf_log(phba, KERN_INFO,
6904 LOG_INIT | LOG_NVME_DISC,
6905 "6076 NVME Target Found\n");
6906 }
6907 }
6908 }
6909
da0436e9
JS		 6910 lpfc_debugfs_initialize(vport);
6911 /* Put reference to SCSI host to driver's device private data */
6912 pci_set_drvdata(phba->pcidev, shost);
2e0fef85 6913
4258e98e
JS		 6914 /*
6915 * At this point we are fully registered with PSA. In addition,
6916 * any initial discovery should be completed.
6917 */
6918 vport->load_flag |= FC_ALLOW_FDMI;
8663cbbe
JS		 6919 if (phba->cfg_enable_SmartSAN ||
6920 (phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT)) {
4258e98e
JS		 6921
6922 /* Setup appropriate attribute masks */
6923 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR;
8663cbbe 6924 if (phba->cfg_enable_SmartSAN)
4258e98e
JS		 6925 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR;
6926 else
6927 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR;
6928 }
3772a991
JS		 6929 return 0;
6930}
db2378e0 6931
3772a991
JS		 6932/**
6933 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host.
6934 * @phba: pointer to lpfc hba data structure.
6935 *
6936 * This routine is invoked to destroy HBA physical port and the associated
6937 * SCSI host.
6938 **/
6939static void
6940lpfc_destroy_shost(struct lpfc_hba *phba)
6941{
6942 struct lpfc_vport *vport = phba->pport;
6943
6944 /* Destroy physical port that associated with the SCSI host */
6945 destroy_port(vport);
6946
6947 return;
6948}
6949
6950/**
6951 * lpfc_setup_bg - Setup Block guard structures and debug areas.
6952 * @phba: pointer to lpfc hba data structure.
6953 * @shost: the shost to be used to detect Block guard settings.
6954 *
6955 * This routine sets up the local Block guard protocol settings for @shost.
6956 * This routine also allocates memory for debugging bg buffers.
6957 **/
6958static void
6959lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost)
6960{
bbeb79b9
JS		 6961 uint32_t old_mask;
6962 uint32_t old_guard;
6963
3772a991 6964 int pagecnt = 10;
b3b98b74 6965 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
3772a991
JS		 6966 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
6967 "1478 Registering BlockGuard with the "
6968 "SCSI layer\n");
bbeb79b9 6969
b3b98b74
JS		 6970 old_mask = phba->cfg_prot_mask;
6971 old_guard = phba->cfg_prot_guard;
bbeb79b9
JS		 6972
6973 /* Only allow supported values */
b3b98b74 6974 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION |
bbeb79b9
JS		 6975 SHOST_DIX_TYPE0_PROTECTION |
6976 SHOST_DIX_TYPE1_PROTECTION);
b3b98b74
JS		 6977 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP |
6978 SHOST_DIX_GUARD_CRC);
bbeb79b9
JS		 6979
6980 /* DIF Type 1 protection for profiles AST1/C1 is end to end */
b3b98b74
JS		 6981 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION)
6982 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION;
bbeb79b9 6983
b3b98b74
JS		 6984 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
6985 if ((old_mask != phba->cfg_prot_mask) ||
6986 (old_guard != phba->cfg_prot_guard))
bbeb79b9
JS		 6987 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6988 "1475 Registering BlockGuard with the "
6989 "SCSI layer: mask %d guard %d\n",
b3b98b74
JS		 6990 phba->cfg_prot_mask,
6991 phba->cfg_prot_guard);
bbeb79b9 6992
b3b98b74
JS		 6993 scsi_host_set_prot(shost, phba->cfg_prot_mask);
6994 scsi_host_set_guard(shost, phba->cfg_prot_guard);
bbeb79b9
JS		 6995 } else
6996 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6997 "1479 Not Registering BlockGuard with the SCSI "
6998 "layer, Bad protection parameters: %d %d\n",
6999 old_mask, old_guard);
3772a991 7000 }
bbeb79b9 7001
3772a991
JS		 7002 if (!_dump_buf_data) {
7003 while (pagecnt) {
7004 spin_lock_init(&_dump_buf_lock);
7005 _dump_buf_data =
7006 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
7007 if (_dump_buf_data) {
6a9c52cf
JS		 7008 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7009 "9043 BLKGRD: allocated %d pages for "
3772a991
JS		 7010 "_dump_buf_data at 0x%p\n",
7011 (1 << pagecnt), _dump_buf_data);
7012 _dump_buf_data_order = pagecnt;
7013 memset(_dump_buf_data, 0,
7014 ((1 << PAGE_SHIFT) << pagecnt));
7015 break;
7016 } else
7017 --pagecnt;
7018 }
7019 if (!_dump_buf_data_order)
6a9c52cf
JS		 7020 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7021 "9044 BLKGRD: ERROR unable to allocate "
3772a991
JS		 7022 "memory for hexdump\n");
7023 } else
6a9c52cf
JS		 7024 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7025 "9045 BLKGRD: already allocated _dump_buf_data=0x%p"
3772a991
JS		 7026 "\n", _dump_buf_data);
7027 if (!_dump_buf_dif) {
7028 while (pagecnt) {
7029 _dump_buf_dif =
7030 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
7031 if (_dump_buf_dif) {
6a9c52cf
JS		 7032 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7033 "9046 BLKGRD: allocated %d pages for "
3772a991
JS		 7034 "_dump_buf_dif at 0x%p\n",
7035 (1 << pagecnt), _dump_buf_dif);
7036 _dump_buf_dif_order = pagecnt;
7037 memset(_dump_buf_dif, 0,
7038 ((1 << PAGE_SHIFT) << pagecnt));
7039 break;
7040 } else
7041 --pagecnt;
7042 }
7043 if (!_dump_buf_dif_order)
6a9c52cf
JS		 7044 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7045 "9047 BLKGRD: ERROR unable to allocate "
3772a991
JS		 7046 "memory for hexdump\n");
7047 } else
6a9c52cf
JS		 7048 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7049 "9048 BLKGRD: already allocated _dump_buf_dif=0x%p\n",
3772a991
JS		 7050 _dump_buf_dif);
7051}
7052
7053/**
7054 * lpfc_post_init_setup - Perform necessary device post initialization setup.
7055 * @phba: pointer to lpfc hba data structure.
7056 *
7057 * This routine is invoked to perform all the necessary post initialization
7058 * setup for the device.
7059 **/
7060static void
7061lpfc_post_init_setup(struct lpfc_hba *phba)
7062{
7063 struct Scsi_Host *shost;
7064 struct lpfc_adapter_event_header adapter_event;
7065
7066 /* Get the default values for Model Name and Description */
7067 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
7068
7069 /*
7070 * hba setup may have changed the hba_queue_depth so we need to
7071 * adjust the value of can_queue.
7072 */
7073 shost = pci_get_drvdata(phba->pcidev);
7074 shost->can_queue = phba->cfg_hba_queue_depth - 10;
7075 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED)
7076 lpfc_setup_bg(phba, shost);
7077
7078 lpfc_host_attrib_init(shost);
7079
7080 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
7081 spin_lock_irq(shost->host_lock);
7082 lpfc_poll_start_timer(phba);
7083 spin_unlock_irq(shost->host_lock);
7084 }
7085
7086 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7087 "0428 Perform SCSI scan\n");
7088 /* Send board arrival event to upper layer */
7089 adapter_event.event_type = FC_REG_ADAPTER_EVENT;
7090 adapter_event.subcategory = LPFC_EVENT_ARRIVAL;
7091 fc_host_post_vendor_event(shost, fc_get_event_number(),
7092 sizeof(adapter_event),
7093 (char *) &adapter_event,
7094 LPFC_NL_VENDOR_ID);
7095 return;
7096}
7097
7098/**
7099 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space.
7100 * @phba: pointer to lpfc hba data structure.
7101 *
7102 * This routine is invoked to set up the PCI device memory space for device
7103 * with SLI-3 interface spec.
7104 *
7105 * Return codes
af901ca1 7106 * 0 - successful
3772a991
JS		 7107 * other values - error
7108 **/
7109static int
7110lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
7111{
7112 struct pci_dev *pdev;
7113 unsigned long bar0map_len, bar2map_len;
7114 int i, hbq_count;
7115 void *ptr;
7116 int error = -ENODEV;
7117
7118 /* Obtain PCI device reference */
7119 if (!phba->pcidev)
7120 return error;
7121 else
7122 pdev = phba->pcidev;
7123
7124 /* Set the device DMA mask size */
8e68597d
MR		 7125 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
7126 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
7127 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
7128 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
3772a991 7129 return error;
8e68597d
MR		 7130 }
7131 }
3772a991
JS		 7132
7133 /* Get the bus address of Bar0 and Bar2 and the number of bytes
7134 * required by each mapping.
7135 */
7136 phba->pci_bar0_map = pci_resource_start(pdev, 0);
7137 bar0map_len = pci_resource_len(pdev, 0);
7138
7139 phba->pci_bar2_map = pci_resource_start(pdev, 2);
7140 bar2map_len = pci_resource_len(pdev, 2);
7141
7142 /* Map HBA SLIM to a kernel virtual address. */
7143 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
7144 if (!phba->slim_memmap_p) {
7145 dev_printk(KERN_ERR, &pdev->dev,
7146 "ioremap failed for SLIM memory.\n");
7147 goto out;
7148 }
7149
7150 /* Map HBA Control Registers to a kernel virtual address. */
7151 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
7152 if (!phba->ctrl_regs_memmap_p) {
7153 dev_printk(KERN_ERR, &pdev->dev,
7154 "ioremap failed for HBA control registers.\n");
7155 goto out_iounmap_slim;
7156 }
7157
7158 /* Allocate memory for SLI-2 structures */
1aee383d
JP		 7159 phba->slim2p.virt = dma_zalloc_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7160 &phba->slim2p.phys, GFP_KERNEL);
3772a991
JS		 7161 if (!phba->slim2p.virt)
7162 goto out_iounmap;
7163
3772a991 7164 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx);
7a470277
JS		 7165 phba->mbox_ext = (phba->slim2p.virt +
7166 offsetof(struct lpfc_sli2_slim, mbx_ext_words));
3772a991
JS		 7167 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb));
7168 phba->IOCBs = (phba->slim2p.virt +
7169 offsetof(struct lpfc_sli2_slim, IOCBs));
7170
7171 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev,
7172 lpfc_sli_hbq_size(),
7173 &phba->hbqslimp.phys,
7174 GFP_KERNEL);
7175 if (!phba->hbqslimp.virt)
7176 goto out_free_slim;
7177
7178 hbq_count = lpfc_sli_hbq_count();
7179 ptr = phba->hbqslimp.virt;
7180 for (i = 0; i < hbq_count; ++i) {
7181 phba->hbqs[i].hbq_virt = ptr;
7182 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list);
7183 ptr += (lpfc_hbq_defs[i]->entry_count *
7184 sizeof(struct lpfc_hbq_entry));
7185 }
7186 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc;
7187 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free;
7188
7189 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size());
7190
3772a991
JS		 7191 phba->MBslimaddr = phba->slim_memmap_p;
7192 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
7193 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
7194 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
7195 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
7196
7197 return 0;
7198
7199out_free_slim:
7200 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7201 phba->slim2p.virt, phba->slim2p.phys);
7202out_iounmap:
7203 iounmap(phba->ctrl_regs_memmap_p);
7204out_iounmap_slim:
7205 iounmap(phba->slim_memmap_p);
7206out:
7207 return error;
7208}
7209
7210/**
7211 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space.
7212 * @phba: pointer to lpfc hba data structure.
7213 *
7214 * This routine is invoked to unset the PCI device memory space for device
7215 * with SLI-3 interface spec.
7216 **/
7217static void
7218lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
7219{
7220 struct pci_dev *pdev;
7221
7222 /* Obtain PCI device reference */
7223 if (!phba->pcidev)
7224 return;
7225 else
7226 pdev = phba->pcidev;
7227
7228 /* Free coherent DMA memory allocated */
7229 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
7230 phba->hbqslimp.virt, phba->hbqslimp.phys);
7231 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7232 phba->slim2p.virt, phba->slim2p.phys);
7233
7234 /* I/O memory unmap */
7235 iounmap(phba->ctrl_regs_memmap_p);
7236 iounmap(phba->slim_memmap_p);
7237
7238 return;
7239}
7240
7241/**
da0436e9 7242 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status
3772a991
JS		 7243 * @phba: pointer to lpfc hba data structure.
7244 *
da0436e9
JS		 7245 * This routine is invoked to wait for SLI4 device Power On Self Test (POST)
7246 * done and check status.
3772a991 7247 *
da0436e9 7248 * Return 0 if successful, otherwise -ENODEV.
3772a991 7249 **/
da0436e9
JS		 7250int
7251lpfc_sli4_post_status_check(struct lpfc_hba *phba)
3772a991 7252{
2fcee4bf
JS		 7253 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg;
7254 struct lpfc_register reg_data;
7255 int i, port_error = 0;
7256 uint32_t if_type;
3772a991 7257
9940b97b
JS		 7258 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
7259 memset(&reg_data, 0, sizeof(reg_data));
2fcee4bf 7260 if (!phba->sli4_hba.PSMPHRregaddr)
da0436e9 7261 return -ENODEV;
3772a991 7262
da0436e9
JS		 7263 /* Wait up to 30 seconds for the SLI Port POST done and ready */
7264 for (i = 0; i < 3000; i++) {
9940b97b
JS		 7265 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
7266 &portsmphr_reg.word0) ||
7267 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) {
2fcee4bf 7268 /* Port has a fatal POST error, break out */
da0436e9
JS		 7269 port_error = -ENODEV;
7270 break;
7271 }
2fcee4bf
JS		 7272 if (LPFC_POST_STAGE_PORT_READY ==
7273 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))
da0436e9 7274 break;
da0436e9 7275 msleep(10);
3772a991
JS		 7276 }
7277
2fcee4bf
JS		 7278 /*
7279 * If there was a port error during POST, then don't proceed with
7280 * other register reads as the data may not be valid. Just exit.
7281 */
7282 if (port_error) {
da0436e9 7283 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2fcee4bf
JS		 7284 "1408 Port Failed POST - portsmphr=0x%x, "
7285 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, "
7286 "scr2=x%x, hscratch=x%x, pstatus=x%x\n",
7287 portsmphr_reg.word0,
7288 bf_get(lpfc_port_smphr_perr, &portsmphr_reg),
7289 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg),
7290 bf_get(lpfc_port_smphr_nip, &portsmphr_reg),
7291 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg),
7292 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg),
7293 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg),
7294 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg),
7295 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg));
7296 } else {
28baac74 7297 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
2fcee4bf
JS		 7298 "2534 Device Info: SLIFamily=0x%x, "
7299 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, "
7300 "SLIHint_2=0x%x, FT=0x%x\n",
28baac74
JS		 7301 bf_get(lpfc_sli_intf_sli_family,
7302 &phba->sli4_hba.sli_intf),
7303 bf_get(lpfc_sli_intf_slirev,
7304 &phba->sli4_hba.sli_intf),
085c647c
JS		 7305 bf_get(lpfc_sli_intf_if_type,
7306 &phba->sli4_hba.sli_intf),
7307 bf_get(lpfc_sli_intf_sli_hint1,
28baac74 7308 &phba->sli4_hba.sli_intf),
085c647c
JS		 7309 bf_get(lpfc_sli_intf_sli_hint2,
7310 &phba->sli4_hba.sli_intf),
7311 bf_get(lpfc_sli_intf_func_type,
28baac74 7312 &phba->sli4_hba.sli_intf));
2fcee4bf
JS		 7313 /*
7314 * Check for other Port errors during the initialization
7315 * process. Fail the load if the port did not come up
7316 * correctly.
7317 */
7318 if_type = bf_get(lpfc_sli_intf_if_type,
7319 &phba->sli4_hba.sli_intf);
7320 switch (if_type) {
7321 case LPFC_SLI_INTF_IF_TYPE_0:
7322 phba->sli4_hba.ue_mask_lo =
7323 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
7324 phba->sli4_hba.ue_mask_hi =
7325 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
7326 uerrlo_reg.word0 =
7327 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
7328 uerrhi_reg.word0 =
7329 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
7330 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
7331 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
7332 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7333 "1422 Unrecoverable Error "
7334 "Detected during POST "
7335 "uerr_lo_reg=0x%x, "
7336 "uerr_hi_reg=0x%x, "
7337 "ue_mask_lo_reg=0x%x, "
7338 "ue_mask_hi_reg=0x%x\n",
7339 uerrlo_reg.word0,
7340 uerrhi_reg.word0,
7341 phba->sli4_hba.ue_mask_lo,
7342 phba->sli4_hba.ue_mask_hi);
7343 port_error = -ENODEV;
7344 }
7345 break;
7346 case LPFC_SLI_INTF_IF_TYPE_2:
7347 /* Final checks. The port status should be clean. */
9940b97b
JS		 7348 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
7349 &reg_data.word0) ||
0558056c
JS		 7350 (bf_get(lpfc_sliport_status_err, &reg_data) &&
7351 !bf_get(lpfc_sliport_status_rn, &reg_data))) {
2fcee4bf
JS		 7352 phba->work_status[0] =
7353 readl(phba->sli4_hba.u.if_type2.
7354 ERR1regaddr);
7355 phba->work_status[1] =
7356 readl(phba->sli4_hba.u.if_type2.
7357 ERR2regaddr);
7358 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8fcb8acd
JS		 7359 "2888 Unrecoverable port error "
7360 "following POST: port status reg "
7361 "0x%x, port_smphr reg 0x%x, "
2fcee4bf
JS		 7362 "error 1=0x%x, error 2=0x%x\n",
7363 reg_data.word0,
7364 portsmphr_reg.word0,
7365 phba->work_status[0],
7366 phba->work_status[1]);
7367 port_error = -ENODEV;
7368 }
7369 break;
7370 case LPFC_SLI_INTF_IF_TYPE_1:
7371 default:
7372 break;
7373 }
28baac74 7374 }
da0436e9
JS		 7375 return port_error;
7376}
3772a991 7377
da0436e9
JS		 7378/**
7379 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map.
7380 * @phba: pointer to lpfc hba data structure.
2fcee4bf 7381 * @if_type: The SLI4 interface type getting configured.
da0436e9
JS		 7382 *
7383 * This routine is invoked to set up SLI4 BAR0 PCI config space register
7384 * memory map.
7385 **/
7386static void
2fcee4bf
JS		 7387lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
7388{
7389 switch (if_type) {
7390 case LPFC_SLI_INTF_IF_TYPE_0:
7391 phba->sli4_hba.u.if_type0.UERRLOregaddr =
7392 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
7393 phba->sli4_hba.u.if_type0.UERRHIregaddr =
7394 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
7395 phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
7396 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
7397 phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
7398 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
7399 phba->sli4_hba.SLIINTFregaddr =
7400 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7401 break;
7402 case LPFC_SLI_INTF_IF_TYPE_2:
0cf07f84
JS		 7403 phba->sli4_hba.u.if_type2.EQDregaddr =
7404 phba->sli4_hba.conf_regs_memmap_p +
7405 LPFC_CTL_PORT_EQ_DELAY_OFFSET;
2fcee4bf 7406 phba->sli4_hba.u.if_type2.ERR1regaddr =
88a2cfbb
JS		 7407 phba->sli4_hba.conf_regs_memmap_p +
7408 LPFC_CTL_PORT_ER1_OFFSET;
2fcee4bf 7409 phba->sli4_hba.u.if_type2.ERR2regaddr =
88a2cfbb
JS		 7410 phba->sli4_hba.conf_regs_memmap_p +
7411 LPFC_CTL_PORT_ER2_OFFSET;
2fcee4bf 7412 phba->sli4_hba.u.if_type2.CTRLregaddr =
88a2cfbb
JS		 7413 phba->sli4_hba.conf_regs_memmap_p +
7414 LPFC_CTL_PORT_CTL_OFFSET;
2fcee4bf 7415 phba->sli4_hba.u.if_type2.STATUSregaddr =
88a2cfbb
JS		 7416 phba->sli4_hba.conf_regs_memmap_p +
7417 LPFC_CTL_PORT_STA_OFFSET;
2fcee4bf
JS		 7418 phba->sli4_hba.SLIINTFregaddr =
7419 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7420 phba->sli4_hba.PSMPHRregaddr =
88a2cfbb
JS		 7421 phba->sli4_hba.conf_regs_memmap_p +
7422 LPFC_CTL_PORT_SEM_OFFSET;
2fcee4bf 7423 phba->sli4_hba.RQDBregaddr =
962bc51b
JS		 7424 phba->sli4_hba.conf_regs_memmap_p +
7425 LPFC_ULP0_RQ_DOORBELL;
2fcee4bf 7426 phba->sli4_hba.WQDBregaddr =
962bc51b
JS		 7427 phba->sli4_hba.conf_regs_memmap_p +
7428 LPFC_ULP0_WQ_DOORBELL;
2fcee4bf
JS		 7429 phba->sli4_hba.EQCQDBregaddr =
7430 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
7431 phba->sli4_hba.MQDBregaddr =
7432 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
7433 phba->sli4_hba.BMBXregaddr =
7434 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
7435 break;
7436 case LPFC_SLI_INTF_IF_TYPE_1:
7437 default:
7438 dev_printk(KERN_ERR, &phba->pcidev->dev,
7439 "FATAL - unsupported SLI4 interface type - %d\n",
7440 if_type);
7441 break;
7442 }
da0436e9 7443}
3772a991 7444
da0436e9
JS		 7445/**
7446 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map.
7447 * @phba: pointer to lpfc hba data structure.
7448 *
7449 * This routine is invoked to set up SLI4 BAR1 control status register (CSR)
7450 * memory map.
7451 **/
7452static void
7453lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba)
7454{
2fcee4bf
JS		 7455 phba->sli4_hba.PSMPHRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
7456 LPFC_SLIPORT_IF0_SMPHR;
da0436e9 7457 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7458 LPFC_HST_ISR0;
da0436e9 7459 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7460 LPFC_HST_IMR0;
da0436e9 7461 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7462 LPFC_HST_ISCR0;
3772a991
JS		 7463}
7464
7465/**
da0436e9 7466 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map.
3772a991 7467 * @phba: pointer to lpfc hba data structure.
da0436e9 7468 * @vf: virtual function number
3772a991 7469 *
da0436e9
JS		 7470 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map
7471 * based on the given viftual function number, @vf.
7472 *
7473 * Return 0 if successful, otherwise -ENODEV.
3772a991 7474 **/
da0436e9
JS		 7475static int
7476lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf)
3772a991 7477{
da0436e9
JS		 7478 if (vf > LPFC_VIR_FUNC_MAX)
7479 return -ENODEV;
3772a991 7480
da0436e9 7481 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS		 7482 vf * LPFC_VFR_PAGE_SIZE +
7483 LPFC_ULP0_RQ_DOORBELL);
da0436e9 7484 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS		 7485 vf * LPFC_VFR_PAGE_SIZE +
7486 LPFC_ULP0_WQ_DOORBELL);
da0436e9
JS		 7487 phba->sli4_hba.EQCQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7488 vf * LPFC_VFR_PAGE_SIZE + LPFC_EQCQ_DOORBELL);
7489 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7490 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL);
7491 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7492 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX);
7493 return 0;
3772a991
JS		 7494}
7495
7496/**
da0436e9 7497 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox
3772a991
JS		 7498 * @phba: pointer to lpfc hba data structure.
7499 *
da0436e9
JS		 7500 * This routine is invoked to create the bootstrap mailbox
7501 * region consistent with the SLI-4 interface spec. This
7502 * routine allocates all memory necessary to communicate
7503 * mailbox commands to the port and sets up all alignment
7504 * needs. No locks are expected to be held when calling
7505 * this routine.
3772a991
JS		 7506 *
7507 * Return codes
af901ca1 7508 * 0 - successful
d439d286 7509 * -ENOMEM - could not allocated memory.
da0436e9 7510 **/
3772a991 7511static int
da0436e9 7512lpfc_create_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7513{
da0436e9
JS		 7514 uint32_t bmbx_size;
7515 struct lpfc_dmabuf *dmabuf;
7516 struct dma_address *dma_address;
7517 uint32_t pa_addr;
7518 uint64_t phys_addr;
7519
7520 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
7521 if (!dmabuf)
7522 return -ENOMEM;
3772a991 7523
da0436e9
JS		 7524 /*
7525 * The bootstrap mailbox region is comprised of 2 parts
7526 * plus an alignment restriction of 16 bytes.
7527 */
7528 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1);
1aee383d
JP		 7529 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev, bmbx_size,
7530 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS		 7531 if (!dmabuf->virt) {
7532 kfree(dmabuf);
7533 return -ENOMEM;
3772a991
JS		 7534 }
7535
da0436e9
JS		 7536 /*
7537 * Initialize the bootstrap mailbox pointers now so that the register
7538 * operations are simple later. The mailbox dma address is required
7539 * to be 16-byte aligned. Also align the virtual memory as each
7540 * maibox is copied into the bmbx mailbox region before issuing the
7541 * command to the port.
7542 */
7543 phba->sli4_hba.bmbx.dmabuf = dmabuf;
7544 phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
7545
7546 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
7547 LPFC_ALIGN_16_BYTE);
7548 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
7549 LPFC_ALIGN_16_BYTE);
7550
7551 /*
7552 * Set the high and low physical addresses now. The SLI4 alignment
7553 * requirement is 16 bytes and the mailbox is posted to the port
7554 * as two 30-bit addresses. The other data is a bit marking whether
7555 * the 30-bit address is the high or low address.
7556 * Upcast bmbx aphys to 64bits so shift instruction compiles
7557 * clean on 32 bit machines.
7558 */
7559 dma_address = &phba->sli4_hba.bmbx.dma_address;
7560 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
7561 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff);
7562 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) |
7563 LPFC_BMBX_BIT1_ADDR_HI);
7564
7565 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
7566 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) |
7567 LPFC_BMBX_BIT1_ADDR_LO);
7568 return 0;
3772a991
JS		 7569}
7570
7571/**
da0436e9 7572 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources
3772a991
JS		 7573 * @phba: pointer to lpfc hba data structure.
7574 *
da0436e9
JS		 7575 * This routine is invoked to teardown the bootstrap mailbox
7576 * region and release all host resources. This routine requires
7577 * the caller to ensure all mailbox commands recovered, no
7578 * additional mailbox comands are sent, and interrupts are disabled
7579 * before calling this routine.
7580 *
7581 **/
3772a991 7582static void
da0436e9 7583lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7584{
da0436e9
JS		 7585 dma_free_coherent(&phba->pcidev->dev,
7586 phba->sli4_hba.bmbx.bmbx_size,
7587 phba->sli4_hba.bmbx.dmabuf->virt,
7588 phba->sli4_hba.bmbx.dmabuf->phys);
7589
7590 kfree(phba->sli4_hba.bmbx.dmabuf);
7591 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
3772a991
JS		 7592}
7593
7594/**
da0436e9 7595 * lpfc_sli4_read_config - Get the config parameters.
3772a991
JS		 7596 * @phba: pointer to lpfc hba data structure.
7597 *
da0436e9
JS		 7598 * This routine is invoked to read the configuration parameters from the HBA.
7599 * The configuration parameters are used to set the base and maximum values
7600 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource
7601 * allocation for the port.
3772a991
JS		 7602 *
7603 * Return codes
af901ca1 7604 * 0 - successful
25985edc 7605 * -ENOMEM - No available memory
d439d286 7606 * -EIO - The mailbox failed to complete successfully.
3772a991 7607 **/
ff78d8f9 7608int
da0436e9 7609lpfc_sli4_read_config(struct lpfc_hba *phba)
3772a991 7610{
da0436e9
JS		 7611 LPFC_MBOXQ_t *pmb;
7612 struct lpfc_mbx_read_config *rd_config;
912e3acd
JS		 7613 union lpfc_sli4_cfg_shdr *shdr;
7614 uint32_t shdr_status, shdr_add_status;
7615 struct lpfc_mbx_get_func_cfg *get_func_cfg;
7616 struct lpfc_rsrc_desc_fcfcoe *desc;
8aa134a8 7617 char *pdesc_0;
c691816e
JS		 7618 uint16_t forced_link_speed;
7619 uint32_t if_type;
8aa134a8 7620 int length, i, rc = 0, rc2;
3772a991 7621
da0436e9
JS		 7622 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
7623 if (!pmb) {
7624 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7625 "2011 Unable to allocate memory for issuing "
7626 "SLI_CONFIG_SPECIAL mailbox command\n");
7627 return -ENOMEM;
3772a991
JS		 7628 }
7629
da0436e9 7630 lpfc_read_config(phba, pmb);
3772a991 7631
da0436e9
JS		 7632 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
7633 if (rc != MBX_SUCCESS) {
7634 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7635 "2012 Mailbox failed , mbxCmd x%x "
7636 "READ_CONFIG, mbxStatus x%x\n",
7637 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7638 bf_get(lpfc_mqe_status, &pmb->u.mqe));
7639 rc = -EIO;
7640 } else {
7641 rd_config = &pmb->u.mqe.un.rd_config;
ff78d8f9
JS		 7642 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) {
7643 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
7644 phba->sli4_hba.lnk_info.lnk_tp =
7645 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config);
7646 phba->sli4_hba.lnk_info.lnk_no =
7647 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config);
7648 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7649 "3081 lnk_type:%d, lnk_numb:%d\n",
7650 phba->sli4_hba.lnk_info.lnk_tp,
7651 phba->sli4_hba.lnk_info.lnk_no);
7652 } else
7653 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
7654 "3082 Mailbox (x%x) returned ldv:x0\n",
7655 bf_get(lpfc_mqe_command, &pmb->u.mqe));
44fd7fe3
JS		 7656 if (bf_get(lpfc_mbx_rd_conf_bbscn_def, rd_config)) {
7657 phba->bbcredit_support = 1;
7658 phba->sli4_hba.bbscn_params.word0 = rd_config->word8;
7659 }
7660
6d368e53
JS		 7661 phba->sli4_hba.extents_in_use =
7662 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config);
da0436e9
JS		 7663 phba->sli4_hba.max_cfg_param.max_xri =
7664 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config);
7665 phba->sli4_hba.max_cfg_param.xri_base =
7666 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config);
7667 phba->sli4_hba.max_cfg_param.max_vpi =
7668 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config);
7669 phba->sli4_hba.max_cfg_param.vpi_base =
7670 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config);
7671 phba->sli4_hba.max_cfg_param.max_rpi =
7672 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config);
7673 phba->sli4_hba.max_cfg_param.rpi_base =
7674 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config);
7675 phba->sli4_hba.max_cfg_param.max_vfi =
7676 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config);
7677 phba->sli4_hba.max_cfg_param.vfi_base =
7678 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config);
7679 phba->sli4_hba.max_cfg_param.max_fcfi =
7680 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config);
da0436e9
JS		 7681 phba->sli4_hba.max_cfg_param.max_eq =
7682 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config);
7683 phba->sli4_hba.max_cfg_param.max_rq =
7684 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config);
7685 phba->sli4_hba.max_cfg_param.max_wq =
7686 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config);
7687 phba->sli4_hba.max_cfg_param.max_cq =
7688 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config);
7689 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config);
7690 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
7691 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
7692 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
5ffc266e
JS		 7693 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
7694 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
da0436e9
JS		 7695 phba->max_vports = phba->max_vpi;
7696 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6d368e53
JS		 7697 "2003 cfg params Extents? %d "
7698 "XRI(B:%d M:%d), "
da0436e9
JS		 7699 "VPI(B:%d M:%d) "
7700 "VFI(B:%d M:%d) "
7701 "RPI(B:%d M:%d) "
2ea259ee 7702 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d\n",
6d368e53 7703 phba->sli4_hba.extents_in_use,
da0436e9
JS		 7704 phba->sli4_hba.max_cfg_param.xri_base,
7705 phba->sli4_hba.max_cfg_param.max_xri,
7706 phba->sli4_hba.max_cfg_param.vpi_base,
7707 phba->sli4_hba.max_cfg_param.max_vpi,
7708 phba->sli4_hba.max_cfg_param.vfi_base,
7709 phba->sli4_hba.max_cfg_param.max_vfi,
7710 phba->sli4_hba.max_cfg_param.rpi_base,
7711 phba->sli4_hba.max_cfg_param.max_rpi,
2ea259ee
JS		 7712 phba->sli4_hba.max_cfg_param.max_fcfi,
7713 phba->sli4_hba.max_cfg_param.max_eq,
7714 phba->sli4_hba.max_cfg_param.max_cq,
7715 phba->sli4_hba.max_cfg_param.max_wq,
7716 phba->sli4_hba.max_cfg_param.max_rq);
7717
3772a991 7718 }
912e3acd
JS		 7719
7720 if (rc)
7721 goto read_cfg_out;
da0436e9 7722
c691816e
JS		 7723 /* Update link speed if forced link speed is supported */
7724 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7725 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
7726 forced_link_speed =
7727 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config);
7728 if (forced_link_speed) {
7729 phba->hba_flag |= HBA_FORCED_LINK_SPEED;
7730
7731 switch (forced_link_speed) {
7732 case LINK_SPEED_1G:
7733 phba->cfg_link_speed =
7734 LPFC_USER_LINK_SPEED_1G;
7735 break;
7736 case LINK_SPEED_2G:
7737 phba->cfg_link_speed =
7738 LPFC_USER_LINK_SPEED_2G;
7739 break;
7740 case LINK_SPEED_4G:
7741 phba->cfg_link_speed =
7742 LPFC_USER_LINK_SPEED_4G;
7743 break;
7744 case LINK_SPEED_8G:
7745 phba->cfg_link_speed =
7746 LPFC_USER_LINK_SPEED_8G;
7747 break;
7748 case LINK_SPEED_10G:
7749 phba->cfg_link_speed =
7750 LPFC_USER_LINK_SPEED_10G;
7751 break;
7752 case LINK_SPEED_16G:
7753 phba->cfg_link_speed =
7754 LPFC_USER_LINK_SPEED_16G;
7755 break;
7756 case LINK_SPEED_32G:
7757 phba->cfg_link_speed =
7758 LPFC_USER_LINK_SPEED_32G;
7759 break;
7760 case 0xffff:
7761 phba->cfg_link_speed =
7762 LPFC_USER_LINK_SPEED_AUTO;
7763 break;
7764 default:
7765 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7766 "0047 Unrecognized link "
7767 "speed : %d\n",
7768 forced_link_speed);
7769 phba->cfg_link_speed =
7770 LPFC_USER_LINK_SPEED_AUTO;
7771 }
7772 }
7773 }
7774
da0436e9 7775 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS		 7776 length = phba->sli4_hba.max_cfg_param.max_xri -
7777 lpfc_sli4_get_els_iocb_cnt(phba);
7778 if (phba->cfg_hba_queue_depth > length) {
7779 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7780 "3361 HBA queue depth changed from %d to %d\n",
7781 phba->cfg_hba_queue_depth, length);
7782 phba->cfg_hba_queue_depth = length;
7783 }
912e3acd
JS		 7784
7785 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
7786 LPFC_SLI_INTF_IF_TYPE_2)
7787 goto read_cfg_out;
7788
7789 /* get the pf# and vf# for SLI4 if_type 2 port */
7790 length = (sizeof(struct lpfc_mbx_get_func_cfg) -
7791 sizeof(struct lpfc_sli4_cfg_mhdr));
7792 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON,
7793 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG,
7794 length, LPFC_SLI4_MBX_EMBED);
7795
8aa134a8 7796 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
912e3acd
JS		 7797 shdr = (union lpfc_sli4_cfg_shdr *)
7798 &pmb->u.mqe.un.sli4_config.header.cfg_shdr;
7799 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
7800 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8aa134a8 7801 if (rc2 || shdr_status || shdr_add_status) {
912e3acd
JS		 7802 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7803 "3026 Mailbox failed , mbxCmd x%x "
7804 "GET_FUNCTION_CONFIG, mbxStatus x%x\n",
7805 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7806 bf_get(lpfc_mqe_status, &pmb->u.mqe));
912e3acd
JS		 7807 goto read_cfg_out;
7808 }
7809
7810 /* search for fc_fcoe resrouce descriptor */
7811 get_func_cfg = &pmb->u.mqe.un.get_func_cfg;
912e3acd 7812
8aa134a8
JS		 7813 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0];
7814 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0;
7815 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc);
7816 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD)
7817 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH;
7818 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH)
7819 goto read_cfg_out;
7820
912e3acd 7821 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) {
8aa134a8 7822 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i);
912e3acd 7823 if (LPFC_RSRC_DESC_TYPE_FCFCOE ==
8aa134a8 7824 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) {
912e3acd
JS		 7825 phba->sli4_hba.iov.pf_number =
7826 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc);
7827 phba->sli4_hba.iov.vf_number =
7828 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc);
7829 break;
7830 }
7831 }
7832
7833 if (i < LPFC_RSRC_DESC_MAX_NUM)
7834 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7835 "3027 GET_FUNCTION_CONFIG: pf_number:%d, "
7836 "vf_number:%d\n", phba->sli4_hba.iov.pf_number,
7837 phba->sli4_hba.iov.vf_number);
8aa134a8 7838 else
912e3acd
JS		 7839 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7840 "3028 GET_FUNCTION_CONFIG: failed to find "
7841 "Resrouce Descriptor:x%x\n",
7842 LPFC_RSRC_DESC_TYPE_FCFCOE);
912e3acd
JS		 7843
7844read_cfg_out:
7845 mempool_free(pmb, phba->mbox_mem_pool);
da0436e9 7846 return rc;
3772a991
JS		 7847}
7848
7849/**
2fcee4bf 7850 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port.
3772a991
JS		 7851 * @phba: pointer to lpfc hba data structure.
7852 *
2fcee4bf
JS		 7853 * This routine is invoked to setup the port-side endian order when
7854 * the port if_type is 0. This routine has no function for other
7855 * if_types.
da0436e9
JS		 7856 *
7857 * Return codes
af901ca1 7858 * 0 - successful
25985edc 7859 * -ENOMEM - No available memory
d439d286 7860 * -EIO - The mailbox failed to complete successfully.
3772a991 7861 **/
da0436e9
JS		 7862static int
7863lpfc_setup_endian_order(struct lpfc_hba *phba)
3772a991 7864{
da0436e9 7865 LPFC_MBOXQ_t *mboxq;
2fcee4bf 7866 uint32_t if_type, rc = 0;
da0436e9
JS		 7867 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0,
7868 HOST_ENDIAN_HIGH_WORD1};
3772a991 7869
2fcee4bf
JS		 7870 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7871 switch (if_type) {
7872 case LPFC_SLI_INTF_IF_TYPE_0:
7873 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
7874 GFP_KERNEL);
7875 if (!mboxq) {
7876 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7877 "0492 Unable to allocate memory for "
7878 "issuing SLI_CONFIG_SPECIAL mailbox "
7879 "command\n");
7880 return -ENOMEM;
7881 }
3772a991 7882
2fcee4bf
JS		 7883 /*
7884 * The SLI4_CONFIG_SPECIAL mailbox command requires the first
7885 * two words to contain special data values and no other data.
7886 */
7887 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t));
7888 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data));
7889 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7890 if (rc != MBX_SUCCESS) {
7891 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7892 "0493 SLI_CONFIG_SPECIAL mailbox "
7893 "failed with status x%x\n",
7894 rc);
7895 rc = -EIO;
7896 }
7897 mempool_free(mboxq, phba->mbox_mem_pool);
7898 break;
7899 case LPFC_SLI_INTF_IF_TYPE_2:
7900 case LPFC_SLI_INTF_IF_TYPE_1:
7901 default:
7902 break;
da0436e9 7903 }
da0436e9 7904 return rc;
3772a991
JS		 7905}
7906
7907/**
895427bd 7908 * lpfc_sli4_queue_verify - Verify and update EQ counts
3772a991
JS		 7909 * @phba: pointer to lpfc hba data structure.
7910 *
895427bd
JS		 7911 * This routine is invoked to check the user settable queue counts for EQs.
7912 * After this routine is called the counts will be set to valid values that
5350d872
JS		 7913 * adhere to the constraints of the system's interrupt vectors and the port's
7914 * queue resources.
da0436e9
JS		 7915 *
7916 * Return codes
af901ca1 7917 * 0 - successful
25985edc 7918 * -ENOMEM - No available memory
3772a991 7919 **/
da0436e9 7920static int
5350d872 7921lpfc_sli4_queue_verify(struct lpfc_hba *phba)
3772a991 7922{
895427bd 7923 int io_channel;
1ba981fd 7924 int fof_vectors = phba->cfg_fof ? 1 : 0;
3772a991 7925
da0436e9 7926 /*
67d12733 7927 * Sanity check for configured queue parameters against the run-time
da0436e9
JS		 7928 * device parameters
7929 */
3772a991 7930
67d12733 7931 /* Sanity check on HBA EQ parameters */
895427bd 7932 io_channel = phba->io_channel_irqs;
67d12733 7933
895427bd 7934 if (phba->sli4_hba.num_online_cpu < io_channel) {
82c3e9ba
JS		 7935 lpfc_printf_log(phba,
7936 KERN_ERR, LOG_INIT,
90695ee0 7937 "3188 Reducing IO channels to match number of "
7bb03bbf 7938 "online CPUs: from %d to %d\n",
895427bd
JS		 7939 io_channel, phba->sli4_hba.num_online_cpu);
7940 io_channel = phba->sli4_hba.num_online_cpu;
90695ee0
JS		 7941 }
7942
895427bd 7943 if (io_channel + fof_vectors > phba->sli4_hba.max_cfg_param.max_eq) {
82c3e9ba
JS		 7944 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7945 "2575 Reducing IO channels to match number of "
7946 "available EQs: from %d to %d\n",
895427bd 7947 io_channel,
82c3e9ba 7948 phba->sli4_hba.max_cfg_param.max_eq);
895427bd 7949 io_channel = phba->sli4_hba.max_cfg_param.max_eq - fof_vectors;
da0436e9 7950 }
67d12733 7951
895427bd
JS		 7952 /* The actual number of FCP / NVME event queues adopted */
7953 if (io_channel != phba->io_channel_irqs)
7954 phba->io_channel_irqs = io_channel;
7955 if (phba->cfg_fcp_io_channel > io_channel)
7956 phba->cfg_fcp_io_channel = io_channel;
7957 if (phba->cfg_nvme_io_channel > io_channel)
7958 phba->cfg_nvme_io_channel = io_channel;
bcb24f65
JS		 7959 if (phba->nvmet_support) {
7960 if (phba->cfg_nvme_io_channel < phba->cfg_nvmet_mrq)
7961 phba->cfg_nvmet_mrq = phba->cfg_nvme_io_channel;
7962 }
7963 if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX)
7964 phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX;
895427bd
JS		 7965
7966 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2d7dbc4c 7967 "2574 IO channels: irqs %d fcp %d nvme %d MRQ: %d\n",
895427bd 7968 phba->io_channel_irqs, phba->cfg_fcp_io_channel,
2d7dbc4c 7969 phba->cfg_nvme_io_channel, phba->cfg_nvmet_mrq);
3772a991 7970
da0436e9
JS		 7971 /* Get EQ depth from module parameter, fake the default for now */
7972 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
7973 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
3772a991 7974
5350d872
JS		 7975 /* Get CQ depth from module parameter, fake the default for now */
7976 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
7977 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
895427bd
JS		 7978 return 0;
7979}
7980
7981static int
7982lpfc_alloc_nvme_wq_cq(struct lpfc_hba *phba, int wqidx)
7983{
7984 struct lpfc_queue *qdesc;
5350d872 7985
81b96eda
JS		 7986 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_NVME_PAGE_SIZE,
7987 phba->sli4_hba.cq_esize,
7988 LPFC_NVME_CQSIZE);
895427bd
JS		 7989 if (!qdesc) {
7990 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7991 "0508 Failed allocate fast-path NVME CQ (%d)\n",
7992 wqidx);
7993 return 1;
7994 }
7995 phba->sli4_hba.nvme_cq[wqidx] = qdesc;
7996
81b96eda
JS		 7997 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_NVME_PAGE_SIZE,
7998 LPFC_WQE128_SIZE, LPFC_NVME_WQSIZE);
895427bd
JS		 7999 if (!qdesc) {
8000 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8001 "0509 Failed allocate fast-path NVME WQ (%d)\n",
8002 wqidx);
8003 return 1;
8004 }
8005 phba->sli4_hba.nvme_wq[wqidx] = qdesc;
8006 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8007 return 0;
8008}
8009
8010static int
8011lpfc_alloc_fcp_wq_cq(struct lpfc_hba *phba, int wqidx)
8012{
8013 struct lpfc_queue *qdesc;
8014 uint32_t wqesize;
8015
8016 /* Create Fast Path FCP CQs */
81b96eda
JS		 8017 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8018 phba->sli4_hba.cq_esize,
8019 phba->sli4_hba.cq_ecount);
895427bd
JS		 8020 if (!qdesc) {
8021 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8022 "0499 Failed allocate fast-path FCP CQ (%d)\n", wqidx);
8023 return 1;
8024 }
8025 phba->sli4_hba.fcp_cq[wqidx] = qdesc;
8026
8027 /* Create Fast Path FCP WQs */
8028 wqesize = (phba->fcp_embed_io) ?
d1f525aa 8029 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
81b96eda
JS		 8030 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8031 wqesize, phba->sli4_hba.wq_ecount);
895427bd
JS		 8032 if (!qdesc) {
8033 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8034 "0503 Failed allocate fast-path FCP WQ (%d)\n",
8035 wqidx);
8036 return 1;
8037 }
8038 phba->sli4_hba.fcp_wq[wqidx] = qdesc;
8039 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
5350d872 8040 return 0;
5350d872
JS		 8041}
8042
8043/**
8044 * lpfc_sli4_queue_create - Create all the SLI4 queues
8045 * @phba: pointer to lpfc hba data structure.
8046 *
8047 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA
8048 * operation. For each SLI4 queue type, the parameters such as queue entry
8049 * count (queue depth) shall be taken from the module parameter. For now,
8050 * we just use some constant number as place holder.
8051 *
8052 * Return codes
4907cb7b 8053 * 0 - successful
5350d872
JS		 8054 * -ENOMEM - No availble memory
8055 * -EIO - The mailbox failed to complete successfully.
8056 **/
8057int
8058lpfc_sli4_queue_create(struct lpfc_hba *phba)
8059{
8060 struct lpfc_queue *qdesc;
d1f525aa 8061 int idx, io_channel;
5350d872
JS		 8062
8063 /*
67d12733 8064 * Create HBA Record arrays.
895427bd 8065 * Both NVME and FCP will share that same vectors / EQs
5350d872 8066 */
895427bd
JS		 8067 io_channel = phba->io_channel_irqs;
8068 if (!io_channel)
67d12733 8069 return -ERANGE;
5350d872 8070
67d12733
JS		 8071 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
8072 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
8073 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
8074 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
8075 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
8076 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
895427bd
JS		 8077 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
8078 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
8079 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
8080 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
67d12733 8081
895427bd
JS		 8082 phba->sli4_hba.hba_eq = kcalloc(io_channel,
8083 sizeof(struct lpfc_queue *),
8084 GFP_KERNEL);
67d12733
JS		 8085 if (!phba->sli4_hba.hba_eq) {
8086 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8087 "2576 Failed allocate memory for "
8088 "fast-path EQ record array\n");
8089 goto out_error;
8090 }
8091
895427bd
JS		 8092 if (phba->cfg_fcp_io_channel) {
8093 phba->sli4_hba.fcp_cq = kcalloc(phba->cfg_fcp_io_channel,
8094 sizeof(struct lpfc_queue *),
8095 GFP_KERNEL);
8096 if (!phba->sli4_hba.fcp_cq) {
8097 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8098 "2577 Failed allocate memory for "
8099 "fast-path CQ record array\n");
8100 goto out_error;
8101 }
8102 phba->sli4_hba.fcp_wq = kcalloc(phba->cfg_fcp_io_channel,
8103 sizeof(struct lpfc_queue *),
8104 GFP_KERNEL);
8105 if (!phba->sli4_hba.fcp_wq) {
8106 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8107 "2578 Failed allocate memory for "
8108 "fast-path FCP WQ record array\n");
8109 goto out_error;
8110 }
8111 /*
8112 * Since the first EQ can have multiple CQs associated with it,
8113 * this array is used to quickly see if we have a FCP fast-path
8114 * CQ match.
8115 */
8116 phba->sli4_hba.fcp_cq_map = kcalloc(phba->cfg_fcp_io_channel,
8117 sizeof(uint16_t),
8118 GFP_KERNEL);
8119 if (!phba->sli4_hba.fcp_cq_map) {
8120 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8121 "2545 Failed allocate memory for "
8122 "fast-path CQ map\n");
8123 goto out_error;
8124 }
67d12733
JS		 8125 }
8126
895427bd
JS		 8127 if (phba->cfg_nvme_io_channel) {
8128 phba->sli4_hba.nvme_cq = kcalloc(phba->cfg_nvme_io_channel,
8129 sizeof(struct lpfc_queue *),
8130 GFP_KERNEL);
8131 if (!phba->sli4_hba.nvme_cq) {
8132 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8133 "6077 Failed allocate memory for "
8134 "fast-path CQ record array\n");
8135 goto out_error;
8136 }
da0436e9 8137
895427bd
JS		 8138 phba->sli4_hba.nvme_wq = kcalloc(phba->cfg_nvme_io_channel,
8139 sizeof(struct lpfc_queue *),
8140 GFP_KERNEL);
8141 if (!phba->sli4_hba.nvme_wq) {
8142 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8143 "2581 Failed allocate memory for "
8144 "fast-path NVME WQ record array\n");
8145 goto out_error;
8146 }
8147
8148 /*
8149 * Since the first EQ can have multiple CQs associated with it,
8150 * this array is used to quickly see if we have a NVME fast-path
8151 * CQ match.
8152 */
8153 phba->sli4_hba.nvme_cq_map = kcalloc(phba->cfg_nvme_io_channel,
8154 sizeof(uint16_t),
8155 GFP_KERNEL);
8156 if (!phba->sli4_hba.nvme_cq_map) {
8157 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8158 "6078 Failed allocate memory for "
8159 "fast-path CQ map\n");
8160 goto out_error;
8161 }
2d7dbc4c
JS		 8162
8163 if (phba->nvmet_support) {
8164 phba->sli4_hba.nvmet_cqset = kcalloc(
8165 phba->cfg_nvmet_mrq,
8166 sizeof(struct lpfc_queue *),
8167 GFP_KERNEL);
8168 if (!phba->sli4_hba.nvmet_cqset) {
8169 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8170 "3121 Fail allocate memory for "
8171 "fast-path CQ set array\n");
8172 goto out_error;
8173 }
8174 phba->sli4_hba.nvmet_mrq_hdr = kcalloc(
8175 phba->cfg_nvmet_mrq,
8176 sizeof(struct lpfc_queue *),
8177 GFP_KERNEL);
8178 if (!phba->sli4_hba.nvmet_mrq_hdr) {
8179 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8180 "3122 Fail allocate memory for "
8181 "fast-path RQ set hdr array\n");
8182 goto out_error;
8183 }
8184 phba->sli4_hba.nvmet_mrq_data = kcalloc(
8185 phba->cfg_nvmet_mrq,
8186 sizeof(struct lpfc_queue *),
8187 GFP_KERNEL);
8188 if (!phba->sli4_hba.nvmet_mrq_data) {
8189 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8190 "3124 Fail allocate memory for "
8191 "fast-path RQ set data array\n");
8192 goto out_error;
8193 }
8194 }
da0436e9 8195 }
67d12733 8196
895427bd 8197 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
67d12733 8198
895427bd
JS		 8199 /* Create HBA Event Queues (EQs) */
8200 for (idx = 0; idx < io_channel; idx++) {
67d12733 8201 /* Create EQs */
81b96eda
JS		 8202 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8203 phba->sli4_hba.eq_esize,
da0436e9
JS		 8204 phba->sli4_hba.eq_ecount);
8205 if (!qdesc) {
8206 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
67d12733
JS		 8207 "0497 Failed allocate EQ (%d)\n", idx);
8208 goto out_error;
da0436e9 8209 }
67d12733 8210 phba->sli4_hba.hba_eq[idx] = qdesc;
895427bd 8211 }
67d12733 8212
895427bd 8213 /* FCP and NVME io channels are not required to be balanced */
67d12733 8214
895427bd
JS		 8215 for (idx = 0; idx < phba->cfg_fcp_io_channel; idx++)
8216 if (lpfc_alloc_fcp_wq_cq(phba, idx))
67d12733 8217 goto out_error;
da0436e9 8218
895427bd
JS		 8219 for (idx = 0; idx < phba->cfg_nvme_io_channel; idx++)
8220 if (lpfc_alloc_nvme_wq_cq(phba, idx))
8221 goto out_error;
67d12733 8222
2d7dbc4c
JS		 8223 if (phba->nvmet_support) {
8224 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
8225 qdesc = lpfc_sli4_queue_alloc(phba,
81b96eda
JS		 8226 LPFC_DEFAULT_PAGE_SIZE,
8227 phba->sli4_hba.cq_esize,
8228 phba->sli4_hba.cq_ecount);
2d7dbc4c
JS		 8229 if (!qdesc) {
8230 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8231 "3142 Failed allocate NVME "
8232 "CQ Set (%d)\n", idx);
8233 goto out_error;
8234 }
8235 phba->sli4_hba.nvmet_cqset[idx] = qdesc;
8236 }
8237 }
8238
da0436e9 8239 /*
67d12733 8240 * Create Slow Path Completion Queues (CQs)
da0436e9
JS		 8241 */
8242
da0436e9 8243 /* Create slow-path Mailbox Command Complete Queue */
81b96eda
JS		 8244 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8245 phba->sli4_hba.cq_esize,
da0436e9
JS		 8246 phba->sli4_hba.cq_ecount);
8247 if (!qdesc) {
8248 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8249 "0500 Failed allocate slow-path mailbox CQ\n");
67d12733 8250 goto out_error;
da0436e9
JS		 8251 }
8252 phba->sli4_hba.mbx_cq = qdesc;
8253
8254 /* Create slow-path ELS Complete Queue */
81b96eda
JS		 8255 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8256 phba->sli4_hba.cq_esize,
da0436e9
JS		 8257 phba->sli4_hba.cq_ecount);
8258 if (!qdesc) {
8259 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8260 "0501 Failed allocate slow-path ELS CQ\n");
67d12733 8261 goto out_error;
da0436e9
JS		 8262 }
8263 phba->sli4_hba.els_cq = qdesc;
8264
da0436e9 8265
5350d872 8266 /*
67d12733 8267 * Create Slow Path Work Queues (WQs)
5350d872 8268 */
da0436e9
JS		 8269
8270 /* Create Mailbox Command Queue */
da0436e9 8271
81b96eda
JS		 8272 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8273 phba->sli4_hba.mq_esize,
da0436e9
JS		 8274 phba->sli4_hba.mq_ecount);
8275 if (!qdesc) {
8276 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8277 "0505 Failed allocate slow-path MQ\n");
67d12733 8278 goto out_error;
da0436e9
JS		 8279 }
8280 phba->sli4_hba.mbx_wq = qdesc;
8281
8282 /*
67d12733 8283 * Create ELS Work Queues
da0436e9 8284 */
da0436e9
JS		 8285
8286 /* Create slow-path ELS Work Queue */
81b96eda
JS		 8287 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8288 phba->sli4_hba.wq_esize,
da0436e9
JS		 8289 phba->sli4_hba.wq_ecount);
8290 if (!qdesc) {
8291 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8292 "0504 Failed allocate slow-path ELS WQ\n");
67d12733 8293 goto out_error;
da0436e9
JS		 8294 }
8295 phba->sli4_hba.els_wq = qdesc;
895427bd
JS		 8296 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8297
8298 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8299 /* Create NVME LS Complete Queue */
81b96eda
JS		 8300 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8301 phba->sli4_hba.cq_esize,
895427bd
JS		 8302 phba->sli4_hba.cq_ecount);
8303 if (!qdesc) {
8304 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8305 "6079 Failed allocate NVME LS CQ\n");
8306 goto out_error;
8307 }
8308 phba->sli4_hba.nvmels_cq = qdesc;
8309
8310 /* Create NVME LS Work Queue */
81b96eda
JS		 8311 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8312 phba->sli4_hba.wq_esize,
895427bd
JS		 8313 phba->sli4_hba.wq_ecount);
8314 if (!qdesc) {
8315 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8316 "6080 Failed allocate NVME LS WQ\n");
8317 goto out_error;
8318 }
8319 phba->sli4_hba.nvmels_wq = qdesc;
8320 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8321 }
da0436e9 8322
da0436e9
JS		 8323 /*
8324 * Create Receive Queue (RQ)
8325 */
da0436e9
JS		 8326
8327 /* Create Receive Queue for header */
81b96eda
JS		 8328 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8329 phba->sli4_hba.rq_esize,
da0436e9
JS		 8330 phba->sli4_hba.rq_ecount);
8331 if (!qdesc) {
8332 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8333 "0506 Failed allocate receive HRQ\n");
67d12733 8334 goto out_error;
da0436e9
JS		 8335 }
8336 phba->sli4_hba.hdr_rq = qdesc;
8337
8338 /* Create Receive Queue for data */
81b96eda
JS		 8339 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8340 phba->sli4_hba.rq_esize,
da0436e9
JS		 8341 phba->sli4_hba.rq_ecount);
8342 if (!qdesc) {
8343 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8344 "0507 Failed allocate receive DRQ\n");
67d12733 8345 goto out_error;
da0436e9
JS		 8346 }
8347 phba->sli4_hba.dat_rq = qdesc;
8348
2d7dbc4c
JS		 8349 if (phba->nvmet_support) {
8350 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
8351 /* Create NVMET Receive Queue for header */
8352 qdesc = lpfc_sli4_queue_alloc(phba,
81b96eda 8353 LPFC_DEFAULT_PAGE_SIZE,
2d7dbc4c 8354 phba->sli4_hba.rq_esize,
61f3d4bf 8355 LPFC_NVMET_RQE_DEF_COUNT);
2d7dbc4c
JS		 8356 if (!qdesc) {
8357 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8358 "3146 Failed allocate "
8359 "receive HRQ\n");
8360 goto out_error;
8361 }
8362 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc;
8363
8364 /* Only needed for header of RQ pair */
8365 qdesc->rqbp = kzalloc(sizeof(struct lpfc_rqb),
8366 GFP_KERNEL);
8367 if (qdesc->rqbp == NULL) {
8368 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8369 "6131 Failed allocate "
8370 "Header RQBP\n");
8371 goto out_error;
8372 }
8373
4b40d02b
DK		 8374 /* Put list in known state in case driver load fails. */
8375 INIT_LIST_HEAD(&qdesc->rqbp->rqb_buffer_list);
8376
2d7dbc4c
JS		 8377 /* Create NVMET Receive Queue for data */
8378 qdesc = lpfc_sli4_queue_alloc(phba,
81b96eda 8379 LPFC_DEFAULT_PAGE_SIZE,
2d7dbc4c 8380 phba->sli4_hba.rq_esize,
61f3d4bf 8381 LPFC_NVMET_RQE_DEF_COUNT);
2d7dbc4c
JS		 8382 if (!qdesc) {
8383 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8384 "3156 Failed allocate "
8385 "receive DRQ\n");
8386 goto out_error;
8387 }
8388 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc;
8389 }
8390 }
8391
1ba981fd
JS		 8392 /* Create the Queues needed for Flash Optimized Fabric operations */
8393 if (phba->cfg_fof)
8394 lpfc_fof_queue_create(phba);
da0436e9
JS		 8395 return 0;
8396
da0436e9 8397out_error:
67d12733 8398 lpfc_sli4_queue_destroy(phba);
da0436e9
JS		 8399 return -ENOMEM;
8400}
8401
895427bd
JS		 8402static inline void
8403__lpfc_sli4_release_queue(struct lpfc_queue **qp)
8404{
8405 if (*qp != NULL) {
8406 lpfc_sli4_queue_free(*qp);
8407 *qp = NULL;
8408 }
8409}
8410
8411static inline void
8412lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max)
8413{
8414 int idx;
8415
8416 if (*qs == NULL)
8417 return;
8418
8419 for (idx = 0; idx < max; idx++)
8420 __lpfc_sli4_release_queue(&(*qs)[idx]);
8421
8422 kfree(*qs);
8423 *qs = NULL;
8424}
8425
8426static inline void
8427lpfc_sli4_release_queue_map(uint16_t **qmap)
8428{
8429 if (*qmap != NULL) {
8430 kfree(*qmap);
8431 *qmap = NULL;
8432 }
8433}
8434
da0436e9
JS		 8435/**
8436 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues
8437 * @phba: pointer to lpfc hba data structure.
8438 *
8439 * This routine is invoked to release all the SLI4 queues with the FCoE HBA
8440 * operation.
8441 *
8442 * Return codes
af901ca1 8443 * 0 - successful
25985edc 8444 * -ENOMEM - No available memory
d439d286 8445 * -EIO - The mailbox failed to complete successfully.
da0436e9 8446 **/
5350d872 8447void
da0436e9
JS		 8448lpfc_sli4_queue_destroy(struct lpfc_hba *phba)
8449{
1ba981fd
JS		 8450 if (phba->cfg_fof)
8451 lpfc_fof_queue_destroy(phba);
8452
895427bd
JS		 8453 /* Release HBA eqs */
8454 lpfc_sli4_release_queues(&phba->sli4_hba.hba_eq, phba->io_channel_irqs);
8455
8456 /* Release FCP cqs */
8457 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_cq,
d1f525aa 8458 phba->cfg_fcp_io_channel);
895427bd
JS		 8459
8460 /* Release FCP wqs */
8461 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_wq,
d1f525aa 8462 phba->cfg_fcp_io_channel);
895427bd
JS		 8463
8464 /* Release FCP CQ mapping array */
8465 lpfc_sli4_release_queue_map(&phba->sli4_hba.fcp_cq_map);
8466
8467 /* Release NVME cqs */
8468 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_cq,
8469 phba->cfg_nvme_io_channel);
8470
8471 /* Release NVME wqs */
8472 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_wq,
8473 phba->cfg_nvme_io_channel);
8474
8475 /* Release NVME CQ mapping array */
8476 lpfc_sli4_release_queue_map(&phba->sli4_hba.nvme_cq_map);
8477
bcb24f65
JS		 8478 if (phba->nvmet_support) {
8479 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset,
8480 phba->cfg_nvmet_mrq);
2d7dbc4c 8481
bcb24f65
JS		 8482 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr,
8483 phba->cfg_nvmet_mrq);
8484 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data,
8485 phba->cfg_nvmet_mrq);
8486 }
2d7dbc4c 8487
895427bd
JS		 8488 /* Release mailbox command work queue */
8489 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq);
8490
8491 /* Release ELS work queue */
8492 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq);
8493
8494 /* Release ELS work queue */
8495 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq);
8496
8497 /* Release unsolicited receive queue */
8498 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq);
8499 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq);
8500
8501 /* Release ELS complete queue */
8502 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq);
8503
8504 /* Release NVME LS complete queue */
8505 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq);
8506
8507 /* Release mailbox command complete queue */
8508 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq);
8509
8510 /* Everything on this list has been freed */
8511 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
8512}
8513
895427bd
JS		 8514int
8515lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq)
8516{
8517 struct lpfc_rqb *rqbp;
8518 struct lpfc_dmabuf *h_buf;
8519 struct rqb_dmabuf *rqb_buffer;
8520
8521 rqbp = rq->rqbp;
8522 while (!list_empty(&rqbp->rqb_buffer_list)) {
8523 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
8524 struct lpfc_dmabuf, list);
8525
8526 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf);
8527 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
8528 rqbp->buffer_count--;
67d12733 8529 }
895427bd
JS		 8530 return 1;
8531}
67d12733 8532
895427bd
JS		 8533static int
8534lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq,
8535 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map,
8536 int qidx, uint32_t qtype)
8537{
8538 struct lpfc_sli_ring *pring;
8539 int rc;
8540
8541 if (!eq || !cq || !wq) {
8542 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8543 "6085 Fast-path %s (%d) not allocated\n",
8544 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx);
8545 return -ENOMEM;
8546 }
8547
8548 /* create the Cq first */
8549 rc = lpfc_cq_create(phba, cq, eq,
8550 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype);
8551 if (rc) {
8552 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8553 "6086 Failed setup of CQ (%d), rc = 0x%x\n",
8554 qidx, (uint32_t)rc);
8555 return rc;
67d12733 8556 }
81b96eda 8557 cq->chann = qidx;
67d12733 8558
895427bd
JS		 8559 if (qtype != LPFC_MBOX) {
8560 /* Setup nvme_cq_map for fast lookup */
8561 if (cq_map)
8562 *cq_map = cq->queue_id;
da0436e9 8563
895427bd
JS		 8564 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8565 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n",
8566 qidx, cq->queue_id, qidx, eq->queue_id);
da0436e9 8567
895427bd
JS		 8568 /* create the wq */
8569 rc = lpfc_wq_create(phba, wq, cq, qtype);
8570 if (rc) {
8571 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8572 "6123 Fail setup fastpath WQ (%d), rc = 0x%x\n",
8573 qidx, (uint32_t)rc);
8574 /* no need to tear down cq - caller will do so */
8575 return rc;
8576 }
81b96eda 8577 wq->chann = qidx;
da0436e9 8578
895427bd
JS		 8579 /* Bind this CQ/WQ to the NVME ring */
8580 pring = wq->pring;
8581 pring->sli.sli4.wqp = (void *)wq;
8582 cq->pring = pring;
da0436e9 8583
895427bd
JS		 8584 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8585 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n",
8586 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id);
8587 } else {
8588 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX);
8589 if (rc) {
8590 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8591 "0539 Failed setup of slow-path MQ: "
8592 "rc = 0x%x\n", rc);
8593 /* no need to tear down cq - caller will do so */
8594 return rc;
8595 }
da0436e9 8596
895427bd
JS		 8597 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8598 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n",
8599 phba->sli4_hba.mbx_wq->queue_id,
8600 phba->sli4_hba.mbx_cq->queue_id);
67d12733 8601 }
da0436e9 8602
895427bd 8603 return 0;
da0436e9
JS		 8604}
8605
8606/**
8607 * lpfc_sli4_queue_setup - Set up all the SLI4 queues
8608 * @phba: pointer to lpfc hba data structure.
8609 *
8610 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA
8611 * operation.
8612 *
8613 * Return codes
af901ca1 8614 * 0 - successful
25985edc 8615 * -ENOMEM - No available memory
d439d286 8616 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS		 8617 **/
8618int
8619lpfc_sli4_queue_setup(struct lpfc_hba *phba)
8620{
962bc51b
JS		 8621 uint32_t shdr_status, shdr_add_status;
8622 union lpfc_sli4_cfg_shdr *shdr;
8623 LPFC_MBOXQ_t *mboxq;
895427bd
JS		 8624 int qidx;
8625 uint32_t length, io_channel;
8626 int rc = -ENOMEM;
962bc51b
JS		 8627
8628 /* Check for dual-ULP support */
8629 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
8630 if (!mboxq) {
8631 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8632 "3249 Unable to allocate memory for "
8633 "QUERY_FW_CFG mailbox command\n");
8634 return -ENOMEM;
8635 }
8636 length = (sizeof(struct lpfc_mbx_query_fw_config) -
8637 sizeof(struct lpfc_sli4_cfg_mhdr));
8638 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
8639 LPFC_MBOX_OPCODE_QUERY_FW_CFG,
8640 length, LPFC_SLI4_MBX_EMBED);
8641
8642 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
8643
8644 shdr = (union lpfc_sli4_cfg_shdr *)
8645 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
8646 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
8647 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8648 if (shdr_status || shdr_add_status || rc) {
8649 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8650 "3250 QUERY_FW_CFG mailbox failed with status "
8651 "x%x add_status x%x, mbx status x%x\n",
8652 shdr_status, shdr_add_status, rc);
8653 if (rc != MBX_TIMEOUT)
8654 mempool_free(mboxq, phba->mbox_mem_pool);
8655 rc = -ENXIO;
8656 goto out_error;
8657 }
8658
8659 phba->sli4_hba.fw_func_mode =
8660 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode;
8661 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode;
8662 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode;
8b017a30
JS		 8663 phba->sli4_hba.physical_port =
8664 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port;
962bc51b
JS		 8665 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8666 "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, "
8667 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode,
8668 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode);
8669
8670 if (rc != MBX_TIMEOUT)
8671 mempool_free(mboxq, phba->mbox_mem_pool);
da0436e9
JS		 8672
8673 /*
67d12733 8674 * Set up HBA Event Queues (EQs)
da0436e9 8675 */
895427bd 8676 io_channel = phba->io_channel_irqs;
da0436e9 8677
67d12733 8678 /* Set up HBA event queue */
895427bd 8679 if (io_channel && !phba->sli4_hba.hba_eq) {
2e90f4b5
JS		 8680 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8681 "3147 Fast-path EQs not allocated\n");
1b51197d 8682 rc = -ENOMEM;
67d12733 8683 goto out_error;
2e90f4b5 8684 }
895427bd
JS		 8685 for (qidx = 0; qidx < io_channel; qidx++) {
8686 if (!phba->sli4_hba.hba_eq[qidx]) {
da0436e9
JS		 8687 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8688 "0522 Fast-path EQ (%d) not "
895427bd 8689 "allocated\n", qidx);
1b51197d 8690 rc = -ENOMEM;
895427bd 8691 goto out_destroy;
da0436e9 8692 }
895427bd
JS		 8693 rc = lpfc_eq_create(phba, phba->sli4_hba.hba_eq[qidx],
8694 phba->cfg_fcp_imax);
da0436e9
JS		 8695 if (rc) {
8696 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8697 "0523 Failed setup of fast-path EQ "
895427bd 8698 "(%d), rc = 0x%x\n", qidx,
a2fc4aef 8699 (uint32_t)rc);
895427bd 8700 goto out_destroy;
da0436e9
JS		 8701 }
8702 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
895427bd
JS		 8703 "2584 HBA EQ setup: queue[%d]-id=%d\n",
8704 qidx, phba->sli4_hba.hba_eq[qidx]->queue_id);
67d12733
JS		 8705 }
8706
895427bd
JS		 8707 if (phba->cfg_nvme_io_channel) {
8708 if (!phba->sli4_hba.nvme_cq || !phba->sli4_hba.nvme_wq) {
67d12733 8709 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8710 "6084 Fast-path NVME %s array not allocated\n",
8711 (phba->sli4_hba.nvme_cq) ? "CQ" : "WQ");
67d12733 8712 rc = -ENOMEM;
895427bd 8713 goto out_destroy;
67d12733
JS		 8714 }
8715
895427bd
JS		 8716 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++) {
8717 rc = lpfc_create_wq_cq(phba,
8718 phba->sli4_hba.hba_eq[
8719 qidx % io_channel],
8720 phba->sli4_hba.nvme_cq[qidx],
8721 phba->sli4_hba.nvme_wq[qidx],
8722 &phba->sli4_hba.nvme_cq_map[qidx],
8723 qidx, LPFC_NVME);
8724 if (rc) {
8725 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8726 "6123 Failed to setup fastpath "
8727 "NVME WQ/CQ (%d), rc = 0x%x\n",
8728 qidx, (uint32_t)rc);
8729 goto out_destroy;
8730 }
8731 }
67d12733
JS		 8732 }
8733
895427bd
JS		 8734 if (phba->cfg_fcp_io_channel) {
8735 /* Set up fast-path FCP Response Complete Queue */
8736 if (!phba->sli4_hba.fcp_cq || !phba->sli4_hba.fcp_wq) {
67d12733 8737 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8738 "3148 Fast-path FCP %s array not allocated\n",
8739 phba->sli4_hba.fcp_cq ? "WQ" : "CQ");
67d12733 8740 rc = -ENOMEM;
895427bd 8741 goto out_destroy;
67d12733
JS		 8742 }
8743
895427bd
JS		 8744 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++) {
8745 rc = lpfc_create_wq_cq(phba,
8746 phba->sli4_hba.hba_eq[
8747 qidx % io_channel],
8748 phba->sli4_hba.fcp_cq[qidx],
8749 phba->sli4_hba.fcp_wq[qidx],
8750 &phba->sli4_hba.fcp_cq_map[qidx],
8751 qidx, LPFC_FCP);
8752 if (rc) {
8753 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8754 "0535 Failed to setup fastpath "
8755 "FCP WQ/CQ (%d), rc = 0x%x\n",
8756 qidx, (uint32_t)rc);
8757 goto out_destroy;
8758 }
8759 }
67d12733 8760 }
895427bd 8761
da0436e9 8762 /*
895427bd 8763 * Set up Slow Path Complete Queues (CQs)
da0436e9
JS		 8764 */
8765
895427bd 8766 /* Set up slow-path MBOX CQ/MQ */
da0436e9 8767
895427bd 8768 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) {
da0436e9 8769 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8770 "0528 %s not allocated\n",
8771 phba->sli4_hba.mbx_cq ?
d1f525aa 8772 "Mailbox WQ" : "Mailbox CQ");
1b51197d 8773 rc = -ENOMEM;
895427bd 8774 goto out_destroy;
da0436e9 8775 }
da0436e9 8776
895427bd 8777 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
d1f525aa
JS		 8778 phba->sli4_hba.mbx_cq,
8779 phba->sli4_hba.mbx_wq,
8780 NULL, 0, LPFC_MBOX);
da0436e9
JS		 8781 if (rc) {
8782 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8783 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n",
8784 (uint32_t)rc);
8785 goto out_destroy;
da0436e9 8786 }
2d7dbc4c
JS		 8787 if (phba->nvmet_support) {
8788 if (!phba->sli4_hba.nvmet_cqset) {
8789 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8790 "3165 Fast-path NVME CQ Set "
8791 "array not allocated\n");
8792 rc = -ENOMEM;
8793 goto out_destroy;
8794 }
8795 if (phba->cfg_nvmet_mrq > 1) {
8796 rc = lpfc_cq_create_set(phba,
8797 phba->sli4_hba.nvmet_cqset,
8798 phba->sli4_hba.hba_eq,
8799 LPFC_WCQ, LPFC_NVMET);
8800 if (rc) {
8801 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8802 "3164 Failed setup of NVME CQ "
8803 "Set, rc = 0x%x\n",
8804 (uint32_t)rc);
8805 goto out_destroy;
8806 }
8807 } else {
8808 /* Set up NVMET Receive Complete Queue */
8809 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0],
8810 phba->sli4_hba.hba_eq[0],
8811 LPFC_WCQ, LPFC_NVMET);
8812 if (rc) {
8813 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8814 "6089 Failed setup NVMET CQ: "
8815 "rc = 0x%x\n", (uint32_t)rc);
8816 goto out_destroy;
8817 }
81b96eda
JS		 8818 phba->sli4_hba.nvmet_cqset[0]->chann = 0;
8819
2d7dbc4c
JS		 8820 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8821 "6090 NVMET CQ setup: cq-id=%d, "
8822 "parent eq-id=%d\n",
8823 phba->sli4_hba.nvmet_cqset[0]->queue_id,
8824 phba->sli4_hba.hba_eq[0]->queue_id);
8825 }
8826 }
da0436e9 8827
895427bd
JS		 8828 /* Set up slow-path ELS WQ/CQ */
8829 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) {
da0436e9 8830 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8831 "0530 ELS %s not allocated\n",
8832 phba->sli4_hba.els_cq ? "WQ" : "CQ");
1b51197d 8833 rc = -ENOMEM;
895427bd 8834 goto out_destroy;
da0436e9 8835 }
895427bd
JS		 8836 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8837 phba->sli4_hba.els_cq,
8838 phba->sli4_hba.els_wq,
8839 NULL, 0, LPFC_ELS);
da0436e9
JS		 8840 if (rc) {
8841 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8842 "0529 Failed setup of ELS WQ/CQ: rc = 0x%x\n",
8843 (uint32_t)rc);
8844 goto out_destroy;
da0436e9
JS		 8845 }
8846 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8847 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n",
8848 phba->sli4_hba.els_wq->queue_id,
8849 phba->sli4_hba.els_cq->queue_id);
8850
895427bd
JS		 8851 if (phba->cfg_nvme_io_channel) {
8852 /* Set up NVME LS Complete Queue */
8853 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) {
8854 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8855 "6091 LS %s not allocated\n",
8856 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ");
8857 rc = -ENOMEM;
8858 goto out_destroy;
8859 }
8860 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8861 phba->sli4_hba.nvmels_cq,
8862 phba->sli4_hba.nvmels_wq,
8863 NULL, 0, LPFC_NVME_LS);
8864 if (rc) {
8865 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8866 "0529 Failed setup of NVVME LS WQ/CQ: "
8867 "rc = 0x%x\n", (uint32_t)rc);
8868 goto out_destroy;
8869 }
8870
8871 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8872 "6096 ELS WQ setup: wq-id=%d, "
8873 "parent cq-id=%d\n",
8874 phba->sli4_hba.nvmels_wq->queue_id,
8875 phba->sli4_hba.nvmels_cq->queue_id);
8876 }
8877
2d7dbc4c
JS		 8878 /*
8879 * Create NVMET Receive Queue (RQ)
8880 */
8881 if (phba->nvmet_support) {
8882 if ((!phba->sli4_hba.nvmet_cqset) ||
8883 (!phba->sli4_hba.nvmet_mrq_hdr) ||
8884 (!phba->sli4_hba.nvmet_mrq_data)) {
8885 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8886 "6130 MRQ CQ Queues not "
8887 "allocated\n");
8888 rc = -ENOMEM;
8889 goto out_destroy;
8890 }
8891 if (phba->cfg_nvmet_mrq > 1) {
8892 rc = lpfc_mrq_create(phba,
8893 phba->sli4_hba.nvmet_mrq_hdr,
8894 phba->sli4_hba.nvmet_mrq_data,
8895 phba->sli4_hba.nvmet_cqset,
8896 LPFC_NVMET);
8897 if (rc) {
8898 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8899 "6098 Failed setup of NVMET "
8900 "MRQ: rc = 0x%x\n",
8901 (uint32_t)rc);
8902 goto out_destroy;
8903 }
8904
8905 } else {
8906 rc = lpfc_rq_create(phba,
8907 phba->sli4_hba.nvmet_mrq_hdr[0],
8908 phba->sli4_hba.nvmet_mrq_data[0],
8909 phba->sli4_hba.nvmet_cqset[0],
8910 LPFC_NVMET);
8911 if (rc) {
8912 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8913 "6057 Failed setup of NVMET "
8914 "Receive Queue: rc = 0x%x\n",
8915 (uint32_t)rc);
8916 goto out_destroy;
8917 }
8918
8919 lpfc_printf_log(
8920 phba, KERN_INFO, LOG_INIT,
8921 "6099 NVMET RQ setup: hdr-rq-id=%d, "
8922 "dat-rq-id=%d parent cq-id=%d\n",
8923 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id,
8924 phba->sli4_hba.nvmet_mrq_data[0]->queue_id,
8925 phba->sli4_hba.nvmet_cqset[0]->queue_id);
8926
8927 }
8928 }
8929
da0436e9
JS		 8930 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
8931 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8932 "0540 Receive Queue not allocated\n");
1b51197d 8933 rc = -ENOMEM;
895427bd 8934 goto out_destroy;
da0436e9 8935 }
73d91e50 8936
da0436e9 8937 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
4d9ab994 8938 phba->sli4_hba.els_cq, LPFC_USOL);
da0436e9
JS		 8939 if (rc) {
8940 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8941 "0541 Failed setup of Receive Queue: "
a2fc4aef 8942 "rc = 0x%x\n", (uint32_t)rc);
895427bd 8943 goto out_destroy;
da0436e9 8944 }
73d91e50 8945
da0436e9
JS		 8946 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8947 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d "
8948 "parent cq-id=%d\n",
8949 phba->sli4_hba.hdr_rq->queue_id,
8950 phba->sli4_hba.dat_rq->queue_id,
4d9ab994 8951 phba->sli4_hba.els_cq->queue_id);
1ba981fd
JS		 8952
8953 if (phba->cfg_fof) {
8954 rc = lpfc_fof_queue_setup(phba);
8955 if (rc) {
8956 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8957 "0549 Failed setup of FOF Queues: "
8958 "rc = 0x%x\n", rc);
895427bd 8959 goto out_destroy;
1ba981fd
JS		 8960 }
8961 }
2c9c5a00 8962
43140ca6 8963 for (qidx = 0; qidx < io_channel; qidx += LPFC_MAX_EQ_DELAY_EQID_CNT)
0cf07f84
JS		 8964 lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT,
8965 phba->cfg_fcp_imax);
43140ca6 8966
da0436e9
JS		 8967 return 0;
8968
895427bd
JS		 8969out_destroy:
8970 lpfc_sli4_queue_unset(phba);
da0436e9
JS		 8971out_error:
8972 return rc;
8973}
8974
8975/**
8976 * lpfc_sli4_queue_unset - Unset all the SLI4 queues
8977 * @phba: pointer to lpfc hba data structure.
8978 *
8979 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA
8980 * operation.
8981 *
8982 * Return codes
af901ca1 8983 * 0 - successful
25985edc 8984 * -ENOMEM - No available memory
d439d286 8985 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS		 8986 **/
8987void
8988lpfc_sli4_queue_unset(struct lpfc_hba *phba)
8989{
895427bd 8990 int qidx;
da0436e9 8991
1ba981fd
JS		 8992 /* Unset the queues created for Flash Optimized Fabric operations */
8993 if (phba->cfg_fof)
8994 lpfc_fof_queue_destroy(phba);
895427bd 8995
da0436e9 8996 /* Unset mailbox command work queue */
895427bd
JS		 8997 if (phba->sli4_hba.mbx_wq)
8998 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
8999
9000 /* Unset NVME LS work queue */
9001 if (phba->sli4_hba.nvmels_wq)
9002 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq);
9003
da0436e9 9004 /* Unset ELS work queue */
019c0d66 9005 if (phba->sli4_hba.els_wq)
895427bd
JS		 9006 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
9007
da0436e9 9008 /* Unset unsolicited receive queue */
895427bd
JS		 9009 if (phba->sli4_hba.hdr_rq)
9010 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq,
9011 phba->sli4_hba.dat_rq);
9012
da0436e9 9013 /* Unset FCP work queue */
895427bd
JS		 9014 if (phba->sli4_hba.fcp_wq)
9015 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
9016 lpfc_wq_destroy(phba, phba->sli4_hba.fcp_wq[qidx]);
9017
9018 /* Unset NVME work queue */
9019 if (phba->sli4_hba.nvme_wq) {
9020 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
9021 lpfc_wq_destroy(phba, phba->sli4_hba.nvme_wq[qidx]);
67d12733 9022 }
895427bd 9023
da0436e9 9024 /* Unset mailbox command complete queue */
895427bd
JS		 9025 if (phba->sli4_hba.mbx_cq)
9026 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
9027
da0436e9 9028 /* Unset ELS complete queue */
895427bd
JS		 9029 if (phba->sli4_hba.els_cq)
9030 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
9031
9032 /* Unset NVME LS complete queue */
9033 if (phba->sli4_hba.nvmels_cq)
9034 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq);
9035
9036 /* Unset NVME response complete queue */
9037 if (phba->sli4_hba.nvme_cq)
9038 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
9039 lpfc_cq_destroy(phba, phba->sli4_hba.nvme_cq[qidx]);
9040
bcb24f65
JS		 9041 if (phba->nvmet_support) {
9042 /* Unset NVMET MRQ queue */
9043 if (phba->sli4_hba.nvmet_mrq_hdr) {
9044 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
9045 lpfc_rq_destroy(
9046 phba,
2d7dbc4c
JS		 9047 phba->sli4_hba.nvmet_mrq_hdr[qidx],
9048 phba->sli4_hba.nvmet_mrq_data[qidx]);
bcb24f65 9049 }
2d7dbc4c 9050
bcb24f65
JS		 9051 /* Unset NVMET CQ Set complete queue */
9052 if (phba->sli4_hba.nvmet_cqset) {
9053 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
9054 lpfc_cq_destroy(
9055 phba, phba->sli4_hba.nvmet_cqset[qidx]);
9056 }
2d7dbc4c
JS		 9057 }
9058
da0436e9 9059 /* Unset FCP response complete queue */
895427bd
JS		 9060 if (phba->sli4_hba.fcp_cq)
9061 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
9062 lpfc_cq_destroy(phba, phba->sli4_hba.fcp_cq[qidx]);
9063
da0436e9 9064 /* Unset fast-path event queue */
895427bd
JS		 9065 if (phba->sli4_hba.hba_eq)
9066 for (qidx = 0; qidx < phba->io_channel_irqs; qidx++)
9067 lpfc_eq_destroy(phba, phba->sli4_hba.hba_eq[qidx]);
da0436e9
JS		 9068}
9069
9070/**
9071 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool
9072 * @phba: pointer to lpfc hba data structure.
9073 *
9074 * This routine is invoked to allocate and set up a pool of completion queue
9075 * events. The body of the completion queue event is a completion queue entry
9076 * CQE. For now, this pool is used for the interrupt service routine to queue
9077 * the following HBA completion queue events for the worker thread to process:
9078 * - Mailbox asynchronous events
9079 * - Receive queue completion unsolicited events
9080 * Later, this can be used for all the slow-path events.
9081 *
9082 * Return codes
af901ca1 9083 * 0 - successful
25985edc 9084 * -ENOMEM - No available memory
da0436e9
JS		 9085 **/
9086static int
9087lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba)
9088{
9089 struct lpfc_cq_event *cq_event;
9090 int i;
9091
9092 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
9093 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL);
9094 if (!cq_event)
9095 goto out_pool_create_fail;
9096 list_add_tail(&cq_event->list,
9097 &phba->sli4_hba.sp_cqe_event_pool);
9098 }
9099 return 0;
9100
9101out_pool_create_fail:
9102 lpfc_sli4_cq_event_pool_destroy(phba);
9103 return -ENOMEM;
9104}
9105
9106/**
9107 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool
9108 * @phba: pointer to lpfc hba data structure.
9109 *
9110 * This routine is invoked to free the pool of completion queue events at
9111 * driver unload time. Note that, it is the responsibility of the driver
9112 * cleanup routine to free all the outstanding completion-queue events
9113 * allocated from this pool back into the pool before invoking this routine
9114 * to destroy the pool.
9115 **/
9116static void
9117lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba)
9118{
9119 struct lpfc_cq_event *cq_event, *next_cq_event;
9120
9121 list_for_each_entry_safe(cq_event, next_cq_event,
9122 &phba->sli4_hba.sp_cqe_event_pool, list) {
9123 list_del(&cq_event->list);
9124 kfree(cq_event);
9125 }
9126}
9127
9128/**
9129 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
9130 * @phba: pointer to lpfc hba data structure.
9131 *
9132 * This routine is the lock free version of the API invoked to allocate a
9133 * completion-queue event from the free pool.
9134 *
9135 * Return: Pointer to the newly allocated completion-queue event if successful
9136 * NULL otherwise.
9137 **/
9138struct lpfc_cq_event *
9139__lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
9140{
9141 struct lpfc_cq_event *cq_event = NULL;
9142
9143 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
9144 struct lpfc_cq_event, list);
9145 return cq_event;
9146}
9147
9148/**
9149 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
9150 * @phba: pointer to lpfc hba data structure.
9151 *
9152 * This routine is the lock version of the API invoked to allocate a
9153 * completion-queue event from the free pool.
9154 *
9155 * Return: Pointer to the newly allocated completion-queue event if successful
9156 * NULL otherwise.
9157 **/
9158struct lpfc_cq_event *
9159lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
9160{
9161 struct lpfc_cq_event *cq_event;
9162 unsigned long iflags;
9163
9164 spin_lock_irqsave(&phba->hbalock, iflags);
9165 cq_event = __lpfc_sli4_cq_event_alloc(phba);
9166 spin_unlock_irqrestore(&phba->hbalock, iflags);
9167 return cq_event;
9168}
9169
9170/**
9171 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
9172 * @phba: pointer to lpfc hba data structure.
9173 * @cq_event: pointer to the completion queue event to be freed.
9174 *
9175 * This routine is the lock free version of the API invoked to release a
9176 * completion-queue event back into the free pool.
9177 **/
9178void
9179__lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
9180 struct lpfc_cq_event *cq_event)
9181{
9182 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
9183}
9184
9185/**
9186 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
9187 * @phba: pointer to lpfc hba data structure.
9188 * @cq_event: pointer to the completion queue event to be freed.
9189 *
9190 * This routine is the lock version of the API invoked to release a
9191 * completion-queue event back into the free pool.
9192 **/
9193void
9194lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
9195 struct lpfc_cq_event *cq_event)
9196{
9197 unsigned long iflags;
9198 spin_lock_irqsave(&phba->hbalock, iflags);
9199 __lpfc_sli4_cq_event_release(phba, cq_event);
9200 spin_unlock_irqrestore(&phba->hbalock, iflags);
9201}
9202
9203/**
9204 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool
9205 * @phba: pointer to lpfc hba data structure.
9206 *
9207 * This routine is to free all the pending completion-queue events to the
9208 * back into the free pool for device reset.
9209 **/
9210static void
9211lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba)
9212{
9213 LIST_HEAD(cqelist);
9214 struct lpfc_cq_event *cqe;
9215 unsigned long iflags;
9216
9217 /* Retrieve all the pending WCQEs from pending WCQE lists */
9218 spin_lock_irqsave(&phba->hbalock, iflags);
9219 /* Pending FCP XRI abort events */
9220 list_splice_init(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue,
9221 &cqelist);
9222 /* Pending ELS XRI abort events */
9223 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
9224 &cqelist);
9225 /* Pending asynnc events */
9226 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
9227 &cqelist);
9228 spin_unlock_irqrestore(&phba->hbalock, iflags);
9229
9230 while (!list_empty(&cqelist)) {
9231 list_remove_head(&cqelist, cqe, struct lpfc_cq_event, list);
9232 lpfc_sli4_cq_event_release(phba, cqe);
9233 }
9234}
9235
9236/**
9237 * lpfc_pci_function_reset - Reset pci function.
9238 * @phba: pointer to lpfc hba data structure.
9239 *
9240 * This routine is invoked to request a PCI function reset. It will destroys
9241 * all resources assigned to the PCI function which originates this request.
9242 *
9243 * Return codes
af901ca1 9244 * 0 - successful
25985edc 9245 * -ENOMEM - No available memory
d439d286 9246 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS		 9247 **/
9248int
9249lpfc_pci_function_reset(struct lpfc_hba *phba)
9250{
9251 LPFC_MBOXQ_t *mboxq;
2fcee4bf 9252 uint32_t rc = 0, if_type;
da0436e9 9253 uint32_t shdr_status, shdr_add_status;
2f6fa2c9
JS		 9254 uint32_t rdy_chk;
9255 uint32_t port_reset = 0;
da0436e9 9256 union lpfc_sli4_cfg_shdr *shdr;
2fcee4bf 9257 struct lpfc_register reg_data;
2b81f942 9258 uint16_t devid;
da0436e9 9259
2fcee4bf
JS		 9260 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9261 switch (if_type) {
9262 case LPFC_SLI_INTF_IF_TYPE_0:
9263 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
9264 GFP_KERNEL);
9265 if (!mboxq) {
9266 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9267 "0494 Unable to allocate memory for "
9268 "issuing SLI_FUNCTION_RESET mailbox "
9269 "command\n");
9270 return -ENOMEM;
9271 }
da0436e9 9272
2fcee4bf
JS		 9273 /* Setup PCI function reset mailbox-ioctl command */
9274 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
9275 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0,
9276 LPFC_SLI4_MBX_EMBED);
9277 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
9278 shdr = (union lpfc_sli4_cfg_shdr *)
9279 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
9280 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
9281 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
9282 &shdr->response);
9283 if (rc != MBX_TIMEOUT)
9284 mempool_free(mboxq, phba->mbox_mem_pool);
9285 if (shdr_status || shdr_add_status || rc) {
9286 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9287 "0495 SLI_FUNCTION_RESET mailbox "
9288 "failed with status x%x add_status x%x,"
9289 " mbx status x%x\n",
9290 shdr_status, shdr_add_status, rc);
9291 rc = -ENXIO;
9292 }
9293 break;
9294 case LPFC_SLI_INTF_IF_TYPE_2:
2f6fa2c9
JS		 9295wait:
9296 /*
9297 * Poll the Port Status Register and wait for RDY for
9298 * up to 30 seconds. If the port doesn't respond, treat
9299 * it as an error.
9300 */
77d093fb 9301 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) {
2f6fa2c9
JS		 9302 if (lpfc_readl(phba->sli4_hba.u.if_type2.
9303 STATUSregaddr, &reg_data.word0)) {
9304 rc = -ENODEV;
9305 goto out;
9306 }
9307 if (bf_get(lpfc_sliport_status_rdy, &reg_data))
9308 break;
9309 msleep(20);
9310 }
9311
9312 if (!bf_get(lpfc_sliport_status_rdy, &reg_data)) {
9313 phba->work_status[0] = readl(
9314 phba->sli4_hba.u.if_type2.ERR1regaddr);
9315 phba->work_status[1] = readl(
9316 phba->sli4_hba.u.if_type2.ERR2regaddr);
9317 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9318 "2890 Port not ready, port status reg "
9319 "0x%x error 1=0x%x, error 2=0x%x\n",
9320 reg_data.word0,
9321 phba->work_status[0],
9322 phba->work_status[1]);
9323 rc = -ENODEV;
9324 goto out;
9325 }
9326
9327 if (!port_reset) {
9328 /*
9329 * Reset the port now
9330 */
2fcee4bf
JS		 9331 reg_data.word0 = 0;
9332 bf_set(lpfc_sliport_ctrl_end, &reg_data,
9333 LPFC_SLIPORT_LITTLE_ENDIAN);
9334 bf_set(lpfc_sliport_ctrl_ip, &reg_data,
9335 LPFC_SLIPORT_INIT_PORT);
9336 writel(reg_data.word0, phba->sli4_hba.u.if_type2.
9337 CTRLregaddr);
8fcb8acd 9338 /* flush */
2b81f942
JS		 9339 pci_read_config_word(phba->pcidev,
9340 PCI_DEVICE_ID, &devid);
2fcee4bf 9341
2f6fa2c9
JS		 9342 port_reset = 1;
9343 msleep(20);
9344 goto wait;
9345 } else if (bf_get(lpfc_sliport_status_rn, &reg_data)) {
9346 rc = -ENODEV;
9347 goto out;
2fcee4bf
JS		 9348 }
9349 break;
2f6fa2c9 9350
2fcee4bf
JS		 9351 case LPFC_SLI_INTF_IF_TYPE_1:
9352 default:
9353 break;
da0436e9 9354 }
2fcee4bf 9355
73d91e50 9356out:
2fcee4bf 9357 /* Catch the not-ready port failure after a port reset. */
2f6fa2c9 9358 if (rc) {
229adb0e
JS		 9359 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9360 "3317 HBA not functional: IP Reset Failed "
2f6fa2c9 9361 "try: echo fw_reset > board_mode\n");
2fcee4bf 9362 rc = -ENODEV;
229adb0e 9363 }
2fcee4bf 9364
da0436e9
JS		 9365 return rc;
9366}
9367
da0436e9
JS		 9368/**
9369 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space.
9370 * @phba: pointer to lpfc hba data structure.
9371 *
9372 * This routine is invoked to set up the PCI device memory space for device
9373 * with SLI-4 interface spec.
9374 *
9375 * Return codes
af901ca1 9376 * 0 - successful
da0436e9
JS		 9377 * other values - error
9378 **/
9379static int
9380lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
9381{
9382 struct pci_dev *pdev;
9383 unsigned long bar0map_len, bar1map_len, bar2map_len;
9384 int error = -ENODEV;
2fcee4bf 9385 uint32_t if_type;
da0436e9
JS		 9386
9387 /* Obtain PCI device reference */
9388 if (!phba->pcidev)
9389 return error;
9390 else
9391 pdev = phba->pcidev;
9392
9393 /* Set the device DMA mask size */
8e68597d
MR		 9394 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
9395 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
9396 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
9397 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
da0436e9 9398 return error;
8e68597d
MR		 9399 }
9400 }
da0436e9 9401
2fcee4bf
JS		 9402 /*
9403 * The BARs and register set definitions and offset locations are
9404 * dependent on the if_type.
9405 */
9406 if (pci_read_config_dword(pdev, LPFC_SLI_INTF,
9407 &phba->sli4_hba.sli_intf.word0)) {
9408 return error;
9409 }
9410
9411 /* There is no SLI3 failback for SLI4 devices. */
9412 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
9413 LPFC_SLI_INTF_VALID) {
9414 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9415 "2894 SLI_INTF reg contents invalid "
9416 "sli_intf reg 0x%x\n",
9417 phba->sli4_hba.sli_intf.word0);
9418 return error;
9419 }
9420
9421 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9422 /*
9423 * Get the bus address of SLI4 device Bar regions and the
9424 * number of bytes required by each mapping. The mapping of the
9425 * particular PCI BARs regions is dependent on the type of
9426 * SLI4 device.
da0436e9 9427 */
f5ca6f2e
JS		 9428 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) {
9429 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0);
9430 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0);
2fcee4bf
JS		 9431
9432 /*
9433 * Map SLI4 PCI Config Space Register base to a kernel virtual
9434 * addr
9435 */
9436 phba->sli4_hba.conf_regs_memmap_p =
9437 ioremap(phba->pci_bar0_map, bar0map_len);
9438 if (!phba->sli4_hba.conf_regs_memmap_p) {
9439 dev_printk(KERN_ERR, &pdev->dev,
9440 "ioremap failed for SLI4 PCI config "
9441 "registers.\n");
9442 goto out;
9443 }
f5ca6f2e 9444 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
2fcee4bf
JS		 9445 /* Set up BAR0 PCI config space register memory map */
9446 lpfc_sli4_bar0_register_memmap(phba, if_type);
1dfb5a47
JS		 9447 } else {
9448 phba->pci_bar0_map = pci_resource_start(pdev, 1);
9449 bar0map_len = pci_resource_len(pdev, 1);
2fcee4bf
JS		 9450 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
9451 dev_printk(KERN_ERR, &pdev->dev,
9452 "FATAL - No BAR0 mapping for SLI4, if_type 2\n");
9453 goto out;
9454 }
9455 phba->sli4_hba.conf_regs_memmap_p =
da0436e9 9456 ioremap(phba->pci_bar0_map, bar0map_len);
2fcee4bf
JS		 9457 if (!phba->sli4_hba.conf_regs_memmap_p) {
9458 dev_printk(KERN_ERR, &pdev->dev,
9459 "ioremap failed for SLI4 PCI config "
9460 "registers.\n");
9461 goto out;
9462 }
9463 lpfc_sli4_bar0_register_memmap(phba, if_type);
da0436e9
JS		 9464 }
9465
e4b9794e
JS		 9466 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
9467 if (pci_resource_start(pdev, PCI_64BIT_BAR2)) {
9468 /*
9469 * Map SLI4 if type 0 HBA Control Register base to a
9470 * kernel virtual address and setup the registers.
9471 */
9472 phba->pci_bar1_map = pci_resource_start(pdev,
9473 PCI_64BIT_BAR2);
9474 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
9475 phba->sli4_hba.ctrl_regs_memmap_p =
9476 ioremap(phba->pci_bar1_map,
9477 bar1map_len);
9478 if (!phba->sli4_hba.ctrl_regs_memmap_p) {
9479 dev_err(&pdev->dev,
9480 "ioremap failed for SLI4 HBA "
9481 "control registers.\n");
9482 error = -ENOMEM;
9483 goto out_iounmap_conf;
9484 }
9485 phba->pci_bar2_memmap_p =
9486 phba->sli4_hba.ctrl_regs_memmap_p;
9487 lpfc_sli4_bar1_register_memmap(phba);
9488 } else {
9489 error = -ENOMEM;
2fcee4bf
JS		 9490 goto out_iounmap_conf;
9491 }
da0436e9
JS		 9492 }
9493
e4b9794e
JS		 9494 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
9495 if (pci_resource_start(pdev, PCI_64BIT_BAR4)) {
9496 /*
9497 * Map SLI4 if type 0 HBA Doorbell Register base to
9498 * a kernel virtual address and setup the registers.
9499 */
9500 phba->pci_bar2_map = pci_resource_start(pdev,
9501 PCI_64BIT_BAR4);
9502 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
9503 phba->sli4_hba.drbl_regs_memmap_p =
9504 ioremap(phba->pci_bar2_map,
9505 bar2map_len);
9506 if (!phba->sli4_hba.drbl_regs_memmap_p) {
9507 dev_err(&pdev->dev,
9508 "ioremap failed for SLI4 HBA"
9509 " doorbell registers.\n");
9510 error = -ENOMEM;
9511 goto out_iounmap_ctrl;
9512 }
9513 phba->pci_bar4_memmap_p =
9514 phba->sli4_hba.drbl_regs_memmap_p;
9515 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
9516 if (error)
9517 goto out_iounmap_all;
9518 } else {
9519 error = -ENOMEM;
2fcee4bf 9520 goto out_iounmap_all;
e4b9794e 9521 }
da0436e9
JS		 9522 }
9523
da0436e9
JS		 9524 return 0;
9525
9526out_iounmap_all:
9527 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
9528out_iounmap_ctrl:
9529 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
9530out_iounmap_conf:
9531 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9532out:
9533 return error;
9534}
9535
9536/**
9537 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space.
9538 * @phba: pointer to lpfc hba data structure.
9539 *
9540 * This routine is invoked to unset the PCI device memory space for device
9541 * with SLI-4 interface spec.
9542 **/
9543static void
9544lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba)
9545{
2e90f4b5
JS		 9546 uint32_t if_type;
9547 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
da0436e9 9548
2e90f4b5
JS		 9549 switch (if_type) {
9550 case LPFC_SLI_INTF_IF_TYPE_0:
9551 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
9552 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
9553 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9554 break;
9555 case LPFC_SLI_INTF_IF_TYPE_2:
9556 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9557 break;
9558 case LPFC_SLI_INTF_IF_TYPE_1:
9559 default:
9560 dev_printk(KERN_ERR, &phba->pcidev->dev,
9561 "FATAL - unsupported SLI4 interface type - %d\n",
9562 if_type);
9563 break;
9564 }
da0436e9
JS		 9565}
9566
9567/**
9568 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device
9569 * @phba: pointer to lpfc hba data structure.
9570 *
9571 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9572 * with SLI-3 interface specs.
da0436e9
JS		 9573 *
9574 * Return codes
af901ca1 9575 * 0 - successful
da0436e9
JS		 9576 * other values - error
9577 **/
9578static int
9579lpfc_sli_enable_msix(struct lpfc_hba *phba)
9580{
45ffac19 9581 int rc;
da0436e9
JS		 9582 LPFC_MBOXQ_t *pmb;
9583
9584 /* Set up MSI-X multi-message vectors */
45ffac19
CH		 9585 rc = pci_alloc_irq_vectors(phba->pcidev,
9586 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX);
9587 if (rc < 0) {
da0436e9
JS		 9588 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9589 "0420 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9590 goto vec_fail_out;
da0436e9 9591 }
45ffac19 9592
da0436e9
JS		 9593 /*
9594 * Assign MSI-X vectors to interrupt handlers
9595 */
9596
9597 /* vector-0 is associated to slow-path handler */
45ffac19 9598 rc = request_irq(pci_irq_vector(phba->pcidev, 0),
ed243d37 9599 &lpfc_sli_sp_intr_handler, 0,
da0436e9
JS		 9600 LPFC_SP_DRIVER_HANDLER_NAME, phba);
9601 if (rc) {
9602 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9603 "0421 MSI-X slow-path request_irq failed "
9604 "(%d)\n", rc);
9605 goto msi_fail_out;
9606 }
9607
9608 /* vector-1 is associated to fast-path handler */
45ffac19 9609 rc = request_irq(pci_irq_vector(phba->pcidev, 1),
ed243d37 9610 &lpfc_sli_fp_intr_handler, 0,
da0436e9
JS		 9611 LPFC_FP_DRIVER_HANDLER_NAME, phba);
9612
9613 if (rc) {
9614 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9615 "0429 MSI-X fast-path request_irq failed "
9616 "(%d)\n", rc);
9617 goto irq_fail_out;
9618 }
9619
9620 /*
9621 * Configure HBA MSI-X attention conditions to messages
9622 */
9623 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9624
9625 if (!pmb) {
9626 rc = -ENOMEM;
9627 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9628 "0474 Unable to allocate memory for issuing "
9629 "MBOX_CONFIG_MSI command\n");
9630 goto mem_fail_out;
9631 }
9632 rc = lpfc_config_msi(phba, pmb);
9633 if (rc)
9634 goto mbx_fail_out;
9635 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
9636 if (rc != MBX_SUCCESS) {
9637 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX,
9638 "0351 Config MSI mailbox command failed, "
9639 "mbxCmd x%x, mbxStatus x%x\n",
9640 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus);
9641 goto mbx_fail_out;
9642 }
9643
9644 /* Free memory allocated for mailbox command */
9645 mempool_free(pmb, phba->mbox_mem_pool);
9646 return rc;
9647
9648mbx_fail_out:
9649 /* Free memory allocated for mailbox command */
9650 mempool_free(pmb, phba->mbox_mem_pool);
9651
9652mem_fail_out:
9653 /* free the irq already requested */
45ffac19 9654 free_irq(pci_irq_vector(phba->pcidev, 1), phba);
da0436e9
JS		 9655
9656irq_fail_out:
9657 /* free the irq already requested */
45ffac19 9658 free_irq(pci_irq_vector(phba->pcidev, 0), phba);
da0436e9
JS		 9659
9660msi_fail_out:
9661 /* Unconfigure MSI-X capability structure */
45ffac19 9662 pci_free_irq_vectors(phba->pcidev);
029165ac
AG		 9663
9664vec_fail_out:
da0436e9
JS		 9665 return rc;
9666}
9667
da0436e9
JS		 9668/**
9669 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device.
9670 * @phba: pointer to lpfc hba data structure.
9671 *
9672 * This routine is invoked to enable the MSI interrupt mode to device with
9673 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to
9674 * enable the MSI vector. The device driver is responsible for calling the
9675 * request_irq() to register MSI vector with a interrupt the handler, which
9676 * is done in this function.
9677 *
9678 * Return codes
af901ca1 9679 * 0 - successful
da0436e9
JS		 9680 * other values - error
9681 */
9682static int
9683lpfc_sli_enable_msi(struct lpfc_hba *phba)
9684{
9685 int rc;
9686
9687 rc = pci_enable_msi(phba->pcidev);
9688 if (!rc)
9689 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9690 "0462 PCI enable MSI mode success.\n");
9691 else {
9692 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9693 "0471 PCI enable MSI mode failed (%d)\n", rc);
9694 return rc;
9695 }
9696
9697 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
ed243d37 9698 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS		 9699 if (rc) {
9700 pci_disable_msi(phba->pcidev);
9701 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9702 "0478 MSI request_irq failed (%d)\n", rc);
9703 }
9704 return rc;
9705}
9706
da0436e9
JS		 9707/**
9708 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device.
9709 * @phba: pointer to lpfc hba data structure.
9710 *
9711 * This routine is invoked to enable device interrupt and associate driver's
9712 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface
9713 * spec. Depends on the interrupt mode configured to the driver, the driver
9714 * will try to fallback from the configured interrupt mode to an interrupt
9715 * mode which is supported by the platform, kernel, and device in the order
9716 * of:
9717 * MSI-X -> MSI -> IRQ.
9718 *
9719 * Return codes
af901ca1 9720 * 0 - successful
da0436e9
JS		 9721 * other values - error
9722 **/
9723static uint32_t
9724lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9725{
9726 uint32_t intr_mode = LPFC_INTR_ERROR;
9727 int retval;
9728
9729 if (cfg_mode == 2) {
9730 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */
9731 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3);
9732 if (!retval) {
9733 /* Now, try to enable MSI-X interrupt mode */
9734 retval = lpfc_sli_enable_msix(phba);
9735 if (!retval) {
9736 /* Indicate initialization to MSI-X mode */
9737 phba->intr_type = MSIX;
9738 intr_mode = 2;
9739 }
9740 }
9741 }
9742
9743 /* Fallback to MSI if MSI-X initialization failed */
9744 if (cfg_mode >= 1 && phba->intr_type == NONE) {
9745 retval = lpfc_sli_enable_msi(phba);
9746 if (!retval) {
9747 /* Indicate initialization to MSI mode */
9748 phba->intr_type = MSI;
9749 intr_mode = 1;
9750 }
9751 }
9752
9753 /* Fallback to INTx if both MSI-X/MSI initalization failed */
9754 if (phba->intr_type == NONE) {
9755 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
9756 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
9757 if (!retval) {
9758 /* Indicate initialization to INTx mode */
9759 phba->intr_type = INTx;
9760 intr_mode = 0;
9761 }
9762 }
9763 return intr_mode;
9764}
9765
9766/**
9767 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device.
9768 * @phba: pointer to lpfc hba data structure.
9769 *
9770 * This routine is invoked to disable device interrupt and disassociate the
9771 * driver's interrupt handler(s) from interrupt vector(s) to device with
9772 * SLI-3 interface spec. Depending on the interrupt mode, the driver will
9773 * release the interrupt vector(s) for the message signaled interrupt.
9774 **/
9775static void
9776lpfc_sli_disable_intr(struct lpfc_hba *phba)
9777{
45ffac19
CH		 9778 int nr_irqs, i;
9779
da0436e9 9780 if (phba->intr_type == MSIX)
45ffac19
CH		 9781 nr_irqs = LPFC_MSIX_VECTORS;
9782 else
9783 nr_irqs = 1;
9784
9785 for (i = 0; i < nr_irqs; i++)
9786 free_irq(pci_irq_vector(phba->pcidev, i), phba);
9787 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS		 9788
9789 /* Reset interrupt management states */
9790 phba->intr_type = NONE;
9791 phba->sli.slistat.sli_intr = 0;
da0436e9
JS		 9792}
9793
7bb03bbf 9794/**
895427bd 9795 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings
7bb03bbf 9796 * @phba: pointer to lpfc hba data structure.
895427bd
JS		 9797 * @vectors: number of msix vectors allocated.
9798 *
9799 * The routine will figure out the CPU affinity assignment for every
9800 * MSI-X vector allocated for the HBA. The hba_eq_hdl will be updated
9801 * with a pointer to the CPU mask that defines ALL the CPUs this vector
9802 * can be associated with. If the vector can be unquely associated with
9803 * a single CPU, that CPU will be recorded in hba_eq_hdl[index].cpu.
9804 * In addition, the CPU to IO channel mapping will be calculated
9805 * and the phba->sli4_hba.cpu_map array will reflect this.
7bb03bbf 9806 */
895427bd
JS		 9807static void
9808lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
7bb03bbf
JS		 9809{
9810 struct lpfc_vector_map_info *cpup;
895427bd
JS		 9811 int index = 0;
9812 int vec = 0;
7bb03bbf 9813 int cpu;
7bb03bbf
JS		 9814#ifdef CONFIG_X86
9815 struct cpuinfo_x86 *cpuinfo;
9816#endif
7bb03bbf
JS		 9817
9818 /* Init cpu_map array */
9819 memset(phba->sli4_hba.cpu_map, 0xff,
9820 (sizeof(struct lpfc_vector_map_info) *
895427bd 9821 phba->sli4_hba.num_present_cpu));
7bb03bbf
JS		 9822
9823 /* Update CPU map with physical id and core id of each CPU */
9824 cpup = phba->sli4_hba.cpu_map;
9825 for (cpu = 0; cpu < phba->sli4_hba.num_present_cpu; cpu++) {
9826#ifdef CONFIG_X86
9827 cpuinfo = &cpu_data(cpu);
9828 cpup->phys_id = cpuinfo->phys_proc_id;
9829 cpup->core_id = cpuinfo->cpu_core_id;
9830#else
9831 /* No distinction between CPUs for other platforms */
9832 cpup->phys_id = 0;
9833 cpup->core_id = 0;
9834#endif
895427bd
JS		 9835 cpup->channel_id = index; /* For now round robin */
9836 cpup->irq = pci_irq_vector(phba->pcidev, vec);
9837 vec++;
9838 if (vec >= vectors)
9839 vec = 0;
9840 index++;
9841 if (index >= phba->cfg_fcp_io_channel)
9842 index = 0;
7bb03bbf
JS		 9843 cpup++;
9844 }
7bb03bbf
JS		 9845}
9846
9847
da0436e9
JS		 9848/**
9849 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device
9850 * @phba: pointer to lpfc hba data structure.
9851 *
9852 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9853 * with SLI-4 interface spec.
da0436e9
JS		 9854 *
9855 * Return codes
af901ca1 9856 * 0 - successful
da0436e9
JS		 9857 * other values - error
9858 **/
9859static int
9860lpfc_sli4_enable_msix(struct lpfc_hba *phba)
9861{
75baf696 9862 int vectors, rc, index;
b83d005e 9863 char *name;
da0436e9
JS		 9864
9865 /* Set up MSI-X multi-message vectors */
895427bd 9866 vectors = phba->io_channel_irqs;
45ffac19 9867 if (phba->cfg_fof)
1ba981fd 9868 vectors++;
45ffac19 9869
f358dd0c
JS		 9870 rc = pci_alloc_irq_vectors(phba->pcidev,
9871 (phba->nvmet_support) ? 1 : 2,
9872 vectors, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
4f871e1b 9873 if (rc < 0) {
da0436e9
JS		 9874 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9875 "0484 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9876 goto vec_fail_out;
da0436e9 9877 }
4f871e1b 9878 vectors = rc;
75baf696 9879
7bb03bbf 9880 /* Assign MSI-X vectors to interrupt handlers */
67d12733 9881 for (index = 0; index < vectors; index++) {
b83d005e
JS		 9882 name = phba->sli4_hba.hba_eq_hdl[index].handler_name;
9883 memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ);
9884 snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ,
4305f183 9885 LPFC_DRIVER_HANDLER_NAME"%d", index);
da0436e9 9886
895427bd
JS		 9887 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9888 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
9889 atomic_set(&phba->sli4_hba.hba_eq_hdl[index].hba_eq_in_use, 1);
1ba981fd 9890 if (phba->cfg_fof && (index == (vectors - 1)))
45ffac19 9891 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9892 &lpfc_sli4_fof_intr_handler, 0,
b83d005e 9893 name,
895427bd 9894 &phba->sli4_hba.hba_eq_hdl[index]);
1ba981fd 9895 else
45ffac19 9896 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9897 &lpfc_sli4_hba_intr_handler, 0,
b83d005e 9898 name,
895427bd 9899 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9
JS		 9900 if (rc) {
9901 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9902 "0486 MSI-X fast-path (%d) "
9903 "request_irq failed (%d)\n", index, rc);
9904 goto cfg_fail_out;
9905 }
9906 }
9907
1ba981fd
JS		 9908 if (phba->cfg_fof)
9909 vectors--;
9910
895427bd 9911 if (vectors != phba->io_channel_irqs) {
82c3e9ba
JS		 9912 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9913 "3238 Reducing IO channels to match number of "
9914 "MSI-X vectors, requested %d got %d\n",
895427bd
JS		 9915 phba->io_channel_irqs, vectors);
9916 if (phba->cfg_fcp_io_channel > vectors)
9917 phba->cfg_fcp_io_channel = vectors;
9918 if (phba->cfg_nvme_io_channel > vectors)
9919 phba->cfg_nvme_io_channel = vectors;
9920 if (phba->cfg_fcp_io_channel > phba->cfg_nvme_io_channel)
9921 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
9922 else
9923 phba->io_channel_irqs = phba->cfg_nvme_io_channel;
82c3e9ba 9924 }
895427bd 9925 lpfc_cpu_affinity_check(phba, vectors);
7bb03bbf 9926
da0436e9
JS		 9927 return rc;
9928
9929cfg_fail_out:
9930 /* free the irq already requested */
895427bd
JS		 9931 for (--index; index >= 0; index--)
9932 free_irq(pci_irq_vector(phba->pcidev, index),
9933 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9 9934
da0436e9 9935 /* Unconfigure MSI-X capability structure */
45ffac19 9936 pci_free_irq_vectors(phba->pcidev);
029165ac
AG		 9937
9938vec_fail_out:
da0436e9
JS		 9939 return rc;
9940}
9941
da0436e9
JS		 9942/**
9943 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device
9944 * @phba: pointer to lpfc hba data structure.
9945 *
9946 * This routine is invoked to enable the MSI interrupt mode to device with
9947 * SLI-4 interface spec. The kernel function pci_enable_msi() is called
9948 * to enable the MSI vector. The device driver is responsible for calling
9949 * the request_irq() to register MSI vector with a interrupt the handler,
9950 * which is done in this function.
9951 *
9952 * Return codes
af901ca1 9953 * 0 - successful
da0436e9
JS		 9954 * other values - error
9955 **/
9956static int
9957lpfc_sli4_enable_msi(struct lpfc_hba *phba)
9958{
9959 int rc, index;
9960
9961 rc = pci_enable_msi(phba->pcidev);
9962 if (!rc)
9963 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9964 "0487 PCI enable MSI mode success.\n");
9965 else {
9966 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9967 "0488 PCI enable MSI mode failed (%d)\n", rc);
9968 return rc;
9969 }
9970
9971 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
ed243d37 9972 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS		 9973 if (rc) {
9974 pci_disable_msi(phba->pcidev);
9975 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9976 "0490 MSI request_irq failed (%d)\n", rc);
75baf696 9977 return rc;
da0436e9
JS		 9978 }
9979
895427bd
JS		 9980 for (index = 0; index < phba->io_channel_irqs; index++) {
9981 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9982 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
da0436e9
JS		 9983 }
9984
1ba981fd 9985 if (phba->cfg_fof) {
895427bd
JS		 9986 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9987 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
1ba981fd 9988 }
75baf696 9989 return 0;
da0436e9
JS		 9990}
9991
da0436e9
JS		 9992/**
9993 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device
9994 * @phba: pointer to lpfc hba data structure.
9995 *
9996 * This routine is invoked to enable device interrupt and associate driver's
9997 * interrupt handler(s) to interrupt vector(s) to device with SLI-4
9998 * interface spec. Depends on the interrupt mode configured to the driver,
9999 * the driver will try to fallback from the configured interrupt mode to an
10000 * interrupt mode which is supported by the platform, kernel, and device in
10001 * the order of:
10002 * MSI-X -> MSI -> IRQ.
10003 *
10004 * Return codes
af901ca1 10005 * 0 - successful
da0436e9
JS		 10006 * other values - error
10007 **/
10008static uint32_t
10009lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
10010{
10011 uint32_t intr_mode = LPFC_INTR_ERROR;
895427bd 10012 int retval, idx;
da0436e9
JS		 10013
10014 if (cfg_mode == 2) {
10015 /* Preparation before conf_msi mbox cmd */
10016 retval = 0;
10017 if (!retval) {
10018 /* Now, try to enable MSI-X interrupt mode */
10019 retval = lpfc_sli4_enable_msix(phba);
10020 if (!retval) {
10021 /* Indicate initialization to MSI-X mode */
10022 phba->intr_type = MSIX;
10023 intr_mode = 2;
10024 }
10025 }
10026 }
10027
10028 /* Fallback to MSI if MSI-X initialization failed */
10029 if (cfg_mode >= 1 && phba->intr_type == NONE) {
10030 retval = lpfc_sli4_enable_msi(phba);
10031 if (!retval) {
10032 /* Indicate initialization to MSI mode */
10033 phba->intr_type = MSI;
10034 intr_mode = 1;
10035 }
10036 }
10037
10038 /* Fallback to INTx if both MSI-X/MSI initalization failed */
10039 if (phba->intr_type == NONE) {
10040 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
10041 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
10042 if (!retval) {
895427bd
JS		 10043 struct lpfc_hba_eq_hdl *eqhdl;
10044
da0436e9
JS		 10045 /* Indicate initialization to INTx mode */
10046 phba->intr_type = INTx;
10047 intr_mode = 0;
895427bd
JS		 10048
10049 for (idx = 0; idx < phba->io_channel_irqs; idx++) {
10050 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
10051 eqhdl->idx = idx;
10052 eqhdl->phba = phba;
10053 atomic_set(&eqhdl->hba_eq_in_use, 1);
da0436e9 10054 }
1ba981fd 10055 if (phba->cfg_fof) {
895427bd
JS		 10056 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
10057 eqhdl->idx = idx;
10058 eqhdl->phba = phba;
10059 atomic_set(&eqhdl->hba_eq_in_use, 1);
1ba981fd 10060 }
da0436e9
JS		 10061 }
10062 }
10063 return intr_mode;
10064}
10065
10066/**
10067 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device
10068 * @phba: pointer to lpfc hba data structure.
10069 *
10070 * This routine is invoked to disable device interrupt and disassociate
10071 * the driver's interrupt handler(s) from interrupt vector(s) to device
10072 * with SLI-4 interface spec. Depending on the interrupt mode, the driver
10073 * will release the interrupt vector(s) for the message signaled interrupt.
10074 **/
10075static void
10076lpfc_sli4_disable_intr(struct lpfc_hba *phba)
10077{
10078 /* Disable the currently initialized interrupt mode */
45ffac19
CH		 10079 if (phba->intr_type == MSIX) {
10080 int index;
10081
10082 /* Free up MSI-X multi-message vectors */
895427bd
JS		 10083 for (index = 0; index < phba->io_channel_irqs; index++)
10084 free_irq(pci_irq_vector(phba->pcidev, index),
10085 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19
CH		 10086
10087 if (phba->cfg_fof)
895427bd
JS		 10088 free_irq(pci_irq_vector(phba->pcidev, index),
10089 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19 10090 } else {
da0436e9 10091 free_irq(phba->pcidev->irq, phba);
45ffac19
CH		 10092 }
10093
10094 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS		 10095
10096 /* Reset interrupt management states */
10097 phba->intr_type = NONE;
10098 phba->sli.slistat.sli_intr = 0;
da0436e9
JS		 10099}
10100
10101/**
10102 * lpfc_unset_hba - Unset SLI3 hba device initialization
10103 * @phba: pointer to lpfc hba data structure.
10104 *
10105 * This routine is invoked to unset the HBA device initialization steps to
10106 * a device with SLI-3 interface spec.
10107 **/
10108static void
10109lpfc_unset_hba(struct lpfc_hba *phba)
10110{
10111 struct lpfc_vport *vport = phba->pport;
10112 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
10113
10114 spin_lock_irq(shost->host_lock);
10115 vport->load_flag |= FC_UNLOADING;
10116 spin_unlock_irq(shost->host_lock);
10117
72859909
JS		 10118 kfree(phba->vpi_bmask);
10119 kfree(phba->vpi_ids);
10120
da0436e9
JS		 10121 lpfc_stop_hba_timers(phba);
10122
10123 phba->pport->work_port_events = 0;
10124
10125 lpfc_sli_hba_down(phba);
10126
10127 lpfc_sli_brdrestart(phba);
10128
10129 lpfc_sli_disable_intr(phba);
10130
10131 return;
10132}
10133
5af5eee7
JS		 10134/**
10135 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy
10136 * @phba: Pointer to HBA context object.
10137 *
10138 * This function is called in the SLI4 code path to wait for completion
10139 * of device's XRIs exchange busy. It will check the XRI exchange busy
10140 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after
10141 * that, it will check the XRI exchange busy on outstanding FCP and ELS
10142 * I/Os every 30 seconds, log error message, and wait forever. Only when
10143 * all XRI exchange busy complete, the driver unload shall proceed with
10144 * invoking the function reset ioctl mailbox command to the CNA and the
10145 * the rest of the driver unload resource release.
10146 **/
10147static void
10148lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba)
10149{
10150 int wait_time = 0;
895427bd 10151 int nvme_xri_cmpl = 1;
86c67379 10152 int nvmet_xri_cmpl = 1;
895427bd 10153 int fcp_xri_cmpl = 1;
5af5eee7
JS		 10154 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
10155
c3725bdc
JS		 10156 /* Driver just aborted IOs during the hba_unset process. Pause
10157 * here to give the HBA time to complete the IO and get entries
10158 * into the abts lists.
10159 */
10160 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1 * 5);
10161
10162 /* Wait for NVME pending IO to flush back to transport. */
10163 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
10164 lpfc_nvme_wait_for_io_drain(phba);
10165
895427bd
JS		 10166 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
10167 fcp_xri_cmpl =
10168 list_empty(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
86c67379 10169 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd
JS		 10170 nvme_xri_cmpl =
10171 list_empty(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
86c67379
JS		 10172 nvmet_xri_cmpl =
10173 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
10174 }
895427bd 10175
f358dd0c
JS		 10176 while (!fcp_xri_cmpl || !els_xri_cmpl || !nvme_xri_cmpl ||
10177 !nvmet_xri_cmpl) {
5af5eee7 10178 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) {
895427bd
JS		 10179 if (!nvme_xri_cmpl)
10180 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10181 "6100 NVME XRI exchange busy "
10182 "wait time: %d seconds.\n",
10183 wait_time/1000);
5af5eee7
JS		 10184 if (!fcp_xri_cmpl)
10185 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10186 "2877 FCP XRI exchange busy "
10187 "wait time: %d seconds.\n",
10188 wait_time/1000);
10189 if (!els_xri_cmpl)
10190 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10191 "2878 ELS XRI exchange busy "
10192 "wait time: %d seconds.\n",
10193 wait_time/1000);
10194 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2);
10195 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2;
10196 } else {
10197 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1);
10198 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1;
10199 }
86c67379 10200 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd
JS		 10201 nvme_xri_cmpl = list_empty(
10202 &phba->sli4_hba.lpfc_abts_nvme_buf_list);
86c67379
JS		 10203 nvmet_xri_cmpl = list_empty(
10204 &phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
10205 }
895427bd
JS		 10206
10207 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
10208 fcp_xri_cmpl = list_empty(
10209 &phba->sli4_hba.lpfc_abts_scsi_buf_list);
10210
5af5eee7
JS		 10211 els_xri_cmpl =
10212 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c 10213
5af5eee7
JS		 10214 }
10215}
10216
da0436e9
JS		 10217/**
10218 * lpfc_sli4_hba_unset - Unset the fcoe hba
10219 * @phba: Pointer to HBA context object.
10220 *
10221 * This function is called in the SLI4 code path to reset the HBA's FCoE
10222 * function. The caller is not required to hold any lock. This routine
10223 * issues PCI function reset mailbox command to reset the FCoE function.
10224 * At the end of the function, it calls lpfc_hba_down_post function to
10225 * free any pending commands.
10226 **/
10227static void
10228lpfc_sli4_hba_unset(struct lpfc_hba *phba)
10229{
10230 int wait_cnt = 0;
10231 LPFC_MBOXQ_t *mboxq;
912e3acd 10232 struct pci_dev *pdev = phba->pcidev;
da0436e9
JS		 10233
10234 lpfc_stop_hba_timers(phba);
10235 phba->sli4_hba.intr_enable = 0;
10236
10237 /*
10238 * Gracefully wait out the potential current outstanding asynchronous
10239 * mailbox command.
10240 */
10241
10242 /* First, block any pending async mailbox command from posted */
10243 spin_lock_irq(&phba->hbalock);
10244 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
10245 spin_unlock_irq(&phba->hbalock);
10246 /* Now, trying to wait it out if we can */
10247 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
10248 msleep(10);
10249 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT)
10250 break;
10251 }
10252 /* Forcefully release the outstanding mailbox command if timed out */
10253 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
10254 spin_lock_irq(&phba->hbalock);
10255 mboxq = phba->sli.mbox_active;
10256 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
10257 __lpfc_mbox_cmpl_put(phba, mboxq);
10258 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
10259 phba->sli.mbox_active = NULL;
10260 spin_unlock_irq(&phba->hbalock);
10261 }
10262
5af5eee7
JS		 10263 /* Abort all iocbs associated with the hba */
10264 lpfc_sli_hba_iocb_abort(phba);
10265
10266 /* Wait for completion of device XRI exchange busy */
10267 lpfc_sli4_xri_exchange_busy_wait(phba);
10268
da0436e9
JS		 10269 /* Disable PCI subsystem interrupt */
10270 lpfc_sli4_disable_intr(phba);
10271
912e3acd
JS		 10272 /* Disable SR-IOV if enabled */
10273 if (phba->cfg_sriov_nr_virtfn)
10274 pci_disable_sriov(pdev);
10275
da0436e9
JS		 10276 /* Stop kthread signal shall trigger work_done one more time */
10277 kthread_stop(phba->worker_thread);
10278
d1f525aa
JS		 10279 /* Unset the queues shared with the hardware then release all
10280 * allocated resources.
10281 */
10282 lpfc_sli4_queue_unset(phba);
10283 lpfc_sli4_queue_destroy(phba);
10284
3677a3a7
JS		 10285 /* Reset SLI4 HBA FCoE function */
10286 lpfc_pci_function_reset(phba);
10287
da0436e9
JS		 10288 /* Stop the SLI4 device port */
10289 phba->pport->work_port_events = 0;
10290}
10291
28baac74
JS		 10292 /**
10293 * lpfc_pc_sli4_params_get - Get the SLI4_PARAMS port capabilities.
10294 * @phba: Pointer to HBA context object.
10295 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
10296 *
10297 * This function is called in the SLI4 code path to read the port's
10298 * sli4 capabilities.
10299 *
10300 * This function may be be called from any context that can block-wait
10301 * for the completion. The expectation is that this routine is called
10302 * typically from probe_one or from the online routine.
10303 **/
10304int
10305lpfc_pc_sli4_params_get(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
10306{
10307 int rc;
10308 struct lpfc_mqe *mqe;
10309 struct lpfc_pc_sli4_params *sli4_params;
10310 uint32_t mbox_tmo;
10311
10312 rc = 0;
10313 mqe = &mboxq->u.mqe;
10314
10315 /* Read the port's SLI4 Parameters port capabilities */
fedd3b7b 10316 lpfc_pc_sli4_params(mboxq);
28baac74
JS		 10317 if (!phba->sli4_hba.intr_enable)
10318 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
10319 else {
a183a15f 10320 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
28baac74
JS		 10321 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
10322 }
10323
10324 if (unlikely(rc))
10325 return 1;
10326
10327 sli4_params = &phba->sli4_hba.pc_sli4_params;
10328 sli4_params->if_type = bf_get(if_type, &mqe->un.sli4_params);
10329 sli4_params->sli_rev = bf_get(sli_rev, &mqe->un.sli4_params);
10330 sli4_params->sli_family = bf_get(sli_family, &mqe->un.sli4_params);
10331 sli4_params->featurelevel_1 = bf_get(featurelevel_1,
10332 &mqe->un.sli4_params);
10333 sli4_params->featurelevel_2 = bf_get(featurelevel_2,
10334 &mqe->un.sli4_params);
10335 sli4_params->proto_types = mqe->un.sli4_params.word3;
10336 sli4_params->sge_supp_len = mqe->un.sli4_params.sge_supp_len;
10337 sli4_params->if_page_sz = bf_get(if_page_sz, &mqe->un.sli4_params);
10338 sli4_params->rq_db_window = bf_get(rq_db_window, &mqe->un.sli4_params);
10339 sli4_params->loopbk_scope = bf_get(loopbk_scope, &mqe->un.sli4_params);
10340 sli4_params->eq_pages_max = bf_get(eq_pages, &mqe->un.sli4_params);
10341 sli4_params->eqe_size = bf_get(eqe_size, &mqe->un.sli4_params);
10342 sli4_params->cq_pages_max = bf_get(cq_pages, &mqe->un.sli4_params);
10343 sli4_params->cqe_size = bf_get(cqe_size, &mqe->un.sli4_params);
10344 sli4_params->mq_pages_max = bf_get(mq_pages, &mqe->un.sli4_params);
10345 sli4_params->mqe_size = bf_get(mqe_size, &mqe->un.sli4_params);
10346 sli4_params->mq_elem_cnt = bf_get(mq_elem_cnt, &mqe->un.sli4_params);
10347 sli4_params->wq_pages_max = bf_get(wq_pages, &mqe->un.sli4_params);
10348 sli4_params->wqe_size = bf_get(wqe_size, &mqe->un.sli4_params);
10349 sli4_params->rq_pages_max = bf_get(rq_pages, &mqe->un.sli4_params);
10350 sli4_params->rqe_size = bf_get(rqe_size, &mqe->un.sli4_params);
10351 sli4_params->hdr_pages_max = bf_get(hdr_pages, &mqe->un.sli4_params);
10352 sli4_params->hdr_size = bf_get(hdr_size, &mqe->un.sli4_params);
10353 sli4_params->hdr_pp_align = bf_get(hdr_pp_align, &mqe->un.sli4_params);
10354 sli4_params->sgl_pages_max = bf_get(sgl_pages, &mqe->un.sli4_params);
10355 sli4_params->sgl_pp_align = bf_get(sgl_pp_align, &mqe->un.sli4_params);
0558056c
JS		 10356
10357 /* Make sure that sge_supp_len can be handled by the driver */
10358 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
10359 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
10360
28baac74
JS		 10361 return rc;
10362}
10363
fedd3b7b
JS		 10364/**
10365 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS.
10366 * @phba: Pointer to HBA context object.
10367 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
10368 *
10369 * This function is called in the SLI4 code path to read the port's
10370 * sli4 capabilities.
10371 *
10372 * This function may be be called from any context that can block-wait
10373 * for the completion. The expectation is that this routine is called
10374 * typically from probe_one or from the online routine.
10375 **/
10376int
10377lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
10378{
10379 int rc;
10380 struct lpfc_mqe *mqe = &mboxq->u.mqe;
10381 struct lpfc_pc_sli4_params *sli4_params;
a183a15f 10382 uint32_t mbox_tmo;
fedd3b7b
JS		 10383 int length;
10384 struct lpfc_sli4_parameters *mbx_sli4_parameters;
10385
6d368e53
JS		 10386 /*
10387 * By default, the driver assumes the SLI4 port requires RPI
10388 * header postings. The SLI4_PARAM response will correct this
10389 * assumption.
10390 */
10391 phba->sli4_hba.rpi_hdrs_in_use = 1;
10392
fedd3b7b
JS		 10393 /* Read the port's SLI4 Config Parameters */
10394 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
10395 sizeof(struct lpfc_sli4_cfg_mhdr));
10396 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
10397 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
10398 length, LPFC_SLI4_MBX_EMBED);
10399 if (!phba->sli4_hba.intr_enable)
10400 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
a183a15f
JS		 10401 else {
10402 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
10403 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
10404 }
fedd3b7b
JS		 10405 if (unlikely(rc))
10406 return rc;
10407 sli4_params = &phba->sli4_hba.pc_sli4_params;
10408 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
10409 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters);
10410 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters);
10411 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters);
10412 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1,
10413 mbx_sli4_parameters);
10414 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2,
10415 mbx_sli4_parameters);
10416 if (bf_get(cfg_phwq, mbx_sli4_parameters))
10417 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED;
10418 else
10419 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED;
10420 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len;
10421 sli4_params->loopbk_scope = bf_get(loopbk_scope, mbx_sli4_parameters);
1ba981fd 10422 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters);
fedd3b7b
JS		 10423 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters);
10424 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters);
10425 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters);
10426 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters);
0c651878 10427 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters);
fedd3b7b
JS		 10428 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt,
10429 mbx_sli4_parameters);
895427bd 10430 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters);
fedd3b7b
JS		 10431 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align,
10432 mbx_sli4_parameters);
6d368e53
JS		 10433 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
10434 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
895427bd
JS		 10435 phba->nvme_support = (bf_get(cfg_nvme, mbx_sli4_parameters) &&
10436 bf_get(cfg_xib, mbx_sli4_parameters));
10437
10438 if ((phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) ||
10439 !phba->nvme_support) {
10440 phba->nvme_support = 0;
10441 phba->nvmet_support = 0;
bcb24f65 10442 phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_OFF;
895427bd
JS		 10443 phba->cfg_nvme_io_channel = 0;
10444 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
10445 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
10446 "6101 Disabling NVME support: "
10447 "Not supported by firmware: %d %d\n",
10448 bf_get(cfg_nvme, mbx_sli4_parameters),
10449 bf_get(cfg_xib, mbx_sli4_parameters));
10450
10451 /* If firmware doesn't support NVME, just use SCSI support */
10452 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
10453 return -ENODEV;
10454 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
10455 }
0558056c 10456
f358dd0c
JS		 10457 if (bf_get(cfg_xib, mbx_sli4_parameters) && phba->cfg_suppress_rsp)
10458 phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP;
10459
0cf07f84
JS		 10460 if (bf_get(cfg_eqdr, mbx_sli4_parameters))
10461 phba->sli.sli_flag |= LPFC_SLI_USE_EQDR;
10462
0558056c
JS		 10463 /* Make sure that sge_supp_len can be handled by the driver */
10464 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
10465 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
10466
b5c53958
JS		 10467 /*
10468 * Issue IOs with CDB embedded in WQE to minimized the number
10469 * of DMAs the firmware has to do. Setting this to 1 also forces
10470 * the driver to use 128 bytes WQEs for FCP IOs.
10471 */
10472 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters))
10473 phba->fcp_embed_io = 1;
10474 else
10475 phba->fcp_embed_io = 0;
7bdedb34
JS		 10476
10477 /*
10478 * Check if the SLI port supports MDS Diagnostics
10479 */
10480 if (bf_get(cfg_mds_diags, mbx_sli4_parameters))
10481 phba->mds_diags_support = 1;
10482 else
10483 phba->mds_diags_support = 0;
fedd3b7b
JS		 10484 return 0;
10485}
10486
da0436e9
JS		 10487/**
10488 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
10489 * @pdev: pointer to PCI device
10490 * @pid: pointer to PCI device identifier
10491 *
10492 * This routine is to be called to attach a device with SLI-3 interface spec
10493 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
10494 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
10495 * information of the device and driver to see if the driver state that it can
10496 * support this kind of device. If the match is successful, the driver core
10497 * invokes this routine. If this routine determines it can claim the HBA, it
10498 * does all the initialization that it needs to do to handle the HBA properly.
10499 *
10500 * Return code
10501 * 0 - driver can claim the device
10502 * negative value - driver can not claim the device
10503 **/
6f039790 10504static int
da0436e9
JS		 10505lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid)
10506{
10507 struct lpfc_hba *phba;
10508 struct lpfc_vport *vport = NULL;
6669f9bb 10509 struct Scsi_Host *shost = NULL;
da0436e9
JS		 10510 int error;
10511 uint32_t cfg_mode, intr_mode;
10512
10513 /* Allocate memory for HBA structure */
10514 phba = lpfc_hba_alloc(pdev);
10515 if (!phba)
10516 return -ENOMEM;
10517
10518 /* Perform generic PCI device enabling operation */
10519 error = lpfc_enable_pci_dev(phba);
079b5c91 10520 if (error)
da0436e9 10521 goto out_free_phba;
da0436e9
JS		 10522
10523 /* Set up SLI API function jump table for PCI-device group-0 HBAs */
10524 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP);
10525 if (error)
10526 goto out_disable_pci_dev;
10527
10528 /* Set up SLI-3 specific device PCI memory space */
10529 error = lpfc_sli_pci_mem_setup(phba);
10530 if (error) {
10531 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10532 "1402 Failed to set up pci memory space.\n");
10533 goto out_disable_pci_dev;
10534 }
10535
da0436e9
JS		 10536 /* Set up SLI-3 specific device driver resources */
10537 error = lpfc_sli_driver_resource_setup(phba);
10538 if (error) {
10539 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10540 "1404 Failed to set up driver resource.\n");
10541 goto out_unset_pci_mem_s3;
10542 }
10543
10544 /* Initialize and populate the iocb list per host */
d1f525aa 10545
da0436e9
JS		 10546 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT);
10547 if (error) {
10548 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10549 "1405 Failed to initialize iocb list.\n");
10550 goto out_unset_driver_resource_s3;
10551 }
10552
10553 /* Set up common device driver resources */
10554 error = lpfc_setup_driver_resource_phase2(phba);
10555 if (error) {
10556 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10557 "1406 Failed to set up driver resource.\n");
10558 goto out_free_iocb_list;
10559 }
10560
079b5c91
JS		 10561 /* Get the default values for Model Name and Description */
10562 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
10563
da0436e9
JS		 10564 /* Create SCSI host to the physical port */
10565 error = lpfc_create_shost(phba);
10566 if (error) {
10567 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10568 "1407 Failed to create scsi host.\n");
10569 goto out_unset_driver_resource;
10570 }
10571
10572 /* Configure sysfs attributes */
10573 vport = phba->pport;
10574 error = lpfc_alloc_sysfs_attr(vport);
10575 if (error) {
10576 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10577 "1476 Failed to allocate sysfs attr\n");
10578 goto out_destroy_shost;
10579 }
10580
6669f9bb 10581 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
da0436e9
JS		 10582 /* Now, trying to enable interrupt and bring up the device */
10583 cfg_mode = phba->cfg_use_msi;
10584 while (true) {
10585 /* Put device to a known state before enabling interrupt */
10586 lpfc_stop_port(phba);
10587 /* Configure and enable interrupt */
10588 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode);
10589 if (intr_mode == LPFC_INTR_ERROR) {
10590 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10591 "0431 Failed to enable interrupt.\n");
10592 error = -ENODEV;
10593 goto out_free_sysfs_attr;
10594 }
10595 /* SLI-3 HBA setup */
10596 if (lpfc_sli_hba_setup(phba)) {
10597 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10598 "1477 Failed to set up hba\n");
10599 error = -ENODEV;
10600 goto out_remove_device;
10601 }
10602
10603 /* Wait 50ms for the interrupts of previous mailbox commands */
10604 msleep(50);
10605 /* Check active interrupts on message signaled interrupts */
10606 if (intr_mode == 0 ||
10607 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) {
10608 /* Log the current active interrupt mode */
10609 phba->intr_mode = intr_mode;
10610 lpfc_log_intr_mode(phba, intr_mode);
10611 break;
10612 } else {
10613 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10614 "0447 Configure interrupt mode (%d) "
10615 "failed active interrupt test.\n",
10616 intr_mode);
10617 /* Disable the current interrupt mode */
10618 lpfc_sli_disable_intr(phba);
10619 /* Try next level of interrupt mode */
10620 cfg_mode = --intr_mode;
10621 }
10622 }
10623
10624 /* Perform post initialization setup */
10625 lpfc_post_init_setup(phba);
10626
10627 /* Check if there are static vports to be created. */
10628 lpfc_create_static_vport(phba);
10629
10630 return 0;
10631
10632out_remove_device:
10633 lpfc_unset_hba(phba);
10634out_free_sysfs_attr:
10635 lpfc_free_sysfs_attr(vport);
10636out_destroy_shost:
10637 lpfc_destroy_shost(phba);
10638out_unset_driver_resource:
10639 lpfc_unset_driver_resource_phase2(phba);
10640out_free_iocb_list:
10641 lpfc_free_iocb_list(phba);
10642out_unset_driver_resource_s3:
10643 lpfc_sli_driver_resource_unset(phba);
10644out_unset_pci_mem_s3:
10645 lpfc_sli_pci_mem_unset(phba);
10646out_disable_pci_dev:
10647 lpfc_disable_pci_dev(phba);
6669f9bb
JS		 10648 if (shost)
10649 scsi_host_put(shost);
da0436e9
JS		 10650out_free_phba:
10651 lpfc_hba_free(phba);
10652 return error;
10653}
10654
10655/**
10656 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem.
10657 * @pdev: pointer to PCI device
10658 *
10659 * This routine is to be called to disattach a device with SLI-3 interface
10660 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
10661 * removed from PCI bus, it performs all the necessary cleanup for the HBA
10662 * device to be removed from the PCI subsystem properly.
10663 **/
6f039790 10664static void
da0436e9
JS		 10665lpfc_pci_remove_one_s3(struct pci_dev *pdev)
10666{
10667 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10668 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
10669 struct lpfc_vport **vports;
10670 struct lpfc_hba *phba = vport->phba;
10671 int i;
da0436e9
JS		 10672
10673 spin_lock_irq(&phba->hbalock);
10674 vport->load_flag |= FC_UNLOADING;
10675 spin_unlock_irq(&phba->hbalock);
10676
10677 lpfc_free_sysfs_attr(vport);
10678
10679 /* Release all the vports against this physical port */
10680 vports = lpfc_create_vport_work_array(phba);
10681 if (vports != NULL)
587a37f6
JS		 10682 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
10683 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
10684 continue;
da0436e9 10685 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 10686 }
da0436e9
JS		 10687 lpfc_destroy_vport_work_array(phba, vports);
10688
10689 /* Remove FC host and then SCSI host with the physical port */
10690 fc_remove_host(shost);
10691 scsi_remove_host(shost);
d613b6a7 10692
da0436e9
JS		 10693 lpfc_cleanup(vport);
10694
10695 /*
10696 * Bring down the SLI Layer. This step disable all interrupts,
10697 * clears the rings, discards all mailbox commands, and resets
10698 * the HBA.
10699 */
10700
48e34d0f 10701 /* HBA interrupt will be disabled after this call */
da0436e9
JS		 10702 lpfc_sli_hba_down(phba);
10703 /* Stop kthread signal shall trigger work_done one more time */
10704 kthread_stop(phba->worker_thread);
10705 /* Final cleanup of txcmplq and reset the HBA */
10706 lpfc_sli_brdrestart(phba);
10707
72859909
JS		 10708 kfree(phba->vpi_bmask);
10709 kfree(phba->vpi_ids);
10710
da0436e9
JS		 10711 lpfc_stop_hba_timers(phba);
10712 spin_lock_irq(&phba->hbalock);
10713 list_del_init(&vport->listentry);
10714 spin_unlock_irq(&phba->hbalock);
10715
10716 lpfc_debugfs_terminate(vport);
10717
912e3acd
JS		 10718 /* Disable SR-IOV if enabled */
10719 if (phba->cfg_sriov_nr_virtfn)
10720 pci_disable_sriov(pdev);
10721
da0436e9
JS		 10722 /* Disable interrupt */
10723 lpfc_sli_disable_intr(phba);
10724
da0436e9
JS		 10725 scsi_host_put(shost);
10726
10727 /*
10728 * Call scsi_free before mem_free since scsi bufs are released to their
10729 * corresponding pools here.
10730 */
10731 lpfc_scsi_free(phba);
10732 lpfc_mem_free_all(phba);
10733
10734 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
10735 phba->hbqslimp.virt, phba->hbqslimp.phys);
10736
10737 /* Free resources associated with SLI2 interface */
10738 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
10739 phba->slim2p.virt, phba->slim2p.phys);
10740
10741 /* unmap adapter SLIM and Control Registers */
10742 iounmap(phba->ctrl_regs_memmap_p);
10743 iounmap(phba->slim_memmap_p);
10744
10745 lpfc_hba_free(phba);
10746
e0c0483c 10747 pci_release_mem_regions(pdev);
da0436e9
JS		 10748 pci_disable_device(pdev);
10749}
10750
10751/**
10752 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt
10753 * @pdev: pointer to PCI device
10754 * @msg: power management message
10755 *
10756 * This routine is to be called from the kernel's PCI subsystem to support
10757 * system Power Management (PM) to device with SLI-3 interface spec. When
10758 * PM invokes this method, it quiesces the device by stopping the driver's
10759 * worker thread for the device, turning off device's interrupt and DMA,
10760 * and bring the device offline. Note that as the driver implements the
10761 * minimum PM requirements to a power-aware driver's PM support for the
10762 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
10763 * to the suspend() method call will be treated as SUSPEND and the driver will
10764 * fully reinitialize its device during resume() method call, the driver will
10765 * set device to PCI_D3hot state in PCI config space instead of setting it
10766 * according to the @msg provided by the PM.
10767 *
10768 * Return code
10769 * 0 - driver suspended the device
10770 * Error otherwise
10771 **/
10772static int
10773lpfc_pci_suspend_one_s3(struct pci_dev *pdev, pm_message_t msg)
10774{
10775 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10776 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10777
10778 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10779 "0473 PCI device Power Management suspend.\n");
10780
10781 /* Bring down the device */
618a5230 10782 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS		 10783 lpfc_offline(phba);
10784 kthread_stop(phba->worker_thread);
10785
10786 /* Disable interrupt from device */
10787 lpfc_sli_disable_intr(phba);
10788
10789 /* Save device state to PCI config space */
10790 pci_save_state(pdev);
10791 pci_set_power_state(pdev, PCI_D3hot);
10792
10793 return 0;
10794}
10795
10796/**
10797 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt
10798 * @pdev: pointer to PCI device
10799 *
10800 * This routine is to be called from the kernel's PCI subsystem to support
10801 * system Power Management (PM) to device with SLI-3 interface spec. When PM
10802 * invokes this method, it restores the device's PCI config space state and
10803 * fully reinitializes the device and brings it online. Note that as the
10804 * driver implements the minimum PM requirements to a power-aware driver's
10805 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE,
10806 * FREEZE) to the suspend() method call will be treated as SUSPEND and the
10807 * driver will fully reinitialize its device during resume() method call,
10808 * the device will be set to PCI_D0 directly in PCI config space before
10809 * restoring the state.
10810 *
10811 * Return code
10812 * 0 - driver suspended the device
10813 * Error otherwise
10814 **/
10815static int
10816lpfc_pci_resume_one_s3(struct pci_dev *pdev)
10817{
10818 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10819 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10820 uint32_t intr_mode;
10821 int error;
10822
10823 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10824 "0452 PCI device Power Management resume.\n");
10825
10826 /* Restore device state from PCI config space */
10827 pci_set_power_state(pdev, PCI_D0);
10828 pci_restore_state(pdev);
0d878419 10829
1dfb5a47
JS		 10830 /*
10831 * As the new kernel behavior of pci_restore_state() API call clears
10832 * device saved_state flag, need to save the restored state again.
10833 */
10834 pci_save_state(pdev);
10835
da0436e9
JS		 10836 if (pdev->is_busmaster)
10837 pci_set_master(pdev);
10838
10839 /* Startup the kernel thread for this host adapter. */
10840 phba->worker_thread = kthread_run(lpfc_do_work, phba,
10841 "lpfc_worker_%d", phba->brd_no);
10842 if (IS_ERR(phba->worker_thread)) {
10843 error = PTR_ERR(phba->worker_thread);
10844 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10845 "0434 PM resume failed to start worker "
10846 "thread: error=x%x.\n", error);
10847 return error;
10848 }
10849
10850 /* Configure and enable interrupt */
10851 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
10852 if (intr_mode == LPFC_INTR_ERROR) {
10853 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10854 "0430 PM resume Failed to enable interrupt\n");
10855 return -EIO;
10856 } else
10857 phba->intr_mode = intr_mode;
10858
10859 /* Restart HBA and bring it online */
10860 lpfc_sli_brdrestart(phba);
10861 lpfc_online(phba);
10862
10863 /* Log the current active interrupt mode */
10864 lpfc_log_intr_mode(phba, phba->intr_mode);
10865
10866 return 0;
10867}
10868
891478a2
JS		 10869/**
10870 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover
10871 * @phba: pointer to lpfc hba data structure.
10872 *
10873 * This routine is called to prepare the SLI3 device for PCI slot recover. It
e2af0d2e 10874 * aborts all the outstanding SCSI I/Os to the pci device.
891478a2
JS		 10875 **/
10876static void
10877lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
10878{
10879 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10880 "2723 PCI channel I/O abort preparing for recovery\n");
e2af0d2e
JS		 10881
10882 /*
10883 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
10884 * and let the SCSI mid-layer to retry them to recover.
10885 */
db55fba8 10886 lpfc_sli_abort_fcp_rings(phba);
891478a2
JS		 10887}
10888
0d878419
JS		 10889/**
10890 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset
10891 * @phba: pointer to lpfc hba data structure.
10892 *
10893 * This routine is called to prepare the SLI3 device for PCI slot reset. It
10894 * disables the device interrupt and pci device, and aborts the internal FCP
10895 * pending I/Os.
10896 **/
10897static void
10898lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba)
10899{
0d878419 10900 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10901 "2710 PCI channel disable preparing for reset\n");
e2af0d2e 10902
75baf696 10903 /* Block any management I/Os to the device */
618a5230 10904 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
75baf696 10905
e2af0d2e
JS		 10906 /* Block all SCSI devices' I/Os on the host */
10907 lpfc_scsi_dev_block(phba);
10908
ea714f3d
JS		 10909 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
10910 lpfc_sli_flush_fcp_rings(phba);
10911
e2af0d2e
JS		 10912 /* stop all timers */
10913 lpfc_stop_hba_timers(phba);
10914
0d878419
JS		 10915 /* Disable interrupt and pci device */
10916 lpfc_sli_disable_intr(phba);
10917 pci_disable_device(phba->pcidev);
0d878419
JS		 10918}
10919
10920/**
10921 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable
10922 * @phba: pointer to lpfc hba data structure.
10923 *
10924 * This routine is called to prepare the SLI3 device for PCI slot permanently
10925 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
10926 * pending I/Os.
10927 **/
10928static void
75baf696 10929lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba)
0d878419
JS		 10930{
10931 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10932 "2711 PCI channel permanent disable for failure\n");
e2af0d2e
JS		 10933 /* Block all SCSI devices' I/Os on the host */
10934 lpfc_scsi_dev_block(phba);
10935
10936 /* stop all timers */
10937 lpfc_stop_hba_timers(phba);
10938
0d878419
JS		 10939 /* Clean up all driver's outstanding SCSI I/Os */
10940 lpfc_sli_flush_fcp_rings(phba);
10941}
10942
da0436e9
JS		 10943/**
10944 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error
10945 * @pdev: pointer to PCI device.
10946 * @state: the current PCI connection state.
10947 *
10948 * This routine is called from the PCI subsystem for I/O error handling to
10949 * device with SLI-3 interface spec. This function is called by the PCI
10950 * subsystem after a PCI bus error affecting this device has been detected.
10951 * When this function is invoked, it will need to stop all the I/Os and
10952 * interrupt(s) to the device. Once that is done, it will return
10953 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery
10954 * as desired.
10955 *
10956 * Return codes
0d878419 10957 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link
da0436e9
JS		 10958 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
10959 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
10960 **/
10961static pci_ers_result_t
10962lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
10963{
10964 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10965 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
da0436e9 10966
0d878419
JS		 10967 switch (state) {
10968 case pci_channel_io_normal:
891478a2
JS		 10969 /* Non-fatal error, prepare for recovery */
10970 lpfc_sli_prep_dev_for_recover(phba);
0d878419
JS		 10971 return PCI_ERS_RESULT_CAN_RECOVER;
10972 case pci_channel_io_frozen:
10973 /* Fatal error, prepare for slot reset */
10974 lpfc_sli_prep_dev_for_reset(phba);
10975 return PCI_ERS_RESULT_NEED_RESET;
10976 case pci_channel_io_perm_failure:
10977 /* Permanent failure, prepare for device down */
75baf696 10978 lpfc_sli_prep_dev_for_perm_failure(phba);
da0436e9 10979 return PCI_ERS_RESULT_DISCONNECT;
0d878419
JS		 10980 default:
10981 /* Unknown state, prepare and request slot reset */
10982 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10983 "0472 Unknown PCI error state: x%x\n", state);
10984 lpfc_sli_prep_dev_for_reset(phba);
10985 return PCI_ERS_RESULT_NEED_RESET;
da0436e9 10986 }
da0436e9
JS		 10987}
10988
10989/**
10990 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch.
10991 * @pdev: pointer to PCI device.
10992 *
10993 * This routine is called from the PCI subsystem for error handling to
10994 * device with SLI-3 interface spec. This is called after PCI bus has been
10995 * reset to restart the PCI card from scratch, as if from a cold-boot.
10996 * During the PCI subsystem error recovery, after driver returns
10997 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
10998 * recovery and then call this routine before calling the .resume method
10999 * to recover the device. This function will initialize the HBA device,
11000 * enable the interrupt, but it will just put the HBA to offline state
11001 * without passing any I/O traffic.
11002 *
11003 * Return codes
11004 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11005 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
11006 */
11007static pci_ers_result_t
11008lpfc_io_slot_reset_s3(struct pci_dev *pdev)
11009{
11010 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11011 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11012 struct lpfc_sli *psli = &phba->sli;
11013 uint32_t intr_mode;
11014
11015 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
11016 if (pci_enable_device_mem(pdev)) {
11017 printk(KERN_ERR "lpfc: Cannot re-enable "
11018 "PCI device after reset.\n");
11019 return PCI_ERS_RESULT_DISCONNECT;
11020 }
11021
11022 pci_restore_state(pdev);
1dfb5a47
JS		 11023
11024 /*
11025 * As the new kernel behavior of pci_restore_state() API call clears
11026 * device saved_state flag, need to save the restored state again.
11027 */
11028 pci_save_state(pdev);
11029
da0436e9
JS		 11030 if (pdev->is_busmaster)
11031 pci_set_master(pdev);
11032
11033 spin_lock_irq(&phba->hbalock);
11034 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
11035 spin_unlock_irq(&phba->hbalock);
11036
11037 /* Configure and enable interrupt */
11038 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
11039 if (intr_mode == LPFC_INTR_ERROR) {
11040 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11041 "0427 Cannot re-enable interrupt after "
11042 "slot reset.\n");
11043 return PCI_ERS_RESULT_DISCONNECT;
11044 } else
11045 phba->intr_mode = intr_mode;
11046
75baf696 11047 /* Take device offline, it will perform cleanup */
618a5230 11048 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS		 11049 lpfc_offline(phba);
11050 lpfc_sli_brdrestart(phba);
11051
11052 /* Log the current active interrupt mode */
11053 lpfc_log_intr_mode(phba, phba->intr_mode);
11054
11055 return PCI_ERS_RESULT_RECOVERED;
11056}
11057
11058/**
11059 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device.
11060 * @pdev: pointer to PCI device
11061 *
11062 * This routine is called from the PCI subsystem for error handling to device
11063 * with SLI-3 interface spec. It is called when kernel error recovery tells
11064 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
11065 * error recovery. After this call, traffic can start to flow from this device
11066 * again.
11067 */
11068static void
11069lpfc_io_resume_s3(struct pci_dev *pdev)
11070{
11071 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11072 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
3772a991 11073
e2af0d2e 11074 /* Bring device online, it will be no-op for non-fatal error resume */
da0436e9 11075 lpfc_online(phba);
0d878419
JS		 11076
11077 /* Clean up Advanced Error Reporting (AER) if needed */
11078 if (phba->hba_flag & HBA_AER_ENABLED)
11079 pci_cleanup_aer_uncorrect_error_status(pdev);
da0436e9 11080}
3772a991 11081
da0436e9
JS		 11082/**
11083 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve
11084 * @phba: pointer to lpfc hba data structure.
11085 *
11086 * returns the number of ELS/CT IOCBs to reserve
11087 **/
11088int
11089lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba)
11090{
11091 int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
11092
f1126688
JS		 11093 if (phba->sli_rev == LPFC_SLI_REV4) {
11094 if (max_xri <= 100)
6a9c52cf 11095 return 10;
f1126688 11096 else if (max_xri <= 256)
6a9c52cf 11097 return 25;
f1126688 11098 else if (max_xri <= 512)
6a9c52cf 11099 return 50;
f1126688 11100 else if (max_xri <= 1024)
6a9c52cf 11101 return 100;
8a9d2e80 11102 else if (max_xri <= 1536)
6a9c52cf 11103 return 150;
8a9d2e80
JS		 11104 else if (max_xri <= 2048)
11105 return 200;
11106 else
11107 return 250;
f1126688
JS		 11108 } else
11109 return 0;
3772a991
JS		 11110}
11111
895427bd
JS		 11112/**
11113 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve
11114 * @phba: pointer to lpfc hba data structure.
11115 *
f358dd0c 11116 * returns the number of ELS/CT + NVMET IOCBs to reserve
895427bd
JS		 11117 **/
11118int
11119lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba)
11120{
11121 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba);
11122
f358dd0c
JS		 11123 if (phba->nvmet_support)
11124 max_xri += LPFC_NVMET_BUF_POST;
895427bd
JS		 11125 return max_xri;
11126}
11127
11128
52d52440
JS		 11129/**
11130 * lpfc_write_firmware - attempt to write a firmware image to the port
52d52440 11131 * @fw: pointer to firmware image returned from request_firmware.
ce396282 11132 * @phba: pointer to lpfc hba data structure.
52d52440 11133 *
52d52440 11134 **/
ce396282
JS		 11135static void
11136lpfc_write_firmware(const struct firmware *fw, void *context)
52d52440 11137{
ce396282 11138 struct lpfc_hba *phba = (struct lpfc_hba *)context;
6b5151fd 11139 char fwrev[FW_REV_STR_SIZE];
ce396282 11140 struct lpfc_grp_hdr *image;
52d52440
JS		 11141 struct list_head dma_buffer_list;
11142 int i, rc = 0;
11143 struct lpfc_dmabuf *dmabuf, *next;
11144 uint32_t offset = 0, temp_offset = 0;
6b6ef5db 11145 uint32_t magic_number, ftype, fid, fsize;
52d52440 11146
c71ab861 11147 /* It can be null in no-wait mode, sanity check */
ce396282
JS		 11148 if (!fw) {
11149 rc = -ENXIO;
11150 goto out;
11151 }
11152 image = (struct lpfc_grp_hdr *)fw->data;
11153
6b6ef5db
JS		 11154 magic_number = be32_to_cpu(image->magic_number);
11155 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image);
11156 fid = bf_get_be32(lpfc_grp_hdr_id, image),
11157 fsize = be32_to_cpu(image->size);
11158
52d52440 11159 INIT_LIST_HEAD(&dma_buffer_list);
6b6ef5db
JS		 11160 if ((magic_number != LPFC_GROUP_OJECT_MAGIC_G5 &&
11161 magic_number != LPFC_GROUP_OJECT_MAGIC_G6) ||
11162 ftype != LPFC_FILE_TYPE_GROUP || fsize != fw->size) {
52d52440
JS		 11163 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11164 "3022 Invalid FW image found. "
efe583c6 11165 "Magic:%x Type:%x ID:%x Size %d %zd\n",
6b6ef5db 11166 magic_number, ftype, fid, fsize, fw->size);
ce396282
JS		 11167 rc = -EINVAL;
11168 goto release_out;
52d52440
JS		 11169 }
11170 lpfc_decode_firmware_rev(phba, fwrev, 1);
88a2cfbb 11171 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) {
52d52440 11172 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
ce396282 11173 "3023 Updating Firmware, Current Version:%s "
52d52440 11174 "New Version:%s\n",
88a2cfbb 11175 fwrev, image->revision);
52d52440
JS		 11176 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) {
11177 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
11178 GFP_KERNEL);
11179 if (!dmabuf) {
11180 rc = -ENOMEM;
ce396282 11181 goto release_out;
52d52440
JS		 11182 }
11183 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
11184 SLI4_PAGE_SIZE,
11185 &dmabuf->phys,
11186 GFP_KERNEL);
11187 if (!dmabuf->virt) {
11188 kfree(dmabuf);
11189 rc = -ENOMEM;
ce396282 11190 goto release_out;
52d52440
JS		 11191 }
11192 list_add_tail(&dmabuf->list, &dma_buffer_list);
11193 }
11194 while (offset < fw->size) {
11195 temp_offset = offset;
11196 list_for_each_entry(dmabuf, &dma_buffer_list, list) {
079b5c91 11197 if (temp_offset + SLI4_PAGE_SIZE > fw->size) {
52d52440
JS		 11198 memcpy(dmabuf->virt,
11199 fw->data + temp_offset,
079b5c91
JS		 11200 fw->size - temp_offset);
11201 temp_offset = fw->size;
52d52440
JS		 11202 break;
11203 }
52d52440
JS		 11204 memcpy(dmabuf->virt, fw->data + temp_offset,
11205 SLI4_PAGE_SIZE);
88a2cfbb 11206 temp_offset += SLI4_PAGE_SIZE;
52d52440
JS		 11207 }
11208 rc = lpfc_wr_object(phba, &dma_buffer_list,
11209 (fw->size - offset), &offset);
ce396282
JS		 11210 if (rc)
11211 goto release_out;
52d52440
JS		 11212 }
11213 rc = offset;
11214 }
ce396282
JS		 11215
11216release_out:
52d52440
JS		 11217 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) {
11218 list_del(&dmabuf->list);
11219 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
11220 dmabuf->virt, dmabuf->phys);
11221 kfree(dmabuf);
11222 }
ce396282
JS		 11223 release_firmware(fw);
11224out:
11225 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
c71ab861 11226 "3024 Firmware update done: %d.\n", rc);
ce396282 11227 return;
52d52440
JS		 11228}
11229
c71ab861
JS		 11230/**
11231 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade
11232 * @phba: pointer to lpfc hba data structure.
11233 *
11234 * This routine is called to perform Linux generic firmware upgrade on device
11235 * that supports such feature.
11236 **/
11237int
11238lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade)
11239{
11240 uint8_t file_name[ELX_MODEL_NAME_SIZE];
11241 int ret;
11242 const struct firmware *fw;
11243
11244 /* Only supported on SLI4 interface type 2 for now */
11245 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
11246 LPFC_SLI_INTF_IF_TYPE_2)
11247 return -EPERM;
11248
11249 snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName);
11250
11251 if (fw_upgrade == INT_FW_UPGRADE) {
11252 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
11253 file_name, &phba->pcidev->dev,
11254 GFP_KERNEL, (void *)phba,
11255 lpfc_write_firmware);
11256 } else if (fw_upgrade == RUN_FW_UPGRADE) {
11257 ret = request_firmware(&fw, file_name, &phba->pcidev->dev);
11258 if (!ret)
11259 lpfc_write_firmware(fw, (void *)phba);
11260 } else {
11261 ret = -EINVAL;
11262 }
11263
11264 return ret;
11265}
11266
3772a991 11267/**
da0436e9 11268 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys
3772a991
JS		 11269 * @pdev: pointer to PCI device
11270 * @pid: pointer to PCI device identifier
11271 *
da0436e9
JS		 11272 * This routine is called from the kernel's PCI subsystem to device with
11273 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991 11274 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
da0436e9
JS		 11275 * information of the device and driver to see if the driver state that it
11276 * can support this kind of device. If the match is successful, the driver
11277 * core invokes this routine. If this routine determines it can claim the HBA,
11278 * it does all the initialization that it needs to do to handle the HBA
11279 * properly.
3772a991
JS		 11280 *
11281 * Return code
11282 * 0 - driver can claim the device
11283 * negative value - driver can not claim the device
11284 **/
6f039790 11285static int
da0436e9 11286lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
3772a991
JS		 11287{
11288 struct lpfc_hba *phba;
11289 struct lpfc_vport *vport = NULL;
6669f9bb 11290 struct Scsi_Host *shost = NULL;
6c621a22 11291 int error;
3772a991
JS		 11292 uint32_t cfg_mode, intr_mode;
11293
11294 /* Allocate memory for HBA structure */
11295 phba = lpfc_hba_alloc(pdev);
11296 if (!phba)
11297 return -ENOMEM;
11298
11299 /* Perform generic PCI device enabling operation */
11300 error = lpfc_enable_pci_dev(phba);
079b5c91 11301 if (error)
3772a991 11302 goto out_free_phba;
3772a991 11303
da0436e9
JS		 11304 /* Set up SLI API function jump table for PCI-device group-1 HBAs */
11305 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC);
3772a991
JS		 11306 if (error)
11307 goto out_disable_pci_dev;
11308
da0436e9
JS		 11309 /* Set up SLI-4 specific device PCI memory space */
11310 error = lpfc_sli4_pci_mem_setup(phba);
3772a991
JS		 11311 if (error) {
11312 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11313 "1410 Failed to set up pci memory space.\n");
3772a991
JS		 11314 goto out_disable_pci_dev;
11315 }
11316
da0436e9
JS		 11317 /* Set up SLI-4 Specific device driver resources */
11318 error = lpfc_sli4_driver_resource_setup(phba);
3772a991
JS		 11319 if (error) {
11320 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9
JS		 11321 "1412 Failed to set up driver resource.\n");
11322 goto out_unset_pci_mem_s4;
3772a991
JS		 11323 }
11324
19ca7609 11325 INIT_LIST_HEAD(&phba->active_rrq_list);
7d791df7 11326 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list);
19ca7609 11327
3772a991
JS		 11328 /* Set up common device driver resources */
11329 error = lpfc_setup_driver_resource_phase2(phba);
11330 if (error) {
11331 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11332 "1414 Failed to set up driver resource.\n");
6c621a22 11333 goto out_unset_driver_resource_s4;
3772a991
JS		 11334 }
11335
079b5c91
JS		 11336 /* Get the default values for Model Name and Description */
11337 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
11338
3772a991
JS		 11339 /* Create SCSI host to the physical port */
11340 error = lpfc_create_shost(phba);
11341 if (error) {
11342 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11343 "1415 Failed to create scsi host.\n");
3772a991
JS		 11344 goto out_unset_driver_resource;
11345 }
9399627f 11346
5b75da2f 11347 /* Configure sysfs attributes */
3772a991
JS		 11348 vport = phba->pport;
11349 error = lpfc_alloc_sysfs_attr(vport);
11350 if (error) {
9399627f 11351 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11352 "1416 Failed to allocate sysfs attr\n");
3772a991 11353 goto out_destroy_shost;
98c9ea5c 11354 }
875fbdfe 11355
6669f9bb 11356 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
3772a991 11357 /* Now, trying to enable interrupt and bring up the device */
5b75da2f 11358 cfg_mode = phba->cfg_use_msi;
5b75da2f 11359
7b15db32
JS		 11360 /* Put device to a known state before enabling interrupt */
11361 lpfc_stop_port(phba);
895427bd 11362
7b15db32
JS		 11363 /* Configure and enable interrupt */
11364 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode);
11365 if (intr_mode == LPFC_INTR_ERROR) {
11366 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11367 "0426 Failed to enable interrupt.\n");
11368 error = -ENODEV;
11369 goto out_free_sysfs_attr;
11370 }
11371 /* Default to single EQ for non-MSI-X */
895427bd
JS		 11372 if (phba->intr_type != MSIX) {
11373 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
11374 phba->cfg_fcp_io_channel = 1;
2d7dbc4c 11375 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd 11376 phba->cfg_nvme_io_channel = 1;
2d7dbc4c
JS		 11377 if (phba->nvmet_support)
11378 phba->cfg_nvmet_mrq = 1;
11379 }
895427bd
JS		 11380 phba->io_channel_irqs = 1;
11381 }
11382
7b15db32
JS		 11383 /* Set up SLI-4 HBA */
11384 if (lpfc_sli4_hba_setup(phba)) {
11385 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11386 "1421 Failed to set up hba\n");
11387 error = -ENODEV;
11388 goto out_disable_intr;
98c9ea5c 11389 }
858c9f6c 11390
7b15db32
JS		 11391 /* Log the current active interrupt mode */
11392 phba->intr_mode = intr_mode;
11393 lpfc_log_intr_mode(phba, intr_mode);
11394
3772a991
JS		 11395 /* Perform post initialization setup */
11396 lpfc_post_init_setup(phba);
dea3101e 11397
01649561
JS		 11398 /* NVME support in FW earlier in the driver load corrects the
11399 * FC4 type making a check for nvme_support unnecessary.
11400 */
11401 if ((phba->nvmet_support == 0) &&
11402 (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)) {
11403 /* Create NVME binding with nvme_fc_transport. This
d1f525aa
JS		 11404 * ensures the vport is initialized. If the localport
11405 * create fails, it should not unload the driver to
11406 * support field issues.
01649561
JS		 11407 */
11408 error = lpfc_nvme_create_localport(vport);
11409 if (error) {
11410 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11411 "6004 NVME registration failed, "
11412 "error x%x\n",
11413 error);
01649561
JS		 11414 }
11415 }
895427bd 11416
c71ab861
JS		 11417 /* check for firmware upgrade or downgrade */
11418 if (phba->cfg_request_firmware_upgrade)
db6f1c2f 11419 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE);
52d52440 11420
1c6834a7
JS		 11421 /* Check if there are static vports to be created. */
11422 lpfc_create_static_vport(phba);
dea3101e 11423 return 0;
11424
da0436e9
JS		 11425out_disable_intr:
11426 lpfc_sli4_disable_intr(phba);
5b75da2f
JS		 11427out_free_sysfs_attr:
11428 lpfc_free_sysfs_attr(vport);
3772a991
JS		 11429out_destroy_shost:
11430 lpfc_destroy_shost(phba);
11431out_unset_driver_resource:
11432 lpfc_unset_driver_resource_phase2(phba);
da0436e9
JS		 11433out_unset_driver_resource_s4:
11434 lpfc_sli4_driver_resource_unset(phba);
11435out_unset_pci_mem_s4:
11436 lpfc_sli4_pci_mem_unset(phba);
3772a991
JS		 11437out_disable_pci_dev:
11438 lpfc_disable_pci_dev(phba);
6669f9bb
JS		 11439 if (shost)
11440 scsi_host_put(shost);
2e0fef85 11441out_free_phba:
3772a991 11442 lpfc_hba_free(phba);
dea3101e 11443 return error;
11444}
11445
e59058c4 11446/**
da0436e9 11447 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem
e59058c4
JS		 11448 * @pdev: pointer to PCI device
11449 *
da0436e9
JS		 11450 * This routine is called from the kernel's PCI subsystem to device with
11451 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991
JS		 11452 * removed from PCI bus, it performs all the necessary cleanup for the HBA
11453 * device to be removed from the PCI subsystem properly.
e59058c4 11454 **/
6f039790 11455static void
da0436e9 11456lpfc_pci_remove_one_s4(struct pci_dev *pdev)
dea3101e 11457{
da0436e9 11458 struct Scsi_Host *shost = pci_get_drvdata(pdev);
2e0fef85 11459 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
eada272d 11460 struct lpfc_vport **vports;
da0436e9 11461 struct lpfc_hba *phba = vport->phba;
eada272d 11462 int i;
8a4df120 11463
da0436e9 11464 /* Mark the device unloading flag */
549e55cd 11465 spin_lock_irq(&phba->hbalock);
51ef4c26 11466 vport->load_flag |= FC_UNLOADING;
549e55cd 11467 spin_unlock_irq(&phba->hbalock);
2e0fef85 11468
da0436e9 11469 /* Free the HBA sysfs attributes */
858c9f6c
JS		 11470 lpfc_free_sysfs_attr(vport);
11471
eada272d
JS		 11472 /* Release all the vports against this physical port */
11473 vports = lpfc_create_vport_work_array(phba);
11474 if (vports != NULL)
587a37f6
JS		 11475 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
11476 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
11477 continue;
eada272d 11478 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 11479 }
eada272d
JS		 11480 lpfc_destroy_vport_work_array(phba, vports);
11481
11482 /* Remove FC host and then SCSI host with the physical port */
858c9f6c
JS		 11483 fc_remove_host(shost);
11484 scsi_remove_host(shost);
1234a6d5
DK		 11485 /*
11486 * Bring down the SLI Layer. This step disables all interrupts,
11487 * clears the rings, discards all mailbox commands, and resets
11488 * the HBA FCoE function.
11489 */
11490 lpfc_debugfs_terminate(vport);
11491 lpfc_sli4_hba_unset(phba);
da0436e9 11492
d613b6a7
JS		 11493 /* Perform ndlp cleanup on the physical port. The nvme and nvmet
11494 * localports are destroyed after to cleanup all transport memory.
895427bd 11495 */
87af33fe 11496 lpfc_cleanup(vport);
d613b6a7
JS		 11497 lpfc_nvmet_destroy_targetport(phba);
11498 lpfc_nvme_destroy_localport(vport);
87af33fe 11499
a257bf90 11500
1901762f 11501 lpfc_stop_hba_timers(phba);
858c9f6c
JS		 11502 spin_lock_irq(&phba->hbalock);
11503 list_del_init(&vport->listentry);
11504 spin_unlock_irq(&phba->hbalock);
11505
3677a3a7 11506 /* Perform scsi free before driver resource_unset since scsi
da0436e9 11507 * buffers are released to their corresponding pools here.
2e0fef85
JS		 11508 */
11509 lpfc_scsi_free(phba);
895427bd 11510 lpfc_nvme_free(phba);
01649561 11511 lpfc_free_iocb_list(phba);
67d12733 11512
da0436e9 11513 lpfc_sli4_driver_resource_unset(phba);
ed957684 11514
da0436e9
JS		 11515 /* Unmap adapter Control and Doorbell registers */
11516 lpfc_sli4_pci_mem_unset(phba);
2e0fef85 11517
da0436e9
JS		 11518 /* Release PCI resources and disable device's PCI function */
11519 scsi_host_put(shost);
11520 lpfc_disable_pci_dev(phba);
2e0fef85 11521
da0436e9 11522 /* Finally, free the driver's device data structure */
3772a991 11523 lpfc_hba_free(phba);
2e0fef85 11524
da0436e9 11525 return;
dea3101e 11526}
11527
3a55b532 11528/**
da0436e9 11529 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt
3a55b532
JS		 11530 * @pdev: pointer to PCI device
11531 * @msg: power management message
11532 *
da0436e9
JS		 11533 * This routine is called from the kernel's PCI subsystem to support system
11534 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes
11535 * this method, it quiesces the device by stopping the driver's worker
11536 * thread for the device, turning off device's interrupt and DMA, and bring
11537 * the device offline. Note that as the driver implements the minimum PM
11538 * requirements to a power-aware driver's PM support for suspend/resume -- all
11539 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend()
11540 * method call will be treated as SUSPEND and the driver will fully
11541 * reinitialize its device during resume() method call, the driver will set
11542 * device to PCI_D3hot state in PCI config space instead of setting it
3772a991 11543 * according to the @msg provided by the PM.
3a55b532
JS		 11544 *
11545 * Return code
3772a991
JS		 11546 * 0 - driver suspended the device
11547 * Error otherwise
3a55b532
JS		 11548 **/
11549static int
da0436e9 11550lpfc_pci_suspend_one_s4(struct pci_dev *pdev, pm_message_t msg)
3a55b532
JS		 11551{
11552 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11553 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11554
11555 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
75baf696 11556 "2843 PCI device Power Management suspend.\n");
3a55b532
JS		 11557
11558 /* Bring down the device */
618a5230 11559 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
3a55b532
JS		 11560 lpfc_offline(phba);
11561 kthread_stop(phba->worker_thread);
11562
11563 /* Disable interrupt from device */
da0436e9 11564 lpfc_sli4_disable_intr(phba);
5350d872 11565 lpfc_sli4_queue_destroy(phba);
3a55b532
JS		 11566
11567 /* Save device state to PCI config space */
11568 pci_save_state(pdev);
11569 pci_set_power_state(pdev, PCI_D3hot);
11570
11571 return 0;
11572}
11573
11574/**
da0436e9 11575 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt
3a55b532
JS		 11576 * @pdev: pointer to PCI device
11577 *
da0436e9
JS		 11578 * This routine is called from the kernel's PCI subsystem to support system
11579 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes
11580 * this method, it restores the device's PCI config space state and fully
11581 * reinitializes the device and brings it online. Note that as the driver
11582 * implements the minimum PM requirements to a power-aware driver's PM for
11583 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
11584 * to the suspend() method call will be treated as SUSPEND and the driver
11585 * will fully reinitialize its device during resume() method call, the device
11586 * will be set to PCI_D0 directly in PCI config space before restoring the
11587 * state.
3a55b532
JS		 11588 *
11589 * Return code
3772a991
JS		 11590 * 0 - driver suspended the device
11591 * Error otherwise
3a55b532
JS		 11592 **/
11593static int
da0436e9 11594lpfc_pci_resume_one_s4(struct pci_dev *pdev)
3a55b532
JS		 11595{
11596 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11597 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
5b75da2f 11598 uint32_t intr_mode;
3a55b532
JS		 11599 int error;
11600
11601 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
da0436e9 11602 "0292 PCI device Power Management resume.\n");
3a55b532
JS		 11603
11604 /* Restore device state from PCI config space */
11605 pci_set_power_state(pdev, PCI_D0);
11606 pci_restore_state(pdev);
1dfb5a47
JS		 11607
11608 /*
11609 * As the new kernel behavior of pci_restore_state() API call clears
11610 * device saved_state flag, need to save the restored state again.
11611 */
11612 pci_save_state(pdev);
11613
3a55b532
JS		 11614 if (pdev->is_busmaster)
11615 pci_set_master(pdev);
11616
da0436e9 11617 /* Startup the kernel thread for this host adapter. */
3a55b532
JS		 11618 phba->worker_thread = kthread_run(lpfc_do_work, phba,
11619 "lpfc_worker_%d", phba->brd_no);
11620 if (IS_ERR(phba->worker_thread)) {
11621 error = PTR_ERR(phba->worker_thread);
11622 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11623 "0293 PM resume failed to start worker "
3a55b532
JS		 11624 "thread: error=x%x.\n", error);
11625 return error;
11626 }
11627
5b75da2f 11628 /* Configure and enable interrupt */
da0436e9 11629 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
5b75da2f 11630 if (intr_mode == LPFC_INTR_ERROR) {
3a55b532 11631 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11632 "0294 PM resume Failed to enable interrupt\n");
5b75da2f
JS		 11633 return -EIO;
11634 } else
11635 phba->intr_mode = intr_mode;
3a55b532
JS		 11636
11637 /* Restart HBA and bring it online */
11638 lpfc_sli_brdrestart(phba);
11639 lpfc_online(phba);
11640
5b75da2f
JS		 11641 /* Log the current active interrupt mode */
11642 lpfc_log_intr_mode(phba, phba->intr_mode);
11643
3a55b532
JS		 11644 return 0;
11645}
11646
75baf696
JS		 11647/**
11648 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover
11649 * @phba: pointer to lpfc hba data structure.
11650 *
11651 * This routine is called to prepare the SLI4 device for PCI slot recover. It
11652 * aborts all the outstanding SCSI I/Os to the pci device.
11653 **/
11654static void
11655lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba)
11656{
75baf696
JS		 11657 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11658 "2828 PCI channel I/O abort preparing for recovery\n");
11659 /*
11660 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
11661 * and let the SCSI mid-layer to retry them to recover.
11662 */
db55fba8 11663 lpfc_sli_abort_fcp_rings(phba);
75baf696
JS		 11664}
11665
11666/**
11667 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset
11668 * @phba: pointer to lpfc hba data structure.
11669 *
11670 * This routine is called to prepare the SLI4 device for PCI slot reset. It
11671 * disables the device interrupt and pci device, and aborts the internal FCP
11672 * pending I/Os.
11673 **/
11674static void
11675lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba)
11676{
11677 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11678 "2826 PCI channel disable preparing for reset\n");
11679
11680 /* Block any management I/Os to the device */
618a5230 11681 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT);
75baf696
JS		 11682
11683 /* Block all SCSI devices' I/Os on the host */
11684 lpfc_scsi_dev_block(phba);
11685
ea714f3d
JS		 11686 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
11687 lpfc_sli_flush_fcp_rings(phba);
11688
c3725bdc
JS		 11689 /* Flush the outstanding NVME IOs if fc4 type enabled. */
11690 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
11691 lpfc_sli_flush_nvme_rings(phba);
11692
75baf696
JS		 11693 /* stop all timers */
11694 lpfc_stop_hba_timers(phba);
11695
11696 /* Disable interrupt and pci device */
11697 lpfc_sli4_disable_intr(phba);
5350d872 11698 lpfc_sli4_queue_destroy(phba);
75baf696 11699 pci_disable_device(phba->pcidev);
75baf696
JS		 11700}
11701
11702/**
11703 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable
11704 * @phba: pointer to lpfc hba data structure.
11705 *
11706 * This routine is called to prepare the SLI4 device for PCI slot permanently
11707 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
11708 * pending I/Os.
11709 **/
11710static void
11711lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba)
11712{
11713 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11714 "2827 PCI channel permanent disable for failure\n");
11715
11716 /* Block all SCSI devices' I/Os on the host */
11717 lpfc_scsi_dev_block(phba);
11718
11719 /* stop all timers */
11720 lpfc_stop_hba_timers(phba);
11721
11722 /* Clean up all driver's outstanding SCSI I/Os */
11723 lpfc_sli_flush_fcp_rings(phba);
c3725bdc
JS		 11724
11725 /* Flush the outstanding NVME IOs if fc4 type enabled. */
11726 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
11727 lpfc_sli_flush_nvme_rings(phba);
75baf696
JS		 11728}
11729
8d63f375 11730/**
da0436e9 11731 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device
e59058c4
JS		 11732 * @pdev: pointer to PCI device.
11733 * @state: the current PCI connection state.
8d63f375 11734 *
da0436e9
JS		 11735 * This routine is called from the PCI subsystem for error handling to device
11736 * with SLI-4 interface spec. This function is called by the PCI subsystem
11737 * after a PCI bus error affecting this device has been detected. When this
11738 * function is invoked, it will need to stop all the I/Os and interrupt(s)
11739 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET
11740 * for the PCI subsystem to perform proper recovery as desired.
e59058c4
JS		 11741 *
11742 * Return codes
3772a991
JS		 11743 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
11744 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
e59058c4 11745 **/
3772a991 11746static pci_ers_result_t
da0436e9 11747lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state)
8d63f375 11748{
75baf696
JS		 11749 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11750 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11751
11752 switch (state) {
11753 case pci_channel_io_normal:
11754 /* Non-fatal error, prepare for recovery */
11755 lpfc_sli4_prep_dev_for_recover(phba);
11756 return PCI_ERS_RESULT_CAN_RECOVER;
11757 case pci_channel_io_frozen:
11758 /* Fatal error, prepare for slot reset */
11759 lpfc_sli4_prep_dev_for_reset(phba);
11760 return PCI_ERS_RESULT_NEED_RESET;
11761 case pci_channel_io_perm_failure:
11762 /* Permanent failure, prepare for device down */
11763 lpfc_sli4_prep_dev_for_perm_failure(phba);
11764 return PCI_ERS_RESULT_DISCONNECT;
11765 default:
11766 /* Unknown state, prepare and request slot reset */
11767 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11768 "2825 Unknown PCI error state: x%x\n", state);
11769 lpfc_sli4_prep_dev_for_reset(phba);
11770 return PCI_ERS_RESULT_NEED_RESET;
11771 }
8d63f375
LV		 11772}
11773
11774/**
da0436e9 11775 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch
e59058c4
JS		 11776 * @pdev: pointer to PCI device.
11777 *
da0436e9
JS		 11778 * This routine is called from the PCI subsystem for error handling to device
11779 * with SLI-4 interface spec. It is called after PCI bus has been reset to
11780 * restart the PCI card from scratch, as if from a cold-boot. During the
11781 * PCI subsystem error recovery, after the driver returns
3772a991 11782 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
da0436e9
JS		 11783 * recovery and then call this routine before calling the .resume method to
11784 * recover the device. This function will initialize the HBA device, enable
11785 * the interrupt, but it will just put the HBA to offline state without
11786 * passing any I/O traffic.
8d63f375 11787 *
e59058c4 11788 * Return codes
3772a991
JS		 11789 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11790 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
8d63f375 11791 */
3772a991 11792static pci_ers_result_t
da0436e9 11793lpfc_io_slot_reset_s4(struct pci_dev *pdev)
8d63f375 11794{
75baf696
JS		 11795 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11796 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11797 struct lpfc_sli *psli = &phba->sli;
11798 uint32_t intr_mode;
11799
11800 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
11801 if (pci_enable_device_mem(pdev)) {
11802 printk(KERN_ERR "lpfc: Cannot re-enable "
11803 "PCI device after reset.\n");
11804 return PCI_ERS_RESULT_DISCONNECT;
11805 }
11806
11807 pci_restore_state(pdev);
0a96e975
JS		 11808
11809 /*
11810 * As the new kernel behavior of pci_restore_state() API call clears
11811 * device saved_state flag, need to save the restored state again.
11812 */
11813 pci_save_state(pdev);
11814
75baf696
JS		 11815 if (pdev->is_busmaster)
11816 pci_set_master(pdev);
11817
11818 spin_lock_irq(&phba->hbalock);
11819 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
11820 spin_unlock_irq(&phba->hbalock);
11821
11822 /* Configure and enable interrupt */
11823 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
11824 if (intr_mode == LPFC_INTR_ERROR) {
11825 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11826 "2824 Cannot re-enable interrupt after "
11827 "slot reset.\n");
11828 return PCI_ERS_RESULT_DISCONNECT;
11829 } else
11830 phba->intr_mode = intr_mode;
11831
11832 /* Log the current active interrupt mode */
11833 lpfc_log_intr_mode(phba, phba->intr_mode);
11834
8d63f375
LV		 11835 return PCI_ERS_RESULT_RECOVERED;
11836}
11837
11838/**
da0436e9 11839 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device
e59058c4 11840 * @pdev: pointer to PCI device
8d63f375 11841 *
3772a991 11842 * This routine is called from the PCI subsystem for error handling to device
da0436e9 11843 * with SLI-4 interface spec. It is called when kernel error recovery tells
3772a991
JS		 11844 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
11845 * error recovery. After this call, traffic can start to flow from this device
11846 * again.
da0436e9 11847 **/
3772a991 11848static void
da0436e9 11849lpfc_io_resume_s4(struct pci_dev *pdev)
8d63f375 11850{
75baf696
JS		 11851 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11852 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11853
11854 /*
11855 * In case of slot reset, as function reset is performed through
11856 * mailbox command which needs DMA to be enabled, this operation
11857 * has to be moved to the io resume phase. Taking device offline
11858 * will perform the necessary cleanup.
11859 */
11860 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) {
11861 /* Perform device reset */
618a5230 11862 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
75baf696
JS		 11863 lpfc_offline(phba);
11864 lpfc_sli_brdrestart(phba);
11865 /* Bring the device back online */
11866 lpfc_online(phba);
11867 }
11868
11869 /* Clean up Advanced Error Reporting (AER) if needed */
11870 if (phba->hba_flag & HBA_AER_ENABLED)
11871 pci_cleanup_aer_uncorrect_error_status(pdev);
8d63f375
LV		 11872}
11873
3772a991
JS		 11874/**
11875 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem
11876 * @pdev: pointer to PCI device
11877 * @pid: pointer to PCI device identifier
11878 *
11879 * This routine is to be registered to the kernel's PCI subsystem. When an
11880 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks
11881 * at PCI device-specific information of the device and driver to see if the
11882 * driver state that it can support this kind of device. If the match is
11883 * successful, the driver core invokes this routine. This routine dispatches
11884 * the action to the proper SLI-3 or SLI-4 device probing routine, which will
11885 * do all the initialization that it needs to do to handle the HBA device
11886 * properly.
11887 *
11888 * Return code
11889 * 0 - driver can claim the device
11890 * negative value - driver can not claim the device
11891 **/
6f039790 11892static int
3772a991
JS		 11893lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
11894{
11895 int rc;
8fa38513 11896 struct lpfc_sli_intf intf;
3772a991 11897
28baac74 11898 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
3772a991
JS		 11899 return -ENODEV;
11900
8fa38513 11901 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
28baac74 11902 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
da0436e9 11903 rc = lpfc_pci_probe_one_s4(pdev, pid);
8fa38513 11904 else
3772a991 11905 rc = lpfc_pci_probe_one_s3(pdev, pid);
8fa38513 11906
3772a991
JS		 11907 return rc;
11908}
11909
11910/**
11911 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem
11912 * @pdev: pointer to PCI device
11913 *
11914 * This routine is to be registered to the kernel's PCI subsystem. When an
11915 * Emulex HBA is removed from PCI bus, the driver core invokes this routine.
11916 * This routine dispatches the action to the proper SLI-3 or SLI-4 device
11917 * remove routine, which will perform all the necessary cleanup for the
11918 * device to be removed from the PCI subsystem properly.
11919 **/
6f039790 11920static void
3772a991
JS		 11921lpfc_pci_remove_one(struct pci_dev *pdev)
11922{
11923 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11924 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11925
11926 switch (phba->pci_dev_grp) {
11927 case LPFC_PCI_DEV_LP:
11928 lpfc_pci_remove_one_s3(pdev);
11929 break;
da0436e9
JS		 11930 case LPFC_PCI_DEV_OC:
11931 lpfc_pci_remove_one_s4(pdev);
11932 break;
3772a991
JS		 11933 default:
11934 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11935 "1424 Invalid PCI device group: 0x%x\n",
11936 phba->pci_dev_grp);
11937 break;
11938 }
11939 return;
11940}
11941
11942/**
11943 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management
11944 * @pdev: pointer to PCI device
11945 * @msg: power management message
11946 *
11947 * This routine is to be registered to the kernel's PCI subsystem to support
11948 * system Power Management (PM). When PM invokes this method, it dispatches
11949 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will
11950 * suspend the device.
11951 *
11952 * Return code
11953 * 0 - driver suspended the device
11954 * Error otherwise
11955 **/
11956static int
11957lpfc_pci_suspend_one(struct pci_dev *pdev, pm_message_t msg)
11958{
11959 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11960 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11961 int rc = -ENODEV;
11962
11963 switch (phba->pci_dev_grp) {
11964 case LPFC_PCI_DEV_LP:
11965 rc = lpfc_pci_suspend_one_s3(pdev, msg);
11966 break;
da0436e9
JS		 11967 case LPFC_PCI_DEV_OC:
11968 rc = lpfc_pci_suspend_one_s4(pdev, msg);
11969 break;
3772a991
JS		 11970 default:
11971 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11972 "1425 Invalid PCI device group: 0x%x\n",
11973 phba->pci_dev_grp);
11974 break;
11975 }
11976 return rc;
11977}
11978
11979/**
11980 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management
11981 * @pdev: pointer to PCI device
11982 *
11983 * This routine is to be registered to the kernel's PCI subsystem to support
11984 * system Power Management (PM). When PM invokes this method, it dispatches
11985 * the action to the proper SLI-3 or SLI-4 device resume routine, which will
11986 * resume the device.
11987 *
11988 * Return code
11989 * 0 - driver suspended the device
11990 * Error otherwise
11991 **/
11992static int
11993lpfc_pci_resume_one(struct pci_dev *pdev)
11994{
11995 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11996 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11997 int rc = -ENODEV;
11998
11999 switch (phba->pci_dev_grp) {
12000 case LPFC_PCI_DEV_LP:
12001 rc = lpfc_pci_resume_one_s3(pdev);
12002 break;
da0436e9
JS		 12003 case LPFC_PCI_DEV_OC:
12004 rc = lpfc_pci_resume_one_s4(pdev);
12005 break;
3772a991
JS		 12006 default:
12007 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12008 "1426 Invalid PCI device group: 0x%x\n",
12009 phba->pci_dev_grp);
12010 break;
12011 }
12012 return rc;
12013}
12014
12015/**
12016 * lpfc_io_error_detected - lpfc method for handling PCI I/O error
12017 * @pdev: pointer to PCI device.
12018 * @state: the current PCI connection state.
12019 *
12020 * This routine is registered to the PCI subsystem for error handling. This
12021 * function is called by the PCI subsystem after a PCI bus error affecting
12022 * this device has been detected. When this routine is invoked, it dispatches
12023 * the action to the proper SLI-3 or SLI-4 device error detected handling
12024 * routine, which will perform the proper error detected operation.
12025 *
12026 * Return codes
12027 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
12028 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
12029 **/
12030static pci_ers_result_t
12031lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
12032{
12033 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12034 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12035 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
12036
12037 switch (phba->pci_dev_grp) {
12038 case LPFC_PCI_DEV_LP:
12039 rc = lpfc_io_error_detected_s3(pdev, state);
12040 break;
da0436e9
JS		 12041 case LPFC_PCI_DEV_OC:
12042 rc = lpfc_io_error_detected_s4(pdev, state);
12043 break;
3772a991
JS		 12044 default:
12045 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12046 "1427 Invalid PCI device group: 0x%x\n",
12047 phba->pci_dev_grp);
12048 break;
12049 }
12050 return rc;
12051}
12052
12053/**
12054 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch
12055 * @pdev: pointer to PCI device.
12056 *
12057 * This routine is registered to the PCI subsystem for error handling. This
12058 * function is called after PCI bus has been reset to restart the PCI card
12059 * from scratch, as if from a cold-boot. When this routine is invoked, it
12060 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling
12061 * routine, which will perform the proper device reset.
12062 *
12063 * Return codes
12064 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
12065 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
12066 **/
12067static pci_ers_result_t
12068lpfc_io_slot_reset(struct pci_dev *pdev)
12069{
12070 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12071 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12072 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
12073
12074 switch (phba->pci_dev_grp) {
12075 case LPFC_PCI_DEV_LP:
12076 rc = lpfc_io_slot_reset_s3(pdev);
12077 break;
da0436e9
JS		 12078 case LPFC_PCI_DEV_OC:
12079 rc = lpfc_io_slot_reset_s4(pdev);
12080 break;
3772a991
JS		 12081 default:
12082 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12083 "1428 Invalid PCI device group: 0x%x\n",
12084 phba->pci_dev_grp);
12085 break;
12086 }
12087 return rc;
12088}
12089
12090/**
12091 * lpfc_io_resume - lpfc method for resuming PCI I/O operation
12092 * @pdev: pointer to PCI device
12093 *
12094 * This routine is registered to the PCI subsystem for error handling. It
12095 * is called when kernel error recovery tells the lpfc driver that it is
12096 * OK to resume normal PCI operation after PCI bus error recovery. When
12097 * this routine is invoked, it dispatches the action to the proper SLI-3
12098 * or SLI-4 device io_resume routine, which will resume the device operation.
12099 **/
12100static void
12101lpfc_io_resume(struct pci_dev *pdev)
12102{
12103 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12104 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12105
12106 switch (phba->pci_dev_grp) {
12107 case LPFC_PCI_DEV_LP:
12108 lpfc_io_resume_s3(pdev);
12109 break;
da0436e9
JS		 12110 case LPFC_PCI_DEV_OC:
12111 lpfc_io_resume_s4(pdev);
12112 break;
3772a991
JS		 12113 default:
12114 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12115 "1429 Invalid PCI device group: 0x%x\n",
12116 phba->pci_dev_grp);
12117 break;
12118 }
12119 return;
12120}
12121
1ba981fd
JS		 12122/**
12123 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter
12124 * @phba: pointer to lpfc hba data structure.
12125 *
12126 * This routine checks to see if OAS is supported for this adapter. If
12127 * supported, the configure Flash Optimized Fabric flag is set. Otherwise,
12128 * the enable oas flag is cleared and the pool created for OAS device data
12129 * is destroyed.
12130 *
12131 **/
12132void
12133lpfc_sli4_oas_verify(struct lpfc_hba *phba)
12134{
12135
12136 if (!phba->cfg_EnableXLane)
12137 return;
12138
12139 if (phba->sli4_hba.pc_sli4_params.oas_supported) {
12140 phba->cfg_fof = 1;
12141 } else {
f38fa0bb 12142 phba->cfg_fof = 0;
1ba981fd
JS		 12143 if (phba->device_data_mem_pool)
12144 mempool_destroy(phba->device_data_mem_pool);
12145 phba->device_data_mem_pool = NULL;
12146 }
12147
12148 return;
12149}
12150
12151/**
12152 * lpfc_fof_queue_setup - Set up all the fof queues
12153 * @phba: pointer to lpfc hba data structure.
12154 *
12155 * This routine is invoked to set up all the fof queues for the FC HBA
12156 * operation.
12157 *
12158 * Return codes
12159 * 0 - successful
12160 * -ENOMEM - No available memory
12161 **/
12162int
12163lpfc_fof_queue_setup(struct lpfc_hba *phba)
12164{
895427bd 12165 struct lpfc_sli_ring *pring;
1ba981fd
JS		 12166 int rc;
12167
12168 rc = lpfc_eq_create(phba, phba->sli4_hba.fof_eq, LPFC_MAX_IMAX);
12169 if (rc)
12170 return -ENOMEM;
12171
f38fa0bb 12172 if (phba->cfg_fof) {
1ba981fd
JS		 12173
12174 rc = lpfc_cq_create(phba, phba->sli4_hba.oas_cq,
12175 phba->sli4_hba.fof_eq, LPFC_WCQ, LPFC_FCP);
12176 if (rc)
12177 goto out_oas_cq;
12178
12179 rc = lpfc_wq_create(phba, phba->sli4_hba.oas_wq,
12180 phba->sli4_hba.oas_cq, LPFC_FCP);
12181 if (rc)
12182 goto out_oas_wq;
12183
895427bd
JS		 12184 /* Bind this CQ/WQ to the NVME ring */
12185 pring = phba->sli4_hba.oas_wq->pring;
12186 pring->sli.sli4.wqp =
12187 (void *)phba->sli4_hba.oas_wq;
12188 phba->sli4_hba.oas_cq->pring = pring;
1ba981fd
JS		 12189 }
12190
12191 return 0;
12192
12193out_oas_wq:
f38fa0bb 12194 lpfc_cq_destroy(phba, phba->sli4_hba.oas_cq);
1ba981fd
JS		 12195out_oas_cq:
12196 lpfc_eq_destroy(phba, phba->sli4_hba.fof_eq);
12197 return rc;
12198
12199}
12200
12201/**
12202 * lpfc_fof_queue_create - Create all the fof queues
12203 * @phba: pointer to lpfc hba data structure.
12204 *
12205 * This routine is invoked to allocate all the fof queues for the FC HBA
12206 * operation. For each SLI4 queue type, the parameters such as queue entry
12207 * count (queue depth) shall be taken from the module parameter. For now,
12208 * we just use some constant number as place holder.
12209 *
12210 * Return codes
12211 * 0 - successful
12212 * -ENOMEM - No availble memory
12213 * -EIO - The mailbox failed to complete successfully.
12214 **/
12215int
12216lpfc_fof_queue_create(struct lpfc_hba *phba)
12217{
12218 struct lpfc_queue *qdesc;
7e04e21a 12219 uint32_t wqesize;
1ba981fd
JS		 12220
12221 /* Create FOF EQ */
81b96eda
JS		 12222 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
12223 phba->sli4_hba.eq_esize,
1ba981fd
JS		 12224 phba->sli4_hba.eq_ecount);
12225 if (!qdesc)
12226 goto out_error;
12227
12228 phba->sli4_hba.fof_eq = qdesc;
12229
f38fa0bb 12230 if (phba->cfg_fof) {
1ba981fd
JS		 12231
12232 /* Create OAS CQ */
81b96eda
JS		 12233 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
12234 phba->sli4_hba.cq_esize,
12235 phba->sli4_hba.cq_ecount);
1ba981fd
JS		 12236 if (!qdesc)
12237 goto out_error;
12238
12239 phba->sli4_hba.oas_cq = qdesc;
12240
12241 /* Create OAS WQ */
7e04e21a
JS		 12242 wqesize = (phba->fcp_embed_io) ?
12243 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
81b96eda
JS		 12244 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
12245 wqesize,
1ba981fd 12246 phba->sli4_hba.wq_ecount);
7e04e21a 12247
1ba981fd
JS		 12248 if (!qdesc)
12249 goto out_error;
12250
12251 phba->sli4_hba.oas_wq = qdesc;
895427bd 12252 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
1ba981fd
JS		 12253
12254 }
12255 return 0;
12256
12257out_error:
12258 lpfc_fof_queue_destroy(phba);
12259 return -ENOMEM;
12260}
12261
12262/**
12263 * lpfc_fof_queue_destroy - Destroy all the fof queues
12264 * @phba: pointer to lpfc hba data structure.
12265 *
12266 * This routine is invoked to release all the SLI4 queues with the FC HBA
12267 * operation.
12268 *
12269 * Return codes
12270 * 0 - successful
12271 **/
12272int
12273lpfc_fof_queue_destroy(struct lpfc_hba *phba)
12274{
12275 /* Release FOF Event queue */
12276 if (phba->sli4_hba.fof_eq != NULL) {
12277 lpfc_sli4_queue_free(phba->sli4_hba.fof_eq);
12278 phba->sli4_hba.fof_eq = NULL;
12279 }
12280
12281 /* Release OAS Completion queue */
12282 if (phba->sli4_hba.oas_cq != NULL) {
12283 lpfc_sli4_queue_free(phba->sli4_hba.oas_cq);
12284 phba->sli4_hba.oas_cq = NULL;
12285 }
12286
12287 /* Release OAS Work queue */
12288 if (phba->sli4_hba.oas_wq != NULL) {
12289 lpfc_sli4_queue_free(phba->sli4_hba.oas_wq);
12290 phba->sli4_hba.oas_wq = NULL;
12291 }
12292 return 0;
12293}
12294
dea3101e 12295MODULE_DEVICE_TABLE(pci, lpfc_id_table);
12296
a55b2d21 12297static const struct pci_error_handlers lpfc_err_handler = {
8d63f375
LV		 12298 .error_detected = lpfc_io_error_detected,
12299 .slot_reset = lpfc_io_slot_reset,
12300 .resume = lpfc_io_resume,
12301};
12302
dea3101e 12303static struct pci_driver lpfc_driver = {
12304 .name = LPFC_DRIVER_NAME,
12305 .id_table = lpfc_id_table,
12306 .probe = lpfc_pci_probe_one,
6f039790 12307 .remove = lpfc_pci_remove_one,
85e8a239 12308 .shutdown = lpfc_pci_remove_one,
3a55b532 12309 .suspend = lpfc_pci_suspend_one,
3772a991 12310 .resume = lpfc_pci_resume_one,
2e0fef85 12311 .err_handler = &lpfc_err_handler,
dea3101e 12312};
12313
3ef6d24c 12314static const struct file_operations lpfc_mgmt_fop = {
858feacd 12315 .owner = THIS_MODULE,
3ef6d24c
JS		 12316};
12317
12318static struct miscdevice lpfc_mgmt_dev = {
12319 .minor = MISC_DYNAMIC_MINOR,
12320 .name = "lpfcmgmt",
12321 .fops = &lpfc_mgmt_fop,
12322};
12323
e59058c4 12324/**
3621a710 12325 * lpfc_init - lpfc module initialization routine
e59058c4
JS		 12326 *
12327 * This routine is to be invoked when the lpfc module is loaded into the
12328 * kernel. The special kernel macro module_init() is used to indicate the
12329 * role of this routine to the kernel as lpfc module entry point.
12330 *
12331 * Return codes
12332 * 0 - successful
12333 * -ENOMEM - FC attach transport failed
12334 * all others - failed
12335 */
dea3101e 12336static int __init
12337lpfc_init(void)
12338{
12339 int error = 0;
12340
12341 printk(LPFC_MODULE_DESC "\n");
c44ce173 12342 printk(LPFC_COPYRIGHT "\n");
dea3101e 12343
3ef6d24c
JS		 12344 error = misc_register(&lpfc_mgmt_dev);
12345 if (error)
12346 printk(KERN_ERR "Could not register lpfcmgmt device, "
12347 "misc_register returned with status %d", error);
12348
458c083e
JS		 12349 lpfc_transport_functions.vport_create = lpfc_vport_create;
12350 lpfc_transport_functions.vport_delete = lpfc_vport_delete;
dea3101e 12351 lpfc_transport_template =
12352 fc_attach_transport(&lpfc_transport_functions);
7ee5d43e 12353 if (lpfc_transport_template == NULL)
dea3101e 12354 return -ENOMEM;
458c083e
JS		 12355 lpfc_vport_transport_template =
12356 fc_attach_transport(&lpfc_vport_transport_functions);
12357 if (lpfc_vport_transport_template == NULL) {
12358 fc_release_transport(lpfc_transport_template);
12359 return -ENOMEM;
7ee5d43e 12360 }
7bb03bbf
JS		 12361
12362 /* Initialize in case vector mapping is needed */
b246de17 12363 lpfc_used_cpu = NULL;
2ea259ee 12364 lpfc_present_cpu = num_present_cpus();
7bb03bbf 12365
dea3101e 12366 error = pci_register_driver(&lpfc_driver);
92d7f7b0 12367 if (error) {
dea3101e 12368 fc_release_transport(lpfc_transport_template);
458c083e 12369 fc_release_transport(lpfc_vport_transport_template);
92d7f7b0 12370 }
dea3101e 12371
12372 return error;
12373}
12374
e59058c4 12375/**
3621a710 12376 * lpfc_exit - lpfc module removal routine
e59058c4
JS		 12377 *
12378 * This routine is invoked when the lpfc module is removed from the kernel.
12379 * The special kernel macro module_exit() is used to indicate the role of
12380 * this routine to the kernel as lpfc module exit point.
12381 */
dea3101e 12382static void __exit
12383lpfc_exit(void)
12384{
3ef6d24c 12385 misc_deregister(&lpfc_mgmt_dev);
dea3101e 12386 pci_unregister_driver(&lpfc_driver);
12387 fc_release_transport(lpfc_transport_template);
458c083e 12388 fc_release_transport(lpfc_vport_transport_template);
81301a9b 12389 if (_dump_buf_data) {
6a9c52cf
JS		 12390 printk(KERN_ERR "9062 BLKGRD: freeing %lu pages for "
12391 "_dump_buf_data at 0x%p\n",
81301a9b
JS		 12392 (1L << _dump_buf_data_order), _dump_buf_data);
12393 free_pages((unsigned long)_dump_buf_data, _dump_buf_data_order);
12394 }
12395
12396 if (_dump_buf_dif) {
6a9c52cf
JS		 12397 printk(KERN_ERR "9049 BLKGRD: freeing %lu pages for "
12398 "_dump_buf_dif at 0x%p\n",
81301a9b
JS		 12399 (1L << _dump_buf_dif_order), _dump_buf_dif);
12400 free_pages((unsigned long)_dump_buf_dif, _dump_buf_dif_order);
12401 }
b246de17 12402 kfree(lpfc_used_cpu);
7973967f 12403 idr_destroy(&lpfc_hba_index);
dea3101e 12404}
12405
12406module_init(lpfc_init);
12407module_exit(lpfc_exit);
12408MODULE_LICENSE("GPL");
12409MODULE_DESCRIPTION(LPFC_MODULE_DESC);
d080abe0 12410MODULE_AUTHOR("Broadcom");
dea3101e 12411MODULE_VERSION("0:" LPFC_DRIVER_VERSION);
Linux 6.x block layer and io_uring tree(s)