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scsi: lpfc: Fix nvme_info sysfs output to be consistent
[linux-2.6-block.git] / drivers / scsi / lpfc / lpfc_init.c
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dea3101e 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
d080abe0
JS		 4 * Copyright (C) 2017 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Limited and/or its subsidiaries. *
50611577 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
c44ce173 7 * EMULEX and SLI are trademarks of Emulex. *
d080abe0 8 * www.broadcom.com *
c44ce173 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e 10 * *
11 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC		 12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
dea3101e 22 *******************************************************************/
23
dea3101e 24#include <linux/blkdev.h>
25#include <linux/delay.h>
26#include <linux/dma-mapping.h>
27#include <linux/idr.h>
28#include <linux/interrupt.h>
acf3368f 29#include <linux/module.h>
dea3101e 30#include <linux/kthread.h>
31#include <linux/pci.h>
32#include <linux/spinlock.h>
92d7f7b0 33#include <linux/ctype.h>
0d878419 34#include <linux/aer.h>
5a0e3ad6 35#include <linux/slab.h>
52d52440 36#include <linux/firmware.h>
3ef6d24c 37#include <linux/miscdevice.h>
7bb03bbf 38#include <linux/percpu.h>
895427bd 39#include <linux/msi.h>
dea3101e 40
91886523 41#include <scsi/scsi.h>
dea3101e 42#include <scsi/scsi_device.h>
43#include <scsi/scsi_host.h>
44#include <scsi/scsi_transport_fc.h>
86c67379
JS		 45#include <scsi/scsi_tcq.h>
46#include <scsi/fc/fc_fs.h>
47
48#include <linux/nvme-fc-driver.h>
dea3101e 49
da0436e9 50#include "lpfc_hw4.h"
dea3101e 51#include "lpfc_hw.h"
52#include "lpfc_sli.h"
da0436e9 53#include "lpfc_sli4.h"
ea2151b4 54#include "lpfc_nl.h"
dea3101e 55#include "lpfc_disc.h"
dea3101e 56#include "lpfc.h"
895427bd
JS		 57#include "lpfc_scsi.h"
58#include "lpfc_nvme.h"
86c67379 59#include "lpfc_nvmet.h"
dea3101e 60#include "lpfc_logmsg.h"
61#include "lpfc_crtn.h"
92d7f7b0 62#include "lpfc_vport.h"
dea3101e 63#include "lpfc_version.h"
12f44457 64#include "lpfc_ids.h"
dea3101e 65
81301a9b
JS		 66char *_dump_buf_data;
67unsigned long _dump_buf_data_order;
68char *_dump_buf_dif;
69unsigned long _dump_buf_dif_order;
70spinlock_t _dump_buf_lock;
71
7bb03bbf 72/* Used when mapping IRQ vectors in a driver centric manner */
b246de17
JS		 73uint16_t *lpfc_used_cpu;
74uint32_t lpfc_present_cpu;
7bb03bbf 75
dea3101e 76static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
77static int lpfc_post_rcv_buf(struct lpfc_hba *);
5350d872 78static int lpfc_sli4_queue_verify(struct lpfc_hba *);
da0436e9
JS		 79static int lpfc_create_bootstrap_mbox(struct lpfc_hba *);
80static int lpfc_setup_endian_order(struct lpfc_hba *);
da0436e9 81static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *);
8a9d2e80 82static void lpfc_free_els_sgl_list(struct lpfc_hba *);
f358dd0c 83static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *);
8a9d2e80 84static void lpfc_init_sgl_list(struct lpfc_hba *);
da0436e9
JS		 85static int lpfc_init_active_sgl_array(struct lpfc_hba *);
86static void lpfc_free_active_sgl(struct lpfc_hba *);
87static int lpfc_hba_down_post_s3(struct lpfc_hba *phba);
88static int lpfc_hba_down_post_s4(struct lpfc_hba *phba);
89static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *);
90static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *);
91static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *);
618a5230
JS		 92static void lpfc_sli4_disable_intr(struct lpfc_hba *);
93static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t);
1ba981fd 94static void lpfc_sli4_oas_verify(struct lpfc_hba *phba);
dea3101e 95
96static struct scsi_transport_template *lpfc_transport_template = NULL;
92d7f7b0 97static struct scsi_transport_template *lpfc_vport_transport_template = NULL;
dea3101e 98static DEFINE_IDR(lpfc_hba_index);
f358dd0c 99#define LPFC_NVMET_BUF_POST 254
dea3101e 100
e59058c4 101/**
3621a710 102 * lpfc_config_port_prep - Perform lpfc initialization prior to config port
e59058c4
JS		 103 * @phba: pointer to lpfc hba data structure.
104 *
105 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT
106 * mailbox command. It retrieves the revision information from the HBA and
107 * collects the Vital Product Data (VPD) about the HBA for preparing the
108 * configuration of the HBA.
109 *
110 * Return codes:
111 * 0 - success.
112 * -ERESTART - requests the SLI layer to reset the HBA and try again.
113 * Any other value - indicates an error.
114 **/
dea3101e 115int
2e0fef85 116lpfc_config_port_prep(struct lpfc_hba *phba)
dea3101e 117{
118 lpfc_vpd_t *vp = &phba->vpd;
119 int i = 0, rc;
120 LPFC_MBOXQ_t *pmb;
121 MAILBOX_t *mb;
122 char *lpfc_vpd_data = NULL;
123 uint16_t offset = 0;
124 static char licensed[56] =
125 "key unlock for use with gnu public licensed code only\0";
65a29c16 126 static int init_key = 1;
dea3101e 127
128 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
129 if (!pmb) {
2e0fef85 130 phba->link_state = LPFC_HBA_ERROR;
dea3101e 131 return -ENOMEM;
132 }
133
04c68496 134 mb = &pmb->u.mb;
2e0fef85 135 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 136
137 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
65a29c16
JS		 138 if (init_key) {
139 uint32_t *ptext = (uint32_t *) licensed;
dea3101e 140
65a29c16
JS		 141 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
142 *ptext = cpu_to_be32(*ptext);
143 init_key = 0;
144 }
dea3101e 145
146 lpfc_read_nv(phba, pmb);
147 memset((char*)mb->un.varRDnvp.rsvd3, 0,
148 sizeof (mb->un.varRDnvp.rsvd3));
149 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
150 sizeof (licensed));
151
152 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
153
154 if (rc != MBX_SUCCESS) {
ed957684 155 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
e8b62011 156 "0324 Config Port initialization "
dea3101e 157 "error, mbxCmd x%x READ_NVPARM, "
158 "mbxStatus x%x\n",
dea3101e 159 mb->mbxCommand, mb->mbxStatus);
160 mempool_free(pmb, phba->mbox_mem_pool);
161 return -ERESTART;
162 }
163 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
2e0fef85
JS		 164 sizeof(phba->wwnn));
165 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname,
166 sizeof(phba->wwpn));
dea3101e 167 }
168
92d7f7b0
JS		 169 phba->sli3_options = 0x0;
170
dea3101e 171 /* Setup and issue mailbox READ REV command */
172 lpfc_read_rev(phba, pmb);
173 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
174 if (rc != MBX_SUCCESS) {
ed957684 175 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 176 "0439 Adapter failed to init, mbxCmd x%x "
dea3101e 177 "READ_REV, mbxStatus x%x\n",
dea3101e 178 mb->mbxCommand, mb->mbxStatus);
179 mempool_free( pmb, phba->mbox_mem_pool);
180 return -ERESTART;
181 }
182
92d7f7b0 183
1de933f3
JSEC		 184 /*
185 * The value of rr must be 1 since the driver set the cv field to 1.
186 * This setting requires the FW to set all revision fields.
dea3101e 187 */
1de933f3 188 if (mb->un.varRdRev.rr == 0) {
dea3101e 189 vp->rev.rBit = 0;
1de933f3 190 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS		 191 "0440 Adapter failed to init, READ_REV has "
192 "missing revision information.\n");
dea3101e 193 mempool_free(pmb, phba->mbox_mem_pool);
194 return -ERESTART;
dea3101e 195 }
196
495a714c
JS		 197 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) {
198 mempool_free(pmb, phba->mbox_mem_pool);
ed957684 199 return -EINVAL;
495a714c 200 }
ed957684 201
dea3101e 202 /* Save information as VPD data */
1de933f3 203 vp->rev.rBit = 1;
92d7f7b0 204 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t));
1de933f3
JSEC		 205 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
206 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
207 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
208 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
dea3101e 209 vp->rev.biuRev = mb->un.varRdRev.biuRev;
210 vp->rev.smRev = mb->un.varRdRev.smRev;
211 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
212 vp->rev.endecRev = mb->un.varRdRev.endecRev;
213 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
214 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
215 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
216 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
217 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
218 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
219
92d7f7b0
JS		 220 /* If the sli feature level is less then 9, we must
221 * tear down all RPIs and VPIs on link down if NPIV
222 * is enabled.
223 */
224 if (vp->rev.feaLevelHigh < 9)
225 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN;
226
dea3101e 227 if (lpfc_is_LC_HBA(phba->pcidev->device))
228 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
229 sizeof (phba->RandomData));
230
dea3101e 231 /* Get adapter VPD information */
dea3101e 232 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
233 if (!lpfc_vpd_data)
d7c255b2 234 goto out_free_mbox;
dea3101e 235 do {
a0c87cbd 236 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD);
dea3101e 237 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
238
239 if (rc != MBX_SUCCESS) {
240 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 241 "0441 VPD not present on adapter, "
dea3101e 242 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
dea3101e 243 mb->mbxCommand, mb->mbxStatus);
74b72a59 244 mb->un.varDmp.word_cnt = 0;
dea3101e 245 }
04c68496
JS		 246 /* dump mem may return a zero when finished or we got a
247 * mailbox error, either way we are done.
248 */
249 if (mb->un.varDmp.word_cnt == 0)
250 break;
74b72a59
JW		 251 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
252 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
d7c255b2
JS		 253 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
254 lpfc_vpd_data + offset,
92d7f7b0 255 mb->un.varDmp.word_cnt);
dea3101e 256 offset += mb->un.varDmp.word_cnt;
74b72a59
JW		 257 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
258 lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
dea3101e 259
260 kfree(lpfc_vpd_data);
dea3101e 261out_free_mbox:
262 mempool_free(pmb, phba->mbox_mem_pool);
263 return 0;
264}
265
e59058c4 266/**
3621a710 267 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd
e59058c4
JS		 268 * @phba: pointer to lpfc hba data structure.
269 * @pmboxq: pointer to the driver internal queue element for mailbox command.
270 *
271 * This is the completion handler for driver's configuring asynchronous event
272 * mailbox command to the device. If the mailbox command returns successfully,
273 * it will set internal async event support flag to 1; otherwise, it will
274 * set internal async event support flag to 0.
275 **/
57127f15
JS		 276static void
277lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
278{
04c68496 279 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS)
57127f15
JS		 280 phba->temp_sensor_support = 1;
281 else
282 phba->temp_sensor_support = 0;
283 mempool_free(pmboxq, phba->mbox_mem_pool);
284 return;
285}
286
97207482 287/**
3621a710 288 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler
97207482
JS		 289 * @phba: pointer to lpfc hba data structure.
290 * @pmboxq: pointer to the driver internal queue element for mailbox command.
291 *
292 * This is the completion handler for dump mailbox command for getting
293 * wake up parameters. When this command complete, the response contain
294 * Option rom version of the HBA. This function translate the version number
295 * into a human readable string and store it in OptionROMVersion.
296 **/
297static void
298lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
299{
300 struct prog_id *prg;
301 uint32_t prog_id_word;
302 char dist = ' ';
303 /* character array used for decoding dist type. */
304 char dist_char[] = "nabx";
305
04c68496 306 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) {
9f1e1b50 307 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482 308 return;
9f1e1b50 309 }
97207482
JS		 310
311 prg = (struct prog_id *) &prog_id_word;
312
313 /* word 7 contain option rom version */
04c68496 314 prog_id_word = pmboxq->u.mb.un.varWords[7];
97207482
JS		 315
316 /* Decode the Option rom version word to a readable string */
317 if (prg->dist < 4)
318 dist = dist_char[prg->dist];
319
320 if ((prg->dist == 3) && (prg->num == 0))
a2fc4aef 321 snprintf(phba->OptionROMVersion, 32, "%d.%d%d",
97207482
JS		 322 prg->ver, prg->rev, prg->lev);
323 else
a2fc4aef 324 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d",
97207482
JS		 325 prg->ver, prg->rev, prg->lev,
326 dist, prg->num);
9f1e1b50 327 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482
JS		 328 return;
329}
330
0558056c
JS		 331/**
332 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname,
333 * cfg_soft_wwnn, cfg_soft_wwpn
334 * @vport: pointer to lpfc vport data structure.
335 *
336 *
337 * Return codes
338 * None.
339 **/
340void
341lpfc_update_vport_wwn(struct lpfc_vport *vport)
342{
aeb3c817
JS		 343 uint8_t vvvl = vport->fc_sparam.cmn.valid_vendor_ver_level;
344 u32 *fawwpn_key = (u32 *)&vport->fc_sparam.un.vendorVersion[0];
345
0558056c
JS		 346 /* If the soft name exists then update it using the service params */
347 if (vport->phba->cfg_soft_wwnn)
348 u64_to_wwn(vport->phba->cfg_soft_wwnn,
349 vport->fc_sparam.nodeName.u.wwn);
350 if (vport->phba->cfg_soft_wwpn)
351 u64_to_wwn(vport->phba->cfg_soft_wwpn,
352 vport->fc_sparam.portName.u.wwn);
353
354 /*
355 * If the name is empty or there exists a soft name
356 * then copy the service params name, otherwise use the fc name
357 */
358 if (vport->fc_nodename.u.wwn[0] == 0 || vport->phba->cfg_soft_wwnn)
359 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
360 sizeof(struct lpfc_name));
361 else
362 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename,
363 sizeof(struct lpfc_name));
364
aeb3c817
JS		 365 /*
366 * If the port name has changed, then set the Param changes flag
367 * to unreg the login
368 */
369 if (vport->fc_portname.u.wwn[0] != 0 &&
370 memcmp(&vport->fc_portname, &vport->fc_sparam.portName,
371 sizeof(struct lpfc_name)))
372 vport->vport_flag |= FAWWPN_PARAM_CHG;
373
374 if (vport->fc_portname.u.wwn[0] == 0 ||
375 vport->phba->cfg_soft_wwpn ||
376 (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR) ||
377 vport->vport_flag & FAWWPN_SET) {
0558056c
JS		 378 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
379 sizeof(struct lpfc_name));
aeb3c817
JS		 380 vport->vport_flag &= ~FAWWPN_SET;
381 if (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR)
382 vport->vport_flag |= FAWWPN_SET;
383 }
0558056c
JS		 384 else
385 memcpy(&vport->fc_sparam.portName, &vport->fc_portname,
386 sizeof(struct lpfc_name));
387}
388
e59058c4 389/**
3621a710 390 * lpfc_config_port_post - Perform lpfc initialization after config port
e59058c4
JS		 391 * @phba: pointer to lpfc hba data structure.
392 *
393 * This routine will do LPFC initialization after the CONFIG_PORT mailbox
394 * command call. It performs all internal resource and state setups on the
395 * port: post IOCB buffers, enable appropriate host interrupt attentions,
396 * ELS ring timers, etc.
397 *
398 * Return codes
399 * 0 - success.
400 * Any other value - error.
401 **/
dea3101e 402int
2e0fef85 403lpfc_config_port_post(struct lpfc_hba *phba)
dea3101e 404{
2e0fef85 405 struct lpfc_vport *vport = phba->pport;
a257bf90 406 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
dea3101e 407 LPFC_MBOXQ_t *pmb;
408 MAILBOX_t *mb;
409 struct lpfc_dmabuf *mp;
410 struct lpfc_sli *psli = &phba->sli;
411 uint32_t status, timeout;
2e0fef85
JS		 412 int i, j;
413 int rc;
dea3101e 414
7af67051
JS		 415 spin_lock_irq(&phba->hbalock);
416 /*
417 * If the Config port completed correctly the HBA is not
418 * over heated any more.
419 */
420 if (phba->over_temp_state == HBA_OVER_TEMP)
421 phba->over_temp_state = HBA_NORMAL_TEMP;
422 spin_unlock_irq(&phba->hbalock);
423
dea3101e 424 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
425 if (!pmb) {
2e0fef85 426 phba->link_state = LPFC_HBA_ERROR;
dea3101e 427 return -ENOMEM;
428 }
04c68496 429 mb = &pmb->u.mb;
dea3101e 430
dea3101e 431 /* Get login parameters for NID. */
9f1177a3
JS		 432 rc = lpfc_read_sparam(phba, pmb, 0);
433 if (rc) {
434 mempool_free(pmb, phba->mbox_mem_pool);
435 return -ENOMEM;
436 }
437
ed957684 438 pmb->vport = vport;
dea3101e 439 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 440 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 441 "0448 Adapter failed init, mbxCmd x%x "
dea3101e 442 "READ_SPARM mbxStatus x%x\n",
dea3101e 443 mb->mbxCommand, mb->mbxStatus);
2e0fef85 444 phba->link_state = LPFC_HBA_ERROR;
dea3101e 445 mp = (struct lpfc_dmabuf *) pmb->context1;
9f1177a3 446 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 447 lpfc_mbuf_free(phba, mp->virt, mp->phys);
448 kfree(mp);
449 return -EIO;
450 }
451
452 mp = (struct lpfc_dmabuf *) pmb->context1;
453
2e0fef85 454 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm));
dea3101e 455 lpfc_mbuf_free(phba, mp->virt, mp->phys);
456 kfree(mp);
457 pmb->context1 = NULL;
0558056c 458 lpfc_update_vport_wwn(vport);
a257bf90
JS		 459
460 /* Update the fc_host data structures with new wwn. */
461 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
462 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
21e9a0a5 463 fc_host_max_npiv_vports(shost) = phba->max_vpi;
a257bf90 464
dea3101e 465 /* If no serial number in VPD data, use low 6 bytes of WWNN */
466 /* This should be consolidated into parse_vpd ? - mr */
467 if (phba->SerialNumber[0] == 0) {
468 uint8_t *outptr;
469
2e0fef85 470 outptr = &vport->fc_nodename.u.s.IEEE[0];
dea3101e 471 for (i = 0; i < 12; i++) {
472 status = *outptr++;
473 j = ((status & 0xf0) >> 4);
474 if (j <= 9)
475 phba->SerialNumber[i] =
476 (char)((uint8_t) 0x30 + (uint8_t) j);
477 else
478 phba->SerialNumber[i] =
479 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
480 i++;
481 j = (status & 0xf);
482 if (j <= 9)
483 phba->SerialNumber[i] =
484 (char)((uint8_t) 0x30 + (uint8_t) j);
485 else
486 phba->SerialNumber[i] =
487 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
488 }
489 }
490
dea3101e 491 lpfc_read_config(phba, pmb);
ed957684 492 pmb->vport = vport;
dea3101e 493 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 494 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 495 "0453 Adapter failed to init, mbxCmd x%x "
dea3101e 496 "READ_CONFIG, mbxStatus x%x\n",
dea3101e 497 mb->mbxCommand, mb->mbxStatus);
2e0fef85 498 phba->link_state = LPFC_HBA_ERROR;
dea3101e 499 mempool_free( pmb, phba->mbox_mem_pool);
500 return -EIO;
501 }
502
a0c87cbd
JS		 503 /* Check if the port is disabled */
504 lpfc_sli_read_link_ste(phba);
505
dea3101e 506 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS		 507 i = (mb->un.varRdConfig.max_xri + 1);
508 if (phba->cfg_hba_queue_depth > i) {
509 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
510 "3359 HBA queue depth changed from %d to %d\n",
511 phba->cfg_hba_queue_depth, i);
512 phba->cfg_hba_queue_depth = i;
513 }
514
515 /* Reset the DFT_LUN_Q_DEPTH to (max xri >> 3) */
516 i = (mb->un.varRdConfig.max_xri >> 3);
517 if (phba->pport->cfg_lun_queue_depth > i) {
518 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
519 "3360 LUN queue depth changed from %d to %d\n",
520 phba->pport->cfg_lun_queue_depth, i);
521 phba->pport->cfg_lun_queue_depth = i;
522 }
dea3101e 523
524 phba->lmt = mb->un.varRdConfig.lmt;
74b72a59
JW		 525
526 /* Get the default values for Model Name and Description */
527 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
528
2e0fef85 529 phba->link_state = LPFC_LINK_DOWN;
dea3101e 530
0b727fea 531 /* Only process IOCBs on ELS ring till hba_state is READY */
895427bd
JS		 532 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr)
533 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT;
534 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr)
535 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT;
dea3101e 536
537 /* Post receive buffers for desired rings */
ed957684
JS		 538 if (phba->sli_rev != 3)
539 lpfc_post_rcv_buf(phba);
dea3101e 540
9399627f
JS		 541 /*
542 * Configure HBA MSI-X attention conditions to messages if MSI-X mode
543 */
544 if (phba->intr_type == MSIX) {
545 rc = lpfc_config_msi(phba, pmb);
546 if (rc) {
547 mempool_free(pmb, phba->mbox_mem_pool);
548 return -EIO;
549 }
550 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
551 if (rc != MBX_SUCCESS) {
552 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
553 "0352 Config MSI mailbox command "
554 "failed, mbxCmd x%x, mbxStatus x%x\n",
04c68496
JS		 555 pmb->u.mb.mbxCommand,
556 pmb->u.mb.mbxStatus);
9399627f
JS		 557 mempool_free(pmb, phba->mbox_mem_pool);
558 return -EIO;
559 }
560 }
561
04c68496 562 spin_lock_irq(&phba->hbalock);
9399627f
JS		 563 /* Initialize ERATT handling flag */
564 phba->hba_flag &= ~HBA_ERATT_HANDLED;
565
dea3101e 566 /* Enable appropriate host interrupts */
9940b97b
JS		 567 if (lpfc_readl(phba->HCregaddr, &status)) {
568 spin_unlock_irq(&phba->hbalock);
569 return -EIO;
570 }
dea3101e 571 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
572 if (psli->num_rings > 0)
573 status |= HC_R0INT_ENA;
574 if (psli->num_rings > 1)
575 status |= HC_R1INT_ENA;
576 if (psli->num_rings > 2)
577 status |= HC_R2INT_ENA;
578 if (psli->num_rings > 3)
579 status |= HC_R3INT_ENA;
580
875fbdfe
JSEC		 581 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
582 (phba->cfg_poll & DISABLE_FCP_RING_INT))
9399627f 583 status &= ~(HC_R0INT_ENA);
875fbdfe 584
dea3101e 585 writel(status, phba->HCregaddr);
586 readl(phba->HCregaddr); /* flush */
2e0fef85 587 spin_unlock_irq(&phba->hbalock);
dea3101e 588
9399627f
JS		 589 /* Set up ring-0 (ELS) timer */
590 timeout = phba->fc_ratov * 2;
256ec0d0
JS		 591 mod_timer(&vport->els_tmofunc,
592 jiffies + msecs_to_jiffies(1000 * timeout));
9399627f 593 /* Set up heart beat (HB) timer */
256ec0d0
JS		 594 mod_timer(&phba->hb_tmofunc,
595 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS		 596 phba->hb_outstanding = 0;
597 phba->last_completion_time = jiffies;
9399627f 598 /* Set up error attention (ERATT) polling timer */
256ec0d0 599 mod_timer(&phba->eratt_poll,
65791f1f 600 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
dea3101e 601
a0c87cbd
JS		 602 if (phba->hba_flag & LINK_DISABLED) {
603 lpfc_printf_log(phba,
604 KERN_ERR, LOG_INIT,
605 "2598 Adapter Link is disabled.\n");
606 lpfc_down_link(phba, pmb);
607 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
608 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
609 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
610 lpfc_printf_log(phba,
611 KERN_ERR, LOG_INIT,
612 "2599 Adapter failed to issue DOWN_LINK"
613 " mbox command rc 0x%x\n", rc);
614
615 mempool_free(pmb, phba->mbox_mem_pool);
616 return -EIO;
617 }
e40a02c1 618 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
026abb87
JS		 619 mempool_free(pmb, phba->mbox_mem_pool);
620 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
621 if (rc)
622 return rc;
dea3101e 623 }
624 /* MBOX buffer will be freed in mbox compl */
57127f15 625 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS		 626 if (!pmb) {
627 phba->link_state = LPFC_HBA_ERROR;
628 return -ENOMEM;
629 }
630
57127f15
JS		 631 lpfc_config_async(phba, pmb, LPFC_ELS_RING);
632 pmb->mbox_cmpl = lpfc_config_async_cmpl;
633 pmb->vport = phba->pport;
634 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
dea3101e 635
57127f15
JS		 636 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
637 lpfc_printf_log(phba,
638 KERN_ERR,
639 LOG_INIT,
640 "0456 Adapter failed to issue "
e4e74273 641 "ASYNCEVT_ENABLE mbox status x%x\n",
57127f15
JS		 642 rc);
643 mempool_free(pmb, phba->mbox_mem_pool);
644 }
97207482
JS		 645
646 /* Get Option rom version */
647 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS		 648 if (!pmb) {
649 phba->link_state = LPFC_HBA_ERROR;
650 return -ENOMEM;
651 }
652
97207482
JS		 653 lpfc_dump_wakeup_param(phba, pmb);
654 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl;
655 pmb->vport = phba->pport;
656 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
657
658 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
659 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "0435 Adapter failed "
e4e74273 660 "to get Option ROM version status x%x\n", rc);
97207482
JS		 661 mempool_free(pmb, phba->mbox_mem_pool);
662 }
663
d7c255b2 664 return 0;
ce8b3ce5
JS		 665}
666
84d1b006
JS		 667/**
668 * lpfc_hba_init_link - Initialize the FC link
669 * @phba: pointer to lpfc hba data structure.
6e7288d9 670 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS		 671 *
672 * This routine will issue the INIT_LINK mailbox command call.
673 * It is available to other drivers through the lpfc_hba data
674 * structure for use as a delayed link up mechanism with the
675 * module parameter lpfc_suppress_link_up.
676 *
677 * Return code
678 * 0 - success
679 * Any other value - error
680 **/
e399b228 681static int
6e7288d9 682lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag)
1b51197d
JS		 683{
684 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag);
685}
686
687/**
688 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology
689 * @phba: pointer to lpfc hba data structure.
690 * @fc_topology: desired fc topology.
691 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
692 *
693 * This routine will issue the INIT_LINK mailbox command call.
694 * It is available to other drivers through the lpfc_hba data
695 * structure for use as a delayed link up mechanism with the
696 * module parameter lpfc_suppress_link_up.
697 *
698 * Return code
699 * 0 - success
700 * Any other value - error
701 **/
702int
703lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology,
704 uint32_t flag)
84d1b006
JS		 705{
706 struct lpfc_vport *vport = phba->pport;
707 LPFC_MBOXQ_t *pmb;
708 MAILBOX_t *mb;
709 int rc;
710
711 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
712 if (!pmb) {
713 phba->link_state = LPFC_HBA_ERROR;
714 return -ENOMEM;
715 }
716 mb = &pmb->u.mb;
717 pmb->vport = vport;
718
026abb87
JS		 719 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) ||
720 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) &&
721 !(phba->lmt & LMT_1Gb)) ||
722 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) &&
723 !(phba->lmt & LMT_2Gb)) ||
724 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) &&
725 !(phba->lmt & LMT_4Gb)) ||
726 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) &&
727 !(phba->lmt & LMT_8Gb)) ||
728 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) &&
729 !(phba->lmt & LMT_10Gb)) ||
730 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) &&
d38dd52c
JS		 731 !(phba->lmt & LMT_16Gb)) ||
732 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) &&
733 !(phba->lmt & LMT_32Gb))) {
026abb87
JS		 734 /* Reset link speed to auto */
735 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
736 "1302 Invalid speed for this board:%d "
737 "Reset link speed to auto.\n",
738 phba->cfg_link_speed);
739 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO;
740 }
1b51197d 741 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed);
84d1b006 742 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
1b51197d
JS		 743 if (phba->sli_rev < LPFC_SLI_REV4)
744 lpfc_set_loopback_flag(phba);
6e7288d9 745 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
76a95d75 746 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
84d1b006
JS		 747 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
748 "0498 Adapter failed to init, mbxCmd x%x "
749 "INIT_LINK, mbxStatus x%x\n",
750 mb->mbxCommand, mb->mbxStatus);
76a95d75
JS		 751 if (phba->sli_rev <= LPFC_SLI_REV3) {
752 /* Clear all interrupt enable conditions */
753 writel(0, phba->HCregaddr);
754 readl(phba->HCregaddr); /* flush */
755 /* Clear all pending interrupts */
756 writel(0xffffffff, phba->HAregaddr);
757 readl(phba->HAregaddr); /* flush */
758 }
84d1b006 759 phba->link_state = LPFC_HBA_ERROR;
6e7288d9 760 if (rc != MBX_BUSY || flag == MBX_POLL)
84d1b006
JS		 761 mempool_free(pmb, phba->mbox_mem_pool);
762 return -EIO;
763 }
e40a02c1 764 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK;
6e7288d9
JS		 765 if (flag == MBX_POLL)
766 mempool_free(pmb, phba->mbox_mem_pool);
84d1b006
JS		 767
768 return 0;
769}
770
771/**
772 * lpfc_hba_down_link - this routine downs the FC link
6e7288d9
JS		 773 * @phba: pointer to lpfc hba data structure.
774 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS		 775 *
776 * This routine will issue the DOWN_LINK mailbox command call.
777 * It is available to other drivers through the lpfc_hba data
778 * structure for use to stop the link.
779 *
780 * Return code
781 * 0 - success
782 * Any other value - error
783 **/
e399b228 784static int
6e7288d9 785lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag)
84d1b006
JS		 786{
787 LPFC_MBOXQ_t *pmb;
788 int rc;
789
790 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
791 if (!pmb) {
792 phba->link_state = LPFC_HBA_ERROR;
793 return -ENOMEM;
794 }
795
796 lpfc_printf_log(phba,
797 KERN_ERR, LOG_INIT,
798 "0491 Adapter Link is disabled.\n");
799 lpfc_down_link(phba, pmb);
800 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
6e7288d9 801 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
84d1b006
JS		 802 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
803 lpfc_printf_log(phba,
804 KERN_ERR, LOG_INIT,
805 "2522 Adapter failed to issue DOWN_LINK"
806 " mbox command rc 0x%x\n", rc);
807
808 mempool_free(pmb, phba->mbox_mem_pool);
809 return -EIO;
810 }
6e7288d9
JS		 811 if (flag == MBX_POLL)
812 mempool_free(pmb, phba->mbox_mem_pool);
813
84d1b006
JS		 814 return 0;
815}
816
e59058c4 817/**
3621a710 818 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset
e59058c4
JS		 819 * @phba: pointer to lpfc HBA data structure.
820 *
821 * This routine will do LPFC uninitialization before the HBA is reset when
822 * bringing down the SLI Layer.
823 *
824 * Return codes
825 * 0 - success.
826 * Any other value - error.
827 **/
dea3101e 828int
2e0fef85 829lpfc_hba_down_prep(struct lpfc_hba *phba)
dea3101e 830{
1b32f6aa
JS		 831 struct lpfc_vport **vports;
832 int i;
3772a991
JS		 833
834 if (phba->sli_rev <= LPFC_SLI_REV3) {
835 /* Disable interrupts */
836 writel(0, phba->HCregaddr);
837 readl(phba->HCregaddr); /* flush */
838 }
dea3101e 839
1b32f6aa
JS		 840 if (phba->pport->load_flag & FC_UNLOADING)
841 lpfc_cleanup_discovery_resources(phba->pport);
842 else {
843 vports = lpfc_create_vport_work_array(phba);
844 if (vports != NULL)
3772a991
JS		 845 for (i = 0; i <= phba->max_vports &&
846 vports[i] != NULL; i++)
1b32f6aa
JS		 847 lpfc_cleanup_discovery_resources(vports[i]);
848 lpfc_destroy_vport_work_array(phba, vports);
7f5f3d0d
JS		 849 }
850 return 0;
dea3101e 851}
852
68e814f5
JS		 853/**
854 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free
855 * rspiocb which got deferred
856 *
857 * @phba: pointer to lpfc HBA data structure.
858 *
859 * This routine will cleanup completed slow path events after HBA is reset
860 * when bringing down the SLI Layer.
861 *
862 *
863 * Return codes
864 * void.
865 **/
866static void
867lpfc_sli4_free_sp_events(struct lpfc_hba *phba)
868{
869 struct lpfc_iocbq *rspiocbq;
870 struct hbq_dmabuf *dmabuf;
871 struct lpfc_cq_event *cq_event;
872
873 spin_lock_irq(&phba->hbalock);
874 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
875 spin_unlock_irq(&phba->hbalock);
876
877 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
878 /* Get the response iocb from the head of work queue */
879 spin_lock_irq(&phba->hbalock);
880 list_remove_head(&phba->sli4_hba.sp_queue_event,
881 cq_event, struct lpfc_cq_event, list);
882 spin_unlock_irq(&phba->hbalock);
883
884 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
885 case CQE_CODE_COMPL_WQE:
886 rspiocbq = container_of(cq_event, struct lpfc_iocbq,
887 cq_event);
888 lpfc_sli_release_iocbq(phba, rspiocbq);
889 break;
890 case CQE_CODE_RECEIVE:
891 case CQE_CODE_RECEIVE_V1:
892 dmabuf = container_of(cq_event, struct hbq_dmabuf,
893 cq_event);
894 lpfc_in_buf_free(phba, &dmabuf->dbuf);
895 }
896 }
897}
898
e59058c4 899/**
bcece5f5 900 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset
e59058c4
JS		 901 * @phba: pointer to lpfc HBA data structure.
902 *
bcece5f5
JS		 903 * This routine will cleanup posted ELS buffers after the HBA is reset
904 * when bringing down the SLI Layer.
905 *
e59058c4
JS		 906 *
907 * Return codes
bcece5f5 908 * void.
e59058c4 909 **/
bcece5f5
JS		 910static void
911lpfc_hba_free_post_buf(struct lpfc_hba *phba)
41415862
JW		 912{
913 struct lpfc_sli *psli = &phba->sli;
914 struct lpfc_sli_ring *pring;
915 struct lpfc_dmabuf *mp, *next_mp;
07eab624
JS		 916 LIST_HEAD(buflist);
917 int count;
41415862 918
92d7f7b0
JS		 919 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)
920 lpfc_sli_hbqbuf_free_all(phba);
921 else {
922 /* Cleanup preposted buffers on the ELS ring */
895427bd 923 pring = &psli->sli3_ring[LPFC_ELS_RING];
07eab624
JS		 924 spin_lock_irq(&phba->hbalock);
925 list_splice_init(&pring->postbufq, &buflist);
926 spin_unlock_irq(&phba->hbalock);
927
928 count = 0;
929 list_for_each_entry_safe(mp, next_mp, &buflist, list) {
92d7f7b0 930 list_del(&mp->list);
07eab624 931 count++;
92d7f7b0
JS		 932 lpfc_mbuf_free(phba, mp->virt, mp->phys);
933 kfree(mp);
934 }
07eab624
JS		 935
936 spin_lock_irq(&phba->hbalock);
937 pring->postbufq_cnt -= count;
bcece5f5 938 spin_unlock_irq(&phba->hbalock);
41415862 939 }
bcece5f5
JS		 940}
941
942/**
943 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset
944 * @phba: pointer to lpfc HBA data structure.
945 *
946 * This routine will cleanup the txcmplq after the HBA is reset when bringing
947 * down the SLI Layer.
948 *
949 * Return codes
950 * void
951 **/
952static void
953lpfc_hba_clean_txcmplq(struct lpfc_hba *phba)
954{
955 struct lpfc_sli *psli = &phba->sli;
895427bd 956 struct lpfc_queue *qp = NULL;
bcece5f5
JS		 957 struct lpfc_sli_ring *pring;
958 LIST_HEAD(completions);
959 int i;
960
895427bd
JS		 961 if (phba->sli_rev != LPFC_SLI_REV4) {
962 for (i = 0; i < psli->num_rings; i++) {
963 pring = &psli->sli3_ring[i];
bcece5f5 964 spin_lock_irq(&phba->hbalock);
895427bd
JS		 965 /* At this point in time the HBA is either reset or DOA
966 * Nothing should be on txcmplq as it will
967 * NEVER complete.
968 */
969 list_splice_init(&pring->txcmplq, &completions);
970 pring->txcmplq_cnt = 0;
bcece5f5 971 spin_unlock_irq(&phba->hbalock);
09372820 972
895427bd
JS		 973 lpfc_sli_abort_iocb_ring(phba, pring);
974 }
a257bf90 975 /* Cancel all the IOCBs from the completions list */
895427bd
JS		 976 lpfc_sli_cancel_iocbs(phba, &completions,
977 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
978 return;
979 }
980 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
981 pring = qp->pring;
982 if (!pring)
983 continue;
984 spin_lock_irq(&pring->ring_lock);
985 list_splice_init(&pring->txcmplq, &completions);
986 pring->txcmplq_cnt = 0;
987 spin_unlock_irq(&pring->ring_lock);
41415862
JW		 988 lpfc_sli_abort_iocb_ring(phba, pring);
989 }
895427bd
JS		 990 /* Cancel all the IOCBs from the completions list */
991 lpfc_sli_cancel_iocbs(phba, &completions,
992 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
bcece5f5 993}
41415862 994
bcece5f5
JS		 995/**
996 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset
997 int i;
998 * @phba: pointer to lpfc HBA data structure.
999 *
1000 * This routine will do uninitialization after the HBA is reset when bring
1001 * down the SLI Layer.
1002 *
1003 * Return codes
1004 * 0 - success.
1005 * Any other value - error.
1006 **/
1007static int
1008lpfc_hba_down_post_s3(struct lpfc_hba *phba)
1009{
1010 lpfc_hba_free_post_buf(phba);
1011 lpfc_hba_clean_txcmplq(phba);
41415862
JW		 1012 return 0;
1013}
5af5eee7 1014
da0436e9
JS		 1015/**
1016 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset
1017 * @phba: pointer to lpfc HBA data structure.
1018 *
1019 * This routine will do uninitialization after the HBA is reset when bring
1020 * down the SLI Layer.
1021 *
1022 * Return codes
af901ca1 1023 * 0 - success.
da0436e9
JS		 1024 * Any other value - error.
1025 **/
1026static int
1027lpfc_hba_down_post_s4(struct lpfc_hba *phba)
1028{
1029 struct lpfc_scsi_buf *psb, *psb_next;
86c67379 1030 struct lpfc_nvmet_rcv_ctx *ctxp, *ctxp_next;
da0436e9 1031 LIST_HEAD(aborts);
895427bd 1032 LIST_HEAD(nvme_aborts);
86c67379 1033 LIST_HEAD(nvmet_aborts);
da0436e9 1034 unsigned long iflag = 0;
0f65ff68
JS		 1035 struct lpfc_sglq *sglq_entry = NULL;
1036
895427bd
JS		 1037
1038 lpfc_sli_hbqbuf_free_all(phba);
bcece5f5
JS		 1039 lpfc_hba_clean_txcmplq(phba);
1040
da0436e9
JS		 1041 /* At this point in time the HBA is either reset or DOA. Either
1042 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be
895427bd 1043 * on the lpfc_els_sgl_list so that it can either be freed if the
da0436e9
JS		 1044 * driver is unloading or reposted if the driver is restarting
1045 * the port.
1046 */
895427bd 1047 spin_lock_irq(&phba->hbalock); /* required for lpfc_els_sgl_list and */
da0436e9 1048 /* scsl_buf_list */
895427bd 1049 /* sgl_list_lock required because worker thread uses this
da0436e9
JS		 1050 * list.
1051 */
895427bd 1052 spin_lock(&phba->sli4_hba.sgl_list_lock);
0f65ff68
JS		 1053 list_for_each_entry(sglq_entry,
1054 &phba->sli4_hba.lpfc_abts_els_sgl_list, list)
1055 sglq_entry->state = SGL_FREED;
1056
da0436e9 1057 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
895427bd
JS		 1058 &phba->sli4_hba.lpfc_els_sgl_list);
1059
f358dd0c 1060
895427bd 1061 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9
JS		 1062 /* abts_scsi_buf_list_lock required because worker thread uses this
1063 * list.
1064 */
895427bd
JS		 1065 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
1066 spin_lock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1067 list_splice_init(&phba->sli4_hba.lpfc_abts_scsi_buf_list,
1068 &aborts);
1069 spin_unlock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1070 }
1071
1072 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1073 spin_lock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1074 list_splice_init(&phba->sli4_hba.lpfc_abts_nvme_buf_list,
1075 &nvme_aborts);
86c67379
JS		 1076 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list,
1077 &nvmet_aborts);
895427bd
JS		 1078 spin_unlock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1079 }
1080
da0436e9
JS		 1081 spin_unlock_irq(&phba->hbalock);
1082
1083 list_for_each_entry_safe(psb, psb_next, &aborts, list) {
1084 psb->pCmd = NULL;
1085 psb->status = IOSTAT_SUCCESS;
1086 }
a40fc5f0
JS		 1087 spin_lock_irqsave(&phba->scsi_buf_list_put_lock, iflag);
1088 list_splice(&aborts, &phba->lpfc_scsi_buf_list_put);
1089 spin_unlock_irqrestore(&phba->scsi_buf_list_put_lock, iflag);
68e814f5 1090
86c67379
JS		 1091 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1092 list_for_each_entry_safe(psb, psb_next, &nvme_aborts, list) {
1093 psb->pCmd = NULL;
1094 psb->status = IOSTAT_SUCCESS;
1095 }
1096 spin_lock_irqsave(&phba->nvme_buf_list_put_lock, iflag);
1097 list_splice(&nvme_aborts, &phba->lpfc_nvme_buf_list_put);
1098 spin_unlock_irqrestore(&phba->nvme_buf_list_put_lock, iflag);
1099
1100 list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) {
1101 ctxp->flag &= ~(LPFC_NVMET_XBUSY | LPFC_NVMET_ABORT_OP);
6c621a22 1102 lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf);
86c67379 1103 }
895427bd 1104 }
895427bd 1105
68e814f5 1106 lpfc_sli4_free_sp_events(phba);
da0436e9
JS		 1107 return 0;
1108}
1109
1110/**
1111 * lpfc_hba_down_post - Wrapper func for hba down post routine
1112 * @phba: pointer to lpfc HBA data structure.
1113 *
1114 * This routine wraps the actual SLI3 or SLI4 routine for performing
1115 * uninitialization after the HBA is reset when bring down the SLI Layer.
1116 *
1117 * Return codes
af901ca1 1118 * 0 - success.
da0436e9
JS		 1119 * Any other value - error.
1120 **/
1121int
1122lpfc_hba_down_post(struct lpfc_hba *phba)
1123{
1124 return (*phba->lpfc_hba_down_post)(phba);
1125}
41415862 1126
e59058c4 1127/**
3621a710 1128 * lpfc_hb_timeout - The HBA-timer timeout handler
e59058c4
JS		 1129 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1130 *
1131 * This is the HBA-timer timeout handler registered to the lpfc driver. When
1132 * this timer fires, a HBA timeout event shall be posted to the lpfc driver
1133 * work-port-events bitmap and the worker thread is notified. This timeout
1134 * event will be used by the worker thread to invoke the actual timeout
1135 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will
1136 * be performed in the timeout handler and the HBA timeout event bit shall
1137 * be cleared by the worker thread after it has taken the event bitmap out.
1138 **/
a6ababd2 1139static void
858c9f6c
JS		 1140lpfc_hb_timeout(unsigned long ptr)
1141{
1142 struct lpfc_hba *phba;
5e9d9b82 1143 uint32_t tmo_posted;
858c9f6c
JS		 1144 unsigned long iflag;
1145
1146 phba = (struct lpfc_hba *)ptr;
9399627f
JS		 1147
1148 /* Check for heart beat timeout conditions */
858c9f6c 1149 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
5e9d9b82
JS		 1150 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO;
1151 if (!tmo_posted)
858c9f6c
JS		 1152 phba->pport->work_port_events |= WORKER_HB_TMO;
1153 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1154
9399627f 1155 /* Tell the worker thread there is work to do */
5e9d9b82
JS		 1156 if (!tmo_posted)
1157 lpfc_worker_wake_up(phba);
858c9f6c
JS		 1158 return;
1159}
1160
19ca7609
JS		 1161/**
1162 * lpfc_rrq_timeout - The RRQ-timer timeout handler
1163 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1164 *
1165 * This is the RRQ-timer timeout handler registered to the lpfc driver. When
1166 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver
1167 * work-port-events bitmap and the worker thread is notified. This timeout
1168 * event will be used by the worker thread to invoke the actual timeout
1169 * handler routine, lpfc_rrq_handler. Any periodical operations will
1170 * be performed in the timeout handler and the RRQ timeout event bit shall
1171 * be cleared by the worker thread after it has taken the event bitmap out.
1172 **/
1173static void
1174lpfc_rrq_timeout(unsigned long ptr)
1175{
1176 struct lpfc_hba *phba;
19ca7609
JS		 1177 unsigned long iflag;
1178
1179 phba = (struct lpfc_hba *)ptr;
1180 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
06918ac5
JS		 1181 if (!(phba->pport->load_flag & FC_UNLOADING))
1182 phba->hba_flag |= HBA_RRQ_ACTIVE;
1183 else
1184 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
19ca7609 1185 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
06918ac5
JS		 1186
1187 if (!(phba->pport->load_flag & FC_UNLOADING))
1188 lpfc_worker_wake_up(phba);
19ca7609
JS		 1189}
1190
e59058c4 1191/**
3621a710 1192 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function
e59058c4
JS		 1193 * @phba: pointer to lpfc hba data structure.
1194 * @pmboxq: pointer to the driver internal queue element for mailbox command.
1195 *
1196 * This is the callback function to the lpfc heart-beat mailbox command.
1197 * If configured, the lpfc driver issues the heart-beat mailbox command to
1198 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the
1199 * heart-beat mailbox command is issued, the driver shall set up heart-beat
1200 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks
1201 * heart-beat outstanding state. Once the mailbox command comes back and
1202 * no error conditions detected, the heart-beat mailbox command timer is
1203 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding
1204 * state is cleared for the next heart-beat. If the timer expired with the
1205 * heart-beat outstanding state set, the driver will put the HBA offline.
1206 **/
858c9f6c
JS		 1207static void
1208lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
1209{
1210 unsigned long drvr_flag;
1211
1212 spin_lock_irqsave(&phba->hbalock, drvr_flag);
1213 phba->hb_outstanding = 0;
1214 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
1215
9399627f 1216 /* Check and reset heart-beat timer is necessary */
858c9f6c
JS		 1217 mempool_free(pmboxq, phba->mbox_mem_pool);
1218 if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) &&
1219 !(phba->link_state == LPFC_HBA_ERROR) &&
51ef4c26 1220 !(phba->pport->load_flag & FC_UNLOADING))
858c9f6c 1221 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1222 jiffies +
1223 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS		 1224 return;
1225}
1226
e59058c4 1227/**
3621a710 1228 * lpfc_hb_timeout_handler - The HBA-timer timeout handler
e59058c4
JS		 1229 * @phba: pointer to lpfc hba data structure.
1230 *
1231 * This is the actual HBA-timer timeout handler to be invoked by the worker
1232 * thread whenever the HBA timer fired and HBA-timeout event posted. This
1233 * handler performs any periodic operations needed for the device. If such
1234 * periodic event has already been attended to either in the interrupt handler
1235 * or by processing slow-ring or fast-ring events within the HBA-timer
1236 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets
1237 * the timer for the next timeout period. If lpfc heart-beat mailbox command
1238 * is configured and there is no heart-beat mailbox command outstanding, a
1239 * heart-beat mailbox is issued and timer set properly. Otherwise, if there
1240 * has been a heart-beat mailbox command outstanding, the HBA shall be put
1241 * to offline.
1242 **/
858c9f6c
JS		 1243void
1244lpfc_hb_timeout_handler(struct lpfc_hba *phba)
1245{
45ed1190 1246 struct lpfc_vport **vports;
858c9f6c 1247 LPFC_MBOXQ_t *pmboxq;
0ff10d46 1248 struct lpfc_dmabuf *buf_ptr;
45ed1190 1249 int retval, i;
858c9f6c 1250 struct lpfc_sli *psli = &phba->sli;
0ff10d46 1251 LIST_HEAD(completions);
0cf07f84
JS		 1252 struct lpfc_queue *qp;
1253 unsigned long time_elapsed;
1254 uint32_t tick_cqe, max_cqe, val;
1255 uint64_t tot, data1, data2, data3;
1256 struct lpfc_register reg_data;
1257 void __iomem *eqdreg = phba->sli4_hba.u.if_type2.EQDregaddr;
858c9f6c 1258
45ed1190
JS		 1259 vports = lpfc_create_vport_work_array(phba);
1260 if (vports != NULL)
4258e98e 1261 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
45ed1190 1262 lpfc_rcv_seq_check_edtov(vports[i]);
4258e98e
JS		 1263 lpfc_fdmi_num_disc_check(vports[i]);
1264 }
45ed1190
JS		 1265 lpfc_destroy_vport_work_array(phba, vports);
1266
858c9f6c 1267 if ((phba->link_state == LPFC_HBA_ERROR) ||
51ef4c26 1268 (phba->pport->load_flag & FC_UNLOADING) ||
858c9f6c
JS		 1269 (phba->pport->fc_flag & FC_OFFLINE_MODE))
1270 return;
1271
0cf07f84
JS		 1272 if (phba->cfg_auto_imax) {
1273 if (!phba->last_eqdelay_time) {
1274 phba->last_eqdelay_time = jiffies;
1275 goto skip_eqdelay;
1276 }
1277 time_elapsed = jiffies - phba->last_eqdelay_time;
1278 phba->last_eqdelay_time = jiffies;
1279
1280 tot = 0xffff;
1281 /* Check outstanding IO count */
1282 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1283 if (phba->nvmet_support) {
1284 spin_lock(&phba->sli4_hba.nvmet_io_lock);
1285 tot = phba->sli4_hba.nvmet_xri_cnt -
1286 phba->sli4_hba.nvmet_ctx_cnt;
1287 spin_unlock(&phba->sli4_hba.nvmet_io_lock);
1288 } else {
1289 tot = atomic_read(&phba->fc4NvmeIoCmpls);
1290 data1 = atomic_read(
1291 &phba->fc4NvmeInputRequests);
1292 data2 = atomic_read(
1293 &phba->fc4NvmeOutputRequests);
1294 data3 = atomic_read(
1295 &phba->fc4NvmeControlRequests);
1296 tot = (data1 + data2 + data3) - tot;
1297 }
1298 }
1299
1300 /* Interrupts per sec per EQ */
1301 val = phba->cfg_fcp_imax / phba->io_channel_irqs;
1302 tick_cqe = val / CONFIG_HZ; /* Per tick per EQ */
1303
1304 /* Assume 1 CQE/ISR, calc max CQEs allowed for time duration */
1305 max_cqe = time_elapsed * tick_cqe;
1306
1307 for (i = 0; i < phba->io_channel_irqs; i++) {
1308 /* Fast-path EQ */
1309 qp = phba->sli4_hba.hba_eq[i];
1310 if (!qp)
1311 continue;
1312
1313 /* Use no EQ delay if we don't have many outstanding
1314 * IOs, or if we are only processing 1 CQE/ISR or less.
1315 * Otherwise, assume we can process up to lpfc_fcp_imax
1316 * interrupts per HBA.
1317 */
1318 if (tot < LPFC_NODELAY_MAX_IO ||
1319 qp->EQ_cqe_cnt <= max_cqe)
1320 val = 0;
1321 else
1322 val = phba->cfg_fcp_imax;
1323
1324 if (phba->sli.sli_flag & LPFC_SLI_USE_EQDR) {
1325 /* Use EQ Delay Register method */
1326
1327 /* Convert for EQ Delay register */
1328 if (val) {
1329 /* First, interrupts per sec per EQ */
1330 val = phba->cfg_fcp_imax /
1331 phba->io_channel_irqs;
1332
1333 /* us delay between each interrupt */
1334 val = LPFC_SEC_TO_USEC / val;
1335 }
1336 if (val != qp->q_mode) {
1337 reg_data.word0 = 0;
1338 bf_set(lpfc_sliport_eqdelay_id,
1339 &reg_data, qp->queue_id);
1340 bf_set(lpfc_sliport_eqdelay_delay,
1341 &reg_data, val);
1342 writel(reg_data.word0, eqdreg);
1343 }
1344 } else {
1345 /* Use mbox command method */
1346 if (val != qp->q_mode)
1347 lpfc_modify_hba_eq_delay(phba, i,
1348 1, val);
1349 }
1350
1351 /*
1352 * val is cfg_fcp_imax or 0 for mbox delay or us delay
1353 * between interrupts for EQDR.
1354 */
1355 qp->q_mode = val;
1356 qp->EQ_cqe_cnt = 0;
1357 }
1358 }
1359
1360skip_eqdelay:
858c9f6c 1361 spin_lock_irq(&phba->pport->work_port_lock);
858c9f6c 1362
256ec0d0
JS		 1363 if (time_after(phba->last_completion_time +
1364 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL),
1365 jiffies)) {
858c9f6c
JS		 1366 spin_unlock_irq(&phba->pport->work_port_lock);
1367 if (!phba->hb_outstanding)
1368 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1369 jiffies +
1370 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS		 1371 else
1372 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1373 jiffies +
1374 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c
JS		 1375 return;
1376 }
1377 spin_unlock_irq(&phba->pport->work_port_lock);
1378
0ff10d46
JS		 1379 if (phba->elsbuf_cnt &&
1380 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) {
1381 spin_lock_irq(&phba->hbalock);
1382 list_splice_init(&phba->elsbuf, &completions);
1383 phba->elsbuf_cnt = 0;
1384 phba->elsbuf_prev_cnt = 0;
1385 spin_unlock_irq(&phba->hbalock);
1386
1387 while (!list_empty(&completions)) {
1388 list_remove_head(&completions, buf_ptr,
1389 struct lpfc_dmabuf, list);
1390 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
1391 kfree(buf_ptr);
1392 }
1393 }
1394 phba->elsbuf_prev_cnt = phba->elsbuf_cnt;
1395
858c9f6c 1396 /* If there is no heart beat outstanding, issue a heartbeat command */
13815c83
JS		 1397 if (phba->cfg_enable_hba_heartbeat) {
1398 if (!phba->hb_outstanding) {
bc73905a
JS		 1399 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) &&
1400 (list_empty(&psli->mboxq))) {
1401 pmboxq = mempool_alloc(phba->mbox_mem_pool,
1402 GFP_KERNEL);
1403 if (!pmboxq) {
1404 mod_timer(&phba->hb_tmofunc,
1405 jiffies +
256ec0d0
JS		 1406 msecs_to_jiffies(1000 *
1407 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS		 1408 return;
1409 }
1410
1411 lpfc_heart_beat(phba, pmboxq);
1412 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl;
1413 pmboxq->vport = phba->pport;
1414 retval = lpfc_sli_issue_mbox(phba, pmboxq,
1415 MBX_NOWAIT);
1416
1417 if (retval != MBX_BUSY &&
1418 retval != MBX_SUCCESS) {
1419 mempool_free(pmboxq,
1420 phba->mbox_mem_pool);
1421 mod_timer(&phba->hb_tmofunc,
1422 jiffies +
256ec0d0
JS		 1423 msecs_to_jiffies(1000 *
1424 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS		 1425 return;
1426 }
1427 phba->skipped_hb = 0;
1428 phba->hb_outstanding = 1;
1429 } else if (time_before_eq(phba->last_completion_time,
1430 phba->skipped_hb)) {
1431 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
1432 "2857 Last completion time not "
1433 " updated in %d ms\n",
1434 jiffies_to_msecs(jiffies
1435 - phba->last_completion_time));
1436 } else
1437 phba->skipped_hb = jiffies;
1438
858c9f6c 1439 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1440 jiffies +
1441 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1442 return;
13815c83
JS		 1443 } else {
1444 /*
1445 * If heart beat timeout called with hb_outstanding set
dcf2a4e0
JS		 1446 * we need to give the hb mailbox cmd a chance to
1447 * complete or TMO.
13815c83 1448 */
dcf2a4e0
JS		 1449 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1450 "0459 Adapter heartbeat still out"
1451 "standing:last compl time was %d ms.\n",
1452 jiffies_to_msecs(jiffies
1453 - phba->last_completion_time));
1454 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1455 jiffies +
1456 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1457 }
4258e98e
JS		 1458 } else {
1459 mod_timer(&phba->hb_tmofunc,
1460 jiffies +
1461 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS		 1462 }
1463}
1464
e59058c4 1465/**
3621a710 1466 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention
e59058c4
JS		 1467 * @phba: pointer to lpfc hba data structure.
1468 *
1469 * This routine is called to bring the HBA offline when HBA hardware error
1470 * other than Port Error 6 has been detected.
1471 **/
09372820
JS		 1472static void
1473lpfc_offline_eratt(struct lpfc_hba *phba)
1474{
1475 struct lpfc_sli *psli = &phba->sli;
1476
1477 spin_lock_irq(&phba->hbalock);
f4b4c68f 1478 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
09372820 1479 spin_unlock_irq(&phba->hbalock);
618a5230 1480 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
09372820
JS		 1481
1482 lpfc_offline(phba);
1483 lpfc_reset_barrier(phba);
f4b4c68f 1484 spin_lock_irq(&phba->hbalock);
09372820 1485 lpfc_sli_brdreset(phba);
f4b4c68f 1486 spin_unlock_irq(&phba->hbalock);
09372820
JS		 1487 lpfc_hba_down_post(phba);
1488 lpfc_sli_brdready(phba, HS_MBRDY);
1489 lpfc_unblock_mgmt_io(phba);
1490 phba->link_state = LPFC_HBA_ERROR;
1491 return;
1492}
1493
da0436e9
JS		 1494/**
1495 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention
1496 * @phba: pointer to lpfc hba data structure.
1497 *
1498 * This routine is called to bring a SLI4 HBA offline when HBA hardware error
1499 * other than Port Error 6 has been detected.
1500 **/
a88dbb6a 1501void
da0436e9
JS		 1502lpfc_sli4_offline_eratt(struct lpfc_hba *phba)
1503{
946727dc
JS		 1504 spin_lock_irq(&phba->hbalock);
1505 phba->link_state = LPFC_HBA_ERROR;
1506 spin_unlock_irq(&phba->hbalock);
1507
618a5230 1508 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
da0436e9 1509 lpfc_offline(phba);
da0436e9 1510 lpfc_hba_down_post(phba);
da0436e9 1511 lpfc_unblock_mgmt_io(phba);
da0436e9
JS		 1512}
1513
a257bf90
JS		 1514/**
1515 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler
1516 * @phba: pointer to lpfc hba data structure.
1517 *
1518 * This routine is invoked to handle the deferred HBA hardware error
1519 * conditions. This type of error is indicated by HBA by setting ER1
1520 * and another ER bit in the host status register. The driver will
1521 * wait until the ER1 bit clears before handling the error condition.
1522 **/
1523static void
1524lpfc_handle_deferred_eratt(struct lpfc_hba *phba)
1525{
1526 uint32_t old_host_status = phba->work_hs;
a257bf90
JS		 1527 struct lpfc_sli *psli = &phba->sli;
1528
f4b4c68f
JS		 1529 /* If the pci channel is offline, ignore possible errors,
1530 * since we cannot communicate with the pci card anyway.
1531 */
1532 if (pci_channel_offline(phba->pcidev)) {
1533 spin_lock_irq(&phba->hbalock);
1534 phba->hba_flag &= ~DEFER_ERATT;
1535 spin_unlock_irq(&phba->hbalock);
1536 return;
1537 }
1538
a257bf90
JS		 1539 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1540 "0479 Deferred Adapter Hardware Error "
1541 "Data: x%x x%x x%x\n",
1542 phba->work_hs,
1543 phba->work_status[0], phba->work_status[1]);
1544
1545 spin_lock_irq(&phba->hbalock);
f4b4c68f 1546 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
a257bf90
JS		 1547 spin_unlock_irq(&phba->hbalock);
1548
1549
1550 /*
1551 * Firmware stops when it triggred erratt. That could cause the I/Os
1552 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the
1553 * SCSI layer retry it after re-establishing link.
1554 */
db55fba8 1555 lpfc_sli_abort_fcp_rings(phba);
a257bf90
JS		 1556
1557 /*
1558 * There was a firmware error. Take the hba offline and then
1559 * attempt to restart it.
1560 */
618a5230 1561 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
a257bf90
JS		 1562 lpfc_offline(phba);
1563
1564 /* Wait for the ER1 bit to clear.*/
1565 while (phba->work_hs & HS_FFER1) {
1566 msleep(100);
9940b97b
JS		 1567 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) {
1568 phba->work_hs = UNPLUG_ERR ;
1569 break;
1570 }
a257bf90
JS		 1571 /* If driver is unloading let the worker thread continue */
1572 if (phba->pport->load_flag & FC_UNLOADING) {
1573 phba->work_hs = 0;
1574 break;
1575 }
1576 }
1577
1578 /*
1579 * This is to ptrotect against a race condition in which
1580 * first write to the host attention register clear the
1581 * host status register.
1582 */
1583 if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING)))
1584 phba->work_hs = old_host_status & ~HS_FFER1;
1585
3772a991 1586 spin_lock_irq(&phba->hbalock);
a257bf90 1587 phba->hba_flag &= ~DEFER_ERATT;
3772a991 1588 spin_unlock_irq(&phba->hbalock);
a257bf90
JS		 1589 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
1590 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
1591}
1592
3772a991
JS		 1593static void
1594lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba)
1595{
1596 struct lpfc_board_event_header board_event;
1597 struct Scsi_Host *shost;
1598
1599 board_event.event_type = FC_REG_BOARD_EVENT;
1600 board_event.subcategory = LPFC_EVENT_PORTINTERR;
1601 shost = lpfc_shost_from_vport(phba->pport);
1602 fc_host_post_vendor_event(shost, fc_get_event_number(),
1603 sizeof(board_event),
1604 (char *) &board_event,
1605 LPFC_NL_VENDOR_ID);
1606}
1607
e59058c4 1608/**
3772a991 1609 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler
e59058c4
JS		 1610 * @phba: pointer to lpfc hba data structure.
1611 *
1612 * This routine is invoked to handle the following HBA hardware error
1613 * conditions:
1614 * 1 - HBA error attention interrupt
1615 * 2 - DMA ring index out of range
1616 * 3 - Mailbox command came back as unknown
1617 **/
3772a991
JS		 1618static void
1619lpfc_handle_eratt_s3(struct lpfc_hba *phba)
dea3101e 1620{
2e0fef85 1621 struct lpfc_vport *vport = phba->pport;
2e0fef85 1622 struct lpfc_sli *psli = &phba->sli;
d2873e4c 1623 uint32_t event_data;
57127f15
JS		 1624 unsigned long temperature;
1625 struct temp_event temp_event_data;
92d7f7b0 1626 struct Scsi_Host *shost;
2e0fef85 1627
8d63f375 1628 /* If the pci channel is offline, ignore possible errors,
3772a991
JS		 1629 * since we cannot communicate with the pci card anyway.
1630 */
1631 if (pci_channel_offline(phba->pcidev)) {
1632 spin_lock_irq(&phba->hbalock);
1633 phba->hba_flag &= ~DEFER_ERATT;
1634 spin_unlock_irq(&phba->hbalock);
8d63f375 1635 return;
3772a991
JS		 1636 }
1637
13815c83
JS		 1638 /* If resets are disabled then leave the HBA alone and return */
1639 if (!phba->cfg_enable_hba_reset)
1640 return;
dea3101e 1641
ea2151b4 1642 /* Send an internal error event to mgmt application */
3772a991 1643 lpfc_board_errevt_to_mgmt(phba);
ea2151b4 1644
a257bf90
JS		 1645 if (phba->hba_flag & DEFER_ERATT)
1646 lpfc_handle_deferred_eratt(phba);
1647
dcf2a4e0
JS		 1648 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) {
1649 if (phba->work_hs & HS_FFER6)
1650 /* Re-establishing Link */
1651 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1652 "1301 Re-establishing Link "
1653 "Data: x%x x%x x%x\n",
1654 phba->work_hs, phba->work_status[0],
1655 phba->work_status[1]);
1656 if (phba->work_hs & HS_FFER8)
1657 /* Device Zeroization */
1658 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1659 "2861 Host Authentication device "
1660 "zeroization Data:x%x x%x x%x\n",
1661 phba->work_hs, phba->work_status[0],
1662 phba->work_status[1]);
58da1ffb 1663
92d7f7b0 1664 spin_lock_irq(&phba->hbalock);
f4b4c68f 1665 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
92d7f7b0 1666 spin_unlock_irq(&phba->hbalock);
dea3101e 1667
1668 /*
1669 * Firmware stops when it triggled erratt with HS_FFER6.
1670 * That could cause the I/Os dropped by the firmware.
1671 * Error iocb (I/O) on txcmplq and let the SCSI layer
1672 * retry it after re-establishing link.
1673 */
db55fba8 1674 lpfc_sli_abort_fcp_rings(phba);
dea3101e 1675
dea3101e 1676 /*
1677 * There was a firmware error. Take the hba offline and then
1678 * attempt to restart it.
1679 */
618a5230 1680 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
dea3101e 1681 lpfc_offline(phba);
41415862 1682 lpfc_sli_brdrestart(phba);
dea3101e 1683 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
46fa311e 1684 lpfc_unblock_mgmt_io(phba);
dea3101e 1685 return;
1686 }
46fa311e 1687 lpfc_unblock_mgmt_io(phba);
57127f15
JS		 1688 } else if (phba->work_hs & HS_CRIT_TEMP) {
1689 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET);
1690 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1691 temp_event_data.event_code = LPFC_CRIT_TEMP;
1692 temp_event_data.data = (uint32_t)temperature;
1693
1694 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d7c255b2 1695 "0406 Adapter maximum temperature exceeded "
57127f15
JS		 1696 "(%ld), taking this port offline "
1697 "Data: x%x x%x x%x\n",
1698 temperature, phba->work_hs,
1699 phba->work_status[0], phba->work_status[1]);
1700
1701 shost = lpfc_shost_from_vport(phba->pport);
1702 fc_host_post_vendor_event(shost, fc_get_event_number(),
1703 sizeof(temp_event_data),
1704 (char *) &temp_event_data,
1705 SCSI_NL_VID_TYPE_PCI
1706 | PCI_VENDOR_ID_EMULEX);
1707
7af67051 1708 spin_lock_irq(&phba->hbalock);
7af67051
JS		 1709 phba->over_temp_state = HBA_OVER_TEMP;
1710 spin_unlock_irq(&phba->hbalock);
09372820 1711 lpfc_offline_eratt(phba);
57127f15 1712
dea3101e 1713 } else {
1714 /* The if clause above forces this code path when the status
9399627f
JS		 1715 * failure is a value other than FFER6. Do not call the offline
1716 * twice. This is the adapter hardware error path.
dea3101e 1717 */
1718 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 1719 "0457 Adapter Hardware Error "
dea3101e 1720 "Data: x%x x%x x%x\n",
e8b62011 1721 phba->work_hs,
dea3101e 1722 phba->work_status[0], phba->work_status[1]);
1723
d2873e4c 1724 event_data = FC_REG_DUMP_EVENT;
92d7f7b0 1725 shost = lpfc_shost_from_vport(vport);
2e0fef85 1726 fc_host_post_vendor_event(shost, fc_get_event_number(),
d2873e4c
JS		 1727 sizeof(event_data), (char *) &event_data,
1728 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
1729
09372820 1730 lpfc_offline_eratt(phba);
dea3101e 1731 }
9399627f 1732 return;
dea3101e 1733}
1734
618a5230
JS		 1735/**
1736 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg
1737 * @phba: pointer to lpfc hba data structure.
1738 * @mbx_action: flag for mailbox shutdown action.
1739 *
1740 * This routine is invoked to perform an SLI4 port PCI function reset in
1741 * response to port status register polling attention. It waits for port
1742 * status register (ERR, RDY, RN) bits before proceeding with function reset.
1743 * During this process, interrupt vectors are freed and later requested
1744 * for handling possible port resource change.
1745 **/
1746static int
e10b2022
JS		 1747lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action,
1748 bool en_rn_msg)
618a5230
JS		 1749{
1750 int rc;
1751 uint32_t intr_mode;
1752
65791f1f
JS		 1753 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
1754 LPFC_SLI_INTF_IF_TYPE_2) {
1755 /*
1756 * On error status condition, driver need to wait for port
1757 * ready before performing reset.
1758 */
1759 rc = lpfc_sli4_pdev_status_reg_wait(phba);
0e916ee7 1760 if (rc)
65791f1f
JS		 1761 return rc;
1762 }
0e916ee7 1763
65791f1f
JS		 1764 /* need reset: attempt for port recovery */
1765 if (en_rn_msg)
1766 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1767 "2887 Reset Needed: Attempting Port "
1768 "Recovery...\n");
1769 lpfc_offline_prep(phba, mbx_action);
1770 lpfc_offline(phba);
1771 /* release interrupt for possible resource change */
1772 lpfc_sli4_disable_intr(phba);
1773 lpfc_sli_brdrestart(phba);
1774 /* request and enable interrupt */
1775 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
1776 if (intr_mode == LPFC_INTR_ERROR) {
1777 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1778 "3175 Failed to enable interrupt\n");
1779 return -EIO;
618a5230 1780 }
65791f1f
JS		 1781 phba->intr_mode = intr_mode;
1782 rc = lpfc_online(phba);
1783 if (rc == 0)
1784 lpfc_unblock_mgmt_io(phba);
1785
618a5230
JS		 1786 return rc;
1787}
1788
da0436e9
JS		 1789/**
1790 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler
1791 * @phba: pointer to lpfc hba data structure.
1792 *
1793 * This routine is invoked to handle the SLI4 HBA hardware error attention
1794 * conditions.
1795 **/
1796static void
1797lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1798{
1799 struct lpfc_vport *vport = phba->pport;
1800 uint32_t event_data;
1801 struct Scsi_Host *shost;
2fcee4bf 1802 uint32_t if_type;
2e90f4b5
JS		 1803 struct lpfc_register portstat_reg = {0};
1804 uint32_t reg_err1, reg_err2;
1805 uint32_t uerrlo_reg, uemasklo_reg;
65791f1f 1806 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2;
e10b2022 1807 bool en_rn_msg = true;
946727dc 1808 struct temp_event temp_event_data;
65791f1f
JS		 1809 struct lpfc_register portsmphr_reg;
1810 int rc, i;
da0436e9
JS		 1811
1812 /* If the pci channel is offline, ignore possible errors, since
1813 * we cannot communicate with the pci card anyway.
1814 */
1815 if (pci_channel_offline(phba->pcidev))
1816 return;
da0436e9 1817
65791f1f 1818 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
2fcee4bf
JS		 1819 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
1820 switch (if_type) {
1821 case LPFC_SLI_INTF_IF_TYPE_0:
2e90f4b5
JS		 1822 pci_rd_rc1 = lpfc_readl(
1823 phba->sli4_hba.u.if_type0.UERRLOregaddr,
1824 &uerrlo_reg);
1825 pci_rd_rc2 = lpfc_readl(
1826 phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
1827 &uemasklo_reg);
1828 /* consider PCI bus read error as pci_channel_offline */
1829 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO)
1830 return;
65791f1f
JS		 1831 if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) {
1832 lpfc_sli4_offline_eratt(phba);
1833 return;
1834 }
1835 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1836 "7623 Checking UE recoverable");
1837
1838 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
1839 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1840 &portsmphr_reg.word0))
1841 continue;
1842
1843 smphr_port_status = bf_get(lpfc_port_smphr_port_status,
1844 &portsmphr_reg);
1845 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1846 LPFC_PORT_SEM_UE_RECOVERABLE)
1847 break;
1848 /*Sleep for 1Sec, before checking SEMAPHORE */
1849 msleep(1000);
1850 }
1851
1852 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1853 "4827 smphr_port_status x%x : Waited %dSec",
1854 smphr_port_status, i);
1855
1856 /* Recoverable UE, reset the HBA device */
1857 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1858 LPFC_PORT_SEM_UE_RECOVERABLE) {
1859 for (i = 0; i < 20; i++) {
1860 msleep(1000);
1861 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1862 &portsmphr_reg.word0) &&
1863 (LPFC_POST_STAGE_PORT_READY ==
1864 bf_get(lpfc_port_smphr_port_status,
1865 &portsmphr_reg))) {
1866 rc = lpfc_sli4_port_sta_fn_reset(phba,
1867 LPFC_MBX_NO_WAIT, en_rn_msg);
1868 if (rc == 0)
1869 return;
1870 lpfc_printf_log(phba,
1871 KERN_ERR, LOG_INIT,
1872 "4215 Failed to recover UE");
1873 break;
1874 }
1875 }
1876 }
1877 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1878 "7624 Firmware not ready: Failing UE recovery,"
1879 " waited %dSec", i);
2fcee4bf
JS		 1880 lpfc_sli4_offline_eratt(phba);
1881 break;
946727dc 1882
2fcee4bf 1883 case LPFC_SLI_INTF_IF_TYPE_2:
2e90f4b5
JS		 1884 pci_rd_rc1 = lpfc_readl(
1885 phba->sli4_hba.u.if_type2.STATUSregaddr,
1886 &portstat_reg.word0);
1887 /* consider PCI bus read error as pci_channel_offline */
6b5151fd
JS		 1888 if (pci_rd_rc1 == -EIO) {
1889 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1890 "3151 PCI bus read access failure: x%x\n",
1891 readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
2e90f4b5 1892 return;
6b5151fd 1893 }
2e90f4b5
JS		 1894 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
1895 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
2fcee4bf 1896 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
2fcee4bf
JS		 1897 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1898 "2889 Port Overtemperature event, "
946727dc
JS		 1899 "taking port offline Data: x%x x%x\n",
1900 reg_err1, reg_err2);
1901
310429ef 1902 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS		 1903 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1904 temp_event_data.event_code = LPFC_CRIT_TEMP;
1905 temp_event_data.data = 0xFFFFFFFF;
1906
1907 shost = lpfc_shost_from_vport(phba->pport);
1908 fc_host_post_vendor_event(shost, fc_get_event_number(),
1909 sizeof(temp_event_data),
1910 (char *)&temp_event_data,
1911 SCSI_NL_VID_TYPE_PCI
1912 | PCI_VENDOR_ID_EMULEX);
1913
2fcee4bf
JS		 1914 spin_lock_irq(&phba->hbalock);
1915 phba->over_temp_state = HBA_OVER_TEMP;
1916 spin_unlock_irq(&phba->hbalock);
1917 lpfc_sli4_offline_eratt(phba);
946727dc 1918 return;
2fcee4bf 1919 }
2e90f4b5 1920 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
e10b2022 1921 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) {
2e90f4b5 1922 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e10b2022
JS		 1923 "3143 Port Down: Firmware Update "
1924 "Detected\n");
1925 en_rn_msg = false;
1926 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2e90f4b5
JS		 1927 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1928 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1929 "3144 Port Down: Debug Dump\n");
1930 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1931 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON)
1932 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1933 "3145 Port Down: Provisioning\n");
618a5230 1934
946727dc
JS		 1935 /* If resets are disabled then leave the HBA alone and return */
1936 if (!phba->cfg_enable_hba_reset)
1937 return;
1938
618a5230 1939 /* Check port status register for function reset */
e10b2022
JS		 1940 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT,
1941 en_rn_msg);
618a5230
JS		 1942 if (rc == 0) {
1943 /* don't report event on forced debug dump */
1944 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1945 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1946 return;
1947 else
1948 break;
2fcee4bf 1949 }
618a5230 1950 /* fall through for not able to recover */
6b5151fd
JS		 1951 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1952 "3152 Unrecoverable error, bring the port "
1953 "offline\n");
2fcee4bf
JS		 1954 lpfc_sli4_offline_eratt(phba);
1955 break;
1956 case LPFC_SLI_INTF_IF_TYPE_1:
1957 default:
1958 break;
1959 }
2e90f4b5
JS		 1960 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1961 "3123 Report dump event to upper layer\n");
1962 /* Send an internal error event to mgmt application */
1963 lpfc_board_errevt_to_mgmt(phba);
1964
1965 event_data = FC_REG_DUMP_EVENT;
1966 shost = lpfc_shost_from_vport(vport);
1967 fc_host_post_vendor_event(shost, fc_get_event_number(),
1968 sizeof(event_data), (char *) &event_data,
1969 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
da0436e9
JS		 1970}
1971
1972/**
1973 * lpfc_handle_eratt - Wrapper func for handling hba error attention
1974 * @phba: pointer to lpfc HBA data structure.
1975 *
1976 * This routine wraps the actual SLI3 or SLI4 hba error attention handling
1977 * routine from the API jump table function pointer from the lpfc_hba struct.
1978 *
1979 * Return codes
af901ca1 1980 * 0 - success.
da0436e9
JS		 1981 * Any other value - error.
1982 **/
1983void
1984lpfc_handle_eratt(struct lpfc_hba *phba)
1985{
1986 (*phba->lpfc_handle_eratt)(phba);
1987}
1988
e59058c4 1989/**
3621a710 1990 * lpfc_handle_latt - The HBA link event handler
e59058c4
JS		 1991 * @phba: pointer to lpfc hba data structure.
1992 *
1993 * This routine is invoked from the worker thread to handle a HBA host
895427bd 1994 * attention link event. SLI3 only.
e59058c4 1995 **/
dea3101e 1996void
2e0fef85 1997lpfc_handle_latt(struct lpfc_hba *phba)
dea3101e 1998{
2e0fef85
JS		 1999 struct lpfc_vport *vport = phba->pport;
2000 struct lpfc_sli *psli = &phba->sli;
dea3101e 2001 LPFC_MBOXQ_t *pmb;
2002 volatile uint32_t control;
2003 struct lpfc_dmabuf *mp;
09372820 2004 int rc = 0;
dea3101e 2005
2006 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
09372820
JS		 2007 if (!pmb) {
2008 rc = 1;
dea3101e 2009 goto lpfc_handle_latt_err_exit;
09372820 2010 }
dea3101e 2011
2012 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
09372820
JS		 2013 if (!mp) {
2014 rc = 2;
dea3101e 2015 goto lpfc_handle_latt_free_pmb;
09372820 2016 }
dea3101e 2017
2018 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
09372820
JS		 2019 if (!mp->virt) {
2020 rc = 3;
dea3101e 2021 goto lpfc_handle_latt_free_mp;
09372820 2022 }
dea3101e 2023
6281bfe0 2024 /* Cleanup any outstanding ELS commands */
549e55cd 2025 lpfc_els_flush_all_cmd(phba);
dea3101e 2026
2027 psli->slistat.link_event++;
76a95d75
JS		 2028 lpfc_read_topology(phba, pmb, mp);
2029 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
2e0fef85 2030 pmb->vport = vport;
0d2b6b83 2031 /* Block ELS IOCBs until we have processed this mbox command */
895427bd 2032 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
0b727fea 2033 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT);
09372820
JS		 2034 if (rc == MBX_NOT_FINISHED) {
2035 rc = 4;
14691150 2036 goto lpfc_handle_latt_free_mbuf;
09372820 2037 }
dea3101e 2038
2039 /* Clear Link Attention in HA REG */
2e0fef85 2040 spin_lock_irq(&phba->hbalock);
dea3101e 2041 writel(HA_LATT, phba->HAregaddr);
2042 readl(phba->HAregaddr); /* flush */
2e0fef85 2043 spin_unlock_irq(&phba->hbalock);
dea3101e 2044
2045 return;
2046
14691150 2047lpfc_handle_latt_free_mbuf:
895427bd 2048 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
14691150 2049 lpfc_mbuf_free(phba, mp->virt, mp->phys);
dea3101e 2050lpfc_handle_latt_free_mp:
2051 kfree(mp);
2052lpfc_handle_latt_free_pmb:
1dcb58e5 2053 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 2054lpfc_handle_latt_err_exit:
2055 /* Enable Link attention interrupts */
2e0fef85 2056 spin_lock_irq(&phba->hbalock);
dea3101e 2057 psli->sli_flag |= LPFC_PROCESS_LA;
2058 control = readl(phba->HCregaddr);
2059 control |= HC_LAINT_ENA;
2060 writel(control, phba->HCregaddr);
2061 readl(phba->HCregaddr); /* flush */
2062
2063 /* Clear Link Attention in HA REG */
2064 writel(HA_LATT, phba->HAregaddr);
2065 readl(phba->HAregaddr); /* flush */
2e0fef85 2066 spin_unlock_irq(&phba->hbalock);
dea3101e 2067 lpfc_linkdown(phba);
2e0fef85 2068 phba->link_state = LPFC_HBA_ERROR;
dea3101e 2069
09372820
JS		 2070 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
2071 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc);
dea3101e 2072
2073 return;
2074}
2075
e59058c4 2076/**
3621a710 2077 * lpfc_parse_vpd - Parse VPD (Vital Product Data)
e59058c4
JS		 2078 * @phba: pointer to lpfc hba data structure.
2079 * @vpd: pointer to the vital product data.
2080 * @len: length of the vital product data in bytes.
2081 *
2082 * This routine parses the Vital Product Data (VPD). The VPD is treated as
2083 * an array of characters. In this routine, the ModelName, ProgramType, and
2084 * ModelDesc, etc. fields of the phba data structure will be populated.
2085 *
2086 * Return codes
2087 * 0 - pointer to the VPD passed in is NULL
2088 * 1 - success
2089 **/
3772a991 2090int
2e0fef85 2091lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len)
dea3101e 2092{
2093 uint8_t lenlo, lenhi;
07da60c1 2094 int Length;
dea3101e 2095 int i, j;
2096 int finished = 0;
2097 int index = 0;
2098
2099 if (!vpd)
2100 return 0;
2101
2102 /* Vital Product */
ed957684 2103 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 2104 "0455 Vital Product Data: x%x x%x x%x x%x\n",
dea3101e 2105 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
2106 (uint32_t) vpd[3]);
74b72a59 2107 while (!finished && (index < (len - 4))) {
dea3101e 2108 switch (vpd[index]) {
2109 case 0x82:
74b72a59 2110 case 0x91:
dea3101e 2111 index += 1;
2112 lenlo = vpd[index];
2113 index += 1;
2114 lenhi = vpd[index];
2115 index += 1;
2116 i = ((((unsigned short)lenhi) << 8) + lenlo);
2117 index += i;
2118 break;
2119 case 0x90:
2120 index += 1;
2121 lenlo = vpd[index];
2122 index += 1;
2123 lenhi = vpd[index];
2124 index += 1;
2125 Length = ((((unsigned short)lenhi) << 8) + lenlo);
74b72a59
JW		 2126 if (Length > len - index)
2127 Length = len - index;
dea3101e 2128 while (Length > 0) {
2129 /* Look for Serial Number */
2130 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
2131 index += 2;
2132 i = vpd[index];
2133 index += 1;
2134 j = 0;
2135 Length -= (3+i);
2136 while(i--) {
2137 phba->SerialNumber[j++] = vpd[index++];
2138 if (j == 31)
2139 break;
2140 }
2141 phba->SerialNumber[j] = 0;
2142 continue;
2143 }
2144 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
2145 phba->vpd_flag |= VPD_MODEL_DESC;
2146 index += 2;
2147 i = vpd[index];
2148 index += 1;
2149 j = 0;
2150 Length -= (3+i);
2151 while(i--) {
2152 phba->ModelDesc[j++] = vpd[index++];
2153 if (j == 255)
2154 break;
2155 }
2156 phba->ModelDesc[j] = 0;
2157 continue;
2158 }
2159 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
2160 phba->vpd_flag |= VPD_MODEL_NAME;
2161 index += 2;
2162 i = vpd[index];
2163 index += 1;
2164 j = 0;
2165 Length -= (3+i);
2166 while(i--) {
2167 phba->ModelName[j++] = vpd[index++];
2168 if (j == 79)
2169 break;
2170 }
2171 phba->ModelName[j] = 0;
2172 continue;
2173 }
2174 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
2175 phba->vpd_flag |= VPD_PROGRAM_TYPE;
2176 index += 2;
2177 i = vpd[index];
2178 index += 1;
2179 j = 0;
2180 Length -= (3+i);
2181 while(i--) {
2182 phba->ProgramType[j++] = vpd[index++];
2183 if (j == 255)
2184 break;
2185 }
2186 phba->ProgramType[j] = 0;
2187 continue;
2188 }
2189 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
2190 phba->vpd_flag |= VPD_PORT;
2191 index += 2;
2192 i = vpd[index];
2193 index += 1;
2194 j = 0;
2195 Length -= (3+i);
2196 while(i--) {
cd1c8301
JS		 2197 if ((phba->sli_rev == LPFC_SLI_REV4) &&
2198 (phba->sli4_hba.pport_name_sta ==
2199 LPFC_SLI4_PPNAME_GET)) {
2200 j++;
2201 index++;
2202 } else
2203 phba->Port[j++] = vpd[index++];
2204 if (j == 19)
2205 break;
dea3101e 2206 }
cd1c8301
JS		 2207 if ((phba->sli_rev != LPFC_SLI_REV4) ||
2208 (phba->sli4_hba.pport_name_sta ==
2209 LPFC_SLI4_PPNAME_NON))
2210 phba->Port[j] = 0;
dea3101e 2211 continue;
2212 }
2213 else {
2214 index += 2;
2215 i = vpd[index];
2216 index += 1;
2217 index += i;
2218 Length -= (3 + i);
2219 }
2220 }
2221 finished = 0;
2222 break;
2223 case 0x78:
2224 finished = 1;
2225 break;
2226 default:
2227 index ++;
2228 break;
2229 }
74b72a59 2230 }
dea3101e 2231
2232 return(1);
2233}
2234
e59058c4 2235/**
3621a710 2236 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description
e59058c4
JS		 2237 * @phba: pointer to lpfc hba data structure.
2238 * @mdp: pointer to the data structure to hold the derived model name.
2239 * @descp: pointer to the data structure to hold the derived description.
2240 *
2241 * This routine retrieves HBA's description based on its registered PCI device
2242 * ID. The @descp passed into this function points to an array of 256 chars. It
2243 * shall be returned with the model name, maximum speed, and the host bus type.
2244 * The @mdp passed into this function points to an array of 80 chars. When the
2245 * function returns, the @mdp will be filled with the model name.
2246 **/
dea3101e 2247static void
2e0fef85 2248lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
dea3101e 2249{
2250 lpfc_vpd_t *vp;
fefcb2b6 2251 uint16_t dev_id = phba->pcidev->device;
74b72a59 2252 int max_speed;
84774a4d 2253 int GE = 0;
da0436e9 2254 int oneConnect = 0; /* default is not a oneConnect */
74b72a59 2255 struct {
a747c9ce
JS		 2256 char *name;
2257 char *bus;
2258 char *function;
2259 } m = {"<Unknown>", "", ""};
74b72a59
JW		 2260
2261 if (mdp && mdp[0] != '\0'
2262 && descp && descp[0] != '\0')
2263 return;
2264
d38dd52c
JS		 2265 if (phba->lmt & LMT_32Gb)
2266 max_speed = 32;
2267 else if (phba->lmt & LMT_16Gb)
c0c11512
JS		 2268 max_speed = 16;
2269 else if (phba->lmt & LMT_10Gb)
74b72a59
JW		 2270 max_speed = 10;
2271 else if (phba->lmt & LMT_8Gb)
2272 max_speed = 8;
2273 else if (phba->lmt & LMT_4Gb)
2274 max_speed = 4;
2275 else if (phba->lmt & LMT_2Gb)
2276 max_speed = 2;
4169d868 2277 else if (phba->lmt & LMT_1Gb)
74b72a59 2278 max_speed = 1;
4169d868
JS		 2279 else
2280 max_speed = 0;
dea3101e 2281
2282 vp = &phba->vpd;
dea3101e 2283
e4adb204 2284 switch (dev_id) {
06325e74 2285 case PCI_DEVICE_ID_FIREFLY:
12222f4f
JS		 2286 m = (typeof(m)){"LP6000", "PCI",
2287 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2288 break;
dea3101e 2289 case PCI_DEVICE_ID_SUPERFLY:
2290 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
12222f4f 2291 m = (typeof(m)){"LP7000", "PCI", ""};
dea3101e 2292 else
12222f4f
JS		 2293 m = (typeof(m)){"LP7000E", "PCI", ""};
2294 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e 2295 break;
2296 case PCI_DEVICE_ID_DRAGONFLY:
a747c9ce 2297 m = (typeof(m)){"LP8000", "PCI",
12222f4f 2298 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2299 break;
2300 case PCI_DEVICE_ID_CENTAUR:
2301 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
12222f4f 2302 m = (typeof(m)){"LP9002", "PCI", ""};
dea3101e 2303 else
12222f4f
JS		 2304 m = (typeof(m)){"LP9000", "PCI", ""};
2305 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e 2306 break;
2307 case PCI_DEVICE_ID_RFLY:
a747c9ce 2308 m = (typeof(m)){"LP952", "PCI",
12222f4f 2309 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2310 break;
2311 case PCI_DEVICE_ID_PEGASUS:
a747c9ce 2312 m = (typeof(m)){"LP9802", "PCI-X",
12222f4f 2313 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2314 break;
2315 case PCI_DEVICE_ID_THOR:
a747c9ce 2316 m = (typeof(m)){"LP10000", "PCI-X",
12222f4f 2317 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2318 break;
2319 case PCI_DEVICE_ID_VIPER:
a747c9ce 2320 m = (typeof(m)){"LPX1000", "PCI-X",
12222f4f 2321 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2322 break;
2323 case PCI_DEVICE_ID_PFLY:
a747c9ce 2324 m = (typeof(m)){"LP982", "PCI-X",
12222f4f 2325 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2326 break;
2327 case PCI_DEVICE_ID_TFLY:
a747c9ce 2328 m = (typeof(m)){"LP1050", "PCI-X",
12222f4f 2329 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2330 break;
2331 case PCI_DEVICE_ID_HELIOS:
a747c9ce 2332 m = (typeof(m)){"LP11000", "PCI-X2",
12222f4f 2333 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2334 break;
e4adb204 2335 case PCI_DEVICE_ID_HELIOS_SCSP:
a747c9ce 2336 m = (typeof(m)){"LP11000-SP", "PCI-X2",
12222f4f 2337 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC		 2338 break;
2339 case PCI_DEVICE_ID_HELIOS_DCSP:
a747c9ce 2340 m = (typeof(m)){"LP11002-SP", "PCI-X2",
12222f4f 2341 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC		 2342 break;
2343 case PCI_DEVICE_ID_NEPTUNE:
12222f4f
JS		 2344 m = (typeof(m)){"LPe1000", "PCIe",
2345 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC		 2346 break;
2347 case PCI_DEVICE_ID_NEPTUNE_SCSP:
12222f4f
JS		 2348 m = (typeof(m)){"LPe1000-SP", "PCIe",
2349 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC		 2350 break;
2351 case PCI_DEVICE_ID_NEPTUNE_DCSP:
12222f4f
JS		 2352 m = (typeof(m)){"LPe1002-SP", "PCIe",
2353 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204 2354 break;
dea3101e 2355 case PCI_DEVICE_ID_BMID:
a747c9ce 2356 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"};
dea3101e 2357 break;
2358 case PCI_DEVICE_ID_BSMB:
12222f4f
JS		 2359 m = (typeof(m)){"LP111", "PCI-X2",
2360 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2361 break;
2362 case PCI_DEVICE_ID_ZEPHYR:
a747c9ce 2363 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
dea3101e 2364 break;
e4adb204 2365 case PCI_DEVICE_ID_ZEPHYR_SCSP:
a747c9ce 2366 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
e4adb204
JSEC		 2367 break;
2368 case PCI_DEVICE_ID_ZEPHYR_DCSP:
a747c9ce 2369 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"};
a257bf90 2370 GE = 1;
e4adb204 2371 break;
dea3101e 2372 case PCI_DEVICE_ID_ZMID:
a747c9ce 2373 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"};
dea3101e 2374 break;
2375 case PCI_DEVICE_ID_ZSMB:
a747c9ce 2376 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"};
dea3101e 2377 break;
2378 case PCI_DEVICE_ID_LP101:
12222f4f
JS		 2379 m = (typeof(m)){"LP101", "PCI-X",
2380 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2381 break;
2382 case PCI_DEVICE_ID_LP10000S:
12222f4f
JS		 2383 m = (typeof(m)){"LP10000-S", "PCI",
2384 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2385 break;
e4adb204 2386 case PCI_DEVICE_ID_LP11000S:
12222f4f
JS		 2387 m = (typeof(m)){"LP11000-S", "PCI-X2",
2388 "Obsolete, Unsupported Fibre Channel Adapter"};
18a3b596 2389 break;
e4adb204 2390 case PCI_DEVICE_ID_LPE11000S:
12222f4f
JS		 2391 m = (typeof(m)){"LPe11000-S", "PCIe",
2392 "Obsolete, Unsupported Fibre Channel Adapter"};
5cc36b3c 2393 break;
b87eab38 2394 case PCI_DEVICE_ID_SAT:
a747c9ce 2395 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2396 break;
2397 case PCI_DEVICE_ID_SAT_MID:
a747c9ce 2398 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2399 break;
2400 case PCI_DEVICE_ID_SAT_SMB:
a747c9ce 2401 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2402 break;
2403 case PCI_DEVICE_ID_SAT_DCSP:
a747c9ce 2404 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2405 break;
2406 case PCI_DEVICE_ID_SAT_SCSP:
a747c9ce 2407 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2408 break;
2409 case PCI_DEVICE_ID_SAT_S:
a747c9ce 2410 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"};
b87eab38 2411 break;
84774a4d 2412 case PCI_DEVICE_ID_HORNET:
12222f4f
JS		 2413 m = (typeof(m)){"LP21000", "PCIe",
2414 "Obsolete, Unsupported FCoE Adapter"};
84774a4d
JS		 2415 GE = 1;
2416 break;
2417 case PCI_DEVICE_ID_PROTEUS_VF:
a747c9ce 2418 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2419 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS		 2420 break;
2421 case PCI_DEVICE_ID_PROTEUS_PF:
a747c9ce 2422 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2423 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS		 2424 break;
2425 case PCI_DEVICE_ID_PROTEUS_S:
a747c9ce 2426 m = (typeof(m)){"LPemv12002-S", "PCIe IOV",
12222f4f 2427 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d 2428 break;
da0436e9
JS		 2429 case PCI_DEVICE_ID_TIGERSHARK:
2430 oneConnect = 1;
a747c9ce 2431 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"};
da0436e9 2432 break;
a747c9ce 2433 case PCI_DEVICE_ID_TOMCAT:
6669f9bb 2434 oneConnect = 1;
a747c9ce
JS		 2435 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"};
2436 break;
2437 case PCI_DEVICE_ID_FALCON:
2438 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe",
2439 "EmulexSecure Fibre"};
6669f9bb 2440 break;
98fc5dd9
JS		 2441 case PCI_DEVICE_ID_BALIUS:
2442 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O",
12222f4f 2443 "Obsolete, Unsupported Fibre Channel Adapter"};
98fc5dd9 2444 break;
085c647c 2445 case PCI_DEVICE_ID_LANCER_FC:
c0c11512 2446 m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"};
085c647c 2447 break;
12222f4f
JS		 2448 case PCI_DEVICE_ID_LANCER_FC_VF:
2449 m = (typeof(m)){"LPe16000", "PCIe",
2450 "Obsolete, Unsupported Fibre Channel Adapter"};
2451 break;
085c647c
JS		 2452 case PCI_DEVICE_ID_LANCER_FCOE:
2453 oneConnect = 1;
079b5c91 2454 m = (typeof(m)){"OCe15100", "PCIe", "FCoE"};
085c647c 2455 break;
12222f4f
JS		 2456 case PCI_DEVICE_ID_LANCER_FCOE_VF:
2457 oneConnect = 1;
2458 m = (typeof(m)){"OCe15100", "PCIe",
2459 "Obsolete, Unsupported FCoE"};
2460 break;
d38dd52c
JS		 2461 case PCI_DEVICE_ID_LANCER_G6_FC:
2462 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"};
2463 break;
f8cafd38
JS		 2464 case PCI_DEVICE_ID_SKYHAWK:
2465 case PCI_DEVICE_ID_SKYHAWK_VF:
2466 oneConnect = 1;
2467 m = (typeof(m)){"OCe14000", "PCIe", "FCoE"};
2468 break;
5cc36b3c 2469 default:
a747c9ce 2470 m = (typeof(m)){"Unknown", "", ""};
e4adb204 2471 break;
dea3101e 2472 }
74b72a59
JW		 2473
2474 if (mdp && mdp[0] == '\0')
2475 snprintf(mdp, 79,"%s", m.name);
c0c11512
JS		 2476 /*
2477 * oneConnect hba requires special processing, they are all initiators
da0436e9
JS		 2478 * and we put the port number on the end
2479 */
2480 if (descp && descp[0] == '\0') {
2481 if (oneConnect)
2482 snprintf(descp, 255,
4169d868 2483 "Emulex OneConnect %s, %s Initiator %s",
a747c9ce 2484 m.name, m.function,
da0436e9 2485 phba->Port);
4169d868
JS		 2486 else if (max_speed == 0)
2487 snprintf(descp, 255,
290237d2 2488 "Emulex %s %s %s",
4169d868 2489 m.name, m.bus, m.function);
da0436e9
JS		 2490 else
2491 snprintf(descp, 255,
2492 "Emulex %s %d%s %s %s",
a747c9ce
JS		 2493 m.name, max_speed, (GE) ? "GE" : "Gb",
2494 m.bus, m.function);
da0436e9 2495 }
dea3101e 2496}
2497
e59058c4 2498/**
3621a710 2499 * lpfc_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring
e59058c4
JS		 2500 * @phba: pointer to lpfc hba data structure.
2501 * @pring: pointer to a IOCB ring.
2502 * @cnt: the number of IOCBs to be posted to the IOCB ring.
2503 *
2504 * This routine posts a given number of IOCBs with the associated DMA buffer
2505 * descriptors specified by the cnt argument to the given IOCB ring.
2506 *
2507 * Return codes
2508 * The number of IOCBs NOT able to be posted to the IOCB ring.
2509 **/
dea3101e 2510int
495a714c 2511lpfc_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt)
dea3101e 2512{
2513 IOCB_t *icmd;
0bd4ca25 2514 struct lpfc_iocbq *iocb;
dea3101e 2515 struct lpfc_dmabuf *mp1, *mp2;
2516
2517 cnt += pring->missbufcnt;
2518
2519 /* While there are buffers to post */
2520 while (cnt > 0) {
2521 /* Allocate buffer for command iocb */
0bd4ca25 2522 iocb = lpfc_sli_get_iocbq(phba);
dea3101e 2523 if (iocb == NULL) {
2524 pring->missbufcnt = cnt;
2525 return cnt;
2526 }
dea3101e 2527 icmd = &iocb->iocb;
2528
2529 /* 2 buffers can be posted per command */
2530 /* Allocate buffer to post */
2531 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2532 if (mp1)
98c9ea5c
JS		 2533 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys);
2534 if (!mp1 || !mp1->virt) {
c9475cb0 2535 kfree(mp1);
604a3e30 2536 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2537 pring->missbufcnt = cnt;
2538 return cnt;
2539 }
2540
2541 INIT_LIST_HEAD(&mp1->list);
2542 /* Allocate buffer to post */
2543 if (cnt > 1) {
2544 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2545 if (mp2)
2546 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
2547 &mp2->phys);
98c9ea5c 2548 if (!mp2 || !mp2->virt) {
c9475cb0 2549 kfree(mp2);
dea3101e 2550 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2551 kfree(mp1);
604a3e30 2552 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2553 pring->missbufcnt = cnt;
2554 return cnt;
2555 }
2556
2557 INIT_LIST_HEAD(&mp2->list);
2558 } else {
2559 mp2 = NULL;
2560 }
2561
2562 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
2563 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
2564 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
2565 icmd->ulpBdeCount = 1;
2566 cnt--;
2567 if (mp2) {
2568 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
2569 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
2570 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
2571 cnt--;
2572 icmd->ulpBdeCount = 2;
2573 }
2574
2575 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
2576 icmd->ulpLe = 1;
2577
3772a991
JS		 2578 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) ==
2579 IOCB_ERROR) {
dea3101e 2580 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2581 kfree(mp1);
2582 cnt++;
2583 if (mp2) {
2584 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
2585 kfree(mp2);
2586 cnt++;
2587 }
604a3e30 2588 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2589 pring->missbufcnt = cnt;
dea3101e 2590 return cnt;
2591 }
dea3101e 2592 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
92d7f7b0 2593 if (mp2)
dea3101e 2594 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
dea3101e 2595 }
2596 pring->missbufcnt = 0;
2597 return 0;
2598}
2599
e59058c4 2600/**
3621a710 2601 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring
e59058c4
JS		 2602 * @phba: pointer to lpfc hba data structure.
2603 *
2604 * This routine posts initial receive IOCB buffers to the ELS ring. The
2605 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is
895427bd 2606 * set to 64 IOCBs. SLI3 only.
e59058c4
JS		 2607 *
2608 * Return codes
2609 * 0 - success (currently always success)
2610 **/
dea3101e 2611static int
2e0fef85 2612lpfc_post_rcv_buf(struct lpfc_hba *phba)
dea3101e 2613{
2614 struct lpfc_sli *psli = &phba->sli;
2615
2616 /* Ring 0, ELS / CT buffers */
895427bd 2617 lpfc_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0);
dea3101e 2618 /* Ring 2 - FCP no buffers needed */
2619
2620 return 0;
2621}
2622
2623#define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
2624
e59058c4 2625/**
3621a710 2626 * lpfc_sha_init - Set up initial array of hash table entries
e59058c4
JS		 2627 * @HashResultPointer: pointer to an array as hash table.
2628 *
2629 * This routine sets up the initial values to the array of hash table entries
2630 * for the LC HBAs.
2631 **/
dea3101e 2632static void
2633lpfc_sha_init(uint32_t * HashResultPointer)
2634{
2635 HashResultPointer[0] = 0x67452301;
2636 HashResultPointer[1] = 0xEFCDAB89;
2637 HashResultPointer[2] = 0x98BADCFE;
2638 HashResultPointer[3] = 0x10325476;
2639 HashResultPointer[4] = 0xC3D2E1F0;
2640}
2641
e59058c4 2642/**
3621a710 2643 * lpfc_sha_iterate - Iterate initial hash table with the working hash table
e59058c4
JS		 2644 * @HashResultPointer: pointer to an initial/result hash table.
2645 * @HashWorkingPointer: pointer to an working hash table.
2646 *
2647 * This routine iterates an initial hash table pointed by @HashResultPointer
2648 * with the values from the working hash table pointeed by @HashWorkingPointer.
2649 * The results are putting back to the initial hash table, returned through
2650 * the @HashResultPointer as the result hash table.
2651 **/
dea3101e 2652static void
2653lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
2654{
2655 int t;
2656 uint32_t TEMP;
2657 uint32_t A, B, C, D, E;
2658 t = 16;
2659 do {
2660 HashWorkingPointer[t] =
2661 S(1,
2662 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
2663 8] ^
2664 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
2665 } while (++t <= 79);
2666 t = 0;
2667 A = HashResultPointer[0];
2668 B = HashResultPointer[1];
2669 C = HashResultPointer[2];
2670 D = HashResultPointer[3];
2671 E = HashResultPointer[4];
2672
2673 do {
2674 if (t < 20) {
2675 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
2676 } else if (t < 40) {
2677 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
2678 } else if (t < 60) {
2679 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
2680 } else {
2681 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
2682 }
2683 TEMP += S(5, A) + E + HashWorkingPointer[t];
2684 E = D;
2685 D = C;
2686 C = S(30, B);
2687 B = A;
2688 A = TEMP;
2689 } while (++t <= 79);
2690
2691 HashResultPointer[0] += A;
2692 HashResultPointer[1] += B;
2693 HashResultPointer[2] += C;
2694 HashResultPointer[3] += D;
2695 HashResultPointer[4] += E;
2696
2697}
2698
e59058c4 2699/**
3621a710 2700 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA
e59058c4
JS		 2701 * @RandomChallenge: pointer to the entry of host challenge random number array.
2702 * @HashWorking: pointer to the entry of the working hash array.
2703 *
2704 * This routine calculates the working hash array referred by @HashWorking
2705 * from the challenge random numbers associated with the host, referred by
2706 * @RandomChallenge. The result is put into the entry of the working hash
2707 * array and returned by reference through @HashWorking.
2708 **/
dea3101e 2709static void
2710lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
2711{
2712 *HashWorking = (*RandomChallenge ^ *HashWorking);
2713}
2714
e59058c4 2715/**
3621a710 2716 * lpfc_hba_init - Perform special handling for LC HBA initialization
e59058c4
JS		 2717 * @phba: pointer to lpfc hba data structure.
2718 * @hbainit: pointer to an array of unsigned 32-bit integers.
2719 *
2720 * This routine performs the special handling for LC HBA initialization.
2721 **/
dea3101e 2722void
2723lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
2724{
2725 int t;
2726 uint32_t *HashWorking;
2e0fef85 2727 uint32_t *pwwnn = (uint32_t *) phba->wwnn;
dea3101e 2728
bbfbbbc1 2729 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL);
dea3101e 2730 if (!HashWorking)
2731 return;
2732
dea3101e 2733 HashWorking[0] = HashWorking[78] = *pwwnn++;
2734 HashWorking[1] = HashWorking[79] = *pwwnn;
2735
2736 for (t = 0; t < 7; t++)
2737 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
2738
2739 lpfc_sha_init(hbainit);
2740 lpfc_sha_iterate(hbainit, HashWorking);
2741 kfree(HashWorking);
2742}
2743
e59058c4 2744/**
3621a710 2745 * lpfc_cleanup - Performs vport cleanups before deleting a vport
e59058c4
JS		 2746 * @vport: pointer to a virtual N_Port data structure.
2747 *
2748 * This routine performs the necessary cleanups before deleting the @vport.
2749 * It invokes the discovery state machine to perform necessary state
2750 * transitions and to release the ndlps associated with the @vport. Note,
2751 * the physical port is treated as @vport 0.
2752 **/
87af33fe 2753void
2e0fef85 2754lpfc_cleanup(struct lpfc_vport *vport)
dea3101e 2755{
87af33fe 2756 struct lpfc_hba *phba = vport->phba;
dea3101e 2757 struct lpfc_nodelist *ndlp, *next_ndlp;
a8adb832 2758 int i = 0;
dea3101e 2759
87af33fe
JS		 2760 if (phba->link_state > LPFC_LINK_DOWN)
2761 lpfc_port_link_failure(vport);
2762
2763 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) {
e47c9093
JS		 2764 if (!NLP_CHK_NODE_ACT(ndlp)) {
2765 ndlp = lpfc_enable_node(vport, ndlp,
2766 NLP_STE_UNUSED_NODE);
2767 if (!ndlp)
2768 continue;
2769 spin_lock_irq(&phba->ndlp_lock);
2770 NLP_SET_FREE_REQ(ndlp);
2771 spin_unlock_irq(&phba->ndlp_lock);
2772 /* Trigger the release of the ndlp memory */
2773 lpfc_nlp_put(ndlp);
2774 continue;
2775 }
2776 spin_lock_irq(&phba->ndlp_lock);
2777 if (NLP_CHK_FREE_REQ(ndlp)) {
2778 /* The ndlp should not be in memory free mode already */
2779 spin_unlock_irq(&phba->ndlp_lock);
2780 continue;
2781 } else
2782 /* Indicate request for freeing ndlp memory */
2783 NLP_SET_FREE_REQ(ndlp);
2784 spin_unlock_irq(&phba->ndlp_lock);
2785
58da1ffb
JS		 2786 if (vport->port_type != LPFC_PHYSICAL_PORT &&
2787 ndlp->nlp_DID == Fabric_DID) {
2788 /* Just free up ndlp with Fabric_DID for vports */
2789 lpfc_nlp_put(ndlp);
2790 continue;
2791 }
2792
eff4a01b
JS		 2793 /* take care of nodes in unused state before the state
2794 * machine taking action.
2795 */
2796 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) {
2797 lpfc_nlp_put(ndlp);
2798 continue;
2799 }
2800
87af33fe
JS		 2801 if (ndlp->nlp_type & NLP_FABRIC)
2802 lpfc_disc_state_machine(vport, ndlp, NULL,
2803 NLP_EVT_DEVICE_RECOVERY);
e47c9093 2804
a0f2d3ef
JS		 2805 if (ndlp->nlp_fc4_type & NLP_FC4_NVME) {
2806 /* Remove the NVME transport reference now and
2807 * continue to remove the node.
2808 */
2809 lpfc_nlp_put(ndlp);
2810 }
2811
87af33fe
JS		 2812 lpfc_disc_state_machine(vport, ndlp, NULL,
2813 NLP_EVT_DEVICE_RM);
2814 }
2815
a8adb832
JS		 2816 /* At this point, ALL ndlp's should be gone
2817 * because of the previous NLP_EVT_DEVICE_RM.
2818 * Lets wait for this to happen, if needed.
2819 */
87af33fe 2820 while (!list_empty(&vport->fc_nodes)) {
a8adb832 2821 if (i++ > 3000) {
87af33fe 2822 lpfc_printf_vlog(vport, KERN_ERR, LOG_DISCOVERY,
a8adb832 2823 "0233 Nodelist not empty\n");
e47c9093
JS		 2824 list_for_each_entry_safe(ndlp, next_ndlp,
2825 &vport->fc_nodes, nlp_listp) {
2826 lpfc_printf_vlog(ndlp->vport, KERN_ERR,
2827 LOG_NODE,
d7c255b2 2828 "0282 did:x%x ndlp:x%p "
e47c9093
JS		 2829 "usgmap:x%x refcnt:%d\n",
2830 ndlp->nlp_DID, (void *)ndlp,
2831 ndlp->nlp_usg_map,
2c935bc5 2832 kref_read(&ndlp->kref));
e47c9093 2833 }
a8adb832 2834 break;
87af33fe 2835 }
a8adb832
JS		 2836
2837 /* Wait for any activity on ndlps to settle */
2838 msleep(10);
87af33fe 2839 }
1151e3ec 2840 lpfc_cleanup_vports_rrqs(vport, NULL);
dea3101e 2841}
2842
e59058c4 2843/**
3621a710 2844 * lpfc_stop_vport_timers - Stop all the timers associated with a vport
e59058c4
JS		 2845 * @vport: pointer to a virtual N_Port data structure.
2846 *
2847 * This routine stops all the timers associated with a @vport. This function
2848 * is invoked before disabling or deleting a @vport. Note that the physical
2849 * port is treated as @vport 0.
2850 **/
92d7f7b0
JS		 2851void
2852lpfc_stop_vport_timers(struct lpfc_vport *vport)
dea3101e 2853{
92d7f7b0 2854 del_timer_sync(&vport->els_tmofunc);
92494144 2855 del_timer_sync(&vport->delayed_disc_tmo);
92d7f7b0
JS		 2856 lpfc_can_disctmo(vport);
2857 return;
dea3101e 2858}
2859
ecfd03c6
JS		 2860/**
2861 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2862 * @phba: pointer to lpfc hba data structure.
2863 *
2864 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The
2865 * caller of this routine should already hold the host lock.
2866 **/
2867void
2868__lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2869{
5ac6b303
JS		 2870 /* Clear pending FCF rediscovery wait flag */
2871 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
2872
ecfd03c6
JS		 2873 /* Now, try to stop the timer */
2874 del_timer(&phba->fcf.redisc_wait);
2875}
2876
2877/**
2878 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2879 * @phba: pointer to lpfc hba data structure.
2880 *
2881 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It
2882 * checks whether the FCF rediscovery wait timer is pending with the host
2883 * lock held before proceeding with disabling the timer and clearing the
2884 * wait timer pendig flag.
2885 **/
2886void
2887lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2888{
2889 spin_lock_irq(&phba->hbalock);
2890 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
2891 /* FCF rediscovery timer already fired or stopped */
2892 spin_unlock_irq(&phba->hbalock);
2893 return;
2894 }
2895 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
5ac6b303
JS		 2896 /* Clear failover in progress flags */
2897 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC);
ecfd03c6
JS		 2898 spin_unlock_irq(&phba->hbalock);
2899}
2900
e59058c4 2901/**
3772a991 2902 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA
e59058c4
JS		 2903 * @phba: pointer to lpfc hba data structure.
2904 *
2905 * This routine stops all the timers associated with a HBA. This function is
2906 * invoked before either putting a HBA offline or unloading the driver.
2907 **/
3772a991
JS		 2908void
2909lpfc_stop_hba_timers(struct lpfc_hba *phba)
dea3101e 2910{
51ef4c26 2911 lpfc_stop_vport_timers(phba->pport);
2e0fef85 2912 del_timer_sync(&phba->sli.mbox_tmo);
92d7f7b0 2913 del_timer_sync(&phba->fabric_block_timer);
9399627f 2914 del_timer_sync(&phba->eratt_poll);
3772a991 2915 del_timer_sync(&phba->hb_tmofunc);
1151e3ec
JS		 2916 if (phba->sli_rev == LPFC_SLI_REV4) {
2917 del_timer_sync(&phba->rrq_tmr);
2918 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
2919 }
3772a991
JS		 2920 phba->hb_outstanding = 0;
2921
2922 switch (phba->pci_dev_grp) {
2923 case LPFC_PCI_DEV_LP:
2924 /* Stop any LightPulse device specific driver timers */
2925 del_timer_sync(&phba->fcp_poll_timer);
2926 break;
2927 case LPFC_PCI_DEV_OC:
2928 /* Stop any OneConnect device sepcific driver timers */
ecfd03c6 2929 lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3772a991
JS		 2930 break;
2931 default:
2932 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2933 "0297 Invalid device group (x%x)\n",
2934 phba->pci_dev_grp);
2935 break;
2936 }
2e0fef85 2937 return;
dea3101e 2938}
2939
e59058c4 2940/**
3621a710 2941 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked
e59058c4
JS		 2942 * @phba: pointer to lpfc hba data structure.
2943 *
2944 * This routine marks a HBA's management interface as blocked. Once the HBA's
2945 * management interface is marked as blocked, all the user space access to
2946 * the HBA, whether they are from sysfs interface or libdfc interface will
2947 * all be blocked. The HBA is set to block the management interface when the
2948 * driver prepares the HBA interface for online or offline.
2949 **/
a6ababd2 2950static void
618a5230 2951lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action)
a6ababd2
AB		 2952{
2953 unsigned long iflag;
6e7288d9
JS		 2954 uint8_t actcmd = MBX_HEARTBEAT;
2955 unsigned long timeout;
2956
a6ababd2
AB		 2957 spin_lock_irqsave(&phba->hbalock, iflag);
2958 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO;
618a5230
JS		 2959 spin_unlock_irqrestore(&phba->hbalock, iflag);
2960 if (mbx_action == LPFC_MBX_NO_WAIT)
2961 return;
2962 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
2963 spin_lock_irqsave(&phba->hbalock, iflag);
a183a15f 2964 if (phba->sli.mbox_active) {
6e7288d9 2965 actcmd = phba->sli.mbox_active->u.mb.mbxCommand;
a183a15f
JS		 2966 /* Determine how long we might wait for the active mailbox
2967 * command to be gracefully completed by firmware.
2968 */
2969 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
2970 phba->sli.mbox_active) * 1000) + jiffies;
2971 }
a6ababd2 2972 spin_unlock_irqrestore(&phba->hbalock, iflag);
a183a15f 2973
6e7288d9
JS		 2974 /* Wait for the outstnading mailbox command to complete */
2975 while (phba->sli.mbox_active) {
2976 /* Check active mailbox complete status every 2ms */
2977 msleep(2);
2978 if (time_after(jiffies, timeout)) {
2979 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2980 "2813 Mgmt IO is Blocked %x "
2981 "- mbox cmd %x still active\n",
2982 phba->sli.sli_flag, actcmd);
2983 break;
2984 }
2985 }
a6ababd2
AB		 2986}
2987
6b5151fd
JS		 2988/**
2989 * lpfc_sli4_node_prep - Assign RPIs for active nodes.
2990 * @phba: pointer to lpfc hba data structure.
2991 *
2992 * Allocate RPIs for all active remote nodes. This is needed whenever
2993 * an SLI4 adapter is reset and the driver is not unloading. Its purpose
2994 * is to fixup the temporary rpi assignments.
2995 **/
2996void
2997lpfc_sli4_node_prep(struct lpfc_hba *phba)
2998{
2999 struct lpfc_nodelist *ndlp, *next_ndlp;
3000 struct lpfc_vport **vports;
9d3d340d
JS		 3001 int i, rpi;
3002 unsigned long flags;
6b5151fd
JS		 3003
3004 if (phba->sli_rev != LPFC_SLI_REV4)
3005 return;
3006
3007 vports = lpfc_create_vport_work_array(phba);
9d3d340d
JS		 3008 if (vports == NULL)
3009 return;
6b5151fd 3010
9d3d340d
JS		 3011 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3012 if (vports[i]->load_flag & FC_UNLOADING)
3013 continue;
3014
3015 list_for_each_entry_safe(ndlp, next_ndlp,
3016 &vports[i]->fc_nodes,
3017 nlp_listp) {
3018 if (!NLP_CHK_NODE_ACT(ndlp))
3019 continue;
3020 rpi = lpfc_sli4_alloc_rpi(phba);
3021 if (rpi == LPFC_RPI_ALLOC_ERROR) {
3022 spin_lock_irqsave(&phba->ndlp_lock, flags);
3023 NLP_CLR_NODE_ACT(ndlp);
3024 spin_unlock_irqrestore(&phba->ndlp_lock, flags);
3025 continue;
6b5151fd 3026 }
9d3d340d
JS		 3027 ndlp->nlp_rpi = rpi;
3028 lpfc_printf_vlog(ndlp->vport, KERN_INFO, LOG_NODE,
3029 "0009 rpi:%x DID:%x "
3030 "flg:%x map:%x %p\n", ndlp->nlp_rpi,
3031 ndlp->nlp_DID, ndlp->nlp_flag,
3032 ndlp->nlp_usg_map, ndlp);
6b5151fd
JS		 3033 }
3034 }
3035 lpfc_destroy_vport_work_array(phba, vports);
3036}
3037
e59058c4 3038/**
3621a710 3039 * lpfc_online - Initialize and bring a HBA online
e59058c4
JS		 3040 * @phba: pointer to lpfc hba data structure.
3041 *
3042 * This routine initializes the HBA and brings a HBA online. During this
3043 * process, the management interface is blocked to prevent user space access
3044 * to the HBA interfering with the driver initialization.
3045 *
3046 * Return codes
3047 * 0 - successful
3048 * 1 - failed
3049 **/
dea3101e 3050int
2e0fef85 3051lpfc_online(struct lpfc_hba *phba)
dea3101e 3052{
372bd282 3053 struct lpfc_vport *vport;
549e55cd
JS		 3054 struct lpfc_vport **vports;
3055 int i;
16a3a208 3056 bool vpis_cleared = false;
2e0fef85 3057
dea3101e 3058 if (!phba)
3059 return 0;
372bd282 3060 vport = phba->pport;
dea3101e 3061
2e0fef85 3062 if (!(vport->fc_flag & FC_OFFLINE_MODE))
dea3101e 3063 return 0;
3064
ed957684 3065 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 3066 "0458 Bring Adapter online\n");
dea3101e 3067
618a5230 3068 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
46fa311e 3069
da0436e9
JS		 3070 if (phba->sli_rev == LPFC_SLI_REV4) {
3071 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */
3072 lpfc_unblock_mgmt_io(phba);
3073 return 1;
3074 }
16a3a208
JS		 3075 spin_lock_irq(&phba->hbalock);
3076 if (!phba->sli4_hba.max_cfg_param.vpi_used)
3077 vpis_cleared = true;
3078 spin_unlock_irq(&phba->hbalock);
da0436e9 3079 } else {
895427bd 3080 lpfc_sli_queue_init(phba);
da0436e9
JS		 3081 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */
3082 lpfc_unblock_mgmt_io(phba);
3083 return 1;
3084 }
46fa311e 3085 }
dea3101e 3086
549e55cd 3087 vports = lpfc_create_vport_work_array(phba);
aeb6641f 3088 if (vports != NULL) {
da0436e9 3089 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd
JS		 3090 struct Scsi_Host *shost;
3091 shost = lpfc_shost_from_vport(vports[i]);
3092 spin_lock_irq(shost->host_lock);
3093 vports[i]->fc_flag &= ~FC_OFFLINE_MODE;
3094 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)
3095 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
16a3a208 3096 if (phba->sli_rev == LPFC_SLI_REV4) {
1c6834a7 3097 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI;
16a3a208
JS		 3098 if ((vpis_cleared) &&
3099 (vports[i]->port_type !=
3100 LPFC_PHYSICAL_PORT))
3101 vports[i]->vpi = 0;
3102 }
549e55cd
JS		 3103 spin_unlock_irq(shost->host_lock);
3104 }
aeb6641f
AB		 3105 }
3106 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3107
46fa311e 3108 lpfc_unblock_mgmt_io(phba);
dea3101e 3109 return 0;
3110}
3111
e59058c4 3112/**
3621a710 3113 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked
e59058c4
JS		 3114 * @phba: pointer to lpfc hba data structure.
3115 *
3116 * This routine marks a HBA's management interface as not blocked. Once the
3117 * HBA's management interface is marked as not blocked, all the user space
3118 * access to the HBA, whether they are from sysfs interface or libdfc
3119 * interface will be allowed. The HBA is set to block the management interface
3120 * when the driver prepares the HBA interface for online or offline and then
3121 * set to unblock the management interface afterwards.
3122 **/
46fa311e
JS		 3123void
3124lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
3125{
3126 unsigned long iflag;
3127
2e0fef85
JS		 3128 spin_lock_irqsave(&phba->hbalock, iflag);
3129 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO;
3130 spin_unlock_irqrestore(&phba->hbalock, iflag);
46fa311e
JS		 3131}
3132
e59058c4 3133/**
3621a710 3134 * lpfc_offline_prep - Prepare a HBA to be brought offline
e59058c4
JS		 3135 * @phba: pointer to lpfc hba data structure.
3136 *
3137 * This routine is invoked to prepare a HBA to be brought offline. It performs
3138 * unregistration login to all the nodes on all vports and flushes the mailbox
3139 * queue to make it ready to be brought offline.
3140 **/
46fa311e 3141void
618a5230 3142lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action)
46fa311e 3143{
2e0fef85 3144 struct lpfc_vport *vport = phba->pport;
46fa311e 3145 struct lpfc_nodelist *ndlp, *next_ndlp;
87af33fe 3146 struct lpfc_vport **vports;
72100cc4 3147 struct Scsi_Host *shost;
87af33fe 3148 int i;
dea3101e 3149
2e0fef85 3150 if (vport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3151 return;
dea3101e 3152
618a5230 3153 lpfc_block_mgmt_io(phba, mbx_action);
dea3101e 3154
3155 lpfc_linkdown(phba);
3156
87af33fe
JS		 3157 /* Issue an unreg_login to all nodes on all vports */
3158 vports = lpfc_create_vport_work_array(phba);
3159 if (vports != NULL) {
da0436e9 3160 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
a8adb832
JS		 3161 if (vports[i]->load_flag & FC_UNLOADING)
3162 continue;
72100cc4
JS		 3163 shost = lpfc_shost_from_vport(vports[i]);
3164 spin_lock_irq(shost->host_lock);
c868595d 3165 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
695a814e
JS		 3166 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
3167 vports[i]->fc_flag &= ~FC_VFI_REGISTERED;
72100cc4 3168 spin_unlock_irq(shost->host_lock);
695a814e 3169
87af33fe
JS		 3170 shost = lpfc_shost_from_vport(vports[i]);
3171 list_for_each_entry_safe(ndlp, next_ndlp,
3172 &vports[i]->fc_nodes,
3173 nlp_listp) {
e47c9093
JS		 3174 if (!NLP_CHK_NODE_ACT(ndlp))
3175 continue;
87af33fe
JS		 3176 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE)
3177 continue;
3178 if (ndlp->nlp_type & NLP_FABRIC) {
3179 lpfc_disc_state_machine(vports[i], ndlp,
3180 NULL, NLP_EVT_DEVICE_RECOVERY);
3181 lpfc_disc_state_machine(vports[i], ndlp,
3182 NULL, NLP_EVT_DEVICE_RM);
3183 }
3184 spin_lock_irq(shost->host_lock);
3185 ndlp->nlp_flag &= ~NLP_NPR_ADISC;
401ee0c1 3186 spin_unlock_irq(shost->host_lock);
6b5151fd
JS		 3187 /*
3188 * Whenever an SLI4 port goes offline, free the
401ee0c1
JS		 3189 * RPI. Get a new RPI when the adapter port
3190 * comes back online.
6b5151fd 3191 */
be6bb941
JS		 3192 if (phba->sli_rev == LPFC_SLI_REV4) {
3193 lpfc_printf_vlog(ndlp->vport,
3194 KERN_INFO, LOG_NODE,
3195 "0011 lpfc_offline: "
3196 "ndlp:x%p did %x "
3197 "usgmap:x%x rpi:%x\n",
3198 ndlp, ndlp->nlp_DID,
3199 ndlp->nlp_usg_map,
3200 ndlp->nlp_rpi);
3201
6b5151fd 3202 lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi);
be6bb941 3203 }
87af33fe
JS		 3204 lpfc_unreg_rpi(vports[i], ndlp);
3205 }
3206 }
3207 }
09372820 3208 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3209
618a5230 3210 lpfc_sli_mbox_sys_shutdown(phba, mbx_action);
46fa311e
JS		 3211}
3212
e59058c4 3213/**
3621a710 3214 * lpfc_offline - Bring a HBA offline
e59058c4
JS		 3215 * @phba: pointer to lpfc hba data structure.
3216 *
3217 * This routine actually brings a HBA offline. It stops all the timers
3218 * associated with the HBA, brings down the SLI layer, and eventually
3219 * marks the HBA as in offline state for the upper layer protocol.
3220 **/
46fa311e 3221void
2e0fef85 3222lpfc_offline(struct lpfc_hba *phba)
46fa311e 3223{
549e55cd
JS		 3224 struct Scsi_Host *shost;
3225 struct lpfc_vport **vports;
3226 int i;
46fa311e 3227
549e55cd 3228 if (phba->pport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3229 return;
688a8863 3230
da0436e9
JS		 3231 /* stop port and all timers associated with this hba */
3232 lpfc_stop_port(phba);
51ef4c26
JS		 3233 vports = lpfc_create_vport_work_array(phba);
3234 if (vports != NULL)
da0436e9 3235 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
51ef4c26 3236 lpfc_stop_vport_timers(vports[i]);
09372820 3237 lpfc_destroy_vport_work_array(phba, vports);
92d7f7b0 3238 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 3239 "0460 Bring Adapter offline\n");
dea3101e 3240 /* Bring down the SLI Layer and cleanup. The HBA is offline
3241 now. */
3242 lpfc_sli_hba_down(phba);
92d7f7b0 3243 spin_lock_irq(&phba->hbalock);
7054a606 3244 phba->work_ha = 0;
92d7f7b0 3245 spin_unlock_irq(&phba->hbalock);
549e55cd
JS		 3246 vports = lpfc_create_vport_work_array(phba);
3247 if (vports != NULL)
da0436e9 3248 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd 3249 shost = lpfc_shost_from_vport(vports[i]);
549e55cd
JS		 3250 spin_lock_irq(shost->host_lock);
3251 vports[i]->work_port_events = 0;
3252 vports[i]->fc_flag |= FC_OFFLINE_MODE;
3253 spin_unlock_irq(shost->host_lock);
3254 }
09372820 3255 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3256}
3257
e59058c4 3258/**
3621a710 3259 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists
e59058c4
JS		 3260 * @phba: pointer to lpfc hba data structure.
3261 *
3262 * This routine is to free all the SCSI buffers and IOCBs from the driver
3263 * list back to kernel. It is called from lpfc_pci_remove_one to free
3264 * the internal resources before the device is removed from the system.
e59058c4 3265 **/
8a9d2e80 3266static void
2e0fef85 3267lpfc_scsi_free(struct lpfc_hba *phba)
dea3101e 3268{
3269 struct lpfc_scsi_buf *sb, *sb_next;
dea3101e 3270
895427bd
JS		 3271 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3272 return;
3273
2e0fef85 3274 spin_lock_irq(&phba->hbalock);
a40fc5f0 3275
dea3101e 3276 /* Release all the lpfc_scsi_bufs maintained by this host. */
a40fc5f0
JS		 3277
3278 spin_lock(&phba->scsi_buf_list_put_lock);
3279 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put,
3280 list) {
dea3101e 3281 list_del(&sb->list);
895427bd 3282 pci_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3283 sb->dma_handle);
dea3101e 3284 kfree(sb);
3285 phba->total_scsi_bufs--;
3286 }
a40fc5f0
JS		 3287 spin_unlock(&phba->scsi_buf_list_put_lock);
3288
3289 spin_lock(&phba->scsi_buf_list_get_lock);
3290 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get,
3291 list) {
dea3101e 3292 list_del(&sb->list);
895427bd 3293 pci_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3294 sb->dma_handle);
dea3101e 3295 kfree(sb);
3296 phba->total_scsi_bufs--;
3297 }
a40fc5f0 3298 spin_unlock(&phba->scsi_buf_list_get_lock);
2e0fef85 3299 spin_unlock_irq(&phba->hbalock);
8a9d2e80 3300}
895427bd
JS		 3301/**
3302 * lpfc_nvme_free - Free all the NVME buffers and IOCBs from driver lists
3303 * @phba: pointer to lpfc hba data structure.
3304 *
3305 * This routine is to free all the NVME buffers and IOCBs from the driver
3306 * list back to kernel. It is called from lpfc_pci_remove_one to free
3307 * the internal resources before the device is removed from the system.
3308 **/
3309static void
3310lpfc_nvme_free(struct lpfc_hba *phba)
3311{
3312 struct lpfc_nvme_buf *lpfc_ncmd, *lpfc_ncmd_next;
895427bd
JS		 3313
3314 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3315 return;
3316
3317 spin_lock_irq(&phba->hbalock);
3318
3319 /* Release all the lpfc_nvme_bufs maintained by this host. */
3320 spin_lock(&phba->nvme_buf_list_put_lock);
3321 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3322 &phba->lpfc_nvme_buf_list_put, list) {
3323 list_del(&lpfc_ncmd->list);
3324 pci_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
3325 lpfc_ncmd->dma_handle);
3326 kfree(lpfc_ncmd);
3327 phba->total_nvme_bufs--;
3328 }
3329 spin_unlock(&phba->nvme_buf_list_put_lock);
3330
3331 spin_lock(&phba->nvme_buf_list_get_lock);
3332 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3333 &phba->lpfc_nvme_buf_list_get, list) {
3334 list_del(&lpfc_ncmd->list);
3335 pci_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
3336 lpfc_ncmd->dma_handle);
3337 kfree(lpfc_ncmd);
3338 phba->total_nvme_bufs--;
3339 }
3340 spin_unlock(&phba->nvme_buf_list_get_lock);
895427bd
JS		 3341 spin_unlock_irq(&phba->hbalock);
3342}
8a9d2e80 3343/**
895427bd 3344 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping
8a9d2e80
JS		 3345 * @phba: pointer to lpfc hba data structure.
3346 *
3347 * This routine first calculates the sizes of the current els and allocated
3348 * scsi sgl lists, and then goes through all sgls to updates the physical
3349 * XRIs assigned due to port function reset. During port initialization, the
3350 * current els and allocated scsi sgl lists are 0s.
3351 *
3352 * Return codes
3353 * 0 - successful (for now, it always returns 0)
3354 **/
3355int
895427bd 3356lpfc_sli4_els_sgl_update(struct lpfc_hba *phba)
8a9d2e80
JS		 3357{
3358 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
895427bd 3359 uint16_t i, lxri, xri_cnt, els_xri_cnt;
8a9d2e80 3360 LIST_HEAD(els_sgl_list);
8a9d2e80
JS		 3361 int rc;
3362
3363 /*
3364 * update on pci function's els xri-sgl list
3365 */
3366 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
895427bd 3367
8a9d2e80
JS		 3368 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
3369 /* els xri-sgl expanded */
3370 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
3371 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3372 "3157 ELS xri-sgl count increased from "
3373 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3374 els_xri_cnt);
3375 /* allocate the additional els sgls */
3376 for (i = 0; i < xri_cnt; i++) {
3377 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3378 GFP_KERNEL);
3379 if (sglq_entry == NULL) {
3380 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3381 "2562 Failure to allocate an "
3382 "ELS sgl entry:%d\n", i);
3383 rc = -ENOMEM;
3384 goto out_free_mem;
3385 }
3386 sglq_entry->buff_type = GEN_BUFF_TYPE;
3387 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0,
3388 &sglq_entry->phys);
3389 if (sglq_entry->virt == NULL) {
3390 kfree(sglq_entry);
3391 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3392 "2563 Failure to allocate an "
3393 "ELS mbuf:%d\n", i);
3394 rc = -ENOMEM;
3395 goto out_free_mem;
3396 }
3397 sglq_entry->sgl = sglq_entry->virt;
3398 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE);
3399 sglq_entry->state = SGL_FREED;
3400 list_add_tail(&sglq_entry->list, &els_sgl_list);
3401 }
38c20673 3402 spin_lock_irq(&phba->hbalock);
895427bd
JS		 3403 spin_lock(&phba->sli4_hba.sgl_list_lock);
3404 list_splice_init(&els_sgl_list,
3405 &phba->sli4_hba.lpfc_els_sgl_list);
3406 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 3407 spin_unlock_irq(&phba->hbalock);
8a9d2e80
JS		 3408 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
3409 /* els xri-sgl shrinked */
3410 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
3411 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3412 "3158 ELS xri-sgl count decreased from "
3413 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3414 els_xri_cnt);
3415 spin_lock_irq(&phba->hbalock);
895427bd
JS		 3416 spin_lock(&phba->sli4_hba.sgl_list_lock);
3417 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list,
3418 &els_sgl_list);
8a9d2e80
JS		 3419 /* release extra els sgls from list */
3420 for (i = 0; i < xri_cnt; i++) {
3421 list_remove_head(&els_sgl_list,
3422 sglq_entry, struct lpfc_sglq, list);
3423 if (sglq_entry) {
895427bd
JS		 3424 __lpfc_mbuf_free(phba, sglq_entry->virt,
3425 sglq_entry->phys);
8a9d2e80
JS		 3426 kfree(sglq_entry);
3427 }
3428 }
895427bd
JS		 3429 list_splice_init(&els_sgl_list,
3430 &phba->sli4_hba.lpfc_els_sgl_list);
3431 spin_unlock(&phba->sli4_hba.sgl_list_lock);
8a9d2e80
JS		 3432 spin_unlock_irq(&phba->hbalock);
3433 } else
3434 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3435 "3163 ELS xri-sgl count unchanged: %d\n",
3436 els_xri_cnt);
3437 phba->sli4_hba.els_xri_cnt = els_xri_cnt;
3438
3439 /* update xris to els sgls on the list */
3440 sglq_entry = NULL;
3441 sglq_entry_next = NULL;
3442 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
895427bd 3443 &phba->sli4_hba.lpfc_els_sgl_list, list) {
8a9d2e80
JS		 3444 lxri = lpfc_sli4_next_xritag(phba);
3445 if (lxri == NO_XRI) {
3446 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3447 "2400 Failed to allocate xri for "
3448 "ELS sgl\n");
3449 rc = -ENOMEM;
3450 goto out_free_mem;
3451 }
3452 sglq_entry->sli4_lxritag = lxri;
3453 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3454 }
895427bd
JS		 3455 return 0;
3456
3457out_free_mem:
3458 lpfc_free_els_sgl_list(phba);
3459 return rc;
3460}
3461
f358dd0c
JS		 3462/**
3463 * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping
3464 * @phba: pointer to lpfc hba data structure.
3465 *
3466 * This routine first calculates the sizes of the current els and allocated
3467 * scsi sgl lists, and then goes through all sgls to updates the physical
3468 * XRIs assigned due to port function reset. During port initialization, the
3469 * current els and allocated scsi sgl lists are 0s.
3470 *
3471 * Return codes
3472 * 0 - successful (for now, it always returns 0)
3473 **/
3474int
3475lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba)
3476{
3477 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
3478 uint16_t i, lxri, xri_cnt, els_xri_cnt;
6c621a22 3479 uint16_t nvmet_xri_cnt;
f358dd0c
JS		 3480 LIST_HEAD(nvmet_sgl_list);
3481 int rc;
3482
3483 /*
3484 * update on pci function's nvmet xri-sgl list
3485 */
3486 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
61f3d4bf 3487
6c621a22
JS		 3488 /* For NVMET, ALL remaining XRIs are dedicated for IO processing */
3489 nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
f358dd0c
JS		 3490
3491 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) {
3492 /* els xri-sgl expanded */
3493 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt;
3494 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3495 "6302 NVMET xri-sgl cnt grew from %d to %d\n",
3496 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt);
3497 /* allocate the additional nvmet sgls */
3498 for (i = 0; i < xri_cnt; i++) {
3499 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3500 GFP_KERNEL);
3501 if (sglq_entry == NULL) {
3502 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3503 "6303 Failure to allocate an "
3504 "NVMET sgl entry:%d\n", i);
3505 rc = -ENOMEM;
3506 goto out_free_mem;
3507 }
3508 sglq_entry->buff_type = NVMET_BUFF_TYPE;
3509 sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0,
3510 &sglq_entry->phys);
3511 if (sglq_entry->virt == NULL) {
3512 kfree(sglq_entry);
3513 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3514 "6304 Failure to allocate an "
3515 "NVMET buf:%d\n", i);
3516 rc = -ENOMEM;
3517 goto out_free_mem;
3518 }
3519 sglq_entry->sgl = sglq_entry->virt;
3520 memset(sglq_entry->sgl, 0,
3521 phba->cfg_sg_dma_buf_size);
3522 sglq_entry->state = SGL_FREED;
3523 list_add_tail(&sglq_entry->list, &nvmet_sgl_list);
3524 }
3525 spin_lock_irq(&phba->hbalock);
3526 spin_lock(&phba->sli4_hba.sgl_list_lock);
3527 list_splice_init(&nvmet_sgl_list,
3528 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3529 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3530 spin_unlock_irq(&phba->hbalock);
3531 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) {
3532 /* nvmet xri-sgl shrunk */
3533 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt;
3534 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3535 "6305 NVMET xri-sgl count decreased from "
3536 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt,
3537 nvmet_xri_cnt);
3538 spin_lock_irq(&phba->hbalock);
3539 spin_lock(&phba->sli4_hba.sgl_list_lock);
3540 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list,
3541 &nvmet_sgl_list);
3542 /* release extra nvmet sgls from list */
3543 for (i = 0; i < xri_cnt; i++) {
3544 list_remove_head(&nvmet_sgl_list,
3545 sglq_entry, struct lpfc_sglq, list);
3546 if (sglq_entry) {
3547 lpfc_nvmet_buf_free(phba, sglq_entry->virt,
3548 sglq_entry->phys);
3549 kfree(sglq_entry);
3550 }
3551 }
3552 list_splice_init(&nvmet_sgl_list,
3553 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3554 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3555 spin_unlock_irq(&phba->hbalock);
3556 } else
3557 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3558 "6306 NVMET xri-sgl count unchanged: %d\n",
3559 nvmet_xri_cnt);
3560 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt;
3561
3562 /* update xris to nvmet sgls on the list */
3563 sglq_entry = NULL;
3564 sglq_entry_next = NULL;
3565 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
3566 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) {
3567 lxri = lpfc_sli4_next_xritag(phba);
3568 if (lxri == NO_XRI) {
3569 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3570 "6307 Failed to allocate xri for "
3571 "NVMET sgl\n");
3572 rc = -ENOMEM;
3573 goto out_free_mem;
3574 }
3575 sglq_entry->sli4_lxritag = lxri;
3576 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3577 }
3578 return 0;
3579
3580out_free_mem:
3581 lpfc_free_nvmet_sgl_list(phba);
3582 return rc;
3583}
3584
895427bd
JS		 3585/**
3586 * lpfc_sli4_scsi_sgl_update - update xri-sgl sizing and mapping
3587 * @phba: pointer to lpfc hba data structure.
3588 *
3589 * This routine first calculates the sizes of the current els and allocated
3590 * scsi sgl lists, and then goes through all sgls to updates the physical
3591 * XRIs assigned due to port function reset. During port initialization, the
3592 * current els and allocated scsi sgl lists are 0s.
3593 *
3594 * Return codes
3595 * 0 - successful (for now, it always returns 0)
3596 **/
3597int
3598lpfc_sli4_scsi_sgl_update(struct lpfc_hba *phba)
3599{
3600 struct lpfc_scsi_buf *psb, *psb_next;
3601 uint16_t i, lxri, els_xri_cnt, scsi_xri_cnt;
3602 LIST_HEAD(scsi_sgl_list);
3603 int rc;
8a9d2e80
JS		 3604
3605 /*
895427bd 3606 * update on pci function's els xri-sgl list
8a9d2e80 3607 */
895427bd 3608 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
8a9d2e80
JS		 3609 phba->total_scsi_bufs = 0;
3610
895427bd
JS		 3611 /*
3612 * update on pci function's allocated scsi xri-sgl list
3613 */
8a9d2e80
JS		 3614 /* maximum number of xris available for scsi buffers */
3615 phba->sli4_hba.scsi_xri_max = phba->sli4_hba.max_cfg_param.max_xri -
3616 els_xri_cnt;
3617
895427bd
JS		 3618 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3619 return 0;
3620
3621 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3622 phba->sli4_hba.scsi_xri_max = /* Split them up */
3623 (phba->sli4_hba.scsi_xri_max *
3624 phba->cfg_xri_split) / 100;
8a9d2e80 3625
a40fc5f0 3626 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3627 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS		 3628 list_splice_init(&phba->lpfc_scsi_buf_list_get, &scsi_sgl_list);
3629 list_splice(&phba->lpfc_scsi_buf_list_put, &scsi_sgl_list);
164cecd1 3630 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3631 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80 3632
e8c0a779
JS		 3633 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3634 "6060 Current allocated SCSI xri-sgl count:%d, "
3635 "maximum SCSI xri count:%d (split:%d)\n",
3636 phba->sli4_hba.scsi_xri_cnt,
3637 phba->sli4_hba.scsi_xri_max, phba->cfg_xri_split);
3638
8a9d2e80
JS		 3639 if (phba->sli4_hba.scsi_xri_cnt > phba->sli4_hba.scsi_xri_max) {
3640 /* max scsi xri shrinked below the allocated scsi buffers */
3641 scsi_xri_cnt = phba->sli4_hba.scsi_xri_cnt -
3642 phba->sli4_hba.scsi_xri_max;
3643 /* release the extra allocated scsi buffers */
3644 for (i = 0; i < scsi_xri_cnt; i++) {
3645 list_remove_head(&scsi_sgl_list, psb,
3646 struct lpfc_scsi_buf, list);
a2fc4aef 3647 if (psb) {
895427bd 3648 pci_pool_free(phba->lpfc_sg_dma_buf_pool,
a2fc4aef
JS		 3649 psb->data, psb->dma_handle);
3650 kfree(psb);
3651 }
8a9d2e80 3652 }
a40fc5f0 3653 spin_lock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80 3654 phba->sli4_hba.scsi_xri_cnt -= scsi_xri_cnt;
a40fc5f0 3655 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80
JS		 3656 }
3657
3658 /* update xris associated to remaining allocated scsi buffers */
3659 psb = NULL;
3660 psb_next = NULL;
3661 list_for_each_entry_safe(psb, psb_next, &scsi_sgl_list, list) {
3662 lxri = lpfc_sli4_next_xritag(phba);
3663 if (lxri == NO_XRI) {
3664 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3665 "2560 Failed to allocate xri for "
3666 "scsi buffer\n");
3667 rc = -ENOMEM;
3668 goto out_free_mem;
3669 }
3670 psb->cur_iocbq.sli4_lxritag = lxri;
3671 psb->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3672 }
a40fc5f0 3673 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3674 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS		 3675 list_splice_init(&scsi_sgl_list, &phba->lpfc_scsi_buf_list_get);
3676 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
164cecd1 3677 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3678 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
dea3101e 3679 return 0;
8a9d2e80
JS		 3680
3681out_free_mem:
8a9d2e80
JS		 3682 lpfc_scsi_free(phba);
3683 return rc;
dea3101e 3684}
3685
96418b5e
JS		 3686static uint64_t
3687lpfc_get_wwpn(struct lpfc_hba *phba)
3688{
3689 uint64_t wwn;
3690 int rc;
3691 LPFC_MBOXQ_t *mboxq;
3692 MAILBOX_t *mb;
3693
4492b739
JS		 3694 if (phba->sli_rev < LPFC_SLI_REV4) {
3695 /* Reset the port first */
3696 lpfc_sli_brdrestart(phba);
3697 rc = lpfc_sli_chipset_init(phba);
3698 if (rc)
3699 return (uint64_t)-1;
3700 }
96418b5e
JS		 3701
3702 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
3703 GFP_KERNEL);
3704 if (!mboxq)
3705 return (uint64_t)-1;
3706
3707 /* First get WWN of HBA instance */
3708 lpfc_read_nv(phba, mboxq);
3709 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
3710 if (rc != MBX_SUCCESS) {
3711 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3712 "6019 Mailbox failed , mbxCmd x%x "
3713 "READ_NV, mbxStatus x%x\n",
3714 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
3715 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
3716 mempool_free(mboxq, phba->mbox_mem_pool);
3717 return (uint64_t) -1;
3718 }
3719 mb = &mboxq->u.mb;
3720 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t));
3721 /* wwn is WWPN of HBA instance */
3722 mempool_free(mboxq, phba->mbox_mem_pool);
3723 if (phba->sli_rev == LPFC_SLI_REV4)
3724 return be64_to_cpu(wwn);
3725 else
3726 return (((wwn & 0xffffffff00000000) >> 32) |
3727 ((wwn & 0x00000000ffffffff) << 32));
3728
3729}
3730
895427bd
JS		 3731/**
3732 * lpfc_sli4_nvme_sgl_update - update xri-sgl sizing and mapping
3733 * @phba: pointer to lpfc hba data structure.
3734 *
3735 * This routine first calculates the sizes of the current els and allocated
3736 * scsi sgl lists, and then goes through all sgls to updates the physical
3737 * XRIs assigned due to port function reset. During port initialization, the
3738 * current els and allocated scsi sgl lists are 0s.
3739 *
3740 * Return codes
3741 * 0 - successful (for now, it always returns 0)
3742 **/
3743int
3744lpfc_sli4_nvme_sgl_update(struct lpfc_hba *phba)
3745{
3746 struct lpfc_nvme_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL;
3747 uint16_t i, lxri, els_xri_cnt;
3748 uint16_t nvme_xri_cnt, nvme_xri_max;
3749 LIST_HEAD(nvme_sgl_list);
3750 int rc;
3751
3752 phba->total_nvme_bufs = 0;
3753
3754 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3755 return 0;
3756 /*
3757 * update on pci function's allocated nvme xri-sgl list
3758 */
3759
3760 /* maximum number of xris available for nvme buffers */
3761 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
3762 nvme_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
3763 phba->sli4_hba.nvme_xri_max = nvme_xri_max;
3764 phba->sli4_hba.nvme_xri_max -= phba->sli4_hba.scsi_xri_max;
3765
3766 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3767 "6074 Current allocated NVME xri-sgl count:%d, "
3768 "maximum NVME xri count:%d\n",
3769 phba->sli4_hba.nvme_xri_cnt,
3770 phba->sli4_hba.nvme_xri_max);
3771
3772 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3773 spin_lock(&phba->nvme_buf_list_put_lock);
3774 list_splice_init(&phba->lpfc_nvme_buf_list_get, &nvme_sgl_list);
3775 list_splice(&phba->lpfc_nvme_buf_list_put, &nvme_sgl_list);
3776 spin_unlock(&phba->nvme_buf_list_put_lock);
3777 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3778
3779 if (phba->sli4_hba.nvme_xri_cnt > phba->sli4_hba.nvme_xri_max) {
3780 /* max nvme xri shrunk below the allocated nvme buffers */
3781 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3782 nvme_xri_cnt = phba->sli4_hba.nvme_xri_cnt -
3783 phba->sli4_hba.nvme_xri_max;
3784 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3785 /* release the extra allocated nvme buffers */
3786 for (i = 0; i < nvme_xri_cnt; i++) {
3787 list_remove_head(&nvme_sgl_list, lpfc_ncmd,
3788 struct lpfc_nvme_buf, list);
3789 if (lpfc_ncmd) {
3790 pci_pool_free(phba->lpfc_sg_dma_buf_pool,
3791 lpfc_ncmd->data,
3792 lpfc_ncmd->dma_handle);
3793 kfree(lpfc_ncmd);
3794 }
3795 }
3796 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3797 phba->sli4_hba.nvme_xri_cnt -= nvme_xri_cnt;
3798 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3799 }
3800
3801 /* update xris associated to remaining allocated nvme buffers */
3802 lpfc_ncmd = NULL;
3803 lpfc_ncmd_next = NULL;
3804 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3805 &nvme_sgl_list, list) {
3806 lxri = lpfc_sli4_next_xritag(phba);
3807 if (lxri == NO_XRI) {
3808 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3809 "6075 Failed to allocate xri for "
3810 "nvme buffer\n");
3811 rc = -ENOMEM;
3812 goto out_free_mem;
3813 }
3814 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri;
3815 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3816 }
3817 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3818 spin_lock(&phba->nvme_buf_list_put_lock);
3819 list_splice_init(&nvme_sgl_list, &phba->lpfc_nvme_buf_list_get);
3820 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
3821 spin_unlock(&phba->nvme_buf_list_put_lock);
3822 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3823 return 0;
3824
3825out_free_mem:
3826 lpfc_nvme_free(phba);
3827 return rc;
3828}
3829
e59058c4 3830/**
3621a710 3831 * lpfc_create_port - Create an FC port
e59058c4
JS		 3832 * @phba: pointer to lpfc hba data structure.
3833 * @instance: a unique integer ID to this FC port.
3834 * @dev: pointer to the device data structure.
3835 *
3836 * This routine creates a FC port for the upper layer protocol. The FC port
3837 * can be created on top of either a physical port or a virtual port provided
3838 * by the HBA. This routine also allocates a SCSI host data structure (shost)
3839 * and associates the FC port created before adding the shost into the SCSI
3840 * layer.
3841 *
3842 * Return codes
3843 * @vport - pointer to the virtual N_Port data structure.
3844 * NULL - port create failed.
3845 **/
2e0fef85 3846struct lpfc_vport *
3de2a653 3847lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
47a8617c 3848{
2e0fef85 3849 struct lpfc_vport *vport;
895427bd 3850 struct Scsi_Host *shost = NULL;
2e0fef85 3851 int error = 0;
96418b5e
JS		 3852 int i;
3853 uint64_t wwn;
3854 bool use_no_reset_hba = false;
3855
3856 wwn = lpfc_get_wwpn(phba);
3857
3858 for (i = 0; i < lpfc_no_hba_reset_cnt; i++) {
3859 if (wwn == lpfc_no_hba_reset[i]) {
3860 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3861 "6020 Setting use_no_reset port=%llx\n",
3862 wwn);
3863 use_no_reset_hba = true;
3864 break;
3865 }
3866 }
47a8617c 3867
895427bd
JS		 3868 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
3869 if (dev != &phba->pcidev->dev) {
3870 shost = scsi_host_alloc(&lpfc_vport_template,
3871 sizeof(struct lpfc_vport));
3872 } else {
96418b5e 3873 if (!use_no_reset_hba)
895427bd
JS		 3874 shost = scsi_host_alloc(&lpfc_template,
3875 sizeof(struct lpfc_vport));
3876 else
96418b5e 3877 shost = scsi_host_alloc(&lpfc_template_no_hr,
895427bd
JS		 3878 sizeof(struct lpfc_vport));
3879 }
3880 } else if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
3881 shost = scsi_host_alloc(&lpfc_template_nvme,
ea4142f6
JS		 3882 sizeof(struct lpfc_vport));
3883 }
2e0fef85
JS		 3884 if (!shost)
3885 goto out;
47a8617c 3886
2e0fef85
JS		 3887 vport = (struct lpfc_vport *) shost->hostdata;
3888 vport->phba = phba;
2e0fef85 3889 vport->load_flag |= FC_LOADING;
92d7f7b0 3890 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
7f5f3d0d 3891 vport->fc_rscn_flush = 0;
3de2a653 3892 lpfc_get_vport_cfgparam(vport);
895427bd 3893
2e0fef85
JS		 3894 shost->unique_id = instance;
3895 shost->max_id = LPFC_MAX_TARGET;
3de2a653 3896 shost->max_lun = vport->cfg_max_luns;
2e0fef85
JS		 3897 shost->this_id = -1;
3898 shost->max_cmd_len = 16;
8b0dff14 3899 shost->nr_hw_queues = phba->cfg_fcp_io_channel;
da0436e9 3900 if (phba->sli_rev == LPFC_SLI_REV4) {
28baac74 3901 shost->dma_boundary =
cb5172ea 3902 phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
da0436e9
JS		 3903 shost->sg_tablesize = phba->cfg_sg_seg_cnt;
3904 }
81301a9b 3905
47a8617c 3906 /*
2e0fef85
JS		 3907 * Set initial can_queue value since 0 is no longer supported and
3908 * scsi_add_host will fail. This will be adjusted later based on the
3909 * max xri value determined in hba setup.
47a8617c 3910 */
2e0fef85 3911 shost->can_queue = phba->cfg_hba_queue_depth - 10;
3de2a653 3912 if (dev != &phba->pcidev->dev) {
92d7f7b0
JS		 3913 shost->transportt = lpfc_vport_transport_template;
3914 vport->port_type = LPFC_NPIV_PORT;
3915 } else {
3916 shost->transportt = lpfc_transport_template;
3917 vport->port_type = LPFC_PHYSICAL_PORT;
3918 }
47a8617c 3919
2e0fef85
JS		 3920 /* Initialize all internally managed lists. */
3921 INIT_LIST_HEAD(&vport->fc_nodes);
da0436e9 3922 INIT_LIST_HEAD(&vport->rcv_buffer_list);
2e0fef85 3923 spin_lock_init(&vport->work_port_lock);
47a8617c 3924
33cc559a
TJ		 3925 setup_timer(&vport->fc_disctmo, lpfc_disc_timeout,
3926 (unsigned long)vport);
47a8617c 3927
33cc559a
TJ		 3928 setup_timer(&vport->els_tmofunc, lpfc_els_timeout,
3929 (unsigned long)vport);
92494144 3930
33cc559a
TJ		 3931 setup_timer(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo,
3932 (unsigned long)vport);
92494144 3933
d139b9bd 3934 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev);
2e0fef85
JS		 3935 if (error)
3936 goto out_put_shost;
47a8617c 3937
549e55cd 3938 spin_lock_irq(&phba->hbalock);
2e0fef85 3939 list_add_tail(&vport->listentry, &phba->port_list);
549e55cd 3940 spin_unlock_irq(&phba->hbalock);
2e0fef85 3941 return vport;
47a8617c 3942
2e0fef85
JS		 3943out_put_shost:
3944 scsi_host_put(shost);
3945out:
3946 return NULL;
47a8617c
JS		 3947}
3948
e59058c4 3949/**
3621a710 3950 * destroy_port - destroy an FC port
e59058c4
JS		 3951 * @vport: pointer to an lpfc virtual N_Port data structure.
3952 *
3953 * This routine destroys a FC port from the upper layer protocol. All the
3954 * resources associated with the port are released.
3955 **/
2e0fef85
JS		 3956void
3957destroy_port(struct lpfc_vport *vport)
47a8617c 3958{
92d7f7b0
JS		 3959 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
3960 struct lpfc_hba *phba = vport->phba;
47a8617c 3961
858c9f6c 3962 lpfc_debugfs_terminate(vport);
92d7f7b0
JS		 3963 fc_remove_host(shost);
3964 scsi_remove_host(shost);
47a8617c 3965
92d7f7b0
JS		 3966 spin_lock_irq(&phba->hbalock);
3967 list_del_init(&vport->listentry);
3968 spin_unlock_irq(&phba->hbalock);
47a8617c 3969
92d7f7b0 3970 lpfc_cleanup(vport);
47a8617c 3971 return;
47a8617c
JS		 3972}
3973
e59058c4 3974/**
3621a710 3975 * lpfc_get_instance - Get a unique integer ID
e59058c4
JS		 3976 *
3977 * This routine allocates a unique integer ID from lpfc_hba_index pool. It
3978 * uses the kernel idr facility to perform the task.
3979 *
3980 * Return codes:
3981 * instance - a unique integer ID allocated as the new instance.
3982 * -1 - lpfc get instance failed.
3983 **/
92d7f7b0
JS		 3984int
3985lpfc_get_instance(void)
3986{
ab516036
TH		 3987 int ret;
3988
3989 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL);
3990 return ret < 0 ? -1 : ret;
47a8617c
JS		 3991}
3992
e59058c4 3993/**
3621a710 3994 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done
e59058c4
JS		 3995 * @shost: pointer to SCSI host data structure.
3996 * @time: elapsed time of the scan in jiffies.
3997 *
3998 * This routine is called by the SCSI layer with a SCSI host to determine
3999 * whether the scan host is finished.
4000 *
4001 * Note: there is no scan_start function as adapter initialization will have
4002 * asynchronously kicked off the link initialization.
4003 *
4004 * Return codes
4005 * 0 - SCSI host scan is not over yet.
4006 * 1 - SCSI host scan is over.
4007 **/
47a8617c
JS		 4008int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time)
4009{
2e0fef85
JS		 4010 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4011 struct lpfc_hba *phba = vport->phba;
858c9f6c 4012 int stat = 0;
47a8617c 4013
858c9f6c
JS		 4014 spin_lock_irq(shost->host_lock);
4015
51ef4c26 4016 if (vport->load_flag & FC_UNLOADING) {
858c9f6c
JS		 4017 stat = 1;
4018 goto finished;
4019 }
256ec0d0 4020 if (time >= msecs_to_jiffies(30 * 1000)) {
2e0fef85 4021 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS		 4022 "0461 Scanning longer than 30 "
4023 "seconds. Continuing initialization\n");
858c9f6c 4024 stat = 1;
47a8617c 4025 goto finished;
2e0fef85 4026 }
256ec0d0
JS		 4027 if (time >= msecs_to_jiffies(15 * 1000) &&
4028 phba->link_state <= LPFC_LINK_DOWN) {
2e0fef85 4029 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS		 4030 "0465 Link down longer than 15 "
4031 "seconds. Continuing initialization\n");
858c9f6c 4032 stat = 1;
47a8617c 4033 goto finished;
2e0fef85 4034 }
47a8617c 4035
2e0fef85 4036 if (vport->port_state != LPFC_VPORT_READY)
858c9f6c 4037 goto finished;
2e0fef85 4038 if (vport->num_disc_nodes || vport->fc_prli_sent)
858c9f6c 4039 goto finished;
256ec0d0 4040 if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000))
858c9f6c 4041 goto finished;
2e0fef85 4042 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0)
858c9f6c
JS		 4043 goto finished;
4044
4045 stat = 1;
47a8617c
JS		 4046
4047finished:
858c9f6c
JS		 4048 spin_unlock_irq(shost->host_lock);
4049 return stat;
92d7f7b0 4050}
47a8617c 4051
e59058c4 4052/**
3621a710 4053 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port
e59058c4
JS		 4054 * @shost: pointer to SCSI host data structure.
4055 *
4056 * This routine initializes a given SCSI host attributes on a FC port. The
4057 * SCSI host can be either on top of a physical port or a virtual port.
4058 **/
92d7f7b0
JS		 4059void lpfc_host_attrib_init(struct Scsi_Host *shost)
4060{
4061 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4062 struct lpfc_hba *phba = vport->phba;
47a8617c 4063 /*
2e0fef85 4064 * Set fixed host attributes. Must done after lpfc_sli_hba_setup().
47a8617c
JS		 4065 */
4066
2e0fef85
JS		 4067 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
4068 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
47a8617c
JS		 4069 fc_host_supported_classes(shost) = FC_COS_CLASS3;
4070
4071 memset(fc_host_supported_fc4s(shost), 0,
2e0fef85 4072 sizeof(fc_host_supported_fc4s(shost)));
47a8617c
JS		 4073 fc_host_supported_fc4s(shost)[2] = 1;
4074 fc_host_supported_fc4s(shost)[7] = 1;
4075
92d7f7b0
JS		 4076 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost),
4077 sizeof fc_host_symbolic_name(shost));
47a8617c
JS		 4078
4079 fc_host_supported_speeds(shost) = 0;
d38dd52c
JS		 4080 if (phba->lmt & LMT_32Gb)
4081 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT;
88a2cfbb
JS		 4082 if (phba->lmt & LMT_16Gb)
4083 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT;
47a8617c
JS		 4084 if (phba->lmt & LMT_10Gb)
4085 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT;
a8adb832
JS		 4086 if (phba->lmt & LMT_8Gb)
4087 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT;
47a8617c
JS		 4088 if (phba->lmt & LMT_4Gb)
4089 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT;
4090 if (phba->lmt & LMT_2Gb)
4091 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT;
4092 if (phba->lmt & LMT_1Gb)
4093 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT;
4094
4095 fc_host_maxframe_size(shost) =
2e0fef85
JS		 4096 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
4097 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb;
47a8617c 4098
0af5d708
MC		 4099 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo;
4100
47a8617c
JS		 4101 /* This value is also unchanging */
4102 memset(fc_host_active_fc4s(shost), 0,
2e0fef85 4103 sizeof(fc_host_active_fc4s(shost)));
47a8617c
JS		 4104 fc_host_active_fc4s(shost)[2] = 1;
4105 fc_host_active_fc4s(shost)[7] = 1;
4106
92d7f7b0 4107 fc_host_max_npiv_vports(shost) = phba->max_vpi;
47a8617c 4108 spin_lock_irq(shost->host_lock);
51ef4c26 4109 vport->load_flag &= ~FC_LOADING;
47a8617c 4110 spin_unlock_irq(shost->host_lock);
47a8617c 4111}
dea3101e 4112
e59058c4 4113/**
da0436e9 4114 * lpfc_stop_port_s3 - Stop SLI3 device port
e59058c4
JS		 4115 * @phba: pointer to lpfc hba data structure.
4116 *
da0436e9
JS		 4117 * This routine is invoked to stop an SLI3 device port, it stops the device
4118 * from generating interrupts and stops the device driver's timers for the
4119 * device.
e59058c4 4120 **/
da0436e9
JS		 4121static void
4122lpfc_stop_port_s3(struct lpfc_hba *phba)
db2378e0 4123{
da0436e9
JS		 4124 /* Clear all interrupt enable conditions */
4125 writel(0, phba->HCregaddr);
4126 readl(phba->HCregaddr); /* flush */
4127 /* Clear all pending interrupts */
4128 writel(0xffffffff, phba->HAregaddr);
4129 readl(phba->HAregaddr); /* flush */
db2378e0 4130
da0436e9
JS		 4131 /* Reset some HBA SLI setup states */
4132 lpfc_stop_hba_timers(phba);
4133 phba->pport->work_port_events = 0;
4134}
db2378e0 4135
da0436e9
JS		 4136/**
4137 * lpfc_stop_port_s4 - Stop SLI4 device port
4138 * @phba: pointer to lpfc hba data structure.
4139 *
4140 * This routine is invoked to stop an SLI4 device port, it stops the device
4141 * from generating interrupts and stops the device driver's timers for the
4142 * device.
4143 **/
4144static void
4145lpfc_stop_port_s4(struct lpfc_hba *phba)
4146{
4147 /* Reset some HBA SLI4 setup states */
4148 lpfc_stop_hba_timers(phba);
4149 phba->pport->work_port_events = 0;
4150 phba->sli4_hba.intr_enable = 0;
da0436e9 4151}
9399627f 4152
da0436e9
JS		 4153/**
4154 * lpfc_stop_port - Wrapper function for stopping hba port
4155 * @phba: Pointer to HBA context object.
4156 *
4157 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from
4158 * the API jump table function pointer from the lpfc_hba struct.
4159 **/
4160void
4161lpfc_stop_port(struct lpfc_hba *phba)
4162{
4163 phba->lpfc_stop_port(phba);
4164}
db2378e0 4165
ecfd03c6
JS		 4166/**
4167 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer
4168 * @phba: Pointer to hba for which this call is being executed.
4169 *
4170 * This routine starts the timer waiting for the FCF rediscovery to complete.
4171 **/
4172void
4173lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba)
4174{
4175 unsigned long fcf_redisc_wait_tmo =
4176 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO));
4177 /* Start fcf rediscovery wait period timer */
4178 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo);
4179 spin_lock_irq(&phba->hbalock);
4180 /* Allow action to new fcf asynchronous event */
4181 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
4182 /* Mark the FCF rediscovery pending state */
4183 phba->fcf.fcf_flag |= FCF_REDISC_PEND;
4184 spin_unlock_irq(&phba->hbalock);
4185}
4186
4187/**
4188 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout
4189 * @ptr: Map to lpfc_hba data structure pointer.
4190 *
4191 * This routine is invoked when waiting for FCF table rediscover has been
4192 * timed out. If new FCF record(s) has (have) been discovered during the
4193 * wait period, a new FCF event shall be added to the FCOE async event
4194 * list, and then worker thread shall be waked up for processing from the
4195 * worker thread context.
4196 **/
e399b228 4197static void
ecfd03c6
JS		 4198lpfc_sli4_fcf_redisc_wait_tmo(unsigned long ptr)
4199{
4200 struct lpfc_hba *phba = (struct lpfc_hba *)ptr;
4201
4202 /* Don't send FCF rediscovery event if timer cancelled */
4203 spin_lock_irq(&phba->hbalock);
4204 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
4205 spin_unlock_irq(&phba->hbalock);
4206 return;
4207 }
4208 /* Clear FCF rediscovery timer pending flag */
4209 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
4210 /* FCF rediscovery event to worker thread */
4211 phba->fcf.fcf_flag |= FCF_REDISC_EVT;
4212 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 4213 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 4214 "2776 FCF rediscover quiescent timer expired\n");
ecfd03c6
JS		 4215 /* wake up worker thread */
4216 lpfc_worker_wake_up(phba);
4217}
4218
e59058c4 4219/**
da0436e9 4220 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code
e59058c4 4221 * @phba: pointer to lpfc hba data structure.
da0436e9 4222 * @acqe_link: pointer to the async link completion queue entry.
e59058c4 4223 *
da0436e9
JS		 4224 * This routine is to parse the SLI4 link-attention link fault code and
4225 * translate it into the base driver's read link attention mailbox command
4226 * status.
4227 *
4228 * Return: Link-attention status in terms of base driver's coding.
e59058c4 4229 **/
da0436e9
JS		 4230static uint16_t
4231lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba,
4232 struct lpfc_acqe_link *acqe_link)
db2378e0 4233{
da0436e9 4234 uint16_t latt_fault;
9399627f 4235
da0436e9
JS		 4236 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) {
4237 case LPFC_ASYNC_LINK_FAULT_NONE:
4238 case LPFC_ASYNC_LINK_FAULT_LOCAL:
4239 case LPFC_ASYNC_LINK_FAULT_REMOTE:
4240 latt_fault = 0;
4241 break;
4242 default:
4243 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4244 "0398 Invalid link fault code: x%x\n",
4245 bf_get(lpfc_acqe_link_fault, acqe_link));
4246 latt_fault = MBXERR_ERROR;
4247 break;
4248 }
4249 return latt_fault;
db2378e0
JS		 4250}
4251
5b75da2f 4252/**
da0436e9 4253 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type
5b75da2f 4254 * @phba: pointer to lpfc hba data structure.
da0436e9 4255 * @acqe_link: pointer to the async link completion queue entry.
5b75da2f 4256 *
da0436e9
JS		 4257 * This routine is to parse the SLI4 link attention type and translate it
4258 * into the base driver's link attention type coding.
5b75da2f 4259 *
da0436e9
JS		 4260 * Return: Link attention type in terms of base driver's coding.
4261 **/
4262static uint8_t
4263lpfc_sli4_parse_latt_type(struct lpfc_hba *phba,
4264 struct lpfc_acqe_link *acqe_link)
5b75da2f 4265{
da0436e9 4266 uint8_t att_type;
5b75da2f 4267
da0436e9
JS		 4268 switch (bf_get(lpfc_acqe_link_status, acqe_link)) {
4269 case LPFC_ASYNC_LINK_STATUS_DOWN:
4270 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN:
76a95d75 4271 att_type = LPFC_ATT_LINK_DOWN;
da0436e9
JS		 4272 break;
4273 case LPFC_ASYNC_LINK_STATUS_UP:
4274 /* Ignore physical link up events - wait for logical link up */
76a95d75 4275 att_type = LPFC_ATT_RESERVED;
da0436e9
JS		 4276 break;
4277 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP:
76a95d75 4278 att_type = LPFC_ATT_LINK_UP;
da0436e9
JS		 4279 break;
4280 default:
4281 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4282 "0399 Invalid link attention type: x%x\n",
4283 bf_get(lpfc_acqe_link_status, acqe_link));
76a95d75 4284 att_type = LPFC_ATT_RESERVED;
da0436e9 4285 break;
5b75da2f 4286 }
da0436e9 4287 return att_type;
5b75da2f
JS		 4288}
4289
8b68cd52
JS		 4290/**
4291 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed
4292 * @phba: pointer to lpfc hba data structure.
4293 *
4294 * This routine is to get an SLI3 FC port's link speed in Mbps.
4295 *
4296 * Return: link speed in terms of Mbps.
4297 **/
4298uint32_t
4299lpfc_sli_port_speed_get(struct lpfc_hba *phba)
4300{
4301 uint32_t link_speed;
4302
4303 if (!lpfc_is_link_up(phba))
4304 return 0;
4305
a085e87c
JS		 4306 if (phba->sli_rev <= LPFC_SLI_REV3) {
4307 switch (phba->fc_linkspeed) {
4308 case LPFC_LINK_SPEED_1GHZ:
4309 link_speed = 1000;
4310 break;
4311 case LPFC_LINK_SPEED_2GHZ:
4312 link_speed = 2000;
4313 break;
4314 case LPFC_LINK_SPEED_4GHZ:
4315 link_speed = 4000;
4316 break;
4317 case LPFC_LINK_SPEED_8GHZ:
4318 link_speed = 8000;
4319 break;
4320 case LPFC_LINK_SPEED_10GHZ:
4321 link_speed = 10000;
4322 break;
4323 case LPFC_LINK_SPEED_16GHZ:
4324 link_speed = 16000;
4325 break;
4326 default:
4327 link_speed = 0;
4328 }
4329 } else {
4330 if (phba->sli4_hba.link_state.logical_speed)
4331 link_speed =
4332 phba->sli4_hba.link_state.logical_speed;
4333 else
4334 link_speed = phba->sli4_hba.link_state.speed;
8b68cd52
JS		 4335 }
4336 return link_speed;
4337}
4338
4339/**
4340 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed
4341 * @phba: pointer to lpfc hba data structure.
4342 * @evt_code: asynchronous event code.
4343 * @speed_code: asynchronous event link speed code.
4344 *
4345 * This routine is to parse the giving SLI4 async event link speed code into
4346 * value of Mbps for the link speed.
4347 *
4348 * Return: link speed in terms of Mbps.
4349 **/
4350static uint32_t
4351lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code,
4352 uint8_t speed_code)
4353{
4354 uint32_t port_speed;
4355
4356 switch (evt_code) {
4357 case LPFC_TRAILER_CODE_LINK:
4358 switch (speed_code) {
26d830ec 4359 case LPFC_ASYNC_LINK_SPEED_ZERO:
8b68cd52
JS		 4360 port_speed = 0;
4361 break;
26d830ec 4362 case LPFC_ASYNC_LINK_SPEED_10MBPS:
8b68cd52
JS		 4363 port_speed = 10;
4364 break;
26d830ec 4365 case LPFC_ASYNC_LINK_SPEED_100MBPS:
8b68cd52
JS		 4366 port_speed = 100;
4367 break;
26d830ec 4368 case LPFC_ASYNC_LINK_SPEED_1GBPS:
8b68cd52
JS		 4369 port_speed = 1000;
4370 break;
26d830ec 4371 case LPFC_ASYNC_LINK_SPEED_10GBPS:
8b68cd52
JS		 4372 port_speed = 10000;
4373 break;
26d830ec
JS		 4374 case LPFC_ASYNC_LINK_SPEED_20GBPS:
4375 port_speed = 20000;
4376 break;
4377 case LPFC_ASYNC_LINK_SPEED_25GBPS:
4378 port_speed = 25000;
4379 break;
4380 case LPFC_ASYNC_LINK_SPEED_40GBPS:
4381 port_speed = 40000;
4382 break;
8b68cd52
JS		 4383 default:
4384 port_speed = 0;
4385 }
4386 break;
4387 case LPFC_TRAILER_CODE_FC:
4388 switch (speed_code) {
26d830ec 4389 case LPFC_FC_LA_SPEED_UNKNOWN:
8b68cd52
JS		 4390 port_speed = 0;
4391 break;
26d830ec 4392 case LPFC_FC_LA_SPEED_1G:
8b68cd52
JS		 4393 port_speed = 1000;
4394 break;
26d830ec 4395 case LPFC_FC_LA_SPEED_2G:
8b68cd52
JS		 4396 port_speed = 2000;
4397 break;
26d830ec 4398 case LPFC_FC_LA_SPEED_4G:
8b68cd52
JS		 4399 port_speed = 4000;
4400 break;
26d830ec 4401 case LPFC_FC_LA_SPEED_8G:
8b68cd52
JS		 4402 port_speed = 8000;
4403 break;
26d830ec 4404 case LPFC_FC_LA_SPEED_10G:
8b68cd52
JS		 4405 port_speed = 10000;
4406 break;
26d830ec 4407 case LPFC_FC_LA_SPEED_16G:
8b68cd52
JS		 4408 port_speed = 16000;
4409 break;
d38dd52c
JS		 4410 case LPFC_FC_LA_SPEED_32G:
4411 port_speed = 32000;
4412 break;
8b68cd52
JS		 4413 default:
4414 port_speed = 0;
4415 }
4416 break;
4417 default:
4418 port_speed = 0;
4419 }
4420 return port_speed;
4421}
4422
da0436e9 4423/**
70f3c073 4424 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event
da0436e9
JS		 4425 * @phba: pointer to lpfc hba data structure.
4426 * @acqe_link: pointer to the async link completion queue entry.
4427 *
70f3c073 4428 * This routine is to handle the SLI4 asynchronous FCoE link event.
da0436e9
JS		 4429 **/
4430static void
4431lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
4432 struct lpfc_acqe_link *acqe_link)
4433{
4434 struct lpfc_dmabuf *mp;
4435 LPFC_MBOXQ_t *pmb;
4436 MAILBOX_t *mb;
76a95d75 4437 struct lpfc_mbx_read_top *la;
da0436e9 4438 uint8_t att_type;
76a95d75 4439 int rc;
da0436e9
JS		 4440
4441 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link);
76a95d75 4442 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP)
da0436e9 4443 return;
32b9793f 4444 phba->fcoe_eventtag = acqe_link->event_tag;
da0436e9
JS		 4445 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4446 if (!pmb) {
4447 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4448 "0395 The mboxq allocation failed\n");
4449 return;
4450 }
4451 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4452 if (!mp) {
4453 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4454 "0396 The lpfc_dmabuf allocation failed\n");
4455 goto out_free_pmb;
4456 }
4457 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4458 if (!mp->virt) {
4459 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4460 "0397 The mbuf allocation failed\n");
4461 goto out_free_dmabuf;
4462 }
4463
4464 /* Cleanup any outstanding ELS commands */
4465 lpfc_els_flush_all_cmd(phba);
4466
4467 /* Block ELS IOCBs until we have done process link event */
895427bd 4468 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
da0436e9
JS		 4469
4470 /* Update link event statistics */
4471 phba->sli.slistat.link_event++;
4472
76a95d75
JS		 4473 /* Create lpfc_handle_latt mailbox command from link ACQE */
4474 lpfc_read_topology(phba, pmb, mp);
4475 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
da0436e9
JS		 4476 pmb->vport = phba->pport;
4477
da0436e9
JS		 4478 /* Keep the link status for extra SLI4 state machine reference */
4479 phba->sli4_hba.link_state.speed =
8b68cd52
JS		 4480 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK,
4481 bf_get(lpfc_acqe_link_speed, acqe_link));
da0436e9
JS		 4482 phba->sli4_hba.link_state.duplex =
4483 bf_get(lpfc_acqe_link_duplex, acqe_link);
4484 phba->sli4_hba.link_state.status =
4485 bf_get(lpfc_acqe_link_status, acqe_link);
70f3c073
JS		 4486 phba->sli4_hba.link_state.type =
4487 bf_get(lpfc_acqe_link_type, acqe_link);
4488 phba->sli4_hba.link_state.number =
4489 bf_get(lpfc_acqe_link_number, acqe_link);
da0436e9
JS		 4490 phba->sli4_hba.link_state.fault =
4491 bf_get(lpfc_acqe_link_fault, acqe_link);
65467b6b 4492 phba->sli4_hba.link_state.logical_speed =
8b68cd52
JS		 4493 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10;
4494
70f3c073 4495 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
c31098ce
JS		 4496 "2900 Async FC/FCoE Link event - Speed:%dGBit "
4497 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d "
4498 "Logical speed:%dMbps Fault:%d\n",
70f3c073
JS		 4499 phba->sli4_hba.link_state.speed,
4500 phba->sli4_hba.link_state.topology,
4501 phba->sli4_hba.link_state.status,
4502 phba->sli4_hba.link_state.type,
4503 phba->sli4_hba.link_state.number,
8b68cd52 4504 phba->sli4_hba.link_state.logical_speed,
70f3c073 4505 phba->sli4_hba.link_state.fault);
76a95d75
JS		 4506 /*
4507 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch
4508 * topology info. Note: Optional for non FC-AL ports.
4509 */
4510 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
4511 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4512 if (rc == MBX_NOT_FINISHED)
4513 goto out_free_dmabuf;
4514 return;
4515 }
4516 /*
4517 * For FCoE Mode: fill in all the topology information we need and call
4518 * the READ_TOPOLOGY completion routine to continue without actually
4519 * sending the READ_TOPOLOGY mailbox command to the port.
4520 */
4521 /* Parse and translate status field */
4522 mb = &pmb->u.mb;
4523 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba, acqe_link);
4524
4525 /* Parse and translate link attention fields */
4526 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop;
4527 la->eventTag = acqe_link->event_tag;
4528 bf_set(lpfc_mbx_read_top_att_type, la, att_type);
4529 bf_set(lpfc_mbx_read_top_link_spd, la,
a085e87c 4530 (bf_get(lpfc_acqe_link_speed, acqe_link)));
76a95d75
JS		 4531
4532 /* Fake the the following irrelvant fields */
4533 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT);
4534 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0);
4535 bf_set(lpfc_mbx_read_top_il, la, 0);
4536 bf_set(lpfc_mbx_read_top_pb, la, 0);
4537 bf_set(lpfc_mbx_read_top_fa, la, 0);
4538 bf_set(lpfc_mbx_read_top_mm, la, 0);
da0436e9
JS		 4539
4540 /* Invoke the lpfc_handle_latt mailbox command callback function */
76a95d75 4541 lpfc_mbx_cmpl_read_topology(phba, pmb);
da0436e9 4542
5b75da2f 4543 return;
da0436e9
JS		 4544
4545out_free_dmabuf:
4546 kfree(mp);
4547out_free_pmb:
4548 mempool_free(pmb, phba->mbox_mem_pool);
4549}
4550
70f3c073
JS		 4551/**
4552 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event
4553 * @phba: pointer to lpfc hba data structure.
4554 * @acqe_fc: pointer to the async fc completion queue entry.
4555 *
4556 * This routine is to handle the SLI4 asynchronous FC event. It will simply log
4557 * that the event was received and then issue a read_topology mailbox command so
4558 * that the rest of the driver will treat it the same as SLI3.
4559 **/
4560static void
4561lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc)
4562{
4563 struct lpfc_dmabuf *mp;
4564 LPFC_MBOXQ_t *pmb;
7bdedb34
JS		 4565 MAILBOX_t *mb;
4566 struct lpfc_mbx_read_top *la;
70f3c073
JS		 4567 int rc;
4568
4569 if (bf_get(lpfc_trailer_type, acqe_fc) !=
4570 LPFC_FC_LA_EVENT_TYPE_FC_LINK) {
4571 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4572 "2895 Non FC link Event detected.(%d)\n",
4573 bf_get(lpfc_trailer_type, acqe_fc));
4574 return;
4575 }
4576 /* Keep the link status for extra SLI4 state machine reference */
4577 phba->sli4_hba.link_state.speed =
8b68cd52
JS		 4578 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
4579 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
70f3c073
JS		 4580 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
4581 phba->sli4_hba.link_state.topology =
4582 bf_get(lpfc_acqe_fc_la_topology, acqe_fc);
4583 phba->sli4_hba.link_state.status =
4584 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc);
4585 phba->sli4_hba.link_state.type =
4586 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc);
4587 phba->sli4_hba.link_state.number =
4588 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc);
4589 phba->sli4_hba.link_state.fault =
4590 bf_get(lpfc_acqe_link_fault, acqe_fc);
4591 phba->sli4_hba.link_state.logical_speed =
8b68cd52 4592 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
70f3c073
JS		 4593 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4594 "2896 Async FC event - Speed:%dGBaud Topology:x%x "
4595 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:"
4596 "%dMbps Fault:%d\n",
4597 phba->sli4_hba.link_state.speed,
4598 phba->sli4_hba.link_state.topology,
4599 phba->sli4_hba.link_state.status,
4600 phba->sli4_hba.link_state.type,
4601 phba->sli4_hba.link_state.number,
8b68cd52 4602 phba->sli4_hba.link_state.logical_speed,
70f3c073
JS		 4603 phba->sli4_hba.link_state.fault);
4604 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4605 if (!pmb) {
4606 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4607 "2897 The mboxq allocation failed\n");
4608 return;
4609 }
4610 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4611 if (!mp) {
4612 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4613 "2898 The lpfc_dmabuf allocation failed\n");
4614 goto out_free_pmb;
4615 }
4616 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4617 if (!mp->virt) {
4618 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4619 "2899 The mbuf allocation failed\n");
4620 goto out_free_dmabuf;
4621 }
4622
4623 /* Cleanup any outstanding ELS commands */
4624 lpfc_els_flush_all_cmd(phba);
4625
4626 /* Block ELS IOCBs until we have done process link event */
895427bd 4627 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
70f3c073
JS		 4628
4629 /* Update link event statistics */
4630 phba->sli.slistat.link_event++;
4631
4632 /* Create lpfc_handle_latt mailbox command from link ACQE */
4633 lpfc_read_topology(phba, pmb, mp);
4634 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
4635 pmb->vport = phba->pport;
4636
7bdedb34 4637 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
ae9e28f3
JS		 4638 phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK);
4639
4640 switch (phba->sli4_hba.link_state.status) {
4641 case LPFC_FC_LA_TYPE_MDS_LINK_DOWN:
4642 phba->link_flag |= LS_MDS_LINK_DOWN;
4643 break;
4644 case LPFC_FC_LA_TYPE_MDS_LOOPBACK:
4645 phba->link_flag |= LS_MDS_LOOPBACK;
4646 break;
4647 default:
4648 break;
4649 }
4650
7bdedb34
JS		 4651 /* Parse and translate status field */
4652 mb = &pmb->u.mb;
4653 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba,
4654 (void *)acqe_fc);
4655
4656 /* Parse and translate link attention fields */
4657 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop;
4658 la->eventTag = acqe_fc->event_tag;
7bdedb34 4659
aeb3c817
JS		 4660 if (phba->sli4_hba.link_state.status ==
4661 LPFC_FC_LA_TYPE_UNEXP_WWPN) {
4662 bf_set(lpfc_mbx_read_top_att_type, la,
4663 LPFC_FC_LA_TYPE_UNEXP_WWPN);
4664 } else {
4665 bf_set(lpfc_mbx_read_top_att_type, la,
4666 LPFC_FC_LA_TYPE_LINK_DOWN);
4667 }
7bdedb34
JS		 4668 /* Invoke the mailbox command callback function */
4669 lpfc_mbx_cmpl_read_topology(phba, pmb);
4670
4671 return;
4672 }
4673
70f3c073
JS		 4674 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4675 if (rc == MBX_NOT_FINISHED)
4676 goto out_free_dmabuf;
4677 return;
4678
4679out_free_dmabuf:
4680 kfree(mp);
4681out_free_pmb:
4682 mempool_free(pmb, phba->mbox_mem_pool);
4683}
4684
4685/**
4686 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event
4687 * @phba: pointer to lpfc hba data structure.
4688 * @acqe_fc: pointer to the async SLI completion queue entry.
4689 *
4690 * This routine is to handle the SLI4 asynchronous SLI events.
4691 **/
4692static void
4693lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
4694{
4b8bae08 4695 char port_name;
8c1312e1 4696 char message[128];
4b8bae08 4697 uint8_t status;
946727dc 4698 uint8_t evt_type;
448193b5 4699 uint8_t operational = 0;
946727dc 4700 struct temp_event temp_event_data;
4b8bae08 4701 struct lpfc_acqe_misconfigured_event *misconfigured;
946727dc
JS		 4702 struct Scsi_Host *shost;
4703
4704 evt_type = bf_get(lpfc_trailer_type, acqe_sli);
4b8bae08 4705
448193b5
JS		 4706 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4707 "2901 Async SLI event - Event Data1:x%08x Event Data2:"
4708 "x%08x SLI Event Type:%d\n",
4709 acqe_sli->event_data1, acqe_sli->event_data2,
4710 evt_type);
4b8bae08
JS		 4711
4712 port_name = phba->Port[0];
4713 if (port_name == 0x00)
4714 port_name = '?'; /* get port name is empty */
4715
946727dc
JS		 4716 switch (evt_type) {
4717 case LPFC_SLI_EVENT_TYPE_OVER_TEMP:
4718 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4719 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
4720 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4721
4722 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
4723 "3190 Over Temperature:%d Celsius- Port Name %c\n",
4724 acqe_sli->event_data1, port_name);
4725
310429ef 4726 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS		 4727 shost = lpfc_shost_from_vport(phba->pport);
4728 fc_host_post_vendor_event(shost, fc_get_event_number(),
4729 sizeof(temp_event_data),
4730 (char *)&temp_event_data,
4731 SCSI_NL_VID_TYPE_PCI
4732 | PCI_VENDOR_ID_EMULEX);
4733 break;
4734 case LPFC_SLI_EVENT_TYPE_NORM_TEMP:
4735 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4736 temp_event_data.event_code = LPFC_NORMAL_TEMP;
4737 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4738
4739 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4740 "3191 Normal Temperature:%d Celsius - Port Name %c\n",
4741 acqe_sli->event_data1, port_name);
4742
4743 shost = lpfc_shost_from_vport(phba->pport);
4744 fc_host_post_vendor_event(shost, fc_get_event_number(),
4745 sizeof(temp_event_data),
4746 (char *)&temp_event_data,
4747 SCSI_NL_VID_TYPE_PCI
4748 | PCI_VENDOR_ID_EMULEX);
4749 break;
4750 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED:
4751 misconfigured = (struct lpfc_acqe_misconfigured_event *)
4b8bae08
JS		 4752 &acqe_sli->event_data1;
4753
946727dc
JS		 4754 /* fetch the status for this port */
4755 switch (phba->sli4_hba.lnk_info.lnk_no) {
4756 case LPFC_LINK_NUMBER_0:
448193b5
JS		 4757 status = bf_get(lpfc_sli_misconfigured_port0_state,
4758 &misconfigured->theEvent);
4759 operational = bf_get(lpfc_sli_misconfigured_port0_op,
4b8bae08 4760 &misconfigured->theEvent);
946727dc
JS		 4761 break;
4762 case LPFC_LINK_NUMBER_1:
448193b5
JS		 4763 status = bf_get(lpfc_sli_misconfigured_port1_state,
4764 &misconfigured->theEvent);
4765 operational = bf_get(lpfc_sli_misconfigured_port1_op,
4b8bae08 4766 &misconfigured->theEvent);
946727dc
JS		 4767 break;
4768 case LPFC_LINK_NUMBER_2:
448193b5
JS		 4769 status = bf_get(lpfc_sli_misconfigured_port2_state,
4770 &misconfigured->theEvent);
4771 operational = bf_get(lpfc_sli_misconfigured_port2_op,
4b8bae08 4772 &misconfigured->theEvent);
946727dc
JS		 4773 break;
4774 case LPFC_LINK_NUMBER_3:
448193b5
JS		 4775 status = bf_get(lpfc_sli_misconfigured_port3_state,
4776 &misconfigured->theEvent);
4777 operational = bf_get(lpfc_sli_misconfigured_port3_op,
4b8bae08 4778 &misconfigured->theEvent);
946727dc
JS		 4779 break;
4780 default:
448193b5
JS		 4781 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4782 "3296 "
4783 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED "
4784 "event: Invalid link %d",
4785 phba->sli4_hba.lnk_info.lnk_no);
4786 return;
946727dc 4787 }
4b8bae08 4788
448193b5
JS		 4789 /* Skip if optic state unchanged */
4790 if (phba->sli4_hba.lnk_info.optic_state == status)
4791 return;
4792
946727dc
JS		 4793 switch (status) {
4794 case LPFC_SLI_EVENT_STATUS_VALID:
448193b5
JS		 4795 sprintf(message, "Physical Link is functional");
4796 break;
946727dc
JS		 4797 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT:
4798 sprintf(message, "Optics faulted/incorrectly "
4799 "installed/not installed - Reseat optics, "
4800 "if issue not resolved, replace.");
4801 break;
4802 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE:
4803 sprintf(message,
4804 "Optics of two types installed - Remove one "
4805 "optic or install matching pair of optics.");
4806 break;
4807 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED:
4808 sprintf(message, "Incompatible optics - Replace with "
292098be 4809 "compatible optics for card to function.");
946727dc 4810 break;
448193b5
JS		 4811 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED:
4812 sprintf(message, "Unqualified optics - Replace with "
4813 "Avago optics for Warranty and Technical "
4814 "Support - Link is%s operational",
2ea259ee 4815 (operational) ? " not" : "");
448193b5
JS		 4816 break;
4817 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED:
4818 sprintf(message, "Uncertified optics - Replace with "
4819 "Avago-certified optics to enable link "
4820 "operation - Link is%s operational",
2ea259ee 4821 (operational) ? " not" : "");
448193b5 4822 break;
946727dc
JS		 4823 default:
4824 /* firmware is reporting a status we don't know about */
4825 sprintf(message, "Unknown event status x%02x", status);
4826 break;
4827 }
448193b5 4828 phba->sli4_hba.lnk_info.optic_state = status;
946727dc 4829 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
448193b5 4830 "3176 Port Name %c %s\n", port_name, message);
946727dc
JS		 4831 break;
4832 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT:
4833 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4834 "3192 Remote DPort Test Initiated - "
4835 "Event Data1:x%08x Event Data2: x%08x\n",
4836 acqe_sli->event_data1, acqe_sli->event_data2);
4b8bae08
JS		 4837 break;
4838 default:
946727dc
JS		 4839 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4840 "3193 Async SLI event - Event Data1:x%08x Event Data2:"
4841 "x%08x SLI Event Type:%d\n",
4842 acqe_sli->event_data1, acqe_sli->event_data2,
4843 evt_type);
4b8bae08
JS		 4844 break;
4845 }
70f3c073
JS		 4846}
4847
fc2b989b
JS		 4848/**
4849 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport
4850 * @vport: pointer to vport data structure.
4851 *
4852 * This routine is to perform Clear Virtual Link (CVL) on a vport in
4853 * response to a CVL event.
4854 *
4855 * Return the pointer to the ndlp with the vport if successful, otherwise
4856 * return NULL.
4857 **/
4858static struct lpfc_nodelist *
4859lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport)
4860{
4861 struct lpfc_nodelist *ndlp;
4862 struct Scsi_Host *shost;
4863 struct lpfc_hba *phba;
4864
4865 if (!vport)
4866 return NULL;
fc2b989b
JS		 4867 phba = vport->phba;
4868 if (!phba)
4869 return NULL;
78730cfe
JS		 4870 ndlp = lpfc_findnode_did(vport, Fabric_DID);
4871 if (!ndlp) {
4872 /* Cannot find existing Fabric ndlp, so allocate a new one */
9d3d340d 4873 ndlp = lpfc_nlp_init(vport, Fabric_DID);
78730cfe
JS		 4874 if (!ndlp)
4875 return 0;
78730cfe
JS		 4876 /* Set the node type */
4877 ndlp->nlp_type |= NLP_FABRIC;
4878 /* Put ndlp onto node list */
4879 lpfc_enqueue_node(vport, ndlp);
4880 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
4881 /* re-setup ndlp without removing from node list */
4882 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
4883 if (!ndlp)
4884 return 0;
4885 }
63e801ce
JS		 4886 if ((phba->pport->port_state < LPFC_FLOGI) &&
4887 (phba->pport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS		 4888 return NULL;
4889 /* If virtual link is not yet instantiated ignore CVL */
63e801ce
JS		 4890 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)
4891 && (vport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS		 4892 return NULL;
4893 shost = lpfc_shost_from_vport(vport);
4894 if (!shost)
4895 return NULL;
4896 lpfc_linkdown_port(vport);
4897 lpfc_cleanup_pending_mbox(vport);
4898 spin_lock_irq(shost->host_lock);
4899 vport->fc_flag |= FC_VPORT_CVL_RCVD;
4900 spin_unlock_irq(shost->host_lock);
4901
4902 return ndlp;
4903}
4904
4905/**
4906 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports
4907 * @vport: pointer to lpfc hba data structure.
4908 *
4909 * This routine is to perform Clear Virtual Link (CVL) on all vports in
4910 * response to a FCF dead event.
4911 **/
4912static void
4913lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba)
4914{
4915 struct lpfc_vport **vports;
4916 int i;
4917
4918 vports = lpfc_create_vport_work_array(phba);
4919 if (vports)
4920 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
4921 lpfc_sli4_perform_vport_cvl(vports[i]);
4922 lpfc_destroy_vport_work_array(phba, vports);
4923}
4924
da0436e9 4925/**
76a95d75 4926 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event
da0436e9
JS		 4927 * @phba: pointer to lpfc hba data structure.
4928 * @acqe_link: pointer to the async fcoe completion queue entry.
4929 *
4930 * This routine is to handle the SLI4 asynchronous fcoe event.
4931 **/
4932static void
76a95d75 4933lpfc_sli4_async_fip_evt(struct lpfc_hba *phba,
70f3c073 4934 struct lpfc_acqe_fip *acqe_fip)
da0436e9 4935{
70f3c073 4936 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
da0436e9 4937 int rc;
6669f9bb
JS		 4938 struct lpfc_vport *vport;
4939 struct lpfc_nodelist *ndlp;
4940 struct Scsi_Host *shost;
695a814e
JS		 4941 int active_vlink_present;
4942 struct lpfc_vport **vports;
4943 int i;
da0436e9 4944
70f3c073
JS		 4945 phba->fc_eventTag = acqe_fip->event_tag;
4946 phba->fcoe_eventtag = acqe_fip->event_tag;
da0436e9 4947 switch (event_type) {
70f3c073
JS		 4948 case LPFC_FIP_EVENT_TYPE_NEW_FCF:
4949 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD:
4950 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF)
999d813f
JS		 4951 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4952 LOG_DISCOVERY,
a93ff37a
JS		 4953 "2546 New FCF event, evt_tag:x%x, "
4954 "index:x%x\n",
70f3c073
JS		 4955 acqe_fip->event_tag,
4956 acqe_fip->index);
999d813f
JS		 4957 else
4958 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP |
4959 LOG_DISCOVERY,
a93ff37a
JS		 4960 "2788 FCF param modified event, "
4961 "evt_tag:x%x, index:x%x\n",
70f3c073
JS		 4962 acqe_fip->event_tag,
4963 acqe_fip->index);
38b92ef8 4964 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
0c9ab6f5
JS		 4965 /*
4966 * During period of FCF discovery, read the FCF
4967 * table record indexed by the event to update
a93ff37a 4968 * FCF roundrobin failover eligible FCF bmask.
0c9ab6f5
JS		 4969 */
4970 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
4971 LOG_DISCOVERY,
a93ff37a
JS		 4972 "2779 Read FCF (x%x) for updating "
4973 "roundrobin FCF failover bmask\n",
70f3c073
JS		 4974 acqe_fip->index);
4975 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index);
0c9ab6f5 4976 }
38b92ef8
JS		 4977
4978 /* If the FCF discovery is in progress, do nothing. */
3804dc84 4979 spin_lock_irq(&phba->hbalock);
a93ff37a 4980 if (phba->hba_flag & FCF_TS_INPROG) {
38b92ef8
JS		 4981 spin_unlock_irq(&phba->hbalock);
4982 break;
4983 }
4984 /* If fast FCF failover rescan event is pending, do nothing */
4985 if (phba->fcf.fcf_flag & FCF_REDISC_EVT) {
4986 spin_unlock_irq(&phba->hbalock);
4987 break;
4988 }
4989
c2b9712e
JS		 4990 /* If the FCF has been in discovered state, do nothing. */
4991 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) {
3804dc84
JS		 4992 spin_unlock_irq(&phba->hbalock);
4993 break;
4994 }
4995 spin_unlock_irq(&phba->hbalock);
38b92ef8 4996
0c9ab6f5
JS		 4997 /* Otherwise, scan the entire FCF table and re-discover SAN */
4998 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a
JS		 4999 "2770 Start FCF table scan per async FCF "
5000 "event, evt_tag:x%x, index:x%x\n",
70f3c073 5001 acqe_fip->event_tag, acqe_fip->index);
0c9ab6f5
JS		 5002 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba,
5003 LPFC_FCOE_FCF_GET_FIRST);
da0436e9 5004 if (rc)
0c9ab6f5
JS		 5005 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5006 "2547 Issue FCF scan read FCF mailbox "
a93ff37a 5007 "command failed (x%x)\n", rc);
da0436e9
JS		 5008 break;
5009
70f3c073 5010 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL:
da0436e9 5011 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e4e74273 5012 "2548 FCF Table full count 0x%x tag 0x%x\n",
70f3c073
JS		 5013 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip),
5014 acqe_fip->event_tag);
da0436e9
JS		 5015 break;
5016
70f3c073 5017 case LPFC_FIP_EVENT_TYPE_FCF_DEAD:
80c17849 5018 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 5019 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
a93ff37a 5020 "2549 FCF (x%x) disconnected from network, "
70f3c073 5021 "tag:x%x\n", acqe_fip->index, acqe_fip->event_tag);
38b92ef8
JS		 5022 /*
5023 * If we are in the middle of FCF failover process, clear
5024 * the corresponding FCF bit in the roundrobin bitmap.
da0436e9 5025 */
fc2b989b 5026 spin_lock_irq(&phba->hbalock);
a1cadfef
JS		 5027 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) &&
5028 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) {
fc2b989b 5029 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 5030 /* Update FLOGI FCF failover eligible FCF bmask */
70f3c073 5031 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index);
fc2b989b
JS		 5032 break;
5033 }
38b92ef8
JS		 5034 spin_unlock_irq(&phba->hbalock);
5035
5036 /* If the event is not for currently used fcf do nothing */
70f3c073 5037 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index)
38b92ef8
JS		 5038 break;
5039
5040 /*
5041 * Otherwise, request the port to rediscover the entire FCF
5042 * table for a fast recovery from case that the current FCF
5043 * is no longer valid as we are not in the middle of FCF
5044 * failover process already.
5045 */
c2b9712e
JS		 5046 spin_lock_irq(&phba->hbalock);
5047 /* Mark the fast failover process in progress */
5048 phba->fcf.fcf_flag |= FCF_DEAD_DISC;
5049 spin_unlock_irq(&phba->hbalock);
5050
5051 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
5052 "2771 Start FCF fast failover process due to "
5053 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x "
5054 "\n", acqe_fip->event_tag, acqe_fip->index);
5055 rc = lpfc_sli4_redisc_fcf_table(phba);
5056 if (rc) {
5057 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
5058 LOG_DISCOVERY,
5059 "2772 Issue FCF rediscover mabilbox "
5060 "command failed, fail through to FCF "
5061 "dead event\n");
5062 spin_lock_irq(&phba->hbalock);
5063 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
5064 spin_unlock_irq(&phba->hbalock);
5065 /*
5066 * Last resort will fail over by treating this
5067 * as a link down to FCF registration.
5068 */
5069 lpfc_sli4_fcf_dead_failthrough(phba);
5070 } else {
5071 /* Reset FCF roundrobin bmask for new discovery */
5072 lpfc_sli4_clear_fcf_rr_bmask(phba);
5073 /*
5074 * Handling fast FCF failover to a DEAD FCF event is
5075 * considered equalivant to receiving CVL to all vports.
5076 */
5077 lpfc_sli4_perform_all_vport_cvl(phba);
5078 }
da0436e9 5079 break;
70f3c073 5080 case LPFC_FIP_EVENT_TYPE_CVL:
80c17849 5081 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 5082 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
6669f9bb 5083 "2718 Clear Virtual Link Received for VPI 0x%x"
70f3c073 5084 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag);
6d368e53 5085
6669f9bb 5086 vport = lpfc_find_vport_by_vpid(phba,
5248a749 5087 acqe_fip->index);
fc2b989b 5088 ndlp = lpfc_sli4_perform_vport_cvl(vport);
6669f9bb
JS		 5089 if (!ndlp)
5090 break;
695a814e
JS		 5091 active_vlink_present = 0;
5092
5093 vports = lpfc_create_vport_work_array(phba);
5094 if (vports) {
5095 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
5096 i++) {
5097 if ((!(vports[i]->fc_flag &
5098 FC_VPORT_CVL_RCVD)) &&
5099 (vports[i]->port_state > LPFC_FDISC)) {
5100 active_vlink_present = 1;
5101 break;
5102 }
5103 }
5104 lpfc_destroy_vport_work_array(phba, vports);
5105 }
5106
cc82355a
JS		 5107 /*
5108 * Don't re-instantiate if vport is marked for deletion.
5109 * If we are here first then vport_delete is going to wait
5110 * for discovery to complete.
5111 */
5112 if (!(vport->load_flag & FC_UNLOADING) &&
5113 active_vlink_present) {
695a814e
JS		 5114 /*
5115 * If there are other active VLinks present,
5116 * re-instantiate the Vlink using FDISC.
5117 */
256ec0d0
JS		 5118 mod_timer(&ndlp->nlp_delayfunc,
5119 jiffies + msecs_to_jiffies(1000));
fc2b989b 5120 shost = lpfc_shost_from_vport(vport);
6669f9bb
JS		 5121 spin_lock_irq(shost->host_lock);
5122 ndlp->nlp_flag |= NLP_DELAY_TMO;
5123 spin_unlock_irq(shost->host_lock);
695a814e
JS		 5124 ndlp->nlp_last_elscmd = ELS_CMD_FDISC;
5125 vport->port_state = LPFC_FDISC;
5126 } else {
ecfd03c6
JS		 5127 /*
5128 * Otherwise, we request port to rediscover
5129 * the entire FCF table for a fast recovery
5130 * from possible case that the current FCF
0c9ab6f5
JS		 5131 * is no longer valid if we are not already
5132 * in the FCF failover process.
ecfd03c6 5133 */
fc2b989b 5134 spin_lock_irq(&phba->hbalock);
0c9ab6f5 5135 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
fc2b989b
JS		 5136 spin_unlock_irq(&phba->hbalock);
5137 break;
5138 }
5139 /* Mark the fast failover process in progress */
0c9ab6f5 5140 phba->fcf.fcf_flag |= FCF_ACVL_DISC;
fc2b989b 5141 spin_unlock_irq(&phba->hbalock);
0c9ab6f5
JS		 5142 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
5143 LOG_DISCOVERY,
a93ff37a 5144 "2773 Start FCF failover per CVL, "
70f3c073 5145 "evt_tag:x%x\n", acqe_fip->event_tag);
ecfd03c6 5146 rc = lpfc_sli4_redisc_fcf_table(phba);
fc2b989b 5147 if (rc) {
0c9ab6f5
JS		 5148 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
5149 LOG_DISCOVERY,
5150 "2774 Issue FCF rediscover "
5151 "mabilbox command failed, "
5152 "through to CVL event\n");
fc2b989b 5153 spin_lock_irq(&phba->hbalock);
0c9ab6f5 5154 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
fc2b989b 5155 spin_unlock_irq(&phba->hbalock);
ecfd03c6
JS		 5156 /*
5157 * Last resort will be re-try on the
5158 * the current registered FCF entry.
5159 */
5160 lpfc_retry_pport_discovery(phba);
38b92ef8
JS		 5161 } else
5162 /*
5163 * Reset FCF roundrobin bmask for new
5164 * discovery.
5165 */
7d791df7 5166 lpfc_sli4_clear_fcf_rr_bmask(phba);
6669f9bb
JS		 5167 }
5168 break;
da0436e9
JS		 5169 default:
5170 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5171 "0288 Unknown FCoE event type 0x%x event tag "
70f3c073 5172 "0x%x\n", event_type, acqe_fip->event_tag);
da0436e9
JS		 5173 break;
5174 }
5175}
5176
5177/**
5178 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event
5179 * @phba: pointer to lpfc hba data structure.
5180 * @acqe_link: pointer to the async dcbx completion queue entry.
5181 *
5182 * This routine is to handle the SLI4 asynchronous dcbx event.
5183 **/
5184static void
5185lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba,
5186 struct lpfc_acqe_dcbx *acqe_dcbx)
5187{
4d9ab994 5188 phba->fc_eventTag = acqe_dcbx->event_tag;
da0436e9
JS		 5189 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5190 "0290 The SLI4 DCBX asynchronous event is not "
5191 "handled yet\n");
5192}
5193
b19a061a
JS		 5194/**
5195 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event
5196 * @phba: pointer to lpfc hba data structure.
5197 * @acqe_link: pointer to the async grp5 completion queue entry.
5198 *
5199 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event
5200 * is an asynchronous notified of a logical link speed change. The Port
5201 * reports the logical link speed in units of 10Mbps.
5202 **/
5203static void
5204lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba,
5205 struct lpfc_acqe_grp5 *acqe_grp5)
5206{
5207 uint16_t prev_ll_spd;
5208
5209 phba->fc_eventTag = acqe_grp5->event_tag;
5210 phba->fcoe_eventtag = acqe_grp5->event_tag;
5211 prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
5212 phba->sli4_hba.link_state.logical_speed =
8b68cd52 5213 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10;
b19a061a
JS		 5214 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5215 "2789 GRP5 Async Event: Updating logical link speed "
8b68cd52
JS		 5216 "from %dMbps to %dMbps\n", prev_ll_spd,
5217 phba->sli4_hba.link_state.logical_speed);
b19a061a
JS		 5218}
5219
da0436e9
JS		 5220/**
5221 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event
5222 * @phba: pointer to lpfc hba data structure.
5223 *
5224 * This routine is invoked by the worker thread to process all the pending
5225 * SLI4 asynchronous events.
5226 **/
5227void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
5228{
5229 struct lpfc_cq_event *cq_event;
5230
5231 /* First, declare the async event has been handled */
5232 spin_lock_irq(&phba->hbalock);
5233 phba->hba_flag &= ~ASYNC_EVENT;
5234 spin_unlock_irq(&phba->hbalock);
5235 /* Now, handle all the async events */
5236 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
5237 /* Get the first event from the head of the event queue */
5238 spin_lock_irq(&phba->hbalock);
5239 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
5240 cq_event, struct lpfc_cq_event, list);
5241 spin_unlock_irq(&phba->hbalock);
5242 /* Process the asynchronous event */
5243 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) {
5244 case LPFC_TRAILER_CODE_LINK:
5245 lpfc_sli4_async_link_evt(phba,
5246 &cq_event->cqe.acqe_link);
5247 break;
5248 case LPFC_TRAILER_CODE_FCOE:
70f3c073 5249 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip);
da0436e9
JS		 5250 break;
5251 case LPFC_TRAILER_CODE_DCBX:
5252 lpfc_sli4_async_dcbx_evt(phba,
5253 &cq_event->cqe.acqe_dcbx);
5254 break;
b19a061a
JS		 5255 case LPFC_TRAILER_CODE_GRP5:
5256 lpfc_sli4_async_grp5_evt(phba,
5257 &cq_event->cqe.acqe_grp5);
5258 break;
70f3c073
JS		 5259 case LPFC_TRAILER_CODE_FC:
5260 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc);
5261 break;
5262 case LPFC_TRAILER_CODE_SLI:
5263 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli);
5264 break;
da0436e9
JS		 5265 default:
5266 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5267 "1804 Invalid asynchrous event code: "
5268 "x%x\n", bf_get(lpfc_trailer_code,
5269 &cq_event->cqe.mcqe_cmpl));
5270 break;
5271 }
5272 /* Free the completion event processed to the free pool */
5273 lpfc_sli4_cq_event_release(phba, cq_event);
5274 }
5275}
5276
ecfd03c6
JS		 5277/**
5278 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event
5279 * @phba: pointer to lpfc hba data structure.
5280 *
5281 * This routine is invoked by the worker thread to process FCF table
5282 * rediscovery pending completion event.
5283 **/
5284void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba)
5285{
5286 int rc;
5287
5288 spin_lock_irq(&phba->hbalock);
5289 /* Clear FCF rediscovery timeout event */
5290 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT;
5291 /* Clear driver fast failover FCF record flag */
5292 phba->fcf.failover_rec.flag = 0;
5293 /* Set state for FCF fast failover */
5294 phba->fcf.fcf_flag |= FCF_REDISC_FOV;
5295 spin_unlock_irq(&phba->hbalock);
5296
5297 /* Scan FCF table from the first entry to re-discover SAN */
0c9ab6f5 5298 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a 5299 "2777 Start post-quiescent FCF table scan\n");
0c9ab6f5 5300 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST);
ecfd03c6 5301 if (rc)
0c9ab6f5
JS		 5302 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5303 "2747 Issue FCF scan read FCF mailbox "
5304 "command failed 0x%x\n", rc);
ecfd03c6
JS		 5305}
5306
da0436e9
JS		 5307/**
5308 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table
5309 * @phba: pointer to lpfc hba data structure.
5310 * @dev_grp: The HBA PCI-Device group number.
5311 *
5312 * This routine is invoked to set up the per HBA PCI-Device group function
5313 * API jump table entries.
5314 *
5315 * Return: 0 if success, otherwise -ENODEV
5316 **/
5317int
5318lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
5319{
5320 int rc;
5321
5322 /* Set up lpfc PCI-device group */
5323 phba->pci_dev_grp = dev_grp;
5324
5325 /* The LPFC_PCI_DEV_OC uses SLI4 */
5326 if (dev_grp == LPFC_PCI_DEV_OC)
5327 phba->sli_rev = LPFC_SLI_REV4;
5328
5329 /* Set up device INIT API function jump table */
5330 rc = lpfc_init_api_table_setup(phba, dev_grp);
5331 if (rc)
5332 return -ENODEV;
5333 /* Set up SCSI API function jump table */
5334 rc = lpfc_scsi_api_table_setup(phba, dev_grp);
5335 if (rc)
5336 return -ENODEV;
5337 /* Set up SLI API function jump table */
5338 rc = lpfc_sli_api_table_setup(phba, dev_grp);
5339 if (rc)
5340 return -ENODEV;
5341 /* Set up MBOX API function jump table */
5342 rc = lpfc_mbox_api_table_setup(phba, dev_grp);
5343 if (rc)
5344 return -ENODEV;
5345
5346 return 0;
5b75da2f
JS		 5347}
5348
5349/**
3621a710 5350 * lpfc_log_intr_mode - Log the active interrupt mode
5b75da2f
JS		 5351 * @phba: pointer to lpfc hba data structure.
5352 * @intr_mode: active interrupt mode adopted.
5353 *
5354 * This routine it invoked to log the currently used active interrupt mode
5355 * to the device.
3772a991
JS		 5356 **/
5357static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode)
5b75da2f
JS		 5358{
5359 switch (intr_mode) {
5360 case 0:
5361 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5362 "0470 Enable INTx interrupt mode.\n");
5363 break;
5364 case 1:
5365 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5366 "0481 Enabled MSI interrupt mode.\n");
5367 break;
5368 case 2:
5369 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5370 "0480 Enabled MSI-X interrupt mode.\n");
5371 break;
5372 default:
5373 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5374 "0482 Illegal interrupt mode.\n");
5375 break;
5376 }
5377 return;
5378}
5379
5b75da2f 5380/**
3772a991 5381 * lpfc_enable_pci_dev - Enable a generic PCI device.
5b75da2f
JS		 5382 * @phba: pointer to lpfc hba data structure.
5383 *
3772a991
JS		 5384 * This routine is invoked to enable the PCI device that is common to all
5385 * PCI devices.
5b75da2f
JS		 5386 *
5387 * Return codes
af901ca1 5388 * 0 - successful
3772a991 5389 * other values - error
5b75da2f 5390 **/
3772a991
JS		 5391static int
5392lpfc_enable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5393{
3772a991 5394 struct pci_dev *pdev;
5b75da2f 5395
3772a991
JS		 5396 /* Obtain PCI device reference */
5397 if (!phba->pcidev)
5398 goto out_error;
5399 else
5400 pdev = phba->pcidev;
3772a991
JS		 5401 /* Enable PCI device */
5402 if (pci_enable_device_mem(pdev))
5403 goto out_error;
5404 /* Request PCI resource for the device */
e0c0483c 5405 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME))
3772a991
JS		 5406 goto out_disable_device;
5407 /* Set up device as PCI master and save state for EEH */
5408 pci_set_master(pdev);
5409 pci_try_set_mwi(pdev);
5410 pci_save_state(pdev);
5b75da2f 5411
0558056c 5412 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */
453193e0 5413 if (pci_is_pcie(pdev))
0558056c
JS		 5414 pdev->needs_freset = 1;
5415
3772a991 5416 return 0;
5b75da2f 5417
3772a991
JS		 5418out_disable_device:
5419 pci_disable_device(pdev);
5420out_error:
079b5c91 5421 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e0c0483c 5422 "1401 Failed to enable pci device\n");
3772a991 5423 return -ENODEV;
5b75da2f
JS		 5424}
5425
5426/**
3772a991 5427 * lpfc_disable_pci_dev - Disable a generic PCI device.
5b75da2f
JS		 5428 * @phba: pointer to lpfc hba data structure.
5429 *
3772a991
JS		 5430 * This routine is invoked to disable the PCI device that is common to all
5431 * PCI devices.
5b75da2f
JS		 5432 **/
5433static void
3772a991 5434lpfc_disable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5435{
3772a991 5436 struct pci_dev *pdev;
5b75da2f 5437
3772a991
JS		 5438 /* Obtain PCI device reference */
5439 if (!phba->pcidev)
5440 return;
5441 else
5442 pdev = phba->pcidev;
3772a991 5443 /* Release PCI resource and disable PCI device */
e0c0483c 5444 pci_release_mem_regions(pdev);
3772a991 5445 pci_disable_device(pdev);
5b75da2f
JS		 5446
5447 return;
5448}
5449
e59058c4 5450/**
3772a991
JS		 5451 * lpfc_reset_hba - Reset a hba
5452 * @phba: pointer to lpfc hba data structure.
e59058c4 5453 *
3772a991
JS		 5454 * This routine is invoked to reset a hba device. It brings the HBA
5455 * offline, performs a board restart, and then brings the board back
5456 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up
5457 * on outstanding mailbox commands.
e59058c4 5458 **/
3772a991
JS		 5459void
5460lpfc_reset_hba(struct lpfc_hba *phba)
dea3101e 5461{
3772a991
JS		 5462 /* If resets are disabled then set error state and return. */
5463 if (!phba->cfg_enable_hba_reset) {
5464 phba->link_state = LPFC_HBA_ERROR;
5465 return;
5466 }
ee62021a
JS		 5467 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
5468 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
5469 else
5470 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
3772a991
JS		 5471 lpfc_offline(phba);
5472 lpfc_sli_brdrestart(phba);
5473 lpfc_online(phba);
5474 lpfc_unblock_mgmt_io(phba);
5475}
dea3101e 5476
0a96e975
JS		 5477/**
5478 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions
5479 * @phba: pointer to lpfc hba data structure.
5480 *
5481 * This function enables the PCI SR-IOV virtual functions to a physical
5482 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5483 * enable the number of virtual functions to the physical function. As
5484 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5485 * API call does not considered as an error condition for most of the device.
5486 **/
5487uint16_t
5488lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba)
5489{
5490 struct pci_dev *pdev = phba->pcidev;
5491 uint16_t nr_virtfn;
5492 int pos;
5493
0a96e975
JS		 5494 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
5495 if (pos == 0)
5496 return 0;
5497
5498 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn);
5499 return nr_virtfn;
5500}
5501
912e3acd
JS		 5502/**
5503 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions
5504 * @phba: pointer to lpfc hba data structure.
5505 * @nr_vfn: number of virtual functions to be enabled.
5506 *
5507 * This function enables the PCI SR-IOV virtual functions to a physical
5508 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5509 * enable the number of virtual functions to the physical function. As
5510 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5511 * API call does not considered as an error condition for most of the device.
5512 **/
5513int
5514lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn)
5515{
5516 struct pci_dev *pdev = phba->pcidev;
0a96e975 5517 uint16_t max_nr_vfn;
912e3acd
JS		 5518 int rc;
5519
0a96e975
JS		 5520 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba);
5521 if (nr_vfn > max_nr_vfn) {
5522 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5523 "3057 Requested vfs (%d) greater than "
5524 "supported vfs (%d)", nr_vfn, max_nr_vfn);
5525 return -EINVAL;
5526 }
5527
912e3acd
JS		 5528 rc = pci_enable_sriov(pdev, nr_vfn);
5529 if (rc) {
5530 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5531 "2806 Failed to enable sriov on this device "
5532 "with vfn number nr_vf:%d, rc:%d\n",
5533 nr_vfn, rc);
5534 } else
5535 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5536 "2807 Successful enable sriov on this device "
5537 "with vfn number nr_vf:%d\n", nr_vfn);
5538 return rc;
5539}
5540
3772a991 5541/**
895427bd 5542 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources.
3772a991
JS		 5543 * @phba: pointer to lpfc hba data structure.
5544 *
895427bd
JS		 5545 * This routine is invoked to set up the driver internal resources before the
5546 * device specific resource setup to support the HBA device it attached to.
3772a991
JS		 5547 *
5548 * Return codes
895427bd
JS		 5549 * 0 - successful
5550 * other values - error
3772a991
JS		 5551 **/
5552static int
895427bd 5553lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
3772a991 5554{
895427bd 5555 struct lpfc_sli *psli = &phba->sli;
dea3101e 5556
2e0fef85 5557 /*
895427bd 5558 * Driver resources common to all SLI revisions
2e0fef85 5559 */
895427bd
JS		 5560 atomic_set(&phba->fast_event_count, 0);
5561 spin_lock_init(&phba->hbalock);
dea3101e 5562
895427bd
JS		 5563 /* Initialize ndlp management spinlock */
5564 spin_lock_init(&phba->ndlp_lock);
5565
5566 INIT_LIST_HEAD(&phba->port_list);
5567 INIT_LIST_HEAD(&phba->work_list);
5568 init_waitqueue_head(&phba->wait_4_mlo_m_q);
5569
5570 /* Initialize the wait queue head for the kernel thread */
5571 init_waitqueue_head(&phba->work_waitq);
5572
5573 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
f358dd0c 5574 "1403 Protocols supported %s %s %s\n",
895427bd
JS		 5575 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ?
5576 "SCSI" : " "),
5577 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ?
f358dd0c
JS		 5578 "NVME" : " "),
5579 (phba->nvmet_support ? "NVMET" : " "));
895427bd
JS		 5580
5581 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5582 /* Initialize the scsi buffer list used by driver for scsi IO */
5583 spin_lock_init(&phba->scsi_buf_list_get_lock);
5584 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get);
5585 spin_lock_init(&phba->scsi_buf_list_put_lock);
5586 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
5587 }
5588
5589 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
5590 (phba->nvmet_support == 0)) {
5591 /* Initialize the NVME buffer list used by driver for NVME IO */
5592 spin_lock_init(&phba->nvme_buf_list_get_lock);
5593 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_get);
5594 spin_lock_init(&phba->nvme_buf_list_put_lock);
5595 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
5596 }
5597
5598 /* Initialize the fabric iocb list */
5599 INIT_LIST_HEAD(&phba->fabric_iocb_list);
5600
5601 /* Initialize list to save ELS buffers */
5602 INIT_LIST_HEAD(&phba->elsbuf);
5603
5604 /* Initialize FCF connection rec list */
5605 INIT_LIST_HEAD(&phba->fcf_conn_rec_list);
5606
5607 /* Initialize OAS configuration list */
5608 spin_lock_init(&phba->devicelock);
5609 INIT_LIST_HEAD(&phba->luns);
858c9f6c 5610
3772a991 5611 /* MBOX heartbeat timer */
33cc559a 5612 setup_timer(&psli->mbox_tmo, lpfc_mbox_timeout, (unsigned long)phba);
3772a991 5613 /* Fabric block timer */
33cc559a
TJ		 5614 setup_timer(&phba->fabric_block_timer, lpfc_fabric_block_timeout,
5615 (unsigned long)phba);
3772a991 5616 /* EA polling mode timer */
33cc559a
TJ		 5617 setup_timer(&phba->eratt_poll, lpfc_poll_eratt,
5618 (unsigned long)phba);
895427bd 5619 /* Heartbeat timer */
33cc559a 5620 setup_timer(&phba->hb_tmofunc, lpfc_hb_timeout, (unsigned long)phba);
895427bd
JS		 5621
5622 return 0;
5623}
5624
5625/**
5626 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev
5627 * @phba: pointer to lpfc hba data structure.
5628 *
5629 * This routine is invoked to set up the driver internal resources specific to
5630 * support the SLI-3 HBA device it attached to.
5631 *
5632 * Return codes
5633 * 0 - successful
5634 * other values - error
5635 **/
5636static int
5637lpfc_sli_driver_resource_setup(struct lpfc_hba *phba)
5638{
5639 int rc;
5640
5641 /*
5642 * Initialize timers used by driver
5643 */
5644
5645 /* FCP polling mode timer */
33cc559a
TJ		 5646 setup_timer(&phba->fcp_poll_timer, lpfc_poll_timeout,
5647 (unsigned long)phba);
dea3101e 5648
3772a991
JS		 5649 /* Host attention work mask setup */
5650 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT);
5651 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
dea3101e 5652
3772a991
JS		 5653 /* Get all the module params for configuring this host */
5654 lpfc_get_cfgparam(phba);
895427bd
JS		 5655 /* Set up phase-1 common device driver resources */
5656
5657 rc = lpfc_setup_driver_resource_phase1(phba);
5658 if (rc)
5659 return -ENODEV;
5660
49198b37
JS		 5661 if (phba->pcidev->device == PCI_DEVICE_ID_HORNET) {
5662 phba->menlo_flag |= HBA_MENLO_SUPPORT;
5663 /* check for menlo minimum sg count */
5664 if (phba->cfg_sg_seg_cnt < LPFC_DEFAULT_MENLO_SG_SEG_CNT)
5665 phba->cfg_sg_seg_cnt = LPFC_DEFAULT_MENLO_SG_SEG_CNT;
5666 }
5667
895427bd
JS		 5668 if (!phba->sli.sli3_ring)
5669 phba->sli.sli3_ring = kzalloc(LPFC_SLI3_MAX_RING *
2a76a283 5670 sizeof(struct lpfc_sli_ring), GFP_KERNEL);
895427bd 5671 if (!phba->sli.sli3_ring)
2a76a283
JS		 5672 return -ENOMEM;
5673
dea3101e 5674 /*
96f7077f 5675 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size
3772a991 5676 * used to create the sg_dma_buf_pool must be dynamically calculated.
dea3101e 5677 */
3772a991 5678
96f7077f
JS		 5679 /* Initialize the host templates the configured values. */
5680 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96418b5e
JS		 5681 lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt;
5682 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f
JS		 5683
5684 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */
3772a991 5685 if (phba->cfg_enable_bg) {
96f7077f
JS		 5686 /*
5687 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd,
5688 * the FCP rsp, and a BDE for each. Sice we have no control
5689 * over how many protection data segments the SCSI Layer
5690 * will hand us (ie: there could be one for every block
5691 * in the IO), we just allocate enough BDEs to accomidate
5692 * our max amount and we need to limit lpfc_sg_seg_cnt to
5693 * minimize the risk of running out.
5694 */
5695 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5696 sizeof(struct fcp_rsp) +
5697 (LPFC_MAX_SG_SEG_CNT * sizeof(struct ulp_bde64));
5698
5699 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF)
5700 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF;
5701
5702 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */
5703 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT;
5704 } else {
5705 /*
5706 * The scsi_buf for a regular I/O will hold the FCP cmnd,
5707 * the FCP rsp, a BDE for each, and a BDE for up to
5708 * cfg_sg_seg_cnt data segments.
5709 */
5710 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5711 sizeof(struct fcp_rsp) +
5712 ((phba->cfg_sg_seg_cnt + 2) * sizeof(struct ulp_bde64));
5713
5714 /* Total BDEs in BPL for scsi_sg_list */
5715 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
901a920f 5716 }
dea3101e 5717
96f7077f
JS		 5718 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5719 "9088 sg_tablesize:%d dmabuf_size:%d total_bde:%d\n",
5720 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5721 phba->cfg_total_seg_cnt);
dea3101e 5722
3772a991
JS		 5723 phba->max_vpi = LPFC_MAX_VPI;
5724 /* This will be set to correct value after config_port mbox */
5725 phba->max_vports = 0;
dea3101e 5726
3772a991
JS		 5727 /*
5728 * Initialize the SLI Layer to run with lpfc HBAs.
5729 */
5730 lpfc_sli_setup(phba);
895427bd 5731 lpfc_sli_queue_init(phba);
ed957684 5732
3772a991
JS		 5733 /* Allocate device driver memory */
5734 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ))
5735 return -ENOMEM;
51ef4c26 5736
912e3acd
JS		 5737 /*
5738 * Enable sr-iov virtual functions if supported and configured
5739 * through the module parameter.
5740 */
5741 if (phba->cfg_sriov_nr_virtfn > 0) {
5742 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
5743 phba->cfg_sriov_nr_virtfn);
5744 if (rc) {
5745 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5746 "2808 Requested number of SR-IOV "
5747 "virtual functions (%d) is not "
5748 "supported\n",
5749 phba->cfg_sriov_nr_virtfn);
5750 phba->cfg_sriov_nr_virtfn = 0;
5751 }
5752 }
5753
3772a991
JS		 5754 return 0;
5755}
ed957684 5756
3772a991
JS		 5757/**
5758 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev
5759 * @phba: pointer to lpfc hba data structure.
5760 *
5761 * This routine is invoked to unset the driver internal resources set up
5762 * specific for supporting the SLI-3 HBA device it attached to.
5763 **/
5764static void
5765lpfc_sli_driver_resource_unset(struct lpfc_hba *phba)
5766{
5767 /* Free device driver memory allocated */
5768 lpfc_mem_free_all(phba);
3163f725 5769
3772a991
JS		 5770 return;
5771}
dea3101e 5772
3772a991 5773/**
da0436e9 5774 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev
3772a991
JS		 5775 * @phba: pointer to lpfc hba data structure.
5776 *
da0436e9
JS		 5777 * This routine is invoked to set up the driver internal resources specific to
5778 * support the SLI-4 HBA device it attached to.
3772a991
JS		 5779 *
5780 * Return codes
af901ca1 5781 * 0 - successful
da0436e9 5782 * other values - error
3772a991
JS		 5783 **/
5784static int
da0436e9 5785lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
3772a991 5786{
28baac74 5787 LPFC_MBOXQ_t *mboxq;
f358dd0c 5788 MAILBOX_t *mb;
895427bd 5789 int rc, i, max_buf_size;
28baac74
JS		 5790 uint8_t pn_page[LPFC_MAX_SUPPORTED_PAGES] = {0};
5791 struct lpfc_mqe *mqe;
09294d46 5792 int longs;
1ba981fd 5793 int fof_vectors = 0;
f358dd0c 5794 uint64_t wwn;
da0436e9 5795
895427bd
JS		 5796 phba->sli4_hba.num_online_cpu = num_online_cpus();
5797 phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
5798 phba->sli4_hba.curr_disp_cpu = 0;
5799
716d3bc5
JS		 5800 /* Get all the module params for configuring this host */
5801 lpfc_get_cfgparam(phba);
5802
895427bd
JS		 5803 /* Set up phase-1 common device driver resources */
5804 rc = lpfc_setup_driver_resource_phase1(phba);
5805 if (rc)
5806 return -ENODEV;
5807
da0436e9
JS		 5808 /* Before proceed, wait for POST done and device ready */
5809 rc = lpfc_sli4_post_status_check(phba);
5810 if (rc)
5811 return -ENODEV;
5812
3772a991 5813 /*
da0436e9 5814 * Initialize timers used by driver
3772a991 5815 */
3772a991 5816
33cc559a 5817 setup_timer(&phba->rrq_tmr, lpfc_rrq_timeout, (unsigned long)phba);
3772a991 5818
ecfd03c6 5819 /* FCF rediscover timer */
33cc559a
TJ		 5820 setup_timer(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo,
5821 (unsigned long)phba);
ecfd03c6 5822
7ad20aa9
JS		 5823 /*
5824 * Control structure for handling external multi-buffer mailbox
5825 * command pass-through.
5826 */
5827 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0,
5828 sizeof(struct lpfc_mbox_ext_buf_ctx));
5829 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list);
5830
da0436e9 5831 phba->max_vpi = LPFC_MAX_VPI;
67d12733 5832
da0436e9
JS		 5833 /* This will be set to correct value after the read_config mbox */
5834 phba->max_vports = 0;
3772a991 5835
da0436e9
JS		 5836 /* Program the default value of vlan_id and fc_map */
5837 phba->valid_vlan = 0;
5838 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
5839 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
5840 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
3772a991 5841
2a76a283
JS		 5842 /*
5843 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands
895427bd
JS		 5844 * we will associate a new ring, for each EQ/CQ/WQ tuple.
5845 * The WQ create will allocate the ring.
2a76a283 5846 */
09294d46 5847
da0436e9 5848 /*
09294d46
JS		 5849 * It doesn't matter what family our adapter is in, we are
5850 * limited to 2 Pages, 512 SGEs, for our SGL.
5851 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp
5852 */
5853 max_buf_size = (2 * SLI4_PAGE_SIZE);
5854 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SGL_SEG_CNT - 2)
5855 phba->cfg_sg_seg_cnt = LPFC_MAX_SGL_SEG_CNT - 2;
09294d46 5856
da0436e9 5857 /*
895427bd
JS		 5858 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size
5859 * used to create the sg_dma_buf_pool must be calculated.
da0436e9 5860 */
96f7077f
JS		 5861 if (phba->cfg_enable_bg) {
5862 /*
895427bd
JS		 5863 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd,
5864 * the FCP rsp, and a SGE. Sice we have no control
5865 * over how many protection segments the SCSI Layer
96f7077f 5866 * will hand us (ie: there could be one for every block
895427bd
JS		 5867 * in the IO), just allocate enough SGEs to accomidate
5868 * our max amount and we need to limit lpfc_sg_seg_cnt
5869 * to minimize the risk of running out.
96f7077f
JS		 5870 */
5871 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd 5872 sizeof(struct fcp_rsp) + max_buf_size;
96f7077f
JS		 5873
5874 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */
5875 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT;
5876
5877 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SLI4_SEG_CNT_DIF)
895427bd
JS		 5878 phba->cfg_sg_seg_cnt =
5879 LPFC_MAX_SG_SLI4_SEG_CNT_DIF;
96f7077f
JS		 5880 } else {
5881 /*
895427bd 5882 * The scsi_buf for a regular I/O holds the FCP cmnd,
96f7077f
JS		 5883 * the FCP rsp, a SGE for each, and a SGE for up to
5884 * cfg_sg_seg_cnt data segments.
5885 */
5886 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd
JS		 5887 sizeof(struct fcp_rsp) +
5888 ((phba->cfg_sg_seg_cnt + 2) *
5889 sizeof(struct sli4_sge));
96f7077f
JS		 5890
5891 /* Total SGEs for scsi_sg_list */
5892 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
895427bd 5893
96f7077f 5894 /*
895427bd
JS		 5895 * NOTE: if (phba->cfg_sg_seg_cnt + 2) <= 256 we only
5896 * need to post 1 page for the SGL.
96f7077f 5897 */
085c647c 5898 }
acd6859b 5899
96f7077f
JS		 5900 /* Initialize the host templates with the updated values. */
5901 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
5902 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96418b5e 5903 lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f
JS		 5904
5905 if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ)
5906 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ;
5907 else
5908 phba->cfg_sg_dma_buf_size =
5909 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size);
5910
5911 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5912 "9087 sg_tablesize:%d dmabuf_size:%d total_sge:%d\n",
5913 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5914 phba->cfg_total_seg_cnt);
3772a991 5915
da0436e9 5916 /* Initialize buffer queue management fields */
895427bd 5917 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list);
da0436e9
JS		 5918 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc;
5919 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free;
3772a991 5920
da0436e9
JS		 5921 /*
5922 * Initialize the SLI Layer to run with lpfc SLI4 HBAs.
5923 */
895427bd
JS		 5924 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5925 /* Initialize the Abort scsi buffer list used by driver */
5926 spin_lock_init(&phba->sli4_hba.abts_scsi_buf_list_lock);
5927 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
5928 }
5929
5930 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
5931 /* Initialize the Abort nvme buffer list used by driver */
5932 spin_lock_init(&phba->sli4_hba.abts_nvme_buf_list_lock);
5933 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
86c67379 5934 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
6c621a22 5935 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_ctx_list);
a8cf5dfe 5936 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list);
6c621a22 5937
318083ad
JS		 5938 /* Fast-path XRI aborted CQ Event work queue list */
5939 INIT_LIST_HEAD(&phba->sli4_hba.sp_nvme_xri_aborted_work_queue);
895427bd
JS		 5940 }
5941
da0436e9 5942 /* This abort list used by worker thread */
895427bd 5943 spin_lock_init(&phba->sli4_hba.sgl_list_lock);
f358dd0c 5944 spin_lock_init(&phba->sli4_hba.nvmet_io_lock);
a8cf5dfe 5945 spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock);
3772a991 5946
da0436e9 5947 /*
6d368e53 5948 * Initialize driver internal slow-path work queues
da0436e9 5949 */
3772a991 5950
da0436e9
JS		 5951 /* Driver internel slow-path CQ Event pool */
5952 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
5953 /* Response IOCB work queue list */
45ed1190 5954 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
da0436e9
JS		 5955 /* Asynchronous event CQ Event work queue list */
5956 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
5957 /* Fast-path XRI aborted CQ Event work queue list */
5958 INIT_LIST_HEAD(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue);
5959 /* Slow-path XRI aborted CQ Event work queue list */
5960 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
5961 /* Receive queue CQ Event work queue list */
5962 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
5963
6d368e53
JS		 5964 /* Initialize extent block lists. */
5965 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
5966 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
5967 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
5968 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list);
5969
d1f525aa
JS		 5970 /* Initialize mboxq lists. If the early init routines fail
5971 * these lists need to be correctly initialized.
5972 */
5973 INIT_LIST_HEAD(&phba->sli.mboxq);
5974 INIT_LIST_HEAD(&phba->sli.mboxq_cmpl);
5975
448193b5
JS		 5976 /* initialize optic_state to 0xFF */
5977 phba->sli4_hba.lnk_info.optic_state = 0xff;
5978
da0436e9
JS		 5979 /* Allocate device driver memory */
5980 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ);
5981 if (rc)
5982 return -ENOMEM;
5983
2fcee4bf
JS		 5984 /* IF Type 2 ports get initialized now. */
5985 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
5986 LPFC_SLI_INTF_IF_TYPE_2) {
5987 rc = lpfc_pci_function_reset(phba);
895427bd
JS		 5988 if (unlikely(rc)) {
5989 rc = -ENODEV;
5990 goto out_free_mem;
5991 }
946727dc 5992 phba->temp_sensor_support = 1;
2fcee4bf
JS		 5993 }
5994
da0436e9
JS		 5995 /* Create the bootstrap mailbox command */
5996 rc = lpfc_create_bootstrap_mbox(phba);
5997 if (unlikely(rc))
5998 goto out_free_mem;
5999
6000 /* Set up the host's endian order with the device. */
6001 rc = lpfc_setup_endian_order(phba);
6002 if (unlikely(rc))
6003 goto out_free_bsmbx;
6004
6005 /* Set up the hba's configuration parameters. */
6006 rc = lpfc_sli4_read_config(phba);
cff261f6
JS		 6007 if (unlikely(rc))
6008 goto out_free_bsmbx;
6009 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba);
da0436e9
JS		 6010 if (unlikely(rc))
6011 goto out_free_bsmbx;
6012
2fcee4bf
JS		 6013 /* IF Type 0 ports get initialized now. */
6014 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
6015 LPFC_SLI_INTF_IF_TYPE_0) {
6016 rc = lpfc_pci_function_reset(phba);
6017 if (unlikely(rc))
6018 goto out_free_bsmbx;
6019 }
da0436e9 6020
cb5172ea
JS		 6021 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
6022 GFP_KERNEL);
6023 if (!mboxq) {
6024 rc = -ENOMEM;
6025 goto out_free_bsmbx;
6026 }
6027
f358dd0c 6028 /* Check for NVMET being configured */
895427bd 6029 phba->nvmet_support = 0;
f358dd0c
JS		 6030 if (lpfc_enable_nvmet_cnt) {
6031
6032 /* First get WWN of HBA instance */
6033 lpfc_read_nv(phba, mboxq);
6034 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
6035 if (rc != MBX_SUCCESS) {
6036 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6037 "6016 Mailbox failed , mbxCmd x%x "
6038 "READ_NV, mbxStatus x%x\n",
6039 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
6040 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
d1f525aa 6041 mempool_free(mboxq, phba->mbox_mem_pool);
f358dd0c
JS		 6042 rc = -EIO;
6043 goto out_free_bsmbx;
6044 }
6045 mb = &mboxq->u.mb;
6046 memcpy(&wwn, (char *)mb->un.varRDnvp.nodename,
6047 sizeof(uint64_t));
6048 wwn = cpu_to_be64(wwn);
6049 phba->sli4_hba.wwnn.u.name = wwn;
6050 memcpy(&wwn, (char *)mb->un.varRDnvp.portname,
6051 sizeof(uint64_t));
6052 /* wwn is WWPN of HBA instance */
6053 wwn = cpu_to_be64(wwn);
6054 phba->sli4_hba.wwpn.u.name = wwn;
6055
6056 /* Check to see if it matches any module parameter */
6057 for (i = 0; i < lpfc_enable_nvmet_cnt; i++) {
6058 if (wwn == lpfc_enable_nvmet[i]) {
7d708033 6059#if (IS_ENABLED(CONFIG_NVME_TARGET_FC))
3c603be9
JS		 6060 if (lpfc_nvmet_mem_alloc(phba))
6061 break;
6062
6063 phba->nvmet_support = 1; /* a match */
6064
f358dd0c
JS		 6065 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6066 "6017 NVME Target %016llx\n",
6067 wwn);
7d708033
JS		 6068#else
6069 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6070 "6021 Can't enable NVME Target."
6071 " NVME_TARGET_FC infrastructure"
6072 " is not in kernel\n");
6073#endif
3c603be9 6074 break;
f358dd0c
JS		 6075 }
6076 }
6077 }
895427bd
JS		 6078
6079 lpfc_nvme_mod_param_dep(phba);
6080
fedd3b7b 6081 /* Get the Supported Pages if PORT_CAPABILITIES is supported by port. */
cb5172ea
JS		 6082 lpfc_supported_pages(mboxq);
6083 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
fedd3b7b
JS		 6084 if (!rc) {
6085 mqe = &mboxq->u.mqe;
6086 memcpy(&pn_page[0], ((uint8_t *)&mqe->un.supp_pages.word3),
6087 LPFC_MAX_SUPPORTED_PAGES);
6088 for (i = 0; i < LPFC_MAX_SUPPORTED_PAGES; i++) {
6089 switch (pn_page[i]) {
6090 case LPFC_SLI4_PARAMETERS:
6091 phba->sli4_hba.pc_sli4_params.supported = 1;
6092 break;
6093 default:
6094 break;
6095 }
6096 }
6097 /* Read the port's SLI4 Parameters capabilities if supported. */
6098 if (phba->sli4_hba.pc_sli4_params.supported)
6099 rc = lpfc_pc_sli4_params_get(phba, mboxq);
6100 if (rc) {
6101 mempool_free(mboxq, phba->mbox_mem_pool);
6102 rc = -EIO;
6103 goto out_free_bsmbx;
cb5172ea
JS		 6104 }
6105 }
65791f1f 6106
fedd3b7b
JS		 6107 /*
6108 * Get sli4 parameters that override parameters from Port capabilities.
6d368e53
JS		 6109 * If this call fails, it isn't critical unless the SLI4 parameters come
6110 * back in conflict.
fedd3b7b 6111 */
6d368e53
JS		 6112 rc = lpfc_get_sli4_parameters(phba, mboxq);
6113 if (rc) {
6114 if (phba->sli4_hba.extents_in_use &&
6115 phba->sli4_hba.rpi_hdrs_in_use) {
6116 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6117 "2999 Unsupported SLI4 Parameters "
6118 "Extents and RPI headers enabled.\n");
6d368e53 6119 }
895427bd
JS		 6120 mempool_free(mboxq, phba->mbox_mem_pool);
6121 goto out_free_bsmbx;
6d368e53 6122 }
895427bd 6123
cb5172ea 6124 mempool_free(mboxq, phba->mbox_mem_pool);
1ba981fd
JS		 6125
6126 /* Verify OAS is supported */
6127 lpfc_sli4_oas_verify(phba);
6128 if (phba->cfg_fof)
6129 fof_vectors = 1;
6130
5350d872
JS		 6131 /* Verify all the SLI4 queues */
6132 rc = lpfc_sli4_queue_verify(phba);
da0436e9
JS		 6133 if (rc)
6134 goto out_free_bsmbx;
6135
6136 /* Create driver internal CQE event pool */
6137 rc = lpfc_sli4_cq_event_pool_create(phba);
6138 if (rc)
5350d872 6139 goto out_free_bsmbx;
da0436e9 6140
8a9d2e80
JS		 6141 /* Initialize sgl lists per host */
6142 lpfc_init_sgl_list(phba);
6143
6144 /* Allocate and initialize active sgl array */
da0436e9
JS		 6145 rc = lpfc_init_active_sgl_array(phba);
6146 if (rc) {
6147 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6148 "1430 Failed to initialize sgl list.\n");
8a9d2e80 6149 goto out_destroy_cq_event_pool;
da0436e9 6150 }
da0436e9
JS		 6151 rc = lpfc_sli4_init_rpi_hdrs(phba);
6152 if (rc) {
6153 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6154 "1432 Failed to initialize rpi headers.\n");
6155 goto out_free_active_sgl;
6156 }
6157
a93ff37a 6158 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */
0c9ab6f5
JS		 6159 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG;
6160 phba->fcf.fcf_rr_bmask = kzalloc(longs * sizeof(unsigned long),
6161 GFP_KERNEL);
6162 if (!phba->fcf.fcf_rr_bmask) {
6163 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6164 "2759 Failed allocate memory for FCF round "
6165 "robin failover bmask\n");
0558056c 6166 rc = -ENOMEM;
0c9ab6f5
JS		 6167 goto out_remove_rpi_hdrs;
6168 }
6169
895427bd
JS		 6170 phba->sli4_hba.hba_eq_hdl = kcalloc(fof_vectors + phba->io_channel_irqs,
6171 sizeof(struct lpfc_hba_eq_hdl),
6172 GFP_KERNEL);
6173 if (!phba->sli4_hba.hba_eq_hdl) {
67d12733
JS		 6174 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6175 "2572 Failed allocate memory for "
6176 "fast-path per-EQ handle array\n");
6177 rc = -ENOMEM;
6178 goto out_free_fcf_rr_bmask;
da0436e9
JS		 6179 }
6180
895427bd
JS		 6181 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_present_cpu,
6182 sizeof(struct lpfc_vector_map_info),
6183 GFP_KERNEL);
7bb03bbf
JS		 6184 if (!phba->sli4_hba.cpu_map) {
6185 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6186 "3327 Failed allocate memory for msi-x "
6187 "interrupt vector mapping\n");
6188 rc = -ENOMEM;
895427bd 6189 goto out_free_hba_eq_hdl;
7bb03bbf 6190 }
b246de17 6191 if (lpfc_used_cpu == NULL) {
895427bd
JS		 6192 lpfc_used_cpu = kcalloc(lpfc_present_cpu, sizeof(uint16_t),
6193 GFP_KERNEL);
b246de17
JS		 6194 if (!lpfc_used_cpu) {
6195 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6196 "3335 Failed allocate memory for msi-x "
6197 "interrupt vector mapping\n");
6198 kfree(phba->sli4_hba.cpu_map);
6199 rc = -ENOMEM;
895427bd 6200 goto out_free_hba_eq_hdl;
b246de17
JS		 6201 }
6202 for (i = 0; i < lpfc_present_cpu; i++)
6203 lpfc_used_cpu[i] = LPFC_VECTOR_MAP_EMPTY;
6204 }
6205
912e3acd
JS		 6206 /*
6207 * Enable sr-iov virtual functions if supported and configured
6208 * through the module parameter.
6209 */
6210 if (phba->cfg_sriov_nr_virtfn > 0) {
6211 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
6212 phba->cfg_sriov_nr_virtfn);
6213 if (rc) {
6214 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6215 "3020 Requested number of SR-IOV "
6216 "virtual functions (%d) is not "
6217 "supported\n",
6218 phba->cfg_sriov_nr_virtfn);
6219 phba->cfg_sriov_nr_virtfn = 0;
6220 }
6221 }
6222
5248a749 6223 return 0;
da0436e9 6224
895427bd
JS		 6225out_free_hba_eq_hdl:
6226 kfree(phba->sli4_hba.hba_eq_hdl);
0c9ab6f5
JS		 6227out_free_fcf_rr_bmask:
6228 kfree(phba->fcf.fcf_rr_bmask);
da0436e9
JS		 6229out_remove_rpi_hdrs:
6230 lpfc_sli4_remove_rpi_hdrs(phba);
6231out_free_active_sgl:
6232 lpfc_free_active_sgl(phba);
da0436e9
JS		 6233out_destroy_cq_event_pool:
6234 lpfc_sli4_cq_event_pool_destroy(phba);
da0436e9
JS		 6235out_free_bsmbx:
6236 lpfc_destroy_bootstrap_mbox(phba);
6237out_free_mem:
6238 lpfc_mem_free(phba);
6239 return rc;
6240}
6241
6242/**
6243 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev
6244 * @phba: pointer to lpfc hba data structure.
6245 *
6246 * This routine is invoked to unset the driver internal resources set up
6247 * specific for supporting the SLI-4 HBA device it attached to.
6248 **/
6249static void
6250lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
6251{
6252 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry;
6253
7bb03bbf
JS		 6254 /* Free memory allocated for msi-x interrupt vector to CPU mapping */
6255 kfree(phba->sli4_hba.cpu_map);
6256 phba->sli4_hba.num_present_cpu = 0;
6257 phba->sli4_hba.num_online_cpu = 0;
76fd07a6 6258 phba->sli4_hba.curr_disp_cpu = 0;
7bb03bbf 6259
da0436e9 6260 /* Free memory allocated for fast-path work queue handles */
895427bd 6261 kfree(phba->sli4_hba.hba_eq_hdl);
da0436e9
JS		 6262
6263 /* Free the allocated rpi headers. */
6264 lpfc_sli4_remove_rpi_hdrs(phba);
d11e31dd 6265 lpfc_sli4_remove_rpis(phba);
da0436e9 6266
0c9ab6f5
JS		 6267 /* Free eligible FCF index bmask */
6268 kfree(phba->fcf.fcf_rr_bmask);
6269
da0436e9
JS		 6270 /* Free the ELS sgl list */
6271 lpfc_free_active_sgl(phba);
8a9d2e80 6272 lpfc_free_els_sgl_list(phba);
f358dd0c 6273 lpfc_free_nvmet_sgl_list(phba);
da0436e9 6274
da0436e9
JS		 6275 /* Free the completion queue EQ event pool */
6276 lpfc_sli4_cq_event_release_all(phba);
6277 lpfc_sli4_cq_event_pool_destroy(phba);
6278
6d368e53
JS		 6279 /* Release resource identifiers. */
6280 lpfc_sli4_dealloc_resource_identifiers(phba);
6281
da0436e9
JS		 6282 /* Free the bsmbx region. */
6283 lpfc_destroy_bootstrap_mbox(phba);
6284
6285 /* Free the SLI Layer memory with SLI4 HBAs */
6286 lpfc_mem_free_all(phba);
6287
6288 /* Free the current connect table */
6289 list_for_each_entry_safe(conn_entry, next_conn_entry,
4d9ab994
JS		 6290 &phba->fcf_conn_rec_list, list) {
6291 list_del_init(&conn_entry->list);
da0436e9 6292 kfree(conn_entry);
4d9ab994 6293 }
da0436e9
JS		 6294
6295 return;
6296}
6297
6298/**
25985edc 6299 * lpfc_init_api_table_setup - Set up init api function jump table
da0436e9
JS		 6300 * @phba: The hba struct for which this call is being executed.
6301 * @dev_grp: The HBA PCI-Device group number.
6302 *
6303 * This routine sets up the device INIT interface API function jump table
6304 * in @phba struct.
6305 *
6306 * Returns: 0 - success, -ENODEV - failure.
6307 **/
6308int
6309lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
6310{
84d1b006
JS		 6311 phba->lpfc_hba_init_link = lpfc_hba_init_link;
6312 phba->lpfc_hba_down_link = lpfc_hba_down_link;
7f86059a 6313 phba->lpfc_selective_reset = lpfc_selective_reset;
da0436e9
JS		 6314 switch (dev_grp) {
6315 case LPFC_PCI_DEV_LP:
6316 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3;
6317 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3;
6318 phba->lpfc_stop_port = lpfc_stop_port_s3;
6319 break;
6320 case LPFC_PCI_DEV_OC:
6321 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4;
6322 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4;
6323 phba->lpfc_stop_port = lpfc_stop_port_s4;
6324 break;
6325 default:
6326 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6327 "1431 Invalid HBA PCI-device group: 0x%x\n",
6328 dev_grp);
6329 return -ENODEV;
6330 break;
6331 }
6332 return 0;
6333}
6334
da0436e9
JS		 6335/**
6336 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources.
6337 * @phba: pointer to lpfc hba data structure.
6338 *
6339 * This routine is invoked to set up the driver internal resources after the
6340 * device specific resource setup to support the HBA device it attached to.
6341 *
6342 * Return codes
af901ca1 6343 * 0 - successful
da0436e9
JS		 6344 * other values - error
6345 **/
6346static int
6347lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba)
6348{
6349 int error;
6350
6351 /* Startup the kernel thread for this host adapter. */
6352 phba->worker_thread = kthread_run(lpfc_do_work, phba,
6353 "lpfc_worker_%d", phba->brd_no);
6354 if (IS_ERR(phba->worker_thread)) {
6355 error = PTR_ERR(phba->worker_thread);
6356 return error;
3772a991
JS		 6357 }
6358
6359 return 0;
6360}
6361
6362/**
6363 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources.
6364 * @phba: pointer to lpfc hba data structure.
6365 *
6366 * This routine is invoked to unset the driver internal resources set up after
6367 * the device specific resource setup for supporting the HBA device it
6368 * attached to.
6369 **/
6370static void
6371lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba)
6372{
6373 /* Stop kernel worker thread */
6374 kthread_stop(phba->worker_thread);
6375}
6376
6377/**
6378 * lpfc_free_iocb_list - Free iocb list.
6379 * @phba: pointer to lpfc hba data structure.
6380 *
6381 * This routine is invoked to free the driver's IOCB list and memory.
6382 **/
6c621a22 6383void
3772a991
JS		 6384lpfc_free_iocb_list(struct lpfc_hba *phba)
6385{
6386 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
6387
6388 spin_lock_irq(&phba->hbalock);
6389 list_for_each_entry_safe(iocbq_entry, iocbq_next,
6390 &phba->lpfc_iocb_list, list) {
6391 list_del(&iocbq_entry->list);
6392 kfree(iocbq_entry);
6393 phba->total_iocbq_bufs--;
98c9ea5c 6394 }
3772a991
JS		 6395 spin_unlock_irq(&phba->hbalock);
6396
6397 return;
6398}
6399
6400/**
6401 * lpfc_init_iocb_list - Allocate and initialize iocb list.
6402 * @phba: pointer to lpfc hba data structure.
6403 *
6404 * This routine is invoked to allocate and initizlize the driver's IOCB
6405 * list and set up the IOCB tag array accordingly.
6406 *
6407 * Return codes
af901ca1 6408 * 0 - successful
3772a991
JS		 6409 * other values - error
6410 **/
6c621a22 6411int
3772a991
JS		 6412lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count)
6413{
6414 struct lpfc_iocbq *iocbq_entry = NULL;
6415 uint16_t iotag;
6416 int i;
dea3101e 6417
6418 /* Initialize and populate the iocb list per host. */
6419 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
3772a991 6420 for (i = 0; i < iocb_count; i++) {
dd00cc48 6421 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
dea3101e 6422 if (iocbq_entry == NULL) {
6423 printk(KERN_ERR "%s: only allocated %d iocbs of "
6424 "expected %d count. Unloading driver.\n",
cadbd4a5 6425 __func__, i, LPFC_IOCB_LIST_CNT);
dea3101e 6426 goto out_free_iocbq;
6427 }
6428
604a3e30
JB		 6429 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
6430 if (iotag == 0) {
3772a991 6431 kfree(iocbq_entry);
604a3e30 6432 printk(KERN_ERR "%s: failed to allocate IOTAG. "
3772a991 6433 "Unloading driver.\n", __func__);
604a3e30
JB		 6434 goto out_free_iocbq;
6435 }
6d368e53 6436 iocbq_entry->sli4_lxritag = NO_XRI;
3772a991 6437 iocbq_entry->sli4_xritag = NO_XRI;
2e0fef85
JS		 6438
6439 spin_lock_irq(&phba->hbalock);
dea3101e 6440 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
6441 phba->total_iocbq_bufs++;
2e0fef85 6442 spin_unlock_irq(&phba->hbalock);
dea3101e 6443 }
6444
3772a991 6445 return 0;
dea3101e 6446
3772a991
JS		 6447out_free_iocbq:
6448 lpfc_free_iocb_list(phba);
dea3101e 6449
3772a991
JS		 6450 return -ENOMEM;
6451}
5e9d9b82 6452
3772a991 6453/**
8a9d2e80 6454 * lpfc_free_sgl_list - Free a given sgl list.
da0436e9 6455 * @phba: pointer to lpfc hba data structure.
8a9d2e80 6456 * @sglq_list: pointer to the head of sgl list.
3772a991 6457 *
8a9d2e80 6458 * This routine is invoked to free a give sgl list and memory.
3772a991 6459 **/
8a9d2e80
JS		 6460void
6461lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list)
3772a991 6462{
da0436e9 6463 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8a9d2e80
JS		 6464
6465 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) {
6466 list_del(&sglq_entry->list);
6467 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys);
6468 kfree(sglq_entry);
6469 }
6470}
6471
6472/**
6473 * lpfc_free_els_sgl_list - Free els sgl list.
6474 * @phba: pointer to lpfc hba data structure.
6475 *
6476 * This routine is invoked to free the driver's els sgl list and memory.
6477 **/
6478static void
6479lpfc_free_els_sgl_list(struct lpfc_hba *phba)
6480{
da0436e9 6481 LIST_HEAD(sglq_list);
dea3101e 6482
8a9d2e80 6483 /* Retrieve all els sgls from driver list */
da0436e9 6484 spin_lock_irq(&phba->hbalock);
895427bd
JS		 6485 spin_lock(&phba->sli4_hba.sgl_list_lock);
6486 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list);
6487 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9 6488 spin_unlock_irq(&phba->hbalock);
dea3101e 6489
8a9d2e80
JS		 6490 /* Now free the sgl list */
6491 lpfc_free_sgl_list(phba, &sglq_list);
da0436e9 6492}
92d7f7b0 6493
f358dd0c
JS		 6494/**
6495 * lpfc_free_nvmet_sgl_list - Free nvmet sgl list.
6496 * @phba: pointer to lpfc hba data structure.
6497 *
6498 * This routine is invoked to free the driver's nvmet sgl list and memory.
6499 **/
6500static void
6501lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba)
6502{
6503 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
6504 LIST_HEAD(sglq_list);
6505
6506 /* Retrieve all nvmet sgls from driver list */
6507 spin_lock_irq(&phba->hbalock);
6508 spin_lock(&phba->sli4_hba.sgl_list_lock);
6509 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list);
6510 spin_unlock(&phba->sli4_hba.sgl_list_lock);
6511 spin_unlock_irq(&phba->hbalock);
6512
6513 /* Now free the sgl list */
6514 list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) {
6515 list_del(&sglq_entry->list);
6516 lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys);
6517 kfree(sglq_entry);
6518 }
6519}
6520
da0436e9
JS		 6521/**
6522 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs.
6523 * @phba: pointer to lpfc hba data structure.
6524 *
6525 * This routine is invoked to allocate the driver's active sgl memory.
6526 * This array will hold the sglq_entry's for active IOs.
6527 **/
6528static int
6529lpfc_init_active_sgl_array(struct lpfc_hba *phba)
6530{
6531 int size;
6532 size = sizeof(struct lpfc_sglq *);
6533 size *= phba->sli4_hba.max_cfg_param.max_xri;
6534
6535 phba->sli4_hba.lpfc_sglq_active_list =
6536 kzalloc(size, GFP_KERNEL);
6537 if (!phba->sli4_hba.lpfc_sglq_active_list)
6538 return -ENOMEM;
6539 return 0;
3772a991
JS		 6540}
6541
6542/**
da0436e9 6543 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs.
3772a991
JS		 6544 * @phba: pointer to lpfc hba data structure.
6545 *
da0436e9
JS		 6546 * This routine is invoked to walk through the array of active sglq entries
6547 * and free all of the resources.
6548 * This is just a place holder for now.
3772a991
JS		 6549 **/
6550static void
da0436e9 6551lpfc_free_active_sgl(struct lpfc_hba *phba)
3772a991 6552{
da0436e9 6553 kfree(phba->sli4_hba.lpfc_sglq_active_list);
3772a991
JS		 6554}
6555
6556/**
da0436e9 6557 * lpfc_init_sgl_list - Allocate and initialize sgl list.
3772a991
JS		 6558 * @phba: pointer to lpfc hba data structure.
6559 *
da0436e9
JS		 6560 * This routine is invoked to allocate and initizlize the driver's sgl
6561 * list and set up the sgl xritag tag array accordingly.
3772a991 6562 *
3772a991 6563 **/
8a9d2e80 6564static void
da0436e9 6565lpfc_init_sgl_list(struct lpfc_hba *phba)
3772a991 6566{
da0436e9 6567 /* Initialize and populate the sglq list per host/VF. */
895427bd 6568 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list);
da0436e9 6569 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c 6570 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list);
86c67379 6571 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
da0436e9 6572
8a9d2e80
JS		 6573 /* els xri-sgl book keeping */
6574 phba->sli4_hba.els_xri_cnt = 0;
0ff10d46 6575
8a9d2e80 6576 /* scsi xri-buffer book keeping */
da0436e9 6577 phba->sli4_hba.scsi_xri_cnt = 0;
895427bd
JS		 6578
6579 /* nvme xri-buffer book keeping */
6580 phba->sli4_hba.nvme_xri_cnt = 0;
da0436e9
JS		 6581}
6582
6583/**
6584 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port
6585 * @phba: pointer to lpfc hba data structure.
6586 *
6587 * This routine is invoked to post rpi header templates to the
88a2cfbb 6588 * port for those SLI4 ports that do not support extents. This routine
da0436e9 6589 * posts a PAGE_SIZE memory region to the port to hold up to
88a2cfbb
JS		 6590 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine
6591 * and should be called only when interrupts are disabled.
da0436e9
JS		 6592 *
6593 * Return codes
af901ca1 6594 * 0 - successful
88a2cfbb 6595 * -ERROR - otherwise.
da0436e9
JS		 6596 **/
6597int
6598lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba)
6599{
6600 int rc = 0;
da0436e9
JS		 6601 struct lpfc_rpi_hdr *rpi_hdr;
6602
6603 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
ff78d8f9 6604 if (!phba->sli4_hba.rpi_hdrs_in_use)
6d368e53 6605 return rc;
6d368e53
JS		 6606 if (phba->sli4_hba.extents_in_use)
6607 return -EIO;
da0436e9
JS		 6608
6609 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
6610 if (!rpi_hdr) {
6611 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
6612 "0391 Error during rpi post operation\n");
6613 lpfc_sli4_remove_rpis(phba);
6614 rc = -ENODEV;
6615 }
6616
6617 return rc;
6618}
6619
6620/**
6621 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region
6622 * @phba: pointer to lpfc hba data structure.
6623 *
6624 * This routine is invoked to allocate a single 4KB memory region to
6625 * support rpis and stores them in the phba. This single region
6626 * provides support for up to 64 rpis. The region is used globally
6627 * by the device.
6628 *
6629 * Returns:
6630 * A valid rpi hdr on success.
6631 * A NULL pointer on any failure.
6632 **/
6633struct lpfc_rpi_hdr *
6634lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba)
6635{
6636 uint16_t rpi_limit, curr_rpi_range;
6637 struct lpfc_dmabuf *dmabuf;
6638 struct lpfc_rpi_hdr *rpi_hdr;
6639
6d368e53
JS		 6640 /*
6641 * If the SLI4 port supports extents, posting the rpi header isn't
6642 * required. Set the expected maximum count and let the actual value
6643 * get set when extents are fully allocated.
6644 */
6645 if (!phba->sli4_hba.rpi_hdrs_in_use)
6646 return NULL;
6647 if (phba->sli4_hba.extents_in_use)
6648 return NULL;
6649
6650 /* The limit on the logical index is just the max_rpi count. */
845d9e8d 6651 rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi;
da0436e9
JS		 6652
6653 spin_lock_irq(&phba->hbalock);
6d368e53
JS		 6654 /*
6655 * Establish the starting RPI in this header block. The starting
6656 * rpi is normalized to a zero base because the physical rpi is
6657 * port based.
6658 */
97f2ecf1 6659 curr_rpi_range = phba->sli4_hba.next_rpi;
da0436e9
JS		 6660 spin_unlock_irq(&phba->hbalock);
6661
845d9e8d
JS		 6662 /* Reached full RPI range */
6663 if (curr_rpi_range == rpi_limit)
6d368e53 6664 return NULL;
845d9e8d 6665
da0436e9
JS		 6666 /*
6667 * First allocate the protocol header region for the port. The
6668 * port expects a 4KB DMA-mapped memory region that is 4K aligned.
6669 */
6670 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
6671 if (!dmabuf)
6672 return NULL;
6673
1aee383d
JP		 6674 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev,
6675 LPFC_HDR_TEMPLATE_SIZE,
6676 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS		 6677 if (!dmabuf->virt) {
6678 rpi_hdr = NULL;
6679 goto err_free_dmabuf;
6680 }
6681
da0436e9
JS		 6682 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) {
6683 rpi_hdr = NULL;
6684 goto err_free_coherent;
6685 }
6686
6687 /* Save the rpi header data for cleanup later. */
6688 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL);
6689 if (!rpi_hdr)
6690 goto err_free_coherent;
6691
6692 rpi_hdr->dmabuf = dmabuf;
6693 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE;
6694 rpi_hdr->page_count = 1;
6695 spin_lock_irq(&phba->hbalock);
6d368e53
JS		 6696
6697 /* The rpi_hdr stores the logical index only. */
6698 rpi_hdr->start_rpi = curr_rpi_range;
845d9e8d 6699 rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT;
da0436e9
JS		 6700 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
6701
da0436e9
JS		 6702 spin_unlock_irq(&phba->hbalock);
6703 return rpi_hdr;
6704
6705 err_free_coherent:
6706 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE,
6707 dmabuf->virt, dmabuf->phys);
6708 err_free_dmabuf:
6709 kfree(dmabuf);
6710 return NULL;
6711}
6712
6713/**
6714 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions
6715 * @phba: pointer to lpfc hba data structure.
6716 *
6717 * This routine is invoked to remove all memory resources allocated
6d368e53
JS		 6718 * to support rpis for SLI4 ports not supporting extents. This routine
6719 * presumes the caller has released all rpis consumed by fabric or port
6720 * logins and is prepared to have the header pages removed.
da0436e9
JS		 6721 **/
6722void
6723lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba)
6724{
6725 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr;
6726
6d368e53
JS		 6727 if (!phba->sli4_hba.rpi_hdrs_in_use)
6728 goto exit;
6729
da0436e9
JS		 6730 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr,
6731 &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
6732 list_del(&rpi_hdr->list);
6733 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len,
6734 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys);
6735 kfree(rpi_hdr->dmabuf);
6736 kfree(rpi_hdr);
6737 }
6d368e53
JS		 6738 exit:
6739 /* There are no rpis available to the port now. */
6740 phba->sli4_hba.next_rpi = 0;
da0436e9
JS		 6741}
6742
6743/**
6744 * lpfc_hba_alloc - Allocate driver hba data structure for a device.
6745 * @pdev: pointer to pci device data structure.
6746 *
6747 * This routine is invoked to allocate the driver hba data structure for an
6748 * HBA device. If the allocation is successful, the phba reference to the
6749 * PCI device data structure is set.
6750 *
6751 * Return codes
af901ca1 6752 * pointer to @phba - successful
da0436e9
JS		 6753 * NULL - error
6754 **/
6755static struct lpfc_hba *
6756lpfc_hba_alloc(struct pci_dev *pdev)
6757{
6758 struct lpfc_hba *phba;
6759
6760 /* Allocate memory for HBA structure */
6761 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL);
6762 if (!phba) {
e34ccdfe 6763 dev_err(&pdev->dev, "failed to allocate hba struct\n");
da0436e9
JS		 6764 return NULL;
6765 }
6766
6767 /* Set reference to PCI device in HBA structure */
6768 phba->pcidev = pdev;
6769
6770 /* Assign an unused board number */
6771 phba->brd_no = lpfc_get_instance();
6772 if (phba->brd_no < 0) {
6773 kfree(phba);
6774 return NULL;
6775 }
65791f1f 6776 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL;
da0436e9 6777
4fede78f 6778 spin_lock_init(&phba->ct_ev_lock);
f1c3b0fc
JS		 6779 INIT_LIST_HEAD(&phba->ct_ev_waiters);
6780
da0436e9
JS		 6781 return phba;
6782}
6783
6784/**
6785 * lpfc_hba_free - Free driver hba data structure with a device.
6786 * @phba: pointer to lpfc hba data structure.
6787 *
6788 * This routine is invoked to free the driver hba data structure with an
6789 * HBA device.
6790 **/
6791static void
6792lpfc_hba_free(struct lpfc_hba *phba)
6793{
6794 /* Release the driver assigned board number */
6795 idr_remove(&lpfc_hba_index, phba->brd_no);
6796
895427bd
JS		 6797 /* Free memory allocated with sli3 rings */
6798 kfree(phba->sli.sli3_ring);
6799 phba->sli.sli3_ring = NULL;
2a76a283 6800
da0436e9
JS		 6801 kfree(phba);
6802 return;
6803}
6804
6805/**
6806 * lpfc_create_shost - Create hba physical port with associated scsi host.
6807 * @phba: pointer to lpfc hba data structure.
6808 *
6809 * This routine is invoked to create HBA physical port and associate a SCSI
6810 * host with it.
6811 *
6812 * Return codes
af901ca1 6813 * 0 - successful
da0436e9
JS		 6814 * other values - error
6815 **/
6816static int
6817lpfc_create_shost(struct lpfc_hba *phba)
6818{
6819 struct lpfc_vport *vport;
6820 struct Scsi_Host *shost;
6821
6822 /* Initialize HBA FC structure */
6823 phba->fc_edtov = FF_DEF_EDTOV;
6824 phba->fc_ratov = FF_DEF_RATOV;
6825 phba->fc_altov = FF_DEF_ALTOV;
6826 phba->fc_arbtov = FF_DEF_ARBTOV;
6827
d7c47992 6828 atomic_set(&phba->sdev_cnt, 0);
2cee7808
JS		 6829 atomic_set(&phba->fc4ScsiInputRequests, 0);
6830 atomic_set(&phba->fc4ScsiOutputRequests, 0);
6831 atomic_set(&phba->fc4ScsiControlRequests, 0);
6832 atomic_set(&phba->fc4ScsiIoCmpls, 0);
6833 atomic_set(&phba->fc4NvmeInputRequests, 0);
6834 atomic_set(&phba->fc4NvmeOutputRequests, 0);
6835 atomic_set(&phba->fc4NvmeControlRequests, 0);
6836 atomic_set(&phba->fc4NvmeIoCmpls, 0);
6837 atomic_set(&phba->fc4NvmeLsRequests, 0);
6838 atomic_set(&phba->fc4NvmeLsCmpls, 0);
da0436e9
JS		 6839 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev);
6840 if (!vport)
6841 return -ENODEV;
6842
6843 shost = lpfc_shost_from_vport(vport);
6844 phba->pport = vport;
2ea259ee 6845
f358dd0c
JS		 6846 if (phba->nvmet_support) {
6847 /* Only 1 vport (pport) will support NVME target */
6848 if (phba->txrdy_payload_pool == NULL) {
6849 phba->txrdy_payload_pool = pci_pool_create(
6850 "txrdy_pool", phba->pcidev,
6851 TXRDY_PAYLOAD_LEN, 16, 0);
6852 if (phba->txrdy_payload_pool) {
6853 phba->targetport = NULL;
6854 phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME;
6855 lpfc_printf_log(phba, KERN_INFO,
6856 LOG_INIT | LOG_NVME_DISC,
6857 "6076 NVME Target Found\n");
6858 }
6859 }
6860 }
6861
da0436e9
JS		 6862 lpfc_debugfs_initialize(vport);
6863 /* Put reference to SCSI host to driver's device private data */
6864 pci_set_drvdata(phba->pcidev, shost);
2e0fef85 6865
4258e98e
JS		 6866 /*
6867 * At this point we are fully registered with PSA. In addition,
6868 * any initial discovery should be completed.
6869 */
6870 vport->load_flag |= FC_ALLOW_FDMI;
8663cbbe
JS		 6871 if (phba->cfg_enable_SmartSAN ||
6872 (phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT)) {
4258e98e
JS		 6873
6874 /* Setup appropriate attribute masks */
6875 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR;
8663cbbe 6876 if (phba->cfg_enable_SmartSAN)
4258e98e
JS		 6877 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR;
6878 else
6879 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR;
6880 }
3772a991
JS		 6881 return 0;
6882}
db2378e0 6883
3772a991
JS		 6884/**
6885 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host.
6886 * @phba: pointer to lpfc hba data structure.
6887 *
6888 * This routine is invoked to destroy HBA physical port and the associated
6889 * SCSI host.
6890 **/
6891static void
6892lpfc_destroy_shost(struct lpfc_hba *phba)
6893{
6894 struct lpfc_vport *vport = phba->pport;
6895
6896 /* Destroy physical port that associated with the SCSI host */
6897 destroy_port(vport);
6898
6899 return;
6900}
6901
6902/**
6903 * lpfc_setup_bg - Setup Block guard structures and debug areas.
6904 * @phba: pointer to lpfc hba data structure.
6905 * @shost: the shost to be used to detect Block guard settings.
6906 *
6907 * This routine sets up the local Block guard protocol settings for @shost.
6908 * This routine also allocates memory for debugging bg buffers.
6909 **/
6910static void
6911lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost)
6912{
bbeb79b9
JS		 6913 uint32_t old_mask;
6914 uint32_t old_guard;
6915
3772a991 6916 int pagecnt = 10;
b3b98b74 6917 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
3772a991
JS		 6918 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
6919 "1478 Registering BlockGuard with the "
6920 "SCSI layer\n");
bbeb79b9 6921
b3b98b74
JS		 6922 old_mask = phba->cfg_prot_mask;
6923 old_guard = phba->cfg_prot_guard;
bbeb79b9
JS		 6924
6925 /* Only allow supported values */
b3b98b74 6926 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION |
bbeb79b9
JS		 6927 SHOST_DIX_TYPE0_PROTECTION |
6928 SHOST_DIX_TYPE1_PROTECTION);
b3b98b74
JS		 6929 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP |
6930 SHOST_DIX_GUARD_CRC);
bbeb79b9
JS		 6931
6932 /* DIF Type 1 protection for profiles AST1/C1 is end to end */
b3b98b74
JS		 6933 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION)
6934 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION;
bbeb79b9 6935
b3b98b74
JS		 6936 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
6937 if ((old_mask != phba->cfg_prot_mask) ||
6938 (old_guard != phba->cfg_prot_guard))
bbeb79b9
JS		 6939 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6940 "1475 Registering BlockGuard with the "
6941 "SCSI layer: mask %d guard %d\n",
b3b98b74
JS		 6942 phba->cfg_prot_mask,
6943 phba->cfg_prot_guard);
bbeb79b9 6944
b3b98b74
JS		 6945 scsi_host_set_prot(shost, phba->cfg_prot_mask);
6946 scsi_host_set_guard(shost, phba->cfg_prot_guard);
bbeb79b9
JS		 6947 } else
6948 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6949 "1479 Not Registering BlockGuard with the SCSI "
6950 "layer, Bad protection parameters: %d %d\n",
6951 old_mask, old_guard);
3772a991 6952 }
bbeb79b9 6953
3772a991
JS		 6954 if (!_dump_buf_data) {
6955 while (pagecnt) {
6956 spin_lock_init(&_dump_buf_lock);
6957 _dump_buf_data =
6958 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
6959 if (_dump_buf_data) {
6a9c52cf
JS		 6960 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6961 "9043 BLKGRD: allocated %d pages for "
3772a991
JS		 6962 "_dump_buf_data at 0x%p\n",
6963 (1 << pagecnt), _dump_buf_data);
6964 _dump_buf_data_order = pagecnt;
6965 memset(_dump_buf_data, 0,
6966 ((1 << PAGE_SHIFT) << pagecnt));
6967 break;
6968 } else
6969 --pagecnt;
6970 }
6971 if (!_dump_buf_data_order)
6a9c52cf
JS		 6972 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6973 "9044 BLKGRD: ERROR unable to allocate "
3772a991
JS		 6974 "memory for hexdump\n");
6975 } else
6a9c52cf
JS		 6976 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6977 "9045 BLKGRD: already allocated _dump_buf_data=0x%p"
3772a991
JS		 6978 "\n", _dump_buf_data);
6979 if (!_dump_buf_dif) {
6980 while (pagecnt) {
6981 _dump_buf_dif =
6982 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
6983 if (_dump_buf_dif) {
6a9c52cf
JS		 6984 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6985 "9046 BLKGRD: allocated %d pages for "
3772a991
JS		 6986 "_dump_buf_dif at 0x%p\n",
6987 (1 << pagecnt), _dump_buf_dif);
6988 _dump_buf_dif_order = pagecnt;
6989 memset(_dump_buf_dif, 0,
6990 ((1 << PAGE_SHIFT) << pagecnt));
6991 break;
6992 } else
6993 --pagecnt;
6994 }
6995 if (!_dump_buf_dif_order)
6a9c52cf
JS		 6996 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6997 "9047 BLKGRD: ERROR unable to allocate "
3772a991
JS		 6998 "memory for hexdump\n");
6999 } else
6a9c52cf
JS		 7000 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7001 "9048 BLKGRD: already allocated _dump_buf_dif=0x%p\n",
3772a991
JS		 7002 _dump_buf_dif);
7003}
7004
7005/**
7006 * lpfc_post_init_setup - Perform necessary device post initialization setup.
7007 * @phba: pointer to lpfc hba data structure.
7008 *
7009 * This routine is invoked to perform all the necessary post initialization
7010 * setup for the device.
7011 **/
7012static void
7013lpfc_post_init_setup(struct lpfc_hba *phba)
7014{
7015 struct Scsi_Host *shost;
7016 struct lpfc_adapter_event_header adapter_event;
7017
7018 /* Get the default values for Model Name and Description */
7019 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
7020
7021 /*
7022 * hba setup may have changed the hba_queue_depth so we need to
7023 * adjust the value of can_queue.
7024 */
7025 shost = pci_get_drvdata(phba->pcidev);
7026 shost->can_queue = phba->cfg_hba_queue_depth - 10;
7027 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED)
7028 lpfc_setup_bg(phba, shost);
7029
7030 lpfc_host_attrib_init(shost);
7031
7032 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
7033 spin_lock_irq(shost->host_lock);
7034 lpfc_poll_start_timer(phba);
7035 spin_unlock_irq(shost->host_lock);
7036 }
7037
7038 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7039 "0428 Perform SCSI scan\n");
7040 /* Send board arrival event to upper layer */
7041 adapter_event.event_type = FC_REG_ADAPTER_EVENT;
7042 adapter_event.subcategory = LPFC_EVENT_ARRIVAL;
7043 fc_host_post_vendor_event(shost, fc_get_event_number(),
7044 sizeof(adapter_event),
7045 (char *) &adapter_event,
7046 LPFC_NL_VENDOR_ID);
7047 return;
7048}
7049
7050/**
7051 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space.
7052 * @phba: pointer to lpfc hba data structure.
7053 *
7054 * This routine is invoked to set up the PCI device memory space for device
7055 * with SLI-3 interface spec.
7056 *
7057 * Return codes
af901ca1 7058 * 0 - successful
3772a991
JS		 7059 * other values - error
7060 **/
7061static int
7062lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
7063{
7064 struct pci_dev *pdev;
7065 unsigned long bar0map_len, bar2map_len;
7066 int i, hbq_count;
7067 void *ptr;
7068 int error = -ENODEV;
7069
7070 /* Obtain PCI device reference */
7071 if (!phba->pcidev)
7072 return error;
7073 else
7074 pdev = phba->pcidev;
7075
7076 /* Set the device DMA mask size */
8e68597d
MR		 7077 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
7078 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
7079 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
7080 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
3772a991 7081 return error;
8e68597d
MR		 7082 }
7083 }
3772a991
JS		 7084
7085 /* Get the bus address of Bar0 and Bar2 and the number of bytes
7086 * required by each mapping.
7087 */
7088 phba->pci_bar0_map = pci_resource_start(pdev, 0);
7089 bar0map_len = pci_resource_len(pdev, 0);
7090
7091 phba->pci_bar2_map = pci_resource_start(pdev, 2);
7092 bar2map_len = pci_resource_len(pdev, 2);
7093
7094 /* Map HBA SLIM to a kernel virtual address. */
7095 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
7096 if (!phba->slim_memmap_p) {
7097 dev_printk(KERN_ERR, &pdev->dev,
7098 "ioremap failed for SLIM memory.\n");
7099 goto out;
7100 }
7101
7102 /* Map HBA Control Registers to a kernel virtual address. */
7103 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
7104 if (!phba->ctrl_regs_memmap_p) {
7105 dev_printk(KERN_ERR, &pdev->dev,
7106 "ioremap failed for HBA control registers.\n");
7107 goto out_iounmap_slim;
7108 }
7109
7110 /* Allocate memory for SLI-2 structures */
1aee383d
JP		 7111 phba->slim2p.virt = dma_zalloc_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7112 &phba->slim2p.phys, GFP_KERNEL);
3772a991
JS		 7113 if (!phba->slim2p.virt)
7114 goto out_iounmap;
7115
3772a991 7116 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx);
7a470277
JS		 7117 phba->mbox_ext = (phba->slim2p.virt +
7118 offsetof(struct lpfc_sli2_slim, mbx_ext_words));
3772a991
JS		 7119 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb));
7120 phba->IOCBs = (phba->slim2p.virt +
7121 offsetof(struct lpfc_sli2_slim, IOCBs));
7122
7123 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev,
7124 lpfc_sli_hbq_size(),
7125 &phba->hbqslimp.phys,
7126 GFP_KERNEL);
7127 if (!phba->hbqslimp.virt)
7128 goto out_free_slim;
7129
7130 hbq_count = lpfc_sli_hbq_count();
7131 ptr = phba->hbqslimp.virt;
7132 for (i = 0; i < hbq_count; ++i) {
7133 phba->hbqs[i].hbq_virt = ptr;
7134 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list);
7135 ptr += (lpfc_hbq_defs[i]->entry_count *
7136 sizeof(struct lpfc_hbq_entry));
7137 }
7138 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc;
7139 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free;
7140
7141 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size());
7142
3772a991
JS		 7143 phba->MBslimaddr = phba->slim_memmap_p;
7144 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
7145 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
7146 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
7147 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
7148
7149 return 0;
7150
7151out_free_slim:
7152 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7153 phba->slim2p.virt, phba->slim2p.phys);
7154out_iounmap:
7155 iounmap(phba->ctrl_regs_memmap_p);
7156out_iounmap_slim:
7157 iounmap(phba->slim_memmap_p);
7158out:
7159 return error;
7160}
7161
7162/**
7163 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space.
7164 * @phba: pointer to lpfc hba data structure.
7165 *
7166 * This routine is invoked to unset the PCI device memory space for device
7167 * with SLI-3 interface spec.
7168 **/
7169static void
7170lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
7171{
7172 struct pci_dev *pdev;
7173
7174 /* Obtain PCI device reference */
7175 if (!phba->pcidev)
7176 return;
7177 else
7178 pdev = phba->pcidev;
7179
7180 /* Free coherent DMA memory allocated */
7181 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
7182 phba->hbqslimp.virt, phba->hbqslimp.phys);
7183 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7184 phba->slim2p.virt, phba->slim2p.phys);
7185
7186 /* I/O memory unmap */
7187 iounmap(phba->ctrl_regs_memmap_p);
7188 iounmap(phba->slim_memmap_p);
7189
7190 return;
7191}
7192
7193/**
da0436e9 7194 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status
3772a991
JS		 7195 * @phba: pointer to lpfc hba data structure.
7196 *
da0436e9
JS		 7197 * This routine is invoked to wait for SLI4 device Power On Self Test (POST)
7198 * done and check status.
3772a991 7199 *
da0436e9 7200 * Return 0 if successful, otherwise -ENODEV.
3772a991 7201 **/
da0436e9
JS		 7202int
7203lpfc_sli4_post_status_check(struct lpfc_hba *phba)
3772a991 7204{
2fcee4bf
JS		 7205 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg;
7206 struct lpfc_register reg_data;
7207 int i, port_error = 0;
7208 uint32_t if_type;
3772a991 7209
9940b97b
JS		 7210 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
7211 memset(&reg_data, 0, sizeof(reg_data));
2fcee4bf 7212 if (!phba->sli4_hba.PSMPHRregaddr)
da0436e9 7213 return -ENODEV;
3772a991 7214
da0436e9
JS		 7215 /* Wait up to 30 seconds for the SLI Port POST done and ready */
7216 for (i = 0; i < 3000; i++) {
9940b97b
JS		 7217 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
7218 &portsmphr_reg.word0) ||
7219 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) {
2fcee4bf 7220 /* Port has a fatal POST error, break out */
da0436e9
JS		 7221 port_error = -ENODEV;
7222 break;
7223 }
2fcee4bf
JS		 7224 if (LPFC_POST_STAGE_PORT_READY ==
7225 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))
da0436e9 7226 break;
da0436e9 7227 msleep(10);
3772a991
JS		 7228 }
7229
2fcee4bf
JS		 7230 /*
7231 * If there was a port error during POST, then don't proceed with
7232 * other register reads as the data may not be valid. Just exit.
7233 */
7234 if (port_error) {
da0436e9 7235 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2fcee4bf
JS		 7236 "1408 Port Failed POST - portsmphr=0x%x, "
7237 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, "
7238 "scr2=x%x, hscratch=x%x, pstatus=x%x\n",
7239 portsmphr_reg.word0,
7240 bf_get(lpfc_port_smphr_perr, &portsmphr_reg),
7241 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg),
7242 bf_get(lpfc_port_smphr_nip, &portsmphr_reg),
7243 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg),
7244 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg),
7245 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg),
7246 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg),
7247 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg));
7248 } else {
28baac74 7249 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
2fcee4bf
JS		 7250 "2534 Device Info: SLIFamily=0x%x, "
7251 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, "
7252 "SLIHint_2=0x%x, FT=0x%x\n",
28baac74
JS		 7253 bf_get(lpfc_sli_intf_sli_family,
7254 &phba->sli4_hba.sli_intf),
7255 bf_get(lpfc_sli_intf_slirev,
7256 &phba->sli4_hba.sli_intf),
085c647c
JS		 7257 bf_get(lpfc_sli_intf_if_type,
7258 &phba->sli4_hba.sli_intf),
7259 bf_get(lpfc_sli_intf_sli_hint1,
28baac74 7260 &phba->sli4_hba.sli_intf),
085c647c
JS		 7261 bf_get(lpfc_sli_intf_sli_hint2,
7262 &phba->sli4_hba.sli_intf),
7263 bf_get(lpfc_sli_intf_func_type,
28baac74 7264 &phba->sli4_hba.sli_intf));
2fcee4bf
JS		 7265 /*
7266 * Check for other Port errors during the initialization
7267 * process. Fail the load if the port did not come up
7268 * correctly.
7269 */
7270 if_type = bf_get(lpfc_sli_intf_if_type,
7271 &phba->sli4_hba.sli_intf);
7272 switch (if_type) {
7273 case LPFC_SLI_INTF_IF_TYPE_0:
7274 phba->sli4_hba.ue_mask_lo =
7275 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
7276 phba->sli4_hba.ue_mask_hi =
7277 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
7278 uerrlo_reg.word0 =
7279 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
7280 uerrhi_reg.word0 =
7281 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
7282 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
7283 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
7284 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7285 "1422 Unrecoverable Error "
7286 "Detected during POST "
7287 "uerr_lo_reg=0x%x, "
7288 "uerr_hi_reg=0x%x, "
7289 "ue_mask_lo_reg=0x%x, "
7290 "ue_mask_hi_reg=0x%x\n",
7291 uerrlo_reg.word0,
7292 uerrhi_reg.word0,
7293 phba->sli4_hba.ue_mask_lo,
7294 phba->sli4_hba.ue_mask_hi);
7295 port_error = -ENODEV;
7296 }
7297 break;
7298 case LPFC_SLI_INTF_IF_TYPE_2:
7299 /* Final checks. The port status should be clean. */
9940b97b
JS		 7300 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
7301 &reg_data.word0) ||
0558056c
JS		 7302 (bf_get(lpfc_sliport_status_err, &reg_data) &&
7303 !bf_get(lpfc_sliport_status_rn, &reg_data))) {
2fcee4bf
JS		 7304 phba->work_status[0] =
7305 readl(phba->sli4_hba.u.if_type2.
7306 ERR1regaddr);
7307 phba->work_status[1] =
7308 readl(phba->sli4_hba.u.if_type2.
7309 ERR2regaddr);
7310 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8fcb8acd
JS		 7311 "2888 Unrecoverable port error "
7312 "following POST: port status reg "
7313 "0x%x, port_smphr reg 0x%x, "
2fcee4bf
JS		 7314 "error 1=0x%x, error 2=0x%x\n",
7315 reg_data.word0,
7316 portsmphr_reg.word0,
7317 phba->work_status[0],
7318 phba->work_status[1]);
7319 port_error = -ENODEV;
7320 }
7321 break;
7322 case LPFC_SLI_INTF_IF_TYPE_1:
7323 default:
7324 break;
7325 }
28baac74 7326 }
da0436e9
JS		 7327 return port_error;
7328}
3772a991 7329
da0436e9
JS		 7330/**
7331 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map.
7332 * @phba: pointer to lpfc hba data structure.
2fcee4bf 7333 * @if_type: The SLI4 interface type getting configured.
da0436e9
JS		 7334 *
7335 * This routine is invoked to set up SLI4 BAR0 PCI config space register
7336 * memory map.
7337 **/
7338static void
2fcee4bf
JS		 7339lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
7340{
7341 switch (if_type) {
7342 case LPFC_SLI_INTF_IF_TYPE_0:
7343 phba->sli4_hba.u.if_type0.UERRLOregaddr =
7344 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
7345 phba->sli4_hba.u.if_type0.UERRHIregaddr =
7346 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
7347 phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
7348 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
7349 phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
7350 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
7351 phba->sli4_hba.SLIINTFregaddr =
7352 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7353 break;
7354 case LPFC_SLI_INTF_IF_TYPE_2:
0cf07f84
JS		 7355 phba->sli4_hba.u.if_type2.EQDregaddr =
7356 phba->sli4_hba.conf_regs_memmap_p +
7357 LPFC_CTL_PORT_EQ_DELAY_OFFSET;
2fcee4bf 7358 phba->sli4_hba.u.if_type2.ERR1regaddr =
88a2cfbb
JS		 7359 phba->sli4_hba.conf_regs_memmap_p +
7360 LPFC_CTL_PORT_ER1_OFFSET;
2fcee4bf 7361 phba->sli4_hba.u.if_type2.ERR2regaddr =
88a2cfbb
JS		 7362 phba->sli4_hba.conf_regs_memmap_p +
7363 LPFC_CTL_PORT_ER2_OFFSET;
2fcee4bf 7364 phba->sli4_hba.u.if_type2.CTRLregaddr =
88a2cfbb
JS		 7365 phba->sli4_hba.conf_regs_memmap_p +
7366 LPFC_CTL_PORT_CTL_OFFSET;
2fcee4bf 7367 phba->sli4_hba.u.if_type2.STATUSregaddr =
88a2cfbb
JS		 7368 phba->sli4_hba.conf_regs_memmap_p +
7369 LPFC_CTL_PORT_STA_OFFSET;
2fcee4bf
JS		 7370 phba->sli4_hba.SLIINTFregaddr =
7371 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7372 phba->sli4_hba.PSMPHRregaddr =
88a2cfbb
JS		 7373 phba->sli4_hba.conf_regs_memmap_p +
7374 LPFC_CTL_PORT_SEM_OFFSET;
2fcee4bf 7375 phba->sli4_hba.RQDBregaddr =
962bc51b
JS		 7376 phba->sli4_hba.conf_regs_memmap_p +
7377 LPFC_ULP0_RQ_DOORBELL;
2fcee4bf 7378 phba->sli4_hba.WQDBregaddr =
962bc51b
JS		 7379 phba->sli4_hba.conf_regs_memmap_p +
7380 LPFC_ULP0_WQ_DOORBELL;
2fcee4bf
JS		 7381 phba->sli4_hba.EQCQDBregaddr =
7382 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
7383 phba->sli4_hba.MQDBregaddr =
7384 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
7385 phba->sli4_hba.BMBXregaddr =
7386 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
7387 break;
7388 case LPFC_SLI_INTF_IF_TYPE_1:
7389 default:
7390 dev_printk(KERN_ERR, &phba->pcidev->dev,
7391 "FATAL - unsupported SLI4 interface type - %d\n",
7392 if_type);
7393 break;
7394 }
da0436e9 7395}
3772a991 7396
da0436e9
JS		 7397/**
7398 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map.
7399 * @phba: pointer to lpfc hba data structure.
7400 *
7401 * This routine is invoked to set up SLI4 BAR1 control status register (CSR)
7402 * memory map.
7403 **/
7404static void
7405lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba)
7406{
2fcee4bf
JS		 7407 phba->sli4_hba.PSMPHRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
7408 LPFC_SLIPORT_IF0_SMPHR;
da0436e9 7409 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7410 LPFC_HST_ISR0;
da0436e9 7411 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7412 LPFC_HST_IMR0;
da0436e9 7413 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7414 LPFC_HST_ISCR0;
3772a991
JS		 7415}
7416
7417/**
da0436e9 7418 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map.
3772a991 7419 * @phba: pointer to lpfc hba data structure.
da0436e9 7420 * @vf: virtual function number
3772a991 7421 *
da0436e9
JS		 7422 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map
7423 * based on the given viftual function number, @vf.
7424 *
7425 * Return 0 if successful, otherwise -ENODEV.
3772a991 7426 **/
da0436e9
JS		 7427static int
7428lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf)
3772a991 7429{
da0436e9
JS		 7430 if (vf > LPFC_VIR_FUNC_MAX)
7431 return -ENODEV;
3772a991 7432
da0436e9 7433 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS		 7434 vf * LPFC_VFR_PAGE_SIZE +
7435 LPFC_ULP0_RQ_DOORBELL);
da0436e9 7436 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS		 7437 vf * LPFC_VFR_PAGE_SIZE +
7438 LPFC_ULP0_WQ_DOORBELL);
da0436e9
JS		 7439 phba->sli4_hba.EQCQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7440 vf * LPFC_VFR_PAGE_SIZE + LPFC_EQCQ_DOORBELL);
7441 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7442 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL);
7443 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7444 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX);
7445 return 0;
3772a991
JS		 7446}
7447
7448/**
da0436e9 7449 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox
3772a991
JS		 7450 * @phba: pointer to lpfc hba data structure.
7451 *
da0436e9
JS		 7452 * This routine is invoked to create the bootstrap mailbox
7453 * region consistent with the SLI-4 interface spec. This
7454 * routine allocates all memory necessary to communicate
7455 * mailbox commands to the port and sets up all alignment
7456 * needs. No locks are expected to be held when calling
7457 * this routine.
3772a991
JS		 7458 *
7459 * Return codes
af901ca1 7460 * 0 - successful
d439d286 7461 * -ENOMEM - could not allocated memory.
da0436e9 7462 **/
3772a991 7463static int
da0436e9 7464lpfc_create_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7465{
da0436e9
JS		 7466 uint32_t bmbx_size;
7467 struct lpfc_dmabuf *dmabuf;
7468 struct dma_address *dma_address;
7469 uint32_t pa_addr;
7470 uint64_t phys_addr;
7471
7472 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
7473 if (!dmabuf)
7474 return -ENOMEM;
3772a991 7475
da0436e9
JS		 7476 /*
7477 * The bootstrap mailbox region is comprised of 2 parts
7478 * plus an alignment restriction of 16 bytes.
7479 */
7480 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1);
1aee383d
JP		 7481 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev, bmbx_size,
7482 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS		 7483 if (!dmabuf->virt) {
7484 kfree(dmabuf);
7485 return -ENOMEM;
3772a991
JS		 7486 }
7487
da0436e9
JS		 7488 /*
7489 * Initialize the bootstrap mailbox pointers now so that the register
7490 * operations are simple later. The mailbox dma address is required
7491 * to be 16-byte aligned. Also align the virtual memory as each
7492 * maibox is copied into the bmbx mailbox region before issuing the
7493 * command to the port.
7494 */
7495 phba->sli4_hba.bmbx.dmabuf = dmabuf;
7496 phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
7497
7498 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
7499 LPFC_ALIGN_16_BYTE);
7500 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
7501 LPFC_ALIGN_16_BYTE);
7502
7503 /*
7504 * Set the high and low physical addresses now. The SLI4 alignment
7505 * requirement is 16 bytes and the mailbox is posted to the port
7506 * as two 30-bit addresses. The other data is a bit marking whether
7507 * the 30-bit address is the high or low address.
7508 * Upcast bmbx aphys to 64bits so shift instruction compiles
7509 * clean on 32 bit machines.
7510 */
7511 dma_address = &phba->sli4_hba.bmbx.dma_address;
7512 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
7513 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff);
7514 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) |
7515 LPFC_BMBX_BIT1_ADDR_HI);
7516
7517 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
7518 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) |
7519 LPFC_BMBX_BIT1_ADDR_LO);
7520 return 0;
3772a991
JS		 7521}
7522
7523/**
da0436e9 7524 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources
3772a991
JS		 7525 * @phba: pointer to lpfc hba data structure.
7526 *
da0436e9
JS		 7527 * This routine is invoked to teardown the bootstrap mailbox
7528 * region and release all host resources. This routine requires
7529 * the caller to ensure all mailbox commands recovered, no
7530 * additional mailbox comands are sent, and interrupts are disabled
7531 * before calling this routine.
7532 *
7533 **/
3772a991 7534static void
da0436e9 7535lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7536{
da0436e9
JS		 7537 dma_free_coherent(&phba->pcidev->dev,
7538 phba->sli4_hba.bmbx.bmbx_size,
7539 phba->sli4_hba.bmbx.dmabuf->virt,
7540 phba->sli4_hba.bmbx.dmabuf->phys);
7541
7542 kfree(phba->sli4_hba.bmbx.dmabuf);
7543 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
3772a991
JS		 7544}
7545
7546/**
da0436e9 7547 * lpfc_sli4_read_config - Get the config parameters.
3772a991
JS		 7548 * @phba: pointer to lpfc hba data structure.
7549 *
da0436e9
JS		 7550 * This routine is invoked to read the configuration parameters from the HBA.
7551 * The configuration parameters are used to set the base and maximum values
7552 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource
7553 * allocation for the port.
3772a991
JS		 7554 *
7555 * Return codes
af901ca1 7556 * 0 - successful
25985edc 7557 * -ENOMEM - No available memory
d439d286 7558 * -EIO - The mailbox failed to complete successfully.
3772a991 7559 **/
ff78d8f9 7560int
da0436e9 7561lpfc_sli4_read_config(struct lpfc_hba *phba)
3772a991 7562{
da0436e9
JS		 7563 LPFC_MBOXQ_t *pmb;
7564 struct lpfc_mbx_read_config *rd_config;
912e3acd
JS		 7565 union lpfc_sli4_cfg_shdr *shdr;
7566 uint32_t shdr_status, shdr_add_status;
7567 struct lpfc_mbx_get_func_cfg *get_func_cfg;
7568 struct lpfc_rsrc_desc_fcfcoe *desc;
8aa134a8 7569 char *pdesc_0;
c691816e
JS		 7570 uint16_t forced_link_speed;
7571 uint32_t if_type;
8aa134a8 7572 int length, i, rc = 0, rc2;
3772a991 7573
da0436e9
JS		 7574 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
7575 if (!pmb) {
7576 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7577 "2011 Unable to allocate memory for issuing "
7578 "SLI_CONFIG_SPECIAL mailbox command\n");
7579 return -ENOMEM;
3772a991
JS		 7580 }
7581
da0436e9 7582 lpfc_read_config(phba, pmb);
3772a991 7583
da0436e9
JS		 7584 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
7585 if (rc != MBX_SUCCESS) {
7586 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7587 "2012 Mailbox failed , mbxCmd x%x "
7588 "READ_CONFIG, mbxStatus x%x\n",
7589 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7590 bf_get(lpfc_mqe_status, &pmb->u.mqe));
7591 rc = -EIO;
7592 } else {
7593 rd_config = &pmb->u.mqe.un.rd_config;
ff78d8f9
JS		 7594 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) {
7595 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
7596 phba->sli4_hba.lnk_info.lnk_tp =
7597 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config);
7598 phba->sli4_hba.lnk_info.lnk_no =
7599 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config);
7600 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7601 "3081 lnk_type:%d, lnk_numb:%d\n",
7602 phba->sli4_hba.lnk_info.lnk_tp,
7603 phba->sli4_hba.lnk_info.lnk_no);
7604 } else
7605 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
7606 "3082 Mailbox (x%x) returned ldv:x0\n",
7607 bf_get(lpfc_mqe_command, &pmb->u.mqe));
6d368e53
JS		 7608 phba->sli4_hba.extents_in_use =
7609 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config);
da0436e9
JS		 7610 phba->sli4_hba.max_cfg_param.max_xri =
7611 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config);
7612 phba->sli4_hba.max_cfg_param.xri_base =
7613 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config);
7614 phba->sli4_hba.max_cfg_param.max_vpi =
7615 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config);
7616 phba->sli4_hba.max_cfg_param.vpi_base =
7617 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config);
7618 phba->sli4_hba.max_cfg_param.max_rpi =
7619 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config);
7620 phba->sli4_hba.max_cfg_param.rpi_base =
7621 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config);
7622 phba->sli4_hba.max_cfg_param.max_vfi =
7623 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config);
7624 phba->sli4_hba.max_cfg_param.vfi_base =
7625 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config);
7626 phba->sli4_hba.max_cfg_param.max_fcfi =
7627 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config);
da0436e9
JS		 7628 phba->sli4_hba.max_cfg_param.max_eq =
7629 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config);
7630 phba->sli4_hba.max_cfg_param.max_rq =
7631 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config);
7632 phba->sli4_hba.max_cfg_param.max_wq =
7633 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config);
7634 phba->sli4_hba.max_cfg_param.max_cq =
7635 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config);
7636 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config);
7637 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
7638 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
7639 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
5ffc266e
JS		 7640 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
7641 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
da0436e9
JS		 7642 phba->max_vports = phba->max_vpi;
7643 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6d368e53
JS		 7644 "2003 cfg params Extents? %d "
7645 "XRI(B:%d M:%d), "
da0436e9
JS		 7646 "VPI(B:%d M:%d) "
7647 "VFI(B:%d M:%d) "
7648 "RPI(B:%d M:%d) "
2ea259ee 7649 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d\n",
6d368e53 7650 phba->sli4_hba.extents_in_use,
da0436e9
JS		 7651 phba->sli4_hba.max_cfg_param.xri_base,
7652 phba->sli4_hba.max_cfg_param.max_xri,
7653 phba->sli4_hba.max_cfg_param.vpi_base,
7654 phba->sli4_hba.max_cfg_param.max_vpi,
7655 phba->sli4_hba.max_cfg_param.vfi_base,
7656 phba->sli4_hba.max_cfg_param.max_vfi,
7657 phba->sli4_hba.max_cfg_param.rpi_base,
7658 phba->sli4_hba.max_cfg_param.max_rpi,
2ea259ee
JS		 7659 phba->sli4_hba.max_cfg_param.max_fcfi,
7660 phba->sli4_hba.max_cfg_param.max_eq,
7661 phba->sli4_hba.max_cfg_param.max_cq,
7662 phba->sli4_hba.max_cfg_param.max_wq,
7663 phba->sli4_hba.max_cfg_param.max_rq);
7664
3772a991 7665 }
912e3acd
JS		 7666
7667 if (rc)
7668 goto read_cfg_out;
da0436e9 7669
c691816e
JS		 7670 /* Update link speed if forced link speed is supported */
7671 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7672 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
7673 forced_link_speed =
7674 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config);
7675 if (forced_link_speed) {
7676 phba->hba_flag |= HBA_FORCED_LINK_SPEED;
7677
7678 switch (forced_link_speed) {
7679 case LINK_SPEED_1G:
7680 phba->cfg_link_speed =
7681 LPFC_USER_LINK_SPEED_1G;
7682 break;
7683 case LINK_SPEED_2G:
7684 phba->cfg_link_speed =
7685 LPFC_USER_LINK_SPEED_2G;
7686 break;
7687 case LINK_SPEED_4G:
7688 phba->cfg_link_speed =
7689 LPFC_USER_LINK_SPEED_4G;
7690 break;
7691 case LINK_SPEED_8G:
7692 phba->cfg_link_speed =
7693 LPFC_USER_LINK_SPEED_8G;
7694 break;
7695 case LINK_SPEED_10G:
7696 phba->cfg_link_speed =
7697 LPFC_USER_LINK_SPEED_10G;
7698 break;
7699 case LINK_SPEED_16G:
7700 phba->cfg_link_speed =
7701 LPFC_USER_LINK_SPEED_16G;
7702 break;
7703 case LINK_SPEED_32G:
7704 phba->cfg_link_speed =
7705 LPFC_USER_LINK_SPEED_32G;
7706 break;
7707 case 0xffff:
7708 phba->cfg_link_speed =
7709 LPFC_USER_LINK_SPEED_AUTO;
7710 break;
7711 default:
7712 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7713 "0047 Unrecognized link "
7714 "speed : %d\n",
7715 forced_link_speed);
7716 phba->cfg_link_speed =
7717 LPFC_USER_LINK_SPEED_AUTO;
7718 }
7719 }
7720 }
7721
da0436e9 7722 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS		 7723 length = phba->sli4_hba.max_cfg_param.max_xri -
7724 lpfc_sli4_get_els_iocb_cnt(phba);
7725 if (phba->cfg_hba_queue_depth > length) {
7726 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7727 "3361 HBA queue depth changed from %d to %d\n",
7728 phba->cfg_hba_queue_depth, length);
7729 phba->cfg_hba_queue_depth = length;
7730 }
912e3acd
JS		 7731
7732 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
7733 LPFC_SLI_INTF_IF_TYPE_2)
7734 goto read_cfg_out;
7735
7736 /* get the pf# and vf# for SLI4 if_type 2 port */
7737 length = (sizeof(struct lpfc_mbx_get_func_cfg) -
7738 sizeof(struct lpfc_sli4_cfg_mhdr));
7739 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON,
7740 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG,
7741 length, LPFC_SLI4_MBX_EMBED);
7742
8aa134a8 7743 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
912e3acd
JS		 7744 shdr = (union lpfc_sli4_cfg_shdr *)
7745 &pmb->u.mqe.un.sli4_config.header.cfg_shdr;
7746 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
7747 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8aa134a8 7748 if (rc2 || shdr_status || shdr_add_status) {
912e3acd
JS		 7749 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7750 "3026 Mailbox failed , mbxCmd x%x "
7751 "GET_FUNCTION_CONFIG, mbxStatus x%x\n",
7752 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7753 bf_get(lpfc_mqe_status, &pmb->u.mqe));
912e3acd
JS		 7754 goto read_cfg_out;
7755 }
7756
7757 /* search for fc_fcoe resrouce descriptor */
7758 get_func_cfg = &pmb->u.mqe.un.get_func_cfg;
912e3acd 7759
8aa134a8
JS		 7760 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0];
7761 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0;
7762 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc);
7763 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD)
7764 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH;
7765 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH)
7766 goto read_cfg_out;
7767
912e3acd 7768 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) {
8aa134a8 7769 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i);
912e3acd 7770 if (LPFC_RSRC_DESC_TYPE_FCFCOE ==
8aa134a8 7771 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) {
912e3acd
JS		 7772 phba->sli4_hba.iov.pf_number =
7773 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc);
7774 phba->sli4_hba.iov.vf_number =
7775 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc);
7776 break;
7777 }
7778 }
7779
7780 if (i < LPFC_RSRC_DESC_MAX_NUM)
7781 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7782 "3027 GET_FUNCTION_CONFIG: pf_number:%d, "
7783 "vf_number:%d\n", phba->sli4_hba.iov.pf_number,
7784 phba->sli4_hba.iov.vf_number);
8aa134a8 7785 else
912e3acd
JS		 7786 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7787 "3028 GET_FUNCTION_CONFIG: failed to find "
7788 "Resrouce Descriptor:x%x\n",
7789 LPFC_RSRC_DESC_TYPE_FCFCOE);
912e3acd
JS		 7790
7791read_cfg_out:
7792 mempool_free(pmb, phba->mbox_mem_pool);
da0436e9 7793 return rc;
3772a991
JS		 7794}
7795
7796/**
2fcee4bf 7797 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port.
3772a991
JS		 7798 * @phba: pointer to lpfc hba data structure.
7799 *
2fcee4bf
JS		 7800 * This routine is invoked to setup the port-side endian order when
7801 * the port if_type is 0. This routine has no function for other
7802 * if_types.
da0436e9
JS		 7803 *
7804 * Return codes
af901ca1 7805 * 0 - successful
25985edc 7806 * -ENOMEM - No available memory
d439d286 7807 * -EIO - The mailbox failed to complete successfully.
3772a991 7808 **/
da0436e9
JS		 7809static int
7810lpfc_setup_endian_order(struct lpfc_hba *phba)
3772a991 7811{
da0436e9 7812 LPFC_MBOXQ_t *mboxq;
2fcee4bf 7813 uint32_t if_type, rc = 0;
da0436e9
JS		 7814 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0,
7815 HOST_ENDIAN_HIGH_WORD1};
3772a991 7816
2fcee4bf
JS		 7817 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7818 switch (if_type) {
7819 case LPFC_SLI_INTF_IF_TYPE_0:
7820 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
7821 GFP_KERNEL);
7822 if (!mboxq) {
7823 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7824 "0492 Unable to allocate memory for "
7825 "issuing SLI_CONFIG_SPECIAL mailbox "
7826 "command\n");
7827 return -ENOMEM;
7828 }
3772a991 7829
2fcee4bf
JS		 7830 /*
7831 * The SLI4_CONFIG_SPECIAL mailbox command requires the first
7832 * two words to contain special data values and no other data.
7833 */
7834 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t));
7835 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data));
7836 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7837 if (rc != MBX_SUCCESS) {
7838 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7839 "0493 SLI_CONFIG_SPECIAL mailbox "
7840 "failed with status x%x\n",
7841 rc);
7842 rc = -EIO;
7843 }
7844 mempool_free(mboxq, phba->mbox_mem_pool);
7845 break;
7846 case LPFC_SLI_INTF_IF_TYPE_2:
7847 case LPFC_SLI_INTF_IF_TYPE_1:
7848 default:
7849 break;
da0436e9 7850 }
da0436e9 7851 return rc;
3772a991
JS		 7852}
7853
7854/**
895427bd 7855 * lpfc_sli4_queue_verify - Verify and update EQ counts
3772a991
JS		 7856 * @phba: pointer to lpfc hba data structure.
7857 *
895427bd
JS		 7858 * This routine is invoked to check the user settable queue counts for EQs.
7859 * After this routine is called the counts will be set to valid values that
5350d872
JS		 7860 * adhere to the constraints of the system's interrupt vectors and the port's
7861 * queue resources.
da0436e9
JS		 7862 *
7863 * Return codes
af901ca1 7864 * 0 - successful
25985edc 7865 * -ENOMEM - No available memory
3772a991 7866 **/
da0436e9 7867static int
5350d872 7868lpfc_sli4_queue_verify(struct lpfc_hba *phba)
3772a991 7869{
895427bd 7870 int io_channel;
1ba981fd 7871 int fof_vectors = phba->cfg_fof ? 1 : 0;
3772a991 7872
da0436e9 7873 /*
67d12733 7874 * Sanity check for configured queue parameters against the run-time
da0436e9
JS		 7875 * device parameters
7876 */
3772a991 7877
67d12733 7878 /* Sanity check on HBA EQ parameters */
895427bd 7879 io_channel = phba->io_channel_irqs;
67d12733 7880
895427bd 7881 if (phba->sli4_hba.num_online_cpu < io_channel) {
82c3e9ba
JS		 7882 lpfc_printf_log(phba,
7883 KERN_ERR, LOG_INIT,
90695ee0 7884 "3188 Reducing IO channels to match number of "
7bb03bbf 7885 "online CPUs: from %d to %d\n",
895427bd
JS		 7886 io_channel, phba->sli4_hba.num_online_cpu);
7887 io_channel = phba->sli4_hba.num_online_cpu;
90695ee0
JS		 7888 }
7889
895427bd 7890 if (io_channel + fof_vectors > phba->sli4_hba.max_cfg_param.max_eq) {
82c3e9ba
JS		 7891 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7892 "2575 Reducing IO channels to match number of "
7893 "available EQs: from %d to %d\n",
895427bd 7894 io_channel,
82c3e9ba 7895 phba->sli4_hba.max_cfg_param.max_eq);
895427bd 7896 io_channel = phba->sli4_hba.max_cfg_param.max_eq - fof_vectors;
da0436e9 7897 }
67d12733 7898
895427bd
JS		 7899 /* The actual number of FCP / NVME event queues adopted */
7900 if (io_channel != phba->io_channel_irqs)
7901 phba->io_channel_irqs = io_channel;
7902 if (phba->cfg_fcp_io_channel > io_channel)
7903 phba->cfg_fcp_io_channel = io_channel;
7904 if (phba->cfg_nvme_io_channel > io_channel)
7905 phba->cfg_nvme_io_channel = io_channel;
2d7dbc4c
JS		 7906 if (phba->cfg_nvme_io_channel < phba->cfg_nvmet_mrq)
7907 phba->cfg_nvmet_mrq = phba->cfg_nvme_io_channel;
895427bd
JS		 7908
7909 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2d7dbc4c 7910 "2574 IO channels: irqs %d fcp %d nvme %d MRQ: %d\n",
895427bd 7911 phba->io_channel_irqs, phba->cfg_fcp_io_channel,
2d7dbc4c 7912 phba->cfg_nvme_io_channel, phba->cfg_nvmet_mrq);
3772a991 7913
da0436e9
JS		 7914 /* Get EQ depth from module parameter, fake the default for now */
7915 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
7916 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
3772a991 7917
5350d872
JS		 7918 /* Get CQ depth from module parameter, fake the default for now */
7919 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
7920 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
895427bd
JS		 7921 return 0;
7922}
7923
7924static int
7925lpfc_alloc_nvme_wq_cq(struct lpfc_hba *phba, int wqidx)
7926{
7927 struct lpfc_queue *qdesc;
7928 int cnt;
5350d872 7929
895427bd
JS		 7930 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7931 phba->sli4_hba.cq_ecount);
7932 if (!qdesc) {
7933 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7934 "0508 Failed allocate fast-path NVME CQ (%d)\n",
7935 wqidx);
7936 return 1;
7937 }
7938 phba->sli4_hba.nvme_cq[wqidx] = qdesc;
7939
7940 cnt = LPFC_NVME_WQSIZE;
7941 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_WQE128_SIZE, cnt);
7942 if (!qdesc) {
7943 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7944 "0509 Failed allocate fast-path NVME WQ (%d)\n",
7945 wqidx);
7946 return 1;
7947 }
7948 phba->sli4_hba.nvme_wq[wqidx] = qdesc;
7949 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
7950 return 0;
7951}
7952
7953static int
7954lpfc_alloc_fcp_wq_cq(struct lpfc_hba *phba, int wqidx)
7955{
7956 struct lpfc_queue *qdesc;
7957 uint32_t wqesize;
7958
7959 /* Create Fast Path FCP CQs */
7960 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7961 phba->sli4_hba.cq_ecount);
7962 if (!qdesc) {
7963 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7964 "0499 Failed allocate fast-path FCP CQ (%d)\n", wqidx);
7965 return 1;
7966 }
7967 phba->sli4_hba.fcp_cq[wqidx] = qdesc;
7968
7969 /* Create Fast Path FCP WQs */
7970 wqesize = (phba->fcp_embed_io) ?
d1f525aa 7971 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
895427bd
JS		 7972 qdesc = lpfc_sli4_queue_alloc(phba, wqesize, phba->sli4_hba.wq_ecount);
7973 if (!qdesc) {
7974 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7975 "0503 Failed allocate fast-path FCP WQ (%d)\n",
7976 wqidx);
7977 return 1;
7978 }
7979 phba->sli4_hba.fcp_wq[wqidx] = qdesc;
7980 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
5350d872 7981 return 0;
5350d872
JS		 7982}
7983
7984/**
7985 * lpfc_sli4_queue_create - Create all the SLI4 queues
7986 * @phba: pointer to lpfc hba data structure.
7987 *
7988 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA
7989 * operation. For each SLI4 queue type, the parameters such as queue entry
7990 * count (queue depth) shall be taken from the module parameter. For now,
7991 * we just use some constant number as place holder.
7992 *
7993 * Return codes
4907cb7b 7994 * 0 - successful
5350d872
JS		 7995 * -ENOMEM - No availble memory
7996 * -EIO - The mailbox failed to complete successfully.
7997 **/
7998int
7999lpfc_sli4_queue_create(struct lpfc_hba *phba)
8000{
8001 struct lpfc_queue *qdesc;
d1f525aa 8002 int idx, io_channel;
5350d872
JS		 8003
8004 /*
67d12733 8005 * Create HBA Record arrays.
895427bd 8006 * Both NVME and FCP will share that same vectors / EQs
5350d872 8007 */
895427bd
JS		 8008 io_channel = phba->io_channel_irqs;
8009 if (!io_channel)
67d12733 8010 return -ERANGE;
5350d872 8011
67d12733
JS		 8012 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
8013 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
8014 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
8015 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
8016 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
8017 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
895427bd
JS		 8018 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
8019 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
8020 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
8021 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
67d12733 8022
895427bd
JS		 8023 phba->sli4_hba.hba_eq = kcalloc(io_channel,
8024 sizeof(struct lpfc_queue *),
8025 GFP_KERNEL);
67d12733
JS		 8026 if (!phba->sli4_hba.hba_eq) {
8027 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8028 "2576 Failed allocate memory for "
8029 "fast-path EQ record array\n");
8030 goto out_error;
8031 }
8032
895427bd
JS		 8033 if (phba->cfg_fcp_io_channel) {
8034 phba->sli4_hba.fcp_cq = kcalloc(phba->cfg_fcp_io_channel,
8035 sizeof(struct lpfc_queue *),
8036 GFP_KERNEL);
8037 if (!phba->sli4_hba.fcp_cq) {
8038 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8039 "2577 Failed allocate memory for "
8040 "fast-path CQ record array\n");
8041 goto out_error;
8042 }
8043 phba->sli4_hba.fcp_wq = kcalloc(phba->cfg_fcp_io_channel,
8044 sizeof(struct lpfc_queue *),
8045 GFP_KERNEL);
8046 if (!phba->sli4_hba.fcp_wq) {
8047 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8048 "2578 Failed allocate memory for "
8049 "fast-path FCP WQ record array\n");
8050 goto out_error;
8051 }
8052 /*
8053 * Since the first EQ can have multiple CQs associated with it,
8054 * this array is used to quickly see if we have a FCP fast-path
8055 * CQ match.
8056 */
8057 phba->sli4_hba.fcp_cq_map = kcalloc(phba->cfg_fcp_io_channel,
8058 sizeof(uint16_t),
8059 GFP_KERNEL);
8060 if (!phba->sli4_hba.fcp_cq_map) {
8061 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8062 "2545 Failed allocate memory for "
8063 "fast-path CQ map\n");
8064 goto out_error;
8065 }
67d12733
JS		 8066 }
8067
895427bd
JS		 8068 if (phba->cfg_nvme_io_channel) {
8069 phba->sli4_hba.nvme_cq = kcalloc(phba->cfg_nvme_io_channel,
8070 sizeof(struct lpfc_queue *),
8071 GFP_KERNEL);
8072 if (!phba->sli4_hba.nvme_cq) {
8073 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8074 "6077 Failed allocate memory for "
8075 "fast-path CQ record array\n");
8076 goto out_error;
8077 }
da0436e9 8078
895427bd
JS		 8079 phba->sli4_hba.nvme_wq = kcalloc(phba->cfg_nvme_io_channel,
8080 sizeof(struct lpfc_queue *),
8081 GFP_KERNEL);
8082 if (!phba->sli4_hba.nvme_wq) {
8083 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8084 "2581 Failed allocate memory for "
8085 "fast-path NVME WQ record array\n");
8086 goto out_error;
8087 }
8088
8089 /*
8090 * Since the first EQ can have multiple CQs associated with it,
8091 * this array is used to quickly see if we have a NVME fast-path
8092 * CQ match.
8093 */
8094 phba->sli4_hba.nvme_cq_map = kcalloc(phba->cfg_nvme_io_channel,
8095 sizeof(uint16_t),
8096 GFP_KERNEL);
8097 if (!phba->sli4_hba.nvme_cq_map) {
8098 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8099 "6078 Failed allocate memory for "
8100 "fast-path CQ map\n");
8101 goto out_error;
8102 }
2d7dbc4c
JS		 8103
8104 if (phba->nvmet_support) {
8105 phba->sli4_hba.nvmet_cqset = kcalloc(
8106 phba->cfg_nvmet_mrq,
8107 sizeof(struct lpfc_queue *),
8108 GFP_KERNEL);
8109 if (!phba->sli4_hba.nvmet_cqset) {
8110 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8111 "3121 Fail allocate memory for "
8112 "fast-path CQ set array\n");
8113 goto out_error;
8114 }
8115 phba->sli4_hba.nvmet_mrq_hdr = kcalloc(
8116 phba->cfg_nvmet_mrq,
8117 sizeof(struct lpfc_queue *),
8118 GFP_KERNEL);
8119 if (!phba->sli4_hba.nvmet_mrq_hdr) {
8120 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8121 "3122 Fail allocate memory for "
8122 "fast-path RQ set hdr array\n");
8123 goto out_error;
8124 }
8125 phba->sli4_hba.nvmet_mrq_data = kcalloc(
8126 phba->cfg_nvmet_mrq,
8127 sizeof(struct lpfc_queue *),
8128 GFP_KERNEL);
8129 if (!phba->sli4_hba.nvmet_mrq_data) {
8130 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8131 "3124 Fail allocate memory for "
8132 "fast-path RQ set data array\n");
8133 goto out_error;
8134 }
8135 }
da0436e9 8136 }
67d12733 8137
895427bd 8138 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
67d12733 8139
895427bd
JS		 8140 /* Create HBA Event Queues (EQs) */
8141 for (idx = 0; idx < io_channel; idx++) {
67d12733 8142 /* Create EQs */
da0436e9
JS		 8143 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.eq_esize,
8144 phba->sli4_hba.eq_ecount);
8145 if (!qdesc) {
8146 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
67d12733
JS		 8147 "0497 Failed allocate EQ (%d)\n", idx);
8148 goto out_error;
da0436e9 8149 }
67d12733 8150 phba->sli4_hba.hba_eq[idx] = qdesc;
895427bd 8151 }
67d12733 8152
895427bd 8153 /* FCP and NVME io channels are not required to be balanced */
67d12733 8154
895427bd
JS		 8155 for (idx = 0; idx < phba->cfg_fcp_io_channel; idx++)
8156 if (lpfc_alloc_fcp_wq_cq(phba, idx))
67d12733 8157 goto out_error;
da0436e9 8158
895427bd
JS		 8159 for (idx = 0; idx < phba->cfg_nvme_io_channel; idx++)
8160 if (lpfc_alloc_nvme_wq_cq(phba, idx))
8161 goto out_error;
67d12733 8162
2d7dbc4c
JS		 8163 if (phba->nvmet_support) {
8164 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
8165 qdesc = lpfc_sli4_queue_alloc(phba,
8166 phba->sli4_hba.cq_esize,
8167 phba->sli4_hba.cq_ecount);
8168 if (!qdesc) {
8169 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8170 "3142 Failed allocate NVME "
8171 "CQ Set (%d)\n", idx);
8172 goto out_error;
8173 }
8174 phba->sli4_hba.nvmet_cqset[idx] = qdesc;
8175 }
8176 }
8177
da0436e9 8178 /*
67d12733 8179 * Create Slow Path Completion Queues (CQs)
da0436e9
JS		 8180 */
8181
da0436e9
JS		 8182 /* Create slow-path Mailbox Command Complete Queue */
8183 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
8184 phba->sli4_hba.cq_ecount);
8185 if (!qdesc) {
8186 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8187 "0500 Failed allocate slow-path mailbox CQ\n");
67d12733 8188 goto out_error;
da0436e9
JS		 8189 }
8190 phba->sli4_hba.mbx_cq = qdesc;
8191
8192 /* Create slow-path ELS Complete Queue */
8193 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
8194 phba->sli4_hba.cq_ecount);
8195 if (!qdesc) {
8196 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8197 "0501 Failed allocate slow-path ELS CQ\n");
67d12733 8198 goto out_error;
da0436e9
JS		 8199 }
8200 phba->sli4_hba.els_cq = qdesc;
8201
da0436e9 8202
5350d872 8203 /*
67d12733 8204 * Create Slow Path Work Queues (WQs)
5350d872 8205 */
da0436e9
JS		 8206
8207 /* Create Mailbox Command Queue */
da0436e9
JS		 8208
8209 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.mq_esize,
8210 phba->sli4_hba.mq_ecount);
8211 if (!qdesc) {
8212 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8213 "0505 Failed allocate slow-path MQ\n");
67d12733 8214 goto out_error;
da0436e9
JS		 8215 }
8216 phba->sli4_hba.mbx_wq = qdesc;
8217
8218 /*
67d12733 8219 * Create ELS Work Queues
da0436e9 8220 */
da0436e9
JS		 8221
8222 /* Create slow-path ELS Work Queue */
8223 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
8224 phba->sli4_hba.wq_ecount);
8225 if (!qdesc) {
8226 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8227 "0504 Failed allocate slow-path ELS WQ\n");
67d12733 8228 goto out_error;
da0436e9
JS		 8229 }
8230 phba->sli4_hba.els_wq = qdesc;
895427bd
JS		 8231 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8232
8233 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8234 /* Create NVME LS Complete Queue */
8235 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
8236 phba->sli4_hba.cq_ecount);
8237 if (!qdesc) {
8238 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8239 "6079 Failed allocate NVME LS CQ\n");
8240 goto out_error;
8241 }
8242 phba->sli4_hba.nvmels_cq = qdesc;
8243
8244 /* Create NVME LS Work Queue */
8245 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
8246 phba->sli4_hba.wq_ecount);
8247 if (!qdesc) {
8248 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8249 "6080 Failed allocate NVME LS WQ\n");
8250 goto out_error;
8251 }
8252 phba->sli4_hba.nvmels_wq = qdesc;
8253 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8254 }
da0436e9 8255
da0436e9
JS		 8256 /*
8257 * Create Receive Queue (RQ)
8258 */
da0436e9
JS		 8259
8260 /* Create Receive Queue for header */
8261 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.rq_esize,
8262 phba->sli4_hba.rq_ecount);
8263 if (!qdesc) {
8264 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8265 "0506 Failed allocate receive HRQ\n");
67d12733 8266 goto out_error;
da0436e9
JS		 8267 }
8268 phba->sli4_hba.hdr_rq = qdesc;
8269
8270 /* Create Receive Queue for data */
8271 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.rq_esize,
8272 phba->sli4_hba.rq_ecount);
8273 if (!qdesc) {
8274 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8275 "0507 Failed allocate receive DRQ\n");
67d12733 8276 goto out_error;
da0436e9
JS		 8277 }
8278 phba->sli4_hba.dat_rq = qdesc;
8279
2d7dbc4c
JS		 8280 if (phba->nvmet_support) {
8281 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
8282 /* Create NVMET Receive Queue for header */
8283 qdesc = lpfc_sli4_queue_alloc(phba,
8284 phba->sli4_hba.rq_esize,
61f3d4bf 8285 LPFC_NVMET_RQE_DEF_COUNT);
2d7dbc4c
JS		 8286 if (!qdesc) {
8287 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8288 "3146 Failed allocate "
8289 "receive HRQ\n");
8290 goto out_error;
8291 }
8292 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc;
8293
8294 /* Only needed for header of RQ pair */
8295 qdesc->rqbp = kzalloc(sizeof(struct lpfc_rqb),
8296 GFP_KERNEL);
8297 if (qdesc->rqbp == NULL) {
8298 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8299 "6131 Failed allocate "
8300 "Header RQBP\n");
8301 goto out_error;
8302 }
8303
8304 /* Create NVMET Receive Queue for data */
8305 qdesc = lpfc_sli4_queue_alloc(phba,
8306 phba->sli4_hba.rq_esize,
61f3d4bf 8307 LPFC_NVMET_RQE_DEF_COUNT);
2d7dbc4c
JS		 8308 if (!qdesc) {
8309 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8310 "3156 Failed allocate "
8311 "receive DRQ\n");
8312 goto out_error;
8313 }
8314 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc;
8315 }
8316 }
8317
1ba981fd
JS		 8318 /* Create the Queues needed for Flash Optimized Fabric operations */
8319 if (phba->cfg_fof)
8320 lpfc_fof_queue_create(phba);
da0436e9
JS		 8321 return 0;
8322
da0436e9 8323out_error:
67d12733 8324 lpfc_sli4_queue_destroy(phba);
da0436e9
JS		 8325 return -ENOMEM;
8326}
8327
895427bd
JS		 8328static inline void
8329__lpfc_sli4_release_queue(struct lpfc_queue **qp)
8330{
8331 if (*qp != NULL) {
8332 lpfc_sli4_queue_free(*qp);
8333 *qp = NULL;
8334 }
8335}
8336
8337static inline void
8338lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max)
8339{
8340 int idx;
8341
8342 if (*qs == NULL)
8343 return;
8344
8345 for (idx = 0; idx < max; idx++)
8346 __lpfc_sli4_release_queue(&(*qs)[idx]);
8347
8348 kfree(*qs);
8349 *qs = NULL;
8350}
8351
8352static inline void
8353lpfc_sli4_release_queue_map(uint16_t **qmap)
8354{
8355 if (*qmap != NULL) {
8356 kfree(*qmap);
8357 *qmap = NULL;
8358 }
8359}
8360
da0436e9
JS		 8361/**
8362 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues
8363 * @phba: pointer to lpfc hba data structure.
8364 *
8365 * This routine is invoked to release all the SLI4 queues with the FCoE HBA
8366 * operation.
8367 *
8368 * Return codes
af901ca1 8369 * 0 - successful
25985edc 8370 * -ENOMEM - No available memory
d439d286 8371 * -EIO - The mailbox failed to complete successfully.
da0436e9 8372 **/
5350d872 8373void
da0436e9
JS		 8374lpfc_sli4_queue_destroy(struct lpfc_hba *phba)
8375{
1ba981fd
JS		 8376 if (phba->cfg_fof)
8377 lpfc_fof_queue_destroy(phba);
8378
895427bd
JS		 8379 /* Release HBA eqs */
8380 lpfc_sli4_release_queues(&phba->sli4_hba.hba_eq, phba->io_channel_irqs);
8381
8382 /* Release FCP cqs */
8383 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_cq,
d1f525aa 8384 phba->cfg_fcp_io_channel);
895427bd
JS		 8385
8386 /* Release FCP wqs */
8387 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_wq,
d1f525aa 8388 phba->cfg_fcp_io_channel);
895427bd
JS		 8389
8390 /* Release FCP CQ mapping array */
8391 lpfc_sli4_release_queue_map(&phba->sli4_hba.fcp_cq_map);
8392
8393 /* Release NVME cqs */
8394 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_cq,
8395 phba->cfg_nvme_io_channel);
8396
8397 /* Release NVME wqs */
8398 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_wq,
8399 phba->cfg_nvme_io_channel);
8400
8401 /* Release NVME CQ mapping array */
8402 lpfc_sli4_release_queue_map(&phba->sli4_hba.nvme_cq_map);
8403
2d7dbc4c
JS		 8404 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset,
8405 phba->cfg_nvmet_mrq);
8406
8407 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr,
8408 phba->cfg_nvmet_mrq);
8409 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data,
8410 phba->cfg_nvmet_mrq);
8411
895427bd
JS		 8412 /* Release mailbox command work queue */
8413 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq);
8414
8415 /* Release ELS work queue */
8416 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq);
8417
8418 /* Release ELS work queue */
8419 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq);
8420
8421 /* Release unsolicited receive queue */
8422 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq);
8423 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq);
8424
8425 /* Release ELS complete queue */
8426 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq);
8427
8428 /* Release NVME LS complete queue */
8429 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq);
8430
8431 /* Release mailbox command complete queue */
8432 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq);
8433
8434 /* Everything on this list has been freed */
8435 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
8436}
8437
895427bd
JS		 8438int
8439lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq)
8440{
8441 struct lpfc_rqb *rqbp;
8442 struct lpfc_dmabuf *h_buf;
8443 struct rqb_dmabuf *rqb_buffer;
8444
8445 rqbp = rq->rqbp;
8446 while (!list_empty(&rqbp->rqb_buffer_list)) {
8447 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
8448 struct lpfc_dmabuf, list);
8449
8450 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf);
8451 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
8452 rqbp->buffer_count--;
67d12733 8453 }
895427bd
JS		 8454 return 1;
8455}
67d12733 8456
895427bd
JS		 8457static int
8458lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq,
8459 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map,
8460 int qidx, uint32_t qtype)
8461{
8462 struct lpfc_sli_ring *pring;
8463 int rc;
8464
8465 if (!eq || !cq || !wq) {
8466 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8467 "6085 Fast-path %s (%d) not allocated\n",
8468 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx);
8469 return -ENOMEM;
8470 }
8471
8472 /* create the Cq first */
8473 rc = lpfc_cq_create(phba, cq, eq,
8474 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype);
8475 if (rc) {
8476 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8477 "6086 Failed setup of CQ (%d), rc = 0x%x\n",
8478 qidx, (uint32_t)rc);
8479 return rc;
67d12733
JS		 8480 }
8481
895427bd
JS		 8482 if (qtype != LPFC_MBOX) {
8483 /* Setup nvme_cq_map for fast lookup */
8484 if (cq_map)
8485 *cq_map = cq->queue_id;
da0436e9 8486
895427bd
JS		 8487 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8488 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n",
8489 qidx, cq->queue_id, qidx, eq->queue_id);
da0436e9 8490
895427bd
JS		 8491 /* create the wq */
8492 rc = lpfc_wq_create(phba, wq, cq, qtype);
8493 if (rc) {
8494 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8495 "6123 Fail setup fastpath WQ (%d), rc = 0x%x\n",
8496 qidx, (uint32_t)rc);
8497 /* no need to tear down cq - caller will do so */
8498 return rc;
8499 }
da0436e9 8500
895427bd
JS		 8501 /* Bind this CQ/WQ to the NVME ring */
8502 pring = wq->pring;
8503 pring->sli.sli4.wqp = (void *)wq;
8504 cq->pring = pring;
da0436e9 8505
895427bd
JS		 8506 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8507 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n",
8508 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id);
8509 } else {
8510 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX);
8511 if (rc) {
8512 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8513 "0539 Failed setup of slow-path MQ: "
8514 "rc = 0x%x\n", rc);
8515 /* no need to tear down cq - caller will do so */
8516 return rc;
8517 }
da0436e9 8518
895427bd
JS		 8519 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8520 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n",
8521 phba->sli4_hba.mbx_wq->queue_id,
8522 phba->sli4_hba.mbx_cq->queue_id);
67d12733 8523 }
da0436e9 8524
895427bd 8525 return 0;
da0436e9
JS		 8526}
8527
8528/**
8529 * lpfc_sli4_queue_setup - Set up all the SLI4 queues
8530 * @phba: pointer to lpfc hba data structure.
8531 *
8532 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA
8533 * operation.
8534 *
8535 * Return codes
af901ca1 8536 * 0 - successful
25985edc 8537 * -ENOMEM - No available memory
d439d286 8538 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS		 8539 **/
8540int
8541lpfc_sli4_queue_setup(struct lpfc_hba *phba)
8542{
962bc51b
JS		 8543 uint32_t shdr_status, shdr_add_status;
8544 union lpfc_sli4_cfg_shdr *shdr;
8545 LPFC_MBOXQ_t *mboxq;
895427bd
JS		 8546 int qidx;
8547 uint32_t length, io_channel;
8548 int rc = -ENOMEM;
962bc51b
JS		 8549
8550 /* Check for dual-ULP support */
8551 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
8552 if (!mboxq) {
8553 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8554 "3249 Unable to allocate memory for "
8555 "QUERY_FW_CFG mailbox command\n");
8556 return -ENOMEM;
8557 }
8558 length = (sizeof(struct lpfc_mbx_query_fw_config) -
8559 sizeof(struct lpfc_sli4_cfg_mhdr));
8560 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
8561 LPFC_MBOX_OPCODE_QUERY_FW_CFG,
8562 length, LPFC_SLI4_MBX_EMBED);
8563
8564 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
8565
8566 shdr = (union lpfc_sli4_cfg_shdr *)
8567 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
8568 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
8569 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8570 if (shdr_status || shdr_add_status || rc) {
8571 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8572 "3250 QUERY_FW_CFG mailbox failed with status "
8573 "x%x add_status x%x, mbx status x%x\n",
8574 shdr_status, shdr_add_status, rc);
8575 if (rc != MBX_TIMEOUT)
8576 mempool_free(mboxq, phba->mbox_mem_pool);
8577 rc = -ENXIO;
8578 goto out_error;
8579 }
8580
8581 phba->sli4_hba.fw_func_mode =
8582 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode;
8583 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode;
8584 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode;
8b017a30
JS		 8585 phba->sli4_hba.physical_port =
8586 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port;
962bc51b
JS		 8587 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8588 "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, "
8589 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode,
8590 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode);
8591
8592 if (rc != MBX_TIMEOUT)
8593 mempool_free(mboxq, phba->mbox_mem_pool);
da0436e9
JS		 8594
8595 /*
67d12733 8596 * Set up HBA Event Queues (EQs)
da0436e9 8597 */
895427bd 8598 io_channel = phba->io_channel_irqs;
da0436e9 8599
67d12733 8600 /* Set up HBA event queue */
895427bd 8601 if (io_channel && !phba->sli4_hba.hba_eq) {
2e90f4b5
JS		 8602 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8603 "3147 Fast-path EQs not allocated\n");
1b51197d 8604 rc = -ENOMEM;
67d12733 8605 goto out_error;
2e90f4b5 8606 }
895427bd
JS		 8607 for (qidx = 0; qidx < io_channel; qidx++) {
8608 if (!phba->sli4_hba.hba_eq[qidx]) {
da0436e9
JS		 8609 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8610 "0522 Fast-path EQ (%d) not "
895427bd 8611 "allocated\n", qidx);
1b51197d 8612 rc = -ENOMEM;
895427bd 8613 goto out_destroy;
da0436e9 8614 }
895427bd
JS		 8615 rc = lpfc_eq_create(phba, phba->sli4_hba.hba_eq[qidx],
8616 phba->cfg_fcp_imax);
da0436e9
JS		 8617 if (rc) {
8618 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8619 "0523 Failed setup of fast-path EQ "
895427bd 8620 "(%d), rc = 0x%x\n", qidx,
a2fc4aef 8621 (uint32_t)rc);
895427bd 8622 goto out_destroy;
da0436e9
JS		 8623 }
8624 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
895427bd
JS		 8625 "2584 HBA EQ setup: queue[%d]-id=%d\n",
8626 qidx, phba->sli4_hba.hba_eq[qidx]->queue_id);
67d12733
JS		 8627 }
8628
895427bd
JS		 8629 if (phba->cfg_nvme_io_channel) {
8630 if (!phba->sli4_hba.nvme_cq || !phba->sli4_hba.nvme_wq) {
67d12733 8631 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8632 "6084 Fast-path NVME %s array not allocated\n",
8633 (phba->sli4_hba.nvme_cq) ? "CQ" : "WQ");
67d12733 8634 rc = -ENOMEM;
895427bd 8635 goto out_destroy;
67d12733
JS		 8636 }
8637
895427bd
JS		 8638 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++) {
8639 rc = lpfc_create_wq_cq(phba,
8640 phba->sli4_hba.hba_eq[
8641 qidx % io_channel],
8642 phba->sli4_hba.nvme_cq[qidx],
8643 phba->sli4_hba.nvme_wq[qidx],
8644 &phba->sli4_hba.nvme_cq_map[qidx],
8645 qidx, LPFC_NVME);
8646 if (rc) {
8647 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8648 "6123 Failed to setup fastpath "
8649 "NVME WQ/CQ (%d), rc = 0x%x\n",
8650 qidx, (uint32_t)rc);
8651 goto out_destroy;
8652 }
8653 }
67d12733
JS		 8654 }
8655
895427bd
JS		 8656 if (phba->cfg_fcp_io_channel) {
8657 /* Set up fast-path FCP Response Complete Queue */
8658 if (!phba->sli4_hba.fcp_cq || !phba->sli4_hba.fcp_wq) {
67d12733 8659 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8660 "3148 Fast-path FCP %s array not allocated\n",
8661 phba->sli4_hba.fcp_cq ? "WQ" : "CQ");
67d12733 8662 rc = -ENOMEM;
895427bd 8663 goto out_destroy;
67d12733
JS		 8664 }
8665
895427bd
JS		 8666 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++) {
8667 rc = lpfc_create_wq_cq(phba,
8668 phba->sli4_hba.hba_eq[
8669 qidx % io_channel],
8670 phba->sli4_hba.fcp_cq[qidx],
8671 phba->sli4_hba.fcp_wq[qidx],
8672 &phba->sli4_hba.fcp_cq_map[qidx],
8673 qidx, LPFC_FCP);
8674 if (rc) {
8675 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8676 "0535 Failed to setup fastpath "
8677 "FCP WQ/CQ (%d), rc = 0x%x\n",
8678 qidx, (uint32_t)rc);
8679 goto out_destroy;
8680 }
8681 }
67d12733 8682 }
895427bd 8683
da0436e9 8684 /*
895427bd 8685 * Set up Slow Path Complete Queues (CQs)
da0436e9
JS		 8686 */
8687
895427bd 8688 /* Set up slow-path MBOX CQ/MQ */
da0436e9 8689
895427bd 8690 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) {
da0436e9 8691 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8692 "0528 %s not allocated\n",
8693 phba->sli4_hba.mbx_cq ?
d1f525aa 8694 "Mailbox WQ" : "Mailbox CQ");
1b51197d 8695 rc = -ENOMEM;
895427bd 8696 goto out_destroy;
da0436e9 8697 }
da0436e9 8698
895427bd 8699 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
d1f525aa
JS		 8700 phba->sli4_hba.mbx_cq,
8701 phba->sli4_hba.mbx_wq,
8702 NULL, 0, LPFC_MBOX);
da0436e9
JS		 8703 if (rc) {
8704 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8705 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n",
8706 (uint32_t)rc);
8707 goto out_destroy;
da0436e9 8708 }
2d7dbc4c
JS		 8709 if (phba->nvmet_support) {
8710 if (!phba->sli4_hba.nvmet_cqset) {
8711 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8712 "3165 Fast-path NVME CQ Set "
8713 "array not allocated\n");
8714 rc = -ENOMEM;
8715 goto out_destroy;
8716 }
8717 if (phba->cfg_nvmet_mrq > 1) {
8718 rc = lpfc_cq_create_set(phba,
8719 phba->sli4_hba.nvmet_cqset,
8720 phba->sli4_hba.hba_eq,
8721 LPFC_WCQ, LPFC_NVMET);
8722 if (rc) {
8723 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8724 "3164 Failed setup of NVME CQ "
8725 "Set, rc = 0x%x\n",
8726 (uint32_t)rc);
8727 goto out_destroy;
8728 }
8729 } else {
8730 /* Set up NVMET Receive Complete Queue */
8731 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0],
8732 phba->sli4_hba.hba_eq[0],
8733 LPFC_WCQ, LPFC_NVMET);
8734 if (rc) {
8735 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8736 "6089 Failed setup NVMET CQ: "
8737 "rc = 0x%x\n", (uint32_t)rc);
8738 goto out_destroy;
8739 }
8740 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8741 "6090 NVMET CQ setup: cq-id=%d, "
8742 "parent eq-id=%d\n",
8743 phba->sli4_hba.nvmet_cqset[0]->queue_id,
8744 phba->sli4_hba.hba_eq[0]->queue_id);
8745 }
8746 }
da0436e9 8747
895427bd
JS		 8748 /* Set up slow-path ELS WQ/CQ */
8749 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) {
da0436e9 8750 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8751 "0530 ELS %s not allocated\n",
8752 phba->sli4_hba.els_cq ? "WQ" : "CQ");
1b51197d 8753 rc = -ENOMEM;
895427bd 8754 goto out_destroy;
da0436e9 8755 }
895427bd
JS		 8756 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8757 phba->sli4_hba.els_cq,
8758 phba->sli4_hba.els_wq,
8759 NULL, 0, LPFC_ELS);
da0436e9
JS		 8760 if (rc) {
8761 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8762 "0529 Failed setup of ELS WQ/CQ: rc = 0x%x\n",
8763 (uint32_t)rc);
8764 goto out_destroy;
da0436e9
JS		 8765 }
8766 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8767 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n",
8768 phba->sli4_hba.els_wq->queue_id,
8769 phba->sli4_hba.els_cq->queue_id);
8770
895427bd
JS		 8771 if (phba->cfg_nvme_io_channel) {
8772 /* Set up NVME LS Complete Queue */
8773 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) {
8774 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8775 "6091 LS %s not allocated\n",
8776 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ");
8777 rc = -ENOMEM;
8778 goto out_destroy;
8779 }
8780 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8781 phba->sli4_hba.nvmels_cq,
8782 phba->sli4_hba.nvmels_wq,
8783 NULL, 0, LPFC_NVME_LS);
8784 if (rc) {
8785 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8786 "0529 Failed setup of NVVME LS WQ/CQ: "
8787 "rc = 0x%x\n", (uint32_t)rc);
8788 goto out_destroy;
8789 }
8790
8791 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8792 "6096 ELS WQ setup: wq-id=%d, "
8793 "parent cq-id=%d\n",
8794 phba->sli4_hba.nvmels_wq->queue_id,
8795 phba->sli4_hba.nvmels_cq->queue_id);
8796 }
8797
2d7dbc4c
JS		 8798 /*
8799 * Create NVMET Receive Queue (RQ)
8800 */
8801 if (phba->nvmet_support) {
8802 if ((!phba->sli4_hba.nvmet_cqset) ||
8803 (!phba->sli4_hba.nvmet_mrq_hdr) ||
8804 (!phba->sli4_hba.nvmet_mrq_data)) {
8805 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8806 "6130 MRQ CQ Queues not "
8807 "allocated\n");
8808 rc = -ENOMEM;
8809 goto out_destroy;
8810 }
8811 if (phba->cfg_nvmet_mrq > 1) {
8812 rc = lpfc_mrq_create(phba,
8813 phba->sli4_hba.nvmet_mrq_hdr,
8814 phba->sli4_hba.nvmet_mrq_data,
8815 phba->sli4_hba.nvmet_cqset,
8816 LPFC_NVMET);
8817 if (rc) {
8818 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8819 "6098 Failed setup of NVMET "
8820 "MRQ: rc = 0x%x\n",
8821 (uint32_t)rc);
8822 goto out_destroy;
8823 }
8824
8825 } else {
8826 rc = lpfc_rq_create(phba,
8827 phba->sli4_hba.nvmet_mrq_hdr[0],
8828 phba->sli4_hba.nvmet_mrq_data[0],
8829 phba->sli4_hba.nvmet_cqset[0],
8830 LPFC_NVMET);
8831 if (rc) {
8832 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8833 "6057 Failed setup of NVMET "
8834 "Receive Queue: rc = 0x%x\n",
8835 (uint32_t)rc);
8836 goto out_destroy;
8837 }
8838
8839 lpfc_printf_log(
8840 phba, KERN_INFO, LOG_INIT,
8841 "6099 NVMET RQ setup: hdr-rq-id=%d, "
8842 "dat-rq-id=%d parent cq-id=%d\n",
8843 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id,
8844 phba->sli4_hba.nvmet_mrq_data[0]->queue_id,
8845 phba->sli4_hba.nvmet_cqset[0]->queue_id);
8846
8847 }
8848 }
8849
da0436e9
JS		 8850 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
8851 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8852 "0540 Receive Queue not allocated\n");
1b51197d 8853 rc = -ENOMEM;
895427bd 8854 goto out_destroy;
da0436e9 8855 }
73d91e50 8856
da0436e9 8857 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
4d9ab994 8858 phba->sli4_hba.els_cq, LPFC_USOL);
da0436e9
JS		 8859 if (rc) {
8860 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8861 "0541 Failed setup of Receive Queue: "
a2fc4aef 8862 "rc = 0x%x\n", (uint32_t)rc);
895427bd 8863 goto out_destroy;
da0436e9 8864 }
73d91e50 8865
da0436e9
JS		 8866 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8867 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d "
8868 "parent cq-id=%d\n",
8869 phba->sli4_hba.hdr_rq->queue_id,
8870 phba->sli4_hba.dat_rq->queue_id,
4d9ab994 8871 phba->sli4_hba.els_cq->queue_id);
1ba981fd
JS		 8872
8873 if (phba->cfg_fof) {
8874 rc = lpfc_fof_queue_setup(phba);
8875 if (rc) {
8876 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8877 "0549 Failed setup of FOF Queues: "
8878 "rc = 0x%x\n", rc);
895427bd 8879 goto out_destroy;
1ba981fd
JS		 8880 }
8881 }
2c9c5a00 8882
43140ca6 8883 for (qidx = 0; qidx < io_channel; qidx += LPFC_MAX_EQ_DELAY_EQID_CNT)
0cf07f84
JS		 8884 lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT,
8885 phba->cfg_fcp_imax);
43140ca6 8886
da0436e9
JS		 8887 return 0;
8888
895427bd
JS		 8889out_destroy:
8890 lpfc_sli4_queue_unset(phba);
da0436e9
JS		 8891out_error:
8892 return rc;
8893}
8894
8895/**
8896 * lpfc_sli4_queue_unset - Unset all the SLI4 queues
8897 * @phba: pointer to lpfc hba data structure.
8898 *
8899 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA
8900 * operation.
8901 *
8902 * Return codes
af901ca1 8903 * 0 - successful
25985edc 8904 * -ENOMEM - No available memory
d439d286 8905 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS		 8906 **/
8907void
8908lpfc_sli4_queue_unset(struct lpfc_hba *phba)
8909{
895427bd 8910 int qidx;
da0436e9 8911
1ba981fd
JS		 8912 /* Unset the queues created for Flash Optimized Fabric operations */
8913 if (phba->cfg_fof)
8914 lpfc_fof_queue_destroy(phba);
895427bd 8915
da0436e9 8916 /* Unset mailbox command work queue */
895427bd
JS		 8917 if (phba->sli4_hba.mbx_wq)
8918 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
8919
8920 /* Unset NVME LS work queue */
8921 if (phba->sli4_hba.nvmels_wq)
8922 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq);
8923
da0436e9 8924 /* Unset ELS work queue */
019c0d66 8925 if (phba->sli4_hba.els_wq)
895427bd
JS		 8926 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
8927
da0436e9 8928 /* Unset unsolicited receive queue */
895427bd
JS		 8929 if (phba->sli4_hba.hdr_rq)
8930 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq,
8931 phba->sli4_hba.dat_rq);
8932
da0436e9 8933 /* Unset FCP work queue */
895427bd
JS		 8934 if (phba->sli4_hba.fcp_wq)
8935 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
8936 lpfc_wq_destroy(phba, phba->sli4_hba.fcp_wq[qidx]);
8937
8938 /* Unset NVME work queue */
8939 if (phba->sli4_hba.nvme_wq) {
8940 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
8941 lpfc_wq_destroy(phba, phba->sli4_hba.nvme_wq[qidx]);
67d12733 8942 }
895427bd 8943
da0436e9 8944 /* Unset mailbox command complete queue */
895427bd
JS		 8945 if (phba->sli4_hba.mbx_cq)
8946 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
8947
da0436e9 8948 /* Unset ELS complete queue */
895427bd
JS		 8949 if (phba->sli4_hba.els_cq)
8950 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
8951
8952 /* Unset NVME LS complete queue */
8953 if (phba->sli4_hba.nvmels_cq)
8954 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq);
8955
8956 /* Unset NVME response complete queue */
8957 if (phba->sli4_hba.nvme_cq)
8958 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
8959 lpfc_cq_destroy(phba, phba->sli4_hba.nvme_cq[qidx]);
8960
2d7dbc4c
JS		 8961 /* Unset NVMET MRQ queue */
8962 if (phba->sli4_hba.nvmet_mrq_hdr) {
8963 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
8964 lpfc_rq_destroy(phba,
8965 phba->sli4_hba.nvmet_mrq_hdr[qidx],
8966 phba->sli4_hba.nvmet_mrq_data[qidx]);
8967 }
8968
8969 /* Unset NVMET CQ Set complete queue */
8970 if (phba->sli4_hba.nvmet_cqset) {
8971 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
8972 lpfc_cq_destroy(phba,
8973 phba->sli4_hba.nvmet_cqset[qidx]);
8974 }
8975
da0436e9 8976 /* Unset FCP response complete queue */
895427bd
JS		 8977 if (phba->sli4_hba.fcp_cq)
8978 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
8979 lpfc_cq_destroy(phba, phba->sli4_hba.fcp_cq[qidx]);
8980
da0436e9 8981 /* Unset fast-path event queue */
895427bd
JS		 8982 if (phba->sli4_hba.hba_eq)
8983 for (qidx = 0; qidx < phba->io_channel_irqs; qidx++)
8984 lpfc_eq_destroy(phba, phba->sli4_hba.hba_eq[qidx]);
da0436e9
JS		 8985}
8986
8987/**
8988 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool
8989 * @phba: pointer to lpfc hba data structure.
8990 *
8991 * This routine is invoked to allocate and set up a pool of completion queue
8992 * events. The body of the completion queue event is a completion queue entry
8993 * CQE. For now, this pool is used for the interrupt service routine to queue
8994 * the following HBA completion queue events for the worker thread to process:
8995 * - Mailbox asynchronous events
8996 * - Receive queue completion unsolicited events
8997 * Later, this can be used for all the slow-path events.
8998 *
8999 * Return codes
af901ca1 9000 * 0 - successful
25985edc 9001 * -ENOMEM - No available memory
da0436e9
JS		 9002 **/
9003static int
9004lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba)
9005{
9006 struct lpfc_cq_event *cq_event;
9007 int i;
9008
9009 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
9010 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL);
9011 if (!cq_event)
9012 goto out_pool_create_fail;
9013 list_add_tail(&cq_event->list,
9014 &phba->sli4_hba.sp_cqe_event_pool);
9015 }
9016 return 0;
9017
9018out_pool_create_fail:
9019 lpfc_sli4_cq_event_pool_destroy(phba);
9020 return -ENOMEM;
9021}
9022
9023/**
9024 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool
9025 * @phba: pointer to lpfc hba data structure.
9026 *
9027 * This routine is invoked to free the pool of completion queue events at
9028 * driver unload time. Note that, it is the responsibility of the driver
9029 * cleanup routine to free all the outstanding completion-queue events
9030 * allocated from this pool back into the pool before invoking this routine
9031 * to destroy the pool.
9032 **/
9033static void
9034lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba)
9035{
9036 struct lpfc_cq_event *cq_event, *next_cq_event;
9037
9038 list_for_each_entry_safe(cq_event, next_cq_event,
9039 &phba->sli4_hba.sp_cqe_event_pool, list) {
9040 list_del(&cq_event->list);
9041 kfree(cq_event);
9042 }
9043}
9044
9045/**
9046 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
9047 * @phba: pointer to lpfc hba data structure.
9048 *
9049 * This routine is the lock free version of the API invoked to allocate a
9050 * completion-queue event from the free pool.
9051 *
9052 * Return: Pointer to the newly allocated completion-queue event if successful
9053 * NULL otherwise.
9054 **/
9055struct lpfc_cq_event *
9056__lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
9057{
9058 struct lpfc_cq_event *cq_event = NULL;
9059
9060 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
9061 struct lpfc_cq_event, list);
9062 return cq_event;
9063}
9064
9065/**
9066 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
9067 * @phba: pointer to lpfc hba data structure.
9068 *
9069 * This routine is the lock version of the API invoked to allocate a
9070 * completion-queue event from the free pool.
9071 *
9072 * Return: Pointer to the newly allocated completion-queue event if successful
9073 * NULL otherwise.
9074 **/
9075struct lpfc_cq_event *
9076lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
9077{
9078 struct lpfc_cq_event *cq_event;
9079 unsigned long iflags;
9080
9081 spin_lock_irqsave(&phba->hbalock, iflags);
9082 cq_event = __lpfc_sli4_cq_event_alloc(phba);
9083 spin_unlock_irqrestore(&phba->hbalock, iflags);
9084 return cq_event;
9085}
9086
9087/**
9088 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
9089 * @phba: pointer to lpfc hba data structure.
9090 * @cq_event: pointer to the completion queue event to be freed.
9091 *
9092 * This routine is the lock free version of the API invoked to release a
9093 * completion-queue event back into the free pool.
9094 **/
9095void
9096__lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
9097 struct lpfc_cq_event *cq_event)
9098{
9099 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
9100}
9101
9102/**
9103 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
9104 * @phba: pointer to lpfc hba data structure.
9105 * @cq_event: pointer to the completion queue event to be freed.
9106 *
9107 * This routine is the lock version of the API invoked to release a
9108 * completion-queue event back into the free pool.
9109 **/
9110void
9111lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
9112 struct lpfc_cq_event *cq_event)
9113{
9114 unsigned long iflags;
9115 spin_lock_irqsave(&phba->hbalock, iflags);
9116 __lpfc_sli4_cq_event_release(phba, cq_event);
9117 spin_unlock_irqrestore(&phba->hbalock, iflags);
9118}
9119
9120/**
9121 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool
9122 * @phba: pointer to lpfc hba data structure.
9123 *
9124 * This routine is to free all the pending completion-queue events to the
9125 * back into the free pool for device reset.
9126 **/
9127static void
9128lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba)
9129{
9130 LIST_HEAD(cqelist);
9131 struct lpfc_cq_event *cqe;
9132 unsigned long iflags;
9133
9134 /* Retrieve all the pending WCQEs from pending WCQE lists */
9135 spin_lock_irqsave(&phba->hbalock, iflags);
9136 /* Pending FCP XRI abort events */
9137 list_splice_init(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue,
9138 &cqelist);
9139 /* Pending ELS XRI abort events */
9140 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
9141 &cqelist);
318083ad
JS		 9142 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
9143 /* Pending NVME XRI abort events */
9144 list_splice_init(&phba->sli4_hba.sp_nvme_xri_aborted_work_queue,
9145 &cqelist);
9146 }
da0436e9
JS		 9147 /* Pending asynnc events */
9148 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
9149 &cqelist);
9150 spin_unlock_irqrestore(&phba->hbalock, iflags);
9151
9152 while (!list_empty(&cqelist)) {
9153 list_remove_head(&cqelist, cqe, struct lpfc_cq_event, list);
9154 lpfc_sli4_cq_event_release(phba, cqe);
9155 }
9156}
9157
9158/**
9159 * lpfc_pci_function_reset - Reset pci function.
9160 * @phba: pointer to lpfc hba data structure.
9161 *
9162 * This routine is invoked to request a PCI function reset. It will destroys
9163 * all resources assigned to the PCI function which originates this request.
9164 *
9165 * Return codes
af901ca1 9166 * 0 - successful
25985edc 9167 * -ENOMEM - No available memory
d439d286 9168 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS		 9169 **/
9170int
9171lpfc_pci_function_reset(struct lpfc_hba *phba)
9172{
9173 LPFC_MBOXQ_t *mboxq;
2fcee4bf 9174 uint32_t rc = 0, if_type;
da0436e9 9175 uint32_t shdr_status, shdr_add_status;
2f6fa2c9
JS		 9176 uint32_t rdy_chk;
9177 uint32_t port_reset = 0;
da0436e9 9178 union lpfc_sli4_cfg_shdr *shdr;
2fcee4bf 9179 struct lpfc_register reg_data;
2b81f942 9180 uint16_t devid;
da0436e9 9181
2fcee4bf
JS		 9182 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9183 switch (if_type) {
9184 case LPFC_SLI_INTF_IF_TYPE_0:
9185 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
9186 GFP_KERNEL);
9187 if (!mboxq) {
9188 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9189 "0494 Unable to allocate memory for "
9190 "issuing SLI_FUNCTION_RESET mailbox "
9191 "command\n");
9192 return -ENOMEM;
9193 }
da0436e9 9194
2fcee4bf
JS		 9195 /* Setup PCI function reset mailbox-ioctl command */
9196 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
9197 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0,
9198 LPFC_SLI4_MBX_EMBED);
9199 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
9200 shdr = (union lpfc_sli4_cfg_shdr *)
9201 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
9202 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
9203 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
9204 &shdr->response);
9205 if (rc != MBX_TIMEOUT)
9206 mempool_free(mboxq, phba->mbox_mem_pool);
9207 if (shdr_status || shdr_add_status || rc) {
9208 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9209 "0495 SLI_FUNCTION_RESET mailbox "
9210 "failed with status x%x add_status x%x,"
9211 " mbx status x%x\n",
9212 shdr_status, shdr_add_status, rc);
9213 rc = -ENXIO;
9214 }
9215 break;
9216 case LPFC_SLI_INTF_IF_TYPE_2:
2f6fa2c9
JS		 9217wait:
9218 /*
9219 * Poll the Port Status Register and wait for RDY for
9220 * up to 30 seconds. If the port doesn't respond, treat
9221 * it as an error.
9222 */
77d093fb 9223 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) {
2f6fa2c9
JS		 9224 if (lpfc_readl(phba->sli4_hba.u.if_type2.
9225 STATUSregaddr, &reg_data.word0)) {
9226 rc = -ENODEV;
9227 goto out;
9228 }
9229 if (bf_get(lpfc_sliport_status_rdy, &reg_data))
9230 break;
9231 msleep(20);
9232 }
9233
9234 if (!bf_get(lpfc_sliport_status_rdy, &reg_data)) {
9235 phba->work_status[0] = readl(
9236 phba->sli4_hba.u.if_type2.ERR1regaddr);
9237 phba->work_status[1] = readl(
9238 phba->sli4_hba.u.if_type2.ERR2regaddr);
9239 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9240 "2890 Port not ready, port status reg "
9241 "0x%x error 1=0x%x, error 2=0x%x\n",
9242 reg_data.word0,
9243 phba->work_status[0],
9244 phba->work_status[1]);
9245 rc = -ENODEV;
9246 goto out;
9247 }
9248
9249 if (!port_reset) {
9250 /*
9251 * Reset the port now
9252 */
2fcee4bf
JS		 9253 reg_data.word0 = 0;
9254 bf_set(lpfc_sliport_ctrl_end, &reg_data,
9255 LPFC_SLIPORT_LITTLE_ENDIAN);
9256 bf_set(lpfc_sliport_ctrl_ip, &reg_data,
9257 LPFC_SLIPORT_INIT_PORT);
9258 writel(reg_data.word0, phba->sli4_hba.u.if_type2.
9259 CTRLregaddr);
8fcb8acd 9260 /* flush */
2b81f942
JS		 9261 pci_read_config_word(phba->pcidev,
9262 PCI_DEVICE_ID, &devid);
2fcee4bf 9263
2f6fa2c9
JS		 9264 port_reset = 1;
9265 msleep(20);
9266 goto wait;
9267 } else if (bf_get(lpfc_sliport_status_rn, &reg_data)) {
9268 rc = -ENODEV;
9269 goto out;
2fcee4bf
JS		 9270 }
9271 break;
2f6fa2c9 9272
2fcee4bf
JS		 9273 case LPFC_SLI_INTF_IF_TYPE_1:
9274 default:
9275 break;
da0436e9 9276 }
2fcee4bf 9277
73d91e50 9278out:
2fcee4bf 9279 /* Catch the not-ready port failure after a port reset. */
2f6fa2c9 9280 if (rc) {
229adb0e
JS		 9281 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9282 "3317 HBA not functional: IP Reset Failed "
2f6fa2c9 9283 "try: echo fw_reset > board_mode\n");
2fcee4bf 9284 rc = -ENODEV;
229adb0e 9285 }
2fcee4bf 9286
da0436e9
JS		 9287 return rc;
9288}
9289
da0436e9
JS		 9290/**
9291 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space.
9292 * @phba: pointer to lpfc hba data structure.
9293 *
9294 * This routine is invoked to set up the PCI device memory space for device
9295 * with SLI-4 interface spec.
9296 *
9297 * Return codes
af901ca1 9298 * 0 - successful
da0436e9
JS		 9299 * other values - error
9300 **/
9301static int
9302lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
9303{
9304 struct pci_dev *pdev;
9305 unsigned long bar0map_len, bar1map_len, bar2map_len;
9306 int error = -ENODEV;
2fcee4bf 9307 uint32_t if_type;
da0436e9
JS		 9308
9309 /* Obtain PCI device reference */
9310 if (!phba->pcidev)
9311 return error;
9312 else
9313 pdev = phba->pcidev;
9314
9315 /* Set the device DMA mask size */
8e68597d
MR		 9316 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
9317 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
9318 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
9319 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
da0436e9 9320 return error;
8e68597d
MR		 9321 }
9322 }
da0436e9 9323
2fcee4bf
JS		 9324 /*
9325 * The BARs and register set definitions and offset locations are
9326 * dependent on the if_type.
9327 */
9328 if (pci_read_config_dword(pdev, LPFC_SLI_INTF,
9329 &phba->sli4_hba.sli_intf.word0)) {
9330 return error;
9331 }
9332
9333 /* There is no SLI3 failback for SLI4 devices. */
9334 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
9335 LPFC_SLI_INTF_VALID) {
9336 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9337 "2894 SLI_INTF reg contents invalid "
9338 "sli_intf reg 0x%x\n",
9339 phba->sli4_hba.sli_intf.word0);
9340 return error;
9341 }
9342
9343 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9344 /*
9345 * Get the bus address of SLI4 device Bar regions and the
9346 * number of bytes required by each mapping. The mapping of the
9347 * particular PCI BARs regions is dependent on the type of
9348 * SLI4 device.
da0436e9 9349 */
f5ca6f2e
JS		 9350 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) {
9351 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0);
9352 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0);
2fcee4bf
JS		 9353
9354 /*
9355 * Map SLI4 PCI Config Space Register base to a kernel virtual
9356 * addr
9357 */
9358 phba->sli4_hba.conf_regs_memmap_p =
9359 ioremap(phba->pci_bar0_map, bar0map_len);
9360 if (!phba->sli4_hba.conf_regs_memmap_p) {
9361 dev_printk(KERN_ERR, &pdev->dev,
9362 "ioremap failed for SLI4 PCI config "
9363 "registers.\n");
9364 goto out;
9365 }
f5ca6f2e 9366 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
2fcee4bf
JS		 9367 /* Set up BAR0 PCI config space register memory map */
9368 lpfc_sli4_bar0_register_memmap(phba, if_type);
1dfb5a47
JS		 9369 } else {
9370 phba->pci_bar0_map = pci_resource_start(pdev, 1);
9371 bar0map_len = pci_resource_len(pdev, 1);
2fcee4bf
JS		 9372 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
9373 dev_printk(KERN_ERR, &pdev->dev,
9374 "FATAL - No BAR0 mapping for SLI4, if_type 2\n");
9375 goto out;
9376 }
9377 phba->sli4_hba.conf_regs_memmap_p =
da0436e9 9378 ioremap(phba->pci_bar0_map, bar0map_len);
2fcee4bf
JS		 9379 if (!phba->sli4_hba.conf_regs_memmap_p) {
9380 dev_printk(KERN_ERR, &pdev->dev,
9381 "ioremap failed for SLI4 PCI config "
9382 "registers.\n");
9383 goto out;
9384 }
9385 lpfc_sli4_bar0_register_memmap(phba, if_type);
da0436e9
JS		 9386 }
9387
c31098ce 9388 if ((if_type == LPFC_SLI_INTF_IF_TYPE_0) &&
f5ca6f2e 9389 (pci_resource_start(pdev, PCI_64BIT_BAR2))) {
2fcee4bf
JS		 9390 /*
9391 * Map SLI4 if type 0 HBA Control Register base to a kernel
9392 * virtual address and setup the registers.
9393 */
f5ca6f2e
JS		 9394 phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2);
9395 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
2fcee4bf 9396 phba->sli4_hba.ctrl_regs_memmap_p =
da0436e9 9397 ioremap(phba->pci_bar1_map, bar1map_len);
2fcee4bf
JS		 9398 if (!phba->sli4_hba.ctrl_regs_memmap_p) {
9399 dev_printk(KERN_ERR, &pdev->dev,
da0436e9 9400 "ioremap failed for SLI4 HBA control registers.\n");
2fcee4bf
JS		 9401 goto out_iounmap_conf;
9402 }
f5ca6f2e 9403 phba->pci_bar2_memmap_p = phba->sli4_hba.ctrl_regs_memmap_p;
2fcee4bf 9404 lpfc_sli4_bar1_register_memmap(phba);
da0436e9
JS		 9405 }
9406
c31098ce 9407 if ((if_type == LPFC_SLI_INTF_IF_TYPE_0) &&
f5ca6f2e 9408 (pci_resource_start(pdev, PCI_64BIT_BAR4))) {
2fcee4bf
JS		 9409 /*
9410 * Map SLI4 if type 0 HBA Doorbell Register base to a kernel
9411 * virtual address and setup the registers.
9412 */
f5ca6f2e
JS		 9413 phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4);
9414 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
2fcee4bf 9415 phba->sli4_hba.drbl_regs_memmap_p =
da0436e9 9416 ioremap(phba->pci_bar2_map, bar2map_len);
2fcee4bf
JS		 9417 if (!phba->sli4_hba.drbl_regs_memmap_p) {
9418 dev_printk(KERN_ERR, &pdev->dev,
da0436e9 9419 "ioremap failed for SLI4 HBA doorbell registers.\n");
2fcee4bf
JS		 9420 goto out_iounmap_ctrl;
9421 }
f5ca6f2e 9422 phba->pci_bar4_memmap_p = phba->sli4_hba.drbl_regs_memmap_p;
2fcee4bf
JS		 9423 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
9424 if (error)
9425 goto out_iounmap_all;
da0436e9
JS		 9426 }
9427
da0436e9
JS		 9428 return 0;
9429
9430out_iounmap_all:
9431 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
9432out_iounmap_ctrl:
9433 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
9434out_iounmap_conf:
9435 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9436out:
9437 return error;
9438}
9439
9440/**
9441 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space.
9442 * @phba: pointer to lpfc hba data structure.
9443 *
9444 * This routine is invoked to unset the PCI device memory space for device
9445 * with SLI-4 interface spec.
9446 **/
9447static void
9448lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba)
9449{
2e90f4b5
JS		 9450 uint32_t if_type;
9451 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
da0436e9 9452
2e90f4b5
JS		 9453 switch (if_type) {
9454 case LPFC_SLI_INTF_IF_TYPE_0:
9455 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
9456 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
9457 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9458 break;
9459 case LPFC_SLI_INTF_IF_TYPE_2:
9460 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9461 break;
9462 case LPFC_SLI_INTF_IF_TYPE_1:
9463 default:
9464 dev_printk(KERN_ERR, &phba->pcidev->dev,
9465 "FATAL - unsupported SLI4 interface type - %d\n",
9466 if_type);
9467 break;
9468 }
da0436e9
JS		 9469}
9470
9471/**
9472 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device
9473 * @phba: pointer to lpfc hba data structure.
9474 *
9475 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9476 * with SLI-3 interface specs.
da0436e9
JS		 9477 *
9478 * Return codes
af901ca1 9479 * 0 - successful
da0436e9
JS		 9480 * other values - error
9481 **/
9482static int
9483lpfc_sli_enable_msix(struct lpfc_hba *phba)
9484{
45ffac19 9485 int rc;
da0436e9
JS		 9486 LPFC_MBOXQ_t *pmb;
9487
9488 /* Set up MSI-X multi-message vectors */
45ffac19
CH		 9489 rc = pci_alloc_irq_vectors(phba->pcidev,
9490 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX);
9491 if (rc < 0) {
da0436e9
JS		 9492 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9493 "0420 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9494 goto vec_fail_out;
da0436e9 9495 }
45ffac19 9496
da0436e9
JS		 9497 /*
9498 * Assign MSI-X vectors to interrupt handlers
9499 */
9500
9501 /* vector-0 is associated to slow-path handler */
45ffac19 9502 rc = request_irq(pci_irq_vector(phba->pcidev, 0),
ed243d37 9503 &lpfc_sli_sp_intr_handler, 0,
da0436e9
JS		 9504 LPFC_SP_DRIVER_HANDLER_NAME, phba);
9505 if (rc) {
9506 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9507 "0421 MSI-X slow-path request_irq failed "
9508 "(%d)\n", rc);
9509 goto msi_fail_out;
9510 }
9511
9512 /* vector-1 is associated to fast-path handler */
45ffac19 9513 rc = request_irq(pci_irq_vector(phba->pcidev, 1),
ed243d37 9514 &lpfc_sli_fp_intr_handler, 0,
da0436e9
JS		 9515 LPFC_FP_DRIVER_HANDLER_NAME, phba);
9516
9517 if (rc) {
9518 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9519 "0429 MSI-X fast-path request_irq failed "
9520 "(%d)\n", rc);
9521 goto irq_fail_out;
9522 }
9523
9524 /*
9525 * Configure HBA MSI-X attention conditions to messages
9526 */
9527 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9528
9529 if (!pmb) {
9530 rc = -ENOMEM;
9531 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9532 "0474 Unable to allocate memory for issuing "
9533 "MBOX_CONFIG_MSI command\n");
9534 goto mem_fail_out;
9535 }
9536 rc = lpfc_config_msi(phba, pmb);
9537 if (rc)
9538 goto mbx_fail_out;
9539 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
9540 if (rc != MBX_SUCCESS) {
9541 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX,
9542 "0351 Config MSI mailbox command failed, "
9543 "mbxCmd x%x, mbxStatus x%x\n",
9544 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus);
9545 goto mbx_fail_out;
9546 }
9547
9548 /* Free memory allocated for mailbox command */
9549 mempool_free(pmb, phba->mbox_mem_pool);
9550 return rc;
9551
9552mbx_fail_out:
9553 /* Free memory allocated for mailbox command */
9554 mempool_free(pmb, phba->mbox_mem_pool);
9555
9556mem_fail_out:
9557 /* free the irq already requested */
45ffac19 9558 free_irq(pci_irq_vector(phba->pcidev, 1), phba);
da0436e9
JS		 9559
9560irq_fail_out:
9561 /* free the irq already requested */
45ffac19 9562 free_irq(pci_irq_vector(phba->pcidev, 0), phba);
da0436e9
JS		 9563
9564msi_fail_out:
9565 /* Unconfigure MSI-X capability structure */
45ffac19 9566 pci_free_irq_vectors(phba->pcidev);
029165ac
AG		 9567
9568vec_fail_out:
da0436e9
JS		 9569 return rc;
9570}
9571
da0436e9
JS		 9572/**
9573 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device.
9574 * @phba: pointer to lpfc hba data structure.
9575 *
9576 * This routine is invoked to enable the MSI interrupt mode to device with
9577 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to
9578 * enable the MSI vector. The device driver is responsible for calling the
9579 * request_irq() to register MSI vector with a interrupt the handler, which
9580 * is done in this function.
9581 *
9582 * Return codes
af901ca1 9583 * 0 - successful
da0436e9
JS		 9584 * other values - error
9585 */
9586static int
9587lpfc_sli_enable_msi(struct lpfc_hba *phba)
9588{
9589 int rc;
9590
9591 rc = pci_enable_msi(phba->pcidev);
9592 if (!rc)
9593 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9594 "0462 PCI enable MSI mode success.\n");
9595 else {
9596 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9597 "0471 PCI enable MSI mode failed (%d)\n", rc);
9598 return rc;
9599 }
9600
9601 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
ed243d37 9602 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS		 9603 if (rc) {
9604 pci_disable_msi(phba->pcidev);
9605 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9606 "0478 MSI request_irq failed (%d)\n", rc);
9607 }
9608 return rc;
9609}
9610
da0436e9
JS		 9611/**
9612 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device.
9613 * @phba: pointer to lpfc hba data structure.
9614 *
9615 * This routine is invoked to enable device interrupt and associate driver's
9616 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface
9617 * spec. Depends on the interrupt mode configured to the driver, the driver
9618 * will try to fallback from the configured interrupt mode to an interrupt
9619 * mode which is supported by the platform, kernel, and device in the order
9620 * of:
9621 * MSI-X -> MSI -> IRQ.
9622 *
9623 * Return codes
af901ca1 9624 * 0 - successful
da0436e9
JS		 9625 * other values - error
9626 **/
9627static uint32_t
9628lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9629{
9630 uint32_t intr_mode = LPFC_INTR_ERROR;
9631 int retval;
9632
9633 if (cfg_mode == 2) {
9634 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */
9635 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3);
9636 if (!retval) {
9637 /* Now, try to enable MSI-X interrupt mode */
9638 retval = lpfc_sli_enable_msix(phba);
9639 if (!retval) {
9640 /* Indicate initialization to MSI-X mode */
9641 phba->intr_type = MSIX;
9642 intr_mode = 2;
9643 }
9644 }
9645 }
9646
9647 /* Fallback to MSI if MSI-X initialization failed */
9648 if (cfg_mode >= 1 && phba->intr_type == NONE) {
9649 retval = lpfc_sli_enable_msi(phba);
9650 if (!retval) {
9651 /* Indicate initialization to MSI mode */
9652 phba->intr_type = MSI;
9653 intr_mode = 1;
9654 }
9655 }
9656
9657 /* Fallback to INTx if both MSI-X/MSI initalization failed */
9658 if (phba->intr_type == NONE) {
9659 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
9660 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
9661 if (!retval) {
9662 /* Indicate initialization to INTx mode */
9663 phba->intr_type = INTx;
9664 intr_mode = 0;
9665 }
9666 }
9667 return intr_mode;
9668}
9669
9670/**
9671 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device.
9672 * @phba: pointer to lpfc hba data structure.
9673 *
9674 * This routine is invoked to disable device interrupt and disassociate the
9675 * driver's interrupt handler(s) from interrupt vector(s) to device with
9676 * SLI-3 interface spec. Depending on the interrupt mode, the driver will
9677 * release the interrupt vector(s) for the message signaled interrupt.
9678 **/
9679static void
9680lpfc_sli_disable_intr(struct lpfc_hba *phba)
9681{
45ffac19
CH		 9682 int nr_irqs, i;
9683
da0436e9 9684 if (phba->intr_type == MSIX)
45ffac19
CH		 9685 nr_irqs = LPFC_MSIX_VECTORS;
9686 else
9687 nr_irqs = 1;
9688
9689 for (i = 0; i < nr_irqs; i++)
9690 free_irq(pci_irq_vector(phba->pcidev, i), phba);
9691 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS		 9692
9693 /* Reset interrupt management states */
9694 phba->intr_type = NONE;
9695 phba->sli.slistat.sli_intr = 0;
da0436e9
JS		 9696}
9697
7bb03bbf 9698/**
895427bd 9699 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings
7bb03bbf 9700 * @phba: pointer to lpfc hba data structure.
895427bd
JS		 9701 * @vectors: number of msix vectors allocated.
9702 *
9703 * The routine will figure out the CPU affinity assignment for every
9704 * MSI-X vector allocated for the HBA. The hba_eq_hdl will be updated
9705 * with a pointer to the CPU mask that defines ALL the CPUs this vector
9706 * can be associated with. If the vector can be unquely associated with
9707 * a single CPU, that CPU will be recorded in hba_eq_hdl[index].cpu.
9708 * In addition, the CPU to IO channel mapping will be calculated
9709 * and the phba->sli4_hba.cpu_map array will reflect this.
7bb03bbf 9710 */
895427bd
JS		 9711static void
9712lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
7bb03bbf
JS		 9713{
9714 struct lpfc_vector_map_info *cpup;
895427bd
JS		 9715 int index = 0;
9716 int vec = 0;
7bb03bbf 9717 int cpu;
7bb03bbf
JS		 9718#ifdef CONFIG_X86
9719 struct cpuinfo_x86 *cpuinfo;
9720#endif
7bb03bbf
JS		 9721
9722 /* Init cpu_map array */
9723 memset(phba->sli4_hba.cpu_map, 0xff,
9724 (sizeof(struct lpfc_vector_map_info) *
895427bd 9725 phba->sli4_hba.num_present_cpu));
7bb03bbf
JS		 9726
9727 /* Update CPU map with physical id and core id of each CPU */
9728 cpup = phba->sli4_hba.cpu_map;
9729 for (cpu = 0; cpu < phba->sli4_hba.num_present_cpu; cpu++) {
9730#ifdef CONFIG_X86
9731 cpuinfo = &cpu_data(cpu);
9732 cpup->phys_id = cpuinfo->phys_proc_id;
9733 cpup->core_id = cpuinfo->cpu_core_id;
9734#else
9735 /* No distinction between CPUs for other platforms */
9736 cpup->phys_id = 0;
9737 cpup->core_id = 0;
9738#endif
895427bd
JS		 9739 cpup->channel_id = index; /* For now round robin */
9740 cpup->irq = pci_irq_vector(phba->pcidev, vec);
9741 vec++;
9742 if (vec >= vectors)
9743 vec = 0;
9744 index++;
9745 if (index >= phba->cfg_fcp_io_channel)
9746 index = 0;
7bb03bbf
JS		 9747 cpup++;
9748 }
7bb03bbf
JS		 9749}
9750
9751
da0436e9
JS		 9752/**
9753 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device
9754 * @phba: pointer to lpfc hba data structure.
9755 *
9756 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9757 * with SLI-4 interface spec.
da0436e9
JS		 9758 *
9759 * Return codes
af901ca1 9760 * 0 - successful
da0436e9
JS		 9761 * other values - error
9762 **/
9763static int
9764lpfc_sli4_enable_msix(struct lpfc_hba *phba)
9765{
75baf696 9766 int vectors, rc, index;
b83d005e 9767 char *name;
da0436e9
JS		 9768
9769 /* Set up MSI-X multi-message vectors */
895427bd 9770 vectors = phba->io_channel_irqs;
45ffac19 9771 if (phba->cfg_fof)
1ba981fd 9772 vectors++;
45ffac19 9773
f358dd0c
JS		 9774 rc = pci_alloc_irq_vectors(phba->pcidev,
9775 (phba->nvmet_support) ? 1 : 2,
9776 vectors, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
4f871e1b 9777 if (rc < 0) {
da0436e9
JS		 9778 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9779 "0484 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9780 goto vec_fail_out;
da0436e9 9781 }
4f871e1b 9782 vectors = rc;
75baf696 9783
7bb03bbf 9784 /* Assign MSI-X vectors to interrupt handlers */
67d12733 9785 for (index = 0; index < vectors; index++) {
b83d005e
JS		 9786 name = phba->sli4_hba.hba_eq_hdl[index].handler_name;
9787 memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ);
9788 snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ,
4305f183 9789 LPFC_DRIVER_HANDLER_NAME"%d", index);
da0436e9 9790
895427bd
JS		 9791 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9792 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
9793 atomic_set(&phba->sli4_hba.hba_eq_hdl[index].hba_eq_in_use, 1);
1ba981fd 9794 if (phba->cfg_fof && (index == (vectors - 1)))
45ffac19 9795 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9796 &lpfc_sli4_fof_intr_handler, 0,
b83d005e 9797 name,
895427bd 9798 &phba->sli4_hba.hba_eq_hdl[index]);
1ba981fd 9799 else
45ffac19 9800 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9801 &lpfc_sli4_hba_intr_handler, 0,
b83d005e 9802 name,
895427bd 9803 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9
JS		 9804 if (rc) {
9805 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9806 "0486 MSI-X fast-path (%d) "
9807 "request_irq failed (%d)\n", index, rc);
9808 goto cfg_fail_out;
9809 }
9810 }
9811
1ba981fd
JS		 9812 if (phba->cfg_fof)
9813 vectors--;
9814
895427bd 9815 if (vectors != phba->io_channel_irqs) {
82c3e9ba
JS		 9816 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9817 "3238 Reducing IO channels to match number of "
9818 "MSI-X vectors, requested %d got %d\n",
895427bd
JS		 9819 phba->io_channel_irqs, vectors);
9820 if (phba->cfg_fcp_io_channel > vectors)
9821 phba->cfg_fcp_io_channel = vectors;
9822 if (phba->cfg_nvme_io_channel > vectors)
9823 phba->cfg_nvme_io_channel = vectors;
9824 if (phba->cfg_fcp_io_channel > phba->cfg_nvme_io_channel)
9825 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
9826 else
9827 phba->io_channel_irqs = phba->cfg_nvme_io_channel;
82c3e9ba 9828 }
895427bd 9829 lpfc_cpu_affinity_check(phba, vectors);
7bb03bbf 9830
da0436e9
JS		 9831 return rc;
9832
9833cfg_fail_out:
9834 /* free the irq already requested */
895427bd
JS		 9835 for (--index; index >= 0; index--)
9836 free_irq(pci_irq_vector(phba->pcidev, index),
9837 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9 9838
da0436e9 9839 /* Unconfigure MSI-X capability structure */
45ffac19 9840 pci_free_irq_vectors(phba->pcidev);
029165ac
AG		 9841
9842vec_fail_out:
da0436e9
JS		 9843 return rc;
9844}
9845
da0436e9
JS		 9846/**
9847 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device
9848 * @phba: pointer to lpfc hba data structure.
9849 *
9850 * This routine is invoked to enable the MSI interrupt mode to device with
9851 * SLI-4 interface spec. The kernel function pci_enable_msi() is called
9852 * to enable the MSI vector. The device driver is responsible for calling
9853 * the request_irq() to register MSI vector with a interrupt the handler,
9854 * which is done in this function.
9855 *
9856 * Return codes
af901ca1 9857 * 0 - successful
da0436e9
JS		 9858 * other values - error
9859 **/
9860static int
9861lpfc_sli4_enable_msi(struct lpfc_hba *phba)
9862{
9863 int rc, index;
9864
9865 rc = pci_enable_msi(phba->pcidev);
9866 if (!rc)
9867 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9868 "0487 PCI enable MSI mode success.\n");
9869 else {
9870 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9871 "0488 PCI enable MSI mode failed (%d)\n", rc);
9872 return rc;
9873 }
9874
9875 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
ed243d37 9876 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS		 9877 if (rc) {
9878 pci_disable_msi(phba->pcidev);
9879 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9880 "0490 MSI request_irq failed (%d)\n", rc);
75baf696 9881 return rc;
da0436e9
JS		 9882 }
9883
895427bd
JS		 9884 for (index = 0; index < phba->io_channel_irqs; index++) {
9885 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9886 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
da0436e9
JS		 9887 }
9888
1ba981fd 9889 if (phba->cfg_fof) {
895427bd
JS		 9890 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9891 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
1ba981fd 9892 }
75baf696 9893 return 0;
da0436e9
JS		 9894}
9895
da0436e9
JS		 9896/**
9897 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device
9898 * @phba: pointer to lpfc hba data structure.
9899 *
9900 * This routine is invoked to enable device interrupt and associate driver's
9901 * interrupt handler(s) to interrupt vector(s) to device with SLI-4
9902 * interface spec. Depends on the interrupt mode configured to the driver,
9903 * the driver will try to fallback from the configured interrupt mode to an
9904 * interrupt mode which is supported by the platform, kernel, and device in
9905 * the order of:
9906 * MSI-X -> MSI -> IRQ.
9907 *
9908 * Return codes
af901ca1 9909 * 0 - successful
da0436e9
JS		 9910 * other values - error
9911 **/
9912static uint32_t
9913lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9914{
9915 uint32_t intr_mode = LPFC_INTR_ERROR;
895427bd 9916 int retval, idx;
da0436e9
JS		 9917
9918 if (cfg_mode == 2) {
9919 /* Preparation before conf_msi mbox cmd */
9920 retval = 0;
9921 if (!retval) {
9922 /* Now, try to enable MSI-X interrupt mode */
9923 retval = lpfc_sli4_enable_msix(phba);
9924 if (!retval) {
9925 /* Indicate initialization to MSI-X mode */
9926 phba->intr_type = MSIX;
9927 intr_mode = 2;
9928 }
9929 }
9930 }
9931
9932 /* Fallback to MSI if MSI-X initialization failed */
9933 if (cfg_mode >= 1 && phba->intr_type == NONE) {
9934 retval = lpfc_sli4_enable_msi(phba);
9935 if (!retval) {
9936 /* Indicate initialization to MSI mode */
9937 phba->intr_type = MSI;
9938 intr_mode = 1;
9939 }
9940 }
9941
9942 /* Fallback to INTx if both MSI-X/MSI initalization failed */
9943 if (phba->intr_type == NONE) {
9944 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
9945 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
9946 if (!retval) {
895427bd
JS		 9947 struct lpfc_hba_eq_hdl *eqhdl;
9948
da0436e9
JS		 9949 /* Indicate initialization to INTx mode */
9950 phba->intr_type = INTx;
9951 intr_mode = 0;
895427bd
JS		 9952
9953 for (idx = 0; idx < phba->io_channel_irqs; idx++) {
9954 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
9955 eqhdl->idx = idx;
9956 eqhdl->phba = phba;
9957 atomic_set(&eqhdl->hba_eq_in_use, 1);
da0436e9 9958 }
1ba981fd 9959 if (phba->cfg_fof) {
895427bd
JS		 9960 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
9961 eqhdl->idx = idx;
9962 eqhdl->phba = phba;
9963 atomic_set(&eqhdl->hba_eq_in_use, 1);
1ba981fd 9964 }
da0436e9
JS		 9965 }
9966 }
9967 return intr_mode;
9968}
9969
9970/**
9971 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device
9972 * @phba: pointer to lpfc hba data structure.
9973 *
9974 * This routine is invoked to disable device interrupt and disassociate
9975 * the driver's interrupt handler(s) from interrupt vector(s) to device
9976 * with SLI-4 interface spec. Depending on the interrupt mode, the driver
9977 * will release the interrupt vector(s) for the message signaled interrupt.
9978 **/
9979static void
9980lpfc_sli4_disable_intr(struct lpfc_hba *phba)
9981{
9982 /* Disable the currently initialized interrupt mode */
45ffac19
CH		 9983 if (phba->intr_type == MSIX) {
9984 int index;
9985
9986 /* Free up MSI-X multi-message vectors */
895427bd
JS		 9987 for (index = 0; index < phba->io_channel_irqs; index++)
9988 free_irq(pci_irq_vector(phba->pcidev, index),
9989 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19
CH		 9990
9991 if (phba->cfg_fof)
895427bd
JS		 9992 free_irq(pci_irq_vector(phba->pcidev, index),
9993 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19 9994 } else {
da0436e9 9995 free_irq(phba->pcidev->irq, phba);
45ffac19
CH		 9996 }
9997
9998 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS		 9999
10000 /* Reset interrupt management states */
10001 phba->intr_type = NONE;
10002 phba->sli.slistat.sli_intr = 0;
da0436e9
JS		 10003}
10004
10005/**
10006 * lpfc_unset_hba - Unset SLI3 hba device initialization
10007 * @phba: pointer to lpfc hba data structure.
10008 *
10009 * This routine is invoked to unset the HBA device initialization steps to
10010 * a device with SLI-3 interface spec.
10011 **/
10012static void
10013lpfc_unset_hba(struct lpfc_hba *phba)
10014{
10015 struct lpfc_vport *vport = phba->pport;
10016 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
10017
10018 spin_lock_irq(shost->host_lock);
10019 vport->load_flag |= FC_UNLOADING;
10020 spin_unlock_irq(shost->host_lock);
10021
72859909
JS		 10022 kfree(phba->vpi_bmask);
10023 kfree(phba->vpi_ids);
10024
da0436e9
JS		 10025 lpfc_stop_hba_timers(phba);
10026
10027 phba->pport->work_port_events = 0;
10028
10029 lpfc_sli_hba_down(phba);
10030
10031 lpfc_sli_brdrestart(phba);
10032
10033 lpfc_sli_disable_intr(phba);
10034
10035 return;
10036}
10037
5af5eee7
JS		 10038/**
10039 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy
10040 * @phba: Pointer to HBA context object.
10041 *
10042 * This function is called in the SLI4 code path to wait for completion
10043 * of device's XRIs exchange busy. It will check the XRI exchange busy
10044 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after
10045 * that, it will check the XRI exchange busy on outstanding FCP and ELS
10046 * I/Os every 30 seconds, log error message, and wait forever. Only when
10047 * all XRI exchange busy complete, the driver unload shall proceed with
10048 * invoking the function reset ioctl mailbox command to the CNA and the
10049 * the rest of the driver unload resource release.
10050 **/
10051static void
10052lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba)
10053{
10054 int wait_time = 0;
895427bd 10055 int nvme_xri_cmpl = 1;
86c67379 10056 int nvmet_xri_cmpl = 1;
895427bd 10057 int fcp_xri_cmpl = 1;
5af5eee7
JS		 10058 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
10059
895427bd
JS		 10060 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
10061 fcp_xri_cmpl =
10062 list_empty(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
86c67379 10063 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd
JS		 10064 nvme_xri_cmpl =
10065 list_empty(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
86c67379
JS		 10066 nvmet_xri_cmpl =
10067 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
10068 }
895427bd 10069
f358dd0c
JS		 10070 while (!fcp_xri_cmpl || !els_xri_cmpl || !nvme_xri_cmpl ||
10071 !nvmet_xri_cmpl) {
5af5eee7 10072 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) {
895427bd
JS		 10073 if (!nvme_xri_cmpl)
10074 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10075 "6100 NVME XRI exchange busy "
10076 "wait time: %d seconds.\n",
10077 wait_time/1000);
5af5eee7
JS		 10078 if (!fcp_xri_cmpl)
10079 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10080 "2877 FCP XRI exchange busy "
10081 "wait time: %d seconds.\n",
10082 wait_time/1000);
10083 if (!els_xri_cmpl)
10084 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10085 "2878 ELS XRI exchange busy "
10086 "wait time: %d seconds.\n",
10087 wait_time/1000);
10088 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2);
10089 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2;
10090 } else {
10091 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1);
10092 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1;
10093 }
86c67379 10094 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd
JS		 10095 nvme_xri_cmpl = list_empty(
10096 &phba->sli4_hba.lpfc_abts_nvme_buf_list);
86c67379
JS		 10097 nvmet_xri_cmpl = list_empty(
10098 &phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
10099 }
895427bd
JS		 10100
10101 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
10102 fcp_xri_cmpl = list_empty(
10103 &phba->sli4_hba.lpfc_abts_scsi_buf_list);
10104
5af5eee7
JS		 10105 els_xri_cmpl =
10106 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c 10107
5af5eee7
JS		 10108 }
10109}
10110
da0436e9
JS		 10111/**
10112 * lpfc_sli4_hba_unset - Unset the fcoe hba
10113 * @phba: Pointer to HBA context object.
10114 *
10115 * This function is called in the SLI4 code path to reset the HBA's FCoE
10116 * function. The caller is not required to hold any lock. This routine
10117 * issues PCI function reset mailbox command to reset the FCoE function.
10118 * At the end of the function, it calls lpfc_hba_down_post function to
10119 * free any pending commands.
10120 **/
10121static void
10122lpfc_sli4_hba_unset(struct lpfc_hba *phba)
10123{
10124 int wait_cnt = 0;
10125 LPFC_MBOXQ_t *mboxq;
912e3acd 10126 struct pci_dev *pdev = phba->pcidev;
da0436e9
JS		 10127
10128 lpfc_stop_hba_timers(phba);
10129 phba->sli4_hba.intr_enable = 0;
10130
10131 /*
10132 * Gracefully wait out the potential current outstanding asynchronous
10133 * mailbox command.
10134 */
10135
10136 /* First, block any pending async mailbox command from posted */
10137 spin_lock_irq(&phba->hbalock);
10138 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
10139 spin_unlock_irq(&phba->hbalock);
10140 /* Now, trying to wait it out if we can */
10141 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
10142 msleep(10);
10143 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT)
10144 break;
10145 }
10146 /* Forcefully release the outstanding mailbox command if timed out */
10147 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
10148 spin_lock_irq(&phba->hbalock);
10149 mboxq = phba->sli.mbox_active;
10150 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
10151 __lpfc_mbox_cmpl_put(phba, mboxq);
10152 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
10153 phba->sli.mbox_active = NULL;
10154 spin_unlock_irq(&phba->hbalock);
10155 }
10156
5af5eee7
JS		 10157 /* Abort all iocbs associated with the hba */
10158 lpfc_sli_hba_iocb_abort(phba);
10159
10160 /* Wait for completion of device XRI exchange busy */
10161 lpfc_sli4_xri_exchange_busy_wait(phba);
10162
da0436e9
JS		 10163 /* Disable PCI subsystem interrupt */
10164 lpfc_sli4_disable_intr(phba);
10165
912e3acd
JS		 10166 /* Disable SR-IOV if enabled */
10167 if (phba->cfg_sriov_nr_virtfn)
10168 pci_disable_sriov(pdev);
10169
da0436e9
JS		 10170 /* Stop kthread signal shall trigger work_done one more time */
10171 kthread_stop(phba->worker_thread);
10172
d1f525aa
JS		 10173 /* Unset the queues shared with the hardware then release all
10174 * allocated resources.
10175 */
10176 lpfc_sli4_queue_unset(phba);
10177 lpfc_sli4_queue_destroy(phba);
10178
3677a3a7
JS		 10179 /* Reset SLI4 HBA FCoE function */
10180 lpfc_pci_function_reset(phba);
10181
da0436e9
JS		 10182 /* Stop the SLI4 device port */
10183 phba->pport->work_port_events = 0;
10184}
10185
28baac74
JS		 10186 /**
10187 * lpfc_pc_sli4_params_get - Get the SLI4_PARAMS port capabilities.
10188 * @phba: Pointer to HBA context object.
10189 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
10190 *
10191 * This function is called in the SLI4 code path to read the port's
10192 * sli4 capabilities.
10193 *
10194 * This function may be be called from any context that can block-wait
10195 * for the completion. The expectation is that this routine is called
10196 * typically from probe_one or from the online routine.
10197 **/
10198int
10199lpfc_pc_sli4_params_get(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
10200{
10201 int rc;
10202 struct lpfc_mqe *mqe;
10203 struct lpfc_pc_sli4_params *sli4_params;
10204 uint32_t mbox_tmo;
10205
10206 rc = 0;
10207 mqe = &mboxq->u.mqe;
10208
10209 /* Read the port's SLI4 Parameters port capabilities */
fedd3b7b 10210 lpfc_pc_sli4_params(mboxq);
28baac74
JS		 10211 if (!phba->sli4_hba.intr_enable)
10212 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
10213 else {
a183a15f 10214 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
28baac74
JS		 10215 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
10216 }
10217
10218 if (unlikely(rc))
10219 return 1;
10220
10221 sli4_params = &phba->sli4_hba.pc_sli4_params;
10222 sli4_params->if_type = bf_get(if_type, &mqe->un.sli4_params);
10223 sli4_params->sli_rev = bf_get(sli_rev, &mqe->un.sli4_params);
10224 sli4_params->sli_family = bf_get(sli_family, &mqe->un.sli4_params);
10225 sli4_params->featurelevel_1 = bf_get(featurelevel_1,
10226 &mqe->un.sli4_params);
10227 sli4_params->featurelevel_2 = bf_get(featurelevel_2,
10228 &mqe->un.sli4_params);
10229 sli4_params->proto_types = mqe->un.sli4_params.word3;
10230 sli4_params->sge_supp_len = mqe->un.sli4_params.sge_supp_len;
10231 sli4_params->if_page_sz = bf_get(if_page_sz, &mqe->un.sli4_params);
10232 sli4_params->rq_db_window = bf_get(rq_db_window, &mqe->un.sli4_params);
10233 sli4_params->loopbk_scope = bf_get(loopbk_scope, &mqe->un.sli4_params);
10234 sli4_params->eq_pages_max = bf_get(eq_pages, &mqe->un.sli4_params);
10235 sli4_params->eqe_size = bf_get(eqe_size, &mqe->un.sli4_params);
10236 sli4_params->cq_pages_max = bf_get(cq_pages, &mqe->un.sli4_params);
10237 sli4_params->cqe_size = bf_get(cqe_size, &mqe->un.sli4_params);
10238 sli4_params->mq_pages_max = bf_get(mq_pages, &mqe->un.sli4_params);
10239 sli4_params->mqe_size = bf_get(mqe_size, &mqe->un.sli4_params);
10240 sli4_params->mq_elem_cnt = bf_get(mq_elem_cnt, &mqe->un.sli4_params);
10241 sli4_params->wq_pages_max = bf_get(wq_pages, &mqe->un.sli4_params);
10242 sli4_params->wqe_size = bf_get(wqe_size, &mqe->un.sli4_params);
10243 sli4_params->rq_pages_max = bf_get(rq_pages, &mqe->un.sli4_params);
10244 sli4_params->rqe_size = bf_get(rqe_size, &mqe->un.sli4_params);
10245 sli4_params->hdr_pages_max = bf_get(hdr_pages, &mqe->un.sli4_params);
10246 sli4_params->hdr_size = bf_get(hdr_size, &mqe->un.sli4_params);
10247 sli4_params->hdr_pp_align = bf_get(hdr_pp_align, &mqe->un.sli4_params);
10248 sli4_params->sgl_pages_max = bf_get(sgl_pages, &mqe->un.sli4_params);
10249 sli4_params->sgl_pp_align = bf_get(sgl_pp_align, &mqe->un.sli4_params);
0558056c
JS		 10250
10251 /* Make sure that sge_supp_len can be handled by the driver */
10252 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
10253 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
10254
28baac74
JS		 10255 return rc;
10256}
10257
fedd3b7b
JS		 10258/**
10259 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS.
10260 * @phba: Pointer to HBA context object.
10261 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
10262 *
10263 * This function is called in the SLI4 code path to read the port's
10264 * sli4 capabilities.
10265 *
10266 * This function may be be called from any context that can block-wait
10267 * for the completion. The expectation is that this routine is called
10268 * typically from probe_one or from the online routine.
10269 **/
10270int
10271lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
10272{
10273 int rc;
10274 struct lpfc_mqe *mqe = &mboxq->u.mqe;
10275 struct lpfc_pc_sli4_params *sli4_params;
a183a15f 10276 uint32_t mbox_tmo;
fedd3b7b
JS		 10277 int length;
10278 struct lpfc_sli4_parameters *mbx_sli4_parameters;
10279
6d368e53
JS		 10280 /*
10281 * By default, the driver assumes the SLI4 port requires RPI
10282 * header postings. The SLI4_PARAM response will correct this
10283 * assumption.
10284 */
10285 phba->sli4_hba.rpi_hdrs_in_use = 1;
10286
fedd3b7b
JS		 10287 /* Read the port's SLI4 Config Parameters */
10288 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
10289 sizeof(struct lpfc_sli4_cfg_mhdr));
10290 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
10291 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
10292 length, LPFC_SLI4_MBX_EMBED);
10293 if (!phba->sli4_hba.intr_enable)
10294 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
a183a15f
JS		 10295 else {
10296 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
10297 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
10298 }
fedd3b7b
JS		 10299 if (unlikely(rc))
10300 return rc;
10301 sli4_params = &phba->sli4_hba.pc_sli4_params;
10302 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
10303 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters);
10304 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters);
10305 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters);
10306 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1,
10307 mbx_sli4_parameters);
10308 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2,
10309 mbx_sli4_parameters);
10310 if (bf_get(cfg_phwq, mbx_sli4_parameters))
10311 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED;
10312 else
10313 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED;
10314 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len;
10315 sli4_params->loopbk_scope = bf_get(loopbk_scope, mbx_sli4_parameters);
1ba981fd 10316 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters);
fedd3b7b
JS		 10317 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters);
10318 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters);
10319 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters);
10320 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters);
0c651878 10321 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters);
fedd3b7b
JS		 10322 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt,
10323 mbx_sli4_parameters);
895427bd 10324 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters);
fedd3b7b
JS		 10325 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align,
10326 mbx_sli4_parameters);
6d368e53
JS		 10327 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
10328 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
895427bd
JS		 10329 phba->nvme_support = (bf_get(cfg_nvme, mbx_sli4_parameters) &&
10330 bf_get(cfg_xib, mbx_sli4_parameters));
10331
10332 if ((phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) ||
10333 !phba->nvme_support) {
10334 phba->nvme_support = 0;
10335 phba->nvmet_support = 0;
2d7dbc4c 10336 phba->cfg_nvmet_mrq = 0;
895427bd
JS		 10337 phba->cfg_nvme_io_channel = 0;
10338 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
10339 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
10340 "6101 Disabling NVME support: "
10341 "Not supported by firmware: %d %d\n",
10342 bf_get(cfg_nvme, mbx_sli4_parameters),
10343 bf_get(cfg_xib, mbx_sli4_parameters));
10344
10345 /* If firmware doesn't support NVME, just use SCSI support */
10346 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
10347 return -ENODEV;
10348 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
10349 }
0558056c 10350
f358dd0c
JS		 10351 if (bf_get(cfg_xib, mbx_sli4_parameters) && phba->cfg_suppress_rsp)
10352 phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP;
10353
0cf07f84
JS		 10354 if (bf_get(cfg_eqdr, mbx_sli4_parameters))
10355 phba->sli.sli_flag |= LPFC_SLI_USE_EQDR;
10356
0558056c
JS		 10357 /* Make sure that sge_supp_len can be handled by the driver */
10358 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
10359 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
10360
b5c53958
JS		 10361 /*
10362 * Issue IOs with CDB embedded in WQE to minimized the number
10363 * of DMAs the firmware has to do. Setting this to 1 also forces
10364 * the driver to use 128 bytes WQEs for FCP IOs.
10365 */
10366 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters))
10367 phba->fcp_embed_io = 1;
10368 else
10369 phba->fcp_embed_io = 0;
7bdedb34
JS		 10370
10371 /*
10372 * Check if the SLI port supports MDS Diagnostics
10373 */
10374 if (bf_get(cfg_mds_diags, mbx_sli4_parameters))
10375 phba->mds_diags_support = 1;
10376 else
10377 phba->mds_diags_support = 0;
fedd3b7b
JS		 10378 return 0;
10379}
10380
da0436e9
JS		 10381/**
10382 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
10383 * @pdev: pointer to PCI device
10384 * @pid: pointer to PCI device identifier
10385 *
10386 * This routine is to be called to attach a device with SLI-3 interface spec
10387 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
10388 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
10389 * information of the device and driver to see if the driver state that it can
10390 * support this kind of device. If the match is successful, the driver core
10391 * invokes this routine. If this routine determines it can claim the HBA, it
10392 * does all the initialization that it needs to do to handle the HBA properly.
10393 *
10394 * Return code
10395 * 0 - driver can claim the device
10396 * negative value - driver can not claim the device
10397 **/
6f039790 10398static int
da0436e9
JS		 10399lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid)
10400{
10401 struct lpfc_hba *phba;
10402 struct lpfc_vport *vport = NULL;
6669f9bb 10403 struct Scsi_Host *shost = NULL;
da0436e9
JS		 10404 int error;
10405 uint32_t cfg_mode, intr_mode;
10406
10407 /* Allocate memory for HBA structure */
10408 phba = lpfc_hba_alloc(pdev);
10409 if (!phba)
10410 return -ENOMEM;
10411
10412 /* Perform generic PCI device enabling operation */
10413 error = lpfc_enable_pci_dev(phba);
079b5c91 10414 if (error)
da0436e9 10415 goto out_free_phba;
da0436e9
JS		 10416
10417 /* Set up SLI API function jump table for PCI-device group-0 HBAs */
10418 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP);
10419 if (error)
10420 goto out_disable_pci_dev;
10421
10422 /* Set up SLI-3 specific device PCI memory space */
10423 error = lpfc_sli_pci_mem_setup(phba);
10424 if (error) {
10425 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10426 "1402 Failed to set up pci memory space.\n");
10427 goto out_disable_pci_dev;
10428 }
10429
da0436e9
JS		 10430 /* Set up SLI-3 specific device driver resources */
10431 error = lpfc_sli_driver_resource_setup(phba);
10432 if (error) {
10433 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10434 "1404 Failed to set up driver resource.\n");
10435 goto out_unset_pci_mem_s3;
10436 }
10437
10438 /* Initialize and populate the iocb list per host */
d1f525aa 10439
da0436e9
JS		 10440 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT);
10441 if (error) {
10442 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10443 "1405 Failed to initialize iocb list.\n");
10444 goto out_unset_driver_resource_s3;
10445 }
10446
10447 /* Set up common device driver resources */
10448 error = lpfc_setup_driver_resource_phase2(phba);
10449 if (error) {
10450 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10451 "1406 Failed to set up driver resource.\n");
10452 goto out_free_iocb_list;
10453 }
10454
079b5c91
JS		 10455 /* Get the default values for Model Name and Description */
10456 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
10457
da0436e9
JS		 10458 /* Create SCSI host to the physical port */
10459 error = lpfc_create_shost(phba);
10460 if (error) {
10461 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10462 "1407 Failed to create scsi host.\n");
10463 goto out_unset_driver_resource;
10464 }
10465
10466 /* Configure sysfs attributes */
10467 vport = phba->pport;
10468 error = lpfc_alloc_sysfs_attr(vport);
10469 if (error) {
10470 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10471 "1476 Failed to allocate sysfs attr\n");
10472 goto out_destroy_shost;
10473 }
10474
6669f9bb 10475 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
da0436e9
JS		 10476 /* Now, trying to enable interrupt and bring up the device */
10477 cfg_mode = phba->cfg_use_msi;
10478 while (true) {
10479 /* Put device to a known state before enabling interrupt */
10480 lpfc_stop_port(phba);
10481 /* Configure and enable interrupt */
10482 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode);
10483 if (intr_mode == LPFC_INTR_ERROR) {
10484 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10485 "0431 Failed to enable interrupt.\n");
10486 error = -ENODEV;
10487 goto out_free_sysfs_attr;
10488 }
10489 /* SLI-3 HBA setup */
10490 if (lpfc_sli_hba_setup(phba)) {
10491 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10492 "1477 Failed to set up hba\n");
10493 error = -ENODEV;
10494 goto out_remove_device;
10495 }
10496
10497 /* Wait 50ms for the interrupts of previous mailbox commands */
10498 msleep(50);
10499 /* Check active interrupts on message signaled interrupts */
10500 if (intr_mode == 0 ||
10501 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) {
10502 /* Log the current active interrupt mode */
10503 phba->intr_mode = intr_mode;
10504 lpfc_log_intr_mode(phba, intr_mode);
10505 break;
10506 } else {
10507 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10508 "0447 Configure interrupt mode (%d) "
10509 "failed active interrupt test.\n",
10510 intr_mode);
10511 /* Disable the current interrupt mode */
10512 lpfc_sli_disable_intr(phba);
10513 /* Try next level of interrupt mode */
10514 cfg_mode = --intr_mode;
10515 }
10516 }
10517
10518 /* Perform post initialization setup */
10519 lpfc_post_init_setup(phba);
10520
10521 /* Check if there are static vports to be created. */
10522 lpfc_create_static_vport(phba);
10523
10524 return 0;
10525
10526out_remove_device:
10527 lpfc_unset_hba(phba);
10528out_free_sysfs_attr:
10529 lpfc_free_sysfs_attr(vport);
10530out_destroy_shost:
10531 lpfc_destroy_shost(phba);
10532out_unset_driver_resource:
10533 lpfc_unset_driver_resource_phase2(phba);
10534out_free_iocb_list:
10535 lpfc_free_iocb_list(phba);
10536out_unset_driver_resource_s3:
10537 lpfc_sli_driver_resource_unset(phba);
10538out_unset_pci_mem_s3:
10539 lpfc_sli_pci_mem_unset(phba);
10540out_disable_pci_dev:
10541 lpfc_disable_pci_dev(phba);
6669f9bb
JS		 10542 if (shost)
10543 scsi_host_put(shost);
da0436e9
JS		 10544out_free_phba:
10545 lpfc_hba_free(phba);
10546 return error;
10547}
10548
10549/**
10550 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem.
10551 * @pdev: pointer to PCI device
10552 *
10553 * This routine is to be called to disattach a device with SLI-3 interface
10554 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
10555 * removed from PCI bus, it performs all the necessary cleanup for the HBA
10556 * device to be removed from the PCI subsystem properly.
10557 **/
6f039790 10558static void
da0436e9
JS		 10559lpfc_pci_remove_one_s3(struct pci_dev *pdev)
10560{
10561 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10562 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
10563 struct lpfc_vport **vports;
10564 struct lpfc_hba *phba = vport->phba;
10565 int i;
da0436e9
JS		 10566
10567 spin_lock_irq(&phba->hbalock);
10568 vport->load_flag |= FC_UNLOADING;
10569 spin_unlock_irq(&phba->hbalock);
10570
10571 lpfc_free_sysfs_attr(vport);
10572
10573 /* Release all the vports against this physical port */
10574 vports = lpfc_create_vport_work_array(phba);
10575 if (vports != NULL)
587a37f6
JS		 10576 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
10577 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
10578 continue;
da0436e9 10579 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 10580 }
da0436e9
JS		 10581 lpfc_destroy_vport_work_array(phba, vports);
10582
10583 /* Remove FC host and then SCSI host with the physical port */
10584 fc_remove_host(shost);
10585 scsi_remove_host(shost);
d613b6a7 10586
da0436e9
JS		 10587 lpfc_cleanup(vport);
10588
10589 /*
10590 * Bring down the SLI Layer. This step disable all interrupts,
10591 * clears the rings, discards all mailbox commands, and resets
10592 * the HBA.
10593 */
10594
48e34d0f 10595 /* HBA interrupt will be disabled after this call */
da0436e9
JS		 10596 lpfc_sli_hba_down(phba);
10597 /* Stop kthread signal shall trigger work_done one more time */
10598 kthread_stop(phba->worker_thread);
10599 /* Final cleanup of txcmplq and reset the HBA */
10600 lpfc_sli_brdrestart(phba);
10601
72859909
JS		 10602 kfree(phba->vpi_bmask);
10603 kfree(phba->vpi_ids);
10604
da0436e9
JS		 10605 lpfc_stop_hba_timers(phba);
10606 spin_lock_irq(&phba->hbalock);
10607 list_del_init(&vport->listentry);
10608 spin_unlock_irq(&phba->hbalock);
10609
10610 lpfc_debugfs_terminate(vport);
10611
912e3acd
JS		 10612 /* Disable SR-IOV if enabled */
10613 if (phba->cfg_sriov_nr_virtfn)
10614 pci_disable_sriov(pdev);
10615
da0436e9
JS		 10616 /* Disable interrupt */
10617 lpfc_sli_disable_intr(phba);
10618
da0436e9
JS		 10619 scsi_host_put(shost);
10620
10621 /*
10622 * Call scsi_free before mem_free since scsi bufs are released to their
10623 * corresponding pools here.
10624 */
10625 lpfc_scsi_free(phba);
10626 lpfc_mem_free_all(phba);
10627
10628 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
10629 phba->hbqslimp.virt, phba->hbqslimp.phys);
10630
10631 /* Free resources associated with SLI2 interface */
10632 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
10633 phba->slim2p.virt, phba->slim2p.phys);
10634
10635 /* unmap adapter SLIM and Control Registers */
10636 iounmap(phba->ctrl_regs_memmap_p);
10637 iounmap(phba->slim_memmap_p);
10638
10639 lpfc_hba_free(phba);
10640
e0c0483c 10641 pci_release_mem_regions(pdev);
da0436e9
JS		 10642 pci_disable_device(pdev);
10643}
10644
10645/**
10646 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt
10647 * @pdev: pointer to PCI device
10648 * @msg: power management message
10649 *
10650 * This routine is to be called from the kernel's PCI subsystem to support
10651 * system Power Management (PM) to device with SLI-3 interface spec. When
10652 * PM invokes this method, it quiesces the device by stopping the driver's
10653 * worker thread for the device, turning off device's interrupt and DMA,
10654 * and bring the device offline. Note that as the driver implements the
10655 * minimum PM requirements to a power-aware driver's PM support for the
10656 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
10657 * to the suspend() method call will be treated as SUSPEND and the driver will
10658 * fully reinitialize its device during resume() method call, the driver will
10659 * set device to PCI_D3hot state in PCI config space instead of setting it
10660 * according to the @msg provided by the PM.
10661 *
10662 * Return code
10663 * 0 - driver suspended the device
10664 * Error otherwise
10665 **/
10666static int
10667lpfc_pci_suspend_one_s3(struct pci_dev *pdev, pm_message_t msg)
10668{
10669 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10670 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10671
10672 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10673 "0473 PCI device Power Management suspend.\n");
10674
10675 /* Bring down the device */
618a5230 10676 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS		 10677 lpfc_offline(phba);
10678 kthread_stop(phba->worker_thread);
10679
10680 /* Disable interrupt from device */
10681 lpfc_sli_disable_intr(phba);
10682
10683 /* Save device state to PCI config space */
10684 pci_save_state(pdev);
10685 pci_set_power_state(pdev, PCI_D3hot);
10686
10687 return 0;
10688}
10689
10690/**
10691 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt
10692 * @pdev: pointer to PCI device
10693 *
10694 * This routine is to be called from the kernel's PCI subsystem to support
10695 * system Power Management (PM) to device with SLI-3 interface spec. When PM
10696 * invokes this method, it restores the device's PCI config space state and
10697 * fully reinitializes the device and brings it online. Note that as the
10698 * driver implements the minimum PM requirements to a power-aware driver's
10699 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE,
10700 * FREEZE) to the suspend() method call will be treated as SUSPEND and the
10701 * driver will fully reinitialize its device during resume() method call,
10702 * the device will be set to PCI_D0 directly in PCI config space before
10703 * restoring the state.
10704 *
10705 * Return code
10706 * 0 - driver suspended the device
10707 * Error otherwise
10708 **/
10709static int
10710lpfc_pci_resume_one_s3(struct pci_dev *pdev)
10711{
10712 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10713 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10714 uint32_t intr_mode;
10715 int error;
10716
10717 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10718 "0452 PCI device Power Management resume.\n");
10719
10720 /* Restore device state from PCI config space */
10721 pci_set_power_state(pdev, PCI_D0);
10722 pci_restore_state(pdev);
0d878419 10723
1dfb5a47
JS		 10724 /*
10725 * As the new kernel behavior of pci_restore_state() API call clears
10726 * device saved_state flag, need to save the restored state again.
10727 */
10728 pci_save_state(pdev);
10729
da0436e9
JS		 10730 if (pdev->is_busmaster)
10731 pci_set_master(pdev);
10732
10733 /* Startup the kernel thread for this host adapter. */
10734 phba->worker_thread = kthread_run(lpfc_do_work, phba,
10735 "lpfc_worker_%d", phba->brd_no);
10736 if (IS_ERR(phba->worker_thread)) {
10737 error = PTR_ERR(phba->worker_thread);
10738 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10739 "0434 PM resume failed to start worker "
10740 "thread: error=x%x.\n", error);
10741 return error;
10742 }
10743
10744 /* Configure and enable interrupt */
10745 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
10746 if (intr_mode == LPFC_INTR_ERROR) {
10747 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10748 "0430 PM resume Failed to enable interrupt\n");
10749 return -EIO;
10750 } else
10751 phba->intr_mode = intr_mode;
10752
10753 /* Restart HBA and bring it online */
10754 lpfc_sli_brdrestart(phba);
10755 lpfc_online(phba);
10756
10757 /* Log the current active interrupt mode */
10758 lpfc_log_intr_mode(phba, phba->intr_mode);
10759
10760 return 0;
10761}
10762
891478a2
JS		 10763/**
10764 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover
10765 * @phba: pointer to lpfc hba data structure.
10766 *
10767 * This routine is called to prepare the SLI3 device for PCI slot recover. It
e2af0d2e 10768 * aborts all the outstanding SCSI I/Os to the pci device.
891478a2
JS		 10769 **/
10770static void
10771lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
10772{
10773 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10774 "2723 PCI channel I/O abort preparing for recovery\n");
e2af0d2e
JS		 10775
10776 /*
10777 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
10778 * and let the SCSI mid-layer to retry them to recover.
10779 */
db55fba8 10780 lpfc_sli_abort_fcp_rings(phba);
891478a2
JS		 10781}
10782
0d878419
JS		 10783/**
10784 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset
10785 * @phba: pointer to lpfc hba data structure.
10786 *
10787 * This routine is called to prepare the SLI3 device for PCI slot reset. It
10788 * disables the device interrupt and pci device, and aborts the internal FCP
10789 * pending I/Os.
10790 **/
10791static void
10792lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba)
10793{
0d878419 10794 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10795 "2710 PCI channel disable preparing for reset\n");
e2af0d2e 10796
75baf696 10797 /* Block any management I/Os to the device */
618a5230 10798 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
75baf696 10799
e2af0d2e
JS		 10800 /* Block all SCSI devices' I/Os on the host */
10801 lpfc_scsi_dev_block(phba);
10802
ea714f3d
JS		 10803 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
10804 lpfc_sli_flush_fcp_rings(phba);
10805
e2af0d2e
JS		 10806 /* stop all timers */
10807 lpfc_stop_hba_timers(phba);
10808
0d878419
JS		 10809 /* Disable interrupt and pci device */
10810 lpfc_sli_disable_intr(phba);
10811 pci_disable_device(phba->pcidev);
0d878419
JS		 10812}
10813
10814/**
10815 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable
10816 * @phba: pointer to lpfc hba data structure.
10817 *
10818 * This routine is called to prepare the SLI3 device for PCI slot permanently
10819 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
10820 * pending I/Os.
10821 **/
10822static void
75baf696 10823lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba)
0d878419
JS		 10824{
10825 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10826 "2711 PCI channel permanent disable for failure\n");
e2af0d2e
JS		 10827 /* Block all SCSI devices' I/Os on the host */
10828 lpfc_scsi_dev_block(phba);
10829
10830 /* stop all timers */
10831 lpfc_stop_hba_timers(phba);
10832
0d878419
JS		 10833 /* Clean up all driver's outstanding SCSI I/Os */
10834 lpfc_sli_flush_fcp_rings(phba);
10835}
10836
da0436e9
JS		 10837/**
10838 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error
10839 * @pdev: pointer to PCI device.
10840 * @state: the current PCI connection state.
10841 *
10842 * This routine is called from the PCI subsystem for I/O error handling to
10843 * device with SLI-3 interface spec. This function is called by the PCI
10844 * subsystem after a PCI bus error affecting this device has been detected.
10845 * When this function is invoked, it will need to stop all the I/Os and
10846 * interrupt(s) to the device. Once that is done, it will return
10847 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery
10848 * as desired.
10849 *
10850 * Return codes
0d878419 10851 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link
da0436e9
JS		 10852 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
10853 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
10854 **/
10855static pci_ers_result_t
10856lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
10857{
10858 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10859 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
da0436e9 10860
0d878419
JS		 10861 switch (state) {
10862 case pci_channel_io_normal:
891478a2
JS		 10863 /* Non-fatal error, prepare for recovery */
10864 lpfc_sli_prep_dev_for_recover(phba);
0d878419
JS		 10865 return PCI_ERS_RESULT_CAN_RECOVER;
10866 case pci_channel_io_frozen:
10867 /* Fatal error, prepare for slot reset */
10868 lpfc_sli_prep_dev_for_reset(phba);
10869 return PCI_ERS_RESULT_NEED_RESET;
10870 case pci_channel_io_perm_failure:
10871 /* Permanent failure, prepare for device down */
75baf696 10872 lpfc_sli_prep_dev_for_perm_failure(phba);
da0436e9 10873 return PCI_ERS_RESULT_DISCONNECT;
0d878419
JS		 10874 default:
10875 /* Unknown state, prepare and request slot reset */
10876 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10877 "0472 Unknown PCI error state: x%x\n", state);
10878 lpfc_sli_prep_dev_for_reset(phba);
10879 return PCI_ERS_RESULT_NEED_RESET;
da0436e9 10880 }
da0436e9
JS		 10881}
10882
10883/**
10884 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch.
10885 * @pdev: pointer to PCI device.
10886 *
10887 * This routine is called from the PCI subsystem for error handling to
10888 * device with SLI-3 interface spec. This is called after PCI bus has been
10889 * reset to restart the PCI card from scratch, as if from a cold-boot.
10890 * During the PCI subsystem error recovery, after driver returns
10891 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
10892 * recovery and then call this routine before calling the .resume method
10893 * to recover the device. This function will initialize the HBA device,
10894 * enable the interrupt, but it will just put the HBA to offline state
10895 * without passing any I/O traffic.
10896 *
10897 * Return codes
10898 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
10899 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
10900 */
10901static pci_ers_result_t
10902lpfc_io_slot_reset_s3(struct pci_dev *pdev)
10903{
10904 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10905 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10906 struct lpfc_sli *psli = &phba->sli;
10907 uint32_t intr_mode;
10908
10909 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
10910 if (pci_enable_device_mem(pdev)) {
10911 printk(KERN_ERR "lpfc: Cannot re-enable "
10912 "PCI device after reset.\n");
10913 return PCI_ERS_RESULT_DISCONNECT;
10914 }
10915
10916 pci_restore_state(pdev);
1dfb5a47
JS		 10917
10918 /*
10919 * As the new kernel behavior of pci_restore_state() API call clears
10920 * device saved_state flag, need to save the restored state again.
10921 */
10922 pci_save_state(pdev);
10923
da0436e9
JS		 10924 if (pdev->is_busmaster)
10925 pci_set_master(pdev);
10926
10927 spin_lock_irq(&phba->hbalock);
10928 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
10929 spin_unlock_irq(&phba->hbalock);
10930
10931 /* Configure and enable interrupt */
10932 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
10933 if (intr_mode == LPFC_INTR_ERROR) {
10934 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10935 "0427 Cannot re-enable interrupt after "
10936 "slot reset.\n");
10937 return PCI_ERS_RESULT_DISCONNECT;
10938 } else
10939 phba->intr_mode = intr_mode;
10940
75baf696 10941 /* Take device offline, it will perform cleanup */
618a5230 10942 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS		 10943 lpfc_offline(phba);
10944 lpfc_sli_brdrestart(phba);
10945
10946 /* Log the current active interrupt mode */
10947 lpfc_log_intr_mode(phba, phba->intr_mode);
10948
10949 return PCI_ERS_RESULT_RECOVERED;
10950}
10951
10952/**
10953 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device.
10954 * @pdev: pointer to PCI device
10955 *
10956 * This routine is called from the PCI subsystem for error handling to device
10957 * with SLI-3 interface spec. It is called when kernel error recovery tells
10958 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
10959 * error recovery. After this call, traffic can start to flow from this device
10960 * again.
10961 */
10962static void
10963lpfc_io_resume_s3(struct pci_dev *pdev)
10964{
10965 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10966 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
3772a991 10967
e2af0d2e 10968 /* Bring device online, it will be no-op for non-fatal error resume */
da0436e9 10969 lpfc_online(phba);
0d878419
JS		 10970
10971 /* Clean up Advanced Error Reporting (AER) if needed */
10972 if (phba->hba_flag & HBA_AER_ENABLED)
10973 pci_cleanup_aer_uncorrect_error_status(pdev);
da0436e9 10974}
3772a991 10975
da0436e9
JS		 10976/**
10977 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve
10978 * @phba: pointer to lpfc hba data structure.
10979 *
10980 * returns the number of ELS/CT IOCBs to reserve
10981 **/
10982int
10983lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba)
10984{
10985 int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
10986
f1126688
JS		 10987 if (phba->sli_rev == LPFC_SLI_REV4) {
10988 if (max_xri <= 100)
6a9c52cf 10989 return 10;
f1126688 10990 else if (max_xri <= 256)
6a9c52cf 10991 return 25;
f1126688 10992 else if (max_xri <= 512)
6a9c52cf 10993 return 50;
f1126688 10994 else if (max_xri <= 1024)
6a9c52cf 10995 return 100;
8a9d2e80 10996 else if (max_xri <= 1536)
6a9c52cf 10997 return 150;
8a9d2e80
JS		 10998 else if (max_xri <= 2048)
10999 return 200;
11000 else
11001 return 250;
f1126688
JS		 11002 } else
11003 return 0;
3772a991
JS		 11004}
11005
895427bd
JS		 11006/**
11007 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve
11008 * @phba: pointer to lpfc hba data structure.
11009 *
f358dd0c 11010 * returns the number of ELS/CT + NVMET IOCBs to reserve
895427bd
JS		 11011 **/
11012int
11013lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba)
11014{
11015 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba);
11016
f358dd0c
JS		 11017 if (phba->nvmet_support)
11018 max_xri += LPFC_NVMET_BUF_POST;
895427bd
JS		 11019 return max_xri;
11020}
11021
11022
52d52440
JS		 11023/**
11024 * lpfc_write_firmware - attempt to write a firmware image to the port
52d52440 11025 * @fw: pointer to firmware image returned from request_firmware.
ce396282 11026 * @phba: pointer to lpfc hba data structure.
52d52440 11027 *
52d52440 11028 **/
ce396282
JS		 11029static void
11030lpfc_write_firmware(const struct firmware *fw, void *context)
52d52440 11031{
ce396282 11032 struct lpfc_hba *phba = (struct lpfc_hba *)context;
6b5151fd 11033 char fwrev[FW_REV_STR_SIZE];
ce396282 11034 struct lpfc_grp_hdr *image;
52d52440
JS		 11035 struct list_head dma_buffer_list;
11036 int i, rc = 0;
11037 struct lpfc_dmabuf *dmabuf, *next;
11038 uint32_t offset = 0, temp_offset = 0;
6b6ef5db 11039 uint32_t magic_number, ftype, fid, fsize;
52d52440 11040
c71ab861 11041 /* It can be null in no-wait mode, sanity check */
ce396282
JS		 11042 if (!fw) {
11043 rc = -ENXIO;
11044 goto out;
11045 }
11046 image = (struct lpfc_grp_hdr *)fw->data;
11047
6b6ef5db
JS		 11048 magic_number = be32_to_cpu(image->magic_number);
11049 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image);
11050 fid = bf_get_be32(lpfc_grp_hdr_id, image),
11051 fsize = be32_to_cpu(image->size);
11052
52d52440 11053 INIT_LIST_HEAD(&dma_buffer_list);
6b6ef5db
JS		 11054 if ((magic_number != LPFC_GROUP_OJECT_MAGIC_G5 &&
11055 magic_number != LPFC_GROUP_OJECT_MAGIC_G6) ||
11056 ftype != LPFC_FILE_TYPE_GROUP || fsize != fw->size) {
52d52440
JS		 11057 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11058 "3022 Invalid FW image found. "
efe583c6 11059 "Magic:%x Type:%x ID:%x Size %d %zd\n",
6b6ef5db 11060 magic_number, ftype, fid, fsize, fw->size);
ce396282
JS		 11061 rc = -EINVAL;
11062 goto release_out;
52d52440
JS		 11063 }
11064 lpfc_decode_firmware_rev(phba, fwrev, 1);
88a2cfbb 11065 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) {
52d52440 11066 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
ce396282 11067 "3023 Updating Firmware, Current Version:%s "
52d52440 11068 "New Version:%s\n",
88a2cfbb 11069 fwrev, image->revision);
52d52440
JS		 11070 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) {
11071 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
11072 GFP_KERNEL);
11073 if (!dmabuf) {
11074 rc = -ENOMEM;
ce396282 11075 goto release_out;
52d52440
JS		 11076 }
11077 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
11078 SLI4_PAGE_SIZE,
11079 &dmabuf->phys,
11080 GFP_KERNEL);
11081 if (!dmabuf->virt) {
11082 kfree(dmabuf);
11083 rc = -ENOMEM;
ce396282 11084 goto release_out;
52d52440
JS		 11085 }
11086 list_add_tail(&dmabuf->list, &dma_buffer_list);
11087 }
11088 while (offset < fw->size) {
11089 temp_offset = offset;
11090 list_for_each_entry(dmabuf, &dma_buffer_list, list) {
079b5c91 11091 if (temp_offset + SLI4_PAGE_SIZE > fw->size) {
52d52440
JS		 11092 memcpy(dmabuf->virt,
11093 fw->data + temp_offset,
079b5c91
JS		 11094 fw->size - temp_offset);
11095 temp_offset = fw->size;
52d52440
JS		 11096 break;
11097 }
52d52440
JS		 11098 memcpy(dmabuf->virt, fw->data + temp_offset,
11099 SLI4_PAGE_SIZE);
88a2cfbb 11100 temp_offset += SLI4_PAGE_SIZE;
52d52440
JS		 11101 }
11102 rc = lpfc_wr_object(phba, &dma_buffer_list,
11103 (fw->size - offset), &offset);
ce396282
JS		 11104 if (rc)
11105 goto release_out;
52d52440
JS		 11106 }
11107 rc = offset;
11108 }
ce396282
JS		 11109
11110release_out:
52d52440
JS		 11111 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) {
11112 list_del(&dmabuf->list);
11113 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
11114 dmabuf->virt, dmabuf->phys);
11115 kfree(dmabuf);
11116 }
ce396282
JS		 11117 release_firmware(fw);
11118out:
11119 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
c71ab861 11120 "3024 Firmware update done: %d.\n", rc);
ce396282 11121 return;
52d52440
JS		 11122}
11123
c71ab861
JS		 11124/**
11125 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade
11126 * @phba: pointer to lpfc hba data structure.
11127 *
11128 * This routine is called to perform Linux generic firmware upgrade on device
11129 * that supports such feature.
11130 **/
11131int
11132lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade)
11133{
11134 uint8_t file_name[ELX_MODEL_NAME_SIZE];
11135 int ret;
11136 const struct firmware *fw;
11137
11138 /* Only supported on SLI4 interface type 2 for now */
11139 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
11140 LPFC_SLI_INTF_IF_TYPE_2)
11141 return -EPERM;
11142
11143 snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName);
11144
11145 if (fw_upgrade == INT_FW_UPGRADE) {
11146 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
11147 file_name, &phba->pcidev->dev,
11148 GFP_KERNEL, (void *)phba,
11149 lpfc_write_firmware);
11150 } else if (fw_upgrade == RUN_FW_UPGRADE) {
11151 ret = request_firmware(&fw, file_name, &phba->pcidev->dev);
11152 if (!ret)
11153 lpfc_write_firmware(fw, (void *)phba);
11154 } else {
11155 ret = -EINVAL;
11156 }
11157
11158 return ret;
11159}
11160
3772a991 11161/**
da0436e9 11162 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys
3772a991
JS		 11163 * @pdev: pointer to PCI device
11164 * @pid: pointer to PCI device identifier
11165 *
da0436e9
JS		 11166 * This routine is called from the kernel's PCI subsystem to device with
11167 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991 11168 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
da0436e9
JS		 11169 * information of the device and driver to see if the driver state that it
11170 * can support this kind of device. If the match is successful, the driver
11171 * core invokes this routine. If this routine determines it can claim the HBA,
11172 * it does all the initialization that it needs to do to handle the HBA
11173 * properly.
3772a991
JS		 11174 *
11175 * Return code
11176 * 0 - driver can claim the device
11177 * negative value - driver can not claim the device
11178 **/
6f039790 11179static int
da0436e9 11180lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
3772a991
JS		 11181{
11182 struct lpfc_hba *phba;
11183 struct lpfc_vport *vport = NULL;
6669f9bb 11184 struct Scsi_Host *shost = NULL;
6c621a22 11185 int error;
3772a991
JS		 11186 uint32_t cfg_mode, intr_mode;
11187
11188 /* Allocate memory for HBA structure */
11189 phba = lpfc_hba_alloc(pdev);
11190 if (!phba)
11191 return -ENOMEM;
11192
11193 /* Perform generic PCI device enabling operation */
11194 error = lpfc_enable_pci_dev(phba);
079b5c91 11195 if (error)
3772a991 11196 goto out_free_phba;
3772a991 11197
da0436e9
JS		 11198 /* Set up SLI API function jump table for PCI-device group-1 HBAs */
11199 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC);
3772a991
JS		 11200 if (error)
11201 goto out_disable_pci_dev;
11202
da0436e9
JS		 11203 /* Set up SLI-4 specific device PCI memory space */
11204 error = lpfc_sli4_pci_mem_setup(phba);
3772a991
JS		 11205 if (error) {
11206 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11207 "1410 Failed to set up pci memory space.\n");
3772a991
JS		 11208 goto out_disable_pci_dev;
11209 }
11210
da0436e9
JS		 11211 /* Set up SLI-4 Specific device driver resources */
11212 error = lpfc_sli4_driver_resource_setup(phba);
3772a991
JS		 11213 if (error) {
11214 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9
JS		 11215 "1412 Failed to set up driver resource.\n");
11216 goto out_unset_pci_mem_s4;
3772a991
JS		 11217 }
11218
19ca7609 11219 INIT_LIST_HEAD(&phba->active_rrq_list);
7d791df7 11220 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list);
19ca7609 11221
3772a991
JS		 11222 /* Set up common device driver resources */
11223 error = lpfc_setup_driver_resource_phase2(phba);
11224 if (error) {
11225 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11226 "1414 Failed to set up driver resource.\n");
6c621a22 11227 goto out_unset_driver_resource_s4;
3772a991
JS		 11228 }
11229
079b5c91
JS		 11230 /* Get the default values for Model Name and Description */
11231 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
11232
3772a991
JS		 11233 /* Create SCSI host to the physical port */
11234 error = lpfc_create_shost(phba);
11235 if (error) {
11236 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11237 "1415 Failed to create scsi host.\n");
3772a991
JS		 11238 goto out_unset_driver_resource;
11239 }
9399627f 11240
5b75da2f 11241 /* Configure sysfs attributes */
3772a991
JS		 11242 vport = phba->pport;
11243 error = lpfc_alloc_sysfs_attr(vport);
11244 if (error) {
9399627f 11245 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11246 "1416 Failed to allocate sysfs attr\n");
3772a991 11247 goto out_destroy_shost;
98c9ea5c 11248 }
875fbdfe 11249
6669f9bb 11250 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
3772a991 11251 /* Now, trying to enable interrupt and bring up the device */
5b75da2f 11252 cfg_mode = phba->cfg_use_msi;
5b75da2f 11253
7b15db32
JS		 11254 /* Put device to a known state before enabling interrupt */
11255 lpfc_stop_port(phba);
895427bd 11256
7b15db32
JS		 11257 /* Configure and enable interrupt */
11258 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode);
11259 if (intr_mode == LPFC_INTR_ERROR) {
11260 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11261 "0426 Failed to enable interrupt.\n");
11262 error = -ENODEV;
11263 goto out_free_sysfs_attr;
11264 }
11265 /* Default to single EQ for non-MSI-X */
895427bd
JS		 11266 if (phba->intr_type != MSIX) {
11267 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
11268 phba->cfg_fcp_io_channel = 1;
2d7dbc4c 11269 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd 11270 phba->cfg_nvme_io_channel = 1;
2d7dbc4c
JS		 11271 if (phba->nvmet_support)
11272 phba->cfg_nvmet_mrq = 1;
11273 }
895427bd
JS		 11274 phba->io_channel_irqs = 1;
11275 }
11276
7b15db32
JS		 11277 /* Set up SLI-4 HBA */
11278 if (lpfc_sli4_hba_setup(phba)) {
11279 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11280 "1421 Failed to set up hba\n");
11281 error = -ENODEV;
11282 goto out_disable_intr;
98c9ea5c 11283 }
858c9f6c 11284
7b15db32
JS		 11285 /* Log the current active interrupt mode */
11286 phba->intr_mode = intr_mode;
11287 lpfc_log_intr_mode(phba, intr_mode);
11288
3772a991
JS		 11289 /* Perform post initialization setup */
11290 lpfc_post_init_setup(phba);
dea3101e 11291
01649561
JS		 11292 /* NVME support in FW earlier in the driver load corrects the
11293 * FC4 type making a check for nvme_support unnecessary.
11294 */
11295 if ((phba->nvmet_support == 0) &&
11296 (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)) {
11297 /* Create NVME binding with nvme_fc_transport. This
d1f525aa
JS		 11298 * ensures the vport is initialized. If the localport
11299 * create fails, it should not unload the driver to
11300 * support field issues.
01649561
JS		 11301 */
11302 error = lpfc_nvme_create_localport(vport);
11303 if (error) {
11304 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11305 "6004 NVME registration failed, "
11306 "error x%x\n",
11307 error);
01649561
JS		 11308 }
11309 }
895427bd 11310
c71ab861
JS		 11311 /* check for firmware upgrade or downgrade */
11312 if (phba->cfg_request_firmware_upgrade)
db6f1c2f 11313 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE);
52d52440 11314
1c6834a7
JS		 11315 /* Check if there are static vports to be created. */
11316 lpfc_create_static_vport(phba);
dea3101e 11317 return 0;
11318
da0436e9
JS		 11319out_disable_intr:
11320 lpfc_sli4_disable_intr(phba);
5b75da2f
JS		 11321out_free_sysfs_attr:
11322 lpfc_free_sysfs_attr(vport);
3772a991
JS		 11323out_destroy_shost:
11324 lpfc_destroy_shost(phba);
11325out_unset_driver_resource:
11326 lpfc_unset_driver_resource_phase2(phba);
da0436e9
JS		 11327out_unset_driver_resource_s4:
11328 lpfc_sli4_driver_resource_unset(phba);
11329out_unset_pci_mem_s4:
11330 lpfc_sli4_pci_mem_unset(phba);
3772a991
JS		 11331out_disable_pci_dev:
11332 lpfc_disable_pci_dev(phba);
6669f9bb
JS		 11333 if (shost)
11334 scsi_host_put(shost);
2e0fef85 11335out_free_phba:
3772a991 11336 lpfc_hba_free(phba);
dea3101e 11337 return error;
11338}
11339
e59058c4 11340/**
da0436e9 11341 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem
e59058c4
JS		 11342 * @pdev: pointer to PCI device
11343 *
da0436e9
JS		 11344 * This routine is called from the kernel's PCI subsystem to device with
11345 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991
JS		 11346 * removed from PCI bus, it performs all the necessary cleanup for the HBA
11347 * device to be removed from the PCI subsystem properly.
e59058c4 11348 **/
6f039790 11349static void
da0436e9 11350lpfc_pci_remove_one_s4(struct pci_dev *pdev)
dea3101e 11351{
da0436e9 11352 struct Scsi_Host *shost = pci_get_drvdata(pdev);
2e0fef85 11353 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
eada272d 11354 struct lpfc_vport **vports;
da0436e9 11355 struct lpfc_hba *phba = vport->phba;
eada272d 11356 int i;
8a4df120 11357
da0436e9 11358 /* Mark the device unloading flag */
549e55cd 11359 spin_lock_irq(&phba->hbalock);
51ef4c26 11360 vport->load_flag |= FC_UNLOADING;
549e55cd 11361 spin_unlock_irq(&phba->hbalock);
2e0fef85 11362
da0436e9 11363 /* Free the HBA sysfs attributes */
858c9f6c
JS		 11364 lpfc_free_sysfs_attr(vport);
11365
eada272d
JS		 11366 /* Release all the vports against this physical port */
11367 vports = lpfc_create_vport_work_array(phba);
11368 if (vports != NULL)
587a37f6
JS		 11369 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
11370 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
11371 continue;
eada272d 11372 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 11373 }
eada272d
JS		 11374 lpfc_destroy_vport_work_array(phba, vports);
11375
11376 /* Remove FC host and then SCSI host with the physical port */
858c9f6c
JS		 11377 fc_remove_host(shost);
11378 scsi_remove_host(shost);
da0436e9 11379
d613b6a7
JS		 11380 /* Perform ndlp cleanup on the physical port. The nvme and nvmet
11381 * localports are destroyed after to cleanup all transport memory.
895427bd 11382 */
87af33fe 11383 lpfc_cleanup(vport);
d613b6a7
JS		 11384 lpfc_nvmet_destroy_targetport(phba);
11385 lpfc_nvme_destroy_localport(vport);
87af33fe 11386
2e0fef85 11387 /*
da0436e9 11388 * Bring down the SLI Layer. This step disables all interrupts,
2e0fef85 11389 * clears the rings, discards all mailbox commands, and resets
da0436e9 11390 * the HBA FCoE function.
2e0fef85 11391 */
da0436e9
JS		 11392 lpfc_debugfs_terminate(vport);
11393 lpfc_sli4_hba_unset(phba);
a257bf90 11394
858c9f6c
JS		 11395 spin_lock_irq(&phba->hbalock);
11396 list_del_init(&vport->listentry);
11397 spin_unlock_irq(&phba->hbalock);
11398
3677a3a7 11399 /* Perform scsi free before driver resource_unset since scsi
da0436e9 11400 * buffers are released to their corresponding pools here.
2e0fef85
JS		 11401 */
11402 lpfc_scsi_free(phba);
895427bd 11403 lpfc_nvme_free(phba);
01649561 11404 lpfc_free_iocb_list(phba);
67d12733 11405
da0436e9 11406 lpfc_sli4_driver_resource_unset(phba);
ed957684 11407
da0436e9
JS		 11408 /* Unmap adapter Control and Doorbell registers */
11409 lpfc_sli4_pci_mem_unset(phba);
2e0fef85 11410
da0436e9
JS		 11411 /* Release PCI resources and disable device's PCI function */
11412 scsi_host_put(shost);
11413 lpfc_disable_pci_dev(phba);
2e0fef85 11414
da0436e9 11415 /* Finally, free the driver's device data structure */
3772a991 11416 lpfc_hba_free(phba);
2e0fef85 11417
da0436e9 11418 return;
dea3101e 11419}
11420
3a55b532 11421/**
da0436e9 11422 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt
3a55b532
JS		 11423 * @pdev: pointer to PCI device
11424 * @msg: power management message
11425 *
da0436e9
JS		 11426 * This routine is called from the kernel's PCI subsystem to support system
11427 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes
11428 * this method, it quiesces the device by stopping the driver's worker
11429 * thread for the device, turning off device's interrupt and DMA, and bring
11430 * the device offline. Note that as the driver implements the minimum PM
11431 * requirements to a power-aware driver's PM support for suspend/resume -- all
11432 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend()
11433 * method call will be treated as SUSPEND and the driver will fully
11434 * reinitialize its device during resume() method call, the driver will set
11435 * device to PCI_D3hot state in PCI config space instead of setting it
3772a991 11436 * according to the @msg provided by the PM.
3a55b532
JS		 11437 *
11438 * Return code
3772a991
JS		 11439 * 0 - driver suspended the device
11440 * Error otherwise
3a55b532
JS		 11441 **/
11442static int
da0436e9 11443lpfc_pci_suspend_one_s4(struct pci_dev *pdev, pm_message_t msg)
3a55b532
JS		 11444{
11445 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11446 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11447
11448 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
75baf696 11449 "2843 PCI device Power Management suspend.\n");
3a55b532
JS		 11450
11451 /* Bring down the device */
618a5230 11452 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
3a55b532
JS		 11453 lpfc_offline(phba);
11454 kthread_stop(phba->worker_thread);
11455
11456 /* Disable interrupt from device */
da0436e9 11457 lpfc_sli4_disable_intr(phba);
5350d872 11458 lpfc_sli4_queue_destroy(phba);
3a55b532
JS		 11459
11460 /* Save device state to PCI config space */
11461 pci_save_state(pdev);
11462 pci_set_power_state(pdev, PCI_D3hot);
11463
11464 return 0;
11465}
11466
11467/**
da0436e9 11468 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt
3a55b532
JS		 11469 * @pdev: pointer to PCI device
11470 *
da0436e9
JS		 11471 * This routine is called from the kernel's PCI subsystem to support system
11472 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes
11473 * this method, it restores the device's PCI config space state and fully
11474 * reinitializes the device and brings it online. Note that as the driver
11475 * implements the minimum PM requirements to a power-aware driver's PM for
11476 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
11477 * to the suspend() method call will be treated as SUSPEND and the driver
11478 * will fully reinitialize its device during resume() method call, the device
11479 * will be set to PCI_D0 directly in PCI config space before restoring the
11480 * state.
3a55b532
JS		 11481 *
11482 * Return code
3772a991
JS		 11483 * 0 - driver suspended the device
11484 * Error otherwise
3a55b532
JS		 11485 **/
11486static int
da0436e9 11487lpfc_pci_resume_one_s4(struct pci_dev *pdev)
3a55b532
JS		 11488{
11489 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11490 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
5b75da2f 11491 uint32_t intr_mode;
3a55b532
JS		 11492 int error;
11493
11494 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
da0436e9 11495 "0292 PCI device Power Management resume.\n");
3a55b532
JS		 11496
11497 /* Restore device state from PCI config space */
11498 pci_set_power_state(pdev, PCI_D0);
11499 pci_restore_state(pdev);
1dfb5a47
JS		 11500
11501 /*
11502 * As the new kernel behavior of pci_restore_state() API call clears
11503 * device saved_state flag, need to save the restored state again.
11504 */
11505 pci_save_state(pdev);
11506
3a55b532
JS		 11507 if (pdev->is_busmaster)
11508 pci_set_master(pdev);
11509
da0436e9 11510 /* Startup the kernel thread for this host adapter. */
3a55b532
JS		 11511 phba->worker_thread = kthread_run(lpfc_do_work, phba,
11512 "lpfc_worker_%d", phba->brd_no);
11513 if (IS_ERR(phba->worker_thread)) {
11514 error = PTR_ERR(phba->worker_thread);
11515 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11516 "0293 PM resume failed to start worker "
3a55b532
JS		 11517 "thread: error=x%x.\n", error);
11518 return error;
11519 }
11520
5b75da2f 11521 /* Configure and enable interrupt */
da0436e9 11522 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
5b75da2f 11523 if (intr_mode == LPFC_INTR_ERROR) {
3a55b532 11524 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11525 "0294 PM resume Failed to enable interrupt\n");
5b75da2f
JS		 11526 return -EIO;
11527 } else
11528 phba->intr_mode = intr_mode;
3a55b532
JS		 11529
11530 /* Restart HBA and bring it online */
11531 lpfc_sli_brdrestart(phba);
11532 lpfc_online(phba);
11533
5b75da2f
JS		 11534 /* Log the current active interrupt mode */
11535 lpfc_log_intr_mode(phba, phba->intr_mode);
11536
3a55b532
JS		 11537 return 0;
11538}
11539
75baf696
JS		 11540/**
11541 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover
11542 * @phba: pointer to lpfc hba data structure.
11543 *
11544 * This routine is called to prepare the SLI4 device for PCI slot recover. It
11545 * aborts all the outstanding SCSI I/Os to the pci device.
11546 **/
11547static void
11548lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba)
11549{
75baf696
JS		 11550 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11551 "2828 PCI channel I/O abort preparing for recovery\n");
11552 /*
11553 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
11554 * and let the SCSI mid-layer to retry them to recover.
11555 */
db55fba8 11556 lpfc_sli_abort_fcp_rings(phba);
75baf696
JS		 11557}
11558
11559/**
11560 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset
11561 * @phba: pointer to lpfc hba data structure.
11562 *
11563 * This routine is called to prepare the SLI4 device for PCI slot reset. It
11564 * disables the device interrupt and pci device, and aborts the internal FCP
11565 * pending I/Os.
11566 **/
11567static void
11568lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba)
11569{
11570 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11571 "2826 PCI channel disable preparing for reset\n");
11572
11573 /* Block any management I/Os to the device */
618a5230 11574 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT);
75baf696
JS		 11575
11576 /* Block all SCSI devices' I/Os on the host */
11577 lpfc_scsi_dev_block(phba);
11578
ea714f3d
JS		 11579 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
11580 lpfc_sli_flush_fcp_rings(phba);
11581
75baf696
JS		 11582 /* stop all timers */
11583 lpfc_stop_hba_timers(phba);
11584
11585 /* Disable interrupt and pci device */
11586 lpfc_sli4_disable_intr(phba);
5350d872 11587 lpfc_sli4_queue_destroy(phba);
75baf696 11588 pci_disable_device(phba->pcidev);
75baf696
JS		 11589}
11590
11591/**
11592 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable
11593 * @phba: pointer to lpfc hba data structure.
11594 *
11595 * This routine is called to prepare the SLI4 device for PCI slot permanently
11596 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
11597 * pending I/Os.
11598 **/
11599static void
11600lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba)
11601{
11602 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11603 "2827 PCI channel permanent disable for failure\n");
11604
11605 /* Block all SCSI devices' I/Os on the host */
11606 lpfc_scsi_dev_block(phba);
11607
11608 /* stop all timers */
11609 lpfc_stop_hba_timers(phba);
11610
11611 /* Clean up all driver's outstanding SCSI I/Os */
11612 lpfc_sli_flush_fcp_rings(phba);
11613}
11614
8d63f375 11615/**
da0436e9 11616 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device
e59058c4
JS		 11617 * @pdev: pointer to PCI device.
11618 * @state: the current PCI connection state.
8d63f375 11619 *
da0436e9
JS		 11620 * This routine is called from the PCI subsystem for error handling to device
11621 * with SLI-4 interface spec. This function is called by the PCI subsystem
11622 * after a PCI bus error affecting this device has been detected. When this
11623 * function is invoked, it will need to stop all the I/Os and interrupt(s)
11624 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET
11625 * for the PCI subsystem to perform proper recovery as desired.
e59058c4
JS		 11626 *
11627 * Return codes
3772a991
JS		 11628 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
11629 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
e59058c4 11630 **/
3772a991 11631static pci_ers_result_t
da0436e9 11632lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state)
8d63f375 11633{
75baf696
JS		 11634 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11635 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11636
11637 switch (state) {
11638 case pci_channel_io_normal:
11639 /* Non-fatal error, prepare for recovery */
11640 lpfc_sli4_prep_dev_for_recover(phba);
11641 return PCI_ERS_RESULT_CAN_RECOVER;
11642 case pci_channel_io_frozen:
11643 /* Fatal error, prepare for slot reset */
11644 lpfc_sli4_prep_dev_for_reset(phba);
11645 return PCI_ERS_RESULT_NEED_RESET;
11646 case pci_channel_io_perm_failure:
11647 /* Permanent failure, prepare for device down */
11648 lpfc_sli4_prep_dev_for_perm_failure(phba);
11649 return PCI_ERS_RESULT_DISCONNECT;
11650 default:
11651 /* Unknown state, prepare and request slot reset */
11652 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11653 "2825 Unknown PCI error state: x%x\n", state);
11654 lpfc_sli4_prep_dev_for_reset(phba);
11655 return PCI_ERS_RESULT_NEED_RESET;
11656 }
8d63f375
LV		 11657}
11658
11659/**
da0436e9 11660 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch
e59058c4
JS		 11661 * @pdev: pointer to PCI device.
11662 *
da0436e9
JS		 11663 * This routine is called from the PCI subsystem for error handling to device
11664 * with SLI-4 interface spec. It is called after PCI bus has been reset to
11665 * restart the PCI card from scratch, as if from a cold-boot. During the
11666 * PCI subsystem error recovery, after the driver returns
3772a991 11667 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
da0436e9
JS		 11668 * recovery and then call this routine before calling the .resume method to
11669 * recover the device. This function will initialize the HBA device, enable
11670 * the interrupt, but it will just put the HBA to offline state without
11671 * passing any I/O traffic.
8d63f375 11672 *
e59058c4 11673 * Return codes
3772a991
JS		 11674 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11675 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
8d63f375 11676 */
3772a991 11677static pci_ers_result_t
da0436e9 11678lpfc_io_slot_reset_s4(struct pci_dev *pdev)
8d63f375 11679{
75baf696
JS		 11680 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11681 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11682 struct lpfc_sli *psli = &phba->sli;
11683 uint32_t intr_mode;
11684
11685 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
11686 if (pci_enable_device_mem(pdev)) {
11687 printk(KERN_ERR "lpfc: Cannot re-enable "
11688 "PCI device after reset.\n");
11689 return PCI_ERS_RESULT_DISCONNECT;
11690 }
11691
11692 pci_restore_state(pdev);
0a96e975
JS		 11693
11694 /*
11695 * As the new kernel behavior of pci_restore_state() API call clears
11696 * device saved_state flag, need to save the restored state again.
11697 */
11698 pci_save_state(pdev);
11699
75baf696
JS		 11700 if (pdev->is_busmaster)
11701 pci_set_master(pdev);
11702
11703 spin_lock_irq(&phba->hbalock);
11704 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
11705 spin_unlock_irq(&phba->hbalock);
11706
11707 /* Configure and enable interrupt */
11708 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
11709 if (intr_mode == LPFC_INTR_ERROR) {
11710 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11711 "2824 Cannot re-enable interrupt after "
11712 "slot reset.\n");
11713 return PCI_ERS_RESULT_DISCONNECT;
11714 } else
11715 phba->intr_mode = intr_mode;
11716
11717 /* Log the current active interrupt mode */
11718 lpfc_log_intr_mode(phba, phba->intr_mode);
11719
8d63f375
LV		 11720 return PCI_ERS_RESULT_RECOVERED;
11721}
11722
11723/**
da0436e9 11724 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device
e59058c4 11725 * @pdev: pointer to PCI device
8d63f375 11726 *
3772a991 11727 * This routine is called from the PCI subsystem for error handling to device
da0436e9 11728 * with SLI-4 interface spec. It is called when kernel error recovery tells
3772a991
JS		 11729 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
11730 * error recovery. After this call, traffic can start to flow from this device
11731 * again.
da0436e9 11732 **/
3772a991 11733static void
da0436e9 11734lpfc_io_resume_s4(struct pci_dev *pdev)
8d63f375 11735{
75baf696
JS		 11736 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11737 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11738
11739 /*
11740 * In case of slot reset, as function reset is performed through
11741 * mailbox command which needs DMA to be enabled, this operation
11742 * has to be moved to the io resume phase. Taking device offline
11743 * will perform the necessary cleanup.
11744 */
11745 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) {
11746 /* Perform device reset */
618a5230 11747 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
75baf696
JS		 11748 lpfc_offline(phba);
11749 lpfc_sli_brdrestart(phba);
11750 /* Bring the device back online */
11751 lpfc_online(phba);
11752 }
11753
11754 /* Clean up Advanced Error Reporting (AER) if needed */
11755 if (phba->hba_flag & HBA_AER_ENABLED)
11756 pci_cleanup_aer_uncorrect_error_status(pdev);
8d63f375
LV		 11757}
11758
3772a991
JS		 11759/**
11760 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem
11761 * @pdev: pointer to PCI device
11762 * @pid: pointer to PCI device identifier
11763 *
11764 * This routine is to be registered to the kernel's PCI subsystem. When an
11765 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks
11766 * at PCI device-specific information of the device and driver to see if the
11767 * driver state that it can support this kind of device. If the match is
11768 * successful, the driver core invokes this routine. This routine dispatches
11769 * the action to the proper SLI-3 or SLI-4 device probing routine, which will
11770 * do all the initialization that it needs to do to handle the HBA device
11771 * properly.
11772 *
11773 * Return code
11774 * 0 - driver can claim the device
11775 * negative value - driver can not claim the device
11776 **/
6f039790 11777static int
3772a991
JS		 11778lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
11779{
11780 int rc;
8fa38513 11781 struct lpfc_sli_intf intf;
3772a991 11782
28baac74 11783 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
3772a991
JS		 11784 return -ENODEV;
11785
8fa38513 11786 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
28baac74 11787 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
da0436e9 11788 rc = lpfc_pci_probe_one_s4(pdev, pid);
8fa38513 11789 else
3772a991 11790 rc = lpfc_pci_probe_one_s3(pdev, pid);
8fa38513 11791
3772a991
JS		 11792 return rc;
11793}
11794
11795/**
11796 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem
11797 * @pdev: pointer to PCI device
11798 *
11799 * This routine is to be registered to the kernel's PCI subsystem. When an
11800 * Emulex HBA is removed from PCI bus, the driver core invokes this routine.
11801 * This routine dispatches the action to the proper SLI-3 or SLI-4 device
11802 * remove routine, which will perform all the necessary cleanup for the
11803 * device to be removed from the PCI subsystem properly.
11804 **/
6f039790 11805static void
3772a991
JS		 11806lpfc_pci_remove_one(struct pci_dev *pdev)
11807{
11808 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11809 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11810
11811 switch (phba->pci_dev_grp) {
11812 case LPFC_PCI_DEV_LP:
11813 lpfc_pci_remove_one_s3(pdev);
11814 break;
da0436e9
JS		 11815 case LPFC_PCI_DEV_OC:
11816 lpfc_pci_remove_one_s4(pdev);
11817 break;
3772a991
JS		 11818 default:
11819 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11820 "1424 Invalid PCI device group: 0x%x\n",
11821 phba->pci_dev_grp);
11822 break;
11823 }
11824 return;
11825}
11826
11827/**
11828 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management
11829 * @pdev: pointer to PCI device
11830 * @msg: power management message
11831 *
11832 * This routine is to be registered to the kernel's PCI subsystem to support
11833 * system Power Management (PM). When PM invokes this method, it dispatches
11834 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will
11835 * suspend the device.
11836 *
11837 * Return code
11838 * 0 - driver suspended the device
11839 * Error otherwise
11840 **/
11841static int
11842lpfc_pci_suspend_one(struct pci_dev *pdev, pm_message_t msg)
11843{
11844 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11845 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11846 int rc = -ENODEV;
11847
11848 switch (phba->pci_dev_grp) {
11849 case LPFC_PCI_DEV_LP:
11850 rc = lpfc_pci_suspend_one_s3(pdev, msg);
11851 break;
da0436e9
JS		 11852 case LPFC_PCI_DEV_OC:
11853 rc = lpfc_pci_suspend_one_s4(pdev, msg);
11854 break;
3772a991
JS		 11855 default:
11856 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11857 "1425 Invalid PCI device group: 0x%x\n",
11858 phba->pci_dev_grp);
11859 break;
11860 }
11861 return rc;
11862}
11863
11864/**
11865 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management
11866 * @pdev: pointer to PCI device
11867 *
11868 * This routine is to be registered to the kernel's PCI subsystem to support
11869 * system Power Management (PM). When PM invokes this method, it dispatches
11870 * the action to the proper SLI-3 or SLI-4 device resume routine, which will
11871 * resume the device.
11872 *
11873 * Return code
11874 * 0 - driver suspended the device
11875 * Error otherwise
11876 **/
11877static int
11878lpfc_pci_resume_one(struct pci_dev *pdev)
11879{
11880 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11881 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11882 int rc = -ENODEV;
11883
11884 switch (phba->pci_dev_grp) {
11885 case LPFC_PCI_DEV_LP:
11886 rc = lpfc_pci_resume_one_s3(pdev);
11887 break;
da0436e9
JS		 11888 case LPFC_PCI_DEV_OC:
11889 rc = lpfc_pci_resume_one_s4(pdev);
11890 break;
3772a991
JS		 11891 default:
11892 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11893 "1426 Invalid PCI device group: 0x%x\n",
11894 phba->pci_dev_grp);
11895 break;
11896 }
11897 return rc;
11898}
11899
11900/**
11901 * lpfc_io_error_detected - lpfc method for handling PCI I/O error
11902 * @pdev: pointer to PCI device.
11903 * @state: the current PCI connection state.
11904 *
11905 * This routine is registered to the PCI subsystem for error handling. This
11906 * function is called by the PCI subsystem after a PCI bus error affecting
11907 * this device has been detected. When this routine is invoked, it dispatches
11908 * the action to the proper SLI-3 or SLI-4 device error detected handling
11909 * routine, which will perform the proper error detected operation.
11910 *
11911 * Return codes
11912 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
11913 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
11914 **/
11915static pci_ers_result_t
11916lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
11917{
11918 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11919 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11920 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
11921
11922 switch (phba->pci_dev_grp) {
11923 case LPFC_PCI_DEV_LP:
11924 rc = lpfc_io_error_detected_s3(pdev, state);
11925 break;
da0436e9
JS		 11926 case LPFC_PCI_DEV_OC:
11927 rc = lpfc_io_error_detected_s4(pdev, state);
11928 break;
3772a991
JS		 11929 default:
11930 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11931 "1427 Invalid PCI device group: 0x%x\n",
11932 phba->pci_dev_grp);
11933 break;
11934 }
11935 return rc;
11936}
11937
11938/**
11939 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch
11940 * @pdev: pointer to PCI device.
11941 *
11942 * This routine is registered to the PCI subsystem for error handling. This
11943 * function is called after PCI bus has been reset to restart the PCI card
11944 * from scratch, as if from a cold-boot. When this routine is invoked, it
11945 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling
11946 * routine, which will perform the proper device reset.
11947 *
11948 * Return codes
11949 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11950 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
11951 **/
11952static pci_ers_result_t
11953lpfc_io_slot_reset(struct pci_dev *pdev)
11954{
11955 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11956 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11957 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
11958
11959 switch (phba->pci_dev_grp) {
11960 case LPFC_PCI_DEV_LP:
11961 rc = lpfc_io_slot_reset_s3(pdev);
11962 break;
da0436e9
JS		 11963 case LPFC_PCI_DEV_OC:
11964 rc = lpfc_io_slot_reset_s4(pdev);
11965 break;
3772a991
JS		 11966 default:
11967 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11968 "1428 Invalid PCI device group: 0x%x\n",
11969 phba->pci_dev_grp);
11970 break;
11971 }
11972 return rc;
11973}
11974
11975/**
11976 * lpfc_io_resume - lpfc method for resuming PCI I/O operation
11977 * @pdev: pointer to PCI device
11978 *
11979 * This routine is registered to the PCI subsystem for error handling. It
11980 * is called when kernel error recovery tells the lpfc driver that it is
11981 * OK to resume normal PCI operation after PCI bus error recovery. When
11982 * this routine is invoked, it dispatches the action to the proper SLI-3
11983 * or SLI-4 device io_resume routine, which will resume the device operation.
11984 **/
11985static void
11986lpfc_io_resume(struct pci_dev *pdev)
11987{
11988 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11989 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11990
11991 switch (phba->pci_dev_grp) {
11992 case LPFC_PCI_DEV_LP:
11993 lpfc_io_resume_s3(pdev);
11994 break;
da0436e9
JS		 11995 case LPFC_PCI_DEV_OC:
11996 lpfc_io_resume_s4(pdev);
11997 break;
3772a991
JS		 11998 default:
11999 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12000 "1429 Invalid PCI device group: 0x%x\n",
12001 phba->pci_dev_grp);
12002 break;
12003 }
12004 return;
12005}
12006
1ba981fd
JS		 12007/**
12008 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter
12009 * @phba: pointer to lpfc hba data structure.
12010 *
12011 * This routine checks to see if OAS is supported for this adapter. If
12012 * supported, the configure Flash Optimized Fabric flag is set. Otherwise,
12013 * the enable oas flag is cleared and the pool created for OAS device data
12014 * is destroyed.
12015 *
12016 **/
12017void
12018lpfc_sli4_oas_verify(struct lpfc_hba *phba)
12019{
12020
12021 if (!phba->cfg_EnableXLane)
12022 return;
12023
12024 if (phba->sli4_hba.pc_sli4_params.oas_supported) {
12025 phba->cfg_fof = 1;
12026 } else {
f38fa0bb 12027 phba->cfg_fof = 0;
1ba981fd
JS		 12028 if (phba->device_data_mem_pool)
12029 mempool_destroy(phba->device_data_mem_pool);
12030 phba->device_data_mem_pool = NULL;
12031 }
12032
12033 return;
12034}
12035
12036/**
12037 * lpfc_fof_queue_setup - Set up all the fof queues
12038 * @phba: pointer to lpfc hba data structure.
12039 *
12040 * This routine is invoked to set up all the fof queues for the FC HBA
12041 * operation.
12042 *
12043 * Return codes
12044 * 0 - successful
12045 * -ENOMEM - No available memory
12046 **/
12047int
12048lpfc_fof_queue_setup(struct lpfc_hba *phba)
12049{
895427bd 12050 struct lpfc_sli_ring *pring;
1ba981fd
JS		 12051 int rc;
12052
12053 rc = lpfc_eq_create(phba, phba->sli4_hba.fof_eq, LPFC_MAX_IMAX);
12054 if (rc)
12055 return -ENOMEM;
12056
f38fa0bb 12057 if (phba->cfg_fof) {
1ba981fd
JS		 12058
12059 rc = lpfc_cq_create(phba, phba->sli4_hba.oas_cq,
12060 phba->sli4_hba.fof_eq, LPFC_WCQ, LPFC_FCP);
12061 if (rc)
12062 goto out_oas_cq;
12063
12064 rc = lpfc_wq_create(phba, phba->sli4_hba.oas_wq,
12065 phba->sli4_hba.oas_cq, LPFC_FCP);
12066 if (rc)
12067 goto out_oas_wq;
12068
895427bd
JS		 12069 /* Bind this CQ/WQ to the NVME ring */
12070 pring = phba->sli4_hba.oas_wq->pring;
12071 pring->sli.sli4.wqp =
12072 (void *)phba->sli4_hba.oas_wq;
12073 phba->sli4_hba.oas_cq->pring = pring;
1ba981fd
JS		 12074 }
12075
12076 return 0;
12077
12078out_oas_wq:
f38fa0bb 12079 lpfc_cq_destroy(phba, phba->sli4_hba.oas_cq);
1ba981fd
JS		 12080out_oas_cq:
12081 lpfc_eq_destroy(phba, phba->sli4_hba.fof_eq);
12082 return rc;
12083
12084}
12085
12086/**
12087 * lpfc_fof_queue_create - Create all the fof queues
12088 * @phba: pointer to lpfc hba data structure.
12089 *
12090 * This routine is invoked to allocate all the fof queues for the FC HBA
12091 * operation. For each SLI4 queue type, the parameters such as queue entry
12092 * count (queue depth) shall be taken from the module parameter. For now,
12093 * we just use some constant number as place holder.
12094 *
12095 * Return codes
12096 * 0 - successful
12097 * -ENOMEM - No availble memory
12098 * -EIO - The mailbox failed to complete successfully.
12099 **/
12100int
12101lpfc_fof_queue_create(struct lpfc_hba *phba)
12102{
12103 struct lpfc_queue *qdesc;
7e04e21a 12104 uint32_t wqesize;
1ba981fd
JS		 12105
12106 /* Create FOF EQ */
12107 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.eq_esize,
12108 phba->sli4_hba.eq_ecount);
12109 if (!qdesc)
12110 goto out_error;
12111
12112 phba->sli4_hba.fof_eq = qdesc;
12113
f38fa0bb 12114 if (phba->cfg_fof) {
1ba981fd
JS		 12115
12116 /* Create OAS CQ */
12117 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
12118 phba->sli4_hba.cq_ecount);
12119 if (!qdesc)
12120 goto out_error;
12121
12122 phba->sli4_hba.oas_cq = qdesc;
12123
12124 /* Create OAS WQ */
7e04e21a
JS		 12125 wqesize = (phba->fcp_embed_io) ?
12126 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
12127 qdesc = lpfc_sli4_queue_alloc(phba, wqesize,
1ba981fd 12128 phba->sli4_hba.wq_ecount);
7e04e21a 12129
1ba981fd
JS		 12130 if (!qdesc)
12131 goto out_error;
12132
12133 phba->sli4_hba.oas_wq = qdesc;
895427bd 12134 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
1ba981fd
JS		 12135
12136 }
12137 return 0;
12138
12139out_error:
12140 lpfc_fof_queue_destroy(phba);
12141 return -ENOMEM;
12142}
12143
12144/**
12145 * lpfc_fof_queue_destroy - Destroy all the fof queues
12146 * @phba: pointer to lpfc hba data structure.
12147 *
12148 * This routine is invoked to release all the SLI4 queues with the FC HBA
12149 * operation.
12150 *
12151 * Return codes
12152 * 0 - successful
12153 **/
12154int
12155lpfc_fof_queue_destroy(struct lpfc_hba *phba)
12156{
12157 /* Release FOF Event queue */
12158 if (phba->sli4_hba.fof_eq != NULL) {
12159 lpfc_sli4_queue_free(phba->sli4_hba.fof_eq);
12160 phba->sli4_hba.fof_eq = NULL;
12161 }
12162
12163 /* Release OAS Completion queue */
12164 if (phba->sli4_hba.oas_cq != NULL) {
12165 lpfc_sli4_queue_free(phba->sli4_hba.oas_cq);
12166 phba->sli4_hba.oas_cq = NULL;
12167 }
12168
12169 /* Release OAS Work queue */
12170 if (phba->sli4_hba.oas_wq != NULL) {
12171 lpfc_sli4_queue_free(phba->sli4_hba.oas_wq);
12172 phba->sli4_hba.oas_wq = NULL;
12173 }
12174 return 0;
12175}
12176
dea3101e 12177MODULE_DEVICE_TABLE(pci, lpfc_id_table);
12178
a55b2d21 12179static const struct pci_error_handlers lpfc_err_handler = {
8d63f375
LV		 12180 .error_detected = lpfc_io_error_detected,
12181 .slot_reset = lpfc_io_slot_reset,
12182 .resume = lpfc_io_resume,
12183};
12184
dea3101e 12185static struct pci_driver lpfc_driver = {
12186 .name = LPFC_DRIVER_NAME,
12187 .id_table = lpfc_id_table,
12188 .probe = lpfc_pci_probe_one,
6f039790 12189 .remove = lpfc_pci_remove_one,
85e8a239 12190 .shutdown = lpfc_pci_remove_one,
3a55b532 12191 .suspend = lpfc_pci_suspend_one,
3772a991 12192 .resume = lpfc_pci_resume_one,
2e0fef85 12193 .err_handler = &lpfc_err_handler,
dea3101e 12194};
12195
3ef6d24c 12196static const struct file_operations lpfc_mgmt_fop = {
858feacd 12197 .owner = THIS_MODULE,
3ef6d24c
JS		 12198};
12199
12200static struct miscdevice lpfc_mgmt_dev = {
12201 .minor = MISC_DYNAMIC_MINOR,
12202 .name = "lpfcmgmt",
12203 .fops = &lpfc_mgmt_fop,
12204};
12205
e59058c4 12206/**
3621a710 12207 * lpfc_init - lpfc module initialization routine
e59058c4
JS		 12208 *
12209 * This routine is to be invoked when the lpfc module is loaded into the
12210 * kernel. The special kernel macro module_init() is used to indicate the
12211 * role of this routine to the kernel as lpfc module entry point.
12212 *
12213 * Return codes
12214 * 0 - successful
12215 * -ENOMEM - FC attach transport failed
12216 * all others - failed
12217 */
dea3101e 12218static int __init
12219lpfc_init(void)
12220{
12221 int error = 0;
12222
12223 printk(LPFC_MODULE_DESC "\n");
c44ce173 12224 printk(LPFC_COPYRIGHT "\n");
dea3101e 12225
3ef6d24c
JS		 12226 error = misc_register(&lpfc_mgmt_dev);
12227 if (error)
12228 printk(KERN_ERR "Could not register lpfcmgmt device, "
12229 "misc_register returned with status %d", error);
12230
458c083e
JS		 12231 lpfc_transport_functions.vport_create = lpfc_vport_create;
12232 lpfc_transport_functions.vport_delete = lpfc_vport_delete;
dea3101e 12233 lpfc_transport_template =
12234 fc_attach_transport(&lpfc_transport_functions);
7ee5d43e 12235 if (lpfc_transport_template == NULL)
dea3101e 12236 return -ENOMEM;
458c083e
JS		 12237 lpfc_vport_transport_template =
12238 fc_attach_transport(&lpfc_vport_transport_functions);
12239 if (lpfc_vport_transport_template == NULL) {
12240 fc_release_transport(lpfc_transport_template);
12241 return -ENOMEM;
7ee5d43e 12242 }
7bb03bbf
JS		 12243
12244 /* Initialize in case vector mapping is needed */
b246de17 12245 lpfc_used_cpu = NULL;
2ea259ee 12246 lpfc_present_cpu = num_present_cpus();
7bb03bbf 12247
dea3101e 12248 error = pci_register_driver(&lpfc_driver);
92d7f7b0 12249 if (error) {
dea3101e 12250 fc_release_transport(lpfc_transport_template);
458c083e 12251 fc_release_transport(lpfc_vport_transport_template);
92d7f7b0 12252 }
dea3101e 12253
12254 return error;
12255}
12256
e59058c4 12257/**
3621a710 12258 * lpfc_exit - lpfc module removal routine
e59058c4
JS		 12259 *
12260 * This routine is invoked when the lpfc module is removed from the kernel.
12261 * The special kernel macro module_exit() is used to indicate the role of
12262 * this routine to the kernel as lpfc module exit point.
12263 */
dea3101e 12264static void __exit
12265lpfc_exit(void)
12266{
3ef6d24c 12267 misc_deregister(&lpfc_mgmt_dev);
dea3101e 12268 pci_unregister_driver(&lpfc_driver);
12269 fc_release_transport(lpfc_transport_template);
458c083e 12270 fc_release_transport(lpfc_vport_transport_template);
81301a9b 12271 if (_dump_buf_data) {
6a9c52cf
JS		 12272 printk(KERN_ERR "9062 BLKGRD: freeing %lu pages for "
12273 "_dump_buf_data at 0x%p\n",
81301a9b
JS		 12274 (1L << _dump_buf_data_order), _dump_buf_data);
12275 free_pages((unsigned long)_dump_buf_data, _dump_buf_data_order);
12276 }
12277
12278 if (_dump_buf_dif) {
6a9c52cf
JS		 12279 printk(KERN_ERR "9049 BLKGRD: freeing %lu pages for "
12280 "_dump_buf_dif at 0x%p\n",
81301a9b
JS		 12281 (1L << _dump_buf_dif_order), _dump_buf_dif);
12282 free_pages((unsigned long)_dump_buf_dif, _dump_buf_dif_order);
12283 }
b246de17 12284 kfree(lpfc_used_cpu);
7973967f 12285 idr_destroy(&lpfc_hba_index);
dea3101e 12286}
12287
12288module_init(lpfc_init);
12289module_exit(lpfc_exit);
12290MODULE_LICENSE("GPL");
12291MODULE_DESCRIPTION(LPFC_MODULE_DESC);
d080abe0 12292MODULE_AUTHOR("Broadcom");
dea3101e 12293MODULE_VERSION("0:" LPFC_DRIVER_VERSION);
Linux 6.x block layer and io_uring tree(s)