scsi: lpfc: Utilize new IRQ API when allocating MSI-X vectors
[linux-2.6-block.git] / drivers / scsi / lpfc / lpfc_init.c
CommitLineData
dea3101e 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
128bddac 4 * Copyright (C) 2017-2018 Broadcom. All Rights Reserved. The term *
3e21d1cb 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
50611577 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
c44ce173 7 * EMULEX and SLI are trademarks of Emulex. *
d080abe0 8 * www.broadcom.com *
c44ce173 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e 10 * *
11 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC
12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
dea3101e 22 *******************************************************************/
23
dea3101e 24#include <linux/blkdev.h>
25#include <linux/delay.h>
26#include <linux/dma-mapping.h>
27#include <linux/idr.h>
28#include <linux/interrupt.h>
acf3368f 29#include <linux/module.h>
dea3101e 30#include <linux/kthread.h>
31#include <linux/pci.h>
32#include <linux/spinlock.h>
92d7f7b0 33#include <linux/ctype.h>
0d878419 34#include <linux/aer.h>
5a0e3ad6 35#include <linux/slab.h>
52d52440 36#include <linux/firmware.h>
3ef6d24c 37#include <linux/miscdevice.h>
7bb03bbf 38#include <linux/percpu.h>
895427bd 39#include <linux/msi.h>
6a828b0f 40#include <linux/irq.h>
286871a6 41#include <linux/bitops.h>
dea3101e 42
91886523 43#include <scsi/scsi.h>
dea3101e 44#include <scsi/scsi_device.h>
45#include <scsi/scsi_host.h>
46#include <scsi/scsi_transport_fc.h>
86c67379
JS
47#include <scsi/scsi_tcq.h>
48#include <scsi/fc/fc_fs.h>
49
50#include <linux/nvme-fc-driver.h>
dea3101e 51
da0436e9 52#include "lpfc_hw4.h"
dea3101e 53#include "lpfc_hw.h"
54#include "lpfc_sli.h"
da0436e9 55#include "lpfc_sli4.h"
ea2151b4 56#include "lpfc_nl.h"
dea3101e 57#include "lpfc_disc.h"
dea3101e 58#include "lpfc.h"
895427bd
JS
59#include "lpfc_scsi.h"
60#include "lpfc_nvme.h"
86c67379 61#include "lpfc_nvmet.h"
dea3101e 62#include "lpfc_logmsg.h"
63#include "lpfc_crtn.h"
92d7f7b0 64#include "lpfc_vport.h"
dea3101e 65#include "lpfc_version.h"
12f44457 66#include "lpfc_ids.h"
dea3101e 67
81301a9b
JS
68char *_dump_buf_data;
69unsigned long _dump_buf_data_order;
70char *_dump_buf_dif;
71unsigned long _dump_buf_dif_order;
72spinlock_t _dump_buf_lock;
73
7bb03bbf 74/* Used when mapping IRQ vectors in a driver centric manner */
b246de17 75uint32_t lpfc_present_cpu;
7bb03bbf 76
dea3101e 77static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
78static int lpfc_post_rcv_buf(struct lpfc_hba *);
5350d872 79static int lpfc_sli4_queue_verify(struct lpfc_hba *);
da0436e9
JS
80static int lpfc_create_bootstrap_mbox(struct lpfc_hba *);
81static int lpfc_setup_endian_order(struct lpfc_hba *);
da0436e9 82static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *);
8a9d2e80 83static void lpfc_free_els_sgl_list(struct lpfc_hba *);
f358dd0c 84static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *);
8a9d2e80 85static void lpfc_init_sgl_list(struct lpfc_hba *);
da0436e9
JS
86static int lpfc_init_active_sgl_array(struct lpfc_hba *);
87static void lpfc_free_active_sgl(struct lpfc_hba *);
88static int lpfc_hba_down_post_s3(struct lpfc_hba *phba);
89static int lpfc_hba_down_post_s4(struct lpfc_hba *phba);
90static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *);
91static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *);
92static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *);
618a5230
JS
93static void lpfc_sli4_disable_intr(struct lpfc_hba *);
94static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t);
1ba981fd 95static void lpfc_sli4_oas_verify(struct lpfc_hba *phba);
6a828b0f
JS
96static uint16_t lpfc_find_eq_handle(struct lpfc_hba *, uint16_t);
97static uint16_t lpfc_find_cpu_handle(struct lpfc_hba *, uint16_t, int);
dea3101e 98
99static struct scsi_transport_template *lpfc_transport_template = NULL;
92d7f7b0 100static struct scsi_transport_template *lpfc_vport_transport_template = NULL;
dea3101e 101static DEFINE_IDR(lpfc_hba_index);
f358dd0c 102#define LPFC_NVMET_BUF_POST 254
dea3101e 103
e59058c4 104/**
3621a710 105 * lpfc_config_port_prep - Perform lpfc initialization prior to config port
e59058c4
JS
106 * @phba: pointer to lpfc hba data structure.
107 *
108 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT
109 * mailbox command. It retrieves the revision information from the HBA and
110 * collects the Vital Product Data (VPD) about the HBA for preparing the
111 * configuration of the HBA.
112 *
113 * Return codes:
114 * 0 - success.
115 * -ERESTART - requests the SLI layer to reset the HBA and try again.
116 * Any other value - indicates an error.
117 **/
dea3101e 118int
2e0fef85 119lpfc_config_port_prep(struct lpfc_hba *phba)
dea3101e 120{
121 lpfc_vpd_t *vp = &phba->vpd;
122 int i = 0, rc;
123 LPFC_MBOXQ_t *pmb;
124 MAILBOX_t *mb;
125 char *lpfc_vpd_data = NULL;
126 uint16_t offset = 0;
127 static char licensed[56] =
128 "key unlock for use with gnu public licensed code only\0";
65a29c16 129 static int init_key = 1;
dea3101e 130
131 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
132 if (!pmb) {
2e0fef85 133 phba->link_state = LPFC_HBA_ERROR;
dea3101e 134 return -ENOMEM;
135 }
136
04c68496 137 mb = &pmb->u.mb;
2e0fef85 138 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 139
140 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
65a29c16
JS
141 if (init_key) {
142 uint32_t *ptext = (uint32_t *) licensed;
dea3101e 143
65a29c16
JS
144 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
145 *ptext = cpu_to_be32(*ptext);
146 init_key = 0;
147 }
dea3101e 148
149 lpfc_read_nv(phba, pmb);
150 memset((char*)mb->un.varRDnvp.rsvd3, 0,
151 sizeof (mb->un.varRDnvp.rsvd3));
152 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
153 sizeof (licensed));
154
155 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
156
157 if (rc != MBX_SUCCESS) {
ed957684 158 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
e8b62011 159 "0324 Config Port initialization "
dea3101e 160 "error, mbxCmd x%x READ_NVPARM, "
161 "mbxStatus x%x\n",
dea3101e 162 mb->mbxCommand, mb->mbxStatus);
163 mempool_free(pmb, phba->mbox_mem_pool);
164 return -ERESTART;
165 }
166 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
2e0fef85
JS
167 sizeof(phba->wwnn));
168 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname,
169 sizeof(phba->wwpn));
dea3101e 170 }
171
dfb75133
MW
172 /*
173 * Clear all option bits except LPFC_SLI3_BG_ENABLED,
174 * which was already set in lpfc_get_cfgparam()
175 */
176 phba->sli3_options &= (uint32_t)LPFC_SLI3_BG_ENABLED;
92d7f7b0 177
dea3101e 178 /* Setup and issue mailbox READ REV command */
179 lpfc_read_rev(phba, pmb);
180 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
181 if (rc != MBX_SUCCESS) {
ed957684 182 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 183 "0439 Adapter failed to init, mbxCmd x%x "
dea3101e 184 "READ_REV, mbxStatus x%x\n",
dea3101e 185 mb->mbxCommand, mb->mbxStatus);
186 mempool_free( pmb, phba->mbox_mem_pool);
187 return -ERESTART;
188 }
189
92d7f7b0 190
1de933f3
JSEC
191 /*
192 * The value of rr must be 1 since the driver set the cv field to 1.
193 * This setting requires the FW to set all revision fields.
dea3101e 194 */
1de933f3 195 if (mb->un.varRdRev.rr == 0) {
dea3101e 196 vp->rev.rBit = 0;
1de933f3 197 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS
198 "0440 Adapter failed to init, READ_REV has "
199 "missing revision information.\n");
dea3101e 200 mempool_free(pmb, phba->mbox_mem_pool);
201 return -ERESTART;
dea3101e 202 }
203
495a714c
JS
204 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) {
205 mempool_free(pmb, phba->mbox_mem_pool);
ed957684 206 return -EINVAL;
495a714c 207 }
ed957684 208
dea3101e 209 /* Save information as VPD data */
1de933f3 210 vp->rev.rBit = 1;
92d7f7b0 211 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t));
1de933f3
JSEC
212 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
213 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
214 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
215 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
dea3101e 216 vp->rev.biuRev = mb->un.varRdRev.biuRev;
217 vp->rev.smRev = mb->un.varRdRev.smRev;
218 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
219 vp->rev.endecRev = mb->un.varRdRev.endecRev;
220 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
221 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
222 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
223 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
224 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
225 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
226
92d7f7b0
JS
227 /* If the sli feature level is less then 9, we must
228 * tear down all RPIs and VPIs on link down if NPIV
229 * is enabled.
230 */
231 if (vp->rev.feaLevelHigh < 9)
232 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN;
233
dea3101e 234 if (lpfc_is_LC_HBA(phba->pcidev->device))
235 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
236 sizeof (phba->RandomData));
237
dea3101e 238 /* Get adapter VPD information */
dea3101e 239 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
240 if (!lpfc_vpd_data)
d7c255b2 241 goto out_free_mbox;
dea3101e 242 do {
a0c87cbd 243 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD);
dea3101e 244 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
245
246 if (rc != MBX_SUCCESS) {
247 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 248 "0441 VPD not present on adapter, "
dea3101e 249 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
dea3101e 250 mb->mbxCommand, mb->mbxStatus);
74b72a59 251 mb->un.varDmp.word_cnt = 0;
dea3101e 252 }
04c68496
JS
253 /* dump mem may return a zero when finished or we got a
254 * mailbox error, either way we are done.
255 */
256 if (mb->un.varDmp.word_cnt == 0)
257 break;
74b72a59
JW
258 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
259 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
d7c255b2
JS
260 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
261 lpfc_vpd_data + offset,
92d7f7b0 262 mb->un.varDmp.word_cnt);
dea3101e 263 offset += mb->un.varDmp.word_cnt;
74b72a59
JW
264 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
265 lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
dea3101e 266
267 kfree(lpfc_vpd_data);
dea3101e 268out_free_mbox:
269 mempool_free(pmb, phba->mbox_mem_pool);
270 return 0;
271}
272
e59058c4 273/**
3621a710 274 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd
e59058c4
JS
275 * @phba: pointer to lpfc hba data structure.
276 * @pmboxq: pointer to the driver internal queue element for mailbox command.
277 *
278 * This is the completion handler for driver's configuring asynchronous event
279 * mailbox command to the device. If the mailbox command returns successfully,
280 * it will set internal async event support flag to 1; otherwise, it will
281 * set internal async event support flag to 0.
282 **/
57127f15
JS
283static void
284lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
285{
04c68496 286 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS)
57127f15
JS
287 phba->temp_sensor_support = 1;
288 else
289 phba->temp_sensor_support = 0;
290 mempool_free(pmboxq, phba->mbox_mem_pool);
291 return;
292}
293
97207482 294/**
3621a710 295 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler
97207482
JS
296 * @phba: pointer to lpfc hba data structure.
297 * @pmboxq: pointer to the driver internal queue element for mailbox command.
298 *
299 * This is the completion handler for dump mailbox command for getting
300 * wake up parameters. When this command complete, the response contain
301 * Option rom version of the HBA. This function translate the version number
302 * into a human readable string and store it in OptionROMVersion.
303 **/
304static void
305lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
306{
307 struct prog_id *prg;
308 uint32_t prog_id_word;
309 char dist = ' ';
310 /* character array used for decoding dist type. */
311 char dist_char[] = "nabx";
312
04c68496 313 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) {
9f1e1b50 314 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482 315 return;
9f1e1b50 316 }
97207482
JS
317
318 prg = (struct prog_id *) &prog_id_word;
319
320 /* word 7 contain option rom version */
04c68496 321 prog_id_word = pmboxq->u.mb.un.varWords[7];
97207482
JS
322
323 /* Decode the Option rom version word to a readable string */
324 if (prg->dist < 4)
325 dist = dist_char[prg->dist];
326
327 if ((prg->dist == 3) && (prg->num == 0))
a2fc4aef 328 snprintf(phba->OptionROMVersion, 32, "%d.%d%d",
97207482
JS
329 prg->ver, prg->rev, prg->lev);
330 else
a2fc4aef 331 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d",
97207482
JS
332 prg->ver, prg->rev, prg->lev,
333 dist, prg->num);
9f1e1b50 334 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482
JS
335 return;
336}
337
0558056c
JS
338/**
339 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname,
340 * cfg_soft_wwnn, cfg_soft_wwpn
341 * @vport: pointer to lpfc vport data structure.
342 *
343 *
344 * Return codes
345 * None.
346 **/
347void
348lpfc_update_vport_wwn(struct lpfc_vport *vport)
349{
aeb3c817
JS
350 uint8_t vvvl = vport->fc_sparam.cmn.valid_vendor_ver_level;
351 u32 *fawwpn_key = (u32 *)&vport->fc_sparam.un.vendorVersion[0];
352
0558056c
JS
353 /* If the soft name exists then update it using the service params */
354 if (vport->phba->cfg_soft_wwnn)
355 u64_to_wwn(vport->phba->cfg_soft_wwnn,
356 vport->fc_sparam.nodeName.u.wwn);
357 if (vport->phba->cfg_soft_wwpn)
358 u64_to_wwn(vport->phba->cfg_soft_wwpn,
359 vport->fc_sparam.portName.u.wwn);
360
361 /*
362 * If the name is empty or there exists a soft name
363 * then copy the service params name, otherwise use the fc name
364 */
365 if (vport->fc_nodename.u.wwn[0] == 0 || vport->phba->cfg_soft_wwnn)
366 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
367 sizeof(struct lpfc_name));
368 else
369 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename,
370 sizeof(struct lpfc_name));
371
aeb3c817
JS
372 /*
373 * If the port name has changed, then set the Param changes flag
374 * to unreg the login
375 */
376 if (vport->fc_portname.u.wwn[0] != 0 &&
377 memcmp(&vport->fc_portname, &vport->fc_sparam.portName,
378 sizeof(struct lpfc_name)))
379 vport->vport_flag |= FAWWPN_PARAM_CHG;
380
381 if (vport->fc_portname.u.wwn[0] == 0 ||
382 vport->phba->cfg_soft_wwpn ||
383 (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR) ||
384 vport->vport_flag & FAWWPN_SET) {
0558056c
JS
385 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
386 sizeof(struct lpfc_name));
aeb3c817
JS
387 vport->vport_flag &= ~FAWWPN_SET;
388 if (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR)
389 vport->vport_flag |= FAWWPN_SET;
390 }
0558056c
JS
391 else
392 memcpy(&vport->fc_sparam.portName, &vport->fc_portname,
393 sizeof(struct lpfc_name));
394}
395
e59058c4 396/**
3621a710 397 * lpfc_config_port_post - Perform lpfc initialization after config port
e59058c4
JS
398 * @phba: pointer to lpfc hba data structure.
399 *
400 * This routine will do LPFC initialization after the CONFIG_PORT mailbox
401 * command call. It performs all internal resource and state setups on the
402 * port: post IOCB buffers, enable appropriate host interrupt attentions,
403 * ELS ring timers, etc.
404 *
405 * Return codes
406 * 0 - success.
407 * Any other value - error.
408 **/
dea3101e 409int
2e0fef85 410lpfc_config_port_post(struct lpfc_hba *phba)
dea3101e 411{
2e0fef85 412 struct lpfc_vport *vport = phba->pport;
a257bf90 413 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
dea3101e 414 LPFC_MBOXQ_t *pmb;
415 MAILBOX_t *mb;
416 struct lpfc_dmabuf *mp;
417 struct lpfc_sli *psli = &phba->sli;
418 uint32_t status, timeout;
2e0fef85
JS
419 int i, j;
420 int rc;
dea3101e 421
7af67051
JS
422 spin_lock_irq(&phba->hbalock);
423 /*
424 * If the Config port completed correctly the HBA is not
425 * over heated any more.
426 */
427 if (phba->over_temp_state == HBA_OVER_TEMP)
428 phba->over_temp_state = HBA_NORMAL_TEMP;
429 spin_unlock_irq(&phba->hbalock);
430
dea3101e 431 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
432 if (!pmb) {
2e0fef85 433 phba->link_state = LPFC_HBA_ERROR;
dea3101e 434 return -ENOMEM;
435 }
04c68496 436 mb = &pmb->u.mb;
dea3101e 437
dea3101e 438 /* Get login parameters for NID. */
9f1177a3
JS
439 rc = lpfc_read_sparam(phba, pmb, 0);
440 if (rc) {
441 mempool_free(pmb, phba->mbox_mem_pool);
442 return -ENOMEM;
443 }
444
ed957684 445 pmb->vport = vport;
dea3101e 446 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 447 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 448 "0448 Adapter failed init, mbxCmd x%x "
dea3101e 449 "READ_SPARM mbxStatus x%x\n",
dea3101e 450 mb->mbxCommand, mb->mbxStatus);
2e0fef85 451 phba->link_state = LPFC_HBA_ERROR;
3e1f0718 452 mp = (struct lpfc_dmabuf *)pmb->ctx_buf;
9f1177a3 453 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 454 lpfc_mbuf_free(phba, mp->virt, mp->phys);
455 kfree(mp);
456 return -EIO;
457 }
458
3e1f0718 459 mp = (struct lpfc_dmabuf *)pmb->ctx_buf;
dea3101e 460
2e0fef85 461 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm));
dea3101e 462 lpfc_mbuf_free(phba, mp->virt, mp->phys);
463 kfree(mp);
3e1f0718 464 pmb->ctx_buf = NULL;
0558056c 465 lpfc_update_vport_wwn(vport);
a257bf90
JS
466
467 /* Update the fc_host data structures with new wwn. */
468 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
469 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
21e9a0a5 470 fc_host_max_npiv_vports(shost) = phba->max_vpi;
a257bf90 471
dea3101e 472 /* If no serial number in VPD data, use low 6 bytes of WWNN */
473 /* This should be consolidated into parse_vpd ? - mr */
474 if (phba->SerialNumber[0] == 0) {
475 uint8_t *outptr;
476
2e0fef85 477 outptr = &vport->fc_nodename.u.s.IEEE[0];
dea3101e 478 for (i = 0; i < 12; i++) {
479 status = *outptr++;
480 j = ((status & 0xf0) >> 4);
481 if (j <= 9)
482 phba->SerialNumber[i] =
483 (char)((uint8_t) 0x30 + (uint8_t) j);
484 else
485 phba->SerialNumber[i] =
486 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
487 i++;
488 j = (status & 0xf);
489 if (j <= 9)
490 phba->SerialNumber[i] =
491 (char)((uint8_t) 0x30 + (uint8_t) j);
492 else
493 phba->SerialNumber[i] =
494 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
495 }
496 }
497
dea3101e 498 lpfc_read_config(phba, pmb);
ed957684 499 pmb->vport = vport;
dea3101e 500 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 501 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 502 "0453 Adapter failed to init, mbxCmd x%x "
dea3101e 503 "READ_CONFIG, mbxStatus x%x\n",
dea3101e 504 mb->mbxCommand, mb->mbxStatus);
2e0fef85 505 phba->link_state = LPFC_HBA_ERROR;
dea3101e 506 mempool_free( pmb, phba->mbox_mem_pool);
507 return -EIO;
508 }
509
a0c87cbd
JS
510 /* Check if the port is disabled */
511 lpfc_sli_read_link_ste(phba);
512
dea3101e 513 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS
514 i = (mb->un.varRdConfig.max_xri + 1);
515 if (phba->cfg_hba_queue_depth > i) {
516 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
517 "3359 HBA queue depth changed from %d to %d\n",
518 phba->cfg_hba_queue_depth, i);
519 phba->cfg_hba_queue_depth = i;
520 }
521
522 /* Reset the DFT_LUN_Q_DEPTH to (max xri >> 3) */
523 i = (mb->un.varRdConfig.max_xri >> 3);
524 if (phba->pport->cfg_lun_queue_depth > i) {
525 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
526 "3360 LUN queue depth changed from %d to %d\n",
527 phba->pport->cfg_lun_queue_depth, i);
528 phba->pport->cfg_lun_queue_depth = i;
529 }
dea3101e 530
531 phba->lmt = mb->un.varRdConfig.lmt;
74b72a59
JW
532
533 /* Get the default values for Model Name and Description */
534 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
535
2e0fef85 536 phba->link_state = LPFC_LINK_DOWN;
dea3101e 537
0b727fea 538 /* Only process IOCBs on ELS ring till hba_state is READY */
895427bd
JS
539 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr)
540 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT;
541 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr)
542 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT;
dea3101e 543
544 /* Post receive buffers for desired rings */
ed957684
JS
545 if (phba->sli_rev != 3)
546 lpfc_post_rcv_buf(phba);
dea3101e 547
9399627f
JS
548 /*
549 * Configure HBA MSI-X attention conditions to messages if MSI-X mode
550 */
551 if (phba->intr_type == MSIX) {
552 rc = lpfc_config_msi(phba, pmb);
553 if (rc) {
554 mempool_free(pmb, phba->mbox_mem_pool);
555 return -EIO;
556 }
557 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
558 if (rc != MBX_SUCCESS) {
559 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
560 "0352 Config MSI mailbox command "
561 "failed, mbxCmd x%x, mbxStatus x%x\n",
04c68496
JS
562 pmb->u.mb.mbxCommand,
563 pmb->u.mb.mbxStatus);
9399627f
JS
564 mempool_free(pmb, phba->mbox_mem_pool);
565 return -EIO;
566 }
567 }
568
04c68496 569 spin_lock_irq(&phba->hbalock);
9399627f
JS
570 /* Initialize ERATT handling flag */
571 phba->hba_flag &= ~HBA_ERATT_HANDLED;
572
dea3101e 573 /* Enable appropriate host interrupts */
9940b97b
JS
574 if (lpfc_readl(phba->HCregaddr, &status)) {
575 spin_unlock_irq(&phba->hbalock);
576 return -EIO;
577 }
dea3101e 578 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
579 if (psli->num_rings > 0)
580 status |= HC_R0INT_ENA;
581 if (psli->num_rings > 1)
582 status |= HC_R1INT_ENA;
583 if (psli->num_rings > 2)
584 status |= HC_R2INT_ENA;
585 if (psli->num_rings > 3)
586 status |= HC_R3INT_ENA;
587
875fbdfe
JSEC
588 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
589 (phba->cfg_poll & DISABLE_FCP_RING_INT))
9399627f 590 status &= ~(HC_R0INT_ENA);
875fbdfe 591
dea3101e 592 writel(status, phba->HCregaddr);
593 readl(phba->HCregaddr); /* flush */
2e0fef85 594 spin_unlock_irq(&phba->hbalock);
dea3101e 595
9399627f
JS
596 /* Set up ring-0 (ELS) timer */
597 timeout = phba->fc_ratov * 2;
256ec0d0
JS
598 mod_timer(&vport->els_tmofunc,
599 jiffies + msecs_to_jiffies(1000 * timeout));
9399627f 600 /* Set up heart beat (HB) timer */
256ec0d0
JS
601 mod_timer(&phba->hb_tmofunc,
602 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
603 phba->hb_outstanding = 0;
604 phba->last_completion_time = jiffies;
9399627f 605 /* Set up error attention (ERATT) polling timer */
256ec0d0 606 mod_timer(&phba->eratt_poll,
65791f1f 607 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
dea3101e 608
a0c87cbd
JS
609 if (phba->hba_flag & LINK_DISABLED) {
610 lpfc_printf_log(phba,
611 KERN_ERR, LOG_INIT,
612 "2598 Adapter Link is disabled.\n");
613 lpfc_down_link(phba, pmb);
614 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
615 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
616 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
617 lpfc_printf_log(phba,
618 KERN_ERR, LOG_INIT,
619 "2599 Adapter failed to issue DOWN_LINK"
620 " mbox command rc 0x%x\n", rc);
621
622 mempool_free(pmb, phba->mbox_mem_pool);
623 return -EIO;
624 }
e40a02c1 625 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
026abb87
JS
626 mempool_free(pmb, phba->mbox_mem_pool);
627 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
628 if (rc)
629 return rc;
dea3101e 630 }
631 /* MBOX buffer will be freed in mbox compl */
57127f15 632 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS
633 if (!pmb) {
634 phba->link_state = LPFC_HBA_ERROR;
635 return -ENOMEM;
636 }
637
57127f15
JS
638 lpfc_config_async(phba, pmb, LPFC_ELS_RING);
639 pmb->mbox_cmpl = lpfc_config_async_cmpl;
640 pmb->vport = phba->pport;
641 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
dea3101e 642
57127f15
JS
643 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
644 lpfc_printf_log(phba,
645 KERN_ERR,
646 LOG_INIT,
647 "0456 Adapter failed to issue "
e4e74273 648 "ASYNCEVT_ENABLE mbox status x%x\n",
57127f15
JS
649 rc);
650 mempool_free(pmb, phba->mbox_mem_pool);
651 }
97207482
JS
652
653 /* Get Option rom version */
654 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS
655 if (!pmb) {
656 phba->link_state = LPFC_HBA_ERROR;
657 return -ENOMEM;
658 }
659
97207482
JS
660 lpfc_dump_wakeup_param(phba, pmb);
661 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl;
662 pmb->vport = phba->pport;
663 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
664
665 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
666 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "0435 Adapter failed "
e4e74273 667 "to get Option ROM version status x%x\n", rc);
97207482
JS
668 mempool_free(pmb, phba->mbox_mem_pool);
669 }
670
d7c255b2 671 return 0;
ce8b3ce5
JS
672}
673
84d1b006
JS
674/**
675 * lpfc_hba_init_link - Initialize the FC link
676 * @phba: pointer to lpfc hba data structure.
6e7288d9 677 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS
678 *
679 * This routine will issue the INIT_LINK mailbox command call.
680 * It is available to other drivers through the lpfc_hba data
681 * structure for use as a delayed link up mechanism with the
682 * module parameter lpfc_suppress_link_up.
683 *
684 * Return code
685 * 0 - success
686 * Any other value - error
687 **/
e399b228 688static int
6e7288d9 689lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag)
1b51197d
JS
690{
691 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag);
692}
693
694/**
695 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology
696 * @phba: pointer to lpfc hba data structure.
697 * @fc_topology: desired fc topology.
698 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
699 *
700 * This routine will issue the INIT_LINK mailbox command call.
701 * It is available to other drivers through the lpfc_hba data
702 * structure for use as a delayed link up mechanism with the
703 * module parameter lpfc_suppress_link_up.
704 *
705 * Return code
706 * 0 - success
707 * Any other value - error
708 **/
709int
710lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology,
711 uint32_t flag)
84d1b006
JS
712{
713 struct lpfc_vport *vport = phba->pport;
714 LPFC_MBOXQ_t *pmb;
715 MAILBOX_t *mb;
716 int rc;
717
718 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
719 if (!pmb) {
720 phba->link_state = LPFC_HBA_ERROR;
721 return -ENOMEM;
722 }
723 mb = &pmb->u.mb;
724 pmb->vport = vport;
725
026abb87
JS
726 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) ||
727 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) &&
728 !(phba->lmt & LMT_1Gb)) ||
729 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) &&
730 !(phba->lmt & LMT_2Gb)) ||
731 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) &&
732 !(phba->lmt & LMT_4Gb)) ||
733 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) &&
734 !(phba->lmt & LMT_8Gb)) ||
735 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) &&
736 !(phba->lmt & LMT_10Gb)) ||
737 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) &&
d38dd52c
JS
738 !(phba->lmt & LMT_16Gb)) ||
739 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) &&
fbd8a6ba
JS
740 !(phba->lmt & LMT_32Gb)) ||
741 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_64G) &&
742 !(phba->lmt & LMT_64Gb))) {
026abb87
JS
743 /* Reset link speed to auto */
744 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
745 "1302 Invalid speed for this board:%d "
746 "Reset link speed to auto.\n",
747 phba->cfg_link_speed);
748 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO;
749 }
1b51197d 750 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed);
84d1b006 751 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
1b51197d
JS
752 if (phba->sli_rev < LPFC_SLI_REV4)
753 lpfc_set_loopback_flag(phba);
6e7288d9 754 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
76a95d75 755 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
84d1b006
JS
756 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
757 "0498 Adapter failed to init, mbxCmd x%x "
758 "INIT_LINK, mbxStatus x%x\n",
759 mb->mbxCommand, mb->mbxStatus);
76a95d75
JS
760 if (phba->sli_rev <= LPFC_SLI_REV3) {
761 /* Clear all interrupt enable conditions */
762 writel(0, phba->HCregaddr);
763 readl(phba->HCregaddr); /* flush */
764 /* Clear all pending interrupts */
765 writel(0xffffffff, phba->HAregaddr);
766 readl(phba->HAregaddr); /* flush */
767 }
84d1b006 768 phba->link_state = LPFC_HBA_ERROR;
6e7288d9 769 if (rc != MBX_BUSY || flag == MBX_POLL)
84d1b006
JS
770 mempool_free(pmb, phba->mbox_mem_pool);
771 return -EIO;
772 }
e40a02c1 773 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK;
6e7288d9
JS
774 if (flag == MBX_POLL)
775 mempool_free(pmb, phba->mbox_mem_pool);
84d1b006
JS
776
777 return 0;
778}
779
780/**
781 * lpfc_hba_down_link - this routine downs the FC link
6e7288d9
JS
782 * @phba: pointer to lpfc hba data structure.
783 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS
784 *
785 * This routine will issue the DOWN_LINK mailbox command call.
786 * It is available to other drivers through the lpfc_hba data
787 * structure for use to stop the link.
788 *
789 * Return code
790 * 0 - success
791 * Any other value - error
792 **/
e399b228 793static int
6e7288d9 794lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag)
84d1b006
JS
795{
796 LPFC_MBOXQ_t *pmb;
797 int rc;
798
799 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
800 if (!pmb) {
801 phba->link_state = LPFC_HBA_ERROR;
802 return -ENOMEM;
803 }
804
805 lpfc_printf_log(phba,
806 KERN_ERR, LOG_INIT,
807 "0491 Adapter Link is disabled.\n");
808 lpfc_down_link(phba, pmb);
809 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
6e7288d9 810 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
84d1b006
JS
811 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
812 lpfc_printf_log(phba,
813 KERN_ERR, LOG_INIT,
814 "2522 Adapter failed to issue DOWN_LINK"
815 " mbox command rc 0x%x\n", rc);
816
817 mempool_free(pmb, phba->mbox_mem_pool);
818 return -EIO;
819 }
6e7288d9
JS
820 if (flag == MBX_POLL)
821 mempool_free(pmb, phba->mbox_mem_pool);
822
84d1b006
JS
823 return 0;
824}
825
e59058c4 826/**
3621a710 827 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset
e59058c4
JS
828 * @phba: pointer to lpfc HBA data structure.
829 *
830 * This routine will do LPFC uninitialization before the HBA is reset when
831 * bringing down the SLI Layer.
832 *
833 * Return codes
834 * 0 - success.
835 * Any other value - error.
836 **/
dea3101e 837int
2e0fef85 838lpfc_hba_down_prep(struct lpfc_hba *phba)
dea3101e 839{
1b32f6aa
JS
840 struct lpfc_vport **vports;
841 int i;
3772a991
JS
842
843 if (phba->sli_rev <= LPFC_SLI_REV3) {
844 /* Disable interrupts */
845 writel(0, phba->HCregaddr);
846 readl(phba->HCregaddr); /* flush */
847 }
dea3101e 848
1b32f6aa
JS
849 if (phba->pport->load_flag & FC_UNLOADING)
850 lpfc_cleanup_discovery_resources(phba->pport);
851 else {
852 vports = lpfc_create_vport_work_array(phba);
853 if (vports != NULL)
3772a991
JS
854 for (i = 0; i <= phba->max_vports &&
855 vports[i] != NULL; i++)
1b32f6aa
JS
856 lpfc_cleanup_discovery_resources(vports[i]);
857 lpfc_destroy_vport_work_array(phba, vports);
7f5f3d0d
JS
858 }
859 return 0;
dea3101e 860}
861
68e814f5
JS
862/**
863 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free
864 * rspiocb which got deferred
865 *
866 * @phba: pointer to lpfc HBA data structure.
867 *
868 * This routine will cleanup completed slow path events after HBA is reset
869 * when bringing down the SLI Layer.
870 *
871 *
872 * Return codes
873 * void.
874 **/
875static void
876lpfc_sli4_free_sp_events(struct lpfc_hba *phba)
877{
878 struct lpfc_iocbq *rspiocbq;
879 struct hbq_dmabuf *dmabuf;
880 struct lpfc_cq_event *cq_event;
881
882 spin_lock_irq(&phba->hbalock);
883 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
884 spin_unlock_irq(&phba->hbalock);
885
886 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
887 /* Get the response iocb from the head of work queue */
888 spin_lock_irq(&phba->hbalock);
889 list_remove_head(&phba->sli4_hba.sp_queue_event,
890 cq_event, struct lpfc_cq_event, list);
891 spin_unlock_irq(&phba->hbalock);
892
893 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
894 case CQE_CODE_COMPL_WQE:
895 rspiocbq = container_of(cq_event, struct lpfc_iocbq,
896 cq_event);
897 lpfc_sli_release_iocbq(phba, rspiocbq);
898 break;
899 case CQE_CODE_RECEIVE:
900 case CQE_CODE_RECEIVE_V1:
901 dmabuf = container_of(cq_event, struct hbq_dmabuf,
902 cq_event);
903 lpfc_in_buf_free(phba, &dmabuf->dbuf);
904 }
905 }
906}
907
e59058c4 908/**
bcece5f5 909 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset
e59058c4
JS
910 * @phba: pointer to lpfc HBA data structure.
911 *
bcece5f5
JS
912 * This routine will cleanup posted ELS buffers after the HBA is reset
913 * when bringing down the SLI Layer.
914 *
e59058c4
JS
915 *
916 * Return codes
bcece5f5 917 * void.
e59058c4 918 **/
bcece5f5
JS
919static void
920lpfc_hba_free_post_buf(struct lpfc_hba *phba)
41415862
JW
921{
922 struct lpfc_sli *psli = &phba->sli;
923 struct lpfc_sli_ring *pring;
924 struct lpfc_dmabuf *mp, *next_mp;
07eab624
JS
925 LIST_HEAD(buflist);
926 int count;
41415862 927
92d7f7b0
JS
928 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)
929 lpfc_sli_hbqbuf_free_all(phba);
930 else {
931 /* Cleanup preposted buffers on the ELS ring */
895427bd 932 pring = &psli->sli3_ring[LPFC_ELS_RING];
07eab624
JS
933 spin_lock_irq(&phba->hbalock);
934 list_splice_init(&pring->postbufq, &buflist);
935 spin_unlock_irq(&phba->hbalock);
936
937 count = 0;
938 list_for_each_entry_safe(mp, next_mp, &buflist, list) {
92d7f7b0 939 list_del(&mp->list);
07eab624 940 count++;
92d7f7b0
JS
941 lpfc_mbuf_free(phba, mp->virt, mp->phys);
942 kfree(mp);
943 }
07eab624
JS
944
945 spin_lock_irq(&phba->hbalock);
946 pring->postbufq_cnt -= count;
bcece5f5 947 spin_unlock_irq(&phba->hbalock);
41415862 948 }
bcece5f5
JS
949}
950
951/**
952 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset
953 * @phba: pointer to lpfc HBA data structure.
954 *
955 * This routine will cleanup the txcmplq after the HBA is reset when bringing
956 * down the SLI Layer.
957 *
958 * Return codes
959 * void
960 **/
961static void
962lpfc_hba_clean_txcmplq(struct lpfc_hba *phba)
963{
964 struct lpfc_sli *psli = &phba->sli;
895427bd 965 struct lpfc_queue *qp = NULL;
bcece5f5
JS
966 struct lpfc_sli_ring *pring;
967 LIST_HEAD(completions);
968 int i;
c1dd9111 969 struct lpfc_iocbq *piocb, *next_iocb;
bcece5f5 970
895427bd
JS
971 if (phba->sli_rev != LPFC_SLI_REV4) {
972 for (i = 0; i < psli->num_rings; i++) {
973 pring = &psli->sli3_ring[i];
bcece5f5 974 spin_lock_irq(&phba->hbalock);
895427bd
JS
975 /* At this point in time the HBA is either reset or DOA
976 * Nothing should be on txcmplq as it will
977 * NEVER complete.
978 */
979 list_splice_init(&pring->txcmplq, &completions);
980 pring->txcmplq_cnt = 0;
bcece5f5 981 spin_unlock_irq(&phba->hbalock);
09372820 982
895427bd
JS
983 lpfc_sli_abort_iocb_ring(phba, pring);
984 }
a257bf90 985 /* Cancel all the IOCBs from the completions list */
895427bd
JS
986 lpfc_sli_cancel_iocbs(phba, &completions,
987 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
988 return;
989 }
990 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
991 pring = qp->pring;
992 if (!pring)
993 continue;
994 spin_lock_irq(&pring->ring_lock);
c1dd9111
JS
995 list_for_each_entry_safe(piocb, next_iocb,
996 &pring->txcmplq, list)
997 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
895427bd
JS
998 list_splice_init(&pring->txcmplq, &completions);
999 pring->txcmplq_cnt = 0;
1000 spin_unlock_irq(&pring->ring_lock);
41415862
JW
1001 lpfc_sli_abort_iocb_ring(phba, pring);
1002 }
895427bd
JS
1003 /* Cancel all the IOCBs from the completions list */
1004 lpfc_sli_cancel_iocbs(phba, &completions,
1005 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
bcece5f5 1006}
41415862 1007
bcece5f5
JS
1008/**
1009 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset
1010 int i;
1011 * @phba: pointer to lpfc HBA data structure.
1012 *
1013 * This routine will do uninitialization after the HBA is reset when bring
1014 * down the SLI Layer.
1015 *
1016 * Return codes
1017 * 0 - success.
1018 * Any other value - error.
1019 **/
1020static int
1021lpfc_hba_down_post_s3(struct lpfc_hba *phba)
1022{
1023 lpfc_hba_free_post_buf(phba);
1024 lpfc_hba_clean_txcmplq(phba);
41415862
JW
1025 return 0;
1026}
5af5eee7 1027
da0436e9
JS
1028/**
1029 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset
1030 * @phba: pointer to lpfc HBA data structure.
1031 *
1032 * This routine will do uninitialization after the HBA is reset when bring
1033 * down the SLI Layer.
1034 *
1035 * Return codes
af901ca1 1036 * 0 - success.
da0436e9
JS
1037 * Any other value - error.
1038 **/
1039static int
1040lpfc_hba_down_post_s4(struct lpfc_hba *phba)
1041{
c490850a 1042 struct lpfc_io_buf *psb, *psb_next;
86c67379 1043 struct lpfc_nvmet_rcv_ctx *ctxp, *ctxp_next;
5e5b511d 1044 struct lpfc_sli4_hdw_queue *qp;
da0436e9 1045 LIST_HEAD(aborts);
895427bd 1046 LIST_HEAD(nvme_aborts);
86c67379 1047 LIST_HEAD(nvmet_aborts);
0f65ff68 1048 struct lpfc_sglq *sglq_entry = NULL;
5e5b511d 1049 int cnt, idx;
0f65ff68 1050
895427bd
JS
1051
1052 lpfc_sli_hbqbuf_free_all(phba);
bcece5f5
JS
1053 lpfc_hba_clean_txcmplq(phba);
1054
da0436e9
JS
1055 /* At this point in time the HBA is either reset or DOA. Either
1056 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be
895427bd 1057 * on the lpfc_els_sgl_list so that it can either be freed if the
da0436e9
JS
1058 * driver is unloading or reposted if the driver is restarting
1059 * the port.
1060 */
895427bd 1061 spin_lock_irq(&phba->hbalock); /* required for lpfc_els_sgl_list and */
da0436e9 1062 /* scsl_buf_list */
895427bd 1063 /* sgl_list_lock required because worker thread uses this
da0436e9
JS
1064 * list.
1065 */
895427bd 1066 spin_lock(&phba->sli4_hba.sgl_list_lock);
0f65ff68
JS
1067 list_for_each_entry(sglq_entry,
1068 &phba->sli4_hba.lpfc_abts_els_sgl_list, list)
1069 sglq_entry->state = SGL_FREED;
1070
da0436e9 1071 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
895427bd
JS
1072 &phba->sli4_hba.lpfc_els_sgl_list);
1073
f358dd0c 1074
895427bd 1075 spin_unlock(&phba->sli4_hba.sgl_list_lock);
5e5b511d
JS
1076
1077 /* abts_xxxx_buf_list_lock required because worker thread uses this
da0436e9
JS
1078 * list.
1079 */
5e5b511d
JS
1080 cnt = 0;
1081 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
1082 qp = &phba->sli4_hba.hdwq[idx];
895427bd 1083
5e5b511d
JS
1084 spin_lock(&qp->abts_scsi_buf_list_lock);
1085 list_splice_init(&qp->lpfc_abts_scsi_buf_list,
1086 &aborts);
da0436e9 1087
0794d601
JS
1088 list_for_each_entry_safe(psb, psb_next, &aborts, list) {
1089 psb->pCmd = NULL;
1090 psb->status = IOSTAT_SUCCESS;
5e5b511d 1091 cnt++;
0794d601 1092 }
5e5b511d
JS
1093 spin_lock(&qp->io_buf_list_put_lock);
1094 list_splice_init(&aborts, &qp->lpfc_io_buf_list_put);
1095 qp->put_io_bufs += qp->abts_scsi_io_bufs;
1096 qp->abts_scsi_io_bufs = 0;
1097 spin_unlock(&qp->io_buf_list_put_lock);
1098 spin_unlock(&qp->abts_scsi_buf_list_lock);
1099
1100 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1101 spin_lock(&qp->abts_nvme_buf_list_lock);
1102 list_splice_init(&qp->lpfc_abts_nvme_buf_list,
1103 &nvme_aborts);
1104 list_for_each_entry_safe(psb, psb_next, &nvme_aborts,
1105 list) {
1106 psb->pCmd = NULL;
1107 psb->status = IOSTAT_SUCCESS;
1108 cnt++;
1109 }
1110 spin_lock(&qp->io_buf_list_put_lock);
1111 qp->put_io_bufs += qp->abts_nvme_io_bufs;
1112 qp->abts_nvme_io_bufs = 0;
1113 list_splice_init(&nvme_aborts,
1114 &qp->lpfc_io_buf_list_put);
1115 spin_unlock(&qp->io_buf_list_put_lock);
1116 spin_unlock(&qp->abts_nvme_buf_list_lock);
68e814f5 1117
86c67379 1118 }
5e5b511d 1119 }
86c67379 1120
5e5b511d
JS
1121 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1122 spin_lock(&phba->sli4_hba.abts_nvmet_buf_list_lock);
1123 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list,
1124 &nvmet_aborts);
1125 spin_unlock(&phba->sli4_hba.abts_nvmet_buf_list_lock);
86c67379
JS
1126 list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) {
1127 ctxp->flag &= ~(LPFC_NVMET_XBUSY | LPFC_NVMET_ABORT_OP);
6c621a22 1128 lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf);
86c67379 1129 }
895427bd 1130 }
895427bd 1131
5e5b511d 1132 spin_unlock_irq(&phba->hbalock);
68e814f5 1133 lpfc_sli4_free_sp_events(phba);
5e5b511d 1134 return cnt;
da0436e9
JS
1135}
1136
1137/**
1138 * lpfc_hba_down_post - Wrapper func for hba down post routine
1139 * @phba: pointer to lpfc HBA data structure.
1140 *
1141 * This routine wraps the actual SLI3 or SLI4 routine for performing
1142 * uninitialization after the HBA is reset when bring down the SLI Layer.
1143 *
1144 * Return codes
af901ca1 1145 * 0 - success.
da0436e9
JS
1146 * Any other value - error.
1147 **/
1148int
1149lpfc_hba_down_post(struct lpfc_hba *phba)
1150{
1151 return (*phba->lpfc_hba_down_post)(phba);
1152}
41415862 1153
e59058c4 1154/**
3621a710 1155 * lpfc_hb_timeout - The HBA-timer timeout handler
e59058c4
JS
1156 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1157 *
1158 * This is the HBA-timer timeout handler registered to the lpfc driver. When
1159 * this timer fires, a HBA timeout event shall be posted to the lpfc driver
1160 * work-port-events bitmap and the worker thread is notified. This timeout
1161 * event will be used by the worker thread to invoke the actual timeout
1162 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will
1163 * be performed in the timeout handler and the HBA timeout event bit shall
1164 * be cleared by the worker thread after it has taken the event bitmap out.
1165 **/
a6ababd2 1166static void
f22eb4d3 1167lpfc_hb_timeout(struct timer_list *t)
858c9f6c
JS
1168{
1169 struct lpfc_hba *phba;
5e9d9b82 1170 uint32_t tmo_posted;
858c9f6c
JS
1171 unsigned long iflag;
1172
f22eb4d3 1173 phba = from_timer(phba, t, hb_tmofunc);
9399627f
JS
1174
1175 /* Check for heart beat timeout conditions */
858c9f6c 1176 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
5e9d9b82
JS
1177 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO;
1178 if (!tmo_posted)
858c9f6c
JS
1179 phba->pport->work_port_events |= WORKER_HB_TMO;
1180 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1181
9399627f 1182 /* Tell the worker thread there is work to do */
5e9d9b82
JS
1183 if (!tmo_posted)
1184 lpfc_worker_wake_up(phba);
858c9f6c
JS
1185 return;
1186}
1187
19ca7609
JS
1188/**
1189 * lpfc_rrq_timeout - The RRQ-timer timeout handler
1190 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1191 *
1192 * This is the RRQ-timer timeout handler registered to the lpfc driver. When
1193 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver
1194 * work-port-events bitmap and the worker thread is notified. This timeout
1195 * event will be used by the worker thread to invoke the actual timeout
1196 * handler routine, lpfc_rrq_handler. Any periodical operations will
1197 * be performed in the timeout handler and the RRQ timeout event bit shall
1198 * be cleared by the worker thread after it has taken the event bitmap out.
1199 **/
1200static void
f22eb4d3 1201lpfc_rrq_timeout(struct timer_list *t)
19ca7609
JS
1202{
1203 struct lpfc_hba *phba;
19ca7609
JS
1204 unsigned long iflag;
1205
f22eb4d3 1206 phba = from_timer(phba, t, rrq_tmr);
19ca7609 1207 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
06918ac5
JS
1208 if (!(phba->pport->load_flag & FC_UNLOADING))
1209 phba->hba_flag |= HBA_RRQ_ACTIVE;
1210 else
1211 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
19ca7609 1212 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
06918ac5
JS
1213
1214 if (!(phba->pport->load_flag & FC_UNLOADING))
1215 lpfc_worker_wake_up(phba);
19ca7609
JS
1216}
1217
e59058c4 1218/**
3621a710 1219 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function
e59058c4
JS
1220 * @phba: pointer to lpfc hba data structure.
1221 * @pmboxq: pointer to the driver internal queue element for mailbox command.
1222 *
1223 * This is the callback function to the lpfc heart-beat mailbox command.
1224 * If configured, the lpfc driver issues the heart-beat mailbox command to
1225 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the
1226 * heart-beat mailbox command is issued, the driver shall set up heart-beat
1227 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks
1228 * heart-beat outstanding state. Once the mailbox command comes back and
1229 * no error conditions detected, the heart-beat mailbox command timer is
1230 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding
1231 * state is cleared for the next heart-beat. If the timer expired with the
1232 * heart-beat outstanding state set, the driver will put the HBA offline.
1233 **/
858c9f6c
JS
1234static void
1235lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
1236{
1237 unsigned long drvr_flag;
1238
1239 spin_lock_irqsave(&phba->hbalock, drvr_flag);
1240 phba->hb_outstanding = 0;
1241 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
1242
9399627f 1243 /* Check and reset heart-beat timer is necessary */
858c9f6c
JS
1244 mempool_free(pmboxq, phba->mbox_mem_pool);
1245 if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) &&
1246 !(phba->link_state == LPFC_HBA_ERROR) &&
51ef4c26 1247 !(phba->pport->load_flag & FC_UNLOADING))
858c9f6c 1248 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1249 jiffies +
1250 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1251 return;
1252}
1253
32517fc0
JS
1254static void
1255lpfc_hb_eq_delay_work(struct work_struct *work)
1256{
1257 struct lpfc_hba *phba = container_of(to_delayed_work(work),
1258 struct lpfc_hba, eq_delay_work);
1259 struct lpfc_eq_intr_info *eqi, *eqi_new;
1260 struct lpfc_queue *eq, *eq_next;
1261 unsigned char *eqcnt = NULL;
1262 uint32_t usdelay;
1263 int i;
1264
1265 if (!phba->cfg_auto_imax || phba->pport->load_flag & FC_UNLOADING)
1266 return;
1267
1268 if (phba->link_state == LPFC_HBA_ERROR ||
1269 phba->pport->fc_flag & FC_OFFLINE_MODE)
1270 goto requeue;
1271
1272 eqcnt = kcalloc(num_possible_cpus(), sizeof(unsigned char),
1273 GFP_KERNEL);
1274 if (!eqcnt)
1275 goto requeue;
1276
1277 for (i = 0; i < phba->cfg_irq_chann; i++) {
1278 eq = phba->sli4_hba.hdwq[i].hba_eq;
1279 if (eq && eqcnt[eq->last_cpu] < 2)
1280 eqcnt[eq->last_cpu]++;
1281 continue;
1282 }
1283
1284 for_each_present_cpu(i) {
1285 if (phba->cfg_irq_chann > 1 && eqcnt[i] < 2)
1286 continue;
1287
1288 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, i);
1289
1290 usdelay = (eqi->icnt / LPFC_IMAX_THRESHOLD) *
1291 LPFC_EQ_DELAY_STEP;
1292 if (usdelay > LPFC_MAX_AUTO_EQ_DELAY)
1293 usdelay = LPFC_MAX_AUTO_EQ_DELAY;
1294
1295 eqi->icnt = 0;
1296
1297 list_for_each_entry_safe(eq, eq_next, &eqi->list, cpu_list) {
1298 if (eq->last_cpu != i) {
1299 eqi_new = per_cpu_ptr(phba->sli4_hba.eq_info,
1300 eq->last_cpu);
1301 list_move_tail(&eq->cpu_list, &eqi_new->list);
1302 continue;
1303 }
1304 if (usdelay != eq->q_mode)
1305 lpfc_modify_hba_eq_delay(phba, eq->hdwq, 1,
1306 usdelay);
1307 }
1308 }
1309
1310 kfree(eqcnt);
1311
1312requeue:
1313 queue_delayed_work(phba->wq, &phba->eq_delay_work,
1314 msecs_to_jiffies(LPFC_EQ_DELAY_MSECS));
1315}
1316
c490850a
JS
1317/**
1318 * lpfc_hb_mxp_handler - Multi-XRI pools handler to adjust XRI distribution
1319 * @phba: pointer to lpfc hba data structure.
1320 *
1321 * For each heartbeat, this routine does some heuristic methods to adjust
1322 * XRI distribution. The goal is to fully utilize free XRIs.
1323 **/
1324static void lpfc_hb_mxp_handler(struct lpfc_hba *phba)
1325{
1326 u32 i;
1327 u32 hwq_count;
1328
1329 hwq_count = phba->cfg_hdw_queue;
1330 for (i = 0; i < hwq_count; i++) {
1331 /* Adjust XRIs in private pool */
1332 lpfc_adjust_pvt_pool_count(phba, i);
1333
1334 /* Adjust high watermark */
1335 lpfc_adjust_high_watermark(phba, i);
1336
1337#ifdef LPFC_MXP_STAT
1338 /* Snapshot pbl, pvt and busy count */
1339 lpfc_snapshot_mxp(phba, i);
1340#endif
1341 }
1342}
1343
e59058c4 1344/**
3621a710 1345 * lpfc_hb_timeout_handler - The HBA-timer timeout handler
e59058c4
JS
1346 * @phba: pointer to lpfc hba data structure.
1347 *
1348 * This is the actual HBA-timer timeout handler to be invoked by the worker
1349 * thread whenever the HBA timer fired and HBA-timeout event posted. This
1350 * handler performs any periodic operations needed for the device. If such
1351 * periodic event has already been attended to either in the interrupt handler
1352 * or by processing slow-ring or fast-ring events within the HBA-timer
1353 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets
1354 * the timer for the next timeout period. If lpfc heart-beat mailbox command
1355 * is configured and there is no heart-beat mailbox command outstanding, a
1356 * heart-beat mailbox is issued and timer set properly. Otherwise, if there
1357 * has been a heart-beat mailbox command outstanding, the HBA shall be put
1358 * to offline.
1359 **/
858c9f6c
JS
1360void
1361lpfc_hb_timeout_handler(struct lpfc_hba *phba)
1362{
45ed1190 1363 struct lpfc_vport **vports;
858c9f6c 1364 LPFC_MBOXQ_t *pmboxq;
0ff10d46 1365 struct lpfc_dmabuf *buf_ptr;
45ed1190 1366 int retval, i;
858c9f6c 1367 struct lpfc_sli *psli = &phba->sli;
0ff10d46 1368 LIST_HEAD(completions);
858c9f6c 1369
c490850a
JS
1370 if (phba->cfg_xri_rebalancing) {
1371 /* Multi-XRI pools handler */
1372 lpfc_hb_mxp_handler(phba);
1373 }
1374
45ed1190
JS
1375 vports = lpfc_create_vport_work_array(phba);
1376 if (vports != NULL)
4258e98e 1377 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
45ed1190 1378 lpfc_rcv_seq_check_edtov(vports[i]);
4258e98e
JS
1379 lpfc_fdmi_num_disc_check(vports[i]);
1380 }
45ed1190
JS
1381 lpfc_destroy_vport_work_array(phba, vports);
1382
858c9f6c 1383 if ((phba->link_state == LPFC_HBA_ERROR) ||
51ef4c26 1384 (phba->pport->load_flag & FC_UNLOADING) ||
858c9f6c
JS
1385 (phba->pport->fc_flag & FC_OFFLINE_MODE))
1386 return;
1387
1388 spin_lock_irq(&phba->pport->work_port_lock);
858c9f6c 1389
256ec0d0
JS
1390 if (time_after(phba->last_completion_time +
1391 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL),
1392 jiffies)) {
858c9f6c
JS
1393 spin_unlock_irq(&phba->pport->work_port_lock);
1394 if (!phba->hb_outstanding)
1395 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1396 jiffies +
1397 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1398 else
1399 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1400 jiffies +
1401 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c
JS
1402 return;
1403 }
1404 spin_unlock_irq(&phba->pport->work_port_lock);
1405
0ff10d46
JS
1406 if (phba->elsbuf_cnt &&
1407 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) {
1408 spin_lock_irq(&phba->hbalock);
1409 list_splice_init(&phba->elsbuf, &completions);
1410 phba->elsbuf_cnt = 0;
1411 phba->elsbuf_prev_cnt = 0;
1412 spin_unlock_irq(&phba->hbalock);
1413
1414 while (!list_empty(&completions)) {
1415 list_remove_head(&completions, buf_ptr,
1416 struct lpfc_dmabuf, list);
1417 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
1418 kfree(buf_ptr);
1419 }
1420 }
1421 phba->elsbuf_prev_cnt = phba->elsbuf_cnt;
1422
858c9f6c 1423 /* If there is no heart beat outstanding, issue a heartbeat command */
13815c83
JS
1424 if (phba->cfg_enable_hba_heartbeat) {
1425 if (!phba->hb_outstanding) {
bc73905a
JS
1426 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) &&
1427 (list_empty(&psli->mboxq))) {
1428 pmboxq = mempool_alloc(phba->mbox_mem_pool,
1429 GFP_KERNEL);
1430 if (!pmboxq) {
1431 mod_timer(&phba->hb_tmofunc,
1432 jiffies +
256ec0d0
JS
1433 msecs_to_jiffies(1000 *
1434 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS
1435 return;
1436 }
1437
1438 lpfc_heart_beat(phba, pmboxq);
1439 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl;
1440 pmboxq->vport = phba->pport;
1441 retval = lpfc_sli_issue_mbox(phba, pmboxq,
1442 MBX_NOWAIT);
1443
1444 if (retval != MBX_BUSY &&
1445 retval != MBX_SUCCESS) {
1446 mempool_free(pmboxq,
1447 phba->mbox_mem_pool);
1448 mod_timer(&phba->hb_tmofunc,
1449 jiffies +
256ec0d0
JS
1450 msecs_to_jiffies(1000 *
1451 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS
1452 return;
1453 }
1454 phba->skipped_hb = 0;
1455 phba->hb_outstanding = 1;
1456 } else if (time_before_eq(phba->last_completion_time,
1457 phba->skipped_hb)) {
1458 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
1459 "2857 Last completion time not "
1460 " updated in %d ms\n",
1461 jiffies_to_msecs(jiffies
1462 - phba->last_completion_time));
1463 } else
1464 phba->skipped_hb = jiffies;
1465
858c9f6c 1466 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1467 jiffies +
1468 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1469 return;
13815c83
JS
1470 } else {
1471 /*
1472 * If heart beat timeout called with hb_outstanding set
dcf2a4e0
JS
1473 * we need to give the hb mailbox cmd a chance to
1474 * complete or TMO.
13815c83 1475 */
dcf2a4e0
JS
1476 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1477 "0459 Adapter heartbeat still out"
1478 "standing:last compl time was %d ms.\n",
1479 jiffies_to_msecs(jiffies
1480 - phba->last_completion_time));
1481 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS
1482 jiffies +
1483 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1484 }
4258e98e
JS
1485 } else {
1486 mod_timer(&phba->hb_tmofunc,
1487 jiffies +
1488 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS
1489 }
1490}
1491
e59058c4 1492/**
3621a710 1493 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention
e59058c4
JS
1494 * @phba: pointer to lpfc hba data structure.
1495 *
1496 * This routine is called to bring the HBA offline when HBA hardware error
1497 * other than Port Error 6 has been detected.
1498 **/
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1499static void
1500lpfc_offline_eratt(struct lpfc_hba *phba)
1501{
1502 struct lpfc_sli *psli = &phba->sli;
1503
1504 spin_lock_irq(&phba->hbalock);
f4b4c68f 1505 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
09372820 1506 spin_unlock_irq(&phba->hbalock);
618a5230 1507 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
09372820
JS
1508
1509 lpfc_offline(phba);
1510 lpfc_reset_barrier(phba);
f4b4c68f 1511 spin_lock_irq(&phba->hbalock);
09372820 1512 lpfc_sli_brdreset(phba);
f4b4c68f 1513 spin_unlock_irq(&phba->hbalock);
09372820
JS
1514 lpfc_hba_down_post(phba);
1515 lpfc_sli_brdready(phba, HS_MBRDY);
1516 lpfc_unblock_mgmt_io(phba);
1517 phba->link_state = LPFC_HBA_ERROR;
1518 return;
1519}
1520
da0436e9
JS
1521/**
1522 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention
1523 * @phba: pointer to lpfc hba data structure.
1524 *
1525 * This routine is called to bring a SLI4 HBA offline when HBA hardware error
1526 * other than Port Error 6 has been detected.
1527 **/
a88dbb6a 1528void
da0436e9
JS
1529lpfc_sli4_offline_eratt(struct lpfc_hba *phba)
1530{
946727dc
JS
1531 spin_lock_irq(&phba->hbalock);
1532 phba->link_state = LPFC_HBA_ERROR;
1533 spin_unlock_irq(&phba->hbalock);
1534
618a5230 1535 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
da0436e9 1536 lpfc_offline(phba);
da0436e9 1537 lpfc_hba_down_post(phba);
da0436e9 1538 lpfc_unblock_mgmt_io(phba);
da0436e9
JS
1539}
1540
a257bf90
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1541/**
1542 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler
1543 * @phba: pointer to lpfc hba data structure.
1544 *
1545 * This routine is invoked to handle the deferred HBA hardware error
1546 * conditions. This type of error is indicated by HBA by setting ER1
1547 * and another ER bit in the host status register. The driver will
1548 * wait until the ER1 bit clears before handling the error condition.
1549 **/
1550static void
1551lpfc_handle_deferred_eratt(struct lpfc_hba *phba)
1552{
1553 uint32_t old_host_status = phba->work_hs;
a257bf90
JS
1554 struct lpfc_sli *psli = &phba->sli;
1555
f4b4c68f
JS
1556 /* If the pci channel is offline, ignore possible errors,
1557 * since we cannot communicate with the pci card anyway.
1558 */
1559 if (pci_channel_offline(phba->pcidev)) {
1560 spin_lock_irq(&phba->hbalock);
1561 phba->hba_flag &= ~DEFER_ERATT;
1562 spin_unlock_irq(&phba->hbalock);
1563 return;
1564 }
1565
a257bf90
JS
1566 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1567 "0479 Deferred Adapter Hardware Error "
1568 "Data: x%x x%x x%x\n",
1569 phba->work_hs,
1570 phba->work_status[0], phba->work_status[1]);
1571
1572 spin_lock_irq(&phba->hbalock);
f4b4c68f 1573 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
a257bf90
JS
1574 spin_unlock_irq(&phba->hbalock);
1575
1576
1577 /*
1578 * Firmware stops when it triggred erratt. That could cause the I/Os
1579 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the
1580 * SCSI layer retry it after re-establishing link.
1581 */
db55fba8 1582 lpfc_sli_abort_fcp_rings(phba);
a257bf90
JS
1583
1584 /*
1585 * There was a firmware error. Take the hba offline and then
1586 * attempt to restart it.
1587 */
618a5230 1588 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
a257bf90
JS
1589 lpfc_offline(phba);
1590
1591 /* Wait for the ER1 bit to clear.*/
1592 while (phba->work_hs & HS_FFER1) {
1593 msleep(100);
9940b97b
JS
1594 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) {
1595 phba->work_hs = UNPLUG_ERR ;
1596 break;
1597 }
a257bf90
JS
1598 /* If driver is unloading let the worker thread continue */
1599 if (phba->pport->load_flag & FC_UNLOADING) {
1600 phba->work_hs = 0;
1601 break;
1602 }
1603 }
1604
1605 /*
1606 * This is to ptrotect against a race condition in which
1607 * first write to the host attention register clear the
1608 * host status register.
1609 */
1610 if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING)))
1611 phba->work_hs = old_host_status & ~HS_FFER1;
1612
3772a991 1613 spin_lock_irq(&phba->hbalock);
a257bf90 1614 phba->hba_flag &= ~DEFER_ERATT;
3772a991 1615 spin_unlock_irq(&phba->hbalock);
a257bf90
JS
1616 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
1617 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
1618}
1619
3772a991
JS
1620static void
1621lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba)
1622{
1623 struct lpfc_board_event_header board_event;
1624 struct Scsi_Host *shost;
1625
1626 board_event.event_type = FC_REG_BOARD_EVENT;
1627 board_event.subcategory = LPFC_EVENT_PORTINTERR;
1628 shost = lpfc_shost_from_vport(phba->pport);
1629 fc_host_post_vendor_event(shost, fc_get_event_number(),
1630 sizeof(board_event),
1631 (char *) &board_event,
1632 LPFC_NL_VENDOR_ID);
1633}
1634
e59058c4 1635/**
3772a991 1636 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler
e59058c4
JS
1637 * @phba: pointer to lpfc hba data structure.
1638 *
1639 * This routine is invoked to handle the following HBA hardware error
1640 * conditions:
1641 * 1 - HBA error attention interrupt
1642 * 2 - DMA ring index out of range
1643 * 3 - Mailbox command came back as unknown
1644 **/
3772a991
JS
1645static void
1646lpfc_handle_eratt_s3(struct lpfc_hba *phba)
dea3101e 1647{
2e0fef85 1648 struct lpfc_vport *vport = phba->pport;
2e0fef85 1649 struct lpfc_sli *psli = &phba->sli;
d2873e4c 1650 uint32_t event_data;
57127f15
JS
1651 unsigned long temperature;
1652 struct temp_event temp_event_data;
92d7f7b0 1653 struct Scsi_Host *shost;
2e0fef85 1654
8d63f375 1655 /* If the pci channel is offline, ignore possible errors,
3772a991
JS
1656 * since we cannot communicate with the pci card anyway.
1657 */
1658 if (pci_channel_offline(phba->pcidev)) {
1659 spin_lock_irq(&phba->hbalock);
1660 phba->hba_flag &= ~DEFER_ERATT;
1661 spin_unlock_irq(&phba->hbalock);
8d63f375 1662 return;
3772a991
JS
1663 }
1664
13815c83
JS
1665 /* If resets are disabled then leave the HBA alone and return */
1666 if (!phba->cfg_enable_hba_reset)
1667 return;
dea3101e 1668
ea2151b4 1669 /* Send an internal error event to mgmt application */
3772a991 1670 lpfc_board_errevt_to_mgmt(phba);
ea2151b4 1671
a257bf90
JS
1672 if (phba->hba_flag & DEFER_ERATT)
1673 lpfc_handle_deferred_eratt(phba);
1674
dcf2a4e0
JS
1675 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) {
1676 if (phba->work_hs & HS_FFER6)
1677 /* Re-establishing Link */
1678 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1679 "1301 Re-establishing Link "
1680 "Data: x%x x%x x%x\n",
1681 phba->work_hs, phba->work_status[0],
1682 phba->work_status[1]);
1683 if (phba->work_hs & HS_FFER8)
1684 /* Device Zeroization */
1685 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1686 "2861 Host Authentication device "
1687 "zeroization Data:x%x x%x x%x\n",
1688 phba->work_hs, phba->work_status[0],
1689 phba->work_status[1]);
58da1ffb 1690
92d7f7b0 1691 spin_lock_irq(&phba->hbalock);
f4b4c68f 1692 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
92d7f7b0 1693 spin_unlock_irq(&phba->hbalock);
dea3101e 1694
1695 /*
1696 * Firmware stops when it triggled erratt with HS_FFER6.
1697 * That could cause the I/Os dropped by the firmware.
1698 * Error iocb (I/O) on txcmplq and let the SCSI layer
1699 * retry it after re-establishing link.
1700 */
db55fba8 1701 lpfc_sli_abort_fcp_rings(phba);
dea3101e 1702
dea3101e 1703 /*
1704 * There was a firmware error. Take the hba offline and then
1705 * attempt to restart it.
1706 */
618a5230 1707 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
dea3101e 1708 lpfc_offline(phba);
41415862 1709 lpfc_sli_brdrestart(phba);
dea3101e 1710 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
46fa311e 1711 lpfc_unblock_mgmt_io(phba);
dea3101e 1712 return;
1713 }
46fa311e 1714 lpfc_unblock_mgmt_io(phba);
57127f15
JS
1715 } else if (phba->work_hs & HS_CRIT_TEMP) {
1716 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET);
1717 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1718 temp_event_data.event_code = LPFC_CRIT_TEMP;
1719 temp_event_data.data = (uint32_t)temperature;
1720
1721 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d7c255b2 1722 "0406 Adapter maximum temperature exceeded "
57127f15
JS
1723 "(%ld), taking this port offline "
1724 "Data: x%x x%x x%x\n",
1725 temperature, phba->work_hs,
1726 phba->work_status[0], phba->work_status[1]);
1727
1728 shost = lpfc_shost_from_vport(phba->pport);
1729 fc_host_post_vendor_event(shost, fc_get_event_number(),
1730 sizeof(temp_event_data),
1731 (char *) &temp_event_data,
1732 SCSI_NL_VID_TYPE_PCI
1733 | PCI_VENDOR_ID_EMULEX);
1734
7af67051 1735 spin_lock_irq(&phba->hbalock);
7af67051
JS
1736 phba->over_temp_state = HBA_OVER_TEMP;
1737 spin_unlock_irq(&phba->hbalock);
09372820 1738 lpfc_offline_eratt(phba);
57127f15 1739
dea3101e 1740 } else {
1741 /* The if clause above forces this code path when the status
9399627f
JS
1742 * failure is a value other than FFER6. Do not call the offline
1743 * twice. This is the adapter hardware error path.
dea3101e 1744 */
1745 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 1746 "0457 Adapter Hardware Error "
dea3101e 1747 "Data: x%x x%x x%x\n",
e8b62011 1748 phba->work_hs,
dea3101e 1749 phba->work_status[0], phba->work_status[1]);
1750
d2873e4c 1751 event_data = FC_REG_DUMP_EVENT;
92d7f7b0 1752 shost = lpfc_shost_from_vport(vport);
2e0fef85 1753 fc_host_post_vendor_event(shost, fc_get_event_number(),
d2873e4c
JS
1754 sizeof(event_data), (char *) &event_data,
1755 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
1756
09372820 1757 lpfc_offline_eratt(phba);
dea3101e 1758 }
9399627f 1759 return;
dea3101e 1760}
1761
618a5230
JS
1762/**
1763 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg
1764 * @phba: pointer to lpfc hba data structure.
1765 * @mbx_action: flag for mailbox shutdown action.
1766 *
1767 * This routine is invoked to perform an SLI4 port PCI function reset in
1768 * response to port status register polling attention. It waits for port
1769 * status register (ERR, RDY, RN) bits before proceeding with function reset.
1770 * During this process, interrupt vectors are freed and later requested
1771 * for handling possible port resource change.
1772 **/
1773static int
e10b2022
JS
1774lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action,
1775 bool en_rn_msg)
618a5230
JS
1776{
1777 int rc;
1778 uint32_t intr_mode;
1779
27d6ac0a 1780 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >=
65791f1f
JS
1781 LPFC_SLI_INTF_IF_TYPE_2) {
1782 /*
1783 * On error status condition, driver need to wait for port
1784 * ready before performing reset.
1785 */
1786 rc = lpfc_sli4_pdev_status_reg_wait(phba);
0e916ee7 1787 if (rc)
65791f1f
JS
1788 return rc;
1789 }
0e916ee7 1790
65791f1f
JS
1791 /* need reset: attempt for port recovery */
1792 if (en_rn_msg)
1793 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1794 "2887 Reset Needed: Attempting Port "
1795 "Recovery...\n");
1796 lpfc_offline_prep(phba, mbx_action);
1797 lpfc_offline(phba);
1798 /* release interrupt for possible resource change */
1799 lpfc_sli4_disable_intr(phba);
5a9eeff5
JS
1800 rc = lpfc_sli_brdrestart(phba);
1801 if (rc) {
1802 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1803 "6309 Failed to restart board\n");
1804 return rc;
1805 }
65791f1f
JS
1806 /* request and enable interrupt */
1807 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
1808 if (intr_mode == LPFC_INTR_ERROR) {
1809 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1810 "3175 Failed to enable interrupt\n");
1811 return -EIO;
618a5230 1812 }
65791f1f
JS
1813 phba->intr_mode = intr_mode;
1814 rc = lpfc_online(phba);
1815 if (rc == 0)
1816 lpfc_unblock_mgmt_io(phba);
1817
618a5230
JS
1818 return rc;
1819}
1820
da0436e9
JS
1821/**
1822 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler
1823 * @phba: pointer to lpfc hba data structure.
1824 *
1825 * This routine is invoked to handle the SLI4 HBA hardware error attention
1826 * conditions.
1827 **/
1828static void
1829lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1830{
1831 struct lpfc_vport *vport = phba->pport;
1832 uint32_t event_data;
1833 struct Scsi_Host *shost;
2fcee4bf 1834 uint32_t if_type;
2e90f4b5
JS
1835 struct lpfc_register portstat_reg = {0};
1836 uint32_t reg_err1, reg_err2;
1837 uint32_t uerrlo_reg, uemasklo_reg;
65791f1f 1838 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2;
e10b2022 1839 bool en_rn_msg = true;
946727dc 1840 struct temp_event temp_event_data;
65791f1f
JS
1841 struct lpfc_register portsmphr_reg;
1842 int rc, i;
da0436e9
JS
1843
1844 /* If the pci channel is offline, ignore possible errors, since
1845 * we cannot communicate with the pci card anyway.
1846 */
1847 if (pci_channel_offline(phba->pcidev))
1848 return;
da0436e9 1849
65791f1f 1850 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
2fcee4bf
JS
1851 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
1852 switch (if_type) {
1853 case LPFC_SLI_INTF_IF_TYPE_0:
2e90f4b5
JS
1854 pci_rd_rc1 = lpfc_readl(
1855 phba->sli4_hba.u.if_type0.UERRLOregaddr,
1856 &uerrlo_reg);
1857 pci_rd_rc2 = lpfc_readl(
1858 phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
1859 &uemasklo_reg);
1860 /* consider PCI bus read error as pci_channel_offline */
1861 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO)
1862 return;
65791f1f
JS
1863 if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) {
1864 lpfc_sli4_offline_eratt(phba);
1865 return;
1866 }
1867 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1868 "7623 Checking UE recoverable");
1869
1870 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
1871 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1872 &portsmphr_reg.word0))
1873 continue;
1874
1875 smphr_port_status = bf_get(lpfc_port_smphr_port_status,
1876 &portsmphr_reg);
1877 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1878 LPFC_PORT_SEM_UE_RECOVERABLE)
1879 break;
1880 /*Sleep for 1Sec, before checking SEMAPHORE */
1881 msleep(1000);
1882 }
1883
1884 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1885 "4827 smphr_port_status x%x : Waited %dSec",
1886 smphr_port_status, i);
1887
1888 /* Recoverable UE, reset the HBA device */
1889 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1890 LPFC_PORT_SEM_UE_RECOVERABLE) {
1891 for (i = 0; i < 20; i++) {
1892 msleep(1000);
1893 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1894 &portsmphr_reg.word0) &&
1895 (LPFC_POST_STAGE_PORT_READY ==
1896 bf_get(lpfc_port_smphr_port_status,
1897 &portsmphr_reg))) {
1898 rc = lpfc_sli4_port_sta_fn_reset(phba,
1899 LPFC_MBX_NO_WAIT, en_rn_msg);
1900 if (rc == 0)
1901 return;
1902 lpfc_printf_log(phba,
1903 KERN_ERR, LOG_INIT,
1904 "4215 Failed to recover UE");
1905 break;
1906 }
1907 }
1908 }
1909 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1910 "7624 Firmware not ready: Failing UE recovery,"
1911 " waited %dSec", i);
2fcee4bf
JS
1912 lpfc_sli4_offline_eratt(phba);
1913 break;
946727dc 1914
2fcee4bf 1915 case LPFC_SLI_INTF_IF_TYPE_2:
27d6ac0a 1916 case LPFC_SLI_INTF_IF_TYPE_6:
2e90f4b5
JS
1917 pci_rd_rc1 = lpfc_readl(
1918 phba->sli4_hba.u.if_type2.STATUSregaddr,
1919 &portstat_reg.word0);
1920 /* consider PCI bus read error as pci_channel_offline */
6b5151fd
JS
1921 if (pci_rd_rc1 == -EIO) {
1922 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1923 "3151 PCI bus read access failure: x%x\n",
1924 readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
2e90f4b5 1925 return;
6b5151fd 1926 }
2e90f4b5
JS
1927 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
1928 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
2fcee4bf 1929 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
2fcee4bf
JS
1930 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1931 "2889 Port Overtemperature event, "
946727dc
JS
1932 "taking port offline Data: x%x x%x\n",
1933 reg_err1, reg_err2);
1934
310429ef 1935 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS
1936 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1937 temp_event_data.event_code = LPFC_CRIT_TEMP;
1938 temp_event_data.data = 0xFFFFFFFF;
1939
1940 shost = lpfc_shost_from_vport(phba->pport);
1941 fc_host_post_vendor_event(shost, fc_get_event_number(),
1942 sizeof(temp_event_data),
1943 (char *)&temp_event_data,
1944 SCSI_NL_VID_TYPE_PCI
1945 | PCI_VENDOR_ID_EMULEX);
1946
2fcee4bf
JS
1947 spin_lock_irq(&phba->hbalock);
1948 phba->over_temp_state = HBA_OVER_TEMP;
1949 spin_unlock_irq(&phba->hbalock);
1950 lpfc_sli4_offline_eratt(phba);
946727dc 1951 return;
2fcee4bf 1952 }
2e90f4b5 1953 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
e10b2022 1954 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) {
2e90f4b5 1955 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e10b2022
JS
1956 "3143 Port Down: Firmware Update "
1957 "Detected\n");
1958 en_rn_msg = false;
1959 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2e90f4b5
JS
1960 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1961 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1962 "3144 Port Down: Debug Dump\n");
1963 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1964 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON)
1965 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1966 "3145 Port Down: Provisioning\n");
618a5230 1967
946727dc
JS
1968 /* If resets are disabled then leave the HBA alone and return */
1969 if (!phba->cfg_enable_hba_reset)
1970 return;
1971
618a5230 1972 /* Check port status register for function reset */
e10b2022
JS
1973 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT,
1974 en_rn_msg);
618a5230
JS
1975 if (rc == 0) {
1976 /* don't report event on forced debug dump */
1977 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1978 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1979 return;
1980 else
1981 break;
2fcee4bf 1982 }
618a5230 1983 /* fall through for not able to recover */
6b5151fd
JS
1984 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1985 "3152 Unrecoverable error, bring the port "
1986 "offline\n");
2fcee4bf
JS
1987 lpfc_sli4_offline_eratt(phba);
1988 break;
1989 case LPFC_SLI_INTF_IF_TYPE_1:
1990 default:
1991 break;
1992 }
2e90f4b5
JS
1993 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1994 "3123 Report dump event to upper layer\n");
1995 /* Send an internal error event to mgmt application */
1996 lpfc_board_errevt_to_mgmt(phba);
1997
1998 event_data = FC_REG_DUMP_EVENT;
1999 shost = lpfc_shost_from_vport(vport);
2000 fc_host_post_vendor_event(shost, fc_get_event_number(),
2001 sizeof(event_data), (char *) &event_data,
2002 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
da0436e9
JS
2003}
2004
2005/**
2006 * lpfc_handle_eratt - Wrapper func for handling hba error attention
2007 * @phba: pointer to lpfc HBA data structure.
2008 *
2009 * This routine wraps the actual SLI3 or SLI4 hba error attention handling
2010 * routine from the API jump table function pointer from the lpfc_hba struct.
2011 *
2012 * Return codes
af901ca1 2013 * 0 - success.
da0436e9
JS
2014 * Any other value - error.
2015 **/
2016void
2017lpfc_handle_eratt(struct lpfc_hba *phba)
2018{
2019 (*phba->lpfc_handle_eratt)(phba);
2020}
2021
e59058c4 2022/**
3621a710 2023 * lpfc_handle_latt - The HBA link event handler
e59058c4
JS
2024 * @phba: pointer to lpfc hba data structure.
2025 *
2026 * This routine is invoked from the worker thread to handle a HBA host
895427bd 2027 * attention link event. SLI3 only.
e59058c4 2028 **/
dea3101e 2029void
2e0fef85 2030lpfc_handle_latt(struct lpfc_hba *phba)
dea3101e 2031{
2e0fef85
JS
2032 struct lpfc_vport *vport = phba->pport;
2033 struct lpfc_sli *psli = &phba->sli;
dea3101e 2034 LPFC_MBOXQ_t *pmb;
2035 volatile uint32_t control;
2036 struct lpfc_dmabuf *mp;
09372820 2037 int rc = 0;
dea3101e 2038
2039 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
09372820
JS
2040 if (!pmb) {
2041 rc = 1;
dea3101e 2042 goto lpfc_handle_latt_err_exit;
09372820 2043 }
dea3101e 2044
2045 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
09372820
JS
2046 if (!mp) {
2047 rc = 2;
dea3101e 2048 goto lpfc_handle_latt_free_pmb;
09372820 2049 }
dea3101e 2050
2051 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
09372820
JS
2052 if (!mp->virt) {
2053 rc = 3;
dea3101e 2054 goto lpfc_handle_latt_free_mp;
09372820 2055 }
dea3101e 2056
6281bfe0 2057 /* Cleanup any outstanding ELS commands */
549e55cd 2058 lpfc_els_flush_all_cmd(phba);
dea3101e 2059
2060 psli->slistat.link_event++;
76a95d75
JS
2061 lpfc_read_topology(phba, pmb, mp);
2062 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
2e0fef85 2063 pmb->vport = vport;
0d2b6b83 2064 /* Block ELS IOCBs until we have processed this mbox command */
895427bd 2065 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
0b727fea 2066 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT);
09372820
JS
2067 if (rc == MBX_NOT_FINISHED) {
2068 rc = 4;
14691150 2069 goto lpfc_handle_latt_free_mbuf;
09372820 2070 }
dea3101e 2071
2072 /* Clear Link Attention in HA REG */
2e0fef85 2073 spin_lock_irq(&phba->hbalock);
dea3101e 2074 writel(HA_LATT, phba->HAregaddr);
2075 readl(phba->HAregaddr); /* flush */
2e0fef85 2076 spin_unlock_irq(&phba->hbalock);
dea3101e 2077
2078 return;
2079
14691150 2080lpfc_handle_latt_free_mbuf:
895427bd 2081 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
14691150 2082 lpfc_mbuf_free(phba, mp->virt, mp->phys);
dea3101e 2083lpfc_handle_latt_free_mp:
2084 kfree(mp);
2085lpfc_handle_latt_free_pmb:
1dcb58e5 2086 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 2087lpfc_handle_latt_err_exit:
2088 /* Enable Link attention interrupts */
2e0fef85 2089 spin_lock_irq(&phba->hbalock);
dea3101e 2090 psli->sli_flag |= LPFC_PROCESS_LA;
2091 control = readl(phba->HCregaddr);
2092 control |= HC_LAINT_ENA;
2093 writel(control, phba->HCregaddr);
2094 readl(phba->HCregaddr); /* flush */
2095
2096 /* Clear Link Attention in HA REG */
2097 writel(HA_LATT, phba->HAregaddr);
2098 readl(phba->HAregaddr); /* flush */
2e0fef85 2099 spin_unlock_irq(&phba->hbalock);
dea3101e 2100 lpfc_linkdown(phba);
2e0fef85 2101 phba->link_state = LPFC_HBA_ERROR;
dea3101e 2102
09372820
JS
2103 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
2104 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc);
dea3101e 2105
2106 return;
2107}
2108
e59058c4 2109/**
3621a710 2110 * lpfc_parse_vpd - Parse VPD (Vital Product Data)
e59058c4
JS
2111 * @phba: pointer to lpfc hba data structure.
2112 * @vpd: pointer to the vital product data.
2113 * @len: length of the vital product data in bytes.
2114 *
2115 * This routine parses the Vital Product Data (VPD). The VPD is treated as
2116 * an array of characters. In this routine, the ModelName, ProgramType, and
2117 * ModelDesc, etc. fields of the phba data structure will be populated.
2118 *
2119 * Return codes
2120 * 0 - pointer to the VPD passed in is NULL
2121 * 1 - success
2122 **/
3772a991 2123int
2e0fef85 2124lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len)
dea3101e 2125{
2126 uint8_t lenlo, lenhi;
07da60c1 2127 int Length;
dea3101e 2128 int i, j;
2129 int finished = 0;
2130 int index = 0;
2131
2132 if (!vpd)
2133 return 0;
2134
2135 /* Vital Product */
ed957684 2136 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 2137 "0455 Vital Product Data: x%x x%x x%x x%x\n",
dea3101e 2138 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
2139 (uint32_t) vpd[3]);
74b72a59 2140 while (!finished && (index < (len - 4))) {
dea3101e 2141 switch (vpd[index]) {
2142 case 0x82:
74b72a59 2143 case 0x91:
dea3101e 2144 index += 1;
2145 lenlo = vpd[index];
2146 index += 1;
2147 lenhi = vpd[index];
2148 index += 1;
2149 i = ((((unsigned short)lenhi) << 8) + lenlo);
2150 index += i;
2151 break;
2152 case 0x90:
2153 index += 1;
2154 lenlo = vpd[index];
2155 index += 1;
2156 lenhi = vpd[index];
2157 index += 1;
2158 Length = ((((unsigned short)lenhi) << 8) + lenlo);
74b72a59
JW
2159 if (Length > len - index)
2160 Length = len - index;
dea3101e 2161 while (Length > 0) {
2162 /* Look for Serial Number */
2163 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
2164 index += 2;
2165 i = vpd[index];
2166 index += 1;
2167 j = 0;
2168 Length -= (3+i);
2169 while(i--) {
2170 phba->SerialNumber[j++] = vpd[index++];
2171 if (j == 31)
2172 break;
2173 }
2174 phba->SerialNumber[j] = 0;
2175 continue;
2176 }
2177 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
2178 phba->vpd_flag |= VPD_MODEL_DESC;
2179 index += 2;
2180 i = vpd[index];
2181 index += 1;
2182 j = 0;
2183 Length -= (3+i);
2184 while(i--) {
2185 phba->ModelDesc[j++] = vpd[index++];
2186 if (j == 255)
2187 break;
2188 }
2189 phba->ModelDesc[j] = 0;
2190 continue;
2191 }
2192 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
2193 phba->vpd_flag |= VPD_MODEL_NAME;
2194 index += 2;
2195 i = vpd[index];
2196 index += 1;
2197 j = 0;
2198 Length -= (3+i);
2199 while(i--) {
2200 phba->ModelName[j++] = vpd[index++];
2201 if (j == 79)
2202 break;
2203 }
2204 phba->ModelName[j] = 0;
2205 continue;
2206 }
2207 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
2208 phba->vpd_flag |= VPD_PROGRAM_TYPE;
2209 index += 2;
2210 i = vpd[index];
2211 index += 1;
2212 j = 0;
2213 Length -= (3+i);
2214 while(i--) {
2215 phba->ProgramType[j++] = vpd[index++];
2216 if (j == 255)
2217 break;
2218 }
2219 phba->ProgramType[j] = 0;
2220 continue;
2221 }
2222 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
2223 phba->vpd_flag |= VPD_PORT;
2224 index += 2;
2225 i = vpd[index];
2226 index += 1;
2227 j = 0;
2228 Length -= (3+i);
2229 while(i--) {
cd1c8301
JS
2230 if ((phba->sli_rev == LPFC_SLI_REV4) &&
2231 (phba->sli4_hba.pport_name_sta ==
2232 LPFC_SLI4_PPNAME_GET)) {
2233 j++;
2234 index++;
2235 } else
2236 phba->Port[j++] = vpd[index++];
2237 if (j == 19)
2238 break;
dea3101e 2239 }
cd1c8301
JS
2240 if ((phba->sli_rev != LPFC_SLI_REV4) ||
2241 (phba->sli4_hba.pport_name_sta ==
2242 LPFC_SLI4_PPNAME_NON))
2243 phba->Port[j] = 0;
dea3101e 2244 continue;
2245 }
2246 else {
2247 index += 2;
2248 i = vpd[index];
2249 index += 1;
2250 index += i;
2251 Length -= (3 + i);
2252 }
2253 }
2254 finished = 0;
2255 break;
2256 case 0x78:
2257 finished = 1;
2258 break;
2259 default:
2260 index ++;
2261 break;
2262 }
74b72a59 2263 }
dea3101e 2264
2265 return(1);
2266}
2267
e59058c4 2268/**
3621a710 2269 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description
e59058c4
JS
2270 * @phba: pointer to lpfc hba data structure.
2271 * @mdp: pointer to the data structure to hold the derived model name.
2272 * @descp: pointer to the data structure to hold the derived description.
2273 *
2274 * This routine retrieves HBA's description based on its registered PCI device
2275 * ID. The @descp passed into this function points to an array of 256 chars. It
2276 * shall be returned with the model name, maximum speed, and the host bus type.
2277 * The @mdp passed into this function points to an array of 80 chars. When the
2278 * function returns, the @mdp will be filled with the model name.
2279 **/
dea3101e 2280static void
2e0fef85 2281lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
dea3101e 2282{
2283 lpfc_vpd_t *vp;
fefcb2b6 2284 uint16_t dev_id = phba->pcidev->device;
74b72a59 2285 int max_speed;
84774a4d 2286 int GE = 0;
da0436e9 2287 int oneConnect = 0; /* default is not a oneConnect */
74b72a59 2288 struct {
a747c9ce
JS
2289 char *name;
2290 char *bus;
2291 char *function;
2292 } m = {"<Unknown>", "", ""};
74b72a59
JW
2293
2294 if (mdp && mdp[0] != '\0'
2295 && descp && descp[0] != '\0')
2296 return;
2297
fbd8a6ba
JS
2298 if (phba->lmt & LMT_64Gb)
2299 max_speed = 64;
2300 else if (phba->lmt & LMT_32Gb)
d38dd52c
JS
2301 max_speed = 32;
2302 else if (phba->lmt & LMT_16Gb)
c0c11512
JS
2303 max_speed = 16;
2304 else if (phba->lmt & LMT_10Gb)
74b72a59
JW
2305 max_speed = 10;
2306 else if (phba->lmt & LMT_8Gb)
2307 max_speed = 8;
2308 else if (phba->lmt & LMT_4Gb)
2309 max_speed = 4;
2310 else if (phba->lmt & LMT_2Gb)
2311 max_speed = 2;
4169d868 2312 else if (phba->lmt & LMT_1Gb)
74b72a59 2313 max_speed = 1;
4169d868
JS
2314 else
2315 max_speed = 0;
dea3101e 2316
2317 vp = &phba->vpd;
dea3101e 2318
e4adb204 2319 switch (dev_id) {
06325e74 2320 case PCI_DEVICE_ID_FIREFLY:
12222f4f
JS
2321 m = (typeof(m)){"LP6000", "PCI",
2322 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2323 break;
dea3101e 2324 case PCI_DEVICE_ID_SUPERFLY:
2325 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
12222f4f 2326 m = (typeof(m)){"LP7000", "PCI", ""};
dea3101e 2327 else
12222f4f
JS
2328 m = (typeof(m)){"LP7000E", "PCI", ""};
2329 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e 2330 break;
2331 case PCI_DEVICE_ID_DRAGONFLY:
a747c9ce 2332 m = (typeof(m)){"LP8000", "PCI",
12222f4f 2333 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2334 break;
2335 case PCI_DEVICE_ID_CENTAUR:
2336 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
12222f4f 2337 m = (typeof(m)){"LP9002", "PCI", ""};
dea3101e 2338 else
12222f4f
JS
2339 m = (typeof(m)){"LP9000", "PCI", ""};
2340 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e 2341 break;
2342 case PCI_DEVICE_ID_RFLY:
a747c9ce 2343 m = (typeof(m)){"LP952", "PCI",
12222f4f 2344 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2345 break;
2346 case PCI_DEVICE_ID_PEGASUS:
a747c9ce 2347 m = (typeof(m)){"LP9802", "PCI-X",
12222f4f 2348 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2349 break;
2350 case PCI_DEVICE_ID_THOR:
a747c9ce 2351 m = (typeof(m)){"LP10000", "PCI-X",
12222f4f 2352 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2353 break;
2354 case PCI_DEVICE_ID_VIPER:
a747c9ce 2355 m = (typeof(m)){"LPX1000", "PCI-X",
12222f4f 2356 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2357 break;
2358 case PCI_DEVICE_ID_PFLY:
a747c9ce 2359 m = (typeof(m)){"LP982", "PCI-X",
12222f4f 2360 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2361 break;
2362 case PCI_DEVICE_ID_TFLY:
a747c9ce 2363 m = (typeof(m)){"LP1050", "PCI-X",
12222f4f 2364 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2365 break;
2366 case PCI_DEVICE_ID_HELIOS:
a747c9ce 2367 m = (typeof(m)){"LP11000", "PCI-X2",
12222f4f 2368 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2369 break;
e4adb204 2370 case PCI_DEVICE_ID_HELIOS_SCSP:
a747c9ce 2371 m = (typeof(m)){"LP11000-SP", "PCI-X2",
12222f4f 2372 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2373 break;
2374 case PCI_DEVICE_ID_HELIOS_DCSP:
a747c9ce 2375 m = (typeof(m)){"LP11002-SP", "PCI-X2",
12222f4f 2376 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2377 break;
2378 case PCI_DEVICE_ID_NEPTUNE:
12222f4f
JS
2379 m = (typeof(m)){"LPe1000", "PCIe",
2380 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2381 break;
2382 case PCI_DEVICE_ID_NEPTUNE_SCSP:
12222f4f
JS
2383 m = (typeof(m)){"LPe1000-SP", "PCIe",
2384 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC
2385 break;
2386 case PCI_DEVICE_ID_NEPTUNE_DCSP:
12222f4f
JS
2387 m = (typeof(m)){"LPe1002-SP", "PCIe",
2388 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204 2389 break;
dea3101e 2390 case PCI_DEVICE_ID_BMID:
a747c9ce 2391 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"};
dea3101e 2392 break;
2393 case PCI_DEVICE_ID_BSMB:
12222f4f
JS
2394 m = (typeof(m)){"LP111", "PCI-X2",
2395 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2396 break;
2397 case PCI_DEVICE_ID_ZEPHYR:
a747c9ce 2398 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
dea3101e 2399 break;
e4adb204 2400 case PCI_DEVICE_ID_ZEPHYR_SCSP:
a747c9ce 2401 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
e4adb204
JSEC
2402 break;
2403 case PCI_DEVICE_ID_ZEPHYR_DCSP:
a747c9ce 2404 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"};
a257bf90 2405 GE = 1;
e4adb204 2406 break;
dea3101e 2407 case PCI_DEVICE_ID_ZMID:
a747c9ce 2408 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"};
dea3101e 2409 break;
2410 case PCI_DEVICE_ID_ZSMB:
a747c9ce 2411 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"};
dea3101e 2412 break;
2413 case PCI_DEVICE_ID_LP101:
12222f4f
JS
2414 m = (typeof(m)){"LP101", "PCI-X",
2415 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2416 break;
2417 case PCI_DEVICE_ID_LP10000S:
12222f4f
JS
2418 m = (typeof(m)){"LP10000-S", "PCI",
2419 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2420 break;
e4adb204 2421 case PCI_DEVICE_ID_LP11000S:
12222f4f
JS
2422 m = (typeof(m)){"LP11000-S", "PCI-X2",
2423 "Obsolete, Unsupported Fibre Channel Adapter"};
18a3b596 2424 break;
e4adb204 2425 case PCI_DEVICE_ID_LPE11000S:
12222f4f
JS
2426 m = (typeof(m)){"LPe11000-S", "PCIe",
2427 "Obsolete, Unsupported Fibre Channel Adapter"};
5cc36b3c 2428 break;
b87eab38 2429 case PCI_DEVICE_ID_SAT:
a747c9ce 2430 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2431 break;
2432 case PCI_DEVICE_ID_SAT_MID:
a747c9ce 2433 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2434 break;
2435 case PCI_DEVICE_ID_SAT_SMB:
a747c9ce 2436 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2437 break;
2438 case PCI_DEVICE_ID_SAT_DCSP:
a747c9ce 2439 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2440 break;
2441 case PCI_DEVICE_ID_SAT_SCSP:
a747c9ce 2442 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS
2443 break;
2444 case PCI_DEVICE_ID_SAT_S:
a747c9ce 2445 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"};
b87eab38 2446 break;
84774a4d 2447 case PCI_DEVICE_ID_HORNET:
12222f4f
JS
2448 m = (typeof(m)){"LP21000", "PCIe",
2449 "Obsolete, Unsupported FCoE Adapter"};
84774a4d
JS
2450 GE = 1;
2451 break;
2452 case PCI_DEVICE_ID_PROTEUS_VF:
a747c9ce 2453 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2454 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS
2455 break;
2456 case PCI_DEVICE_ID_PROTEUS_PF:
a747c9ce 2457 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2458 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS
2459 break;
2460 case PCI_DEVICE_ID_PROTEUS_S:
a747c9ce 2461 m = (typeof(m)){"LPemv12002-S", "PCIe IOV",
12222f4f 2462 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d 2463 break;
da0436e9
JS
2464 case PCI_DEVICE_ID_TIGERSHARK:
2465 oneConnect = 1;
a747c9ce 2466 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"};
da0436e9 2467 break;
a747c9ce 2468 case PCI_DEVICE_ID_TOMCAT:
6669f9bb 2469 oneConnect = 1;
a747c9ce
JS
2470 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"};
2471 break;
2472 case PCI_DEVICE_ID_FALCON:
2473 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe",
2474 "EmulexSecure Fibre"};
6669f9bb 2475 break;
98fc5dd9
JS
2476 case PCI_DEVICE_ID_BALIUS:
2477 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O",
12222f4f 2478 "Obsolete, Unsupported Fibre Channel Adapter"};
98fc5dd9 2479 break;
085c647c 2480 case PCI_DEVICE_ID_LANCER_FC:
c0c11512 2481 m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"};
085c647c 2482 break;
12222f4f
JS
2483 case PCI_DEVICE_ID_LANCER_FC_VF:
2484 m = (typeof(m)){"LPe16000", "PCIe",
2485 "Obsolete, Unsupported Fibre Channel Adapter"};
2486 break;
085c647c
JS
2487 case PCI_DEVICE_ID_LANCER_FCOE:
2488 oneConnect = 1;
079b5c91 2489 m = (typeof(m)){"OCe15100", "PCIe", "FCoE"};
085c647c 2490 break;
12222f4f
JS
2491 case PCI_DEVICE_ID_LANCER_FCOE_VF:
2492 oneConnect = 1;
2493 m = (typeof(m)){"OCe15100", "PCIe",
2494 "Obsolete, Unsupported FCoE"};
2495 break;
d38dd52c
JS
2496 case PCI_DEVICE_ID_LANCER_G6_FC:
2497 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"};
2498 break;
c238b9b6
JS
2499 case PCI_DEVICE_ID_LANCER_G7_FC:
2500 m = (typeof(m)){"LPe36000", "PCIe", "Fibre Channel Adapter"};
2501 break;
f8cafd38
JS
2502 case PCI_DEVICE_ID_SKYHAWK:
2503 case PCI_DEVICE_ID_SKYHAWK_VF:
2504 oneConnect = 1;
2505 m = (typeof(m)){"OCe14000", "PCIe", "FCoE"};
2506 break;
5cc36b3c 2507 default:
a747c9ce 2508 m = (typeof(m)){"Unknown", "", ""};
e4adb204 2509 break;
dea3101e 2510 }
74b72a59
JW
2511
2512 if (mdp && mdp[0] == '\0')
2513 snprintf(mdp, 79,"%s", m.name);
c0c11512
JS
2514 /*
2515 * oneConnect hba requires special processing, they are all initiators
da0436e9
JS
2516 * and we put the port number on the end
2517 */
2518 if (descp && descp[0] == '\0') {
2519 if (oneConnect)
2520 snprintf(descp, 255,
4169d868 2521 "Emulex OneConnect %s, %s Initiator %s",
a747c9ce 2522 m.name, m.function,
da0436e9 2523 phba->Port);
4169d868
JS
2524 else if (max_speed == 0)
2525 snprintf(descp, 255,
290237d2 2526 "Emulex %s %s %s",
4169d868 2527 m.name, m.bus, m.function);
da0436e9
JS
2528 else
2529 snprintf(descp, 255,
2530 "Emulex %s %d%s %s %s",
a747c9ce
JS
2531 m.name, max_speed, (GE) ? "GE" : "Gb",
2532 m.bus, m.function);
da0436e9 2533 }
dea3101e 2534}
2535
e59058c4 2536/**
3621a710 2537 * lpfc_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring
e59058c4
JS
2538 * @phba: pointer to lpfc hba data structure.
2539 * @pring: pointer to a IOCB ring.
2540 * @cnt: the number of IOCBs to be posted to the IOCB ring.
2541 *
2542 * This routine posts a given number of IOCBs with the associated DMA buffer
2543 * descriptors specified by the cnt argument to the given IOCB ring.
2544 *
2545 * Return codes
2546 * The number of IOCBs NOT able to be posted to the IOCB ring.
2547 **/
dea3101e 2548int
495a714c 2549lpfc_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt)
dea3101e 2550{
2551 IOCB_t *icmd;
0bd4ca25 2552 struct lpfc_iocbq *iocb;
dea3101e 2553 struct lpfc_dmabuf *mp1, *mp2;
2554
2555 cnt += pring->missbufcnt;
2556
2557 /* While there are buffers to post */
2558 while (cnt > 0) {
2559 /* Allocate buffer for command iocb */
0bd4ca25 2560 iocb = lpfc_sli_get_iocbq(phba);
dea3101e 2561 if (iocb == NULL) {
2562 pring->missbufcnt = cnt;
2563 return cnt;
2564 }
dea3101e 2565 icmd = &iocb->iocb;
2566
2567 /* 2 buffers can be posted per command */
2568 /* Allocate buffer to post */
2569 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2570 if (mp1)
98c9ea5c
JS
2571 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys);
2572 if (!mp1 || !mp1->virt) {
c9475cb0 2573 kfree(mp1);
604a3e30 2574 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2575 pring->missbufcnt = cnt;
2576 return cnt;
2577 }
2578
2579 INIT_LIST_HEAD(&mp1->list);
2580 /* Allocate buffer to post */
2581 if (cnt > 1) {
2582 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2583 if (mp2)
2584 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
2585 &mp2->phys);
98c9ea5c 2586 if (!mp2 || !mp2->virt) {
c9475cb0 2587 kfree(mp2);
dea3101e 2588 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2589 kfree(mp1);
604a3e30 2590 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2591 pring->missbufcnt = cnt;
2592 return cnt;
2593 }
2594
2595 INIT_LIST_HEAD(&mp2->list);
2596 } else {
2597 mp2 = NULL;
2598 }
2599
2600 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
2601 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
2602 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
2603 icmd->ulpBdeCount = 1;
2604 cnt--;
2605 if (mp2) {
2606 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
2607 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
2608 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
2609 cnt--;
2610 icmd->ulpBdeCount = 2;
2611 }
2612
2613 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
2614 icmd->ulpLe = 1;
2615
3772a991
JS
2616 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) ==
2617 IOCB_ERROR) {
dea3101e 2618 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2619 kfree(mp1);
2620 cnt++;
2621 if (mp2) {
2622 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
2623 kfree(mp2);
2624 cnt++;
2625 }
604a3e30 2626 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2627 pring->missbufcnt = cnt;
dea3101e 2628 return cnt;
2629 }
dea3101e 2630 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
92d7f7b0 2631 if (mp2)
dea3101e 2632 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
dea3101e 2633 }
2634 pring->missbufcnt = 0;
2635 return 0;
2636}
2637
e59058c4 2638/**
3621a710 2639 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring
e59058c4
JS
2640 * @phba: pointer to lpfc hba data structure.
2641 *
2642 * This routine posts initial receive IOCB buffers to the ELS ring. The
2643 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is
895427bd 2644 * set to 64 IOCBs. SLI3 only.
e59058c4
JS
2645 *
2646 * Return codes
2647 * 0 - success (currently always success)
2648 **/
dea3101e 2649static int
2e0fef85 2650lpfc_post_rcv_buf(struct lpfc_hba *phba)
dea3101e 2651{
2652 struct lpfc_sli *psli = &phba->sli;
2653
2654 /* Ring 0, ELS / CT buffers */
895427bd 2655 lpfc_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0);
dea3101e 2656 /* Ring 2 - FCP no buffers needed */
2657
2658 return 0;
2659}
2660
2661#define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
2662
e59058c4 2663/**
3621a710 2664 * lpfc_sha_init - Set up initial array of hash table entries
e59058c4
JS
2665 * @HashResultPointer: pointer to an array as hash table.
2666 *
2667 * This routine sets up the initial values to the array of hash table entries
2668 * for the LC HBAs.
2669 **/
dea3101e 2670static void
2671lpfc_sha_init(uint32_t * HashResultPointer)
2672{
2673 HashResultPointer[0] = 0x67452301;
2674 HashResultPointer[1] = 0xEFCDAB89;
2675 HashResultPointer[2] = 0x98BADCFE;
2676 HashResultPointer[3] = 0x10325476;
2677 HashResultPointer[4] = 0xC3D2E1F0;
2678}
2679
e59058c4 2680/**
3621a710 2681 * lpfc_sha_iterate - Iterate initial hash table with the working hash table
e59058c4
JS
2682 * @HashResultPointer: pointer to an initial/result hash table.
2683 * @HashWorkingPointer: pointer to an working hash table.
2684 *
2685 * This routine iterates an initial hash table pointed by @HashResultPointer
2686 * with the values from the working hash table pointeed by @HashWorkingPointer.
2687 * The results are putting back to the initial hash table, returned through
2688 * the @HashResultPointer as the result hash table.
2689 **/
dea3101e 2690static void
2691lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
2692{
2693 int t;
2694 uint32_t TEMP;
2695 uint32_t A, B, C, D, E;
2696 t = 16;
2697 do {
2698 HashWorkingPointer[t] =
2699 S(1,
2700 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
2701 8] ^
2702 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
2703 } while (++t <= 79);
2704 t = 0;
2705 A = HashResultPointer[0];
2706 B = HashResultPointer[1];
2707 C = HashResultPointer[2];
2708 D = HashResultPointer[3];
2709 E = HashResultPointer[4];
2710
2711 do {
2712 if (t < 20) {
2713 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
2714 } else if (t < 40) {
2715 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
2716 } else if (t < 60) {
2717 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
2718 } else {
2719 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
2720 }
2721 TEMP += S(5, A) + E + HashWorkingPointer[t];
2722 E = D;
2723 D = C;
2724 C = S(30, B);
2725 B = A;
2726 A = TEMP;
2727 } while (++t <= 79);
2728
2729 HashResultPointer[0] += A;
2730 HashResultPointer[1] += B;
2731 HashResultPointer[2] += C;
2732 HashResultPointer[3] += D;
2733 HashResultPointer[4] += E;
2734
2735}
2736
e59058c4 2737/**
3621a710 2738 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA
e59058c4
JS
2739 * @RandomChallenge: pointer to the entry of host challenge random number array.
2740 * @HashWorking: pointer to the entry of the working hash array.
2741 *
2742 * This routine calculates the working hash array referred by @HashWorking
2743 * from the challenge random numbers associated with the host, referred by
2744 * @RandomChallenge. The result is put into the entry of the working hash
2745 * array and returned by reference through @HashWorking.
2746 **/
dea3101e 2747static void
2748lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
2749{
2750 *HashWorking = (*RandomChallenge ^ *HashWorking);
2751}
2752
e59058c4 2753/**
3621a710 2754 * lpfc_hba_init - Perform special handling for LC HBA initialization
e59058c4
JS
2755 * @phba: pointer to lpfc hba data structure.
2756 * @hbainit: pointer to an array of unsigned 32-bit integers.
2757 *
2758 * This routine performs the special handling for LC HBA initialization.
2759 **/
dea3101e 2760void
2761lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
2762{
2763 int t;
2764 uint32_t *HashWorking;
2e0fef85 2765 uint32_t *pwwnn = (uint32_t *) phba->wwnn;
dea3101e 2766
bbfbbbc1 2767 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL);
dea3101e 2768 if (!HashWorking)
2769 return;
2770
dea3101e 2771 HashWorking[0] = HashWorking[78] = *pwwnn++;
2772 HashWorking[1] = HashWorking[79] = *pwwnn;
2773
2774 for (t = 0; t < 7; t++)
2775 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
2776
2777 lpfc_sha_init(hbainit);
2778 lpfc_sha_iterate(hbainit, HashWorking);
2779 kfree(HashWorking);
2780}
2781
e59058c4 2782/**
3621a710 2783 * lpfc_cleanup - Performs vport cleanups before deleting a vport
e59058c4
JS
2784 * @vport: pointer to a virtual N_Port data structure.
2785 *
2786 * This routine performs the necessary cleanups before deleting the @vport.
2787 * It invokes the discovery state machine to perform necessary state
2788 * transitions and to release the ndlps associated with the @vport. Note,
2789 * the physical port is treated as @vport 0.
2790 **/
87af33fe 2791void
2e0fef85 2792lpfc_cleanup(struct lpfc_vport *vport)
dea3101e 2793{
87af33fe 2794 struct lpfc_hba *phba = vport->phba;
dea3101e 2795 struct lpfc_nodelist *ndlp, *next_ndlp;
a8adb832 2796 int i = 0;
dea3101e 2797
87af33fe
JS
2798 if (phba->link_state > LPFC_LINK_DOWN)
2799 lpfc_port_link_failure(vport);
2800
2801 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) {
e47c9093
JS
2802 if (!NLP_CHK_NODE_ACT(ndlp)) {
2803 ndlp = lpfc_enable_node(vport, ndlp,
2804 NLP_STE_UNUSED_NODE);
2805 if (!ndlp)
2806 continue;
2807 spin_lock_irq(&phba->ndlp_lock);
2808 NLP_SET_FREE_REQ(ndlp);
2809 spin_unlock_irq(&phba->ndlp_lock);
2810 /* Trigger the release of the ndlp memory */
2811 lpfc_nlp_put(ndlp);
2812 continue;
2813 }
2814 spin_lock_irq(&phba->ndlp_lock);
2815 if (NLP_CHK_FREE_REQ(ndlp)) {
2816 /* The ndlp should not be in memory free mode already */
2817 spin_unlock_irq(&phba->ndlp_lock);
2818 continue;
2819 } else
2820 /* Indicate request for freeing ndlp memory */
2821 NLP_SET_FREE_REQ(ndlp);
2822 spin_unlock_irq(&phba->ndlp_lock);
2823
58da1ffb
JS
2824 if (vport->port_type != LPFC_PHYSICAL_PORT &&
2825 ndlp->nlp_DID == Fabric_DID) {
2826 /* Just free up ndlp with Fabric_DID for vports */
2827 lpfc_nlp_put(ndlp);
2828 continue;
2829 }
2830
eff4a01b
JS
2831 /* take care of nodes in unused state before the state
2832 * machine taking action.
2833 */
2834 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) {
2835 lpfc_nlp_put(ndlp);
2836 continue;
2837 }
2838
87af33fe
JS
2839 if (ndlp->nlp_type & NLP_FABRIC)
2840 lpfc_disc_state_machine(vport, ndlp, NULL,
2841 NLP_EVT_DEVICE_RECOVERY);
e47c9093 2842
87af33fe
JS
2843 lpfc_disc_state_machine(vport, ndlp, NULL,
2844 NLP_EVT_DEVICE_RM);
2845 }
2846
a8adb832
JS
2847 /* At this point, ALL ndlp's should be gone
2848 * because of the previous NLP_EVT_DEVICE_RM.
2849 * Lets wait for this to happen, if needed.
2850 */
87af33fe 2851 while (!list_empty(&vport->fc_nodes)) {
a8adb832 2852 if (i++ > 3000) {
87af33fe 2853 lpfc_printf_vlog(vport, KERN_ERR, LOG_DISCOVERY,
a8adb832 2854 "0233 Nodelist not empty\n");
e47c9093
JS
2855 list_for_each_entry_safe(ndlp, next_ndlp,
2856 &vport->fc_nodes, nlp_listp) {
2857 lpfc_printf_vlog(ndlp->vport, KERN_ERR,
2858 LOG_NODE,
d7c255b2 2859 "0282 did:x%x ndlp:x%p "
e47c9093
JS
2860 "usgmap:x%x refcnt:%d\n",
2861 ndlp->nlp_DID, (void *)ndlp,
2862 ndlp->nlp_usg_map,
2c935bc5 2863 kref_read(&ndlp->kref));
e47c9093 2864 }
a8adb832 2865 break;
87af33fe 2866 }
a8adb832
JS
2867
2868 /* Wait for any activity on ndlps to settle */
2869 msleep(10);
87af33fe 2870 }
1151e3ec 2871 lpfc_cleanup_vports_rrqs(vport, NULL);
dea3101e 2872}
2873
e59058c4 2874/**
3621a710 2875 * lpfc_stop_vport_timers - Stop all the timers associated with a vport
e59058c4
JS
2876 * @vport: pointer to a virtual N_Port data structure.
2877 *
2878 * This routine stops all the timers associated with a @vport. This function
2879 * is invoked before disabling or deleting a @vport. Note that the physical
2880 * port is treated as @vport 0.
2881 **/
92d7f7b0
JS
2882void
2883lpfc_stop_vport_timers(struct lpfc_vport *vport)
dea3101e 2884{
92d7f7b0 2885 del_timer_sync(&vport->els_tmofunc);
92494144 2886 del_timer_sync(&vport->delayed_disc_tmo);
92d7f7b0
JS
2887 lpfc_can_disctmo(vport);
2888 return;
dea3101e 2889}
2890
ecfd03c6
JS
2891/**
2892 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2893 * @phba: pointer to lpfc hba data structure.
2894 *
2895 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The
2896 * caller of this routine should already hold the host lock.
2897 **/
2898void
2899__lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2900{
5ac6b303
JS
2901 /* Clear pending FCF rediscovery wait flag */
2902 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
2903
ecfd03c6
JS
2904 /* Now, try to stop the timer */
2905 del_timer(&phba->fcf.redisc_wait);
2906}
2907
2908/**
2909 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2910 * @phba: pointer to lpfc hba data structure.
2911 *
2912 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It
2913 * checks whether the FCF rediscovery wait timer is pending with the host
2914 * lock held before proceeding with disabling the timer and clearing the
2915 * wait timer pendig flag.
2916 **/
2917void
2918lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2919{
2920 spin_lock_irq(&phba->hbalock);
2921 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
2922 /* FCF rediscovery timer already fired or stopped */
2923 spin_unlock_irq(&phba->hbalock);
2924 return;
2925 }
2926 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
5ac6b303
JS
2927 /* Clear failover in progress flags */
2928 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC);
ecfd03c6
JS
2929 spin_unlock_irq(&phba->hbalock);
2930}
2931
e59058c4 2932/**
3772a991 2933 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA
e59058c4
JS
2934 * @phba: pointer to lpfc hba data structure.
2935 *
2936 * This routine stops all the timers associated with a HBA. This function is
2937 * invoked before either putting a HBA offline or unloading the driver.
2938 **/
3772a991
JS
2939void
2940lpfc_stop_hba_timers(struct lpfc_hba *phba)
dea3101e 2941{
cdb42bec
JS
2942 if (phba->pport)
2943 lpfc_stop_vport_timers(phba->pport);
32517fc0 2944 cancel_delayed_work_sync(&phba->eq_delay_work);
2e0fef85 2945 del_timer_sync(&phba->sli.mbox_tmo);
92d7f7b0 2946 del_timer_sync(&phba->fabric_block_timer);
9399627f 2947 del_timer_sync(&phba->eratt_poll);
3772a991 2948 del_timer_sync(&phba->hb_tmofunc);
1151e3ec
JS
2949 if (phba->sli_rev == LPFC_SLI_REV4) {
2950 del_timer_sync(&phba->rrq_tmr);
2951 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
2952 }
3772a991
JS
2953 phba->hb_outstanding = 0;
2954
2955 switch (phba->pci_dev_grp) {
2956 case LPFC_PCI_DEV_LP:
2957 /* Stop any LightPulse device specific driver timers */
2958 del_timer_sync(&phba->fcp_poll_timer);
2959 break;
2960 case LPFC_PCI_DEV_OC:
2961 /* Stop any OneConnect device sepcific driver timers */
ecfd03c6 2962 lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3772a991
JS
2963 break;
2964 default:
2965 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2966 "0297 Invalid device group (x%x)\n",
2967 phba->pci_dev_grp);
2968 break;
2969 }
2e0fef85 2970 return;
dea3101e 2971}
2972
e59058c4 2973/**
3621a710 2974 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked
e59058c4
JS
2975 * @phba: pointer to lpfc hba data structure.
2976 *
2977 * This routine marks a HBA's management interface as blocked. Once the HBA's
2978 * management interface is marked as blocked, all the user space access to
2979 * the HBA, whether they are from sysfs interface or libdfc interface will
2980 * all be blocked. The HBA is set to block the management interface when the
2981 * driver prepares the HBA interface for online or offline.
2982 **/
a6ababd2 2983static void
618a5230 2984lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action)
a6ababd2
AB
2985{
2986 unsigned long iflag;
6e7288d9
JS
2987 uint8_t actcmd = MBX_HEARTBEAT;
2988 unsigned long timeout;
2989
a6ababd2
AB
2990 spin_lock_irqsave(&phba->hbalock, iflag);
2991 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO;
618a5230
JS
2992 spin_unlock_irqrestore(&phba->hbalock, iflag);
2993 if (mbx_action == LPFC_MBX_NO_WAIT)
2994 return;
2995 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
2996 spin_lock_irqsave(&phba->hbalock, iflag);
a183a15f 2997 if (phba->sli.mbox_active) {
6e7288d9 2998 actcmd = phba->sli.mbox_active->u.mb.mbxCommand;
a183a15f
JS
2999 /* Determine how long we might wait for the active mailbox
3000 * command to be gracefully completed by firmware.
3001 */
3002 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
3003 phba->sli.mbox_active) * 1000) + jiffies;
3004 }
a6ababd2 3005 spin_unlock_irqrestore(&phba->hbalock, iflag);
a183a15f 3006
6e7288d9
JS
3007 /* Wait for the outstnading mailbox command to complete */
3008 while (phba->sli.mbox_active) {
3009 /* Check active mailbox complete status every 2ms */
3010 msleep(2);
3011 if (time_after(jiffies, timeout)) {
3012 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3013 "2813 Mgmt IO is Blocked %x "
3014 "- mbox cmd %x still active\n",
3015 phba->sli.sli_flag, actcmd);
3016 break;
3017 }
3018 }
a6ababd2
AB
3019}
3020
6b5151fd
JS
3021/**
3022 * lpfc_sli4_node_prep - Assign RPIs for active nodes.
3023 * @phba: pointer to lpfc hba data structure.
3024 *
3025 * Allocate RPIs for all active remote nodes. This is needed whenever
3026 * an SLI4 adapter is reset and the driver is not unloading. Its purpose
3027 * is to fixup the temporary rpi assignments.
3028 **/
3029void
3030lpfc_sli4_node_prep(struct lpfc_hba *phba)
3031{
3032 struct lpfc_nodelist *ndlp, *next_ndlp;
3033 struct lpfc_vport **vports;
9d3d340d
JS
3034 int i, rpi;
3035 unsigned long flags;
6b5151fd
JS
3036
3037 if (phba->sli_rev != LPFC_SLI_REV4)
3038 return;
3039
3040 vports = lpfc_create_vport_work_array(phba);
9d3d340d
JS
3041 if (vports == NULL)
3042 return;
6b5151fd 3043
9d3d340d
JS
3044 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3045 if (vports[i]->load_flag & FC_UNLOADING)
3046 continue;
3047
3048 list_for_each_entry_safe(ndlp, next_ndlp,
3049 &vports[i]->fc_nodes,
3050 nlp_listp) {
3051 if (!NLP_CHK_NODE_ACT(ndlp))
3052 continue;
3053 rpi = lpfc_sli4_alloc_rpi(phba);
3054 if (rpi == LPFC_RPI_ALLOC_ERROR) {
3055 spin_lock_irqsave(&phba->ndlp_lock, flags);
3056 NLP_CLR_NODE_ACT(ndlp);
3057 spin_unlock_irqrestore(&phba->ndlp_lock, flags);
3058 continue;
6b5151fd 3059 }
9d3d340d
JS
3060 ndlp->nlp_rpi = rpi;
3061 lpfc_printf_vlog(ndlp->vport, KERN_INFO, LOG_NODE,
3062 "0009 rpi:%x DID:%x "
3063 "flg:%x map:%x %p\n", ndlp->nlp_rpi,
3064 ndlp->nlp_DID, ndlp->nlp_flag,
3065 ndlp->nlp_usg_map, ndlp);
6b5151fd
JS
3066 }
3067 }
3068 lpfc_destroy_vport_work_array(phba, vports);
3069}
3070
c490850a
JS
3071/**
3072 * lpfc_create_expedite_pool - create expedite pool
3073 * @phba: pointer to lpfc hba data structure.
3074 *
3075 * This routine moves a batch of XRIs from lpfc_io_buf_list_put of HWQ 0
3076 * to expedite pool. Mark them as expedite.
3077 **/
3078void lpfc_create_expedite_pool(struct lpfc_hba *phba)
3079{
3080 struct lpfc_sli4_hdw_queue *qp;
3081 struct lpfc_io_buf *lpfc_ncmd;
3082 struct lpfc_io_buf *lpfc_ncmd_next;
3083 struct lpfc_epd_pool *epd_pool;
3084 unsigned long iflag;
3085
3086 epd_pool = &phba->epd_pool;
3087 qp = &phba->sli4_hba.hdwq[0];
3088
3089 spin_lock_init(&epd_pool->lock);
3090 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3091 spin_lock(&epd_pool->lock);
3092 INIT_LIST_HEAD(&epd_pool->list);
3093 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3094 &qp->lpfc_io_buf_list_put, list) {
3095 list_move_tail(&lpfc_ncmd->list, &epd_pool->list);
3096 lpfc_ncmd->expedite = true;
3097 qp->put_io_bufs--;
3098 epd_pool->count++;
3099 if (epd_pool->count >= XRI_BATCH)
3100 break;
3101 }
3102 spin_unlock(&epd_pool->lock);
3103 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3104}
3105
3106/**
3107 * lpfc_destroy_expedite_pool - destroy expedite pool
3108 * @phba: pointer to lpfc hba data structure.
3109 *
3110 * This routine returns XRIs from expedite pool to lpfc_io_buf_list_put
3111 * of HWQ 0. Clear the mark.
3112 **/
3113void lpfc_destroy_expedite_pool(struct lpfc_hba *phba)
3114{
3115 struct lpfc_sli4_hdw_queue *qp;
3116 struct lpfc_io_buf *lpfc_ncmd;
3117 struct lpfc_io_buf *lpfc_ncmd_next;
3118 struct lpfc_epd_pool *epd_pool;
3119 unsigned long iflag;
3120
3121 epd_pool = &phba->epd_pool;
3122 qp = &phba->sli4_hba.hdwq[0];
3123
3124 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3125 spin_lock(&epd_pool->lock);
3126 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3127 &epd_pool->list, list) {
3128 list_move_tail(&lpfc_ncmd->list,
3129 &qp->lpfc_io_buf_list_put);
3130 lpfc_ncmd->flags = false;
3131 qp->put_io_bufs++;
3132 epd_pool->count--;
3133 }
3134 spin_unlock(&epd_pool->lock);
3135 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3136}
3137
3138/**
3139 * lpfc_create_multixri_pools - create multi-XRI pools
3140 * @phba: pointer to lpfc hba data structure.
3141 *
3142 * This routine initialize public, private per HWQ. Then, move XRIs from
3143 * lpfc_io_buf_list_put to public pool. High and low watermark are also
3144 * Initialized.
3145 **/
3146void lpfc_create_multixri_pools(struct lpfc_hba *phba)
3147{
3148 u32 i, j;
3149 u32 hwq_count;
3150 u32 count_per_hwq;
3151 struct lpfc_io_buf *lpfc_ncmd;
3152 struct lpfc_io_buf *lpfc_ncmd_next;
3153 unsigned long iflag;
3154 struct lpfc_sli4_hdw_queue *qp;
3155 struct lpfc_multixri_pool *multixri_pool;
3156 struct lpfc_pbl_pool *pbl_pool;
3157 struct lpfc_pvt_pool *pvt_pool;
3158
3159 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3160 "1234 num_hdw_queue=%d num_present_cpu=%d common_xri_cnt=%d\n",
3161 phba->cfg_hdw_queue, phba->sli4_hba.num_present_cpu,
3162 phba->sli4_hba.io_xri_cnt);
3163
3164 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3165 lpfc_create_expedite_pool(phba);
3166
3167 hwq_count = phba->cfg_hdw_queue;
3168 count_per_hwq = phba->sli4_hba.io_xri_cnt / hwq_count;
3169
3170 for (i = 0; i < hwq_count; i++) {
3171 multixri_pool = kzalloc(sizeof(*multixri_pool), GFP_KERNEL);
3172
3173 if (!multixri_pool) {
3174 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3175 "1238 Failed to allocate memory for "
3176 "multixri_pool\n");
3177
3178 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3179 lpfc_destroy_expedite_pool(phba);
3180
3181 j = 0;
3182 while (j < i) {
3183 qp = &phba->sli4_hba.hdwq[j];
3184 kfree(qp->p_multixri_pool);
3185 j++;
3186 }
3187 phba->cfg_xri_rebalancing = 0;
3188 return;
3189 }
3190
3191 qp = &phba->sli4_hba.hdwq[i];
3192 qp->p_multixri_pool = multixri_pool;
3193
3194 multixri_pool->xri_limit = count_per_hwq;
3195 multixri_pool->rrb_next_hwqid = i;
3196
3197 /* Deal with public free xri pool */
3198 pbl_pool = &multixri_pool->pbl_pool;
3199 spin_lock_init(&pbl_pool->lock);
3200 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3201 spin_lock(&pbl_pool->lock);
3202 INIT_LIST_HEAD(&pbl_pool->list);
3203 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3204 &qp->lpfc_io_buf_list_put, list) {
3205 list_move_tail(&lpfc_ncmd->list, &pbl_pool->list);
3206 qp->put_io_bufs--;
3207 pbl_pool->count++;
3208 }
3209 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3210 "1235 Moved %d buffers from PUT list over to pbl_pool[%d]\n",
3211 pbl_pool->count, i);
3212 spin_unlock(&pbl_pool->lock);
3213 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3214
3215 /* Deal with private free xri pool */
3216 pvt_pool = &multixri_pool->pvt_pool;
3217 pvt_pool->high_watermark = multixri_pool->xri_limit / 2;
3218 pvt_pool->low_watermark = XRI_BATCH;
3219 spin_lock_init(&pvt_pool->lock);
3220 spin_lock_irqsave(&pvt_pool->lock, iflag);
3221 INIT_LIST_HEAD(&pvt_pool->list);
3222 pvt_pool->count = 0;
3223 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
3224 }
3225}
3226
3227/**
3228 * lpfc_destroy_multixri_pools - destroy multi-XRI pools
3229 * @phba: pointer to lpfc hba data structure.
3230 *
3231 * This routine returns XRIs from public/private to lpfc_io_buf_list_put.
3232 **/
3233void lpfc_destroy_multixri_pools(struct lpfc_hba *phba)
3234{
3235 u32 i;
3236 u32 hwq_count;
3237 struct lpfc_io_buf *lpfc_ncmd;
3238 struct lpfc_io_buf *lpfc_ncmd_next;
3239 unsigned long iflag;
3240 struct lpfc_sli4_hdw_queue *qp;
3241 struct lpfc_multixri_pool *multixri_pool;
3242 struct lpfc_pbl_pool *pbl_pool;
3243 struct lpfc_pvt_pool *pvt_pool;
3244
3245 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3246 lpfc_destroy_expedite_pool(phba);
3247
3248 hwq_count = phba->cfg_hdw_queue;
3249
3250 for (i = 0; i < hwq_count; i++) {
3251 qp = &phba->sli4_hba.hdwq[i];
3252 multixri_pool = qp->p_multixri_pool;
3253 if (!multixri_pool)
3254 continue;
3255
3256 qp->p_multixri_pool = NULL;
3257
3258 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3259
3260 /* Deal with public free xri pool */
3261 pbl_pool = &multixri_pool->pbl_pool;
3262 spin_lock(&pbl_pool->lock);
3263
3264 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3265 "1236 Moving %d buffers from pbl_pool[%d] TO PUT list\n",
3266 pbl_pool->count, i);
3267
3268 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3269 &pbl_pool->list, list) {
3270 list_move_tail(&lpfc_ncmd->list,
3271 &qp->lpfc_io_buf_list_put);
3272 qp->put_io_bufs++;
3273 pbl_pool->count--;
3274 }
3275
3276 INIT_LIST_HEAD(&pbl_pool->list);
3277 pbl_pool->count = 0;
3278
3279 spin_unlock(&pbl_pool->lock);
3280
3281 /* Deal with private free xri pool */
3282 pvt_pool = &multixri_pool->pvt_pool;
3283 spin_lock(&pvt_pool->lock);
3284
3285 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3286 "1237 Moving %d buffers from pvt_pool[%d] TO PUT list\n",
3287 pvt_pool->count, i);
3288
3289 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3290 &pvt_pool->list, list) {
3291 list_move_tail(&lpfc_ncmd->list,
3292 &qp->lpfc_io_buf_list_put);
3293 qp->put_io_bufs++;
3294 pvt_pool->count--;
3295 }
3296
3297 INIT_LIST_HEAD(&pvt_pool->list);
3298 pvt_pool->count = 0;
3299
3300 spin_unlock(&pvt_pool->lock);
3301 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3302
3303 kfree(multixri_pool);
3304 }
3305}
3306
e59058c4 3307/**
3621a710 3308 * lpfc_online - Initialize and bring a HBA online
e59058c4
JS
3309 * @phba: pointer to lpfc hba data structure.
3310 *
3311 * This routine initializes the HBA and brings a HBA online. During this
3312 * process, the management interface is blocked to prevent user space access
3313 * to the HBA interfering with the driver initialization.
3314 *
3315 * Return codes
3316 * 0 - successful
3317 * 1 - failed
3318 **/
dea3101e 3319int
2e0fef85 3320lpfc_online(struct lpfc_hba *phba)
dea3101e 3321{
372bd282 3322 struct lpfc_vport *vport;
549e55cd 3323 struct lpfc_vport **vports;
a145fda3 3324 int i, error = 0;
16a3a208 3325 bool vpis_cleared = false;
2e0fef85 3326
dea3101e 3327 if (!phba)
3328 return 0;
372bd282 3329 vport = phba->pport;
dea3101e 3330
2e0fef85 3331 if (!(vport->fc_flag & FC_OFFLINE_MODE))
dea3101e 3332 return 0;
3333
ed957684 3334 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 3335 "0458 Bring Adapter online\n");
dea3101e 3336
618a5230 3337 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
46fa311e 3338
da0436e9
JS
3339 if (phba->sli_rev == LPFC_SLI_REV4) {
3340 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */
3341 lpfc_unblock_mgmt_io(phba);
3342 return 1;
3343 }
16a3a208
JS
3344 spin_lock_irq(&phba->hbalock);
3345 if (!phba->sli4_hba.max_cfg_param.vpi_used)
3346 vpis_cleared = true;
3347 spin_unlock_irq(&phba->hbalock);
a145fda3
DK
3348
3349 /* Reestablish the local initiator port.
3350 * The offline process destroyed the previous lport.
3351 */
3352 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME &&
3353 !phba->nvmet_support) {
3354 error = lpfc_nvme_create_localport(phba->pport);
3355 if (error)
3356 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
3357 "6132 NVME restore reg failed "
3358 "on nvmei error x%x\n", error);
3359 }
da0436e9 3360 } else {
895427bd 3361 lpfc_sli_queue_init(phba);
da0436e9
JS
3362 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */
3363 lpfc_unblock_mgmt_io(phba);
3364 return 1;
3365 }
46fa311e 3366 }
dea3101e 3367
549e55cd 3368 vports = lpfc_create_vport_work_array(phba);
aeb6641f 3369 if (vports != NULL) {
da0436e9 3370 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd
JS
3371 struct Scsi_Host *shost;
3372 shost = lpfc_shost_from_vport(vports[i]);
3373 spin_lock_irq(shost->host_lock);
3374 vports[i]->fc_flag &= ~FC_OFFLINE_MODE;
3375 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)
3376 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
16a3a208 3377 if (phba->sli_rev == LPFC_SLI_REV4) {
1c6834a7 3378 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI;
16a3a208
JS
3379 if ((vpis_cleared) &&
3380 (vports[i]->port_type !=
3381 LPFC_PHYSICAL_PORT))
3382 vports[i]->vpi = 0;
3383 }
549e55cd
JS
3384 spin_unlock_irq(shost->host_lock);
3385 }
aeb6641f
AB
3386 }
3387 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3388
c490850a
JS
3389 if (phba->cfg_xri_rebalancing)
3390 lpfc_create_multixri_pools(phba);
3391
46fa311e 3392 lpfc_unblock_mgmt_io(phba);
dea3101e 3393 return 0;
3394}
3395
e59058c4 3396/**
3621a710 3397 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked
e59058c4
JS
3398 * @phba: pointer to lpfc hba data structure.
3399 *
3400 * This routine marks a HBA's management interface as not blocked. Once the
3401 * HBA's management interface is marked as not blocked, all the user space
3402 * access to the HBA, whether they are from sysfs interface or libdfc
3403 * interface will be allowed. The HBA is set to block the management interface
3404 * when the driver prepares the HBA interface for online or offline and then
3405 * set to unblock the management interface afterwards.
3406 **/
46fa311e
JS
3407void
3408lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
3409{
3410 unsigned long iflag;
3411
2e0fef85
JS
3412 spin_lock_irqsave(&phba->hbalock, iflag);
3413 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO;
3414 spin_unlock_irqrestore(&phba->hbalock, iflag);
46fa311e
JS
3415}
3416
e59058c4 3417/**
3621a710 3418 * lpfc_offline_prep - Prepare a HBA to be brought offline
e59058c4
JS
3419 * @phba: pointer to lpfc hba data structure.
3420 *
3421 * This routine is invoked to prepare a HBA to be brought offline. It performs
3422 * unregistration login to all the nodes on all vports and flushes the mailbox
3423 * queue to make it ready to be brought offline.
3424 **/
46fa311e 3425void
618a5230 3426lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action)
46fa311e 3427{
2e0fef85 3428 struct lpfc_vport *vport = phba->pport;
46fa311e 3429 struct lpfc_nodelist *ndlp, *next_ndlp;
87af33fe 3430 struct lpfc_vport **vports;
72100cc4 3431 struct Scsi_Host *shost;
87af33fe 3432 int i;
dea3101e 3433
2e0fef85 3434 if (vport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3435 return;
dea3101e 3436
618a5230 3437 lpfc_block_mgmt_io(phba, mbx_action);
dea3101e 3438
3439 lpfc_linkdown(phba);
3440
87af33fe
JS
3441 /* Issue an unreg_login to all nodes on all vports */
3442 vports = lpfc_create_vport_work_array(phba);
3443 if (vports != NULL) {
da0436e9 3444 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
a8adb832
JS
3445 if (vports[i]->load_flag & FC_UNLOADING)
3446 continue;
72100cc4
JS
3447 shost = lpfc_shost_from_vport(vports[i]);
3448 spin_lock_irq(shost->host_lock);
c868595d 3449 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
695a814e
JS
3450 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
3451 vports[i]->fc_flag &= ~FC_VFI_REGISTERED;
72100cc4 3452 spin_unlock_irq(shost->host_lock);
695a814e 3453
87af33fe
JS
3454 shost = lpfc_shost_from_vport(vports[i]);
3455 list_for_each_entry_safe(ndlp, next_ndlp,
3456 &vports[i]->fc_nodes,
3457 nlp_listp) {
e47c9093
JS
3458 if (!NLP_CHK_NODE_ACT(ndlp))
3459 continue;
87af33fe
JS
3460 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE)
3461 continue;
3462 if (ndlp->nlp_type & NLP_FABRIC) {
3463 lpfc_disc_state_machine(vports[i], ndlp,
3464 NULL, NLP_EVT_DEVICE_RECOVERY);
3465 lpfc_disc_state_machine(vports[i], ndlp,
3466 NULL, NLP_EVT_DEVICE_RM);
3467 }
3468 spin_lock_irq(shost->host_lock);
3469 ndlp->nlp_flag &= ~NLP_NPR_ADISC;
401ee0c1 3470 spin_unlock_irq(shost->host_lock);
6b5151fd
JS
3471 /*
3472 * Whenever an SLI4 port goes offline, free the
401ee0c1
JS
3473 * RPI. Get a new RPI when the adapter port
3474 * comes back online.
6b5151fd 3475 */
be6bb941
JS
3476 if (phba->sli_rev == LPFC_SLI_REV4) {
3477 lpfc_printf_vlog(ndlp->vport,
3478 KERN_INFO, LOG_NODE,
3479 "0011 lpfc_offline: "
3480 "ndlp:x%p did %x "
3481 "usgmap:x%x rpi:%x\n",
3482 ndlp, ndlp->nlp_DID,
3483 ndlp->nlp_usg_map,
3484 ndlp->nlp_rpi);
3485
6b5151fd 3486 lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi);
be6bb941 3487 }
87af33fe
JS
3488 lpfc_unreg_rpi(vports[i], ndlp);
3489 }
3490 }
3491 }
09372820 3492 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3493
618a5230 3494 lpfc_sli_mbox_sys_shutdown(phba, mbx_action);
f485c18d
DK
3495
3496 if (phba->wq)
3497 flush_workqueue(phba->wq);
46fa311e
JS
3498}
3499
e59058c4 3500/**
3621a710 3501 * lpfc_offline - Bring a HBA offline
e59058c4
JS
3502 * @phba: pointer to lpfc hba data structure.
3503 *
3504 * This routine actually brings a HBA offline. It stops all the timers
3505 * associated with the HBA, brings down the SLI layer, and eventually
3506 * marks the HBA as in offline state for the upper layer protocol.
3507 **/
46fa311e 3508void
2e0fef85 3509lpfc_offline(struct lpfc_hba *phba)
46fa311e 3510{
549e55cd
JS
3511 struct Scsi_Host *shost;
3512 struct lpfc_vport **vports;
3513 int i;
46fa311e 3514
549e55cd 3515 if (phba->pport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3516 return;
688a8863 3517
da0436e9
JS
3518 /* stop port and all timers associated with this hba */
3519 lpfc_stop_port(phba);
4b40d02b
DK
3520
3521 /* Tear down the local and target port registrations. The
3522 * nvme transports need to cleanup.
3523 */
3524 lpfc_nvmet_destroy_targetport(phba);
3525 lpfc_nvme_destroy_localport(phba->pport);
3526
51ef4c26
JS
3527 vports = lpfc_create_vport_work_array(phba);
3528 if (vports != NULL)
da0436e9 3529 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
51ef4c26 3530 lpfc_stop_vport_timers(vports[i]);
09372820 3531 lpfc_destroy_vport_work_array(phba, vports);
92d7f7b0 3532 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 3533 "0460 Bring Adapter offline\n");
dea3101e 3534 /* Bring down the SLI Layer and cleanup. The HBA is offline
3535 now. */
3536 lpfc_sli_hba_down(phba);
92d7f7b0 3537 spin_lock_irq(&phba->hbalock);
7054a606 3538 phba->work_ha = 0;
92d7f7b0 3539 spin_unlock_irq(&phba->hbalock);
549e55cd
JS
3540 vports = lpfc_create_vport_work_array(phba);
3541 if (vports != NULL)
da0436e9 3542 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd 3543 shost = lpfc_shost_from_vport(vports[i]);
549e55cd
JS
3544 spin_lock_irq(shost->host_lock);
3545 vports[i]->work_port_events = 0;
3546 vports[i]->fc_flag |= FC_OFFLINE_MODE;
3547 spin_unlock_irq(shost->host_lock);
3548 }
09372820 3549 lpfc_destroy_vport_work_array(phba, vports);
c490850a
JS
3550
3551 if (phba->cfg_xri_rebalancing)
3552 lpfc_destroy_multixri_pools(phba);
dea3101e 3553}
3554
e59058c4 3555/**
3621a710 3556 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists
e59058c4
JS
3557 * @phba: pointer to lpfc hba data structure.
3558 *
3559 * This routine is to free all the SCSI buffers and IOCBs from the driver
3560 * list back to kernel. It is called from lpfc_pci_remove_one to free
3561 * the internal resources before the device is removed from the system.
e59058c4 3562 **/
8a9d2e80 3563static void
2e0fef85 3564lpfc_scsi_free(struct lpfc_hba *phba)
dea3101e 3565{
c490850a 3566 struct lpfc_io_buf *sb, *sb_next;
dea3101e 3567
895427bd
JS
3568 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3569 return;
3570
2e0fef85 3571 spin_lock_irq(&phba->hbalock);
a40fc5f0 3572
dea3101e 3573 /* Release all the lpfc_scsi_bufs maintained by this host. */
a40fc5f0
JS
3574
3575 spin_lock(&phba->scsi_buf_list_put_lock);
3576 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put,
3577 list) {
dea3101e 3578 list_del(&sb->list);
771db5c0 3579 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3580 sb->dma_handle);
dea3101e 3581 kfree(sb);
3582 phba->total_scsi_bufs--;
3583 }
a40fc5f0
JS
3584 spin_unlock(&phba->scsi_buf_list_put_lock);
3585
3586 spin_lock(&phba->scsi_buf_list_get_lock);
3587 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get,
3588 list) {
dea3101e 3589 list_del(&sb->list);
771db5c0 3590 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3591 sb->dma_handle);
dea3101e 3592 kfree(sb);
3593 phba->total_scsi_bufs--;
3594 }
a40fc5f0 3595 spin_unlock(&phba->scsi_buf_list_get_lock);
2e0fef85 3596 spin_unlock_irq(&phba->hbalock);
8a9d2e80 3597}
0794d601 3598
895427bd 3599/**
5e5b511d 3600 * lpfc_io_free - Free all the IO buffers and IOCBs from driver lists
895427bd
JS
3601 * @phba: pointer to lpfc hba data structure.
3602 *
0794d601 3603 * This routine is to free all the IO buffers and IOCBs from the driver
895427bd
JS
3604 * list back to kernel. It is called from lpfc_pci_remove_one to free
3605 * the internal resources before the device is removed from the system.
3606 **/
c490850a 3607void
5e5b511d 3608lpfc_io_free(struct lpfc_hba *phba)
895427bd 3609{
c490850a 3610 struct lpfc_io_buf *lpfc_ncmd, *lpfc_ncmd_next;
5e5b511d
JS
3611 struct lpfc_sli4_hdw_queue *qp;
3612 int idx;
895427bd 3613
895427bd
JS
3614 spin_lock_irq(&phba->hbalock);
3615
5e5b511d
JS
3616 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
3617 qp = &phba->sli4_hba.hdwq[idx];
3618 /* Release all the lpfc_nvme_bufs maintained by this host. */
3619 spin_lock(&qp->io_buf_list_put_lock);
3620 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3621 &qp->lpfc_io_buf_list_put,
3622 list) {
3623 list_del(&lpfc_ncmd->list);
3624 qp->put_io_bufs--;
3625 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
3626 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
3627 kfree(lpfc_ncmd);
3628 qp->total_io_bufs--;
3629 }
3630 spin_unlock(&qp->io_buf_list_put_lock);
3631
3632 spin_lock(&qp->io_buf_list_get_lock);
3633 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3634 &qp->lpfc_io_buf_list_get,
3635 list) {
3636 list_del(&lpfc_ncmd->list);
3637 qp->get_io_bufs--;
3638 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
3639 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
3640 kfree(lpfc_ncmd);
3641 qp->total_io_bufs--;
3642 }
3643 spin_unlock(&qp->io_buf_list_get_lock);
895427bd 3644 }
895427bd 3645
895427bd
JS
3646 spin_unlock_irq(&phba->hbalock);
3647}
0794d601 3648
8a9d2e80 3649/**
895427bd 3650 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping
8a9d2e80
JS
3651 * @phba: pointer to lpfc hba data structure.
3652 *
3653 * This routine first calculates the sizes of the current els and allocated
3654 * scsi sgl lists, and then goes through all sgls to updates the physical
3655 * XRIs assigned due to port function reset. During port initialization, the
3656 * current els and allocated scsi sgl lists are 0s.
3657 *
3658 * Return codes
3659 * 0 - successful (for now, it always returns 0)
3660 **/
3661int
895427bd 3662lpfc_sli4_els_sgl_update(struct lpfc_hba *phba)
8a9d2e80
JS
3663{
3664 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
895427bd 3665 uint16_t i, lxri, xri_cnt, els_xri_cnt;
8a9d2e80 3666 LIST_HEAD(els_sgl_list);
8a9d2e80
JS
3667 int rc;
3668
3669 /*
3670 * update on pci function's els xri-sgl list
3671 */
3672 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
895427bd 3673
8a9d2e80
JS
3674 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
3675 /* els xri-sgl expanded */
3676 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
3677 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3678 "3157 ELS xri-sgl count increased from "
3679 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3680 els_xri_cnt);
3681 /* allocate the additional els sgls */
3682 for (i = 0; i < xri_cnt; i++) {
3683 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3684 GFP_KERNEL);
3685 if (sglq_entry == NULL) {
3686 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3687 "2562 Failure to allocate an "
3688 "ELS sgl entry:%d\n", i);
3689 rc = -ENOMEM;
3690 goto out_free_mem;
3691 }
3692 sglq_entry->buff_type = GEN_BUFF_TYPE;
3693 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0,
3694 &sglq_entry->phys);
3695 if (sglq_entry->virt == NULL) {
3696 kfree(sglq_entry);
3697 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3698 "2563 Failure to allocate an "
3699 "ELS mbuf:%d\n", i);
3700 rc = -ENOMEM;
3701 goto out_free_mem;
3702 }
3703 sglq_entry->sgl = sglq_entry->virt;
3704 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE);
3705 sglq_entry->state = SGL_FREED;
3706 list_add_tail(&sglq_entry->list, &els_sgl_list);
3707 }
38c20673 3708 spin_lock_irq(&phba->hbalock);
895427bd
JS
3709 spin_lock(&phba->sli4_hba.sgl_list_lock);
3710 list_splice_init(&els_sgl_list,
3711 &phba->sli4_hba.lpfc_els_sgl_list);
3712 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 3713 spin_unlock_irq(&phba->hbalock);
8a9d2e80
JS
3714 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
3715 /* els xri-sgl shrinked */
3716 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
3717 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3718 "3158 ELS xri-sgl count decreased from "
3719 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3720 els_xri_cnt);
3721 spin_lock_irq(&phba->hbalock);
895427bd
JS
3722 spin_lock(&phba->sli4_hba.sgl_list_lock);
3723 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list,
3724 &els_sgl_list);
8a9d2e80
JS
3725 /* release extra els sgls from list */
3726 for (i = 0; i < xri_cnt; i++) {
3727 list_remove_head(&els_sgl_list,
3728 sglq_entry, struct lpfc_sglq, list);
3729 if (sglq_entry) {
895427bd
JS
3730 __lpfc_mbuf_free(phba, sglq_entry->virt,
3731 sglq_entry->phys);
8a9d2e80
JS
3732 kfree(sglq_entry);
3733 }
3734 }
895427bd
JS
3735 list_splice_init(&els_sgl_list,
3736 &phba->sli4_hba.lpfc_els_sgl_list);
3737 spin_unlock(&phba->sli4_hba.sgl_list_lock);
8a9d2e80
JS
3738 spin_unlock_irq(&phba->hbalock);
3739 } else
3740 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3741 "3163 ELS xri-sgl count unchanged: %d\n",
3742 els_xri_cnt);
3743 phba->sli4_hba.els_xri_cnt = els_xri_cnt;
3744
3745 /* update xris to els sgls on the list */
3746 sglq_entry = NULL;
3747 sglq_entry_next = NULL;
3748 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
895427bd 3749 &phba->sli4_hba.lpfc_els_sgl_list, list) {
8a9d2e80
JS
3750 lxri = lpfc_sli4_next_xritag(phba);
3751 if (lxri == NO_XRI) {
3752 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3753 "2400 Failed to allocate xri for "
3754 "ELS sgl\n");
3755 rc = -ENOMEM;
3756 goto out_free_mem;
3757 }
3758 sglq_entry->sli4_lxritag = lxri;
3759 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3760 }
895427bd
JS
3761 return 0;
3762
3763out_free_mem:
3764 lpfc_free_els_sgl_list(phba);
3765 return rc;
3766}
3767
f358dd0c
JS
3768/**
3769 * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping
3770 * @phba: pointer to lpfc hba data structure.
3771 *
3772 * This routine first calculates the sizes of the current els and allocated
3773 * scsi sgl lists, and then goes through all sgls to updates the physical
3774 * XRIs assigned due to port function reset. During port initialization, the
3775 * current els and allocated scsi sgl lists are 0s.
3776 *
3777 * Return codes
3778 * 0 - successful (for now, it always returns 0)
3779 **/
3780int
3781lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba)
3782{
3783 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
3784 uint16_t i, lxri, xri_cnt, els_xri_cnt;
6c621a22 3785 uint16_t nvmet_xri_cnt;
f358dd0c
JS
3786 LIST_HEAD(nvmet_sgl_list);
3787 int rc;
3788
3789 /*
3790 * update on pci function's nvmet xri-sgl list
3791 */
3792 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
61f3d4bf 3793
6c621a22
JS
3794 /* For NVMET, ALL remaining XRIs are dedicated for IO processing */
3795 nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
f358dd0c
JS
3796 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) {
3797 /* els xri-sgl expanded */
3798 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt;
3799 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3800 "6302 NVMET xri-sgl cnt grew from %d to %d\n",
3801 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt);
3802 /* allocate the additional nvmet sgls */
3803 for (i = 0; i < xri_cnt; i++) {
3804 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3805 GFP_KERNEL);
3806 if (sglq_entry == NULL) {
3807 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3808 "6303 Failure to allocate an "
3809 "NVMET sgl entry:%d\n", i);
3810 rc = -ENOMEM;
3811 goto out_free_mem;
3812 }
3813 sglq_entry->buff_type = NVMET_BUFF_TYPE;
3814 sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0,
3815 &sglq_entry->phys);
3816 if (sglq_entry->virt == NULL) {
3817 kfree(sglq_entry);
3818 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3819 "6304 Failure to allocate an "
3820 "NVMET buf:%d\n", i);
3821 rc = -ENOMEM;
3822 goto out_free_mem;
3823 }
3824 sglq_entry->sgl = sglq_entry->virt;
3825 memset(sglq_entry->sgl, 0,
3826 phba->cfg_sg_dma_buf_size);
3827 sglq_entry->state = SGL_FREED;
3828 list_add_tail(&sglq_entry->list, &nvmet_sgl_list);
3829 }
3830 spin_lock_irq(&phba->hbalock);
3831 spin_lock(&phba->sli4_hba.sgl_list_lock);
3832 list_splice_init(&nvmet_sgl_list,
3833 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3834 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3835 spin_unlock_irq(&phba->hbalock);
3836 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) {
3837 /* nvmet xri-sgl shrunk */
3838 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt;
3839 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3840 "6305 NVMET xri-sgl count decreased from "
3841 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt,
3842 nvmet_xri_cnt);
3843 spin_lock_irq(&phba->hbalock);
3844 spin_lock(&phba->sli4_hba.sgl_list_lock);
3845 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list,
3846 &nvmet_sgl_list);
3847 /* release extra nvmet sgls from list */
3848 for (i = 0; i < xri_cnt; i++) {
3849 list_remove_head(&nvmet_sgl_list,
3850 sglq_entry, struct lpfc_sglq, list);
3851 if (sglq_entry) {
3852 lpfc_nvmet_buf_free(phba, sglq_entry->virt,
3853 sglq_entry->phys);
3854 kfree(sglq_entry);
3855 }
3856 }
3857 list_splice_init(&nvmet_sgl_list,
3858 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3859 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3860 spin_unlock_irq(&phba->hbalock);
3861 } else
3862 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3863 "6306 NVMET xri-sgl count unchanged: %d\n",
3864 nvmet_xri_cnt);
3865 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt;
3866
3867 /* update xris to nvmet sgls on the list */
3868 sglq_entry = NULL;
3869 sglq_entry_next = NULL;
3870 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
3871 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) {
3872 lxri = lpfc_sli4_next_xritag(phba);
3873 if (lxri == NO_XRI) {
3874 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3875 "6307 Failed to allocate xri for "
3876 "NVMET sgl\n");
3877 rc = -ENOMEM;
3878 goto out_free_mem;
3879 }
3880 sglq_entry->sli4_lxritag = lxri;
3881 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3882 }
3883 return 0;
3884
3885out_free_mem:
3886 lpfc_free_nvmet_sgl_list(phba);
3887 return rc;
3888}
3889
5e5b511d
JS
3890int
3891lpfc_io_buf_flush(struct lpfc_hba *phba, struct list_head *cbuf)
3892{
3893 LIST_HEAD(blist);
3894 struct lpfc_sli4_hdw_queue *qp;
c490850a
JS
3895 struct lpfc_io_buf *lpfc_cmd;
3896 struct lpfc_io_buf *iobufp, *prev_iobufp;
5e5b511d
JS
3897 int idx, cnt, xri, inserted;
3898
3899 cnt = 0;
3900 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
3901 qp = &phba->sli4_hba.hdwq[idx];
3902 spin_lock_irq(&qp->io_buf_list_get_lock);
3903 spin_lock(&qp->io_buf_list_put_lock);
3904
3905 /* Take everything off the get and put lists */
3906 list_splice_init(&qp->lpfc_io_buf_list_get, &blist);
3907 list_splice(&qp->lpfc_io_buf_list_put, &blist);
3908 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get);
3909 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put);
3910 cnt += qp->get_io_bufs + qp->put_io_bufs;
3911 qp->get_io_bufs = 0;
3912 qp->put_io_bufs = 0;
3913 qp->total_io_bufs = 0;
3914 spin_unlock(&qp->io_buf_list_put_lock);
3915 spin_unlock_irq(&qp->io_buf_list_get_lock);
3916 }
3917
3918 /*
3919 * Take IO buffers off blist and put on cbuf sorted by XRI.
3920 * This is because POST_SGL takes a sequential range of XRIs
3921 * to post to the firmware.
3922 */
3923 for (idx = 0; idx < cnt; idx++) {
c490850a 3924 list_remove_head(&blist, lpfc_cmd, struct lpfc_io_buf, list);
5e5b511d
JS
3925 if (!lpfc_cmd)
3926 return cnt;
3927 if (idx == 0) {
3928 list_add_tail(&lpfc_cmd->list, cbuf);
3929 continue;
3930 }
3931 xri = lpfc_cmd->cur_iocbq.sli4_xritag;
3932 inserted = 0;
3933 prev_iobufp = NULL;
3934 list_for_each_entry(iobufp, cbuf, list) {
3935 if (xri < iobufp->cur_iocbq.sli4_xritag) {
3936 if (prev_iobufp)
3937 list_add(&lpfc_cmd->list,
3938 &prev_iobufp->list);
3939 else
3940 list_add(&lpfc_cmd->list, cbuf);
3941 inserted = 1;
3942 break;
3943 }
3944 prev_iobufp = iobufp;
3945 }
3946 if (!inserted)
3947 list_add_tail(&lpfc_cmd->list, cbuf);
3948 }
3949 return cnt;
3950}
3951
3952int
3953lpfc_io_buf_replenish(struct lpfc_hba *phba, struct list_head *cbuf)
3954{
3955 struct lpfc_sli4_hdw_queue *qp;
c490850a 3956 struct lpfc_io_buf *lpfc_cmd;
5e5b511d
JS
3957 int idx, cnt;
3958
3959 qp = phba->sli4_hba.hdwq;
3960 cnt = 0;
3961 while (!list_empty(cbuf)) {
3962 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
3963 list_remove_head(cbuf, lpfc_cmd,
c490850a 3964 struct lpfc_io_buf, list);
5e5b511d
JS
3965 if (!lpfc_cmd)
3966 return cnt;
3967 cnt++;
3968 qp = &phba->sli4_hba.hdwq[idx];
1fbf9742
JS
3969 lpfc_cmd->hdwq_no = idx;
3970 lpfc_cmd->hdwq = qp;
5e5b511d
JS
3971 lpfc_cmd->cur_iocbq.wqe_cmpl = NULL;
3972 lpfc_cmd->cur_iocbq.iocb_cmpl = NULL;
3973 spin_lock(&qp->io_buf_list_put_lock);
3974 list_add_tail(&lpfc_cmd->list,
3975 &qp->lpfc_io_buf_list_put);
3976 qp->put_io_bufs++;
3977 qp->total_io_bufs++;
3978 spin_unlock(&qp->io_buf_list_put_lock);
3979 }
3980 }
3981 return cnt;
3982}
3983
895427bd 3984/**
5e5b511d 3985 * lpfc_sli4_io_sgl_update - update xri-sgl sizing and mapping
895427bd
JS
3986 * @phba: pointer to lpfc hba data structure.
3987 *
3988 * This routine first calculates the sizes of the current els and allocated
3989 * scsi sgl lists, and then goes through all sgls to updates the physical
3990 * XRIs assigned due to port function reset. During port initialization, the
3991 * current els and allocated scsi sgl lists are 0s.
3992 *
3993 * Return codes
3994 * 0 - successful (for now, it always returns 0)
3995 **/
3996int
5e5b511d 3997lpfc_sli4_io_sgl_update(struct lpfc_hba *phba)
895427bd 3998{
c490850a 3999 struct lpfc_io_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL;
0794d601 4000 uint16_t i, lxri, els_xri_cnt;
5e5b511d
JS
4001 uint16_t io_xri_cnt, io_xri_max;
4002 LIST_HEAD(io_sgl_list);
0794d601 4003 int rc, cnt;
8a9d2e80 4004
895427bd 4005 /*
0794d601 4006 * update on pci function's allocated nvme xri-sgl list
895427bd 4007 */
8a9d2e80 4008
0794d601
JS
4009 /* maximum number of xris available for nvme buffers */
4010 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
5e5b511d
JS
4011 io_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
4012 phba->sli4_hba.io_xri_max = io_xri_max;
8a9d2e80 4013
e8c0a779 4014 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
0794d601
JS
4015 "6074 Current allocated XRI sgl count:%d, "
4016 "maximum XRI count:%d\n",
5e5b511d
JS
4017 phba->sli4_hba.io_xri_cnt,
4018 phba->sli4_hba.io_xri_max);
4019
4020 cnt = lpfc_io_buf_flush(phba, &io_sgl_list);
4021
4022 if (phba->sli4_hba.io_xri_cnt > phba->sli4_hba.io_xri_max) {
0794d601 4023 /* max nvme xri shrunk below the allocated nvme buffers */
5e5b511d
JS
4024 io_xri_cnt = phba->sli4_hba.io_xri_cnt -
4025 phba->sli4_hba.io_xri_max;
0794d601 4026 /* release the extra allocated nvme buffers */
5e5b511d
JS
4027 for (i = 0; i < io_xri_cnt; i++) {
4028 list_remove_head(&io_sgl_list, lpfc_ncmd,
c490850a 4029 struct lpfc_io_buf, list);
0794d601 4030 if (lpfc_ncmd) {
771db5c0 4031 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
0794d601
JS
4032 lpfc_ncmd->data,
4033 lpfc_ncmd->dma_handle);
4034 kfree(lpfc_ncmd);
a2fc4aef 4035 }
8a9d2e80 4036 }
5e5b511d 4037 phba->sli4_hba.io_xri_cnt -= io_xri_cnt;
8a9d2e80
JS
4038 }
4039
0794d601
JS
4040 /* update xris associated to remaining allocated nvme buffers */
4041 lpfc_ncmd = NULL;
4042 lpfc_ncmd_next = NULL;
5e5b511d 4043 phba->sli4_hba.io_xri_cnt = cnt;
0794d601 4044 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
5e5b511d 4045 &io_sgl_list, list) {
8a9d2e80
JS
4046 lxri = lpfc_sli4_next_xritag(phba);
4047 if (lxri == NO_XRI) {
4048 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
0794d601
JS
4049 "6075 Failed to allocate xri for "
4050 "nvme buffer\n");
8a9d2e80
JS
4051 rc = -ENOMEM;
4052 goto out_free_mem;
4053 }
0794d601
JS
4054 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri;
4055 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
8a9d2e80 4056 }
5e5b511d 4057 cnt = lpfc_io_buf_replenish(phba, &io_sgl_list);
dea3101e 4058 return 0;
8a9d2e80
JS
4059
4060out_free_mem:
5e5b511d 4061 lpfc_io_free(phba);
8a9d2e80 4062 return rc;
dea3101e 4063}
4064
0794d601 4065/**
5e5b511d 4066 * lpfc_new_io_buf - IO buffer allocator for HBA with SLI4 IF spec
0794d601
JS
4067 * @vport: The virtual port for which this call being executed.
4068 * @num_to_allocate: The requested number of buffers to allocate.
4069 *
4070 * This routine allocates nvme buffers for device with SLI-4 interface spec,
4071 * the nvme buffer contains all the necessary information needed to initiate
4072 * an I/O. After allocating up to @num_to_allocate IO buffers and put
4073 * them on a list, it post them to the port by using SGL block post.
4074 *
4075 * Return codes:
5e5b511d 4076 * int - number of IO buffers that were allocated and posted.
0794d601
JS
4077 * 0 = failure, less than num_to_alloc is a partial failure.
4078 **/
4079int
5e5b511d 4080lpfc_new_io_buf(struct lpfc_hba *phba, int num_to_alloc)
0794d601 4081{
c490850a 4082 struct lpfc_io_buf *lpfc_ncmd;
0794d601
JS
4083 struct lpfc_iocbq *pwqeq;
4084 uint16_t iotag, lxri = 0;
4085 int bcnt, num_posted;
4086 LIST_HEAD(prep_nblist);
4087 LIST_HEAD(post_nblist);
4088 LIST_HEAD(nvme_nblist);
4089
4090 /* Sanity check to ensure our sizing is right for both SCSI and NVME */
c490850a 4091 if (sizeof(struct lpfc_io_buf) > LPFC_COMMON_IO_BUF_SZ) {
0794d601 4092 lpfc_printf_log(phba, KERN_ERR, LOG_FCP,
c490850a
JS
4093 "6426 Common buffer size %ld exceeds %d\n",
4094 sizeof(struct lpfc_io_buf),
4095 LPFC_COMMON_IO_BUF_SZ);
0794d601
JS
4096 return 0;
4097 }
4098
5e5b511d 4099 phba->sli4_hba.io_xri_cnt = 0;
0794d601
JS
4100 for (bcnt = 0; bcnt < num_to_alloc; bcnt++) {
4101 lpfc_ncmd = kzalloc(LPFC_COMMON_IO_BUF_SZ, GFP_KERNEL);
4102 if (!lpfc_ncmd)
4103 break;
4104 /*
4105 * Get memory from the pci pool to map the virt space to
4106 * pci bus space for an I/O. The DMA buffer includes the
4107 * number of SGE's necessary to support the sg_tablesize.
4108 */
4109 lpfc_ncmd->data = dma_pool_alloc(phba->lpfc_sg_dma_buf_pool,
4110 GFP_KERNEL,
4111 &lpfc_ncmd->dma_handle);
4112 if (!lpfc_ncmd->data) {
4113 kfree(lpfc_ncmd);
4114 break;
4115 }
4116 memset(lpfc_ncmd->data, 0, phba->cfg_sg_dma_buf_size);
4117
4118 /*
4119 * 4K Page alignment is CRITICAL to BlockGuard, double check
4120 * to be sure.
4121 */
4122 if ((phba->sli3_options & LPFC_SLI3_BG_ENABLED) &&
4123 (((unsigned long)(lpfc_ncmd->data) &
4124 (unsigned long)(SLI4_PAGE_SIZE - 1)) != 0)) {
4125 lpfc_printf_log(phba, KERN_ERR, LOG_FCP,
4126 "3369 Memory alignment err: addr=%lx\n",
4127 (unsigned long)lpfc_ncmd->data);
4128 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4129 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4130 kfree(lpfc_ncmd);
4131 break;
4132 }
4133
4134 lxri = lpfc_sli4_next_xritag(phba);
4135 if (lxri == NO_XRI) {
4136 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4137 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4138 kfree(lpfc_ncmd);
4139 break;
4140 }
4141 pwqeq = &lpfc_ncmd->cur_iocbq;
4142
4143 /* Allocate iotag for lpfc_ncmd->cur_iocbq. */
4144 iotag = lpfc_sli_next_iotag(phba, pwqeq);
4145 if (iotag == 0) {
4146 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4147 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4148 kfree(lpfc_ncmd);
4149 lpfc_printf_log(phba, KERN_ERR, LOG_NVME_IOERR,
4150 "6121 Failed to allocate IOTAG for"
4151 " XRI:0x%x\n", lxri);
4152 lpfc_sli4_free_xri(phba, lxri);
4153 break;
4154 }
4155 pwqeq->sli4_lxritag = lxri;
4156 pwqeq->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4157 pwqeq->context1 = lpfc_ncmd;
4158
4159 /* Initialize local short-hand pointers. */
4160 lpfc_ncmd->dma_sgl = lpfc_ncmd->data;
4161 lpfc_ncmd->dma_phys_sgl = lpfc_ncmd->dma_handle;
4162 lpfc_ncmd->cur_iocbq.context1 = lpfc_ncmd;
4163
4164 /* add the nvme buffer to a post list */
4165 list_add_tail(&lpfc_ncmd->list, &post_nblist);
5e5b511d 4166 phba->sli4_hba.io_xri_cnt++;
0794d601
JS
4167 }
4168 lpfc_printf_log(phba, KERN_INFO, LOG_NVME,
4169 "6114 Allocate %d out of %d requested new NVME "
4170 "buffers\n", bcnt, num_to_alloc);
4171
4172 /* post the list of nvme buffer sgls to port if available */
4173 if (!list_empty(&post_nblist))
5e5b511d 4174 num_posted = lpfc_sli4_post_io_sgl_list(
0794d601
JS
4175 phba, &post_nblist, bcnt);
4176 else
4177 num_posted = 0;
4178
4179 return num_posted;
4180}
4181
96418b5e
JS
4182static uint64_t
4183lpfc_get_wwpn(struct lpfc_hba *phba)
4184{
4185 uint64_t wwn;
4186 int rc;
4187 LPFC_MBOXQ_t *mboxq;
4188 MAILBOX_t *mb;
4189
96418b5e
JS
4190 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
4191 GFP_KERNEL);
4192 if (!mboxq)
4193 return (uint64_t)-1;
4194
4195 /* First get WWN of HBA instance */
4196 lpfc_read_nv(phba, mboxq);
4197 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
4198 if (rc != MBX_SUCCESS) {
4199 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4200 "6019 Mailbox failed , mbxCmd x%x "
4201 "READ_NV, mbxStatus x%x\n",
4202 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
4203 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
4204 mempool_free(mboxq, phba->mbox_mem_pool);
4205 return (uint64_t) -1;
4206 }
4207 mb = &mboxq->u.mb;
4208 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t));
4209 /* wwn is WWPN of HBA instance */
4210 mempool_free(mboxq, phba->mbox_mem_pool);
4211 if (phba->sli_rev == LPFC_SLI_REV4)
4212 return be64_to_cpu(wwn);
4213 else
286871a6 4214 return rol64(wwn, 32);
96418b5e
JS
4215}
4216
e59058c4 4217/**
3621a710 4218 * lpfc_create_port - Create an FC port
e59058c4
JS
4219 * @phba: pointer to lpfc hba data structure.
4220 * @instance: a unique integer ID to this FC port.
4221 * @dev: pointer to the device data structure.
4222 *
4223 * This routine creates a FC port for the upper layer protocol. The FC port
4224 * can be created on top of either a physical port or a virtual port provided
4225 * by the HBA. This routine also allocates a SCSI host data structure (shost)
4226 * and associates the FC port created before adding the shost into the SCSI
4227 * layer.
4228 *
4229 * Return codes
4230 * @vport - pointer to the virtual N_Port data structure.
4231 * NULL - port create failed.
4232 **/
2e0fef85 4233struct lpfc_vport *
3de2a653 4234lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
47a8617c 4235{
2e0fef85 4236 struct lpfc_vport *vport;
895427bd 4237 struct Scsi_Host *shost = NULL;
2e0fef85 4238 int error = 0;
96418b5e
JS
4239 int i;
4240 uint64_t wwn;
4241 bool use_no_reset_hba = false;
56bc8028 4242 int rc;
96418b5e 4243
56bc8028
JS
4244 if (lpfc_no_hba_reset_cnt) {
4245 if (phba->sli_rev < LPFC_SLI_REV4 &&
4246 dev == &phba->pcidev->dev) {
4247 /* Reset the port first */
4248 lpfc_sli_brdrestart(phba);
4249 rc = lpfc_sli_chipset_init(phba);
4250 if (rc)
4251 return NULL;
4252 }
4253 wwn = lpfc_get_wwpn(phba);
4254 }
96418b5e
JS
4255
4256 for (i = 0; i < lpfc_no_hba_reset_cnt; i++) {
4257 if (wwn == lpfc_no_hba_reset[i]) {
4258 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4259 "6020 Setting use_no_reset port=%llx\n",
4260 wwn);
4261 use_no_reset_hba = true;
4262 break;
4263 }
4264 }
47a8617c 4265
895427bd
JS
4266 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
4267 if (dev != &phba->pcidev->dev) {
4268 shost = scsi_host_alloc(&lpfc_vport_template,
4269 sizeof(struct lpfc_vport));
4270 } else {
96418b5e 4271 if (!use_no_reset_hba)
895427bd
JS
4272 shost = scsi_host_alloc(&lpfc_template,
4273 sizeof(struct lpfc_vport));
4274 else
96418b5e 4275 shost = scsi_host_alloc(&lpfc_template_no_hr,
895427bd
JS
4276 sizeof(struct lpfc_vport));
4277 }
4278 } else if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
4279 shost = scsi_host_alloc(&lpfc_template_nvme,
ea4142f6
JS
4280 sizeof(struct lpfc_vport));
4281 }
2e0fef85
JS
4282 if (!shost)
4283 goto out;
47a8617c 4284
2e0fef85
JS
4285 vport = (struct lpfc_vport *) shost->hostdata;
4286 vport->phba = phba;
2e0fef85 4287 vport->load_flag |= FC_LOADING;
92d7f7b0 4288 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
7f5f3d0d 4289 vport->fc_rscn_flush = 0;
3de2a653 4290 lpfc_get_vport_cfgparam(vport);
895427bd 4291
2e0fef85
JS
4292 shost->unique_id = instance;
4293 shost->max_id = LPFC_MAX_TARGET;
3de2a653 4294 shost->max_lun = vport->cfg_max_luns;
2e0fef85
JS
4295 shost->this_id = -1;
4296 shost->max_cmd_len = 16;
6a828b0f 4297
da0436e9 4298 if (phba->sli_rev == LPFC_SLI_REV4) {
6a828b0f
JS
4299 if (phba->cfg_fcp_io_sched == LPFC_FCP_SCHED_BY_HDWQ)
4300 shost->nr_hw_queues = phba->cfg_hdw_queue;
4301 else
4302 shost->nr_hw_queues = phba->sli4_hba.num_present_cpu;
4303
28baac74 4304 shost->dma_boundary =
cb5172ea 4305 phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
5b9e70b2 4306 shost->sg_tablesize = phba->cfg_scsi_seg_cnt;
ace44e48
JS
4307 } else
4308 /* SLI-3 has a limited number of hardware queues (3),
4309 * thus there is only one for FCP processing.
4310 */
4311 shost->nr_hw_queues = 1;
81301a9b 4312
47a8617c 4313 /*
2e0fef85
JS
4314 * Set initial can_queue value since 0 is no longer supported and
4315 * scsi_add_host will fail. This will be adjusted later based on the
4316 * max xri value determined in hba setup.
47a8617c 4317 */
2e0fef85 4318 shost->can_queue = phba->cfg_hba_queue_depth - 10;
3de2a653 4319 if (dev != &phba->pcidev->dev) {
92d7f7b0
JS
4320 shost->transportt = lpfc_vport_transport_template;
4321 vport->port_type = LPFC_NPIV_PORT;
4322 } else {
4323 shost->transportt = lpfc_transport_template;
4324 vport->port_type = LPFC_PHYSICAL_PORT;
4325 }
47a8617c 4326
2e0fef85
JS
4327 /* Initialize all internally managed lists. */
4328 INIT_LIST_HEAD(&vport->fc_nodes);
da0436e9 4329 INIT_LIST_HEAD(&vport->rcv_buffer_list);
2e0fef85 4330 spin_lock_init(&vport->work_port_lock);
47a8617c 4331
f22eb4d3 4332 timer_setup(&vport->fc_disctmo, lpfc_disc_timeout, 0);
47a8617c 4333
f22eb4d3 4334 timer_setup(&vport->els_tmofunc, lpfc_els_timeout, 0);
92494144 4335
f22eb4d3 4336 timer_setup(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo, 0);
92494144 4337
d139b9bd 4338 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev);
2e0fef85
JS
4339 if (error)
4340 goto out_put_shost;
47a8617c 4341
523128e5 4342 spin_lock_irq(&phba->port_list_lock);
2e0fef85 4343 list_add_tail(&vport->listentry, &phba->port_list);
523128e5 4344 spin_unlock_irq(&phba->port_list_lock);
2e0fef85 4345 return vport;
47a8617c 4346
2e0fef85
JS
4347out_put_shost:
4348 scsi_host_put(shost);
4349out:
4350 return NULL;
47a8617c
JS
4351}
4352
e59058c4 4353/**
3621a710 4354 * destroy_port - destroy an FC port
e59058c4
JS
4355 * @vport: pointer to an lpfc virtual N_Port data structure.
4356 *
4357 * This routine destroys a FC port from the upper layer protocol. All the
4358 * resources associated with the port are released.
4359 **/
2e0fef85
JS
4360void
4361destroy_port(struct lpfc_vport *vport)
47a8617c 4362{
92d7f7b0
JS
4363 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
4364 struct lpfc_hba *phba = vport->phba;
47a8617c 4365
858c9f6c 4366 lpfc_debugfs_terminate(vport);
92d7f7b0
JS
4367 fc_remove_host(shost);
4368 scsi_remove_host(shost);
47a8617c 4369
523128e5 4370 spin_lock_irq(&phba->port_list_lock);
92d7f7b0 4371 list_del_init(&vport->listentry);
523128e5 4372 spin_unlock_irq(&phba->port_list_lock);
47a8617c 4373
92d7f7b0 4374 lpfc_cleanup(vport);
47a8617c 4375 return;
47a8617c
JS
4376}
4377
e59058c4 4378/**
3621a710 4379 * lpfc_get_instance - Get a unique integer ID
e59058c4
JS
4380 *
4381 * This routine allocates a unique integer ID from lpfc_hba_index pool. It
4382 * uses the kernel idr facility to perform the task.
4383 *
4384 * Return codes:
4385 * instance - a unique integer ID allocated as the new instance.
4386 * -1 - lpfc get instance failed.
4387 **/
92d7f7b0
JS
4388int
4389lpfc_get_instance(void)
4390{
ab516036
TH
4391 int ret;
4392
4393 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL);
4394 return ret < 0 ? -1 : ret;
47a8617c
JS
4395}
4396
e59058c4 4397/**
3621a710 4398 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done
e59058c4
JS
4399 * @shost: pointer to SCSI host data structure.
4400 * @time: elapsed time of the scan in jiffies.
4401 *
4402 * This routine is called by the SCSI layer with a SCSI host to determine
4403 * whether the scan host is finished.
4404 *
4405 * Note: there is no scan_start function as adapter initialization will have
4406 * asynchronously kicked off the link initialization.
4407 *
4408 * Return codes
4409 * 0 - SCSI host scan is not over yet.
4410 * 1 - SCSI host scan is over.
4411 **/
47a8617c
JS
4412int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time)
4413{
2e0fef85
JS
4414 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4415 struct lpfc_hba *phba = vport->phba;
858c9f6c 4416 int stat = 0;
47a8617c 4417
858c9f6c
JS
4418 spin_lock_irq(shost->host_lock);
4419
51ef4c26 4420 if (vport->load_flag & FC_UNLOADING) {
858c9f6c
JS
4421 stat = 1;
4422 goto finished;
4423 }
256ec0d0 4424 if (time >= msecs_to_jiffies(30 * 1000)) {
2e0fef85 4425 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
4426 "0461 Scanning longer than 30 "
4427 "seconds. Continuing initialization\n");
858c9f6c 4428 stat = 1;
47a8617c 4429 goto finished;
2e0fef85 4430 }
256ec0d0
JS
4431 if (time >= msecs_to_jiffies(15 * 1000) &&
4432 phba->link_state <= LPFC_LINK_DOWN) {
2e0fef85 4433 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS
4434 "0465 Link down longer than 15 "
4435 "seconds. Continuing initialization\n");
858c9f6c 4436 stat = 1;
47a8617c 4437 goto finished;
2e0fef85 4438 }
47a8617c 4439
2e0fef85 4440 if (vport->port_state != LPFC_VPORT_READY)
858c9f6c 4441 goto finished;
2e0fef85 4442 if (vport->num_disc_nodes || vport->fc_prli_sent)
858c9f6c 4443 goto finished;
256ec0d0 4444 if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000))
858c9f6c 4445 goto finished;
2e0fef85 4446 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0)
858c9f6c
JS
4447 goto finished;
4448
4449 stat = 1;
47a8617c
JS
4450
4451finished:
858c9f6c
JS
4452 spin_unlock_irq(shost->host_lock);
4453 return stat;
92d7f7b0 4454}
47a8617c 4455
cd71348a
JS
4456void lpfc_host_supported_speeds_set(struct Scsi_Host *shost)
4457{
4458 struct lpfc_vport *vport = (struct lpfc_vport *)shost->hostdata;
4459 struct lpfc_hba *phba = vport->phba;
4460
4461 fc_host_supported_speeds(shost) = 0;
1dc5ec24
JS
4462 if (phba->lmt & LMT_128Gb)
4463 fc_host_supported_speeds(shost) |= FC_PORTSPEED_128GBIT;
cd71348a
JS
4464 if (phba->lmt & LMT_64Gb)
4465 fc_host_supported_speeds(shost) |= FC_PORTSPEED_64GBIT;
4466 if (phba->lmt & LMT_32Gb)
4467 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT;
4468 if (phba->lmt & LMT_16Gb)
4469 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT;
4470 if (phba->lmt & LMT_10Gb)
4471 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT;
4472 if (phba->lmt & LMT_8Gb)
4473 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT;
4474 if (phba->lmt & LMT_4Gb)
4475 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT;
4476 if (phba->lmt & LMT_2Gb)
4477 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT;
4478 if (phba->lmt & LMT_1Gb)
4479 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT;
4480}
4481
e59058c4 4482/**
3621a710 4483 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port
e59058c4
JS
4484 * @shost: pointer to SCSI host data structure.
4485 *
4486 * This routine initializes a given SCSI host attributes on a FC port. The
4487 * SCSI host can be either on top of a physical port or a virtual port.
4488 **/
92d7f7b0
JS
4489void lpfc_host_attrib_init(struct Scsi_Host *shost)
4490{
4491 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4492 struct lpfc_hba *phba = vport->phba;
47a8617c 4493 /*
2e0fef85 4494 * Set fixed host attributes. Must done after lpfc_sli_hba_setup().
47a8617c
JS
4495 */
4496
2e0fef85
JS
4497 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
4498 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
47a8617c
JS
4499 fc_host_supported_classes(shost) = FC_COS_CLASS3;
4500
4501 memset(fc_host_supported_fc4s(shost), 0,
2e0fef85 4502 sizeof(fc_host_supported_fc4s(shost)));
47a8617c
JS
4503 fc_host_supported_fc4s(shost)[2] = 1;
4504 fc_host_supported_fc4s(shost)[7] = 1;
4505
92d7f7b0
JS
4506 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost),
4507 sizeof fc_host_symbolic_name(shost));
47a8617c 4508
cd71348a 4509 lpfc_host_supported_speeds_set(shost);
47a8617c
JS
4510
4511 fc_host_maxframe_size(shost) =
2e0fef85
JS
4512 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
4513 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb;
47a8617c 4514
0af5d708
MC
4515 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo;
4516
47a8617c
JS
4517 /* This value is also unchanging */
4518 memset(fc_host_active_fc4s(shost), 0,
2e0fef85 4519 sizeof(fc_host_active_fc4s(shost)));
47a8617c
JS
4520 fc_host_active_fc4s(shost)[2] = 1;
4521 fc_host_active_fc4s(shost)[7] = 1;
4522
92d7f7b0 4523 fc_host_max_npiv_vports(shost) = phba->max_vpi;
47a8617c 4524 spin_lock_irq(shost->host_lock);
51ef4c26 4525 vport->load_flag &= ~FC_LOADING;
47a8617c 4526 spin_unlock_irq(shost->host_lock);
47a8617c 4527}
dea3101e 4528
e59058c4 4529/**
da0436e9 4530 * lpfc_stop_port_s3 - Stop SLI3 device port
e59058c4
JS
4531 * @phba: pointer to lpfc hba data structure.
4532 *
da0436e9
JS
4533 * This routine is invoked to stop an SLI3 device port, it stops the device
4534 * from generating interrupts and stops the device driver's timers for the
4535 * device.
e59058c4 4536 **/
da0436e9
JS
4537static void
4538lpfc_stop_port_s3(struct lpfc_hba *phba)
db2378e0 4539{
da0436e9
JS
4540 /* Clear all interrupt enable conditions */
4541 writel(0, phba->HCregaddr);
4542 readl(phba->HCregaddr); /* flush */
4543 /* Clear all pending interrupts */
4544 writel(0xffffffff, phba->HAregaddr);
4545 readl(phba->HAregaddr); /* flush */
db2378e0 4546
da0436e9
JS
4547 /* Reset some HBA SLI setup states */
4548 lpfc_stop_hba_timers(phba);
4549 phba->pport->work_port_events = 0;
4550}
db2378e0 4551
da0436e9
JS
4552/**
4553 * lpfc_stop_port_s4 - Stop SLI4 device port
4554 * @phba: pointer to lpfc hba data structure.
4555 *
4556 * This routine is invoked to stop an SLI4 device port, it stops the device
4557 * from generating interrupts and stops the device driver's timers for the
4558 * device.
4559 **/
4560static void
4561lpfc_stop_port_s4(struct lpfc_hba *phba)
4562{
4563 /* Reset some HBA SLI4 setup states */
4564 lpfc_stop_hba_timers(phba);
cdb42bec
JS
4565 if (phba->pport)
4566 phba->pport->work_port_events = 0;
da0436e9 4567 phba->sli4_hba.intr_enable = 0;
da0436e9 4568}
9399627f 4569
da0436e9
JS
4570/**
4571 * lpfc_stop_port - Wrapper function for stopping hba port
4572 * @phba: Pointer to HBA context object.
4573 *
4574 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from
4575 * the API jump table function pointer from the lpfc_hba struct.
4576 **/
4577void
4578lpfc_stop_port(struct lpfc_hba *phba)
4579{
4580 phba->lpfc_stop_port(phba);
f485c18d
DK
4581
4582 if (phba->wq)
4583 flush_workqueue(phba->wq);
da0436e9 4584}
db2378e0 4585
ecfd03c6
JS
4586/**
4587 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer
4588 * @phba: Pointer to hba for which this call is being executed.
4589 *
4590 * This routine starts the timer waiting for the FCF rediscovery to complete.
4591 **/
4592void
4593lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba)
4594{
4595 unsigned long fcf_redisc_wait_tmo =
4596 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO));
4597 /* Start fcf rediscovery wait period timer */
4598 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo);
4599 spin_lock_irq(&phba->hbalock);
4600 /* Allow action to new fcf asynchronous event */
4601 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
4602 /* Mark the FCF rediscovery pending state */
4603 phba->fcf.fcf_flag |= FCF_REDISC_PEND;
4604 spin_unlock_irq(&phba->hbalock);
4605}
4606
4607/**
4608 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout
4609 * @ptr: Map to lpfc_hba data structure pointer.
4610 *
4611 * This routine is invoked when waiting for FCF table rediscover has been
4612 * timed out. If new FCF record(s) has (have) been discovered during the
4613 * wait period, a new FCF event shall be added to the FCOE async event
4614 * list, and then worker thread shall be waked up for processing from the
4615 * worker thread context.
4616 **/
e399b228 4617static void
f22eb4d3 4618lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list *t)
ecfd03c6 4619{
f22eb4d3 4620 struct lpfc_hba *phba = from_timer(phba, t, fcf.redisc_wait);
ecfd03c6
JS
4621
4622 /* Don't send FCF rediscovery event if timer cancelled */
4623 spin_lock_irq(&phba->hbalock);
4624 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
4625 spin_unlock_irq(&phba->hbalock);
4626 return;
4627 }
4628 /* Clear FCF rediscovery timer pending flag */
4629 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
4630 /* FCF rediscovery event to worker thread */
4631 phba->fcf.fcf_flag |= FCF_REDISC_EVT;
4632 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 4633 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 4634 "2776 FCF rediscover quiescent timer expired\n");
ecfd03c6
JS
4635 /* wake up worker thread */
4636 lpfc_worker_wake_up(phba);
4637}
4638
e59058c4 4639/**
da0436e9 4640 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code
e59058c4 4641 * @phba: pointer to lpfc hba data structure.
da0436e9 4642 * @acqe_link: pointer to the async link completion queue entry.
e59058c4 4643 *
23288b78 4644 * This routine is to parse the SLI4 link-attention link fault code.
e59058c4 4645 **/
23288b78 4646static void
da0436e9
JS
4647lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba,
4648 struct lpfc_acqe_link *acqe_link)
db2378e0 4649{
da0436e9
JS
4650 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) {
4651 case LPFC_ASYNC_LINK_FAULT_NONE:
4652 case LPFC_ASYNC_LINK_FAULT_LOCAL:
4653 case LPFC_ASYNC_LINK_FAULT_REMOTE:
23288b78 4654 case LPFC_ASYNC_LINK_FAULT_LR_LRR:
da0436e9
JS
4655 break;
4656 default:
4657 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
23288b78 4658 "0398 Unknown link fault code: x%x\n",
da0436e9 4659 bf_get(lpfc_acqe_link_fault, acqe_link));
da0436e9
JS
4660 break;
4661 }
db2378e0
JS
4662}
4663
5b75da2f 4664/**
da0436e9 4665 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type
5b75da2f 4666 * @phba: pointer to lpfc hba data structure.
da0436e9 4667 * @acqe_link: pointer to the async link completion queue entry.
5b75da2f 4668 *
da0436e9
JS
4669 * This routine is to parse the SLI4 link attention type and translate it
4670 * into the base driver's link attention type coding.
5b75da2f 4671 *
da0436e9
JS
4672 * Return: Link attention type in terms of base driver's coding.
4673 **/
4674static uint8_t
4675lpfc_sli4_parse_latt_type(struct lpfc_hba *phba,
4676 struct lpfc_acqe_link *acqe_link)
5b75da2f 4677{
da0436e9 4678 uint8_t att_type;
5b75da2f 4679
da0436e9
JS
4680 switch (bf_get(lpfc_acqe_link_status, acqe_link)) {
4681 case LPFC_ASYNC_LINK_STATUS_DOWN:
4682 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN:
76a95d75 4683 att_type = LPFC_ATT_LINK_DOWN;
da0436e9
JS
4684 break;
4685 case LPFC_ASYNC_LINK_STATUS_UP:
4686 /* Ignore physical link up events - wait for logical link up */
76a95d75 4687 att_type = LPFC_ATT_RESERVED;
da0436e9
JS
4688 break;
4689 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP:
76a95d75 4690 att_type = LPFC_ATT_LINK_UP;
da0436e9
JS
4691 break;
4692 default:
4693 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4694 "0399 Invalid link attention type: x%x\n",
4695 bf_get(lpfc_acqe_link_status, acqe_link));
76a95d75 4696 att_type = LPFC_ATT_RESERVED;
da0436e9 4697 break;
5b75da2f 4698 }
da0436e9 4699 return att_type;
5b75da2f
JS
4700}
4701
8b68cd52
JS
4702/**
4703 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed
4704 * @phba: pointer to lpfc hba data structure.
4705 *
4706 * This routine is to get an SLI3 FC port's link speed in Mbps.
4707 *
4708 * Return: link speed in terms of Mbps.
4709 **/
4710uint32_t
4711lpfc_sli_port_speed_get(struct lpfc_hba *phba)
4712{
4713 uint32_t link_speed;
4714
4715 if (!lpfc_is_link_up(phba))
4716 return 0;
4717
a085e87c
JS
4718 if (phba->sli_rev <= LPFC_SLI_REV3) {
4719 switch (phba->fc_linkspeed) {
4720 case LPFC_LINK_SPEED_1GHZ:
4721 link_speed = 1000;
4722 break;
4723 case LPFC_LINK_SPEED_2GHZ:
4724 link_speed = 2000;
4725 break;
4726 case LPFC_LINK_SPEED_4GHZ:
4727 link_speed = 4000;
4728 break;
4729 case LPFC_LINK_SPEED_8GHZ:
4730 link_speed = 8000;
4731 break;
4732 case LPFC_LINK_SPEED_10GHZ:
4733 link_speed = 10000;
4734 break;
4735 case LPFC_LINK_SPEED_16GHZ:
4736 link_speed = 16000;
4737 break;
4738 default:
4739 link_speed = 0;
4740 }
4741 } else {
4742 if (phba->sli4_hba.link_state.logical_speed)
4743 link_speed =
4744 phba->sli4_hba.link_state.logical_speed;
4745 else
4746 link_speed = phba->sli4_hba.link_state.speed;
8b68cd52
JS
4747 }
4748 return link_speed;
4749}
4750
4751/**
4752 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed
4753 * @phba: pointer to lpfc hba data structure.
4754 * @evt_code: asynchronous event code.
4755 * @speed_code: asynchronous event link speed code.
4756 *
4757 * This routine is to parse the giving SLI4 async event link speed code into
4758 * value of Mbps for the link speed.
4759 *
4760 * Return: link speed in terms of Mbps.
4761 **/
4762static uint32_t
4763lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code,
4764 uint8_t speed_code)
4765{
4766 uint32_t port_speed;
4767
4768 switch (evt_code) {
4769 case LPFC_TRAILER_CODE_LINK:
4770 switch (speed_code) {
26d830ec 4771 case LPFC_ASYNC_LINK_SPEED_ZERO:
8b68cd52
JS
4772 port_speed = 0;
4773 break;
26d830ec 4774 case LPFC_ASYNC_LINK_SPEED_10MBPS:
8b68cd52
JS
4775 port_speed = 10;
4776 break;
26d830ec 4777 case LPFC_ASYNC_LINK_SPEED_100MBPS:
8b68cd52
JS
4778 port_speed = 100;
4779 break;
26d830ec 4780 case LPFC_ASYNC_LINK_SPEED_1GBPS:
8b68cd52
JS
4781 port_speed = 1000;
4782 break;
26d830ec 4783 case LPFC_ASYNC_LINK_SPEED_10GBPS:
8b68cd52
JS
4784 port_speed = 10000;
4785 break;
26d830ec
JS
4786 case LPFC_ASYNC_LINK_SPEED_20GBPS:
4787 port_speed = 20000;
4788 break;
4789 case LPFC_ASYNC_LINK_SPEED_25GBPS:
4790 port_speed = 25000;
4791 break;
4792 case LPFC_ASYNC_LINK_SPEED_40GBPS:
4793 port_speed = 40000;
4794 break;
8b68cd52
JS
4795 default:
4796 port_speed = 0;
4797 }
4798 break;
4799 case LPFC_TRAILER_CODE_FC:
4800 switch (speed_code) {
26d830ec 4801 case LPFC_FC_LA_SPEED_UNKNOWN:
8b68cd52
JS
4802 port_speed = 0;
4803 break;
26d830ec 4804 case LPFC_FC_LA_SPEED_1G:
8b68cd52
JS
4805 port_speed = 1000;
4806 break;
26d830ec 4807 case LPFC_FC_LA_SPEED_2G:
8b68cd52
JS
4808 port_speed = 2000;
4809 break;
26d830ec 4810 case LPFC_FC_LA_SPEED_4G:
8b68cd52
JS
4811 port_speed = 4000;
4812 break;
26d830ec 4813 case LPFC_FC_LA_SPEED_8G:
8b68cd52
JS
4814 port_speed = 8000;
4815 break;
26d830ec 4816 case LPFC_FC_LA_SPEED_10G:
8b68cd52
JS
4817 port_speed = 10000;
4818 break;
26d830ec 4819 case LPFC_FC_LA_SPEED_16G:
8b68cd52
JS
4820 port_speed = 16000;
4821 break;
d38dd52c
JS
4822 case LPFC_FC_LA_SPEED_32G:
4823 port_speed = 32000;
4824 break;
fbd8a6ba
JS
4825 case LPFC_FC_LA_SPEED_64G:
4826 port_speed = 64000;
4827 break;
1dc5ec24
JS
4828 case LPFC_FC_LA_SPEED_128G:
4829 port_speed = 128000;
4830 break;
8b68cd52
JS
4831 default:
4832 port_speed = 0;
4833 }
4834 break;
4835 default:
4836 port_speed = 0;
4837 }
4838 return port_speed;
4839}
4840
da0436e9 4841/**
70f3c073 4842 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event
da0436e9
JS
4843 * @phba: pointer to lpfc hba data structure.
4844 * @acqe_link: pointer to the async link completion queue entry.
4845 *
70f3c073 4846 * This routine is to handle the SLI4 asynchronous FCoE link event.
da0436e9
JS
4847 **/
4848static void
4849lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
4850 struct lpfc_acqe_link *acqe_link)
4851{
4852 struct lpfc_dmabuf *mp;
4853 LPFC_MBOXQ_t *pmb;
4854 MAILBOX_t *mb;
76a95d75 4855 struct lpfc_mbx_read_top *la;
da0436e9 4856 uint8_t att_type;
76a95d75 4857 int rc;
da0436e9
JS
4858
4859 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link);
76a95d75 4860 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP)
da0436e9 4861 return;
32b9793f 4862 phba->fcoe_eventtag = acqe_link->event_tag;
da0436e9
JS
4863 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4864 if (!pmb) {
4865 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4866 "0395 The mboxq allocation failed\n");
4867 return;
4868 }
4869 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4870 if (!mp) {
4871 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4872 "0396 The lpfc_dmabuf allocation failed\n");
4873 goto out_free_pmb;
4874 }
4875 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4876 if (!mp->virt) {
4877 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4878 "0397 The mbuf allocation failed\n");
4879 goto out_free_dmabuf;
4880 }
4881
4882 /* Cleanup any outstanding ELS commands */
4883 lpfc_els_flush_all_cmd(phba);
4884
4885 /* Block ELS IOCBs until we have done process link event */
895427bd 4886 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
da0436e9
JS
4887
4888 /* Update link event statistics */
4889 phba->sli.slistat.link_event++;
4890
76a95d75
JS
4891 /* Create lpfc_handle_latt mailbox command from link ACQE */
4892 lpfc_read_topology(phba, pmb, mp);
4893 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
da0436e9
JS
4894 pmb->vport = phba->pport;
4895
da0436e9
JS
4896 /* Keep the link status for extra SLI4 state machine reference */
4897 phba->sli4_hba.link_state.speed =
8b68cd52
JS
4898 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK,
4899 bf_get(lpfc_acqe_link_speed, acqe_link));
da0436e9
JS
4900 phba->sli4_hba.link_state.duplex =
4901 bf_get(lpfc_acqe_link_duplex, acqe_link);
4902 phba->sli4_hba.link_state.status =
4903 bf_get(lpfc_acqe_link_status, acqe_link);
70f3c073
JS
4904 phba->sli4_hba.link_state.type =
4905 bf_get(lpfc_acqe_link_type, acqe_link);
4906 phba->sli4_hba.link_state.number =
4907 bf_get(lpfc_acqe_link_number, acqe_link);
da0436e9
JS
4908 phba->sli4_hba.link_state.fault =
4909 bf_get(lpfc_acqe_link_fault, acqe_link);
65467b6b 4910 phba->sli4_hba.link_state.logical_speed =
8b68cd52
JS
4911 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10;
4912
70f3c073 4913 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
c31098ce
JS
4914 "2900 Async FC/FCoE Link event - Speed:%dGBit "
4915 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d "
4916 "Logical speed:%dMbps Fault:%d\n",
70f3c073
JS
4917 phba->sli4_hba.link_state.speed,
4918 phba->sli4_hba.link_state.topology,
4919 phba->sli4_hba.link_state.status,
4920 phba->sli4_hba.link_state.type,
4921 phba->sli4_hba.link_state.number,
8b68cd52 4922 phba->sli4_hba.link_state.logical_speed,
70f3c073 4923 phba->sli4_hba.link_state.fault);
76a95d75
JS
4924 /*
4925 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch
4926 * topology info. Note: Optional for non FC-AL ports.
4927 */
4928 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
4929 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4930 if (rc == MBX_NOT_FINISHED)
4931 goto out_free_dmabuf;
4932 return;
4933 }
4934 /*
4935 * For FCoE Mode: fill in all the topology information we need and call
4936 * the READ_TOPOLOGY completion routine to continue without actually
4937 * sending the READ_TOPOLOGY mailbox command to the port.
4938 */
23288b78 4939 /* Initialize completion status */
76a95d75 4940 mb = &pmb->u.mb;
23288b78
JS
4941 mb->mbxStatus = MBX_SUCCESS;
4942
4943 /* Parse port fault information field */
4944 lpfc_sli4_parse_latt_fault(phba, acqe_link);
76a95d75
JS
4945
4946 /* Parse and translate link attention fields */
4947 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop;
4948 la->eventTag = acqe_link->event_tag;
4949 bf_set(lpfc_mbx_read_top_att_type, la, att_type);
4950 bf_set(lpfc_mbx_read_top_link_spd, la,
a085e87c 4951 (bf_get(lpfc_acqe_link_speed, acqe_link)));
76a95d75
JS
4952
4953 /* Fake the the following irrelvant fields */
4954 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT);
4955 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0);
4956 bf_set(lpfc_mbx_read_top_il, la, 0);
4957 bf_set(lpfc_mbx_read_top_pb, la, 0);
4958 bf_set(lpfc_mbx_read_top_fa, la, 0);
4959 bf_set(lpfc_mbx_read_top_mm, la, 0);
da0436e9
JS
4960
4961 /* Invoke the lpfc_handle_latt mailbox command callback function */
76a95d75 4962 lpfc_mbx_cmpl_read_topology(phba, pmb);
da0436e9 4963
5b75da2f 4964 return;
da0436e9
JS
4965
4966out_free_dmabuf:
4967 kfree(mp);
4968out_free_pmb:
4969 mempool_free(pmb, phba->mbox_mem_pool);
4970}
4971
1dc5ec24
JS
4972/**
4973 * lpfc_async_link_speed_to_read_top - Parse async evt link speed code to read
4974 * topology.
4975 * @phba: pointer to lpfc hba data structure.
4976 * @evt_code: asynchronous event code.
4977 * @speed_code: asynchronous event link speed code.
4978 *
4979 * This routine is to parse the giving SLI4 async event link speed code into
4980 * value of Read topology link speed.
4981 *
4982 * Return: link speed in terms of Read topology.
4983 **/
4984static uint8_t
4985lpfc_async_link_speed_to_read_top(struct lpfc_hba *phba, uint8_t speed_code)
4986{
4987 uint8_t port_speed;
4988
4989 switch (speed_code) {
4990 case LPFC_FC_LA_SPEED_1G:
4991 port_speed = LPFC_LINK_SPEED_1GHZ;
4992 break;
4993 case LPFC_FC_LA_SPEED_2G:
4994 port_speed = LPFC_LINK_SPEED_2GHZ;
4995 break;
4996 case LPFC_FC_LA_SPEED_4G:
4997 port_speed = LPFC_LINK_SPEED_4GHZ;
4998 break;
4999 case LPFC_FC_LA_SPEED_8G:
5000 port_speed = LPFC_LINK_SPEED_8GHZ;
5001 break;
5002 case LPFC_FC_LA_SPEED_16G:
5003 port_speed = LPFC_LINK_SPEED_16GHZ;
5004 break;
5005 case LPFC_FC_LA_SPEED_32G:
5006 port_speed = LPFC_LINK_SPEED_32GHZ;
5007 break;
5008 case LPFC_FC_LA_SPEED_64G:
5009 port_speed = LPFC_LINK_SPEED_64GHZ;
5010 break;
5011 case LPFC_FC_LA_SPEED_128G:
5012 port_speed = LPFC_LINK_SPEED_128GHZ;
5013 break;
5014 case LPFC_FC_LA_SPEED_256G:
5015 port_speed = LPFC_LINK_SPEED_256GHZ;
5016 break;
5017 default:
5018 port_speed = 0;
5019 break;
5020 }
5021
5022 return port_speed;
5023}
5024
5025#define trunk_link_status(__idx)\
5026 bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\
5027 ((phba->trunk_link.link##__idx.state == LPFC_LINK_UP) ?\
5028 "Link up" : "Link down") : "NA"
5029/* Did port __idx reported an error */
5030#define trunk_port_fault(__idx)\
5031 bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\
5032 (port_fault & (1 << __idx) ? "YES" : "NO") : "NA"
5033
5034static void
5035lpfc_update_trunk_link_status(struct lpfc_hba *phba,
5036 struct lpfc_acqe_fc_la *acqe_fc)
5037{
5038 uint8_t port_fault = bf_get(lpfc_acqe_fc_la_trunk_linkmask, acqe_fc);
5039 uint8_t err = bf_get(lpfc_acqe_fc_la_trunk_fault, acqe_fc);
5040
5041 phba->sli4_hba.link_state.speed =
5042 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
5043 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
5044
5045 phba->sli4_hba.link_state.logical_speed =
5046 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc);
5047 /* We got FC link speed, convert to fc_linkspeed (READ_TOPOLOGY) */
5048 phba->fc_linkspeed =
5049 lpfc_async_link_speed_to_read_top(
5050 phba,
5051 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
5052
5053 if (bf_get(lpfc_acqe_fc_la_trunk_config_port0, acqe_fc)) {
5054 phba->trunk_link.link0.state =
5055 bf_get(lpfc_acqe_fc_la_trunk_link_status_port0, acqe_fc)
5056 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
529b3ddc 5057 phba->trunk_link.link0.fault = port_fault & 0x1 ? err : 0;
1dc5ec24
JS
5058 }
5059 if (bf_get(lpfc_acqe_fc_la_trunk_config_port1, acqe_fc)) {
5060 phba->trunk_link.link1.state =
5061 bf_get(lpfc_acqe_fc_la_trunk_link_status_port1, acqe_fc)
5062 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
529b3ddc 5063 phba->trunk_link.link1.fault = port_fault & 0x2 ? err : 0;
1dc5ec24
JS
5064 }
5065 if (bf_get(lpfc_acqe_fc_la_trunk_config_port2, acqe_fc)) {
5066 phba->trunk_link.link2.state =
5067 bf_get(lpfc_acqe_fc_la_trunk_link_status_port2, acqe_fc)
5068 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
529b3ddc 5069 phba->trunk_link.link2.fault = port_fault & 0x4 ? err : 0;
1dc5ec24
JS
5070 }
5071 if (bf_get(lpfc_acqe_fc_la_trunk_config_port3, acqe_fc)) {
5072 phba->trunk_link.link3.state =
5073 bf_get(lpfc_acqe_fc_la_trunk_link_status_port3, acqe_fc)
5074 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
529b3ddc 5075 phba->trunk_link.link3.fault = port_fault & 0x8 ? err : 0;
1dc5ec24
JS
5076 }
5077
5078 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5079 "2910 Async FC Trunking Event - Speed:%d\n"
5080 "\tLogical speed:%d "
5081 "port0: %s port1: %s port2: %s port3: %s\n",
5082 phba->sli4_hba.link_state.speed,
5083 phba->sli4_hba.link_state.logical_speed,
5084 trunk_link_status(0), trunk_link_status(1),
5085 trunk_link_status(2), trunk_link_status(3));
5086
5087 if (port_fault)
5088 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5089 "3202 trunk error:0x%x (%s) seen on port0:%s "
5090 /*
5091 * SLI-4: We have only 0xA error codes
5092 * defined as of now. print an appropriate
5093 * message in case driver needs to be updated.
5094 */
5095 "port1:%s port2:%s port3:%s\n", err, err > 0xA ?
5096 "UNDEFINED. update driver." : trunk_errmsg[err],
5097 trunk_port_fault(0), trunk_port_fault(1),
5098 trunk_port_fault(2), trunk_port_fault(3));
5099}
5100
5101
70f3c073
JS
5102/**
5103 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event
5104 * @phba: pointer to lpfc hba data structure.
5105 * @acqe_fc: pointer to the async fc completion queue entry.
5106 *
5107 * This routine is to handle the SLI4 asynchronous FC event. It will simply log
5108 * that the event was received and then issue a read_topology mailbox command so
5109 * that the rest of the driver will treat it the same as SLI3.
5110 **/
5111static void
5112lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc)
5113{
5114 struct lpfc_dmabuf *mp;
5115 LPFC_MBOXQ_t *pmb;
7bdedb34
JS
5116 MAILBOX_t *mb;
5117 struct lpfc_mbx_read_top *la;
70f3c073
JS
5118 int rc;
5119
5120 if (bf_get(lpfc_trailer_type, acqe_fc) !=
5121 LPFC_FC_LA_EVENT_TYPE_FC_LINK) {
5122 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5123 "2895 Non FC link Event detected.(%d)\n",
5124 bf_get(lpfc_trailer_type, acqe_fc));
5125 return;
5126 }
1dc5ec24
JS
5127
5128 if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) ==
5129 LPFC_FC_LA_TYPE_TRUNKING_EVENT) {
5130 lpfc_update_trunk_link_status(phba, acqe_fc);
5131 return;
5132 }
5133
70f3c073
JS
5134 /* Keep the link status for extra SLI4 state machine reference */
5135 phba->sli4_hba.link_state.speed =
8b68cd52
JS
5136 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
5137 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
70f3c073
JS
5138 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
5139 phba->sli4_hba.link_state.topology =
5140 bf_get(lpfc_acqe_fc_la_topology, acqe_fc);
5141 phba->sli4_hba.link_state.status =
5142 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc);
5143 phba->sli4_hba.link_state.type =
5144 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc);
5145 phba->sli4_hba.link_state.number =
5146 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc);
5147 phba->sli4_hba.link_state.fault =
5148 bf_get(lpfc_acqe_link_fault, acqe_fc);
5149 phba->sli4_hba.link_state.logical_speed =
8b68cd52 5150 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
70f3c073
JS
5151 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5152 "2896 Async FC event - Speed:%dGBaud Topology:x%x "
5153 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:"
5154 "%dMbps Fault:%d\n",
5155 phba->sli4_hba.link_state.speed,
5156 phba->sli4_hba.link_state.topology,
5157 phba->sli4_hba.link_state.status,
5158 phba->sli4_hba.link_state.type,
5159 phba->sli4_hba.link_state.number,
8b68cd52 5160 phba->sli4_hba.link_state.logical_speed,
70f3c073
JS
5161 phba->sli4_hba.link_state.fault);
5162 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5163 if (!pmb) {
5164 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5165 "2897 The mboxq allocation failed\n");
5166 return;
5167 }
5168 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
5169 if (!mp) {
5170 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5171 "2898 The lpfc_dmabuf allocation failed\n");
5172 goto out_free_pmb;
5173 }
5174 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
5175 if (!mp->virt) {
5176 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5177 "2899 The mbuf allocation failed\n");
5178 goto out_free_dmabuf;
5179 }
5180
5181 /* Cleanup any outstanding ELS commands */
5182 lpfc_els_flush_all_cmd(phba);
5183
5184 /* Block ELS IOCBs until we have done process link event */
895427bd 5185 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
70f3c073
JS
5186
5187 /* Update link event statistics */
5188 phba->sli.slistat.link_event++;
5189
5190 /* Create lpfc_handle_latt mailbox command from link ACQE */
5191 lpfc_read_topology(phba, pmb, mp);
5192 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
5193 pmb->vport = phba->pport;
5194
7bdedb34 5195 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
ae9e28f3
JS
5196 phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK);
5197
5198 switch (phba->sli4_hba.link_state.status) {
5199 case LPFC_FC_LA_TYPE_MDS_LINK_DOWN:
5200 phba->link_flag |= LS_MDS_LINK_DOWN;
5201 break;
5202 case LPFC_FC_LA_TYPE_MDS_LOOPBACK:
5203 phba->link_flag |= LS_MDS_LOOPBACK;
5204 break;
5205 default:
5206 break;
5207 }
5208
23288b78 5209 /* Initialize completion status */
7bdedb34 5210 mb = &pmb->u.mb;
23288b78
JS
5211 mb->mbxStatus = MBX_SUCCESS;
5212
5213 /* Parse port fault information field */
5214 lpfc_sli4_parse_latt_fault(phba, (void *)acqe_fc);
7bdedb34
JS
5215
5216 /* Parse and translate link attention fields */
5217 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop;
5218 la->eventTag = acqe_fc->event_tag;
7bdedb34 5219
aeb3c817
JS
5220 if (phba->sli4_hba.link_state.status ==
5221 LPFC_FC_LA_TYPE_UNEXP_WWPN) {
5222 bf_set(lpfc_mbx_read_top_att_type, la,
5223 LPFC_FC_LA_TYPE_UNEXP_WWPN);
5224 } else {
5225 bf_set(lpfc_mbx_read_top_att_type, la,
5226 LPFC_FC_LA_TYPE_LINK_DOWN);
5227 }
7bdedb34
JS
5228 /* Invoke the mailbox command callback function */
5229 lpfc_mbx_cmpl_read_topology(phba, pmb);
5230
5231 return;
5232 }
5233
70f3c073
JS
5234 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
5235 if (rc == MBX_NOT_FINISHED)
5236 goto out_free_dmabuf;
5237 return;
5238
5239out_free_dmabuf:
5240 kfree(mp);
5241out_free_pmb:
5242 mempool_free(pmb, phba->mbox_mem_pool);
5243}
5244
5245/**
5246 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event
5247 * @phba: pointer to lpfc hba data structure.
5248 * @acqe_fc: pointer to the async SLI completion queue entry.
5249 *
5250 * This routine is to handle the SLI4 asynchronous SLI events.
5251 **/
5252static void
5253lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
5254{
4b8bae08 5255 char port_name;
8c1312e1 5256 char message[128];
4b8bae08 5257 uint8_t status;
946727dc 5258 uint8_t evt_type;
448193b5 5259 uint8_t operational = 0;
946727dc 5260 struct temp_event temp_event_data;
4b8bae08 5261 struct lpfc_acqe_misconfigured_event *misconfigured;
946727dc 5262 struct Scsi_Host *shost;
cd71348a
JS
5263 struct lpfc_vport **vports;
5264 int rc, i;
946727dc
JS
5265
5266 evt_type = bf_get(lpfc_trailer_type, acqe_sli);
4b8bae08 5267
448193b5
JS
5268 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5269 "2901 Async SLI event - Event Data1:x%08x Event Data2:"
5270 "x%08x SLI Event Type:%d\n",
5271 acqe_sli->event_data1, acqe_sli->event_data2,
5272 evt_type);
4b8bae08
JS
5273
5274 port_name = phba->Port[0];
5275 if (port_name == 0x00)
5276 port_name = '?'; /* get port name is empty */
5277
946727dc
JS
5278 switch (evt_type) {
5279 case LPFC_SLI_EVENT_TYPE_OVER_TEMP:
5280 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
5281 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
5282 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
5283
5284 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
5285 "3190 Over Temperature:%d Celsius- Port Name %c\n",
5286 acqe_sli->event_data1, port_name);
5287
310429ef 5288 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS
5289 shost = lpfc_shost_from_vport(phba->pport);
5290 fc_host_post_vendor_event(shost, fc_get_event_number(),
5291 sizeof(temp_event_data),
5292 (char *)&temp_event_data,
5293 SCSI_NL_VID_TYPE_PCI
5294 | PCI_VENDOR_ID_EMULEX);
5295 break;
5296 case LPFC_SLI_EVENT_TYPE_NORM_TEMP:
5297 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
5298 temp_event_data.event_code = LPFC_NORMAL_TEMP;
5299 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
5300
5301 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5302 "3191 Normal Temperature:%d Celsius - Port Name %c\n",
5303 acqe_sli->event_data1, port_name);
5304
5305 shost = lpfc_shost_from_vport(phba->pport);
5306 fc_host_post_vendor_event(shost, fc_get_event_number(),
5307 sizeof(temp_event_data),
5308 (char *)&temp_event_data,
5309 SCSI_NL_VID_TYPE_PCI
5310 | PCI_VENDOR_ID_EMULEX);
5311 break;
5312 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED:
5313 misconfigured = (struct lpfc_acqe_misconfigured_event *)
4b8bae08
JS
5314 &acqe_sli->event_data1;
5315
946727dc
JS
5316 /* fetch the status for this port */
5317 switch (phba->sli4_hba.lnk_info.lnk_no) {
5318 case LPFC_LINK_NUMBER_0:
448193b5
JS
5319 status = bf_get(lpfc_sli_misconfigured_port0_state,
5320 &misconfigured->theEvent);
5321 operational = bf_get(lpfc_sli_misconfigured_port0_op,
4b8bae08 5322 &misconfigured->theEvent);
946727dc
JS
5323 break;
5324 case LPFC_LINK_NUMBER_1:
448193b5
JS
5325 status = bf_get(lpfc_sli_misconfigured_port1_state,
5326 &misconfigured->theEvent);
5327 operational = bf_get(lpfc_sli_misconfigured_port1_op,
4b8bae08 5328 &misconfigured->theEvent);
946727dc
JS
5329 break;
5330 case LPFC_LINK_NUMBER_2:
448193b5
JS
5331 status = bf_get(lpfc_sli_misconfigured_port2_state,
5332 &misconfigured->theEvent);
5333 operational = bf_get(lpfc_sli_misconfigured_port2_op,
4b8bae08 5334 &misconfigured->theEvent);
946727dc
JS
5335 break;
5336 case LPFC_LINK_NUMBER_3:
448193b5
JS
5337 status = bf_get(lpfc_sli_misconfigured_port3_state,
5338 &misconfigured->theEvent);
5339 operational = bf_get(lpfc_sli_misconfigured_port3_op,
4b8bae08 5340 &misconfigured->theEvent);
946727dc
JS
5341 break;
5342 default:
448193b5
JS
5343 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5344 "3296 "
5345 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED "
5346 "event: Invalid link %d",
5347 phba->sli4_hba.lnk_info.lnk_no);
5348 return;
946727dc 5349 }
4b8bae08 5350
448193b5
JS
5351 /* Skip if optic state unchanged */
5352 if (phba->sli4_hba.lnk_info.optic_state == status)
5353 return;
5354
946727dc
JS
5355 switch (status) {
5356 case LPFC_SLI_EVENT_STATUS_VALID:
448193b5
JS
5357 sprintf(message, "Physical Link is functional");
5358 break;
946727dc
JS
5359 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT:
5360 sprintf(message, "Optics faulted/incorrectly "
5361 "installed/not installed - Reseat optics, "
5362 "if issue not resolved, replace.");
5363 break;
5364 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE:
5365 sprintf(message,
5366 "Optics of two types installed - Remove one "
5367 "optic or install matching pair of optics.");
5368 break;
5369 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED:
5370 sprintf(message, "Incompatible optics - Replace with "
292098be 5371 "compatible optics for card to function.");
946727dc 5372 break;
448193b5
JS
5373 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED:
5374 sprintf(message, "Unqualified optics - Replace with "
5375 "Avago optics for Warranty and Technical "
5376 "Support - Link is%s operational",
2ea259ee 5377 (operational) ? " not" : "");
448193b5
JS
5378 break;
5379 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED:
5380 sprintf(message, "Uncertified optics - Replace with "
5381 "Avago-certified optics to enable link "
5382 "operation - Link is%s operational",
2ea259ee 5383 (operational) ? " not" : "");
448193b5 5384 break;
946727dc
JS
5385 default:
5386 /* firmware is reporting a status we don't know about */
5387 sprintf(message, "Unknown event status x%02x", status);
5388 break;
5389 }
cd71348a
JS
5390
5391 /* Issue READ_CONFIG mbox command to refresh supported speeds */
5392 rc = lpfc_sli4_read_config(phba);
3952e91f 5393 if (rc) {
cd71348a
JS
5394 phba->lmt = 0;
5395 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5396 "3194 Unable to retrieve supported "
3952e91f 5397 "speeds, rc = 0x%x\n", rc);
cd71348a
JS
5398 }
5399 vports = lpfc_create_vport_work_array(phba);
5400 if (vports != NULL) {
5401 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
5402 i++) {
5403 shost = lpfc_shost_from_vport(vports[i]);
5404 lpfc_host_supported_speeds_set(shost);
5405 }
5406 }
5407 lpfc_destroy_vport_work_array(phba, vports);
5408
448193b5 5409 phba->sli4_hba.lnk_info.optic_state = status;
946727dc 5410 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
448193b5 5411 "3176 Port Name %c %s\n", port_name, message);
946727dc
JS
5412 break;
5413 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT:
5414 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5415 "3192 Remote DPort Test Initiated - "
5416 "Event Data1:x%08x Event Data2: x%08x\n",
5417 acqe_sli->event_data1, acqe_sli->event_data2);
4b8bae08
JS
5418 break;
5419 default:
946727dc
JS
5420 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5421 "3193 Async SLI event - Event Data1:x%08x Event Data2:"
5422 "x%08x SLI Event Type:%d\n",
5423 acqe_sli->event_data1, acqe_sli->event_data2,
5424 evt_type);
4b8bae08
JS
5425 break;
5426 }
70f3c073
JS
5427}
5428
fc2b989b
JS
5429/**
5430 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport
5431 * @vport: pointer to vport data structure.
5432 *
5433 * This routine is to perform Clear Virtual Link (CVL) on a vport in
5434 * response to a CVL event.
5435 *
5436 * Return the pointer to the ndlp with the vport if successful, otherwise
5437 * return NULL.
5438 **/
5439static struct lpfc_nodelist *
5440lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport)
5441{
5442 struct lpfc_nodelist *ndlp;
5443 struct Scsi_Host *shost;
5444 struct lpfc_hba *phba;
5445
5446 if (!vport)
5447 return NULL;
fc2b989b
JS
5448 phba = vport->phba;
5449 if (!phba)
5450 return NULL;
78730cfe
JS
5451 ndlp = lpfc_findnode_did(vport, Fabric_DID);
5452 if (!ndlp) {
5453 /* Cannot find existing Fabric ndlp, so allocate a new one */
9d3d340d 5454 ndlp = lpfc_nlp_init(vport, Fabric_DID);
78730cfe
JS
5455 if (!ndlp)
5456 return 0;
78730cfe
JS
5457 /* Set the node type */
5458 ndlp->nlp_type |= NLP_FABRIC;
5459 /* Put ndlp onto node list */
5460 lpfc_enqueue_node(vport, ndlp);
5461 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
5462 /* re-setup ndlp without removing from node list */
5463 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
5464 if (!ndlp)
5465 return 0;
5466 }
63e801ce
JS
5467 if ((phba->pport->port_state < LPFC_FLOGI) &&
5468 (phba->pport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS
5469 return NULL;
5470 /* If virtual link is not yet instantiated ignore CVL */
63e801ce
JS
5471 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)
5472 && (vport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS
5473 return NULL;
5474 shost = lpfc_shost_from_vport(vport);
5475 if (!shost)
5476 return NULL;
5477 lpfc_linkdown_port(vport);
5478 lpfc_cleanup_pending_mbox(vport);
5479 spin_lock_irq(shost->host_lock);
5480 vport->fc_flag |= FC_VPORT_CVL_RCVD;
5481 spin_unlock_irq(shost->host_lock);
5482
5483 return ndlp;
5484}
5485
5486/**
5487 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports
5488 * @vport: pointer to lpfc hba data structure.
5489 *
5490 * This routine is to perform Clear Virtual Link (CVL) on all vports in
5491 * response to a FCF dead event.
5492 **/
5493static void
5494lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba)
5495{
5496 struct lpfc_vport **vports;
5497 int i;
5498
5499 vports = lpfc_create_vport_work_array(phba);
5500 if (vports)
5501 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
5502 lpfc_sli4_perform_vport_cvl(vports[i]);
5503 lpfc_destroy_vport_work_array(phba, vports);
5504}
5505
da0436e9 5506/**
76a95d75 5507 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event
da0436e9
JS
5508 * @phba: pointer to lpfc hba data structure.
5509 * @acqe_link: pointer to the async fcoe completion queue entry.
5510 *
5511 * This routine is to handle the SLI4 asynchronous fcoe event.
5512 **/
5513static void
76a95d75 5514lpfc_sli4_async_fip_evt(struct lpfc_hba *phba,
70f3c073 5515 struct lpfc_acqe_fip *acqe_fip)
da0436e9 5516{
70f3c073 5517 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
da0436e9 5518 int rc;
6669f9bb
JS
5519 struct lpfc_vport *vport;
5520 struct lpfc_nodelist *ndlp;
5521 struct Scsi_Host *shost;
695a814e
JS
5522 int active_vlink_present;
5523 struct lpfc_vport **vports;
5524 int i;
da0436e9 5525
70f3c073
JS
5526 phba->fc_eventTag = acqe_fip->event_tag;
5527 phba->fcoe_eventtag = acqe_fip->event_tag;
da0436e9 5528 switch (event_type) {
70f3c073
JS
5529 case LPFC_FIP_EVENT_TYPE_NEW_FCF:
5530 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD:
5531 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF)
999d813f
JS
5532 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
5533 LOG_DISCOVERY,
a93ff37a
JS
5534 "2546 New FCF event, evt_tag:x%x, "
5535 "index:x%x\n",
70f3c073
JS
5536 acqe_fip->event_tag,
5537 acqe_fip->index);
999d813f
JS
5538 else
5539 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP |
5540 LOG_DISCOVERY,
a93ff37a
JS
5541 "2788 FCF param modified event, "
5542 "evt_tag:x%x, index:x%x\n",
70f3c073
JS
5543 acqe_fip->event_tag,
5544 acqe_fip->index);
38b92ef8 5545 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
0c9ab6f5
JS
5546 /*
5547 * During period of FCF discovery, read the FCF
5548 * table record indexed by the event to update
a93ff37a 5549 * FCF roundrobin failover eligible FCF bmask.
0c9ab6f5
JS
5550 */
5551 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
5552 LOG_DISCOVERY,
a93ff37a
JS
5553 "2779 Read FCF (x%x) for updating "
5554 "roundrobin FCF failover bmask\n",
70f3c073
JS
5555 acqe_fip->index);
5556 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index);
0c9ab6f5 5557 }
38b92ef8
JS
5558
5559 /* If the FCF discovery is in progress, do nothing. */
3804dc84 5560 spin_lock_irq(&phba->hbalock);
a93ff37a 5561 if (phba->hba_flag & FCF_TS_INPROG) {
38b92ef8
JS
5562 spin_unlock_irq(&phba->hbalock);
5563 break;
5564 }
5565 /* If fast FCF failover rescan event is pending, do nothing */
036cad1f 5566 if (phba->fcf.fcf_flag & (FCF_REDISC_EVT | FCF_REDISC_PEND)) {
38b92ef8
JS
5567 spin_unlock_irq(&phba->hbalock);
5568 break;
5569 }
5570
c2b9712e
JS
5571 /* If the FCF has been in discovered state, do nothing. */
5572 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) {
3804dc84
JS
5573 spin_unlock_irq(&phba->hbalock);
5574 break;
5575 }
5576 spin_unlock_irq(&phba->hbalock);
38b92ef8 5577
0c9ab6f5
JS
5578 /* Otherwise, scan the entire FCF table and re-discover SAN */
5579 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a
JS
5580 "2770 Start FCF table scan per async FCF "
5581 "event, evt_tag:x%x, index:x%x\n",
70f3c073 5582 acqe_fip->event_tag, acqe_fip->index);
0c9ab6f5
JS
5583 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba,
5584 LPFC_FCOE_FCF_GET_FIRST);
da0436e9 5585 if (rc)
0c9ab6f5
JS
5586 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5587 "2547 Issue FCF scan read FCF mailbox "
a93ff37a 5588 "command failed (x%x)\n", rc);
da0436e9
JS
5589 break;
5590
70f3c073 5591 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL:
da0436e9 5592 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e4e74273 5593 "2548 FCF Table full count 0x%x tag 0x%x\n",
70f3c073
JS
5594 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip),
5595 acqe_fip->event_tag);
da0436e9
JS
5596 break;
5597
70f3c073 5598 case LPFC_FIP_EVENT_TYPE_FCF_DEAD:
80c17849 5599 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 5600 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
a93ff37a 5601 "2549 FCF (x%x) disconnected from network, "
70f3c073 5602 "tag:x%x\n", acqe_fip->index, acqe_fip->event_tag);
38b92ef8
JS
5603 /*
5604 * If we are in the middle of FCF failover process, clear
5605 * the corresponding FCF bit in the roundrobin bitmap.
da0436e9 5606 */
fc2b989b 5607 spin_lock_irq(&phba->hbalock);
a1cadfef
JS
5608 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) &&
5609 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) {
fc2b989b 5610 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 5611 /* Update FLOGI FCF failover eligible FCF bmask */
70f3c073 5612 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index);
fc2b989b
JS
5613 break;
5614 }
38b92ef8
JS
5615 spin_unlock_irq(&phba->hbalock);
5616
5617 /* If the event is not for currently used fcf do nothing */
70f3c073 5618 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index)
38b92ef8
JS
5619 break;
5620
5621 /*
5622 * Otherwise, request the port to rediscover the entire FCF
5623 * table for a fast recovery from case that the current FCF
5624 * is no longer valid as we are not in the middle of FCF
5625 * failover process already.
5626 */
c2b9712e
JS
5627 spin_lock_irq(&phba->hbalock);
5628 /* Mark the fast failover process in progress */
5629 phba->fcf.fcf_flag |= FCF_DEAD_DISC;
5630 spin_unlock_irq(&phba->hbalock);
5631
5632 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
5633 "2771 Start FCF fast failover process due to "
5634 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x "
5635 "\n", acqe_fip->event_tag, acqe_fip->index);
5636 rc = lpfc_sli4_redisc_fcf_table(phba);
5637 if (rc) {
5638 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
5639 LOG_DISCOVERY,
7afc0ce9 5640 "2772 Issue FCF rediscover mailbox "
c2b9712e
JS
5641 "command failed, fail through to FCF "
5642 "dead event\n");
5643 spin_lock_irq(&phba->hbalock);
5644 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
5645 spin_unlock_irq(&phba->hbalock);
5646 /*
5647 * Last resort will fail over by treating this
5648 * as a link down to FCF registration.
5649 */
5650 lpfc_sli4_fcf_dead_failthrough(phba);
5651 } else {
5652 /* Reset FCF roundrobin bmask for new discovery */
5653 lpfc_sli4_clear_fcf_rr_bmask(phba);
5654 /*
5655 * Handling fast FCF failover to a DEAD FCF event is
5656 * considered equalivant to receiving CVL to all vports.
5657 */
5658 lpfc_sli4_perform_all_vport_cvl(phba);
5659 }
da0436e9 5660 break;
70f3c073 5661 case LPFC_FIP_EVENT_TYPE_CVL:
80c17849 5662 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 5663 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
6669f9bb 5664 "2718 Clear Virtual Link Received for VPI 0x%x"
70f3c073 5665 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag);
6d368e53 5666
6669f9bb 5667 vport = lpfc_find_vport_by_vpid(phba,
5248a749 5668 acqe_fip->index);
fc2b989b 5669 ndlp = lpfc_sli4_perform_vport_cvl(vport);
6669f9bb
JS
5670 if (!ndlp)
5671 break;
695a814e
JS
5672 active_vlink_present = 0;
5673
5674 vports = lpfc_create_vport_work_array(phba);
5675 if (vports) {
5676 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
5677 i++) {
5678 if ((!(vports[i]->fc_flag &
5679 FC_VPORT_CVL_RCVD)) &&
5680 (vports[i]->port_state > LPFC_FDISC)) {
5681 active_vlink_present = 1;
5682 break;
5683 }
5684 }
5685 lpfc_destroy_vport_work_array(phba, vports);
5686 }
5687
cc82355a
JS
5688 /*
5689 * Don't re-instantiate if vport is marked for deletion.
5690 * If we are here first then vport_delete is going to wait
5691 * for discovery to complete.
5692 */
5693 if (!(vport->load_flag & FC_UNLOADING) &&
5694 active_vlink_present) {
695a814e
JS
5695 /*
5696 * If there are other active VLinks present,
5697 * re-instantiate the Vlink using FDISC.
5698 */
256ec0d0
JS
5699 mod_timer(&ndlp->nlp_delayfunc,
5700 jiffies + msecs_to_jiffies(1000));
fc2b989b 5701 shost = lpfc_shost_from_vport(vport);
6669f9bb
JS
5702 spin_lock_irq(shost->host_lock);
5703 ndlp->nlp_flag |= NLP_DELAY_TMO;
5704 spin_unlock_irq(shost->host_lock);
695a814e
JS
5705 ndlp->nlp_last_elscmd = ELS_CMD_FDISC;
5706 vport->port_state = LPFC_FDISC;
5707 } else {
ecfd03c6
JS
5708 /*
5709 * Otherwise, we request port to rediscover
5710 * the entire FCF table for a fast recovery
5711 * from possible case that the current FCF
0c9ab6f5
JS
5712 * is no longer valid if we are not already
5713 * in the FCF failover process.
ecfd03c6 5714 */
fc2b989b 5715 spin_lock_irq(&phba->hbalock);
0c9ab6f5 5716 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
fc2b989b
JS
5717 spin_unlock_irq(&phba->hbalock);
5718 break;
5719 }
5720 /* Mark the fast failover process in progress */
0c9ab6f5 5721 phba->fcf.fcf_flag |= FCF_ACVL_DISC;
fc2b989b 5722 spin_unlock_irq(&phba->hbalock);
0c9ab6f5
JS
5723 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
5724 LOG_DISCOVERY,
a93ff37a 5725 "2773 Start FCF failover per CVL, "
70f3c073 5726 "evt_tag:x%x\n", acqe_fip->event_tag);
ecfd03c6 5727 rc = lpfc_sli4_redisc_fcf_table(phba);
fc2b989b 5728 if (rc) {
0c9ab6f5
JS
5729 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
5730 LOG_DISCOVERY,
5731 "2774 Issue FCF rediscover "
7afc0ce9 5732 "mailbox command failed, "
0c9ab6f5 5733 "through to CVL event\n");
fc2b989b 5734 spin_lock_irq(&phba->hbalock);
0c9ab6f5 5735 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
fc2b989b 5736 spin_unlock_irq(&phba->hbalock);
ecfd03c6
JS
5737 /*
5738 * Last resort will be re-try on the
5739 * the current registered FCF entry.
5740 */
5741 lpfc_retry_pport_discovery(phba);
38b92ef8
JS
5742 } else
5743 /*
5744 * Reset FCF roundrobin bmask for new
5745 * discovery.
5746 */
7d791df7 5747 lpfc_sli4_clear_fcf_rr_bmask(phba);
6669f9bb
JS
5748 }
5749 break;
da0436e9
JS
5750 default:
5751 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5752 "0288 Unknown FCoE event type 0x%x event tag "
70f3c073 5753 "0x%x\n", event_type, acqe_fip->event_tag);
da0436e9
JS
5754 break;
5755 }
5756}
5757
5758/**
5759 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event
5760 * @phba: pointer to lpfc hba data structure.
5761 * @acqe_link: pointer to the async dcbx completion queue entry.
5762 *
5763 * This routine is to handle the SLI4 asynchronous dcbx event.
5764 **/
5765static void
5766lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba,
5767 struct lpfc_acqe_dcbx *acqe_dcbx)
5768{
4d9ab994 5769 phba->fc_eventTag = acqe_dcbx->event_tag;
da0436e9
JS
5770 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5771 "0290 The SLI4 DCBX asynchronous event is not "
5772 "handled yet\n");
5773}
5774
b19a061a
JS
5775/**
5776 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event
5777 * @phba: pointer to lpfc hba data structure.
5778 * @acqe_link: pointer to the async grp5 completion queue entry.
5779 *
5780 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event
5781 * is an asynchronous notified of a logical link speed change. The Port
5782 * reports the logical link speed in units of 10Mbps.
5783 **/
5784static void
5785lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba,
5786 struct lpfc_acqe_grp5 *acqe_grp5)
5787{
5788 uint16_t prev_ll_spd;
5789
5790 phba->fc_eventTag = acqe_grp5->event_tag;
5791 phba->fcoe_eventtag = acqe_grp5->event_tag;
5792 prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
5793 phba->sli4_hba.link_state.logical_speed =
8b68cd52 5794 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10;
b19a061a
JS
5795 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5796 "2789 GRP5 Async Event: Updating logical link speed "
8b68cd52
JS
5797 "from %dMbps to %dMbps\n", prev_ll_spd,
5798 phba->sli4_hba.link_state.logical_speed);
b19a061a
JS
5799}
5800
da0436e9
JS
5801/**
5802 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event
5803 * @phba: pointer to lpfc hba data structure.
5804 *
5805 * This routine is invoked by the worker thread to process all the pending
5806 * SLI4 asynchronous events.
5807 **/
5808void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
5809{
5810 struct lpfc_cq_event *cq_event;
5811
5812 /* First, declare the async event has been handled */
5813 spin_lock_irq(&phba->hbalock);
5814 phba->hba_flag &= ~ASYNC_EVENT;
5815 spin_unlock_irq(&phba->hbalock);
5816 /* Now, handle all the async events */
5817 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
5818 /* Get the first event from the head of the event queue */
5819 spin_lock_irq(&phba->hbalock);
5820 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
5821 cq_event, struct lpfc_cq_event, list);
5822 spin_unlock_irq(&phba->hbalock);
5823 /* Process the asynchronous event */
5824 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) {
5825 case LPFC_TRAILER_CODE_LINK:
5826 lpfc_sli4_async_link_evt(phba,
5827 &cq_event->cqe.acqe_link);
5828 break;
5829 case LPFC_TRAILER_CODE_FCOE:
70f3c073 5830 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip);
da0436e9
JS
5831 break;
5832 case LPFC_TRAILER_CODE_DCBX:
5833 lpfc_sli4_async_dcbx_evt(phba,
5834 &cq_event->cqe.acqe_dcbx);
5835 break;
b19a061a
JS
5836 case LPFC_TRAILER_CODE_GRP5:
5837 lpfc_sli4_async_grp5_evt(phba,
5838 &cq_event->cqe.acqe_grp5);
5839 break;
70f3c073
JS
5840 case LPFC_TRAILER_CODE_FC:
5841 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc);
5842 break;
5843 case LPFC_TRAILER_CODE_SLI:
5844 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli);
5845 break;
da0436e9
JS
5846 default:
5847 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5848 "1804 Invalid asynchrous event code: "
5849 "x%x\n", bf_get(lpfc_trailer_code,
5850 &cq_event->cqe.mcqe_cmpl));
5851 break;
5852 }
5853 /* Free the completion event processed to the free pool */
5854 lpfc_sli4_cq_event_release(phba, cq_event);
5855 }
5856}
5857
ecfd03c6
JS
5858/**
5859 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event
5860 * @phba: pointer to lpfc hba data structure.
5861 *
5862 * This routine is invoked by the worker thread to process FCF table
5863 * rediscovery pending completion event.
5864 **/
5865void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba)
5866{
5867 int rc;
5868
5869 spin_lock_irq(&phba->hbalock);
5870 /* Clear FCF rediscovery timeout event */
5871 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT;
5872 /* Clear driver fast failover FCF record flag */
5873 phba->fcf.failover_rec.flag = 0;
5874 /* Set state for FCF fast failover */
5875 phba->fcf.fcf_flag |= FCF_REDISC_FOV;
5876 spin_unlock_irq(&phba->hbalock);
5877
5878 /* Scan FCF table from the first entry to re-discover SAN */
0c9ab6f5 5879 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a 5880 "2777 Start post-quiescent FCF table scan\n");
0c9ab6f5 5881 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST);
ecfd03c6 5882 if (rc)
0c9ab6f5
JS
5883 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5884 "2747 Issue FCF scan read FCF mailbox "
5885 "command failed 0x%x\n", rc);
ecfd03c6
JS
5886}
5887
da0436e9
JS
5888/**
5889 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table
5890 * @phba: pointer to lpfc hba data structure.
5891 * @dev_grp: The HBA PCI-Device group number.
5892 *
5893 * This routine is invoked to set up the per HBA PCI-Device group function
5894 * API jump table entries.
5895 *
5896 * Return: 0 if success, otherwise -ENODEV
5897 **/
5898int
5899lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
5900{
5901 int rc;
5902
5903 /* Set up lpfc PCI-device group */
5904 phba->pci_dev_grp = dev_grp;
5905
5906 /* The LPFC_PCI_DEV_OC uses SLI4 */
5907 if (dev_grp == LPFC_PCI_DEV_OC)
5908 phba->sli_rev = LPFC_SLI_REV4;
5909
5910 /* Set up device INIT API function jump table */
5911 rc = lpfc_init_api_table_setup(phba, dev_grp);
5912 if (rc)
5913 return -ENODEV;
5914 /* Set up SCSI API function jump table */
5915 rc = lpfc_scsi_api_table_setup(phba, dev_grp);
5916 if (rc)
5917 return -ENODEV;
5918 /* Set up SLI API function jump table */
5919 rc = lpfc_sli_api_table_setup(phba, dev_grp);
5920 if (rc)
5921 return -ENODEV;
5922 /* Set up MBOX API function jump table */
5923 rc = lpfc_mbox_api_table_setup(phba, dev_grp);
5924 if (rc)
5925 return -ENODEV;
5926
5927 return 0;
5b75da2f
JS
5928}
5929
5930/**
3621a710 5931 * lpfc_log_intr_mode - Log the active interrupt mode
5b75da2f
JS
5932 * @phba: pointer to lpfc hba data structure.
5933 * @intr_mode: active interrupt mode adopted.
5934 *
5935 * This routine it invoked to log the currently used active interrupt mode
5936 * to the device.
3772a991
JS
5937 **/
5938static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode)
5b75da2f
JS
5939{
5940 switch (intr_mode) {
5941 case 0:
5942 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5943 "0470 Enable INTx interrupt mode.\n");
5944 break;
5945 case 1:
5946 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5947 "0481 Enabled MSI interrupt mode.\n");
5948 break;
5949 case 2:
5950 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5951 "0480 Enabled MSI-X interrupt mode.\n");
5952 break;
5953 default:
5954 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5955 "0482 Illegal interrupt mode.\n");
5956 break;
5957 }
5958 return;
5959}
5960
5b75da2f 5961/**
3772a991 5962 * lpfc_enable_pci_dev - Enable a generic PCI device.
5b75da2f
JS
5963 * @phba: pointer to lpfc hba data structure.
5964 *
3772a991
JS
5965 * This routine is invoked to enable the PCI device that is common to all
5966 * PCI devices.
5b75da2f
JS
5967 *
5968 * Return codes
af901ca1 5969 * 0 - successful
3772a991 5970 * other values - error
5b75da2f 5971 **/
3772a991
JS
5972static int
5973lpfc_enable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5974{
3772a991 5975 struct pci_dev *pdev;
5b75da2f 5976
3772a991
JS
5977 /* Obtain PCI device reference */
5978 if (!phba->pcidev)
5979 goto out_error;
5980 else
5981 pdev = phba->pcidev;
3772a991
JS
5982 /* Enable PCI device */
5983 if (pci_enable_device_mem(pdev))
5984 goto out_error;
5985 /* Request PCI resource for the device */
e0c0483c 5986 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME))
3772a991
JS
5987 goto out_disable_device;
5988 /* Set up device as PCI master and save state for EEH */
5989 pci_set_master(pdev);
5990 pci_try_set_mwi(pdev);
5991 pci_save_state(pdev);
5b75da2f 5992
0558056c 5993 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */
453193e0 5994 if (pci_is_pcie(pdev))
0558056c
JS
5995 pdev->needs_freset = 1;
5996
3772a991 5997 return 0;
5b75da2f 5998
3772a991
JS
5999out_disable_device:
6000 pci_disable_device(pdev);
6001out_error:
079b5c91 6002 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e0c0483c 6003 "1401 Failed to enable pci device\n");
3772a991 6004 return -ENODEV;
5b75da2f
JS
6005}
6006
6007/**
3772a991 6008 * lpfc_disable_pci_dev - Disable a generic PCI device.
5b75da2f
JS
6009 * @phba: pointer to lpfc hba data structure.
6010 *
3772a991
JS
6011 * This routine is invoked to disable the PCI device that is common to all
6012 * PCI devices.
5b75da2f
JS
6013 **/
6014static void
3772a991 6015lpfc_disable_pci_dev(struct lpfc_hba *phba)
5b75da2f 6016{
3772a991 6017 struct pci_dev *pdev;
5b75da2f 6018
3772a991
JS
6019 /* Obtain PCI device reference */
6020 if (!phba->pcidev)
6021 return;
6022 else
6023 pdev = phba->pcidev;
3772a991 6024 /* Release PCI resource and disable PCI device */
e0c0483c 6025 pci_release_mem_regions(pdev);
3772a991 6026 pci_disable_device(pdev);
5b75da2f
JS
6027
6028 return;
6029}
6030
e59058c4 6031/**
3772a991
JS
6032 * lpfc_reset_hba - Reset a hba
6033 * @phba: pointer to lpfc hba data structure.
e59058c4 6034 *
3772a991
JS
6035 * This routine is invoked to reset a hba device. It brings the HBA
6036 * offline, performs a board restart, and then brings the board back
6037 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up
6038 * on outstanding mailbox commands.
e59058c4 6039 **/
3772a991
JS
6040void
6041lpfc_reset_hba(struct lpfc_hba *phba)
dea3101e 6042{
3772a991
JS
6043 /* If resets are disabled then set error state and return. */
6044 if (!phba->cfg_enable_hba_reset) {
6045 phba->link_state = LPFC_HBA_ERROR;
6046 return;
6047 }
ee62021a
JS
6048 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
6049 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
6050 else
6051 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
3772a991
JS
6052 lpfc_offline(phba);
6053 lpfc_sli_brdrestart(phba);
6054 lpfc_online(phba);
6055 lpfc_unblock_mgmt_io(phba);
6056}
dea3101e 6057
0a96e975
JS
6058/**
6059 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions
6060 * @phba: pointer to lpfc hba data structure.
6061 *
6062 * This function enables the PCI SR-IOV virtual functions to a physical
6063 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
6064 * enable the number of virtual functions to the physical function. As
6065 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
6066 * API call does not considered as an error condition for most of the device.
6067 **/
6068uint16_t
6069lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba)
6070{
6071 struct pci_dev *pdev = phba->pcidev;
6072 uint16_t nr_virtfn;
6073 int pos;
6074
0a96e975
JS
6075 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
6076 if (pos == 0)
6077 return 0;
6078
6079 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn);
6080 return nr_virtfn;
6081}
6082
912e3acd
JS
6083/**
6084 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions
6085 * @phba: pointer to lpfc hba data structure.
6086 * @nr_vfn: number of virtual functions to be enabled.
6087 *
6088 * This function enables the PCI SR-IOV virtual functions to a physical
6089 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
6090 * enable the number of virtual functions to the physical function. As
6091 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
6092 * API call does not considered as an error condition for most of the device.
6093 **/
6094int
6095lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn)
6096{
6097 struct pci_dev *pdev = phba->pcidev;
0a96e975 6098 uint16_t max_nr_vfn;
912e3acd
JS
6099 int rc;
6100
0a96e975
JS
6101 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba);
6102 if (nr_vfn > max_nr_vfn) {
6103 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6104 "3057 Requested vfs (%d) greater than "
6105 "supported vfs (%d)", nr_vfn, max_nr_vfn);
6106 return -EINVAL;
6107 }
6108
912e3acd
JS
6109 rc = pci_enable_sriov(pdev, nr_vfn);
6110 if (rc) {
6111 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6112 "2806 Failed to enable sriov on this device "
6113 "with vfn number nr_vf:%d, rc:%d\n",
6114 nr_vfn, rc);
6115 } else
6116 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6117 "2807 Successful enable sriov on this device "
6118 "with vfn number nr_vf:%d\n", nr_vfn);
6119 return rc;
6120}
6121
3772a991 6122/**
895427bd 6123 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources.
3772a991
JS
6124 * @phba: pointer to lpfc hba data structure.
6125 *
895427bd
JS
6126 * This routine is invoked to set up the driver internal resources before the
6127 * device specific resource setup to support the HBA device it attached to.
3772a991
JS
6128 *
6129 * Return codes
895427bd
JS
6130 * 0 - successful
6131 * other values - error
3772a991
JS
6132 **/
6133static int
895427bd 6134lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
3772a991 6135{
895427bd 6136 struct lpfc_sli *psli = &phba->sli;
dea3101e 6137
2e0fef85 6138 /*
895427bd 6139 * Driver resources common to all SLI revisions
2e0fef85 6140 */
895427bd
JS
6141 atomic_set(&phba->fast_event_count, 0);
6142 spin_lock_init(&phba->hbalock);
dea3101e 6143
895427bd
JS
6144 /* Initialize ndlp management spinlock */
6145 spin_lock_init(&phba->ndlp_lock);
6146
523128e5
JS
6147 /* Initialize port_list spinlock */
6148 spin_lock_init(&phba->port_list_lock);
895427bd 6149 INIT_LIST_HEAD(&phba->port_list);
523128e5 6150
895427bd
JS
6151 INIT_LIST_HEAD(&phba->work_list);
6152 init_waitqueue_head(&phba->wait_4_mlo_m_q);
6153
6154 /* Initialize the wait queue head for the kernel thread */
6155 init_waitqueue_head(&phba->work_waitq);
6156
6157 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
f358dd0c 6158 "1403 Protocols supported %s %s %s\n",
895427bd
JS
6159 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ?
6160 "SCSI" : " "),
6161 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ?
f358dd0c
JS
6162 "NVME" : " "),
6163 (phba->nvmet_support ? "NVMET" : " "));
895427bd 6164
0794d601
JS
6165 /* Initialize the IO buffer list used by driver for SLI3 SCSI */
6166 spin_lock_init(&phba->scsi_buf_list_get_lock);
6167 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get);
6168 spin_lock_init(&phba->scsi_buf_list_put_lock);
6169 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
895427bd 6170
895427bd
JS
6171 /* Initialize the fabric iocb list */
6172 INIT_LIST_HEAD(&phba->fabric_iocb_list);
6173
6174 /* Initialize list to save ELS buffers */
6175 INIT_LIST_HEAD(&phba->elsbuf);
6176
6177 /* Initialize FCF connection rec list */
6178 INIT_LIST_HEAD(&phba->fcf_conn_rec_list);
6179
6180 /* Initialize OAS configuration list */
6181 spin_lock_init(&phba->devicelock);
6182 INIT_LIST_HEAD(&phba->luns);
858c9f6c 6183
3772a991 6184 /* MBOX heartbeat timer */
f22eb4d3 6185 timer_setup(&psli->mbox_tmo, lpfc_mbox_timeout, 0);
3772a991 6186 /* Fabric block timer */
f22eb4d3 6187 timer_setup(&phba->fabric_block_timer, lpfc_fabric_block_timeout, 0);
3772a991 6188 /* EA polling mode timer */
f22eb4d3 6189 timer_setup(&phba->eratt_poll, lpfc_poll_eratt, 0);
895427bd 6190 /* Heartbeat timer */
f22eb4d3 6191 timer_setup(&phba->hb_tmofunc, lpfc_hb_timeout, 0);
895427bd 6192
32517fc0
JS
6193 INIT_DELAYED_WORK(&phba->eq_delay_work, lpfc_hb_eq_delay_work);
6194
895427bd
JS
6195 return 0;
6196}
6197
6198/**
6199 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev
6200 * @phba: pointer to lpfc hba data structure.
6201 *
6202 * This routine is invoked to set up the driver internal resources specific to
6203 * support the SLI-3 HBA device it attached to.
6204 *
6205 * Return codes
6206 * 0 - successful
6207 * other values - error
6208 **/
6209static int
6210lpfc_sli_driver_resource_setup(struct lpfc_hba *phba)
6211{
0794d601 6212 int rc, entry_sz;
895427bd
JS
6213
6214 /*
6215 * Initialize timers used by driver
6216 */
6217
6218 /* FCP polling mode timer */
f22eb4d3 6219 timer_setup(&phba->fcp_poll_timer, lpfc_poll_timeout, 0);
dea3101e 6220
3772a991
JS
6221 /* Host attention work mask setup */
6222 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT);
6223 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
dea3101e 6224
3772a991
JS
6225 /* Get all the module params for configuring this host */
6226 lpfc_get_cfgparam(phba);
895427bd
JS
6227 /* Set up phase-1 common device driver resources */
6228
6229 rc = lpfc_setup_driver_resource_phase1(phba);
6230 if (rc)
6231 return -ENODEV;
6232
49198b37
JS
6233 if (phba->pcidev->device == PCI_DEVICE_ID_HORNET) {
6234 phba->menlo_flag |= HBA_MENLO_SUPPORT;
6235 /* check for menlo minimum sg count */
6236 if (phba->cfg_sg_seg_cnt < LPFC_DEFAULT_MENLO_SG_SEG_CNT)
6237 phba->cfg_sg_seg_cnt = LPFC_DEFAULT_MENLO_SG_SEG_CNT;
6238 }
6239
895427bd 6240 if (!phba->sli.sli3_ring)
6396bb22
KC
6241 phba->sli.sli3_ring = kcalloc(LPFC_SLI3_MAX_RING,
6242 sizeof(struct lpfc_sli_ring),
6243 GFP_KERNEL);
895427bd 6244 if (!phba->sli.sli3_ring)
2a76a283
JS
6245 return -ENOMEM;
6246
dea3101e 6247 /*
96f7077f 6248 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size
3772a991 6249 * used to create the sg_dma_buf_pool must be dynamically calculated.
dea3101e 6250 */
3772a991 6251
96f7077f
JS
6252 /* Initialize the host templates the configured values. */
6253 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96418b5e
JS
6254 lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt;
6255 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f 6256
0794d601
JS
6257 if (phba->sli_rev == LPFC_SLI_REV4)
6258 entry_sz = sizeof(struct sli4_sge);
6259 else
6260 entry_sz = sizeof(struct ulp_bde64);
6261
96f7077f 6262 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */
3772a991 6263 if (phba->cfg_enable_bg) {
96f7077f
JS
6264 /*
6265 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd,
6266 * the FCP rsp, and a BDE for each. Sice we have no control
6267 * over how many protection data segments the SCSI Layer
6268 * will hand us (ie: there could be one for every block
6269 * in the IO), we just allocate enough BDEs to accomidate
6270 * our max amount and we need to limit lpfc_sg_seg_cnt to
6271 * minimize the risk of running out.
6272 */
6273 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
6274 sizeof(struct fcp_rsp) +
0794d601 6275 (LPFC_MAX_SG_SEG_CNT * entry_sz);
96f7077f
JS
6276
6277 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF)
6278 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF;
6279
6280 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */
6281 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT;
6282 } else {
6283 /*
6284 * The scsi_buf for a regular I/O will hold the FCP cmnd,
6285 * the FCP rsp, a BDE for each, and a BDE for up to
6286 * cfg_sg_seg_cnt data segments.
6287 */
6288 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
6289 sizeof(struct fcp_rsp) +
0794d601 6290 ((phba->cfg_sg_seg_cnt + 2) * entry_sz);
96f7077f
JS
6291
6292 /* Total BDEs in BPL for scsi_sg_list */
6293 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
901a920f 6294 }
dea3101e 6295
96f7077f
JS
6296 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
6297 "9088 sg_tablesize:%d dmabuf_size:%d total_bde:%d\n",
6298 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
6299 phba->cfg_total_seg_cnt);
dea3101e 6300
3772a991
JS
6301 phba->max_vpi = LPFC_MAX_VPI;
6302 /* This will be set to correct value after config_port mbox */
6303 phba->max_vports = 0;
dea3101e 6304
3772a991
JS
6305 /*
6306 * Initialize the SLI Layer to run with lpfc HBAs.
6307 */
6308 lpfc_sli_setup(phba);
895427bd 6309 lpfc_sli_queue_init(phba);
ed957684 6310
3772a991
JS
6311 /* Allocate device driver memory */
6312 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ))
6313 return -ENOMEM;
51ef4c26 6314
912e3acd
JS
6315 /*
6316 * Enable sr-iov virtual functions if supported and configured
6317 * through the module parameter.
6318 */
6319 if (phba->cfg_sriov_nr_virtfn > 0) {
6320 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
6321 phba->cfg_sriov_nr_virtfn);
6322 if (rc) {
6323 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6324 "2808 Requested number of SR-IOV "
6325 "virtual functions (%d) is not "
6326 "supported\n",
6327 phba->cfg_sriov_nr_virtfn);
6328 phba->cfg_sriov_nr_virtfn = 0;
6329 }
6330 }
6331
3772a991
JS
6332 return 0;
6333}
ed957684 6334
3772a991
JS
6335/**
6336 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev
6337 * @phba: pointer to lpfc hba data structure.
6338 *
6339 * This routine is invoked to unset the driver internal resources set up
6340 * specific for supporting the SLI-3 HBA device it attached to.
6341 **/
6342static void
6343lpfc_sli_driver_resource_unset(struct lpfc_hba *phba)
6344{
6345 /* Free device driver memory allocated */
6346 lpfc_mem_free_all(phba);
3163f725 6347
3772a991
JS
6348 return;
6349}
dea3101e 6350
3772a991 6351/**
da0436e9 6352 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev
3772a991
JS
6353 * @phba: pointer to lpfc hba data structure.
6354 *
da0436e9
JS
6355 * This routine is invoked to set up the driver internal resources specific to
6356 * support the SLI-4 HBA device it attached to.
3772a991
JS
6357 *
6358 * Return codes
af901ca1 6359 * 0 - successful
da0436e9 6360 * other values - error
3772a991
JS
6361 **/
6362static int
da0436e9 6363lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
3772a991 6364{
28baac74 6365 LPFC_MBOXQ_t *mboxq;
f358dd0c 6366 MAILBOX_t *mb;
895427bd 6367 int rc, i, max_buf_size;
28baac74
JS
6368 uint8_t pn_page[LPFC_MAX_SUPPORTED_PAGES] = {0};
6369 struct lpfc_mqe *mqe;
09294d46 6370 int longs;
81e6a637 6371 int extra;
f358dd0c 6372 uint64_t wwn;
b92dc72d
JS
6373 u32 if_type;
6374 u32 if_fam;
da0436e9 6375
895427bd
JS
6376 phba->sli4_hba.num_online_cpu = num_online_cpus();
6377 phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
6378 phba->sli4_hba.curr_disp_cpu = 0;
6379
716d3bc5
JS
6380 /* Get all the module params for configuring this host */
6381 lpfc_get_cfgparam(phba);
6382
895427bd
JS
6383 /* Set up phase-1 common device driver resources */
6384 rc = lpfc_setup_driver_resource_phase1(phba);
6385 if (rc)
6386 return -ENODEV;
6387
da0436e9
JS
6388 /* Before proceed, wait for POST done and device ready */
6389 rc = lpfc_sli4_post_status_check(phba);
6390 if (rc)
6391 return -ENODEV;
6392
3772a991 6393 /*
da0436e9 6394 * Initialize timers used by driver
3772a991 6395 */
3772a991 6396
f22eb4d3 6397 timer_setup(&phba->rrq_tmr, lpfc_rrq_timeout, 0);
3772a991 6398
ecfd03c6 6399 /* FCF rediscover timer */
f22eb4d3 6400 timer_setup(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo, 0);
ecfd03c6 6401
7ad20aa9
JS
6402 /*
6403 * Control structure for handling external multi-buffer mailbox
6404 * command pass-through.
6405 */
6406 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0,
6407 sizeof(struct lpfc_mbox_ext_buf_ctx));
6408 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list);
6409
da0436e9 6410 phba->max_vpi = LPFC_MAX_VPI;
67d12733 6411
da0436e9
JS
6412 /* This will be set to correct value after the read_config mbox */
6413 phba->max_vports = 0;
3772a991 6414
da0436e9
JS
6415 /* Program the default value of vlan_id and fc_map */
6416 phba->valid_vlan = 0;
6417 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
6418 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
6419 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
3772a991 6420
2a76a283
JS
6421 /*
6422 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands
895427bd
JS
6423 * we will associate a new ring, for each EQ/CQ/WQ tuple.
6424 * The WQ create will allocate the ring.
2a76a283 6425 */
09294d46 6426
81e6a637
JS
6427 /*
6428 * 1 for cmd, 1 for rsp, NVME adds an extra one
6429 * for boundary conditions in its max_sgl_segment template.
6430 */
6431 extra = 2;
6432 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
6433 extra++;
6434
da0436e9 6435 /*
09294d46
JS
6436 * It doesn't matter what family our adapter is in, we are
6437 * limited to 2 Pages, 512 SGEs, for our SGL.
6438 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp
6439 */
6440 max_buf_size = (2 * SLI4_PAGE_SIZE);
09294d46 6441
da0436e9 6442 /*
895427bd
JS
6443 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size
6444 * used to create the sg_dma_buf_pool must be calculated.
da0436e9 6445 */
f44ac12f 6446 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
96f7077f 6447 /*
895427bd
JS
6448 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd,
6449 * the FCP rsp, and a SGE. Sice we have no control
6450 * over how many protection segments the SCSI Layer
96f7077f 6451 * will hand us (ie: there could be one for every block
895427bd
JS
6452 * in the IO), just allocate enough SGEs to accomidate
6453 * our max amount and we need to limit lpfc_sg_seg_cnt
6454 * to minimize the risk of running out.
96f7077f
JS
6455 */
6456 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd 6457 sizeof(struct fcp_rsp) + max_buf_size;
96f7077f
JS
6458
6459 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */
6460 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT;
6461
5b9e70b2
JS
6462 /*
6463 * If supporting DIF, reduce the seg count for scsi to
6464 * allow room for the DIF sges.
6465 */
6466 if (phba->cfg_enable_bg &&
6467 phba->cfg_sg_seg_cnt > LPFC_MAX_BG_SLI4_SEG_CNT_DIF)
6468 phba->cfg_scsi_seg_cnt = LPFC_MAX_BG_SLI4_SEG_CNT_DIF;
6469 else
6470 phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt;
6471
96f7077f
JS
6472 } else {
6473 /*
895427bd 6474 * The scsi_buf for a regular I/O holds the FCP cmnd,
96f7077f
JS
6475 * the FCP rsp, a SGE for each, and a SGE for up to
6476 * cfg_sg_seg_cnt data segments.
6477 */
6478 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd 6479 sizeof(struct fcp_rsp) +
81e6a637 6480 ((phba->cfg_sg_seg_cnt + extra) *
895427bd 6481 sizeof(struct sli4_sge));
96f7077f
JS
6482
6483 /* Total SGEs for scsi_sg_list */
81e6a637 6484 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + extra;
5b9e70b2 6485 phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt;
895427bd 6486
96f7077f 6487 /*
81e6a637 6488 * NOTE: if (phba->cfg_sg_seg_cnt + extra) <= 256 we only
895427bd 6489 * need to post 1 page for the SGL.
96f7077f 6490 */
085c647c 6491 }
acd6859b 6492
5b9e70b2
JS
6493 /* Limit to LPFC_MAX_NVME_SEG_CNT for NVME. */
6494 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
6495 if (phba->cfg_sg_seg_cnt > LPFC_MAX_NVME_SEG_CNT) {
6496 lpfc_printf_log(phba, KERN_INFO, LOG_NVME | LOG_INIT,
6497 "6300 Reducing NVME sg segment "
6498 "cnt to %d\n",
6499 LPFC_MAX_NVME_SEG_CNT);
6500 phba->cfg_nvme_seg_cnt = LPFC_MAX_NVME_SEG_CNT;
6501 } else
6502 phba->cfg_nvme_seg_cnt = phba->cfg_sg_seg_cnt;
6503 }
6504
96f7077f 6505 /* Initialize the host templates with the updated values. */
5b9e70b2
JS
6506 lpfc_vport_template.sg_tablesize = phba->cfg_scsi_seg_cnt;
6507 lpfc_template.sg_tablesize = phba->cfg_scsi_seg_cnt;
6508 lpfc_template_no_hr.sg_tablesize = phba->cfg_scsi_seg_cnt;
96f7077f
JS
6509
6510 if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ)
6511 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ;
6512 else
6513 phba->cfg_sg_dma_buf_size =
6514 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size);
6515
6516 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5b9e70b2
JS
6517 "9087 sg_seg_cnt:%d dmabuf_size:%d "
6518 "total:%d scsi:%d nvme:%d\n",
96f7077f 6519 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5b9e70b2
JS
6520 phba->cfg_total_seg_cnt, phba->cfg_scsi_seg_cnt,
6521 phba->cfg_nvme_seg_cnt);
3772a991 6522
da0436e9 6523 /* Initialize buffer queue management fields */
895427bd 6524 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list);
da0436e9
JS
6525 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc;
6526 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free;
3772a991 6527
da0436e9
JS
6528 /*
6529 * Initialize the SLI Layer to run with lpfc SLI4 HBAs.
6530 */
895427bd
JS
6531 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
6532 /* Initialize the Abort scsi buffer list used by driver */
6533 spin_lock_init(&phba->sli4_hba.abts_scsi_buf_list_lock);
6534 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
6535 }
6536
6537 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
6538 /* Initialize the Abort nvme buffer list used by driver */
5e5b511d 6539 spin_lock_init(&phba->sli4_hba.abts_nvmet_buf_list_lock);
86c67379 6540 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
a8cf5dfe 6541 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list);
895427bd
JS
6542 }
6543
da0436e9 6544 /* This abort list used by worker thread */
895427bd 6545 spin_lock_init(&phba->sli4_hba.sgl_list_lock);
a8cf5dfe 6546 spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock);
3772a991 6547
da0436e9 6548 /*
6d368e53 6549 * Initialize driver internal slow-path work queues
da0436e9 6550 */
3772a991 6551
da0436e9
JS
6552 /* Driver internel slow-path CQ Event pool */
6553 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
6554 /* Response IOCB work queue list */
45ed1190 6555 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
da0436e9
JS
6556 /* Asynchronous event CQ Event work queue list */
6557 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
6558 /* Fast-path XRI aborted CQ Event work queue list */
6559 INIT_LIST_HEAD(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue);
6560 /* Slow-path XRI aborted CQ Event work queue list */
6561 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
6562 /* Receive queue CQ Event work queue list */
6563 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
6564
6d368e53
JS
6565 /* Initialize extent block lists. */
6566 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
6567 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
6568 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
6569 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list);
6570
d1f525aa
JS
6571 /* Initialize mboxq lists. If the early init routines fail
6572 * these lists need to be correctly initialized.
6573 */
6574 INIT_LIST_HEAD(&phba->sli.mboxq);
6575 INIT_LIST_HEAD(&phba->sli.mboxq_cmpl);
6576
448193b5
JS
6577 /* initialize optic_state to 0xFF */
6578 phba->sli4_hba.lnk_info.optic_state = 0xff;
6579
da0436e9
JS
6580 /* Allocate device driver memory */
6581 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ);
6582 if (rc)
6583 return -ENOMEM;
6584
2fcee4bf 6585 /* IF Type 2 ports get initialized now. */
27d6ac0a 6586 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >=
2fcee4bf
JS
6587 LPFC_SLI_INTF_IF_TYPE_2) {
6588 rc = lpfc_pci_function_reset(phba);
895427bd
JS
6589 if (unlikely(rc)) {
6590 rc = -ENODEV;
6591 goto out_free_mem;
6592 }
946727dc 6593 phba->temp_sensor_support = 1;
2fcee4bf
JS
6594 }
6595
da0436e9
JS
6596 /* Create the bootstrap mailbox command */
6597 rc = lpfc_create_bootstrap_mbox(phba);
6598 if (unlikely(rc))
6599 goto out_free_mem;
6600
6601 /* Set up the host's endian order with the device. */
6602 rc = lpfc_setup_endian_order(phba);
6603 if (unlikely(rc))
6604 goto out_free_bsmbx;
6605
6606 /* Set up the hba's configuration parameters. */
6607 rc = lpfc_sli4_read_config(phba);
cff261f6
JS
6608 if (unlikely(rc))
6609 goto out_free_bsmbx;
6610 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba);
da0436e9
JS
6611 if (unlikely(rc))
6612 goto out_free_bsmbx;
6613
2fcee4bf
JS
6614 /* IF Type 0 ports get initialized now. */
6615 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
6616 LPFC_SLI_INTF_IF_TYPE_0) {
6617 rc = lpfc_pci_function_reset(phba);
6618 if (unlikely(rc))
6619 goto out_free_bsmbx;
6620 }
da0436e9 6621
cb5172ea
JS
6622 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
6623 GFP_KERNEL);
6624 if (!mboxq) {
6625 rc = -ENOMEM;
6626 goto out_free_bsmbx;
6627 }
6628
f358dd0c 6629 /* Check for NVMET being configured */
895427bd 6630 phba->nvmet_support = 0;
f358dd0c
JS
6631 if (lpfc_enable_nvmet_cnt) {
6632
6633 /* First get WWN of HBA instance */
6634 lpfc_read_nv(phba, mboxq);
6635 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
6636 if (rc != MBX_SUCCESS) {
6637 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6638 "6016 Mailbox failed , mbxCmd x%x "
6639 "READ_NV, mbxStatus x%x\n",
6640 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
6641 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
d1f525aa 6642 mempool_free(mboxq, phba->mbox_mem_pool);
f358dd0c
JS
6643 rc = -EIO;
6644 goto out_free_bsmbx;
6645 }
6646 mb = &mboxq->u.mb;
6647 memcpy(&wwn, (char *)mb->un.varRDnvp.nodename,
6648 sizeof(uint64_t));
6649 wwn = cpu_to_be64(wwn);
6650 phba->sli4_hba.wwnn.u.name = wwn;
6651 memcpy(&wwn, (char *)mb->un.varRDnvp.portname,
6652 sizeof(uint64_t));
6653 /* wwn is WWPN of HBA instance */
6654 wwn = cpu_to_be64(wwn);
6655 phba->sli4_hba.wwpn.u.name = wwn;
6656
6657 /* Check to see if it matches any module parameter */
6658 for (i = 0; i < lpfc_enable_nvmet_cnt; i++) {
6659 if (wwn == lpfc_enable_nvmet[i]) {
7d708033 6660#if (IS_ENABLED(CONFIG_NVME_TARGET_FC))
3c603be9
JS
6661 if (lpfc_nvmet_mem_alloc(phba))
6662 break;
6663
6664 phba->nvmet_support = 1; /* a match */
6665
f358dd0c
JS
6666 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6667 "6017 NVME Target %016llx\n",
6668 wwn);
7d708033
JS
6669#else
6670 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6671 "6021 Can't enable NVME Target."
6672 " NVME_TARGET_FC infrastructure"
6673 " is not in kernel\n");
6674#endif
c490850a
JS
6675 /* Not supported for NVMET */
6676 phba->cfg_xri_rebalancing = 0;
3c603be9 6677 break;
f358dd0c
JS
6678 }
6679 }
6680 }
895427bd
JS
6681
6682 lpfc_nvme_mod_param_dep(phba);
6683
fedd3b7b 6684 /* Get the Supported Pages if PORT_CAPABILITIES is supported by port. */
cb5172ea
JS
6685 lpfc_supported_pages(mboxq);
6686 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
fedd3b7b
JS
6687 if (!rc) {
6688 mqe = &mboxq->u.mqe;
6689 memcpy(&pn_page[0], ((uint8_t *)&mqe->un.supp_pages.word3),
6690 LPFC_MAX_SUPPORTED_PAGES);
6691 for (i = 0; i < LPFC_MAX_SUPPORTED_PAGES; i++) {
6692 switch (pn_page[i]) {
6693 case LPFC_SLI4_PARAMETERS:
6694 phba->sli4_hba.pc_sli4_params.supported = 1;
6695 break;
6696 default:
6697 break;
6698 }
6699 }
6700 /* Read the port's SLI4 Parameters capabilities if supported. */
6701 if (phba->sli4_hba.pc_sli4_params.supported)
6702 rc = lpfc_pc_sli4_params_get(phba, mboxq);
6703 if (rc) {
6704 mempool_free(mboxq, phba->mbox_mem_pool);
6705 rc = -EIO;
6706 goto out_free_bsmbx;
cb5172ea
JS
6707 }
6708 }
65791f1f 6709
fedd3b7b
JS
6710 /*
6711 * Get sli4 parameters that override parameters from Port capabilities.
6d368e53
JS
6712 * If this call fails, it isn't critical unless the SLI4 parameters come
6713 * back in conflict.
fedd3b7b 6714 */
6d368e53
JS
6715 rc = lpfc_get_sli4_parameters(phba, mboxq);
6716 if (rc) {
b92dc72d
JS
6717 if_type = bf_get(lpfc_sli_intf_if_type,
6718 &phba->sli4_hba.sli_intf);
6719 if_fam = bf_get(lpfc_sli_intf_sli_family,
6720 &phba->sli4_hba.sli_intf);
6d368e53
JS
6721 if (phba->sli4_hba.extents_in_use &&
6722 phba->sli4_hba.rpi_hdrs_in_use) {
6723 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6724 "2999 Unsupported SLI4 Parameters "
6725 "Extents and RPI headers enabled.\n");
b92dc72d
JS
6726 if (if_type == LPFC_SLI_INTF_IF_TYPE_0 &&
6727 if_fam == LPFC_SLI_INTF_FAMILY_BE2) {
6728 mempool_free(mboxq, phba->mbox_mem_pool);
6729 rc = -EIO;
6730 goto out_free_bsmbx;
6731 }
6732 }
6733 if (!(if_type == LPFC_SLI_INTF_IF_TYPE_0 &&
6734 if_fam == LPFC_SLI_INTF_FAMILY_BE2)) {
6735 mempool_free(mboxq, phba->mbox_mem_pool);
6736 rc = -EIO;
6737 goto out_free_bsmbx;
6d368e53
JS
6738 }
6739 }
895427bd 6740
cb5172ea 6741 mempool_free(mboxq, phba->mbox_mem_pool);
1ba981fd
JS
6742
6743 /* Verify OAS is supported */
6744 lpfc_sli4_oas_verify(phba);
1ba981fd 6745
d2cc9bcd
JS
6746 /* Verify RAS support on adapter */
6747 lpfc_sli4_ras_init(phba);
6748
5350d872
JS
6749 /* Verify all the SLI4 queues */
6750 rc = lpfc_sli4_queue_verify(phba);
da0436e9
JS
6751 if (rc)
6752 goto out_free_bsmbx;
6753
6754 /* Create driver internal CQE event pool */
6755 rc = lpfc_sli4_cq_event_pool_create(phba);
6756 if (rc)
5350d872 6757 goto out_free_bsmbx;
da0436e9 6758
8a9d2e80
JS
6759 /* Initialize sgl lists per host */
6760 lpfc_init_sgl_list(phba);
6761
6762 /* Allocate and initialize active sgl array */
da0436e9
JS
6763 rc = lpfc_init_active_sgl_array(phba);
6764 if (rc) {
6765 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6766 "1430 Failed to initialize sgl list.\n");
8a9d2e80 6767 goto out_destroy_cq_event_pool;
da0436e9 6768 }
da0436e9
JS
6769 rc = lpfc_sli4_init_rpi_hdrs(phba);
6770 if (rc) {
6771 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6772 "1432 Failed to initialize rpi headers.\n");
6773 goto out_free_active_sgl;
6774 }
6775
a93ff37a 6776 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */
0c9ab6f5 6777 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG;
6396bb22 6778 phba->fcf.fcf_rr_bmask = kcalloc(longs, sizeof(unsigned long),
0c9ab6f5
JS
6779 GFP_KERNEL);
6780 if (!phba->fcf.fcf_rr_bmask) {
6781 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6782 "2759 Failed allocate memory for FCF round "
6783 "robin failover bmask\n");
0558056c 6784 rc = -ENOMEM;
0c9ab6f5
JS
6785 goto out_remove_rpi_hdrs;
6786 }
6787
6a828b0f 6788 phba->sli4_hba.hba_eq_hdl = kcalloc(phba->cfg_irq_chann,
cdb42bec
JS
6789 sizeof(struct lpfc_hba_eq_hdl),
6790 GFP_KERNEL);
895427bd 6791 if (!phba->sli4_hba.hba_eq_hdl) {
67d12733
JS
6792 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6793 "2572 Failed allocate memory for "
6794 "fast-path per-EQ handle array\n");
6795 rc = -ENOMEM;
6796 goto out_free_fcf_rr_bmask;
da0436e9
JS
6797 }
6798
895427bd
JS
6799 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_present_cpu,
6800 sizeof(struct lpfc_vector_map_info),
6801 GFP_KERNEL);
7bb03bbf
JS
6802 if (!phba->sli4_hba.cpu_map) {
6803 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6804 "3327 Failed allocate memory for msi-x "
6805 "interrupt vector mapping\n");
6806 rc = -ENOMEM;
895427bd 6807 goto out_free_hba_eq_hdl;
7bb03bbf 6808 }
b246de17 6809
32517fc0
JS
6810 phba->sli4_hba.eq_info = alloc_percpu(struct lpfc_eq_intr_info);
6811 if (!phba->sli4_hba.eq_info) {
6812 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6813 "3321 Failed allocation for per_cpu stats\n");
6814 rc = -ENOMEM;
6815 goto out_free_hba_cpu_map;
6816 }
912e3acd
JS
6817 /*
6818 * Enable sr-iov virtual functions if supported and configured
6819 * through the module parameter.
6820 */
6821 if (phba->cfg_sriov_nr_virtfn > 0) {
6822 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
6823 phba->cfg_sriov_nr_virtfn);
6824 if (rc) {
6825 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6826 "3020 Requested number of SR-IOV "
6827 "virtual functions (%d) is not "
6828 "supported\n",
6829 phba->cfg_sriov_nr_virtfn);
6830 phba->cfg_sriov_nr_virtfn = 0;
6831 }
6832 }
6833
5248a749 6834 return 0;
da0436e9 6835
32517fc0
JS
6836out_free_hba_cpu_map:
6837 kfree(phba->sli4_hba.cpu_map);
895427bd
JS
6838out_free_hba_eq_hdl:
6839 kfree(phba->sli4_hba.hba_eq_hdl);
0c9ab6f5
JS
6840out_free_fcf_rr_bmask:
6841 kfree(phba->fcf.fcf_rr_bmask);
da0436e9
JS
6842out_remove_rpi_hdrs:
6843 lpfc_sli4_remove_rpi_hdrs(phba);
6844out_free_active_sgl:
6845 lpfc_free_active_sgl(phba);
da0436e9
JS
6846out_destroy_cq_event_pool:
6847 lpfc_sli4_cq_event_pool_destroy(phba);
da0436e9
JS
6848out_free_bsmbx:
6849 lpfc_destroy_bootstrap_mbox(phba);
6850out_free_mem:
6851 lpfc_mem_free(phba);
6852 return rc;
6853}
6854
6855/**
6856 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev
6857 * @phba: pointer to lpfc hba data structure.
6858 *
6859 * This routine is invoked to unset the driver internal resources set up
6860 * specific for supporting the SLI-4 HBA device it attached to.
6861 **/
6862static void
6863lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
6864{
6865 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry;
6866
32517fc0
JS
6867 free_percpu(phba->sli4_hba.eq_info);
6868
7bb03bbf
JS
6869 /* Free memory allocated for msi-x interrupt vector to CPU mapping */
6870 kfree(phba->sli4_hba.cpu_map);
6871 phba->sli4_hba.num_present_cpu = 0;
6872 phba->sli4_hba.num_online_cpu = 0;
76fd07a6 6873 phba->sli4_hba.curr_disp_cpu = 0;
7bb03bbf 6874
da0436e9 6875 /* Free memory allocated for fast-path work queue handles */
895427bd 6876 kfree(phba->sli4_hba.hba_eq_hdl);
da0436e9
JS
6877
6878 /* Free the allocated rpi headers. */
6879 lpfc_sli4_remove_rpi_hdrs(phba);
d11e31dd 6880 lpfc_sli4_remove_rpis(phba);
da0436e9 6881
0c9ab6f5
JS
6882 /* Free eligible FCF index bmask */
6883 kfree(phba->fcf.fcf_rr_bmask);
6884
da0436e9
JS
6885 /* Free the ELS sgl list */
6886 lpfc_free_active_sgl(phba);
8a9d2e80 6887 lpfc_free_els_sgl_list(phba);
f358dd0c 6888 lpfc_free_nvmet_sgl_list(phba);
da0436e9 6889
da0436e9
JS
6890 /* Free the completion queue EQ event pool */
6891 lpfc_sli4_cq_event_release_all(phba);
6892 lpfc_sli4_cq_event_pool_destroy(phba);
6893
6d368e53
JS
6894 /* Release resource identifiers. */
6895 lpfc_sli4_dealloc_resource_identifiers(phba);
6896
da0436e9
JS
6897 /* Free the bsmbx region. */
6898 lpfc_destroy_bootstrap_mbox(phba);
6899
6900 /* Free the SLI Layer memory with SLI4 HBAs */
6901 lpfc_mem_free_all(phba);
6902
6903 /* Free the current connect table */
6904 list_for_each_entry_safe(conn_entry, next_conn_entry,
4d9ab994
JS
6905 &phba->fcf_conn_rec_list, list) {
6906 list_del_init(&conn_entry->list);
da0436e9 6907 kfree(conn_entry);
4d9ab994 6908 }
da0436e9
JS
6909
6910 return;
6911}
6912
6913/**
25985edc 6914 * lpfc_init_api_table_setup - Set up init api function jump table
da0436e9
JS
6915 * @phba: The hba struct for which this call is being executed.
6916 * @dev_grp: The HBA PCI-Device group number.
6917 *
6918 * This routine sets up the device INIT interface API function jump table
6919 * in @phba struct.
6920 *
6921 * Returns: 0 - success, -ENODEV - failure.
6922 **/
6923int
6924lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
6925{
84d1b006
JS
6926 phba->lpfc_hba_init_link = lpfc_hba_init_link;
6927 phba->lpfc_hba_down_link = lpfc_hba_down_link;
7f86059a 6928 phba->lpfc_selective_reset = lpfc_selective_reset;
da0436e9
JS
6929 switch (dev_grp) {
6930 case LPFC_PCI_DEV_LP:
6931 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3;
6932 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3;
6933 phba->lpfc_stop_port = lpfc_stop_port_s3;
6934 break;
6935 case LPFC_PCI_DEV_OC:
6936 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4;
6937 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4;
6938 phba->lpfc_stop_port = lpfc_stop_port_s4;
6939 break;
6940 default:
6941 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6942 "1431 Invalid HBA PCI-device group: 0x%x\n",
6943 dev_grp);
6944 return -ENODEV;
6945 break;
6946 }
6947 return 0;
6948}
6949
da0436e9
JS
6950/**
6951 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources.
6952 * @phba: pointer to lpfc hba data structure.
6953 *
6954 * This routine is invoked to set up the driver internal resources after the
6955 * device specific resource setup to support the HBA device it attached to.
6956 *
6957 * Return codes
af901ca1 6958 * 0 - successful
da0436e9
JS
6959 * other values - error
6960 **/
6961static int
6962lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba)
6963{
6964 int error;
6965
6966 /* Startup the kernel thread for this host adapter. */
6967 phba->worker_thread = kthread_run(lpfc_do_work, phba,
6968 "lpfc_worker_%d", phba->brd_no);
6969 if (IS_ERR(phba->worker_thread)) {
6970 error = PTR_ERR(phba->worker_thread);
6971 return error;
3772a991
JS
6972 }
6973
0cdb84ec
JS
6974 /* The lpfc_wq workqueue for deferred irq use, is only used for SLI4 */
6975 if (phba->sli_rev == LPFC_SLI_REV4)
6976 phba->wq = alloc_workqueue("lpfc_wq", WQ_MEM_RECLAIM, 0);
6977 else
6978 phba->wq = NULL;
f485c18d 6979
3772a991
JS
6980 return 0;
6981}
6982
6983/**
6984 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources.
6985 * @phba: pointer to lpfc hba data structure.
6986 *
6987 * This routine is invoked to unset the driver internal resources set up after
6988 * the device specific resource setup for supporting the HBA device it
6989 * attached to.
6990 **/
6991static void
6992lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba)
6993{
f485c18d
DK
6994 if (phba->wq) {
6995 flush_workqueue(phba->wq);
6996 destroy_workqueue(phba->wq);
6997 phba->wq = NULL;
6998 }
6999
3772a991 7000 /* Stop kernel worker thread */
0cdb84ec
JS
7001 if (phba->worker_thread)
7002 kthread_stop(phba->worker_thread);
3772a991
JS
7003}
7004
7005/**
7006 * lpfc_free_iocb_list - Free iocb list.
7007 * @phba: pointer to lpfc hba data structure.
7008 *
7009 * This routine is invoked to free the driver's IOCB list and memory.
7010 **/
6c621a22 7011void
3772a991
JS
7012lpfc_free_iocb_list(struct lpfc_hba *phba)
7013{
7014 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
7015
7016 spin_lock_irq(&phba->hbalock);
7017 list_for_each_entry_safe(iocbq_entry, iocbq_next,
7018 &phba->lpfc_iocb_list, list) {
7019 list_del(&iocbq_entry->list);
7020 kfree(iocbq_entry);
7021 phba->total_iocbq_bufs--;
98c9ea5c 7022 }
3772a991
JS
7023 spin_unlock_irq(&phba->hbalock);
7024
7025 return;
7026}
7027
7028/**
7029 * lpfc_init_iocb_list - Allocate and initialize iocb list.
7030 * @phba: pointer to lpfc hba data structure.
7031 *
7032 * This routine is invoked to allocate and initizlize the driver's IOCB
7033 * list and set up the IOCB tag array accordingly.
7034 *
7035 * Return codes
af901ca1 7036 * 0 - successful
3772a991
JS
7037 * other values - error
7038 **/
6c621a22 7039int
3772a991
JS
7040lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count)
7041{
7042 struct lpfc_iocbq *iocbq_entry = NULL;
7043 uint16_t iotag;
7044 int i;
dea3101e 7045
7046 /* Initialize and populate the iocb list per host. */
7047 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
3772a991 7048 for (i = 0; i < iocb_count; i++) {
dd00cc48 7049 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
dea3101e 7050 if (iocbq_entry == NULL) {
7051 printk(KERN_ERR "%s: only allocated %d iocbs of "
7052 "expected %d count. Unloading driver.\n",
cadbd4a5 7053 __func__, i, LPFC_IOCB_LIST_CNT);
dea3101e 7054 goto out_free_iocbq;
7055 }
7056
604a3e30
JB
7057 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
7058 if (iotag == 0) {
3772a991 7059 kfree(iocbq_entry);
604a3e30 7060 printk(KERN_ERR "%s: failed to allocate IOTAG. "
3772a991 7061 "Unloading driver.\n", __func__);
604a3e30
JB
7062 goto out_free_iocbq;
7063 }
6d368e53 7064 iocbq_entry->sli4_lxritag = NO_XRI;
3772a991 7065 iocbq_entry->sli4_xritag = NO_XRI;
2e0fef85
JS
7066
7067 spin_lock_irq(&phba->hbalock);
dea3101e 7068 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
7069 phba->total_iocbq_bufs++;
2e0fef85 7070 spin_unlock_irq(&phba->hbalock);
dea3101e 7071 }
7072
3772a991 7073 return 0;
dea3101e 7074
3772a991
JS
7075out_free_iocbq:
7076 lpfc_free_iocb_list(phba);
dea3101e 7077
3772a991
JS
7078 return -ENOMEM;
7079}
5e9d9b82 7080
3772a991 7081/**
8a9d2e80 7082 * lpfc_free_sgl_list - Free a given sgl list.
da0436e9 7083 * @phba: pointer to lpfc hba data structure.
8a9d2e80 7084 * @sglq_list: pointer to the head of sgl list.
3772a991 7085 *
8a9d2e80 7086 * This routine is invoked to free a give sgl list and memory.
3772a991 7087 **/
8a9d2e80
JS
7088void
7089lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list)
3772a991 7090{
da0436e9 7091 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8a9d2e80
JS
7092
7093 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) {
7094 list_del(&sglq_entry->list);
7095 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys);
7096 kfree(sglq_entry);
7097 }
7098}
7099
7100/**
7101 * lpfc_free_els_sgl_list - Free els sgl list.
7102 * @phba: pointer to lpfc hba data structure.
7103 *
7104 * This routine is invoked to free the driver's els sgl list and memory.
7105 **/
7106static void
7107lpfc_free_els_sgl_list(struct lpfc_hba *phba)
7108{
da0436e9 7109 LIST_HEAD(sglq_list);
dea3101e 7110
8a9d2e80 7111 /* Retrieve all els sgls from driver list */
da0436e9 7112 spin_lock_irq(&phba->hbalock);
895427bd
JS
7113 spin_lock(&phba->sli4_hba.sgl_list_lock);
7114 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list);
7115 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9 7116 spin_unlock_irq(&phba->hbalock);
dea3101e 7117
8a9d2e80
JS
7118 /* Now free the sgl list */
7119 lpfc_free_sgl_list(phba, &sglq_list);
da0436e9 7120}
92d7f7b0 7121
f358dd0c
JS
7122/**
7123 * lpfc_free_nvmet_sgl_list - Free nvmet sgl list.
7124 * @phba: pointer to lpfc hba data structure.
7125 *
7126 * This routine is invoked to free the driver's nvmet sgl list and memory.
7127 **/
7128static void
7129lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba)
7130{
7131 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
7132 LIST_HEAD(sglq_list);
7133
7134 /* Retrieve all nvmet sgls from driver list */
7135 spin_lock_irq(&phba->hbalock);
7136 spin_lock(&phba->sli4_hba.sgl_list_lock);
7137 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list);
7138 spin_unlock(&phba->sli4_hba.sgl_list_lock);
7139 spin_unlock_irq(&phba->hbalock);
7140
7141 /* Now free the sgl list */
7142 list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) {
7143 list_del(&sglq_entry->list);
7144 lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys);
7145 kfree(sglq_entry);
7146 }
4b40d02b
DK
7147
7148 /* Update the nvmet_xri_cnt to reflect no current sgls.
7149 * The next initialization cycle sets the count and allocates
7150 * the sgls over again.
7151 */
7152 phba->sli4_hba.nvmet_xri_cnt = 0;
f358dd0c
JS
7153}
7154
da0436e9
JS
7155/**
7156 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs.
7157 * @phba: pointer to lpfc hba data structure.
7158 *
7159 * This routine is invoked to allocate the driver's active sgl memory.
7160 * This array will hold the sglq_entry's for active IOs.
7161 **/
7162static int
7163lpfc_init_active_sgl_array(struct lpfc_hba *phba)
7164{
7165 int size;
7166 size = sizeof(struct lpfc_sglq *);
7167 size *= phba->sli4_hba.max_cfg_param.max_xri;
7168
7169 phba->sli4_hba.lpfc_sglq_active_list =
7170 kzalloc(size, GFP_KERNEL);
7171 if (!phba->sli4_hba.lpfc_sglq_active_list)
7172 return -ENOMEM;
7173 return 0;
3772a991
JS
7174}
7175
7176/**
da0436e9 7177 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs.
3772a991
JS
7178 * @phba: pointer to lpfc hba data structure.
7179 *
da0436e9
JS
7180 * This routine is invoked to walk through the array of active sglq entries
7181 * and free all of the resources.
7182 * This is just a place holder for now.
3772a991
JS
7183 **/
7184static void
da0436e9 7185lpfc_free_active_sgl(struct lpfc_hba *phba)
3772a991 7186{
da0436e9 7187 kfree(phba->sli4_hba.lpfc_sglq_active_list);
3772a991
JS
7188}
7189
7190/**
da0436e9 7191 * lpfc_init_sgl_list - Allocate and initialize sgl list.
3772a991
JS
7192 * @phba: pointer to lpfc hba data structure.
7193 *
da0436e9
JS
7194 * This routine is invoked to allocate and initizlize the driver's sgl
7195 * list and set up the sgl xritag tag array accordingly.
3772a991 7196 *
3772a991 7197 **/
8a9d2e80 7198static void
da0436e9 7199lpfc_init_sgl_list(struct lpfc_hba *phba)
3772a991 7200{
da0436e9 7201 /* Initialize and populate the sglq list per host/VF. */
895427bd 7202 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list);
da0436e9 7203 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c 7204 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list);
86c67379 7205 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
da0436e9 7206
8a9d2e80
JS
7207 /* els xri-sgl book keeping */
7208 phba->sli4_hba.els_xri_cnt = 0;
0ff10d46 7209
895427bd 7210 /* nvme xri-buffer book keeping */
5e5b511d 7211 phba->sli4_hba.io_xri_cnt = 0;
da0436e9
JS
7212}
7213
7214/**
7215 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port
7216 * @phba: pointer to lpfc hba data structure.
7217 *
7218 * This routine is invoked to post rpi header templates to the
88a2cfbb 7219 * port for those SLI4 ports that do not support extents. This routine
da0436e9 7220 * posts a PAGE_SIZE memory region to the port to hold up to
88a2cfbb
JS
7221 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine
7222 * and should be called only when interrupts are disabled.
da0436e9
JS
7223 *
7224 * Return codes
af901ca1 7225 * 0 - successful
88a2cfbb 7226 * -ERROR - otherwise.
da0436e9
JS
7227 **/
7228int
7229lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba)
7230{
7231 int rc = 0;
da0436e9
JS
7232 struct lpfc_rpi_hdr *rpi_hdr;
7233
7234 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
ff78d8f9 7235 if (!phba->sli4_hba.rpi_hdrs_in_use)
6d368e53 7236 return rc;
6d368e53
JS
7237 if (phba->sli4_hba.extents_in_use)
7238 return -EIO;
da0436e9
JS
7239
7240 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
7241 if (!rpi_hdr) {
7242 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7243 "0391 Error during rpi post operation\n");
7244 lpfc_sli4_remove_rpis(phba);
7245 rc = -ENODEV;
7246 }
7247
7248 return rc;
7249}
7250
7251/**
7252 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region
7253 * @phba: pointer to lpfc hba data structure.
7254 *
7255 * This routine is invoked to allocate a single 4KB memory region to
7256 * support rpis and stores them in the phba. This single region
7257 * provides support for up to 64 rpis. The region is used globally
7258 * by the device.
7259 *
7260 * Returns:
7261 * A valid rpi hdr on success.
7262 * A NULL pointer on any failure.
7263 **/
7264struct lpfc_rpi_hdr *
7265lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba)
7266{
7267 uint16_t rpi_limit, curr_rpi_range;
7268 struct lpfc_dmabuf *dmabuf;
7269 struct lpfc_rpi_hdr *rpi_hdr;
7270
6d368e53
JS
7271 /*
7272 * If the SLI4 port supports extents, posting the rpi header isn't
7273 * required. Set the expected maximum count and let the actual value
7274 * get set when extents are fully allocated.
7275 */
7276 if (!phba->sli4_hba.rpi_hdrs_in_use)
7277 return NULL;
7278 if (phba->sli4_hba.extents_in_use)
7279 return NULL;
7280
7281 /* The limit on the logical index is just the max_rpi count. */
845d9e8d 7282 rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi;
da0436e9
JS
7283
7284 spin_lock_irq(&phba->hbalock);
6d368e53
JS
7285 /*
7286 * Establish the starting RPI in this header block. The starting
7287 * rpi is normalized to a zero base because the physical rpi is
7288 * port based.
7289 */
97f2ecf1 7290 curr_rpi_range = phba->sli4_hba.next_rpi;
da0436e9
JS
7291 spin_unlock_irq(&phba->hbalock);
7292
845d9e8d
JS
7293 /* Reached full RPI range */
7294 if (curr_rpi_range == rpi_limit)
6d368e53 7295 return NULL;
845d9e8d 7296
da0436e9
JS
7297 /*
7298 * First allocate the protocol header region for the port. The
7299 * port expects a 4KB DMA-mapped memory region that is 4K aligned.
7300 */
7301 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
7302 if (!dmabuf)
7303 return NULL;
7304
1aee383d
JP
7305 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev,
7306 LPFC_HDR_TEMPLATE_SIZE,
7307 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
7308 if (!dmabuf->virt) {
7309 rpi_hdr = NULL;
7310 goto err_free_dmabuf;
7311 }
7312
da0436e9
JS
7313 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) {
7314 rpi_hdr = NULL;
7315 goto err_free_coherent;
7316 }
7317
7318 /* Save the rpi header data for cleanup later. */
7319 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL);
7320 if (!rpi_hdr)
7321 goto err_free_coherent;
7322
7323 rpi_hdr->dmabuf = dmabuf;
7324 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE;
7325 rpi_hdr->page_count = 1;
7326 spin_lock_irq(&phba->hbalock);
6d368e53
JS
7327
7328 /* The rpi_hdr stores the logical index only. */
7329 rpi_hdr->start_rpi = curr_rpi_range;
845d9e8d 7330 rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT;
da0436e9
JS
7331 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
7332
da0436e9
JS
7333 spin_unlock_irq(&phba->hbalock);
7334 return rpi_hdr;
7335
7336 err_free_coherent:
7337 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE,
7338 dmabuf->virt, dmabuf->phys);
7339 err_free_dmabuf:
7340 kfree(dmabuf);
7341 return NULL;
7342}
7343
7344/**
7345 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions
7346 * @phba: pointer to lpfc hba data structure.
7347 *
7348 * This routine is invoked to remove all memory resources allocated
6d368e53
JS
7349 * to support rpis for SLI4 ports not supporting extents. This routine
7350 * presumes the caller has released all rpis consumed by fabric or port
7351 * logins and is prepared to have the header pages removed.
da0436e9
JS
7352 **/
7353void
7354lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba)
7355{
7356 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr;
7357
6d368e53
JS
7358 if (!phba->sli4_hba.rpi_hdrs_in_use)
7359 goto exit;
7360
da0436e9
JS
7361 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr,
7362 &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
7363 list_del(&rpi_hdr->list);
7364 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len,
7365 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys);
7366 kfree(rpi_hdr->dmabuf);
7367 kfree(rpi_hdr);
7368 }
6d368e53
JS
7369 exit:
7370 /* There are no rpis available to the port now. */
7371 phba->sli4_hba.next_rpi = 0;
da0436e9
JS
7372}
7373
7374/**
7375 * lpfc_hba_alloc - Allocate driver hba data structure for a device.
7376 * @pdev: pointer to pci device data structure.
7377 *
7378 * This routine is invoked to allocate the driver hba data structure for an
7379 * HBA device. If the allocation is successful, the phba reference to the
7380 * PCI device data structure is set.
7381 *
7382 * Return codes
af901ca1 7383 * pointer to @phba - successful
da0436e9
JS
7384 * NULL - error
7385 **/
7386static struct lpfc_hba *
7387lpfc_hba_alloc(struct pci_dev *pdev)
7388{
7389 struct lpfc_hba *phba;
7390
7391 /* Allocate memory for HBA structure */
7392 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL);
7393 if (!phba) {
e34ccdfe 7394 dev_err(&pdev->dev, "failed to allocate hba struct\n");
da0436e9
JS
7395 return NULL;
7396 }
7397
7398 /* Set reference to PCI device in HBA structure */
7399 phba->pcidev = pdev;
7400
7401 /* Assign an unused board number */
7402 phba->brd_no = lpfc_get_instance();
7403 if (phba->brd_no < 0) {
7404 kfree(phba);
7405 return NULL;
7406 }
65791f1f 7407 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL;
da0436e9 7408
4fede78f 7409 spin_lock_init(&phba->ct_ev_lock);
f1c3b0fc
JS
7410 INIT_LIST_HEAD(&phba->ct_ev_waiters);
7411
da0436e9
JS
7412 return phba;
7413}
7414
7415/**
7416 * lpfc_hba_free - Free driver hba data structure with a device.
7417 * @phba: pointer to lpfc hba data structure.
7418 *
7419 * This routine is invoked to free the driver hba data structure with an
7420 * HBA device.
7421 **/
7422static void
7423lpfc_hba_free(struct lpfc_hba *phba)
7424{
5e5b511d
JS
7425 if (phba->sli_rev == LPFC_SLI_REV4)
7426 kfree(phba->sli4_hba.hdwq);
7427
da0436e9
JS
7428 /* Release the driver assigned board number */
7429 idr_remove(&lpfc_hba_index, phba->brd_no);
7430
895427bd
JS
7431 /* Free memory allocated with sli3 rings */
7432 kfree(phba->sli.sli3_ring);
7433 phba->sli.sli3_ring = NULL;
2a76a283 7434
da0436e9
JS
7435 kfree(phba);
7436 return;
7437}
7438
7439/**
7440 * lpfc_create_shost - Create hba physical port with associated scsi host.
7441 * @phba: pointer to lpfc hba data structure.
7442 *
7443 * This routine is invoked to create HBA physical port and associate a SCSI
7444 * host with it.
7445 *
7446 * Return codes
af901ca1 7447 * 0 - successful
da0436e9
JS
7448 * other values - error
7449 **/
7450static int
7451lpfc_create_shost(struct lpfc_hba *phba)
7452{
7453 struct lpfc_vport *vport;
7454 struct Scsi_Host *shost;
7455
7456 /* Initialize HBA FC structure */
7457 phba->fc_edtov = FF_DEF_EDTOV;
7458 phba->fc_ratov = FF_DEF_RATOV;
7459 phba->fc_altov = FF_DEF_ALTOV;
7460 phba->fc_arbtov = FF_DEF_ARBTOV;
7461
d7c47992 7462 atomic_set(&phba->sdev_cnt, 0);
da0436e9
JS
7463 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev);
7464 if (!vport)
7465 return -ENODEV;
7466
7467 shost = lpfc_shost_from_vport(vport);
7468 phba->pport = vport;
2ea259ee 7469
f358dd0c
JS
7470 if (phba->nvmet_support) {
7471 /* Only 1 vport (pport) will support NVME target */
7472 if (phba->txrdy_payload_pool == NULL) {
771db5c0
RP
7473 phba->txrdy_payload_pool = dma_pool_create(
7474 "txrdy_pool", &phba->pcidev->dev,
f358dd0c
JS
7475 TXRDY_PAYLOAD_LEN, 16, 0);
7476 if (phba->txrdy_payload_pool) {
7477 phba->targetport = NULL;
7478 phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME;
7479 lpfc_printf_log(phba, KERN_INFO,
7480 LOG_INIT | LOG_NVME_DISC,
7481 "6076 NVME Target Found\n");
7482 }
7483 }
7484 }
7485
da0436e9
JS
7486 lpfc_debugfs_initialize(vport);
7487 /* Put reference to SCSI host to driver's device private data */
7488 pci_set_drvdata(phba->pcidev, shost);
2e0fef85 7489
4258e98e
JS
7490 /*
7491 * At this point we are fully registered with PSA. In addition,
7492 * any initial discovery should be completed.
7493 */
7494 vport->load_flag |= FC_ALLOW_FDMI;
8663cbbe
JS
7495 if (phba->cfg_enable_SmartSAN ||
7496 (phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT)) {
4258e98e
JS
7497
7498 /* Setup appropriate attribute masks */
7499 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR;
8663cbbe 7500 if (phba->cfg_enable_SmartSAN)
4258e98e
JS
7501 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR;
7502 else
7503 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR;
7504 }
3772a991
JS
7505 return 0;
7506}
db2378e0 7507
3772a991
JS
7508/**
7509 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host.
7510 * @phba: pointer to lpfc hba data structure.
7511 *
7512 * This routine is invoked to destroy HBA physical port and the associated
7513 * SCSI host.
7514 **/
7515static void
7516lpfc_destroy_shost(struct lpfc_hba *phba)
7517{
7518 struct lpfc_vport *vport = phba->pport;
7519
7520 /* Destroy physical port that associated with the SCSI host */
7521 destroy_port(vport);
7522
7523 return;
7524}
7525
7526/**
7527 * lpfc_setup_bg - Setup Block guard structures and debug areas.
7528 * @phba: pointer to lpfc hba data structure.
7529 * @shost: the shost to be used to detect Block guard settings.
7530 *
7531 * This routine sets up the local Block guard protocol settings for @shost.
7532 * This routine also allocates memory for debugging bg buffers.
7533 **/
7534static void
7535lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost)
7536{
bbeb79b9
JS
7537 uint32_t old_mask;
7538 uint32_t old_guard;
7539
3772a991 7540 int pagecnt = 10;
b3b98b74 7541 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
3772a991
JS
7542 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7543 "1478 Registering BlockGuard with the "
7544 "SCSI layer\n");
bbeb79b9 7545
b3b98b74
JS
7546 old_mask = phba->cfg_prot_mask;
7547 old_guard = phba->cfg_prot_guard;
bbeb79b9
JS
7548
7549 /* Only allow supported values */
b3b98b74 7550 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION |
bbeb79b9
JS
7551 SHOST_DIX_TYPE0_PROTECTION |
7552 SHOST_DIX_TYPE1_PROTECTION);
b3b98b74
JS
7553 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP |
7554 SHOST_DIX_GUARD_CRC);
bbeb79b9
JS
7555
7556 /* DIF Type 1 protection for profiles AST1/C1 is end to end */
b3b98b74
JS
7557 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION)
7558 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION;
bbeb79b9 7559
b3b98b74
JS
7560 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
7561 if ((old_mask != phba->cfg_prot_mask) ||
7562 (old_guard != phba->cfg_prot_guard))
bbeb79b9
JS
7563 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7564 "1475 Registering BlockGuard with the "
7565 "SCSI layer: mask %d guard %d\n",
b3b98b74
JS
7566 phba->cfg_prot_mask,
7567 phba->cfg_prot_guard);
bbeb79b9 7568
b3b98b74
JS
7569 scsi_host_set_prot(shost, phba->cfg_prot_mask);
7570 scsi_host_set_guard(shost, phba->cfg_prot_guard);
bbeb79b9
JS
7571 } else
7572 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7573 "1479 Not Registering BlockGuard with the SCSI "
7574 "layer, Bad protection parameters: %d %d\n",
7575 old_mask, old_guard);
3772a991 7576 }
bbeb79b9 7577
3772a991
JS
7578 if (!_dump_buf_data) {
7579 while (pagecnt) {
7580 spin_lock_init(&_dump_buf_lock);
7581 _dump_buf_data =
7582 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
7583 if (_dump_buf_data) {
6a9c52cf
JS
7584 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7585 "9043 BLKGRD: allocated %d pages for "
3772a991
JS
7586 "_dump_buf_data at 0x%p\n",
7587 (1 << pagecnt), _dump_buf_data);
7588 _dump_buf_data_order = pagecnt;
7589 memset(_dump_buf_data, 0,
7590 ((1 << PAGE_SHIFT) << pagecnt));
7591 break;
7592 } else
7593 --pagecnt;
7594 }
7595 if (!_dump_buf_data_order)
6a9c52cf
JS
7596 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7597 "9044 BLKGRD: ERROR unable to allocate "
3772a991
JS
7598 "memory for hexdump\n");
7599 } else
6a9c52cf
JS
7600 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7601 "9045 BLKGRD: already allocated _dump_buf_data=0x%p"
3772a991
JS
7602 "\n", _dump_buf_data);
7603 if (!_dump_buf_dif) {
7604 while (pagecnt) {
7605 _dump_buf_dif =
7606 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
7607 if (_dump_buf_dif) {
6a9c52cf
JS
7608 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7609 "9046 BLKGRD: allocated %d pages for "
3772a991
JS
7610 "_dump_buf_dif at 0x%p\n",
7611 (1 << pagecnt), _dump_buf_dif);
7612 _dump_buf_dif_order = pagecnt;
7613 memset(_dump_buf_dif, 0,
7614 ((1 << PAGE_SHIFT) << pagecnt));
7615 break;
7616 } else
7617 --pagecnt;
7618 }
7619 if (!_dump_buf_dif_order)
6a9c52cf
JS
7620 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7621 "9047 BLKGRD: ERROR unable to allocate "
3772a991
JS
7622 "memory for hexdump\n");
7623 } else
6a9c52cf
JS
7624 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7625 "9048 BLKGRD: already allocated _dump_buf_dif=0x%p\n",
3772a991
JS
7626 _dump_buf_dif);
7627}
7628
7629/**
7630 * lpfc_post_init_setup - Perform necessary device post initialization setup.
7631 * @phba: pointer to lpfc hba data structure.
7632 *
7633 * This routine is invoked to perform all the necessary post initialization
7634 * setup for the device.
7635 **/
7636static void
7637lpfc_post_init_setup(struct lpfc_hba *phba)
7638{
7639 struct Scsi_Host *shost;
7640 struct lpfc_adapter_event_header adapter_event;
7641
7642 /* Get the default values for Model Name and Description */
7643 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
7644
7645 /*
7646 * hba setup may have changed the hba_queue_depth so we need to
7647 * adjust the value of can_queue.
7648 */
7649 shost = pci_get_drvdata(phba->pcidev);
7650 shost->can_queue = phba->cfg_hba_queue_depth - 10;
7651 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED)
7652 lpfc_setup_bg(phba, shost);
7653
7654 lpfc_host_attrib_init(shost);
7655
7656 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
7657 spin_lock_irq(shost->host_lock);
7658 lpfc_poll_start_timer(phba);
7659 spin_unlock_irq(shost->host_lock);
7660 }
7661
7662 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7663 "0428 Perform SCSI scan\n");
7664 /* Send board arrival event to upper layer */
7665 adapter_event.event_type = FC_REG_ADAPTER_EVENT;
7666 adapter_event.subcategory = LPFC_EVENT_ARRIVAL;
7667 fc_host_post_vendor_event(shost, fc_get_event_number(),
7668 sizeof(adapter_event),
7669 (char *) &adapter_event,
7670 LPFC_NL_VENDOR_ID);
7671 return;
7672}
7673
7674/**
7675 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space.
7676 * @phba: pointer to lpfc hba data structure.
7677 *
7678 * This routine is invoked to set up the PCI device memory space for device
7679 * with SLI-3 interface spec.
7680 *
7681 * Return codes
af901ca1 7682 * 0 - successful
3772a991
JS
7683 * other values - error
7684 **/
7685static int
7686lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
7687{
f30e1bfd 7688 struct pci_dev *pdev = phba->pcidev;
3772a991
JS
7689 unsigned long bar0map_len, bar2map_len;
7690 int i, hbq_count;
7691 void *ptr;
7692 int error = -ENODEV;
7693
f30e1bfd 7694 if (!pdev)
3772a991 7695 return error;
3772a991
JS
7696
7697 /* Set the device DMA mask size */
f30e1bfd
CH
7698 if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)) ||
7699 dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))
7700 return error;
3772a991
JS
7701
7702 /* Get the bus address of Bar0 and Bar2 and the number of bytes
7703 * required by each mapping.
7704 */
7705 phba->pci_bar0_map = pci_resource_start(pdev, 0);
7706 bar0map_len = pci_resource_len(pdev, 0);
7707
7708 phba->pci_bar2_map = pci_resource_start(pdev, 2);
7709 bar2map_len = pci_resource_len(pdev, 2);
7710
7711 /* Map HBA SLIM to a kernel virtual address. */
7712 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
7713 if (!phba->slim_memmap_p) {
7714 dev_printk(KERN_ERR, &pdev->dev,
7715 "ioremap failed for SLIM memory.\n");
7716 goto out;
7717 }
7718
7719 /* Map HBA Control Registers to a kernel virtual address. */
7720 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
7721 if (!phba->ctrl_regs_memmap_p) {
7722 dev_printk(KERN_ERR, &pdev->dev,
7723 "ioremap failed for HBA control registers.\n");
7724 goto out_iounmap_slim;
7725 }
7726
7727 /* Allocate memory for SLI-2 structures */
1aee383d
JP
7728 phba->slim2p.virt = dma_zalloc_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7729 &phba->slim2p.phys, GFP_KERNEL);
3772a991
JS
7730 if (!phba->slim2p.virt)
7731 goto out_iounmap;
7732
3772a991 7733 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx);
7a470277
JS
7734 phba->mbox_ext = (phba->slim2p.virt +
7735 offsetof(struct lpfc_sli2_slim, mbx_ext_words));
3772a991
JS
7736 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb));
7737 phba->IOCBs = (phba->slim2p.virt +
7738 offsetof(struct lpfc_sli2_slim, IOCBs));
7739
7740 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev,
7741 lpfc_sli_hbq_size(),
7742 &phba->hbqslimp.phys,
7743 GFP_KERNEL);
7744 if (!phba->hbqslimp.virt)
7745 goto out_free_slim;
7746
7747 hbq_count = lpfc_sli_hbq_count();
7748 ptr = phba->hbqslimp.virt;
7749 for (i = 0; i < hbq_count; ++i) {
7750 phba->hbqs[i].hbq_virt = ptr;
7751 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list);
7752 ptr += (lpfc_hbq_defs[i]->entry_count *
7753 sizeof(struct lpfc_hbq_entry));
7754 }
7755 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc;
7756 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free;
7757
7758 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size());
7759
3772a991
JS
7760 phba->MBslimaddr = phba->slim_memmap_p;
7761 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
7762 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
7763 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
7764 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
7765
7766 return 0;
7767
7768out_free_slim:
7769 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7770 phba->slim2p.virt, phba->slim2p.phys);
7771out_iounmap:
7772 iounmap(phba->ctrl_regs_memmap_p);
7773out_iounmap_slim:
7774 iounmap(phba->slim_memmap_p);
7775out:
7776 return error;
7777}
7778
7779/**
7780 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space.
7781 * @phba: pointer to lpfc hba data structure.
7782 *
7783 * This routine is invoked to unset the PCI device memory space for device
7784 * with SLI-3 interface spec.
7785 **/
7786static void
7787lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
7788{
7789 struct pci_dev *pdev;
7790
7791 /* Obtain PCI device reference */
7792 if (!phba->pcidev)
7793 return;
7794 else
7795 pdev = phba->pcidev;
7796
7797 /* Free coherent DMA memory allocated */
7798 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
7799 phba->hbqslimp.virt, phba->hbqslimp.phys);
7800 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7801 phba->slim2p.virt, phba->slim2p.phys);
7802
7803 /* I/O memory unmap */
7804 iounmap(phba->ctrl_regs_memmap_p);
7805 iounmap(phba->slim_memmap_p);
7806
7807 return;
7808}
7809
7810/**
da0436e9 7811 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status
3772a991
JS
7812 * @phba: pointer to lpfc hba data structure.
7813 *
da0436e9
JS
7814 * This routine is invoked to wait for SLI4 device Power On Self Test (POST)
7815 * done and check status.
3772a991 7816 *
da0436e9 7817 * Return 0 if successful, otherwise -ENODEV.
3772a991 7818 **/
da0436e9
JS
7819int
7820lpfc_sli4_post_status_check(struct lpfc_hba *phba)
3772a991 7821{
2fcee4bf
JS
7822 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg;
7823 struct lpfc_register reg_data;
7824 int i, port_error = 0;
7825 uint32_t if_type;
3772a991 7826
9940b97b
JS
7827 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
7828 memset(&reg_data, 0, sizeof(reg_data));
2fcee4bf 7829 if (!phba->sli4_hba.PSMPHRregaddr)
da0436e9 7830 return -ENODEV;
3772a991 7831
da0436e9
JS
7832 /* Wait up to 30 seconds for the SLI Port POST done and ready */
7833 for (i = 0; i < 3000; i++) {
9940b97b
JS
7834 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
7835 &portsmphr_reg.word0) ||
7836 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) {
2fcee4bf 7837 /* Port has a fatal POST error, break out */
da0436e9
JS
7838 port_error = -ENODEV;
7839 break;
7840 }
2fcee4bf
JS
7841 if (LPFC_POST_STAGE_PORT_READY ==
7842 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))
da0436e9 7843 break;
da0436e9 7844 msleep(10);
3772a991
JS
7845 }
7846
2fcee4bf
JS
7847 /*
7848 * If there was a port error during POST, then don't proceed with
7849 * other register reads as the data may not be valid. Just exit.
7850 */
7851 if (port_error) {
da0436e9 7852 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2fcee4bf
JS
7853 "1408 Port Failed POST - portsmphr=0x%x, "
7854 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, "
7855 "scr2=x%x, hscratch=x%x, pstatus=x%x\n",
7856 portsmphr_reg.word0,
7857 bf_get(lpfc_port_smphr_perr, &portsmphr_reg),
7858 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg),
7859 bf_get(lpfc_port_smphr_nip, &portsmphr_reg),
7860 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg),
7861 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg),
7862 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg),
7863 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg),
7864 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg));
7865 } else {
28baac74 7866 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
2fcee4bf
JS
7867 "2534 Device Info: SLIFamily=0x%x, "
7868 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, "
7869 "SLIHint_2=0x%x, FT=0x%x\n",
28baac74
JS
7870 bf_get(lpfc_sli_intf_sli_family,
7871 &phba->sli4_hba.sli_intf),
7872 bf_get(lpfc_sli_intf_slirev,
7873 &phba->sli4_hba.sli_intf),
085c647c
JS
7874 bf_get(lpfc_sli_intf_if_type,
7875 &phba->sli4_hba.sli_intf),
7876 bf_get(lpfc_sli_intf_sli_hint1,
28baac74 7877 &phba->sli4_hba.sli_intf),
085c647c
JS
7878 bf_get(lpfc_sli_intf_sli_hint2,
7879 &phba->sli4_hba.sli_intf),
7880 bf_get(lpfc_sli_intf_func_type,
28baac74 7881 &phba->sli4_hba.sli_intf));
2fcee4bf
JS
7882 /*
7883 * Check for other Port errors during the initialization
7884 * process. Fail the load if the port did not come up
7885 * correctly.
7886 */
7887 if_type = bf_get(lpfc_sli_intf_if_type,
7888 &phba->sli4_hba.sli_intf);
7889 switch (if_type) {
7890 case LPFC_SLI_INTF_IF_TYPE_0:
7891 phba->sli4_hba.ue_mask_lo =
7892 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
7893 phba->sli4_hba.ue_mask_hi =
7894 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
7895 uerrlo_reg.word0 =
7896 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
7897 uerrhi_reg.word0 =
7898 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
7899 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
7900 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
7901 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7902 "1422 Unrecoverable Error "
7903 "Detected during POST "
7904 "uerr_lo_reg=0x%x, "
7905 "uerr_hi_reg=0x%x, "
7906 "ue_mask_lo_reg=0x%x, "
7907 "ue_mask_hi_reg=0x%x\n",
7908 uerrlo_reg.word0,
7909 uerrhi_reg.word0,
7910 phba->sli4_hba.ue_mask_lo,
7911 phba->sli4_hba.ue_mask_hi);
7912 port_error = -ENODEV;
7913 }
7914 break;
7915 case LPFC_SLI_INTF_IF_TYPE_2:
27d6ac0a 7916 case LPFC_SLI_INTF_IF_TYPE_6:
2fcee4bf 7917 /* Final checks. The port status should be clean. */
9940b97b
JS
7918 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
7919 &reg_data.word0) ||
0558056c
JS
7920 (bf_get(lpfc_sliport_status_err, &reg_data) &&
7921 !bf_get(lpfc_sliport_status_rn, &reg_data))) {
2fcee4bf
JS
7922 phba->work_status[0] =
7923 readl(phba->sli4_hba.u.if_type2.
7924 ERR1regaddr);
7925 phba->work_status[1] =
7926 readl(phba->sli4_hba.u.if_type2.
7927 ERR2regaddr);
7928 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8fcb8acd
JS
7929 "2888 Unrecoverable port error "
7930 "following POST: port status reg "
7931 "0x%x, port_smphr reg 0x%x, "
2fcee4bf
JS
7932 "error 1=0x%x, error 2=0x%x\n",
7933 reg_data.word0,
7934 portsmphr_reg.word0,
7935 phba->work_status[0],
7936 phba->work_status[1]);
7937 port_error = -ENODEV;
7938 }
7939 break;
7940 case LPFC_SLI_INTF_IF_TYPE_1:
7941 default:
7942 break;
7943 }
28baac74 7944 }
da0436e9
JS
7945 return port_error;
7946}
3772a991 7947
da0436e9
JS
7948/**
7949 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map.
7950 * @phba: pointer to lpfc hba data structure.
2fcee4bf 7951 * @if_type: The SLI4 interface type getting configured.
da0436e9
JS
7952 *
7953 * This routine is invoked to set up SLI4 BAR0 PCI config space register
7954 * memory map.
7955 **/
7956static void
2fcee4bf
JS
7957lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
7958{
7959 switch (if_type) {
7960 case LPFC_SLI_INTF_IF_TYPE_0:
7961 phba->sli4_hba.u.if_type0.UERRLOregaddr =
7962 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
7963 phba->sli4_hba.u.if_type0.UERRHIregaddr =
7964 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
7965 phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
7966 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
7967 phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
7968 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
7969 phba->sli4_hba.SLIINTFregaddr =
7970 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7971 break;
7972 case LPFC_SLI_INTF_IF_TYPE_2:
0cf07f84
JS
7973 phba->sli4_hba.u.if_type2.EQDregaddr =
7974 phba->sli4_hba.conf_regs_memmap_p +
7975 LPFC_CTL_PORT_EQ_DELAY_OFFSET;
2fcee4bf 7976 phba->sli4_hba.u.if_type2.ERR1regaddr =
88a2cfbb
JS
7977 phba->sli4_hba.conf_regs_memmap_p +
7978 LPFC_CTL_PORT_ER1_OFFSET;
2fcee4bf 7979 phba->sli4_hba.u.if_type2.ERR2regaddr =
88a2cfbb
JS
7980 phba->sli4_hba.conf_regs_memmap_p +
7981 LPFC_CTL_PORT_ER2_OFFSET;
2fcee4bf 7982 phba->sli4_hba.u.if_type2.CTRLregaddr =
88a2cfbb
JS
7983 phba->sli4_hba.conf_regs_memmap_p +
7984 LPFC_CTL_PORT_CTL_OFFSET;
2fcee4bf 7985 phba->sli4_hba.u.if_type2.STATUSregaddr =
88a2cfbb
JS
7986 phba->sli4_hba.conf_regs_memmap_p +
7987 LPFC_CTL_PORT_STA_OFFSET;
2fcee4bf
JS
7988 phba->sli4_hba.SLIINTFregaddr =
7989 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7990 phba->sli4_hba.PSMPHRregaddr =
88a2cfbb
JS
7991 phba->sli4_hba.conf_regs_memmap_p +
7992 LPFC_CTL_PORT_SEM_OFFSET;
2fcee4bf 7993 phba->sli4_hba.RQDBregaddr =
962bc51b
JS
7994 phba->sli4_hba.conf_regs_memmap_p +
7995 LPFC_ULP0_RQ_DOORBELL;
2fcee4bf 7996 phba->sli4_hba.WQDBregaddr =
962bc51b
JS
7997 phba->sli4_hba.conf_regs_memmap_p +
7998 LPFC_ULP0_WQ_DOORBELL;
9dd35425 7999 phba->sli4_hba.CQDBregaddr =
2fcee4bf 8000 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
9dd35425 8001 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr;
2fcee4bf
JS
8002 phba->sli4_hba.MQDBregaddr =
8003 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
8004 phba->sli4_hba.BMBXregaddr =
8005 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
8006 break;
27d6ac0a
JS
8007 case LPFC_SLI_INTF_IF_TYPE_6:
8008 phba->sli4_hba.u.if_type2.EQDregaddr =
8009 phba->sli4_hba.conf_regs_memmap_p +
8010 LPFC_CTL_PORT_EQ_DELAY_OFFSET;
8011 phba->sli4_hba.u.if_type2.ERR1regaddr =
8012 phba->sli4_hba.conf_regs_memmap_p +
8013 LPFC_CTL_PORT_ER1_OFFSET;
8014 phba->sli4_hba.u.if_type2.ERR2regaddr =
8015 phba->sli4_hba.conf_regs_memmap_p +
8016 LPFC_CTL_PORT_ER2_OFFSET;
8017 phba->sli4_hba.u.if_type2.CTRLregaddr =
8018 phba->sli4_hba.conf_regs_memmap_p +
8019 LPFC_CTL_PORT_CTL_OFFSET;
8020 phba->sli4_hba.u.if_type2.STATUSregaddr =
8021 phba->sli4_hba.conf_regs_memmap_p +
8022 LPFC_CTL_PORT_STA_OFFSET;
8023 phba->sli4_hba.PSMPHRregaddr =
8024 phba->sli4_hba.conf_regs_memmap_p +
8025 LPFC_CTL_PORT_SEM_OFFSET;
8026 phba->sli4_hba.BMBXregaddr =
8027 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
8028 break;
2fcee4bf
JS
8029 case LPFC_SLI_INTF_IF_TYPE_1:
8030 default:
8031 dev_printk(KERN_ERR, &phba->pcidev->dev,
8032 "FATAL - unsupported SLI4 interface type - %d\n",
8033 if_type);
8034 break;
8035 }
da0436e9 8036}
3772a991 8037
da0436e9
JS
8038/**
8039 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map.
8040 * @phba: pointer to lpfc hba data structure.
8041 *
27d6ac0a 8042 * This routine is invoked to set up SLI4 BAR1 register memory map.
da0436e9
JS
8043 **/
8044static void
27d6ac0a 8045lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
da0436e9 8046{
27d6ac0a
JS
8047 switch (if_type) {
8048 case LPFC_SLI_INTF_IF_TYPE_0:
8049 phba->sli4_hba.PSMPHRregaddr =
8050 phba->sli4_hba.ctrl_regs_memmap_p +
8051 LPFC_SLIPORT_IF0_SMPHR;
8052 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
8053 LPFC_HST_ISR0;
8054 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
8055 LPFC_HST_IMR0;
8056 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
8057 LPFC_HST_ISCR0;
8058 break;
8059 case LPFC_SLI_INTF_IF_TYPE_6:
8060 phba->sli4_hba.RQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
8061 LPFC_IF6_RQ_DOORBELL;
8062 phba->sli4_hba.WQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
8063 LPFC_IF6_WQ_DOORBELL;
8064 phba->sli4_hba.CQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
8065 LPFC_IF6_CQ_DOORBELL;
8066 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
8067 LPFC_IF6_EQ_DOORBELL;
8068 phba->sli4_hba.MQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
8069 LPFC_IF6_MQ_DOORBELL;
8070 break;
8071 case LPFC_SLI_INTF_IF_TYPE_2:
8072 case LPFC_SLI_INTF_IF_TYPE_1:
8073 default:
8074 dev_err(&phba->pcidev->dev,
8075 "FATAL - unsupported SLI4 interface type - %d\n",
8076 if_type);
8077 break;
8078 }
3772a991
JS
8079}
8080
8081/**
da0436e9 8082 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map.
3772a991 8083 * @phba: pointer to lpfc hba data structure.
da0436e9 8084 * @vf: virtual function number
3772a991 8085 *
da0436e9
JS
8086 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map
8087 * based on the given viftual function number, @vf.
8088 *
8089 * Return 0 if successful, otherwise -ENODEV.
3772a991 8090 **/
da0436e9
JS
8091static int
8092lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf)
3772a991 8093{
da0436e9
JS
8094 if (vf > LPFC_VIR_FUNC_MAX)
8095 return -ENODEV;
3772a991 8096
da0436e9 8097 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS
8098 vf * LPFC_VFR_PAGE_SIZE +
8099 LPFC_ULP0_RQ_DOORBELL);
da0436e9 8100 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS
8101 vf * LPFC_VFR_PAGE_SIZE +
8102 LPFC_ULP0_WQ_DOORBELL);
9dd35425
JS
8103 phba->sli4_hba.CQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
8104 vf * LPFC_VFR_PAGE_SIZE +
8105 LPFC_EQCQ_DOORBELL);
8106 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr;
da0436e9
JS
8107 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
8108 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL);
8109 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
8110 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX);
8111 return 0;
3772a991
JS
8112}
8113
8114/**
da0436e9 8115 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox
3772a991
JS
8116 * @phba: pointer to lpfc hba data structure.
8117 *
da0436e9
JS
8118 * This routine is invoked to create the bootstrap mailbox
8119 * region consistent with the SLI-4 interface spec. This
8120 * routine allocates all memory necessary to communicate
8121 * mailbox commands to the port and sets up all alignment
8122 * needs. No locks are expected to be held when calling
8123 * this routine.
3772a991
JS
8124 *
8125 * Return codes
af901ca1 8126 * 0 - successful
d439d286 8127 * -ENOMEM - could not allocated memory.
da0436e9 8128 **/
3772a991 8129static int
da0436e9 8130lpfc_create_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 8131{
da0436e9
JS
8132 uint32_t bmbx_size;
8133 struct lpfc_dmabuf *dmabuf;
8134 struct dma_address *dma_address;
8135 uint32_t pa_addr;
8136 uint64_t phys_addr;
8137
8138 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
8139 if (!dmabuf)
8140 return -ENOMEM;
3772a991 8141
da0436e9
JS
8142 /*
8143 * The bootstrap mailbox region is comprised of 2 parts
8144 * plus an alignment restriction of 16 bytes.
8145 */
8146 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1);
1aee383d
JP
8147 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev, bmbx_size,
8148 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS
8149 if (!dmabuf->virt) {
8150 kfree(dmabuf);
8151 return -ENOMEM;
3772a991
JS
8152 }
8153
da0436e9
JS
8154 /*
8155 * Initialize the bootstrap mailbox pointers now so that the register
8156 * operations are simple later. The mailbox dma address is required
8157 * to be 16-byte aligned. Also align the virtual memory as each
8158 * maibox is copied into the bmbx mailbox region before issuing the
8159 * command to the port.
8160 */
8161 phba->sli4_hba.bmbx.dmabuf = dmabuf;
8162 phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
8163
8164 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
8165 LPFC_ALIGN_16_BYTE);
8166 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
8167 LPFC_ALIGN_16_BYTE);
8168
8169 /*
8170 * Set the high and low physical addresses now. The SLI4 alignment
8171 * requirement is 16 bytes and the mailbox is posted to the port
8172 * as two 30-bit addresses. The other data is a bit marking whether
8173 * the 30-bit address is the high or low address.
8174 * Upcast bmbx aphys to 64bits so shift instruction compiles
8175 * clean on 32 bit machines.
8176 */
8177 dma_address = &phba->sli4_hba.bmbx.dma_address;
8178 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
8179 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff);
8180 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) |
8181 LPFC_BMBX_BIT1_ADDR_HI);
8182
8183 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
8184 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) |
8185 LPFC_BMBX_BIT1_ADDR_LO);
8186 return 0;
3772a991
JS
8187}
8188
8189/**
da0436e9 8190 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources
3772a991
JS
8191 * @phba: pointer to lpfc hba data structure.
8192 *
da0436e9
JS
8193 * This routine is invoked to teardown the bootstrap mailbox
8194 * region and release all host resources. This routine requires
8195 * the caller to ensure all mailbox commands recovered, no
8196 * additional mailbox comands are sent, and interrupts are disabled
8197 * before calling this routine.
8198 *
8199 **/
3772a991 8200static void
da0436e9 8201lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 8202{
da0436e9
JS
8203 dma_free_coherent(&phba->pcidev->dev,
8204 phba->sli4_hba.bmbx.bmbx_size,
8205 phba->sli4_hba.bmbx.dmabuf->virt,
8206 phba->sli4_hba.bmbx.dmabuf->phys);
8207
8208 kfree(phba->sli4_hba.bmbx.dmabuf);
8209 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
3772a991
JS
8210}
8211
8212/**
da0436e9 8213 * lpfc_sli4_read_config - Get the config parameters.
3772a991
JS
8214 * @phba: pointer to lpfc hba data structure.
8215 *
da0436e9
JS
8216 * This routine is invoked to read the configuration parameters from the HBA.
8217 * The configuration parameters are used to set the base and maximum values
8218 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource
8219 * allocation for the port.
3772a991
JS
8220 *
8221 * Return codes
af901ca1 8222 * 0 - successful
25985edc 8223 * -ENOMEM - No available memory
d439d286 8224 * -EIO - The mailbox failed to complete successfully.
3772a991 8225 **/
ff78d8f9 8226int
da0436e9 8227lpfc_sli4_read_config(struct lpfc_hba *phba)
3772a991 8228{
da0436e9
JS
8229 LPFC_MBOXQ_t *pmb;
8230 struct lpfc_mbx_read_config *rd_config;
912e3acd
JS
8231 union lpfc_sli4_cfg_shdr *shdr;
8232 uint32_t shdr_status, shdr_add_status;
8233 struct lpfc_mbx_get_func_cfg *get_func_cfg;
8234 struct lpfc_rsrc_desc_fcfcoe *desc;
8aa134a8 8235 char *pdesc_0;
c691816e 8236 uint16_t forced_link_speed;
6a828b0f 8237 uint32_t if_type, qmin;
8aa134a8 8238 int length, i, rc = 0, rc2;
3772a991 8239
da0436e9
JS
8240 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
8241 if (!pmb) {
8242 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
8243 "2011 Unable to allocate memory for issuing "
8244 "SLI_CONFIG_SPECIAL mailbox command\n");
8245 return -ENOMEM;
3772a991
JS
8246 }
8247
da0436e9 8248 lpfc_read_config(phba, pmb);
3772a991 8249
da0436e9
JS
8250 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
8251 if (rc != MBX_SUCCESS) {
8252 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
8253 "2012 Mailbox failed , mbxCmd x%x "
8254 "READ_CONFIG, mbxStatus x%x\n",
8255 bf_get(lpfc_mqe_command, &pmb->u.mqe),
8256 bf_get(lpfc_mqe_status, &pmb->u.mqe));
8257 rc = -EIO;
8258 } else {
8259 rd_config = &pmb->u.mqe.un.rd_config;
ff78d8f9
JS
8260 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) {
8261 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
8262 phba->sli4_hba.lnk_info.lnk_tp =
8263 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config);
8264 phba->sli4_hba.lnk_info.lnk_no =
8265 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config);
8266 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
8267 "3081 lnk_type:%d, lnk_numb:%d\n",
8268 phba->sli4_hba.lnk_info.lnk_tp,
8269 phba->sli4_hba.lnk_info.lnk_no);
8270 } else
8271 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
8272 "3082 Mailbox (x%x) returned ldv:x0\n",
8273 bf_get(lpfc_mqe_command, &pmb->u.mqe));
44fd7fe3
JS
8274 if (bf_get(lpfc_mbx_rd_conf_bbscn_def, rd_config)) {
8275 phba->bbcredit_support = 1;
8276 phba->sli4_hba.bbscn_params.word0 = rd_config->word8;
8277 }
8278
1dc5ec24
JS
8279 phba->sli4_hba.conf_trunk =
8280 bf_get(lpfc_mbx_rd_conf_trunk, rd_config);
6d368e53
JS
8281 phba->sli4_hba.extents_in_use =
8282 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config);
da0436e9
JS
8283 phba->sli4_hba.max_cfg_param.max_xri =
8284 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config);
8285 phba->sli4_hba.max_cfg_param.xri_base =
8286 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config);
8287 phba->sli4_hba.max_cfg_param.max_vpi =
8288 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config);
8b47ae69
JS
8289 /* Limit the max we support */
8290 if (phba->sli4_hba.max_cfg_param.max_vpi > LPFC_MAX_VPORTS)
8291 phba->sli4_hba.max_cfg_param.max_vpi = LPFC_MAX_VPORTS;
da0436e9
JS
8292 phba->sli4_hba.max_cfg_param.vpi_base =
8293 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config);
8294 phba->sli4_hba.max_cfg_param.max_rpi =
8295 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config);
8296 phba->sli4_hba.max_cfg_param.rpi_base =
8297 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config);
8298 phba->sli4_hba.max_cfg_param.max_vfi =
8299 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config);
8300 phba->sli4_hba.max_cfg_param.vfi_base =
8301 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config);
8302 phba->sli4_hba.max_cfg_param.max_fcfi =
8303 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config);
da0436e9
JS
8304 phba->sli4_hba.max_cfg_param.max_eq =
8305 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config);
8306 phba->sli4_hba.max_cfg_param.max_rq =
8307 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config);
8308 phba->sli4_hba.max_cfg_param.max_wq =
8309 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config);
8310 phba->sli4_hba.max_cfg_param.max_cq =
8311 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config);
8312 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config);
8313 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
8314 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
8315 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
5ffc266e
JS
8316 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
8317 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
da0436e9
JS
8318 phba->max_vports = phba->max_vpi;
8319 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6d368e53
JS
8320 "2003 cfg params Extents? %d "
8321 "XRI(B:%d M:%d), "
da0436e9
JS
8322 "VPI(B:%d M:%d) "
8323 "VFI(B:%d M:%d) "
8324 "RPI(B:%d M:%d) "
2ea259ee 8325 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d\n",
6d368e53 8326 phba->sli4_hba.extents_in_use,
da0436e9
JS
8327 phba->sli4_hba.max_cfg_param.xri_base,
8328 phba->sli4_hba.max_cfg_param.max_xri,
8329 phba->sli4_hba.max_cfg_param.vpi_base,
8330 phba->sli4_hba.max_cfg_param.max_vpi,
8331 phba->sli4_hba.max_cfg_param.vfi_base,
8332 phba->sli4_hba.max_cfg_param.max_vfi,
8333 phba->sli4_hba.max_cfg_param.rpi_base,
8334 phba->sli4_hba.max_cfg_param.max_rpi,
2ea259ee
JS
8335 phba->sli4_hba.max_cfg_param.max_fcfi,
8336 phba->sli4_hba.max_cfg_param.max_eq,
8337 phba->sli4_hba.max_cfg_param.max_cq,
8338 phba->sli4_hba.max_cfg_param.max_wq,
8339 phba->sli4_hba.max_cfg_param.max_rq);
8340
d38f33b3 8341 /*
6a828b0f
JS
8342 * Calculate queue resources based on how
8343 * many WQ/CQ/EQs are available.
d38f33b3 8344 */
6a828b0f
JS
8345 qmin = phba->sli4_hba.max_cfg_param.max_wq;
8346 if (phba->sli4_hba.max_cfg_param.max_cq < qmin)
8347 qmin = phba->sli4_hba.max_cfg_param.max_cq;
8348 if (phba->sli4_hba.max_cfg_param.max_eq < qmin)
8349 qmin = phba->sli4_hba.max_cfg_param.max_eq;
8350 /*
8351 * Whats left after this can go toward NVME / FCP.
8352 * The minus 4 accounts for ELS, NVME LS, MBOX
8353 * plus one extra. When configured for
8354 * NVMET, FCP io channel WQs are not created.
8355 */
8356 qmin -= 4;
d38f33b3 8357
6a828b0f
JS
8358 /* If NVME is configured, double the number of CQ/WQs needed */
8359 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
8360 !phba->nvmet_support)
8361 qmin /= 2;
8362
8363 /* Check to see if there is enough for NVME */
8364 if ((phba->cfg_irq_chann > qmin) ||
8365 (phba->cfg_hdw_queue > qmin)) {
8366 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
8367 "2005 Reducing Queues: "
8368 "WQ %d CQ %d EQ %d: min %d: "
8369 "IRQ %d HDWQ %d\n",
d38f33b3
JS
8370 phba->sli4_hba.max_cfg_param.max_wq,
8371 phba->sli4_hba.max_cfg_param.max_cq,
6a828b0f
JS
8372 phba->sli4_hba.max_cfg_param.max_eq,
8373 qmin, phba->cfg_irq_chann,
cdb42bec 8374 phba->cfg_hdw_queue);
d38f33b3 8375
6a828b0f
JS
8376 if (phba->cfg_irq_chann > qmin)
8377 phba->cfg_irq_chann = qmin;
8378 if (phba->cfg_hdw_queue > qmin)
8379 phba->cfg_hdw_queue = qmin;
d38f33b3 8380 }
3772a991 8381 }
912e3acd
JS
8382
8383 if (rc)
8384 goto read_cfg_out;
da0436e9 8385
c691816e
JS
8386 /* Update link speed if forced link speed is supported */
8387 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
27d6ac0a 8388 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
c691816e
JS
8389 forced_link_speed =
8390 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config);
8391 if (forced_link_speed) {
8392 phba->hba_flag |= HBA_FORCED_LINK_SPEED;
8393
8394 switch (forced_link_speed) {
8395 case LINK_SPEED_1G:
8396 phba->cfg_link_speed =
8397 LPFC_USER_LINK_SPEED_1G;
8398 break;
8399 case LINK_SPEED_2G:
8400 phba->cfg_link_speed =
8401 LPFC_USER_LINK_SPEED_2G;
8402 break;
8403 case LINK_SPEED_4G:
8404 phba->cfg_link_speed =
8405 LPFC_USER_LINK_SPEED_4G;
8406 break;
8407 case LINK_SPEED_8G:
8408 phba->cfg_link_speed =
8409 LPFC_USER_LINK_SPEED_8G;
8410 break;
8411 case LINK_SPEED_10G:
8412 phba->cfg_link_speed =
8413 LPFC_USER_LINK_SPEED_10G;
8414 break;
8415 case LINK_SPEED_16G:
8416 phba->cfg_link_speed =
8417 LPFC_USER_LINK_SPEED_16G;
8418 break;
8419 case LINK_SPEED_32G:
8420 phba->cfg_link_speed =
8421 LPFC_USER_LINK_SPEED_32G;
8422 break;
fbd8a6ba
JS
8423 case LINK_SPEED_64G:
8424 phba->cfg_link_speed =
8425 LPFC_USER_LINK_SPEED_64G;
8426 break;
c691816e
JS
8427 case 0xffff:
8428 phba->cfg_link_speed =
8429 LPFC_USER_LINK_SPEED_AUTO;
8430 break;
8431 default:
8432 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
8433 "0047 Unrecognized link "
8434 "speed : %d\n",
8435 forced_link_speed);
8436 phba->cfg_link_speed =
8437 LPFC_USER_LINK_SPEED_AUTO;
8438 }
8439 }
8440 }
8441
da0436e9 8442 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS
8443 length = phba->sli4_hba.max_cfg_param.max_xri -
8444 lpfc_sli4_get_els_iocb_cnt(phba);
8445 if (phba->cfg_hba_queue_depth > length) {
8446 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
8447 "3361 HBA queue depth changed from %d to %d\n",
8448 phba->cfg_hba_queue_depth, length);
8449 phba->cfg_hba_queue_depth = length;
8450 }
912e3acd 8451
27d6ac0a 8452 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) <
912e3acd
JS
8453 LPFC_SLI_INTF_IF_TYPE_2)
8454 goto read_cfg_out;
8455
8456 /* get the pf# and vf# for SLI4 if_type 2 port */
8457 length = (sizeof(struct lpfc_mbx_get_func_cfg) -
8458 sizeof(struct lpfc_sli4_cfg_mhdr));
8459 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON,
8460 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG,
8461 length, LPFC_SLI4_MBX_EMBED);
8462
8aa134a8 8463 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
912e3acd
JS
8464 shdr = (union lpfc_sli4_cfg_shdr *)
8465 &pmb->u.mqe.un.sli4_config.header.cfg_shdr;
8466 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
8467 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8aa134a8 8468 if (rc2 || shdr_status || shdr_add_status) {
912e3acd
JS
8469 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
8470 "3026 Mailbox failed , mbxCmd x%x "
8471 "GET_FUNCTION_CONFIG, mbxStatus x%x\n",
8472 bf_get(lpfc_mqe_command, &pmb->u.mqe),
8473 bf_get(lpfc_mqe_status, &pmb->u.mqe));
912e3acd
JS
8474 goto read_cfg_out;
8475 }
8476
8477 /* search for fc_fcoe resrouce descriptor */
8478 get_func_cfg = &pmb->u.mqe.un.get_func_cfg;
912e3acd 8479
8aa134a8
JS
8480 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0];
8481 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0;
8482 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc);
8483 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD)
8484 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH;
8485 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH)
8486 goto read_cfg_out;
8487
912e3acd 8488 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) {
8aa134a8 8489 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i);
912e3acd 8490 if (LPFC_RSRC_DESC_TYPE_FCFCOE ==
8aa134a8 8491 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) {
912e3acd
JS
8492 phba->sli4_hba.iov.pf_number =
8493 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc);
8494 phba->sli4_hba.iov.vf_number =
8495 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc);
8496 break;
8497 }
8498 }
8499
8500 if (i < LPFC_RSRC_DESC_MAX_NUM)
8501 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
8502 "3027 GET_FUNCTION_CONFIG: pf_number:%d, "
8503 "vf_number:%d\n", phba->sli4_hba.iov.pf_number,
8504 phba->sli4_hba.iov.vf_number);
8aa134a8 8505 else
912e3acd
JS
8506 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
8507 "3028 GET_FUNCTION_CONFIG: failed to find "
c4dba187 8508 "Resource Descriptor:x%x\n",
912e3acd 8509 LPFC_RSRC_DESC_TYPE_FCFCOE);
912e3acd
JS
8510
8511read_cfg_out:
8512 mempool_free(pmb, phba->mbox_mem_pool);
da0436e9 8513 return rc;
3772a991
JS
8514}
8515
8516/**
2fcee4bf 8517 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port.
3772a991
JS
8518 * @phba: pointer to lpfc hba data structure.
8519 *
2fcee4bf
JS
8520 * This routine is invoked to setup the port-side endian order when
8521 * the port if_type is 0. This routine has no function for other
8522 * if_types.
da0436e9
JS
8523 *
8524 * Return codes
af901ca1 8525 * 0 - successful
25985edc 8526 * -ENOMEM - No available memory
d439d286 8527 * -EIO - The mailbox failed to complete successfully.
3772a991 8528 **/
da0436e9
JS
8529static int
8530lpfc_setup_endian_order(struct lpfc_hba *phba)
3772a991 8531{
da0436e9 8532 LPFC_MBOXQ_t *mboxq;
2fcee4bf 8533 uint32_t if_type, rc = 0;
da0436e9
JS
8534 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0,
8535 HOST_ENDIAN_HIGH_WORD1};
3772a991 8536
2fcee4bf
JS
8537 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
8538 switch (if_type) {
8539 case LPFC_SLI_INTF_IF_TYPE_0:
8540 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
8541 GFP_KERNEL);
8542 if (!mboxq) {
8543 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8544 "0492 Unable to allocate memory for "
8545 "issuing SLI_CONFIG_SPECIAL mailbox "
8546 "command\n");
8547 return -ENOMEM;
8548 }
3772a991 8549
2fcee4bf
JS
8550 /*
8551 * The SLI4_CONFIG_SPECIAL mailbox command requires the first
8552 * two words to contain special data values and no other data.
8553 */
8554 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t));
8555 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data));
8556 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
8557 if (rc != MBX_SUCCESS) {
8558 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8559 "0493 SLI_CONFIG_SPECIAL mailbox "
8560 "failed with status x%x\n",
8561 rc);
8562 rc = -EIO;
8563 }
8564 mempool_free(mboxq, phba->mbox_mem_pool);
8565 break;
27d6ac0a 8566 case LPFC_SLI_INTF_IF_TYPE_6:
2fcee4bf
JS
8567 case LPFC_SLI_INTF_IF_TYPE_2:
8568 case LPFC_SLI_INTF_IF_TYPE_1:
8569 default:
8570 break;
da0436e9 8571 }
da0436e9 8572 return rc;
3772a991
JS
8573}
8574
8575/**
895427bd 8576 * lpfc_sli4_queue_verify - Verify and update EQ counts
3772a991
JS
8577 * @phba: pointer to lpfc hba data structure.
8578 *
895427bd
JS
8579 * This routine is invoked to check the user settable queue counts for EQs.
8580 * After this routine is called the counts will be set to valid values that
5350d872
JS
8581 * adhere to the constraints of the system's interrupt vectors and the port's
8582 * queue resources.
da0436e9
JS
8583 *
8584 * Return codes
af901ca1 8585 * 0 - successful
25985edc 8586 * -ENOMEM - No available memory
3772a991 8587 **/
da0436e9 8588static int
5350d872 8589lpfc_sli4_queue_verify(struct lpfc_hba *phba)
3772a991 8590{
da0436e9 8591 /*
67d12733 8592 * Sanity check for configured queue parameters against the run-time
da0436e9
JS
8593 * device parameters
8594 */
3772a991 8595
bcb24f65 8596 if (phba->nvmet_support) {
6a828b0f
JS
8597 if (phba->cfg_irq_chann < phba->cfg_nvmet_mrq)
8598 phba->cfg_nvmet_mrq = phba->cfg_irq_chann;
bcb24f65
JS
8599 }
8600 if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX)
8601 phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX;
895427bd
JS
8602
8603 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6a828b0f
JS
8604 "2574 IO channels: hdwQ %d IRQ %d MRQ: %d\n",
8605 phba->cfg_hdw_queue, phba->cfg_irq_chann,
8606 phba->cfg_nvmet_mrq);
3772a991 8607
da0436e9
JS
8608 /* Get EQ depth from module parameter, fake the default for now */
8609 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
8610 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
3772a991 8611
5350d872
JS
8612 /* Get CQ depth from module parameter, fake the default for now */
8613 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
8614 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
895427bd
JS
8615 return 0;
8616}
8617
8618static int
8619lpfc_alloc_nvme_wq_cq(struct lpfc_hba *phba, int wqidx)
8620{
8621 struct lpfc_queue *qdesc;
5350d872 8622
a51e41b6 8623 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
81b96eda 8624 phba->sli4_hba.cq_esize,
a51e41b6 8625 LPFC_CQE_EXP_COUNT);
895427bd
JS
8626 if (!qdesc) {
8627 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8628 "0508 Failed allocate fast-path NVME CQ (%d)\n",
8629 wqidx);
8630 return 1;
8631 }
7365f6fd 8632 qdesc->qe_valid = 1;
5e5b511d 8633 qdesc->hdwq = wqidx;
6a828b0f 8634 qdesc->chann = lpfc_find_cpu_handle(phba, wqidx, LPFC_FIND_BY_HDWQ);
cdb42bec 8635 phba->sli4_hba.hdwq[wqidx].nvme_cq = qdesc;
895427bd 8636
a51e41b6
JS
8637 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
8638 LPFC_WQE128_SIZE, LPFC_WQE_EXP_COUNT);
895427bd
JS
8639 if (!qdesc) {
8640 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8641 "0509 Failed allocate fast-path NVME WQ (%d)\n",
8642 wqidx);
8643 return 1;
8644 }
5e5b511d 8645 qdesc->hdwq = wqidx;
6a828b0f 8646 qdesc->chann = wqidx;
cdb42bec 8647 phba->sli4_hba.hdwq[wqidx].nvme_wq = qdesc;
895427bd
JS
8648 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8649 return 0;
8650}
8651
8652static int
8653lpfc_alloc_fcp_wq_cq(struct lpfc_hba *phba, int wqidx)
8654{
8655 struct lpfc_queue *qdesc;
c176ffa0 8656 uint32_t wqesize;
895427bd
JS
8657
8658 /* Create Fast Path FCP CQs */
c176ffa0 8659 if (phba->enab_exp_wqcq_pages)
a51e41b6
JS
8660 /* Increase the CQ size when WQEs contain an embedded cdb */
8661 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
8662 phba->sli4_hba.cq_esize,
8663 LPFC_CQE_EXP_COUNT);
8664
8665 else
8666 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8667 phba->sli4_hba.cq_esize,
8668 phba->sli4_hba.cq_ecount);
895427bd
JS
8669 if (!qdesc) {
8670 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8671 "0499 Failed allocate fast-path FCP CQ (%d)\n", wqidx);
8672 return 1;
8673 }
7365f6fd 8674 qdesc->qe_valid = 1;
5e5b511d 8675 qdesc->hdwq = wqidx;
6a828b0f 8676 qdesc->chann = lpfc_find_cpu_handle(phba, wqidx, LPFC_FIND_BY_HDWQ);
cdb42bec 8677 phba->sli4_hba.hdwq[wqidx].fcp_cq = qdesc;
895427bd
JS
8678
8679 /* Create Fast Path FCP WQs */
c176ffa0 8680 if (phba->enab_exp_wqcq_pages) {
a51e41b6 8681 /* Increase the WQ size when WQEs contain an embedded cdb */
c176ffa0
JS
8682 wqesize = (phba->fcp_embed_io) ?
8683 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
a51e41b6 8684 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
c176ffa0 8685 wqesize,
a51e41b6 8686 LPFC_WQE_EXP_COUNT);
c176ffa0 8687 } else
a51e41b6
JS
8688 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8689 phba->sli4_hba.wq_esize,
8690 phba->sli4_hba.wq_ecount);
c176ffa0 8691
895427bd
JS
8692 if (!qdesc) {
8693 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8694 "0503 Failed allocate fast-path FCP WQ (%d)\n",
8695 wqidx);
8696 return 1;
8697 }
5e5b511d 8698 qdesc->hdwq = wqidx;
6a828b0f 8699 qdesc->chann = wqidx;
cdb42bec 8700 phba->sli4_hba.hdwq[wqidx].fcp_wq = qdesc;
895427bd 8701 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
5350d872 8702 return 0;
5350d872
JS
8703}
8704
8705/**
8706 * lpfc_sli4_queue_create - Create all the SLI4 queues
8707 * @phba: pointer to lpfc hba data structure.
8708 *
8709 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA
8710 * operation. For each SLI4 queue type, the parameters such as queue entry
8711 * count (queue depth) shall be taken from the module parameter. For now,
8712 * we just use some constant number as place holder.
8713 *
8714 * Return codes
4907cb7b 8715 * 0 - successful
5350d872
JS
8716 * -ENOMEM - No availble memory
8717 * -EIO - The mailbox failed to complete successfully.
8718 **/
8719int
8720lpfc_sli4_queue_create(struct lpfc_hba *phba)
8721{
8722 struct lpfc_queue *qdesc;
6a828b0f 8723 int idx, eqidx;
5e5b511d 8724 struct lpfc_sli4_hdw_queue *qp;
32517fc0 8725 struct lpfc_eq_intr_info *eqi;
5350d872
JS
8726
8727 /*
67d12733 8728 * Create HBA Record arrays.
895427bd 8729 * Both NVME and FCP will share that same vectors / EQs
5350d872 8730 */
67d12733
JS
8731 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
8732 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
8733 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
8734 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
8735 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
8736 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
895427bd
JS
8737 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
8738 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
8739 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
8740 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
67d12733 8741
cdb42bec 8742 if (!phba->sli4_hba.hdwq) {
5e5b511d
JS
8743 phba->sli4_hba.hdwq = kcalloc(
8744 phba->cfg_hdw_queue, sizeof(struct lpfc_sli4_hdw_queue),
8745 GFP_KERNEL);
8746 if (!phba->sli4_hba.hdwq) {
8747 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8748 "6427 Failed allocate memory for "
8749 "fast-path Hardware Queue array\n");
8750 goto out_error;
8751 }
8752 /* Prepare hardware queues to take IO buffers */
8753 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
8754 qp = &phba->sli4_hba.hdwq[idx];
8755 spin_lock_init(&qp->io_buf_list_get_lock);
8756 spin_lock_init(&qp->io_buf_list_put_lock);
8757 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get);
8758 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put);
8759 qp->get_io_bufs = 0;
8760 qp->put_io_bufs = 0;
8761 qp->total_io_bufs = 0;
8762 spin_lock_init(&qp->abts_scsi_buf_list_lock);
8763 INIT_LIST_HEAD(&qp->lpfc_abts_scsi_buf_list);
8764 qp->abts_scsi_io_bufs = 0;
8765 spin_lock_init(&qp->abts_nvme_buf_list_lock);
8766 INIT_LIST_HEAD(&qp->lpfc_abts_nvme_buf_list);
8767 qp->abts_nvme_io_bufs = 0;
8768 }
67d12733
JS
8769 }
8770
cdb42bec 8771 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
2d7dbc4c
JS
8772 if (phba->nvmet_support) {
8773 phba->sli4_hba.nvmet_cqset = kcalloc(
8774 phba->cfg_nvmet_mrq,
8775 sizeof(struct lpfc_queue *),
8776 GFP_KERNEL);
8777 if (!phba->sli4_hba.nvmet_cqset) {
8778 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8779 "3121 Fail allocate memory for "
8780 "fast-path CQ set array\n");
8781 goto out_error;
8782 }
8783 phba->sli4_hba.nvmet_mrq_hdr = kcalloc(
8784 phba->cfg_nvmet_mrq,
8785 sizeof(struct lpfc_queue *),
8786 GFP_KERNEL);
8787 if (!phba->sli4_hba.nvmet_mrq_hdr) {
8788 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8789 "3122 Fail allocate memory for "
8790 "fast-path RQ set hdr array\n");
8791 goto out_error;
8792 }
8793 phba->sli4_hba.nvmet_mrq_data = kcalloc(
8794 phba->cfg_nvmet_mrq,
8795 sizeof(struct lpfc_queue *),
8796 GFP_KERNEL);
8797 if (!phba->sli4_hba.nvmet_mrq_data) {
8798 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8799 "3124 Fail allocate memory for "
8800 "fast-path RQ set data array\n");
8801 goto out_error;
8802 }
8803 }
da0436e9 8804 }
67d12733 8805
895427bd 8806 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
67d12733 8807
895427bd 8808 /* Create HBA Event Queues (EQs) */
cdb42bec 8809 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
6a828b0f
JS
8810 /*
8811 * If there are more Hardware Queues than available
8812 * CQs, multiple Hardware Queues may share a common EQ.
8813 */
8814 if (idx >= phba->cfg_irq_chann) {
8815 /* Share an existing EQ */
8816 eqidx = lpfc_find_eq_handle(phba, idx);
8817 phba->sli4_hba.hdwq[idx].hba_eq =
8818 phba->sli4_hba.hdwq[eqidx].hba_eq;
8819 continue;
8820 }
8821 /* Create an EQ */
81b96eda
JS
8822 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8823 phba->sli4_hba.eq_esize,
da0436e9
JS
8824 phba->sli4_hba.eq_ecount);
8825 if (!qdesc) {
8826 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
67d12733
JS
8827 "0497 Failed allocate EQ (%d)\n", idx);
8828 goto out_error;
da0436e9 8829 }
7365f6fd 8830 qdesc->qe_valid = 1;
5e5b511d 8831 qdesc->hdwq = idx;
6a828b0f
JS
8832
8833 /* Save the CPU this EQ is affinitised to */
8834 eqidx = lpfc_find_eq_handle(phba, idx);
8835 qdesc->chann = lpfc_find_cpu_handle(phba, eqidx,
8836 LPFC_FIND_BY_EQ);
cdb42bec 8837 phba->sli4_hba.hdwq[idx].hba_eq = qdesc;
32517fc0
JS
8838 qdesc->last_cpu = qdesc->chann;
8839 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, qdesc->last_cpu);
8840 list_add(&qdesc->cpu_list, &eqi->list);
895427bd 8841 }
67d12733 8842
67d12733 8843
cdb42bec 8844 /* Allocate SCSI SLI4 CQ/WQs */
6a828b0f 8845 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
895427bd 8846 if (lpfc_alloc_fcp_wq_cq(phba, idx))
67d12733 8847 goto out_error;
6a828b0f 8848 }
da0436e9 8849
cdb42bec
JS
8850 /* Allocate NVME SLI4 CQ/WQs */
8851 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
6a828b0f 8852 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
cdb42bec
JS
8853 if (lpfc_alloc_nvme_wq_cq(phba, idx))
8854 goto out_error;
6a828b0f 8855 }
67d12733 8856
cdb42bec
JS
8857 if (phba->nvmet_support) {
8858 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
8859 qdesc = lpfc_sli4_queue_alloc(
8860 phba,
81b96eda
JS
8861 LPFC_DEFAULT_PAGE_SIZE,
8862 phba->sli4_hba.cq_esize,
8863 phba->sli4_hba.cq_ecount);
cdb42bec
JS
8864 if (!qdesc) {
8865 lpfc_printf_log(
8866 phba, KERN_ERR, LOG_INIT,
8867 "3142 Failed allocate NVME "
8868 "CQ Set (%d)\n", idx);
8869 goto out_error;
8870 }
8871 qdesc->qe_valid = 1;
5e5b511d 8872 qdesc->hdwq = idx;
6a828b0f 8873 qdesc->chann = idx;
cdb42bec 8874 phba->sli4_hba.nvmet_cqset[idx] = qdesc;
2d7dbc4c 8875 }
2d7dbc4c
JS
8876 }
8877 }
8878
da0436e9 8879 /*
67d12733 8880 * Create Slow Path Completion Queues (CQs)
da0436e9
JS
8881 */
8882
da0436e9 8883 /* Create slow-path Mailbox Command Complete Queue */
81b96eda
JS
8884 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8885 phba->sli4_hba.cq_esize,
da0436e9
JS
8886 phba->sli4_hba.cq_ecount);
8887 if (!qdesc) {
8888 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8889 "0500 Failed allocate slow-path mailbox CQ\n");
67d12733 8890 goto out_error;
da0436e9 8891 }
7365f6fd 8892 qdesc->qe_valid = 1;
da0436e9
JS
8893 phba->sli4_hba.mbx_cq = qdesc;
8894
8895 /* Create slow-path ELS Complete Queue */
81b96eda
JS
8896 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8897 phba->sli4_hba.cq_esize,
da0436e9
JS
8898 phba->sli4_hba.cq_ecount);
8899 if (!qdesc) {
8900 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8901 "0501 Failed allocate slow-path ELS CQ\n");
67d12733 8902 goto out_error;
da0436e9 8903 }
7365f6fd 8904 qdesc->qe_valid = 1;
6a828b0f 8905 qdesc->chann = 0;
da0436e9
JS
8906 phba->sli4_hba.els_cq = qdesc;
8907
da0436e9 8908
5350d872 8909 /*
67d12733 8910 * Create Slow Path Work Queues (WQs)
5350d872 8911 */
da0436e9
JS
8912
8913 /* Create Mailbox Command Queue */
da0436e9 8914
81b96eda
JS
8915 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8916 phba->sli4_hba.mq_esize,
da0436e9
JS
8917 phba->sli4_hba.mq_ecount);
8918 if (!qdesc) {
8919 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8920 "0505 Failed allocate slow-path MQ\n");
67d12733 8921 goto out_error;
da0436e9 8922 }
6a828b0f 8923 qdesc->chann = 0;
da0436e9
JS
8924 phba->sli4_hba.mbx_wq = qdesc;
8925
8926 /*
67d12733 8927 * Create ELS Work Queues
da0436e9 8928 */
da0436e9
JS
8929
8930 /* Create slow-path ELS Work Queue */
81b96eda
JS
8931 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8932 phba->sli4_hba.wq_esize,
da0436e9
JS
8933 phba->sli4_hba.wq_ecount);
8934 if (!qdesc) {
8935 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8936 "0504 Failed allocate slow-path ELS WQ\n");
67d12733 8937 goto out_error;
da0436e9 8938 }
6a828b0f 8939 qdesc->chann = 0;
da0436e9 8940 phba->sli4_hba.els_wq = qdesc;
895427bd
JS
8941 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8942
8943 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8944 /* Create NVME LS Complete Queue */
81b96eda
JS
8945 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8946 phba->sli4_hba.cq_esize,
895427bd
JS
8947 phba->sli4_hba.cq_ecount);
8948 if (!qdesc) {
8949 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8950 "6079 Failed allocate NVME LS CQ\n");
8951 goto out_error;
8952 }
6a828b0f 8953 qdesc->chann = 0;
7365f6fd 8954 qdesc->qe_valid = 1;
895427bd
JS
8955 phba->sli4_hba.nvmels_cq = qdesc;
8956
8957 /* Create NVME LS Work Queue */
81b96eda
JS
8958 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8959 phba->sli4_hba.wq_esize,
895427bd
JS
8960 phba->sli4_hba.wq_ecount);
8961 if (!qdesc) {
8962 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8963 "6080 Failed allocate NVME LS WQ\n");
8964 goto out_error;
8965 }
6a828b0f 8966 qdesc->chann = 0;
895427bd
JS
8967 phba->sli4_hba.nvmels_wq = qdesc;
8968 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8969 }
da0436e9 8970
da0436e9
JS
8971 /*
8972 * Create Receive Queue (RQ)
8973 */
da0436e9
JS
8974
8975 /* Create Receive Queue for header */
81b96eda
JS
8976 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8977 phba->sli4_hba.rq_esize,
da0436e9
JS
8978 phba->sli4_hba.rq_ecount);
8979 if (!qdesc) {
8980 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8981 "0506 Failed allocate receive HRQ\n");
67d12733 8982 goto out_error;
da0436e9
JS
8983 }
8984 phba->sli4_hba.hdr_rq = qdesc;
8985
8986 /* Create Receive Queue for data */
81b96eda
JS
8987 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8988 phba->sli4_hba.rq_esize,
da0436e9
JS
8989 phba->sli4_hba.rq_ecount);
8990 if (!qdesc) {
8991 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8992 "0507 Failed allocate receive DRQ\n");
67d12733 8993 goto out_error;
da0436e9
JS
8994 }
8995 phba->sli4_hba.dat_rq = qdesc;
8996
cdb42bec
JS
8997 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
8998 phba->nvmet_support) {
2d7dbc4c
JS
8999 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
9000 /* Create NVMET Receive Queue for header */
9001 qdesc = lpfc_sli4_queue_alloc(phba,
81b96eda 9002 LPFC_DEFAULT_PAGE_SIZE,
2d7dbc4c 9003 phba->sli4_hba.rq_esize,
61f3d4bf 9004 LPFC_NVMET_RQE_DEF_COUNT);
2d7dbc4c
JS
9005 if (!qdesc) {
9006 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9007 "3146 Failed allocate "
9008 "receive HRQ\n");
9009 goto out_error;
9010 }
5e5b511d 9011 qdesc->hdwq = idx;
2d7dbc4c
JS
9012 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc;
9013
9014 /* Only needed for header of RQ pair */
9015 qdesc->rqbp = kzalloc(sizeof(struct lpfc_rqb),
9016 GFP_KERNEL);
9017 if (qdesc->rqbp == NULL) {
9018 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9019 "6131 Failed allocate "
9020 "Header RQBP\n");
9021 goto out_error;
9022 }
9023
4b40d02b
DK
9024 /* Put list in known state in case driver load fails. */
9025 INIT_LIST_HEAD(&qdesc->rqbp->rqb_buffer_list);
9026
2d7dbc4c
JS
9027 /* Create NVMET Receive Queue for data */
9028 qdesc = lpfc_sli4_queue_alloc(phba,
81b96eda 9029 LPFC_DEFAULT_PAGE_SIZE,
2d7dbc4c 9030 phba->sli4_hba.rq_esize,
61f3d4bf 9031 LPFC_NVMET_RQE_DEF_COUNT);
2d7dbc4c
JS
9032 if (!qdesc) {
9033 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9034 "3156 Failed allocate "
9035 "receive DRQ\n");
9036 goto out_error;
9037 }
5e5b511d 9038 qdesc->hdwq = idx;
2d7dbc4c
JS
9039 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc;
9040 }
9041 }
4c47efc1
JS
9042
9043#if defined(BUILD_NVME)
9044 /* Clear NVME stats */
9045 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
9046 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
9047 memset(&phba->sli4_hba.hdwq[idx].nvme_cstat, 0,
9048 sizeof(phba->sli4_hba.hdwq[idx].nvme_cstat));
9049 }
9050 }
9051#endif
9052
9053 /* Clear SCSI stats */
9054 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
9055 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
9056 memset(&phba->sli4_hba.hdwq[idx].scsi_cstat, 0,
9057 sizeof(phba->sli4_hba.hdwq[idx].scsi_cstat));
9058 }
9059 }
9060
da0436e9
JS
9061 return 0;
9062
da0436e9 9063out_error:
67d12733 9064 lpfc_sli4_queue_destroy(phba);
da0436e9
JS
9065 return -ENOMEM;
9066}
9067
895427bd
JS
9068static inline void
9069__lpfc_sli4_release_queue(struct lpfc_queue **qp)
9070{
9071 if (*qp != NULL) {
9072 lpfc_sli4_queue_free(*qp);
9073 *qp = NULL;
9074 }
9075}
9076
9077static inline void
9078lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max)
9079{
9080 int idx;
9081
9082 if (*qs == NULL)
9083 return;
9084
9085 for (idx = 0; idx < max; idx++)
9086 __lpfc_sli4_release_queue(&(*qs)[idx]);
9087
9088 kfree(*qs);
9089 *qs = NULL;
9090}
9091
9092static inline void
6a828b0f 9093lpfc_sli4_release_hdwq(struct lpfc_hba *phba)
895427bd 9094{
6a828b0f 9095 struct lpfc_sli4_hdw_queue *hdwq;
cdb42bec
JS
9096 uint32_t idx;
9097
6a828b0f
JS
9098 hdwq = phba->sli4_hba.hdwq;
9099 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
9100 if (idx < phba->cfg_irq_chann)
9101 lpfc_sli4_queue_free(hdwq[idx].hba_eq);
9102 hdwq[idx].hba_eq = NULL;
9103
cdb42bec
JS
9104 lpfc_sli4_queue_free(hdwq[idx].fcp_cq);
9105 lpfc_sli4_queue_free(hdwq[idx].nvme_cq);
9106 lpfc_sli4_queue_free(hdwq[idx].fcp_wq);
9107 lpfc_sli4_queue_free(hdwq[idx].nvme_wq);
cdb42bec
JS
9108 hdwq[idx].fcp_cq = NULL;
9109 hdwq[idx].nvme_cq = NULL;
9110 hdwq[idx].fcp_wq = NULL;
9111 hdwq[idx].nvme_wq = NULL;
895427bd
JS
9112 }
9113}
9114
da0436e9
JS
9115/**
9116 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues
9117 * @phba: pointer to lpfc hba data structure.
9118 *
9119 * This routine is invoked to release all the SLI4 queues with the FCoE HBA
9120 * operation.
9121 *
9122 * Return codes
af901ca1 9123 * 0 - successful
25985edc 9124 * -ENOMEM - No available memory
d439d286 9125 * -EIO - The mailbox failed to complete successfully.
da0436e9 9126 **/
5350d872 9127void
da0436e9
JS
9128lpfc_sli4_queue_destroy(struct lpfc_hba *phba)
9129{
895427bd 9130 /* Release HBA eqs */
cdb42bec 9131 if (phba->sli4_hba.hdwq)
6a828b0f 9132 lpfc_sli4_release_hdwq(phba);
895427bd 9133
bcb24f65
JS
9134 if (phba->nvmet_support) {
9135 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset,
9136 phba->cfg_nvmet_mrq);
2d7dbc4c 9137
bcb24f65
JS
9138 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr,
9139 phba->cfg_nvmet_mrq);
9140 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data,
9141 phba->cfg_nvmet_mrq);
9142 }
2d7dbc4c 9143
895427bd
JS
9144 /* Release mailbox command work queue */
9145 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq);
9146
9147 /* Release ELS work queue */
9148 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq);
9149
9150 /* Release ELS work queue */
9151 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq);
9152
9153 /* Release unsolicited receive queue */
9154 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq);
9155 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq);
9156
9157 /* Release ELS complete queue */
9158 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq);
9159
9160 /* Release NVME LS complete queue */
9161 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq);
9162
9163 /* Release mailbox command complete queue */
9164 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq);
9165
9166 /* Everything on this list has been freed */
9167 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
9168}
9169
895427bd
JS
9170int
9171lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq)
9172{
9173 struct lpfc_rqb *rqbp;
9174 struct lpfc_dmabuf *h_buf;
9175 struct rqb_dmabuf *rqb_buffer;
9176
9177 rqbp = rq->rqbp;
9178 while (!list_empty(&rqbp->rqb_buffer_list)) {
9179 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
9180 struct lpfc_dmabuf, list);
9181
9182 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf);
9183 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
9184 rqbp->buffer_count--;
67d12733 9185 }
895427bd
JS
9186 return 1;
9187}
67d12733 9188
895427bd
JS
9189static int
9190lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq,
9191 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map,
9192 int qidx, uint32_t qtype)
9193{
9194 struct lpfc_sli_ring *pring;
9195 int rc;
9196
9197 if (!eq || !cq || !wq) {
9198 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9199 "6085 Fast-path %s (%d) not allocated\n",
9200 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx);
9201 return -ENOMEM;
9202 }
9203
9204 /* create the Cq first */
9205 rc = lpfc_cq_create(phba, cq, eq,
9206 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype);
9207 if (rc) {
9208 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9209 "6086 Failed setup of CQ (%d), rc = 0x%x\n",
9210 qidx, (uint32_t)rc);
9211 return rc;
67d12733
JS
9212 }
9213
895427bd 9214 if (qtype != LPFC_MBOX) {
cdb42bec 9215 /* Setup cq_map for fast lookup */
895427bd
JS
9216 if (cq_map)
9217 *cq_map = cq->queue_id;
da0436e9 9218
895427bd
JS
9219 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9220 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n",
9221 qidx, cq->queue_id, qidx, eq->queue_id);
da0436e9 9222
895427bd
JS
9223 /* create the wq */
9224 rc = lpfc_wq_create(phba, wq, cq, qtype);
9225 if (rc) {
9226 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9227 "6123 Fail setup fastpath WQ (%d), rc = 0x%x\n",
9228 qidx, (uint32_t)rc);
9229 /* no need to tear down cq - caller will do so */
9230 return rc;
9231 }
da0436e9 9232
895427bd
JS
9233 /* Bind this CQ/WQ to the NVME ring */
9234 pring = wq->pring;
9235 pring->sli.sli4.wqp = (void *)wq;
9236 cq->pring = pring;
da0436e9 9237
895427bd
JS
9238 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9239 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n",
9240 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id);
9241 } else {
9242 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX);
9243 if (rc) {
9244 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9245 "0539 Failed setup of slow-path MQ: "
9246 "rc = 0x%x\n", rc);
9247 /* no need to tear down cq - caller will do so */
9248 return rc;
9249 }
da0436e9 9250
895427bd
JS
9251 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9252 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n",
9253 phba->sli4_hba.mbx_wq->queue_id,
9254 phba->sli4_hba.mbx_cq->queue_id);
67d12733 9255 }
da0436e9 9256
895427bd 9257 return 0;
da0436e9
JS
9258}
9259
6a828b0f
JS
9260/**
9261 * lpfc_setup_cq_lookup - Setup the CQ lookup table
9262 * @phba: pointer to lpfc hba data structure.
9263 *
9264 * This routine will populate the cq_lookup table by all
9265 * available CQ queue_id's.
9266 **/
9267void
9268lpfc_setup_cq_lookup(struct lpfc_hba *phba)
9269{
9270 struct lpfc_queue *eq, *childq;
9271 struct lpfc_sli4_hdw_queue *qp;
9272 int qidx;
9273
9274 qp = phba->sli4_hba.hdwq;
9275 memset(phba->sli4_hba.cq_lookup, 0,
9276 (sizeof(struct lpfc_queue *) * (phba->sli4_hba.cq_max + 1)));
9277 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
9278 eq = qp[qidx].hba_eq;
9279 if (!eq)
9280 continue;
9281 list_for_each_entry(childq, &eq->child_list, list) {
9282 if (childq->queue_id > phba->sli4_hba.cq_max)
9283 continue;
9284 if ((childq->subtype == LPFC_FCP) ||
9285 (childq->subtype == LPFC_NVME))
9286 phba->sli4_hba.cq_lookup[childq->queue_id] =
9287 childq;
9288 }
9289 }
9290}
9291
da0436e9
JS
9292/**
9293 * lpfc_sli4_queue_setup - Set up all the SLI4 queues
9294 * @phba: pointer to lpfc hba data structure.
9295 *
9296 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA
9297 * operation.
9298 *
9299 * Return codes
af901ca1 9300 * 0 - successful
25985edc 9301 * -ENOMEM - No available memory
d439d286 9302 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
9303 **/
9304int
9305lpfc_sli4_queue_setup(struct lpfc_hba *phba)
9306{
962bc51b
JS
9307 uint32_t shdr_status, shdr_add_status;
9308 union lpfc_sli4_cfg_shdr *shdr;
cdb42bec 9309 struct lpfc_sli4_hdw_queue *qp;
962bc51b 9310 LPFC_MBOXQ_t *mboxq;
895427bd 9311 int qidx;
cb733e35 9312 uint32_t length, usdelay;
895427bd 9313 int rc = -ENOMEM;
962bc51b
JS
9314
9315 /* Check for dual-ULP support */
9316 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9317 if (!mboxq) {
9318 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9319 "3249 Unable to allocate memory for "
9320 "QUERY_FW_CFG mailbox command\n");
9321 return -ENOMEM;
9322 }
9323 length = (sizeof(struct lpfc_mbx_query_fw_config) -
9324 sizeof(struct lpfc_sli4_cfg_mhdr));
9325 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
9326 LPFC_MBOX_OPCODE_QUERY_FW_CFG,
9327 length, LPFC_SLI4_MBX_EMBED);
9328
9329 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
9330
9331 shdr = (union lpfc_sli4_cfg_shdr *)
9332 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
9333 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
9334 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
9335 if (shdr_status || shdr_add_status || rc) {
9336 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9337 "3250 QUERY_FW_CFG mailbox failed with status "
9338 "x%x add_status x%x, mbx status x%x\n",
9339 shdr_status, shdr_add_status, rc);
9340 if (rc != MBX_TIMEOUT)
9341 mempool_free(mboxq, phba->mbox_mem_pool);
9342 rc = -ENXIO;
9343 goto out_error;
9344 }
9345
9346 phba->sli4_hba.fw_func_mode =
9347 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode;
9348 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode;
9349 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode;
8b017a30
JS
9350 phba->sli4_hba.physical_port =
9351 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port;
962bc51b
JS
9352 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9353 "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, "
9354 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode,
9355 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode);
9356
9357 if (rc != MBX_TIMEOUT)
9358 mempool_free(mboxq, phba->mbox_mem_pool);
da0436e9
JS
9359
9360 /*
67d12733 9361 * Set up HBA Event Queues (EQs)
da0436e9 9362 */
cdb42bec 9363 qp = phba->sli4_hba.hdwq;
da0436e9 9364
67d12733 9365 /* Set up HBA event queue */
cdb42bec 9366 if (!qp) {
2e90f4b5
JS
9367 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9368 "3147 Fast-path EQs not allocated\n");
1b51197d 9369 rc = -ENOMEM;
67d12733 9370 goto out_error;
2e90f4b5 9371 }
6a828b0f 9372 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
cdb42bec 9373 if (!qp[qidx].hba_eq) {
da0436e9
JS
9374 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9375 "0522 Fast-path EQ (%d) not "
895427bd 9376 "allocated\n", qidx);
1b51197d 9377 rc = -ENOMEM;
895427bd 9378 goto out_destroy;
da0436e9 9379 }
cdb42bec
JS
9380 rc = lpfc_eq_create(phba, qp[qidx].hba_eq,
9381 phba->cfg_fcp_imax);
da0436e9
JS
9382 if (rc) {
9383 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9384 "0523 Failed setup of fast-path EQ "
895427bd 9385 "(%d), rc = 0x%x\n", qidx,
a2fc4aef 9386 (uint32_t)rc);
895427bd 9387 goto out_destroy;
da0436e9
JS
9388 }
9389 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
cdb42bec
JS
9390 "2584 HBA EQ setup: queue[%d]-id=%d\n", qidx,
9391 qp[qidx].hba_eq->queue_id);
67d12733
JS
9392 }
9393
cdb42bec
JS
9394 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
9395 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
895427bd 9396 rc = lpfc_create_wq_cq(phba,
cdb42bec
JS
9397 qp[qidx].hba_eq,
9398 qp[qidx].nvme_cq,
9399 qp[qidx].nvme_wq,
9400 &phba->sli4_hba.hdwq[qidx].nvme_cq_map,
895427bd
JS
9401 qidx, LPFC_NVME);
9402 if (rc) {
9403 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9404 "6123 Failed to setup fastpath "
9405 "NVME WQ/CQ (%d), rc = 0x%x\n",
9406 qidx, (uint32_t)rc);
9407 goto out_destroy;
9408 }
9409 }
67d12733
JS
9410 }
9411
cdb42bec
JS
9412 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
9413 rc = lpfc_create_wq_cq(phba,
9414 qp[qidx].hba_eq,
9415 qp[qidx].fcp_cq,
9416 qp[qidx].fcp_wq,
9417 &phba->sli4_hba.hdwq[qidx].fcp_cq_map,
9418 qidx, LPFC_FCP);
9419 if (rc) {
67d12733 9420 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
9421 "0535 Failed to setup fastpath "
9422 "FCP WQ/CQ (%d), rc = 0x%x\n",
9423 qidx, (uint32_t)rc);
cdb42bec 9424 goto out_destroy;
895427bd 9425 }
67d12733 9426 }
895427bd 9427
da0436e9 9428 /*
895427bd 9429 * Set up Slow Path Complete Queues (CQs)
da0436e9
JS
9430 */
9431
895427bd 9432 /* Set up slow-path MBOX CQ/MQ */
da0436e9 9433
895427bd 9434 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) {
da0436e9 9435 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
9436 "0528 %s not allocated\n",
9437 phba->sli4_hba.mbx_cq ?
d1f525aa 9438 "Mailbox WQ" : "Mailbox CQ");
1b51197d 9439 rc = -ENOMEM;
895427bd 9440 goto out_destroy;
da0436e9 9441 }
da0436e9 9442
cdb42bec 9443 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
d1f525aa
JS
9444 phba->sli4_hba.mbx_cq,
9445 phba->sli4_hba.mbx_wq,
9446 NULL, 0, LPFC_MBOX);
da0436e9
JS
9447 if (rc) {
9448 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
9449 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n",
9450 (uint32_t)rc);
9451 goto out_destroy;
da0436e9 9452 }
2d7dbc4c
JS
9453 if (phba->nvmet_support) {
9454 if (!phba->sli4_hba.nvmet_cqset) {
9455 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9456 "3165 Fast-path NVME CQ Set "
9457 "array not allocated\n");
9458 rc = -ENOMEM;
9459 goto out_destroy;
9460 }
9461 if (phba->cfg_nvmet_mrq > 1) {
9462 rc = lpfc_cq_create_set(phba,
9463 phba->sli4_hba.nvmet_cqset,
cdb42bec 9464 qp,
2d7dbc4c
JS
9465 LPFC_WCQ, LPFC_NVMET);
9466 if (rc) {
9467 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9468 "3164 Failed setup of NVME CQ "
9469 "Set, rc = 0x%x\n",
9470 (uint32_t)rc);
9471 goto out_destroy;
9472 }
9473 } else {
9474 /* Set up NVMET Receive Complete Queue */
9475 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0],
cdb42bec 9476 qp[0].hba_eq,
2d7dbc4c
JS
9477 LPFC_WCQ, LPFC_NVMET);
9478 if (rc) {
9479 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9480 "6089 Failed setup NVMET CQ: "
9481 "rc = 0x%x\n", (uint32_t)rc);
9482 goto out_destroy;
9483 }
81b96eda
JS
9484 phba->sli4_hba.nvmet_cqset[0]->chann = 0;
9485
2d7dbc4c
JS
9486 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9487 "6090 NVMET CQ setup: cq-id=%d, "
9488 "parent eq-id=%d\n",
9489 phba->sli4_hba.nvmet_cqset[0]->queue_id,
cdb42bec 9490 qp[0].hba_eq->queue_id);
2d7dbc4c
JS
9491 }
9492 }
da0436e9 9493
895427bd
JS
9494 /* Set up slow-path ELS WQ/CQ */
9495 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) {
da0436e9 9496 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS
9497 "0530 ELS %s not allocated\n",
9498 phba->sli4_hba.els_cq ? "WQ" : "CQ");
1b51197d 9499 rc = -ENOMEM;
895427bd 9500 goto out_destroy;
da0436e9 9501 }
cdb42bec
JS
9502 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
9503 phba->sli4_hba.els_cq,
9504 phba->sli4_hba.els_wq,
9505 NULL, 0, LPFC_ELS);
da0436e9
JS
9506 if (rc) {
9507 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
cdb42bec
JS
9508 "0525 Failed setup of ELS WQ/CQ: rc = 0x%x\n",
9509 (uint32_t)rc);
895427bd 9510 goto out_destroy;
da0436e9
JS
9511 }
9512 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9513 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n",
9514 phba->sli4_hba.els_wq->queue_id,
9515 phba->sli4_hba.els_cq->queue_id);
9516
cdb42bec 9517 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd
JS
9518 /* Set up NVME LS Complete Queue */
9519 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) {
9520 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9521 "6091 LS %s not allocated\n",
9522 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ");
9523 rc = -ENOMEM;
9524 goto out_destroy;
9525 }
cdb42bec
JS
9526 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
9527 phba->sli4_hba.nvmels_cq,
9528 phba->sli4_hba.nvmels_wq,
9529 NULL, 0, LPFC_NVME_LS);
895427bd
JS
9530 if (rc) {
9531 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
cdb42bec
JS
9532 "0526 Failed setup of NVVME LS WQ/CQ: "
9533 "rc = 0x%x\n", (uint32_t)rc);
895427bd
JS
9534 goto out_destroy;
9535 }
9536
9537 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9538 "6096 ELS WQ setup: wq-id=%d, "
9539 "parent cq-id=%d\n",
9540 phba->sli4_hba.nvmels_wq->queue_id,
9541 phba->sli4_hba.nvmels_cq->queue_id);
9542 }
9543
2d7dbc4c
JS
9544 /*
9545 * Create NVMET Receive Queue (RQ)
9546 */
9547 if (phba->nvmet_support) {
9548 if ((!phba->sli4_hba.nvmet_cqset) ||
9549 (!phba->sli4_hba.nvmet_mrq_hdr) ||
9550 (!phba->sli4_hba.nvmet_mrq_data)) {
9551 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9552 "6130 MRQ CQ Queues not "
9553 "allocated\n");
9554 rc = -ENOMEM;
9555 goto out_destroy;
9556 }
9557 if (phba->cfg_nvmet_mrq > 1) {
9558 rc = lpfc_mrq_create(phba,
9559 phba->sli4_hba.nvmet_mrq_hdr,
9560 phba->sli4_hba.nvmet_mrq_data,
9561 phba->sli4_hba.nvmet_cqset,
9562 LPFC_NVMET);
9563 if (rc) {
9564 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9565 "6098 Failed setup of NVMET "
9566 "MRQ: rc = 0x%x\n",
9567 (uint32_t)rc);
9568 goto out_destroy;
9569 }
9570
9571 } else {
9572 rc = lpfc_rq_create(phba,
9573 phba->sli4_hba.nvmet_mrq_hdr[0],
9574 phba->sli4_hba.nvmet_mrq_data[0],
9575 phba->sli4_hba.nvmet_cqset[0],
9576 LPFC_NVMET);
9577 if (rc) {
9578 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9579 "6057 Failed setup of NVMET "
9580 "Receive Queue: rc = 0x%x\n",
9581 (uint32_t)rc);
9582 goto out_destroy;
9583 }
9584
9585 lpfc_printf_log(
9586 phba, KERN_INFO, LOG_INIT,
9587 "6099 NVMET RQ setup: hdr-rq-id=%d, "
9588 "dat-rq-id=%d parent cq-id=%d\n",
9589 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id,
9590 phba->sli4_hba.nvmet_mrq_data[0]->queue_id,
9591 phba->sli4_hba.nvmet_cqset[0]->queue_id);
9592
9593 }
9594 }
9595
da0436e9
JS
9596 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
9597 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9598 "0540 Receive Queue not allocated\n");
1b51197d 9599 rc = -ENOMEM;
895427bd 9600 goto out_destroy;
da0436e9 9601 }
73d91e50 9602
da0436e9 9603 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
4d9ab994 9604 phba->sli4_hba.els_cq, LPFC_USOL);
da0436e9
JS
9605 if (rc) {
9606 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9607 "0541 Failed setup of Receive Queue: "
a2fc4aef 9608 "rc = 0x%x\n", (uint32_t)rc);
895427bd 9609 goto out_destroy;
da0436e9 9610 }
73d91e50 9611
da0436e9
JS
9612 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9613 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d "
9614 "parent cq-id=%d\n",
9615 phba->sli4_hba.hdr_rq->queue_id,
9616 phba->sli4_hba.dat_rq->queue_id,
4d9ab994 9617 phba->sli4_hba.els_cq->queue_id);
1ba981fd 9618
cb733e35
JS
9619 if (phba->cfg_fcp_imax)
9620 usdelay = LPFC_SEC_TO_USEC / phba->cfg_fcp_imax;
9621 else
9622 usdelay = 0;
9623
6a828b0f 9624 for (qidx = 0; qidx < phba->cfg_irq_chann;
cdb42bec 9625 qidx += LPFC_MAX_EQ_DELAY_EQID_CNT)
0cf07f84 9626 lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT,
cb733e35 9627 usdelay);
43140ca6 9628
6a828b0f
JS
9629 if (phba->sli4_hba.cq_max) {
9630 kfree(phba->sli4_hba.cq_lookup);
9631 phba->sli4_hba.cq_lookup = kcalloc((phba->sli4_hba.cq_max + 1),
9632 sizeof(struct lpfc_queue *), GFP_KERNEL);
9633 if (!phba->sli4_hba.cq_lookup) {
9634 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9635 "0549 Failed setup of CQ Lookup table: "
9636 "size 0x%x\n", phba->sli4_hba.cq_max);
9637 goto out_destroy;
9638 }
9639 lpfc_setup_cq_lookup(phba);
9640 }
da0436e9
JS
9641 return 0;
9642
895427bd
JS
9643out_destroy:
9644 lpfc_sli4_queue_unset(phba);
da0436e9
JS
9645out_error:
9646 return rc;
9647}
9648
9649/**
9650 * lpfc_sli4_queue_unset - Unset all the SLI4 queues
9651 * @phba: pointer to lpfc hba data structure.
9652 *
9653 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA
9654 * operation.
9655 *
9656 * Return codes
af901ca1 9657 * 0 - successful
25985edc 9658 * -ENOMEM - No available memory
d439d286 9659 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
9660 **/
9661void
9662lpfc_sli4_queue_unset(struct lpfc_hba *phba)
9663{
cdb42bec 9664 struct lpfc_sli4_hdw_queue *qp;
895427bd 9665 int qidx;
da0436e9
JS
9666
9667 /* Unset mailbox command work queue */
895427bd
JS
9668 if (phba->sli4_hba.mbx_wq)
9669 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
9670
9671 /* Unset NVME LS work queue */
9672 if (phba->sli4_hba.nvmels_wq)
9673 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq);
9674
da0436e9 9675 /* Unset ELS work queue */
019c0d66 9676 if (phba->sli4_hba.els_wq)
895427bd
JS
9677 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
9678
da0436e9 9679 /* Unset unsolicited receive queue */
895427bd
JS
9680 if (phba->sli4_hba.hdr_rq)
9681 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq,
9682 phba->sli4_hba.dat_rq);
9683
da0436e9 9684 /* Unset mailbox command complete queue */
895427bd
JS
9685 if (phba->sli4_hba.mbx_cq)
9686 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
9687
da0436e9 9688 /* Unset ELS complete queue */
895427bd
JS
9689 if (phba->sli4_hba.els_cq)
9690 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
9691
9692 /* Unset NVME LS complete queue */
9693 if (phba->sli4_hba.nvmels_cq)
9694 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq);
9695
bcb24f65
JS
9696 if (phba->nvmet_support) {
9697 /* Unset NVMET MRQ queue */
9698 if (phba->sli4_hba.nvmet_mrq_hdr) {
9699 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
9700 lpfc_rq_destroy(
9701 phba,
2d7dbc4c
JS
9702 phba->sli4_hba.nvmet_mrq_hdr[qidx],
9703 phba->sli4_hba.nvmet_mrq_data[qidx]);
bcb24f65 9704 }
2d7dbc4c 9705
bcb24f65
JS
9706 /* Unset NVMET CQ Set complete queue */
9707 if (phba->sli4_hba.nvmet_cqset) {
9708 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
9709 lpfc_cq_destroy(
9710 phba, phba->sli4_hba.nvmet_cqset[qidx]);
9711 }
2d7dbc4c
JS
9712 }
9713
cdb42bec
JS
9714 /* Unset fast-path SLI4 queues */
9715 if (phba->sli4_hba.hdwq) {
9716 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
9717 qp = &phba->sli4_hba.hdwq[qidx];
9718 lpfc_wq_destroy(phba, qp->fcp_wq);
9719 lpfc_wq_destroy(phba, qp->nvme_wq);
9720 lpfc_cq_destroy(phba, qp->fcp_cq);
9721 lpfc_cq_destroy(phba, qp->nvme_cq);
6a828b0f
JS
9722 if (qidx < phba->cfg_irq_chann)
9723 lpfc_eq_destroy(phba, qp->hba_eq);
cdb42bec
JS
9724 }
9725 }
6a828b0f
JS
9726
9727 kfree(phba->sli4_hba.cq_lookup);
9728 phba->sli4_hba.cq_lookup = NULL;
9729 phba->sli4_hba.cq_max = 0;
da0436e9
JS
9730}
9731
9732/**
9733 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool
9734 * @phba: pointer to lpfc hba data structure.
9735 *
9736 * This routine is invoked to allocate and set up a pool of completion queue
9737 * events. The body of the completion queue event is a completion queue entry
9738 * CQE. For now, this pool is used for the interrupt service routine to queue
9739 * the following HBA completion queue events for the worker thread to process:
9740 * - Mailbox asynchronous events
9741 * - Receive queue completion unsolicited events
9742 * Later, this can be used for all the slow-path events.
9743 *
9744 * Return codes
af901ca1 9745 * 0 - successful
25985edc 9746 * -ENOMEM - No available memory
da0436e9
JS
9747 **/
9748static int
9749lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba)
9750{
9751 struct lpfc_cq_event *cq_event;
9752 int i;
9753
9754 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
9755 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL);
9756 if (!cq_event)
9757 goto out_pool_create_fail;
9758 list_add_tail(&cq_event->list,
9759 &phba->sli4_hba.sp_cqe_event_pool);
9760 }
9761 return 0;
9762
9763out_pool_create_fail:
9764 lpfc_sli4_cq_event_pool_destroy(phba);
9765 return -ENOMEM;
9766}
9767
9768/**
9769 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool
9770 * @phba: pointer to lpfc hba data structure.
9771 *
9772 * This routine is invoked to free the pool of completion queue events at
9773 * driver unload time. Note that, it is the responsibility of the driver
9774 * cleanup routine to free all the outstanding completion-queue events
9775 * allocated from this pool back into the pool before invoking this routine
9776 * to destroy the pool.
9777 **/
9778static void
9779lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba)
9780{
9781 struct lpfc_cq_event *cq_event, *next_cq_event;
9782
9783 list_for_each_entry_safe(cq_event, next_cq_event,
9784 &phba->sli4_hba.sp_cqe_event_pool, list) {
9785 list_del(&cq_event->list);
9786 kfree(cq_event);
9787 }
9788}
9789
9790/**
9791 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
9792 * @phba: pointer to lpfc hba data structure.
9793 *
9794 * This routine is the lock free version of the API invoked to allocate a
9795 * completion-queue event from the free pool.
9796 *
9797 * Return: Pointer to the newly allocated completion-queue event if successful
9798 * NULL otherwise.
9799 **/
9800struct lpfc_cq_event *
9801__lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
9802{
9803 struct lpfc_cq_event *cq_event = NULL;
9804
9805 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
9806 struct lpfc_cq_event, list);
9807 return cq_event;
9808}
9809
9810/**
9811 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
9812 * @phba: pointer to lpfc hba data structure.
9813 *
9814 * This routine is the lock version of the API invoked to allocate a
9815 * completion-queue event from the free pool.
9816 *
9817 * Return: Pointer to the newly allocated completion-queue event if successful
9818 * NULL otherwise.
9819 **/
9820struct lpfc_cq_event *
9821lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
9822{
9823 struct lpfc_cq_event *cq_event;
9824 unsigned long iflags;
9825
9826 spin_lock_irqsave(&phba->hbalock, iflags);
9827 cq_event = __lpfc_sli4_cq_event_alloc(phba);
9828 spin_unlock_irqrestore(&phba->hbalock, iflags);
9829 return cq_event;
9830}
9831
9832/**
9833 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
9834 * @phba: pointer to lpfc hba data structure.
9835 * @cq_event: pointer to the completion queue event to be freed.
9836 *
9837 * This routine is the lock free version of the API invoked to release a
9838 * completion-queue event back into the free pool.
9839 **/
9840void
9841__lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
9842 struct lpfc_cq_event *cq_event)
9843{
9844 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
9845}
9846
9847/**
9848 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
9849 * @phba: pointer to lpfc hba data structure.
9850 * @cq_event: pointer to the completion queue event to be freed.
9851 *
9852 * This routine is the lock version of the API invoked to release a
9853 * completion-queue event back into the free pool.
9854 **/
9855void
9856lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
9857 struct lpfc_cq_event *cq_event)
9858{
9859 unsigned long iflags;
9860 spin_lock_irqsave(&phba->hbalock, iflags);
9861 __lpfc_sli4_cq_event_release(phba, cq_event);
9862 spin_unlock_irqrestore(&phba->hbalock, iflags);
9863}
9864
9865/**
9866 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool
9867 * @phba: pointer to lpfc hba data structure.
9868 *
9869 * This routine is to free all the pending completion-queue events to the
9870 * back into the free pool for device reset.
9871 **/
9872static void
9873lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba)
9874{
9875 LIST_HEAD(cqelist);
9876 struct lpfc_cq_event *cqe;
9877 unsigned long iflags;
9878
9879 /* Retrieve all the pending WCQEs from pending WCQE lists */
9880 spin_lock_irqsave(&phba->hbalock, iflags);
9881 /* Pending FCP XRI abort events */
9882 list_splice_init(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue,
9883 &cqelist);
9884 /* Pending ELS XRI abort events */
9885 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
9886 &cqelist);
9887 /* Pending asynnc events */
9888 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
9889 &cqelist);
9890 spin_unlock_irqrestore(&phba->hbalock, iflags);
9891
9892 while (!list_empty(&cqelist)) {
9893 list_remove_head(&cqelist, cqe, struct lpfc_cq_event, list);
9894 lpfc_sli4_cq_event_release(phba, cqe);
9895 }
9896}
9897
9898/**
9899 * lpfc_pci_function_reset - Reset pci function.
9900 * @phba: pointer to lpfc hba data structure.
9901 *
9902 * This routine is invoked to request a PCI function reset. It will destroys
9903 * all resources assigned to the PCI function which originates this request.
9904 *
9905 * Return codes
af901ca1 9906 * 0 - successful
25985edc 9907 * -ENOMEM - No available memory
d439d286 9908 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS
9909 **/
9910int
9911lpfc_pci_function_reset(struct lpfc_hba *phba)
9912{
9913 LPFC_MBOXQ_t *mboxq;
2fcee4bf 9914 uint32_t rc = 0, if_type;
da0436e9 9915 uint32_t shdr_status, shdr_add_status;
2f6fa2c9
JS
9916 uint32_t rdy_chk;
9917 uint32_t port_reset = 0;
da0436e9 9918 union lpfc_sli4_cfg_shdr *shdr;
2fcee4bf 9919 struct lpfc_register reg_data;
2b81f942 9920 uint16_t devid;
da0436e9 9921
2fcee4bf
JS
9922 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9923 switch (if_type) {
9924 case LPFC_SLI_INTF_IF_TYPE_0:
9925 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
9926 GFP_KERNEL);
9927 if (!mboxq) {
9928 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9929 "0494 Unable to allocate memory for "
9930 "issuing SLI_FUNCTION_RESET mailbox "
9931 "command\n");
9932 return -ENOMEM;
9933 }
da0436e9 9934
2fcee4bf
JS
9935 /* Setup PCI function reset mailbox-ioctl command */
9936 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
9937 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0,
9938 LPFC_SLI4_MBX_EMBED);
9939 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
9940 shdr = (union lpfc_sli4_cfg_shdr *)
9941 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
9942 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
9943 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
9944 &shdr->response);
9945 if (rc != MBX_TIMEOUT)
9946 mempool_free(mboxq, phba->mbox_mem_pool);
9947 if (shdr_status || shdr_add_status || rc) {
9948 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9949 "0495 SLI_FUNCTION_RESET mailbox "
9950 "failed with status x%x add_status x%x,"
9951 " mbx status x%x\n",
9952 shdr_status, shdr_add_status, rc);
9953 rc = -ENXIO;
9954 }
9955 break;
9956 case LPFC_SLI_INTF_IF_TYPE_2:
27d6ac0a 9957 case LPFC_SLI_INTF_IF_TYPE_6:
2f6fa2c9
JS
9958wait:
9959 /*
9960 * Poll the Port Status Register and wait for RDY for
9961 * up to 30 seconds. If the port doesn't respond, treat
9962 * it as an error.
9963 */
77d093fb 9964 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) {
2f6fa2c9
JS
9965 if (lpfc_readl(phba->sli4_hba.u.if_type2.
9966 STATUSregaddr, &reg_data.word0)) {
9967 rc = -ENODEV;
9968 goto out;
9969 }
9970 if (bf_get(lpfc_sliport_status_rdy, &reg_data))
9971 break;
9972 msleep(20);
9973 }
9974
9975 if (!bf_get(lpfc_sliport_status_rdy, &reg_data)) {
9976 phba->work_status[0] = readl(
9977 phba->sli4_hba.u.if_type2.ERR1regaddr);
9978 phba->work_status[1] = readl(
9979 phba->sli4_hba.u.if_type2.ERR2regaddr);
9980 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9981 "2890 Port not ready, port status reg "
9982 "0x%x error 1=0x%x, error 2=0x%x\n",
9983 reg_data.word0,
9984 phba->work_status[0],
9985 phba->work_status[1]);
9986 rc = -ENODEV;
9987 goto out;
9988 }
9989
9990 if (!port_reset) {
9991 /*
9992 * Reset the port now
9993 */
2fcee4bf
JS
9994 reg_data.word0 = 0;
9995 bf_set(lpfc_sliport_ctrl_end, &reg_data,
9996 LPFC_SLIPORT_LITTLE_ENDIAN);
9997 bf_set(lpfc_sliport_ctrl_ip, &reg_data,
9998 LPFC_SLIPORT_INIT_PORT);
9999 writel(reg_data.word0, phba->sli4_hba.u.if_type2.
10000 CTRLregaddr);
8fcb8acd 10001 /* flush */
2b81f942
JS
10002 pci_read_config_word(phba->pcidev,
10003 PCI_DEVICE_ID, &devid);
2fcee4bf 10004
2f6fa2c9
JS
10005 port_reset = 1;
10006 msleep(20);
10007 goto wait;
10008 } else if (bf_get(lpfc_sliport_status_rn, &reg_data)) {
10009 rc = -ENODEV;
10010 goto out;
2fcee4bf
JS
10011 }
10012 break;
2f6fa2c9 10013
2fcee4bf
JS
10014 case LPFC_SLI_INTF_IF_TYPE_1:
10015 default:
10016 break;
da0436e9 10017 }
2fcee4bf 10018
73d91e50 10019out:
2fcee4bf 10020 /* Catch the not-ready port failure after a port reset. */
2f6fa2c9 10021 if (rc) {
229adb0e
JS
10022 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10023 "3317 HBA not functional: IP Reset Failed "
2f6fa2c9 10024 "try: echo fw_reset > board_mode\n");
2fcee4bf 10025 rc = -ENODEV;
229adb0e 10026 }
2fcee4bf 10027
da0436e9
JS
10028 return rc;
10029}
10030
da0436e9
JS
10031/**
10032 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space.
10033 * @phba: pointer to lpfc hba data structure.
10034 *
10035 * This routine is invoked to set up the PCI device memory space for device
10036 * with SLI-4 interface spec.
10037 *
10038 * Return codes
af901ca1 10039 * 0 - successful
da0436e9
JS
10040 * other values - error
10041 **/
10042static int
10043lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
10044{
f30e1bfd 10045 struct pci_dev *pdev = phba->pcidev;
da0436e9
JS
10046 unsigned long bar0map_len, bar1map_len, bar2map_len;
10047 int error = -ENODEV;
2fcee4bf 10048 uint32_t if_type;
da0436e9 10049
f30e1bfd 10050 if (!pdev)
da0436e9 10051 return error;
da0436e9
JS
10052
10053 /* Set the device DMA mask size */
f30e1bfd
CH
10054 if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)) ||
10055 dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))
10056 return error;
da0436e9 10057
2fcee4bf
JS
10058 /*
10059 * The BARs and register set definitions and offset locations are
10060 * dependent on the if_type.
10061 */
10062 if (pci_read_config_dword(pdev, LPFC_SLI_INTF,
10063 &phba->sli4_hba.sli_intf.word0)) {
10064 return error;
10065 }
10066
10067 /* There is no SLI3 failback for SLI4 devices. */
10068 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
10069 LPFC_SLI_INTF_VALID) {
10070 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10071 "2894 SLI_INTF reg contents invalid "
10072 "sli_intf reg 0x%x\n",
10073 phba->sli4_hba.sli_intf.word0);
10074 return error;
10075 }
10076
10077 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
10078 /*
10079 * Get the bus address of SLI4 device Bar regions and the
10080 * number of bytes required by each mapping. The mapping of the
10081 * particular PCI BARs regions is dependent on the type of
10082 * SLI4 device.
da0436e9 10083 */
f5ca6f2e
JS
10084 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) {
10085 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0);
10086 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0);
2fcee4bf
JS
10087
10088 /*
10089 * Map SLI4 PCI Config Space Register base to a kernel virtual
10090 * addr
10091 */
10092 phba->sli4_hba.conf_regs_memmap_p =
10093 ioremap(phba->pci_bar0_map, bar0map_len);
10094 if (!phba->sli4_hba.conf_regs_memmap_p) {
10095 dev_printk(KERN_ERR, &pdev->dev,
10096 "ioremap failed for SLI4 PCI config "
10097 "registers.\n");
10098 goto out;
10099 }
f5ca6f2e 10100 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
2fcee4bf
JS
10101 /* Set up BAR0 PCI config space register memory map */
10102 lpfc_sli4_bar0_register_memmap(phba, if_type);
1dfb5a47
JS
10103 } else {
10104 phba->pci_bar0_map = pci_resource_start(pdev, 1);
10105 bar0map_len = pci_resource_len(pdev, 1);
27d6ac0a 10106 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
2fcee4bf
JS
10107 dev_printk(KERN_ERR, &pdev->dev,
10108 "FATAL - No BAR0 mapping for SLI4, if_type 2\n");
10109 goto out;
10110 }
10111 phba->sli4_hba.conf_regs_memmap_p =
da0436e9 10112 ioremap(phba->pci_bar0_map, bar0map_len);
2fcee4bf
JS
10113 if (!phba->sli4_hba.conf_regs_memmap_p) {
10114 dev_printk(KERN_ERR, &pdev->dev,
10115 "ioremap failed for SLI4 PCI config "
10116 "registers.\n");
10117 goto out;
10118 }
10119 lpfc_sli4_bar0_register_memmap(phba, if_type);
da0436e9
JS
10120 }
10121
e4b9794e
JS
10122 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
10123 if (pci_resource_start(pdev, PCI_64BIT_BAR2)) {
10124 /*
10125 * Map SLI4 if type 0 HBA Control Register base to a
10126 * kernel virtual address and setup the registers.
10127 */
10128 phba->pci_bar1_map = pci_resource_start(pdev,
10129 PCI_64BIT_BAR2);
10130 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
10131 phba->sli4_hba.ctrl_regs_memmap_p =
10132 ioremap(phba->pci_bar1_map,
10133 bar1map_len);
10134 if (!phba->sli4_hba.ctrl_regs_memmap_p) {
10135 dev_err(&pdev->dev,
10136 "ioremap failed for SLI4 HBA "
10137 "control registers.\n");
10138 error = -ENOMEM;
10139 goto out_iounmap_conf;
10140 }
10141 phba->pci_bar2_memmap_p =
10142 phba->sli4_hba.ctrl_regs_memmap_p;
27d6ac0a 10143 lpfc_sli4_bar1_register_memmap(phba, if_type);
e4b9794e
JS
10144 } else {
10145 error = -ENOMEM;
2fcee4bf
JS
10146 goto out_iounmap_conf;
10147 }
da0436e9
JS
10148 }
10149
27d6ac0a
JS
10150 if ((if_type == LPFC_SLI_INTF_IF_TYPE_6) &&
10151 (pci_resource_start(pdev, PCI_64BIT_BAR2))) {
10152 /*
10153 * Map SLI4 if type 6 HBA Doorbell Register base to a kernel
10154 * virtual address and setup the registers.
10155 */
10156 phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2);
10157 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
10158 phba->sli4_hba.drbl_regs_memmap_p =
10159 ioremap(phba->pci_bar1_map, bar1map_len);
10160 if (!phba->sli4_hba.drbl_regs_memmap_p) {
10161 dev_err(&pdev->dev,
10162 "ioremap failed for SLI4 HBA doorbell registers.\n");
10163 goto out_iounmap_conf;
10164 }
10165 phba->pci_bar2_memmap_p = phba->sli4_hba.drbl_regs_memmap_p;
10166 lpfc_sli4_bar1_register_memmap(phba, if_type);
10167 }
10168
e4b9794e
JS
10169 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
10170 if (pci_resource_start(pdev, PCI_64BIT_BAR4)) {
10171 /*
10172 * Map SLI4 if type 0 HBA Doorbell Register base to
10173 * a kernel virtual address and setup the registers.
10174 */
10175 phba->pci_bar2_map = pci_resource_start(pdev,
10176 PCI_64BIT_BAR4);
10177 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
10178 phba->sli4_hba.drbl_regs_memmap_p =
10179 ioremap(phba->pci_bar2_map,
10180 bar2map_len);
10181 if (!phba->sli4_hba.drbl_regs_memmap_p) {
10182 dev_err(&pdev->dev,
10183 "ioremap failed for SLI4 HBA"
10184 " doorbell registers.\n");
10185 error = -ENOMEM;
10186 goto out_iounmap_ctrl;
10187 }
10188 phba->pci_bar4_memmap_p =
10189 phba->sli4_hba.drbl_regs_memmap_p;
10190 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
10191 if (error)
10192 goto out_iounmap_all;
10193 } else {
10194 error = -ENOMEM;
2fcee4bf 10195 goto out_iounmap_all;
e4b9794e 10196 }
da0436e9
JS
10197 }
10198
1351e69f
JS
10199 if (if_type == LPFC_SLI_INTF_IF_TYPE_6 &&
10200 pci_resource_start(pdev, PCI_64BIT_BAR4)) {
10201 /*
10202 * Map SLI4 if type 6 HBA DPP Register base to a kernel
10203 * virtual address and setup the registers.
10204 */
10205 phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4);
10206 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
10207 phba->sli4_hba.dpp_regs_memmap_p =
10208 ioremap(phba->pci_bar2_map, bar2map_len);
10209 if (!phba->sli4_hba.dpp_regs_memmap_p) {
10210 dev_err(&pdev->dev,
10211 "ioremap failed for SLI4 HBA dpp registers.\n");
10212 goto out_iounmap_ctrl;
10213 }
10214 phba->pci_bar4_memmap_p = phba->sli4_hba.dpp_regs_memmap_p;
10215 }
10216
b71413dd 10217 /* Set up the EQ/CQ register handeling functions now */
27d6ac0a
JS
10218 switch (if_type) {
10219 case LPFC_SLI_INTF_IF_TYPE_0:
10220 case LPFC_SLI_INTF_IF_TYPE_2:
b71413dd 10221 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_eq_clr_intr;
32517fc0
JS
10222 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_write_eq_db;
10223 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_write_cq_db;
27d6ac0a
JS
10224 break;
10225 case LPFC_SLI_INTF_IF_TYPE_6:
10226 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_if6_eq_clr_intr;
32517fc0
JS
10227 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_if6_write_eq_db;
10228 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_if6_write_cq_db;
27d6ac0a
JS
10229 break;
10230 default:
10231 break;
b71413dd
JS
10232 }
10233
da0436e9
JS
10234 return 0;
10235
10236out_iounmap_all:
10237 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
10238out_iounmap_ctrl:
10239 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
10240out_iounmap_conf:
10241 iounmap(phba->sli4_hba.conf_regs_memmap_p);
10242out:
10243 return error;
10244}
10245
10246/**
10247 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space.
10248 * @phba: pointer to lpfc hba data structure.
10249 *
10250 * This routine is invoked to unset the PCI device memory space for device
10251 * with SLI-4 interface spec.
10252 **/
10253static void
10254lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba)
10255{
2e90f4b5
JS
10256 uint32_t if_type;
10257 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
da0436e9 10258
2e90f4b5
JS
10259 switch (if_type) {
10260 case LPFC_SLI_INTF_IF_TYPE_0:
10261 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
10262 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
10263 iounmap(phba->sli4_hba.conf_regs_memmap_p);
10264 break;
10265 case LPFC_SLI_INTF_IF_TYPE_2:
10266 iounmap(phba->sli4_hba.conf_regs_memmap_p);
10267 break;
27d6ac0a
JS
10268 case LPFC_SLI_INTF_IF_TYPE_6:
10269 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
10270 iounmap(phba->sli4_hba.conf_regs_memmap_p);
10271 break;
2e90f4b5
JS
10272 case LPFC_SLI_INTF_IF_TYPE_1:
10273 default:
10274 dev_printk(KERN_ERR, &phba->pcidev->dev,
10275 "FATAL - unsupported SLI4 interface type - %d\n",
10276 if_type);
10277 break;
10278 }
da0436e9
JS
10279}
10280
10281/**
10282 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device
10283 * @phba: pointer to lpfc hba data structure.
10284 *
10285 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 10286 * with SLI-3 interface specs.
da0436e9
JS
10287 *
10288 * Return codes
af901ca1 10289 * 0 - successful
da0436e9
JS
10290 * other values - error
10291 **/
10292static int
10293lpfc_sli_enable_msix(struct lpfc_hba *phba)
10294{
45ffac19 10295 int rc;
da0436e9
JS
10296 LPFC_MBOXQ_t *pmb;
10297
10298 /* Set up MSI-X multi-message vectors */
45ffac19
CH
10299 rc = pci_alloc_irq_vectors(phba->pcidev,
10300 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX);
10301 if (rc < 0) {
da0436e9
JS
10302 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10303 "0420 PCI enable MSI-X failed (%d)\n", rc);
029165ac 10304 goto vec_fail_out;
da0436e9 10305 }
45ffac19 10306
da0436e9
JS
10307 /*
10308 * Assign MSI-X vectors to interrupt handlers
10309 */
10310
10311 /* vector-0 is associated to slow-path handler */
45ffac19 10312 rc = request_irq(pci_irq_vector(phba->pcidev, 0),
ed243d37 10313 &lpfc_sli_sp_intr_handler, 0,
da0436e9
JS
10314 LPFC_SP_DRIVER_HANDLER_NAME, phba);
10315 if (rc) {
10316 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
10317 "0421 MSI-X slow-path request_irq failed "
10318 "(%d)\n", rc);
10319 goto msi_fail_out;
10320 }
10321
10322 /* vector-1 is associated to fast-path handler */
45ffac19 10323 rc = request_irq(pci_irq_vector(phba->pcidev, 1),
ed243d37 10324 &lpfc_sli_fp_intr_handler, 0,
da0436e9
JS
10325 LPFC_FP_DRIVER_HANDLER_NAME, phba);
10326
10327 if (rc) {
10328 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
10329 "0429 MSI-X fast-path request_irq failed "
10330 "(%d)\n", rc);
10331 goto irq_fail_out;
10332 }
10333
10334 /*
10335 * Configure HBA MSI-X attention conditions to messages
10336 */
10337 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
10338
10339 if (!pmb) {
10340 rc = -ENOMEM;
10341 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10342 "0474 Unable to allocate memory for issuing "
10343 "MBOX_CONFIG_MSI command\n");
10344 goto mem_fail_out;
10345 }
10346 rc = lpfc_config_msi(phba, pmb);
10347 if (rc)
10348 goto mbx_fail_out;
10349 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
10350 if (rc != MBX_SUCCESS) {
10351 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX,
10352 "0351 Config MSI mailbox command failed, "
10353 "mbxCmd x%x, mbxStatus x%x\n",
10354 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus);
10355 goto mbx_fail_out;
10356 }
10357
10358 /* Free memory allocated for mailbox command */
10359 mempool_free(pmb, phba->mbox_mem_pool);
10360 return rc;
10361
10362mbx_fail_out:
10363 /* Free memory allocated for mailbox command */
10364 mempool_free(pmb, phba->mbox_mem_pool);
10365
10366mem_fail_out:
10367 /* free the irq already requested */
45ffac19 10368 free_irq(pci_irq_vector(phba->pcidev, 1), phba);
da0436e9
JS
10369
10370irq_fail_out:
10371 /* free the irq already requested */
45ffac19 10372 free_irq(pci_irq_vector(phba->pcidev, 0), phba);
da0436e9
JS
10373
10374msi_fail_out:
10375 /* Unconfigure MSI-X capability structure */
45ffac19 10376 pci_free_irq_vectors(phba->pcidev);
029165ac
AG
10377
10378vec_fail_out:
da0436e9
JS
10379 return rc;
10380}
10381
da0436e9
JS
10382/**
10383 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device.
10384 * @phba: pointer to lpfc hba data structure.
10385 *
10386 * This routine is invoked to enable the MSI interrupt mode to device with
10387 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to
10388 * enable the MSI vector. The device driver is responsible for calling the
10389 * request_irq() to register MSI vector with a interrupt the handler, which
10390 * is done in this function.
10391 *
10392 * Return codes
af901ca1 10393 * 0 - successful
da0436e9
JS
10394 * other values - error
10395 */
10396static int
10397lpfc_sli_enable_msi(struct lpfc_hba *phba)
10398{
10399 int rc;
10400
10401 rc = pci_enable_msi(phba->pcidev);
10402 if (!rc)
10403 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10404 "0462 PCI enable MSI mode success.\n");
10405 else {
10406 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10407 "0471 PCI enable MSI mode failed (%d)\n", rc);
10408 return rc;
10409 }
10410
10411 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
ed243d37 10412 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS
10413 if (rc) {
10414 pci_disable_msi(phba->pcidev);
10415 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
10416 "0478 MSI request_irq failed (%d)\n", rc);
10417 }
10418 return rc;
10419}
10420
da0436e9
JS
10421/**
10422 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device.
10423 * @phba: pointer to lpfc hba data structure.
10424 *
10425 * This routine is invoked to enable device interrupt and associate driver's
10426 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface
10427 * spec. Depends on the interrupt mode configured to the driver, the driver
10428 * will try to fallback from the configured interrupt mode to an interrupt
10429 * mode which is supported by the platform, kernel, and device in the order
10430 * of:
10431 * MSI-X -> MSI -> IRQ.
10432 *
10433 * Return codes
af901ca1 10434 * 0 - successful
da0436e9
JS
10435 * other values - error
10436 **/
10437static uint32_t
10438lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
10439{
10440 uint32_t intr_mode = LPFC_INTR_ERROR;
10441 int retval;
10442
10443 if (cfg_mode == 2) {
10444 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */
10445 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3);
10446 if (!retval) {
10447 /* Now, try to enable MSI-X interrupt mode */
10448 retval = lpfc_sli_enable_msix(phba);
10449 if (!retval) {
10450 /* Indicate initialization to MSI-X mode */
10451 phba->intr_type = MSIX;
10452 intr_mode = 2;
10453 }
10454 }
10455 }
10456
10457 /* Fallback to MSI if MSI-X initialization failed */
10458 if (cfg_mode >= 1 && phba->intr_type == NONE) {
10459 retval = lpfc_sli_enable_msi(phba);
10460 if (!retval) {
10461 /* Indicate initialization to MSI mode */
10462 phba->intr_type = MSI;
10463 intr_mode = 1;
10464 }
10465 }
10466
10467 /* Fallback to INTx if both MSI-X/MSI initalization failed */
10468 if (phba->intr_type == NONE) {
10469 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
10470 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
10471 if (!retval) {
10472 /* Indicate initialization to INTx mode */
10473 phba->intr_type = INTx;
10474 intr_mode = 0;
10475 }
10476 }
10477 return intr_mode;
10478}
10479
10480/**
10481 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device.
10482 * @phba: pointer to lpfc hba data structure.
10483 *
10484 * This routine is invoked to disable device interrupt and disassociate the
10485 * driver's interrupt handler(s) from interrupt vector(s) to device with
10486 * SLI-3 interface spec. Depending on the interrupt mode, the driver will
10487 * release the interrupt vector(s) for the message signaled interrupt.
10488 **/
10489static void
10490lpfc_sli_disable_intr(struct lpfc_hba *phba)
10491{
45ffac19
CH
10492 int nr_irqs, i;
10493
da0436e9 10494 if (phba->intr_type == MSIX)
45ffac19
CH
10495 nr_irqs = LPFC_MSIX_VECTORS;
10496 else
10497 nr_irqs = 1;
10498
10499 for (i = 0; i < nr_irqs; i++)
10500 free_irq(pci_irq_vector(phba->pcidev, i), phba);
10501 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS
10502
10503 /* Reset interrupt management states */
10504 phba->intr_type = NONE;
10505 phba->sli.slistat.sli_intr = 0;
da0436e9
JS
10506}
10507
6a828b0f
JS
10508/**
10509 * lpfc_find_cpu_handle - Find the CPU that corresponds to the specified EQ
10510 * @phba: pointer to lpfc hba data structure.
10511 * @id: EQ vector index or Hardware Queue index
10512 * @match: LPFC_FIND_BY_EQ = match by EQ
10513 * LPFC_FIND_BY_HDWQ = match by Hardware Queue
10514 */
10515static uint16_t
10516lpfc_find_cpu_handle(struct lpfc_hba *phba, uint16_t id, int match)
10517{
10518 struct lpfc_vector_map_info *cpup;
10519 int cpu;
10520
10521 /* Find the desired phys_id for the specified EQ */
10522 cpup = phba->sli4_hba.cpu_map;
10523 for (cpu = 0; cpu < phba->sli4_hba.num_present_cpu; cpu++) {
10524 if ((match == LPFC_FIND_BY_EQ) &&
10525 (cpup->irq != LPFC_VECTOR_MAP_EMPTY) &&
10526 (cpup->eq == id))
10527 return cpu;
10528 if ((match == LPFC_FIND_BY_HDWQ) && (cpup->hdwq == id))
10529 return cpu;
10530 cpup++;
10531 }
10532 return 0;
10533}
10534
10535/**
10536 * lpfc_find_eq_handle - Find the EQ that corresponds to the specified
10537 * Hardware Queue
10538 * @phba: pointer to lpfc hba data structure.
10539 * @hdwq: Hardware Queue index
10540 */
10541static uint16_t
10542lpfc_find_eq_handle(struct lpfc_hba *phba, uint16_t hdwq)
10543{
10544 struct lpfc_vector_map_info *cpup;
10545 int cpu;
10546
10547 /* Find the desired phys_id for the specified EQ */
10548 cpup = phba->sli4_hba.cpu_map;
10549 for (cpu = 0; cpu < phba->sli4_hba.num_present_cpu; cpu++) {
10550 if (cpup->hdwq == hdwq)
10551 return cpup->eq;
10552 cpup++;
10553 }
10554 return 0;
10555}
10556
6a828b0f
JS
10557#ifdef CONFIG_X86
10558/**
10559 * lpfc_find_hyper - Determine if the CPU map entry is hyper-threaded
10560 * @phba: pointer to lpfc hba data structure.
10561 * @cpu: CPU map index
10562 * @phys_id: CPU package physical id
10563 * @core_id: CPU core id
10564 */
10565static int
10566lpfc_find_hyper(struct lpfc_hba *phba, int cpu,
10567 uint16_t phys_id, uint16_t core_id)
10568{
10569 struct lpfc_vector_map_info *cpup;
10570 int idx;
10571
10572 cpup = phba->sli4_hba.cpu_map;
10573 for (idx = 0; idx < phba->sli4_hba.num_present_cpu; idx++) {
10574 /* Does the cpup match the one we are looking for */
10575 if ((cpup->phys_id == phys_id) &&
10576 (cpup->core_id == core_id) &&
10577 (cpu != idx)) {
10578 return 1;
10579 }
10580 cpup++;
10581 }
10582 return 0;
10583}
10584#endif
10585
7bb03bbf 10586/**
895427bd 10587 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings
7bb03bbf 10588 * @phba: pointer to lpfc hba data structure.
6a828b0f 10589 * @vectors: number of msix vectors allocated.
895427bd
JS
10590 *
10591 * The routine will figure out the CPU affinity assignment for every
6a828b0f 10592 * MSI-X vector allocated for the HBA.
895427bd
JS
10593 * In addition, the CPU to IO channel mapping will be calculated
10594 * and the phba->sli4_hba.cpu_map array will reflect this.
7bb03bbf 10595 */
895427bd 10596static void
6a828b0f 10597lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
7bb03bbf 10598{
75508a8b 10599 int i, cpu, idx, phys_id;
6a828b0f
JS
10600 int max_phys_id, min_phys_id;
10601 int max_core_id, min_core_id;
7bb03bbf 10602 struct lpfc_vector_map_info *cpup;
75508a8b 10603 const struct cpumask *maskp;
7bb03bbf
JS
10604#ifdef CONFIG_X86
10605 struct cpuinfo_x86 *cpuinfo;
10606#endif
7bb03bbf
JS
10607
10608 /* Init cpu_map array */
10609 memset(phba->sli4_hba.cpu_map, 0xff,
10610 (sizeof(struct lpfc_vector_map_info) *
895427bd 10611 phba->sli4_hba.num_present_cpu));
7bb03bbf 10612
6a828b0f
JS
10613 max_phys_id = 0;
10614 min_phys_id = 0xffff;
10615 max_core_id = 0;
10616 min_core_id = 0xffff;
10617 phys_id = 0;
10618
7bb03bbf
JS
10619 /* Update CPU map with physical id and core id of each CPU */
10620 cpup = phba->sli4_hba.cpu_map;
10621 for (cpu = 0; cpu < phba->sli4_hba.num_present_cpu; cpu++) {
10622#ifdef CONFIG_X86
10623 cpuinfo = &cpu_data(cpu);
10624 cpup->phys_id = cpuinfo->phys_proc_id;
10625 cpup->core_id = cpuinfo->cpu_core_id;
6a828b0f
JS
10626 cpup->hyper = lpfc_find_hyper(phba, cpu,
10627 cpup->phys_id, cpup->core_id);
7bb03bbf
JS
10628#else
10629 /* No distinction between CPUs for other platforms */
10630 cpup->phys_id = 0;
6a828b0f
JS
10631 cpup->core_id = cpu;
10632 cpup->hyper = 0;
7bb03bbf 10633#endif
6a828b0f 10634
b3295c2a
JS
10635 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10636 "3328 CPU physid %d coreid %d\n",
10637 cpup->phys_id, cpup->core_id);
6a828b0f
JS
10638
10639 if (cpup->phys_id > max_phys_id)
10640 max_phys_id = cpup->phys_id;
10641 if (cpup->phys_id < min_phys_id)
10642 min_phys_id = cpup->phys_id;
10643
10644 if (cpup->core_id > max_core_id)
10645 max_core_id = cpup->core_id;
10646 if (cpup->core_id < min_core_id)
10647 min_core_id = cpup->core_id;
10648
7bb03bbf
JS
10649 cpup++;
10650 }
b3295c2a 10651
32517fc0
JS
10652 for_each_possible_cpu(i) {
10653 struct lpfc_eq_intr_info *eqi =
10654 per_cpu_ptr(phba->sli4_hba.eq_info, i);
10655
10656 INIT_LIST_HEAD(&eqi->list);
10657 eqi->icnt = 0;
10658 }
10659
75508a8b
JS
10660 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
10661 maskp = pci_irq_get_affinity(phba->pcidev, idx);
10662 if (!maskp)
10663 continue;
10664
10665 for_each_cpu_and(cpu, maskp, cpu_present_mask) {
10666 cpup = &phba->sli4_hba.cpu_map[cpu];
6a828b0f
JS
10667 cpup->eq = idx;
10668 cpup->hdwq = idx;
10669 cpup->irq = pci_irq_vector(phba->pcidev, idx);
10670
75508a8b 10671 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6a828b0f 10672 "3336 Set Affinity: CPU %d "
75508a8b
JS
10673 "hdwq %d irq %d\n",
10674 cpu, cpup->hdwq, cpup->irq);
6a828b0f 10675 }
b3295c2a
JS
10676 }
10677 return;
7bb03bbf
JS
10678}
10679
da0436e9
JS
10680/**
10681 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device
10682 * @phba: pointer to lpfc hba data structure.
10683 *
10684 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 10685 * with SLI-4 interface spec.
da0436e9
JS
10686 *
10687 * Return codes
af901ca1 10688 * 0 - successful
da0436e9
JS
10689 * other values - error
10690 **/
10691static int
10692lpfc_sli4_enable_msix(struct lpfc_hba *phba)
10693{
75baf696 10694 int vectors, rc, index;
b83d005e 10695 char *name;
da0436e9
JS
10696
10697 /* Set up MSI-X multi-message vectors */
6a828b0f 10698 vectors = phba->cfg_irq_chann;
45ffac19 10699
f358dd0c 10700 rc = pci_alloc_irq_vectors(phba->pcidev,
75508a8b 10701 1,
f358dd0c 10702 vectors, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
4f871e1b 10703 if (rc < 0) {
da0436e9
JS
10704 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10705 "0484 PCI enable MSI-X failed (%d)\n", rc);
029165ac 10706 goto vec_fail_out;
da0436e9 10707 }
4f871e1b 10708 vectors = rc;
75baf696 10709
7bb03bbf 10710 /* Assign MSI-X vectors to interrupt handlers */
67d12733 10711 for (index = 0; index < vectors; index++) {
b83d005e
JS
10712 name = phba->sli4_hba.hba_eq_hdl[index].handler_name;
10713 memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ);
10714 snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ,
4305f183 10715 LPFC_DRIVER_HANDLER_NAME"%d", index);
da0436e9 10716
895427bd
JS
10717 phba->sli4_hba.hba_eq_hdl[index].idx = index;
10718 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
7370d10a
JS
10719 rc = request_irq(pci_irq_vector(phba->pcidev, index),
10720 &lpfc_sli4_hba_intr_handler, 0,
10721 name,
10722 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9
JS
10723 if (rc) {
10724 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
10725 "0486 MSI-X fast-path (%d) "
10726 "request_irq failed (%d)\n", index, rc);
10727 goto cfg_fail_out;
10728 }
10729 }
10730
6a828b0f 10731 if (vectors != phba->cfg_irq_chann) {
82c3e9ba
JS
10732 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10733 "3238 Reducing IO channels to match number of "
10734 "MSI-X vectors, requested %d got %d\n",
6a828b0f
JS
10735 phba->cfg_irq_chann, vectors);
10736 if (phba->cfg_irq_chann > vectors)
10737 phba->cfg_irq_chann = vectors;
cdb42bec
JS
10738 if (phba->cfg_nvmet_mrq > vectors)
10739 phba->cfg_nvmet_mrq = vectors;
82c3e9ba 10740 }
7bb03bbf 10741
da0436e9
JS
10742 return rc;
10743
10744cfg_fail_out:
10745 /* free the irq already requested */
895427bd
JS
10746 for (--index; index >= 0; index--)
10747 free_irq(pci_irq_vector(phba->pcidev, index),
10748 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9 10749
da0436e9 10750 /* Unconfigure MSI-X capability structure */
45ffac19 10751 pci_free_irq_vectors(phba->pcidev);
029165ac
AG
10752
10753vec_fail_out:
da0436e9
JS
10754 return rc;
10755}
10756
da0436e9
JS
10757/**
10758 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device
10759 * @phba: pointer to lpfc hba data structure.
10760 *
10761 * This routine is invoked to enable the MSI interrupt mode to device with
10762 * SLI-4 interface spec. The kernel function pci_enable_msi() is called
10763 * to enable the MSI vector. The device driver is responsible for calling
10764 * the request_irq() to register MSI vector with a interrupt the handler,
10765 * which is done in this function.
10766 *
10767 * Return codes
af901ca1 10768 * 0 - successful
da0436e9
JS
10769 * other values - error
10770 **/
10771static int
10772lpfc_sli4_enable_msi(struct lpfc_hba *phba)
10773{
10774 int rc, index;
10775
10776 rc = pci_enable_msi(phba->pcidev);
10777 if (!rc)
10778 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10779 "0487 PCI enable MSI mode success.\n");
10780 else {
10781 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10782 "0488 PCI enable MSI mode failed (%d)\n", rc);
10783 return rc;
10784 }
10785
10786 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
ed243d37 10787 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS
10788 if (rc) {
10789 pci_disable_msi(phba->pcidev);
10790 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
10791 "0490 MSI request_irq failed (%d)\n", rc);
75baf696 10792 return rc;
da0436e9
JS
10793 }
10794
6a828b0f 10795 for (index = 0; index < phba->cfg_irq_chann; index++) {
895427bd
JS
10796 phba->sli4_hba.hba_eq_hdl[index].idx = index;
10797 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
da0436e9
JS
10798 }
10799
75baf696 10800 return 0;
da0436e9
JS
10801}
10802
da0436e9
JS
10803/**
10804 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device
10805 * @phba: pointer to lpfc hba data structure.
10806 *
10807 * This routine is invoked to enable device interrupt and associate driver's
10808 * interrupt handler(s) to interrupt vector(s) to device with SLI-4
10809 * interface spec. Depends on the interrupt mode configured to the driver,
10810 * the driver will try to fallback from the configured interrupt mode to an
10811 * interrupt mode which is supported by the platform, kernel, and device in
10812 * the order of:
10813 * MSI-X -> MSI -> IRQ.
10814 *
10815 * Return codes
af901ca1 10816 * 0 - successful
da0436e9
JS
10817 * other values - error
10818 **/
10819static uint32_t
10820lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
10821{
10822 uint32_t intr_mode = LPFC_INTR_ERROR;
895427bd 10823 int retval, idx;
da0436e9
JS
10824
10825 if (cfg_mode == 2) {
10826 /* Preparation before conf_msi mbox cmd */
10827 retval = 0;
10828 if (!retval) {
10829 /* Now, try to enable MSI-X interrupt mode */
10830 retval = lpfc_sli4_enable_msix(phba);
10831 if (!retval) {
10832 /* Indicate initialization to MSI-X mode */
10833 phba->intr_type = MSIX;
10834 intr_mode = 2;
10835 }
10836 }
10837 }
10838
10839 /* Fallback to MSI if MSI-X initialization failed */
10840 if (cfg_mode >= 1 && phba->intr_type == NONE) {
10841 retval = lpfc_sli4_enable_msi(phba);
10842 if (!retval) {
10843 /* Indicate initialization to MSI mode */
10844 phba->intr_type = MSI;
10845 intr_mode = 1;
10846 }
10847 }
10848
10849 /* Fallback to INTx if both MSI-X/MSI initalization failed */
10850 if (phba->intr_type == NONE) {
10851 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
10852 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
10853 if (!retval) {
895427bd
JS
10854 struct lpfc_hba_eq_hdl *eqhdl;
10855
da0436e9
JS
10856 /* Indicate initialization to INTx mode */
10857 phba->intr_type = INTx;
10858 intr_mode = 0;
895427bd 10859
6a828b0f 10860 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
895427bd
JS
10861 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
10862 eqhdl->idx = idx;
10863 eqhdl->phba = phba;
da0436e9
JS
10864 }
10865 }
10866 }
10867 return intr_mode;
10868}
10869
10870/**
10871 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device
10872 * @phba: pointer to lpfc hba data structure.
10873 *
10874 * This routine is invoked to disable device interrupt and disassociate
10875 * the driver's interrupt handler(s) from interrupt vector(s) to device
10876 * with SLI-4 interface spec. Depending on the interrupt mode, the driver
10877 * will release the interrupt vector(s) for the message signaled interrupt.
10878 **/
10879static void
10880lpfc_sli4_disable_intr(struct lpfc_hba *phba)
10881{
10882 /* Disable the currently initialized interrupt mode */
45ffac19
CH
10883 if (phba->intr_type == MSIX) {
10884 int index;
10885
10886 /* Free up MSI-X multi-message vectors */
6a828b0f 10887 for (index = 0; index < phba->cfg_irq_chann; index++) {
b3295c2a
JS
10888 irq_set_affinity_hint(
10889 pci_irq_vector(phba->pcidev, index),
10890 NULL);
895427bd
JS
10891 free_irq(pci_irq_vector(phba->pcidev, index),
10892 &phba->sli4_hba.hba_eq_hdl[index]);
b3295c2a 10893 }
45ffac19 10894 } else {
da0436e9 10895 free_irq(phba->pcidev->irq, phba);
45ffac19
CH
10896 }
10897
10898 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS
10899
10900 /* Reset interrupt management states */
10901 phba->intr_type = NONE;
10902 phba->sli.slistat.sli_intr = 0;
da0436e9
JS
10903}
10904
10905/**
10906 * lpfc_unset_hba - Unset SLI3 hba device initialization
10907 * @phba: pointer to lpfc hba data structure.
10908 *
10909 * This routine is invoked to unset the HBA device initialization steps to
10910 * a device with SLI-3 interface spec.
10911 **/
10912static void
10913lpfc_unset_hba(struct lpfc_hba *phba)
10914{
10915 struct lpfc_vport *vport = phba->pport;
10916 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
10917
10918 spin_lock_irq(shost->host_lock);
10919 vport->load_flag |= FC_UNLOADING;
10920 spin_unlock_irq(shost->host_lock);
10921
72859909
JS
10922 kfree(phba->vpi_bmask);
10923 kfree(phba->vpi_ids);
10924
da0436e9
JS
10925 lpfc_stop_hba_timers(phba);
10926
10927 phba->pport->work_port_events = 0;
10928
10929 lpfc_sli_hba_down(phba);
10930
10931 lpfc_sli_brdrestart(phba);
10932
10933 lpfc_sli_disable_intr(phba);
10934
10935 return;
10936}
10937
5af5eee7
JS
10938/**
10939 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy
10940 * @phba: Pointer to HBA context object.
10941 *
10942 * This function is called in the SLI4 code path to wait for completion
10943 * of device's XRIs exchange busy. It will check the XRI exchange busy
10944 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after
10945 * that, it will check the XRI exchange busy on outstanding FCP and ELS
10946 * I/Os every 30 seconds, log error message, and wait forever. Only when
10947 * all XRI exchange busy complete, the driver unload shall proceed with
10948 * invoking the function reset ioctl mailbox command to the CNA and the
10949 * the rest of the driver unload resource release.
10950 **/
10951static void
10952lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba)
10953{
5e5b511d
JS
10954 struct lpfc_sli4_hdw_queue *qp;
10955 int idx, ccnt, fcnt;
5af5eee7 10956 int wait_time = 0;
5e5b511d 10957 int io_xri_cmpl = 1;
86c67379 10958 int nvmet_xri_cmpl = 1;
895427bd 10959 int fcp_xri_cmpl = 1;
5af5eee7
JS
10960 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
10961
c3725bdc
JS
10962 /* Driver just aborted IOs during the hba_unset process. Pause
10963 * here to give the HBA time to complete the IO and get entries
10964 * into the abts lists.
10965 */
10966 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1 * 5);
10967
10968 /* Wait for NVME pending IO to flush back to transport. */
10969 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
10970 lpfc_nvme_wait_for_io_drain(phba);
10971
5e5b511d
JS
10972 ccnt = 0;
10973 fcnt = 0;
10974 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10975 qp = &phba->sli4_hba.hdwq[idx];
10976 fcp_xri_cmpl = list_empty(
10977 &qp->lpfc_abts_scsi_buf_list);
10978 if (!fcp_xri_cmpl) /* if list is NOT empty */
10979 fcnt++;
10980 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
10981 io_xri_cmpl = list_empty(
10982 &qp->lpfc_abts_nvme_buf_list);
10983 if (!io_xri_cmpl) /* if list is NOT empty */
10984 ccnt++;
10985 }
10986 }
10987 if (ccnt)
10988 io_xri_cmpl = 0;
10989 if (fcnt)
10990 fcp_xri_cmpl = 0;
10991
86c67379 10992 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
86c67379
JS
10993 nvmet_xri_cmpl =
10994 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
10995 }
895427bd 10996
5e5b511d 10997 while (!fcp_xri_cmpl || !els_xri_cmpl || !io_xri_cmpl ||
f358dd0c 10998 !nvmet_xri_cmpl) {
5af5eee7 10999 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) {
68c9b55d
JS
11000 if (!nvmet_xri_cmpl)
11001 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11002 "6424 NVMET XRI exchange busy "
11003 "wait time: %d seconds.\n",
11004 wait_time/1000);
5e5b511d 11005 if (!io_xri_cmpl)
895427bd
JS
11006 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11007 "6100 NVME XRI exchange busy "
11008 "wait time: %d seconds.\n",
11009 wait_time/1000);
5af5eee7
JS
11010 if (!fcp_xri_cmpl)
11011 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11012 "2877 FCP XRI exchange busy "
11013 "wait time: %d seconds.\n",
11014 wait_time/1000);
11015 if (!els_xri_cmpl)
11016 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11017 "2878 ELS XRI exchange busy "
11018 "wait time: %d seconds.\n",
11019 wait_time/1000);
11020 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2);
11021 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2;
11022 } else {
11023 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1);
11024 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1;
11025 }
5e5b511d
JS
11026
11027 ccnt = 0;
11028 fcnt = 0;
11029 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
11030 qp = &phba->sli4_hba.hdwq[idx];
11031 fcp_xri_cmpl = list_empty(
11032 &qp->lpfc_abts_scsi_buf_list);
11033 if (!fcp_xri_cmpl) /* if list is NOT empty */
11034 fcnt++;
11035 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
11036 io_xri_cmpl = list_empty(
11037 &qp->lpfc_abts_nvme_buf_list);
11038 if (!io_xri_cmpl) /* if list is NOT empty */
11039 ccnt++;
11040 }
11041 }
11042 if (ccnt)
11043 io_xri_cmpl = 0;
11044 if (fcnt)
11045 fcp_xri_cmpl = 0;
11046
86c67379 11047 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
86c67379
JS
11048 nvmet_xri_cmpl = list_empty(
11049 &phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
11050 }
5af5eee7
JS
11051 els_xri_cmpl =
11052 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c 11053
5af5eee7
JS
11054 }
11055}
11056
da0436e9
JS
11057/**
11058 * lpfc_sli4_hba_unset - Unset the fcoe hba
11059 * @phba: Pointer to HBA context object.
11060 *
11061 * This function is called in the SLI4 code path to reset the HBA's FCoE
11062 * function. The caller is not required to hold any lock. This routine
11063 * issues PCI function reset mailbox command to reset the FCoE function.
11064 * At the end of the function, it calls lpfc_hba_down_post function to
11065 * free any pending commands.
11066 **/
11067static void
11068lpfc_sli4_hba_unset(struct lpfc_hba *phba)
11069{
11070 int wait_cnt = 0;
11071 LPFC_MBOXQ_t *mboxq;
912e3acd 11072 struct pci_dev *pdev = phba->pcidev;
da0436e9
JS
11073
11074 lpfc_stop_hba_timers(phba);
cdb42bec
JS
11075 if (phba->pport)
11076 phba->sli4_hba.intr_enable = 0;
da0436e9
JS
11077
11078 /*
11079 * Gracefully wait out the potential current outstanding asynchronous
11080 * mailbox command.
11081 */
11082
11083 /* First, block any pending async mailbox command from posted */
11084 spin_lock_irq(&phba->hbalock);
11085 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
11086 spin_unlock_irq(&phba->hbalock);
11087 /* Now, trying to wait it out if we can */
11088 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
11089 msleep(10);
11090 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT)
11091 break;
11092 }
11093 /* Forcefully release the outstanding mailbox command if timed out */
11094 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
11095 spin_lock_irq(&phba->hbalock);
11096 mboxq = phba->sli.mbox_active;
11097 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
11098 __lpfc_mbox_cmpl_put(phba, mboxq);
11099 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
11100 phba->sli.mbox_active = NULL;
11101 spin_unlock_irq(&phba->hbalock);
11102 }
11103
5af5eee7
JS
11104 /* Abort all iocbs associated with the hba */
11105 lpfc_sli_hba_iocb_abort(phba);
11106
11107 /* Wait for completion of device XRI exchange busy */
11108 lpfc_sli4_xri_exchange_busy_wait(phba);
11109
da0436e9
JS
11110 /* Disable PCI subsystem interrupt */
11111 lpfc_sli4_disable_intr(phba);
11112
912e3acd
JS
11113 /* Disable SR-IOV if enabled */
11114 if (phba->cfg_sriov_nr_virtfn)
11115 pci_disable_sriov(pdev);
11116
da0436e9
JS
11117 /* Stop kthread signal shall trigger work_done one more time */
11118 kthread_stop(phba->worker_thread);
11119
d2cc9bcd 11120 /* Disable FW logging to host memory */
1165a5c2 11121 lpfc_ras_stop_fwlog(phba);
d2cc9bcd 11122
d1f525aa
JS
11123 /* Unset the queues shared with the hardware then release all
11124 * allocated resources.
11125 */
11126 lpfc_sli4_queue_unset(phba);
11127 lpfc_sli4_queue_destroy(phba);
11128
3677a3a7
JS
11129 /* Reset SLI4 HBA FCoE function */
11130 lpfc_pci_function_reset(phba);
11131
1165a5c2
JS
11132 /* Free RAS DMA memory */
11133 if (phba->ras_fwlog.ras_enabled)
11134 lpfc_sli4_ras_dma_free(phba);
11135
da0436e9
JS
11136 /* Stop the SLI4 device port */
11137 phba->pport->work_port_events = 0;
11138}
11139
28baac74
JS
11140 /**
11141 * lpfc_pc_sli4_params_get - Get the SLI4_PARAMS port capabilities.
11142 * @phba: Pointer to HBA context object.
11143 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
11144 *
11145 * This function is called in the SLI4 code path to read the port's
11146 * sli4 capabilities.
11147 *
11148 * This function may be be called from any context that can block-wait
11149 * for the completion. The expectation is that this routine is called
11150 * typically from probe_one or from the online routine.
11151 **/
11152int
11153lpfc_pc_sli4_params_get(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
11154{
11155 int rc;
11156 struct lpfc_mqe *mqe;
11157 struct lpfc_pc_sli4_params *sli4_params;
11158 uint32_t mbox_tmo;
11159
11160 rc = 0;
11161 mqe = &mboxq->u.mqe;
11162
11163 /* Read the port's SLI4 Parameters port capabilities */
fedd3b7b 11164 lpfc_pc_sli4_params(mboxq);
28baac74
JS
11165 if (!phba->sli4_hba.intr_enable)
11166 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
11167 else {
a183a15f 11168 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
28baac74
JS
11169 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
11170 }
11171
11172 if (unlikely(rc))
11173 return 1;
11174
11175 sli4_params = &phba->sli4_hba.pc_sli4_params;
11176 sli4_params->if_type = bf_get(if_type, &mqe->un.sli4_params);
11177 sli4_params->sli_rev = bf_get(sli_rev, &mqe->un.sli4_params);
11178 sli4_params->sli_family = bf_get(sli_family, &mqe->un.sli4_params);
11179 sli4_params->featurelevel_1 = bf_get(featurelevel_1,
11180 &mqe->un.sli4_params);
11181 sli4_params->featurelevel_2 = bf_get(featurelevel_2,
11182 &mqe->un.sli4_params);
11183 sli4_params->proto_types = mqe->un.sli4_params.word3;
11184 sli4_params->sge_supp_len = mqe->un.sli4_params.sge_supp_len;
11185 sli4_params->if_page_sz = bf_get(if_page_sz, &mqe->un.sli4_params);
11186 sli4_params->rq_db_window = bf_get(rq_db_window, &mqe->un.sli4_params);
11187 sli4_params->loopbk_scope = bf_get(loopbk_scope, &mqe->un.sli4_params);
11188 sli4_params->eq_pages_max = bf_get(eq_pages, &mqe->un.sli4_params);
11189 sli4_params->eqe_size = bf_get(eqe_size, &mqe->un.sli4_params);
11190 sli4_params->cq_pages_max = bf_get(cq_pages, &mqe->un.sli4_params);
11191 sli4_params->cqe_size = bf_get(cqe_size, &mqe->un.sli4_params);
11192 sli4_params->mq_pages_max = bf_get(mq_pages, &mqe->un.sli4_params);
11193 sli4_params->mqe_size = bf_get(mqe_size, &mqe->un.sli4_params);
11194 sli4_params->mq_elem_cnt = bf_get(mq_elem_cnt, &mqe->un.sli4_params);
11195 sli4_params->wq_pages_max = bf_get(wq_pages, &mqe->un.sli4_params);
11196 sli4_params->wqe_size = bf_get(wqe_size, &mqe->un.sli4_params);
11197 sli4_params->rq_pages_max = bf_get(rq_pages, &mqe->un.sli4_params);
11198 sli4_params->rqe_size = bf_get(rqe_size, &mqe->un.sli4_params);
11199 sli4_params->hdr_pages_max = bf_get(hdr_pages, &mqe->un.sli4_params);
11200 sli4_params->hdr_size = bf_get(hdr_size, &mqe->un.sli4_params);
11201 sli4_params->hdr_pp_align = bf_get(hdr_pp_align, &mqe->un.sli4_params);
11202 sli4_params->sgl_pages_max = bf_get(sgl_pages, &mqe->un.sli4_params);
11203 sli4_params->sgl_pp_align = bf_get(sgl_pp_align, &mqe->un.sli4_params);
0558056c
JS
11204
11205 /* Make sure that sge_supp_len can be handled by the driver */
11206 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
11207 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
11208
28baac74
JS
11209 return rc;
11210}
11211
fedd3b7b
JS
11212/**
11213 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS.
11214 * @phba: Pointer to HBA context object.
11215 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
11216 *
11217 * This function is called in the SLI4 code path to read the port's
11218 * sli4 capabilities.
11219 *
11220 * This function may be be called from any context that can block-wait
11221 * for the completion. The expectation is that this routine is called
11222 * typically from probe_one or from the online routine.
11223 **/
11224int
11225lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
11226{
11227 int rc;
11228 struct lpfc_mqe *mqe = &mboxq->u.mqe;
11229 struct lpfc_pc_sli4_params *sli4_params;
a183a15f 11230 uint32_t mbox_tmo;
fedd3b7b 11231 int length;
bf316c78 11232 bool exp_wqcq_pages = true;
fedd3b7b
JS
11233 struct lpfc_sli4_parameters *mbx_sli4_parameters;
11234
6d368e53
JS
11235 /*
11236 * By default, the driver assumes the SLI4 port requires RPI
11237 * header postings. The SLI4_PARAM response will correct this
11238 * assumption.
11239 */
11240 phba->sli4_hba.rpi_hdrs_in_use = 1;
11241
fedd3b7b
JS
11242 /* Read the port's SLI4 Config Parameters */
11243 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
11244 sizeof(struct lpfc_sli4_cfg_mhdr));
11245 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
11246 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
11247 length, LPFC_SLI4_MBX_EMBED);
11248 if (!phba->sli4_hba.intr_enable)
11249 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
a183a15f
JS
11250 else {
11251 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
11252 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
11253 }
fedd3b7b
JS
11254 if (unlikely(rc))
11255 return rc;
11256 sli4_params = &phba->sli4_hba.pc_sli4_params;
11257 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
11258 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters);
11259 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters);
11260 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters);
11261 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1,
11262 mbx_sli4_parameters);
11263 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2,
11264 mbx_sli4_parameters);
11265 if (bf_get(cfg_phwq, mbx_sli4_parameters))
11266 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED;
11267 else
11268 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED;
11269 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len;
11270 sli4_params->loopbk_scope = bf_get(loopbk_scope, mbx_sli4_parameters);
1ba981fd 11271 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters);
fedd3b7b
JS
11272 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters);
11273 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters);
11274 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters);
11275 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters);
7365f6fd
JS
11276 sli4_params->eqav = bf_get(cfg_eqav, mbx_sli4_parameters);
11277 sli4_params->cqav = bf_get(cfg_cqav, mbx_sli4_parameters);
0c651878 11278 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters);
66e9e6bf 11279 sli4_params->bv1s = bf_get(cfg_bv1s, mbx_sli4_parameters);
fedd3b7b
JS
11280 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt,
11281 mbx_sli4_parameters);
895427bd 11282 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters);
fedd3b7b
JS
11283 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align,
11284 mbx_sli4_parameters);
6d368e53
JS
11285 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
11286 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
895427bd
JS
11287 phba->nvme_support = (bf_get(cfg_nvme, mbx_sli4_parameters) &&
11288 bf_get(cfg_xib, mbx_sli4_parameters));
11289
11290 if ((phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) ||
11291 !phba->nvme_support) {
11292 phba->nvme_support = 0;
11293 phba->nvmet_support = 0;
bcb24f65 11294 phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_OFF;
895427bd
JS
11295 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
11296 "6101 Disabling NVME support: "
11297 "Not supported by firmware: %d %d\n",
11298 bf_get(cfg_nvme, mbx_sli4_parameters),
11299 bf_get(cfg_xib, mbx_sli4_parameters));
11300
11301 /* If firmware doesn't support NVME, just use SCSI support */
11302 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
11303 return -ENODEV;
11304 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
11305 }
0558056c 11306
414abe0a
JS
11307 /* Only embed PBDE for if_type 6, PBDE support requires xib be set */
11308 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
11309 LPFC_SLI_INTF_IF_TYPE_6) || (!bf_get(cfg_xib, mbx_sli4_parameters)))
11310 phba->cfg_enable_pbde = 0;
0bc2b7c5 11311
20aefac3
JS
11312 /*
11313 * To support Suppress Response feature we must satisfy 3 conditions.
11314 * lpfc_suppress_rsp module parameter must be set (default).
11315 * In SLI4-Parameters Descriptor:
11316 * Extended Inline Buffers (XIB) must be supported.
11317 * Suppress Response IU Not Supported (SRIUNS) must NOT be supported
11318 * (double negative).
11319 */
11320 if (phba->cfg_suppress_rsp && bf_get(cfg_xib, mbx_sli4_parameters) &&
11321 !(bf_get(cfg_nosr, mbx_sli4_parameters)))
f358dd0c 11322 phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP;
20aefac3
JS
11323 else
11324 phba->cfg_suppress_rsp = 0;
f358dd0c 11325
0cf07f84
JS
11326 if (bf_get(cfg_eqdr, mbx_sli4_parameters))
11327 phba->sli.sli_flag |= LPFC_SLI_USE_EQDR;
11328
0558056c
JS
11329 /* Make sure that sge_supp_len can be handled by the driver */
11330 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
11331 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
11332
b5c53958 11333 /*
c176ffa0
JS
11334 * Check whether the adapter supports an embedded copy of the
11335 * FCP CMD IU within the WQE for FCP_Ixxx commands. In order
11336 * to use this option, 128-byte WQEs must be used.
b5c53958
JS
11337 */
11338 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters))
11339 phba->fcp_embed_io = 1;
11340 else
11341 phba->fcp_embed_io = 0;
7bdedb34 11342
0bc2b7c5 11343 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME,
414abe0a 11344 "6422 XIB %d PBDE %d: FCP %d NVME %d %d %d\n",
0bc2b7c5 11345 bf_get(cfg_xib, mbx_sli4_parameters),
414abe0a
JS
11346 phba->cfg_enable_pbde,
11347 phba->fcp_embed_io, phba->nvme_support,
4e565cf0 11348 phba->cfg_nvme_embed_cmd, phba->cfg_suppress_rsp);
0bc2b7c5 11349
bf316c78
JS
11350 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
11351 LPFC_SLI_INTF_IF_TYPE_2) &&
11352 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==
c221768b 11353 LPFC_SLI_INTF_FAMILY_LNCR_A0))
bf316c78
JS
11354 exp_wqcq_pages = false;
11355
c176ffa0
JS
11356 if ((bf_get(cfg_cqpsize, mbx_sli4_parameters) & LPFC_CQ_16K_PAGE_SZ) &&
11357 (bf_get(cfg_wqpsize, mbx_sli4_parameters) & LPFC_WQ_16K_PAGE_SZ) &&
bf316c78 11358 exp_wqcq_pages &&
c176ffa0
JS
11359 (sli4_params->wqsize & LPFC_WQ_SZ128_SUPPORT))
11360 phba->enab_exp_wqcq_pages = 1;
11361 else
11362 phba->enab_exp_wqcq_pages = 0;
7bdedb34
JS
11363 /*
11364 * Check if the SLI port supports MDS Diagnostics
11365 */
11366 if (bf_get(cfg_mds_diags, mbx_sli4_parameters))
11367 phba->mds_diags_support = 1;
11368 else
11369 phba->mds_diags_support = 0;
d2cc9bcd 11370
fedd3b7b
JS
11371 return 0;
11372}
11373
da0436e9
JS
11374/**
11375 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
11376 * @pdev: pointer to PCI device
11377 * @pid: pointer to PCI device identifier
11378 *
11379 * This routine is to be called to attach a device with SLI-3 interface spec
11380 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
11381 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
11382 * information of the device and driver to see if the driver state that it can
11383 * support this kind of device. If the match is successful, the driver core
11384 * invokes this routine. If this routine determines it can claim the HBA, it
11385 * does all the initialization that it needs to do to handle the HBA properly.
11386 *
11387 * Return code
11388 * 0 - driver can claim the device
11389 * negative value - driver can not claim the device
11390 **/
6f039790 11391static int
da0436e9
JS
11392lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid)
11393{
11394 struct lpfc_hba *phba;
11395 struct lpfc_vport *vport = NULL;
6669f9bb 11396 struct Scsi_Host *shost = NULL;
da0436e9
JS
11397 int error;
11398 uint32_t cfg_mode, intr_mode;
11399
11400 /* Allocate memory for HBA structure */
11401 phba = lpfc_hba_alloc(pdev);
11402 if (!phba)
11403 return -ENOMEM;
11404
11405 /* Perform generic PCI device enabling operation */
11406 error = lpfc_enable_pci_dev(phba);
079b5c91 11407 if (error)
da0436e9 11408 goto out_free_phba;
da0436e9
JS
11409
11410 /* Set up SLI API function jump table for PCI-device group-0 HBAs */
11411 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP);
11412 if (error)
11413 goto out_disable_pci_dev;
11414
11415 /* Set up SLI-3 specific device PCI memory space */
11416 error = lpfc_sli_pci_mem_setup(phba);
11417 if (error) {
11418 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11419 "1402 Failed to set up pci memory space.\n");
11420 goto out_disable_pci_dev;
11421 }
11422
da0436e9
JS
11423 /* Set up SLI-3 specific device driver resources */
11424 error = lpfc_sli_driver_resource_setup(phba);
11425 if (error) {
11426 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11427 "1404 Failed to set up driver resource.\n");
11428 goto out_unset_pci_mem_s3;
11429 }
11430
11431 /* Initialize and populate the iocb list per host */
d1f525aa 11432
da0436e9
JS
11433 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT);
11434 if (error) {
11435 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11436 "1405 Failed to initialize iocb list.\n");
11437 goto out_unset_driver_resource_s3;
11438 }
11439
11440 /* Set up common device driver resources */
11441 error = lpfc_setup_driver_resource_phase2(phba);
11442 if (error) {
11443 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11444 "1406 Failed to set up driver resource.\n");
11445 goto out_free_iocb_list;
11446 }
11447
079b5c91
JS
11448 /* Get the default values for Model Name and Description */
11449 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
11450
da0436e9
JS
11451 /* Create SCSI host to the physical port */
11452 error = lpfc_create_shost(phba);
11453 if (error) {
11454 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11455 "1407 Failed to create scsi host.\n");
11456 goto out_unset_driver_resource;
11457 }
11458
11459 /* Configure sysfs attributes */
11460 vport = phba->pport;
11461 error = lpfc_alloc_sysfs_attr(vport);
11462 if (error) {
11463 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11464 "1476 Failed to allocate sysfs attr\n");
11465 goto out_destroy_shost;
11466 }
11467
6669f9bb 11468 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
da0436e9
JS
11469 /* Now, trying to enable interrupt and bring up the device */
11470 cfg_mode = phba->cfg_use_msi;
11471 while (true) {
11472 /* Put device to a known state before enabling interrupt */
11473 lpfc_stop_port(phba);
11474 /* Configure and enable interrupt */
11475 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode);
11476 if (intr_mode == LPFC_INTR_ERROR) {
11477 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11478 "0431 Failed to enable interrupt.\n");
11479 error = -ENODEV;
11480 goto out_free_sysfs_attr;
11481 }
11482 /* SLI-3 HBA setup */
11483 if (lpfc_sli_hba_setup(phba)) {
11484 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11485 "1477 Failed to set up hba\n");
11486 error = -ENODEV;
11487 goto out_remove_device;
11488 }
11489
11490 /* Wait 50ms for the interrupts of previous mailbox commands */
11491 msleep(50);
11492 /* Check active interrupts on message signaled interrupts */
11493 if (intr_mode == 0 ||
11494 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) {
11495 /* Log the current active interrupt mode */
11496 phba->intr_mode = intr_mode;
11497 lpfc_log_intr_mode(phba, intr_mode);
11498 break;
11499 } else {
11500 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11501 "0447 Configure interrupt mode (%d) "
11502 "failed active interrupt test.\n",
11503 intr_mode);
11504 /* Disable the current interrupt mode */
11505 lpfc_sli_disable_intr(phba);
11506 /* Try next level of interrupt mode */
11507 cfg_mode = --intr_mode;
11508 }
11509 }
11510
11511 /* Perform post initialization setup */
11512 lpfc_post_init_setup(phba);
11513
11514 /* Check if there are static vports to be created. */
11515 lpfc_create_static_vport(phba);
11516
11517 return 0;
11518
11519out_remove_device:
11520 lpfc_unset_hba(phba);
11521out_free_sysfs_attr:
11522 lpfc_free_sysfs_attr(vport);
11523out_destroy_shost:
11524 lpfc_destroy_shost(phba);
11525out_unset_driver_resource:
11526 lpfc_unset_driver_resource_phase2(phba);
11527out_free_iocb_list:
11528 lpfc_free_iocb_list(phba);
11529out_unset_driver_resource_s3:
11530 lpfc_sli_driver_resource_unset(phba);
11531out_unset_pci_mem_s3:
11532 lpfc_sli_pci_mem_unset(phba);
11533out_disable_pci_dev:
11534 lpfc_disable_pci_dev(phba);
6669f9bb
JS
11535 if (shost)
11536 scsi_host_put(shost);
da0436e9
JS
11537out_free_phba:
11538 lpfc_hba_free(phba);
11539 return error;
11540}
11541
11542/**
11543 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem.
11544 * @pdev: pointer to PCI device
11545 *
11546 * This routine is to be called to disattach a device with SLI-3 interface
11547 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
11548 * removed from PCI bus, it performs all the necessary cleanup for the HBA
11549 * device to be removed from the PCI subsystem properly.
11550 **/
6f039790 11551static void
da0436e9
JS
11552lpfc_pci_remove_one_s3(struct pci_dev *pdev)
11553{
11554 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11555 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
11556 struct lpfc_vport **vports;
11557 struct lpfc_hba *phba = vport->phba;
11558 int i;
da0436e9
JS
11559
11560 spin_lock_irq(&phba->hbalock);
11561 vport->load_flag |= FC_UNLOADING;
11562 spin_unlock_irq(&phba->hbalock);
11563
11564 lpfc_free_sysfs_attr(vport);
11565
11566 /* Release all the vports against this physical port */
11567 vports = lpfc_create_vport_work_array(phba);
11568 if (vports != NULL)
587a37f6
JS
11569 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
11570 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
11571 continue;
da0436e9 11572 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 11573 }
da0436e9
JS
11574 lpfc_destroy_vport_work_array(phba, vports);
11575
11576 /* Remove FC host and then SCSI host with the physical port */
11577 fc_remove_host(shost);
11578 scsi_remove_host(shost);
d613b6a7 11579
da0436e9
JS
11580 lpfc_cleanup(vport);
11581
11582 /*
11583 * Bring down the SLI Layer. This step disable all interrupts,
11584 * clears the rings, discards all mailbox commands, and resets
11585 * the HBA.
11586 */
11587
48e34d0f 11588 /* HBA interrupt will be disabled after this call */
da0436e9
JS
11589 lpfc_sli_hba_down(phba);
11590 /* Stop kthread signal shall trigger work_done one more time */
11591 kthread_stop(phba->worker_thread);
11592 /* Final cleanup of txcmplq and reset the HBA */
11593 lpfc_sli_brdrestart(phba);
11594
72859909
JS
11595 kfree(phba->vpi_bmask);
11596 kfree(phba->vpi_ids);
11597
da0436e9 11598 lpfc_stop_hba_timers(phba);
523128e5 11599 spin_lock_irq(&phba->port_list_lock);
da0436e9 11600 list_del_init(&vport->listentry);
523128e5 11601 spin_unlock_irq(&phba->port_list_lock);
da0436e9
JS
11602
11603 lpfc_debugfs_terminate(vport);
11604
912e3acd
JS
11605 /* Disable SR-IOV if enabled */
11606 if (phba->cfg_sriov_nr_virtfn)
11607 pci_disable_sriov(pdev);
11608
da0436e9
JS
11609 /* Disable interrupt */
11610 lpfc_sli_disable_intr(phba);
11611
da0436e9
JS
11612 scsi_host_put(shost);
11613
11614 /*
11615 * Call scsi_free before mem_free since scsi bufs are released to their
11616 * corresponding pools here.
11617 */
11618 lpfc_scsi_free(phba);
0794d601
JS
11619 lpfc_free_iocb_list(phba);
11620
da0436e9
JS
11621 lpfc_mem_free_all(phba);
11622
11623 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
11624 phba->hbqslimp.virt, phba->hbqslimp.phys);
11625
11626 /* Free resources associated with SLI2 interface */
11627 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
11628 phba->slim2p.virt, phba->slim2p.phys);
11629
11630 /* unmap adapter SLIM and Control Registers */
11631 iounmap(phba->ctrl_regs_memmap_p);
11632 iounmap(phba->slim_memmap_p);
11633
11634 lpfc_hba_free(phba);
11635
e0c0483c 11636 pci_release_mem_regions(pdev);
da0436e9
JS
11637 pci_disable_device(pdev);
11638}
11639
11640/**
11641 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt
11642 * @pdev: pointer to PCI device
11643 * @msg: power management message
11644 *
11645 * This routine is to be called from the kernel's PCI subsystem to support
11646 * system Power Management (PM) to device with SLI-3 interface spec. When
11647 * PM invokes this method, it quiesces the device by stopping the driver's
11648 * worker thread for the device, turning off device's interrupt and DMA,
11649 * and bring the device offline. Note that as the driver implements the
11650 * minimum PM requirements to a power-aware driver's PM support for the
11651 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
11652 * to the suspend() method call will be treated as SUSPEND and the driver will
11653 * fully reinitialize its device during resume() method call, the driver will
11654 * set device to PCI_D3hot state in PCI config space instead of setting it
11655 * according to the @msg provided by the PM.
11656 *
11657 * Return code
11658 * 0 - driver suspended the device
11659 * Error otherwise
11660 **/
11661static int
11662lpfc_pci_suspend_one_s3(struct pci_dev *pdev, pm_message_t msg)
11663{
11664 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11665 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11666
11667 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11668 "0473 PCI device Power Management suspend.\n");
11669
11670 /* Bring down the device */
618a5230 11671 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS
11672 lpfc_offline(phba);
11673 kthread_stop(phba->worker_thread);
11674
11675 /* Disable interrupt from device */
11676 lpfc_sli_disable_intr(phba);
11677
11678 /* Save device state to PCI config space */
11679 pci_save_state(pdev);
11680 pci_set_power_state(pdev, PCI_D3hot);
11681
11682 return 0;
11683}
11684
11685/**
11686 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt
11687 * @pdev: pointer to PCI device
11688 *
11689 * This routine is to be called from the kernel's PCI subsystem to support
11690 * system Power Management (PM) to device with SLI-3 interface spec. When PM
11691 * invokes this method, it restores the device's PCI config space state and
11692 * fully reinitializes the device and brings it online. Note that as the
11693 * driver implements the minimum PM requirements to a power-aware driver's
11694 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE,
11695 * FREEZE) to the suspend() method call will be treated as SUSPEND and the
11696 * driver will fully reinitialize its device during resume() method call,
11697 * the device will be set to PCI_D0 directly in PCI config space before
11698 * restoring the state.
11699 *
11700 * Return code
11701 * 0 - driver suspended the device
11702 * Error otherwise
11703 **/
11704static int
11705lpfc_pci_resume_one_s3(struct pci_dev *pdev)
11706{
11707 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11708 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11709 uint32_t intr_mode;
11710 int error;
11711
11712 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11713 "0452 PCI device Power Management resume.\n");
11714
11715 /* Restore device state from PCI config space */
11716 pci_set_power_state(pdev, PCI_D0);
11717 pci_restore_state(pdev);
0d878419 11718
1dfb5a47
JS
11719 /*
11720 * As the new kernel behavior of pci_restore_state() API call clears
11721 * device saved_state flag, need to save the restored state again.
11722 */
11723 pci_save_state(pdev);
11724
da0436e9
JS
11725 if (pdev->is_busmaster)
11726 pci_set_master(pdev);
11727
11728 /* Startup the kernel thread for this host adapter. */
11729 phba->worker_thread = kthread_run(lpfc_do_work, phba,
11730 "lpfc_worker_%d", phba->brd_no);
11731 if (IS_ERR(phba->worker_thread)) {
11732 error = PTR_ERR(phba->worker_thread);
11733 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11734 "0434 PM resume failed to start worker "
11735 "thread: error=x%x.\n", error);
11736 return error;
11737 }
11738
11739 /* Configure and enable interrupt */
11740 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
11741 if (intr_mode == LPFC_INTR_ERROR) {
11742 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11743 "0430 PM resume Failed to enable interrupt\n");
11744 return -EIO;
11745 } else
11746 phba->intr_mode = intr_mode;
11747
11748 /* Restart HBA and bring it online */
11749 lpfc_sli_brdrestart(phba);
11750 lpfc_online(phba);
11751
11752 /* Log the current active interrupt mode */
11753 lpfc_log_intr_mode(phba, phba->intr_mode);
11754
11755 return 0;
11756}
11757
891478a2
JS
11758/**
11759 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover
11760 * @phba: pointer to lpfc hba data structure.
11761 *
11762 * This routine is called to prepare the SLI3 device for PCI slot recover. It
e2af0d2e 11763 * aborts all the outstanding SCSI I/Os to the pci device.
891478a2
JS
11764 **/
11765static void
11766lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
11767{
11768 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11769 "2723 PCI channel I/O abort preparing for recovery\n");
e2af0d2e
JS
11770
11771 /*
11772 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
11773 * and let the SCSI mid-layer to retry them to recover.
11774 */
db55fba8 11775 lpfc_sli_abort_fcp_rings(phba);
891478a2
JS
11776}
11777
0d878419
JS
11778/**
11779 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset
11780 * @phba: pointer to lpfc hba data structure.
11781 *
11782 * This routine is called to prepare the SLI3 device for PCI slot reset. It
11783 * disables the device interrupt and pci device, and aborts the internal FCP
11784 * pending I/Os.
11785 **/
11786static void
11787lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba)
11788{
0d878419 11789 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 11790 "2710 PCI channel disable preparing for reset\n");
e2af0d2e 11791
75baf696 11792 /* Block any management I/Os to the device */
618a5230 11793 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
75baf696 11794
e2af0d2e
JS
11795 /* Block all SCSI devices' I/Os on the host */
11796 lpfc_scsi_dev_block(phba);
11797
ea714f3d
JS
11798 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
11799 lpfc_sli_flush_fcp_rings(phba);
11800
e2af0d2e
JS
11801 /* stop all timers */
11802 lpfc_stop_hba_timers(phba);
11803
0d878419
JS
11804 /* Disable interrupt and pci device */
11805 lpfc_sli_disable_intr(phba);
11806 pci_disable_device(phba->pcidev);
0d878419
JS
11807}
11808
11809/**
11810 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable
11811 * @phba: pointer to lpfc hba data structure.
11812 *
11813 * This routine is called to prepare the SLI3 device for PCI slot permanently
11814 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
11815 * pending I/Os.
11816 **/
11817static void
75baf696 11818lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba)
0d878419
JS
11819{
11820 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 11821 "2711 PCI channel permanent disable for failure\n");
e2af0d2e
JS
11822 /* Block all SCSI devices' I/Os on the host */
11823 lpfc_scsi_dev_block(phba);
11824
11825 /* stop all timers */
11826 lpfc_stop_hba_timers(phba);
11827
0d878419
JS
11828 /* Clean up all driver's outstanding SCSI I/Os */
11829 lpfc_sli_flush_fcp_rings(phba);
11830}
11831
da0436e9
JS
11832/**
11833 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error
11834 * @pdev: pointer to PCI device.
11835 * @state: the current PCI connection state.
11836 *
11837 * This routine is called from the PCI subsystem for I/O error handling to
11838 * device with SLI-3 interface spec. This function is called by the PCI
11839 * subsystem after a PCI bus error affecting this device has been detected.
11840 * When this function is invoked, it will need to stop all the I/Os and
11841 * interrupt(s) to the device. Once that is done, it will return
11842 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery
11843 * as desired.
11844 *
11845 * Return codes
0d878419 11846 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link
da0436e9
JS
11847 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
11848 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
11849 **/
11850static pci_ers_result_t
11851lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
11852{
11853 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11854 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
da0436e9 11855
0d878419
JS
11856 switch (state) {
11857 case pci_channel_io_normal:
891478a2
JS
11858 /* Non-fatal error, prepare for recovery */
11859 lpfc_sli_prep_dev_for_recover(phba);
0d878419
JS
11860 return PCI_ERS_RESULT_CAN_RECOVER;
11861 case pci_channel_io_frozen:
11862 /* Fatal error, prepare for slot reset */
11863 lpfc_sli_prep_dev_for_reset(phba);
11864 return PCI_ERS_RESULT_NEED_RESET;
11865 case pci_channel_io_perm_failure:
11866 /* Permanent failure, prepare for device down */
75baf696 11867 lpfc_sli_prep_dev_for_perm_failure(phba);
da0436e9 11868 return PCI_ERS_RESULT_DISCONNECT;
0d878419
JS
11869 default:
11870 /* Unknown state, prepare and request slot reset */
11871 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11872 "0472 Unknown PCI error state: x%x\n", state);
11873 lpfc_sli_prep_dev_for_reset(phba);
11874 return PCI_ERS_RESULT_NEED_RESET;
da0436e9 11875 }
da0436e9
JS
11876}
11877
11878/**
11879 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch.
11880 * @pdev: pointer to PCI device.
11881 *
11882 * This routine is called from the PCI subsystem for error handling to
11883 * device with SLI-3 interface spec. This is called after PCI bus has been
11884 * reset to restart the PCI card from scratch, as if from a cold-boot.
11885 * During the PCI subsystem error recovery, after driver returns
11886 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
11887 * recovery and then call this routine before calling the .resume method
11888 * to recover the device. This function will initialize the HBA device,
11889 * enable the interrupt, but it will just put the HBA to offline state
11890 * without passing any I/O traffic.
11891 *
11892 * Return codes
11893 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11894 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
11895 */
11896static pci_ers_result_t
11897lpfc_io_slot_reset_s3(struct pci_dev *pdev)
11898{
11899 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11900 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11901 struct lpfc_sli *psli = &phba->sli;
11902 uint32_t intr_mode;
11903
11904 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
11905 if (pci_enable_device_mem(pdev)) {
11906 printk(KERN_ERR "lpfc: Cannot re-enable "
11907 "PCI device after reset.\n");
11908 return PCI_ERS_RESULT_DISCONNECT;
11909 }
11910
11911 pci_restore_state(pdev);
1dfb5a47
JS
11912
11913 /*
11914 * As the new kernel behavior of pci_restore_state() API call clears
11915 * device saved_state flag, need to save the restored state again.
11916 */
11917 pci_save_state(pdev);
11918
da0436e9
JS
11919 if (pdev->is_busmaster)
11920 pci_set_master(pdev);
11921
11922 spin_lock_irq(&phba->hbalock);
11923 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
11924 spin_unlock_irq(&phba->hbalock);
11925
11926 /* Configure and enable interrupt */
11927 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
11928 if (intr_mode == LPFC_INTR_ERROR) {
11929 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11930 "0427 Cannot re-enable interrupt after "
11931 "slot reset.\n");
11932 return PCI_ERS_RESULT_DISCONNECT;
11933 } else
11934 phba->intr_mode = intr_mode;
11935
75baf696 11936 /* Take device offline, it will perform cleanup */
618a5230 11937 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS
11938 lpfc_offline(phba);
11939 lpfc_sli_brdrestart(phba);
11940
11941 /* Log the current active interrupt mode */
11942 lpfc_log_intr_mode(phba, phba->intr_mode);
11943
11944 return PCI_ERS_RESULT_RECOVERED;
11945}
11946
11947/**
11948 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device.
11949 * @pdev: pointer to PCI device
11950 *
11951 * This routine is called from the PCI subsystem for error handling to device
11952 * with SLI-3 interface spec. It is called when kernel error recovery tells
11953 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
11954 * error recovery. After this call, traffic can start to flow from this device
11955 * again.
11956 */
11957static void
11958lpfc_io_resume_s3(struct pci_dev *pdev)
11959{
11960 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11961 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
3772a991 11962
e2af0d2e 11963 /* Bring device online, it will be no-op for non-fatal error resume */
da0436e9
JS
11964 lpfc_online(phba);
11965}
3772a991 11966
da0436e9
JS
11967/**
11968 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve
11969 * @phba: pointer to lpfc hba data structure.
11970 *
11971 * returns the number of ELS/CT IOCBs to reserve
11972 **/
11973int
11974lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba)
11975{
11976 int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
11977
f1126688
JS
11978 if (phba->sli_rev == LPFC_SLI_REV4) {
11979 if (max_xri <= 100)
6a9c52cf 11980 return 10;
f1126688 11981 else if (max_xri <= 256)
6a9c52cf 11982 return 25;
f1126688 11983 else if (max_xri <= 512)
6a9c52cf 11984 return 50;
f1126688 11985 else if (max_xri <= 1024)
6a9c52cf 11986 return 100;
8a9d2e80 11987 else if (max_xri <= 1536)
6a9c52cf 11988 return 150;
8a9d2e80
JS
11989 else if (max_xri <= 2048)
11990 return 200;
11991 else
11992 return 250;
f1126688
JS
11993 } else
11994 return 0;
3772a991
JS
11995}
11996
895427bd
JS
11997/**
11998 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve
11999 * @phba: pointer to lpfc hba data structure.
12000 *
f358dd0c 12001 * returns the number of ELS/CT + NVMET IOCBs to reserve
895427bd
JS
12002 **/
12003int
12004lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba)
12005{
12006 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba);
12007
f358dd0c
JS
12008 if (phba->nvmet_support)
12009 max_xri += LPFC_NVMET_BUF_POST;
895427bd
JS
12010 return max_xri;
12011}
12012
12013
1feb8204
JS
12014static void
12015lpfc_log_write_firmware_error(struct lpfc_hba *phba, uint32_t offset,
12016 uint32_t magic_number, uint32_t ftype, uint32_t fid, uint32_t fsize,
12017 const struct firmware *fw)
12018{
a72d56b2
JS
12019 if ((offset == ADD_STATUS_FW_NOT_SUPPORTED) ||
12020 (phba->pcidev->device == PCI_DEVICE_ID_LANCER_G6_FC &&
12021 magic_number != MAGIC_NUMER_G6) ||
12022 (phba->pcidev->device == PCI_DEVICE_ID_LANCER_G7_FC &&
12023 magic_number != MAGIC_NUMER_G7))
1feb8204
JS
12024 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12025 "3030 This firmware version is not supported on "
12026 "this HBA model. Device:%x Magic:%x Type:%x "
12027 "ID:%x Size %d %zd\n",
12028 phba->pcidev->device, magic_number, ftype, fid,
12029 fsize, fw->size);
12030 else
12031 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12032 "3022 FW Download failed. Device:%x Magic:%x Type:%x "
12033 "ID:%x Size %d %zd\n",
12034 phba->pcidev->device, magic_number, ftype, fid,
12035 fsize, fw->size);
12036}
12037
12038
52d52440
JS
12039/**
12040 * lpfc_write_firmware - attempt to write a firmware image to the port
52d52440 12041 * @fw: pointer to firmware image returned from request_firmware.
ce396282 12042 * @phba: pointer to lpfc hba data structure.
52d52440 12043 *
52d52440 12044 **/
ce396282
JS
12045static void
12046lpfc_write_firmware(const struct firmware *fw, void *context)
52d52440 12047{
ce396282 12048 struct lpfc_hba *phba = (struct lpfc_hba *)context;
6b5151fd 12049 char fwrev[FW_REV_STR_SIZE];
ce396282 12050 struct lpfc_grp_hdr *image;
52d52440
JS
12051 struct list_head dma_buffer_list;
12052 int i, rc = 0;
12053 struct lpfc_dmabuf *dmabuf, *next;
12054 uint32_t offset = 0, temp_offset = 0;
6b6ef5db 12055 uint32_t magic_number, ftype, fid, fsize;
52d52440 12056
c71ab861 12057 /* It can be null in no-wait mode, sanity check */
ce396282
JS
12058 if (!fw) {
12059 rc = -ENXIO;
12060 goto out;
12061 }
12062 image = (struct lpfc_grp_hdr *)fw->data;
12063
6b6ef5db
JS
12064 magic_number = be32_to_cpu(image->magic_number);
12065 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image);
1feb8204 12066 fid = bf_get_be32(lpfc_grp_hdr_id, image);
6b6ef5db
JS
12067 fsize = be32_to_cpu(image->size);
12068
52d52440 12069 INIT_LIST_HEAD(&dma_buffer_list);
52d52440 12070 lpfc_decode_firmware_rev(phba, fwrev, 1);
88a2cfbb 12071 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) {
52d52440 12072 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
ce396282 12073 "3023 Updating Firmware, Current Version:%s "
52d52440 12074 "New Version:%s\n",
88a2cfbb 12075 fwrev, image->revision);
52d52440
JS
12076 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) {
12077 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
12078 GFP_KERNEL);
12079 if (!dmabuf) {
12080 rc = -ENOMEM;
ce396282 12081 goto release_out;
52d52440
JS
12082 }
12083 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
12084 SLI4_PAGE_SIZE,
12085 &dmabuf->phys,
12086 GFP_KERNEL);
12087 if (!dmabuf->virt) {
12088 kfree(dmabuf);
12089 rc = -ENOMEM;
ce396282 12090 goto release_out;
52d52440
JS
12091 }
12092 list_add_tail(&dmabuf->list, &dma_buffer_list);
12093 }
12094 while (offset < fw->size) {
12095 temp_offset = offset;
12096 list_for_each_entry(dmabuf, &dma_buffer_list, list) {
079b5c91 12097 if (temp_offset + SLI4_PAGE_SIZE > fw->size) {
52d52440
JS
12098 memcpy(dmabuf->virt,
12099 fw->data + temp_offset,
079b5c91
JS
12100 fw->size - temp_offset);
12101 temp_offset = fw->size;
52d52440
JS
12102 break;
12103 }
52d52440
JS
12104 memcpy(dmabuf->virt, fw->data + temp_offset,
12105 SLI4_PAGE_SIZE);
88a2cfbb 12106 temp_offset += SLI4_PAGE_SIZE;
52d52440
JS
12107 }
12108 rc = lpfc_wr_object(phba, &dma_buffer_list,
12109 (fw->size - offset), &offset);
1feb8204
JS
12110 if (rc) {
12111 lpfc_log_write_firmware_error(phba, offset,
12112 magic_number, ftype, fid, fsize, fw);
ce396282 12113 goto release_out;
1feb8204 12114 }
52d52440
JS
12115 }
12116 rc = offset;
1feb8204
JS
12117 } else
12118 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12119 "3029 Skipped Firmware update, Current "
12120 "Version:%s New Version:%s\n",
12121 fwrev, image->revision);
ce396282
JS
12122
12123release_out:
52d52440
JS
12124 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) {
12125 list_del(&dmabuf->list);
12126 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
12127 dmabuf->virt, dmabuf->phys);
12128 kfree(dmabuf);
12129 }
ce396282
JS
12130 release_firmware(fw);
12131out:
12132 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
c71ab861 12133 "3024 Firmware update done: %d.\n", rc);
ce396282 12134 return;
52d52440
JS
12135}
12136
c71ab861
JS
12137/**
12138 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade
12139 * @phba: pointer to lpfc hba data structure.
12140 *
12141 * This routine is called to perform Linux generic firmware upgrade on device
12142 * that supports such feature.
12143 **/
12144int
12145lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade)
12146{
12147 uint8_t file_name[ELX_MODEL_NAME_SIZE];
12148 int ret;
12149 const struct firmware *fw;
12150
12151 /* Only supported on SLI4 interface type 2 for now */
27d6ac0a 12152 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) <
c71ab861
JS
12153 LPFC_SLI_INTF_IF_TYPE_2)
12154 return -EPERM;
12155
12156 snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName);
12157
12158 if (fw_upgrade == INT_FW_UPGRADE) {
12159 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
12160 file_name, &phba->pcidev->dev,
12161 GFP_KERNEL, (void *)phba,
12162 lpfc_write_firmware);
12163 } else if (fw_upgrade == RUN_FW_UPGRADE) {
12164 ret = request_firmware(&fw, file_name, &phba->pcidev->dev);
12165 if (!ret)
12166 lpfc_write_firmware(fw, (void *)phba);
12167 } else {
12168 ret = -EINVAL;
12169 }
12170
12171 return ret;
12172}
12173
3772a991 12174/**
da0436e9 12175 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys
3772a991
JS
12176 * @pdev: pointer to PCI device
12177 * @pid: pointer to PCI device identifier
12178 *
da0436e9
JS
12179 * This routine is called from the kernel's PCI subsystem to device with
12180 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991 12181 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
da0436e9
JS
12182 * information of the device and driver to see if the driver state that it
12183 * can support this kind of device. If the match is successful, the driver
12184 * core invokes this routine. If this routine determines it can claim the HBA,
12185 * it does all the initialization that it needs to do to handle the HBA
12186 * properly.
3772a991
JS
12187 *
12188 * Return code
12189 * 0 - driver can claim the device
12190 * negative value - driver can not claim the device
12191 **/
6f039790 12192static int
da0436e9 12193lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
3772a991
JS
12194{
12195 struct lpfc_hba *phba;
12196 struct lpfc_vport *vport = NULL;
6669f9bb 12197 struct Scsi_Host *shost = NULL;
c490850a 12198 int error;
3772a991
JS
12199 uint32_t cfg_mode, intr_mode;
12200
12201 /* Allocate memory for HBA structure */
12202 phba = lpfc_hba_alloc(pdev);
12203 if (!phba)
12204 return -ENOMEM;
12205
12206 /* Perform generic PCI device enabling operation */
12207 error = lpfc_enable_pci_dev(phba);
079b5c91 12208 if (error)
3772a991 12209 goto out_free_phba;
3772a991 12210
da0436e9
JS
12211 /* Set up SLI API function jump table for PCI-device group-1 HBAs */
12212 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC);
3772a991
JS
12213 if (error)
12214 goto out_disable_pci_dev;
12215
da0436e9
JS
12216 /* Set up SLI-4 specific device PCI memory space */
12217 error = lpfc_sli4_pci_mem_setup(phba);
3772a991
JS
12218 if (error) {
12219 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 12220 "1410 Failed to set up pci memory space.\n");
3772a991
JS
12221 goto out_disable_pci_dev;
12222 }
12223
da0436e9
JS
12224 /* Set up SLI-4 Specific device driver resources */
12225 error = lpfc_sli4_driver_resource_setup(phba);
3772a991
JS
12226 if (error) {
12227 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9
JS
12228 "1412 Failed to set up driver resource.\n");
12229 goto out_unset_pci_mem_s4;
3772a991
JS
12230 }
12231
19ca7609 12232 INIT_LIST_HEAD(&phba->active_rrq_list);
7d791df7 12233 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list);
19ca7609 12234
3772a991
JS
12235 /* Set up common device driver resources */
12236 error = lpfc_setup_driver_resource_phase2(phba);
12237 if (error) {
12238 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 12239 "1414 Failed to set up driver resource.\n");
6c621a22 12240 goto out_unset_driver_resource_s4;
3772a991
JS
12241 }
12242
079b5c91
JS
12243 /* Get the default values for Model Name and Description */
12244 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
12245
3772a991 12246 /* Now, trying to enable interrupt and bring up the device */
5b75da2f 12247 cfg_mode = phba->cfg_use_msi;
5b75da2f 12248
7b15db32 12249 /* Put device to a known state before enabling interrupt */
cdb42bec 12250 phba->pport = NULL;
7b15db32 12251 lpfc_stop_port(phba);
895427bd 12252
7b15db32
JS
12253 /* Configure and enable interrupt */
12254 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode);
12255 if (intr_mode == LPFC_INTR_ERROR) {
12256 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12257 "0426 Failed to enable interrupt.\n");
12258 error = -ENODEV;
cdb42bec 12259 goto out_unset_driver_resource;
7b15db32
JS
12260 }
12261 /* Default to single EQ for non-MSI-X */
895427bd 12262 if (phba->intr_type != MSIX) {
6a828b0f 12263 phba->cfg_irq_chann = 1;
2d7dbc4c 12264 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
2d7dbc4c
JS
12265 if (phba->nvmet_support)
12266 phba->cfg_nvmet_mrq = 1;
12267 }
cdb42bec 12268 }
6a828b0f 12269 lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann);
cdb42bec
JS
12270
12271 /* Create SCSI host to the physical port */
12272 error = lpfc_create_shost(phba);
12273 if (error) {
12274 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12275 "1415 Failed to create scsi host.\n");
12276 goto out_disable_intr;
12277 }
12278 vport = phba->pport;
12279 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
12280
12281 /* Configure sysfs attributes */
12282 error = lpfc_alloc_sysfs_attr(vport);
12283 if (error) {
12284 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12285 "1416 Failed to allocate sysfs attr\n");
12286 goto out_destroy_shost;
895427bd
JS
12287 }
12288
7b15db32
JS
12289 /* Set up SLI-4 HBA */
12290 if (lpfc_sli4_hba_setup(phba)) {
12291 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12292 "1421 Failed to set up hba\n");
12293 error = -ENODEV;
cdb42bec 12294 goto out_free_sysfs_attr;
98c9ea5c 12295 }
858c9f6c 12296
7b15db32
JS
12297 /* Log the current active interrupt mode */
12298 phba->intr_mode = intr_mode;
12299 lpfc_log_intr_mode(phba, intr_mode);
12300
3772a991
JS
12301 /* Perform post initialization setup */
12302 lpfc_post_init_setup(phba);
dea3101e 12303
01649561
JS
12304 /* NVME support in FW earlier in the driver load corrects the
12305 * FC4 type making a check for nvme_support unnecessary.
12306 */
0794d601
JS
12307 if (phba->nvmet_support == 0) {
12308 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
12309 /* Create NVME binding with nvme_fc_transport. This
12310 * ensures the vport is initialized. If the localport
12311 * create fails, it should not unload the driver to
12312 * support field issues.
12313 */
12314 error = lpfc_nvme_create_localport(vport);
12315 if (error) {
12316 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12317 "6004 NVME registration "
12318 "failed, error x%x\n",
12319 error);
12320 }
12321 }
01649561 12322 }
895427bd 12323
c71ab861
JS
12324 /* check for firmware upgrade or downgrade */
12325 if (phba->cfg_request_firmware_upgrade)
db6f1c2f 12326 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE);
52d52440 12327
1c6834a7
JS
12328 /* Check if there are static vports to be created. */
12329 lpfc_create_static_vport(phba);
d2cc9bcd
JS
12330
12331 /* Enable RAS FW log support */
12332 lpfc_sli4_ras_setup(phba);
12333
dea3101e 12334 return 0;
12335
5b75da2f
JS
12336out_free_sysfs_attr:
12337 lpfc_free_sysfs_attr(vport);
3772a991
JS
12338out_destroy_shost:
12339 lpfc_destroy_shost(phba);
cdb42bec
JS
12340out_disable_intr:
12341 lpfc_sli4_disable_intr(phba);
3772a991
JS
12342out_unset_driver_resource:
12343 lpfc_unset_driver_resource_phase2(phba);
da0436e9
JS
12344out_unset_driver_resource_s4:
12345 lpfc_sli4_driver_resource_unset(phba);
12346out_unset_pci_mem_s4:
12347 lpfc_sli4_pci_mem_unset(phba);
3772a991
JS
12348out_disable_pci_dev:
12349 lpfc_disable_pci_dev(phba);
6669f9bb
JS
12350 if (shost)
12351 scsi_host_put(shost);
2e0fef85 12352out_free_phba:
3772a991 12353 lpfc_hba_free(phba);
dea3101e 12354 return error;
12355}
12356
e59058c4 12357/**
da0436e9 12358 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem
e59058c4
JS
12359 * @pdev: pointer to PCI device
12360 *
da0436e9
JS
12361 * This routine is called from the kernel's PCI subsystem to device with
12362 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991
JS
12363 * removed from PCI bus, it performs all the necessary cleanup for the HBA
12364 * device to be removed from the PCI subsystem properly.
e59058c4 12365 **/
6f039790 12366static void
da0436e9 12367lpfc_pci_remove_one_s4(struct pci_dev *pdev)
dea3101e 12368{
da0436e9 12369 struct Scsi_Host *shost = pci_get_drvdata(pdev);
2e0fef85 12370 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
eada272d 12371 struct lpfc_vport **vports;
da0436e9 12372 struct lpfc_hba *phba = vport->phba;
eada272d 12373 int i;
8a4df120 12374
da0436e9 12375 /* Mark the device unloading flag */
549e55cd 12376 spin_lock_irq(&phba->hbalock);
51ef4c26 12377 vport->load_flag |= FC_UNLOADING;
549e55cd 12378 spin_unlock_irq(&phba->hbalock);
2e0fef85 12379
da0436e9 12380 /* Free the HBA sysfs attributes */
858c9f6c
JS
12381 lpfc_free_sysfs_attr(vport);
12382
eada272d
JS
12383 /* Release all the vports against this physical port */
12384 vports = lpfc_create_vport_work_array(phba);
12385 if (vports != NULL)
587a37f6
JS
12386 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
12387 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
12388 continue;
eada272d 12389 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 12390 }
eada272d
JS
12391 lpfc_destroy_vport_work_array(phba, vports);
12392
12393 /* Remove FC host and then SCSI host with the physical port */
858c9f6c
JS
12394 fc_remove_host(shost);
12395 scsi_remove_host(shost);
da0436e9 12396
d613b6a7
JS
12397 /* Perform ndlp cleanup on the physical port. The nvme and nvmet
12398 * localports are destroyed after to cleanup all transport memory.
895427bd 12399 */
87af33fe 12400 lpfc_cleanup(vport);
d613b6a7
JS
12401 lpfc_nvmet_destroy_targetport(phba);
12402 lpfc_nvme_destroy_localport(vport);
87af33fe 12403
c490850a
JS
12404 /* De-allocate multi-XRI pools */
12405 if (phba->cfg_xri_rebalancing)
12406 lpfc_destroy_multixri_pools(phba);
12407
281d6190
JS
12408 /*
12409 * Bring down the SLI Layer. This step disables all interrupts,
12410 * clears the rings, discards all mailbox commands, and resets
12411 * the HBA FCoE function.
12412 */
12413 lpfc_debugfs_terminate(vport);
a257bf90 12414
1901762f 12415 lpfc_stop_hba_timers(phba);
523128e5 12416 spin_lock_irq(&phba->port_list_lock);
858c9f6c 12417 list_del_init(&vport->listentry);
523128e5 12418 spin_unlock_irq(&phba->port_list_lock);
858c9f6c 12419
3677a3a7 12420 /* Perform scsi free before driver resource_unset since scsi
da0436e9 12421 * buffers are released to their corresponding pools here.
2e0fef85 12422 */
5e5b511d 12423 lpfc_io_free(phba);
01649561 12424 lpfc_free_iocb_list(phba);
5e5b511d 12425 lpfc_sli4_hba_unset(phba);
67d12733 12426
0cdb84ec 12427 lpfc_unset_driver_resource_phase2(phba);
da0436e9 12428 lpfc_sli4_driver_resource_unset(phba);
ed957684 12429
da0436e9
JS
12430 /* Unmap adapter Control and Doorbell registers */
12431 lpfc_sli4_pci_mem_unset(phba);
2e0fef85 12432
da0436e9
JS
12433 /* Release PCI resources and disable device's PCI function */
12434 scsi_host_put(shost);
12435 lpfc_disable_pci_dev(phba);
2e0fef85 12436
da0436e9 12437 /* Finally, free the driver's device data structure */
3772a991 12438 lpfc_hba_free(phba);
2e0fef85 12439
da0436e9 12440 return;
dea3101e 12441}
12442
3a55b532 12443/**
da0436e9 12444 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt
3a55b532
JS
12445 * @pdev: pointer to PCI device
12446 * @msg: power management message
12447 *
da0436e9
JS
12448 * This routine is called from the kernel's PCI subsystem to support system
12449 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes
12450 * this method, it quiesces the device by stopping the driver's worker
12451 * thread for the device, turning off device's interrupt and DMA, and bring
12452 * the device offline. Note that as the driver implements the minimum PM
12453 * requirements to a power-aware driver's PM support for suspend/resume -- all
12454 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend()
12455 * method call will be treated as SUSPEND and the driver will fully
12456 * reinitialize its device during resume() method call, the driver will set
12457 * device to PCI_D3hot state in PCI config space instead of setting it
3772a991 12458 * according to the @msg provided by the PM.
3a55b532
JS
12459 *
12460 * Return code
3772a991
JS
12461 * 0 - driver suspended the device
12462 * Error otherwise
3a55b532
JS
12463 **/
12464static int
da0436e9 12465lpfc_pci_suspend_one_s4(struct pci_dev *pdev, pm_message_t msg)
3a55b532
JS
12466{
12467 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12468 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12469
12470 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
75baf696 12471 "2843 PCI device Power Management suspend.\n");
3a55b532
JS
12472
12473 /* Bring down the device */
618a5230 12474 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
3a55b532
JS
12475 lpfc_offline(phba);
12476 kthread_stop(phba->worker_thread);
12477
12478 /* Disable interrupt from device */
da0436e9 12479 lpfc_sli4_disable_intr(phba);
5350d872 12480 lpfc_sli4_queue_destroy(phba);
3a55b532
JS
12481
12482 /* Save device state to PCI config space */
12483 pci_save_state(pdev);
12484 pci_set_power_state(pdev, PCI_D3hot);
12485
12486 return 0;
12487}
12488
12489/**
da0436e9 12490 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt
3a55b532
JS
12491 * @pdev: pointer to PCI device
12492 *
da0436e9
JS
12493 * This routine is called from the kernel's PCI subsystem to support system
12494 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes
12495 * this method, it restores the device's PCI config space state and fully
12496 * reinitializes the device and brings it online. Note that as the driver
12497 * implements the minimum PM requirements to a power-aware driver's PM for
12498 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
12499 * to the suspend() method call will be treated as SUSPEND and the driver
12500 * will fully reinitialize its device during resume() method call, the device
12501 * will be set to PCI_D0 directly in PCI config space before restoring the
12502 * state.
3a55b532
JS
12503 *
12504 * Return code
3772a991
JS
12505 * 0 - driver suspended the device
12506 * Error otherwise
3a55b532
JS
12507 **/
12508static int
da0436e9 12509lpfc_pci_resume_one_s4(struct pci_dev *pdev)
3a55b532
JS
12510{
12511 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12512 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
5b75da2f 12513 uint32_t intr_mode;
3a55b532
JS
12514 int error;
12515
12516 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
da0436e9 12517 "0292 PCI device Power Management resume.\n");
3a55b532
JS
12518
12519 /* Restore device state from PCI config space */
12520 pci_set_power_state(pdev, PCI_D0);
12521 pci_restore_state(pdev);
1dfb5a47
JS
12522
12523 /*
12524 * As the new kernel behavior of pci_restore_state() API call clears
12525 * device saved_state flag, need to save the restored state again.
12526 */
12527 pci_save_state(pdev);
12528
3a55b532
JS
12529 if (pdev->is_busmaster)
12530 pci_set_master(pdev);
12531
da0436e9 12532 /* Startup the kernel thread for this host adapter. */
3a55b532
JS
12533 phba->worker_thread = kthread_run(lpfc_do_work, phba,
12534 "lpfc_worker_%d", phba->brd_no);
12535 if (IS_ERR(phba->worker_thread)) {
12536 error = PTR_ERR(phba->worker_thread);
12537 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 12538 "0293 PM resume failed to start worker "
3a55b532
JS
12539 "thread: error=x%x.\n", error);
12540 return error;
12541 }
12542
5b75da2f 12543 /* Configure and enable interrupt */
da0436e9 12544 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
5b75da2f 12545 if (intr_mode == LPFC_INTR_ERROR) {
3a55b532 12546 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 12547 "0294 PM resume Failed to enable interrupt\n");
5b75da2f
JS
12548 return -EIO;
12549 } else
12550 phba->intr_mode = intr_mode;
3a55b532
JS
12551
12552 /* Restart HBA and bring it online */
12553 lpfc_sli_brdrestart(phba);
12554 lpfc_online(phba);
12555
5b75da2f
JS
12556 /* Log the current active interrupt mode */
12557 lpfc_log_intr_mode(phba, phba->intr_mode);
12558
3a55b532
JS
12559 return 0;
12560}
12561
75baf696
JS
12562/**
12563 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover
12564 * @phba: pointer to lpfc hba data structure.
12565 *
12566 * This routine is called to prepare the SLI4 device for PCI slot recover. It
12567 * aborts all the outstanding SCSI I/Os to the pci device.
12568 **/
12569static void
12570lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba)
12571{
75baf696
JS
12572 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12573 "2828 PCI channel I/O abort preparing for recovery\n");
12574 /*
12575 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
12576 * and let the SCSI mid-layer to retry them to recover.
12577 */
db55fba8 12578 lpfc_sli_abort_fcp_rings(phba);
75baf696
JS
12579}
12580
12581/**
12582 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset
12583 * @phba: pointer to lpfc hba data structure.
12584 *
12585 * This routine is called to prepare the SLI4 device for PCI slot reset. It
12586 * disables the device interrupt and pci device, and aborts the internal FCP
12587 * pending I/Os.
12588 **/
12589static void
12590lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba)
12591{
12592 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12593 "2826 PCI channel disable preparing for reset\n");
12594
12595 /* Block any management I/Os to the device */
618a5230 12596 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT);
75baf696
JS
12597
12598 /* Block all SCSI devices' I/Os on the host */
12599 lpfc_scsi_dev_block(phba);
12600
ea714f3d
JS
12601 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
12602 lpfc_sli_flush_fcp_rings(phba);
12603
c3725bdc
JS
12604 /* Flush the outstanding NVME IOs if fc4 type enabled. */
12605 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
12606 lpfc_sli_flush_nvme_rings(phba);
12607
75baf696
JS
12608 /* stop all timers */
12609 lpfc_stop_hba_timers(phba);
12610
12611 /* Disable interrupt and pci device */
12612 lpfc_sli4_disable_intr(phba);
5350d872 12613 lpfc_sli4_queue_destroy(phba);
75baf696 12614 pci_disable_device(phba->pcidev);
75baf696
JS
12615}
12616
12617/**
12618 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable
12619 * @phba: pointer to lpfc hba data structure.
12620 *
12621 * This routine is called to prepare the SLI4 device for PCI slot permanently
12622 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
12623 * pending I/Os.
12624 **/
12625static void
12626lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba)
12627{
12628 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12629 "2827 PCI channel permanent disable for failure\n");
12630
12631 /* Block all SCSI devices' I/Os on the host */
12632 lpfc_scsi_dev_block(phba);
12633
12634 /* stop all timers */
12635 lpfc_stop_hba_timers(phba);
12636
12637 /* Clean up all driver's outstanding SCSI I/Os */
12638 lpfc_sli_flush_fcp_rings(phba);
c3725bdc
JS
12639
12640 /* Flush the outstanding NVME IOs if fc4 type enabled. */
12641 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
12642 lpfc_sli_flush_nvme_rings(phba);
75baf696
JS
12643}
12644
8d63f375 12645/**
da0436e9 12646 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device
e59058c4
JS
12647 * @pdev: pointer to PCI device.
12648 * @state: the current PCI connection state.
8d63f375 12649 *
da0436e9
JS
12650 * This routine is called from the PCI subsystem for error handling to device
12651 * with SLI-4 interface spec. This function is called by the PCI subsystem
12652 * after a PCI bus error affecting this device has been detected. When this
12653 * function is invoked, it will need to stop all the I/Os and interrupt(s)
12654 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET
12655 * for the PCI subsystem to perform proper recovery as desired.
e59058c4
JS
12656 *
12657 * Return codes
3772a991
JS
12658 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
12659 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
e59058c4 12660 **/
3772a991 12661static pci_ers_result_t
da0436e9 12662lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state)
8d63f375 12663{
75baf696
JS
12664 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12665 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12666
12667 switch (state) {
12668 case pci_channel_io_normal:
12669 /* Non-fatal error, prepare for recovery */
12670 lpfc_sli4_prep_dev_for_recover(phba);
12671 return PCI_ERS_RESULT_CAN_RECOVER;
12672 case pci_channel_io_frozen:
12673 /* Fatal error, prepare for slot reset */
12674 lpfc_sli4_prep_dev_for_reset(phba);
12675 return PCI_ERS_RESULT_NEED_RESET;
12676 case pci_channel_io_perm_failure:
12677 /* Permanent failure, prepare for device down */
12678 lpfc_sli4_prep_dev_for_perm_failure(phba);
12679 return PCI_ERS_RESULT_DISCONNECT;
12680 default:
12681 /* Unknown state, prepare and request slot reset */
12682 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12683 "2825 Unknown PCI error state: x%x\n", state);
12684 lpfc_sli4_prep_dev_for_reset(phba);
12685 return PCI_ERS_RESULT_NEED_RESET;
12686 }
8d63f375
LV
12687}
12688
12689/**
da0436e9 12690 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch
e59058c4
JS
12691 * @pdev: pointer to PCI device.
12692 *
da0436e9
JS
12693 * This routine is called from the PCI subsystem for error handling to device
12694 * with SLI-4 interface spec. It is called after PCI bus has been reset to
12695 * restart the PCI card from scratch, as if from a cold-boot. During the
12696 * PCI subsystem error recovery, after the driver returns
3772a991 12697 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
da0436e9
JS
12698 * recovery and then call this routine before calling the .resume method to
12699 * recover the device. This function will initialize the HBA device, enable
12700 * the interrupt, but it will just put the HBA to offline state without
12701 * passing any I/O traffic.
8d63f375 12702 *
e59058c4 12703 * Return codes
3772a991
JS
12704 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
12705 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
8d63f375 12706 */
3772a991 12707static pci_ers_result_t
da0436e9 12708lpfc_io_slot_reset_s4(struct pci_dev *pdev)
8d63f375 12709{
75baf696
JS
12710 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12711 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12712 struct lpfc_sli *psli = &phba->sli;
12713 uint32_t intr_mode;
12714
12715 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
12716 if (pci_enable_device_mem(pdev)) {
12717 printk(KERN_ERR "lpfc: Cannot re-enable "
12718 "PCI device after reset.\n");
12719 return PCI_ERS_RESULT_DISCONNECT;
12720 }
12721
12722 pci_restore_state(pdev);
0a96e975
JS
12723
12724 /*
12725 * As the new kernel behavior of pci_restore_state() API call clears
12726 * device saved_state flag, need to save the restored state again.
12727 */
12728 pci_save_state(pdev);
12729
75baf696
JS
12730 if (pdev->is_busmaster)
12731 pci_set_master(pdev);
12732
12733 spin_lock_irq(&phba->hbalock);
12734 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
12735 spin_unlock_irq(&phba->hbalock);
12736
12737 /* Configure and enable interrupt */
12738 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
12739 if (intr_mode == LPFC_INTR_ERROR) {
12740 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12741 "2824 Cannot re-enable interrupt after "
12742 "slot reset.\n");
12743 return PCI_ERS_RESULT_DISCONNECT;
12744 } else
12745 phba->intr_mode = intr_mode;
12746
12747 /* Log the current active interrupt mode */
12748 lpfc_log_intr_mode(phba, phba->intr_mode);
12749
8d63f375
LV
12750 return PCI_ERS_RESULT_RECOVERED;
12751}
12752
12753/**
da0436e9 12754 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device
e59058c4 12755 * @pdev: pointer to PCI device
8d63f375 12756 *
3772a991 12757 * This routine is called from the PCI subsystem for error handling to device
da0436e9 12758 * with SLI-4 interface spec. It is called when kernel error recovery tells
3772a991
JS
12759 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
12760 * error recovery. After this call, traffic can start to flow from this device
12761 * again.
da0436e9 12762 **/
3772a991 12763static void
da0436e9 12764lpfc_io_resume_s4(struct pci_dev *pdev)
8d63f375 12765{
75baf696
JS
12766 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12767 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12768
12769 /*
12770 * In case of slot reset, as function reset is performed through
12771 * mailbox command which needs DMA to be enabled, this operation
12772 * has to be moved to the io resume phase. Taking device offline
12773 * will perform the necessary cleanup.
12774 */
12775 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) {
12776 /* Perform device reset */
618a5230 12777 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
75baf696
JS
12778 lpfc_offline(phba);
12779 lpfc_sli_brdrestart(phba);
12780 /* Bring the device back online */
12781 lpfc_online(phba);
12782 }
8d63f375
LV
12783}
12784
3772a991
JS
12785/**
12786 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem
12787 * @pdev: pointer to PCI device
12788 * @pid: pointer to PCI device identifier
12789 *
12790 * This routine is to be registered to the kernel's PCI subsystem. When an
12791 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks
12792 * at PCI device-specific information of the device and driver to see if the
12793 * driver state that it can support this kind of device. If the match is
12794 * successful, the driver core invokes this routine. This routine dispatches
12795 * the action to the proper SLI-3 or SLI-4 device probing routine, which will
12796 * do all the initialization that it needs to do to handle the HBA device
12797 * properly.
12798 *
12799 * Return code
12800 * 0 - driver can claim the device
12801 * negative value - driver can not claim the device
12802 **/
6f039790 12803static int
3772a991
JS
12804lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
12805{
12806 int rc;
8fa38513 12807 struct lpfc_sli_intf intf;
3772a991 12808
28baac74 12809 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
3772a991
JS
12810 return -ENODEV;
12811
8fa38513 12812 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
28baac74 12813 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
da0436e9 12814 rc = lpfc_pci_probe_one_s4(pdev, pid);
8fa38513 12815 else
3772a991 12816 rc = lpfc_pci_probe_one_s3(pdev, pid);
8fa38513 12817
3772a991
JS
12818 return rc;
12819}
12820
12821/**
12822 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem
12823 * @pdev: pointer to PCI device
12824 *
12825 * This routine is to be registered to the kernel's PCI subsystem. When an
12826 * Emulex HBA is removed from PCI bus, the driver core invokes this routine.
12827 * This routine dispatches the action to the proper SLI-3 or SLI-4 device
12828 * remove routine, which will perform all the necessary cleanup for the
12829 * device to be removed from the PCI subsystem properly.
12830 **/
6f039790 12831static void
3772a991
JS
12832lpfc_pci_remove_one(struct pci_dev *pdev)
12833{
12834 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12835 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12836
12837 switch (phba->pci_dev_grp) {
12838 case LPFC_PCI_DEV_LP:
12839 lpfc_pci_remove_one_s3(pdev);
12840 break;
da0436e9
JS
12841 case LPFC_PCI_DEV_OC:
12842 lpfc_pci_remove_one_s4(pdev);
12843 break;
3772a991
JS
12844 default:
12845 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12846 "1424 Invalid PCI device group: 0x%x\n",
12847 phba->pci_dev_grp);
12848 break;
12849 }
12850 return;
12851}
12852
12853/**
12854 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management
12855 * @pdev: pointer to PCI device
12856 * @msg: power management message
12857 *
12858 * This routine is to be registered to the kernel's PCI subsystem to support
12859 * system Power Management (PM). When PM invokes this method, it dispatches
12860 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will
12861 * suspend the device.
12862 *
12863 * Return code
12864 * 0 - driver suspended the device
12865 * Error otherwise
12866 **/
12867static int
12868lpfc_pci_suspend_one(struct pci_dev *pdev, pm_message_t msg)
12869{
12870 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12871 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12872 int rc = -ENODEV;
12873
12874 switch (phba->pci_dev_grp) {
12875 case LPFC_PCI_DEV_LP:
12876 rc = lpfc_pci_suspend_one_s3(pdev, msg);
12877 break;
da0436e9
JS
12878 case LPFC_PCI_DEV_OC:
12879 rc = lpfc_pci_suspend_one_s4(pdev, msg);
12880 break;
3772a991
JS
12881 default:
12882 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12883 "1425 Invalid PCI device group: 0x%x\n",
12884 phba->pci_dev_grp);
12885 break;
12886 }
12887 return rc;
12888}
12889
12890/**
12891 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management
12892 * @pdev: pointer to PCI device
12893 *
12894 * This routine is to be registered to the kernel's PCI subsystem to support
12895 * system Power Management (PM). When PM invokes this method, it dispatches
12896 * the action to the proper SLI-3 or SLI-4 device resume routine, which will
12897 * resume the device.
12898 *
12899 * Return code
12900 * 0 - driver suspended the device
12901 * Error otherwise
12902 **/
12903static int
12904lpfc_pci_resume_one(struct pci_dev *pdev)
12905{
12906 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12907 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12908 int rc = -ENODEV;
12909
12910 switch (phba->pci_dev_grp) {
12911 case LPFC_PCI_DEV_LP:
12912 rc = lpfc_pci_resume_one_s3(pdev);
12913 break;
da0436e9
JS
12914 case LPFC_PCI_DEV_OC:
12915 rc = lpfc_pci_resume_one_s4(pdev);
12916 break;
3772a991
JS
12917 default:
12918 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12919 "1426 Invalid PCI device group: 0x%x\n",
12920 phba->pci_dev_grp);
12921 break;
12922 }
12923 return rc;
12924}
12925
12926/**
12927 * lpfc_io_error_detected - lpfc method for handling PCI I/O error
12928 * @pdev: pointer to PCI device.
12929 * @state: the current PCI connection state.
12930 *
12931 * This routine is registered to the PCI subsystem for error handling. This
12932 * function is called by the PCI subsystem after a PCI bus error affecting
12933 * this device has been detected. When this routine is invoked, it dispatches
12934 * the action to the proper SLI-3 or SLI-4 device error detected handling
12935 * routine, which will perform the proper error detected operation.
12936 *
12937 * Return codes
12938 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
12939 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
12940 **/
12941static pci_ers_result_t
12942lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
12943{
12944 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12945 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12946 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
12947
12948 switch (phba->pci_dev_grp) {
12949 case LPFC_PCI_DEV_LP:
12950 rc = lpfc_io_error_detected_s3(pdev, state);
12951 break;
da0436e9
JS
12952 case LPFC_PCI_DEV_OC:
12953 rc = lpfc_io_error_detected_s4(pdev, state);
12954 break;
3772a991
JS
12955 default:
12956 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12957 "1427 Invalid PCI device group: 0x%x\n",
12958 phba->pci_dev_grp);
12959 break;
12960 }
12961 return rc;
12962}
12963
12964/**
12965 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch
12966 * @pdev: pointer to PCI device.
12967 *
12968 * This routine is registered to the PCI subsystem for error handling. This
12969 * function is called after PCI bus has been reset to restart the PCI card
12970 * from scratch, as if from a cold-boot. When this routine is invoked, it
12971 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling
12972 * routine, which will perform the proper device reset.
12973 *
12974 * Return codes
12975 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
12976 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
12977 **/
12978static pci_ers_result_t
12979lpfc_io_slot_reset(struct pci_dev *pdev)
12980{
12981 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12982 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12983 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
12984
12985 switch (phba->pci_dev_grp) {
12986 case LPFC_PCI_DEV_LP:
12987 rc = lpfc_io_slot_reset_s3(pdev);
12988 break;
da0436e9
JS
12989 case LPFC_PCI_DEV_OC:
12990 rc = lpfc_io_slot_reset_s4(pdev);
12991 break;
3772a991
JS
12992 default:
12993 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12994 "1428 Invalid PCI device group: 0x%x\n",
12995 phba->pci_dev_grp);
12996 break;
12997 }
12998 return rc;
12999}
13000
13001/**
13002 * lpfc_io_resume - lpfc method for resuming PCI I/O operation
13003 * @pdev: pointer to PCI device
13004 *
13005 * This routine is registered to the PCI subsystem for error handling. It
13006 * is called when kernel error recovery tells the lpfc driver that it is
13007 * OK to resume normal PCI operation after PCI bus error recovery. When
13008 * this routine is invoked, it dispatches the action to the proper SLI-3
13009 * or SLI-4 device io_resume routine, which will resume the device operation.
13010 **/
13011static void
13012lpfc_io_resume(struct pci_dev *pdev)
13013{
13014 struct Scsi_Host *shost = pci_get_drvdata(pdev);
13015 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
13016
13017 switch (phba->pci_dev_grp) {
13018 case LPFC_PCI_DEV_LP:
13019 lpfc_io_resume_s3(pdev);
13020 break;
da0436e9
JS
13021 case LPFC_PCI_DEV_OC:
13022 lpfc_io_resume_s4(pdev);
13023 break;
3772a991
JS
13024 default:
13025 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13026 "1429 Invalid PCI device group: 0x%x\n",
13027 phba->pci_dev_grp);
13028 break;
13029 }
13030 return;
13031}
13032
1ba981fd
JS
13033/**
13034 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter
13035 * @phba: pointer to lpfc hba data structure.
13036 *
13037 * This routine checks to see if OAS is supported for this adapter. If
13038 * supported, the configure Flash Optimized Fabric flag is set. Otherwise,
13039 * the enable oas flag is cleared and the pool created for OAS device data
13040 * is destroyed.
13041 *
13042 **/
13043void
13044lpfc_sli4_oas_verify(struct lpfc_hba *phba)
13045{
13046
13047 if (!phba->cfg_EnableXLane)
13048 return;
13049
13050 if (phba->sli4_hba.pc_sli4_params.oas_supported) {
13051 phba->cfg_fof = 1;
13052 } else {
f38fa0bb 13053 phba->cfg_fof = 0;
1ba981fd
JS
13054 if (phba->device_data_mem_pool)
13055 mempool_destroy(phba->device_data_mem_pool);
13056 phba->device_data_mem_pool = NULL;
13057 }
13058
13059 return;
13060}
13061
d2cc9bcd
JS
13062/**
13063 * lpfc_sli4_ras_init - Verify RAS-FW log is supported by this adapter
13064 * @phba: pointer to lpfc hba data structure.
13065 *
13066 * This routine checks to see if RAS is supported by the adapter. Check the
13067 * function through which RAS support enablement is to be done.
13068 **/
13069void
13070lpfc_sli4_ras_init(struct lpfc_hba *phba)
13071{
13072 switch (phba->pcidev->device) {
13073 case PCI_DEVICE_ID_LANCER_G6_FC:
13074 case PCI_DEVICE_ID_LANCER_G7_FC:
13075 phba->ras_fwlog.ras_hwsupport = true;
cb34990b
JS
13076 if (phba->cfg_ras_fwlog_func == PCI_FUNC(phba->pcidev->devfn) &&
13077 phba->cfg_ras_fwlog_buffsize)
d2cc9bcd
JS
13078 phba->ras_fwlog.ras_enabled = true;
13079 else
13080 phba->ras_fwlog.ras_enabled = false;
13081 break;
13082 default:
13083 phba->ras_fwlog.ras_hwsupport = false;
13084 }
13085}
13086
1ba981fd 13087
dea3101e 13088MODULE_DEVICE_TABLE(pci, lpfc_id_table);
13089
a55b2d21 13090static const struct pci_error_handlers lpfc_err_handler = {
8d63f375
LV
13091 .error_detected = lpfc_io_error_detected,
13092 .slot_reset = lpfc_io_slot_reset,
13093 .resume = lpfc_io_resume,
13094};
13095
dea3101e 13096static struct pci_driver lpfc_driver = {
13097 .name = LPFC_DRIVER_NAME,
13098 .id_table = lpfc_id_table,
13099 .probe = lpfc_pci_probe_one,
6f039790 13100 .remove = lpfc_pci_remove_one,
85e8a239 13101 .shutdown = lpfc_pci_remove_one,
3a55b532 13102 .suspend = lpfc_pci_suspend_one,
3772a991 13103 .resume = lpfc_pci_resume_one,
2e0fef85 13104 .err_handler = &lpfc_err_handler,
dea3101e 13105};
13106
3ef6d24c 13107static const struct file_operations lpfc_mgmt_fop = {
858feacd 13108 .owner = THIS_MODULE,
3ef6d24c
JS
13109};
13110
13111static struct miscdevice lpfc_mgmt_dev = {
13112 .minor = MISC_DYNAMIC_MINOR,
13113 .name = "lpfcmgmt",
13114 .fops = &lpfc_mgmt_fop,
13115};
13116
e59058c4 13117/**
3621a710 13118 * lpfc_init - lpfc module initialization routine
e59058c4
JS
13119 *
13120 * This routine is to be invoked when the lpfc module is loaded into the
13121 * kernel. The special kernel macro module_init() is used to indicate the
13122 * role of this routine to the kernel as lpfc module entry point.
13123 *
13124 * Return codes
13125 * 0 - successful
13126 * -ENOMEM - FC attach transport failed
13127 * all others - failed
13128 */
dea3101e 13129static int __init
13130lpfc_init(void)
13131{
13132 int error = 0;
13133
13134 printk(LPFC_MODULE_DESC "\n");
c44ce173 13135 printk(LPFC_COPYRIGHT "\n");
dea3101e 13136
3ef6d24c
JS
13137 error = misc_register(&lpfc_mgmt_dev);
13138 if (error)
13139 printk(KERN_ERR "Could not register lpfcmgmt device, "
13140 "misc_register returned with status %d", error);
13141
458c083e
JS
13142 lpfc_transport_functions.vport_create = lpfc_vport_create;
13143 lpfc_transport_functions.vport_delete = lpfc_vport_delete;
dea3101e 13144 lpfc_transport_template =
13145 fc_attach_transport(&lpfc_transport_functions);
7ee5d43e 13146 if (lpfc_transport_template == NULL)
dea3101e 13147 return -ENOMEM;
458c083e
JS
13148 lpfc_vport_transport_template =
13149 fc_attach_transport(&lpfc_vport_transport_functions);
13150 if (lpfc_vport_transport_template == NULL) {
13151 fc_release_transport(lpfc_transport_template);
13152 return -ENOMEM;
7ee5d43e 13153 }
5fd11085 13154 lpfc_nvme_cmd_template();
bd3061ba 13155 lpfc_nvmet_cmd_template();
7bb03bbf
JS
13156
13157 /* Initialize in case vector mapping is needed */
2ea259ee 13158 lpfc_present_cpu = num_present_cpus();
7bb03bbf 13159
dea3101e 13160 error = pci_register_driver(&lpfc_driver);
92d7f7b0 13161 if (error) {
dea3101e 13162 fc_release_transport(lpfc_transport_template);
458c083e 13163 fc_release_transport(lpfc_vport_transport_template);
92d7f7b0 13164 }
dea3101e 13165
13166 return error;
13167}
13168
e59058c4 13169/**
3621a710 13170 * lpfc_exit - lpfc module removal routine
e59058c4
JS
13171 *
13172 * This routine is invoked when the lpfc module is removed from the kernel.
13173 * The special kernel macro module_exit() is used to indicate the role of
13174 * this routine to the kernel as lpfc module exit point.
13175 */
dea3101e 13176static void __exit
13177lpfc_exit(void)
13178{
3ef6d24c 13179 misc_deregister(&lpfc_mgmt_dev);
dea3101e 13180 pci_unregister_driver(&lpfc_driver);
13181 fc_release_transport(lpfc_transport_template);
458c083e 13182 fc_release_transport(lpfc_vport_transport_template);
81301a9b 13183 if (_dump_buf_data) {
6a9c52cf
JS
13184 printk(KERN_ERR "9062 BLKGRD: freeing %lu pages for "
13185 "_dump_buf_data at 0x%p\n",
81301a9b
JS
13186 (1L << _dump_buf_data_order), _dump_buf_data);
13187 free_pages((unsigned long)_dump_buf_data, _dump_buf_data_order);
13188 }
13189
13190 if (_dump_buf_dif) {
6a9c52cf
JS
13191 printk(KERN_ERR "9049 BLKGRD: freeing %lu pages for "
13192 "_dump_buf_dif at 0x%p\n",
81301a9b
JS
13193 (1L << _dump_buf_dif_order), _dump_buf_dif);
13194 free_pages((unsigned long)_dump_buf_dif, _dump_buf_dif_order);
13195 }
7973967f 13196 idr_destroy(&lpfc_hba_index);
dea3101e 13197}
13198
13199module_init(lpfc_init);
13200module_exit(lpfc_exit);
13201MODULE_LICENSE("GPL");
13202MODULE_DESCRIPTION(LPFC_MODULE_DESC);
d080abe0 13203MODULE_AUTHOR("Broadcom");
dea3101e 13204MODULE_VERSION("0:" LPFC_DRIVER_VERSION);