Commit | Line | Data |
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dea3101e | 1 | /******************************************************************* |
2 | * This file is part of the Emulex Linux Device Driver for * | |
c44ce173 | 3 | * Fibre Channel Host Bus Adapters. * |
128bddac | 4 | * Copyright (C) 2017-2018 Broadcom. All Rights Reserved. The term * |
3e21d1cb | 5 | * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * |
50611577 | 6 | * Copyright (C) 2004-2016 Emulex. All rights reserved. * |
c44ce173 | 7 | * EMULEX and SLI are trademarks of Emulex. * |
d080abe0 | 8 | * www.broadcom.com * |
c44ce173 | 9 | * Portions Copyright (C) 2004-2005 Christoph Hellwig * |
dea3101e | 10 | * * |
11 | * This program is free software; you can redistribute it and/or * | |
c44ce173 JSEC |
12 | * modify it under the terms of version 2 of the GNU General * |
13 | * Public License as published by the Free Software Foundation. * | |
14 | * This program is distributed in the hope that it will be useful. * | |
15 | * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * | |
16 | * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * | |
17 | * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * | |
18 | * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * | |
19 | * TO BE LEGALLY INVALID. See the GNU General Public License for * | |
20 | * more details, a copy of which can be found in the file COPYING * | |
21 | * included with this package. * | |
dea3101e | 22 | *******************************************************************/ |
23 | ||
dea3101e | 24 | #include <linux/blkdev.h> |
25 | #include <linux/delay.h> | |
26 | #include <linux/dma-mapping.h> | |
27 | #include <linux/idr.h> | |
28 | #include <linux/interrupt.h> | |
acf3368f | 29 | #include <linux/module.h> |
dea3101e | 30 | #include <linux/kthread.h> |
31 | #include <linux/pci.h> | |
32 | #include <linux/spinlock.h> | |
92d7f7b0 | 33 | #include <linux/ctype.h> |
0d878419 | 34 | #include <linux/aer.h> |
5a0e3ad6 | 35 | #include <linux/slab.h> |
52d52440 | 36 | #include <linux/firmware.h> |
3ef6d24c | 37 | #include <linux/miscdevice.h> |
7bb03bbf | 38 | #include <linux/percpu.h> |
895427bd | 39 | #include <linux/msi.h> |
286871a6 | 40 | #include <linux/bitops.h> |
dea3101e | 41 | |
91886523 | 42 | #include <scsi/scsi.h> |
dea3101e | 43 | #include <scsi/scsi_device.h> |
44 | #include <scsi/scsi_host.h> | |
45 | #include <scsi/scsi_transport_fc.h> | |
86c67379 JS |
46 | #include <scsi/scsi_tcq.h> |
47 | #include <scsi/fc/fc_fs.h> | |
48 | ||
49 | #include <linux/nvme-fc-driver.h> | |
dea3101e | 50 | |
da0436e9 | 51 | #include "lpfc_hw4.h" |
dea3101e | 52 | #include "lpfc_hw.h" |
53 | #include "lpfc_sli.h" | |
da0436e9 | 54 | #include "lpfc_sli4.h" |
ea2151b4 | 55 | #include "lpfc_nl.h" |
dea3101e | 56 | #include "lpfc_disc.h" |
dea3101e | 57 | #include "lpfc.h" |
895427bd JS |
58 | #include "lpfc_scsi.h" |
59 | #include "lpfc_nvme.h" | |
86c67379 | 60 | #include "lpfc_nvmet.h" |
dea3101e | 61 | #include "lpfc_logmsg.h" |
62 | #include "lpfc_crtn.h" | |
92d7f7b0 | 63 | #include "lpfc_vport.h" |
dea3101e | 64 | #include "lpfc_version.h" |
12f44457 | 65 | #include "lpfc_ids.h" |
dea3101e | 66 | |
81301a9b JS |
67 | char *_dump_buf_data; |
68 | unsigned long _dump_buf_data_order; | |
69 | char *_dump_buf_dif; | |
70 | unsigned long _dump_buf_dif_order; | |
71 | spinlock_t _dump_buf_lock; | |
72 | ||
7bb03bbf | 73 | /* Used when mapping IRQ vectors in a driver centric manner */ |
b246de17 JS |
74 | uint16_t *lpfc_used_cpu; |
75 | uint32_t lpfc_present_cpu; | |
7bb03bbf | 76 | |
dea3101e | 77 | static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *); |
78 | static int lpfc_post_rcv_buf(struct lpfc_hba *); | |
5350d872 | 79 | static int lpfc_sli4_queue_verify(struct lpfc_hba *); |
da0436e9 JS |
80 | static int lpfc_create_bootstrap_mbox(struct lpfc_hba *); |
81 | static int lpfc_setup_endian_order(struct lpfc_hba *); | |
da0436e9 | 82 | static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *); |
8a9d2e80 | 83 | static void lpfc_free_els_sgl_list(struct lpfc_hba *); |
f358dd0c | 84 | static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *); |
8a9d2e80 | 85 | static void lpfc_init_sgl_list(struct lpfc_hba *); |
da0436e9 JS |
86 | static int lpfc_init_active_sgl_array(struct lpfc_hba *); |
87 | static void lpfc_free_active_sgl(struct lpfc_hba *); | |
88 | static int lpfc_hba_down_post_s3(struct lpfc_hba *phba); | |
89 | static int lpfc_hba_down_post_s4(struct lpfc_hba *phba); | |
90 | static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *); | |
91 | static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *); | |
92 | static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *); | |
618a5230 JS |
93 | static void lpfc_sli4_disable_intr(struct lpfc_hba *); |
94 | static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t); | |
1ba981fd | 95 | static void lpfc_sli4_oas_verify(struct lpfc_hba *phba); |
dea3101e | 96 | |
97 | static struct scsi_transport_template *lpfc_transport_template = NULL; | |
92d7f7b0 | 98 | static struct scsi_transport_template *lpfc_vport_transport_template = NULL; |
dea3101e | 99 | static DEFINE_IDR(lpfc_hba_index); |
f358dd0c | 100 | #define LPFC_NVMET_BUF_POST 254 |
dea3101e | 101 | |
e59058c4 | 102 | /** |
3621a710 | 103 | * lpfc_config_port_prep - Perform lpfc initialization prior to config port |
e59058c4 JS |
104 | * @phba: pointer to lpfc hba data structure. |
105 | * | |
106 | * This routine will do LPFC initialization prior to issuing the CONFIG_PORT | |
107 | * mailbox command. It retrieves the revision information from the HBA and | |
108 | * collects the Vital Product Data (VPD) about the HBA for preparing the | |
109 | * configuration of the HBA. | |
110 | * | |
111 | * Return codes: | |
112 | * 0 - success. | |
113 | * -ERESTART - requests the SLI layer to reset the HBA and try again. | |
114 | * Any other value - indicates an error. | |
115 | **/ | |
dea3101e | 116 | int |
2e0fef85 | 117 | lpfc_config_port_prep(struct lpfc_hba *phba) |
dea3101e | 118 | { |
119 | lpfc_vpd_t *vp = &phba->vpd; | |
120 | int i = 0, rc; | |
121 | LPFC_MBOXQ_t *pmb; | |
122 | MAILBOX_t *mb; | |
123 | char *lpfc_vpd_data = NULL; | |
124 | uint16_t offset = 0; | |
125 | static char licensed[56] = | |
126 | "key unlock for use with gnu public licensed code only\0"; | |
65a29c16 | 127 | static int init_key = 1; |
dea3101e | 128 | |
129 | pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); | |
130 | if (!pmb) { | |
2e0fef85 | 131 | phba->link_state = LPFC_HBA_ERROR; |
dea3101e | 132 | return -ENOMEM; |
133 | } | |
134 | ||
04c68496 | 135 | mb = &pmb->u.mb; |
2e0fef85 | 136 | phba->link_state = LPFC_INIT_MBX_CMDS; |
dea3101e | 137 | |
138 | if (lpfc_is_LC_HBA(phba->pcidev->device)) { | |
65a29c16 JS |
139 | if (init_key) { |
140 | uint32_t *ptext = (uint32_t *) licensed; | |
dea3101e | 141 | |
65a29c16 JS |
142 | for (i = 0; i < 56; i += sizeof (uint32_t), ptext++) |
143 | *ptext = cpu_to_be32(*ptext); | |
144 | init_key = 0; | |
145 | } | |
dea3101e | 146 | |
147 | lpfc_read_nv(phba, pmb); | |
148 | memset((char*)mb->un.varRDnvp.rsvd3, 0, | |
149 | sizeof (mb->un.varRDnvp.rsvd3)); | |
150 | memcpy((char*)mb->un.varRDnvp.rsvd3, licensed, | |
151 | sizeof (licensed)); | |
152 | ||
153 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); | |
154 | ||
155 | if (rc != MBX_SUCCESS) { | |
ed957684 | 156 | lpfc_printf_log(phba, KERN_ERR, LOG_MBOX, |
e8b62011 | 157 | "0324 Config Port initialization " |
dea3101e | 158 | "error, mbxCmd x%x READ_NVPARM, " |
159 | "mbxStatus x%x\n", | |
dea3101e | 160 | mb->mbxCommand, mb->mbxStatus); |
161 | mempool_free(pmb, phba->mbox_mem_pool); | |
162 | return -ERESTART; | |
163 | } | |
164 | memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename, | |
2e0fef85 JS |
165 | sizeof(phba->wwnn)); |
166 | memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname, | |
167 | sizeof(phba->wwpn)); | |
dea3101e | 168 | } |
169 | ||
dfb75133 MW |
170 | /* |
171 | * Clear all option bits except LPFC_SLI3_BG_ENABLED, | |
172 | * which was already set in lpfc_get_cfgparam() | |
173 | */ | |
174 | phba->sli3_options &= (uint32_t)LPFC_SLI3_BG_ENABLED; | |
92d7f7b0 | 175 | |
dea3101e | 176 | /* Setup and issue mailbox READ REV command */ |
177 | lpfc_read_rev(phba, pmb); | |
178 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); | |
179 | if (rc != MBX_SUCCESS) { | |
ed957684 | 180 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
e8b62011 | 181 | "0439 Adapter failed to init, mbxCmd x%x " |
dea3101e | 182 | "READ_REV, mbxStatus x%x\n", |
dea3101e | 183 | mb->mbxCommand, mb->mbxStatus); |
184 | mempool_free( pmb, phba->mbox_mem_pool); | |
185 | return -ERESTART; | |
186 | } | |
187 | ||
92d7f7b0 | 188 | |
1de933f3 JSEC |
189 | /* |
190 | * The value of rr must be 1 since the driver set the cv field to 1. | |
191 | * This setting requires the FW to set all revision fields. | |
dea3101e | 192 | */ |
1de933f3 | 193 | if (mb->un.varRdRev.rr == 0) { |
dea3101e | 194 | vp->rev.rBit = 0; |
1de933f3 | 195 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
e8b62011 JS |
196 | "0440 Adapter failed to init, READ_REV has " |
197 | "missing revision information.\n"); | |
dea3101e | 198 | mempool_free(pmb, phba->mbox_mem_pool); |
199 | return -ERESTART; | |
dea3101e | 200 | } |
201 | ||
495a714c JS |
202 | if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) { |
203 | mempool_free(pmb, phba->mbox_mem_pool); | |
ed957684 | 204 | return -EINVAL; |
495a714c | 205 | } |
ed957684 | 206 | |
dea3101e | 207 | /* Save information as VPD data */ |
1de933f3 | 208 | vp->rev.rBit = 1; |
92d7f7b0 | 209 | memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t)); |
1de933f3 JSEC |
210 | vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev; |
211 | memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16); | |
212 | vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev; | |
213 | memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16); | |
dea3101e | 214 | vp->rev.biuRev = mb->un.varRdRev.biuRev; |
215 | vp->rev.smRev = mb->un.varRdRev.smRev; | |
216 | vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev; | |
217 | vp->rev.endecRev = mb->un.varRdRev.endecRev; | |
218 | vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh; | |
219 | vp->rev.fcphLow = mb->un.varRdRev.fcphLow; | |
220 | vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh; | |
221 | vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow; | |
222 | vp->rev.postKernRev = mb->un.varRdRev.postKernRev; | |
223 | vp->rev.opFwRev = mb->un.varRdRev.opFwRev; | |
224 | ||
92d7f7b0 JS |
225 | /* If the sli feature level is less then 9, we must |
226 | * tear down all RPIs and VPIs on link down if NPIV | |
227 | * is enabled. | |
228 | */ | |
229 | if (vp->rev.feaLevelHigh < 9) | |
230 | phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN; | |
231 | ||
dea3101e | 232 | if (lpfc_is_LC_HBA(phba->pcidev->device)) |
233 | memcpy(phba->RandomData, (char *)&mb->un.varWords[24], | |
234 | sizeof (phba->RandomData)); | |
235 | ||
dea3101e | 236 | /* Get adapter VPD information */ |
dea3101e | 237 | lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL); |
238 | if (!lpfc_vpd_data) | |
d7c255b2 | 239 | goto out_free_mbox; |
dea3101e | 240 | do { |
a0c87cbd | 241 | lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD); |
dea3101e | 242 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); |
243 | ||
244 | if (rc != MBX_SUCCESS) { | |
245 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
e8b62011 | 246 | "0441 VPD not present on adapter, " |
dea3101e | 247 | "mbxCmd x%x DUMP VPD, mbxStatus x%x\n", |
dea3101e | 248 | mb->mbxCommand, mb->mbxStatus); |
74b72a59 | 249 | mb->un.varDmp.word_cnt = 0; |
dea3101e | 250 | } |
04c68496 JS |
251 | /* dump mem may return a zero when finished or we got a |
252 | * mailbox error, either way we are done. | |
253 | */ | |
254 | if (mb->un.varDmp.word_cnt == 0) | |
255 | break; | |
74b72a59 JW |
256 | if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset) |
257 | mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset; | |
d7c255b2 JS |
258 | lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET, |
259 | lpfc_vpd_data + offset, | |
92d7f7b0 | 260 | mb->un.varDmp.word_cnt); |
dea3101e | 261 | offset += mb->un.varDmp.word_cnt; |
74b72a59 JW |
262 | } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE); |
263 | lpfc_parse_vpd(phba, lpfc_vpd_data, offset); | |
dea3101e | 264 | |
265 | kfree(lpfc_vpd_data); | |
dea3101e | 266 | out_free_mbox: |
267 | mempool_free(pmb, phba->mbox_mem_pool); | |
268 | return 0; | |
269 | } | |
270 | ||
e59058c4 | 271 | /** |
3621a710 | 272 | * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd |
e59058c4 JS |
273 | * @phba: pointer to lpfc hba data structure. |
274 | * @pmboxq: pointer to the driver internal queue element for mailbox command. | |
275 | * | |
276 | * This is the completion handler for driver's configuring asynchronous event | |
277 | * mailbox command to the device. If the mailbox command returns successfully, | |
278 | * it will set internal async event support flag to 1; otherwise, it will | |
279 | * set internal async event support flag to 0. | |
280 | **/ | |
57127f15 JS |
281 | static void |
282 | lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq) | |
283 | { | |
04c68496 | 284 | if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS) |
57127f15 JS |
285 | phba->temp_sensor_support = 1; |
286 | else | |
287 | phba->temp_sensor_support = 0; | |
288 | mempool_free(pmboxq, phba->mbox_mem_pool); | |
289 | return; | |
290 | } | |
291 | ||
97207482 | 292 | /** |
3621a710 | 293 | * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler |
97207482 JS |
294 | * @phba: pointer to lpfc hba data structure. |
295 | * @pmboxq: pointer to the driver internal queue element for mailbox command. | |
296 | * | |
297 | * This is the completion handler for dump mailbox command for getting | |
298 | * wake up parameters. When this command complete, the response contain | |
299 | * Option rom version of the HBA. This function translate the version number | |
300 | * into a human readable string and store it in OptionROMVersion. | |
301 | **/ | |
302 | static void | |
303 | lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq) | |
304 | { | |
305 | struct prog_id *prg; | |
306 | uint32_t prog_id_word; | |
307 | char dist = ' '; | |
308 | /* character array used for decoding dist type. */ | |
309 | char dist_char[] = "nabx"; | |
310 | ||
04c68496 | 311 | if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) { |
9f1e1b50 | 312 | mempool_free(pmboxq, phba->mbox_mem_pool); |
97207482 | 313 | return; |
9f1e1b50 | 314 | } |
97207482 JS |
315 | |
316 | prg = (struct prog_id *) &prog_id_word; | |
317 | ||
318 | /* word 7 contain option rom version */ | |
04c68496 | 319 | prog_id_word = pmboxq->u.mb.un.varWords[7]; |
97207482 JS |
320 | |
321 | /* Decode the Option rom version word to a readable string */ | |
322 | if (prg->dist < 4) | |
323 | dist = dist_char[prg->dist]; | |
324 | ||
325 | if ((prg->dist == 3) && (prg->num == 0)) | |
a2fc4aef | 326 | snprintf(phba->OptionROMVersion, 32, "%d.%d%d", |
97207482 JS |
327 | prg->ver, prg->rev, prg->lev); |
328 | else | |
a2fc4aef | 329 | snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d", |
97207482 JS |
330 | prg->ver, prg->rev, prg->lev, |
331 | dist, prg->num); | |
9f1e1b50 | 332 | mempool_free(pmboxq, phba->mbox_mem_pool); |
97207482 JS |
333 | return; |
334 | } | |
335 | ||
0558056c JS |
336 | /** |
337 | * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname, | |
338 | * cfg_soft_wwnn, cfg_soft_wwpn | |
339 | * @vport: pointer to lpfc vport data structure. | |
340 | * | |
341 | * | |
342 | * Return codes | |
343 | * None. | |
344 | **/ | |
345 | void | |
346 | lpfc_update_vport_wwn(struct lpfc_vport *vport) | |
347 | { | |
aeb3c817 JS |
348 | uint8_t vvvl = vport->fc_sparam.cmn.valid_vendor_ver_level; |
349 | u32 *fawwpn_key = (u32 *)&vport->fc_sparam.un.vendorVersion[0]; | |
350 | ||
0558056c JS |
351 | /* If the soft name exists then update it using the service params */ |
352 | if (vport->phba->cfg_soft_wwnn) | |
353 | u64_to_wwn(vport->phba->cfg_soft_wwnn, | |
354 | vport->fc_sparam.nodeName.u.wwn); | |
355 | if (vport->phba->cfg_soft_wwpn) | |
356 | u64_to_wwn(vport->phba->cfg_soft_wwpn, | |
357 | vport->fc_sparam.portName.u.wwn); | |
358 | ||
359 | /* | |
360 | * If the name is empty or there exists a soft name | |
361 | * then copy the service params name, otherwise use the fc name | |
362 | */ | |
363 | if (vport->fc_nodename.u.wwn[0] == 0 || vport->phba->cfg_soft_wwnn) | |
364 | memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName, | |
365 | sizeof(struct lpfc_name)); | |
366 | else | |
367 | memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename, | |
368 | sizeof(struct lpfc_name)); | |
369 | ||
aeb3c817 JS |
370 | /* |
371 | * If the port name has changed, then set the Param changes flag | |
372 | * to unreg the login | |
373 | */ | |
374 | if (vport->fc_portname.u.wwn[0] != 0 && | |
375 | memcmp(&vport->fc_portname, &vport->fc_sparam.portName, | |
376 | sizeof(struct lpfc_name))) | |
377 | vport->vport_flag |= FAWWPN_PARAM_CHG; | |
378 | ||
379 | if (vport->fc_portname.u.wwn[0] == 0 || | |
380 | vport->phba->cfg_soft_wwpn || | |
381 | (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR) || | |
382 | vport->vport_flag & FAWWPN_SET) { | |
0558056c JS |
383 | memcpy(&vport->fc_portname, &vport->fc_sparam.portName, |
384 | sizeof(struct lpfc_name)); | |
aeb3c817 JS |
385 | vport->vport_flag &= ~FAWWPN_SET; |
386 | if (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR) | |
387 | vport->vport_flag |= FAWWPN_SET; | |
388 | } | |
0558056c JS |
389 | else |
390 | memcpy(&vport->fc_sparam.portName, &vport->fc_portname, | |
391 | sizeof(struct lpfc_name)); | |
392 | } | |
393 | ||
e59058c4 | 394 | /** |
3621a710 | 395 | * lpfc_config_port_post - Perform lpfc initialization after config port |
e59058c4 JS |
396 | * @phba: pointer to lpfc hba data structure. |
397 | * | |
398 | * This routine will do LPFC initialization after the CONFIG_PORT mailbox | |
399 | * command call. It performs all internal resource and state setups on the | |
400 | * port: post IOCB buffers, enable appropriate host interrupt attentions, | |
401 | * ELS ring timers, etc. | |
402 | * | |
403 | * Return codes | |
404 | * 0 - success. | |
405 | * Any other value - error. | |
406 | **/ | |
dea3101e | 407 | int |
2e0fef85 | 408 | lpfc_config_port_post(struct lpfc_hba *phba) |
dea3101e | 409 | { |
2e0fef85 | 410 | struct lpfc_vport *vport = phba->pport; |
a257bf90 | 411 | struct Scsi_Host *shost = lpfc_shost_from_vport(vport); |
dea3101e | 412 | LPFC_MBOXQ_t *pmb; |
413 | MAILBOX_t *mb; | |
414 | struct lpfc_dmabuf *mp; | |
415 | struct lpfc_sli *psli = &phba->sli; | |
416 | uint32_t status, timeout; | |
2e0fef85 JS |
417 | int i, j; |
418 | int rc; | |
dea3101e | 419 | |
7af67051 JS |
420 | spin_lock_irq(&phba->hbalock); |
421 | /* | |
422 | * If the Config port completed correctly the HBA is not | |
423 | * over heated any more. | |
424 | */ | |
425 | if (phba->over_temp_state == HBA_OVER_TEMP) | |
426 | phba->over_temp_state = HBA_NORMAL_TEMP; | |
427 | spin_unlock_irq(&phba->hbalock); | |
428 | ||
dea3101e | 429 | pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); |
430 | if (!pmb) { | |
2e0fef85 | 431 | phba->link_state = LPFC_HBA_ERROR; |
dea3101e | 432 | return -ENOMEM; |
433 | } | |
04c68496 | 434 | mb = &pmb->u.mb; |
dea3101e | 435 | |
dea3101e | 436 | /* Get login parameters for NID. */ |
9f1177a3 JS |
437 | rc = lpfc_read_sparam(phba, pmb, 0); |
438 | if (rc) { | |
439 | mempool_free(pmb, phba->mbox_mem_pool); | |
440 | return -ENOMEM; | |
441 | } | |
442 | ||
ed957684 | 443 | pmb->vport = vport; |
dea3101e | 444 | if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { |
ed957684 | 445 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
e8b62011 | 446 | "0448 Adapter failed init, mbxCmd x%x " |
dea3101e | 447 | "READ_SPARM mbxStatus x%x\n", |
dea3101e | 448 | mb->mbxCommand, mb->mbxStatus); |
2e0fef85 | 449 | phba->link_state = LPFC_HBA_ERROR; |
3e1f0718 | 450 | mp = (struct lpfc_dmabuf *)pmb->ctx_buf; |
9f1177a3 | 451 | mempool_free(pmb, phba->mbox_mem_pool); |
dea3101e | 452 | lpfc_mbuf_free(phba, mp->virt, mp->phys); |
453 | kfree(mp); | |
454 | return -EIO; | |
455 | } | |
456 | ||
3e1f0718 | 457 | mp = (struct lpfc_dmabuf *)pmb->ctx_buf; |
dea3101e | 458 | |
2e0fef85 | 459 | memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm)); |
dea3101e | 460 | lpfc_mbuf_free(phba, mp->virt, mp->phys); |
461 | kfree(mp); | |
3e1f0718 | 462 | pmb->ctx_buf = NULL; |
0558056c | 463 | lpfc_update_vport_wwn(vport); |
a257bf90 JS |
464 | |
465 | /* Update the fc_host data structures with new wwn. */ | |
466 | fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn); | |
467 | fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn); | |
21e9a0a5 | 468 | fc_host_max_npiv_vports(shost) = phba->max_vpi; |
a257bf90 | 469 | |
dea3101e | 470 | /* If no serial number in VPD data, use low 6 bytes of WWNN */ |
471 | /* This should be consolidated into parse_vpd ? - mr */ | |
472 | if (phba->SerialNumber[0] == 0) { | |
473 | uint8_t *outptr; | |
474 | ||
2e0fef85 | 475 | outptr = &vport->fc_nodename.u.s.IEEE[0]; |
dea3101e | 476 | for (i = 0; i < 12; i++) { |
477 | status = *outptr++; | |
478 | j = ((status & 0xf0) >> 4); | |
479 | if (j <= 9) | |
480 | phba->SerialNumber[i] = | |
481 | (char)((uint8_t) 0x30 + (uint8_t) j); | |
482 | else | |
483 | phba->SerialNumber[i] = | |
484 | (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); | |
485 | i++; | |
486 | j = (status & 0xf); | |
487 | if (j <= 9) | |
488 | phba->SerialNumber[i] = | |
489 | (char)((uint8_t) 0x30 + (uint8_t) j); | |
490 | else | |
491 | phba->SerialNumber[i] = | |
492 | (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); | |
493 | } | |
494 | } | |
495 | ||
dea3101e | 496 | lpfc_read_config(phba, pmb); |
ed957684 | 497 | pmb->vport = vport; |
dea3101e | 498 | if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { |
ed957684 | 499 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
e8b62011 | 500 | "0453 Adapter failed to init, mbxCmd x%x " |
dea3101e | 501 | "READ_CONFIG, mbxStatus x%x\n", |
dea3101e | 502 | mb->mbxCommand, mb->mbxStatus); |
2e0fef85 | 503 | phba->link_state = LPFC_HBA_ERROR; |
dea3101e | 504 | mempool_free( pmb, phba->mbox_mem_pool); |
505 | return -EIO; | |
506 | } | |
507 | ||
a0c87cbd JS |
508 | /* Check if the port is disabled */ |
509 | lpfc_sli_read_link_ste(phba); | |
510 | ||
dea3101e | 511 | /* Reset the DFT_HBA_Q_DEPTH to the max xri */ |
572709e2 JS |
512 | i = (mb->un.varRdConfig.max_xri + 1); |
513 | if (phba->cfg_hba_queue_depth > i) { | |
514 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
515 | "3359 HBA queue depth changed from %d to %d\n", | |
516 | phba->cfg_hba_queue_depth, i); | |
517 | phba->cfg_hba_queue_depth = i; | |
518 | } | |
519 | ||
520 | /* Reset the DFT_LUN_Q_DEPTH to (max xri >> 3) */ | |
521 | i = (mb->un.varRdConfig.max_xri >> 3); | |
522 | if (phba->pport->cfg_lun_queue_depth > i) { | |
523 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
524 | "3360 LUN queue depth changed from %d to %d\n", | |
525 | phba->pport->cfg_lun_queue_depth, i); | |
526 | phba->pport->cfg_lun_queue_depth = i; | |
527 | } | |
dea3101e | 528 | |
529 | phba->lmt = mb->un.varRdConfig.lmt; | |
74b72a59 JW |
530 | |
531 | /* Get the default values for Model Name and Description */ | |
532 | lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); | |
533 | ||
2e0fef85 | 534 | phba->link_state = LPFC_LINK_DOWN; |
dea3101e | 535 | |
0b727fea | 536 | /* Only process IOCBs on ELS ring till hba_state is READY */ |
895427bd JS |
537 | if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr) |
538 | psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT; | |
539 | if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr) | |
540 | psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT; | |
dea3101e | 541 | |
542 | /* Post receive buffers for desired rings */ | |
ed957684 JS |
543 | if (phba->sli_rev != 3) |
544 | lpfc_post_rcv_buf(phba); | |
dea3101e | 545 | |
9399627f JS |
546 | /* |
547 | * Configure HBA MSI-X attention conditions to messages if MSI-X mode | |
548 | */ | |
549 | if (phba->intr_type == MSIX) { | |
550 | rc = lpfc_config_msi(phba, pmb); | |
551 | if (rc) { | |
552 | mempool_free(pmb, phba->mbox_mem_pool); | |
553 | return -EIO; | |
554 | } | |
555 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); | |
556 | if (rc != MBX_SUCCESS) { | |
557 | lpfc_printf_log(phba, KERN_ERR, LOG_MBOX, | |
558 | "0352 Config MSI mailbox command " | |
559 | "failed, mbxCmd x%x, mbxStatus x%x\n", | |
04c68496 JS |
560 | pmb->u.mb.mbxCommand, |
561 | pmb->u.mb.mbxStatus); | |
9399627f JS |
562 | mempool_free(pmb, phba->mbox_mem_pool); |
563 | return -EIO; | |
564 | } | |
565 | } | |
566 | ||
04c68496 | 567 | spin_lock_irq(&phba->hbalock); |
9399627f JS |
568 | /* Initialize ERATT handling flag */ |
569 | phba->hba_flag &= ~HBA_ERATT_HANDLED; | |
570 | ||
dea3101e | 571 | /* Enable appropriate host interrupts */ |
9940b97b JS |
572 | if (lpfc_readl(phba->HCregaddr, &status)) { |
573 | spin_unlock_irq(&phba->hbalock); | |
574 | return -EIO; | |
575 | } | |
dea3101e | 576 | status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA; |
577 | if (psli->num_rings > 0) | |
578 | status |= HC_R0INT_ENA; | |
579 | if (psli->num_rings > 1) | |
580 | status |= HC_R1INT_ENA; | |
581 | if (psli->num_rings > 2) | |
582 | status |= HC_R2INT_ENA; | |
583 | if (psli->num_rings > 3) | |
584 | status |= HC_R3INT_ENA; | |
585 | ||
875fbdfe JSEC |
586 | if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) && |
587 | (phba->cfg_poll & DISABLE_FCP_RING_INT)) | |
9399627f | 588 | status &= ~(HC_R0INT_ENA); |
875fbdfe | 589 | |
dea3101e | 590 | writel(status, phba->HCregaddr); |
591 | readl(phba->HCregaddr); /* flush */ | |
2e0fef85 | 592 | spin_unlock_irq(&phba->hbalock); |
dea3101e | 593 | |
9399627f JS |
594 | /* Set up ring-0 (ELS) timer */ |
595 | timeout = phba->fc_ratov * 2; | |
256ec0d0 JS |
596 | mod_timer(&vport->els_tmofunc, |
597 | jiffies + msecs_to_jiffies(1000 * timeout)); | |
9399627f | 598 | /* Set up heart beat (HB) timer */ |
256ec0d0 JS |
599 | mod_timer(&phba->hb_tmofunc, |
600 | jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL)); | |
858c9f6c JS |
601 | phba->hb_outstanding = 0; |
602 | phba->last_completion_time = jiffies; | |
9399627f | 603 | /* Set up error attention (ERATT) polling timer */ |
256ec0d0 | 604 | mod_timer(&phba->eratt_poll, |
65791f1f | 605 | jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval)); |
dea3101e | 606 | |
a0c87cbd JS |
607 | if (phba->hba_flag & LINK_DISABLED) { |
608 | lpfc_printf_log(phba, | |
609 | KERN_ERR, LOG_INIT, | |
610 | "2598 Adapter Link is disabled.\n"); | |
611 | lpfc_down_link(phba, pmb); | |
612 | pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; | |
613 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); | |
614 | if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) { | |
615 | lpfc_printf_log(phba, | |
616 | KERN_ERR, LOG_INIT, | |
617 | "2599 Adapter failed to issue DOWN_LINK" | |
618 | " mbox command rc 0x%x\n", rc); | |
619 | ||
620 | mempool_free(pmb, phba->mbox_mem_pool); | |
621 | return -EIO; | |
622 | } | |
e40a02c1 | 623 | } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) { |
026abb87 JS |
624 | mempool_free(pmb, phba->mbox_mem_pool); |
625 | rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT); | |
626 | if (rc) | |
627 | return rc; | |
dea3101e | 628 | } |
629 | /* MBOX buffer will be freed in mbox compl */ | |
57127f15 | 630 | pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); |
9f1177a3 JS |
631 | if (!pmb) { |
632 | phba->link_state = LPFC_HBA_ERROR; | |
633 | return -ENOMEM; | |
634 | } | |
635 | ||
57127f15 JS |
636 | lpfc_config_async(phba, pmb, LPFC_ELS_RING); |
637 | pmb->mbox_cmpl = lpfc_config_async_cmpl; | |
638 | pmb->vport = phba->pport; | |
639 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); | |
dea3101e | 640 | |
57127f15 JS |
641 | if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { |
642 | lpfc_printf_log(phba, | |
643 | KERN_ERR, | |
644 | LOG_INIT, | |
645 | "0456 Adapter failed to issue " | |
e4e74273 | 646 | "ASYNCEVT_ENABLE mbox status x%x\n", |
57127f15 JS |
647 | rc); |
648 | mempool_free(pmb, phba->mbox_mem_pool); | |
649 | } | |
97207482 JS |
650 | |
651 | /* Get Option rom version */ | |
652 | pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); | |
9f1177a3 JS |
653 | if (!pmb) { |
654 | phba->link_state = LPFC_HBA_ERROR; | |
655 | return -ENOMEM; | |
656 | } | |
657 | ||
97207482 JS |
658 | lpfc_dump_wakeup_param(phba, pmb); |
659 | pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl; | |
660 | pmb->vport = phba->pport; | |
661 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); | |
662 | ||
663 | if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { | |
664 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "0435 Adapter failed " | |
e4e74273 | 665 | "to get Option ROM version status x%x\n", rc); |
97207482 JS |
666 | mempool_free(pmb, phba->mbox_mem_pool); |
667 | } | |
668 | ||
d7c255b2 | 669 | return 0; |
ce8b3ce5 JS |
670 | } |
671 | ||
84d1b006 JS |
672 | /** |
673 | * lpfc_hba_init_link - Initialize the FC link | |
674 | * @phba: pointer to lpfc hba data structure. | |
6e7288d9 | 675 | * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT |
84d1b006 JS |
676 | * |
677 | * This routine will issue the INIT_LINK mailbox command call. | |
678 | * It is available to other drivers through the lpfc_hba data | |
679 | * structure for use as a delayed link up mechanism with the | |
680 | * module parameter lpfc_suppress_link_up. | |
681 | * | |
682 | * Return code | |
683 | * 0 - success | |
684 | * Any other value - error | |
685 | **/ | |
e399b228 | 686 | static int |
6e7288d9 | 687 | lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag) |
1b51197d JS |
688 | { |
689 | return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag); | |
690 | } | |
691 | ||
692 | /** | |
693 | * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology | |
694 | * @phba: pointer to lpfc hba data structure. | |
695 | * @fc_topology: desired fc topology. | |
696 | * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT | |
697 | * | |
698 | * This routine will issue the INIT_LINK mailbox command call. | |
699 | * It is available to other drivers through the lpfc_hba data | |
700 | * structure for use as a delayed link up mechanism with the | |
701 | * module parameter lpfc_suppress_link_up. | |
702 | * | |
703 | * Return code | |
704 | * 0 - success | |
705 | * Any other value - error | |
706 | **/ | |
707 | int | |
708 | lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology, | |
709 | uint32_t flag) | |
84d1b006 JS |
710 | { |
711 | struct lpfc_vport *vport = phba->pport; | |
712 | LPFC_MBOXQ_t *pmb; | |
713 | MAILBOX_t *mb; | |
714 | int rc; | |
715 | ||
716 | pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); | |
717 | if (!pmb) { | |
718 | phba->link_state = LPFC_HBA_ERROR; | |
719 | return -ENOMEM; | |
720 | } | |
721 | mb = &pmb->u.mb; | |
722 | pmb->vport = vport; | |
723 | ||
026abb87 JS |
724 | if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) || |
725 | ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) && | |
726 | !(phba->lmt & LMT_1Gb)) || | |
727 | ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) && | |
728 | !(phba->lmt & LMT_2Gb)) || | |
729 | ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) && | |
730 | !(phba->lmt & LMT_4Gb)) || | |
731 | ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) && | |
732 | !(phba->lmt & LMT_8Gb)) || | |
733 | ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) && | |
734 | !(phba->lmt & LMT_10Gb)) || | |
735 | ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) && | |
d38dd52c JS |
736 | !(phba->lmt & LMT_16Gb)) || |
737 | ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) && | |
fbd8a6ba JS |
738 | !(phba->lmt & LMT_32Gb)) || |
739 | ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_64G) && | |
740 | !(phba->lmt & LMT_64Gb))) { | |
026abb87 JS |
741 | /* Reset link speed to auto */ |
742 | lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT, | |
743 | "1302 Invalid speed for this board:%d " | |
744 | "Reset link speed to auto.\n", | |
745 | phba->cfg_link_speed); | |
746 | phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO; | |
747 | } | |
1b51197d | 748 | lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed); |
84d1b006 | 749 | pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; |
1b51197d JS |
750 | if (phba->sli_rev < LPFC_SLI_REV4) |
751 | lpfc_set_loopback_flag(phba); | |
6e7288d9 | 752 | rc = lpfc_sli_issue_mbox(phba, pmb, flag); |
76a95d75 | 753 | if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { |
84d1b006 JS |
754 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
755 | "0498 Adapter failed to init, mbxCmd x%x " | |
756 | "INIT_LINK, mbxStatus x%x\n", | |
757 | mb->mbxCommand, mb->mbxStatus); | |
76a95d75 JS |
758 | if (phba->sli_rev <= LPFC_SLI_REV3) { |
759 | /* Clear all interrupt enable conditions */ | |
760 | writel(0, phba->HCregaddr); | |
761 | readl(phba->HCregaddr); /* flush */ | |
762 | /* Clear all pending interrupts */ | |
763 | writel(0xffffffff, phba->HAregaddr); | |
764 | readl(phba->HAregaddr); /* flush */ | |
765 | } | |
84d1b006 | 766 | phba->link_state = LPFC_HBA_ERROR; |
6e7288d9 | 767 | if (rc != MBX_BUSY || flag == MBX_POLL) |
84d1b006 JS |
768 | mempool_free(pmb, phba->mbox_mem_pool); |
769 | return -EIO; | |
770 | } | |
e40a02c1 | 771 | phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK; |
6e7288d9 JS |
772 | if (flag == MBX_POLL) |
773 | mempool_free(pmb, phba->mbox_mem_pool); | |
84d1b006 JS |
774 | |
775 | return 0; | |
776 | } | |
777 | ||
778 | /** | |
779 | * lpfc_hba_down_link - this routine downs the FC link | |
6e7288d9 JS |
780 | * @phba: pointer to lpfc hba data structure. |
781 | * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT | |
84d1b006 JS |
782 | * |
783 | * This routine will issue the DOWN_LINK mailbox command call. | |
784 | * It is available to other drivers through the lpfc_hba data | |
785 | * structure for use to stop the link. | |
786 | * | |
787 | * Return code | |
788 | * 0 - success | |
789 | * Any other value - error | |
790 | **/ | |
e399b228 | 791 | static int |
6e7288d9 | 792 | lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag) |
84d1b006 JS |
793 | { |
794 | LPFC_MBOXQ_t *pmb; | |
795 | int rc; | |
796 | ||
797 | pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); | |
798 | if (!pmb) { | |
799 | phba->link_state = LPFC_HBA_ERROR; | |
800 | return -ENOMEM; | |
801 | } | |
802 | ||
803 | lpfc_printf_log(phba, | |
804 | KERN_ERR, LOG_INIT, | |
805 | "0491 Adapter Link is disabled.\n"); | |
806 | lpfc_down_link(phba, pmb); | |
807 | pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; | |
6e7288d9 | 808 | rc = lpfc_sli_issue_mbox(phba, pmb, flag); |
84d1b006 JS |
809 | if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) { |
810 | lpfc_printf_log(phba, | |
811 | KERN_ERR, LOG_INIT, | |
812 | "2522 Adapter failed to issue DOWN_LINK" | |
813 | " mbox command rc 0x%x\n", rc); | |
814 | ||
815 | mempool_free(pmb, phba->mbox_mem_pool); | |
816 | return -EIO; | |
817 | } | |
6e7288d9 JS |
818 | if (flag == MBX_POLL) |
819 | mempool_free(pmb, phba->mbox_mem_pool); | |
820 | ||
84d1b006 JS |
821 | return 0; |
822 | } | |
823 | ||
e59058c4 | 824 | /** |
3621a710 | 825 | * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset |
e59058c4 JS |
826 | * @phba: pointer to lpfc HBA data structure. |
827 | * | |
828 | * This routine will do LPFC uninitialization before the HBA is reset when | |
829 | * bringing down the SLI Layer. | |
830 | * | |
831 | * Return codes | |
832 | * 0 - success. | |
833 | * Any other value - error. | |
834 | **/ | |
dea3101e | 835 | int |
2e0fef85 | 836 | lpfc_hba_down_prep(struct lpfc_hba *phba) |
dea3101e | 837 | { |
1b32f6aa JS |
838 | struct lpfc_vport **vports; |
839 | int i; | |
3772a991 JS |
840 | |
841 | if (phba->sli_rev <= LPFC_SLI_REV3) { | |
842 | /* Disable interrupts */ | |
843 | writel(0, phba->HCregaddr); | |
844 | readl(phba->HCregaddr); /* flush */ | |
845 | } | |
dea3101e | 846 | |
1b32f6aa JS |
847 | if (phba->pport->load_flag & FC_UNLOADING) |
848 | lpfc_cleanup_discovery_resources(phba->pport); | |
849 | else { | |
850 | vports = lpfc_create_vport_work_array(phba); | |
851 | if (vports != NULL) | |
3772a991 JS |
852 | for (i = 0; i <= phba->max_vports && |
853 | vports[i] != NULL; i++) | |
1b32f6aa JS |
854 | lpfc_cleanup_discovery_resources(vports[i]); |
855 | lpfc_destroy_vport_work_array(phba, vports); | |
7f5f3d0d JS |
856 | } |
857 | return 0; | |
dea3101e | 858 | } |
859 | ||
68e814f5 JS |
860 | /** |
861 | * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free | |
862 | * rspiocb which got deferred | |
863 | * | |
864 | * @phba: pointer to lpfc HBA data structure. | |
865 | * | |
866 | * This routine will cleanup completed slow path events after HBA is reset | |
867 | * when bringing down the SLI Layer. | |
868 | * | |
869 | * | |
870 | * Return codes | |
871 | * void. | |
872 | **/ | |
873 | static void | |
874 | lpfc_sli4_free_sp_events(struct lpfc_hba *phba) | |
875 | { | |
876 | struct lpfc_iocbq *rspiocbq; | |
877 | struct hbq_dmabuf *dmabuf; | |
878 | struct lpfc_cq_event *cq_event; | |
879 | ||
880 | spin_lock_irq(&phba->hbalock); | |
881 | phba->hba_flag &= ~HBA_SP_QUEUE_EVT; | |
882 | spin_unlock_irq(&phba->hbalock); | |
883 | ||
884 | while (!list_empty(&phba->sli4_hba.sp_queue_event)) { | |
885 | /* Get the response iocb from the head of work queue */ | |
886 | spin_lock_irq(&phba->hbalock); | |
887 | list_remove_head(&phba->sli4_hba.sp_queue_event, | |
888 | cq_event, struct lpfc_cq_event, list); | |
889 | spin_unlock_irq(&phba->hbalock); | |
890 | ||
891 | switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) { | |
892 | case CQE_CODE_COMPL_WQE: | |
893 | rspiocbq = container_of(cq_event, struct lpfc_iocbq, | |
894 | cq_event); | |
895 | lpfc_sli_release_iocbq(phba, rspiocbq); | |
896 | break; | |
897 | case CQE_CODE_RECEIVE: | |
898 | case CQE_CODE_RECEIVE_V1: | |
899 | dmabuf = container_of(cq_event, struct hbq_dmabuf, | |
900 | cq_event); | |
901 | lpfc_in_buf_free(phba, &dmabuf->dbuf); | |
902 | } | |
903 | } | |
904 | } | |
905 | ||
e59058c4 | 906 | /** |
bcece5f5 | 907 | * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset |
e59058c4 JS |
908 | * @phba: pointer to lpfc HBA data structure. |
909 | * | |
bcece5f5 JS |
910 | * This routine will cleanup posted ELS buffers after the HBA is reset |
911 | * when bringing down the SLI Layer. | |
912 | * | |
e59058c4 JS |
913 | * |
914 | * Return codes | |
bcece5f5 | 915 | * void. |
e59058c4 | 916 | **/ |
bcece5f5 JS |
917 | static void |
918 | lpfc_hba_free_post_buf(struct lpfc_hba *phba) | |
41415862 JW |
919 | { |
920 | struct lpfc_sli *psli = &phba->sli; | |
921 | struct lpfc_sli_ring *pring; | |
922 | struct lpfc_dmabuf *mp, *next_mp; | |
07eab624 JS |
923 | LIST_HEAD(buflist); |
924 | int count; | |
41415862 | 925 | |
92d7f7b0 JS |
926 | if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) |
927 | lpfc_sli_hbqbuf_free_all(phba); | |
928 | else { | |
929 | /* Cleanup preposted buffers on the ELS ring */ | |
895427bd | 930 | pring = &psli->sli3_ring[LPFC_ELS_RING]; |
07eab624 JS |
931 | spin_lock_irq(&phba->hbalock); |
932 | list_splice_init(&pring->postbufq, &buflist); | |
933 | spin_unlock_irq(&phba->hbalock); | |
934 | ||
935 | count = 0; | |
936 | list_for_each_entry_safe(mp, next_mp, &buflist, list) { | |
92d7f7b0 | 937 | list_del(&mp->list); |
07eab624 | 938 | count++; |
92d7f7b0 JS |
939 | lpfc_mbuf_free(phba, mp->virt, mp->phys); |
940 | kfree(mp); | |
941 | } | |
07eab624 JS |
942 | |
943 | spin_lock_irq(&phba->hbalock); | |
944 | pring->postbufq_cnt -= count; | |
bcece5f5 | 945 | spin_unlock_irq(&phba->hbalock); |
41415862 | 946 | } |
bcece5f5 JS |
947 | } |
948 | ||
949 | /** | |
950 | * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset | |
951 | * @phba: pointer to lpfc HBA data structure. | |
952 | * | |
953 | * This routine will cleanup the txcmplq after the HBA is reset when bringing | |
954 | * down the SLI Layer. | |
955 | * | |
956 | * Return codes | |
957 | * void | |
958 | **/ | |
959 | static void | |
960 | lpfc_hba_clean_txcmplq(struct lpfc_hba *phba) | |
961 | { | |
962 | struct lpfc_sli *psli = &phba->sli; | |
895427bd | 963 | struct lpfc_queue *qp = NULL; |
bcece5f5 JS |
964 | struct lpfc_sli_ring *pring; |
965 | LIST_HEAD(completions); | |
966 | int i; | |
c1dd9111 | 967 | struct lpfc_iocbq *piocb, *next_iocb; |
bcece5f5 | 968 | |
895427bd JS |
969 | if (phba->sli_rev != LPFC_SLI_REV4) { |
970 | for (i = 0; i < psli->num_rings; i++) { | |
971 | pring = &psli->sli3_ring[i]; | |
bcece5f5 | 972 | spin_lock_irq(&phba->hbalock); |
895427bd JS |
973 | /* At this point in time the HBA is either reset or DOA |
974 | * Nothing should be on txcmplq as it will | |
975 | * NEVER complete. | |
976 | */ | |
977 | list_splice_init(&pring->txcmplq, &completions); | |
978 | pring->txcmplq_cnt = 0; | |
bcece5f5 | 979 | spin_unlock_irq(&phba->hbalock); |
09372820 | 980 | |
895427bd JS |
981 | lpfc_sli_abort_iocb_ring(phba, pring); |
982 | } | |
a257bf90 | 983 | /* Cancel all the IOCBs from the completions list */ |
895427bd JS |
984 | lpfc_sli_cancel_iocbs(phba, &completions, |
985 | IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED); | |
986 | return; | |
987 | } | |
988 | list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) { | |
989 | pring = qp->pring; | |
990 | if (!pring) | |
991 | continue; | |
992 | spin_lock_irq(&pring->ring_lock); | |
c1dd9111 JS |
993 | list_for_each_entry_safe(piocb, next_iocb, |
994 | &pring->txcmplq, list) | |
995 | piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ; | |
895427bd JS |
996 | list_splice_init(&pring->txcmplq, &completions); |
997 | pring->txcmplq_cnt = 0; | |
998 | spin_unlock_irq(&pring->ring_lock); | |
41415862 JW |
999 | lpfc_sli_abort_iocb_ring(phba, pring); |
1000 | } | |
895427bd JS |
1001 | /* Cancel all the IOCBs from the completions list */ |
1002 | lpfc_sli_cancel_iocbs(phba, &completions, | |
1003 | IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED); | |
bcece5f5 | 1004 | } |
41415862 | 1005 | |
bcece5f5 JS |
1006 | /** |
1007 | * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset | |
1008 | int i; | |
1009 | * @phba: pointer to lpfc HBA data structure. | |
1010 | * | |
1011 | * This routine will do uninitialization after the HBA is reset when bring | |
1012 | * down the SLI Layer. | |
1013 | * | |
1014 | * Return codes | |
1015 | * 0 - success. | |
1016 | * Any other value - error. | |
1017 | **/ | |
1018 | static int | |
1019 | lpfc_hba_down_post_s3(struct lpfc_hba *phba) | |
1020 | { | |
1021 | lpfc_hba_free_post_buf(phba); | |
1022 | lpfc_hba_clean_txcmplq(phba); | |
41415862 JW |
1023 | return 0; |
1024 | } | |
5af5eee7 | 1025 | |
da0436e9 JS |
1026 | /** |
1027 | * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset | |
1028 | * @phba: pointer to lpfc HBA data structure. | |
1029 | * | |
1030 | * This routine will do uninitialization after the HBA is reset when bring | |
1031 | * down the SLI Layer. | |
1032 | * | |
1033 | * Return codes | |
af901ca1 | 1034 | * 0 - success. |
da0436e9 JS |
1035 | * Any other value - error. |
1036 | **/ | |
1037 | static int | |
1038 | lpfc_hba_down_post_s4(struct lpfc_hba *phba) | |
1039 | { | |
1040 | struct lpfc_scsi_buf *psb, *psb_next; | |
86c67379 | 1041 | struct lpfc_nvmet_rcv_ctx *ctxp, *ctxp_next; |
da0436e9 | 1042 | LIST_HEAD(aborts); |
895427bd | 1043 | LIST_HEAD(nvme_aborts); |
86c67379 | 1044 | LIST_HEAD(nvmet_aborts); |
da0436e9 | 1045 | unsigned long iflag = 0; |
0f65ff68 | 1046 | struct lpfc_sglq *sglq_entry = NULL; |
cf1a1d3e | 1047 | int cnt; |
0f65ff68 | 1048 | |
895427bd JS |
1049 | |
1050 | lpfc_sli_hbqbuf_free_all(phba); | |
bcece5f5 JS |
1051 | lpfc_hba_clean_txcmplq(phba); |
1052 | ||
da0436e9 JS |
1053 | /* At this point in time the HBA is either reset or DOA. Either |
1054 | * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be | |
895427bd | 1055 | * on the lpfc_els_sgl_list so that it can either be freed if the |
da0436e9 JS |
1056 | * driver is unloading or reposted if the driver is restarting |
1057 | * the port. | |
1058 | */ | |
895427bd | 1059 | spin_lock_irq(&phba->hbalock); /* required for lpfc_els_sgl_list and */ |
da0436e9 | 1060 | /* scsl_buf_list */ |
895427bd | 1061 | /* sgl_list_lock required because worker thread uses this |
da0436e9 JS |
1062 | * list. |
1063 | */ | |
895427bd | 1064 | spin_lock(&phba->sli4_hba.sgl_list_lock); |
0f65ff68 JS |
1065 | list_for_each_entry(sglq_entry, |
1066 | &phba->sli4_hba.lpfc_abts_els_sgl_list, list) | |
1067 | sglq_entry->state = SGL_FREED; | |
1068 | ||
da0436e9 | 1069 | list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list, |
895427bd JS |
1070 | &phba->sli4_hba.lpfc_els_sgl_list); |
1071 | ||
f358dd0c | 1072 | |
895427bd | 1073 | spin_unlock(&phba->sli4_hba.sgl_list_lock); |
da0436e9 JS |
1074 | /* abts_scsi_buf_list_lock required because worker thread uses this |
1075 | * list. | |
1076 | */ | |
895427bd JS |
1077 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) { |
1078 | spin_lock(&phba->sli4_hba.abts_scsi_buf_list_lock); | |
1079 | list_splice_init(&phba->sli4_hba.lpfc_abts_scsi_buf_list, | |
1080 | &aborts); | |
1081 | spin_unlock(&phba->sli4_hba.abts_scsi_buf_list_lock); | |
1082 | } | |
1083 | ||
1084 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
1085 | spin_lock(&phba->sli4_hba.abts_nvme_buf_list_lock); | |
1086 | list_splice_init(&phba->sli4_hba.lpfc_abts_nvme_buf_list, | |
1087 | &nvme_aborts); | |
86c67379 JS |
1088 | list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list, |
1089 | &nvmet_aborts); | |
895427bd JS |
1090 | spin_unlock(&phba->sli4_hba.abts_nvme_buf_list_lock); |
1091 | } | |
1092 | ||
da0436e9 JS |
1093 | spin_unlock_irq(&phba->hbalock); |
1094 | ||
0794d601 JS |
1095 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) { |
1096 | list_for_each_entry_safe(psb, psb_next, &aborts, list) { | |
1097 | psb->pCmd = NULL; | |
1098 | psb->status = IOSTAT_SUCCESS; | |
1099 | } | |
1100 | spin_lock_irqsave(&phba->common_buf_list_put_lock, iflag); | |
1101 | list_splice(&aborts, &phba->lpfc_common_buf_list_put); | |
1102 | spin_unlock_irqrestore(&phba->common_buf_list_put_lock, iflag); | |
da0436e9 | 1103 | } |
68e814f5 | 1104 | |
86c67379 | 1105 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { |
cf1a1d3e | 1106 | cnt = 0; |
86c67379 JS |
1107 | list_for_each_entry_safe(psb, psb_next, &nvme_aborts, list) { |
1108 | psb->pCmd = NULL; | |
1109 | psb->status = IOSTAT_SUCCESS; | |
cf1a1d3e | 1110 | cnt++; |
86c67379 | 1111 | } |
0794d601 JS |
1112 | spin_lock_irqsave(&phba->common_buf_list_put_lock, iflag); |
1113 | phba->put_common_bufs += cnt; | |
1114 | list_splice(&nvme_aborts, &phba->lpfc_common_buf_list_put); | |
1115 | spin_unlock_irqrestore(&phba->common_buf_list_put_lock, iflag); | |
86c67379 JS |
1116 | |
1117 | list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) { | |
1118 | ctxp->flag &= ~(LPFC_NVMET_XBUSY | LPFC_NVMET_ABORT_OP); | |
6c621a22 | 1119 | lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf); |
86c67379 | 1120 | } |
895427bd | 1121 | } |
895427bd | 1122 | |
68e814f5 | 1123 | lpfc_sli4_free_sp_events(phba); |
da0436e9 JS |
1124 | return 0; |
1125 | } | |
1126 | ||
1127 | /** | |
1128 | * lpfc_hba_down_post - Wrapper func for hba down post routine | |
1129 | * @phba: pointer to lpfc HBA data structure. | |
1130 | * | |
1131 | * This routine wraps the actual SLI3 or SLI4 routine for performing | |
1132 | * uninitialization after the HBA is reset when bring down the SLI Layer. | |
1133 | * | |
1134 | * Return codes | |
af901ca1 | 1135 | * 0 - success. |
da0436e9 JS |
1136 | * Any other value - error. |
1137 | **/ | |
1138 | int | |
1139 | lpfc_hba_down_post(struct lpfc_hba *phba) | |
1140 | { | |
1141 | return (*phba->lpfc_hba_down_post)(phba); | |
1142 | } | |
41415862 | 1143 | |
e59058c4 | 1144 | /** |
3621a710 | 1145 | * lpfc_hb_timeout - The HBA-timer timeout handler |
e59058c4 JS |
1146 | * @ptr: unsigned long holds the pointer to lpfc hba data structure. |
1147 | * | |
1148 | * This is the HBA-timer timeout handler registered to the lpfc driver. When | |
1149 | * this timer fires, a HBA timeout event shall be posted to the lpfc driver | |
1150 | * work-port-events bitmap and the worker thread is notified. This timeout | |
1151 | * event will be used by the worker thread to invoke the actual timeout | |
1152 | * handler routine, lpfc_hb_timeout_handler. Any periodical operations will | |
1153 | * be performed in the timeout handler and the HBA timeout event bit shall | |
1154 | * be cleared by the worker thread after it has taken the event bitmap out. | |
1155 | **/ | |
a6ababd2 | 1156 | static void |
f22eb4d3 | 1157 | lpfc_hb_timeout(struct timer_list *t) |
858c9f6c JS |
1158 | { |
1159 | struct lpfc_hba *phba; | |
5e9d9b82 | 1160 | uint32_t tmo_posted; |
858c9f6c JS |
1161 | unsigned long iflag; |
1162 | ||
f22eb4d3 | 1163 | phba = from_timer(phba, t, hb_tmofunc); |
9399627f JS |
1164 | |
1165 | /* Check for heart beat timeout conditions */ | |
858c9f6c | 1166 | spin_lock_irqsave(&phba->pport->work_port_lock, iflag); |
5e9d9b82 JS |
1167 | tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO; |
1168 | if (!tmo_posted) | |
858c9f6c JS |
1169 | phba->pport->work_port_events |= WORKER_HB_TMO; |
1170 | spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag); | |
1171 | ||
9399627f | 1172 | /* Tell the worker thread there is work to do */ |
5e9d9b82 JS |
1173 | if (!tmo_posted) |
1174 | lpfc_worker_wake_up(phba); | |
858c9f6c JS |
1175 | return; |
1176 | } | |
1177 | ||
19ca7609 JS |
1178 | /** |
1179 | * lpfc_rrq_timeout - The RRQ-timer timeout handler | |
1180 | * @ptr: unsigned long holds the pointer to lpfc hba data structure. | |
1181 | * | |
1182 | * This is the RRQ-timer timeout handler registered to the lpfc driver. When | |
1183 | * this timer fires, a RRQ timeout event shall be posted to the lpfc driver | |
1184 | * work-port-events bitmap and the worker thread is notified. This timeout | |
1185 | * event will be used by the worker thread to invoke the actual timeout | |
1186 | * handler routine, lpfc_rrq_handler. Any periodical operations will | |
1187 | * be performed in the timeout handler and the RRQ timeout event bit shall | |
1188 | * be cleared by the worker thread after it has taken the event bitmap out. | |
1189 | **/ | |
1190 | static void | |
f22eb4d3 | 1191 | lpfc_rrq_timeout(struct timer_list *t) |
19ca7609 JS |
1192 | { |
1193 | struct lpfc_hba *phba; | |
19ca7609 JS |
1194 | unsigned long iflag; |
1195 | ||
f22eb4d3 | 1196 | phba = from_timer(phba, t, rrq_tmr); |
19ca7609 | 1197 | spin_lock_irqsave(&phba->pport->work_port_lock, iflag); |
06918ac5 JS |
1198 | if (!(phba->pport->load_flag & FC_UNLOADING)) |
1199 | phba->hba_flag |= HBA_RRQ_ACTIVE; | |
1200 | else | |
1201 | phba->hba_flag &= ~HBA_RRQ_ACTIVE; | |
19ca7609 | 1202 | spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag); |
06918ac5 JS |
1203 | |
1204 | if (!(phba->pport->load_flag & FC_UNLOADING)) | |
1205 | lpfc_worker_wake_up(phba); | |
19ca7609 JS |
1206 | } |
1207 | ||
e59058c4 | 1208 | /** |
3621a710 | 1209 | * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function |
e59058c4 JS |
1210 | * @phba: pointer to lpfc hba data structure. |
1211 | * @pmboxq: pointer to the driver internal queue element for mailbox command. | |
1212 | * | |
1213 | * This is the callback function to the lpfc heart-beat mailbox command. | |
1214 | * If configured, the lpfc driver issues the heart-beat mailbox command to | |
1215 | * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the | |
1216 | * heart-beat mailbox command is issued, the driver shall set up heart-beat | |
1217 | * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks | |
1218 | * heart-beat outstanding state. Once the mailbox command comes back and | |
1219 | * no error conditions detected, the heart-beat mailbox command timer is | |
1220 | * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding | |
1221 | * state is cleared for the next heart-beat. If the timer expired with the | |
1222 | * heart-beat outstanding state set, the driver will put the HBA offline. | |
1223 | **/ | |
858c9f6c JS |
1224 | static void |
1225 | lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq) | |
1226 | { | |
1227 | unsigned long drvr_flag; | |
1228 | ||
1229 | spin_lock_irqsave(&phba->hbalock, drvr_flag); | |
1230 | phba->hb_outstanding = 0; | |
1231 | spin_unlock_irqrestore(&phba->hbalock, drvr_flag); | |
1232 | ||
9399627f | 1233 | /* Check and reset heart-beat timer is necessary */ |
858c9f6c JS |
1234 | mempool_free(pmboxq, phba->mbox_mem_pool); |
1235 | if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) && | |
1236 | !(phba->link_state == LPFC_HBA_ERROR) && | |
51ef4c26 | 1237 | !(phba->pport->load_flag & FC_UNLOADING)) |
858c9f6c | 1238 | mod_timer(&phba->hb_tmofunc, |
256ec0d0 JS |
1239 | jiffies + |
1240 | msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL)); | |
858c9f6c JS |
1241 | return; |
1242 | } | |
1243 | ||
e59058c4 | 1244 | /** |
3621a710 | 1245 | * lpfc_hb_timeout_handler - The HBA-timer timeout handler |
e59058c4 JS |
1246 | * @phba: pointer to lpfc hba data structure. |
1247 | * | |
1248 | * This is the actual HBA-timer timeout handler to be invoked by the worker | |
1249 | * thread whenever the HBA timer fired and HBA-timeout event posted. This | |
1250 | * handler performs any periodic operations needed for the device. If such | |
1251 | * periodic event has already been attended to either in the interrupt handler | |
1252 | * or by processing slow-ring or fast-ring events within the HBA-timer | |
1253 | * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets | |
1254 | * the timer for the next timeout period. If lpfc heart-beat mailbox command | |
1255 | * is configured and there is no heart-beat mailbox command outstanding, a | |
1256 | * heart-beat mailbox is issued and timer set properly. Otherwise, if there | |
1257 | * has been a heart-beat mailbox command outstanding, the HBA shall be put | |
1258 | * to offline. | |
1259 | **/ | |
858c9f6c JS |
1260 | void |
1261 | lpfc_hb_timeout_handler(struct lpfc_hba *phba) | |
1262 | { | |
45ed1190 | 1263 | struct lpfc_vport **vports; |
858c9f6c | 1264 | LPFC_MBOXQ_t *pmboxq; |
0ff10d46 | 1265 | struct lpfc_dmabuf *buf_ptr; |
45ed1190 | 1266 | int retval, i; |
858c9f6c | 1267 | struct lpfc_sli *psli = &phba->sli; |
0ff10d46 | 1268 | LIST_HEAD(completions); |
0cf07f84 JS |
1269 | struct lpfc_queue *qp; |
1270 | unsigned long time_elapsed; | |
1271 | uint32_t tick_cqe, max_cqe, val; | |
1272 | uint64_t tot, data1, data2, data3; | |
66d7ce93 | 1273 | struct lpfc_nvmet_tgtport *tgtp; |
0cf07f84 | 1274 | struct lpfc_register reg_data; |
66a210ff JS |
1275 | struct nvme_fc_local_port *localport; |
1276 | struct lpfc_nvme_lport *lport; | |
1277 | struct lpfc_nvme_ctrl_stat *cstat; | |
0cf07f84 | 1278 | void __iomem *eqdreg = phba->sli4_hba.u.if_type2.EQDregaddr; |
858c9f6c | 1279 | |
45ed1190 JS |
1280 | vports = lpfc_create_vport_work_array(phba); |
1281 | if (vports != NULL) | |
4258e98e | 1282 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { |
45ed1190 | 1283 | lpfc_rcv_seq_check_edtov(vports[i]); |
4258e98e JS |
1284 | lpfc_fdmi_num_disc_check(vports[i]); |
1285 | } | |
45ed1190 JS |
1286 | lpfc_destroy_vport_work_array(phba, vports); |
1287 | ||
858c9f6c | 1288 | if ((phba->link_state == LPFC_HBA_ERROR) || |
51ef4c26 | 1289 | (phba->pport->load_flag & FC_UNLOADING) || |
858c9f6c JS |
1290 | (phba->pport->fc_flag & FC_OFFLINE_MODE)) |
1291 | return; | |
1292 | ||
0cf07f84 JS |
1293 | if (phba->cfg_auto_imax) { |
1294 | if (!phba->last_eqdelay_time) { | |
1295 | phba->last_eqdelay_time = jiffies; | |
1296 | goto skip_eqdelay; | |
1297 | } | |
1298 | time_elapsed = jiffies - phba->last_eqdelay_time; | |
1299 | phba->last_eqdelay_time = jiffies; | |
1300 | ||
1301 | tot = 0xffff; | |
1302 | /* Check outstanding IO count */ | |
1303 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
1304 | if (phba->nvmet_support) { | |
66d7ce93 DK |
1305 | tgtp = phba->targetport->private; |
1306 | /* Calculate outstanding IOs */ | |
1307 | tot = atomic_read(&tgtp->rcv_fcp_cmd_drop); | |
1308 | tot += atomic_read(&tgtp->xmt_fcp_release); | |
1309 | tot = atomic_read(&tgtp->rcv_fcp_cmd_in) - tot; | |
0cf07f84 | 1310 | } else { |
66a210ff JS |
1311 | localport = phba->pport->localport; |
1312 | if (!localport || !localport->private) | |
1313 | goto skip_eqdelay; | |
1314 | lport = (struct lpfc_nvme_lport *) | |
1315 | localport->private; | |
1316 | tot = 0; | |
1317 | for (i = 0; | |
1318 | i < phba->cfg_nvme_io_channel; i++) { | |
1319 | cstat = &lport->cstat[i]; | |
1320 | data1 = atomic_read( | |
1321 | &cstat->fc4NvmeInputRequests); | |
1322 | data2 = atomic_read( | |
1323 | &cstat->fc4NvmeOutputRequests); | |
1324 | data3 = atomic_read( | |
1325 | &cstat->fc4NvmeControlRequests); | |
1326 | tot += (data1 + data2 + data3); | |
1327 | tot -= atomic_read( | |
1328 | &cstat->fc4NvmeIoCmpls); | |
1329 | } | |
0cf07f84 JS |
1330 | } |
1331 | } | |
1332 | ||
1333 | /* Interrupts per sec per EQ */ | |
1334 | val = phba->cfg_fcp_imax / phba->io_channel_irqs; | |
1335 | tick_cqe = val / CONFIG_HZ; /* Per tick per EQ */ | |
1336 | ||
1337 | /* Assume 1 CQE/ISR, calc max CQEs allowed for time duration */ | |
1338 | max_cqe = time_elapsed * tick_cqe; | |
1339 | ||
1340 | for (i = 0; i < phba->io_channel_irqs; i++) { | |
1341 | /* Fast-path EQ */ | |
1342 | qp = phba->sli4_hba.hba_eq[i]; | |
1343 | if (!qp) | |
1344 | continue; | |
1345 | ||
1346 | /* Use no EQ delay if we don't have many outstanding | |
1347 | * IOs, or if we are only processing 1 CQE/ISR or less. | |
1348 | * Otherwise, assume we can process up to lpfc_fcp_imax | |
1349 | * interrupts per HBA. | |
1350 | */ | |
1351 | if (tot < LPFC_NODELAY_MAX_IO || | |
1352 | qp->EQ_cqe_cnt <= max_cqe) | |
1353 | val = 0; | |
1354 | else | |
1355 | val = phba->cfg_fcp_imax; | |
1356 | ||
1357 | if (phba->sli.sli_flag & LPFC_SLI_USE_EQDR) { | |
1358 | /* Use EQ Delay Register method */ | |
1359 | ||
1360 | /* Convert for EQ Delay register */ | |
1361 | if (val) { | |
1362 | /* First, interrupts per sec per EQ */ | |
1363 | val = phba->cfg_fcp_imax / | |
1364 | phba->io_channel_irqs; | |
1365 | ||
1366 | /* us delay between each interrupt */ | |
1367 | val = LPFC_SEC_TO_USEC / val; | |
1368 | } | |
1369 | if (val != qp->q_mode) { | |
1370 | reg_data.word0 = 0; | |
1371 | bf_set(lpfc_sliport_eqdelay_id, | |
1372 | ®_data, qp->queue_id); | |
1373 | bf_set(lpfc_sliport_eqdelay_delay, | |
1374 | ®_data, val); | |
1375 | writel(reg_data.word0, eqdreg); | |
1376 | } | |
1377 | } else { | |
1378 | /* Use mbox command method */ | |
1379 | if (val != qp->q_mode) | |
1380 | lpfc_modify_hba_eq_delay(phba, i, | |
1381 | 1, val); | |
1382 | } | |
1383 | ||
1384 | /* | |
1385 | * val is cfg_fcp_imax or 0 for mbox delay or us delay | |
1386 | * between interrupts for EQDR. | |
1387 | */ | |
1388 | qp->q_mode = val; | |
1389 | qp->EQ_cqe_cnt = 0; | |
1390 | } | |
1391 | } | |
1392 | ||
1393 | skip_eqdelay: | |
858c9f6c | 1394 | spin_lock_irq(&phba->pport->work_port_lock); |
858c9f6c | 1395 | |
256ec0d0 JS |
1396 | if (time_after(phba->last_completion_time + |
1397 | msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL), | |
1398 | jiffies)) { | |
858c9f6c JS |
1399 | spin_unlock_irq(&phba->pport->work_port_lock); |
1400 | if (!phba->hb_outstanding) | |
1401 | mod_timer(&phba->hb_tmofunc, | |
256ec0d0 JS |
1402 | jiffies + |
1403 | msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL)); | |
858c9f6c JS |
1404 | else |
1405 | mod_timer(&phba->hb_tmofunc, | |
256ec0d0 JS |
1406 | jiffies + |
1407 | msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT)); | |
858c9f6c JS |
1408 | return; |
1409 | } | |
1410 | spin_unlock_irq(&phba->pport->work_port_lock); | |
1411 | ||
0ff10d46 JS |
1412 | if (phba->elsbuf_cnt && |
1413 | (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) { | |
1414 | spin_lock_irq(&phba->hbalock); | |
1415 | list_splice_init(&phba->elsbuf, &completions); | |
1416 | phba->elsbuf_cnt = 0; | |
1417 | phba->elsbuf_prev_cnt = 0; | |
1418 | spin_unlock_irq(&phba->hbalock); | |
1419 | ||
1420 | while (!list_empty(&completions)) { | |
1421 | list_remove_head(&completions, buf_ptr, | |
1422 | struct lpfc_dmabuf, list); | |
1423 | lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys); | |
1424 | kfree(buf_ptr); | |
1425 | } | |
1426 | } | |
1427 | phba->elsbuf_prev_cnt = phba->elsbuf_cnt; | |
1428 | ||
858c9f6c | 1429 | /* If there is no heart beat outstanding, issue a heartbeat command */ |
13815c83 JS |
1430 | if (phba->cfg_enable_hba_heartbeat) { |
1431 | if (!phba->hb_outstanding) { | |
bc73905a JS |
1432 | if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) && |
1433 | (list_empty(&psli->mboxq))) { | |
1434 | pmboxq = mempool_alloc(phba->mbox_mem_pool, | |
1435 | GFP_KERNEL); | |
1436 | if (!pmboxq) { | |
1437 | mod_timer(&phba->hb_tmofunc, | |
1438 | jiffies + | |
256ec0d0 JS |
1439 | msecs_to_jiffies(1000 * |
1440 | LPFC_HB_MBOX_INTERVAL)); | |
bc73905a JS |
1441 | return; |
1442 | } | |
1443 | ||
1444 | lpfc_heart_beat(phba, pmboxq); | |
1445 | pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl; | |
1446 | pmboxq->vport = phba->pport; | |
1447 | retval = lpfc_sli_issue_mbox(phba, pmboxq, | |
1448 | MBX_NOWAIT); | |
1449 | ||
1450 | if (retval != MBX_BUSY && | |
1451 | retval != MBX_SUCCESS) { | |
1452 | mempool_free(pmboxq, | |
1453 | phba->mbox_mem_pool); | |
1454 | mod_timer(&phba->hb_tmofunc, | |
1455 | jiffies + | |
256ec0d0 JS |
1456 | msecs_to_jiffies(1000 * |
1457 | LPFC_HB_MBOX_INTERVAL)); | |
bc73905a JS |
1458 | return; |
1459 | } | |
1460 | phba->skipped_hb = 0; | |
1461 | phba->hb_outstanding = 1; | |
1462 | } else if (time_before_eq(phba->last_completion_time, | |
1463 | phba->skipped_hb)) { | |
1464 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
1465 | "2857 Last completion time not " | |
1466 | " updated in %d ms\n", | |
1467 | jiffies_to_msecs(jiffies | |
1468 | - phba->last_completion_time)); | |
1469 | } else | |
1470 | phba->skipped_hb = jiffies; | |
1471 | ||
858c9f6c | 1472 | mod_timer(&phba->hb_tmofunc, |
256ec0d0 JS |
1473 | jiffies + |
1474 | msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT)); | |
858c9f6c | 1475 | return; |
13815c83 JS |
1476 | } else { |
1477 | /* | |
1478 | * If heart beat timeout called with hb_outstanding set | |
dcf2a4e0 JS |
1479 | * we need to give the hb mailbox cmd a chance to |
1480 | * complete or TMO. | |
13815c83 | 1481 | */ |
dcf2a4e0 JS |
1482 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, |
1483 | "0459 Adapter heartbeat still out" | |
1484 | "standing:last compl time was %d ms.\n", | |
1485 | jiffies_to_msecs(jiffies | |
1486 | - phba->last_completion_time)); | |
1487 | mod_timer(&phba->hb_tmofunc, | |
256ec0d0 JS |
1488 | jiffies + |
1489 | msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT)); | |
858c9f6c | 1490 | } |
4258e98e JS |
1491 | } else { |
1492 | mod_timer(&phba->hb_tmofunc, | |
1493 | jiffies + | |
1494 | msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL)); | |
858c9f6c JS |
1495 | } |
1496 | } | |
1497 | ||
e59058c4 | 1498 | /** |
3621a710 | 1499 | * lpfc_offline_eratt - Bring lpfc offline on hardware error attention |
e59058c4 JS |
1500 | * @phba: pointer to lpfc hba data structure. |
1501 | * | |
1502 | * This routine is called to bring the HBA offline when HBA hardware error | |
1503 | * other than Port Error 6 has been detected. | |
1504 | **/ | |
09372820 JS |
1505 | static void |
1506 | lpfc_offline_eratt(struct lpfc_hba *phba) | |
1507 | { | |
1508 | struct lpfc_sli *psli = &phba->sli; | |
1509 | ||
1510 | spin_lock_irq(&phba->hbalock); | |
f4b4c68f | 1511 | psli->sli_flag &= ~LPFC_SLI_ACTIVE; |
09372820 | 1512 | spin_unlock_irq(&phba->hbalock); |
618a5230 | 1513 | lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); |
09372820 JS |
1514 | |
1515 | lpfc_offline(phba); | |
1516 | lpfc_reset_barrier(phba); | |
f4b4c68f | 1517 | spin_lock_irq(&phba->hbalock); |
09372820 | 1518 | lpfc_sli_brdreset(phba); |
f4b4c68f | 1519 | spin_unlock_irq(&phba->hbalock); |
09372820 JS |
1520 | lpfc_hba_down_post(phba); |
1521 | lpfc_sli_brdready(phba, HS_MBRDY); | |
1522 | lpfc_unblock_mgmt_io(phba); | |
1523 | phba->link_state = LPFC_HBA_ERROR; | |
1524 | return; | |
1525 | } | |
1526 | ||
da0436e9 JS |
1527 | /** |
1528 | * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention | |
1529 | * @phba: pointer to lpfc hba data structure. | |
1530 | * | |
1531 | * This routine is called to bring a SLI4 HBA offline when HBA hardware error | |
1532 | * other than Port Error 6 has been detected. | |
1533 | **/ | |
a88dbb6a | 1534 | void |
da0436e9 JS |
1535 | lpfc_sli4_offline_eratt(struct lpfc_hba *phba) |
1536 | { | |
946727dc JS |
1537 | spin_lock_irq(&phba->hbalock); |
1538 | phba->link_state = LPFC_HBA_ERROR; | |
1539 | spin_unlock_irq(&phba->hbalock); | |
1540 | ||
618a5230 | 1541 | lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); |
da0436e9 | 1542 | lpfc_offline(phba); |
da0436e9 | 1543 | lpfc_hba_down_post(phba); |
da0436e9 | 1544 | lpfc_unblock_mgmt_io(phba); |
da0436e9 JS |
1545 | } |
1546 | ||
a257bf90 JS |
1547 | /** |
1548 | * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler | |
1549 | * @phba: pointer to lpfc hba data structure. | |
1550 | * | |
1551 | * This routine is invoked to handle the deferred HBA hardware error | |
1552 | * conditions. This type of error is indicated by HBA by setting ER1 | |
1553 | * and another ER bit in the host status register. The driver will | |
1554 | * wait until the ER1 bit clears before handling the error condition. | |
1555 | **/ | |
1556 | static void | |
1557 | lpfc_handle_deferred_eratt(struct lpfc_hba *phba) | |
1558 | { | |
1559 | uint32_t old_host_status = phba->work_hs; | |
a257bf90 JS |
1560 | struct lpfc_sli *psli = &phba->sli; |
1561 | ||
f4b4c68f JS |
1562 | /* If the pci channel is offline, ignore possible errors, |
1563 | * since we cannot communicate with the pci card anyway. | |
1564 | */ | |
1565 | if (pci_channel_offline(phba->pcidev)) { | |
1566 | spin_lock_irq(&phba->hbalock); | |
1567 | phba->hba_flag &= ~DEFER_ERATT; | |
1568 | spin_unlock_irq(&phba->hbalock); | |
1569 | return; | |
1570 | } | |
1571 | ||
a257bf90 JS |
1572 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
1573 | "0479 Deferred Adapter Hardware Error " | |
1574 | "Data: x%x x%x x%x\n", | |
1575 | phba->work_hs, | |
1576 | phba->work_status[0], phba->work_status[1]); | |
1577 | ||
1578 | spin_lock_irq(&phba->hbalock); | |
f4b4c68f | 1579 | psli->sli_flag &= ~LPFC_SLI_ACTIVE; |
a257bf90 JS |
1580 | spin_unlock_irq(&phba->hbalock); |
1581 | ||
1582 | ||
1583 | /* | |
1584 | * Firmware stops when it triggred erratt. That could cause the I/Os | |
1585 | * dropped by the firmware. Error iocb (I/O) on txcmplq and let the | |
1586 | * SCSI layer retry it after re-establishing link. | |
1587 | */ | |
db55fba8 | 1588 | lpfc_sli_abort_fcp_rings(phba); |
a257bf90 JS |
1589 | |
1590 | /* | |
1591 | * There was a firmware error. Take the hba offline and then | |
1592 | * attempt to restart it. | |
1593 | */ | |
618a5230 | 1594 | lpfc_offline_prep(phba, LPFC_MBX_WAIT); |
a257bf90 JS |
1595 | lpfc_offline(phba); |
1596 | ||
1597 | /* Wait for the ER1 bit to clear.*/ | |
1598 | while (phba->work_hs & HS_FFER1) { | |
1599 | msleep(100); | |
9940b97b JS |
1600 | if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) { |
1601 | phba->work_hs = UNPLUG_ERR ; | |
1602 | break; | |
1603 | } | |
a257bf90 JS |
1604 | /* If driver is unloading let the worker thread continue */ |
1605 | if (phba->pport->load_flag & FC_UNLOADING) { | |
1606 | phba->work_hs = 0; | |
1607 | break; | |
1608 | } | |
1609 | } | |
1610 | ||
1611 | /* | |
1612 | * This is to ptrotect against a race condition in which | |
1613 | * first write to the host attention register clear the | |
1614 | * host status register. | |
1615 | */ | |
1616 | if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING))) | |
1617 | phba->work_hs = old_host_status & ~HS_FFER1; | |
1618 | ||
3772a991 | 1619 | spin_lock_irq(&phba->hbalock); |
a257bf90 | 1620 | phba->hba_flag &= ~DEFER_ERATT; |
3772a991 | 1621 | spin_unlock_irq(&phba->hbalock); |
a257bf90 JS |
1622 | phba->work_status[0] = readl(phba->MBslimaddr + 0xa8); |
1623 | phba->work_status[1] = readl(phba->MBslimaddr + 0xac); | |
1624 | } | |
1625 | ||
3772a991 JS |
1626 | static void |
1627 | lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba) | |
1628 | { | |
1629 | struct lpfc_board_event_header board_event; | |
1630 | struct Scsi_Host *shost; | |
1631 | ||
1632 | board_event.event_type = FC_REG_BOARD_EVENT; | |
1633 | board_event.subcategory = LPFC_EVENT_PORTINTERR; | |
1634 | shost = lpfc_shost_from_vport(phba->pport); | |
1635 | fc_host_post_vendor_event(shost, fc_get_event_number(), | |
1636 | sizeof(board_event), | |
1637 | (char *) &board_event, | |
1638 | LPFC_NL_VENDOR_ID); | |
1639 | } | |
1640 | ||
e59058c4 | 1641 | /** |
3772a991 | 1642 | * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler |
e59058c4 JS |
1643 | * @phba: pointer to lpfc hba data structure. |
1644 | * | |
1645 | * This routine is invoked to handle the following HBA hardware error | |
1646 | * conditions: | |
1647 | * 1 - HBA error attention interrupt | |
1648 | * 2 - DMA ring index out of range | |
1649 | * 3 - Mailbox command came back as unknown | |
1650 | **/ | |
3772a991 JS |
1651 | static void |
1652 | lpfc_handle_eratt_s3(struct lpfc_hba *phba) | |
dea3101e | 1653 | { |
2e0fef85 | 1654 | struct lpfc_vport *vport = phba->pport; |
2e0fef85 | 1655 | struct lpfc_sli *psli = &phba->sli; |
d2873e4c | 1656 | uint32_t event_data; |
57127f15 JS |
1657 | unsigned long temperature; |
1658 | struct temp_event temp_event_data; | |
92d7f7b0 | 1659 | struct Scsi_Host *shost; |
2e0fef85 | 1660 | |
8d63f375 | 1661 | /* If the pci channel is offline, ignore possible errors, |
3772a991 JS |
1662 | * since we cannot communicate with the pci card anyway. |
1663 | */ | |
1664 | if (pci_channel_offline(phba->pcidev)) { | |
1665 | spin_lock_irq(&phba->hbalock); | |
1666 | phba->hba_flag &= ~DEFER_ERATT; | |
1667 | spin_unlock_irq(&phba->hbalock); | |
8d63f375 | 1668 | return; |
3772a991 JS |
1669 | } |
1670 | ||
13815c83 JS |
1671 | /* If resets are disabled then leave the HBA alone and return */ |
1672 | if (!phba->cfg_enable_hba_reset) | |
1673 | return; | |
dea3101e | 1674 | |
ea2151b4 | 1675 | /* Send an internal error event to mgmt application */ |
3772a991 | 1676 | lpfc_board_errevt_to_mgmt(phba); |
ea2151b4 | 1677 | |
a257bf90 JS |
1678 | if (phba->hba_flag & DEFER_ERATT) |
1679 | lpfc_handle_deferred_eratt(phba); | |
1680 | ||
dcf2a4e0 JS |
1681 | if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) { |
1682 | if (phba->work_hs & HS_FFER6) | |
1683 | /* Re-establishing Link */ | |
1684 | lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT, | |
1685 | "1301 Re-establishing Link " | |
1686 | "Data: x%x x%x x%x\n", | |
1687 | phba->work_hs, phba->work_status[0], | |
1688 | phba->work_status[1]); | |
1689 | if (phba->work_hs & HS_FFER8) | |
1690 | /* Device Zeroization */ | |
1691 | lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT, | |
1692 | "2861 Host Authentication device " | |
1693 | "zeroization Data:x%x x%x x%x\n", | |
1694 | phba->work_hs, phba->work_status[0], | |
1695 | phba->work_status[1]); | |
58da1ffb | 1696 | |
92d7f7b0 | 1697 | spin_lock_irq(&phba->hbalock); |
f4b4c68f | 1698 | psli->sli_flag &= ~LPFC_SLI_ACTIVE; |
92d7f7b0 | 1699 | spin_unlock_irq(&phba->hbalock); |
dea3101e | 1700 | |
1701 | /* | |
1702 | * Firmware stops when it triggled erratt with HS_FFER6. | |
1703 | * That could cause the I/Os dropped by the firmware. | |
1704 | * Error iocb (I/O) on txcmplq and let the SCSI layer | |
1705 | * retry it after re-establishing link. | |
1706 | */ | |
db55fba8 | 1707 | lpfc_sli_abort_fcp_rings(phba); |
dea3101e | 1708 | |
dea3101e | 1709 | /* |
1710 | * There was a firmware error. Take the hba offline and then | |
1711 | * attempt to restart it. | |
1712 | */ | |
618a5230 | 1713 | lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); |
dea3101e | 1714 | lpfc_offline(phba); |
41415862 | 1715 | lpfc_sli_brdrestart(phba); |
dea3101e | 1716 | if (lpfc_online(phba) == 0) { /* Initialize the HBA */ |
46fa311e | 1717 | lpfc_unblock_mgmt_io(phba); |
dea3101e | 1718 | return; |
1719 | } | |
46fa311e | 1720 | lpfc_unblock_mgmt_io(phba); |
57127f15 JS |
1721 | } else if (phba->work_hs & HS_CRIT_TEMP) { |
1722 | temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET); | |
1723 | temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; | |
1724 | temp_event_data.event_code = LPFC_CRIT_TEMP; | |
1725 | temp_event_data.data = (uint32_t)temperature; | |
1726 | ||
1727 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
d7c255b2 | 1728 | "0406 Adapter maximum temperature exceeded " |
57127f15 JS |
1729 | "(%ld), taking this port offline " |
1730 | "Data: x%x x%x x%x\n", | |
1731 | temperature, phba->work_hs, | |
1732 | phba->work_status[0], phba->work_status[1]); | |
1733 | ||
1734 | shost = lpfc_shost_from_vport(phba->pport); | |
1735 | fc_host_post_vendor_event(shost, fc_get_event_number(), | |
1736 | sizeof(temp_event_data), | |
1737 | (char *) &temp_event_data, | |
1738 | SCSI_NL_VID_TYPE_PCI | |
1739 | | PCI_VENDOR_ID_EMULEX); | |
1740 | ||
7af67051 | 1741 | spin_lock_irq(&phba->hbalock); |
7af67051 JS |
1742 | phba->over_temp_state = HBA_OVER_TEMP; |
1743 | spin_unlock_irq(&phba->hbalock); | |
09372820 | 1744 | lpfc_offline_eratt(phba); |
57127f15 | 1745 | |
dea3101e | 1746 | } else { |
1747 | /* The if clause above forces this code path when the status | |
9399627f JS |
1748 | * failure is a value other than FFER6. Do not call the offline |
1749 | * twice. This is the adapter hardware error path. | |
dea3101e | 1750 | */ |
1751 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
e8b62011 | 1752 | "0457 Adapter Hardware Error " |
dea3101e | 1753 | "Data: x%x x%x x%x\n", |
e8b62011 | 1754 | phba->work_hs, |
dea3101e | 1755 | phba->work_status[0], phba->work_status[1]); |
1756 | ||
d2873e4c | 1757 | event_data = FC_REG_DUMP_EVENT; |
92d7f7b0 | 1758 | shost = lpfc_shost_from_vport(vport); |
2e0fef85 | 1759 | fc_host_post_vendor_event(shost, fc_get_event_number(), |
d2873e4c JS |
1760 | sizeof(event_data), (char *) &event_data, |
1761 | SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX); | |
1762 | ||
09372820 | 1763 | lpfc_offline_eratt(phba); |
dea3101e | 1764 | } |
9399627f | 1765 | return; |
dea3101e | 1766 | } |
1767 | ||
618a5230 JS |
1768 | /** |
1769 | * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg | |
1770 | * @phba: pointer to lpfc hba data structure. | |
1771 | * @mbx_action: flag for mailbox shutdown action. | |
1772 | * | |
1773 | * This routine is invoked to perform an SLI4 port PCI function reset in | |
1774 | * response to port status register polling attention. It waits for port | |
1775 | * status register (ERR, RDY, RN) bits before proceeding with function reset. | |
1776 | * During this process, interrupt vectors are freed and later requested | |
1777 | * for handling possible port resource change. | |
1778 | **/ | |
1779 | static int | |
e10b2022 JS |
1780 | lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action, |
1781 | bool en_rn_msg) | |
618a5230 JS |
1782 | { |
1783 | int rc; | |
1784 | uint32_t intr_mode; | |
1785 | ||
27d6ac0a | 1786 | if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >= |
65791f1f JS |
1787 | LPFC_SLI_INTF_IF_TYPE_2) { |
1788 | /* | |
1789 | * On error status condition, driver need to wait for port | |
1790 | * ready before performing reset. | |
1791 | */ | |
1792 | rc = lpfc_sli4_pdev_status_reg_wait(phba); | |
0e916ee7 | 1793 | if (rc) |
65791f1f JS |
1794 | return rc; |
1795 | } | |
0e916ee7 | 1796 | |
65791f1f JS |
1797 | /* need reset: attempt for port recovery */ |
1798 | if (en_rn_msg) | |
1799 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
1800 | "2887 Reset Needed: Attempting Port " | |
1801 | "Recovery...\n"); | |
1802 | lpfc_offline_prep(phba, mbx_action); | |
1803 | lpfc_offline(phba); | |
1804 | /* release interrupt for possible resource change */ | |
1805 | lpfc_sli4_disable_intr(phba); | |
5a9eeff5 JS |
1806 | rc = lpfc_sli_brdrestart(phba); |
1807 | if (rc) { | |
1808 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
1809 | "6309 Failed to restart board\n"); | |
1810 | return rc; | |
1811 | } | |
65791f1f JS |
1812 | /* request and enable interrupt */ |
1813 | intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); | |
1814 | if (intr_mode == LPFC_INTR_ERROR) { | |
1815 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
1816 | "3175 Failed to enable interrupt\n"); | |
1817 | return -EIO; | |
618a5230 | 1818 | } |
65791f1f JS |
1819 | phba->intr_mode = intr_mode; |
1820 | rc = lpfc_online(phba); | |
1821 | if (rc == 0) | |
1822 | lpfc_unblock_mgmt_io(phba); | |
1823 | ||
618a5230 JS |
1824 | return rc; |
1825 | } | |
1826 | ||
da0436e9 JS |
1827 | /** |
1828 | * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler | |
1829 | * @phba: pointer to lpfc hba data structure. | |
1830 | * | |
1831 | * This routine is invoked to handle the SLI4 HBA hardware error attention | |
1832 | * conditions. | |
1833 | **/ | |
1834 | static void | |
1835 | lpfc_handle_eratt_s4(struct lpfc_hba *phba) | |
1836 | { | |
1837 | struct lpfc_vport *vport = phba->pport; | |
1838 | uint32_t event_data; | |
1839 | struct Scsi_Host *shost; | |
2fcee4bf | 1840 | uint32_t if_type; |
2e90f4b5 JS |
1841 | struct lpfc_register portstat_reg = {0}; |
1842 | uint32_t reg_err1, reg_err2; | |
1843 | uint32_t uerrlo_reg, uemasklo_reg; | |
65791f1f | 1844 | uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2; |
e10b2022 | 1845 | bool en_rn_msg = true; |
946727dc | 1846 | struct temp_event temp_event_data; |
65791f1f JS |
1847 | struct lpfc_register portsmphr_reg; |
1848 | int rc, i; | |
da0436e9 JS |
1849 | |
1850 | /* If the pci channel is offline, ignore possible errors, since | |
1851 | * we cannot communicate with the pci card anyway. | |
1852 | */ | |
1853 | if (pci_channel_offline(phba->pcidev)) | |
1854 | return; | |
da0436e9 | 1855 | |
65791f1f | 1856 | memset(&portsmphr_reg, 0, sizeof(portsmphr_reg)); |
2fcee4bf JS |
1857 | if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); |
1858 | switch (if_type) { | |
1859 | case LPFC_SLI_INTF_IF_TYPE_0: | |
2e90f4b5 JS |
1860 | pci_rd_rc1 = lpfc_readl( |
1861 | phba->sli4_hba.u.if_type0.UERRLOregaddr, | |
1862 | &uerrlo_reg); | |
1863 | pci_rd_rc2 = lpfc_readl( | |
1864 | phba->sli4_hba.u.if_type0.UEMASKLOregaddr, | |
1865 | &uemasklo_reg); | |
1866 | /* consider PCI bus read error as pci_channel_offline */ | |
1867 | if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO) | |
1868 | return; | |
65791f1f JS |
1869 | if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) { |
1870 | lpfc_sli4_offline_eratt(phba); | |
1871 | return; | |
1872 | } | |
1873 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
1874 | "7623 Checking UE recoverable"); | |
1875 | ||
1876 | for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) { | |
1877 | if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr, | |
1878 | &portsmphr_reg.word0)) | |
1879 | continue; | |
1880 | ||
1881 | smphr_port_status = bf_get(lpfc_port_smphr_port_status, | |
1882 | &portsmphr_reg); | |
1883 | if ((smphr_port_status & LPFC_PORT_SEM_MASK) == | |
1884 | LPFC_PORT_SEM_UE_RECOVERABLE) | |
1885 | break; | |
1886 | /*Sleep for 1Sec, before checking SEMAPHORE */ | |
1887 | msleep(1000); | |
1888 | } | |
1889 | ||
1890 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
1891 | "4827 smphr_port_status x%x : Waited %dSec", | |
1892 | smphr_port_status, i); | |
1893 | ||
1894 | /* Recoverable UE, reset the HBA device */ | |
1895 | if ((smphr_port_status & LPFC_PORT_SEM_MASK) == | |
1896 | LPFC_PORT_SEM_UE_RECOVERABLE) { | |
1897 | for (i = 0; i < 20; i++) { | |
1898 | msleep(1000); | |
1899 | if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr, | |
1900 | &portsmphr_reg.word0) && | |
1901 | (LPFC_POST_STAGE_PORT_READY == | |
1902 | bf_get(lpfc_port_smphr_port_status, | |
1903 | &portsmphr_reg))) { | |
1904 | rc = lpfc_sli4_port_sta_fn_reset(phba, | |
1905 | LPFC_MBX_NO_WAIT, en_rn_msg); | |
1906 | if (rc == 0) | |
1907 | return; | |
1908 | lpfc_printf_log(phba, | |
1909 | KERN_ERR, LOG_INIT, | |
1910 | "4215 Failed to recover UE"); | |
1911 | break; | |
1912 | } | |
1913 | } | |
1914 | } | |
1915 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
1916 | "7624 Firmware not ready: Failing UE recovery," | |
1917 | " waited %dSec", i); | |
2fcee4bf JS |
1918 | lpfc_sli4_offline_eratt(phba); |
1919 | break; | |
946727dc | 1920 | |
2fcee4bf | 1921 | case LPFC_SLI_INTF_IF_TYPE_2: |
27d6ac0a | 1922 | case LPFC_SLI_INTF_IF_TYPE_6: |
2e90f4b5 JS |
1923 | pci_rd_rc1 = lpfc_readl( |
1924 | phba->sli4_hba.u.if_type2.STATUSregaddr, | |
1925 | &portstat_reg.word0); | |
1926 | /* consider PCI bus read error as pci_channel_offline */ | |
6b5151fd JS |
1927 | if (pci_rd_rc1 == -EIO) { |
1928 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
1929 | "3151 PCI bus read access failure: x%x\n", | |
1930 | readl(phba->sli4_hba.u.if_type2.STATUSregaddr)); | |
2e90f4b5 | 1931 | return; |
6b5151fd | 1932 | } |
2e90f4b5 JS |
1933 | reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr); |
1934 | reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr); | |
2fcee4bf | 1935 | if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) { |
2fcee4bf JS |
1936 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
1937 | "2889 Port Overtemperature event, " | |
946727dc JS |
1938 | "taking port offline Data: x%x x%x\n", |
1939 | reg_err1, reg_err2); | |
1940 | ||
310429ef | 1941 | phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE; |
946727dc JS |
1942 | temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; |
1943 | temp_event_data.event_code = LPFC_CRIT_TEMP; | |
1944 | temp_event_data.data = 0xFFFFFFFF; | |
1945 | ||
1946 | shost = lpfc_shost_from_vport(phba->pport); | |
1947 | fc_host_post_vendor_event(shost, fc_get_event_number(), | |
1948 | sizeof(temp_event_data), | |
1949 | (char *)&temp_event_data, | |
1950 | SCSI_NL_VID_TYPE_PCI | |
1951 | | PCI_VENDOR_ID_EMULEX); | |
1952 | ||
2fcee4bf JS |
1953 | spin_lock_irq(&phba->hbalock); |
1954 | phba->over_temp_state = HBA_OVER_TEMP; | |
1955 | spin_unlock_irq(&phba->hbalock); | |
1956 | lpfc_sli4_offline_eratt(phba); | |
946727dc | 1957 | return; |
2fcee4bf | 1958 | } |
2e90f4b5 | 1959 | if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && |
e10b2022 | 1960 | reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) { |
2e90f4b5 | 1961 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
e10b2022 JS |
1962 | "3143 Port Down: Firmware Update " |
1963 | "Detected\n"); | |
1964 | en_rn_msg = false; | |
1965 | } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && | |
2e90f4b5 JS |
1966 | reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP) |
1967 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
1968 | "3144 Port Down: Debug Dump\n"); | |
1969 | else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && | |
1970 | reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON) | |
1971 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
1972 | "3145 Port Down: Provisioning\n"); | |
618a5230 | 1973 | |
946727dc JS |
1974 | /* If resets are disabled then leave the HBA alone and return */ |
1975 | if (!phba->cfg_enable_hba_reset) | |
1976 | return; | |
1977 | ||
618a5230 | 1978 | /* Check port status register for function reset */ |
e10b2022 JS |
1979 | rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT, |
1980 | en_rn_msg); | |
618a5230 JS |
1981 | if (rc == 0) { |
1982 | /* don't report event on forced debug dump */ | |
1983 | if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && | |
1984 | reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP) | |
1985 | return; | |
1986 | else | |
1987 | break; | |
2fcee4bf | 1988 | } |
618a5230 | 1989 | /* fall through for not able to recover */ |
6b5151fd JS |
1990 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
1991 | "3152 Unrecoverable error, bring the port " | |
1992 | "offline\n"); | |
2fcee4bf JS |
1993 | lpfc_sli4_offline_eratt(phba); |
1994 | break; | |
1995 | case LPFC_SLI_INTF_IF_TYPE_1: | |
1996 | default: | |
1997 | break; | |
1998 | } | |
2e90f4b5 JS |
1999 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, |
2000 | "3123 Report dump event to upper layer\n"); | |
2001 | /* Send an internal error event to mgmt application */ | |
2002 | lpfc_board_errevt_to_mgmt(phba); | |
2003 | ||
2004 | event_data = FC_REG_DUMP_EVENT; | |
2005 | shost = lpfc_shost_from_vport(vport); | |
2006 | fc_host_post_vendor_event(shost, fc_get_event_number(), | |
2007 | sizeof(event_data), (char *) &event_data, | |
2008 | SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX); | |
da0436e9 JS |
2009 | } |
2010 | ||
2011 | /** | |
2012 | * lpfc_handle_eratt - Wrapper func for handling hba error attention | |
2013 | * @phba: pointer to lpfc HBA data structure. | |
2014 | * | |
2015 | * This routine wraps the actual SLI3 or SLI4 hba error attention handling | |
2016 | * routine from the API jump table function pointer from the lpfc_hba struct. | |
2017 | * | |
2018 | * Return codes | |
af901ca1 | 2019 | * 0 - success. |
da0436e9 JS |
2020 | * Any other value - error. |
2021 | **/ | |
2022 | void | |
2023 | lpfc_handle_eratt(struct lpfc_hba *phba) | |
2024 | { | |
2025 | (*phba->lpfc_handle_eratt)(phba); | |
2026 | } | |
2027 | ||
e59058c4 | 2028 | /** |
3621a710 | 2029 | * lpfc_handle_latt - The HBA link event handler |
e59058c4 JS |
2030 | * @phba: pointer to lpfc hba data structure. |
2031 | * | |
2032 | * This routine is invoked from the worker thread to handle a HBA host | |
895427bd | 2033 | * attention link event. SLI3 only. |
e59058c4 | 2034 | **/ |
dea3101e | 2035 | void |
2e0fef85 | 2036 | lpfc_handle_latt(struct lpfc_hba *phba) |
dea3101e | 2037 | { |
2e0fef85 JS |
2038 | struct lpfc_vport *vport = phba->pport; |
2039 | struct lpfc_sli *psli = &phba->sli; | |
dea3101e | 2040 | LPFC_MBOXQ_t *pmb; |
2041 | volatile uint32_t control; | |
2042 | struct lpfc_dmabuf *mp; | |
09372820 | 2043 | int rc = 0; |
dea3101e | 2044 | |
2045 | pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); | |
09372820 JS |
2046 | if (!pmb) { |
2047 | rc = 1; | |
dea3101e | 2048 | goto lpfc_handle_latt_err_exit; |
09372820 | 2049 | } |
dea3101e | 2050 | |
2051 | mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); | |
09372820 JS |
2052 | if (!mp) { |
2053 | rc = 2; | |
dea3101e | 2054 | goto lpfc_handle_latt_free_pmb; |
09372820 | 2055 | } |
dea3101e | 2056 | |
2057 | mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys); | |
09372820 JS |
2058 | if (!mp->virt) { |
2059 | rc = 3; | |
dea3101e | 2060 | goto lpfc_handle_latt_free_mp; |
09372820 | 2061 | } |
dea3101e | 2062 | |
6281bfe0 | 2063 | /* Cleanup any outstanding ELS commands */ |
549e55cd | 2064 | lpfc_els_flush_all_cmd(phba); |
dea3101e | 2065 | |
2066 | psli->slistat.link_event++; | |
76a95d75 JS |
2067 | lpfc_read_topology(phba, pmb, mp); |
2068 | pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; | |
2e0fef85 | 2069 | pmb->vport = vport; |
0d2b6b83 | 2070 | /* Block ELS IOCBs until we have processed this mbox command */ |
895427bd | 2071 | phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT; |
0b727fea | 2072 | rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT); |
09372820 JS |
2073 | if (rc == MBX_NOT_FINISHED) { |
2074 | rc = 4; | |
14691150 | 2075 | goto lpfc_handle_latt_free_mbuf; |
09372820 | 2076 | } |
dea3101e | 2077 | |
2078 | /* Clear Link Attention in HA REG */ | |
2e0fef85 | 2079 | spin_lock_irq(&phba->hbalock); |
dea3101e | 2080 | writel(HA_LATT, phba->HAregaddr); |
2081 | readl(phba->HAregaddr); /* flush */ | |
2e0fef85 | 2082 | spin_unlock_irq(&phba->hbalock); |
dea3101e | 2083 | |
2084 | return; | |
2085 | ||
14691150 | 2086 | lpfc_handle_latt_free_mbuf: |
895427bd | 2087 | phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT; |
14691150 | 2088 | lpfc_mbuf_free(phba, mp->virt, mp->phys); |
dea3101e | 2089 | lpfc_handle_latt_free_mp: |
2090 | kfree(mp); | |
2091 | lpfc_handle_latt_free_pmb: | |
1dcb58e5 | 2092 | mempool_free(pmb, phba->mbox_mem_pool); |
dea3101e | 2093 | lpfc_handle_latt_err_exit: |
2094 | /* Enable Link attention interrupts */ | |
2e0fef85 | 2095 | spin_lock_irq(&phba->hbalock); |
dea3101e | 2096 | psli->sli_flag |= LPFC_PROCESS_LA; |
2097 | control = readl(phba->HCregaddr); | |
2098 | control |= HC_LAINT_ENA; | |
2099 | writel(control, phba->HCregaddr); | |
2100 | readl(phba->HCregaddr); /* flush */ | |
2101 | ||
2102 | /* Clear Link Attention in HA REG */ | |
2103 | writel(HA_LATT, phba->HAregaddr); | |
2104 | readl(phba->HAregaddr); /* flush */ | |
2e0fef85 | 2105 | spin_unlock_irq(&phba->hbalock); |
dea3101e | 2106 | lpfc_linkdown(phba); |
2e0fef85 | 2107 | phba->link_state = LPFC_HBA_ERROR; |
dea3101e | 2108 | |
09372820 JS |
2109 | lpfc_printf_log(phba, KERN_ERR, LOG_MBOX, |
2110 | "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc); | |
dea3101e | 2111 | |
2112 | return; | |
2113 | } | |
2114 | ||
e59058c4 | 2115 | /** |
3621a710 | 2116 | * lpfc_parse_vpd - Parse VPD (Vital Product Data) |
e59058c4 JS |
2117 | * @phba: pointer to lpfc hba data structure. |
2118 | * @vpd: pointer to the vital product data. | |
2119 | * @len: length of the vital product data in bytes. | |
2120 | * | |
2121 | * This routine parses the Vital Product Data (VPD). The VPD is treated as | |
2122 | * an array of characters. In this routine, the ModelName, ProgramType, and | |
2123 | * ModelDesc, etc. fields of the phba data structure will be populated. | |
2124 | * | |
2125 | * Return codes | |
2126 | * 0 - pointer to the VPD passed in is NULL | |
2127 | * 1 - success | |
2128 | **/ | |
3772a991 | 2129 | int |
2e0fef85 | 2130 | lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len) |
dea3101e | 2131 | { |
2132 | uint8_t lenlo, lenhi; | |
07da60c1 | 2133 | int Length; |
dea3101e | 2134 | int i, j; |
2135 | int finished = 0; | |
2136 | int index = 0; | |
2137 | ||
2138 | if (!vpd) | |
2139 | return 0; | |
2140 | ||
2141 | /* Vital Product */ | |
ed957684 | 2142 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
e8b62011 | 2143 | "0455 Vital Product Data: x%x x%x x%x x%x\n", |
dea3101e | 2144 | (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2], |
2145 | (uint32_t) vpd[3]); | |
74b72a59 | 2146 | while (!finished && (index < (len - 4))) { |
dea3101e | 2147 | switch (vpd[index]) { |
2148 | case 0x82: | |
74b72a59 | 2149 | case 0x91: |
dea3101e | 2150 | index += 1; |
2151 | lenlo = vpd[index]; | |
2152 | index += 1; | |
2153 | lenhi = vpd[index]; | |
2154 | index += 1; | |
2155 | i = ((((unsigned short)lenhi) << 8) + lenlo); | |
2156 | index += i; | |
2157 | break; | |
2158 | case 0x90: | |
2159 | index += 1; | |
2160 | lenlo = vpd[index]; | |
2161 | index += 1; | |
2162 | lenhi = vpd[index]; | |
2163 | index += 1; | |
2164 | Length = ((((unsigned short)lenhi) << 8) + lenlo); | |
74b72a59 JW |
2165 | if (Length > len - index) |
2166 | Length = len - index; | |
dea3101e | 2167 | while (Length > 0) { |
2168 | /* Look for Serial Number */ | |
2169 | if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) { | |
2170 | index += 2; | |
2171 | i = vpd[index]; | |
2172 | index += 1; | |
2173 | j = 0; | |
2174 | Length -= (3+i); | |
2175 | while(i--) { | |
2176 | phba->SerialNumber[j++] = vpd[index++]; | |
2177 | if (j == 31) | |
2178 | break; | |
2179 | } | |
2180 | phba->SerialNumber[j] = 0; | |
2181 | continue; | |
2182 | } | |
2183 | else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) { | |
2184 | phba->vpd_flag |= VPD_MODEL_DESC; | |
2185 | index += 2; | |
2186 | i = vpd[index]; | |
2187 | index += 1; | |
2188 | j = 0; | |
2189 | Length -= (3+i); | |
2190 | while(i--) { | |
2191 | phba->ModelDesc[j++] = vpd[index++]; | |
2192 | if (j == 255) | |
2193 | break; | |
2194 | } | |
2195 | phba->ModelDesc[j] = 0; | |
2196 | continue; | |
2197 | } | |
2198 | else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) { | |
2199 | phba->vpd_flag |= VPD_MODEL_NAME; | |
2200 | index += 2; | |
2201 | i = vpd[index]; | |
2202 | index += 1; | |
2203 | j = 0; | |
2204 | Length -= (3+i); | |
2205 | while(i--) { | |
2206 | phba->ModelName[j++] = vpd[index++]; | |
2207 | if (j == 79) | |
2208 | break; | |
2209 | } | |
2210 | phba->ModelName[j] = 0; | |
2211 | continue; | |
2212 | } | |
2213 | else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) { | |
2214 | phba->vpd_flag |= VPD_PROGRAM_TYPE; | |
2215 | index += 2; | |
2216 | i = vpd[index]; | |
2217 | index += 1; | |
2218 | j = 0; | |
2219 | Length -= (3+i); | |
2220 | while(i--) { | |
2221 | phba->ProgramType[j++] = vpd[index++]; | |
2222 | if (j == 255) | |
2223 | break; | |
2224 | } | |
2225 | phba->ProgramType[j] = 0; | |
2226 | continue; | |
2227 | } | |
2228 | else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) { | |
2229 | phba->vpd_flag |= VPD_PORT; | |
2230 | index += 2; | |
2231 | i = vpd[index]; | |
2232 | index += 1; | |
2233 | j = 0; | |
2234 | Length -= (3+i); | |
2235 | while(i--) { | |
cd1c8301 JS |
2236 | if ((phba->sli_rev == LPFC_SLI_REV4) && |
2237 | (phba->sli4_hba.pport_name_sta == | |
2238 | LPFC_SLI4_PPNAME_GET)) { | |
2239 | j++; | |
2240 | index++; | |
2241 | } else | |
2242 | phba->Port[j++] = vpd[index++]; | |
2243 | if (j == 19) | |
2244 | break; | |
dea3101e | 2245 | } |
cd1c8301 JS |
2246 | if ((phba->sli_rev != LPFC_SLI_REV4) || |
2247 | (phba->sli4_hba.pport_name_sta == | |
2248 | LPFC_SLI4_PPNAME_NON)) | |
2249 | phba->Port[j] = 0; | |
dea3101e | 2250 | continue; |
2251 | } | |
2252 | else { | |
2253 | index += 2; | |
2254 | i = vpd[index]; | |
2255 | index += 1; | |
2256 | index += i; | |
2257 | Length -= (3 + i); | |
2258 | } | |
2259 | } | |
2260 | finished = 0; | |
2261 | break; | |
2262 | case 0x78: | |
2263 | finished = 1; | |
2264 | break; | |
2265 | default: | |
2266 | index ++; | |
2267 | break; | |
2268 | } | |
74b72a59 | 2269 | } |
dea3101e | 2270 | |
2271 | return(1); | |
2272 | } | |
2273 | ||
e59058c4 | 2274 | /** |
3621a710 | 2275 | * lpfc_get_hba_model_desc - Retrieve HBA device model name and description |
e59058c4 JS |
2276 | * @phba: pointer to lpfc hba data structure. |
2277 | * @mdp: pointer to the data structure to hold the derived model name. | |
2278 | * @descp: pointer to the data structure to hold the derived description. | |
2279 | * | |
2280 | * This routine retrieves HBA's description based on its registered PCI device | |
2281 | * ID. The @descp passed into this function points to an array of 256 chars. It | |
2282 | * shall be returned with the model name, maximum speed, and the host bus type. | |
2283 | * The @mdp passed into this function points to an array of 80 chars. When the | |
2284 | * function returns, the @mdp will be filled with the model name. | |
2285 | **/ | |
dea3101e | 2286 | static void |
2e0fef85 | 2287 | lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp) |
dea3101e | 2288 | { |
2289 | lpfc_vpd_t *vp; | |
fefcb2b6 | 2290 | uint16_t dev_id = phba->pcidev->device; |
74b72a59 | 2291 | int max_speed; |
84774a4d | 2292 | int GE = 0; |
da0436e9 | 2293 | int oneConnect = 0; /* default is not a oneConnect */ |
74b72a59 | 2294 | struct { |
a747c9ce JS |
2295 | char *name; |
2296 | char *bus; | |
2297 | char *function; | |
2298 | } m = {"<Unknown>", "", ""}; | |
74b72a59 JW |
2299 | |
2300 | if (mdp && mdp[0] != '\0' | |
2301 | && descp && descp[0] != '\0') | |
2302 | return; | |
2303 | ||
fbd8a6ba JS |
2304 | if (phba->lmt & LMT_64Gb) |
2305 | max_speed = 64; | |
2306 | else if (phba->lmt & LMT_32Gb) | |
d38dd52c JS |
2307 | max_speed = 32; |
2308 | else if (phba->lmt & LMT_16Gb) | |
c0c11512 JS |
2309 | max_speed = 16; |
2310 | else if (phba->lmt & LMT_10Gb) | |
74b72a59 JW |
2311 | max_speed = 10; |
2312 | else if (phba->lmt & LMT_8Gb) | |
2313 | max_speed = 8; | |
2314 | else if (phba->lmt & LMT_4Gb) | |
2315 | max_speed = 4; | |
2316 | else if (phba->lmt & LMT_2Gb) | |
2317 | max_speed = 2; | |
4169d868 | 2318 | else if (phba->lmt & LMT_1Gb) |
74b72a59 | 2319 | max_speed = 1; |
4169d868 JS |
2320 | else |
2321 | max_speed = 0; | |
dea3101e | 2322 | |
2323 | vp = &phba->vpd; | |
dea3101e | 2324 | |
e4adb204 | 2325 | switch (dev_id) { |
06325e74 | 2326 | case PCI_DEVICE_ID_FIREFLY: |
12222f4f JS |
2327 | m = (typeof(m)){"LP6000", "PCI", |
2328 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
06325e74 | 2329 | break; |
dea3101e | 2330 | case PCI_DEVICE_ID_SUPERFLY: |
2331 | if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3) | |
12222f4f | 2332 | m = (typeof(m)){"LP7000", "PCI", ""}; |
dea3101e | 2333 | else |
12222f4f JS |
2334 | m = (typeof(m)){"LP7000E", "PCI", ""}; |
2335 | m.function = "Obsolete, Unsupported Fibre Channel Adapter"; | |
dea3101e | 2336 | break; |
2337 | case PCI_DEVICE_ID_DRAGONFLY: | |
a747c9ce | 2338 | m = (typeof(m)){"LP8000", "PCI", |
12222f4f | 2339 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
dea3101e | 2340 | break; |
2341 | case PCI_DEVICE_ID_CENTAUR: | |
2342 | if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID) | |
12222f4f | 2343 | m = (typeof(m)){"LP9002", "PCI", ""}; |
dea3101e | 2344 | else |
12222f4f JS |
2345 | m = (typeof(m)){"LP9000", "PCI", ""}; |
2346 | m.function = "Obsolete, Unsupported Fibre Channel Adapter"; | |
dea3101e | 2347 | break; |
2348 | case PCI_DEVICE_ID_RFLY: | |
a747c9ce | 2349 | m = (typeof(m)){"LP952", "PCI", |
12222f4f | 2350 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
dea3101e | 2351 | break; |
2352 | case PCI_DEVICE_ID_PEGASUS: | |
a747c9ce | 2353 | m = (typeof(m)){"LP9802", "PCI-X", |
12222f4f | 2354 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
dea3101e | 2355 | break; |
2356 | case PCI_DEVICE_ID_THOR: | |
a747c9ce | 2357 | m = (typeof(m)){"LP10000", "PCI-X", |
12222f4f | 2358 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
dea3101e | 2359 | break; |
2360 | case PCI_DEVICE_ID_VIPER: | |
a747c9ce | 2361 | m = (typeof(m)){"LPX1000", "PCI-X", |
12222f4f | 2362 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
dea3101e | 2363 | break; |
2364 | case PCI_DEVICE_ID_PFLY: | |
a747c9ce | 2365 | m = (typeof(m)){"LP982", "PCI-X", |
12222f4f | 2366 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
dea3101e | 2367 | break; |
2368 | case PCI_DEVICE_ID_TFLY: | |
a747c9ce | 2369 | m = (typeof(m)){"LP1050", "PCI-X", |
12222f4f | 2370 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
dea3101e | 2371 | break; |
2372 | case PCI_DEVICE_ID_HELIOS: | |
a747c9ce | 2373 | m = (typeof(m)){"LP11000", "PCI-X2", |
12222f4f | 2374 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
dea3101e | 2375 | break; |
e4adb204 | 2376 | case PCI_DEVICE_ID_HELIOS_SCSP: |
a747c9ce | 2377 | m = (typeof(m)){"LP11000-SP", "PCI-X2", |
12222f4f | 2378 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
e4adb204 JSEC |
2379 | break; |
2380 | case PCI_DEVICE_ID_HELIOS_DCSP: | |
a747c9ce | 2381 | m = (typeof(m)){"LP11002-SP", "PCI-X2", |
12222f4f | 2382 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
e4adb204 JSEC |
2383 | break; |
2384 | case PCI_DEVICE_ID_NEPTUNE: | |
12222f4f JS |
2385 | m = (typeof(m)){"LPe1000", "PCIe", |
2386 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
e4adb204 JSEC |
2387 | break; |
2388 | case PCI_DEVICE_ID_NEPTUNE_SCSP: | |
12222f4f JS |
2389 | m = (typeof(m)){"LPe1000-SP", "PCIe", |
2390 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
e4adb204 JSEC |
2391 | break; |
2392 | case PCI_DEVICE_ID_NEPTUNE_DCSP: | |
12222f4f JS |
2393 | m = (typeof(m)){"LPe1002-SP", "PCIe", |
2394 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
e4adb204 | 2395 | break; |
dea3101e | 2396 | case PCI_DEVICE_ID_BMID: |
a747c9ce | 2397 | m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"}; |
dea3101e | 2398 | break; |
2399 | case PCI_DEVICE_ID_BSMB: | |
12222f4f JS |
2400 | m = (typeof(m)){"LP111", "PCI-X2", |
2401 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
dea3101e | 2402 | break; |
2403 | case PCI_DEVICE_ID_ZEPHYR: | |
a747c9ce | 2404 | m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"}; |
dea3101e | 2405 | break; |
e4adb204 | 2406 | case PCI_DEVICE_ID_ZEPHYR_SCSP: |
a747c9ce | 2407 | m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"}; |
e4adb204 JSEC |
2408 | break; |
2409 | case PCI_DEVICE_ID_ZEPHYR_DCSP: | |
a747c9ce | 2410 | m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"}; |
a257bf90 | 2411 | GE = 1; |
e4adb204 | 2412 | break; |
dea3101e | 2413 | case PCI_DEVICE_ID_ZMID: |
a747c9ce | 2414 | m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"}; |
dea3101e | 2415 | break; |
2416 | case PCI_DEVICE_ID_ZSMB: | |
a747c9ce | 2417 | m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"}; |
dea3101e | 2418 | break; |
2419 | case PCI_DEVICE_ID_LP101: | |
12222f4f JS |
2420 | m = (typeof(m)){"LP101", "PCI-X", |
2421 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
dea3101e | 2422 | break; |
2423 | case PCI_DEVICE_ID_LP10000S: | |
12222f4f JS |
2424 | m = (typeof(m)){"LP10000-S", "PCI", |
2425 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
06325e74 | 2426 | break; |
e4adb204 | 2427 | case PCI_DEVICE_ID_LP11000S: |
12222f4f JS |
2428 | m = (typeof(m)){"LP11000-S", "PCI-X2", |
2429 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
18a3b596 | 2430 | break; |
e4adb204 | 2431 | case PCI_DEVICE_ID_LPE11000S: |
12222f4f JS |
2432 | m = (typeof(m)){"LPe11000-S", "PCIe", |
2433 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
5cc36b3c | 2434 | break; |
b87eab38 | 2435 | case PCI_DEVICE_ID_SAT: |
a747c9ce | 2436 | m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"}; |
b87eab38 JS |
2437 | break; |
2438 | case PCI_DEVICE_ID_SAT_MID: | |
a747c9ce | 2439 | m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"}; |
b87eab38 JS |
2440 | break; |
2441 | case PCI_DEVICE_ID_SAT_SMB: | |
a747c9ce | 2442 | m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"}; |
b87eab38 JS |
2443 | break; |
2444 | case PCI_DEVICE_ID_SAT_DCSP: | |
a747c9ce | 2445 | m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"}; |
b87eab38 JS |
2446 | break; |
2447 | case PCI_DEVICE_ID_SAT_SCSP: | |
a747c9ce | 2448 | m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"}; |
b87eab38 JS |
2449 | break; |
2450 | case PCI_DEVICE_ID_SAT_S: | |
a747c9ce | 2451 | m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"}; |
b87eab38 | 2452 | break; |
84774a4d | 2453 | case PCI_DEVICE_ID_HORNET: |
12222f4f JS |
2454 | m = (typeof(m)){"LP21000", "PCIe", |
2455 | "Obsolete, Unsupported FCoE Adapter"}; | |
84774a4d JS |
2456 | GE = 1; |
2457 | break; | |
2458 | case PCI_DEVICE_ID_PROTEUS_VF: | |
a747c9ce | 2459 | m = (typeof(m)){"LPev12000", "PCIe IOV", |
12222f4f | 2460 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
84774a4d JS |
2461 | break; |
2462 | case PCI_DEVICE_ID_PROTEUS_PF: | |
a747c9ce | 2463 | m = (typeof(m)){"LPev12000", "PCIe IOV", |
12222f4f | 2464 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
84774a4d JS |
2465 | break; |
2466 | case PCI_DEVICE_ID_PROTEUS_S: | |
a747c9ce | 2467 | m = (typeof(m)){"LPemv12002-S", "PCIe IOV", |
12222f4f | 2468 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
84774a4d | 2469 | break; |
da0436e9 JS |
2470 | case PCI_DEVICE_ID_TIGERSHARK: |
2471 | oneConnect = 1; | |
a747c9ce | 2472 | m = (typeof(m)){"OCe10100", "PCIe", "FCoE"}; |
da0436e9 | 2473 | break; |
a747c9ce | 2474 | case PCI_DEVICE_ID_TOMCAT: |
6669f9bb | 2475 | oneConnect = 1; |
a747c9ce JS |
2476 | m = (typeof(m)){"OCe11100", "PCIe", "FCoE"}; |
2477 | break; | |
2478 | case PCI_DEVICE_ID_FALCON: | |
2479 | m = (typeof(m)){"LPSe12002-ML1-E", "PCIe", | |
2480 | "EmulexSecure Fibre"}; | |
6669f9bb | 2481 | break; |
98fc5dd9 JS |
2482 | case PCI_DEVICE_ID_BALIUS: |
2483 | m = (typeof(m)){"LPVe12002", "PCIe Shared I/O", | |
12222f4f | 2484 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
98fc5dd9 | 2485 | break; |
085c647c | 2486 | case PCI_DEVICE_ID_LANCER_FC: |
c0c11512 | 2487 | m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"}; |
085c647c | 2488 | break; |
12222f4f JS |
2489 | case PCI_DEVICE_ID_LANCER_FC_VF: |
2490 | m = (typeof(m)){"LPe16000", "PCIe", | |
2491 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
2492 | break; | |
085c647c JS |
2493 | case PCI_DEVICE_ID_LANCER_FCOE: |
2494 | oneConnect = 1; | |
079b5c91 | 2495 | m = (typeof(m)){"OCe15100", "PCIe", "FCoE"}; |
085c647c | 2496 | break; |
12222f4f JS |
2497 | case PCI_DEVICE_ID_LANCER_FCOE_VF: |
2498 | oneConnect = 1; | |
2499 | m = (typeof(m)){"OCe15100", "PCIe", | |
2500 | "Obsolete, Unsupported FCoE"}; | |
2501 | break; | |
d38dd52c JS |
2502 | case PCI_DEVICE_ID_LANCER_G6_FC: |
2503 | m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"}; | |
2504 | break; | |
c238b9b6 JS |
2505 | case PCI_DEVICE_ID_LANCER_G7_FC: |
2506 | m = (typeof(m)){"LPe36000", "PCIe", "Fibre Channel Adapter"}; | |
2507 | break; | |
f8cafd38 JS |
2508 | case PCI_DEVICE_ID_SKYHAWK: |
2509 | case PCI_DEVICE_ID_SKYHAWK_VF: | |
2510 | oneConnect = 1; | |
2511 | m = (typeof(m)){"OCe14000", "PCIe", "FCoE"}; | |
2512 | break; | |
5cc36b3c | 2513 | default: |
a747c9ce | 2514 | m = (typeof(m)){"Unknown", "", ""}; |
e4adb204 | 2515 | break; |
dea3101e | 2516 | } |
74b72a59 JW |
2517 | |
2518 | if (mdp && mdp[0] == '\0') | |
2519 | snprintf(mdp, 79,"%s", m.name); | |
c0c11512 JS |
2520 | /* |
2521 | * oneConnect hba requires special processing, they are all initiators | |
da0436e9 JS |
2522 | * and we put the port number on the end |
2523 | */ | |
2524 | if (descp && descp[0] == '\0') { | |
2525 | if (oneConnect) | |
2526 | snprintf(descp, 255, | |
4169d868 | 2527 | "Emulex OneConnect %s, %s Initiator %s", |
a747c9ce | 2528 | m.name, m.function, |
da0436e9 | 2529 | phba->Port); |
4169d868 JS |
2530 | else if (max_speed == 0) |
2531 | snprintf(descp, 255, | |
290237d2 | 2532 | "Emulex %s %s %s", |
4169d868 | 2533 | m.name, m.bus, m.function); |
da0436e9 JS |
2534 | else |
2535 | snprintf(descp, 255, | |
2536 | "Emulex %s %d%s %s %s", | |
a747c9ce JS |
2537 | m.name, max_speed, (GE) ? "GE" : "Gb", |
2538 | m.bus, m.function); | |
da0436e9 | 2539 | } |
dea3101e | 2540 | } |
2541 | ||
e59058c4 | 2542 | /** |
3621a710 | 2543 | * lpfc_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring |
e59058c4 JS |
2544 | * @phba: pointer to lpfc hba data structure. |
2545 | * @pring: pointer to a IOCB ring. | |
2546 | * @cnt: the number of IOCBs to be posted to the IOCB ring. | |
2547 | * | |
2548 | * This routine posts a given number of IOCBs with the associated DMA buffer | |
2549 | * descriptors specified by the cnt argument to the given IOCB ring. | |
2550 | * | |
2551 | * Return codes | |
2552 | * The number of IOCBs NOT able to be posted to the IOCB ring. | |
2553 | **/ | |
dea3101e | 2554 | int |
495a714c | 2555 | lpfc_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt) |
dea3101e | 2556 | { |
2557 | IOCB_t *icmd; | |
0bd4ca25 | 2558 | struct lpfc_iocbq *iocb; |
dea3101e | 2559 | struct lpfc_dmabuf *mp1, *mp2; |
2560 | ||
2561 | cnt += pring->missbufcnt; | |
2562 | ||
2563 | /* While there are buffers to post */ | |
2564 | while (cnt > 0) { | |
2565 | /* Allocate buffer for command iocb */ | |
0bd4ca25 | 2566 | iocb = lpfc_sli_get_iocbq(phba); |
dea3101e | 2567 | if (iocb == NULL) { |
2568 | pring->missbufcnt = cnt; | |
2569 | return cnt; | |
2570 | } | |
dea3101e | 2571 | icmd = &iocb->iocb; |
2572 | ||
2573 | /* 2 buffers can be posted per command */ | |
2574 | /* Allocate buffer to post */ | |
2575 | mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); | |
2576 | if (mp1) | |
98c9ea5c JS |
2577 | mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys); |
2578 | if (!mp1 || !mp1->virt) { | |
c9475cb0 | 2579 | kfree(mp1); |
604a3e30 | 2580 | lpfc_sli_release_iocbq(phba, iocb); |
dea3101e | 2581 | pring->missbufcnt = cnt; |
2582 | return cnt; | |
2583 | } | |
2584 | ||
2585 | INIT_LIST_HEAD(&mp1->list); | |
2586 | /* Allocate buffer to post */ | |
2587 | if (cnt > 1) { | |
2588 | mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); | |
2589 | if (mp2) | |
2590 | mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI, | |
2591 | &mp2->phys); | |
98c9ea5c | 2592 | if (!mp2 || !mp2->virt) { |
c9475cb0 | 2593 | kfree(mp2); |
dea3101e | 2594 | lpfc_mbuf_free(phba, mp1->virt, mp1->phys); |
2595 | kfree(mp1); | |
604a3e30 | 2596 | lpfc_sli_release_iocbq(phba, iocb); |
dea3101e | 2597 | pring->missbufcnt = cnt; |
2598 | return cnt; | |
2599 | } | |
2600 | ||
2601 | INIT_LIST_HEAD(&mp2->list); | |
2602 | } else { | |
2603 | mp2 = NULL; | |
2604 | } | |
2605 | ||
2606 | icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys); | |
2607 | icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys); | |
2608 | icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE; | |
2609 | icmd->ulpBdeCount = 1; | |
2610 | cnt--; | |
2611 | if (mp2) { | |
2612 | icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys); | |
2613 | icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys); | |
2614 | icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE; | |
2615 | cnt--; | |
2616 | icmd->ulpBdeCount = 2; | |
2617 | } | |
2618 | ||
2619 | icmd->ulpCommand = CMD_QUE_RING_BUF64_CN; | |
2620 | icmd->ulpLe = 1; | |
2621 | ||
3772a991 JS |
2622 | if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) == |
2623 | IOCB_ERROR) { | |
dea3101e | 2624 | lpfc_mbuf_free(phba, mp1->virt, mp1->phys); |
2625 | kfree(mp1); | |
2626 | cnt++; | |
2627 | if (mp2) { | |
2628 | lpfc_mbuf_free(phba, mp2->virt, mp2->phys); | |
2629 | kfree(mp2); | |
2630 | cnt++; | |
2631 | } | |
604a3e30 | 2632 | lpfc_sli_release_iocbq(phba, iocb); |
dea3101e | 2633 | pring->missbufcnt = cnt; |
dea3101e | 2634 | return cnt; |
2635 | } | |
dea3101e | 2636 | lpfc_sli_ringpostbuf_put(phba, pring, mp1); |
92d7f7b0 | 2637 | if (mp2) |
dea3101e | 2638 | lpfc_sli_ringpostbuf_put(phba, pring, mp2); |
dea3101e | 2639 | } |
2640 | pring->missbufcnt = 0; | |
2641 | return 0; | |
2642 | } | |
2643 | ||
e59058c4 | 2644 | /** |
3621a710 | 2645 | * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring |
e59058c4 JS |
2646 | * @phba: pointer to lpfc hba data structure. |
2647 | * | |
2648 | * This routine posts initial receive IOCB buffers to the ELS ring. The | |
2649 | * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is | |
895427bd | 2650 | * set to 64 IOCBs. SLI3 only. |
e59058c4 JS |
2651 | * |
2652 | * Return codes | |
2653 | * 0 - success (currently always success) | |
2654 | **/ | |
dea3101e | 2655 | static int |
2e0fef85 | 2656 | lpfc_post_rcv_buf(struct lpfc_hba *phba) |
dea3101e | 2657 | { |
2658 | struct lpfc_sli *psli = &phba->sli; | |
2659 | ||
2660 | /* Ring 0, ELS / CT buffers */ | |
895427bd | 2661 | lpfc_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0); |
dea3101e | 2662 | /* Ring 2 - FCP no buffers needed */ |
2663 | ||
2664 | return 0; | |
2665 | } | |
2666 | ||
2667 | #define S(N,V) (((V)<<(N))|((V)>>(32-(N)))) | |
2668 | ||
e59058c4 | 2669 | /** |
3621a710 | 2670 | * lpfc_sha_init - Set up initial array of hash table entries |
e59058c4 JS |
2671 | * @HashResultPointer: pointer to an array as hash table. |
2672 | * | |
2673 | * This routine sets up the initial values to the array of hash table entries | |
2674 | * for the LC HBAs. | |
2675 | **/ | |
dea3101e | 2676 | static void |
2677 | lpfc_sha_init(uint32_t * HashResultPointer) | |
2678 | { | |
2679 | HashResultPointer[0] = 0x67452301; | |
2680 | HashResultPointer[1] = 0xEFCDAB89; | |
2681 | HashResultPointer[2] = 0x98BADCFE; | |
2682 | HashResultPointer[3] = 0x10325476; | |
2683 | HashResultPointer[4] = 0xC3D2E1F0; | |
2684 | } | |
2685 | ||
e59058c4 | 2686 | /** |
3621a710 | 2687 | * lpfc_sha_iterate - Iterate initial hash table with the working hash table |
e59058c4 JS |
2688 | * @HashResultPointer: pointer to an initial/result hash table. |
2689 | * @HashWorkingPointer: pointer to an working hash table. | |
2690 | * | |
2691 | * This routine iterates an initial hash table pointed by @HashResultPointer | |
2692 | * with the values from the working hash table pointeed by @HashWorkingPointer. | |
2693 | * The results are putting back to the initial hash table, returned through | |
2694 | * the @HashResultPointer as the result hash table. | |
2695 | **/ | |
dea3101e | 2696 | static void |
2697 | lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer) | |
2698 | { | |
2699 | int t; | |
2700 | uint32_t TEMP; | |
2701 | uint32_t A, B, C, D, E; | |
2702 | t = 16; | |
2703 | do { | |
2704 | HashWorkingPointer[t] = | |
2705 | S(1, | |
2706 | HashWorkingPointer[t - 3] ^ HashWorkingPointer[t - | |
2707 | 8] ^ | |
2708 | HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]); | |
2709 | } while (++t <= 79); | |
2710 | t = 0; | |
2711 | A = HashResultPointer[0]; | |
2712 | B = HashResultPointer[1]; | |
2713 | C = HashResultPointer[2]; | |
2714 | D = HashResultPointer[3]; | |
2715 | E = HashResultPointer[4]; | |
2716 | ||
2717 | do { | |
2718 | if (t < 20) { | |
2719 | TEMP = ((B & C) | ((~B) & D)) + 0x5A827999; | |
2720 | } else if (t < 40) { | |
2721 | TEMP = (B ^ C ^ D) + 0x6ED9EBA1; | |
2722 | } else if (t < 60) { | |
2723 | TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC; | |
2724 | } else { | |
2725 | TEMP = (B ^ C ^ D) + 0xCA62C1D6; | |
2726 | } | |
2727 | TEMP += S(5, A) + E + HashWorkingPointer[t]; | |
2728 | E = D; | |
2729 | D = C; | |
2730 | C = S(30, B); | |
2731 | B = A; | |
2732 | A = TEMP; | |
2733 | } while (++t <= 79); | |
2734 | ||
2735 | HashResultPointer[0] += A; | |
2736 | HashResultPointer[1] += B; | |
2737 | HashResultPointer[2] += C; | |
2738 | HashResultPointer[3] += D; | |
2739 | HashResultPointer[4] += E; | |
2740 | ||
2741 | } | |
2742 | ||
e59058c4 | 2743 | /** |
3621a710 | 2744 | * lpfc_challenge_key - Create challenge key based on WWPN of the HBA |
e59058c4 JS |
2745 | * @RandomChallenge: pointer to the entry of host challenge random number array. |
2746 | * @HashWorking: pointer to the entry of the working hash array. | |
2747 | * | |
2748 | * This routine calculates the working hash array referred by @HashWorking | |
2749 | * from the challenge random numbers associated with the host, referred by | |
2750 | * @RandomChallenge. The result is put into the entry of the working hash | |
2751 | * array and returned by reference through @HashWorking. | |
2752 | **/ | |
dea3101e | 2753 | static void |
2754 | lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking) | |
2755 | { | |
2756 | *HashWorking = (*RandomChallenge ^ *HashWorking); | |
2757 | } | |
2758 | ||
e59058c4 | 2759 | /** |
3621a710 | 2760 | * lpfc_hba_init - Perform special handling for LC HBA initialization |
e59058c4 JS |
2761 | * @phba: pointer to lpfc hba data structure. |
2762 | * @hbainit: pointer to an array of unsigned 32-bit integers. | |
2763 | * | |
2764 | * This routine performs the special handling for LC HBA initialization. | |
2765 | **/ | |
dea3101e | 2766 | void |
2767 | lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit) | |
2768 | { | |
2769 | int t; | |
2770 | uint32_t *HashWorking; | |
2e0fef85 | 2771 | uint32_t *pwwnn = (uint32_t *) phba->wwnn; |
dea3101e | 2772 | |
bbfbbbc1 | 2773 | HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL); |
dea3101e | 2774 | if (!HashWorking) |
2775 | return; | |
2776 | ||
dea3101e | 2777 | HashWorking[0] = HashWorking[78] = *pwwnn++; |
2778 | HashWorking[1] = HashWorking[79] = *pwwnn; | |
2779 | ||
2780 | for (t = 0; t < 7; t++) | |
2781 | lpfc_challenge_key(phba->RandomData + t, HashWorking + t); | |
2782 | ||
2783 | lpfc_sha_init(hbainit); | |
2784 | lpfc_sha_iterate(hbainit, HashWorking); | |
2785 | kfree(HashWorking); | |
2786 | } | |
2787 | ||
e59058c4 | 2788 | /** |
3621a710 | 2789 | * lpfc_cleanup - Performs vport cleanups before deleting a vport |
e59058c4 JS |
2790 | * @vport: pointer to a virtual N_Port data structure. |
2791 | * | |
2792 | * This routine performs the necessary cleanups before deleting the @vport. | |
2793 | * It invokes the discovery state machine to perform necessary state | |
2794 | * transitions and to release the ndlps associated with the @vport. Note, | |
2795 | * the physical port is treated as @vport 0. | |
2796 | **/ | |
87af33fe | 2797 | void |
2e0fef85 | 2798 | lpfc_cleanup(struct lpfc_vport *vport) |
dea3101e | 2799 | { |
87af33fe | 2800 | struct lpfc_hba *phba = vport->phba; |
dea3101e | 2801 | struct lpfc_nodelist *ndlp, *next_ndlp; |
a8adb832 | 2802 | int i = 0; |
dea3101e | 2803 | |
87af33fe JS |
2804 | if (phba->link_state > LPFC_LINK_DOWN) |
2805 | lpfc_port_link_failure(vport); | |
2806 | ||
2807 | list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) { | |
e47c9093 JS |
2808 | if (!NLP_CHK_NODE_ACT(ndlp)) { |
2809 | ndlp = lpfc_enable_node(vport, ndlp, | |
2810 | NLP_STE_UNUSED_NODE); | |
2811 | if (!ndlp) | |
2812 | continue; | |
2813 | spin_lock_irq(&phba->ndlp_lock); | |
2814 | NLP_SET_FREE_REQ(ndlp); | |
2815 | spin_unlock_irq(&phba->ndlp_lock); | |
2816 | /* Trigger the release of the ndlp memory */ | |
2817 | lpfc_nlp_put(ndlp); | |
2818 | continue; | |
2819 | } | |
2820 | spin_lock_irq(&phba->ndlp_lock); | |
2821 | if (NLP_CHK_FREE_REQ(ndlp)) { | |
2822 | /* The ndlp should not be in memory free mode already */ | |
2823 | spin_unlock_irq(&phba->ndlp_lock); | |
2824 | continue; | |
2825 | } else | |
2826 | /* Indicate request for freeing ndlp memory */ | |
2827 | NLP_SET_FREE_REQ(ndlp); | |
2828 | spin_unlock_irq(&phba->ndlp_lock); | |
2829 | ||
58da1ffb JS |
2830 | if (vport->port_type != LPFC_PHYSICAL_PORT && |
2831 | ndlp->nlp_DID == Fabric_DID) { | |
2832 | /* Just free up ndlp with Fabric_DID for vports */ | |
2833 | lpfc_nlp_put(ndlp); | |
2834 | continue; | |
2835 | } | |
2836 | ||
eff4a01b JS |
2837 | /* take care of nodes in unused state before the state |
2838 | * machine taking action. | |
2839 | */ | |
2840 | if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) { | |
2841 | lpfc_nlp_put(ndlp); | |
2842 | continue; | |
2843 | } | |
2844 | ||
87af33fe JS |
2845 | if (ndlp->nlp_type & NLP_FABRIC) |
2846 | lpfc_disc_state_machine(vport, ndlp, NULL, | |
2847 | NLP_EVT_DEVICE_RECOVERY); | |
e47c9093 | 2848 | |
87af33fe JS |
2849 | lpfc_disc_state_machine(vport, ndlp, NULL, |
2850 | NLP_EVT_DEVICE_RM); | |
2851 | } | |
2852 | ||
a8adb832 JS |
2853 | /* At this point, ALL ndlp's should be gone |
2854 | * because of the previous NLP_EVT_DEVICE_RM. | |
2855 | * Lets wait for this to happen, if needed. | |
2856 | */ | |
87af33fe | 2857 | while (!list_empty(&vport->fc_nodes)) { |
a8adb832 | 2858 | if (i++ > 3000) { |
87af33fe | 2859 | lpfc_printf_vlog(vport, KERN_ERR, LOG_DISCOVERY, |
a8adb832 | 2860 | "0233 Nodelist not empty\n"); |
e47c9093 JS |
2861 | list_for_each_entry_safe(ndlp, next_ndlp, |
2862 | &vport->fc_nodes, nlp_listp) { | |
2863 | lpfc_printf_vlog(ndlp->vport, KERN_ERR, | |
2864 | LOG_NODE, | |
d7c255b2 | 2865 | "0282 did:x%x ndlp:x%p " |
e47c9093 JS |
2866 | "usgmap:x%x refcnt:%d\n", |
2867 | ndlp->nlp_DID, (void *)ndlp, | |
2868 | ndlp->nlp_usg_map, | |
2c935bc5 | 2869 | kref_read(&ndlp->kref)); |
e47c9093 | 2870 | } |
a8adb832 | 2871 | break; |
87af33fe | 2872 | } |
a8adb832 JS |
2873 | |
2874 | /* Wait for any activity on ndlps to settle */ | |
2875 | msleep(10); | |
87af33fe | 2876 | } |
1151e3ec | 2877 | lpfc_cleanup_vports_rrqs(vport, NULL); |
dea3101e | 2878 | } |
2879 | ||
e59058c4 | 2880 | /** |
3621a710 | 2881 | * lpfc_stop_vport_timers - Stop all the timers associated with a vport |
e59058c4 JS |
2882 | * @vport: pointer to a virtual N_Port data structure. |
2883 | * | |
2884 | * This routine stops all the timers associated with a @vport. This function | |
2885 | * is invoked before disabling or deleting a @vport. Note that the physical | |
2886 | * port is treated as @vport 0. | |
2887 | **/ | |
92d7f7b0 JS |
2888 | void |
2889 | lpfc_stop_vport_timers(struct lpfc_vport *vport) | |
dea3101e | 2890 | { |
92d7f7b0 | 2891 | del_timer_sync(&vport->els_tmofunc); |
92494144 | 2892 | del_timer_sync(&vport->delayed_disc_tmo); |
92d7f7b0 JS |
2893 | lpfc_can_disctmo(vport); |
2894 | return; | |
dea3101e | 2895 | } |
2896 | ||
ecfd03c6 JS |
2897 | /** |
2898 | * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer | |
2899 | * @phba: pointer to lpfc hba data structure. | |
2900 | * | |
2901 | * This routine stops the SLI4 FCF rediscover wait timer if it's on. The | |
2902 | * caller of this routine should already hold the host lock. | |
2903 | **/ | |
2904 | void | |
2905 | __lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba) | |
2906 | { | |
5ac6b303 JS |
2907 | /* Clear pending FCF rediscovery wait flag */ |
2908 | phba->fcf.fcf_flag &= ~FCF_REDISC_PEND; | |
2909 | ||
ecfd03c6 JS |
2910 | /* Now, try to stop the timer */ |
2911 | del_timer(&phba->fcf.redisc_wait); | |
2912 | } | |
2913 | ||
2914 | /** | |
2915 | * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer | |
2916 | * @phba: pointer to lpfc hba data structure. | |
2917 | * | |
2918 | * This routine stops the SLI4 FCF rediscover wait timer if it's on. It | |
2919 | * checks whether the FCF rediscovery wait timer is pending with the host | |
2920 | * lock held before proceeding with disabling the timer and clearing the | |
2921 | * wait timer pendig flag. | |
2922 | **/ | |
2923 | void | |
2924 | lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba) | |
2925 | { | |
2926 | spin_lock_irq(&phba->hbalock); | |
2927 | if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) { | |
2928 | /* FCF rediscovery timer already fired or stopped */ | |
2929 | spin_unlock_irq(&phba->hbalock); | |
2930 | return; | |
2931 | } | |
2932 | __lpfc_sli4_stop_fcf_redisc_wait_timer(phba); | |
5ac6b303 JS |
2933 | /* Clear failover in progress flags */ |
2934 | phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC); | |
ecfd03c6 JS |
2935 | spin_unlock_irq(&phba->hbalock); |
2936 | } | |
2937 | ||
e59058c4 | 2938 | /** |
3772a991 | 2939 | * lpfc_stop_hba_timers - Stop all the timers associated with an HBA |
e59058c4 JS |
2940 | * @phba: pointer to lpfc hba data structure. |
2941 | * | |
2942 | * This routine stops all the timers associated with a HBA. This function is | |
2943 | * invoked before either putting a HBA offline or unloading the driver. | |
2944 | **/ | |
3772a991 JS |
2945 | void |
2946 | lpfc_stop_hba_timers(struct lpfc_hba *phba) | |
dea3101e | 2947 | { |
51ef4c26 | 2948 | lpfc_stop_vport_timers(phba->pport); |
2e0fef85 | 2949 | del_timer_sync(&phba->sli.mbox_tmo); |
92d7f7b0 | 2950 | del_timer_sync(&phba->fabric_block_timer); |
9399627f | 2951 | del_timer_sync(&phba->eratt_poll); |
3772a991 | 2952 | del_timer_sync(&phba->hb_tmofunc); |
1151e3ec JS |
2953 | if (phba->sli_rev == LPFC_SLI_REV4) { |
2954 | del_timer_sync(&phba->rrq_tmr); | |
2955 | phba->hba_flag &= ~HBA_RRQ_ACTIVE; | |
2956 | } | |
3772a991 JS |
2957 | phba->hb_outstanding = 0; |
2958 | ||
2959 | switch (phba->pci_dev_grp) { | |
2960 | case LPFC_PCI_DEV_LP: | |
2961 | /* Stop any LightPulse device specific driver timers */ | |
2962 | del_timer_sync(&phba->fcp_poll_timer); | |
2963 | break; | |
2964 | case LPFC_PCI_DEV_OC: | |
2965 | /* Stop any OneConnect device sepcific driver timers */ | |
ecfd03c6 | 2966 | lpfc_sli4_stop_fcf_redisc_wait_timer(phba); |
3772a991 JS |
2967 | break; |
2968 | default: | |
2969 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
2970 | "0297 Invalid device group (x%x)\n", | |
2971 | phba->pci_dev_grp); | |
2972 | break; | |
2973 | } | |
2e0fef85 | 2974 | return; |
dea3101e | 2975 | } |
2976 | ||
e59058c4 | 2977 | /** |
3621a710 | 2978 | * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked |
e59058c4 JS |
2979 | * @phba: pointer to lpfc hba data structure. |
2980 | * | |
2981 | * This routine marks a HBA's management interface as blocked. Once the HBA's | |
2982 | * management interface is marked as blocked, all the user space access to | |
2983 | * the HBA, whether they are from sysfs interface or libdfc interface will | |
2984 | * all be blocked. The HBA is set to block the management interface when the | |
2985 | * driver prepares the HBA interface for online or offline. | |
2986 | **/ | |
a6ababd2 | 2987 | static void |
618a5230 | 2988 | lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action) |
a6ababd2 AB |
2989 | { |
2990 | unsigned long iflag; | |
6e7288d9 JS |
2991 | uint8_t actcmd = MBX_HEARTBEAT; |
2992 | unsigned long timeout; | |
2993 | ||
a6ababd2 AB |
2994 | spin_lock_irqsave(&phba->hbalock, iflag); |
2995 | phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO; | |
618a5230 JS |
2996 | spin_unlock_irqrestore(&phba->hbalock, iflag); |
2997 | if (mbx_action == LPFC_MBX_NO_WAIT) | |
2998 | return; | |
2999 | timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies; | |
3000 | spin_lock_irqsave(&phba->hbalock, iflag); | |
a183a15f | 3001 | if (phba->sli.mbox_active) { |
6e7288d9 | 3002 | actcmd = phba->sli.mbox_active->u.mb.mbxCommand; |
a183a15f JS |
3003 | /* Determine how long we might wait for the active mailbox |
3004 | * command to be gracefully completed by firmware. | |
3005 | */ | |
3006 | timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, | |
3007 | phba->sli.mbox_active) * 1000) + jiffies; | |
3008 | } | |
a6ababd2 | 3009 | spin_unlock_irqrestore(&phba->hbalock, iflag); |
a183a15f | 3010 | |
6e7288d9 JS |
3011 | /* Wait for the outstnading mailbox command to complete */ |
3012 | while (phba->sli.mbox_active) { | |
3013 | /* Check active mailbox complete status every 2ms */ | |
3014 | msleep(2); | |
3015 | if (time_after(jiffies, timeout)) { | |
3016 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
3017 | "2813 Mgmt IO is Blocked %x " | |
3018 | "- mbox cmd %x still active\n", | |
3019 | phba->sli.sli_flag, actcmd); | |
3020 | break; | |
3021 | } | |
3022 | } | |
a6ababd2 AB |
3023 | } |
3024 | ||
6b5151fd JS |
3025 | /** |
3026 | * lpfc_sli4_node_prep - Assign RPIs for active nodes. | |
3027 | * @phba: pointer to lpfc hba data structure. | |
3028 | * | |
3029 | * Allocate RPIs for all active remote nodes. This is needed whenever | |
3030 | * an SLI4 adapter is reset and the driver is not unloading. Its purpose | |
3031 | * is to fixup the temporary rpi assignments. | |
3032 | **/ | |
3033 | void | |
3034 | lpfc_sli4_node_prep(struct lpfc_hba *phba) | |
3035 | { | |
3036 | struct lpfc_nodelist *ndlp, *next_ndlp; | |
3037 | struct lpfc_vport **vports; | |
9d3d340d JS |
3038 | int i, rpi; |
3039 | unsigned long flags; | |
6b5151fd JS |
3040 | |
3041 | if (phba->sli_rev != LPFC_SLI_REV4) | |
3042 | return; | |
3043 | ||
3044 | vports = lpfc_create_vport_work_array(phba); | |
9d3d340d JS |
3045 | if (vports == NULL) |
3046 | return; | |
6b5151fd | 3047 | |
9d3d340d JS |
3048 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { |
3049 | if (vports[i]->load_flag & FC_UNLOADING) | |
3050 | continue; | |
3051 | ||
3052 | list_for_each_entry_safe(ndlp, next_ndlp, | |
3053 | &vports[i]->fc_nodes, | |
3054 | nlp_listp) { | |
3055 | if (!NLP_CHK_NODE_ACT(ndlp)) | |
3056 | continue; | |
3057 | rpi = lpfc_sli4_alloc_rpi(phba); | |
3058 | if (rpi == LPFC_RPI_ALLOC_ERROR) { | |
3059 | spin_lock_irqsave(&phba->ndlp_lock, flags); | |
3060 | NLP_CLR_NODE_ACT(ndlp); | |
3061 | spin_unlock_irqrestore(&phba->ndlp_lock, flags); | |
3062 | continue; | |
6b5151fd | 3063 | } |
9d3d340d JS |
3064 | ndlp->nlp_rpi = rpi; |
3065 | lpfc_printf_vlog(ndlp->vport, KERN_INFO, LOG_NODE, | |
3066 | "0009 rpi:%x DID:%x " | |
3067 | "flg:%x map:%x %p\n", ndlp->nlp_rpi, | |
3068 | ndlp->nlp_DID, ndlp->nlp_flag, | |
3069 | ndlp->nlp_usg_map, ndlp); | |
6b5151fd JS |
3070 | } |
3071 | } | |
3072 | lpfc_destroy_vport_work_array(phba, vports); | |
3073 | } | |
3074 | ||
e59058c4 | 3075 | /** |
3621a710 | 3076 | * lpfc_online - Initialize and bring a HBA online |
e59058c4 JS |
3077 | * @phba: pointer to lpfc hba data structure. |
3078 | * | |
3079 | * This routine initializes the HBA and brings a HBA online. During this | |
3080 | * process, the management interface is blocked to prevent user space access | |
3081 | * to the HBA interfering with the driver initialization. | |
3082 | * | |
3083 | * Return codes | |
3084 | * 0 - successful | |
3085 | * 1 - failed | |
3086 | **/ | |
dea3101e | 3087 | int |
2e0fef85 | 3088 | lpfc_online(struct lpfc_hba *phba) |
dea3101e | 3089 | { |
372bd282 | 3090 | struct lpfc_vport *vport; |
549e55cd | 3091 | struct lpfc_vport **vports; |
a145fda3 | 3092 | int i, error = 0; |
16a3a208 | 3093 | bool vpis_cleared = false; |
2e0fef85 | 3094 | |
dea3101e | 3095 | if (!phba) |
3096 | return 0; | |
372bd282 | 3097 | vport = phba->pport; |
dea3101e | 3098 | |
2e0fef85 | 3099 | if (!(vport->fc_flag & FC_OFFLINE_MODE)) |
dea3101e | 3100 | return 0; |
3101 | ||
ed957684 | 3102 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, |
e8b62011 | 3103 | "0458 Bring Adapter online\n"); |
dea3101e | 3104 | |
618a5230 | 3105 | lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT); |
46fa311e | 3106 | |
da0436e9 JS |
3107 | if (phba->sli_rev == LPFC_SLI_REV4) { |
3108 | if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */ | |
3109 | lpfc_unblock_mgmt_io(phba); | |
3110 | return 1; | |
3111 | } | |
16a3a208 JS |
3112 | spin_lock_irq(&phba->hbalock); |
3113 | if (!phba->sli4_hba.max_cfg_param.vpi_used) | |
3114 | vpis_cleared = true; | |
3115 | spin_unlock_irq(&phba->hbalock); | |
a145fda3 DK |
3116 | |
3117 | /* Reestablish the local initiator port. | |
3118 | * The offline process destroyed the previous lport. | |
3119 | */ | |
3120 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME && | |
3121 | !phba->nvmet_support) { | |
3122 | error = lpfc_nvme_create_localport(phba->pport); | |
3123 | if (error) | |
3124 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
3125 | "6132 NVME restore reg failed " | |
3126 | "on nvmei error x%x\n", error); | |
3127 | } | |
0794d601 JS |
3128 | /* Don't post more new bufs if repost already recovered |
3129 | * the nvme sgls. | |
3130 | */ | |
3131 | if (phba->sli4_hba.common_xri_cnt == 0) { | |
3132 | i = lpfc_new_common_buf(phba, | |
3133 | phba->sli4_hba.common_xri_max); | |
3134 | if (i == 0) { | |
3135 | lpfc_unblock_mgmt_io(phba); | |
3136 | return 1; | |
3137 | } | |
3138 | phba->total_common_bufs += i; | |
3139 | } | |
da0436e9 | 3140 | } else { |
895427bd | 3141 | lpfc_sli_queue_init(phba); |
da0436e9 JS |
3142 | if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */ |
3143 | lpfc_unblock_mgmt_io(phba); | |
3144 | return 1; | |
3145 | } | |
46fa311e | 3146 | } |
dea3101e | 3147 | |
549e55cd | 3148 | vports = lpfc_create_vport_work_array(phba); |
aeb6641f | 3149 | if (vports != NULL) { |
da0436e9 | 3150 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { |
549e55cd JS |
3151 | struct Scsi_Host *shost; |
3152 | shost = lpfc_shost_from_vport(vports[i]); | |
3153 | spin_lock_irq(shost->host_lock); | |
3154 | vports[i]->fc_flag &= ~FC_OFFLINE_MODE; | |
3155 | if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED) | |
3156 | vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI; | |
16a3a208 | 3157 | if (phba->sli_rev == LPFC_SLI_REV4) { |
1c6834a7 | 3158 | vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI; |
16a3a208 JS |
3159 | if ((vpis_cleared) && |
3160 | (vports[i]->port_type != | |
3161 | LPFC_PHYSICAL_PORT)) | |
3162 | vports[i]->vpi = 0; | |
3163 | } | |
549e55cd JS |
3164 | spin_unlock_irq(shost->host_lock); |
3165 | } | |
aeb6641f AB |
3166 | } |
3167 | lpfc_destroy_vport_work_array(phba, vports); | |
dea3101e | 3168 | |
46fa311e | 3169 | lpfc_unblock_mgmt_io(phba); |
dea3101e | 3170 | return 0; |
3171 | } | |
3172 | ||
e59058c4 | 3173 | /** |
3621a710 | 3174 | * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked |
e59058c4 JS |
3175 | * @phba: pointer to lpfc hba data structure. |
3176 | * | |
3177 | * This routine marks a HBA's management interface as not blocked. Once the | |
3178 | * HBA's management interface is marked as not blocked, all the user space | |
3179 | * access to the HBA, whether they are from sysfs interface or libdfc | |
3180 | * interface will be allowed. The HBA is set to block the management interface | |
3181 | * when the driver prepares the HBA interface for online or offline and then | |
3182 | * set to unblock the management interface afterwards. | |
3183 | **/ | |
46fa311e JS |
3184 | void |
3185 | lpfc_unblock_mgmt_io(struct lpfc_hba * phba) | |
3186 | { | |
3187 | unsigned long iflag; | |
3188 | ||
2e0fef85 JS |
3189 | spin_lock_irqsave(&phba->hbalock, iflag); |
3190 | phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO; | |
3191 | spin_unlock_irqrestore(&phba->hbalock, iflag); | |
46fa311e JS |
3192 | } |
3193 | ||
e59058c4 | 3194 | /** |
3621a710 | 3195 | * lpfc_offline_prep - Prepare a HBA to be brought offline |
e59058c4 JS |
3196 | * @phba: pointer to lpfc hba data structure. |
3197 | * | |
3198 | * This routine is invoked to prepare a HBA to be brought offline. It performs | |
3199 | * unregistration login to all the nodes on all vports and flushes the mailbox | |
3200 | * queue to make it ready to be brought offline. | |
3201 | **/ | |
46fa311e | 3202 | void |
618a5230 | 3203 | lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action) |
46fa311e | 3204 | { |
2e0fef85 | 3205 | struct lpfc_vport *vport = phba->pport; |
46fa311e | 3206 | struct lpfc_nodelist *ndlp, *next_ndlp; |
87af33fe | 3207 | struct lpfc_vport **vports; |
72100cc4 | 3208 | struct Scsi_Host *shost; |
87af33fe | 3209 | int i; |
dea3101e | 3210 | |
2e0fef85 | 3211 | if (vport->fc_flag & FC_OFFLINE_MODE) |
46fa311e | 3212 | return; |
dea3101e | 3213 | |
618a5230 | 3214 | lpfc_block_mgmt_io(phba, mbx_action); |
dea3101e | 3215 | |
3216 | lpfc_linkdown(phba); | |
3217 | ||
87af33fe JS |
3218 | /* Issue an unreg_login to all nodes on all vports */ |
3219 | vports = lpfc_create_vport_work_array(phba); | |
3220 | if (vports != NULL) { | |
da0436e9 | 3221 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { |
a8adb832 JS |
3222 | if (vports[i]->load_flag & FC_UNLOADING) |
3223 | continue; | |
72100cc4 JS |
3224 | shost = lpfc_shost_from_vport(vports[i]); |
3225 | spin_lock_irq(shost->host_lock); | |
c868595d | 3226 | vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED; |
695a814e JS |
3227 | vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI; |
3228 | vports[i]->fc_flag &= ~FC_VFI_REGISTERED; | |
72100cc4 | 3229 | spin_unlock_irq(shost->host_lock); |
695a814e | 3230 | |
87af33fe JS |
3231 | shost = lpfc_shost_from_vport(vports[i]); |
3232 | list_for_each_entry_safe(ndlp, next_ndlp, | |
3233 | &vports[i]->fc_nodes, | |
3234 | nlp_listp) { | |
e47c9093 JS |
3235 | if (!NLP_CHK_NODE_ACT(ndlp)) |
3236 | continue; | |
87af33fe JS |
3237 | if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) |
3238 | continue; | |
3239 | if (ndlp->nlp_type & NLP_FABRIC) { | |
3240 | lpfc_disc_state_machine(vports[i], ndlp, | |
3241 | NULL, NLP_EVT_DEVICE_RECOVERY); | |
3242 | lpfc_disc_state_machine(vports[i], ndlp, | |
3243 | NULL, NLP_EVT_DEVICE_RM); | |
3244 | } | |
3245 | spin_lock_irq(shost->host_lock); | |
3246 | ndlp->nlp_flag &= ~NLP_NPR_ADISC; | |
401ee0c1 | 3247 | spin_unlock_irq(shost->host_lock); |
6b5151fd JS |
3248 | /* |
3249 | * Whenever an SLI4 port goes offline, free the | |
401ee0c1 JS |
3250 | * RPI. Get a new RPI when the adapter port |
3251 | * comes back online. | |
6b5151fd | 3252 | */ |
be6bb941 JS |
3253 | if (phba->sli_rev == LPFC_SLI_REV4) { |
3254 | lpfc_printf_vlog(ndlp->vport, | |
3255 | KERN_INFO, LOG_NODE, | |
3256 | "0011 lpfc_offline: " | |
3257 | "ndlp:x%p did %x " | |
3258 | "usgmap:x%x rpi:%x\n", | |
3259 | ndlp, ndlp->nlp_DID, | |
3260 | ndlp->nlp_usg_map, | |
3261 | ndlp->nlp_rpi); | |
3262 | ||
6b5151fd | 3263 | lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi); |
be6bb941 | 3264 | } |
87af33fe JS |
3265 | lpfc_unreg_rpi(vports[i], ndlp); |
3266 | } | |
3267 | } | |
3268 | } | |
09372820 | 3269 | lpfc_destroy_vport_work_array(phba, vports); |
dea3101e | 3270 | |
618a5230 | 3271 | lpfc_sli_mbox_sys_shutdown(phba, mbx_action); |
f485c18d DK |
3272 | |
3273 | if (phba->wq) | |
3274 | flush_workqueue(phba->wq); | |
46fa311e JS |
3275 | } |
3276 | ||
e59058c4 | 3277 | /** |
3621a710 | 3278 | * lpfc_offline - Bring a HBA offline |
e59058c4 JS |
3279 | * @phba: pointer to lpfc hba data structure. |
3280 | * | |
3281 | * This routine actually brings a HBA offline. It stops all the timers | |
3282 | * associated with the HBA, brings down the SLI layer, and eventually | |
3283 | * marks the HBA as in offline state for the upper layer protocol. | |
3284 | **/ | |
46fa311e | 3285 | void |
2e0fef85 | 3286 | lpfc_offline(struct lpfc_hba *phba) |
46fa311e | 3287 | { |
549e55cd JS |
3288 | struct Scsi_Host *shost; |
3289 | struct lpfc_vport **vports; | |
3290 | int i; | |
46fa311e | 3291 | |
549e55cd | 3292 | if (phba->pport->fc_flag & FC_OFFLINE_MODE) |
46fa311e | 3293 | return; |
688a8863 | 3294 | |
da0436e9 JS |
3295 | /* stop port and all timers associated with this hba */ |
3296 | lpfc_stop_port(phba); | |
4b40d02b DK |
3297 | |
3298 | /* Tear down the local and target port registrations. The | |
3299 | * nvme transports need to cleanup. | |
3300 | */ | |
3301 | lpfc_nvmet_destroy_targetport(phba); | |
3302 | lpfc_nvme_destroy_localport(phba->pport); | |
3303 | ||
51ef4c26 JS |
3304 | vports = lpfc_create_vport_work_array(phba); |
3305 | if (vports != NULL) | |
da0436e9 | 3306 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) |
51ef4c26 | 3307 | lpfc_stop_vport_timers(vports[i]); |
09372820 | 3308 | lpfc_destroy_vport_work_array(phba, vports); |
92d7f7b0 | 3309 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, |
e8b62011 | 3310 | "0460 Bring Adapter offline\n"); |
dea3101e | 3311 | /* Bring down the SLI Layer and cleanup. The HBA is offline |
3312 | now. */ | |
3313 | lpfc_sli_hba_down(phba); | |
92d7f7b0 | 3314 | spin_lock_irq(&phba->hbalock); |
7054a606 | 3315 | phba->work_ha = 0; |
92d7f7b0 | 3316 | spin_unlock_irq(&phba->hbalock); |
549e55cd JS |
3317 | vports = lpfc_create_vport_work_array(phba); |
3318 | if (vports != NULL) | |
da0436e9 | 3319 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { |
549e55cd | 3320 | shost = lpfc_shost_from_vport(vports[i]); |
549e55cd JS |
3321 | spin_lock_irq(shost->host_lock); |
3322 | vports[i]->work_port_events = 0; | |
3323 | vports[i]->fc_flag |= FC_OFFLINE_MODE; | |
3324 | spin_unlock_irq(shost->host_lock); | |
3325 | } | |
09372820 | 3326 | lpfc_destroy_vport_work_array(phba, vports); |
dea3101e | 3327 | } |
3328 | ||
e59058c4 | 3329 | /** |
3621a710 | 3330 | * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists |
e59058c4 JS |
3331 | * @phba: pointer to lpfc hba data structure. |
3332 | * | |
3333 | * This routine is to free all the SCSI buffers and IOCBs from the driver | |
3334 | * list back to kernel. It is called from lpfc_pci_remove_one to free | |
3335 | * the internal resources before the device is removed from the system. | |
e59058c4 | 3336 | **/ |
8a9d2e80 | 3337 | static void |
2e0fef85 | 3338 | lpfc_scsi_free(struct lpfc_hba *phba) |
dea3101e | 3339 | { |
3340 | struct lpfc_scsi_buf *sb, *sb_next; | |
dea3101e | 3341 | |
895427bd JS |
3342 | if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)) |
3343 | return; | |
3344 | ||
2e0fef85 | 3345 | spin_lock_irq(&phba->hbalock); |
a40fc5f0 | 3346 | |
dea3101e | 3347 | /* Release all the lpfc_scsi_bufs maintained by this host. */ |
a40fc5f0 JS |
3348 | |
3349 | spin_lock(&phba->scsi_buf_list_put_lock); | |
3350 | list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put, | |
3351 | list) { | |
dea3101e | 3352 | list_del(&sb->list); |
771db5c0 | 3353 | dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data, |
92d7f7b0 | 3354 | sb->dma_handle); |
dea3101e | 3355 | kfree(sb); |
3356 | phba->total_scsi_bufs--; | |
3357 | } | |
a40fc5f0 JS |
3358 | spin_unlock(&phba->scsi_buf_list_put_lock); |
3359 | ||
3360 | spin_lock(&phba->scsi_buf_list_get_lock); | |
3361 | list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get, | |
3362 | list) { | |
dea3101e | 3363 | list_del(&sb->list); |
771db5c0 | 3364 | dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data, |
92d7f7b0 | 3365 | sb->dma_handle); |
dea3101e | 3366 | kfree(sb); |
3367 | phba->total_scsi_bufs--; | |
3368 | } | |
a40fc5f0 | 3369 | spin_unlock(&phba->scsi_buf_list_get_lock); |
2e0fef85 | 3370 | spin_unlock_irq(&phba->hbalock); |
8a9d2e80 | 3371 | } |
0794d601 | 3372 | |
895427bd | 3373 | /** |
0794d601 | 3374 | * lpfc_common_free - Free all the IO buffers and IOCBs from driver lists |
895427bd JS |
3375 | * @phba: pointer to lpfc hba data structure. |
3376 | * | |
0794d601 | 3377 | * This routine is to free all the IO buffers and IOCBs from the driver |
895427bd JS |
3378 | * list back to kernel. It is called from lpfc_pci_remove_one to free |
3379 | * the internal resources before the device is removed from the system. | |
3380 | **/ | |
3381 | static void | |
0794d601 | 3382 | lpfc_common_free(struct lpfc_hba *phba) |
895427bd JS |
3383 | { |
3384 | struct lpfc_nvme_buf *lpfc_ncmd, *lpfc_ncmd_next; | |
895427bd | 3385 | |
895427bd JS |
3386 | spin_lock_irq(&phba->hbalock); |
3387 | ||
3388 | /* Release all the lpfc_nvme_bufs maintained by this host. */ | |
0794d601 | 3389 | spin_lock(&phba->common_buf_list_put_lock); |
895427bd | 3390 | list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, |
0794d601 | 3391 | &phba->lpfc_common_buf_list_put, list) { |
895427bd | 3392 | list_del(&lpfc_ncmd->list); |
0794d601 | 3393 | phba->put_common_bufs--; |
771db5c0 | 3394 | dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data, |
895427bd JS |
3395 | lpfc_ncmd->dma_handle); |
3396 | kfree(lpfc_ncmd); | |
0794d601 | 3397 | phba->total_common_bufs--; |
895427bd | 3398 | } |
0794d601 | 3399 | spin_unlock(&phba->common_buf_list_put_lock); |
895427bd | 3400 | |
0794d601 | 3401 | spin_lock(&phba->common_buf_list_get_lock); |
895427bd | 3402 | list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, |
0794d601 | 3403 | &phba->lpfc_common_buf_list_get, list) { |
895427bd | 3404 | list_del(&lpfc_ncmd->list); |
0794d601 | 3405 | phba->get_common_bufs--; |
771db5c0 | 3406 | dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data, |
895427bd JS |
3407 | lpfc_ncmd->dma_handle); |
3408 | kfree(lpfc_ncmd); | |
0794d601 | 3409 | phba->total_common_bufs--; |
895427bd | 3410 | } |
0794d601 | 3411 | spin_unlock(&phba->common_buf_list_get_lock); |
895427bd JS |
3412 | spin_unlock_irq(&phba->hbalock); |
3413 | } | |
0794d601 | 3414 | |
8a9d2e80 | 3415 | /** |
895427bd | 3416 | * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping |
8a9d2e80 JS |
3417 | * @phba: pointer to lpfc hba data structure. |
3418 | * | |
3419 | * This routine first calculates the sizes of the current els and allocated | |
3420 | * scsi sgl lists, and then goes through all sgls to updates the physical | |
3421 | * XRIs assigned due to port function reset. During port initialization, the | |
3422 | * current els and allocated scsi sgl lists are 0s. | |
3423 | * | |
3424 | * Return codes | |
3425 | * 0 - successful (for now, it always returns 0) | |
3426 | **/ | |
3427 | int | |
895427bd | 3428 | lpfc_sli4_els_sgl_update(struct lpfc_hba *phba) |
8a9d2e80 JS |
3429 | { |
3430 | struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL; | |
895427bd | 3431 | uint16_t i, lxri, xri_cnt, els_xri_cnt; |
8a9d2e80 | 3432 | LIST_HEAD(els_sgl_list); |
8a9d2e80 JS |
3433 | int rc; |
3434 | ||
3435 | /* | |
3436 | * update on pci function's els xri-sgl list | |
3437 | */ | |
3438 | els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); | |
895427bd | 3439 | |
8a9d2e80 JS |
3440 | if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) { |
3441 | /* els xri-sgl expanded */ | |
3442 | xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt; | |
3443 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
3444 | "3157 ELS xri-sgl count increased from " | |
3445 | "%d to %d\n", phba->sli4_hba.els_xri_cnt, | |
3446 | els_xri_cnt); | |
3447 | /* allocate the additional els sgls */ | |
3448 | for (i = 0; i < xri_cnt; i++) { | |
3449 | sglq_entry = kzalloc(sizeof(struct lpfc_sglq), | |
3450 | GFP_KERNEL); | |
3451 | if (sglq_entry == NULL) { | |
3452 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
3453 | "2562 Failure to allocate an " | |
3454 | "ELS sgl entry:%d\n", i); | |
3455 | rc = -ENOMEM; | |
3456 | goto out_free_mem; | |
3457 | } | |
3458 | sglq_entry->buff_type = GEN_BUFF_TYPE; | |
3459 | sglq_entry->virt = lpfc_mbuf_alloc(phba, 0, | |
3460 | &sglq_entry->phys); | |
3461 | if (sglq_entry->virt == NULL) { | |
3462 | kfree(sglq_entry); | |
3463 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
3464 | "2563 Failure to allocate an " | |
3465 | "ELS mbuf:%d\n", i); | |
3466 | rc = -ENOMEM; | |
3467 | goto out_free_mem; | |
3468 | } | |
3469 | sglq_entry->sgl = sglq_entry->virt; | |
3470 | memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE); | |
3471 | sglq_entry->state = SGL_FREED; | |
3472 | list_add_tail(&sglq_entry->list, &els_sgl_list); | |
3473 | } | |
38c20673 | 3474 | spin_lock_irq(&phba->hbalock); |
895427bd JS |
3475 | spin_lock(&phba->sli4_hba.sgl_list_lock); |
3476 | list_splice_init(&els_sgl_list, | |
3477 | &phba->sli4_hba.lpfc_els_sgl_list); | |
3478 | spin_unlock(&phba->sli4_hba.sgl_list_lock); | |
38c20673 | 3479 | spin_unlock_irq(&phba->hbalock); |
8a9d2e80 JS |
3480 | } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) { |
3481 | /* els xri-sgl shrinked */ | |
3482 | xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt; | |
3483 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
3484 | "3158 ELS xri-sgl count decreased from " | |
3485 | "%d to %d\n", phba->sli4_hba.els_xri_cnt, | |
3486 | els_xri_cnt); | |
3487 | spin_lock_irq(&phba->hbalock); | |
895427bd JS |
3488 | spin_lock(&phba->sli4_hba.sgl_list_lock); |
3489 | list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, | |
3490 | &els_sgl_list); | |
8a9d2e80 JS |
3491 | /* release extra els sgls from list */ |
3492 | for (i = 0; i < xri_cnt; i++) { | |
3493 | list_remove_head(&els_sgl_list, | |
3494 | sglq_entry, struct lpfc_sglq, list); | |
3495 | if (sglq_entry) { | |
895427bd JS |
3496 | __lpfc_mbuf_free(phba, sglq_entry->virt, |
3497 | sglq_entry->phys); | |
8a9d2e80 JS |
3498 | kfree(sglq_entry); |
3499 | } | |
3500 | } | |
895427bd JS |
3501 | list_splice_init(&els_sgl_list, |
3502 | &phba->sli4_hba.lpfc_els_sgl_list); | |
3503 | spin_unlock(&phba->sli4_hba.sgl_list_lock); | |
8a9d2e80 JS |
3504 | spin_unlock_irq(&phba->hbalock); |
3505 | } else | |
3506 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
3507 | "3163 ELS xri-sgl count unchanged: %d\n", | |
3508 | els_xri_cnt); | |
3509 | phba->sli4_hba.els_xri_cnt = els_xri_cnt; | |
3510 | ||
3511 | /* update xris to els sgls on the list */ | |
3512 | sglq_entry = NULL; | |
3513 | sglq_entry_next = NULL; | |
3514 | list_for_each_entry_safe(sglq_entry, sglq_entry_next, | |
895427bd | 3515 | &phba->sli4_hba.lpfc_els_sgl_list, list) { |
8a9d2e80 JS |
3516 | lxri = lpfc_sli4_next_xritag(phba); |
3517 | if (lxri == NO_XRI) { | |
3518 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
3519 | "2400 Failed to allocate xri for " | |
3520 | "ELS sgl\n"); | |
3521 | rc = -ENOMEM; | |
3522 | goto out_free_mem; | |
3523 | } | |
3524 | sglq_entry->sli4_lxritag = lxri; | |
3525 | sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; | |
3526 | } | |
895427bd JS |
3527 | return 0; |
3528 | ||
3529 | out_free_mem: | |
3530 | lpfc_free_els_sgl_list(phba); | |
3531 | return rc; | |
3532 | } | |
3533 | ||
f358dd0c JS |
3534 | /** |
3535 | * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping | |
3536 | * @phba: pointer to lpfc hba data structure. | |
3537 | * | |
3538 | * This routine first calculates the sizes of the current els and allocated | |
3539 | * scsi sgl lists, and then goes through all sgls to updates the physical | |
3540 | * XRIs assigned due to port function reset. During port initialization, the | |
3541 | * current els and allocated scsi sgl lists are 0s. | |
3542 | * | |
3543 | * Return codes | |
3544 | * 0 - successful (for now, it always returns 0) | |
3545 | **/ | |
3546 | int | |
3547 | lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba) | |
3548 | { | |
3549 | struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL; | |
3550 | uint16_t i, lxri, xri_cnt, els_xri_cnt; | |
6c621a22 | 3551 | uint16_t nvmet_xri_cnt; |
f358dd0c JS |
3552 | LIST_HEAD(nvmet_sgl_list); |
3553 | int rc; | |
3554 | ||
3555 | /* | |
3556 | * update on pci function's nvmet xri-sgl list | |
3557 | */ | |
3558 | els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); | |
61f3d4bf | 3559 | |
6c621a22 JS |
3560 | /* For NVMET, ALL remaining XRIs are dedicated for IO processing */ |
3561 | nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt; | |
f358dd0c JS |
3562 | if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) { |
3563 | /* els xri-sgl expanded */ | |
3564 | xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt; | |
3565 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
3566 | "6302 NVMET xri-sgl cnt grew from %d to %d\n", | |
3567 | phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt); | |
3568 | /* allocate the additional nvmet sgls */ | |
3569 | for (i = 0; i < xri_cnt; i++) { | |
3570 | sglq_entry = kzalloc(sizeof(struct lpfc_sglq), | |
3571 | GFP_KERNEL); | |
3572 | if (sglq_entry == NULL) { | |
3573 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
3574 | "6303 Failure to allocate an " | |
3575 | "NVMET sgl entry:%d\n", i); | |
3576 | rc = -ENOMEM; | |
3577 | goto out_free_mem; | |
3578 | } | |
3579 | sglq_entry->buff_type = NVMET_BUFF_TYPE; | |
3580 | sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0, | |
3581 | &sglq_entry->phys); | |
3582 | if (sglq_entry->virt == NULL) { | |
3583 | kfree(sglq_entry); | |
3584 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
3585 | "6304 Failure to allocate an " | |
3586 | "NVMET buf:%d\n", i); | |
3587 | rc = -ENOMEM; | |
3588 | goto out_free_mem; | |
3589 | } | |
3590 | sglq_entry->sgl = sglq_entry->virt; | |
3591 | memset(sglq_entry->sgl, 0, | |
3592 | phba->cfg_sg_dma_buf_size); | |
3593 | sglq_entry->state = SGL_FREED; | |
3594 | list_add_tail(&sglq_entry->list, &nvmet_sgl_list); | |
3595 | } | |
3596 | spin_lock_irq(&phba->hbalock); | |
3597 | spin_lock(&phba->sli4_hba.sgl_list_lock); | |
3598 | list_splice_init(&nvmet_sgl_list, | |
3599 | &phba->sli4_hba.lpfc_nvmet_sgl_list); | |
3600 | spin_unlock(&phba->sli4_hba.sgl_list_lock); | |
3601 | spin_unlock_irq(&phba->hbalock); | |
3602 | } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) { | |
3603 | /* nvmet xri-sgl shrunk */ | |
3604 | xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt; | |
3605 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
3606 | "6305 NVMET xri-sgl count decreased from " | |
3607 | "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt, | |
3608 | nvmet_xri_cnt); | |
3609 | spin_lock_irq(&phba->hbalock); | |
3610 | spin_lock(&phba->sli4_hba.sgl_list_lock); | |
3611 | list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, | |
3612 | &nvmet_sgl_list); | |
3613 | /* release extra nvmet sgls from list */ | |
3614 | for (i = 0; i < xri_cnt; i++) { | |
3615 | list_remove_head(&nvmet_sgl_list, | |
3616 | sglq_entry, struct lpfc_sglq, list); | |
3617 | if (sglq_entry) { | |
3618 | lpfc_nvmet_buf_free(phba, sglq_entry->virt, | |
3619 | sglq_entry->phys); | |
3620 | kfree(sglq_entry); | |
3621 | } | |
3622 | } | |
3623 | list_splice_init(&nvmet_sgl_list, | |
3624 | &phba->sli4_hba.lpfc_nvmet_sgl_list); | |
3625 | spin_unlock(&phba->sli4_hba.sgl_list_lock); | |
3626 | spin_unlock_irq(&phba->hbalock); | |
3627 | } else | |
3628 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
3629 | "6306 NVMET xri-sgl count unchanged: %d\n", | |
3630 | nvmet_xri_cnt); | |
3631 | phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt; | |
3632 | ||
3633 | /* update xris to nvmet sgls on the list */ | |
3634 | sglq_entry = NULL; | |
3635 | sglq_entry_next = NULL; | |
3636 | list_for_each_entry_safe(sglq_entry, sglq_entry_next, | |
3637 | &phba->sli4_hba.lpfc_nvmet_sgl_list, list) { | |
3638 | lxri = lpfc_sli4_next_xritag(phba); | |
3639 | if (lxri == NO_XRI) { | |
3640 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
3641 | "6307 Failed to allocate xri for " | |
3642 | "NVMET sgl\n"); | |
3643 | rc = -ENOMEM; | |
3644 | goto out_free_mem; | |
3645 | } | |
3646 | sglq_entry->sli4_lxritag = lxri; | |
3647 | sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; | |
3648 | } | |
3649 | return 0; | |
3650 | ||
3651 | out_free_mem: | |
3652 | lpfc_free_nvmet_sgl_list(phba); | |
3653 | return rc; | |
3654 | } | |
3655 | ||
895427bd | 3656 | /** |
0794d601 | 3657 | * lpfc_sli4_common_sgl_update - update xri-sgl sizing and mapping |
895427bd JS |
3658 | * @phba: pointer to lpfc hba data structure. |
3659 | * | |
3660 | * This routine first calculates the sizes of the current els and allocated | |
3661 | * scsi sgl lists, and then goes through all sgls to updates the physical | |
3662 | * XRIs assigned due to port function reset. During port initialization, the | |
3663 | * current els and allocated scsi sgl lists are 0s. | |
3664 | * | |
3665 | * Return codes | |
3666 | * 0 - successful (for now, it always returns 0) | |
3667 | **/ | |
3668 | int | |
0794d601 | 3669 | lpfc_sli4_common_sgl_update(struct lpfc_hba *phba) |
895427bd | 3670 | { |
0794d601 JS |
3671 | struct lpfc_nvme_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL; |
3672 | uint16_t i, lxri, els_xri_cnt; | |
3673 | uint16_t common_xri_cnt, common_xri_max; | |
3674 | LIST_HEAD(common_sgl_list); | |
3675 | int rc, cnt; | |
8a9d2e80 | 3676 | |
0794d601 JS |
3677 | phba->total_common_bufs = 0; |
3678 | phba->get_common_bufs = 0; | |
3679 | phba->put_common_bufs = 0; | |
8a9d2e80 | 3680 | |
895427bd | 3681 | /* |
0794d601 | 3682 | * update on pci function's allocated nvme xri-sgl list |
895427bd | 3683 | */ |
8a9d2e80 | 3684 | |
0794d601 JS |
3685 | /* maximum number of xris available for nvme buffers */ |
3686 | els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); | |
3687 | common_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt; | |
3688 | phba->sli4_hba.common_xri_max = common_xri_max; | |
8a9d2e80 | 3689 | |
e8c0a779 | 3690 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, |
0794d601 JS |
3691 | "6074 Current allocated XRI sgl count:%d, " |
3692 | "maximum XRI count:%d\n", | |
3693 | phba->sli4_hba.common_xri_cnt, | |
3694 | phba->sli4_hba.common_xri_max); | |
3695 | ||
3696 | spin_lock_irq(&phba->common_buf_list_get_lock); | |
3697 | spin_lock(&phba->common_buf_list_put_lock); | |
3698 | list_splice_init(&phba->lpfc_common_buf_list_get, &common_sgl_list); | |
3699 | list_splice(&phba->lpfc_common_buf_list_put, &common_sgl_list); | |
3700 | cnt = phba->get_common_bufs + phba->put_common_bufs; | |
3701 | phba->get_common_bufs = 0; | |
3702 | phba->put_common_bufs = 0; | |
3703 | spin_unlock(&phba->common_buf_list_put_lock); | |
3704 | spin_unlock_irq(&phba->common_buf_list_get_lock); | |
3705 | ||
3706 | if (phba->sli4_hba.common_xri_cnt > phba->sli4_hba.common_xri_max) { | |
3707 | /* max nvme xri shrunk below the allocated nvme buffers */ | |
3708 | spin_lock_irq(&phba->common_buf_list_get_lock); | |
3709 | common_xri_cnt = phba->sli4_hba.common_xri_cnt - | |
3710 | phba->sli4_hba.common_xri_max; | |
3711 | spin_unlock_irq(&phba->common_buf_list_get_lock); | |
3712 | /* release the extra allocated nvme buffers */ | |
3713 | for (i = 0; i < common_xri_cnt; i++) { | |
3714 | list_remove_head(&common_sgl_list, lpfc_ncmd, | |
3715 | struct lpfc_nvme_buf, list); | |
3716 | if (lpfc_ncmd) { | |
771db5c0 | 3717 | dma_pool_free(phba->lpfc_sg_dma_buf_pool, |
0794d601 JS |
3718 | lpfc_ncmd->data, |
3719 | lpfc_ncmd->dma_handle); | |
3720 | kfree(lpfc_ncmd); | |
a2fc4aef | 3721 | } |
8a9d2e80 | 3722 | } |
0794d601 JS |
3723 | spin_lock_irq(&phba->common_buf_list_get_lock); |
3724 | phba->sli4_hba.common_xri_cnt -= common_xri_cnt; | |
3725 | spin_unlock_irq(&phba->common_buf_list_get_lock); | |
8a9d2e80 JS |
3726 | } |
3727 | ||
0794d601 JS |
3728 | /* update xris associated to remaining allocated nvme buffers */ |
3729 | lpfc_ncmd = NULL; | |
3730 | lpfc_ncmd_next = NULL; | |
3731 | list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, | |
3732 | &common_sgl_list, list) { | |
8a9d2e80 JS |
3733 | lxri = lpfc_sli4_next_xritag(phba); |
3734 | if (lxri == NO_XRI) { | |
3735 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
0794d601 JS |
3736 | "6075 Failed to allocate xri for " |
3737 | "nvme buffer\n"); | |
8a9d2e80 JS |
3738 | rc = -ENOMEM; |
3739 | goto out_free_mem; | |
3740 | } | |
0794d601 JS |
3741 | lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri; |
3742 | lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri]; | |
8a9d2e80 | 3743 | } |
0794d601 JS |
3744 | spin_lock_irq(&phba->common_buf_list_get_lock); |
3745 | spin_lock(&phba->common_buf_list_put_lock); | |
3746 | list_splice_init(&common_sgl_list, &phba->lpfc_common_buf_list_get); | |
3747 | phba->get_common_bufs = cnt; | |
3748 | INIT_LIST_HEAD(&phba->lpfc_common_buf_list_put); | |
3749 | spin_unlock(&phba->common_buf_list_put_lock); | |
3750 | spin_unlock_irq(&phba->common_buf_list_get_lock); | |
dea3101e | 3751 | return 0; |
8a9d2e80 JS |
3752 | |
3753 | out_free_mem: | |
0794d601 | 3754 | lpfc_common_free(phba); |
8a9d2e80 | 3755 | return rc; |
dea3101e | 3756 | } |
3757 | ||
0794d601 JS |
3758 | /** |
3759 | * lpfc_new_common_buf - IO buffer allocator for HBA with SLI4 IF spec | |
3760 | * @vport: The virtual port for which this call being executed. | |
3761 | * @num_to_allocate: The requested number of buffers to allocate. | |
3762 | * | |
3763 | * This routine allocates nvme buffers for device with SLI-4 interface spec, | |
3764 | * the nvme buffer contains all the necessary information needed to initiate | |
3765 | * an I/O. After allocating up to @num_to_allocate IO buffers and put | |
3766 | * them on a list, it post them to the port by using SGL block post. | |
3767 | * | |
3768 | * Return codes: | |
3769 | * int - number of nvme buffers that were allocated and posted. | |
3770 | * 0 = failure, less than num_to_alloc is a partial failure. | |
3771 | **/ | |
3772 | int | |
3773 | lpfc_new_common_buf(struct lpfc_hba *phba, int num_to_alloc) | |
3774 | { | |
3775 | struct lpfc_nvme_buf *lpfc_ncmd; | |
3776 | struct lpfc_iocbq *pwqeq; | |
3777 | uint16_t iotag, lxri = 0; | |
3778 | int bcnt, num_posted; | |
3779 | LIST_HEAD(prep_nblist); | |
3780 | LIST_HEAD(post_nblist); | |
3781 | LIST_HEAD(nvme_nblist); | |
3782 | ||
3783 | /* Sanity check to ensure our sizing is right for both SCSI and NVME */ | |
3784 | if ((sizeof(struct lpfc_scsi_buf) > LPFC_COMMON_IO_BUF_SZ) || | |
3785 | (sizeof(struct lpfc_nvme_buf) > LPFC_COMMON_IO_BUF_SZ)) { | |
3786 | lpfc_printf_log(phba, KERN_ERR, LOG_FCP, | |
3787 | "6426 Common buffer size mismatch: %ld %ld\n", | |
3788 | sizeof(struct lpfc_scsi_buf), | |
3789 | sizeof(struct lpfc_nvme_buf)); | |
3790 | return 0; | |
3791 | } | |
3792 | ||
3793 | for (bcnt = 0; bcnt < num_to_alloc; bcnt++) { | |
3794 | lpfc_ncmd = kzalloc(LPFC_COMMON_IO_BUF_SZ, GFP_KERNEL); | |
3795 | if (!lpfc_ncmd) | |
3796 | break; | |
3797 | /* | |
3798 | * Get memory from the pci pool to map the virt space to | |
3799 | * pci bus space for an I/O. The DMA buffer includes the | |
3800 | * number of SGE's necessary to support the sg_tablesize. | |
3801 | */ | |
3802 | lpfc_ncmd->data = dma_pool_alloc(phba->lpfc_sg_dma_buf_pool, | |
3803 | GFP_KERNEL, | |
3804 | &lpfc_ncmd->dma_handle); | |
3805 | if (!lpfc_ncmd->data) { | |
3806 | kfree(lpfc_ncmd); | |
3807 | break; | |
3808 | } | |
3809 | memset(lpfc_ncmd->data, 0, phba->cfg_sg_dma_buf_size); | |
3810 | ||
3811 | /* | |
3812 | * 4K Page alignment is CRITICAL to BlockGuard, double check | |
3813 | * to be sure. | |
3814 | */ | |
3815 | if ((phba->sli3_options & LPFC_SLI3_BG_ENABLED) && | |
3816 | (((unsigned long)(lpfc_ncmd->data) & | |
3817 | (unsigned long)(SLI4_PAGE_SIZE - 1)) != 0)) { | |
3818 | lpfc_printf_log(phba, KERN_ERR, LOG_FCP, | |
3819 | "3369 Memory alignment err: addr=%lx\n", | |
3820 | (unsigned long)lpfc_ncmd->data); | |
3821 | dma_pool_free(phba->lpfc_sg_dma_buf_pool, | |
3822 | lpfc_ncmd->data, lpfc_ncmd->dma_handle); | |
3823 | kfree(lpfc_ncmd); | |
3824 | break; | |
3825 | } | |
3826 | ||
3827 | lxri = lpfc_sli4_next_xritag(phba); | |
3828 | if (lxri == NO_XRI) { | |
3829 | dma_pool_free(phba->lpfc_sg_dma_buf_pool, | |
3830 | lpfc_ncmd->data, lpfc_ncmd->dma_handle); | |
3831 | kfree(lpfc_ncmd); | |
3832 | break; | |
3833 | } | |
3834 | pwqeq = &lpfc_ncmd->cur_iocbq; | |
3835 | ||
3836 | /* Allocate iotag for lpfc_ncmd->cur_iocbq. */ | |
3837 | iotag = lpfc_sli_next_iotag(phba, pwqeq); | |
3838 | if (iotag == 0) { | |
3839 | dma_pool_free(phba->lpfc_sg_dma_buf_pool, | |
3840 | lpfc_ncmd->data, lpfc_ncmd->dma_handle); | |
3841 | kfree(lpfc_ncmd); | |
3842 | lpfc_printf_log(phba, KERN_ERR, LOG_NVME_IOERR, | |
3843 | "6121 Failed to allocate IOTAG for" | |
3844 | " XRI:0x%x\n", lxri); | |
3845 | lpfc_sli4_free_xri(phba, lxri); | |
3846 | break; | |
3847 | } | |
3848 | pwqeq->sli4_lxritag = lxri; | |
3849 | pwqeq->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; | |
3850 | pwqeq->context1 = lpfc_ncmd; | |
3851 | ||
3852 | /* Initialize local short-hand pointers. */ | |
3853 | lpfc_ncmd->dma_sgl = lpfc_ncmd->data; | |
3854 | lpfc_ncmd->dma_phys_sgl = lpfc_ncmd->dma_handle; | |
3855 | lpfc_ncmd->cur_iocbq.context1 = lpfc_ncmd; | |
3856 | ||
3857 | /* add the nvme buffer to a post list */ | |
3858 | list_add_tail(&lpfc_ncmd->list, &post_nblist); | |
3859 | spin_lock_irq(&phba->common_buf_list_get_lock); | |
3860 | phba->sli4_hba.common_xri_cnt++; | |
3861 | spin_unlock_irq(&phba->common_buf_list_get_lock); | |
3862 | } | |
3863 | lpfc_printf_log(phba, KERN_INFO, LOG_NVME, | |
3864 | "6114 Allocate %d out of %d requested new NVME " | |
3865 | "buffers\n", bcnt, num_to_alloc); | |
3866 | ||
3867 | /* post the list of nvme buffer sgls to port if available */ | |
3868 | if (!list_empty(&post_nblist)) | |
3869 | num_posted = lpfc_sli4_post_common_sgl_list( | |
3870 | phba, &post_nblist, bcnt); | |
3871 | else | |
3872 | num_posted = 0; | |
3873 | ||
3874 | return num_posted; | |
3875 | } | |
3876 | ||
96418b5e JS |
3877 | static uint64_t |
3878 | lpfc_get_wwpn(struct lpfc_hba *phba) | |
3879 | { | |
3880 | uint64_t wwn; | |
3881 | int rc; | |
3882 | LPFC_MBOXQ_t *mboxq; | |
3883 | MAILBOX_t *mb; | |
3884 | ||
96418b5e JS |
3885 | mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, |
3886 | GFP_KERNEL); | |
3887 | if (!mboxq) | |
3888 | return (uint64_t)-1; | |
3889 | ||
3890 | /* First get WWN of HBA instance */ | |
3891 | lpfc_read_nv(phba, mboxq); | |
3892 | rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
3893 | if (rc != MBX_SUCCESS) { | |
3894 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
3895 | "6019 Mailbox failed , mbxCmd x%x " | |
3896 | "READ_NV, mbxStatus x%x\n", | |
3897 | bf_get(lpfc_mqe_command, &mboxq->u.mqe), | |
3898 | bf_get(lpfc_mqe_status, &mboxq->u.mqe)); | |
3899 | mempool_free(mboxq, phba->mbox_mem_pool); | |
3900 | return (uint64_t) -1; | |
3901 | } | |
3902 | mb = &mboxq->u.mb; | |
3903 | memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t)); | |
3904 | /* wwn is WWPN of HBA instance */ | |
3905 | mempool_free(mboxq, phba->mbox_mem_pool); | |
3906 | if (phba->sli_rev == LPFC_SLI_REV4) | |
3907 | return be64_to_cpu(wwn); | |
3908 | else | |
286871a6 | 3909 | return rol64(wwn, 32); |
96418b5e JS |
3910 | } |
3911 | ||
e59058c4 | 3912 | /** |
3621a710 | 3913 | * lpfc_create_port - Create an FC port |
e59058c4 JS |
3914 | * @phba: pointer to lpfc hba data structure. |
3915 | * @instance: a unique integer ID to this FC port. | |
3916 | * @dev: pointer to the device data structure. | |
3917 | * | |
3918 | * This routine creates a FC port for the upper layer protocol. The FC port | |
3919 | * can be created on top of either a physical port or a virtual port provided | |
3920 | * by the HBA. This routine also allocates a SCSI host data structure (shost) | |
3921 | * and associates the FC port created before adding the shost into the SCSI | |
3922 | * layer. | |
3923 | * | |
3924 | * Return codes | |
3925 | * @vport - pointer to the virtual N_Port data structure. | |
3926 | * NULL - port create failed. | |
3927 | **/ | |
2e0fef85 | 3928 | struct lpfc_vport * |
3de2a653 | 3929 | lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev) |
47a8617c | 3930 | { |
2e0fef85 | 3931 | struct lpfc_vport *vport; |
895427bd | 3932 | struct Scsi_Host *shost = NULL; |
2e0fef85 | 3933 | int error = 0; |
96418b5e JS |
3934 | int i; |
3935 | uint64_t wwn; | |
3936 | bool use_no_reset_hba = false; | |
56bc8028 | 3937 | int rc; |
96418b5e | 3938 | |
56bc8028 JS |
3939 | if (lpfc_no_hba_reset_cnt) { |
3940 | if (phba->sli_rev < LPFC_SLI_REV4 && | |
3941 | dev == &phba->pcidev->dev) { | |
3942 | /* Reset the port first */ | |
3943 | lpfc_sli_brdrestart(phba); | |
3944 | rc = lpfc_sli_chipset_init(phba); | |
3945 | if (rc) | |
3946 | return NULL; | |
3947 | } | |
3948 | wwn = lpfc_get_wwpn(phba); | |
3949 | } | |
96418b5e JS |
3950 | |
3951 | for (i = 0; i < lpfc_no_hba_reset_cnt; i++) { | |
3952 | if (wwn == lpfc_no_hba_reset[i]) { | |
3953 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
3954 | "6020 Setting use_no_reset port=%llx\n", | |
3955 | wwn); | |
3956 | use_no_reset_hba = true; | |
3957 | break; | |
3958 | } | |
3959 | } | |
47a8617c | 3960 | |
895427bd JS |
3961 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) { |
3962 | if (dev != &phba->pcidev->dev) { | |
3963 | shost = scsi_host_alloc(&lpfc_vport_template, | |
3964 | sizeof(struct lpfc_vport)); | |
3965 | } else { | |
96418b5e | 3966 | if (!use_no_reset_hba) |
895427bd JS |
3967 | shost = scsi_host_alloc(&lpfc_template, |
3968 | sizeof(struct lpfc_vport)); | |
3969 | else | |
96418b5e | 3970 | shost = scsi_host_alloc(&lpfc_template_no_hr, |
895427bd JS |
3971 | sizeof(struct lpfc_vport)); |
3972 | } | |
3973 | } else if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
3974 | shost = scsi_host_alloc(&lpfc_template_nvme, | |
ea4142f6 JS |
3975 | sizeof(struct lpfc_vport)); |
3976 | } | |
2e0fef85 JS |
3977 | if (!shost) |
3978 | goto out; | |
47a8617c | 3979 | |
2e0fef85 JS |
3980 | vport = (struct lpfc_vport *) shost->hostdata; |
3981 | vport->phba = phba; | |
2e0fef85 | 3982 | vport->load_flag |= FC_LOADING; |
92d7f7b0 | 3983 | vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI; |
7f5f3d0d | 3984 | vport->fc_rscn_flush = 0; |
3de2a653 | 3985 | lpfc_get_vport_cfgparam(vport); |
895427bd | 3986 | |
2e0fef85 JS |
3987 | shost->unique_id = instance; |
3988 | shost->max_id = LPFC_MAX_TARGET; | |
3de2a653 | 3989 | shost->max_lun = vport->cfg_max_luns; |
2e0fef85 JS |
3990 | shost->this_id = -1; |
3991 | shost->max_cmd_len = 16; | |
8b0dff14 | 3992 | shost->nr_hw_queues = phba->cfg_fcp_io_channel; |
da0436e9 | 3993 | if (phba->sli_rev == LPFC_SLI_REV4) { |
28baac74 | 3994 | shost->dma_boundary = |
cb5172ea | 3995 | phba->sli4_hba.pc_sli4_params.sge_supp_len-1; |
5b9e70b2 | 3996 | shost->sg_tablesize = phba->cfg_scsi_seg_cnt; |
da0436e9 | 3997 | } |
81301a9b | 3998 | |
47a8617c | 3999 | /* |
2e0fef85 JS |
4000 | * Set initial can_queue value since 0 is no longer supported and |
4001 | * scsi_add_host will fail. This will be adjusted later based on the | |
4002 | * max xri value determined in hba setup. | |
47a8617c | 4003 | */ |
2e0fef85 | 4004 | shost->can_queue = phba->cfg_hba_queue_depth - 10; |
3de2a653 | 4005 | if (dev != &phba->pcidev->dev) { |
92d7f7b0 JS |
4006 | shost->transportt = lpfc_vport_transport_template; |
4007 | vport->port_type = LPFC_NPIV_PORT; | |
4008 | } else { | |
4009 | shost->transportt = lpfc_transport_template; | |
4010 | vport->port_type = LPFC_PHYSICAL_PORT; | |
4011 | } | |
47a8617c | 4012 | |
2e0fef85 JS |
4013 | /* Initialize all internally managed lists. */ |
4014 | INIT_LIST_HEAD(&vport->fc_nodes); | |
da0436e9 | 4015 | INIT_LIST_HEAD(&vport->rcv_buffer_list); |
2e0fef85 | 4016 | spin_lock_init(&vport->work_port_lock); |
47a8617c | 4017 | |
f22eb4d3 | 4018 | timer_setup(&vport->fc_disctmo, lpfc_disc_timeout, 0); |
47a8617c | 4019 | |
f22eb4d3 | 4020 | timer_setup(&vport->els_tmofunc, lpfc_els_timeout, 0); |
92494144 | 4021 | |
f22eb4d3 | 4022 | timer_setup(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo, 0); |
92494144 | 4023 | |
d139b9bd | 4024 | error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev); |
2e0fef85 JS |
4025 | if (error) |
4026 | goto out_put_shost; | |
47a8617c | 4027 | |
523128e5 | 4028 | spin_lock_irq(&phba->port_list_lock); |
2e0fef85 | 4029 | list_add_tail(&vport->listentry, &phba->port_list); |
523128e5 | 4030 | spin_unlock_irq(&phba->port_list_lock); |
2e0fef85 | 4031 | return vport; |
47a8617c | 4032 | |
2e0fef85 JS |
4033 | out_put_shost: |
4034 | scsi_host_put(shost); | |
4035 | out: | |
4036 | return NULL; | |
47a8617c JS |
4037 | } |
4038 | ||
e59058c4 | 4039 | /** |
3621a710 | 4040 | * destroy_port - destroy an FC port |
e59058c4 JS |
4041 | * @vport: pointer to an lpfc virtual N_Port data structure. |
4042 | * | |
4043 | * This routine destroys a FC port from the upper layer protocol. All the | |
4044 | * resources associated with the port are released. | |
4045 | **/ | |
2e0fef85 JS |
4046 | void |
4047 | destroy_port(struct lpfc_vport *vport) | |
47a8617c | 4048 | { |
92d7f7b0 JS |
4049 | struct Scsi_Host *shost = lpfc_shost_from_vport(vport); |
4050 | struct lpfc_hba *phba = vport->phba; | |
47a8617c | 4051 | |
858c9f6c | 4052 | lpfc_debugfs_terminate(vport); |
92d7f7b0 JS |
4053 | fc_remove_host(shost); |
4054 | scsi_remove_host(shost); | |
47a8617c | 4055 | |
523128e5 | 4056 | spin_lock_irq(&phba->port_list_lock); |
92d7f7b0 | 4057 | list_del_init(&vport->listentry); |
523128e5 | 4058 | spin_unlock_irq(&phba->port_list_lock); |
47a8617c | 4059 | |
92d7f7b0 | 4060 | lpfc_cleanup(vport); |
47a8617c | 4061 | return; |
47a8617c JS |
4062 | } |
4063 | ||
e59058c4 | 4064 | /** |
3621a710 | 4065 | * lpfc_get_instance - Get a unique integer ID |
e59058c4 JS |
4066 | * |
4067 | * This routine allocates a unique integer ID from lpfc_hba_index pool. It | |
4068 | * uses the kernel idr facility to perform the task. | |
4069 | * | |
4070 | * Return codes: | |
4071 | * instance - a unique integer ID allocated as the new instance. | |
4072 | * -1 - lpfc get instance failed. | |
4073 | **/ | |
92d7f7b0 JS |
4074 | int |
4075 | lpfc_get_instance(void) | |
4076 | { | |
ab516036 TH |
4077 | int ret; |
4078 | ||
4079 | ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL); | |
4080 | return ret < 0 ? -1 : ret; | |
47a8617c JS |
4081 | } |
4082 | ||
e59058c4 | 4083 | /** |
3621a710 | 4084 | * lpfc_scan_finished - method for SCSI layer to detect whether scan is done |
e59058c4 JS |
4085 | * @shost: pointer to SCSI host data structure. |
4086 | * @time: elapsed time of the scan in jiffies. | |
4087 | * | |
4088 | * This routine is called by the SCSI layer with a SCSI host to determine | |
4089 | * whether the scan host is finished. | |
4090 | * | |
4091 | * Note: there is no scan_start function as adapter initialization will have | |
4092 | * asynchronously kicked off the link initialization. | |
4093 | * | |
4094 | * Return codes | |
4095 | * 0 - SCSI host scan is not over yet. | |
4096 | * 1 - SCSI host scan is over. | |
4097 | **/ | |
47a8617c JS |
4098 | int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time) |
4099 | { | |
2e0fef85 JS |
4100 | struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; |
4101 | struct lpfc_hba *phba = vport->phba; | |
858c9f6c | 4102 | int stat = 0; |
47a8617c | 4103 | |
858c9f6c JS |
4104 | spin_lock_irq(shost->host_lock); |
4105 | ||
51ef4c26 | 4106 | if (vport->load_flag & FC_UNLOADING) { |
858c9f6c JS |
4107 | stat = 1; |
4108 | goto finished; | |
4109 | } | |
256ec0d0 | 4110 | if (time >= msecs_to_jiffies(30 * 1000)) { |
2e0fef85 | 4111 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
e8b62011 JS |
4112 | "0461 Scanning longer than 30 " |
4113 | "seconds. Continuing initialization\n"); | |
858c9f6c | 4114 | stat = 1; |
47a8617c | 4115 | goto finished; |
2e0fef85 | 4116 | } |
256ec0d0 JS |
4117 | if (time >= msecs_to_jiffies(15 * 1000) && |
4118 | phba->link_state <= LPFC_LINK_DOWN) { | |
2e0fef85 | 4119 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
e8b62011 JS |
4120 | "0465 Link down longer than 15 " |
4121 | "seconds. Continuing initialization\n"); | |
858c9f6c | 4122 | stat = 1; |
47a8617c | 4123 | goto finished; |
2e0fef85 | 4124 | } |
47a8617c | 4125 | |
2e0fef85 | 4126 | if (vport->port_state != LPFC_VPORT_READY) |
858c9f6c | 4127 | goto finished; |
2e0fef85 | 4128 | if (vport->num_disc_nodes || vport->fc_prli_sent) |
858c9f6c | 4129 | goto finished; |
256ec0d0 | 4130 | if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000)) |
858c9f6c | 4131 | goto finished; |
2e0fef85 | 4132 | if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0) |
858c9f6c JS |
4133 | goto finished; |
4134 | ||
4135 | stat = 1; | |
47a8617c JS |
4136 | |
4137 | finished: | |
858c9f6c JS |
4138 | spin_unlock_irq(shost->host_lock); |
4139 | return stat; | |
92d7f7b0 | 4140 | } |
47a8617c | 4141 | |
cd71348a JS |
4142 | void lpfc_host_supported_speeds_set(struct Scsi_Host *shost) |
4143 | { | |
4144 | struct lpfc_vport *vport = (struct lpfc_vport *)shost->hostdata; | |
4145 | struct lpfc_hba *phba = vport->phba; | |
4146 | ||
4147 | fc_host_supported_speeds(shost) = 0; | |
1dc5ec24 JS |
4148 | if (phba->lmt & LMT_128Gb) |
4149 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_128GBIT; | |
cd71348a JS |
4150 | if (phba->lmt & LMT_64Gb) |
4151 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_64GBIT; | |
4152 | if (phba->lmt & LMT_32Gb) | |
4153 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT; | |
4154 | if (phba->lmt & LMT_16Gb) | |
4155 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT; | |
4156 | if (phba->lmt & LMT_10Gb) | |
4157 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT; | |
4158 | if (phba->lmt & LMT_8Gb) | |
4159 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT; | |
4160 | if (phba->lmt & LMT_4Gb) | |
4161 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT; | |
4162 | if (phba->lmt & LMT_2Gb) | |
4163 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT; | |
4164 | if (phba->lmt & LMT_1Gb) | |
4165 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT; | |
4166 | } | |
4167 | ||
e59058c4 | 4168 | /** |
3621a710 | 4169 | * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port |
e59058c4 JS |
4170 | * @shost: pointer to SCSI host data structure. |
4171 | * | |
4172 | * This routine initializes a given SCSI host attributes on a FC port. The | |
4173 | * SCSI host can be either on top of a physical port or a virtual port. | |
4174 | **/ | |
92d7f7b0 JS |
4175 | void lpfc_host_attrib_init(struct Scsi_Host *shost) |
4176 | { | |
4177 | struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; | |
4178 | struct lpfc_hba *phba = vport->phba; | |
47a8617c | 4179 | /* |
2e0fef85 | 4180 | * Set fixed host attributes. Must done after lpfc_sli_hba_setup(). |
47a8617c JS |
4181 | */ |
4182 | ||
2e0fef85 JS |
4183 | fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn); |
4184 | fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn); | |
47a8617c JS |
4185 | fc_host_supported_classes(shost) = FC_COS_CLASS3; |
4186 | ||
4187 | memset(fc_host_supported_fc4s(shost), 0, | |
2e0fef85 | 4188 | sizeof(fc_host_supported_fc4s(shost))); |
47a8617c JS |
4189 | fc_host_supported_fc4s(shost)[2] = 1; |
4190 | fc_host_supported_fc4s(shost)[7] = 1; | |
4191 | ||
92d7f7b0 JS |
4192 | lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost), |
4193 | sizeof fc_host_symbolic_name(shost)); | |
47a8617c | 4194 | |
cd71348a | 4195 | lpfc_host_supported_speeds_set(shost); |
47a8617c JS |
4196 | |
4197 | fc_host_maxframe_size(shost) = | |
2e0fef85 JS |
4198 | (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) | |
4199 | (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb; | |
47a8617c | 4200 | |
0af5d708 MC |
4201 | fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo; |
4202 | ||
47a8617c JS |
4203 | /* This value is also unchanging */ |
4204 | memset(fc_host_active_fc4s(shost), 0, | |
2e0fef85 | 4205 | sizeof(fc_host_active_fc4s(shost))); |
47a8617c JS |
4206 | fc_host_active_fc4s(shost)[2] = 1; |
4207 | fc_host_active_fc4s(shost)[7] = 1; | |
4208 | ||
92d7f7b0 | 4209 | fc_host_max_npiv_vports(shost) = phba->max_vpi; |
47a8617c | 4210 | spin_lock_irq(shost->host_lock); |
51ef4c26 | 4211 | vport->load_flag &= ~FC_LOADING; |
47a8617c | 4212 | spin_unlock_irq(shost->host_lock); |
47a8617c | 4213 | } |
dea3101e | 4214 | |
e59058c4 | 4215 | /** |
da0436e9 | 4216 | * lpfc_stop_port_s3 - Stop SLI3 device port |
e59058c4 JS |
4217 | * @phba: pointer to lpfc hba data structure. |
4218 | * | |
da0436e9 JS |
4219 | * This routine is invoked to stop an SLI3 device port, it stops the device |
4220 | * from generating interrupts and stops the device driver's timers for the | |
4221 | * device. | |
e59058c4 | 4222 | **/ |
da0436e9 JS |
4223 | static void |
4224 | lpfc_stop_port_s3(struct lpfc_hba *phba) | |
db2378e0 | 4225 | { |
da0436e9 JS |
4226 | /* Clear all interrupt enable conditions */ |
4227 | writel(0, phba->HCregaddr); | |
4228 | readl(phba->HCregaddr); /* flush */ | |
4229 | /* Clear all pending interrupts */ | |
4230 | writel(0xffffffff, phba->HAregaddr); | |
4231 | readl(phba->HAregaddr); /* flush */ | |
db2378e0 | 4232 | |
da0436e9 JS |
4233 | /* Reset some HBA SLI setup states */ |
4234 | lpfc_stop_hba_timers(phba); | |
4235 | phba->pport->work_port_events = 0; | |
4236 | } | |
db2378e0 | 4237 | |
da0436e9 JS |
4238 | /** |
4239 | * lpfc_stop_port_s4 - Stop SLI4 device port | |
4240 | * @phba: pointer to lpfc hba data structure. | |
4241 | * | |
4242 | * This routine is invoked to stop an SLI4 device port, it stops the device | |
4243 | * from generating interrupts and stops the device driver's timers for the | |
4244 | * device. | |
4245 | **/ | |
4246 | static void | |
4247 | lpfc_stop_port_s4(struct lpfc_hba *phba) | |
4248 | { | |
4249 | /* Reset some HBA SLI4 setup states */ | |
4250 | lpfc_stop_hba_timers(phba); | |
4251 | phba->pport->work_port_events = 0; | |
4252 | phba->sli4_hba.intr_enable = 0; | |
da0436e9 | 4253 | } |
9399627f | 4254 | |
da0436e9 JS |
4255 | /** |
4256 | * lpfc_stop_port - Wrapper function for stopping hba port | |
4257 | * @phba: Pointer to HBA context object. | |
4258 | * | |
4259 | * This routine wraps the actual SLI3 or SLI4 hba stop port routine from | |
4260 | * the API jump table function pointer from the lpfc_hba struct. | |
4261 | **/ | |
4262 | void | |
4263 | lpfc_stop_port(struct lpfc_hba *phba) | |
4264 | { | |
4265 | phba->lpfc_stop_port(phba); | |
f485c18d DK |
4266 | |
4267 | if (phba->wq) | |
4268 | flush_workqueue(phba->wq); | |
da0436e9 | 4269 | } |
db2378e0 | 4270 | |
ecfd03c6 JS |
4271 | /** |
4272 | * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer | |
4273 | * @phba: Pointer to hba for which this call is being executed. | |
4274 | * | |
4275 | * This routine starts the timer waiting for the FCF rediscovery to complete. | |
4276 | **/ | |
4277 | void | |
4278 | lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba) | |
4279 | { | |
4280 | unsigned long fcf_redisc_wait_tmo = | |
4281 | (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO)); | |
4282 | /* Start fcf rediscovery wait period timer */ | |
4283 | mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo); | |
4284 | spin_lock_irq(&phba->hbalock); | |
4285 | /* Allow action to new fcf asynchronous event */ | |
4286 | phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE); | |
4287 | /* Mark the FCF rediscovery pending state */ | |
4288 | phba->fcf.fcf_flag |= FCF_REDISC_PEND; | |
4289 | spin_unlock_irq(&phba->hbalock); | |
4290 | } | |
4291 | ||
4292 | /** | |
4293 | * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout | |
4294 | * @ptr: Map to lpfc_hba data structure pointer. | |
4295 | * | |
4296 | * This routine is invoked when waiting for FCF table rediscover has been | |
4297 | * timed out. If new FCF record(s) has (have) been discovered during the | |
4298 | * wait period, a new FCF event shall be added to the FCOE async event | |
4299 | * list, and then worker thread shall be waked up for processing from the | |
4300 | * worker thread context. | |
4301 | **/ | |
e399b228 | 4302 | static void |
f22eb4d3 | 4303 | lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list *t) |
ecfd03c6 | 4304 | { |
f22eb4d3 | 4305 | struct lpfc_hba *phba = from_timer(phba, t, fcf.redisc_wait); |
ecfd03c6 JS |
4306 | |
4307 | /* Don't send FCF rediscovery event if timer cancelled */ | |
4308 | spin_lock_irq(&phba->hbalock); | |
4309 | if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) { | |
4310 | spin_unlock_irq(&phba->hbalock); | |
4311 | return; | |
4312 | } | |
4313 | /* Clear FCF rediscovery timer pending flag */ | |
4314 | phba->fcf.fcf_flag &= ~FCF_REDISC_PEND; | |
4315 | /* FCF rediscovery event to worker thread */ | |
4316 | phba->fcf.fcf_flag |= FCF_REDISC_EVT; | |
4317 | spin_unlock_irq(&phba->hbalock); | |
0c9ab6f5 | 4318 | lpfc_printf_log(phba, KERN_INFO, LOG_FIP, |
a93ff37a | 4319 | "2776 FCF rediscover quiescent timer expired\n"); |
ecfd03c6 JS |
4320 | /* wake up worker thread */ |
4321 | lpfc_worker_wake_up(phba); | |
4322 | } | |
4323 | ||
e59058c4 | 4324 | /** |
da0436e9 | 4325 | * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code |
e59058c4 | 4326 | * @phba: pointer to lpfc hba data structure. |
da0436e9 | 4327 | * @acqe_link: pointer to the async link completion queue entry. |
e59058c4 | 4328 | * |
23288b78 | 4329 | * This routine is to parse the SLI4 link-attention link fault code. |
e59058c4 | 4330 | **/ |
23288b78 | 4331 | static void |
da0436e9 JS |
4332 | lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba, |
4333 | struct lpfc_acqe_link *acqe_link) | |
db2378e0 | 4334 | { |
da0436e9 JS |
4335 | switch (bf_get(lpfc_acqe_link_fault, acqe_link)) { |
4336 | case LPFC_ASYNC_LINK_FAULT_NONE: | |
4337 | case LPFC_ASYNC_LINK_FAULT_LOCAL: | |
4338 | case LPFC_ASYNC_LINK_FAULT_REMOTE: | |
23288b78 | 4339 | case LPFC_ASYNC_LINK_FAULT_LR_LRR: |
da0436e9 JS |
4340 | break; |
4341 | default: | |
4342 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
23288b78 | 4343 | "0398 Unknown link fault code: x%x\n", |
da0436e9 | 4344 | bf_get(lpfc_acqe_link_fault, acqe_link)); |
da0436e9 JS |
4345 | break; |
4346 | } | |
db2378e0 JS |
4347 | } |
4348 | ||
5b75da2f | 4349 | /** |
da0436e9 | 4350 | * lpfc_sli4_parse_latt_type - Parse sli4 link attention type |
5b75da2f | 4351 | * @phba: pointer to lpfc hba data structure. |
da0436e9 | 4352 | * @acqe_link: pointer to the async link completion queue entry. |
5b75da2f | 4353 | * |
da0436e9 JS |
4354 | * This routine is to parse the SLI4 link attention type and translate it |
4355 | * into the base driver's link attention type coding. | |
5b75da2f | 4356 | * |
da0436e9 JS |
4357 | * Return: Link attention type in terms of base driver's coding. |
4358 | **/ | |
4359 | static uint8_t | |
4360 | lpfc_sli4_parse_latt_type(struct lpfc_hba *phba, | |
4361 | struct lpfc_acqe_link *acqe_link) | |
5b75da2f | 4362 | { |
da0436e9 | 4363 | uint8_t att_type; |
5b75da2f | 4364 | |
da0436e9 JS |
4365 | switch (bf_get(lpfc_acqe_link_status, acqe_link)) { |
4366 | case LPFC_ASYNC_LINK_STATUS_DOWN: | |
4367 | case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN: | |
76a95d75 | 4368 | att_type = LPFC_ATT_LINK_DOWN; |
da0436e9 JS |
4369 | break; |
4370 | case LPFC_ASYNC_LINK_STATUS_UP: | |
4371 | /* Ignore physical link up events - wait for logical link up */ | |
76a95d75 | 4372 | att_type = LPFC_ATT_RESERVED; |
da0436e9 JS |
4373 | break; |
4374 | case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP: | |
76a95d75 | 4375 | att_type = LPFC_ATT_LINK_UP; |
da0436e9 JS |
4376 | break; |
4377 | default: | |
4378 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
4379 | "0399 Invalid link attention type: x%x\n", | |
4380 | bf_get(lpfc_acqe_link_status, acqe_link)); | |
76a95d75 | 4381 | att_type = LPFC_ATT_RESERVED; |
da0436e9 | 4382 | break; |
5b75da2f | 4383 | } |
da0436e9 | 4384 | return att_type; |
5b75da2f JS |
4385 | } |
4386 | ||
8b68cd52 JS |
4387 | /** |
4388 | * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed | |
4389 | * @phba: pointer to lpfc hba data structure. | |
4390 | * | |
4391 | * This routine is to get an SLI3 FC port's link speed in Mbps. | |
4392 | * | |
4393 | * Return: link speed in terms of Mbps. | |
4394 | **/ | |
4395 | uint32_t | |
4396 | lpfc_sli_port_speed_get(struct lpfc_hba *phba) | |
4397 | { | |
4398 | uint32_t link_speed; | |
4399 | ||
4400 | if (!lpfc_is_link_up(phba)) | |
4401 | return 0; | |
4402 | ||
a085e87c JS |
4403 | if (phba->sli_rev <= LPFC_SLI_REV3) { |
4404 | switch (phba->fc_linkspeed) { | |
4405 | case LPFC_LINK_SPEED_1GHZ: | |
4406 | link_speed = 1000; | |
4407 | break; | |
4408 | case LPFC_LINK_SPEED_2GHZ: | |
4409 | link_speed = 2000; | |
4410 | break; | |
4411 | case LPFC_LINK_SPEED_4GHZ: | |
4412 | link_speed = 4000; | |
4413 | break; | |
4414 | case LPFC_LINK_SPEED_8GHZ: | |
4415 | link_speed = 8000; | |
4416 | break; | |
4417 | case LPFC_LINK_SPEED_10GHZ: | |
4418 | link_speed = 10000; | |
4419 | break; | |
4420 | case LPFC_LINK_SPEED_16GHZ: | |
4421 | link_speed = 16000; | |
4422 | break; | |
4423 | default: | |
4424 | link_speed = 0; | |
4425 | } | |
4426 | } else { | |
4427 | if (phba->sli4_hba.link_state.logical_speed) | |
4428 | link_speed = | |
4429 | phba->sli4_hba.link_state.logical_speed; | |
4430 | else | |
4431 | link_speed = phba->sli4_hba.link_state.speed; | |
8b68cd52 JS |
4432 | } |
4433 | return link_speed; | |
4434 | } | |
4435 | ||
4436 | /** | |
4437 | * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed | |
4438 | * @phba: pointer to lpfc hba data structure. | |
4439 | * @evt_code: asynchronous event code. | |
4440 | * @speed_code: asynchronous event link speed code. | |
4441 | * | |
4442 | * This routine is to parse the giving SLI4 async event link speed code into | |
4443 | * value of Mbps for the link speed. | |
4444 | * | |
4445 | * Return: link speed in terms of Mbps. | |
4446 | **/ | |
4447 | static uint32_t | |
4448 | lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code, | |
4449 | uint8_t speed_code) | |
4450 | { | |
4451 | uint32_t port_speed; | |
4452 | ||
4453 | switch (evt_code) { | |
4454 | case LPFC_TRAILER_CODE_LINK: | |
4455 | switch (speed_code) { | |
26d830ec | 4456 | case LPFC_ASYNC_LINK_SPEED_ZERO: |
8b68cd52 JS |
4457 | port_speed = 0; |
4458 | break; | |
26d830ec | 4459 | case LPFC_ASYNC_LINK_SPEED_10MBPS: |
8b68cd52 JS |
4460 | port_speed = 10; |
4461 | break; | |
26d830ec | 4462 | case LPFC_ASYNC_LINK_SPEED_100MBPS: |
8b68cd52 JS |
4463 | port_speed = 100; |
4464 | break; | |
26d830ec | 4465 | case LPFC_ASYNC_LINK_SPEED_1GBPS: |
8b68cd52 JS |
4466 | port_speed = 1000; |
4467 | break; | |
26d830ec | 4468 | case LPFC_ASYNC_LINK_SPEED_10GBPS: |
8b68cd52 JS |
4469 | port_speed = 10000; |
4470 | break; | |
26d830ec JS |
4471 | case LPFC_ASYNC_LINK_SPEED_20GBPS: |
4472 | port_speed = 20000; | |
4473 | break; | |
4474 | case LPFC_ASYNC_LINK_SPEED_25GBPS: | |
4475 | port_speed = 25000; | |
4476 | break; | |
4477 | case LPFC_ASYNC_LINK_SPEED_40GBPS: | |
4478 | port_speed = 40000; | |
4479 | break; | |
8b68cd52 JS |
4480 | default: |
4481 | port_speed = 0; | |
4482 | } | |
4483 | break; | |
4484 | case LPFC_TRAILER_CODE_FC: | |
4485 | switch (speed_code) { | |
26d830ec | 4486 | case LPFC_FC_LA_SPEED_UNKNOWN: |
8b68cd52 JS |
4487 | port_speed = 0; |
4488 | break; | |
26d830ec | 4489 | case LPFC_FC_LA_SPEED_1G: |
8b68cd52 JS |
4490 | port_speed = 1000; |
4491 | break; | |
26d830ec | 4492 | case LPFC_FC_LA_SPEED_2G: |
8b68cd52 JS |
4493 | port_speed = 2000; |
4494 | break; | |
26d830ec | 4495 | case LPFC_FC_LA_SPEED_4G: |
8b68cd52 JS |
4496 | port_speed = 4000; |
4497 | break; | |
26d830ec | 4498 | case LPFC_FC_LA_SPEED_8G: |
8b68cd52 JS |
4499 | port_speed = 8000; |
4500 | break; | |
26d830ec | 4501 | case LPFC_FC_LA_SPEED_10G: |
8b68cd52 JS |
4502 | port_speed = 10000; |
4503 | break; | |
26d830ec | 4504 | case LPFC_FC_LA_SPEED_16G: |
8b68cd52 JS |
4505 | port_speed = 16000; |
4506 | break; | |
d38dd52c JS |
4507 | case LPFC_FC_LA_SPEED_32G: |
4508 | port_speed = 32000; | |
4509 | break; | |
fbd8a6ba JS |
4510 | case LPFC_FC_LA_SPEED_64G: |
4511 | port_speed = 64000; | |
4512 | break; | |
1dc5ec24 JS |
4513 | case LPFC_FC_LA_SPEED_128G: |
4514 | port_speed = 128000; | |
4515 | break; | |
8b68cd52 JS |
4516 | default: |
4517 | port_speed = 0; | |
4518 | } | |
4519 | break; | |
4520 | default: | |
4521 | port_speed = 0; | |
4522 | } | |
4523 | return port_speed; | |
4524 | } | |
4525 | ||
da0436e9 | 4526 | /** |
70f3c073 | 4527 | * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event |
da0436e9 JS |
4528 | * @phba: pointer to lpfc hba data structure. |
4529 | * @acqe_link: pointer to the async link completion queue entry. | |
4530 | * | |
70f3c073 | 4531 | * This routine is to handle the SLI4 asynchronous FCoE link event. |
da0436e9 JS |
4532 | **/ |
4533 | static void | |
4534 | lpfc_sli4_async_link_evt(struct lpfc_hba *phba, | |
4535 | struct lpfc_acqe_link *acqe_link) | |
4536 | { | |
4537 | struct lpfc_dmabuf *mp; | |
4538 | LPFC_MBOXQ_t *pmb; | |
4539 | MAILBOX_t *mb; | |
76a95d75 | 4540 | struct lpfc_mbx_read_top *la; |
da0436e9 | 4541 | uint8_t att_type; |
76a95d75 | 4542 | int rc; |
da0436e9 JS |
4543 | |
4544 | att_type = lpfc_sli4_parse_latt_type(phba, acqe_link); | |
76a95d75 | 4545 | if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP) |
da0436e9 | 4546 | return; |
32b9793f | 4547 | phba->fcoe_eventtag = acqe_link->event_tag; |
da0436e9 JS |
4548 | pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); |
4549 | if (!pmb) { | |
4550 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
4551 | "0395 The mboxq allocation failed\n"); | |
4552 | return; | |
4553 | } | |
4554 | mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); | |
4555 | if (!mp) { | |
4556 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
4557 | "0396 The lpfc_dmabuf allocation failed\n"); | |
4558 | goto out_free_pmb; | |
4559 | } | |
4560 | mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys); | |
4561 | if (!mp->virt) { | |
4562 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
4563 | "0397 The mbuf allocation failed\n"); | |
4564 | goto out_free_dmabuf; | |
4565 | } | |
4566 | ||
4567 | /* Cleanup any outstanding ELS commands */ | |
4568 | lpfc_els_flush_all_cmd(phba); | |
4569 | ||
4570 | /* Block ELS IOCBs until we have done process link event */ | |
895427bd | 4571 | phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT; |
da0436e9 JS |
4572 | |
4573 | /* Update link event statistics */ | |
4574 | phba->sli.slistat.link_event++; | |
4575 | ||
76a95d75 JS |
4576 | /* Create lpfc_handle_latt mailbox command from link ACQE */ |
4577 | lpfc_read_topology(phba, pmb, mp); | |
4578 | pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; | |
da0436e9 JS |
4579 | pmb->vport = phba->pport; |
4580 | ||
da0436e9 JS |
4581 | /* Keep the link status for extra SLI4 state machine reference */ |
4582 | phba->sli4_hba.link_state.speed = | |
8b68cd52 JS |
4583 | lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK, |
4584 | bf_get(lpfc_acqe_link_speed, acqe_link)); | |
da0436e9 JS |
4585 | phba->sli4_hba.link_state.duplex = |
4586 | bf_get(lpfc_acqe_link_duplex, acqe_link); | |
4587 | phba->sli4_hba.link_state.status = | |
4588 | bf_get(lpfc_acqe_link_status, acqe_link); | |
70f3c073 JS |
4589 | phba->sli4_hba.link_state.type = |
4590 | bf_get(lpfc_acqe_link_type, acqe_link); | |
4591 | phba->sli4_hba.link_state.number = | |
4592 | bf_get(lpfc_acqe_link_number, acqe_link); | |
da0436e9 JS |
4593 | phba->sli4_hba.link_state.fault = |
4594 | bf_get(lpfc_acqe_link_fault, acqe_link); | |
65467b6b | 4595 | phba->sli4_hba.link_state.logical_speed = |
8b68cd52 JS |
4596 | bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10; |
4597 | ||
70f3c073 | 4598 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, |
c31098ce JS |
4599 | "2900 Async FC/FCoE Link event - Speed:%dGBit " |
4600 | "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d " | |
4601 | "Logical speed:%dMbps Fault:%d\n", | |
70f3c073 JS |
4602 | phba->sli4_hba.link_state.speed, |
4603 | phba->sli4_hba.link_state.topology, | |
4604 | phba->sli4_hba.link_state.status, | |
4605 | phba->sli4_hba.link_state.type, | |
4606 | phba->sli4_hba.link_state.number, | |
8b68cd52 | 4607 | phba->sli4_hba.link_state.logical_speed, |
70f3c073 | 4608 | phba->sli4_hba.link_state.fault); |
76a95d75 JS |
4609 | /* |
4610 | * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch | |
4611 | * topology info. Note: Optional for non FC-AL ports. | |
4612 | */ | |
4613 | if (!(phba->hba_flag & HBA_FCOE_MODE)) { | |
4614 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); | |
4615 | if (rc == MBX_NOT_FINISHED) | |
4616 | goto out_free_dmabuf; | |
4617 | return; | |
4618 | } | |
4619 | /* | |
4620 | * For FCoE Mode: fill in all the topology information we need and call | |
4621 | * the READ_TOPOLOGY completion routine to continue without actually | |
4622 | * sending the READ_TOPOLOGY mailbox command to the port. | |
4623 | */ | |
23288b78 | 4624 | /* Initialize completion status */ |
76a95d75 | 4625 | mb = &pmb->u.mb; |
23288b78 JS |
4626 | mb->mbxStatus = MBX_SUCCESS; |
4627 | ||
4628 | /* Parse port fault information field */ | |
4629 | lpfc_sli4_parse_latt_fault(phba, acqe_link); | |
76a95d75 JS |
4630 | |
4631 | /* Parse and translate link attention fields */ | |
4632 | la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop; | |
4633 | la->eventTag = acqe_link->event_tag; | |
4634 | bf_set(lpfc_mbx_read_top_att_type, la, att_type); | |
4635 | bf_set(lpfc_mbx_read_top_link_spd, la, | |
a085e87c | 4636 | (bf_get(lpfc_acqe_link_speed, acqe_link))); |
76a95d75 JS |
4637 | |
4638 | /* Fake the the following irrelvant fields */ | |
4639 | bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT); | |
4640 | bf_set(lpfc_mbx_read_top_alpa_granted, la, 0); | |
4641 | bf_set(lpfc_mbx_read_top_il, la, 0); | |
4642 | bf_set(lpfc_mbx_read_top_pb, la, 0); | |
4643 | bf_set(lpfc_mbx_read_top_fa, la, 0); | |
4644 | bf_set(lpfc_mbx_read_top_mm, la, 0); | |
da0436e9 JS |
4645 | |
4646 | /* Invoke the lpfc_handle_latt mailbox command callback function */ | |
76a95d75 | 4647 | lpfc_mbx_cmpl_read_topology(phba, pmb); |
da0436e9 | 4648 | |
5b75da2f | 4649 | return; |
da0436e9 JS |
4650 | |
4651 | out_free_dmabuf: | |
4652 | kfree(mp); | |
4653 | out_free_pmb: | |
4654 | mempool_free(pmb, phba->mbox_mem_pool); | |
4655 | } | |
4656 | ||
1dc5ec24 JS |
4657 | /** |
4658 | * lpfc_async_link_speed_to_read_top - Parse async evt link speed code to read | |
4659 | * topology. | |
4660 | * @phba: pointer to lpfc hba data structure. | |
4661 | * @evt_code: asynchronous event code. | |
4662 | * @speed_code: asynchronous event link speed code. | |
4663 | * | |
4664 | * This routine is to parse the giving SLI4 async event link speed code into | |
4665 | * value of Read topology link speed. | |
4666 | * | |
4667 | * Return: link speed in terms of Read topology. | |
4668 | **/ | |
4669 | static uint8_t | |
4670 | lpfc_async_link_speed_to_read_top(struct lpfc_hba *phba, uint8_t speed_code) | |
4671 | { | |
4672 | uint8_t port_speed; | |
4673 | ||
4674 | switch (speed_code) { | |
4675 | case LPFC_FC_LA_SPEED_1G: | |
4676 | port_speed = LPFC_LINK_SPEED_1GHZ; | |
4677 | break; | |
4678 | case LPFC_FC_LA_SPEED_2G: | |
4679 | port_speed = LPFC_LINK_SPEED_2GHZ; | |
4680 | break; | |
4681 | case LPFC_FC_LA_SPEED_4G: | |
4682 | port_speed = LPFC_LINK_SPEED_4GHZ; | |
4683 | break; | |
4684 | case LPFC_FC_LA_SPEED_8G: | |
4685 | port_speed = LPFC_LINK_SPEED_8GHZ; | |
4686 | break; | |
4687 | case LPFC_FC_LA_SPEED_16G: | |
4688 | port_speed = LPFC_LINK_SPEED_16GHZ; | |
4689 | break; | |
4690 | case LPFC_FC_LA_SPEED_32G: | |
4691 | port_speed = LPFC_LINK_SPEED_32GHZ; | |
4692 | break; | |
4693 | case LPFC_FC_LA_SPEED_64G: | |
4694 | port_speed = LPFC_LINK_SPEED_64GHZ; | |
4695 | break; | |
4696 | case LPFC_FC_LA_SPEED_128G: | |
4697 | port_speed = LPFC_LINK_SPEED_128GHZ; | |
4698 | break; | |
4699 | case LPFC_FC_LA_SPEED_256G: | |
4700 | port_speed = LPFC_LINK_SPEED_256GHZ; | |
4701 | break; | |
4702 | default: | |
4703 | port_speed = 0; | |
4704 | break; | |
4705 | } | |
4706 | ||
4707 | return port_speed; | |
4708 | } | |
4709 | ||
4710 | #define trunk_link_status(__idx)\ | |
4711 | bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\ | |
4712 | ((phba->trunk_link.link##__idx.state == LPFC_LINK_UP) ?\ | |
4713 | "Link up" : "Link down") : "NA" | |
4714 | /* Did port __idx reported an error */ | |
4715 | #define trunk_port_fault(__idx)\ | |
4716 | bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\ | |
4717 | (port_fault & (1 << __idx) ? "YES" : "NO") : "NA" | |
4718 | ||
4719 | static void | |
4720 | lpfc_update_trunk_link_status(struct lpfc_hba *phba, | |
4721 | struct lpfc_acqe_fc_la *acqe_fc) | |
4722 | { | |
4723 | uint8_t port_fault = bf_get(lpfc_acqe_fc_la_trunk_linkmask, acqe_fc); | |
4724 | uint8_t err = bf_get(lpfc_acqe_fc_la_trunk_fault, acqe_fc); | |
4725 | ||
4726 | phba->sli4_hba.link_state.speed = | |
4727 | lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC, | |
4728 | bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); | |
4729 | ||
4730 | phba->sli4_hba.link_state.logical_speed = | |
4731 | bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc); | |
4732 | /* We got FC link speed, convert to fc_linkspeed (READ_TOPOLOGY) */ | |
4733 | phba->fc_linkspeed = | |
4734 | lpfc_async_link_speed_to_read_top( | |
4735 | phba, | |
4736 | bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); | |
4737 | ||
4738 | if (bf_get(lpfc_acqe_fc_la_trunk_config_port0, acqe_fc)) { | |
4739 | phba->trunk_link.link0.state = | |
4740 | bf_get(lpfc_acqe_fc_la_trunk_link_status_port0, acqe_fc) | |
4741 | ? LPFC_LINK_UP : LPFC_LINK_DOWN; | |
529b3ddc | 4742 | phba->trunk_link.link0.fault = port_fault & 0x1 ? err : 0; |
1dc5ec24 JS |
4743 | } |
4744 | if (bf_get(lpfc_acqe_fc_la_trunk_config_port1, acqe_fc)) { | |
4745 | phba->trunk_link.link1.state = | |
4746 | bf_get(lpfc_acqe_fc_la_trunk_link_status_port1, acqe_fc) | |
4747 | ? LPFC_LINK_UP : LPFC_LINK_DOWN; | |
529b3ddc | 4748 | phba->trunk_link.link1.fault = port_fault & 0x2 ? err : 0; |
1dc5ec24 JS |
4749 | } |
4750 | if (bf_get(lpfc_acqe_fc_la_trunk_config_port2, acqe_fc)) { | |
4751 | phba->trunk_link.link2.state = | |
4752 | bf_get(lpfc_acqe_fc_la_trunk_link_status_port2, acqe_fc) | |
4753 | ? LPFC_LINK_UP : LPFC_LINK_DOWN; | |
529b3ddc | 4754 | phba->trunk_link.link2.fault = port_fault & 0x4 ? err : 0; |
1dc5ec24 JS |
4755 | } |
4756 | if (bf_get(lpfc_acqe_fc_la_trunk_config_port3, acqe_fc)) { | |
4757 | phba->trunk_link.link3.state = | |
4758 | bf_get(lpfc_acqe_fc_la_trunk_link_status_port3, acqe_fc) | |
4759 | ? LPFC_LINK_UP : LPFC_LINK_DOWN; | |
529b3ddc | 4760 | phba->trunk_link.link3.fault = port_fault & 0x8 ? err : 0; |
1dc5ec24 JS |
4761 | } |
4762 | ||
4763 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
4764 | "2910 Async FC Trunking Event - Speed:%d\n" | |
4765 | "\tLogical speed:%d " | |
4766 | "port0: %s port1: %s port2: %s port3: %s\n", | |
4767 | phba->sli4_hba.link_state.speed, | |
4768 | phba->sli4_hba.link_state.logical_speed, | |
4769 | trunk_link_status(0), trunk_link_status(1), | |
4770 | trunk_link_status(2), trunk_link_status(3)); | |
4771 | ||
4772 | if (port_fault) | |
4773 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
4774 | "3202 trunk error:0x%x (%s) seen on port0:%s " | |
4775 | /* | |
4776 | * SLI-4: We have only 0xA error codes | |
4777 | * defined as of now. print an appropriate | |
4778 | * message in case driver needs to be updated. | |
4779 | */ | |
4780 | "port1:%s port2:%s port3:%s\n", err, err > 0xA ? | |
4781 | "UNDEFINED. update driver." : trunk_errmsg[err], | |
4782 | trunk_port_fault(0), trunk_port_fault(1), | |
4783 | trunk_port_fault(2), trunk_port_fault(3)); | |
4784 | } | |
4785 | ||
4786 | ||
70f3c073 JS |
4787 | /** |
4788 | * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event | |
4789 | * @phba: pointer to lpfc hba data structure. | |
4790 | * @acqe_fc: pointer to the async fc completion queue entry. | |
4791 | * | |
4792 | * This routine is to handle the SLI4 asynchronous FC event. It will simply log | |
4793 | * that the event was received and then issue a read_topology mailbox command so | |
4794 | * that the rest of the driver will treat it the same as SLI3. | |
4795 | **/ | |
4796 | static void | |
4797 | lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc) | |
4798 | { | |
4799 | struct lpfc_dmabuf *mp; | |
4800 | LPFC_MBOXQ_t *pmb; | |
7bdedb34 JS |
4801 | MAILBOX_t *mb; |
4802 | struct lpfc_mbx_read_top *la; | |
70f3c073 JS |
4803 | int rc; |
4804 | ||
4805 | if (bf_get(lpfc_trailer_type, acqe_fc) != | |
4806 | LPFC_FC_LA_EVENT_TYPE_FC_LINK) { | |
4807 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
4808 | "2895 Non FC link Event detected.(%d)\n", | |
4809 | bf_get(lpfc_trailer_type, acqe_fc)); | |
4810 | return; | |
4811 | } | |
1dc5ec24 JS |
4812 | |
4813 | if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) == | |
4814 | LPFC_FC_LA_TYPE_TRUNKING_EVENT) { | |
4815 | lpfc_update_trunk_link_status(phba, acqe_fc); | |
4816 | return; | |
4817 | } | |
4818 | ||
70f3c073 JS |
4819 | /* Keep the link status for extra SLI4 state machine reference */ |
4820 | phba->sli4_hba.link_state.speed = | |
8b68cd52 JS |
4821 | lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC, |
4822 | bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); | |
70f3c073 JS |
4823 | phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL; |
4824 | phba->sli4_hba.link_state.topology = | |
4825 | bf_get(lpfc_acqe_fc_la_topology, acqe_fc); | |
4826 | phba->sli4_hba.link_state.status = | |
4827 | bf_get(lpfc_acqe_fc_la_att_type, acqe_fc); | |
4828 | phba->sli4_hba.link_state.type = | |
4829 | bf_get(lpfc_acqe_fc_la_port_type, acqe_fc); | |
4830 | phba->sli4_hba.link_state.number = | |
4831 | bf_get(lpfc_acqe_fc_la_port_number, acqe_fc); | |
4832 | phba->sli4_hba.link_state.fault = | |
4833 | bf_get(lpfc_acqe_link_fault, acqe_fc); | |
4834 | phba->sli4_hba.link_state.logical_speed = | |
8b68cd52 | 4835 | bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10; |
70f3c073 JS |
4836 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, |
4837 | "2896 Async FC event - Speed:%dGBaud Topology:x%x " | |
4838 | "LA Type:x%x Port Type:%d Port Number:%d Logical speed:" | |
4839 | "%dMbps Fault:%d\n", | |
4840 | phba->sli4_hba.link_state.speed, | |
4841 | phba->sli4_hba.link_state.topology, | |
4842 | phba->sli4_hba.link_state.status, | |
4843 | phba->sli4_hba.link_state.type, | |
4844 | phba->sli4_hba.link_state.number, | |
8b68cd52 | 4845 | phba->sli4_hba.link_state.logical_speed, |
70f3c073 JS |
4846 | phba->sli4_hba.link_state.fault); |
4847 | pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); | |
4848 | if (!pmb) { | |
4849 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
4850 | "2897 The mboxq allocation failed\n"); | |
4851 | return; | |
4852 | } | |
4853 | mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); | |
4854 | if (!mp) { | |
4855 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
4856 | "2898 The lpfc_dmabuf allocation failed\n"); | |
4857 | goto out_free_pmb; | |
4858 | } | |
4859 | mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys); | |
4860 | if (!mp->virt) { | |
4861 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
4862 | "2899 The mbuf allocation failed\n"); | |
4863 | goto out_free_dmabuf; | |
4864 | } | |
4865 | ||
4866 | /* Cleanup any outstanding ELS commands */ | |
4867 | lpfc_els_flush_all_cmd(phba); | |
4868 | ||
4869 | /* Block ELS IOCBs until we have done process link event */ | |
895427bd | 4870 | phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT; |
70f3c073 JS |
4871 | |
4872 | /* Update link event statistics */ | |
4873 | phba->sli.slistat.link_event++; | |
4874 | ||
4875 | /* Create lpfc_handle_latt mailbox command from link ACQE */ | |
4876 | lpfc_read_topology(phba, pmb, mp); | |
4877 | pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; | |
4878 | pmb->vport = phba->pport; | |
4879 | ||
7bdedb34 | 4880 | if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) { |
ae9e28f3 JS |
4881 | phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK); |
4882 | ||
4883 | switch (phba->sli4_hba.link_state.status) { | |
4884 | case LPFC_FC_LA_TYPE_MDS_LINK_DOWN: | |
4885 | phba->link_flag |= LS_MDS_LINK_DOWN; | |
4886 | break; | |
4887 | case LPFC_FC_LA_TYPE_MDS_LOOPBACK: | |
4888 | phba->link_flag |= LS_MDS_LOOPBACK; | |
4889 | break; | |
4890 | default: | |
4891 | break; | |
4892 | } | |
4893 | ||
23288b78 | 4894 | /* Initialize completion status */ |
7bdedb34 | 4895 | mb = &pmb->u.mb; |
23288b78 JS |
4896 | mb->mbxStatus = MBX_SUCCESS; |
4897 | ||
4898 | /* Parse port fault information field */ | |
4899 | lpfc_sli4_parse_latt_fault(phba, (void *)acqe_fc); | |
7bdedb34 JS |
4900 | |
4901 | /* Parse and translate link attention fields */ | |
4902 | la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop; | |
4903 | la->eventTag = acqe_fc->event_tag; | |
7bdedb34 | 4904 | |
aeb3c817 JS |
4905 | if (phba->sli4_hba.link_state.status == |
4906 | LPFC_FC_LA_TYPE_UNEXP_WWPN) { | |
4907 | bf_set(lpfc_mbx_read_top_att_type, la, | |
4908 | LPFC_FC_LA_TYPE_UNEXP_WWPN); | |
4909 | } else { | |
4910 | bf_set(lpfc_mbx_read_top_att_type, la, | |
4911 | LPFC_FC_LA_TYPE_LINK_DOWN); | |
4912 | } | |
7bdedb34 JS |
4913 | /* Invoke the mailbox command callback function */ |
4914 | lpfc_mbx_cmpl_read_topology(phba, pmb); | |
4915 | ||
4916 | return; | |
4917 | } | |
4918 | ||
70f3c073 JS |
4919 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); |
4920 | if (rc == MBX_NOT_FINISHED) | |
4921 | goto out_free_dmabuf; | |
4922 | return; | |
4923 | ||
4924 | out_free_dmabuf: | |
4925 | kfree(mp); | |
4926 | out_free_pmb: | |
4927 | mempool_free(pmb, phba->mbox_mem_pool); | |
4928 | } | |
4929 | ||
4930 | /** | |
4931 | * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event | |
4932 | * @phba: pointer to lpfc hba data structure. | |
4933 | * @acqe_fc: pointer to the async SLI completion queue entry. | |
4934 | * | |
4935 | * This routine is to handle the SLI4 asynchronous SLI events. | |
4936 | **/ | |
4937 | static void | |
4938 | lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli) | |
4939 | { | |
4b8bae08 | 4940 | char port_name; |
8c1312e1 | 4941 | char message[128]; |
4b8bae08 | 4942 | uint8_t status; |
946727dc | 4943 | uint8_t evt_type; |
448193b5 | 4944 | uint8_t operational = 0; |
946727dc | 4945 | struct temp_event temp_event_data; |
4b8bae08 | 4946 | struct lpfc_acqe_misconfigured_event *misconfigured; |
946727dc | 4947 | struct Scsi_Host *shost; |
cd71348a JS |
4948 | struct lpfc_vport **vports; |
4949 | int rc, i; | |
946727dc JS |
4950 | |
4951 | evt_type = bf_get(lpfc_trailer_type, acqe_sli); | |
4b8bae08 | 4952 | |
448193b5 JS |
4953 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, |
4954 | "2901 Async SLI event - Event Data1:x%08x Event Data2:" | |
4955 | "x%08x SLI Event Type:%d\n", | |
4956 | acqe_sli->event_data1, acqe_sli->event_data2, | |
4957 | evt_type); | |
4b8bae08 JS |
4958 | |
4959 | port_name = phba->Port[0]; | |
4960 | if (port_name == 0x00) | |
4961 | port_name = '?'; /* get port name is empty */ | |
4962 | ||
946727dc JS |
4963 | switch (evt_type) { |
4964 | case LPFC_SLI_EVENT_TYPE_OVER_TEMP: | |
4965 | temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; | |
4966 | temp_event_data.event_code = LPFC_THRESHOLD_TEMP; | |
4967 | temp_event_data.data = (uint32_t)acqe_sli->event_data1; | |
4968 | ||
4969 | lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, | |
4970 | "3190 Over Temperature:%d Celsius- Port Name %c\n", | |
4971 | acqe_sli->event_data1, port_name); | |
4972 | ||
310429ef | 4973 | phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE; |
946727dc JS |
4974 | shost = lpfc_shost_from_vport(phba->pport); |
4975 | fc_host_post_vendor_event(shost, fc_get_event_number(), | |
4976 | sizeof(temp_event_data), | |
4977 | (char *)&temp_event_data, | |
4978 | SCSI_NL_VID_TYPE_PCI | |
4979 | | PCI_VENDOR_ID_EMULEX); | |
4980 | break; | |
4981 | case LPFC_SLI_EVENT_TYPE_NORM_TEMP: | |
4982 | temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; | |
4983 | temp_event_data.event_code = LPFC_NORMAL_TEMP; | |
4984 | temp_event_data.data = (uint32_t)acqe_sli->event_data1; | |
4985 | ||
4986 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
4987 | "3191 Normal Temperature:%d Celsius - Port Name %c\n", | |
4988 | acqe_sli->event_data1, port_name); | |
4989 | ||
4990 | shost = lpfc_shost_from_vport(phba->pport); | |
4991 | fc_host_post_vendor_event(shost, fc_get_event_number(), | |
4992 | sizeof(temp_event_data), | |
4993 | (char *)&temp_event_data, | |
4994 | SCSI_NL_VID_TYPE_PCI | |
4995 | | PCI_VENDOR_ID_EMULEX); | |
4996 | break; | |
4997 | case LPFC_SLI_EVENT_TYPE_MISCONFIGURED: | |
4998 | misconfigured = (struct lpfc_acqe_misconfigured_event *) | |
4b8bae08 JS |
4999 | &acqe_sli->event_data1; |
5000 | ||
946727dc JS |
5001 | /* fetch the status for this port */ |
5002 | switch (phba->sli4_hba.lnk_info.lnk_no) { | |
5003 | case LPFC_LINK_NUMBER_0: | |
448193b5 JS |
5004 | status = bf_get(lpfc_sli_misconfigured_port0_state, |
5005 | &misconfigured->theEvent); | |
5006 | operational = bf_get(lpfc_sli_misconfigured_port0_op, | |
4b8bae08 | 5007 | &misconfigured->theEvent); |
946727dc JS |
5008 | break; |
5009 | case LPFC_LINK_NUMBER_1: | |
448193b5 JS |
5010 | status = bf_get(lpfc_sli_misconfigured_port1_state, |
5011 | &misconfigured->theEvent); | |
5012 | operational = bf_get(lpfc_sli_misconfigured_port1_op, | |
4b8bae08 | 5013 | &misconfigured->theEvent); |
946727dc JS |
5014 | break; |
5015 | case LPFC_LINK_NUMBER_2: | |
448193b5 JS |
5016 | status = bf_get(lpfc_sli_misconfigured_port2_state, |
5017 | &misconfigured->theEvent); | |
5018 | operational = bf_get(lpfc_sli_misconfigured_port2_op, | |
4b8bae08 | 5019 | &misconfigured->theEvent); |
946727dc JS |
5020 | break; |
5021 | case LPFC_LINK_NUMBER_3: | |
448193b5 JS |
5022 | status = bf_get(lpfc_sli_misconfigured_port3_state, |
5023 | &misconfigured->theEvent); | |
5024 | operational = bf_get(lpfc_sli_misconfigured_port3_op, | |
4b8bae08 | 5025 | &misconfigured->theEvent); |
946727dc JS |
5026 | break; |
5027 | default: | |
448193b5 JS |
5028 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, |
5029 | "3296 " | |
5030 | "LPFC_SLI_EVENT_TYPE_MISCONFIGURED " | |
5031 | "event: Invalid link %d", | |
5032 | phba->sli4_hba.lnk_info.lnk_no); | |
5033 | return; | |
946727dc | 5034 | } |
4b8bae08 | 5035 | |
448193b5 JS |
5036 | /* Skip if optic state unchanged */ |
5037 | if (phba->sli4_hba.lnk_info.optic_state == status) | |
5038 | return; | |
5039 | ||
946727dc JS |
5040 | switch (status) { |
5041 | case LPFC_SLI_EVENT_STATUS_VALID: | |
448193b5 JS |
5042 | sprintf(message, "Physical Link is functional"); |
5043 | break; | |
946727dc JS |
5044 | case LPFC_SLI_EVENT_STATUS_NOT_PRESENT: |
5045 | sprintf(message, "Optics faulted/incorrectly " | |
5046 | "installed/not installed - Reseat optics, " | |
5047 | "if issue not resolved, replace."); | |
5048 | break; | |
5049 | case LPFC_SLI_EVENT_STATUS_WRONG_TYPE: | |
5050 | sprintf(message, | |
5051 | "Optics of two types installed - Remove one " | |
5052 | "optic or install matching pair of optics."); | |
5053 | break; | |
5054 | case LPFC_SLI_EVENT_STATUS_UNSUPPORTED: | |
5055 | sprintf(message, "Incompatible optics - Replace with " | |
292098be | 5056 | "compatible optics for card to function."); |
946727dc | 5057 | break; |
448193b5 JS |
5058 | case LPFC_SLI_EVENT_STATUS_UNQUALIFIED: |
5059 | sprintf(message, "Unqualified optics - Replace with " | |
5060 | "Avago optics for Warranty and Technical " | |
5061 | "Support - Link is%s operational", | |
2ea259ee | 5062 | (operational) ? " not" : ""); |
448193b5 JS |
5063 | break; |
5064 | case LPFC_SLI_EVENT_STATUS_UNCERTIFIED: | |
5065 | sprintf(message, "Uncertified optics - Replace with " | |
5066 | "Avago-certified optics to enable link " | |
5067 | "operation - Link is%s operational", | |
2ea259ee | 5068 | (operational) ? " not" : ""); |
448193b5 | 5069 | break; |
946727dc JS |
5070 | default: |
5071 | /* firmware is reporting a status we don't know about */ | |
5072 | sprintf(message, "Unknown event status x%02x", status); | |
5073 | break; | |
5074 | } | |
cd71348a JS |
5075 | |
5076 | /* Issue READ_CONFIG mbox command to refresh supported speeds */ | |
5077 | rc = lpfc_sli4_read_config(phba); | |
3952e91f | 5078 | if (rc) { |
cd71348a JS |
5079 | phba->lmt = 0; |
5080 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
5081 | "3194 Unable to retrieve supported " | |
3952e91f | 5082 | "speeds, rc = 0x%x\n", rc); |
cd71348a JS |
5083 | } |
5084 | vports = lpfc_create_vport_work_array(phba); | |
5085 | if (vports != NULL) { | |
5086 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; | |
5087 | i++) { | |
5088 | shost = lpfc_shost_from_vport(vports[i]); | |
5089 | lpfc_host_supported_speeds_set(shost); | |
5090 | } | |
5091 | } | |
5092 | lpfc_destroy_vport_work_array(phba, vports); | |
5093 | ||
448193b5 | 5094 | phba->sli4_hba.lnk_info.optic_state = status; |
946727dc | 5095 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, |
448193b5 | 5096 | "3176 Port Name %c %s\n", port_name, message); |
946727dc JS |
5097 | break; |
5098 | case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT: | |
5099 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
5100 | "3192 Remote DPort Test Initiated - " | |
5101 | "Event Data1:x%08x Event Data2: x%08x\n", | |
5102 | acqe_sli->event_data1, acqe_sli->event_data2); | |
4b8bae08 JS |
5103 | break; |
5104 | default: | |
946727dc JS |
5105 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, |
5106 | "3193 Async SLI event - Event Data1:x%08x Event Data2:" | |
5107 | "x%08x SLI Event Type:%d\n", | |
5108 | acqe_sli->event_data1, acqe_sli->event_data2, | |
5109 | evt_type); | |
4b8bae08 JS |
5110 | break; |
5111 | } | |
70f3c073 JS |
5112 | } |
5113 | ||
fc2b989b JS |
5114 | /** |
5115 | * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport | |
5116 | * @vport: pointer to vport data structure. | |
5117 | * | |
5118 | * This routine is to perform Clear Virtual Link (CVL) on a vport in | |
5119 | * response to a CVL event. | |
5120 | * | |
5121 | * Return the pointer to the ndlp with the vport if successful, otherwise | |
5122 | * return NULL. | |
5123 | **/ | |
5124 | static struct lpfc_nodelist * | |
5125 | lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport) | |
5126 | { | |
5127 | struct lpfc_nodelist *ndlp; | |
5128 | struct Scsi_Host *shost; | |
5129 | struct lpfc_hba *phba; | |
5130 | ||
5131 | if (!vport) | |
5132 | return NULL; | |
fc2b989b JS |
5133 | phba = vport->phba; |
5134 | if (!phba) | |
5135 | return NULL; | |
78730cfe JS |
5136 | ndlp = lpfc_findnode_did(vport, Fabric_DID); |
5137 | if (!ndlp) { | |
5138 | /* Cannot find existing Fabric ndlp, so allocate a new one */ | |
9d3d340d | 5139 | ndlp = lpfc_nlp_init(vport, Fabric_DID); |
78730cfe JS |
5140 | if (!ndlp) |
5141 | return 0; | |
78730cfe JS |
5142 | /* Set the node type */ |
5143 | ndlp->nlp_type |= NLP_FABRIC; | |
5144 | /* Put ndlp onto node list */ | |
5145 | lpfc_enqueue_node(vport, ndlp); | |
5146 | } else if (!NLP_CHK_NODE_ACT(ndlp)) { | |
5147 | /* re-setup ndlp without removing from node list */ | |
5148 | ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE); | |
5149 | if (!ndlp) | |
5150 | return 0; | |
5151 | } | |
63e801ce JS |
5152 | if ((phba->pport->port_state < LPFC_FLOGI) && |
5153 | (phba->pport->port_state != LPFC_VPORT_FAILED)) | |
fc2b989b JS |
5154 | return NULL; |
5155 | /* If virtual link is not yet instantiated ignore CVL */ | |
63e801ce JS |
5156 | if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC) |
5157 | && (vport->port_state != LPFC_VPORT_FAILED)) | |
fc2b989b JS |
5158 | return NULL; |
5159 | shost = lpfc_shost_from_vport(vport); | |
5160 | if (!shost) | |
5161 | return NULL; | |
5162 | lpfc_linkdown_port(vport); | |
5163 | lpfc_cleanup_pending_mbox(vport); | |
5164 | spin_lock_irq(shost->host_lock); | |
5165 | vport->fc_flag |= FC_VPORT_CVL_RCVD; | |
5166 | spin_unlock_irq(shost->host_lock); | |
5167 | ||
5168 | return ndlp; | |
5169 | } | |
5170 | ||
5171 | /** | |
5172 | * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports | |
5173 | * @vport: pointer to lpfc hba data structure. | |
5174 | * | |
5175 | * This routine is to perform Clear Virtual Link (CVL) on all vports in | |
5176 | * response to a FCF dead event. | |
5177 | **/ | |
5178 | static void | |
5179 | lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba) | |
5180 | { | |
5181 | struct lpfc_vport **vports; | |
5182 | int i; | |
5183 | ||
5184 | vports = lpfc_create_vport_work_array(phba); | |
5185 | if (vports) | |
5186 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) | |
5187 | lpfc_sli4_perform_vport_cvl(vports[i]); | |
5188 | lpfc_destroy_vport_work_array(phba, vports); | |
5189 | } | |
5190 | ||
da0436e9 | 5191 | /** |
76a95d75 | 5192 | * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event |
da0436e9 JS |
5193 | * @phba: pointer to lpfc hba data structure. |
5194 | * @acqe_link: pointer to the async fcoe completion queue entry. | |
5195 | * | |
5196 | * This routine is to handle the SLI4 asynchronous fcoe event. | |
5197 | **/ | |
5198 | static void | |
76a95d75 | 5199 | lpfc_sli4_async_fip_evt(struct lpfc_hba *phba, |
70f3c073 | 5200 | struct lpfc_acqe_fip *acqe_fip) |
da0436e9 | 5201 | { |
70f3c073 | 5202 | uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip); |
da0436e9 | 5203 | int rc; |
6669f9bb JS |
5204 | struct lpfc_vport *vport; |
5205 | struct lpfc_nodelist *ndlp; | |
5206 | struct Scsi_Host *shost; | |
695a814e JS |
5207 | int active_vlink_present; |
5208 | struct lpfc_vport **vports; | |
5209 | int i; | |
da0436e9 | 5210 | |
70f3c073 JS |
5211 | phba->fc_eventTag = acqe_fip->event_tag; |
5212 | phba->fcoe_eventtag = acqe_fip->event_tag; | |
da0436e9 | 5213 | switch (event_type) { |
70f3c073 JS |
5214 | case LPFC_FIP_EVENT_TYPE_NEW_FCF: |
5215 | case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD: | |
5216 | if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF) | |
999d813f JS |
5217 | lpfc_printf_log(phba, KERN_ERR, LOG_FIP | |
5218 | LOG_DISCOVERY, | |
a93ff37a JS |
5219 | "2546 New FCF event, evt_tag:x%x, " |
5220 | "index:x%x\n", | |
70f3c073 JS |
5221 | acqe_fip->event_tag, |
5222 | acqe_fip->index); | |
999d813f JS |
5223 | else |
5224 | lpfc_printf_log(phba, KERN_WARNING, LOG_FIP | | |
5225 | LOG_DISCOVERY, | |
a93ff37a JS |
5226 | "2788 FCF param modified event, " |
5227 | "evt_tag:x%x, index:x%x\n", | |
70f3c073 JS |
5228 | acqe_fip->event_tag, |
5229 | acqe_fip->index); | |
38b92ef8 | 5230 | if (phba->fcf.fcf_flag & FCF_DISCOVERY) { |
0c9ab6f5 JS |
5231 | /* |
5232 | * During period of FCF discovery, read the FCF | |
5233 | * table record indexed by the event to update | |
a93ff37a | 5234 | * FCF roundrobin failover eligible FCF bmask. |
0c9ab6f5 JS |
5235 | */ |
5236 | lpfc_printf_log(phba, KERN_INFO, LOG_FIP | | |
5237 | LOG_DISCOVERY, | |
a93ff37a JS |
5238 | "2779 Read FCF (x%x) for updating " |
5239 | "roundrobin FCF failover bmask\n", | |
70f3c073 JS |
5240 | acqe_fip->index); |
5241 | rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index); | |
0c9ab6f5 | 5242 | } |
38b92ef8 JS |
5243 | |
5244 | /* If the FCF discovery is in progress, do nothing. */ | |
3804dc84 | 5245 | spin_lock_irq(&phba->hbalock); |
a93ff37a | 5246 | if (phba->hba_flag & FCF_TS_INPROG) { |
38b92ef8 JS |
5247 | spin_unlock_irq(&phba->hbalock); |
5248 | break; | |
5249 | } | |
5250 | /* If fast FCF failover rescan event is pending, do nothing */ | |
036cad1f | 5251 | if (phba->fcf.fcf_flag & (FCF_REDISC_EVT | FCF_REDISC_PEND)) { |
38b92ef8 JS |
5252 | spin_unlock_irq(&phba->hbalock); |
5253 | break; | |
5254 | } | |
5255 | ||
c2b9712e JS |
5256 | /* If the FCF has been in discovered state, do nothing. */ |
5257 | if (phba->fcf.fcf_flag & FCF_SCAN_DONE) { | |
3804dc84 JS |
5258 | spin_unlock_irq(&phba->hbalock); |
5259 | break; | |
5260 | } | |
5261 | spin_unlock_irq(&phba->hbalock); | |
38b92ef8 | 5262 | |
0c9ab6f5 JS |
5263 | /* Otherwise, scan the entire FCF table and re-discover SAN */ |
5264 | lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, | |
a93ff37a JS |
5265 | "2770 Start FCF table scan per async FCF " |
5266 | "event, evt_tag:x%x, index:x%x\n", | |
70f3c073 | 5267 | acqe_fip->event_tag, acqe_fip->index); |
0c9ab6f5 JS |
5268 | rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, |
5269 | LPFC_FCOE_FCF_GET_FIRST); | |
da0436e9 | 5270 | if (rc) |
0c9ab6f5 JS |
5271 | lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY, |
5272 | "2547 Issue FCF scan read FCF mailbox " | |
a93ff37a | 5273 | "command failed (x%x)\n", rc); |
da0436e9 JS |
5274 | break; |
5275 | ||
70f3c073 | 5276 | case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL: |
da0436e9 | 5277 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, |
e4e74273 | 5278 | "2548 FCF Table full count 0x%x tag 0x%x\n", |
70f3c073 JS |
5279 | bf_get(lpfc_acqe_fip_fcf_count, acqe_fip), |
5280 | acqe_fip->event_tag); | |
da0436e9 JS |
5281 | break; |
5282 | ||
70f3c073 | 5283 | case LPFC_FIP_EVENT_TYPE_FCF_DEAD: |
80c17849 | 5284 | phba->fcoe_cvl_eventtag = acqe_fip->event_tag; |
0c9ab6f5 | 5285 | lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY, |
a93ff37a | 5286 | "2549 FCF (x%x) disconnected from network, " |
70f3c073 | 5287 | "tag:x%x\n", acqe_fip->index, acqe_fip->event_tag); |
38b92ef8 JS |
5288 | /* |
5289 | * If we are in the middle of FCF failover process, clear | |
5290 | * the corresponding FCF bit in the roundrobin bitmap. | |
da0436e9 | 5291 | */ |
fc2b989b | 5292 | spin_lock_irq(&phba->hbalock); |
a1cadfef JS |
5293 | if ((phba->fcf.fcf_flag & FCF_DISCOVERY) && |
5294 | (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) { | |
fc2b989b | 5295 | spin_unlock_irq(&phba->hbalock); |
0c9ab6f5 | 5296 | /* Update FLOGI FCF failover eligible FCF bmask */ |
70f3c073 | 5297 | lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index); |
fc2b989b JS |
5298 | break; |
5299 | } | |
38b92ef8 JS |
5300 | spin_unlock_irq(&phba->hbalock); |
5301 | ||
5302 | /* If the event is not for currently used fcf do nothing */ | |
70f3c073 | 5303 | if (phba->fcf.current_rec.fcf_indx != acqe_fip->index) |
38b92ef8 JS |
5304 | break; |
5305 | ||
5306 | /* | |
5307 | * Otherwise, request the port to rediscover the entire FCF | |
5308 | * table for a fast recovery from case that the current FCF | |
5309 | * is no longer valid as we are not in the middle of FCF | |
5310 | * failover process already. | |
5311 | */ | |
c2b9712e JS |
5312 | spin_lock_irq(&phba->hbalock); |
5313 | /* Mark the fast failover process in progress */ | |
5314 | phba->fcf.fcf_flag |= FCF_DEAD_DISC; | |
5315 | spin_unlock_irq(&phba->hbalock); | |
5316 | ||
5317 | lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, | |
5318 | "2771 Start FCF fast failover process due to " | |
5319 | "FCF DEAD event: evt_tag:x%x, fcf_index:x%x " | |
5320 | "\n", acqe_fip->event_tag, acqe_fip->index); | |
5321 | rc = lpfc_sli4_redisc_fcf_table(phba); | |
5322 | if (rc) { | |
5323 | lpfc_printf_log(phba, KERN_ERR, LOG_FIP | | |
5324 | LOG_DISCOVERY, | |
7afc0ce9 | 5325 | "2772 Issue FCF rediscover mailbox " |
c2b9712e JS |
5326 | "command failed, fail through to FCF " |
5327 | "dead event\n"); | |
5328 | spin_lock_irq(&phba->hbalock); | |
5329 | phba->fcf.fcf_flag &= ~FCF_DEAD_DISC; | |
5330 | spin_unlock_irq(&phba->hbalock); | |
5331 | /* | |
5332 | * Last resort will fail over by treating this | |
5333 | * as a link down to FCF registration. | |
5334 | */ | |
5335 | lpfc_sli4_fcf_dead_failthrough(phba); | |
5336 | } else { | |
5337 | /* Reset FCF roundrobin bmask for new discovery */ | |
5338 | lpfc_sli4_clear_fcf_rr_bmask(phba); | |
5339 | /* | |
5340 | * Handling fast FCF failover to a DEAD FCF event is | |
5341 | * considered equalivant to receiving CVL to all vports. | |
5342 | */ | |
5343 | lpfc_sli4_perform_all_vport_cvl(phba); | |
5344 | } | |
da0436e9 | 5345 | break; |
70f3c073 | 5346 | case LPFC_FIP_EVENT_TYPE_CVL: |
80c17849 | 5347 | phba->fcoe_cvl_eventtag = acqe_fip->event_tag; |
0c9ab6f5 | 5348 | lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY, |
6669f9bb | 5349 | "2718 Clear Virtual Link Received for VPI 0x%x" |
70f3c073 | 5350 | " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag); |
6d368e53 | 5351 | |
6669f9bb | 5352 | vport = lpfc_find_vport_by_vpid(phba, |
5248a749 | 5353 | acqe_fip->index); |
fc2b989b | 5354 | ndlp = lpfc_sli4_perform_vport_cvl(vport); |
6669f9bb JS |
5355 | if (!ndlp) |
5356 | break; | |
695a814e JS |
5357 | active_vlink_present = 0; |
5358 | ||
5359 | vports = lpfc_create_vport_work_array(phba); | |
5360 | if (vports) { | |
5361 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; | |
5362 | i++) { | |
5363 | if ((!(vports[i]->fc_flag & | |
5364 | FC_VPORT_CVL_RCVD)) && | |
5365 | (vports[i]->port_state > LPFC_FDISC)) { | |
5366 | active_vlink_present = 1; | |
5367 | break; | |
5368 | } | |
5369 | } | |
5370 | lpfc_destroy_vport_work_array(phba, vports); | |
5371 | } | |
5372 | ||
cc82355a JS |
5373 | /* |
5374 | * Don't re-instantiate if vport is marked for deletion. | |
5375 | * If we are here first then vport_delete is going to wait | |
5376 | * for discovery to complete. | |
5377 | */ | |
5378 | if (!(vport->load_flag & FC_UNLOADING) && | |
5379 | active_vlink_present) { | |
695a814e JS |
5380 | /* |
5381 | * If there are other active VLinks present, | |
5382 | * re-instantiate the Vlink using FDISC. | |
5383 | */ | |
256ec0d0 JS |
5384 | mod_timer(&ndlp->nlp_delayfunc, |
5385 | jiffies + msecs_to_jiffies(1000)); | |
fc2b989b | 5386 | shost = lpfc_shost_from_vport(vport); |
6669f9bb JS |
5387 | spin_lock_irq(shost->host_lock); |
5388 | ndlp->nlp_flag |= NLP_DELAY_TMO; | |
5389 | spin_unlock_irq(shost->host_lock); | |
695a814e JS |
5390 | ndlp->nlp_last_elscmd = ELS_CMD_FDISC; |
5391 | vport->port_state = LPFC_FDISC; | |
5392 | } else { | |
ecfd03c6 JS |
5393 | /* |
5394 | * Otherwise, we request port to rediscover | |
5395 | * the entire FCF table for a fast recovery | |
5396 | * from possible case that the current FCF | |
0c9ab6f5 JS |
5397 | * is no longer valid if we are not already |
5398 | * in the FCF failover process. | |
ecfd03c6 | 5399 | */ |
fc2b989b | 5400 | spin_lock_irq(&phba->hbalock); |
0c9ab6f5 | 5401 | if (phba->fcf.fcf_flag & FCF_DISCOVERY) { |
fc2b989b JS |
5402 | spin_unlock_irq(&phba->hbalock); |
5403 | break; | |
5404 | } | |
5405 | /* Mark the fast failover process in progress */ | |
0c9ab6f5 | 5406 | phba->fcf.fcf_flag |= FCF_ACVL_DISC; |
fc2b989b | 5407 | spin_unlock_irq(&phba->hbalock); |
0c9ab6f5 JS |
5408 | lpfc_printf_log(phba, KERN_INFO, LOG_FIP | |
5409 | LOG_DISCOVERY, | |
a93ff37a | 5410 | "2773 Start FCF failover per CVL, " |
70f3c073 | 5411 | "evt_tag:x%x\n", acqe_fip->event_tag); |
ecfd03c6 | 5412 | rc = lpfc_sli4_redisc_fcf_table(phba); |
fc2b989b | 5413 | if (rc) { |
0c9ab6f5 JS |
5414 | lpfc_printf_log(phba, KERN_ERR, LOG_FIP | |
5415 | LOG_DISCOVERY, | |
5416 | "2774 Issue FCF rediscover " | |
7afc0ce9 | 5417 | "mailbox command failed, " |
0c9ab6f5 | 5418 | "through to CVL event\n"); |
fc2b989b | 5419 | spin_lock_irq(&phba->hbalock); |
0c9ab6f5 | 5420 | phba->fcf.fcf_flag &= ~FCF_ACVL_DISC; |
fc2b989b | 5421 | spin_unlock_irq(&phba->hbalock); |
ecfd03c6 JS |
5422 | /* |
5423 | * Last resort will be re-try on the | |
5424 | * the current registered FCF entry. | |
5425 | */ | |
5426 | lpfc_retry_pport_discovery(phba); | |
38b92ef8 JS |
5427 | } else |
5428 | /* | |
5429 | * Reset FCF roundrobin bmask for new | |
5430 | * discovery. | |
5431 | */ | |
7d791df7 | 5432 | lpfc_sli4_clear_fcf_rr_bmask(phba); |
6669f9bb JS |
5433 | } |
5434 | break; | |
da0436e9 JS |
5435 | default: |
5436 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
5437 | "0288 Unknown FCoE event type 0x%x event tag " | |
70f3c073 | 5438 | "0x%x\n", event_type, acqe_fip->event_tag); |
da0436e9 JS |
5439 | break; |
5440 | } | |
5441 | } | |
5442 | ||
5443 | /** | |
5444 | * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event | |
5445 | * @phba: pointer to lpfc hba data structure. | |
5446 | * @acqe_link: pointer to the async dcbx completion queue entry. | |
5447 | * | |
5448 | * This routine is to handle the SLI4 asynchronous dcbx event. | |
5449 | **/ | |
5450 | static void | |
5451 | lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba, | |
5452 | struct lpfc_acqe_dcbx *acqe_dcbx) | |
5453 | { | |
4d9ab994 | 5454 | phba->fc_eventTag = acqe_dcbx->event_tag; |
da0436e9 JS |
5455 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, |
5456 | "0290 The SLI4 DCBX asynchronous event is not " | |
5457 | "handled yet\n"); | |
5458 | } | |
5459 | ||
b19a061a JS |
5460 | /** |
5461 | * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event | |
5462 | * @phba: pointer to lpfc hba data structure. | |
5463 | * @acqe_link: pointer to the async grp5 completion queue entry. | |
5464 | * | |
5465 | * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event | |
5466 | * is an asynchronous notified of a logical link speed change. The Port | |
5467 | * reports the logical link speed in units of 10Mbps. | |
5468 | **/ | |
5469 | static void | |
5470 | lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba, | |
5471 | struct lpfc_acqe_grp5 *acqe_grp5) | |
5472 | { | |
5473 | uint16_t prev_ll_spd; | |
5474 | ||
5475 | phba->fc_eventTag = acqe_grp5->event_tag; | |
5476 | phba->fcoe_eventtag = acqe_grp5->event_tag; | |
5477 | prev_ll_spd = phba->sli4_hba.link_state.logical_speed; | |
5478 | phba->sli4_hba.link_state.logical_speed = | |
8b68cd52 | 5479 | (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10; |
b19a061a JS |
5480 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, |
5481 | "2789 GRP5 Async Event: Updating logical link speed " | |
8b68cd52 JS |
5482 | "from %dMbps to %dMbps\n", prev_ll_spd, |
5483 | phba->sli4_hba.link_state.logical_speed); | |
b19a061a JS |
5484 | } |
5485 | ||
da0436e9 JS |
5486 | /** |
5487 | * lpfc_sli4_async_event_proc - Process all the pending asynchronous event | |
5488 | * @phba: pointer to lpfc hba data structure. | |
5489 | * | |
5490 | * This routine is invoked by the worker thread to process all the pending | |
5491 | * SLI4 asynchronous events. | |
5492 | **/ | |
5493 | void lpfc_sli4_async_event_proc(struct lpfc_hba *phba) | |
5494 | { | |
5495 | struct lpfc_cq_event *cq_event; | |
5496 | ||
5497 | /* First, declare the async event has been handled */ | |
5498 | spin_lock_irq(&phba->hbalock); | |
5499 | phba->hba_flag &= ~ASYNC_EVENT; | |
5500 | spin_unlock_irq(&phba->hbalock); | |
5501 | /* Now, handle all the async events */ | |
5502 | while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) { | |
5503 | /* Get the first event from the head of the event queue */ | |
5504 | spin_lock_irq(&phba->hbalock); | |
5505 | list_remove_head(&phba->sli4_hba.sp_asynce_work_queue, | |
5506 | cq_event, struct lpfc_cq_event, list); | |
5507 | spin_unlock_irq(&phba->hbalock); | |
5508 | /* Process the asynchronous event */ | |
5509 | switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) { | |
5510 | case LPFC_TRAILER_CODE_LINK: | |
5511 | lpfc_sli4_async_link_evt(phba, | |
5512 | &cq_event->cqe.acqe_link); | |
5513 | break; | |
5514 | case LPFC_TRAILER_CODE_FCOE: | |
70f3c073 | 5515 | lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip); |
da0436e9 JS |
5516 | break; |
5517 | case LPFC_TRAILER_CODE_DCBX: | |
5518 | lpfc_sli4_async_dcbx_evt(phba, | |
5519 | &cq_event->cqe.acqe_dcbx); | |
5520 | break; | |
b19a061a JS |
5521 | case LPFC_TRAILER_CODE_GRP5: |
5522 | lpfc_sli4_async_grp5_evt(phba, | |
5523 | &cq_event->cqe.acqe_grp5); | |
5524 | break; | |
70f3c073 JS |
5525 | case LPFC_TRAILER_CODE_FC: |
5526 | lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc); | |
5527 | break; | |
5528 | case LPFC_TRAILER_CODE_SLI: | |
5529 | lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli); | |
5530 | break; | |
da0436e9 JS |
5531 | default: |
5532 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
5533 | "1804 Invalid asynchrous event code: " | |
5534 | "x%x\n", bf_get(lpfc_trailer_code, | |
5535 | &cq_event->cqe.mcqe_cmpl)); | |
5536 | break; | |
5537 | } | |
5538 | /* Free the completion event processed to the free pool */ | |
5539 | lpfc_sli4_cq_event_release(phba, cq_event); | |
5540 | } | |
5541 | } | |
5542 | ||
ecfd03c6 JS |
5543 | /** |
5544 | * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event | |
5545 | * @phba: pointer to lpfc hba data structure. | |
5546 | * | |
5547 | * This routine is invoked by the worker thread to process FCF table | |
5548 | * rediscovery pending completion event. | |
5549 | **/ | |
5550 | void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba) | |
5551 | { | |
5552 | int rc; | |
5553 | ||
5554 | spin_lock_irq(&phba->hbalock); | |
5555 | /* Clear FCF rediscovery timeout event */ | |
5556 | phba->fcf.fcf_flag &= ~FCF_REDISC_EVT; | |
5557 | /* Clear driver fast failover FCF record flag */ | |
5558 | phba->fcf.failover_rec.flag = 0; | |
5559 | /* Set state for FCF fast failover */ | |
5560 | phba->fcf.fcf_flag |= FCF_REDISC_FOV; | |
5561 | spin_unlock_irq(&phba->hbalock); | |
5562 | ||
5563 | /* Scan FCF table from the first entry to re-discover SAN */ | |
0c9ab6f5 | 5564 | lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, |
a93ff37a | 5565 | "2777 Start post-quiescent FCF table scan\n"); |
0c9ab6f5 | 5566 | rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST); |
ecfd03c6 | 5567 | if (rc) |
0c9ab6f5 JS |
5568 | lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY, |
5569 | "2747 Issue FCF scan read FCF mailbox " | |
5570 | "command failed 0x%x\n", rc); | |
ecfd03c6 JS |
5571 | } |
5572 | ||
da0436e9 JS |
5573 | /** |
5574 | * lpfc_api_table_setup - Set up per hba pci-device group func api jump table | |
5575 | * @phba: pointer to lpfc hba data structure. | |
5576 | * @dev_grp: The HBA PCI-Device group number. | |
5577 | * | |
5578 | * This routine is invoked to set up the per HBA PCI-Device group function | |
5579 | * API jump table entries. | |
5580 | * | |
5581 | * Return: 0 if success, otherwise -ENODEV | |
5582 | **/ | |
5583 | int | |
5584 | lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp) | |
5585 | { | |
5586 | int rc; | |
5587 | ||
5588 | /* Set up lpfc PCI-device group */ | |
5589 | phba->pci_dev_grp = dev_grp; | |
5590 | ||
5591 | /* The LPFC_PCI_DEV_OC uses SLI4 */ | |
5592 | if (dev_grp == LPFC_PCI_DEV_OC) | |
5593 | phba->sli_rev = LPFC_SLI_REV4; | |
5594 | ||
5595 | /* Set up device INIT API function jump table */ | |
5596 | rc = lpfc_init_api_table_setup(phba, dev_grp); | |
5597 | if (rc) | |
5598 | return -ENODEV; | |
5599 | /* Set up SCSI API function jump table */ | |
5600 | rc = lpfc_scsi_api_table_setup(phba, dev_grp); | |
5601 | if (rc) | |
5602 | return -ENODEV; | |
5603 | /* Set up SLI API function jump table */ | |
5604 | rc = lpfc_sli_api_table_setup(phba, dev_grp); | |
5605 | if (rc) | |
5606 | return -ENODEV; | |
5607 | /* Set up MBOX API function jump table */ | |
5608 | rc = lpfc_mbox_api_table_setup(phba, dev_grp); | |
5609 | if (rc) | |
5610 | return -ENODEV; | |
5611 | ||
5612 | return 0; | |
5b75da2f JS |
5613 | } |
5614 | ||
5615 | /** | |
3621a710 | 5616 | * lpfc_log_intr_mode - Log the active interrupt mode |
5b75da2f JS |
5617 | * @phba: pointer to lpfc hba data structure. |
5618 | * @intr_mode: active interrupt mode adopted. | |
5619 | * | |
5620 | * This routine it invoked to log the currently used active interrupt mode | |
5621 | * to the device. | |
3772a991 JS |
5622 | **/ |
5623 | static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode) | |
5b75da2f JS |
5624 | { |
5625 | switch (intr_mode) { | |
5626 | case 0: | |
5627 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
5628 | "0470 Enable INTx interrupt mode.\n"); | |
5629 | break; | |
5630 | case 1: | |
5631 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
5632 | "0481 Enabled MSI interrupt mode.\n"); | |
5633 | break; | |
5634 | case 2: | |
5635 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
5636 | "0480 Enabled MSI-X interrupt mode.\n"); | |
5637 | break; | |
5638 | default: | |
5639 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
5640 | "0482 Illegal interrupt mode.\n"); | |
5641 | break; | |
5642 | } | |
5643 | return; | |
5644 | } | |
5645 | ||
5b75da2f | 5646 | /** |
3772a991 | 5647 | * lpfc_enable_pci_dev - Enable a generic PCI device. |
5b75da2f JS |
5648 | * @phba: pointer to lpfc hba data structure. |
5649 | * | |
3772a991 JS |
5650 | * This routine is invoked to enable the PCI device that is common to all |
5651 | * PCI devices. | |
5b75da2f JS |
5652 | * |
5653 | * Return codes | |
af901ca1 | 5654 | * 0 - successful |
3772a991 | 5655 | * other values - error |
5b75da2f | 5656 | **/ |
3772a991 JS |
5657 | static int |
5658 | lpfc_enable_pci_dev(struct lpfc_hba *phba) | |
5b75da2f | 5659 | { |
3772a991 | 5660 | struct pci_dev *pdev; |
5b75da2f | 5661 | |
3772a991 JS |
5662 | /* Obtain PCI device reference */ |
5663 | if (!phba->pcidev) | |
5664 | goto out_error; | |
5665 | else | |
5666 | pdev = phba->pcidev; | |
3772a991 JS |
5667 | /* Enable PCI device */ |
5668 | if (pci_enable_device_mem(pdev)) | |
5669 | goto out_error; | |
5670 | /* Request PCI resource for the device */ | |
e0c0483c | 5671 | if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME)) |
3772a991 JS |
5672 | goto out_disable_device; |
5673 | /* Set up device as PCI master and save state for EEH */ | |
5674 | pci_set_master(pdev); | |
5675 | pci_try_set_mwi(pdev); | |
5676 | pci_save_state(pdev); | |
5b75da2f | 5677 | |
0558056c | 5678 | /* PCIe EEH recovery on powerpc platforms needs fundamental reset */ |
453193e0 | 5679 | if (pci_is_pcie(pdev)) |
0558056c JS |
5680 | pdev->needs_freset = 1; |
5681 | ||
3772a991 | 5682 | return 0; |
5b75da2f | 5683 | |
3772a991 JS |
5684 | out_disable_device: |
5685 | pci_disable_device(pdev); | |
5686 | out_error: | |
079b5c91 | 5687 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
e0c0483c | 5688 | "1401 Failed to enable pci device\n"); |
3772a991 | 5689 | return -ENODEV; |
5b75da2f JS |
5690 | } |
5691 | ||
5692 | /** | |
3772a991 | 5693 | * lpfc_disable_pci_dev - Disable a generic PCI device. |
5b75da2f JS |
5694 | * @phba: pointer to lpfc hba data structure. |
5695 | * | |
3772a991 JS |
5696 | * This routine is invoked to disable the PCI device that is common to all |
5697 | * PCI devices. | |
5b75da2f JS |
5698 | **/ |
5699 | static void | |
3772a991 | 5700 | lpfc_disable_pci_dev(struct lpfc_hba *phba) |
5b75da2f | 5701 | { |
3772a991 | 5702 | struct pci_dev *pdev; |
5b75da2f | 5703 | |
3772a991 JS |
5704 | /* Obtain PCI device reference */ |
5705 | if (!phba->pcidev) | |
5706 | return; | |
5707 | else | |
5708 | pdev = phba->pcidev; | |
3772a991 | 5709 | /* Release PCI resource and disable PCI device */ |
e0c0483c | 5710 | pci_release_mem_regions(pdev); |
3772a991 | 5711 | pci_disable_device(pdev); |
5b75da2f JS |
5712 | |
5713 | return; | |
5714 | } | |
5715 | ||
e59058c4 | 5716 | /** |
3772a991 JS |
5717 | * lpfc_reset_hba - Reset a hba |
5718 | * @phba: pointer to lpfc hba data structure. | |
e59058c4 | 5719 | * |
3772a991 JS |
5720 | * This routine is invoked to reset a hba device. It brings the HBA |
5721 | * offline, performs a board restart, and then brings the board back | |
5722 | * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up | |
5723 | * on outstanding mailbox commands. | |
e59058c4 | 5724 | **/ |
3772a991 JS |
5725 | void |
5726 | lpfc_reset_hba(struct lpfc_hba *phba) | |
dea3101e | 5727 | { |
3772a991 JS |
5728 | /* If resets are disabled then set error state and return. */ |
5729 | if (!phba->cfg_enable_hba_reset) { | |
5730 | phba->link_state = LPFC_HBA_ERROR; | |
5731 | return; | |
5732 | } | |
ee62021a JS |
5733 | if (phba->sli.sli_flag & LPFC_SLI_ACTIVE) |
5734 | lpfc_offline_prep(phba, LPFC_MBX_WAIT); | |
5735 | else | |
5736 | lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); | |
3772a991 JS |
5737 | lpfc_offline(phba); |
5738 | lpfc_sli_brdrestart(phba); | |
5739 | lpfc_online(phba); | |
5740 | lpfc_unblock_mgmt_io(phba); | |
5741 | } | |
dea3101e | 5742 | |
0a96e975 JS |
5743 | /** |
5744 | * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions | |
5745 | * @phba: pointer to lpfc hba data structure. | |
5746 | * | |
5747 | * This function enables the PCI SR-IOV virtual functions to a physical | |
5748 | * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to | |
5749 | * enable the number of virtual functions to the physical function. As | |
5750 | * not all devices support SR-IOV, the return code from the pci_enable_sriov() | |
5751 | * API call does not considered as an error condition for most of the device. | |
5752 | **/ | |
5753 | uint16_t | |
5754 | lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba) | |
5755 | { | |
5756 | struct pci_dev *pdev = phba->pcidev; | |
5757 | uint16_t nr_virtfn; | |
5758 | int pos; | |
5759 | ||
0a96e975 JS |
5760 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); |
5761 | if (pos == 0) | |
5762 | return 0; | |
5763 | ||
5764 | pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn); | |
5765 | return nr_virtfn; | |
5766 | } | |
5767 | ||
912e3acd JS |
5768 | /** |
5769 | * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions | |
5770 | * @phba: pointer to lpfc hba data structure. | |
5771 | * @nr_vfn: number of virtual functions to be enabled. | |
5772 | * | |
5773 | * This function enables the PCI SR-IOV virtual functions to a physical | |
5774 | * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to | |
5775 | * enable the number of virtual functions to the physical function. As | |
5776 | * not all devices support SR-IOV, the return code from the pci_enable_sriov() | |
5777 | * API call does not considered as an error condition for most of the device. | |
5778 | **/ | |
5779 | int | |
5780 | lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn) | |
5781 | { | |
5782 | struct pci_dev *pdev = phba->pcidev; | |
0a96e975 | 5783 | uint16_t max_nr_vfn; |
912e3acd JS |
5784 | int rc; |
5785 | ||
0a96e975 JS |
5786 | max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba); |
5787 | if (nr_vfn > max_nr_vfn) { | |
5788 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
5789 | "3057 Requested vfs (%d) greater than " | |
5790 | "supported vfs (%d)", nr_vfn, max_nr_vfn); | |
5791 | return -EINVAL; | |
5792 | } | |
5793 | ||
912e3acd JS |
5794 | rc = pci_enable_sriov(pdev, nr_vfn); |
5795 | if (rc) { | |
5796 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
5797 | "2806 Failed to enable sriov on this device " | |
5798 | "with vfn number nr_vf:%d, rc:%d\n", | |
5799 | nr_vfn, rc); | |
5800 | } else | |
5801 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
5802 | "2807 Successful enable sriov on this device " | |
5803 | "with vfn number nr_vf:%d\n", nr_vfn); | |
5804 | return rc; | |
5805 | } | |
5806 | ||
3772a991 | 5807 | /** |
895427bd | 5808 | * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources. |
3772a991 JS |
5809 | * @phba: pointer to lpfc hba data structure. |
5810 | * | |
895427bd JS |
5811 | * This routine is invoked to set up the driver internal resources before the |
5812 | * device specific resource setup to support the HBA device it attached to. | |
3772a991 JS |
5813 | * |
5814 | * Return codes | |
895427bd JS |
5815 | * 0 - successful |
5816 | * other values - error | |
3772a991 JS |
5817 | **/ |
5818 | static int | |
895427bd | 5819 | lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba) |
3772a991 | 5820 | { |
895427bd | 5821 | struct lpfc_sli *psli = &phba->sli; |
dea3101e | 5822 | |
2e0fef85 | 5823 | /* |
895427bd | 5824 | * Driver resources common to all SLI revisions |
2e0fef85 | 5825 | */ |
895427bd JS |
5826 | atomic_set(&phba->fast_event_count, 0); |
5827 | spin_lock_init(&phba->hbalock); | |
dea3101e | 5828 | |
895427bd JS |
5829 | /* Initialize ndlp management spinlock */ |
5830 | spin_lock_init(&phba->ndlp_lock); | |
5831 | ||
523128e5 JS |
5832 | /* Initialize port_list spinlock */ |
5833 | spin_lock_init(&phba->port_list_lock); | |
895427bd | 5834 | INIT_LIST_HEAD(&phba->port_list); |
523128e5 | 5835 | |
895427bd JS |
5836 | INIT_LIST_HEAD(&phba->work_list); |
5837 | init_waitqueue_head(&phba->wait_4_mlo_m_q); | |
5838 | ||
5839 | /* Initialize the wait queue head for the kernel thread */ | |
5840 | init_waitqueue_head(&phba->work_waitq); | |
5841 | ||
5842 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
f358dd0c | 5843 | "1403 Protocols supported %s %s %s\n", |
895427bd JS |
5844 | ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ? |
5845 | "SCSI" : " "), | |
5846 | ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ? | |
f358dd0c JS |
5847 | "NVME" : " "), |
5848 | (phba->nvmet_support ? "NVMET" : " ")); | |
895427bd | 5849 | |
0794d601 JS |
5850 | /* Initialize the IO buffer list used by driver for SLI3 SCSI */ |
5851 | spin_lock_init(&phba->scsi_buf_list_get_lock); | |
5852 | INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get); | |
5853 | spin_lock_init(&phba->scsi_buf_list_put_lock); | |
5854 | INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put); | |
895427bd | 5855 | |
0794d601 JS |
5856 | /* Initialize the IO buffer list used by driver for SLI4 SCSI/NVME */ |
5857 | spin_lock_init(&phba->common_buf_list_get_lock); | |
5858 | INIT_LIST_HEAD(&phba->lpfc_common_buf_list_get); | |
5859 | phba->get_common_bufs = 0; | |
5860 | spin_lock_init(&phba->common_buf_list_put_lock); | |
5861 | INIT_LIST_HEAD(&phba->lpfc_common_buf_list_put); | |
5862 | phba->put_common_bufs = 0; | |
895427bd JS |
5863 | |
5864 | /* Initialize the fabric iocb list */ | |
5865 | INIT_LIST_HEAD(&phba->fabric_iocb_list); | |
5866 | ||
5867 | /* Initialize list to save ELS buffers */ | |
5868 | INIT_LIST_HEAD(&phba->elsbuf); | |
5869 | ||
5870 | /* Initialize FCF connection rec list */ | |
5871 | INIT_LIST_HEAD(&phba->fcf_conn_rec_list); | |
5872 | ||
5873 | /* Initialize OAS configuration list */ | |
5874 | spin_lock_init(&phba->devicelock); | |
5875 | INIT_LIST_HEAD(&phba->luns); | |
858c9f6c | 5876 | |
3772a991 | 5877 | /* MBOX heartbeat timer */ |
f22eb4d3 | 5878 | timer_setup(&psli->mbox_tmo, lpfc_mbox_timeout, 0); |
3772a991 | 5879 | /* Fabric block timer */ |
f22eb4d3 | 5880 | timer_setup(&phba->fabric_block_timer, lpfc_fabric_block_timeout, 0); |
3772a991 | 5881 | /* EA polling mode timer */ |
f22eb4d3 | 5882 | timer_setup(&phba->eratt_poll, lpfc_poll_eratt, 0); |
895427bd | 5883 | /* Heartbeat timer */ |
f22eb4d3 | 5884 | timer_setup(&phba->hb_tmofunc, lpfc_hb_timeout, 0); |
895427bd JS |
5885 | |
5886 | return 0; | |
5887 | } | |
5888 | ||
5889 | /** | |
5890 | * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev | |
5891 | * @phba: pointer to lpfc hba data structure. | |
5892 | * | |
5893 | * This routine is invoked to set up the driver internal resources specific to | |
5894 | * support the SLI-3 HBA device it attached to. | |
5895 | * | |
5896 | * Return codes | |
5897 | * 0 - successful | |
5898 | * other values - error | |
5899 | **/ | |
5900 | static int | |
5901 | lpfc_sli_driver_resource_setup(struct lpfc_hba *phba) | |
5902 | { | |
0794d601 | 5903 | int rc, entry_sz; |
895427bd JS |
5904 | |
5905 | /* | |
5906 | * Initialize timers used by driver | |
5907 | */ | |
5908 | ||
5909 | /* FCP polling mode timer */ | |
f22eb4d3 | 5910 | timer_setup(&phba->fcp_poll_timer, lpfc_poll_timeout, 0); |
dea3101e | 5911 | |
3772a991 JS |
5912 | /* Host attention work mask setup */ |
5913 | phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT); | |
5914 | phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4)); | |
dea3101e | 5915 | |
3772a991 JS |
5916 | /* Get all the module params for configuring this host */ |
5917 | lpfc_get_cfgparam(phba); | |
895427bd JS |
5918 | /* Set up phase-1 common device driver resources */ |
5919 | ||
5920 | rc = lpfc_setup_driver_resource_phase1(phba); | |
5921 | if (rc) | |
5922 | return -ENODEV; | |
5923 | ||
49198b37 JS |
5924 | if (phba->pcidev->device == PCI_DEVICE_ID_HORNET) { |
5925 | phba->menlo_flag |= HBA_MENLO_SUPPORT; | |
5926 | /* check for menlo minimum sg count */ | |
5927 | if (phba->cfg_sg_seg_cnt < LPFC_DEFAULT_MENLO_SG_SEG_CNT) | |
5928 | phba->cfg_sg_seg_cnt = LPFC_DEFAULT_MENLO_SG_SEG_CNT; | |
5929 | } | |
5930 | ||
895427bd | 5931 | if (!phba->sli.sli3_ring) |
6396bb22 KC |
5932 | phba->sli.sli3_ring = kcalloc(LPFC_SLI3_MAX_RING, |
5933 | sizeof(struct lpfc_sli_ring), | |
5934 | GFP_KERNEL); | |
895427bd | 5935 | if (!phba->sli.sli3_ring) |
2a76a283 JS |
5936 | return -ENOMEM; |
5937 | ||
dea3101e | 5938 | /* |
96f7077f | 5939 | * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size |
3772a991 | 5940 | * used to create the sg_dma_buf_pool must be dynamically calculated. |
dea3101e | 5941 | */ |
3772a991 | 5942 | |
96f7077f JS |
5943 | /* Initialize the host templates the configured values. */ |
5944 | lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt; | |
96418b5e JS |
5945 | lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt; |
5946 | lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt; | |
96f7077f | 5947 | |
0794d601 JS |
5948 | if (phba->sli_rev == LPFC_SLI_REV4) |
5949 | entry_sz = sizeof(struct sli4_sge); | |
5950 | else | |
5951 | entry_sz = sizeof(struct ulp_bde64); | |
5952 | ||
96f7077f | 5953 | /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */ |
3772a991 | 5954 | if (phba->cfg_enable_bg) { |
96f7077f JS |
5955 | /* |
5956 | * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd, | |
5957 | * the FCP rsp, and a BDE for each. Sice we have no control | |
5958 | * over how many protection data segments the SCSI Layer | |
5959 | * will hand us (ie: there could be one for every block | |
5960 | * in the IO), we just allocate enough BDEs to accomidate | |
5961 | * our max amount and we need to limit lpfc_sg_seg_cnt to | |
5962 | * minimize the risk of running out. | |
5963 | */ | |
5964 | phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + | |
5965 | sizeof(struct fcp_rsp) + | |
0794d601 | 5966 | (LPFC_MAX_SG_SEG_CNT * entry_sz); |
96f7077f JS |
5967 | |
5968 | if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF) | |
5969 | phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF; | |
5970 | ||
5971 | /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */ | |
5972 | phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT; | |
5973 | } else { | |
5974 | /* | |
5975 | * The scsi_buf for a regular I/O will hold the FCP cmnd, | |
5976 | * the FCP rsp, a BDE for each, and a BDE for up to | |
5977 | * cfg_sg_seg_cnt data segments. | |
5978 | */ | |
5979 | phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + | |
5980 | sizeof(struct fcp_rsp) + | |
0794d601 | 5981 | ((phba->cfg_sg_seg_cnt + 2) * entry_sz); |
96f7077f JS |
5982 | |
5983 | /* Total BDEs in BPL for scsi_sg_list */ | |
5984 | phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2; | |
901a920f | 5985 | } |
dea3101e | 5986 | |
96f7077f JS |
5987 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, |
5988 | "9088 sg_tablesize:%d dmabuf_size:%d total_bde:%d\n", | |
5989 | phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size, | |
5990 | phba->cfg_total_seg_cnt); | |
dea3101e | 5991 | |
3772a991 JS |
5992 | phba->max_vpi = LPFC_MAX_VPI; |
5993 | /* This will be set to correct value after config_port mbox */ | |
5994 | phba->max_vports = 0; | |
dea3101e | 5995 | |
3772a991 JS |
5996 | /* |
5997 | * Initialize the SLI Layer to run with lpfc HBAs. | |
5998 | */ | |
5999 | lpfc_sli_setup(phba); | |
895427bd | 6000 | lpfc_sli_queue_init(phba); |
ed957684 | 6001 | |
3772a991 JS |
6002 | /* Allocate device driver memory */ |
6003 | if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ)) | |
6004 | return -ENOMEM; | |
51ef4c26 | 6005 | |
912e3acd JS |
6006 | /* |
6007 | * Enable sr-iov virtual functions if supported and configured | |
6008 | * through the module parameter. | |
6009 | */ | |
6010 | if (phba->cfg_sriov_nr_virtfn > 0) { | |
6011 | rc = lpfc_sli_probe_sriov_nr_virtfn(phba, | |
6012 | phba->cfg_sriov_nr_virtfn); | |
6013 | if (rc) { | |
6014 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
6015 | "2808 Requested number of SR-IOV " | |
6016 | "virtual functions (%d) is not " | |
6017 | "supported\n", | |
6018 | phba->cfg_sriov_nr_virtfn); | |
6019 | phba->cfg_sriov_nr_virtfn = 0; | |
6020 | } | |
6021 | } | |
6022 | ||
3772a991 JS |
6023 | return 0; |
6024 | } | |
ed957684 | 6025 | |
3772a991 JS |
6026 | /** |
6027 | * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev | |
6028 | * @phba: pointer to lpfc hba data structure. | |
6029 | * | |
6030 | * This routine is invoked to unset the driver internal resources set up | |
6031 | * specific for supporting the SLI-3 HBA device it attached to. | |
6032 | **/ | |
6033 | static void | |
6034 | lpfc_sli_driver_resource_unset(struct lpfc_hba *phba) | |
6035 | { | |
6036 | /* Free device driver memory allocated */ | |
6037 | lpfc_mem_free_all(phba); | |
3163f725 | 6038 | |
3772a991 JS |
6039 | return; |
6040 | } | |
dea3101e | 6041 | |
3772a991 | 6042 | /** |
da0436e9 | 6043 | * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev |
3772a991 JS |
6044 | * @phba: pointer to lpfc hba data structure. |
6045 | * | |
da0436e9 JS |
6046 | * This routine is invoked to set up the driver internal resources specific to |
6047 | * support the SLI-4 HBA device it attached to. | |
3772a991 JS |
6048 | * |
6049 | * Return codes | |
af901ca1 | 6050 | * 0 - successful |
da0436e9 | 6051 | * other values - error |
3772a991 JS |
6052 | **/ |
6053 | static int | |
da0436e9 | 6054 | lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba) |
3772a991 | 6055 | { |
28baac74 | 6056 | LPFC_MBOXQ_t *mboxq; |
f358dd0c | 6057 | MAILBOX_t *mb; |
895427bd | 6058 | int rc, i, max_buf_size; |
28baac74 JS |
6059 | uint8_t pn_page[LPFC_MAX_SUPPORTED_PAGES] = {0}; |
6060 | struct lpfc_mqe *mqe; | |
09294d46 | 6061 | int longs; |
81e6a637 | 6062 | int extra; |
f358dd0c | 6063 | uint64_t wwn; |
b92dc72d JS |
6064 | u32 if_type; |
6065 | u32 if_fam; | |
da0436e9 | 6066 | |
895427bd JS |
6067 | phba->sli4_hba.num_online_cpu = num_online_cpus(); |
6068 | phba->sli4_hba.num_present_cpu = lpfc_present_cpu; | |
6069 | phba->sli4_hba.curr_disp_cpu = 0; | |
6070 | ||
716d3bc5 JS |
6071 | /* Get all the module params for configuring this host */ |
6072 | lpfc_get_cfgparam(phba); | |
6073 | ||
895427bd JS |
6074 | /* Set up phase-1 common device driver resources */ |
6075 | rc = lpfc_setup_driver_resource_phase1(phba); | |
6076 | if (rc) | |
6077 | return -ENODEV; | |
6078 | ||
da0436e9 JS |
6079 | /* Before proceed, wait for POST done and device ready */ |
6080 | rc = lpfc_sli4_post_status_check(phba); | |
6081 | if (rc) | |
6082 | return -ENODEV; | |
6083 | ||
3772a991 | 6084 | /* |
da0436e9 | 6085 | * Initialize timers used by driver |
3772a991 | 6086 | */ |
3772a991 | 6087 | |
f22eb4d3 | 6088 | timer_setup(&phba->rrq_tmr, lpfc_rrq_timeout, 0); |
3772a991 | 6089 | |
ecfd03c6 | 6090 | /* FCF rediscover timer */ |
f22eb4d3 | 6091 | timer_setup(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo, 0); |
ecfd03c6 | 6092 | |
7ad20aa9 JS |
6093 | /* |
6094 | * Control structure for handling external multi-buffer mailbox | |
6095 | * command pass-through. | |
6096 | */ | |
6097 | memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0, | |
6098 | sizeof(struct lpfc_mbox_ext_buf_ctx)); | |
6099 | INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list); | |
6100 | ||
da0436e9 | 6101 | phba->max_vpi = LPFC_MAX_VPI; |
67d12733 | 6102 | |
da0436e9 JS |
6103 | /* This will be set to correct value after the read_config mbox */ |
6104 | phba->max_vports = 0; | |
3772a991 | 6105 | |
da0436e9 JS |
6106 | /* Program the default value of vlan_id and fc_map */ |
6107 | phba->valid_vlan = 0; | |
6108 | phba->fc_map[0] = LPFC_FCOE_FCF_MAP0; | |
6109 | phba->fc_map[1] = LPFC_FCOE_FCF_MAP1; | |
6110 | phba->fc_map[2] = LPFC_FCOE_FCF_MAP2; | |
3772a991 | 6111 | |
2a76a283 JS |
6112 | /* |
6113 | * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands | |
895427bd JS |
6114 | * we will associate a new ring, for each EQ/CQ/WQ tuple. |
6115 | * The WQ create will allocate the ring. | |
2a76a283 | 6116 | */ |
09294d46 | 6117 | |
81e6a637 JS |
6118 | /* |
6119 | * 1 for cmd, 1 for rsp, NVME adds an extra one | |
6120 | * for boundary conditions in its max_sgl_segment template. | |
6121 | */ | |
6122 | extra = 2; | |
6123 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) | |
6124 | extra++; | |
6125 | ||
da0436e9 | 6126 | /* |
09294d46 JS |
6127 | * It doesn't matter what family our adapter is in, we are |
6128 | * limited to 2 Pages, 512 SGEs, for our SGL. | |
6129 | * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp | |
6130 | */ | |
6131 | max_buf_size = (2 * SLI4_PAGE_SIZE); | |
09294d46 | 6132 | |
da0436e9 | 6133 | /* |
895427bd JS |
6134 | * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size |
6135 | * used to create the sg_dma_buf_pool must be calculated. | |
da0436e9 | 6136 | */ |
f44ac12f | 6137 | if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) { |
96f7077f | 6138 | /* |
895427bd JS |
6139 | * The scsi_buf for a T10-DIF I/O holds the FCP cmnd, |
6140 | * the FCP rsp, and a SGE. Sice we have no control | |
6141 | * over how many protection segments the SCSI Layer | |
96f7077f | 6142 | * will hand us (ie: there could be one for every block |
895427bd JS |
6143 | * in the IO), just allocate enough SGEs to accomidate |
6144 | * our max amount and we need to limit lpfc_sg_seg_cnt | |
6145 | * to minimize the risk of running out. | |
96f7077f JS |
6146 | */ |
6147 | phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + | |
895427bd | 6148 | sizeof(struct fcp_rsp) + max_buf_size; |
96f7077f JS |
6149 | |
6150 | /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */ | |
6151 | phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT; | |
6152 | ||
5b9e70b2 JS |
6153 | /* |
6154 | * If supporting DIF, reduce the seg count for scsi to | |
6155 | * allow room for the DIF sges. | |
6156 | */ | |
6157 | if (phba->cfg_enable_bg && | |
6158 | phba->cfg_sg_seg_cnt > LPFC_MAX_BG_SLI4_SEG_CNT_DIF) | |
6159 | phba->cfg_scsi_seg_cnt = LPFC_MAX_BG_SLI4_SEG_CNT_DIF; | |
6160 | else | |
6161 | phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt; | |
6162 | ||
96f7077f JS |
6163 | } else { |
6164 | /* | |
895427bd | 6165 | * The scsi_buf for a regular I/O holds the FCP cmnd, |
96f7077f JS |
6166 | * the FCP rsp, a SGE for each, and a SGE for up to |
6167 | * cfg_sg_seg_cnt data segments. | |
6168 | */ | |
6169 | phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + | |
895427bd | 6170 | sizeof(struct fcp_rsp) + |
81e6a637 | 6171 | ((phba->cfg_sg_seg_cnt + extra) * |
895427bd | 6172 | sizeof(struct sli4_sge)); |
96f7077f JS |
6173 | |
6174 | /* Total SGEs for scsi_sg_list */ | |
81e6a637 | 6175 | phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + extra; |
5b9e70b2 | 6176 | phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt; |
895427bd | 6177 | |
96f7077f | 6178 | /* |
81e6a637 | 6179 | * NOTE: if (phba->cfg_sg_seg_cnt + extra) <= 256 we only |
895427bd | 6180 | * need to post 1 page for the SGL. |
96f7077f | 6181 | */ |
085c647c | 6182 | } |
acd6859b | 6183 | |
5b9e70b2 JS |
6184 | /* Limit to LPFC_MAX_NVME_SEG_CNT for NVME. */ |
6185 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
6186 | if (phba->cfg_sg_seg_cnt > LPFC_MAX_NVME_SEG_CNT) { | |
6187 | lpfc_printf_log(phba, KERN_INFO, LOG_NVME | LOG_INIT, | |
6188 | "6300 Reducing NVME sg segment " | |
6189 | "cnt to %d\n", | |
6190 | LPFC_MAX_NVME_SEG_CNT); | |
6191 | phba->cfg_nvme_seg_cnt = LPFC_MAX_NVME_SEG_CNT; | |
6192 | } else | |
6193 | phba->cfg_nvme_seg_cnt = phba->cfg_sg_seg_cnt; | |
6194 | } | |
6195 | ||
96f7077f | 6196 | /* Initialize the host templates with the updated values. */ |
5b9e70b2 JS |
6197 | lpfc_vport_template.sg_tablesize = phba->cfg_scsi_seg_cnt; |
6198 | lpfc_template.sg_tablesize = phba->cfg_scsi_seg_cnt; | |
6199 | lpfc_template_no_hr.sg_tablesize = phba->cfg_scsi_seg_cnt; | |
96f7077f JS |
6200 | |
6201 | if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ) | |
6202 | phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ; | |
6203 | else | |
6204 | phba->cfg_sg_dma_buf_size = | |
6205 | SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size); | |
6206 | ||
6207 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, | |
5b9e70b2 JS |
6208 | "9087 sg_seg_cnt:%d dmabuf_size:%d " |
6209 | "total:%d scsi:%d nvme:%d\n", | |
96f7077f | 6210 | phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size, |
5b9e70b2 JS |
6211 | phba->cfg_total_seg_cnt, phba->cfg_scsi_seg_cnt, |
6212 | phba->cfg_nvme_seg_cnt); | |
3772a991 | 6213 | |
da0436e9 | 6214 | /* Initialize buffer queue management fields */ |
895427bd | 6215 | INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list); |
da0436e9 JS |
6216 | phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc; |
6217 | phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free; | |
3772a991 | 6218 | |
da0436e9 JS |
6219 | /* |
6220 | * Initialize the SLI Layer to run with lpfc SLI4 HBAs. | |
6221 | */ | |
895427bd JS |
6222 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) { |
6223 | /* Initialize the Abort scsi buffer list used by driver */ | |
6224 | spin_lock_init(&phba->sli4_hba.abts_scsi_buf_list_lock); | |
6225 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_scsi_buf_list); | |
6226 | } | |
6227 | ||
6228 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
6229 | /* Initialize the Abort nvme buffer list used by driver */ | |
6230 | spin_lock_init(&phba->sli4_hba.abts_nvme_buf_list_lock); | |
6231 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvme_buf_list); | |
86c67379 | 6232 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); |
a8cf5dfe | 6233 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list); |
895427bd JS |
6234 | } |
6235 | ||
da0436e9 | 6236 | /* This abort list used by worker thread */ |
895427bd | 6237 | spin_lock_init(&phba->sli4_hba.sgl_list_lock); |
a8cf5dfe | 6238 | spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock); |
3772a991 | 6239 | |
da0436e9 | 6240 | /* |
6d368e53 | 6241 | * Initialize driver internal slow-path work queues |
da0436e9 | 6242 | */ |
3772a991 | 6243 | |
da0436e9 JS |
6244 | /* Driver internel slow-path CQ Event pool */ |
6245 | INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool); | |
6246 | /* Response IOCB work queue list */ | |
45ed1190 | 6247 | INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event); |
da0436e9 JS |
6248 | /* Asynchronous event CQ Event work queue list */ |
6249 | INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue); | |
6250 | /* Fast-path XRI aborted CQ Event work queue list */ | |
6251 | INIT_LIST_HEAD(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue); | |
6252 | /* Slow-path XRI aborted CQ Event work queue list */ | |
6253 | INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue); | |
6254 | /* Receive queue CQ Event work queue list */ | |
6255 | INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue); | |
6256 | ||
6d368e53 JS |
6257 | /* Initialize extent block lists. */ |
6258 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list); | |
6259 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list); | |
6260 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list); | |
6261 | INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list); | |
6262 | ||
d1f525aa JS |
6263 | /* Initialize mboxq lists. If the early init routines fail |
6264 | * these lists need to be correctly initialized. | |
6265 | */ | |
6266 | INIT_LIST_HEAD(&phba->sli.mboxq); | |
6267 | INIT_LIST_HEAD(&phba->sli.mboxq_cmpl); | |
6268 | ||
448193b5 JS |
6269 | /* initialize optic_state to 0xFF */ |
6270 | phba->sli4_hba.lnk_info.optic_state = 0xff; | |
6271 | ||
da0436e9 JS |
6272 | /* Allocate device driver memory */ |
6273 | rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ); | |
6274 | if (rc) | |
6275 | return -ENOMEM; | |
6276 | ||
2fcee4bf | 6277 | /* IF Type 2 ports get initialized now. */ |
27d6ac0a | 6278 | if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >= |
2fcee4bf JS |
6279 | LPFC_SLI_INTF_IF_TYPE_2) { |
6280 | rc = lpfc_pci_function_reset(phba); | |
895427bd JS |
6281 | if (unlikely(rc)) { |
6282 | rc = -ENODEV; | |
6283 | goto out_free_mem; | |
6284 | } | |
946727dc | 6285 | phba->temp_sensor_support = 1; |
2fcee4bf JS |
6286 | } |
6287 | ||
da0436e9 JS |
6288 | /* Create the bootstrap mailbox command */ |
6289 | rc = lpfc_create_bootstrap_mbox(phba); | |
6290 | if (unlikely(rc)) | |
6291 | goto out_free_mem; | |
6292 | ||
6293 | /* Set up the host's endian order with the device. */ | |
6294 | rc = lpfc_setup_endian_order(phba); | |
6295 | if (unlikely(rc)) | |
6296 | goto out_free_bsmbx; | |
6297 | ||
6298 | /* Set up the hba's configuration parameters. */ | |
6299 | rc = lpfc_sli4_read_config(phba); | |
cff261f6 JS |
6300 | if (unlikely(rc)) |
6301 | goto out_free_bsmbx; | |
6302 | rc = lpfc_mem_alloc_active_rrq_pool_s4(phba); | |
da0436e9 JS |
6303 | if (unlikely(rc)) |
6304 | goto out_free_bsmbx; | |
6305 | ||
2fcee4bf JS |
6306 | /* IF Type 0 ports get initialized now. */ |
6307 | if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == | |
6308 | LPFC_SLI_INTF_IF_TYPE_0) { | |
6309 | rc = lpfc_pci_function_reset(phba); | |
6310 | if (unlikely(rc)) | |
6311 | goto out_free_bsmbx; | |
6312 | } | |
da0436e9 | 6313 | |
cb5172ea JS |
6314 | mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, |
6315 | GFP_KERNEL); | |
6316 | if (!mboxq) { | |
6317 | rc = -ENOMEM; | |
6318 | goto out_free_bsmbx; | |
6319 | } | |
6320 | ||
f358dd0c | 6321 | /* Check for NVMET being configured */ |
895427bd | 6322 | phba->nvmet_support = 0; |
f358dd0c JS |
6323 | if (lpfc_enable_nvmet_cnt) { |
6324 | ||
6325 | /* First get WWN of HBA instance */ | |
6326 | lpfc_read_nv(phba, mboxq); | |
6327 | rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
6328 | if (rc != MBX_SUCCESS) { | |
6329 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
6330 | "6016 Mailbox failed , mbxCmd x%x " | |
6331 | "READ_NV, mbxStatus x%x\n", | |
6332 | bf_get(lpfc_mqe_command, &mboxq->u.mqe), | |
6333 | bf_get(lpfc_mqe_status, &mboxq->u.mqe)); | |
d1f525aa | 6334 | mempool_free(mboxq, phba->mbox_mem_pool); |
f358dd0c JS |
6335 | rc = -EIO; |
6336 | goto out_free_bsmbx; | |
6337 | } | |
6338 | mb = &mboxq->u.mb; | |
6339 | memcpy(&wwn, (char *)mb->un.varRDnvp.nodename, | |
6340 | sizeof(uint64_t)); | |
6341 | wwn = cpu_to_be64(wwn); | |
6342 | phba->sli4_hba.wwnn.u.name = wwn; | |
6343 | memcpy(&wwn, (char *)mb->un.varRDnvp.portname, | |
6344 | sizeof(uint64_t)); | |
6345 | /* wwn is WWPN of HBA instance */ | |
6346 | wwn = cpu_to_be64(wwn); | |
6347 | phba->sli4_hba.wwpn.u.name = wwn; | |
6348 | ||
6349 | /* Check to see if it matches any module parameter */ | |
6350 | for (i = 0; i < lpfc_enable_nvmet_cnt; i++) { | |
6351 | if (wwn == lpfc_enable_nvmet[i]) { | |
7d708033 | 6352 | #if (IS_ENABLED(CONFIG_NVME_TARGET_FC)) |
3c603be9 JS |
6353 | if (lpfc_nvmet_mem_alloc(phba)) |
6354 | break; | |
6355 | ||
6356 | phba->nvmet_support = 1; /* a match */ | |
6357 | ||
f358dd0c JS |
6358 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
6359 | "6017 NVME Target %016llx\n", | |
6360 | wwn); | |
7d708033 JS |
6361 | #else |
6362 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
6363 | "6021 Can't enable NVME Target." | |
6364 | " NVME_TARGET_FC infrastructure" | |
6365 | " is not in kernel\n"); | |
6366 | #endif | |
3c603be9 | 6367 | break; |
f358dd0c JS |
6368 | } |
6369 | } | |
6370 | } | |
895427bd JS |
6371 | |
6372 | lpfc_nvme_mod_param_dep(phba); | |
6373 | ||
fedd3b7b | 6374 | /* Get the Supported Pages if PORT_CAPABILITIES is supported by port. */ |
cb5172ea JS |
6375 | lpfc_supported_pages(mboxq); |
6376 | rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
fedd3b7b JS |
6377 | if (!rc) { |
6378 | mqe = &mboxq->u.mqe; | |
6379 | memcpy(&pn_page[0], ((uint8_t *)&mqe->un.supp_pages.word3), | |
6380 | LPFC_MAX_SUPPORTED_PAGES); | |
6381 | for (i = 0; i < LPFC_MAX_SUPPORTED_PAGES; i++) { | |
6382 | switch (pn_page[i]) { | |
6383 | case LPFC_SLI4_PARAMETERS: | |
6384 | phba->sli4_hba.pc_sli4_params.supported = 1; | |
6385 | break; | |
6386 | default: | |
6387 | break; | |
6388 | } | |
6389 | } | |
6390 | /* Read the port's SLI4 Parameters capabilities if supported. */ | |
6391 | if (phba->sli4_hba.pc_sli4_params.supported) | |
6392 | rc = lpfc_pc_sli4_params_get(phba, mboxq); | |
6393 | if (rc) { | |
6394 | mempool_free(mboxq, phba->mbox_mem_pool); | |
6395 | rc = -EIO; | |
6396 | goto out_free_bsmbx; | |
cb5172ea JS |
6397 | } |
6398 | } | |
65791f1f | 6399 | |
fedd3b7b JS |
6400 | /* |
6401 | * Get sli4 parameters that override parameters from Port capabilities. | |
6d368e53 JS |
6402 | * If this call fails, it isn't critical unless the SLI4 parameters come |
6403 | * back in conflict. | |
fedd3b7b | 6404 | */ |
6d368e53 JS |
6405 | rc = lpfc_get_sli4_parameters(phba, mboxq); |
6406 | if (rc) { | |
b92dc72d JS |
6407 | if_type = bf_get(lpfc_sli_intf_if_type, |
6408 | &phba->sli4_hba.sli_intf); | |
6409 | if_fam = bf_get(lpfc_sli_intf_sli_family, | |
6410 | &phba->sli4_hba.sli_intf); | |
6d368e53 JS |
6411 | if (phba->sli4_hba.extents_in_use && |
6412 | phba->sli4_hba.rpi_hdrs_in_use) { | |
6413 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
6414 | "2999 Unsupported SLI4 Parameters " | |
6415 | "Extents and RPI headers enabled.\n"); | |
b92dc72d JS |
6416 | if (if_type == LPFC_SLI_INTF_IF_TYPE_0 && |
6417 | if_fam == LPFC_SLI_INTF_FAMILY_BE2) { | |
6418 | mempool_free(mboxq, phba->mbox_mem_pool); | |
6419 | rc = -EIO; | |
6420 | goto out_free_bsmbx; | |
6421 | } | |
6422 | } | |
6423 | if (!(if_type == LPFC_SLI_INTF_IF_TYPE_0 && | |
6424 | if_fam == LPFC_SLI_INTF_FAMILY_BE2)) { | |
6425 | mempool_free(mboxq, phba->mbox_mem_pool); | |
6426 | rc = -EIO; | |
6427 | goto out_free_bsmbx; | |
6d368e53 JS |
6428 | } |
6429 | } | |
895427bd | 6430 | |
cb5172ea | 6431 | mempool_free(mboxq, phba->mbox_mem_pool); |
1ba981fd JS |
6432 | |
6433 | /* Verify OAS is supported */ | |
6434 | lpfc_sli4_oas_verify(phba); | |
1ba981fd | 6435 | |
d2cc9bcd JS |
6436 | /* Verify RAS support on adapter */ |
6437 | lpfc_sli4_ras_init(phba); | |
6438 | ||
5350d872 JS |
6439 | /* Verify all the SLI4 queues */ |
6440 | rc = lpfc_sli4_queue_verify(phba); | |
da0436e9 JS |
6441 | if (rc) |
6442 | goto out_free_bsmbx; | |
6443 | ||
6444 | /* Create driver internal CQE event pool */ | |
6445 | rc = lpfc_sli4_cq_event_pool_create(phba); | |
6446 | if (rc) | |
5350d872 | 6447 | goto out_free_bsmbx; |
da0436e9 | 6448 | |
8a9d2e80 JS |
6449 | /* Initialize sgl lists per host */ |
6450 | lpfc_init_sgl_list(phba); | |
6451 | ||
6452 | /* Allocate and initialize active sgl array */ | |
da0436e9 JS |
6453 | rc = lpfc_init_active_sgl_array(phba); |
6454 | if (rc) { | |
6455 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
6456 | "1430 Failed to initialize sgl list.\n"); | |
8a9d2e80 | 6457 | goto out_destroy_cq_event_pool; |
da0436e9 | 6458 | } |
da0436e9 JS |
6459 | rc = lpfc_sli4_init_rpi_hdrs(phba); |
6460 | if (rc) { | |
6461 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
6462 | "1432 Failed to initialize rpi headers.\n"); | |
6463 | goto out_free_active_sgl; | |
6464 | } | |
6465 | ||
a93ff37a | 6466 | /* Allocate eligible FCF bmask memory for FCF roundrobin failover */ |
0c9ab6f5 | 6467 | longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG; |
6396bb22 | 6468 | phba->fcf.fcf_rr_bmask = kcalloc(longs, sizeof(unsigned long), |
0c9ab6f5 JS |
6469 | GFP_KERNEL); |
6470 | if (!phba->fcf.fcf_rr_bmask) { | |
6471 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
6472 | "2759 Failed allocate memory for FCF round " | |
6473 | "robin failover bmask\n"); | |
0558056c | 6474 | rc = -ENOMEM; |
0c9ab6f5 JS |
6475 | goto out_remove_rpi_hdrs; |
6476 | } | |
6477 | ||
7370d10a | 6478 | phba->sli4_hba.hba_eq_hdl = kcalloc(phba->io_channel_irqs, |
895427bd JS |
6479 | sizeof(struct lpfc_hba_eq_hdl), |
6480 | GFP_KERNEL); | |
6481 | if (!phba->sli4_hba.hba_eq_hdl) { | |
67d12733 JS |
6482 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
6483 | "2572 Failed allocate memory for " | |
6484 | "fast-path per-EQ handle array\n"); | |
6485 | rc = -ENOMEM; | |
6486 | goto out_free_fcf_rr_bmask; | |
da0436e9 JS |
6487 | } |
6488 | ||
895427bd JS |
6489 | phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_present_cpu, |
6490 | sizeof(struct lpfc_vector_map_info), | |
6491 | GFP_KERNEL); | |
7bb03bbf JS |
6492 | if (!phba->sli4_hba.cpu_map) { |
6493 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
6494 | "3327 Failed allocate memory for msi-x " | |
6495 | "interrupt vector mapping\n"); | |
6496 | rc = -ENOMEM; | |
895427bd | 6497 | goto out_free_hba_eq_hdl; |
7bb03bbf | 6498 | } |
b246de17 | 6499 | if (lpfc_used_cpu == NULL) { |
895427bd JS |
6500 | lpfc_used_cpu = kcalloc(lpfc_present_cpu, sizeof(uint16_t), |
6501 | GFP_KERNEL); | |
b246de17 JS |
6502 | if (!lpfc_used_cpu) { |
6503 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
6504 | "3335 Failed allocate memory for msi-x " | |
6505 | "interrupt vector mapping\n"); | |
6506 | kfree(phba->sli4_hba.cpu_map); | |
6507 | rc = -ENOMEM; | |
895427bd | 6508 | goto out_free_hba_eq_hdl; |
b246de17 JS |
6509 | } |
6510 | for (i = 0; i < lpfc_present_cpu; i++) | |
6511 | lpfc_used_cpu[i] = LPFC_VECTOR_MAP_EMPTY; | |
6512 | } | |
6513 | ||
912e3acd JS |
6514 | /* |
6515 | * Enable sr-iov virtual functions if supported and configured | |
6516 | * through the module parameter. | |
6517 | */ | |
6518 | if (phba->cfg_sriov_nr_virtfn > 0) { | |
6519 | rc = lpfc_sli_probe_sriov_nr_virtfn(phba, | |
6520 | phba->cfg_sriov_nr_virtfn); | |
6521 | if (rc) { | |
6522 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
6523 | "3020 Requested number of SR-IOV " | |
6524 | "virtual functions (%d) is not " | |
6525 | "supported\n", | |
6526 | phba->cfg_sriov_nr_virtfn); | |
6527 | phba->cfg_sriov_nr_virtfn = 0; | |
6528 | } | |
6529 | } | |
6530 | ||
5248a749 | 6531 | return 0; |
da0436e9 | 6532 | |
895427bd JS |
6533 | out_free_hba_eq_hdl: |
6534 | kfree(phba->sli4_hba.hba_eq_hdl); | |
0c9ab6f5 JS |
6535 | out_free_fcf_rr_bmask: |
6536 | kfree(phba->fcf.fcf_rr_bmask); | |
da0436e9 JS |
6537 | out_remove_rpi_hdrs: |
6538 | lpfc_sli4_remove_rpi_hdrs(phba); | |
6539 | out_free_active_sgl: | |
6540 | lpfc_free_active_sgl(phba); | |
da0436e9 JS |
6541 | out_destroy_cq_event_pool: |
6542 | lpfc_sli4_cq_event_pool_destroy(phba); | |
da0436e9 JS |
6543 | out_free_bsmbx: |
6544 | lpfc_destroy_bootstrap_mbox(phba); | |
6545 | out_free_mem: | |
6546 | lpfc_mem_free(phba); | |
6547 | return rc; | |
6548 | } | |
6549 | ||
6550 | /** | |
6551 | * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev | |
6552 | * @phba: pointer to lpfc hba data structure. | |
6553 | * | |
6554 | * This routine is invoked to unset the driver internal resources set up | |
6555 | * specific for supporting the SLI-4 HBA device it attached to. | |
6556 | **/ | |
6557 | static void | |
6558 | lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba) | |
6559 | { | |
6560 | struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry; | |
6561 | ||
7bb03bbf JS |
6562 | /* Free memory allocated for msi-x interrupt vector to CPU mapping */ |
6563 | kfree(phba->sli4_hba.cpu_map); | |
6564 | phba->sli4_hba.num_present_cpu = 0; | |
6565 | phba->sli4_hba.num_online_cpu = 0; | |
76fd07a6 | 6566 | phba->sli4_hba.curr_disp_cpu = 0; |
7bb03bbf | 6567 | |
da0436e9 | 6568 | /* Free memory allocated for fast-path work queue handles */ |
895427bd | 6569 | kfree(phba->sli4_hba.hba_eq_hdl); |
da0436e9 JS |
6570 | |
6571 | /* Free the allocated rpi headers. */ | |
6572 | lpfc_sli4_remove_rpi_hdrs(phba); | |
d11e31dd | 6573 | lpfc_sli4_remove_rpis(phba); |
da0436e9 | 6574 | |
0c9ab6f5 JS |
6575 | /* Free eligible FCF index bmask */ |
6576 | kfree(phba->fcf.fcf_rr_bmask); | |
6577 | ||
da0436e9 JS |
6578 | /* Free the ELS sgl list */ |
6579 | lpfc_free_active_sgl(phba); | |
8a9d2e80 | 6580 | lpfc_free_els_sgl_list(phba); |
f358dd0c | 6581 | lpfc_free_nvmet_sgl_list(phba); |
da0436e9 | 6582 | |
da0436e9 JS |
6583 | /* Free the completion queue EQ event pool */ |
6584 | lpfc_sli4_cq_event_release_all(phba); | |
6585 | lpfc_sli4_cq_event_pool_destroy(phba); | |
6586 | ||
6d368e53 JS |
6587 | /* Release resource identifiers. */ |
6588 | lpfc_sli4_dealloc_resource_identifiers(phba); | |
6589 | ||
da0436e9 JS |
6590 | /* Free the bsmbx region. */ |
6591 | lpfc_destroy_bootstrap_mbox(phba); | |
6592 | ||
6593 | /* Free the SLI Layer memory with SLI4 HBAs */ | |
6594 | lpfc_mem_free_all(phba); | |
6595 | ||
6596 | /* Free the current connect table */ | |
6597 | list_for_each_entry_safe(conn_entry, next_conn_entry, | |
4d9ab994 JS |
6598 | &phba->fcf_conn_rec_list, list) { |
6599 | list_del_init(&conn_entry->list); | |
da0436e9 | 6600 | kfree(conn_entry); |
4d9ab994 | 6601 | } |
da0436e9 JS |
6602 | |
6603 | return; | |
6604 | } | |
6605 | ||
6606 | /** | |
25985edc | 6607 | * lpfc_init_api_table_setup - Set up init api function jump table |
da0436e9 JS |
6608 | * @phba: The hba struct for which this call is being executed. |
6609 | * @dev_grp: The HBA PCI-Device group number. | |
6610 | * | |
6611 | * This routine sets up the device INIT interface API function jump table | |
6612 | * in @phba struct. | |
6613 | * | |
6614 | * Returns: 0 - success, -ENODEV - failure. | |
6615 | **/ | |
6616 | int | |
6617 | lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp) | |
6618 | { | |
84d1b006 JS |
6619 | phba->lpfc_hba_init_link = lpfc_hba_init_link; |
6620 | phba->lpfc_hba_down_link = lpfc_hba_down_link; | |
7f86059a | 6621 | phba->lpfc_selective_reset = lpfc_selective_reset; |
da0436e9 JS |
6622 | switch (dev_grp) { |
6623 | case LPFC_PCI_DEV_LP: | |
6624 | phba->lpfc_hba_down_post = lpfc_hba_down_post_s3; | |
6625 | phba->lpfc_handle_eratt = lpfc_handle_eratt_s3; | |
6626 | phba->lpfc_stop_port = lpfc_stop_port_s3; | |
6627 | break; | |
6628 | case LPFC_PCI_DEV_OC: | |
6629 | phba->lpfc_hba_down_post = lpfc_hba_down_post_s4; | |
6630 | phba->lpfc_handle_eratt = lpfc_handle_eratt_s4; | |
6631 | phba->lpfc_stop_port = lpfc_stop_port_s4; | |
6632 | break; | |
6633 | default: | |
6634 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
6635 | "1431 Invalid HBA PCI-device group: 0x%x\n", | |
6636 | dev_grp); | |
6637 | return -ENODEV; | |
6638 | break; | |
6639 | } | |
6640 | return 0; | |
6641 | } | |
6642 | ||
da0436e9 JS |
6643 | /** |
6644 | * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources. | |
6645 | * @phba: pointer to lpfc hba data structure. | |
6646 | * | |
6647 | * This routine is invoked to set up the driver internal resources after the | |
6648 | * device specific resource setup to support the HBA device it attached to. | |
6649 | * | |
6650 | * Return codes | |
af901ca1 | 6651 | * 0 - successful |
da0436e9 JS |
6652 | * other values - error |
6653 | **/ | |
6654 | static int | |
6655 | lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba) | |
6656 | { | |
6657 | int error; | |
6658 | ||
6659 | /* Startup the kernel thread for this host adapter. */ | |
6660 | phba->worker_thread = kthread_run(lpfc_do_work, phba, | |
6661 | "lpfc_worker_%d", phba->brd_no); | |
6662 | if (IS_ERR(phba->worker_thread)) { | |
6663 | error = PTR_ERR(phba->worker_thread); | |
6664 | return error; | |
3772a991 JS |
6665 | } |
6666 | ||
0cdb84ec JS |
6667 | /* The lpfc_wq workqueue for deferred irq use, is only used for SLI4 */ |
6668 | if (phba->sli_rev == LPFC_SLI_REV4) | |
6669 | phba->wq = alloc_workqueue("lpfc_wq", WQ_MEM_RECLAIM, 0); | |
6670 | else | |
6671 | phba->wq = NULL; | |
f485c18d | 6672 | |
3772a991 JS |
6673 | return 0; |
6674 | } | |
6675 | ||
6676 | /** | |
6677 | * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources. | |
6678 | * @phba: pointer to lpfc hba data structure. | |
6679 | * | |
6680 | * This routine is invoked to unset the driver internal resources set up after | |
6681 | * the device specific resource setup for supporting the HBA device it | |
6682 | * attached to. | |
6683 | **/ | |
6684 | static void | |
6685 | lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba) | |
6686 | { | |
f485c18d DK |
6687 | if (phba->wq) { |
6688 | flush_workqueue(phba->wq); | |
6689 | destroy_workqueue(phba->wq); | |
6690 | phba->wq = NULL; | |
6691 | } | |
6692 | ||
3772a991 | 6693 | /* Stop kernel worker thread */ |
0cdb84ec JS |
6694 | if (phba->worker_thread) |
6695 | kthread_stop(phba->worker_thread); | |
3772a991 JS |
6696 | } |
6697 | ||
6698 | /** | |
6699 | * lpfc_free_iocb_list - Free iocb list. | |
6700 | * @phba: pointer to lpfc hba data structure. | |
6701 | * | |
6702 | * This routine is invoked to free the driver's IOCB list and memory. | |
6703 | **/ | |
6c621a22 | 6704 | void |
3772a991 JS |
6705 | lpfc_free_iocb_list(struct lpfc_hba *phba) |
6706 | { | |
6707 | struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL; | |
6708 | ||
6709 | spin_lock_irq(&phba->hbalock); | |
6710 | list_for_each_entry_safe(iocbq_entry, iocbq_next, | |
6711 | &phba->lpfc_iocb_list, list) { | |
6712 | list_del(&iocbq_entry->list); | |
6713 | kfree(iocbq_entry); | |
6714 | phba->total_iocbq_bufs--; | |
98c9ea5c | 6715 | } |
3772a991 JS |
6716 | spin_unlock_irq(&phba->hbalock); |
6717 | ||
6718 | return; | |
6719 | } | |
6720 | ||
6721 | /** | |
6722 | * lpfc_init_iocb_list - Allocate and initialize iocb list. | |
6723 | * @phba: pointer to lpfc hba data structure. | |
6724 | * | |
6725 | * This routine is invoked to allocate and initizlize the driver's IOCB | |
6726 | * list and set up the IOCB tag array accordingly. | |
6727 | * | |
6728 | * Return codes | |
af901ca1 | 6729 | * 0 - successful |
3772a991 JS |
6730 | * other values - error |
6731 | **/ | |
6c621a22 | 6732 | int |
3772a991 JS |
6733 | lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count) |
6734 | { | |
6735 | struct lpfc_iocbq *iocbq_entry = NULL; | |
6736 | uint16_t iotag; | |
6737 | int i; | |
dea3101e | 6738 | |
6739 | /* Initialize and populate the iocb list per host. */ | |
6740 | INIT_LIST_HEAD(&phba->lpfc_iocb_list); | |
3772a991 | 6741 | for (i = 0; i < iocb_count; i++) { |
dd00cc48 | 6742 | iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL); |
dea3101e | 6743 | if (iocbq_entry == NULL) { |
6744 | printk(KERN_ERR "%s: only allocated %d iocbs of " | |
6745 | "expected %d count. Unloading driver.\n", | |
cadbd4a5 | 6746 | __func__, i, LPFC_IOCB_LIST_CNT); |
dea3101e | 6747 | goto out_free_iocbq; |
6748 | } | |
6749 | ||
604a3e30 JB |
6750 | iotag = lpfc_sli_next_iotag(phba, iocbq_entry); |
6751 | if (iotag == 0) { | |
3772a991 | 6752 | kfree(iocbq_entry); |
604a3e30 | 6753 | printk(KERN_ERR "%s: failed to allocate IOTAG. " |
3772a991 | 6754 | "Unloading driver.\n", __func__); |
604a3e30 JB |
6755 | goto out_free_iocbq; |
6756 | } | |
6d368e53 | 6757 | iocbq_entry->sli4_lxritag = NO_XRI; |
3772a991 | 6758 | iocbq_entry->sli4_xritag = NO_XRI; |
2e0fef85 JS |
6759 | |
6760 | spin_lock_irq(&phba->hbalock); | |
dea3101e | 6761 | list_add(&iocbq_entry->list, &phba->lpfc_iocb_list); |
6762 | phba->total_iocbq_bufs++; | |
2e0fef85 | 6763 | spin_unlock_irq(&phba->hbalock); |
dea3101e | 6764 | } |
6765 | ||
3772a991 | 6766 | return 0; |
dea3101e | 6767 | |
3772a991 JS |
6768 | out_free_iocbq: |
6769 | lpfc_free_iocb_list(phba); | |
dea3101e | 6770 | |
3772a991 JS |
6771 | return -ENOMEM; |
6772 | } | |
5e9d9b82 | 6773 | |
3772a991 | 6774 | /** |
8a9d2e80 | 6775 | * lpfc_free_sgl_list - Free a given sgl list. |
da0436e9 | 6776 | * @phba: pointer to lpfc hba data structure. |
8a9d2e80 | 6777 | * @sglq_list: pointer to the head of sgl list. |
3772a991 | 6778 | * |
8a9d2e80 | 6779 | * This routine is invoked to free a give sgl list and memory. |
3772a991 | 6780 | **/ |
8a9d2e80 JS |
6781 | void |
6782 | lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list) | |
3772a991 | 6783 | { |
da0436e9 | 6784 | struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL; |
8a9d2e80 JS |
6785 | |
6786 | list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) { | |
6787 | list_del(&sglq_entry->list); | |
6788 | lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys); | |
6789 | kfree(sglq_entry); | |
6790 | } | |
6791 | } | |
6792 | ||
6793 | /** | |
6794 | * lpfc_free_els_sgl_list - Free els sgl list. | |
6795 | * @phba: pointer to lpfc hba data structure. | |
6796 | * | |
6797 | * This routine is invoked to free the driver's els sgl list and memory. | |
6798 | **/ | |
6799 | static void | |
6800 | lpfc_free_els_sgl_list(struct lpfc_hba *phba) | |
6801 | { | |
da0436e9 | 6802 | LIST_HEAD(sglq_list); |
dea3101e | 6803 | |
8a9d2e80 | 6804 | /* Retrieve all els sgls from driver list */ |
da0436e9 | 6805 | spin_lock_irq(&phba->hbalock); |
895427bd JS |
6806 | spin_lock(&phba->sli4_hba.sgl_list_lock); |
6807 | list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list); | |
6808 | spin_unlock(&phba->sli4_hba.sgl_list_lock); | |
da0436e9 | 6809 | spin_unlock_irq(&phba->hbalock); |
dea3101e | 6810 | |
8a9d2e80 JS |
6811 | /* Now free the sgl list */ |
6812 | lpfc_free_sgl_list(phba, &sglq_list); | |
da0436e9 | 6813 | } |
92d7f7b0 | 6814 | |
f358dd0c JS |
6815 | /** |
6816 | * lpfc_free_nvmet_sgl_list - Free nvmet sgl list. | |
6817 | * @phba: pointer to lpfc hba data structure. | |
6818 | * | |
6819 | * This routine is invoked to free the driver's nvmet sgl list and memory. | |
6820 | **/ | |
6821 | static void | |
6822 | lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba) | |
6823 | { | |
6824 | struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL; | |
6825 | LIST_HEAD(sglq_list); | |
6826 | ||
6827 | /* Retrieve all nvmet sgls from driver list */ | |
6828 | spin_lock_irq(&phba->hbalock); | |
6829 | spin_lock(&phba->sli4_hba.sgl_list_lock); | |
6830 | list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list); | |
6831 | spin_unlock(&phba->sli4_hba.sgl_list_lock); | |
6832 | spin_unlock_irq(&phba->hbalock); | |
6833 | ||
6834 | /* Now free the sgl list */ | |
6835 | list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) { | |
6836 | list_del(&sglq_entry->list); | |
6837 | lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys); | |
6838 | kfree(sglq_entry); | |
6839 | } | |
4b40d02b DK |
6840 | |
6841 | /* Update the nvmet_xri_cnt to reflect no current sgls. | |
6842 | * The next initialization cycle sets the count and allocates | |
6843 | * the sgls over again. | |
6844 | */ | |
6845 | phba->sli4_hba.nvmet_xri_cnt = 0; | |
f358dd0c JS |
6846 | } |
6847 | ||
da0436e9 JS |
6848 | /** |
6849 | * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs. | |
6850 | * @phba: pointer to lpfc hba data structure. | |
6851 | * | |
6852 | * This routine is invoked to allocate the driver's active sgl memory. | |
6853 | * This array will hold the sglq_entry's for active IOs. | |
6854 | **/ | |
6855 | static int | |
6856 | lpfc_init_active_sgl_array(struct lpfc_hba *phba) | |
6857 | { | |
6858 | int size; | |
6859 | size = sizeof(struct lpfc_sglq *); | |
6860 | size *= phba->sli4_hba.max_cfg_param.max_xri; | |
6861 | ||
6862 | phba->sli4_hba.lpfc_sglq_active_list = | |
6863 | kzalloc(size, GFP_KERNEL); | |
6864 | if (!phba->sli4_hba.lpfc_sglq_active_list) | |
6865 | return -ENOMEM; | |
6866 | return 0; | |
3772a991 JS |
6867 | } |
6868 | ||
6869 | /** | |
da0436e9 | 6870 | * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs. |
3772a991 JS |
6871 | * @phba: pointer to lpfc hba data structure. |
6872 | * | |
da0436e9 JS |
6873 | * This routine is invoked to walk through the array of active sglq entries |
6874 | * and free all of the resources. | |
6875 | * This is just a place holder for now. | |
3772a991 JS |
6876 | **/ |
6877 | static void | |
da0436e9 | 6878 | lpfc_free_active_sgl(struct lpfc_hba *phba) |
3772a991 | 6879 | { |
da0436e9 | 6880 | kfree(phba->sli4_hba.lpfc_sglq_active_list); |
3772a991 JS |
6881 | } |
6882 | ||
6883 | /** | |
da0436e9 | 6884 | * lpfc_init_sgl_list - Allocate and initialize sgl list. |
3772a991 JS |
6885 | * @phba: pointer to lpfc hba data structure. |
6886 | * | |
da0436e9 JS |
6887 | * This routine is invoked to allocate and initizlize the driver's sgl |
6888 | * list and set up the sgl xritag tag array accordingly. | |
3772a991 | 6889 | * |
3772a991 | 6890 | **/ |
8a9d2e80 | 6891 | static void |
da0436e9 | 6892 | lpfc_init_sgl_list(struct lpfc_hba *phba) |
3772a991 | 6893 | { |
da0436e9 | 6894 | /* Initialize and populate the sglq list per host/VF. */ |
895427bd | 6895 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list); |
da0436e9 | 6896 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list); |
f358dd0c | 6897 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list); |
86c67379 | 6898 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); |
da0436e9 | 6899 | |
8a9d2e80 JS |
6900 | /* els xri-sgl book keeping */ |
6901 | phba->sli4_hba.els_xri_cnt = 0; | |
0ff10d46 | 6902 | |
895427bd | 6903 | /* nvme xri-buffer book keeping */ |
0794d601 | 6904 | phba->sli4_hba.common_xri_cnt = 0; |
da0436e9 JS |
6905 | } |
6906 | ||
6907 | /** | |
6908 | * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port | |
6909 | * @phba: pointer to lpfc hba data structure. | |
6910 | * | |
6911 | * This routine is invoked to post rpi header templates to the | |
88a2cfbb | 6912 | * port for those SLI4 ports that do not support extents. This routine |
da0436e9 | 6913 | * posts a PAGE_SIZE memory region to the port to hold up to |
88a2cfbb JS |
6914 | * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine |
6915 | * and should be called only when interrupts are disabled. | |
da0436e9 JS |
6916 | * |
6917 | * Return codes | |
af901ca1 | 6918 | * 0 - successful |
88a2cfbb | 6919 | * -ERROR - otherwise. |
da0436e9 JS |
6920 | **/ |
6921 | int | |
6922 | lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba) | |
6923 | { | |
6924 | int rc = 0; | |
da0436e9 JS |
6925 | struct lpfc_rpi_hdr *rpi_hdr; |
6926 | ||
6927 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list); | |
ff78d8f9 | 6928 | if (!phba->sli4_hba.rpi_hdrs_in_use) |
6d368e53 | 6929 | return rc; |
6d368e53 JS |
6930 | if (phba->sli4_hba.extents_in_use) |
6931 | return -EIO; | |
da0436e9 JS |
6932 | |
6933 | rpi_hdr = lpfc_sli4_create_rpi_hdr(phba); | |
6934 | if (!rpi_hdr) { | |
6935 | lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI, | |
6936 | "0391 Error during rpi post operation\n"); | |
6937 | lpfc_sli4_remove_rpis(phba); | |
6938 | rc = -ENODEV; | |
6939 | } | |
6940 | ||
6941 | return rc; | |
6942 | } | |
6943 | ||
6944 | /** | |
6945 | * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region | |
6946 | * @phba: pointer to lpfc hba data structure. | |
6947 | * | |
6948 | * This routine is invoked to allocate a single 4KB memory region to | |
6949 | * support rpis and stores them in the phba. This single region | |
6950 | * provides support for up to 64 rpis. The region is used globally | |
6951 | * by the device. | |
6952 | * | |
6953 | * Returns: | |
6954 | * A valid rpi hdr on success. | |
6955 | * A NULL pointer on any failure. | |
6956 | **/ | |
6957 | struct lpfc_rpi_hdr * | |
6958 | lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba) | |
6959 | { | |
6960 | uint16_t rpi_limit, curr_rpi_range; | |
6961 | struct lpfc_dmabuf *dmabuf; | |
6962 | struct lpfc_rpi_hdr *rpi_hdr; | |
6963 | ||
6d368e53 JS |
6964 | /* |
6965 | * If the SLI4 port supports extents, posting the rpi header isn't | |
6966 | * required. Set the expected maximum count and let the actual value | |
6967 | * get set when extents are fully allocated. | |
6968 | */ | |
6969 | if (!phba->sli4_hba.rpi_hdrs_in_use) | |
6970 | return NULL; | |
6971 | if (phba->sli4_hba.extents_in_use) | |
6972 | return NULL; | |
6973 | ||
6974 | /* The limit on the logical index is just the max_rpi count. */ | |
845d9e8d | 6975 | rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi; |
da0436e9 JS |
6976 | |
6977 | spin_lock_irq(&phba->hbalock); | |
6d368e53 JS |
6978 | /* |
6979 | * Establish the starting RPI in this header block. The starting | |
6980 | * rpi is normalized to a zero base because the physical rpi is | |
6981 | * port based. | |
6982 | */ | |
97f2ecf1 | 6983 | curr_rpi_range = phba->sli4_hba.next_rpi; |
da0436e9 JS |
6984 | spin_unlock_irq(&phba->hbalock); |
6985 | ||
845d9e8d JS |
6986 | /* Reached full RPI range */ |
6987 | if (curr_rpi_range == rpi_limit) | |
6d368e53 | 6988 | return NULL; |
845d9e8d | 6989 | |
da0436e9 JS |
6990 | /* |
6991 | * First allocate the protocol header region for the port. The | |
6992 | * port expects a 4KB DMA-mapped memory region that is 4K aligned. | |
6993 | */ | |
6994 | dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); | |
6995 | if (!dmabuf) | |
6996 | return NULL; | |
6997 | ||
1aee383d JP |
6998 | dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev, |
6999 | LPFC_HDR_TEMPLATE_SIZE, | |
7000 | &dmabuf->phys, GFP_KERNEL); | |
da0436e9 JS |
7001 | if (!dmabuf->virt) { |
7002 | rpi_hdr = NULL; | |
7003 | goto err_free_dmabuf; | |
7004 | } | |
7005 | ||
da0436e9 JS |
7006 | if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) { |
7007 | rpi_hdr = NULL; | |
7008 | goto err_free_coherent; | |
7009 | } | |
7010 | ||
7011 | /* Save the rpi header data for cleanup later. */ | |
7012 | rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL); | |
7013 | if (!rpi_hdr) | |
7014 | goto err_free_coherent; | |
7015 | ||
7016 | rpi_hdr->dmabuf = dmabuf; | |
7017 | rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE; | |
7018 | rpi_hdr->page_count = 1; | |
7019 | spin_lock_irq(&phba->hbalock); | |
6d368e53 JS |
7020 | |
7021 | /* The rpi_hdr stores the logical index only. */ | |
7022 | rpi_hdr->start_rpi = curr_rpi_range; | |
845d9e8d | 7023 | rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT; |
da0436e9 JS |
7024 | list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list); |
7025 | ||
da0436e9 JS |
7026 | spin_unlock_irq(&phba->hbalock); |
7027 | return rpi_hdr; | |
7028 | ||
7029 | err_free_coherent: | |
7030 | dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE, | |
7031 | dmabuf->virt, dmabuf->phys); | |
7032 | err_free_dmabuf: | |
7033 | kfree(dmabuf); | |
7034 | return NULL; | |
7035 | } | |
7036 | ||
7037 | /** | |
7038 | * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions | |
7039 | * @phba: pointer to lpfc hba data structure. | |
7040 | * | |
7041 | * This routine is invoked to remove all memory resources allocated | |
6d368e53 JS |
7042 | * to support rpis for SLI4 ports not supporting extents. This routine |
7043 | * presumes the caller has released all rpis consumed by fabric or port | |
7044 | * logins and is prepared to have the header pages removed. | |
da0436e9 JS |
7045 | **/ |
7046 | void | |
7047 | lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba) | |
7048 | { | |
7049 | struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr; | |
7050 | ||
6d368e53 JS |
7051 | if (!phba->sli4_hba.rpi_hdrs_in_use) |
7052 | goto exit; | |
7053 | ||
da0436e9 JS |
7054 | list_for_each_entry_safe(rpi_hdr, next_rpi_hdr, |
7055 | &phba->sli4_hba.lpfc_rpi_hdr_list, list) { | |
7056 | list_del(&rpi_hdr->list); | |
7057 | dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len, | |
7058 | rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys); | |
7059 | kfree(rpi_hdr->dmabuf); | |
7060 | kfree(rpi_hdr); | |
7061 | } | |
6d368e53 JS |
7062 | exit: |
7063 | /* There are no rpis available to the port now. */ | |
7064 | phba->sli4_hba.next_rpi = 0; | |
da0436e9 JS |
7065 | } |
7066 | ||
7067 | /** | |
7068 | * lpfc_hba_alloc - Allocate driver hba data structure for a device. | |
7069 | * @pdev: pointer to pci device data structure. | |
7070 | * | |
7071 | * This routine is invoked to allocate the driver hba data structure for an | |
7072 | * HBA device. If the allocation is successful, the phba reference to the | |
7073 | * PCI device data structure is set. | |
7074 | * | |
7075 | * Return codes | |
af901ca1 | 7076 | * pointer to @phba - successful |
da0436e9 JS |
7077 | * NULL - error |
7078 | **/ | |
7079 | static struct lpfc_hba * | |
7080 | lpfc_hba_alloc(struct pci_dev *pdev) | |
7081 | { | |
7082 | struct lpfc_hba *phba; | |
7083 | ||
7084 | /* Allocate memory for HBA structure */ | |
7085 | phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL); | |
7086 | if (!phba) { | |
e34ccdfe | 7087 | dev_err(&pdev->dev, "failed to allocate hba struct\n"); |
da0436e9 JS |
7088 | return NULL; |
7089 | } | |
7090 | ||
7091 | /* Set reference to PCI device in HBA structure */ | |
7092 | phba->pcidev = pdev; | |
7093 | ||
7094 | /* Assign an unused board number */ | |
7095 | phba->brd_no = lpfc_get_instance(); | |
7096 | if (phba->brd_no < 0) { | |
7097 | kfree(phba); | |
7098 | return NULL; | |
7099 | } | |
65791f1f | 7100 | phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL; |
da0436e9 | 7101 | |
4fede78f | 7102 | spin_lock_init(&phba->ct_ev_lock); |
f1c3b0fc JS |
7103 | INIT_LIST_HEAD(&phba->ct_ev_waiters); |
7104 | ||
da0436e9 JS |
7105 | return phba; |
7106 | } | |
7107 | ||
7108 | /** | |
7109 | * lpfc_hba_free - Free driver hba data structure with a device. | |
7110 | * @phba: pointer to lpfc hba data structure. | |
7111 | * | |
7112 | * This routine is invoked to free the driver hba data structure with an | |
7113 | * HBA device. | |
7114 | **/ | |
7115 | static void | |
7116 | lpfc_hba_free(struct lpfc_hba *phba) | |
7117 | { | |
7118 | /* Release the driver assigned board number */ | |
7119 | idr_remove(&lpfc_hba_index, phba->brd_no); | |
7120 | ||
895427bd JS |
7121 | /* Free memory allocated with sli3 rings */ |
7122 | kfree(phba->sli.sli3_ring); | |
7123 | phba->sli.sli3_ring = NULL; | |
2a76a283 | 7124 | |
da0436e9 JS |
7125 | kfree(phba); |
7126 | return; | |
7127 | } | |
7128 | ||
7129 | /** | |
7130 | * lpfc_create_shost - Create hba physical port with associated scsi host. | |
7131 | * @phba: pointer to lpfc hba data structure. | |
7132 | * | |
7133 | * This routine is invoked to create HBA physical port and associate a SCSI | |
7134 | * host with it. | |
7135 | * | |
7136 | * Return codes | |
af901ca1 | 7137 | * 0 - successful |
da0436e9 JS |
7138 | * other values - error |
7139 | **/ | |
7140 | static int | |
7141 | lpfc_create_shost(struct lpfc_hba *phba) | |
7142 | { | |
7143 | struct lpfc_vport *vport; | |
7144 | struct Scsi_Host *shost; | |
7145 | ||
7146 | /* Initialize HBA FC structure */ | |
7147 | phba->fc_edtov = FF_DEF_EDTOV; | |
7148 | phba->fc_ratov = FF_DEF_RATOV; | |
7149 | phba->fc_altov = FF_DEF_ALTOV; | |
7150 | phba->fc_arbtov = FF_DEF_ARBTOV; | |
7151 | ||
d7c47992 | 7152 | atomic_set(&phba->sdev_cnt, 0); |
2cee7808 JS |
7153 | atomic_set(&phba->fc4ScsiInputRequests, 0); |
7154 | atomic_set(&phba->fc4ScsiOutputRequests, 0); | |
7155 | atomic_set(&phba->fc4ScsiControlRequests, 0); | |
7156 | atomic_set(&phba->fc4ScsiIoCmpls, 0); | |
da0436e9 JS |
7157 | vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev); |
7158 | if (!vport) | |
7159 | return -ENODEV; | |
7160 | ||
7161 | shost = lpfc_shost_from_vport(vport); | |
7162 | phba->pport = vport; | |
2ea259ee | 7163 | |
f358dd0c JS |
7164 | if (phba->nvmet_support) { |
7165 | /* Only 1 vport (pport) will support NVME target */ | |
7166 | if (phba->txrdy_payload_pool == NULL) { | |
771db5c0 RP |
7167 | phba->txrdy_payload_pool = dma_pool_create( |
7168 | "txrdy_pool", &phba->pcidev->dev, | |
f358dd0c JS |
7169 | TXRDY_PAYLOAD_LEN, 16, 0); |
7170 | if (phba->txrdy_payload_pool) { | |
7171 | phba->targetport = NULL; | |
7172 | phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME; | |
7173 | lpfc_printf_log(phba, KERN_INFO, | |
7174 | LOG_INIT | LOG_NVME_DISC, | |
7175 | "6076 NVME Target Found\n"); | |
7176 | } | |
7177 | } | |
7178 | } | |
7179 | ||
da0436e9 JS |
7180 | lpfc_debugfs_initialize(vport); |
7181 | /* Put reference to SCSI host to driver's device private data */ | |
7182 | pci_set_drvdata(phba->pcidev, shost); | |
2e0fef85 | 7183 | |
4258e98e JS |
7184 | /* |
7185 | * At this point we are fully registered with PSA. In addition, | |
7186 | * any initial discovery should be completed. | |
7187 | */ | |
7188 | vport->load_flag |= FC_ALLOW_FDMI; | |
8663cbbe JS |
7189 | if (phba->cfg_enable_SmartSAN || |
7190 | (phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT)) { | |
4258e98e JS |
7191 | |
7192 | /* Setup appropriate attribute masks */ | |
7193 | vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR; | |
8663cbbe | 7194 | if (phba->cfg_enable_SmartSAN) |
4258e98e JS |
7195 | vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR; |
7196 | else | |
7197 | vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR; | |
7198 | } | |
3772a991 JS |
7199 | return 0; |
7200 | } | |
db2378e0 | 7201 | |
3772a991 JS |
7202 | /** |
7203 | * lpfc_destroy_shost - Destroy hba physical port with associated scsi host. | |
7204 | * @phba: pointer to lpfc hba data structure. | |
7205 | * | |
7206 | * This routine is invoked to destroy HBA physical port and the associated | |
7207 | * SCSI host. | |
7208 | **/ | |
7209 | static void | |
7210 | lpfc_destroy_shost(struct lpfc_hba *phba) | |
7211 | { | |
7212 | struct lpfc_vport *vport = phba->pport; | |
7213 | ||
7214 | /* Destroy physical port that associated with the SCSI host */ | |
7215 | destroy_port(vport); | |
7216 | ||
7217 | return; | |
7218 | } | |
7219 | ||
7220 | /** | |
7221 | * lpfc_setup_bg - Setup Block guard structures and debug areas. | |
7222 | * @phba: pointer to lpfc hba data structure. | |
7223 | * @shost: the shost to be used to detect Block guard settings. | |
7224 | * | |
7225 | * This routine sets up the local Block guard protocol settings for @shost. | |
7226 | * This routine also allocates memory for debugging bg buffers. | |
7227 | **/ | |
7228 | static void | |
7229 | lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost) | |
7230 | { | |
bbeb79b9 JS |
7231 | uint32_t old_mask; |
7232 | uint32_t old_guard; | |
7233 | ||
3772a991 | 7234 | int pagecnt = 10; |
b3b98b74 | 7235 | if (phba->cfg_prot_mask && phba->cfg_prot_guard) { |
3772a991 JS |
7236 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
7237 | "1478 Registering BlockGuard with the " | |
7238 | "SCSI layer\n"); | |
bbeb79b9 | 7239 | |
b3b98b74 JS |
7240 | old_mask = phba->cfg_prot_mask; |
7241 | old_guard = phba->cfg_prot_guard; | |
bbeb79b9 JS |
7242 | |
7243 | /* Only allow supported values */ | |
b3b98b74 | 7244 | phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION | |
bbeb79b9 JS |
7245 | SHOST_DIX_TYPE0_PROTECTION | |
7246 | SHOST_DIX_TYPE1_PROTECTION); | |
b3b98b74 JS |
7247 | phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP | |
7248 | SHOST_DIX_GUARD_CRC); | |
bbeb79b9 JS |
7249 | |
7250 | /* DIF Type 1 protection for profiles AST1/C1 is end to end */ | |
b3b98b74 JS |
7251 | if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION) |
7252 | phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION; | |
bbeb79b9 | 7253 | |
b3b98b74 JS |
7254 | if (phba->cfg_prot_mask && phba->cfg_prot_guard) { |
7255 | if ((old_mask != phba->cfg_prot_mask) || | |
7256 | (old_guard != phba->cfg_prot_guard)) | |
bbeb79b9 JS |
7257 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
7258 | "1475 Registering BlockGuard with the " | |
7259 | "SCSI layer: mask %d guard %d\n", | |
b3b98b74 JS |
7260 | phba->cfg_prot_mask, |
7261 | phba->cfg_prot_guard); | |
bbeb79b9 | 7262 | |
b3b98b74 JS |
7263 | scsi_host_set_prot(shost, phba->cfg_prot_mask); |
7264 | scsi_host_set_guard(shost, phba->cfg_prot_guard); | |
bbeb79b9 JS |
7265 | } else |
7266 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
7267 | "1479 Not Registering BlockGuard with the SCSI " | |
7268 | "layer, Bad protection parameters: %d %d\n", | |
7269 | old_mask, old_guard); | |
3772a991 | 7270 | } |
bbeb79b9 | 7271 | |
3772a991 JS |
7272 | if (!_dump_buf_data) { |
7273 | while (pagecnt) { | |
7274 | spin_lock_init(&_dump_buf_lock); | |
7275 | _dump_buf_data = | |
7276 | (char *) __get_free_pages(GFP_KERNEL, pagecnt); | |
7277 | if (_dump_buf_data) { | |
6a9c52cf JS |
7278 | lpfc_printf_log(phba, KERN_ERR, LOG_BG, |
7279 | "9043 BLKGRD: allocated %d pages for " | |
3772a991 JS |
7280 | "_dump_buf_data at 0x%p\n", |
7281 | (1 << pagecnt), _dump_buf_data); | |
7282 | _dump_buf_data_order = pagecnt; | |
7283 | memset(_dump_buf_data, 0, | |
7284 | ((1 << PAGE_SHIFT) << pagecnt)); | |
7285 | break; | |
7286 | } else | |
7287 | --pagecnt; | |
7288 | } | |
7289 | if (!_dump_buf_data_order) | |
6a9c52cf JS |
7290 | lpfc_printf_log(phba, KERN_ERR, LOG_BG, |
7291 | "9044 BLKGRD: ERROR unable to allocate " | |
3772a991 JS |
7292 | "memory for hexdump\n"); |
7293 | } else | |
6a9c52cf JS |
7294 | lpfc_printf_log(phba, KERN_ERR, LOG_BG, |
7295 | "9045 BLKGRD: already allocated _dump_buf_data=0x%p" | |
3772a991 JS |
7296 | "\n", _dump_buf_data); |
7297 | if (!_dump_buf_dif) { | |
7298 | while (pagecnt) { | |
7299 | _dump_buf_dif = | |
7300 | (char *) __get_free_pages(GFP_KERNEL, pagecnt); | |
7301 | if (_dump_buf_dif) { | |
6a9c52cf JS |
7302 | lpfc_printf_log(phba, KERN_ERR, LOG_BG, |
7303 | "9046 BLKGRD: allocated %d pages for " | |
3772a991 JS |
7304 | "_dump_buf_dif at 0x%p\n", |
7305 | (1 << pagecnt), _dump_buf_dif); | |
7306 | _dump_buf_dif_order = pagecnt; | |
7307 | memset(_dump_buf_dif, 0, | |
7308 | ((1 << PAGE_SHIFT) << pagecnt)); | |
7309 | break; | |
7310 | } else | |
7311 | --pagecnt; | |
7312 | } | |
7313 | if (!_dump_buf_dif_order) | |
6a9c52cf JS |
7314 | lpfc_printf_log(phba, KERN_ERR, LOG_BG, |
7315 | "9047 BLKGRD: ERROR unable to allocate " | |
3772a991 JS |
7316 | "memory for hexdump\n"); |
7317 | } else | |
6a9c52cf JS |
7318 | lpfc_printf_log(phba, KERN_ERR, LOG_BG, |
7319 | "9048 BLKGRD: already allocated _dump_buf_dif=0x%p\n", | |
3772a991 JS |
7320 | _dump_buf_dif); |
7321 | } | |
7322 | ||
7323 | /** | |
7324 | * lpfc_post_init_setup - Perform necessary device post initialization setup. | |
7325 | * @phba: pointer to lpfc hba data structure. | |
7326 | * | |
7327 | * This routine is invoked to perform all the necessary post initialization | |
7328 | * setup for the device. | |
7329 | **/ | |
7330 | static void | |
7331 | lpfc_post_init_setup(struct lpfc_hba *phba) | |
7332 | { | |
7333 | struct Scsi_Host *shost; | |
7334 | struct lpfc_adapter_event_header adapter_event; | |
7335 | ||
7336 | /* Get the default values for Model Name and Description */ | |
7337 | lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); | |
7338 | ||
7339 | /* | |
7340 | * hba setup may have changed the hba_queue_depth so we need to | |
7341 | * adjust the value of can_queue. | |
7342 | */ | |
7343 | shost = pci_get_drvdata(phba->pcidev); | |
7344 | shost->can_queue = phba->cfg_hba_queue_depth - 10; | |
7345 | if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) | |
7346 | lpfc_setup_bg(phba, shost); | |
7347 | ||
7348 | lpfc_host_attrib_init(shost); | |
7349 | ||
7350 | if (phba->cfg_poll & DISABLE_FCP_RING_INT) { | |
7351 | spin_lock_irq(shost->host_lock); | |
7352 | lpfc_poll_start_timer(phba); | |
7353 | spin_unlock_irq(shost->host_lock); | |
7354 | } | |
7355 | ||
7356 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
7357 | "0428 Perform SCSI scan\n"); | |
7358 | /* Send board arrival event to upper layer */ | |
7359 | adapter_event.event_type = FC_REG_ADAPTER_EVENT; | |
7360 | adapter_event.subcategory = LPFC_EVENT_ARRIVAL; | |
7361 | fc_host_post_vendor_event(shost, fc_get_event_number(), | |
7362 | sizeof(adapter_event), | |
7363 | (char *) &adapter_event, | |
7364 | LPFC_NL_VENDOR_ID); | |
7365 | return; | |
7366 | } | |
7367 | ||
7368 | /** | |
7369 | * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space. | |
7370 | * @phba: pointer to lpfc hba data structure. | |
7371 | * | |
7372 | * This routine is invoked to set up the PCI device memory space for device | |
7373 | * with SLI-3 interface spec. | |
7374 | * | |
7375 | * Return codes | |
af901ca1 | 7376 | * 0 - successful |
3772a991 JS |
7377 | * other values - error |
7378 | **/ | |
7379 | static int | |
7380 | lpfc_sli_pci_mem_setup(struct lpfc_hba *phba) | |
7381 | { | |
f30e1bfd | 7382 | struct pci_dev *pdev = phba->pcidev; |
3772a991 JS |
7383 | unsigned long bar0map_len, bar2map_len; |
7384 | int i, hbq_count; | |
7385 | void *ptr; | |
7386 | int error = -ENODEV; | |
7387 | ||
f30e1bfd | 7388 | if (!pdev) |
3772a991 | 7389 | return error; |
3772a991 JS |
7390 | |
7391 | /* Set the device DMA mask size */ | |
f30e1bfd CH |
7392 | if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)) || |
7393 | dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32))) | |
7394 | return error; | |
3772a991 JS |
7395 | |
7396 | /* Get the bus address of Bar0 and Bar2 and the number of bytes | |
7397 | * required by each mapping. | |
7398 | */ | |
7399 | phba->pci_bar0_map = pci_resource_start(pdev, 0); | |
7400 | bar0map_len = pci_resource_len(pdev, 0); | |
7401 | ||
7402 | phba->pci_bar2_map = pci_resource_start(pdev, 2); | |
7403 | bar2map_len = pci_resource_len(pdev, 2); | |
7404 | ||
7405 | /* Map HBA SLIM to a kernel virtual address. */ | |
7406 | phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len); | |
7407 | if (!phba->slim_memmap_p) { | |
7408 | dev_printk(KERN_ERR, &pdev->dev, | |
7409 | "ioremap failed for SLIM memory.\n"); | |
7410 | goto out; | |
7411 | } | |
7412 | ||
7413 | /* Map HBA Control Registers to a kernel virtual address. */ | |
7414 | phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len); | |
7415 | if (!phba->ctrl_regs_memmap_p) { | |
7416 | dev_printk(KERN_ERR, &pdev->dev, | |
7417 | "ioremap failed for HBA control registers.\n"); | |
7418 | goto out_iounmap_slim; | |
7419 | } | |
7420 | ||
7421 | /* Allocate memory for SLI-2 structures */ | |
1aee383d JP |
7422 | phba->slim2p.virt = dma_zalloc_coherent(&pdev->dev, SLI2_SLIM_SIZE, |
7423 | &phba->slim2p.phys, GFP_KERNEL); | |
3772a991 JS |
7424 | if (!phba->slim2p.virt) |
7425 | goto out_iounmap; | |
7426 | ||
3772a991 | 7427 | phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx); |
7a470277 JS |
7428 | phba->mbox_ext = (phba->slim2p.virt + |
7429 | offsetof(struct lpfc_sli2_slim, mbx_ext_words)); | |
3772a991 JS |
7430 | phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb)); |
7431 | phba->IOCBs = (phba->slim2p.virt + | |
7432 | offsetof(struct lpfc_sli2_slim, IOCBs)); | |
7433 | ||
7434 | phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev, | |
7435 | lpfc_sli_hbq_size(), | |
7436 | &phba->hbqslimp.phys, | |
7437 | GFP_KERNEL); | |
7438 | if (!phba->hbqslimp.virt) | |
7439 | goto out_free_slim; | |
7440 | ||
7441 | hbq_count = lpfc_sli_hbq_count(); | |
7442 | ptr = phba->hbqslimp.virt; | |
7443 | for (i = 0; i < hbq_count; ++i) { | |
7444 | phba->hbqs[i].hbq_virt = ptr; | |
7445 | INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list); | |
7446 | ptr += (lpfc_hbq_defs[i]->entry_count * | |
7447 | sizeof(struct lpfc_hbq_entry)); | |
7448 | } | |
7449 | phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc; | |
7450 | phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free; | |
7451 | ||
7452 | memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size()); | |
7453 | ||
3772a991 JS |
7454 | phba->MBslimaddr = phba->slim_memmap_p; |
7455 | phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET; | |
7456 | phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET; | |
7457 | phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET; | |
7458 | phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET; | |
7459 | ||
7460 | return 0; | |
7461 | ||
7462 | out_free_slim: | |
7463 | dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, | |
7464 | phba->slim2p.virt, phba->slim2p.phys); | |
7465 | out_iounmap: | |
7466 | iounmap(phba->ctrl_regs_memmap_p); | |
7467 | out_iounmap_slim: | |
7468 | iounmap(phba->slim_memmap_p); | |
7469 | out: | |
7470 | return error; | |
7471 | } | |
7472 | ||
7473 | /** | |
7474 | * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space. | |
7475 | * @phba: pointer to lpfc hba data structure. | |
7476 | * | |
7477 | * This routine is invoked to unset the PCI device memory space for device | |
7478 | * with SLI-3 interface spec. | |
7479 | **/ | |
7480 | static void | |
7481 | lpfc_sli_pci_mem_unset(struct lpfc_hba *phba) | |
7482 | { | |
7483 | struct pci_dev *pdev; | |
7484 | ||
7485 | /* Obtain PCI device reference */ | |
7486 | if (!phba->pcidev) | |
7487 | return; | |
7488 | else | |
7489 | pdev = phba->pcidev; | |
7490 | ||
7491 | /* Free coherent DMA memory allocated */ | |
7492 | dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(), | |
7493 | phba->hbqslimp.virt, phba->hbqslimp.phys); | |
7494 | dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, | |
7495 | phba->slim2p.virt, phba->slim2p.phys); | |
7496 | ||
7497 | /* I/O memory unmap */ | |
7498 | iounmap(phba->ctrl_regs_memmap_p); | |
7499 | iounmap(phba->slim_memmap_p); | |
7500 | ||
7501 | return; | |
7502 | } | |
7503 | ||
7504 | /** | |
da0436e9 | 7505 | * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status |
3772a991 JS |
7506 | * @phba: pointer to lpfc hba data structure. |
7507 | * | |
da0436e9 JS |
7508 | * This routine is invoked to wait for SLI4 device Power On Self Test (POST) |
7509 | * done and check status. | |
3772a991 | 7510 | * |
da0436e9 | 7511 | * Return 0 if successful, otherwise -ENODEV. |
3772a991 | 7512 | **/ |
da0436e9 JS |
7513 | int |
7514 | lpfc_sli4_post_status_check(struct lpfc_hba *phba) | |
3772a991 | 7515 | { |
2fcee4bf JS |
7516 | struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg; |
7517 | struct lpfc_register reg_data; | |
7518 | int i, port_error = 0; | |
7519 | uint32_t if_type; | |
3772a991 | 7520 | |
9940b97b JS |
7521 | memset(&portsmphr_reg, 0, sizeof(portsmphr_reg)); |
7522 | memset(®_data, 0, sizeof(reg_data)); | |
2fcee4bf | 7523 | if (!phba->sli4_hba.PSMPHRregaddr) |
da0436e9 | 7524 | return -ENODEV; |
3772a991 | 7525 | |
da0436e9 JS |
7526 | /* Wait up to 30 seconds for the SLI Port POST done and ready */ |
7527 | for (i = 0; i < 3000; i++) { | |
9940b97b JS |
7528 | if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr, |
7529 | &portsmphr_reg.word0) || | |
7530 | (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) { | |
2fcee4bf | 7531 | /* Port has a fatal POST error, break out */ |
da0436e9 JS |
7532 | port_error = -ENODEV; |
7533 | break; | |
7534 | } | |
2fcee4bf JS |
7535 | if (LPFC_POST_STAGE_PORT_READY == |
7536 | bf_get(lpfc_port_smphr_port_status, &portsmphr_reg)) | |
da0436e9 | 7537 | break; |
da0436e9 | 7538 | msleep(10); |
3772a991 JS |
7539 | } |
7540 | ||
2fcee4bf JS |
7541 | /* |
7542 | * If there was a port error during POST, then don't proceed with | |
7543 | * other register reads as the data may not be valid. Just exit. | |
7544 | */ | |
7545 | if (port_error) { | |
da0436e9 | 7546 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
2fcee4bf JS |
7547 | "1408 Port Failed POST - portsmphr=0x%x, " |
7548 | "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, " | |
7549 | "scr2=x%x, hscratch=x%x, pstatus=x%x\n", | |
7550 | portsmphr_reg.word0, | |
7551 | bf_get(lpfc_port_smphr_perr, &portsmphr_reg), | |
7552 | bf_get(lpfc_port_smphr_sfi, &portsmphr_reg), | |
7553 | bf_get(lpfc_port_smphr_nip, &portsmphr_reg), | |
7554 | bf_get(lpfc_port_smphr_ipc, &portsmphr_reg), | |
7555 | bf_get(lpfc_port_smphr_scr1, &portsmphr_reg), | |
7556 | bf_get(lpfc_port_smphr_scr2, &portsmphr_reg), | |
7557 | bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg), | |
7558 | bf_get(lpfc_port_smphr_port_status, &portsmphr_reg)); | |
7559 | } else { | |
28baac74 | 7560 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
2fcee4bf JS |
7561 | "2534 Device Info: SLIFamily=0x%x, " |
7562 | "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, " | |
7563 | "SLIHint_2=0x%x, FT=0x%x\n", | |
28baac74 JS |
7564 | bf_get(lpfc_sli_intf_sli_family, |
7565 | &phba->sli4_hba.sli_intf), | |
7566 | bf_get(lpfc_sli_intf_slirev, | |
7567 | &phba->sli4_hba.sli_intf), | |
085c647c JS |
7568 | bf_get(lpfc_sli_intf_if_type, |
7569 | &phba->sli4_hba.sli_intf), | |
7570 | bf_get(lpfc_sli_intf_sli_hint1, | |
28baac74 | 7571 | &phba->sli4_hba.sli_intf), |
085c647c JS |
7572 | bf_get(lpfc_sli_intf_sli_hint2, |
7573 | &phba->sli4_hba.sli_intf), | |
7574 | bf_get(lpfc_sli_intf_func_type, | |
28baac74 | 7575 | &phba->sli4_hba.sli_intf)); |
2fcee4bf JS |
7576 | /* |
7577 | * Check for other Port errors during the initialization | |
7578 | * process. Fail the load if the port did not come up | |
7579 | * correctly. | |
7580 | */ | |
7581 | if_type = bf_get(lpfc_sli_intf_if_type, | |
7582 | &phba->sli4_hba.sli_intf); | |
7583 | switch (if_type) { | |
7584 | case LPFC_SLI_INTF_IF_TYPE_0: | |
7585 | phba->sli4_hba.ue_mask_lo = | |
7586 | readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr); | |
7587 | phba->sli4_hba.ue_mask_hi = | |
7588 | readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr); | |
7589 | uerrlo_reg.word0 = | |
7590 | readl(phba->sli4_hba.u.if_type0.UERRLOregaddr); | |
7591 | uerrhi_reg.word0 = | |
7592 | readl(phba->sli4_hba.u.if_type0.UERRHIregaddr); | |
7593 | if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) || | |
7594 | (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) { | |
7595 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
7596 | "1422 Unrecoverable Error " | |
7597 | "Detected during POST " | |
7598 | "uerr_lo_reg=0x%x, " | |
7599 | "uerr_hi_reg=0x%x, " | |
7600 | "ue_mask_lo_reg=0x%x, " | |
7601 | "ue_mask_hi_reg=0x%x\n", | |
7602 | uerrlo_reg.word0, | |
7603 | uerrhi_reg.word0, | |
7604 | phba->sli4_hba.ue_mask_lo, | |
7605 | phba->sli4_hba.ue_mask_hi); | |
7606 | port_error = -ENODEV; | |
7607 | } | |
7608 | break; | |
7609 | case LPFC_SLI_INTF_IF_TYPE_2: | |
27d6ac0a | 7610 | case LPFC_SLI_INTF_IF_TYPE_6: |
2fcee4bf | 7611 | /* Final checks. The port status should be clean. */ |
9940b97b JS |
7612 | if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr, |
7613 | ®_data.word0) || | |
0558056c JS |
7614 | (bf_get(lpfc_sliport_status_err, ®_data) && |
7615 | !bf_get(lpfc_sliport_status_rn, ®_data))) { | |
2fcee4bf JS |
7616 | phba->work_status[0] = |
7617 | readl(phba->sli4_hba.u.if_type2. | |
7618 | ERR1regaddr); | |
7619 | phba->work_status[1] = | |
7620 | readl(phba->sli4_hba.u.if_type2. | |
7621 | ERR2regaddr); | |
7622 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8fcb8acd JS |
7623 | "2888 Unrecoverable port error " |
7624 | "following POST: port status reg " | |
7625 | "0x%x, port_smphr reg 0x%x, " | |
2fcee4bf JS |
7626 | "error 1=0x%x, error 2=0x%x\n", |
7627 | reg_data.word0, | |
7628 | portsmphr_reg.word0, | |
7629 | phba->work_status[0], | |
7630 | phba->work_status[1]); | |
7631 | port_error = -ENODEV; | |
7632 | } | |
7633 | break; | |
7634 | case LPFC_SLI_INTF_IF_TYPE_1: | |
7635 | default: | |
7636 | break; | |
7637 | } | |
28baac74 | 7638 | } |
da0436e9 JS |
7639 | return port_error; |
7640 | } | |
3772a991 | 7641 | |
da0436e9 JS |
7642 | /** |
7643 | * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map. | |
7644 | * @phba: pointer to lpfc hba data structure. | |
2fcee4bf | 7645 | * @if_type: The SLI4 interface type getting configured. |
da0436e9 JS |
7646 | * |
7647 | * This routine is invoked to set up SLI4 BAR0 PCI config space register | |
7648 | * memory map. | |
7649 | **/ | |
7650 | static void | |
2fcee4bf JS |
7651 | lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type) |
7652 | { | |
7653 | switch (if_type) { | |
7654 | case LPFC_SLI_INTF_IF_TYPE_0: | |
7655 | phba->sli4_hba.u.if_type0.UERRLOregaddr = | |
7656 | phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO; | |
7657 | phba->sli4_hba.u.if_type0.UERRHIregaddr = | |
7658 | phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI; | |
7659 | phba->sli4_hba.u.if_type0.UEMASKLOregaddr = | |
7660 | phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO; | |
7661 | phba->sli4_hba.u.if_type0.UEMASKHIregaddr = | |
7662 | phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI; | |
7663 | phba->sli4_hba.SLIINTFregaddr = | |
7664 | phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF; | |
7665 | break; | |
7666 | case LPFC_SLI_INTF_IF_TYPE_2: | |
0cf07f84 JS |
7667 | phba->sli4_hba.u.if_type2.EQDregaddr = |
7668 | phba->sli4_hba.conf_regs_memmap_p + | |
7669 | LPFC_CTL_PORT_EQ_DELAY_OFFSET; | |
2fcee4bf | 7670 | phba->sli4_hba.u.if_type2.ERR1regaddr = |
88a2cfbb JS |
7671 | phba->sli4_hba.conf_regs_memmap_p + |
7672 | LPFC_CTL_PORT_ER1_OFFSET; | |
2fcee4bf | 7673 | phba->sli4_hba.u.if_type2.ERR2regaddr = |
88a2cfbb JS |
7674 | phba->sli4_hba.conf_regs_memmap_p + |
7675 | LPFC_CTL_PORT_ER2_OFFSET; | |
2fcee4bf | 7676 | phba->sli4_hba.u.if_type2.CTRLregaddr = |
88a2cfbb JS |
7677 | phba->sli4_hba.conf_regs_memmap_p + |
7678 | LPFC_CTL_PORT_CTL_OFFSET; | |
2fcee4bf | 7679 | phba->sli4_hba.u.if_type2.STATUSregaddr = |
88a2cfbb JS |
7680 | phba->sli4_hba.conf_regs_memmap_p + |
7681 | LPFC_CTL_PORT_STA_OFFSET; | |
2fcee4bf JS |
7682 | phba->sli4_hba.SLIINTFregaddr = |
7683 | phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF; | |
7684 | phba->sli4_hba.PSMPHRregaddr = | |
88a2cfbb JS |
7685 | phba->sli4_hba.conf_regs_memmap_p + |
7686 | LPFC_CTL_PORT_SEM_OFFSET; | |
2fcee4bf | 7687 | phba->sli4_hba.RQDBregaddr = |
962bc51b JS |
7688 | phba->sli4_hba.conf_regs_memmap_p + |
7689 | LPFC_ULP0_RQ_DOORBELL; | |
2fcee4bf | 7690 | phba->sli4_hba.WQDBregaddr = |
962bc51b JS |
7691 | phba->sli4_hba.conf_regs_memmap_p + |
7692 | LPFC_ULP0_WQ_DOORBELL; | |
9dd35425 | 7693 | phba->sli4_hba.CQDBregaddr = |
2fcee4bf | 7694 | phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL; |
9dd35425 | 7695 | phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr; |
2fcee4bf JS |
7696 | phba->sli4_hba.MQDBregaddr = |
7697 | phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL; | |
7698 | phba->sli4_hba.BMBXregaddr = | |
7699 | phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX; | |
7700 | break; | |
27d6ac0a JS |
7701 | case LPFC_SLI_INTF_IF_TYPE_6: |
7702 | phba->sli4_hba.u.if_type2.EQDregaddr = | |
7703 | phba->sli4_hba.conf_regs_memmap_p + | |
7704 | LPFC_CTL_PORT_EQ_DELAY_OFFSET; | |
7705 | phba->sli4_hba.u.if_type2.ERR1regaddr = | |
7706 | phba->sli4_hba.conf_regs_memmap_p + | |
7707 | LPFC_CTL_PORT_ER1_OFFSET; | |
7708 | phba->sli4_hba.u.if_type2.ERR2regaddr = | |
7709 | phba->sli4_hba.conf_regs_memmap_p + | |
7710 | LPFC_CTL_PORT_ER2_OFFSET; | |
7711 | phba->sli4_hba.u.if_type2.CTRLregaddr = | |
7712 | phba->sli4_hba.conf_regs_memmap_p + | |
7713 | LPFC_CTL_PORT_CTL_OFFSET; | |
7714 | phba->sli4_hba.u.if_type2.STATUSregaddr = | |
7715 | phba->sli4_hba.conf_regs_memmap_p + | |
7716 | LPFC_CTL_PORT_STA_OFFSET; | |
7717 | phba->sli4_hba.PSMPHRregaddr = | |
7718 | phba->sli4_hba.conf_regs_memmap_p + | |
7719 | LPFC_CTL_PORT_SEM_OFFSET; | |
7720 | phba->sli4_hba.BMBXregaddr = | |
7721 | phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX; | |
7722 | break; | |
2fcee4bf JS |
7723 | case LPFC_SLI_INTF_IF_TYPE_1: |
7724 | default: | |
7725 | dev_printk(KERN_ERR, &phba->pcidev->dev, | |
7726 | "FATAL - unsupported SLI4 interface type - %d\n", | |
7727 | if_type); | |
7728 | break; | |
7729 | } | |
da0436e9 | 7730 | } |
3772a991 | 7731 | |
da0436e9 JS |
7732 | /** |
7733 | * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map. | |
7734 | * @phba: pointer to lpfc hba data structure. | |
7735 | * | |
27d6ac0a | 7736 | * This routine is invoked to set up SLI4 BAR1 register memory map. |
da0436e9 JS |
7737 | **/ |
7738 | static void | |
27d6ac0a | 7739 | lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba, uint32_t if_type) |
da0436e9 | 7740 | { |
27d6ac0a JS |
7741 | switch (if_type) { |
7742 | case LPFC_SLI_INTF_IF_TYPE_0: | |
7743 | phba->sli4_hba.PSMPHRregaddr = | |
7744 | phba->sli4_hba.ctrl_regs_memmap_p + | |
7745 | LPFC_SLIPORT_IF0_SMPHR; | |
7746 | phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + | |
7747 | LPFC_HST_ISR0; | |
7748 | phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + | |
7749 | LPFC_HST_IMR0; | |
7750 | phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + | |
7751 | LPFC_HST_ISCR0; | |
7752 | break; | |
7753 | case LPFC_SLI_INTF_IF_TYPE_6: | |
7754 | phba->sli4_hba.RQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + | |
7755 | LPFC_IF6_RQ_DOORBELL; | |
7756 | phba->sli4_hba.WQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + | |
7757 | LPFC_IF6_WQ_DOORBELL; | |
7758 | phba->sli4_hba.CQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + | |
7759 | LPFC_IF6_CQ_DOORBELL; | |
7760 | phba->sli4_hba.EQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + | |
7761 | LPFC_IF6_EQ_DOORBELL; | |
7762 | phba->sli4_hba.MQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + | |
7763 | LPFC_IF6_MQ_DOORBELL; | |
7764 | break; | |
7765 | case LPFC_SLI_INTF_IF_TYPE_2: | |
7766 | case LPFC_SLI_INTF_IF_TYPE_1: | |
7767 | default: | |
7768 | dev_err(&phba->pcidev->dev, | |
7769 | "FATAL - unsupported SLI4 interface type - %d\n", | |
7770 | if_type); | |
7771 | break; | |
7772 | } | |
3772a991 JS |
7773 | } |
7774 | ||
7775 | /** | |
da0436e9 | 7776 | * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map. |
3772a991 | 7777 | * @phba: pointer to lpfc hba data structure. |
da0436e9 | 7778 | * @vf: virtual function number |
3772a991 | 7779 | * |
da0436e9 JS |
7780 | * This routine is invoked to set up SLI4 BAR2 doorbell register memory map |
7781 | * based on the given viftual function number, @vf. | |
7782 | * | |
7783 | * Return 0 if successful, otherwise -ENODEV. | |
3772a991 | 7784 | **/ |
da0436e9 JS |
7785 | static int |
7786 | lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf) | |
3772a991 | 7787 | { |
da0436e9 JS |
7788 | if (vf > LPFC_VIR_FUNC_MAX) |
7789 | return -ENODEV; | |
3772a991 | 7790 | |
da0436e9 | 7791 | phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + |
962bc51b JS |
7792 | vf * LPFC_VFR_PAGE_SIZE + |
7793 | LPFC_ULP0_RQ_DOORBELL); | |
da0436e9 | 7794 | phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + |
962bc51b JS |
7795 | vf * LPFC_VFR_PAGE_SIZE + |
7796 | LPFC_ULP0_WQ_DOORBELL); | |
9dd35425 JS |
7797 | phba->sli4_hba.CQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + |
7798 | vf * LPFC_VFR_PAGE_SIZE + | |
7799 | LPFC_EQCQ_DOORBELL); | |
7800 | phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr; | |
da0436e9 JS |
7801 | phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + |
7802 | vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL); | |
7803 | phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p + | |
7804 | vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX); | |
7805 | return 0; | |
3772a991 JS |
7806 | } |
7807 | ||
7808 | /** | |
da0436e9 | 7809 | * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox |
3772a991 JS |
7810 | * @phba: pointer to lpfc hba data structure. |
7811 | * | |
da0436e9 JS |
7812 | * This routine is invoked to create the bootstrap mailbox |
7813 | * region consistent with the SLI-4 interface spec. This | |
7814 | * routine allocates all memory necessary to communicate | |
7815 | * mailbox commands to the port and sets up all alignment | |
7816 | * needs. No locks are expected to be held when calling | |
7817 | * this routine. | |
3772a991 JS |
7818 | * |
7819 | * Return codes | |
af901ca1 | 7820 | * 0 - successful |
d439d286 | 7821 | * -ENOMEM - could not allocated memory. |
da0436e9 | 7822 | **/ |
3772a991 | 7823 | static int |
da0436e9 | 7824 | lpfc_create_bootstrap_mbox(struct lpfc_hba *phba) |
3772a991 | 7825 | { |
da0436e9 JS |
7826 | uint32_t bmbx_size; |
7827 | struct lpfc_dmabuf *dmabuf; | |
7828 | struct dma_address *dma_address; | |
7829 | uint32_t pa_addr; | |
7830 | uint64_t phys_addr; | |
7831 | ||
7832 | dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); | |
7833 | if (!dmabuf) | |
7834 | return -ENOMEM; | |
3772a991 | 7835 | |
da0436e9 JS |
7836 | /* |
7837 | * The bootstrap mailbox region is comprised of 2 parts | |
7838 | * plus an alignment restriction of 16 bytes. | |
7839 | */ | |
7840 | bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1); | |
1aee383d JP |
7841 | dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev, bmbx_size, |
7842 | &dmabuf->phys, GFP_KERNEL); | |
da0436e9 JS |
7843 | if (!dmabuf->virt) { |
7844 | kfree(dmabuf); | |
7845 | return -ENOMEM; | |
3772a991 JS |
7846 | } |
7847 | ||
da0436e9 JS |
7848 | /* |
7849 | * Initialize the bootstrap mailbox pointers now so that the register | |
7850 | * operations are simple later. The mailbox dma address is required | |
7851 | * to be 16-byte aligned. Also align the virtual memory as each | |
7852 | * maibox is copied into the bmbx mailbox region before issuing the | |
7853 | * command to the port. | |
7854 | */ | |
7855 | phba->sli4_hba.bmbx.dmabuf = dmabuf; | |
7856 | phba->sli4_hba.bmbx.bmbx_size = bmbx_size; | |
7857 | ||
7858 | phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt, | |
7859 | LPFC_ALIGN_16_BYTE); | |
7860 | phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys, | |
7861 | LPFC_ALIGN_16_BYTE); | |
7862 | ||
7863 | /* | |
7864 | * Set the high and low physical addresses now. The SLI4 alignment | |
7865 | * requirement is 16 bytes and the mailbox is posted to the port | |
7866 | * as two 30-bit addresses. The other data is a bit marking whether | |
7867 | * the 30-bit address is the high or low address. | |
7868 | * Upcast bmbx aphys to 64bits so shift instruction compiles | |
7869 | * clean on 32 bit machines. | |
7870 | */ | |
7871 | dma_address = &phba->sli4_hba.bmbx.dma_address; | |
7872 | phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys; | |
7873 | pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff); | |
7874 | dma_address->addr_hi = (uint32_t) ((pa_addr << 2) | | |
7875 | LPFC_BMBX_BIT1_ADDR_HI); | |
7876 | ||
7877 | pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff); | |
7878 | dma_address->addr_lo = (uint32_t) ((pa_addr << 2) | | |
7879 | LPFC_BMBX_BIT1_ADDR_LO); | |
7880 | return 0; | |
3772a991 JS |
7881 | } |
7882 | ||
7883 | /** | |
da0436e9 | 7884 | * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources |
3772a991 JS |
7885 | * @phba: pointer to lpfc hba data structure. |
7886 | * | |
da0436e9 JS |
7887 | * This routine is invoked to teardown the bootstrap mailbox |
7888 | * region and release all host resources. This routine requires | |
7889 | * the caller to ensure all mailbox commands recovered, no | |
7890 | * additional mailbox comands are sent, and interrupts are disabled | |
7891 | * before calling this routine. | |
7892 | * | |
7893 | **/ | |
3772a991 | 7894 | static void |
da0436e9 | 7895 | lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba) |
3772a991 | 7896 | { |
da0436e9 JS |
7897 | dma_free_coherent(&phba->pcidev->dev, |
7898 | phba->sli4_hba.bmbx.bmbx_size, | |
7899 | phba->sli4_hba.bmbx.dmabuf->virt, | |
7900 | phba->sli4_hba.bmbx.dmabuf->phys); | |
7901 | ||
7902 | kfree(phba->sli4_hba.bmbx.dmabuf); | |
7903 | memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx)); | |
3772a991 JS |
7904 | } |
7905 | ||
7906 | /** | |
da0436e9 | 7907 | * lpfc_sli4_read_config - Get the config parameters. |
3772a991 JS |
7908 | * @phba: pointer to lpfc hba data structure. |
7909 | * | |
da0436e9 JS |
7910 | * This routine is invoked to read the configuration parameters from the HBA. |
7911 | * The configuration parameters are used to set the base and maximum values | |
7912 | * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource | |
7913 | * allocation for the port. | |
3772a991 JS |
7914 | * |
7915 | * Return codes | |
af901ca1 | 7916 | * 0 - successful |
25985edc | 7917 | * -ENOMEM - No available memory |
d439d286 | 7918 | * -EIO - The mailbox failed to complete successfully. |
3772a991 | 7919 | **/ |
ff78d8f9 | 7920 | int |
da0436e9 | 7921 | lpfc_sli4_read_config(struct lpfc_hba *phba) |
3772a991 | 7922 | { |
da0436e9 JS |
7923 | LPFC_MBOXQ_t *pmb; |
7924 | struct lpfc_mbx_read_config *rd_config; | |
912e3acd JS |
7925 | union lpfc_sli4_cfg_shdr *shdr; |
7926 | uint32_t shdr_status, shdr_add_status; | |
7927 | struct lpfc_mbx_get_func_cfg *get_func_cfg; | |
7928 | struct lpfc_rsrc_desc_fcfcoe *desc; | |
8aa134a8 | 7929 | char *pdesc_0; |
c691816e JS |
7930 | uint16_t forced_link_speed; |
7931 | uint32_t if_type; | |
8aa134a8 | 7932 | int length, i, rc = 0, rc2; |
3772a991 | 7933 | |
da0436e9 JS |
7934 | pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); |
7935 | if (!pmb) { | |
7936 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
7937 | "2011 Unable to allocate memory for issuing " | |
7938 | "SLI_CONFIG_SPECIAL mailbox command\n"); | |
7939 | return -ENOMEM; | |
3772a991 JS |
7940 | } |
7941 | ||
da0436e9 | 7942 | lpfc_read_config(phba, pmb); |
3772a991 | 7943 | |
da0436e9 JS |
7944 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); |
7945 | if (rc != MBX_SUCCESS) { | |
7946 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
7947 | "2012 Mailbox failed , mbxCmd x%x " | |
7948 | "READ_CONFIG, mbxStatus x%x\n", | |
7949 | bf_get(lpfc_mqe_command, &pmb->u.mqe), | |
7950 | bf_get(lpfc_mqe_status, &pmb->u.mqe)); | |
7951 | rc = -EIO; | |
7952 | } else { | |
7953 | rd_config = &pmb->u.mqe.un.rd_config; | |
ff78d8f9 JS |
7954 | if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) { |
7955 | phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL; | |
7956 | phba->sli4_hba.lnk_info.lnk_tp = | |
7957 | bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config); | |
7958 | phba->sli4_hba.lnk_info.lnk_no = | |
7959 | bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config); | |
7960 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
7961 | "3081 lnk_type:%d, lnk_numb:%d\n", | |
7962 | phba->sli4_hba.lnk_info.lnk_tp, | |
7963 | phba->sli4_hba.lnk_info.lnk_no); | |
7964 | } else | |
7965 | lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, | |
7966 | "3082 Mailbox (x%x) returned ldv:x0\n", | |
7967 | bf_get(lpfc_mqe_command, &pmb->u.mqe)); | |
44fd7fe3 JS |
7968 | if (bf_get(lpfc_mbx_rd_conf_bbscn_def, rd_config)) { |
7969 | phba->bbcredit_support = 1; | |
7970 | phba->sli4_hba.bbscn_params.word0 = rd_config->word8; | |
7971 | } | |
7972 | ||
1dc5ec24 JS |
7973 | phba->sli4_hba.conf_trunk = |
7974 | bf_get(lpfc_mbx_rd_conf_trunk, rd_config); | |
6d368e53 JS |
7975 | phba->sli4_hba.extents_in_use = |
7976 | bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config); | |
da0436e9 JS |
7977 | phba->sli4_hba.max_cfg_param.max_xri = |
7978 | bf_get(lpfc_mbx_rd_conf_xri_count, rd_config); | |
7979 | phba->sli4_hba.max_cfg_param.xri_base = | |
7980 | bf_get(lpfc_mbx_rd_conf_xri_base, rd_config); | |
7981 | phba->sli4_hba.max_cfg_param.max_vpi = | |
7982 | bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config); | |
8b47ae69 JS |
7983 | /* Limit the max we support */ |
7984 | if (phba->sli4_hba.max_cfg_param.max_vpi > LPFC_MAX_VPORTS) | |
7985 | phba->sli4_hba.max_cfg_param.max_vpi = LPFC_MAX_VPORTS; | |
da0436e9 JS |
7986 | phba->sli4_hba.max_cfg_param.vpi_base = |
7987 | bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config); | |
7988 | phba->sli4_hba.max_cfg_param.max_rpi = | |
7989 | bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config); | |
7990 | phba->sli4_hba.max_cfg_param.rpi_base = | |
7991 | bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config); | |
7992 | phba->sli4_hba.max_cfg_param.max_vfi = | |
7993 | bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config); | |
7994 | phba->sli4_hba.max_cfg_param.vfi_base = | |
7995 | bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config); | |
7996 | phba->sli4_hba.max_cfg_param.max_fcfi = | |
7997 | bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config); | |
da0436e9 JS |
7998 | phba->sli4_hba.max_cfg_param.max_eq = |
7999 | bf_get(lpfc_mbx_rd_conf_eq_count, rd_config); | |
8000 | phba->sli4_hba.max_cfg_param.max_rq = | |
8001 | bf_get(lpfc_mbx_rd_conf_rq_count, rd_config); | |
8002 | phba->sli4_hba.max_cfg_param.max_wq = | |
8003 | bf_get(lpfc_mbx_rd_conf_wq_count, rd_config); | |
8004 | phba->sli4_hba.max_cfg_param.max_cq = | |
8005 | bf_get(lpfc_mbx_rd_conf_cq_count, rd_config); | |
8006 | phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config); | |
8007 | phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base; | |
8008 | phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base; | |
8009 | phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base; | |
5ffc266e JS |
8010 | phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ? |
8011 | (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0; | |
da0436e9 JS |
8012 | phba->max_vports = phba->max_vpi; |
8013 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
6d368e53 JS |
8014 | "2003 cfg params Extents? %d " |
8015 | "XRI(B:%d M:%d), " | |
da0436e9 JS |
8016 | "VPI(B:%d M:%d) " |
8017 | "VFI(B:%d M:%d) " | |
8018 | "RPI(B:%d M:%d) " | |
2ea259ee | 8019 | "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d\n", |
6d368e53 | 8020 | phba->sli4_hba.extents_in_use, |
da0436e9 JS |
8021 | phba->sli4_hba.max_cfg_param.xri_base, |
8022 | phba->sli4_hba.max_cfg_param.max_xri, | |
8023 | phba->sli4_hba.max_cfg_param.vpi_base, | |
8024 | phba->sli4_hba.max_cfg_param.max_vpi, | |
8025 | phba->sli4_hba.max_cfg_param.vfi_base, | |
8026 | phba->sli4_hba.max_cfg_param.max_vfi, | |
8027 | phba->sli4_hba.max_cfg_param.rpi_base, | |
8028 | phba->sli4_hba.max_cfg_param.max_rpi, | |
2ea259ee JS |
8029 | phba->sli4_hba.max_cfg_param.max_fcfi, |
8030 | phba->sli4_hba.max_cfg_param.max_eq, | |
8031 | phba->sli4_hba.max_cfg_param.max_cq, | |
8032 | phba->sli4_hba.max_cfg_param.max_wq, | |
8033 | phba->sli4_hba.max_cfg_param.max_rq); | |
8034 | ||
d38f33b3 JS |
8035 | /* |
8036 | * Calculate NVME queue resources based on how | |
8037 | * many WQ/CQs are available. | |
8038 | */ | |
8039 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
8040 | length = phba->sli4_hba.max_cfg_param.max_wq; | |
8041 | if (phba->sli4_hba.max_cfg_param.max_cq < | |
8042 | phba->sli4_hba.max_cfg_param.max_wq) | |
8043 | length = phba->sli4_hba.max_cfg_param.max_cq; | |
8044 | ||
8045 | /* | |
8046 | * Whats left after this can go toward NVME. | |
8047 | * The minus 6 accounts for ELS, NVME LS, MBOX | |
7370d10a | 8048 | * plus a couple extra. When configured for |
d38f33b3 JS |
8049 | * NVMET, FCP io channel WQs are not created. |
8050 | */ | |
8051 | length -= 6; | |
8052 | if (!phba->nvmet_support) | |
8053 | length -= phba->cfg_fcp_io_channel; | |
8054 | ||
8055 | if (phba->cfg_nvme_io_channel > length) { | |
8056 | lpfc_printf_log( | |
8057 | phba, KERN_ERR, LOG_SLI, | |
8058 | "2005 Reducing NVME IO channel to %d: " | |
8059 | "WQ %d CQ %d NVMEIO %d FCPIO %d\n", | |
8060 | length, | |
8061 | phba->sli4_hba.max_cfg_param.max_wq, | |
8062 | phba->sli4_hba.max_cfg_param.max_cq, | |
8063 | phba->cfg_nvme_io_channel, | |
8064 | phba->cfg_fcp_io_channel); | |
8065 | ||
8066 | phba->cfg_nvme_io_channel = length; | |
8067 | } | |
8068 | } | |
3772a991 | 8069 | } |
912e3acd JS |
8070 | |
8071 | if (rc) | |
8072 | goto read_cfg_out; | |
da0436e9 | 8073 | |
c691816e JS |
8074 | /* Update link speed if forced link speed is supported */ |
8075 | if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); | |
27d6ac0a | 8076 | if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) { |
c691816e JS |
8077 | forced_link_speed = |
8078 | bf_get(lpfc_mbx_rd_conf_link_speed, rd_config); | |
8079 | if (forced_link_speed) { | |
8080 | phba->hba_flag |= HBA_FORCED_LINK_SPEED; | |
8081 | ||
8082 | switch (forced_link_speed) { | |
8083 | case LINK_SPEED_1G: | |
8084 | phba->cfg_link_speed = | |
8085 | LPFC_USER_LINK_SPEED_1G; | |
8086 | break; | |
8087 | case LINK_SPEED_2G: | |
8088 | phba->cfg_link_speed = | |
8089 | LPFC_USER_LINK_SPEED_2G; | |
8090 | break; | |
8091 | case LINK_SPEED_4G: | |
8092 | phba->cfg_link_speed = | |
8093 | LPFC_USER_LINK_SPEED_4G; | |
8094 | break; | |
8095 | case LINK_SPEED_8G: | |
8096 | phba->cfg_link_speed = | |
8097 | LPFC_USER_LINK_SPEED_8G; | |
8098 | break; | |
8099 | case LINK_SPEED_10G: | |
8100 | phba->cfg_link_speed = | |
8101 | LPFC_USER_LINK_SPEED_10G; | |
8102 | break; | |
8103 | case LINK_SPEED_16G: | |
8104 | phba->cfg_link_speed = | |
8105 | LPFC_USER_LINK_SPEED_16G; | |
8106 | break; | |
8107 | case LINK_SPEED_32G: | |
8108 | phba->cfg_link_speed = | |
8109 | LPFC_USER_LINK_SPEED_32G; | |
8110 | break; | |
fbd8a6ba JS |
8111 | case LINK_SPEED_64G: |
8112 | phba->cfg_link_speed = | |
8113 | LPFC_USER_LINK_SPEED_64G; | |
8114 | break; | |
c691816e JS |
8115 | case 0xffff: |
8116 | phba->cfg_link_speed = | |
8117 | LPFC_USER_LINK_SPEED_AUTO; | |
8118 | break; | |
8119 | default: | |
8120 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
8121 | "0047 Unrecognized link " | |
8122 | "speed : %d\n", | |
8123 | forced_link_speed); | |
8124 | phba->cfg_link_speed = | |
8125 | LPFC_USER_LINK_SPEED_AUTO; | |
8126 | } | |
8127 | } | |
8128 | } | |
8129 | ||
da0436e9 | 8130 | /* Reset the DFT_HBA_Q_DEPTH to the max xri */ |
572709e2 JS |
8131 | length = phba->sli4_hba.max_cfg_param.max_xri - |
8132 | lpfc_sli4_get_els_iocb_cnt(phba); | |
8133 | if (phba->cfg_hba_queue_depth > length) { | |
8134 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
8135 | "3361 HBA queue depth changed from %d to %d\n", | |
8136 | phba->cfg_hba_queue_depth, length); | |
8137 | phba->cfg_hba_queue_depth = length; | |
8138 | } | |
912e3acd | 8139 | |
27d6ac0a | 8140 | if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) < |
912e3acd JS |
8141 | LPFC_SLI_INTF_IF_TYPE_2) |
8142 | goto read_cfg_out; | |
8143 | ||
8144 | /* get the pf# and vf# for SLI4 if_type 2 port */ | |
8145 | length = (sizeof(struct lpfc_mbx_get_func_cfg) - | |
8146 | sizeof(struct lpfc_sli4_cfg_mhdr)); | |
8147 | lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON, | |
8148 | LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG, | |
8149 | length, LPFC_SLI4_MBX_EMBED); | |
8150 | ||
8aa134a8 | 8151 | rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); |
912e3acd JS |
8152 | shdr = (union lpfc_sli4_cfg_shdr *) |
8153 | &pmb->u.mqe.un.sli4_config.header.cfg_shdr; | |
8154 | shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); | |
8155 | shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response); | |
8aa134a8 | 8156 | if (rc2 || shdr_status || shdr_add_status) { |
912e3acd JS |
8157 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, |
8158 | "3026 Mailbox failed , mbxCmd x%x " | |
8159 | "GET_FUNCTION_CONFIG, mbxStatus x%x\n", | |
8160 | bf_get(lpfc_mqe_command, &pmb->u.mqe), | |
8161 | bf_get(lpfc_mqe_status, &pmb->u.mqe)); | |
912e3acd JS |
8162 | goto read_cfg_out; |
8163 | } | |
8164 | ||
8165 | /* search for fc_fcoe resrouce descriptor */ | |
8166 | get_func_cfg = &pmb->u.mqe.un.get_func_cfg; | |
912e3acd | 8167 | |
8aa134a8 JS |
8168 | pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0]; |
8169 | desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0; | |
8170 | length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc); | |
8171 | if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD) | |
8172 | length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH; | |
8173 | else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH) | |
8174 | goto read_cfg_out; | |
8175 | ||
912e3acd | 8176 | for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) { |
8aa134a8 | 8177 | desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i); |
912e3acd | 8178 | if (LPFC_RSRC_DESC_TYPE_FCFCOE == |
8aa134a8 | 8179 | bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) { |
912e3acd JS |
8180 | phba->sli4_hba.iov.pf_number = |
8181 | bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc); | |
8182 | phba->sli4_hba.iov.vf_number = | |
8183 | bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc); | |
8184 | break; | |
8185 | } | |
8186 | } | |
8187 | ||
8188 | if (i < LPFC_RSRC_DESC_MAX_NUM) | |
8189 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
8190 | "3027 GET_FUNCTION_CONFIG: pf_number:%d, " | |
8191 | "vf_number:%d\n", phba->sli4_hba.iov.pf_number, | |
8192 | phba->sli4_hba.iov.vf_number); | |
8aa134a8 | 8193 | else |
912e3acd JS |
8194 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, |
8195 | "3028 GET_FUNCTION_CONFIG: failed to find " | |
c4dba187 | 8196 | "Resource Descriptor:x%x\n", |
912e3acd | 8197 | LPFC_RSRC_DESC_TYPE_FCFCOE); |
912e3acd JS |
8198 | |
8199 | read_cfg_out: | |
8200 | mempool_free(pmb, phba->mbox_mem_pool); | |
da0436e9 | 8201 | return rc; |
3772a991 JS |
8202 | } |
8203 | ||
8204 | /** | |
2fcee4bf | 8205 | * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port. |
3772a991 JS |
8206 | * @phba: pointer to lpfc hba data structure. |
8207 | * | |
2fcee4bf JS |
8208 | * This routine is invoked to setup the port-side endian order when |
8209 | * the port if_type is 0. This routine has no function for other | |
8210 | * if_types. | |
da0436e9 JS |
8211 | * |
8212 | * Return codes | |
af901ca1 | 8213 | * 0 - successful |
25985edc | 8214 | * -ENOMEM - No available memory |
d439d286 | 8215 | * -EIO - The mailbox failed to complete successfully. |
3772a991 | 8216 | **/ |
da0436e9 JS |
8217 | static int |
8218 | lpfc_setup_endian_order(struct lpfc_hba *phba) | |
3772a991 | 8219 | { |
da0436e9 | 8220 | LPFC_MBOXQ_t *mboxq; |
2fcee4bf | 8221 | uint32_t if_type, rc = 0; |
da0436e9 JS |
8222 | uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0, |
8223 | HOST_ENDIAN_HIGH_WORD1}; | |
3772a991 | 8224 | |
2fcee4bf JS |
8225 | if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); |
8226 | switch (if_type) { | |
8227 | case LPFC_SLI_INTF_IF_TYPE_0: | |
8228 | mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, | |
8229 | GFP_KERNEL); | |
8230 | if (!mboxq) { | |
8231 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8232 | "0492 Unable to allocate memory for " | |
8233 | "issuing SLI_CONFIG_SPECIAL mailbox " | |
8234 | "command\n"); | |
8235 | return -ENOMEM; | |
8236 | } | |
3772a991 | 8237 | |
2fcee4bf JS |
8238 | /* |
8239 | * The SLI4_CONFIG_SPECIAL mailbox command requires the first | |
8240 | * two words to contain special data values and no other data. | |
8241 | */ | |
8242 | memset(mboxq, 0, sizeof(LPFC_MBOXQ_t)); | |
8243 | memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data)); | |
8244 | rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
8245 | if (rc != MBX_SUCCESS) { | |
8246 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8247 | "0493 SLI_CONFIG_SPECIAL mailbox " | |
8248 | "failed with status x%x\n", | |
8249 | rc); | |
8250 | rc = -EIO; | |
8251 | } | |
8252 | mempool_free(mboxq, phba->mbox_mem_pool); | |
8253 | break; | |
27d6ac0a | 8254 | case LPFC_SLI_INTF_IF_TYPE_6: |
2fcee4bf JS |
8255 | case LPFC_SLI_INTF_IF_TYPE_2: |
8256 | case LPFC_SLI_INTF_IF_TYPE_1: | |
8257 | default: | |
8258 | break; | |
da0436e9 | 8259 | } |
da0436e9 | 8260 | return rc; |
3772a991 JS |
8261 | } |
8262 | ||
8263 | /** | |
895427bd | 8264 | * lpfc_sli4_queue_verify - Verify and update EQ counts |
3772a991 JS |
8265 | * @phba: pointer to lpfc hba data structure. |
8266 | * | |
895427bd JS |
8267 | * This routine is invoked to check the user settable queue counts for EQs. |
8268 | * After this routine is called the counts will be set to valid values that | |
5350d872 JS |
8269 | * adhere to the constraints of the system's interrupt vectors and the port's |
8270 | * queue resources. | |
da0436e9 JS |
8271 | * |
8272 | * Return codes | |
af901ca1 | 8273 | * 0 - successful |
25985edc | 8274 | * -ENOMEM - No available memory |
3772a991 | 8275 | **/ |
da0436e9 | 8276 | static int |
5350d872 | 8277 | lpfc_sli4_queue_verify(struct lpfc_hba *phba) |
3772a991 | 8278 | { |
895427bd | 8279 | int io_channel; |
3772a991 | 8280 | |
da0436e9 | 8281 | /* |
67d12733 | 8282 | * Sanity check for configured queue parameters against the run-time |
da0436e9 JS |
8283 | * device parameters |
8284 | */ | |
3772a991 | 8285 | |
67d12733 | 8286 | /* Sanity check on HBA EQ parameters */ |
895427bd | 8287 | io_channel = phba->io_channel_irqs; |
67d12733 | 8288 | |
895427bd | 8289 | if (phba->sli4_hba.num_online_cpu < io_channel) { |
82c3e9ba JS |
8290 | lpfc_printf_log(phba, |
8291 | KERN_ERR, LOG_INIT, | |
90695ee0 | 8292 | "3188 Reducing IO channels to match number of " |
7bb03bbf | 8293 | "online CPUs: from %d to %d\n", |
895427bd JS |
8294 | io_channel, phba->sli4_hba.num_online_cpu); |
8295 | io_channel = phba->sli4_hba.num_online_cpu; | |
90695ee0 JS |
8296 | } |
8297 | ||
7370d10a | 8298 | if (io_channel > phba->sli4_hba.max_cfg_param.max_eq) { |
82c3e9ba JS |
8299 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
8300 | "2575 Reducing IO channels to match number of " | |
8301 | "available EQs: from %d to %d\n", | |
895427bd | 8302 | io_channel, |
82c3e9ba | 8303 | phba->sli4_hba.max_cfg_param.max_eq); |
7370d10a | 8304 | io_channel = phba->sli4_hba.max_cfg_param.max_eq; |
da0436e9 | 8305 | } |
67d12733 | 8306 | |
895427bd JS |
8307 | /* The actual number of FCP / NVME event queues adopted */ |
8308 | if (io_channel != phba->io_channel_irqs) | |
8309 | phba->io_channel_irqs = io_channel; | |
8310 | if (phba->cfg_fcp_io_channel > io_channel) | |
8311 | phba->cfg_fcp_io_channel = io_channel; | |
8312 | if (phba->cfg_nvme_io_channel > io_channel) | |
8313 | phba->cfg_nvme_io_channel = io_channel; | |
bcb24f65 JS |
8314 | if (phba->nvmet_support) { |
8315 | if (phba->cfg_nvme_io_channel < phba->cfg_nvmet_mrq) | |
8316 | phba->cfg_nvmet_mrq = phba->cfg_nvme_io_channel; | |
8317 | } | |
8318 | if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX) | |
8319 | phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX; | |
895427bd JS |
8320 | |
8321 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
2d7dbc4c | 8322 | "2574 IO channels: irqs %d fcp %d nvme %d MRQ: %d\n", |
895427bd | 8323 | phba->io_channel_irqs, phba->cfg_fcp_io_channel, |
2d7dbc4c | 8324 | phba->cfg_nvme_io_channel, phba->cfg_nvmet_mrq); |
3772a991 | 8325 | |
da0436e9 JS |
8326 | /* Get EQ depth from module parameter, fake the default for now */ |
8327 | phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B; | |
8328 | phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT; | |
3772a991 | 8329 | |
5350d872 JS |
8330 | /* Get CQ depth from module parameter, fake the default for now */ |
8331 | phba->sli4_hba.cq_esize = LPFC_CQE_SIZE; | |
8332 | phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT; | |
895427bd JS |
8333 | return 0; |
8334 | } | |
8335 | ||
8336 | static int | |
8337 | lpfc_alloc_nvme_wq_cq(struct lpfc_hba *phba, int wqidx) | |
8338 | { | |
8339 | struct lpfc_queue *qdesc; | |
5350d872 | 8340 | |
a51e41b6 | 8341 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, |
81b96eda | 8342 | phba->sli4_hba.cq_esize, |
a51e41b6 | 8343 | LPFC_CQE_EXP_COUNT); |
895427bd JS |
8344 | if (!qdesc) { |
8345 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8346 | "0508 Failed allocate fast-path NVME CQ (%d)\n", | |
8347 | wqidx); | |
8348 | return 1; | |
8349 | } | |
7365f6fd | 8350 | qdesc->qe_valid = 1; |
895427bd JS |
8351 | phba->sli4_hba.nvme_cq[wqidx] = qdesc; |
8352 | ||
a51e41b6 JS |
8353 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, |
8354 | LPFC_WQE128_SIZE, LPFC_WQE_EXP_COUNT); | |
895427bd JS |
8355 | if (!qdesc) { |
8356 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8357 | "0509 Failed allocate fast-path NVME WQ (%d)\n", | |
8358 | wqidx); | |
8359 | return 1; | |
8360 | } | |
8361 | phba->sli4_hba.nvme_wq[wqidx] = qdesc; | |
8362 | list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); | |
8363 | return 0; | |
8364 | } | |
8365 | ||
8366 | static int | |
8367 | lpfc_alloc_fcp_wq_cq(struct lpfc_hba *phba, int wqidx) | |
8368 | { | |
8369 | struct lpfc_queue *qdesc; | |
c176ffa0 | 8370 | uint32_t wqesize; |
895427bd JS |
8371 | |
8372 | /* Create Fast Path FCP CQs */ | |
c176ffa0 | 8373 | if (phba->enab_exp_wqcq_pages) |
a51e41b6 JS |
8374 | /* Increase the CQ size when WQEs contain an embedded cdb */ |
8375 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, | |
8376 | phba->sli4_hba.cq_esize, | |
8377 | LPFC_CQE_EXP_COUNT); | |
8378 | ||
8379 | else | |
8380 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, | |
8381 | phba->sli4_hba.cq_esize, | |
8382 | phba->sli4_hba.cq_ecount); | |
895427bd JS |
8383 | if (!qdesc) { |
8384 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8385 | "0499 Failed allocate fast-path FCP CQ (%d)\n", wqidx); | |
8386 | return 1; | |
8387 | } | |
7365f6fd | 8388 | qdesc->qe_valid = 1; |
895427bd JS |
8389 | phba->sli4_hba.fcp_cq[wqidx] = qdesc; |
8390 | ||
8391 | /* Create Fast Path FCP WQs */ | |
c176ffa0 | 8392 | if (phba->enab_exp_wqcq_pages) { |
a51e41b6 | 8393 | /* Increase the WQ size when WQEs contain an embedded cdb */ |
c176ffa0 JS |
8394 | wqesize = (phba->fcp_embed_io) ? |
8395 | LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize; | |
a51e41b6 | 8396 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, |
c176ffa0 | 8397 | wqesize, |
a51e41b6 | 8398 | LPFC_WQE_EXP_COUNT); |
c176ffa0 | 8399 | } else |
a51e41b6 JS |
8400 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
8401 | phba->sli4_hba.wq_esize, | |
8402 | phba->sli4_hba.wq_ecount); | |
c176ffa0 | 8403 | |
895427bd JS |
8404 | if (!qdesc) { |
8405 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8406 | "0503 Failed allocate fast-path FCP WQ (%d)\n", | |
8407 | wqidx); | |
8408 | return 1; | |
8409 | } | |
8410 | phba->sli4_hba.fcp_wq[wqidx] = qdesc; | |
8411 | list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); | |
5350d872 | 8412 | return 0; |
5350d872 JS |
8413 | } |
8414 | ||
8415 | /** | |
8416 | * lpfc_sli4_queue_create - Create all the SLI4 queues | |
8417 | * @phba: pointer to lpfc hba data structure. | |
8418 | * | |
8419 | * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA | |
8420 | * operation. For each SLI4 queue type, the parameters such as queue entry | |
8421 | * count (queue depth) shall be taken from the module parameter. For now, | |
8422 | * we just use some constant number as place holder. | |
8423 | * | |
8424 | * Return codes | |
4907cb7b | 8425 | * 0 - successful |
5350d872 JS |
8426 | * -ENOMEM - No availble memory |
8427 | * -EIO - The mailbox failed to complete successfully. | |
8428 | **/ | |
8429 | int | |
8430 | lpfc_sli4_queue_create(struct lpfc_hba *phba) | |
8431 | { | |
8432 | struct lpfc_queue *qdesc; | |
d1f525aa | 8433 | int idx, io_channel; |
5350d872 JS |
8434 | |
8435 | /* | |
67d12733 | 8436 | * Create HBA Record arrays. |
895427bd | 8437 | * Both NVME and FCP will share that same vectors / EQs |
5350d872 | 8438 | */ |
895427bd JS |
8439 | io_channel = phba->io_channel_irqs; |
8440 | if (!io_channel) | |
67d12733 | 8441 | return -ERANGE; |
5350d872 | 8442 | |
67d12733 JS |
8443 | phba->sli4_hba.mq_esize = LPFC_MQE_SIZE; |
8444 | phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT; | |
8445 | phba->sli4_hba.wq_esize = LPFC_WQE_SIZE; | |
8446 | phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT; | |
8447 | phba->sli4_hba.rq_esize = LPFC_RQE_SIZE; | |
8448 | phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT; | |
895427bd JS |
8449 | phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B; |
8450 | phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT; | |
8451 | phba->sli4_hba.cq_esize = LPFC_CQE_SIZE; | |
8452 | phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT; | |
67d12733 | 8453 | |
895427bd JS |
8454 | phba->sli4_hba.hba_eq = kcalloc(io_channel, |
8455 | sizeof(struct lpfc_queue *), | |
8456 | GFP_KERNEL); | |
67d12733 JS |
8457 | if (!phba->sli4_hba.hba_eq) { |
8458 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8459 | "2576 Failed allocate memory for " | |
8460 | "fast-path EQ record array\n"); | |
8461 | goto out_error; | |
8462 | } | |
8463 | ||
895427bd JS |
8464 | if (phba->cfg_fcp_io_channel) { |
8465 | phba->sli4_hba.fcp_cq = kcalloc(phba->cfg_fcp_io_channel, | |
8466 | sizeof(struct lpfc_queue *), | |
8467 | GFP_KERNEL); | |
8468 | if (!phba->sli4_hba.fcp_cq) { | |
8469 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8470 | "2577 Failed allocate memory for " | |
8471 | "fast-path CQ record array\n"); | |
8472 | goto out_error; | |
8473 | } | |
8474 | phba->sli4_hba.fcp_wq = kcalloc(phba->cfg_fcp_io_channel, | |
8475 | sizeof(struct lpfc_queue *), | |
8476 | GFP_KERNEL); | |
8477 | if (!phba->sli4_hba.fcp_wq) { | |
8478 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8479 | "2578 Failed allocate memory for " | |
8480 | "fast-path FCP WQ record array\n"); | |
8481 | goto out_error; | |
8482 | } | |
8483 | /* | |
8484 | * Since the first EQ can have multiple CQs associated with it, | |
8485 | * this array is used to quickly see if we have a FCP fast-path | |
8486 | * CQ match. | |
8487 | */ | |
8488 | phba->sli4_hba.fcp_cq_map = kcalloc(phba->cfg_fcp_io_channel, | |
8489 | sizeof(uint16_t), | |
8490 | GFP_KERNEL); | |
8491 | if (!phba->sli4_hba.fcp_cq_map) { | |
8492 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8493 | "2545 Failed allocate memory for " | |
8494 | "fast-path CQ map\n"); | |
8495 | goto out_error; | |
8496 | } | |
67d12733 JS |
8497 | } |
8498 | ||
895427bd JS |
8499 | if (phba->cfg_nvme_io_channel) { |
8500 | phba->sli4_hba.nvme_cq = kcalloc(phba->cfg_nvme_io_channel, | |
8501 | sizeof(struct lpfc_queue *), | |
8502 | GFP_KERNEL); | |
8503 | if (!phba->sli4_hba.nvme_cq) { | |
8504 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8505 | "6077 Failed allocate memory for " | |
8506 | "fast-path CQ record array\n"); | |
8507 | goto out_error; | |
8508 | } | |
da0436e9 | 8509 | |
895427bd JS |
8510 | phba->sli4_hba.nvme_wq = kcalloc(phba->cfg_nvme_io_channel, |
8511 | sizeof(struct lpfc_queue *), | |
8512 | GFP_KERNEL); | |
8513 | if (!phba->sli4_hba.nvme_wq) { | |
8514 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8515 | "2581 Failed allocate memory for " | |
8516 | "fast-path NVME WQ record array\n"); | |
8517 | goto out_error; | |
8518 | } | |
8519 | ||
8520 | /* | |
8521 | * Since the first EQ can have multiple CQs associated with it, | |
8522 | * this array is used to quickly see if we have a NVME fast-path | |
8523 | * CQ match. | |
8524 | */ | |
8525 | phba->sli4_hba.nvme_cq_map = kcalloc(phba->cfg_nvme_io_channel, | |
8526 | sizeof(uint16_t), | |
8527 | GFP_KERNEL); | |
8528 | if (!phba->sli4_hba.nvme_cq_map) { | |
8529 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8530 | "6078 Failed allocate memory for " | |
8531 | "fast-path CQ map\n"); | |
8532 | goto out_error; | |
8533 | } | |
2d7dbc4c JS |
8534 | |
8535 | if (phba->nvmet_support) { | |
8536 | phba->sli4_hba.nvmet_cqset = kcalloc( | |
8537 | phba->cfg_nvmet_mrq, | |
8538 | sizeof(struct lpfc_queue *), | |
8539 | GFP_KERNEL); | |
8540 | if (!phba->sli4_hba.nvmet_cqset) { | |
8541 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8542 | "3121 Fail allocate memory for " | |
8543 | "fast-path CQ set array\n"); | |
8544 | goto out_error; | |
8545 | } | |
8546 | phba->sli4_hba.nvmet_mrq_hdr = kcalloc( | |
8547 | phba->cfg_nvmet_mrq, | |
8548 | sizeof(struct lpfc_queue *), | |
8549 | GFP_KERNEL); | |
8550 | if (!phba->sli4_hba.nvmet_mrq_hdr) { | |
8551 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8552 | "3122 Fail allocate memory for " | |
8553 | "fast-path RQ set hdr array\n"); | |
8554 | goto out_error; | |
8555 | } | |
8556 | phba->sli4_hba.nvmet_mrq_data = kcalloc( | |
8557 | phba->cfg_nvmet_mrq, | |
8558 | sizeof(struct lpfc_queue *), | |
8559 | GFP_KERNEL); | |
8560 | if (!phba->sli4_hba.nvmet_mrq_data) { | |
8561 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8562 | "3124 Fail allocate memory for " | |
8563 | "fast-path RQ set data array\n"); | |
8564 | goto out_error; | |
8565 | } | |
8566 | } | |
da0436e9 | 8567 | } |
67d12733 | 8568 | |
895427bd | 8569 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list); |
67d12733 | 8570 | |
895427bd JS |
8571 | /* Create HBA Event Queues (EQs) */ |
8572 | for (idx = 0; idx < io_channel; idx++) { | |
67d12733 | 8573 | /* Create EQs */ |
81b96eda JS |
8574 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
8575 | phba->sli4_hba.eq_esize, | |
da0436e9 JS |
8576 | phba->sli4_hba.eq_ecount); |
8577 | if (!qdesc) { | |
8578 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
67d12733 JS |
8579 | "0497 Failed allocate EQ (%d)\n", idx); |
8580 | goto out_error; | |
da0436e9 | 8581 | } |
7365f6fd | 8582 | qdesc->qe_valid = 1; |
67d12733 | 8583 | phba->sli4_hba.hba_eq[idx] = qdesc; |
895427bd | 8584 | } |
67d12733 | 8585 | |
895427bd | 8586 | /* FCP and NVME io channels are not required to be balanced */ |
67d12733 | 8587 | |
895427bd JS |
8588 | for (idx = 0; idx < phba->cfg_fcp_io_channel; idx++) |
8589 | if (lpfc_alloc_fcp_wq_cq(phba, idx)) | |
67d12733 | 8590 | goto out_error; |
da0436e9 | 8591 | |
895427bd JS |
8592 | for (idx = 0; idx < phba->cfg_nvme_io_channel; idx++) |
8593 | if (lpfc_alloc_nvme_wq_cq(phba, idx)) | |
8594 | goto out_error; | |
67d12733 | 8595 | |
2d7dbc4c JS |
8596 | if (phba->nvmet_support) { |
8597 | for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) { | |
8598 | qdesc = lpfc_sli4_queue_alloc(phba, | |
81b96eda JS |
8599 | LPFC_DEFAULT_PAGE_SIZE, |
8600 | phba->sli4_hba.cq_esize, | |
8601 | phba->sli4_hba.cq_ecount); | |
2d7dbc4c JS |
8602 | if (!qdesc) { |
8603 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8604 | "3142 Failed allocate NVME " | |
8605 | "CQ Set (%d)\n", idx); | |
8606 | goto out_error; | |
8607 | } | |
7365f6fd | 8608 | qdesc->qe_valid = 1; |
2d7dbc4c JS |
8609 | phba->sli4_hba.nvmet_cqset[idx] = qdesc; |
8610 | } | |
8611 | } | |
8612 | ||
da0436e9 | 8613 | /* |
67d12733 | 8614 | * Create Slow Path Completion Queues (CQs) |
da0436e9 JS |
8615 | */ |
8616 | ||
da0436e9 | 8617 | /* Create slow-path Mailbox Command Complete Queue */ |
81b96eda JS |
8618 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
8619 | phba->sli4_hba.cq_esize, | |
da0436e9 JS |
8620 | phba->sli4_hba.cq_ecount); |
8621 | if (!qdesc) { | |
8622 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8623 | "0500 Failed allocate slow-path mailbox CQ\n"); | |
67d12733 | 8624 | goto out_error; |
da0436e9 | 8625 | } |
7365f6fd | 8626 | qdesc->qe_valid = 1; |
da0436e9 JS |
8627 | phba->sli4_hba.mbx_cq = qdesc; |
8628 | ||
8629 | /* Create slow-path ELS Complete Queue */ | |
81b96eda JS |
8630 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
8631 | phba->sli4_hba.cq_esize, | |
da0436e9 JS |
8632 | phba->sli4_hba.cq_ecount); |
8633 | if (!qdesc) { | |
8634 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8635 | "0501 Failed allocate slow-path ELS CQ\n"); | |
67d12733 | 8636 | goto out_error; |
da0436e9 | 8637 | } |
7365f6fd | 8638 | qdesc->qe_valid = 1; |
da0436e9 JS |
8639 | phba->sli4_hba.els_cq = qdesc; |
8640 | ||
da0436e9 | 8641 | |
5350d872 | 8642 | /* |
67d12733 | 8643 | * Create Slow Path Work Queues (WQs) |
5350d872 | 8644 | */ |
da0436e9 JS |
8645 | |
8646 | /* Create Mailbox Command Queue */ | |
da0436e9 | 8647 | |
81b96eda JS |
8648 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
8649 | phba->sli4_hba.mq_esize, | |
da0436e9 JS |
8650 | phba->sli4_hba.mq_ecount); |
8651 | if (!qdesc) { | |
8652 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8653 | "0505 Failed allocate slow-path MQ\n"); | |
67d12733 | 8654 | goto out_error; |
da0436e9 JS |
8655 | } |
8656 | phba->sli4_hba.mbx_wq = qdesc; | |
8657 | ||
8658 | /* | |
67d12733 | 8659 | * Create ELS Work Queues |
da0436e9 | 8660 | */ |
da0436e9 JS |
8661 | |
8662 | /* Create slow-path ELS Work Queue */ | |
81b96eda JS |
8663 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
8664 | phba->sli4_hba.wq_esize, | |
da0436e9 JS |
8665 | phba->sli4_hba.wq_ecount); |
8666 | if (!qdesc) { | |
8667 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8668 | "0504 Failed allocate slow-path ELS WQ\n"); | |
67d12733 | 8669 | goto out_error; |
da0436e9 JS |
8670 | } |
8671 | phba->sli4_hba.els_wq = qdesc; | |
895427bd JS |
8672 | list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); |
8673 | ||
8674 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
8675 | /* Create NVME LS Complete Queue */ | |
81b96eda JS |
8676 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
8677 | phba->sli4_hba.cq_esize, | |
895427bd JS |
8678 | phba->sli4_hba.cq_ecount); |
8679 | if (!qdesc) { | |
8680 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8681 | "6079 Failed allocate NVME LS CQ\n"); | |
8682 | goto out_error; | |
8683 | } | |
7365f6fd | 8684 | qdesc->qe_valid = 1; |
895427bd JS |
8685 | phba->sli4_hba.nvmels_cq = qdesc; |
8686 | ||
8687 | /* Create NVME LS Work Queue */ | |
81b96eda JS |
8688 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
8689 | phba->sli4_hba.wq_esize, | |
895427bd JS |
8690 | phba->sli4_hba.wq_ecount); |
8691 | if (!qdesc) { | |
8692 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8693 | "6080 Failed allocate NVME LS WQ\n"); | |
8694 | goto out_error; | |
8695 | } | |
8696 | phba->sli4_hba.nvmels_wq = qdesc; | |
8697 | list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); | |
8698 | } | |
da0436e9 | 8699 | |
da0436e9 JS |
8700 | /* |
8701 | * Create Receive Queue (RQ) | |
8702 | */ | |
da0436e9 JS |
8703 | |
8704 | /* Create Receive Queue for header */ | |
81b96eda JS |
8705 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
8706 | phba->sli4_hba.rq_esize, | |
da0436e9 JS |
8707 | phba->sli4_hba.rq_ecount); |
8708 | if (!qdesc) { | |
8709 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8710 | "0506 Failed allocate receive HRQ\n"); | |
67d12733 | 8711 | goto out_error; |
da0436e9 JS |
8712 | } |
8713 | phba->sli4_hba.hdr_rq = qdesc; | |
8714 | ||
8715 | /* Create Receive Queue for data */ | |
81b96eda JS |
8716 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
8717 | phba->sli4_hba.rq_esize, | |
da0436e9 JS |
8718 | phba->sli4_hba.rq_ecount); |
8719 | if (!qdesc) { | |
8720 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8721 | "0507 Failed allocate receive DRQ\n"); | |
67d12733 | 8722 | goto out_error; |
da0436e9 JS |
8723 | } |
8724 | phba->sli4_hba.dat_rq = qdesc; | |
8725 | ||
2d7dbc4c JS |
8726 | if (phba->nvmet_support) { |
8727 | for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) { | |
8728 | /* Create NVMET Receive Queue for header */ | |
8729 | qdesc = lpfc_sli4_queue_alloc(phba, | |
81b96eda | 8730 | LPFC_DEFAULT_PAGE_SIZE, |
2d7dbc4c | 8731 | phba->sli4_hba.rq_esize, |
61f3d4bf | 8732 | LPFC_NVMET_RQE_DEF_COUNT); |
2d7dbc4c JS |
8733 | if (!qdesc) { |
8734 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8735 | "3146 Failed allocate " | |
8736 | "receive HRQ\n"); | |
8737 | goto out_error; | |
8738 | } | |
8739 | phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc; | |
8740 | ||
8741 | /* Only needed for header of RQ pair */ | |
8742 | qdesc->rqbp = kzalloc(sizeof(struct lpfc_rqb), | |
8743 | GFP_KERNEL); | |
8744 | if (qdesc->rqbp == NULL) { | |
8745 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8746 | "6131 Failed allocate " | |
8747 | "Header RQBP\n"); | |
8748 | goto out_error; | |
8749 | } | |
8750 | ||
4b40d02b DK |
8751 | /* Put list in known state in case driver load fails. */ |
8752 | INIT_LIST_HEAD(&qdesc->rqbp->rqb_buffer_list); | |
8753 | ||
2d7dbc4c JS |
8754 | /* Create NVMET Receive Queue for data */ |
8755 | qdesc = lpfc_sli4_queue_alloc(phba, | |
81b96eda | 8756 | LPFC_DEFAULT_PAGE_SIZE, |
2d7dbc4c | 8757 | phba->sli4_hba.rq_esize, |
61f3d4bf | 8758 | LPFC_NVMET_RQE_DEF_COUNT); |
2d7dbc4c JS |
8759 | if (!qdesc) { |
8760 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8761 | "3156 Failed allocate " | |
8762 | "receive DRQ\n"); | |
8763 | goto out_error; | |
8764 | } | |
8765 | phba->sli4_hba.nvmet_mrq_data[idx] = qdesc; | |
8766 | } | |
8767 | } | |
da0436e9 JS |
8768 | return 0; |
8769 | ||
da0436e9 | 8770 | out_error: |
67d12733 | 8771 | lpfc_sli4_queue_destroy(phba); |
da0436e9 JS |
8772 | return -ENOMEM; |
8773 | } | |
8774 | ||
895427bd JS |
8775 | static inline void |
8776 | __lpfc_sli4_release_queue(struct lpfc_queue **qp) | |
8777 | { | |
8778 | if (*qp != NULL) { | |
8779 | lpfc_sli4_queue_free(*qp); | |
8780 | *qp = NULL; | |
8781 | } | |
8782 | } | |
8783 | ||
8784 | static inline void | |
8785 | lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max) | |
8786 | { | |
8787 | int idx; | |
8788 | ||
8789 | if (*qs == NULL) | |
8790 | return; | |
8791 | ||
8792 | for (idx = 0; idx < max; idx++) | |
8793 | __lpfc_sli4_release_queue(&(*qs)[idx]); | |
8794 | ||
8795 | kfree(*qs); | |
8796 | *qs = NULL; | |
8797 | } | |
8798 | ||
8799 | static inline void | |
8800 | lpfc_sli4_release_queue_map(uint16_t **qmap) | |
8801 | { | |
8802 | if (*qmap != NULL) { | |
8803 | kfree(*qmap); | |
8804 | *qmap = NULL; | |
8805 | } | |
8806 | } | |
8807 | ||
da0436e9 JS |
8808 | /** |
8809 | * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues | |
8810 | * @phba: pointer to lpfc hba data structure. | |
8811 | * | |
8812 | * This routine is invoked to release all the SLI4 queues with the FCoE HBA | |
8813 | * operation. | |
8814 | * | |
8815 | * Return codes | |
af901ca1 | 8816 | * 0 - successful |
25985edc | 8817 | * -ENOMEM - No available memory |
d439d286 | 8818 | * -EIO - The mailbox failed to complete successfully. |
da0436e9 | 8819 | **/ |
5350d872 | 8820 | void |
da0436e9 JS |
8821 | lpfc_sli4_queue_destroy(struct lpfc_hba *phba) |
8822 | { | |
895427bd JS |
8823 | /* Release HBA eqs */ |
8824 | lpfc_sli4_release_queues(&phba->sli4_hba.hba_eq, phba->io_channel_irqs); | |
8825 | ||
8826 | /* Release FCP cqs */ | |
8827 | lpfc_sli4_release_queues(&phba->sli4_hba.fcp_cq, | |
d1f525aa | 8828 | phba->cfg_fcp_io_channel); |
895427bd JS |
8829 | |
8830 | /* Release FCP wqs */ | |
8831 | lpfc_sli4_release_queues(&phba->sli4_hba.fcp_wq, | |
d1f525aa | 8832 | phba->cfg_fcp_io_channel); |
895427bd JS |
8833 | |
8834 | /* Release FCP CQ mapping array */ | |
8835 | lpfc_sli4_release_queue_map(&phba->sli4_hba.fcp_cq_map); | |
8836 | ||
8837 | /* Release NVME cqs */ | |
8838 | lpfc_sli4_release_queues(&phba->sli4_hba.nvme_cq, | |
8839 | phba->cfg_nvme_io_channel); | |
8840 | ||
8841 | /* Release NVME wqs */ | |
8842 | lpfc_sli4_release_queues(&phba->sli4_hba.nvme_wq, | |
8843 | phba->cfg_nvme_io_channel); | |
8844 | ||
8845 | /* Release NVME CQ mapping array */ | |
8846 | lpfc_sli4_release_queue_map(&phba->sli4_hba.nvme_cq_map); | |
8847 | ||
bcb24f65 JS |
8848 | if (phba->nvmet_support) { |
8849 | lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset, | |
8850 | phba->cfg_nvmet_mrq); | |
2d7dbc4c | 8851 | |
bcb24f65 JS |
8852 | lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr, |
8853 | phba->cfg_nvmet_mrq); | |
8854 | lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data, | |
8855 | phba->cfg_nvmet_mrq); | |
8856 | } | |
2d7dbc4c | 8857 | |
895427bd JS |
8858 | /* Release mailbox command work queue */ |
8859 | __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq); | |
8860 | ||
8861 | /* Release ELS work queue */ | |
8862 | __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq); | |
8863 | ||
8864 | /* Release ELS work queue */ | |
8865 | __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq); | |
8866 | ||
8867 | /* Release unsolicited receive queue */ | |
8868 | __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq); | |
8869 | __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq); | |
8870 | ||
8871 | /* Release ELS complete queue */ | |
8872 | __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq); | |
8873 | ||
8874 | /* Release NVME LS complete queue */ | |
8875 | __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq); | |
8876 | ||
8877 | /* Release mailbox command complete queue */ | |
8878 | __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq); | |
8879 | ||
8880 | /* Everything on this list has been freed */ | |
8881 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list); | |
8882 | } | |
8883 | ||
895427bd JS |
8884 | int |
8885 | lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq) | |
8886 | { | |
8887 | struct lpfc_rqb *rqbp; | |
8888 | struct lpfc_dmabuf *h_buf; | |
8889 | struct rqb_dmabuf *rqb_buffer; | |
8890 | ||
8891 | rqbp = rq->rqbp; | |
8892 | while (!list_empty(&rqbp->rqb_buffer_list)) { | |
8893 | list_remove_head(&rqbp->rqb_buffer_list, h_buf, | |
8894 | struct lpfc_dmabuf, list); | |
8895 | ||
8896 | rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf); | |
8897 | (rqbp->rqb_free_buffer)(phba, rqb_buffer); | |
8898 | rqbp->buffer_count--; | |
67d12733 | 8899 | } |
895427bd JS |
8900 | return 1; |
8901 | } | |
67d12733 | 8902 | |
895427bd JS |
8903 | static int |
8904 | lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq, | |
8905 | struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map, | |
8906 | int qidx, uint32_t qtype) | |
8907 | { | |
8908 | struct lpfc_sli_ring *pring; | |
8909 | int rc; | |
8910 | ||
8911 | if (!eq || !cq || !wq) { | |
8912 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8913 | "6085 Fast-path %s (%d) not allocated\n", | |
8914 | ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx); | |
8915 | return -ENOMEM; | |
8916 | } | |
8917 | ||
8918 | /* create the Cq first */ | |
8919 | rc = lpfc_cq_create(phba, cq, eq, | |
8920 | (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype); | |
8921 | if (rc) { | |
8922 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8923 | "6086 Failed setup of CQ (%d), rc = 0x%x\n", | |
8924 | qidx, (uint32_t)rc); | |
8925 | return rc; | |
67d12733 | 8926 | } |
81b96eda | 8927 | cq->chann = qidx; |
67d12733 | 8928 | |
895427bd JS |
8929 | if (qtype != LPFC_MBOX) { |
8930 | /* Setup nvme_cq_map for fast lookup */ | |
8931 | if (cq_map) | |
8932 | *cq_map = cq->queue_id; | |
da0436e9 | 8933 | |
895427bd JS |
8934 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
8935 | "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n", | |
8936 | qidx, cq->queue_id, qidx, eq->queue_id); | |
da0436e9 | 8937 | |
895427bd JS |
8938 | /* create the wq */ |
8939 | rc = lpfc_wq_create(phba, wq, cq, qtype); | |
8940 | if (rc) { | |
8941 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8942 | "6123 Fail setup fastpath WQ (%d), rc = 0x%x\n", | |
8943 | qidx, (uint32_t)rc); | |
8944 | /* no need to tear down cq - caller will do so */ | |
8945 | return rc; | |
8946 | } | |
81b96eda | 8947 | wq->chann = qidx; |
da0436e9 | 8948 | |
895427bd JS |
8949 | /* Bind this CQ/WQ to the NVME ring */ |
8950 | pring = wq->pring; | |
8951 | pring->sli.sli4.wqp = (void *)wq; | |
8952 | cq->pring = pring; | |
da0436e9 | 8953 | |
895427bd JS |
8954 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
8955 | "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n", | |
8956 | qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id); | |
8957 | } else { | |
8958 | rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX); | |
8959 | if (rc) { | |
8960 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
8961 | "0539 Failed setup of slow-path MQ: " | |
8962 | "rc = 0x%x\n", rc); | |
8963 | /* no need to tear down cq - caller will do so */ | |
8964 | return rc; | |
8965 | } | |
da0436e9 | 8966 | |
895427bd JS |
8967 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
8968 | "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n", | |
8969 | phba->sli4_hba.mbx_wq->queue_id, | |
8970 | phba->sli4_hba.mbx_cq->queue_id); | |
67d12733 | 8971 | } |
da0436e9 | 8972 | |
895427bd | 8973 | return 0; |
da0436e9 JS |
8974 | } |
8975 | ||
8976 | /** | |
8977 | * lpfc_sli4_queue_setup - Set up all the SLI4 queues | |
8978 | * @phba: pointer to lpfc hba data structure. | |
8979 | * | |
8980 | * This routine is invoked to set up all the SLI4 queues for the FCoE HBA | |
8981 | * operation. | |
8982 | * | |
8983 | * Return codes | |
af901ca1 | 8984 | * 0 - successful |
25985edc | 8985 | * -ENOMEM - No available memory |
d439d286 | 8986 | * -EIO - The mailbox failed to complete successfully. |
da0436e9 JS |
8987 | **/ |
8988 | int | |
8989 | lpfc_sli4_queue_setup(struct lpfc_hba *phba) | |
8990 | { | |
962bc51b JS |
8991 | uint32_t shdr_status, shdr_add_status; |
8992 | union lpfc_sli4_cfg_shdr *shdr; | |
8993 | LPFC_MBOXQ_t *mboxq; | |
895427bd JS |
8994 | int qidx; |
8995 | uint32_t length, io_channel; | |
8996 | int rc = -ENOMEM; | |
962bc51b JS |
8997 | |
8998 | /* Check for dual-ULP support */ | |
8999 | mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); | |
9000 | if (!mboxq) { | |
9001 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9002 | "3249 Unable to allocate memory for " | |
9003 | "QUERY_FW_CFG mailbox command\n"); | |
9004 | return -ENOMEM; | |
9005 | } | |
9006 | length = (sizeof(struct lpfc_mbx_query_fw_config) - | |
9007 | sizeof(struct lpfc_sli4_cfg_mhdr)); | |
9008 | lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, | |
9009 | LPFC_MBOX_OPCODE_QUERY_FW_CFG, | |
9010 | length, LPFC_SLI4_MBX_EMBED); | |
9011 | ||
9012 | rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
9013 | ||
9014 | shdr = (union lpfc_sli4_cfg_shdr *) | |
9015 | &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; | |
9016 | shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); | |
9017 | shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response); | |
9018 | if (shdr_status || shdr_add_status || rc) { | |
9019 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9020 | "3250 QUERY_FW_CFG mailbox failed with status " | |
9021 | "x%x add_status x%x, mbx status x%x\n", | |
9022 | shdr_status, shdr_add_status, rc); | |
9023 | if (rc != MBX_TIMEOUT) | |
9024 | mempool_free(mboxq, phba->mbox_mem_pool); | |
9025 | rc = -ENXIO; | |
9026 | goto out_error; | |
9027 | } | |
9028 | ||
9029 | phba->sli4_hba.fw_func_mode = | |
9030 | mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode; | |
9031 | phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode; | |
9032 | phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode; | |
8b017a30 JS |
9033 | phba->sli4_hba.physical_port = |
9034 | mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port; | |
962bc51b JS |
9035 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
9036 | "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, " | |
9037 | "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode, | |
9038 | phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode); | |
9039 | ||
9040 | if (rc != MBX_TIMEOUT) | |
9041 | mempool_free(mboxq, phba->mbox_mem_pool); | |
da0436e9 JS |
9042 | |
9043 | /* | |
67d12733 | 9044 | * Set up HBA Event Queues (EQs) |
da0436e9 | 9045 | */ |
895427bd | 9046 | io_channel = phba->io_channel_irqs; |
da0436e9 | 9047 | |
67d12733 | 9048 | /* Set up HBA event queue */ |
895427bd | 9049 | if (io_channel && !phba->sli4_hba.hba_eq) { |
2e90f4b5 JS |
9050 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
9051 | "3147 Fast-path EQs not allocated\n"); | |
1b51197d | 9052 | rc = -ENOMEM; |
67d12733 | 9053 | goto out_error; |
2e90f4b5 | 9054 | } |
895427bd JS |
9055 | for (qidx = 0; qidx < io_channel; qidx++) { |
9056 | if (!phba->sli4_hba.hba_eq[qidx]) { | |
da0436e9 JS |
9057 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
9058 | "0522 Fast-path EQ (%d) not " | |
895427bd | 9059 | "allocated\n", qidx); |
1b51197d | 9060 | rc = -ENOMEM; |
895427bd | 9061 | goto out_destroy; |
da0436e9 | 9062 | } |
895427bd JS |
9063 | rc = lpfc_eq_create(phba, phba->sli4_hba.hba_eq[qidx], |
9064 | phba->cfg_fcp_imax); | |
da0436e9 JS |
9065 | if (rc) { |
9066 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9067 | "0523 Failed setup of fast-path EQ " | |
895427bd | 9068 | "(%d), rc = 0x%x\n", qidx, |
a2fc4aef | 9069 | (uint32_t)rc); |
895427bd | 9070 | goto out_destroy; |
da0436e9 JS |
9071 | } |
9072 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
895427bd JS |
9073 | "2584 HBA EQ setup: queue[%d]-id=%d\n", |
9074 | qidx, phba->sli4_hba.hba_eq[qidx]->queue_id); | |
67d12733 JS |
9075 | } |
9076 | ||
895427bd JS |
9077 | if (phba->cfg_nvme_io_channel) { |
9078 | if (!phba->sli4_hba.nvme_cq || !phba->sli4_hba.nvme_wq) { | |
67d12733 | 9079 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
895427bd JS |
9080 | "6084 Fast-path NVME %s array not allocated\n", |
9081 | (phba->sli4_hba.nvme_cq) ? "CQ" : "WQ"); | |
67d12733 | 9082 | rc = -ENOMEM; |
895427bd | 9083 | goto out_destroy; |
67d12733 JS |
9084 | } |
9085 | ||
895427bd JS |
9086 | for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++) { |
9087 | rc = lpfc_create_wq_cq(phba, | |
9088 | phba->sli4_hba.hba_eq[ | |
9089 | qidx % io_channel], | |
9090 | phba->sli4_hba.nvme_cq[qidx], | |
9091 | phba->sli4_hba.nvme_wq[qidx], | |
9092 | &phba->sli4_hba.nvme_cq_map[qidx], | |
9093 | qidx, LPFC_NVME); | |
9094 | if (rc) { | |
9095 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9096 | "6123 Failed to setup fastpath " | |
9097 | "NVME WQ/CQ (%d), rc = 0x%x\n", | |
9098 | qidx, (uint32_t)rc); | |
9099 | goto out_destroy; | |
9100 | } | |
9101 | } | |
67d12733 JS |
9102 | } |
9103 | ||
895427bd JS |
9104 | if (phba->cfg_fcp_io_channel) { |
9105 | /* Set up fast-path FCP Response Complete Queue */ | |
9106 | if (!phba->sli4_hba.fcp_cq || !phba->sli4_hba.fcp_wq) { | |
67d12733 | 9107 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
895427bd JS |
9108 | "3148 Fast-path FCP %s array not allocated\n", |
9109 | phba->sli4_hba.fcp_cq ? "WQ" : "CQ"); | |
67d12733 | 9110 | rc = -ENOMEM; |
895427bd | 9111 | goto out_destroy; |
67d12733 JS |
9112 | } |
9113 | ||
895427bd JS |
9114 | for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++) { |
9115 | rc = lpfc_create_wq_cq(phba, | |
9116 | phba->sli4_hba.hba_eq[ | |
9117 | qidx % io_channel], | |
9118 | phba->sli4_hba.fcp_cq[qidx], | |
9119 | phba->sli4_hba.fcp_wq[qidx], | |
9120 | &phba->sli4_hba.fcp_cq_map[qidx], | |
9121 | qidx, LPFC_FCP); | |
9122 | if (rc) { | |
9123 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9124 | "0535 Failed to setup fastpath " | |
9125 | "FCP WQ/CQ (%d), rc = 0x%x\n", | |
9126 | qidx, (uint32_t)rc); | |
9127 | goto out_destroy; | |
9128 | } | |
9129 | } | |
67d12733 | 9130 | } |
895427bd | 9131 | |
da0436e9 | 9132 | /* |
895427bd | 9133 | * Set up Slow Path Complete Queues (CQs) |
da0436e9 JS |
9134 | */ |
9135 | ||
895427bd | 9136 | /* Set up slow-path MBOX CQ/MQ */ |
da0436e9 | 9137 | |
895427bd | 9138 | if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) { |
da0436e9 | 9139 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
895427bd JS |
9140 | "0528 %s not allocated\n", |
9141 | phba->sli4_hba.mbx_cq ? | |
d1f525aa | 9142 | "Mailbox WQ" : "Mailbox CQ"); |
1b51197d | 9143 | rc = -ENOMEM; |
895427bd | 9144 | goto out_destroy; |
da0436e9 | 9145 | } |
da0436e9 | 9146 | |
895427bd | 9147 | rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0], |
d1f525aa JS |
9148 | phba->sli4_hba.mbx_cq, |
9149 | phba->sli4_hba.mbx_wq, | |
9150 | NULL, 0, LPFC_MBOX); | |
da0436e9 JS |
9151 | if (rc) { |
9152 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
895427bd JS |
9153 | "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n", |
9154 | (uint32_t)rc); | |
9155 | goto out_destroy; | |
da0436e9 | 9156 | } |
2d7dbc4c JS |
9157 | if (phba->nvmet_support) { |
9158 | if (!phba->sli4_hba.nvmet_cqset) { | |
9159 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9160 | "3165 Fast-path NVME CQ Set " | |
9161 | "array not allocated\n"); | |
9162 | rc = -ENOMEM; | |
9163 | goto out_destroy; | |
9164 | } | |
9165 | if (phba->cfg_nvmet_mrq > 1) { | |
9166 | rc = lpfc_cq_create_set(phba, | |
9167 | phba->sli4_hba.nvmet_cqset, | |
9168 | phba->sli4_hba.hba_eq, | |
9169 | LPFC_WCQ, LPFC_NVMET); | |
9170 | if (rc) { | |
9171 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9172 | "3164 Failed setup of NVME CQ " | |
9173 | "Set, rc = 0x%x\n", | |
9174 | (uint32_t)rc); | |
9175 | goto out_destroy; | |
9176 | } | |
9177 | } else { | |
9178 | /* Set up NVMET Receive Complete Queue */ | |
9179 | rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0], | |
9180 | phba->sli4_hba.hba_eq[0], | |
9181 | LPFC_WCQ, LPFC_NVMET); | |
9182 | if (rc) { | |
9183 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9184 | "6089 Failed setup NVMET CQ: " | |
9185 | "rc = 0x%x\n", (uint32_t)rc); | |
9186 | goto out_destroy; | |
9187 | } | |
81b96eda JS |
9188 | phba->sli4_hba.nvmet_cqset[0]->chann = 0; |
9189 | ||
2d7dbc4c JS |
9190 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
9191 | "6090 NVMET CQ setup: cq-id=%d, " | |
9192 | "parent eq-id=%d\n", | |
9193 | phba->sli4_hba.nvmet_cqset[0]->queue_id, | |
9194 | phba->sli4_hba.hba_eq[0]->queue_id); | |
9195 | } | |
9196 | } | |
da0436e9 | 9197 | |
895427bd JS |
9198 | /* Set up slow-path ELS WQ/CQ */ |
9199 | if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) { | |
da0436e9 | 9200 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
895427bd JS |
9201 | "0530 ELS %s not allocated\n", |
9202 | phba->sli4_hba.els_cq ? "WQ" : "CQ"); | |
1b51197d | 9203 | rc = -ENOMEM; |
895427bd | 9204 | goto out_destroy; |
da0436e9 | 9205 | } |
895427bd JS |
9206 | rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0], |
9207 | phba->sli4_hba.els_cq, | |
9208 | phba->sli4_hba.els_wq, | |
9209 | NULL, 0, LPFC_ELS); | |
da0436e9 JS |
9210 | if (rc) { |
9211 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
895427bd JS |
9212 | "0529 Failed setup of ELS WQ/CQ: rc = 0x%x\n", |
9213 | (uint32_t)rc); | |
9214 | goto out_destroy; | |
da0436e9 JS |
9215 | } |
9216 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
9217 | "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n", | |
9218 | phba->sli4_hba.els_wq->queue_id, | |
9219 | phba->sli4_hba.els_cq->queue_id); | |
9220 | ||
895427bd JS |
9221 | if (phba->cfg_nvme_io_channel) { |
9222 | /* Set up NVME LS Complete Queue */ | |
9223 | if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) { | |
9224 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9225 | "6091 LS %s not allocated\n", | |
9226 | phba->sli4_hba.nvmels_cq ? "WQ" : "CQ"); | |
9227 | rc = -ENOMEM; | |
9228 | goto out_destroy; | |
9229 | } | |
9230 | rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0], | |
9231 | phba->sli4_hba.nvmels_cq, | |
9232 | phba->sli4_hba.nvmels_wq, | |
9233 | NULL, 0, LPFC_NVME_LS); | |
9234 | if (rc) { | |
9235 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9236 | "0529 Failed setup of NVVME LS WQ/CQ: " | |
9237 | "rc = 0x%x\n", (uint32_t)rc); | |
9238 | goto out_destroy; | |
9239 | } | |
9240 | ||
9241 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
9242 | "6096 ELS WQ setup: wq-id=%d, " | |
9243 | "parent cq-id=%d\n", | |
9244 | phba->sli4_hba.nvmels_wq->queue_id, | |
9245 | phba->sli4_hba.nvmels_cq->queue_id); | |
9246 | } | |
9247 | ||
2d7dbc4c JS |
9248 | /* |
9249 | * Create NVMET Receive Queue (RQ) | |
9250 | */ | |
9251 | if (phba->nvmet_support) { | |
9252 | if ((!phba->sli4_hba.nvmet_cqset) || | |
9253 | (!phba->sli4_hba.nvmet_mrq_hdr) || | |
9254 | (!phba->sli4_hba.nvmet_mrq_data)) { | |
9255 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9256 | "6130 MRQ CQ Queues not " | |
9257 | "allocated\n"); | |
9258 | rc = -ENOMEM; | |
9259 | goto out_destroy; | |
9260 | } | |
9261 | if (phba->cfg_nvmet_mrq > 1) { | |
9262 | rc = lpfc_mrq_create(phba, | |
9263 | phba->sli4_hba.nvmet_mrq_hdr, | |
9264 | phba->sli4_hba.nvmet_mrq_data, | |
9265 | phba->sli4_hba.nvmet_cqset, | |
9266 | LPFC_NVMET); | |
9267 | if (rc) { | |
9268 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9269 | "6098 Failed setup of NVMET " | |
9270 | "MRQ: rc = 0x%x\n", | |
9271 | (uint32_t)rc); | |
9272 | goto out_destroy; | |
9273 | } | |
9274 | ||
9275 | } else { | |
9276 | rc = lpfc_rq_create(phba, | |
9277 | phba->sli4_hba.nvmet_mrq_hdr[0], | |
9278 | phba->sli4_hba.nvmet_mrq_data[0], | |
9279 | phba->sli4_hba.nvmet_cqset[0], | |
9280 | LPFC_NVMET); | |
9281 | if (rc) { | |
9282 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9283 | "6057 Failed setup of NVMET " | |
9284 | "Receive Queue: rc = 0x%x\n", | |
9285 | (uint32_t)rc); | |
9286 | goto out_destroy; | |
9287 | } | |
9288 | ||
9289 | lpfc_printf_log( | |
9290 | phba, KERN_INFO, LOG_INIT, | |
9291 | "6099 NVMET RQ setup: hdr-rq-id=%d, " | |
9292 | "dat-rq-id=%d parent cq-id=%d\n", | |
9293 | phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id, | |
9294 | phba->sli4_hba.nvmet_mrq_data[0]->queue_id, | |
9295 | phba->sli4_hba.nvmet_cqset[0]->queue_id); | |
9296 | ||
9297 | } | |
9298 | } | |
9299 | ||
da0436e9 JS |
9300 | if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) { |
9301 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9302 | "0540 Receive Queue not allocated\n"); | |
1b51197d | 9303 | rc = -ENOMEM; |
895427bd | 9304 | goto out_destroy; |
da0436e9 | 9305 | } |
73d91e50 | 9306 | |
da0436e9 | 9307 | rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq, |
4d9ab994 | 9308 | phba->sli4_hba.els_cq, LPFC_USOL); |
da0436e9 JS |
9309 | if (rc) { |
9310 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9311 | "0541 Failed setup of Receive Queue: " | |
a2fc4aef | 9312 | "rc = 0x%x\n", (uint32_t)rc); |
895427bd | 9313 | goto out_destroy; |
da0436e9 | 9314 | } |
73d91e50 | 9315 | |
da0436e9 JS |
9316 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
9317 | "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d " | |
9318 | "parent cq-id=%d\n", | |
9319 | phba->sli4_hba.hdr_rq->queue_id, | |
9320 | phba->sli4_hba.dat_rq->queue_id, | |
4d9ab994 | 9321 | phba->sli4_hba.els_cq->queue_id); |
1ba981fd | 9322 | |
43140ca6 | 9323 | for (qidx = 0; qidx < io_channel; qidx += LPFC_MAX_EQ_DELAY_EQID_CNT) |
0cf07f84 JS |
9324 | lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT, |
9325 | phba->cfg_fcp_imax); | |
43140ca6 | 9326 | |
da0436e9 JS |
9327 | return 0; |
9328 | ||
895427bd JS |
9329 | out_destroy: |
9330 | lpfc_sli4_queue_unset(phba); | |
da0436e9 JS |
9331 | out_error: |
9332 | return rc; | |
9333 | } | |
9334 | ||
9335 | /** | |
9336 | * lpfc_sli4_queue_unset - Unset all the SLI4 queues | |
9337 | * @phba: pointer to lpfc hba data structure. | |
9338 | * | |
9339 | * This routine is invoked to unset all the SLI4 queues with the FCoE HBA | |
9340 | * operation. | |
9341 | * | |
9342 | * Return codes | |
af901ca1 | 9343 | * 0 - successful |
25985edc | 9344 | * -ENOMEM - No available memory |
d439d286 | 9345 | * -EIO - The mailbox failed to complete successfully. |
da0436e9 JS |
9346 | **/ |
9347 | void | |
9348 | lpfc_sli4_queue_unset(struct lpfc_hba *phba) | |
9349 | { | |
895427bd | 9350 | int qidx; |
da0436e9 JS |
9351 | |
9352 | /* Unset mailbox command work queue */ | |
895427bd JS |
9353 | if (phba->sli4_hba.mbx_wq) |
9354 | lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq); | |
9355 | ||
9356 | /* Unset NVME LS work queue */ | |
9357 | if (phba->sli4_hba.nvmels_wq) | |
9358 | lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq); | |
9359 | ||
da0436e9 | 9360 | /* Unset ELS work queue */ |
019c0d66 | 9361 | if (phba->sli4_hba.els_wq) |
895427bd JS |
9362 | lpfc_wq_destroy(phba, phba->sli4_hba.els_wq); |
9363 | ||
da0436e9 | 9364 | /* Unset unsolicited receive queue */ |
895427bd JS |
9365 | if (phba->sli4_hba.hdr_rq) |
9366 | lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq, | |
9367 | phba->sli4_hba.dat_rq); | |
9368 | ||
da0436e9 | 9369 | /* Unset FCP work queue */ |
895427bd JS |
9370 | if (phba->sli4_hba.fcp_wq) |
9371 | for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++) | |
9372 | lpfc_wq_destroy(phba, phba->sli4_hba.fcp_wq[qidx]); | |
9373 | ||
9374 | /* Unset NVME work queue */ | |
9375 | if (phba->sli4_hba.nvme_wq) { | |
9376 | for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++) | |
9377 | lpfc_wq_destroy(phba, phba->sli4_hba.nvme_wq[qidx]); | |
67d12733 | 9378 | } |
895427bd | 9379 | |
da0436e9 | 9380 | /* Unset mailbox command complete queue */ |
895427bd JS |
9381 | if (phba->sli4_hba.mbx_cq) |
9382 | lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq); | |
9383 | ||
da0436e9 | 9384 | /* Unset ELS complete queue */ |
895427bd JS |
9385 | if (phba->sli4_hba.els_cq) |
9386 | lpfc_cq_destroy(phba, phba->sli4_hba.els_cq); | |
9387 | ||
9388 | /* Unset NVME LS complete queue */ | |
9389 | if (phba->sli4_hba.nvmels_cq) | |
9390 | lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq); | |
9391 | ||
9392 | /* Unset NVME response complete queue */ | |
9393 | if (phba->sli4_hba.nvme_cq) | |
9394 | for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++) | |
9395 | lpfc_cq_destroy(phba, phba->sli4_hba.nvme_cq[qidx]); | |
9396 | ||
bcb24f65 JS |
9397 | if (phba->nvmet_support) { |
9398 | /* Unset NVMET MRQ queue */ | |
9399 | if (phba->sli4_hba.nvmet_mrq_hdr) { | |
9400 | for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) | |
9401 | lpfc_rq_destroy( | |
9402 | phba, | |
2d7dbc4c JS |
9403 | phba->sli4_hba.nvmet_mrq_hdr[qidx], |
9404 | phba->sli4_hba.nvmet_mrq_data[qidx]); | |
bcb24f65 | 9405 | } |
2d7dbc4c | 9406 | |
bcb24f65 JS |
9407 | /* Unset NVMET CQ Set complete queue */ |
9408 | if (phba->sli4_hba.nvmet_cqset) { | |
9409 | for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) | |
9410 | lpfc_cq_destroy( | |
9411 | phba, phba->sli4_hba.nvmet_cqset[qidx]); | |
9412 | } | |
2d7dbc4c JS |
9413 | } |
9414 | ||
da0436e9 | 9415 | /* Unset FCP response complete queue */ |
895427bd JS |
9416 | if (phba->sli4_hba.fcp_cq) |
9417 | for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++) | |
9418 | lpfc_cq_destroy(phba, phba->sli4_hba.fcp_cq[qidx]); | |
9419 | ||
da0436e9 | 9420 | /* Unset fast-path event queue */ |
895427bd JS |
9421 | if (phba->sli4_hba.hba_eq) |
9422 | for (qidx = 0; qidx < phba->io_channel_irqs; qidx++) | |
9423 | lpfc_eq_destroy(phba, phba->sli4_hba.hba_eq[qidx]); | |
da0436e9 JS |
9424 | } |
9425 | ||
9426 | /** | |
9427 | * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool | |
9428 | * @phba: pointer to lpfc hba data structure. | |
9429 | * | |
9430 | * This routine is invoked to allocate and set up a pool of completion queue | |
9431 | * events. The body of the completion queue event is a completion queue entry | |
9432 | * CQE. For now, this pool is used for the interrupt service routine to queue | |
9433 | * the following HBA completion queue events for the worker thread to process: | |
9434 | * - Mailbox asynchronous events | |
9435 | * - Receive queue completion unsolicited events | |
9436 | * Later, this can be used for all the slow-path events. | |
9437 | * | |
9438 | * Return codes | |
af901ca1 | 9439 | * 0 - successful |
25985edc | 9440 | * -ENOMEM - No available memory |
da0436e9 JS |
9441 | **/ |
9442 | static int | |
9443 | lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba) | |
9444 | { | |
9445 | struct lpfc_cq_event *cq_event; | |
9446 | int i; | |
9447 | ||
9448 | for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) { | |
9449 | cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL); | |
9450 | if (!cq_event) | |
9451 | goto out_pool_create_fail; | |
9452 | list_add_tail(&cq_event->list, | |
9453 | &phba->sli4_hba.sp_cqe_event_pool); | |
9454 | } | |
9455 | return 0; | |
9456 | ||
9457 | out_pool_create_fail: | |
9458 | lpfc_sli4_cq_event_pool_destroy(phba); | |
9459 | return -ENOMEM; | |
9460 | } | |
9461 | ||
9462 | /** | |
9463 | * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool | |
9464 | * @phba: pointer to lpfc hba data structure. | |
9465 | * | |
9466 | * This routine is invoked to free the pool of completion queue events at | |
9467 | * driver unload time. Note that, it is the responsibility of the driver | |
9468 | * cleanup routine to free all the outstanding completion-queue events | |
9469 | * allocated from this pool back into the pool before invoking this routine | |
9470 | * to destroy the pool. | |
9471 | **/ | |
9472 | static void | |
9473 | lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba) | |
9474 | { | |
9475 | struct lpfc_cq_event *cq_event, *next_cq_event; | |
9476 | ||
9477 | list_for_each_entry_safe(cq_event, next_cq_event, | |
9478 | &phba->sli4_hba.sp_cqe_event_pool, list) { | |
9479 | list_del(&cq_event->list); | |
9480 | kfree(cq_event); | |
9481 | } | |
9482 | } | |
9483 | ||
9484 | /** | |
9485 | * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool | |
9486 | * @phba: pointer to lpfc hba data structure. | |
9487 | * | |
9488 | * This routine is the lock free version of the API invoked to allocate a | |
9489 | * completion-queue event from the free pool. | |
9490 | * | |
9491 | * Return: Pointer to the newly allocated completion-queue event if successful | |
9492 | * NULL otherwise. | |
9493 | **/ | |
9494 | struct lpfc_cq_event * | |
9495 | __lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba) | |
9496 | { | |
9497 | struct lpfc_cq_event *cq_event = NULL; | |
9498 | ||
9499 | list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event, | |
9500 | struct lpfc_cq_event, list); | |
9501 | return cq_event; | |
9502 | } | |
9503 | ||
9504 | /** | |
9505 | * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool | |
9506 | * @phba: pointer to lpfc hba data structure. | |
9507 | * | |
9508 | * This routine is the lock version of the API invoked to allocate a | |
9509 | * completion-queue event from the free pool. | |
9510 | * | |
9511 | * Return: Pointer to the newly allocated completion-queue event if successful | |
9512 | * NULL otherwise. | |
9513 | **/ | |
9514 | struct lpfc_cq_event * | |
9515 | lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba) | |
9516 | { | |
9517 | struct lpfc_cq_event *cq_event; | |
9518 | unsigned long iflags; | |
9519 | ||
9520 | spin_lock_irqsave(&phba->hbalock, iflags); | |
9521 | cq_event = __lpfc_sli4_cq_event_alloc(phba); | |
9522 | spin_unlock_irqrestore(&phba->hbalock, iflags); | |
9523 | return cq_event; | |
9524 | } | |
9525 | ||
9526 | /** | |
9527 | * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool | |
9528 | * @phba: pointer to lpfc hba data structure. | |
9529 | * @cq_event: pointer to the completion queue event to be freed. | |
9530 | * | |
9531 | * This routine is the lock free version of the API invoked to release a | |
9532 | * completion-queue event back into the free pool. | |
9533 | **/ | |
9534 | void | |
9535 | __lpfc_sli4_cq_event_release(struct lpfc_hba *phba, | |
9536 | struct lpfc_cq_event *cq_event) | |
9537 | { | |
9538 | list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool); | |
9539 | } | |
9540 | ||
9541 | /** | |
9542 | * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool | |
9543 | * @phba: pointer to lpfc hba data structure. | |
9544 | * @cq_event: pointer to the completion queue event to be freed. | |
9545 | * | |
9546 | * This routine is the lock version of the API invoked to release a | |
9547 | * completion-queue event back into the free pool. | |
9548 | **/ | |
9549 | void | |
9550 | lpfc_sli4_cq_event_release(struct lpfc_hba *phba, | |
9551 | struct lpfc_cq_event *cq_event) | |
9552 | { | |
9553 | unsigned long iflags; | |
9554 | spin_lock_irqsave(&phba->hbalock, iflags); | |
9555 | __lpfc_sli4_cq_event_release(phba, cq_event); | |
9556 | spin_unlock_irqrestore(&phba->hbalock, iflags); | |
9557 | } | |
9558 | ||
9559 | /** | |
9560 | * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool | |
9561 | * @phba: pointer to lpfc hba data structure. | |
9562 | * | |
9563 | * This routine is to free all the pending completion-queue events to the | |
9564 | * back into the free pool for device reset. | |
9565 | **/ | |
9566 | static void | |
9567 | lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba) | |
9568 | { | |
9569 | LIST_HEAD(cqelist); | |
9570 | struct lpfc_cq_event *cqe; | |
9571 | unsigned long iflags; | |
9572 | ||
9573 | /* Retrieve all the pending WCQEs from pending WCQE lists */ | |
9574 | spin_lock_irqsave(&phba->hbalock, iflags); | |
9575 | /* Pending FCP XRI abort events */ | |
9576 | list_splice_init(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue, | |
9577 | &cqelist); | |
9578 | /* Pending ELS XRI abort events */ | |
9579 | list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue, | |
9580 | &cqelist); | |
9581 | /* Pending asynnc events */ | |
9582 | list_splice_init(&phba->sli4_hba.sp_asynce_work_queue, | |
9583 | &cqelist); | |
9584 | spin_unlock_irqrestore(&phba->hbalock, iflags); | |
9585 | ||
9586 | while (!list_empty(&cqelist)) { | |
9587 | list_remove_head(&cqelist, cqe, struct lpfc_cq_event, list); | |
9588 | lpfc_sli4_cq_event_release(phba, cqe); | |
9589 | } | |
9590 | } | |
9591 | ||
9592 | /** | |
9593 | * lpfc_pci_function_reset - Reset pci function. | |
9594 | * @phba: pointer to lpfc hba data structure. | |
9595 | * | |
9596 | * This routine is invoked to request a PCI function reset. It will destroys | |
9597 | * all resources assigned to the PCI function which originates this request. | |
9598 | * | |
9599 | * Return codes | |
af901ca1 | 9600 | * 0 - successful |
25985edc | 9601 | * -ENOMEM - No available memory |
d439d286 | 9602 | * -EIO - The mailbox failed to complete successfully. |
da0436e9 JS |
9603 | **/ |
9604 | int | |
9605 | lpfc_pci_function_reset(struct lpfc_hba *phba) | |
9606 | { | |
9607 | LPFC_MBOXQ_t *mboxq; | |
2fcee4bf | 9608 | uint32_t rc = 0, if_type; |
da0436e9 | 9609 | uint32_t shdr_status, shdr_add_status; |
2f6fa2c9 JS |
9610 | uint32_t rdy_chk; |
9611 | uint32_t port_reset = 0; | |
da0436e9 | 9612 | union lpfc_sli4_cfg_shdr *shdr; |
2fcee4bf | 9613 | struct lpfc_register reg_data; |
2b81f942 | 9614 | uint16_t devid; |
da0436e9 | 9615 | |
2fcee4bf JS |
9616 | if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); |
9617 | switch (if_type) { | |
9618 | case LPFC_SLI_INTF_IF_TYPE_0: | |
9619 | mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, | |
9620 | GFP_KERNEL); | |
9621 | if (!mboxq) { | |
9622 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9623 | "0494 Unable to allocate memory for " | |
9624 | "issuing SLI_FUNCTION_RESET mailbox " | |
9625 | "command\n"); | |
9626 | return -ENOMEM; | |
9627 | } | |
da0436e9 | 9628 | |
2fcee4bf JS |
9629 | /* Setup PCI function reset mailbox-ioctl command */ |
9630 | lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, | |
9631 | LPFC_MBOX_OPCODE_FUNCTION_RESET, 0, | |
9632 | LPFC_SLI4_MBX_EMBED); | |
9633 | rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
9634 | shdr = (union lpfc_sli4_cfg_shdr *) | |
9635 | &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; | |
9636 | shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); | |
9637 | shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, | |
9638 | &shdr->response); | |
9639 | if (rc != MBX_TIMEOUT) | |
9640 | mempool_free(mboxq, phba->mbox_mem_pool); | |
9641 | if (shdr_status || shdr_add_status || rc) { | |
9642 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9643 | "0495 SLI_FUNCTION_RESET mailbox " | |
9644 | "failed with status x%x add_status x%x," | |
9645 | " mbx status x%x\n", | |
9646 | shdr_status, shdr_add_status, rc); | |
9647 | rc = -ENXIO; | |
9648 | } | |
9649 | break; | |
9650 | case LPFC_SLI_INTF_IF_TYPE_2: | |
27d6ac0a | 9651 | case LPFC_SLI_INTF_IF_TYPE_6: |
2f6fa2c9 JS |
9652 | wait: |
9653 | /* | |
9654 | * Poll the Port Status Register and wait for RDY for | |
9655 | * up to 30 seconds. If the port doesn't respond, treat | |
9656 | * it as an error. | |
9657 | */ | |
77d093fb | 9658 | for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) { |
2f6fa2c9 JS |
9659 | if (lpfc_readl(phba->sli4_hba.u.if_type2. |
9660 | STATUSregaddr, ®_data.word0)) { | |
9661 | rc = -ENODEV; | |
9662 | goto out; | |
9663 | } | |
9664 | if (bf_get(lpfc_sliport_status_rdy, ®_data)) | |
9665 | break; | |
9666 | msleep(20); | |
9667 | } | |
9668 | ||
9669 | if (!bf_get(lpfc_sliport_status_rdy, ®_data)) { | |
9670 | phba->work_status[0] = readl( | |
9671 | phba->sli4_hba.u.if_type2.ERR1regaddr); | |
9672 | phba->work_status[1] = readl( | |
9673 | phba->sli4_hba.u.if_type2.ERR2regaddr); | |
9674 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9675 | "2890 Port not ready, port status reg " | |
9676 | "0x%x error 1=0x%x, error 2=0x%x\n", | |
9677 | reg_data.word0, | |
9678 | phba->work_status[0], | |
9679 | phba->work_status[1]); | |
9680 | rc = -ENODEV; | |
9681 | goto out; | |
9682 | } | |
9683 | ||
9684 | if (!port_reset) { | |
9685 | /* | |
9686 | * Reset the port now | |
9687 | */ | |
2fcee4bf JS |
9688 | reg_data.word0 = 0; |
9689 | bf_set(lpfc_sliport_ctrl_end, ®_data, | |
9690 | LPFC_SLIPORT_LITTLE_ENDIAN); | |
9691 | bf_set(lpfc_sliport_ctrl_ip, ®_data, | |
9692 | LPFC_SLIPORT_INIT_PORT); | |
9693 | writel(reg_data.word0, phba->sli4_hba.u.if_type2. | |
9694 | CTRLregaddr); | |
8fcb8acd | 9695 | /* flush */ |
2b81f942 JS |
9696 | pci_read_config_word(phba->pcidev, |
9697 | PCI_DEVICE_ID, &devid); | |
2fcee4bf | 9698 | |
2f6fa2c9 JS |
9699 | port_reset = 1; |
9700 | msleep(20); | |
9701 | goto wait; | |
9702 | } else if (bf_get(lpfc_sliport_status_rn, ®_data)) { | |
9703 | rc = -ENODEV; | |
9704 | goto out; | |
2fcee4bf JS |
9705 | } |
9706 | break; | |
2f6fa2c9 | 9707 | |
2fcee4bf JS |
9708 | case LPFC_SLI_INTF_IF_TYPE_1: |
9709 | default: | |
9710 | break; | |
da0436e9 | 9711 | } |
2fcee4bf | 9712 | |
73d91e50 | 9713 | out: |
2fcee4bf | 9714 | /* Catch the not-ready port failure after a port reset. */ |
2f6fa2c9 | 9715 | if (rc) { |
229adb0e JS |
9716 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
9717 | "3317 HBA not functional: IP Reset Failed " | |
2f6fa2c9 | 9718 | "try: echo fw_reset > board_mode\n"); |
2fcee4bf | 9719 | rc = -ENODEV; |
229adb0e | 9720 | } |
2fcee4bf | 9721 | |
da0436e9 JS |
9722 | return rc; |
9723 | } | |
9724 | ||
da0436e9 JS |
9725 | /** |
9726 | * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space. | |
9727 | * @phba: pointer to lpfc hba data structure. | |
9728 | * | |
9729 | * This routine is invoked to set up the PCI device memory space for device | |
9730 | * with SLI-4 interface spec. | |
9731 | * | |
9732 | * Return codes | |
af901ca1 | 9733 | * 0 - successful |
da0436e9 JS |
9734 | * other values - error |
9735 | **/ | |
9736 | static int | |
9737 | lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba) | |
9738 | { | |
f30e1bfd | 9739 | struct pci_dev *pdev = phba->pcidev; |
da0436e9 JS |
9740 | unsigned long bar0map_len, bar1map_len, bar2map_len; |
9741 | int error = -ENODEV; | |
2fcee4bf | 9742 | uint32_t if_type; |
da0436e9 | 9743 | |
f30e1bfd | 9744 | if (!pdev) |
da0436e9 | 9745 | return error; |
da0436e9 JS |
9746 | |
9747 | /* Set the device DMA mask size */ | |
f30e1bfd CH |
9748 | if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)) || |
9749 | dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32))) | |
9750 | return error; | |
da0436e9 | 9751 | |
2fcee4bf JS |
9752 | /* |
9753 | * The BARs and register set definitions and offset locations are | |
9754 | * dependent on the if_type. | |
9755 | */ | |
9756 | if (pci_read_config_dword(pdev, LPFC_SLI_INTF, | |
9757 | &phba->sli4_hba.sli_intf.word0)) { | |
9758 | return error; | |
9759 | } | |
9760 | ||
9761 | /* There is no SLI3 failback for SLI4 devices. */ | |
9762 | if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) != | |
9763 | LPFC_SLI_INTF_VALID) { | |
9764 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
9765 | "2894 SLI_INTF reg contents invalid " | |
9766 | "sli_intf reg 0x%x\n", | |
9767 | phba->sli4_hba.sli_intf.word0); | |
9768 | return error; | |
9769 | } | |
9770 | ||
9771 | if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); | |
9772 | /* | |
9773 | * Get the bus address of SLI4 device Bar regions and the | |
9774 | * number of bytes required by each mapping. The mapping of the | |
9775 | * particular PCI BARs regions is dependent on the type of | |
9776 | * SLI4 device. | |
da0436e9 | 9777 | */ |
f5ca6f2e JS |
9778 | if (pci_resource_start(pdev, PCI_64BIT_BAR0)) { |
9779 | phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0); | |
9780 | bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0); | |
2fcee4bf JS |
9781 | |
9782 | /* | |
9783 | * Map SLI4 PCI Config Space Register base to a kernel virtual | |
9784 | * addr | |
9785 | */ | |
9786 | phba->sli4_hba.conf_regs_memmap_p = | |
9787 | ioremap(phba->pci_bar0_map, bar0map_len); | |
9788 | if (!phba->sli4_hba.conf_regs_memmap_p) { | |
9789 | dev_printk(KERN_ERR, &pdev->dev, | |
9790 | "ioremap failed for SLI4 PCI config " | |
9791 | "registers.\n"); | |
9792 | goto out; | |
9793 | } | |
f5ca6f2e | 9794 | phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p; |
2fcee4bf JS |
9795 | /* Set up BAR0 PCI config space register memory map */ |
9796 | lpfc_sli4_bar0_register_memmap(phba, if_type); | |
1dfb5a47 JS |
9797 | } else { |
9798 | phba->pci_bar0_map = pci_resource_start(pdev, 1); | |
9799 | bar0map_len = pci_resource_len(pdev, 1); | |
27d6ac0a | 9800 | if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) { |
2fcee4bf JS |
9801 | dev_printk(KERN_ERR, &pdev->dev, |
9802 | "FATAL - No BAR0 mapping for SLI4, if_type 2\n"); | |
9803 | goto out; | |
9804 | } | |
9805 | phba->sli4_hba.conf_regs_memmap_p = | |
da0436e9 | 9806 | ioremap(phba->pci_bar0_map, bar0map_len); |
2fcee4bf JS |
9807 | if (!phba->sli4_hba.conf_regs_memmap_p) { |
9808 | dev_printk(KERN_ERR, &pdev->dev, | |
9809 | "ioremap failed for SLI4 PCI config " | |
9810 | "registers.\n"); | |
9811 | goto out; | |
9812 | } | |
9813 | lpfc_sli4_bar0_register_memmap(phba, if_type); | |
da0436e9 JS |
9814 | } |
9815 | ||
e4b9794e JS |
9816 | if (if_type == LPFC_SLI_INTF_IF_TYPE_0) { |
9817 | if (pci_resource_start(pdev, PCI_64BIT_BAR2)) { | |
9818 | /* | |
9819 | * Map SLI4 if type 0 HBA Control Register base to a | |
9820 | * kernel virtual address and setup the registers. | |
9821 | */ | |
9822 | phba->pci_bar1_map = pci_resource_start(pdev, | |
9823 | PCI_64BIT_BAR2); | |
9824 | bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2); | |
9825 | phba->sli4_hba.ctrl_regs_memmap_p = | |
9826 | ioremap(phba->pci_bar1_map, | |
9827 | bar1map_len); | |
9828 | if (!phba->sli4_hba.ctrl_regs_memmap_p) { | |
9829 | dev_err(&pdev->dev, | |
9830 | "ioremap failed for SLI4 HBA " | |
9831 | "control registers.\n"); | |
9832 | error = -ENOMEM; | |
9833 | goto out_iounmap_conf; | |
9834 | } | |
9835 | phba->pci_bar2_memmap_p = | |
9836 | phba->sli4_hba.ctrl_regs_memmap_p; | |
27d6ac0a | 9837 | lpfc_sli4_bar1_register_memmap(phba, if_type); |
e4b9794e JS |
9838 | } else { |
9839 | error = -ENOMEM; | |
2fcee4bf JS |
9840 | goto out_iounmap_conf; |
9841 | } | |
da0436e9 JS |
9842 | } |
9843 | ||
27d6ac0a JS |
9844 | if ((if_type == LPFC_SLI_INTF_IF_TYPE_6) && |
9845 | (pci_resource_start(pdev, PCI_64BIT_BAR2))) { | |
9846 | /* | |
9847 | * Map SLI4 if type 6 HBA Doorbell Register base to a kernel | |
9848 | * virtual address and setup the registers. | |
9849 | */ | |
9850 | phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2); | |
9851 | bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2); | |
9852 | phba->sli4_hba.drbl_regs_memmap_p = | |
9853 | ioremap(phba->pci_bar1_map, bar1map_len); | |
9854 | if (!phba->sli4_hba.drbl_regs_memmap_p) { | |
9855 | dev_err(&pdev->dev, | |
9856 | "ioremap failed for SLI4 HBA doorbell registers.\n"); | |
9857 | goto out_iounmap_conf; | |
9858 | } | |
9859 | phba->pci_bar2_memmap_p = phba->sli4_hba.drbl_regs_memmap_p; | |
9860 | lpfc_sli4_bar1_register_memmap(phba, if_type); | |
9861 | } | |
9862 | ||
e4b9794e JS |
9863 | if (if_type == LPFC_SLI_INTF_IF_TYPE_0) { |
9864 | if (pci_resource_start(pdev, PCI_64BIT_BAR4)) { | |
9865 | /* | |
9866 | * Map SLI4 if type 0 HBA Doorbell Register base to | |
9867 | * a kernel virtual address and setup the registers. | |
9868 | */ | |
9869 | phba->pci_bar2_map = pci_resource_start(pdev, | |
9870 | PCI_64BIT_BAR4); | |
9871 | bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4); | |
9872 | phba->sli4_hba.drbl_regs_memmap_p = | |
9873 | ioremap(phba->pci_bar2_map, | |
9874 | bar2map_len); | |
9875 | if (!phba->sli4_hba.drbl_regs_memmap_p) { | |
9876 | dev_err(&pdev->dev, | |
9877 | "ioremap failed for SLI4 HBA" | |
9878 | " doorbell registers.\n"); | |
9879 | error = -ENOMEM; | |
9880 | goto out_iounmap_ctrl; | |
9881 | } | |
9882 | phba->pci_bar4_memmap_p = | |
9883 | phba->sli4_hba.drbl_regs_memmap_p; | |
9884 | error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0); | |
9885 | if (error) | |
9886 | goto out_iounmap_all; | |
9887 | } else { | |
9888 | error = -ENOMEM; | |
2fcee4bf | 9889 | goto out_iounmap_all; |
e4b9794e | 9890 | } |
da0436e9 JS |
9891 | } |
9892 | ||
1351e69f JS |
9893 | if (if_type == LPFC_SLI_INTF_IF_TYPE_6 && |
9894 | pci_resource_start(pdev, PCI_64BIT_BAR4)) { | |
9895 | /* | |
9896 | * Map SLI4 if type 6 HBA DPP Register base to a kernel | |
9897 | * virtual address and setup the registers. | |
9898 | */ | |
9899 | phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4); | |
9900 | bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4); | |
9901 | phba->sli4_hba.dpp_regs_memmap_p = | |
9902 | ioremap(phba->pci_bar2_map, bar2map_len); | |
9903 | if (!phba->sli4_hba.dpp_regs_memmap_p) { | |
9904 | dev_err(&pdev->dev, | |
9905 | "ioremap failed for SLI4 HBA dpp registers.\n"); | |
9906 | goto out_iounmap_ctrl; | |
9907 | } | |
9908 | phba->pci_bar4_memmap_p = phba->sli4_hba.dpp_regs_memmap_p; | |
9909 | } | |
9910 | ||
b71413dd | 9911 | /* Set up the EQ/CQ register handeling functions now */ |
27d6ac0a JS |
9912 | switch (if_type) { |
9913 | case LPFC_SLI_INTF_IF_TYPE_0: | |
9914 | case LPFC_SLI_INTF_IF_TYPE_2: | |
b71413dd JS |
9915 | phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_eq_clr_intr; |
9916 | phba->sli4_hba.sli4_eq_release = lpfc_sli4_eq_release; | |
9917 | phba->sli4_hba.sli4_cq_release = lpfc_sli4_cq_release; | |
27d6ac0a JS |
9918 | break; |
9919 | case LPFC_SLI_INTF_IF_TYPE_6: | |
9920 | phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_if6_eq_clr_intr; | |
9921 | phba->sli4_hba.sli4_eq_release = lpfc_sli4_if6_eq_release; | |
9922 | phba->sli4_hba.sli4_cq_release = lpfc_sli4_if6_cq_release; | |
9923 | break; | |
9924 | default: | |
9925 | break; | |
b71413dd JS |
9926 | } |
9927 | ||
da0436e9 JS |
9928 | return 0; |
9929 | ||
9930 | out_iounmap_all: | |
9931 | iounmap(phba->sli4_hba.drbl_regs_memmap_p); | |
9932 | out_iounmap_ctrl: | |
9933 | iounmap(phba->sli4_hba.ctrl_regs_memmap_p); | |
9934 | out_iounmap_conf: | |
9935 | iounmap(phba->sli4_hba.conf_regs_memmap_p); | |
9936 | out: | |
9937 | return error; | |
9938 | } | |
9939 | ||
9940 | /** | |
9941 | * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space. | |
9942 | * @phba: pointer to lpfc hba data structure. | |
9943 | * | |
9944 | * This routine is invoked to unset the PCI device memory space for device | |
9945 | * with SLI-4 interface spec. | |
9946 | **/ | |
9947 | static void | |
9948 | lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba) | |
9949 | { | |
2e90f4b5 JS |
9950 | uint32_t if_type; |
9951 | if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); | |
da0436e9 | 9952 | |
2e90f4b5 JS |
9953 | switch (if_type) { |
9954 | case LPFC_SLI_INTF_IF_TYPE_0: | |
9955 | iounmap(phba->sli4_hba.drbl_regs_memmap_p); | |
9956 | iounmap(phba->sli4_hba.ctrl_regs_memmap_p); | |
9957 | iounmap(phba->sli4_hba.conf_regs_memmap_p); | |
9958 | break; | |
9959 | case LPFC_SLI_INTF_IF_TYPE_2: | |
9960 | iounmap(phba->sli4_hba.conf_regs_memmap_p); | |
9961 | break; | |
27d6ac0a JS |
9962 | case LPFC_SLI_INTF_IF_TYPE_6: |
9963 | iounmap(phba->sli4_hba.drbl_regs_memmap_p); | |
9964 | iounmap(phba->sli4_hba.conf_regs_memmap_p); | |
9965 | break; | |
2e90f4b5 JS |
9966 | case LPFC_SLI_INTF_IF_TYPE_1: |
9967 | default: | |
9968 | dev_printk(KERN_ERR, &phba->pcidev->dev, | |
9969 | "FATAL - unsupported SLI4 interface type - %d\n", | |
9970 | if_type); | |
9971 | break; | |
9972 | } | |
da0436e9 JS |
9973 | } |
9974 | ||
9975 | /** | |
9976 | * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device | |
9977 | * @phba: pointer to lpfc hba data structure. | |
9978 | * | |
9979 | * This routine is invoked to enable the MSI-X interrupt vectors to device | |
45ffac19 | 9980 | * with SLI-3 interface specs. |
da0436e9 JS |
9981 | * |
9982 | * Return codes | |
af901ca1 | 9983 | * 0 - successful |
da0436e9 JS |
9984 | * other values - error |
9985 | **/ | |
9986 | static int | |
9987 | lpfc_sli_enable_msix(struct lpfc_hba *phba) | |
9988 | { | |
45ffac19 | 9989 | int rc; |
da0436e9 JS |
9990 | LPFC_MBOXQ_t *pmb; |
9991 | ||
9992 | /* Set up MSI-X multi-message vectors */ | |
45ffac19 CH |
9993 | rc = pci_alloc_irq_vectors(phba->pcidev, |
9994 | LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX); | |
9995 | if (rc < 0) { | |
da0436e9 JS |
9996 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
9997 | "0420 PCI enable MSI-X failed (%d)\n", rc); | |
029165ac | 9998 | goto vec_fail_out; |
da0436e9 | 9999 | } |
45ffac19 | 10000 | |
da0436e9 JS |
10001 | /* |
10002 | * Assign MSI-X vectors to interrupt handlers | |
10003 | */ | |
10004 | ||
10005 | /* vector-0 is associated to slow-path handler */ | |
45ffac19 | 10006 | rc = request_irq(pci_irq_vector(phba->pcidev, 0), |
ed243d37 | 10007 | &lpfc_sli_sp_intr_handler, 0, |
da0436e9 JS |
10008 | LPFC_SP_DRIVER_HANDLER_NAME, phba); |
10009 | if (rc) { | |
10010 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
10011 | "0421 MSI-X slow-path request_irq failed " | |
10012 | "(%d)\n", rc); | |
10013 | goto msi_fail_out; | |
10014 | } | |
10015 | ||
10016 | /* vector-1 is associated to fast-path handler */ | |
45ffac19 | 10017 | rc = request_irq(pci_irq_vector(phba->pcidev, 1), |
ed243d37 | 10018 | &lpfc_sli_fp_intr_handler, 0, |
da0436e9 JS |
10019 | LPFC_FP_DRIVER_HANDLER_NAME, phba); |
10020 | ||
10021 | if (rc) { | |
10022 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
10023 | "0429 MSI-X fast-path request_irq failed " | |
10024 | "(%d)\n", rc); | |
10025 | goto irq_fail_out; | |
10026 | } | |
10027 | ||
10028 | /* | |
10029 | * Configure HBA MSI-X attention conditions to messages | |
10030 | */ | |
10031 | pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); | |
10032 | ||
10033 | if (!pmb) { | |
10034 | rc = -ENOMEM; | |
10035 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
10036 | "0474 Unable to allocate memory for issuing " | |
10037 | "MBOX_CONFIG_MSI command\n"); | |
10038 | goto mem_fail_out; | |
10039 | } | |
10040 | rc = lpfc_config_msi(phba, pmb); | |
10041 | if (rc) | |
10042 | goto mbx_fail_out; | |
10043 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); | |
10044 | if (rc != MBX_SUCCESS) { | |
10045 | lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX, | |
10046 | "0351 Config MSI mailbox command failed, " | |
10047 | "mbxCmd x%x, mbxStatus x%x\n", | |
10048 | pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus); | |
10049 | goto mbx_fail_out; | |
10050 | } | |
10051 | ||
10052 | /* Free memory allocated for mailbox command */ | |
10053 | mempool_free(pmb, phba->mbox_mem_pool); | |
10054 | return rc; | |
10055 | ||
10056 | mbx_fail_out: | |
10057 | /* Free memory allocated for mailbox command */ | |
10058 | mempool_free(pmb, phba->mbox_mem_pool); | |
10059 | ||
10060 | mem_fail_out: | |
10061 | /* free the irq already requested */ | |
45ffac19 | 10062 | free_irq(pci_irq_vector(phba->pcidev, 1), phba); |
da0436e9 JS |
10063 | |
10064 | irq_fail_out: | |
10065 | /* free the irq already requested */ | |
45ffac19 | 10066 | free_irq(pci_irq_vector(phba->pcidev, 0), phba); |
da0436e9 JS |
10067 | |
10068 | msi_fail_out: | |
10069 | /* Unconfigure MSI-X capability structure */ | |
45ffac19 | 10070 | pci_free_irq_vectors(phba->pcidev); |
029165ac AG |
10071 | |
10072 | vec_fail_out: | |
da0436e9 JS |
10073 | return rc; |
10074 | } | |
10075 | ||
da0436e9 JS |
10076 | /** |
10077 | * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device. | |
10078 | * @phba: pointer to lpfc hba data structure. | |
10079 | * | |
10080 | * This routine is invoked to enable the MSI interrupt mode to device with | |
10081 | * SLI-3 interface spec. The kernel function pci_enable_msi() is called to | |
10082 | * enable the MSI vector. The device driver is responsible for calling the | |
10083 | * request_irq() to register MSI vector with a interrupt the handler, which | |
10084 | * is done in this function. | |
10085 | * | |
10086 | * Return codes | |
af901ca1 | 10087 | * 0 - successful |
da0436e9 JS |
10088 | * other values - error |
10089 | */ | |
10090 | static int | |
10091 | lpfc_sli_enable_msi(struct lpfc_hba *phba) | |
10092 | { | |
10093 | int rc; | |
10094 | ||
10095 | rc = pci_enable_msi(phba->pcidev); | |
10096 | if (!rc) | |
10097 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
10098 | "0462 PCI enable MSI mode success.\n"); | |
10099 | else { | |
10100 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
10101 | "0471 PCI enable MSI mode failed (%d)\n", rc); | |
10102 | return rc; | |
10103 | } | |
10104 | ||
10105 | rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler, | |
ed243d37 | 10106 | 0, LPFC_DRIVER_NAME, phba); |
da0436e9 JS |
10107 | if (rc) { |
10108 | pci_disable_msi(phba->pcidev); | |
10109 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
10110 | "0478 MSI request_irq failed (%d)\n", rc); | |
10111 | } | |
10112 | return rc; | |
10113 | } | |
10114 | ||
da0436e9 JS |
10115 | /** |
10116 | * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device. | |
10117 | * @phba: pointer to lpfc hba data structure. | |
10118 | * | |
10119 | * This routine is invoked to enable device interrupt and associate driver's | |
10120 | * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface | |
10121 | * spec. Depends on the interrupt mode configured to the driver, the driver | |
10122 | * will try to fallback from the configured interrupt mode to an interrupt | |
10123 | * mode which is supported by the platform, kernel, and device in the order | |
10124 | * of: | |
10125 | * MSI-X -> MSI -> IRQ. | |
10126 | * | |
10127 | * Return codes | |
af901ca1 | 10128 | * 0 - successful |
da0436e9 JS |
10129 | * other values - error |
10130 | **/ | |
10131 | static uint32_t | |
10132 | lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode) | |
10133 | { | |
10134 | uint32_t intr_mode = LPFC_INTR_ERROR; | |
10135 | int retval; | |
10136 | ||
10137 | if (cfg_mode == 2) { | |
10138 | /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */ | |
10139 | retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3); | |
10140 | if (!retval) { | |
10141 | /* Now, try to enable MSI-X interrupt mode */ | |
10142 | retval = lpfc_sli_enable_msix(phba); | |
10143 | if (!retval) { | |
10144 | /* Indicate initialization to MSI-X mode */ | |
10145 | phba->intr_type = MSIX; | |
10146 | intr_mode = 2; | |
10147 | } | |
10148 | } | |
10149 | } | |
10150 | ||
10151 | /* Fallback to MSI if MSI-X initialization failed */ | |
10152 | if (cfg_mode >= 1 && phba->intr_type == NONE) { | |
10153 | retval = lpfc_sli_enable_msi(phba); | |
10154 | if (!retval) { | |
10155 | /* Indicate initialization to MSI mode */ | |
10156 | phba->intr_type = MSI; | |
10157 | intr_mode = 1; | |
10158 | } | |
10159 | } | |
10160 | ||
10161 | /* Fallback to INTx if both MSI-X/MSI initalization failed */ | |
10162 | if (phba->intr_type == NONE) { | |
10163 | retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler, | |
10164 | IRQF_SHARED, LPFC_DRIVER_NAME, phba); | |
10165 | if (!retval) { | |
10166 | /* Indicate initialization to INTx mode */ | |
10167 | phba->intr_type = INTx; | |
10168 | intr_mode = 0; | |
10169 | } | |
10170 | } | |
10171 | return intr_mode; | |
10172 | } | |
10173 | ||
10174 | /** | |
10175 | * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device. | |
10176 | * @phba: pointer to lpfc hba data structure. | |
10177 | * | |
10178 | * This routine is invoked to disable device interrupt and disassociate the | |
10179 | * driver's interrupt handler(s) from interrupt vector(s) to device with | |
10180 | * SLI-3 interface spec. Depending on the interrupt mode, the driver will | |
10181 | * release the interrupt vector(s) for the message signaled interrupt. | |
10182 | **/ | |
10183 | static void | |
10184 | lpfc_sli_disable_intr(struct lpfc_hba *phba) | |
10185 | { | |
45ffac19 CH |
10186 | int nr_irqs, i; |
10187 | ||
da0436e9 | 10188 | if (phba->intr_type == MSIX) |
45ffac19 CH |
10189 | nr_irqs = LPFC_MSIX_VECTORS; |
10190 | else | |
10191 | nr_irqs = 1; | |
10192 | ||
10193 | for (i = 0; i < nr_irqs; i++) | |
10194 | free_irq(pci_irq_vector(phba->pcidev, i), phba); | |
10195 | pci_free_irq_vectors(phba->pcidev); | |
da0436e9 JS |
10196 | |
10197 | /* Reset interrupt management states */ | |
10198 | phba->intr_type = NONE; | |
10199 | phba->sli.slistat.sli_intr = 0; | |
da0436e9 JS |
10200 | } |
10201 | ||
7bb03bbf | 10202 | /** |
895427bd | 10203 | * lpfc_cpu_affinity_check - Check vector CPU affinity mappings |
7bb03bbf | 10204 | * @phba: pointer to lpfc hba data structure. |
895427bd JS |
10205 | * @vectors: number of msix vectors allocated. |
10206 | * | |
10207 | * The routine will figure out the CPU affinity assignment for every | |
10208 | * MSI-X vector allocated for the HBA. The hba_eq_hdl will be updated | |
10209 | * with a pointer to the CPU mask that defines ALL the CPUs this vector | |
10210 | * can be associated with. If the vector can be unquely associated with | |
10211 | * a single CPU, that CPU will be recorded in hba_eq_hdl[index].cpu. | |
10212 | * In addition, the CPU to IO channel mapping will be calculated | |
10213 | * and the phba->sli4_hba.cpu_map array will reflect this. | |
7bb03bbf | 10214 | */ |
895427bd JS |
10215 | static void |
10216 | lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors) | |
7bb03bbf JS |
10217 | { |
10218 | struct lpfc_vector_map_info *cpup; | |
895427bd JS |
10219 | int index = 0; |
10220 | int vec = 0; | |
7bb03bbf | 10221 | int cpu; |
7bb03bbf JS |
10222 | #ifdef CONFIG_X86 |
10223 | struct cpuinfo_x86 *cpuinfo; | |
10224 | #endif | |
7bb03bbf JS |
10225 | |
10226 | /* Init cpu_map array */ | |
10227 | memset(phba->sli4_hba.cpu_map, 0xff, | |
10228 | (sizeof(struct lpfc_vector_map_info) * | |
895427bd | 10229 | phba->sli4_hba.num_present_cpu)); |
7bb03bbf JS |
10230 | |
10231 | /* Update CPU map with physical id and core id of each CPU */ | |
10232 | cpup = phba->sli4_hba.cpu_map; | |
10233 | for (cpu = 0; cpu < phba->sli4_hba.num_present_cpu; cpu++) { | |
10234 | #ifdef CONFIG_X86 | |
10235 | cpuinfo = &cpu_data(cpu); | |
10236 | cpup->phys_id = cpuinfo->phys_proc_id; | |
10237 | cpup->core_id = cpuinfo->cpu_core_id; | |
10238 | #else | |
10239 | /* No distinction between CPUs for other platforms */ | |
10240 | cpup->phys_id = 0; | |
10241 | cpup->core_id = 0; | |
10242 | #endif | |
895427bd JS |
10243 | cpup->channel_id = index; /* For now round robin */ |
10244 | cpup->irq = pci_irq_vector(phba->pcidev, vec); | |
10245 | vec++; | |
10246 | if (vec >= vectors) | |
10247 | vec = 0; | |
10248 | index++; | |
10249 | if (index >= phba->cfg_fcp_io_channel) | |
10250 | index = 0; | |
7bb03bbf JS |
10251 | cpup++; |
10252 | } | |
7bb03bbf JS |
10253 | } |
10254 | ||
10255 | ||
da0436e9 JS |
10256 | /** |
10257 | * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device | |
10258 | * @phba: pointer to lpfc hba data structure. | |
10259 | * | |
10260 | * This routine is invoked to enable the MSI-X interrupt vectors to device | |
45ffac19 | 10261 | * with SLI-4 interface spec. |
da0436e9 JS |
10262 | * |
10263 | * Return codes | |
af901ca1 | 10264 | * 0 - successful |
da0436e9 JS |
10265 | * other values - error |
10266 | **/ | |
10267 | static int | |
10268 | lpfc_sli4_enable_msix(struct lpfc_hba *phba) | |
10269 | { | |
75baf696 | 10270 | int vectors, rc, index; |
b83d005e | 10271 | char *name; |
da0436e9 JS |
10272 | |
10273 | /* Set up MSI-X multi-message vectors */ | |
895427bd | 10274 | vectors = phba->io_channel_irqs; |
45ffac19 | 10275 | |
f358dd0c JS |
10276 | rc = pci_alloc_irq_vectors(phba->pcidev, |
10277 | (phba->nvmet_support) ? 1 : 2, | |
10278 | vectors, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); | |
4f871e1b | 10279 | if (rc < 0) { |
da0436e9 JS |
10280 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
10281 | "0484 PCI enable MSI-X failed (%d)\n", rc); | |
029165ac | 10282 | goto vec_fail_out; |
da0436e9 | 10283 | } |
4f871e1b | 10284 | vectors = rc; |
75baf696 | 10285 | |
7bb03bbf | 10286 | /* Assign MSI-X vectors to interrupt handlers */ |
67d12733 | 10287 | for (index = 0; index < vectors; index++) { |
b83d005e JS |
10288 | name = phba->sli4_hba.hba_eq_hdl[index].handler_name; |
10289 | memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ); | |
10290 | snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ, | |
4305f183 | 10291 | LPFC_DRIVER_HANDLER_NAME"%d", index); |
da0436e9 | 10292 | |
895427bd JS |
10293 | phba->sli4_hba.hba_eq_hdl[index].idx = index; |
10294 | phba->sli4_hba.hba_eq_hdl[index].phba = phba; | |
10295 | atomic_set(&phba->sli4_hba.hba_eq_hdl[index].hba_eq_in_use, 1); | |
7370d10a JS |
10296 | rc = request_irq(pci_irq_vector(phba->pcidev, index), |
10297 | &lpfc_sli4_hba_intr_handler, 0, | |
10298 | name, | |
10299 | &phba->sli4_hba.hba_eq_hdl[index]); | |
da0436e9 JS |
10300 | if (rc) { |
10301 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
10302 | "0486 MSI-X fast-path (%d) " | |
10303 | "request_irq failed (%d)\n", index, rc); | |
10304 | goto cfg_fail_out; | |
10305 | } | |
10306 | } | |
10307 | ||
895427bd | 10308 | if (vectors != phba->io_channel_irqs) { |
82c3e9ba JS |
10309 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
10310 | "3238 Reducing IO channels to match number of " | |
10311 | "MSI-X vectors, requested %d got %d\n", | |
895427bd JS |
10312 | phba->io_channel_irqs, vectors); |
10313 | if (phba->cfg_fcp_io_channel > vectors) | |
10314 | phba->cfg_fcp_io_channel = vectors; | |
10315 | if (phba->cfg_nvme_io_channel > vectors) | |
10316 | phba->cfg_nvme_io_channel = vectors; | |
10317 | if (phba->cfg_fcp_io_channel > phba->cfg_nvme_io_channel) | |
10318 | phba->io_channel_irqs = phba->cfg_fcp_io_channel; | |
10319 | else | |
10320 | phba->io_channel_irqs = phba->cfg_nvme_io_channel; | |
82c3e9ba | 10321 | } |
895427bd | 10322 | lpfc_cpu_affinity_check(phba, vectors); |
7bb03bbf | 10323 | |
da0436e9 JS |
10324 | return rc; |
10325 | ||
10326 | cfg_fail_out: | |
10327 | /* free the irq already requested */ | |
895427bd JS |
10328 | for (--index; index >= 0; index--) |
10329 | free_irq(pci_irq_vector(phba->pcidev, index), | |
10330 | &phba->sli4_hba.hba_eq_hdl[index]); | |
da0436e9 | 10331 | |
da0436e9 | 10332 | /* Unconfigure MSI-X capability structure */ |
45ffac19 | 10333 | pci_free_irq_vectors(phba->pcidev); |
029165ac AG |
10334 | |
10335 | vec_fail_out: | |
da0436e9 JS |
10336 | return rc; |
10337 | } | |
10338 | ||
da0436e9 JS |
10339 | /** |
10340 | * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device | |
10341 | * @phba: pointer to lpfc hba data structure. | |
10342 | * | |
10343 | * This routine is invoked to enable the MSI interrupt mode to device with | |
10344 | * SLI-4 interface spec. The kernel function pci_enable_msi() is called | |
10345 | * to enable the MSI vector. The device driver is responsible for calling | |
10346 | * the request_irq() to register MSI vector with a interrupt the handler, | |
10347 | * which is done in this function. | |
10348 | * | |
10349 | * Return codes | |
af901ca1 | 10350 | * 0 - successful |
da0436e9 JS |
10351 | * other values - error |
10352 | **/ | |
10353 | static int | |
10354 | lpfc_sli4_enable_msi(struct lpfc_hba *phba) | |
10355 | { | |
10356 | int rc, index; | |
10357 | ||
10358 | rc = pci_enable_msi(phba->pcidev); | |
10359 | if (!rc) | |
10360 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
10361 | "0487 PCI enable MSI mode success.\n"); | |
10362 | else { | |
10363 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
10364 | "0488 PCI enable MSI mode failed (%d)\n", rc); | |
10365 | return rc; | |
10366 | } | |
10367 | ||
10368 | rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler, | |
ed243d37 | 10369 | 0, LPFC_DRIVER_NAME, phba); |
da0436e9 JS |
10370 | if (rc) { |
10371 | pci_disable_msi(phba->pcidev); | |
10372 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
10373 | "0490 MSI request_irq failed (%d)\n", rc); | |
75baf696 | 10374 | return rc; |
da0436e9 JS |
10375 | } |
10376 | ||
895427bd JS |
10377 | for (index = 0; index < phba->io_channel_irqs; index++) { |
10378 | phba->sli4_hba.hba_eq_hdl[index].idx = index; | |
10379 | phba->sli4_hba.hba_eq_hdl[index].phba = phba; | |
da0436e9 JS |
10380 | } |
10381 | ||
75baf696 | 10382 | return 0; |
da0436e9 JS |
10383 | } |
10384 | ||
da0436e9 JS |
10385 | /** |
10386 | * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device | |
10387 | * @phba: pointer to lpfc hba data structure. | |
10388 | * | |
10389 | * This routine is invoked to enable device interrupt and associate driver's | |
10390 | * interrupt handler(s) to interrupt vector(s) to device with SLI-4 | |
10391 | * interface spec. Depends on the interrupt mode configured to the driver, | |
10392 | * the driver will try to fallback from the configured interrupt mode to an | |
10393 | * interrupt mode which is supported by the platform, kernel, and device in | |
10394 | * the order of: | |
10395 | * MSI-X -> MSI -> IRQ. | |
10396 | * | |
10397 | * Return codes | |
af901ca1 | 10398 | * 0 - successful |
da0436e9 JS |
10399 | * other values - error |
10400 | **/ | |
10401 | static uint32_t | |
10402 | lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode) | |
10403 | { | |
10404 | uint32_t intr_mode = LPFC_INTR_ERROR; | |
895427bd | 10405 | int retval, idx; |
da0436e9 JS |
10406 | |
10407 | if (cfg_mode == 2) { | |
10408 | /* Preparation before conf_msi mbox cmd */ | |
10409 | retval = 0; | |
10410 | if (!retval) { | |
10411 | /* Now, try to enable MSI-X interrupt mode */ | |
10412 | retval = lpfc_sli4_enable_msix(phba); | |
10413 | if (!retval) { | |
10414 | /* Indicate initialization to MSI-X mode */ | |
10415 | phba->intr_type = MSIX; | |
10416 | intr_mode = 2; | |
10417 | } | |
10418 | } | |
10419 | } | |
10420 | ||
10421 | /* Fallback to MSI if MSI-X initialization failed */ | |
10422 | if (cfg_mode >= 1 && phba->intr_type == NONE) { | |
10423 | retval = lpfc_sli4_enable_msi(phba); | |
10424 | if (!retval) { | |
10425 | /* Indicate initialization to MSI mode */ | |
10426 | phba->intr_type = MSI; | |
10427 | intr_mode = 1; | |
10428 | } | |
10429 | } | |
10430 | ||
10431 | /* Fallback to INTx if both MSI-X/MSI initalization failed */ | |
10432 | if (phba->intr_type == NONE) { | |
10433 | retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler, | |
10434 | IRQF_SHARED, LPFC_DRIVER_NAME, phba); | |
10435 | if (!retval) { | |
895427bd JS |
10436 | struct lpfc_hba_eq_hdl *eqhdl; |
10437 | ||
da0436e9 JS |
10438 | /* Indicate initialization to INTx mode */ |
10439 | phba->intr_type = INTx; | |
10440 | intr_mode = 0; | |
895427bd JS |
10441 | |
10442 | for (idx = 0; idx < phba->io_channel_irqs; idx++) { | |
10443 | eqhdl = &phba->sli4_hba.hba_eq_hdl[idx]; | |
10444 | eqhdl->idx = idx; | |
10445 | eqhdl->phba = phba; | |
10446 | atomic_set(&eqhdl->hba_eq_in_use, 1); | |
da0436e9 JS |
10447 | } |
10448 | } | |
10449 | } | |
10450 | return intr_mode; | |
10451 | } | |
10452 | ||
10453 | /** | |
10454 | * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device | |
10455 | * @phba: pointer to lpfc hba data structure. | |
10456 | * | |
10457 | * This routine is invoked to disable device interrupt and disassociate | |
10458 | * the driver's interrupt handler(s) from interrupt vector(s) to device | |
10459 | * with SLI-4 interface spec. Depending on the interrupt mode, the driver | |
10460 | * will release the interrupt vector(s) for the message signaled interrupt. | |
10461 | **/ | |
10462 | static void | |
10463 | lpfc_sli4_disable_intr(struct lpfc_hba *phba) | |
10464 | { | |
10465 | /* Disable the currently initialized interrupt mode */ | |
45ffac19 CH |
10466 | if (phba->intr_type == MSIX) { |
10467 | int index; | |
10468 | ||
10469 | /* Free up MSI-X multi-message vectors */ | |
895427bd JS |
10470 | for (index = 0; index < phba->io_channel_irqs; index++) |
10471 | free_irq(pci_irq_vector(phba->pcidev, index), | |
10472 | &phba->sli4_hba.hba_eq_hdl[index]); | |
45ffac19 | 10473 | } else { |
da0436e9 | 10474 | free_irq(phba->pcidev->irq, phba); |
45ffac19 CH |
10475 | } |
10476 | ||
10477 | pci_free_irq_vectors(phba->pcidev); | |
da0436e9 JS |
10478 | |
10479 | /* Reset interrupt management states */ | |
10480 | phba->intr_type = NONE; | |
10481 | phba->sli.slistat.sli_intr = 0; | |
da0436e9 JS |
10482 | } |
10483 | ||
10484 | /** | |
10485 | * lpfc_unset_hba - Unset SLI3 hba device initialization | |
10486 | * @phba: pointer to lpfc hba data structure. | |
10487 | * | |
10488 | * This routine is invoked to unset the HBA device initialization steps to | |
10489 | * a device with SLI-3 interface spec. | |
10490 | **/ | |
10491 | static void | |
10492 | lpfc_unset_hba(struct lpfc_hba *phba) | |
10493 | { | |
10494 | struct lpfc_vport *vport = phba->pport; | |
10495 | struct Scsi_Host *shost = lpfc_shost_from_vport(vport); | |
10496 | ||
10497 | spin_lock_irq(shost->host_lock); | |
10498 | vport->load_flag |= FC_UNLOADING; | |
10499 | spin_unlock_irq(shost->host_lock); | |
10500 | ||
72859909 JS |
10501 | kfree(phba->vpi_bmask); |
10502 | kfree(phba->vpi_ids); | |
10503 | ||
da0436e9 JS |
10504 | lpfc_stop_hba_timers(phba); |
10505 | ||
10506 | phba->pport->work_port_events = 0; | |
10507 | ||
10508 | lpfc_sli_hba_down(phba); | |
10509 | ||
10510 | lpfc_sli_brdrestart(phba); | |
10511 | ||
10512 | lpfc_sli_disable_intr(phba); | |
10513 | ||
10514 | return; | |
10515 | } | |
10516 | ||
5af5eee7 JS |
10517 | /** |
10518 | * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy | |
10519 | * @phba: Pointer to HBA context object. | |
10520 | * | |
10521 | * This function is called in the SLI4 code path to wait for completion | |
10522 | * of device's XRIs exchange busy. It will check the XRI exchange busy | |
10523 | * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after | |
10524 | * that, it will check the XRI exchange busy on outstanding FCP and ELS | |
10525 | * I/Os every 30 seconds, log error message, and wait forever. Only when | |
10526 | * all XRI exchange busy complete, the driver unload shall proceed with | |
10527 | * invoking the function reset ioctl mailbox command to the CNA and the | |
10528 | * the rest of the driver unload resource release. | |
10529 | **/ | |
10530 | static void | |
10531 | lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba) | |
10532 | { | |
10533 | int wait_time = 0; | |
0794d601 | 10534 | int common_xri_cmpl = 1; |
86c67379 | 10535 | int nvmet_xri_cmpl = 1; |
895427bd | 10536 | int fcp_xri_cmpl = 1; |
5af5eee7 JS |
10537 | int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list); |
10538 | ||
c3725bdc JS |
10539 | /* Driver just aborted IOs during the hba_unset process. Pause |
10540 | * here to give the HBA time to complete the IO and get entries | |
10541 | * into the abts lists. | |
10542 | */ | |
10543 | msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1 * 5); | |
10544 | ||
10545 | /* Wait for NVME pending IO to flush back to transport. */ | |
10546 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) | |
10547 | lpfc_nvme_wait_for_io_drain(phba); | |
10548 | ||
895427bd JS |
10549 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) |
10550 | fcp_xri_cmpl = | |
10551 | list_empty(&phba->sli4_hba.lpfc_abts_scsi_buf_list); | |
86c67379 | 10552 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { |
0794d601 | 10553 | common_xri_cmpl = |
895427bd | 10554 | list_empty(&phba->sli4_hba.lpfc_abts_nvme_buf_list); |
86c67379 JS |
10555 | nvmet_xri_cmpl = |
10556 | list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); | |
10557 | } | |
895427bd | 10558 | |
0794d601 | 10559 | while (!fcp_xri_cmpl || !els_xri_cmpl || !common_xri_cmpl || |
f358dd0c | 10560 | !nvmet_xri_cmpl) { |
5af5eee7 | 10561 | if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) { |
68c9b55d JS |
10562 | if (!nvmet_xri_cmpl) |
10563 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
10564 | "6424 NVMET XRI exchange busy " | |
10565 | "wait time: %d seconds.\n", | |
10566 | wait_time/1000); | |
0794d601 | 10567 | if (!common_xri_cmpl) |
895427bd JS |
10568 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
10569 | "6100 NVME XRI exchange busy " | |
10570 | "wait time: %d seconds.\n", | |
10571 | wait_time/1000); | |
5af5eee7 JS |
10572 | if (!fcp_xri_cmpl) |
10573 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
10574 | "2877 FCP XRI exchange busy " | |
10575 | "wait time: %d seconds.\n", | |
10576 | wait_time/1000); | |
10577 | if (!els_xri_cmpl) | |
10578 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
10579 | "2878 ELS XRI exchange busy " | |
10580 | "wait time: %d seconds.\n", | |
10581 | wait_time/1000); | |
10582 | msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2); | |
10583 | wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2; | |
10584 | } else { | |
10585 | msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1); | |
10586 | wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1; | |
10587 | } | |
86c67379 | 10588 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { |
0794d601 | 10589 | common_xri_cmpl = list_empty( |
895427bd | 10590 | &phba->sli4_hba.lpfc_abts_nvme_buf_list); |
86c67379 JS |
10591 | nvmet_xri_cmpl = list_empty( |
10592 | &phba->sli4_hba.lpfc_abts_nvmet_ctx_list); | |
10593 | } | |
895427bd JS |
10594 | |
10595 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) | |
10596 | fcp_xri_cmpl = list_empty( | |
10597 | &phba->sli4_hba.lpfc_abts_scsi_buf_list); | |
10598 | ||
5af5eee7 JS |
10599 | els_xri_cmpl = |
10600 | list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list); | |
f358dd0c | 10601 | |
5af5eee7 JS |
10602 | } |
10603 | } | |
10604 | ||
da0436e9 JS |
10605 | /** |
10606 | * lpfc_sli4_hba_unset - Unset the fcoe hba | |
10607 | * @phba: Pointer to HBA context object. | |
10608 | * | |
10609 | * This function is called in the SLI4 code path to reset the HBA's FCoE | |
10610 | * function. The caller is not required to hold any lock. This routine | |
10611 | * issues PCI function reset mailbox command to reset the FCoE function. | |
10612 | * At the end of the function, it calls lpfc_hba_down_post function to | |
10613 | * free any pending commands. | |
10614 | **/ | |
10615 | static void | |
10616 | lpfc_sli4_hba_unset(struct lpfc_hba *phba) | |
10617 | { | |
10618 | int wait_cnt = 0; | |
10619 | LPFC_MBOXQ_t *mboxq; | |
912e3acd | 10620 | struct pci_dev *pdev = phba->pcidev; |
da0436e9 JS |
10621 | |
10622 | lpfc_stop_hba_timers(phba); | |
10623 | phba->sli4_hba.intr_enable = 0; | |
10624 | ||
10625 | /* | |
10626 | * Gracefully wait out the potential current outstanding asynchronous | |
10627 | * mailbox command. | |
10628 | */ | |
10629 | ||
10630 | /* First, block any pending async mailbox command from posted */ | |
10631 | spin_lock_irq(&phba->hbalock); | |
10632 | phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK; | |
10633 | spin_unlock_irq(&phba->hbalock); | |
10634 | /* Now, trying to wait it out if we can */ | |
10635 | while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) { | |
10636 | msleep(10); | |
10637 | if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT) | |
10638 | break; | |
10639 | } | |
10640 | /* Forcefully release the outstanding mailbox command if timed out */ | |
10641 | if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) { | |
10642 | spin_lock_irq(&phba->hbalock); | |
10643 | mboxq = phba->sli.mbox_active; | |
10644 | mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED; | |
10645 | __lpfc_mbox_cmpl_put(phba, mboxq); | |
10646 | phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; | |
10647 | phba->sli.mbox_active = NULL; | |
10648 | spin_unlock_irq(&phba->hbalock); | |
10649 | } | |
10650 | ||
5af5eee7 JS |
10651 | /* Abort all iocbs associated with the hba */ |
10652 | lpfc_sli_hba_iocb_abort(phba); | |
10653 | ||
10654 | /* Wait for completion of device XRI exchange busy */ | |
10655 | lpfc_sli4_xri_exchange_busy_wait(phba); | |
10656 | ||
da0436e9 JS |
10657 | /* Disable PCI subsystem interrupt */ |
10658 | lpfc_sli4_disable_intr(phba); | |
10659 | ||
912e3acd JS |
10660 | /* Disable SR-IOV if enabled */ |
10661 | if (phba->cfg_sriov_nr_virtfn) | |
10662 | pci_disable_sriov(pdev); | |
10663 | ||
da0436e9 JS |
10664 | /* Stop kthread signal shall trigger work_done one more time */ |
10665 | kthread_stop(phba->worker_thread); | |
10666 | ||
d2cc9bcd | 10667 | /* Disable FW logging to host memory */ |
1165a5c2 | 10668 | lpfc_ras_stop_fwlog(phba); |
d2cc9bcd | 10669 | |
d1f525aa JS |
10670 | /* Unset the queues shared with the hardware then release all |
10671 | * allocated resources. | |
10672 | */ | |
10673 | lpfc_sli4_queue_unset(phba); | |
10674 | lpfc_sli4_queue_destroy(phba); | |
10675 | ||
3677a3a7 JS |
10676 | /* Reset SLI4 HBA FCoE function */ |
10677 | lpfc_pci_function_reset(phba); | |
10678 | ||
1165a5c2 JS |
10679 | /* Free RAS DMA memory */ |
10680 | if (phba->ras_fwlog.ras_enabled) | |
10681 | lpfc_sli4_ras_dma_free(phba); | |
10682 | ||
da0436e9 JS |
10683 | /* Stop the SLI4 device port */ |
10684 | phba->pport->work_port_events = 0; | |
10685 | } | |
10686 | ||
28baac74 JS |
10687 | /** |
10688 | * lpfc_pc_sli4_params_get - Get the SLI4_PARAMS port capabilities. | |
10689 | * @phba: Pointer to HBA context object. | |
10690 | * @mboxq: Pointer to the mailboxq memory for the mailbox command response. | |
10691 | * | |
10692 | * This function is called in the SLI4 code path to read the port's | |
10693 | * sli4 capabilities. | |
10694 | * | |
10695 | * This function may be be called from any context that can block-wait | |
10696 | * for the completion. The expectation is that this routine is called | |
10697 | * typically from probe_one or from the online routine. | |
10698 | **/ | |
10699 | int | |
10700 | lpfc_pc_sli4_params_get(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq) | |
10701 | { | |
10702 | int rc; | |
10703 | struct lpfc_mqe *mqe; | |
10704 | struct lpfc_pc_sli4_params *sli4_params; | |
10705 | uint32_t mbox_tmo; | |
10706 | ||
10707 | rc = 0; | |
10708 | mqe = &mboxq->u.mqe; | |
10709 | ||
10710 | /* Read the port's SLI4 Parameters port capabilities */ | |
fedd3b7b | 10711 | lpfc_pc_sli4_params(mboxq); |
28baac74 JS |
10712 | if (!phba->sli4_hba.intr_enable) |
10713 | rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
10714 | else { | |
a183a15f | 10715 | mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq); |
28baac74 JS |
10716 | rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo); |
10717 | } | |
10718 | ||
10719 | if (unlikely(rc)) | |
10720 | return 1; | |
10721 | ||
10722 | sli4_params = &phba->sli4_hba.pc_sli4_params; | |
10723 | sli4_params->if_type = bf_get(if_type, &mqe->un.sli4_params); | |
10724 | sli4_params->sli_rev = bf_get(sli_rev, &mqe->un.sli4_params); | |
10725 | sli4_params->sli_family = bf_get(sli_family, &mqe->un.sli4_params); | |
10726 | sli4_params->featurelevel_1 = bf_get(featurelevel_1, | |
10727 | &mqe->un.sli4_params); | |
10728 | sli4_params->featurelevel_2 = bf_get(featurelevel_2, | |
10729 | &mqe->un.sli4_params); | |
10730 | sli4_params->proto_types = mqe->un.sli4_params.word3; | |
10731 | sli4_params->sge_supp_len = mqe->un.sli4_params.sge_supp_len; | |
10732 | sli4_params->if_page_sz = bf_get(if_page_sz, &mqe->un.sli4_params); | |
10733 | sli4_params->rq_db_window = bf_get(rq_db_window, &mqe->un.sli4_params); | |
10734 | sli4_params->loopbk_scope = bf_get(loopbk_scope, &mqe->un.sli4_params); | |
10735 | sli4_params->eq_pages_max = bf_get(eq_pages, &mqe->un.sli4_params); | |
10736 | sli4_params->eqe_size = bf_get(eqe_size, &mqe->un.sli4_params); | |
10737 | sli4_params->cq_pages_max = bf_get(cq_pages, &mqe->un.sli4_params); | |
10738 | sli4_params->cqe_size = bf_get(cqe_size, &mqe->un.sli4_params); | |
10739 | sli4_params->mq_pages_max = bf_get(mq_pages, &mqe->un.sli4_params); | |
10740 | sli4_params->mqe_size = bf_get(mqe_size, &mqe->un.sli4_params); | |
10741 | sli4_params->mq_elem_cnt = bf_get(mq_elem_cnt, &mqe->un.sli4_params); | |
10742 | sli4_params->wq_pages_max = bf_get(wq_pages, &mqe->un.sli4_params); | |
10743 | sli4_params->wqe_size = bf_get(wqe_size, &mqe->un.sli4_params); | |
10744 | sli4_params->rq_pages_max = bf_get(rq_pages, &mqe->un.sli4_params); | |
10745 | sli4_params->rqe_size = bf_get(rqe_size, &mqe->un.sli4_params); | |
10746 | sli4_params->hdr_pages_max = bf_get(hdr_pages, &mqe->un.sli4_params); | |
10747 | sli4_params->hdr_size = bf_get(hdr_size, &mqe->un.sli4_params); | |
10748 | sli4_params->hdr_pp_align = bf_get(hdr_pp_align, &mqe->un.sli4_params); | |
10749 | sli4_params->sgl_pages_max = bf_get(sgl_pages, &mqe->un.sli4_params); | |
10750 | sli4_params->sgl_pp_align = bf_get(sgl_pp_align, &mqe->un.sli4_params); | |
0558056c JS |
10751 | |
10752 | /* Make sure that sge_supp_len can be handled by the driver */ | |
10753 | if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE) | |
10754 | sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE; | |
10755 | ||
28baac74 JS |
10756 | return rc; |
10757 | } | |
10758 | ||
fedd3b7b JS |
10759 | /** |
10760 | * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS. | |
10761 | * @phba: Pointer to HBA context object. | |
10762 | * @mboxq: Pointer to the mailboxq memory for the mailbox command response. | |
10763 | * | |
10764 | * This function is called in the SLI4 code path to read the port's | |
10765 | * sli4 capabilities. | |
10766 | * | |
10767 | * This function may be be called from any context that can block-wait | |
10768 | * for the completion. The expectation is that this routine is called | |
10769 | * typically from probe_one or from the online routine. | |
10770 | **/ | |
10771 | int | |
10772 | lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq) | |
10773 | { | |
10774 | int rc; | |
10775 | struct lpfc_mqe *mqe = &mboxq->u.mqe; | |
10776 | struct lpfc_pc_sli4_params *sli4_params; | |
a183a15f | 10777 | uint32_t mbox_tmo; |
fedd3b7b | 10778 | int length; |
bf316c78 | 10779 | bool exp_wqcq_pages = true; |
fedd3b7b JS |
10780 | struct lpfc_sli4_parameters *mbx_sli4_parameters; |
10781 | ||
6d368e53 JS |
10782 | /* |
10783 | * By default, the driver assumes the SLI4 port requires RPI | |
10784 | * header postings. The SLI4_PARAM response will correct this | |
10785 | * assumption. | |
10786 | */ | |
10787 | phba->sli4_hba.rpi_hdrs_in_use = 1; | |
10788 | ||
fedd3b7b JS |
10789 | /* Read the port's SLI4 Config Parameters */ |
10790 | length = (sizeof(struct lpfc_mbx_get_sli4_parameters) - | |
10791 | sizeof(struct lpfc_sli4_cfg_mhdr)); | |
10792 | lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, | |
10793 | LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS, | |
10794 | length, LPFC_SLI4_MBX_EMBED); | |
10795 | if (!phba->sli4_hba.intr_enable) | |
10796 | rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
a183a15f JS |
10797 | else { |
10798 | mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq); | |
10799 | rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo); | |
10800 | } | |
fedd3b7b JS |
10801 | if (unlikely(rc)) |
10802 | return rc; | |
10803 | sli4_params = &phba->sli4_hba.pc_sli4_params; | |
10804 | mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters; | |
10805 | sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters); | |
10806 | sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters); | |
10807 | sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters); | |
10808 | sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1, | |
10809 | mbx_sli4_parameters); | |
10810 | sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2, | |
10811 | mbx_sli4_parameters); | |
10812 | if (bf_get(cfg_phwq, mbx_sli4_parameters)) | |
10813 | phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED; | |
10814 | else | |
10815 | phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED; | |
10816 | sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len; | |
10817 | sli4_params->loopbk_scope = bf_get(loopbk_scope, mbx_sli4_parameters); | |
1ba981fd | 10818 | sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters); |
fedd3b7b JS |
10819 | sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters); |
10820 | sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters); | |
10821 | sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters); | |
10822 | sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters); | |
7365f6fd JS |
10823 | sli4_params->eqav = bf_get(cfg_eqav, mbx_sli4_parameters); |
10824 | sli4_params->cqav = bf_get(cfg_cqav, mbx_sli4_parameters); | |
0c651878 | 10825 | sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters); |
66e9e6bf | 10826 | sli4_params->bv1s = bf_get(cfg_bv1s, mbx_sli4_parameters); |
fedd3b7b JS |
10827 | sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt, |
10828 | mbx_sli4_parameters); | |
895427bd | 10829 | sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters); |
fedd3b7b JS |
10830 | sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align, |
10831 | mbx_sli4_parameters); | |
6d368e53 JS |
10832 | phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters); |
10833 | phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters); | |
895427bd JS |
10834 | phba->nvme_support = (bf_get(cfg_nvme, mbx_sli4_parameters) && |
10835 | bf_get(cfg_xib, mbx_sli4_parameters)); | |
10836 | ||
10837 | if ((phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) || | |
10838 | !phba->nvme_support) { | |
10839 | phba->nvme_support = 0; | |
10840 | phba->nvmet_support = 0; | |
bcb24f65 | 10841 | phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_OFF; |
895427bd JS |
10842 | phba->cfg_nvme_io_channel = 0; |
10843 | phba->io_channel_irqs = phba->cfg_fcp_io_channel; | |
10844 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME, | |
10845 | "6101 Disabling NVME support: " | |
10846 | "Not supported by firmware: %d %d\n", | |
10847 | bf_get(cfg_nvme, mbx_sli4_parameters), | |
10848 | bf_get(cfg_xib, mbx_sli4_parameters)); | |
10849 | ||
10850 | /* If firmware doesn't support NVME, just use SCSI support */ | |
10851 | if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)) | |
10852 | return -ENODEV; | |
10853 | phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP; | |
10854 | } | |
0558056c | 10855 | |
414abe0a JS |
10856 | /* Only embed PBDE for if_type 6, PBDE support requires xib be set */ |
10857 | if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) != | |
10858 | LPFC_SLI_INTF_IF_TYPE_6) || (!bf_get(cfg_xib, mbx_sli4_parameters))) | |
10859 | phba->cfg_enable_pbde = 0; | |
0bc2b7c5 | 10860 | |
20aefac3 JS |
10861 | /* |
10862 | * To support Suppress Response feature we must satisfy 3 conditions. | |
10863 | * lpfc_suppress_rsp module parameter must be set (default). | |
10864 | * In SLI4-Parameters Descriptor: | |
10865 | * Extended Inline Buffers (XIB) must be supported. | |
10866 | * Suppress Response IU Not Supported (SRIUNS) must NOT be supported | |
10867 | * (double negative). | |
10868 | */ | |
10869 | if (phba->cfg_suppress_rsp && bf_get(cfg_xib, mbx_sli4_parameters) && | |
10870 | !(bf_get(cfg_nosr, mbx_sli4_parameters))) | |
f358dd0c | 10871 | phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP; |
20aefac3 JS |
10872 | else |
10873 | phba->cfg_suppress_rsp = 0; | |
f358dd0c | 10874 | |
0cf07f84 JS |
10875 | if (bf_get(cfg_eqdr, mbx_sli4_parameters)) |
10876 | phba->sli.sli_flag |= LPFC_SLI_USE_EQDR; | |
10877 | ||
0558056c JS |
10878 | /* Make sure that sge_supp_len can be handled by the driver */ |
10879 | if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE) | |
10880 | sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE; | |
10881 | ||
b5c53958 | 10882 | /* |
c176ffa0 JS |
10883 | * Check whether the adapter supports an embedded copy of the |
10884 | * FCP CMD IU within the WQE for FCP_Ixxx commands. In order | |
10885 | * to use this option, 128-byte WQEs must be used. | |
b5c53958 JS |
10886 | */ |
10887 | if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters)) | |
10888 | phba->fcp_embed_io = 1; | |
10889 | else | |
10890 | phba->fcp_embed_io = 0; | |
7bdedb34 | 10891 | |
0bc2b7c5 | 10892 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME, |
414abe0a | 10893 | "6422 XIB %d PBDE %d: FCP %d NVME %d %d %d\n", |
0bc2b7c5 | 10894 | bf_get(cfg_xib, mbx_sli4_parameters), |
414abe0a JS |
10895 | phba->cfg_enable_pbde, |
10896 | phba->fcp_embed_io, phba->nvme_support, | |
4e565cf0 | 10897 | phba->cfg_nvme_embed_cmd, phba->cfg_suppress_rsp); |
0bc2b7c5 | 10898 | |
bf316c78 JS |
10899 | if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == |
10900 | LPFC_SLI_INTF_IF_TYPE_2) && | |
10901 | (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) == | |
c221768b | 10902 | LPFC_SLI_INTF_FAMILY_LNCR_A0)) |
bf316c78 JS |
10903 | exp_wqcq_pages = false; |
10904 | ||
c176ffa0 JS |
10905 | if ((bf_get(cfg_cqpsize, mbx_sli4_parameters) & LPFC_CQ_16K_PAGE_SZ) && |
10906 | (bf_get(cfg_wqpsize, mbx_sli4_parameters) & LPFC_WQ_16K_PAGE_SZ) && | |
bf316c78 | 10907 | exp_wqcq_pages && |
c176ffa0 JS |
10908 | (sli4_params->wqsize & LPFC_WQ_SZ128_SUPPORT)) |
10909 | phba->enab_exp_wqcq_pages = 1; | |
10910 | else | |
10911 | phba->enab_exp_wqcq_pages = 0; | |
7bdedb34 JS |
10912 | /* |
10913 | * Check if the SLI port supports MDS Diagnostics | |
10914 | */ | |
10915 | if (bf_get(cfg_mds_diags, mbx_sli4_parameters)) | |
10916 | phba->mds_diags_support = 1; | |
10917 | else | |
10918 | phba->mds_diags_support = 0; | |
d2cc9bcd | 10919 | |
fedd3b7b JS |
10920 | return 0; |
10921 | } | |
10922 | ||
da0436e9 JS |
10923 | /** |
10924 | * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem. | |
10925 | * @pdev: pointer to PCI device | |
10926 | * @pid: pointer to PCI device identifier | |
10927 | * | |
10928 | * This routine is to be called to attach a device with SLI-3 interface spec | |
10929 | * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is | |
10930 | * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific | |
10931 | * information of the device and driver to see if the driver state that it can | |
10932 | * support this kind of device. If the match is successful, the driver core | |
10933 | * invokes this routine. If this routine determines it can claim the HBA, it | |
10934 | * does all the initialization that it needs to do to handle the HBA properly. | |
10935 | * | |
10936 | * Return code | |
10937 | * 0 - driver can claim the device | |
10938 | * negative value - driver can not claim the device | |
10939 | **/ | |
6f039790 | 10940 | static int |
da0436e9 JS |
10941 | lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid) |
10942 | { | |
10943 | struct lpfc_hba *phba; | |
10944 | struct lpfc_vport *vport = NULL; | |
6669f9bb | 10945 | struct Scsi_Host *shost = NULL; |
da0436e9 JS |
10946 | int error; |
10947 | uint32_t cfg_mode, intr_mode; | |
10948 | ||
10949 | /* Allocate memory for HBA structure */ | |
10950 | phba = lpfc_hba_alloc(pdev); | |
10951 | if (!phba) | |
10952 | return -ENOMEM; | |
10953 | ||
10954 | /* Perform generic PCI device enabling operation */ | |
10955 | error = lpfc_enable_pci_dev(phba); | |
079b5c91 | 10956 | if (error) |
da0436e9 | 10957 | goto out_free_phba; |
da0436e9 JS |
10958 | |
10959 | /* Set up SLI API function jump table for PCI-device group-0 HBAs */ | |
10960 | error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP); | |
10961 | if (error) | |
10962 | goto out_disable_pci_dev; | |
10963 | ||
10964 | /* Set up SLI-3 specific device PCI memory space */ | |
10965 | error = lpfc_sli_pci_mem_setup(phba); | |
10966 | if (error) { | |
10967 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
10968 | "1402 Failed to set up pci memory space.\n"); | |
10969 | goto out_disable_pci_dev; | |
10970 | } | |
10971 | ||
da0436e9 JS |
10972 | /* Set up SLI-3 specific device driver resources */ |
10973 | error = lpfc_sli_driver_resource_setup(phba); | |
10974 | if (error) { | |
10975 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
10976 | "1404 Failed to set up driver resource.\n"); | |
10977 | goto out_unset_pci_mem_s3; | |
10978 | } | |
10979 | ||
10980 | /* Initialize and populate the iocb list per host */ | |
d1f525aa | 10981 | |
da0436e9 JS |
10982 | error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT); |
10983 | if (error) { | |
10984 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
10985 | "1405 Failed to initialize iocb list.\n"); | |
10986 | goto out_unset_driver_resource_s3; | |
10987 | } | |
10988 | ||
10989 | /* Set up common device driver resources */ | |
10990 | error = lpfc_setup_driver_resource_phase2(phba); | |
10991 | if (error) { | |
10992 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
10993 | "1406 Failed to set up driver resource.\n"); | |
10994 | goto out_free_iocb_list; | |
10995 | } | |
10996 | ||
079b5c91 JS |
10997 | /* Get the default values for Model Name and Description */ |
10998 | lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); | |
10999 | ||
da0436e9 JS |
11000 | /* Create SCSI host to the physical port */ |
11001 | error = lpfc_create_shost(phba); | |
11002 | if (error) { | |
11003 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11004 | "1407 Failed to create scsi host.\n"); | |
11005 | goto out_unset_driver_resource; | |
11006 | } | |
11007 | ||
11008 | /* Configure sysfs attributes */ | |
11009 | vport = phba->pport; | |
11010 | error = lpfc_alloc_sysfs_attr(vport); | |
11011 | if (error) { | |
11012 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11013 | "1476 Failed to allocate sysfs attr\n"); | |
11014 | goto out_destroy_shost; | |
11015 | } | |
11016 | ||
6669f9bb | 11017 | shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */ |
da0436e9 JS |
11018 | /* Now, trying to enable interrupt and bring up the device */ |
11019 | cfg_mode = phba->cfg_use_msi; | |
11020 | while (true) { | |
11021 | /* Put device to a known state before enabling interrupt */ | |
11022 | lpfc_stop_port(phba); | |
11023 | /* Configure and enable interrupt */ | |
11024 | intr_mode = lpfc_sli_enable_intr(phba, cfg_mode); | |
11025 | if (intr_mode == LPFC_INTR_ERROR) { | |
11026 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11027 | "0431 Failed to enable interrupt.\n"); | |
11028 | error = -ENODEV; | |
11029 | goto out_free_sysfs_attr; | |
11030 | } | |
11031 | /* SLI-3 HBA setup */ | |
11032 | if (lpfc_sli_hba_setup(phba)) { | |
11033 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11034 | "1477 Failed to set up hba\n"); | |
11035 | error = -ENODEV; | |
11036 | goto out_remove_device; | |
11037 | } | |
11038 | ||
11039 | /* Wait 50ms for the interrupts of previous mailbox commands */ | |
11040 | msleep(50); | |
11041 | /* Check active interrupts on message signaled interrupts */ | |
11042 | if (intr_mode == 0 || | |
11043 | phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) { | |
11044 | /* Log the current active interrupt mode */ | |
11045 | phba->intr_mode = intr_mode; | |
11046 | lpfc_log_intr_mode(phba, intr_mode); | |
11047 | break; | |
11048 | } else { | |
11049 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
11050 | "0447 Configure interrupt mode (%d) " | |
11051 | "failed active interrupt test.\n", | |
11052 | intr_mode); | |
11053 | /* Disable the current interrupt mode */ | |
11054 | lpfc_sli_disable_intr(phba); | |
11055 | /* Try next level of interrupt mode */ | |
11056 | cfg_mode = --intr_mode; | |
11057 | } | |
11058 | } | |
11059 | ||
11060 | /* Perform post initialization setup */ | |
11061 | lpfc_post_init_setup(phba); | |
11062 | ||
11063 | /* Check if there are static vports to be created. */ | |
11064 | lpfc_create_static_vport(phba); | |
11065 | ||
11066 | return 0; | |
11067 | ||
11068 | out_remove_device: | |
11069 | lpfc_unset_hba(phba); | |
11070 | out_free_sysfs_attr: | |
11071 | lpfc_free_sysfs_attr(vport); | |
11072 | out_destroy_shost: | |
11073 | lpfc_destroy_shost(phba); | |
11074 | out_unset_driver_resource: | |
11075 | lpfc_unset_driver_resource_phase2(phba); | |
11076 | out_free_iocb_list: | |
11077 | lpfc_free_iocb_list(phba); | |
11078 | out_unset_driver_resource_s3: | |
11079 | lpfc_sli_driver_resource_unset(phba); | |
11080 | out_unset_pci_mem_s3: | |
11081 | lpfc_sli_pci_mem_unset(phba); | |
11082 | out_disable_pci_dev: | |
11083 | lpfc_disable_pci_dev(phba); | |
6669f9bb JS |
11084 | if (shost) |
11085 | scsi_host_put(shost); | |
da0436e9 JS |
11086 | out_free_phba: |
11087 | lpfc_hba_free(phba); | |
11088 | return error; | |
11089 | } | |
11090 | ||
11091 | /** | |
11092 | * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem. | |
11093 | * @pdev: pointer to PCI device | |
11094 | * | |
11095 | * This routine is to be called to disattach a device with SLI-3 interface | |
11096 | * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is | |
11097 | * removed from PCI bus, it performs all the necessary cleanup for the HBA | |
11098 | * device to be removed from the PCI subsystem properly. | |
11099 | **/ | |
6f039790 | 11100 | static void |
da0436e9 JS |
11101 | lpfc_pci_remove_one_s3(struct pci_dev *pdev) |
11102 | { | |
11103 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
11104 | struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; | |
11105 | struct lpfc_vport **vports; | |
11106 | struct lpfc_hba *phba = vport->phba; | |
11107 | int i; | |
da0436e9 JS |
11108 | |
11109 | spin_lock_irq(&phba->hbalock); | |
11110 | vport->load_flag |= FC_UNLOADING; | |
11111 | spin_unlock_irq(&phba->hbalock); | |
11112 | ||
11113 | lpfc_free_sysfs_attr(vport); | |
11114 | ||
11115 | /* Release all the vports against this physical port */ | |
11116 | vports = lpfc_create_vport_work_array(phba); | |
11117 | if (vports != NULL) | |
587a37f6 JS |
11118 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { |
11119 | if (vports[i]->port_type == LPFC_PHYSICAL_PORT) | |
11120 | continue; | |
da0436e9 | 11121 | fc_vport_terminate(vports[i]->fc_vport); |
587a37f6 | 11122 | } |
da0436e9 JS |
11123 | lpfc_destroy_vport_work_array(phba, vports); |
11124 | ||
11125 | /* Remove FC host and then SCSI host with the physical port */ | |
11126 | fc_remove_host(shost); | |
11127 | scsi_remove_host(shost); | |
d613b6a7 | 11128 | |
da0436e9 JS |
11129 | lpfc_cleanup(vport); |
11130 | ||
11131 | /* | |
11132 | * Bring down the SLI Layer. This step disable all interrupts, | |
11133 | * clears the rings, discards all mailbox commands, and resets | |
11134 | * the HBA. | |
11135 | */ | |
11136 | ||
48e34d0f | 11137 | /* HBA interrupt will be disabled after this call */ |
da0436e9 JS |
11138 | lpfc_sli_hba_down(phba); |
11139 | /* Stop kthread signal shall trigger work_done one more time */ | |
11140 | kthread_stop(phba->worker_thread); | |
11141 | /* Final cleanup of txcmplq and reset the HBA */ | |
11142 | lpfc_sli_brdrestart(phba); | |
11143 | ||
72859909 JS |
11144 | kfree(phba->vpi_bmask); |
11145 | kfree(phba->vpi_ids); | |
11146 | ||
da0436e9 | 11147 | lpfc_stop_hba_timers(phba); |
523128e5 | 11148 | spin_lock_irq(&phba->port_list_lock); |
da0436e9 | 11149 | list_del_init(&vport->listentry); |
523128e5 | 11150 | spin_unlock_irq(&phba->port_list_lock); |
da0436e9 JS |
11151 | |
11152 | lpfc_debugfs_terminate(vport); | |
11153 | ||
912e3acd JS |
11154 | /* Disable SR-IOV if enabled */ |
11155 | if (phba->cfg_sriov_nr_virtfn) | |
11156 | pci_disable_sriov(pdev); | |
11157 | ||
da0436e9 JS |
11158 | /* Disable interrupt */ |
11159 | lpfc_sli_disable_intr(phba); | |
11160 | ||
da0436e9 JS |
11161 | scsi_host_put(shost); |
11162 | ||
11163 | /* | |
11164 | * Call scsi_free before mem_free since scsi bufs are released to their | |
11165 | * corresponding pools here. | |
11166 | */ | |
11167 | lpfc_scsi_free(phba); | |
0794d601 JS |
11168 | lpfc_free_iocb_list(phba); |
11169 | ||
da0436e9 JS |
11170 | lpfc_mem_free_all(phba); |
11171 | ||
11172 | dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(), | |
11173 | phba->hbqslimp.virt, phba->hbqslimp.phys); | |
11174 | ||
11175 | /* Free resources associated with SLI2 interface */ | |
11176 | dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, | |
11177 | phba->slim2p.virt, phba->slim2p.phys); | |
11178 | ||
11179 | /* unmap adapter SLIM and Control Registers */ | |
11180 | iounmap(phba->ctrl_regs_memmap_p); | |
11181 | iounmap(phba->slim_memmap_p); | |
11182 | ||
11183 | lpfc_hba_free(phba); | |
11184 | ||
e0c0483c | 11185 | pci_release_mem_regions(pdev); |
da0436e9 JS |
11186 | pci_disable_device(pdev); |
11187 | } | |
11188 | ||
11189 | /** | |
11190 | * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt | |
11191 | * @pdev: pointer to PCI device | |
11192 | * @msg: power management message | |
11193 | * | |
11194 | * This routine is to be called from the kernel's PCI subsystem to support | |
11195 | * system Power Management (PM) to device with SLI-3 interface spec. When | |
11196 | * PM invokes this method, it quiesces the device by stopping the driver's | |
11197 | * worker thread for the device, turning off device's interrupt and DMA, | |
11198 | * and bring the device offline. Note that as the driver implements the | |
11199 | * minimum PM requirements to a power-aware driver's PM support for the | |
11200 | * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE) | |
11201 | * to the suspend() method call will be treated as SUSPEND and the driver will | |
11202 | * fully reinitialize its device during resume() method call, the driver will | |
11203 | * set device to PCI_D3hot state in PCI config space instead of setting it | |
11204 | * according to the @msg provided by the PM. | |
11205 | * | |
11206 | * Return code | |
11207 | * 0 - driver suspended the device | |
11208 | * Error otherwise | |
11209 | **/ | |
11210 | static int | |
11211 | lpfc_pci_suspend_one_s3(struct pci_dev *pdev, pm_message_t msg) | |
11212 | { | |
11213 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
11214 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
11215 | ||
11216 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
11217 | "0473 PCI device Power Management suspend.\n"); | |
11218 | ||
11219 | /* Bring down the device */ | |
618a5230 | 11220 | lpfc_offline_prep(phba, LPFC_MBX_WAIT); |
da0436e9 JS |
11221 | lpfc_offline(phba); |
11222 | kthread_stop(phba->worker_thread); | |
11223 | ||
11224 | /* Disable interrupt from device */ | |
11225 | lpfc_sli_disable_intr(phba); | |
11226 | ||
11227 | /* Save device state to PCI config space */ | |
11228 | pci_save_state(pdev); | |
11229 | pci_set_power_state(pdev, PCI_D3hot); | |
11230 | ||
11231 | return 0; | |
11232 | } | |
11233 | ||
11234 | /** | |
11235 | * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt | |
11236 | * @pdev: pointer to PCI device | |
11237 | * | |
11238 | * This routine is to be called from the kernel's PCI subsystem to support | |
11239 | * system Power Management (PM) to device with SLI-3 interface spec. When PM | |
11240 | * invokes this method, it restores the device's PCI config space state and | |
11241 | * fully reinitializes the device and brings it online. Note that as the | |
11242 | * driver implements the minimum PM requirements to a power-aware driver's | |
11243 | * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, | |
11244 | * FREEZE) to the suspend() method call will be treated as SUSPEND and the | |
11245 | * driver will fully reinitialize its device during resume() method call, | |
11246 | * the device will be set to PCI_D0 directly in PCI config space before | |
11247 | * restoring the state. | |
11248 | * | |
11249 | * Return code | |
11250 | * 0 - driver suspended the device | |
11251 | * Error otherwise | |
11252 | **/ | |
11253 | static int | |
11254 | lpfc_pci_resume_one_s3(struct pci_dev *pdev) | |
11255 | { | |
11256 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
11257 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
11258 | uint32_t intr_mode; | |
11259 | int error; | |
11260 | ||
11261 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
11262 | "0452 PCI device Power Management resume.\n"); | |
11263 | ||
11264 | /* Restore device state from PCI config space */ | |
11265 | pci_set_power_state(pdev, PCI_D0); | |
11266 | pci_restore_state(pdev); | |
0d878419 | 11267 | |
1dfb5a47 JS |
11268 | /* |
11269 | * As the new kernel behavior of pci_restore_state() API call clears | |
11270 | * device saved_state flag, need to save the restored state again. | |
11271 | */ | |
11272 | pci_save_state(pdev); | |
11273 | ||
da0436e9 JS |
11274 | if (pdev->is_busmaster) |
11275 | pci_set_master(pdev); | |
11276 | ||
11277 | /* Startup the kernel thread for this host adapter. */ | |
11278 | phba->worker_thread = kthread_run(lpfc_do_work, phba, | |
11279 | "lpfc_worker_%d", phba->brd_no); | |
11280 | if (IS_ERR(phba->worker_thread)) { | |
11281 | error = PTR_ERR(phba->worker_thread); | |
11282 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11283 | "0434 PM resume failed to start worker " | |
11284 | "thread: error=x%x.\n", error); | |
11285 | return error; | |
11286 | } | |
11287 | ||
11288 | /* Configure and enable interrupt */ | |
11289 | intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode); | |
11290 | if (intr_mode == LPFC_INTR_ERROR) { | |
11291 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11292 | "0430 PM resume Failed to enable interrupt\n"); | |
11293 | return -EIO; | |
11294 | } else | |
11295 | phba->intr_mode = intr_mode; | |
11296 | ||
11297 | /* Restart HBA and bring it online */ | |
11298 | lpfc_sli_brdrestart(phba); | |
11299 | lpfc_online(phba); | |
11300 | ||
11301 | /* Log the current active interrupt mode */ | |
11302 | lpfc_log_intr_mode(phba, phba->intr_mode); | |
11303 | ||
11304 | return 0; | |
11305 | } | |
11306 | ||
891478a2 JS |
11307 | /** |
11308 | * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover | |
11309 | * @phba: pointer to lpfc hba data structure. | |
11310 | * | |
11311 | * This routine is called to prepare the SLI3 device for PCI slot recover. It | |
e2af0d2e | 11312 | * aborts all the outstanding SCSI I/Os to the pci device. |
891478a2 JS |
11313 | **/ |
11314 | static void | |
11315 | lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba) | |
11316 | { | |
11317 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11318 | "2723 PCI channel I/O abort preparing for recovery\n"); | |
e2af0d2e JS |
11319 | |
11320 | /* | |
11321 | * There may be errored I/Os through HBA, abort all I/Os on txcmplq | |
11322 | * and let the SCSI mid-layer to retry them to recover. | |
11323 | */ | |
db55fba8 | 11324 | lpfc_sli_abort_fcp_rings(phba); |
891478a2 JS |
11325 | } |
11326 | ||
0d878419 JS |
11327 | /** |
11328 | * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset | |
11329 | * @phba: pointer to lpfc hba data structure. | |
11330 | * | |
11331 | * This routine is called to prepare the SLI3 device for PCI slot reset. It | |
11332 | * disables the device interrupt and pci device, and aborts the internal FCP | |
11333 | * pending I/Os. | |
11334 | **/ | |
11335 | static void | |
11336 | lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba) | |
11337 | { | |
0d878419 | 11338 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
891478a2 | 11339 | "2710 PCI channel disable preparing for reset\n"); |
e2af0d2e | 11340 | |
75baf696 | 11341 | /* Block any management I/Os to the device */ |
618a5230 | 11342 | lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT); |
75baf696 | 11343 | |
e2af0d2e JS |
11344 | /* Block all SCSI devices' I/Os on the host */ |
11345 | lpfc_scsi_dev_block(phba); | |
11346 | ||
ea714f3d JS |
11347 | /* Flush all driver's outstanding SCSI I/Os as we are to reset */ |
11348 | lpfc_sli_flush_fcp_rings(phba); | |
11349 | ||
e2af0d2e JS |
11350 | /* stop all timers */ |
11351 | lpfc_stop_hba_timers(phba); | |
11352 | ||
0d878419 JS |
11353 | /* Disable interrupt and pci device */ |
11354 | lpfc_sli_disable_intr(phba); | |
11355 | pci_disable_device(phba->pcidev); | |
0d878419 JS |
11356 | } |
11357 | ||
11358 | /** | |
11359 | * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable | |
11360 | * @phba: pointer to lpfc hba data structure. | |
11361 | * | |
11362 | * This routine is called to prepare the SLI3 device for PCI slot permanently | |
11363 | * disabling. It blocks the SCSI transport layer traffic and flushes the FCP | |
11364 | * pending I/Os. | |
11365 | **/ | |
11366 | static void | |
75baf696 | 11367 | lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba) |
0d878419 JS |
11368 | { |
11369 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
891478a2 | 11370 | "2711 PCI channel permanent disable for failure\n"); |
e2af0d2e JS |
11371 | /* Block all SCSI devices' I/Os on the host */ |
11372 | lpfc_scsi_dev_block(phba); | |
11373 | ||
11374 | /* stop all timers */ | |
11375 | lpfc_stop_hba_timers(phba); | |
11376 | ||
0d878419 JS |
11377 | /* Clean up all driver's outstanding SCSI I/Os */ |
11378 | lpfc_sli_flush_fcp_rings(phba); | |
11379 | } | |
11380 | ||
da0436e9 JS |
11381 | /** |
11382 | * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error | |
11383 | * @pdev: pointer to PCI device. | |
11384 | * @state: the current PCI connection state. | |
11385 | * | |
11386 | * This routine is called from the PCI subsystem for I/O error handling to | |
11387 | * device with SLI-3 interface spec. This function is called by the PCI | |
11388 | * subsystem after a PCI bus error affecting this device has been detected. | |
11389 | * When this function is invoked, it will need to stop all the I/Os and | |
11390 | * interrupt(s) to the device. Once that is done, it will return | |
11391 | * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery | |
11392 | * as desired. | |
11393 | * | |
11394 | * Return codes | |
0d878419 | 11395 | * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link |
da0436e9 JS |
11396 | * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery |
11397 | * PCI_ERS_RESULT_DISCONNECT - device could not be recovered | |
11398 | **/ | |
11399 | static pci_ers_result_t | |
11400 | lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state) | |
11401 | { | |
11402 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
11403 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
da0436e9 | 11404 | |
0d878419 JS |
11405 | switch (state) { |
11406 | case pci_channel_io_normal: | |
891478a2 JS |
11407 | /* Non-fatal error, prepare for recovery */ |
11408 | lpfc_sli_prep_dev_for_recover(phba); | |
0d878419 JS |
11409 | return PCI_ERS_RESULT_CAN_RECOVER; |
11410 | case pci_channel_io_frozen: | |
11411 | /* Fatal error, prepare for slot reset */ | |
11412 | lpfc_sli_prep_dev_for_reset(phba); | |
11413 | return PCI_ERS_RESULT_NEED_RESET; | |
11414 | case pci_channel_io_perm_failure: | |
11415 | /* Permanent failure, prepare for device down */ | |
75baf696 | 11416 | lpfc_sli_prep_dev_for_perm_failure(phba); |
da0436e9 | 11417 | return PCI_ERS_RESULT_DISCONNECT; |
0d878419 JS |
11418 | default: |
11419 | /* Unknown state, prepare and request slot reset */ | |
11420 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11421 | "0472 Unknown PCI error state: x%x\n", state); | |
11422 | lpfc_sli_prep_dev_for_reset(phba); | |
11423 | return PCI_ERS_RESULT_NEED_RESET; | |
da0436e9 | 11424 | } |
da0436e9 JS |
11425 | } |
11426 | ||
11427 | /** | |
11428 | * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch. | |
11429 | * @pdev: pointer to PCI device. | |
11430 | * | |
11431 | * This routine is called from the PCI subsystem for error handling to | |
11432 | * device with SLI-3 interface spec. This is called after PCI bus has been | |
11433 | * reset to restart the PCI card from scratch, as if from a cold-boot. | |
11434 | * During the PCI subsystem error recovery, after driver returns | |
11435 | * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error | |
11436 | * recovery and then call this routine before calling the .resume method | |
11437 | * to recover the device. This function will initialize the HBA device, | |
11438 | * enable the interrupt, but it will just put the HBA to offline state | |
11439 | * without passing any I/O traffic. | |
11440 | * | |
11441 | * Return codes | |
11442 | * PCI_ERS_RESULT_RECOVERED - the device has been recovered | |
11443 | * PCI_ERS_RESULT_DISCONNECT - device could not be recovered | |
11444 | */ | |
11445 | static pci_ers_result_t | |
11446 | lpfc_io_slot_reset_s3(struct pci_dev *pdev) | |
11447 | { | |
11448 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
11449 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
11450 | struct lpfc_sli *psli = &phba->sli; | |
11451 | uint32_t intr_mode; | |
11452 | ||
11453 | dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n"); | |
11454 | if (pci_enable_device_mem(pdev)) { | |
11455 | printk(KERN_ERR "lpfc: Cannot re-enable " | |
11456 | "PCI device after reset.\n"); | |
11457 | return PCI_ERS_RESULT_DISCONNECT; | |
11458 | } | |
11459 | ||
11460 | pci_restore_state(pdev); | |
1dfb5a47 JS |
11461 | |
11462 | /* | |
11463 | * As the new kernel behavior of pci_restore_state() API call clears | |
11464 | * device saved_state flag, need to save the restored state again. | |
11465 | */ | |
11466 | pci_save_state(pdev); | |
11467 | ||
da0436e9 JS |
11468 | if (pdev->is_busmaster) |
11469 | pci_set_master(pdev); | |
11470 | ||
11471 | spin_lock_irq(&phba->hbalock); | |
11472 | psli->sli_flag &= ~LPFC_SLI_ACTIVE; | |
11473 | spin_unlock_irq(&phba->hbalock); | |
11474 | ||
11475 | /* Configure and enable interrupt */ | |
11476 | intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode); | |
11477 | if (intr_mode == LPFC_INTR_ERROR) { | |
11478 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11479 | "0427 Cannot re-enable interrupt after " | |
11480 | "slot reset.\n"); | |
11481 | return PCI_ERS_RESULT_DISCONNECT; | |
11482 | } else | |
11483 | phba->intr_mode = intr_mode; | |
11484 | ||
75baf696 | 11485 | /* Take device offline, it will perform cleanup */ |
618a5230 | 11486 | lpfc_offline_prep(phba, LPFC_MBX_WAIT); |
da0436e9 JS |
11487 | lpfc_offline(phba); |
11488 | lpfc_sli_brdrestart(phba); | |
11489 | ||
11490 | /* Log the current active interrupt mode */ | |
11491 | lpfc_log_intr_mode(phba, phba->intr_mode); | |
11492 | ||
11493 | return PCI_ERS_RESULT_RECOVERED; | |
11494 | } | |
11495 | ||
11496 | /** | |
11497 | * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device. | |
11498 | * @pdev: pointer to PCI device | |
11499 | * | |
11500 | * This routine is called from the PCI subsystem for error handling to device | |
11501 | * with SLI-3 interface spec. It is called when kernel error recovery tells | |
11502 | * the lpfc driver that it is ok to resume normal PCI operation after PCI bus | |
11503 | * error recovery. After this call, traffic can start to flow from this device | |
11504 | * again. | |
11505 | */ | |
11506 | static void | |
11507 | lpfc_io_resume_s3(struct pci_dev *pdev) | |
11508 | { | |
11509 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
11510 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
3772a991 | 11511 | |
e2af0d2e | 11512 | /* Bring device online, it will be no-op for non-fatal error resume */ |
da0436e9 JS |
11513 | lpfc_online(phba); |
11514 | } | |
3772a991 | 11515 | |
da0436e9 JS |
11516 | /** |
11517 | * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve | |
11518 | * @phba: pointer to lpfc hba data structure. | |
11519 | * | |
11520 | * returns the number of ELS/CT IOCBs to reserve | |
11521 | **/ | |
11522 | int | |
11523 | lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba) | |
11524 | { | |
11525 | int max_xri = phba->sli4_hba.max_cfg_param.max_xri; | |
11526 | ||
f1126688 JS |
11527 | if (phba->sli_rev == LPFC_SLI_REV4) { |
11528 | if (max_xri <= 100) | |
6a9c52cf | 11529 | return 10; |
f1126688 | 11530 | else if (max_xri <= 256) |
6a9c52cf | 11531 | return 25; |
f1126688 | 11532 | else if (max_xri <= 512) |
6a9c52cf | 11533 | return 50; |
f1126688 | 11534 | else if (max_xri <= 1024) |
6a9c52cf | 11535 | return 100; |
8a9d2e80 | 11536 | else if (max_xri <= 1536) |
6a9c52cf | 11537 | return 150; |
8a9d2e80 JS |
11538 | else if (max_xri <= 2048) |
11539 | return 200; | |
11540 | else | |
11541 | return 250; | |
f1126688 JS |
11542 | } else |
11543 | return 0; | |
3772a991 JS |
11544 | } |
11545 | ||
895427bd JS |
11546 | /** |
11547 | * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve | |
11548 | * @phba: pointer to lpfc hba data structure. | |
11549 | * | |
f358dd0c | 11550 | * returns the number of ELS/CT + NVMET IOCBs to reserve |
895427bd JS |
11551 | **/ |
11552 | int | |
11553 | lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba) | |
11554 | { | |
11555 | int max_xri = lpfc_sli4_get_els_iocb_cnt(phba); | |
11556 | ||
f358dd0c JS |
11557 | if (phba->nvmet_support) |
11558 | max_xri += LPFC_NVMET_BUF_POST; | |
895427bd JS |
11559 | return max_xri; |
11560 | } | |
11561 | ||
11562 | ||
1feb8204 JS |
11563 | static void |
11564 | lpfc_log_write_firmware_error(struct lpfc_hba *phba, uint32_t offset, | |
11565 | uint32_t magic_number, uint32_t ftype, uint32_t fid, uint32_t fsize, | |
11566 | const struct firmware *fw) | |
11567 | { | |
a72d56b2 JS |
11568 | if ((offset == ADD_STATUS_FW_NOT_SUPPORTED) || |
11569 | (phba->pcidev->device == PCI_DEVICE_ID_LANCER_G6_FC && | |
11570 | magic_number != MAGIC_NUMER_G6) || | |
11571 | (phba->pcidev->device == PCI_DEVICE_ID_LANCER_G7_FC && | |
11572 | magic_number != MAGIC_NUMER_G7)) | |
1feb8204 JS |
11573 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
11574 | "3030 This firmware version is not supported on " | |
11575 | "this HBA model. Device:%x Magic:%x Type:%x " | |
11576 | "ID:%x Size %d %zd\n", | |
11577 | phba->pcidev->device, magic_number, ftype, fid, | |
11578 | fsize, fw->size); | |
11579 | else | |
11580 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11581 | "3022 FW Download failed. Device:%x Magic:%x Type:%x " | |
11582 | "ID:%x Size %d %zd\n", | |
11583 | phba->pcidev->device, magic_number, ftype, fid, | |
11584 | fsize, fw->size); | |
11585 | } | |
11586 | ||
11587 | ||
52d52440 JS |
11588 | /** |
11589 | * lpfc_write_firmware - attempt to write a firmware image to the port | |
52d52440 | 11590 | * @fw: pointer to firmware image returned from request_firmware. |
ce396282 | 11591 | * @phba: pointer to lpfc hba data structure. |
52d52440 | 11592 | * |
52d52440 | 11593 | **/ |
ce396282 JS |
11594 | static void |
11595 | lpfc_write_firmware(const struct firmware *fw, void *context) | |
52d52440 | 11596 | { |
ce396282 | 11597 | struct lpfc_hba *phba = (struct lpfc_hba *)context; |
6b5151fd | 11598 | char fwrev[FW_REV_STR_SIZE]; |
ce396282 | 11599 | struct lpfc_grp_hdr *image; |
52d52440 JS |
11600 | struct list_head dma_buffer_list; |
11601 | int i, rc = 0; | |
11602 | struct lpfc_dmabuf *dmabuf, *next; | |
11603 | uint32_t offset = 0, temp_offset = 0; | |
6b6ef5db | 11604 | uint32_t magic_number, ftype, fid, fsize; |
52d52440 | 11605 | |
c71ab861 | 11606 | /* It can be null in no-wait mode, sanity check */ |
ce396282 JS |
11607 | if (!fw) { |
11608 | rc = -ENXIO; | |
11609 | goto out; | |
11610 | } | |
11611 | image = (struct lpfc_grp_hdr *)fw->data; | |
11612 | ||
6b6ef5db JS |
11613 | magic_number = be32_to_cpu(image->magic_number); |
11614 | ftype = bf_get_be32(lpfc_grp_hdr_file_type, image); | |
1feb8204 | 11615 | fid = bf_get_be32(lpfc_grp_hdr_id, image); |
6b6ef5db JS |
11616 | fsize = be32_to_cpu(image->size); |
11617 | ||
52d52440 | 11618 | INIT_LIST_HEAD(&dma_buffer_list); |
52d52440 | 11619 | lpfc_decode_firmware_rev(phba, fwrev, 1); |
88a2cfbb | 11620 | if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) { |
52d52440 | 11621 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
ce396282 | 11622 | "3023 Updating Firmware, Current Version:%s " |
52d52440 | 11623 | "New Version:%s\n", |
88a2cfbb | 11624 | fwrev, image->revision); |
52d52440 JS |
11625 | for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) { |
11626 | dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), | |
11627 | GFP_KERNEL); | |
11628 | if (!dmabuf) { | |
11629 | rc = -ENOMEM; | |
ce396282 | 11630 | goto release_out; |
52d52440 JS |
11631 | } |
11632 | dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, | |
11633 | SLI4_PAGE_SIZE, | |
11634 | &dmabuf->phys, | |
11635 | GFP_KERNEL); | |
11636 | if (!dmabuf->virt) { | |
11637 | kfree(dmabuf); | |
11638 | rc = -ENOMEM; | |
ce396282 | 11639 | goto release_out; |
52d52440 JS |
11640 | } |
11641 | list_add_tail(&dmabuf->list, &dma_buffer_list); | |
11642 | } | |
11643 | while (offset < fw->size) { | |
11644 | temp_offset = offset; | |
11645 | list_for_each_entry(dmabuf, &dma_buffer_list, list) { | |
079b5c91 | 11646 | if (temp_offset + SLI4_PAGE_SIZE > fw->size) { |
52d52440 JS |
11647 | memcpy(dmabuf->virt, |
11648 | fw->data + temp_offset, | |
079b5c91 JS |
11649 | fw->size - temp_offset); |
11650 | temp_offset = fw->size; | |
52d52440 JS |
11651 | break; |
11652 | } | |
52d52440 JS |
11653 | memcpy(dmabuf->virt, fw->data + temp_offset, |
11654 | SLI4_PAGE_SIZE); | |
88a2cfbb | 11655 | temp_offset += SLI4_PAGE_SIZE; |
52d52440 JS |
11656 | } |
11657 | rc = lpfc_wr_object(phba, &dma_buffer_list, | |
11658 | (fw->size - offset), &offset); | |
1feb8204 JS |
11659 | if (rc) { |
11660 | lpfc_log_write_firmware_error(phba, offset, | |
11661 | magic_number, ftype, fid, fsize, fw); | |
ce396282 | 11662 | goto release_out; |
1feb8204 | 11663 | } |
52d52440 JS |
11664 | } |
11665 | rc = offset; | |
1feb8204 JS |
11666 | } else |
11667 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11668 | "3029 Skipped Firmware update, Current " | |
11669 | "Version:%s New Version:%s\n", | |
11670 | fwrev, image->revision); | |
ce396282 JS |
11671 | |
11672 | release_out: | |
52d52440 JS |
11673 | list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) { |
11674 | list_del(&dmabuf->list); | |
11675 | dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE, | |
11676 | dmabuf->virt, dmabuf->phys); | |
11677 | kfree(dmabuf); | |
11678 | } | |
ce396282 JS |
11679 | release_firmware(fw); |
11680 | out: | |
11681 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
c71ab861 | 11682 | "3024 Firmware update done: %d.\n", rc); |
ce396282 | 11683 | return; |
52d52440 JS |
11684 | } |
11685 | ||
c71ab861 JS |
11686 | /** |
11687 | * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade | |
11688 | * @phba: pointer to lpfc hba data structure. | |
11689 | * | |
11690 | * This routine is called to perform Linux generic firmware upgrade on device | |
11691 | * that supports such feature. | |
11692 | **/ | |
11693 | int | |
11694 | lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade) | |
11695 | { | |
11696 | uint8_t file_name[ELX_MODEL_NAME_SIZE]; | |
11697 | int ret; | |
11698 | const struct firmware *fw; | |
11699 | ||
11700 | /* Only supported on SLI4 interface type 2 for now */ | |
27d6ac0a | 11701 | if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) < |
c71ab861 JS |
11702 | LPFC_SLI_INTF_IF_TYPE_2) |
11703 | return -EPERM; | |
11704 | ||
11705 | snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName); | |
11706 | ||
11707 | if (fw_upgrade == INT_FW_UPGRADE) { | |
11708 | ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG, | |
11709 | file_name, &phba->pcidev->dev, | |
11710 | GFP_KERNEL, (void *)phba, | |
11711 | lpfc_write_firmware); | |
11712 | } else if (fw_upgrade == RUN_FW_UPGRADE) { | |
11713 | ret = request_firmware(&fw, file_name, &phba->pcidev->dev); | |
11714 | if (!ret) | |
11715 | lpfc_write_firmware(fw, (void *)phba); | |
11716 | } else { | |
11717 | ret = -EINVAL; | |
11718 | } | |
11719 | ||
11720 | return ret; | |
11721 | } | |
11722 | ||
3772a991 | 11723 | /** |
da0436e9 | 11724 | * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys |
3772a991 JS |
11725 | * @pdev: pointer to PCI device |
11726 | * @pid: pointer to PCI device identifier | |
11727 | * | |
da0436e9 JS |
11728 | * This routine is called from the kernel's PCI subsystem to device with |
11729 | * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is | |
3772a991 | 11730 | * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific |
da0436e9 JS |
11731 | * information of the device and driver to see if the driver state that it |
11732 | * can support this kind of device. If the match is successful, the driver | |
11733 | * core invokes this routine. If this routine determines it can claim the HBA, | |
11734 | * it does all the initialization that it needs to do to handle the HBA | |
11735 | * properly. | |
3772a991 JS |
11736 | * |
11737 | * Return code | |
11738 | * 0 - driver can claim the device | |
11739 | * negative value - driver can not claim the device | |
11740 | **/ | |
6f039790 | 11741 | static int |
da0436e9 | 11742 | lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid) |
3772a991 JS |
11743 | { |
11744 | struct lpfc_hba *phba; | |
11745 | struct lpfc_vport *vport = NULL; | |
6669f9bb | 11746 | struct Scsi_Host *shost = NULL; |
0794d601 | 11747 | int error, len; |
3772a991 JS |
11748 | uint32_t cfg_mode, intr_mode; |
11749 | ||
11750 | /* Allocate memory for HBA structure */ | |
11751 | phba = lpfc_hba_alloc(pdev); | |
11752 | if (!phba) | |
11753 | return -ENOMEM; | |
11754 | ||
11755 | /* Perform generic PCI device enabling operation */ | |
11756 | error = lpfc_enable_pci_dev(phba); | |
079b5c91 | 11757 | if (error) |
3772a991 | 11758 | goto out_free_phba; |
3772a991 | 11759 | |
da0436e9 JS |
11760 | /* Set up SLI API function jump table for PCI-device group-1 HBAs */ |
11761 | error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC); | |
3772a991 JS |
11762 | if (error) |
11763 | goto out_disable_pci_dev; | |
11764 | ||
da0436e9 JS |
11765 | /* Set up SLI-4 specific device PCI memory space */ |
11766 | error = lpfc_sli4_pci_mem_setup(phba); | |
3772a991 JS |
11767 | if (error) { |
11768 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
da0436e9 | 11769 | "1410 Failed to set up pci memory space.\n"); |
3772a991 JS |
11770 | goto out_disable_pci_dev; |
11771 | } | |
11772 | ||
da0436e9 JS |
11773 | /* Set up SLI-4 Specific device driver resources */ |
11774 | error = lpfc_sli4_driver_resource_setup(phba); | |
3772a991 JS |
11775 | if (error) { |
11776 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
da0436e9 JS |
11777 | "1412 Failed to set up driver resource.\n"); |
11778 | goto out_unset_pci_mem_s4; | |
3772a991 JS |
11779 | } |
11780 | ||
19ca7609 | 11781 | INIT_LIST_HEAD(&phba->active_rrq_list); |
7d791df7 | 11782 | INIT_LIST_HEAD(&phba->fcf.fcf_pri_list); |
19ca7609 | 11783 | |
3772a991 JS |
11784 | /* Set up common device driver resources */ |
11785 | error = lpfc_setup_driver_resource_phase2(phba); | |
11786 | if (error) { | |
11787 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
da0436e9 | 11788 | "1414 Failed to set up driver resource.\n"); |
6c621a22 | 11789 | goto out_unset_driver_resource_s4; |
3772a991 JS |
11790 | } |
11791 | ||
079b5c91 JS |
11792 | /* Get the default values for Model Name and Description */ |
11793 | lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); | |
11794 | ||
3772a991 JS |
11795 | /* Create SCSI host to the physical port */ |
11796 | error = lpfc_create_shost(phba); | |
11797 | if (error) { | |
11798 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
da0436e9 | 11799 | "1415 Failed to create scsi host.\n"); |
3772a991 JS |
11800 | goto out_unset_driver_resource; |
11801 | } | |
9399627f | 11802 | |
5b75da2f | 11803 | /* Configure sysfs attributes */ |
3772a991 JS |
11804 | vport = phba->pport; |
11805 | error = lpfc_alloc_sysfs_attr(vport); | |
11806 | if (error) { | |
9399627f | 11807 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
da0436e9 | 11808 | "1416 Failed to allocate sysfs attr\n"); |
3772a991 | 11809 | goto out_destroy_shost; |
98c9ea5c | 11810 | } |
875fbdfe | 11811 | |
6669f9bb | 11812 | shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */ |
3772a991 | 11813 | /* Now, trying to enable interrupt and bring up the device */ |
5b75da2f | 11814 | cfg_mode = phba->cfg_use_msi; |
5b75da2f | 11815 | |
7b15db32 JS |
11816 | /* Put device to a known state before enabling interrupt */ |
11817 | lpfc_stop_port(phba); | |
895427bd | 11818 | |
7b15db32 JS |
11819 | /* Configure and enable interrupt */ |
11820 | intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode); | |
11821 | if (intr_mode == LPFC_INTR_ERROR) { | |
11822 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11823 | "0426 Failed to enable interrupt.\n"); | |
11824 | error = -ENODEV; | |
11825 | goto out_free_sysfs_attr; | |
11826 | } | |
11827 | /* Default to single EQ for non-MSI-X */ | |
895427bd JS |
11828 | if (phba->intr_type != MSIX) { |
11829 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) | |
11830 | phba->cfg_fcp_io_channel = 1; | |
2d7dbc4c | 11831 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { |
895427bd | 11832 | phba->cfg_nvme_io_channel = 1; |
2d7dbc4c JS |
11833 | if (phba->nvmet_support) |
11834 | phba->cfg_nvmet_mrq = 1; | |
11835 | } | |
895427bd JS |
11836 | phba->io_channel_irqs = 1; |
11837 | } | |
11838 | ||
7b15db32 JS |
11839 | /* Set up SLI-4 HBA */ |
11840 | if (lpfc_sli4_hba_setup(phba)) { | |
11841 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11842 | "1421 Failed to set up hba\n"); | |
11843 | error = -ENODEV; | |
11844 | goto out_disable_intr; | |
98c9ea5c | 11845 | } |
858c9f6c | 11846 | |
7b15db32 JS |
11847 | /* Log the current active interrupt mode */ |
11848 | phba->intr_mode = intr_mode; | |
11849 | lpfc_log_intr_mode(phba, intr_mode); | |
11850 | ||
3772a991 JS |
11851 | /* Perform post initialization setup */ |
11852 | lpfc_post_init_setup(phba); | |
dea3101e | 11853 | |
01649561 JS |
11854 | /* NVME support in FW earlier in the driver load corrects the |
11855 | * FC4 type making a check for nvme_support unnecessary. | |
11856 | */ | |
0794d601 JS |
11857 | if (phba->nvmet_support == 0) { |
11858 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
11859 | /* Create NVME binding with nvme_fc_transport. This | |
11860 | * ensures the vport is initialized. If the localport | |
11861 | * create fails, it should not unload the driver to | |
11862 | * support field issues. | |
11863 | */ | |
11864 | error = lpfc_nvme_create_localport(vport); | |
11865 | if (error) { | |
11866 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11867 | "6004 NVME registration " | |
11868 | "failed, error x%x\n", | |
11869 | error); | |
11870 | } | |
11871 | } | |
11872 | /* Don't post more new bufs if repost already recovered | |
11873 | * the nvme sgls. | |
01649561 | 11874 | */ |
0794d601 JS |
11875 | if (phba->sli4_hba.common_xri_cnt == 0) { |
11876 | len = lpfc_new_common_buf( | |
11877 | phba, phba->sli4_hba.common_xri_max); | |
11878 | if (len == 0) { | |
11879 | error = -ENOMEM; | |
11880 | goto out_disable_intr; | |
11881 | } | |
11882 | phba->total_common_bufs += len; | |
01649561 JS |
11883 | } |
11884 | } | |
895427bd | 11885 | |
c71ab861 JS |
11886 | /* check for firmware upgrade or downgrade */ |
11887 | if (phba->cfg_request_firmware_upgrade) | |
db6f1c2f | 11888 | lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE); |
52d52440 | 11889 | |
1c6834a7 JS |
11890 | /* Check if there are static vports to be created. */ |
11891 | lpfc_create_static_vport(phba); | |
d2cc9bcd JS |
11892 | |
11893 | /* Enable RAS FW log support */ | |
11894 | lpfc_sli4_ras_setup(phba); | |
11895 | ||
dea3101e | 11896 | return 0; |
11897 | ||
da0436e9 JS |
11898 | out_disable_intr: |
11899 | lpfc_sli4_disable_intr(phba); | |
5b75da2f JS |
11900 | out_free_sysfs_attr: |
11901 | lpfc_free_sysfs_attr(vport); | |
3772a991 JS |
11902 | out_destroy_shost: |
11903 | lpfc_destroy_shost(phba); | |
11904 | out_unset_driver_resource: | |
11905 | lpfc_unset_driver_resource_phase2(phba); | |
da0436e9 JS |
11906 | out_unset_driver_resource_s4: |
11907 | lpfc_sli4_driver_resource_unset(phba); | |
11908 | out_unset_pci_mem_s4: | |
11909 | lpfc_sli4_pci_mem_unset(phba); | |
3772a991 JS |
11910 | out_disable_pci_dev: |
11911 | lpfc_disable_pci_dev(phba); | |
6669f9bb JS |
11912 | if (shost) |
11913 | scsi_host_put(shost); | |
2e0fef85 | 11914 | out_free_phba: |
3772a991 | 11915 | lpfc_hba_free(phba); |
dea3101e | 11916 | return error; |
11917 | } | |
11918 | ||
e59058c4 | 11919 | /** |
da0436e9 | 11920 | * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem |
e59058c4 JS |
11921 | * @pdev: pointer to PCI device |
11922 | * | |
da0436e9 JS |
11923 | * This routine is called from the kernel's PCI subsystem to device with |
11924 | * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is | |
3772a991 JS |
11925 | * removed from PCI bus, it performs all the necessary cleanup for the HBA |
11926 | * device to be removed from the PCI subsystem properly. | |
e59058c4 | 11927 | **/ |
6f039790 | 11928 | static void |
da0436e9 | 11929 | lpfc_pci_remove_one_s4(struct pci_dev *pdev) |
dea3101e | 11930 | { |
da0436e9 | 11931 | struct Scsi_Host *shost = pci_get_drvdata(pdev); |
2e0fef85 | 11932 | struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; |
eada272d | 11933 | struct lpfc_vport **vports; |
da0436e9 | 11934 | struct lpfc_hba *phba = vport->phba; |
eada272d | 11935 | int i; |
8a4df120 | 11936 | |
da0436e9 | 11937 | /* Mark the device unloading flag */ |
549e55cd | 11938 | spin_lock_irq(&phba->hbalock); |
51ef4c26 | 11939 | vport->load_flag |= FC_UNLOADING; |
549e55cd | 11940 | spin_unlock_irq(&phba->hbalock); |
2e0fef85 | 11941 | |
da0436e9 | 11942 | /* Free the HBA sysfs attributes */ |
858c9f6c JS |
11943 | lpfc_free_sysfs_attr(vport); |
11944 | ||
eada272d JS |
11945 | /* Release all the vports against this physical port */ |
11946 | vports = lpfc_create_vport_work_array(phba); | |
11947 | if (vports != NULL) | |
587a37f6 JS |
11948 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { |
11949 | if (vports[i]->port_type == LPFC_PHYSICAL_PORT) | |
11950 | continue; | |
eada272d | 11951 | fc_vport_terminate(vports[i]->fc_vport); |
587a37f6 | 11952 | } |
eada272d JS |
11953 | lpfc_destroy_vport_work_array(phba, vports); |
11954 | ||
11955 | /* Remove FC host and then SCSI host with the physical port */ | |
858c9f6c JS |
11956 | fc_remove_host(shost); |
11957 | scsi_remove_host(shost); | |
da0436e9 | 11958 | |
d613b6a7 JS |
11959 | /* Perform ndlp cleanup on the physical port. The nvme and nvmet |
11960 | * localports are destroyed after to cleanup all transport memory. | |
895427bd | 11961 | */ |
87af33fe | 11962 | lpfc_cleanup(vport); |
d613b6a7 JS |
11963 | lpfc_nvmet_destroy_targetport(phba); |
11964 | lpfc_nvme_destroy_localport(vport); | |
87af33fe | 11965 | |
281d6190 JS |
11966 | /* |
11967 | * Bring down the SLI Layer. This step disables all interrupts, | |
11968 | * clears the rings, discards all mailbox commands, and resets | |
11969 | * the HBA FCoE function. | |
11970 | */ | |
11971 | lpfc_debugfs_terminate(vport); | |
11972 | lpfc_sli4_hba_unset(phba); | |
a257bf90 | 11973 | |
1901762f | 11974 | lpfc_stop_hba_timers(phba); |
523128e5 | 11975 | spin_lock_irq(&phba->port_list_lock); |
858c9f6c | 11976 | list_del_init(&vport->listentry); |
523128e5 | 11977 | spin_unlock_irq(&phba->port_list_lock); |
858c9f6c | 11978 | |
3677a3a7 | 11979 | /* Perform scsi free before driver resource_unset since scsi |
da0436e9 | 11980 | * buffers are released to their corresponding pools here. |
2e0fef85 | 11981 | */ |
0794d601 | 11982 | lpfc_common_free(phba); |
01649561 | 11983 | lpfc_free_iocb_list(phba); |
67d12733 | 11984 | |
0cdb84ec | 11985 | lpfc_unset_driver_resource_phase2(phba); |
da0436e9 | 11986 | lpfc_sli4_driver_resource_unset(phba); |
ed957684 | 11987 | |
da0436e9 JS |
11988 | /* Unmap adapter Control and Doorbell registers */ |
11989 | lpfc_sli4_pci_mem_unset(phba); | |
2e0fef85 | 11990 | |
da0436e9 JS |
11991 | /* Release PCI resources and disable device's PCI function */ |
11992 | scsi_host_put(shost); | |
11993 | lpfc_disable_pci_dev(phba); | |
2e0fef85 | 11994 | |
da0436e9 | 11995 | /* Finally, free the driver's device data structure */ |
3772a991 | 11996 | lpfc_hba_free(phba); |
2e0fef85 | 11997 | |
da0436e9 | 11998 | return; |
dea3101e | 11999 | } |
12000 | ||
3a55b532 | 12001 | /** |
da0436e9 | 12002 | * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt |
3a55b532 JS |
12003 | * @pdev: pointer to PCI device |
12004 | * @msg: power management message | |
12005 | * | |
da0436e9 JS |
12006 | * This routine is called from the kernel's PCI subsystem to support system |
12007 | * Power Management (PM) to device with SLI-4 interface spec. When PM invokes | |
12008 | * this method, it quiesces the device by stopping the driver's worker | |
12009 | * thread for the device, turning off device's interrupt and DMA, and bring | |
12010 | * the device offline. Note that as the driver implements the minimum PM | |
12011 | * requirements to a power-aware driver's PM support for suspend/resume -- all | |
12012 | * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend() | |
12013 | * method call will be treated as SUSPEND and the driver will fully | |
12014 | * reinitialize its device during resume() method call, the driver will set | |
12015 | * device to PCI_D3hot state in PCI config space instead of setting it | |
3772a991 | 12016 | * according to the @msg provided by the PM. |
3a55b532 JS |
12017 | * |
12018 | * Return code | |
3772a991 JS |
12019 | * 0 - driver suspended the device |
12020 | * Error otherwise | |
3a55b532 JS |
12021 | **/ |
12022 | static int | |
da0436e9 | 12023 | lpfc_pci_suspend_one_s4(struct pci_dev *pdev, pm_message_t msg) |
3a55b532 JS |
12024 | { |
12025 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
12026 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
12027 | ||
12028 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
75baf696 | 12029 | "2843 PCI device Power Management suspend.\n"); |
3a55b532 JS |
12030 | |
12031 | /* Bring down the device */ | |
618a5230 | 12032 | lpfc_offline_prep(phba, LPFC_MBX_WAIT); |
3a55b532 JS |
12033 | lpfc_offline(phba); |
12034 | kthread_stop(phba->worker_thread); | |
12035 | ||
12036 | /* Disable interrupt from device */ | |
da0436e9 | 12037 | lpfc_sli4_disable_intr(phba); |
5350d872 | 12038 | lpfc_sli4_queue_destroy(phba); |
3a55b532 JS |
12039 | |
12040 | /* Save device state to PCI config space */ | |
12041 | pci_save_state(pdev); | |
12042 | pci_set_power_state(pdev, PCI_D3hot); | |
12043 | ||
12044 | return 0; | |
12045 | } | |
12046 | ||
12047 | /** | |
da0436e9 | 12048 | * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt |
3a55b532 JS |
12049 | * @pdev: pointer to PCI device |
12050 | * | |
da0436e9 JS |
12051 | * This routine is called from the kernel's PCI subsystem to support system |
12052 | * Power Management (PM) to device with SLI-4 interface spac. When PM invokes | |
12053 | * this method, it restores the device's PCI config space state and fully | |
12054 | * reinitializes the device and brings it online. Note that as the driver | |
12055 | * implements the minimum PM requirements to a power-aware driver's PM for | |
12056 | * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE) | |
12057 | * to the suspend() method call will be treated as SUSPEND and the driver | |
12058 | * will fully reinitialize its device during resume() method call, the device | |
12059 | * will be set to PCI_D0 directly in PCI config space before restoring the | |
12060 | * state. | |
3a55b532 JS |
12061 | * |
12062 | * Return code | |
3772a991 JS |
12063 | * 0 - driver suspended the device |
12064 | * Error otherwise | |
3a55b532 JS |
12065 | **/ |
12066 | static int | |
da0436e9 | 12067 | lpfc_pci_resume_one_s4(struct pci_dev *pdev) |
3a55b532 JS |
12068 | { |
12069 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
12070 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
5b75da2f | 12071 | uint32_t intr_mode; |
3a55b532 JS |
12072 | int error; |
12073 | ||
12074 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
da0436e9 | 12075 | "0292 PCI device Power Management resume.\n"); |
3a55b532 JS |
12076 | |
12077 | /* Restore device state from PCI config space */ | |
12078 | pci_set_power_state(pdev, PCI_D0); | |
12079 | pci_restore_state(pdev); | |
1dfb5a47 JS |
12080 | |
12081 | /* | |
12082 | * As the new kernel behavior of pci_restore_state() API call clears | |
12083 | * device saved_state flag, need to save the restored state again. | |
12084 | */ | |
12085 | pci_save_state(pdev); | |
12086 | ||
3a55b532 JS |
12087 | if (pdev->is_busmaster) |
12088 | pci_set_master(pdev); | |
12089 | ||
da0436e9 | 12090 | /* Startup the kernel thread for this host adapter. */ |
3a55b532 JS |
12091 | phba->worker_thread = kthread_run(lpfc_do_work, phba, |
12092 | "lpfc_worker_%d", phba->brd_no); | |
12093 | if (IS_ERR(phba->worker_thread)) { | |
12094 | error = PTR_ERR(phba->worker_thread); | |
12095 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
da0436e9 | 12096 | "0293 PM resume failed to start worker " |
3a55b532 JS |
12097 | "thread: error=x%x.\n", error); |
12098 | return error; | |
12099 | } | |
12100 | ||
5b75da2f | 12101 | /* Configure and enable interrupt */ |
da0436e9 | 12102 | intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); |
5b75da2f | 12103 | if (intr_mode == LPFC_INTR_ERROR) { |
3a55b532 | 12104 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
da0436e9 | 12105 | "0294 PM resume Failed to enable interrupt\n"); |
5b75da2f JS |
12106 | return -EIO; |
12107 | } else | |
12108 | phba->intr_mode = intr_mode; | |
3a55b532 JS |
12109 | |
12110 | /* Restart HBA and bring it online */ | |
12111 | lpfc_sli_brdrestart(phba); | |
12112 | lpfc_online(phba); | |
12113 | ||
5b75da2f JS |
12114 | /* Log the current active interrupt mode */ |
12115 | lpfc_log_intr_mode(phba, phba->intr_mode); | |
12116 | ||
3a55b532 JS |
12117 | return 0; |
12118 | } | |
12119 | ||
75baf696 JS |
12120 | /** |
12121 | * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover | |
12122 | * @phba: pointer to lpfc hba data structure. | |
12123 | * | |
12124 | * This routine is called to prepare the SLI4 device for PCI slot recover. It | |
12125 | * aborts all the outstanding SCSI I/Os to the pci device. | |
12126 | **/ | |
12127 | static void | |
12128 | lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba) | |
12129 | { | |
75baf696 JS |
12130 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
12131 | "2828 PCI channel I/O abort preparing for recovery\n"); | |
12132 | /* | |
12133 | * There may be errored I/Os through HBA, abort all I/Os on txcmplq | |
12134 | * and let the SCSI mid-layer to retry them to recover. | |
12135 | */ | |
db55fba8 | 12136 | lpfc_sli_abort_fcp_rings(phba); |
75baf696 JS |
12137 | } |
12138 | ||
12139 | /** | |
12140 | * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset | |
12141 | * @phba: pointer to lpfc hba data structure. | |
12142 | * | |
12143 | * This routine is called to prepare the SLI4 device for PCI slot reset. It | |
12144 | * disables the device interrupt and pci device, and aborts the internal FCP | |
12145 | * pending I/Os. | |
12146 | **/ | |
12147 | static void | |
12148 | lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba) | |
12149 | { | |
12150 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12151 | "2826 PCI channel disable preparing for reset\n"); | |
12152 | ||
12153 | /* Block any management I/Os to the device */ | |
618a5230 | 12154 | lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT); |
75baf696 JS |
12155 | |
12156 | /* Block all SCSI devices' I/Os on the host */ | |
12157 | lpfc_scsi_dev_block(phba); | |
12158 | ||
ea714f3d JS |
12159 | /* Flush all driver's outstanding SCSI I/Os as we are to reset */ |
12160 | lpfc_sli_flush_fcp_rings(phba); | |
12161 | ||
c3725bdc JS |
12162 | /* Flush the outstanding NVME IOs if fc4 type enabled. */ |
12163 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) | |
12164 | lpfc_sli_flush_nvme_rings(phba); | |
12165 | ||
75baf696 JS |
12166 | /* stop all timers */ |
12167 | lpfc_stop_hba_timers(phba); | |
12168 | ||
12169 | /* Disable interrupt and pci device */ | |
12170 | lpfc_sli4_disable_intr(phba); | |
5350d872 | 12171 | lpfc_sli4_queue_destroy(phba); |
75baf696 | 12172 | pci_disable_device(phba->pcidev); |
75baf696 JS |
12173 | } |
12174 | ||
12175 | /** | |
12176 | * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable | |
12177 | * @phba: pointer to lpfc hba data structure. | |
12178 | * | |
12179 | * This routine is called to prepare the SLI4 device for PCI slot permanently | |
12180 | * disabling. It blocks the SCSI transport layer traffic and flushes the FCP | |
12181 | * pending I/Os. | |
12182 | **/ | |
12183 | static void | |
12184 | lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba) | |
12185 | { | |
12186 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12187 | "2827 PCI channel permanent disable for failure\n"); | |
12188 | ||
12189 | /* Block all SCSI devices' I/Os on the host */ | |
12190 | lpfc_scsi_dev_block(phba); | |
12191 | ||
12192 | /* stop all timers */ | |
12193 | lpfc_stop_hba_timers(phba); | |
12194 | ||
12195 | /* Clean up all driver's outstanding SCSI I/Os */ | |
12196 | lpfc_sli_flush_fcp_rings(phba); | |
c3725bdc JS |
12197 | |
12198 | /* Flush the outstanding NVME IOs if fc4 type enabled. */ | |
12199 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) | |
12200 | lpfc_sli_flush_nvme_rings(phba); | |
75baf696 JS |
12201 | } |
12202 | ||
8d63f375 | 12203 | /** |
da0436e9 | 12204 | * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device |
e59058c4 JS |
12205 | * @pdev: pointer to PCI device. |
12206 | * @state: the current PCI connection state. | |
8d63f375 | 12207 | * |
da0436e9 JS |
12208 | * This routine is called from the PCI subsystem for error handling to device |
12209 | * with SLI-4 interface spec. This function is called by the PCI subsystem | |
12210 | * after a PCI bus error affecting this device has been detected. When this | |
12211 | * function is invoked, it will need to stop all the I/Os and interrupt(s) | |
12212 | * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET | |
12213 | * for the PCI subsystem to perform proper recovery as desired. | |
e59058c4 JS |
12214 | * |
12215 | * Return codes | |
3772a991 JS |
12216 | * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery |
12217 | * PCI_ERS_RESULT_DISCONNECT - device could not be recovered | |
e59058c4 | 12218 | **/ |
3772a991 | 12219 | static pci_ers_result_t |
da0436e9 | 12220 | lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state) |
8d63f375 | 12221 | { |
75baf696 JS |
12222 | struct Scsi_Host *shost = pci_get_drvdata(pdev); |
12223 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
12224 | ||
12225 | switch (state) { | |
12226 | case pci_channel_io_normal: | |
12227 | /* Non-fatal error, prepare for recovery */ | |
12228 | lpfc_sli4_prep_dev_for_recover(phba); | |
12229 | return PCI_ERS_RESULT_CAN_RECOVER; | |
12230 | case pci_channel_io_frozen: | |
12231 | /* Fatal error, prepare for slot reset */ | |
12232 | lpfc_sli4_prep_dev_for_reset(phba); | |
12233 | return PCI_ERS_RESULT_NEED_RESET; | |
12234 | case pci_channel_io_perm_failure: | |
12235 | /* Permanent failure, prepare for device down */ | |
12236 | lpfc_sli4_prep_dev_for_perm_failure(phba); | |
12237 | return PCI_ERS_RESULT_DISCONNECT; | |
12238 | default: | |
12239 | /* Unknown state, prepare and request slot reset */ | |
12240 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12241 | "2825 Unknown PCI error state: x%x\n", state); | |
12242 | lpfc_sli4_prep_dev_for_reset(phba); | |
12243 | return PCI_ERS_RESULT_NEED_RESET; | |
12244 | } | |
8d63f375 LV |
12245 | } |
12246 | ||
12247 | /** | |
da0436e9 | 12248 | * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch |
e59058c4 JS |
12249 | * @pdev: pointer to PCI device. |
12250 | * | |
da0436e9 JS |
12251 | * This routine is called from the PCI subsystem for error handling to device |
12252 | * with SLI-4 interface spec. It is called after PCI bus has been reset to | |
12253 | * restart the PCI card from scratch, as if from a cold-boot. During the | |
12254 | * PCI subsystem error recovery, after the driver returns | |
3772a991 | 12255 | * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error |
da0436e9 JS |
12256 | * recovery and then call this routine before calling the .resume method to |
12257 | * recover the device. This function will initialize the HBA device, enable | |
12258 | * the interrupt, but it will just put the HBA to offline state without | |
12259 | * passing any I/O traffic. | |
8d63f375 | 12260 | * |
e59058c4 | 12261 | * Return codes |
3772a991 JS |
12262 | * PCI_ERS_RESULT_RECOVERED - the device has been recovered |
12263 | * PCI_ERS_RESULT_DISCONNECT - device could not be recovered | |
8d63f375 | 12264 | */ |
3772a991 | 12265 | static pci_ers_result_t |
da0436e9 | 12266 | lpfc_io_slot_reset_s4(struct pci_dev *pdev) |
8d63f375 | 12267 | { |
75baf696 JS |
12268 | struct Scsi_Host *shost = pci_get_drvdata(pdev); |
12269 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
12270 | struct lpfc_sli *psli = &phba->sli; | |
12271 | uint32_t intr_mode; | |
12272 | ||
12273 | dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n"); | |
12274 | if (pci_enable_device_mem(pdev)) { | |
12275 | printk(KERN_ERR "lpfc: Cannot re-enable " | |
12276 | "PCI device after reset.\n"); | |
12277 | return PCI_ERS_RESULT_DISCONNECT; | |
12278 | } | |
12279 | ||
12280 | pci_restore_state(pdev); | |
0a96e975 JS |
12281 | |
12282 | /* | |
12283 | * As the new kernel behavior of pci_restore_state() API call clears | |
12284 | * device saved_state flag, need to save the restored state again. | |
12285 | */ | |
12286 | pci_save_state(pdev); | |
12287 | ||
75baf696 JS |
12288 | if (pdev->is_busmaster) |
12289 | pci_set_master(pdev); | |
12290 | ||
12291 | spin_lock_irq(&phba->hbalock); | |
12292 | psli->sli_flag &= ~LPFC_SLI_ACTIVE; | |
12293 | spin_unlock_irq(&phba->hbalock); | |
12294 | ||
12295 | /* Configure and enable interrupt */ | |
12296 | intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); | |
12297 | if (intr_mode == LPFC_INTR_ERROR) { | |
12298 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12299 | "2824 Cannot re-enable interrupt after " | |
12300 | "slot reset.\n"); | |
12301 | return PCI_ERS_RESULT_DISCONNECT; | |
12302 | } else | |
12303 | phba->intr_mode = intr_mode; | |
12304 | ||
12305 | /* Log the current active interrupt mode */ | |
12306 | lpfc_log_intr_mode(phba, phba->intr_mode); | |
12307 | ||
8d63f375 LV |
12308 | return PCI_ERS_RESULT_RECOVERED; |
12309 | } | |
12310 | ||
12311 | /** | |
da0436e9 | 12312 | * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device |
e59058c4 | 12313 | * @pdev: pointer to PCI device |
8d63f375 | 12314 | * |
3772a991 | 12315 | * This routine is called from the PCI subsystem for error handling to device |
da0436e9 | 12316 | * with SLI-4 interface spec. It is called when kernel error recovery tells |
3772a991 JS |
12317 | * the lpfc driver that it is ok to resume normal PCI operation after PCI bus |
12318 | * error recovery. After this call, traffic can start to flow from this device | |
12319 | * again. | |
da0436e9 | 12320 | **/ |
3772a991 | 12321 | static void |
da0436e9 | 12322 | lpfc_io_resume_s4(struct pci_dev *pdev) |
8d63f375 | 12323 | { |
75baf696 JS |
12324 | struct Scsi_Host *shost = pci_get_drvdata(pdev); |
12325 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
12326 | ||
12327 | /* | |
12328 | * In case of slot reset, as function reset is performed through | |
12329 | * mailbox command which needs DMA to be enabled, this operation | |
12330 | * has to be moved to the io resume phase. Taking device offline | |
12331 | * will perform the necessary cleanup. | |
12332 | */ | |
12333 | if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) { | |
12334 | /* Perform device reset */ | |
618a5230 | 12335 | lpfc_offline_prep(phba, LPFC_MBX_WAIT); |
75baf696 JS |
12336 | lpfc_offline(phba); |
12337 | lpfc_sli_brdrestart(phba); | |
12338 | /* Bring the device back online */ | |
12339 | lpfc_online(phba); | |
12340 | } | |
8d63f375 LV |
12341 | } |
12342 | ||
3772a991 JS |
12343 | /** |
12344 | * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem | |
12345 | * @pdev: pointer to PCI device | |
12346 | * @pid: pointer to PCI device identifier | |
12347 | * | |
12348 | * This routine is to be registered to the kernel's PCI subsystem. When an | |
12349 | * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks | |
12350 | * at PCI device-specific information of the device and driver to see if the | |
12351 | * driver state that it can support this kind of device. If the match is | |
12352 | * successful, the driver core invokes this routine. This routine dispatches | |
12353 | * the action to the proper SLI-3 or SLI-4 device probing routine, which will | |
12354 | * do all the initialization that it needs to do to handle the HBA device | |
12355 | * properly. | |
12356 | * | |
12357 | * Return code | |
12358 | * 0 - driver can claim the device | |
12359 | * negative value - driver can not claim the device | |
12360 | **/ | |
6f039790 | 12361 | static int |
3772a991 JS |
12362 | lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid) |
12363 | { | |
12364 | int rc; | |
8fa38513 | 12365 | struct lpfc_sli_intf intf; |
3772a991 | 12366 | |
28baac74 | 12367 | if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0)) |
3772a991 JS |
12368 | return -ENODEV; |
12369 | ||
8fa38513 | 12370 | if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) && |
28baac74 | 12371 | (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4)) |
da0436e9 | 12372 | rc = lpfc_pci_probe_one_s4(pdev, pid); |
8fa38513 | 12373 | else |
3772a991 | 12374 | rc = lpfc_pci_probe_one_s3(pdev, pid); |
8fa38513 | 12375 | |
3772a991 JS |
12376 | return rc; |
12377 | } | |
12378 | ||
12379 | /** | |
12380 | * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem | |
12381 | * @pdev: pointer to PCI device | |
12382 | * | |
12383 | * This routine is to be registered to the kernel's PCI subsystem. When an | |
12384 | * Emulex HBA is removed from PCI bus, the driver core invokes this routine. | |
12385 | * This routine dispatches the action to the proper SLI-3 or SLI-4 device | |
12386 | * remove routine, which will perform all the necessary cleanup for the | |
12387 | * device to be removed from the PCI subsystem properly. | |
12388 | **/ | |
6f039790 | 12389 | static void |
3772a991 JS |
12390 | lpfc_pci_remove_one(struct pci_dev *pdev) |
12391 | { | |
12392 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
12393 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
12394 | ||
12395 | switch (phba->pci_dev_grp) { | |
12396 | case LPFC_PCI_DEV_LP: | |
12397 | lpfc_pci_remove_one_s3(pdev); | |
12398 | break; | |
da0436e9 JS |
12399 | case LPFC_PCI_DEV_OC: |
12400 | lpfc_pci_remove_one_s4(pdev); | |
12401 | break; | |
3772a991 JS |
12402 | default: |
12403 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12404 | "1424 Invalid PCI device group: 0x%x\n", | |
12405 | phba->pci_dev_grp); | |
12406 | break; | |
12407 | } | |
12408 | return; | |
12409 | } | |
12410 | ||
12411 | /** | |
12412 | * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management | |
12413 | * @pdev: pointer to PCI device | |
12414 | * @msg: power management message | |
12415 | * | |
12416 | * This routine is to be registered to the kernel's PCI subsystem to support | |
12417 | * system Power Management (PM). When PM invokes this method, it dispatches | |
12418 | * the action to the proper SLI-3 or SLI-4 device suspend routine, which will | |
12419 | * suspend the device. | |
12420 | * | |
12421 | * Return code | |
12422 | * 0 - driver suspended the device | |
12423 | * Error otherwise | |
12424 | **/ | |
12425 | static int | |
12426 | lpfc_pci_suspend_one(struct pci_dev *pdev, pm_message_t msg) | |
12427 | { | |
12428 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
12429 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
12430 | int rc = -ENODEV; | |
12431 | ||
12432 | switch (phba->pci_dev_grp) { | |
12433 | case LPFC_PCI_DEV_LP: | |
12434 | rc = lpfc_pci_suspend_one_s3(pdev, msg); | |
12435 | break; | |
da0436e9 JS |
12436 | case LPFC_PCI_DEV_OC: |
12437 | rc = lpfc_pci_suspend_one_s4(pdev, msg); | |
12438 | break; | |
3772a991 JS |
12439 | default: |
12440 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12441 | "1425 Invalid PCI device group: 0x%x\n", | |
12442 | phba->pci_dev_grp); | |
12443 | break; | |
12444 | } | |
12445 | return rc; | |
12446 | } | |
12447 | ||
12448 | /** | |
12449 | * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management | |
12450 | * @pdev: pointer to PCI device | |
12451 | * | |
12452 | * This routine is to be registered to the kernel's PCI subsystem to support | |
12453 | * system Power Management (PM). When PM invokes this method, it dispatches | |
12454 | * the action to the proper SLI-3 or SLI-4 device resume routine, which will | |
12455 | * resume the device. | |
12456 | * | |
12457 | * Return code | |
12458 | * 0 - driver suspended the device | |
12459 | * Error otherwise | |
12460 | **/ | |
12461 | static int | |
12462 | lpfc_pci_resume_one(struct pci_dev *pdev) | |
12463 | { | |
12464 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
12465 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
12466 | int rc = -ENODEV; | |
12467 | ||
12468 | switch (phba->pci_dev_grp) { | |
12469 | case LPFC_PCI_DEV_LP: | |
12470 | rc = lpfc_pci_resume_one_s3(pdev); | |
12471 | break; | |
da0436e9 JS |
12472 | case LPFC_PCI_DEV_OC: |
12473 | rc = lpfc_pci_resume_one_s4(pdev); | |
12474 | break; | |
3772a991 JS |
12475 | default: |
12476 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12477 | "1426 Invalid PCI device group: 0x%x\n", | |
12478 | phba->pci_dev_grp); | |
12479 | break; | |
12480 | } | |
12481 | return rc; | |
12482 | } | |
12483 | ||
12484 | /** | |
12485 | * lpfc_io_error_detected - lpfc method for handling PCI I/O error | |
12486 | * @pdev: pointer to PCI device. | |
12487 | * @state: the current PCI connection state. | |
12488 | * | |
12489 | * This routine is registered to the PCI subsystem for error handling. This | |
12490 | * function is called by the PCI subsystem after a PCI bus error affecting | |
12491 | * this device has been detected. When this routine is invoked, it dispatches | |
12492 | * the action to the proper SLI-3 or SLI-4 device error detected handling | |
12493 | * routine, which will perform the proper error detected operation. | |
12494 | * | |
12495 | * Return codes | |
12496 | * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery | |
12497 | * PCI_ERS_RESULT_DISCONNECT - device could not be recovered | |
12498 | **/ | |
12499 | static pci_ers_result_t | |
12500 | lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) | |
12501 | { | |
12502 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
12503 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
12504 | pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT; | |
12505 | ||
12506 | switch (phba->pci_dev_grp) { | |
12507 | case LPFC_PCI_DEV_LP: | |
12508 | rc = lpfc_io_error_detected_s3(pdev, state); | |
12509 | break; | |
da0436e9 JS |
12510 | case LPFC_PCI_DEV_OC: |
12511 | rc = lpfc_io_error_detected_s4(pdev, state); | |
12512 | break; | |
3772a991 JS |
12513 | default: |
12514 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12515 | "1427 Invalid PCI device group: 0x%x\n", | |
12516 | phba->pci_dev_grp); | |
12517 | break; | |
12518 | } | |
12519 | return rc; | |
12520 | } | |
12521 | ||
12522 | /** | |
12523 | * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch | |
12524 | * @pdev: pointer to PCI device. | |
12525 | * | |
12526 | * This routine is registered to the PCI subsystem for error handling. This | |
12527 | * function is called after PCI bus has been reset to restart the PCI card | |
12528 | * from scratch, as if from a cold-boot. When this routine is invoked, it | |
12529 | * dispatches the action to the proper SLI-3 or SLI-4 device reset handling | |
12530 | * routine, which will perform the proper device reset. | |
12531 | * | |
12532 | * Return codes | |
12533 | * PCI_ERS_RESULT_RECOVERED - the device has been recovered | |
12534 | * PCI_ERS_RESULT_DISCONNECT - device could not be recovered | |
12535 | **/ | |
12536 | static pci_ers_result_t | |
12537 | lpfc_io_slot_reset(struct pci_dev *pdev) | |
12538 | { | |
12539 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
12540 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
12541 | pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT; | |
12542 | ||
12543 | switch (phba->pci_dev_grp) { | |
12544 | case LPFC_PCI_DEV_LP: | |
12545 | rc = lpfc_io_slot_reset_s3(pdev); | |
12546 | break; | |
da0436e9 JS |
12547 | case LPFC_PCI_DEV_OC: |
12548 | rc = lpfc_io_slot_reset_s4(pdev); | |
12549 | break; | |
3772a991 JS |
12550 | default: |
12551 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12552 | "1428 Invalid PCI device group: 0x%x\n", | |
12553 | phba->pci_dev_grp); | |
12554 | break; | |
12555 | } | |
12556 | return rc; | |
12557 | } | |
12558 | ||
12559 | /** | |
12560 | * lpfc_io_resume - lpfc method for resuming PCI I/O operation | |
12561 | * @pdev: pointer to PCI device | |
12562 | * | |
12563 | * This routine is registered to the PCI subsystem for error handling. It | |
12564 | * is called when kernel error recovery tells the lpfc driver that it is | |
12565 | * OK to resume normal PCI operation after PCI bus error recovery. When | |
12566 | * this routine is invoked, it dispatches the action to the proper SLI-3 | |
12567 | * or SLI-4 device io_resume routine, which will resume the device operation. | |
12568 | **/ | |
12569 | static void | |
12570 | lpfc_io_resume(struct pci_dev *pdev) | |
12571 | { | |
12572 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
12573 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
12574 | ||
12575 | switch (phba->pci_dev_grp) { | |
12576 | case LPFC_PCI_DEV_LP: | |
12577 | lpfc_io_resume_s3(pdev); | |
12578 | break; | |
da0436e9 JS |
12579 | case LPFC_PCI_DEV_OC: |
12580 | lpfc_io_resume_s4(pdev); | |
12581 | break; | |
3772a991 JS |
12582 | default: |
12583 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12584 | "1429 Invalid PCI device group: 0x%x\n", | |
12585 | phba->pci_dev_grp); | |
12586 | break; | |
12587 | } | |
12588 | return; | |
12589 | } | |
12590 | ||
1ba981fd JS |
12591 | /** |
12592 | * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter | |
12593 | * @phba: pointer to lpfc hba data structure. | |
12594 | * | |
12595 | * This routine checks to see if OAS is supported for this adapter. If | |
12596 | * supported, the configure Flash Optimized Fabric flag is set. Otherwise, | |
12597 | * the enable oas flag is cleared and the pool created for OAS device data | |
12598 | * is destroyed. | |
12599 | * | |
12600 | **/ | |
12601 | void | |
12602 | lpfc_sli4_oas_verify(struct lpfc_hba *phba) | |
12603 | { | |
12604 | ||
12605 | if (!phba->cfg_EnableXLane) | |
12606 | return; | |
12607 | ||
12608 | if (phba->sli4_hba.pc_sli4_params.oas_supported) { | |
12609 | phba->cfg_fof = 1; | |
12610 | } else { | |
f38fa0bb | 12611 | phba->cfg_fof = 0; |
1ba981fd JS |
12612 | if (phba->device_data_mem_pool) |
12613 | mempool_destroy(phba->device_data_mem_pool); | |
12614 | phba->device_data_mem_pool = NULL; | |
12615 | } | |
12616 | ||
12617 | return; | |
12618 | } | |
12619 | ||
d2cc9bcd JS |
12620 | /** |
12621 | * lpfc_sli4_ras_init - Verify RAS-FW log is supported by this adapter | |
12622 | * @phba: pointer to lpfc hba data structure. | |
12623 | * | |
12624 | * This routine checks to see if RAS is supported by the adapter. Check the | |
12625 | * function through which RAS support enablement is to be done. | |
12626 | **/ | |
12627 | void | |
12628 | lpfc_sli4_ras_init(struct lpfc_hba *phba) | |
12629 | { | |
12630 | switch (phba->pcidev->device) { | |
12631 | case PCI_DEVICE_ID_LANCER_G6_FC: | |
12632 | case PCI_DEVICE_ID_LANCER_G7_FC: | |
12633 | phba->ras_fwlog.ras_hwsupport = true; | |
cb34990b JS |
12634 | if (phba->cfg_ras_fwlog_func == PCI_FUNC(phba->pcidev->devfn) && |
12635 | phba->cfg_ras_fwlog_buffsize) | |
d2cc9bcd JS |
12636 | phba->ras_fwlog.ras_enabled = true; |
12637 | else | |
12638 | phba->ras_fwlog.ras_enabled = false; | |
12639 | break; | |
12640 | default: | |
12641 | phba->ras_fwlog.ras_hwsupport = false; | |
12642 | } | |
12643 | } | |
12644 | ||
1ba981fd | 12645 | |
dea3101e | 12646 | MODULE_DEVICE_TABLE(pci, lpfc_id_table); |
12647 | ||
a55b2d21 | 12648 | static const struct pci_error_handlers lpfc_err_handler = { |
8d63f375 LV |
12649 | .error_detected = lpfc_io_error_detected, |
12650 | .slot_reset = lpfc_io_slot_reset, | |
12651 | .resume = lpfc_io_resume, | |
12652 | }; | |
12653 | ||
dea3101e | 12654 | static struct pci_driver lpfc_driver = { |
12655 | .name = LPFC_DRIVER_NAME, | |
12656 | .id_table = lpfc_id_table, | |
12657 | .probe = lpfc_pci_probe_one, | |
6f039790 | 12658 | .remove = lpfc_pci_remove_one, |
85e8a239 | 12659 | .shutdown = lpfc_pci_remove_one, |
3a55b532 | 12660 | .suspend = lpfc_pci_suspend_one, |
3772a991 | 12661 | .resume = lpfc_pci_resume_one, |
2e0fef85 | 12662 | .err_handler = &lpfc_err_handler, |
dea3101e | 12663 | }; |
12664 | ||
3ef6d24c | 12665 | static const struct file_operations lpfc_mgmt_fop = { |
858feacd | 12666 | .owner = THIS_MODULE, |
3ef6d24c JS |
12667 | }; |
12668 | ||
12669 | static struct miscdevice lpfc_mgmt_dev = { | |
12670 | .minor = MISC_DYNAMIC_MINOR, | |
12671 | .name = "lpfcmgmt", | |
12672 | .fops = &lpfc_mgmt_fop, | |
12673 | }; | |
12674 | ||
e59058c4 | 12675 | /** |
3621a710 | 12676 | * lpfc_init - lpfc module initialization routine |
e59058c4 JS |
12677 | * |
12678 | * This routine is to be invoked when the lpfc module is loaded into the | |
12679 | * kernel. The special kernel macro module_init() is used to indicate the | |
12680 | * role of this routine to the kernel as lpfc module entry point. | |
12681 | * | |
12682 | * Return codes | |
12683 | * 0 - successful | |
12684 | * -ENOMEM - FC attach transport failed | |
12685 | * all others - failed | |
12686 | */ | |
dea3101e | 12687 | static int __init |
12688 | lpfc_init(void) | |
12689 | { | |
12690 | int error = 0; | |
12691 | ||
12692 | printk(LPFC_MODULE_DESC "\n"); | |
c44ce173 | 12693 | printk(LPFC_COPYRIGHT "\n"); |
dea3101e | 12694 | |
3ef6d24c JS |
12695 | error = misc_register(&lpfc_mgmt_dev); |
12696 | if (error) | |
12697 | printk(KERN_ERR "Could not register lpfcmgmt device, " | |
12698 | "misc_register returned with status %d", error); | |
12699 | ||
458c083e JS |
12700 | lpfc_transport_functions.vport_create = lpfc_vport_create; |
12701 | lpfc_transport_functions.vport_delete = lpfc_vport_delete; | |
dea3101e | 12702 | lpfc_transport_template = |
12703 | fc_attach_transport(&lpfc_transport_functions); | |
7ee5d43e | 12704 | if (lpfc_transport_template == NULL) |
dea3101e | 12705 | return -ENOMEM; |
458c083e JS |
12706 | lpfc_vport_transport_template = |
12707 | fc_attach_transport(&lpfc_vport_transport_functions); | |
12708 | if (lpfc_vport_transport_template == NULL) { | |
12709 | fc_release_transport(lpfc_transport_template); | |
12710 | return -ENOMEM; | |
7ee5d43e | 12711 | } |
5fd11085 | 12712 | lpfc_nvme_cmd_template(); |
bd3061ba | 12713 | lpfc_nvmet_cmd_template(); |
7bb03bbf JS |
12714 | |
12715 | /* Initialize in case vector mapping is needed */ | |
b246de17 | 12716 | lpfc_used_cpu = NULL; |
2ea259ee | 12717 | lpfc_present_cpu = num_present_cpus(); |
7bb03bbf | 12718 | |
dea3101e | 12719 | error = pci_register_driver(&lpfc_driver); |
92d7f7b0 | 12720 | if (error) { |
dea3101e | 12721 | fc_release_transport(lpfc_transport_template); |
458c083e | 12722 | fc_release_transport(lpfc_vport_transport_template); |
92d7f7b0 | 12723 | } |
dea3101e | 12724 | |
12725 | return error; | |
12726 | } | |
12727 | ||
e59058c4 | 12728 | /** |
3621a710 | 12729 | * lpfc_exit - lpfc module removal routine |
e59058c4 JS |
12730 | * |
12731 | * This routine is invoked when the lpfc module is removed from the kernel. | |
12732 | * The special kernel macro module_exit() is used to indicate the role of | |
12733 | * this routine to the kernel as lpfc module exit point. | |
12734 | */ | |
dea3101e | 12735 | static void __exit |
12736 | lpfc_exit(void) | |
12737 | { | |
3ef6d24c | 12738 | misc_deregister(&lpfc_mgmt_dev); |
dea3101e | 12739 | pci_unregister_driver(&lpfc_driver); |
12740 | fc_release_transport(lpfc_transport_template); | |
458c083e | 12741 | fc_release_transport(lpfc_vport_transport_template); |
81301a9b | 12742 | if (_dump_buf_data) { |
6a9c52cf JS |
12743 | printk(KERN_ERR "9062 BLKGRD: freeing %lu pages for " |
12744 | "_dump_buf_data at 0x%p\n", | |
81301a9b JS |
12745 | (1L << _dump_buf_data_order), _dump_buf_data); |
12746 | free_pages((unsigned long)_dump_buf_data, _dump_buf_data_order); | |
12747 | } | |
12748 | ||
12749 | if (_dump_buf_dif) { | |
6a9c52cf JS |
12750 | printk(KERN_ERR "9049 BLKGRD: freeing %lu pages for " |
12751 | "_dump_buf_dif at 0x%p\n", | |
81301a9b JS |
12752 | (1L << _dump_buf_dif_order), _dump_buf_dif); |
12753 | free_pages((unsigned long)_dump_buf_dif, _dump_buf_dif_order); | |
12754 | } | |
b246de17 | 12755 | kfree(lpfc_used_cpu); |
7973967f | 12756 | idr_destroy(&lpfc_hba_index); |
dea3101e | 12757 | } |
12758 | ||
12759 | module_init(lpfc_init); | |
12760 | module_exit(lpfc_exit); | |
12761 | MODULE_LICENSE("GPL"); | |
12762 | MODULE_DESCRIPTION(LPFC_MODULE_DESC); | |
d080abe0 | 12763 | MODULE_AUTHOR("Broadcom"); |
dea3101e | 12764 | MODULE_VERSION("0:" LPFC_DRIVER_VERSION); |