Commit | Line | Data |
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dea3101e | 1 | /******************************************************************* |
2 | * This file is part of the Emulex Linux Device Driver for * | |
c44ce173 | 3 | * Fibre Channel Host Bus Adapters. * |
145e5a8a | 4 | * Copyright (C) 2017-2020 Broadcom. All Rights Reserved. The term * |
3e21d1cb | 5 | * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * |
50611577 | 6 | * Copyright (C) 2004-2016 Emulex. All rights reserved. * |
c44ce173 | 7 | * EMULEX and SLI are trademarks of Emulex. * |
d080abe0 | 8 | * www.broadcom.com * |
c44ce173 | 9 | * Portions Copyright (C) 2004-2005 Christoph Hellwig * |
dea3101e | 10 | * * |
11 | * This program is free software; you can redistribute it and/or * | |
c44ce173 JSEC |
12 | * modify it under the terms of version 2 of the GNU General * |
13 | * Public License as published by the Free Software Foundation. * | |
14 | * This program is distributed in the hope that it will be useful. * | |
15 | * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * | |
16 | * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * | |
17 | * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * | |
18 | * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * | |
19 | * TO BE LEGALLY INVALID. See the GNU General Public License for * | |
20 | * more details, a copy of which can be found in the file COPYING * | |
21 | * included with this package. * | |
dea3101e | 22 | *******************************************************************/ |
23 | ||
dea3101e | 24 | #include <linux/blkdev.h> |
25 | #include <linux/delay.h> | |
26 | #include <linux/dma-mapping.h> | |
27 | #include <linux/idr.h> | |
28 | #include <linux/interrupt.h> | |
acf3368f | 29 | #include <linux/module.h> |
dea3101e | 30 | #include <linux/kthread.h> |
31 | #include <linux/pci.h> | |
32 | #include <linux/spinlock.h> | |
92d7f7b0 | 33 | #include <linux/ctype.h> |
0d878419 | 34 | #include <linux/aer.h> |
5a0e3ad6 | 35 | #include <linux/slab.h> |
52d52440 | 36 | #include <linux/firmware.h> |
3ef6d24c | 37 | #include <linux/miscdevice.h> |
7bb03bbf | 38 | #include <linux/percpu.h> |
895427bd | 39 | #include <linux/msi.h> |
6a828b0f | 40 | #include <linux/irq.h> |
286871a6 | 41 | #include <linux/bitops.h> |
31f06d2e | 42 | #include <linux/crash_dump.h> |
dcaa2136 | 43 | #include <linux/cpu.h> |
93a4d6f4 | 44 | #include <linux/cpuhotplug.h> |
dea3101e | 45 | |
91886523 | 46 | #include <scsi/scsi.h> |
dea3101e | 47 | #include <scsi/scsi_device.h> |
48 | #include <scsi/scsi_host.h> | |
49 | #include <scsi/scsi_transport_fc.h> | |
86c67379 JS |
50 | #include <scsi/scsi_tcq.h> |
51 | #include <scsi/fc/fc_fs.h> | |
52 | ||
da0436e9 | 53 | #include "lpfc_hw4.h" |
dea3101e | 54 | #include "lpfc_hw.h" |
55 | #include "lpfc_sli.h" | |
da0436e9 | 56 | #include "lpfc_sli4.h" |
ea2151b4 | 57 | #include "lpfc_nl.h" |
dea3101e | 58 | #include "lpfc_disc.h" |
dea3101e | 59 | #include "lpfc.h" |
895427bd JS |
60 | #include "lpfc_scsi.h" |
61 | #include "lpfc_nvme.h" | |
dea3101e | 62 | #include "lpfc_logmsg.h" |
63 | #include "lpfc_crtn.h" | |
92d7f7b0 | 64 | #include "lpfc_vport.h" |
dea3101e | 65 | #include "lpfc_version.h" |
12f44457 | 66 | #include "lpfc_ids.h" |
dea3101e | 67 | |
93a4d6f4 | 68 | static enum cpuhp_state lpfc_cpuhp_state; |
7bb03bbf | 69 | /* Used when mapping IRQ vectors in a driver centric manner */ |
d7b761b0 | 70 | static uint32_t lpfc_present_cpu; |
7bb03bbf | 71 | |
93a4d6f4 JS |
72 | static void __lpfc_cpuhp_remove(struct lpfc_hba *phba); |
73 | static void lpfc_cpuhp_remove(struct lpfc_hba *phba); | |
74 | static void lpfc_cpuhp_add(struct lpfc_hba *phba); | |
dea3101e | 75 | static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *); |
76 | static int lpfc_post_rcv_buf(struct lpfc_hba *); | |
5350d872 | 77 | static int lpfc_sli4_queue_verify(struct lpfc_hba *); |
da0436e9 JS |
78 | static int lpfc_create_bootstrap_mbox(struct lpfc_hba *); |
79 | static int lpfc_setup_endian_order(struct lpfc_hba *); | |
da0436e9 | 80 | static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *); |
8a9d2e80 | 81 | static void lpfc_free_els_sgl_list(struct lpfc_hba *); |
f358dd0c | 82 | static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *); |
8a9d2e80 | 83 | static void lpfc_init_sgl_list(struct lpfc_hba *); |
da0436e9 JS |
84 | static int lpfc_init_active_sgl_array(struct lpfc_hba *); |
85 | static void lpfc_free_active_sgl(struct lpfc_hba *); | |
86 | static int lpfc_hba_down_post_s3(struct lpfc_hba *phba); | |
87 | static int lpfc_hba_down_post_s4(struct lpfc_hba *phba); | |
88 | static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *); | |
89 | static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *); | |
90 | static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *); | |
618a5230 JS |
91 | static void lpfc_sli4_disable_intr(struct lpfc_hba *); |
92 | static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t); | |
1ba981fd | 93 | static void lpfc_sli4_oas_verify(struct lpfc_hba *phba); |
6a828b0f | 94 | static uint16_t lpfc_find_cpu_handle(struct lpfc_hba *, uint16_t, int); |
aa6ff309 | 95 | static void lpfc_setup_bg(struct lpfc_hba *, struct Scsi_Host *); |
dea3101e | 96 | |
97 | static struct scsi_transport_template *lpfc_transport_template = NULL; | |
92d7f7b0 | 98 | static struct scsi_transport_template *lpfc_vport_transport_template = NULL; |
dea3101e | 99 | static DEFINE_IDR(lpfc_hba_index); |
f358dd0c | 100 | #define LPFC_NVMET_BUF_POST 254 |
dea3101e | 101 | |
e59058c4 | 102 | /** |
3621a710 | 103 | * lpfc_config_port_prep - Perform lpfc initialization prior to config port |
e59058c4 JS |
104 | * @phba: pointer to lpfc hba data structure. |
105 | * | |
106 | * This routine will do LPFC initialization prior to issuing the CONFIG_PORT | |
107 | * mailbox command. It retrieves the revision information from the HBA and | |
108 | * collects the Vital Product Data (VPD) about the HBA for preparing the | |
109 | * configuration of the HBA. | |
110 | * | |
111 | * Return codes: | |
112 | * 0 - success. | |
113 | * -ERESTART - requests the SLI layer to reset the HBA and try again. | |
114 | * Any other value - indicates an error. | |
115 | **/ | |
dea3101e | 116 | int |
2e0fef85 | 117 | lpfc_config_port_prep(struct lpfc_hba *phba) |
dea3101e | 118 | { |
119 | lpfc_vpd_t *vp = &phba->vpd; | |
120 | int i = 0, rc; | |
121 | LPFC_MBOXQ_t *pmb; | |
122 | MAILBOX_t *mb; | |
123 | char *lpfc_vpd_data = NULL; | |
124 | uint16_t offset = 0; | |
125 | static char licensed[56] = | |
126 | "key unlock for use with gnu public licensed code only\0"; | |
65a29c16 | 127 | static int init_key = 1; |
dea3101e | 128 | |
129 | pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); | |
130 | if (!pmb) { | |
2e0fef85 | 131 | phba->link_state = LPFC_HBA_ERROR; |
dea3101e | 132 | return -ENOMEM; |
133 | } | |
134 | ||
04c68496 | 135 | mb = &pmb->u.mb; |
2e0fef85 | 136 | phba->link_state = LPFC_INIT_MBX_CMDS; |
dea3101e | 137 | |
138 | if (lpfc_is_LC_HBA(phba->pcidev->device)) { | |
65a29c16 JS |
139 | if (init_key) { |
140 | uint32_t *ptext = (uint32_t *) licensed; | |
dea3101e | 141 | |
65a29c16 JS |
142 | for (i = 0; i < 56; i += sizeof (uint32_t), ptext++) |
143 | *ptext = cpu_to_be32(*ptext); | |
144 | init_key = 0; | |
145 | } | |
dea3101e | 146 | |
147 | lpfc_read_nv(phba, pmb); | |
148 | memset((char*)mb->un.varRDnvp.rsvd3, 0, | |
149 | sizeof (mb->un.varRDnvp.rsvd3)); | |
150 | memcpy((char*)mb->un.varRDnvp.rsvd3, licensed, | |
151 | sizeof (licensed)); | |
152 | ||
153 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); | |
154 | ||
155 | if (rc != MBX_SUCCESS) { | |
372c187b | 156 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
e8b62011 | 157 | "0324 Config Port initialization " |
dea3101e | 158 | "error, mbxCmd x%x READ_NVPARM, " |
159 | "mbxStatus x%x\n", | |
dea3101e | 160 | mb->mbxCommand, mb->mbxStatus); |
161 | mempool_free(pmb, phba->mbox_mem_pool); | |
162 | return -ERESTART; | |
163 | } | |
164 | memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename, | |
2e0fef85 JS |
165 | sizeof(phba->wwnn)); |
166 | memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname, | |
167 | sizeof(phba->wwpn)); | |
dea3101e | 168 | } |
169 | ||
dfb75133 MW |
170 | /* |
171 | * Clear all option bits except LPFC_SLI3_BG_ENABLED, | |
172 | * which was already set in lpfc_get_cfgparam() | |
173 | */ | |
174 | phba->sli3_options &= (uint32_t)LPFC_SLI3_BG_ENABLED; | |
92d7f7b0 | 175 | |
dea3101e | 176 | /* Setup and issue mailbox READ REV command */ |
177 | lpfc_read_rev(phba, pmb); | |
178 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); | |
179 | if (rc != MBX_SUCCESS) { | |
372c187b | 180 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
e8b62011 | 181 | "0439 Adapter failed to init, mbxCmd x%x " |
dea3101e | 182 | "READ_REV, mbxStatus x%x\n", |
dea3101e | 183 | mb->mbxCommand, mb->mbxStatus); |
184 | mempool_free( pmb, phba->mbox_mem_pool); | |
185 | return -ERESTART; | |
186 | } | |
187 | ||
92d7f7b0 | 188 | |
1de933f3 JSEC |
189 | /* |
190 | * The value of rr must be 1 since the driver set the cv field to 1. | |
191 | * This setting requires the FW to set all revision fields. | |
dea3101e | 192 | */ |
1de933f3 | 193 | if (mb->un.varRdRev.rr == 0) { |
dea3101e | 194 | vp->rev.rBit = 0; |
372c187b | 195 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
e8b62011 JS |
196 | "0440 Adapter failed to init, READ_REV has " |
197 | "missing revision information.\n"); | |
dea3101e | 198 | mempool_free(pmb, phba->mbox_mem_pool); |
199 | return -ERESTART; | |
dea3101e | 200 | } |
201 | ||
495a714c JS |
202 | if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) { |
203 | mempool_free(pmb, phba->mbox_mem_pool); | |
ed957684 | 204 | return -EINVAL; |
495a714c | 205 | } |
ed957684 | 206 | |
dea3101e | 207 | /* Save information as VPD data */ |
1de933f3 | 208 | vp->rev.rBit = 1; |
92d7f7b0 | 209 | memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t)); |
1de933f3 JSEC |
210 | vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev; |
211 | memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16); | |
212 | vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev; | |
213 | memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16); | |
dea3101e | 214 | vp->rev.biuRev = mb->un.varRdRev.biuRev; |
215 | vp->rev.smRev = mb->un.varRdRev.smRev; | |
216 | vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev; | |
217 | vp->rev.endecRev = mb->un.varRdRev.endecRev; | |
218 | vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh; | |
219 | vp->rev.fcphLow = mb->un.varRdRev.fcphLow; | |
220 | vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh; | |
221 | vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow; | |
222 | vp->rev.postKernRev = mb->un.varRdRev.postKernRev; | |
223 | vp->rev.opFwRev = mb->un.varRdRev.opFwRev; | |
224 | ||
92d7f7b0 JS |
225 | /* If the sli feature level is less then 9, we must |
226 | * tear down all RPIs and VPIs on link down if NPIV | |
227 | * is enabled. | |
228 | */ | |
229 | if (vp->rev.feaLevelHigh < 9) | |
230 | phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN; | |
231 | ||
dea3101e | 232 | if (lpfc_is_LC_HBA(phba->pcidev->device)) |
233 | memcpy(phba->RandomData, (char *)&mb->un.varWords[24], | |
234 | sizeof (phba->RandomData)); | |
235 | ||
dea3101e | 236 | /* Get adapter VPD information */ |
dea3101e | 237 | lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL); |
238 | if (!lpfc_vpd_data) | |
d7c255b2 | 239 | goto out_free_mbox; |
dea3101e | 240 | do { |
a0c87cbd | 241 | lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD); |
dea3101e | 242 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); |
243 | ||
244 | if (rc != MBX_SUCCESS) { | |
245 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
e8b62011 | 246 | "0441 VPD not present on adapter, " |
dea3101e | 247 | "mbxCmd x%x DUMP VPD, mbxStatus x%x\n", |
dea3101e | 248 | mb->mbxCommand, mb->mbxStatus); |
74b72a59 | 249 | mb->un.varDmp.word_cnt = 0; |
dea3101e | 250 | } |
04c68496 JS |
251 | /* dump mem may return a zero when finished or we got a |
252 | * mailbox error, either way we are done. | |
253 | */ | |
254 | if (mb->un.varDmp.word_cnt == 0) | |
255 | break; | |
d91e3abb DK |
256 | |
257 | i = mb->un.varDmp.word_cnt * sizeof(uint32_t); | |
258 | if (offset + i > DMP_VPD_SIZE) | |
259 | i = DMP_VPD_SIZE - offset; | |
d7c255b2 | 260 | lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET, |
d91e3abb DK |
261 | lpfc_vpd_data + offset, i); |
262 | offset += i; | |
263 | } while (offset < DMP_VPD_SIZE); | |
264 | ||
74b72a59 | 265 | lpfc_parse_vpd(phba, lpfc_vpd_data, offset); |
dea3101e | 266 | |
267 | kfree(lpfc_vpd_data); | |
dea3101e | 268 | out_free_mbox: |
269 | mempool_free(pmb, phba->mbox_mem_pool); | |
270 | return 0; | |
271 | } | |
272 | ||
e59058c4 | 273 | /** |
3621a710 | 274 | * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd |
e59058c4 JS |
275 | * @phba: pointer to lpfc hba data structure. |
276 | * @pmboxq: pointer to the driver internal queue element for mailbox command. | |
277 | * | |
278 | * This is the completion handler for driver's configuring asynchronous event | |
279 | * mailbox command to the device. If the mailbox command returns successfully, | |
280 | * it will set internal async event support flag to 1; otherwise, it will | |
281 | * set internal async event support flag to 0. | |
282 | **/ | |
57127f15 JS |
283 | static void |
284 | lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq) | |
285 | { | |
04c68496 | 286 | if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS) |
57127f15 JS |
287 | phba->temp_sensor_support = 1; |
288 | else | |
289 | phba->temp_sensor_support = 0; | |
290 | mempool_free(pmboxq, phba->mbox_mem_pool); | |
291 | return; | |
292 | } | |
293 | ||
97207482 | 294 | /** |
3621a710 | 295 | * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler |
97207482 JS |
296 | * @phba: pointer to lpfc hba data structure. |
297 | * @pmboxq: pointer to the driver internal queue element for mailbox command. | |
298 | * | |
299 | * This is the completion handler for dump mailbox command for getting | |
300 | * wake up parameters. When this command complete, the response contain | |
301 | * Option rom version of the HBA. This function translate the version number | |
302 | * into a human readable string and store it in OptionROMVersion. | |
303 | **/ | |
304 | static void | |
305 | lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq) | |
306 | { | |
307 | struct prog_id *prg; | |
308 | uint32_t prog_id_word; | |
309 | char dist = ' '; | |
310 | /* character array used for decoding dist type. */ | |
311 | char dist_char[] = "nabx"; | |
312 | ||
04c68496 | 313 | if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) { |
9f1e1b50 | 314 | mempool_free(pmboxq, phba->mbox_mem_pool); |
97207482 | 315 | return; |
9f1e1b50 | 316 | } |
97207482 JS |
317 | |
318 | prg = (struct prog_id *) &prog_id_word; | |
319 | ||
320 | /* word 7 contain option rom version */ | |
04c68496 | 321 | prog_id_word = pmboxq->u.mb.un.varWords[7]; |
97207482 JS |
322 | |
323 | /* Decode the Option rom version word to a readable string */ | |
324 | if (prg->dist < 4) | |
325 | dist = dist_char[prg->dist]; | |
326 | ||
327 | if ((prg->dist == 3) && (prg->num == 0)) | |
a2fc4aef | 328 | snprintf(phba->OptionROMVersion, 32, "%d.%d%d", |
97207482 JS |
329 | prg->ver, prg->rev, prg->lev); |
330 | else | |
a2fc4aef | 331 | snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d", |
97207482 JS |
332 | prg->ver, prg->rev, prg->lev, |
333 | dist, prg->num); | |
9f1e1b50 | 334 | mempool_free(pmboxq, phba->mbox_mem_pool); |
97207482 JS |
335 | return; |
336 | } | |
337 | ||
0558056c JS |
338 | /** |
339 | * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname, | |
340 | * cfg_soft_wwnn, cfg_soft_wwpn | |
341 | * @vport: pointer to lpfc vport data structure. | |
342 | * | |
343 | * | |
344 | * Return codes | |
345 | * None. | |
346 | **/ | |
347 | void | |
348 | lpfc_update_vport_wwn(struct lpfc_vport *vport) | |
349 | { | |
aeb3c817 JS |
350 | uint8_t vvvl = vport->fc_sparam.cmn.valid_vendor_ver_level; |
351 | u32 *fawwpn_key = (u32 *)&vport->fc_sparam.un.vendorVersion[0]; | |
352 | ||
0558056c JS |
353 | /* If the soft name exists then update it using the service params */ |
354 | if (vport->phba->cfg_soft_wwnn) | |
355 | u64_to_wwn(vport->phba->cfg_soft_wwnn, | |
356 | vport->fc_sparam.nodeName.u.wwn); | |
357 | if (vport->phba->cfg_soft_wwpn) | |
358 | u64_to_wwn(vport->phba->cfg_soft_wwpn, | |
359 | vport->fc_sparam.portName.u.wwn); | |
360 | ||
361 | /* | |
362 | * If the name is empty or there exists a soft name | |
363 | * then copy the service params name, otherwise use the fc name | |
364 | */ | |
365 | if (vport->fc_nodename.u.wwn[0] == 0 || vport->phba->cfg_soft_wwnn) | |
366 | memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName, | |
367 | sizeof(struct lpfc_name)); | |
368 | else | |
369 | memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename, | |
370 | sizeof(struct lpfc_name)); | |
371 | ||
aeb3c817 JS |
372 | /* |
373 | * If the port name has changed, then set the Param changes flag | |
374 | * to unreg the login | |
375 | */ | |
376 | if (vport->fc_portname.u.wwn[0] != 0 && | |
377 | memcmp(&vport->fc_portname, &vport->fc_sparam.portName, | |
378 | sizeof(struct lpfc_name))) | |
379 | vport->vport_flag |= FAWWPN_PARAM_CHG; | |
380 | ||
381 | if (vport->fc_portname.u.wwn[0] == 0 || | |
382 | vport->phba->cfg_soft_wwpn || | |
383 | (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR) || | |
384 | vport->vport_flag & FAWWPN_SET) { | |
0558056c JS |
385 | memcpy(&vport->fc_portname, &vport->fc_sparam.portName, |
386 | sizeof(struct lpfc_name)); | |
aeb3c817 JS |
387 | vport->vport_flag &= ~FAWWPN_SET; |
388 | if (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR) | |
389 | vport->vport_flag |= FAWWPN_SET; | |
390 | } | |
0558056c JS |
391 | else |
392 | memcpy(&vport->fc_sparam.portName, &vport->fc_portname, | |
393 | sizeof(struct lpfc_name)); | |
394 | } | |
395 | ||
e59058c4 | 396 | /** |
3621a710 | 397 | * lpfc_config_port_post - Perform lpfc initialization after config port |
e59058c4 JS |
398 | * @phba: pointer to lpfc hba data structure. |
399 | * | |
400 | * This routine will do LPFC initialization after the CONFIG_PORT mailbox | |
401 | * command call. It performs all internal resource and state setups on the | |
402 | * port: post IOCB buffers, enable appropriate host interrupt attentions, | |
403 | * ELS ring timers, etc. | |
404 | * | |
405 | * Return codes | |
406 | * 0 - success. | |
407 | * Any other value - error. | |
408 | **/ | |
dea3101e | 409 | int |
2e0fef85 | 410 | lpfc_config_port_post(struct lpfc_hba *phba) |
dea3101e | 411 | { |
2e0fef85 | 412 | struct lpfc_vport *vport = phba->pport; |
a257bf90 | 413 | struct Scsi_Host *shost = lpfc_shost_from_vport(vport); |
dea3101e | 414 | LPFC_MBOXQ_t *pmb; |
415 | MAILBOX_t *mb; | |
416 | struct lpfc_dmabuf *mp; | |
417 | struct lpfc_sli *psli = &phba->sli; | |
418 | uint32_t status, timeout; | |
2e0fef85 JS |
419 | int i, j; |
420 | int rc; | |
dea3101e | 421 | |
7af67051 JS |
422 | spin_lock_irq(&phba->hbalock); |
423 | /* | |
424 | * If the Config port completed correctly the HBA is not | |
425 | * over heated any more. | |
426 | */ | |
427 | if (phba->over_temp_state == HBA_OVER_TEMP) | |
428 | phba->over_temp_state = HBA_NORMAL_TEMP; | |
429 | spin_unlock_irq(&phba->hbalock); | |
430 | ||
dea3101e | 431 | pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); |
432 | if (!pmb) { | |
2e0fef85 | 433 | phba->link_state = LPFC_HBA_ERROR; |
dea3101e | 434 | return -ENOMEM; |
435 | } | |
04c68496 | 436 | mb = &pmb->u.mb; |
dea3101e | 437 | |
dea3101e | 438 | /* Get login parameters for NID. */ |
9f1177a3 JS |
439 | rc = lpfc_read_sparam(phba, pmb, 0); |
440 | if (rc) { | |
441 | mempool_free(pmb, phba->mbox_mem_pool); | |
442 | return -ENOMEM; | |
443 | } | |
444 | ||
ed957684 | 445 | pmb->vport = vport; |
dea3101e | 446 | if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { |
372c187b | 447 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
e8b62011 | 448 | "0448 Adapter failed init, mbxCmd x%x " |
dea3101e | 449 | "READ_SPARM mbxStatus x%x\n", |
dea3101e | 450 | mb->mbxCommand, mb->mbxStatus); |
2e0fef85 | 451 | phba->link_state = LPFC_HBA_ERROR; |
3e1f0718 | 452 | mp = (struct lpfc_dmabuf *)pmb->ctx_buf; |
9f1177a3 | 453 | mempool_free(pmb, phba->mbox_mem_pool); |
dea3101e | 454 | lpfc_mbuf_free(phba, mp->virt, mp->phys); |
455 | kfree(mp); | |
456 | return -EIO; | |
457 | } | |
458 | ||
3e1f0718 | 459 | mp = (struct lpfc_dmabuf *)pmb->ctx_buf; |
dea3101e | 460 | |
2e0fef85 | 461 | memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm)); |
dea3101e | 462 | lpfc_mbuf_free(phba, mp->virt, mp->phys); |
463 | kfree(mp); | |
3e1f0718 | 464 | pmb->ctx_buf = NULL; |
0558056c | 465 | lpfc_update_vport_wwn(vport); |
a257bf90 JS |
466 | |
467 | /* Update the fc_host data structures with new wwn. */ | |
468 | fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn); | |
469 | fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn); | |
21e9a0a5 | 470 | fc_host_max_npiv_vports(shost) = phba->max_vpi; |
a257bf90 | 471 | |
dea3101e | 472 | /* If no serial number in VPD data, use low 6 bytes of WWNN */ |
473 | /* This should be consolidated into parse_vpd ? - mr */ | |
474 | if (phba->SerialNumber[0] == 0) { | |
475 | uint8_t *outptr; | |
476 | ||
2e0fef85 | 477 | outptr = &vport->fc_nodename.u.s.IEEE[0]; |
dea3101e | 478 | for (i = 0; i < 12; i++) { |
479 | status = *outptr++; | |
480 | j = ((status & 0xf0) >> 4); | |
481 | if (j <= 9) | |
482 | phba->SerialNumber[i] = | |
483 | (char)((uint8_t) 0x30 + (uint8_t) j); | |
484 | else | |
485 | phba->SerialNumber[i] = | |
486 | (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); | |
487 | i++; | |
488 | j = (status & 0xf); | |
489 | if (j <= 9) | |
490 | phba->SerialNumber[i] = | |
491 | (char)((uint8_t) 0x30 + (uint8_t) j); | |
492 | else | |
493 | phba->SerialNumber[i] = | |
494 | (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); | |
495 | } | |
496 | } | |
497 | ||
dea3101e | 498 | lpfc_read_config(phba, pmb); |
ed957684 | 499 | pmb->vport = vport; |
dea3101e | 500 | if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { |
372c187b | 501 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
e8b62011 | 502 | "0453 Adapter failed to init, mbxCmd x%x " |
dea3101e | 503 | "READ_CONFIG, mbxStatus x%x\n", |
dea3101e | 504 | mb->mbxCommand, mb->mbxStatus); |
2e0fef85 | 505 | phba->link_state = LPFC_HBA_ERROR; |
dea3101e | 506 | mempool_free( pmb, phba->mbox_mem_pool); |
507 | return -EIO; | |
508 | } | |
509 | ||
a0c87cbd JS |
510 | /* Check if the port is disabled */ |
511 | lpfc_sli_read_link_ste(phba); | |
512 | ||
dea3101e | 513 | /* Reset the DFT_HBA_Q_DEPTH to the max xri */ |
f6770e7d | 514 | if (phba->cfg_hba_queue_depth > mb->un.varRdConfig.max_xri) { |
572709e2 JS |
515 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, |
516 | "3359 HBA queue depth changed from %d to %d\n", | |
f6770e7d JS |
517 | phba->cfg_hba_queue_depth, |
518 | mb->un.varRdConfig.max_xri); | |
519 | phba->cfg_hba_queue_depth = mb->un.varRdConfig.max_xri; | |
572709e2 | 520 | } |
dea3101e | 521 | |
522 | phba->lmt = mb->un.varRdConfig.lmt; | |
74b72a59 JW |
523 | |
524 | /* Get the default values for Model Name and Description */ | |
525 | lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); | |
526 | ||
2e0fef85 | 527 | phba->link_state = LPFC_LINK_DOWN; |
dea3101e | 528 | |
0b727fea | 529 | /* Only process IOCBs on ELS ring till hba_state is READY */ |
895427bd JS |
530 | if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr) |
531 | psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT; | |
532 | if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr) | |
533 | psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT; | |
dea3101e | 534 | |
535 | /* Post receive buffers for desired rings */ | |
ed957684 JS |
536 | if (phba->sli_rev != 3) |
537 | lpfc_post_rcv_buf(phba); | |
dea3101e | 538 | |
9399627f JS |
539 | /* |
540 | * Configure HBA MSI-X attention conditions to messages if MSI-X mode | |
541 | */ | |
542 | if (phba->intr_type == MSIX) { | |
543 | rc = lpfc_config_msi(phba, pmb); | |
544 | if (rc) { | |
545 | mempool_free(pmb, phba->mbox_mem_pool); | |
546 | return -EIO; | |
547 | } | |
548 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); | |
549 | if (rc != MBX_SUCCESS) { | |
372c187b | 550 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
9399627f JS |
551 | "0352 Config MSI mailbox command " |
552 | "failed, mbxCmd x%x, mbxStatus x%x\n", | |
04c68496 JS |
553 | pmb->u.mb.mbxCommand, |
554 | pmb->u.mb.mbxStatus); | |
9399627f JS |
555 | mempool_free(pmb, phba->mbox_mem_pool); |
556 | return -EIO; | |
557 | } | |
558 | } | |
559 | ||
04c68496 | 560 | spin_lock_irq(&phba->hbalock); |
9399627f JS |
561 | /* Initialize ERATT handling flag */ |
562 | phba->hba_flag &= ~HBA_ERATT_HANDLED; | |
563 | ||
dea3101e | 564 | /* Enable appropriate host interrupts */ |
9940b97b JS |
565 | if (lpfc_readl(phba->HCregaddr, &status)) { |
566 | spin_unlock_irq(&phba->hbalock); | |
567 | return -EIO; | |
568 | } | |
dea3101e | 569 | status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA; |
570 | if (psli->num_rings > 0) | |
571 | status |= HC_R0INT_ENA; | |
572 | if (psli->num_rings > 1) | |
573 | status |= HC_R1INT_ENA; | |
574 | if (psli->num_rings > 2) | |
575 | status |= HC_R2INT_ENA; | |
576 | if (psli->num_rings > 3) | |
577 | status |= HC_R3INT_ENA; | |
578 | ||
875fbdfe JSEC |
579 | if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) && |
580 | (phba->cfg_poll & DISABLE_FCP_RING_INT)) | |
9399627f | 581 | status &= ~(HC_R0INT_ENA); |
875fbdfe | 582 | |
dea3101e | 583 | writel(status, phba->HCregaddr); |
584 | readl(phba->HCregaddr); /* flush */ | |
2e0fef85 | 585 | spin_unlock_irq(&phba->hbalock); |
dea3101e | 586 | |
9399627f JS |
587 | /* Set up ring-0 (ELS) timer */ |
588 | timeout = phba->fc_ratov * 2; | |
256ec0d0 JS |
589 | mod_timer(&vport->els_tmofunc, |
590 | jiffies + msecs_to_jiffies(1000 * timeout)); | |
9399627f | 591 | /* Set up heart beat (HB) timer */ |
256ec0d0 JS |
592 | mod_timer(&phba->hb_tmofunc, |
593 | jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL)); | |
858c9f6c JS |
594 | phba->hb_outstanding = 0; |
595 | phba->last_completion_time = jiffies; | |
9399627f | 596 | /* Set up error attention (ERATT) polling timer */ |
256ec0d0 | 597 | mod_timer(&phba->eratt_poll, |
65791f1f | 598 | jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval)); |
dea3101e | 599 | |
a0c87cbd | 600 | if (phba->hba_flag & LINK_DISABLED) { |
372c187b DK |
601 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
602 | "2598 Adapter Link is disabled.\n"); | |
a0c87cbd JS |
603 | lpfc_down_link(phba, pmb); |
604 | pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; | |
605 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); | |
606 | if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) { | |
372c187b DK |
607 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
608 | "2599 Adapter failed to issue DOWN_LINK" | |
609 | " mbox command rc 0x%x\n", rc); | |
a0c87cbd JS |
610 | |
611 | mempool_free(pmb, phba->mbox_mem_pool); | |
612 | return -EIO; | |
613 | } | |
e40a02c1 | 614 | } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) { |
026abb87 JS |
615 | mempool_free(pmb, phba->mbox_mem_pool); |
616 | rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT); | |
617 | if (rc) | |
618 | return rc; | |
dea3101e | 619 | } |
620 | /* MBOX buffer will be freed in mbox compl */ | |
57127f15 | 621 | pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); |
9f1177a3 JS |
622 | if (!pmb) { |
623 | phba->link_state = LPFC_HBA_ERROR; | |
624 | return -ENOMEM; | |
625 | } | |
626 | ||
57127f15 JS |
627 | lpfc_config_async(phba, pmb, LPFC_ELS_RING); |
628 | pmb->mbox_cmpl = lpfc_config_async_cmpl; | |
629 | pmb->vport = phba->pport; | |
630 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); | |
dea3101e | 631 | |
57127f15 | 632 | if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { |
372c187b | 633 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
57127f15 | 634 | "0456 Adapter failed to issue " |
e4e74273 | 635 | "ASYNCEVT_ENABLE mbox status x%x\n", |
57127f15 JS |
636 | rc); |
637 | mempool_free(pmb, phba->mbox_mem_pool); | |
638 | } | |
97207482 JS |
639 | |
640 | /* Get Option rom version */ | |
641 | pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); | |
9f1177a3 JS |
642 | if (!pmb) { |
643 | phba->link_state = LPFC_HBA_ERROR; | |
644 | return -ENOMEM; | |
645 | } | |
646 | ||
97207482 JS |
647 | lpfc_dump_wakeup_param(phba, pmb); |
648 | pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl; | |
649 | pmb->vport = phba->pport; | |
650 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); | |
651 | ||
652 | if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { | |
372c187b DK |
653 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
654 | "0435 Adapter failed " | |
e4e74273 | 655 | "to get Option ROM version status x%x\n", rc); |
97207482 JS |
656 | mempool_free(pmb, phba->mbox_mem_pool); |
657 | } | |
658 | ||
d7c255b2 | 659 | return 0; |
ce8b3ce5 JS |
660 | } |
661 | ||
84d1b006 JS |
662 | /** |
663 | * lpfc_hba_init_link - Initialize the FC link | |
664 | * @phba: pointer to lpfc hba data structure. | |
6e7288d9 | 665 | * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT |
84d1b006 JS |
666 | * |
667 | * This routine will issue the INIT_LINK mailbox command call. | |
668 | * It is available to other drivers through the lpfc_hba data | |
669 | * structure for use as a delayed link up mechanism with the | |
670 | * module parameter lpfc_suppress_link_up. | |
671 | * | |
672 | * Return code | |
673 | * 0 - success | |
674 | * Any other value - error | |
675 | **/ | |
e399b228 | 676 | static int |
6e7288d9 | 677 | lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag) |
1b51197d JS |
678 | { |
679 | return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag); | |
680 | } | |
681 | ||
682 | /** | |
683 | * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology | |
684 | * @phba: pointer to lpfc hba data structure. | |
685 | * @fc_topology: desired fc topology. | |
686 | * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT | |
687 | * | |
688 | * This routine will issue the INIT_LINK mailbox command call. | |
689 | * It is available to other drivers through the lpfc_hba data | |
690 | * structure for use as a delayed link up mechanism with the | |
691 | * module parameter lpfc_suppress_link_up. | |
692 | * | |
693 | * Return code | |
694 | * 0 - success | |
695 | * Any other value - error | |
696 | **/ | |
697 | int | |
698 | lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology, | |
699 | uint32_t flag) | |
84d1b006 JS |
700 | { |
701 | struct lpfc_vport *vport = phba->pport; | |
702 | LPFC_MBOXQ_t *pmb; | |
703 | MAILBOX_t *mb; | |
704 | int rc; | |
705 | ||
706 | pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); | |
707 | if (!pmb) { | |
708 | phba->link_state = LPFC_HBA_ERROR; | |
709 | return -ENOMEM; | |
710 | } | |
711 | mb = &pmb->u.mb; | |
712 | pmb->vport = vport; | |
713 | ||
026abb87 JS |
714 | if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) || |
715 | ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) && | |
716 | !(phba->lmt & LMT_1Gb)) || | |
717 | ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) && | |
718 | !(phba->lmt & LMT_2Gb)) || | |
719 | ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) && | |
720 | !(phba->lmt & LMT_4Gb)) || | |
721 | ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) && | |
722 | !(phba->lmt & LMT_8Gb)) || | |
723 | ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) && | |
724 | !(phba->lmt & LMT_10Gb)) || | |
725 | ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) && | |
d38dd52c JS |
726 | !(phba->lmt & LMT_16Gb)) || |
727 | ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) && | |
fbd8a6ba JS |
728 | !(phba->lmt & LMT_32Gb)) || |
729 | ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_64G) && | |
730 | !(phba->lmt & LMT_64Gb))) { | |
026abb87 | 731 | /* Reset link speed to auto */ |
372c187b DK |
732 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
733 | "1302 Invalid speed for this board:%d " | |
734 | "Reset link speed to auto.\n", | |
735 | phba->cfg_link_speed); | |
026abb87 JS |
736 | phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO; |
737 | } | |
1b51197d | 738 | lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed); |
84d1b006 | 739 | pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; |
1b51197d JS |
740 | if (phba->sli_rev < LPFC_SLI_REV4) |
741 | lpfc_set_loopback_flag(phba); | |
6e7288d9 | 742 | rc = lpfc_sli_issue_mbox(phba, pmb, flag); |
76a95d75 | 743 | if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { |
372c187b DK |
744 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
745 | "0498 Adapter failed to init, mbxCmd x%x " | |
746 | "INIT_LINK, mbxStatus x%x\n", | |
747 | mb->mbxCommand, mb->mbxStatus); | |
76a95d75 JS |
748 | if (phba->sli_rev <= LPFC_SLI_REV3) { |
749 | /* Clear all interrupt enable conditions */ | |
750 | writel(0, phba->HCregaddr); | |
751 | readl(phba->HCregaddr); /* flush */ | |
752 | /* Clear all pending interrupts */ | |
753 | writel(0xffffffff, phba->HAregaddr); | |
754 | readl(phba->HAregaddr); /* flush */ | |
755 | } | |
84d1b006 | 756 | phba->link_state = LPFC_HBA_ERROR; |
6e7288d9 | 757 | if (rc != MBX_BUSY || flag == MBX_POLL) |
84d1b006 JS |
758 | mempool_free(pmb, phba->mbox_mem_pool); |
759 | return -EIO; | |
760 | } | |
e40a02c1 | 761 | phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK; |
6e7288d9 JS |
762 | if (flag == MBX_POLL) |
763 | mempool_free(pmb, phba->mbox_mem_pool); | |
84d1b006 JS |
764 | |
765 | return 0; | |
766 | } | |
767 | ||
768 | /** | |
769 | * lpfc_hba_down_link - this routine downs the FC link | |
6e7288d9 JS |
770 | * @phba: pointer to lpfc hba data structure. |
771 | * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT | |
84d1b006 JS |
772 | * |
773 | * This routine will issue the DOWN_LINK mailbox command call. | |
774 | * It is available to other drivers through the lpfc_hba data | |
775 | * structure for use to stop the link. | |
776 | * | |
777 | * Return code | |
778 | * 0 - success | |
779 | * Any other value - error | |
780 | **/ | |
e399b228 | 781 | static int |
6e7288d9 | 782 | lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag) |
84d1b006 JS |
783 | { |
784 | LPFC_MBOXQ_t *pmb; | |
785 | int rc; | |
786 | ||
787 | pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); | |
788 | if (!pmb) { | |
789 | phba->link_state = LPFC_HBA_ERROR; | |
790 | return -ENOMEM; | |
791 | } | |
792 | ||
372c187b DK |
793 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
794 | "0491 Adapter Link is disabled.\n"); | |
84d1b006 JS |
795 | lpfc_down_link(phba, pmb); |
796 | pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; | |
6e7288d9 | 797 | rc = lpfc_sli_issue_mbox(phba, pmb, flag); |
84d1b006 | 798 | if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) { |
372c187b DK |
799 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
800 | "2522 Adapter failed to issue DOWN_LINK" | |
801 | " mbox command rc 0x%x\n", rc); | |
84d1b006 JS |
802 | |
803 | mempool_free(pmb, phba->mbox_mem_pool); | |
804 | return -EIO; | |
805 | } | |
6e7288d9 JS |
806 | if (flag == MBX_POLL) |
807 | mempool_free(pmb, phba->mbox_mem_pool); | |
808 | ||
84d1b006 JS |
809 | return 0; |
810 | } | |
811 | ||
e59058c4 | 812 | /** |
3621a710 | 813 | * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset |
e59058c4 JS |
814 | * @phba: pointer to lpfc HBA data structure. |
815 | * | |
816 | * This routine will do LPFC uninitialization before the HBA is reset when | |
817 | * bringing down the SLI Layer. | |
818 | * | |
819 | * Return codes | |
820 | * 0 - success. | |
821 | * Any other value - error. | |
822 | **/ | |
dea3101e | 823 | int |
2e0fef85 | 824 | lpfc_hba_down_prep(struct lpfc_hba *phba) |
dea3101e | 825 | { |
1b32f6aa JS |
826 | struct lpfc_vport **vports; |
827 | int i; | |
3772a991 JS |
828 | |
829 | if (phba->sli_rev <= LPFC_SLI_REV3) { | |
830 | /* Disable interrupts */ | |
831 | writel(0, phba->HCregaddr); | |
832 | readl(phba->HCregaddr); /* flush */ | |
833 | } | |
dea3101e | 834 | |
1b32f6aa JS |
835 | if (phba->pport->load_flag & FC_UNLOADING) |
836 | lpfc_cleanup_discovery_resources(phba->pport); | |
837 | else { | |
838 | vports = lpfc_create_vport_work_array(phba); | |
839 | if (vports != NULL) | |
3772a991 JS |
840 | for (i = 0; i <= phba->max_vports && |
841 | vports[i] != NULL; i++) | |
1b32f6aa JS |
842 | lpfc_cleanup_discovery_resources(vports[i]); |
843 | lpfc_destroy_vport_work_array(phba, vports); | |
7f5f3d0d JS |
844 | } |
845 | return 0; | |
dea3101e | 846 | } |
847 | ||
68e814f5 JS |
848 | /** |
849 | * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free | |
850 | * rspiocb which got deferred | |
851 | * | |
852 | * @phba: pointer to lpfc HBA data structure. | |
853 | * | |
854 | * This routine will cleanup completed slow path events after HBA is reset | |
855 | * when bringing down the SLI Layer. | |
856 | * | |
857 | * | |
858 | * Return codes | |
859 | * void. | |
860 | **/ | |
861 | static void | |
862 | lpfc_sli4_free_sp_events(struct lpfc_hba *phba) | |
863 | { | |
864 | struct lpfc_iocbq *rspiocbq; | |
865 | struct hbq_dmabuf *dmabuf; | |
866 | struct lpfc_cq_event *cq_event; | |
867 | ||
868 | spin_lock_irq(&phba->hbalock); | |
869 | phba->hba_flag &= ~HBA_SP_QUEUE_EVT; | |
870 | spin_unlock_irq(&phba->hbalock); | |
871 | ||
872 | while (!list_empty(&phba->sli4_hba.sp_queue_event)) { | |
873 | /* Get the response iocb from the head of work queue */ | |
874 | spin_lock_irq(&phba->hbalock); | |
875 | list_remove_head(&phba->sli4_hba.sp_queue_event, | |
876 | cq_event, struct lpfc_cq_event, list); | |
877 | spin_unlock_irq(&phba->hbalock); | |
878 | ||
879 | switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) { | |
880 | case CQE_CODE_COMPL_WQE: | |
881 | rspiocbq = container_of(cq_event, struct lpfc_iocbq, | |
882 | cq_event); | |
883 | lpfc_sli_release_iocbq(phba, rspiocbq); | |
884 | break; | |
885 | case CQE_CODE_RECEIVE: | |
886 | case CQE_CODE_RECEIVE_V1: | |
887 | dmabuf = container_of(cq_event, struct hbq_dmabuf, | |
888 | cq_event); | |
889 | lpfc_in_buf_free(phba, &dmabuf->dbuf); | |
890 | } | |
891 | } | |
892 | } | |
893 | ||
e59058c4 | 894 | /** |
bcece5f5 | 895 | * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset |
e59058c4 JS |
896 | * @phba: pointer to lpfc HBA data structure. |
897 | * | |
bcece5f5 JS |
898 | * This routine will cleanup posted ELS buffers after the HBA is reset |
899 | * when bringing down the SLI Layer. | |
900 | * | |
e59058c4 JS |
901 | * |
902 | * Return codes | |
bcece5f5 | 903 | * void. |
e59058c4 | 904 | **/ |
bcece5f5 JS |
905 | static void |
906 | lpfc_hba_free_post_buf(struct lpfc_hba *phba) | |
41415862 JW |
907 | { |
908 | struct lpfc_sli *psli = &phba->sli; | |
909 | struct lpfc_sli_ring *pring; | |
910 | struct lpfc_dmabuf *mp, *next_mp; | |
07eab624 JS |
911 | LIST_HEAD(buflist); |
912 | int count; | |
41415862 | 913 | |
92d7f7b0 JS |
914 | if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) |
915 | lpfc_sli_hbqbuf_free_all(phba); | |
916 | else { | |
917 | /* Cleanup preposted buffers on the ELS ring */ | |
895427bd | 918 | pring = &psli->sli3_ring[LPFC_ELS_RING]; |
07eab624 JS |
919 | spin_lock_irq(&phba->hbalock); |
920 | list_splice_init(&pring->postbufq, &buflist); | |
921 | spin_unlock_irq(&phba->hbalock); | |
922 | ||
923 | count = 0; | |
924 | list_for_each_entry_safe(mp, next_mp, &buflist, list) { | |
92d7f7b0 | 925 | list_del(&mp->list); |
07eab624 | 926 | count++; |
92d7f7b0 JS |
927 | lpfc_mbuf_free(phba, mp->virt, mp->phys); |
928 | kfree(mp); | |
929 | } | |
07eab624 JS |
930 | |
931 | spin_lock_irq(&phba->hbalock); | |
932 | pring->postbufq_cnt -= count; | |
bcece5f5 | 933 | spin_unlock_irq(&phba->hbalock); |
41415862 | 934 | } |
bcece5f5 JS |
935 | } |
936 | ||
937 | /** | |
938 | * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset | |
939 | * @phba: pointer to lpfc HBA data structure. | |
940 | * | |
941 | * This routine will cleanup the txcmplq after the HBA is reset when bringing | |
942 | * down the SLI Layer. | |
943 | * | |
944 | * Return codes | |
945 | * void | |
946 | **/ | |
947 | static void | |
948 | lpfc_hba_clean_txcmplq(struct lpfc_hba *phba) | |
949 | { | |
950 | struct lpfc_sli *psli = &phba->sli; | |
895427bd | 951 | struct lpfc_queue *qp = NULL; |
bcece5f5 JS |
952 | struct lpfc_sli_ring *pring; |
953 | LIST_HEAD(completions); | |
954 | int i; | |
c1dd9111 | 955 | struct lpfc_iocbq *piocb, *next_iocb; |
bcece5f5 | 956 | |
895427bd JS |
957 | if (phba->sli_rev != LPFC_SLI_REV4) { |
958 | for (i = 0; i < psli->num_rings; i++) { | |
959 | pring = &psli->sli3_ring[i]; | |
bcece5f5 | 960 | spin_lock_irq(&phba->hbalock); |
895427bd JS |
961 | /* At this point in time the HBA is either reset or DOA |
962 | * Nothing should be on txcmplq as it will | |
963 | * NEVER complete. | |
964 | */ | |
965 | list_splice_init(&pring->txcmplq, &completions); | |
966 | pring->txcmplq_cnt = 0; | |
bcece5f5 | 967 | spin_unlock_irq(&phba->hbalock); |
09372820 | 968 | |
895427bd JS |
969 | lpfc_sli_abort_iocb_ring(phba, pring); |
970 | } | |
a257bf90 | 971 | /* Cancel all the IOCBs from the completions list */ |
895427bd JS |
972 | lpfc_sli_cancel_iocbs(phba, &completions, |
973 | IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED); | |
974 | return; | |
975 | } | |
976 | list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) { | |
977 | pring = qp->pring; | |
978 | if (!pring) | |
979 | continue; | |
980 | spin_lock_irq(&pring->ring_lock); | |
c1dd9111 JS |
981 | list_for_each_entry_safe(piocb, next_iocb, |
982 | &pring->txcmplq, list) | |
983 | piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ; | |
895427bd JS |
984 | list_splice_init(&pring->txcmplq, &completions); |
985 | pring->txcmplq_cnt = 0; | |
986 | spin_unlock_irq(&pring->ring_lock); | |
41415862 JW |
987 | lpfc_sli_abort_iocb_ring(phba, pring); |
988 | } | |
895427bd JS |
989 | /* Cancel all the IOCBs from the completions list */ |
990 | lpfc_sli_cancel_iocbs(phba, &completions, | |
991 | IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED); | |
bcece5f5 | 992 | } |
41415862 | 993 | |
bcece5f5 JS |
994 | /** |
995 | * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset | |
bcece5f5 JS |
996 | * @phba: pointer to lpfc HBA data structure. |
997 | * | |
998 | * This routine will do uninitialization after the HBA is reset when bring | |
999 | * down the SLI Layer. | |
1000 | * | |
1001 | * Return codes | |
1002 | * 0 - success. | |
1003 | * Any other value - error. | |
1004 | **/ | |
1005 | static int | |
1006 | lpfc_hba_down_post_s3(struct lpfc_hba *phba) | |
1007 | { | |
1008 | lpfc_hba_free_post_buf(phba); | |
1009 | lpfc_hba_clean_txcmplq(phba); | |
41415862 JW |
1010 | return 0; |
1011 | } | |
5af5eee7 | 1012 | |
da0436e9 JS |
1013 | /** |
1014 | * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset | |
1015 | * @phba: pointer to lpfc HBA data structure. | |
1016 | * | |
1017 | * This routine will do uninitialization after the HBA is reset when bring | |
1018 | * down the SLI Layer. | |
1019 | * | |
1020 | * Return codes | |
af901ca1 | 1021 | * 0 - success. |
da0436e9 JS |
1022 | * Any other value - error. |
1023 | **/ | |
1024 | static int | |
1025 | lpfc_hba_down_post_s4(struct lpfc_hba *phba) | |
1026 | { | |
c490850a | 1027 | struct lpfc_io_buf *psb, *psb_next; |
7cacae2a | 1028 | struct lpfc_async_xchg_ctx *ctxp, *ctxp_next; |
5e5b511d | 1029 | struct lpfc_sli4_hdw_queue *qp; |
da0436e9 | 1030 | LIST_HEAD(aborts); |
895427bd | 1031 | LIST_HEAD(nvme_aborts); |
86c67379 | 1032 | LIST_HEAD(nvmet_aborts); |
0f65ff68 | 1033 | struct lpfc_sglq *sglq_entry = NULL; |
5e5b511d | 1034 | int cnt, idx; |
0f65ff68 | 1035 | |
895427bd JS |
1036 | |
1037 | lpfc_sli_hbqbuf_free_all(phba); | |
bcece5f5 JS |
1038 | lpfc_hba_clean_txcmplq(phba); |
1039 | ||
da0436e9 JS |
1040 | /* At this point in time the HBA is either reset or DOA. Either |
1041 | * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be | |
895427bd | 1042 | * on the lpfc_els_sgl_list so that it can either be freed if the |
da0436e9 JS |
1043 | * driver is unloading or reposted if the driver is restarting |
1044 | * the port. | |
1045 | */ | |
895427bd | 1046 | spin_lock_irq(&phba->hbalock); /* required for lpfc_els_sgl_list and */ |
da0436e9 | 1047 | /* scsl_buf_list */ |
895427bd | 1048 | /* sgl_list_lock required because worker thread uses this |
da0436e9 JS |
1049 | * list. |
1050 | */ | |
895427bd | 1051 | spin_lock(&phba->sli4_hba.sgl_list_lock); |
0f65ff68 JS |
1052 | list_for_each_entry(sglq_entry, |
1053 | &phba->sli4_hba.lpfc_abts_els_sgl_list, list) | |
1054 | sglq_entry->state = SGL_FREED; | |
1055 | ||
da0436e9 | 1056 | list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list, |
895427bd JS |
1057 | &phba->sli4_hba.lpfc_els_sgl_list); |
1058 | ||
f358dd0c | 1059 | |
895427bd | 1060 | spin_unlock(&phba->sli4_hba.sgl_list_lock); |
5e5b511d JS |
1061 | |
1062 | /* abts_xxxx_buf_list_lock required because worker thread uses this | |
da0436e9 JS |
1063 | * list. |
1064 | */ | |
5e5b511d JS |
1065 | cnt = 0; |
1066 | for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { | |
1067 | qp = &phba->sli4_hba.hdwq[idx]; | |
da0436e9 | 1068 | |
c00f62e6 JS |
1069 | spin_lock(&qp->abts_io_buf_list_lock); |
1070 | list_splice_init(&qp->lpfc_abts_io_buf_list, | |
5e5b511d | 1071 | &aborts); |
68e814f5 | 1072 | |
0794d601 | 1073 | list_for_each_entry_safe(psb, psb_next, &aborts, list) { |
86c67379 JS |
1074 | psb->pCmd = NULL; |
1075 | psb->status = IOSTAT_SUCCESS; | |
cf1a1d3e | 1076 | cnt++; |
86c67379 | 1077 | } |
5e5b511d JS |
1078 | spin_lock(&qp->io_buf_list_put_lock); |
1079 | list_splice_init(&aborts, &qp->lpfc_io_buf_list_put); | |
1080 | qp->put_io_bufs += qp->abts_scsi_io_bufs; | |
c00f62e6 | 1081 | qp->put_io_bufs += qp->abts_nvme_io_bufs; |
5e5b511d | 1082 | qp->abts_scsi_io_bufs = 0; |
c00f62e6 | 1083 | qp->abts_nvme_io_bufs = 0; |
5e5b511d | 1084 | spin_unlock(&qp->io_buf_list_put_lock); |
c00f62e6 | 1085 | spin_unlock(&qp->abts_io_buf_list_lock); |
5e5b511d | 1086 | } |
731eedcb | 1087 | spin_unlock_irq(&phba->hbalock); |
86c67379 | 1088 | |
5e5b511d | 1089 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { |
731eedcb | 1090 | spin_lock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock); |
5e5b511d JS |
1091 | list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list, |
1092 | &nvmet_aborts); | |
731eedcb | 1093 | spin_unlock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock); |
86c67379 | 1094 | list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) { |
7b7f551b | 1095 | ctxp->flag &= ~(LPFC_NVME_XBUSY | LPFC_NVME_ABORT_OP); |
6c621a22 | 1096 | lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf); |
86c67379 | 1097 | } |
895427bd | 1098 | } |
895427bd | 1099 | |
68e814f5 | 1100 | lpfc_sli4_free_sp_events(phba); |
5e5b511d | 1101 | return cnt; |
da0436e9 JS |
1102 | } |
1103 | ||
1104 | /** | |
1105 | * lpfc_hba_down_post - Wrapper func for hba down post routine | |
1106 | * @phba: pointer to lpfc HBA data structure. | |
1107 | * | |
1108 | * This routine wraps the actual SLI3 or SLI4 routine for performing | |
1109 | * uninitialization after the HBA is reset when bring down the SLI Layer. | |
1110 | * | |
1111 | * Return codes | |
af901ca1 | 1112 | * 0 - success. |
da0436e9 JS |
1113 | * Any other value - error. |
1114 | **/ | |
1115 | int | |
1116 | lpfc_hba_down_post(struct lpfc_hba *phba) | |
1117 | { | |
1118 | return (*phba->lpfc_hba_down_post)(phba); | |
1119 | } | |
41415862 | 1120 | |
e59058c4 | 1121 | /** |
3621a710 | 1122 | * lpfc_hb_timeout - The HBA-timer timeout handler |
fe614acd | 1123 | * @t: timer context used to obtain the pointer to lpfc hba data structure. |
e59058c4 JS |
1124 | * |
1125 | * This is the HBA-timer timeout handler registered to the lpfc driver. When | |
1126 | * this timer fires, a HBA timeout event shall be posted to the lpfc driver | |
1127 | * work-port-events bitmap and the worker thread is notified. This timeout | |
1128 | * event will be used by the worker thread to invoke the actual timeout | |
1129 | * handler routine, lpfc_hb_timeout_handler. Any periodical operations will | |
1130 | * be performed in the timeout handler and the HBA timeout event bit shall | |
1131 | * be cleared by the worker thread after it has taken the event bitmap out. | |
1132 | **/ | |
a6ababd2 | 1133 | static void |
f22eb4d3 | 1134 | lpfc_hb_timeout(struct timer_list *t) |
858c9f6c JS |
1135 | { |
1136 | struct lpfc_hba *phba; | |
5e9d9b82 | 1137 | uint32_t tmo_posted; |
858c9f6c JS |
1138 | unsigned long iflag; |
1139 | ||
f22eb4d3 | 1140 | phba = from_timer(phba, t, hb_tmofunc); |
9399627f JS |
1141 | |
1142 | /* Check for heart beat timeout conditions */ | |
858c9f6c | 1143 | spin_lock_irqsave(&phba->pport->work_port_lock, iflag); |
5e9d9b82 JS |
1144 | tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO; |
1145 | if (!tmo_posted) | |
858c9f6c JS |
1146 | phba->pport->work_port_events |= WORKER_HB_TMO; |
1147 | spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag); | |
1148 | ||
9399627f | 1149 | /* Tell the worker thread there is work to do */ |
5e9d9b82 JS |
1150 | if (!tmo_posted) |
1151 | lpfc_worker_wake_up(phba); | |
858c9f6c JS |
1152 | return; |
1153 | } | |
1154 | ||
19ca7609 JS |
1155 | /** |
1156 | * lpfc_rrq_timeout - The RRQ-timer timeout handler | |
fe614acd | 1157 | * @t: timer context used to obtain the pointer to lpfc hba data structure. |
19ca7609 JS |
1158 | * |
1159 | * This is the RRQ-timer timeout handler registered to the lpfc driver. When | |
1160 | * this timer fires, a RRQ timeout event shall be posted to the lpfc driver | |
1161 | * work-port-events bitmap and the worker thread is notified. This timeout | |
1162 | * event will be used by the worker thread to invoke the actual timeout | |
1163 | * handler routine, lpfc_rrq_handler. Any periodical operations will | |
1164 | * be performed in the timeout handler and the RRQ timeout event bit shall | |
1165 | * be cleared by the worker thread after it has taken the event bitmap out. | |
1166 | **/ | |
1167 | static void | |
f22eb4d3 | 1168 | lpfc_rrq_timeout(struct timer_list *t) |
19ca7609 JS |
1169 | { |
1170 | struct lpfc_hba *phba; | |
19ca7609 JS |
1171 | unsigned long iflag; |
1172 | ||
f22eb4d3 | 1173 | phba = from_timer(phba, t, rrq_tmr); |
19ca7609 | 1174 | spin_lock_irqsave(&phba->pport->work_port_lock, iflag); |
06918ac5 JS |
1175 | if (!(phba->pport->load_flag & FC_UNLOADING)) |
1176 | phba->hba_flag |= HBA_RRQ_ACTIVE; | |
1177 | else | |
1178 | phba->hba_flag &= ~HBA_RRQ_ACTIVE; | |
19ca7609 | 1179 | spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag); |
06918ac5 JS |
1180 | |
1181 | if (!(phba->pport->load_flag & FC_UNLOADING)) | |
1182 | lpfc_worker_wake_up(phba); | |
19ca7609 JS |
1183 | } |
1184 | ||
e59058c4 | 1185 | /** |
3621a710 | 1186 | * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function |
e59058c4 JS |
1187 | * @phba: pointer to lpfc hba data structure. |
1188 | * @pmboxq: pointer to the driver internal queue element for mailbox command. | |
1189 | * | |
1190 | * This is the callback function to the lpfc heart-beat mailbox command. | |
1191 | * If configured, the lpfc driver issues the heart-beat mailbox command to | |
1192 | * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the | |
1193 | * heart-beat mailbox command is issued, the driver shall set up heart-beat | |
1194 | * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks | |
1195 | * heart-beat outstanding state. Once the mailbox command comes back and | |
1196 | * no error conditions detected, the heart-beat mailbox command timer is | |
1197 | * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding | |
1198 | * state is cleared for the next heart-beat. If the timer expired with the | |
1199 | * heart-beat outstanding state set, the driver will put the HBA offline. | |
1200 | **/ | |
858c9f6c JS |
1201 | static void |
1202 | lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq) | |
1203 | { | |
1204 | unsigned long drvr_flag; | |
1205 | ||
1206 | spin_lock_irqsave(&phba->hbalock, drvr_flag); | |
1207 | phba->hb_outstanding = 0; | |
1208 | spin_unlock_irqrestore(&phba->hbalock, drvr_flag); | |
1209 | ||
9399627f | 1210 | /* Check and reset heart-beat timer is necessary */ |
858c9f6c JS |
1211 | mempool_free(pmboxq, phba->mbox_mem_pool); |
1212 | if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) && | |
1213 | !(phba->link_state == LPFC_HBA_ERROR) && | |
51ef4c26 | 1214 | !(phba->pport->load_flag & FC_UNLOADING)) |
858c9f6c | 1215 | mod_timer(&phba->hb_tmofunc, |
256ec0d0 JS |
1216 | jiffies + |
1217 | msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL)); | |
858c9f6c JS |
1218 | return; |
1219 | } | |
1220 | ||
fe614acd | 1221 | /* |
317aeb83 DK |
1222 | * lpfc_idle_stat_delay_work - idle_stat tracking |
1223 | * | |
1224 | * This routine tracks per-cq idle_stat and determines polling decisions. | |
1225 | * | |
1226 | * Return codes: | |
1227 | * None | |
1228 | **/ | |
1229 | static void | |
1230 | lpfc_idle_stat_delay_work(struct work_struct *work) | |
1231 | { | |
1232 | struct lpfc_hba *phba = container_of(to_delayed_work(work), | |
1233 | struct lpfc_hba, | |
1234 | idle_stat_delay_work); | |
1235 | struct lpfc_queue *cq; | |
1236 | struct lpfc_sli4_hdw_queue *hdwq; | |
1237 | struct lpfc_idle_stat *idle_stat; | |
1238 | u32 i, idle_percent; | |
1239 | u64 wall, wall_idle, diff_wall, diff_idle, busy_time; | |
1240 | ||
1241 | if (phba->pport->load_flag & FC_UNLOADING) | |
1242 | return; | |
1243 | ||
1244 | if (phba->link_state == LPFC_HBA_ERROR || | |
1245 | phba->pport->fc_flag & FC_OFFLINE_MODE) | |
1246 | goto requeue; | |
1247 | ||
1248 | for_each_present_cpu(i) { | |
1249 | hdwq = &phba->sli4_hba.hdwq[phba->sli4_hba.cpu_map[i].hdwq]; | |
1250 | cq = hdwq->io_cq; | |
1251 | ||
1252 | /* Skip if we've already handled this cq's primary CPU */ | |
1253 | if (cq->chann != i) | |
1254 | continue; | |
1255 | ||
1256 | idle_stat = &phba->sli4_hba.idle_stat[i]; | |
1257 | ||
1258 | /* get_cpu_idle_time returns values as running counters. Thus, | |
1259 | * to know the amount for this period, the prior counter values | |
1260 | * need to be subtracted from the current counter values. | |
1261 | * From there, the idle time stat can be calculated as a | |
1262 | * percentage of 100 - the sum of the other consumption times. | |
1263 | */ | |
1264 | wall_idle = get_cpu_idle_time(i, &wall, 1); | |
1265 | diff_idle = wall_idle - idle_stat->prev_idle; | |
1266 | diff_wall = wall - idle_stat->prev_wall; | |
1267 | ||
1268 | if (diff_wall <= diff_idle) | |
1269 | busy_time = 0; | |
1270 | else | |
1271 | busy_time = diff_wall - diff_idle; | |
1272 | ||
1273 | idle_percent = div64_u64(100 * busy_time, diff_wall); | |
1274 | idle_percent = 100 - idle_percent; | |
1275 | ||
1276 | if (idle_percent < 15) | |
1277 | cq->poll_mode = LPFC_QUEUE_WORK; | |
1278 | else | |
1279 | cq->poll_mode = LPFC_IRQ_POLL; | |
1280 | ||
1281 | idle_stat->prev_idle = wall_idle; | |
1282 | idle_stat->prev_wall = wall; | |
1283 | } | |
1284 | ||
1285 | requeue: | |
1286 | schedule_delayed_work(&phba->idle_stat_delay_work, | |
1287 | msecs_to_jiffies(LPFC_IDLE_STAT_DELAY)); | |
1288 | } | |
1289 | ||
32517fc0 JS |
1290 | static void |
1291 | lpfc_hb_eq_delay_work(struct work_struct *work) | |
1292 | { | |
1293 | struct lpfc_hba *phba = container_of(to_delayed_work(work), | |
1294 | struct lpfc_hba, eq_delay_work); | |
1295 | struct lpfc_eq_intr_info *eqi, *eqi_new; | |
1296 | struct lpfc_queue *eq, *eq_next; | |
8156d378 | 1297 | unsigned char *ena_delay = NULL; |
32517fc0 JS |
1298 | uint32_t usdelay; |
1299 | int i; | |
1300 | ||
1301 | if (!phba->cfg_auto_imax || phba->pport->load_flag & FC_UNLOADING) | |
1302 | return; | |
1303 | ||
1304 | if (phba->link_state == LPFC_HBA_ERROR || | |
1305 | phba->pport->fc_flag & FC_OFFLINE_MODE) | |
1306 | goto requeue; | |
1307 | ||
8156d378 JS |
1308 | ena_delay = kcalloc(phba->sli4_hba.num_possible_cpu, sizeof(*ena_delay), |
1309 | GFP_KERNEL); | |
1310 | if (!ena_delay) | |
32517fc0 JS |
1311 | goto requeue; |
1312 | ||
8156d378 JS |
1313 | for (i = 0; i < phba->cfg_irq_chann; i++) { |
1314 | /* Get the EQ corresponding to the IRQ vector */ | |
1315 | eq = phba->sli4_hba.hba_eq_hdl[i].eq; | |
1316 | if (!eq) | |
1317 | continue; | |
1318 | if (eq->q_mode || eq->q_flag & HBA_EQ_DELAY_CHK) { | |
1319 | eq->q_flag &= ~HBA_EQ_DELAY_CHK; | |
1320 | ena_delay[eq->last_cpu] = 1; | |
8d34a59c | 1321 | } |
8156d378 | 1322 | } |
32517fc0 JS |
1323 | |
1324 | for_each_present_cpu(i) { | |
32517fc0 | 1325 | eqi = per_cpu_ptr(phba->sli4_hba.eq_info, i); |
8156d378 JS |
1326 | if (ena_delay[i]) { |
1327 | usdelay = (eqi->icnt >> 10) * LPFC_EQ_DELAY_STEP; | |
1328 | if (usdelay > LPFC_MAX_AUTO_EQ_DELAY) | |
1329 | usdelay = LPFC_MAX_AUTO_EQ_DELAY; | |
1330 | } else { | |
1331 | usdelay = 0; | |
8d34a59c | 1332 | } |
32517fc0 | 1333 | |
32517fc0 JS |
1334 | eqi->icnt = 0; |
1335 | ||
1336 | list_for_each_entry_safe(eq, eq_next, &eqi->list, cpu_list) { | |
8156d378 | 1337 | if (unlikely(eq->last_cpu != i)) { |
32517fc0 JS |
1338 | eqi_new = per_cpu_ptr(phba->sli4_hba.eq_info, |
1339 | eq->last_cpu); | |
1340 | list_move_tail(&eq->cpu_list, &eqi_new->list); | |
1341 | continue; | |
1342 | } | |
1343 | if (usdelay != eq->q_mode) | |
1344 | lpfc_modify_hba_eq_delay(phba, eq->hdwq, 1, | |
1345 | usdelay); | |
1346 | } | |
1347 | } | |
1348 | ||
8156d378 | 1349 | kfree(ena_delay); |
32517fc0 JS |
1350 | |
1351 | requeue: | |
1352 | queue_delayed_work(phba->wq, &phba->eq_delay_work, | |
1353 | msecs_to_jiffies(LPFC_EQ_DELAY_MSECS)); | |
1354 | } | |
1355 | ||
c490850a JS |
1356 | /** |
1357 | * lpfc_hb_mxp_handler - Multi-XRI pools handler to adjust XRI distribution | |
1358 | * @phba: pointer to lpfc hba data structure. | |
1359 | * | |
1360 | * For each heartbeat, this routine does some heuristic methods to adjust | |
1361 | * XRI distribution. The goal is to fully utilize free XRIs. | |
1362 | **/ | |
1363 | static void lpfc_hb_mxp_handler(struct lpfc_hba *phba) | |
1364 | { | |
1365 | u32 i; | |
1366 | u32 hwq_count; | |
1367 | ||
1368 | hwq_count = phba->cfg_hdw_queue; | |
1369 | for (i = 0; i < hwq_count; i++) { | |
1370 | /* Adjust XRIs in private pool */ | |
1371 | lpfc_adjust_pvt_pool_count(phba, i); | |
1372 | ||
1373 | /* Adjust high watermark */ | |
1374 | lpfc_adjust_high_watermark(phba, i); | |
1375 | ||
1376 | #ifdef LPFC_MXP_STAT | |
1377 | /* Snapshot pbl, pvt and busy count */ | |
1378 | lpfc_snapshot_mxp(phba, i); | |
1379 | #endif | |
1380 | } | |
1381 | } | |
1382 | ||
e59058c4 | 1383 | /** |
3621a710 | 1384 | * lpfc_hb_timeout_handler - The HBA-timer timeout handler |
e59058c4 JS |
1385 | * @phba: pointer to lpfc hba data structure. |
1386 | * | |
1387 | * This is the actual HBA-timer timeout handler to be invoked by the worker | |
1388 | * thread whenever the HBA timer fired and HBA-timeout event posted. This | |
1389 | * handler performs any periodic operations needed for the device. If such | |
1390 | * periodic event has already been attended to either in the interrupt handler | |
1391 | * or by processing slow-ring or fast-ring events within the HBA-timer | |
1392 | * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets | |
1393 | * the timer for the next timeout period. If lpfc heart-beat mailbox command | |
1394 | * is configured and there is no heart-beat mailbox command outstanding, a | |
1395 | * heart-beat mailbox is issued and timer set properly. Otherwise, if there | |
1396 | * has been a heart-beat mailbox command outstanding, the HBA shall be put | |
1397 | * to offline. | |
1398 | **/ | |
858c9f6c JS |
1399 | void |
1400 | lpfc_hb_timeout_handler(struct lpfc_hba *phba) | |
1401 | { | |
45ed1190 | 1402 | struct lpfc_vport **vports; |
858c9f6c | 1403 | LPFC_MBOXQ_t *pmboxq; |
0ff10d46 | 1404 | struct lpfc_dmabuf *buf_ptr; |
45ed1190 | 1405 | int retval, i; |
858c9f6c | 1406 | struct lpfc_sli *psli = &phba->sli; |
0ff10d46 | 1407 | LIST_HEAD(completions); |
858c9f6c | 1408 | |
c490850a JS |
1409 | if (phba->cfg_xri_rebalancing) { |
1410 | /* Multi-XRI pools handler */ | |
1411 | lpfc_hb_mxp_handler(phba); | |
1412 | } | |
858c9f6c | 1413 | |
45ed1190 JS |
1414 | vports = lpfc_create_vport_work_array(phba); |
1415 | if (vports != NULL) | |
4258e98e | 1416 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { |
45ed1190 | 1417 | lpfc_rcv_seq_check_edtov(vports[i]); |
e3ba04c9 | 1418 | lpfc_fdmi_change_check(vports[i]); |
4258e98e | 1419 | } |
45ed1190 JS |
1420 | lpfc_destroy_vport_work_array(phba, vports); |
1421 | ||
858c9f6c | 1422 | if ((phba->link_state == LPFC_HBA_ERROR) || |
51ef4c26 | 1423 | (phba->pport->load_flag & FC_UNLOADING) || |
858c9f6c JS |
1424 | (phba->pport->fc_flag & FC_OFFLINE_MODE)) |
1425 | return; | |
1426 | ||
1427 | spin_lock_irq(&phba->pport->work_port_lock); | |
858c9f6c | 1428 | |
256ec0d0 JS |
1429 | if (time_after(phba->last_completion_time + |
1430 | msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL), | |
1431 | jiffies)) { | |
858c9f6c JS |
1432 | spin_unlock_irq(&phba->pport->work_port_lock); |
1433 | if (!phba->hb_outstanding) | |
1434 | mod_timer(&phba->hb_tmofunc, | |
256ec0d0 JS |
1435 | jiffies + |
1436 | msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL)); | |
858c9f6c JS |
1437 | else |
1438 | mod_timer(&phba->hb_tmofunc, | |
256ec0d0 JS |
1439 | jiffies + |
1440 | msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT)); | |
858c9f6c JS |
1441 | return; |
1442 | } | |
1443 | spin_unlock_irq(&phba->pport->work_port_lock); | |
1444 | ||
0ff10d46 JS |
1445 | if (phba->elsbuf_cnt && |
1446 | (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) { | |
1447 | spin_lock_irq(&phba->hbalock); | |
1448 | list_splice_init(&phba->elsbuf, &completions); | |
1449 | phba->elsbuf_cnt = 0; | |
1450 | phba->elsbuf_prev_cnt = 0; | |
1451 | spin_unlock_irq(&phba->hbalock); | |
1452 | ||
1453 | while (!list_empty(&completions)) { | |
1454 | list_remove_head(&completions, buf_ptr, | |
1455 | struct lpfc_dmabuf, list); | |
1456 | lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys); | |
1457 | kfree(buf_ptr); | |
1458 | } | |
1459 | } | |
1460 | phba->elsbuf_prev_cnt = phba->elsbuf_cnt; | |
1461 | ||
858c9f6c | 1462 | /* If there is no heart beat outstanding, issue a heartbeat command */ |
13815c83 JS |
1463 | if (phba->cfg_enable_hba_heartbeat) { |
1464 | if (!phba->hb_outstanding) { | |
bc73905a JS |
1465 | if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) && |
1466 | (list_empty(&psli->mboxq))) { | |
1467 | pmboxq = mempool_alloc(phba->mbox_mem_pool, | |
1468 | GFP_KERNEL); | |
1469 | if (!pmboxq) { | |
1470 | mod_timer(&phba->hb_tmofunc, | |
1471 | jiffies + | |
256ec0d0 JS |
1472 | msecs_to_jiffies(1000 * |
1473 | LPFC_HB_MBOX_INTERVAL)); | |
bc73905a JS |
1474 | return; |
1475 | } | |
1476 | ||
1477 | lpfc_heart_beat(phba, pmboxq); | |
1478 | pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl; | |
1479 | pmboxq->vport = phba->pport; | |
1480 | retval = lpfc_sli_issue_mbox(phba, pmboxq, | |
1481 | MBX_NOWAIT); | |
1482 | ||
1483 | if (retval != MBX_BUSY && | |
1484 | retval != MBX_SUCCESS) { | |
1485 | mempool_free(pmboxq, | |
1486 | phba->mbox_mem_pool); | |
1487 | mod_timer(&phba->hb_tmofunc, | |
1488 | jiffies + | |
256ec0d0 JS |
1489 | msecs_to_jiffies(1000 * |
1490 | LPFC_HB_MBOX_INTERVAL)); | |
bc73905a JS |
1491 | return; |
1492 | } | |
1493 | phba->skipped_hb = 0; | |
1494 | phba->hb_outstanding = 1; | |
1495 | } else if (time_before_eq(phba->last_completion_time, | |
1496 | phba->skipped_hb)) { | |
1497 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
1498 | "2857 Last completion time not " | |
1499 | " updated in %d ms\n", | |
1500 | jiffies_to_msecs(jiffies | |
1501 | - phba->last_completion_time)); | |
1502 | } else | |
1503 | phba->skipped_hb = jiffies; | |
1504 | ||
858c9f6c | 1505 | mod_timer(&phba->hb_tmofunc, |
256ec0d0 JS |
1506 | jiffies + |
1507 | msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT)); | |
858c9f6c | 1508 | return; |
13815c83 JS |
1509 | } else { |
1510 | /* | |
1511 | * If heart beat timeout called with hb_outstanding set | |
dcf2a4e0 JS |
1512 | * we need to give the hb mailbox cmd a chance to |
1513 | * complete or TMO. | |
13815c83 | 1514 | */ |
dcf2a4e0 JS |
1515 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, |
1516 | "0459 Adapter heartbeat still out" | |
1517 | "standing:last compl time was %d ms.\n", | |
1518 | jiffies_to_msecs(jiffies | |
1519 | - phba->last_completion_time)); | |
1520 | mod_timer(&phba->hb_tmofunc, | |
256ec0d0 JS |
1521 | jiffies + |
1522 | msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT)); | |
858c9f6c | 1523 | } |
4258e98e JS |
1524 | } else { |
1525 | mod_timer(&phba->hb_tmofunc, | |
1526 | jiffies + | |
1527 | msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL)); | |
858c9f6c JS |
1528 | } |
1529 | } | |
1530 | ||
e59058c4 | 1531 | /** |
3621a710 | 1532 | * lpfc_offline_eratt - Bring lpfc offline on hardware error attention |
e59058c4 JS |
1533 | * @phba: pointer to lpfc hba data structure. |
1534 | * | |
1535 | * This routine is called to bring the HBA offline when HBA hardware error | |
1536 | * other than Port Error 6 has been detected. | |
1537 | **/ | |
09372820 JS |
1538 | static void |
1539 | lpfc_offline_eratt(struct lpfc_hba *phba) | |
1540 | { | |
1541 | struct lpfc_sli *psli = &phba->sli; | |
1542 | ||
1543 | spin_lock_irq(&phba->hbalock); | |
f4b4c68f | 1544 | psli->sli_flag &= ~LPFC_SLI_ACTIVE; |
09372820 | 1545 | spin_unlock_irq(&phba->hbalock); |
618a5230 | 1546 | lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); |
09372820 JS |
1547 | |
1548 | lpfc_offline(phba); | |
1549 | lpfc_reset_barrier(phba); | |
f4b4c68f | 1550 | spin_lock_irq(&phba->hbalock); |
09372820 | 1551 | lpfc_sli_brdreset(phba); |
f4b4c68f | 1552 | spin_unlock_irq(&phba->hbalock); |
09372820 JS |
1553 | lpfc_hba_down_post(phba); |
1554 | lpfc_sli_brdready(phba, HS_MBRDY); | |
1555 | lpfc_unblock_mgmt_io(phba); | |
1556 | phba->link_state = LPFC_HBA_ERROR; | |
1557 | return; | |
1558 | } | |
1559 | ||
da0436e9 JS |
1560 | /** |
1561 | * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention | |
1562 | * @phba: pointer to lpfc hba data structure. | |
1563 | * | |
1564 | * This routine is called to bring a SLI4 HBA offline when HBA hardware error | |
1565 | * other than Port Error 6 has been detected. | |
1566 | **/ | |
a88dbb6a | 1567 | void |
da0436e9 JS |
1568 | lpfc_sli4_offline_eratt(struct lpfc_hba *phba) |
1569 | { | |
946727dc JS |
1570 | spin_lock_irq(&phba->hbalock); |
1571 | phba->link_state = LPFC_HBA_ERROR; | |
1572 | spin_unlock_irq(&phba->hbalock); | |
1573 | ||
618a5230 | 1574 | lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); |
c00f62e6 | 1575 | lpfc_sli_flush_io_rings(phba); |
da0436e9 | 1576 | lpfc_offline(phba); |
da0436e9 | 1577 | lpfc_hba_down_post(phba); |
da0436e9 | 1578 | lpfc_unblock_mgmt_io(phba); |
da0436e9 JS |
1579 | } |
1580 | ||
a257bf90 JS |
1581 | /** |
1582 | * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler | |
1583 | * @phba: pointer to lpfc hba data structure. | |
1584 | * | |
1585 | * This routine is invoked to handle the deferred HBA hardware error | |
1586 | * conditions. This type of error is indicated by HBA by setting ER1 | |
1587 | * and another ER bit in the host status register. The driver will | |
1588 | * wait until the ER1 bit clears before handling the error condition. | |
1589 | **/ | |
1590 | static void | |
1591 | lpfc_handle_deferred_eratt(struct lpfc_hba *phba) | |
1592 | { | |
1593 | uint32_t old_host_status = phba->work_hs; | |
a257bf90 JS |
1594 | struct lpfc_sli *psli = &phba->sli; |
1595 | ||
f4b4c68f JS |
1596 | /* If the pci channel is offline, ignore possible errors, |
1597 | * since we cannot communicate with the pci card anyway. | |
1598 | */ | |
1599 | if (pci_channel_offline(phba->pcidev)) { | |
1600 | spin_lock_irq(&phba->hbalock); | |
1601 | phba->hba_flag &= ~DEFER_ERATT; | |
1602 | spin_unlock_irq(&phba->hbalock); | |
1603 | return; | |
1604 | } | |
1605 | ||
372c187b DK |
1606 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
1607 | "0479 Deferred Adapter Hardware Error " | |
1608 | "Data: x%x x%x x%x\n", | |
1609 | phba->work_hs, phba->work_status[0], | |
1610 | phba->work_status[1]); | |
a257bf90 JS |
1611 | |
1612 | spin_lock_irq(&phba->hbalock); | |
f4b4c68f | 1613 | psli->sli_flag &= ~LPFC_SLI_ACTIVE; |
a257bf90 JS |
1614 | spin_unlock_irq(&phba->hbalock); |
1615 | ||
1616 | ||
1617 | /* | |
1618 | * Firmware stops when it triggred erratt. That could cause the I/Os | |
1619 | * dropped by the firmware. Error iocb (I/O) on txcmplq and let the | |
1620 | * SCSI layer retry it after re-establishing link. | |
1621 | */ | |
db55fba8 | 1622 | lpfc_sli_abort_fcp_rings(phba); |
a257bf90 JS |
1623 | |
1624 | /* | |
1625 | * There was a firmware error. Take the hba offline and then | |
1626 | * attempt to restart it. | |
1627 | */ | |
618a5230 | 1628 | lpfc_offline_prep(phba, LPFC_MBX_WAIT); |
a257bf90 JS |
1629 | lpfc_offline(phba); |
1630 | ||
1631 | /* Wait for the ER1 bit to clear.*/ | |
1632 | while (phba->work_hs & HS_FFER1) { | |
1633 | msleep(100); | |
9940b97b JS |
1634 | if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) { |
1635 | phba->work_hs = UNPLUG_ERR ; | |
1636 | break; | |
1637 | } | |
a257bf90 JS |
1638 | /* If driver is unloading let the worker thread continue */ |
1639 | if (phba->pport->load_flag & FC_UNLOADING) { | |
1640 | phba->work_hs = 0; | |
1641 | break; | |
1642 | } | |
1643 | } | |
1644 | ||
1645 | /* | |
1646 | * This is to ptrotect against a race condition in which | |
1647 | * first write to the host attention register clear the | |
1648 | * host status register. | |
1649 | */ | |
1650 | if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING))) | |
1651 | phba->work_hs = old_host_status & ~HS_FFER1; | |
1652 | ||
3772a991 | 1653 | spin_lock_irq(&phba->hbalock); |
a257bf90 | 1654 | phba->hba_flag &= ~DEFER_ERATT; |
3772a991 | 1655 | spin_unlock_irq(&phba->hbalock); |
a257bf90 JS |
1656 | phba->work_status[0] = readl(phba->MBslimaddr + 0xa8); |
1657 | phba->work_status[1] = readl(phba->MBslimaddr + 0xac); | |
1658 | } | |
1659 | ||
3772a991 JS |
1660 | static void |
1661 | lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba) | |
1662 | { | |
1663 | struct lpfc_board_event_header board_event; | |
1664 | struct Scsi_Host *shost; | |
1665 | ||
1666 | board_event.event_type = FC_REG_BOARD_EVENT; | |
1667 | board_event.subcategory = LPFC_EVENT_PORTINTERR; | |
1668 | shost = lpfc_shost_from_vport(phba->pport); | |
1669 | fc_host_post_vendor_event(shost, fc_get_event_number(), | |
1670 | sizeof(board_event), | |
1671 | (char *) &board_event, | |
1672 | LPFC_NL_VENDOR_ID); | |
1673 | } | |
1674 | ||
e59058c4 | 1675 | /** |
3772a991 | 1676 | * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler |
e59058c4 JS |
1677 | * @phba: pointer to lpfc hba data structure. |
1678 | * | |
1679 | * This routine is invoked to handle the following HBA hardware error | |
1680 | * conditions: | |
1681 | * 1 - HBA error attention interrupt | |
1682 | * 2 - DMA ring index out of range | |
1683 | * 3 - Mailbox command came back as unknown | |
1684 | **/ | |
3772a991 JS |
1685 | static void |
1686 | lpfc_handle_eratt_s3(struct lpfc_hba *phba) | |
dea3101e | 1687 | { |
2e0fef85 | 1688 | struct lpfc_vport *vport = phba->pport; |
2e0fef85 | 1689 | struct lpfc_sli *psli = &phba->sli; |
d2873e4c | 1690 | uint32_t event_data; |
57127f15 JS |
1691 | unsigned long temperature; |
1692 | struct temp_event temp_event_data; | |
92d7f7b0 | 1693 | struct Scsi_Host *shost; |
2e0fef85 | 1694 | |
8d63f375 | 1695 | /* If the pci channel is offline, ignore possible errors, |
3772a991 JS |
1696 | * since we cannot communicate with the pci card anyway. |
1697 | */ | |
1698 | if (pci_channel_offline(phba->pcidev)) { | |
1699 | spin_lock_irq(&phba->hbalock); | |
1700 | phba->hba_flag &= ~DEFER_ERATT; | |
1701 | spin_unlock_irq(&phba->hbalock); | |
8d63f375 | 1702 | return; |
3772a991 JS |
1703 | } |
1704 | ||
13815c83 JS |
1705 | /* If resets are disabled then leave the HBA alone and return */ |
1706 | if (!phba->cfg_enable_hba_reset) | |
1707 | return; | |
dea3101e | 1708 | |
ea2151b4 | 1709 | /* Send an internal error event to mgmt application */ |
3772a991 | 1710 | lpfc_board_errevt_to_mgmt(phba); |
ea2151b4 | 1711 | |
a257bf90 JS |
1712 | if (phba->hba_flag & DEFER_ERATT) |
1713 | lpfc_handle_deferred_eratt(phba); | |
1714 | ||
dcf2a4e0 JS |
1715 | if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) { |
1716 | if (phba->work_hs & HS_FFER6) | |
1717 | /* Re-establishing Link */ | |
1718 | lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT, | |
1719 | "1301 Re-establishing Link " | |
1720 | "Data: x%x x%x x%x\n", | |
1721 | phba->work_hs, phba->work_status[0], | |
1722 | phba->work_status[1]); | |
1723 | if (phba->work_hs & HS_FFER8) | |
1724 | /* Device Zeroization */ | |
1725 | lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT, | |
1726 | "2861 Host Authentication device " | |
1727 | "zeroization Data:x%x x%x x%x\n", | |
1728 | phba->work_hs, phba->work_status[0], | |
1729 | phba->work_status[1]); | |
58da1ffb | 1730 | |
92d7f7b0 | 1731 | spin_lock_irq(&phba->hbalock); |
f4b4c68f | 1732 | psli->sli_flag &= ~LPFC_SLI_ACTIVE; |
92d7f7b0 | 1733 | spin_unlock_irq(&phba->hbalock); |
dea3101e | 1734 | |
1735 | /* | |
1736 | * Firmware stops when it triggled erratt with HS_FFER6. | |
1737 | * That could cause the I/Os dropped by the firmware. | |
1738 | * Error iocb (I/O) on txcmplq and let the SCSI layer | |
1739 | * retry it after re-establishing link. | |
1740 | */ | |
db55fba8 | 1741 | lpfc_sli_abort_fcp_rings(phba); |
dea3101e | 1742 | |
dea3101e | 1743 | /* |
1744 | * There was a firmware error. Take the hba offline and then | |
1745 | * attempt to restart it. | |
1746 | */ | |
618a5230 | 1747 | lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); |
dea3101e | 1748 | lpfc_offline(phba); |
41415862 | 1749 | lpfc_sli_brdrestart(phba); |
dea3101e | 1750 | if (lpfc_online(phba) == 0) { /* Initialize the HBA */ |
46fa311e | 1751 | lpfc_unblock_mgmt_io(phba); |
dea3101e | 1752 | return; |
1753 | } | |
46fa311e | 1754 | lpfc_unblock_mgmt_io(phba); |
57127f15 JS |
1755 | } else if (phba->work_hs & HS_CRIT_TEMP) { |
1756 | temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET); | |
1757 | temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; | |
1758 | temp_event_data.event_code = LPFC_CRIT_TEMP; | |
1759 | temp_event_data.data = (uint32_t)temperature; | |
1760 | ||
372c187b | 1761 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
d7c255b2 | 1762 | "0406 Adapter maximum temperature exceeded " |
57127f15 JS |
1763 | "(%ld), taking this port offline " |
1764 | "Data: x%x x%x x%x\n", | |
1765 | temperature, phba->work_hs, | |
1766 | phba->work_status[0], phba->work_status[1]); | |
1767 | ||
1768 | shost = lpfc_shost_from_vport(phba->pport); | |
1769 | fc_host_post_vendor_event(shost, fc_get_event_number(), | |
1770 | sizeof(temp_event_data), | |
1771 | (char *) &temp_event_data, | |
1772 | SCSI_NL_VID_TYPE_PCI | |
1773 | | PCI_VENDOR_ID_EMULEX); | |
1774 | ||
7af67051 | 1775 | spin_lock_irq(&phba->hbalock); |
7af67051 JS |
1776 | phba->over_temp_state = HBA_OVER_TEMP; |
1777 | spin_unlock_irq(&phba->hbalock); | |
09372820 | 1778 | lpfc_offline_eratt(phba); |
57127f15 | 1779 | |
dea3101e | 1780 | } else { |
1781 | /* The if clause above forces this code path when the status | |
9399627f JS |
1782 | * failure is a value other than FFER6. Do not call the offline |
1783 | * twice. This is the adapter hardware error path. | |
dea3101e | 1784 | */ |
372c187b | 1785 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
e8b62011 | 1786 | "0457 Adapter Hardware Error " |
dea3101e | 1787 | "Data: x%x x%x x%x\n", |
e8b62011 | 1788 | phba->work_hs, |
dea3101e | 1789 | phba->work_status[0], phba->work_status[1]); |
1790 | ||
d2873e4c | 1791 | event_data = FC_REG_DUMP_EVENT; |
92d7f7b0 | 1792 | shost = lpfc_shost_from_vport(vport); |
2e0fef85 | 1793 | fc_host_post_vendor_event(shost, fc_get_event_number(), |
d2873e4c JS |
1794 | sizeof(event_data), (char *) &event_data, |
1795 | SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX); | |
1796 | ||
09372820 | 1797 | lpfc_offline_eratt(phba); |
dea3101e | 1798 | } |
9399627f | 1799 | return; |
dea3101e | 1800 | } |
1801 | ||
618a5230 JS |
1802 | /** |
1803 | * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg | |
1804 | * @phba: pointer to lpfc hba data structure. | |
1805 | * @mbx_action: flag for mailbox shutdown action. | |
fe614acd | 1806 | * @en_rn_msg: send reset/port recovery message. |
618a5230 JS |
1807 | * This routine is invoked to perform an SLI4 port PCI function reset in |
1808 | * response to port status register polling attention. It waits for port | |
1809 | * status register (ERR, RDY, RN) bits before proceeding with function reset. | |
1810 | * During this process, interrupt vectors are freed and later requested | |
1811 | * for handling possible port resource change. | |
1812 | **/ | |
1813 | static int | |
e10b2022 JS |
1814 | lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action, |
1815 | bool en_rn_msg) | |
618a5230 JS |
1816 | { |
1817 | int rc; | |
1818 | uint32_t intr_mode; | |
1819 | ||
27d6ac0a | 1820 | if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >= |
65791f1f JS |
1821 | LPFC_SLI_INTF_IF_TYPE_2) { |
1822 | /* | |
1823 | * On error status condition, driver need to wait for port | |
1824 | * ready before performing reset. | |
1825 | */ | |
1826 | rc = lpfc_sli4_pdev_status_reg_wait(phba); | |
0e916ee7 | 1827 | if (rc) |
65791f1f JS |
1828 | return rc; |
1829 | } | |
0e916ee7 | 1830 | |
65791f1f JS |
1831 | /* need reset: attempt for port recovery */ |
1832 | if (en_rn_msg) | |
372c187b | 1833 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
65791f1f JS |
1834 | "2887 Reset Needed: Attempting Port " |
1835 | "Recovery...\n"); | |
3ba6216a JS |
1836 | |
1837 | /* If we are no wait, the HBA has been reset and is not | |
1838 | * functional, thus we should clear LPFC_SLI_ACTIVE flag. | |
1839 | */ | |
1840 | if (mbx_action == LPFC_MBX_NO_WAIT) { | |
1841 | spin_lock_irq(&phba->hbalock); | |
1842 | phba->sli.sli_flag &= ~LPFC_SLI_ACTIVE; | |
1843 | spin_unlock_irq(&phba->hbalock); | |
1844 | } | |
1845 | ||
65791f1f | 1846 | lpfc_offline_prep(phba, mbx_action); |
c00f62e6 | 1847 | lpfc_sli_flush_io_rings(phba); |
65791f1f JS |
1848 | lpfc_offline(phba); |
1849 | /* release interrupt for possible resource change */ | |
1850 | lpfc_sli4_disable_intr(phba); | |
5a9eeff5 JS |
1851 | rc = lpfc_sli_brdrestart(phba); |
1852 | if (rc) { | |
372c187b | 1853 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
5a9eeff5 JS |
1854 | "6309 Failed to restart board\n"); |
1855 | return rc; | |
1856 | } | |
65791f1f JS |
1857 | /* request and enable interrupt */ |
1858 | intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); | |
1859 | if (intr_mode == LPFC_INTR_ERROR) { | |
372c187b | 1860 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
65791f1f JS |
1861 | "3175 Failed to enable interrupt\n"); |
1862 | return -EIO; | |
618a5230 | 1863 | } |
65791f1f JS |
1864 | phba->intr_mode = intr_mode; |
1865 | rc = lpfc_online(phba); | |
1866 | if (rc == 0) | |
1867 | lpfc_unblock_mgmt_io(phba); | |
1868 | ||
618a5230 JS |
1869 | return rc; |
1870 | } | |
1871 | ||
da0436e9 JS |
1872 | /** |
1873 | * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler | |
1874 | * @phba: pointer to lpfc hba data structure. | |
1875 | * | |
1876 | * This routine is invoked to handle the SLI4 HBA hardware error attention | |
1877 | * conditions. | |
1878 | **/ | |
1879 | static void | |
1880 | lpfc_handle_eratt_s4(struct lpfc_hba *phba) | |
1881 | { | |
1882 | struct lpfc_vport *vport = phba->pport; | |
1883 | uint32_t event_data; | |
1884 | struct Scsi_Host *shost; | |
2fcee4bf | 1885 | uint32_t if_type; |
2e90f4b5 JS |
1886 | struct lpfc_register portstat_reg = {0}; |
1887 | uint32_t reg_err1, reg_err2; | |
1888 | uint32_t uerrlo_reg, uemasklo_reg; | |
65791f1f | 1889 | uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2; |
e10b2022 | 1890 | bool en_rn_msg = true; |
946727dc | 1891 | struct temp_event temp_event_data; |
65791f1f JS |
1892 | struct lpfc_register portsmphr_reg; |
1893 | int rc, i; | |
da0436e9 JS |
1894 | |
1895 | /* If the pci channel is offline, ignore possible errors, since | |
1896 | * we cannot communicate with the pci card anyway. | |
1897 | */ | |
32a93100 | 1898 | if (pci_channel_offline(phba->pcidev)) { |
372c187b | 1899 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
32a93100 JS |
1900 | "3166 pci channel is offline\n"); |
1901 | lpfc_sli4_offline_eratt(phba); | |
da0436e9 | 1902 | return; |
32a93100 | 1903 | } |
da0436e9 | 1904 | |
65791f1f | 1905 | memset(&portsmphr_reg, 0, sizeof(portsmphr_reg)); |
2fcee4bf JS |
1906 | if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); |
1907 | switch (if_type) { | |
1908 | case LPFC_SLI_INTF_IF_TYPE_0: | |
2e90f4b5 JS |
1909 | pci_rd_rc1 = lpfc_readl( |
1910 | phba->sli4_hba.u.if_type0.UERRLOregaddr, | |
1911 | &uerrlo_reg); | |
1912 | pci_rd_rc2 = lpfc_readl( | |
1913 | phba->sli4_hba.u.if_type0.UEMASKLOregaddr, | |
1914 | &uemasklo_reg); | |
1915 | /* consider PCI bus read error as pci_channel_offline */ | |
1916 | if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO) | |
1917 | return; | |
65791f1f JS |
1918 | if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) { |
1919 | lpfc_sli4_offline_eratt(phba); | |
1920 | return; | |
1921 | } | |
372c187b | 1922 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
65791f1f JS |
1923 | "7623 Checking UE recoverable"); |
1924 | ||
1925 | for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) { | |
1926 | if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr, | |
1927 | &portsmphr_reg.word0)) | |
1928 | continue; | |
1929 | ||
1930 | smphr_port_status = bf_get(lpfc_port_smphr_port_status, | |
1931 | &portsmphr_reg); | |
1932 | if ((smphr_port_status & LPFC_PORT_SEM_MASK) == | |
1933 | LPFC_PORT_SEM_UE_RECOVERABLE) | |
1934 | break; | |
1935 | /*Sleep for 1Sec, before checking SEMAPHORE */ | |
1936 | msleep(1000); | |
1937 | } | |
1938 | ||
372c187b | 1939 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
65791f1f JS |
1940 | "4827 smphr_port_status x%x : Waited %dSec", |
1941 | smphr_port_status, i); | |
1942 | ||
1943 | /* Recoverable UE, reset the HBA device */ | |
1944 | if ((smphr_port_status & LPFC_PORT_SEM_MASK) == | |
1945 | LPFC_PORT_SEM_UE_RECOVERABLE) { | |
1946 | for (i = 0; i < 20; i++) { | |
1947 | msleep(1000); | |
1948 | if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr, | |
1949 | &portsmphr_reg.word0) && | |
1950 | (LPFC_POST_STAGE_PORT_READY == | |
1951 | bf_get(lpfc_port_smphr_port_status, | |
1952 | &portsmphr_reg))) { | |
1953 | rc = lpfc_sli4_port_sta_fn_reset(phba, | |
1954 | LPFC_MBX_NO_WAIT, en_rn_msg); | |
1955 | if (rc == 0) | |
1956 | return; | |
372c187b DK |
1957 | lpfc_printf_log(phba, KERN_ERR, |
1958 | LOG_TRACE_EVENT, | |
65791f1f JS |
1959 | "4215 Failed to recover UE"); |
1960 | break; | |
1961 | } | |
1962 | } | |
1963 | } | |
372c187b | 1964 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
65791f1f JS |
1965 | "7624 Firmware not ready: Failing UE recovery," |
1966 | " waited %dSec", i); | |
8c24a4f6 | 1967 | phba->link_state = LPFC_HBA_ERROR; |
2fcee4bf | 1968 | break; |
946727dc | 1969 | |
2fcee4bf | 1970 | case LPFC_SLI_INTF_IF_TYPE_2: |
27d6ac0a | 1971 | case LPFC_SLI_INTF_IF_TYPE_6: |
2e90f4b5 JS |
1972 | pci_rd_rc1 = lpfc_readl( |
1973 | phba->sli4_hba.u.if_type2.STATUSregaddr, | |
1974 | &portstat_reg.word0); | |
1975 | /* consider PCI bus read error as pci_channel_offline */ | |
6b5151fd | 1976 | if (pci_rd_rc1 == -EIO) { |
372c187b | 1977 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
6b5151fd JS |
1978 | "3151 PCI bus read access failure: x%x\n", |
1979 | readl(phba->sli4_hba.u.if_type2.STATUSregaddr)); | |
32a93100 | 1980 | lpfc_sli4_offline_eratt(phba); |
2e90f4b5 | 1981 | return; |
6b5151fd | 1982 | } |
2e90f4b5 JS |
1983 | reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr); |
1984 | reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr); | |
2fcee4bf | 1985 | if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) { |
372c187b DK |
1986 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
1987 | "2889 Port Overtemperature event, " | |
1988 | "taking port offline Data: x%x x%x\n", | |
1989 | reg_err1, reg_err2); | |
946727dc | 1990 | |
310429ef | 1991 | phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE; |
946727dc JS |
1992 | temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; |
1993 | temp_event_data.event_code = LPFC_CRIT_TEMP; | |
1994 | temp_event_data.data = 0xFFFFFFFF; | |
1995 | ||
1996 | shost = lpfc_shost_from_vport(phba->pport); | |
1997 | fc_host_post_vendor_event(shost, fc_get_event_number(), | |
1998 | sizeof(temp_event_data), | |
1999 | (char *)&temp_event_data, | |
2000 | SCSI_NL_VID_TYPE_PCI | |
2001 | | PCI_VENDOR_ID_EMULEX); | |
2002 | ||
2fcee4bf JS |
2003 | spin_lock_irq(&phba->hbalock); |
2004 | phba->over_temp_state = HBA_OVER_TEMP; | |
2005 | spin_unlock_irq(&phba->hbalock); | |
2006 | lpfc_sli4_offline_eratt(phba); | |
946727dc | 2007 | return; |
2fcee4bf | 2008 | } |
2e90f4b5 | 2009 | if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && |
e10b2022 | 2010 | reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) { |
372c187b | 2011 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
e10b2022 JS |
2012 | "3143 Port Down: Firmware Update " |
2013 | "Detected\n"); | |
2014 | en_rn_msg = false; | |
2015 | } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && | |
2e90f4b5 | 2016 | reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP) |
372c187b | 2017 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
2e90f4b5 JS |
2018 | "3144 Port Down: Debug Dump\n"); |
2019 | else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && | |
2020 | reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON) | |
372c187b | 2021 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
2e90f4b5 | 2022 | "3145 Port Down: Provisioning\n"); |
618a5230 | 2023 | |
946727dc JS |
2024 | /* If resets are disabled then leave the HBA alone and return */ |
2025 | if (!phba->cfg_enable_hba_reset) | |
2026 | return; | |
2027 | ||
618a5230 | 2028 | /* Check port status register for function reset */ |
e10b2022 JS |
2029 | rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT, |
2030 | en_rn_msg); | |
618a5230 JS |
2031 | if (rc == 0) { |
2032 | /* don't report event on forced debug dump */ | |
2033 | if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && | |
2034 | reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP) | |
2035 | return; | |
2036 | else | |
2037 | break; | |
2fcee4bf | 2038 | } |
618a5230 | 2039 | /* fall through for not able to recover */ |
372c187b | 2040 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
8c24a4f6 JS |
2041 | "3152 Unrecoverable error\n"); |
2042 | phba->link_state = LPFC_HBA_ERROR; | |
2fcee4bf JS |
2043 | break; |
2044 | case LPFC_SLI_INTF_IF_TYPE_1: | |
2045 | default: | |
2046 | break; | |
2047 | } | |
2e90f4b5 JS |
2048 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, |
2049 | "3123 Report dump event to upper layer\n"); | |
2050 | /* Send an internal error event to mgmt application */ | |
2051 | lpfc_board_errevt_to_mgmt(phba); | |
2052 | ||
2053 | event_data = FC_REG_DUMP_EVENT; | |
2054 | shost = lpfc_shost_from_vport(vport); | |
2055 | fc_host_post_vendor_event(shost, fc_get_event_number(), | |
2056 | sizeof(event_data), (char *) &event_data, | |
2057 | SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX); | |
da0436e9 JS |
2058 | } |
2059 | ||
2060 | /** | |
2061 | * lpfc_handle_eratt - Wrapper func for handling hba error attention | |
2062 | * @phba: pointer to lpfc HBA data structure. | |
2063 | * | |
2064 | * This routine wraps the actual SLI3 or SLI4 hba error attention handling | |
2065 | * routine from the API jump table function pointer from the lpfc_hba struct. | |
2066 | * | |
2067 | * Return codes | |
af901ca1 | 2068 | * 0 - success. |
da0436e9 JS |
2069 | * Any other value - error. |
2070 | **/ | |
2071 | void | |
2072 | lpfc_handle_eratt(struct lpfc_hba *phba) | |
2073 | { | |
2074 | (*phba->lpfc_handle_eratt)(phba); | |
2075 | } | |
2076 | ||
e59058c4 | 2077 | /** |
3621a710 | 2078 | * lpfc_handle_latt - The HBA link event handler |
e59058c4 JS |
2079 | * @phba: pointer to lpfc hba data structure. |
2080 | * | |
2081 | * This routine is invoked from the worker thread to handle a HBA host | |
895427bd | 2082 | * attention link event. SLI3 only. |
e59058c4 | 2083 | **/ |
dea3101e | 2084 | void |
2e0fef85 | 2085 | lpfc_handle_latt(struct lpfc_hba *phba) |
dea3101e | 2086 | { |
2e0fef85 JS |
2087 | struct lpfc_vport *vport = phba->pport; |
2088 | struct lpfc_sli *psli = &phba->sli; | |
dea3101e | 2089 | LPFC_MBOXQ_t *pmb; |
2090 | volatile uint32_t control; | |
2091 | struct lpfc_dmabuf *mp; | |
09372820 | 2092 | int rc = 0; |
dea3101e | 2093 | |
2094 | pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); | |
09372820 JS |
2095 | if (!pmb) { |
2096 | rc = 1; | |
dea3101e | 2097 | goto lpfc_handle_latt_err_exit; |
09372820 | 2098 | } |
dea3101e | 2099 | |
2100 | mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); | |
09372820 JS |
2101 | if (!mp) { |
2102 | rc = 2; | |
dea3101e | 2103 | goto lpfc_handle_latt_free_pmb; |
09372820 | 2104 | } |
dea3101e | 2105 | |
2106 | mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys); | |
09372820 JS |
2107 | if (!mp->virt) { |
2108 | rc = 3; | |
dea3101e | 2109 | goto lpfc_handle_latt_free_mp; |
09372820 | 2110 | } |
dea3101e | 2111 | |
6281bfe0 | 2112 | /* Cleanup any outstanding ELS commands */ |
549e55cd | 2113 | lpfc_els_flush_all_cmd(phba); |
dea3101e | 2114 | |
2115 | psli->slistat.link_event++; | |
76a95d75 JS |
2116 | lpfc_read_topology(phba, pmb, mp); |
2117 | pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; | |
2e0fef85 | 2118 | pmb->vport = vport; |
0d2b6b83 | 2119 | /* Block ELS IOCBs until we have processed this mbox command */ |
895427bd | 2120 | phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT; |
0b727fea | 2121 | rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT); |
09372820 JS |
2122 | if (rc == MBX_NOT_FINISHED) { |
2123 | rc = 4; | |
14691150 | 2124 | goto lpfc_handle_latt_free_mbuf; |
09372820 | 2125 | } |
dea3101e | 2126 | |
2127 | /* Clear Link Attention in HA REG */ | |
2e0fef85 | 2128 | spin_lock_irq(&phba->hbalock); |
dea3101e | 2129 | writel(HA_LATT, phba->HAregaddr); |
2130 | readl(phba->HAregaddr); /* flush */ | |
2e0fef85 | 2131 | spin_unlock_irq(&phba->hbalock); |
dea3101e | 2132 | |
2133 | return; | |
2134 | ||
14691150 | 2135 | lpfc_handle_latt_free_mbuf: |
895427bd | 2136 | phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT; |
14691150 | 2137 | lpfc_mbuf_free(phba, mp->virt, mp->phys); |
dea3101e | 2138 | lpfc_handle_latt_free_mp: |
2139 | kfree(mp); | |
2140 | lpfc_handle_latt_free_pmb: | |
1dcb58e5 | 2141 | mempool_free(pmb, phba->mbox_mem_pool); |
dea3101e | 2142 | lpfc_handle_latt_err_exit: |
2143 | /* Enable Link attention interrupts */ | |
2e0fef85 | 2144 | spin_lock_irq(&phba->hbalock); |
dea3101e | 2145 | psli->sli_flag |= LPFC_PROCESS_LA; |
2146 | control = readl(phba->HCregaddr); | |
2147 | control |= HC_LAINT_ENA; | |
2148 | writel(control, phba->HCregaddr); | |
2149 | readl(phba->HCregaddr); /* flush */ | |
2150 | ||
2151 | /* Clear Link Attention in HA REG */ | |
2152 | writel(HA_LATT, phba->HAregaddr); | |
2153 | readl(phba->HAregaddr); /* flush */ | |
2e0fef85 | 2154 | spin_unlock_irq(&phba->hbalock); |
dea3101e | 2155 | lpfc_linkdown(phba); |
2e0fef85 | 2156 | phba->link_state = LPFC_HBA_ERROR; |
dea3101e | 2157 | |
372c187b DK |
2158 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
2159 | "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc); | |
dea3101e | 2160 | |
2161 | return; | |
2162 | } | |
2163 | ||
e59058c4 | 2164 | /** |
3621a710 | 2165 | * lpfc_parse_vpd - Parse VPD (Vital Product Data) |
e59058c4 JS |
2166 | * @phba: pointer to lpfc hba data structure. |
2167 | * @vpd: pointer to the vital product data. | |
2168 | * @len: length of the vital product data in bytes. | |
2169 | * | |
2170 | * This routine parses the Vital Product Data (VPD). The VPD is treated as | |
2171 | * an array of characters. In this routine, the ModelName, ProgramType, and | |
2172 | * ModelDesc, etc. fields of the phba data structure will be populated. | |
2173 | * | |
2174 | * Return codes | |
2175 | * 0 - pointer to the VPD passed in is NULL | |
2176 | * 1 - success | |
2177 | **/ | |
3772a991 | 2178 | int |
2e0fef85 | 2179 | lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len) |
dea3101e | 2180 | { |
2181 | uint8_t lenlo, lenhi; | |
07da60c1 | 2182 | int Length; |
dea3101e | 2183 | int i, j; |
2184 | int finished = 0; | |
2185 | int index = 0; | |
2186 | ||
2187 | if (!vpd) | |
2188 | return 0; | |
2189 | ||
2190 | /* Vital Product */ | |
ed957684 | 2191 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
e8b62011 | 2192 | "0455 Vital Product Data: x%x x%x x%x x%x\n", |
dea3101e | 2193 | (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2], |
2194 | (uint32_t) vpd[3]); | |
74b72a59 | 2195 | while (!finished && (index < (len - 4))) { |
dea3101e | 2196 | switch (vpd[index]) { |
2197 | case 0x82: | |
74b72a59 | 2198 | case 0x91: |
dea3101e | 2199 | index += 1; |
2200 | lenlo = vpd[index]; | |
2201 | index += 1; | |
2202 | lenhi = vpd[index]; | |
2203 | index += 1; | |
2204 | i = ((((unsigned short)lenhi) << 8) + lenlo); | |
2205 | index += i; | |
2206 | break; | |
2207 | case 0x90: | |
2208 | index += 1; | |
2209 | lenlo = vpd[index]; | |
2210 | index += 1; | |
2211 | lenhi = vpd[index]; | |
2212 | index += 1; | |
2213 | Length = ((((unsigned short)lenhi) << 8) + lenlo); | |
74b72a59 JW |
2214 | if (Length > len - index) |
2215 | Length = len - index; | |
dea3101e | 2216 | while (Length > 0) { |
2217 | /* Look for Serial Number */ | |
2218 | if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) { | |
2219 | index += 2; | |
2220 | i = vpd[index]; | |
2221 | index += 1; | |
2222 | j = 0; | |
2223 | Length -= (3+i); | |
2224 | while(i--) { | |
2225 | phba->SerialNumber[j++] = vpd[index++]; | |
2226 | if (j == 31) | |
2227 | break; | |
2228 | } | |
2229 | phba->SerialNumber[j] = 0; | |
2230 | continue; | |
2231 | } | |
2232 | else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) { | |
2233 | phba->vpd_flag |= VPD_MODEL_DESC; | |
2234 | index += 2; | |
2235 | i = vpd[index]; | |
2236 | index += 1; | |
2237 | j = 0; | |
2238 | Length -= (3+i); | |
2239 | while(i--) { | |
2240 | phba->ModelDesc[j++] = vpd[index++]; | |
2241 | if (j == 255) | |
2242 | break; | |
2243 | } | |
2244 | phba->ModelDesc[j] = 0; | |
2245 | continue; | |
2246 | } | |
2247 | else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) { | |
2248 | phba->vpd_flag |= VPD_MODEL_NAME; | |
2249 | index += 2; | |
2250 | i = vpd[index]; | |
2251 | index += 1; | |
2252 | j = 0; | |
2253 | Length -= (3+i); | |
2254 | while(i--) { | |
2255 | phba->ModelName[j++] = vpd[index++]; | |
2256 | if (j == 79) | |
2257 | break; | |
2258 | } | |
2259 | phba->ModelName[j] = 0; | |
2260 | continue; | |
2261 | } | |
2262 | else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) { | |
2263 | phba->vpd_flag |= VPD_PROGRAM_TYPE; | |
2264 | index += 2; | |
2265 | i = vpd[index]; | |
2266 | index += 1; | |
2267 | j = 0; | |
2268 | Length -= (3+i); | |
2269 | while(i--) { | |
2270 | phba->ProgramType[j++] = vpd[index++]; | |
2271 | if (j == 255) | |
2272 | break; | |
2273 | } | |
2274 | phba->ProgramType[j] = 0; | |
2275 | continue; | |
2276 | } | |
2277 | else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) { | |
2278 | phba->vpd_flag |= VPD_PORT; | |
2279 | index += 2; | |
2280 | i = vpd[index]; | |
2281 | index += 1; | |
2282 | j = 0; | |
2283 | Length -= (3+i); | |
2284 | while(i--) { | |
cd1c8301 JS |
2285 | if ((phba->sli_rev == LPFC_SLI_REV4) && |
2286 | (phba->sli4_hba.pport_name_sta == | |
2287 | LPFC_SLI4_PPNAME_GET)) { | |
2288 | j++; | |
2289 | index++; | |
2290 | } else | |
2291 | phba->Port[j++] = vpd[index++]; | |
2292 | if (j == 19) | |
2293 | break; | |
dea3101e | 2294 | } |
cd1c8301 JS |
2295 | if ((phba->sli_rev != LPFC_SLI_REV4) || |
2296 | (phba->sli4_hba.pport_name_sta == | |
2297 | LPFC_SLI4_PPNAME_NON)) | |
2298 | phba->Port[j] = 0; | |
dea3101e | 2299 | continue; |
2300 | } | |
2301 | else { | |
2302 | index += 2; | |
2303 | i = vpd[index]; | |
2304 | index += 1; | |
2305 | index += i; | |
2306 | Length -= (3 + i); | |
2307 | } | |
2308 | } | |
2309 | finished = 0; | |
2310 | break; | |
2311 | case 0x78: | |
2312 | finished = 1; | |
2313 | break; | |
2314 | default: | |
2315 | index ++; | |
2316 | break; | |
2317 | } | |
74b72a59 | 2318 | } |
dea3101e | 2319 | |
2320 | return(1); | |
2321 | } | |
2322 | ||
e59058c4 | 2323 | /** |
3621a710 | 2324 | * lpfc_get_hba_model_desc - Retrieve HBA device model name and description |
e59058c4 JS |
2325 | * @phba: pointer to lpfc hba data structure. |
2326 | * @mdp: pointer to the data structure to hold the derived model name. | |
2327 | * @descp: pointer to the data structure to hold the derived description. | |
2328 | * | |
2329 | * This routine retrieves HBA's description based on its registered PCI device | |
2330 | * ID. The @descp passed into this function points to an array of 256 chars. It | |
2331 | * shall be returned with the model name, maximum speed, and the host bus type. | |
2332 | * The @mdp passed into this function points to an array of 80 chars. When the | |
2333 | * function returns, the @mdp will be filled with the model name. | |
2334 | **/ | |
dea3101e | 2335 | static void |
2e0fef85 | 2336 | lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp) |
dea3101e | 2337 | { |
2338 | lpfc_vpd_t *vp; | |
fefcb2b6 | 2339 | uint16_t dev_id = phba->pcidev->device; |
74b72a59 | 2340 | int max_speed; |
84774a4d | 2341 | int GE = 0; |
da0436e9 | 2342 | int oneConnect = 0; /* default is not a oneConnect */ |
74b72a59 | 2343 | struct { |
a747c9ce JS |
2344 | char *name; |
2345 | char *bus; | |
2346 | char *function; | |
2347 | } m = {"<Unknown>", "", ""}; | |
74b72a59 JW |
2348 | |
2349 | if (mdp && mdp[0] != '\0' | |
2350 | && descp && descp[0] != '\0') | |
2351 | return; | |
2352 | ||
fbd8a6ba JS |
2353 | if (phba->lmt & LMT_64Gb) |
2354 | max_speed = 64; | |
2355 | else if (phba->lmt & LMT_32Gb) | |
d38dd52c JS |
2356 | max_speed = 32; |
2357 | else if (phba->lmt & LMT_16Gb) | |
c0c11512 JS |
2358 | max_speed = 16; |
2359 | else if (phba->lmt & LMT_10Gb) | |
74b72a59 JW |
2360 | max_speed = 10; |
2361 | else if (phba->lmt & LMT_8Gb) | |
2362 | max_speed = 8; | |
2363 | else if (phba->lmt & LMT_4Gb) | |
2364 | max_speed = 4; | |
2365 | else if (phba->lmt & LMT_2Gb) | |
2366 | max_speed = 2; | |
4169d868 | 2367 | else if (phba->lmt & LMT_1Gb) |
74b72a59 | 2368 | max_speed = 1; |
4169d868 JS |
2369 | else |
2370 | max_speed = 0; | |
dea3101e | 2371 | |
2372 | vp = &phba->vpd; | |
dea3101e | 2373 | |
e4adb204 | 2374 | switch (dev_id) { |
06325e74 | 2375 | case PCI_DEVICE_ID_FIREFLY: |
12222f4f JS |
2376 | m = (typeof(m)){"LP6000", "PCI", |
2377 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
06325e74 | 2378 | break; |
dea3101e | 2379 | case PCI_DEVICE_ID_SUPERFLY: |
2380 | if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3) | |
12222f4f | 2381 | m = (typeof(m)){"LP7000", "PCI", ""}; |
dea3101e | 2382 | else |
12222f4f JS |
2383 | m = (typeof(m)){"LP7000E", "PCI", ""}; |
2384 | m.function = "Obsolete, Unsupported Fibre Channel Adapter"; | |
dea3101e | 2385 | break; |
2386 | case PCI_DEVICE_ID_DRAGONFLY: | |
a747c9ce | 2387 | m = (typeof(m)){"LP8000", "PCI", |
12222f4f | 2388 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
dea3101e | 2389 | break; |
2390 | case PCI_DEVICE_ID_CENTAUR: | |
2391 | if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID) | |
12222f4f | 2392 | m = (typeof(m)){"LP9002", "PCI", ""}; |
dea3101e | 2393 | else |
12222f4f JS |
2394 | m = (typeof(m)){"LP9000", "PCI", ""}; |
2395 | m.function = "Obsolete, Unsupported Fibre Channel Adapter"; | |
dea3101e | 2396 | break; |
2397 | case PCI_DEVICE_ID_RFLY: | |
a747c9ce | 2398 | m = (typeof(m)){"LP952", "PCI", |
12222f4f | 2399 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
dea3101e | 2400 | break; |
2401 | case PCI_DEVICE_ID_PEGASUS: | |
a747c9ce | 2402 | m = (typeof(m)){"LP9802", "PCI-X", |
12222f4f | 2403 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
dea3101e | 2404 | break; |
2405 | case PCI_DEVICE_ID_THOR: | |
a747c9ce | 2406 | m = (typeof(m)){"LP10000", "PCI-X", |
12222f4f | 2407 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
dea3101e | 2408 | break; |
2409 | case PCI_DEVICE_ID_VIPER: | |
a747c9ce | 2410 | m = (typeof(m)){"LPX1000", "PCI-X", |
12222f4f | 2411 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
dea3101e | 2412 | break; |
2413 | case PCI_DEVICE_ID_PFLY: | |
a747c9ce | 2414 | m = (typeof(m)){"LP982", "PCI-X", |
12222f4f | 2415 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
dea3101e | 2416 | break; |
2417 | case PCI_DEVICE_ID_TFLY: | |
a747c9ce | 2418 | m = (typeof(m)){"LP1050", "PCI-X", |
12222f4f | 2419 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
dea3101e | 2420 | break; |
2421 | case PCI_DEVICE_ID_HELIOS: | |
a747c9ce | 2422 | m = (typeof(m)){"LP11000", "PCI-X2", |
12222f4f | 2423 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
dea3101e | 2424 | break; |
e4adb204 | 2425 | case PCI_DEVICE_ID_HELIOS_SCSP: |
a747c9ce | 2426 | m = (typeof(m)){"LP11000-SP", "PCI-X2", |
12222f4f | 2427 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
e4adb204 JSEC |
2428 | break; |
2429 | case PCI_DEVICE_ID_HELIOS_DCSP: | |
a747c9ce | 2430 | m = (typeof(m)){"LP11002-SP", "PCI-X2", |
12222f4f | 2431 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
e4adb204 JSEC |
2432 | break; |
2433 | case PCI_DEVICE_ID_NEPTUNE: | |
12222f4f JS |
2434 | m = (typeof(m)){"LPe1000", "PCIe", |
2435 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
e4adb204 JSEC |
2436 | break; |
2437 | case PCI_DEVICE_ID_NEPTUNE_SCSP: | |
12222f4f JS |
2438 | m = (typeof(m)){"LPe1000-SP", "PCIe", |
2439 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
e4adb204 JSEC |
2440 | break; |
2441 | case PCI_DEVICE_ID_NEPTUNE_DCSP: | |
12222f4f JS |
2442 | m = (typeof(m)){"LPe1002-SP", "PCIe", |
2443 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
e4adb204 | 2444 | break; |
dea3101e | 2445 | case PCI_DEVICE_ID_BMID: |
a747c9ce | 2446 | m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"}; |
dea3101e | 2447 | break; |
2448 | case PCI_DEVICE_ID_BSMB: | |
12222f4f JS |
2449 | m = (typeof(m)){"LP111", "PCI-X2", |
2450 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
dea3101e | 2451 | break; |
2452 | case PCI_DEVICE_ID_ZEPHYR: | |
a747c9ce | 2453 | m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"}; |
dea3101e | 2454 | break; |
e4adb204 | 2455 | case PCI_DEVICE_ID_ZEPHYR_SCSP: |
a747c9ce | 2456 | m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"}; |
e4adb204 JSEC |
2457 | break; |
2458 | case PCI_DEVICE_ID_ZEPHYR_DCSP: | |
a747c9ce | 2459 | m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"}; |
a257bf90 | 2460 | GE = 1; |
e4adb204 | 2461 | break; |
dea3101e | 2462 | case PCI_DEVICE_ID_ZMID: |
a747c9ce | 2463 | m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"}; |
dea3101e | 2464 | break; |
2465 | case PCI_DEVICE_ID_ZSMB: | |
a747c9ce | 2466 | m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"}; |
dea3101e | 2467 | break; |
2468 | case PCI_DEVICE_ID_LP101: | |
12222f4f JS |
2469 | m = (typeof(m)){"LP101", "PCI-X", |
2470 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
dea3101e | 2471 | break; |
2472 | case PCI_DEVICE_ID_LP10000S: | |
12222f4f JS |
2473 | m = (typeof(m)){"LP10000-S", "PCI", |
2474 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
06325e74 | 2475 | break; |
e4adb204 | 2476 | case PCI_DEVICE_ID_LP11000S: |
12222f4f JS |
2477 | m = (typeof(m)){"LP11000-S", "PCI-X2", |
2478 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
18a3b596 | 2479 | break; |
e4adb204 | 2480 | case PCI_DEVICE_ID_LPE11000S: |
12222f4f JS |
2481 | m = (typeof(m)){"LPe11000-S", "PCIe", |
2482 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
5cc36b3c | 2483 | break; |
b87eab38 | 2484 | case PCI_DEVICE_ID_SAT: |
a747c9ce | 2485 | m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"}; |
b87eab38 JS |
2486 | break; |
2487 | case PCI_DEVICE_ID_SAT_MID: | |
a747c9ce | 2488 | m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"}; |
b87eab38 JS |
2489 | break; |
2490 | case PCI_DEVICE_ID_SAT_SMB: | |
a747c9ce | 2491 | m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"}; |
b87eab38 JS |
2492 | break; |
2493 | case PCI_DEVICE_ID_SAT_DCSP: | |
a747c9ce | 2494 | m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"}; |
b87eab38 JS |
2495 | break; |
2496 | case PCI_DEVICE_ID_SAT_SCSP: | |
a747c9ce | 2497 | m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"}; |
b87eab38 JS |
2498 | break; |
2499 | case PCI_DEVICE_ID_SAT_S: | |
a747c9ce | 2500 | m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"}; |
b87eab38 | 2501 | break; |
84774a4d | 2502 | case PCI_DEVICE_ID_HORNET: |
12222f4f JS |
2503 | m = (typeof(m)){"LP21000", "PCIe", |
2504 | "Obsolete, Unsupported FCoE Adapter"}; | |
84774a4d JS |
2505 | GE = 1; |
2506 | break; | |
2507 | case PCI_DEVICE_ID_PROTEUS_VF: | |
a747c9ce | 2508 | m = (typeof(m)){"LPev12000", "PCIe IOV", |
12222f4f | 2509 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
84774a4d JS |
2510 | break; |
2511 | case PCI_DEVICE_ID_PROTEUS_PF: | |
a747c9ce | 2512 | m = (typeof(m)){"LPev12000", "PCIe IOV", |
12222f4f | 2513 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
84774a4d JS |
2514 | break; |
2515 | case PCI_DEVICE_ID_PROTEUS_S: | |
a747c9ce | 2516 | m = (typeof(m)){"LPemv12002-S", "PCIe IOV", |
12222f4f | 2517 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
84774a4d | 2518 | break; |
da0436e9 JS |
2519 | case PCI_DEVICE_ID_TIGERSHARK: |
2520 | oneConnect = 1; | |
a747c9ce | 2521 | m = (typeof(m)){"OCe10100", "PCIe", "FCoE"}; |
da0436e9 | 2522 | break; |
a747c9ce | 2523 | case PCI_DEVICE_ID_TOMCAT: |
6669f9bb | 2524 | oneConnect = 1; |
a747c9ce JS |
2525 | m = (typeof(m)){"OCe11100", "PCIe", "FCoE"}; |
2526 | break; | |
2527 | case PCI_DEVICE_ID_FALCON: | |
2528 | m = (typeof(m)){"LPSe12002-ML1-E", "PCIe", | |
2529 | "EmulexSecure Fibre"}; | |
6669f9bb | 2530 | break; |
98fc5dd9 JS |
2531 | case PCI_DEVICE_ID_BALIUS: |
2532 | m = (typeof(m)){"LPVe12002", "PCIe Shared I/O", | |
12222f4f | 2533 | "Obsolete, Unsupported Fibre Channel Adapter"}; |
98fc5dd9 | 2534 | break; |
085c647c | 2535 | case PCI_DEVICE_ID_LANCER_FC: |
c0c11512 | 2536 | m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"}; |
085c647c | 2537 | break; |
12222f4f JS |
2538 | case PCI_DEVICE_ID_LANCER_FC_VF: |
2539 | m = (typeof(m)){"LPe16000", "PCIe", | |
2540 | "Obsolete, Unsupported Fibre Channel Adapter"}; | |
2541 | break; | |
085c647c JS |
2542 | case PCI_DEVICE_ID_LANCER_FCOE: |
2543 | oneConnect = 1; | |
079b5c91 | 2544 | m = (typeof(m)){"OCe15100", "PCIe", "FCoE"}; |
085c647c | 2545 | break; |
12222f4f JS |
2546 | case PCI_DEVICE_ID_LANCER_FCOE_VF: |
2547 | oneConnect = 1; | |
2548 | m = (typeof(m)){"OCe15100", "PCIe", | |
2549 | "Obsolete, Unsupported FCoE"}; | |
2550 | break; | |
d38dd52c JS |
2551 | case PCI_DEVICE_ID_LANCER_G6_FC: |
2552 | m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"}; | |
2553 | break; | |
c238b9b6 JS |
2554 | case PCI_DEVICE_ID_LANCER_G7_FC: |
2555 | m = (typeof(m)){"LPe36000", "PCIe", "Fibre Channel Adapter"}; | |
2556 | break; | |
f8cafd38 JS |
2557 | case PCI_DEVICE_ID_SKYHAWK: |
2558 | case PCI_DEVICE_ID_SKYHAWK_VF: | |
2559 | oneConnect = 1; | |
2560 | m = (typeof(m)){"OCe14000", "PCIe", "FCoE"}; | |
2561 | break; | |
5cc36b3c | 2562 | default: |
a747c9ce | 2563 | m = (typeof(m)){"Unknown", "", ""}; |
e4adb204 | 2564 | break; |
dea3101e | 2565 | } |
74b72a59 JW |
2566 | |
2567 | if (mdp && mdp[0] == '\0') | |
2568 | snprintf(mdp, 79,"%s", m.name); | |
c0c11512 JS |
2569 | /* |
2570 | * oneConnect hba requires special processing, they are all initiators | |
da0436e9 JS |
2571 | * and we put the port number on the end |
2572 | */ | |
2573 | if (descp && descp[0] == '\0') { | |
2574 | if (oneConnect) | |
2575 | snprintf(descp, 255, | |
4169d868 | 2576 | "Emulex OneConnect %s, %s Initiator %s", |
a747c9ce | 2577 | m.name, m.function, |
da0436e9 | 2578 | phba->Port); |
4169d868 JS |
2579 | else if (max_speed == 0) |
2580 | snprintf(descp, 255, | |
290237d2 | 2581 | "Emulex %s %s %s", |
4169d868 | 2582 | m.name, m.bus, m.function); |
da0436e9 JS |
2583 | else |
2584 | snprintf(descp, 255, | |
2585 | "Emulex %s %d%s %s %s", | |
a747c9ce JS |
2586 | m.name, max_speed, (GE) ? "GE" : "Gb", |
2587 | m.bus, m.function); | |
da0436e9 | 2588 | } |
dea3101e | 2589 | } |
2590 | ||
e59058c4 | 2591 | /** |
3621a710 | 2592 | * lpfc_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring |
e59058c4 JS |
2593 | * @phba: pointer to lpfc hba data structure. |
2594 | * @pring: pointer to a IOCB ring. | |
2595 | * @cnt: the number of IOCBs to be posted to the IOCB ring. | |
2596 | * | |
2597 | * This routine posts a given number of IOCBs with the associated DMA buffer | |
2598 | * descriptors specified by the cnt argument to the given IOCB ring. | |
2599 | * | |
2600 | * Return codes | |
2601 | * The number of IOCBs NOT able to be posted to the IOCB ring. | |
2602 | **/ | |
dea3101e | 2603 | int |
495a714c | 2604 | lpfc_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt) |
dea3101e | 2605 | { |
2606 | IOCB_t *icmd; | |
0bd4ca25 | 2607 | struct lpfc_iocbq *iocb; |
dea3101e | 2608 | struct lpfc_dmabuf *mp1, *mp2; |
2609 | ||
2610 | cnt += pring->missbufcnt; | |
2611 | ||
2612 | /* While there are buffers to post */ | |
2613 | while (cnt > 0) { | |
2614 | /* Allocate buffer for command iocb */ | |
0bd4ca25 | 2615 | iocb = lpfc_sli_get_iocbq(phba); |
dea3101e | 2616 | if (iocb == NULL) { |
2617 | pring->missbufcnt = cnt; | |
2618 | return cnt; | |
2619 | } | |
dea3101e | 2620 | icmd = &iocb->iocb; |
2621 | ||
2622 | /* 2 buffers can be posted per command */ | |
2623 | /* Allocate buffer to post */ | |
2624 | mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); | |
2625 | if (mp1) | |
98c9ea5c JS |
2626 | mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys); |
2627 | if (!mp1 || !mp1->virt) { | |
c9475cb0 | 2628 | kfree(mp1); |
604a3e30 | 2629 | lpfc_sli_release_iocbq(phba, iocb); |
dea3101e | 2630 | pring->missbufcnt = cnt; |
2631 | return cnt; | |
2632 | } | |
2633 | ||
2634 | INIT_LIST_HEAD(&mp1->list); | |
2635 | /* Allocate buffer to post */ | |
2636 | if (cnt > 1) { | |
2637 | mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); | |
2638 | if (mp2) | |
2639 | mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI, | |
2640 | &mp2->phys); | |
98c9ea5c | 2641 | if (!mp2 || !mp2->virt) { |
c9475cb0 | 2642 | kfree(mp2); |
dea3101e | 2643 | lpfc_mbuf_free(phba, mp1->virt, mp1->phys); |
2644 | kfree(mp1); | |
604a3e30 | 2645 | lpfc_sli_release_iocbq(phba, iocb); |
dea3101e | 2646 | pring->missbufcnt = cnt; |
2647 | return cnt; | |
2648 | } | |
2649 | ||
2650 | INIT_LIST_HEAD(&mp2->list); | |
2651 | } else { | |
2652 | mp2 = NULL; | |
2653 | } | |
2654 | ||
2655 | icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys); | |
2656 | icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys); | |
2657 | icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE; | |
2658 | icmd->ulpBdeCount = 1; | |
2659 | cnt--; | |
2660 | if (mp2) { | |
2661 | icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys); | |
2662 | icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys); | |
2663 | icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE; | |
2664 | cnt--; | |
2665 | icmd->ulpBdeCount = 2; | |
2666 | } | |
2667 | ||
2668 | icmd->ulpCommand = CMD_QUE_RING_BUF64_CN; | |
2669 | icmd->ulpLe = 1; | |
2670 | ||
3772a991 JS |
2671 | if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) == |
2672 | IOCB_ERROR) { | |
dea3101e | 2673 | lpfc_mbuf_free(phba, mp1->virt, mp1->phys); |
2674 | kfree(mp1); | |
2675 | cnt++; | |
2676 | if (mp2) { | |
2677 | lpfc_mbuf_free(phba, mp2->virt, mp2->phys); | |
2678 | kfree(mp2); | |
2679 | cnt++; | |
2680 | } | |
604a3e30 | 2681 | lpfc_sli_release_iocbq(phba, iocb); |
dea3101e | 2682 | pring->missbufcnt = cnt; |
dea3101e | 2683 | return cnt; |
2684 | } | |
dea3101e | 2685 | lpfc_sli_ringpostbuf_put(phba, pring, mp1); |
92d7f7b0 | 2686 | if (mp2) |
dea3101e | 2687 | lpfc_sli_ringpostbuf_put(phba, pring, mp2); |
dea3101e | 2688 | } |
2689 | pring->missbufcnt = 0; | |
2690 | return 0; | |
2691 | } | |
2692 | ||
e59058c4 | 2693 | /** |
3621a710 | 2694 | * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring |
e59058c4 JS |
2695 | * @phba: pointer to lpfc hba data structure. |
2696 | * | |
2697 | * This routine posts initial receive IOCB buffers to the ELS ring. The | |
2698 | * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is | |
895427bd | 2699 | * set to 64 IOCBs. SLI3 only. |
e59058c4 JS |
2700 | * |
2701 | * Return codes | |
2702 | * 0 - success (currently always success) | |
2703 | **/ | |
dea3101e | 2704 | static int |
2e0fef85 | 2705 | lpfc_post_rcv_buf(struct lpfc_hba *phba) |
dea3101e | 2706 | { |
2707 | struct lpfc_sli *psli = &phba->sli; | |
2708 | ||
2709 | /* Ring 0, ELS / CT buffers */ | |
895427bd | 2710 | lpfc_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0); |
dea3101e | 2711 | /* Ring 2 - FCP no buffers needed */ |
2712 | ||
2713 | return 0; | |
2714 | } | |
2715 | ||
2716 | #define S(N,V) (((V)<<(N))|((V)>>(32-(N)))) | |
2717 | ||
e59058c4 | 2718 | /** |
3621a710 | 2719 | * lpfc_sha_init - Set up initial array of hash table entries |
e59058c4 JS |
2720 | * @HashResultPointer: pointer to an array as hash table. |
2721 | * | |
2722 | * This routine sets up the initial values to the array of hash table entries | |
2723 | * for the LC HBAs. | |
2724 | **/ | |
dea3101e | 2725 | static void |
2726 | lpfc_sha_init(uint32_t * HashResultPointer) | |
2727 | { | |
2728 | HashResultPointer[0] = 0x67452301; | |
2729 | HashResultPointer[1] = 0xEFCDAB89; | |
2730 | HashResultPointer[2] = 0x98BADCFE; | |
2731 | HashResultPointer[3] = 0x10325476; | |
2732 | HashResultPointer[4] = 0xC3D2E1F0; | |
2733 | } | |
2734 | ||
e59058c4 | 2735 | /** |
3621a710 | 2736 | * lpfc_sha_iterate - Iterate initial hash table with the working hash table |
e59058c4 JS |
2737 | * @HashResultPointer: pointer to an initial/result hash table. |
2738 | * @HashWorkingPointer: pointer to an working hash table. | |
2739 | * | |
2740 | * This routine iterates an initial hash table pointed by @HashResultPointer | |
2741 | * with the values from the working hash table pointeed by @HashWorkingPointer. | |
2742 | * The results are putting back to the initial hash table, returned through | |
2743 | * the @HashResultPointer as the result hash table. | |
2744 | **/ | |
dea3101e | 2745 | static void |
2746 | lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer) | |
2747 | { | |
2748 | int t; | |
2749 | uint32_t TEMP; | |
2750 | uint32_t A, B, C, D, E; | |
2751 | t = 16; | |
2752 | do { | |
2753 | HashWorkingPointer[t] = | |
2754 | S(1, | |
2755 | HashWorkingPointer[t - 3] ^ HashWorkingPointer[t - | |
2756 | 8] ^ | |
2757 | HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]); | |
2758 | } while (++t <= 79); | |
2759 | t = 0; | |
2760 | A = HashResultPointer[0]; | |
2761 | B = HashResultPointer[1]; | |
2762 | C = HashResultPointer[2]; | |
2763 | D = HashResultPointer[3]; | |
2764 | E = HashResultPointer[4]; | |
2765 | ||
2766 | do { | |
2767 | if (t < 20) { | |
2768 | TEMP = ((B & C) | ((~B) & D)) + 0x5A827999; | |
2769 | } else if (t < 40) { | |
2770 | TEMP = (B ^ C ^ D) + 0x6ED9EBA1; | |
2771 | } else if (t < 60) { | |
2772 | TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC; | |
2773 | } else { | |
2774 | TEMP = (B ^ C ^ D) + 0xCA62C1D6; | |
2775 | } | |
2776 | TEMP += S(5, A) + E + HashWorkingPointer[t]; | |
2777 | E = D; | |
2778 | D = C; | |
2779 | C = S(30, B); | |
2780 | B = A; | |
2781 | A = TEMP; | |
2782 | } while (++t <= 79); | |
2783 | ||
2784 | HashResultPointer[0] += A; | |
2785 | HashResultPointer[1] += B; | |
2786 | HashResultPointer[2] += C; | |
2787 | HashResultPointer[3] += D; | |
2788 | HashResultPointer[4] += E; | |
2789 | ||
2790 | } | |
2791 | ||
e59058c4 | 2792 | /** |
3621a710 | 2793 | * lpfc_challenge_key - Create challenge key based on WWPN of the HBA |
e59058c4 JS |
2794 | * @RandomChallenge: pointer to the entry of host challenge random number array. |
2795 | * @HashWorking: pointer to the entry of the working hash array. | |
2796 | * | |
2797 | * This routine calculates the working hash array referred by @HashWorking | |
2798 | * from the challenge random numbers associated with the host, referred by | |
2799 | * @RandomChallenge. The result is put into the entry of the working hash | |
2800 | * array and returned by reference through @HashWorking. | |
2801 | **/ | |
dea3101e | 2802 | static void |
2803 | lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking) | |
2804 | { | |
2805 | *HashWorking = (*RandomChallenge ^ *HashWorking); | |
2806 | } | |
2807 | ||
e59058c4 | 2808 | /** |
3621a710 | 2809 | * lpfc_hba_init - Perform special handling for LC HBA initialization |
e59058c4 JS |
2810 | * @phba: pointer to lpfc hba data structure. |
2811 | * @hbainit: pointer to an array of unsigned 32-bit integers. | |
2812 | * | |
2813 | * This routine performs the special handling for LC HBA initialization. | |
2814 | **/ | |
dea3101e | 2815 | void |
2816 | lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit) | |
2817 | { | |
2818 | int t; | |
2819 | uint32_t *HashWorking; | |
2e0fef85 | 2820 | uint32_t *pwwnn = (uint32_t *) phba->wwnn; |
dea3101e | 2821 | |
bbfbbbc1 | 2822 | HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL); |
dea3101e | 2823 | if (!HashWorking) |
2824 | return; | |
2825 | ||
dea3101e | 2826 | HashWorking[0] = HashWorking[78] = *pwwnn++; |
2827 | HashWorking[1] = HashWorking[79] = *pwwnn; | |
2828 | ||
2829 | for (t = 0; t < 7; t++) | |
2830 | lpfc_challenge_key(phba->RandomData + t, HashWorking + t); | |
2831 | ||
2832 | lpfc_sha_init(hbainit); | |
2833 | lpfc_sha_iterate(hbainit, HashWorking); | |
2834 | kfree(HashWorking); | |
2835 | } | |
2836 | ||
e59058c4 | 2837 | /** |
3621a710 | 2838 | * lpfc_cleanup - Performs vport cleanups before deleting a vport |
e59058c4 JS |
2839 | * @vport: pointer to a virtual N_Port data structure. |
2840 | * | |
2841 | * This routine performs the necessary cleanups before deleting the @vport. | |
2842 | * It invokes the discovery state machine to perform necessary state | |
2843 | * transitions and to release the ndlps associated with the @vport. Note, | |
2844 | * the physical port is treated as @vport 0. | |
2845 | **/ | |
87af33fe | 2846 | void |
2e0fef85 | 2847 | lpfc_cleanup(struct lpfc_vport *vport) |
dea3101e | 2848 | { |
87af33fe | 2849 | struct lpfc_hba *phba = vport->phba; |
dea3101e | 2850 | struct lpfc_nodelist *ndlp, *next_ndlp; |
a8adb832 | 2851 | int i = 0; |
dea3101e | 2852 | |
87af33fe JS |
2853 | if (phba->link_state > LPFC_LINK_DOWN) |
2854 | lpfc_port_link_failure(vport); | |
2855 | ||
2856 | list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) { | |
58da1ffb JS |
2857 | if (vport->port_type != LPFC_PHYSICAL_PORT && |
2858 | ndlp->nlp_DID == Fabric_DID) { | |
2859 | /* Just free up ndlp with Fabric_DID for vports */ | |
2860 | lpfc_nlp_put(ndlp); | |
2861 | continue; | |
2862 | } | |
2863 | ||
a70e63ee JS |
2864 | if (ndlp->nlp_DID == Fabric_Cntl_DID && |
2865 | ndlp->nlp_state == NLP_STE_UNUSED_NODE) { | |
eff4a01b JS |
2866 | lpfc_nlp_put(ndlp); |
2867 | continue; | |
2868 | } | |
2869 | ||
e9b11083 JS |
2870 | /* Fabric Ports not in UNMAPPED state are cleaned up in the |
2871 | * DEVICE_RM event. | |
2872 | */ | |
2873 | if (ndlp->nlp_type & NLP_FABRIC && | |
2874 | ndlp->nlp_state == NLP_STE_UNMAPPED_NODE) | |
87af33fe JS |
2875 | lpfc_disc_state_machine(vport, ndlp, NULL, |
2876 | NLP_EVT_DEVICE_RECOVERY); | |
e47c9093 | 2877 | |
e9b11083 JS |
2878 | if (!(ndlp->fc4_xpt_flags & (NVME_XPT_REGD|SCSI_XPT_REGD))) |
2879 | lpfc_disc_state_machine(vport, ndlp, NULL, | |
2880 | NLP_EVT_DEVICE_RM); | |
87af33fe JS |
2881 | } |
2882 | ||
a8adb832 JS |
2883 | /* At this point, ALL ndlp's should be gone |
2884 | * because of the previous NLP_EVT_DEVICE_RM. | |
2885 | * Lets wait for this to happen, if needed. | |
2886 | */ | |
87af33fe | 2887 | while (!list_empty(&vport->fc_nodes)) { |
a8adb832 | 2888 | if (i++ > 3000) { |
372c187b DK |
2889 | lpfc_printf_vlog(vport, KERN_ERR, |
2890 | LOG_TRACE_EVENT, | |
a8adb832 | 2891 | "0233 Nodelist not empty\n"); |
e47c9093 JS |
2892 | list_for_each_entry_safe(ndlp, next_ndlp, |
2893 | &vport->fc_nodes, nlp_listp) { | |
2894 | lpfc_printf_vlog(ndlp->vport, KERN_ERR, | |
e9b11083 JS |
2895 | LOG_TRACE_EVENT, |
2896 | "0282 did:x%x ndlp:x%px " | |
2897 | "refcnt:%d xflags x%x nflag x%x\n", | |
2898 | ndlp->nlp_DID, (void *)ndlp, | |
2899 | kref_read(&ndlp->kref), | |
2900 | ndlp->fc4_xpt_flags, | |
2901 | ndlp->nlp_flag); | |
e47c9093 | 2902 | } |
a8adb832 | 2903 | break; |
87af33fe | 2904 | } |
a8adb832 JS |
2905 | |
2906 | /* Wait for any activity on ndlps to settle */ | |
2907 | msleep(10); | |
87af33fe | 2908 | } |
1151e3ec | 2909 | lpfc_cleanup_vports_rrqs(vport, NULL); |
dea3101e | 2910 | } |
2911 | ||
e59058c4 | 2912 | /** |
3621a710 | 2913 | * lpfc_stop_vport_timers - Stop all the timers associated with a vport |
e59058c4 JS |
2914 | * @vport: pointer to a virtual N_Port data structure. |
2915 | * | |
2916 | * This routine stops all the timers associated with a @vport. This function | |
2917 | * is invoked before disabling or deleting a @vport. Note that the physical | |
2918 | * port is treated as @vport 0. | |
2919 | **/ | |
92d7f7b0 JS |
2920 | void |
2921 | lpfc_stop_vport_timers(struct lpfc_vport *vport) | |
dea3101e | 2922 | { |
92d7f7b0 | 2923 | del_timer_sync(&vport->els_tmofunc); |
92494144 | 2924 | del_timer_sync(&vport->delayed_disc_tmo); |
92d7f7b0 JS |
2925 | lpfc_can_disctmo(vport); |
2926 | return; | |
dea3101e | 2927 | } |
2928 | ||
ecfd03c6 JS |
2929 | /** |
2930 | * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer | |
2931 | * @phba: pointer to lpfc hba data structure. | |
2932 | * | |
2933 | * This routine stops the SLI4 FCF rediscover wait timer if it's on. The | |
2934 | * caller of this routine should already hold the host lock. | |
2935 | **/ | |
2936 | void | |
2937 | __lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba) | |
2938 | { | |
5ac6b303 JS |
2939 | /* Clear pending FCF rediscovery wait flag */ |
2940 | phba->fcf.fcf_flag &= ~FCF_REDISC_PEND; | |
2941 | ||
ecfd03c6 JS |
2942 | /* Now, try to stop the timer */ |
2943 | del_timer(&phba->fcf.redisc_wait); | |
2944 | } | |
2945 | ||
2946 | /** | |
2947 | * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer | |
2948 | * @phba: pointer to lpfc hba data structure. | |
2949 | * | |
2950 | * This routine stops the SLI4 FCF rediscover wait timer if it's on. It | |
2951 | * checks whether the FCF rediscovery wait timer is pending with the host | |
2952 | * lock held before proceeding with disabling the timer and clearing the | |
2953 | * wait timer pendig flag. | |
2954 | **/ | |
2955 | void | |
2956 | lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba) | |
2957 | { | |
2958 | spin_lock_irq(&phba->hbalock); | |
2959 | if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) { | |
2960 | /* FCF rediscovery timer already fired or stopped */ | |
2961 | spin_unlock_irq(&phba->hbalock); | |
2962 | return; | |
2963 | } | |
2964 | __lpfc_sli4_stop_fcf_redisc_wait_timer(phba); | |
5ac6b303 JS |
2965 | /* Clear failover in progress flags */ |
2966 | phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC); | |
ecfd03c6 JS |
2967 | spin_unlock_irq(&phba->hbalock); |
2968 | } | |
2969 | ||
e59058c4 | 2970 | /** |
3772a991 | 2971 | * lpfc_stop_hba_timers - Stop all the timers associated with an HBA |
e59058c4 JS |
2972 | * @phba: pointer to lpfc hba data structure. |
2973 | * | |
2974 | * This routine stops all the timers associated with a HBA. This function is | |
2975 | * invoked before either putting a HBA offline or unloading the driver. | |
2976 | **/ | |
3772a991 JS |
2977 | void |
2978 | lpfc_stop_hba_timers(struct lpfc_hba *phba) | |
dea3101e | 2979 | { |
cdb42bec JS |
2980 | if (phba->pport) |
2981 | lpfc_stop_vport_timers(phba->pport); | |
32517fc0 | 2982 | cancel_delayed_work_sync(&phba->eq_delay_work); |
317aeb83 | 2983 | cancel_delayed_work_sync(&phba->idle_stat_delay_work); |
2e0fef85 | 2984 | del_timer_sync(&phba->sli.mbox_tmo); |
92d7f7b0 | 2985 | del_timer_sync(&phba->fabric_block_timer); |
9399627f | 2986 | del_timer_sync(&phba->eratt_poll); |
3772a991 | 2987 | del_timer_sync(&phba->hb_tmofunc); |
1151e3ec JS |
2988 | if (phba->sli_rev == LPFC_SLI_REV4) { |
2989 | del_timer_sync(&phba->rrq_tmr); | |
2990 | phba->hba_flag &= ~HBA_RRQ_ACTIVE; | |
2991 | } | |
3772a991 JS |
2992 | phba->hb_outstanding = 0; |
2993 | ||
2994 | switch (phba->pci_dev_grp) { | |
2995 | case LPFC_PCI_DEV_LP: | |
2996 | /* Stop any LightPulse device specific driver timers */ | |
2997 | del_timer_sync(&phba->fcp_poll_timer); | |
2998 | break; | |
2999 | case LPFC_PCI_DEV_OC: | |
cc0e5f1c | 3000 | /* Stop any OneConnect device specific driver timers */ |
ecfd03c6 | 3001 | lpfc_sli4_stop_fcf_redisc_wait_timer(phba); |
3772a991 JS |
3002 | break; |
3003 | default: | |
372c187b | 3004 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
3772a991 JS |
3005 | "0297 Invalid device group (x%x)\n", |
3006 | phba->pci_dev_grp); | |
3007 | break; | |
3008 | } | |
2e0fef85 | 3009 | return; |
dea3101e | 3010 | } |
3011 | ||
e59058c4 | 3012 | /** |
3621a710 | 3013 | * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked |
e59058c4 | 3014 | * @phba: pointer to lpfc hba data structure. |
fe614acd | 3015 | * @mbx_action: flag for mailbox no wait action. |
e59058c4 JS |
3016 | * |
3017 | * This routine marks a HBA's management interface as blocked. Once the HBA's | |
3018 | * management interface is marked as blocked, all the user space access to | |
3019 | * the HBA, whether they are from sysfs interface or libdfc interface will | |
3020 | * all be blocked. The HBA is set to block the management interface when the | |
3021 | * driver prepares the HBA interface for online or offline. | |
3022 | **/ | |
a6ababd2 | 3023 | static void |
618a5230 | 3024 | lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action) |
a6ababd2 AB |
3025 | { |
3026 | unsigned long iflag; | |
6e7288d9 JS |
3027 | uint8_t actcmd = MBX_HEARTBEAT; |
3028 | unsigned long timeout; | |
3029 | ||
a6ababd2 AB |
3030 | spin_lock_irqsave(&phba->hbalock, iflag); |
3031 | phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO; | |
618a5230 JS |
3032 | spin_unlock_irqrestore(&phba->hbalock, iflag); |
3033 | if (mbx_action == LPFC_MBX_NO_WAIT) | |
3034 | return; | |
3035 | timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies; | |
3036 | spin_lock_irqsave(&phba->hbalock, iflag); | |
a183a15f | 3037 | if (phba->sli.mbox_active) { |
6e7288d9 | 3038 | actcmd = phba->sli.mbox_active->u.mb.mbxCommand; |
a183a15f JS |
3039 | /* Determine how long we might wait for the active mailbox |
3040 | * command to be gracefully completed by firmware. | |
3041 | */ | |
3042 | timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, | |
3043 | phba->sli.mbox_active) * 1000) + jiffies; | |
3044 | } | |
a6ababd2 | 3045 | spin_unlock_irqrestore(&phba->hbalock, iflag); |
a183a15f | 3046 | |
6e7288d9 JS |
3047 | /* Wait for the outstnading mailbox command to complete */ |
3048 | while (phba->sli.mbox_active) { | |
3049 | /* Check active mailbox complete status every 2ms */ | |
3050 | msleep(2); | |
3051 | if (time_after(jiffies, timeout)) { | |
372c187b DK |
3052 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
3053 | "2813 Mgmt IO is Blocked %x " | |
3054 | "- mbox cmd %x still active\n", | |
3055 | phba->sli.sli_flag, actcmd); | |
6e7288d9 JS |
3056 | break; |
3057 | } | |
3058 | } | |
a6ababd2 AB |
3059 | } |
3060 | ||
6b5151fd JS |
3061 | /** |
3062 | * lpfc_sli4_node_prep - Assign RPIs for active nodes. | |
3063 | * @phba: pointer to lpfc hba data structure. | |
3064 | * | |
3065 | * Allocate RPIs for all active remote nodes. This is needed whenever | |
3066 | * an SLI4 adapter is reset and the driver is not unloading. Its purpose | |
3067 | * is to fixup the temporary rpi assignments. | |
3068 | **/ | |
3069 | void | |
3070 | lpfc_sli4_node_prep(struct lpfc_hba *phba) | |
3071 | { | |
3072 | struct lpfc_nodelist *ndlp, *next_ndlp; | |
3073 | struct lpfc_vport **vports; | |
9d3d340d | 3074 | int i, rpi; |
6b5151fd JS |
3075 | |
3076 | if (phba->sli_rev != LPFC_SLI_REV4) | |
3077 | return; | |
3078 | ||
3079 | vports = lpfc_create_vport_work_array(phba); | |
9d3d340d JS |
3080 | if (vports == NULL) |
3081 | return; | |
6b5151fd | 3082 | |
9d3d340d JS |
3083 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { |
3084 | if (vports[i]->load_flag & FC_UNLOADING) | |
3085 | continue; | |
3086 | ||
3087 | list_for_each_entry_safe(ndlp, next_ndlp, | |
3088 | &vports[i]->fc_nodes, | |
3089 | nlp_listp) { | |
9d3d340d JS |
3090 | rpi = lpfc_sli4_alloc_rpi(phba); |
3091 | if (rpi == LPFC_RPI_ALLOC_ERROR) { | |
307e3380 | 3092 | /* TODO print log? */ |
9d3d340d | 3093 | continue; |
6b5151fd | 3094 | } |
9d3d340d | 3095 | ndlp->nlp_rpi = rpi; |
0f154226 JS |
3096 | lpfc_printf_vlog(ndlp->vport, KERN_INFO, |
3097 | LOG_NODE | LOG_DISCOVERY, | |
3098 | "0009 Assign RPI x%x to ndlp x%px " | |
307e3380 | 3099 | "DID:x%06x flg:x%x\n", |
0f154226 | 3100 | ndlp->nlp_rpi, ndlp, ndlp->nlp_DID, |
307e3380 | 3101 | ndlp->nlp_flag); |
6b5151fd JS |
3102 | } |
3103 | } | |
3104 | lpfc_destroy_vport_work_array(phba, vports); | |
3105 | } | |
3106 | ||
c490850a JS |
3107 | /** |
3108 | * lpfc_create_expedite_pool - create expedite pool | |
3109 | * @phba: pointer to lpfc hba data structure. | |
3110 | * | |
3111 | * This routine moves a batch of XRIs from lpfc_io_buf_list_put of HWQ 0 | |
3112 | * to expedite pool. Mark them as expedite. | |
3113 | **/ | |
3999df75 | 3114 | static void lpfc_create_expedite_pool(struct lpfc_hba *phba) |
c490850a JS |
3115 | { |
3116 | struct lpfc_sli4_hdw_queue *qp; | |
3117 | struct lpfc_io_buf *lpfc_ncmd; | |
3118 | struct lpfc_io_buf *lpfc_ncmd_next; | |
3119 | struct lpfc_epd_pool *epd_pool; | |
3120 | unsigned long iflag; | |
3121 | ||
3122 | epd_pool = &phba->epd_pool; | |
3123 | qp = &phba->sli4_hba.hdwq[0]; | |
3124 | ||
3125 | spin_lock_init(&epd_pool->lock); | |
3126 | spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); | |
3127 | spin_lock(&epd_pool->lock); | |
3128 | INIT_LIST_HEAD(&epd_pool->list); | |
3129 | list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, | |
3130 | &qp->lpfc_io_buf_list_put, list) { | |
3131 | list_move_tail(&lpfc_ncmd->list, &epd_pool->list); | |
3132 | lpfc_ncmd->expedite = true; | |
3133 | qp->put_io_bufs--; | |
3134 | epd_pool->count++; | |
3135 | if (epd_pool->count >= XRI_BATCH) | |
3136 | break; | |
3137 | } | |
3138 | spin_unlock(&epd_pool->lock); | |
3139 | spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); | |
3140 | } | |
3141 | ||
3142 | /** | |
3143 | * lpfc_destroy_expedite_pool - destroy expedite pool | |
3144 | * @phba: pointer to lpfc hba data structure. | |
3145 | * | |
3146 | * This routine returns XRIs from expedite pool to lpfc_io_buf_list_put | |
3147 | * of HWQ 0. Clear the mark. | |
3148 | **/ | |
3999df75 | 3149 | static void lpfc_destroy_expedite_pool(struct lpfc_hba *phba) |
c490850a JS |
3150 | { |
3151 | struct lpfc_sli4_hdw_queue *qp; | |
3152 | struct lpfc_io_buf *lpfc_ncmd; | |
3153 | struct lpfc_io_buf *lpfc_ncmd_next; | |
3154 | struct lpfc_epd_pool *epd_pool; | |
3155 | unsigned long iflag; | |
3156 | ||
3157 | epd_pool = &phba->epd_pool; | |
3158 | qp = &phba->sli4_hba.hdwq[0]; | |
3159 | ||
3160 | spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); | |
3161 | spin_lock(&epd_pool->lock); | |
3162 | list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, | |
3163 | &epd_pool->list, list) { | |
3164 | list_move_tail(&lpfc_ncmd->list, | |
3165 | &qp->lpfc_io_buf_list_put); | |
3166 | lpfc_ncmd->flags = false; | |
3167 | qp->put_io_bufs++; | |
3168 | epd_pool->count--; | |
3169 | } | |
3170 | spin_unlock(&epd_pool->lock); | |
3171 | spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); | |
3172 | } | |
3173 | ||
3174 | /** | |
3175 | * lpfc_create_multixri_pools - create multi-XRI pools | |
3176 | * @phba: pointer to lpfc hba data structure. | |
3177 | * | |
3178 | * This routine initialize public, private per HWQ. Then, move XRIs from | |
3179 | * lpfc_io_buf_list_put to public pool. High and low watermark are also | |
3180 | * Initialized. | |
3181 | **/ | |
3182 | void lpfc_create_multixri_pools(struct lpfc_hba *phba) | |
3183 | { | |
3184 | u32 i, j; | |
3185 | u32 hwq_count; | |
3186 | u32 count_per_hwq; | |
3187 | struct lpfc_io_buf *lpfc_ncmd; | |
3188 | struct lpfc_io_buf *lpfc_ncmd_next; | |
3189 | unsigned long iflag; | |
3190 | struct lpfc_sli4_hdw_queue *qp; | |
3191 | struct lpfc_multixri_pool *multixri_pool; | |
3192 | struct lpfc_pbl_pool *pbl_pool; | |
3193 | struct lpfc_pvt_pool *pvt_pool; | |
3194 | ||
3195 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
3196 | "1234 num_hdw_queue=%d num_present_cpu=%d common_xri_cnt=%d\n", | |
3197 | phba->cfg_hdw_queue, phba->sli4_hba.num_present_cpu, | |
3198 | phba->sli4_hba.io_xri_cnt); | |
3199 | ||
3200 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) | |
3201 | lpfc_create_expedite_pool(phba); | |
3202 | ||
3203 | hwq_count = phba->cfg_hdw_queue; | |
3204 | count_per_hwq = phba->sli4_hba.io_xri_cnt / hwq_count; | |
3205 | ||
3206 | for (i = 0; i < hwq_count; i++) { | |
3207 | multixri_pool = kzalloc(sizeof(*multixri_pool), GFP_KERNEL); | |
3208 | ||
3209 | if (!multixri_pool) { | |
3210 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
3211 | "1238 Failed to allocate memory for " | |
3212 | "multixri_pool\n"); | |
3213 | ||
3214 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) | |
3215 | lpfc_destroy_expedite_pool(phba); | |
3216 | ||
3217 | j = 0; | |
3218 | while (j < i) { | |
3219 | qp = &phba->sli4_hba.hdwq[j]; | |
3220 | kfree(qp->p_multixri_pool); | |
3221 | j++; | |
3222 | } | |
3223 | phba->cfg_xri_rebalancing = 0; | |
3224 | return; | |
3225 | } | |
3226 | ||
3227 | qp = &phba->sli4_hba.hdwq[i]; | |
3228 | qp->p_multixri_pool = multixri_pool; | |
3229 | ||
3230 | multixri_pool->xri_limit = count_per_hwq; | |
3231 | multixri_pool->rrb_next_hwqid = i; | |
3232 | ||
3233 | /* Deal with public free xri pool */ | |
3234 | pbl_pool = &multixri_pool->pbl_pool; | |
3235 | spin_lock_init(&pbl_pool->lock); | |
3236 | spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); | |
3237 | spin_lock(&pbl_pool->lock); | |
3238 | INIT_LIST_HEAD(&pbl_pool->list); | |
3239 | list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, | |
3240 | &qp->lpfc_io_buf_list_put, list) { | |
3241 | list_move_tail(&lpfc_ncmd->list, &pbl_pool->list); | |
3242 | qp->put_io_bufs--; | |
3243 | pbl_pool->count++; | |
3244 | } | |
3245 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
3246 | "1235 Moved %d buffers from PUT list over to pbl_pool[%d]\n", | |
3247 | pbl_pool->count, i); | |
3248 | spin_unlock(&pbl_pool->lock); | |
3249 | spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); | |
3250 | ||
3251 | /* Deal with private free xri pool */ | |
3252 | pvt_pool = &multixri_pool->pvt_pool; | |
3253 | pvt_pool->high_watermark = multixri_pool->xri_limit / 2; | |
3254 | pvt_pool->low_watermark = XRI_BATCH; | |
3255 | spin_lock_init(&pvt_pool->lock); | |
3256 | spin_lock_irqsave(&pvt_pool->lock, iflag); | |
3257 | INIT_LIST_HEAD(&pvt_pool->list); | |
3258 | pvt_pool->count = 0; | |
3259 | spin_unlock_irqrestore(&pvt_pool->lock, iflag); | |
3260 | } | |
3261 | } | |
3262 | ||
3263 | /** | |
3264 | * lpfc_destroy_multixri_pools - destroy multi-XRI pools | |
3265 | * @phba: pointer to lpfc hba data structure. | |
3266 | * | |
3267 | * This routine returns XRIs from public/private to lpfc_io_buf_list_put. | |
3268 | **/ | |
3999df75 | 3269 | static void lpfc_destroy_multixri_pools(struct lpfc_hba *phba) |
c490850a JS |
3270 | { |
3271 | u32 i; | |
3272 | u32 hwq_count; | |
3273 | struct lpfc_io_buf *lpfc_ncmd; | |
3274 | struct lpfc_io_buf *lpfc_ncmd_next; | |
3275 | unsigned long iflag; | |
3276 | struct lpfc_sli4_hdw_queue *qp; | |
3277 | struct lpfc_multixri_pool *multixri_pool; | |
3278 | struct lpfc_pbl_pool *pbl_pool; | |
3279 | struct lpfc_pvt_pool *pvt_pool; | |
3280 | ||
3281 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) | |
3282 | lpfc_destroy_expedite_pool(phba); | |
3283 | ||
c00f62e6 JS |
3284 | if (!(phba->pport->load_flag & FC_UNLOADING)) |
3285 | lpfc_sli_flush_io_rings(phba); | |
c66a9197 | 3286 | |
c490850a JS |
3287 | hwq_count = phba->cfg_hdw_queue; |
3288 | ||
3289 | for (i = 0; i < hwq_count; i++) { | |
3290 | qp = &phba->sli4_hba.hdwq[i]; | |
3291 | multixri_pool = qp->p_multixri_pool; | |
3292 | if (!multixri_pool) | |
3293 | continue; | |
3294 | ||
3295 | qp->p_multixri_pool = NULL; | |
3296 | ||
3297 | spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); | |
3298 | ||
3299 | /* Deal with public free xri pool */ | |
3300 | pbl_pool = &multixri_pool->pbl_pool; | |
3301 | spin_lock(&pbl_pool->lock); | |
3302 | ||
3303 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
3304 | "1236 Moving %d buffers from pbl_pool[%d] TO PUT list\n", | |
3305 | pbl_pool->count, i); | |
3306 | ||
3307 | list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, | |
3308 | &pbl_pool->list, list) { | |
3309 | list_move_tail(&lpfc_ncmd->list, | |
3310 | &qp->lpfc_io_buf_list_put); | |
3311 | qp->put_io_bufs++; | |
3312 | pbl_pool->count--; | |
3313 | } | |
3314 | ||
3315 | INIT_LIST_HEAD(&pbl_pool->list); | |
3316 | pbl_pool->count = 0; | |
3317 | ||
3318 | spin_unlock(&pbl_pool->lock); | |
3319 | ||
3320 | /* Deal with private free xri pool */ | |
3321 | pvt_pool = &multixri_pool->pvt_pool; | |
3322 | spin_lock(&pvt_pool->lock); | |
3323 | ||
3324 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
3325 | "1237 Moving %d buffers from pvt_pool[%d] TO PUT list\n", | |
3326 | pvt_pool->count, i); | |
3327 | ||
3328 | list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, | |
3329 | &pvt_pool->list, list) { | |
3330 | list_move_tail(&lpfc_ncmd->list, | |
3331 | &qp->lpfc_io_buf_list_put); | |
3332 | qp->put_io_bufs++; | |
3333 | pvt_pool->count--; | |
3334 | } | |
3335 | ||
3336 | INIT_LIST_HEAD(&pvt_pool->list); | |
3337 | pvt_pool->count = 0; | |
3338 | ||
3339 | spin_unlock(&pvt_pool->lock); | |
3340 | spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); | |
3341 | ||
3342 | kfree(multixri_pool); | |
3343 | } | |
3344 | } | |
3345 | ||
e59058c4 | 3346 | /** |
3621a710 | 3347 | * lpfc_online - Initialize and bring a HBA online |
e59058c4 JS |
3348 | * @phba: pointer to lpfc hba data structure. |
3349 | * | |
3350 | * This routine initializes the HBA and brings a HBA online. During this | |
3351 | * process, the management interface is blocked to prevent user space access | |
3352 | * to the HBA interfering with the driver initialization. | |
3353 | * | |
3354 | * Return codes | |
3355 | * 0 - successful | |
3356 | * 1 - failed | |
3357 | **/ | |
dea3101e | 3358 | int |
2e0fef85 | 3359 | lpfc_online(struct lpfc_hba *phba) |
dea3101e | 3360 | { |
372bd282 | 3361 | struct lpfc_vport *vport; |
549e55cd | 3362 | struct lpfc_vport **vports; |
a145fda3 | 3363 | int i, error = 0; |
16a3a208 | 3364 | bool vpis_cleared = false; |
2e0fef85 | 3365 | |
dea3101e | 3366 | if (!phba) |
3367 | return 0; | |
372bd282 | 3368 | vport = phba->pport; |
dea3101e | 3369 | |
2e0fef85 | 3370 | if (!(vport->fc_flag & FC_OFFLINE_MODE)) |
dea3101e | 3371 | return 0; |
3372 | ||
ed957684 | 3373 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, |
e8b62011 | 3374 | "0458 Bring Adapter online\n"); |
dea3101e | 3375 | |
618a5230 | 3376 | lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT); |
46fa311e | 3377 | |
da0436e9 JS |
3378 | if (phba->sli_rev == LPFC_SLI_REV4) { |
3379 | if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */ | |
3380 | lpfc_unblock_mgmt_io(phba); | |
3381 | return 1; | |
3382 | } | |
16a3a208 JS |
3383 | spin_lock_irq(&phba->hbalock); |
3384 | if (!phba->sli4_hba.max_cfg_param.vpi_used) | |
3385 | vpis_cleared = true; | |
3386 | spin_unlock_irq(&phba->hbalock); | |
a145fda3 DK |
3387 | |
3388 | /* Reestablish the local initiator port. | |
3389 | * The offline process destroyed the previous lport. | |
3390 | */ | |
3391 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME && | |
3392 | !phba->nvmet_support) { | |
3393 | error = lpfc_nvme_create_localport(phba->pport); | |
3394 | if (error) | |
372c187b | 3395 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
a145fda3 DK |
3396 | "6132 NVME restore reg failed " |
3397 | "on nvmei error x%x\n", error); | |
3398 | } | |
da0436e9 | 3399 | } else { |
895427bd | 3400 | lpfc_sli_queue_init(phba); |
da0436e9 JS |
3401 | if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */ |
3402 | lpfc_unblock_mgmt_io(phba); | |
3403 | return 1; | |
3404 | } | |
46fa311e | 3405 | } |
dea3101e | 3406 | |
549e55cd | 3407 | vports = lpfc_create_vport_work_array(phba); |
aeb6641f | 3408 | if (vports != NULL) { |
da0436e9 | 3409 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { |
549e55cd JS |
3410 | struct Scsi_Host *shost; |
3411 | shost = lpfc_shost_from_vport(vports[i]); | |
3412 | spin_lock_irq(shost->host_lock); | |
3413 | vports[i]->fc_flag &= ~FC_OFFLINE_MODE; | |
3414 | if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED) | |
3415 | vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI; | |
16a3a208 | 3416 | if (phba->sli_rev == LPFC_SLI_REV4) { |
1c6834a7 | 3417 | vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI; |
16a3a208 JS |
3418 | if ((vpis_cleared) && |
3419 | (vports[i]->port_type != | |
3420 | LPFC_PHYSICAL_PORT)) | |
3421 | vports[i]->vpi = 0; | |
3422 | } | |
549e55cd JS |
3423 | spin_unlock_irq(shost->host_lock); |
3424 | } | |
aeb6641f AB |
3425 | } |
3426 | lpfc_destroy_vport_work_array(phba, vports); | |
dea3101e | 3427 | |
c490850a JS |
3428 | if (phba->cfg_xri_rebalancing) |
3429 | lpfc_create_multixri_pools(phba); | |
3430 | ||
93a4d6f4 JS |
3431 | lpfc_cpuhp_add(phba); |
3432 | ||
46fa311e | 3433 | lpfc_unblock_mgmt_io(phba); |
dea3101e | 3434 | return 0; |
3435 | } | |
3436 | ||
e59058c4 | 3437 | /** |
3621a710 | 3438 | * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked |
e59058c4 JS |
3439 | * @phba: pointer to lpfc hba data structure. |
3440 | * | |
3441 | * This routine marks a HBA's management interface as not blocked. Once the | |
3442 | * HBA's management interface is marked as not blocked, all the user space | |
3443 | * access to the HBA, whether they are from sysfs interface or libdfc | |
3444 | * interface will be allowed. The HBA is set to block the management interface | |
3445 | * when the driver prepares the HBA interface for online or offline and then | |
3446 | * set to unblock the management interface afterwards. | |
3447 | **/ | |
46fa311e JS |
3448 | void |
3449 | lpfc_unblock_mgmt_io(struct lpfc_hba * phba) | |
3450 | { | |
3451 | unsigned long iflag; | |
3452 | ||
2e0fef85 JS |
3453 | spin_lock_irqsave(&phba->hbalock, iflag); |
3454 | phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO; | |
3455 | spin_unlock_irqrestore(&phba->hbalock, iflag); | |
46fa311e JS |
3456 | } |
3457 | ||
e59058c4 | 3458 | /** |
3621a710 | 3459 | * lpfc_offline_prep - Prepare a HBA to be brought offline |
e59058c4 | 3460 | * @phba: pointer to lpfc hba data structure. |
fe614acd | 3461 | * @mbx_action: flag for mailbox shutdown action. |
e59058c4 JS |
3462 | * |
3463 | * This routine is invoked to prepare a HBA to be brought offline. It performs | |
3464 | * unregistration login to all the nodes on all vports and flushes the mailbox | |
3465 | * queue to make it ready to be brought offline. | |
3466 | **/ | |
46fa311e | 3467 | void |
618a5230 | 3468 | lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action) |
46fa311e | 3469 | { |
2e0fef85 | 3470 | struct lpfc_vport *vport = phba->pport; |
46fa311e | 3471 | struct lpfc_nodelist *ndlp, *next_ndlp; |
87af33fe | 3472 | struct lpfc_vport **vports; |
72100cc4 | 3473 | struct Scsi_Host *shost; |
87af33fe | 3474 | int i; |
dea3101e | 3475 | |
2e0fef85 | 3476 | if (vport->fc_flag & FC_OFFLINE_MODE) |
46fa311e | 3477 | return; |
dea3101e | 3478 | |
618a5230 | 3479 | lpfc_block_mgmt_io(phba, mbx_action); |
dea3101e | 3480 | |
3481 | lpfc_linkdown(phba); | |
3482 | ||
87af33fe JS |
3483 | /* Issue an unreg_login to all nodes on all vports */ |
3484 | vports = lpfc_create_vport_work_array(phba); | |
3485 | if (vports != NULL) { | |
da0436e9 | 3486 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { |
a8adb832 JS |
3487 | if (vports[i]->load_flag & FC_UNLOADING) |
3488 | continue; | |
72100cc4 JS |
3489 | shost = lpfc_shost_from_vport(vports[i]); |
3490 | spin_lock_irq(shost->host_lock); | |
c868595d | 3491 | vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED; |
695a814e JS |
3492 | vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI; |
3493 | vports[i]->fc_flag &= ~FC_VFI_REGISTERED; | |
72100cc4 | 3494 | spin_unlock_irq(shost->host_lock); |
695a814e | 3495 | |
87af33fe JS |
3496 | shost = lpfc_shost_from_vport(vports[i]); |
3497 | list_for_each_entry_safe(ndlp, next_ndlp, | |
3498 | &vports[i]->fc_nodes, | |
3499 | nlp_listp) { | |
307e3380 | 3500 | if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) { |
0f154226 JS |
3501 | /* Driver must assume RPI is invalid for |
3502 | * any unused or inactive node. | |
3503 | */ | |
3504 | ndlp->nlp_rpi = LPFC_RPI_ALLOC_ERROR; | |
87af33fe | 3505 | continue; |
0f154226 JS |
3506 | } |
3507 | ||
c6adba15 | 3508 | spin_lock_irq(&ndlp->lock); |
87af33fe | 3509 | ndlp->nlp_flag &= ~NLP_NPR_ADISC; |
c6adba15 | 3510 | spin_unlock_irq(&ndlp->lock); |
6b5151fd JS |
3511 | /* |
3512 | * Whenever an SLI4 port goes offline, free the | |
401ee0c1 JS |
3513 | * RPI. Get a new RPI when the adapter port |
3514 | * comes back online. | |
6b5151fd | 3515 | */ |
be6bb941 | 3516 | if (phba->sli_rev == LPFC_SLI_REV4) { |
e9b11083 | 3517 | lpfc_printf_vlog(vports[i], KERN_INFO, |
0f154226 JS |
3518 | LOG_NODE | LOG_DISCOVERY, |
3519 | "0011 Free RPI x%x on " | |
e9b11083 | 3520 | "ndlp: %p did x%x\n", |
0f154226 | 3521 | ndlp->nlp_rpi, ndlp, |
307e3380 | 3522 | ndlp->nlp_DID); |
6b5151fd | 3523 | lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi); |
0f154226 | 3524 | ndlp->nlp_rpi = LPFC_RPI_ALLOC_ERROR; |
be6bb941 | 3525 | } |
87af33fe | 3526 | lpfc_unreg_rpi(vports[i], ndlp); |
307e3380 JS |
3527 | |
3528 | if (ndlp->nlp_type & NLP_FABRIC) { | |
3529 | lpfc_disc_state_machine(vports[i], ndlp, | |
3530 | NULL, NLP_EVT_DEVICE_RECOVERY); | |
e9b11083 JS |
3531 | |
3532 | /* Don't remove the node unless the | |
3533 | * has been unregistered with the | |
3534 | * transport. If so, let dev_loss | |
3535 | * take care of the node. | |
3536 | */ | |
3537 | if (!(ndlp->fc4_xpt_flags & | |
3538 | (NVME_XPT_REGD | SCSI_XPT_REGD))) | |
3539 | lpfc_disc_state_machine | |
3540 | (vports[i], ndlp, | |
3541 | NULL, | |
3542 | NLP_EVT_DEVICE_RM); | |
307e3380 | 3543 | } |
87af33fe JS |
3544 | } |
3545 | } | |
3546 | } | |
09372820 | 3547 | lpfc_destroy_vport_work_array(phba, vports); |
dea3101e | 3548 | |
618a5230 | 3549 | lpfc_sli_mbox_sys_shutdown(phba, mbx_action); |
f485c18d DK |
3550 | |
3551 | if (phba->wq) | |
3552 | flush_workqueue(phba->wq); | |
46fa311e JS |
3553 | } |
3554 | ||
e59058c4 | 3555 | /** |
3621a710 | 3556 | * lpfc_offline - Bring a HBA offline |
e59058c4 JS |
3557 | * @phba: pointer to lpfc hba data structure. |
3558 | * | |
3559 | * This routine actually brings a HBA offline. It stops all the timers | |
3560 | * associated with the HBA, brings down the SLI layer, and eventually | |
3561 | * marks the HBA as in offline state for the upper layer protocol. | |
3562 | **/ | |
46fa311e | 3563 | void |
2e0fef85 | 3564 | lpfc_offline(struct lpfc_hba *phba) |
46fa311e | 3565 | { |
549e55cd JS |
3566 | struct Scsi_Host *shost; |
3567 | struct lpfc_vport **vports; | |
3568 | int i; | |
46fa311e | 3569 | |
549e55cd | 3570 | if (phba->pport->fc_flag & FC_OFFLINE_MODE) |
46fa311e | 3571 | return; |
688a8863 | 3572 | |
da0436e9 JS |
3573 | /* stop port and all timers associated with this hba */ |
3574 | lpfc_stop_port(phba); | |
4b40d02b DK |
3575 | |
3576 | /* Tear down the local and target port registrations. The | |
3577 | * nvme transports need to cleanup. | |
3578 | */ | |
3579 | lpfc_nvmet_destroy_targetport(phba); | |
3580 | lpfc_nvme_destroy_localport(phba->pport); | |
3581 | ||
51ef4c26 JS |
3582 | vports = lpfc_create_vport_work_array(phba); |
3583 | if (vports != NULL) | |
da0436e9 | 3584 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) |
51ef4c26 | 3585 | lpfc_stop_vport_timers(vports[i]); |
09372820 | 3586 | lpfc_destroy_vport_work_array(phba, vports); |
92d7f7b0 | 3587 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, |
e8b62011 | 3588 | "0460 Bring Adapter offline\n"); |
dea3101e | 3589 | /* Bring down the SLI Layer and cleanup. The HBA is offline |
3590 | now. */ | |
3591 | lpfc_sli_hba_down(phba); | |
92d7f7b0 | 3592 | spin_lock_irq(&phba->hbalock); |
7054a606 | 3593 | phba->work_ha = 0; |
92d7f7b0 | 3594 | spin_unlock_irq(&phba->hbalock); |
549e55cd JS |
3595 | vports = lpfc_create_vport_work_array(phba); |
3596 | if (vports != NULL) | |
da0436e9 | 3597 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { |
549e55cd | 3598 | shost = lpfc_shost_from_vport(vports[i]); |
549e55cd JS |
3599 | spin_lock_irq(shost->host_lock); |
3600 | vports[i]->work_port_events = 0; | |
3601 | vports[i]->fc_flag |= FC_OFFLINE_MODE; | |
3602 | spin_unlock_irq(shost->host_lock); | |
3603 | } | |
09372820 | 3604 | lpfc_destroy_vport_work_array(phba, vports); |
f0871ab6 JS |
3605 | /* If OFFLINE flag is clear (i.e. unloading), cpuhp removal is handled |
3606 | * in hba_unset | |
3607 | */ | |
3608 | if (phba->pport->fc_flag & FC_OFFLINE_MODE) | |
3609 | __lpfc_cpuhp_remove(phba); | |
c490850a JS |
3610 | |
3611 | if (phba->cfg_xri_rebalancing) | |
3612 | lpfc_destroy_multixri_pools(phba); | |
dea3101e | 3613 | } |
3614 | ||
e59058c4 | 3615 | /** |
3621a710 | 3616 | * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists |
e59058c4 JS |
3617 | * @phba: pointer to lpfc hba data structure. |
3618 | * | |
3619 | * This routine is to free all the SCSI buffers and IOCBs from the driver | |
3620 | * list back to kernel. It is called from lpfc_pci_remove_one to free | |
3621 | * the internal resources before the device is removed from the system. | |
e59058c4 | 3622 | **/ |
8a9d2e80 | 3623 | static void |
2e0fef85 | 3624 | lpfc_scsi_free(struct lpfc_hba *phba) |
dea3101e | 3625 | { |
c490850a | 3626 | struct lpfc_io_buf *sb, *sb_next; |
dea3101e | 3627 | |
895427bd JS |
3628 | if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)) |
3629 | return; | |
3630 | ||
2e0fef85 | 3631 | spin_lock_irq(&phba->hbalock); |
a40fc5f0 | 3632 | |
dea3101e | 3633 | /* Release all the lpfc_scsi_bufs maintained by this host. */ |
a40fc5f0 JS |
3634 | |
3635 | spin_lock(&phba->scsi_buf_list_put_lock); | |
3636 | list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put, | |
3637 | list) { | |
dea3101e | 3638 | list_del(&sb->list); |
771db5c0 | 3639 | dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data, |
92d7f7b0 | 3640 | sb->dma_handle); |
dea3101e | 3641 | kfree(sb); |
3642 | phba->total_scsi_bufs--; | |
3643 | } | |
a40fc5f0 JS |
3644 | spin_unlock(&phba->scsi_buf_list_put_lock); |
3645 | ||
3646 | spin_lock(&phba->scsi_buf_list_get_lock); | |
3647 | list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get, | |
3648 | list) { | |
dea3101e | 3649 | list_del(&sb->list); |
771db5c0 | 3650 | dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data, |
92d7f7b0 | 3651 | sb->dma_handle); |
dea3101e | 3652 | kfree(sb); |
3653 | phba->total_scsi_bufs--; | |
3654 | } | |
a40fc5f0 | 3655 | spin_unlock(&phba->scsi_buf_list_get_lock); |
2e0fef85 | 3656 | spin_unlock_irq(&phba->hbalock); |
8a9d2e80 | 3657 | } |
0794d601 | 3658 | |
895427bd | 3659 | /** |
5e5b511d | 3660 | * lpfc_io_free - Free all the IO buffers and IOCBs from driver lists |
895427bd JS |
3661 | * @phba: pointer to lpfc hba data structure. |
3662 | * | |
0794d601 | 3663 | * This routine is to free all the IO buffers and IOCBs from the driver |
895427bd JS |
3664 | * list back to kernel. It is called from lpfc_pci_remove_one to free |
3665 | * the internal resources before the device is removed from the system. | |
3666 | **/ | |
c490850a | 3667 | void |
5e5b511d | 3668 | lpfc_io_free(struct lpfc_hba *phba) |
895427bd | 3669 | { |
c490850a | 3670 | struct lpfc_io_buf *lpfc_ncmd, *lpfc_ncmd_next; |
5e5b511d JS |
3671 | struct lpfc_sli4_hdw_queue *qp; |
3672 | int idx; | |
895427bd | 3673 | |
5e5b511d JS |
3674 | for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { |
3675 | qp = &phba->sli4_hba.hdwq[idx]; | |
3676 | /* Release all the lpfc_nvme_bufs maintained by this host. */ | |
3677 | spin_lock(&qp->io_buf_list_put_lock); | |
3678 | list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, | |
3679 | &qp->lpfc_io_buf_list_put, | |
3680 | list) { | |
3681 | list_del(&lpfc_ncmd->list); | |
3682 | qp->put_io_bufs--; | |
3683 | dma_pool_free(phba->lpfc_sg_dma_buf_pool, | |
3684 | lpfc_ncmd->data, lpfc_ncmd->dma_handle); | |
d79c9e9d JS |
3685 | if (phba->cfg_xpsgl && !phba->nvmet_support) |
3686 | lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd); | |
3687 | lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd); | |
5e5b511d JS |
3688 | kfree(lpfc_ncmd); |
3689 | qp->total_io_bufs--; | |
3690 | } | |
3691 | spin_unlock(&qp->io_buf_list_put_lock); | |
3692 | ||
3693 | spin_lock(&qp->io_buf_list_get_lock); | |
3694 | list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, | |
3695 | &qp->lpfc_io_buf_list_get, | |
3696 | list) { | |
3697 | list_del(&lpfc_ncmd->list); | |
3698 | qp->get_io_bufs--; | |
3699 | dma_pool_free(phba->lpfc_sg_dma_buf_pool, | |
3700 | lpfc_ncmd->data, lpfc_ncmd->dma_handle); | |
d79c9e9d JS |
3701 | if (phba->cfg_xpsgl && !phba->nvmet_support) |
3702 | lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd); | |
3703 | lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd); | |
5e5b511d JS |
3704 | kfree(lpfc_ncmd); |
3705 | qp->total_io_bufs--; | |
3706 | } | |
3707 | spin_unlock(&qp->io_buf_list_get_lock); | |
895427bd | 3708 | } |
895427bd | 3709 | } |
0794d601 | 3710 | |
8a9d2e80 | 3711 | /** |
895427bd | 3712 | * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping |
8a9d2e80 JS |
3713 | * @phba: pointer to lpfc hba data structure. |
3714 | * | |
3715 | * This routine first calculates the sizes of the current els and allocated | |
3716 | * scsi sgl lists, and then goes through all sgls to updates the physical | |
3717 | * XRIs assigned due to port function reset. During port initialization, the | |
3718 | * current els and allocated scsi sgl lists are 0s. | |
3719 | * | |
3720 | * Return codes | |
3721 | * 0 - successful (for now, it always returns 0) | |
3722 | **/ | |
3723 | int | |
895427bd | 3724 | lpfc_sli4_els_sgl_update(struct lpfc_hba *phba) |
8a9d2e80 JS |
3725 | { |
3726 | struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL; | |
895427bd | 3727 | uint16_t i, lxri, xri_cnt, els_xri_cnt; |
8a9d2e80 | 3728 | LIST_HEAD(els_sgl_list); |
8a9d2e80 JS |
3729 | int rc; |
3730 | ||
3731 | /* | |
3732 | * update on pci function's els xri-sgl list | |
3733 | */ | |
3734 | els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); | |
895427bd | 3735 | |
8a9d2e80 JS |
3736 | if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) { |
3737 | /* els xri-sgl expanded */ | |
3738 | xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt; | |
3739 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
3740 | "3157 ELS xri-sgl count increased from " | |
3741 | "%d to %d\n", phba->sli4_hba.els_xri_cnt, | |
3742 | els_xri_cnt); | |
3743 | /* allocate the additional els sgls */ | |
3744 | for (i = 0; i < xri_cnt; i++) { | |
3745 | sglq_entry = kzalloc(sizeof(struct lpfc_sglq), | |
3746 | GFP_KERNEL); | |
3747 | if (sglq_entry == NULL) { | |
372c187b DK |
3748 | lpfc_printf_log(phba, KERN_ERR, |
3749 | LOG_TRACE_EVENT, | |
8a9d2e80 JS |
3750 | "2562 Failure to allocate an " |
3751 | "ELS sgl entry:%d\n", i); | |
3752 | rc = -ENOMEM; | |
3753 | goto out_free_mem; | |
3754 | } | |
3755 | sglq_entry->buff_type = GEN_BUFF_TYPE; | |
3756 | sglq_entry->virt = lpfc_mbuf_alloc(phba, 0, | |
3757 | &sglq_entry->phys); | |
3758 | if (sglq_entry->virt == NULL) { | |
3759 | kfree(sglq_entry); | |
372c187b DK |
3760 | lpfc_printf_log(phba, KERN_ERR, |
3761 | LOG_TRACE_EVENT, | |
8a9d2e80 JS |
3762 | "2563 Failure to allocate an " |
3763 | "ELS mbuf:%d\n", i); | |
3764 | rc = -ENOMEM; | |
3765 | goto out_free_mem; | |
3766 | } | |
3767 | sglq_entry->sgl = sglq_entry->virt; | |
3768 | memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE); | |
3769 | sglq_entry->state = SGL_FREED; | |
3770 | list_add_tail(&sglq_entry->list, &els_sgl_list); | |
3771 | } | |
38c20673 | 3772 | spin_lock_irq(&phba->hbalock); |
895427bd JS |
3773 | spin_lock(&phba->sli4_hba.sgl_list_lock); |
3774 | list_splice_init(&els_sgl_list, | |
3775 | &phba->sli4_hba.lpfc_els_sgl_list); | |
3776 | spin_unlock(&phba->sli4_hba.sgl_list_lock); | |
38c20673 | 3777 | spin_unlock_irq(&phba->hbalock); |
8a9d2e80 JS |
3778 | } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) { |
3779 | /* els xri-sgl shrinked */ | |
3780 | xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt; | |
3781 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
3782 | "3158 ELS xri-sgl count decreased from " | |
3783 | "%d to %d\n", phba->sli4_hba.els_xri_cnt, | |
3784 | els_xri_cnt); | |
3785 | spin_lock_irq(&phba->hbalock); | |
895427bd JS |
3786 | spin_lock(&phba->sli4_hba.sgl_list_lock); |
3787 | list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, | |
3788 | &els_sgl_list); | |
8a9d2e80 JS |
3789 | /* release extra els sgls from list */ |
3790 | for (i = 0; i < xri_cnt; i++) { | |
3791 | list_remove_head(&els_sgl_list, | |
3792 | sglq_entry, struct lpfc_sglq, list); | |
3793 | if (sglq_entry) { | |
895427bd JS |
3794 | __lpfc_mbuf_free(phba, sglq_entry->virt, |
3795 | sglq_entry->phys); | |
8a9d2e80 JS |
3796 | kfree(sglq_entry); |
3797 | } | |
3798 | } | |
895427bd JS |
3799 | list_splice_init(&els_sgl_list, |
3800 | &phba->sli4_hba.lpfc_els_sgl_list); | |
3801 | spin_unlock(&phba->sli4_hba.sgl_list_lock); | |
8a9d2e80 JS |
3802 | spin_unlock_irq(&phba->hbalock); |
3803 | } else | |
3804 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
3805 | "3163 ELS xri-sgl count unchanged: %d\n", | |
3806 | els_xri_cnt); | |
3807 | phba->sli4_hba.els_xri_cnt = els_xri_cnt; | |
3808 | ||
3809 | /* update xris to els sgls on the list */ | |
3810 | sglq_entry = NULL; | |
3811 | sglq_entry_next = NULL; | |
3812 | list_for_each_entry_safe(sglq_entry, sglq_entry_next, | |
895427bd | 3813 | &phba->sli4_hba.lpfc_els_sgl_list, list) { |
8a9d2e80 JS |
3814 | lxri = lpfc_sli4_next_xritag(phba); |
3815 | if (lxri == NO_XRI) { | |
372c187b DK |
3816 | lpfc_printf_log(phba, KERN_ERR, |
3817 | LOG_TRACE_EVENT, | |
8a9d2e80 JS |
3818 | "2400 Failed to allocate xri for " |
3819 | "ELS sgl\n"); | |
3820 | rc = -ENOMEM; | |
3821 | goto out_free_mem; | |
3822 | } | |
3823 | sglq_entry->sli4_lxritag = lxri; | |
3824 | sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; | |
3825 | } | |
895427bd JS |
3826 | return 0; |
3827 | ||
3828 | out_free_mem: | |
3829 | lpfc_free_els_sgl_list(phba); | |
3830 | return rc; | |
3831 | } | |
3832 | ||
f358dd0c JS |
3833 | /** |
3834 | * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping | |
3835 | * @phba: pointer to lpfc hba data structure. | |
3836 | * | |
3837 | * This routine first calculates the sizes of the current els and allocated | |
3838 | * scsi sgl lists, and then goes through all sgls to updates the physical | |
3839 | * XRIs assigned due to port function reset. During port initialization, the | |
3840 | * current els and allocated scsi sgl lists are 0s. | |
3841 | * | |
3842 | * Return codes | |
3843 | * 0 - successful (for now, it always returns 0) | |
3844 | **/ | |
3845 | int | |
3846 | lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba) | |
3847 | { | |
3848 | struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL; | |
3849 | uint16_t i, lxri, xri_cnt, els_xri_cnt; | |
6c621a22 | 3850 | uint16_t nvmet_xri_cnt; |
f358dd0c JS |
3851 | LIST_HEAD(nvmet_sgl_list); |
3852 | int rc; | |
3853 | ||
3854 | /* | |
3855 | * update on pci function's nvmet xri-sgl list | |
3856 | */ | |
3857 | els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); | |
61f3d4bf | 3858 | |
6c621a22 JS |
3859 | /* For NVMET, ALL remaining XRIs are dedicated for IO processing */ |
3860 | nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt; | |
f358dd0c JS |
3861 | if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) { |
3862 | /* els xri-sgl expanded */ | |
3863 | xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt; | |
3864 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
3865 | "6302 NVMET xri-sgl cnt grew from %d to %d\n", | |
3866 | phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt); | |
3867 | /* allocate the additional nvmet sgls */ | |
3868 | for (i = 0; i < xri_cnt; i++) { | |
3869 | sglq_entry = kzalloc(sizeof(struct lpfc_sglq), | |
3870 | GFP_KERNEL); | |
3871 | if (sglq_entry == NULL) { | |
372c187b DK |
3872 | lpfc_printf_log(phba, KERN_ERR, |
3873 | LOG_TRACE_EVENT, | |
f358dd0c JS |
3874 | "6303 Failure to allocate an " |
3875 | "NVMET sgl entry:%d\n", i); | |
3876 | rc = -ENOMEM; | |
3877 | goto out_free_mem; | |
3878 | } | |
3879 | sglq_entry->buff_type = NVMET_BUFF_TYPE; | |
3880 | sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0, | |
3881 | &sglq_entry->phys); | |
3882 | if (sglq_entry->virt == NULL) { | |
3883 | kfree(sglq_entry); | |
372c187b DK |
3884 | lpfc_printf_log(phba, KERN_ERR, |
3885 | LOG_TRACE_EVENT, | |
f358dd0c JS |
3886 | "6304 Failure to allocate an " |
3887 | "NVMET buf:%d\n", i); | |
3888 | rc = -ENOMEM; | |
3889 | goto out_free_mem; | |
3890 | } | |
3891 | sglq_entry->sgl = sglq_entry->virt; | |
3892 | memset(sglq_entry->sgl, 0, | |
3893 | phba->cfg_sg_dma_buf_size); | |
3894 | sglq_entry->state = SGL_FREED; | |
3895 | list_add_tail(&sglq_entry->list, &nvmet_sgl_list); | |
3896 | } | |
3897 | spin_lock_irq(&phba->hbalock); | |
3898 | spin_lock(&phba->sli4_hba.sgl_list_lock); | |
3899 | list_splice_init(&nvmet_sgl_list, | |
3900 | &phba->sli4_hba.lpfc_nvmet_sgl_list); | |
3901 | spin_unlock(&phba->sli4_hba.sgl_list_lock); | |
3902 | spin_unlock_irq(&phba->hbalock); | |
3903 | } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) { | |
3904 | /* nvmet xri-sgl shrunk */ | |
3905 | xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt; | |
3906 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
3907 | "6305 NVMET xri-sgl count decreased from " | |
3908 | "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt, | |
3909 | nvmet_xri_cnt); | |
3910 | spin_lock_irq(&phba->hbalock); | |
3911 | spin_lock(&phba->sli4_hba.sgl_list_lock); | |
3912 | list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, | |
3913 | &nvmet_sgl_list); | |
3914 | /* release extra nvmet sgls from list */ | |
3915 | for (i = 0; i < xri_cnt; i++) { | |
3916 | list_remove_head(&nvmet_sgl_list, | |
3917 | sglq_entry, struct lpfc_sglq, list); | |
3918 | if (sglq_entry) { | |
3919 | lpfc_nvmet_buf_free(phba, sglq_entry->virt, | |
3920 | sglq_entry->phys); | |
3921 | kfree(sglq_entry); | |
3922 | } | |
3923 | } | |
3924 | list_splice_init(&nvmet_sgl_list, | |
3925 | &phba->sli4_hba.lpfc_nvmet_sgl_list); | |
3926 | spin_unlock(&phba->sli4_hba.sgl_list_lock); | |
3927 | spin_unlock_irq(&phba->hbalock); | |
3928 | } else | |
3929 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
3930 | "6306 NVMET xri-sgl count unchanged: %d\n", | |
3931 | nvmet_xri_cnt); | |
3932 | phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt; | |
3933 | ||
3934 | /* update xris to nvmet sgls on the list */ | |
3935 | sglq_entry = NULL; | |
3936 | sglq_entry_next = NULL; | |
3937 | list_for_each_entry_safe(sglq_entry, sglq_entry_next, | |
3938 | &phba->sli4_hba.lpfc_nvmet_sgl_list, list) { | |
3939 | lxri = lpfc_sli4_next_xritag(phba); | |
3940 | if (lxri == NO_XRI) { | |
372c187b DK |
3941 | lpfc_printf_log(phba, KERN_ERR, |
3942 | LOG_TRACE_EVENT, | |
f358dd0c JS |
3943 | "6307 Failed to allocate xri for " |
3944 | "NVMET sgl\n"); | |
3945 | rc = -ENOMEM; | |
3946 | goto out_free_mem; | |
3947 | } | |
3948 | sglq_entry->sli4_lxritag = lxri; | |
3949 | sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; | |
3950 | } | |
3951 | return 0; | |
3952 | ||
3953 | out_free_mem: | |
3954 | lpfc_free_nvmet_sgl_list(phba); | |
3955 | return rc; | |
3956 | } | |
3957 | ||
5e5b511d JS |
3958 | int |
3959 | lpfc_io_buf_flush(struct lpfc_hba *phba, struct list_head *cbuf) | |
3960 | { | |
3961 | LIST_HEAD(blist); | |
3962 | struct lpfc_sli4_hdw_queue *qp; | |
c490850a JS |
3963 | struct lpfc_io_buf *lpfc_cmd; |
3964 | struct lpfc_io_buf *iobufp, *prev_iobufp; | |
5e5b511d JS |
3965 | int idx, cnt, xri, inserted; |
3966 | ||
3967 | cnt = 0; | |
3968 | for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { | |
3969 | qp = &phba->sli4_hba.hdwq[idx]; | |
3970 | spin_lock_irq(&qp->io_buf_list_get_lock); | |
3971 | spin_lock(&qp->io_buf_list_put_lock); | |
3972 | ||
3973 | /* Take everything off the get and put lists */ | |
3974 | list_splice_init(&qp->lpfc_io_buf_list_get, &blist); | |
3975 | list_splice(&qp->lpfc_io_buf_list_put, &blist); | |
3976 | INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get); | |
3977 | INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put); | |
3978 | cnt += qp->get_io_bufs + qp->put_io_bufs; | |
3979 | qp->get_io_bufs = 0; | |
3980 | qp->put_io_bufs = 0; | |
3981 | qp->total_io_bufs = 0; | |
3982 | spin_unlock(&qp->io_buf_list_put_lock); | |
3983 | spin_unlock_irq(&qp->io_buf_list_get_lock); | |
3984 | } | |
3985 | ||
3986 | /* | |
3987 | * Take IO buffers off blist and put on cbuf sorted by XRI. | |
3988 | * This is because POST_SGL takes a sequential range of XRIs | |
3989 | * to post to the firmware. | |
3990 | */ | |
3991 | for (idx = 0; idx < cnt; idx++) { | |
c490850a | 3992 | list_remove_head(&blist, lpfc_cmd, struct lpfc_io_buf, list); |
5e5b511d JS |
3993 | if (!lpfc_cmd) |
3994 | return cnt; | |
3995 | if (idx == 0) { | |
3996 | list_add_tail(&lpfc_cmd->list, cbuf); | |
3997 | continue; | |
3998 | } | |
3999 | xri = lpfc_cmd->cur_iocbq.sli4_xritag; | |
4000 | inserted = 0; | |
4001 | prev_iobufp = NULL; | |
4002 | list_for_each_entry(iobufp, cbuf, list) { | |
4003 | if (xri < iobufp->cur_iocbq.sli4_xritag) { | |
4004 | if (prev_iobufp) | |
4005 | list_add(&lpfc_cmd->list, | |
4006 | &prev_iobufp->list); | |
4007 | else | |
4008 | list_add(&lpfc_cmd->list, cbuf); | |
4009 | inserted = 1; | |
4010 | break; | |
4011 | } | |
4012 | prev_iobufp = iobufp; | |
4013 | } | |
4014 | if (!inserted) | |
4015 | list_add_tail(&lpfc_cmd->list, cbuf); | |
4016 | } | |
4017 | return cnt; | |
4018 | } | |
4019 | ||
4020 | int | |
4021 | lpfc_io_buf_replenish(struct lpfc_hba *phba, struct list_head *cbuf) | |
4022 | { | |
4023 | struct lpfc_sli4_hdw_queue *qp; | |
c490850a | 4024 | struct lpfc_io_buf *lpfc_cmd; |
5e5b511d JS |
4025 | int idx, cnt; |
4026 | ||
4027 | qp = phba->sli4_hba.hdwq; | |
4028 | cnt = 0; | |
4029 | while (!list_empty(cbuf)) { | |
4030 | for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { | |
4031 | list_remove_head(cbuf, lpfc_cmd, | |
c490850a | 4032 | struct lpfc_io_buf, list); |
5e5b511d JS |
4033 | if (!lpfc_cmd) |
4034 | return cnt; | |
4035 | cnt++; | |
4036 | qp = &phba->sli4_hba.hdwq[idx]; | |
1fbf9742 JS |
4037 | lpfc_cmd->hdwq_no = idx; |
4038 | lpfc_cmd->hdwq = qp; | |
5e5b511d JS |
4039 | lpfc_cmd->cur_iocbq.wqe_cmpl = NULL; |
4040 | lpfc_cmd->cur_iocbq.iocb_cmpl = NULL; | |
4041 | spin_lock(&qp->io_buf_list_put_lock); | |
4042 | list_add_tail(&lpfc_cmd->list, | |
4043 | &qp->lpfc_io_buf_list_put); | |
4044 | qp->put_io_bufs++; | |
4045 | qp->total_io_bufs++; | |
4046 | spin_unlock(&qp->io_buf_list_put_lock); | |
4047 | } | |
4048 | } | |
4049 | return cnt; | |
4050 | } | |
4051 | ||
895427bd | 4052 | /** |
5e5b511d | 4053 | * lpfc_sli4_io_sgl_update - update xri-sgl sizing and mapping |
895427bd JS |
4054 | * @phba: pointer to lpfc hba data structure. |
4055 | * | |
4056 | * This routine first calculates the sizes of the current els and allocated | |
4057 | * scsi sgl lists, and then goes through all sgls to updates the physical | |
4058 | * XRIs assigned due to port function reset. During port initialization, the | |
4059 | * current els and allocated scsi sgl lists are 0s. | |
4060 | * | |
4061 | * Return codes | |
4062 | * 0 - successful (for now, it always returns 0) | |
4063 | **/ | |
4064 | int | |
5e5b511d | 4065 | lpfc_sli4_io_sgl_update(struct lpfc_hba *phba) |
895427bd | 4066 | { |
c490850a | 4067 | struct lpfc_io_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL; |
0794d601 | 4068 | uint16_t i, lxri, els_xri_cnt; |
5e5b511d JS |
4069 | uint16_t io_xri_cnt, io_xri_max; |
4070 | LIST_HEAD(io_sgl_list); | |
0794d601 | 4071 | int rc, cnt; |
8a9d2e80 | 4072 | |
895427bd | 4073 | /* |
0794d601 | 4074 | * update on pci function's allocated nvme xri-sgl list |
895427bd | 4075 | */ |
8a9d2e80 | 4076 | |
0794d601 JS |
4077 | /* maximum number of xris available for nvme buffers */ |
4078 | els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); | |
5e5b511d JS |
4079 | io_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt; |
4080 | phba->sli4_hba.io_xri_max = io_xri_max; | |
895427bd | 4081 | |
e8c0a779 | 4082 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, |
0794d601 JS |
4083 | "6074 Current allocated XRI sgl count:%d, " |
4084 | "maximum XRI count:%d\n", | |
5e5b511d JS |
4085 | phba->sli4_hba.io_xri_cnt, |
4086 | phba->sli4_hba.io_xri_max); | |
8a9d2e80 | 4087 | |
5e5b511d | 4088 | cnt = lpfc_io_buf_flush(phba, &io_sgl_list); |
8a9d2e80 | 4089 | |
5e5b511d | 4090 | if (phba->sli4_hba.io_xri_cnt > phba->sli4_hba.io_xri_max) { |
0794d601 | 4091 | /* max nvme xri shrunk below the allocated nvme buffers */ |
5e5b511d JS |
4092 | io_xri_cnt = phba->sli4_hba.io_xri_cnt - |
4093 | phba->sli4_hba.io_xri_max; | |
0794d601 | 4094 | /* release the extra allocated nvme buffers */ |
5e5b511d JS |
4095 | for (i = 0; i < io_xri_cnt; i++) { |
4096 | list_remove_head(&io_sgl_list, lpfc_ncmd, | |
c490850a | 4097 | struct lpfc_io_buf, list); |
0794d601 | 4098 | if (lpfc_ncmd) { |
771db5c0 | 4099 | dma_pool_free(phba->lpfc_sg_dma_buf_pool, |
0794d601 JS |
4100 | lpfc_ncmd->data, |
4101 | lpfc_ncmd->dma_handle); | |
4102 | kfree(lpfc_ncmd); | |
a2fc4aef | 4103 | } |
8a9d2e80 | 4104 | } |
5e5b511d | 4105 | phba->sli4_hba.io_xri_cnt -= io_xri_cnt; |
8a9d2e80 JS |
4106 | } |
4107 | ||
0794d601 JS |
4108 | /* update xris associated to remaining allocated nvme buffers */ |
4109 | lpfc_ncmd = NULL; | |
4110 | lpfc_ncmd_next = NULL; | |
5e5b511d | 4111 | phba->sli4_hba.io_xri_cnt = cnt; |
0794d601 | 4112 | list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, |
5e5b511d | 4113 | &io_sgl_list, list) { |
8a9d2e80 JS |
4114 | lxri = lpfc_sli4_next_xritag(phba); |
4115 | if (lxri == NO_XRI) { | |
372c187b DK |
4116 | lpfc_printf_log(phba, KERN_ERR, |
4117 | LOG_TRACE_EVENT, | |
0794d601 JS |
4118 | "6075 Failed to allocate xri for " |
4119 | "nvme buffer\n"); | |
8a9d2e80 JS |
4120 | rc = -ENOMEM; |
4121 | goto out_free_mem; | |
4122 | } | |
0794d601 JS |
4123 | lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri; |
4124 | lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri]; | |
8a9d2e80 | 4125 | } |
5e5b511d | 4126 | cnt = lpfc_io_buf_replenish(phba, &io_sgl_list); |
dea3101e | 4127 | return 0; |
8a9d2e80 JS |
4128 | |
4129 | out_free_mem: | |
5e5b511d | 4130 | lpfc_io_free(phba); |
8a9d2e80 | 4131 | return rc; |
dea3101e | 4132 | } |
4133 | ||
0794d601 | 4134 | /** |
5e5b511d | 4135 | * lpfc_new_io_buf - IO buffer allocator for HBA with SLI4 IF spec |
fe614acd LJ |
4136 | * @phba: Pointer to lpfc hba data structure. |
4137 | * @num_to_alloc: The requested number of buffers to allocate. | |
0794d601 JS |
4138 | * |
4139 | * This routine allocates nvme buffers for device with SLI-4 interface spec, | |
4140 | * the nvme buffer contains all the necessary information needed to initiate | |
4141 | * an I/O. After allocating up to @num_to_allocate IO buffers and put | |
4142 | * them on a list, it post them to the port by using SGL block post. | |
4143 | * | |
4144 | * Return codes: | |
5e5b511d | 4145 | * int - number of IO buffers that were allocated and posted. |
0794d601 JS |
4146 | * 0 = failure, less than num_to_alloc is a partial failure. |
4147 | **/ | |
4148 | int | |
5e5b511d | 4149 | lpfc_new_io_buf(struct lpfc_hba *phba, int num_to_alloc) |
0794d601 | 4150 | { |
c490850a | 4151 | struct lpfc_io_buf *lpfc_ncmd; |
0794d601 JS |
4152 | struct lpfc_iocbq *pwqeq; |
4153 | uint16_t iotag, lxri = 0; | |
4154 | int bcnt, num_posted; | |
4155 | LIST_HEAD(prep_nblist); | |
4156 | LIST_HEAD(post_nblist); | |
4157 | LIST_HEAD(nvme_nblist); | |
4158 | ||
5e5b511d | 4159 | phba->sli4_hba.io_xri_cnt = 0; |
0794d601 | 4160 | for (bcnt = 0; bcnt < num_to_alloc; bcnt++) { |
7f9989ba | 4161 | lpfc_ncmd = kzalloc(sizeof(*lpfc_ncmd), GFP_KERNEL); |
0794d601 JS |
4162 | if (!lpfc_ncmd) |
4163 | break; | |
4164 | /* | |
4165 | * Get memory from the pci pool to map the virt space to | |
4166 | * pci bus space for an I/O. The DMA buffer includes the | |
4167 | * number of SGE's necessary to support the sg_tablesize. | |
4168 | */ | |
a5c990ee TM |
4169 | lpfc_ncmd->data = dma_pool_zalloc(phba->lpfc_sg_dma_buf_pool, |
4170 | GFP_KERNEL, | |
4171 | &lpfc_ncmd->dma_handle); | |
0794d601 JS |
4172 | if (!lpfc_ncmd->data) { |
4173 | kfree(lpfc_ncmd); | |
4174 | break; | |
4175 | } | |
0794d601 | 4176 | |
d79c9e9d JS |
4177 | if (phba->cfg_xpsgl && !phba->nvmet_support) { |
4178 | INIT_LIST_HEAD(&lpfc_ncmd->dma_sgl_xtra_list); | |
4179 | } else { | |
4180 | /* | |
4181 | * 4K Page alignment is CRITICAL to BlockGuard, double | |
4182 | * check to be sure. | |
4183 | */ | |
4184 | if ((phba->sli3_options & LPFC_SLI3_BG_ENABLED) && | |
4185 | (((unsigned long)(lpfc_ncmd->data) & | |
4186 | (unsigned long)(SLI4_PAGE_SIZE - 1)) != 0)) { | |
372c187b DK |
4187 | lpfc_printf_log(phba, KERN_ERR, |
4188 | LOG_TRACE_EVENT, | |
d79c9e9d JS |
4189 | "3369 Memory alignment err: " |
4190 | "addr=%lx\n", | |
4191 | (unsigned long)lpfc_ncmd->data); | |
4192 | dma_pool_free(phba->lpfc_sg_dma_buf_pool, | |
4193 | lpfc_ncmd->data, | |
4194 | lpfc_ncmd->dma_handle); | |
4195 | kfree(lpfc_ncmd); | |
4196 | break; | |
4197 | } | |
0794d601 JS |
4198 | } |
4199 | ||
d79c9e9d JS |
4200 | INIT_LIST_HEAD(&lpfc_ncmd->dma_cmd_rsp_list); |
4201 | ||
0794d601 JS |
4202 | lxri = lpfc_sli4_next_xritag(phba); |
4203 | if (lxri == NO_XRI) { | |
4204 | dma_pool_free(phba->lpfc_sg_dma_buf_pool, | |
4205 | lpfc_ncmd->data, lpfc_ncmd->dma_handle); | |
4206 | kfree(lpfc_ncmd); | |
4207 | break; | |
4208 | } | |
4209 | pwqeq = &lpfc_ncmd->cur_iocbq; | |
4210 | ||
4211 | /* Allocate iotag for lpfc_ncmd->cur_iocbq. */ | |
4212 | iotag = lpfc_sli_next_iotag(phba, pwqeq); | |
4213 | if (iotag == 0) { | |
4214 | dma_pool_free(phba->lpfc_sg_dma_buf_pool, | |
4215 | lpfc_ncmd->data, lpfc_ncmd->dma_handle); | |
4216 | kfree(lpfc_ncmd); | |
372c187b | 4217 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
0794d601 JS |
4218 | "6121 Failed to allocate IOTAG for" |
4219 | " XRI:0x%x\n", lxri); | |
4220 | lpfc_sli4_free_xri(phba, lxri); | |
4221 | break; | |
4222 | } | |
4223 | pwqeq->sli4_lxritag = lxri; | |
4224 | pwqeq->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; | |
4225 | pwqeq->context1 = lpfc_ncmd; | |
4226 | ||
4227 | /* Initialize local short-hand pointers. */ | |
4228 | lpfc_ncmd->dma_sgl = lpfc_ncmd->data; | |
4229 | lpfc_ncmd->dma_phys_sgl = lpfc_ncmd->dma_handle; | |
4230 | lpfc_ncmd->cur_iocbq.context1 = lpfc_ncmd; | |
c2017260 | 4231 | spin_lock_init(&lpfc_ncmd->buf_lock); |
0794d601 JS |
4232 | |
4233 | /* add the nvme buffer to a post list */ | |
4234 | list_add_tail(&lpfc_ncmd->list, &post_nblist); | |
5e5b511d | 4235 | phba->sli4_hba.io_xri_cnt++; |
0794d601 JS |
4236 | } |
4237 | lpfc_printf_log(phba, KERN_INFO, LOG_NVME, | |
4238 | "6114 Allocate %d out of %d requested new NVME " | |
4239 | "buffers\n", bcnt, num_to_alloc); | |
4240 | ||
4241 | /* post the list of nvme buffer sgls to port if available */ | |
4242 | if (!list_empty(&post_nblist)) | |
5e5b511d | 4243 | num_posted = lpfc_sli4_post_io_sgl_list( |
0794d601 JS |
4244 | phba, &post_nblist, bcnt); |
4245 | else | |
4246 | num_posted = 0; | |
4247 | ||
4248 | return num_posted; | |
4249 | } | |
4250 | ||
96418b5e JS |
4251 | static uint64_t |
4252 | lpfc_get_wwpn(struct lpfc_hba *phba) | |
4253 | { | |
4254 | uint64_t wwn; | |
4255 | int rc; | |
4256 | LPFC_MBOXQ_t *mboxq; | |
4257 | MAILBOX_t *mb; | |
4258 | ||
96418b5e JS |
4259 | mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, |
4260 | GFP_KERNEL); | |
4261 | if (!mboxq) | |
4262 | return (uint64_t)-1; | |
4263 | ||
4264 | /* First get WWN of HBA instance */ | |
4265 | lpfc_read_nv(phba, mboxq); | |
4266 | rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
4267 | if (rc != MBX_SUCCESS) { | |
372c187b | 4268 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
96418b5e JS |
4269 | "6019 Mailbox failed , mbxCmd x%x " |
4270 | "READ_NV, mbxStatus x%x\n", | |
4271 | bf_get(lpfc_mqe_command, &mboxq->u.mqe), | |
4272 | bf_get(lpfc_mqe_status, &mboxq->u.mqe)); | |
4273 | mempool_free(mboxq, phba->mbox_mem_pool); | |
4274 | return (uint64_t) -1; | |
4275 | } | |
4276 | mb = &mboxq->u.mb; | |
4277 | memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t)); | |
4278 | /* wwn is WWPN of HBA instance */ | |
4279 | mempool_free(mboxq, phba->mbox_mem_pool); | |
4280 | if (phba->sli_rev == LPFC_SLI_REV4) | |
4281 | return be64_to_cpu(wwn); | |
4282 | else | |
286871a6 | 4283 | return rol64(wwn, 32); |
96418b5e JS |
4284 | } |
4285 | ||
e59058c4 | 4286 | /** |
3621a710 | 4287 | * lpfc_create_port - Create an FC port |
e59058c4 JS |
4288 | * @phba: pointer to lpfc hba data structure. |
4289 | * @instance: a unique integer ID to this FC port. | |
4290 | * @dev: pointer to the device data structure. | |
4291 | * | |
4292 | * This routine creates a FC port for the upper layer protocol. The FC port | |
4293 | * can be created on top of either a physical port or a virtual port provided | |
4294 | * by the HBA. This routine also allocates a SCSI host data structure (shost) | |
4295 | * and associates the FC port created before adding the shost into the SCSI | |
4296 | * layer. | |
4297 | * | |
4298 | * Return codes | |
4299 | * @vport - pointer to the virtual N_Port data structure. | |
4300 | * NULL - port create failed. | |
4301 | **/ | |
2e0fef85 | 4302 | struct lpfc_vport * |
3de2a653 | 4303 | lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev) |
47a8617c | 4304 | { |
2e0fef85 | 4305 | struct lpfc_vport *vport; |
895427bd | 4306 | struct Scsi_Host *shost = NULL; |
c90b4480 | 4307 | struct scsi_host_template *template; |
2e0fef85 | 4308 | int error = 0; |
96418b5e JS |
4309 | int i; |
4310 | uint64_t wwn; | |
4311 | bool use_no_reset_hba = false; | |
56bc8028 | 4312 | int rc; |
96418b5e | 4313 | |
56bc8028 JS |
4314 | if (lpfc_no_hba_reset_cnt) { |
4315 | if (phba->sli_rev < LPFC_SLI_REV4 && | |
4316 | dev == &phba->pcidev->dev) { | |
4317 | /* Reset the port first */ | |
4318 | lpfc_sli_brdrestart(phba); | |
4319 | rc = lpfc_sli_chipset_init(phba); | |
4320 | if (rc) | |
4321 | return NULL; | |
4322 | } | |
4323 | wwn = lpfc_get_wwpn(phba); | |
4324 | } | |
96418b5e JS |
4325 | |
4326 | for (i = 0; i < lpfc_no_hba_reset_cnt; i++) { | |
4327 | if (wwn == lpfc_no_hba_reset[i]) { | |
372c187b DK |
4328 | lpfc_printf_log(phba, KERN_ERR, |
4329 | LOG_TRACE_EVENT, | |
96418b5e JS |
4330 | "6020 Setting use_no_reset port=%llx\n", |
4331 | wwn); | |
4332 | use_no_reset_hba = true; | |
4333 | break; | |
4334 | } | |
4335 | } | |
47a8617c | 4336 | |
c90b4480 JS |
4337 | /* Seed template for SCSI host registration */ |
4338 | if (dev == &phba->pcidev->dev) { | |
4339 | template = &phba->port_template; | |
4340 | ||
4341 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) { | |
4342 | /* Seed physical port template */ | |
4343 | memcpy(template, &lpfc_template, sizeof(*template)); | |
4344 | ||
7c30bb62 | 4345 | if (use_no_reset_hba) |
c90b4480 | 4346 | /* template is for a no reset SCSI Host */ |
c90b4480 | 4347 | template->eh_host_reset_handler = NULL; |
c90b4480 JS |
4348 | |
4349 | /* Template for all vports this physical port creates */ | |
4350 | memcpy(&phba->vport_template, &lpfc_template, | |
4351 | sizeof(*template)); | |
c90b4480 JS |
4352 | phba->vport_template.shost_attrs = lpfc_vport_attrs; |
4353 | phba->vport_template.eh_bus_reset_handler = NULL; | |
4354 | phba->vport_template.eh_host_reset_handler = NULL; | |
4355 | phba->vport_template.vendor_id = 0; | |
4356 | ||
4357 | /* Initialize the host templates with updated value */ | |
4358 | if (phba->sli_rev == LPFC_SLI_REV4) { | |
4359 | template->sg_tablesize = phba->cfg_scsi_seg_cnt; | |
4360 | phba->vport_template.sg_tablesize = | |
4361 | phba->cfg_scsi_seg_cnt; | |
4362 | } else { | |
4363 | template->sg_tablesize = phba->cfg_sg_seg_cnt; | |
4364 | phba->vport_template.sg_tablesize = | |
4365 | phba->cfg_sg_seg_cnt; | |
4366 | } | |
4367 | ||
895427bd | 4368 | } else { |
c90b4480 JS |
4369 | /* NVMET is for physical port only */ |
4370 | memcpy(template, &lpfc_template_nvme, | |
4371 | sizeof(*template)); | |
895427bd | 4372 | } |
c90b4480 JS |
4373 | } else { |
4374 | template = &phba->vport_template; | |
ea4142f6 | 4375 | } |
c90b4480 JS |
4376 | |
4377 | shost = scsi_host_alloc(template, sizeof(struct lpfc_vport)); | |
2e0fef85 JS |
4378 | if (!shost) |
4379 | goto out; | |
47a8617c | 4380 | |
2e0fef85 JS |
4381 | vport = (struct lpfc_vport *) shost->hostdata; |
4382 | vport->phba = phba; | |
2e0fef85 | 4383 | vport->load_flag |= FC_LOADING; |
92d7f7b0 | 4384 | vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI; |
7f5f3d0d | 4385 | vport->fc_rscn_flush = 0; |
3de2a653 | 4386 | lpfc_get_vport_cfgparam(vport); |
895427bd | 4387 | |
f6e84790 JS |
4388 | /* Adjust value in vport */ |
4389 | vport->cfg_enable_fc4_type = phba->cfg_enable_fc4_type; | |
4390 | ||
2e0fef85 JS |
4391 | shost->unique_id = instance; |
4392 | shost->max_id = LPFC_MAX_TARGET; | |
3de2a653 | 4393 | shost->max_lun = vport->cfg_max_luns; |
2e0fef85 JS |
4394 | shost->this_id = -1; |
4395 | shost->max_cmd_len = 16; | |
6a828b0f | 4396 | |
da0436e9 | 4397 | if (phba->sli_rev == LPFC_SLI_REV4) { |
77ffd346 JS |
4398 | if (!phba->cfg_fcp_mq_threshold || |
4399 | phba->cfg_fcp_mq_threshold > phba->cfg_hdw_queue) | |
4400 | phba->cfg_fcp_mq_threshold = phba->cfg_hdw_queue; | |
4401 | ||
4402 | shost->nr_hw_queues = min_t(int, 2 * num_possible_nodes(), | |
4403 | phba->cfg_fcp_mq_threshold); | |
6a828b0f | 4404 | |
28baac74 | 4405 | shost->dma_boundary = |
cb5172ea | 4406 | phba->sli4_hba.pc_sli4_params.sge_supp_len-1; |
d79c9e9d JS |
4407 | |
4408 | if (phba->cfg_xpsgl && !phba->nvmet_support) | |
4409 | shost->sg_tablesize = LPFC_MAX_SG_TABLESIZE; | |
4410 | else | |
4411 | shost->sg_tablesize = phba->cfg_scsi_seg_cnt; | |
ace44e48 JS |
4412 | } else |
4413 | /* SLI-3 has a limited number of hardware queues (3), | |
4414 | * thus there is only one for FCP processing. | |
4415 | */ | |
4416 | shost->nr_hw_queues = 1; | |
81301a9b | 4417 | |
47a8617c | 4418 | /* |
2e0fef85 JS |
4419 | * Set initial can_queue value since 0 is no longer supported and |
4420 | * scsi_add_host will fail. This will be adjusted later based on the | |
4421 | * max xri value determined in hba setup. | |
47a8617c | 4422 | */ |
2e0fef85 | 4423 | shost->can_queue = phba->cfg_hba_queue_depth - 10; |
3de2a653 | 4424 | if (dev != &phba->pcidev->dev) { |
92d7f7b0 JS |
4425 | shost->transportt = lpfc_vport_transport_template; |
4426 | vport->port_type = LPFC_NPIV_PORT; | |
4427 | } else { | |
4428 | shost->transportt = lpfc_transport_template; | |
4429 | vport->port_type = LPFC_PHYSICAL_PORT; | |
4430 | } | |
47a8617c | 4431 | |
c90b4480 JS |
4432 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, |
4433 | "9081 CreatePort TMPLATE type %x TBLsize %d " | |
4434 | "SEGcnt %d/%d\n", | |
4435 | vport->port_type, shost->sg_tablesize, | |
4436 | phba->cfg_scsi_seg_cnt, phba->cfg_sg_seg_cnt); | |
4437 | ||
2e0fef85 JS |
4438 | /* Initialize all internally managed lists. */ |
4439 | INIT_LIST_HEAD(&vport->fc_nodes); | |
da0436e9 | 4440 | INIT_LIST_HEAD(&vport->rcv_buffer_list); |
2e0fef85 | 4441 | spin_lock_init(&vport->work_port_lock); |
47a8617c | 4442 | |
f22eb4d3 | 4443 | timer_setup(&vport->fc_disctmo, lpfc_disc_timeout, 0); |
47a8617c | 4444 | |
f22eb4d3 | 4445 | timer_setup(&vport->els_tmofunc, lpfc_els_timeout, 0); |
92494144 | 4446 | |
f22eb4d3 | 4447 | timer_setup(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo, 0); |
92494144 | 4448 | |
aa6ff309 JS |
4449 | if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) |
4450 | lpfc_setup_bg(phba, shost); | |
4451 | ||
d139b9bd | 4452 | error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev); |
2e0fef85 JS |
4453 | if (error) |
4454 | goto out_put_shost; | |
47a8617c | 4455 | |
523128e5 | 4456 | spin_lock_irq(&phba->port_list_lock); |
2e0fef85 | 4457 | list_add_tail(&vport->listentry, &phba->port_list); |
523128e5 | 4458 | spin_unlock_irq(&phba->port_list_lock); |
2e0fef85 | 4459 | return vport; |
47a8617c | 4460 | |
2e0fef85 JS |
4461 | out_put_shost: |
4462 | scsi_host_put(shost); | |
4463 | out: | |
4464 | return NULL; | |
47a8617c JS |
4465 | } |
4466 | ||
e59058c4 | 4467 | /** |
3621a710 | 4468 | * destroy_port - destroy an FC port |
e59058c4 JS |
4469 | * @vport: pointer to an lpfc virtual N_Port data structure. |
4470 | * | |
4471 | * This routine destroys a FC port from the upper layer protocol. All the | |
4472 | * resources associated with the port are released. | |
4473 | **/ | |
2e0fef85 JS |
4474 | void |
4475 | destroy_port(struct lpfc_vport *vport) | |
47a8617c | 4476 | { |
92d7f7b0 JS |
4477 | struct Scsi_Host *shost = lpfc_shost_from_vport(vport); |
4478 | struct lpfc_hba *phba = vport->phba; | |
47a8617c | 4479 | |
858c9f6c | 4480 | lpfc_debugfs_terminate(vport); |
92d7f7b0 JS |
4481 | fc_remove_host(shost); |
4482 | scsi_remove_host(shost); | |
47a8617c | 4483 | |
523128e5 | 4484 | spin_lock_irq(&phba->port_list_lock); |
92d7f7b0 | 4485 | list_del_init(&vport->listentry); |
523128e5 | 4486 | spin_unlock_irq(&phba->port_list_lock); |
47a8617c | 4487 | |
92d7f7b0 | 4488 | lpfc_cleanup(vport); |
47a8617c | 4489 | return; |
47a8617c JS |
4490 | } |
4491 | ||
e59058c4 | 4492 | /** |
3621a710 | 4493 | * lpfc_get_instance - Get a unique integer ID |
e59058c4 JS |
4494 | * |
4495 | * This routine allocates a unique integer ID from lpfc_hba_index pool. It | |
4496 | * uses the kernel idr facility to perform the task. | |
4497 | * | |
4498 | * Return codes: | |
4499 | * instance - a unique integer ID allocated as the new instance. | |
4500 | * -1 - lpfc get instance failed. | |
4501 | **/ | |
92d7f7b0 JS |
4502 | int |
4503 | lpfc_get_instance(void) | |
4504 | { | |
ab516036 TH |
4505 | int ret; |
4506 | ||
4507 | ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL); | |
4508 | return ret < 0 ? -1 : ret; | |
47a8617c JS |
4509 | } |
4510 | ||
e59058c4 | 4511 | /** |
3621a710 | 4512 | * lpfc_scan_finished - method for SCSI layer to detect whether scan is done |
e59058c4 JS |
4513 | * @shost: pointer to SCSI host data structure. |
4514 | * @time: elapsed time of the scan in jiffies. | |
4515 | * | |
4516 | * This routine is called by the SCSI layer with a SCSI host to determine | |
4517 | * whether the scan host is finished. | |
4518 | * | |
4519 | * Note: there is no scan_start function as adapter initialization will have | |
4520 | * asynchronously kicked off the link initialization. | |
4521 | * | |
4522 | * Return codes | |
4523 | * 0 - SCSI host scan is not over yet. | |
4524 | * 1 - SCSI host scan is over. | |
4525 | **/ | |
47a8617c JS |
4526 | int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time) |
4527 | { | |
2e0fef85 JS |
4528 | struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; |
4529 | struct lpfc_hba *phba = vport->phba; | |
858c9f6c | 4530 | int stat = 0; |
47a8617c | 4531 | |
858c9f6c JS |
4532 | spin_lock_irq(shost->host_lock); |
4533 | ||
51ef4c26 | 4534 | if (vport->load_flag & FC_UNLOADING) { |
858c9f6c JS |
4535 | stat = 1; |
4536 | goto finished; | |
4537 | } | |
256ec0d0 | 4538 | if (time >= msecs_to_jiffies(30 * 1000)) { |
2e0fef85 | 4539 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
e8b62011 JS |
4540 | "0461 Scanning longer than 30 " |
4541 | "seconds. Continuing initialization\n"); | |
858c9f6c | 4542 | stat = 1; |
47a8617c | 4543 | goto finished; |
2e0fef85 | 4544 | } |
256ec0d0 JS |
4545 | if (time >= msecs_to_jiffies(15 * 1000) && |
4546 | phba->link_state <= LPFC_LINK_DOWN) { | |
2e0fef85 | 4547 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
e8b62011 JS |
4548 | "0465 Link down longer than 15 " |
4549 | "seconds. Continuing initialization\n"); | |
858c9f6c | 4550 | stat = 1; |
47a8617c | 4551 | goto finished; |
2e0fef85 | 4552 | } |
47a8617c | 4553 | |
2e0fef85 | 4554 | if (vport->port_state != LPFC_VPORT_READY) |
858c9f6c | 4555 | goto finished; |
2e0fef85 | 4556 | if (vport->num_disc_nodes || vport->fc_prli_sent) |
858c9f6c | 4557 | goto finished; |
256ec0d0 | 4558 | if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000)) |
858c9f6c | 4559 | goto finished; |
2e0fef85 | 4560 | if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0) |
858c9f6c JS |
4561 | goto finished; |
4562 | ||
4563 | stat = 1; | |
47a8617c JS |
4564 | |
4565 | finished: | |
858c9f6c JS |
4566 | spin_unlock_irq(shost->host_lock); |
4567 | return stat; | |
92d7f7b0 | 4568 | } |
47a8617c | 4569 | |
3999df75 | 4570 | static void lpfc_host_supported_speeds_set(struct Scsi_Host *shost) |
cd71348a JS |
4571 | { |
4572 | struct lpfc_vport *vport = (struct lpfc_vport *)shost->hostdata; | |
4573 | struct lpfc_hba *phba = vport->phba; | |
4574 | ||
4575 | fc_host_supported_speeds(shost) = 0; | |
a1e4d3d8 DK |
4576 | /* |
4577 | * Avoid reporting supported link speed for FCoE as it can't be | |
4578 | * controlled via FCoE. | |
4579 | */ | |
4580 | if (phba->hba_flag & HBA_FCOE_MODE) | |
4581 | return; | |
4582 | ||
1dc5ec24 JS |
4583 | if (phba->lmt & LMT_128Gb) |
4584 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_128GBIT; | |
cd71348a JS |
4585 | if (phba->lmt & LMT_64Gb) |
4586 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_64GBIT; | |
4587 | if (phba->lmt & LMT_32Gb) | |
4588 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT; | |
4589 | if (phba->lmt & LMT_16Gb) | |
4590 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT; | |
4591 | if (phba->lmt & LMT_10Gb) | |
4592 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT; | |
4593 | if (phba->lmt & LMT_8Gb) | |
4594 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT; | |
4595 | if (phba->lmt & LMT_4Gb) | |
4596 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT; | |
4597 | if (phba->lmt & LMT_2Gb) | |
4598 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT; | |
4599 | if (phba->lmt & LMT_1Gb) | |
4600 | fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT; | |
4601 | } | |
4602 | ||
e59058c4 | 4603 | /** |
3621a710 | 4604 | * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port |
e59058c4 JS |
4605 | * @shost: pointer to SCSI host data structure. |
4606 | * | |
4607 | * This routine initializes a given SCSI host attributes on a FC port. The | |
4608 | * SCSI host can be either on top of a physical port or a virtual port. | |
4609 | **/ | |
92d7f7b0 JS |
4610 | void lpfc_host_attrib_init(struct Scsi_Host *shost) |
4611 | { | |
4612 | struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; | |
4613 | struct lpfc_hba *phba = vport->phba; | |
47a8617c | 4614 | /* |
2e0fef85 | 4615 | * Set fixed host attributes. Must done after lpfc_sli_hba_setup(). |
47a8617c JS |
4616 | */ |
4617 | ||
2e0fef85 JS |
4618 | fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn); |
4619 | fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn); | |
47a8617c JS |
4620 | fc_host_supported_classes(shost) = FC_COS_CLASS3; |
4621 | ||
4622 | memset(fc_host_supported_fc4s(shost), 0, | |
2e0fef85 | 4623 | sizeof(fc_host_supported_fc4s(shost))); |
47a8617c JS |
4624 | fc_host_supported_fc4s(shost)[2] = 1; |
4625 | fc_host_supported_fc4s(shost)[7] = 1; | |
4626 | ||
92d7f7b0 JS |
4627 | lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost), |
4628 | sizeof fc_host_symbolic_name(shost)); | |
47a8617c | 4629 | |
cd71348a | 4630 | lpfc_host_supported_speeds_set(shost); |
47a8617c JS |
4631 | |
4632 | fc_host_maxframe_size(shost) = | |
2e0fef85 JS |
4633 | (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) | |
4634 | (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb; | |
47a8617c | 4635 | |
0af5d708 MC |
4636 | fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo; |
4637 | ||
47a8617c JS |
4638 | /* This value is also unchanging */ |
4639 | memset(fc_host_active_fc4s(shost), 0, | |
2e0fef85 | 4640 | sizeof(fc_host_active_fc4s(shost))); |
47a8617c JS |
4641 | fc_host_active_fc4s(shost)[2] = 1; |
4642 | fc_host_active_fc4s(shost)[7] = 1; | |
4643 | ||
92d7f7b0 | 4644 | fc_host_max_npiv_vports(shost) = phba->max_vpi; |
47a8617c | 4645 | spin_lock_irq(shost->host_lock); |
51ef4c26 | 4646 | vport->load_flag &= ~FC_LOADING; |
47a8617c | 4647 | spin_unlock_irq(shost->host_lock); |
47a8617c | 4648 | } |
dea3101e | 4649 | |
e59058c4 | 4650 | /** |
da0436e9 | 4651 | * lpfc_stop_port_s3 - Stop SLI3 device port |
e59058c4 JS |
4652 | * @phba: pointer to lpfc hba data structure. |
4653 | * | |
da0436e9 JS |
4654 | * This routine is invoked to stop an SLI3 device port, it stops the device |
4655 | * from generating interrupts and stops the device driver's timers for the | |
4656 | * device. | |
e59058c4 | 4657 | **/ |
da0436e9 JS |
4658 | static void |
4659 | lpfc_stop_port_s3(struct lpfc_hba *phba) | |
db2378e0 | 4660 | { |
da0436e9 JS |
4661 | /* Clear all interrupt enable conditions */ |
4662 | writel(0, phba->HCregaddr); | |
4663 | readl(phba->HCregaddr); /* flush */ | |
4664 | /* Clear all pending interrupts */ | |
4665 | writel(0xffffffff, phba->HAregaddr); | |
4666 | readl(phba->HAregaddr); /* flush */ | |
db2378e0 | 4667 | |
da0436e9 JS |
4668 | /* Reset some HBA SLI setup states */ |
4669 | lpfc_stop_hba_timers(phba); | |
4670 | phba->pport->work_port_events = 0; | |
4671 | } | |
db2378e0 | 4672 | |
da0436e9 JS |
4673 | /** |
4674 | * lpfc_stop_port_s4 - Stop SLI4 device port | |
4675 | * @phba: pointer to lpfc hba data structure. | |
4676 | * | |
4677 | * This routine is invoked to stop an SLI4 device port, it stops the device | |
4678 | * from generating interrupts and stops the device driver's timers for the | |
4679 | * device. | |
4680 | **/ | |
4681 | static void | |
4682 | lpfc_stop_port_s4(struct lpfc_hba *phba) | |
4683 | { | |
4684 | /* Reset some HBA SLI4 setup states */ | |
4685 | lpfc_stop_hba_timers(phba); | |
cdb42bec JS |
4686 | if (phba->pport) |
4687 | phba->pport->work_port_events = 0; | |
da0436e9 | 4688 | phba->sli4_hba.intr_enable = 0; |
da0436e9 | 4689 | } |
9399627f | 4690 | |
da0436e9 JS |
4691 | /** |
4692 | * lpfc_stop_port - Wrapper function for stopping hba port | |
4693 | * @phba: Pointer to HBA context object. | |
4694 | * | |
4695 | * This routine wraps the actual SLI3 or SLI4 hba stop port routine from | |
4696 | * the API jump table function pointer from the lpfc_hba struct. | |
4697 | **/ | |
4698 | void | |
4699 | lpfc_stop_port(struct lpfc_hba *phba) | |
4700 | { | |
4701 | phba->lpfc_stop_port(phba); | |
f485c18d DK |
4702 | |
4703 | if (phba->wq) | |
4704 | flush_workqueue(phba->wq); | |
da0436e9 | 4705 | } |
db2378e0 | 4706 | |
ecfd03c6 JS |
4707 | /** |
4708 | * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer | |
4709 | * @phba: Pointer to hba for which this call is being executed. | |
4710 | * | |
4711 | * This routine starts the timer waiting for the FCF rediscovery to complete. | |
4712 | **/ | |
4713 | void | |
4714 | lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba) | |
4715 | { | |
4716 | unsigned long fcf_redisc_wait_tmo = | |
4717 | (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO)); | |
4718 | /* Start fcf rediscovery wait period timer */ | |
4719 | mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo); | |
4720 | spin_lock_irq(&phba->hbalock); | |
4721 | /* Allow action to new fcf asynchronous event */ | |
4722 | phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE); | |
4723 | /* Mark the FCF rediscovery pending state */ | |
4724 | phba->fcf.fcf_flag |= FCF_REDISC_PEND; | |
4725 | spin_unlock_irq(&phba->hbalock); | |
4726 | } | |
4727 | ||
4728 | /** | |
4729 | * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout | |
fe614acd | 4730 | * @t: Timer context used to obtain the pointer to lpfc hba data structure. |
ecfd03c6 JS |
4731 | * |
4732 | * This routine is invoked when waiting for FCF table rediscover has been | |
4733 | * timed out. If new FCF record(s) has (have) been discovered during the | |
4734 | * wait period, a new FCF event shall be added to the FCOE async event | |
4735 | * list, and then worker thread shall be waked up for processing from the | |
4736 | * worker thread context. | |
4737 | **/ | |
e399b228 | 4738 | static void |
f22eb4d3 | 4739 | lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list *t) |
ecfd03c6 | 4740 | { |
f22eb4d3 | 4741 | struct lpfc_hba *phba = from_timer(phba, t, fcf.redisc_wait); |
ecfd03c6 JS |
4742 | |
4743 | /* Don't send FCF rediscovery event if timer cancelled */ | |
4744 | spin_lock_irq(&phba->hbalock); | |
4745 | if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) { | |
4746 | spin_unlock_irq(&phba->hbalock); | |
4747 | return; | |
4748 | } | |
4749 | /* Clear FCF rediscovery timer pending flag */ | |
4750 | phba->fcf.fcf_flag &= ~FCF_REDISC_PEND; | |
4751 | /* FCF rediscovery event to worker thread */ | |
4752 | phba->fcf.fcf_flag |= FCF_REDISC_EVT; | |
4753 | spin_unlock_irq(&phba->hbalock); | |
0c9ab6f5 | 4754 | lpfc_printf_log(phba, KERN_INFO, LOG_FIP, |
a93ff37a | 4755 | "2776 FCF rediscover quiescent timer expired\n"); |
ecfd03c6 JS |
4756 | /* wake up worker thread */ |
4757 | lpfc_worker_wake_up(phba); | |
4758 | } | |
4759 | ||
e59058c4 | 4760 | /** |
da0436e9 | 4761 | * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code |
e59058c4 | 4762 | * @phba: pointer to lpfc hba data structure. |
da0436e9 | 4763 | * @acqe_link: pointer to the async link completion queue entry. |
e59058c4 | 4764 | * |
23288b78 | 4765 | * This routine is to parse the SLI4 link-attention link fault code. |
e59058c4 | 4766 | **/ |
23288b78 | 4767 | static void |
da0436e9 JS |
4768 | lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba, |
4769 | struct lpfc_acqe_link *acqe_link) | |
db2378e0 | 4770 | { |
da0436e9 JS |
4771 | switch (bf_get(lpfc_acqe_link_fault, acqe_link)) { |
4772 | case LPFC_ASYNC_LINK_FAULT_NONE: | |
4773 | case LPFC_ASYNC_LINK_FAULT_LOCAL: | |
4774 | case LPFC_ASYNC_LINK_FAULT_REMOTE: | |
23288b78 | 4775 | case LPFC_ASYNC_LINK_FAULT_LR_LRR: |
da0436e9 JS |
4776 | break; |
4777 | default: | |
372c187b | 4778 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
23288b78 | 4779 | "0398 Unknown link fault code: x%x\n", |
da0436e9 | 4780 | bf_get(lpfc_acqe_link_fault, acqe_link)); |
da0436e9 JS |
4781 | break; |
4782 | } | |
db2378e0 JS |
4783 | } |
4784 | ||
5b75da2f | 4785 | /** |
da0436e9 | 4786 | * lpfc_sli4_parse_latt_type - Parse sli4 link attention type |
5b75da2f | 4787 | * @phba: pointer to lpfc hba data structure. |
da0436e9 | 4788 | * @acqe_link: pointer to the async link completion queue entry. |
5b75da2f | 4789 | * |
da0436e9 JS |
4790 | * This routine is to parse the SLI4 link attention type and translate it |
4791 | * into the base driver's link attention type coding. | |
5b75da2f | 4792 | * |
da0436e9 JS |
4793 | * Return: Link attention type in terms of base driver's coding. |
4794 | **/ | |
4795 | static uint8_t | |
4796 | lpfc_sli4_parse_latt_type(struct lpfc_hba *phba, | |
4797 | struct lpfc_acqe_link *acqe_link) | |
5b75da2f | 4798 | { |
da0436e9 | 4799 | uint8_t att_type; |
5b75da2f | 4800 | |
da0436e9 JS |
4801 | switch (bf_get(lpfc_acqe_link_status, acqe_link)) { |
4802 | case LPFC_ASYNC_LINK_STATUS_DOWN: | |
4803 | case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN: | |
76a95d75 | 4804 | att_type = LPFC_ATT_LINK_DOWN; |
da0436e9 JS |
4805 | break; |
4806 | case LPFC_ASYNC_LINK_STATUS_UP: | |
4807 | /* Ignore physical link up events - wait for logical link up */ | |
76a95d75 | 4808 | att_type = LPFC_ATT_RESERVED; |
da0436e9 JS |
4809 | break; |
4810 | case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP: | |
76a95d75 | 4811 | att_type = LPFC_ATT_LINK_UP; |
da0436e9 JS |
4812 | break; |
4813 | default: | |
372c187b | 4814 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
da0436e9 JS |
4815 | "0399 Invalid link attention type: x%x\n", |
4816 | bf_get(lpfc_acqe_link_status, acqe_link)); | |
76a95d75 | 4817 | att_type = LPFC_ATT_RESERVED; |
da0436e9 | 4818 | break; |
5b75da2f | 4819 | } |
da0436e9 | 4820 | return att_type; |
5b75da2f JS |
4821 | } |
4822 | ||
8b68cd52 JS |
4823 | /** |
4824 | * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed | |
4825 | * @phba: pointer to lpfc hba data structure. | |
4826 | * | |
4827 | * This routine is to get an SLI3 FC port's link speed in Mbps. | |
4828 | * | |
4829 | * Return: link speed in terms of Mbps. | |
4830 | **/ | |
4831 | uint32_t | |
4832 | lpfc_sli_port_speed_get(struct lpfc_hba *phba) | |
4833 | { | |
4834 | uint32_t link_speed; | |
4835 | ||
4836 | if (!lpfc_is_link_up(phba)) | |
4837 | return 0; | |
4838 | ||
a085e87c JS |
4839 | if (phba->sli_rev <= LPFC_SLI_REV3) { |
4840 | switch (phba->fc_linkspeed) { | |
4841 | case LPFC_LINK_SPEED_1GHZ: | |
4842 | link_speed = 1000; | |
4843 | break; | |
4844 | case LPFC_LINK_SPEED_2GHZ: | |
4845 | link_speed = 2000; | |
4846 | break; | |
4847 | case LPFC_LINK_SPEED_4GHZ: | |
4848 | link_speed = 4000; | |
4849 | break; | |
4850 | case LPFC_LINK_SPEED_8GHZ: | |
4851 | link_speed = 8000; | |
4852 | break; | |
4853 | case LPFC_LINK_SPEED_10GHZ: | |
4854 | link_speed = 10000; | |
4855 | break; | |
4856 | case LPFC_LINK_SPEED_16GHZ: | |
4857 | link_speed = 16000; | |
4858 | break; | |
4859 | default: | |
4860 | link_speed = 0; | |
4861 | } | |
4862 | } else { | |
4863 | if (phba->sli4_hba.link_state.logical_speed) | |
4864 | link_speed = | |
4865 | phba->sli4_hba.link_state.logical_speed; | |
4866 | else | |
4867 | link_speed = phba->sli4_hba.link_state.speed; | |
8b68cd52 JS |
4868 | } |
4869 | return link_speed; | |
4870 | } | |
4871 | ||
4872 | /** | |
4873 | * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed | |
4874 | * @phba: pointer to lpfc hba data structure. | |
4875 | * @evt_code: asynchronous event code. | |
4876 | * @speed_code: asynchronous event link speed code. | |
4877 | * | |
4878 | * This routine is to parse the giving SLI4 async event link speed code into | |
4879 | * value of Mbps for the link speed. | |
4880 | * | |
4881 | * Return: link speed in terms of Mbps. | |
4882 | **/ | |
4883 | static uint32_t | |
4884 | lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code, | |
4885 | uint8_t speed_code) | |
4886 | { | |
4887 | uint32_t port_speed; | |
4888 | ||
4889 | switch (evt_code) { | |
4890 | case LPFC_TRAILER_CODE_LINK: | |
4891 | switch (speed_code) { | |
26d830ec | 4892 | case LPFC_ASYNC_LINK_SPEED_ZERO: |
8b68cd52 JS |
4893 | port_speed = 0; |
4894 | break; | |
26d830ec | 4895 | case LPFC_ASYNC_LINK_SPEED_10MBPS: |
8b68cd52 JS |
4896 | port_speed = 10; |
4897 | break; | |
26d830ec | 4898 | case LPFC_ASYNC_LINK_SPEED_100MBPS: |
8b68cd52 JS |
4899 | port_speed = 100; |
4900 | break; | |
26d830ec | 4901 | case LPFC_ASYNC_LINK_SPEED_1GBPS: |
8b68cd52 JS |
4902 | port_speed = 1000; |
4903 | break; | |
26d830ec | 4904 | case LPFC_ASYNC_LINK_SPEED_10GBPS: |
8b68cd52 JS |
4905 | port_speed = 10000; |
4906 | break; | |
26d830ec JS |
4907 | case LPFC_ASYNC_LINK_SPEED_20GBPS: |
4908 | port_speed = 20000; | |
4909 | break; | |
4910 | case LPFC_ASYNC_LINK_SPEED_25GBPS: | |
4911 | port_speed = 25000; | |
4912 | break; | |
4913 | case LPFC_ASYNC_LINK_SPEED_40GBPS: | |
4914 | port_speed = 40000; | |
4915 | break; | |
a1e4d3d8 DK |
4916 | case LPFC_ASYNC_LINK_SPEED_100GBPS: |
4917 | port_speed = 100000; | |
4918 | break; | |
8b68cd52 JS |
4919 | default: |
4920 | port_speed = 0; | |
4921 | } | |
4922 | break; | |
4923 | case LPFC_TRAILER_CODE_FC: | |
4924 | switch (speed_code) { | |
26d830ec | 4925 | case LPFC_FC_LA_SPEED_UNKNOWN: |
8b68cd52 JS |
4926 | port_speed = 0; |
4927 | break; | |
26d830ec | 4928 | case LPFC_FC_LA_SPEED_1G: |
8b68cd52 JS |
4929 | port_speed = 1000; |
4930 | break; | |
26d830ec | 4931 | case LPFC_FC_LA_SPEED_2G: |
8b68cd52 JS |
4932 | port_speed = 2000; |
4933 | break; | |
26d830ec | 4934 | case LPFC_FC_LA_SPEED_4G: |
8b68cd52 JS |
4935 | port_speed = 4000; |
4936 | break; | |
26d830ec | 4937 | case LPFC_FC_LA_SPEED_8G: |
8b68cd52 JS |
4938 | port_speed = 8000; |
4939 | break; | |
26d830ec | 4940 | case LPFC_FC_LA_SPEED_10G: |
8b68cd52 JS |
4941 | port_speed = 10000; |
4942 | break; | |
26d830ec | 4943 | case LPFC_FC_LA_SPEED_16G: |
8b68cd52 JS |
4944 | port_speed = 16000; |
4945 | break; | |
d38dd52c JS |
4946 | case LPFC_FC_LA_SPEED_32G: |
4947 | port_speed = 32000; | |
4948 | break; | |
fbd8a6ba JS |
4949 | case LPFC_FC_LA_SPEED_64G: |
4950 | port_speed = 64000; | |
4951 | break; | |
1dc5ec24 JS |
4952 | case LPFC_FC_LA_SPEED_128G: |
4953 | port_speed = 128000; | |
4954 | break; | |
8b68cd52 JS |
4955 | default: |
4956 | port_speed = 0; | |
4957 | } | |
4958 | break; | |
4959 | default: | |
4960 | port_speed = 0; | |
4961 | } | |
4962 | return port_speed; | |
4963 | } | |
4964 | ||
da0436e9 | 4965 | /** |
70f3c073 | 4966 | * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event |
da0436e9 JS |
4967 | * @phba: pointer to lpfc hba data structure. |
4968 | * @acqe_link: pointer to the async link completion queue entry. | |
4969 | * | |
70f3c073 | 4970 | * This routine is to handle the SLI4 asynchronous FCoE link event. |
da0436e9 JS |
4971 | **/ |
4972 | static void | |
4973 | lpfc_sli4_async_link_evt(struct lpfc_hba *phba, | |
4974 | struct lpfc_acqe_link *acqe_link) | |
4975 | { | |
4976 | struct lpfc_dmabuf *mp; | |
4977 | LPFC_MBOXQ_t *pmb; | |
4978 | MAILBOX_t *mb; | |
76a95d75 | 4979 | struct lpfc_mbx_read_top *la; |
da0436e9 | 4980 | uint8_t att_type; |
76a95d75 | 4981 | int rc; |
da0436e9 JS |
4982 | |
4983 | att_type = lpfc_sli4_parse_latt_type(phba, acqe_link); | |
76a95d75 | 4984 | if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP) |
da0436e9 | 4985 | return; |
32b9793f | 4986 | phba->fcoe_eventtag = acqe_link->event_tag; |
da0436e9 JS |
4987 | pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); |
4988 | if (!pmb) { | |
372c187b | 4989 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
da0436e9 JS |
4990 | "0395 The mboxq allocation failed\n"); |
4991 | return; | |
4992 | } | |
4993 | mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); | |
4994 | if (!mp) { | |
372c187b | 4995 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
da0436e9 JS |
4996 | "0396 The lpfc_dmabuf allocation failed\n"); |
4997 | goto out_free_pmb; | |
4998 | } | |
4999 | mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys); | |
5000 | if (!mp->virt) { | |
372c187b | 5001 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
da0436e9 JS |
5002 | "0397 The mbuf allocation failed\n"); |
5003 | goto out_free_dmabuf; | |
5004 | } | |
5005 | ||
5006 | /* Cleanup any outstanding ELS commands */ | |
5007 | lpfc_els_flush_all_cmd(phba); | |
5008 | ||
5009 | /* Block ELS IOCBs until we have done process link event */ | |
895427bd | 5010 | phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT; |
da0436e9 JS |
5011 | |
5012 | /* Update link event statistics */ | |
5013 | phba->sli.slistat.link_event++; | |
5014 | ||
76a95d75 JS |
5015 | /* Create lpfc_handle_latt mailbox command from link ACQE */ |
5016 | lpfc_read_topology(phba, pmb, mp); | |
5017 | pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; | |
da0436e9 JS |
5018 | pmb->vport = phba->pport; |
5019 | ||
da0436e9 JS |
5020 | /* Keep the link status for extra SLI4 state machine reference */ |
5021 | phba->sli4_hba.link_state.speed = | |
8b68cd52 JS |
5022 | lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK, |
5023 | bf_get(lpfc_acqe_link_speed, acqe_link)); | |
da0436e9 JS |
5024 | phba->sli4_hba.link_state.duplex = |
5025 | bf_get(lpfc_acqe_link_duplex, acqe_link); | |
5026 | phba->sli4_hba.link_state.status = | |
5027 | bf_get(lpfc_acqe_link_status, acqe_link); | |
70f3c073 JS |
5028 | phba->sli4_hba.link_state.type = |
5029 | bf_get(lpfc_acqe_link_type, acqe_link); | |
5030 | phba->sli4_hba.link_state.number = | |
5031 | bf_get(lpfc_acqe_link_number, acqe_link); | |
da0436e9 JS |
5032 | phba->sli4_hba.link_state.fault = |
5033 | bf_get(lpfc_acqe_link_fault, acqe_link); | |
65467b6b | 5034 | phba->sli4_hba.link_state.logical_speed = |
8b68cd52 JS |
5035 | bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10; |
5036 | ||
70f3c073 | 5037 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, |
c31098ce JS |
5038 | "2900 Async FC/FCoE Link event - Speed:%dGBit " |
5039 | "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d " | |
5040 | "Logical speed:%dMbps Fault:%d\n", | |
70f3c073 JS |
5041 | phba->sli4_hba.link_state.speed, |
5042 | phba->sli4_hba.link_state.topology, | |
5043 | phba->sli4_hba.link_state.status, | |
5044 | phba->sli4_hba.link_state.type, | |
5045 | phba->sli4_hba.link_state.number, | |
8b68cd52 | 5046 | phba->sli4_hba.link_state.logical_speed, |
70f3c073 | 5047 | phba->sli4_hba.link_state.fault); |
76a95d75 JS |
5048 | /* |
5049 | * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch | |
5050 | * topology info. Note: Optional for non FC-AL ports. | |
5051 | */ | |
5052 | if (!(phba->hba_flag & HBA_FCOE_MODE)) { | |
5053 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); | |
5054 | if (rc == MBX_NOT_FINISHED) | |
5055 | goto out_free_dmabuf; | |
5056 | return; | |
5057 | } | |
5058 | /* | |
5059 | * For FCoE Mode: fill in all the topology information we need and call | |
5060 | * the READ_TOPOLOGY completion routine to continue without actually | |
5061 | * sending the READ_TOPOLOGY mailbox command to the port. | |
5062 | */ | |
23288b78 | 5063 | /* Initialize completion status */ |
76a95d75 | 5064 | mb = &pmb->u.mb; |
23288b78 JS |
5065 | mb->mbxStatus = MBX_SUCCESS; |
5066 | ||
5067 | /* Parse port fault information field */ | |
5068 | lpfc_sli4_parse_latt_fault(phba, acqe_link); | |
76a95d75 JS |
5069 | |
5070 | /* Parse and translate link attention fields */ | |
5071 | la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop; | |
5072 | la->eventTag = acqe_link->event_tag; | |
5073 | bf_set(lpfc_mbx_read_top_att_type, la, att_type); | |
5074 | bf_set(lpfc_mbx_read_top_link_spd, la, | |
a085e87c | 5075 | (bf_get(lpfc_acqe_link_speed, acqe_link))); |
76a95d75 JS |
5076 | |
5077 | /* Fake the the following irrelvant fields */ | |
5078 | bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT); | |
5079 | bf_set(lpfc_mbx_read_top_alpa_granted, la, 0); | |
5080 | bf_set(lpfc_mbx_read_top_il, la, 0); | |
5081 | bf_set(lpfc_mbx_read_top_pb, la, 0); | |
5082 | bf_set(lpfc_mbx_read_top_fa, la, 0); | |
5083 | bf_set(lpfc_mbx_read_top_mm, la, 0); | |
da0436e9 JS |
5084 | |
5085 | /* Invoke the lpfc_handle_latt mailbox command callback function */ | |
76a95d75 | 5086 | lpfc_mbx_cmpl_read_topology(phba, pmb); |
da0436e9 | 5087 | |
5b75da2f | 5088 | return; |
da0436e9 JS |
5089 | |
5090 | out_free_dmabuf: | |
5091 | kfree(mp); | |
5092 | out_free_pmb: | |
5093 | mempool_free(pmb, phba->mbox_mem_pool); | |
5094 | } | |
5095 | ||
1dc5ec24 JS |
5096 | /** |
5097 | * lpfc_async_link_speed_to_read_top - Parse async evt link speed code to read | |
5098 | * topology. | |
5099 | * @phba: pointer to lpfc hba data structure. | |
1dc5ec24 JS |
5100 | * @speed_code: asynchronous event link speed code. |
5101 | * | |
5102 | * This routine is to parse the giving SLI4 async event link speed code into | |
5103 | * value of Read topology link speed. | |
5104 | * | |
5105 | * Return: link speed in terms of Read topology. | |
5106 | **/ | |
5107 | static uint8_t | |
5108 | lpfc_async_link_speed_to_read_top(struct lpfc_hba *phba, uint8_t speed_code) | |
5109 | { | |
5110 | uint8_t port_speed; | |
5111 | ||
5112 | switch (speed_code) { | |
5113 | case LPFC_FC_LA_SPEED_1G: | |
5114 | port_speed = LPFC_LINK_SPEED_1GHZ; | |
5115 | break; | |
5116 | case LPFC_FC_LA_SPEED_2G: | |
5117 | port_speed = LPFC_LINK_SPEED_2GHZ; | |
5118 | break; | |
5119 | case LPFC_FC_LA_SPEED_4G: | |
5120 | port_speed = LPFC_LINK_SPEED_4GHZ; | |
5121 | break; | |
5122 | case LPFC_FC_LA_SPEED_8G: | |
5123 | port_speed = LPFC_LINK_SPEED_8GHZ; | |
5124 | break; | |
5125 | case LPFC_FC_LA_SPEED_16G: | |
5126 | port_speed = LPFC_LINK_SPEED_16GHZ; | |
5127 | break; | |
5128 | case LPFC_FC_LA_SPEED_32G: | |
5129 | port_speed = LPFC_LINK_SPEED_32GHZ; | |
5130 | break; | |
5131 | case LPFC_FC_LA_SPEED_64G: | |
5132 | port_speed = LPFC_LINK_SPEED_64GHZ; | |
5133 | break; | |
5134 | case LPFC_FC_LA_SPEED_128G: | |
5135 | port_speed = LPFC_LINK_SPEED_128GHZ; | |
5136 | break; | |
5137 | case LPFC_FC_LA_SPEED_256G: | |
5138 | port_speed = LPFC_LINK_SPEED_256GHZ; | |
5139 | break; | |
5140 | default: | |
5141 | port_speed = 0; | |
5142 | break; | |
5143 | } | |
5144 | ||
5145 | return port_speed; | |
5146 | } | |
5147 | ||
5148 | #define trunk_link_status(__idx)\ | |
5149 | bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\ | |
5150 | ((phba->trunk_link.link##__idx.state == LPFC_LINK_UP) ?\ | |
5151 | "Link up" : "Link down") : "NA" | |
5152 | /* Did port __idx reported an error */ | |
5153 | #define trunk_port_fault(__idx)\ | |
5154 | bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\ | |
5155 | (port_fault & (1 << __idx) ? "YES" : "NO") : "NA" | |
5156 | ||
5157 | static void | |
5158 | lpfc_update_trunk_link_status(struct lpfc_hba *phba, | |
5159 | struct lpfc_acqe_fc_la *acqe_fc) | |
5160 | { | |
5161 | uint8_t port_fault = bf_get(lpfc_acqe_fc_la_trunk_linkmask, acqe_fc); | |
5162 | uint8_t err = bf_get(lpfc_acqe_fc_la_trunk_fault, acqe_fc); | |
5163 | ||
5164 | phba->sli4_hba.link_state.speed = | |
5165 | lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC, | |
5166 | bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); | |
5167 | ||
5168 | phba->sli4_hba.link_state.logical_speed = | |
b8e6f136 | 5169 | bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10; |
1dc5ec24 JS |
5170 | /* We got FC link speed, convert to fc_linkspeed (READ_TOPOLOGY) */ |
5171 | phba->fc_linkspeed = | |
5172 | lpfc_async_link_speed_to_read_top( | |
5173 | phba, | |
5174 | bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); | |
5175 | ||
5176 | if (bf_get(lpfc_acqe_fc_la_trunk_config_port0, acqe_fc)) { | |
5177 | phba->trunk_link.link0.state = | |
5178 | bf_get(lpfc_acqe_fc_la_trunk_link_status_port0, acqe_fc) | |
5179 | ? LPFC_LINK_UP : LPFC_LINK_DOWN; | |
529b3ddc | 5180 | phba->trunk_link.link0.fault = port_fault & 0x1 ? err : 0; |
1dc5ec24 JS |
5181 | } |
5182 | if (bf_get(lpfc_acqe_fc_la_trunk_config_port1, acqe_fc)) { | |
5183 | phba->trunk_link.link1.state = | |
5184 | bf_get(lpfc_acqe_fc_la_trunk_link_status_port1, acqe_fc) | |
5185 | ? LPFC_LINK_UP : LPFC_LINK_DOWN; | |
529b3ddc | 5186 | phba->trunk_link.link1.fault = port_fault & 0x2 ? err : 0; |
1dc5ec24 JS |
5187 | } |
5188 | if (bf_get(lpfc_acqe_fc_la_trunk_config_port2, acqe_fc)) { | |
5189 | phba->trunk_link.link2.state = | |
5190 | bf_get(lpfc_acqe_fc_la_trunk_link_status_port2, acqe_fc) | |
5191 | ? LPFC_LINK_UP : LPFC_LINK_DOWN; | |
529b3ddc | 5192 | phba->trunk_link.link2.fault = port_fault & 0x4 ? err : 0; |
1dc5ec24 JS |
5193 | } |
5194 | if (bf_get(lpfc_acqe_fc_la_trunk_config_port3, acqe_fc)) { | |
5195 | phba->trunk_link.link3.state = | |
5196 | bf_get(lpfc_acqe_fc_la_trunk_link_status_port3, acqe_fc) | |
5197 | ? LPFC_LINK_UP : LPFC_LINK_DOWN; | |
529b3ddc | 5198 | phba->trunk_link.link3.fault = port_fault & 0x8 ? err : 0; |
1dc5ec24 JS |
5199 | } |
5200 | ||
372c187b | 5201 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
1dc5ec24 JS |
5202 | "2910 Async FC Trunking Event - Speed:%d\n" |
5203 | "\tLogical speed:%d " | |
5204 | "port0: %s port1: %s port2: %s port3: %s\n", | |
5205 | phba->sli4_hba.link_state.speed, | |
5206 | phba->sli4_hba.link_state.logical_speed, | |
5207 | trunk_link_status(0), trunk_link_status(1), | |
5208 | trunk_link_status(2), trunk_link_status(3)); | |
5209 | ||
5210 | if (port_fault) | |
372c187b | 5211 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
1dc5ec24 JS |
5212 | "3202 trunk error:0x%x (%s) seen on port0:%s " |
5213 | /* | |
5214 | * SLI-4: We have only 0xA error codes | |
5215 | * defined as of now. print an appropriate | |
5216 | * message in case driver needs to be updated. | |
5217 | */ | |
5218 | "port1:%s port2:%s port3:%s\n", err, err > 0xA ? | |
5219 | "UNDEFINED. update driver." : trunk_errmsg[err], | |
5220 | trunk_port_fault(0), trunk_port_fault(1), | |
5221 | trunk_port_fault(2), trunk_port_fault(3)); | |
5222 | } | |
5223 | ||
5224 | ||
70f3c073 JS |
5225 | /** |
5226 | * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event | |
5227 | * @phba: pointer to lpfc hba data structure. | |
5228 | * @acqe_fc: pointer to the async fc completion queue entry. | |
5229 | * | |
5230 | * This routine is to handle the SLI4 asynchronous FC event. It will simply log | |
5231 | * that the event was received and then issue a read_topology mailbox command so | |
5232 | * that the rest of the driver will treat it the same as SLI3. | |
5233 | **/ | |
5234 | static void | |
5235 | lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc) | |
5236 | { | |
5237 | struct lpfc_dmabuf *mp; | |
5238 | LPFC_MBOXQ_t *pmb; | |
7bdedb34 JS |
5239 | MAILBOX_t *mb; |
5240 | struct lpfc_mbx_read_top *la; | |
70f3c073 JS |
5241 | int rc; |
5242 | ||
5243 | if (bf_get(lpfc_trailer_type, acqe_fc) != | |
5244 | LPFC_FC_LA_EVENT_TYPE_FC_LINK) { | |
372c187b | 5245 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
70f3c073 JS |
5246 | "2895 Non FC link Event detected.(%d)\n", |
5247 | bf_get(lpfc_trailer_type, acqe_fc)); | |
5248 | return; | |
5249 | } | |
1dc5ec24 JS |
5250 | |
5251 | if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) == | |
5252 | LPFC_FC_LA_TYPE_TRUNKING_EVENT) { | |
5253 | lpfc_update_trunk_link_status(phba, acqe_fc); | |
5254 | return; | |
5255 | } | |
5256 | ||
70f3c073 JS |
5257 | /* Keep the link status for extra SLI4 state machine reference */ |
5258 | phba->sli4_hba.link_state.speed = | |
8b68cd52 JS |
5259 | lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC, |
5260 | bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); | |
70f3c073 JS |
5261 | phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL; |
5262 | phba->sli4_hba.link_state.topology = | |
5263 | bf_get(lpfc_acqe_fc_la_topology, acqe_fc); | |
5264 | phba->sli4_hba.link_state.status = | |
5265 | bf_get(lpfc_acqe_fc_la_att_type, acqe_fc); | |
5266 | phba->sli4_hba.link_state.type = | |
5267 | bf_get(lpfc_acqe_fc_la_port_type, acqe_fc); | |
5268 | phba->sli4_hba.link_state.number = | |
5269 | bf_get(lpfc_acqe_fc_la_port_number, acqe_fc); | |
5270 | phba->sli4_hba.link_state.fault = | |
5271 | bf_get(lpfc_acqe_link_fault, acqe_fc); | |
b8e6f136 JS |
5272 | |
5273 | if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) == | |
5274 | LPFC_FC_LA_TYPE_LINK_DOWN) | |
5275 | phba->sli4_hba.link_state.logical_speed = 0; | |
5276 | else if (!phba->sli4_hba.conf_trunk) | |
5277 | phba->sli4_hba.link_state.logical_speed = | |
8b68cd52 | 5278 | bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10; |
b8e6f136 | 5279 | |
70f3c073 JS |
5280 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, |
5281 | "2896 Async FC event - Speed:%dGBaud Topology:x%x " | |
5282 | "LA Type:x%x Port Type:%d Port Number:%d Logical speed:" | |
5283 | "%dMbps Fault:%d\n", | |
5284 | phba->sli4_hba.link_state.speed, | |
5285 | phba->sli4_hba.link_state.topology, | |
5286 | phba->sli4_hba.link_state.status, | |
5287 | phba->sli4_hba.link_state.type, | |
5288 | phba->sli4_hba.link_state.number, | |
8b68cd52 | 5289 | phba->sli4_hba.link_state.logical_speed, |
70f3c073 JS |
5290 | phba->sli4_hba.link_state.fault); |
5291 | pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); | |
5292 | if (!pmb) { | |
372c187b | 5293 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
70f3c073 JS |
5294 | "2897 The mboxq allocation failed\n"); |
5295 | return; | |
5296 | } | |
5297 | mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); | |
5298 | if (!mp) { | |
372c187b | 5299 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
70f3c073 JS |
5300 | "2898 The lpfc_dmabuf allocation failed\n"); |
5301 | goto out_free_pmb; | |
5302 | } | |
5303 | mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys); | |
5304 | if (!mp->virt) { | |
372c187b | 5305 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
70f3c073 JS |
5306 | "2899 The mbuf allocation failed\n"); |
5307 | goto out_free_dmabuf; | |
5308 | } | |
5309 | ||
5310 | /* Cleanup any outstanding ELS commands */ | |
5311 | lpfc_els_flush_all_cmd(phba); | |
5312 | ||
5313 | /* Block ELS IOCBs until we have done process link event */ | |
895427bd | 5314 | phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT; |
70f3c073 JS |
5315 | |
5316 | /* Update link event statistics */ | |
5317 | phba->sli.slistat.link_event++; | |
5318 | ||
5319 | /* Create lpfc_handle_latt mailbox command from link ACQE */ | |
5320 | lpfc_read_topology(phba, pmb, mp); | |
5321 | pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; | |
5322 | pmb->vport = phba->pport; | |
5323 | ||
7bdedb34 | 5324 | if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) { |
ae9e28f3 JS |
5325 | phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK); |
5326 | ||
5327 | switch (phba->sli4_hba.link_state.status) { | |
5328 | case LPFC_FC_LA_TYPE_MDS_LINK_DOWN: | |
5329 | phba->link_flag |= LS_MDS_LINK_DOWN; | |
5330 | break; | |
5331 | case LPFC_FC_LA_TYPE_MDS_LOOPBACK: | |
5332 | phba->link_flag |= LS_MDS_LOOPBACK; | |
5333 | break; | |
5334 | default: | |
5335 | break; | |
5336 | } | |
5337 | ||
23288b78 | 5338 | /* Initialize completion status */ |
7bdedb34 | 5339 | mb = &pmb->u.mb; |
23288b78 JS |
5340 | mb->mbxStatus = MBX_SUCCESS; |
5341 | ||
5342 | /* Parse port fault information field */ | |
5343 | lpfc_sli4_parse_latt_fault(phba, (void *)acqe_fc); | |
7bdedb34 JS |
5344 | |
5345 | /* Parse and translate link attention fields */ | |
5346 | la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop; | |
5347 | la->eventTag = acqe_fc->event_tag; | |
7bdedb34 | 5348 | |
aeb3c817 JS |
5349 | if (phba->sli4_hba.link_state.status == |
5350 | LPFC_FC_LA_TYPE_UNEXP_WWPN) { | |
5351 | bf_set(lpfc_mbx_read_top_att_type, la, | |
5352 | LPFC_FC_LA_TYPE_UNEXP_WWPN); | |
5353 | } else { | |
5354 | bf_set(lpfc_mbx_read_top_att_type, la, | |
5355 | LPFC_FC_LA_TYPE_LINK_DOWN); | |
5356 | } | |
7bdedb34 JS |
5357 | /* Invoke the mailbox command callback function */ |
5358 | lpfc_mbx_cmpl_read_topology(phba, pmb); | |
5359 | ||
5360 | return; | |
5361 | } | |
5362 | ||
70f3c073 JS |
5363 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); |
5364 | if (rc == MBX_NOT_FINISHED) | |
5365 | goto out_free_dmabuf; | |
5366 | return; | |
5367 | ||
5368 | out_free_dmabuf: | |
5369 | kfree(mp); | |
5370 | out_free_pmb: | |
5371 | mempool_free(pmb, phba->mbox_mem_pool); | |
5372 | } | |
5373 | ||
5374 | /** | |
5375 | * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event | |
5376 | * @phba: pointer to lpfc hba data structure. | |
fe614acd | 5377 | * @acqe_sli: pointer to the async SLI completion queue entry. |
70f3c073 JS |
5378 | * |
5379 | * This routine is to handle the SLI4 asynchronous SLI events. | |
5380 | **/ | |
5381 | static void | |
5382 | lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli) | |
5383 | { | |
4b8bae08 | 5384 | char port_name; |
8c1312e1 | 5385 | char message[128]; |
4b8bae08 | 5386 | uint8_t status; |
946727dc | 5387 | uint8_t evt_type; |
448193b5 | 5388 | uint8_t operational = 0; |
946727dc | 5389 | struct temp_event temp_event_data; |
4b8bae08 | 5390 | struct lpfc_acqe_misconfigured_event *misconfigured; |
946727dc | 5391 | struct Scsi_Host *shost; |
cd71348a JS |
5392 | struct lpfc_vport **vports; |
5393 | int rc, i; | |
946727dc JS |
5394 | |
5395 | evt_type = bf_get(lpfc_trailer_type, acqe_sli); | |
4b8bae08 | 5396 | |
448193b5 | 5397 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, |
d11ed16d JS |
5398 | "2901 Async SLI event - Type:%d, Event Data: x%08x " |
5399 | "x%08x x%08x x%08x\n", evt_type, | |
448193b5 | 5400 | acqe_sli->event_data1, acqe_sli->event_data2, |
d11ed16d | 5401 | acqe_sli->reserved, acqe_sli->trailer); |
4b8bae08 JS |
5402 | |
5403 | port_name = phba->Port[0]; | |
5404 | if (port_name == 0x00) | |
5405 | port_name = '?'; /* get port name is empty */ | |
5406 | ||
946727dc JS |
5407 | switch (evt_type) { |
5408 | case LPFC_SLI_EVENT_TYPE_OVER_TEMP: | |
5409 | temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; | |
5410 | temp_event_data.event_code = LPFC_THRESHOLD_TEMP; | |
5411 | temp_event_data.data = (uint32_t)acqe_sli->event_data1; | |
5412 | ||
5413 | lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, | |
5414 | "3190 Over Temperature:%d Celsius- Port Name %c\n", | |
5415 | acqe_sli->event_data1, port_name); | |
5416 | ||
310429ef | 5417 | phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE; |
946727dc JS |
5418 | shost = lpfc_shost_from_vport(phba->pport); |
5419 | fc_host_post_vendor_event(shost, fc_get_event_number(), | |
5420 | sizeof(temp_event_data), | |
5421 | (char *)&temp_event_data, | |
5422 | SCSI_NL_VID_TYPE_PCI | |
5423 | | PCI_VENDOR_ID_EMULEX); | |
5424 | break; | |
5425 | case LPFC_SLI_EVENT_TYPE_NORM_TEMP: | |
5426 | temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; | |
5427 | temp_event_data.event_code = LPFC_NORMAL_TEMP; | |
5428 | temp_event_data.data = (uint32_t)acqe_sli->event_data1; | |
5429 | ||
5430 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
5431 | "3191 Normal Temperature:%d Celsius - Port Name %c\n", | |
5432 | acqe_sli->event_data1, port_name); | |
5433 | ||
5434 | shost = lpfc_shost_from_vport(phba->pport); | |
5435 | fc_host_post_vendor_event(shost, fc_get_event_number(), | |
5436 | sizeof(temp_event_data), | |
5437 | (char *)&temp_event_data, | |
5438 | SCSI_NL_VID_TYPE_PCI | |
5439 | | PCI_VENDOR_ID_EMULEX); | |
5440 | break; | |
5441 | case LPFC_SLI_EVENT_TYPE_MISCONFIGURED: | |
5442 | misconfigured = (struct lpfc_acqe_misconfigured_event *) | |
4b8bae08 JS |
5443 | &acqe_sli->event_data1; |
5444 | ||
946727dc JS |
5445 | /* fetch the status for this port */ |
5446 | switch (phba->sli4_hba.lnk_info.lnk_no) { | |
5447 | case LPFC_LINK_NUMBER_0: | |
448193b5 JS |
5448 | status = bf_get(lpfc_sli_misconfigured_port0_state, |
5449 | &misconfigured->theEvent); | |
5450 | operational = bf_get(lpfc_sli_misconfigured_port0_op, | |
4b8bae08 | 5451 | &misconfigured->theEvent); |
946727dc JS |
5452 | break; |
5453 | case LPFC_LINK_NUMBER_1: | |
448193b5 JS |
5454 | status = bf_get(lpfc_sli_misconfigured_port1_state, |
5455 | &misconfigured->theEvent); | |
5456 | operational = bf_get(lpfc_sli_misconfigured_port1_op, | |
4b8bae08 | 5457 | &misconfigured->theEvent); |
946727dc JS |
5458 | break; |
5459 | case LPFC_LINK_NUMBER_2: | |
448193b5 JS |
5460 | status = bf_get(lpfc_sli_misconfigured_port2_state, |
5461 | &misconfigured->theEvent); | |
5462 | operational = bf_get(lpfc_sli_misconfigured_port2_op, | |
4b8bae08 | 5463 | &misconfigured->theEvent); |
946727dc JS |
5464 | break; |
5465 | case LPFC_LINK_NUMBER_3: | |
448193b5 JS |
5466 | status = bf_get(lpfc_sli_misconfigured_port3_state, |
5467 | &misconfigured->theEvent); | |
5468 | operational = bf_get(lpfc_sli_misconfigured_port3_op, | |
4b8bae08 | 5469 | &misconfigured->theEvent); |
946727dc JS |
5470 | break; |
5471 | default: | |
372c187b | 5472 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
448193b5 JS |
5473 | "3296 " |
5474 | "LPFC_SLI_EVENT_TYPE_MISCONFIGURED " | |
5475 | "event: Invalid link %d", | |
5476 | phba->sli4_hba.lnk_info.lnk_no); | |
5477 | return; | |
946727dc | 5478 | } |
4b8bae08 | 5479 | |
448193b5 JS |
5480 | /* Skip if optic state unchanged */ |
5481 | if (phba->sli4_hba.lnk_info.optic_state == status) | |
5482 | return; | |
5483 | ||
946727dc JS |
5484 | switch (status) { |
5485 | case LPFC_SLI_EVENT_STATUS_VALID: | |
448193b5 JS |
5486 | sprintf(message, "Physical Link is functional"); |
5487 | break; | |
946727dc JS |
5488 | case LPFC_SLI_EVENT_STATUS_NOT_PRESENT: |
5489 | sprintf(message, "Optics faulted/incorrectly " | |
5490 | "installed/not installed - Reseat optics, " | |
5491 | "if issue not resolved, replace."); | |
5492 | break; | |
5493 | case LPFC_SLI_EVENT_STATUS_WRONG_TYPE: | |
5494 | sprintf(message, | |
5495 | "Optics of two types installed - Remove one " | |
5496 | "optic or install matching pair of optics."); | |
5497 | break; | |
5498 | case LPFC_SLI_EVENT_STATUS_UNSUPPORTED: | |
5499 | sprintf(message, "Incompatible optics - Replace with " | |
292098be | 5500 | "compatible optics for card to function."); |
946727dc | 5501 | break; |
448193b5 JS |
5502 | case LPFC_SLI_EVENT_STATUS_UNQUALIFIED: |
5503 | sprintf(message, "Unqualified optics - Replace with " | |
5504 | "Avago optics for Warranty and Technical " | |
5505 | "Support - Link is%s operational", | |
2ea259ee | 5506 | (operational) ? " not" : ""); |
448193b5 JS |
5507 | break; |
5508 | case LPFC_SLI_EVENT_STATUS_UNCERTIFIED: | |
5509 | sprintf(message, "Uncertified optics - Replace with " | |
5510 | "Avago-certified optics to enable link " | |
5511 | "operation - Link is%s operational", | |
2ea259ee | 5512 | (operational) ? " not" : ""); |
448193b5 | 5513 | break; |
946727dc JS |
5514 | default: |
5515 | /* firmware is reporting a status we don't know about */ | |
5516 | sprintf(message, "Unknown event status x%02x", status); | |
5517 | break; | |
5518 | } | |
cd71348a JS |
5519 | |
5520 | /* Issue READ_CONFIG mbox command to refresh supported speeds */ | |
5521 | rc = lpfc_sli4_read_config(phba); | |
3952e91f | 5522 | if (rc) { |
cd71348a | 5523 | phba->lmt = 0; |
372c187b DK |
5524 | lpfc_printf_log(phba, KERN_ERR, |
5525 | LOG_TRACE_EVENT, | |
cd71348a | 5526 | "3194 Unable to retrieve supported " |
3952e91f | 5527 | "speeds, rc = 0x%x\n", rc); |
cd71348a JS |
5528 | } |
5529 | vports = lpfc_create_vport_work_array(phba); | |
5530 | if (vports != NULL) { | |
5531 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; | |
5532 | i++) { | |
5533 | shost = lpfc_shost_from_vport(vports[i]); | |
5534 | lpfc_host_supported_speeds_set(shost); | |
5535 | } | |
5536 | } | |
5537 | lpfc_destroy_vport_work_array(phba, vports); | |
5538 | ||
448193b5 | 5539 | phba->sli4_hba.lnk_info.optic_state = status; |
946727dc | 5540 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, |
448193b5 | 5541 | "3176 Port Name %c %s\n", port_name, message); |
946727dc JS |
5542 | break; |
5543 | case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT: | |
5544 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
5545 | "3192 Remote DPort Test Initiated - " | |
5546 | "Event Data1:x%08x Event Data2: x%08x\n", | |
5547 | acqe_sli->event_data1, acqe_sli->event_data2); | |
4b8bae08 | 5548 | break; |
e7d85952 JS |
5549 | case LPFC_SLI_EVENT_TYPE_MISCONF_FAWWN: |
5550 | /* Misconfigured WWN. Reports that the SLI Port is configured | |
5551 | * to use FA-WWN, but the attached device doesn’t support it. | |
5552 | * No driver action is required. | |
5553 | * Event Data1 - N.A, Event Data2 - N.A | |
5554 | */ | |
5555 | lpfc_log_msg(phba, KERN_WARNING, LOG_SLI, | |
5556 | "2699 Misconfigured FA-WWN - Attached device does " | |
5557 | "not support FA-WWN\n"); | |
5558 | break; | |
d11ed16d JS |
5559 | case LPFC_SLI_EVENT_TYPE_EEPROM_FAILURE: |
5560 | /* EEPROM failure. No driver action is required */ | |
5561 | lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, | |
5562 | "2518 EEPROM failure - " | |
5563 | "Event Data1: x%08x Event Data2: x%08x\n", | |
5564 | acqe_sli->event_data1, acqe_sli->event_data2); | |
5565 | break; | |
4b8bae08 | 5566 | default: |
946727dc | 5567 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, |
d11ed16d | 5568 | "3193 Unrecognized SLI event, type: 0x%x", |
946727dc | 5569 | evt_type); |
4b8bae08 JS |
5570 | break; |
5571 | } | |
70f3c073 JS |
5572 | } |
5573 | ||
fc2b989b JS |
5574 | /** |
5575 | * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport | |
5576 | * @vport: pointer to vport data structure. | |
5577 | * | |
5578 | * This routine is to perform Clear Virtual Link (CVL) on a vport in | |
5579 | * response to a CVL event. | |
5580 | * | |
5581 | * Return the pointer to the ndlp with the vport if successful, otherwise | |
5582 | * return NULL. | |
5583 | **/ | |
5584 | static struct lpfc_nodelist * | |
5585 | lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport) | |
5586 | { | |
5587 | struct lpfc_nodelist *ndlp; | |
5588 | struct Scsi_Host *shost; | |
5589 | struct lpfc_hba *phba; | |
5590 | ||
5591 | if (!vport) | |
5592 | return NULL; | |
fc2b989b JS |
5593 | phba = vport->phba; |
5594 | if (!phba) | |
5595 | return NULL; | |
78730cfe JS |
5596 | ndlp = lpfc_findnode_did(vport, Fabric_DID); |
5597 | if (!ndlp) { | |
5598 | /* Cannot find existing Fabric ndlp, so allocate a new one */ | |
9d3d340d | 5599 | ndlp = lpfc_nlp_init(vport, Fabric_DID); |
78730cfe JS |
5600 | if (!ndlp) |
5601 | return 0; | |
78730cfe JS |
5602 | /* Set the node type */ |
5603 | ndlp->nlp_type |= NLP_FABRIC; | |
5604 | /* Put ndlp onto node list */ | |
5605 | lpfc_enqueue_node(vport, ndlp); | |
78730cfe | 5606 | } |
63e801ce JS |
5607 | if ((phba->pport->port_state < LPFC_FLOGI) && |
5608 | (phba->pport->port_state != LPFC_VPORT_FAILED)) | |
fc2b989b JS |
5609 | return NULL; |
5610 | /* If virtual link is not yet instantiated ignore CVL */ | |
63e801ce JS |
5611 | if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC) |
5612 | && (vport->port_state != LPFC_VPORT_FAILED)) | |
fc2b989b JS |
5613 | return NULL; |
5614 | shost = lpfc_shost_from_vport(vport); | |
5615 | if (!shost) | |
5616 | return NULL; | |
5617 | lpfc_linkdown_port(vport); | |
5618 | lpfc_cleanup_pending_mbox(vport); | |
5619 | spin_lock_irq(shost->host_lock); | |
5620 | vport->fc_flag |= FC_VPORT_CVL_RCVD; | |
5621 | spin_unlock_irq(shost->host_lock); | |
5622 | ||
5623 | return ndlp; | |
5624 | } | |
5625 | ||
5626 | /** | |
5627 | * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports | |
fe614acd | 5628 | * @phba: pointer to lpfc hba data structure. |
fc2b989b JS |
5629 | * |
5630 | * This routine is to perform Clear Virtual Link (CVL) on all vports in | |
5631 | * response to a FCF dead event. | |
5632 | **/ | |
5633 | static void | |
5634 | lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba) | |
5635 | { | |
5636 | struct lpfc_vport **vports; | |
5637 | int i; | |
5638 | ||
5639 | vports = lpfc_create_vport_work_array(phba); | |
5640 | if (vports) | |
5641 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) | |
5642 | lpfc_sli4_perform_vport_cvl(vports[i]); | |
5643 | lpfc_destroy_vport_work_array(phba, vports); | |
5644 | } | |
5645 | ||
da0436e9 | 5646 | /** |
76a95d75 | 5647 | * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event |
da0436e9 | 5648 | * @phba: pointer to lpfc hba data structure. |
fe614acd | 5649 | * @acqe_fip: pointer to the async fcoe completion queue entry. |
da0436e9 JS |
5650 | * |
5651 | * This routine is to handle the SLI4 asynchronous fcoe event. | |
5652 | **/ | |
5653 | static void | |
76a95d75 | 5654 | lpfc_sli4_async_fip_evt(struct lpfc_hba *phba, |
70f3c073 | 5655 | struct lpfc_acqe_fip *acqe_fip) |
da0436e9 | 5656 | { |
70f3c073 | 5657 | uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip); |
da0436e9 | 5658 | int rc; |
6669f9bb JS |
5659 | struct lpfc_vport *vport; |
5660 | struct lpfc_nodelist *ndlp; | |
695a814e JS |
5661 | int active_vlink_present; |
5662 | struct lpfc_vport **vports; | |
5663 | int i; | |
da0436e9 | 5664 | |
70f3c073 JS |
5665 | phba->fc_eventTag = acqe_fip->event_tag; |
5666 | phba->fcoe_eventtag = acqe_fip->event_tag; | |
da0436e9 | 5667 | switch (event_type) { |
70f3c073 JS |
5668 | case LPFC_FIP_EVENT_TYPE_NEW_FCF: |
5669 | case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD: | |
5670 | if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF) | |
372c187b | 5671 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
a93ff37a JS |
5672 | "2546 New FCF event, evt_tag:x%x, " |
5673 | "index:x%x\n", | |
70f3c073 JS |
5674 | acqe_fip->event_tag, |
5675 | acqe_fip->index); | |
999d813f JS |
5676 | else |
5677 | lpfc_printf_log(phba, KERN_WARNING, LOG_FIP | | |
5678 | LOG_DISCOVERY, | |
a93ff37a JS |
5679 | "2788 FCF param modified event, " |
5680 | "evt_tag:x%x, index:x%x\n", | |
70f3c073 JS |
5681 | acqe_fip->event_tag, |
5682 | acqe_fip->index); | |
38b92ef8 | 5683 | if (phba->fcf.fcf_flag & FCF_DISCOVERY) { |
0c9ab6f5 JS |
5684 | /* |
5685 | * During period of FCF discovery, read the FCF | |
5686 | * table record indexed by the event to update | |
a93ff37a | 5687 | * FCF roundrobin failover eligible FCF bmask. |
0c9ab6f5 JS |
5688 | */ |
5689 | lpfc_printf_log(phba, KERN_INFO, LOG_FIP | | |
5690 | LOG_DISCOVERY, | |
a93ff37a JS |
5691 | "2779 Read FCF (x%x) for updating " |
5692 | "roundrobin FCF failover bmask\n", | |
70f3c073 JS |
5693 | acqe_fip->index); |
5694 | rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index); | |
0c9ab6f5 | 5695 | } |
38b92ef8 JS |
5696 | |
5697 | /* If the FCF discovery is in progress, do nothing. */ | |
3804dc84 | 5698 | spin_lock_irq(&phba->hbalock); |
a93ff37a | 5699 | if (phba->hba_flag & FCF_TS_INPROG) { |
38b92ef8 JS |
5700 | spin_unlock_irq(&phba->hbalock); |
5701 | break; | |
5702 | } | |
5703 | /* If fast FCF failover rescan event is pending, do nothing */ | |
036cad1f | 5704 | if (phba->fcf.fcf_flag & (FCF_REDISC_EVT | FCF_REDISC_PEND)) { |
38b92ef8 JS |
5705 | spin_unlock_irq(&phba->hbalock); |
5706 | break; | |
5707 | } | |
5708 | ||
c2b9712e JS |
5709 | /* If the FCF has been in discovered state, do nothing. */ |
5710 | if (phba->fcf.fcf_flag & FCF_SCAN_DONE) { | |
3804dc84 JS |
5711 | spin_unlock_irq(&phba->hbalock); |
5712 | break; | |
5713 | } | |
5714 | spin_unlock_irq(&phba->hbalock); | |
38b92ef8 | 5715 | |
0c9ab6f5 JS |
5716 | /* Otherwise, scan the entire FCF table and re-discover SAN */ |
5717 | lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, | |
a93ff37a JS |
5718 | "2770 Start FCF table scan per async FCF " |
5719 | "event, evt_tag:x%x, index:x%x\n", | |
70f3c073 | 5720 | acqe_fip->event_tag, acqe_fip->index); |
0c9ab6f5 JS |
5721 | rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, |
5722 | LPFC_FCOE_FCF_GET_FIRST); | |
da0436e9 | 5723 | if (rc) |
372c187b | 5724 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
0c9ab6f5 | 5725 | "2547 Issue FCF scan read FCF mailbox " |
a93ff37a | 5726 | "command failed (x%x)\n", rc); |
da0436e9 JS |
5727 | break; |
5728 | ||
70f3c073 | 5729 | case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL: |
372c187b DK |
5730 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
5731 | "2548 FCF Table full count 0x%x tag 0x%x\n", | |
5732 | bf_get(lpfc_acqe_fip_fcf_count, acqe_fip), | |
5733 | acqe_fip->event_tag); | |
da0436e9 JS |
5734 | break; |
5735 | ||
70f3c073 | 5736 | case LPFC_FIP_EVENT_TYPE_FCF_DEAD: |
80c17849 | 5737 | phba->fcoe_cvl_eventtag = acqe_fip->event_tag; |
372c187b DK |
5738 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
5739 | "2549 FCF (x%x) disconnected from network, " | |
5740 | "tag:x%x\n", acqe_fip->index, | |
5741 | acqe_fip->event_tag); | |
38b92ef8 JS |
5742 | /* |
5743 | * If we are in the middle of FCF failover process, clear | |
5744 | * the corresponding FCF bit in the roundrobin bitmap. | |
da0436e9 | 5745 | */ |
fc2b989b | 5746 | spin_lock_irq(&phba->hbalock); |
a1cadfef JS |
5747 | if ((phba->fcf.fcf_flag & FCF_DISCOVERY) && |
5748 | (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) { | |
fc2b989b | 5749 | spin_unlock_irq(&phba->hbalock); |
0c9ab6f5 | 5750 | /* Update FLOGI FCF failover eligible FCF bmask */ |
70f3c073 | 5751 | lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index); |
fc2b989b JS |
5752 | break; |
5753 | } | |
38b92ef8 JS |
5754 | spin_unlock_irq(&phba->hbalock); |
5755 | ||
5756 | /* If the event is not for currently used fcf do nothing */ | |
70f3c073 | 5757 | if (phba->fcf.current_rec.fcf_indx != acqe_fip->index) |
38b92ef8 JS |
5758 | break; |
5759 | ||
5760 | /* | |
5761 | * Otherwise, request the port to rediscover the entire FCF | |
5762 | * table for a fast recovery from case that the current FCF | |
5763 | * is no longer valid as we are not in the middle of FCF | |
5764 | * failover process already. | |
5765 | */ | |
c2b9712e JS |
5766 | spin_lock_irq(&phba->hbalock); |
5767 | /* Mark the fast failover process in progress */ | |
5768 | phba->fcf.fcf_flag |= FCF_DEAD_DISC; | |
5769 | spin_unlock_irq(&phba->hbalock); | |
5770 | ||
5771 | lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, | |
5772 | "2771 Start FCF fast failover process due to " | |
5773 | "FCF DEAD event: evt_tag:x%x, fcf_index:x%x " | |
5774 | "\n", acqe_fip->event_tag, acqe_fip->index); | |
5775 | rc = lpfc_sli4_redisc_fcf_table(phba); | |
5776 | if (rc) { | |
5777 | lpfc_printf_log(phba, KERN_ERR, LOG_FIP | | |
372c187b | 5778 | LOG_TRACE_EVENT, |
7afc0ce9 | 5779 | "2772 Issue FCF rediscover mailbox " |
c2b9712e JS |
5780 | "command failed, fail through to FCF " |
5781 | "dead event\n"); | |
5782 | spin_lock_irq(&phba->hbalock); | |
5783 | phba->fcf.fcf_flag &= ~FCF_DEAD_DISC; | |
5784 | spin_unlock_irq(&phba->hbalock); | |
5785 | /* | |
5786 | * Last resort will fail over by treating this | |
5787 | * as a link down to FCF registration. | |
5788 | */ | |
5789 | lpfc_sli4_fcf_dead_failthrough(phba); | |
5790 | } else { | |
5791 | /* Reset FCF roundrobin bmask for new discovery */ | |
5792 | lpfc_sli4_clear_fcf_rr_bmask(phba); | |
5793 | /* | |
5794 | * Handling fast FCF failover to a DEAD FCF event is | |
5795 | * considered equalivant to receiving CVL to all vports. | |
5796 | */ | |
5797 | lpfc_sli4_perform_all_vport_cvl(phba); | |
5798 | } | |
da0436e9 | 5799 | break; |
70f3c073 | 5800 | case LPFC_FIP_EVENT_TYPE_CVL: |
80c17849 | 5801 | phba->fcoe_cvl_eventtag = acqe_fip->event_tag; |
372c187b DK |
5802 | lpfc_printf_log(phba, KERN_ERR, |
5803 | LOG_TRACE_EVENT, | |
6669f9bb | 5804 | "2718 Clear Virtual Link Received for VPI 0x%x" |
70f3c073 | 5805 | " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag); |
6d368e53 | 5806 | |
6669f9bb | 5807 | vport = lpfc_find_vport_by_vpid(phba, |
5248a749 | 5808 | acqe_fip->index); |
fc2b989b | 5809 | ndlp = lpfc_sli4_perform_vport_cvl(vport); |
6669f9bb JS |
5810 | if (!ndlp) |
5811 | break; | |
695a814e JS |
5812 | active_vlink_present = 0; |
5813 | ||
5814 | vports = lpfc_create_vport_work_array(phba); | |
5815 | if (vports) { | |
5816 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; | |
5817 | i++) { | |
5818 | if ((!(vports[i]->fc_flag & | |
5819 | FC_VPORT_CVL_RCVD)) && | |
5820 | (vports[i]->port_state > LPFC_FDISC)) { | |
5821 | active_vlink_present = 1; | |
5822 | break; | |
5823 | } | |
5824 | } | |
5825 | lpfc_destroy_vport_work_array(phba, vports); | |
5826 | } | |
5827 | ||
cc82355a JS |
5828 | /* |
5829 | * Don't re-instantiate if vport is marked for deletion. | |
5830 | * If we are here first then vport_delete is going to wait | |
5831 | * for discovery to complete. | |
5832 | */ | |
5833 | if (!(vport->load_flag & FC_UNLOADING) && | |
5834 | active_vlink_present) { | |
695a814e JS |
5835 | /* |
5836 | * If there are other active VLinks present, | |
5837 | * re-instantiate the Vlink using FDISC. | |
5838 | */ | |
256ec0d0 JS |
5839 | mod_timer(&ndlp->nlp_delayfunc, |
5840 | jiffies + msecs_to_jiffies(1000)); | |
c6adba15 | 5841 | spin_lock_irq(&ndlp->lock); |
6669f9bb | 5842 | ndlp->nlp_flag |= NLP_DELAY_TMO; |
c6adba15 | 5843 | spin_unlock_irq(&ndlp->lock); |
695a814e JS |
5844 | ndlp->nlp_last_elscmd = ELS_CMD_FDISC; |
5845 | vport->port_state = LPFC_FDISC; | |
5846 | } else { | |
ecfd03c6 JS |
5847 | /* |
5848 | * Otherwise, we request port to rediscover | |
5849 | * the entire FCF table for a fast recovery | |
5850 | * from possible case that the current FCF | |
0c9ab6f5 JS |
5851 | * is no longer valid if we are not already |
5852 | * in the FCF failover process. | |
ecfd03c6 | 5853 | */ |
fc2b989b | 5854 | spin_lock_irq(&phba->hbalock); |
0c9ab6f5 | 5855 | if (phba->fcf.fcf_flag & FCF_DISCOVERY) { |
fc2b989b JS |
5856 | spin_unlock_irq(&phba->hbalock); |
5857 | break; | |
5858 | } | |
5859 | /* Mark the fast failover process in progress */ | |
0c9ab6f5 | 5860 | phba->fcf.fcf_flag |= FCF_ACVL_DISC; |
fc2b989b | 5861 | spin_unlock_irq(&phba->hbalock); |
0c9ab6f5 JS |
5862 | lpfc_printf_log(phba, KERN_INFO, LOG_FIP | |
5863 | LOG_DISCOVERY, | |
a93ff37a | 5864 | "2773 Start FCF failover per CVL, " |
70f3c073 | 5865 | "evt_tag:x%x\n", acqe_fip->event_tag); |
ecfd03c6 | 5866 | rc = lpfc_sli4_redisc_fcf_table(phba); |
fc2b989b | 5867 | if (rc) { |
0c9ab6f5 | 5868 | lpfc_printf_log(phba, KERN_ERR, LOG_FIP | |
372c187b | 5869 | LOG_TRACE_EVENT, |
0c9ab6f5 | 5870 | "2774 Issue FCF rediscover " |
7afc0ce9 | 5871 | "mailbox command failed, " |
0c9ab6f5 | 5872 | "through to CVL event\n"); |
fc2b989b | 5873 | spin_lock_irq(&phba->hbalock); |
0c9ab6f5 | 5874 | phba->fcf.fcf_flag &= ~FCF_ACVL_DISC; |
fc2b989b | 5875 | spin_unlock_irq(&phba->hbalock); |
ecfd03c6 JS |
5876 | /* |
5877 | * Last resort will be re-try on the | |
5878 | * the current registered FCF entry. | |
5879 | */ | |
5880 | lpfc_retry_pport_discovery(phba); | |
38b92ef8 JS |
5881 | } else |
5882 | /* | |
5883 | * Reset FCF roundrobin bmask for new | |
5884 | * discovery. | |
5885 | */ | |
7d791df7 | 5886 | lpfc_sli4_clear_fcf_rr_bmask(phba); |
6669f9bb JS |
5887 | } |
5888 | break; | |
da0436e9 | 5889 | default: |
372c187b DK |
5890 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
5891 | "0288 Unknown FCoE event type 0x%x event tag " | |
5892 | "0x%x\n", event_type, acqe_fip->event_tag); | |
da0436e9 JS |
5893 | break; |
5894 | } | |
5895 | } | |
5896 | ||
5897 | /** | |
5898 | * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event | |
5899 | * @phba: pointer to lpfc hba data structure. | |
fe614acd | 5900 | * @acqe_dcbx: pointer to the async dcbx completion queue entry. |
da0436e9 JS |
5901 | * |
5902 | * This routine is to handle the SLI4 asynchronous dcbx event. | |
5903 | **/ | |
5904 | static void | |
5905 | lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba, | |
5906 | struct lpfc_acqe_dcbx *acqe_dcbx) | |
5907 | { | |
4d9ab994 | 5908 | phba->fc_eventTag = acqe_dcbx->event_tag; |
372c187b | 5909 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
da0436e9 JS |
5910 | "0290 The SLI4 DCBX asynchronous event is not " |
5911 | "handled yet\n"); | |
5912 | } | |
5913 | ||
b19a061a JS |
5914 | /** |
5915 | * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event | |
5916 | * @phba: pointer to lpfc hba data structure. | |
fe614acd | 5917 | * @acqe_grp5: pointer to the async grp5 completion queue entry. |
b19a061a JS |
5918 | * |
5919 | * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event | |
5920 | * is an asynchronous notified of a logical link speed change. The Port | |
5921 | * reports the logical link speed in units of 10Mbps. | |
5922 | **/ | |
5923 | static void | |
5924 | lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba, | |
5925 | struct lpfc_acqe_grp5 *acqe_grp5) | |
5926 | { | |
5927 | uint16_t prev_ll_spd; | |
5928 | ||
5929 | phba->fc_eventTag = acqe_grp5->event_tag; | |
5930 | phba->fcoe_eventtag = acqe_grp5->event_tag; | |
5931 | prev_ll_spd = phba->sli4_hba.link_state.logical_speed; | |
5932 | phba->sli4_hba.link_state.logical_speed = | |
8b68cd52 | 5933 | (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10; |
b19a061a JS |
5934 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, |
5935 | "2789 GRP5 Async Event: Updating logical link speed " | |
8b68cd52 JS |
5936 | "from %dMbps to %dMbps\n", prev_ll_spd, |
5937 | phba->sli4_hba.link_state.logical_speed); | |
b19a061a JS |
5938 | } |
5939 | ||
da0436e9 JS |
5940 | /** |
5941 | * lpfc_sli4_async_event_proc - Process all the pending asynchronous event | |
5942 | * @phba: pointer to lpfc hba data structure. | |
5943 | * | |
5944 | * This routine is invoked by the worker thread to process all the pending | |
5945 | * SLI4 asynchronous events. | |
5946 | **/ | |
5947 | void lpfc_sli4_async_event_proc(struct lpfc_hba *phba) | |
5948 | { | |
5949 | struct lpfc_cq_event *cq_event; | |
e7dab164 | 5950 | unsigned long iflags; |
da0436e9 JS |
5951 | |
5952 | /* First, declare the async event has been handled */ | |
e7dab164 | 5953 | spin_lock_irqsave(&phba->hbalock, iflags); |
da0436e9 | 5954 | phba->hba_flag &= ~ASYNC_EVENT; |
e7dab164 JS |
5955 | spin_unlock_irqrestore(&phba->hbalock, iflags); |
5956 | ||
da0436e9 | 5957 | /* Now, handle all the async events */ |
e7dab164 | 5958 | spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags); |
da0436e9 | 5959 | while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) { |
da0436e9 JS |
5960 | list_remove_head(&phba->sli4_hba.sp_asynce_work_queue, |
5961 | cq_event, struct lpfc_cq_event, list); | |
e7dab164 JS |
5962 | spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, |
5963 | iflags); | |
5964 | ||
da0436e9 JS |
5965 | /* Process the asynchronous event */ |
5966 | switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) { | |
5967 | case LPFC_TRAILER_CODE_LINK: | |
5968 | lpfc_sli4_async_link_evt(phba, | |
5969 | &cq_event->cqe.acqe_link); | |
5970 | break; | |
5971 | case LPFC_TRAILER_CODE_FCOE: | |
70f3c073 | 5972 | lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip); |
da0436e9 JS |
5973 | break; |
5974 | case LPFC_TRAILER_CODE_DCBX: | |
5975 | lpfc_sli4_async_dcbx_evt(phba, | |
5976 | &cq_event->cqe.acqe_dcbx); | |
5977 | break; | |
b19a061a JS |
5978 | case LPFC_TRAILER_CODE_GRP5: |
5979 | lpfc_sli4_async_grp5_evt(phba, | |
5980 | &cq_event->cqe.acqe_grp5); | |
5981 | break; | |
70f3c073 JS |
5982 | case LPFC_TRAILER_CODE_FC: |
5983 | lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc); | |
5984 | break; | |
5985 | case LPFC_TRAILER_CODE_SLI: | |
5986 | lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli); | |
5987 | break; | |
da0436e9 | 5988 | default: |
372c187b DK |
5989 | lpfc_printf_log(phba, KERN_ERR, |
5990 | LOG_TRACE_EVENT, | |
291c2548 | 5991 | "1804 Invalid asynchronous event code: " |
da0436e9 JS |
5992 | "x%x\n", bf_get(lpfc_trailer_code, |
5993 | &cq_event->cqe.mcqe_cmpl)); | |
5994 | break; | |
5995 | } | |
e7dab164 | 5996 | |
da0436e9 JS |
5997 | /* Free the completion event processed to the free pool */ |
5998 | lpfc_sli4_cq_event_release(phba, cq_event); | |
e7dab164 | 5999 | spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags); |
da0436e9 | 6000 | } |
e7dab164 | 6001 | spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags); |
da0436e9 JS |
6002 | } |
6003 | ||
ecfd03c6 JS |
6004 | /** |
6005 | * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event | |
6006 | * @phba: pointer to lpfc hba data structure. | |
6007 | * | |
6008 | * This routine is invoked by the worker thread to process FCF table | |
6009 | * rediscovery pending completion event. | |
6010 | **/ | |
6011 | void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba) | |
6012 | { | |
6013 | int rc; | |
6014 | ||
6015 | spin_lock_irq(&phba->hbalock); | |
6016 | /* Clear FCF rediscovery timeout event */ | |
6017 | phba->fcf.fcf_flag &= ~FCF_REDISC_EVT; | |
6018 | /* Clear driver fast failover FCF record flag */ | |
6019 | phba->fcf.failover_rec.flag = 0; | |
6020 | /* Set state for FCF fast failover */ | |
6021 | phba->fcf.fcf_flag |= FCF_REDISC_FOV; | |
6022 | spin_unlock_irq(&phba->hbalock); | |
6023 | ||
6024 | /* Scan FCF table from the first entry to re-discover SAN */ | |
0c9ab6f5 | 6025 | lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, |
a93ff37a | 6026 | "2777 Start post-quiescent FCF table scan\n"); |
0c9ab6f5 | 6027 | rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST); |
ecfd03c6 | 6028 | if (rc) |
372c187b | 6029 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
0c9ab6f5 JS |
6030 | "2747 Issue FCF scan read FCF mailbox " |
6031 | "command failed 0x%x\n", rc); | |
ecfd03c6 JS |
6032 | } |
6033 | ||
da0436e9 JS |
6034 | /** |
6035 | * lpfc_api_table_setup - Set up per hba pci-device group func api jump table | |
6036 | * @phba: pointer to lpfc hba data structure. | |
6037 | * @dev_grp: The HBA PCI-Device group number. | |
6038 | * | |
6039 | * This routine is invoked to set up the per HBA PCI-Device group function | |
6040 | * API jump table entries. | |
6041 | * | |
6042 | * Return: 0 if success, otherwise -ENODEV | |
6043 | **/ | |
6044 | int | |
6045 | lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp) | |
6046 | { | |
6047 | int rc; | |
6048 | ||
6049 | /* Set up lpfc PCI-device group */ | |
6050 | phba->pci_dev_grp = dev_grp; | |
6051 | ||
6052 | /* The LPFC_PCI_DEV_OC uses SLI4 */ | |
6053 | if (dev_grp == LPFC_PCI_DEV_OC) | |
6054 | phba->sli_rev = LPFC_SLI_REV4; | |
6055 | ||
6056 | /* Set up device INIT API function jump table */ | |
6057 | rc = lpfc_init_api_table_setup(phba, dev_grp); | |
6058 | if (rc) | |
6059 | return -ENODEV; | |
6060 | /* Set up SCSI API function jump table */ | |
6061 | rc = lpfc_scsi_api_table_setup(phba, dev_grp); | |
6062 | if (rc) | |
6063 | return -ENODEV; | |
6064 | /* Set up SLI API function jump table */ | |
6065 | rc = lpfc_sli_api_table_setup(phba, dev_grp); | |
6066 | if (rc) | |
6067 | return -ENODEV; | |
6068 | /* Set up MBOX API function jump table */ | |
6069 | rc = lpfc_mbox_api_table_setup(phba, dev_grp); | |
6070 | if (rc) | |
6071 | return -ENODEV; | |
6072 | ||
6073 | return 0; | |
5b75da2f JS |
6074 | } |
6075 | ||
6076 | /** | |
3621a710 | 6077 | * lpfc_log_intr_mode - Log the active interrupt mode |
5b75da2f JS |
6078 | * @phba: pointer to lpfc hba data structure. |
6079 | * @intr_mode: active interrupt mode adopted. | |
6080 | * | |
6081 | * This routine it invoked to log the currently used active interrupt mode | |
6082 | * to the device. | |
3772a991 JS |
6083 | **/ |
6084 | static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode) | |
5b75da2f JS |
6085 | { |
6086 | switch (intr_mode) { | |
6087 | case 0: | |
6088 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
6089 | "0470 Enable INTx interrupt mode.\n"); | |
6090 | break; | |
6091 | case 1: | |
6092 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
6093 | "0481 Enabled MSI interrupt mode.\n"); | |
6094 | break; | |
6095 | case 2: | |
6096 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
6097 | "0480 Enabled MSI-X interrupt mode.\n"); | |
6098 | break; | |
6099 | default: | |
372c187b | 6100 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
5b75da2f JS |
6101 | "0482 Illegal interrupt mode.\n"); |
6102 | break; | |
6103 | } | |
6104 | return; | |
6105 | } | |
6106 | ||
5b75da2f | 6107 | /** |
3772a991 | 6108 | * lpfc_enable_pci_dev - Enable a generic PCI device. |
5b75da2f JS |
6109 | * @phba: pointer to lpfc hba data structure. |
6110 | * | |
3772a991 JS |
6111 | * This routine is invoked to enable the PCI device that is common to all |
6112 | * PCI devices. | |
5b75da2f JS |
6113 | * |
6114 | * Return codes | |
af901ca1 | 6115 | * 0 - successful |
3772a991 | 6116 | * other values - error |
5b75da2f | 6117 | **/ |
3772a991 JS |
6118 | static int |
6119 | lpfc_enable_pci_dev(struct lpfc_hba *phba) | |
5b75da2f | 6120 | { |
3772a991 | 6121 | struct pci_dev *pdev; |
5b75da2f | 6122 | |
3772a991 JS |
6123 | /* Obtain PCI device reference */ |
6124 | if (!phba->pcidev) | |
6125 | goto out_error; | |
6126 | else | |
6127 | pdev = phba->pcidev; | |
3772a991 JS |
6128 | /* Enable PCI device */ |
6129 | if (pci_enable_device_mem(pdev)) | |
6130 | goto out_error; | |
6131 | /* Request PCI resource for the device */ | |
e0c0483c | 6132 | if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME)) |
3772a991 JS |
6133 | goto out_disable_device; |
6134 | /* Set up device as PCI master and save state for EEH */ | |
6135 | pci_set_master(pdev); | |
6136 | pci_try_set_mwi(pdev); | |
6137 | pci_save_state(pdev); | |
5b75da2f | 6138 | |
0558056c | 6139 | /* PCIe EEH recovery on powerpc platforms needs fundamental reset */ |
453193e0 | 6140 | if (pci_is_pcie(pdev)) |
0558056c JS |
6141 | pdev->needs_freset = 1; |
6142 | ||
3772a991 | 6143 | return 0; |
5b75da2f | 6144 | |
3772a991 JS |
6145 | out_disable_device: |
6146 | pci_disable_device(pdev); | |
6147 | out_error: | |
372c187b | 6148 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
e0c0483c | 6149 | "1401 Failed to enable pci device\n"); |
3772a991 | 6150 | return -ENODEV; |
5b75da2f JS |
6151 | } |
6152 | ||
6153 | /** | |
3772a991 | 6154 | * lpfc_disable_pci_dev - Disable a generic PCI device. |
5b75da2f JS |
6155 | * @phba: pointer to lpfc hba data structure. |
6156 | * | |
3772a991 JS |
6157 | * This routine is invoked to disable the PCI device that is common to all |
6158 | * PCI devices. | |
5b75da2f JS |
6159 | **/ |
6160 | static void | |
3772a991 | 6161 | lpfc_disable_pci_dev(struct lpfc_hba *phba) |
5b75da2f | 6162 | { |
3772a991 | 6163 | struct pci_dev *pdev; |
5b75da2f | 6164 | |
3772a991 JS |
6165 | /* Obtain PCI device reference */ |
6166 | if (!phba->pcidev) | |
6167 | return; | |
6168 | else | |
6169 | pdev = phba->pcidev; | |
3772a991 | 6170 | /* Release PCI resource and disable PCI device */ |
e0c0483c | 6171 | pci_release_mem_regions(pdev); |
3772a991 | 6172 | pci_disable_device(pdev); |
5b75da2f JS |
6173 | |
6174 | return; | |
6175 | } | |
6176 | ||
e59058c4 | 6177 | /** |
3772a991 JS |
6178 | * lpfc_reset_hba - Reset a hba |
6179 | * @phba: pointer to lpfc hba data structure. | |
e59058c4 | 6180 | * |
3772a991 JS |
6181 | * This routine is invoked to reset a hba device. It brings the HBA |
6182 | * offline, performs a board restart, and then brings the board back | |
6183 | * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up | |
6184 | * on outstanding mailbox commands. | |
e59058c4 | 6185 | **/ |
3772a991 JS |
6186 | void |
6187 | lpfc_reset_hba(struct lpfc_hba *phba) | |
dea3101e | 6188 | { |
3772a991 JS |
6189 | /* If resets are disabled then set error state and return. */ |
6190 | if (!phba->cfg_enable_hba_reset) { | |
6191 | phba->link_state = LPFC_HBA_ERROR; | |
6192 | return; | |
6193 | } | |
ee62021a JS |
6194 | if (phba->sli.sli_flag & LPFC_SLI_ACTIVE) |
6195 | lpfc_offline_prep(phba, LPFC_MBX_WAIT); | |
6196 | else | |
6197 | lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); | |
3772a991 JS |
6198 | lpfc_offline(phba); |
6199 | lpfc_sli_brdrestart(phba); | |
6200 | lpfc_online(phba); | |
6201 | lpfc_unblock_mgmt_io(phba); | |
6202 | } | |
dea3101e | 6203 | |
0a96e975 JS |
6204 | /** |
6205 | * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions | |
6206 | * @phba: pointer to lpfc hba data structure. | |
6207 | * | |
6208 | * This function enables the PCI SR-IOV virtual functions to a physical | |
6209 | * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to | |
6210 | * enable the number of virtual functions to the physical function. As | |
6211 | * not all devices support SR-IOV, the return code from the pci_enable_sriov() | |
6212 | * API call does not considered as an error condition for most of the device. | |
6213 | **/ | |
6214 | uint16_t | |
6215 | lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba) | |
6216 | { | |
6217 | struct pci_dev *pdev = phba->pcidev; | |
6218 | uint16_t nr_virtfn; | |
6219 | int pos; | |
6220 | ||
0a96e975 JS |
6221 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); |
6222 | if (pos == 0) | |
6223 | return 0; | |
6224 | ||
6225 | pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn); | |
6226 | return nr_virtfn; | |
6227 | } | |
6228 | ||
912e3acd JS |
6229 | /** |
6230 | * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions | |
6231 | * @phba: pointer to lpfc hba data structure. | |
6232 | * @nr_vfn: number of virtual functions to be enabled. | |
6233 | * | |
6234 | * This function enables the PCI SR-IOV virtual functions to a physical | |
6235 | * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to | |
6236 | * enable the number of virtual functions to the physical function. As | |
6237 | * not all devices support SR-IOV, the return code from the pci_enable_sriov() | |
6238 | * API call does not considered as an error condition for most of the device. | |
6239 | **/ | |
6240 | int | |
6241 | lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn) | |
6242 | { | |
6243 | struct pci_dev *pdev = phba->pcidev; | |
0a96e975 | 6244 | uint16_t max_nr_vfn; |
912e3acd JS |
6245 | int rc; |
6246 | ||
0a96e975 JS |
6247 | max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba); |
6248 | if (nr_vfn > max_nr_vfn) { | |
372c187b | 6249 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
0a96e975 JS |
6250 | "3057 Requested vfs (%d) greater than " |
6251 | "supported vfs (%d)", nr_vfn, max_nr_vfn); | |
6252 | return -EINVAL; | |
6253 | } | |
6254 | ||
912e3acd JS |
6255 | rc = pci_enable_sriov(pdev, nr_vfn); |
6256 | if (rc) { | |
6257 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
6258 | "2806 Failed to enable sriov on this device " | |
6259 | "with vfn number nr_vf:%d, rc:%d\n", | |
6260 | nr_vfn, rc); | |
6261 | } else | |
6262 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
6263 | "2807 Successful enable sriov on this device " | |
6264 | "with vfn number nr_vf:%d\n", nr_vfn); | |
6265 | return rc; | |
6266 | } | |
6267 | ||
3772a991 | 6268 | /** |
895427bd | 6269 | * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources. |
3772a991 JS |
6270 | * @phba: pointer to lpfc hba data structure. |
6271 | * | |
895427bd JS |
6272 | * This routine is invoked to set up the driver internal resources before the |
6273 | * device specific resource setup to support the HBA device it attached to. | |
3772a991 JS |
6274 | * |
6275 | * Return codes | |
895427bd JS |
6276 | * 0 - successful |
6277 | * other values - error | |
3772a991 JS |
6278 | **/ |
6279 | static int | |
895427bd | 6280 | lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba) |
3772a991 | 6281 | { |
895427bd | 6282 | struct lpfc_sli *psli = &phba->sli; |
dea3101e | 6283 | |
2e0fef85 | 6284 | /* |
895427bd | 6285 | * Driver resources common to all SLI revisions |
2e0fef85 | 6286 | */ |
895427bd | 6287 | atomic_set(&phba->fast_event_count, 0); |
372c187b DK |
6288 | atomic_set(&phba->dbg_log_idx, 0); |
6289 | atomic_set(&phba->dbg_log_cnt, 0); | |
6290 | atomic_set(&phba->dbg_log_dmping, 0); | |
895427bd | 6291 | spin_lock_init(&phba->hbalock); |
dea3101e | 6292 | |
523128e5 JS |
6293 | /* Initialize port_list spinlock */ |
6294 | spin_lock_init(&phba->port_list_lock); | |
895427bd | 6295 | INIT_LIST_HEAD(&phba->port_list); |
523128e5 | 6296 | |
895427bd JS |
6297 | INIT_LIST_HEAD(&phba->work_list); |
6298 | init_waitqueue_head(&phba->wait_4_mlo_m_q); | |
6299 | ||
6300 | /* Initialize the wait queue head for the kernel thread */ | |
6301 | init_waitqueue_head(&phba->work_waitq); | |
6302 | ||
6303 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
f358dd0c | 6304 | "1403 Protocols supported %s %s %s\n", |
895427bd JS |
6305 | ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ? |
6306 | "SCSI" : " "), | |
6307 | ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ? | |
f358dd0c JS |
6308 | "NVME" : " "), |
6309 | (phba->nvmet_support ? "NVMET" : " ")); | |
895427bd | 6310 | |
0794d601 JS |
6311 | /* Initialize the IO buffer list used by driver for SLI3 SCSI */ |
6312 | spin_lock_init(&phba->scsi_buf_list_get_lock); | |
6313 | INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get); | |
6314 | spin_lock_init(&phba->scsi_buf_list_put_lock); | |
6315 | INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put); | |
895427bd JS |
6316 | |
6317 | /* Initialize the fabric iocb list */ | |
6318 | INIT_LIST_HEAD(&phba->fabric_iocb_list); | |
6319 | ||
6320 | /* Initialize list to save ELS buffers */ | |
6321 | INIT_LIST_HEAD(&phba->elsbuf); | |
6322 | ||
6323 | /* Initialize FCF connection rec list */ | |
6324 | INIT_LIST_HEAD(&phba->fcf_conn_rec_list); | |
6325 | ||
6326 | /* Initialize OAS configuration list */ | |
6327 | spin_lock_init(&phba->devicelock); | |
6328 | INIT_LIST_HEAD(&phba->luns); | |
858c9f6c | 6329 | |
3772a991 | 6330 | /* MBOX heartbeat timer */ |
f22eb4d3 | 6331 | timer_setup(&psli->mbox_tmo, lpfc_mbox_timeout, 0); |
3772a991 | 6332 | /* Fabric block timer */ |
f22eb4d3 | 6333 | timer_setup(&phba->fabric_block_timer, lpfc_fabric_block_timeout, 0); |
3772a991 | 6334 | /* EA polling mode timer */ |
f22eb4d3 | 6335 | timer_setup(&phba->eratt_poll, lpfc_poll_eratt, 0); |
895427bd | 6336 | /* Heartbeat timer */ |
f22eb4d3 | 6337 | timer_setup(&phba->hb_tmofunc, lpfc_hb_timeout, 0); |
895427bd | 6338 | |
32517fc0 JS |
6339 | INIT_DELAYED_WORK(&phba->eq_delay_work, lpfc_hb_eq_delay_work); |
6340 | ||
317aeb83 DK |
6341 | INIT_DELAYED_WORK(&phba->idle_stat_delay_work, |
6342 | lpfc_idle_stat_delay_work); | |
6343 | ||
895427bd JS |
6344 | return 0; |
6345 | } | |
6346 | ||
6347 | /** | |
6348 | * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev | |
6349 | * @phba: pointer to lpfc hba data structure. | |
6350 | * | |
6351 | * This routine is invoked to set up the driver internal resources specific to | |
6352 | * support the SLI-3 HBA device it attached to. | |
6353 | * | |
6354 | * Return codes | |
6355 | * 0 - successful | |
6356 | * other values - error | |
6357 | **/ | |
6358 | static int | |
6359 | lpfc_sli_driver_resource_setup(struct lpfc_hba *phba) | |
6360 | { | |
0794d601 | 6361 | int rc, entry_sz; |
895427bd JS |
6362 | |
6363 | /* | |
6364 | * Initialize timers used by driver | |
6365 | */ | |
6366 | ||
6367 | /* FCP polling mode timer */ | |
f22eb4d3 | 6368 | timer_setup(&phba->fcp_poll_timer, lpfc_poll_timeout, 0); |
dea3101e | 6369 | |
3772a991 JS |
6370 | /* Host attention work mask setup */ |
6371 | phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT); | |
6372 | phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4)); | |
dea3101e | 6373 | |
3772a991 JS |
6374 | /* Get all the module params for configuring this host */ |
6375 | lpfc_get_cfgparam(phba); | |
895427bd JS |
6376 | /* Set up phase-1 common device driver resources */ |
6377 | ||
6378 | rc = lpfc_setup_driver_resource_phase1(phba); | |
6379 | if (rc) | |
6380 | return -ENODEV; | |
6381 | ||
49198b37 JS |
6382 | if (phba->pcidev->device == PCI_DEVICE_ID_HORNET) { |
6383 | phba->menlo_flag |= HBA_MENLO_SUPPORT; | |
6384 | /* check for menlo minimum sg count */ | |
6385 | if (phba->cfg_sg_seg_cnt < LPFC_DEFAULT_MENLO_SG_SEG_CNT) | |
6386 | phba->cfg_sg_seg_cnt = LPFC_DEFAULT_MENLO_SG_SEG_CNT; | |
6387 | } | |
6388 | ||
895427bd | 6389 | if (!phba->sli.sli3_ring) |
6396bb22 KC |
6390 | phba->sli.sli3_ring = kcalloc(LPFC_SLI3_MAX_RING, |
6391 | sizeof(struct lpfc_sli_ring), | |
6392 | GFP_KERNEL); | |
895427bd | 6393 | if (!phba->sli.sli3_ring) |
2a76a283 JS |
6394 | return -ENOMEM; |
6395 | ||
dea3101e | 6396 | /* |
96f7077f | 6397 | * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size |
3772a991 | 6398 | * used to create the sg_dma_buf_pool must be dynamically calculated. |
dea3101e | 6399 | */ |
3772a991 | 6400 | |
0794d601 JS |
6401 | if (phba->sli_rev == LPFC_SLI_REV4) |
6402 | entry_sz = sizeof(struct sli4_sge); | |
6403 | else | |
6404 | entry_sz = sizeof(struct ulp_bde64); | |
6405 | ||
96f7077f | 6406 | /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */ |
3772a991 | 6407 | if (phba->cfg_enable_bg) { |
96f7077f JS |
6408 | /* |
6409 | * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd, | |
6410 | * the FCP rsp, and a BDE for each. Sice we have no control | |
6411 | * over how many protection data segments the SCSI Layer | |
6412 | * will hand us (ie: there could be one for every block | |
6413 | * in the IO), we just allocate enough BDEs to accomidate | |
6414 | * our max amount and we need to limit lpfc_sg_seg_cnt to | |
6415 | * minimize the risk of running out. | |
6416 | */ | |
6417 | phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + | |
6418 | sizeof(struct fcp_rsp) + | |
0794d601 | 6419 | (LPFC_MAX_SG_SEG_CNT * entry_sz); |
96f7077f JS |
6420 | |
6421 | if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF) | |
6422 | phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF; | |
6423 | ||
6424 | /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */ | |
6425 | phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT; | |
6426 | } else { | |
6427 | /* | |
6428 | * The scsi_buf for a regular I/O will hold the FCP cmnd, | |
6429 | * the FCP rsp, a BDE for each, and a BDE for up to | |
6430 | * cfg_sg_seg_cnt data segments. | |
6431 | */ | |
6432 | phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + | |
6433 | sizeof(struct fcp_rsp) + | |
0794d601 | 6434 | ((phba->cfg_sg_seg_cnt + 2) * entry_sz); |
96f7077f JS |
6435 | |
6436 | /* Total BDEs in BPL for scsi_sg_list */ | |
6437 | phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2; | |
901a920f | 6438 | } |
dea3101e | 6439 | |
96f7077f | 6440 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, |
c90b4480 | 6441 | "9088 INIT sg_tablesize:%d dmabuf_size:%d total_bde:%d\n", |
96f7077f JS |
6442 | phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size, |
6443 | phba->cfg_total_seg_cnt); | |
dea3101e | 6444 | |
3772a991 JS |
6445 | phba->max_vpi = LPFC_MAX_VPI; |
6446 | /* This will be set to correct value after config_port mbox */ | |
6447 | phba->max_vports = 0; | |
dea3101e | 6448 | |
3772a991 JS |
6449 | /* |
6450 | * Initialize the SLI Layer to run with lpfc HBAs. | |
6451 | */ | |
6452 | lpfc_sli_setup(phba); | |
895427bd | 6453 | lpfc_sli_queue_init(phba); |
ed957684 | 6454 | |
3772a991 JS |
6455 | /* Allocate device driver memory */ |
6456 | if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ)) | |
6457 | return -ENOMEM; | |
51ef4c26 | 6458 | |
d79c9e9d JS |
6459 | phba->lpfc_sg_dma_buf_pool = |
6460 | dma_pool_create("lpfc_sg_dma_buf_pool", | |
6461 | &phba->pcidev->dev, phba->cfg_sg_dma_buf_size, | |
6462 | BPL_ALIGN_SZ, 0); | |
6463 | ||
6464 | if (!phba->lpfc_sg_dma_buf_pool) | |
6465 | goto fail_free_mem; | |
6466 | ||
6467 | phba->lpfc_cmd_rsp_buf_pool = | |
6468 | dma_pool_create("lpfc_cmd_rsp_buf_pool", | |
6469 | &phba->pcidev->dev, | |
6470 | sizeof(struct fcp_cmnd) + | |
6471 | sizeof(struct fcp_rsp), | |
6472 | BPL_ALIGN_SZ, 0); | |
6473 | ||
6474 | if (!phba->lpfc_cmd_rsp_buf_pool) | |
6475 | goto fail_free_dma_buf_pool; | |
6476 | ||
912e3acd JS |
6477 | /* |
6478 | * Enable sr-iov virtual functions if supported and configured | |
6479 | * through the module parameter. | |
6480 | */ | |
6481 | if (phba->cfg_sriov_nr_virtfn > 0) { | |
6482 | rc = lpfc_sli_probe_sriov_nr_virtfn(phba, | |
6483 | phba->cfg_sriov_nr_virtfn); | |
6484 | if (rc) { | |
6485 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
6486 | "2808 Requested number of SR-IOV " | |
6487 | "virtual functions (%d) is not " | |
6488 | "supported\n", | |
6489 | phba->cfg_sriov_nr_virtfn); | |
6490 | phba->cfg_sriov_nr_virtfn = 0; | |
6491 | } | |
6492 | } | |
6493 | ||
3772a991 | 6494 | return 0; |
d79c9e9d JS |
6495 | |
6496 | fail_free_dma_buf_pool: | |
6497 | dma_pool_destroy(phba->lpfc_sg_dma_buf_pool); | |
6498 | phba->lpfc_sg_dma_buf_pool = NULL; | |
6499 | fail_free_mem: | |
6500 | lpfc_mem_free(phba); | |
6501 | return -ENOMEM; | |
3772a991 | 6502 | } |
ed957684 | 6503 | |
3772a991 JS |
6504 | /** |
6505 | * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev | |
6506 | * @phba: pointer to lpfc hba data structure. | |
6507 | * | |
6508 | * This routine is invoked to unset the driver internal resources set up | |
6509 | * specific for supporting the SLI-3 HBA device it attached to. | |
6510 | **/ | |
6511 | static void | |
6512 | lpfc_sli_driver_resource_unset(struct lpfc_hba *phba) | |
6513 | { | |
6514 | /* Free device driver memory allocated */ | |
6515 | lpfc_mem_free_all(phba); | |
3163f725 | 6516 | |
3772a991 JS |
6517 | return; |
6518 | } | |
dea3101e | 6519 | |
3772a991 | 6520 | /** |
da0436e9 | 6521 | * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev |
3772a991 JS |
6522 | * @phba: pointer to lpfc hba data structure. |
6523 | * | |
da0436e9 JS |
6524 | * This routine is invoked to set up the driver internal resources specific to |
6525 | * support the SLI-4 HBA device it attached to. | |
3772a991 JS |
6526 | * |
6527 | * Return codes | |
af901ca1 | 6528 | * 0 - successful |
da0436e9 | 6529 | * other values - error |
3772a991 JS |
6530 | **/ |
6531 | static int | |
da0436e9 | 6532 | lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba) |
3772a991 | 6533 | { |
28baac74 | 6534 | LPFC_MBOXQ_t *mboxq; |
f358dd0c | 6535 | MAILBOX_t *mb; |
895427bd | 6536 | int rc, i, max_buf_size; |
28baac74 JS |
6537 | uint8_t pn_page[LPFC_MAX_SUPPORTED_PAGES] = {0}; |
6538 | struct lpfc_mqe *mqe; | |
09294d46 | 6539 | int longs; |
81e6a637 | 6540 | int extra; |
f358dd0c | 6541 | uint64_t wwn; |
b92dc72d JS |
6542 | u32 if_type; |
6543 | u32 if_fam; | |
da0436e9 | 6544 | |
895427bd | 6545 | phba->sli4_hba.num_present_cpu = lpfc_present_cpu; |
eede4970 | 6546 | phba->sli4_hba.num_possible_cpu = cpumask_last(cpu_possible_mask) + 1; |
895427bd JS |
6547 | phba->sli4_hba.curr_disp_cpu = 0; |
6548 | ||
716d3bc5 JS |
6549 | /* Get all the module params for configuring this host */ |
6550 | lpfc_get_cfgparam(phba); | |
6551 | ||
895427bd JS |
6552 | /* Set up phase-1 common device driver resources */ |
6553 | rc = lpfc_setup_driver_resource_phase1(phba); | |
6554 | if (rc) | |
6555 | return -ENODEV; | |
6556 | ||
da0436e9 JS |
6557 | /* Before proceed, wait for POST done and device ready */ |
6558 | rc = lpfc_sli4_post_status_check(phba); | |
6559 | if (rc) | |
6560 | return -ENODEV; | |
6561 | ||
3cee98db JS |
6562 | /* Allocate all driver workqueues here */ |
6563 | ||
6564 | /* The lpfc_wq workqueue for deferred irq use */ | |
6565 | phba->wq = alloc_workqueue("lpfc_wq", WQ_MEM_RECLAIM, 0); | |
6566 | ||
3772a991 | 6567 | /* |
da0436e9 | 6568 | * Initialize timers used by driver |
3772a991 | 6569 | */ |
3772a991 | 6570 | |
f22eb4d3 | 6571 | timer_setup(&phba->rrq_tmr, lpfc_rrq_timeout, 0); |
3772a991 | 6572 | |
ecfd03c6 | 6573 | /* FCF rediscover timer */ |
f22eb4d3 | 6574 | timer_setup(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo, 0); |
ecfd03c6 | 6575 | |
7ad20aa9 JS |
6576 | /* |
6577 | * Control structure for handling external multi-buffer mailbox | |
6578 | * command pass-through. | |
6579 | */ | |
6580 | memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0, | |
6581 | sizeof(struct lpfc_mbox_ext_buf_ctx)); | |
6582 | INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list); | |
6583 | ||
da0436e9 | 6584 | phba->max_vpi = LPFC_MAX_VPI; |
67d12733 | 6585 | |
da0436e9 JS |
6586 | /* This will be set to correct value after the read_config mbox */ |
6587 | phba->max_vports = 0; | |
3772a991 | 6588 | |
da0436e9 JS |
6589 | /* Program the default value of vlan_id and fc_map */ |
6590 | phba->valid_vlan = 0; | |
6591 | phba->fc_map[0] = LPFC_FCOE_FCF_MAP0; | |
6592 | phba->fc_map[1] = LPFC_FCOE_FCF_MAP1; | |
6593 | phba->fc_map[2] = LPFC_FCOE_FCF_MAP2; | |
3772a991 | 6594 | |
2a76a283 JS |
6595 | /* |
6596 | * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands | |
895427bd JS |
6597 | * we will associate a new ring, for each EQ/CQ/WQ tuple. |
6598 | * The WQ create will allocate the ring. | |
2a76a283 | 6599 | */ |
09294d46 | 6600 | |
da0436e9 | 6601 | /* Initialize buffer queue management fields */ |
895427bd | 6602 | INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list); |
da0436e9 JS |
6603 | phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc; |
6604 | phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free; | |
3772a991 | 6605 | |
da0436e9 JS |
6606 | /* |
6607 | * Initialize the SLI Layer to run with lpfc SLI4 HBAs. | |
6608 | */ | |
c00f62e6 JS |
6609 | /* Initialize the Abort buffer list used by driver */ |
6610 | spin_lock_init(&phba->sli4_hba.abts_io_buf_list_lock); | |
6611 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_io_buf_list); | |
895427bd JS |
6612 | |
6613 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
6614 | /* Initialize the Abort nvme buffer list used by driver */ | |
5e5b511d | 6615 | spin_lock_init(&phba->sli4_hba.abts_nvmet_buf_list_lock); |
86c67379 | 6616 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); |
a8cf5dfe | 6617 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list); |
79d8c4ce JS |
6618 | spin_lock_init(&phba->sli4_hba.t_active_list_lock); |
6619 | INIT_LIST_HEAD(&phba->sli4_hba.t_active_ctx_list); | |
895427bd JS |
6620 | } |
6621 | ||
da0436e9 | 6622 | /* This abort list used by worker thread */ |
895427bd | 6623 | spin_lock_init(&phba->sli4_hba.sgl_list_lock); |
a8cf5dfe | 6624 | spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock); |
e7dab164 JS |
6625 | spin_lock_init(&phba->sli4_hba.asynce_list_lock); |
6626 | spin_lock_init(&phba->sli4_hba.els_xri_abrt_list_lock); | |
3772a991 | 6627 | |
da0436e9 | 6628 | /* |
6d368e53 | 6629 | * Initialize driver internal slow-path work queues |
da0436e9 | 6630 | */ |
3772a991 | 6631 | |
da0436e9 JS |
6632 | /* Driver internel slow-path CQ Event pool */ |
6633 | INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool); | |
6634 | /* Response IOCB work queue list */ | |
45ed1190 | 6635 | INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event); |
da0436e9 JS |
6636 | /* Asynchronous event CQ Event work queue list */ |
6637 | INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue); | |
da0436e9 JS |
6638 | /* Slow-path XRI aborted CQ Event work queue list */ |
6639 | INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue); | |
6640 | /* Receive queue CQ Event work queue list */ | |
6641 | INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue); | |
6642 | ||
6d368e53 JS |
6643 | /* Initialize extent block lists. */ |
6644 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list); | |
6645 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list); | |
6646 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list); | |
6647 | INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list); | |
6648 | ||
d1f525aa JS |
6649 | /* Initialize mboxq lists. If the early init routines fail |
6650 | * these lists need to be correctly initialized. | |
6651 | */ | |
6652 | INIT_LIST_HEAD(&phba->sli.mboxq); | |
6653 | INIT_LIST_HEAD(&phba->sli.mboxq_cmpl); | |
6654 | ||
448193b5 JS |
6655 | /* initialize optic_state to 0xFF */ |
6656 | phba->sli4_hba.lnk_info.optic_state = 0xff; | |
6657 | ||
da0436e9 JS |
6658 | /* Allocate device driver memory */ |
6659 | rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ); | |
6660 | if (rc) | |
6661 | return -ENOMEM; | |
6662 | ||
2fcee4bf | 6663 | /* IF Type 2 ports get initialized now. */ |
27d6ac0a | 6664 | if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >= |
2fcee4bf JS |
6665 | LPFC_SLI_INTF_IF_TYPE_2) { |
6666 | rc = lpfc_pci_function_reset(phba); | |
895427bd JS |
6667 | if (unlikely(rc)) { |
6668 | rc = -ENODEV; | |
6669 | goto out_free_mem; | |
6670 | } | |
946727dc | 6671 | phba->temp_sensor_support = 1; |
2fcee4bf JS |
6672 | } |
6673 | ||
da0436e9 JS |
6674 | /* Create the bootstrap mailbox command */ |
6675 | rc = lpfc_create_bootstrap_mbox(phba); | |
6676 | if (unlikely(rc)) | |
6677 | goto out_free_mem; | |
6678 | ||
6679 | /* Set up the host's endian order with the device. */ | |
6680 | rc = lpfc_setup_endian_order(phba); | |
6681 | if (unlikely(rc)) | |
6682 | goto out_free_bsmbx; | |
6683 | ||
6684 | /* Set up the hba's configuration parameters. */ | |
6685 | rc = lpfc_sli4_read_config(phba); | |
cff261f6 JS |
6686 | if (unlikely(rc)) |
6687 | goto out_free_bsmbx; | |
6688 | rc = lpfc_mem_alloc_active_rrq_pool_s4(phba); | |
da0436e9 JS |
6689 | if (unlikely(rc)) |
6690 | goto out_free_bsmbx; | |
6691 | ||
2fcee4bf JS |
6692 | /* IF Type 0 ports get initialized now. */ |
6693 | if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == | |
6694 | LPFC_SLI_INTF_IF_TYPE_0) { | |
6695 | rc = lpfc_pci_function_reset(phba); | |
6696 | if (unlikely(rc)) | |
6697 | goto out_free_bsmbx; | |
6698 | } | |
da0436e9 | 6699 | |
cb5172ea JS |
6700 | mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, |
6701 | GFP_KERNEL); | |
6702 | if (!mboxq) { | |
6703 | rc = -ENOMEM; | |
6704 | goto out_free_bsmbx; | |
6705 | } | |
6706 | ||
f358dd0c | 6707 | /* Check for NVMET being configured */ |
895427bd | 6708 | phba->nvmet_support = 0; |
f358dd0c JS |
6709 | if (lpfc_enable_nvmet_cnt) { |
6710 | ||
6711 | /* First get WWN of HBA instance */ | |
6712 | lpfc_read_nv(phba, mboxq); | |
6713 | rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
6714 | if (rc != MBX_SUCCESS) { | |
372c187b DK |
6715 | lpfc_printf_log(phba, KERN_ERR, |
6716 | LOG_TRACE_EVENT, | |
f358dd0c JS |
6717 | "6016 Mailbox failed , mbxCmd x%x " |
6718 | "READ_NV, mbxStatus x%x\n", | |
6719 | bf_get(lpfc_mqe_command, &mboxq->u.mqe), | |
6720 | bf_get(lpfc_mqe_status, &mboxq->u.mqe)); | |
d1f525aa | 6721 | mempool_free(mboxq, phba->mbox_mem_pool); |
f358dd0c JS |
6722 | rc = -EIO; |
6723 | goto out_free_bsmbx; | |
6724 | } | |
6725 | mb = &mboxq->u.mb; | |
6726 | memcpy(&wwn, (char *)mb->un.varRDnvp.nodename, | |
6727 | sizeof(uint64_t)); | |
6728 | wwn = cpu_to_be64(wwn); | |
6729 | phba->sli4_hba.wwnn.u.name = wwn; | |
6730 | memcpy(&wwn, (char *)mb->un.varRDnvp.portname, | |
6731 | sizeof(uint64_t)); | |
6732 | /* wwn is WWPN of HBA instance */ | |
6733 | wwn = cpu_to_be64(wwn); | |
6734 | phba->sli4_hba.wwpn.u.name = wwn; | |
6735 | ||
6736 | /* Check to see if it matches any module parameter */ | |
6737 | for (i = 0; i < lpfc_enable_nvmet_cnt; i++) { | |
6738 | if (wwn == lpfc_enable_nvmet[i]) { | |
7d708033 | 6739 | #if (IS_ENABLED(CONFIG_NVME_TARGET_FC)) |
3c603be9 JS |
6740 | if (lpfc_nvmet_mem_alloc(phba)) |
6741 | break; | |
6742 | ||
6743 | phba->nvmet_support = 1; /* a match */ | |
6744 | ||
372c187b DK |
6745 | lpfc_printf_log(phba, KERN_ERR, |
6746 | LOG_TRACE_EVENT, | |
f358dd0c JS |
6747 | "6017 NVME Target %016llx\n", |
6748 | wwn); | |
7d708033 | 6749 | #else |
372c187b DK |
6750 | lpfc_printf_log(phba, KERN_ERR, |
6751 | LOG_TRACE_EVENT, | |
7d708033 JS |
6752 | "6021 Can't enable NVME Target." |
6753 | " NVME_TARGET_FC infrastructure" | |
6754 | " is not in kernel\n"); | |
6755 | #endif | |
c490850a JS |
6756 | /* Not supported for NVMET */ |
6757 | phba->cfg_xri_rebalancing = 0; | |
3048e3e8 DK |
6758 | if (phba->irq_chann_mode == NHT_MODE) { |
6759 | phba->cfg_irq_chann = | |
6760 | phba->sli4_hba.num_present_cpu; | |
6761 | phba->cfg_hdw_queue = | |
6762 | phba->sli4_hba.num_present_cpu; | |
6763 | phba->irq_chann_mode = NORMAL_MODE; | |
6764 | } | |
3c603be9 | 6765 | break; |
f358dd0c JS |
6766 | } |
6767 | } | |
6768 | } | |
895427bd JS |
6769 | |
6770 | lpfc_nvme_mod_param_dep(phba); | |
6771 | ||
fedd3b7b | 6772 | /* Get the Supported Pages if PORT_CAPABILITIES is supported by port. */ |
cb5172ea JS |
6773 | lpfc_supported_pages(mboxq); |
6774 | rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
fedd3b7b JS |
6775 | if (!rc) { |
6776 | mqe = &mboxq->u.mqe; | |
6777 | memcpy(&pn_page[0], ((uint8_t *)&mqe->un.supp_pages.word3), | |
6778 | LPFC_MAX_SUPPORTED_PAGES); | |
6779 | for (i = 0; i < LPFC_MAX_SUPPORTED_PAGES; i++) { | |
6780 | switch (pn_page[i]) { | |
6781 | case LPFC_SLI4_PARAMETERS: | |
6782 | phba->sli4_hba.pc_sli4_params.supported = 1; | |
6783 | break; | |
6784 | default: | |
6785 | break; | |
6786 | } | |
6787 | } | |
6788 | /* Read the port's SLI4 Parameters capabilities if supported. */ | |
6789 | if (phba->sli4_hba.pc_sli4_params.supported) | |
6790 | rc = lpfc_pc_sli4_params_get(phba, mboxq); | |
6791 | if (rc) { | |
6792 | mempool_free(mboxq, phba->mbox_mem_pool); | |
6793 | rc = -EIO; | |
6794 | goto out_free_bsmbx; | |
cb5172ea JS |
6795 | } |
6796 | } | |
65791f1f | 6797 | |
fedd3b7b JS |
6798 | /* |
6799 | * Get sli4 parameters that override parameters from Port capabilities. | |
6d368e53 JS |
6800 | * If this call fails, it isn't critical unless the SLI4 parameters come |
6801 | * back in conflict. | |
fedd3b7b | 6802 | */ |
6d368e53 JS |
6803 | rc = lpfc_get_sli4_parameters(phba, mboxq); |
6804 | if (rc) { | |
b92dc72d JS |
6805 | if_type = bf_get(lpfc_sli_intf_if_type, |
6806 | &phba->sli4_hba.sli_intf); | |
6807 | if_fam = bf_get(lpfc_sli_intf_sli_family, | |
6808 | &phba->sli4_hba.sli_intf); | |
6d368e53 JS |
6809 | if (phba->sli4_hba.extents_in_use && |
6810 | phba->sli4_hba.rpi_hdrs_in_use) { | |
372c187b DK |
6811 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
6812 | "2999 Unsupported SLI4 Parameters " | |
6813 | "Extents and RPI headers enabled.\n"); | |
b92dc72d JS |
6814 | if (if_type == LPFC_SLI_INTF_IF_TYPE_0 && |
6815 | if_fam == LPFC_SLI_INTF_FAMILY_BE2) { | |
6816 | mempool_free(mboxq, phba->mbox_mem_pool); | |
6817 | rc = -EIO; | |
6818 | goto out_free_bsmbx; | |
6819 | } | |
6820 | } | |
6821 | if (!(if_type == LPFC_SLI_INTF_IF_TYPE_0 && | |
6822 | if_fam == LPFC_SLI_INTF_FAMILY_BE2)) { | |
6823 | mempool_free(mboxq, phba->mbox_mem_pool); | |
6824 | rc = -EIO; | |
6825 | goto out_free_bsmbx; | |
6d368e53 JS |
6826 | } |
6827 | } | |
895427bd | 6828 | |
d79c9e9d JS |
6829 | /* |
6830 | * 1 for cmd, 1 for rsp, NVME adds an extra one | |
6831 | * for boundary conditions in its max_sgl_segment template. | |
6832 | */ | |
6833 | extra = 2; | |
6834 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) | |
6835 | extra++; | |
6836 | ||
6837 | /* | |
6838 | * It doesn't matter what family our adapter is in, we are | |
6839 | * limited to 2 Pages, 512 SGEs, for our SGL. | |
6840 | * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp | |
6841 | */ | |
6842 | max_buf_size = (2 * SLI4_PAGE_SIZE); | |
6843 | ||
6844 | /* | |
6845 | * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size | |
6846 | * used to create the sg_dma_buf_pool must be calculated. | |
6847 | */ | |
6848 | if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) { | |
6849 | /* Both cfg_enable_bg and cfg_external_dif code paths */ | |
6850 | ||
6851 | /* | |
6852 | * The scsi_buf for a T10-DIF I/O holds the FCP cmnd, | |
6853 | * the FCP rsp, and a SGE. Sice we have no control | |
6854 | * over how many protection segments the SCSI Layer | |
6855 | * will hand us (ie: there could be one for every block | |
6856 | * in the IO), just allocate enough SGEs to accomidate | |
6857 | * our max amount and we need to limit lpfc_sg_seg_cnt | |
6858 | * to minimize the risk of running out. | |
6859 | */ | |
6860 | phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + | |
6861 | sizeof(struct fcp_rsp) + max_buf_size; | |
6862 | ||
6863 | /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */ | |
6864 | phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT; | |
6865 | ||
6866 | /* | |
6867 | * If supporting DIF, reduce the seg count for scsi to | |
6868 | * allow room for the DIF sges. | |
6869 | */ | |
6870 | if (phba->cfg_enable_bg && | |
6871 | phba->cfg_sg_seg_cnt > LPFC_MAX_BG_SLI4_SEG_CNT_DIF) | |
6872 | phba->cfg_scsi_seg_cnt = LPFC_MAX_BG_SLI4_SEG_CNT_DIF; | |
6873 | else | |
6874 | phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt; | |
6875 | ||
6876 | } else { | |
6877 | /* | |
6878 | * The scsi_buf for a regular I/O holds the FCP cmnd, | |
6879 | * the FCP rsp, a SGE for each, and a SGE for up to | |
6880 | * cfg_sg_seg_cnt data segments. | |
6881 | */ | |
6882 | phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + | |
6883 | sizeof(struct fcp_rsp) + | |
6884 | ((phba->cfg_sg_seg_cnt + extra) * | |
6885 | sizeof(struct sli4_sge)); | |
6886 | ||
6887 | /* Total SGEs for scsi_sg_list */ | |
6888 | phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + extra; | |
6889 | phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt; | |
6890 | ||
6891 | /* | |
6892 | * NOTE: if (phba->cfg_sg_seg_cnt + extra) <= 256 we only | |
6893 | * need to post 1 page for the SGL. | |
6894 | */ | |
6895 | } | |
6896 | ||
6897 | if (phba->cfg_xpsgl && !phba->nvmet_support) | |
6898 | phba->cfg_sg_dma_buf_size = LPFC_DEFAULT_XPSGL_SIZE; | |
6899 | else if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ) | |
6900 | phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ; | |
6901 | else | |
6902 | phba->cfg_sg_dma_buf_size = | |
6903 | SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size); | |
6904 | ||
6905 | phba->border_sge_num = phba->cfg_sg_dma_buf_size / | |
6906 | sizeof(struct sli4_sge); | |
6907 | ||
6908 | /* Limit to LPFC_MAX_NVME_SEG_CNT for NVME. */ | |
6909 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
6910 | if (phba->cfg_sg_seg_cnt > LPFC_MAX_NVME_SEG_CNT) { | |
6911 | lpfc_printf_log(phba, KERN_INFO, LOG_NVME | LOG_INIT, | |
6912 | "6300 Reducing NVME sg segment " | |
6913 | "cnt to %d\n", | |
6914 | LPFC_MAX_NVME_SEG_CNT); | |
6915 | phba->cfg_nvme_seg_cnt = LPFC_MAX_NVME_SEG_CNT; | |
6916 | } else | |
6917 | phba->cfg_nvme_seg_cnt = phba->cfg_sg_seg_cnt; | |
6918 | } | |
6919 | ||
d79c9e9d JS |
6920 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, |
6921 | "9087 sg_seg_cnt:%d dmabuf_size:%d " | |
6922 | "total:%d scsi:%d nvme:%d\n", | |
6923 | phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size, | |
6924 | phba->cfg_total_seg_cnt, phba->cfg_scsi_seg_cnt, | |
6925 | phba->cfg_nvme_seg_cnt); | |
6926 | ||
6927 | if (phba->cfg_sg_dma_buf_size < SLI4_PAGE_SIZE) | |
6928 | i = phba->cfg_sg_dma_buf_size; | |
6929 | else | |
6930 | i = SLI4_PAGE_SIZE; | |
6931 | ||
6932 | phba->lpfc_sg_dma_buf_pool = | |
6933 | dma_pool_create("lpfc_sg_dma_buf_pool", | |
6934 | &phba->pcidev->dev, | |
6935 | phba->cfg_sg_dma_buf_size, | |
6936 | i, 0); | |
6937 | if (!phba->lpfc_sg_dma_buf_pool) | |
6938 | goto out_free_bsmbx; | |
6939 | ||
6940 | phba->lpfc_cmd_rsp_buf_pool = | |
6941 | dma_pool_create("lpfc_cmd_rsp_buf_pool", | |
6942 | &phba->pcidev->dev, | |
6943 | sizeof(struct fcp_cmnd) + | |
6944 | sizeof(struct fcp_rsp), | |
6945 | i, 0); | |
6946 | if (!phba->lpfc_cmd_rsp_buf_pool) | |
6947 | goto out_free_sg_dma_buf; | |
6948 | ||
cb5172ea | 6949 | mempool_free(mboxq, phba->mbox_mem_pool); |
1ba981fd JS |
6950 | |
6951 | /* Verify OAS is supported */ | |
6952 | lpfc_sli4_oas_verify(phba); | |
1ba981fd | 6953 | |
d2cc9bcd JS |
6954 | /* Verify RAS support on adapter */ |
6955 | lpfc_sli4_ras_init(phba); | |
6956 | ||
5350d872 JS |
6957 | /* Verify all the SLI4 queues */ |
6958 | rc = lpfc_sli4_queue_verify(phba); | |
da0436e9 | 6959 | if (rc) |
d79c9e9d | 6960 | goto out_free_cmd_rsp_buf; |
da0436e9 JS |
6961 | |
6962 | /* Create driver internal CQE event pool */ | |
6963 | rc = lpfc_sli4_cq_event_pool_create(phba); | |
6964 | if (rc) | |
d79c9e9d | 6965 | goto out_free_cmd_rsp_buf; |
da0436e9 | 6966 | |
8a9d2e80 JS |
6967 | /* Initialize sgl lists per host */ |
6968 | lpfc_init_sgl_list(phba); | |
6969 | ||
6970 | /* Allocate and initialize active sgl array */ | |
da0436e9 JS |
6971 | rc = lpfc_init_active_sgl_array(phba); |
6972 | if (rc) { | |
372c187b | 6973 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
da0436e9 | 6974 | "1430 Failed to initialize sgl list.\n"); |
8a9d2e80 | 6975 | goto out_destroy_cq_event_pool; |
da0436e9 | 6976 | } |
da0436e9 JS |
6977 | rc = lpfc_sli4_init_rpi_hdrs(phba); |
6978 | if (rc) { | |
372c187b | 6979 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
da0436e9 JS |
6980 | "1432 Failed to initialize rpi headers.\n"); |
6981 | goto out_free_active_sgl; | |
6982 | } | |
6983 | ||
a93ff37a | 6984 | /* Allocate eligible FCF bmask memory for FCF roundrobin failover */ |
0c9ab6f5 | 6985 | longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG; |
6396bb22 | 6986 | phba->fcf.fcf_rr_bmask = kcalloc(longs, sizeof(unsigned long), |
0c9ab6f5 JS |
6987 | GFP_KERNEL); |
6988 | if (!phba->fcf.fcf_rr_bmask) { | |
372c187b | 6989 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
0c9ab6f5 JS |
6990 | "2759 Failed allocate memory for FCF round " |
6991 | "robin failover bmask\n"); | |
0558056c | 6992 | rc = -ENOMEM; |
0c9ab6f5 JS |
6993 | goto out_remove_rpi_hdrs; |
6994 | } | |
6995 | ||
6a828b0f | 6996 | phba->sli4_hba.hba_eq_hdl = kcalloc(phba->cfg_irq_chann, |
cdb42bec JS |
6997 | sizeof(struct lpfc_hba_eq_hdl), |
6998 | GFP_KERNEL); | |
895427bd | 6999 | if (!phba->sli4_hba.hba_eq_hdl) { |
372c187b | 7000 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
67d12733 JS |
7001 | "2572 Failed allocate memory for " |
7002 | "fast-path per-EQ handle array\n"); | |
7003 | rc = -ENOMEM; | |
7004 | goto out_free_fcf_rr_bmask; | |
da0436e9 JS |
7005 | } |
7006 | ||
222e9239 | 7007 | phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_possible_cpu, |
895427bd JS |
7008 | sizeof(struct lpfc_vector_map_info), |
7009 | GFP_KERNEL); | |
7bb03bbf | 7010 | if (!phba->sli4_hba.cpu_map) { |
372c187b | 7011 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
7bb03bbf JS |
7012 | "3327 Failed allocate memory for msi-x " |
7013 | "interrupt vector mapping\n"); | |
7014 | rc = -ENOMEM; | |
895427bd | 7015 | goto out_free_hba_eq_hdl; |
7bb03bbf | 7016 | } |
b246de17 | 7017 | |
32517fc0 JS |
7018 | phba->sli4_hba.eq_info = alloc_percpu(struct lpfc_eq_intr_info); |
7019 | if (!phba->sli4_hba.eq_info) { | |
372c187b | 7020 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
32517fc0 JS |
7021 | "3321 Failed allocation for per_cpu stats\n"); |
7022 | rc = -ENOMEM; | |
7023 | goto out_free_hba_cpu_map; | |
7024 | } | |
840eda96 | 7025 | |
317aeb83 DK |
7026 | phba->sli4_hba.idle_stat = kcalloc(phba->sli4_hba.num_possible_cpu, |
7027 | sizeof(*phba->sli4_hba.idle_stat), | |
7028 | GFP_KERNEL); | |
7029 | if (!phba->sli4_hba.idle_stat) { | |
372c187b | 7030 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
317aeb83 DK |
7031 | "3390 Failed allocation for idle_stat\n"); |
7032 | rc = -ENOMEM; | |
7033 | goto out_free_hba_eq_info; | |
7034 | } | |
7035 | ||
840eda96 JS |
7036 | #ifdef CONFIG_SCSI_LPFC_DEBUG_FS |
7037 | phba->sli4_hba.c_stat = alloc_percpu(struct lpfc_hdwq_stat); | |
7038 | if (!phba->sli4_hba.c_stat) { | |
372c187b | 7039 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
840eda96 JS |
7040 | "3332 Failed allocating per cpu hdwq stats\n"); |
7041 | rc = -ENOMEM; | |
317aeb83 | 7042 | goto out_free_hba_idle_stat; |
840eda96 JS |
7043 | } |
7044 | #endif | |
7045 | ||
912e3acd JS |
7046 | /* |
7047 | * Enable sr-iov virtual functions if supported and configured | |
7048 | * through the module parameter. | |
7049 | */ | |
7050 | if (phba->cfg_sriov_nr_virtfn > 0) { | |
7051 | rc = lpfc_sli_probe_sriov_nr_virtfn(phba, | |
7052 | phba->cfg_sriov_nr_virtfn); | |
7053 | if (rc) { | |
7054 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
7055 | "3020 Requested number of SR-IOV " | |
7056 | "virtual functions (%d) is not " | |
7057 | "supported\n", | |
7058 | phba->cfg_sriov_nr_virtfn); | |
7059 | phba->cfg_sriov_nr_virtfn = 0; | |
7060 | } | |
7061 | } | |
7062 | ||
5248a749 | 7063 | return 0; |
da0436e9 | 7064 | |
840eda96 | 7065 | #ifdef CONFIG_SCSI_LPFC_DEBUG_FS |
317aeb83 DK |
7066 | out_free_hba_idle_stat: |
7067 | kfree(phba->sli4_hba.idle_stat); | |
7068 | #endif | |
840eda96 JS |
7069 | out_free_hba_eq_info: |
7070 | free_percpu(phba->sli4_hba.eq_info); | |
32517fc0 JS |
7071 | out_free_hba_cpu_map: |
7072 | kfree(phba->sli4_hba.cpu_map); | |
895427bd JS |
7073 | out_free_hba_eq_hdl: |
7074 | kfree(phba->sli4_hba.hba_eq_hdl); | |
0c9ab6f5 JS |
7075 | out_free_fcf_rr_bmask: |
7076 | kfree(phba->fcf.fcf_rr_bmask); | |
da0436e9 JS |
7077 | out_remove_rpi_hdrs: |
7078 | lpfc_sli4_remove_rpi_hdrs(phba); | |
7079 | out_free_active_sgl: | |
7080 | lpfc_free_active_sgl(phba); | |
da0436e9 JS |
7081 | out_destroy_cq_event_pool: |
7082 | lpfc_sli4_cq_event_pool_destroy(phba); | |
d79c9e9d JS |
7083 | out_free_cmd_rsp_buf: |
7084 | dma_pool_destroy(phba->lpfc_cmd_rsp_buf_pool); | |
7085 | phba->lpfc_cmd_rsp_buf_pool = NULL; | |
7086 | out_free_sg_dma_buf: | |
7087 | dma_pool_destroy(phba->lpfc_sg_dma_buf_pool); | |
7088 | phba->lpfc_sg_dma_buf_pool = NULL; | |
da0436e9 JS |
7089 | out_free_bsmbx: |
7090 | lpfc_destroy_bootstrap_mbox(phba); | |
7091 | out_free_mem: | |
7092 | lpfc_mem_free(phba); | |
7093 | return rc; | |
7094 | } | |
7095 | ||
7096 | /** | |
7097 | * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev | |
7098 | * @phba: pointer to lpfc hba data structure. | |
7099 | * | |
7100 | * This routine is invoked to unset the driver internal resources set up | |
7101 | * specific for supporting the SLI-4 HBA device it attached to. | |
7102 | **/ | |
7103 | static void | |
7104 | lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba) | |
7105 | { | |
7106 | struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry; | |
7107 | ||
32517fc0 | 7108 | free_percpu(phba->sli4_hba.eq_info); |
840eda96 JS |
7109 | #ifdef CONFIG_SCSI_LPFC_DEBUG_FS |
7110 | free_percpu(phba->sli4_hba.c_stat); | |
7111 | #endif | |
317aeb83 | 7112 | kfree(phba->sli4_hba.idle_stat); |
32517fc0 | 7113 | |
7bb03bbf JS |
7114 | /* Free memory allocated for msi-x interrupt vector to CPU mapping */ |
7115 | kfree(phba->sli4_hba.cpu_map); | |
222e9239 | 7116 | phba->sli4_hba.num_possible_cpu = 0; |
7bb03bbf | 7117 | phba->sli4_hba.num_present_cpu = 0; |
76fd07a6 | 7118 | phba->sli4_hba.curr_disp_cpu = 0; |
3048e3e8 | 7119 | cpumask_clear(&phba->sli4_hba.irq_aff_mask); |
7bb03bbf | 7120 | |
da0436e9 | 7121 | /* Free memory allocated for fast-path work queue handles */ |
895427bd | 7122 | kfree(phba->sli4_hba.hba_eq_hdl); |
da0436e9 JS |
7123 | |
7124 | /* Free the allocated rpi headers. */ | |
7125 | lpfc_sli4_remove_rpi_hdrs(phba); | |
d11e31dd | 7126 | lpfc_sli4_remove_rpis(phba); |
da0436e9 | 7127 | |
0c9ab6f5 JS |
7128 | /* Free eligible FCF index bmask */ |
7129 | kfree(phba->fcf.fcf_rr_bmask); | |
7130 | ||
da0436e9 JS |
7131 | /* Free the ELS sgl list */ |
7132 | lpfc_free_active_sgl(phba); | |
8a9d2e80 | 7133 | lpfc_free_els_sgl_list(phba); |
f358dd0c | 7134 | lpfc_free_nvmet_sgl_list(phba); |
da0436e9 | 7135 | |
da0436e9 JS |
7136 | /* Free the completion queue EQ event pool */ |
7137 | lpfc_sli4_cq_event_release_all(phba); | |
7138 | lpfc_sli4_cq_event_pool_destroy(phba); | |
7139 | ||
6d368e53 JS |
7140 | /* Release resource identifiers. */ |
7141 | lpfc_sli4_dealloc_resource_identifiers(phba); | |
7142 | ||
da0436e9 JS |
7143 | /* Free the bsmbx region. */ |
7144 | lpfc_destroy_bootstrap_mbox(phba); | |
7145 | ||
7146 | /* Free the SLI Layer memory with SLI4 HBAs */ | |
7147 | lpfc_mem_free_all(phba); | |
7148 | ||
7149 | /* Free the current connect table */ | |
7150 | list_for_each_entry_safe(conn_entry, next_conn_entry, | |
4d9ab994 JS |
7151 | &phba->fcf_conn_rec_list, list) { |
7152 | list_del_init(&conn_entry->list); | |
da0436e9 | 7153 | kfree(conn_entry); |
4d9ab994 | 7154 | } |
da0436e9 JS |
7155 | |
7156 | return; | |
7157 | } | |
7158 | ||
7159 | /** | |
25985edc | 7160 | * lpfc_init_api_table_setup - Set up init api function jump table |
da0436e9 JS |
7161 | * @phba: The hba struct for which this call is being executed. |
7162 | * @dev_grp: The HBA PCI-Device group number. | |
7163 | * | |
7164 | * This routine sets up the device INIT interface API function jump table | |
7165 | * in @phba struct. | |
7166 | * | |
7167 | * Returns: 0 - success, -ENODEV - failure. | |
7168 | **/ | |
7169 | int | |
7170 | lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp) | |
7171 | { | |
84d1b006 JS |
7172 | phba->lpfc_hba_init_link = lpfc_hba_init_link; |
7173 | phba->lpfc_hba_down_link = lpfc_hba_down_link; | |
7f86059a | 7174 | phba->lpfc_selective_reset = lpfc_selective_reset; |
da0436e9 JS |
7175 | switch (dev_grp) { |
7176 | case LPFC_PCI_DEV_LP: | |
7177 | phba->lpfc_hba_down_post = lpfc_hba_down_post_s3; | |
7178 | phba->lpfc_handle_eratt = lpfc_handle_eratt_s3; | |
7179 | phba->lpfc_stop_port = lpfc_stop_port_s3; | |
7180 | break; | |
7181 | case LPFC_PCI_DEV_OC: | |
7182 | phba->lpfc_hba_down_post = lpfc_hba_down_post_s4; | |
7183 | phba->lpfc_handle_eratt = lpfc_handle_eratt_s4; | |
7184 | phba->lpfc_stop_port = lpfc_stop_port_s4; | |
7185 | break; | |
7186 | default: | |
372c187b | 7187 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
da0436e9 JS |
7188 | "1431 Invalid HBA PCI-device group: 0x%x\n", |
7189 | dev_grp); | |
7190 | return -ENODEV; | |
da0436e9 JS |
7191 | } |
7192 | return 0; | |
7193 | } | |
7194 | ||
da0436e9 JS |
7195 | /** |
7196 | * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources. | |
7197 | * @phba: pointer to lpfc hba data structure. | |
7198 | * | |
7199 | * This routine is invoked to set up the driver internal resources after the | |
7200 | * device specific resource setup to support the HBA device it attached to. | |
7201 | * | |
7202 | * Return codes | |
af901ca1 | 7203 | * 0 - successful |
da0436e9 JS |
7204 | * other values - error |
7205 | **/ | |
7206 | static int | |
7207 | lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba) | |
7208 | { | |
7209 | int error; | |
7210 | ||
7211 | /* Startup the kernel thread for this host adapter. */ | |
7212 | phba->worker_thread = kthread_run(lpfc_do_work, phba, | |
7213 | "lpfc_worker_%d", phba->brd_no); | |
7214 | if (IS_ERR(phba->worker_thread)) { | |
7215 | error = PTR_ERR(phba->worker_thread); | |
7216 | return error; | |
3772a991 JS |
7217 | } |
7218 | ||
7219 | return 0; | |
7220 | } | |
7221 | ||
7222 | /** | |
7223 | * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources. | |
7224 | * @phba: pointer to lpfc hba data structure. | |
7225 | * | |
7226 | * This routine is invoked to unset the driver internal resources set up after | |
7227 | * the device specific resource setup for supporting the HBA device it | |
7228 | * attached to. | |
7229 | **/ | |
7230 | static void | |
7231 | lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba) | |
7232 | { | |
f485c18d DK |
7233 | if (phba->wq) { |
7234 | flush_workqueue(phba->wq); | |
7235 | destroy_workqueue(phba->wq); | |
7236 | phba->wq = NULL; | |
7237 | } | |
7238 | ||
3772a991 | 7239 | /* Stop kernel worker thread */ |
0cdb84ec JS |
7240 | if (phba->worker_thread) |
7241 | kthread_stop(phba->worker_thread); | |
3772a991 JS |
7242 | } |
7243 | ||
7244 | /** | |
7245 | * lpfc_free_iocb_list - Free iocb list. | |
7246 | * @phba: pointer to lpfc hba data structure. | |
7247 | * | |
7248 | * This routine is invoked to free the driver's IOCB list and memory. | |
7249 | **/ | |
6c621a22 | 7250 | void |
3772a991 JS |
7251 | lpfc_free_iocb_list(struct lpfc_hba *phba) |
7252 | { | |
7253 | struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL; | |
7254 | ||
7255 | spin_lock_irq(&phba->hbalock); | |
7256 | list_for_each_entry_safe(iocbq_entry, iocbq_next, | |
7257 | &phba->lpfc_iocb_list, list) { | |
7258 | list_del(&iocbq_entry->list); | |
7259 | kfree(iocbq_entry); | |
7260 | phba->total_iocbq_bufs--; | |
98c9ea5c | 7261 | } |
3772a991 JS |
7262 | spin_unlock_irq(&phba->hbalock); |
7263 | ||
7264 | return; | |
7265 | } | |
7266 | ||
7267 | /** | |
7268 | * lpfc_init_iocb_list - Allocate and initialize iocb list. | |
7269 | * @phba: pointer to lpfc hba data structure. | |
fe614acd | 7270 | * @iocb_count: number of requested iocbs |
3772a991 JS |
7271 | * |
7272 | * This routine is invoked to allocate and initizlize the driver's IOCB | |
7273 | * list and set up the IOCB tag array accordingly. | |
7274 | * | |
7275 | * Return codes | |
af901ca1 | 7276 | * 0 - successful |
3772a991 JS |
7277 | * other values - error |
7278 | **/ | |
6c621a22 | 7279 | int |
3772a991 JS |
7280 | lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count) |
7281 | { | |
7282 | struct lpfc_iocbq *iocbq_entry = NULL; | |
7283 | uint16_t iotag; | |
7284 | int i; | |
dea3101e | 7285 | |
7286 | /* Initialize and populate the iocb list per host. */ | |
7287 | INIT_LIST_HEAD(&phba->lpfc_iocb_list); | |
3772a991 | 7288 | for (i = 0; i < iocb_count; i++) { |
dd00cc48 | 7289 | iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL); |
dea3101e | 7290 | if (iocbq_entry == NULL) { |
7291 | printk(KERN_ERR "%s: only allocated %d iocbs of " | |
7292 | "expected %d count. Unloading driver.\n", | |
a5f7337f | 7293 | __func__, i, iocb_count); |
dea3101e | 7294 | goto out_free_iocbq; |
7295 | } | |
7296 | ||
604a3e30 JB |
7297 | iotag = lpfc_sli_next_iotag(phba, iocbq_entry); |
7298 | if (iotag == 0) { | |
3772a991 | 7299 | kfree(iocbq_entry); |
604a3e30 | 7300 | printk(KERN_ERR "%s: failed to allocate IOTAG. " |
3772a991 | 7301 | "Unloading driver.\n", __func__); |
604a3e30 JB |
7302 | goto out_free_iocbq; |
7303 | } | |
6d368e53 | 7304 | iocbq_entry->sli4_lxritag = NO_XRI; |
3772a991 | 7305 | iocbq_entry->sli4_xritag = NO_XRI; |
2e0fef85 JS |
7306 | |
7307 | spin_lock_irq(&phba->hbalock); | |
dea3101e | 7308 | list_add(&iocbq_entry->list, &phba->lpfc_iocb_list); |
7309 | phba->total_iocbq_bufs++; | |
2e0fef85 | 7310 | spin_unlock_irq(&phba->hbalock); |
dea3101e | 7311 | } |
7312 | ||
3772a991 | 7313 | return 0; |
dea3101e | 7314 | |
3772a991 JS |
7315 | out_free_iocbq: |
7316 | lpfc_free_iocb_list(phba); | |
dea3101e | 7317 | |
3772a991 JS |
7318 | return -ENOMEM; |
7319 | } | |
5e9d9b82 | 7320 | |
3772a991 | 7321 | /** |
8a9d2e80 | 7322 | * lpfc_free_sgl_list - Free a given sgl list. |
da0436e9 | 7323 | * @phba: pointer to lpfc hba data structure. |
8a9d2e80 | 7324 | * @sglq_list: pointer to the head of sgl list. |
3772a991 | 7325 | * |
8a9d2e80 | 7326 | * This routine is invoked to free a give sgl list and memory. |
3772a991 | 7327 | **/ |
8a9d2e80 JS |
7328 | void |
7329 | lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list) | |
3772a991 | 7330 | { |
da0436e9 | 7331 | struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL; |
8a9d2e80 JS |
7332 | |
7333 | list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) { | |
7334 | list_del(&sglq_entry->list); | |
7335 | lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys); | |
7336 | kfree(sglq_entry); | |
7337 | } | |
7338 | } | |
7339 | ||
7340 | /** | |
7341 | * lpfc_free_els_sgl_list - Free els sgl list. | |
7342 | * @phba: pointer to lpfc hba data structure. | |
7343 | * | |
7344 | * This routine is invoked to free the driver's els sgl list and memory. | |
7345 | **/ | |
7346 | static void | |
7347 | lpfc_free_els_sgl_list(struct lpfc_hba *phba) | |
7348 | { | |
da0436e9 | 7349 | LIST_HEAD(sglq_list); |
dea3101e | 7350 | |
8a9d2e80 | 7351 | /* Retrieve all els sgls from driver list */ |
da0436e9 | 7352 | spin_lock_irq(&phba->hbalock); |
895427bd JS |
7353 | spin_lock(&phba->sli4_hba.sgl_list_lock); |
7354 | list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list); | |
7355 | spin_unlock(&phba->sli4_hba.sgl_list_lock); | |
da0436e9 | 7356 | spin_unlock_irq(&phba->hbalock); |
dea3101e | 7357 | |
8a9d2e80 JS |
7358 | /* Now free the sgl list */ |
7359 | lpfc_free_sgl_list(phba, &sglq_list); | |
da0436e9 | 7360 | } |
92d7f7b0 | 7361 | |
f358dd0c JS |
7362 | /** |
7363 | * lpfc_free_nvmet_sgl_list - Free nvmet sgl list. | |
7364 | * @phba: pointer to lpfc hba data structure. | |
7365 | * | |
7366 | * This routine is invoked to free the driver's nvmet sgl list and memory. | |
7367 | **/ | |
7368 | static void | |
7369 | lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba) | |
7370 | { | |
7371 | struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL; | |
7372 | LIST_HEAD(sglq_list); | |
7373 | ||
7374 | /* Retrieve all nvmet sgls from driver list */ | |
7375 | spin_lock_irq(&phba->hbalock); | |
7376 | spin_lock(&phba->sli4_hba.sgl_list_lock); | |
7377 | list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list); | |
7378 | spin_unlock(&phba->sli4_hba.sgl_list_lock); | |
7379 | spin_unlock_irq(&phba->hbalock); | |
7380 | ||
7381 | /* Now free the sgl list */ | |
7382 | list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) { | |
7383 | list_del(&sglq_entry->list); | |
7384 | lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys); | |
7385 | kfree(sglq_entry); | |
7386 | } | |
4b40d02b DK |
7387 | |
7388 | /* Update the nvmet_xri_cnt to reflect no current sgls. | |
7389 | * The next initialization cycle sets the count and allocates | |
7390 | * the sgls over again. | |
7391 | */ | |
7392 | phba->sli4_hba.nvmet_xri_cnt = 0; | |
f358dd0c JS |
7393 | } |
7394 | ||
da0436e9 JS |
7395 | /** |
7396 | * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs. | |
7397 | * @phba: pointer to lpfc hba data structure. | |
7398 | * | |
7399 | * This routine is invoked to allocate the driver's active sgl memory. | |
7400 | * This array will hold the sglq_entry's for active IOs. | |
7401 | **/ | |
7402 | static int | |
7403 | lpfc_init_active_sgl_array(struct lpfc_hba *phba) | |
7404 | { | |
7405 | int size; | |
7406 | size = sizeof(struct lpfc_sglq *); | |
7407 | size *= phba->sli4_hba.max_cfg_param.max_xri; | |
7408 | ||
7409 | phba->sli4_hba.lpfc_sglq_active_list = | |
7410 | kzalloc(size, GFP_KERNEL); | |
7411 | if (!phba->sli4_hba.lpfc_sglq_active_list) | |
7412 | return -ENOMEM; | |
7413 | return 0; | |
3772a991 JS |
7414 | } |
7415 | ||
7416 | /** | |
da0436e9 | 7417 | * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs. |
3772a991 JS |
7418 | * @phba: pointer to lpfc hba data structure. |
7419 | * | |
da0436e9 JS |
7420 | * This routine is invoked to walk through the array of active sglq entries |
7421 | * and free all of the resources. | |
7422 | * This is just a place holder for now. | |
3772a991 JS |
7423 | **/ |
7424 | static void | |
da0436e9 | 7425 | lpfc_free_active_sgl(struct lpfc_hba *phba) |
3772a991 | 7426 | { |
da0436e9 | 7427 | kfree(phba->sli4_hba.lpfc_sglq_active_list); |
3772a991 JS |
7428 | } |
7429 | ||
7430 | /** | |
da0436e9 | 7431 | * lpfc_init_sgl_list - Allocate and initialize sgl list. |
3772a991 JS |
7432 | * @phba: pointer to lpfc hba data structure. |
7433 | * | |
da0436e9 JS |
7434 | * This routine is invoked to allocate and initizlize the driver's sgl |
7435 | * list and set up the sgl xritag tag array accordingly. | |
3772a991 | 7436 | * |
3772a991 | 7437 | **/ |
8a9d2e80 | 7438 | static void |
da0436e9 | 7439 | lpfc_init_sgl_list(struct lpfc_hba *phba) |
3772a991 | 7440 | { |
da0436e9 | 7441 | /* Initialize and populate the sglq list per host/VF. */ |
895427bd | 7442 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list); |
da0436e9 | 7443 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list); |
f358dd0c | 7444 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list); |
86c67379 | 7445 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); |
da0436e9 | 7446 | |
8a9d2e80 JS |
7447 | /* els xri-sgl book keeping */ |
7448 | phba->sli4_hba.els_xri_cnt = 0; | |
0ff10d46 | 7449 | |
895427bd | 7450 | /* nvme xri-buffer book keeping */ |
5e5b511d | 7451 | phba->sli4_hba.io_xri_cnt = 0; |
da0436e9 JS |
7452 | } |
7453 | ||
7454 | /** | |
7455 | * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port | |
7456 | * @phba: pointer to lpfc hba data structure. | |
7457 | * | |
7458 | * This routine is invoked to post rpi header templates to the | |
88a2cfbb | 7459 | * port for those SLI4 ports that do not support extents. This routine |
da0436e9 | 7460 | * posts a PAGE_SIZE memory region to the port to hold up to |
88a2cfbb JS |
7461 | * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine |
7462 | * and should be called only when interrupts are disabled. | |
da0436e9 JS |
7463 | * |
7464 | * Return codes | |
af901ca1 | 7465 | * 0 - successful |
88a2cfbb | 7466 | * -ERROR - otherwise. |
da0436e9 JS |
7467 | **/ |
7468 | int | |
7469 | lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba) | |
7470 | { | |
7471 | int rc = 0; | |
da0436e9 JS |
7472 | struct lpfc_rpi_hdr *rpi_hdr; |
7473 | ||
7474 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list); | |
ff78d8f9 | 7475 | if (!phba->sli4_hba.rpi_hdrs_in_use) |
6d368e53 | 7476 | return rc; |
6d368e53 JS |
7477 | if (phba->sli4_hba.extents_in_use) |
7478 | return -EIO; | |
da0436e9 JS |
7479 | |
7480 | rpi_hdr = lpfc_sli4_create_rpi_hdr(phba); | |
7481 | if (!rpi_hdr) { | |
372c187b | 7482 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
da0436e9 JS |
7483 | "0391 Error during rpi post operation\n"); |
7484 | lpfc_sli4_remove_rpis(phba); | |
7485 | rc = -ENODEV; | |
7486 | } | |
7487 | ||
7488 | return rc; | |
7489 | } | |
7490 | ||
7491 | /** | |
7492 | * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region | |
7493 | * @phba: pointer to lpfc hba data structure. | |
7494 | * | |
7495 | * This routine is invoked to allocate a single 4KB memory region to | |
7496 | * support rpis and stores them in the phba. This single region | |
7497 | * provides support for up to 64 rpis. The region is used globally | |
7498 | * by the device. | |
7499 | * | |
7500 | * Returns: | |
7501 | * A valid rpi hdr on success. | |
7502 | * A NULL pointer on any failure. | |
7503 | **/ | |
7504 | struct lpfc_rpi_hdr * | |
7505 | lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba) | |
7506 | { | |
7507 | uint16_t rpi_limit, curr_rpi_range; | |
7508 | struct lpfc_dmabuf *dmabuf; | |
7509 | struct lpfc_rpi_hdr *rpi_hdr; | |
7510 | ||
6d368e53 JS |
7511 | /* |
7512 | * If the SLI4 port supports extents, posting the rpi header isn't | |
7513 | * required. Set the expected maximum count and let the actual value | |
7514 | * get set when extents are fully allocated. | |
7515 | */ | |
7516 | if (!phba->sli4_hba.rpi_hdrs_in_use) | |
7517 | return NULL; | |
7518 | if (phba->sli4_hba.extents_in_use) | |
7519 | return NULL; | |
7520 | ||
7521 | /* The limit on the logical index is just the max_rpi count. */ | |
845d9e8d | 7522 | rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi; |
da0436e9 JS |
7523 | |
7524 | spin_lock_irq(&phba->hbalock); | |
6d368e53 JS |
7525 | /* |
7526 | * Establish the starting RPI in this header block. The starting | |
7527 | * rpi is normalized to a zero base because the physical rpi is | |
7528 | * port based. | |
7529 | */ | |
97f2ecf1 | 7530 | curr_rpi_range = phba->sli4_hba.next_rpi; |
da0436e9 JS |
7531 | spin_unlock_irq(&phba->hbalock); |
7532 | ||
845d9e8d JS |
7533 | /* Reached full RPI range */ |
7534 | if (curr_rpi_range == rpi_limit) | |
6d368e53 | 7535 | return NULL; |
845d9e8d | 7536 | |
da0436e9 JS |
7537 | /* |
7538 | * First allocate the protocol header region for the port. The | |
7539 | * port expects a 4KB DMA-mapped memory region that is 4K aligned. | |
7540 | */ | |
7541 | dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); | |
7542 | if (!dmabuf) | |
7543 | return NULL; | |
7544 | ||
750afb08 LC |
7545 | dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, |
7546 | LPFC_HDR_TEMPLATE_SIZE, | |
7547 | &dmabuf->phys, GFP_KERNEL); | |
da0436e9 JS |
7548 | if (!dmabuf->virt) { |
7549 | rpi_hdr = NULL; | |
7550 | goto err_free_dmabuf; | |
7551 | } | |
7552 | ||
da0436e9 JS |
7553 | if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) { |
7554 | rpi_hdr = NULL; | |
7555 | goto err_free_coherent; | |
7556 | } | |
7557 | ||
7558 | /* Save the rpi header data for cleanup later. */ | |
7559 | rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL); | |
7560 | if (!rpi_hdr) | |
7561 | goto err_free_coherent; | |
7562 | ||
7563 | rpi_hdr->dmabuf = dmabuf; | |
7564 | rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE; | |
7565 | rpi_hdr->page_count = 1; | |
7566 | spin_lock_irq(&phba->hbalock); | |
6d368e53 JS |
7567 | |
7568 | /* The rpi_hdr stores the logical index only. */ | |
7569 | rpi_hdr->start_rpi = curr_rpi_range; | |
845d9e8d | 7570 | rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT; |
da0436e9 JS |
7571 | list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list); |
7572 | ||
da0436e9 JS |
7573 | spin_unlock_irq(&phba->hbalock); |
7574 | return rpi_hdr; | |
7575 | ||
7576 | err_free_coherent: | |
7577 | dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE, | |
7578 | dmabuf->virt, dmabuf->phys); | |
7579 | err_free_dmabuf: | |
7580 | kfree(dmabuf); | |
7581 | return NULL; | |
7582 | } | |
7583 | ||
7584 | /** | |
7585 | * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions | |
7586 | * @phba: pointer to lpfc hba data structure. | |
7587 | * | |
7588 | * This routine is invoked to remove all memory resources allocated | |
6d368e53 JS |
7589 | * to support rpis for SLI4 ports not supporting extents. This routine |
7590 | * presumes the caller has released all rpis consumed by fabric or port | |
7591 | * logins and is prepared to have the header pages removed. | |
da0436e9 JS |
7592 | **/ |
7593 | void | |
7594 | lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba) | |
7595 | { | |
7596 | struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr; | |
7597 | ||
6d368e53 JS |
7598 | if (!phba->sli4_hba.rpi_hdrs_in_use) |
7599 | goto exit; | |
7600 | ||
da0436e9 JS |
7601 | list_for_each_entry_safe(rpi_hdr, next_rpi_hdr, |
7602 | &phba->sli4_hba.lpfc_rpi_hdr_list, list) { | |
7603 | list_del(&rpi_hdr->list); | |
7604 | dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len, | |
7605 | rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys); | |
7606 | kfree(rpi_hdr->dmabuf); | |
7607 | kfree(rpi_hdr); | |
7608 | } | |
6d368e53 JS |
7609 | exit: |
7610 | /* There are no rpis available to the port now. */ | |
7611 | phba->sli4_hba.next_rpi = 0; | |
da0436e9 JS |
7612 | } |
7613 | ||
7614 | /** | |
7615 | * lpfc_hba_alloc - Allocate driver hba data structure for a device. | |
7616 | * @pdev: pointer to pci device data structure. | |
7617 | * | |
7618 | * This routine is invoked to allocate the driver hba data structure for an | |
7619 | * HBA device. If the allocation is successful, the phba reference to the | |
7620 | * PCI device data structure is set. | |
7621 | * | |
7622 | * Return codes | |
af901ca1 | 7623 | * pointer to @phba - successful |
da0436e9 JS |
7624 | * NULL - error |
7625 | **/ | |
7626 | static struct lpfc_hba * | |
7627 | lpfc_hba_alloc(struct pci_dev *pdev) | |
7628 | { | |
7629 | struct lpfc_hba *phba; | |
7630 | ||
7631 | /* Allocate memory for HBA structure */ | |
7632 | phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL); | |
7633 | if (!phba) { | |
e34ccdfe | 7634 | dev_err(&pdev->dev, "failed to allocate hba struct\n"); |
da0436e9 JS |
7635 | return NULL; |
7636 | } | |
7637 | ||
7638 | /* Set reference to PCI device in HBA structure */ | |
7639 | phba->pcidev = pdev; | |
7640 | ||
7641 | /* Assign an unused board number */ | |
7642 | phba->brd_no = lpfc_get_instance(); | |
7643 | if (phba->brd_no < 0) { | |
7644 | kfree(phba); | |
7645 | return NULL; | |
7646 | } | |
65791f1f | 7647 | phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL; |
da0436e9 | 7648 | |
4fede78f | 7649 | spin_lock_init(&phba->ct_ev_lock); |
f1c3b0fc JS |
7650 | INIT_LIST_HEAD(&phba->ct_ev_waiters); |
7651 | ||
da0436e9 JS |
7652 | return phba; |
7653 | } | |
7654 | ||
7655 | /** | |
7656 | * lpfc_hba_free - Free driver hba data structure with a device. | |
7657 | * @phba: pointer to lpfc hba data structure. | |
7658 | * | |
7659 | * This routine is invoked to free the driver hba data structure with an | |
7660 | * HBA device. | |
7661 | **/ | |
7662 | static void | |
7663 | lpfc_hba_free(struct lpfc_hba *phba) | |
7664 | { | |
5e5b511d JS |
7665 | if (phba->sli_rev == LPFC_SLI_REV4) |
7666 | kfree(phba->sli4_hba.hdwq); | |
7667 | ||
da0436e9 JS |
7668 | /* Release the driver assigned board number */ |
7669 | idr_remove(&lpfc_hba_index, phba->brd_no); | |
7670 | ||
895427bd JS |
7671 | /* Free memory allocated with sli3 rings */ |
7672 | kfree(phba->sli.sli3_ring); | |
7673 | phba->sli.sli3_ring = NULL; | |
2a76a283 | 7674 | |
da0436e9 JS |
7675 | kfree(phba); |
7676 | return; | |
7677 | } | |
7678 | ||
7679 | /** | |
7680 | * lpfc_create_shost - Create hba physical port with associated scsi host. | |
7681 | * @phba: pointer to lpfc hba data structure. | |
7682 | * | |
7683 | * This routine is invoked to create HBA physical port and associate a SCSI | |
7684 | * host with it. | |
7685 | * | |
7686 | * Return codes | |
af901ca1 | 7687 | * 0 - successful |
da0436e9 JS |
7688 | * other values - error |
7689 | **/ | |
7690 | static int | |
7691 | lpfc_create_shost(struct lpfc_hba *phba) | |
7692 | { | |
7693 | struct lpfc_vport *vport; | |
7694 | struct Scsi_Host *shost; | |
7695 | ||
7696 | /* Initialize HBA FC structure */ | |
7697 | phba->fc_edtov = FF_DEF_EDTOV; | |
7698 | phba->fc_ratov = FF_DEF_RATOV; | |
7699 | phba->fc_altov = FF_DEF_ALTOV; | |
7700 | phba->fc_arbtov = FF_DEF_ARBTOV; | |
7701 | ||
d7c47992 | 7702 | atomic_set(&phba->sdev_cnt, 0); |
da0436e9 JS |
7703 | vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev); |
7704 | if (!vport) | |
7705 | return -ENODEV; | |
7706 | ||
7707 | shost = lpfc_shost_from_vport(vport); | |
7708 | phba->pport = vport; | |
2ea259ee | 7709 | |
f358dd0c JS |
7710 | if (phba->nvmet_support) { |
7711 | /* Only 1 vport (pport) will support NVME target */ | |
ea85a20c JS |
7712 | phba->targetport = NULL; |
7713 | phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME; | |
7714 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME_DISC, | |
7715 | "6076 NVME Target Found\n"); | |
f358dd0c JS |
7716 | } |
7717 | ||
da0436e9 JS |
7718 | lpfc_debugfs_initialize(vport); |
7719 | /* Put reference to SCSI host to driver's device private data */ | |
7720 | pci_set_drvdata(phba->pcidev, shost); | |
2e0fef85 | 7721 | |
4258e98e JS |
7722 | /* |
7723 | * At this point we are fully registered with PSA. In addition, | |
7724 | * any initial discovery should be completed. | |
7725 | */ | |
7726 | vport->load_flag |= FC_ALLOW_FDMI; | |
8663cbbe JS |
7727 | if (phba->cfg_enable_SmartSAN || |
7728 | (phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT)) { | |
4258e98e JS |
7729 | |
7730 | /* Setup appropriate attribute masks */ | |
7731 | vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR; | |
8663cbbe | 7732 | if (phba->cfg_enable_SmartSAN) |
4258e98e JS |
7733 | vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR; |
7734 | else | |
7735 | vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR; | |
7736 | } | |
3772a991 JS |
7737 | return 0; |
7738 | } | |
db2378e0 | 7739 | |
3772a991 JS |
7740 | /** |
7741 | * lpfc_destroy_shost - Destroy hba physical port with associated scsi host. | |
7742 | * @phba: pointer to lpfc hba data structure. | |
7743 | * | |
7744 | * This routine is invoked to destroy HBA physical port and the associated | |
7745 | * SCSI host. | |
7746 | **/ | |
7747 | static void | |
7748 | lpfc_destroy_shost(struct lpfc_hba *phba) | |
7749 | { | |
7750 | struct lpfc_vport *vport = phba->pport; | |
7751 | ||
7752 | /* Destroy physical port that associated with the SCSI host */ | |
7753 | destroy_port(vport); | |
7754 | ||
7755 | return; | |
7756 | } | |
7757 | ||
7758 | /** | |
7759 | * lpfc_setup_bg - Setup Block guard structures and debug areas. | |
7760 | * @phba: pointer to lpfc hba data structure. | |
7761 | * @shost: the shost to be used to detect Block guard settings. | |
7762 | * | |
7763 | * This routine sets up the local Block guard protocol settings for @shost. | |
7764 | * This routine also allocates memory for debugging bg buffers. | |
7765 | **/ | |
7766 | static void | |
7767 | lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost) | |
7768 | { | |
bbeb79b9 JS |
7769 | uint32_t old_mask; |
7770 | uint32_t old_guard; | |
7771 | ||
b3b98b74 | 7772 | if (phba->cfg_prot_mask && phba->cfg_prot_guard) { |
3772a991 JS |
7773 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
7774 | "1478 Registering BlockGuard with the " | |
7775 | "SCSI layer\n"); | |
bbeb79b9 | 7776 | |
b3b98b74 JS |
7777 | old_mask = phba->cfg_prot_mask; |
7778 | old_guard = phba->cfg_prot_guard; | |
bbeb79b9 JS |
7779 | |
7780 | /* Only allow supported values */ | |
b3b98b74 | 7781 | phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION | |
bbeb79b9 JS |
7782 | SHOST_DIX_TYPE0_PROTECTION | |
7783 | SHOST_DIX_TYPE1_PROTECTION); | |
b3b98b74 JS |
7784 | phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP | |
7785 | SHOST_DIX_GUARD_CRC); | |
bbeb79b9 JS |
7786 | |
7787 | /* DIF Type 1 protection for profiles AST1/C1 is end to end */ | |
b3b98b74 JS |
7788 | if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION) |
7789 | phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION; | |
bbeb79b9 | 7790 | |
b3b98b74 JS |
7791 | if (phba->cfg_prot_mask && phba->cfg_prot_guard) { |
7792 | if ((old_mask != phba->cfg_prot_mask) || | |
7793 | (old_guard != phba->cfg_prot_guard)) | |
372c187b | 7794 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
bbeb79b9 JS |
7795 | "1475 Registering BlockGuard with the " |
7796 | "SCSI layer: mask %d guard %d\n", | |
b3b98b74 JS |
7797 | phba->cfg_prot_mask, |
7798 | phba->cfg_prot_guard); | |
bbeb79b9 | 7799 | |
b3b98b74 JS |
7800 | scsi_host_set_prot(shost, phba->cfg_prot_mask); |
7801 | scsi_host_set_guard(shost, phba->cfg_prot_guard); | |
bbeb79b9 | 7802 | } else |
372c187b | 7803 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
bbeb79b9 JS |
7804 | "1479 Not Registering BlockGuard with the SCSI " |
7805 | "layer, Bad protection parameters: %d %d\n", | |
7806 | old_mask, old_guard); | |
3772a991 | 7807 | } |
3772a991 JS |
7808 | } |
7809 | ||
7810 | /** | |
7811 | * lpfc_post_init_setup - Perform necessary device post initialization setup. | |
7812 | * @phba: pointer to lpfc hba data structure. | |
7813 | * | |
7814 | * This routine is invoked to perform all the necessary post initialization | |
7815 | * setup for the device. | |
7816 | **/ | |
7817 | static void | |
7818 | lpfc_post_init_setup(struct lpfc_hba *phba) | |
7819 | { | |
7820 | struct Scsi_Host *shost; | |
7821 | struct lpfc_adapter_event_header adapter_event; | |
7822 | ||
7823 | /* Get the default values for Model Name and Description */ | |
7824 | lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); | |
7825 | ||
7826 | /* | |
7827 | * hba setup may have changed the hba_queue_depth so we need to | |
7828 | * adjust the value of can_queue. | |
7829 | */ | |
7830 | shost = pci_get_drvdata(phba->pcidev); | |
7831 | shost->can_queue = phba->cfg_hba_queue_depth - 10; | |
3772a991 JS |
7832 | |
7833 | lpfc_host_attrib_init(shost); | |
7834 | ||
7835 | if (phba->cfg_poll & DISABLE_FCP_RING_INT) { | |
7836 | spin_lock_irq(shost->host_lock); | |
7837 | lpfc_poll_start_timer(phba); | |
7838 | spin_unlock_irq(shost->host_lock); | |
7839 | } | |
7840 | ||
7841 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
7842 | "0428 Perform SCSI scan\n"); | |
7843 | /* Send board arrival event to upper layer */ | |
7844 | adapter_event.event_type = FC_REG_ADAPTER_EVENT; | |
7845 | adapter_event.subcategory = LPFC_EVENT_ARRIVAL; | |
7846 | fc_host_post_vendor_event(shost, fc_get_event_number(), | |
7847 | sizeof(adapter_event), | |
7848 | (char *) &adapter_event, | |
7849 | LPFC_NL_VENDOR_ID); | |
7850 | return; | |
7851 | } | |
7852 | ||
7853 | /** | |
7854 | * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space. | |
7855 | * @phba: pointer to lpfc hba data structure. | |
7856 | * | |
7857 | * This routine is invoked to set up the PCI device memory space for device | |
7858 | * with SLI-3 interface spec. | |
7859 | * | |
7860 | * Return codes | |
af901ca1 | 7861 | * 0 - successful |
3772a991 JS |
7862 | * other values - error |
7863 | **/ | |
7864 | static int | |
7865 | lpfc_sli_pci_mem_setup(struct lpfc_hba *phba) | |
7866 | { | |
f30e1bfd | 7867 | struct pci_dev *pdev = phba->pcidev; |
3772a991 JS |
7868 | unsigned long bar0map_len, bar2map_len; |
7869 | int i, hbq_count; | |
7870 | void *ptr; | |
56de8357 | 7871 | int error; |
3772a991 | 7872 | |
f30e1bfd | 7873 | if (!pdev) |
56de8357 | 7874 | return -ENODEV; |
3772a991 JS |
7875 | |
7876 | /* Set the device DMA mask size */ | |
56de8357 HR |
7877 | error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); |
7878 | if (error) | |
7879 | error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); | |
7880 | if (error) | |
f30e1bfd | 7881 | return error; |
56de8357 | 7882 | error = -ENODEV; |
3772a991 JS |
7883 | |
7884 | /* Get the bus address of Bar0 and Bar2 and the number of bytes | |
7885 | * required by each mapping. | |
7886 | */ | |
7887 | phba->pci_bar0_map = pci_resource_start(pdev, 0); | |
7888 | bar0map_len = pci_resource_len(pdev, 0); | |
7889 | ||
7890 | phba->pci_bar2_map = pci_resource_start(pdev, 2); | |
7891 | bar2map_len = pci_resource_len(pdev, 2); | |
7892 | ||
7893 | /* Map HBA SLIM to a kernel virtual address. */ | |
7894 | phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len); | |
7895 | if (!phba->slim_memmap_p) { | |
7896 | dev_printk(KERN_ERR, &pdev->dev, | |
7897 | "ioremap failed for SLIM memory.\n"); | |
7898 | goto out; | |
7899 | } | |
7900 | ||
7901 | /* Map HBA Control Registers to a kernel virtual address. */ | |
7902 | phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len); | |
7903 | if (!phba->ctrl_regs_memmap_p) { | |
7904 | dev_printk(KERN_ERR, &pdev->dev, | |
7905 | "ioremap failed for HBA control registers.\n"); | |
7906 | goto out_iounmap_slim; | |
7907 | } | |
7908 | ||
7909 | /* Allocate memory for SLI-2 structures */ | |
750afb08 LC |
7910 | phba->slim2p.virt = dma_alloc_coherent(&pdev->dev, SLI2_SLIM_SIZE, |
7911 | &phba->slim2p.phys, GFP_KERNEL); | |
3772a991 JS |
7912 | if (!phba->slim2p.virt) |
7913 | goto out_iounmap; | |
7914 | ||
3772a991 | 7915 | phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx); |
7a470277 JS |
7916 | phba->mbox_ext = (phba->slim2p.virt + |
7917 | offsetof(struct lpfc_sli2_slim, mbx_ext_words)); | |
3772a991 JS |
7918 | phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb)); |
7919 | phba->IOCBs = (phba->slim2p.virt + | |
7920 | offsetof(struct lpfc_sli2_slim, IOCBs)); | |
7921 | ||
7922 | phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev, | |
7923 | lpfc_sli_hbq_size(), | |
7924 | &phba->hbqslimp.phys, | |
7925 | GFP_KERNEL); | |
7926 | if (!phba->hbqslimp.virt) | |
7927 | goto out_free_slim; | |
7928 | ||
7929 | hbq_count = lpfc_sli_hbq_count(); | |
7930 | ptr = phba->hbqslimp.virt; | |
7931 | for (i = 0; i < hbq_count; ++i) { | |
7932 | phba->hbqs[i].hbq_virt = ptr; | |
7933 | INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list); | |
7934 | ptr += (lpfc_hbq_defs[i]->entry_count * | |
7935 | sizeof(struct lpfc_hbq_entry)); | |
7936 | } | |
7937 | phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc; | |
7938 | phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free; | |
7939 | ||
7940 | memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size()); | |
7941 | ||
3772a991 JS |
7942 | phba->MBslimaddr = phba->slim_memmap_p; |
7943 | phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET; | |
7944 | phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET; | |
7945 | phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET; | |
7946 | phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET; | |
7947 | ||
7948 | return 0; | |
7949 | ||
7950 | out_free_slim: | |
7951 | dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, | |
7952 | phba->slim2p.virt, phba->slim2p.phys); | |
7953 | out_iounmap: | |
7954 | iounmap(phba->ctrl_regs_memmap_p); | |
7955 | out_iounmap_slim: | |
7956 | iounmap(phba->slim_memmap_p); | |
7957 | out: | |
7958 | return error; | |
7959 | } | |
7960 | ||
7961 | /** | |
7962 | * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space. | |
7963 | * @phba: pointer to lpfc hba data structure. | |
7964 | * | |
7965 | * This routine is invoked to unset the PCI device memory space for device | |
7966 | * with SLI-3 interface spec. | |
7967 | **/ | |
7968 | static void | |
7969 | lpfc_sli_pci_mem_unset(struct lpfc_hba *phba) | |
7970 | { | |
7971 | struct pci_dev *pdev; | |
7972 | ||
7973 | /* Obtain PCI device reference */ | |
7974 | if (!phba->pcidev) | |
7975 | return; | |
7976 | else | |
7977 | pdev = phba->pcidev; | |
7978 | ||
7979 | /* Free coherent DMA memory allocated */ | |
7980 | dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(), | |
7981 | phba->hbqslimp.virt, phba->hbqslimp.phys); | |
7982 | dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, | |
7983 | phba->slim2p.virt, phba->slim2p.phys); | |
7984 | ||
7985 | /* I/O memory unmap */ | |
7986 | iounmap(phba->ctrl_regs_memmap_p); | |
7987 | iounmap(phba->slim_memmap_p); | |
7988 | ||
7989 | return; | |
7990 | } | |
7991 | ||
7992 | /** | |
da0436e9 | 7993 | * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status |
3772a991 JS |
7994 | * @phba: pointer to lpfc hba data structure. |
7995 | * | |
da0436e9 JS |
7996 | * This routine is invoked to wait for SLI4 device Power On Self Test (POST) |
7997 | * done and check status. | |
3772a991 | 7998 | * |
da0436e9 | 7999 | * Return 0 if successful, otherwise -ENODEV. |
3772a991 | 8000 | **/ |
da0436e9 JS |
8001 | int |
8002 | lpfc_sli4_post_status_check(struct lpfc_hba *phba) | |
3772a991 | 8003 | { |
2fcee4bf JS |
8004 | struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg; |
8005 | struct lpfc_register reg_data; | |
8006 | int i, port_error = 0; | |
8007 | uint32_t if_type; | |
3772a991 | 8008 | |
9940b97b JS |
8009 | memset(&portsmphr_reg, 0, sizeof(portsmphr_reg)); |
8010 | memset(®_data, 0, sizeof(reg_data)); | |
2fcee4bf | 8011 | if (!phba->sli4_hba.PSMPHRregaddr) |
da0436e9 | 8012 | return -ENODEV; |
3772a991 | 8013 | |
da0436e9 JS |
8014 | /* Wait up to 30 seconds for the SLI Port POST done and ready */ |
8015 | for (i = 0; i < 3000; i++) { | |
9940b97b JS |
8016 | if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr, |
8017 | &portsmphr_reg.word0) || | |
8018 | (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) { | |
2fcee4bf | 8019 | /* Port has a fatal POST error, break out */ |
da0436e9 JS |
8020 | port_error = -ENODEV; |
8021 | break; | |
8022 | } | |
2fcee4bf JS |
8023 | if (LPFC_POST_STAGE_PORT_READY == |
8024 | bf_get(lpfc_port_smphr_port_status, &portsmphr_reg)) | |
da0436e9 | 8025 | break; |
da0436e9 | 8026 | msleep(10); |
3772a991 JS |
8027 | } |
8028 | ||
2fcee4bf JS |
8029 | /* |
8030 | * If there was a port error during POST, then don't proceed with | |
8031 | * other register reads as the data may not be valid. Just exit. | |
8032 | */ | |
8033 | if (port_error) { | |
372c187b | 8034 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
2fcee4bf JS |
8035 | "1408 Port Failed POST - portsmphr=0x%x, " |
8036 | "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, " | |
8037 | "scr2=x%x, hscratch=x%x, pstatus=x%x\n", | |
8038 | portsmphr_reg.word0, | |
8039 | bf_get(lpfc_port_smphr_perr, &portsmphr_reg), | |
8040 | bf_get(lpfc_port_smphr_sfi, &portsmphr_reg), | |
8041 | bf_get(lpfc_port_smphr_nip, &portsmphr_reg), | |
8042 | bf_get(lpfc_port_smphr_ipc, &portsmphr_reg), | |
8043 | bf_get(lpfc_port_smphr_scr1, &portsmphr_reg), | |
8044 | bf_get(lpfc_port_smphr_scr2, &portsmphr_reg), | |
8045 | bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg), | |
8046 | bf_get(lpfc_port_smphr_port_status, &portsmphr_reg)); | |
8047 | } else { | |
28baac74 | 8048 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
2fcee4bf JS |
8049 | "2534 Device Info: SLIFamily=0x%x, " |
8050 | "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, " | |
8051 | "SLIHint_2=0x%x, FT=0x%x\n", | |
28baac74 JS |
8052 | bf_get(lpfc_sli_intf_sli_family, |
8053 | &phba->sli4_hba.sli_intf), | |
8054 | bf_get(lpfc_sli_intf_slirev, | |
8055 | &phba->sli4_hba.sli_intf), | |
085c647c JS |
8056 | bf_get(lpfc_sli_intf_if_type, |
8057 | &phba->sli4_hba.sli_intf), | |
8058 | bf_get(lpfc_sli_intf_sli_hint1, | |
28baac74 | 8059 | &phba->sli4_hba.sli_intf), |
085c647c JS |
8060 | bf_get(lpfc_sli_intf_sli_hint2, |
8061 | &phba->sli4_hba.sli_intf), | |
8062 | bf_get(lpfc_sli_intf_func_type, | |
28baac74 | 8063 | &phba->sli4_hba.sli_intf)); |
2fcee4bf JS |
8064 | /* |
8065 | * Check for other Port errors during the initialization | |
8066 | * process. Fail the load if the port did not come up | |
8067 | * correctly. | |
8068 | */ | |
8069 | if_type = bf_get(lpfc_sli_intf_if_type, | |
8070 | &phba->sli4_hba.sli_intf); | |
8071 | switch (if_type) { | |
8072 | case LPFC_SLI_INTF_IF_TYPE_0: | |
8073 | phba->sli4_hba.ue_mask_lo = | |
8074 | readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr); | |
8075 | phba->sli4_hba.ue_mask_hi = | |
8076 | readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr); | |
8077 | uerrlo_reg.word0 = | |
8078 | readl(phba->sli4_hba.u.if_type0.UERRLOregaddr); | |
8079 | uerrhi_reg.word0 = | |
8080 | readl(phba->sli4_hba.u.if_type0.UERRHIregaddr); | |
8081 | if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) || | |
8082 | (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) { | |
372c187b DK |
8083 | lpfc_printf_log(phba, KERN_ERR, |
8084 | LOG_TRACE_EVENT, | |
2fcee4bf JS |
8085 | "1422 Unrecoverable Error " |
8086 | "Detected during POST " | |
8087 | "uerr_lo_reg=0x%x, " | |
8088 | "uerr_hi_reg=0x%x, " | |
8089 | "ue_mask_lo_reg=0x%x, " | |
8090 | "ue_mask_hi_reg=0x%x\n", | |
8091 | uerrlo_reg.word0, | |
8092 | uerrhi_reg.word0, | |
8093 | phba->sli4_hba.ue_mask_lo, | |
8094 | phba->sli4_hba.ue_mask_hi); | |
8095 | port_error = -ENODEV; | |
8096 | } | |
8097 | break; | |
8098 | case LPFC_SLI_INTF_IF_TYPE_2: | |
27d6ac0a | 8099 | case LPFC_SLI_INTF_IF_TYPE_6: |
2fcee4bf | 8100 | /* Final checks. The port status should be clean. */ |
9940b97b JS |
8101 | if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr, |
8102 | ®_data.word0) || | |
0558056c JS |
8103 | (bf_get(lpfc_sliport_status_err, ®_data) && |
8104 | !bf_get(lpfc_sliport_status_rn, ®_data))) { | |
2fcee4bf JS |
8105 | phba->work_status[0] = |
8106 | readl(phba->sli4_hba.u.if_type2. | |
8107 | ERR1regaddr); | |
8108 | phba->work_status[1] = | |
8109 | readl(phba->sli4_hba.u.if_type2. | |
8110 | ERR2regaddr); | |
372c187b | 8111 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
8fcb8acd JS |
8112 | "2888 Unrecoverable port error " |
8113 | "following POST: port status reg " | |
8114 | "0x%x, port_smphr reg 0x%x, " | |
2fcee4bf JS |
8115 | "error 1=0x%x, error 2=0x%x\n", |
8116 | reg_data.word0, | |
8117 | portsmphr_reg.word0, | |
8118 | phba->work_status[0], | |
8119 | phba->work_status[1]); | |
8120 | port_error = -ENODEV; | |
8121 | } | |
8122 | break; | |
8123 | case LPFC_SLI_INTF_IF_TYPE_1: | |
8124 | default: | |
8125 | break; | |
8126 | } | |
28baac74 | 8127 | } |
da0436e9 JS |
8128 | return port_error; |
8129 | } | |
3772a991 | 8130 | |
da0436e9 JS |
8131 | /** |
8132 | * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map. | |
8133 | * @phba: pointer to lpfc hba data structure. | |
2fcee4bf | 8134 | * @if_type: The SLI4 interface type getting configured. |
da0436e9 JS |
8135 | * |
8136 | * This routine is invoked to set up SLI4 BAR0 PCI config space register | |
8137 | * memory map. | |
8138 | **/ | |
8139 | static void | |
2fcee4bf JS |
8140 | lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type) |
8141 | { | |
8142 | switch (if_type) { | |
8143 | case LPFC_SLI_INTF_IF_TYPE_0: | |
8144 | phba->sli4_hba.u.if_type0.UERRLOregaddr = | |
8145 | phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO; | |
8146 | phba->sli4_hba.u.if_type0.UERRHIregaddr = | |
8147 | phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI; | |
8148 | phba->sli4_hba.u.if_type0.UEMASKLOregaddr = | |
8149 | phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO; | |
8150 | phba->sli4_hba.u.if_type0.UEMASKHIregaddr = | |
8151 | phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI; | |
8152 | phba->sli4_hba.SLIINTFregaddr = | |
8153 | phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF; | |
8154 | break; | |
8155 | case LPFC_SLI_INTF_IF_TYPE_2: | |
0cf07f84 JS |
8156 | phba->sli4_hba.u.if_type2.EQDregaddr = |
8157 | phba->sli4_hba.conf_regs_memmap_p + | |
8158 | LPFC_CTL_PORT_EQ_DELAY_OFFSET; | |
2fcee4bf | 8159 | phba->sli4_hba.u.if_type2.ERR1regaddr = |
88a2cfbb JS |
8160 | phba->sli4_hba.conf_regs_memmap_p + |
8161 | LPFC_CTL_PORT_ER1_OFFSET; | |
2fcee4bf | 8162 | phba->sli4_hba.u.if_type2.ERR2regaddr = |
88a2cfbb JS |
8163 | phba->sli4_hba.conf_regs_memmap_p + |
8164 | LPFC_CTL_PORT_ER2_OFFSET; | |
2fcee4bf | 8165 | phba->sli4_hba.u.if_type2.CTRLregaddr = |
88a2cfbb JS |
8166 | phba->sli4_hba.conf_regs_memmap_p + |
8167 | LPFC_CTL_PORT_CTL_OFFSET; | |
2fcee4bf | 8168 | phba->sli4_hba.u.if_type2.STATUSregaddr = |
88a2cfbb JS |
8169 | phba->sli4_hba.conf_regs_memmap_p + |
8170 | LPFC_CTL_PORT_STA_OFFSET; | |
2fcee4bf JS |
8171 | phba->sli4_hba.SLIINTFregaddr = |
8172 | phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF; | |
8173 | phba->sli4_hba.PSMPHRregaddr = | |
88a2cfbb JS |
8174 | phba->sli4_hba.conf_regs_memmap_p + |
8175 | LPFC_CTL_PORT_SEM_OFFSET; | |
2fcee4bf | 8176 | phba->sli4_hba.RQDBregaddr = |
962bc51b JS |
8177 | phba->sli4_hba.conf_regs_memmap_p + |
8178 | LPFC_ULP0_RQ_DOORBELL; | |
2fcee4bf | 8179 | phba->sli4_hba.WQDBregaddr = |
962bc51b JS |
8180 | phba->sli4_hba.conf_regs_memmap_p + |
8181 | LPFC_ULP0_WQ_DOORBELL; | |
9dd35425 | 8182 | phba->sli4_hba.CQDBregaddr = |
2fcee4bf | 8183 | phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL; |
9dd35425 | 8184 | phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr; |
2fcee4bf JS |
8185 | phba->sli4_hba.MQDBregaddr = |
8186 | phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL; | |
8187 | phba->sli4_hba.BMBXregaddr = | |
8188 | phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX; | |
8189 | break; | |
27d6ac0a JS |
8190 | case LPFC_SLI_INTF_IF_TYPE_6: |
8191 | phba->sli4_hba.u.if_type2.EQDregaddr = | |
8192 | phba->sli4_hba.conf_regs_memmap_p + | |
8193 | LPFC_CTL_PORT_EQ_DELAY_OFFSET; | |
8194 | phba->sli4_hba.u.if_type2.ERR1regaddr = | |
8195 | phba->sli4_hba.conf_regs_memmap_p + | |
8196 | LPFC_CTL_PORT_ER1_OFFSET; | |
8197 | phba->sli4_hba.u.if_type2.ERR2regaddr = | |
8198 | phba->sli4_hba.conf_regs_memmap_p + | |
8199 | LPFC_CTL_PORT_ER2_OFFSET; | |
8200 | phba->sli4_hba.u.if_type2.CTRLregaddr = | |
8201 | phba->sli4_hba.conf_regs_memmap_p + | |
8202 | LPFC_CTL_PORT_CTL_OFFSET; | |
8203 | phba->sli4_hba.u.if_type2.STATUSregaddr = | |
8204 | phba->sli4_hba.conf_regs_memmap_p + | |
8205 | LPFC_CTL_PORT_STA_OFFSET; | |
8206 | phba->sli4_hba.PSMPHRregaddr = | |
8207 | phba->sli4_hba.conf_regs_memmap_p + | |
8208 | LPFC_CTL_PORT_SEM_OFFSET; | |
8209 | phba->sli4_hba.BMBXregaddr = | |
8210 | phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX; | |
8211 | break; | |
2fcee4bf JS |
8212 | case LPFC_SLI_INTF_IF_TYPE_1: |
8213 | default: | |
8214 | dev_printk(KERN_ERR, &phba->pcidev->dev, | |
8215 | "FATAL - unsupported SLI4 interface type - %d\n", | |
8216 | if_type); | |
8217 | break; | |
8218 | } | |
da0436e9 | 8219 | } |
3772a991 | 8220 | |
da0436e9 JS |
8221 | /** |
8222 | * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map. | |
8223 | * @phba: pointer to lpfc hba data structure. | |
fe614acd | 8224 | * @if_type: sli if type to operate on. |
da0436e9 | 8225 | * |
27d6ac0a | 8226 | * This routine is invoked to set up SLI4 BAR1 register memory map. |
da0436e9 JS |
8227 | **/ |
8228 | static void | |
27d6ac0a | 8229 | lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba, uint32_t if_type) |
da0436e9 | 8230 | { |
27d6ac0a JS |
8231 | switch (if_type) { |
8232 | case LPFC_SLI_INTF_IF_TYPE_0: | |
8233 | phba->sli4_hba.PSMPHRregaddr = | |
8234 | phba->sli4_hba.ctrl_regs_memmap_p + | |
8235 | LPFC_SLIPORT_IF0_SMPHR; | |
8236 | phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + | |
8237 | LPFC_HST_ISR0; | |
8238 | phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + | |
8239 | LPFC_HST_IMR0; | |
8240 | phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + | |
8241 | LPFC_HST_ISCR0; | |
8242 | break; | |
8243 | case LPFC_SLI_INTF_IF_TYPE_6: | |
8244 | phba->sli4_hba.RQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + | |
8245 | LPFC_IF6_RQ_DOORBELL; | |
8246 | phba->sli4_hba.WQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + | |
8247 | LPFC_IF6_WQ_DOORBELL; | |
8248 | phba->sli4_hba.CQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + | |
8249 | LPFC_IF6_CQ_DOORBELL; | |
8250 | phba->sli4_hba.EQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + | |
8251 | LPFC_IF6_EQ_DOORBELL; | |
8252 | phba->sli4_hba.MQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + | |
8253 | LPFC_IF6_MQ_DOORBELL; | |
8254 | break; | |
8255 | case LPFC_SLI_INTF_IF_TYPE_2: | |
8256 | case LPFC_SLI_INTF_IF_TYPE_1: | |
8257 | default: | |
8258 | dev_err(&phba->pcidev->dev, | |
8259 | "FATAL - unsupported SLI4 interface type - %d\n", | |
8260 | if_type); | |
8261 | break; | |
8262 | } | |
3772a991 JS |
8263 | } |
8264 | ||
8265 | /** | |
da0436e9 | 8266 | * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map. |
3772a991 | 8267 | * @phba: pointer to lpfc hba data structure. |
da0436e9 | 8268 | * @vf: virtual function number |
3772a991 | 8269 | * |
da0436e9 JS |
8270 | * This routine is invoked to set up SLI4 BAR2 doorbell register memory map |
8271 | * based on the given viftual function number, @vf. | |
8272 | * | |
8273 | * Return 0 if successful, otherwise -ENODEV. | |
3772a991 | 8274 | **/ |
da0436e9 JS |
8275 | static int |
8276 | lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf) | |
3772a991 | 8277 | { |
da0436e9 JS |
8278 | if (vf > LPFC_VIR_FUNC_MAX) |
8279 | return -ENODEV; | |
3772a991 | 8280 | |
da0436e9 | 8281 | phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + |
962bc51b JS |
8282 | vf * LPFC_VFR_PAGE_SIZE + |
8283 | LPFC_ULP0_RQ_DOORBELL); | |
da0436e9 | 8284 | phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + |
962bc51b JS |
8285 | vf * LPFC_VFR_PAGE_SIZE + |
8286 | LPFC_ULP0_WQ_DOORBELL); | |
9dd35425 JS |
8287 | phba->sli4_hba.CQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + |
8288 | vf * LPFC_VFR_PAGE_SIZE + | |
8289 | LPFC_EQCQ_DOORBELL); | |
8290 | phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr; | |
da0436e9 JS |
8291 | phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + |
8292 | vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL); | |
8293 | phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p + | |
8294 | vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX); | |
8295 | return 0; | |
3772a991 JS |
8296 | } |
8297 | ||
8298 | /** | |
da0436e9 | 8299 | * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox |
3772a991 JS |
8300 | * @phba: pointer to lpfc hba data structure. |
8301 | * | |
da0436e9 JS |
8302 | * This routine is invoked to create the bootstrap mailbox |
8303 | * region consistent with the SLI-4 interface spec. This | |
8304 | * routine allocates all memory necessary to communicate | |
8305 | * mailbox commands to the port and sets up all alignment | |
8306 | * needs. No locks are expected to be held when calling | |
8307 | * this routine. | |
3772a991 JS |
8308 | * |
8309 | * Return codes | |
af901ca1 | 8310 | * 0 - successful |
d439d286 | 8311 | * -ENOMEM - could not allocated memory. |
da0436e9 | 8312 | **/ |
3772a991 | 8313 | static int |
da0436e9 | 8314 | lpfc_create_bootstrap_mbox(struct lpfc_hba *phba) |
3772a991 | 8315 | { |
da0436e9 JS |
8316 | uint32_t bmbx_size; |
8317 | struct lpfc_dmabuf *dmabuf; | |
8318 | struct dma_address *dma_address; | |
8319 | uint32_t pa_addr; | |
8320 | uint64_t phys_addr; | |
8321 | ||
8322 | dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); | |
8323 | if (!dmabuf) | |
8324 | return -ENOMEM; | |
3772a991 | 8325 | |
da0436e9 JS |
8326 | /* |
8327 | * The bootstrap mailbox region is comprised of 2 parts | |
8328 | * plus an alignment restriction of 16 bytes. | |
8329 | */ | |
8330 | bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1); | |
750afb08 LC |
8331 | dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, bmbx_size, |
8332 | &dmabuf->phys, GFP_KERNEL); | |
da0436e9 JS |
8333 | if (!dmabuf->virt) { |
8334 | kfree(dmabuf); | |
8335 | return -ENOMEM; | |
3772a991 JS |
8336 | } |
8337 | ||
da0436e9 JS |
8338 | /* |
8339 | * Initialize the bootstrap mailbox pointers now so that the register | |
8340 | * operations are simple later. The mailbox dma address is required | |
8341 | * to be 16-byte aligned. Also align the virtual memory as each | |
8342 | * maibox is copied into the bmbx mailbox region before issuing the | |
8343 | * command to the port. | |
8344 | */ | |
8345 | phba->sli4_hba.bmbx.dmabuf = dmabuf; | |
8346 | phba->sli4_hba.bmbx.bmbx_size = bmbx_size; | |
8347 | ||
8348 | phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt, | |
8349 | LPFC_ALIGN_16_BYTE); | |
8350 | phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys, | |
8351 | LPFC_ALIGN_16_BYTE); | |
8352 | ||
8353 | /* | |
8354 | * Set the high and low physical addresses now. The SLI4 alignment | |
8355 | * requirement is 16 bytes and the mailbox is posted to the port | |
8356 | * as two 30-bit addresses. The other data is a bit marking whether | |
8357 | * the 30-bit address is the high or low address. | |
8358 | * Upcast bmbx aphys to 64bits so shift instruction compiles | |
8359 | * clean on 32 bit machines. | |
8360 | */ | |
8361 | dma_address = &phba->sli4_hba.bmbx.dma_address; | |
8362 | phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys; | |
8363 | pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff); | |
8364 | dma_address->addr_hi = (uint32_t) ((pa_addr << 2) | | |
8365 | LPFC_BMBX_BIT1_ADDR_HI); | |
8366 | ||
8367 | pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff); | |
8368 | dma_address->addr_lo = (uint32_t) ((pa_addr << 2) | | |
8369 | LPFC_BMBX_BIT1_ADDR_LO); | |
8370 | return 0; | |
3772a991 JS |
8371 | } |
8372 | ||
8373 | /** | |
da0436e9 | 8374 | * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources |
3772a991 JS |
8375 | * @phba: pointer to lpfc hba data structure. |
8376 | * | |
da0436e9 JS |
8377 | * This routine is invoked to teardown the bootstrap mailbox |
8378 | * region and release all host resources. This routine requires | |
8379 | * the caller to ensure all mailbox commands recovered, no | |
8380 | * additional mailbox comands are sent, and interrupts are disabled | |
8381 | * before calling this routine. | |
8382 | * | |
8383 | **/ | |
3772a991 | 8384 | static void |
da0436e9 | 8385 | lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba) |
3772a991 | 8386 | { |
da0436e9 JS |
8387 | dma_free_coherent(&phba->pcidev->dev, |
8388 | phba->sli4_hba.bmbx.bmbx_size, | |
8389 | phba->sli4_hba.bmbx.dmabuf->virt, | |
8390 | phba->sli4_hba.bmbx.dmabuf->phys); | |
8391 | ||
8392 | kfree(phba->sli4_hba.bmbx.dmabuf); | |
8393 | memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx)); | |
3772a991 JS |
8394 | } |
8395 | ||
83c6cb1a JS |
8396 | static const char * const lpfc_topo_to_str[] = { |
8397 | "Loop then P2P", | |
8398 | "Loopback", | |
8399 | "P2P Only", | |
8400 | "Unsupported", | |
8401 | "Loop Only", | |
8402 | "Unsupported", | |
8403 | "P2P then Loop", | |
8404 | }; | |
8405 | ||
fe614acd LJ |
8406 | #define LINK_FLAGS_DEF 0x0 |
8407 | #define LINK_FLAGS_P2P 0x1 | |
8408 | #define LINK_FLAGS_LOOP 0x2 | |
83c6cb1a JS |
8409 | /** |
8410 | * lpfc_map_topology - Map the topology read from READ_CONFIG | |
8411 | * @phba: pointer to lpfc hba data structure. | |
fe614acd | 8412 | * @rd_config: pointer to read config data |
83c6cb1a JS |
8413 | * |
8414 | * This routine is invoked to map the topology values as read | |
8415 | * from the read config mailbox command. If the persistent | |
8416 | * topology feature is supported, the firmware will provide the | |
8417 | * saved topology information to be used in INIT_LINK | |
83c6cb1a | 8418 | **/ |
83c6cb1a JS |
8419 | static void |
8420 | lpfc_map_topology(struct lpfc_hba *phba, struct lpfc_mbx_read_config *rd_config) | |
8421 | { | |
8422 | u8 ptv, tf, pt; | |
8423 | ||
8424 | ptv = bf_get(lpfc_mbx_rd_conf_ptv, rd_config); | |
8425 | tf = bf_get(lpfc_mbx_rd_conf_tf, rd_config); | |
8426 | pt = bf_get(lpfc_mbx_rd_conf_pt, rd_config); | |
8427 | ||
8428 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
8429 | "2027 Read Config Data : ptv:0x%x, tf:0x%x pt:0x%x", | |
8430 | ptv, tf, pt); | |
8431 | if (!ptv) { | |
8432 | lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, | |
8433 | "2019 FW does not support persistent topology " | |
8434 | "Using driver parameter defined value [%s]", | |
8435 | lpfc_topo_to_str[phba->cfg_topology]); | |
8436 | return; | |
8437 | } | |
8438 | /* FW supports persistent topology - override module parameter value */ | |
8439 | phba->hba_flag |= HBA_PERSISTENT_TOPO; | |
8440 | switch (phba->pcidev->device) { | |
8441 | case PCI_DEVICE_ID_LANCER_G7_FC: | |
83c6cb1a JS |
8442 | case PCI_DEVICE_ID_LANCER_G6_FC: |
8443 | if (!tf) { | |
8444 | phba->cfg_topology = ((pt == LINK_FLAGS_LOOP) | |
8445 | ? FLAGS_TOPOLOGY_MODE_LOOP | |
8446 | : FLAGS_TOPOLOGY_MODE_PT_PT); | |
8447 | } else { | |
8448 | phba->hba_flag &= ~HBA_PERSISTENT_TOPO; | |
8449 | } | |
8450 | break; | |
8451 | default: /* G5 */ | |
8452 | if (tf) { | |
8453 | /* If topology failover set - pt is '0' or '1' */ | |
8454 | phba->cfg_topology = (pt ? FLAGS_TOPOLOGY_MODE_PT_LOOP : | |
8455 | FLAGS_TOPOLOGY_MODE_LOOP_PT); | |
8456 | } else { | |
8457 | phba->cfg_topology = ((pt == LINK_FLAGS_P2P) | |
8458 | ? FLAGS_TOPOLOGY_MODE_PT_PT | |
8459 | : FLAGS_TOPOLOGY_MODE_LOOP); | |
8460 | } | |
8461 | break; | |
8462 | } | |
8463 | if (phba->hba_flag & HBA_PERSISTENT_TOPO) { | |
8464 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
8465 | "2020 Using persistent topology value [%s]", | |
8466 | lpfc_topo_to_str[phba->cfg_topology]); | |
8467 | } else { | |
8468 | lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, | |
8469 | "2021 Invalid topology values from FW " | |
8470 | "Using driver parameter defined value [%s]", | |
8471 | lpfc_topo_to_str[phba->cfg_topology]); | |
8472 | } | |
8473 | } | |
8474 | ||
3772a991 | 8475 | /** |
da0436e9 | 8476 | * lpfc_sli4_read_config - Get the config parameters. |
3772a991 JS |
8477 | * @phba: pointer to lpfc hba data structure. |
8478 | * | |
da0436e9 JS |
8479 | * This routine is invoked to read the configuration parameters from the HBA. |
8480 | * The configuration parameters are used to set the base and maximum values | |
8481 | * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource | |
8482 | * allocation for the port. | |
3772a991 JS |
8483 | * |
8484 | * Return codes | |
af901ca1 | 8485 | * 0 - successful |
25985edc | 8486 | * -ENOMEM - No available memory |
d439d286 | 8487 | * -EIO - The mailbox failed to complete successfully. |
3772a991 | 8488 | **/ |
ff78d8f9 | 8489 | int |
da0436e9 | 8490 | lpfc_sli4_read_config(struct lpfc_hba *phba) |
3772a991 | 8491 | { |
da0436e9 JS |
8492 | LPFC_MBOXQ_t *pmb; |
8493 | struct lpfc_mbx_read_config *rd_config; | |
912e3acd JS |
8494 | union lpfc_sli4_cfg_shdr *shdr; |
8495 | uint32_t shdr_status, shdr_add_status; | |
8496 | struct lpfc_mbx_get_func_cfg *get_func_cfg; | |
8497 | struct lpfc_rsrc_desc_fcfcoe *desc; | |
8aa134a8 | 8498 | char *pdesc_0; |
c691816e | 8499 | uint16_t forced_link_speed; |
6a828b0f | 8500 | uint32_t if_type, qmin; |
8aa134a8 | 8501 | int length, i, rc = 0, rc2; |
3772a991 | 8502 | |
da0436e9 JS |
8503 | pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); |
8504 | if (!pmb) { | |
372c187b | 8505 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
da0436e9 JS |
8506 | "2011 Unable to allocate memory for issuing " |
8507 | "SLI_CONFIG_SPECIAL mailbox command\n"); | |
8508 | return -ENOMEM; | |
3772a991 JS |
8509 | } |
8510 | ||
da0436e9 | 8511 | lpfc_read_config(phba, pmb); |
3772a991 | 8512 | |
da0436e9 JS |
8513 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); |
8514 | if (rc != MBX_SUCCESS) { | |
372c187b DK |
8515 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
8516 | "2012 Mailbox failed , mbxCmd x%x " | |
8517 | "READ_CONFIG, mbxStatus x%x\n", | |
8518 | bf_get(lpfc_mqe_command, &pmb->u.mqe), | |
8519 | bf_get(lpfc_mqe_status, &pmb->u.mqe)); | |
da0436e9 JS |
8520 | rc = -EIO; |
8521 | } else { | |
8522 | rd_config = &pmb->u.mqe.un.rd_config; | |
ff78d8f9 JS |
8523 | if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) { |
8524 | phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL; | |
8525 | phba->sli4_hba.lnk_info.lnk_tp = | |
8526 | bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config); | |
8527 | phba->sli4_hba.lnk_info.lnk_no = | |
8528 | bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config); | |
8529 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
8530 | "3081 lnk_type:%d, lnk_numb:%d\n", | |
8531 | phba->sli4_hba.lnk_info.lnk_tp, | |
8532 | phba->sli4_hba.lnk_info.lnk_no); | |
8533 | } else | |
8534 | lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, | |
8535 | "3082 Mailbox (x%x) returned ldv:x0\n", | |
8536 | bf_get(lpfc_mqe_command, &pmb->u.mqe)); | |
44fd7fe3 JS |
8537 | if (bf_get(lpfc_mbx_rd_conf_bbscn_def, rd_config)) { |
8538 | phba->bbcredit_support = 1; | |
8539 | phba->sli4_hba.bbscn_params.word0 = rd_config->word8; | |
8540 | } | |
8541 | ||
1dc5ec24 JS |
8542 | phba->sli4_hba.conf_trunk = |
8543 | bf_get(lpfc_mbx_rd_conf_trunk, rd_config); | |
6d368e53 JS |
8544 | phba->sli4_hba.extents_in_use = |
8545 | bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config); | |
da0436e9 JS |
8546 | phba->sli4_hba.max_cfg_param.max_xri = |
8547 | bf_get(lpfc_mbx_rd_conf_xri_count, rd_config); | |
31f06d2e JS |
8548 | /* Reduce resource usage in kdump environment */ |
8549 | if (is_kdump_kernel() && | |
8550 | phba->sli4_hba.max_cfg_param.max_xri > 512) | |
8551 | phba->sli4_hba.max_cfg_param.max_xri = 512; | |
da0436e9 JS |
8552 | phba->sli4_hba.max_cfg_param.xri_base = |
8553 | bf_get(lpfc_mbx_rd_conf_xri_base, rd_config); | |
8554 | phba->sli4_hba.max_cfg_param.max_vpi = | |
8555 | bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config); | |
8b47ae69 JS |
8556 | /* Limit the max we support */ |
8557 | if (phba->sli4_hba.max_cfg_param.max_vpi > LPFC_MAX_VPORTS) | |
8558 | phba->sli4_hba.max_cfg_param.max_vpi = LPFC_MAX_VPORTS; | |
da0436e9 JS |
8559 | phba->sli4_hba.max_cfg_param.vpi_base = |
8560 | bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config); | |
8561 | phba->sli4_hba.max_cfg_param.max_rpi = | |
8562 | bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config); | |
8563 | phba->sli4_hba.max_cfg_param.rpi_base = | |
8564 | bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config); | |
8565 | phba->sli4_hba.max_cfg_param.max_vfi = | |
8566 | bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config); | |
8567 | phba->sli4_hba.max_cfg_param.vfi_base = | |
8568 | bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config); | |
8569 | phba->sli4_hba.max_cfg_param.max_fcfi = | |
8570 | bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config); | |
da0436e9 JS |
8571 | phba->sli4_hba.max_cfg_param.max_eq = |
8572 | bf_get(lpfc_mbx_rd_conf_eq_count, rd_config); | |
8573 | phba->sli4_hba.max_cfg_param.max_rq = | |
8574 | bf_get(lpfc_mbx_rd_conf_rq_count, rd_config); | |
8575 | phba->sli4_hba.max_cfg_param.max_wq = | |
8576 | bf_get(lpfc_mbx_rd_conf_wq_count, rd_config); | |
8577 | phba->sli4_hba.max_cfg_param.max_cq = | |
8578 | bf_get(lpfc_mbx_rd_conf_cq_count, rd_config); | |
8579 | phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config); | |
8580 | phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base; | |
8581 | phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base; | |
8582 | phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base; | |
5ffc266e JS |
8583 | phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ? |
8584 | (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0; | |
da0436e9 | 8585 | phba->max_vports = phba->max_vpi; |
83c6cb1a | 8586 | lpfc_map_topology(phba, rd_config); |
da0436e9 | 8587 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, |
6d368e53 JS |
8588 | "2003 cfg params Extents? %d " |
8589 | "XRI(B:%d M:%d), " | |
da0436e9 JS |
8590 | "VPI(B:%d M:%d) " |
8591 | "VFI(B:%d M:%d) " | |
8592 | "RPI(B:%d M:%d) " | |
a1e4d3d8 | 8593 | "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d lmt:x%x\n", |
6d368e53 | 8594 | phba->sli4_hba.extents_in_use, |
da0436e9 JS |
8595 | phba->sli4_hba.max_cfg_param.xri_base, |
8596 | phba->sli4_hba.max_cfg_param.max_xri, | |
8597 | phba->sli4_hba.max_cfg_param.vpi_base, | |
8598 | phba->sli4_hba.max_cfg_param.max_vpi, | |
8599 | phba->sli4_hba.max_cfg_param.vfi_base, | |
8600 | phba->sli4_hba.max_cfg_param.max_vfi, | |
8601 | phba->sli4_hba.max_cfg_param.rpi_base, | |
8602 | phba->sli4_hba.max_cfg_param.max_rpi, | |
2ea259ee JS |
8603 | phba->sli4_hba.max_cfg_param.max_fcfi, |
8604 | phba->sli4_hba.max_cfg_param.max_eq, | |
8605 | phba->sli4_hba.max_cfg_param.max_cq, | |
8606 | phba->sli4_hba.max_cfg_param.max_wq, | |
a1e4d3d8 DK |
8607 | phba->sli4_hba.max_cfg_param.max_rq, |
8608 | phba->lmt); | |
2ea259ee | 8609 | |
d38f33b3 | 8610 | /* |
6a828b0f JS |
8611 | * Calculate queue resources based on how |
8612 | * many WQ/CQ/EQs are available. | |
d38f33b3 | 8613 | */ |
6a828b0f JS |
8614 | qmin = phba->sli4_hba.max_cfg_param.max_wq; |
8615 | if (phba->sli4_hba.max_cfg_param.max_cq < qmin) | |
8616 | qmin = phba->sli4_hba.max_cfg_param.max_cq; | |
8617 | if (phba->sli4_hba.max_cfg_param.max_eq < qmin) | |
8618 | qmin = phba->sli4_hba.max_cfg_param.max_eq; | |
8619 | /* | |
8620 | * Whats left after this can go toward NVME / FCP. | |
8621 | * The minus 4 accounts for ELS, NVME LS, MBOX | |
8622 | * plus one extra. When configured for | |
8623 | * NVMET, FCP io channel WQs are not created. | |
8624 | */ | |
8625 | qmin -= 4; | |
d38f33b3 | 8626 | |
6a828b0f JS |
8627 | /* Check to see if there is enough for NVME */ |
8628 | if ((phba->cfg_irq_chann > qmin) || | |
8629 | (phba->cfg_hdw_queue > qmin)) { | |
372c187b | 8630 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
9e3e365a DK |
8631 | "2005 Reducing Queues - " |
8632 | "FW resource limitation: " | |
6a828b0f JS |
8633 | "WQ %d CQ %d EQ %d: min %d: " |
8634 | "IRQ %d HDWQ %d\n", | |
d38f33b3 JS |
8635 | phba->sli4_hba.max_cfg_param.max_wq, |
8636 | phba->sli4_hba.max_cfg_param.max_cq, | |
6a828b0f JS |
8637 | phba->sli4_hba.max_cfg_param.max_eq, |
8638 | qmin, phba->cfg_irq_chann, | |
cdb42bec | 8639 | phba->cfg_hdw_queue); |
d38f33b3 | 8640 | |
6a828b0f JS |
8641 | if (phba->cfg_irq_chann > qmin) |
8642 | phba->cfg_irq_chann = qmin; | |
8643 | if (phba->cfg_hdw_queue > qmin) | |
8644 | phba->cfg_hdw_queue = qmin; | |
d38f33b3 | 8645 | } |
3772a991 | 8646 | } |
912e3acd JS |
8647 | |
8648 | if (rc) | |
8649 | goto read_cfg_out; | |
da0436e9 | 8650 | |
c691816e JS |
8651 | /* Update link speed if forced link speed is supported */ |
8652 | if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); | |
27d6ac0a | 8653 | if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) { |
c691816e JS |
8654 | forced_link_speed = |
8655 | bf_get(lpfc_mbx_rd_conf_link_speed, rd_config); | |
8656 | if (forced_link_speed) { | |
8657 | phba->hba_flag |= HBA_FORCED_LINK_SPEED; | |
8658 | ||
8659 | switch (forced_link_speed) { | |
8660 | case LINK_SPEED_1G: | |
8661 | phba->cfg_link_speed = | |
8662 | LPFC_USER_LINK_SPEED_1G; | |
8663 | break; | |
8664 | case LINK_SPEED_2G: | |
8665 | phba->cfg_link_speed = | |
8666 | LPFC_USER_LINK_SPEED_2G; | |
8667 | break; | |
8668 | case LINK_SPEED_4G: | |
8669 | phba->cfg_link_speed = | |
8670 | LPFC_USER_LINK_SPEED_4G; | |
8671 | break; | |
8672 | case LINK_SPEED_8G: | |
8673 | phba->cfg_link_speed = | |
8674 | LPFC_USER_LINK_SPEED_8G; | |
8675 | break; | |
8676 | case LINK_SPEED_10G: | |
8677 | phba->cfg_link_speed = | |
8678 | LPFC_USER_LINK_SPEED_10G; | |
8679 | break; | |
8680 | case LINK_SPEED_16G: | |
8681 | phba->cfg_link_speed = | |
8682 | LPFC_USER_LINK_SPEED_16G; | |
8683 | break; | |
8684 | case LINK_SPEED_32G: | |
8685 | phba->cfg_link_speed = | |
8686 | LPFC_USER_LINK_SPEED_32G; | |
8687 | break; | |
fbd8a6ba JS |
8688 | case LINK_SPEED_64G: |
8689 | phba->cfg_link_speed = | |
8690 | LPFC_USER_LINK_SPEED_64G; | |
8691 | break; | |
c691816e JS |
8692 | case 0xffff: |
8693 | phba->cfg_link_speed = | |
8694 | LPFC_USER_LINK_SPEED_AUTO; | |
8695 | break; | |
8696 | default: | |
372c187b DK |
8697 | lpfc_printf_log(phba, KERN_ERR, |
8698 | LOG_TRACE_EVENT, | |
c691816e JS |
8699 | "0047 Unrecognized link " |
8700 | "speed : %d\n", | |
8701 | forced_link_speed); | |
8702 | phba->cfg_link_speed = | |
8703 | LPFC_USER_LINK_SPEED_AUTO; | |
8704 | } | |
8705 | } | |
8706 | } | |
8707 | ||
da0436e9 | 8708 | /* Reset the DFT_HBA_Q_DEPTH to the max xri */ |
572709e2 JS |
8709 | length = phba->sli4_hba.max_cfg_param.max_xri - |
8710 | lpfc_sli4_get_els_iocb_cnt(phba); | |
8711 | if (phba->cfg_hba_queue_depth > length) { | |
8712 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
8713 | "3361 HBA queue depth changed from %d to %d\n", | |
8714 | phba->cfg_hba_queue_depth, length); | |
8715 | phba->cfg_hba_queue_depth = length; | |
8716 | } | |
912e3acd | 8717 | |
27d6ac0a | 8718 | if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) < |
912e3acd JS |
8719 | LPFC_SLI_INTF_IF_TYPE_2) |
8720 | goto read_cfg_out; | |
8721 | ||
8722 | /* get the pf# and vf# for SLI4 if_type 2 port */ | |
8723 | length = (sizeof(struct lpfc_mbx_get_func_cfg) - | |
8724 | sizeof(struct lpfc_sli4_cfg_mhdr)); | |
8725 | lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON, | |
8726 | LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG, | |
8727 | length, LPFC_SLI4_MBX_EMBED); | |
8728 | ||
8aa134a8 | 8729 | rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); |
912e3acd JS |
8730 | shdr = (union lpfc_sli4_cfg_shdr *) |
8731 | &pmb->u.mqe.un.sli4_config.header.cfg_shdr; | |
8732 | shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); | |
8733 | shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response); | |
8aa134a8 | 8734 | if (rc2 || shdr_status || shdr_add_status) { |
372c187b | 8735 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
912e3acd JS |
8736 | "3026 Mailbox failed , mbxCmd x%x " |
8737 | "GET_FUNCTION_CONFIG, mbxStatus x%x\n", | |
8738 | bf_get(lpfc_mqe_command, &pmb->u.mqe), | |
8739 | bf_get(lpfc_mqe_status, &pmb->u.mqe)); | |
912e3acd JS |
8740 | goto read_cfg_out; |
8741 | } | |
8742 | ||
8743 | /* search for fc_fcoe resrouce descriptor */ | |
8744 | get_func_cfg = &pmb->u.mqe.un.get_func_cfg; | |
912e3acd | 8745 | |
8aa134a8 JS |
8746 | pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0]; |
8747 | desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0; | |
8748 | length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc); | |
8749 | if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD) | |
8750 | length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH; | |
8751 | else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH) | |
8752 | goto read_cfg_out; | |
8753 | ||
912e3acd | 8754 | for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) { |
8aa134a8 | 8755 | desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i); |
912e3acd | 8756 | if (LPFC_RSRC_DESC_TYPE_FCFCOE == |
8aa134a8 | 8757 | bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) { |
912e3acd JS |
8758 | phba->sli4_hba.iov.pf_number = |
8759 | bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc); | |
8760 | phba->sli4_hba.iov.vf_number = | |
8761 | bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc); | |
8762 | break; | |
8763 | } | |
8764 | } | |
8765 | ||
8766 | if (i < LPFC_RSRC_DESC_MAX_NUM) | |
8767 | lpfc_printf_log(phba, KERN_INFO, LOG_SLI, | |
8768 | "3027 GET_FUNCTION_CONFIG: pf_number:%d, " | |
8769 | "vf_number:%d\n", phba->sli4_hba.iov.pf_number, | |
8770 | phba->sli4_hba.iov.vf_number); | |
8aa134a8 | 8771 | else |
372c187b | 8772 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
912e3acd | 8773 | "3028 GET_FUNCTION_CONFIG: failed to find " |
c4dba187 | 8774 | "Resource Descriptor:x%x\n", |
912e3acd | 8775 | LPFC_RSRC_DESC_TYPE_FCFCOE); |
912e3acd JS |
8776 | |
8777 | read_cfg_out: | |
8778 | mempool_free(pmb, phba->mbox_mem_pool); | |
da0436e9 | 8779 | return rc; |
3772a991 JS |
8780 | } |
8781 | ||
8782 | /** | |
2fcee4bf | 8783 | * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port. |
3772a991 JS |
8784 | * @phba: pointer to lpfc hba data structure. |
8785 | * | |
2fcee4bf JS |
8786 | * This routine is invoked to setup the port-side endian order when |
8787 | * the port if_type is 0. This routine has no function for other | |
8788 | * if_types. | |
da0436e9 JS |
8789 | * |
8790 | * Return codes | |
af901ca1 | 8791 | * 0 - successful |
25985edc | 8792 | * -ENOMEM - No available memory |
d439d286 | 8793 | * -EIO - The mailbox failed to complete successfully. |
3772a991 | 8794 | **/ |
da0436e9 JS |
8795 | static int |
8796 | lpfc_setup_endian_order(struct lpfc_hba *phba) | |
3772a991 | 8797 | { |
da0436e9 | 8798 | LPFC_MBOXQ_t *mboxq; |
2fcee4bf | 8799 | uint32_t if_type, rc = 0; |
da0436e9 JS |
8800 | uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0, |
8801 | HOST_ENDIAN_HIGH_WORD1}; | |
3772a991 | 8802 | |
2fcee4bf JS |
8803 | if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); |
8804 | switch (if_type) { | |
8805 | case LPFC_SLI_INTF_IF_TYPE_0: | |
8806 | mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, | |
8807 | GFP_KERNEL); | |
8808 | if (!mboxq) { | |
372c187b | 8809 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
2fcee4bf JS |
8810 | "0492 Unable to allocate memory for " |
8811 | "issuing SLI_CONFIG_SPECIAL mailbox " | |
8812 | "command\n"); | |
8813 | return -ENOMEM; | |
8814 | } | |
3772a991 | 8815 | |
2fcee4bf JS |
8816 | /* |
8817 | * The SLI4_CONFIG_SPECIAL mailbox command requires the first | |
8818 | * two words to contain special data values and no other data. | |
8819 | */ | |
8820 | memset(mboxq, 0, sizeof(LPFC_MBOXQ_t)); | |
8821 | memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data)); | |
8822 | rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
8823 | if (rc != MBX_SUCCESS) { | |
372c187b | 8824 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
2fcee4bf JS |
8825 | "0493 SLI_CONFIG_SPECIAL mailbox " |
8826 | "failed with status x%x\n", | |
8827 | rc); | |
8828 | rc = -EIO; | |
8829 | } | |
8830 | mempool_free(mboxq, phba->mbox_mem_pool); | |
8831 | break; | |
27d6ac0a | 8832 | case LPFC_SLI_INTF_IF_TYPE_6: |
2fcee4bf JS |
8833 | case LPFC_SLI_INTF_IF_TYPE_2: |
8834 | case LPFC_SLI_INTF_IF_TYPE_1: | |
8835 | default: | |
8836 | break; | |
da0436e9 | 8837 | } |
da0436e9 | 8838 | return rc; |
3772a991 JS |
8839 | } |
8840 | ||
8841 | /** | |
895427bd | 8842 | * lpfc_sli4_queue_verify - Verify and update EQ counts |
3772a991 JS |
8843 | * @phba: pointer to lpfc hba data structure. |
8844 | * | |
895427bd JS |
8845 | * This routine is invoked to check the user settable queue counts for EQs. |
8846 | * After this routine is called the counts will be set to valid values that | |
5350d872 JS |
8847 | * adhere to the constraints of the system's interrupt vectors and the port's |
8848 | * queue resources. | |
da0436e9 JS |
8849 | * |
8850 | * Return codes | |
af901ca1 | 8851 | * 0 - successful |
25985edc | 8852 | * -ENOMEM - No available memory |
3772a991 | 8853 | **/ |
da0436e9 | 8854 | static int |
5350d872 | 8855 | lpfc_sli4_queue_verify(struct lpfc_hba *phba) |
3772a991 | 8856 | { |
da0436e9 | 8857 | /* |
67d12733 | 8858 | * Sanity check for configured queue parameters against the run-time |
da0436e9 JS |
8859 | * device parameters |
8860 | */ | |
3772a991 | 8861 | |
bcb24f65 | 8862 | if (phba->nvmet_support) { |
97a9ed3b JS |
8863 | if (phba->cfg_hdw_queue < phba->cfg_nvmet_mrq) |
8864 | phba->cfg_nvmet_mrq = phba->cfg_hdw_queue; | |
982ab128 JS |
8865 | if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX) |
8866 | phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX; | |
bcb24f65 | 8867 | } |
895427bd JS |
8868 | |
8869 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
6a828b0f JS |
8870 | "2574 IO channels: hdwQ %d IRQ %d MRQ: %d\n", |
8871 | phba->cfg_hdw_queue, phba->cfg_irq_chann, | |
8872 | phba->cfg_nvmet_mrq); | |
3772a991 | 8873 | |
da0436e9 JS |
8874 | /* Get EQ depth from module parameter, fake the default for now */ |
8875 | phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B; | |
8876 | phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT; | |
3772a991 | 8877 | |
5350d872 JS |
8878 | /* Get CQ depth from module parameter, fake the default for now */ |
8879 | phba->sli4_hba.cq_esize = LPFC_CQE_SIZE; | |
8880 | phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT; | |
895427bd JS |
8881 | return 0; |
8882 | } | |
8883 | ||
8884 | static int | |
c00f62e6 | 8885 | lpfc_alloc_io_wq_cq(struct lpfc_hba *phba, int idx) |
895427bd JS |
8886 | { |
8887 | struct lpfc_queue *qdesc; | |
c00f62e6 | 8888 | u32 wqesize; |
c1a21ebc | 8889 | int cpu; |
895427bd | 8890 | |
c00f62e6 JS |
8891 | cpu = lpfc_find_cpu_handle(phba, idx, LPFC_FIND_BY_HDWQ); |
8892 | /* Create Fast Path IO CQs */ | |
c176ffa0 | 8893 | if (phba->enab_exp_wqcq_pages) |
a51e41b6 JS |
8894 | /* Increase the CQ size when WQEs contain an embedded cdb */ |
8895 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, | |
8896 | phba->sli4_hba.cq_esize, | |
c1a21ebc | 8897 | LPFC_CQE_EXP_COUNT, cpu); |
a51e41b6 JS |
8898 | |
8899 | else | |
8900 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, | |
8901 | phba->sli4_hba.cq_esize, | |
c1a21ebc | 8902 | phba->sli4_hba.cq_ecount, cpu); |
895427bd | 8903 | if (!qdesc) { |
372c187b DK |
8904 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
8905 | "0499 Failed allocate fast-path IO CQ (%d)\n", | |
8906 | idx); | |
895427bd JS |
8907 | return 1; |
8908 | } | |
7365f6fd | 8909 | qdesc->qe_valid = 1; |
c00f62e6 | 8910 | qdesc->hdwq = idx; |
c1a21ebc | 8911 | qdesc->chann = cpu; |
c00f62e6 | 8912 | phba->sli4_hba.hdwq[idx].io_cq = qdesc; |
895427bd | 8913 | |
c00f62e6 | 8914 | /* Create Fast Path IO WQs */ |
c176ffa0 | 8915 | if (phba->enab_exp_wqcq_pages) { |
a51e41b6 | 8916 | /* Increase the WQ size when WQEs contain an embedded cdb */ |
c176ffa0 JS |
8917 | wqesize = (phba->fcp_embed_io) ? |
8918 | LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize; | |
a51e41b6 | 8919 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, |
c176ffa0 | 8920 | wqesize, |
c1a21ebc | 8921 | LPFC_WQE_EXP_COUNT, cpu); |
c176ffa0 | 8922 | } else |
a51e41b6 JS |
8923 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
8924 | phba->sli4_hba.wq_esize, | |
c1a21ebc | 8925 | phba->sli4_hba.wq_ecount, cpu); |
c176ffa0 | 8926 | |
895427bd | 8927 | if (!qdesc) { |
372c187b | 8928 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
c00f62e6 JS |
8929 | "0503 Failed allocate fast-path IO WQ (%d)\n", |
8930 | idx); | |
895427bd JS |
8931 | return 1; |
8932 | } | |
c00f62e6 JS |
8933 | qdesc->hdwq = idx; |
8934 | qdesc->chann = cpu; | |
8935 | phba->sli4_hba.hdwq[idx].io_wq = qdesc; | |
895427bd | 8936 | list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); |
5350d872 | 8937 | return 0; |
5350d872 JS |
8938 | } |
8939 | ||
8940 | /** | |
8941 | * lpfc_sli4_queue_create - Create all the SLI4 queues | |
8942 | * @phba: pointer to lpfc hba data structure. | |
8943 | * | |
8944 | * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA | |
8945 | * operation. For each SLI4 queue type, the parameters such as queue entry | |
8946 | * count (queue depth) shall be taken from the module parameter. For now, | |
8947 | * we just use some constant number as place holder. | |
8948 | * | |
8949 | * Return codes | |
4907cb7b | 8950 | * 0 - successful |
5350d872 JS |
8951 | * -ENOMEM - No availble memory |
8952 | * -EIO - The mailbox failed to complete successfully. | |
8953 | **/ | |
8954 | int | |
8955 | lpfc_sli4_queue_create(struct lpfc_hba *phba) | |
8956 | { | |
8957 | struct lpfc_queue *qdesc; | |
657add4e | 8958 | int idx, cpu, eqcpu; |
5e5b511d | 8959 | struct lpfc_sli4_hdw_queue *qp; |
657add4e JS |
8960 | struct lpfc_vector_map_info *cpup; |
8961 | struct lpfc_vector_map_info *eqcpup; | |
32517fc0 | 8962 | struct lpfc_eq_intr_info *eqi; |
5350d872 JS |
8963 | |
8964 | /* | |
67d12733 | 8965 | * Create HBA Record arrays. |
895427bd | 8966 | * Both NVME and FCP will share that same vectors / EQs |
5350d872 | 8967 | */ |
67d12733 JS |
8968 | phba->sli4_hba.mq_esize = LPFC_MQE_SIZE; |
8969 | phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT; | |
8970 | phba->sli4_hba.wq_esize = LPFC_WQE_SIZE; | |
8971 | phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT; | |
8972 | phba->sli4_hba.rq_esize = LPFC_RQE_SIZE; | |
8973 | phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT; | |
895427bd JS |
8974 | phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B; |
8975 | phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT; | |
8976 | phba->sli4_hba.cq_esize = LPFC_CQE_SIZE; | |
8977 | phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT; | |
67d12733 | 8978 | |
cdb42bec | 8979 | if (!phba->sli4_hba.hdwq) { |
5e5b511d JS |
8980 | phba->sli4_hba.hdwq = kcalloc( |
8981 | phba->cfg_hdw_queue, sizeof(struct lpfc_sli4_hdw_queue), | |
8982 | GFP_KERNEL); | |
8983 | if (!phba->sli4_hba.hdwq) { | |
372c187b | 8984 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
5e5b511d JS |
8985 | "6427 Failed allocate memory for " |
8986 | "fast-path Hardware Queue array\n"); | |
895427bd JS |
8987 | goto out_error; |
8988 | } | |
5e5b511d JS |
8989 | /* Prepare hardware queues to take IO buffers */ |
8990 | for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { | |
8991 | qp = &phba->sli4_hba.hdwq[idx]; | |
8992 | spin_lock_init(&qp->io_buf_list_get_lock); | |
8993 | spin_lock_init(&qp->io_buf_list_put_lock); | |
8994 | INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get); | |
8995 | INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put); | |
8996 | qp->get_io_bufs = 0; | |
8997 | qp->put_io_bufs = 0; | |
8998 | qp->total_io_bufs = 0; | |
c00f62e6 JS |
8999 | spin_lock_init(&qp->abts_io_buf_list_lock); |
9000 | INIT_LIST_HEAD(&qp->lpfc_abts_io_buf_list); | |
5e5b511d | 9001 | qp->abts_scsi_io_bufs = 0; |
5e5b511d | 9002 | qp->abts_nvme_io_bufs = 0; |
d79c9e9d JS |
9003 | INIT_LIST_HEAD(&qp->sgl_list); |
9004 | INIT_LIST_HEAD(&qp->cmd_rsp_buf_list); | |
9005 | spin_lock_init(&qp->hdwq_lock); | |
895427bd | 9006 | } |
67d12733 JS |
9007 | } |
9008 | ||
cdb42bec | 9009 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { |
2d7dbc4c JS |
9010 | if (phba->nvmet_support) { |
9011 | phba->sli4_hba.nvmet_cqset = kcalloc( | |
9012 | phba->cfg_nvmet_mrq, | |
9013 | sizeof(struct lpfc_queue *), | |
9014 | GFP_KERNEL); | |
9015 | if (!phba->sli4_hba.nvmet_cqset) { | |
372c187b | 9016 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
2d7dbc4c JS |
9017 | "3121 Fail allocate memory for " |
9018 | "fast-path CQ set array\n"); | |
9019 | goto out_error; | |
9020 | } | |
9021 | phba->sli4_hba.nvmet_mrq_hdr = kcalloc( | |
9022 | phba->cfg_nvmet_mrq, | |
9023 | sizeof(struct lpfc_queue *), | |
9024 | GFP_KERNEL); | |
9025 | if (!phba->sli4_hba.nvmet_mrq_hdr) { | |
372c187b | 9026 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
2d7dbc4c JS |
9027 | "3122 Fail allocate memory for " |
9028 | "fast-path RQ set hdr array\n"); | |
9029 | goto out_error; | |
9030 | } | |
9031 | phba->sli4_hba.nvmet_mrq_data = kcalloc( | |
9032 | phba->cfg_nvmet_mrq, | |
9033 | sizeof(struct lpfc_queue *), | |
9034 | GFP_KERNEL); | |
9035 | if (!phba->sli4_hba.nvmet_mrq_data) { | |
372c187b | 9036 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
2d7dbc4c JS |
9037 | "3124 Fail allocate memory for " |
9038 | "fast-path RQ set data array\n"); | |
9039 | goto out_error; | |
9040 | } | |
9041 | } | |
da0436e9 | 9042 | } |
67d12733 | 9043 | |
895427bd | 9044 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list); |
67d12733 | 9045 | |
895427bd | 9046 | /* Create HBA Event Queues (EQs) */ |
657add4e JS |
9047 | for_each_present_cpu(cpu) { |
9048 | /* We only want to create 1 EQ per vector, even though | |
9049 | * multiple CPUs might be using that vector. so only | |
9050 | * selects the CPUs that are LPFC_CPU_FIRST_IRQ. | |
6a828b0f | 9051 | */ |
657add4e JS |
9052 | cpup = &phba->sli4_hba.cpu_map[cpu]; |
9053 | if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) | |
6a828b0f | 9054 | continue; |
657add4e JS |
9055 | |
9056 | /* Get a ptr to the Hardware Queue associated with this CPU */ | |
9057 | qp = &phba->sli4_hba.hdwq[cpup->hdwq]; | |
9058 | ||
9059 | /* Allocate an EQ */ | |
81b96eda JS |
9060 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
9061 | phba->sli4_hba.eq_esize, | |
c1a21ebc | 9062 | phba->sli4_hba.eq_ecount, cpu); |
da0436e9 | 9063 | if (!qdesc) { |
372c187b | 9064 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
657add4e JS |
9065 | "0497 Failed allocate EQ (%d)\n", |
9066 | cpup->hdwq); | |
67d12733 | 9067 | goto out_error; |
da0436e9 | 9068 | } |
7365f6fd | 9069 | qdesc->qe_valid = 1; |
657add4e | 9070 | qdesc->hdwq = cpup->hdwq; |
3ad348d9 | 9071 | qdesc->chann = cpu; /* First CPU this EQ is affinitized to */ |
32517fc0 | 9072 | qdesc->last_cpu = qdesc->chann; |
657add4e JS |
9073 | |
9074 | /* Save the allocated EQ in the Hardware Queue */ | |
9075 | qp->hba_eq = qdesc; | |
9076 | ||
32517fc0 JS |
9077 | eqi = per_cpu_ptr(phba->sli4_hba.eq_info, qdesc->last_cpu); |
9078 | list_add(&qdesc->cpu_list, &eqi->list); | |
895427bd | 9079 | } |
67d12733 | 9080 | |
657add4e JS |
9081 | /* Now we need to populate the other Hardware Queues, that share |
9082 | * an IRQ vector, with the associated EQ ptr. | |
9083 | */ | |
9084 | for_each_present_cpu(cpu) { | |
9085 | cpup = &phba->sli4_hba.cpu_map[cpu]; | |
9086 | ||
9087 | /* Check for EQ already allocated in previous loop */ | |
9088 | if (cpup->flag & LPFC_CPU_FIRST_IRQ) | |
9089 | continue; | |
9090 | ||
9091 | /* Check for multiple CPUs per hdwq */ | |
9092 | qp = &phba->sli4_hba.hdwq[cpup->hdwq]; | |
9093 | if (qp->hba_eq) | |
9094 | continue; | |
9095 | ||
9096 | /* We need to share an EQ for this hdwq */ | |
9097 | eqcpu = lpfc_find_cpu_handle(phba, cpup->eq, LPFC_FIND_BY_EQ); | |
9098 | eqcpup = &phba->sli4_hba.cpu_map[eqcpu]; | |
9099 | qp->hba_eq = phba->sli4_hba.hdwq[eqcpup->hdwq].hba_eq; | |
9100 | } | |
67d12733 | 9101 | |
c00f62e6 | 9102 | /* Allocate IO Path SLI4 CQ/WQs */ |
6a828b0f | 9103 | for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { |
c00f62e6 | 9104 | if (lpfc_alloc_io_wq_cq(phba, idx)) |
67d12733 | 9105 | goto out_error; |
6a828b0f | 9106 | } |
da0436e9 | 9107 | |
c00f62e6 JS |
9108 | if (phba->nvmet_support) { |
9109 | for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) { | |
9110 | cpu = lpfc_find_cpu_handle(phba, idx, | |
9111 | LPFC_FIND_BY_HDWQ); | |
9112 | qdesc = lpfc_sli4_queue_alloc(phba, | |
81b96eda JS |
9113 | LPFC_DEFAULT_PAGE_SIZE, |
9114 | phba->sli4_hba.cq_esize, | |
c1a21ebc JS |
9115 | phba->sli4_hba.cq_ecount, |
9116 | cpu); | |
c00f62e6 | 9117 | if (!qdesc) { |
372c187b | 9118 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
cdb42bec JS |
9119 | "3142 Failed allocate NVME " |
9120 | "CQ Set (%d)\n", idx); | |
c00f62e6 | 9121 | goto out_error; |
2d7dbc4c | 9122 | } |
c00f62e6 JS |
9123 | qdesc->qe_valid = 1; |
9124 | qdesc->hdwq = idx; | |
9125 | qdesc->chann = cpu; | |
9126 | phba->sli4_hba.nvmet_cqset[idx] = qdesc; | |
2d7dbc4c JS |
9127 | } |
9128 | } | |
9129 | ||
da0436e9 | 9130 | /* |
67d12733 | 9131 | * Create Slow Path Completion Queues (CQs) |
da0436e9 JS |
9132 | */ |
9133 | ||
c1a21ebc | 9134 | cpu = lpfc_find_cpu_handle(phba, 0, LPFC_FIND_BY_EQ); |
da0436e9 | 9135 | /* Create slow-path Mailbox Command Complete Queue */ |
81b96eda JS |
9136 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
9137 | phba->sli4_hba.cq_esize, | |
c1a21ebc | 9138 | phba->sli4_hba.cq_ecount, cpu); |
da0436e9 | 9139 | if (!qdesc) { |
372c187b | 9140 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
da0436e9 | 9141 | "0500 Failed allocate slow-path mailbox CQ\n"); |
67d12733 | 9142 | goto out_error; |
da0436e9 | 9143 | } |
7365f6fd | 9144 | qdesc->qe_valid = 1; |
da0436e9 JS |
9145 | phba->sli4_hba.mbx_cq = qdesc; |
9146 | ||
9147 | /* Create slow-path ELS Complete Queue */ | |
81b96eda JS |
9148 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
9149 | phba->sli4_hba.cq_esize, | |
c1a21ebc | 9150 | phba->sli4_hba.cq_ecount, cpu); |
da0436e9 | 9151 | if (!qdesc) { |
372c187b | 9152 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
da0436e9 | 9153 | "0501 Failed allocate slow-path ELS CQ\n"); |
67d12733 | 9154 | goto out_error; |
da0436e9 | 9155 | } |
7365f6fd | 9156 | qdesc->qe_valid = 1; |
c00f62e6 | 9157 | qdesc->chann = cpu; |
da0436e9 JS |
9158 | phba->sli4_hba.els_cq = qdesc; |
9159 | ||
da0436e9 | 9160 | |
5350d872 | 9161 | /* |
67d12733 | 9162 | * Create Slow Path Work Queues (WQs) |
5350d872 | 9163 | */ |
da0436e9 JS |
9164 | |
9165 | /* Create Mailbox Command Queue */ | |
da0436e9 | 9166 | |
81b96eda JS |
9167 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
9168 | phba->sli4_hba.mq_esize, | |
c1a21ebc | 9169 | phba->sli4_hba.mq_ecount, cpu); |
da0436e9 | 9170 | if (!qdesc) { |
372c187b | 9171 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
da0436e9 | 9172 | "0505 Failed allocate slow-path MQ\n"); |
67d12733 | 9173 | goto out_error; |
da0436e9 | 9174 | } |
c00f62e6 | 9175 | qdesc->chann = cpu; |
da0436e9 JS |
9176 | phba->sli4_hba.mbx_wq = qdesc; |
9177 | ||
9178 | /* | |
67d12733 | 9179 | * Create ELS Work Queues |
da0436e9 | 9180 | */ |
da0436e9 JS |
9181 | |
9182 | /* Create slow-path ELS Work Queue */ | |
81b96eda JS |
9183 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
9184 | phba->sli4_hba.wq_esize, | |
c1a21ebc | 9185 | phba->sli4_hba.wq_ecount, cpu); |
da0436e9 | 9186 | if (!qdesc) { |
372c187b | 9187 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
da0436e9 | 9188 | "0504 Failed allocate slow-path ELS WQ\n"); |
67d12733 | 9189 | goto out_error; |
da0436e9 | 9190 | } |
c00f62e6 | 9191 | qdesc->chann = cpu; |
da0436e9 | 9192 | phba->sli4_hba.els_wq = qdesc; |
895427bd JS |
9193 | list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); |
9194 | ||
9195 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
9196 | /* Create NVME LS Complete Queue */ | |
81b96eda JS |
9197 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
9198 | phba->sli4_hba.cq_esize, | |
c1a21ebc | 9199 | phba->sli4_hba.cq_ecount, cpu); |
895427bd | 9200 | if (!qdesc) { |
372c187b | 9201 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
895427bd JS |
9202 | "6079 Failed allocate NVME LS CQ\n"); |
9203 | goto out_error; | |
9204 | } | |
c00f62e6 | 9205 | qdesc->chann = cpu; |
7365f6fd | 9206 | qdesc->qe_valid = 1; |
895427bd JS |
9207 | phba->sli4_hba.nvmels_cq = qdesc; |
9208 | ||
9209 | /* Create NVME LS Work Queue */ | |
81b96eda JS |
9210 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
9211 | phba->sli4_hba.wq_esize, | |
c1a21ebc | 9212 | phba->sli4_hba.wq_ecount, cpu); |
895427bd | 9213 | if (!qdesc) { |
372c187b | 9214 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
895427bd JS |
9215 | "6080 Failed allocate NVME LS WQ\n"); |
9216 | goto out_error; | |
9217 | } | |
c00f62e6 | 9218 | qdesc->chann = cpu; |
895427bd JS |
9219 | phba->sli4_hba.nvmels_wq = qdesc; |
9220 | list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); | |
9221 | } | |
da0436e9 | 9222 | |
da0436e9 JS |
9223 | /* |
9224 | * Create Receive Queue (RQ) | |
9225 | */ | |
da0436e9 JS |
9226 | |
9227 | /* Create Receive Queue for header */ | |
81b96eda JS |
9228 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
9229 | phba->sli4_hba.rq_esize, | |
c1a21ebc | 9230 | phba->sli4_hba.rq_ecount, cpu); |
da0436e9 | 9231 | if (!qdesc) { |
372c187b | 9232 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
da0436e9 | 9233 | "0506 Failed allocate receive HRQ\n"); |
67d12733 | 9234 | goto out_error; |
da0436e9 JS |
9235 | } |
9236 | phba->sli4_hba.hdr_rq = qdesc; | |
9237 | ||
9238 | /* Create Receive Queue for data */ | |
81b96eda JS |
9239 | qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, |
9240 | phba->sli4_hba.rq_esize, | |
c1a21ebc | 9241 | phba->sli4_hba.rq_ecount, cpu); |
da0436e9 | 9242 | if (!qdesc) { |
372c187b | 9243 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
da0436e9 | 9244 | "0507 Failed allocate receive DRQ\n"); |
67d12733 | 9245 | goto out_error; |
da0436e9 JS |
9246 | } |
9247 | phba->sli4_hba.dat_rq = qdesc; | |
9248 | ||
cdb42bec JS |
9249 | if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) && |
9250 | phba->nvmet_support) { | |
2d7dbc4c | 9251 | for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) { |
c1a21ebc JS |
9252 | cpu = lpfc_find_cpu_handle(phba, idx, |
9253 | LPFC_FIND_BY_HDWQ); | |
2d7dbc4c JS |
9254 | /* Create NVMET Receive Queue for header */ |
9255 | qdesc = lpfc_sli4_queue_alloc(phba, | |
81b96eda | 9256 | LPFC_DEFAULT_PAGE_SIZE, |
2d7dbc4c | 9257 | phba->sli4_hba.rq_esize, |
c1a21ebc JS |
9258 | LPFC_NVMET_RQE_DEF_COUNT, |
9259 | cpu); | |
2d7dbc4c | 9260 | if (!qdesc) { |
372c187b | 9261 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
2d7dbc4c JS |
9262 | "3146 Failed allocate " |
9263 | "receive HRQ\n"); | |
9264 | goto out_error; | |
9265 | } | |
5e5b511d | 9266 | qdesc->hdwq = idx; |
2d7dbc4c JS |
9267 | phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc; |
9268 | ||
9269 | /* Only needed for header of RQ pair */ | |
c1a21ebc JS |
9270 | qdesc->rqbp = kzalloc_node(sizeof(*qdesc->rqbp), |
9271 | GFP_KERNEL, | |
9272 | cpu_to_node(cpu)); | |
2d7dbc4c | 9273 | if (qdesc->rqbp == NULL) { |
372c187b | 9274 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
2d7dbc4c JS |
9275 | "6131 Failed allocate " |
9276 | "Header RQBP\n"); | |
9277 | goto out_error; | |
9278 | } | |
9279 | ||
4b40d02b DK |
9280 | /* Put list in known state in case driver load fails. */ |
9281 | INIT_LIST_HEAD(&qdesc->rqbp->rqb_buffer_list); | |
9282 | ||
2d7dbc4c JS |
9283 | /* Create NVMET Receive Queue for data */ |
9284 | qdesc = lpfc_sli4_queue_alloc(phba, | |
81b96eda | 9285 | LPFC_DEFAULT_PAGE_SIZE, |
2d7dbc4c | 9286 | phba->sli4_hba.rq_esize, |
c1a21ebc JS |
9287 | LPFC_NVMET_RQE_DEF_COUNT, |
9288 | cpu); | |
2d7dbc4c | 9289 | if (!qdesc) { |
372c187b | 9290 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
2d7dbc4c JS |
9291 | "3156 Failed allocate " |
9292 | "receive DRQ\n"); | |
9293 | goto out_error; | |
9294 | } | |
5e5b511d | 9295 | qdesc->hdwq = idx; |
2d7dbc4c JS |
9296 | phba->sli4_hba.nvmet_mrq_data[idx] = qdesc; |
9297 | } | |
9298 | } | |
9299 | ||
4c47efc1 JS |
9300 | /* Clear NVME stats */ |
9301 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
9302 | for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { | |
9303 | memset(&phba->sli4_hba.hdwq[idx].nvme_cstat, 0, | |
9304 | sizeof(phba->sli4_hba.hdwq[idx].nvme_cstat)); | |
9305 | } | |
9306 | } | |
4c47efc1 JS |
9307 | |
9308 | /* Clear SCSI stats */ | |
9309 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) { | |
9310 | for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { | |
9311 | memset(&phba->sli4_hba.hdwq[idx].scsi_cstat, 0, | |
9312 | sizeof(phba->sli4_hba.hdwq[idx].scsi_cstat)); | |
9313 | } | |
9314 | } | |
9315 | ||
da0436e9 JS |
9316 | return 0; |
9317 | ||
da0436e9 | 9318 | out_error: |
67d12733 | 9319 | lpfc_sli4_queue_destroy(phba); |
da0436e9 JS |
9320 | return -ENOMEM; |
9321 | } | |
9322 | ||
895427bd JS |
9323 | static inline void |
9324 | __lpfc_sli4_release_queue(struct lpfc_queue **qp) | |
9325 | { | |
9326 | if (*qp != NULL) { | |
9327 | lpfc_sli4_queue_free(*qp); | |
9328 | *qp = NULL; | |
9329 | } | |
9330 | } | |
9331 | ||
9332 | static inline void | |
9333 | lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max) | |
9334 | { | |
9335 | int idx; | |
9336 | ||
9337 | if (*qs == NULL) | |
9338 | return; | |
9339 | ||
9340 | for (idx = 0; idx < max; idx++) | |
9341 | __lpfc_sli4_release_queue(&(*qs)[idx]); | |
9342 | ||
9343 | kfree(*qs); | |
9344 | *qs = NULL; | |
9345 | } | |
9346 | ||
9347 | static inline void | |
6a828b0f | 9348 | lpfc_sli4_release_hdwq(struct lpfc_hba *phba) |
895427bd | 9349 | { |
6a828b0f | 9350 | struct lpfc_sli4_hdw_queue *hdwq; |
657add4e | 9351 | struct lpfc_queue *eq; |
cdb42bec JS |
9352 | uint32_t idx; |
9353 | ||
6a828b0f | 9354 | hdwq = phba->sli4_hba.hdwq; |
6a828b0f | 9355 | |
657add4e JS |
9356 | /* Loop thru all Hardware Queues */ |
9357 | for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { | |
9358 | /* Free the CQ/WQ corresponding to the Hardware Queue */ | |
c00f62e6 JS |
9359 | lpfc_sli4_queue_free(hdwq[idx].io_cq); |
9360 | lpfc_sli4_queue_free(hdwq[idx].io_wq); | |
821bc882 | 9361 | hdwq[idx].hba_eq = NULL; |
c00f62e6 JS |
9362 | hdwq[idx].io_cq = NULL; |
9363 | hdwq[idx].io_wq = NULL; | |
d79c9e9d JS |
9364 | if (phba->cfg_xpsgl && !phba->nvmet_support) |
9365 | lpfc_free_sgl_per_hdwq(phba, &hdwq[idx]); | |
9366 | lpfc_free_cmd_rsp_buf_per_hdwq(phba, &hdwq[idx]); | |
895427bd | 9367 | } |
657add4e JS |
9368 | /* Loop thru all IRQ vectors */ |
9369 | for (idx = 0; idx < phba->cfg_irq_chann; idx++) { | |
9370 | /* Free the EQ corresponding to the IRQ vector */ | |
9371 | eq = phba->sli4_hba.hba_eq_hdl[idx].eq; | |
9372 | lpfc_sli4_queue_free(eq); | |
9373 | phba->sli4_hba.hba_eq_hdl[idx].eq = NULL; | |
9374 | } | |
895427bd JS |
9375 | } |
9376 | ||
da0436e9 JS |
9377 | /** |
9378 | * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues | |
9379 | * @phba: pointer to lpfc hba data structure. | |
9380 | * | |
9381 | * This routine is invoked to release all the SLI4 queues with the FCoE HBA | |
9382 | * operation. | |
9383 | * | |
9384 | * Return codes | |
af901ca1 | 9385 | * 0 - successful |
25985edc | 9386 | * -ENOMEM - No available memory |
d439d286 | 9387 | * -EIO - The mailbox failed to complete successfully. |
da0436e9 | 9388 | **/ |
5350d872 | 9389 | void |
da0436e9 JS |
9390 | lpfc_sli4_queue_destroy(struct lpfc_hba *phba) |
9391 | { | |
4645f7b5 JS |
9392 | /* |
9393 | * Set FREE_INIT before beginning to free the queues. | |
9394 | * Wait until the users of queues to acknowledge to | |
9395 | * release queues by clearing FREE_WAIT. | |
9396 | */ | |
9397 | spin_lock_irq(&phba->hbalock); | |
9398 | phba->sli.sli_flag |= LPFC_QUEUE_FREE_INIT; | |
9399 | while (phba->sli.sli_flag & LPFC_QUEUE_FREE_WAIT) { | |
9400 | spin_unlock_irq(&phba->hbalock); | |
9401 | msleep(20); | |
9402 | spin_lock_irq(&phba->hbalock); | |
9403 | } | |
9404 | spin_unlock_irq(&phba->hbalock); | |
9405 | ||
93a4d6f4 JS |
9406 | lpfc_sli4_cleanup_poll_list(phba); |
9407 | ||
895427bd | 9408 | /* Release HBA eqs */ |
cdb42bec | 9409 | if (phba->sli4_hba.hdwq) |
6a828b0f | 9410 | lpfc_sli4_release_hdwq(phba); |
895427bd | 9411 | |
bcb24f65 JS |
9412 | if (phba->nvmet_support) { |
9413 | lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset, | |
9414 | phba->cfg_nvmet_mrq); | |
2d7dbc4c | 9415 | |
bcb24f65 JS |
9416 | lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr, |
9417 | phba->cfg_nvmet_mrq); | |
9418 | lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data, | |
9419 | phba->cfg_nvmet_mrq); | |
9420 | } | |
2d7dbc4c | 9421 | |
895427bd JS |
9422 | /* Release mailbox command work queue */ |
9423 | __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq); | |
9424 | ||
9425 | /* Release ELS work queue */ | |
9426 | __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq); | |
9427 | ||
9428 | /* Release ELS work queue */ | |
9429 | __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq); | |
9430 | ||
9431 | /* Release unsolicited receive queue */ | |
9432 | __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq); | |
9433 | __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq); | |
9434 | ||
9435 | /* Release ELS complete queue */ | |
9436 | __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq); | |
9437 | ||
9438 | /* Release NVME LS complete queue */ | |
9439 | __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq); | |
9440 | ||
9441 | /* Release mailbox command complete queue */ | |
9442 | __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq); | |
9443 | ||
9444 | /* Everything on this list has been freed */ | |
9445 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list); | |
4645f7b5 JS |
9446 | |
9447 | /* Done with freeing the queues */ | |
9448 | spin_lock_irq(&phba->hbalock); | |
9449 | phba->sli.sli_flag &= ~LPFC_QUEUE_FREE_INIT; | |
9450 | spin_unlock_irq(&phba->hbalock); | |
895427bd JS |
9451 | } |
9452 | ||
895427bd JS |
9453 | int |
9454 | lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq) | |
9455 | { | |
9456 | struct lpfc_rqb *rqbp; | |
9457 | struct lpfc_dmabuf *h_buf; | |
9458 | struct rqb_dmabuf *rqb_buffer; | |
9459 | ||
9460 | rqbp = rq->rqbp; | |
9461 | while (!list_empty(&rqbp->rqb_buffer_list)) { | |
9462 | list_remove_head(&rqbp->rqb_buffer_list, h_buf, | |
9463 | struct lpfc_dmabuf, list); | |
9464 | ||
9465 | rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf); | |
9466 | (rqbp->rqb_free_buffer)(phba, rqb_buffer); | |
9467 | rqbp->buffer_count--; | |
67d12733 | 9468 | } |
895427bd JS |
9469 | return 1; |
9470 | } | |
67d12733 | 9471 | |
895427bd JS |
9472 | static int |
9473 | lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq, | |
9474 | struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map, | |
9475 | int qidx, uint32_t qtype) | |
9476 | { | |
9477 | struct lpfc_sli_ring *pring; | |
9478 | int rc; | |
9479 | ||
9480 | if (!eq || !cq || !wq) { | |
372c187b | 9481 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
895427bd JS |
9482 | "6085 Fast-path %s (%d) not allocated\n", |
9483 | ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx); | |
9484 | return -ENOMEM; | |
9485 | } | |
9486 | ||
9487 | /* create the Cq first */ | |
9488 | rc = lpfc_cq_create(phba, cq, eq, | |
9489 | (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype); | |
9490 | if (rc) { | |
372c187b DK |
9491 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
9492 | "6086 Failed setup of CQ (%d), rc = 0x%x\n", | |
9493 | qidx, (uint32_t)rc); | |
895427bd | 9494 | return rc; |
67d12733 JS |
9495 | } |
9496 | ||
895427bd | 9497 | if (qtype != LPFC_MBOX) { |
cdb42bec | 9498 | /* Setup cq_map for fast lookup */ |
895427bd JS |
9499 | if (cq_map) |
9500 | *cq_map = cq->queue_id; | |
da0436e9 | 9501 | |
895427bd JS |
9502 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
9503 | "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n", | |
9504 | qidx, cq->queue_id, qidx, eq->queue_id); | |
da0436e9 | 9505 | |
895427bd JS |
9506 | /* create the wq */ |
9507 | rc = lpfc_wq_create(phba, wq, cq, qtype); | |
9508 | if (rc) { | |
372c187b | 9509 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
c835c085 | 9510 | "4618 Fail setup fastpath WQ (%d), rc = 0x%x\n", |
895427bd JS |
9511 | qidx, (uint32_t)rc); |
9512 | /* no need to tear down cq - caller will do so */ | |
9513 | return rc; | |
9514 | } | |
da0436e9 | 9515 | |
895427bd JS |
9516 | /* Bind this CQ/WQ to the NVME ring */ |
9517 | pring = wq->pring; | |
9518 | pring->sli.sli4.wqp = (void *)wq; | |
9519 | cq->pring = pring; | |
da0436e9 | 9520 | |
895427bd JS |
9521 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
9522 | "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n", | |
9523 | qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id); | |
9524 | } else { | |
9525 | rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX); | |
9526 | if (rc) { | |
372c187b DK |
9527 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
9528 | "0539 Failed setup of slow-path MQ: " | |
9529 | "rc = 0x%x\n", rc); | |
895427bd JS |
9530 | /* no need to tear down cq - caller will do so */ |
9531 | return rc; | |
9532 | } | |
da0436e9 | 9533 | |
895427bd JS |
9534 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
9535 | "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n", | |
9536 | phba->sli4_hba.mbx_wq->queue_id, | |
9537 | phba->sli4_hba.mbx_cq->queue_id); | |
67d12733 | 9538 | } |
da0436e9 | 9539 | |
895427bd | 9540 | return 0; |
da0436e9 JS |
9541 | } |
9542 | ||
6a828b0f JS |
9543 | /** |
9544 | * lpfc_setup_cq_lookup - Setup the CQ lookup table | |
9545 | * @phba: pointer to lpfc hba data structure. | |
9546 | * | |
9547 | * This routine will populate the cq_lookup table by all | |
9548 | * available CQ queue_id's. | |
9549 | **/ | |
3999df75 | 9550 | static void |
6a828b0f JS |
9551 | lpfc_setup_cq_lookup(struct lpfc_hba *phba) |
9552 | { | |
9553 | struct lpfc_queue *eq, *childq; | |
6a828b0f JS |
9554 | int qidx; |
9555 | ||
6a828b0f JS |
9556 | memset(phba->sli4_hba.cq_lookup, 0, |
9557 | (sizeof(struct lpfc_queue *) * (phba->sli4_hba.cq_max + 1))); | |
657add4e | 9558 | /* Loop thru all IRQ vectors */ |
6a828b0f | 9559 | for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { |
657add4e JS |
9560 | /* Get the EQ corresponding to the IRQ vector */ |
9561 | eq = phba->sli4_hba.hba_eq_hdl[qidx].eq; | |
6a828b0f JS |
9562 | if (!eq) |
9563 | continue; | |
657add4e | 9564 | /* Loop through all CQs associated with that EQ */ |
6a828b0f JS |
9565 | list_for_each_entry(childq, &eq->child_list, list) { |
9566 | if (childq->queue_id > phba->sli4_hba.cq_max) | |
9567 | continue; | |
c00f62e6 | 9568 | if (childq->subtype == LPFC_IO) |
6a828b0f JS |
9569 | phba->sli4_hba.cq_lookup[childq->queue_id] = |
9570 | childq; | |
9571 | } | |
9572 | } | |
9573 | } | |
9574 | ||
da0436e9 JS |
9575 | /** |
9576 | * lpfc_sli4_queue_setup - Set up all the SLI4 queues | |
9577 | * @phba: pointer to lpfc hba data structure. | |
9578 | * | |
9579 | * This routine is invoked to set up all the SLI4 queues for the FCoE HBA | |
9580 | * operation. | |
9581 | * | |
9582 | * Return codes | |
af901ca1 | 9583 | * 0 - successful |
25985edc | 9584 | * -ENOMEM - No available memory |
d439d286 | 9585 | * -EIO - The mailbox failed to complete successfully. |
da0436e9 JS |
9586 | **/ |
9587 | int | |
9588 | lpfc_sli4_queue_setup(struct lpfc_hba *phba) | |
9589 | { | |
962bc51b JS |
9590 | uint32_t shdr_status, shdr_add_status; |
9591 | union lpfc_sli4_cfg_shdr *shdr; | |
657add4e | 9592 | struct lpfc_vector_map_info *cpup; |
cdb42bec | 9593 | struct lpfc_sli4_hdw_queue *qp; |
962bc51b | 9594 | LPFC_MBOXQ_t *mboxq; |
657add4e | 9595 | int qidx, cpu; |
cb733e35 | 9596 | uint32_t length, usdelay; |
895427bd | 9597 | int rc = -ENOMEM; |
962bc51b JS |
9598 | |
9599 | /* Check for dual-ULP support */ | |
9600 | mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); | |
9601 | if (!mboxq) { | |
372c187b | 9602 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
962bc51b JS |
9603 | "3249 Unable to allocate memory for " |
9604 | "QUERY_FW_CFG mailbox command\n"); | |
9605 | return -ENOMEM; | |
9606 | } | |
9607 | length = (sizeof(struct lpfc_mbx_query_fw_config) - | |
9608 | sizeof(struct lpfc_sli4_cfg_mhdr)); | |
9609 | lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, | |
9610 | LPFC_MBOX_OPCODE_QUERY_FW_CFG, | |
9611 | length, LPFC_SLI4_MBX_EMBED); | |
9612 | ||
9613 | rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
9614 | ||
9615 | shdr = (union lpfc_sli4_cfg_shdr *) | |
9616 | &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; | |
9617 | shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); | |
9618 | shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response); | |
9619 | if (shdr_status || shdr_add_status || rc) { | |
372c187b | 9620 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
962bc51b JS |
9621 | "3250 QUERY_FW_CFG mailbox failed with status " |
9622 | "x%x add_status x%x, mbx status x%x\n", | |
9623 | shdr_status, shdr_add_status, rc); | |
9624 | if (rc != MBX_TIMEOUT) | |
9625 | mempool_free(mboxq, phba->mbox_mem_pool); | |
9626 | rc = -ENXIO; | |
9627 | goto out_error; | |
9628 | } | |
9629 | ||
9630 | phba->sli4_hba.fw_func_mode = | |
9631 | mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode; | |
9632 | phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode; | |
9633 | phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode; | |
8b017a30 JS |
9634 | phba->sli4_hba.physical_port = |
9635 | mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port; | |
962bc51b JS |
9636 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
9637 | "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, " | |
9638 | "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode, | |
9639 | phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode); | |
9640 | ||
9641 | if (rc != MBX_TIMEOUT) | |
9642 | mempool_free(mboxq, phba->mbox_mem_pool); | |
da0436e9 JS |
9643 | |
9644 | /* | |
67d12733 | 9645 | * Set up HBA Event Queues (EQs) |
da0436e9 | 9646 | */ |
cdb42bec | 9647 | qp = phba->sli4_hba.hdwq; |
da0436e9 | 9648 | |
67d12733 | 9649 | /* Set up HBA event queue */ |
cdb42bec | 9650 | if (!qp) { |
372c187b | 9651 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
2e90f4b5 | 9652 | "3147 Fast-path EQs not allocated\n"); |
1b51197d | 9653 | rc = -ENOMEM; |
67d12733 | 9654 | goto out_error; |
2e90f4b5 | 9655 | } |
657add4e JS |
9656 | |
9657 | /* Loop thru all IRQ vectors */ | |
6a828b0f | 9658 | for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { |
657add4e JS |
9659 | /* Create HBA Event Queues (EQs) in order */ |
9660 | for_each_present_cpu(cpu) { | |
9661 | cpup = &phba->sli4_hba.cpu_map[cpu]; | |
9662 | ||
9663 | /* Look for the CPU thats using that vector with | |
9664 | * LPFC_CPU_FIRST_IRQ set. | |
9665 | */ | |
9666 | if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) | |
9667 | continue; | |
9668 | if (qidx != cpup->eq) | |
9669 | continue; | |
9670 | ||
9671 | /* Create an EQ for that vector */ | |
9672 | rc = lpfc_eq_create(phba, qp[cpup->hdwq].hba_eq, | |
9673 | phba->cfg_fcp_imax); | |
9674 | if (rc) { | |
372c187b | 9675 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
657add4e JS |
9676 | "0523 Failed setup of fast-path" |
9677 | " EQ (%d), rc = 0x%x\n", | |
9678 | cpup->eq, (uint32_t)rc); | |
9679 | goto out_destroy; | |
9680 | } | |
9681 | ||
9682 | /* Save the EQ for that vector in the hba_eq_hdl */ | |
9683 | phba->sli4_hba.hba_eq_hdl[cpup->eq].eq = | |
9684 | qp[cpup->hdwq].hba_eq; | |
9685 | ||
9686 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
9687 | "2584 HBA EQ setup: queue[%d]-id=%d\n", | |
9688 | cpup->eq, | |
9689 | qp[cpup->hdwq].hba_eq->queue_id); | |
da0436e9 | 9690 | } |
67d12733 JS |
9691 | } |
9692 | ||
657add4e | 9693 | /* Loop thru all Hardware Queues */ |
cdb42bec | 9694 | for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { |
657add4e JS |
9695 | cpu = lpfc_find_cpu_handle(phba, qidx, LPFC_FIND_BY_HDWQ); |
9696 | cpup = &phba->sli4_hba.cpu_map[cpu]; | |
9697 | ||
9698 | /* Create the CQ/WQ corresponding to the Hardware Queue */ | |
cdb42bec | 9699 | rc = lpfc_create_wq_cq(phba, |
657add4e | 9700 | phba->sli4_hba.hdwq[cpup->hdwq].hba_eq, |
c00f62e6 JS |
9701 | qp[qidx].io_cq, |
9702 | qp[qidx].io_wq, | |
9703 | &phba->sli4_hba.hdwq[qidx].io_cq_map, | |
9704 | qidx, | |
9705 | LPFC_IO); | |
cdb42bec | 9706 | if (rc) { |
372c187b | 9707 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
895427bd | 9708 | "0535 Failed to setup fastpath " |
c00f62e6 | 9709 | "IO WQ/CQ (%d), rc = 0x%x\n", |
895427bd | 9710 | qidx, (uint32_t)rc); |
cdb42bec | 9711 | goto out_destroy; |
895427bd | 9712 | } |
67d12733 | 9713 | } |
895427bd | 9714 | |
da0436e9 | 9715 | /* |
895427bd | 9716 | * Set up Slow Path Complete Queues (CQs) |
da0436e9 JS |
9717 | */ |
9718 | ||
895427bd | 9719 | /* Set up slow-path MBOX CQ/MQ */ |
da0436e9 | 9720 | |
895427bd | 9721 | if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) { |
372c187b | 9722 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
895427bd JS |
9723 | "0528 %s not allocated\n", |
9724 | phba->sli4_hba.mbx_cq ? | |
d1f525aa | 9725 | "Mailbox WQ" : "Mailbox CQ"); |
1b51197d | 9726 | rc = -ENOMEM; |
895427bd | 9727 | goto out_destroy; |
da0436e9 | 9728 | } |
da0436e9 | 9729 | |
cdb42bec | 9730 | rc = lpfc_create_wq_cq(phba, qp[0].hba_eq, |
d1f525aa JS |
9731 | phba->sli4_hba.mbx_cq, |
9732 | phba->sli4_hba.mbx_wq, | |
9733 | NULL, 0, LPFC_MBOX); | |
da0436e9 | 9734 | if (rc) { |
372c187b | 9735 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
895427bd JS |
9736 | "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n", |
9737 | (uint32_t)rc); | |
9738 | goto out_destroy; | |
da0436e9 | 9739 | } |
2d7dbc4c JS |
9740 | if (phba->nvmet_support) { |
9741 | if (!phba->sli4_hba.nvmet_cqset) { | |
372c187b | 9742 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
2d7dbc4c JS |
9743 | "3165 Fast-path NVME CQ Set " |
9744 | "array not allocated\n"); | |
9745 | rc = -ENOMEM; | |
9746 | goto out_destroy; | |
9747 | } | |
9748 | if (phba->cfg_nvmet_mrq > 1) { | |
9749 | rc = lpfc_cq_create_set(phba, | |
9750 | phba->sli4_hba.nvmet_cqset, | |
cdb42bec | 9751 | qp, |
2d7dbc4c JS |
9752 | LPFC_WCQ, LPFC_NVMET); |
9753 | if (rc) { | |
372c187b | 9754 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
2d7dbc4c JS |
9755 | "3164 Failed setup of NVME CQ " |
9756 | "Set, rc = 0x%x\n", | |
9757 | (uint32_t)rc); | |
9758 | goto out_destroy; | |
9759 | } | |
9760 | } else { | |
9761 | /* Set up NVMET Receive Complete Queue */ | |
9762 | rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0], | |
cdb42bec | 9763 | qp[0].hba_eq, |
2d7dbc4c JS |
9764 | LPFC_WCQ, LPFC_NVMET); |
9765 | if (rc) { | |
372c187b | 9766 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
2d7dbc4c JS |
9767 | "6089 Failed setup NVMET CQ: " |
9768 | "rc = 0x%x\n", (uint32_t)rc); | |
9769 | goto out_destroy; | |
9770 | } | |
81b96eda JS |
9771 | phba->sli4_hba.nvmet_cqset[0]->chann = 0; |
9772 | ||
2d7dbc4c JS |
9773 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
9774 | "6090 NVMET CQ setup: cq-id=%d, " | |
9775 | "parent eq-id=%d\n", | |
9776 | phba->sli4_hba.nvmet_cqset[0]->queue_id, | |
cdb42bec | 9777 | qp[0].hba_eq->queue_id); |
2d7dbc4c JS |
9778 | } |
9779 | } | |
da0436e9 | 9780 | |
895427bd JS |
9781 | /* Set up slow-path ELS WQ/CQ */ |
9782 | if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) { | |
372c187b | 9783 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
895427bd JS |
9784 | "0530 ELS %s not allocated\n", |
9785 | phba->sli4_hba.els_cq ? "WQ" : "CQ"); | |
1b51197d | 9786 | rc = -ENOMEM; |
895427bd | 9787 | goto out_destroy; |
da0436e9 | 9788 | } |
cdb42bec JS |
9789 | rc = lpfc_create_wq_cq(phba, qp[0].hba_eq, |
9790 | phba->sli4_hba.els_cq, | |
9791 | phba->sli4_hba.els_wq, | |
9792 | NULL, 0, LPFC_ELS); | |
da0436e9 | 9793 | if (rc) { |
372c187b | 9794 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
cdb42bec JS |
9795 | "0525 Failed setup of ELS WQ/CQ: rc = 0x%x\n", |
9796 | (uint32_t)rc); | |
895427bd | 9797 | goto out_destroy; |
da0436e9 JS |
9798 | } |
9799 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
9800 | "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n", | |
9801 | phba->sli4_hba.els_wq->queue_id, | |
9802 | phba->sli4_hba.els_cq->queue_id); | |
9803 | ||
cdb42bec | 9804 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { |
895427bd JS |
9805 | /* Set up NVME LS Complete Queue */ |
9806 | if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) { | |
372c187b | 9807 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
895427bd JS |
9808 | "6091 LS %s not allocated\n", |
9809 | phba->sli4_hba.nvmels_cq ? "WQ" : "CQ"); | |
9810 | rc = -ENOMEM; | |
9811 | goto out_destroy; | |
9812 | } | |
cdb42bec JS |
9813 | rc = lpfc_create_wq_cq(phba, qp[0].hba_eq, |
9814 | phba->sli4_hba.nvmels_cq, | |
9815 | phba->sli4_hba.nvmels_wq, | |
9816 | NULL, 0, LPFC_NVME_LS); | |
895427bd | 9817 | if (rc) { |
372c187b | 9818 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
cdb42bec JS |
9819 | "0526 Failed setup of NVVME LS WQ/CQ: " |
9820 | "rc = 0x%x\n", (uint32_t)rc); | |
895427bd JS |
9821 | goto out_destroy; |
9822 | } | |
9823 | ||
9824 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
9825 | "6096 ELS WQ setup: wq-id=%d, " | |
9826 | "parent cq-id=%d\n", | |
9827 | phba->sli4_hba.nvmels_wq->queue_id, | |
9828 | phba->sli4_hba.nvmels_cq->queue_id); | |
9829 | } | |
9830 | ||
2d7dbc4c JS |
9831 | /* |
9832 | * Create NVMET Receive Queue (RQ) | |
9833 | */ | |
9834 | if (phba->nvmet_support) { | |
9835 | if ((!phba->sli4_hba.nvmet_cqset) || | |
9836 | (!phba->sli4_hba.nvmet_mrq_hdr) || | |
9837 | (!phba->sli4_hba.nvmet_mrq_data)) { | |
372c187b | 9838 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
2d7dbc4c JS |
9839 | "6130 MRQ CQ Queues not " |
9840 | "allocated\n"); | |
9841 | rc = -ENOMEM; | |
9842 | goto out_destroy; | |
9843 | } | |
9844 | if (phba->cfg_nvmet_mrq > 1) { | |
9845 | rc = lpfc_mrq_create(phba, | |
9846 | phba->sli4_hba.nvmet_mrq_hdr, | |
9847 | phba->sli4_hba.nvmet_mrq_data, | |
9848 | phba->sli4_hba.nvmet_cqset, | |
9849 | LPFC_NVMET); | |
9850 | if (rc) { | |
372c187b | 9851 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
2d7dbc4c JS |
9852 | "6098 Failed setup of NVMET " |
9853 | "MRQ: rc = 0x%x\n", | |
9854 | (uint32_t)rc); | |
9855 | goto out_destroy; | |
9856 | } | |
9857 | ||
9858 | } else { | |
9859 | rc = lpfc_rq_create(phba, | |
9860 | phba->sli4_hba.nvmet_mrq_hdr[0], | |
9861 | phba->sli4_hba.nvmet_mrq_data[0], | |
9862 | phba->sli4_hba.nvmet_cqset[0], | |
9863 | LPFC_NVMET); | |
9864 | if (rc) { | |
372c187b | 9865 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
2d7dbc4c JS |
9866 | "6057 Failed setup of NVMET " |
9867 | "Receive Queue: rc = 0x%x\n", | |
9868 | (uint32_t)rc); | |
9869 | goto out_destroy; | |
9870 | } | |
9871 | ||
9872 | lpfc_printf_log( | |
9873 | phba, KERN_INFO, LOG_INIT, | |
9874 | "6099 NVMET RQ setup: hdr-rq-id=%d, " | |
9875 | "dat-rq-id=%d parent cq-id=%d\n", | |
9876 | phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id, | |
9877 | phba->sli4_hba.nvmet_mrq_data[0]->queue_id, | |
9878 | phba->sli4_hba.nvmet_cqset[0]->queue_id); | |
9879 | ||
9880 | } | |
9881 | } | |
9882 | ||
da0436e9 | 9883 | if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) { |
372c187b | 9884 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
da0436e9 | 9885 | "0540 Receive Queue not allocated\n"); |
1b51197d | 9886 | rc = -ENOMEM; |
895427bd | 9887 | goto out_destroy; |
da0436e9 | 9888 | } |
73d91e50 | 9889 | |
da0436e9 | 9890 | rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq, |
4d9ab994 | 9891 | phba->sli4_hba.els_cq, LPFC_USOL); |
da0436e9 | 9892 | if (rc) { |
372c187b | 9893 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
da0436e9 | 9894 | "0541 Failed setup of Receive Queue: " |
a2fc4aef | 9895 | "rc = 0x%x\n", (uint32_t)rc); |
895427bd | 9896 | goto out_destroy; |
da0436e9 | 9897 | } |
73d91e50 | 9898 | |
da0436e9 JS |
9899 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
9900 | "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d " | |
9901 | "parent cq-id=%d\n", | |
9902 | phba->sli4_hba.hdr_rq->queue_id, | |
9903 | phba->sli4_hba.dat_rq->queue_id, | |
4d9ab994 | 9904 | phba->sli4_hba.els_cq->queue_id); |
1ba981fd | 9905 | |
cb733e35 JS |
9906 | if (phba->cfg_fcp_imax) |
9907 | usdelay = LPFC_SEC_TO_USEC / phba->cfg_fcp_imax; | |
9908 | else | |
9909 | usdelay = 0; | |
9910 | ||
6a828b0f | 9911 | for (qidx = 0; qidx < phba->cfg_irq_chann; |
cdb42bec | 9912 | qidx += LPFC_MAX_EQ_DELAY_EQID_CNT) |
0cf07f84 | 9913 | lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT, |
cb733e35 | 9914 | usdelay); |
43140ca6 | 9915 | |
6a828b0f JS |
9916 | if (phba->sli4_hba.cq_max) { |
9917 | kfree(phba->sli4_hba.cq_lookup); | |
9918 | phba->sli4_hba.cq_lookup = kcalloc((phba->sli4_hba.cq_max + 1), | |
9919 | sizeof(struct lpfc_queue *), GFP_KERNEL); | |
9920 | if (!phba->sli4_hba.cq_lookup) { | |
372c187b | 9921 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
6a828b0f JS |
9922 | "0549 Failed setup of CQ Lookup table: " |
9923 | "size 0x%x\n", phba->sli4_hba.cq_max); | |
fad28e3d | 9924 | rc = -ENOMEM; |
895427bd | 9925 | goto out_destroy; |
1ba981fd | 9926 | } |
6a828b0f | 9927 | lpfc_setup_cq_lookup(phba); |
1ba981fd | 9928 | } |
da0436e9 JS |
9929 | return 0; |
9930 | ||
895427bd JS |
9931 | out_destroy: |
9932 | lpfc_sli4_queue_unset(phba); | |
da0436e9 JS |
9933 | out_error: |
9934 | return rc; | |
9935 | } | |
9936 | ||
9937 | /** | |
9938 | * lpfc_sli4_queue_unset - Unset all the SLI4 queues | |
9939 | * @phba: pointer to lpfc hba data structure. | |
9940 | * | |
9941 | * This routine is invoked to unset all the SLI4 queues with the FCoE HBA | |
9942 | * operation. | |
9943 | * | |
9944 | * Return codes | |
af901ca1 | 9945 | * 0 - successful |
25985edc | 9946 | * -ENOMEM - No available memory |
d439d286 | 9947 | * -EIO - The mailbox failed to complete successfully. |
da0436e9 JS |
9948 | **/ |
9949 | void | |
9950 | lpfc_sli4_queue_unset(struct lpfc_hba *phba) | |
9951 | { | |
cdb42bec | 9952 | struct lpfc_sli4_hdw_queue *qp; |
657add4e | 9953 | struct lpfc_queue *eq; |
895427bd | 9954 | int qidx; |
da0436e9 JS |
9955 | |
9956 | /* Unset mailbox command work queue */ | |
895427bd JS |
9957 | if (phba->sli4_hba.mbx_wq) |
9958 | lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq); | |
9959 | ||
9960 | /* Unset NVME LS work queue */ | |
9961 | if (phba->sli4_hba.nvmels_wq) | |
9962 | lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq); | |
9963 | ||
da0436e9 | 9964 | /* Unset ELS work queue */ |
019c0d66 | 9965 | if (phba->sli4_hba.els_wq) |
895427bd JS |
9966 | lpfc_wq_destroy(phba, phba->sli4_hba.els_wq); |
9967 | ||
da0436e9 | 9968 | /* Unset unsolicited receive queue */ |
895427bd JS |
9969 | if (phba->sli4_hba.hdr_rq) |
9970 | lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq, | |
9971 | phba->sli4_hba.dat_rq); | |
9972 | ||
da0436e9 | 9973 | /* Unset mailbox command complete queue */ |
895427bd JS |
9974 | if (phba->sli4_hba.mbx_cq) |
9975 | lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq); | |
9976 | ||
da0436e9 | 9977 | /* Unset ELS complete queue */ |
895427bd JS |
9978 | if (phba->sli4_hba.els_cq) |
9979 | lpfc_cq_destroy(phba, phba->sli4_hba.els_cq); | |
9980 | ||
9981 | /* Unset NVME LS complete queue */ | |
9982 | if (phba->sli4_hba.nvmels_cq) | |
9983 | lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq); | |
9984 | ||
bcb24f65 JS |
9985 | if (phba->nvmet_support) { |
9986 | /* Unset NVMET MRQ queue */ | |
9987 | if (phba->sli4_hba.nvmet_mrq_hdr) { | |
9988 | for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) | |
9989 | lpfc_rq_destroy( | |
9990 | phba, | |
2d7dbc4c JS |
9991 | phba->sli4_hba.nvmet_mrq_hdr[qidx], |
9992 | phba->sli4_hba.nvmet_mrq_data[qidx]); | |
bcb24f65 | 9993 | } |
2d7dbc4c | 9994 | |
bcb24f65 JS |
9995 | /* Unset NVMET CQ Set complete queue */ |
9996 | if (phba->sli4_hba.nvmet_cqset) { | |
9997 | for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) | |
9998 | lpfc_cq_destroy( | |
9999 | phba, phba->sli4_hba.nvmet_cqset[qidx]); | |
10000 | } | |
2d7dbc4c JS |
10001 | } |
10002 | ||
cdb42bec JS |
10003 | /* Unset fast-path SLI4 queues */ |
10004 | if (phba->sli4_hba.hdwq) { | |
657add4e | 10005 | /* Loop thru all Hardware Queues */ |
cdb42bec | 10006 | for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { |
657add4e | 10007 | /* Destroy the CQ/WQ corresponding to Hardware Queue */ |
cdb42bec | 10008 | qp = &phba->sli4_hba.hdwq[qidx]; |
c00f62e6 JS |
10009 | lpfc_wq_destroy(phba, qp->io_wq); |
10010 | lpfc_cq_destroy(phba, qp->io_cq); | |
657add4e JS |
10011 | } |
10012 | /* Loop thru all IRQ vectors */ | |
10013 | for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { | |
10014 | /* Destroy the EQ corresponding to the IRQ vector */ | |
10015 | eq = phba->sli4_hba.hba_eq_hdl[qidx].eq; | |
10016 | lpfc_eq_destroy(phba, eq); | |
cdb42bec JS |
10017 | } |
10018 | } | |
895427bd | 10019 | |
6a828b0f JS |
10020 | kfree(phba->sli4_hba.cq_lookup); |
10021 | phba->sli4_hba.cq_lookup = NULL; | |
10022 | phba->sli4_hba.cq_max = 0; | |
da0436e9 JS |
10023 | } |
10024 | ||
10025 | /** | |
10026 | * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool | |
10027 | * @phba: pointer to lpfc hba data structure. | |
10028 | * | |
10029 | * This routine is invoked to allocate and set up a pool of completion queue | |
10030 | * events. The body of the completion queue event is a completion queue entry | |
10031 | * CQE. For now, this pool is used for the interrupt service routine to queue | |
10032 | * the following HBA completion queue events for the worker thread to process: | |
10033 | * - Mailbox asynchronous events | |
10034 | * - Receive queue completion unsolicited events | |
10035 | * Later, this can be used for all the slow-path events. | |
10036 | * | |
10037 | * Return codes | |
af901ca1 | 10038 | * 0 - successful |
25985edc | 10039 | * -ENOMEM - No available memory |
da0436e9 JS |
10040 | **/ |
10041 | static int | |
10042 | lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba) | |
10043 | { | |
10044 | struct lpfc_cq_event *cq_event; | |
10045 | int i; | |
10046 | ||
10047 | for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) { | |
10048 | cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL); | |
10049 | if (!cq_event) | |
10050 | goto out_pool_create_fail; | |
10051 | list_add_tail(&cq_event->list, | |
10052 | &phba->sli4_hba.sp_cqe_event_pool); | |
10053 | } | |
10054 | return 0; | |
10055 | ||
10056 | out_pool_create_fail: | |
10057 | lpfc_sli4_cq_event_pool_destroy(phba); | |
10058 | return -ENOMEM; | |
10059 | } | |
10060 | ||
10061 | /** | |
10062 | * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool | |
10063 | * @phba: pointer to lpfc hba data structure. | |
10064 | * | |
10065 | * This routine is invoked to free the pool of completion queue events at | |
10066 | * driver unload time. Note that, it is the responsibility of the driver | |
10067 | * cleanup routine to free all the outstanding completion-queue events | |
10068 | * allocated from this pool back into the pool before invoking this routine | |
10069 | * to destroy the pool. | |
10070 | **/ | |
10071 | static void | |
10072 | lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba) | |
10073 | { | |
10074 | struct lpfc_cq_event *cq_event, *next_cq_event; | |
10075 | ||
10076 | list_for_each_entry_safe(cq_event, next_cq_event, | |
10077 | &phba->sli4_hba.sp_cqe_event_pool, list) { | |
10078 | list_del(&cq_event->list); | |
10079 | kfree(cq_event); | |
10080 | } | |
10081 | } | |
10082 | ||
10083 | /** | |
10084 | * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool | |
10085 | * @phba: pointer to lpfc hba data structure. | |
10086 | * | |
10087 | * This routine is the lock free version of the API invoked to allocate a | |
10088 | * completion-queue event from the free pool. | |
10089 | * | |
10090 | * Return: Pointer to the newly allocated completion-queue event if successful | |
10091 | * NULL otherwise. | |
10092 | **/ | |
10093 | struct lpfc_cq_event * | |
10094 | __lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba) | |
10095 | { | |
10096 | struct lpfc_cq_event *cq_event = NULL; | |
10097 | ||
10098 | list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event, | |
10099 | struct lpfc_cq_event, list); | |
10100 | return cq_event; | |
10101 | } | |
10102 | ||
10103 | /** | |
10104 | * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool | |
10105 | * @phba: pointer to lpfc hba data structure. | |
10106 | * | |
10107 | * This routine is the lock version of the API invoked to allocate a | |
10108 | * completion-queue event from the free pool. | |
10109 | * | |
10110 | * Return: Pointer to the newly allocated completion-queue event if successful | |
10111 | * NULL otherwise. | |
10112 | **/ | |
10113 | struct lpfc_cq_event * | |
10114 | lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba) | |
10115 | { | |
10116 | struct lpfc_cq_event *cq_event; | |
10117 | unsigned long iflags; | |
10118 | ||
10119 | spin_lock_irqsave(&phba->hbalock, iflags); | |
10120 | cq_event = __lpfc_sli4_cq_event_alloc(phba); | |
10121 | spin_unlock_irqrestore(&phba->hbalock, iflags); | |
10122 | return cq_event; | |
10123 | } | |
10124 | ||
10125 | /** | |
10126 | * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool | |
10127 | * @phba: pointer to lpfc hba data structure. | |
10128 | * @cq_event: pointer to the completion queue event to be freed. | |
10129 | * | |
10130 | * This routine is the lock free version of the API invoked to release a | |
10131 | * completion-queue event back into the free pool. | |
10132 | **/ | |
10133 | void | |
10134 | __lpfc_sli4_cq_event_release(struct lpfc_hba *phba, | |
10135 | struct lpfc_cq_event *cq_event) | |
10136 | { | |
10137 | list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool); | |
10138 | } | |
10139 | ||
10140 | /** | |
10141 | * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool | |
10142 | * @phba: pointer to lpfc hba data structure. | |
10143 | * @cq_event: pointer to the completion queue event to be freed. | |
10144 | * | |
10145 | * This routine is the lock version of the API invoked to release a | |
10146 | * completion-queue event back into the free pool. | |
10147 | **/ | |
10148 | void | |
10149 | lpfc_sli4_cq_event_release(struct lpfc_hba *phba, | |
10150 | struct lpfc_cq_event *cq_event) | |
10151 | { | |
10152 | unsigned long iflags; | |
10153 | spin_lock_irqsave(&phba->hbalock, iflags); | |
10154 | __lpfc_sli4_cq_event_release(phba, cq_event); | |
10155 | spin_unlock_irqrestore(&phba->hbalock, iflags); | |
10156 | } | |
10157 | ||
10158 | /** | |
10159 | * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool | |
10160 | * @phba: pointer to lpfc hba data structure. | |
10161 | * | |
10162 | * This routine is to free all the pending completion-queue events to the | |
10163 | * back into the free pool for device reset. | |
10164 | **/ | |
10165 | static void | |
10166 | lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba) | |
10167 | { | |
e7dab164 JS |
10168 | LIST_HEAD(cq_event_list); |
10169 | struct lpfc_cq_event *cq_event; | |
da0436e9 JS |
10170 | unsigned long iflags; |
10171 | ||
10172 | /* Retrieve all the pending WCQEs from pending WCQE lists */ | |
e7dab164 | 10173 | |
da0436e9 | 10174 | /* Pending ELS XRI abort events */ |
e7dab164 | 10175 | spin_lock_irqsave(&phba->sli4_hba.els_xri_abrt_list_lock, iflags); |
da0436e9 | 10176 | list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue, |
e7dab164 JS |
10177 | &cq_event_list); |
10178 | spin_unlock_irqrestore(&phba->sli4_hba.els_xri_abrt_list_lock, iflags); | |
10179 | ||
da0436e9 | 10180 | /* Pending asynnc events */ |
e7dab164 | 10181 | spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags); |
da0436e9 | 10182 | list_splice_init(&phba->sli4_hba.sp_asynce_work_queue, |
e7dab164 JS |
10183 | &cq_event_list); |
10184 | spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags); | |
da0436e9 | 10185 | |
e7dab164 JS |
10186 | while (!list_empty(&cq_event_list)) { |
10187 | list_remove_head(&cq_event_list, cq_event, | |
10188 | struct lpfc_cq_event, list); | |
10189 | lpfc_sli4_cq_event_release(phba, cq_event); | |
da0436e9 JS |
10190 | } |
10191 | } | |
10192 | ||
10193 | /** | |
10194 | * lpfc_pci_function_reset - Reset pci function. | |
10195 | * @phba: pointer to lpfc hba data structure. | |
10196 | * | |
10197 | * This routine is invoked to request a PCI function reset. It will destroys | |
10198 | * all resources assigned to the PCI function which originates this request. | |
10199 | * | |
10200 | * Return codes | |
af901ca1 | 10201 | * 0 - successful |
25985edc | 10202 | * -ENOMEM - No available memory |
d439d286 | 10203 | * -EIO - The mailbox failed to complete successfully. |
da0436e9 JS |
10204 | **/ |
10205 | int | |
10206 | lpfc_pci_function_reset(struct lpfc_hba *phba) | |
10207 | { | |
10208 | LPFC_MBOXQ_t *mboxq; | |
2fcee4bf | 10209 | uint32_t rc = 0, if_type; |
da0436e9 | 10210 | uint32_t shdr_status, shdr_add_status; |
2f6fa2c9 JS |
10211 | uint32_t rdy_chk; |
10212 | uint32_t port_reset = 0; | |
da0436e9 | 10213 | union lpfc_sli4_cfg_shdr *shdr; |
2fcee4bf | 10214 | struct lpfc_register reg_data; |
2b81f942 | 10215 | uint16_t devid; |
da0436e9 | 10216 | |
2fcee4bf JS |
10217 | if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); |
10218 | switch (if_type) { | |
10219 | case LPFC_SLI_INTF_IF_TYPE_0: | |
10220 | mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, | |
10221 | GFP_KERNEL); | |
10222 | if (!mboxq) { | |
372c187b | 10223 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
2fcee4bf JS |
10224 | "0494 Unable to allocate memory for " |
10225 | "issuing SLI_FUNCTION_RESET mailbox " | |
10226 | "command\n"); | |
10227 | return -ENOMEM; | |
10228 | } | |
da0436e9 | 10229 | |
2fcee4bf JS |
10230 | /* Setup PCI function reset mailbox-ioctl command */ |
10231 | lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, | |
10232 | LPFC_MBOX_OPCODE_FUNCTION_RESET, 0, | |
10233 | LPFC_SLI4_MBX_EMBED); | |
10234 | rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
10235 | shdr = (union lpfc_sli4_cfg_shdr *) | |
10236 | &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; | |
10237 | shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); | |
10238 | shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, | |
10239 | &shdr->response); | |
10240 | if (rc != MBX_TIMEOUT) | |
10241 | mempool_free(mboxq, phba->mbox_mem_pool); | |
10242 | if (shdr_status || shdr_add_status || rc) { | |
372c187b | 10243 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
2fcee4bf JS |
10244 | "0495 SLI_FUNCTION_RESET mailbox " |
10245 | "failed with status x%x add_status x%x," | |
10246 | " mbx status x%x\n", | |
10247 | shdr_status, shdr_add_status, rc); | |
10248 | rc = -ENXIO; | |
10249 | } | |
10250 | break; | |
10251 | case LPFC_SLI_INTF_IF_TYPE_2: | |
27d6ac0a | 10252 | case LPFC_SLI_INTF_IF_TYPE_6: |
2f6fa2c9 JS |
10253 | wait: |
10254 | /* | |
10255 | * Poll the Port Status Register and wait for RDY for | |
10256 | * up to 30 seconds. If the port doesn't respond, treat | |
10257 | * it as an error. | |
10258 | */ | |
77d093fb | 10259 | for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) { |
2f6fa2c9 JS |
10260 | if (lpfc_readl(phba->sli4_hba.u.if_type2. |
10261 | STATUSregaddr, ®_data.word0)) { | |
10262 | rc = -ENODEV; | |
10263 | goto out; | |
10264 | } | |
10265 | if (bf_get(lpfc_sliport_status_rdy, ®_data)) | |
10266 | break; | |
10267 | msleep(20); | |
10268 | } | |
10269 | ||
10270 | if (!bf_get(lpfc_sliport_status_rdy, ®_data)) { | |
10271 | phba->work_status[0] = readl( | |
10272 | phba->sli4_hba.u.if_type2.ERR1regaddr); | |
10273 | phba->work_status[1] = readl( | |
10274 | phba->sli4_hba.u.if_type2.ERR2regaddr); | |
372c187b | 10275 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
2f6fa2c9 JS |
10276 | "2890 Port not ready, port status reg " |
10277 | "0x%x error 1=0x%x, error 2=0x%x\n", | |
10278 | reg_data.word0, | |
10279 | phba->work_status[0], | |
10280 | phba->work_status[1]); | |
10281 | rc = -ENODEV; | |
10282 | goto out; | |
10283 | } | |
10284 | ||
10285 | if (!port_reset) { | |
10286 | /* | |
10287 | * Reset the port now | |
10288 | */ | |
2fcee4bf JS |
10289 | reg_data.word0 = 0; |
10290 | bf_set(lpfc_sliport_ctrl_end, ®_data, | |
10291 | LPFC_SLIPORT_LITTLE_ENDIAN); | |
10292 | bf_set(lpfc_sliport_ctrl_ip, ®_data, | |
10293 | LPFC_SLIPORT_INIT_PORT); | |
10294 | writel(reg_data.word0, phba->sli4_hba.u.if_type2. | |
10295 | CTRLregaddr); | |
8fcb8acd | 10296 | /* flush */ |
2b81f942 JS |
10297 | pci_read_config_word(phba->pcidev, |
10298 | PCI_DEVICE_ID, &devid); | |
2fcee4bf | 10299 | |
2f6fa2c9 JS |
10300 | port_reset = 1; |
10301 | msleep(20); | |
10302 | goto wait; | |
10303 | } else if (bf_get(lpfc_sliport_status_rn, ®_data)) { | |
10304 | rc = -ENODEV; | |
10305 | goto out; | |
2fcee4bf JS |
10306 | } |
10307 | break; | |
2f6fa2c9 | 10308 | |
2fcee4bf JS |
10309 | case LPFC_SLI_INTF_IF_TYPE_1: |
10310 | default: | |
10311 | break; | |
da0436e9 | 10312 | } |
2fcee4bf | 10313 | |
73d91e50 | 10314 | out: |
2fcee4bf | 10315 | /* Catch the not-ready port failure after a port reset. */ |
2f6fa2c9 | 10316 | if (rc) { |
372c187b | 10317 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
229adb0e | 10318 | "3317 HBA not functional: IP Reset Failed " |
2f6fa2c9 | 10319 | "try: echo fw_reset > board_mode\n"); |
2fcee4bf | 10320 | rc = -ENODEV; |
229adb0e | 10321 | } |
2fcee4bf | 10322 | |
da0436e9 JS |
10323 | return rc; |
10324 | } | |
10325 | ||
da0436e9 JS |
10326 | /** |
10327 | * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space. | |
10328 | * @phba: pointer to lpfc hba data structure. | |
10329 | * | |
10330 | * This routine is invoked to set up the PCI device memory space for device | |
10331 | * with SLI-4 interface spec. | |
10332 | * | |
10333 | * Return codes | |
af901ca1 | 10334 | * 0 - successful |
da0436e9 JS |
10335 | * other values - error |
10336 | **/ | |
10337 | static int | |
10338 | lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba) | |
10339 | { | |
f30e1bfd | 10340 | struct pci_dev *pdev = phba->pcidev; |
da0436e9 | 10341 | unsigned long bar0map_len, bar1map_len, bar2map_len; |
3a487ff7 | 10342 | int error; |
2fcee4bf | 10343 | uint32_t if_type; |
da0436e9 | 10344 | |
f30e1bfd | 10345 | if (!pdev) |
56de8357 | 10346 | return -ENODEV; |
da0436e9 JS |
10347 | |
10348 | /* Set the device DMA mask size */ | |
56de8357 HR |
10349 | error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); |
10350 | if (error) | |
10351 | error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); | |
10352 | if (error) | |
f30e1bfd | 10353 | return error; |
da0436e9 | 10354 | |
2fcee4bf JS |
10355 | /* |
10356 | * The BARs and register set definitions and offset locations are | |
10357 | * dependent on the if_type. | |
10358 | */ | |
10359 | if (pci_read_config_dword(pdev, LPFC_SLI_INTF, | |
10360 | &phba->sli4_hba.sli_intf.word0)) { | |
3a487ff7 | 10361 | return -ENODEV; |
2fcee4bf JS |
10362 | } |
10363 | ||
10364 | /* There is no SLI3 failback for SLI4 devices. */ | |
10365 | if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) != | |
10366 | LPFC_SLI_INTF_VALID) { | |
372c187b | 10367 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
2fcee4bf JS |
10368 | "2894 SLI_INTF reg contents invalid " |
10369 | "sli_intf reg 0x%x\n", | |
10370 | phba->sli4_hba.sli_intf.word0); | |
3a487ff7 | 10371 | return -ENODEV; |
2fcee4bf JS |
10372 | } |
10373 | ||
10374 | if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); | |
10375 | /* | |
10376 | * Get the bus address of SLI4 device Bar regions and the | |
10377 | * number of bytes required by each mapping. The mapping of the | |
10378 | * particular PCI BARs regions is dependent on the type of | |
10379 | * SLI4 device. | |
da0436e9 | 10380 | */ |
f5ca6f2e JS |
10381 | if (pci_resource_start(pdev, PCI_64BIT_BAR0)) { |
10382 | phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0); | |
10383 | bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0); | |
2fcee4bf JS |
10384 | |
10385 | /* | |
10386 | * Map SLI4 PCI Config Space Register base to a kernel virtual | |
10387 | * addr | |
10388 | */ | |
10389 | phba->sli4_hba.conf_regs_memmap_p = | |
10390 | ioremap(phba->pci_bar0_map, bar0map_len); | |
10391 | if (!phba->sli4_hba.conf_regs_memmap_p) { | |
10392 | dev_printk(KERN_ERR, &pdev->dev, | |
10393 | "ioremap failed for SLI4 PCI config " | |
10394 | "registers.\n"); | |
3a487ff7 | 10395 | return -ENODEV; |
2fcee4bf | 10396 | } |
f5ca6f2e | 10397 | phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p; |
2fcee4bf JS |
10398 | /* Set up BAR0 PCI config space register memory map */ |
10399 | lpfc_sli4_bar0_register_memmap(phba, if_type); | |
1dfb5a47 JS |
10400 | } else { |
10401 | phba->pci_bar0_map = pci_resource_start(pdev, 1); | |
10402 | bar0map_len = pci_resource_len(pdev, 1); | |
27d6ac0a | 10403 | if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) { |
2fcee4bf JS |
10404 | dev_printk(KERN_ERR, &pdev->dev, |
10405 | "FATAL - No BAR0 mapping for SLI4, if_type 2\n"); | |
3a487ff7 | 10406 | return -ENODEV; |
2fcee4bf JS |
10407 | } |
10408 | phba->sli4_hba.conf_regs_memmap_p = | |
da0436e9 | 10409 | ioremap(phba->pci_bar0_map, bar0map_len); |
2fcee4bf JS |
10410 | if (!phba->sli4_hba.conf_regs_memmap_p) { |
10411 | dev_printk(KERN_ERR, &pdev->dev, | |
10412 | "ioremap failed for SLI4 PCI config " | |
10413 | "registers.\n"); | |
3a487ff7 | 10414 | return -ENODEV; |
2fcee4bf JS |
10415 | } |
10416 | lpfc_sli4_bar0_register_memmap(phba, if_type); | |
da0436e9 JS |
10417 | } |
10418 | ||
e4b9794e JS |
10419 | if (if_type == LPFC_SLI_INTF_IF_TYPE_0) { |
10420 | if (pci_resource_start(pdev, PCI_64BIT_BAR2)) { | |
10421 | /* | |
10422 | * Map SLI4 if type 0 HBA Control Register base to a | |
10423 | * kernel virtual address and setup the registers. | |
10424 | */ | |
10425 | phba->pci_bar1_map = pci_resource_start(pdev, | |
10426 | PCI_64BIT_BAR2); | |
10427 | bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2); | |
10428 | phba->sli4_hba.ctrl_regs_memmap_p = | |
10429 | ioremap(phba->pci_bar1_map, | |
10430 | bar1map_len); | |
10431 | if (!phba->sli4_hba.ctrl_regs_memmap_p) { | |
10432 | dev_err(&pdev->dev, | |
10433 | "ioremap failed for SLI4 HBA " | |
10434 | "control registers.\n"); | |
10435 | error = -ENOMEM; | |
10436 | goto out_iounmap_conf; | |
10437 | } | |
10438 | phba->pci_bar2_memmap_p = | |
10439 | phba->sli4_hba.ctrl_regs_memmap_p; | |
27d6ac0a | 10440 | lpfc_sli4_bar1_register_memmap(phba, if_type); |
e4b9794e JS |
10441 | } else { |
10442 | error = -ENOMEM; | |
2fcee4bf JS |
10443 | goto out_iounmap_conf; |
10444 | } | |
da0436e9 JS |
10445 | } |
10446 | ||
27d6ac0a JS |
10447 | if ((if_type == LPFC_SLI_INTF_IF_TYPE_6) && |
10448 | (pci_resource_start(pdev, PCI_64BIT_BAR2))) { | |
10449 | /* | |
10450 | * Map SLI4 if type 6 HBA Doorbell Register base to a kernel | |
10451 | * virtual address and setup the registers. | |
10452 | */ | |
10453 | phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2); | |
10454 | bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2); | |
10455 | phba->sli4_hba.drbl_regs_memmap_p = | |
10456 | ioremap(phba->pci_bar1_map, bar1map_len); | |
10457 | if (!phba->sli4_hba.drbl_regs_memmap_p) { | |
10458 | dev_err(&pdev->dev, | |
10459 | "ioremap failed for SLI4 HBA doorbell registers.\n"); | |
3a487ff7 | 10460 | error = -ENOMEM; |
27d6ac0a JS |
10461 | goto out_iounmap_conf; |
10462 | } | |
10463 | phba->pci_bar2_memmap_p = phba->sli4_hba.drbl_regs_memmap_p; | |
10464 | lpfc_sli4_bar1_register_memmap(phba, if_type); | |
10465 | } | |
10466 | ||
e4b9794e JS |
10467 | if (if_type == LPFC_SLI_INTF_IF_TYPE_0) { |
10468 | if (pci_resource_start(pdev, PCI_64BIT_BAR4)) { | |
10469 | /* | |
10470 | * Map SLI4 if type 0 HBA Doorbell Register base to | |
10471 | * a kernel virtual address and setup the registers. | |
10472 | */ | |
10473 | phba->pci_bar2_map = pci_resource_start(pdev, | |
10474 | PCI_64BIT_BAR4); | |
10475 | bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4); | |
10476 | phba->sli4_hba.drbl_regs_memmap_p = | |
10477 | ioremap(phba->pci_bar2_map, | |
10478 | bar2map_len); | |
10479 | if (!phba->sli4_hba.drbl_regs_memmap_p) { | |
10480 | dev_err(&pdev->dev, | |
10481 | "ioremap failed for SLI4 HBA" | |
10482 | " doorbell registers.\n"); | |
10483 | error = -ENOMEM; | |
10484 | goto out_iounmap_ctrl; | |
10485 | } | |
10486 | phba->pci_bar4_memmap_p = | |
10487 | phba->sli4_hba.drbl_regs_memmap_p; | |
10488 | error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0); | |
10489 | if (error) | |
10490 | goto out_iounmap_all; | |
10491 | } else { | |
10492 | error = -ENOMEM; | |
2fcee4bf | 10493 | goto out_iounmap_all; |
e4b9794e | 10494 | } |
da0436e9 JS |
10495 | } |
10496 | ||
1351e69f JS |
10497 | if (if_type == LPFC_SLI_INTF_IF_TYPE_6 && |
10498 | pci_resource_start(pdev, PCI_64BIT_BAR4)) { | |
10499 | /* | |
10500 | * Map SLI4 if type 6 HBA DPP Register base to a kernel | |
10501 | * virtual address and setup the registers. | |
10502 | */ | |
10503 | phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4); | |
10504 | bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4); | |
10505 | phba->sli4_hba.dpp_regs_memmap_p = | |
10506 | ioremap(phba->pci_bar2_map, bar2map_len); | |
10507 | if (!phba->sli4_hba.dpp_regs_memmap_p) { | |
10508 | dev_err(&pdev->dev, | |
10509 | "ioremap failed for SLI4 HBA dpp registers.\n"); | |
3a487ff7 | 10510 | error = -ENOMEM; |
1351e69f JS |
10511 | goto out_iounmap_ctrl; |
10512 | } | |
10513 | phba->pci_bar4_memmap_p = phba->sli4_hba.dpp_regs_memmap_p; | |
10514 | } | |
10515 | ||
b71413dd | 10516 | /* Set up the EQ/CQ register handeling functions now */ |
27d6ac0a JS |
10517 | switch (if_type) { |
10518 | case LPFC_SLI_INTF_IF_TYPE_0: | |
10519 | case LPFC_SLI_INTF_IF_TYPE_2: | |
b71413dd | 10520 | phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_eq_clr_intr; |
32517fc0 JS |
10521 | phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_write_eq_db; |
10522 | phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_write_cq_db; | |
27d6ac0a JS |
10523 | break; |
10524 | case LPFC_SLI_INTF_IF_TYPE_6: | |
10525 | phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_if6_eq_clr_intr; | |
32517fc0 JS |
10526 | phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_if6_write_eq_db; |
10527 | phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_if6_write_cq_db; | |
27d6ac0a JS |
10528 | break; |
10529 | default: | |
10530 | break; | |
b71413dd JS |
10531 | } |
10532 | ||
da0436e9 JS |
10533 | return 0; |
10534 | ||
10535 | out_iounmap_all: | |
10536 | iounmap(phba->sli4_hba.drbl_regs_memmap_p); | |
10537 | out_iounmap_ctrl: | |
10538 | iounmap(phba->sli4_hba.ctrl_regs_memmap_p); | |
10539 | out_iounmap_conf: | |
10540 | iounmap(phba->sli4_hba.conf_regs_memmap_p); | |
3a487ff7 | 10541 | |
da0436e9 JS |
10542 | return error; |
10543 | } | |
10544 | ||
10545 | /** | |
10546 | * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space. | |
10547 | * @phba: pointer to lpfc hba data structure. | |
10548 | * | |
10549 | * This routine is invoked to unset the PCI device memory space for device | |
10550 | * with SLI-4 interface spec. | |
10551 | **/ | |
10552 | static void | |
10553 | lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba) | |
10554 | { | |
2e90f4b5 JS |
10555 | uint32_t if_type; |
10556 | if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); | |
da0436e9 | 10557 | |
2e90f4b5 JS |
10558 | switch (if_type) { |
10559 | case LPFC_SLI_INTF_IF_TYPE_0: | |
10560 | iounmap(phba->sli4_hba.drbl_regs_memmap_p); | |
10561 | iounmap(phba->sli4_hba.ctrl_regs_memmap_p); | |
10562 | iounmap(phba->sli4_hba.conf_regs_memmap_p); | |
10563 | break; | |
10564 | case LPFC_SLI_INTF_IF_TYPE_2: | |
10565 | iounmap(phba->sli4_hba.conf_regs_memmap_p); | |
10566 | break; | |
27d6ac0a JS |
10567 | case LPFC_SLI_INTF_IF_TYPE_6: |
10568 | iounmap(phba->sli4_hba.drbl_regs_memmap_p); | |
10569 | iounmap(phba->sli4_hba.conf_regs_memmap_p); | |
0b439194 JS |
10570 | if (phba->sli4_hba.dpp_regs_memmap_p) |
10571 | iounmap(phba->sli4_hba.dpp_regs_memmap_p); | |
27d6ac0a | 10572 | break; |
2e90f4b5 JS |
10573 | case LPFC_SLI_INTF_IF_TYPE_1: |
10574 | default: | |
10575 | dev_printk(KERN_ERR, &phba->pcidev->dev, | |
10576 | "FATAL - unsupported SLI4 interface type - %d\n", | |
10577 | if_type); | |
10578 | break; | |
10579 | } | |
da0436e9 JS |
10580 | } |
10581 | ||
10582 | /** | |
10583 | * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device | |
10584 | * @phba: pointer to lpfc hba data structure. | |
10585 | * | |
10586 | * This routine is invoked to enable the MSI-X interrupt vectors to device | |
45ffac19 | 10587 | * with SLI-3 interface specs. |
da0436e9 JS |
10588 | * |
10589 | * Return codes | |
af901ca1 | 10590 | * 0 - successful |
da0436e9 JS |
10591 | * other values - error |
10592 | **/ | |
10593 | static int | |
10594 | lpfc_sli_enable_msix(struct lpfc_hba *phba) | |
10595 | { | |
45ffac19 | 10596 | int rc; |
da0436e9 JS |
10597 | LPFC_MBOXQ_t *pmb; |
10598 | ||
10599 | /* Set up MSI-X multi-message vectors */ | |
45ffac19 CH |
10600 | rc = pci_alloc_irq_vectors(phba->pcidev, |
10601 | LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX); | |
10602 | if (rc < 0) { | |
da0436e9 JS |
10603 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
10604 | "0420 PCI enable MSI-X failed (%d)\n", rc); | |
029165ac | 10605 | goto vec_fail_out; |
da0436e9 | 10606 | } |
45ffac19 | 10607 | |
da0436e9 JS |
10608 | /* |
10609 | * Assign MSI-X vectors to interrupt handlers | |
10610 | */ | |
10611 | ||
10612 | /* vector-0 is associated to slow-path handler */ | |
45ffac19 | 10613 | rc = request_irq(pci_irq_vector(phba->pcidev, 0), |
ed243d37 | 10614 | &lpfc_sli_sp_intr_handler, 0, |
da0436e9 JS |
10615 | LPFC_SP_DRIVER_HANDLER_NAME, phba); |
10616 | if (rc) { | |
10617 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
10618 | "0421 MSI-X slow-path request_irq failed " | |
10619 | "(%d)\n", rc); | |
10620 | goto msi_fail_out; | |
10621 | } | |
10622 | ||
10623 | /* vector-1 is associated to fast-path handler */ | |
45ffac19 | 10624 | rc = request_irq(pci_irq_vector(phba->pcidev, 1), |
ed243d37 | 10625 | &lpfc_sli_fp_intr_handler, 0, |
da0436e9 JS |
10626 | LPFC_FP_DRIVER_HANDLER_NAME, phba); |
10627 | ||
10628 | if (rc) { | |
10629 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
10630 | "0429 MSI-X fast-path request_irq failed " | |
10631 | "(%d)\n", rc); | |
10632 | goto irq_fail_out; | |
10633 | } | |
10634 | ||
10635 | /* | |
10636 | * Configure HBA MSI-X attention conditions to messages | |
10637 | */ | |
10638 | pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); | |
10639 | ||
10640 | if (!pmb) { | |
10641 | rc = -ENOMEM; | |
372c187b | 10642 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
da0436e9 JS |
10643 | "0474 Unable to allocate memory for issuing " |
10644 | "MBOX_CONFIG_MSI command\n"); | |
10645 | goto mem_fail_out; | |
10646 | } | |
10647 | rc = lpfc_config_msi(phba, pmb); | |
10648 | if (rc) | |
10649 | goto mbx_fail_out; | |
10650 | rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); | |
10651 | if (rc != MBX_SUCCESS) { | |
10652 | lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX, | |
10653 | "0351 Config MSI mailbox command failed, " | |
10654 | "mbxCmd x%x, mbxStatus x%x\n", | |
10655 | pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus); | |
10656 | goto mbx_fail_out; | |
10657 | } | |
10658 | ||
10659 | /* Free memory allocated for mailbox command */ | |
10660 | mempool_free(pmb, phba->mbox_mem_pool); | |
10661 | return rc; | |
10662 | ||
10663 | mbx_fail_out: | |
10664 | /* Free memory allocated for mailbox command */ | |
10665 | mempool_free(pmb, phba->mbox_mem_pool); | |
10666 | ||
10667 | mem_fail_out: | |
10668 | /* free the irq already requested */ | |
45ffac19 | 10669 | free_irq(pci_irq_vector(phba->pcidev, 1), phba); |
da0436e9 JS |
10670 | |
10671 | irq_fail_out: | |
10672 | /* free the irq already requested */ | |
45ffac19 | 10673 | free_irq(pci_irq_vector(phba->pcidev, 0), phba); |
da0436e9 JS |
10674 | |
10675 | msi_fail_out: | |
10676 | /* Unconfigure MSI-X capability structure */ | |
45ffac19 | 10677 | pci_free_irq_vectors(phba->pcidev); |
029165ac AG |
10678 | |
10679 | vec_fail_out: | |
da0436e9 JS |
10680 | return rc; |
10681 | } | |
10682 | ||
da0436e9 JS |
10683 | /** |
10684 | * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device. | |
10685 | * @phba: pointer to lpfc hba data structure. | |
10686 | * | |
10687 | * This routine is invoked to enable the MSI interrupt mode to device with | |
10688 | * SLI-3 interface spec. The kernel function pci_enable_msi() is called to | |
10689 | * enable the MSI vector. The device driver is responsible for calling the | |
10690 | * request_irq() to register MSI vector with a interrupt the handler, which | |
10691 | * is done in this function. | |
10692 | * | |
10693 | * Return codes | |
af901ca1 | 10694 | * 0 - successful |
da0436e9 JS |
10695 | * other values - error |
10696 | */ | |
10697 | static int | |
10698 | lpfc_sli_enable_msi(struct lpfc_hba *phba) | |
10699 | { | |
10700 | int rc; | |
10701 | ||
10702 | rc = pci_enable_msi(phba->pcidev); | |
10703 | if (!rc) | |
10704 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
10705 | "0462 PCI enable MSI mode success.\n"); | |
10706 | else { | |
10707 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
10708 | "0471 PCI enable MSI mode failed (%d)\n", rc); | |
10709 | return rc; | |
10710 | } | |
10711 | ||
10712 | rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler, | |
ed243d37 | 10713 | 0, LPFC_DRIVER_NAME, phba); |
da0436e9 JS |
10714 | if (rc) { |
10715 | pci_disable_msi(phba->pcidev); | |
10716 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
10717 | "0478 MSI request_irq failed (%d)\n", rc); | |
10718 | } | |
10719 | return rc; | |
10720 | } | |
10721 | ||
da0436e9 JS |
10722 | /** |
10723 | * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device. | |
10724 | * @phba: pointer to lpfc hba data structure. | |
fe614acd | 10725 | * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X). |
da0436e9 JS |
10726 | * |
10727 | * This routine is invoked to enable device interrupt and associate driver's | |
10728 | * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface | |
10729 | * spec. Depends on the interrupt mode configured to the driver, the driver | |
10730 | * will try to fallback from the configured interrupt mode to an interrupt | |
10731 | * mode which is supported by the platform, kernel, and device in the order | |
10732 | * of: | |
10733 | * MSI-X -> MSI -> IRQ. | |
10734 | * | |
10735 | * Return codes | |
af901ca1 | 10736 | * 0 - successful |
da0436e9 JS |
10737 | * other values - error |
10738 | **/ | |
10739 | static uint32_t | |
10740 | lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode) | |
10741 | { | |
10742 | uint32_t intr_mode = LPFC_INTR_ERROR; | |
10743 | int retval; | |
10744 | ||
d2f2547e JS |
10745 | /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */ |
10746 | retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3); | |
10747 | if (retval) | |
10748 | return intr_mode; | |
10749 | phba->hba_flag &= ~HBA_NEEDS_CFG_PORT; | |
10750 | ||
da0436e9 | 10751 | if (cfg_mode == 2) { |
d2f2547e JS |
10752 | /* Now, try to enable MSI-X interrupt mode */ |
10753 | retval = lpfc_sli_enable_msix(phba); | |
da0436e9 | 10754 | if (!retval) { |
d2f2547e JS |
10755 | /* Indicate initialization to MSI-X mode */ |
10756 | phba->intr_type = MSIX; | |
10757 | intr_mode = 2; | |
da0436e9 JS |
10758 | } |
10759 | } | |
10760 | ||
10761 | /* Fallback to MSI if MSI-X initialization failed */ | |
10762 | if (cfg_mode >= 1 && phba->intr_type == NONE) { | |
10763 | retval = lpfc_sli_enable_msi(phba); | |
10764 | if (!retval) { | |
10765 | /* Indicate initialization to MSI mode */ | |
10766 | phba->intr_type = MSI; | |
10767 | intr_mode = 1; | |
10768 | } | |
10769 | } | |
10770 | ||
10771 | /* Fallback to INTx if both MSI-X/MSI initalization failed */ | |
10772 | if (phba->intr_type == NONE) { | |
10773 | retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler, | |
10774 | IRQF_SHARED, LPFC_DRIVER_NAME, phba); | |
10775 | if (!retval) { | |
10776 | /* Indicate initialization to INTx mode */ | |
10777 | phba->intr_type = INTx; | |
10778 | intr_mode = 0; | |
10779 | } | |
10780 | } | |
10781 | return intr_mode; | |
10782 | } | |
10783 | ||
10784 | /** | |
10785 | * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device. | |
10786 | * @phba: pointer to lpfc hba data structure. | |
10787 | * | |
10788 | * This routine is invoked to disable device interrupt and disassociate the | |
10789 | * driver's interrupt handler(s) from interrupt vector(s) to device with | |
10790 | * SLI-3 interface spec. Depending on the interrupt mode, the driver will | |
10791 | * release the interrupt vector(s) for the message signaled interrupt. | |
10792 | **/ | |
10793 | static void | |
10794 | lpfc_sli_disable_intr(struct lpfc_hba *phba) | |
10795 | { | |
45ffac19 CH |
10796 | int nr_irqs, i; |
10797 | ||
da0436e9 | 10798 | if (phba->intr_type == MSIX) |
45ffac19 CH |
10799 | nr_irqs = LPFC_MSIX_VECTORS; |
10800 | else | |
10801 | nr_irqs = 1; | |
10802 | ||
10803 | for (i = 0; i < nr_irqs; i++) | |
10804 | free_irq(pci_irq_vector(phba->pcidev, i), phba); | |
10805 | pci_free_irq_vectors(phba->pcidev); | |
da0436e9 JS |
10806 | |
10807 | /* Reset interrupt management states */ | |
10808 | phba->intr_type = NONE; | |
10809 | phba->sli.slistat.sli_intr = 0; | |
da0436e9 JS |
10810 | } |
10811 | ||
6a828b0f | 10812 | /** |
657add4e | 10813 | * lpfc_find_cpu_handle - Find the CPU that corresponds to the specified Queue |
6a828b0f JS |
10814 | * @phba: pointer to lpfc hba data structure. |
10815 | * @id: EQ vector index or Hardware Queue index | |
10816 | * @match: LPFC_FIND_BY_EQ = match by EQ | |
10817 | * LPFC_FIND_BY_HDWQ = match by Hardware Queue | |
657add4e | 10818 | * Return the CPU that matches the selection criteria |
6a828b0f JS |
10819 | */ |
10820 | static uint16_t | |
10821 | lpfc_find_cpu_handle(struct lpfc_hba *phba, uint16_t id, int match) | |
10822 | { | |
10823 | struct lpfc_vector_map_info *cpup; | |
10824 | int cpu; | |
10825 | ||
657add4e | 10826 | /* Loop through all CPUs */ |
222e9239 JS |
10827 | for_each_present_cpu(cpu) { |
10828 | cpup = &phba->sli4_hba.cpu_map[cpu]; | |
657add4e JS |
10829 | |
10830 | /* If we are matching by EQ, there may be multiple CPUs using | |
10831 | * using the same vector, so select the one with | |
10832 | * LPFC_CPU_FIRST_IRQ set. | |
10833 | */ | |
6a828b0f | 10834 | if ((match == LPFC_FIND_BY_EQ) && |
657add4e | 10835 | (cpup->flag & LPFC_CPU_FIRST_IRQ) && |
6a828b0f JS |
10836 | (cpup->eq == id)) |
10837 | return cpu; | |
657add4e JS |
10838 | |
10839 | /* If matching by HDWQ, select the first CPU that matches */ | |
6a828b0f JS |
10840 | if ((match == LPFC_FIND_BY_HDWQ) && (cpup->hdwq == id)) |
10841 | return cpu; | |
6a828b0f JS |
10842 | } |
10843 | return 0; | |
10844 | } | |
10845 | ||
6a828b0f JS |
10846 | #ifdef CONFIG_X86 |
10847 | /** | |
10848 | * lpfc_find_hyper - Determine if the CPU map entry is hyper-threaded | |
10849 | * @phba: pointer to lpfc hba data structure. | |
10850 | * @cpu: CPU map index | |
10851 | * @phys_id: CPU package physical id | |
10852 | * @core_id: CPU core id | |
10853 | */ | |
10854 | static int | |
10855 | lpfc_find_hyper(struct lpfc_hba *phba, int cpu, | |
10856 | uint16_t phys_id, uint16_t core_id) | |
10857 | { | |
10858 | struct lpfc_vector_map_info *cpup; | |
10859 | int idx; | |
10860 | ||
222e9239 JS |
10861 | for_each_present_cpu(idx) { |
10862 | cpup = &phba->sli4_hba.cpu_map[idx]; | |
6a828b0f JS |
10863 | /* Does the cpup match the one we are looking for */ |
10864 | if ((cpup->phys_id == phys_id) && | |
10865 | (cpup->core_id == core_id) && | |
222e9239 | 10866 | (cpu != idx)) |
6a828b0f | 10867 | return 1; |
6a828b0f JS |
10868 | } |
10869 | return 0; | |
10870 | } | |
10871 | #endif | |
10872 | ||
dcaa2136 JS |
10873 | /* |
10874 | * lpfc_assign_eq_map_info - Assigns eq for vector_map structure | |
10875 | * @phba: pointer to lpfc hba data structure. | |
10876 | * @eqidx: index for eq and irq vector | |
10877 | * @flag: flags to set for vector_map structure | |
10878 | * @cpu: cpu used to index vector_map structure | |
10879 | * | |
10880 | * The routine assigns eq info into vector_map structure | |
10881 | */ | |
10882 | static inline void | |
10883 | lpfc_assign_eq_map_info(struct lpfc_hba *phba, uint16_t eqidx, uint16_t flag, | |
10884 | unsigned int cpu) | |
10885 | { | |
10886 | struct lpfc_vector_map_info *cpup = &phba->sli4_hba.cpu_map[cpu]; | |
10887 | struct lpfc_hba_eq_hdl *eqhdl = lpfc_get_eq_hdl(eqidx); | |
10888 | ||
10889 | cpup->eq = eqidx; | |
10890 | cpup->flag |= flag; | |
10891 | ||
10892 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
10893 | "3336 Set Affinity: CPU %d irq %d eq %d flag x%x\n", | |
10894 | cpu, eqhdl->irq, cpup->eq, cpup->flag); | |
10895 | } | |
10896 | ||
10897 | /** | |
10898 | * lpfc_cpu_map_array_init - Initialize cpu_map structure | |
10899 | * @phba: pointer to lpfc hba data structure. | |
10900 | * | |
10901 | * The routine initializes the cpu_map array structure | |
10902 | */ | |
10903 | static void | |
10904 | lpfc_cpu_map_array_init(struct lpfc_hba *phba) | |
10905 | { | |
10906 | struct lpfc_vector_map_info *cpup; | |
10907 | struct lpfc_eq_intr_info *eqi; | |
10908 | int cpu; | |
10909 | ||
10910 | for_each_possible_cpu(cpu) { | |
10911 | cpup = &phba->sli4_hba.cpu_map[cpu]; | |
10912 | cpup->phys_id = LPFC_VECTOR_MAP_EMPTY; | |
10913 | cpup->core_id = LPFC_VECTOR_MAP_EMPTY; | |
10914 | cpup->hdwq = LPFC_VECTOR_MAP_EMPTY; | |
10915 | cpup->eq = LPFC_VECTOR_MAP_EMPTY; | |
10916 | cpup->flag = 0; | |
10917 | eqi = per_cpu_ptr(phba->sli4_hba.eq_info, cpu); | |
10918 | INIT_LIST_HEAD(&eqi->list); | |
10919 | eqi->icnt = 0; | |
10920 | } | |
10921 | } | |
10922 | ||
10923 | /** | |
10924 | * lpfc_hba_eq_hdl_array_init - Initialize hba_eq_hdl structure | |
10925 | * @phba: pointer to lpfc hba data structure. | |
10926 | * | |
10927 | * The routine initializes the hba_eq_hdl array structure | |
10928 | */ | |
10929 | static void | |
10930 | lpfc_hba_eq_hdl_array_init(struct lpfc_hba *phba) | |
10931 | { | |
10932 | struct lpfc_hba_eq_hdl *eqhdl; | |
10933 | int i; | |
10934 | ||
10935 | for (i = 0; i < phba->cfg_irq_chann; i++) { | |
10936 | eqhdl = lpfc_get_eq_hdl(i); | |
10937 | eqhdl->irq = LPFC_VECTOR_MAP_EMPTY; | |
10938 | eqhdl->phba = phba; | |
10939 | } | |
10940 | } | |
10941 | ||
7bb03bbf | 10942 | /** |
895427bd | 10943 | * lpfc_cpu_affinity_check - Check vector CPU affinity mappings |
7bb03bbf | 10944 | * @phba: pointer to lpfc hba data structure. |
895427bd JS |
10945 | * @vectors: number of msix vectors allocated. |
10946 | * | |
10947 | * The routine will figure out the CPU affinity assignment for every | |
6a828b0f | 10948 | * MSI-X vector allocated for the HBA. |
895427bd JS |
10949 | * In addition, the CPU to IO channel mapping will be calculated |
10950 | * and the phba->sli4_hba.cpu_map array will reflect this. | |
7bb03bbf | 10951 | */ |
895427bd JS |
10952 | static void |
10953 | lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors) | |
7bb03bbf | 10954 | { |
3ad348d9 | 10955 | int i, cpu, idx, next_idx, new_cpu, start_cpu, first_cpu; |
6a828b0f JS |
10956 | int max_phys_id, min_phys_id; |
10957 | int max_core_id, min_core_id; | |
7bb03bbf | 10958 | struct lpfc_vector_map_info *cpup; |
d9954a2d | 10959 | struct lpfc_vector_map_info *new_cpup; |
7bb03bbf JS |
10960 | #ifdef CONFIG_X86 |
10961 | struct cpuinfo_x86 *cpuinfo; | |
10962 | #endif | |
840eda96 JS |
10963 | #ifdef CONFIG_SCSI_LPFC_DEBUG_FS |
10964 | struct lpfc_hdwq_stat *c_stat; | |
10965 | #endif | |
7bb03bbf | 10966 | |
6a828b0f | 10967 | max_phys_id = 0; |
d9954a2d | 10968 | min_phys_id = LPFC_VECTOR_MAP_EMPTY; |
6a828b0f | 10969 | max_core_id = 0; |
d9954a2d | 10970 | min_core_id = LPFC_VECTOR_MAP_EMPTY; |
7bb03bbf JS |
10971 | |
10972 | /* Update CPU map with physical id and core id of each CPU */ | |
222e9239 JS |
10973 | for_each_present_cpu(cpu) { |
10974 | cpup = &phba->sli4_hba.cpu_map[cpu]; | |
7bb03bbf JS |
10975 | #ifdef CONFIG_X86 |
10976 | cpuinfo = &cpu_data(cpu); | |
10977 | cpup->phys_id = cpuinfo->phys_proc_id; | |
10978 | cpup->core_id = cpuinfo->cpu_core_id; | |
d9954a2d JS |
10979 | if (lpfc_find_hyper(phba, cpu, cpup->phys_id, cpup->core_id)) |
10980 | cpup->flag |= LPFC_CPU_MAP_HYPER; | |
7bb03bbf JS |
10981 | #else |
10982 | /* No distinction between CPUs for other platforms */ | |
10983 | cpup->phys_id = 0; | |
6a828b0f | 10984 | cpup->core_id = cpu; |
7bb03bbf | 10985 | #endif |
6a828b0f | 10986 | |
b3295c2a | 10987 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
3ad348d9 JS |
10988 | "3328 CPU %d physid %d coreid %d flag x%x\n", |
10989 | cpu, cpup->phys_id, cpup->core_id, cpup->flag); | |
6a828b0f JS |
10990 | |
10991 | if (cpup->phys_id > max_phys_id) | |
10992 | max_phys_id = cpup->phys_id; | |
10993 | if (cpup->phys_id < min_phys_id) | |
10994 | min_phys_id = cpup->phys_id; | |
10995 | ||
10996 | if (cpup->core_id > max_core_id) | |
10997 | max_core_id = cpup->core_id; | |
10998 | if (cpup->core_id < min_core_id) | |
10999 | min_core_id = cpup->core_id; | |
7bb03bbf | 11000 | } |
7bb03bbf | 11001 | |
d9954a2d JS |
11002 | /* After looking at each irq vector assigned to this pcidev, its |
11003 | * possible to see that not ALL CPUs have been accounted for. | |
657add4e JS |
11004 | * Next we will set any unassigned (unaffinitized) cpu map |
11005 | * entries to a IRQ on the same phys_id. | |
d9954a2d JS |
11006 | */ |
11007 | first_cpu = cpumask_first(cpu_present_mask); | |
11008 | start_cpu = first_cpu; | |
11009 | ||
11010 | for_each_present_cpu(cpu) { | |
11011 | cpup = &phba->sli4_hba.cpu_map[cpu]; | |
11012 | ||
11013 | /* Is this CPU entry unassigned */ | |
11014 | if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) { | |
11015 | /* Mark CPU as IRQ not assigned by the kernel */ | |
11016 | cpup->flag |= LPFC_CPU_MAP_UNASSIGN; | |
11017 | ||
657add4e | 11018 | /* If so, find a new_cpup thats on the the SAME |
d9954a2d JS |
11019 | * phys_id as cpup. start_cpu will start where we |
11020 | * left off so all unassigned entries don't get assgined | |
11021 | * the IRQ of the first entry. | |
11022 | */ | |
11023 | new_cpu = start_cpu; | |
11024 | for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { | |
11025 | new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; | |
11026 | if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) && | |
dcaa2136 | 11027 | (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY) && |
d9954a2d JS |
11028 | (new_cpup->phys_id == cpup->phys_id)) |
11029 | goto found_same; | |
11030 | new_cpu = cpumask_next( | |
11031 | new_cpu, cpu_present_mask); | |
11032 | if (new_cpu == nr_cpumask_bits) | |
11033 | new_cpu = first_cpu; | |
11034 | } | |
11035 | /* At this point, we leave the CPU as unassigned */ | |
11036 | continue; | |
11037 | found_same: | |
11038 | /* We found a matching phys_id, so copy the IRQ info */ | |
11039 | cpup->eq = new_cpup->eq; | |
d9954a2d JS |
11040 | |
11041 | /* Bump start_cpu to the next slot to minmize the | |
11042 | * chance of having multiple unassigned CPU entries | |
11043 | * selecting the same IRQ. | |
11044 | */ | |
11045 | start_cpu = cpumask_next(new_cpu, cpu_present_mask); | |
11046 | if (start_cpu == nr_cpumask_bits) | |
11047 | start_cpu = first_cpu; | |
11048 | ||
657add4e | 11049 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
d9954a2d | 11050 | "3337 Set Affinity: CPU %d " |
dcaa2136 | 11051 | "eq %d from peer cpu %d same " |
d9954a2d | 11052 | "phys_id (%d)\n", |
dcaa2136 JS |
11053 | cpu, cpup->eq, new_cpu, |
11054 | cpup->phys_id); | |
d9954a2d JS |
11055 | } |
11056 | } | |
11057 | ||
11058 | /* Set any unassigned cpu map entries to a IRQ on any phys_id */ | |
11059 | start_cpu = first_cpu; | |
11060 | ||
11061 | for_each_present_cpu(cpu) { | |
11062 | cpup = &phba->sli4_hba.cpu_map[cpu]; | |
11063 | ||
11064 | /* Is this entry unassigned */ | |
11065 | if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) { | |
11066 | /* Mark it as IRQ not assigned by the kernel */ | |
11067 | cpup->flag |= LPFC_CPU_MAP_UNASSIGN; | |
11068 | ||
657add4e | 11069 | /* If so, find a new_cpup thats on ANY phys_id |
d9954a2d JS |
11070 | * as the cpup. start_cpu will start where we |
11071 | * left off so all unassigned entries don't get | |
11072 | * assigned the IRQ of the first entry. | |
11073 | */ | |
11074 | new_cpu = start_cpu; | |
11075 | for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { | |
11076 | new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; | |
11077 | if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) && | |
dcaa2136 | 11078 | (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY)) |
d9954a2d JS |
11079 | goto found_any; |
11080 | new_cpu = cpumask_next( | |
11081 | new_cpu, cpu_present_mask); | |
11082 | if (new_cpu == nr_cpumask_bits) | |
11083 | new_cpu = first_cpu; | |
11084 | } | |
11085 | /* We should never leave an entry unassigned */ | |
11086 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
11087 | "3339 Set Affinity: CPU %d " | |
dcaa2136 JS |
11088 | "eq %d UNASSIGNED\n", |
11089 | cpup->hdwq, cpup->eq); | |
d9954a2d JS |
11090 | continue; |
11091 | found_any: | |
11092 | /* We found an available entry, copy the IRQ info */ | |
11093 | cpup->eq = new_cpup->eq; | |
d9954a2d JS |
11094 | |
11095 | /* Bump start_cpu to the next slot to minmize the | |
11096 | * chance of having multiple unassigned CPU entries | |
11097 | * selecting the same IRQ. | |
11098 | */ | |
11099 | start_cpu = cpumask_next(new_cpu, cpu_present_mask); | |
11100 | if (start_cpu == nr_cpumask_bits) | |
11101 | start_cpu = first_cpu; | |
11102 | ||
657add4e | 11103 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
d9954a2d | 11104 | "3338 Set Affinity: CPU %d " |
dcaa2136 JS |
11105 | "eq %d from peer cpu %d (%d/%d)\n", |
11106 | cpu, cpup->eq, new_cpu, | |
d9954a2d JS |
11107 | new_cpup->phys_id, new_cpup->core_id); |
11108 | } | |
11109 | } | |
657add4e | 11110 | |
3ad348d9 JS |
11111 | /* Assign hdwq indices that are unique across all cpus in the map |
11112 | * that are also FIRST_CPUs. | |
11113 | */ | |
11114 | idx = 0; | |
11115 | for_each_present_cpu(cpu) { | |
11116 | cpup = &phba->sli4_hba.cpu_map[cpu]; | |
11117 | ||
11118 | /* Only FIRST IRQs get a hdwq index assignment. */ | |
11119 | if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) | |
11120 | continue; | |
11121 | ||
11122 | /* 1 to 1, the first LPFC_CPU_FIRST_IRQ cpus to a unique hdwq */ | |
11123 | cpup->hdwq = idx; | |
11124 | idx++; | |
bc2736e9 | 11125 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
3ad348d9 | 11126 | "3333 Set Affinity: CPU %d (phys %d core %d): " |
dcaa2136 | 11127 | "hdwq %d eq %d flg x%x\n", |
3ad348d9 | 11128 | cpu, cpup->phys_id, cpup->core_id, |
dcaa2136 | 11129 | cpup->hdwq, cpup->eq, cpup->flag); |
3ad348d9 | 11130 | } |
bc227dde | 11131 | /* Associate a hdwq with each cpu_map entry |
657add4e JS |
11132 | * This will be 1 to 1 - hdwq to cpu, unless there are less |
11133 | * hardware queues then CPUs. For that case we will just round-robin | |
11134 | * the available hardware queues as they get assigned to CPUs. | |
3ad348d9 JS |
11135 | * The next_idx is the idx from the FIRST_CPU loop above to account |
11136 | * for irq_chann < hdwq. The idx is used for round-robin assignments | |
11137 | * and needs to start at 0. | |
657add4e | 11138 | */ |
3ad348d9 | 11139 | next_idx = idx; |
657add4e | 11140 | start_cpu = 0; |
3ad348d9 | 11141 | idx = 0; |
657add4e JS |
11142 | for_each_present_cpu(cpu) { |
11143 | cpup = &phba->sli4_hba.cpu_map[cpu]; | |
657add4e | 11144 | |
3ad348d9 JS |
11145 | /* FIRST cpus are already mapped. */ |
11146 | if (cpup->flag & LPFC_CPU_FIRST_IRQ) | |
11147 | continue; | |
11148 | ||
11149 | /* If the cfg_irq_chann < cfg_hdw_queue, set the hdwq | |
11150 | * of the unassigned cpus to the next idx so that all | |
11151 | * hdw queues are fully utilized. | |
11152 | */ | |
11153 | if (next_idx < phba->cfg_hdw_queue) { | |
11154 | cpup->hdwq = next_idx; | |
11155 | next_idx++; | |
11156 | continue; | |
11157 | } | |
11158 | ||
11159 | /* Not a First CPU and all hdw_queues are used. Reuse a | |
11160 | * Hardware Queue for another CPU, so be smart about it | |
11161 | * and pick one that has its IRQ/EQ mapped to the same phys_id | |
11162 | * (CPU package) and core_id. | |
11163 | */ | |
11164 | new_cpu = start_cpu; | |
11165 | for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { | |
11166 | new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; | |
11167 | if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY && | |
11168 | new_cpup->phys_id == cpup->phys_id && | |
11169 | new_cpup->core_id == cpup->core_id) { | |
11170 | goto found_hdwq; | |
657add4e | 11171 | } |
3ad348d9 JS |
11172 | new_cpu = cpumask_next(new_cpu, cpu_present_mask); |
11173 | if (new_cpu == nr_cpumask_bits) | |
11174 | new_cpu = first_cpu; | |
11175 | } | |
657add4e | 11176 | |
3ad348d9 JS |
11177 | /* If we can't match both phys_id and core_id, |
11178 | * settle for just a phys_id match. | |
11179 | */ | |
11180 | new_cpu = start_cpu; | |
11181 | for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { | |
11182 | new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; | |
11183 | if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY && | |
11184 | new_cpup->phys_id == cpup->phys_id) | |
11185 | goto found_hdwq; | |
11186 | ||
11187 | new_cpu = cpumask_next(new_cpu, cpu_present_mask); | |
11188 | if (new_cpu == nr_cpumask_bits) | |
11189 | new_cpu = first_cpu; | |
657add4e | 11190 | } |
3ad348d9 JS |
11191 | |
11192 | /* Otherwise just round robin on cfg_hdw_queue */ | |
11193 | cpup->hdwq = idx % phba->cfg_hdw_queue; | |
11194 | idx++; | |
11195 | goto logit; | |
11196 | found_hdwq: | |
11197 | /* We found an available entry, copy the IRQ info */ | |
11198 | start_cpu = cpumask_next(new_cpu, cpu_present_mask); | |
11199 | if (start_cpu == nr_cpumask_bits) | |
11200 | start_cpu = first_cpu; | |
11201 | cpup->hdwq = new_cpup->hdwq; | |
11202 | logit: | |
bc2736e9 | 11203 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
657add4e | 11204 | "3335 Set Affinity: CPU %d (phys %d core %d): " |
dcaa2136 | 11205 | "hdwq %d eq %d flg x%x\n", |
657add4e | 11206 | cpu, cpup->phys_id, cpup->core_id, |
dcaa2136 | 11207 | cpup->hdwq, cpup->eq, cpup->flag); |
657add4e JS |
11208 | } |
11209 | ||
bc227dde JS |
11210 | /* |
11211 | * Initialize the cpu_map slots for not-present cpus in case | |
11212 | * a cpu is hot-added. Perform a simple hdwq round robin assignment. | |
11213 | */ | |
11214 | idx = 0; | |
11215 | for_each_possible_cpu(cpu) { | |
11216 | cpup = &phba->sli4_hba.cpu_map[cpu]; | |
840eda96 JS |
11217 | #ifdef CONFIG_SCSI_LPFC_DEBUG_FS |
11218 | c_stat = per_cpu_ptr(phba->sli4_hba.c_stat, cpu); | |
11219 | c_stat->hdwq_no = cpup->hdwq; | |
11220 | #endif | |
bc227dde JS |
11221 | if (cpup->hdwq != LPFC_VECTOR_MAP_EMPTY) |
11222 | continue; | |
11223 | ||
11224 | cpup->hdwq = idx++ % phba->cfg_hdw_queue; | |
840eda96 JS |
11225 | #ifdef CONFIG_SCSI_LPFC_DEBUG_FS |
11226 | c_stat->hdwq_no = cpup->hdwq; | |
11227 | #endif | |
bc227dde JS |
11228 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
11229 | "3340 Set Affinity: not present " | |
11230 | "CPU %d hdwq %d\n", | |
11231 | cpu, cpup->hdwq); | |
657add4e JS |
11232 | } |
11233 | ||
11234 | /* The cpu_map array will be used later during initialization | |
11235 | * when EQ / CQ / WQs are allocated and configured. | |
11236 | */ | |
b3295c2a | 11237 | return; |
7bb03bbf | 11238 | } |
7bb03bbf | 11239 | |
93a4d6f4 JS |
11240 | /** |
11241 | * lpfc_cpuhp_get_eq | |
11242 | * | |
11243 | * @phba: pointer to lpfc hba data structure. | |
11244 | * @cpu: cpu going offline | |
fe614acd | 11245 | * @eqlist: eq list to append to |
93a4d6f4 | 11246 | */ |
a99c8074 | 11247 | static int |
93a4d6f4 JS |
11248 | lpfc_cpuhp_get_eq(struct lpfc_hba *phba, unsigned int cpu, |
11249 | struct list_head *eqlist) | |
11250 | { | |
93a4d6f4 JS |
11251 | const struct cpumask *maskp; |
11252 | struct lpfc_queue *eq; | |
a99c8074 | 11253 | struct cpumask *tmp; |
93a4d6f4 JS |
11254 | u16 idx; |
11255 | ||
a99c8074 JS |
11256 | tmp = kzalloc(cpumask_size(), GFP_KERNEL); |
11257 | if (!tmp) | |
11258 | return -ENOMEM; | |
11259 | ||
93a4d6f4 JS |
11260 | for (idx = 0; idx < phba->cfg_irq_chann; idx++) { |
11261 | maskp = pci_irq_get_affinity(phba->pcidev, idx); | |
11262 | if (!maskp) | |
11263 | continue; | |
11264 | /* | |
11265 | * if irq is not affinitized to the cpu going | |
11266 | * then we don't need to poll the eq attached | |
11267 | * to it. | |
11268 | */ | |
a99c8074 | 11269 | if (!cpumask_and(tmp, maskp, cpumask_of(cpu))) |
93a4d6f4 JS |
11270 | continue; |
11271 | /* get the cpus that are online and are affini- | |
11272 | * tized to this irq vector. If the count is | |
11273 | * more than 1 then cpuhp is not going to shut- | |
11274 | * down this vector. Since this cpu has not | |
11275 | * gone offline yet, we need >1. | |
11276 | */ | |
a99c8074 JS |
11277 | cpumask_and(tmp, maskp, cpu_online_mask); |
11278 | if (cpumask_weight(tmp) > 1) | |
93a4d6f4 JS |
11279 | continue; |
11280 | ||
11281 | /* Now that we have an irq to shutdown, get the eq | |
11282 | * mapped to this irq. Note: multiple hdwq's in | |
11283 | * the software can share an eq, but eventually | |
11284 | * only eq will be mapped to this vector | |
11285 | */ | |
dcaa2136 JS |
11286 | eq = phba->sli4_hba.hba_eq_hdl[idx].eq; |
11287 | list_add(&eq->_poll_list, eqlist); | |
93a4d6f4 | 11288 | } |
a99c8074 JS |
11289 | kfree(tmp); |
11290 | return 0; | |
93a4d6f4 JS |
11291 | } |
11292 | ||
11293 | static void __lpfc_cpuhp_remove(struct lpfc_hba *phba) | |
11294 | { | |
11295 | if (phba->sli_rev != LPFC_SLI_REV4) | |
11296 | return; | |
11297 | ||
11298 | cpuhp_state_remove_instance_nocalls(lpfc_cpuhp_state, | |
11299 | &phba->cpuhp); | |
11300 | /* | |
11301 | * unregistering the instance doesn't stop the polling | |
11302 | * timer. Wait for the poll timer to retire. | |
11303 | */ | |
11304 | synchronize_rcu(); | |
11305 | del_timer_sync(&phba->cpuhp_poll_timer); | |
11306 | } | |
11307 | ||
11308 | static void lpfc_cpuhp_remove(struct lpfc_hba *phba) | |
11309 | { | |
11310 | if (phba->pport->fc_flag & FC_OFFLINE_MODE) | |
11311 | return; | |
11312 | ||
11313 | __lpfc_cpuhp_remove(phba); | |
11314 | } | |
11315 | ||
11316 | static void lpfc_cpuhp_add(struct lpfc_hba *phba) | |
11317 | { | |
11318 | if (phba->sli_rev != LPFC_SLI_REV4) | |
11319 | return; | |
11320 | ||
11321 | rcu_read_lock(); | |
11322 | ||
f861f596 | 11323 | if (!list_empty(&phba->poll_list)) |
93a4d6f4 JS |
11324 | mod_timer(&phba->cpuhp_poll_timer, |
11325 | jiffies + msecs_to_jiffies(LPFC_POLL_HB)); | |
93a4d6f4 JS |
11326 | |
11327 | rcu_read_unlock(); | |
11328 | ||
11329 | cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state, | |
11330 | &phba->cpuhp); | |
11331 | } | |
11332 | ||
11333 | static int __lpfc_cpuhp_checks(struct lpfc_hba *phba, int *retval) | |
11334 | { | |
11335 | if (phba->pport->load_flag & FC_UNLOADING) { | |
11336 | *retval = -EAGAIN; | |
11337 | return true; | |
11338 | } | |
11339 | ||
11340 | if (phba->sli_rev != LPFC_SLI_REV4) { | |
11341 | *retval = 0; | |
11342 | return true; | |
11343 | } | |
11344 | ||
11345 | /* proceed with the hotplug */ | |
11346 | return false; | |
11347 | } | |
11348 | ||
dcaa2136 JS |
11349 | /** |
11350 | * lpfc_irq_set_aff - set IRQ affinity | |
11351 | * @eqhdl: EQ handle | |
11352 | * @cpu: cpu to set affinity | |
11353 | * | |
11354 | **/ | |
11355 | static inline void | |
11356 | lpfc_irq_set_aff(struct lpfc_hba_eq_hdl *eqhdl, unsigned int cpu) | |
11357 | { | |
11358 | cpumask_clear(&eqhdl->aff_mask); | |
11359 | cpumask_set_cpu(cpu, &eqhdl->aff_mask); | |
11360 | irq_set_status_flags(eqhdl->irq, IRQ_NO_BALANCING); | |
11361 | irq_set_affinity_hint(eqhdl->irq, &eqhdl->aff_mask); | |
11362 | } | |
11363 | ||
11364 | /** | |
11365 | * lpfc_irq_clear_aff - clear IRQ affinity | |
11366 | * @eqhdl: EQ handle | |
11367 | * | |
11368 | **/ | |
11369 | static inline void | |
11370 | lpfc_irq_clear_aff(struct lpfc_hba_eq_hdl *eqhdl) | |
11371 | { | |
11372 | cpumask_clear(&eqhdl->aff_mask); | |
11373 | irq_clear_status_flags(eqhdl->irq, IRQ_NO_BALANCING); | |
dcaa2136 JS |
11374 | } |
11375 | ||
11376 | /** | |
11377 | * lpfc_irq_rebalance - rebalances IRQ affinity according to cpuhp event | |
11378 | * @phba: pointer to HBA context object. | |
11379 | * @cpu: cpu going offline/online | |
11380 | * @offline: true, cpu is going offline. false, cpu is coming online. | |
11381 | * | |
11382 | * If cpu is going offline, we'll try our best effort to find the next | |
3048e3e8 DK |
11383 | * online cpu on the phba's original_mask and migrate all offlining IRQ |
11384 | * affinities. | |
dcaa2136 | 11385 | * |
3048e3e8 | 11386 | * If cpu is coming online, reaffinitize the IRQ back to the onlining cpu. |
dcaa2136 | 11387 | * |
3048e3e8 | 11388 | * Note: Call only if NUMA or NHT mode is enabled, otherwise rely on |
dcaa2136 JS |
11389 | * PCI_IRQ_AFFINITY to auto-manage IRQ affinity. |
11390 | * | |
11391 | **/ | |
11392 | static void | |
11393 | lpfc_irq_rebalance(struct lpfc_hba *phba, unsigned int cpu, bool offline) | |
11394 | { | |
11395 | struct lpfc_vector_map_info *cpup; | |
11396 | struct cpumask *aff_mask; | |
11397 | unsigned int cpu_select, cpu_next, idx; | |
3048e3e8 | 11398 | const struct cpumask *orig_mask; |
dcaa2136 | 11399 | |
3048e3e8 | 11400 | if (phba->irq_chann_mode == NORMAL_MODE) |
dcaa2136 JS |
11401 | return; |
11402 | ||
3048e3e8 | 11403 | orig_mask = &phba->sli4_hba.irq_aff_mask; |
dcaa2136 | 11404 | |
3048e3e8 | 11405 | if (!cpumask_test_cpu(cpu, orig_mask)) |
dcaa2136 JS |
11406 | return; |
11407 | ||
11408 | cpup = &phba->sli4_hba.cpu_map[cpu]; | |
11409 | ||
11410 | if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) | |
11411 | return; | |
11412 | ||
11413 | if (offline) { | |
3048e3e8 DK |
11414 | /* Find next online CPU on original mask */ |
11415 | cpu_next = cpumask_next_wrap(cpu, orig_mask, cpu, true); | |
11416 | cpu_select = lpfc_next_online_cpu(orig_mask, cpu_next); | |
dcaa2136 JS |
11417 | |
11418 | /* Found a valid CPU */ | |
11419 | if ((cpu_select < nr_cpu_ids) && (cpu_select != cpu)) { | |
11420 | /* Go through each eqhdl and ensure offlining | |
11421 | * cpu aff_mask is migrated | |
11422 | */ | |
11423 | for (idx = 0; idx < phba->cfg_irq_chann; idx++) { | |
11424 | aff_mask = lpfc_get_aff_mask(idx); | |
11425 | ||
11426 | /* Migrate affinity */ | |
11427 | if (cpumask_test_cpu(cpu, aff_mask)) | |
11428 | lpfc_irq_set_aff(lpfc_get_eq_hdl(idx), | |
11429 | cpu_select); | |
11430 | } | |
11431 | } else { | |
11432 | /* Rely on irqbalance if no online CPUs left on NUMA */ | |
11433 | for (idx = 0; idx < phba->cfg_irq_chann; idx++) | |
11434 | lpfc_irq_clear_aff(lpfc_get_eq_hdl(idx)); | |
11435 | } | |
11436 | } else { | |
11437 | /* Migrate affinity back to this CPU */ | |
11438 | lpfc_irq_set_aff(lpfc_get_eq_hdl(cpup->eq), cpu); | |
11439 | } | |
11440 | } | |
11441 | ||
93a4d6f4 JS |
11442 | static int lpfc_cpu_offline(unsigned int cpu, struct hlist_node *node) |
11443 | { | |
11444 | struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp); | |
11445 | struct lpfc_queue *eq, *next; | |
11446 | LIST_HEAD(eqlist); | |
11447 | int retval; | |
11448 | ||
11449 | if (!phba) { | |
11450 | WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id()); | |
11451 | return 0; | |
11452 | } | |
11453 | ||
11454 | if (__lpfc_cpuhp_checks(phba, &retval)) | |
11455 | return retval; | |
11456 | ||
dcaa2136 JS |
11457 | lpfc_irq_rebalance(phba, cpu, true); |
11458 | ||
a99c8074 JS |
11459 | retval = lpfc_cpuhp_get_eq(phba, cpu, &eqlist); |
11460 | if (retval) | |
11461 | return retval; | |
93a4d6f4 JS |
11462 | |
11463 | /* start polling on these eq's */ | |
11464 | list_for_each_entry_safe(eq, next, &eqlist, _poll_list) { | |
11465 | list_del_init(&eq->_poll_list); | |
11466 | lpfc_sli4_start_polling(eq); | |
11467 | } | |
11468 | ||
11469 | return 0; | |
11470 | } | |
11471 | ||
11472 | static int lpfc_cpu_online(unsigned int cpu, struct hlist_node *node) | |
11473 | { | |
11474 | struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp); | |
11475 | struct lpfc_queue *eq, *next; | |
11476 | unsigned int n; | |
11477 | int retval; | |
11478 | ||
11479 | if (!phba) { | |
11480 | WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id()); | |
11481 | return 0; | |
11482 | } | |
11483 | ||
11484 | if (__lpfc_cpuhp_checks(phba, &retval)) | |
11485 | return retval; | |
11486 | ||
dcaa2136 JS |
11487 | lpfc_irq_rebalance(phba, cpu, false); |
11488 | ||
93a4d6f4 JS |
11489 | list_for_each_entry_safe(eq, next, &phba->poll_list, _poll_list) { |
11490 | n = lpfc_find_cpu_handle(phba, eq->hdwq, LPFC_FIND_BY_HDWQ); | |
11491 | if (n == cpu) | |
11492 | lpfc_sli4_stop_polling(eq); | |
11493 | } | |
11494 | ||
11495 | return 0; | |
11496 | } | |
11497 | ||
da0436e9 JS |
11498 | /** |
11499 | * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device | |
11500 | * @phba: pointer to lpfc hba data structure. | |
11501 | * | |
11502 | * This routine is invoked to enable the MSI-X interrupt vectors to device | |
dcaa2136 JS |
11503 | * with SLI-4 interface spec. It also allocates MSI-X vectors and maps them |
11504 | * to cpus on the system. | |
11505 | * | |
11506 | * When cfg_irq_numa is enabled, the adapter will only allocate vectors for | |
11507 | * the number of cpus on the same numa node as this adapter. The vectors are | |
11508 | * allocated without requesting OS affinity mapping. A vector will be | |
11509 | * allocated and assigned to each online and offline cpu. If the cpu is | |
11510 | * online, then affinity will be set to that cpu. If the cpu is offline, then | |
11511 | * affinity will be set to the nearest peer cpu within the numa node that is | |
11512 | * online. If there are no online cpus within the numa node, affinity is not | |
11513 | * assigned and the OS may do as it pleases. Note: cpu vector affinity mapping | |
11514 | * is consistent with the way cpu online/offline is handled when cfg_irq_numa is | |
11515 | * configured. | |
11516 | * | |
11517 | * If numa mode is not enabled and there is more than 1 vector allocated, then | |
11518 | * the driver relies on the managed irq interface where the OS assigns vector to | |
11519 | * cpu affinity. The driver will then use that affinity mapping to setup its | |
11520 | * cpu mapping table. | |
da0436e9 JS |
11521 | * |
11522 | * Return codes | |
af901ca1 | 11523 | * 0 - successful |
da0436e9 JS |
11524 | * other values - error |
11525 | **/ | |
11526 | static int | |
11527 | lpfc_sli4_enable_msix(struct lpfc_hba *phba) | |
11528 | { | |
75baf696 | 11529 | int vectors, rc, index; |
b83d005e | 11530 | char *name; |
3048e3e8 | 11531 | const struct cpumask *aff_mask = NULL; |
dcaa2136 | 11532 | unsigned int cpu = 0, cpu_cnt = 0, cpu_select = nr_cpu_ids; |
17105d95 | 11533 | struct lpfc_vector_map_info *cpup; |
dcaa2136 JS |
11534 | struct lpfc_hba_eq_hdl *eqhdl; |
11535 | const struct cpumask *maskp; | |
dcaa2136 | 11536 | unsigned int flags = PCI_IRQ_MSIX; |
da0436e9 JS |
11537 | |
11538 | /* Set up MSI-X multi-message vectors */ | |
6a828b0f | 11539 | vectors = phba->cfg_irq_chann; |
45ffac19 | 11540 | |
3048e3e8 DK |
11541 | if (phba->irq_chann_mode != NORMAL_MODE) |
11542 | aff_mask = &phba->sli4_hba.irq_aff_mask; | |
11543 | ||
11544 | if (aff_mask) { | |
11545 | cpu_cnt = cpumask_weight(aff_mask); | |
dcaa2136 JS |
11546 | vectors = min(phba->cfg_irq_chann, cpu_cnt); |
11547 | ||
3048e3e8 DK |
11548 | /* cpu: iterates over aff_mask including offline or online |
11549 | * cpu_select: iterates over online aff_mask to set affinity | |
dcaa2136 | 11550 | */ |
3048e3e8 DK |
11551 | cpu = cpumask_first(aff_mask); |
11552 | cpu_select = lpfc_next_online_cpu(aff_mask, cpu); | |
dcaa2136 JS |
11553 | } else { |
11554 | flags |= PCI_IRQ_AFFINITY; | |
11555 | } | |
11556 | ||
11557 | rc = pci_alloc_irq_vectors(phba->pcidev, 1, vectors, flags); | |
4f871e1b | 11558 | if (rc < 0) { |
da0436e9 JS |
11559 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
11560 | "0484 PCI enable MSI-X failed (%d)\n", rc); | |
029165ac | 11561 | goto vec_fail_out; |
da0436e9 | 11562 | } |
4f871e1b | 11563 | vectors = rc; |
75baf696 | 11564 | |
7bb03bbf | 11565 | /* Assign MSI-X vectors to interrupt handlers */ |
67d12733 | 11566 | for (index = 0; index < vectors; index++) { |
dcaa2136 JS |
11567 | eqhdl = lpfc_get_eq_hdl(index); |
11568 | name = eqhdl->handler_name; | |
b83d005e JS |
11569 | memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ); |
11570 | snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ, | |
4305f183 | 11571 | LPFC_DRIVER_HANDLER_NAME"%d", index); |
da0436e9 | 11572 | |
dcaa2136 | 11573 | eqhdl->idx = index; |
7370d10a JS |
11574 | rc = request_irq(pci_irq_vector(phba->pcidev, index), |
11575 | &lpfc_sli4_hba_intr_handler, 0, | |
dcaa2136 | 11576 | name, eqhdl); |
da0436e9 JS |
11577 | if (rc) { |
11578 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, | |
11579 | "0486 MSI-X fast-path (%d) " | |
11580 | "request_irq failed (%d)\n", index, rc); | |
11581 | goto cfg_fail_out; | |
11582 | } | |
dcaa2136 JS |
11583 | |
11584 | eqhdl->irq = pci_irq_vector(phba->pcidev, index); | |
11585 | ||
3048e3e8 | 11586 | if (aff_mask) { |
dcaa2136 JS |
11587 | /* If found a neighboring online cpu, set affinity */ |
11588 | if (cpu_select < nr_cpu_ids) | |
11589 | lpfc_irq_set_aff(eqhdl, cpu_select); | |
11590 | ||
11591 | /* Assign EQ to cpu_map */ | |
11592 | lpfc_assign_eq_map_info(phba, index, | |
11593 | LPFC_CPU_FIRST_IRQ, | |
11594 | cpu); | |
11595 | ||
3048e3e8 DK |
11596 | /* Iterate to next offline or online cpu in aff_mask */ |
11597 | cpu = cpumask_next(cpu, aff_mask); | |
dcaa2136 | 11598 | |
3048e3e8 DK |
11599 | /* Find next online cpu in aff_mask to set affinity */ |
11600 | cpu_select = lpfc_next_online_cpu(aff_mask, cpu); | |
dcaa2136 JS |
11601 | } else if (vectors == 1) { |
11602 | cpu = cpumask_first(cpu_present_mask); | |
11603 | lpfc_assign_eq_map_info(phba, index, LPFC_CPU_FIRST_IRQ, | |
11604 | cpu); | |
11605 | } else { | |
11606 | maskp = pci_irq_get_affinity(phba->pcidev, index); | |
11607 | ||
dcaa2136 JS |
11608 | /* Loop through all CPUs associated with vector index */ |
11609 | for_each_cpu_and(cpu, maskp, cpu_present_mask) { | |
17105d95 DK |
11610 | cpup = &phba->sli4_hba.cpu_map[cpu]; |
11611 | ||
dcaa2136 JS |
11612 | /* If this is the first CPU thats assigned to |
11613 | * this vector, set LPFC_CPU_FIRST_IRQ. | |
17105d95 DK |
11614 | * |
11615 | * With certain platforms its possible that irq | |
11616 | * vectors are affinitized to all the cpu's. | |
11617 | * This can result in each cpu_map.eq to be set | |
11618 | * to the last vector, resulting in overwrite | |
11619 | * of all the previous cpu_map.eq. Ensure that | |
11620 | * each vector receives a place in cpu_map. | |
11621 | * Later call to lpfc_cpu_affinity_check will | |
11622 | * ensure we are nicely balanced out. | |
dcaa2136 | 11623 | */ |
17105d95 DK |
11624 | if (cpup->eq != LPFC_VECTOR_MAP_EMPTY) |
11625 | continue; | |
dcaa2136 | 11626 | lpfc_assign_eq_map_info(phba, index, |
17105d95 | 11627 | LPFC_CPU_FIRST_IRQ, |
dcaa2136 | 11628 | cpu); |
17105d95 | 11629 | break; |
dcaa2136 JS |
11630 | } |
11631 | } | |
da0436e9 JS |
11632 | } |
11633 | ||
6a828b0f | 11634 | if (vectors != phba->cfg_irq_chann) { |
372c187b | 11635 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
82c3e9ba JS |
11636 | "3238 Reducing IO channels to match number of " |
11637 | "MSI-X vectors, requested %d got %d\n", | |
6a828b0f JS |
11638 | phba->cfg_irq_chann, vectors); |
11639 | if (phba->cfg_irq_chann > vectors) | |
11640 | phba->cfg_irq_chann = vectors; | |
82c3e9ba | 11641 | } |
7bb03bbf | 11642 | |
da0436e9 JS |
11643 | return rc; |
11644 | ||
11645 | cfg_fail_out: | |
11646 | /* free the irq already requested */ | |
dcaa2136 JS |
11647 | for (--index; index >= 0; index--) { |
11648 | eqhdl = lpfc_get_eq_hdl(index); | |
11649 | lpfc_irq_clear_aff(eqhdl); | |
11650 | irq_set_affinity_hint(eqhdl->irq, NULL); | |
11651 | free_irq(eqhdl->irq, eqhdl); | |
11652 | } | |
da0436e9 | 11653 | |
da0436e9 | 11654 | /* Unconfigure MSI-X capability structure */ |
45ffac19 | 11655 | pci_free_irq_vectors(phba->pcidev); |
029165ac AG |
11656 | |
11657 | vec_fail_out: | |
da0436e9 JS |
11658 | return rc; |
11659 | } | |
11660 | ||
da0436e9 JS |
11661 | /** |
11662 | * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device | |
11663 | * @phba: pointer to lpfc hba data structure. | |
11664 | * | |
11665 | * This routine is invoked to enable the MSI interrupt mode to device with | |
07b1b914 JS |
11666 | * SLI-4 interface spec. The kernel function pci_alloc_irq_vectors() is |
11667 | * called to enable the MSI vector. The device driver is responsible for | |
11668 | * calling the request_irq() to register MSI vector with a interrupt the | |
11669 | * handler, which is done in this function. | |
da0436e9 JS |
11670 | * |
11671 | * Return codes | |
af901ca1 | 11672 | * 0 - successful |
da0436e9 JS |
11673 | * other values - error |
11674 | **/ | |
11675 | static int | |
11676 | lpfc_sli4_enable_msi(struct lpfc_hba *phba) | |
11677 | { | |
11678 | int rc, index; | |
dcaa2136 JS |
11679 | unsigned int cpu; |
11680 | struct lpfc_hba_eq_hdl *eqhdl; | |
da0436e9 | 11681 | |
07b1b914 JS |
11682 | rc = pci_alloc_irq_vectors(phba->pcidev, 1, 1, |
11683 | PCI_IRQ_MSI | PCI_IRQ_AFFINITY); | |
11684 | if (rc > 0) | |
da0436e9 JS |
11685 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, |
11686 | "0487 PCI enable MSI mode success.\n"); | |
11687 | else { | |
11688 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
11689 | "0488 PCI enable MSI mode failed (%d)\n", rc); | |
07b1b914 | 11690 | return rc ? rc : -1; |
da0436e9 JS |
11691 | } |
11692 | ||
11693 | rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler, | |
ed243d37 | 11694 | 0, LPFC_DRIVER_NAME, phba); |
da0436e9 | 11695 | if (rc) { |
07b1b914 | 11696 | pci_free_irq_vectors(phba->pcidev); |
da0436e9 JS |
11697 | lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, |
11698 | "0490 MSI request_irq failed (%d)\n", rc); | |
75baf696 | 11699 | return rc; |
da0436e9 JS |
11700 | } |
11701 | ||
dcaa2136 JS |
11702 | eqhdl = lpfc_get_eq_hdl(0); |
11703 | eqhdl->irq = pci_irq_vector(phba->pcidev, 0); | |
11704 | ||
11705 | cpu = cpumask_first(cpu_present_mask); | |
11706 | lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ, cpu); | |
11707 | ||
6a828b0f | 11708 | for (index = 0; index < phba->cfg_irq_chann; index++) { |
dcaa2136 JS |
11709 | eqhdl = lpfc_get_eq_hdl(index); |
11710 | eqhdl->idx = index; | |
da0436e9 JS |
11711 | } |
11712 | ||
75baf696 | 11713 | return 0; |
da0436e9 JS |
11714 | } |
11715 | ||
da0436e9 JS |
11716 | /** |
11717 | * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device | |
11718 | * @phba: pointer to lpfc hba data structure. | |
fe614acd | 11719 | * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X). |
da0436e9 JS |
11720 | * |
11721 | * This routine is invoked to enable device interrupt and associate driver's | |
11722 | * interrupt handler(s) to interrupt vector(s) to device with SLI-4 | |
11723 | * interface spec. Depends on the interrupt mode configured to the driver, | |
11724 | * the driver will try to fallback from the configured interrupt mode to an | |
11725 | * interrupt mode which is supported by the platform, kernel, and device in | |
11726 | * the order of: | |
11727 | * MSI-X -> MSI -> IRQ. | |
11728 | * | |
11729 | * Return codes | |
af901ca1 | 11730 | * 0 - successful |
da0436e9 JS |
11731 | * other values - error |
11732 | **/ | |
11733 | static uint32_t | |
11734 | lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode) | |
11735 | { | |
11736 | uint32_t intr_mode = LPFC_INTR_ERROR; | |
895427bd | 11737 | int retval, idx; |
da0436e9 JS |
11738 | |
11739 | if (cfg_mode == 2) { | |
11740 | /* Preparation before conf_msi mbox cmd */ | |
11741 | retval = 0; | |
11742 | if (!retval) { | |
11743 | /* Now, try to enable MSI-X interrupt mode */ | |
11744 | retval = lpfc_sli4_enable_msix(phba); | |
11745 | if (!retval) { | |
11746 | /* Indicate initialization to MSI-X mode */ | |
11747 | phba->intr_type = MSIX; | |
11748 | intr_mode = 2; | |
11749 | } | |
11750 | } | |
11751 | } | |
11752 | ||
11753 | /* Fallback to MSI if MSI-X initialization failed */ | |
11754 | if (cfg_mode >= 1 && phba->intr_type == NONE) { | |
11755 | retval = lpfc_sli4_enable_msi(phba); | |
11756 | if (!retval) { | |
11757 | /* Indicate initialization to MSI mode */ | |
11758 | phba->intr_type = MSI; | |
11759 | intr_mode = 1; | |
11760 | } | |
11761 | } | |
11762 | ||
11763 | /* Fallback to INTx if both MSI-X/MSI initalization failed */ | |
11764 | if (phba->intr_type == NONE) { | |
11765 | retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler, | |
11766 | IRQF_SHARED, LPFC_DRIVER_NAME, phba); | |
11767 | if (!retval) { | |
895427bd | 11768 | struct lpfc_hba_eq_hdl *eqhdl; |
dcaa2136 | 11769 | unsigned int cpu; |
895427bd | 11770 | |
da0436e9 JS |
11771 | /* Indicate initialization to INTx mode */ |
11772 | phba->intr_type = INTx; | |
11773 | intr_mode = 0; | |
895427bd | 11774 | |
dcaa2136 JS |
11775 | eqhdl = lpfc_get_eq_hdl(0); |
11776 | eqhdl->irq = pci_irq_vector(phba->pcidev, 0); | |
11777 | ||
11778 | cpu = cpumask_first(cpu_present_mask); | |
11779 | lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ, | |
11780 | cpu); | |
6a828b0f | 11781 | for (idx = 0; idx < phba->cfg_irq_chann; idx++) { |
dcaa2136 | 11782 | eqhdl = lpfc_get_eq_hdl(idx); |
895427bd | 11783 | eqhdl->idx = idx; |
1ba981fd | 11784 | } |
da0436e9 JS |
11785 | } |
11786 | } | |
11787 | return intr_mode; | |
11788 | } | |
11789 | ||
11790 | /** | |
11791 | * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device | |
11792 | * @phba: pointer to lpfc hba data structure. | |
11793 | * | |
11794 | * This routine is invoked to disable device interrupt and disassociate | |
11795 | * the driver's interrupt handler(s) from interrupt vector(s) to device | |
11796 | * with SLI-4 interface spec. Depending on the interrupt mode, the driver | |
11797 | * will release the interrupt vector(s) for the message signaled interrupt. | |
11798 | **/ | |
11799 | static void | |
11800 | lpfc_sli4_disable_intr(struct lpfc_hba *phba) | |
11801 | { | |
11802 | /* Disable the currently initialized interrupt mode */ | |
45ffac19 CH |
11803 | if (phba->intr_type == MSIX) { |
11804 | int index; | |
dcaa2136 | 11805 | struct lpfc_hba_eq_hdl *eqhdl; |
45ffac19 CH |
11806 | |
11807 | /* Free up MSI-X multi-message vectors */ | |
6a828b0f | 11808 | for (index = 0; index < phba->cfg_irq_chann; index++) { |
dcaa2136 JS |
11809 | eqhdl = lpfc_get_eq_hdl(index); |
11810 | lpfc_irq_clear_aff(eqhdl); | |
11811 | irq_set_affinity_hint(eqhdl->irq, NULL); | |
11812 | free_irq(eqhdl->irq, eqhdl); | |
b3295c2a | 11813 | } |
45ffac19 | 11814 | } else { |
da0436e9 | 11815 | free_irq(phba->pcidev->irq, phba); |
45ffac19 CH |
11816 | } |
11817 | ||
11818 | pci_free_irq_vectors(phba->pcidev); | |
da0436e9 JS |
11819 | |
11820 | /* Reset interrupt management states */ | |
11821 | phba->intr_type = NONE; | |
11822 | phba->sli.slistat.sli_intr = 0; | |
da0436e9 JS |
11823 | } |
11824 | ||
11825 | /** | |
11826 | * lpfc_unset_hba - Unset SLI3 hba device initialization | |
11827 | * @phba: pointer to lpfc hba data structure. | |
11828 | * | |
11829 | * This routine is invoked to unset the HBA device initialization steps to | |
11830 | * a device with SLI-3 interface spec. | |
11831 | **/ | |
11832 | static void | |
11833 | lpfc_unset_hba(struct lpfc_hba *phba) | |
11834 | { | |
11835 | struct lpfc_vport *vport = phba->pport; | |
11836 | struct Scsi_Host *shost = lpfc_shost_from_vport(vport); | |
11837 | ||
11838 | spin_lock_irq(shost->host_lock); | |
11839 | vport->load_flag |= FC_UNLOADING; | |
11840 | spin_unlock_irq(shost->host_lock); | |
11841 | ||
72859909 JS |
11842 | kfree(phba->vpi_bmask); |
11843 | kfree(phba->vpi_ids); | |
11844 | ||
da0436e9 JS |
11845 | lpfc_stop_hba_timers(phba); |
11846 | ||
11847 | phba->pport->work_port_events = 0; | |
11848 | ||
11849 | lpfc_sli_hba_down(phba); | |
11850 | ||
11851 | lpfc_sli_brdrestart(phba); | |
11852 | ||
11853 | lpfc_sli_disable_intr(phba); | |
11854 | ||
11855 | return; | |
11856 | } | |
11857 | ||
5af5eee7 JS |
11858 | /** |
11859 | * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy | |
11860 | * @phba: Pointer to HBA context object. | |
11861 | * | |
11862 | * This function is called in the SLI4 code path to wait for completion | |
11863 | * of device's XRIs exchange busy. It will check the XRI exchange busy | |
11864 | * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after | |
11865 | * that, it will check the XRI exchange busy on outstanding FCP and ELS | |
11866 | * I/Os every 30 seconds, log error message, and wait forever. Only when | |
11867 | * all XRI exchange busy complete, the driver unload shall proceed with | |
11868 | * invoking the function reset ioctl mailbox command to the CNA and the | |
11869 | * the rest of the driver unload resource release. | |
11870 | **/ | |
11871 | static void | |
11872 | lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba) | |
11873 | { | |
5e5b511d | 11874 | struct lpfc_sli4_hdw_queue *qp; |
c00f62e6 | 11875 | int idx, ccnt; |
5af5eee7 | 11876 | int wait_time = 0; |
5e5b511d | 11877 | int io_xri_cmpl = 1; |
86c67379 | 11878 | int nvmet_xri_cmpl = 1; |
5af5eee7 JS |
11879 | int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list); |
11880 | ||
c3725bdc JS |
11881 | /* Driver just aborted IOs during the hba_unset process. Pause |
11882 | * here to give the HBA time to complete the IO and get entries | |
11883 | * into the abts lists. | |
11884 | */ | |
11885 | msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1 * 5); | |
11886 | ||
11887 | /* Wait for NVME pending IO to flush back to transport. */ | |
11888 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) | |
11889 | lpfc_nvme_wait_for_io_drain(phba); | |
11890 | ||
5e5b511d | 11891 | ccnt = 0; |
5e5b511d JS |
11892 | for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { |
11893 | qp = &phba->sli4_hba.hdwq[idx]; | |
c00f62e6 JS |
11894 | io_xri_cmpl = list_empty(&qp->lpfc_abts_io_buf_list); |
11895 | if (!io_xri_cmpl) /* if list is NOT empty */ | |
11896 | ccnt++; | |
5e5b511d JS |
11897 | } |
11898 | if (ccnt) | |
11899 | io_xri_cmpl = 0; | |
5e5b511d | 11900 | |
86c67379 | 11901 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { |
86c67379 JS |
11902 | nvmet_xri_cmpl = |
11903 | list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); | |
11904 | } | |
895427bd | 11905 | |
c00f62e6 | 11906 | while (!els_xri_cmpl || !io_xri_cmpl || !nvmet_xri_cmpl) { |
5af5eee7 | 11907 | if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) { |
68c9b55d | 11908 | if (!nvmet_xri_cmpl) |
372c187b | 11909 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
68c9b55d JS |
11910 | "6424 NVMET XRI exchange busy " |
11911 | "wait time: %d seconds.\n", | |
11912 | wait_time/1000); | |
5e5b511d | 11913 | if (!io_xri_cmpl) |
372c187b | 11914 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
c00f62e6 | 11915 | "6100 IO XRI exchange busy " |
5af5eee7 JS |
11916 | "wait time: %d seconds.\n", |
11917 | wait_time/1000); | |
11918 | if (!els_xri_cmpl) | |
372c187b | 11919 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
5af5eee7 JS |
11920 | "2878 ELS XRI exchange busy " |
11921 | "wait time: %d seconds.\n", | |
11922 | wait_time/1000); | |
11923 | msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2); | |
11924 | wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2; | |
11925 | } else { | |
11926 | msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1); | |
11927 | wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1; | |
11928 | } | |
5e5b511d JS |
11929 | |
11930 | ccnt = 0; | |
5e5b511d JS |
11931 | for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { |
11932 | qp = &phba->sli4_hba.hdwq[idx]; | |
c00f62e6 JS |
11933 | io_xri_cmpl = list_empty( |
11934 | &qp->lpfc_abts_io_buf_list); | |
11935 | if (!io_xri_cmpl) /* if list is NOT empty */ | |
11936 | ccnt++; | |
5e5b511d JS |
11937 | } |
11938 | if (ccnt) | |
11939 | io_xri_cmpl = 0; | |
5e5b511d | 11940 | |
86c67379 | 11941 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { |
86c67379 JS |
11942 | nvmet_xri_cmpl = list_empty( |
11943 | &phba->sli4_hba.lpfc_abts_nvmet_ctx_list); | |
11944 | } | |
5af5eee7 JS |
11945 | els_xri_cmpl = |
11946 | list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list); | |
f358dd0c | 11947 | |
5af5eee7 JS |
11948 | } |
11949 | } | |
11950 | ||
da0436e9 JS |
11951 | /** |
11952 | * lpfc_sli4_hba_unset - Unset the fcoe hba | |
11953 | * @phba: Pointer to HBA context object. | |
11954 | * | |
11955 | * This function is called in the SLI4 code path to reset the HBA's FCoE | |
11956 | * function. The caller is not required to hold any lock. This routine | |
11957 | * issues PCI function reset mailbox command to reset the FCoE function. | |
11958 | * At the end of the function, it calls lpfc_hba_down_post function to | |
11959 | * free any pending commands. | |
11960 | **/ | |
11961 | static void | |
11962 | lpfc_sli4_hba_unset(struct lpfc_hba *phba) | |
11963 | { | |
11964 | int wait_cnt = 0; | |
11965 | LPFC_MBOXQ_t *mboxq; | |
912e3acd | 11966 | struct pci_dev *pdev = phba->pcidev; |
da0436e9 JS |
11967 | |
11968 | lpfc_stop_hba_timers(phba); | |
cdb42bec JS |
11969 | if (phba->pport) |
11970 | phba->sli4_hba.intr_enable = 0; | |
da0436e9 JS |
11971 | |
11972 | /* | |
11973 | * Gracefully wait out the potential current outstanding asynchronous | |
11974 | * mailbox command. | |
11975 | */ | |
11976 | ||
11977 | /* First, block any pending async mailbox command from posted */ | |
11978 | spin_lock_irq(&phba->hbalock); | |
11979 | phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK; | |
11980 | spin_unlock_irq(&phba->hbalock); | |
11981 | /* Now, trying to wait it out if we can */ | |
11982 | while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) { | |
11983 | msleep(10); | |
11984 | if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT) | |
11985 | break; | |
11986 | } | |
11987 | /* Forcefully release the outstanding mailbox command if timed out */ | |
11988 | if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) { | |
11989 | spin_lock_irq(&phba->hbalock); | |
11990 | mboxq = phba->sli.mbox_active; | |
11991 | mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED; | |
11992 | __lpfc_mbox_cmpl_put(phba, mboxq); | |
11993 | phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; | |
11994 | phba->sli.mbox_active = NULL; | |
11995 | spin_unlock_irq(&phba->hbalock); | |
11996 | } | |
11997 | ||
5af5eee7 JS |
11998 | /* Abort all iocbs associated with the hba */ |
11999 | lpfc_sli_hba_iocb_abort(phba); | |
12000 | ||
12001 | /* Wait for completion of device XRI exchange busy */ | |
12002 | lpfc_sli4_xri_exchange_busy_wait(phba); | |
12003 | ||
93a4d6f4 | 12004 | /* per-phba callback de-registration for hotplug event */ |
46da547e SP |
12005 | if (phba->pport) |
12006 | lpfc_cpuhp_remove(phba); | |
93a4d6f4 | 12007 | |
da0436e9 JS |
12008 | /* Disable PCI subsystem interrupt */ |
12009 | lpfc_sli4_disable_intr(phba); | |
12010 | ||
912e3acd JS |
12011 | /* Disable SR-IOV if enabled */ |
12012 | if (phba->cfg_sriov_nr_virtfn) | |
12013 | pci_disable_sriov(pdev); | |
12014 | ||
da0436e9 JS |
12015 | /* Stop kthread signal shall trigger work_done one more time */ |
12016 | kthread_stop(phba->worker_thread); | |
12017 | ||
d2cc9bcd | 12018 | /* Disable FW logging to host memory */ |
1165a5c2 | 12019 | lpfc_ras_stop_fwlog(phba); |
d2cc9bcd | 12020 | |
d1f525aa JS |
12021 | /* Unset the queues shared with the hardware then release all |
12022 | * allocated resources. | |
12023 | */ | |
12024 | lpfc_sli4_queue_unset(phba); | |
12025 | lpfc_sli4_queue_destroy(phba); | |
12026 | ||
3677a3a7 JS |
12027 | /* Reset SLI4 HBA FCoE function */ |
12028 | lpfc_pci_function_reset(phba); | |
12029 | ||
1165a5c2 JS |
12030 | /* Free RAS DMA memory */ |
12031 | if (phba->ras_fwlog.ras_enabled) | |
12032 | lpfc_sli4_ras_dma_free(phba); | |
12033 | ||
da0436e9 | 12034 | /* Stop the SLI4 device port */ |
1ffdd2c0 JS |
12035 | if (phba->pport) |
12036 | phba->pport->work_port_events = 0; | |
da0436e9 JS |
12037 | } |
12038 | ||
28baac74 JS |
12039 | /** |
12040 | * lpfc_pc_sli4_params_get - Get the SLI4_PARAMS port capabilities. | |
12041 | * @phba: Pointer to HBA context object. | |
12042 | * @mboxq: Pointer to the mailboxq memory for the mailbox command response. | |
12043 | * | |
12044 | * This function is called in the SLI4 code path to read the port's | |
12045 | * sli4 capabilities. | |
12046 | * | |
12047 | * This function may be be called from any context that can block-wait | |
12048 | * for the completion. The expectation is that this routine is called | |
12049 | * typically from probe_one or from the online routine. | |
12050 | **/ | |
12051 | int | |
12052 | lpfc_pc_sli4_params_get(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq) | |
12053 | { | |
12054 | int rc; | |
12055 | struct lpfc_mqe *mqe; | |
12056 | struct lpfc_pc_sli4_params *sli4_params; | |
12057 | uint32_t mbox_tmo; | |
12058 | ||
12059 | rc = 0; | |
12060 | mqe = &mboxq->u.mqe; | |
12061 | ||
12062 | /* Read the port's SLI4 Parameters port capabilities */ | |
fedd3b7b | 12063 | lpfc_pc_sli4_params(mboxq); |
28baac74 JS |
12064 | if (!phba->sli4_hba.intr_enable) |
12065 | rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
12066 | else { | |
a183a15f | 12067 | mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq); |
28baac74 JS |
12068 | rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo); |
12069 | } | |
12070 | ||
12071 | if (unlikely(rc)) | |
12072 | return 1; | |
12073 | ||
12074 | sli4_params = &phba->sli4_hba.pc_sli4_params; | |
12075 | sli4_params->if_type = bf_get(if_type, &mqe->un.sli4_params); | |
12076 | sli4_params->sli_rev = bf_get(sli_rev, &mqe->un.sli4_params); | |
12077 | sli4_params->sli_family = bf_get(sli_family, &mqe->un.sli4_params); | |
12078 | sli4_params->featurelevel_1 = bf_get(featurelevel_1, | |
12079 | &mqe->un.sli4_params); | |
12080 | sli4_params->featurelevel_2 = bf_get(featurelevel_2, | |
12081 | &mqe->un.sli4_params); | |
12082 | sli4_params->proto_types = mqe->un.sli4_params.word3; | |
12083 | sli4_params->sge_supp_len = mqe->un.sli4_params.sge_supp_len; | |
12084 | sli4_params->if_page_sz = bf_get(if_page_sz, &mqe->un.sli4_params); | |
12085 | sli4_params->rq_db_window = bf_get(rq_db_window, &mqe->un.sli4_params); | |
12086 | sli4_params->loopbk_scope = bf_get(loopbk_scope, &mqe->un.sli4_params); | |
12087 | sli4_params->eq_pages_max = bf_get(eq_pages, &mqe->un.sli4_params); | |
12088 | sli4_params->eqe_size = bf_get(eqe_size, &mqe->un.sli4_params); | |
12089 | sli4_params->cq_pages_max = bf_get(cq_pages, &mqe->un.sli4_params); | |
12090 | sli4_params->cqe_size = bf_get(cqe_size, &mqe->un.sli4_params); | |
12091 | sli4_params->mq_pages_max = bf_get(mq_pages, &mqe->un.sli4_params); | |
12092 | sli4_params->mqe_size = bf_get(mqe_size, &mqe->un.sli4_params); | |
12093 | sli4_params->mq_elem_cnt = bf_get(mq_elem_cnt, &mqe->un.sli4_params); | |
12094 | sli4_params->wq_pages_max = bf_get(wq_pages, &mqe->un.sli4_params); | |
12095 | sli4_params->wqe_size = bf_get(wqe_size, &mqe->un.sli4_params); | |
12096 | sli4_params->rq_pages_max = bf_get(rq_pages, &mqe->un.sli4_params); | |
12097 | sli4_params->rqe_size = bf_get(rqe_size, &mqe->un.sli4_params); | |
12098 | sli4_params->hdr_pages_max = bf_get(hdr_pages, &mqe->un.sli4_params); | |
12099 | sli4_params->hdr_size = bf_get(hdr_size, &mqe->un.sli4_params); | |
12100 | sli4_params->hdr_pp_align = bf_get(hdr_pp_align, &mqe->un.sli4_params); | |
12101 | sli4_params->sgl_pages_max = bf_get(sgl_pages, &mqe->un.sli4_params); | |
12102 | sli4_params->sgl_pp_align = bf_get(sgl_pp_align, &mqe->un.sli4_params); | |
0558056c JS |
12103 | |
12104 | /* Make sure that sge_supp_len can be handled by the driver */ | |
12105 | if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE) | |
12106 | sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE; | |
12107 | ||
28baac74 JS |
12108 | return rc; |
12109 | } | |
12110 | ||
fedd3b7b JS |
12111 | /** |
12112 | * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS. | |
12113 | * @phba: Pointer to HBA context object. | |
12114 | * @mboxq: Pointer to the mailboxq memory for the mailbox command response. | |
12115 | * | |
12116 | * This function is called in the SLI4 code path to read the port's | |
12117 | * sli4 capabilities. | |
12118 | * | |
12119 | * This function may be be called from any context that can block-wait | |
12120 | * for the completion. The expectation is that this routine is called | |
12121 | * typically from probe_one or from the online routine. | |
12122 | **/ | |
12123 | int | |
12124 | lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq) | |
12125 | { | |
12126 | int rc; | |
12127 | struct lpfc_mqe *mqe = &mboxq->u.mqe; | |
12128 | struct lpfc_pc_sli4_params *sli4_params; | |
a183a15f | 12129 | uint32_t mbox_tmo; |
fedd3b7b | 12130 | int length; |
bf316c78 | 12131 | bool exp_wqcq_pages = true; |
fedd3b7b JS |
12132 | struct lpfc_sli4_parameters *mbx_sli4_parameters; |
12133 | ||
6d368e53 JS |
12134 | /* |
12135 | * By default, the driver assumes the SLI4 port requires RPI | |
12136 | * header postings. The SLI4_PARAM response will correct this | |
12137 | * assumption. | |
12138 | */ | |
12139 | phba->sli4_hba.rpi_hdrs_in_use = 1; | |
12140 | ||
fedd3b7b JS |
12141 | /* Read the port's SLI4 Config Parameters */ |
12142 | length = (sizeof(struct lpfc_mbx_get_sli4_parameters) - | |
12143 | sizeof(struct lpfc_sli4_cfg_mhdr)); | |
12144 | lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, | |
12145 | LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS, | |
12146 | length, LPFC_SLI4_MBX_EMBED); | |
12147 | if (!phba->sli4_hba.intr_enable) | |
12148 | rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
a183a15f JS |
12149 | else { |
12150 | mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq); | |
12151 | rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo); | |
12152 | } | |
fedd3b7b JS |
12153 | if (unlikely(rc)) |
12154 | return rc; | |
12155 | sli4_params = &phba->sli4_hba.pc_sli4_params; | |
12156 | mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters; | |
12157 | sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters); | |
12158 | sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters); | |
12159 | sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters); | |
12160 | sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1, | |
12161 | mbx_sli4_parameters); | |
12162 | sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2, | |
12163 | mbx_sli4_parameters); | |
12164 | if (bf_get(cfg_phwq, mbx_sli4_parameters)) | |
12165 | phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED; | |
12166 | else | |
12167 | phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED; | |
12168 | sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len; | |
12169 | sli4_params->loopbk_scope = bf_get(loopbk_scope, mbx_sli4_parameters); | |
1ba981fd | 12170 | sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters); |
fedd3b7b JS |
12171 | sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters); |
12172 | sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters); | |
12173 | sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters); | |
12174 | sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters); | |
7365f6fd JS |
12175 | sli4_params->eqav = bf_get(cfg_eqav, mbx_sli4_parameters); |
12176 | sli4_params->cqav = bf_get(cfg_cqav, mbx_sli4_parameters); | |
0c651878 | 12177 | sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters); |
66e9e6bf | 12178 | sli4_params->bv1s = bf_get(cfg_bv1s, mbx_sli4_parameters); |
83c6cb1a | 12179 | sli4_params->pls = bf_get(cfg_pvl, mbx_sli4_parameters); |
fedd3b7b JS |
12180 | sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt, |
12181 | mbx_sli4_parameters); | |
895427bd | 12182 | sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters); |
fedd3b7b JS |
12183 | sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align, |
12184 | mbx_sli4_parameters); | |
6d368e53 JS |
12185 | phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters); |
12186 | phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters); | |
c15e0704 | 12187 | |
d79c9e9d JS |
12188 | /* Check for Extended Pre-Registered SGL support */ |
12189 | phba->cfg_xpsgl = bf_get(cfg_xpsgl, mbx_sli4_parameters); | |
12190 | ||
c15e0704 JS |
12191 | /* Check for firmware nvme support */ |
12192 | rc = (bf_get(cfg_nvme, mbx_sli4_parameters) && | |
12193 | bf_get(cfg_xib, mbx_sli4_parameters)); | |
12194 | ||
12195 | if (rc) { | |
12196 | /* Save this to indicate the Firmware supports NVME */ | |
12197 | sli4_params->nvme = 1; | |
12198 | ||
12199 | /* Firmware NVME support, check driver FC4 NVME support */ | |
12200 | if (phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) { | |
12201 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME, | |
12202 | "6133 Disabling NVME support: " | |
12203 | "FC4 type not supported: x%x\n", | |
12204 | phba->cfg_enable_fc4_type); | |
12205 | goto fcponly; | |
12206 | } | |
12207 | } else { | |
12208 | /* No firmware NVME support, check driver FC4 NVME support */ | |
12209 | sli4_params->nvme = 0; | |
12210 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
12211 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME, | |
12212 | "6101 Disabling NVME support: Not " | |
12213 | "supported by firmware (%d %d) x%x\n", | |
12214 | bf_get(cfg_nvme, mbx_sli4_parameters), | |
12215 | bf_get(cfg_xib, mbx_sli4_parameters), | |
12216 | phba->cfg_enable_fc4_type); | |
12217 | fcponly: | |
12218 | phba->nvme_support = 0; | |
12219 | phba->nvmet_support = 0; | |
12220 | phba->cfg_nvmet_mrq = 0; | |
6a224b47 | 12221 | phba->cfg_nvme_seg_cnt = 0; |
c15e0704 JS |
12222 | |
12223 | /* If no FC4 type support, move to just SCSI support */ | |
12224 | if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)) | |
12225 | return -ENODEV; | |
12226 | phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP; | |
12227 | } | |
895427bd | 12228 | } |
0558056c | 12229 | |
c26c265b | 12230 | /* If the NVME FC4 type is enabled, scale the sg_seg_cnt to |
a5f7337f | 12231 | * accommodate 512K and 1M IOs in a single nvme buf. |
c26c265b | 12232 | */ |
a5f7337f | 12233 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) |
c26c265b | 12234 | phba->cfg_sg_seg_cnt = LPFC_MAX_NVME_SEG_CNT; |
c26c265b | 12235 | |
414abe0a JS |
12236 | /* Only embed PBDE for if_type 6, PBDE support requires xib be set */ |
12237 | if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) != | |
12238 | LPFC_SLI_INTF_IF_TYPE_6) || (!bf_get(cfg_xib, mbx_sli4_parameters))) | |
12239 | phba->cfg_enable_pbde = 0; | |
0bc2b7c5 | 12240 | |
20aefac3 JS |
12241 | /* |
12242 | * To support Suppress Response feature we must satisfy 3 conditions. | |
12243 | * lpfc_suppress_rsp module parameter must be set (default). | |
12244 | * In SLI4-Parameters Descriptor: | |
12245 | * Extended Inline Buffers (XIB) must be supported. | |
12246 | * Suppress Response IU Not Supported (SRIUNS) must NOT be supported | |
12247 | * (double negative). | |
12248 | */ | |
12249 | if (phba->cfg_suppress_rsp && bf_get(cfg_xib, mbx_sli4_parameters) && | |
12250 | !(bf_get(cfg_nosr, mbx_sli4_parameters))) | |
f358dd0c | 12251 | phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP; |
20aefac3 JS |
12252 | else |
12253 | phba->cfg_suppress_rsp = 0; | |
f358dd0c | 12254 | |
0cf07f84 JS |
12255 | if (bf_get(cfg_eqdr, mbx_sli4_parameters)) |
12256 | phba->sli.sli_flag |= LPFC_SLI_USE_EQDR; | |
12257 | ||
0558056c JS |
12258 | /* Make sure that sge_supp_len can be handled by the driver */ |
12259 | if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE) | |
12260 | sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE; | |
12261 | ||
b5c53958 | 12262 | /* |
c176ffa0 JS |
12263 | * Check whether the adapter supports an embedded copy of the |
12264 | * FCP CMD IU within the WQE for FCP_Ixxx commands. In order | |
12265 | * to use this option, 128-byte WQEs must be used. | |
b5c53958 JS |
12266 | */ |
12267 | if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters)) | |
12268 | phba->fcp_embed_io = 1; | |
12269 | else | |
12270 | phba->fcp_embed_io = 0; | |
7bdedb34 | 12271 | |
0bc2b7c5 | 12272 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME, |
414abe0a | 12273 | "6422 XIB %d PBDE %d: FCP %d NVME %d %d %d\n", |
0bc2b7c5 | 12274 | bf_get(cfg_xib, mbx_sli4_parameters), |
414abe0a JS |
12275 | phba->cfg_enable_pbde, |
12276 | phba->fcp_embed_io, phba->nvme_support, | |
4e565cf0 | 12277 | phba->cfg_nvme_embed_cmd, phba->cfg_suppress_rsp); |
0bc2b7c5 | 12278 | |
bf316c78 JS |
12279 | if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == |
12280 | LPFC_SLI_INTF_IF_TYPE_2) && | |
12281 | (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) == | |
c221768b | 12282 | LPFC_SLI_INTF_FAMILY_LNCR_A0)) |
bf316c78 JS |
12283 | exp_wqcq_pages = false; |
12284 | ||
c176ffa0 JS |
12285 | if ((bf_get(cfg_cqpsize, mbx_sli4_parameters) & LPFC_CQ_16K_PAGE_SZ) && |
12286 | (bf_get(cfg_wqpsize, mbx_sli4_parameters) & LPFC_WQ_16K_PAGE_SZ) && | |
bf316c78 | 12287 | exp_wqcq_pages && |
c176ffa0 JS |
12288 | (sli4_params->wqsize & LPFC_WQ_SZ128_SUPPORT)) |
12289 | phba->enab_exp_wqcq_pages = 1; | |
12290 | else | |
12291 | phba->enab_exp_wqcq_pages = 0; | |
7bdedb34 JS |
12292 | /* |
12293 | * Check if the SLI port supports MDS Diagnostics | |
12294 | */ | |
12295 | if (bf_get(cfg_mds_diags, mbx_sli4_parameters)) | |
12296 | phba->mds_diags_support = 1; | |
12297 | else | |
12298 | phba->mds_diags_support = 0; | |
d2cc9bcd | 12299 | |
0d8af096 JS |
12300 | /* |
12301 | * Check if the SLI port supports NSLER | |
12302 | */ | |
12303 | if (bf_get(cfg_nsler, mbx_sli4_parameters)) | |
12304 | phba->nsler = 1; | |
12305 | else | |
12306 | phba->nsler = 0; | |
12307 | ||
8aaa7bcf JS |
12308 | /* Save PB info for use during HBA setup */ |
12309 | sli4_params->mi_ver = bf_get(cfg_mi_ver, mbx_sli4_parameters); | |
12310 | sli4_params->mib_bde_cnt = bf_get(cfg_mib_bde_cnt, mbx_sli4_parameters); | |
12311 | sli4_params->mib_size = mbx_sli4_parameters->mib_size; | |
12312 | sli4_params->mi_value = LPFC_DFLT_MIB_VAL; | |
12313 | ||
12314 | /* Next we check for Vendor MIB support */ | |
12315 | if (sli4_params->mi_ver && phba->cfg_enable_mi) | |
12316 | phba->cfg_fdmi_on = LPFC_FDMI_SUPPORT; | |
12317 | ||
12318 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
12319 | "6461 MIB attr %d enable %d FDMI %d buf %d:%d\n", | |
12320 | sli4_params->mi_ver, phba->cfg_enable_mi, | |
12321 | sli4_params->mi_value, sli4_params->mib_bde_cnt, | |
12322 | sli4_params->mib_size); | |
fedd3b7b JS |
12323 | return 0; |
12324 | } | |
12325 | ||
da0436e9 JS |
12326 | /** |
12327 | * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem. | |
12328 | * @pdev: pointer to PCI device | |
12329 | * @pid: pointer to PCI device identifier | |
12330 | * | |
12331 | * This routine is to be called to attach a device with SLI-3 interface spec | |
12332 | * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is | |
12333 | * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific | |
12334 | * information of the device and driver to see if the driver state that it can | |
12335 | * support this kind of device. If the match is successful, the driver core | |
12336 | * invokes this routine. If this routine determines it can claim the HBA, it | |
12337 | * does all the initialization that it needs to do to handle the HBA properly. | |
12338 | * | |
12339 | * Return code | |
12340 | * 0 - driver can claim the device | |
12341 | * negative value - driver can not claim the device | |
12342 | **/ | |
6f039790 | 12343 | static int |
da0436e9 JS |
12344 | lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid) |
12345 | { | |
12346 | struct lpfc_hba *phba; | |
12347 | struct lpfc_vport *vport = NULL; | |
6669f9bb | 12348 | struct Scsi_Host *shost = NULL; |
da0436e9 JS |
12349 | int error; |
12350 | uint32_t cfg_mode, intr_mode; | |
12351 | ||
12352 | /* Allocate memory for HBA structure */ | |
12353 | phba = lpfc_hba_alloc(pdev); | |
12354 | if (!phba) | |
12355 | return -ENOMEM; | |
12356 | ||
12357 | /* Perform generic PCI device enabling operation */ | |
12358 | error = lpfc_enable_pci_dev(phba); | |
079b5c91 | 12359 | if (error) |
da0436e9 | 12360 | goto out_free_phba; |
da0436e9 JS |
12361 | |
12362 | /* Set up SLI API function jump table for PCI-device group-0 HBAs */ | |
12363 | error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP); | |
12364 | if (error) | |
12365 | goto out_disable_pci_dev; | |
12366 | ||
12367 | /* Set up SLI-3 specific device PCI memory space */ | |
12368 | error = lpfc_sli_pci_mem_setup(phba); | |
12369 | if (error) { | |
12370 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12371 | "1402 Failed to set up pci memory space.\n"); | |
12372 | goto out_disable_pci_dev; | |
12373 | } | |
12374 | ||
da0436e9 JS |
12375 | /* Set up SLI-3 specific device driver resources */ |
12376 | error = lpfc_sli_driver_resource_setup(phba); | |
12377 | if (error) { | |
12378 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12379 | "1404 Failed to set up driver resource.\n"); | |
12380 | goto out_unset_pci_mem_s3; | |
12381 | } | |
12382 | ||
12383 | /* Initialize and populate the iocb list per host */ | |
d1f525aa | 12384 | |
da0436e9 JS |
12385 | error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT); |
12386 | if (error) { | |
12387 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12388 | "1405 Failed to initialize iocb list.\n"); | |
12389 | goto out_unset_driver_resource_s3; | |
12390 | } | |
12391 | ||
12392 | /* Set up common device driver resources */ | |
12393 | error = lpfc_setup_driver_resource_phase2(phba); | |
12394 | if (error) { | |
12395 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12396 | "1406 Failed to set up driver resource.\n"); | |
12397 | goto out_free_iocb_list; | |
12398 | } | |
12399 | ||
079b5c91 JS |
12400 | /* Get the default values for Model Name and Description */ |
12401 | lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); | |
12402 | ||
da0436e9 JS |
12403 | /* Create SCSI host to the physical port */ |
12404 | error = lpfc_create_shost(phba); | |
12405 | if (error) { | |
12406 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12407 | "1407 Failed to create scsi host.\n"); | |
12408 | goto out_unset_driver_resource; | |
12409 | } | |
12410 | ||
12411 | /* Configure sysfs attributes */ | |
12412 | vport = phba->pport; | |
12413 | error = lpfc_alloc_sysfs_attr(vport); | |
12414 | if (error) { | |
12415 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12416 | "1476 Failed to allocate sysfs attr\n"); | |
12417 | goto out_destroy_shost; | |
12418 | } | |
12419 | ||
6669f9bb | 12420 | shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */ |
da0436e9 JS |
12421 | /* Now, trying to enable interrupt and bring up the device */ |
12422 | cfg_mode = phba->cfg_use_msi; | |
12423 | while (true) { | |
12424 | /* Put device to a known state before enabling interrupt */ | |
12425 | lpfc_stop_port(phba); | |
12426 | /* Configure and enable interrupt */ | |
12427 | intr_mode = lpfc_sli_enable_intr(phba, cfg_mode); | |
12428 | if (intr_mode == LPFC_INTR_ERROR) { | |
372c187b | 12429 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
da0436e9 JS |
12430 | "0431 Failed to enable interrupt.\n"); |
12431 | error = -ENODEV; | |
12432 | goto out_free_sysfs_attr; | |
12433 | } | |
12434 | /* SLI-3 HBA setup */ | |
12435 | if (lpfc_sli_hba_setup(phba)) { | |
372c187b | 12436 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
da0436e9 JS |
12437 | "1477 Failed to set up hba\n"); |
12438 | error = -ENODEV; | |
12439 | goto out_remove_device; | |
12440 | } | |
12441 | ||
12442 | /* Wait 50ms for the interrupts of previous mailbox commands */ | |
12443 | msleep(50); | |
12444 | /* Check active interrupts on message signaled interrupts */ | |
12445 | if (intr_mode == 0 || | |
12446 | phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) { | |
12447 | /* Log the current active interrupt mode */ | |
12448 | phba->intr_mode = intr_mode; | |
12449 | lpfc_log_intr_mode(phba, intr_mode); | |
12450 | break; | |
12451 | } else { | |
12452 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
12453 | "0447 Configure interrupt mode (%d) " | |
12454 | "failed active interrupt test.\n", | |
12455 | intr_mode); | |
12456 | /* Disable the current interrupt mode */ | |
12457 | lpfc_sli_disable_intr(phba); | |
12458 | /* Try next level of interrupt mode */ | |
12459 | cfg_mode = --intr_mode; | |
12460 | } | |
12461 | } | |
12462 | ||
12463 | /* Perform post initialization setup */ | |
12464 | lpfc_post_init_setup(phba); | |
12465 | ||
12466 | /* Check if there are static vports to be created. */ | |
12467 | lpfc_create_static_vport(phba); | |
12468 | ||
12469 | return 0; | |
12470 | ||
12471 | out_remove_device: | |
12472 | lpfc_unset_hba(phba); | |
12473 | out_free_sysfs_attr: | |
12474 | lpfc_free_sysfs_attr(vport); | |
12475 | out_destroy_shost: | |
12476 | lpfc_destroy_shost(phba); | |
12477 | out_unset_driver_resource: | |
12478 | lpfc_unset_driver_resource_phase2(phba); | |
12479 | out_free_iocb_list: | |
12480 | lpfc_free_iocb_list(phba); | |
12481 | out_unset_driver_resource_s3: | |
12482 | lpfc_sli_driver_resource_unset(phba); | |
12483 | out_unset_pci_mem_s3: | |
12484 | lpfc_sli_pci_mem_unset(phba); | |
12485 | out_disable_pci_dev: | |
12486 | lpfc_disable_pci_dev(phba); | |
6669f9bb JS |
12487 | if (shost) |
12488 | scsi_host_put(shost); | |
da0436e9 JS |
12489 | out_free_phba: |
12490 | lpfc_hba_free(phba); | |
12491 | return error; | |
12492 | } | |
12493 | ||
12494 | /** | |
12495 | * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem. | |
12496 | * @pdev: pointer to PCI device | |
12497 | * | |
12498 | * This routine is to be called to disattach a device with SLI-3 interface | |
12499 | * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is | |
12500 | * removed from PCI bus, it performs all the necessary cleanup for the HBA | |
12501 | * device to be removed from the PCI subsystem properly. | |
12502 | **/ | |
6f039790 | 12503 | static void |
da0436e9 JS |
12504 | lpfc_pci_remove_one_s3(struct pci_dev *pdev) |
12505 | { | |
12506 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
12507 | struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; | |
12508 | struct lpfc_vport **vports; | |
12509 | struct lpfc_hba *phba = vport->phba; | |
12510 | int i; | |
da0436e9 JS |
12511 | |
12512 | spin_lock_irq(&phba->hbalock); | |
12513 | vport->load_flag |= FC_UNLOADING; | |
12514 | spin_unlock_irq(&phba->hbalock); | |
12515 | ||
12516 | lpfc_free_sysfs_attr(vport); | |
12517 | ||
12518 | /* Release all the vports against this physical port */ | |
12519 | vports = lpfc_create_vport_work_array(phba); | |
12520 | if (vports != NULL) | |
587a37f6 JS |
12521 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { |
12522 | if (vports[i]->port_type == LPFC_PHYSICAL_PORT) | |
12523 | continue; | |
da0436e9 | 12524 | fc_vport_terminate(vports[i]->fc_vport); |
587a37f6 | 12525 | } |
da0436e9 JS |
12526 | lpfc_destroy_vport_work_array(phba, vports); |
12527 | ||
95f0ef8a | 12528 | /* Remove FC host with the physical port */ |
da0436e9 | 12529 | fc_remove_host(shost); |
e9b11083 | 12530 | scsi_remove_host(shost); |
d613b6a7 | 12531 | |
95f0ef8a | 12532 | /* Clean up all nodes, mailboxes and IOs. */ |
da0436e9 JS |
12533 | lpfc_cleanup(vport); |
12534 | ||
12535 | /* | |
12536 | * Bring down the SLI Layer. This step disable all interrupts, | |
12537 | * clears the rings, discards all mailbox commands, and resets | |
12538 | * the HBA. | |
12539 | */ | |
12540 | ||
48e34d0f | 12541 | /* HBA interrupt will be disabled after this call */ |
da0436e9 JS |
12542 | lpfc_sli_hba_down(phba); |
12543 | /* Stop kthread signal shall trigger work_done one more time */ | |
12544 | kthread_stop(phba->worker_thread); | |
12545 | /* Final cleanup of txcmplq and reset the HBA */ | |
12546 | lpfc_sli_brdrestart(phba); | |
12547 | ||
72859909 JS |
12548 | kfree(phba->vpi_bmask); |
12549 | kfree(phba->vpi_ids); | |
12550 | ||
da0436e9 | 12551 | lpfc_stop_hba_timers(phba); |
523128e5 | 12552 | spin_lock_irq(&phba->port_list_lock); |
da0436e9 | 12553 | list_del_init(&vport->listentry); |
523128e5 | 12554 | spin_unlock_irq(&phba->port_list_lock); |
da0436e9 JS |
12555 | |
12556 | lpfc_debugfs_terminate(vport); | |
12557 | ||
912e3acd JS |
12558 | /* Disable SR-IOV if enabled */ |
12559 | if (phba->cfg_sriov_nr_virtfn) | |
12560 | pci_disable_sriov(pdev); | |
12561 | ||
da0436e9 JS |
12562 | /* Disable interrupt */ |
12563 | lpfc_sli_disable_intr(phba); | |
12564 | ||
da0436e9 JS |
12565 | scsi_host_put(shost); |
12566 | ||
12567 | /* | |
12568 | * Call scsi_free before mem_free since scsi bufs are released to their | |
12569 | * corresponding pools here. | |
12570 | */ | |
12571 | lpfc_scsi_free(phba); | |
0794d601 JS |
12572 | lpfc_free_iocb_list(phba); |
12573 | ||
da0436e9 JS |
12574 | lpfc_mem_free_all(phba); |
12575 | ||
12576 | dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(), | |
12577 | phba->hbqslimp.virt, phba->hbqslimp.phys); | |
12578 | ||
12579 | /* Free resources associated with SLI2 interface */ | |
12580 | dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, | |
12581 | phba->slim2p.virt, phba->slim2p.phys); | |
12582 | ||
12583 | /* unmap adapter SLIM and Control Registers */ | |
12584 | iounmap(phba->ctrl_regs_memmap_p); | |
12585 | iounmap(phba->slim_memmap_p); | |
12586 | ||
12587 | lpfc_hba_free(phba); | |
12588 | ||
e0c0483c | 12589 | pci_release_mem_regions(pdev); |
da0436e9 JS |
12590 | pci_disable_device(pdev); |
12591 | } | |
12592 | ||
12593 | /** | |
12594 | * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt | |
ef6fa16b | 12595 | * @dev_d: pointer to device |
da0436e9 JS |
12596 | * |
12597 | * This routine is to be called from the kernel's PCI subsystem to support | |
12598 | * system Power Management (PM) to device with SLI-3 interface spec. When | |
12599 | * PM invokes this method, it quiesces the device by stopping the driver's | |
12600 | * worker thread for the device, turning off device's interrupt and DMA, | |
12601 | * and bring the device offline. Note that as the driver implements the | |
12602 | * minimum PM requirements to a power-aware driver's PM support for the | |
12603 | * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE) | |
12604 | * to the suspend() method call will be treated as SUSPEND and the driver will | |
12605 | * fully reinitialize its device during resume() method call, the driver will | |
12606 | * set device to PCI_D3hot state in PCI config space instead of setting it | |
12607 | * according to the @msg provided by the PM. | |
12608 | * | |
12609 | * Return code | |
12610 | * 0 - driver suspended the device | |
12611 | * Error otherwise | |
12612 | **/ | |
ef6fa16b VG |
12613 | static int __maybe_unused |
12614 | lpfc_pci_suspend_one_s3(struct device *dev_d) | |
da0436e9 | 12615 | { |
ef6fa16b | 12616 | struct Scsi_Host *shost = dev_get_drvdata(dev_d); |
da0436e9 JS |
12617 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; |
12618 | ||
12619 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
12620 | "0473 PCI device Power Management suspend.\n"); | |
12621 | ||
12622 | /* Bring down the device */ | |
618a5230 | 12623 | lpfc_offline_prep(phba, LPFC_MBX_WAIT); |
da0436e9 JS |
12624 | lpfc_offline(phba); |
12625 | kthread_stop(phba->worker_thread); | |
12626 | ||
12627 | /* Disable interrupt from device */ | |
12628 | lpfc_sli_disable_intr(phba); | |
12629 | ||
da0436e9 JS |
12630 | return 0; |
12631 | } | |
12632 | ||
12633 | /** | |
12634 | * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt | |
ef6fa16b | 12635 | * @dev_d: pointer to device |
da0436e9 JS |
12636 | * |
12637 | * This routine is to be called from the kernel's PCI subsystem to support | |
12638 | * system Power Management (PM) to device with SLI-3 interface spec. When PM | |
12639 | * invokes this method, it restores the device's PCI config space state and | |
12640 | * fully reinitializes the device and brings it online. Note that as the | |
12641 | * driver implements the minimum PM requirements to a power-aware driver's | |
12642 | * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, | |
12643 | * FREEZE) to the suspend() method call will be treated as SUSPEND and the | |
12644 | * driver will fully reinitialize its device during resume() method call, | |
12645 | * the device will be set to PCI_D0 directly in PCI config space before | |
12646 | * restoring the state. | |
12647 | * | |
12648 | * Return code | |
12649 | * 0 - driver suspended the device | |
12650 | * Error otherwise | |
12651 | **/ | |
ef6fa16b VG |
12652 | static int __maybe_unused |
12653 | lpfc_pci_resume_one_s3(struct device *dev_d) | |
da0436e9 | 12654 | { |
ef6fa16b | 12655 | struct Scsi_Host *shost = dev_get_drvdata(dev_d); |
da0436e9 JS |
12656 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; |
12657 | uint32_t intr_mode; | |
12658 | int error; | |
12659 | ||
12660 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
12661 | "0452 PCI device Power Management resume.\n"); | |
12662 | ||
da0436e9 JS |
12663 | /* Startup the kernel thread for this host adapter. */ |
12664 | phba->worker_thread = kthread_run(lpfc_do_work, phba, | |
12665 | "lpfc_worker_%d", phba->brd_no); | |
12666 | if (IS_ERR(phba->worker_thread)) { | |
12667 | error = PTR_ERR(phba->worker_thread); | |
12668 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
12669 | "0434 PM resume failed to start worker " | |
12670 | "thread: error=x%x.\n", error); | |
12671 | return error; | |
12672 | } | |
12673 | ||
12674 | /* Configure and enable interrupt */ | |
12675 | intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode); | |
12676 | if (intr_mode == LPFC_INTR_ERROR) { | |
372c187b | 12677 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
da0436e9 JS |
12678 | "0430 PM resume Failed to enable interrupt\n"); |
12679 | return -EIO; | |
12680 | } else | |
12681 | phba->intr_mode = intr_mode; | |
12682 | ||
12683 | /* Restart HBA and bring it online */ | |
12684 | lpfc_sli_brdrestart(phba); | |
12685 | lpfc_online(phba); | |
12686 | ||
12687 | /* Log the current active interrupt mode */ | |
12688 | lpfc_log_intr_mode(phba, phba->intr_mode); | |
12689 | ||
12690 | return 0; | |
12691 | } | |
12692 | ||
891478a2 JS |
12693 | /** |
12694 | * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover | |
12695 | * @phba: pointer to lpfc hba data structure. | |
12696 | * | |
12697 | * This routine is called to prepare the SLI3 device for PCI slot recover. It | |
e2af0d2e | 12698 | * aborts all the outstanding SCSI I/Os to the pci device. |
891478a2 JS |
12699 | **/ |
12700 | static void | |
12701 | lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba) | |
12702 | { | |
372c187b | 12703 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
891478a2 | 12704 | "2723 PCI channel I/O abort preparing for recovery\n"); |
e2af0d2e JS |
12705 | |
12706 | /* | |
12707 | * There may be errored I/Os through HBA, abort all I/Os on txcmplq | |
12708 | * and let the SCSI mid-layer to retry them to recover. | |
12709 | */ | |
db55fba8 | 12710 | lpfc_sli_abort_fcp_rings(phba); |
891478a2 JS |
12711 | } |
12712 | ||
0d878419 JS |
12713 | /** |
12714 | * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset | |
12715 | * @phba: pointer to lpfc hba data structure. | |
12716 | * | |
12717 | * This routine is called to prepare the SLI3 device for PCI slot reset. It | |
12718 | * disables the device interrupt and pci device, and aborts the internal FCP | |
12719 | * pending I/Os. | |
12720 | **/ | |
12721 | static void | |
12722 | lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba) | |
12723 | { | |
372c187b | 12724 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
891478a2 | 12725 | "2710 PCI channel disable preparing for reset\n"); |
e2af0d2e | 12726 | |
75baf696 | 12727 | /* Block any management I/Os to the device */ |
618a5230 | 12728 | lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT); |
75baf696 | 12729 | |
e2af0d2e JS |
12730 | /* Block all SCSI devices' I/Os on the host */ |
12731 | lpfc_scsi_dev_block(phba); | |
12732 | ||
ea714f3d | 12733 | /* Flush all driver's outstanding SCSI I/Os as we are to reset */ |
c00f62e6 | 12734 | lpfc_sli_flush_io_rings(phba); |
ea714f3d | 12735 | |
e2af0d2e JS |
12736 | /* stop all timers */ |
12737 | lpfc_stop_hba_timers(phba); | |
12738 | ||
0d878419 JS |
12739 | /* Disable interrupt and pci device */ |
12740 | lpfc_sli_disable_intr(phba); | |
12741 | pci_disable_device(phba->pcidev); | |
0d878419 JS |
12742 | } |
12743 | ||
12744 | /** | |
12745 | * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable | |
12746 | * @phba: pointer to lpfc hba data structure. | |
12747 | * | |
12748 | * This routine is called to prepare the SLI3 device for PCI slot permanently | |
12749 | * disabling. It blocks the SCSI transport layer traffic and flushes the FCP | |
12750 | * pending I/Os. | |
12751 | **/ | |
12752 | static void | |
75baf696 | 12753 | lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba) |
0d878419 | 12754 | { |
372c187b | 12755 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
891478a2 | 12756 | "2711 PCI channel permanent disable for failure\n"); |
e2af0d2e JS |
12757 | /* Block all SCSI devices' I/Os on the host */ |
12758 | lpfc_scsi_dev_block(phba); | |
12759 | ||
12760 | /* stop all timers */ | |
12761 | lpfc_stop_hba_timers(phba); | |
12762 | ||
0d878419 | 12763 | /* Clean up all driver's outstanding SCSI I/Os */ |
c00f62e6 | 12764 | lpfc_sli_flush_io_rings(phba); |
0d878419 JS |
12765 | } |
12766 | ||
da0436e9 JS |
12767 | /** |
12768 | * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error | |
12769 | * @pdev: pointer to PCI device. | |
12770 | * @state: the current PCI connection state. | |
12771 | * | |
12772 | * This routine is called from the PCI subsystem for I/O error handling to | |
12773 | * device with SLI-3 interface spec. This function is called by the PCI | |
12774 | * subsystem after a PCI bus error affecting this device has been detected. | |
12775 | * When this function is invoked, it will need to stop all the I/Os and | |
12776 | * interrupt(s) to the device. Once that is done, it will return | |
12777 | * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery | |
12778 | * as desired. | |
12779 | * | |
12780 | * Return codes | |
0d878419 | 12781 | * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link |
da0436e9 JS |
12782 | * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery |
12783 | * PCI_ERS_RESULT_DISCONNECT - device could not be recovered | |
12784 | **/ | |
12785 | static pci_ers_result_t | |
12786 | lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state) | |
12787 | { | |
12788 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
12789 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
da0436e9 | 12790 | |
0d878419 JS |
12791 | switch (state) { |
12792 | case pci_channel_io_normal: | |
891478a2 JS |
12793 | /* Non-fatal error, prepare for recovery */ |
12794 | lpfc_sli_prep_dev_for_recover(phba); | |
0d878419 JS |
12795 | return PCI_ERS_RESULT_CAN_RECOVER; |
12796 | case pci_channel_io_frozen: | |
12797 | /* Fatal error, prepare for slot reset */ | |
12798 | lpfc_sli_prep_dev_for_reset(phba); | |
12799 | return PCI_ERS_RESULT_NEED_RESET; | |
12800 | case pci_channel_io_perm_failure: | |
12801 | /* Permanent failure, prepare for device down */ | |
75baf696 | 12802 | lpfc_sli_prep_dev_for_perm_failure(phba); |
da0436e9 | 12803 | return PCI_ERS_RESULT_DISCONNECT; |
0d878419 JS |
12804 | default: |
12805 | /* Unknown state, prepare and request slot reset */ | |
372c187b | 12806 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
0d878419 JS |
12807 | "0472 Unknown PCI error state: x%x\n", state); |
12808 | lpfc_sli_prep_dev_for_reset(phba); | |
12809 | return PCI_ERS_RESULT_NEED_RESET; | |
da0436e9 | 12810 | } |
da0436e9 JS |
12811 | } |
12812 | ||
12813 | /** | |
12814 | * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch. | |
12815 | * @pdev: pointer to PCI device. | |
12816 | * | |
12817 | * This routine is called from the PCI subsystem for error handling to | |
12818 | * device with SLI-3 interface spec. This is called after PCI bus has been | |
12819 | * reset to restart the PCI card from scratch, as if from a cold-boot. | |
12820 | * During the PCI subsystem error recovery, after driver returns | |
12821 | * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error | |
12822 | * recovery and then call this routine before calling the .resume method | |
12823 | * to recover the device. This function will initialize the HBA device, | |
12824 | * enable the interrupt, but it will just put the HBA to offline state | |
12825 | * without passing any I/O traffic. | |
12826 | * | |
12827 | * Return codes | |
12828 | * PCI_ERS_RESULT_RECOVERED - the device has been recovered | |
12829 | * PCI_ERS_RESULT_DISCONNECT - device could not be recovered | |
12830 | */ | |
12831 | static pci_ers_result_t | |
12832 | lpfc_io_slot_reset_s3(struct pci_dev *pdev) | |
12833 | { | |
12834 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
12835 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
12836 | struct lpfc_sli *psli = &phba->sli; | |
12837 | uint32_t intr_mode; | |
12838 | ||
12839 | dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n"); | |
12840 | if (pci_enable_device_mem(pdev)) { | |
12841 | printk(KERN_ERR "lpfc: Cannot re-enable " | |
12842 | "PCI device after reset.\n"); | |
12843 | return PCI_ERS_RESULT_DISCONNECT; | |
12844 | } | |
12845 | ||
12846 | pci_restore_state(pdev); | |
1dfb5a47 JS |
12847 | |
12848 | /* | |
12849 | * As the new kernel behavior of pci_restore_state() API call clears | |
12850 | * device saved_state flag, need to save the restored state again. | |
12851 | */ | |
12852 | pci_save_state(pdev); | |
12853 | ||
da0436e9 JS |
12854 | if (pdev->is_busmaster) |
12855 | pci_set_master(pdev); | |
12856 | ||
12857 | spin_lock_irq(&phba->hbalock); | |
12858 | psli->sli_flag &= ~LPFC_SLI_ACTIVE; | |
12859 | spin_unlock_irq(&phba->hbalock); | |
12860 | ||
12861 | /* Configure and enable interrupt */ | |
12862 | intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode); | |
12863 | if (intr_mode == LPFC_INTR_ERROR) { | |
372c187b | 12864 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
da0436e9 JS |
12865 | "0427 Cannot re-enable interrupt after " |
12866 | "slot reset.\n"); | |
12867 | return PCI_ERS_RESULT_DISCONNECT; | |
12868 | } else | |
12869 | phba->intr_mode = intr_mode; | |
12870 | ||
75baf696 | 12871 | /* Take device offline, it will perform cleanup */ |
618a5230 | 12872 | lpfc_offline_prep(phba, LPFC_MBX_WAIT); |
da0436e9 JS |
12873 | lpfc_offline(phba); |
12874 | lpfc_sli_brdrestart(phba); | |
12875 | ||
12876 | /* Log the current active interrupt mode */ | |
12877 | lpfc_log_intr_mode(phba, phba->intr_mode); | |
12878 | ||
12879 | return PCI_ERS_RESULT_RECOVERED; | |
12880 | } | |
12881 | ||
12882 | /** | |
12883 | * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device. | |
12884 | * @pdev: pointer to PCI device | |
12885 | * | |
12886 | * This routine is called from the PCI subsystem for error handling to device | |
12887 | * with SLI-3 interface spec. It is called when kernel error recovery tells | |
12888 | * the lpfc driver that it is ok to resume normal PCI operation after PCI bus | |
12889 | * error recovery. After this call, traffic can start to flow from this device | |
12890 | * again. | |
12891 | */ | |
12892 | static void | |
12893 | lpfc_io_resume_s3(struct pci_dev *pdev) | |
12894 | { | |
12895 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
12896 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
3772a991 | 12897 | |
e2af0d2e | 12898 | /* Bring device online, it will be no-op for non-fatal error resume */ |
da0436e9 JS |
12899 | lpfc_online(phba); |
12900 | } | |
3772a991 | 12901 | |
da0436e9 JS |
12902 | /** |
12903 | * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve | |
12904 | * @phba: pointer to lpfc hba data structure. | |
12905 | * | |
12906 | * returns the number of ELS/CT IOCBs to reserve | |
12907 | **/ | |
12908 | int | |
12909 | lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba) | |
12910 | { | |
12911 | int max_xri = phba->sli4_hba.max_cfg_param.max_xri; | |
12912 | ||
f1126688 JS |
12913 | if (phba->sli_rev == LPFC_SLI_REV4) { |
12914 | if (max_xri <= 100) | |
6a9c52cf | 12915 | return 10; |
f1126688 | 12916 | else if (max_xri <= 256) |
6a9c52cf | 12917 | return 25; |
f1126688 | 12918 | else if (max_xri <= 512) |
6a9c52cf | 12919 | return 50; |
f1126688 | 12920 | else if (max_xri <= 1024) |
6a9c52cf | 12921 | return 100; |
8a9d2e80 | 12922 | else if (max_xri <= 1536) |
6a9c52cf | 12923 | return 150; |
8a9d2e80 JS |
12924 | else if (max_xri <= 2048) |
12925 | return 200; | |
12926 | else | |
12927 | return 250; | |
f1126688 JS |
12928 | } else |
12929 | return 0; | |
3772a991 JS |
12930 | } |
12931 | ||
895427bd JS |
12932 | /** |
12933 | * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve | |
12934 | * @phba: pointer to lpfc hba data structure. | |
12935 | * | |
f358dd0c | 12936 | * returns the number of ELS/CT + NVMET IOCBs to reserve |
895427bd JS |
12937 | **/ |
12938 | int | |
12939 | lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba) | |
12940 | { | |
12941 | int max_xri = lpfc_sli4_get_els_iocb_cnt(phba); | |
12942 | ||
f358dd0c JS |
12943 | if (phba->nvmet_support) |
12944 | max_xri += LPFC_NVMET_BUF_POST; | |
895427bd JS |
12945 | return max_xri; |
12946 | } | |
12947 | ||
12948 | ||
0a5ce731 | 12949 | static int |
1feb8204 JS |
12950 | lpfc_log_write_firmware_error(struct lpfc_hba *phba, uint32_t offset, |
12951 | uint32_t magic_number, uint32_t ftype, uint32_t fid, uint32_t fsize, | |
12952 | const struct firmware *fw) | |
12953 | { | |
0a5ce731 JS |
12954 | int rc; |
12955 | ||
12956 | /* Three cases: (1) FW was not supported on the detected adapter. | |
12957 | * (2) FW update has been locked out administratively. | |
12958 | * (3) Some other error during FW update. | |
12959 | * In each case, an unmaskable message is written to the console | |
12960 | * for admin diagnosis. | |
12961 | */ | |
12962 | if (offset == ADD_STATUS_FW_NOT_SUPPORTED || | |
a72d56b2 | 12963 | (phba->pcidev->device == PCI_DEVICE_ID_LANCER_G6_FC && |
5792a0e8 | 12964 | magic_number != MAGIC_NUMBER_G6) || |
a72d56b2 | 12965 | (phba->pcidev->device == PCI_DEVICE_ID_LANCER_G7_FC && |
5792a0e8 | 12966 | magic_number != MAGIC_NUMBER_G7)) { |
372c187b | 12967 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
0a5ce731 JS |
12968 | "3030 This firmware version is not supported on" |
12969 | " this HBA model. Device:%x Magic:%x Type:%x " | |
12970 | "ID:%x Size %d %zd\n", | |
12971 | phba->pcidev->device, magic_number, ftype, fid, | |
12972 | fsize, fw->size); | |
12973 | rc = -EINVAL; | |
12974 | } else if (offset == ADD_STATUS_FW_DOWNLOAD_HW_DISABLED) { | |
372c187b | 12975 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
0a5ce731 JS |
12976 | "3021 Firmware downloads have been prohibited " |
12977 | "by a system configuration setting on " | |
12978 | "Device:%x Magic:%x Type:%x ID:%x Size %d " | |
12979 | "%zd\n", | |
12980 | phba->pcidev->device, magic_number, ftype, fid, | |
12981 | fsize, fw->size); | |
12982 | rc = -EACCES; | |
12983 | } else { | |
372c187b | 12984 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
0a5ce731 JS |
12985 | "3022 FW Download failed. Add Status x%x " |
12986 | "Device:%x Magic:%x Type:%x ID:%x Size %d " | |
12987 | "%zd\n", | |
12988 | offset, phba->pcidev->device, magic_number, | |
12989 | ftype, fid, fsize, fw->size); | |
12990 | rc = -EIO; | |
12991 | } | |
12992 | return rc; | |
1feb8204 JS |
12993 | } |
12994 | ||
52d52440 JS |
12995 | /** |
12996 | * lpfc_write_firmware - attempt to write a firmware image to the port | |
52d52440 | 12997 | * @fw: pointer to firmware image returned from request_firmware. |
0a5ce731 | 12998 | * @context: pointer to firmware image returned from request_firmware. |
52d52440 | 12999 | * |
52d52440 | 13000 | **/ |
ce396282 JS |
13001 | static void |
13002 | lpfc_write_firmware(const struct firmware *fw, void *context) | |
52d52440 | 13003 | { |
ce396282 | 13004 | struct lpfc_hba *phba = (struct lpfc_hba *)context; |
6b5151fd | 13005 | char fwrev[FW_REV_STR_SIZE]; |
ce396282 | 13006 | struct lpfc_grp_hdr *image; |
52d52440 JS |
13007 | struct list_head dma_buffer_list; |
13008 | int i, rc = 0; | |
13009 | struct lpfc_dmabuf *dmabuf, *next; | |
13010 | uint32_t offset = 0, temp_offset = 0; | |
6b6ef5db | 13011 | uint32_t magic_number, ftype, fid, fsize; |
52d52440 | 13012 | |
c71ab861 | 13013 | /* It can be null in no-wait mode, sanity check */ |
ce396282 JS |
13014 | if (!fw) { |
13015 | rc = -ENXIO; | |
13016 | goto out; | |
13017 | } | |
13018 | image = (struct lpfc_grp_hdr *)fw->data; | |
13019 | ||
6b6ef5db JS |
13020 | magic_number = be32_to_cpu(image->magic_number); |
13021 | ftype = bf_get_be32(lpfc_grp_hdr_file_type, image); | |
1feb8204 | 13022 | fid = bf_get_be32(lpfc_grp_hdr_id, image); |
6b6ef5db JS |
13023 | fsize = be32_to_cpu(image->size); |
13024 | ||
52d52440 | 13025 | INIT_LIST_HEAD(&dma_buffer_list); |
52d52440 | 13026 | lpfc_decode_firmware_rev(phba, fwrev, 1); |
88a2cfbb | 13027 | if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) { |
372c187b | 13028 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
ce396282 | 13029 | "3023 Updating Firmware, Current Version:%s " |
52d52440 | 13030 | "New Version:%s\n", |
88a2cfbb | 13031 | fwrev, image->revision); |
52d52440 JS |
13032 | for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) { |
13033 | dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), | |
13034 | GFP_KERNEL); | |
13035 | if (!dmabuf) { | |
13036 | rc = -ENOMEM; | |
ce396282 | 13037 | goto release_out; |
52d52440 JS |
13038 | } |
13039 | dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, | |
13040 | SLI4_PAGE_SIZE, | |
13041 | &dmabuf->phys, | |
13042 | GFP_KERNEL); | |
13043 | if (!dmabuf->virt) { | |
13044 | kfree(dmabuf); | |
13045 | rc = -ENOMEM; | |
ce396282 | 13046 | goto release_out; |
52d52440 JS |
13047 | } |
13048 | list_add_tail(&dmabuf->list, &dma_buffer_list); | |
13049 | } | |
13050 | while (offset < fw->size) { | |
13051 | temp_offset = offset; | |
13052 | list_for_each_entry(dmabuf, &dma_buffer_list, list) { | |
079b5c91 | 13053 | if (temp_offset + SLI4_PAGE_SIZE > fw->size) { |
52d52440 JS |
13054 | memcpy(dmabuf->virt, |
13055 | fw->data + temp_offset, | |
079b5c91 JS |
13056 | fw->size - temp_offset); |
13057 | temp_offset = fw->size; | |
52d52440 JS |
13058 | break; |
13059 | } | |
52d52440 JS |
13060 | memcpy(dmabuf->virt, fw->data + temp_offset, |
13061 | SLI4_PAGE_SIZE); | |
88a2cfbb | 13062 | temp_offset += SLI4_PAGE_SIZE; |
52d52440 JS |
13063 | } |
13064 | rc = lpfc_wr_object(phba, &dma_buffer_list, | |
13065 | (fw->size - offset), &offset); | |
1feb8204 | 13066 | if (rc) { |
0a5ce731 JS |
13067 | rc = lpfc_log_write_firmware_error(phba, offset, |
13068 | magic_number, | |
13069 | ftype, | |
13070 | fid, | |
13071 | fsize, | |
13072 | fw); | |
ce396282 | 13073 | goto release_out; |
1feb8204 | 13074 | } |
52d52440 JS |
13075 | } |
13076 | rc = offset; | |
1feb8204 | 13077 | } else |
372c187b | 13078 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
1feb8204 JS |
13079 | "3029 Skipped Firmware update, Current " |
13080 | "Version:%s New Version:%s\n", | |
13081 | fwrev, image->revision); | |
ce396282 JS |
13082 | |
13083 | release_out: | |
52d52440 JS |
13084 | list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) { |
13085 | list_del(&dmabuf->list); | |
13086 | dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE, | |
13087 | dmabuf->virt, dmabuf->phys); | |
13088 | kfree(dmabuf); | |
13089 | } | |
ce396282 JS |
13090 | release_firmware(fw); |
13091 | out: | |
0a5ce731 | 13092 | if (rc < 0) |
372c187b | 13093 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
0a5ce731 JS |
13094 | "3062 Firmware update error, status %d.\n", rc); |
13095 | else | |
372c187b | 13096 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
0a5ce731 | 13097 | "3024 Firmware update success: size %d.\n", rc); |
52d52440 JS |
13098 | } |
13099 | ||
c71ab861 JS |
13100 | /** |
13101 | * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade | |
13102 | * @phba: pointer to lpfc hba data structure. | |
fe614acd | 13103 | * @fw_upgrade: which firmware to update. |
c71ab861 JS |
13104 | * |
13105 | * This routine is called to perform Linux generic firmware upgrade on device | |
13106 | * that supports such feature. | |
13107 | **/ | |
13108 | int | |
13109 | lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade) | |
13110 | { | |
13111 | uint8_t file_name[ELX_MODEL_NAME_SIZE]; | |
13112 | int ret; | |
13113 | const struct firmware *fw; | |
13114 | ||
13115 | /* Only supported on SLI4 interface type 2 for now */ | |
27d6ac0a | 13116 | if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) < |
c71ab861 JS |
13117 | LPFC_SLI_INTF_IF_TYPE_2) |
13118 | return -EPERM; | |
13119 | ||
13120 | snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName); | |
13121 | ||
13122 | if (fw_upgrade == INT_FW_UPGRADE) { | |
13123 | ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG, | |
13124 | file_name, &phba->pcidev->dev, | |
13125 | GFP_KERNEL, (void *)phba, | |
13126 | lpfc_write_firmware); | |
13127 | } else if (fw_upgrade == RUN_FW_UPGRADE) { | |
13128 | ret = request_firmware(&fw, file_name, &phba->pcidev->dev); | |
13129 | if (!ret) | |
13130 | lpfc_write_firmware(fw, (void *)phba); | |
13131 | } else { | |
13132 | ret = -EINVAL; | |
13133 | } | |
13134 | ||
13135 | return ret; | |
13136 | } | |
13137 | ||
3772a991 | 13138 | /** |
da0436e9 | 13139 | * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys |
3772a991 JS |
13140 | * @pdev: pointer to PCI device |
13141 | * @pid: pointer to PCI device identifier | |
13142 | * | |
da0436e9 JS |
13143 | * This routine is called from the kernel's PCI subsystem to device with |
13144 | * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is | |
3772a991 | 13145 | * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific |
da0436e9 JS |
13146 | * information of the device and driver to see if the driver state that it |
13147 | * can support this kind of device. If the match is successful, the driver | |
13148 | * core invokes this routine. If this routine determines it can claim the HBA, | |
13149 | * it does all the initialization that it needs to do to handle the HBA | |
13150 | * properly. | |
3772a991 JS |
13151 | * |
13152 | * Return code | |
13153 | * 0 - driver can claim the device | |
13154 | * negative value - driver can not claim the device | |
13155 | **/ | |
6f039790 | 13156 | static int |
da0436e9 | 13157 | lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid) |
3772a991 JS |
13158 | { |
13159 | struct lpfc_hba *phba; | |
13160 | struct lpfc_vport *vport = NULL; | |
6669f9bb | 13161 | struct Scsi_Host *shost = NULL; |
6c621a22 | 13162 | int error; |
3772a991 JS |
13163 | uint32_t cfg_mode, intr_mode; |
13164 | ||
13165 | /* Allocate memory for HBA structure */ | |
13166 | phba = lpfc_hba_alloc(pdev); | |
13167 | if (!phba) | |
13168 | return -ENOMEM; | |
13169 | ||
13170 | /* Perform generic PCI device enabling operation */ | |
13171 | error = lpfc_enable_pci_dev(phba); | |
079b5c91 | 13172 | if (error) |
3772a991 | 13173 | goto out_free_phba; |
3772a991 | 13174 | |
da0436e9 JS |
13175 | /* Set up SLI API function jump table for PCI-device group-1 HBAs */ |
13176 | error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC); | |
3772a991 JS |
13177 | if (error) |
13178 | goto out_disable_pci_dev; | |
13179 | ||
da0436e9 JS |
13180 | /* Set up SLI-4 specific device PCI memory space */ |
13181 | error = lpfc_sli4_pci_mem_setup(phba); | |
3772a991 JS |
13182 | if (error) { |
13183 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
da0436e9 | 13184 | "1410 Failed to set up pci memory space.\n"); |
3772a991 JS |
13185 | goto out_disable_pci_dev; |
13186 | } | |
13187 | ||
da0436e9 JS |
13188 | /* Set up SLI-4 Specific device driver resources */ |
13189 | error = lpfc_sli4_driver_resource_setup(phba); | |
3772a991 JS |
13190 | if (error) { |
13191 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
da0436e9 JS |
13192 | "1412 Failed to set up driver resource.\n"); |
13193 | goto out_unset_pci_mem_s4; | |
3772a991 JS |
13194 | } |
13195 | ||
19ca7609 | 13196 | INIT_LIST_HEAD(&phba->active_rrq_list); |
7d791df7 | 13197 | INIT_LIST_HEAD(&phba->fcf.fcf_pri_list); |
19ca7609 | 13198 | |
3772a991 JS |
13199 | /* Set up common device driver resources */ |
13200 | error = lpfc_setup_driver_resource_phase2(phba); | |
13201 | if (error) { | |
13202 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
da0436e9 | 13203 | "1414 Failed to set up driver resource.\n"); |
6c621a22 | 13204 | goto out_unset_driver_resource_s4; |
3772a991 JS |
13205 | } |
13206 | ||
079b5c91 JS |
13207 | /* Get the default values for Model Name and Description */ |
13208 | lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); | |
13209 | ||
3772a991 | 13210 | /* Now, trying to enable interrupt and bring up the device */ |
5b75da2f | 13211 | cfg_mode = phba->cfg_use_msi; |
5b75da2f | 13212 | |
7b15db32 | 13213 | /* Put device to a known state before enabling interrupt */ |
cdb42bec | 13214 | phba->pport = NULL; |
7b15db32 | 13215 | lpfc_stop_port(phba); |
895427bd | 13216 | |
dcaa2136 JS |
13217 | /* Init cpu_map array */ |
13218 | lpfc_cpu_map_array_init(phba); | |
13219 | ||
13220 | /* Init hba_eq_hdl array */ | |
13221 | lpfc_hba_eq_hdl_array_init(phba); | |
13222 | ||
7b15db32 JS |
13223 | /* Configure and enable interrupt */ |
13224 | intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode); | |
13225 | if (intr_mode == LPFC_INTR_ERROR) { | |
372c187b | 13226 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
7b15db32 JS |
13227 | "0426 Failed to enable interrupt.\n"); |
13228 | error = -ENODEV; | |
cdb42bec | 13229 | goto out_unset_driver_resource; |
7b15db32 JS |
13230 | } |
13231 | /* Default to single EQ for non-MSI-X */ | |
895427bd | 13232 | if (phba->intr_type != MSIX) { |
6a828b0f | 13233 | phba->cfg_irq_chann = 1; |
2d7dbc4c | 13234 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { |
2d7dbc4c JS |
13235 | if (phba->nvmet_support) |
13236 | phba->cfg_nvmet_mrq = 1; | |
13237 | } | |
cdb42bec | 13238 | } |
6a828b0f | 13239 | lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann); |
cdb42bec JS |
13240 | |
13241 | /* Create SCSI host to the physical port */ | |
13242 | error = lpfc_create_shost(phba); | |
13243 | if (error) { | |
13244 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
13245 | "1415 Failed to create scsi host.\n"); | |
13246 | goto out_disable_intr; | |
13247 | } | |
13248 | vport = phba->pport; | |
13249 | shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */ | |
13250 | ||
13251 | /* Configure sysfs attributes */ | |
13252 | error = lpfc_alloc_sysfs_attr(vport); | |
13253 | if (error) { | |
13254 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
13255 | "1416 Failed to allocate sysfs attr\n"); | |
13256 | goto out_destroy_shost; | |
895427bd JS |
13257 | } |
13258 | ||
7b15db32 JS |
13259 | /* Set up SLI-4 HBA */ |
13260 | if (lpfc_sli4_hba_setup(phba)) { | |
372c187b | 13261 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
7b15db32 JS |
13262 | "1421 Failed to set up hba\n"); |
13263 | error = -ENODEV; | |
cdb42bec | 13264 | goto out_free_sysfs_attr; |
98c9ea5c | 13265 | } |
858c9f6c | 13266 | |
7b15db32 JS |
13267 | /* Log the current active interrupt mode */ |
13268 | phba->intr_mode = intr_mode; | |
13269 | lpfc_log_intr_mode(phba, intr_mode); | |
13270 | ||
3772a991 JS |
13271 | /* Perform post initialization setup */ |
13272 | lpfc_post_init_setup(phba); | |
dea3101e | 13273 | |
01649561 JS |
13274 | /* NVME support in FW earlier in the driver load corrects the |
13275 | * FC4 type making a check for nvme_support unnecessary. | |
13276 | */ | |
0794d601 JS |
13277 | if (phba->nvmet_support == 0) { |
13278 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
13279 | /* Create NVME binding with nvme_fc_transport. This | |
13280 | * ensures the vport is initialized. If the localport | |
13281 | * create fails, it should not unload the driver to | |
13282 | * support field issues. | |
13283 | */ | |
13284 | error = lpfc_nvme_create_localport(vport); | |
13285 | if (error) { | |
372c187b | 13286 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
0794d601 JS |
13287 | "6004 NVME registration " |
13288 | "failed, error x%x\n", | |
13289 | error); | |
13290 | } | |
01649561 JS |
13291 | } |
13292 | } | |
895427bd | 13293 | |
c71ab861 JS |
13294 | /* check for firmware upgrade or downgrade */ |
13295 | if (phba->cfg_request_firmware_upgrade) | |
db6f1c2f | 13296 | lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE); |
52d52440 | 13297 | |
1c6834a7 JS |
13298 | /* Check if there are static vports to be created. */ |
13299 | lpfc_create_static_vport(phba); | |
d2cc9bcd JS |
13300 | |
13301 | /* Enable RAS FW log support */ | |
13302 | lpfc_sli4_ras_setup(phba); | |
13303 | ||
93a4d6f4 | 13304 | INIT_LIST_HEAD(&phba->poll_list); |
f861f596 | 13305 | timer_setup(&phba->cpuhp_poll_timer, lpfc_sli4_poll_hbtimer, 0); |
93a4d6f4 JS |
13306 | cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state, &phba->cpuhp); |
13307 | ||
dea3101e | 13308 | return 0; |
13309 | ||
5b75da2f JS |
13310 | out_free_sysfs_attr: |
13311 | lpfc_free_sysfs_attr(vport); | |
3772a991 JS |
13312 | out_destroy_shost: |
13313 | lpfc_destroy_shost(phba); | |
cdb42bec JS |
13314 | out_disable_intr: |
13315 | lpfc_sli4_disable_intr(phba); | |
3772a991 JS |
13316 | out_unset_driver_resource: |
13317 | lpfc_unset_driver_resource_phase2(phba); | |
da0436e9 JS |
13318 | out_unset_driver_resource_s4: |
13319 | lpfc_sli4_driver_resource_unset(phba); | |
13320 | out_unset_pci_mem_s4: | |
13321 | lpfc_sli4_pci_mem_unset(phba); | |
3772a991 JS |
13322 | out_disable_pci_dev: |
13323 | lpfc_disable_pci_dev(phba); | |
6669f9bb JS |
13324 | if (shost) |
13325 | scsi_host_put(shost); | |
2e0fef85 | 13326 | out_free_phba: |
3772a991 | 13327 | lpfc_hba_free(phba); |
dea3101e | 13328 | return error; |
13329 | } | |
13330 | ||
e59058c4 | 13331 | /** |
da0436e9 | 13332 | * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem |
e59058c4 JS |
13333 | * @pdev: pointer to PCI device |
13334 | * | |
da0436e9 JS |
13335 | * This routine is called from the kernel's PCI subsystem to device with |
13336 | * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is | |
3772a991 JS |
13337 | * removed from PCI bus, it performs all the necessary cleanup for the HBA |
13338 | * device to be removed from the PCI subsystem properly. | |
e59058c4 | 13339 | **/ |
6f039790 | 13340 | static void |
da0436e9 | 13341 | lpfc_pci_remove_one_s4(struct pci_dev *pdev) |
dea3101e | 13342 | { |
da0436e9 | 13343 | struct Scsi_Host *shost = pci_get_drvdata(pdev); |
2e0fef85 | 13344 | struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; |
eada272d | 13345 | struct lpfc_vport **vports; |
da0436e9 | 13346 | struct lpfc_hba *phba = vport->phba; |
eada272d | 13347 | int i; |
8a4df120 | 13348 | |
da0436e9 | 13349 | /* Mark the device unloading flag */ |
549e55cd | 13350 | spin_lock_irq(&phba->hbalock); |
51ef4c26 | 13351 | vport->load_flag |= FC_UNLOADING; |
549e55cd | 13352 | spin_unlock_irq(&phba->hbalock); |
2e0fef85 | 13353 | |
858c9f6c JS |
13354 | lpfc_free_sysfs_attr(vport); |
13355 | ||
eada272d JS |
13356 | /* Release all the vports against this physical port */ |
13357 | vports = lpfc_create_vport_work_array(phba); | |
13358 | if (vports != NULL) | |
587a37f6 JS |
13359 | for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { |
13360 | if (vports[i]->port_type == LPFC_PHYSICAL_PORT) | |
13361 | continue; | |
eada272d | 13362 | fc_vport_terminate(vports[i]->fc_vport); |
587a37f6 | 13363 | } |
eada272d JS |
13364 | lpfc_destroy_vport_work_array(phba, vports); |
13365 | ||
95f0ef8a | 13366 | /* Remove FC host with the physical port */ |
858c9f6c | 13367 | fc_remove_host(shost); |
e9b11083 | 13368 | scsi_remove_host(shost); |
da0436e9 | 13369 | |
d613b6a7 JS |
13370 | /* Perform ndlp cleanup on the physical port. The nvme and nvmet |
13371 | * localports are destroyed after to cleanup all transport memory. | |
895427bd | 13372 | */ |
87af33fe | 13373 | lpfc_cleanup(vport); |
d613b6a7 JS |
13374 | lpfc_nvmet_destroy_targetport(phba); |
13375 | lpfc_nvme_destroy_localport(vport); | |
87af33fe | 13376 | |
c490850a JS |
13377 | /* De-allocate multi-XRI pools */ |
13378 | if (phba->cfg_xri_rebalancing) | |
13379 | lpfc_destroy_multixri_pools(phba); | |
13380 | ||
281d6190 JS |
13381 | /* |
13382 | * Bring down the SLI Layer. This step disables all interrupts, | |
13383 | * clears the rings, discards all mailbox commands, and resets | |
13384 | * the HBA FCoE function. | |
13385 | */ | |
13386 | lpfc_debugfs_terminate(vport); | |
a257bf90 | 13387 | |
1901762f | 13388 | lpfc_stop_hba_timers(phba); |
523128e5 | 13389 | spin_lock_irq(&phba->port_list_lock); |
858c9f6c | 13390 | list_del_init(&vport->listentry); |
523128e5 | 13391 | spin_unlock_irq(&phba->port_list_lock); |
858c9f6c | 13392 | |
3677a3a7 | 13393 | /* Perform scsi free before driver resource_unset since scsi |
da0436e9 | 13394 | * buffers are released to their corresponding pools here. |
2e0fef85 | 13395 | */ |
5e5b511d | 13396 | lpfc_io_free(phba); |
01649561 | 13397 | lpfc_free_iocb_list(phba); |
5e5b511d | 13398 | lpfc_sli4_hba_unset(phba); |
67d12733 | 13399 | |
0cdb84ec | 13400 | lpfc_unset_driver_resource_phase2(phba); |
da0436e9 | 13401 | lpfc_sli4_driver_resource_unset(phba); |
ed957684 | 13402 | |
da0436e9 JS |
13403 | /* Unmap adapter Control and Doorbell registers */ |
13404 | lpfc_sli4_pci_mem_unset(phba); | |
2e0fef85 | 13405 | |
da0436e9 JS |
13406 | /* Release PCI resources and disable device's PCI function */ |
13407 | scsi_host_put(shost); | |
13408 | lpfc_disable_pci_dev(phba); | |
2e0fef85 | 13409 | |
da0436e9 | 13410 | /* Finally, free the driver's device data structure */ |
3772a991 | 13411 | lpfc_hba_free(phba); |
2e0fef85 | 13412 | |
da0436e9 | 13413 | return; |
dea3101e | 13414 | } |
13415 | ||
3a55b532 | 13416 | /** |
da0436e9 | 13417 | * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt |
ef6fa16b | 13418 | * @dev_d: pointer to device |
3a55b532 | 13419 | * |
da0436e9 JS |
13420 | * This routine is called from the kernel's PCI subsystem to support system |
13421 | * Power Management (PM) to device with SLI-4 interface spec. When PM invokes | |
13422 | * this method, it quiesces the device by stopping the driver's worker | |
13423 | * thread for the device, turning off device's interrupt and DMA, and bring | |
13424 | * the device offline. Note that as the driver implements the minimum PM | |
13425 | * requirements to a power-aware driver's PM support for suspend/resume -- all | |
13426 | * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend() | |
13427 | * method call will be treated as SUSPEND and the driver will fully | |
13428 | * reinitialize its device during resume() method call, the driver will set | |
13429 | * device to PCI_D3hot state in PCI config space instead of setting it | |
3772a991 | 13430 | * according to the @msg provided by the PM. |
3a55b532 JS |
13431 | * |
13432 | * Return code | |
3772a991 JS |
13433 | * 0 - driver suspended the device |
13434 | * Error otherwise | |
3a55b532 | 13435 | **/ |
ef6fa16b VG |
13436 | static int __maybe_unused |
13437 | lpfc_pci_suspend_one_s4(struct device *dev_d) | |
3a55b532 | 13438 | { |
ef6fa16b | 13439 | struct Scsi_Host *shost = dev_get_drvdata(dev_d); |
3a55b532 JS |
13440 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; |
13441 | ||
13442 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
75baf696 | 13443 | "2843 PCI device Power Management suspend.\n"); |
3a55b532 JS |
13444 | |
13445 | /* Bring down the device */ | |
618a5230 | 13446 | lpfc_offline_prep(phba, LPFC_MBX_WAIT); |
3a55b532 JS |
13447 | lpfc_offline(phba); |
13448 | kthread_stop(phba->worker_thread); | |
13449 | ||
13450 | /* Disable interrupt from device */ | |
da0436e9 | 13451 | lpfc_sli4_disable_intr(phba); |
5350d872 | 13452 | lpfc_sli4_queue_destroy(phba); |
3a55b532 | 13453 | |
3a55b532 JS |
13454 | return 0; |
13455 | } | |
13456 | ||
13457 | /** | |
da0436e9 | 13458 | * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt |
ef6fa16b | 13459 | * @dev_d: pointer to device |
3a55b532 | 13460 | * |
da0436e9 JS |
13461 | * This routine is called from the kernel's PCI subsystem to support system |
13462 | * Power Management (PM) to device with SLI-4 interface spac. When PM invokes | |
13463 | * this method, it restores the device's PCI config space state and fully | |
13464 | * reinitializes the device and brings it online. Note that as the driver | |
13465 | * implements the minimum PM requirements to a power-aware driver's PM for | |
13466 | * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE) | |
13467 | * to the suspend() method call will be treated as SUSPEND and the driver | |
13468 | * will fully reinitialize its device during resume() method call, the device | |
13469 | * will be set to PCI_D0 directly in PCI config space before restoring the | |
13470 | * state. | |
3a55b532 JS |
13471 | * |
13472 | * Return code | |
3772a991 JS |
13473 | * 0 - driver suspended the device |
13474 | * Error otherwise | |
3a55b532 | 13475 | **/ |
ef6fa16b VG |
13476 | static int __maybe_unused |
13477 | lpfc_pci_resume_one_s4(struct device *dev_d) | |
3a55b532 | 13478 | { |
ef6fa16b | 13479 | struct Scsi_Host *shost = dev_get_drvdata(dev_d); |
3a55b532 | 13480 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; |
5b75da2f | 13481 | uint32_t intr_mode; |
3a55b532 JS |
13482 | int error; |
13483 | ||
13484 | lpfc_printf_log(phba, KERN_INFO, LOG_INIT, | |
da0436e9 | 13485 | "0292 PCI device Power Management resume.\n"); |
3a55b532 | 13486 | |
da0436e9 | 13487 | /* Startup the kernel thread for this host adapter. */ |
3a55b532 JS |
13488 | phba->worker_thread = kthread_run(lpfc_do_work, phba, |
13489 | "lpfc_worker_%d", phba->brd_no); | |
13490 | if (IS_ERR(phba->worker_thread)) { | |
13491 | error = PTR_ERR(phba->worker_thread); | |
13492 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
da0436e9 | 13493 | "0293 PM resume failed to start worker " |
3a55b532 JS |
13494 | "thread: error=x%x.\n", error); |
13495 | return error; | |
13496 | } | |
13497 | ||
5b75da2f | 13498 | /* Configure and enable interrupt */ |
da0436e9 | 13499 | intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); |
5b75da2f | 13500 | if (intr_mode == LPFC_INTR_ERROR) { |
372c187b | 13501 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
da0436e9 | 13502 | "0294 PM resume Failed to enable interrupt\n"); |
5b75da2f JS |
13503 | return -EIO; |
13504 | } else | |
13505 | phba->intr_mode = intr_mode; | |
3a55b532 JS |
13506 | |
13507 | /* Restart HBA and bring it online */ | |
13508 | lpfc_sli_brdrestart(phba); | |
13509 | lpfc_online(phba); | |
13510 | ||
5b75da2f JS |
13511 | /* Log the current active interrupt mode */ |
13512 | lpfc_log_intr_mode(phba, phba->intr_mode); | |
13513 | ||
3a55b532 JS |
13514 | return 0; |
13515 | } | |
13516 | ||
75baf696 JS |
13517 | /** |
13518 | * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover | |
13519 | * @phba: pointer to lpfc hba data structure. | |
13520 | * | |
13521 | * This routine is called to prepare the SLI4 device for PCI slot recover. It | |
13522 | * aborts all the outstanding SCSI I/Os to the pci device. | |
13523 | **/ | |
13524 | static void | |
13525 | lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba) | |
13526 | { | |
372c187b | 13527 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
75baf696 JS |
13528 | "2828 PCI channel I/O abort preparing for recovery\n"); |
13529 | /* | |
13530 | * There may be errored I/Os through HBA, abort all I/Os on txcmplq | |
13531 | * and let the SCSI mid-layer to retry them to recover. | |
13532 | */ | |
db55fba8 | 13533 | lpfc_sli_abort_fcp_rings(phba); |
75baf696 JS |
13534 | } |
13535 | ||
13536 | /** | |
13537 | * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset | |
13538 | * @phba: pointer to lpfc hba data structure. | |
13539 | * | |
13540 | * This routine is called to prepare the SLI4 device for PCI slot reset. It | |
13541 | * disables the device interrupt and pci device, and aborts the internal FCP | |
13542 | * pending I/Os. | |
13543 | **/ | |
13544 | static void | |
13545 | lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba) | |
13546 | { | |
372c187b | 13547 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
75baf696 JS |
13548 | "2826 PCI channel disable preparing for reset\n"); |
13549 | ||
13550 | /* Block any management I/Os to the device */ | |
618a5230 | 13551 | lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT); |
75baf696 JS |
13552 | |
13553 | /* Block all SCSI devices' I/Os on the host */ | |
13554 | lpfc_scsi_dev_block(phba); | |
13555 | ||
c00f62e6 JS |
13556 | /* Flush all driver's outstanding I/Os as we are to reset */ |
13557 | lpfc_sli_flush_io_rings(phba); | |
c3725bdc | 13558 | |
75baf696 JS |
13559 | /* stop all timers */ |
13560 | lpfc_stop_hba_timers(phba); | |
13561 | ||
13562 | /* Disable interrupt and pci device */ | |
13563 | lpfc_sli4_disable_intr(phba); | |
5350d872 | 13564 | lpfc_sli4_queue_destroy(phba); |
75baf696 | 13565 | pci_disable_device(phba->pcidev); |
75baf696 JS |
13566 | } |
13567 | ||
13568 | /** | |
13569 | * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable | |
13570 | * @phba: pointer to lpfc hba data structure. | |
13571 | * | |
13572 | * This routine is called to prepare the SLI4 device for PCI slot permanently | |
13573 | * disabling. It blocks the SCSI transport layer traffic and flushes the FCP | |
13574 | * pending I/Os. | |
13575 | **/ | |
13576 | static void | |
13577 | lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba) | |
13578 | { | |
372c187b | 13579 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
75baf696 JS |
13580 | "2827 PCI channel permanent disable for failure\n"); |
13581 | ||
13582 | /* Block all SCSI devices' I/Os on the host */ | |
13583 | lpfc_scsi_dev_block(phba); | |
13584 | ||
13585 | /* stop all timers */ | |
13586 | lpfc_stop_hba_timers(phba); | |
13587 | ||
c00f62e6 JS |
13588 | /* Clean up all driver's outstanding I/Os */ |
13589 | lpfc_sli_flush_io_rings(phba); | |
75baf696 JS |
13590 | } |
13591 | ||
8d63f375 | 13592 | /** |
da0436e9 | 13593 | * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device |
e59058c4 JS |
13594 | * @pdev: pointer to PCI device. |
13595 | * @state: the current PCI connection state. | |
8d63f375 | 13596 | * |
da0436e9 JS |
13597 | * This routine is called from the PCI subsystem for error handling to device |
13598 | * with SLI-4 interface spec. This function is called by the PCI subsystem | |
13599 | * after a PCI bus error affecting this device has been detected. When this | |
13600 | * function is invoked, it will need to stop all the I/Os and interrupt(s) | |
13601 | * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET | |
13602 | * for the PCI subsystem to perform proper recovery as desired. | |
e59058c4 JS |
13603 | * |
13604 | * Return codes | |
3772a991 JS |
13605 | * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery |
13606 | * PCI_ERS_RESULT_DISCONNECT - device could not be recovered | |
e59058c4 | 13607 | **/ |
3772a991 | 13608 | static pci_ers_result_t |
da0436e9 | 13609 | lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state) |
8d63f375 | 13610 | { |
75baf696 JS |
13611 | struct Scsi_Host *shost = pci_get_drvdata(pdev); |
13612 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
13613 | ||
13614 | switch (state) { | |
13615 | case pci_channel_io_normal: | |
13616 | /* Non-fatal error, prepare for recovery */ | |
13617 | lpfc_sli4_prep_dev_for_recover(phba); | |
13618 | return PCI_ERS_RESULT_CAN_RECOVER; | |
13619 | case pci_channel_io_frozen: | |
13620 | /* Fatal error, prepare for slot reset */ | |
13621 | lpfc_sli4_prep_dev_for_reset(phba); | |
13622 | return PCI_ERS_RESULT_NEED_RESET; | |
13623 | case pci_channel_io_perm_failure: | |
13624 | /* Permanent failure, prepare for device down */ | |
13625 | lpfc_sli4_prep_dev_for_perm_failure(phba); | |
13626 | return PCI_ERS_RESULT_DISCONNECT; | |
13627 | default: | |
13628 | /* Unknown state, prepare and request slot reset */ | |
372c187b | 13629 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
75baf696 JS |
13630 | "2825 Unknown PCI error state: x%x\n", state); |
13631 | lpfc_sli4_prep_dev_for_reset(phba); | |
13632 | return PCI_ERS_RESULT_NEED_RESET; | |
13633 | } | |
8d63f375 LV |
13634 | } |
13635 | ||
13636 | /** | |
da0436e9 | 13637 | * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch |
e59058c4 JS |
13638 | * @pdev: pointer to PCI device. |
13639 | * | |
da0436e9 JS |
13640 | * This routine is called from the PCI subsystem for error handling to device |
13641 | * with SLI-4 interface spec. It is called after PCI bus has been reset to | |
13642 | * restart the PCI card from scratch, as if from a cold-boot. During the | |
13643 | * PCI subsystem error recovery, after the driver returns | |
3772a991 | 13644 | * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error |
da0436e9 JS |
13645 | * recovery and then call this routine before calling the .resume method to |
13646 | * recover the device. This function will initialize the HBA device, enable | |
13647 | * the interrupt, but it will just put the HBA to offline state without | |
13648 | * passing any I/O traffic. | |
8d63f375 | 13649 | * |
e59058c4 | 13650 | * Return codes |
3772a991 JS |
13651 | * PCI_ERS_RESULT_RECOVERED - the device has been recovered |
13652 | * PCI_ERS_RESULT_DISCONNECT - device could not be recovered | |
8d63f375 | 13653 | */ |
3772a991 | 13654 | static pci_ers_result_t |
da0436e9 | 13655 | lpfc_io_slot_reset_s4(struct pci_dev *pdev) |
8d63f375 | 13656 | { |
75baf696 JS |
13657 | struct Scsi_Host *shost = pci_get_drvdata(pdev); |
13658 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
13659 | struct lpfc_sli *psli = &phba->sli; | |
13660 | uint32_t intr_mode; | |
13661 | ||
13662 | dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n"); | |
13663 | if (pci_enable_device_mem(pdev)) { | |
13664 | printk(KERN_ERR "lpfc: Cannot re-enable " | |
13665 | "PCI device after reset.\n"); | |
13666 | return PCI_ERS_RESULT_DISCONNECT; | |
13667 | } | |
13668 | ||
13669 | pci_restore_state(pdev); | |
0a96e975 JS |
13670 | |
13671 | /* | |
13672 | * As the new kernel behavior of pci_restore_state() API call clears | |
13673 | * device saved_state flag, need to save the restored state again. | |
13674 | */ | |
13675 | pci_save_state(pdev); | |
13676 | ||
75baf696 JS |
13677 | if (pdev->is_busmaster) |
13678 | pci_set_master(pdev); | |
13679 | ||
13680 | spin_lock_irq(&phba->hbalock); | |
13681 | psli->sli_flag &= ~LPFC_SLI_ACTIVE; | |
13682 | spin_unlock_irq(&phba->hbalock); | |
13683 | ||
13684 | /* Configure and enable interrupt */ | |
13685 | intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); | |
13686 | if (intr_mode == LPFC_INTR_ERROR) { | |
372c187b | 13687 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
75baf696 JS |
13688 | "2824 Cannot re-enable interrupt after " |
13689 | "slot reset.\n"); | |
13690 | return PCI_ERS_RESULT_DISCONNECT; | |
13691 | } else | |
13692 | phba->intr_mode = intr_mode; | |
13693 | ||
13694 | /* Log the current active interrupt mode */ | |
13695 | lpfc_log_intr_mode(phba, phba->intr_mode); | |
13696 | ||
8d63f375 LV |
13697 | return PCI_ERS_RESULT_RECOVERED; |
13698 | } | |
13699 | ||
13700 | /** | |
da0436e9 | 13701 | * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device |
e59058c4 | 13702 | * @pdev: pointer to PCI device |
8d63f375 | 13703 | * |
3772a991 | 13704 | * This routine is called from the PCI subsystem for error handling to device |
da0436e9 | 13705 | * with SLI-4 interface spec. It is called when kernel error recovery tells |
3772a991 JS |
13706 | * the lpfc driver that it is ok to resume normal PCI operation after PCI bus |
13707 | * error recovery. After this call, traffic can start to flow from this device | |
13708 | * again. | |
da0436e9 | 13709 | **/ |
3772a991 | 13710 | static void |
da0436e9 | 13711 | lpfc_io_resume_s4(struct pci_dev *pdev) |
8d63f375 | 13712 | { |
75baf696 JS |
13713 | struct Scsi_Host *shost = pci_get_drvdata(pdev); |
13714 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
13715 | ||
13716 | /* | |
13717 | * In case of slot reset, as function reset is performed through | |
13718 | * mailbox command which needs DMA to be enabled, this operation | |
13719 | * has to be moved to the io resume phase. Taking device offline | |
13720 | * will perform the necessary cleanup. | |
13721 | */ | |
13722 | if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) { | |
13723 | /* Perform device reset */ | |
618a5230 | 13724 | lpfc_offline_prep(phba, LPFC_MBX_WAIT); |
75baf696 JS |
13725 | lpfc_offline(phba); |
13726 | lpfc_sli_brdrestart(phba); | |
13727 | /* Bring the device back online */ | |
13728 | lpfc_online(phba); | |
13729 | } | |
8d63f375 LV |
13730 | } |
13731 | ||
3772a991 JS |
13732 | /** |
13733 | * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem | |
13734 | * @pdev: pointer to PCI device | |
13735 | * @pid: pointer to PCI device identifier | |
13736 | * | |
13737 | * This routine is to be registered to the kernel's PCI subsystem. When an | |
13738 | * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks | |
13739 | * at PCI device-specific information of the device and driver to see if the | |
13740 | * driver state that it can support this kind of device. If the match is | |
13741 | * successful, the driver core invokes this routine. This routine dispatches | |
13742 | * the action to the proper SLI-3 or SLI-4 device probing routine, which will | |
13743 | * do all the initialization that it needs to do to handle the HBA device | |
13744 | * properly. | |
13745 | * | |
13746 | * Return code | |
13747 | * 0 - driver can claim the device | |
13748 | * negative value - driver can not claim the device | |
13749 | **/ | |
6f039790 | 13750 | static int |
3772a991 JS |
13751 | lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid) |
13752 | { | |
13753 | int rc; | |
8fa38513 | 13754 | struct lpfc_sli_intf intf; |
3772a991 | 13755 | |
28baac74 | 13756 | if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0)) |
3772a991 JS |
13757 | return -ENODEV; |
13758 | ||
8fa38513 | 13759 | if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) && |
28baac74 | 13760 | (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4)) |
da0436e9 | 13761 | rc = lpfc_pci_probe_one_s4(pdev, pid); |
8fa38513 | 13762 | else |
3772a991 | 13763 | rc = lpfc_pci_probe_one_s3(pdev, pid); |
8fa38513 | 13764 | |
3772a991 JS |
13765 | return rc; |
13766 | } | |
13767 | ||
13768 | /** | |
13769 | * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem | |
13770 | * @pdev: pointer to PCI device | |
13771 | * | |
13772 | * This routine is to be registered to the kernel's PCI subsystem. When an | |
13773 | * Emulex HBA is removed from PCI bus, the driver core invokes this routine. | |
13774 | * This routine dispatches the action to the proper SLI-3 or SLI-4 device | |
13775 | * remove routine, which will perform all the necessary cleanup for the | |
13776 | * device to be removed from the PCI subsystem properly. | |
13777 | **/ | |
6f039790 | 13778 | static void |
3772a991 JS |
13779 | lpfc_pci_remove_one(struct pci_dev *pdev) |
13780 | { | |
13781 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
13782 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
13783 | ||
13784 | switch (phba->pci_dev_grp) { | |
13785 | case LPFC_PCI_DEV_LP: | |
13786 | lpfc_pci_remove_one_s3(pdev); | |
13787 | break; | |
da0436e9 JS |
13788 | case LPFC_PCI_DEV_OC: |
13789 | lpfc_pci_remove_one_s4(pdev); | |
13790 | break; | |
3772a991 | 13791 | default: |
372c187b | 13792 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
3772a991 JS |
13793 | "1424 Invalid PCI device group: 0x%x\n", |
13794 | phba->pci_dev_grp); | |
13795 | break; | |
13796 | } | |
13797 | return; | |
13798 | } | |
13799 | ||
13800 | /** | |
13801 | * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management | |
ef6fa16b | 13802 | * @dev: pointer to device |
3772a991 JS |
13803 | * |
13804 | * This routine is to be registered to the kernel's PCI subsystem to support | |
13805 | * system Power Management (PM). When PM invokes this method, it dispatches | |
13806 | * the action to the proper SLI-3 or SLI-4 device suspend routine, which will | |
13807 | * suspend the device. | |
13808 | * | |
13809 | * Return code | |
13810 | * 0 - driver suspended the device | |
13811 | * Error otherwise | |
13812 | **/ | |
ef6fa16b VG |
13813 | static int __maybe_unused |
13814 | lpfc_pci_suspend_one(struct device *dev) | |
3772a991 | 13815 | { |
ef6fa16b | 13816 | struct Scsi_Host *shost = dev_get_drvdata(dev); |
3772a991 JS |
13817 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; |
13818 | int rc = -ENODEV; | |
13819 | ||
13820 | switch (phba->pci_dev_grp) { | |
13821 | case LPFC_PCI_DEV_LP: | |
ef6fa16b | 13822 | rc = lpfc_pci_suspend_one_s3(dev); |
3772a991 | 13823 | break; |
da0436e9 | 13824 | case LPFC_PCI_DEV_OC: |
ef6fa16b | 13825 | rc = lpfc_pci_suspend_one_s4(dev); |
da0436e9 | 13826 | break; |
3772a991 | 13827 | default: |
372c187b | 13828 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
3772a991 JS |
13829 | "1425 Invalid PCI device group: 0x%x\n", |
13830 | phba->pci_dev_grp); | |
13831 | break; | |
13832 | } | |
13833 | return rc; | |
13834 | } | |
13835 | ||
13836 | /** | |
13837 | * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management | |
ef6fa16b | 13838 | * @dev: pointer to device |
3772a991 JS |
13839 | * |
13840 | * This routine is to be registered to the kernel's PCI subsystem to support | |
13841 | * system Power Management (PM). When PM invokes this method, it dispatches | |
13842 | * the action to the proper SLI-3 or SLI-4 device resume routine, which will | |
13843 | * resume the device. | |
13844 | * | |
13845 | * Return code | |
13846 | * 0 - driver suspended the device | |
13847 | * Error otherwise | |
13848 | **/ | |
ef6fa16b VG |
13849 | static int __maybe_unused |
13850 | lpfc_pci_resume_one(struct device *dev) | |
3772a991 | 13851 | { |
ef6fa16b | 13852 | struct Scsi_Host *shost = dev_get_drvdata(dev); |
3772a991 JS |
13853 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; |
13854 | int rc = -ENODEV; | |
13855 | ||
13856 | switch (phba->pci_dev_grp) { | |
13857 | case LPFC_PCI_DEV_LP: | |
ef6fa16b | 13858 | rc = lpfc_pci_resume_one_s3(dev); |
3772a991 | 13859 | break; |
da0436e9 | 13860 | case LPFC_PCI_DEV_OC: |
ef6fa16b | 13861 | rc = lpfc_pci_resume_one_s4(dev); |
da0436e9 | 13862 | break; |
3772a991 | 13863 | default: |
372c187b | 13864 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
3772a991 JS |
13865 | "1426 Invalid PCI device group: 0x%x\n", |
13866 | phba->pci_dev_grp); | |
13867 | break; | |
13868 | } | |
13869 | return rc; | |
13870 | } | |
13871 | ||
13872 | /** | |
13873 | * lpfc_io_error_detected - lpfc method for handling PCI I/O error | |
13874 | * @pdev: pointer to PCI device. | |
13875 | * @state: the current PCI connection state. | |
13876 | * | |
13877 | * This routine is registered to the PCI subsystem for error handling. This | |
13878 | * function is called by the PCI subsystem after a PCI bus error affecting | |
13879 | * this device has been detected. When this routine is invoked, it dispatches | |
13880 | * the action to the proper SLI-3 or SLI-4 device error detected handling | |
13881 | * routine, which will perform the proper error detected operation. | |
13882 | * | |
13883 | * Return codes | |
13884 | * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery | |
13885 | * PCI_ERS_RESULT_DISCONNECT - device could not be recovered | |
13886 | **/ | |
13887 | static pci_ers_result_t | |
13888 | lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) | |
13889 | { | |
13890 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
13891 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
13892 | pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT; | |
13893 | ||
13894 | switch (phba->pci_dev_grp) { | |
13895 | case LPFC_PCI_DEV_LP: | |
13896 | rc = lpfc_io_error_detected_s3(pdev, state); | |
13897 | break; | |
da0436e9 JS |
13898 | case LPFC_PCI_DEV_OC: |
13899 | rc = lpfc_io_error_detected_s4(pdev, state); | |
13900 | break; | |
3772a991 | 13901 | default: |
372c187b | 13902 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
3772a991 JS |
13903 | "1427 Invalid PCI device group: 0x%x\n", |
13904 | phba->pci_dev_grp); | |
13905 | break; | |
13906 | } | |
13907 | return rc; | |
13908 | } | |
13909 | ||
13910 | /** | |
13911 | * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch | |
13912 | * @pdev: pointer to PCI device. | |
13913 | * | |
13914 | * This routine is registered to the PCI subsystem for error handling. This | |
13915 | * function is called after PCI bus has been reset to restart the PCI card | |
13916 | * from scratch, as if from a cold-boot. When this routine is invoked, it | |
13917 | * dispatches the action to the proper SLI-3 or SLI-4 device reset handling | |
13918 | * routine, which will perform the proper device reset. | |
13919 | * | |
13920 | * Return codes | |
13921 | * PCI_ERS_RESULT_RECOVERED - the device has been recovered | |
13922 | * PCI_ERS_RESULT_DISCONNECT - device could not be recovered | |
13923 | **/ | |
13924 | static pci_ers_result_t | |
13925 | lpfc_io_slot_reset(struct pci_dev *pdev) | |
13926 | { | |
13927 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
13928 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
13929 | pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT; | |
13930 | ||
13931 | switch (phba->pci_dev_grp) { | |
13932 | case LPFC_PCI_DEV_LP: | |
13933 | rc = lpfc_io_slot_reset_s3(pdev); | |
13934 | break; | |
da0436e9 JS |
13935 | case LPFC_PCI_DEV_OC: |
13936 | rc = lpfc_io_slot_reset_s4(pdev); | |
13937 | break; | |
3772a991 | 13938 | default: |
372c187b | 13939 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
3772a991 JS |
13940 | "1428 Invalid PCI device group: 0x%x\n", |
13941 | phba->pci_dev_grp); | |
13942 | break; | |
13943 | } | |
13944 | return rc; | |
13945 | } | |
13946 | ||
13947 | /** | |
13948 | * lpfc_io_resume - lpfc method for resuming PCI I/O operation | |
13949 | * @pdev: pointer to PCI device | |
13950 | * | |
13951 | * This routine is registered to the PCI subsystem for error handling. It | |
13952 | * is called when kernel error recovery tells the lpfc driver that it is | |
13953 | * OK to resume normal PCI operation after PCI bus error recovery. When | |
13954 | * this routine is invoked, it dispatches the action to the proper SLI-3 | |
13955 | * or SLI-4 device io_resume routine, which will resume the device operation. | |
13956 | **/ | |
13957 | static void | |
13958 | lpfc_io_resume(struct pci_dev *pdev) | |
13959 | { | |
13960 | struct Scsi_Host *shost = pci_get_drvdata(pdev); | |
13961 | struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; | |
13962 | ||
13963 | switch (phba->pci_dev_grp) { | |
13964 | case LPFC_PCI_DEV_LP: | |
13965 | lpfc_io_resume_s3(pdev); | |
13966 | break; | |
da0436e9 JS |
13967 | case LPFC_PCI_DEV_OC: |
13968 | lpfc_io_resume_s4(pdev); | |
13969 | break; | |
3772a991 | 13970 | default: |
372c187b | 13971 | lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, |
3772a991 JS |
13972 | "1429 Invalid PCI device group: 0x%x\n", |
13973 | phba->pci_dev_grp); | |
13974 | break; | |
13975 | } | |
13976 | return; | |
13977 | } | |
13978 | ||
1ba981fd JS |
13979 | /** |
13980 | * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter | |
13981 | * @phba: pointer to lpfc hba data structure. | |
13982 | * | |
13983 | * This routine checks to see if OAS is supported for this adapter. If | |
13984 | * supported, the configure Flash Optimized Fabric flag is set. Otherwise, | |
13985 | * the enable oas flag is cleared and the pool created for OAS device data | |
13986 | * is destroyed. | |
13987 | * | |
13988 | **/ | |
c7092975 | 13989 | static void |
1ba981fd JS |
13990 | lpfc_sli4_oas_verify(struct lpfc_hba *phba) |
13991 | { | |
13992 | ||
13993 | if (!phba->cfg_EnableXLane) | |
13994 | return; | |
13995 | ||
13996 | if (phba->sli4_hba.pc_sli4_params.oas_supported) { | |
13997 | phba->cfg_fof = 1; | |
13998 | } else { | |
f38fa0bb | 13999 | phba->cfg_fof = 0; |
c3e5aac3 | 14000 | mempool_destroy(phba->device_data_mem_pool); |
1ba981fd JS |
14001 | phba->device_data_mem_pool = NULL; |
14002 | } | |
14003 | ||
14004 | return; | |
14005 | } | |
14006 | ||
d2cc9bcd JS |
14007 | /** |
14008 | * lpfc_sli4_ras_init - Verify RAS-FW log is supported by this adapter | |
14009 | * @phba: pointer to lpfc hba data structure. | |
14010 | * | |
14011 | * This routine checks to see if RAS is supported by the adapter. Check the | |
14012 | * function through which RAS support enablement is to be done. | |
14013 | **/ | |
14014 | void | |
14015 | lpfc_sli4_ras_init(struct lpfc_hba *phba) | |
14016 | { | |
14017 | switch (phba->pcidev->device) { | |
14018 | case PCI_DEVICE_ID_LANCER_G6_FC: | |
14019 | case PCI_DEVICE_ID_LANCER_G7_FC: | |
14020 | phba->ras_fwlog.ras_hwsupport = true; | |
cb34990b JS |
14021 | if (phba->cfg_ras_fwlog_func == PCI_FUNC(phba->pcidev->devfn) && |
14022 | phba->cfg_ras_fwlog_buffsize) | |
d2cc9bcd JS |
14023 | phba->ras_fwlog.ras_enabled = true; |
14024 | else | |
14025 | phba->ras_fwlog.ras_enabled = false; | |
14026 | break; | |
14027 | default: | |
14028 | phba->ras_fwlog.ras_hwsupport = false; | |
14029 | } | |
14030 | } | |
14031 | ||
1ba981fd | 14032 | |
dea3101e | 14033 | MODULE_DEVICE_TABLE(pci, lpfc_id_table); |
14034 | ||
a55b2d21 | 14035 | static const struct pci_error_handlers lpfc_err_handler = { |
8d63f375 LV |
14036 | .error_detected = lpfc_io_error_detected, |
14037 | .slot_reset = lpfc_io_slot_reset, | |
14038 | .resume = lpfc_io_resume, | |
14039 | }; | |
14040 | ||
ef6fa16b VG |
14041 | static SIMPLE_DEV_PM_OPS(lpfc_pci_pm_ops_one, |
14042 | lpfc_pci_suspend_one, | |
14043 | lpfc_pci_resume_one); | |
14044 | ||
dea3101e | 14045 | static struct pci_driver lpfc_driver = { |
14046 | .name = LPFC_DRIVER_NAME, | |
14047 | .id_table = lpfc_id_table, | |
14048 | .probe = lpfc_pci_probe_one, | |
6f039790 | 14049 | .remove = lpfc_pci_remove_one, |
85e8a239 | 14050 | .shutdown = lpfc_pci_remove_one, |
ef6fa16b | 14051 | .driver.pm = &lpfc_pci_pm_ops_one, |
2e0fef85 | 14052 | .err_handler = &lpfc_err_handler, |
dea3101e | 14053 | }; |
14054 | ||
3ef6d24c | 14055 | static const struct file_operations lpfc_mgmt_fop = { |
858feacd | 14056 | .owner = THIS_MODULE, |
3ef6d24c JS |
14057 | }; |
14058 | ||
14059 | static struct miscdevice lpfc_mgmt_dev = { | |
14060 | .minor = MISC_DYNAMIC_MINOR, | |
14061 | .name = "lpfcmgmt", | |
14062 | .fops = &lpfc_mgmt_fop, | |
14063 | }; | |
14064 | ||
e59058c4 | 14065 | /** |
3621a710 | 14066 | * lpfc_init - lpfc module initialization routine |
e59058c4 JS |
14067 | * |
14068 | * This routine is to be invoked when the lpfc module is loaded into the | |
14069 | * kernel. The special kernel macro module_init() is used to indicate the | |
14070 | * role of this routine to the kernel as lpfc module entry point. | |
14071 | * | |
14072 | * Return codes | |
14073 | * 0 - successful | |
14074 | * -ENOMEM - FC attach transport failed | |
14075 | * all others - failed | |
14076 | */ | |
dea3101e | 14077 | static int __init |
14078 | lpfc_init(void) | |
14079 | { | |
14080 | int error = 0; | |
14081 | ||
bc2736e9 AB |
14082 | pr_info(LPFC_MODULE_DESC "\n"); |
14083 | pr_info(LPFC_COPYRIGHT "\n"); | |
dea3101e | 14084 | |
3ef6d24c JS |
14085 | error = misc_register(&lpfc_mgmt_dev); |
14086 | if (error) | |
14087 | printk(KERN_ERR "Could not register lpfcmgmt device, " | |
14088 | "misc_register returned with status %d", error); | |
14089 | ||
1eaff536 | 14090 | error = -ENOMEM; |
458c083e JS |
14091 | lpfc_transport_functions.vport_create = lpfc_vport_create; |
14092 | lpfc_transport_functions.vport_delete = lpfc_vport_delete; | |
dea3101e | 14093 | lpfc_transport_template = |
14094 | fc_attach_transport(&lpfc_transport_functions); | |
7ee5d43e | 14095 | if (lpfc_transport_template == NULL) |
1eaff536 | 14096 | goto unregister; |
458c083e JS |
14097 | lpfc_vport_transport_template = |
14098 | fc_attach_transport(&lpfc_vport_transport_functions); | |
14099 | if (lpfc_vport_transport_template == NULL) { | |
14100 | fc_release_transport(lpfc_transport_template); | |
1eaff536 | 14101 | goto unregister; |
7ee5d43e | 14102 | } |
840a4701 | 14103 | lpfc_wqe_cmd_template(); |
bd3061ba | 14104 | lpfc_nvmet_cmd_template(); |
7bb03bbf JS |
14105 | |
14106 | /* Initialize in case vector mapping is needed */ | |
2ea259ee | 14107 | lpfc_present_cpu = num_present_cpus(); |
7bb03bbf | 14108 | |
93a4d6f4 JS |
14109 | error = cpuhp_setup_state_multi(CPUHP_AP_ONLINE_DYN, |
14110 | "lpfc/sli4:online", | |
14111 | lpfc_cpu_online, lpfc_cpu_offline); | |
14112 | if (error < 0) | |
14113 | goto cpuhp_failure; | |
14114 | lpfc_cpuhp_state = error; | |
14115 | ||
dea3101e | 14116 | error = pci_register_driver(&lpfc_driver); |
93a4d6f4 JS |
14117 | if (error) |
14118 | goto unwind; | |
14119 | ||
14120 | return error; | |
14121 | ||
14122 | unwind: | |
14123 | cpuhp_remove_multi_state(lpfc_cpuhp_state); | |
14124 | cpuhp_failure: | |
14125 | fc_release_transport(lpfc_transport_template); | |
14126 | fc_release_transport(lpfc_vport_transport_template); | |
1eaff536 JX |
14127 | unregister: |
14128 | misc_deregister(&lpfc_mgmt_dev); | |
dea3101e | 14129 | |
14130 | return error; | |
14131 | } | |
14132 | ||
372c187b DK |
14133 | void lpfc_dmp_dbg(struct lpfc_hba *phba) |
14134 | { | |
14135 | unsigned int start_idx; | |
14136 | unsigned int dbg_cnt; | |
14137 | unsigned int temp_idx; | |
14138 | int i; | |
14139 | int j = 0; | |
14140 | unsigned long rem_nsec; | |
14141 | ||
14142 | if (phba->cfg_log_verbose) | |
14143 | return; | |
14144 | ||
14145 | if (atomic_cmpxchg(&phba->dbg_log_dmping, 0, 1) != 0) | |
14146 | return; | |
14147 | ||
14148 | start_idx = (unsigned int)atomic_read(&phba->dbg_log_idx) % DBG_LOG_SZ; | |
14149 | dbg_cnt = (unsigned int)atomic_read(&phba->dbg_log_cnt); | |
14150 | temp_idx = start_idx; | |
14151 | if (dbg_cnt >= DBG_LOG_SZ) { | |
14152 | dbg_cnt = DBG_LOG_SZ; | |
14153 | temp_idx -= 1; | |
14154 | } else { | |
14155 | if ((start_idx + dbg_cnt) > (DBG_LOG_SZ - 1)) { | |
14156 | temp_idx = (start_idx + dbg_cnt) % DBG_LOG_SZ; | |
14157 | } else { | |
77dd7d7b | 14158 | if (start_idx < dbg_cnt) |
372c187b | 14159 | start_idx = DBG_LOG_SZ - (dbg_cnt - start_idx); |
77dd7d7b | 14160 | else |
372c187b | 14161 | start_idx -= dbg_cnt; |
372c187b DK |
14162 | } |
14163 | } | |
14164 | dev_info(&phba->pcidev->dev, "start %d end %d cnt %d\n", | |
14165 | start_idx, temp_idx, dbg_cnt); | |
14166 | ||
14167 | for (i = 0; i < dbg_cnt; i++) { | |
14168 | if ((start_idx + i) < DBG_LOG_SZ) | |
77dd7d7b | 14169 | temp_idx = (start_idx + i) % DBG_LOG_SZ; |
372c187b DK |
14170 | else |
14171 | temp_idx = j++; | |
14172 | rem_nsec = do_div(phba->dbg_log[temp_idx].t_ns, NSEC_PER_SEC); | |
14173 | dev_info(&phba->pcidev->dev, "%d: [%5lu.%06lu] %s", | |
14174 | temp_idx, | |
14175 | (unsigned long)phba->dbg_log[temp_idx].t_ns, | |
14176 | rem_nsec / 1000, | |
14177 | phba->dbg_log[temp_idx].log); | |
14178 | } | |
14179 | atomic_set(&phba->dbg_log_cnt, 0); | |
14180 | atomic_set(&phba->dbg_log_dmping, 0); | |
14181 | } | |
14182 | ||
7fa03c77 | 14183 | __printf(2, 3) |
372c187b DK |
14184 | void lpfc_dbg_print(struct lpfc_hba *phba, const char *fmt, ...) |
14185 | { | |
14186 | unsigned int idx; | |
14187 | va_list args; | |
14188 | int dbg_dmping = atomic_read(&phba->dbg_log_dmping); | |
14189 | struct va_format vaf; | |
14190 | ||
14191 | ||
14192 | va_start(args, fmt); | |
14193 | if (unlikely(dbg_dmping)) { | |
14194 | vaf.fmt = fmt; | |
14195 | vaf.va = &args; | |
14196 | dev_info(&phba->pcidev->dev, "%pV", &vaf); | |
14197 | va_end(args); | |
14198 | return; | |
14199 | } | |
14200 | idx = (unsigned int)atomic_fetch_add(1, &phba->dbg_log_idx) % | |
14201 | DBG_LOG_SZ; | |
14202 | ||
14203 | atomic_inc(&phba->dbg_log_cnt); | |
14204 | ||
14205 | vscnprintf(phba->dbg_log[idx].log, | |
14206 | sizeof(phba->dbg_log[idx].log), fmt, args); | |
14207 | va_end(args); | |
14208 | ||
14209 | phba->dbg_log[idx].t_ns = local_clock(); | |
14210 | } | |
14211 | ||
e59058c4 | 14212 | /** |
3621a710 | 14213 | * lpfc_exit - lpfc module removal routine |
e59058c4 JS |
14214 | * |
14215 | * This routine is invoked when the lpfc module is removed from the kernel. | |
14216 | * The special kernel macro module_exit() is used to indicate the role of | |
14217 | * this routine to the kernel as lpfc module exit point. | |
14218 | */ | |
dea3101e | 14219 | static void __exit |
14220 | lpfc_exit(void) | |
14221 | { | |
3ef6d24c | 14222 | misc_deregister(&lpfc_mgmt_dev); |
dea3101e | 14223 | pci_unregister_driver(&lpfc_driver); |
93a4d6f4 | 14224 | cpuhp_remove_multi_state(lpfc_cpuhp_state); |
dea3101e | 14225 | fc_release_transport(lpfc_transport_template); |
458c083e | 14226 | fc_release_transport(lpfc_vport_transport_template); |
7973967f | 14227 | idr_destroy(&lpfc_hba_index); |
dea3101e | 14228 | } |
14229 | ||
14230 | module_init(lpfc_init); | |
14231 | module_exit(lpfc_exit); | |
14232 | MODULE_LICENSE("GPL"); | |
14233 | MODULE_DESCRIPTION(LPFC_MODULE_DESC); | |
d080abe0 | 14234 | MODULE_AUTHOR("Broadcom"); |
dea3101e | 14235 | MODULE_VERSION("0:" LPFC_DRIVER_VERSION); |