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Fix driver load issues when MRQ=8
[linux-2.6-block.git] / drivers / scsi / lpfc / lpfc_init.c
CommitLineData
dea3101e 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
d080abe0
JS		 4 * Copyright (C) 2017 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Limited and/or its subsidiaries. *
50611577 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
c44ce173 7 * EMULEX and SLI are trademarks of Emulex. *
d080abe0 8 * www.broadcom.com *
c44ce173 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e 10 * *
11 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC		 12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
dea3101e 22 *******************************************************************/
23
dea3101e 24#include <linux/blkdev.h>
25#include <linux/delay.h>
26#include <linux/dma-mapping.h>
27#include <linux/idr.h>
28#include <linux/interrupt.h>
acf3368f 29#include <linux/module.h>
dea3101e 30#include <linux/kthread.h>
31#include <linux/pci.h>
32#include <linux/spinlock.h>
92d7f7b0 33#include <linux/ctype.h>
0d878419 34#include <linux/aer.h>
5a0e3ad6 35#include <linux/slab.h>
52d52440 36#include <linux/firmware.h>
3ef6d24c 37#include <linux/miscdevice.h>
7bb03bbf 38#include <linux/percpu.h>
895427bd 39#include <linux/msi.h>
dea3101e 40
91886523 41#include <scsi/scsi.h>
dea3101e 42#include <scsi/scsi_device.h>
43#include <scsi/scsi_host.h>
44#include <scsi/scsi_transport_fc.h>
45
da0436e9 46#include "lpfc_hw4.h"
dea3101e 47#include "lpfc_hw.h"
48#include "lpfc_sli.h"
da0436e9 49#include "lpfc_sli4.h"
ea2151b4 50#include "lpfc_nl.h"
dea3101e 51#include "lpfc_disc.h"
dea3101e 52#include "lpfc.h"
895427bd
JS		 53#include "lpfc_scsi.h"
54#include "lpfc_nvme.h"
dea3101e 55#include "lpfc_logmsg.h"
56#include "lpfc_crtn.h"
92d7f7b0 57#include "lpfc_vport.h"
dea3101e 58#include "lpfc_version.h"
12f44457 59#include "lpfc_ids.h"
dea3101e 60
81301a9b
JS		 61char *_dump_buf_data;
62unsigned long _dump_buf_data_order;
63char *_dump_buf_dif;
64unsigned long _dump_buf_dif_order;
65spinlock_t _dump_buf_lock;
66
7bb03bbf 67/* Used when mapping IRQ vectors in a driver centric manner */
b246de17
JS		 68uint16_t *lpfc_used_cpu;
69uint32_t lpfc_present_cpu;
7bb03bbf 70
dea3101e 71static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
72static int lpfc_post_rcv_buf(struct lpfc_hba *);
5350d872 73static int lpfc_sli4_queue_verify(struct lpfc_hba *);
da0436e9
JS		 74static int lpfc_create_bootstrap_mbox(struct lpfc_hba *);
75static int lpfc_setup_endian_order(struct lpfc_hba *);
da0436e9 76static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *);
8a9d2e80 77static void lpfc_free_els_sgl_list(struct lpfc_hba *);
f358dd0c 78static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *);
8a9d2e80 79static void lpfc_init_sgl_list(struct lpfc_hba *);
da0436e9
JS		 80static int lpfc_init_active_sgl_array(struct lpfc_hba *);
81static void lpfc_free_active_sgl(struct lpfc_hba *);
82static int lpfc_hba_down_post_s3(struct lpfc_hba *phba);
83static int lpfc_hba_down_post_s4(struct lpfc_hba *phba);
84static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *);
85static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *);
86static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *);
618a5230
JS		 87static void lpfc_sli4_disable_intr(struct lpfc_hba *);
88static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t);
1ba981fd 89static void lpfc_sli4_oas_verify(struct lpfc_hba *phba);
dea3101e 90
91static struct scsi_transport_template *lpfc_transport_template = NULL;
92d7f7b0 92static struct scsi_transport_template *lpfc_vport_transport_template = NULL;
dea3101e 93static DEFINE_IDR(lpfc_hba_index);
f358dd0c 94#define LPFC_NVMET_BUF_POST 254
dea3101e 95
e59058c4 96/**
3621a710 97 * lpfc_config_port_prep - Perform lpfc initialization prior to config port
e59058c4
JS		 98 * @phba: pointer to lpfc hba data structure.
99 *
100 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT
101 * mailbox command. It retrieves the revision information from the HBA and
102 * collects the Vital Product Data (VPD) about the HBA for preparing the
103 * configuration of the HBA.
104 *
105 * Return codes:
106 * 0 - success.
107 * -ERESTART - requests the SLI layer to reset the HBA and try again.
108 * Any other value - indicates an error.
109 **/
dea3101e 110int
2e0fef85 111lpfc_config_port_prep(struct lpfc_hba *phba)
dea3101e 112{
113 lpfc_vpd_t *vp = &phba->vpd;
114 int i = 0, rc;
115 LPFC_MBOXQ_t *pmb;
116 MAILBOX_t *mb;
117 char *lpfc_vpd_data = NULL;
118 uint16_t offset = 0;
119 static char licensed[56] =
120 "key unlock for use with gnu public licensed code only\0";
65a29c16 121 static int init_key = 1;
dea3101e 122
123 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
124 if (!pmb) {
2e0fef85 125 phba->link_state = LPFC_HBA_ERROR;
dea3101e 126 return -ENOMEM;
127 }
128
04c68496 129 mb = &pmb->u.mb;
2e0fef85 130 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 131
132 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
65a29c16
JS		 133 if (init_key) {
134 uint32_t *ptext = (uint32_t *) licensed;
dea3101e 135
65a29c16
JS		 136 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
137 *ptext = cpu_to_be32(*ptext);
138 init_key = 0;
139 }
dea3101e 140
141 lpfc_read_nv(phba, pmb);
142 memset((char*)mb->un.varRDnvp.rsvd3, 0,
143 sizeof (mb->un.varRDnvp.rsvd3));
144 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
145 sizeof (licensed));
146
147 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
148
149 if (rc != MBX_SUCCESS) {
ed957684 150 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
e8b62011 151 "0324 Config Port initialization "
dea3101e 152 "error, mbxCmd x%x READ_NVPARM, "
153 "mbxStatus x%x\n",
dea3101e 154 mb->mbxCommand, mb->mbxStatus);
155 mempool_free(pmb, phba->mbox_mem_pool);
156 return -ERESTART;
157 }
158 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
2e0fef85
JS		 159 sizeof(phba->wwnn));
160 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname,
161 sizeof(phba->wwpn));
dea3101e 162 }
163
92d7f7b0
JS		 164 phba->sli3_options = 0x0;
165
dea3101e 166 /* Setup and issue mailbox READ REV command */
167 lpfc_read_rev(phba, pmb);
168 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
169 if (rc != MBX_SUCCESS) {
ed957684 170 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 171 "0439 Adapter failed to init, mbxCmd x%x "
dea3101e 172 "READ_REV, mbxStatus x%x\n",
dea3101e 173 mb->mbxCommand, mb->mbxStatus);
174 mempool_free( pmb, phba->mbox_mem_pool);
175 return -ERESTART;
176 }
177
92d7f7b0 178
1de933f3
JSEC		 179 /*
180 * The value of rr must be 1 since the driver set the cv field to 1.
181 * This setting requires the FW to set all revision fields.
dea3101e 182 */
1de933f3 183 if (mb->un.varRdRev.rr == 0) {
dea3101e 184 vp->rev.rBit = 0;
1de933f3 185 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS		 186 "0440 Adapter failed to init, READ_REV has "
187 "missing revision information.\n");
dea3101e 188 mempool_free(pmb, phba->mbox_mem_pool);
189 return -ERESTART;
dea3101e 190 }
191
495a714c
JS		 192 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) {
193 mempool_free(pmb, phba->mbox_mem_pool);
ed957684 194 return -EINVAL;
495a714c 195 }
ed957684 196
dea3101e 197 /* Save information as VPD data */
1de933f3 198 vp->rev.rBit = 1;
92d7f7b0 199 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t));
1de933f3
JSEC		 200 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
201 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
202 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
203 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
dea3101e 204 vp->rev.biuRev = mb->un.varRdRev.biuRev;
205 vp->rev.smRev = mb->un.varRdRev.smRev;
206 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
207 vp->rev.endecRev = mb->un.varRdRev.endecRev;
208 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
209 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
210 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
211 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
212 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
213 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
214
92d7f7b0
JS		 215 /* If the sli feature level is less then 9, we must
216 * tear down all RPIs and VPIs on link down if NPIV
217 * is enabled.
218 */
219 if (vp->rev.feaLevelHigh < 9)
220 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN;
221
dea3101e 222 if (lpfc_is_LC_HBA(phba->pcidev->device))
223 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
224 sizeof (phba->RandomData));
225
dea3101e 226 /* Get adapter VPD information */
dea3101e 227 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
228 if (!lpfc_vpd_data)
d7c255b2 229 goto out_free_mbox;
dea3101e 230 do {
a0c87cbd 231 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD);
dea3101e 232 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
233
234 if (rc != MBX_SUCCESS) {
235 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 236 "0441 VPD not present on adapter, "
dea3101e 237 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
dea3101e 238 mb->mbxCommand, mb->mbxStatus);
74b72a59 239 mb->un.varDmp.word_cnt = 0;
dea3101e 240 }
04c68496
JS		 241 /* dump mem may return a zero when finished or we got a
242 * mailbox error, either way we are done.
243 */
244 if (mb->un.varDmp.word_cnt == 0)
245 break;
74b72a59
JW		 246 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
247 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
d7c255b2
JS		 248 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
249 lpfc_vpd_data + offset,
92d7f7b0 250 mb->un.varDmp.word_cnt);
dea3101e 251 offset += mb->un.varDmp.word_cnt;
74b72a59
JW		 252 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
253 lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
dea3101e 254
255 kfree(lpfc_vpd_data);
dea3101e 256out_free_mbox:
257 mempool_free(pmb, phba->mbox_mem_pool);
258 return 0;
259}
260
e59058c4 261/**
3621a710 262 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd
e59058c4
JS		 263 * @phba: pointer to lpfc hba data structure.
264 * @pmboxq: pointer to the driver internal queue element for mailbox command.
265 *
266 * This is the completion handler for driver's configuring asynchronous event
267 * mailbox command to the device. If the mailbox command returns successfully,
268 * it will set internal async event support flag to 1; otherwise, it will
269 * set internal async event support flag to 0.
270 **/
57127f15
JS		 271static void
272lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
273{
04c68496 274 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS)
57127f15
JS		 275 phba->temp_sensor_support = 1;
276 else
277 phba->temp_sensor_support = 0;
278 mempool_free(pmboxq, phba->mbox_mem_pool);
279 return;
280}
281
97207482 282/**
3621a710 283 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler
97207482
JS		 284 * @phba: pointer to lpfc hba data structure.
285 * @pmboxq: pointer to the driver internal queue element for mailbox command.
286 *
287 * This is the completion handler for dump mailbox command for getting
288 * wake up parameters. When this command complete, the response contain
289 * Option rom version of the HBA. This function translate the version number
290 * into a human readable string and store it in OptionROMVersion.
291 **/
292static void
293lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
294{
295 struct prog_id *prg;
296 uint32_t prog_id_word;
297 char dist = ' ';
298 /* character array used for decoding dist type. */
299 char dist_char[] = "nabx";
300
04c68496 301 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) {
9f1e1b50 302 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482 303 return;
9f1e1b50 304 }
97207482
JS		 305
306 prg = (struct prog_id *) &prog_id_word;
307
308 /* word 7 contain option rom version */
04c68496 309 prog_id_word = pmboxq->u.mb.un.varWords[7];
97207482
JS		 310
311 /* Decode the Option rom version word to a readable string */
312 if (prg->dist < 4)
313 dist = dist_char[prg->dist];
314
315 if ((prg->dist == 3) && (prg->num == 0))
a2fc4aef 316 snprintf(phba->OptionROMVersion, 32, "%d.%d%d",
97207482
JS		 317 prg->ver, prg->rev, prg->lev);
318 else
a2fc4aef 319 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d",
97207482
JS		 320 prg->ver, prg->rev, prg->lev,
321 dist, prg->num);
9f1e1b50 322 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482
JS		 323 return;
324}
325
0558056c
JS		 326/**
327 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname,
328 * cfg_soft_wwnn, cfg_soft_wwpn
329 * @vport: pointer to lpfc vport data structure.
330 *
331 *
332 * Return codes
333 * None.
334 **/
335void
336lpfc_update_vport_wwn(struct lpfc_vport *vport)
337{
338 /* If the soft name exists then update it using the service params */
339 if (vport->phba->cfg_soft_wwnn)
340 u64_to_wwn(vport->phba->cfg_soft_wwnn,
341 vport->fc_sparam.nodeName.u.wwn);
342 if (vport->phba->cfg_soft_wwpn)
343 u64_to_wwn(vport->phba->cfg_soft_wwpn,
344 vport->fc_sparam.portName.u.wwn);
345
346 /*
347 * If the name is empty or there exists a soft name
348 * then copy the service params name, otherwise use the fc name
349 */
350 if (vport->fc_nodename.u.wwn[0] == 0 || vport->phba->cfg_soft_wwnn)
351 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
352 sizeof(struct lpfc_name));
353 else
354 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename,
355 sizeof(struct lpfc_name));
356
357 if (vport->fc_portname.u.wwn[0] == 0 || vport->phba->cfg_soft_wwpn)
358 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
359 sizeof(struct lpfc_name));
360 else
361 memcpy(&vport->fc_sparam.portName, &vport->fc_portname,
362 sizeof(struct lpfc_name));
363}
364
e59058c4 365/**
3621a710 366 * lpfc_config_port_post - Perform lpfc initialization after config port
e59058c4
JS		 367 * @phba: pointer to lpfc hba data structure.
368 *
369 * This routine will do LPFC initialization after the CONFIG_PORT mailbox
370 * command call. It performs all internal resource and state setups on the
371 * port: post IOCB buffers, enable appropriate host interrupt attentions,
372 * ELS ring timers, etc.
373 *
374 * Return codes
375 * 0 - success.
376 * Any other value - error.
377 **/
dea3101e 378int
2e0fef85 379lpfc_config_port_post(struct lpfc_hba *phba)
dea3101e 380{
2e0fef85 381 struct lpfc_vport *vport = phba->pport;
a257bf90 382 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
dea3101e 383 LPFC_MBOXQ_t *pmb;
384 MAILBOX_t *mb;
385 struct lpfc_dmabuf *mp;
386 struct lpfc_sli *psli = &phba->sli;
387 uint32_t status, timeout;
2e0fef85
JS		 388 int i, j;
389 int rc;
dea3101e 390
7af67051
JS		 391 spin_lock_irq(&phba->hbalock);
392 /*
393 * If the Config port completed correctly the HBA is not
394 * over heated any more.
395 */
396 if (phba->over_temp_state == HBA_OVER_TEMP)
397 phba->over_temp_state = HBA_NORMAL_TEMP;
398 spin_unlock_irq(&phba->hbalock);
399
dea3101e 400 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
401 if (!pmb) {
2e0fef85 402 phba->link_state = LPFC_HBA_ERROR;
dea3101e 403 return -ENOMEM;
404 }
04c68496 405 mb = &pmb->u.mb;
dea3101e 406
dea3101e 407 /* Get login parameters for NID. */
9f1177a3
JS		 408 rc = lpfc_read_sparam(phba, pmb, 0);
409 if (rc) {
410 mempool_free(pmb, phba->mbox_mem_pool);
411 return -ENOMEM;
412 }
413
ed957684 414 pmb->vport = vport;
dea3101e 415 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 416 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 417 "0448 Adapter failed init, mbxCmd x%x "
dea3101e 418 "READ_SPARM mbxStatus x%x\n",
dea3101e 419 mb->mbxCommand, mb->mbxStatus);
2e0fef85 420 phba->link_state = LPFC_HBA_ERROR;
dea3101e 421 mp = (struct lpfc_dmabuf *) pmb->context1;
9f1177a3 422 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 423 lpfc_mbuf_free(phba, mp->virt, mp->phys);
424 kfree(mp);
425 return -EIO;
426 }
427
428 mp = (struct lpfc_dmabuf *) pmb->context1;
429
2e0fef85 430 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm));
dea3101e 431 lpfc_mbuf_free(phba, mp->virt, mp->phys);
432 kfree(mp);
433 pmb->context1 = NULL;
0558056c 434 lpfc_update_vport_wwn(vport);
a257bf90
JS		 435
436 /* Update the fc_host data structures with new wwn. */
437 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
438 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
21e9a0a5 439 fc_host_max_npiv_vports(shost) = phba->max_vpi;
a257bf90 440
dea3101e 441 /* If no serial number in VPD data, use low 6 bytes of WWNN */
442 /* This should be consolidated into parse_vpd ? - mr */
443 if (phba->SerialNumber[0] == 0) {
444 uint8_t *outptr;
445
2e0fef85 446 outptr = &vport->fc_nodename.u.s.IEEE[0];
dea3101e 447 for (i = 0; i < 12; i++) {
448 status = *outptr++;
449 j = ((status & 0xf0) >> 4);
450 if (j <= 9)
451 phba->SerialNumber[i] =
452 (char)((uint8_t) 0x30 + (uint8_t) j);
453 else
454 phba->SerialNumber[i] =
455 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
456 i++;
457 j = (status & 0xf);
458 if (j <= 9)
459 phba->SerialNumber[i] =
460 (char)((uint8_t) 0x30 + (uint8_t) j);
461 else
462 phba->SerialNumber[i] =
463 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
464 }
465 }
466
dea3101e 467 lpfc_read_config(phba, pmb);
ed957684 468 pmb->vport = vport;
dea3101e 469 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 470 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 471 "0453 Adapter failed to init, mbxCmd x%x "
dea3101e 472 "READ_CONFIG, mbxStatus x%x\n",
dea3101e 473 mb->mbxCommand, mb->mbxStatus);
2e0fef85 474 phba->link_state = LPFC_HBA_ERROR;
dea3101e 475 mempool_free( pmb, phba->mbox_mem_pool);
476 return -EIO;
477 }
478
a0c87cbd
JS		 479 /* Check if the port is disabled */
480 lpfc_sli_read_link_ste(phba);
481
dea3101e 482 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS		 483 i = (mb->un.varRdConfig.max_xri + 1);
484 if (phba->cfg_hba_queue_depth > i) {
485 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
486 "3359 HBA queue depth changed from %d to %d\n",
487 phba->cfg_hba_queue_depth, i);
488 phba->cfg_hba_queue_depth = i;
489 }
490
491 /* Reset the DFT_LUN_Q_DEPTH to (max xri >> 3) */
492 i = (mb->un.varRdConfig.max_xri >> 3);
493 if (phba->pport->cfg_lun_queue_depth > i) {
494 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
495 "3360 LUN queue depth changed from %d to %d\n",
496 phba->pport->cfg_lun_queue_depth, i);
497 phba->pport->cfg_lun_queue_depth = i;
498 }
dea3101e 499
500 phba->lmt = mb->un.varRdConfig.lmt;
74b72a59
JW		 501
502 /* Get the default values for Model Name and Description */
503 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
504
2e0fef85 505 phba->link_state = LPFC_LINK_DOWN;
dea3101e 506
0b727fea 507 /* Only process IOCBs on ELS ring till hba_state is READY */
895427bd
JS		 508 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr)
509 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT;
510 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr)
511 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT;
dea3101e 512
513 /* Post receive buffers for desired rings */
ed957684
JS		 514 if (phba->sli_rev != 3)
515 lpfc_post_rcv_buf(phba);
dea3101e 516
9399627f
JS		 517 /*
518 * Configure HBA MSI-X attention conditions to messages if MSI-X mode
519 */
520 if (phba->intr_type == MSIX) {
521 rc = lpfc_config_msi(phba, pmb);
522 if (rc) {
523 mempool_free(pmb, phba->mbox_mem_pool);
524 return -EIO;
525 }
526 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
527 if (rc != MBX_SUCCESS) {
528 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
529 "0352 Config MSI mailbox command "
530 "failed, mbxCmd x%x, mbxStatus x%x\n",
04c68496
JS		 531 pmb->u.mb.mbxCommand,
532 pmb->u.mb.mbxStatus);
9399627f
JS		 533 mempool_free(pmb, phba->mbox_mem_pool);
534 return -EIO;
535 }
536 }
537
04c68496 538 spin_lock_irq(&phba->hbalock);
9399627f
JS		 539 /* Initialize ERATT handling flag */
540 phba->hba_flag &= ~HBA_ERATT_HANDLED;
541
dea3101e 542 /* Enable appropriate host interrupts */
9940b97b
JS		 543 if (lpfc_readl(phba->HCregaddr, &status)) {
544 spin_unlock_irq(&phba->hbalock);
545 return -EIO;
546 }
dea3101e 547 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
548 if (psli->num_rings > 0)
549 status |= HC_R0INT_ENA;
550 if (psli->num_rings > 1)
551 status |= HC_R1INT_ENA;
552 if (psli->num_rings > 2)
553 status |= HC_R2INT_ENA;
554 if (psli->num_rings > 3)
555 status |= HC_R3INT_ENA;
556
875fbdfe
JSEC		 557 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
558 (phba->cfg_poll & DISABLE_FCP_RING_INT))
9399627f 559 status &= ~(HC_R0INT_ENA);
875fbdfe 560
dea3101e 561 writel(status, phba->HCregaddr);
562 readl(phba->HCregaddr); /* flush */
2e0fef85 563 spin_unlock_irq(&phba->hbalock);
dea3101e 564
9399627f
JS		 565 /* Set up ring-0 (ELS) timer */
566 timeout = phba->fc_ratov * 2;
256ec0d0
JS		 567 mod_timer(&vport->els_tmofunc,
568 jiffies + msecs_to_jiffies(1000 * timeout));
9399627f 569 /* Set up heart beat (HB) timer */
256ec0d0
JS		 570 mod_timer(&phba->hb_tmofunc,
571 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS		 572 phba->hb_outstanding = 0;
573 phba->last_completion_time = jiffies;
9399627f 574 /* Set up error attention (ERATT) polling timer */
256ec0d0 575 mod_timer(&phba->eratt_poll,
65791f1f 576 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
dea3101e 577
a0c87cbd
JS		 578 if (phba->hba_flag & LINK_DISABLED) {
579 lpfc_printf_log(phba,
580 KERN_ERR, LOG_INIT,
581 "2598 Adapter Link is disabled.\n");
582 lpfc_down_link(phba, pmb);
583 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
584 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
585 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
586 lpfc_printf_log(phba,
587 KERN_ERR, LOG_INIT,
588 "2599 Adapter failed to issue DOWN_LINK"
589 " mbox command rc 0x%x\n", rc);
590
591 mempool_free(pmb, phba->mbox_mem_pool);
592 return -EIO;
593 }
e40a02c1 594 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
026abb87
JS		 595 mempool_free(pmb, phba->mbox_mem_pool);
596 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
597 if (rc)
598 return rc;
dea3101e 599 }
600 /* MBOX buffer will be freed in mbox compl */
57127f15 601 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS		 602 if (!pmb) {
603 phba->link_state = LPFC_HBA_ERROR;
604 return -ENOMEM;
605 }
606
57127f15
JS		 607 lpfc_config_async(phba, pmb, LPFC_ELS_RING);
608 pmb->mbox_cmpl = lpfc_config_async_cmpl;
609 pmb->vport = phba->pport;
610 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
dea3101e 611
57127f15
JS		 612 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
613 lpfc_printf_log(phba,
614 KERN_ERR,
615 LOG_INIT,
616 "0456 Adapter failed to issue "
e4e74273 617 "ASYNCEVT_ENABLE mbox status x%x\n",
57127f15
JS		 618 rc);
619 mempool_free(pmb, phba->mbox_mem_pool);
620 }
97207482
JS		 621
622 /* Get Option rom version */
623 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS		 624 if (!pmb) {
625 phba->link_state = LPFC_HBA_ERROR;
626 return -ENOMEM;
627 }
628
97207482
JS		 629 lpfc_dump_wakeup_param(phba, pmb);
630 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl;
631 pmb->vport = phba->pport;
632 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
633
634 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
635 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "0435 Adapter failed "
e4e74273 636 "to get Option ROM version status x%x\n", rc);
97207482
JS		 637 mempool_free(pmb, phba->mbox_mem_pool);
638 }
639
d7c255b2 640 return 0;
ce8b3ce5
JS		 641}
642
84d1b006
JS		 643/**
644 * lpfc_hba_init_link - Initialize the FC link
645 * @phba: pointer to lpfc hba data structure.
6e7288d9 646 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS		 647 *
648 * This routine will issue the INIT_LINK mailbox command call.
649 * It is available to other drivers through the lpfc_hba data
650 * structure for use as a delayed link up mechanism with the
651 * module parameter lpfc_suppress_link_up.
652 *
653 * Return code
654 * 0 - success
655 * Any other value - error
656 **/
e399b228 657static int
6e7288d9 658lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag)
1b51197d
JS		 659{
660 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag);
661}
662
663/**
664 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology
665 * @phba: pointer to lpfc hba data structure.
666 * @fc_topology: desired fc topology.
667 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
668 *
669 * This routine will issue the INIT_LINK mailbox command call.
670 * It is available to other drivers through the lpfc_hba data
671 * structure for use as a delayed link up mechanism with the
672 * module parameter lpfc_suppress_link_up.
673 *
674 * Return code
675 * 0 - success
676 * Any other value - error
677 **/
678int
679lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology,
680 uint32_t flag)
84d1b006
JS		 681{
682 struct lpfc_vport *vport = phba->pport;
683 LPFC_MBOXQ_t *pmb;
684 MAILBOX_t *mb;
685 int rc;
686
687 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
688 if (!pmb) {
689 phba->link_state = LPFC_HBA_ERROR;
690 return -ENOMEM;
691 }
692 mb = &pmb->u.mb;
693 pmb->vport = vport;
694
026abb87
JS		 695 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) ||
696 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) &&
697 !(phba->lmt & LMT_1Gb)) ||
698 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) &&
699 !(phba->lmt & LMT_2Gb)) ||
700 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) &&
701 !(phba->lmt & LMT_4Gb)) ||
702 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) &&
703 !(phba->lmt & LMT_8Gb)) ||
704 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) &&
705 !(phba->lmt & LMT_10Gb)) ||
706 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) &&
d38dd52c
JS		 707 !(phba->lmt & LMT_16Gb)) ||
708 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) &&
709 !(phba->lmt & LMT_32Gb))) {
026abb87
JS		 710 /* Reset link speed to auto */
711 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
712 "1302 Invalid speed for this board:%d "
713 "Reset link speed to auto.\n",
714 phba->cfg_link_speed);
715 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO;
716 }
1b51197d 717 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed);
84d1b006 718 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
1b51197d
JS		 719 if (phba->sli_rev < LPFC_SLI_REV4)
720 lpfc_set_loopback_flag(phba);
6e7288d9 721 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
76a95d75 722 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
84d1b006
JS		 723 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
724 "0498 Adapter failed to init, mbxCmd x%x "
725 "INIT_LINK, mbxStatus x%x\n",
726 mb->mbxCommand, mb->mbxStatus);
76a95d75
JS		 727 if (phba->sli_rev <= LPFC_SLI_REV3) {
728 /* Clear all interrupt enable conditions */
729 writel(0, phba->HCregaddr);
730 readl(phba->HCregaddr); /* flush */
731 /* Clear all pending interrupts */
732 writel(0xffffffff, phba->HAregaddr);
733 readl(phba->HAregaddr); /* flush */
734 }
84d1b006 735 phba->link_state = LPFC_HBA_ERROR;
6e7288d9 736 if (rc != MBX_BUSY || flag == MBX_POLL)
84d1b006
JS		 737 mempool_free(pmb, phba->mbox_mem_pool);
738 return -EIO;
739 }
e40a02c1 740 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK;
6e7288d9
JS		 741 if (flag == MBX_POLL)
742 mempool_free(pmb, phba->mbox_mem_pool);
84d1b006
JS		 743
744 return 0;
745}
746
747/**
748 * lpfc_hba_down_link - this routine downs the FC link
6e7288d9
JS		 749 * @phba: pointer to lpfc hba data structure.
750 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS		 751 *
752 * This routine will issue the DOWN_LINK mailbox command call.
753 * It is available to other drivers through the lpfc_hba data
754 * structure for use to stop the link.
755 *
756 * Return code
757 * 0 - success
758 * Any other value - error
759 **/
e399b228 760static int
6e7288d9 761lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag)
84d1b006
JS		 762{
763 LPFC_MBOXQ_t *pmb;
764 int rc;
765
766 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
767 if (!pmb) {
768 phba->link_state = LPFC_HBA_ERROR;
769 return -ENOMEM;
770 }
771
772 lpfc_printf_log(phba,
773 KERN_ERR, LOG_INIT,
774 "0491 Adapter Link is disabled.\n");
775 lpfc_down_link(phba, pmb);
776 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
6e7288d9 777 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
84d1b006
JS		 778 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
779 lpfc_printf_log(phba,
780 KERN_ERR, LOG_INIT,
781 "2522 Adapter failed to issue DOWN_LINK"
782 " mbox command rc 0x%x\n", rc);
783
784 mempool_free(pmb, phba->mbox_mem_pool);
785 return -EIO;
786 }
6e7288d9
JS		 787 if (flag == MBX_POLL)
788 mempool_free(pmb, phba->mbox_mem_pool);
789
84d1b006
JS		 790 return 0;
791}
792
e59058c4 793/**
3621a710 794 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset
e59058c4
JS		 795 * @phba: pointer to lpfc HBA data structure.
796 *
797 * This routine will do LPFC uninitialization before the HBA is reset when
798 * bringing down the SLI Layer.
799 *
800 * Return codes
801 * 0 - success.
802 * Any other value - error.
803 **/
dea3101e 804int
2e0fef85 805lpfc_hba_down_prep(struct lpfc_hba *phba)
dea3101e 806{
1b32f6aa
JS		 807 struct lpfc_vport **vports;
808 int i;
3772a991
JS		 809
810 if (phba->sli_rev <= LPFC_SLI_REV3) {
811 /* Disable interrupts */
812 writel(0, phba->HCregaddr);
813 readl(phba->HCregaddr); /* flush */
814 }
dea3101e 815
1b32f6aa
JS		 816 if (phba->pport->load_flag & FC_UNLOADING)
817 lpfc_cleanup_discovery_resources(phba->pport);
818 else {
819 vports = lpfc_create_vport_work_array(phba);
820 if (vports != NULL)
3772a991
JS		 821 for (i = 0; i <= phba->max_vports &&
822 vports[i] != NULL; i++)
1b32f6aa
JS		 823 lpfc_cleanup_discovery_resources(vports[i]);
824 lpfc_destroy_vport_work_array(phba, vports);
7f5f3d0d
JS		 825 }
826 return 0;
dea3101e 827}
828
68e814f5
JS		 829/**
830 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free
831 * rspiocb which got deferred
832 *
833 * @phba: pointer to lpfc HBA data structure.
834 *
835 * This routine will cleanup completed slow path events after HBA is reset
836 * when bringing down the SLI Layer.
837 *
838 *
839 * Return codes
840 * void.
841 **/
842static void
843lpfc_sli4_free_sp_events(struct lpfc_hba *phba)
844{
845 struct lpfc_iocbq *rspiocbq;
846 struct hbq_dmabuf *dmabuf;
847 struct lpfc_cq_event *cq_event;
848
849 spin_lock_irq(&phba->hbalock);
850 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
851 spin_unlock_irq(&phba->hbalock);
852
853 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
854 /* Get the response iocb from the head of work queue */
855 spin_lock_irq(&phba->hbalock);
856 list_remove_head(&phba->sli4_hba.sp_queue_event,
857 cq_event, struct lpfc_cq_event, list);
858 spin_unlock_irq(&phba->hbalock);
859
860 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
861 case CQE_CODE_COMPL_WQE:
862 rspiocbq = container_of(cq_event, struct lpfc_iocbq,
863 cq_event);
864 lpfc_sli_release_iocbq(phba, rspiocbq);
865 break;
866 case CQE_CODE_RECEIVE:
867 case CQE_CODE_RECEIVE_V1:
868 dmabuf = container_of(cq_event, struct hbq_dmabuf,
869 cq_event);
870 lpfc_in_buf_free(phba, &dmabuf->dbuf);
871 }
872 }
873}
874
e59058c4 875/**
bcece5f5 876 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset
e59058c4
JS		 877 * @phba: pointer to lpfc HBA data structure.
878 *
bcece5f5
JS		 879 * This routine will cleanup posted ELS buffers after the HBA is reset
880 * when bringing down the SLI Layer.
881 *
e59058c4
JS		 882 *
883 * Return codes
bcece5f5 884 * void.
e59058c4 885 **/
bcece5f5
JS		 886static void
887lpfc_hba_free_post_buf(struct lpfc_hba *phba)
41415862
JW		 888{
889 struct lpfc_sli *psli = &phba->sli;
890 struct lpfc_sli_ring *pring;
891 struct lpfc_dmabuf *mp, *next_mp;
07eab624
JS		 892 LIST_HEAD(buflist);
893 int count;
41415862 894
92d7f7b0
JS		 895 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)
896 lpfc_sli_hbqbuf_free_all(phba);
897 else {
898 /* Cleanup preposted buffers on the ELS ring */
895427bd 899 pring = &psli->sli3_ring[LPFC_ELS_RING];
07eab624
JS		 900 spin_lock_irq(&phba->hbalock);
901 list_splice_init(&pring->postbufq, &buflist);
902 spin_unlock_irq(&phba->hbalock);
903
904 count = 0;
905 list_for_each_entry_safe(mp, next_mp, &buflist, list) {
92d7f7b0 906 list_del(&mp->list);
07eab624 907 count++;
92d7f7b0
JS		 908 lpfc_mbuf_free(phba, mp->virt, mp->phys);
909 kfree(mp);
910 }
07eab624
JS		 911
912 spin_lock_irq(&phba->hbalock);
913 pring->postbufq_cnt -= count;
bcece5f5 914 spin_unlock_irq(&phba->hbalock);
41415862 915 }
bcece5f5
JS		 916}
917
918/**
919 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset
920 * @phba: pointer to lpfc HBA data structure.
921 *
922 * This routine will cleanup the txcmplq after the HBA is reset when bringing
923 * down the SLI Layer.
924 *
925 * Return codes
926 * void
927 **/
928static void
929lpfc_hba_clean_txcmplq(struct lpfc_hba *phba)
930{
931 struct lpfc_sli *psli = &phba->sli;
895427bd 932 struct lpfc_queue *qp = NULL;
bcece5f5
JS		 933 struct lpfc_sli_ring *pring;
934 LIST_HEAD(completions);
935 int i;
936
895427bd
JS		 937 if (phba->sli_rev != LPFC_SLI_REV4) {
938 for (i = 0; i < psli->num_rings; i++) {
939 pring = &psli->sli3_ring[i];
bcece5f5 940 spin_lock_irq(&phba->hbalock);
895427bd
JS		 941 /* At this point in time the HBA is either reset or DOA
942 * Nothing should be on txcmplq as it will
943 * NEVER complete.
944 */
945 list_splice_init(&pring->txcmplq, &completions);
946 pring->txcmplq_cnt = 0;
bcece5f5 947 spin_unlock_irq(&phba->hbalock);
09372820 948
895427bd
JS		 949 lpfc_sli_abort_iocb_ring(phba, pring);
950 }
a257bf90 951 /* Cancel all the IOCBs from the completions list */
895427bd
JS		 952 lpfc_sli_cancel_iocbs(phba, &completions,
953 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
954 return;
955 }
956 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
957 pring = qp->pring;
958 if (!pring)
959 continue;
960 spin_lock_irq(&pring->ring_lock);
961 list_splice_init(&pring->txcmplq, &completions);
962 pring->txcmplq_cnt = 0;
963 spin_unlock_irq(&pring->ring_lock);
41415862
JW		 964 lpfc_sli_abort_iocb_ring(phba, pring);
965 }
895427bd
JS		 966 /* Cancel all the IOCBs from the completions list */
967 lpfc_sli_cancel_iocbs(phba, &completions,
968 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
bcece5f5 969}
41415862 970
bcece5f5
JS		 971/**
972 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset
973 int i;
974 * @phba: pointer to lpfc HBA data structure.
975 *
976 * This routine will do uninitialization after the HBA is reset when bring
977 * down the SLI Layer.
978 *
979 * Return codes
980 * 0 - success.
981 * Any other value - error.
982 **/
983static int
984lpfc_hba_down_post_s3(struct lpfc_hba *phba)
985{
986 lpfc_hba_free_post_buf(phba);
987 lpfc_hba_clean_txcmplq(phba);
41415862
JW		 988 return 0;
989}
5af5eee7 990
da0436e9
JS		 991/**
992 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset
993 * @phba: pointer to lpfc HBA data structure.
994 *
995 * This routine will do uninitialization after the HBA is reset when bring
996 * down the SLI Layer.
997 *
998 * Return codes
af901ca1 999 * 0 - success.
da0436e9
JS		 1000 * Any other value - error.
1001 **/
1002static int
1003lpfc_hba_down_post_s4(struct lpfc_hba *phba)
1004{
1005 struct lpfc_scsi_buf *psb, *psb_next;
1006 LIST_HEAD(aborts);
895427bd 1007 LIST_HEAD(nvme_aborts);
da0436e9 1008 unsigned long iflag = 0;
0f65ff68
JS		 1009 struct lpfc_sglq *sglq_entry = NULL;
1010
895427bd
JS		 1011
1012 lpfc_sli_hbqbuf_free_all(phba);
bcece5f5
JS		 1013 lpfc_hba_clean_txcmplq(phba);
1014
da0436e9
JS		 1015 /* At this point in time the HBA is either reset or DOA. Either
1016 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be
895427bd 1017 * on the lpfc_els_sgl_list so that it can either be freed if the
da0436e9
JS		 1018 * driver is unloading or reposted if the driver is restarting
1019 * the port.
1020 */
895427bd 1021 spin_lock_irq(&phba->hbalock); /* required for lpfc_els_sgl_list and */
da0436e9 1022 /* scsl_buf_list */
895427bd 1023 /* sgl_list_lock required because worker thread uses this
da0436e9
JS		 1024 * list.
1025 */
895427bd 1026 spin_lock(&phba->sli4_hba.sgl_list_lock);
0f65ff68
JS		 1027 list_for_each_entry(sglq_entry,
1028 &phba->sli4_hba.lpfc_abts_els_sgl_list, list)
1029 sglq_entry->state = SGL_FREED;
f358dd0c
JS		 1030 list_for_each_entry(sglq_entry,
1031 &phba->sli4_hba.lpfc_abts_nvmet_sgl_list, list)
1032 sglq_entry->state = SGL_FREED;
0f65ff68 1033
da0436e9 1034 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
895427bd
JS		 1035 &phba->sli4_hba.lpfc_els_sgl_list);
1036
f358dd0c
JS		 1037 if (phba->sli4_hba.nvme_wq)
1038 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_sgl_list,
1039 &phba->sli4_hba.lpfc_nvmet_sgl_list);
1040
895427bd 1041 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9
JS		 1042 /* abts_scsi_buf_list_lock required because worker thread uses this
1043 * list.
1044 */
895427bd
JS		 1045 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
1046 spin_lock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1047 list_splice_init(&phba->sli4_hba.lpfc_abts_scsi_buf_list,
1048 &aborts);
1049 spin_unlock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1050 }
1051
1052 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1053 spin_lock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1054 list_splice_init(&phba->sli4_hba.lpfc_abts_nvme_buf_list,
1055 &nvme_aborts);
1056 spin_unlock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1057 }
1058
da0436e9
JS		 1059 spin_unlock_irq(&phba->hbalock);
1060
1061 list_for_each_entry_safe(psb, psb_next, &aborts, list) {
1062 psb->pCmd = NULL;
1063 psb->status = IOSTAT_SUCCESS;
1064 }
a40fc5f0
JS		 1065 spin_lock_irqsave(&phba->scsi_buf_list_put_lock, iflag);
1066 list_splice(&aborts, &phba->lpfc_scsi_buf_list_put);
1067 spin_unlock_irqrestore(&phba->scsi_buf_list_put_lock, iflag);
68e814f5 1068
895427bd
JS		 1069 list_for_each_entry_safe(psb, psb_next, &nvme_aborts, list) {
1070 psb->pCmd = NULL;
1071 psb->status = IOSTAT_SUCCESS;
1072 }
1073 spin_lock_irqsave(&phba->nvme_buf_list_put_lock, iflag);
1074 list_splice(&nvme_aborts, &phba->lpfc_nvme_buf_list_put);
1075 spin_unlock_irqrestore(&phba->nvme_buf_list_put_lock, iflag);
1076
68e814f5 1077 lpfc_sli4_free_sp_events(phba);
da0436e9
JS		 1078 return 0;
1079}
1080
1081/**
1082 * lpfc_hba_down_post - Wrapper func for hba down post routine
1083 * @phba: pointer to lpfc HBA data structure.
1084 *
1085 * This routine wraps the actual SLI3 or SLI4 routine for performing
1086 * uninitialization after the HBA is reset when bring down the SLI Layer.
1087 *
1088 * Return codes
af901ca1 1089 * 0 - success.
da0436e9
JS		 1090 * Any other value - error.
1091 **/
1092int
1093lpfc_hba_down_post(struct lpfc_hba *phba)
1094{
1095 return (*phba->lpfc_hba_down_post)(phba);
1096}
41415862 1097
e59058c4 1098/**
3621a710 1099 * lpfc_hb_timeout - The HBA-timer timeout handler
e59058c4
JS		 1100 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1101 *
1102 * This is the HBA-timer timeout handler registered to the lpfc driver. When
1103 * this timer fires, a HBA timeout event shall be posted to the lpfc driver
1104 * work-port-events bitmap and the worker thread is notified. This timeout
1105 * event will be used by the worker thread to invoke the actual timeout
1106 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will
1107 * be performed in the timeout handler and the HBA timeout event bit shall
1108 * be cleared by the worker thread after it has taken the event bitmap out.
1109 **/
a6ababd2 1110static void
858c9f6c
JS		 1111lpfc_hb_timeout(unsigned long ptr)
1112{
1113 struct lpfc_hba *phba;
5e9d9b82 1114 uint32_t tmo_posted;
858c9f6c
JS		 1115 unsigned long iflag;
1116
1117 phba = (struct lpfc_hba *)ptr;
9399627f
JS		 1118
1119 /* Check for heart beat timeout conditions */
858c9f6c 1120 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
5e9d9b82
JS		 1121 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO;
1122 if (!tmo_posted)
858c9f6c
JS		 1123 phba->pport->work_port_events |= WORKER_HB_TMO;
1124 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1125
9399627f 1126 /* Tell the worker thread there is work to do */
5e9d9b82
JS		 1127 if (!tmo_posted)
1128 lpfc_worker_wake_up(phba);
858c9f6c
JS		 1129 return;
1130}
1131
19ca7609
JS		 1132/**
1133 * lpfc_rrq_timeout - The RRQ-timer timeout handler
1134 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1135 *
1136 * This is the RRQ-timer timeout handler registered to the lpfc driver. When
1137 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver
1138 * work-port-events bitmap and the worker thread is notified. This timeout
1139 * event will be used by the worker thread to invoke the actual timeout
1140 * handler routine, lpfc_rrq_handler. Any periodical operations will
1141 * be performed in the timeout handler and the RRQ timeout event bit shall
1142 * be cleared by the worker thread after it has taken the event bitmap out.
1143 **/
1144static void
1145lpfc_rrq_timeout(unsigned long ptr)
1146{
1147 struct lpfc_hba *phba;
19ca7609
JS		 1148 unsigned long iflag;
1149
1150 phba = (struct lpfc_hba *)ptr;
1151 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
06918ac5
JS		 1152 if (!(phba->pport->load_flag & FC_UNLOADING))
1153 phba->hba_flag |= HBA_RRQ_ACTIVE;
1154 else
1155 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
19ca7609 1156 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
06918ac5
JS		 1157
1158 if (!(phba->pport->load_flag & FC_UNLOADING))
1159 lpfc_worker_wake_up(phba);
19ca7609
JS		 1160}
1161
e59058c4 1162/**
3621a710 1163 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function
e59058c4
JS		 1164 * @phba: pointer to lpfc hba data structure.
1165 * @pmboxq: pointer to the driver internal queue element for mailbox command.
1166 *
1167 * This is the callback function to the lpfc heart-beat mailbox command.
1168 * If configured, the lpfc driver issues the heart-beat mailbox command to
1169 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the
1170 * heart-beat mailbox command is issued, the driver shall set up heart-beat
1171 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks
1172 * heart-beat outstanding state. Once the mailbox command comes back and
1173 * no error conditions detected, the heart-beat mailbox command timer is
1174 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding
1175 * state is cleared for the next heart-beat. If the timer expired with the
1176 * heart-beat outstanding state set, the driver will put the HBA offline.
1177 **/
858c9f6c
JS		 1178static void
1179lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
1180{
1181 unsigned long drvr_flag;
1182
1183 spin_lock_irqsave(&phba->hbalock, drvr_flag);
1184 phba->hb_outstanding = 0;
1185 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
1186
9399627f 1187 /* Check and reset heart-beat timer is necessary */
858c9f6c
JS		 1188 mempool_free(pmboxq, phba->mbox_mem_pool);
1189 if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) &&
1190 !(phba->link_state == LPFC_HBA_ERROR) &&
51ef4c26 1191 !(phba->pport->load_flag & FC_UNLOADING))
858c9f6c 1192 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1193 jiffies +
1194 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS		 1195 return;
1196}
1197
e59058c4 1198/**
3621a710 1199 * lpfc_hb_timeout_handler - The HBA-timer timeout handler
e59058c4
JS		 1200 * @phba: pointer to lpfc hba data structure.
1201 *
1202 * This is the actual HBA-timer timeout handler to be invoked by the worker
1203 * thread whenever the HBA timer fired and HBA-timeout event posted. This
1204 * handler performs any periodic operations needed for the device. If such
1205 * periodic event has already been attended to either in the interrupt handler
1206 * or by processing slow-ring or fast-ring events within the HBA-timer
1207 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets
1208 * the timer for the next timeout period. If lpfc heart-beat mailbox command
1209 * is configured and there is no heart-beat mailbox command outstanding, a
1210 * heart-beat mailbox is issued and timer set properly. Otherwise, if there
1211 * has been a heart-beat mailbox command outstanding, the HBA shall be put
1212 * to offline.
1213 **/
858c9f6c
JS		 1214void
1215lpfc_hb_timeout_handler(struct lpfc_hba *phba)
1216{
45ed1190 1217 struct lpfc_vport **vports;
858c9f6c 1218 LPFC_MBOXQ_t *pmboxq;
0ff10d46 1219 struct lpfc_dmabuf *buf_ptr;
45ed1190 1220 int retval, i;
858c9f6c 1221 struct lpfc_sli *psli = &phba->sli;
0ff10d46 1222 LIST_HEAD(completions);
858c9f6c 1223
45ed1190
JS		 1224 vports = lpfc_create_vport_work_array(phba);
1225 if (vports != NULL)
4258e98e 1226 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
45ed1190 1227 lpfc_rcv_seq_check_edtov(vports[i]);
4258e98e
JS		 1228 lpfc_fdmi_num_disc_check(vports[i]);
1229 }
45ed1190
JS		 1230 lpfc_destroy_vport_work_array(phba, vports);
1231
858c9f6c 1232 if ((phba->link_state == LPFC_HBA_ERROR) ||
51ef4c26 1233 (phba->pport->load_flag & FC_UNLOADING) ||
858c9f6c
JS		 1234 (phba->pport->fc_flag & FC_OFFLINE_MODE))
1235 return;
1236
1237 spin_lock_irq(&phba->pport->work_port_lock);
858c9f6c 1238
256ec0d0
JS		 1239 if (time_after(phba->last_completion_time +
1240 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL),
1241 jiffies)) {
858c9f6c
JS		 1242 spin_unlock_irq(&phba->pport->work_port_lock);
1243 if (!phba->hb_outstanding)
1244 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1245 jiffies +
1246 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS		 1247 else
1248 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1249 jiffies +
1250 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c
JS		 1251 return;
1252 }
1253 spin_unlock_irq(&phba->pport->work_port_lock);
1254
0ff10d46
JS		 1255 if (phba->elsbuf_cnt &&
1256 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) {
1257 spin_lock_irq(&phba->hbalock);
1258 list_splice_init(&phba->elsbuf, &completions);
1259 phba->elsbuf_cnt = 0;
1260 phba->elsbuf_prev_cnt = 0;
1261 spin_unlock_irq(&phba->hbalock);
1262
1263 while (!list_empty(&completions)) {
1264 list_remove_head(&completions, buf_ptr,
1265 struct lpfc_dmabuf, list);
1266 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
1267 kfree(buf_ptr);
1268 }
1269 }
1270 phba->elsbuf_prev_cnt = phba->elsbuf_cnt;
1271
858c9f6c 1272 /* If there is no heart beat outstanding, issue a heartbeat command */
13815c83
JS		 1273 if (phba->cfg_enable_hba_heartbeat) {
1274 if (!phba->hb_outstanding) {
bc73905a
JS		 1275 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) &&
1276 (list_empty(&psli->mboxq))) {
1277 pmboxq = mempool_alloc(phba->mbox_mem_pool,
1278 GFP_KERNEL);
1279 if (!pmboxq) {
1280 mod_timer(&phba->hb_tmofunc,
1281 jiffies +
256ec0d0
JS		 1282 msecs_to_jiffies(1000 *
1283 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS		 1284 return;
1285 }
1286
1287 lpfc_heart_beat(phba, pmboxq);
1288 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl;
1289 pmboxq->vport = phba->pport;
1290 retval = lpfc_sli_issue_mbox(phba, pmboxq,
1291 MBX_NOWAIT);
1292
1293 if (retval != MBX_BUSY &&
1294 retval != MBX_SUCCESS) {
1295 mempool_free(pmboxq,
1296 phba->mbox_mem_pool);
1297 mod_timer(&phba->hb_tmofunc,
1298 jiffies +
256ec0d0
JS		 1299 msecs_to_jiffies(1000 *
1300 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS		 1301 return;
1302 }
1303 phba->skipped_hb = 0;
1304 phba->hb_outstanding = 1;
1305 } else if (time_before_eq(phba->last_completion_time,
1306 phba->skipped_hb)) {
1307 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
1308 "2857 Last completion time not "
1309 " updated in %d ms\n",
1310 jiffies_to_msecs(jiffies
1311 - phba->last_completion_time));
1312 } else
1313 phba->skipped_hb = jiffies;
1314
858c9f6c 1315 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1316 jiffies +
1317 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1318 return;
13815c83
JS		 1319 } else {
1320 /*
1321 * If heart beat timeout called with hb_outstanding set
dcf2a4e0
JS		 1322 * we need to give the hb mailbox cmd a chance to
1323 * complete or TMO.
13815c83 1324 */
dcf2a4e0
JS		 1325 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1326 "0459 Adapter heartbeat still out"
1327 "standing:last compl time was %d ms.\n",
1328 jiffies_to_msecs(jiffies
1329 - phba->last_completion_time));
1330 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1331 jiffies +
1332 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1333 }
4258e98e
JS		 1334 } else {
1335 mod_timer(&phba->hb_tmofunc,
1336 jiffies +
1337 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS		 1338 }
1339}
1340
e59058c4 1341/**
3621a710 1342 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention
e59058c4
JS		 1343 * @phba: pointer to lpfc hba data structure.
1344 *
1345 * This routine is called to bring the HBA offline when HBA hardware error
1346 * other than Port Error 6 has been detected.
1347 **/
09372820
JS		 1348static void
1349lpfc_offline_eratt(struct lpfc_hba *phba)
1350{
1351 struct lpfc_sli *psli = &phba->sli;
1352
1353 spin_lock_irq(&phba->hbalock);
f4b4c68f 1354 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
09372820 1355 spin_unlock_irq(&phba->hbalock);
618a5230 1356 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
09372820
JS		 1357
1358 lpfc_offline(phba);
1359 lpfc_reset_barrier(phba);
f4b4c68f 1360 spin_lock_irq(&phba->hbalock);
09372820 1361 lpfc_sli_brdreset(phba);
f4b4c68f 1362 spin_unlock_irq(&phba->hbalock);
09372820
JS		 1363 lpfc_hba_down_post(phba);
1364 lpfc_sli_brdready(phba, HS_MBRDY);
1365 lpfc_unblock_mgmt_io(phba);
1366 phba->link_state = LPFC_HBA_ERROR;
1367 return;
1368}
1369
da0436e9
JS		 1370/**
1371 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention
1372 * @phba: pointer to lpfc hba data structure.
1373 *
1374 * This routine is called to bring a SLI4 HBA offline when HBA hardware error
1375 * other than Port Error 6 has been detected.
1376 **/
a88dbb6a 1377void
da0436e9
JS		 1378lpfc_sli4_offline_eratt(struct lpfc_hba *phba)
1379{
946727dc
JS		 1380 spin_lock_irq(&phba->hbalock);
1381 phba->link_state = LPFC_HBA_ERROR;
1382 spin_unlock_irq(&phba->hbalock);
1383
618a5230 1384 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
da0436e9 1385 lpfc_offline(phba);
da0436e9 1386 lpfc_hba_down_post(phba);
da0436e9 1387 lpfc_unblock_mgmt_io(phba);
da0436e9
JS		 1388}
1389
a257bf90
JS		 1390/**
1391 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler
1392 * @phba: pointer to lpfc hba data structure.
1393 *
1394 * This routine is invoked to handle the deferred HBA hardware error
1395 * conditions. This type of error is indicated by HBA by setting ER1
1396 * and another ER bit in the host status register. The driver will
1397 * wait until the ER1 bit clears before handling the error condition.
1398 **/
1399static void
1400lpfc_handle_deferred_eratt(struct lpfc_hba *phba)
1401{
1402 uint32_t old_host_status = phba->work_hs;
a257bf90
JS		 1403 struct lpfc_sli *psli = &phba->sli;
1404
f4b4c68f
JS		 1405 /* If the pci channel is offline, ignore possible errors,
1406 * since we cannot communicate with the pci card anyway.
1407 */
1408 if (pci_channel_offline(phba->pcidev)) {
1409 spin_lock_irq(&phba->hbalock);
1410 phba->hba_flag &= ~DEFER_ERATT;
1411 spin_unlock_irq(&phba->hbalock);
1412 return;
1413 }
1414
a257bf90
JS		 1415 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1416 "0479 Deferred Adapter Hardware Error "
1417 "Data: x%x x%x x%x\n",
1418 phba->work_hs,
1419 phba->work_status[0], phba->work_status[1]);
1420
1421 spin_lock_irq(&phba->hbalock);
f4b4c68f 1422 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
a257bf90
JS		 1423 spin_unlock_irq(&phba->hbalock);
1424
1425
1426 /*
1427 * Firmware stops when it triggred erratt. That could cause the I/Os
1428 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the
1429 * SCSI layer retry it after re-establishing link.
1430 */
db55fba8 1431 lpfc_sli_abort_fcp_rings(phba);
a257bf90
JS		 1432
1433 /*
1434 * There was a firmware error. Take the hba offline and then
1435 * attempt to restart it.
1436 */
618a5230 1437 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
a257bf90
JS		 1438 lpfc_offline(phba);
1439
1440 /* Wait for the ER1 bit to clear.*/
1441 while (phba->work_hs & HS_FFER1) {
1442 msleep(100);
9940b97b
JS		 1443 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) {
1444 phba->work_hs = UNPLUG_ERR ;
1445 break;
1446 }
a257bf90
JS		 1447 /* If driver is unloading let the worker thread continue */
1448 if (phba->pport->load_flag & FC_UNLOADING) {
1449 phba->work_hs = 0;
1450 break;
1451 }
1452 }
1453
1454 /*
1455 * This is to ptrotect against a race condition in which
1456 * first write to the host attention register clear the
1457 * host status register.
1458 */
1459 if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING)))
1460 phba->work_hs = old_host_status & ~HS_FFER1;
1461
3772a991 1462 spin_lock_irq(&phba->hbalock);
a257bf90 1463 phba->hba_flag &= ~DEFER_ERATT;
3772a991 1464 spin_unlock_irq(&phba->hbalock);
a257bf90
JS		 1465 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
1466 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
1467}
1468
3772a991
JS		 1469static void
1470lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba)
1471{
1472 struct lpfc_board_event_header board_event;
1473 struct Scsi_Host *shost;
1474
1475 board_event.event_type = FC_REG_BOARD_EVENT;
1476 board_event.subcategory = LPFC_EVENT_PORTINTERR;
1477 shost = lpfc_shost_from_vport(phba->pport);
1478 fc_host_post_vendor_event(shost, fc_get_event_number(),
1479 sizeof(board_event),
1480 (char *) &board_event,
1481 LPFC_NL_VENDOR_ID);
1482}
1483
e59058c4 1484/**
3772a991 1485 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler
e59058c4
JS		 1486 * @phba: pointer to lpfc hba data structure.
1487 *
1488 * This routine is invoked to handle the following HBA hardware error
1489 * conditions:
1490 * 1 - HBA error attention interrupt
1491 * 2 - DMA ring index out of range
1492 * 3 - Mailbox command came back as unknown
1493 **/
3772a991
JS		 1494static void
1495lpfc_handle_eratt_s3(struct lpfc_hba *phba)
dea3101e 1496{
2e0fef85 1497 struct lpfc_vport *vport = phba->pport;
2e0fef85 1498 struct lpfc_sli *psli = &phba->sli;
d2873e4c 1499 uint32_t event_data;
57127f15
JS		 1500 unsigned long temperature;
1501 struct temp_event temp_event_data;
92d7f7b0 1502 struct Scsi_Host *shost;
2e0fef85 1503
8d63f375 1504 /* If the pci channel is offline, ignore possible errors,
3772a991
JS		 1505 * since we cannot communicate with the pci card anyway.
1506 */
1507 if (pci_channel_offline(phba->pcidev)) {
1508 spin_lock_irq(&phba->hbalock);
1509 phba->hba_flag &= ~DEFER_ERATT;
1510 spin_unlock_irq(&phba->hbalock);
8d63f375 1511 return;
3772a991
JS		 1512 }
1513
13815c83
JS		 1514 /* If resets are disabled then leave the HBA alone and return */
1515 if (!phba->cfg_enable_hba_reset)
1516 return;
dea3101e 1517
ea2151b4 1518 /* Send an internal error event to mgmt application */
3772a991 1519 lpfc_board_errevt_to_mgmt(phba);
ea2151b4 1520
a257bf90
JS		 1521 if (phba->hba_flag & DEFER_ERATT)
1522 lpfc_handle_deferred_eratt(phba);
1523
dcf2a4e0
JS		 1524 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) {
1525 if (phba->work_hs & HS_FFER6)
1526 /* Re-establishing Link */
1527 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1528 "1301 Re-establishing Link "
1529 "Data: x%x x%x x%x\n",
1530 phba->work_hs, phba->work_status[0],
1531 phba->work_status[1]);
1532 if (phba->work_hs & HS_FFER8)
1533 /* Device Zeroization */
1534 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1535 "2861 Host Authentication device "
1536 "zeroization Data:x%x x%x x%x\n",
1537 phba->work_hs, phba->work_status[0],
1538 phba->work_status[1]);
58da1ffb 1539
92d7f7b0 1540 spin_lock_irq(&phba->hbalock);
f4b4c68f 1541 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
92d7f7b0 1542 spin_unlock_irq(&phba->hbalock);
dea3101e 1543
1544 /*
1545 * Firmware stops when it triggled erratt with HS_FFER6.
1546 * That could cause the I/Os dropped by the firmware.
1547 * Error iocb (I/O) on txcmplq and let the SCSI layer
1548 * retry it after re-establishing link.
1549 */
db55fba8 1550 lpfc_sli_abort_fcp_rings(phba);
dea3101e 1551
dea3101e 1552 /*
1553 * There was a firmware error. Take the hba offline and then
1554 * attempt to restart it.
1555 */
618a5230 1556 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
dea3101e 1557 lpfc_offline(phba);
41415862 1558 lpfc_sli_brdrestart(phba);
dea3101e 1559 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
46fa311e 1560 lpfc_unblock_mgmt_io(phba);
dea3101e 1561 return;
1562 }
46fa311e 1563 lpfc_unblock_mgmt_io(phba);
57127f15
JS		 1564 } else if (phba->work_hs & HS_CRIT_TEMP) {
1565 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET);
1566 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1567 temp_event_data.event_code = LPFC_CRIT_TEMP;
1568 temp_event_data.data = (uint32_t)temperature;
1569
1570 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d7c255b2 1571 "0406 Adapter maximum temperature exceeded "
57127f15
JS		 1572 "(%ld), taking this port offline "
1573 "Data: x%x x%x x%x\n",
1574 temperature, phba->work_hs,
1575 phba->work_status[0], phba->work_status[1]);
1576
1577 shost = lpfc_shost_from_vport(phba->pport);
1578 fc_host_post_vendor_event(shost, fc_get_event_number(),
1579 sizeof(temp_event_data),
1580 (char *) &temp_event_data,
1581 SCSI_NL_VID_TYPE_PCI
1582 | PCI_VENDOR_ID_EMULEX);
1583
7af67051 1584 spin_lock_irq(&phba->hbalock);
7af67051
JS		 1585 phba->over_temp_state = HBA_OVER_TEMP;
1586 spin_unlock_irq(&phba->hbalock);
09372820 1587 lpfc_offline_eratt(phba);
57127f15 1588
dea3101e 1589 } else {
1590 /* The if clause above forces this code path when the status
9399627f
JS		 1591 * failure is a value other than FFER6. Do not call the offline
1592 * twice. This is the adapter hardware error path.
dea3101e 1593 */
1594 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 1595 "0457 Adapter Hardware Error "
dea3101e 1596 "Data: x%x x%x x%x\n",
e8b62011 1597 phba->work_hs,
dea3101e 1598 phba->work_status[0], phba->work_status[1]);
1599
d2873e4c 1600 event_data = FC_REG_DUMP_EVENT;
92d7f7b0 1601 shost = lpfc_shost_from_vport(vport);
2e0fef85 1602 fc_host_post_vendor_event(shost, fc_get_event_number(),
d2873e4c
JS		 1603 sizeof(event_data), (char *) &event_data,
1604 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
1605
09372820 1606 lpfc_offline_eratt(phba);
dea3101e 1607 }
9399627f 1608 return;
dea3101e 1609}
1610
618a5230
JS		 1611/**
1612 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg
1613 * @phba: pointer to lpfc hba data structure.
1614 * @mbx_action: flag for mailbox shutdown action.
1615 *
1616 * This routine is invoked to perform an SLI4 port PCI function reset in
1617 * response to port status register polling attention. It waits for port
1618 * status register (ERR, RDY, RN) bits before proceeding with function reset.
1619 * During this process, interrupt vectors are freed and later requested
1620 * for handling possible port resource change.
1621 **/
1622static int
e10b2022
JS		 1623lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action,
1624 bool en_rn_msg)
618a5230
JS		 1625{
1626 int rc;
1627 uint32_t intr_mode;
1628
65791f1f
JS		 1629 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
1630 LPFC_SLI_INTF_IF_TYPE_2) {
1631 /*
1632 * On error status condition, driver need to wait for port
1633 * ready before performing reset.
1634 */
1635 rc = lpfc_sli4_pdev_status_reg_wait(phba);
0e916ee7 1636 if (rc)
65791f1f
JS		 1637 return rc;
1638 }
0e916ee7 1639
65791f1f
JS		 1640 /* need reset: attempt for port recovery */
1641 if (en_rn_msg)
1642 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1643 "2887 Reset Needed: Attempting Port "
1644 "Recovery...\n");
1645 lpfc_offline_prep(phba, mbx_action);
1646 lpfc_offline(phba);
1647 /* release interrupt for possible resource change */
1648 lpfc_sli4_disable_intr(phba);
1649 lpfc_sli_brdrestart(phba);
1650 /* request and enable interrupt */
1651 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
1652 if (intr_mode == LPFC_INTR_ERROR) {
1653 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1654 "3175 Failed to enable interrupt\n");
1655 return -EIO;
618a5230 1656 }
65791f1f
JS		 1657 phba->intr_mode = intr_mode;
1658 rc = lpfc_online(phba);
1659 if (rc == 0)
1660 lpfc_unblock_mgmt_io(phba);
1661
618a5230
JS		 1662 return rc;
1663}
1664
da0436e9
JS		 1665/**
1666 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler
1667 * @phba: pointer to lpfc hba data structure.
1668 *
1669 * This routine is invoked to handle the SLI4 HBA hardware error attention
1670 * conditions.
1671 **/
1672static void
1673lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1674{
1675 struct lpfc_vport *vport = phba->pport;
1676 uint32_t event_data;
1677 struct Scsi_Host *shost;
2fcee4bf 1678 uint32_t if_type;
2e90f4b5
JS		 1679 struct lpfc_register portstat_reg = {0};
1680 uint32_t reg_err1, reg_err2;
1681 uint32_t uerrlo_reg, uemasklo_reg;
65791f1f 1682 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2;
e10b2022 1683 bool en_rn_msg = true;
946727dc 1684 struct temp_event temp_event_data;
65791f1f
JS		 1685 struct lpfc_register portsmphr_reg;
1686 int rc, i;
da0436e9
JS		 1687
1688 /* If the pci channel is offline, ignore possible errors, since
1689 * we cannot communicate with the pci card anyway.
1690 */
1691 if (pci_channel_offline(phba->pcidev))
1692 return;
da0436e9 1693
65791f1f 1694 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
2fcee4bf
JS		 1695 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
1696 switch (if_type) {
1697 case LPFC_SLI_INTF_IF_TYPE_0:
2e90f4b5
JS		 1698 pci_rd_rc1 = lpfc_readl(
1699 phba->sli4_hba.u.if_type0.UERRLOregaddr,
1700 &uerrlo_reg);
1701 pci_rd_rc2 = lpfc_readl(
1702 phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
1703 &uemasklo_reg);
1704 /* consider PCI bus read error as pci_channel_offline */
1705 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO)
1706 return;
65791f1f
JS		 1707 if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) {
1708 lpfc_sli4_offline_eratt(phba);
1709 return;
1710 }
1711 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1712 "7623 Checking UE recoverable");
1713
1714 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
1715 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1716 &portsmphr_reg.word0))
1717 continue;
1718
1719 smphr_port_status = bf_get(lpfc_port_smphr_port_status,
1720 &portsmphr_reg);
1721 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1722 LPFC_PORT_SEM_UE_RECOVERABLE)
1723 break;
1724 /*Sleep for 1Sec, before checking SEMAPHORE */
1725 msleep(1000);
1726 }
1727
1728 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1729 "4827 smphr_port_status x%x : Waited %dSec",
1730 smphr_port_status, i);
1731
1732 /* Recoverable UE, reset the HBA device */
1733 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1734 LPFC_PORT_SEM_UE_RECOVERABLE) {
1735 for (i = 0; i < 20; i++) {
1736 msleep(1000);
1737 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1738 &portsmphr_reg.word0) &&
1739 (LPFC_POST_STAGE_PORT_READY ==
1740 bf_get(lpfc_port_smphr_port_status,
1741 &portsmphr_reg))) {
1742 rc = lpfc_sli4_port_sta_fn_reset(phba,
1743 LPFC_MBX_NO_WAIT, en_rn_msg);
1744 if (rc == 0)
1745 return;
1746 lpfc_printf_log(phba,
1747 KERN_ERR, LOG_INIT,
1748 "4215 Failed to recover UE");
1749 break;
1750 }
1751 }
1752 }
1753 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1754 "7624 Firmware not ready: Failing UE recovery,"
1755 " waited %dSec", i);
2fcee4bf
JS		 1756 lpfc_sli4_offline_eratt(phba);
1757 break;
946727dc 1758
2fcee4bf 1759 case LPFC_SLI_INTF_IF_TYPE_2:
2e90f4b5
JS		 1760 pci_rd_rc1 = lpfc_readl(
1761 phba->sli4_hba.u.if_type2.STATUSregaddr,
1762 &portstat_reg.word0);
1763 /* consider PCI bus read error as pci_channel_offline */
6b5151fd
JS		 1764 if (pci_rd_rc1 == -EIO) {
1765 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1766 "3151 PCI bus read access failure: x%x\n",
1767 readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
2e90f4b5 1768 return;
6b5151fd 1769 }
2e90f4b5
JS		 1770 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
1771 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
2fcee4bf 1772 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
2fcee4bf
JS		 1773 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1774 "2889 Port Overtemperature event, "
946727dc
JS		 1775 "taking port offline Data: x%x x%x\n",
1776 reg_err1, reg_err2);
1777
310429ef 1778 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS		 1779 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1780 temp_event_data.event_code = LPFC_CRIT_TEMP;
1781 temp_event_data.data = 0xFFFFFFFF;
1782
1783 shost = lpfc_shost_from_vport(phba->pport);
1784 fc_host_post_vendor_event(shost, fc_get_event_number(),
1785 sizeof(temp_event_data),
1786 (char *)&temp_event_data,
1787 SCSI_NL_VID_TYPE_PCI
1788 | PCI_VENDOR_ID_EMULEX);
1789
2fcee4bf
JS		 1790 spin_lock_irq(&phba->hbalock);
1791 phba->over_temp_state = HBA_OVER_TEMP;
1792 spin_unlock_irq(&phba->hbalock);
1793 lpfc_sli4_offline_eratt(phba);
946727dc 1794 return;
2fcee4bf 1795 }
2e90f4b5 1796 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
e10b2022 1797 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) {
2e90f4b5 1798 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e10b2022
JS		 1799 "3143 Port Down: Firmware Update "
1800 "Detected\n");
1801 en_rn_msg = false;
1802 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2e90f4b5
JS		 1803 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1804 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1805 "3144 Port Down: Debug Dump\n");
1806 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1807 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON)
1808 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1809 "3145 Port Down: Provisioning\n");
618a5230 1810
946727dc
JS		 1811 /* If resets are disabled then leave the HBA alone and return */
1812 if (!phba->cfg_enable_hba_reset)
1813 return;
1814
618a5230 1815 /* Check port status register for function reset */
e10b2022
JS		 1816 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT,
1817 en_rn_msg);
618a5230
JS		 1818 if (rc == 0) {
1819 /* don't report event on forced debug dump */
1820 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1821 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1822 return;
1823 else
1824 break;
2fcee4bf 1825 }
618a5230 1826 /* fall through for not able to recover */
6b5151fd
JS		 1827 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1828 "3152 Unrecoverable error, bring the port "
1829 "offline\n");
2fcee4bf
JS		 1830 lpfc_sli4_offline_eratt(phba);
1831 break;
1832 case LPFC_SLI_INTF_IF_TYPE_1:
1833 default:
1834 break;
1835 }
2e90f4b5
JS		 1836 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1837 "3123 Report dump event to upper layer\n");
1838 /* Send an internal error event to mgmt application */
1839 lpfc_board_errevt_to_mgmt(phba);
1840
1841 event_data = FC_REG_DUMP_EVENT;
1842 shost = lpfc_shost_from_vport(vport);
1843 fc_host_post_vendor_event(shost, fc_get_event_number(),
1844 sizeof(event_data), (char *) &event_data,
1845 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
da0436e9
JS		 1846}
1847
1848/**
1849 * lpfc_handle_eratt - Wrapper func for handling hba error attention
1850 * @phba: pointer to lpfc HBA data structure.
1851 *
1852 * This routine wraps the actual SLI3 or SLI4 hba error attention handling
1853 * routine from the API jump table function pointer from the lpfc_hba struct.
1854 *
1855 * Return codes
af901ca1 1856 * 0 - success.
da0436e9
JS		 1857 * Any other value - error.
1858 **/
1859void
1860lpfc_handle_eratt(struct lpfc_hba *phba)
1861{
1862 (*phba->lpfc_handle_eratt)(phba);
1863}
1864
e59058c4 1865/**
3621a710 1866 * lpfc_handle_latt - The HBA link event handler
e59058c4
JS		 1867 * @phba: pointer to lpfc hba data structure.
1868 *
1869 * This routine is invoked from the worker thread to handle a HBA host
895427bd 1870 * attention link event. SLI3 only.
e59058c4 1871 **/
dea3101e 1872void
2e0fef85 1873lpfc_handle_latt(struct lpfc_hba *phba)
dea3101e 1874{
2e0fef85
JS		 1875 struct lpfc_vport *vport = phba->pport;
1876 struct lpfc_sli *psli = &phba->sli;
dea3101e 1877 LPFC_MBOXQ_t *pmb;
1878 volatile uint32_t control;
1879 struct lpfc_dmabuf *mp;
09372820 1880 int rc = 0;
dea3101e 1881
1882 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
09372820
JS		 1883 if (!pmb) {
1884 rc = 1;
dea3101e 1885 goto lpfc_handle_latt_err_exit;
09372820 1886 }
dea3101e 1887
1888 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
09372820
JS		 1889 if (!mp) {
1890 rc = 2;
dea3101e 1891 goto lpfc_handle_latt_free_pmb;
09372820 1892 }
dea3101e 1893
1894 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
09372820
JS		 1895 if (!mp->virt) {
1896 rc = 3;
dea3101e 1897 goto lpfc_handle_latt_free_mp;
09372820 1898 }
dea3101e 1899
6281bfe0 1900 /* Cleanup any outstanding ELS commands */
549e55cd 1901 lpfc_els_flush_all_cmd(phba);
dea3101e 1902
1903 psli->slistat.link_event++;
76a95d75
JS		 1904 lpfc_read_topology(phba, pmb, mp);
1905 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
2e0fef85 1906 pmb->vport = vport;
0d2b6b83 1907 /* Block ELS IOCBs until we have processed this mbox command */
895427bd 1908 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
0b727fea 1909 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT);
09372820
JS		 1910 if (rc == MBX_NOT_FINISHED) {
1911 rc = 4;
14691150 1912 goto lpfc_handle_latt_free_mbuf;
09372820 1913 }
dea3101e 1914
1915 /* Clear Link Attention in HA REG */
2e0fef85 1916 spin_lock_irq(&phba->hbalock);
dea3101e 1917 writel(HA_LATT, phba->HAregaddr);
1918 readl(phba->HAregaddr); /* flush */
2e0fef85 1919 spin_unlock_irq(&phba->hbalock);
dea3101e 1920
1921 return;
1922
14691150 1923lpfc_handle_latt_free_mbuf:
895427bd 1924 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
14691150 1925 lpfc_mbuf_free(phba, mp->virt, mp->phys);
dea3101e 1926lpfc_handle_latt_free_mp:
1927 kfree(mp);
1928lpfc_handle_latt_free_pmb:
1dcb58e5 1929 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 1930lpfc_handle_latt_err_exit:
1931 /* Enable Link attention interrupts */
2e0fef85 1932 spin_lock_irq(&phba->hbalock);
dea3101e 1933 psli->sli_flag |= LPFC_PROCESS_LA;
1934 control = readl(phba->HCregaddr);
1935 control |= HC_LAINT_ENA;
1936 writel(control, phba->HCregaddr);
1937 readl(phba->HCregaddr); /* flush */
1938
1939 /* Clear Link Attention in HA REG */
1940 writel(HA_LATT, phba->HAregaddr);
1941 readl(phba->HAregaddr); /* flush */
2e0fef85 1942 spin_unlock_irq(&phba->hbalock);
dea3101e 1943 lpfc_linkdown(phba);
2e0fef85 1944 phba->link_state = LPFC_HBA_ERROR;
dea3101e 1945
09372820
JS		 1946 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
1947 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc);
dea3101e 1948
1949 return;
1950}
1951
e59058c4 1952/**
3621a710 1953 * lpfc_parse_vpd - Parse VPD (Vital Product Data)
e59058c4
JS		 1954 * @phba: pointer to lpfc hba data structure.
1955 * @vpd: pointer to the vital product data.
1956 * @len: length of the vital product data in bytes.
1957 *
1958 * This routine parses the Vital Product Data (VPD). The VPD is treated as
1959 * an array of characters. In this routine, the ModelName, ProgramType, and
1960 * ModelDesc, etc. fields of the phba data structure will be populated.
1961 *
1962 * Return codes
1963 * 0 - pointer to the VPD passed in is NULL
1964 * 1 - success
1965 **/
3772a991 1966int
2e0fef85 1967lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len)
dea3101e 1968{
1969 uint8_t lenlo, lenhi;
07da60c1 1970 int Length;
dea3101e 1971 int i, j;
1972 int finished = 0;
1973 int index = 0;
1974
1975 if (!vpd)
1976 return 0;
1977
1978 /* Vital Product */
ed957684 1979 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 1980 "0455 Vital Product Data: x%x x%x x%x x%x\n",
dea3101e 1981 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
1982 (uint32_t) vpd[3]);
74b72a59 1983 while (!finished && (index < (len - 4))) {
dea3101e 1984 switch (vpd[index]) {
1985 case 0x82:
74b72a59 1986 case 0x91:
dea3101e 1987 index += 1;
1988 lenlo = vpd[index];
1989 index += 1;
1990 lenhi = vpd[index];
1991 index += 1;
1992 i = ((((unsigned short)lenhi) << 8) + lenlo);
1993 index += i;
1994 break;
1995 case 0x90:
1996 index += 1;
1997 lenlo = vpd[index];
1998 index += 1;
1999 lenhi = vpd[index];
2000 index += 1;
2001 Length = ((((unsigned short)lenhi) << 8) + lenlo);
74b72a59
JW		 2002 if (Length > len - index)
2003 Length = len - index;
dea3101e 2004 while (Length > 0) {
2005 /* Look for Serial Number */
2006 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
2007 index += 2;
2008 i = vpd[index];
2009 index += 1;
2010 j = 0;
2011 Length -= (3+i);
2012 while(i--) {
2013 phba->SerialNumber[j++] = vpd[index++];
2014 if (j == 31)
2015 break;
2016 }
2017 phba->SerialNumber[j] = 0;
2018 continue;
2019 }
2020 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
2021 phba->vpd_flag |= VPD_MODEL_DESC;
2022 index += 2;
2023 i = vpd[index];
2024 index += 1;
2025 j = 0;
2026 Length -= (3+i);
2027 while(i--) {
2028 phba->ModelDesc[j++] = vpd[index++];
2029 if (j == 255)
2030 break;
2031 }
2032 phba->ModelDesc[j] = 0;
2033 continue;
2034 }
2035 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
2036 phba->vpd_flag |= VPD_MODEL_NAME;
2037 index += 2;
2038 i = vpd[index];
2039 index += 1;
2040 j = 0;
2041 Length -= (3+i);
2042 while(i--) {
2043 phba->ModelName[j++] = vpd[index++];
2044 if (j == 79)
2045 break;
2046 }
2047 phba->ModelName[j] = 0;
2048 continue;
2049 }
2050 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
2051 phba->vpd_flag |= VPD_PROGRAM_TYPE;
2052 index += 2;
2053 i = vpd[index];
2054 index += 1;
2055 j = 0;
2056 Length -= (3+i);
2057 while(i--) {
2058 phba->ProgramType[j++] = vpd[index++];
2059 if (j == 255)
2060 break;
2061 }
2062 phba->ProgramType[j] = 0;
2063 continue;
2064 }
2065 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
2066 phba->vpd_flag |= VPD_PORT;
2067 index += 2;
2068 i = vpd[index];
2069 index += 1;
2070 j = 0;
2071 Length -= (3+i);
2072 while(i--) {
cd1c8301
JS		 2073 if ((phba->sli_rev == LPFC_SLI_REV4) &&
2074 (phba->sli4_hba.pport_name_sta ==
2075 LPFC_SLI4_PPNAME_GET)) {
2076 j++;
2077 index++;
2078 } else
2079 phba->Port[j++] = vpd[index++];
2080 if (j == 19)
2081 break;
dea3101e 2082 }
cd1c8301
JS		 2083 if ((phba->sli_rev != LPFC_SLI_REV4) ||
2084 (phba->sli4_hba.pport_name_sta ==
2085 LPFC_SLI4_PPNAME_NON))
2086 phba->Port[j] = 0;
dea3101e 2087 continue;
2088 }
2089 else {
2090 index += 2;
2091 i = vpd[index];
2092 index += 1;
2093 index += i;
2094 Length -= (3 + i);
2095 }
2096 }
2097 finished = 0;
2098 break;
2099 case 0x78:
2100 finished = 1;
2101 break;
2102 default:
2103 index ++;
2104 break;
2105 }
74b72a59 2106 }
dea3101e 2107
2108 return(1);
2109}
2110
e59058c4 2111/**
3621a710 2112 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description
e59058c4
JS		 2113 * @phba: pointer to lpfc hba data structure.
2114 * @mdp: pointer to the data structure to hold the derived model name.
2115 * @descp: pointer to the data structure to hold the derived description.
2116 *
2117 * This routine retrieves HBA's description based on its registered PCI device
2118 * ID. The @descp passed into this function points to an array of 256 chars. It
2119 * shall be returned with the model name, maximum speed, and the host bus type.
2120 * The @mdp passed into this function points to an array of 80 chars. When the
2121 * function returns, the @mdp will be filled with the model name.
2122 **/
dea3101e 2123static void
2e0fef85 2124lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
dea3101e 2125{
2126 lpfc_vpd_t *vp;
fefcb2b6 2127 uint16_t dev_id = phba->pcidev->device;
74b72a59 2128 int max_speed;
84774a4d 2129 int GE = 0;
da0436e9 2130 int oneConnect = 0; /* default is not a oneConnect */
74b72a59 2131 struct {
a747c9ce
JS		 2132 char *name;
2133 char *bus;
2134 char *function;
2135 } m = {"<Unknown>", "", ""};
74b72a59
JW		 2136
2137 if (mdp && mdp[0] != '\0'
2138 && descp && descp[0] != '\0')
2139 return;
2140
d38dd52c
JS		 2141 if (phba->lmt & LMT_32Gb)
2142 max_speed = 32;
2143 else if (phba->lmt & LMT_16Gb)
c0c11512
JS		 2144 max_speed = 16;
2145 else if (phba->lmt & LMT_10Gb)
74b72a59
JW		 2146 max_speed = 10;
2147 else if (phba->lmt & LMT_8Gb)
2148 max_speed = 8;
2149 else if (phba->lmt & LMT_4Gb)
2150 max_speed = 4;
2151 else if (phba->lmt & LMT_2Gb)
2152 max_speed = 2;
4169d868 2153 else if (phba->lmt & LMT_1Gb)
74b72a59 2154 max_speed = 1;
4169d868
JS		 2155 else
2156 max_speed = 0;
dea3101e 2157
2158 vp = &phba->vpd;
dea3101e 2159
e4adb204 2160 switch (dev_id) {
06325e74 2161 case PCI_DEVICE_ID_FIREFLY:
12222f4f
JS		 2162 m = (typeof(m)){"LP6000", "PCI",
2163 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2164 break;
dea3101e 2165 case PCI_DEVICE_ID_SUPERFLY:
2166 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
12222f4f 2167 m = (typeof(m)){"LP7000", "PCI", ""};
dea3101e 2168 else
12222f4f
JS		 2169 m = (typeof(m)){"LP7000E", "PCI", ""};
2170 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e 2171 break;
2172 case PCI_DEVICE_ID_DRAGONFLY:
a747c9ce 2173 m = (typeof(m)){"LP8000", "PCI",
12222f4f 2174 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2175 break;
2176 case PCI_DEVICE_ID_CENTAUR:
2177 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
12222f4f 2178 m = (typeof(m)){"LP9002", "PCI", ""};
dea3101e 2179 else
12222f4f
JS		 2180 m = (typeof(m)){"LP9000", "PCI", ""};
2181 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e 2182 break;
2183 case PCI_DEVICE_ID_RFLY:
a747c9ce 2184 m = (typeof(m)){"LP952", "PCI",
12222f4f 2185 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2186 break;
2187 case PCI_DEVICE_ID_PEGASUS:
a747c9ce 2188 m = (typeof(m)){"LP9802", "PCI-X",
12222f4f 2189 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2190 break;
2191 case PCI_DEVICE_ID_THOR:
a747c9ce 2192 m = (typeof(m)){"LP10000", "PCI-X",
12222f4f 2193 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2194 break;
2195 case PCI_DEVICE_ID_VIPER:
a747c9ce 2196 m = (typeof(m)){"LPX1000", "PCI-X",
12222f4f 2197 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2198 break;
2199 case PCI_DEVICE_ID_PFLY:
a747c9ce 2200 m = (typeof(m)){"LP982", "PCI-X",
12222f4f 2201 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2202 break;
2203 case PCI_DEVICE_ID_TFLY:
a747c9ce 2204 m = (typeof(m)){"LP1050", "PCI-X",
12222f4f 2205 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2206 break;
2207 case PCI_DEVICE_ID_HELIOS:
a747c9ce 2208 m = (typeof(m)){"LP11000", "PCI-X2",
12222f4f 2209 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2210 break;
e4adb204 2211 case PCI_DEVICE_ID_HELIOS_SCSP:
a747c9ce 2212 m = (typeof(m)){"LP11000-SP", "PCI-X2",
12222f4f 2213 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC		 2214 break;
2215 case PCI_DEVICE_ID_HELIOS_DCSP:
a747c9ce 2216 m = (typeof(m)){"LP11002-SP", "PCI-X2",
12222f4f 2217 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC		 2218 break;
2219 case PCI_DEVICE_ID_NEPTUNE:
12222f4f
JS		 2220 m = (typeof(m)){"LPe1000", "PCIe",
2221 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC		 2222 break;
2223 case PCI_DEVICE_ID_NEPTUNE_SCSP:
12222f4f
JS		 2224 m = (typeof(m)){"LPe1000-SP", "PCIe",
2225 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC		 2226 break;
2227 case PCI_DEVICE_ID_NEPTUNE_DCSP:
12222f4f
JS		 2228 m = (typeof(m)){"LPe1002-SP", "PCIe",
2229 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204 2230 break;
dea3101e 2231 case PCI_DEVICE_ID_BMID:
a747c9ce 2232 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"};
dea3101e 2233 break;
2234 case PCI_DEVICE_ID_BSMB:
12222f4f
JS		 2235 m = (typeof(m)){"LP111", "PCI-X2",
2236 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2237 break;
2238 case PCI_DEVICE_ID_ZEPHYR:
a747c9ce 2239 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
dea3101e 2240 break;
e4adb204 2241 case PCI_DEVICE_ID_ZEPHYR_SCSP:
a747c9ce 2242 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
e4adb204
JSEC		 2243 break;
2244 case PCI_DEVICE_ID_ZEPHYR_DCSP:
a747c9ce 2245 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"};
a257bf90 2246 GE = 1;
e4adb204 2247 break;
dea3101e 2248 case PCI_DEVICE_ID_ZMID:
a747c9ce 2249 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"};
dea3101e 2250 break;
2251 case PCI_DEVICE_ID_ZSMB:
a747c9ce 2252 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"};
dea3101e 2253 break;
2254 case PCI_DEVICE_ID_LP101:
12222f4f
JS		 2255 m = (typeof(m)){"LP101", "PCI-X",
2256 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2257 break;
2258 case PCI_DEVICE_ID_LP10000S:
12222f4f
JS		 2259 m = (typeof(m)){"LP10000-S", "PCI",
2260 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2261 break;
e4adb204 2262 case PCI_DEVICE_ID_LP11000S:
12222f4f
JS		 2263 m = (typeof(m)){"LP11000-S", "PCI-X2",
2264 "Obsolete, Unsupported Fibre Channel Adapter"};
18a3b596 2265 break;
e4adb204 2266 case PCI_DEVICE_ID_LPE11000S:
12222f4f
JS		 2267 m = (typeof(m)){"LPe11000-S", "PCIe",
2268 "Obsolete, Unsupported Fibre Channel Adapter"};
5cc36b3c 2269 break;
b87eab38 2270 case PCI_DEVICE_ID_SAT:
a747c9ce 2271 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2272 break;
2273 case PCI_DEVICE_ID_SAT_MID:
a747c9ce 2274 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2275 break;
2276 case PCI_DEVICE_ID_SAT_SMB:
a747c9ce 2277 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2278 break;
2279 case PCI_DEVICE_ID_SAT_DCSP:
a747c9ce 2280 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2281 break;
2282 case PCI_DEVICE_ID_SAT_SCSP:
a747c9ce 2283 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2284 break;
2285 case PCI_DEVICE_ID_SAT_S:
a747c9ce 2286 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"};
b87eab38 2287 break;
84774a4d 2288 case PCI_DEVICE_ID_HORNET:
12222f4f
JS		 2289 m = (typeof(m)){"LP21000", "PCIe",
2290 "Obsolete, Unsupported FCoE Adapter"};
84774a4d
JS		 2291 GE = 1;
2292 break;
2293 case PCI_DEVICE_ID_PROTEUS_VF:
a747c9ce 2294 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2295 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS		 2296 break;
2297 case PCI_DEVICE_ID_PROTEUS_PF:
a747c9ce 2298 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2299 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS		 2300 break;
2301 case PCI_DEVICE_ID_PROTEUS_S:
a747c9ce 2302 m = (typeof(m)){"LPemv12002-S", "PCIe IOV",
12222f4f 2303 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d 2304 break;
da0436e9
JS		 2305 case PCI_DEVICE_ID_TIGERSHARK:
2306 oneConnect = 1;
a747c9ce 2307 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"};
da0436e9 2308 break;
a747c9ce 2309 case PCI_DEVICE_ID_TOMCAT:
6669f9bb 2310 oneConnect = 1;
a747c9ce
JS		 2311 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"};
2312 break;
2313 case PCI_DEVICE_ID_FALCON:
2314 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe",
2315 "EmulexSecure Fibre"};
6669f9bb 2316 break;
98fc5dd9
JS		 2317 case PCI_DEVICE_ID_BALIUS:
2318 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O",
12222f4f 2319 "Obsolete, Unsupported Fibre Channel Adapter"};
98fc5dd9 2320 break;
085c647c 2321 case PCI_DEVICE_ID_LANCER_FC:
c0c11512 2322 m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"};
085c647c 2323 break;
12222f4f
JS		 2324 case PCI_DEVICE_ID_LANCER_FC_VF:
2325 m = (typeof(m)){"LPe16000", "PCIe",
2326 "Obsolete, Unsupported Fibre Channel Adapter"};
2327 break;
085c647c
JS		 2328 case PCI_DEVICE_ID_LANCER_FCOE:
2329 oneConnect = 1;
079b5c91 2330 m = (typeof(m)){"OCe15100", "PCIe", "FCoE"};
085c647c 2331 break;
12222f4f
JS		 2332 case PCI_DEVICE_ID_LANCER_FCOE_VF:
2333 oneConnect = 1;
2334 m = (typeof(m)){"OCe15100", "PCIe",
2335 "Obsolete, Unsupported FCoE"};
2336 break;
d38dd52c
JS		 2337 case PCI_DEVICE_ID_LANCER_G6_FC:
2338 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"};
2339 break;
f8cafd38
JS		 2340 case PCI_DEVICE_ID_SKYHAWK:
2341 case PCI_DEVICE_ID_SKYHAWK_VF:
2342 oneConnect = 1;
2343 m = (typeof(m)){"OCe14000", "PCIe", "FCoE"};
2344 break;
5cc36b3c 2345 default:
a747c9ce 2346 m = (typeof(m)){"Unknown", "", ""};
e4adb204 2347 break;
dea3101e 2348 }
74b72a59
JW		 2349
2350 if (mdp && mdp[0] == '\0')
2351 snprintf(mdp, 79,"%s", m.name);
c0c11512
JS		 2352 /*
2353 * oneConnect hba requires special processing, they are all initiators
da0436e9
JS		 2354 * and we put the port number on the end
2355 */
2356 if (descp && descp[0] == '\0') {
2357 if (oneConnect)
2358 snprintf(descp, 255,
4169d868 2359 "Emulex OneConnect %s, %s Initiator %s",
a747c9ce 2360 m.name, m.function,
da0436e9 2361 phba->Port);
4169d868
JS		 2362 else if (max_speed == 0)
2363 snprintf(descp, 255,
290237d2 2364 "Emulex %s %s %s",
4169d868 2365 m.name, m.bus, m.function);
da0436e9
JS		 2366 else
2367 snprintf(descp, 255,
2368 "Emulex %s %d%s %s %s",
a747c9ce
JS		 2369 m.name, max_speed, (GE) ? "GE" : "Gb",
2370 m.bus, m.function);
da0436e9 2371 }
dea3101e 2372}
2373
e59058c4 2374/**
3621a710 2375 * lpfc_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring
e59058c4
JS		 2376 * @phba: pointer to lpfc hba data structure.
2377 * @pring: pointer to a IOCB ring.
2378 * @cnt: the number of IOCBs to be posted to the IOCB ring.
2379 *
2380 * This routine posts a given number of IOCBs with the associated DMA buffer
2381 * descriptors specified by the cnt argument to the given IOCB ring.
2382 *
2383 * Return codes
2384 * The number of IOCBs NOT able to be posted to the IOCB ring.
2385 **/
dea3101e 2386int
495a714c 2387lpfc_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt)
dea3101e 2388{
2389 IOCB_t *icmd;
0bd4ca25 2390 struct lpfc_iocbq *iocb;
dea3101e 2391 struct lpfc_dmabuf *mp1, *mp2;
2392
2393 cnt += pring->missbufcnt;
2394
2395 /* While there are buffers to post */
2396 while (cnt > 0) {
2397 /* Allocate buffer for command iocb */
0bd4ca25 2398 iocb = lpfc_sli_get_iocbq(phba);
dea3101e 2399 if (iocb == NULL) {
2400 pring->missbufcnt = cnt;
2401 return cnt;
2402 }
dea3101e 2403 icmd = &iocb->iocb;
2404
2405 /* 2 buffers can be posted per command */
2406 /* Allocate buffer to post */
2407 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2408 if (mp1)
98c9ea5c
JS		 2409 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys);
2410 if (!mp1 || !mp1->virt) {
c9475cb0 2411 kfree(mp1);
604a3e30 2412 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2413 pring->missbufcnt = cnt;
2414 return cnt;
2415 }
2416
2417 INIT_LIST_HEAD(&mp1->list);
2418 /* Allocate buffer to post */
2419 if (cnt > 1) {
2420 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2421 if (mp2)
2422 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
2423 &mp2->phys);
98c9ea5c 2424 if (!mp2 || !mp2->virt) {
c9475cb0 2425 kfree(mp2);
dea3101e 2426 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2427 kfree(mp1);
604a3e30 2428 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2429 pring->missbufcnt = cnt;
2430 return cnt;
2431 }
2432
2433 INIT_LIST_HEAD(&mp2->list);
2434 } else {
2435 mp2 = NULL;
2436 }
2437
2438 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
2439 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
2440 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
2441 icmd->ulpBdeCount = 1;
2442 cnt--;
2443 if (mp2) {
2444 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
2445 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
2446 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
2447 cnt--;
2448 icmd->ulpBdeCount = 2;
2449 }
2450
2451 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
2452 icmd->ulpLe = 1;
2453
3772a991
JS		 2454 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) ==
2455 IOCB_ERROR) {
dea3101e 2456 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2457 kfree(mp1);
2458 cnt++;
2459 if (mp2) {
2460 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
2461 kfree(mp2);
2462 cnt++;
2463 }
604a3e30 2464 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2465 pring->missbufcnt = cnt;
dea3101e 2466 return cnt;
2467 }
dea3101e 2468 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
92d7f7b0 2469 if (mp2)
dea3101e 2470 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
dea3101e 2471 }
2472 pring->missbufcnt = 0;
2473 return 0;
2474}
2475
e59058c4 2476/**
3621a710 2477 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring
e59058c4
JS		 2478 * @phba: pointer to lpfc hba data structure.
2479 *
2480 * This routine posts initial receive IOCB buffers to the ELS ring. The
2481 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is
895427bd 2482 * set to 64 IOCBs. SLI3 only.
e59058c4
JS		 2483 *
2484 * Return codes
2485 * 0 - success (currently always success)
2486 **/
dea3101e 2487static int
2e0fef85 2488lpfc_post_rcv_buf(struct lpfc_hba *phba)
dea3101e 2489{
2490 struct lpfc_sli *psli = &phba->sli;
2491
2492 /* Ring 0, ELS / CT buffers */
895427bd 2493 lpfc_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0);
dea3101e 2494 /* Ring 2 - FCP no buffers needed */
2495
2496 return 0;
2497}
2498
2499#define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
2500
e59058c4 2501/**
3621a710 2502 * lpfc_sha_init - Set up initial array of hash table entries
e59058c4
JS		 2503 * @HashResultPointer: pointer to an array as hash table.
2504 *
2505 * This routine sets up the initial values to the array of hash table entries
2506 * for the LC HBAs.
2507 **/
dea3101e 2508static void
2509lpfc_sha_init(uint32_t * HashResultPointer)
2510{
2511 HashResultPointer[0] = 0x67452301;
2512 HashResultPointer[1] = 0xEFCDAB89;
2513 HashResultPointer[2] = 0x98BADCFE;
2514 HashResultPointer[3] = 0x10325476;
2515 HashResultPointer[4] = 0xC3D2E1F0;
2516}
2517
e59058c4 2518/**
3621a710 2519 * lpfc_sha_iterate - Iterate initial hash table with the working hash table
e59058c4
JS		 2520 * @HashResultPointer: pointer to an initial/result hash table.
2521 * @HashWorkingPointer: pointer to an working hash table.
2522 *
2523 * This routine iterates an initial hash table pointed by @HashResultPointer
2524 * with the values from the working hash table pointeed by @HashWorkingPointer.
2525 * The results are putting back to the initial hash table, returned through
2526 * the @HashResultPointer as the result hash table.
2527 **/
dea3101e 2528static void
2529lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
2530{
2531 int t;
2532 uint32_t TEMP;
2533 uint32_t A, B, C, D, E;
2534 t = 16;
2535 do {
2536 HashWorkingPointer[t] =
2537 S(1,
2538 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
2539 8] ^
2540 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
2541 } while (++t <= 79);
2542 t = 0;
2543 A = HashResultPointer[0];
2544 B = HashResultPointer[1];
2545 C = HashResultPointer[2];
2546 D = HashResultPointer[3];
2547 E = HashResultPointer[4];
2548
2549 do {
2550 if (t < 20) {
2551 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
2552 } else if (t < 40) {
2553 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
2554 } else if (t < 60) {
2555 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
2556 } else {
2557 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
2558 }
2559 TEMP += S(5, A) + E + HashWorkingPointer[t];
2560 E = D;
2561 D = C;
2562 C = S(30, B);
2563 B = A;
2564 A = TEMP;
2565 } while (++t <= 79);
2566
2567 HashResultPointer[0] += A;
2568 HashResultPointer[1] += B;
2569 HashResultPointer[2] += C;
2570 HashResultPointer[3] += D;
2571 HashResultPointer[4] += E;
2572
2573}
2574
e59058c4 2575/**
3621a710 2576 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA
e59058c4
JS		 2577 * @RandomChallenge: pointer to the entry of host challenge random number array.
2578 * @HashWorking: pointer to the entry of the working hash array.
2579 *
2580 * This routine calculates the working hash array referred by @HashWorking
2581 * from the challenge random numbers associated with the host, referred by
2582 * @RandomChallenge. The result is put into the entry of the working hash
2583 * array and returned by reference through @HashWorking.
2584 **/
dea3101e 2585static void
2586lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
2587{
2588 *HashWorking = (*RandomChallenge ^ *HashWorking);
2589}
2590
e59058c4 2591/**
3621a710 2592 * lpfc_hba_init - Perform special handling for LC HBA initialization
e59058c4
JS		 2593 * @phba: pointer to lpfc hba data structure.
2594 * @hbainit: pointer to an array of unsigned 32-bit integers.
2595 *
2596 * This routine performs the special handling for LC HBA initialization.
2597 **/
dea3101e 2598void
2599lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
2600{
2601 int t;
2602 uint32_t *HashWorking;
2e0fef85 2603 uint32_t *pwwnn = (uint32_t *) phba->wwnn;
dea3101e 2604
bbfbbbc1 2605 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL);
dea3101e 2606 if (!HashWorking)
2607 return;
2608
dea3101e 2609 HashWorking[0] = HashWorking[78] = *pwwnn++;
2610 HashWorking[1] = HashWorking[79] = *pwwnn;
2611
2612 for (t = 0; t < 7; t++)
2613 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
2614
2615 lpfc_sha_init(hbainit);
2616 lpfc_sha_iterate(hbainit, HashWorking);
2617 kfree(HashWorking);
2618}
2619
e59058c4 2620/**
3621a710 2621 * lpfc_cleanup - Performs vport cleanups before deleting a vport
e59058c4
JS		 2622 * @vport: pointer to a virtual N_Port data structure.
2623 *
2624 * This routine performs the necessary cleanups before deleting the @vport.
2625 * It invokes the discovery state machine to perform necessary state
2626 * transitions and to release the ndlps associated with the @vport. Note,
2627 * the physical port is treated as @vport 0.
2628 **/
87af33fe 2629void
2e0fef85 2630lpfc_cleanup(struct lpfc_vport *vport)
dea3101e 2631{
87af33fe 2632 struct lpfc_hba *phba = vport->phba;
dea3101e 2633 struct lpfc_nodelist *ndlp, *next_ndlp;
a8adb832 2634 int i = 0;
dea3101e 2635
87af33fe
JS		 2636 if (phba->link_state > LPFC_LINK_DOWN)
2637 lpfc_port_link_failure(vport);
2638
2639 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) {
e47c9093
JS		 2640 if (!NLP_CHK_NODE_ACT(ndlp)) {
2641 ndlp = lpfc_enable_node(vport, ndlp,
2642 NLP_STE_UNUSED_NODE);
2643 if (!ndlp)
2644 continue;
2645 spin_lock_irq(&phba->ndlp_lock);
2646 NLP_SET_FREE_REQ(ndlp);
2647 spin_unlock_irq(&phba->ndlp_lock);
2648 /* Trigger the release of the ndlp memory */
2649 lpfc_nlp_put(ndlp);
2650 continue;
2651 }
2652 spin_lock_irq(&phba->ndlp_lock);
2653 if (NLP_CHK_FREE_REQ(ndlp)) {
2654 /* The ndlp should not be in memory free mode already */
2655 spin_unlock_irq(&phba->ndlp_lock);
2656 continue;
2657 } else
2658 /* Indicate request for freeing ndlp memory */
2659 NLP_SET_FREE_REQ(ndlp);
2660 spin_unlock_irq(&phba->ndlp_lock);
2661
58da1ffb
JS		 2662 if (vport->port_type != LPFC_PHYSICAL_PORT &&
2663 ndlp->nlp_DID == Fabric_DID) {
2664 /* Just free up ndlp with Fabric_DID for vports */
2665 lpfc_nlp_put(ndlp);
2666 continue;
2667 }
2668
eff4a01b
JS		 2669 /* take care of nodes in unused state before the state
2670 * machine taking action.
2671 */
2672 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) {
2673 lpfc_nlp_put(ndlp);
2674 continue;
2675 }
2676
87af33fe
JS		 2677 if (ndlp->nlp_type & NLP_FABRIC)
2678 lpfc_disc_state_machine(vport, ndlp, NULL,
2679 NLP_EVT_DEVICE_RECOVERY);
e47c9093 2680
a0f2d3ef
JS		 2681 if (ndlp->nlp_fc4_type & NLP_FC4_NVME) {
2682 /* Remove the NVME transport reference now and
2683 * continue to remove the node.
2684 */
2685 lpfc_nlp_put(ndlp);
2686 }
2687
87af33fe
JS		 2688 lpfc_disc_state_machine(vport, ndlp, NULL,
2689 NLP_EVT_DEVICE_RM);
2690 }
2691
a8adb832
JS		 2692 /* At this point, ALL ndlp's should be gone
2693 * because of the previous NLP_EVT_DEVICE_RM.
2694 * Lets wait for this to happen, if needed.
2695 */
87af33fe 2696 while (!list_empty(&vport->fc_nodes)) {
a8adb832 2697 if (i++ > 3000) {
87af33fe 2698 lpfc_printf_vlog(vport, KERN_ERR, LOG_DISCOVERY,
a8adb832 2699 "0233 Nodelist not empty\n");
e47c9093
JS		 2700 list_for_each_entry_safe(ndlp, next_ndlp,
2701 &vport->fc_nodes, nlp_listp) {
2702 lpfc_printf_vlog(ndlp->vport, KERN_ERR,
2703 LOG_NODE,
d7c255b2 2704 "0282 did:x%x ndlp:x%p "
e47c9093
JS		 2705 "usgmap:x%x refcnt:%d\n",
2706 ndlp->nlp_DID, (void *)ndlp,
2707 ndlp->nlp_usg_map,
2c935bc5 2708 kref_read(&ndlp->kref));
e47c9093 2709 }
a8adb832 2710 break;
87af33fe 2711 }
a8adb832
JS		 2712
2713 /* Wait for any activity on ndlps to settle */
2714 msleep(10);
87af33fe 2715 }
1151e3ec 2716 lpfc_cleanup_vports_rrqs(vport, NULL);
dea3101e 2717}
2718
e59058c4 2719/**
3621a710 2720 * lpfc_stop_vport_timers - Stop all the timers associated with a vport
e59058c4
JS		 2721 * @vport: pointer to a virtual N_Port data structure.
2722 *
2723 * This routine stops all the timers associated with a @vport. This function
2724 * is invoked before disabling or deleting a @vport. Note that the physical
2725 * port is treated as @vport 0.
2726 **/
92d7f7b0
JS		 2727void
2728lpfc_stop_vport_timers(struct lpfc_vport *vport)
dea3101e 2729{
92d7f7b0 2730 del_timer_sync(&vport->els_tmofunc);
92494144 2731 del_timer_sync(&vport->delayed_disc_tmo);
92d7f7b0
JS		 2732 lpfc_can_disctmo(vport);
2733 return;
dea3101e 2734}
2735
ecfd03c6
JS		 2736/**
2737 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2738 * @phba: pointer to lpfc hba data structure.
2739 *
2740 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The
2741 * caller of this routine should already hold the host lock.
2742 **/
2743void
2744__lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2745{
5ac6b303
JS		 2746 /* Clear pending FCF rediscovery wait flag */
2747 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
2748
ecfd03c6
JS		 2749 /* Now, try to stop the timer */
2750 del_timer(&phba->fcf.redisc_wait);
2751}
2752
2753/**
2754 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2755 * @phba: pointer to lpfc hba data structure.
2756 *
2757 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It
2758 * checks whether the FCF rediscovery wait timer is pending with the host
2759 * lock held before proceeding with disabling the timer and clearing the
2760 * wait timer pendig flag.
2761 **/
2762void
2763lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2764{
2765 spin_lock_irq(&phba->hbalock);
2766 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
2767 /* FCF rediscovery timer already fired or stopped */
2768 spin_unlock_irq(&phba->hbalock);
2769 return;
2770 }
2771 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
5ac6b303
JS		 2772 /* Clear failover in progress flags */
2773 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC);
ecfd03c6
JS		 2774 spin_unlock_irq(&phba->hbalock);
2775}
2776
e59058c4 2777/**
3772a991 2778 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA
e59058c4
JS		 2779 * @phba: pointer to lpfc hba data structure.
2780 *
2781 * This routine stops all the timers associated with a HBA. This function is
2782 * invoked before either putting a HBA offline or unloading the driver.
2783 **/
3772a991
JS		 2784void
2785lpfc_stop_hba_timers(struct lpfc_hba *phba)
dea3101e 2786{
51ef4c26 2787 lpfc_stop_vport_timers(phba->pport);
2e0fef85 2788 del_timer_sync(&phba->sli.mbox_tmo);
92d7f7b0 2789 del_timer_sync(&phba->fabric_block_timer);
9399627f 2790 del_timer_sync(&phba->eratt_poll);
3772a991 2791 del_timer_sync(&phba->hb_tmofunc);
1151e3ec
JS		 2792 if (phba->sli_rev == LPFC_SLI_REV4) {
2793 del_timer_sync(&phba->rrq_tmr);
2794 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
2795 }
3772a991
JS		 2796 phba->hb_outstanding = 0;
2797
2798 switch (phba->pci_dev_grp) {
2799 case LPFC_PCI_DEV_LP:
2800 /* Stop any LightPulse device specific driver timers */
2801 del_timer_sync(&phba->fcp_poll_timer);
2802 break;
2803 case LPFC_PCI_DEV_OC:
2804 /* Stop any OneConnect device sepcific driver timers */
ecfd03c6 2805 lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3772a991
JS		 2806 break;
2807 default:
2808 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2809 "0297 Invalid device group (x%x)\n",
2810 phba->pci_dev_grp);
2811 break;
2812 }
2e0fef85 2813 return;
dea3101e 2814}
2815
e59058c4 2816/**
3621a710 2817 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked
e59058c4
JS		 2818 * @phba: pointer to lpfc hba data structure.
2819 *
2820 * This routine marks a HBA's management interface as blocked. Once the HBA's
2821 * management interface is marked as blocked, all the user space access to
2822 * the HBA, whether they are from sysfs interface or libdfc interface will
2823 * all be blocked. The HBA is set to block the management interface when the
2824 * driver prepares the HBA interface for online or offline.
2825 **/
a6ababd2 2826static void
618a5230 2827lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action)
a6ababd2
AB		 2828{
2829 unsigned long iflag;
6e7288d9
JS		 2830 uint8_t actcmd = MBX_HEARTBEAT;
2831 unsigned long timeout;
2832
a6ababd2
AB		 2833 spin_lock_irqsave(&phba->hbalock, iflag);
2834 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO;
618a5230
JS		 2835 spin_unlock_irqrestore(&phba->hbalock, iflag);
2836 if (mbx_action == LPFC_MBX_NO_WAIT)
2837 return;
2838 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
2839 spin_lock_irqsave(&phba->hbalock, iflag);
a183a15f 2840 if (phba->sli.mbox_active) {
6e7288d9 2841 actcmd = phba->sli.mbox_active->u.mb.mbxCommand;
a183a15f
JS		 2842 /* Determine how long we might wait for the active mailbox
2843 * command to be gracefully completed by firmware.
2844 */
2845 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
2846 phba->sli.mbox_active) * 1000) + jiffies;
2847 }
a6ababd2 2848 spin_unlock_irqrestore(&phba->hbalock, iflag);
a183a15f 2849
6e7288d9
JS		 2850 /* Wait for the outstnading mailbox command to complete */
2851 while (phba->sli.mbox_active) {
2852 /* Check active mailbox complete status every 2ms */
2853 msleep(2);
2854 if (time_after(jiffies, timeout)) {
2855 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2856 "2813 Mgmt IO is Blocked %x "
2857 "- mbox cmd %x still active\n",
2858 phba->sli.sli_flag, actcmd);
2859 break;
2860 }
2861 }
a6ababd2
AB		 2862}
2863
6b5151fd
JS		 2864/**
2865 * lpfc_sli4_node_prep - Assign RPIs for active nodes.
2866 * @phba: pointer to lpfc hba data structure.
2867 *
2868 * Allocate RPIs for all active remote nodes. This is needed whenever
2869 * an SLI4 adapter is reset and the driver is not unloading. Its purpose
2870 * is to fixup the temporary rpi assignments.
2871 **/
2872void
2873lpfc_sli4_node_prep(struct lpfc_hba *phba)
2874{
2875 struct lpfc_nodelist *ndlp, *next_ndlp;
2876 struct lpfc_vport **vports;
2877 int i;
2878
2879 if (phba->sli_rev != LPFC_SLI_REV4)
2880 return;
2881
2882 vports = lpfc_create_vport_work_array(phba);
2883 if (vports != NULL) {
2884 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
2885 if (vports[i]->load_flag & FC_UNLOADING)
2886 continue;
2887
2888 list_for_each_entry_safe(ndlp, next_ndlp,
2889 &vports[i]->fc_nodes,
2890 nlp_listp) {
be6bb941 2891 if (NLP_CHK_NODE_ACT(ndlp)) {
6b5151fd
JS		 2892 ndlp->nlp_rpi =
2893 lpfc_sli4_alloc_rpi(phba);
be6bb941
JS		 2894 lpfc_printf_vlog(ndlp->vport, KERN_INFO,
2895 LOG_NODE,
2896 "0009 rpi:%x DID:%x "
2897 "flg:%x map:%x %p\n",
2898 ndlp->nlp_rpi,
2899 ndlp->nlp_DID,
2900 ndlp->nlp_flag,
2901 ndlp->nlp_usg_map,
2902 ndlp);
2903 }
6b5151fd
JS		 2904 }
2905 }
2906 }
2907 lpfc_destroy_vport_work_array(phba, vports);
2908}
2909
e59058c4 2910/**
3621a710 2911 * lpfc_online - Initialize and bring a HBA online
e59058c4
JS		 2912 * @phba: pointer to lpfc hba data structure.
2913 *
2914 * This routine initializes the HBA and brings a HBA online. During this
2915 * process, the management interface is blocked to prevent user space access
2916 * to the HBA interfering with the driver initialization.
2917 *
2918 * Return codes
2919 * 0 - successful
2920 * 1 - failed
2921 **/
dea3101e 2922int
2e0fef85 2923lpfc_online(struct lpfc_hba *phba)
dea3101e 2924{
372bd282 2925 struct lpfc_vport *vport;
549e55cd
JS		 2926 struct lpfc_vport **vports;
2927 int i;
16a3a208 2928 bool vpis_cleared = false;
2e0fef85 2929
dea3101e 2930 if (!phba)
2931 return 0;
372bd282 2932 vport = phba->pport;
dea3101e 2933
2e0fef85 2934 if (!(vport->fc_flag & FC_OFFLINE_MODE))
dea3101e 2935 return 0;
2936
ed957684 2937 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 2938 "0458 Bring Adapter online\n");
dea3101e 2939
618a5230 2940 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
46fa311e 2941
da0436e9
JS		 2942 if (phba->sli_rev == LPFC_SLI_REV4) {
2943 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */
2944 lpfc_unblock_mgmt_io(phba);
2945 return 1;
2946 }
16a3a208
JS		 2947 spin_lock_irq(&phba->hbalock);
2948 if (!phba->sli4_hba.max_cfg_param.vpi_used)
2949 vpis_cleared = true;
2950 spin_unlock_irq(&phba->hbalock);
da0436e9 2951 } else {
895427bd 2952 lpfc_sli_queue_init(phba);
da0436e9
JS		 2953 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */
2954 lpfc_unblock_mgmt_io(phba);
2955 return 1;
2956 }
46fa311e 2957 }
dea3101e 2958
549e55cd 2959 vports = lpfc_create_vport_work_array(phba);
aeb6641f 2960 if (vports != NULL) {
da0436e9 2961 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd
JS		 2962 struct Scsi_Host *shost;
2963 shost = lpfc_shost_from_vport(vports[i]);
2964 spin_lock_irq(shost->host_lock);
2965 vports[i]->fc_flag &= ~FC_OFFLINE_MODE;
2966 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)
2967 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
16a3a208 2968 if (phba->sli_rev == LPFC_SLI_REV4) {
1c6834a7 2969 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI;
16a3a208
JS		 2970 if ((vpis_cleared) &&
2971 (vports[i]->port_type !=
2972 LPFC_PHYSICAL_PORT))
2973 vports[i]->vpi = 0;
2974 }
549e55cd
JS		 2975 spin_unlock_irq(shost->host_lock);
2976 }
aeb6641f
AB		 2977 }
2978 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 2979
46fa311e 2980 lpfc_unblock_mgmt_io(phba);
dea3101e 2981 return 0;
2982}
2983
e59058c4 2984/**
3621a710 2985 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked
e59058c4
JS		 2986 * @phba: pointer to lpfc hba data structure.
2987 *
2988 * This routine marks a HBA's management interface as not blocked. Once the
2989 * HBA's management interface is marked as not blocked, all the user space
2990 * access to the HBA, whether they are from sysfs interface or libdfc
2991 * interface will be allowed. The HBA is set to block the management interface
2992 * when the driver prepares the HBA interface for online or offline and then
2993 * set to unblock the management interface afterwards.
2994 **/
46fa311e
JS		 2995void
2996lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
2997{
2998 unsigned long iflag;
2999
2e0fef85
JS		 3000 spin_lock_irqsave(&phba->hbalock, iflag);
3001 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO;
3002 spin_unlock_irqrestore(&phba->hbalock, iflag);
46fa311e
JS		 3003}
3004
e59058c4 3005/**
3621a710 3006 * lpfc_offline_prep - Prepare a HBA to be brought offline
e59058c4
JS		 3007 * @phba: pointer to lpfc hba data structure.
3008 *
3009 * This routine is invoked to prepare a HBA to be brought offline. It performs
3010 * unregistration login to all the nodes on all vports and flushes the mailbox
3011 * queue to make it ready to be brought offline.
3012 **/
46fa311e 3013void
618a5230 3014lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action)
46fa311e 3015{
2e0fef85 3016 struct lpfc_vport *vport = phba->pport;
46fa311e 3017 struct lpfc_nodelist *ndlp, *next_ndlp;
87af33fe 3018 struct lpfc_vport **vports;
72100cc4 3019 struct Scsi_Host *shost;
87af33fe 3020 int i;
dea3101e 3021
2e0fef85 3022 if (vport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3023 return;
dea3101e 3024
618a5230 3025 lpfc_block_mgmt_io(phba, mbx_action);
dea3101e 3026
3027 lpfc_linkdown(phba);
3028
87af33fe
JS		 3029 /* Issue an unreg_login to all nodes on all vports */
3030 vports = lpfc_create_vport_work_array(phba);
3031 if (vports != NULL) {
da0436e9 3032 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
a8adb832
JS		 3033 if (vports[i]->load_flag & FC_UNLOADING)
3034 continue;
72100cc4
JS		 3035 shost = lpfc_shost_from_vport(vports[i]);
3036 spin_lock_irq(shost->host_lock);
c868595d 3037 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
695a814e
JS		 3038 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
3039 vports[i]->fc_flag &= ~FC_VFI_REGISTERED;
72100cc4 3040 spin_unlock_irq(shost->host_lock);
695a814e 3041
87af33fe
JS		 3042 shost = lpfc_shost_from_vport(vports[i]);
3043 list_for_each_entry_safe(ndlp, next_ndlp,
3044 &vports[i]->fc_nodes,
3045 nlp_listp) {
e47c9093
JS		 3046 if (!NLP_CHK_NODE_ACT(ndlp))
3047 continue;
87af33fe
JS		 3048 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE)
3049 continue;
3050 if (ndlp->nlp_type & NLP_FABRIC) {
3051 lpfc_disc_state_machine(vports[i], ndlp,
3052 NULL, NLP_EVT_DEVICE_RECOVERY);
3053 lpfc_disc_state_machine(vports[i], ndlp,
3054 NULL, NLP_EVT_DEVICE_RM);
3055 }
3056 spin_lock_irq(shost->host_lock);
3057 ndlp->nlp_flag &= ~NLP_NPR_ADISC;
401ee0c1 3058 spin_unlock_irq(shost->host_lock);
6b5151fd
JS		 3059 /*
3060 * Whenever an SLI4 port goes offline, free the
401ee0c1
JS		 3061 * RPI. Get a new RPI when the adapter port
3062 * comes back online.
6b5151fd 3063 */
be6bb941
JS		 3064 if (phba->sli_rev == LPFC_SLI_REV4) {
3065 lpfc_printf_vlog(ndlp->vport,
3066 KERN_INFO, LOG_NODE,
3067 "0011 lpfc_offline: "
3068 "ndlp:x%p did %x "
3069 "usgmap:x%x rpi:%x\n",
3070 ndlp, ndlp->nlp_DID,
3071 ndlp->nlp_usg_map,
3072 ndlp->nlp_rpi);
3073
6b5151fd 3074 lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi);
be6bb941 3075 }
87af33fe
JS		 3076 lpfc_unreg_rpi(vports[i], ndlp);
3077 }
3078 }
3079 }
09372820 3080 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3081
618a5230 3082 lpfc_sli_mbox_sys_shutdown(phba, mbx_action);
46fa311e
JS		 3083}
3084
e59058c4 3085/**
3621a710 3086 * lpfc_offline - Bring a HBA offline
e59058c4
JS		 3087 * @phba: pointer to lpfc hba data structure.
3088 *
3089 * This routine actually brings a HBA offline. It stops all the timers
3090 * associated with the HBA, brings down the SLI layer, and eventually
3091 * marks the HBA as in offline state for the upper layer protocol.
3092 **/
46fa311e 3093void
2e0fef85 3094lpfc_offline(struct lpfc_hba *phba)
46fa311e 3095{
549e55cd
JS		 3096 struct Scsi_Host *shost;
3097 struct lpfc_vport **vports;
3098 int i;
46fa311e 3099
549e55cd 3100 if (phba->pport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3101 return;
688a8863 3102
da0436e9
JS		 3103 /* stop port and all timers associated with this hba */
3104 lpfc_stop_port(phba);
51ef4c26
JS		 3105 vports = lpfc_create_vport_work_array(phba);
3106 if (vports != NULL)
da0436e9 3107 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
51ef4c26 3108 lpfc_stop_vport_timers(vports[i]);
09372820 3109 lpfc_destroy_vport_work_array(phba, vports);
92d7f7b0 3110 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 3111 "0460 Bring Adapter offline\n");
dea3101e 3112 /* Bring down the SLI Layer and cleanup. The HBA is offline
3113 now. */
3114 lpfc_sli_hba_down(phba);
92d7f7b0 3115 spin_lock_irq(&phba->hbalock);
7054a606 3116 phba->work_ha = 0;
92d7f7b0 3117 spin_unlock_irq(&phba->hbalock);
549e55cd
JS		 3118 vports = lpfc_create_vport_work_array(phba);
3119 if (vports != NULL)
da0436e9 3120 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd 3121 shost = lpfc_shost_from_vport(vports[i]);
549e55cd
JS		 3122 spin_lock_irq(shost->host_lock);
3123 vports[i]->work_port_events = 0;
3124 vports[i]->fc_flag |= FC_OFFLINE_MODE;
3125 spin_unlock_irq(shost->host_lock);
3126 }
09372820 3127 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3128}
3129
e59058c4 3130/**
3621a710 3131 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists
e59058c4
JS		 3132 * @phba: pointer to lpfc hba data structure.
3133 *
3134 * This routine is to free all the SCSI buffers and IOCBs from the driver
3135 * list back to kernel. It is called from lpfc_pci_remove_one to free
3136 * the internal resources before the device is removed from the system.
e59058c4 3137 **/
8a9d2e80 3138static void
2e0fef85 3139lpfc_scsi_free(struct lpfc_hba *phba)
dea3101e 3140{
3141 struct lpfc_scsi_buf *sb, *sb_next;
dea3101e 3142
895427bd
JS		 3143 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3144 return;
3145
2e0fef85 3146 spin_lock_irq(&phba->hbalock);
a40fc5f0 3147
dea3101e 3148 /* Release all the lpfc_scsi_bufs maintained by this host. */
a40fc5f0
JS		 3149
3150 spin_lock(&phba->scsi_buf_list_put_lock);
3151 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put,
3152 list) {
dea3101e 3153 list_del(&sb->list);
895427bd 3154 pci_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3155 sb->dma_handle);
dea3101e 3156 kfree(sb);
3157 phba->total_scsi_bufs--;
3158 }
a40fc5f0
JS		 3159 spin_unlock(&phba->scsi_buf_list_put_lock);
3160
3161 spin_lock(&phba->scsi_buf_list_get_lock);
3162 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get,
3163 list) {
dea3101e 3164 list_del(&sb->list);
895427bd 3165 pci_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3166 sb->dma_handle);
dea3101e 3167 kfree(sb);
3168 phba->total_scsi_bufs--;
3169 }
a40fc5f0 3170 spin_unlock(&phba->scsi_buf_list_get_lock);
2e0fef85 3171 spin_unlock_irq(&phba->hbalock);
8a9d2e80 3172}
895427bd
JS		 3173/**
3174 * lpfc_nvme_free - Free all the NVME buffers and IOCBs from driver lists
3175 * @phba: pointer to lpfc hba data structure.
3176 *
3177 * This routine is to free all the NVME buffers and IOCBs from the driver
3178 * list back to kernel. It is called from lpfc_pci_remove_one to free
3179 * the internal resources before the device is removed from the system.
3180 **/
3181static void
3182lpfc_nvme_free(struct lpfc_hba *phba)
3183{
3184 struct lpfc_nvme_buf *lpfc_ncmd, *lpfc_ncmd_next;
895427bd
JS		 3185
3186 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3187 return;
3188
3189 spin_lock_irq(&phba->hbalock);
3190
3191 /* Release all the lpfc_nvme_bufs maintained by this host. */
3192 spin_lock(&phba->nvme_buf_list_put_lock);
3193 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3194 &phba->lpfc_nvme_buf_list_put, list) {
3195 list_del(&lpfc_ncmd->list);
3196 pci_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
3197 lpfc_ncmd->dma_handle);
3198 kfree(lpfc_ncmd);
3199 phba->total_nvme_bufs--;
3200 }
3201 spin_unlock(&phba->nvme_buf_list_put_lock);
3202
3203 spin_lock(&phba->nvme_buf_list_get_lock);
3204 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3205 &phba->lpfc_nvme_buf_list_get, list) {
3206 list_del(&lpfc_ncmd->list);
3207 pci_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
3208 lpfc_ncmd->dma_handle);
3209 kfree(lpfc_ncmd);
3210 phba->total_nvme_bufs--;
3211 }
3212 spin_unlock(&phba->nvme_buf_list_get_lock);
895427bd
JS		 3213 spin_unlock_irq(&phba->hbalock);
3214}
8a9d2e80 3215/**
895427bd 3216 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping
8a9d2e80
JS		 3217 * @phba: pointer to lpfc hba data structure.
3218 *
3219 * This routine first calculates the sizes of the current els and allocated
3220 * scsi sgl lists, and then goes through all sgls to updates the physical
3221 * XRIs assigned due to port function reset. During port initialization, the
3222 * current els and allocated scsi sgl lists are 0s.
3223 *
3224 * Return codes
3225 * 0 - successful (for now, it always returns 0)
3226 **/
3227int
895427bd 3228lpfc_sli4_els_sgl_update(struct lpfc_hba *phba)
8a9d2e80
JS		 3229{
3230 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
895427bd 3231 uint16_t i, lxri, xri_cnt, els_xri_cnt;
8a9d2e80 3232 LIST_HEAD(els_sgl_list);
8a9d2e80
JS		 3233 int rc;
3234
3235 /*
3236 * update on pci function's els xri-sgl list
3237 */
3238 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
895427bd 3239
8a9d2e80
JS		 3240 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
3241 /* els xri-sgl expanded */
3242 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
3243 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3244 "3157 ELS xri-sgl count increased from "
3245 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3246 els_xri_cnt);
3247 /* allocate the additional els sgls */
3248 for (i = 0; i < xri_cnt; i++) {
3249 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3250 GFP_KERNEL);
3251 if (sglq_entry == NULL) {
3252 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3253 "2562 Failure to allocate an "
3254 "ELS sgl entry:%d\n", i);
3255 rc = -ENOMEM;
3256 goto out_free_mem;
3257 }
3258 sglq_entry->buff_type = GEN_BUFF_TYPE;
3259 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0,
3260 &sglq_entry->phys);
3261 if (sglq_entry->virt == NULL) {
3262 kfree(sglq_entry);
3263 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3264 "2563 Failure to allocate an "
3265 "ELS mbuf:%d\n", i);
3266 rc = -ENOMEM;
3267 goto out_free_mem;
3268 }
3269 sglq_entry->sgl = sglq_entry->virt;
3270 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE);
3271 sglq_entry->state = SGL_FREED;
3272 list_add_tail(&sglq_entry->list, &els_sgl_list);
3273 }
38c20673 3274 spin_lock_irq(&phba->hbalock);
895427bd
JS		 3275 spin_lock(&phba->sli4_hba.sgl_list_lock);
3276 list_splice_init(&els_sgl_list,
3277 &phba->sli4_hba.lpfc_els_sgl_list);
3278 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 3279 spin_unlock_irq(&phba->hbalock);
8a9d2e80
JS		 3280 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
3281 /* els xri-sgl shrinked */
3282 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
3283 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3284 "3158 ELS xri-sgl count decreased from "
3285 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3286 els_xri_cnt);
3287 spin_lock_irq(&phba->hbalock);
895427bd
JS		 3288 spin_lock(&phba->sli4_hba.sgl_list_lock);
3289 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list,
3290 &els_sgl_list);
8a9d2e80
JS		 3291 /* release extra els sgls from list */
3292 for (i = 0; i < xri_cnt; i++) {
3293 list_remove_head(&els_sgl_list,
3294 sglq_entry, struct lpfc_sglq, list);
3295 if (sglq_entry) {
895427bd
JS		 3296 __lpfc_mbuf_free(phba, sglq_entry->virt,
3297 sglq_entry->phys);
8a9d2e80
JS		 3298 kfree(sglq_entry);
3299 }
3300 }
895427bd
JS		 3301 list_splice_init(&els_sgl_list,
3302 &phba->sli4_hba.lpfc_els_sgl_list);
3303 spin_unlock(&phba->sli4_hba.sgl_list_lock);
8a9d2e80
JS		 3304 spin_unlock_irq(&phba->hbalock);
3305 } else
3306 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3307 "3163 ELS xri-sgl count unchanged: %d\n",
3308 els_xri_cnt);
3309 phba->sli4_hba.els_xri_cnt = els_xri_cnt;
3310
3311 /* update xris to els sgls on the list */
3312 sglq_entry = NULL;
3313 sglq_entry_next = NULL;
3314 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
895427bd 3315 &phba->sli4_hba.lpfc_els_sgl_list, list) {
8a9d2e80
JS		 3316 lxri = lpfc_sli4_next_xritag(phba);
3317 if (lxri == NO_XRI) {
3318 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3319 "2400 Failed to allocate xri for "
3320 "ELS sgl\n");
3321 rc = -ENOMEM;
3322 goto out_free_mem;
3323 }
3324 sglq_entry->sli4_lxritag = lxri;
3325 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3326 }
895427bd
JS		 3327 return 0;
3328
3329out_free_mem:
3330 lpfc_free_els_sgl_list(phba);
3331 return rc;
3332}
3333
f358dd0c
JS		 3334/**
3335 * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping
3336 * @phba: pointer to lpfc hba data structure.
3337 *
3338 * This routine first calculates the sizes of the current els and allocated
3339 * scsi sgl lists, and then goes through all sgls to updates the physical
3340 * XRIs assigned due to port function reset. During port initialization, the
3341 * current els and allocated scsi sgl lists are 0s.
3342 *
3343 * Return codes
3344 * 0 - successful (for now, it always returns 0)
3345 **/
3346int
3347lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba)
3348{
3349 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
3350 uint16_t i, lxri, xri_cnt, els_xri_cnt;
3351 uint16_t nvmet_xri_cnt, tot_cnt;
3352 LIST_HEAD(nvmet_sgl_list);
3353 int rc;
3354
3355 /*
3356 * update on pci function's nvmet xri-sgl list
3357 */
3358 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
2d7dbc4c 3359 nvmet_xri_cnt = phba->cfg_nvmet_mrq * phba->cfg_nvmet_mrq_post;
f358dd0c 3360 tot_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
2d7dbc4c
JS		 3361 if (nvmet_xri_cnt > tot_cnt) {
3362 phba->cfg_nvmet_mrq_post = tot_cnt / phba->cfg_nvmet_mrq;
3363 nvmet_xri_cnt = phba->cfg_nvmet_mrq * phba->cfg_nvmet_mrq_post;
3364 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3365 "6301 NVMET post-sgl count changed to %d\n",
3366 phba->cfg_nvmet_mrq_post);
3367 }
f358dd0c
JS		 3368
3369 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) {
3370 /* els xri-sgl expanded */
3371 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt;
3372 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3373 "6302 NVMET xri-sgl cnt grew from %d to %d\n",
3374 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt);
3375 /* allocate the additional nvmet sgls */
3376 for (i = 0; i < xri_cnt; i++) {
3377 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3378 GFP_KERNEL);
3379 if (sglq_entry == NULL) {
3380 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3381 "6303 Failure to allocate an "
3382 "NVMET sgl entry:%d\n", i);
3383 rc = -ENOMEM;
3384 goto out_free_mem;
3385 }
3386 sglq_entry->buff_type = NVMET_BUFF_TYPE;
3387 sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0,
3388 &sglq_entry->phys);
3389 if (sglq_entry->virt == NULL) {
3390 kfree(sglq_entry);
3391 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3392 "6304 Failure to allocate an "
3393 "NVMET buf:%d\n", i);
3394 rc = -ENOMEM;
3395 goto out_free_mem;
3396 }
3397 sglq_entry->sgl = sglq_entry->virt;
3398 memset(sglq_entry->sgl, 0,
3399 phba->cfg_sg_dma_buf_size);
3400 sglq_entry->state = SGL_FREED;
3401 list_add_tail(&sglq_entry->list, &nvmet_sgl_list);
3402 }
3403 spin_lock_irq(&phba->hbalock);
3404 spin_lock(&phba->sli4_hba.sgl_list_lock);
3405 list_splice_init(&nvmet_sgl_list,
3406 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3407 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3408 spin_unlock_irq(&phba->hbalock);
3409 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) {
3410 /* nvmet xri-sgl shrunk */
3411 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt;
3412 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3413 "6305 NVMET xri-sgl count decreased from "
3414 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt,
3415 nvmet_xri_cnt);
3416 spin_lock_irq(&phba->hbalock);
3417 spin_lock(&phba->sli4_hba.sgl_list_lock);
3418 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list,
3419 &nvmet_sgl_list);
3420 /* release extra nvmet sgls from list */
3421 for (i = 0; i < xri_cnt; i++) {
3422 list_remove_head(&nvmet_sgl_list,
3423 sglq_entry, struct lpfc_sglq, list);
3424 if (sglq_entry) {
3425 lpfc_nvmet_buf_free(phba, sglq_entry->virt,
3426 sglq_entry->phys);
3427 kfree(sglq_entry);
3428 }
3429 }
3430 list_splice_init(&nvmet_sgl_list,
3431 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3432 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3433 spin_unlock_irq(&phba->hbalock);
3434 } else
3435 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3436 "6306 NVMET xri-sgl count unchanged: %d\n",
3437 nvmet_xri_cnt);
3438 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt;
3439
3440 /* update xris to nvmet sgls on the list */
3441 sglq_entry = NULL;
3442 sglq_entry_next = NULL;
3443 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
3444 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) {
3445 lxri = lpfc_sli4_next_xritag(phba);
3446 if (lxri == NO_XRI) {
3447 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3448 "6307 Failed to allocate xri for "
3449 "NVMET sgl\n");
3450 rc = -ENOMEM;
3451 goto out_free_mem;
3452 }
3453 sglq_entry->sli4_lxritag = lxri;
3454 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3455 }
3456 return 0;
3457
3458out_free_mem:
3459 lpfc_free_nvmet_sgl_list(phba);
3460 return rc;
3461}
3462
895427bd
JS		 3463/**
3464 * lpfc_sli4_scsi_sgl_update - update xri-sgl sizing and mapping
3465 * @phba: pointer to lpfc hba data structure.
3466 *
3467 * This routine first calculates the sizes of the current els and allocated
3468 * scsi sgl lists, and then goes through all sgls to updates the physical
3469 * XRIs assigned due to port function reset. During port initialization, the
3470 * current els and allocated scsi sgl lists are 0s.
3471 *
3472 * Return codes
3473 * 0 - successful (for now, it always returns 0)
3474 **/
3475int
3476lpfc_sli4_scsi_sgl_update(struct lpfc_hba *phba)
3477{
3478 struct lpfc_scsi_buf *psb, *psb_next;
3479 uint16_t i, lxri, els_xri_cnt, scsi_xri_cnt;
3480 LIST_HEAD(scsi_sgl_list);
3481 int rc;
8a9d2e80
JS		 3482
3483 /*
895427bd 3484 * update on pci function's els xri-sgl list
8a9d2e80 3485 */
895427bd 3486 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
8a9d2e80
JS		 3487 phba->total_scsi_bufs = 0;
3488
895427bd
JS		 3489 /*
3490 * update on pci function's allocated scsi xri-sgl list
3491 */
8a9d2e80
JS		 3492 /* maximum number of xris available for scsi buffers */
3493 phba->sli4_hba.scsi_xri_max = phba->sli4_hba.max_cfg_param.max_xri -
3494 els_xri_cnt;
3495
895427bd
JS		 3496 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3497 return 0;
3498
3499 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3500 phba->sli4_hba.scsi_xri_max = /* Split them up */
3501 (phba->sli4_hba.scsi_xri_max *
3502 phba->cfg_xri_split) / 100;
8a9d2e80 3503
a40fc5f0 3504 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3505 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS		 3506 list_splice_init(&phba->lpfc_scsi_buf_list_get, &scsi_sgl_list);
3507 list_splice(&phba->lpfc_scsi_buf_list_put, &scsi_sgl_list);
164cecd1 3508 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3509 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80 3510
e8c0a779
JS		 3511 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3512 "6060 Current allocated SCSI xri-sgl count:%d, "
3513 "maximum SCSI xri count:%d (split:%d)\n",
3514 phba->sli4_hba.scsi_xri_cnt,
3515 phba->sli4_hba.scsi_xri_max, phba->cfg_xri_split);
3516
8a9d2e80
JS		 3517 if (phba->sli4_hba.scsi_xri_cnt > phba->sli4_hba.scsi_xri_max) {
3518 /* max scsi xri shrinked below the allocated scsi buffers */
3519 scsi_xri_cnt = phba->sli4_hba.scsi_xri_cnt -
3520 phba->sli4_hba.scsi_xri_max;
3521 /* release the extra allocated scsi buffers */
3522 for (i = 0; i < scsi_xri_cnt; i++) {
3523 list_remove_head(&scsi_sgl_list, psb,
3524 struct lpfc_scsi_buf, list);
a2fc4aef 3525 if (psb) {
895427bd 3526 pci_pool_free(phba->lpfc_sg_dma_buf_pool,
a2fc4aef
JS		 3527 psb->data, psb->dma_handle);
3528 kfree(psb);
3529 }
8a9d2e80 3530 }
a40fc5f0 3531 spin_lock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80 3532 phba->sli4_hba.scsi_xri_cnt -= scsi_xri_cnt;
a40fc5f0 3533 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80
JS		 3534 }
3535
3536 /* update xris associated to remaining allocated scsi buffers */
3537 psb = NULL;
3538 psb_next = NULL;
3539 list_for_each_entry_safe(psb, psb_next, &scsi_sgl_list, list) {
3540 lxri = lpfc_sli4_next_xritag(phba);
3541 if (lxri == NO_XRI) {
3542 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3543 "2560 Failed to allocate xri for "
3544 "scsi buffer\n");
3545 rc = -ENOMEM;
3546 goto out_free_mem;
3547 }
3548 psb->cur_iocbq.sli4_lxritag = lxri;
3549 psb->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3550 }
a40fc5f0 3551 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3552 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS		 3553 list_splice_init(&scsi_sgl_list, &phba->lpfc_scsi_buf_list_get);
3554 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
164cecd1 3555 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3556 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
dea3101e 3557 return 0;
8a9d2e80
JS		 3558
3559out_free_mem:
8a9d2e80
JS		 3560 lpfc_scsi_free(phba);
3561 return rc;
dea3101e 3562}
3563
96418b5e
JS		 3564static uint64_t
3565lpfc_get_wwpn(struct lpfc_hba *phba)
3566{
3567 uint64_t wwn;
3568 int rc;
3569 LPFC_MBOXQ_t *mboxq;
3570 MAILBOX_t *mb;
3571
3572
3573 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
3574 GFP_KERNEL);
3575 if (!mboxq)
3576 return (uint64_t)-1;
3577
3578 /* First get WWN of HBA instance */
3579 lpfc_read_nv(phba, mboxq);
3580 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
3581 if (rc != MBX_SUCCESS) {
3582 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3583 "6019 Mailbox failed , mbxCmd x%x "
3584 "READ_NV, mbxStatus x%x\n",
3585 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
3586 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
3587 mempool_free(mboxq, phba->mbox_mem_pool);
3588 return (uint64_t) -1;
3589 }
3590 mb = &mboxq->u.mb;
3591 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t));
3592 /* wwn is WWPN of HBA instance */
3593 mempool_free(mboxq, phba->mbox_mem_pool);
3594 if (phba->sli_rev == LPFC_SLI_REV4)
3595 return be64_to_cpu(wwn);
3596 else
3597 return (((wwn & 0xffffffff00000000) >> 32) |
3598 ((wwn & 0x00000000ffffffff) << 32));
3599
3600}
3601
895427bd
JS		 3602/**
3603 * lpfc_sli4_nvme_sgl_update - update xri-sgl sizing and mapping
3604 * @phba: pointer to lpfc hba data structure.
3605 *
3606 * This routine first calculates the sizes of the current els and allocated
3607 * scsi sgl lists, and then goes through all sgls to updates the physical
3608 * XRIs assigned due to port function reset. During port initialization, the
3609 * current els and allocated scsi sgl lists are 0s.
3610 *
3611 * Return codes
3612 * 0 - successful (for now, it always returns 0)
3613 **/
3614int
3615lpfc_sli4_nvme_sgl_update(struct lpfc_hba *phba)
3616{
3617 struct lpfc_nvme_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL;
3618 uint16_t i, lxri, els_xri_cnt;
3619 uint16_t nvme_xri_cnt, nvme_xri_max;
3620 LIST_HEAD(nvme_sgl_list);
3621 int rc;
3622
3623 phba->total_nvme_bufs = 0;
3624
3625 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3626 return 0;
3627 /*
3628 * update on pci function's allocated nvme xri-sgl list
3629 */
3630
3631 /* maximum number of xris available for nvme buffers */
3632 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
3633 nvme_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
3634 phba->sli4_hba.nvme_xri_max = nvme_xri_max;
3635 phba->sli4_hba.nvme_xri_max -= phba->sli4_hba.scsi_xri_max;
3636
3637 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3638 "6074 Current allocated NVME xri-sgl count:%d, "
3639 "maximum NVME xri count:%d\n",
3640 phba->sli4_hba.nvme_xri_cnt,
3641 phba->sli4_hba.nvme_xri_max);
3642
3643 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3644 spin_lock(&phba->nvme_buf_list_put_lock);
3645 list_splice_init(&phba->lpfc_nvme_buf_list_get, &nvme_sgl_list);
3646 list_splice(&phba->lpfc_nvme_buf_list_put, &nvme_sgl_list);
3647 spin_unlock(&phba->nvme_buf_list_put_lock);
3648 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3649
3650 if (phba->sli4_hba.nvme_xri_cnt > phba->sli4_hba.nvme_xri_max) {
3651 /* max nvme xri shrunk below the allocated nvme buffers */
3652 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3653 nvme_xri_cnt = phba->sli4_hba.nvme_xri_cnt -
3654 phba->sli4_hba.nvme_xri_max;
3655 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3656 /* release the extra allocated nvme buffers */
3657 for (i = 0; i < nvme_xri_cnt; i++) {
3658 list_remove_head(&nvme_sgl_list, lpfc_ncmd,
3659 struct lpfc_nvme_buf, list);
3660 if (lpfc_ncmd) {
3661 pci_pool_free(phba->lpfc_sg_dma_buf_pool,
3662 lpfc_ncmd->data,
3663 lpfc_ncmd->dma_handle);
3664 kfree(lpfc_ncmd);
3665 }
3666 }
3667 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3668 phba->sli4_hba.nvme_xri_cnt -= nvme_xri_cnt;
3669 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3670 }
3671
3672 /* update xris associated to remaining allocated nvme buffers */
3673 lpfc_ncmd = NULL;
3674 lpfc_ncmd_next = NULL;
3675 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3676 &nvme_sgl_list, list) {
3677 lxri = lpfc_sli4_next_xritag(phba);
3678 if (lxri == NO_XRI) {
3679 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3680 "6075 Failed to allocate xri for "
3681 "nvme buffer\n");
3682 rc = -ENOMEM;
3683 goto out_free_mem;
3684 }
3685 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri;
3686 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3687 }
3688 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3689 spin_lock(&phba->nvme_buf_list_put_lock);
3690 list_splice_init(&nvme_sgl_list, &phba->lpfc_nvme_buf_list_get);
3691 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
3692 spin_unlock(&phba->nvme_buf_list_put_lock);
3693 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3694 return 0;
3695
3696out_free_mem:
3697 lpfc_nvme_free(phba);
3698 return rc;
3699}
3700
e59058c4 3701/**
3621a710 3702 * lpfc_create_port - Create an FC port
e59058c4
JS		 3703 * @phba: pointer to lpfc hba data structure.
3704 * @instance: a unique integer ID to this FC port.
3705 * @dev: pointer to the device data structure.
3706 *
3707 * This routine creates a FC port for the upper layer protocol. The FC port
3708 * can be created on top of either a physical port or a virtual port provided
3709 * by the HBA. This routine also allocates a SCSI host data structure (shost)
3710 * and associates the FC port created before adding the shost into the SCSI
3711 * layer.
3712 *
3713 * Return codes
3714 * @vport - pointer to the virtual N_Port data structure.
3715 * NULL - port create failed.
3716 **/
2e0fef85 3717struct lpfc_vport *
3de2a653 3718lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
47a8617c 3719{
2e0fef85 3720 struct lpfc_vport *vport;
895427bd 3721 struct Scsi_Host *shost = NULL;
2e0fef85 3722 int error = 0;
96418b5e
JS		 3723 int i;
3724 uint64_t wwn;
3725 bool use_no_reset_hba = false;
3726
3727 wwn = lpfc_get_wwpn(phba);
3728
3729 for (i = 0; i < lpfc_no_hba_reset_cnt; i++) {
3730 if (wwn == lpfc_no_hba_reset[i]) {
3731 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3732 "6020 Setting use_no_reset port=%llx\n",
3733 wwn);
3734 use_no_reset_hba = true;
3735 break;
3736 }
3737 }
47a8617c 3738
895427bd
JS		 3739 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
3740 if (dev != &phba->pcidev->dev) {
3741 shost = scsi_host_alloc(&lpfc_vport_template,
3742 sizeof(struct lpfc_vport));
3743 } else {
96418b5e 3744 if (!use_no_reset_hba)
895427bd
JS		 3745 shost = scsi_host_alloc(&lpfc_template,
3746 sizeof(struct lpfc_vport));
3747 else
96418b5e 3748 shost = scsi_host_alloc(&lpfc_template_no_hr,
895427bd
JS		 3749 sizeof(struct lpfc_vport));
3750 }
3751 } else if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
3752 shost = scsi_host_alloc(&lpfc_template_nvme,
ea4142f6
JS		 3753 sizeof(struct lpfc_vport));
3754 }
2e0fef85
JS		 3755 if (!shost)
3756 goto out;
47a8617c 3757
2e0fef85
JS		 3758 vport = (struct lpfc_vport *) shost->hostdata;
3759 vport->phba = phba;
2e0fef85 3760 vport->load_flag |= FC_LOADING;
92d7f7b0 3761 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
7f5f3d0d 3762 vport->fc_rscn_flush = 0;
3de2a653 3763 lpfc_get_vport_cfgparam(vport);
895427bd 3764
2e0fef85
JS		 3765 shost->unique_id = instance;
3766 shost->max_id = LPFC_MAX_TARGET;
3de2a653 3767 shost->max_lun = vport->cfg_max_luns;
2e0fef85
JS		 3768 shost->this_id = -1;
3769 shost->max_cmd_len = 16;
8b0dff14 3770 shost->nr_hw_queues = phba->cfg_fcp_io_channel;
da0436e9 3771 if (phba->sli_rev == LPFC_SLI_REV4) {
28baac74 3772 shost->dma_boundary =
cb5172ea 3773 phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
da0436e9
JS		 3774 shost->sg_tablesize = phba->cfg_sg_seg_cnt;
3775 }
81301a9b 3776
47a8617c 3777 /*
2e0fef85
JS		 3778 * Set initial can_queue value since 0 is no longer supported and
3779 * scsi_add_host will fail. This will be adjusted later based on the
3780 * max xri value determined in hba setup.
47a8617c 3781 */
2e0fef85 3782 shost->can_queue = phba->cfg_hba_queue_depth - 10;
3de2a653 3783 if (dev != &phba->pcidev->dev) {
92d7f7b0
JS		 3784 shost->transportt = lpfc_vport_transport_template;
3785 vport->port_type = LPFC_NPIV_PORT;
3786 } else {
3787 shost->transportt = lpfc_transport_template;
3788 vport->port_type = LPFC_PHYSICAL_PORT;
3789 }
47a8617c 3790
2e0fef85
JS		 3791 /* Initialize all internally managed lists. */
3792 INIT_LIST_HEAD(&vport->fc_nodes);
da0436e9 3793 INIT_LIST_HEAD(&vport->rcv_buffer_list);
2e0fef85 3794 spin_lock_init(&vport->work_port_lock);
47a8617c 3795
33cc559a
TJ		 3796 setup_timer(&vport->fc_disctmo, lpfc_disc_timeout,
3797 (unsigned long)vport);
47a8617c 3798
33cc559a
TJ		 3799 setup_timer(&vport->els_tmofunc, lpfc_els_timeout,
3800 (unsigned long)vport);
92494144 3801
33cc559a
TJ		 3802 setup_timer(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo,
3803 (unsigned long)vport);
92494144 3804
d139b9bd 3805 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev);
2e0fef85
JS		 3806 if (error)
3807 goto out_put_shost;
47a8617c 3808
549e55cd 3809 spin_lock_irq(&phba->hbalock);
2e0fef85 3810 list_add_tail(&vport->listentry, &phba->port_list);
549e55cd 3811 spin_unlock_irq(&phba->hbalock);
2e0fef85 3812 return vport;
47a8617c 3813
2e0fef85
JS		 3814out_put_shost:
3815 scsi_host_put(shost);
3816out:
3817 return NULL;
47a8617c
JS		 3818}
3819
e59058c4 3820/**
3621a710 3821 * destroy_port - destroy an FC port
e59058c4
JS		 3822 * @vport: pointer to an lpfc virtual N_Port data structure.
3823 *
3824 * This routine destroys a FC port from the upper layer protocol. All the
3825 * resources associated with the port are released.
3826 **/
2e0fef85
JS		 3827void
3828destroy_port(struct lpfc_vport *vport)
47a8617c 3829{
92d7f7b0
JS		 3830 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
3831 struct lpfc_hba *phba = vport->phba;
47a8617c 3832
858c9f6c 3833 lpfc_debugfs_terminate(vport);
92d7f7b0
JS		 3834 fc_remove_host(shost);
3835 scsi_remove_host(shost);
47a8617c 3836
92d7f7b0
JS		 3837 spin_lock_irq(&phba->hbalock);
3838 list_del_init(&vport->listentry);
3839 spin_unlock_irq(&phba->hbalock);
47a8617c 3840
92d7f7b0 3841 lpfc_cleanup(vport);
47a8617c 3842 return;
47a8617c
JS		 3843}
3844
e59058c4 3845/**
3621a710 3846 * lpfc_get_instance - Get a unique integer ID
e59058c4
JS		 3847 *
3848 * This routine allocates a unique integer ID from lpfc_hba_index pool. It
3849 * uses the kernel idr facility to perform the task.
3850 *
3851 * Return codes:
3852 * instance - a unique integer ID allocated as the new instance.
3853 * -1 - lpfc get instance failed.
3854 **/
92d7f7b0
JS		 3855int
3856lpfc_get_instance(void)
3857{
ab516036
TH		 3858 int ret;
3859
3860 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL);
3861 return ret < 0 ? -1 : ret;
47a8617c
JS		 3862}
3863
e59058c4 3864/**
3621a710 3865 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done
e59058c4
JS		 3866 * @shost: pointer to SCSI host data structure.
3867 * @time: elapsed time of the scan in jiffies.
3868 *
3869 * This routine is called by the SCSI layer with a SCSI host to determine
3870 * whether the scan host is finished.
3871 *
3872 * Note: there is no scan_start function as adapter initialization will have
3873 * asynchronously kicked off the link initialization.
3874 *
3875 * Return codes
3876 * 0 - SCSI host scan is not over yet.
3877 * 1 - SCSI host scan is over.
3878 **/
47a8617c
JS		 3879int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time)
3880{
2e0fef85
JS		 3881 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
3882 struct lpfc_hba *phba = vport->phba;
858c9f6c 3883 int stat = 0;
47a8617c 3884
858c9f6c
JS		 3885 spin_lock_irq(shost->host_lock);
3886
51ef4c26 3887 if (vport->load_flag & FC_UNLOADING) {
858c9f6c
JS		 3888 stat = 1;
3889 goto finished;
3890 }
256ec0d0 3891 if (time >= msecs_to_jiffies(30 * 1000)) {
2e0fef85 3892 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS		 3893 "0461 Scanning longer than 30 "
3894 "seconds. Continuing initialization\n");
858c9f6c 3895 stat = 1;
47a8617c 3896 goto finished;
2e0fef85 3897 }
256ec0d0
JS		 3898 if (time >= msecs_to_jiffies(15 * 1000) &&
3899 phba->link_state <= LPFC_LINK_DOWN) {
2e0fef85 3900 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS		 3901 "0465 Link down longer than 15 "
3902 "seconds. Continuing initialization\n");
858c9f6c 3903 stat = 1;
47a8617c 3904 goto finished;
2e0fef85 3905 }
47a8617c 3906
2e0fef85 3907 if (vport->port_state != LPFC_VPORT_READY)
858c9f6c 3908 goto finished;
2e0fef85 3909 if (vport->num_disc_nodes || vport->fc_prli_sent)
858c9f6c 3910 goto finished;
256ec0d0 3911 if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000))
858c9f6c 3912 goto finished;
2e0fef85 3913 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0)
858c9f6c
JS		 3914 goto finished;
3915
3916 stat = 1;
47a8617c
JS		 3917
3918finished:
858c9f6c
JS		 3919 spin_unlock_irq(shost->host_lock);
3920 return stat;
92d7f7b0 3921}
47a8617c 3922
e59058c4 3923/**
3621a710 3924 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port
e59058c4
JS		 3925 * @shost: pointer to SCSI host data structure.
3926 *
3927 * This routine initializes a given SCSI host attributes on a FC port. The
3928 * SCSI host can be either on top of a physical port or a virtual port.
3929 **/
92d7f7b0
JS		 3930void lpfc_host_attrib_init(struct Scsi_Host *shost)
3931{
3932 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
3933 struct lpfc_hba *phba = vport->phba;
47a8617c 3934 /*
2e0fef85 3935 * Set fixed host attributes. Must done after lpfc_sli_hba_setup().
47a8617c
JS		 3936 */
3937
2e0fef85
JS		 3938 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
3939 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
47a8617c
JS		 3940 fc_host_supported_classes(shost) = FC_COS_CLASS3;
3941
3942 memset(fc_host_supported_fc4s(shost), 0,
2e0fef85 3943 sizeof(fc_host_supported_fc4s(shost)));
47a8617c
JS		 3944 fc_host_supported_fc4s(shost)[2] = 1;
3945 fc_host_supported_fc4s(shost)[7] = 1;
3946
92d7f7b0
JS		 3947 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost),
3948 sizeof fc_host_symbolic_name(shost));
47a8617c
JS		 3949
3950 fc_host_supported_speeds(shost) = 0;
d38dd52c
JS		 3951 if (phba->lmt & LMT_32Gb)
3952 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT;
88a2cfbb
JS		 3953 if (phba->lmt & LMT_16Gb)
3954 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT;
47a8617c
JS		 3955 if (phba->lmt & LMT_10Gb)
3956 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT;
a8adb832
JS		 3957 if (phba->lmt & LMT_8Gb)
3958 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT;
47a8617c
JS		 3959 if (phba->lmt & LMT_4Gb)
3960 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT;
3961 if (phba->lmt & LMT_2Gb)
3962 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT;
3963 if (phba->lmt & LMT_1Gb)
3964 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT;
3965
3966 fc_host_maxframe_size(shost) =
2e0fef85
JS		 3967 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
3968 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb;
47a8617c 3969
0af5d708
MC		 3970 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo;
3971
47a8617c
JS		 3972 /* This value is also unchanging */
3973 memset(fc_host_active_fc4s(shost), 0,
2e0fef85 3974 sizeof(fc_host_active_fc4s(shost)));
47a8617c
JS		 3975 fc_host_active_fc4s(shost)[2] = 1;
3976 fc_host_active_fc4s(shost)[7] = 1;
3977
92d7f7b0 3978 fc_host_max_npiv_vports(shost) = phba->max_vpi;
47a8617c 3979 spin_lock_irq(shost->host_lock);
51ef4c26 3980 vport->load_flag &= ~FC_LOADING;
47a8617c 3981 spin_unlock_irq(shost->host_lock);
47a8617c 3982}
dea3101e 3983
e59058c4 3984/**
da0436e9 3985 * lpfc_stop_port_s3 - Stop SLI3 device port
e59058c4
JS		 3986 * @phba: pointer to lpfc hba data structure.
3987 *
da0436e9
JS		 3988 * This routine is invoked to stop an SLI3 device port, it stops the device
3989 * from generating interrupts and stops the device driver's timers for the
3990 * device.
e59058c4 3991 **/
da0436e9
JS		 3992static void
3993lpfc_stop_port_s3(struct lpfc_hba *phba)
db2378e0 3994{
da0436e9
JS		 3995 /* Clear all interrupt enable conditions */
3996 writel(0, phba->HCregaddr);
3997 readl(phba->HCregaddr); /* flush */
3998 /* Clear all pending interrupts */
3999 writel(0xffffffff, phba->HAregaddr);
4000 readl(phba->HAregaddr); /* flush */
db2378e0 4001
da0436e9
JS		 4002 /* Reset some HBA SLI setup states */
4003 lpfc_stop_hba_timers(phba);
4004 phba->pport->work_port_events = 0;
4005}
db2378e0 4006
da0436e9
JS		 4007/**
4008 * lpfc_stop_port_s4 - Stop SLI4 device port
4009 * @phba: pointer to lpfc hba data structure.
4010 *
4011 * This routine is invoked to stop an SLI4 device port, it stops the device
4012 * from generating interrupts and stops the device driver's timers for the
4013 * device.
4014 **/
4015static void
4016lpfc_stop_port_s4(struct lpfc_hba *phba)
4017{
4018 /* Reset some HBA SLI4 setup states */
4019 lpfc_stop_hba_timers(phba);
4020 phba->pport->work_port_events = 0;
4021 phba->sli4_hba.intr_enable = 0;
da0436e9 4022}
9399627f 4023
da0436e9
JS		 4024/**
4025 * lpfc_stop_port - Wrapper function for stopping hba port
4026 * @phba: Pointer to HBA context object.
4027 *
4028 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from
4029 * the API jump table function pointer from the lpfc_hba struct.
4030 **/
4031void
4032lpfc_stop_port(struct lpfc_hba *phba)
4033{
4034 phba->lpfc_stop_port(phba);
4035}
db2378e0 4036
ecfd03c6
JS		 4037/**
4038 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer
4039 * @phba: Pointer to hba for which this call is being executed.
4040 *
4041 * This routine starts the timer waiting for the FCF rediscovery to complete.
4042 **/
4043void
4044lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba)
4045{
4046 unsigned long fcf_redisc_wait_tmo =
4047 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO));
4048 /* Start fcf rediscovery wait period timer */
4049 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo);
4050 spin_lock_irq(&phba->hbalock);
4051 /* Allow action to new fcf asynchronous event */
4052 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
4053 /* Mark the FCF rediscovery pending state */
4054 phba->fcf.fcf_flag |= FCF_REDISC_PEND;
4055 spin_unlock_irq(&phba->hbalock);
4056}
4057
4058/**
4059 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout
4060 * @ptr: Map to lpfc_hba data structure pointer.
4061 *
4062 * This routine is invoked when waiting for FCF table rediscover has been
4063 * timed out. If new FCF record(s) has (have) been discovered during the
4064 * wait period, a new FCF event shall be added to the FCOE async event
4065 * list, and then worker thread shall be waked up for processing from the
4066 * worker thread context.
4067 **/
e399b228 4068static void
ecfd03c6
JS		 4069lpfc_sli4_fcf_redisc_wait_tmo(unsigned long ptr)
4070{
4071 struct lpfc_hba *phba = (struct lpfc_hba *)ptr;
4072
4073 /* Don't send FCF rediscovery event if timer cancelled */
4074 spin_lock_irq(&phba->hbalock);
4075 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
4076 spin_unlock_irq(&phba->hbalock);
4077 return;
4078 }
4079 /* Clear FCF rediscovery timer pending flag */
4080 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
4081 /* FCF rediscovery event to worker thread */
4082 phba->fcf.fcf_flag |= FCF_REDISC_EVT;
4083 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 4084 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 4085 "2776 FCF rediscover quiescent timer expired\n");
ecfd03c6
JS		 4086 /* wake up worker thread */
4087 lpfc_worker_wake_up(phba);
4088}
4089
e59058c4 4090/**
da0436e9 4091 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code
e59058c4 4092 * @phba: pointer to lpfc hba data structure.
da0436e9 4093 * @acqe_link: pointer to the async link completion queue entry.
e59058c4 4094 *
da0436e9
JS		 4095 * This routine is to parse the SLI4 link-attention link fault code and
4096 * translate it into the base driver's read link attention mailbox command
4097 * status.
4098 *
4099 * Return: Link-attention status in terms of base driver's coding.
e59058c4 4100 **/
da0436e9
JS		 4101static uint16_t
4102lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba,
4103 struct lpfc_acqe_link *acqe_link)
db2378e0 4104{
da0436e9 4105 uint16_t latt_fault;
9399627f 4106
da0436e9
JS		 4107 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) {
4108 case LPFC_ASYNC_LINK_FAULT_NONE:
4109 case LPFC_ASYNC_LINK_FAULT_LOCAL:
4110 case LPFC_ASYNC_LINK_FAULT_REMOTE:
4111 latt_fault = 0;
4112 break;
4113 default:
4114 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4115 "0398 Invalid link fault code: x%x\n",
4116 bf_get(lpfc_acqe_link_fault, acqe_link));
4117 latt_fault = MBXERR_ERROR;
4118 break;
4119 }
4120 return latt_fault;
db2378e0
JS		 4121}
4122
5b75da2f 4123/**
da0436e9 4124 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type
5b75da2f 4125 * @phba: pointer to lpfc hba data structure.
da0436e9 4126 * @acqe_link: pointer to the async link completion queue entry.
5b75da2f 4127 *
da0436e9
JS		 4128 * This routine is to parse the SLI4 link attention type and translate it
4129 * into the base driver's link attention type coding.
5b75da2f 4130 *
da0436e9
JS		 4131 * Return: Link attention type in terms of base driver's coding.
4132 **/
4133static uint8_t
4134lpfc_sli4_parse_latt_type(struct lpfc_hba *phba,
4135 struct lpfc_acqe_link *acqe_link)
5b75da2f 4136{
da0436e9 4137 uint8_t att_type;
5b75da2f 4138
da0436e9
JS		 4139 switch (bf_get(lpfc_acqe_link_status, acqe_link)) {
4140 case LPFC_ASYNC_LINK_STATUS_DOWN:
4141 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN:
76a95d75 4142 att_type = LPFC_ATT_LINK_DOWN;
da0436e9
JS		 4143 break;
4144 case LPFC_ASYNC_LINK_STATUS_UP:
4145 /* Ignore physical link up events - wait for logical link up */
76a95d75 4146 att_type = LPFC_ATT_RESERVED;
da0436e9
JS		 4147 break;
4148 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP:
76a95d75 4149 att_type = LPFC_ATT_LINK_UP;
da0436e9
JS		 4150 break;
4151 default:
4152 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4153 "0399 Invalid link attention type: x%x\n",
4154 bf_get(lpfc_acqe_link_status, acqe_link));
76a95d75 4155 att_type = LPFC_ATT_RESERVED;
da0436e9 4156 break;
5b75da2f 4157 }
da0436e9 4158 return att_type;
5b75da2f
JS		 4159}
4160
8b68cd52
JS		 4161/**
4162 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed
4163 * @phba: pointer to lpfc hba data structure.
4164 *
4165 * This routine is to get an SLI3 FC port's link speed in Mbps.
4166 *
4167 * Return: link speed in terms of Mbps.
4168 **/
4169uint32_t
4170lpfc_sli_port_speed_get(struct lpfc_hba *phba)
4171{
4172 uint32_t link_speed;
4173
4174 if (!lpfc_is_link_up(phba))
4175 return 0;
4176
a085e87c
JS		 4177 if (phba->sli_rev <= LPFC_SLI_REV3) {
4178 switch (phba->fc_linkspeed) {
4179 case LPFC_LINK_SPEED_1GHZ:
4180 link_speed = 1000;
4181 break;
4182 case LPFC_LINK_SPEED_2GHZ:
4183 link_speed = 2000;
4184 break;
4185 case LPFC_LINK_SPEED_4GHZ:
4186 link_speed = 4000;
4187 break;
4188 case LPFC_LINK_SPEED_8GHZ:
4189 link_speed = 8000;
4190 break;
4191 case LPFC_LINK_SPEED_10GHZ:
4192 link_speed = 10000;
4193 break;
4194 case LPFC_LINK_SPEED_16GHZ:
4195 link_speed = 16000;
4196 break;
4197 default:
4198 link_speed = 0;
4199 }
4200 } else {
4201 if (phba->sli4_hba.link_state.logical_speed)
4202 link_speed =
4203 phba->sli4_hba.link_state.logical_speed;
4204 else
4205 link_speed = phba->sli4_hba.link_state.speed;
8b68cd52
JS		 4206 }
4207 return link_speed;
4208}
4209
4210/**
4211 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed
4212 * @phba: pointer to lpfc hba data structure.
4213 * @evt_code: asynchronous event code.
4214 * @speed_code: asynchronous event link speed code.
4215 *
4216 * This routine is to parse the giving SLI4 async event link speed code into
4217 * value of Mbps for the link speed.
4218 *
4219 * Return: link speed in terms of Mbps.
4220 **/
4221static uint32_t
4222lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code,
4223 uint8_t speed_code)
4224{
4225 uint32_t port_speed;
4226
4227 switch (evt_code) {
4228 case LPFC_TRAILER_CODE_LINK:
4229 switch (speed_code) {
26d830ec 4230 case LPFC_ASYNC_LINK_SPEED_ZERO:
8b68cd52
JS		 4231 port_speed = 0;
4232 break;
26d830ec 4233 case LPFC_ASYNC_LINK_SPEED_10MBPS:
8b68cd52
JS		 4234 port_speed = 10;
4235 break;
26d830ec 4236 case LPFC_ASYNC_LINK_SPEED_100MBPS:
8b68cd52
JS		 4237 port_speed = 100;
4238 break;
26d830ec 4239 case LPFC_ASYNC_LINK_SPEED_1GBPS:
8b68cd52
JS		 4240 port_speed = 1000;
4241 break;
26d830ec 4242 case LPFC_ASYNC_LINK_SPEED_10GBPS:
8b68cd52
JS		 4243 port_speed = 10000;
4244 break;
26d830ec
JS		 4245 case LPFC_ASYNC_LINK_SPEED_20GBPS:
4246 port_speed = 20000;
4247 break;
4248 case LPFC_ASYNC_LINK_SPEED_25GBPS:
4249 port_speed = 25000;
4250 break;
4251 case LPFC_ASYNC_LINK_SPEED_40GBPS:
4252 port_speed = 40000;
4253 break;
8b68cd52
JS		 4254 default:
4255 port_speed = 0;
4256 }
4257 break;
4258 case LPFC_TRAILER_CODE_FC:
4259 switch (speed_code) {
26d830ec 4260 case LPFC_FC_LA_SPEED_UNKNOWN:
8b68cd52
JS		 4261 port_speed = 0;
4262 break;
26d830ec 4263 case LPFC_FC_LA_SPEED_1G:
8b68cd52
JS		 4264 port_speed = 1000;
4265 break;
26d830ec 4266 case LPFC_FC_LA_SPEED_2G:
8b68cd52
JS		 4267 port_speed = 2000;
4268 break;
26d830ec 4269 case LPFC_FC_LA_SPEED_4G:
8b68cd52
JS		 4270 port_speed = 4000;
4271 break;
26d830ec 4272 case LPFC_FC_LA_SPEED_8G:
8b68cd52
JS		 4273 port_speed = 8000;
4274 break;
26d830ec 4275 case LPFC_FC_LA_SPEED_10G:
8b68cd52
JS		 4276 port_speed = 10000;
4277 break;
26d830ec 4278 case LPFC_FC_LA_SPEED_16G:
8b68cd52
JS		 4279 port_speed = 16000;
4280 break;
d38dd52c
JS		 4281 case LPFC_FC_LA_SPEED_32G:
4282 port_speed = 32000;
4283 break;
8b68cd52
JS		 4284 default:
4285 port_speed = 0;
4286 }
4287 break;
4288 default:
4289 port_speed = 0;
4290 }
4291 return port_speed;
4292}
4293
da0436e9 4294/**
70f3c073 4295 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event
da0436e9
JS		 4296 * @phba: pointer to lpfc hba data structure.
4297 * @acqe_link: pointer to the async link completion queue entry.
4298 *
70f3c073 4299 * This routine is to handle the SLI4 asynchronous FCoE link event.
da0436e9
JS		 4300 **/
4301static void
4302lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
4303 struct lpfc_acqe_link *acqe_link)
4304{
4305 struct lpfc_dmabuf *mp;
4306 LPFC_MBOXQ_t *pmb;
4307 MAILBOX_t *mb;
76a95d75 4308 struct lpfc_mbx_read_top *la;
da0436e9 4309 uint8_t att_type;
76a95d75 4310 int rc;
da0436e9
JS		 4311
4312 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link);
76a95d75 4313 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP)
da0436e9 4314 return;
32b9793f 4315 phba->fcoe_eventtag = acqe_link->event_tag;
da0436e9
JS		 4316 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4317 if (!pmb) {
4318 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4319 "0395 The mboxq allocation failed\n");
4320 return;
4321 }
4322 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4323 if (!mp) {
4324 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4325 "0396 The lpfc_dmabuf allocation failed\n");
4326 goto out_free_pmb;
4327 }
4328 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4329 if (!mp->virt) {
4330 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4331 "0397 The mbuf allocation failed\n");
4332 goto out_free_dmabuf;
4333 }
4334
4335 /* Cleanup any outstanding ELS commands */
4336 lpfc_els_flush_all_cmd(phba);
4337
4338 /* Block ELS IOCBs until we have done process link event */
895427bd 4339 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
da0436e9
JS		 4340
4341 /* Update link event statistics */
4342 phba->sli.slistat.link_event++;
4343
76a95d75
JS		 4344 /* Create lpfc_handle_latt mailbox command from link ACQE */
4345 lpfc_read_topology(phba, pmb, mp);
4346 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
da0436e9
JS		 4347 pmb->vport = phba->pport;
4348
da0436e9
JS		 4349 /* Keep the link status for extra SLI4 state machine reference */
4350 phba->sli4_hba.link_state.speed =
8b68cd52
JS		 4351 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK,
4352 bf_get(lpfc_acqe_link_speed, acqe_link));
da0436e9
JS		 4353 phba->sli4_hba.link_state.duplex =
4354 bf_get(lpfc_acqe_link_duplex, acqe_link);
4355 phba->sli4_hba.link_state.status =
4356 bf_get(lpfc_acqe_link_status, acqe_link);
70f3c073
JS		 4357 phba->sli4_hba.link_state.type =
4358 bf_get(lpfc_acqe_link_type, acqe_link);
4359 phba->sli4_hba.link_state.number =
4360 bf_get(lpfc_acqe_link_number, acqe_link);
da0436e9
JS		 4361 phba->sli4_hba.link_state.fault =
4362 bf_get(lpfc_acqe_link_fault, acqe_link);
65467b6b 4363 phba->sli4_hba.link_state.logical_speed =
8b68cd52
JS		 4364 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10;
4365
70f3c073 4366 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
c31098ce
JS		 4367 "2900 Async FC/FCoE Link event - Speed:%dGBit "
4368 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d "
4369 "Logical speed:%dMbps Fault:%d\n",
70f3c073
JS		 4370 phba->sli4_hba.link_state.speed,
4371 phba->sli4_hba.link_state.topology,
4372 phba->sli4_hba.link_state.status,
4373 phba->sli4_hba.link_state.type,
4374 phba->sli4_hba.link_state.number,
8b68cd52 4375 phba->sli4_hba.link_state.logical_speed,
70f3c073 4376 phba->sli4_hba.link_state.fault);
76a95d75
JS		 4377 /*
4378 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch
4379 * topology info. Note: Optional for non FC-AL ports.
4380 */
4381 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
4382 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4383 if (rc == MBX_NOT_FINISHED)
4384 goto out_free_dmabuf;
4385 return;
4386 }
4387 /*
4388 * For FCoE Mode: fill in all the topology information we need and call
4389 * the READ_TOPOLOGY completion routine to continue without actually
4390 * sending the READ_TOPOLOGY mailbox command to the port.
4391 */
4392 /* Parse and translate status field */
4393 mb = &pmb->u.mb;
4394 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba, acqe_link);
4395
4396 /* Parse and translate link attention fields */
4397 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop;
4398 la->eventTag = acqe_link->event_tag;
4399 bf_set(lpfc_mbx_read_top_att_type, la, att_type);
4400 bf_set(lpfc_mbx_read_top_link_spd, la,
a085e87c 4401 (bf_get(lpfc_acqe_link_speed, acqe_link)));
76a95d75
JS		 4402
4403 /* Fake the the following irrelvant fields */
4404 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT);
4405 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0);
4406 bf_set(lpfc_mbx_read_top_il, la, 0);
4407 bf_set(lpfc_mbx_read_top_pb, la, 0);
4408 bf_set(lpfc_mbx_read_top_fa, la, 0);
4409 bf_set(lpfc_mbx_read_top_mm, la, 0);
da0436e9
JS		 4410
4411 /* Invoke the lpfc_handle_latt mailbox command callback function */
76a95d75 4412 lpfc_mbx_cmpl_read_topology(phba, pmb);
da0436e9 4413
5b75da2f 4414 return;
da0436e9
JS		 4415
4416out_free_dmabuf:
4417 kfree(mp);
4418out_free_pmb:
4419 mempool_free(pmb, phba->mbox_mem_pool);
4420}
4421
70f3c073
JS		 4422/**
4423 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event
4424 * @phba: pointer to lpfc hba data structure.
4425 * @acqe_fc: pointer to the async fc completion queue entry.
4426 *
4427 * This routine is to handle the SLI4 asynchronous FC event. It will simply log
4428 * that the event was received and then issue a read_topology mailbox command so
4429 * that the rest of the driver will treat it the same as SLI3.
4430 **/
4431static void
4432lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc)
4433{
4434 struct lpfc_dmabuf *mp;
4435 LPFC_MBOXQ_t *pmb;
7bdedb34
JS		 4436 MAILBOX_t *mb;
4437 struct lpfc_mbx_read_top *la;
70f3c073
JS		 4438 int rc;
4439
4440 if (bf_get(lpfc_trailer_type, acqe_fc) !=
4441 LPFC_FC_LA_EVENT_TYPE_FC_LINK) {
4442 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4443 "2895 Non FC link Event detected.(%d)\n",
4444 bf_get(lpfc_trailer_type, acqe_fc));
4445 return;
4446 }
4447 /* Keep the link status for extra SLI4 state machine reference */
4448 phba->sli4_hba.link_state.speed =
8b68cd52
JS		 4449 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
4450 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
70f3c073
JS		 4451 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
4452 phba->sli4_hba.link_state.topology =
4453 bf_get(lpfc_acqe_fc_la_topology, acqe_fc);
4454 phba->sli4_hba.link_state.status =
4455 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc);
4456 phba->sli4_hba.link_state.type =
4457 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc);
4458 phba->sli4_hba.link_state.number =
4459 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc);
4460 phba->sli4_hba.link_state.fault =
4461 bf_get(lpfc_acqe_link_fault, acqe_fc);
4462 phba->sli4_hba.link_state.logical_speed =
8b68cd52 4463 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
70f3c073
JS		 4464 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4465 "2896 Async FC event - Speed:%dGBaud Topology:x%x "
4466 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:"
4467 "%dMbps Fault:%d\n",
4468 phba->sli4_hba.link_state.speed,
4469 phba->sli4_hba.link_state.topology,
4470 phba->sli4_hba.link_state.status,
4471 phba->sli4_hba.link_state.type,
4472 phba->sli4_hba.link_state.number,
8b68cd52 4473 phba->sli4_hba.link_state.logical_speed,
70f3c073
JS		 4474 phba->sli4_hba.link_state.fault);
4475 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4476 if (!pmb) {
4477 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4478 "2897 The mboxq allocation failed\n");
4479 return;
4480 }
4481 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4482 if (!mp) {
4483 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4484 "2898 The lpfc_dmabuf allocation failed\n");
4485 goto out_free_pmb;
4486 }
4487 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4488 if (!mp->virt) {
4489 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4490 "2899 The mbuf allocation failed\n");
4491 goto out_free_dmabuf;
4492 }
4493
4494 /* Cleanup any outstanding ELS commands */
4495 lpfc_els_flush_all_cmd(phba);
4496
4497 /* Block ELS IOCBs until we have done process link event */
895427bd 4498 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
70f3c073
JS		 4499
4500 /* Update link event statistics */
4501 phba->sli.slistat.link_event++;
4502
4503 /* Create lpfc_handle_latt mailbox command from link ACQE */
4504 lpfc_read_topology(phba, pmb, mp);
4505 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
4506 pmb->vport = phba->pport;
4507
7bdedb34
JS		 4508 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
4509 /* Parse and translate status field */
4510 mb = &pmb->u.mb;
4511 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba,
4512 (void *)acqe_fc);
4513
4514 /* Parse and translate link attention fields */
4515 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop;
4516 la->eventTag = acqe_fc->event_tag;
4517 bf_set(lpfc_mbx_read_top_att_type, la,
4518 LPFC_FC_LA_TYPE_LINK_DOWN);
4519
4520 /* Invoke the mailbox command callback function */
4521 lpfc_mbx_cmpl_read_topology(phba, pmb);
4522
4523 return;
4524 }
4525
70f3c073
JS		 4526 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4527 if (rc == MBX_NOT_FINISHED)
4528 goto out_free_dmabuf;
4529 return;
4530
4531out_free_dmabuf:
4532 kfree(mp);
4533out_free_pmb:
4534 mempool_free(pmb, phba->mbox_mem_pool);
4535}
4536
4537/**
4538 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event
4539 * @phba: pointer to lpfc hba data structure.
4540 * @acqe_fc: pointer to the async SLI completion queue entry.
4541 *
4542 * This routine is to handle the SLI4 asynchronous SLI events.
4543 **/
4544static void
4545lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
4546{
4b8bae08 4547 char port_name;
8c1312e1 4548 char message[128];
4b8bae08 4549 uint8_t status;
946727dc 4550 uint8_t evt_type;
448193b5 4551 uint8_t operational = 0;
946727dc 4552 struct temp_event temp_event_data;
4b8bae08 4553 struct lpfc_acqe_misconfigured_event *misconfigured;
946727dc
JS		 4554 struct Scsi_Host *shost;
4555
4556 evt_type = bf_get(lpfc_trailer_type, acqe_sli);
4b8bae08 4557
448193b5
JS		 4558 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4559 "2901 Async SLI event - Event Data1:x%08x Event Data2:"
4560 "x%08x SLI Event Type:%d\n",
4561 acqe_sli->event_data1, acqe_sli->event_data2,
4562 evt_type);
4b8bae08
JS		 4563
4564 port_name = phba->Port[0];
4565 if (port_name == 0x00)
4566 port_name = '?'; /* get port name is empty */
4567
946727dc
JS		 4568 switch (evt_type) {
4569 case LPFC_SLI_EVENT_TYPE_OVER_TEMP:
4570 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4571 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
4572 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4573
4574 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
4575 "3190 Over Temperature:%d Celsius- Port Name %c\n",
4576 acqe_sli->event_data1, port_name);
4577
310429ef 4578 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS		 4579 shost = lpfc_shost_from_vport(phba->pport);
4580 fc_host_post_vendor_event(shost, fc_get_event_number(),
4581 sizeof(temp_event_data),
4582 (char *)&temp_event_data,
4583 SCSI_NL_VID_TYPE_PCI
4584 | PCI_VENDOR_ID_EMULEX);
4585 break;
4586 case LPFC_SLI_EVENT_TYPE_NORM_TEMP:
4587 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4588 temp_event_data.event_code = LPFC_NORMAL_TEMP;
4589 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4590
4591 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4592 "3191 Normal Temperature:%d Celsius - Port Name %c\n",
4593 acqe_sli->event_data1, port_name);
4594
4595 shost = lpfc_shost_from_vport(phba->pport);
4596 fc_host_post_vendor_event(shost, fc_get_event_number(),
4597 sizeof(temp_event_data),
4598 (char *)&temp_event_data,
4599 SCSI_NL_VID_TYPE_PCI
4600 | PCI_VENDOR_ID_EMULEX);
4601 break;
4602 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED:
4603 misconfigured = (struct lpfc_acqe_misconfigured_event *)
4b8bae08
JS		 4604 &acqe_sli->event_data1;
4605
946727dc
JS		 4606 /* fetch the status for this port */
4607 switch (phba->sli4_hba.lnk_info.lnk_no) {
4608 case LPFC_LINK_NUMBER_0:
448193b5
JS		 4609 status = bf_get(lpfc_sli_misconfigured_port0_state,
4610 &misconfigured->theEvent);
4611 operational = bf_get(lpfc_sli_misconfigured_port0_op,
4b8bae08 4612 &misconfigured->theEvent);
946727dc
JS		 4613 break;
4614 case LPFC_LINK_NUMBER_1:
448193b5
JS		 4615 status = bf_get(lpfc_sli_misconfigured_port1_state,
4616 &misconfigured->theEvent);
4617 operational = bf_get(lpfc_sli_misconfigured_port1_op,
4b8bae08 4618 &misconfigured->theEvent);
946727dc
JS		 4619 break;
4620 case LPFC_LINK_NUMBER_2:
448193b5
JS		 4621 status = bf_get(lpfc_sli_misconfigured_port2_state,
4622 &misconfigured->theEvent);
4623 operational = bf_get(lpfc_sli_misconfigured_port2_op,
4b8bae08 4624 &misconfigured->theEvent);
946727dc
JS		 4625 break;
4626 case LPFC_LINK_NUMBER_3:
448193b5
JS		 4627 status = bf_get(lpfc_sli_misconfigured_port3_state,
4628 &misconfigured->theEvent);
4629 operational = bf_get(lpfc_sli_misconfigured_port3_op,
4b8bae08 4630 &misconfigured->theEvent);
946727dc
JS		 4631 break;
4632 default:
448193b5
JS		 4633 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4634 "3296 "
4635 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED "
4636 "event: Invalid link %d",
4637 phba->sli4_hba.lnk_info.lnk_no);
4638 return;
946727dc 4639 }
4b8bae08 4640
448193b5
JS		 4641 /* Skip if optic state unchanged */
4642 if (phba->sli4_hba.lnk_info.optic_state == status)
4643 return;
4644
946727dc
JS		 4645 switch (status) {
4646 case LPFC_SLI_EVENT_STATUS_VALID:
448193b5
JS		 4647 sprintf(message, "Physical Link is functional");
4648 break;
946727dc
JS		 4649 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT:
4650 sprintf(message, "Optics faulted/incorrectly "
4651 "installed/not installed - Reseat optics, "
4652 "if issue not resolved, replace.");
4653 break;
4654 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE:
4655 sprintf(message,
4656 "Optics of two types installed - Remove one "
4657 "optic or install matching pair of optics.");
4658 break;
4659 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED:
4660 sprintf(message, "Incompatible optics - Replace with "
292098be 4661 "compatible optics for card to function.");
946727dc 4662 break;
448193b5
JS		 4663 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED:
4664 sprintf(message, "Unqualified optics - Replace with "
4665 "Avago optics for Warranty and Technical "
4666 "Support - Link is%s operational",
2ea259ee 4667 (operational) ? " not" : "");
448193b5
JS		 4668 break;
4669 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED:
4670 sprintf(message, "Uncertified optics - Replace with "
4671 "Avago-certified optics to enable link "
4672 "operation - Link is%s operational",
2ea259ee 4673 (operational) ? " not" : "");
448193b5 4674 break;
946727dc
JS		 4675 default:
4676 /* firmware is reporting a status we don't know about */
4677 sprintf(message, "Unknown event status x%02x", status);
4678 break;
4679 }
448193b5 4680 phba->sli4_hba.lnk_info.optic_state = status;
946727dc 4681 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
448193b5 4682 "3176 Port Name %c %s\n", port_name, message);
946727dc
JS		 4683 break;
4684 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT:
4685 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4686 "3192 Remote DPort Test Initiated - "
4687 "Event Data1:x%08x Event Data2: x%08x\n",
4688 acqe_sli->event_data1, acqe_sli->event_data2);
4b8bae08
JS		 4689 break;
4690 default:
946727dc
JS		 4691 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4692 "3193 Async SLI event - Event Data1:x%08x Event Data2:"
4693 "x%08x SLI Event Type:%d\n",
4694 acqe_sli->event_data1, acqe_sli->event_data2,
4695 evt_type);
4b8bae08
JS		 4696 break;
4697 }
70f3c073
JS		 4698}
4699
fc2b989b
JS		 4700/**
4701 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport
4702 * @vport: pointer to vport data structure.
4703 *
4704 * This routine is to perform Clear Virtual Link (CVL) on a vport in
4705 * response to a CVL event.
4706 *
4707 * Return the pointer to the ndlp with the vport if successful, otherwise
4708 * return NULL.
4709 **/
4710static struct lpfc_nodelist *
4711lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport)
4712{
4713 struct lpfc_nodelist *ndlp;
4714 struct Scsi_Host *shost;
4715 struct lpfc_hba *phba;
4716
4717 if (!vport)
4718 return NULL;
fc2b989b
JS		 4719 phba = vport->phba;
4720 if (!phba)
4721 return NULL;
78730cfe
JS		 4722 ndlp = lpfc_findnode_did(vport, Fabric_DID);
4723 if (!ndlp) {
4724 /* Cannot find existing Fabric ndlp, so allocate a new one */
4725 ndlp = mempool_alloc(phba->nlp_mem_pool, GFP_KERNEL);
4726 if (!ndlp)
4727 return 0;
4728 lpfc_nlp_init(vport, ndlp, Fabric_DID);
4729 /* Set the node type */
4730 ndlp->nlp_type |= NLP_FABRIC;
4731 /* Put ndlp onto node list */
4732 lpfc_enqueue_node(vport, ndlp);
4733 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
4734 /* re-setup ndlp without removing from node list */
4735 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
4736 if (!ndlp)
4737 return 0;
4738 }
63e801ce
JS		 4739 if ((phba->pport->port_state < LPFC_FLOGI) &&
4740 (phba->pport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS		 4741 return NULL;
4742 /* If virtual link is not yet instantiated ignore CVL */
63e801ce
JS		 4743 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)
4744 && (vport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS		 4745 return NULL;
4746 shost = lpfc_shost_from_vport(vport);
4747 if (!shost)
4748 return NULL;
4749 lpfc_linkdown_port(vport);
4750 lpfc_cleanup_pending_mbox(vport);
4751 spin_lock_irq(shost->host_lock);
4752 vport->fc_flag |= FC_VPORT_CVL_RCVD;
4753 spin_unlock_irq(shost->host_lock);
4754
4755 return ndlp;
4756}
4757
4758/**
4759 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports
4760 * @vport: pointer to lpfc hba data structure.
4761 *
4762 * This routine is to perform Clear Virtual Link (CVL) on all vports in
4763 * response to a FCF dead event.
4764 **/
4765static void
4766lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba)
4767{
4768 struct lpfc_vport **vports;
4769 int i;
4770
4771 vports = lpfc_create_vport_work_array(phba);
4772 if (vports)
4773 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
4774 lpfc_sli4_perform_vport_cvl(vports[i]);
4775 lpfc_destroy_vport_work_array(phba, vports);
4776}
4777
da0436e9 4778/**
76a95d75 4779 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event
da0436e9
JS		 4780 * @phba: pointer to lpfc hba data structure.
4781 * @acqe_link: pointer to the async fcoe completion queue entry.
4782 *
4783 * This routine is to handle the SLI4 asynchronous fcoe event.
4784 **/
4785static void
76a95d75 4786lpfc_sli4_async_fip_evt(struct lpfc_hba *phba,
70f3c073 4787 struct lpfc_acqe_fip *acqe_fip)
da0436e9 4788{
70f3c073 4789 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
da0436e9 4790 int rc;
6669f9bb
JS		 4791 struct lpfc_vport *vport;
4792 struct lpfc_nodelist *ndlp;
4793 struct Scsi_Host *shost;
695a814e
JS		 4794 int active_vlink_present;
4795 struct lpfc_vport **vports;
4796 int i;
da0436e9 4797
70f3c073
JS		 4798 phba->fc_eventTag = acqe_fip->event_tag;
4799 phba->fcoe_eventtag = acqe_fip->event_tag;
da0436e9 4800 switch (event_type) {
70f3c073
JS		 4801 case LPFC_FIP_EVENT_TYPE_NEW_FCF:
4802 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD:
4803 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF)
999d813f
JS		 4804 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4805 LOG_DISCOVERY,
a93ff37a
JS		 4806 "2546 New FCF event, evt_tag:x%x, "
4807 "index:x%x\n",
70f3c073
JS		 4808 acqe_fip->event_tag,
4809 acqe_fip->index);
999d813f
JS		 4810 else
4811 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP |
4812 LOG_DISCOVERY,
a93ff37a
JS		 4813 "2788 FCF param modified event, "
4814 "evt_tag:x%x, index:x%x\n",
70f3c073
JS		 4815 acqe_fip->event_tag,
4816 acqe_fip->index);
38b92ef8 4817 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
0c9ab6f5
JS		 4818 /*
4819 * During period of FCF discovery, read the FCF
4820 * table record indexed by the event to update
a93ff37a 4821 * FCF roundrobin failover eligible FCF bmask.
0c9ab6f5
JS		 4822 */
4823 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
4824 LOG_DISCOVERY,
a93ff37a
JS		 4825 "2779 Read FCF (x%x) for updating "
4826 "roundrobin FCF failover bmask\n",
70f3c073
JS		 4827 acqe_fip->index);
4828 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index);
0c9ab6f5 4829 }
38b92ef8
JS		 4830
4831 /* If the FCF discovery is in progress, do nothing. */
3804dc84 4832 spin_lock_irq(&phba->hbalock);
a93ff37a 4833 if (phba->hba_flag & FCF_TS_INPROG) {
38b92ef8
JS		 4834 spin_unlock_irq(&phba->hbalock);
4835 break;
4836 }
4837 /* If fast FCF failover rescan event is pending, do nothing */
4838 if (phba->fcf.fcf_flag & FCF_REDISC_EVT) {
4839 spin_unlock_irq(&phba->hbalock);
4840 break;
4841 }
4842
c2b9712e
JS		 4843 /* If the FCF has been in discovered state, do nothing. */
4844 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) {
3804dc84
JS		 4845 spin_unlock_irq(&phba->hbalock);
4846 break;
4847 }
4848 spin_unlock_irq(&phba->hbalock);
38b92ef8 4849
0c9ab6f5
JS		 4850 /* Otherwise, scan the entire FCF table and re-discover SAN */
4851 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a
JS		 4852 "2770 Start FCF table scan per async FCF "
4853 "event, evt_tag:x%x, index:x%x\n",
70f3c073 4854 acqe_fip->event_tag, acqe_fip->index);
0c9ab6f5
JS		 4855 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba,
4856 LPFC_FCOE_FCF_GET_FIRST);
da0436e9 4857 if (rc)
0c9ab6f5
JS		 4858 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
4859 "2547 Issue FCF scan read FCF mailbox "
a93ff37a 4860 "command failed (x%x)\n", rc);
da0436e9
JS		 4861 break;
4862
70f3c073 4863 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL:
da0436e9 4864 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e4e74273 4865 "2548 FCF Table full count 0x%x tag 0x%x\n",
70f3c073
JS		 4866 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip),
4867 acqe_fip->event_tag);
da0436e9
JS		 4868 break;
4869
70f3c073 4870 case LPFC_FIP_EVENT_TYPE_FCF_DEAD:
80c17849 4871 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 4872 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
a93ff37a 4873 "2549 FCF (x%x) disconnected from network, "
70f3c073 4874 "tag:x%x\n", acqe_fip->index, acqe_fip->event_tag);
38b92ef8
JS		 4875 /*
4876 * If we are in the middle of FCF failover process, clear
4877 * the corresponding FCF bit in the roundrobin bitmap.
da0436e9 4878 */
fc2b989b 4879 spin_lock_irq(&phba->hbalock);
a1cadfef
JS		 4880 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) &&
4881 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) {
fc2b989b 4882 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 4883 /* Update FLOGI FCF failover eligible FCF bmask */
70f3c073 4884 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index);
fc2b989b
JS		 4885 break;
4886 }
38b92ef8
JS		 4887 spin_unlock_irq(&phba->hbalock);
4888
4889 /* If the event is not for currently used fcf do nothing */
70f3c073 4890 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index)
38b92ef8
JS		 4891 break;
4892
4893 /*
4894 * Otherwise, request the port to rediscover the entire FCF
4895 * table for a fast recovery from case that the current FCF
4896 * is no longer valid as we are not in the middle of FCF
4897 * failover process already.
4898 */
c2b9712e
JS		 4899 spin_lock_irq(&phba->hbalock);
4900 /* Mark the fast failover process in progress */
4901 phba->fcf.fcf_flag |= FCF_DEAD_DISC;
4902 spin_unlock_irq(&phba->hbalock);
4903
4904 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
4905 "2771 Start FCF fast failover process due to "
4906 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x "
4907 "\n", acqe_fip->event_tag, acqe_fip->index);
4908 rc = lpfc_sli4_redisc_fcf_table(phba);
4909 if (rc) {
4910 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4911 LOG_DISCOVERY,
4912 "2772 Issue FCF rediscover mabilbox "
4913 "command failed, fail through to FCF "
4914 "dead event\n");
4915 spin_lock_irq(&phba->hbalock);
4916 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
4917 spin_unlock_irq(&phba->hbalock);
4918 /*
4919 * Last resort will fail over by treating this
4920 * as a link down to FCF registration.
4921 */
4922 lpfc_sli4_fcf_dead_failthrough(phba);
4923 } else {
4924 /* Reset FCF roundrobin bmask for new discovery */
4925 lpfc_sli4_clear_fcf_rr_bmask(phba);
4926 /*
4927 * Handling fast FCF failover to a DEAD FCF event is
4928 * considered equalivant to receiving CVL to all vports.
4929 */
4930 lpfc_sli4_perform_all_vport_cvl(phba);
4931 }
da0436e9 4932 break;
70f3c073 4933 case LPFC_FIP_EVENT_TYPE_CVL:
80c17849 4934 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 4935 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
6669f9bb 4936 "2718 Clear Virtual Link Received for VPI 0x%x"
70f3c073 4937 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag);
6d368e53 4938
6669f9bb 4939 vport = lpfc_find_vport_by_vpid(phba,
5248a749 4940 acqe_fip->index);
fc2b989b 4941 ndlp = lpfc_sli4_perform_vport_cvl(vport);
6669f9bb
JS		 4942 if (!ndlp)
4943 break;
695a814e
JS		 4944 active_vlink_present = 0;
4945
4946 vports = lpfc_create_vport_work_array(phba);
4947 if (vports) {
4948 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
4949 i++) {
4950 if ((!(vports[i]->fc_flag &
4951 FC_VPORT_CVL_RCVD)) &&
4952 (vports[i]->port_state > LPFC_FDISC)) {
4953 active_vlink_present = 1;
4954 break;
4955 }
4956 }
4957 lpfc_destroy_vport_work_array(phba, vports);
4958 }
4959
cc82355a
JS		 4960 /*
4961 * Don't re-instantiate if vport is marked for deletion.
4962 * If we are here first then vport_delete is going to wait
4963 * for discovery to complete.
4964 */
4965 if (!(vport->load_flag & FC_UNLOADING) &&
4966 active_vlink_present) {
695a814e
JS		 4967 /*
4968 * If there are other active VLinks present,
4969 * re-instantiate the Vlink using FDISC.
4970 */
256ec0d0
JS		 4971 mod_timer(&ndlp->nlp_delayfunc,
4972 jiffies + msecs_to_jiffies(1000));
fc2b989b 4973 shost = lpfc_shost_from_vport(vport);
6669f9bb
JS		 4974 spin_lock_irq(shost->host_lock);
4975 ndlp->nlp_flag |= NLP_DELAY_TMO;
4976 spin_unlock_irq(shost->host_lock);
695a814e
JS		 4977 ndlp->nlp_last_elscmd = ELS_CMD_FDISC;
4978 vport->port_state = LPFC_FDISC;
4979 } else {
ecfd03c6
JS		 4980 /*
4981 * Otherwise, we request port to rediscover
4982 * the entire FCF table for a fast recovery
4983 * from possible case that the current FCF
0c9ab6f5
JS		 4984 * is no longer valid if we are not already
4985 * in the FCF failover process.
ecfd03c6 4986 */
fc2b989b 4987 spin_lock_irq(&phba->hbalock);
0c9ab6f5 4988 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
fc2b989b
JS		 4989 spin_unlock_irq(&phba->hbalock);
4990 break;
4991 }
4992 /* Mark the fast failover process in progress */
0c9ab6f5 4993 phba->fcf.fcf_flag |= FCF_ACVL_DISC;
fc2b989b 4994 spin_unlock_irq(&phba->hbalock);
0c9ab6f5
JS		 4995 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
4996 LOG_DISCOVERY,
a93ff37a 4997 "2773 Start FCF failover per CVL, "
70f3c073 4998 "evt_tag:x%x\n", acqe_fip->event_tag);
ecfd03c6 4999 rc = lpfc_sli4_redisc_fcf_table(phba);
fc2b989b 5000 if (rc) {
0c9ab6f5
JS		 5001 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
5002 LOG_DISCOVERY,
5003 "2774 Issue FCF rediscover "
5004 "mabilbox command failed, "
5005 "through to CVL event\n");
fc2b989b 5006 spin_lock_irq(&phba->hbalock);
0c9ab6f5 5007 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
fc2b989b 5008 spin_unlock_irq(&phba->hbalock);
ecfd03c6
JS		 5009 /*
5010 * Last resort will be re-try on the
5011 * the current registered FCF entry.
5012 */
5013 lpfc_retry_pport_discovery(phba);
38b92ef8
JS		 5014 } else
5015 /*
5016 * Reset FCF roundrobin bmask for new
5017 * discovery.
5018 */
7d791df7 5019 lpfc_sli4_clear_fcf_rr_bmask(phba);
6669f9bb
JS		 5020 }
5021 break;
da0436e9
JS		 5022 default:
5023 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5024 "0288 Unknown FCoE event type 0x%x event tag "
70f3c073 5025 "0x%x\n", event_type, acqe_fip->event_tag);
da0436e9
JS		 5026 break;
5027 }
5028}
5029
5030/**
5031 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event
5032 * @phba: pointer to lpfc hba data structure.
5033 * @acqe_link: pointer to the async dcbx completion queue entry.
5034 *
5035 * This routine is to handle the SLI4 asynchronous dcbx event.
5036 **/
5037static void
5038lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba,
5039 struct lpfc_acqe_dcbx *acqe_dcbx)
5040{
4d9ab994 5041 phba->fc_eventTag = acqe_dcbx->event_tag;
da0436e9
JS		 5042 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5043 "0290 The SLI4 DCBX asynchronous event is not "
5044 "handled yet\n");
5045}
5046
b19a061a
JS		 5047/**
5048 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event
5049 * @phba: pointer to lpfc hba data structure.
5050 * @acqe_link: pointer to the async grp5 completion queue entry.
5051 *
5052 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event
5053 * is an asynchronous notified of a logical link speed change. The Port
5054 * reports the logical link speed in units of 10Mbps.
5055 **/
5056static void
5057lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba,
5058 struct lpfc_acqe_grp5 *acqe_grp5)
5059{
5060 uint16_t prev_ll_spd;
5061
5062 phba->fc_eventTag = acqe_grp5->event_tag;
5063 phba->fcoe_eventtag = acqe_grp5->event_tag;
5064 prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
5065 phba->sli4_hba.link_state.logical_speed =
8b68cd52 5066 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10;
b19a061a
JS		 5067 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5068 "2789 GRP5 Async Event: Updating logical link speed "
8b68cd52
JS		 5069 "from %dMbps to %dMbps\n", prev_ll_spd,
5070 phba->sli4_hba.link_state.logical_speed);
b19a061a
JS		 5071}
5072
da0436e9
JS		 5073/**
5074 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event
5075 * @phba: pointer to lpfc hba data structure.
5076 *
5077 * This routine is invoked by the worker thread to process all the pending
5078 * SLI4 asynchronous events.
5079 **/
5080void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
5081{
5082 struct lpfc_cq_event *cq_event;
5083
5084 /* First, declare the async event has been handled */
5085 spin_lock_irq(&phba->hbalock);
5086 phba->hba_flag &= ~ASYNC_EVENT;
5087 spin_unlock_irq(&phba->hbalock);
5088 /* Now, handle all the async events */
5089 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
5090 /* Get the first event from the head of the event queue */
5091 spin_lock_irq(&phba->hbalock);
5092 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
5093 cq_event, struct lpfc_cq_event, list);
5094 spin_unlock_irq(&phba->hbalock);
5095 /* Process the asynchronous event */
5096 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) {
5097 case LPFC_TRAILER_CODE_LINK:
5098 lpfc_sli4_async_link_evt(phba,
5099 &cq_event->cqe.acqe_link);
5100 break;
5101 case LPFC_TRAILER_CODE_FCOE:
70f3c073 5102 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip);
da0436e9
JS		 5103 break;
5104 case LPFC_TRAILER_CODE_DCBX:
5105 lpfc_sli4_async_dcbx_evt(phba,
5106 &cq_event->cqe.acqe_dcbx);
5107 break;
b19a061a
JS		 5108 case LPFC_TRAILER_CODE_GRP5:
5109 lpfc_sli4_async_grp5_evt(phba,
5110 &cq_event->cqe.acqe_grp5);
5111 break;
70f3c073
JS		 5112 case LPFC_TRAILER_CODE_FC:
5113 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc);
5114 break;
5115 case LPFC_TRAILER_CODE_SLI:
5116 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli);
5117 break;
da0436e9
JS		 5118 default:
5119 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5120 "1804 Invalid asynchrous event code: "
5121 "x%x\n", bf_get(lpfc_trailer_code,
5122 &cq_event->cqe.mcqe_cmpl));
5123 break;
5124 }
5125 /* Free the completion event processed to the free pool */
5126 lpfc_sli4_cq_event_release(phba, cq_event);
5127 }
5128}
5129
ecfd03c6
JS		 5130/**
5131 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event
5132 * @phba: pointer to lpfc hba data structure.
5133 *
5134 * This routine is invoked by the worker thread to process FCF table
5135 * rediscovery pending completion event.
5136 **/
5137void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba)
5138{
5139 int rc;
5140
5141 spin_lock_irq(&phba->hbalock);
5142 /* Clear FCF rediscovery timeout event */
5143 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT;
5144 /* Clear driver fast failover FCF record flag */
5145 phba->fcf.failover_rec.flag = 0;
5146 /* Set state for FCF fast failover */
5147 phba->fcf.fcf_flag |= FCF_REDISC_FOV;
5148 spin_unlock_irq(&phba->hbalock);
5149
5150 /* Scan FCF table from the first entry to re-discover SAN */
0c9ab6f5 5151 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a 5152 "2777 Start post-quiescent FCF table scan\n");
0c9ab6f5 5153 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST);
ecfd03c6 5154 if (rc)
0c9ab6f5
JS		 5155 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5156 "2747 Issue FCF scan read FCF mailbox "
5157 "command failed 0x%x\n", rc);
ecfd03c6
JS		 5158}
5159
da0436e9
JS		 5160/**
5161 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table
5162 * @phba: pointer to lpfc hba data structure.
5163 * @dev_grp: The HBA PCI-Device group number.
5164 *
5165 * This routine is invoked to set up the per HBA PCI-Device group function
5166 * API jump table entries.
5167 *
5168 * Return: 0 if success, otherwise -ENODEV
5169 **/
5170int
5171lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
5172{
5173 int rc;
5174
5175 /* Set up lpfc PCI-device group */
5176 phba->pci_dev_grp = dev_grp;
5177
5178 /* The LPFC_PCI_DEV_OC uses SLI4 */
5179 if (dev_grp == LPFC_PCI_DEV_OC)
5180 phba->sli_rev = LPFC_SLI_REV4;
5181
5182 /* Set up device INIT API function jump table */
5183 rc = lpfc_init_api_table_setup(phba, dev_grp);
5184 if (rc)
5185 return -ENODEV;
5186 /* Set up SCSI API function jump table */
5187 rc = lpfc_scsi_api_table_setup(phba, dev_grp);
5188 if (rc)
5189 return -ENODEV;
5190 /* Set up SLI API function jump table */
5191 rc = lpfc_sli_api_table_setup(phba, dev_grp);
5192 if (rc)
5193 return -ENODEV;
5194 /* Set up MBOX API function jump table */
5195 rc = lpfc_mbox_api_table_setup(phba, dev_grp);
5196 if (rc)
5197 return -ENODEV;
5198
5199 return 0;
5b75da2f
JS		 5200}
5201
5202/**
3621a710 5203 * lpfc_log_intr_mode - Log the active interrupt mode
5b75da2f
JS		 5204 * @phba: pointer to lpfc hba data structure.
5205 * @intr_mode: active interrupt mode adopted.
5206 *
5207 * This routine it invoked to log the currently used active interrupt mode
5208 * to the device.
3772a991
JS		 5209 **/
5210static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode)
5b75da2f
JS		 5211{
5212 switch (intr_mode) {
5213 case 0:
5214 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5215 "0470 Enable INTx interrupt mode.\n");
5216 break;
5217 case 1:
5218 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5219 "0481 Enabled MSI interrupt mode.\n");
5220 break;
5221 case 2:
5222 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5223 "0480 Enabled MSI-X interrupt mode.\n");
5224 break;
5225 default:
5226 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5227 "0482 Illegal interrupt mode.\n");
5228 break;
5229 }
5230 return;
5231}
5232
5b75da2f 5233/**
3772a991 5234 * lpfc_enable_pci_dev - Enable a generic PCI device.
5b75da2f
JS		 5235 * @phba: pointer to lpfc hba data structure.
5236 *
3772a991
JS		 5237 * This routine is invoked to enable the PCI device that is common to all
5238 * PCI devices.
5b75da2f
JS		 5239 *
5240 * Return codes
af901ca1 5241 * 0 - successful
3772a991 5242 * other values - error
5b75da2f 5243 **/
3772a991
JS		 5244static int
5245lpfc_enable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5246{
3772a991 5247 struct pci_dev *pdev;
5b75da2f 5248
3772a991
JS		 5249 /* Obtain PCI device reference */
5250 if (!phba->pcidev)
5251 goto out_error;
5252 else
5253 pdev = phba->pcidev;
3772a991
JS		 5254 /* Enable PCI device */
5255 if (pci_enable_device_mem(pdev))
5256 goto out_error;
5257 /* Request PCI resource for the device */
e0c0483c 5258 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME))
3772a991
JS		 5259 goto out_disable_device;
5260 /* Set up device as PCI master and save state for EEH */
5261 pci_set_master(pdev);
5262 pci_try_set_mwi(pdev);
5263 pci_save_state(pdev);
5b75da2f 5264
0558056c 5265 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */
453193e0 5266 if (pci_is_pcie(pdev))
0558056c
JS		 5267 pdev->needs_freset = 1;
5268
3772a991 5269 return 0;
5b75da2f 5270
3772a991
JS		 5271out_disable_device:
5272 pci_disable_device(pdev);
5273out_error:
079b5c91 5274 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e0c0483c 5275 "1401 Failed to enable pci device\n");
3772a991 5276 return -ENODEV;
5b75da2f
JS		 5277}
5278
5279/**
3772a991 5280 * lpfc_disable_pci_dev - Disable a generic PCI device.
5b75da2f
JS		 5281 * @phba: pointer to lpfc hba data structure.
5282 *
3772a991
JS		 5283 * This routine is invoked to disable the PCI device that is common to all
5284 * PCI devices.
5b75da2f
JS		 5285 **/
5286static void
3772a991 5287lpfc_disable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5288{
3772a991 5289 struct pci_dev *pdev;
5b75da2f 5290
3772a991
JS		 5291 /* Obtain PCI device reference */
5292 if (!phba->pcidev)
5293 return;
5294 else
5295 pdev = phba->pcidev;
3772a991 5296 /* Release PCI resource and disable PCI device */
e0c0483c 5297 pci_release_mem_regions(pdev);
3772a991 5298 pci_disable_device(pdev);
5b75da2f
JS		 5299
5300 return;
5301}
5302
e59058c4 5303/**
3772a991
JS		 5304 * lpfc_reset_hba - Reset a hba
5305 * @phba: pointer to lpfc hba data structure.
e59058c4 5306 *
3772a991
JS		 5307 * This routine is invoked to reset a hba device. It brings the HBA
5308 * offline, performs a board restart, and then brings the board back
5309 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up
5310 * on outstanding mailbox commands.
e59058c4 5311 **/
3772a991
JS		 5312void
5313lpfc_reset_hba(struct lpfc_hba *phba)
dea3101e 5314{
3772a991
JS		 5315 /* If resets are disabled then set error state and return. */
5316 if (!phba->cfg_enable_hba_reset) {
5317 phba->link_state = LPFC_HBA_ERROR;
5318 return;
5319 }
ee62021a
JS		 5320 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
5321 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
5322 else
5323 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
3772a991
JS		 5324 lpfc_offline(phba);
5325 lpfc_sli_brdrestart(phba);
5326 lpfc_online(phba);
5327 lpfc_unblock_mgmt_io(phba);
5328}
dea3101e 5329
0a96e975
JS		 5330/**
5331 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions
5332 * @phba: pointer to lpfc hba data structure.
5333 *
5334 * This function enables the PCI SR-IOV virtual functions to a physical
5335 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5336 * enable the number of virtual functions to the physical function. As
5337 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5338 * API call does not considered as an error condition for most of the device.
5339 **/
5340uint16_t
5341lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba)
5342{
5343 struct pci_dev *pdev = phba->pcidev;
5344 uint16_t nr_virtfn;
5345 int pos;
5346
0a96e975
JS		 5347 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
5348 if (pos == 0)
5349 return 0;
5350
5351 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn);
5352 return nr_virtfn;
5353}
5354
912e3acd
JS		 5355/**
5356 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions
5357 * @phba: pointer to lpfc hba data structure.
5358 * @nr_vfn: number of virtual functions to be enabled.
5359 *
5360 * This function enables the PCI SR-IOV virtual functions to a physical
5361 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5362 * enable the number of virtual functions to the physical function. As
5363 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5364 * API call does not considered as an error condition for most of the device.
5365 **/
5366int
5367lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn)
5368{
5369 struct pci_dev *pdev = phba->pcidev;
0a96e975 5370 uint16_t max_nr_vfn;
912e3acd
JS		 5371 int rc;
5372
0a96e975
JS		 5373 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba);
5374 if (nr_vfn > max_nr_vfn) {
5375 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5376 "3057 Requested vfs (%d) greater than "
5377 "supported vfs (%d)", nr_vfn, max_nr_vfn);
5378 return -EINVAL;
5379 }
5380
912e3acd
JS		 5381 rc = pci_enable_sriov(pdev, nr_vfn);
5382 if (rc) {
5383 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5384 "2806 Failed to enable sriov on this device "
5385 "with vfn number nr_vf:%d, rc:%d\n",
5386 nr_vfn, rc);
5387 } else
5388 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5389 "2807 Successful enable sriov on this device "
5390 "with vfn number nr_vf:%d\n", nr_vfn);
5391 return rc;
5392}
5393
3772a991 5394/**
895427bd 5395 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources.
3772a991
JS		 5396 * @phba: pointer to lpfc hba data structure.
5397 *
895427bd
JS		 5398 * This routine is invoked to set up the driver internal resources before the
5399 * device specific resource setup to support the HBA device it attached to.
3772a991
JS		 5400 *
5401 * Return codes
895427bd
JS		 5402 * 0 - successful
5403 * other values - error
3772a991
JS		 5404 **/
5405static int
895427bd 5406lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
3772a991 5407{
895427bd 5408 struct lpfc_sli *psli = &phba->sli;
dea3101e 5409
2e0fef85 5410 /*
895427bd 5411 * Driver resources common to all SLI revisions
2e0fef85 5412 */
895427bd
JS		 5413 atomic_set(&phba->fast_event_count, 0);
5414 spin_lock_init(&phba->hbalock);
dea3101e 5415
895427bd
JS		 5416 /* Initialize ndlp management spinlock */
5417 spin_lock_init(&phba->ndlp_lock);
5418
5419 INIT_LIST_HEAD(&phba->port_list);
5420 INIT_LIST_HEAD(&phba->work_list);
5421 init_waitqueue_head(&phba->wait_4_mlo_m_q);
5422
5423 /* Initialize the wait queue head for the kernel thread */
5424 init_waitqueue_head(&phba->work_waitq);
5425
5426 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
f358dd0c 5427 "1403 Protocols supported %s %s %s\n",
895427bd
JS		 5428 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ?
5429 "SCSI" : " "),
5430 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ?
f358dd0c
JS		 5431 "NVME" : " "),
5432 (phba->nvmet_support ? "NVMET" : " "));
895427bd
JS		 5433
5434 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5435 /* Initialize the scsi buffer list used by driver for scsi IO */
5436 spin_lock_init(&phba->scsi_buf_list_get_lock);
5437 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get);
5438 spin_lock_init(&phba->scsi_buf_list_put_lock);
5439 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
5440 }
5441
5442 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
5443 (phba->nvmet_support == 0)) {
5444 /* Initialize the NVME buffer list used by driver for NVME IO */
5445 spin_lock_init(&phba->nvme_buf_list_get_lock);
5446 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_get);
5447 spin_lock_init(&phba->nvme_buf_list_put_lock);
5448 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
5449 }
5450
5451 /* Initialize the fabric iocb list */
5452 INIT_LIST_HEAD(&phba->fabric_iocb_list);
5453
5454 /* Initialize list to save ELS buffers */
5455 INIT_LIST_HEAD(&phba->elsbuf);
5456
5457 /* Initialize FCF connection rec list */
5458 INIT_LIST_HEAD(&phba->fcf_conn_rec_list);
5459
5460 /* Initialize OAS configuration list */
5461 spin_lock_init(&phba->devicelock);
5462 INIT_LIST_HEAD(&phba->luns);
858c9f6c 5463
3772a991 5464 /* MBOX heartbeat timer */
33cc559a 5465 setup_timer(&psli->mbox_tmo, lpfc_mbox_timeout, (unsigned long)phba);
3772a991 5466 /* Fabric block timer */
33cc559a
TJ		 5467 setup_timer(&phba->fabric_block_timer, lpfc_fabric_block_timeout,
5468 (unsigned long)phba);
3772a991 5469 /* EA polling mode timer */
33cc559a
TJ		 5470 setup_timer(&phba->eratt_poll, lpfc_poll_eratt,
5471 (unsigned long)phba);
895427bd 5472 /* Heartbeat timer */
33cc559a 5473 setup_timer(&phba->hb_tmofunc, lpfc_hb_timeout, (unsigned long)phba);
895427bd
JS		 5474
5475 return 0;
5476}
5477
5478/**
5479 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev
5480 * @phba: pointer to lpfc hba data structure.
5481 *
5482 * This routine is invoked to set up the driver internal resources specific to
5483 * support the SLI-3 HBA device it attached to.
5484 *
5485 * Return codes
5486 * 0 - successful
5487 * other values - error
5488 **/
5489static int
5490lpfc_sli_driver_resource_setup(struct lpfc_hba *phba)
5491{
5492 int rc;
5493
5494 /*
5495 * Initialize timers used by driver
5496 */
5497
5498 /* FCP polling mode timer */
33cc559a
TJ		 5499 setup_timer(&phba->fcp_poll_timer, lpfc_poll_timeout,
5500 (unsigned long)phba);
dea3101e 5501
3772a991
JS		 5502 /* Host attention work mask setup */
5503 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT);
5504 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
dea3101e 5505
3772a991
JS		 5506 /* Get all the module params for configuring this host */
5507 lpfc_get_cfgparam(phba);
895427bd
JS		 5508 /* Set up phase-1 common device driver resources */
5509
5510 rc = lpfc_setup_driver_resource_phase1(phba);
5511 if (rc)
5512 return -ENODEV;
5513
49198b37
JS		 5514 if (phba->pcidev->device == PCI_DEVICE_ID_HORNET) {
5515 phba->menlo_flag |= HBA_MENLO_SUPPORT;
5516 /* check for menlo minimum sg count */
5517 if (phba->cfg_sg_seg_cnt < LPFC_DEFAULT_MENLO_SG_SEG_CNT)
5518 phba->cfg_sg_seg_cnt = LPFC_DEFAULT_MENLO_SG_SEG_CNT;
5519 }
5520
895427bd
JS		 5521 if (!phba->sli.sli3_ring)
5522 phba->sli.sli3_ring = kzalloc(LPFC_SLI3_MAX_RING *
2a76a283 5523 sizeof(struct lpfc_sli_ring), GFP_KERNEL);
895427bd 5524 if (!phba->sli.sli3_ring)
2a76a283
JS		 5525 return -ENOMEM;
5526
dea3101e 5527 /*
96f7077f 5528 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size
3772a991 5529 * used to create the sg_dma_buf_pool must be dynamically calculated.
dea3101e 5530 */
3772a991 5531
96f7077f
JS		 5532 /* Initialize the host templates the configured values. */
5533 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96418b5e
JS		 5534 lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt;
5535 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f
JS		 5536
5537 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */
3772a991 5538 if (phba->cfg_enable_bg) {
96f7077f
JS		 5539 /*
5540 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd,
5541 * the FCP rsp, and a BDE for each. Sice we have no control
5542 * over how many protection data segments the SCSI Layer
5543 * will hand us (ie: there could be one for every block
5544 * in the IO), we just allocate enough BDEs to accomidate
5545 * our max amount and we need to limit lpfc_sg_seg_cnt to
5546 * minimize the risk of running out.
5547 */
5548 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5549 sizeof(struct fcp_rsp) +
5550 (LPFC_MAX_SG_SEG_CNT * sizeof(struct ulp_bde64));
5551
5552 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF)
5553 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF;
5554
5555 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */
5556 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT;
5557 } else {
5558 /*
5559 * The scsi_buf for a regular I/O will hold the FCP cmnd,
5560 * the FCP rsp, a BDE for each, and a BDE for up to
5561 * cfg_sg_seg_cnt data segments.
5562 */
5563 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5564 sizeof(struct fcp_rsp) +
5565 ((phba->cfg_sg_seg_cnt + 2) * sizeof(struct ulp_bde64));
5566
5567 /* Total BDEs in BPL for scsi_sg_list */
5568 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
901a920f 5569 }
dea3101e 5570
96f7077f
JS		 5571 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5572 "9088 sg_tablesize:%d dmabuf_size:%d total_bde:%d\n",
5573 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5574 phba->cfg_total_seg_cnt);
dea3101e 5575
3772a991
JS		 5576 phba->max_vpi = LPFC_MAX_VPI;
5577 /* This will be set to correct value after config_port mbox */
5578 phba->max_vports = 0;
dea3101e 5579
3772a991
JS		 5580 /*
5581 * Initialize the SLI Layer to run with lpfc HBAs.
5582 */
5583 lpfc_sli_setup(phba);
895427bd 5584 lpfc_sli_queue_init(phba);
ed957684 5585
3772a991
JS		 5586 /* Allocate device driver memory */
5587 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ))
5588 return -ENOMEM;
51ef4c26 5589
912e3acd
JS		 5590 /*
5591 * Enable sr-iov virtual functions if supported and configured
5592 * through the module parameter.
5593 */
5594 if (phba->cfg_sriov_nr_virtfn > 0) {
5595 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
5596 phba->cfg_sriov_nr_virtfn);
5597 if (rc) {
5598 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5599 "2808 Requested number of SR-IOV "
5600 "virtual functions (%d) is not "
5601 "supported\n",
5602 phba->cfg_sriov_nr_virtfn);
5603 phba->cfg_sriov_nr_virtfn = 0;
5604 }
5605 }
5606
3772a991
JS		 5607 return 0;
5608}
ed957684 5609
3772a991
JS		 5610/**
5611 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev
5612 * @phba: pointer to lpfc hba data structure.
5613 *
5614 * This routine is invoked to unset the driver internal resources set up
5615 * specific for supporting the SLI-3 HBA device it attached to.
5616 **/
5617static void
5618lpfc_sli_driver_resource_unset(struct lpfc_hba *phba)
5619{
5620 /* Free device driver memory allocated */
5621 lpfc_mem_free_all(phba);
3163f725 5622
3772a991
JS		 5623 return;
5624}
dea3101e 5625
3772a991 5626/**
da0436e9 5627 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev
3772a991
JS		 5628 * @phba: pointer to lpfc hba data structure.
5629 *
da0436e9
JS		 5630 * This routine is invoked to set up the driver internal resources specific to
5631 * support the SLI-4 HBA device it attached to.
3772a991
JS		 5632 *
5633 * Return codes
af901ca1 5634 * 0 - successful
da0436e9 5635 * other values - error
3772a991
JS		 5636 **/
5637static int
da0436e9 5638lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
3772a991 5639{
28baac74 5640 LPFC_MBOXQ_t *mboxq;
f358dd0c 5641 MAILBOX_t *mb;
895427bd 5642 int rc, i, max_buf_size;
28baac74
JS		 5643 uint8_t pn_page[LPFC_MAX_SUPPORTED_PAGES] = {0};
5644 struct lpfc_mqe *mqe;
09294d46 5645 int longs;
1ba981fd 5646 int fof_vectors = 0;
f358dd0c 5647 uint64_t wwn;
da0436e9 5648
895427bd
JS		 5649 phba->sli4_hba.num_online_cpu = num_online_cpus();
5650 phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
5651 phba->sli4_hba.curr_disp_cpu = 0;
5652
716d3bc5
JS		 5653 /* Get all the module params for configuring this host */
5654 lpfc_get_cfgparam(phba);
5655
895427bd
JS		 5656 /* Set up phase-1 common device driver resources */
5657 rc = lpfc_setup_driver_resource_phase1(phba);
5658 if (rc)
5659 return -ENODEV;
5660
da0436e9
JS		 5661 /* Before proceed, wait for POST done and device ready */
5662 rc = lpfc_sli4_post_status_check(phba);
5663 if (rc)
5664 return -ENODEV;
5665
3772a991 5666 /*
da0436e9 5667 * Initialize timers used by driver
3772a991 5668 */
3772a991 5669
33cc559a 5670 setup_timer(&phba->rrq_tmr, lpfc_rrq_timeout, (unsigned long)phba);
3772a991 5671
ecfd03c6 5672 /* FCF rediscover timer */
33cc559a
TJ		 5673 setup_timer(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo,
5674 (unsigned long)phba);
ecfd03c6 5675
7ad20aa9
JS		 5676 /*
5677 * Control structure for handling external multi-buffer mailbox
5678 * command pass-through.
5679 */
5680 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0,
5681 sizeof(struct lpfc_mbox_ext_buf_ctx));
5682 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list);
5683
da0436e9 5684 phba->max_vpi = LPFC_MAX_VPI;
67d12733 5685
da0436e9
JS		 5686 /* This will be set to correct value after the read_config mbox */
5687 phba->max_vports = 0;
3772a991 5688
da0436e9
JS		 5689 /* Program the default value of vlan_id and fc_map */
5690 phba->valid_vlan = 0;
5691 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
5692 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
5693 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
3772a991 5694
2a76a283
JS		 5695 /*
5696 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands
895427bd
JS		 5697 * we will associate a new ring, for each EQ/CQ/WQ tuple.
5698 * The WQ create will allocate the ring.
2a76a283 5699 */
09294d46 5700
da0436e9 5701 /*
09294d46
JS		 5702 * It doesn't matter what family our adapter is in, we are
5703 * limited to 2 Pages, 512 SGEs, for our SGL.
5704 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp
5705 */
5706 max_buf_size = (2 * SLI4_PAGE_SIZE);
5707 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SGL_SEG_CNT - 2)
5708 phba->cfg_sg_seg_cnt = LPFC_MAX_SGL_SEG_CNT - 2;
09294d46 5709
da0436e9 5710 /*
895427bd
JS		 5711 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size
5712 * used to create the sg_dma_buf_pool must be calculated.
da0436e9 5713 */
96f7077f
JS		 5714 if (phba->cfg_enable_bg) {
5715 /*
895427bd
JS		 5716 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd,
5717 * the FCP rsp, and a SGE. Sice we have no control
5718 * over how many protection segments the SCSI Layer
96f7077f 5719 * will hand us (ie: there could be one for every block
895427bd
JS		 5720 * in the IO), just allocate enough SGEs to accomidate
5721 * our max amount and we need to limit lpfc_sg_seg_cnt
5722 * to minimize the risk of running out.
96f7077f
JS		 5723 */
5724 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd 5725 sizeof(struct fcp_rsp) + max_buf_size;
96f7077f
JS		 5726
5727 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */
5728 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT;
5729
5730 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SLI4_SEG_CNT_DIF)
895427bd
JS		 5731 phba->cfg_sg_seg_cnt =
5732 LPFC_MAX_SG_SLI4_SEG_CNT_DIF;
96f7077f
JS		 5733 } else {
5734 /*
895427bd 5735 * The scsi_buf for a regular I/O holds the FCP cmnd,
96f7077f
JS		 5736 * the FCP rsp, a SGE for each, and a SGE for up to
5737 * cfg_sg_seg_cnt data segments.
5738 */
5739 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd
JS		 5740 sizeof(struct fcp_rsp) +
5741 ((phba->cfg_sg_seg_cnt + 2) *
5742 sizeof(struct sli4_sge));
96f7077f
JS		 5743
5744 /* Total SGEs for scsi_sg_list */
5745 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
895427bd 5746
96f7077f 5747 /*
895427bd
JS		 5748 * NOTE: if (phba->cfg_sg_seg_cnt + 2) <= 256 we only
5749 * need to post 1 page for the SGL.
96f7077f 5750 */
085c647c 5751 }
acd6859b 5752
96f7077f
JS		 5753 /* Initialize the host templates with the updated values. */
5754 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
5755 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96418b5e 5756 lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f
JS		 5757
5758 if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ)
5759 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ;
5760 else
5761 phba->cfg_sg_dma_buf_size =
5762 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size);
5763
5764 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5765 "9087 sg_tablesize:%d dmabuf_size:%d total_sge:%d\n",
5766 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5767 phba->cfg_total_seg_cnt);
3772a991 5768
da0436e9 5769 /* Initialize buffer queue management fields */
895427bd 5770 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list);
da0436e9
JS		 5771 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc;
5772 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free;
3772a991 5773
da0436e9
JS		 5774 /*
5775 * Initialize the SLI Layer to run with lpfc SLI4 HBAs.
5776 */
895427bd
JS		 5777 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5778 /* Initialize the Abort scsi buffer list used by driver */
5779 spin_lock_init(&phba->sli4_hba.abts_scsi_buf_list_lock);
5780 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
5781 }
5782
5783 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
5784 /* Initialize the Abort nvme buffer list used by driver */
5785 spin_lock_init(&phba->sli4_hba.abts_nvme_buf_list_lock);
5786 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
318083ad
JS		 5787 /* Fast-path XRI aborted CQ Event work queue list */
5788 INIT_LIST_HEAD(&phba->sli4_hba.sp_nvme_xri_aborted_work_queue);
895427bd
JS		 5789 }
5790
da0436e9 5791 /* This abort list used by worker thread */
895427bd 5792 spin_lock_init(&phba->sli4_hba.sgl_list_lock);
f358dd0c 5793 spin_lock_init(&phba->sli4_hba.nvmet_io_lock);
3772a991 5794
da0436e9 5795 /*
6d368e53 5796 * Initialize driver internal slow-path work queues
da0436e9 5797 */
3772a991 5798
da0436e9
JS		 5799 /* Driver internel slow-path CQ Event pool */
5800 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
5801 /* Response IOCB work queue list */
45ed1190 5802 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
da0436e9
JS		 5803 /* Asynchronous event CQ Event work queue list */
5804 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
5805 /* Fast-path XRI aborted CQ Event work queue list */
5806 INIT_LIST_HEAD(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue);
5807 /* Slow-path XRI aborted CQ Event work queue list */
5808 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
5809 /* Receive queue CQ Event work queue list */
5810 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
5811
6d368e53
JS		 5812 /* Initialize extent block lists. */
5813 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
5814 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
5815 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
5816 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list);
5817
d1f525aa
JS		 5818 /* Initialize mboxq lists. If the early init routines fail
5819 * these lists need to be correctly initialized.
5820 */
5821 INIT_LIST_HEAD(&phba->sli.mboxq);
5822 INIT_LIST_HEAD(&phba->sli.mboxq_cmpl);
5823
448193b5
JS		 5824 /* initialize optic_state to 0xFF */
5825 phba->sli4_hba.lnk_info.optic_state = 0xff;
5826
da0436e9
JS		 5827 /* Allocate device driver memory */
5828 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ);
5829 if (rc)
5830 return -ENOMEM;
5831
2fcee4bf
JS		 5832 /* IF Type 2 ports get initialized now. */
5833 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
5834 LPFC_SLI_INTF_IF_TYPE_2) {
5835 rc = lpfc_pci_function_reset(phba);
895427bd
JS		 5836 if (unlikely(rc)) {
5837 rc = -ENODEV;
5838 goto out_free_mem;
5839 }
946727dc 5840 phba->temp_sensor_support = 1;
2fcee4bf
JS		 5841 }
5842
da0436e9
JS		 5843 /* Create the bootstrap mailbox command */
5844 rc = lpfc_create_bootstrap_mbox(phba);
5845 if (unlikely(rc))
5846 goto out_free_mem;
5847
5848 /* Set up the host's endian order with the device. */
5849 rc = lpfc_setup_endian_order(phba);
5850 if (unlikely(rc))
5851 goto out_free_bsmbx;
5852
5853 /* Set up the hba's configuration parameters. */
5854 rc = lpfc_sli4_read_config(phba);
cff261f6
JS		 5855 if (unlikely(rc))
5856 goto out_free_bsmbx;
5857 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba);
da0436e9
JS		 5858 if (unlikely(rc))
5859 goto out_free_bsmbx;
5860
2fcee4bf
JS		 5861 /* IF Type 0 ports get initialized now. */
5862 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
5863 LPFC_SLI_INTF_IF_TYPE_0) {
5864 rc = lpfc_pci_function_reset(phba);
5865 if (unlikely(rc))
5866 goto out_free_bsmbx;
5867 }
da0436e9 5868
cb5172ea
JS		 5869 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
5870 GFP_KERNEL);
5871 if (!mboxq) {
5872 rc = -ENOMEM;
5873 goto out_free_bsmbx;
5874 }
5875
f358dd0c 5876 /* Check for NVMET being configured */
895427bd 5877 phba->nvmet_support = 0;
f358dd0c
JS		 5878 if (lpfc_enable_nvmet_cnt) {
5879
5880 /* First get WWN of HBA instance */
5881 lpfc_read_nv(phba, mboxq);
5882 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
5883 if (rc != MBX_SUCCESS) {
5884 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5885 "6016 Mailbox failed , mbxCmd x%x "
5886 "READ_NV, mbxStatus x%x\n",
5887 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
5888 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
d1f525aa 5889 mempool_free(mboxq, phba->mbox_mem_pool);
f358dd0c
JS		 5890 rc = -EIO;
5891 goto out_free_bsmbx;
5892 }
5893 mb = &mboxq->u.mb;
5894 memcpy(&wwn, (char *)mb->un.varRDnvp.nodename,
5895 sizeof(uint64_t));
5896 wwn = cpu_to_be64(wwn);
5897 phba->sli4_hba.wwnn.u.name = wwn;
5898 memcpy(&wwn, (char *)mb->un.varRDnvp.portname,
5899 sizeof(uint64_t));
5900 /* wwn is WWPN of HBA instance */
5901 wwn = cpu_to_be64(wwn);
5902 phba->sli4_hba.wwpn.u.name = wwn;
5903
5904 /* Check to see if it matches any module parameter */
5905 for (i = 0; i < lpfc_enable_nvmet_cnt; i++) {
5906 if (wwn == lpfc_enable_nvmet[i]) {
7d708033 5907#if (IS_ENABLED(CONFIG_NVME_TARGET_FC))
f358dd0c
JS		 5908 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5909 "6017 NVME Target %016llx\n",
5910 wwn);
5911 phba->nvmet_support = 1; /* a match */
7d708033
JS		 5912#else
5913 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5914 "6021 Can't enable NVME Target."
5915 " NVME_TARGET_FC infrastructure"
5916 " is not in kernel\n");
5917#endif
f358dd0c
JS		 5918 }
5919 }
5920 }
895427bd
JS		 5921
5922 lpfc_nvme_mod_param_dep(phba);
5923
fedd3b7b 5924 /* Get the Supported Pages if PORT_CAPABILITIES is supported by port. */
cb5172ea
JS		 5925 lpfc_supported_pages(mboxq);
5926 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
fedd3b7b
JS		 5927 if (!rc) {
5928 mqe = &mboxq->u.mqe;
5929 memcpy(&pn_page[0], ((uint8_t *)&mqe->un.supp_pages.word3),
5930 LPFC_MAX_SUPPORTED_PAGES);
5931 for (i = 0; i < LPFC_MAX_SUPPORTED_PAGES; i++) {
5932 switch (pn_page[i]) {
5933 case LPFC_SLI4_PARAMETERS:
5934 phba->sli4_hba.pc_sli4_params.supported = 1;
5935 break;
5936 default:
5937 break;
5938 }
5939 }
5940 /* Read the port's SLI4 Parameters capabilities if supported. */
5941 if (phba->sli4_hba.pc_sli4_params.supported)
5942 rc = lpfc_pc_sli4_params_get(phba, mboxq);
5943 if (rc) {
5944 mempool_free(mboxq, phba->mbox_mem_pool);
5945 rc = -EIO;
5946 goto out_free_bsmbx;
cb5172ea
JS		 5947 }
5948 }
65791f1f 5949
fedd3b7b
JS		 5950 /*
5951 * Get sli4 parameters that override parameters from Port capabilities.
6d368e53
JS		 5952 * If this call fails, it isn't critical unless the SLI4 parameters come
5953 * back in conflict.
fedd3b7b 5954 */
6d368e53
JS		 5955 rc = lpfc_get_sli4_parameters(phba, mboxq);
5956 if (rc) {
5957 if (phba->sli4_hba.extents_in_use &&
5958 phba->sli4_hba.rpi_hdrs_in_use) {
5959 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5960 "2999 Unsupported SLI4 Parameters "
5961 "Extents and RPI headers enabled.\n");
6d368e53 5962 }
895427bd
JS		 5963 mempool_free(mboxq, phba->mbox_mem_pool);
5964 goto out_free_bsmbx;
6d368e53 5965 }
895427bd 5966
cb5172ea 5967 mempool_free(mboxq, phba->mbox_mem_pool);
1ba981fd
JS		 5968
5969 /* Verify OAS is supported */
5970 lpfc_sli4_oas_verify(phba);
5971 if (phba->cfg_fof)
5972 fof_vectors = 1;
5973
5350d872
JS		 5974 /* Verify all the SLI4 queues */
5975 rc = lpfc_sli4_queue_verify(phba);
da0436e9
JS		 5976 if (rc)
5977 goto out_free_bsmbx;
5978
5979 /* Create driver internal CQE event pool */
5980 rc = lpfc_sli4_cq_event_pool_create(phba);
5981 if (rc)
5350d872 5982 goto out_free_bsmbx;
da0436e9 5983
8a9d2e80
JS		 5984 /* Initialize sgl lists per host */
5985 lpfc_init_sgl_list(phba);
5986
5987 /* Allocate and initialize active sgl array */
da0436e9
JS		 5988 rc = lpfc_init_active_sgl_array(phba);
5989 if (rc) {
5990 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5991 "1430 Failed to initialize sgl list.\n");
8a9d2e80 5992 goto out_destroy_cq_event_pool;
da0436e9 5993 }
da0436e9
JS		 5994 rc = lpfc_sli4_init_rpi_hdrs(phba);
5995 if (rc) {
5996 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5997 "1432 Failed to initialize rpi headers.\n");
5998 goto out_free_active_sgl;
5999 }
6000
a93ff37a 6001 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */
0c9ab6f5
JS		 6002 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG;
6003 phba->fcf.fcf_rr_bmask = kzalloc(longs * sizeof(unsigned long),
6004 GFP_KERNEL);
6005 if (!phba->fcf.fcf_rr_bmask) {
6006 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6007 "2759 Failed allocate memory for FCF round "
6008 "robin failover bmask\n");
0558056c 6009 rc = -ENOMEM;
0c9ab6f5
JS		 6010 goto out_remove_rpi_hdrs;
6011 }
6012
895427bd
JS		 6013 phba->sli4_hba.hba_eq_hdl = kcalloc(fof_vectors + phba->io_channel_irqs,
6014 sizeof(struct lpfc_hba_eq_hdl),
6015 GFP_KERNEL);
6016 if (!phba->sli4_hba.hba_eq_hdl) {
67d12733
JS		 6017 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6018 "2572 Failed allocate memory for "
6019 "fast-path per-EQ handle array\n");
6020 rc = -ENOMEM;
6021 goto out_free_fcf_rr_bmask;
da0436e9
JS		 6022 }
6023
895427bd
JS		 6024 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_present_cpu,
6025 sizeof(struct lpfc_vector_map_info),
6026 GFP_KERNEL);
7bb03bbf
JS		 6027 if (!phba->sli4_hba.cpu_map) {
6028 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6029 "3327 Failed allocate memory for msi-x "
6030 "interrupt vector mapping\n");
6031 rc = -ENOMEM;
895427bd 6032 goto out_free_hba_eq_hdl;
7bb03bbf 6033 }
b246de17 6034 if (lpfc_used_cpu == NULL) {
895427bd
JS		 6035 lpfc_used_cpu = kcalloc(lpfc_present_cpu, sizeof(uint16_t),
6036 GFP_KERNEL);
b246de17
JS		 6037 if (!lpfc_used_cpu) {
6038 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6039 "3335 Failed allocate memory for msi-x "
6040 "interrupt vector mapping\n");
6041 kfree(phba->sli4_hba.cpu_map);
6042 rc = -ENOMEM;
895427bd 6043 goto out_free_hba_eq_hdl;
b246de17
JS		 6044 }
6045 for (i = 0; i < lpfc_present_cpu; i++)
6046 lpfc_used_cpu[i] = LPFC_VECTOR_MAP_EMPTY;
6047 }
6048
912e3acd
JS		 6049 /*
6050 * Enable sr-iov virtual functions if supported and configured
6051 * through the module parameter.
6052 */
6053 if (phba->cfg_sriov_nr_virtfn > 0) {
6054 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
6055 phba->cfg_sriov_nr_virtfn);
6056 if (rc) {
6057 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6058 "3020 Requested number of SR-IOV "
6059 "virtual functions (%d) is not "
6060 "supported\n",
6061 phba->cfg_sriov_nr_virtfn);
6062 phba->cfg_sriov_nr_virtfn = 0;
6063 }
6064 }
6065
5248a749 6066 return 0;
da0436e9 6067
895427bd
JS		 6068out_free_hba_eq_hdl:
6069 kfree(phba->sli4_hba.hba_eq_hdl);
0c9ab6f5
JS		 6070out_free_fcf_rr_bmask:
6071 kfree(phba->fcf.fcf_rr_bmask);
da0436e9
JS		 6072out_remove_rpi_hdrs:
6073 lpfc_sli4_remove_rpi_hdrs(phba);
6074out_free_active_sgl:
6075 lpfc_free_active_sgl(phba);
da0436e9
JS		 6076out_destroy_cq_event_pool:
6077 lpfc_sli4_cq_event_pool_destroy(phba);
da0436e9
JS		 6078out_free_bsmbx:
6079 lpfc_destroy_bootstrap_mbox(phba);
6080out_free_mem:
6081 lpfc_mem_free(phba);
6082 return rc;
6083}
6084
6085/**
6086 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev
6087 * @phba: pointer to lpfc hba data structure.
6088 *
6089 * This routine is invoked to unset the driver internal resources set up
6090 * specific for supporting the SLI-4 HBA device it attached to.
6091 **/
6092static void
6093lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
6094{
6095 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry;
6096
7bb03bbf
JS		 6097 /* Free memory allocated for msi-x interrupt vector to CPU mapping */
6098 kfree(phba->sli4_hba.cpu_map);
6099 phba->sli4_hba.num_present_cpu = 0;
6100 phba->sli4_hba.num_online_cpu = 0;
76fd07a6 6101 phba->sli4_hba.curr_disp_cpu = 0;
7bb03bbf 6102
da0436e9 6103 /* Free memory allocated for fast-path work queue handles */
895427bd 6104 kfree(phba->sli4_hba.hba_eq_hdl);
da0436e9
JS		 6105
6106 /* Free the allocated rpi headers. */
6107 lpfc_sli4_remove_rpi_hdrs(phba);
d11e31dd 6108 lpfc_sli4_remove_rpis(phba);
da0436e9 6109
0c9ab6f5
JS		 6110 /* Free eligible FCF index bmask */
6111 kfree(phba->fcf.fcf_rr_bmask);
6112
da0436e9
JS		 6113 /* Free the ELS sgl list */
6114 lpfc_free_active_sgl(phba);
8a9d2e80 6115 lpfc_free_els_sgl_list(phba);
f358dd0c 6116 lpfc_free_nvmet_sgl_list(phba);
da0436e9 6117
da0436e9
JS		 6118 /* Free the completion queue EQ event pool */
6119 lpfc_sli4_cq_event_release_all(phba);
6120 lpfc_sli4_cq_event_pool_destroy(phba);
6121
6d368e53
JS		 6122 /* Release resource identifiers. */
6123 lpfc_sli4_dealloc_resource_identifiers(phba);
6124
da0436e9
JS		 6125 /* Free the bsmbx region. */
6126 lpfc_destroy_bootstrap_mbox(phba);
6127
6128 /* Free the SLI Layer memory with SLI4 HBAs */
6129 lpfc_mem_free_all(phba);
6130
6131 /* Free the current connect table */
6132 list_for_each_entry_safe(conn_entry, next_conn_entry,
4d9ab994
JS		 6133 &phba->fcf_conn_rec_list, list) {
6134 list_del_init(&conn_entry->list);
da0436e9 6135 kfree(conn_entry);
4d9ab994 6136 }
da0436e9
JS		 6137
6138 return;
6139}
6140
6141/**
25985edc 6142 * lpfc_init_api_table_setup - Set up init api function jump table
da0436e9
JS		 6143 * @phba: The hba struct for which this call is being executed.
6144 * @dev_grp: The HBA PCI-Device group number.
6145 *
6146 * This routine sets up the device INIT interface API function jump table
6147 * in @phba struct.
6148 *
6149 * Returns: 0 - success, -ENODEV - failure.
6150 **/
6151int
6152lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
6153{
84d1b006
JS		 6154 phba->lpfc_hba_init_link = lpfc_hba_init_link;
6155 phba->lpfc_hba_down_link = lpfc_hba_down_link;
7f86059a 6156 phba->lpfc_selective_reset = lpfc_selective_reset;
da0436e9
JS		 6157 switch (dev_grp) {
6158 case LPFC_PCI_DEV_LP:
6159 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3;
6160 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3;
6161 phba->lpfc_stop_port = lpfc_stop_port_s3;
6162 break;
6163 case LPFC_PCI_DEV_OC:
6164 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4;
6165 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4;
6166 phba->lpfc_stop_port = lpfc_stop_port_s4;
6167 break;
6168 default:
6169 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6170 "1431 Invalid HBA PCI-device group: 0x%x\n",
6171 dev_grp);
6172 return -ENODEV;
6173 break;
6174 }
6175 return 0;
6176}
6177
da0436e9
JS		 6178/**
6179 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources.
6180 * @phba: pointer to lpfc hba data structure.
6181 *
6182 * This routine is invoked to set up the driver internal resources after the
6183 * device specific resource setup to support the HBA device it attached to.
6184 *
6185 * Return codes
af901ca1 6186 * 0 - successful
da0436e9
JS		 6187 * other values - error
6188 **/
6189static int
6190lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba)
6191{
6192 int error;
6193
6194 /* Startup the kernel thread for this host adapter. */
6195 phba->worker_thread = kthread_run(lpfc_do_work, phba,
6196 "lpfc_worker_%d", phba->brd_no);
6197 if (IS_ERR(phba->worker_thread)) {
6198 error = PTR_ERR(phba->worker_thread);
6199 return error;
3772a991
JS		 6200 }
6201
6202 return 0;
6203}
6204
6205/**
6206 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources.
6207 * @phba: pointer to lpfc hba data structure.
6208 *
6209 * This routine is invoked to unset the driver internal resources set up after
6210 * the device specific resource setup for supporting the HBA device it
6211 * attached to.
6212 **/
6213static void
6214lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba)
6215{
6216 /* Stop kernel worker thread */
6217 kthread_stop(phba->worker_thread);
6218}
6219
6220/**
6221 * lpfc_free_iocb_list - Free iocb list.
6222 * @phba: pointer to lpfc hba data structure.
6223 *
6224 * This routine is invoked to free the driver's IOCB list and memory.
6225 **/
6226static void
6227lpfc_free_iocb_list(struct lpfc_hba *phba)
6228{
6229 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
6230
6231 spin_lock_irq(&phba->hbalock);
6232 list_for_each_entry_safe(iocbq_entry, iocbq_next,
6233 &phba->lpfc_iocb_list, list) {
6234 list_del(&iocbq_entry->list);
6235 kfree(iocbq_entry);
6236 phba->total_iocbq_bufs--;
98c9ea5c 6237 }
3772a991
JS		 6238 spin_unlock_irq(&phba->hbalock);
6239
6240 return;
6241}
6242
6243/**
6244 * lpfc_init_iocb_list - Allocate and initialize iocb list.
6245 * @phba: pointer to lpfc hba data structure.
6246 *
6247 * This routine is invoked to allocate and initizlize the driver's IOCB
6248 * list and set up the IOCB tag array accordingly.
6249 *
6250 * Return codes
af901ca1 6251 * 0 - successful
3772a991
JS		 6252 * other values - error
6253 **/
6254static int
6255lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count)
6256{
6257 struct lpfc_iocbq *iocbq_entry = NULL;
6258 uint16_t iotag;
6259 int i;
dea3101e 6260
6261 /* Initialize and populate the iocb list per host. */
6262 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
3772a991 6263 for (i = 0; i < iocb_count; i++) {
dd00cc48 6264 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
dea3101e 6265 if (iocbq_entry == NULL) {
6266 printk(KERN_ERR "%s: only allocated %d iocbs of "
6267 "expected %d count. Unloading driver.\n",
cadbd4a5 6268 __func__, i, LPFC_IOCB_LIST_CNT);
dea3101e 6269 goto out_free_iocbq;
6270 }
6271
604a3e30
JB		 6272 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
6273 if (iotag == 0) {
3772a991 6274 kfree(iocbq_entry);
604a3e30 6275 printk(KERN_ERR "%s: failed to allocate IOTAG. "
3772a991 6276 "Unloading driver.\n", __func__);
604a3e30
JB		 6277 goto out_free_iocbq;
6278 }
6d368e53 6279 iocbq_entry->sli4_lxritag = NO_XRI;
3772a991 6280 iocbq_entry->sli4_xritag = NO_XRI;
2e0fef85
JS		 6281
6282 spin_lock_irq(&phba->hbalock);
dea3101e 6283 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
6284 phba->total_iocbq_bufs++;
2e0fef85 6285 spin_unlock_irq(&phba->hbalock);
dea3101e 6286 }
6287
3772a991 6288 return 0;
dea3101e 6289
3772a991
JS		 6290out_free_iocbq:
6291 lpfc_free_iocb_list(phba);
dea3101e 6292
3772a991
JS		 6293 return -ENOMEM;
6294}
5e9d9b82 6295
3772a991 6296/**
8a9d2e80 6297 * lpfc_free_sgl_list - Free a given sgl list.
da0436e9 6298 * @phba: pointer to lpfc hba data structure.
8a9d2e80 6299 * @sglq_list: pointer to the head of sgl list.
3772a991 6300 *
8a9d2e80 6301 * This routine is invoked to free a give sgl list and memory.
3772a991 6302 **/
8a9d2e80
JS		 6303void
6304lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list)
3772a991 6305{
da0436e9 6306 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8a9d2e80
JS		 6307
6308 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) {
6309 list_del(&sglq_entry->list);
6310 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys);
6311 kfree(sglq_entry);
6312 }
6313}
6314
6315/**
6316 * lpfc_free_els_sgl_list - Free els sgl list.
6317 * @phba: pointer to lpfc hba data structure.
6318 *
6319 * This routine is invoked to free the driver's els sgl list and memory.
6320 **/
6321static void
6322lpfc_free_els_sgl_list(struct lpfc_hba *phba)
6323{
da0436e9 6324 LIST_HEAD(sglq_list);
dea3101e 6325
8a9d2e80 6326 /* Retrieve all els sgls from driver list */
da0436e9 6327 spin_lock_irq(&phba->hbalock);
895427bd
JS		 6328 spin_lock(&phba->sli4_hba.sgl_list_lock);
6329 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list);
6330 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9 6331 spin_unlock_irq(&phba->hbalock);
dea3101e 6332
8a9d2e80
JS		 6333 /* Now free the sgl list */
6334 lpfc_free_sgl_list(phba, &sglq_list);
da0436e9 6335}
92d7f7b0 6336
f358dd0c
JS		 6337/**
6338 * lpfc_free_nvmet_sgl_list - Free nvmet sgl list.
6339 * @phba: pointer to lpfc hba data structure.
6340 *
6341 * This routine is invoked to free the driver's nvmet sgl list and memory.
6342 **/
6343static void
6344lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba)
6345{
6346 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
6347 LIST_HEAD(sglq_list);
6348
6349 /* Retrieve all nvmet sgls from driver list */
6350 spin_lock_irq(&phba->hbalock);
6351 spin_lock(&phba->sli4_hba.sgl_list_lock);
6352 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list);
6353 spin_unlock(&phba->sli4_hba.sgl_list_lock);
6354 spin_unlock_irq(&phba->hbalock);
6355
6356 /* Now free the sgl list */
6357 list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) {
6358 list_del(&sglq_entry->list);
6359 lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys);
6360 kfree(sglq_entry);
6361 }
6362}
6363
da0436e9
JS		 6364/**
6365 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs.
6366 * @phba: pointer to lpfc hba data structure.
6367 *
6368 * This routine is invoked to allocate the driver's active sgl memory.
6369 * This array will hold the sglq_entry's for active IOs.
6370 **/
6371static int
6372lpfc_init_active_sgl_array(struct lpfc_hba *phba)
6373{
6374 int size;
6375 size = sizeof(struct lpfc_sglq *);
6376 size *= phba->sli4_hba.max_cfg_param.max_xri;
6377
6378 phba->sli4_hba.lpfc_sglq_active_list =
6379 kzalloc(size, GFP_KERNEL);
6380 if (!phba->sli4_hba.lpfc_sglq_active_list)
6381 return -ENOMEM;
6382 return 0;
3772a991
JS		 6383}
6384
6385/**
da0436e9 6386 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs.
3772a991
JS		 6387 * @phba: pointer to lpfc hba data structure.
6388 *
da0436e9
JS		 6389 * This routine is invoked to walk through the array of active sglq entries
6390 * and free all of the resources.
6391 * This is just a place holder for now.
3772a991
JS		 6392 **/
6393static void
da0436e9 6394lpfc_free_active_sgl(struct lpfc_hba *phba)
3772a991 6395{
da0436e9 6396 kfree(phba->sli4_hba.lpfc_sglq_active_list);
3772a991
JS		 6397}
6398
6399/**
da0436e9 6400 * lpfc_init_sgl_list - Allocate and initialize sgl list.
3772a991
JS		 6401 * @phba: pointer to lpfc hba data structure.
6402 *
da0436e9
JS		 6403 * This routine is invoked to allocate and initizlize the driver's sgl
6404 * list and set up the sgl xritag tag array accordingly.
3772a991 6405 *
3772a991 6406 **/
8a9d2e80 6407static void
da0436e9 6408lpfc_init_sgl_list(struct lpfc_hba *phba)
3772a991 6409{
da0436e9 6410 /* Initialize and populate the sglq list per host/VF. */
895427bd 6411 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list);
da0436e9 6412 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c
JS		 6413 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list);
6414 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_sgl_list);
da0436e9 6415
8a9d2e80
JS		 6416 /* els xri-sgl book keeping */
6417 phba->sli4_hba.els_xri_cnt = 0;
0ff10d46 6418
8a9d2e80 6419 /* scsi xri-buffer book keeping */
da0436e9 6420 phba->sli4_hba.scsi_xri_cnt = 0;
895427bd
JS		 6421
6422 /* nvme xri-buffer book keeping */
6423 phba->sli4_hba.nvme_xri_cnt = 0;
da0436e9
JS		 6424}
6425
6426/**
6427 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port
6428 * @phba: pointer to lpfc hba data structure.
6429 *
6430 * This routine is invoked to post rpi header templates to the
88a2cfbb 6431 * port for those SLI4 ports that do not support extents. This routine
da0436e9 6432 * posts a PAGE_SIZE memory region to the port to hold up to
88a2cfbb
JS		 6433 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine
6434 * and should be called only when interrupts are disabled.
da0436e9
JS		 6435 *
6436 * Return codes
af901ca1 6437 * 0 - successful
88a2cfbb 6438 * -ERROR - otherwise.
da0436e9
JS		 6439 **/
6440int
6441lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba)
6442{
6443 int rc = 0;
da0436e9
JS		 6444 struct lpfc_rpi_hdr *rpi_hdr;
6445
6446 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
ff78d8f9 6447 if (!phba->sli4_hba.rpi_hdrs_in_use)
6d368e53 6448 return rc;
6d368e53
JS		 6449 if (phba->sli4_hba.extents_in_use)
6450 return -EIO;
da0436e9
JS		 6451
6452 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
6453 if (!rpi_hdr) {
6454 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
6455 "0391 Error during rpi post operation\n");
6456 lpfc_sli4_remove_rpis(phba);
6457 rc = -ENODEV;
6458 }
6459
6460 return rc;
6461}
6462
6463/**
6464 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region
6465 * @phba: pointer to lpfc hba data structure.
6466 *
6467 * This routine is invoked to allocate a single 4KB memory region to
6468 * support rpis and stores them in the phba. This single region
6469 * provides support for up to 64 rpis. The region is used globally
6470 * by the device.
6471 *
6472 * Returns:
6473 * A valid rpi hdr on success.
6474 * A NULL pointer on any failure.
6475 **/
6476struct lpfc_rpi_hdr *
6477lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba)
6478{
6479 uint16_t rpi_limit, curr_rpi_range;
6480 struct lpfc_dmabuf *dmabuf;
6481 struct lpfc_rpi_hdr *rpi_hdr;
9589b062 6482 uint32_t rpi_count;
da0436e9 6483
6d368e53
JS		 6484 /*
6485 * If the SLI4 port supports extents, posting the rpi header isn't
6486 * required. Set the expected maximum count and let the actual value
6487 * get set when extents are fully allocated.
6488 */
6489 if (!phba->sli4_hba.rpi_hdrs_in_use)
6490 return NULL;
6491 if (phba->sli4_hba.extents_in_use)
6492 return NULL;
6493
6494 /* The limit on the logical index is just the max_rpi count. */
da0436e9 6495 rpi_limit = phba->sli4_hba.max_cfg_param.rpi_base +
6d368e53 6496 phba->sli4_hba.max_cfg_param.max_rpi - 1;
da0436e9
JS		 6497
6498 spin_lock_irq(&phba->hbalock);
6d368e53
JS		 6499 /*
6500 * Establish the starting RPI in this header block. The starting
6501 * rpi is normalized to a zero base because the physical rpi is
6502 * port based.
6503 */
97f2ecf1 6504 curr_rpi_range = phba->sli4_hba.next_rpi;
da0436e9
JS		 6505 spin_unlock_irq(&phba->hbalock);
6506
6507 /*
6508 * The port has a limited number of rpis. The increment here
6509 * is LPFC_RPI_HDR_COUNT - 1 to account for the starting value
6510 * and to allow the full max_rpi range per port.
6511 */
6512 if ((curr_rpi_range + (LPFC_RPI_HDR_COUNT - 1)) > rpi_limit)
9589b062
JS		 6513 rpi_count = rpi_limit - curr_rpi_range;
6514 else
6515 rpi_count = LPFC_RPI_HDR_COUNT;
da0436e9 6516
6d368e53
JS		 6517 if (!rpi_count)
6518 return NULL;
da0436e9
JS		 6519 /*
6520 * First allocate the protocol header region for the port. The
6521 * port expects a 4KB DMA-mapped memory region that is 4K aligned.
6522 */
6523 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
6524 if (!dmabuf)
6525 return NULL;
6526
1aee383d
JP		 6527 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev,
6528 LPFC_HDR_TEMPLATE_SIZE,
6529 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS		 6530 if (!dmabuf->virt) {
6531 rpi_hdr = NULL;
6532 goto err_free_dmabuf;
6533 }
6534
da0436e9
JS		 6535 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) {
6536 rpi_hdr = NULL;
6537 goto err_free_coherent;
6538 }
6539
6540 /* Save the rpi header data for cleanup later. */
6541 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL);
6542 if (!rpi_hdr)
6543 goto err_free_coherent;
6544
6545 rpi_hdr->dmabuf = dmabuf;
6546 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE;
6547 rpi_hdr->page_count = 1;
6548 spin_lock_irq(&phba->hbalock);
6d368e53
JS		 6549
6550 /* The rpi_hdr stores the logical index only. */
6551 rpi_hdr->start_rpi = curr_rpi_range;
da0436e9
JS		 6552 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
6553
6554 /*
6d368e53
JS		 6555 * The next_rpi stores the next logical module-64 rpi value used
6556 * to post physical rpis in subsequent rpi postings.
da0436e9 6557 */
9589b062 6558 phba->sli4_hba.next_rpi += rpi_count;
da0436e9
JS		 6559 spin_unlock_irq(&phba->hbalock);
6560 return rpi_hdr;
6561
6562 err_free_coherent:
6563 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE,
6564 dmabuf->virt, dmabuf->phys);
6565 err_free_dmabuf:
6566 kfree(dmabuf);
6567 return NULL;
6568}
6569
6570/**
6571 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions
6572 * @phba: pointer to lpfc hba data structure.
6573 *
6574 * This routine is invoked to remove all memory resources allocated
6d368e53
JS		 6575 * to support rpis for SLI4 ports not supporting extents. This routine
6576 * presumes the caller has released all rpis consumed by fabric or port
6577 * logins and is prepared to have the header pages removed.
da0436e9
JS		 6578 **/
6579void
6580lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba)
6581{
6582 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr;
6583
6d368e53
JS		 6584 if (!phba->sli4_hba.rpi_hdrs_in_use)
6585 goto exit;
6586
da0436e9
JS		 6587 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr,
6588 &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
6589 list_del(&rpi_hdr->list);
6590 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len,
6591 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys);
6592 kfree(rpi_hdr->dmabuf);
6593 kfree(rpi_hdr);
6594 }
6d368e53
JS		 6595 exit:
6596 /* There are no rpis available to the port now. */
6597 phba->sli4_hba.next_rpi = 0;
da0436e9
JS		 6598}
6599
6600/**
6601 * lpfc_hba_alloc - Allocate driver hba data structure for a device.
6602 * @pdev: pointer to pci device data structure.
6603 *
6604 * This routine is invoked to allocate the driver hba data structure for an
6605 * HBA device. If the allocation is successful, the phba reference to the
6606 * PCI device data structure is set.
6607 *
6608 * Return codes
af901ca1 6609 * pointer to @phba - successful
da0436e9
JS		 6610 * NULL - error
6611 **/
6612static struct lpfc_hba *
6613lpfc_hba_alloc(struct pci_dev *pdev)
6614{
6615 struct lpfc_hba *phba;
6616
6617 /* Allocate memory for HBA structure */
6618 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL);
6619 if (!phba) {
e34ccdfe 6620 dev_err(&pdev->dev, "failed to allocate hba struct\n");
da0436e9
JS		 6621 return NULL;
6622 }
6623
6624 /* Set reference to PCI device in HBA structure */
6625 phba->pcidev = pdev;
6626
6627 /* Assign an unused board number */
6628 phba->brd_no = lpfc_get_instance();
6629 if (phba->brd_no < 0) {
6630 kfree(phba);
6631 return NULL;
6632 }
65791f1f 6633 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL;
da0436e9 6634
4fede78f 6635 spin_lock_init(&phba->ct_ev_lock);
f1c3b0fc
JS		 6636 INIT_LIST_HEAD(&phba->ct_ev_waiters);
6637
da0436e9
JS		 6638 return phba;
6639}
6640
6641/**
6642 * lpfc_hba_free - Free driver hba data structure with a device.
6643 * @phba: pointer to lpfc hba data structure.
6644 *
6645 * This routine is invoked to free the driver hba data structure with an
6646 * HBA device.
6647 **/
6648static void
6649lpfc_hba_free(struct lpfc_hba *phba)
6650{
6651 /* Release the driver assigned board number */
6652 idr_remove(&lpfc_hba_index, phba->brd_no);
6653
895427bd
JS		 6654 /* Free memory allocated with sli3 rings */
6655 kfree(phba->sli.sli3_ring);
6656 phba->sli.sli3_ring = NULL;
2a76a283 6657
da0436e9
JS		 6658 kfree(phba);
6659 return;
6660}
6661
6662/**
6663 * lpfc_create_shost - Create hba physical port with associated scsi host.
6664 * @phba: pointer to lpfc hba data structure.
6665 *
6666 * This routine is invoked to create HBA physical port and associate a SCSI
6667 * host with it.
6668 *
6669 * Return codes
af901ca1 6670 * 0 - successful
da0436e9
JS		 6671 * other values - error
6672 **/
6673static int
6674lpfc_create_shost(struct lpfc_hba *phba)
6675{
6676 struct lpfc_vport *vport;
6677 struct Scsi_Host *shost;
6678
6679 /* Initialize HBA FC structure */
6680 phba->fc_edtov = FF_DEF_EDTOV;
6681 phba->fc_ratov = FF_DEF_RATOV;
6682 phba->fc_altov = FF_DEF_ALTOV;
6683 phba->fc_arbtov = FF_DEF_ARBTOV;
6684
d7c47992 6685 atomic_set(&phba->sdev_cnt, 0);
da0436e9
JS		 6686 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev);
6687 if (!vport)
6688 return -ENODEV;
6689
6690 shost = lpfc_shost_from_vport(vport);
6691 phba->pport = vport;
2ea259ee 6692
f358dd0c
JS		 6693 if (phba->nvmet_support) {
6694 /* Only 1 vport (pport) will support NVME target */
6695 if (phba->txrdy_payload_pool == NULL) {
6696 phba->txrdy_payload_pool = pci_pool_create(
6697 "txrdy_pool", phba->pcidev,
6698 TXRDY_PAYLOAD_LEN, 16, 0);
6699 if (phba->txrdy_payload_pool) {
6700 phba->targetport = NULL;
6701 phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME;
6702 lpfc_printf_log(phba, KERN_INFO,
6703 LOG_INIT | LOG_NVME_DISC,
6704 "6076 NVME Target Found\n");
6705 }
6706 }
6707 }
6708
da0436e9
JS		 6709 lpfc_debugfs_initialize(vport);
6710 /* Put reference to SCSI host to driver's device private data */
6711 pci_set_drvdata(phba->pcidev, shost);
2e0fef85 6712
4258e98e
JS		 6713 /*
6714 * At this point we are fully registered with PSA. In addition,
6715 * any initial discovery should be completed.
6716 */
6717 vport->load_flag |= FC_ALLOW_FDMI;
8663cbbe
JS		 6718 if (phba->cfg_enable_SmartSAN ||
6719 (phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT)) {
4258e98e
JS		 6720
6721 /* Setup appropriate attribute masks */
6722 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR;
8663cbbe 6723 if (phba->cfg_enable_SmartSAN)
4258e98e
JS		 6724 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR;
6725 else
6726 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR;
6727 }
3772a991
JS		 6728 return 0;
6729}
db2378e0 6730
3772a991
JS		 6731/**
6732 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host.
6733 * @phba: pointer to lpfc hba data structure.
6734 *
6735 * This routine is invoked to destroy HBA physical port and the associated
6736 * SCSI host.
6737 **/
6738static void
6739lpfc_destroy_shost(struct lpfc_hba *phba)
6740{
6741 struct lpfc_vport *vport = phba->pport;
6742
6743 /* Destroy physical port that associated with the SCSI host */
6744 destroy_port(vport);
6745
6746 return;
6747}
6748
6749/**
6750 * lpfc_setup_bg - Setup Block guard structures and debug areas.
6751 * @phba: pointer to lpfc hba data structure.
6752 * @shost: the shost to be used to detect Block guard settings.
6753 *
6754 * This routine sets up the local Block guard protocol settings for @shost.
6755 * This routine also allocates memory for debugging bg buffers.
6756 **/
6757static void
6758lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost)
6759{
bbeb79b9
JS		 6760 uint32_t old_mask;
6761 uint32_t old_guard;
6762
3772a991 6763 int pagecnt = 10;
b3b98b74 6764 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
3772a991
JS		 6765 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
6766 "1478 Registering BlockGuard with the "
6767 "SCSI layer\n");
bbeb79b9 6768
b3b98b74
JS		 6769 old_mask = phba->cfg_prot_mask;
6770 old_guard = phba->cfg_prot_guard;
bbeb79b9
JS		 6771
6772 /* Only allow supported values */
b3b98b74 6773 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION |
bbeb79b9
JS		 6774 SHOST_DIX_TYPE0_PROTECTION |
6775 SHOST_DIX_TYPE1_PROTECTION);
b3b98b74
JS		 6776 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP |
6777 SHOST_DIX_GUARD_CRC);
bbeb79b9
JS		 6778
6779 /* DIF Type 1 protection for profiles AST1/C1 is end to end */
b3b98b74
JS		 6780 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION)
6781 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION;
bbeb79b9 6782
b3b98b74
JS		 6783 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
6784 if ((old_mask != phba->cfg_prot_mask) ||
6785 (old_guard != phba->cfg_prot_guard))
bbeb79b9
JS		 6786 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6787 "1475 Registering BlockGuard with the "
6788 "SCSI layer: mask %d guard %d\n",
b3b98b74
JS		 6789 phba->cfg_prot_mask,
6790 phba->cfg_prot_guard);
bbeb79b9 6791
b3b98b74
JS		 6792 scsi_host_set_prot(shost, phba->cfg_prot_mask);
6793 scsi_host_set_guard(shost, phba->cfg_prot_guard);
bbeb79b9
JS		 6794 } else
6795 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6796 "1479 Not Registering BlockGuard with the SCSI "
6797 "layer, Bad protection parameters: %d %d\n",
6798 old_mask, old_guard);
3772a991 6799 }
bbeb79b9 6800
3772a991
JS		 6801 if (!_dump_buf_data) {
6802 while (pagecnt) {
6803 spin_lock_init(&_dump_buf_lock);
6804 _dump_buf_data =
6805 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
6806 if (_dump_buf_data) {
6a9c52cf
JS		 6807 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6808 "9043 BLKGRD: allocated %d pages for "
3772a991
JS		 6809 "_dump_buf_data at 0x%p\n",
6810 (1 << pagecnt), _dump_buf_data);
6811 _dump_buf_data_order = pagecnt;
6812 memset(_dump_buf_data, 0,
6813 ((1 << PAGE_SHIFT) << pagecnt));
6814 break;
6815 } else
6816 --pagecnt;
6817 }
6818 if (!_dump_buf_data_order)
6a9c52cf
JS		 6819 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6820 "9044 BLKGRD: ERROR unable to allocate "
3772a991
JS		 6821 "memory for hexdump\n");
6822 } else
6a9c52cf
JS		 6823 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6824 "9045 BLKGRD: already allocated _dump_buf_data=0x%p"
3772a991
JS		 6825 "\n", _dump_buf_data);
6826 if (!_dump_buf_dif) {
6827 while (pagecnt) {
6828 _dump_buf_dif =
6829 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
6830 if (_dump_buf_dif) {
6a9c52cf
JS		 6831 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6832 "9046 BLKGRD: allocated %d pages for "
3772a991
JS		 6833 "_dump_buf_dif at 0x%p\n",
6834 (1 << pagecnt), _dump_buf_dif);
6835 _dump_buf_dif_order = pagecnt;
6836 memset(_dump_buf_dif, 0,
6837 ((1 << PAGE_SHIFT) << pagecnt));
6838 break;
6839 } else
6840 --pagecnt;
6841 }
6842 if (!_dump_buf_dif_order)
6a9c52cf
JS		 6843 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6844 "9047 BLKGRD: ERROR unable to allocate "
3772a991
JS		 6845 "memory for hexdump\n");
6846 } else
6a9c52cf
JS		 6847 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6848 "9048 BLKGRD: already allocated _dump_buf_dif=0x%p\n",
3772a991
JS		 6849 _dump_buf_dif);
6850}
6851
6852/**
6853 * lpfc_post_init_setup - Perform necessary device post initialization setup.
6854 * @phba: pointer to lpfc hba data structure.
6855 *
6856 * This routine is invoked to perform all the necessary post initialization
6857 * setup for the device.
6858 **/
6859static void
6860lpfc_post_init_setup(struct lpfc_hba *phba)
6861{
6862 struct Scsi_Host *shost;
6863 struct lpfc_adapter_event_header adapter_event;
6864
6865 /* Get the default values for Model Name and Description */
6866 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
6867
6868 /*
6869 * hba setup may have changed the hba_queue_depth so we need to
6870 * adjust the value of can_queue.
6871 */
6872 shost = pci_get_drvdata(phba->pcidev);
6873 shost->can_queue = phba->cfg_hba_queue_depth - 10;
6874 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED)
6875 lpfc_setup_bg(phba, shost);
6876
6877 lpfc_host_attrib_init(shost);
6878
6879 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
6880 spin_lock_irq(shost->host_lock);
6881 lpfc_poll_start_timer(phba);
6882 spin_unlock_irq(shost->host_lock);
6883 }
6884
6885 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
6886 "0428 Perform SCSI scan\n");
6887 /* Send board arrival event to upper layer */
6888 adapter_event.event_type = FC_REG_ADAPTER_EVENT;
6889 adapter_event.subcategory = LPFC_EVENT_ARRIVAL;
6890 fc_host_post_vendor_event(shost, fc_get_event_number(),
6891 sizeof(adapter_event),
6892 (char *) &adapter_event,
6893 LPFC_NL_VENDOR_ID);
6894 return;
6895}
6896
6897/**
6898 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space.
6899 * @phba: pointer to lpfc hba data structure.
6900 *
6901 * This routine is invoked to set up the PCI device memory space for device
6902 * with SLI-3 interface spec.
6903 *
6904 * Return codes
af901ca1 6905 * 0 - successful
3772a991
JS		 6906 * other values - error
6907 **/
6908static int
6909lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
6910{
6911 struct pci_dev *pdev;
6912 unsigned long bar0map_len, bar2map_len;
6913 int i, hbq_count;
6914 void *ptr;
6915 int error = -ENODEV;
6916
6917 /* Obtain PCI device reference */
6918 if (!phba->pcidev)
6919 return error;
6920 else
6921 pdev = phba->pcidev;
6922
6923 /* Set the device DMA mask size */
8e68597d
MR		 6924 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
6925 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
6926 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
6927 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
3772a991 6928 return error;
8e68597d
MR		 6929 }
6930 }
3772a991
JS		 6931
6932 /* Get the bus address of Bar0 and Bar2 and the number of bytes
6933 * required by each mapping.
6934 */
6935 phba->pci_bar0_map = pci_resource_start(pdev, 0);
6936 bar0map_len = pci_resource_len(pdev, 0);
6937
6938 phba->pci_bar2_map = pci_resource_start(pdev, 2);
6939 bar2map_len = pci_resource_len(pdev, 2);
6940
6941 /* Map HBA SLIM to a kernel virtual address. */
6942 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
6943 if (!phba->slim_memmap_p) {
6944 dev_printk(KERN_ERR, &pdev->dev,
6945 "ioremap failed for SLIM memory.\n");
6946 goto out;
6947 }
6948
6949 /* Map HBA Control Registers to a kernel virtual address. */
6950 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
6951 if (!phba->ctrl_regs_memmap_p) {
6952 dev_printk(KERN_ERR, &pdev->dev,
6953 "ioremap failed for HBA control registers.\n");
6954 goto out_iounmap_slim;
6955 }
6956
6957 /* Allocate memory for SLI-2 structures */
1aee383d
JP		 6958 phba->slim2p.virt = dma_zalloc_coherent(&pdev->dev, SLI2_SLIM_SIZE,
6959 &phba->slim2p.phys, GFP_KERNEL);
3772a991
JS		 6960 if (!phba->slim2p.virt)
6961 goto out_iounmap;
6962
3772a991 6963 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx);
7a470277
JS		 6964 phba->mbox_ext = (phba->slim2p.virt +
6965 offsetof(struct lpfc_sli2_slim, mbx_ext_words));
3772a991
JS		 6966 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb));
6967 phba->IOCBs = (phba->slim2p.virt +
6968 offsetof(struct lpfc_sli2_slim, IOCBs));
6969
6970 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev,
6971 lpfc_sli_hbq_size(),
6972 &phba->hbqslimp.phys,
6973 GFP_KERNEL);
6974 if (!phba->hbqslimp.virt)
6975 goto out_free_slim;
6976
6977 hbq_count = lpfc_sli_hbq_count();
6978 ptr = phba->hbqslimp.virt;
6979 for (i = 0; i < hbq_count; ++i) {
6980 phba->hbqs[i].hbq_virt = ptr;
6981 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list);
6982 ptr += (lpfc_hbq_defs[i]->entry_count *
6983 sizeof(struct lpfc_hbq_entry));
6984 }
6985 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc;
6986 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free;
6987
6988 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size());
6989
3772a991
JS		 6990 phba->MBslimaddr = phba->slim_memmap_p;
6991 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
6992 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
6993 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
6994 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
6995
6996 return 0;
6997
6998out_free_slim:
6999 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7000 phba->slim2p.virt, phba->slim2p.phys);
7001out_iounmap:
7002 iounmap(phba->ctrl_regs_memmap_p);
7003out_iounmap_slim:
7004 iounmap(phba->slim_memmap_p);
7005out:
7006 return error;
7007}
7008
7009/**
7010 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space.
7011 * @phba: pointer to lpfc hba data structure.
7012 *
7013 * This routine is invoked to unset the PCI device memory space for device
7014 * with SLI-3 interface spec.
7015 **/
7016static void
7017lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
7018{
7019 struct pci_dev *pdev;
7020
7021 /* Obtain PCI device reference */
7022 if (!phba->pcidev)
7023 return;
7024 else
7025 pdev = phba->pcidev;
7026
7027 /* Free coherent DMA memory allocated */
7028 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
7029 phba->hbqslimp.virt, phba->hbqslimp.phys);
7030 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7031 phba->slim2p.virt, phba->slim2p.phys);
7032
7033 /* I/O memory unmap */
7034 iounmap(phba->ctrl_regs_memmap_p);
7035 iounmap(phba->slim_memmap_p);
7036
7037 return;
7038}
7039
7040/**
da0436e9 7041 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status
3772a991
JS		 7042 * @phba: pointer to lpfc hba data structure.
7043 *
da0436e9
JS		 7044 * This routine is invoked to wait for SLI4 device Power On Self Test (POST)
7045 * done and check status.
3772a991 7046 *
da0436e9 7047 * Return 0 if successful, otherwise -ENODEV.
3772a991 7048 **/
da0436e9
JS		 7049int
7050lpfc_sli4_post_status_check(struct lpfc_hba *phba)
3772a991 7051{
2fcee4bf
JS		 7052 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg;
7053 struct lpfc_register reg_data;
7054 int i, port_error = 0;
7055 uint32_t if_type;
3772a991 7056
9940b97b
JS		 7057 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
7058 memset(&reg_data, 0, sizeof(reg_data));
2fcee4bf 7059 if (!phba->sli4_hba.PSMPHRregaddr)
da0436e9 7060 return -ENODEV;
3772a991 7061
da0436e9
JS		 7062 /* Wait up to 30 seconds for the SLI Port POST done and ready */
7063 for (i = 0; i < 3000; i++) {
9940b97b
JS		 7064 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
7065 &portsmphr_reg.word0) ||
7066 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) {
2fcee4bf 7067 /* Port has a fatal POST error, break out */
da0436e9
JS		 7068 port_error = -ENODEV;
7069 break;
7070 }
2fcee4bf
JS		 7071 if (LPFC_POST_STAGE_PORT_READY ==
7072 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))
da0436e9 7073 break;
da0436e9 7074 msleep(10);
3772a991
JS		 7075 }
7076
2fcee4bf
JS		 7077 /*
7078 * If there was a port error during POST, then don't proceed with
7079 * other register reads as the data may not be valid. Just exit.
7080 */
7081 if (port_error) {
da0436e9 7082 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2fcee4bf
JS		 7083 "1408 Port Failed POST - portsmphr=0x%x, "
7084 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, "
7085 "scr2=x%x, hscratch=x%x, pstatus=x%x\n",
7086 portsmphr_reg.word0,
7087 bf_get(lpfc_port_smphr_perr, &portsmphr_reg),
7088 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg),
7089 bf_get(lpfc_port_smphr_nip, &portsmphr_reg),
7090 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg),
7091 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg),
7092 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg),
7093 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg),
7094 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg));
7095 } else {
28baac74 7096 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
2fcee4bf
JS		 7097 "2534 Device Info: SLIFamily=0x%x, "
7098 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, "
7099 "SLIHint_2=0x%x, FT=0x%x\n",
28baac74
JS		 7100 bf_get(lpfc_sli_intf_sli_family,
7101 &phba->sli4_hba.sli_intf),
7102 bf_get(lpfc_sli_intf_slirev,
7103 &phba->sli4_hba.sli_intf),
085c647c
JS		 7104 bf_get(lpfc_sli_intf_if_type,
7105 &phba->sli4_hba.sli_intf),
7106 bf_get(lpfc_sli_intf_sli_hint1,
28baac74 7107 &phba->sli4_hba.sli_intf),
085c647c
JS		 7108 bf_get(lpfc_sli_intf_sli_hint2,
7109 &phba->sli4_hba.sli_intf),
7110 bf_get(lpfc_sli_intf_func_type,
28baac74 7111 &phba->sli4_hba.sli_intf));
2fcee4bf
JS		 7112 /*
7113 * Check for other Port errors during the initialization
7114 * process. Fail the load if the port did not come up
7115 * correctly.
7116 */
7117 if_type = bf_get(lpfc_sli_intf_if_type,
7118 &phba->sli4_hba.sli_intf);
7119 switch (if_type) {
7120 case LPFC_SLI_INTF_IF_TYPE_0:
7121 phba->sli4_hba.ue_mask_lo =
7122 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
7123 phba->sli4_hba.ue_mask_hi =
7124 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
7125 uerrlo_reg.word0 =
7126 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
7127 uerrhi_reg.word0 =
7128 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
7129 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
7130 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
7131 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7132 "1422 Unrecoverable Error "
7133 "Detected during POST "
7134 "uerr_lo_reg=0x%x, "
7135 "uerr_hi_reg=0x%x, "
7136 "ue_mask_lo_reg=0x%x, "
7137 "ue_mask_hi_reg=0x%x\n",
7138 uerrlo_reg.word0,
7139 uerrhi_reg.word0,
7140 phba->sli4_hba.ue_mask_lo,
7141 phba->sli4_hba.ue_mask_hi);
7142 port_error = -ENODEV;
7143 }
7144 break;
7145 case LPFC_SLI_INTF_IF_TYPE_2:
7146 /* Final checks. The port status should be clean. */
9940b97b
JS		 7147 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
7148 &reg_data.word0) ||
0558056c
JS		 7149 (bf_get(lpfc_sliport_status_err, &reg_data) &&
7150 !bf_get(lpfc_sliport_status_rn, &reg_data))) {
2fcee4bf
JS		 7151 phba->work_status[0] =
7152 readl(phba->sli4_hba.u.if_type2.
7153 ERR1regaddr);
7154 phba->work_status[1] =
7155 readl(phba->sli4_hba.u.if_type2.
7156 ERR2regaddr);
7157 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8fcb8acd
JS		 7158 "2888 Unrecoverable port error "
7159 "following POST: port status reg "
7160 "0x%x, port_smphr reg 0x%x, "
2fcee4bf
JS		 7161 "error 1=0x%x, error 2=0x%x\n",
7162 reg_data.word0,
7163 portsmphr_reg.word0,
7164 phba->work_status[0],
7165 phba->work_status[1]);
7166 port_error = -ENODEV;
7167 }
7168 break;
7169 case LPFC_SLI_INTF_IF_TYPE_1:
7170 default:
7171 break;
7172 }
28baac74 7173 }
da0436e9
JS		 7174 return port_error;
7175}
3772a991 7176
da0436e9
JS		 7177/**
7178 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map.
7179 * @phba: pointer to lpfc hba data structure.
2fcee4bf 7180 * @if_type: The SLI4 interface type getting configured.
da0436e9
JS		 7181 *
7182 * This routine is invoked to set up SLI4 BAR0 PCI config space register
7183 * memory map.
7184 **/
7185static void
2fcee4bf
JS		 7186lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
7187{
7188 switch (if_type) {
7189 case LPFC_SLI_INTF_IF_TYPE_0:
7190 phba->sli4_hba.u.if_type0.UERRLOregaddr =
7191 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
7192 phba->sli4_hba.u.if_type0.UERRHIregaddr =
7193 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
7194 phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
7195 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
7196 phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
7197 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
7198 phba->sli4_hba.SLIINTFregaddr =
7199 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7200 break;
7201 case LPFC_SLI_INTF_IF_TYPE_2:
7202 phba->sli4_hba.u.if_type2.ERR1regaddr =
88a2cfbb
JS		 7203 phba->sli4_hba.conf_regs_memmap_p +
7204 LPFC_CTL_PORT_ER1_OFFSET;
2fcee4bf 7205 phba->sli4_hba.u.if_type2.ERR2regaddr =
88a2cfbb
JS		 7206 phba->sli4_hba.conf_regs_memmap_p +
7207 LPFC_CTL_PORT_ER2_OFFSET;
2fcee4bf 7208 phba->sli4_hba.u.if_type2.CTRLregaddr =
88a2cfbb
JS		 7209 phba->sli4_hba.conf_regs_memmap_p +
7210 LPFC_CTL_PORT_CTL_OFFSET;
2fcee4bf 7211 phba->sli4_hba.u.if_type2.STATUSregaddr =
88a2cfbb
JS		 7212 phba->sli4_hba.conf_regs_memmap_p +
7213 LPFC_CTL_PORT_STA_OFFSET;
2fcee4bf
JS		 7214 phba->sli4_hba.SLIINTFregaddr =
7215 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7216 phba->sli4_hba.PSMPHRregaddr =
88a2cfbb
JS		 7217 phba->sli4_hba.conf_regs_memmap_p +
7218 LPFC_CTL_PORT_SEM_OFFSET;
2fcee4bf 7219 phba->sli4_hba.RQDBregaddr =
962bc51b
JS		 7220 phba->sli4_hba.conf_regs_memmap_p +
7221 LPFC_ULP0_RQ_DOORBELL;
2fcee4bf 7222 phba->sli4_hba.WQDBregaddr =
962bc51b
JS		 7223 phba->sli4_hba.conf_regs_memmap_p +
7224 LPFC_ULP0_WQ_DOORBELL;
2fcee4bf
JS		 7225 phba->sli4_hba.EQCQDBregaddr =
7226 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
7227 phba->sli4_hba.MQDBregaddr =
7228 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
7229 phba->sli4_hba.BMBXregaddr =
7230 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
7231 break;
7232 case LPFC_SLI_INTF_IF_TYPE_1:
7233 default:
7234 dev_printk(KERN_ERR, &phba->pcidev->dev,
7235 "FATAL - unsupported SLI4 interface type - %d\n",
7236 if_type);
7237 break;
7238 }
da0436e9 7239}
3772a991 7240
da0436e9
JS		 7241/**
7242 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map.
7243 * @phba: pointer to lpfc hba data structure.
7244 *
7245 * This routine is invoked to set up SLI4 BAR1 control status register (CSR)
7246 * memory map.
7247 **/
7248static void
7249lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba)
7250{
2fcee4bf
JS		 7251 phba->sli4_hba.PSMPHRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
7252 LPFC_SLIPORT_IF0_SMPHR;
da0436e9 7253 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7254 LPFC_HST_ISR0;
da0436e9 7255 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7256 LPFC_HST_IMR0;
da0436e9 7257 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7258 LPFC_HST_ISCR0;
3772a991
JS		 7259}
7260
7261/**
da0436e9 7262 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map.
3772a991 7263 * @phba: pointer to lpfc hba data structure.
da0436e9 7264 * @vf: virtual function number
3772a991 7265 *
da0436e9
JS		 7266 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map
7267 * based on the given viftual function number, @vf.
7268 *
7269 * Return 0 if successful, otherwise -ENODEV.
3772a991 7270 **/
da0436e9
JS		 7271static int
7272lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf)
3772a991 7273{
da0436e9
JS		 7274 if (vf > LPFC_VIR_FUNC_MAX)
7275 return -ENODEV;
3772a991 7276
da0436e9 7277 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS		 7278 vf * LPFC_VFR_PAGE_SIZE +
7279 LPFC_ULP0_RQ_DOORBELL);
da0436e9 7280 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS		 7281 vf * LPFC_VFR_PAGE_SIZE +
7282 LPFC_ULP0_WQ_DOORBELL);
da0436e9
JS		 7283 phba->sli4_hba.EQCQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7284 vf * LPFC_VFR_PAGE_SIZE + LPFC_EQCQ_DOORBELL);
7285 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7286 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL);
7287 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7288 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX);
7289 return 0;
3772a991
JS		 7290}
7291
7292/**
da0436e9 7293 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox
3772a991
JS		 7294 * @phba: pointer to lpfc hba data structure.
7295 *
da0436e9
JS		 7296 * This routine is invoked to create the bootstrap mailbox
7297 * region consistent with the SLI-4 interface spec. This
7298 * routine allocates all memory necessary to communicate
7299 * mailbox commands to the port and sets up all alignment
7300 * needs. No locks are expected to be held when calling
7301 * this routine.
3772a991
JS		 7302 *
7303 * Return codes
af901ca1 7304 * 0 - successful
d439d286 7305 * -ENOMEM - could not allocated memory.
da0436e9 7306 **/
3772a991 7307static int
da0436e9 7308lpfc_create_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7309{
da0436e9
JS		 7310 uint32_t bmbx_size;
7311 struct lpfc_dmabuf *dmabuf;
7312 struct dma_address *dma_address;
7313 uint32_t pa_addr;
7314 uint64_t phys_addr;
7315
7316 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
7317 if (!dmabuf)
7318 return -ENOMEM;
3772a991 7319
da0436e9
JS		 7320 /*
7321 * The bootstrap mailbox region is comprised of 2 parts
7322 * plus an alignment restriction of 16 bytes.
7323 */
7324 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1);
1aee383d
JP		 7325 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev, bmbx_size,
7326 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS		 7327 if (!dmabuf->virt) {
7328 kfree(dmabuf);
7329 return -ENOMEM;
3772a991
JS		 7330 }
7331
da0436e9
JS		 7332 /*
7333 * Initialize the bootstrap mailbox pointers now so that the register
7334 * operations are simple later. The mailbox dma address is required
7335 * to be 16-byte aligned. Also align the virtual memory as each
7336 * maibox is copied into the bmbx mailbox region before issuing the
7337 * command to the port.
7338 */
7339 phba->sli4_hba.bmbx.dmabuf = dmabuf;
7340 phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
7341
7342 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
7343 LPFC_ALIGN_16_BYTE);
7344 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
7345 LPFC_ALIGN_16_BYTE);
7346
7347 /*
7348 * Set the high and low physical addresses now. The SLI4 alignment
7349 * requirement is 16 bytes and the mailbox is posted to the port
7350 * as two 30-bit addresses. The other data is a bit marking whether
7351 * the 30-bit address is the high or low address.
7352 * Upcast bmbx aphys to 64bits so shift instruction compiles
7353 * clean on 32 bit machines.
7354 */
7355 dma_address = &phba->sli4_hba.bmbx.dma_address;
7356 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
7357 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff);
7358 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) |
7359 LPFC_BMBX_BIT1_ADDR_HI);
7360
7361 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
7362 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) |
7363 LPFC_BMBX_BIT1_ADDR_LO);
7364 return 0;
3772a991
JS		 7365}
7366
7367/**
da0436e9 7368 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources
3772a991
JS		 7369 * @phba: pointer to lpfc hba data structure.
7370 *
da0436e9
JS		 7371 * This routine is invoked to teardown the bootstrap mailbox
7372 * region and release all host resources. This routine requires
7373 * the caller to ensure all mailbox commands recovered, no
7374 * additional mailbox comands are sent, and interrupts are disabled
7375 * before calling this routine.
7376 *
7377 **/
3772a991 7378static void
da0436e9 7379lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7380{
da0436e9
JS		 7381 dma_free_coherent(&phba->pcidev->dev,
7382 phba->sli4_hba.bmbx.bmbx_size,
7383 phba->sli4_hba.bmbx.dmabuf->virt,
7384 phba->sli4_hba.bmbx.dmabuf->phys);
7385
7386 kfree(phba->sli4_hba.bmbx.dmabuf);
7387 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
3772a991
JS		 7388}
7389
7390/**
da0436e9 7391 * lpfc_sli4_read_config - Get the config parameters.
3772a991
JS		 7392 * @phba: pointer to lpfc hba data structure.
7393 *
da0436e9
JS		 7394 * This routine is invoked to read the configuration parameters from the HBA.
7395 * The configuration parameters are used to set the base and maximum values
7396 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource
7397 * allocation for the port.
3772a991
JS		 7398 *
7399 * Return codes
af901ca1 7400 * 0 - successful
25985edc 7401 * -ENOMEM - No available memory
d439d286 7402 * -EIO - The mailbox failed to complete successfully.
3772a991 7403 **/
ff78d8f9 7404int
da0436e9 7405lpfc_sli4_read_config(struct lpfc_hba *phba)
3772a991 7406{
da0436e9
JS		 7407 LPFC_MBOXQ_t *pmb;
7408 struct lpfc_mbx_read_config *rd_config;
912e3acd
JS		 7409 union lpfc_sli4_cfg_shdr *shdr;
7410 uint32_t shdr_status, shdr_add_status;
7411 struct lpfc_mbx_get_func_cfg *get_func_cfg;
7412 struct lpfc_rsrc_desc_fcfcoe *desc;
8aa134a8 7413 char *pdesc_0;
c691816e
JS		 7414 uint16_t forced_link_speed;
7415 uint32_t if_type;
8aa134a8 7416 int length, i, rc = 0, rc2;
3772a991 7417
da0436e9
JS		 7418 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
7419 if (!pmb) {
7420 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7421 "2011 Unable to allocate memory for issuing "
7422 "SLI_CONFIG_SPECIAL mailbox command\n");
7423 return -ENOMEM;
3772a991
JS		 7424 }
7425
da0436e9 7426 lpfc_read_config(phba, pmb);
3772a991 7427
da0436e9
JS		 7428 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
7429 if (rc != MBX_SUCCESS) {
7430 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7431 "2012 Mailbox failed , mbxCmd x%x "
7432 "READ_CONFIG, mbxStatus x%x\n",
7433 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7434 bf_get(lpfc_mqe_status, &pmb->u.mqe));
7435 rc = -EIO;
7436 } else {
7437 rd_config = &pmb->u.mqe.un.rd_config;
ff78d8f9
JS		 7438 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) {
7439 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
7440 phba->sli4_hba.lnk_info.lnk_tp =
7441 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config);
7442 phba->sli4_hba.lnk_info.lnk_no =
7443 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config);
7444 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7445 "3081 lnk_type:%d, lnk_numb:%d\n",
7446 phba->sli4_hba.lnk_info.lnk_tp,
7447 phba->sli4_hba.lnk_info.lnk_no);
7448 } else
7449 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
7450 "3082 Mailbox (x%x) returned ldv:x0\n",
7451 bf_get(lpfc_mqe_command, &pmb->u.mqe));
6d368e53
JS		 7452 phba->sli4_hba.extents_in_use =
7453 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config);
da0436e9
JS		 7454 phba->sli4_hba.max_cfg_param.max_xri =
7455 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config);
7456 phba->sli4_hba.max_cfg_param.xri_base =
7457 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config);
7458 phba->sli4_hba.max_cfg_param.max_vpi =
7459 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config);
7460 phba->sli4_hba.max_cfg_param.vpi_base =
7461 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config);
7462 phba->sli4_hba.max_cfg_param.max_rpi =
7463 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config);
7464 phba->sli4_hba.max_cfg_param.rpi_base =
7465 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config);
7466 phba->sli4_hba.max_cfg_param.max_vfi =
7467 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config);
7468 phba->sli4_hba.max_cfg_param.vfi_base =
7469 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config);
7470 phba->sli4_hba.max_cfg_param.max_fcfi =
7471 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config);
da0436e9
JS		 7472 phba->sli4_hba.max_cfg_param.max_eq =
7473 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config);
7474 phba->sli4_hba.max_cfg_param.max_rq =
7475 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config);
7476 phba->sli4_hba.max_cfg_param.max_wq =
7477 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config);
7478 phba->sli4_hba.max_cfg_param.max_cq =
7479 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config);
7480 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config);
7481 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
7482 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
7483 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
5ffc266e
JS		 7484 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
7485 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
da0436e9
JS		 7486 phba->max_vports = phba->max_vpi;
7487 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6d368e53
JS		 7488 "2003 cfg params Extents? %d "
7489 "XRI(B:%d M:%d), "
da0436e9
JS		 7490 "VPI(B:%d M:%d) "
7491 "VFI(B:%d M:%d) "
7492 "RPI(B:%d M:%d) "
2ea259ee 7493 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d\n",
6d368e53 7494 phba->sli4_hba.extents_in_use,
da0436e9
JS		 7495 phba->sli4_hba.max_cfg_param.xri_base,
7496 phba->sli4_hba.max_cfg_param.max_xri,
7497 phba->sli4_hba.max_cfg_param.vpi_base,
7498 phba->sli4_hba.max_cfg_param.max_vpi,
7499 phba->sli4_hba.max_cfg_param.vfi_base,
7500 phba->sli4_hba.max_cfg_param.max_vfi,
7501 phba->sli4_hba.max_cfg_param.rpi_base,
7502 phba->sli4_hba.max_cfg_param.max_rpi,
2ea259ee
JS		 7503 phba->sli4_hba.max_cfg_param.max_fcfi,
7504 phba->sli4_hba.max_cfg_param.max_eq,
7505 phba->sli4_hba.max_cfg_param.max_cq,
7506 phba->sli4_hba.max_cfg_param.max_wq,
7507 phba->sli4_hba.max_cfg_param.max_rq);
7508
3772a991 7509 }
912e3acd
JS		 7510
7511 if (rc)
7512 goto read_cfg_out;
da0436e9 7513
c691816e
JS		 7514 /* Update link speed if forced link speed is supported */
7515 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7516 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
7517 forced_link_speed =
7518 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config);
7519 if (forced_link_speed) {
7520 phba->hba_flag |= HBA_FORCED_LINK_SPEED;
7521
7522 switch (forced_link_speed) {
7523 case LINK_SPEED_1G:
7524 phba->cfg_link_speed =
7525 LPFC_USER_LINK_SPEED_1G;
7526 break;
7527 case LINK_SPEED_2G:
7528 phba->cfg_link_speed =
7529 LPFC_USER_LINK_SPEED_2G;
7530 break;
7531 case LINK_SPEED_4G:
7532 phba->cfg_link_speed =
7533 LPFC_USER_LINK_SPEED_4G;
7534 break;
7535 case LINK_SPEED_8G:
7536 phba->cfg_link_speed =
7537 LPFC_USER_LINK_SPEED_8G;
7538 break;
7539 case LINK_SPEED_10G:
7540 phba->cfg_link_speed =
7541 LPFC_USER_LINK_SPEED_10G;
7542 break;
7543 case LINK_SPEED_16G:
7544 phba->cfg_link_speed =
7545 LPFC_USER_LINK_SPEED_16G;
7546 break;
7547 case LINK_SPEED_32G:
7548 phba->cfg_link_speed =
7549 LPFC_USER_LINK_SPEED_32G;
7550 break;
7551 case 0xffff:
7552 phba->cfg_link_speed =
7553 LPFC_USER_LINK_SPEED_AUTO;
7554 break;
7555 default:
7556 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7557 "0047 Unrecognized link "
7558 "speed : %d\n",
7559 forced_link_speed);
7560 phba->cfg_link_speed =
7561 LPFC_USER_LINK_SPEED_AUTO;
7562 }
7563 }
7564 }
7565
da0436e9 7566 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS		 7567 length = phba->sli4_hba.max_cfg_param.max_xri -
7568 lpfc_sli4_get_els_iocb_cnt(phba);
7569 if (phba->cfg_hba_queue_depth > length) {
7570 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7571 "3361 HBA queue depth changed from %d to %d\n",
7572 phba->cfg_hba_queue_depth, length);
7573 phba->cfg_hba_queue_depth = length;
7574 }
912e3acd
JS		 7575
7576 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
7577 LPFC_SLI_INTF_IF_TYPE_2)
7578 goto read_cfg_out;
7579
7580 /* get the pf# and vf# for SLI4 if_type 2 port */
7581 length = (sizeof(struct lpfc_mbx_get_func_cfg) -
7582 sizeof(struct lpfc_sli4_cfg_mhdr));
7583 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON,
7584 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG,
7585 length, LPFC_SLI4_MBX_EMBED);
7586
8aa134a8 7587 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
912e3acd
JS		 7588 shdr = (union lpfc_sli4_cfg_shdr *)
7589 &pmb->u.mqe.un.sli4_config.header.cfg_shdr;
7590 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
7591 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8aa134a8 7592 if (rc2 || shdr_status || shdr_add_status) {
912e3acd
JS		 7593 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7594 "3026 Mailbox failed , mbxCmd x%x "
7595 "GET_FUNCTION_CONFIG, mbxStatus x%x\n",
7596 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7597 bf_get(lpfc_mqe_status, &pmb->u.mqe));
912e3acd
JS		 7598 goto read_cfg_out;
7599 }
7600
7601 /* search for fc_fcoe resrouce descriptor */
7602 get_func_cfg = &pmb->u.mqe.un.get_func_cfg;
912e3acd 7603
8aa134a8
JS		 7604 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0];
7605 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0;
7606 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc);
7607 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD)
7608 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH;
7609 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH)
7610 goto read_cfg_out;
7611
912e3acd 7612 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) {
8aa134a8 7613 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i);
912e3acd 7614 if (LPFC_RSRC_DESC_TYPE_FCFCOE ==
8aa134a8 7615 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) {
912e3acd
JS		 7616 phba->sli4_hba.iov.pf_number =
7617 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc);
7618 phba->sli4_hba.iov.vf_number =
7619 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc);
7620 break;
7621 }
7622 }
7623
7624 if (i < LPFC_RSRC_DESC_MAX_NUM)
7625 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7626 "3027 GET_FUNCTION_CONFIG: pf_number:%d, "
7627 "vf_number:%d\n", phba->sli4_hba.iov.pf_number,
7628 phba->sli4_hba.iov.vf_number);
8aa134a8 7629 else
912e3acd
JS		 7630 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7631 "3028 GET_FUNCTION_CONFIG: failed to find "
7632 "Resrouce Descriptor:x%x\n",
7633 LPFC_RSRC_DESC_TYPE_FCFCOE);
912e3acd
JS		 7634
7635read_cfg_out:
7636 mempool_free(pmb, phba->mbox_mem_pool);
da0436e9 7637 return rc;
3772a991
JS		 7638}
7639
7640/**
2fcee4bf 7641 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port.
3772a991
JS		 7642 * @phba: pointer to lpfc hba data structure.
7643 *
2fcee4bf
JS		 7644 * This routine is invoked to setup the port-side endian order when
7645 * the port if_type is 0. This routine has no function for other
7646 * if_types.
da0436e9
JS		 7647 *
7648 * Return codes
af901ca1 7649 * 0 - successful
25985edc 7650 * -ENOMEM - No available memory
d439d286 7651 * -EIO - The mailbox failed to complete successfully.
3772a991 7652 **/
da0436e9
JS		 7653static int
7654lpfc_setup_endian_order(struct lpfc_hba *phba)
3772a991 7655{
da0436e9 7656 LPFC_MBOXQ_t *mboxq;
2fcee4bf 7657 uint32_t if_type, rc = 0;
da0436e9
JS		 7658 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0,
7659 HOST_ENDIAN_HIGH_WORD1};
3772a991 7660
2fcee4bf
JS		 7661 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7662 switch (if_type) {
7663 case LPFC_SLI_INTF_IF_TYPE_0:
7664 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
7665 GFP_KERNEL);
7666 if (!mboxq) {
7667 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7668 "0492 Unable to allocate memory for "
7669 "issuing SLI_CONFIG_SPECIAL mailbox "
7670 "command\n");
7671 return -ENOMEM;
7672 }
3772a991 7673
2fcee4bf
JS		 7674 /*
7675 * The SLI4_CONFIG_SPECIAL mailbox command requires the first
7676 * two words to contain special data values and no other data.
7677 */
7678 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t));
7679 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data));
7680 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7681 if (rc != MBX_SUCCESS) {
7682 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7683 "0493 SLI_CONFIG_SPECIAL mailbox "
7684 "failed with status x%x\n",
7685 rc);
7686 rc = -EIO;
7687 }
7688 mempool_free(mboxq, phba->mbox_mem_pool);
7689 break;
7690 case LPFC_SLI_INTF_IF_TYPE_2:
7691 case LPFC_SLI_INTF_IF_TYPE_1:
7692 default:
7693 break;
da0436e9 7694 }
da0436e9 7695 return rc;
3772a991
JS		 7696}
7697
7698/**
895427bd 7699 * lpfc_sli4_queue_verify - Verify and update EQ counts
3772a991
JS		 7700 * @phba: pointer to lpfc hba data structure.
7701 *
895427bd
JS		 7702 * This routine is invoked to check the user settable queue counts for EQs.
7703 * After this routine is called the counts will be set to valid values that
5350d872
JS		 7704 * adhere to the constraints of the system's interrupt vectors and the port's
7705 * queue resources.
da0436e9
JS		 7706 *
7707 * Return codes
af901ca1 7708 * 0 - successful
25985edc 7709 * -ENOMEM - No available memory
3772a991 7710 **/
da0436e9 7711static int
5350d872 7712lpfc_sli4_queue_verify(struct lpfc_hba *phba)
3772a991 7713{
895427bd 7714 int io_channel;
1ba981fd 7715 int fof_vectors = phba->cfg_fof ? 1 : 0;
3772a991 7716
da0436e9 7717 /*
67d12733 7718 * Sanity check for configured queue parameters against the run-time
da0436e9
JS		 7719 * device parameters
7720 */
3772a991 7721
67d12733 7722 /* Sanity check on HBA EQ parameters */
895427bd 7723 io_channel = phba->io_channel_irqs;
67d12733 7724
895427bd 7725 if (phba->sli4_hba.num_online_cpu < io_channel) {
82c3e9ba
JS		 7726 lpfc_printf_log(phba,
7727 KERN_ERR, LOG_INIT,
90695ee0 7728 "3188 Reducing IO channels to match number of "
7bb03bbf 7729 "online CPUs: from %d to %d\n",
895427bd
JS		 7730 io_channel, phba->sli4_hba.num_online_cpu);
7731 io_channel = phba->sli4_hba.num_online_cpu;
90695ee0
JS		 7732 }
7733
895427bd 7734 if (io_channel + fof_vectors > phba->sli4_hba.max_cfg_param.max_eq) {
82c3e9ba
JS		 7735 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7736 "2575 Reducing IO channels to match number of "
7737 "available EQs: from %d to %d\n",
895427bd 7738 io_channel,
82c3e9ba 7739 phba->sli4_hba.max_cfg_param.max_eq);
895427bd 7740 io_channel = phba->sli4_hba.max_cfg_param.max_eq - fof_vectors;
da0436e9 7741 }
67d12733 7742
895427bd
JS		 7743 /* The actual number of FCP / NVME event queues adopted */
7744 if (io_channel != phba->io_channel_irqs)
7745 phba->io_channel_irqs = io_channel;
7746 if (phba->cfg_fcp_io_channel > io_channel)
7747 phba->cfg_fcp_io_channel = io_channel;
7748 if (phba->cfg_nvme_io_channel > io_channel)
7749 phba->cfg_nvme_io_channel = io_channel;
2d7dbc4c
JS		 7750 if (phba->cfg_nvme_io_channel < phba->cfg_nvmet_mrq)
7751 phba->cfg_nvmet_mrq = phba->cfg_nvme_io_channel;
895427bd
JS		 7752
7753 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2d7dbc4c 7754 "2574 IO channels: irqs %d fcp %d nvme %d MRQ: %d\n",
895427bd 7755 phba->io_channel_irqs, phba->cfg_fcp_io_channel,
2d7dbc4c 7756 phba->cfg_nvme_io_channel, phba->cfg_nvmet_mrq);
3772a991 7757
da0436e9
JS		 7758 /* Get EQ depth from module parameter, fake the default for now */
7759 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
7760 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
3772a991 7761
5350d872
JS		 7762 /* Get CQ depth from module parameter, fake the default for now */
7763 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
7764 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
895427bd
JS		 7765 return 0;
7766}
7767
7768static int
7769lpfc_alloc_nvme_wq_cq(struct lpfc_hba *phba, int wqidx)
7770{
7771 struct lpfc_queue *qdesc;
7772 int cnt;
5350d872 7773
895427bd
JS		 7774 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7775 phba->sli4_hba.cq_ecount);
7776 if (!qdesc) {
7777 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7778 "0508 Failed allocate fast-path NVME CQ (%d)\n",
7779 wqidx);
7780 return 1;
7781 }
7782 phba->sli4_hba.nvme_cq[wqidx] = qdesc;
7783
7784 cnt = LPFC_NVME_WQSIZE;
7785 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_WQE128_SIZE, cnt);
7786 if (!qdesc) {
7787 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7788 "0509 Failed allocate fast-path NVME WQ (%d)\n",
7789 wqidx);
7790 return 1;
7791 }
7792 phba->sli4_hba.nvme_wq[wqidx] = qdesc;
7793 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
7794 return 0;
7795}
7796
7797static int
7798lpfc_alloc_fcp_wq_cq(struct lpfc_hba *phba, int wqidx)
7799{
7800 struct lpfc_queue *qdesc;
7801 uint32_t wqesize;
7802
7803 /* Create Fast Path FCP CQs */
7804 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
7805 phba->sli4_hba.cq_ecount);
7806 if (!qdesc) {
7807 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7808 "0499 Failed allocate fast-path FCP CQ (%d)\n", wqidx);
7809 return 1;
7810 }
7811 phba->sli4_hba.fcp_cq[wqidx] = qdesc;
7812
7813 /* Create Fast Path FCP WQs */
7814 wqesize = (phba->fcp_embed_io) ?
d1f525aa 7815 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
895427bd
JS		 7816 qdesc = lpfc_sli4_queue_alloc(phba, wqesize, phba->sli4_hba.wq_ecount);
7817 if (!qdesc) {
7818 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7819 "0503 Failed allocate fast-path FCP WQ (%d)\n",
7820 wqidx);
7821 return 1;
7822 }
7823 phba->sli4_hba.fcp_wq[wqidx] = qdesc;
7824 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
5350d872 7825 return 0;
5350d872
JS		 7826}
7827
7828/**
7829 * lpfc_sli4_queue_create - Create all the SLI4 queues
7830 * @phba: pointer to lpfc hba data structure.
7831 *
7832 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA
7833 * operation. For each SLI4 queue type, the parameters such as queue entry
7834 * count (queue depth) shall be taken from the module parameter. For now,
7835 * we just use some constant number as place holder.
7836 *
7837 * Return codes
4907cb7b 7838 * 0 - successful
5350d872
JS		 7839 * -ENOMEM - No availble memory
7840 * -EIO - The mailbox failed to complete successfully.
7841 **/
7842int
7843lpfc_sli4_queue_create(struct lpfc_hba *phba)
7844{
7845 struct lpfc_queue *qdesc;
d1f525aa 7846 int idx, io_channel;
5350d872
JS		 7847
7848 /*
67d12733 7849 * Create HBA Record arrays.
895427bd 7850 * Both NVME and FCP will share that same vectors / EQs
5350d872 7851 */
895427bd
JS		 7852 io_channel = phba->io_channel_irqs;
7853 if (!io_channel)
67d12733 7854 return -ERANGE;
5350d872 7855
67d12733
JS		 7856 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
7857 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
7858 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
7859 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
7860 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
7861 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
895427bd
JS		 7862 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
7863 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
7864 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
7865 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
67d12733 7866
895427bd
JS		 7867 phba->sli4_hba.hba_eq = kcalloc(io_channel,
7868 sizeof(struct lpfc_queue *),
7869 GFP_KERNEL);
67d12733
JS		 7870 if (!phba->sli4_hba.hba_eq) {
7871 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7872 "2576 Failed allocate memory for "
7873 "fast-path EQ record array\n");
7874 goto out_error;
7875 }
7876
895427bd
JS		 7877 if (phba->cfg_fcp_io_channel) {
7878 phba->sli4_hba.fcp_cq = kcalloc(phba->cfg_fcp_io_channel,
7879 sizeof(struct lpfc_queue *),
7880 GFP_KERNEL);
7881 if (!phba->sli4_hba.fcp_cq) {
7882 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7883 "2577 Failed allocate memory for "
7884 "fast-path CQ record array\n");
7885 goto out_error;
7886 }
7887 phba->sli4_hba.fcp_wq = kcalloc(phba->cfg_fcp_io_channel,
7888 sizeof(struct lpfc_queue *),
7889 GFP_KERNEL);
7890 if (!phba->sli4_hba.fcp_wq) {
7891 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7892 "2578 Failed allocate memory for "
7893 "fast-path FCP WQ record array\n");
7894 goto out_error;
7895 }
7896 /*
7897 * Since the first EQ can have multiple CQs associated with it,
7898 * this array is used to quickly see if we have a FCP fast-path
7899 * CQ match.
7900 */
7901 phba->sli4_hba.fcp_cq_map = kcalloc(phba->cfg_fcp_io_channel,
7902 sizeof(uint16_t),
7903 GFP_KERNEL);
7904 if (!phba->sli4_hba.fcp_cq_map) {
7905 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7906 "2545 Failed allocate memory for "
7907 "fast-path CQ map\n");
7908 goto out_error;
7909 }
67d12733
JS		 7910 }
7911
895427bd
JS		 7912 if (phba->cfg_nvme_io_channel) {
7913 phba->sli4_hba.nvme_cq = kcalloc(phba->cfg_nvme_io_channel,
7914 sizeof(struct lpfc_queue *),
7915 GFP_KERNEL);
7916 if (!phba->sli4_hba.nvme_cq) {
7917 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7918 "6077 Failed allocate memory for "
7919 "fast-path CQ record array\n");
7920 goto out_error;
7921 }
da0436e9 7922
895427bd
JS		 7923 phba->sli4_hba.nvme_wq = kcalloc(phba->cfg_nvme_io_channel,
7924 sizeof(struct lpfc_queue *),
7925 GFP_KERNEL);
7926 if (!phba->sli4_hba.nvme_wq) {
7927 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7928 "2581 Failed allocate memory for "
7929 "fast-path NVME WQ record array\n");
7930 goto out_error;
7931 }
7932
7933 /*
7934 * Since the first EQ can have multiple CQs associated with it,
7935 * this array is used to quickly see if we have a NVME fast-path
7936 * CQ match.
7937 */
7938 phba->sli4_hba.nvme_cq_map = kcalloc(phba->cfg_nvme_io_channel,
7939 sizeof(uint16_t),
7940 GFP_KERNEL);
7941 if (!phba->sli4_hba.nvme_cq_map) {
7942 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7943 "6078 Failed allocate memory for "
7944 "fast-path CQ map\n");
7945 goto out_error;
7946 }
2d7dbc4c
JS		 7947
7948 if (phba->nvmet_support) {
7949 phba->sli4_hba.nvmet_cqset = kcalloc(
7950 phba->cfg_nvmet_mrq,
7951 sizeof(struct lpfc_queue *),
7952 GFP_KERNEL);
7953 if (!phba->sli4_hba.nvmet_cqset) {
7954 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7955 "3121 Fail allocate memory for "
7956 "fast-path CQ set array\n");
7957 goto out_error;
7958 }
7959 phba->sli4_hba.nvmet_mrq_hdr = kcalloc(
7960 phba->cfg_nvmet_mrq,
7961 sizeof(struct lpfc_queue *),
7962 GFP_KERNEL);
7963 if (!phba->sli4_hba.nvmet_mrq_hdr) {
7964 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7965 "3122 Fail allocate memory for "
7966 "fast-path RQ set hdr array\n");
7967 goto out_error;
7968 }
7969 phba->sli4_hba.nvmet_mrq_data = kcalloc(
7970 phba->cfg_nvmet_mrq,
7971 sizeof(struct lpfc_queue *),
7972 GFP_KERNEL);
7973 if (!phba->sli4_hba.nvmet_mrq_data) {
7974 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7975 "3124 Fail allocate memory for "
7976 "fast-path RQ set data array\n");
7977 goto out_error;
7978 }
7979 }
da0436e9 7980 }
67d12733 7981
895427bd 7982 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
67d12733 7983
895427bd
JS		 7984 /* Create HBA Event Queues (EQs) */
7985 for (idx = 0; idx < io_channel; idx++) {
67d12733 7986 /* Create EQs */
da0436e9
JS		 7987 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.eq_esize,
7988 phba->sli4_hba.eq_ecount);
7989 if (!qdesc) {
7990 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
67d12733
JS		 7991 "0497 Failed allocate EQ (%d)\n", idx);
7992 goto out_error;
da0436e9 7993 }
67d12733 7994 phba->sli4_hba.hba_eq[idx] = qdesc;
895427bd 7995 }
67d12733 7996
895427bd 7997 /* FCP and NVME io channels are not required to be balanced */
67d12733 7998
895427bd
JS		 7999 for (idx = 0; idx < phba->cfg_fcp_io_channel; idx++)
8000 if (lpfc_alloc_fcp_wq_cq(phba, idx))
67d12733 8001 goto out_error;
da0436e9 8002
895427bd
JS		 8003 for (idx = 0; idx < phba->cfg_nvme_io_channel; idx++)
8004 if (lpfc_alloc_nvme_wq_cq(phba, idx))
8005 goto out_error;
67d12733 8006
2d7dbc4c
JS		 8007 if (phba->nvmet_support) {
8008 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
8009 qdesc = lpfc_sli4_queue_alloc(phba,
8010 phba->sli4_hba.cq_esize,
8011 phba->sli4_hba.cq_ecount);
8012 if (!qdesc) {
8013 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8014 "3142 Failed allocate NVME "
8015 "CQ Set (%d)\n", idx);
8016 goto out_error;
8017 }
8018 phba->sli4_hba.nvmet_cqset[idx] = qdesc;
8019 }
8020 }
8021
da0436e9 8022 /*
67d12733 8023 * Create Slow Path Completion Queues (CQs)
da0436e9
JS		 8024 */
8025
da0436e9
JS		 8026 /* Create slow-path Mailbox Command Complete Queue */
8027 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
8028 phba->sli4_hba.cq_ecount);
8029 if (!qdesc) {
8030 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8031 "0500 Failed allocate slow-path mailbox CQ\n");
67d12733 8032 goto out_error;
da0436e9
JS		 8033 }
8034 phba->sli4_hba.mbx_cq = qdesc;
8035
8036 /* Create slow-path ELS Complete Queue */
8037 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
8038 phba->sli4_hba.cq_ecount);
8039 if (!qdesc) {
8040 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8041 "0501 Failed allocate slow-path ELS CQ\n");
67d12733 8042 goto out_error;
da0436e9
JS		 8043 }
8044 phba->sli4_hba.els_cq = qdesc;
8045
da0436e9 8046
5350d872 8047 /*
67d12733 8048 * Create Slow Path Work Queues (WQs)
5350d872 8049 */
da0436e9
JS		 8050
8051 /* Create Mailbox Command Queue */
da0436e9
JS		 8052
8053 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.mq_esize,
8054 phba->sli4_hba.mq_ecount);
8055 if (!qdesc) {
8056 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8057 "0505 Failed allocate slow-path MQ\n");
67d12733 8058 goto out_error;
da0436e9
JS		 8059 }
8060 phba->sli4_hba.mbx_wq = qdesc;
8061
8062 /*
67d12733 8063 * Create ELS Work Queues
da0436e9 8064 */
da0436e9
JS		 8065
8066 /* Create slow-path ELS Work Queue */
8067 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
8068 phba->sli4_hba.wq_ecount);
8069 if (!qdesc) {
8070 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8071 "0504 Failed allocate slow-path ELS WQ\n");
67d12733 8072 goto out_error;
da0436e9
JS		 8073 }
8074 phba->sli4_hba.els_wq = qdesc;
895427bd
JS		 8075 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8076
8077 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8078 /* Create NVME LS Complete Queue */
8079 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
8080 phba->sli4_hba.cq_ecount);
8081 if (!qdesc) {
8082 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8083 "6079 Failed allocate NVME LS CQ\n");
8084 goto out_error;
8085 }
8086 phba->sli4_hba.nvmels_cq = qdesc;
8087
8088 /* Create NVME LS Work Queue */
8089 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
8090 phba->sli4_hba.wq_ecount);
8091 if (!qdesc) {
8092 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8093 "6080 Failed allocate NVME LS WQ\n");
8094 goto out_error;
8095 }
8096 phba->sli4_hba.nvmels_wq = qdesc;
8097 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8098 }
da0436e9 8099
da0436e9
JS		 8100 /*
8101 * Create Receive Queue (RQ)
8102 */
da0436e9
JS		 8103
8104 /* Create Receive Queue for header */
8105 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.rq_esize,
8106 phba->sli4_hba.rq_ecount);
8107 if (!qdesc) {
8108 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8109 "0506 Failed allocate receive HRQ\n");
67d12733 8110 goto out_error;
da0436e9
JS		 8111 }
8112 phba->sli4_hba.hdr_rq = qdesc;
8113
8114 /* Create Receive Queue for data */
8115 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.rq_esize,
8116 phba->sli4_hba.rq_ecount);
8117 if (!qdesc) {
8118 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8119 "0507 Failed allocate receive DRQ\n");
67d12733 8120 goto out_error;
da0436e9
JS		 8121 }
8122 phba->sli4_hba.dat_rq = qdesc;
8123
2d7dbc4c
JS		 8124 if (phba->nvmet_support) {
8125 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
8126 /* Create NVMET Receive Queue for header */
8127 qdesc = lpfc_sli4_queue_alloc(phba,
8128 phba->sli4_hba.rq_esize,
8129 phba->sli4_hba.rq_ecount);
8130 if (!qdesc) {
8131 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8132 "3146 Failed allocate "
8133 "receive HRQ\n");
8134 goto out_error;
8135 }
8136 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc;
8137
8138 /* Only needed for header of RQ pair */
8139 qdesc->rqbp = kzalloc(sizeof(struct lpfc_rqb),
8140 GFP_KERNEL);
8141 if (qdesc->rqbp == NULL) {
8142 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8143 "6131 Failed allocate "
8144 "Header RQBP\n");
8145 goto out_error;
8146 }
8147
8148 /* Create NVMET Receive Queue for data */
8149 qdesc = lpfc_sli4_queue_alloc(phba,
8150 phba->sli4_hba.rq_esize,
8151 phba->sli4_hba.rq_ecount);
8152 if (!qdesc) {
8153 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8154 "3156 Failed allocate "
8155 "receive DRQ\n");
8156 goto out_error;
8157 }
8158 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc;
8159 }
8160 }
8161
1ba981fd
JS		 8162 /* Create the Queues needed for Flash Optimized Fabric operations */
8163 if (phba->cfg_fof)
8164 lpfc_fof_queue_create(phba);
da0436e9
JS		 8165 return 0;
8166
da0436e9 8167out_error:
67d12733 8168 lpfc_sli4_queue_destroy(phba);
da0436e9
JS		 8169 return -ENOMEM;
8170}
8171
895427bd
JS		 8172static inline void
8173__lpfc_sli4_release_queue(struct lpfc_queue **qp)
8174{
8175 if (*qp != NULL) {
8176 lpfc_sli4_queue_free(*qp);
8177 *qp = NULL;
8178 }
8179}
8180
8181static inline void
8182lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max)
8183{
8184 int idx;
8185
8186 if (*qs == NULL)
8187 return;
8188
8189 for (idx = 0; idx < max; idx++)
8190 __lpfc_sli4_release_queue(&(*qs)[idx]);
8191
8192 kfree(*qs);
8193 *qs = NULL;
8194}
8195
8196static inline void
8197lpfc_sli4_release_queue_map(uint16_t **qmap)
8198{
8199 if (*qmap != NULL) {
8200 kfree(*qmap);
8201 *qmap = NULL;
8202 }
8203}
8204
da0436e9
JS		 8205/**
8206 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues
8207 * @phba: pointer to lpfc hba data structure.
8208 *
8209 * This routine is invoked to release all the SLI4 queues with the FCoE HBA
8210 * operation.
8211 *
8212 * Return codes
af901ca1 8213 * 0 - successful
25985edc 8214 * -ENOMEM - No available memory
d439d286 8215 * -EIO - The mailbox failed to complete successfully.
da0436e9 8216 **/
5350d872 8217void
da0436e9
JS		 8218lpfc_sli4_queue_destroy(struct lpfc_hba *phba)
8219{
1ba981fd
JS		 8220 if (phba->cfg_fof)
8221 lpfc_fof_queue_destroy(phba);
8222
895427bd
JS		 8223 /* Release HBA eqs */
8224 lpfc_sli4_release_queues(&phba->sli4_hba.hba_eq, phba->io_channel_irqs);
8225
8226 /* Release FCP cqs */
8227 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_cq,
d1f525aa 8228 phba->cfg_fcp_io_channel);
895427bd
JS		 8229
8230 /* Release FCP wqs */
8231 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_wq,
d1f525aa 8232 phba->cfg_fcp_io_channel);
895427bd
JS		 8233
8234 /* Release FCP CQ mapping array */
8235 lpfc_sli4_release_queue_map(&phba->sli4_hba.fcp_cq_map);
8236
8237 /* Release NVME cqs */
8238 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_cq,
8239 phba->cfg_nvme_io_channel);
8240
8241 /* Release NVME wqs */
8242 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_wq,
8243 phba->cfg_nvme_io_channel);
8244
8245 /* Release NVME CQ mapping array */
8246 lpfc_sli4_release_queue_map(&phba->sli4_hba.nvme_cq_map);
8247
2d7dbc4c
JS		 8248 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset,
8249 phba->cfg_nvmet_mrq);
8250
8251 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr,
8252 phba->cfg_nvmet_mrq);
8253 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data,
8254 phba->cfg_nvmet_mrq);
8255
895427bd
JS		 8256 /* Release mailbox command work queue */
8257 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq);
8258
8259 /* Release ELS work queue */
8260 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq);
8261
8262 /* Release ELS work queue */
8263 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq);
8264
8265 /* Release unsolicited receive queue */
8266 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq);
8267 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq);
8268
8269 /* Release ELS complete queue */
8270 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq);
8271
8272 /* Release NVME LS complete queue */
8273 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq);
8274
8275 /* Release mailbox command complete queue */
8276 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq);
8277
8278 /* Everything on this list has been freed */
8279 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
8280}
8281
8282int
8283lpfc_post_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *hrq,
8284 struct lpfc_queue *drq, int count)
8285{
8286 int rc, i;
8287 struct lpfc_rqe hrqe;
8288 struct lpfc_rqe drqe;
8289 struct lpfc_rqb *rqbp;
8290 struct rqb_dmabuf *rqb_buffer;
8291 LIST_HEAD(rqb_buf_list);
8292
8293 rqbp = hrq->rqbp;
8294 for (i = 0; i < count; i++) {
8295 rqb_buffer = (rqbp->rqb_alloc_buffer)(phba);
8296 if (!rqb_buffer)
8297 break;
8298 rqb_buffer->hrq = hrq;
8299 rqb_buffer->drq = drq;
8300 list_add_tail(&rqb_buffer->hbuf.list, &rqb_buf_list);
8301 }
8302 while (!list_empty(&rqb_buf_list)) {
8303 list_remove_head(&rqb_buf_list, rqb_buffer, struct rqb_dmabuf,
8304 hbuf.list);
8305
8306 hrqe.address_lo = putPaddrLow(rqb_buffer->hbuf.phys);
8307 hrqe.address_hi = putPaddrHigh(rqb_buffer->hbuf.phys);
8308 drqe.address_lo = putPaddrLow(rqb_buffer->dbuf.phys);
8309 drqe.address_hi = putPaddrHigh(rqb_buffer->dbuf.phys);
8310 rc = lpfc_sli4_rq_put(hrq, drq, &hrqe, &drqe);
8311 if (rc < 0) {
8312 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
8313 } else {
8314 list_add_tail(&rqb_buffer->hbuf.list,
8315 &rqbp->rqb_buffer_list);
8316 rqbp->buffer_count++;
67d12733 8317 }
67d12733 8318 }
895427bd
JS		 8319 return 1;
8320}
67d12733 8321
895427bd
JS		 8322int
8323lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq)
8324{
8325 struct lpfc_rqb *rqbp;
8326 struct lpfc_dmabuf *h_buf;
8327 struct rqb_dmabuf *rqb_buffer;
8328
8329 rqbp = rq->rqbp;
8330 while (!list_empty(&rqbp->rqb_buffer_list)) {
8331 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
8332 struct lpfc_dmabuf, list);
8333
8334 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf);
8335 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
8336 rqbp->buffer_count--;
67d12733 8337 }
895427bd
JS		 8338 return 1;
8339}
67d12733 8340
895427bd
JS		 8341static int
8342lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq,
8343 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map,
8344 int qidx, uint32_t qtype)
8345{
8346 struct lpfc_sli_ring *pring;
8347 int rc;
8348
8349 if (!eq || !cq || !wq) {
8350 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8351 "6085 Fast-path %s (%d) not allocated\n",
8352 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx);
8353 return -ENOMEM;
8354 }
8355
8356 /* create the Cq first */
8357 rc = lpfc_cq_create(phba, cq, eq,
8358 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype);
8359 if (rc) {
8360 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8361 "6086 Failed setup of CQ (%d), rc = 0x%x\n",
8362 qidx, (uint32_t)rc);
8363 return rc;
67d12733
JS		 8364 }
8365
895427bd
JS		 8366 if (qtype != LPFC_MBOX) {
8367 /* Setup nvme_cq_map for fast lookup */
8368 if (cq_map)
8369 *cq_map = cq->queue_id;
da0436e9 8370
895427bd
JS		 8371 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8372 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n",
8373 qidx, cq->queue_id, qidx, eq->queue_id);
da0436e9 8374
895427bd
JS		 8375 /* create the wq */
8376 rc = lpfc_wq_create(phba, wq, cq, qtype);
8377 if (rc) {
8378 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8379 "6123 Fail setup fastpath WQ (%d), rc = 0x%x\n",
8380 qidx, (uint32_t)rc);
8381 /* no need to tear down cq - caller will do so */
8382 return rc;
8383 }
da0436e9 8384
895427bd
JS		 8385 /* Bind this CQ/WQ to the NVME ring */
8386 pring = wq->pring;
8387 pring->sli.sli4.wqp = (void *)wq;
8388 cq->pring = pring;
da0436e9 8389
895427bd
JS		 8390 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8391 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n",
8392 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id);
8393 } else {
8394 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX);
8395 if (rc) {
8396 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8397 "0539 Failed setup of slow-path MQ: "
8398 "rc = 0x%x\n", rc);
8399 /* no need to tear down cq - caller will do so */
8400 return rc;
8401 }
da0436e9 8402
895427bd
JS		 8403 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8404 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n",
8405 phba->sli4_hba.mbx_wq->queue_id,
8406 phba->sli4_hba.mbx_cq->queue_id);
67d12733 8407 }
da0436e9 8408
895427bd 8409 return 0;
da0436e9
JS		 8410}
8411
8412/**
8413 * lpfc_sli4_queue_setup - Set up all the SLI4 queues
8414 * @phba: pointer to lpfc hba data structure.
8415 *
8416 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA
8417 * operation.
8418 *
8419 * Return codes
af901ca1 8420 * 0 - successful
25985edc 8421 * -ENOMEM - No available memory
d439d286 8422 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS		 8423 **/
8424int
8425lpfc_sli4_queue_setup(struct lpfc_hba *phba)
8426{
962bc51b
JS		 8427 uint32_t shdr_status, shdr_add_status;
8428 union lpfc_sli4_cfg_shdr *shdr;
8429 LPFC_MBOXQ_t *mboxq;
895427bd
JS		 8430 int qidx;
8431 uint32_t length, io_channel;
8432 int rc = -ENOMEM;
962bc51b
JS		 8433
8434 /* Check for dual-ULP support */
8435 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
8436 if (!mboxq) {
8437 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8438 "3249 Unable to allocate memory for "
8439 "QUERY_FW_CFG mailbox command\n");
8440 return -ENOMEM;
8441 }
8442 length = (sizeof(struct lpfc_mbx_query_fw_config) -
8443 sizeof(struct lpfc_sli4_cfg_mhdr));
8444 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
8445 LPFC_MBOX_OPCODE_QUERY_FW_CFG,
8446 length, LPFC_SLI4_MBX_EMBED);
8447
8448 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
8449
8450 shdr = (union lpfc_sli4_cfg_shdr *)
8451 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
8452 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
8453 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8454 if (shdr_status || shdr_add_status || rc) {
8455 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8456 "3250 QUERY_FW_CFG mailbox failed with status "
8457 "x%x add_status x%x, mbx status x%x\n",
8458 shdr_status, shdr_add_status, rc);
8459 if (rc != MBX_TIMEOUT)
8460 mempool_free(mboxq, phba->mbox_mem_pool);
8461 rc = -ENXIO;
8462 goto out_error;
8463 }
8464
8465 phba->sli4_hba.fw_func_mode =
8466 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode;
8467 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode;
8468 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode;
8b017a30
JS		 8469 phba->sli4_hba.physical_port =
8470 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port;
962bc51b
JS		 8471 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8472 "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, "
8473 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode,
8474 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode);
8475
8476 if (rc != MBX_TIMEOUT)
8477 mempool_free(mboxq, phba->mbox_mem_pool);
da0436e9
JS		 8478
8479 /*
67d12733 8480 * Set up HBA Event Queues (EQs)
da0436e9 8481 */
895427bd 8482 io_channel = phba->io_channel_irqs;
da0436e9 8483
67d12733 8484 /* Set up HBA event queue */
895427bd 8485 if (io_channel && !phba->sli4_hba.hba_eq) {
2e90f4b5
JS		 8486 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8487 "3147 Fast-path EQs not allocated\n");
1b51197d 8488 rc = -ENOMEM;
67d12733 8489 goto out_error;
2e90f4b5 8490 }
895427bd
JS		 8491 for (qidx = 0; qidx < io_channel; qidx++) {
8492 if (!phba->sli4_hba.hba_eq[qidx]) {
da0436e9
JS		 8493 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8494 "0522 Fast-path EQ (%d) not "
895427bd 8495 "allocated\n", qidx);
1b51197d 8496 rc = -ENOMEM;
895427bd 8497 goto out_destroy;
da0436e9 8498 }
895427bd
JS		 8499 rc = lpfc_eq_create(phba, phba->sli4_hba.hba_eq[qidx],
8500 phba->cfg_fcp_imax);
da0436e9
JS		 8501 if (rc) {
8502 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8503 "0523 Failed setup of fast-path EQ "
895427bd 8504 "(%d), rc = 0x%x\n", qidx,
a2fc4aef 8505 (uint32_t)rc);
895427bd 8506 goto out_destroy;
da0436e9
JS		 8507 }
8508 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
895427bd
JS		 8509 "2584 HBA EQ setup: queue[%d]-id=%d\n",
8510 qidx, phba->sli4_hba.hba_eq[qidx]->queue_id);
67d12733
JS		 8511 }
8512
895427bd
JS		 8513 if (phba->cfg_nvme_io_channel) {
8514 if (!phba->sli4_hba.nvme_cq || !phba->sli4_hba.nvme_wq) {
67d12733 8515 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8516 "6084 Fast-path NVME %s array not allocated\n",
8517 (phba->sli4_hba.nvme_cq) ? "CQ" : "WQ");
67d12733 8518 rc = -ENOMEM;
895427bd 8519 goto out_destroy;
67d12733
JS		 8520 }
8521
895427bd
JS		 8522 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++) {
8523 rc = lpfc_create_wq_cq(phba,
8524 phba->sli4_hba.hba_eq[
8525 qidx % io_channel],
8526 phba->sli4_hba.nvme_cq[qidx],
8527 phba->sli4_hba.nvme_wq[qidx],
8528 &phba->sli4_hba.nvme_cq_map[qidx],
8529 qidx, LPFC_NVME);
8530 if (rc) {
8531 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8532 "6123 Failed to setup fastpath "
8533 "NVME WQ/CQ (%d), rc = 0x%x\n",
8534 qidx, (uint32_t)rc);
8535 goto out_destroy;
8536 }
8537 }
67d12733
JS		 8538 }
8539
895427bd
JS		 8540 if (phba->cfg_fcp_io_channel) {
8541 /* Set up fast-path FCP Response Complete Queue */
8542 if (!phba->sli4_hba.fcp_cq || !phba->sli4_hba.fcp_wq) {
67d12733 8543 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8544 "3148 Fast-path FCP %s array not allocated\n",
8545 phba->sli4_hba.fcp_cq ? "WQ" : "CQ");
67d12733 8546 rc = -ENOMEM;
895427bd 8547 goto out_destroy;
67d12733
JS		 8548 }
8549
895427bd
JS		 8550 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++) {
8551 rc = lpfc_create_wq_cq(phba,
8552 phba->sli4_hba.hba_eq[
8553 qidx % io_channel],
8554 phba->sli4_hba.fcp_cq[qidx],
8555 phba->sli4_hba.fcp_wq[qidx],
8556 &phba->sli4_hba.fcp_cq_map[qidx],
8557 qidx, LPFC_FCP);
8558 if (rc) {
8559 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8560 "0535 Failed to setup fastpath "
8561 "FCP WQ/CQ (%d), rc = 0x%x\n",
8562 qidx, (uint32_t)rc);
8563 goto out_destroy;
8564 }
8565 }
67d12733 8566 }
895427bd 8567
da0436e9 8568 /*
895427bd 8569 * Set up Slow Path Complete Queues (CQs)
da0436e9
JS		 8570 */
8571
895427bd 8572 /* Set up slow-path MBOX CQ/MQ */
da0436e9 8573
895427bd 8574 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) {
da0436e9 8575 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8576 "0528 %s not allocated\n",
8577 phba->sli4_hba.mbx_cq ?
d1f525aa 8578 "Mailbox WQ" : "Mailbox CQ");
1b51197d 8579 rc = -ENOMEM;
895427bd 8580 goto out_destroy;
da0436e9 8581 }
da0436e9 8582
895427bd 8583 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
d1f525aa
JS		 8584 phba->sli4_hba.mbx_cq,
8585 phba->sli4_hba.mbx_wq,
8586 NULL, 0, LPFC_MBOX);
da0436e9
JS		 8587 if (rc) {
8588 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8589 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n",
8590 (uint32_t)rc);
8591 goto out_destroy;
da0436e9 8592 }
2d7dbc4c
JS		 8593 if (phba->nvmet_support) {
8594 if (!phba->sli4_hba.nvmet_cqset) {
8595 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8596 "3165 Fast-path NVME CQ Set "
8597 "array not allocated\n");
8598 rc = -ENOMEM;
8599 goto out_destroy;
8600 }
8601 if (phba->cfg_nvmet_mrq > 1) {
8602 rc = lpfc_cq_create_set(phba,
8603 phba->sli4_hba.nvmet_cqset,
8604 phba->sli4_hba.hba_eq,
8605 LPFC_WCQ, LPFC_NVMET);
8606 if (rc) {
8607 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8608 "3164 Failed setup of NVME CQ "
8609 "Set, rc = 0x%x\n",
8610 (uint32_t)rc);
8611 goto out_destroy;
8612 }
8613 } else {
8614 /* Set up NVMET Receive Complete Queue */
8615 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0],
8616 phba->sli4_hba.hba_eq[0],
8617 LPFC_WCQ, LPFC_NVMET);
8618 if (rc) {
8619 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8620 "6089 Failed setup NVMET CQ: "
8621 "rc = 0x%x\n", (uint32_t)rc);
8622 goto out_destroy;
8623 }
8624 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8625 "6090 NVMET CQ setup: cq-id=%d, "
8626 "parent eq-id=%d\n",
8627 phba->sli4_hba.nvmet_cqset[0]->queue_id,
8628 phba->sli4_hba.hba_eq[0]->queue_id);
8629 }
8630 }
da0436e9 8631
895427bd
JS		 8632 /* Set up slow-path ELS WQ/CQ */
8633 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) {
da0436e9 8634 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8635 "0530 ELS %s not allocated\n",
8636 phba->sli4_hba.els_cq ? "WQ" : "CQ");
1b51197d 8637 rc = -ENOMEM;
895427bd 8638 goto out_destroy;
da0436e9 8639 }
895427bd
JS		 8640 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8641 phba->sli4_hba.els_cq,
8642 phba->sli4_hba.els_wq,
8643 NULL, 0, LPFC_ELS);
da0436e9
JS		 8644 if (rc) {
8645 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8646 "0529 Failed setup of ELS WQ/CQ: rc = 0x%x\n",
8647 (uint32_t)rc);
8648 goto out_destroy;
da0436e9
JS		 8649 }
8650 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8651 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n",
8652 phba->sli4_hba.els_wq->queue_id,
8653 phba->sli4_hba.els_cq->queue_id);
8654
895427bd
JS		 8655 if (phba->cfg_nvme_io_channel) {
8656 /* Set up NVME LS Complete Queue */
8657 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) {
8658 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8659 "6091 LS %s not allocated\n",
8660 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ");
8661 rc = -ENOMEM;
8662 goto out_destroy;
8663 }
8664 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8665 phba->sli4_hba.nvmels_cq,
8666 phba->sli4_hba.nvmels_wq,
8667 NULL, 0, LPFC_NVME_LS);
8668 if (rc) {
8669 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8670 "0529 Failed setup of NVVME LS WQ/CQ: "
8671 "rc = 0x%x\n", (uint32_t)rc);
8672 goto out_destroy;
8673 }
8674
8675 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8676 "6096 ELS WQ setup: wq-id=%d, "
8677 "parent cq-id=%d\n",
8678 phba->sli4_hba.nvmels_wq->queue_id,
8679 phba->sli4_hba.nvmels_cq->queue_id);
8680 }
8681
2d7dbc4c
JS		 8682 /*
8683 * Create NVMET Receive Queue (RQ)
8684 */
8685 if (phba->nvmet_support) {
8686 if ((!phba->sli4_hba.nvmet_cqset) ||
8687 (!phba->sli4_hba.nvmet_mrq_hdr) ||
8688 (!phba->sli4_hba.nvmet_mrq_data)) {
8689 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8690 "6130 MRQ CQ Queues not "
8691 "allocated\n");
8692 rc = -ENOMEM;
8693 goto out_destroy;
8694 }
8695 if (phba->cfg_nvmet_mrq > 1) {
8696 rc = lpfc_mrq_create(phba,
8697 phba->sli4_hba.nvmet_mrq_hdr,
8698 phba->sli4_hba.nvmet_mrq_data,
8699 phba->sli4_hba.nvmet_cqset,
8700 LPFC_NVMET);
8701 if (rc) {
8702 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8703 "6098 Failed setup of NVMET "
8704 "MRQ: rc = 0x%x\n",
8705 (uint32_t)rc);
8706 goto out_destroy;
8707 }
8708
8709 } else {
8710 rc = lpfc_rq_create(phba,
8711 phba->sli4_hba.nvmet_mrq_hdr[0],
8712 phba->sli4_hba.nvmet_mrq_data[0],
8713 phba->sli4_hba.nvmet_cqset[0],
8714 LPFC_NVMET);
8715 if (rc) {
8716 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8717 "6057 Failed setup of NVMET "
8718 "Receive Queue: rc = 0x%x\n",
8719 (uint32_t)rc);
8720 goto out_destroy;
8721 }
8722
8723 lpfc_printf_log(
8724 phba, KERN_INFO, LOG_INIT,
8725 "6099 NVMET RQ setup: hdr-rq-id=%d, "
8726 "dat-rq-id=%d parent cq-id=%d\n",
8727 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id,
8728 phba->sli4_hba.nvmet_mrq_data[0]->queue_id,
8729 phba->sli4_hba.nvmet_cqset[0]->queue_id);
8730
8731 }
8732 }
8733
da0436e9
JS		 8734 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
8735 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8736 "0540 Receive Queue not allocated\n");
1b51197d 8737 rc = -ENOMEM;
895427bd 8738 goto out_destroy;
da0436e9 8739 }
73d91e50
JS		 8740
8741 lpfc_rq_adjust_repost(phba, phba->sli4_hba.hdr_rq, LPFC_ELS_HBQ);
8742 lpfc_rq_adjust_repost(phba, phba->sli4_hba.dat_rq, LPFC_ELS_HBQ);
8743
da0436e9 8744 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
4d9ab994 8745 phba->sli4_hba.els_cq, LPFC_USOL);
da0436e9
JS		 8746 if (rc) {
8747 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8748 "0541 Failed setup of Receive Queue: "
a2fc4aef 8749 "rc = 0x%x\n", (uint32_t)rc);
895427bd 8750 goto out_destroy;
da0436e9 8751 }
73d91e50 8752
da0436e9
JS		 8753 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8754 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d "
8755 "parent cq-id=%d\n",
8756 phba->sli4_hba.hdr_rq->queue_id,
8757 phba->sli4_hba.dat_rq->queue_id,
4d9ab994 8758 phba->sli4_hba.els_cq->queue_id);
1ba981fd
JS		 8759
8760 if (phba->cfg_fof) {
8761 rc = lpfc_fof_queue_setup(phba);
8762 if (rc) {
8763 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8764 "0549 Failed setup of FOF Queues: "
8765 "rc = 0x%x\n", rc);
895427bd 8766 goto out_destroy;
1ba981fd
JS		 8767 }
8768 }
2c9c5a00 8769
43140ca6 8770 for (qidx = 0; qidx < io_channel; qidx += LPFC_MAX_EQ_DELAY_EQID_CNT)
895427bd 8771 lpfc_modify_hba_eq_delay(phba, qidx);
43140ca6 8772
da0436e9
JS		 8773 return 0;
8774
895427bd
JS		 8775out_destroy:
8776 lpfc_sli4_queue_unset(phba);
da0436e9
JS		 8777out_error:
8778 return rc;
8779}
8780
8781/**
8782 * lpfc_sli4_queue_unset - Unset all the SLI4 queues
8783 * @phba: pointer to lpfc hba data structure.
8784 *
8785 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA
8786 * operation.
8787 *
8788 * Return codes
af901ca1 8789 * 0 - successful
25985edc 8790 * -ENOMEM - No available memory
d439d286 8791 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS		 8792 **/
8793void
8794lpfc_sli4_queue_unset(struct lpfc_hba *phba)
8795{
895427bd 8796 int qidx;
da0436e9 8797
1ba981fd
JS		 8798 /* Unset the queues created for Flash Optimized Fabric operations */
8799 if (phba->cfg_fof)
8800 lpfc_fof_queue_destroy(phba);
895427bd 8801
da0436e9 8802 /* Unset mailbox command work queue */
895427bd
JS		 8803 if (phba->sli4_hba.mbx_wq)
8804 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
8805
8806 /* Unset NVME LS work queue */
8807 if (phba->sli4_hba.nvmels_wq)
8808 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq);
8809
da0436e9 8810 /* Unset ELS work queue */
895427bd
JS		 8811 if (phba->sli4_hba.els_cq)
8812 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
8813
da0436e9 8814 /* Unset unsolicited receive queue */
895427bd
JS		 8815 if (phba->sli4_hba.hdr_rq)
8816 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq,
8817 phba->sli4_hba.dat_rq);
8818
da0436e9 8819 /* Unset FCP work queue */
895427bd
JS		 8820 if (phba->sli4_hba.fcp_wq)
8821 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
8822 lpfc_wq_destroy(phba, phba->sli4_hba.fcp_wq[qidx]);
8823
8824 /* Unset NVME work queue */
8825 if (phba->sli4_hba.nvme_wq) {
8826 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
8827 lpfc_wq_destroy(phba, phba->sli4_hba.nvme_wq[qidx]);
67d12733 8828 }
895427bd 8829
da0436e9 8830 /* Unset mailbox command complete queue */
895427bd
JS		 8831 if (phba->sli4_hba.mbx_cq)
8832 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
8833
da0436e9 8834 /* Unset ELS complete queue */
895427bd
JS		 8835 if (phba->sli4_hba.els_cq)
8836 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
8837
8838 /* Unset NVME LS complete queue */
8839 if (phba->sli4_hba.nvmels_cq)
8840 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq);
8841
8842 /* Unset NVME response complete queue */
8843 if (phba->sli4_hba.nvme_cq)
8844 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
8845 lpfc_cq_destroy(phba, phba->sli4_hba.nvme_cq[qidx]);
8846
2d7dbc4c
JS		 8847 /* Unset NVMET MRQ queue */
8848 if (phba->sli4_hba.nvmet_mrq_hdr) {
8849 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
8850 lpfc_rq_destroy(phba,
8851 phba->sli4_hba.nvmet_mrq_hdr[qidx],
8852 phba->sli4_hba.nvmet_mrq_data[qidx]);
8853 }
8854
8855 /* Unset NVMET CQ Set complete queue */
8856 if (phba->sli4_hba.nvmet_cqset) {
8857 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
8858 lpfc_cq_destroy(phba,
8859 phba->sli4_hba.nvmet_cqset[qidx]);
8860 }
8861
da0436e9 8862 /* Unset FCP response complete queue */
895427bd
JS		 8863 if (phba->sli4_hba.fcp_cq)
8864 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
8865 lpfc_cq_destroy(phba, phba->sli4_hba.fcp_cq[qidx]);
8866
da0436e9 8867 /* Unset fast-path event queue */
895427bd
JS		 8868 if (phba->sli4_hba.hba_eq)
8869 for (qidx = 0; qidx < phba->io_channel_irqs; qidx++)
8870 lpfc_eq_destroy(phba, phba->sli4_hba.hba_eq[qidx]);
da0436e9
JS		 8871}
8872
8873/**
8874 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool
8875 * @phba: pointer to lpfc hba data structure.
8876 *
8877 * This routine is invoked to allocate and set up a pool of completion queue
8878 * events. The body of the completion queue event is a completion queue entry
8879 * CQE. For now, this pool is used for the interrupt service routine to queue
8880 * the following HBA completion queue events for the worker thread to process:
8881 * - Mailbox asynchronous events
8882 * - Receive queue completion unsolicited events
8883 * Later, this can be used for all the slow-path events.
8884 *
8885 * Return codes
af901ca1 8886 * 0 - successful
25985edc 8887 * -ENOMEM - No available memory
da0436e9
JS		 8888 **/
8889static int
8890lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba)
8891{
8892 struct lpfc_cq_event *cq_event;
8893 int i;
8894
8895 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
8896 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL);
8897 if (!cq_event)
8898 goto out_pool_create_fail;
8899 list_add_tail(&cq_event->list,
8900 &phba->sli4_hba.sp_cqe_event_pool);
8901 }
8902 return 0;
8903
8904out_pool_create_fail:
8905 lpfc_sli4_cq_event_pool_destroy(phba);
8906 return -ENOMEM;
8907}
8908
8909/**
8910 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool
8911 * @phba: pointer to lpfc hba data structure.
8912 *
8913 * This routine is invoked to free the pool of completion queue events at
8914 * driver unload time. Note that, it is the responsibility of the driver
8915 * cleanup routine to free all the outstanding completion-queue events
8916 * allocated from this pool back into the pool before invoking this routine
8917 * to destroy the pool.
8918 **/
8919static void
8920lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba)
8921{
8922 struct lpfc_cq_event *cq_event, *next_cq_event;
8923
8924 list_for_each_entry_safe(cq_event, next_cq_event,
8925 &phba->sli4_hba.sp_cqe_event_pool, list) {
8926 list_del(&cq_event->list);
8927 kfree(cq_event);
8928 }
8929}
8930
8931/**
8932 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
8933 * @phba: pointer to lpfc hba data structure.
8934 *
8935 * This routine is the lock free version of the API invoked to allocate a
8936 * completion-queue event from the free pool.
8937 *
8938 * Return: Pointer to the newly allocated completion-queue event if successful
8939 * NULL otherwise.
8940 **/
8941struct lpfc_cq_event *
8942__lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
8943{
8944 struct lpfc_cq_event *cq_event = NULL;
8945
8946 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
8947 struct lpfc_cq_event, list);
8948 return cq_event;
8949}
8950
8951/**
8952 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
8953 * @phba: pointer to lpfc hba data structure.
8954 *
8955 * This routine is the lock version of the API invoked to allocate a
8956 * completion-queue event from the free pool.
8957 *
8958 * Return: Pointer to the newly allocated completion-queue event if successful
8959 * NULL otherwise.
8960 **/
8961struct lpfc_cq_event *
8962lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
8963{
8964 struct lpfc_cq_event *cq_event;
8965 unsigned long iflags;
8966
8967 spin_lock_irqsave(&phba->hbalock, iflags);
8968 cq_event = __lpfc_sli4_cq_event_alloc(phba);
8969 spin_unlock_irqrestore(&phba->hbalock, iflags);
8970 return cq_event;
8971}
8972
8973/**
8974 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
8975 * @phba: pointer to lpfc hba data structure.
8976 * @cq_event: pointer to the completion queue event to be freed.
8977 *
8978 * This routine is the lock free version of the API invoked to release a
8979 * completion-queue event back into the free pool.
8980 **/
8981void
8982__lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
8983 struct lpfc_cq_event *cq_event)
8984{
8985 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
8986}
8987
8988/**
8989 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
8990 * @phba: pointer to lpfc hba data structure.
8991 * @cq_event: pointer to the completion queue event to be freed.
8992 *
8993 * This routine is the lock version of the API invoked to release a
8994 * completion-queue event back into the free pool.
8995 **/
8996void
8997lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
8998 struct lpfc_cq_event *cq_event)
8999{
9000 unsigned long iflags;
9001 spin_lock_irqsave(&phba->hbalock, iflags);
9002 __lpfc_sli4_cq_event_release(phba, cq_event);
9003 spin_unlock_irqrestore(&phba->hbalock, iflags);
9004}
9005
9006/**
9007 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool
9008 * @phba: pointer to lpfc hba data structure.
9009 *
9010 * This routine is to free all the pending completion-queue events to the
9011 * back into the free pool for device reset.
9012 **/
9013static void
9014lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba)
9015{
9016 LIST_HEAD(cqelist);
9017 struct lpfc_cq_event *cqe;
9018 unsigned long iflags;
9019
9020 /* Retrieve all the pending WCQEs from pending WCQE lists */
9021 spin_lock_irqsave(&phba->hbalock, iflags);
9022 /* Pending FCP XRI abort events */
9023 list_splice_init(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue,
9024 &cqelist);
9025 /* Pending ELS XRI abort events */
9026 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
9027 &cqelist);
318083ad
JS		 9028 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
9029 /* Pending NVME XRI abort events */
9030 list_splice_init(&phba->sli4_hba.sp_nvme_xri_aborted_work_queue,
9031 &cqelist);
9032 }
da0436e9
JS		 9033 /* Pending asynnc events */
9034 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
9035 &cqelist);
9036 spin_unlock_irqrestore(&phba->hbalock, iflags);
9037
9038 while (!list_empty(&cqelist)) {
9039 list_remove_head(&cqelist, cqe, struct lpfc_cq_event, list);
9040 lpfc_sli4_cq_event_release(phba, cqe);
9041 }
9042}
9043
9044/**
9045 * lpfc_pci_function_reset - Reset pci function.
9046 * @phba: pointer to lpfc hba data structure.
9047 *
9048 * This routine is invoked to request a PCI function reset. It will destroys
9049 * all resources assigned to the PCI function which originates this request.
9050 *
9051 * Return codes
af901ca1 9052 * 0 - successful
25985edc 9053 * -ENOMEM - No available memory
d439d286 9054 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS		 9055 **/
9056int
9057lpfc_pci_function_reset(struct lpfc_hba *phba)
9058{
9059 LPFC_MBOXQ_t *mboxq;
2fcee4bf 9060 uint32_t rc = 0, if_type;
da0436e9 9061 uint32_t shdr_status, shdr_add_status;
2f6fa2c9
JS		 9062 uint32_t rdy_chk;
9063 uint32_t port_reset = 0;
da0436e9 9064 union lpfc_sli4_cfg_shdr *shdr;
2fcee4bf 9065 struct lpfc_register reg_data;
2b81f942 9066 uint16_t devid;
da0436e9 9067
2fcee4bf
JS		 9068 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9069 switch (if_type) {
9070 case LPFC_SLI_INTF_IF_TYPE_0:
9071 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
9072 GFP_KERNEL);
9073 if (!mboxq) {
9074 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9075 "0494 Unable to allocate memory for "
9076 "issuing SLI_FUNCTION_RESET mailbox "
9077 "command\n");
9078 return -ENOMEM;
9079 }
da0436e9 9080
2fcee4bf
JS		 9081 /* Setup PCI function reset mailbox-ioctl command */
9082 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
9083 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0,
9084 LPFC_SLI4_MBX_EMBED);
9085 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
9086 shdr = (union lpfc_sli4_cfg_shdr *)
9087 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
9088 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
9089 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
9090 &shdr->response);
9091 if (rc != MBX_TIMEOUT)
9092 mempool_free(mboxq, phba->mbox_mem_pool);
9093 if (shdr_status || shdr_add_status || rc) {
9094 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9095 "0495 SLI_FUNCTION_RESET mailbox "
9096 "failed with status x%x add_status x%x,"
9097 " mbx status x%x\n",
9098 shdr_status, shdr_add_status, rc);
9099 rc = -ENXIO;
9100 }
9101 break;
9102 case LPFC_SLI_INTF_IF_TYPE_2:
2f6fa2c9
JS		 9103wait:
9104 /*
9105 * Poll the Port Status Register and wait for RDY for
9106 * up to 30 seconds. If the port doesn't respond, treat
9107 * it as an error.
9108 */
77d093fb 9109 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) {
2f6fa2c9
JS		 9110 if (lpfc_readl(phba->sli4_hba.u.if_type2.
9111 STATUSregaddr, &reg_data.word0)) {
9112 rc = -ENODEV;
9113 goto out;
9114 }
9115 if (bf_get(lpfc_sliport_status_rdy, &reg_data))
9116 break;
9117 msleep(20);
9118 }
9119
9120 if (!bf_get(lpfc_sliport_status_rdy, &reg_data)) {
9121 phba->work_status[0] = readl(
9122 phba->sli4_hba.u.if_type2.ERR1regaddr);
9123 phba->work_status[1] = readl(
9124 phba->sli4_hba.u.if_type2.ERR2regaddr);
9125 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9126 "2890 Port not ready, port status reg "
9127 "0x%x error 1=0x%x, error 2=0x%x\n",
9128 reg_data.word0,
9129 phba->work_status[0],
9130 phba->work_status[1]);
9131 rc = -ENODEV;
9132 goto out;
9133 }
9134
9135 if (!port_reset) {
9136 /*
9137 * Reset the port now
9138 */
2fcee4bf
JS		 9139 reg_data.word0 = 0;
9140 bf_set(lpfc_sliport_ctrl_end, &reg_data,
9141 LPFC_SLIPORT_LITTLE_ENDIAN);
9142 bf_set(lpfc_sliport_ctrl_ip, &reg_data,
9143 LPFC_SLIPORT_INIT_PORT);
9144 writel(reg_data.word0, phba->sli4_hba.u.if_type2.
9145 CTRLregaddr);
8fcb8acd 9146 /* flush */
2b81f942
JS		 9147 pci_read_config_word(phba->pcidev,
9148 PCI_DEVICE_ID, &devid);
2fcee4bf 9149
2f6fa2c9
JS		 9150 port_reset = 1;
9151 msleep(20);
9152 goto wait;
9153 } else if (bf_get(lpfc_sliport_status_rn, &reg_data)) {
9154 rc = -ENODEV;
9155 goto out;
2fcee4bf
JS		 9156 }
9157 break;
2f6fa2c9 9158
2fcee4bf
JS		 9159 case LPFC_SLI_INTF_IF_TYPE_1:
9160 default:
9161 break;
da0436e9 9162 }
2fcee4bf 9163
73d91e50 9164out:
2fcee4bf 9165 /* Catch the not-ready port failure after a port reset. */
2f6fa2c9 9166 if (rc) {
229adb0e
JS		 9167 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9168 "3317 HBA not functional: IP Reset Failed "
2f6fa2c9 9169 "try: echo fw_reset > board_mode\n");
2fcee4bf 9170 rc = -ENODEV;
229adb0e 9171 }
2fcee4bf 9172
da0436e9
JS		 9173 return rc;
9174}
9175
da0436e9
JS		 9176/**
9177 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space.
9178 * @phba: pointer to lpfc hba data structure.
9179 *
9180 * This routine is invoked to set up the PCI device memory space for device
9181 * with SLI-4 interface spec.
9182 *
9183 * Return codes
af901ca1 9184 * 0 - successful
da0436e9
JS		 9185 * other values - error
9186 **/
9187static int
9188lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
9189{
9190 struct pci_dev *pdev;
9191 unsigned long bar0map_len, bar1map_len, bar2map_len;
9192 int error = -ENODEV;
2fcee4bf 9193 uint32_t if_type;
da0436e9
JS		 9194
9195 /* Obtain PCI device reference */
9196 if (!phba->pcidev)
9197 return error;
9198 else
9199 pdev = phba->pcidev;
9200
9201 /* Set the device DMA mask size */
8e68597d
MR		 9202 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
9203 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
9204 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
9205 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
da0436e9 9206 return error;
8e68597d
MR		 9207 }
9208 }
da0436e9 9209
2fcee4bf
JS		 9210 /*
9211 * The BARs and register set definitions and offset locations are
9212 * dependent on the if_type.
9213 */
9214 if (pci_read_config_dword(pdev, LPFC_SLI_INTF,
9215 &phba->sli4_hba.sli_intf.word0)) {
9216 return error;
9217 }
9218
9219 /* There is no SLI3 failback for SLI4 devices. */
9220 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
9221 LPFC_SLI_INTF_VALID) {
9222 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9223 "2894 SLI_INTF reg contents invalid "
9224 "sli_intf reg 0x%x\n",
9225 phba->sli4_hba.sli_intf.word0);
9226 return error;
9227 }
9228
9229 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9230 /*
9231 * Get the bus address of SLI4 device Bar regions and the
9232 * number of bytes required by each mapping. The mapping of the
9233 * particular PCI BARs regions is dependent on the type of
9234 * SLI4 device.
da0436e9 9235 */
f5ca6f2e
JS		 9236 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) {
9237 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0);
9238 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0);
2fcee4bf
JS		 9239
9240 /*
9241 * Map SLI4 PCI Config Space Register base to a kernel virtual
9242 * addr
9243 */
9244 phba->sli4_hba.conf_regs_memmap_p =
9245 ioremap(phba->pci_bar0_map, bar0map_len);
9246 if (!phba->sli4_hba.conf_regs_memmap_p) {
9247 dev_printk(KERN_ERR, &pdev->dev,
9248 "ioremap failed for SLI4 PCI config "
9249 "registers.\n");
9250 goto out;
9251 }
f5ca6f2e 9252 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
2fcee4bf
JS		 9253 /* Set up BAR0 PCI config space register memory map */
9254 lpfc_sli4_bar0_register_memmap(phba, if_type);
1dfb5a47
JS		 9255 } else {
9256 phba->pci_bar0_map = pci_resource_start(pdev, 1);
9257 bar0map_len = pci_resource_len(pdev, 1);
2fcee4bf
JS		 9258 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
9259 dev_printk(KERN_ERR, &pdev->dev,
9260 "FATAL - No BAR0 mapping for SLI4, if_type 2\n");
9261 goto out;
9262 }
9263 phba->sli4_hba.conf_regs_memmap_p =
da0436e9 9264 ioremap(phba->pci_bar0_map, bar0map_len);
2fcee4bf
JS		 9265 if (!phba->sli4_hba.conf_regs_memmap_p) {
9266 dev_printk(KERN_ERR, &pdev->dev,
9267 "ioremap failed for SLI4 PCI config "
9268 "registers.\n");
9269 goto out;
9270 }
9271 lpfc_sli4_bar0_register_memmap(phba, if_type);
da0436e9
JS		 9272 }
9273
c31098ce 9274 if ((if_type == LPFC_SLI_INTF_IF_TYPE_0) &&
f5ca6f2e 9275 (pci_resource_start(pdev, PCI_64BIT_BAR2))) {
2fcee4bf
JS		 9276 /*
9277 * Map SLI4 if type 0 HBA Control Register base to a kernel
9278 * virtual address and setup the registers.
9279 */
f5ca6f2e
JS		 9280 phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2);
9281 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
2fcee4bf 9282 phba->sli4_hba.ctrl_regs_memmap_p =
da0436e9 9283 ioremap(phba->pci_bar1_map, bar1map_len);
2fcee4bf
JS		 9284 if (!phba->sli4_hba.ctrl_regs_memmap_p) {
9285 dev_printk(KERN_ERR, &pdev->dev,
da0436e9 9286 "ioremap failed for SLI4 HBA control registers.\n");
2fcee4bf
JS		 9287 goto out_iounmap_conf;
9288 }
f5ca6f2e 9289 phba->pci_bar2_memmap_p = phba->sli4_hba.ctrl_regs_memmap_p;
2fcee4bf 9290 lpfc_sli4_bar1_register_memmap(phba);
da0436e9
JS		 9291 }
9292
c31098ce 9293 if ((if_type == LPFC_SLI_INTF_IF_TYPE_0) &&
f5ca6f2e 9294 (pci_resource_start(pdev, PCI_64BIT_BAR4))) {
2fcee4bf
JS		 9295 /*
9296 * Map SLI4 if type 0 HBA Doorbell Register base to a kernel
9297 * virtual address and setup the registers.
9298 */
f5ca6f2e
JS		 9299 phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4);
9300 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
2fcee4bf 9301 phba->sli4_hba.drbl_regs_memmap_p =
da0436e9 9302 ioremap(phba->pci_bar2_map, bar2map_len);
2fcee4bf
JS		 9303 if (!phba->sli4_hba.drbl_regs_memmap_p) {
9304 dev_printk(KERN_ERR, &pdev->dev,
da0436e9 9305 "ioremap failed for SLI4 HBA doorbell registers.\n");
2fcee4bf
JS		 9306 goto out_iounmap_ctrl;
9307 }
f5ca6f2e 9308 phba->pci_bar4_memmap_p = phba->sli4_hba.drbl_regs_memmap_p;
2fcee4bf
JS		 9309 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
9310 if (error)
9311 goto out_iounmap_all;
da0436e9
JS		 9312 }
9313
da0436e9
JS		 9314 return 0;
9315
9316out_iounmap_all:
9317 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
9318out_iounmap_ctrl:
9319 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
9320out_iounmap_conf:
9321 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9322out:
9323 return error;
9324}
9325
9326/**
9327 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space.
9328 * @phba: pointer to lpfc hba data structure.
9329 *
9330 * This routine is invoked to unset the PCI device memory space for device
9331 * with SLI-4 interface spec.
9332 **/
9333static void
9334lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba)
9335{
2e90f4b5
JS		 9336 uint32_t if_type;
9337 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
da0436e9 9338
2e90f4b5
JS		 9339 switch (if_type) {
9340 case LPFC_SLI_INTF_IF_TYPE_0:
9341 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
9342 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
9343 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9344 break;
9345 case LPFC_SLI_INTF_IF_TYPE_2:
9346 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9347 break;
9348 case LPFC_SLI_INTF_IF_TYPE_1:
9349 default:
9350 dev_printk(KERN_ERR, &phba->pcidev->dev,
9351 "FATAL - unsupported SLI4 interface type - %d\n",
9352 if_type);
9353 break;
9354 }
da0436e9
JS		 9355}
9356
9357/**
9358 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device
9359 * @phba: pointer to lpfc hba data structure.
9360 *
9361 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9362 * with SLI-3 interface specs.
da0436e9
JS		 9363 *
9364 * Return codes
af901ca1 9365 * 0 - successful
da0436e9
JS		 9366 * other values - error
9367 **/
9368static int
9369lpfc_sli_enable_msix(struct lpfc_hba *phba)
9370{
45ffac19 9371 int rc;
da0436e9
JS		 9372 LPFC_MBOXQ_t *pmb;
9373
9374 /* Set up MSI-X multi-message vectors */
45ffac19
CH		 9375 rc = pci_alloc_irq_vectors(phba->pcidev,
9376 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX);
9377 if (rc < 0) {
da0436e9
JS		 9378 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9379 "0420 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9380 goto vec_fail_out;
da0436e9 9381 }
45ffac19 9382
da0436e9
JS		 9383 /*
9384 * Assign MSI-X vectors to interrupt handlers
9385 */
9386
9387 /* vector-0 is associated to slow-path handler */
45ffac19 9388 rc = request_irq(pci_irq_vector(phba->pcidev, 0),
ed243d37 9389 &lpfc_sli_sp_intr_handler, 0,
da0436e9
JS		 9390 LPFC_SP_DRIVER_HANDLER_NAME, phba);
9391 if (rc) {
9392 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9393 "0421 MSI-X slow-path request_irq failed "
9394 "(%d)\n", rc);
9395 goto msi_fail_out;
9396 }
9397
9398 /* vector-1 is associated to fast-path handler */
45ffac19 9399 rc = request_irq(pci_irq_vector(phba->pcidev, 1),
ed243d37 9400 &lpfc_sli_fp_intr_handler, 0,
da0436e9
JS		 9401 LPFC_FP_DRIVER_HANDLER_NAME, phba);
9402
9403 if (rc) {
9404 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9405 "0429 MSI-X fast-path request_irq failed "
9406 "(%d)\n", rc);
9407 goto irq_fail_out;
9408 }
9409
9410 /*
9411 * Configure HBA MSI-X attention conditions to messages
9412 */
9413 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9414
9415 if (!pmb) {
9416 rc = -ENOMEM;
9417 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9418 "0474 Unable to allocate memory for issuing "
9419 "MBOX_CONFIG_MSI command\n");
9420 goto mem_fail_out;
9421 }
9422 rc = lpfc_config_msi(phba, pmb);
9423 if (rc)
9424 goto mbx_fail_out;
9425 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
9426 if (rc != MBX_SUCCESS) {
9427 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX,
9428 "0351 Config MSI mailbox command failed, "
9429 "mbxCmd x%x, mbxStatus x%x\n",
9430 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus);
9431 goto mbx_fail_out;
9432 }
9433
9434 /* Free memory allocated for mailbox command */
9435 mempool_free(pmb, phba->mbox_mem_pool);
9436 return rc;
9437
9438mbx_fail_out:
9439 /* Free memory allocated for mailbox command */
9440 mempool_free(pmb, phba->mbox_mem_pool);
9441
9442mem_fail_out:
9443 /* free the irq already requested */
45ffac19 9444 free_irq(pci_irq_vector(phba->pcidev, 1), phba);
da0436e9
JS		 9445
9446irq_fail_out:
9447 /* free the irq already requested */
45ffac19 9448 free_irq(pci_irq_vector(phba->pcidev, 0), phba);
da0436e9
JS		 9449
9450msi_fail_out:
9451 /* Unconfigure MSI-X capability structure */
45ffac19 9452 pci_free_irq_vectors(phba->pcidev);
029165ac
AG		 9453
9454vec_fail_out:
da0436e9
JS		 9455 return rc;
9456}
9457
da0436e9
JS		 9458/**
9459 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device.
9460 * @phba: pointer to lpfc hba data structure.
9461 *
9462 * This routine is invoked to enable the MSI interrupt mode to device with
9463 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to
9464 * enable the MSI vector. The device driver is responsible for calling the
9465 * request_irq() to register MSI vector with a interrupt the handler, which
9466 * is done in this function.
9467 *
9468 * Return codes
af901ca1 9469 * 0 - successful
da0436e9
JS		 9470 * other values - error
9471 */
9472static int
9473lpfc_sli_enable_msi(struct lpfc_hba *phba)
9474{
9475 int rc;
9476
9477 rc = pci_enable_msi(phba->pcidev);
9478 if (!rc)
9479 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9480 "0462 PCI enable MSI mode success.\n");
9481 else {
9482 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9483 "0471 PCI enable MSI mode failed (%d)\n", rc);
9484 return rc;
9485 }
9486
9487 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
ed243d37 9488 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS		 9489 if (rc) {
9490 pci_disable_msi(phba->pcidev);
9491 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9492 "0478 MSI request_irq failed (%d)\n", rc);
9493 }
9494 return rc;
9495}
9496
da0436e9
JS		 9497/**
9498 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device.
9499 * @phba: pointer to lpfc hba data structure.
9500 *
9501 * This routine is invoked to enable device interrupt and associate driver's
9502 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface
9503 * spec. Depends on the interrupt mode configured to the driver, the driver
9504 * will try to fallback from the configured interrupt mode to an interrupt
9505 * mode which is supported by the platform, kernel, and device in the order
9506 * of:
9507 * MSI-X -> MSI -> IRQ.
9508 *
9509 * Return codes
af901ca1 9510 * 0 - successful
da0436e9
JS		 9511 * other values - error
9512 **/
9513static uint32_t
9514lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9515{
9516 uint32_t intr_mode = LPFC_INTR_ERROR;
9517 int retval;
9518
9519 if (cfg_mode == 2) {
9520 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */
9521 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3);
9522 if (!retval) {
9523 /* Now, try to enable MSI-X interrupt mode */
9524 retval = lpfc_sli_enable_msix(phba);
9525 if (!retval) {
9526 /* Indicate initialization to MSI-X mode */
9527 phba->intr_type = MSIX;
9528 intr_mode = 2;
9529 }
9530 }
9531 }
9532
9533 /* Fallback to MSI if MSI-X initialization failed */
9534 if (cfg_mode >= 1 && phba->intr_type == NONE) {
9535 retval = lpfc_sli_enable_msi(phba);
9536 if (!retval) {
9537 /* Indicate initialization to MSI mode */
9538 phba->intr_type = MSI;
9539 intr_mode = 1;
9540 }
9541 }
9542
9543 /* Fallback to INTx if both MSI-X/MSI initalization failed */
9544 if (phba->intr_type == NONE) {
9545 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
9546 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
9547 if (!retval) {
9548 /* Indicate initialization to INTx mode */
9549 phba->intr_type = INTx;
9550 intr_mode = 0;
9551 }
9552 }
9553 return intr_mode;
9554}
9555
9556/**
9557 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device.
9558 * @phba: pointer to lpfc hba data structure.
9559 *
9560 * This routine is invoked to disable device interrupt and disassociate the
9561 * driver's interrupt handler(s) from interrupt vector(s) to device with
9562 * SLI-3 interface spec. Depending on the interrupt mode, the driver will
9563 * release the interrupt vector(s) for the message signaled interrupt.
9564 **/
9565static void
9566lpfc_sli_disable_intr(struct lpfc_hba *phba)
9567{
45ffac19
CH		 9568 int nr_irqs, i;
9569
da0436e9 9570 if (phba->intr_type == MSIX)
45ffac19
CH		 9571 nr_irqs = LPFC_MSIX_VECTORS;
9572 else
9573 nr_irqs = 1;
9574
9575 for (i = 0; i < nr_irqs; i++)
9576 free_irq(pci_irq_vector(phba->pcidev, i), phba);
9577 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS		 9578
9579 /* Reset interrupt management states */
9580 phba->intr_type = NONE;
9581 phba->sli.slistat.sli_intr = 0;
da0436e9
JS		 9582}
9583
7bb03bbf 9584/**
895427bd 9585 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings
7bb03bbf 9586 * @phba: pointer to lpfc hba data structure.
895427bd
JS		 9587 * @vectors: number of msix vectors allocated.
9588 *
9589 * The routine will figure out the CPU affinity assignment for every
9590 * MSI-X vector allocated for the HBA. The hba_eq_hdl will be updated
9591 * with a pointer to the CPU mask that defines ALL the CPUs this vector
9592 * can be associated with. If the vector can be unquely associated with
9593 * a single CPU, that CPU will be recorded in hba_eq_hdl[index].cpu.
9594 * In addition, the CPU to IO channel mapping will be calculated
9595 * and the phba->sli4_hba.cpu_map array will reflect this.
7bb03bbf 9596 */
895427bd
JS		 9597static void
9598lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
7bb03bbf
JS		 9599{
9600 struct lpfc_vector_map_info *cpup;
895427bd
JS		 9601 int index = 0;
9602 int vec = 0;
7bb03bbf 9603 int cpu;
7bb03bbf
JS		 9604#ifdef CONFIG_X86
9605 struct cpuinfo_x86 *cpuinfo;
9606#endif
7bb03bbf
JS		 9607
9608 /* Init cpu_map array */
9609 memset(phba->sli4_hba.cpu_map, 0xff,
9610 (sizeof(struct lpfc_vector_map_info) *
895427bd 9611 phba->sli4_hba.num_present_cpu));
7bb03bbf
JS		 9612
9613 /* Update CPU map with physical id and core id of each CPU */
9614 cpup = phba->sli4_hba.cpu_map;
9615 for (cpu = 0; cpu < phba->sli4_hba.num_present_cpu; cpu++) {
9616#ifdef CONFIG_X86
9617 cpuinfo = &cpu_data(cpu);
9618 cpup->phys_id = cpuinfo->phys_proc_id;
9619 cpup->core_id = cpuinfo->cpu_core_id;
9620#else
9621 /* No distinction between CPUs for other platforms */
9622 cpup->phys_id = 0;
9623 cpup->core_id = 0;
9624#endif
895427bd
JS		 9625 cpup->channel_id = index; /* For now round robin */
9626 cpup->irq = pci_irq_vector(phba->pcidev, vec);
9627 vec++;
9628 if (vec >= vectors)
9629 vec = 0;
9630 index++;
9631 if (index >= phba->cfg_fcp_io_channel)
9632 index = 0;
7bb03bbf
JS		 9633 cpup++;
9634 }
7bb03bbf
JS		 9635}
9636
9637
da0436e9
JS		 9638/**
9639 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device
9640 * @phba: pointer to lpfc hba data structure.
9641 *
9642 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9643 * with SLI-4 interface spec.
da0436e9
JS		 9644 *
9645 * Return codes
af901ca1 9646 * 0 - successful
da0436e9
JS		 9647 * other values - error
9648 **/
9649static int
9650lpfc_sli4_enable_msix(struct lpfc_hba *phba)
9651{
75baf696 9652 int vectors, rc, index;
da0436e9
JS		 9653
9654 /* Set up MSI-X multi-message vectors */
895427bd 9655 vectors = phba->io_channel_irqs;
45ffac19 9656 if (phba->cfg_fof)
1ba981fd 9657 vectors++;
45ffac19 9658
f358dd0c
JS		 9659 rc = pci_alloc_irq_vectors(phba->pcidev,
9660 (phba->nvmet_support) ? 1 : 2,
9661 vectors, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
4f871e1b 9662 if (rc < 0) {
da0436e9
JS		 9663 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9664 "0484 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9665 goto vec_fail_out;
da0436e9 9666 }
4f871e1b 9667 vectors = rc;
75baf696 9668
7bb03bbf 9669 /* Assign MSI-X vectors to interrupt handlers */
67d12733 9670 for (index = 0; index < vectors; index++) {
4305f183 9671 memset(&phba->sli4_hba.handler_name[index], 0, 16);
a2fc4aef
JS		 9672 snprintf((char *)&phba->sli4_hba.handler_name[index],
9673 LPFC_SLI4_HANDLER_NAME_SZ,
4305f183 9674 LPFC_DRIVER_HANDLER_NAME"%d", index);
da0436e9 9675
895427bd
JS		 9676 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9677 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
9678 atomic_set(&phba->sli4_hba.hba_eq_hdl[index].hba_eq_in_use, 1);
1ba981fd 9679 if (phba->cfg_fof && (index == (vectors - 1)))
45ffac19 9680 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9681 &lpfc_sli4_fof_intr_handler, 0,
1ba981fd 9682 (char *)&phba->sli4_hba.handler_name[index],
895427bd 9683 &phba->sli4_hba.hba_eq_hdl[index]);
1ba981fd 9684 else
45ffac19 9685 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9686 &lpfc_sli4_hba_intr_handler, 0,
4305f183 9687 (char *)&phba->sli4_hba.handler_name[index],
895427bd 9688 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9
JS		 9689 if (rc) {
9690 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9691 "0486 MSI-X fast-path (%d) "
9692 "request_irq failed (%d)\n", index, rc);
9693 goto cfg_fail_out;
9694 }
9695 }
9696
1ba981fd
JS		 9697 if (phba->cfg_fof)
9698 vectors--;
9699
895427bd 9700 if (vectors != phba->io_channel_irqs) {
82c3e9ba
JS		 9701 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9702 "3238 Reducing IO channels to match number of "
9703 "MSI-X vectors, requested %d got %d\n",
895427bd
JS		 9704 phba->io_channel_irqs, vectors);
9705 if (phba->cfg_fcp_io_channel > vectors)
9706 phba->cfg_fcp_io_channel = vectors;
9707 if (phba->cfg_nvme_io_channel > vectors)
9708 phba->cfg_nvme_io_channel = vectors;
9709 if (phba->cfg_fcp_io_channel > phba->cfg_nvme_io_channel)
9710 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
9711 else
9712 phba->io_channel_irqs = phba->cfg_nvme_io_channel;
82c3e9ba 9713 }
895427bd 9714 lpfc_cpu_affinity_check(phba, vectors);
7bb03bbf 9715
da0436e9
JS		 9716 return rc;
9717
9718cfg_fail_out:
9719 /* free the irq already requested */
895427bd
JS		 9720 for (--index; index >= 0; index--)
9721 free_irq(pci_irq_vector(phba->pcidev, index),
9722 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9 9723
da0436e9 9724 /* Unconfigure MSI-X capability structure */
45ffac19 9725 pci_free_irq_vectors(phba->pcidev);
029165ac
AG		 9726
9727vec_fail_out:
da0436e9
JS		 9728 return rc;
9729}
9730
da0436e9
JS		 9731/**
9732 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device
9733 * @phba: pointer to lpfc hba data structure.
9734 *
9735 * This routine is invoked to enable the MSI interrupt mode to device with
9736 * SLI-4 interface spec. The kernel function pci_enable_msi() is called
9737 * to enable the MSI vector. The device driver is responsible for calling
9738 * the request_irq() to register MSI vector with a interrupt the handler,
9739 * which is done in this function.
9740 *
9741 * Return codes
af901ca1 9742 * 0 - successful
da0436e9
JS		 9743 * other values - error
9744 **/
9745static int
9746lpfc_sli4_enable_msi(struct lpfc_hba *phba)
9747{
9748 int rc, index;
9749
9750 rc = pci_enable_msi(phba->pcidev);
9751 if (!rc)
9752 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9753 "0487 PCI enable MSI mode success.\n");
9754 else {
9755 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9756 "0488 PCI enable MSI mode failed (%d)\n", rc);
9757 return rc;
9758 }
9759
9760 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
ed243d37 9761 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS		 9762 if (rc) {
9763 pci_disable_msi(phba->pcidev);
9764 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9765 "0490 MSI request_irq failed (%d)\n", rc);
75baf696 9766 return rc;
da0436e9
JS		 9767 }
9768
895427bd
JS		 9769 for (index = 0; index < phba->io_channel_irqs; index++) {
9770 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9771 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
da0436e9
JS		 9772 }
9773
1ba981fd 9774 if (phba->cfg_fof) {
895427bd
JS		 9775 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9776 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
1ba981fd 9777 }
75baf696 9778 return 0;
da0436e9
JS		 9779}
9780
da0436e9
JS		 9781/**
9782 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device
9783 * @phba: pointer to lpfc hba data structure.
9784 *
9785 * This routine is invoked to enable device interrupt and associate driver's
9786 * interrupt handler(s) to interrupt vector(s) to device with SLI-4
9787 * interface spec. Depends on the interrupt mode configured to the driver,
9788 * the driver will try to fallback from the configured interrupt mode to an
9789 * interrupt mode which is supported by the platform, kernel, and device in
9790 * the order of:
9791 * MSI-X -> MSI -> IRQ.
9792 *
9793 * Return codes
af901ca1 9794 * 0 - successful
da0436e9
JS		 9795 * other values - error
9796 **/
9797static uint32_t
9798lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9799{
9800 uint32_t intr_mode = LPFC_INTR_ERROR;
895427bd 9801 int retval, idx;
da0436e9
JS		 9802
9803 if (cfg_mode == 2) {
9804 /* Preparation before conf_msi mbox cmd */
9805 retval = 0;
9806 if (!retval) {
9807 /* Now, try to enable MSI-X interrupt mode */
9808 retval = lpfc_sli4_enable_msix(phba);
9809 if (!retval) {
9810 /* Indicate initialization to MSI-X mode */
9811 phba->intr_type = MSIX;
9812 intr_mode = 2;
9813 }
9814 }
9815 }
9816
9817 /* Fallback to MSI if MSI-X initialization failed */
9818 if (cfg_mode >= 1 && phba->intr_type == NONE) {
9819 retval = lpfc_sli4_enable_msi(phba);
9820 if (!retval) {
9821 /* Indicate initialization to MSI mode */
9822 phba->intr_type = MSI;
9823 intr_mode = 1;
9824 }
9825 }
9826
9827 /* Fallback to INTx if both MSI-X/MSI initalization failed */
9828 if (phba->intr_type == NONE) {
9829 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
9830 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
9831 if (!retval) {
895427bd
JS		 9832 struct lpfc_hba_eq_hdl *eqhdl;
9833
da0436e9
JS		 9834 /* Indicate initialization to INTx mode */
9835 phba->intr_type = INTx;
9836 intr_mode = 0;
895427bd
JS		 9837
9838 for (idx = 0; idx < phba->io_channel_irqs; idx++) {
9839 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
9840 eqhdl->idx = idx;
9841 eqhdl->phba = phba;
9842 atomic_set(&eqhdl->hba_eq_in_use, 1);
da0436e9 9843 }
1ba981fd 9844 if (phba->cfg_fof) {
895427bd
JS		 9845 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
9846 eqhdl->idx = idx;
9847 eqhdl->phba = phba;
9848 atomic_set(&eqhdl->hba_eq_in_use, 1);
1ba981fd 9849 }
da0436e9
JS		 9850 }
9851 }
9852 return intr_mode;
9853}
9854
9855/**
9856 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device
9857 * @phba: pointer to lpfc hba data structure.
9858 *
9859 * This routine is invoked to disable device interrupt and disassociate
9860 * the driver's interrupt handler(s) from interrupt vector(s) to device
9861 * with SLI-4 interface spec. Depending on the interrupt mode, the driver
9862 * will release the interrupt vector(s) for the message signaled interrupt.
9863 **/
9864static void
9865lpfc_sli4_disable_intr(struct lpfc_hba *phba)
9866{
9867 /* Disable the currently initialized interrupt mode */
45ffac19
CH		 9868 if (phba->intr_type == MSIX) {
9869 int index;
9870
9871 /* Free up MSI-X multi-message vectors */
895427bd
JS		 9872 for (index = 0; index < phba->io_channel_irqs; index++)
9873 free_irq(pci_irq_vector(phba->pcidev, index),
9874 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19
CH		 9875
9876 if (phba->cfg_fof)
895427bd
JS		 9877 free_irq(pci_irq_vector(phba->pcidev, index),
9878 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19 9879 } else {
da0436e9 9880 free_irq(phba->pcidev->irq, phba);
45ffac19
CH		 9881 }
9882
9883 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS		 9884
9885 /* Reset interrupt management states */
9886 phba->intr_type = NONE;
9887 phba->sli.slistat.sli_intr = 0;
da0436e9
JS		 9888}
9889
9890/**
9891 * lpfc_unset_hba - Unset SLI3 hba device initialization
9892 * @phba: pointer to lpfc hba data structure.
9893 *
9894 * This routine is invoked to unset the HBA device initialization steps to
9895 * a device with SLI-3 interface spec.
9896 **/
9897static void
9898lpfc_unset_hba(struct lpfc_hba *phba)
9899{
9900 struct lpfc_vport *vport = phba->pport;
9901 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
9902
9903 spin_lock_irq(shost->host_lock);
9904 vport->load_flag |= FC_UNLOADING;
9905 spin_unlock_irq(shost->host_lock);
9906
72859909
JS		 9907 kfree(phba->vpi_bmask);
9908 kfree(phba->vpi_ids);
9909
da0436e9
JS		 9910 lpfc_stop_hba_timers(phba);
9911
9912 phba->pport->work_port_events = 0;
9913
9914 lpfc_sli_hba_down(phba);
9915
9916 lpfc_sli_brdrestart(phba);
9917
9918 lpfc_sli_disable_intr(phba);
9919
9920 return;
9921}
9922
5af5eee7
JS		 9923/**
9924 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy
9925 * @phba: Pointer to HBA context object.
9926 *
9927 * This function is called in the SLI4 code path to wait for completion
9928 * of device's XRIs exchange busy. It will check the XRI exchange busy
9929 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after
9930 * that, it will check the XRI exchange busy on outstanding FCP and ELS
9931 * I/Os every 30 seconds, log error message, and wait forever. Only when
9932 * all XRI exchange busy complete, the driver unload shall proceed with
9933 * invoking the function reset ioctl mailbox command to the CNA and the
9934 * the rest of the driver unload resource release.
9935 **/
9936static void
9937lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba)
9938{
9939 int wait_time = 0;
895427bd
JS		 9940 int nvme_xri_cmpl = 1;
9941 int fcp_xri_cmpl = 1;
5af5eee7 9942 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c
JS		 9943 int nvmet_xri_cmpl =
9944 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_sgl_list);
5af5eee7 9945
895427bd
JS		 9946 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
9947 fcp_xri_cmpl =
9948 list_empty(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
9949 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
9950 nvme_xri_cmpl =
9951 list_empty(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
9952
f358dd0c
JS		 9953 while (!fcp_xri_cmpl || !els_xri_cmpl || !nvme_xri_cmpl ||
9954 !nvmet_xri_cmpl) {
5af5eee7 9955 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) {
895427bd
JS		 9956 if (!nvme_xri_cmpl)
9957 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9958 "6100 NVME XRI exchange busy "
9959 "wait time: %d seconds.\n",
9960 wait_time/1000);
5af5eee7
JS		 9961 if (!fcp_xri_cmpl)
9962 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9963 "2877 FCP XRI exchange busy "
9964 "wait time: %d seconds.\n",
9965 wait_time/1000);
9966 if (!els_xri_cmpl)
9967 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9968 "2878 ELS XRI exchange busy "
9969 "wait time: %d seconds.\n",
9970 wait_time/1000);
9971 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2);
9972 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2;
9973 } else {
9974 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1);
9975 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1;
9976 }
895427bd
JS		 9977 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
9978 nvme_xri_cmpl = list_empty(
9979 &phba->sli4_hba.lpfc_abts_nvme_buf_list);
9980
9981 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
9982 fcp_xri_cmpl = list_empty(
9983 &phba->sli4_hba.lpfc_abts_scsi_buf_list);
9984
5af5eee7
JS		 9985 els_xri_cmpl =
9986 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c
JS		 9987
9988 nvmet_xri_cmpl =
9989 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_sgl_list);
5af5eee7
JS		 9990 }
9991}
9992
da0436e9
JS		 9993/**
9994 * lpfc_sli4_hba_unset - Unset the fcoe hba
9995 * @phba: Pointer to HBA context object.
9996 *
9997 * This function is called in the SLI4 code path to reset the HBA's FCoE
9998 * function. The caller is not required to hold any lock. This routine
9999 * issues PCI function reset mailbox command to reset the FCoE function.
10000 * At the end of the function, it calls lpfc_hba_down_post function to
10001 * free any pending commands.
10002 **/
10003static void
10004lpfc_sli4_hba_unset(struct lpfc_hba *phba)
10005{
10006 int wait_cnt = 0;
10007 LPFC_MBOXQ_t *mboxq;
912e3acd 10008 struct pci_dev *pdev = phba->pcidev;
da0436e9
JS		 10009
10010 lpfc_stop_hba_timers(phba);
10011 phba->sli4_hba.intr_enable = 0;
10012
10013 /*
10014 * Gracefully wait out the potential current outstanding asynchronous
10015 * mailbox command.
10016 */
10017
10018 /* First, block any pending async mailbox command from posted */
10019 spin_lock_irq(&phba->hbalock);
10020 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
10021 spin_unlock_irq(&phba->hbalock);
10022 /* Now, trying to wait it out if we can */
10023 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
10024 msleep(10);
10025 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT)
10026 break;
10027 }
10028 /* Forcefully release the outstanding mailbox command if timed out */
10029 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
10030 spin_lock_irq(&phba->hbalock);
10031 mboxq = phba->sli.mbox_active;
10032 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
10033 __lpfc_mbox_cmpl_put(phba, mboxq);
10034 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
10035 phba->sli.mbox_active = NULL;
10036 spin_unlock_irq(&phba->hbalock);
10037 }
10038
5af5eee7
JS		 10039 /* Abort all iocbs associated with the hba */
10040 lpfc_sli_hba_iocb_abort(phba);
10041
10042 /* Wait for completion of device XRI exchange busy */
10043 lpfc_sli4_xri_exchange_busy_wait(phba);
10044
da0436e9
JS		 10045 /* Disable PCI subsystem interrupt */
10046 lpfc_sli4_disable_intr(phba);
10047
912e3acd
JS		 10048 /* Disable SR-IOV if enabled */
10049 if (phba->cfg_sriov_nr_virtfn)
10050 pci_disable_sriov(pdev);
10051
da0436e9
JS		 10052 /* Stop kthread signal shall trigger work_done one more time */
10053 kthread_stop(phba->worker_thread);
10054
d1f525aa
JS		 10055 /* Unset the queues shared with the hardware then release all
10056 * allocated resources.
10057 */
10058 lpfc_sli4_queue_unset(phba);
10059 lpfc_sli4_queue_destroy(phba);
10060
3677a3a7
JS		 10061 /* Reset SLI4 HBA FCoE function */
10062 lpfc_pci_function_reset(phba);
10063
da0436e9
JS		 10064 /* Stop the SLI4 device port */
10065 phba->pport->work_port_events = 0;
10066}
10067
28baac74
JS		 10068 /**
10069 * lpfc_pc_sli4_params_get - Get the SLI4_PARAMS port capabilities.
10070 * @phba: Pointer to HBA context object.
10071 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
10072 *
10073 * This function is called in the SLI4 code path to read the port's
10074 * sli4 capabilities.
10075 *
10076 * This function may be be called from any context that can block-wait
10077 * for the completion. The expectation is that this routine is called
10078 * typically from probe_one or from the online routine.
10079 **/
10080int
10081lpfc_pc_sli4_params_get(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
10082{
10083 int rc;
10084 struct lpfc_mqe *mqe;
10085 struct lpfc_pc_sli4_params *sli4_params;
10086 uint32_t mbox_tmo;
10087
10088 rc = 0;
10089 mqe = &mboxq->u.mqe;
10090
10091 /* Read the port's SLI4 Parameters port capabilities */
fedd3b7b 10092 lpfc_pc_sli4_params(mboxq);
28baac74
JS		 10093 if (!phba->sli4_hba.intr_enable)
10094 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
10095 else {
a183a15f 10096 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
28baac74
JS		 10097 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
10098 }
10099
10100 if (unlikely(rc))
10101 return 1;
10102
10103 sli4_params = &phba->sli4_hba.pc_sli4_params;
10104 sli4_params->if_type = bf_get(if_type, &mqe->un.sli4_params);
10105 sli4_params->sli_rev = bf_get(sli_rev, &mqe->un.sli4_params);
10106 sli4_params->sli_family = bf_get(sli_family, &mqe->un.sli4_params);
10107 sli4_params->featurelevel_1 = bf_get(featurelevel_1,
10108 &mqe->un.sli4_params);
10109 sli4_params->featurelevel_2 = bf_get(featurelevel_2,
10110 &mqe->un.sli4_params);
10111 sli4_params->proto_types = mqe->un.sli4_params.word3;
10112 sli4_params->sge_supp_len = mqe->un.sli4_params.sge_supp_len;
10113 sli4_params->if_page_sz = bf_get(if_page_sz, &mqe->un.sli4_params);
10114 sli4_params->rq_db_window = bf_get(rq_db_window, &mqe->un.sli4_params);
10115 sli4_params->loopbk_scope = bf_get(loopbk_scope, &mqe->un.sli4_params);
10116 sli4_params->eq_pages_max = bf_get(eq_pages, &mqe->un.sli4_params);
10117 sli4_params->eqe_size = bf_get(eqe_size, &mqe->un.sli4_params);
10118 sli4_params->cq_pages_max = bf_get(cq_pages, &mqe->un.sli4_params);
10119 sli4_params->cqe_size = bf_get(cqe_size, &mqe->un.sli4_params);
10120 sli4_params->mq_pages_max = bf_get(mq_pages, &mqe->un.sli4_params);
10121 sli4_params->mqe_size = bf_get(mqe_size, &mqe->un.sli4_params);
10122 sli4_params->mq_elem_cnt = bf_get(mq_elem_cnt, &mqe->un.sli4_params);
10123 sli4_params->wq_pages_max = bf_get(wq_pages, &mqe->un.sli4_params);
10124 sli4_params->wqe_size = bf_get(wqe_size, &mqe->un.sli4_params);
10125 sli4_params->rq_pages_max = bf_get(rq_pages, &mqe->un.sli4_params);
10126 sli4_params->rqe_size = bf_get(rqe_size, &mqe->un.sli4_params);
10127 sli4_params->hdr_pages_max = bf_get(hdr_pages, &mqe->un.sli4_params);
10128 sli4_params->hdr_size = bf_get(hdr_size, &mqe->un.sli4_params);
10129 sli4_params->hdr_pp_align = bf_get(hdr_pp_align, &mqe->un.sli4_params);
10130 sli4_params->sgl_pages_max = bf_get(sgl_pages, &mqe->un.sli4_params);
10131 sli4_params->sgl_pp_align = bf_get(sgl_pp_align, &mqe->un.sli4_params);
0558056c
JS		 10132
10133 /* Make sure that sge_supp_len can be handled by the driver */
10134 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
10135 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
10136
28baac74
JS		 10137 return rc;
10138}
10139
fedd3b7b
JS		 10140/**
10141 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS.
10142 * @phba: Pointer to HBA context object.
10143 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
10144 *
10145 * This function is called in the SLI4 code path to read the port's
10146 * sli4 capabilities.
10147 *
10148 * This function may be be called from any context that can block-wait
10149 * for the completion. The expectation is that this routine is called
10150 * typically from probe_one or from the online routine.
10151 **/
10152int
10153lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
10154{
10155 int rc;
10156 struct lpfc_mqe *mqe = &mboxq->u.mqe;
10157 struct lpfc_pc_sli4_params *sli4_params;
a183a15f 10158 uint32_t mbox_tmo;
fedd3b7b
JS		 10159 int length;
10160 struct lpfc_sli4_parameters *mbx_sli4_parameters;
10161
6d368e53
JS		 10162 /*
10163 * By default, the driver assumes the SLI4 port requires RPI
10164 * header postings. The SLI4_PARAM response will correct this
10165 * assumption.
10166 */
10167 phba->sli4_hba.rpi_hdrs_in_use = 1;
10168
fedd3b7b
JS		 10169 /* Read the port's SLI4 Config Parameters */
10170 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
10171 sizeof(struct lpfc_sli4_cfg_mhdr));
10172 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
10173 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
10174 length, LPFC_SLI4_MBX_EMBED);
10175 if (!phba->sli4_hba.intr_enable)
10176 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
a183a15f
JS		 10177 else {
10178 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
10179 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
10180 }
fedd3b7b
JS		 10181 if (unlikely(rc))
10182 return rc;
10183 sli4_params = &phba->sli4_hba.pc_sli4_params;
10184 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
10185 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters);
10186 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters);
10187 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters);
10188 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1,
10189 mbx_sli4_parameters);
10190 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2,
10191 mbx_sli4_parameters);
10192 if (bf_get(cfg_phwq, mbx_sli4_parameters))
10193 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED;
10194 else
10195 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED;
10196 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len;
10197 sli4_params->loopbk_scope = bf_get(loopbk_scope, mbx_sli4_parameters);
1ba981fd 10198 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters);
fedd3b7b
JS		 10199 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters);
10200 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters);
10201 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters);
10202 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters);
0c651878 10203 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters);
fedd3b7b
JS		 10204 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt,
10205 mbx_sli4_parameters);
895427bd 10206 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters);
fedd3b7b
JS		 10207 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align,
10208 mbx_sli4_parameters);
6d368e53
JS		 10209 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
10210 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
895427bd
JS		 10211 phba->nvme_support = (bf_get(cfg_nvme, mbx_sli4_parameters) &&
10212 bf_get(cfg_xib, mbx_sli4_parameters));
10213
10214 if ((phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) ||
10215 !phba->nvme_support) {
10216 phba->nvme_support = 0;
10217 phba->nvmet_support = 0;
2d7dbc4c 10218 phba->cfg_nvmet_mrq = 0;
895427bd
JS		 10219 phba->cfg_nvme_io_channel = 0;
10220 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
10221 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
10222 "6101 Disabling NVME support: "
10223 "Not supported by firmware: %d %d\n",
10224 bf_get(cfg_nvme, mbx_sli4_parameters),
10225 bf_get(cfg_xib, mbx_sli4_parameters));
10226
10227 /* If firmware doesn't support NVME, just use SCSI support */
10228 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
10229 return -ENODEV;
10230 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
10231 }
0558056c 10232
f358dd0c
JS		 10233 if (bf_get(cfg_xib, mbx_sli4_parameters) && phba->cfg_suppress_rsp)
10234 phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP;
10235
0558056c
JS		 10236 /* Make sure that sge_supp_len can be handled by the driver */
10237 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
10238 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
10239
b5c53958
JS		 10240 /*
10241 * Issue IOs with CDB embedded in WQE to minimized the number
10242 * of DMAs the firmware has to do. Setting this to 1 also forces
10243 * the driver to use 128 bytes WQEs for FCP IOs.
10244 */
10245 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters))
10246 phba->fcp_embed_io = 1;
10247 else
10248 phba->fcp_embed_io = 0;
7bdedb34
JS		 10249
10250 /*
10251 * Check if the SLI port supports MDS Diagnostics
10252 */
10253 if (bf_get(cfg_mds_diags, mbx_sli4_parameters))
10254 phba->mds_diags_support = 1;
10255 else
10256 phba->mds_diags_support = 0;
fedd3b7b
JS		 10257 return 0;
10258}
10259
da0436e9
JS		 10260/**
10261 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
10262 * @pdev: pointer to PCI device
10263 * @pid: pointer to PCI device identifier
10264 *
10265 * This routine is to be called to attach a device with SLI-3 interface spec
10266 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
10267 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
10268 * information of the device and driver to see if the driver state that it can
10269 * support this kind of device. If the match is successful, the driver core
10270 * invokes this routine. If this routine determines it can claim the HBA, it
10271 * does all the initialization that it needs to do to handle the HBA properly.
10272 *
10273 * Return code
10274 * 0 - driver can claim the device
10275 * negative value - driver can not claim the device
10276 **/
6f039790 10277static int
da0436e9
JS		 10278lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid)
10279{
10280 struct lpfc_hba *phba;
10281 struct lpfc_vport *vport = NULL;
6669f9bb 10282 struct Scsi_Host *shost = NULL;
da0436e9
JS		 10283 int error;
10284 uint32_t cfg_mode, intr_mode;
10285
10286 /* Allocate memory for HBA structure */
10287 phba = lpfc_hba_alloc(pdev);
10288 if (!phba)
10289 return -ENOMEM;
10290
10291 /* Perform generic PCI device enabling operation */
10292 error = lpfc_enable_pci_dev(phba);
079b5c91 10293 if (error)
da0436e9 10294 goto out_free_phba;
da0436e9
JS		 10295
10296 /* Set up SLI API function jump table for PCI-device group-0 HBAs */
10297 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP);
10298 if (error)
10299 goto out_disable_pci_dev;
10300
10301 /* Set up SLI-3 specific device PCI memory space */
10302 error = lpfc_sli_pci_mem_setup(phba);
10303 if (error) {
10304 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10305 "1402 Failed to set up pci memory space.\n");
10306 goto out_disable_pci_dev;
10307 }
10308
da0436e9
JS		 10309 /* Set up SLI-3 specific device driver resources */
10310 error = lpfc_sli_driver_resource_setup(phba);
10311 if (error) {
10312 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10313 "1404 Failed to set up driver resource.\n");
10314 goto out_unset_pci_mem_s3;
10315 }
10316
10317 /* Initialize and populate the iocb list per host */
d1f525aa 10318
da0436e9
JS		 10319 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT);
10320 if (error) {
10321 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10322 "1405 Failed to initialize iocb list.\n");
10323 goto out_unset_driver_resource_s3;
10324 }
10325
10326 /* Set up common device driver resources */
10327 error = lpfc_setup_driver_resource_phase2(phba);
10328 if (error) {
10329 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10330 "1406 Failed to set up driver resource.\n");
10331 goto out_free_iocb_list;
10332 }
10333
079b5c91
JS		 10334 /* Get the default values for Model Name and Description */
10335 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
10336
da0436e9
JS		 10337 /* Create SCSI host to the physical port */
10338 error = lpfc_create_shost(phba);
10339 if (error) {
10340 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10341 "1407 Failed to create scsi host.\n");
10342 goto out_unset_driver_resource;
10343 }
10344
10345 /* Configure sysfs attributes */
10346 vport = phba->pport;
10347 error = lpfc_alloc_sysfs_attr(vport);
10348 if (error) {
10349 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10350 "1476 Failed to allocate sysfs attr\n");
10351 goto out_destroy_shost;
10352 }
10353
6669f9bb 10354 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
da0436e9
JS		 10355 /* Now, trying to enable interrupt and bring up the device */
10356 cfg_mode = phba->cfg_use_msi;
10357 while (true) {
10358 /* Put device to a known state before enabling interrupt */
10359 lpfc_stop_port(phba);
10360 /* Configure and enable interrupt */
10361 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode);
10362 if (intr_mode == LPFC_INTR_ERROR) {
10363 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10364 "0431 Failed to enable interrupt.\n");
10365 error = -ENODEV;
10366 goto out_free_sysfs_attr;
10367 }
10368 /* SLI-3 HBA setup */
10369 if (lpfc_sli_hba_setup(phba)) {
10370 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10371 "1477 Failed to set up hba\n");
10372 error = -ENODEV;
10373 goto out_remove_device;
10374 }
10375
10376 /* Wait 50ms for the interrupts of previous mailbox commands */
10377 msleep(50);
10378 /* Check active interrupts on message signaled interrupts */
10379 if (intr_mode == 0 ||
10380 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) {
10381 /* Log the current active interrupt mode */
10382 phba->intr_mode = intr_mode;
10383 lpfc_log_intr_mode(phba, intr_mode);
10384 break;
10385 } else {
10386 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10387 "0447 Configure interrupt mode (%d) "
10388 "failed active interrupt test.\n",
10389 intr_mode);
10390 /* Disable the current interrupt mode */
10391 lpfc_sli_disable_intr(phba);
10392 /* Try next level of interrupt mode */
10393 cfg_mode = --intr_mode;
10394 }
10395 }
10396
10397 /* Perform post initialization setup */
10398 lpfc_post_init_setup(phba);
10399
10400 /* Check if there are static vports to be created. */
10401 lpfc_create_static_vport(phba);
10402
10403 return 0;
10404
10405out_remove_device:
10406 lpfc_unset_hba(phba);
10407out_free_sysfs_attr:
10408 lpfc_free_sysfs_attr(vport);
10409out_destroy_shost:
10410 lpfc_destroy_shost(phba);
10411out_unset_driver_resource:
10412 lpfc_unset_driver_resource_phase2(phba);
10413out_free_iocb_list:
10414 lpfc_free_iocb_list(phba);
10415out_unset_driver_resource_s3:
10416 lpfc_sli_driver_resource_unset(phba);
10417out_unset_pci_mem_s3:
10418 lpfc_sli_pci_mem_unset(phba);
10419out_disable_pci_dev:
10420 lpfc_disable_pci_dev(phba);
6669f9bb
JS		 10421 if (shost)
10422 scsi_host_put(shost);
da0436e9
JS		 10423out_free_phba:
10424 lpfc_hba_free(phba);
10425 return error;
10426}
10427
10428/**
10429 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem.
10430 * @pdev: pointer to PCI device
10431 *
10432 * This routine is to be called to disattach a device with SLI-3 interface
10433 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
10434 * removed from PCI bus, it performs all the necessary cleanup for the HBA
10435 * device to be removed from the PCI subsystem properly.
10436 **/
6f039790 10437static void
da0436e9
JS		 10438lpfc_pci_remove_one_s3(struct pci_dev *pdev)
10439{
10440 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10441 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
10442 struct lpfc_vport **vports;
10443 struct lpfc_hba *phba = vport->phba;
10444 int i;
da0436e9
JS		 10445
10446 spin_lock_irq(&phba->hbalock);
10447 vport->load_flag |= FC_UNLOADING;
10448 spin_unlock_irq(&phba->hbalock);
10449
10450 lpfc_free_sysfs_attr(vport);
10451
10452 /* Release all the vports against this physical port */
10453 vports = lpfc_create_vport_work_array(phba);
10454 if (vports != NULL)
587a37f6
JS		 10455 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
10456 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
10457 continue;
da0436e9 10458 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 10459 }
da0436e9
JS		 10460 lpfc_destroy_vport_work_array(phba, vports);
10461
10462 /* Remove FC host and then SCSI host with the physical port */
10463 fc_remove_host(shost);
10464 scsi_remove_host(shost);
d613b6a7 10465
da0436e9
JS		 10466 lpfc_cleanup(vport);
10467
10468 /*
10469 * Bring down the SLI Layer. This step disable all interrupts,
10470 * clears the rings, discards all mailbox commands, and resets
10471 * the HBA.
10472 */
10473
48e34d0f 10474 /* HBA interrupt will be disabled after this call */
da0436e9
JS		 10475 lpfc_sli_hba_down(phba);
10476 /* Stop kthread signal shall trigger work_done one more time */
10477 kthread_stop(phba->worker_thread);
10478 /* Final cleanup of txcmplq and reset the HBA */
10479 lpfc_sli_brdrestart(phba);
10480
72859909
JS		 10481 kfree(phba->vpi_bmask);
10482 kfree(phba->vpi_ids);
10483
da0436e9
JS		 10484 lpfc_stop_hba_timers(phba);
10485 spin_lock_irq(&phba->hbalock);
10486 list_del_init(&vport->listentry);
10487 spin_unlock_irq(&phba->hbalock);
10488
10489 lpfc_debugfs_terminate(vport);
10490
912e3acd
JS		 10491 /* Disable SR-IOV if enabled */
10492 if (phba->cfg_sriov_nr_virtfn)
10493 pci_disable_sriov(pdev);
10494
da0436e9
JS		 10495 /* Disable interrupt */
10496 lpfc_sli_disable_intr(phba);
10497
da0436e9
JS		 10498 scsi_host_put(shost);
10499
10500 /*
10501 * Call scsi_free before mem_free since scsi bufs are released to their
10502 * corresponding pools here.
10503 */
10504 lpfc_scsi_free(phba);
10505 lpfc_mem_free_all(phba);
10506
10507 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
10508 phba->hbqslimp.virt, phba->hbqslimp.phys);
10509
10510 /* Free resources associated with SLI2 interface */
10511 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
10512 phba->slim2p.virt, phba->slim2p.phys);
10513
10514 /* unmap adapter SLIM and Control Registers */
10515 iounmap(phba->ctrl_regs_memmap_p);
10516 iounmap(phba->slim_memmap_p);
10517
10518 lpfc_hba_free(phba);
10519
e0c0483c 10520 pci_release_mem_regions(pdev);
da0436e9
JS		 10521 pci_disable_device(pdev);
10522}
10523
10524/**
10525 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt
10526 * @pdev: pointer to PCI device
10527 * @msg: power management message
10528 *
10529 * This routine is to be called from the kernel's PCI subsystem to support
10530 * system Power Management (PM) to device with SLI-3 interface spec. When
10531 * PM invokes this method, it quiesces the device by stopping the driver's
10532 * worker thread for the device, turning off device's interrupt and DMA,
10533 * and bring the device offline. Note that as the driver implements the
10534 * minimum PM requirements to a power-aware driver's PM support for the
10535 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
10536 * to the suspend() method call will be treated as SUSPEND and the driver will
10537 * fully reinitialize its device during resume() method call, the driver will
10538 * set device to PCI_D3hot state in PCI config space instead of setting it
10539 * according to the @msg provided by the PM.
10540 *
10541 * Return code
10542 * 0 - driver suspended the device
10543 * Error otherwise
10544 **/
10545static int
10546lpfc_pci_suspend_one_s3(struct pci_dev *pdev, pm_message_t msg)
10547{
10548 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10549 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10550
10551 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10552 "0473 PCI device Power Management suspend.\n");
10553
10554 /* Bring down the device */
618a5230 10555 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS		 10556 lpfc_offline(phba);
10557 kthread_stop(phba->worker_thread);
10558
10559 /* Disable interrupt from device */
10560 lpfc_sli_disable_intr(phba);
10561
10562 /* Save device state to PCI config space */
10563 pci_save_state(pdev);
10564 pci_set_power_state(pdev, PCI_D3hot);
10565
10566 return 0;
10567}
10568
10569/**
10570 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt
10571 * @pdev: pointer to PCI device
10572 *
10573 * This routine is to be called from the kernel's PCI subsystem to support
10574 * system Power Management (PM) to device with SLI-3 interface spec. When PM
10575 * invokes this method, it restores the device's PCI config space state and
10576 * fully reinitializes the device and brings it online. Note that as the
10577 * driver implements the minimum PM requirements to a power-aware driver's
10578 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE,
10579 * FREEZE) to the suspend() method call will be treated as SUSPEND and the
10580 * driver will fully reinitialize its device during resume() method call,
10581 * the device will be set to PCI_D0 directly in PCI config space before
10582 * restoring the state.
10583 *
10584 * Return code
10585 * 0 - driver suspended the device
10586 * Error otherwise
10587 **/
10588static int
10589lpfc_pci_resume_one_s3(struct pci_dev *pdev)
10590{
10591 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10592 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10593 uint32_t intr_mode;
10594 int error;
10595
10596 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10597 "0452 PCI device Power Management resume.\n");
10598
10599 /* Restore device state from PCI config space */
10600 pci_set_power_state(pdev, PCI_D0);
10601 pci_restore_state(pdev);
0d878419 10602
1dfb5a47
JS		 10603 /*
10604 * As the new kernel behavior of pci_restore_state() API call clears
10605 * device saved_state flag, need to save the restored state again.
10606 */
10607 pci_save_state(pdev);
10608
da0436e9
JS		 10609 if (pdev->is_busmaster)
10610 pci_set_master(pdev);
10611
10612 /* Startup the kernel thread for this host adapter. */
10613 phba->worker_thread = kthread_run(lpfc_do_work, phba,
10614 "lpfc_worker_%d", phba->brd_no);
10615 if (IS_ERR(phba->worker_thread)) {
10616 error = PTR_ERR(phba->worker_thread);
10617 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10618 "0434 PM resume failed to start worker "
10619 "thread: error=x%x.\n", error);
10620 return error;
10621 }
10622
10623 /* Configure and enable interrupt */
10624 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
10625 if (intr_mode == LPFC_INTR_ERROR) {
10626 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10627 "0430 PM resume Failed to enable interrupt\n");
10628 return -EIO;
10629 } else
10630 phba->intr_mode = intr_mode;
10631
10632 /* Restart HBA and bring it online */
10633 lpfc_sli_brdrestart(phba);
10634 lpfc_online(phba);
10635
10636 /* Log the current active interrupt mode */
10637 lpfc_log_intr_mode(phba, phba->intr_mode);
10638
10639 return 0;
10640}
10641
891478a2
JS		 10642/**
10643 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover
10644 * @phba: pointer to lpfc hba data structure.
10645 *
10646 * This routine is called to prepare the SLI3 device for PCI slot recover. It
e2af0d2e 10647 * aborts all the outstanding SCSI I/Os to the pci device.
891478a2
JS		 10648 **/
10649static void
10650lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
10651{
10652 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10653 "2723 PCI channel I/O abort preparing for recovery\n");
e2af0d2e
JS		 10654
10655 /*
10656 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
10657 * and let the SCSI mid-layer to retry them to recover.
10658 */
db55fba8 10659 lpfc_sli_abort_fcp_rings(phba);
891478a2
JS		 10660}
10661
0d878419
JS		 10662/**
10663 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset
10664 * @phba: pointer to lpfc hba data structure.
10665 *
10666 * This routine is called to prepare the SLI3 device for PCI slot reset. It
10667 * disables the device interrupt and pci device, and aborts the internal FCP
10668 * pending I/Os.
10669 **/
10670static void
10671lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba)
10672{
0d878419 10673 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10674 "2710 PCI channel disable preparing for reset\n");
e2af0d2e 10675
75baf696 10676 /* Block any management I/Os to the device */
618a5230 10677 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
75baf696 10678
e2af0d2e
JS		 10679 /* Block all SCSI devices' I/Os on the host */
10680 lpfc_scsi_dev_block(phba);
10681
ea714f3d
JS		 10682 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
10683 lpfc_sli_flush_fcp_rings(phba);
10684
e2af0d2e
JS		 10685 /* stop all timers */
10686 lpfc_stop_hba_timers(phba);
10687
0d878419
JS		 10688 /* Disable interrupt and pci device */
10689 lpfc_sli_disable_intr(phba);
10690 pci_disable_device(phba->pcidev);
0d878419
JS		 10691}
10692
10693/**
10694 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable
10695 * @phba: pointer to lpfc hba data structure.
10696 *
10697 * This routine is called to prepare the SLI3 device for PCI slot permanently
10698 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
10699 * pending I/Os.
10700 **/
10701static void
75baf696 10702lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba)
0d878419
JS		 10703{
10704 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10705 "2711 PCI channel permanent disable for failure\n");
e2af0d2e
JS		 10706 /* Block all SCSI devices' I/Os on the host */
10707 lpfc_scsi_dev_block(phba);
10708
10709 /* stop all timers */
10710 lpfc_stop_hba_timers(phba);
10711
0d878419
JS		 10712 /* Clean up all driver's outstanding SCSI I/Os */
10713 lpfc_sli_flush_fcp_rings(phba);
10714}
10715
da0436e9
JS		 10716/**
10717 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error
10718 * @pdev: pointer to PCI device.
10719 * @state: the current PCI connection state.
10720 *
10721 * This routine is called from the PCI subsystem for I/O error handling to
10722 * device with SLI-3 interface spec. This function is called by the PCI
10723 * subsystem after a PCI bus error affecting this device has been detected.
10724 * When this function is invoked, it will need to stop all the I/Os and
10725 * interrupt(s) to the device. Once that is done, it will return
10726 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery
10727 * as desired.
10728 *
10729 * Return codes
0d878419 10730 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link
da0436e9
JS		 10731 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
10732 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
10733 **/
10734static pci_ers_result_t
10735lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
10736{
10737 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10738 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
da0436e9 10739
0d878419
JS		 10740 switch (state) {
10741 case pci_channel_io_normal:
891478a2
JS		 10742 /* Non-fatal error, prepare for recovery */
10743 lpfc_sli_prep_dev_for_recover(phba);
0d878419
JS		 10744 return PCI_ERS_RESULT_CAN_RECOVER;
10745 case pci_channel_io_frozen:
10746 /* Fatal error, prepare for slot reset */
10747 lpfc_sli_prep_dev_for_reset(phba);
10748 return PCI_ERS_RESULT_NEED_RESET;
10749 case pci_channel_io_perm_failure:
10750 /* Permanent failure, prepare for device down */
75baf696 10751 lpfc_sli_prep_dev_for_perm_failure(phba);
da0436e9 10752 return PCI_ERS_RESULT_DISCONNECT;
0d878419
JS		 10753 default:
10754 /* Unknown state, prepare and request slot reset */
10755 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10756 "0472 Unknown PCI error state: x%x\n", state);
10757 lpfc_sli_prep_dev_for_reset(phba);
10758 return PCI_ERS_RESULT_NEED_RESET;
da0436e9 10759 }
da0436e9
JS		 10760}
10761
10762/**
10763 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch.
10764 * @pdev: pointer to PCI device.
10765 *
10766 * This routine is called from the PCI subsystem for error handling to
10767 * device with SLI-3 interface spec. This is called after PCI bus has been
10768 * reset to restart the PCI card from scratch, as if from a cold-boot.
10769 * During the PCI subsystem error recovery, after driver returns
10770 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
10771 * recovery and then call this routine before calling the .resume method
10772 * to recover the device. This function will initialize the HBA device,
10773 * enable the interrupt, but it will just put the HBA to offline state
10774 * without passing any I/O traffic.
10775 *
10776 * Return codes
10777 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
10778 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
10779 */
10780static pci_ers_result_t
10781lpfc_io_slot_reset_s3(struct pci_dev *pdev)
10782{
10783 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10784 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10785 struct lpfc_sli *psli = &phba->sli;
10786 uint32_t intr_mode;
10787
10788 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
10789 if (pci_enable_device_mem(pdev)) {
10790 printk(KERN_ERR "lpfc: Cannot re-enable "
10791 "PCI device after reset.\n");
10792 return PCI_ERS_RESULT_DISCONNECT;
10793 }
10794
10795 pci_restore_state(pdev);
1dfb5a47
JS		 10796
10797 /*
10798 * As the new kernel behavior of pci_restore_state() API call clears
10799 * device saved_state flag, need to save the restored state again.
10800 */
10801 pci_save_state(pdev);
10802
da0436e9
JS		 10803 if (pdev->is_busmaster)
10804 pci_set_master(pdev);
10805
10806 spin_lock_irq(&phba->hbalock);
10807 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
10808 spin_unlock_irq(&phba->hbalock);
10809
10810 /* Configure and enable interrupt */
10811 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
10812 if (intr_mode == LPFC_INTR_ERROR) {
10813 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10814 "0427 Cannot re-enable interrupt after "
10815 "slot reset.\n");
10816 return PCI_ERS_RESULT_DISCONNECT;
10817 } else
10818 phba->intr_mode = intr_mode;
10819
75baf696 10820 /* Take device offline, it will perform cleanup */
618a5230 10821 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS		 10822 lpfc_offline(phba);
10823 lpfc_sli_brdrestart(phba);
10824
10825 /* Log the current active interrupt mode */
10826 lpfc_log_intr_mode(phba, phba->intr_mode);
10827
10828 return PCI_ERS_RESULT_RECOVERED;
10829}
10830
10831/**
10832 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device.
10833 * @pdev: pointer to PCI device
10834 *
10835 * This routine is called from the PCI subsystem for error handling to device
10836 * with SLI-3 interface spec. It is called when kernel error recovery tells
10837 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
10838 * error recovery. After this call, traffic can start to flow from this device
10839 * again.
10840 */
10841static void
10842lpfc_io_resume_s3(struct pci_dev *pdev)
10843{
10844 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10845 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
3772a991 10846
e2af0d2e 10847 /* Bring device online, it will be no-op for non-fatal error resume */
da0436e9 10848 lpfc_online(phba);
0d878419
JS		 10849
10850 /* Clean up Advanced Error Reporting (AER) if needed */
10851 if (phba->hba_flag & HBA_AER_ENABLED)
10852 pci_cleanup_aer_uncorrect_error_status(pdev);
da0436e9 10853}
3772a991 10854
da0436e9
JS		 10855/**
10856 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve
10857 * @phba: pointer to lpfc hba data structure.
10858 *
10859 * returns the number of ELS/CT IOCBs to reserve
10860 **/
10861int
10862lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba)
10863{
10864 int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
10865
f1126688
JS		 10866 if (phba->sli_rev == LPFC_SLI_REV4) {
10867 if (max_xri <= 100)
6a9c52cf 10868 return 10;
f1126688 10869 else if (max_xri <= 256)
6a9c52cf 10870 return 25;
f1126688 10871 else if (max_xri <= 512)
6a9c52cf 10872 return 50;
f1126688 10873 else if (max_xri <= 1024)
6a9c52cf 10874 return 100;
8a9d2e80 10875 else if (max_xri <= 1536)
6a9c52cf 10876 return 150;
8a9d2e80
JS		 10877 else if (max_xri <= 2048)
10878 return 200;
10879 else
10880 return 250;
f1126688
JS		 10881 } else
10882 return 0;
3772a991
JS		 10883}
10884
895427bd
JS		 10885/**
10886 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve
10887 * @phba: pointer to lpfc hba data structure.
10888 *
f358dd0c 10889 * returns the number of ELS/CT + NVMET IOCBs to reserve
895427bd
JS		 10890 **/
10891int
10892lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba)
10893{
10894 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba);
10895
f358dd0c
JS		 10896 if (phba->nvmet_support)
10897 max_xri += LPFC_NVMET_BUF_POST;
895427bd
JS		 10898 return max_xri;
10899}
10900
10901
52d52440
JS		 10902/**
10903 * lpfc_write_firmware - attempt to write a firmware image to the port
52d52440 10904 * @fw: pointer to firmware image returned from request_firmware.
ce396282 10905 * @phba: pointer to lpfc hba data structure.
52d52440 10906 *
52d52440 10907 **/
ce396282
JS		 10908static void
10909lpfc_write_firmware(const struct firmware *fw, void *context)
52d52440 10910{
ce396282 10911 struct lpfc_hba *phba = (struct lpfc_hba *)context;
6b5151fd 10912 char fwrev[FW_REV_STR_SIZE];
ce396282 10913 struct lpfc_grp_hdr *image;
52d52440
JS		 10914 struct list_head dma_buffer_list;
10915 int i, rc = 0;
10916 struct lpfc_dmabuf *dmabuf, *next;
10917 uint32_t offset = 0, temp_offset = 0;
6b6ef5db 10918 uint32_t magic_number, ftype, fid, fsize;
52d52440 10919
c71ab861 10920 /* It can be null in no-wait mode, sanity check */
ce396282
JS		 10921 if (!fw) {
10922 rc = -ENXIO;
10923 goto out;
10924 }
10925 image = (struct lpfc_grp_hdr *)fw->data;
10926
6b6ef5db
JS		 10927 magic_number = be32_to_cpu(image->magic_number);
10928 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image);
10929 fid = bf_get_be32(lpfc_grp_hdr_id, image),
10930 fsize = be32_to_cpu(image->size);
10931
52d52440 10932 INIT_LIST_HEAD(&dma_buffer_list);
6b6ef5db
JS		 10933 if ((magic_number != LPFC_GROUP_OJECT_MAGIC_G5 &&
10934 magic_number != LPFC_GROUP_OJECT_MAGIC_G6) ||
10935 ftype != LPFC_FILE_TYPE_GROUP || fsize != fw->size) {
52d52440
JS		 10936 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10937 "3022 Invalid FW image found. "
efe583c6 10938 "Magic:%x Type:%x ID:%x Size %d %zd\n",
6b6ef5db 10939 magic_number, ftype, fid, fsize, fw->size);
ce396282
JS		 10940 rc = -EINVAL;
10941 goto release_out;
52d52440
JS		 10942 }
10943 lpfc_decode_firmware_rev(phba, fwrev, 1);
88a2cfbb 10944 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) {
52d52440 10945 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
ce396282 10946 "3023 Updating Firmware, Current Version:%s "
52d52440 10947 "New Version:%s\n",
88a2cfbb 10948 fwrev, image->revision);
52d52440
JS		 10949 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) {
10950 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
10951 GFP_KERNEL);
10952 if (!dmabuf) {
10953 rc = -ENOMEM;
ce396282 10954 goto release_out;
52d52440
JS		 10955 }
10956 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
10957 SLI4_PAGE_SIZE,
10958 &dmabuf->phys,
10959 GFP_KERNEL);
10960 if (!dmabuf->virt) {
10961 kfree(dmabuf);
10962 rc = -ENOMEM;
ce396282 10963 goto release_out;
52d52440
JS		 10964 }
10965 list_add_tail(&dmabuf->list, &dma_buffer_list);
10966 }
10967 while (offset < fw->size) {
10968 temp_offset = offset;
10969 list_for_each_entry(dmabuf, &dma_buffer_list, list) {
079b5c91 10970 if (temp_offset + SLI4_PAGE_SIZE > fw->size) {
52d52440
JS		 10971 memcpy(dmabuf->virt,
10972 fw->data + temp_offset,
079b5c91
JS		 10973 fw->size - temp_offset);
10974 temp_offset = fw->size;
52d52440
JS		 10975 break;
10976 }
52d52440
JS		 10977 memcpy(dmabuf->virt, fw->data + temp_offset,
10978 SLI4_PAGE_SIZE);
88a2cfbb 10979 temp_offset += SLI4_PAGE_SIZE;
52d52440
JS		 10980 }
10981 rc = lpfc_wr_object(phba, &dma_buffer_list,
10982 (fw->size - offset), &offset);
ce396282
JS		 10983 if (rc)
10984 goto release_out;
52d52440
JS		 10985 }
10986 rc = offset;
10987 }
ce396282
JS		 10988
10989release_out:
52d52440
JS		 10990 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) {
10991 list_del(&dmabuf->list);
10992 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
10993 dmabuf->virt, dmabuf->phys);
10994 kfree(dmabuf);
10995 }
ce396282
JS		 10996 release_firmware(fw);
10997out:
10998 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
c71ab861 10999 "3024 Firmware update done: %d.\n", rc);
ce396282 11000 return;
52d52440
JS		 11001}
11002
c71ab861
JS		 11003/**
11004 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade
11005 * @phba: pointer to lpfc hba data structure.
11006 *
11007 * This routine is called to perform Linux generic firmware upgrade on device
11008 * that supports such feature.
11009 **/
11010int
11011lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade)
11012{
11013 uint8_t file_name[ELX_MODEL_NAME_SIZE];
11014 int ret;
11015 const struct firmware *fw;
11016
11017 /* Only supported on SLI4 interface type 2 for now */
11018 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
11019 LPFC_SLI_INTF_IF_TYPE_2)
11020 return -EPERM;
11021
11022 snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName);
11023
11024 if (fw_upgrade == INT_FW_UPGRADE) {
11025 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
11026 file_name, &phba->pcidev->dev,
11027 GFP_KERNEL, (void *)phba,
11028 lpfc_write_firmware);
11029 } else if (fw_upgrade == RUN_FW_UPGRADE) {
11030 ret = request_firmware(&fw, file_name, &phba->pcidev->dev);
11031 if (!ret)
11032 lpfc_write_firmware(fw, (void *)phba);
11033 } else {
11034 ret = -EINVAL;
11035 }
11036
11037 return ret;
11038}
11039
3772a991 11040/**
da0436e9 11041 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys
3772a991
JS		 11042 * @pdev: pointer to PCI device
11043 * @pid: pointer to PCI device identifier
11044 *
da0436e9
JS		 11045 * This routine is called from the kernel's PCI subsystem to device with
11046 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991 11047 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
da0436e9
JS		 11048 * information of the device and driver to see if the driver state that it
11049 * can support this kind of device. If the match is successful, the driver
11050 * core invokes this routine. If this routine determines it can claim the HBA,
11051 * it does all the initialization that it needs to do to handle the HBA
11052 * properly.
3772a991
JS		 11053 *
11054 * Return code
11055 * 0 - driver can claim the device
11056 * negative value - driver can not claim the device
11057 **/
6f039790 11058static int
da0436e9 11059lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
3772a991
JS		 11060{
11061 struct lpfc_hba *phba;
11062 struct lpfc_vport *vport = NULL;
6669f9bb 11063 struct Scsi_Host *shost = NULL;
2b7824d0 11064 int error, cnt;
3772a991
JS		 11065 uint32_t cfg_mode, intr_mode;
11066
11067 /* Allocate memory for HBA structure */
11068 phba = lpfc_hba_alloc(pdev);
11069 if (!phba)
11070 return -ENOMEM;
11071
11072 /* Perform generic PCI device enabling operation */
11073 error = lpfc_enable_pci_dev(phba);
079b5c91 11074 if (error)
3772a991 11075 goto out_free_phba;
3772a991 11076
da0436e9
JS		 11077 /* Set up SLI API function jump table for PCI-device group-1 HBAs */
11078 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC);
3772a991
JS		 11079 if (error)
11080 goto out_disable_pci_dev;
11081
da0436e9
JS		 11082 /* Set up SLI-4 specific device PCI memory space */
11083 error = lpfc_sli4_pci_mem_setup(phba);
3772a991
JS		 11084 if (error) {
11085 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11086 "1410 Failed to set up pci memory space.\n");
3772a991
JS		 11087 goto out_disable_pci_dev;
11088 }
11089
da0436e9
JS		 11090 /* Set up SLI-4 Specific device driver resources */
11091 error = lpfc_sli4_driver_resource_setup(phba);
3772a991
JS		 11092 if (error) {
11093 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9
JS		 11094 "1412 Failed to set up driver resource.\n");
11095 goto out_unset_pci_mem_s4;
3772a991
JS		 11096 }
11097
2b7824d0
JS		 11098 cnt = phba->cfg_iocb_cnt * 1024;
11099 if (phba->nvmet_support)
11100 cnt += phba->cfg_nvmet_mrq_post * phba->cfg_nvmet_mrq;
11101
3772a991 11102 /* Initialize and populate the iocb list per host */
2a9bf3d0 11103 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
2b7824d0
JS		 11104 "2821 initialize iocb list %d total %d\n",
11105 phba->cfg_iocb_cnt, cnt);
11106 error = lpfc_init_iocb_list(phba, cnt);
2a9bf3d0 11107
3772a991
JS		 11108 if (error) {
11109 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9
JS		 11110 "1413 Failed to initialize iocb list.\n");
11111 goto out_unset_driver_resource_s4;
3772a991
JS		 11112 }
11113
19ca7609 11114 INIT_LIST_HEAD(&phba->active_rrq_list);
7d791df7 11115 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list);
19ca7609 11116
3772a991
JS		 11117 /* Set up common device driver resources */
11118 error = lpfc_setup_driver_resource_phase2(phba);
11119 if (error) {
11120 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11121 "1414 Failed to set up driver resource.\n");
3772a991
JS		 11122 goto out_free_iocb_list;
11123 }
11124
079b5c91
JS		 11125 /* Get the default values for Model Name and Description */
11126 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
11127
3772a991
JS		 11128 /* Create SCSI host to the physical port */
11129 error = lpfc_create_shost(phba);
11130 if (error) {
11131 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11132 "1415 Failed to create scsi host.\n");
3772a991
JS		 11133 goto out_unset_driver_resource;
11134 }
9399627f 11135
5b75da2f 11136 /* Configure sysfs attributes */
3772a991
JS		 11137 vport = phba->pport;
11138 error = lpfc_alloc_sysfs_attr(vport);
11139 if (error) {
9399627f 11140 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11141 "1416 Failed to allocate sysfs attr\n");
3772a991 11142 goto out_destroy_shost;
98c9ea5c 11143 }
875fbdfe 11144
6669f9bb 11145 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
3772a991 11146 /* Now, trying to enable interrupt and bring up the device */
5b75da2f 11147 cfg_mode = phba->cfg_use_msi;
5b75da2f 11148
7b15db32
JS		 11149 /* Put device to a known state before enabling interrupt */
11150 lpfc_stop_port(phba);
895427bd 11151
7b15db32
JS		 11152 /* Configure and enable interrupt */
11153 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode);
11154 if (intr_mode == LPFC_INTR_ERROR) {
11155 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11156 "0426 Failed to enable interrupt.\n");
11157 error = -ENODEV;
11158 goto out_free_sysfs_attr;
11159 }
11160 /* Default to single EQ for non-MSI-X */
895427bd
JS		 11161 if (phba->intr_type != MSIX) {
11162 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
11163 phba->cfg_fcp_io_channel = 1;
2d7dbc4c 11164 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd 11165 phba->cfg_nvme_io_channel = 1;
2d7dbc4c
JS		 11166 if (phba->nvmet_support)
11167 phba->cfg_nvmet_mrq = 1;
11168 }
895427bd
JS		 11169 phba->io_channel_irqs = 1;
11170 }
11171
7b15db32
JS		 11172 /* Set up SLI-4 HBA */
11173 if (lpfc_sli4_hba_setup(phba)) {
11174 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11175 "1421 Failed to set up hba\n");
11176 error = -ENODEV;
11177 goto out_disable_intr;
98c9ea5c 11178 }
858c9f6c 11179
7b15db32
JS		 11180 /* Log the current active interrupt mode */
11181 phba->intr_mode = intr_mode;
11182 lpfc_log_intr_mode(phba, intr_mode);
11183
3772a991
JS		 11184 /* Perform post initialization setup */
11185 lpfc_post_init_setup(phba);
dea3101e 11186
01649561
JS		 11187 /* NVME support in FW earlier in the driver load corrects the
11188 * FC4 type making a check for nvme_support unnecessary.
11189 */
11190 if ((phba->nvmet_support == 0) &&
11191 (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)) {
11192 /* Create NVME binding with nvme_fc_transport. This
d1f525aa
JS		 11193 * ensures the vport is initialized. If the localport
11194 * create fails, it should not unload the driver to
11195 * support field issues.
01649561
JS		 11196 */
11197 error = lpfc_nvme_create_localport(vport);
11198 if (error) {
11199 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11200 "6004 NVME registration failed, "
11201 "error x%x\n",
11202 error);
01649561
JS		 11203 }
11204 }
895427bd 11205
c71ab861
JS		 11206 /* check for firmware upgrade or downgrade */
11207 if (phba->cfg_request_firmware_upgrade)
db6f1c2f 11208 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE);
52d52440 11209
1c6834a7
JS		 11210 /* Check if there are static vports to be created. */
11211 lpfc_create_static_vport(phba);
dea3101e 11212 return 0;
11213
da0436e9
JS		 11214out_disable_intr:
11215 lpfc_sli4_disable_intr(phba);
5b75da2f
JS		 11216out_free_sysfs_attr:
11217 lpfc_free_sysfs_attr(vport);
3772a991
JS		 11218out_destroy_shost:
11219 lpfc_destroy_shost(phba);
11220out_unset_driver_resource:
11221 lpfc_unset_driver_resource_phase2(phba);
11222out_free_iocb_list:
11223 lpfc_free_iocb_list(phba);
da0436e9
JS		 11224out_unset_driver_resource_s4:
11225 lpfc_sli4_driver_resource_unset(phba);
11226out_unset_pci_mem_s4:
11227 lpfc_sli4_pci_mem_unset(phba);
3772a991
JS		 11228out_disable_pci_dev:
11229 lpfc_disable_pci_dev(phba);
6669f9bb
JS		 11230 if (shost)
11231 scsi_host_put(shost);
2e0fef85 11232out_free_phba:
3772a991 11233 lpfc_hba_free(phba);
dea3101e 11234 return error;
11235}
11236
e59058c4 11237/**
da0436e9 11238 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem
e59058c4
JS		 11239 * @pdev: pointer to PCI device
11240 *
da0436e9
JS		 11241 * This routine is called from the kernel's PCI subsystem to device with
11242 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991
JS		 11243 * removed from PCI bus, it performs all the necessary cleanup for the HBA
11244 * device to be removed from the PCI subsystem properly.
e59058c4 11245 **/
6f039790 11246static void
da0436e9 11247lpfc_pci_remove_one_s4(struct pci_dev *pdev)
dea3101e 11248{
da0436e9 11249 struct Scsi_Host *shost = pci_get_drvdata(pdev);
2e0fef85 11250 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
eada272d 11251 struct lpfc_vport **vports;
da0436e9 11252 struct lpfc_hba *phba = vport->phba;
eada272d 11253 int i;
8a4df120 11254
da0436e9 11255 /* Mark the device unloading flag */
549e55cd 11256 spin_lock_irq(&phba->hbalock);
51ef4c26 11257 vport->load_flag |= FC_UNLOADING;
549e55cd 11258 spin_unlock_irq(&phba->hbalock);
2e0fef85 11259
da0436e9 11260 /* Free the HBA sysfs attributes */
858c9f6c
JS		 11261 lpfc_free_sysfs_attr(vport);
11262
eada272d
JS		 11263 /* Release all the vports against this physical port */
11264 vports = lpfc_create_vport_work_array(phba);
11265 if (vports != NULL)
587a37f6
JS		 11266 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
11267 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
11268 continue;
eada272d 11269 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 11270 }
eada272d
JS		 11271 lpfc_destroy_vport_work_array(phba, vports);
11272
11273 /* Remove FC host and then SCSI host with the physical port */
858c9f6c
JS		 11274 fc_remove_host(shost);
11275 scsi_remove_host(shost);
da0436e9 11276
d613b6a7
JS		 11277 /* Perform ndlp cleanup on the physical port. The nvme and nvmet
11278 * localports are destroyed after to cleanup all transport memory.
895427bd 11279 */
87af33fe 11280 lpfc_cleanup(vport);
d613b6a7
JS		 11281 lpfc_nvmet_destroy_targetport(phba);
11282 lpfc_nvme_destroy_localport(vport);
87af33fe 11283
2e0fef85 11284 /*
da0436e9 11285 * Bring down the SLI Layer. This step disables all interrupts,
2e0fef85 11286 * clears the rings, discards all mailbox commands, and resets
da0436e9 11287 * the HBA FCoE function.
2e0fef85 11288 */
da0436e9
JS		 11289 lpfc_debugfs_terminate(vport);
11290 lpfc_sli4_hba_unset(phba);
a257bf90 11291
858c9f6c
JS		 11292 spin_lock_irq(&phba->hbalock);
11293 list_del_init(&vport->listentry);
11294 spin_unlock_irq(&phba->hbalock);
11295
3677a3a7 11296 /* Perform scsi free before driver resource_unset since scsi
da0436e9 11297 * buffers are released to their corresponding pools here.
2e0fef85
JS		 11298 */
11299 lpfc_scsi_free(phba);
895427bd 11300 lpfc_nvme_free(phba);
01649561 11301 lpfc_free_iocb_list(phba);
67d12733 11302
da0436e9 11303 lpfc_sli4_driver_resource_unset(phba);
ed957684 11304
da0436e9
JS		 11305 /* Unmap adapter Control and Doorbell registers */
11306 lpfc_sli4_pci_mem_unset(phba);
2e0fef85 11307
da0436e9
JS		 11308 /* Release PCI resources and disable device's PCI function */
11309 scsi_host_put(shost);
11310 lpfc_disable_pci_dev(phba);
2e0fef85 11311
da0436e9 11312 /* Finally, free the driver's device data structure */
3772a991 11313 lpfc_hba_free(phba);
2e0fef85 11314
da0436e9 11315 return;
dea3101e 11316}
11317
3a55b532 11318/**
da0436e9 11319 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt
3a55b532
JS		 11320 * @pdev: pointer to PCI device
11321 * @msg: power management message
11322 *
da0436e9
JS		 11323 * This routine is called from the kernel's PCI subsystem to support system
11324 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes
11325 * this method, it quiesces the device by stopping the driver's worker
11326 * thread for the device, turning off device's interrupt and DMA, and bring
11327 * the device offline. Note that as the driver implements the minimum PM
11328 * requirements to a power-aware driver's PM support for suspend/resume -- all
11329 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend()
11330 * method call will be treated as SUSPEND and the driver will fully
11331 * reinitialize its device during resume() method call, the driver will set
11332 * device to PCI_D3hot state in PCI config space instead of setting it
3772a991 11333 * according to the @msg provided by the PM.
3a55b532
JS		 11334 *
11335 * Return code
3772a991
JS		 11336 * 0 - driver suspended the device
11337 * Error otherwise
3a55b532
JS		 11338 **/
11339static int
da0436e9 11340lpfc_pci_suspend_one_s4(struct pci_dev *pdev, pm_message_t msg)
3a55b532
JS		 11341{
11342 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11343 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11344
11345 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
75baf696 11346 "2843 PCI device Power Management suspend.\n");
3a55b532
JS		 11347
11348 /* Bring down the device */
618a5230 11349 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
3a55b532
JS		 11350 lpfc_offline(phba);
11351 kthread_stop(phba->worker_thread);
11352
11353 /* Disable interrupt from device */
da0436e9 11354 lpfc_sli4_disable_intr(phba);
5350d872 11355 lpfc_sli4_queue_destroy(phba);
3a55b532
JS		 11356
11357 /* Save device state to PCI config space */
11358 pci_save_state(pdev);
11359 pci_set_power_state(pdev, PCI_D3hot);
11360
11361 return 0;
11362}
11363
11364/**
da0436e9 11365 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt
3a55b532
JS		 11366 * @pdev: pointer to PCI device
11367 *
da0436e9
JS		 11368 * This routine is called from the kernel's PCI subsystem to support system
11369 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes
11370 * this method, it restores the device's PCI config space state and fully
11371 * reinitializes the device and brings it online. Note that as the driver
11372 * implements the minimum PM requirements to a power-aware driver's PM for
11373 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
11374 * to the suspend() method call will be treated as SUSPEND and the driver
11375 * will fully reinitialize its device during resume() method call, the device
11376 * will be set to PCI_D0 directly in PCI config space before restoring the
11377 * state.
3a55b532
JS		 11378 *
11379 * Return code
3772a991
JS		 11380 * 0 - driver suspended the device
11381 * Error otherwise
3a55b532
JS		 11382 **/
11383static int
da0436e9 11384lpfc_pci_resume_one_s4(struct pci_dev *pdev)
3a55b532
JS		 11385{
11386 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11387 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
5b75da2f 11388 uint32_t intr_mode;
3a55b532
JS		 11389 int error;
11390
11391 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
da0436e9 11392 "0292 PCI device Power Management resume.\n");
3a55b532
JS		 11393
11394 /* Restore device state from PCI config space */
11395 pci_set_power_state(pdev, PCI_D0);
11396 pci_restore_state(pdev);
1dfb5a47
JS		 11397
11398 /*
11399 * As the new kernel behavior of pci_restore_state() API call clears
11400 * device saved_state flag, need to save the restored state again.
11401 */
11402 pci_save_state(pdev);
11403
3a55b532
JS		 11404 if (pdev->is_busmaster)
11405 pci_set_master(pdev);
11406
da0436e9 11407 /* Startup the kernel thread for this host adapter. */
3a55b532
JS		 11408 phba->worker_thread = kthread_run(lpfc_do_work, phba,
11409 "lpfc_worker_%d", phba->brd_no);
11410 if (IS_ERR(phba->worker_thread)) {
11411 error = PTR_ERR(phba->worker_thread);
11412 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11413 "0293 PM resume failed to start worker "
3a55b532
JS		 11414 "thread: error=x%x.\n", error);
11415 return error;
11416 }
11417
5b75da2f 11418 /* Configure and enable interrupt */
da0436e9 11419 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
5b75da2f 11420 if (intr_mode == LPFC_INTR_ERROR) {
3a55b532 11421 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11422 "0294 PM resume Failed to enable interrupt\n");
5b75da2f
JS		 11423 return -EIO;
11424 } else
11425 phba->intr_mode = intr_mode;
3a55b532
JS		 11426
11427 /* Restart HBA and bring it online */
11428 lpfc_sli_brdrestart(phba);
11429 lpfc_online(phba);
11430
5b75da2f
JS		 11431 /* Log the current active interrupt mode */
11432 lpfc_log_intr_mode(phba, phba->intr_mode);
11433
3a55b532
JS		 11434 return 0;
11435}
11436
75baf696
JS		 11437/**
11438 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover
11439 * @phba: pointer to lpfc hba data structure.
11440 *
11441 * This routine is called to prepare the SLI4 device for PCI slot recover. It
11442 * aborts all the outstanding SCSI I/Os to the pci device.
11443 **/
11444static void
11445lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba)
11446{
75baf696
JS		 11447 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11448 "2828 PCI channel I/O abort preparing for recovery\n");
11449 /*
11450 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
11451 * and let the SCSI mid-layer to retry them to recover.
11452 */
db55fba8 11453 lpfc_sli_abort_fcp_rings(phba);
75baf696
JS		 11454}
11455
11456/**
11457 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset
11458 * @phba: pointer to lpfc hba data structure.
11459 *
11460 * This routine is called to prepare the SLI4 device for PCI slot reset. It
11461 * disables the device interrupt and pci device, and aborts the internal FCP
11462 * pending I/Os.
11463 **/
11464static void
11465lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba)
11466{
11467 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11468 "2826 PCI channel disable preparing for reset\n");
11469
11470 /* Block any management I/Os to the device */
618a5230 11471 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT);
75baf696
JS		 11472
11473 /* Block all SCSI devices' I/Os on the host */
11474 lpfc_scsi_dev_block(phba);
11475
ea714f3d
JS		 11476 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
11477 lpfc_sli_flush_fcp_rings(phba);
11478
75baf696
JS		 11479 /* stop all timers */
11480 lpfc_stop_hba_timers(phba);
11481
11482 /* Disable interrupt and pci device */
11483 lpfc_sli4_disable_intr(phba);
5350d872 11484 lpfc_sli4_queue_destroy(phba);
75baf696 11485 pci_disable_device(phba->pcidev);
75baf696
JS		 11486}
11487
11488/**
11489 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable
11490 * @phba: pointer to lpfc hba data structure.
11491 *
11492 * This routine is called to prepare the SLI4 device for PCI slot permanently
11493 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
11494 * pending I/Os.
11495 **/
11496static void
11497lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba)
11498{
11499 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11500 "2827 PCI channel permanent disable for failure\n");
11501
11502 /* Block all SCSI devices' I/Os on the host */
11503 lpfc_scsi_dev_block(phba);
11504
11505 /* stop all timers */
11506 lpfc_stop_hba_timers(phba);
11507
11508 /* Clean up all driver's outstanding SCSI I/Os */
11509 lpfc_sli_flush_fcp_rings(phba);
11510}
11511
8d63f375 11512/**
da0436e9 11513 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device
e59058c4
JS		 11514 * @pdev: pointer to PCI device.
11515 * @state: the current PCI connection state.
8d63f375 11516 *
da0436e9
JS		 11517 * This routine is called from the PCI subsystem for error handling to device
11518 * with SLI-4 interface spec. This function is called by the PCI subsystem
11519 * after a PCI bus error affecting this device has been detected. When this
11520 * function is invoked, it will need to stop all the I/Os and interrupt(s)
11521 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET
11522 * for the PCI subsystem to perform proper recovery as desired.
e59058c4
JS		 11523 *
11524 * Return codes
3772a991
JS		 11525 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
11526 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
e59058c4 11527 **/
3772a991 11528static pci_ers_result_t
da0436e9 11529lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state)
8d63f375 11530{
75baf696
JS		 11531 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11532 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11533
11534 switch (state) {
11535 case pci_channel_io_normal:
11536 /* Non-fatal error, prepare for recovery */
11537 lpfc_sli4_prep_dev_for_recover(phba);
11538 return PCI_ERS_RESULT_CAN_RECOVER;
11539 case pci_channel_io_frozen:
11540 /* Fatal error, prepare for slot reset */
11541 lpfc_sli4_prep_dev_for_reset(phba);
11542 return PCI_ERS_RESULT_NEED_RESET;
11543 case pci_channel_io_perm_failure:
11544 /* Permanent failure, prepare for device down */
11545 lpfc_sli4_prep_dev_for_perm_failure(phba);
11546 return PCI_ERS_RESULT_DISCONNECT;
11547 default:
11548 /* Unknown state, prepare and request slot reset */
11549 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11550 "2825 Unknown PCI error state: x%x\n", state);
11551 lpfc_sli4_prep_dev_for_reset(phba);
11552 return PCI_ERS_RESULT_NEED_RESET;
11553 }
8d63f375
LV		 11554}
11555
11556/**
da0436e9 11557 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch
e59058c4
JS		 11558 * @pdev: pointer to PCI device.
11559 *
da0436e9
JS		 11560 * This routine is called from the PCI subsystem for error handling to device
11561 * with SLI-4 interface spec. It is called after PCI bus has been reset to
11562 * restart the PCI card from scratch, as if from a cold-boot. During the
11563 * PCI subsystem error recovery, after the driver returns
3772a991 11564 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
da0436e9
JS		 11565 * recovery and then call this routine before calling the .resume method to
11566 * recover the device. This function will initialize the HBA device, enable
11567 * the interrupt, but it will just put the HBA to offline state without
11568 * passing any I/O traffic.
8d63f375 11569 *
e59058c4 11570 * Return codes
3772a991
JS		 11571 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11572 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
8d63f375 11573 */
3772a991 11574static pci_ers_result_t
da0436e9 11575lpfc_io_slot_reset_s4(struct pci_dev *pdev)
8d63f375 11576{
75baf696
JS		 11577 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11578 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11579 struct lpfc_sli *psli = &phba->sli;
11580 uint32_t intr_mode;
11581
11582 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
11583 if (pci_enable_device_mem(pdev)) {
11584 printk(KERN_ERR "lpfc: Cannot re-enable "
11585 "PCI device after reset.\n");
11586 return PCI_ERS_RESULT_DISCONNECT;
11587 }
11588
11589 pci_restore_state(pdev);
0a96e975
JS		 11590
11591 /*
11592 * As the new kernel behavior of pci_restore_state() API call clears
11593 * device saved_state flag, need to save the restored state again.
11594 */
11595 pci_save_state(pdev);
11596
75baf696
JS		 11597 if (pdev->is_busmaster)
11598 pci_set_master(pdev);
11599
11600 spin_lock_irq(&phba->hbalock);
11601 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
11602 spin_unlock_irq(&phba->hbalock);
11603
11604 /* Configure and enable interrupt */
11605 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
11606 if (intr_mode == LPFC_INTR_ERROR) {
11607 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11608 "2824 Cannot re-enable interrupt after "
11609 "slot reset.\n");
11610 return PCI_ERS_RESULT_DISCONNECT;
11611 } else
11612 phba->intr_mode = intr_mode;
11613
11614 /* Log the current active interrupt mode */
11615 lpfc_log_intr_mode(phba, phba->intr_mode);
11616
8d63f375
LV		 11617 return PCI_ERS_RESULT_RECOVERED;
11618}
11619
11620/**
da0436e9 11621 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device
e59058c4 11622 * @pdev: pointer to PCI device
8d63f375 11623 *
3772a991 11624 * This routine is called from the PCI subsystem for error handling to device
da0436e9 11625 * with SLI-4 interface spec. It is called when kernel error recovery tells
3772a991
JS		 11626 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
11627 * error recovery. After this call, traffic can start to flow from this device
11628 * again.
da0436e9 11629 **/
3772a991 11630static void
da0436e9 11631lpfc_io_resume_s4(struct pci_dev *pdev)
8d63f375 11632{
75baf696
JS		 11633 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11634 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11635
11636 /*
11637 * In case of slot reset, as function reset is performed through
11638 * mailbox command which needs DMA to be enabled, this operation
11639 * has to be moved to the io resume phase. Taking device offline
11640 * will perform the necessary cleanup.
11641 */
11642 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) {
11643 /* Perform device reset */
618a5230 11644 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
75baf696
JS		 11645 lpfc_offline(phba);
11646 lpfc_sli_brdrestart(phba);
11647 /* Bring the device back online */
11648 lpfc_online(phba);
11649 }
11650
11651 /* Clean up Advanced Error Reporting (AER) if needed */
11652 if (phba->hba_flag & HBA_AER_ENABLED)
11653 pci_cleanup_aer_uncorrect_error_status(pdev);
8d63f375
LV		 11654}
11655
3772a991
JS		 11656/**
11657 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem
11658 * @pdev: pointer to PCI device
11659 * @pid: pointer to PCI device identifier
11660 *
11661 * This routine is to be registered to the kernel's PCI subsystem. When an
11662 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks
11663 * at PCI device-specific information of the device and driver to see if the
11664 * driver state that it can support this kind of device. If the match is
11665 * successful, the driver core invokes this routine. This routine dispatches
11666 * the action to the proper SLI-3 or SLI-4 device probing routine, which will
11667 * do all the initialization that it needs to do to handle the HBA device
11668 * properly.
11669 *
11670 * Return code
11671 * 0 - driver can claim the device
11672 * negative value - driver can not claim the device
11673 **/
6f039790 11674static int
3772a991
JS		 11675lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
11676{
11677 int rc;
8fa38513 11678 struct lpfc_sli_intf intf;
3772a991 11679
28baac74 11680 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
3772a991
JS		 11681 return -ENODEV;
11682
8fa38513 11683 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
28baac74 11684 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
da0436e9 11685 rc = lpfc_pci_probe_one_s4(pdev, pid);
8fa38513 11686 else
3772a991 11687 rc = lpfc_pci_probe_one_s3(pdev, pid);
8fa38513 11688
3772a991
JS		 11689 return rc;
11690}
11691
11692/**
11693 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem
11694 * @pdev: pointer to PCI device
11695 *
11696 * This routine is to be registered to the kernel's PCI subsystem. When an
11697 * Emulex HBA is removed from PCI bus, the driver core invokes this routine.
11698 * This routine dispatches the action to the proper SLI-3 or SLI-4 device
11699 * remove routine, which will perform all the necessary cleanup for the
11700 * device to be removed from the PCI subsystem properly.
11701 **/
6f039790 11702static void
3772a991
JS		 11703lpfc_pci_remove_one(struct pci_dev *pdev)
11704{
11705 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11706 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11707
11708 switch (phba->pci_dev_grp) {
11709 case LPFC_PCI_DEV_LP:
11710 lpfc_pci_remove_one_s3(pdev);
11711 break;
da0436e9
JS		 11712 case LPFC_PCI_DEV_OC:
11713 lpfc_pci_remove_one_s4(pdev);
11714 break;
3772a991
JS		 11715 default:
11716 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11717 "1424 Invalid PCI device group: 0x%x\n",
11718 phba->pci_dev_grp);
11719 break;
11720 }
11721 return;
11722}
11723
11724/**
11725 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management
11726 * @pdev: pointer to PCI device
11727 * @msg: power management message
11728 *
11729 * This routine is to be registered to the kernel's PCI subsystem to support
11730 * system Power Management (PM). When PM invokes this method, it dispatches
11731 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will
11732 * suspend the device.
11733 *
11734 * Return code
11735 * 0 - driver suspended the device
11736 * Error otherwise
11737 **/
11738static int
11739lpfc_pci_suspend_one(struct pci_dev *pdev, pm_message_t msg)
11740{
11741 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11742 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11743 int rc = -ENODEV;
11744
11745 switch (phba->pci_dev_grp) {
11746 case LPFC_PCI_DEV_LP:
11747 rc = lpfc_pci_suspend_one_s3(pdev, msg);
11748 break;
da0436e9
JS		 11749 case LPFC_PCI_DEV_OC:
11750 rc = lpfc_pci_suspend_one_s4(pdev, msg);
11751 break;
3772a991
JS		 11752 default:
11753 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11754 "1425 Invalid PCI device group: 0x%x\n",
11755 phba->pci_dev_grp);
11756 break;
11757 }
11758 return rc;
11759}
11760
11761/**
11762 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management
11763 * @pdev: pointer to PCI device
11764 *
11765 * This routine is to be registered to the kernel's PCI subsystem to support
11766 * system Power Management (PM). When PM invokes this method, it dispatches
11767 * the action to the proper SLI-3 or SLI-4 device resume routine, which will
11768 * resume the device.
11769 *
11770 * Return code
11771 * 0 - driver suspended the device
11772 * Error otherwise
11773 **/
11774static int
11775lpfc_pci_resume_one(struct pci_dev *pdev)
11776{
11777 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11778 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11779 int rc = -ENODEV;
11780
11781 switch (phba->pci_dev_grp) {
11782 case LPFC_PCI_DEV_LP:
11783 rc = lpfc_pci_resume_one_s3(pdev);
11784 break;
da0436e9
JS		 11785 case LPFC_PCI_DEV_OC:
11786 rc = lpfc_pci_resume_one_s4(pdev);
11787 break;
3772a991
JS		 11788 default:
11789 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11790 "1426 Invalid PCI device group: 0x%x\n",
11791 phba->pci_dev_grp);
11792 break;
11793 }
11794 return rc;
11795}
11796
11797/**
11798 * lpfc_io_error_detected - lpfc method for handling PCI I/O error
11799 * @pdev: pointer to PCI device.
11800 * @state: the current PCI connection state.
11801 *
11802 * This routine is registered to the PCI subsystem for error handling. This
11803 * function is called by the PCI subsystem after a PCI bus error affecting
11804 * this device has been detected. When this routine is invoked, it dispatches
11805 * the action to the proper SLI-3 or SLI-4 device error detected handling
11806 * routine, which will perform the proper error detected operation.
11807 *
11808 * Return codes
11809 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
11810 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
11811 **/
11812static pci_ers_result_t
11813lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
11814{
11815 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11816 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11817 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
11818
11819 switch (phba->pci_dev_grp) {
11820 case LPFC_PCI_DEV_LP:
11821 rc = lpfc_io_error_detected_s3(pdev, state);
11822 break;
da0436e9
JS		 11823 case LPFC_PCI_DEV_OC:
11824 rc = lpfc_io_error_detected_s4(pdev, state);
11825 break;
3772a991
JS		 11826 default:
11827 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11828 "1427 Invalid PCI device group: 0x%x\n",
11829 phba->pci_dev_grp);
11830 break;
11831 }
11832 return rc;
11833}
11834
11835/**
11836 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch
11837 * @pdev: pointer to PCI device.
11838 *
11839 * This routine is registered to the PCI subsystem for error handling. This
11840 * function is called after PCI bus has been reset to restart the PCI card
11841 * from scratch, as if from a cold-boot. When this routine is invoked, it
11842 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling
11843 * routine, which will perform the proper device reset.
11844 *
11845 * Return codes
11846 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11847 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
11848 **/
11849static pci_ers_result_t
11850lpfc_io_slot_reset(struct pci_dev *pdev)
11851{
11852 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11853 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11854 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
11855
11856 switch (phba->pci_dev_grp) {
11857 case LPFC_PCI_DEV_LP:
11858 rc = lpfc_io_slot_reset_s3(pdev);
11859 break;
da0436e9
JS		 11860 case LPFC_PCI_DEV_OC:
11861 rc = lpfc_io_slot_reset_s4(pdev);
11862 break;
3772a991
JS		 11863 default:
11864 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11865 "1428 Invalid PCI device group: 0x%x\n",
11866 phba->pci_dev_grp);
11867 break;
11868 }
11869 return rc;
11870}
11871
11872/**
11873 * lpfc_io_resume - lpfc method for resuming PCI I/O operation
11874 * @pdev: pointer to PCI device
11875 *
11876 * This routine is registered to the PCI subsystem for error handling. It
11877 * is called when kernel error recovery tells the lpfc driver that it is
11878 * OK to resume normal PCI operation after PCI bus error recovery. When
11879 * this routine is invoked, it dispatches the action to the proper SLI-3
11880 * or SLI-4 device io_resume routine, which will resume the device operation.
11881 **/
11882static void
11883lpfc_io_resume(struct pci_dev *pdev)
11884{
11885 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11886 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11887
11888 switch (phba->pci_dev_grp) {
11889 case LPFC_PCI_DEV_LP:
11890 lpfc_io_resume_s3(pdev);
11891 break;
da0436e9
JS		 11892 case LPFC_PCI_DEV_OC:
11893 lpfc_io_resume_s4(pdev);
11894 break;
3772a991
JS		 11895 default:
11896 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11897 "1429 Invalid PCI device group: 0x%x\n",
11898 phba->pci_dev_grp);
11899 break;
11900 }
11901 return;
11902}
11903
1ba981fd
JS		 11904/**
11905 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter
11906 * @phba: pointer to lpfc hba data structure.
11907 *
11908 * This routine checks to see if OAS is supported for this adapter. If
11909 * supported, the configure Flash Optimized Fabric flag is set. Otherwise,
11910 * the enable oas flag is cleared and the pool created for OAS device data
11911 * is destroyed.
11912 *
11913 **/
11914void
11915lpfc_sli4_oas_verify(struct lpfc_hba *phba)
11916{
11917
11918 if (!phba->cfg_EnableXLane)
11919 return;
11920
11921 if (phba->sli4_hba.pc_sli4_params.oas_supported) {
11922 phba->cfg_fof = 1;
11923 } else {
f38fa0bb 11924 phba->cfg_fof = 0;
1ba981fd
JS		 11925 if (phba->device_data_mem_pool)
11926 mempool_destroy(phba->device_data_mem_pool);
11927 phba->device_data_mem_pool = NULL;
11928 }
11929
11930 return;
11931}
11932
11933/**
11934 * lpfc_fof_queue_setup - Set up all the fof queues
11935 * @phba: pointer to lpfc hba data structure.
11936 *
11937 * This routine is invoked to set up all the fof queues for the FC HBA
11938 * operation.
11939 *
11940 * Return codes
11941 * 0 - successful
11942 * -ENOMEM - No available memory
11943 **/
11944int
11945lpfc_fof_queue_setup(struct lpfc_hba *phba)
11946{
895427bd 11947 struct lpfc_sli_ring *pring;
1ba981fd
JS		 11948 int rc;
11949
11950 rc = lpfc_eq_create(phba, phba->sli4_hba.fof_eq, LPFC_MAX_IMAX);
11951 if (rc)
11952 return -ENOMEM;
11953
f38fa0bb 11954 if (phba->cfg_fof) {
1ba981fd
JS		 11955
11956 rc = lpfc_cq_create(phba, phba->sli4_hba.oas_cq,
11957 phba->sli4_hba.fof_eq, LPFC_WCQ, LPFC_FCP);
11958 if (rc)
11959 goto out_oas_cq;
11960
11961 rc = lpfc_wq_create(phba, phba->sli4_hba.oas_wq,
11962 phba->sli4_hba.oas_cq, LPFC_FCP);
11963 if (rc)
11964 goto out_oas_wq;
11965
895427bd
JS		 11966 /* Bind this CQ/WQ to the NVME ring */
11967 pring = phba->sli4_hba.oas_wq->pring;
11968 pring->sli.sli4.wqp =
11969 (void *)phba->sli4_hba.oas_wq;
11970 phba->sli4_hba.oas_cq->pring = pring;
1ba981fd
JS		 11971 }
11972
11973 return 0;
11974
11975out_oas_wq:
f38fa0bb 11976 lpfc_cq_destroy(phba, phba->sli4_hba.oas_cq);
1ba981fd
JS		 11977out_oas_cq:
11978 lpfc_eq_destroy(phba, phba->sli4_hba.fof_eq);
11979 return rc;
11980
11981}
11982
11983/**
11984 * lpfc_fof_queue_create - Create all the fof queues
11985 * @phba: pointer to lpfc hba data structure.
11986 *
11987 * This routine is invoked to allocate all the fof queues for the FC HBA
11988 * operation. For each SLI4 queue type, the parameters such as queue entry
11989 * count (queue depth) shall be taken from the module parameter. For now,
11990 * we just use some constant number as place holder.
11991 *
11992 * Return codes
11993 * 0 - successful
11994 * -ENOMEM - No availble memory
11995 * -EIO - The mailbox failed to complete successfully.
11996 **/
11997int
11998lpfc_fof_queue_create(struct lpfc_hba *phba)
11999{
12000 struct lpfc_queue *qdesc;
12001
12002 /* Create FOF EQ */
12003 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.eq_esize,
12004 phba->sli4_hba.eq_ecount);
12005 if (!qdesc)
12006 goto out_error;
12007
12008 phba->sli4_hba.fof_eq = qdesc;
12009
f38fa0bb 12010 if (phba->cfg_fof) {
1ba981fd
JS		 12011
12012 /* Create OAS CQ */
12013 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.cq_esize,
12014 phba->sli4_hba.cq_ecount);
12015 if (!qdesc)
12016 goto out_error;
12017
12018 phba->sli4_hba.oas_cq = qdesc;
12019
12020 /* Create OAS WQ */
12021 qdesc = lpfc_sli4_queue_alloc(phba, phba->sli4_hba.wq_esize,
12022 phba->sli4_hba.wq_ecount);
12023 if (!qdesc)
12024 goto out_error;
12025
12026 phba->sli4_hba.oas_wq = qdesc;
895427bd 12027 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
1ba981fd
JS		 12028
12029 }
12030 return 0;
12031
12032out_error:
12033 lpfc_fof_queue_destroy(phba);
12034 return -ENOMEM;
12035}
12036
12037/**
12038 * lpfc_fof_queue_destroy - Destroy all the fof queues
12039 * @phba: pointer to lpfc hba data structure.
12040 *
12041 * This routine is invoked to release all the SLI4 queues with the FC HBA
12042 * operation.
12043 *
12044 * Return codes
12045 * 0 - successful
12046 **/
12047int
12048lpfc_fof_queue_destroy(struct lpfc_hba *phba)
12049{
12050 /* Release FOF Event queue */
12051 if (phba->sli4_hba.fof_eq != NULL) {
12052 lpfc_sli4_queue_free(phba->sli4_hba.fof_eq);
12053 phba->sli4_hba.fof_eq = NULL;
12054 }
12055
12056 /* Release OAS Completion queue */
12057 if (phba->sli4_hba.oas_cq != NULL) {
12058 lpfc_sli4_queue_free(phba->sli4_hba.oas_cq);
12059 phba->sli4_hba.oas_cq = NULL;
12060 }
12061
12062 /* Release OAS Work queue */
12063 if (phba->sli4_hba.oas_wq != NULL) {
12064 lpfc_sli4_queue_free(phba->sli4_hba.oas_wq);
12065 phba->sli4_hba.oas_wq = NULL;
12066 }
12067 return 0;
12068}
12069
dea3101e 12070MODULE_DEVICE_TABLE(pci, lpfc_id_table);
12071
a55b2d21 12072static const struct pci_error_handlers lpfc_err_handler = {
8d63f375
LV		 12073 .error_detected = lpfc_io_error_detected,
12074 .slot_reset = lpfc_io_slot_reset,
12075 .resume = lpfc_io_resume,
12076};
12077
dea3101e 12078static struct pci_driver lpfc_driver = {
12079 .name = LPFC_DRIVER_NAME,
12080 .id_table = lpfc_id_table,
12081 .probe = lpfc_pci_probe_one,
6f039790 12082 .remove = lpfc_pci_remove_one,
85e8a239 12083 .shutdown = lpfc_pci_remove_one,
3a55b532 12084 .suspend = lpfc_pci_suspend_one,
3772a991 12085 .resume = lpfc_pci_resume_one,
2e0fef85 12086 .err_handler = &lpfc_err_handler,
dea3101e 12087};
12088
3ef6d24c 12089static const struct file_operations lpfc_mgmt_fop = {
858feacd 12090 .owner = THIS_MODULE,
3ef6d24c
JS		 12091};
12092
12093static struct miscdevice lpfc_mgmt_dev = {
12094 .minor = MISC_DYNAMIC_MINOR,
12095 .name = "lpfcmgmt",
12096 .fops = &lpfc_mgmt_fop,
12097};
12098
e59058c4 12099/**
3621a710 12100 * lpfc_init - lpfc module initialization routine
e59058c4
JS		 12101 *
12102 * This routine is to be invoked when the lpfc module is loaded into the
12103 * kernel. The special kernel macro module_init() is used to indicate the
12104 * role of this routine to the kernel as lpfc module entry point.
12105 *
12106 * Return codes
12107 * 0 - successful
12108 * -ENOMEM - FC attach transport failed
12109 * all others - failed
12110 */
dea3101e 12111static int __init
12112lpfc_init(void)
12113{
12114 int error = 0;
12115
12116 printk(LPFC_MODULE_DESC "\n");
c44ce173 12117 printk(LPFC_COPYRIGHT "\n");
dea3101e 12118
3ef6d24c
JS		 12119 error = misc_register(&lpfc_mgmt_dev);
12120 if (error)
12121 printk(KERN_ERR "Could not register lpfcmgmt device, "
12122 "misc_register returned with status %d", error);
12123
458c083e
JS		 12124 lpfc_transport_functions.vport_create = lpfc_vport_create;
12125 lpfc_transport_functions.vport_delete = lpfc_vport_delete;
dea3101e 12126 lpfc_transport_template =
12127 fc_attach_transport(&lpfc_transport_functions);
7ee5d43e 12128 if (lpfc_transport_template == NULL)
dea3101e 12129 return -ENOMEM;
458c083e
JS		 12130 lpfc_vport_transport_template =
12131 fc_attach_transport(&lpfc_vport_transport_functions);
12132 if (lpfc_vport_transport_template == NULL) {
12133 fc_release_transport(lpfc_transport_template);
12134 return -ENOMEM;
7ee5d43e 12135 }
7bb03bbf
JS		 12136
12137 /* Initialize in case vector mapping is needed */
b246de17 12138 lpfc_used_cpu = NULL;
2ea259ee 12139 lpfc_present_cpu = num_present_cpus();
7bb03bbf 12140
dea3101e 12141 error = pci_register_driver(&lpfc_driver);
92d7f7b0 12142 if (error) {
dea3101e 12143 fc_release_transport(lpfc_transport_template);
458c083e 12144 fc_release_transport(lpfc_vport_transport_template);
92d7f7b0 12145 }
dea3101e 12146
12147 return error;
12148}
12149
e59058c4 12150/**
3621a710 12151 * lpfc_exit - lpfc module removal routine
e59058c4
JS		 12152 *
12153 * This routine is invoked when the lpfc module is removed from the kernel.
12154 * The special kernel macro module_exit() is used to indicate the role of
12155 * this routine to the kernel as lpfc module exit point.
12156 */
dea3101e 12157static void __exit
12158lpfc_exit(void)
12159{
3ef6d24c 12160 misc_deregister(&lpfc_mgmt_dev);
dea3101e 12161 pci_unregister_driver(&lpfc_driver);
12162 fc_release_transport(lpfc_transport_template);
458c083e 12163 fc_release_transport(lpfc_vport_transport_template);
81301a9b 12164 if (_dump_buf_data) {
6a9c52cf
JS		 12165 printk(KERN_ERR "9062 BLKGRD: freeing %lu pages for "
12166 "_dump_buf_data at 0x%p\n",
81301a9b
JS		 12167 (1L << _dump_buf_data_order), _dump_buf_data);
12168 free_pages((unsigned long)_dump_buf_data, _dump_buf_data_order);
12169 }
12170
12171 if (_dump_buf_dif) {
6a9c52cf
JS		 12172 printk(KERN_ERR "9049 BLKGRD: freeing %lu pages for "
12173 "_dump_buf_dif at 0x%p\n",
81301a9b
JS		 12174 (1L << _dump_buf_dif_order), _dump_buf_dif);
12175 free_pages((unsigned long)_dump_buf_dif, _dump_buf_dif_order);
12176 }
b246de17 12177 kfree(lpfc_used_cpu);
7973967f 12178 idr_destroy(&lpfc_hba_index);
dea3101e 12179}
12180
12181module_init(lpfc_init);
12182module_exit(lpfc_exit);
12183MODULE_LICENSE("GPL");
12184MODULE_DESCRIPTION(LPFC_MODULE_DESC);
d080abe0 12185MODULE_AUTHOR("Broadcom");
dea3101e 12186MODULE_VERSION("0:" LPFC_DRIVER_VERSION);
Linux 6.x block layer and io_uring tree(s)