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scsi: lpfc: Fix display for debugfs queInfo
[linux-2.6-block.git] / drivers / scsi / lpfc / lpfc_init.c
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dea3101e 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
d080abe0
JS		 4 * Copyright (C) 2017 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Limited and/or its subsidiaries. *
50611577 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
c44ce173 7 * EMULEX and SLI are trademarks of Emulex. *
d080abe0 8 * www.broadcom.com *
c44ce173 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e 10 * *
11 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC		 12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
dea3101e 22 *******************************************************************/
23
dea3101e 24#include <linux/blkdev.h>
25#include <linux/delay.h>
26#include <linux/dma-mapping.h>
27#include <linux/idr.h>
28#include <linux/interrupt.h>
acf3368f 29#include <linux/module.h>
dea3101e 30#include <linux/kthread.h>
31#include <linux/pci.h>
32#include <linux/spinlock.h>
92d7f7b0 33#include <linux/ctype.h>
0d878419 34#include <linux/aer.h>
5a0e3ad6 35#include <linux/slab.h>
52d52440 36#include <linux/firmware.h>
3ef6d24c 37#include <linux/miscdevice.h>
7bb03bbf 38#include <linux/percpu.h>
895427bd 39#include <linux/msi.h>
286871a6 40#include <linux/bitops.h>
dea3101e 41
91886523 42#include <scsi/scsi.h>
dea3101e 43#include <scsi/scsi_device.h>
44#include <scsi/scsi_host.h>
45#include <scsi/scsi_transport_fc.h>
86c67379
JS		 46#include <scsi/scsi_tcq.h>
47#include <scsi/fc/fc_fs.h>
48
49#include <linux/nvme-fc-driver.h>
dea3101e 50
da0436e9 51#include "lpfc_hw4.h"
dea3101e 52#include "lpfc_hw.h"
53#include "lpfc_sli.h"
da0436e9 54#include "lpfc_sli4.h"
ea2151b4 55#include "lpfc_nl.h"
dea3101e 56#include "lpfc_disc.h"
dea3101e 57#include "lpfc.h"
895427bd
JS		 58#include "lpfc_scsi.h"
59#include "lpfc_nvme.h"
86c67379 60#include "lpfc_nvmet.h"
dea3101e 61#include "lpfc_logmsg.h"
62#include "lpfc_crtn.h"
92d7f7b0 63#include "lpfc_vport.h"
dea3101e 64#include "lpfc_version.h"
12f44457 65#include "lpfc_ids.h"
dea3101e 66
81301a9b
JS		 67char *_dump_buf_data;
68unsigned long _dump_buf_data_order;
69char *_dump_buf_dif;
70unsigned long _dump_buf_dif_order;
71spinlock_t _dump_buf_lock;
72
7bb03bbf 73/* Used when mapping IRQ vectors in a driver centric manner */
b246de17
JS		 74uint16_t *lpfc_used_cpu;
75uint32_t lpfc_present_cpu;
7bb03bbf 76
dea3101e 77static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
78static int lpfc_post_rcv_buf(struct lpfc_hba *);
5350d872 79static int lpfc_sli4_queue_verify(struct lpfc_hba *);
da0436e9
JS		 80static int lpfc_create_bootstrap_mbox(struct lpfc_hba *);
81static int lpfc_setup_endian_order(struct lpfc_hba *);
da0436e9 82static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *);
8a9d2e80 83static void lpfc_free_els_sgl_list(struct lpfc_hba *);
f358dd0c 84static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *);
8a9d2e80 85static void lpfc_init_sgl_list(struct lpfc_hba *);
da0436e9
JS		 86static int lpfc_init_active_sgl_array(struct lpfc_hba *);
87static void lpfc_free_active_sgl(struct lpfc_hba *);
88static int lpfc_hba_down_post_s3(struct lpfc_hba *phba);
89static int lpfc_hba_down_post_s4(struct lpfc_hba *phba);
90static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *);
91static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *);
92static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *);
618a5230
JS		 93static void lpfc_sli4_disable_intr(struct lpfc_hba *);
94static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t);
1ba981fd 95static void lpfc_sli4_oas_verify(struct lpfc_hba *phba);
dea3101e 96
97static struct scsi_transport_template *lpfc_transport_template = NULL;
92d7f7b0 98static struct scsi_transport_template *lpfc_vport_transport_template = NULL;
dea3101e 99static DEFINE_IDR(lpfc_hba_index);
f358dd0c 100#define LPFC_NVMET_BUF_POST 254
dea3101e 101
e59058c4 102/**
3621a710 103 * lpfc_config_port_prep - Perform lpfc initialization prior to config port
e59058c4
JS		 104 * @phba: pointer to lpfc hba data structure.
105 *
106 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT
107 * mailbox command. It retrieves the revision information from the HBA and
108 * collects the Vital Product Data (VPD) about the HBA for preparing the
109 * configuration of the HBA.
110 *
111 * Return codes:
112 * 0 - success.
113 * -ERESTART - requests the SLI layer to reset the HBA and try again.
114 * Any other value - indicates an error.
115 **/
dea3101e 116int
2e0fef85 117lpfc_config_port_prep(struct lpfc_hba *phba)
dea3101e 118{
119 lpfc_vpd_t *vp = &phba->vpd;
120 int i = 0, rc;
121 LPFC_MBOXQ_t *pmb;
122 MAILBOX_t *mb;
123 char *lpfc_vpd_data = NULL;
124 uint16_t offset = 0;
125 static char licensed[56] =
126 "key unlock for use with gnu public licensed code only\0";
65a29c16 127 static int init_key = 1;
dea3101e 128
129 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
130 if (!pmb) {
2e0fef85 131 phba->link_state = LPFC_HBA_ERROR;
dea3101e 132 return -ENOMEM;
133 }
134
04c68496 135 mb = &pmb->u.mb;
2e0fef85 136 phba->link_state = LPFC_INIT_MBX_CMDS;
dea3101e 137
138 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
65a29c16
JS		 139 if (init_key) {
140 uint32_t *ptext = (uint32_t *) licensed;
dea3101e 141
65a29c16
JS		 142 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
143 *ptext = cpu_to_be32(*ptext);
144 init_key = 0;
145 }
dea3101e 146
147 lpfc_read_nv(phba, pmb);
148 memset((char*)mb->un.varRDnvp.rsvd3, 0,
149 sizeof (mb->un.varRDnvp.rsvd3));
150 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
151 sizeof (licensed));
152
153 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
154
155 if (rc != MBX_SUCCESS) {
ed957684 156 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
e8b62011 157 "0324 Config Port initialization "
dea3101e 158 "error, mbxCmd x%x READ_NVPARM, "
159 "mbxStatus x%x\n",
dea3101e 160 mb->mbxCommand, mb->mbxStatus);
161 mempool_free(pmb, phba->mbox_mem_pool);
162 return -ERESTART;
163 }
164 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
2e0fef85
JS		 165 sizeof(phba->wwnn));
166 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname,
167 sizeof(phba->wwpn));
dea3101e 168 }
169
92d7f7b0
JS		 170 phba->sli3_options = 0x0;
171
dea3101e 172 /* Setup and issue mailbox READ REV command */
173 lpfc_read_rev(phba, pmb);
174 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
175 if (rc != MBX_SUCCESS) {
ed957684 176 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 177 "0439 Adapter failed to init, mbxCmd x%x "
dea3101e 178 "READ_REV, mbxStatus x%x\n",
dea3101e 179 mb->mbxCommand, mb->mbxStatus);
180 mempool_free( pmb, phba->mbox_mem_pool);
181 return -ERESTART;
182 }
183
92d7f7b0 184
1de933f3
JSEC		 185 /*
186 * The value of rr must be 1 since the driver set the cv field to 1.
187 * This setting requires the FW to set all revision fields.
dea3101e 188 */
1de933f3 189 if (mb->un.varRdRev.rr == 0) {
dea3101e 190 vp->rev.rBit = 0;
1de933f3 191 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011
JS		 192 "0440 Adapter failed to init, READ_REV has "
193 "missing revision information.\n");
dea3101e 194 mempool_free(pmb, phba->mbox_mem_pool);
195 return -ERESTART;
dea3101e 196 }
197
495a714c
JS		 198 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) {
199 mempool_free(pmb, phba->mbox_mem_pool);
ed957684 200 return -EINVAL;
495a714c 201 }
ed957684 202
dea3101e 203 /* Save information as VPD data */
1de933f3 204 vp->rev.rBit = 1;
92d7f7b0 205 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t));
1de933f3
JSEC		 206 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
207 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
208 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
209 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
dea3101e 210 vp->rev.biuRev = mb->un.varRdRev.biuRev;
211 vp->rev.smRev = mb->un.varRdRev.smRev;
212 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
213 vp->rev.endecRev = mb->un.varRdRev.endecRev;
214 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
215 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
216 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
217 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
218 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
219 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
220
92d7f7b0
JS		 221 /* If the sli feature level is less then 9, we must
222 * tear down all RPIs and VPIs on link down if NPIV
223 * is enabled.
224 */
225 if (vp->rev.feaLevelHigh < 9)
226 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN;
227
dea3101e 228 if (lpfc_is_LC_HBA(phba->pcidev->device))
229 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
230 sizeof (phba->RandomData));
231
dea3101e 232 /* Get adapter VPD information */
dea3101e 233 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
234 if (!lpfc_vpd_data)
d7c255b2 235 goto out_free_mbox;
dea3101e 236 do {
a0c87cbd 237 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD);
dea3101e 238 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
239
240 if (rc != MBX_SUCCESS) {
241 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 242 "0441 VPD not present on adapter, "
dea3101e 243 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
dea3101e 244 mb->mbxCommand, mb->mbxStatus);
74b72a59 245 mb->un.varDmp.word_cnt = 0;
dea3101e 246 }
04c68496
JS		 247 /* dump mem may return a zero when finished or we got a
248 * mailbox error, either way we are done.
249 */
250 if (mb->un.varDmp.word_cnt == 0)
251 break;
74b72a59
JW		 252 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
253 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
d7c255b2
JS		 254 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
255 lpfc_vpd_data + offset,
92d7f7b0 256 mb->un.varDmp.word_cnt);
dea3101e 257 offset += mb->un.varDmp.word_cnt;
74b72a59
JW		 258 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
259 lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
dea3101e 260
261 kfree(lpfc_vpd_data);
dea3101e 262out_free_mbox:
263 mempool_free(pmb, phba->mbox_mem_pool);
264 return 0;
265}
266
e59058c4 267/**
3621a710 268 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd
e59058c4
JS		 269 * @phba: pointer to lpfc hba data structure.
270 * @pmboxq: pointer to the driver internal queue element for mailbox command.
271 *
272 * This is the completion handler for driver's configuring asynchronous event
273 * mailbox command to the device. If the mailbox command returns successfully,
274 * it will set internal async event support flag to 1; otherwise, it will
275 * set internal async event support flag to 0.
276 **/
57127f15
JS		 277static void
278lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
279{
04c68496 280 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS)
57127f15
JS		 281 phba->temp_sensor_support = 1;
282 else
283 phba->temp_sensor_support = 0;
284 mempool_free(pmboxq, phba->mbox_mem_pool);
285 return;
286}
287
97207482 288/**
3621a710 289 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler
97207482
JS		 290 * @phba: pointer to lpfc hba data structure.
291 * @pmboxq: pointer to the driver internal queue element for mailbox command.
292 *
293 * This is the completion handler for dump mailbox command for getting
294 * wake up parameters. When this command complete, the response contain
295 * Option rom version of the HBA. This function translate the version number
296 * into a human readable string and store it in OptionROMVersion.
297 **/
298static void
299lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
300{
301 struct prog_id *prg;
302 uint32_t prog_id_word;
303 char dist = ' ';
304 /* character array used for decoding dist type. */
305 char dist_char[] = "nabx";
306
04c68496 307 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) {
9f1e1b50 308 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482 309 return;
9f1e1b50 310 }
97207482
JS		 311
312 prg = (struct prog_id *) &prog_id_word;
313
314 /* word 7 contain option rom version */
04c68496 315 prog_id_word = pmboxq->u.mb.un.varWords[7];
97207482
JS		 316
317 /* Decode the Option rom version word to a readable string */
318 if (prg->dist < 4)
319 dist = dist_char[prg->dist];
320
321 if ((prg->dist == 3) && (prg->num == 0))
a2fc4aef 322 snprintf(phba->OptionROMVersion, 32, "%d.%d%d",
97207482
JS		 323 prg->ver, prg->rev, prg->lev);
324 else
a2fc4aef 325 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d",
97207482
JS		 326 prg->ver, prg->rev, prg->lev,
327 dist, prg->num);
9f1e1b50 328 mempool_free(pmboxq, phba->mbox_mem_pool);
97207482
JS		 329 return;
330}
331
0558056c
JS		 332/**
333 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname,
334 * cfg_soft_wwnn, cfg_soft_wwpn
335 * @vport: pointer to lpfc vport data structure.
336 *
337 *
338 * Return codes
339 * None.
340 **/
341void
342lpfc_update_vport_wwn(struct lpfc_vport *vport)
343{
aeb3c817
JS		 344 uint8_t vvvl = vport->fc_sparam.cmn.valid_vendor_ver_level;
345 u32 *fawwpn_key = (u32 *)&vport->fc_sparam.un.vendorVersion[0];
346
0558056c
JS		 347 /* If the soft name exists then update it using the service params */
348 if (vport->phba->cfg_soft_wwnn)
349 u64_to_wwn(vport->phba->cfg_soft_wwnn,
350 vport->fc_sparam.nodeName.u.wwn);
351 if (vport->phba->cfg_soft_wwpn)
352 u64_to_wwn(vport->phba->cfg_soft_wwpn,
353 vport->fc_sparam.portName.u.wwn);
354
355 /*
356 * If the name is empty or there exists a soft name
357 * then copy the service params name, otherwise use the fc name
358 */
359 if (vport->fc_nodename.u.wwn[0] == 0 || vport->phba->cfg_soft_wwnn)
360 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
361 sizeof(struct lpfc_name));
362 else
363 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename,
364 sizeof(struct lpfc_name));
365
aeb3c817
JS		 366 /*
367 * If the port name has changed, then set the Param changes flag
368 * to unreg the login
369 */
370 if (vport->fc_portname.u.wwn[0] != 0 &&
371 memcmp(&vport->fc_portname, &vport->fc_sparam.portName,
372 sizeof(struct lpfc_name)))
373 vport->vport_flag |= FAWWPN_PARAM_CHG;
374
375 if (vport->fc_portname.u.wwn[0] == 0 ||
376 vport->phba->cfg_soft_wwpn ||
377 (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR) ||
378 vport->vport_flag & FAWWPN_SET) {
0558056c
JS		 379 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
380 sizeof(struct lpfc_name));
aeb3c817
JS		 381 vport->vport_flag &= ~FAWWPN_SET;
382 if (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR)
383 vport->vport_flag |= FAWWPN_SET;
384 }
0558056c
JS		 385 else
386 memcpy(&vport->fc_sparam.portName, &vport->fc_portname,
387 sizeof(struct lpfc_name));
388}
389
e59058c4 390/**
3621a710 391 * lpfc_config_port_post - Perform lpfc initialization after config port
e59058c4
JS		 392 * @phba: pointer to lpfc hba data structure.
393 *
394 * This routine will do LPFC initialization after the CONFIG_PORT mailbox
395 * command call. It performs all internal resource and state setups on the
396 * port: post IOCB buffers, enable appropriate host interrupt attentions,
397 * ELS ring timers, etc.
398 *
399 * Return codes
400 * 0 - success.
401 * Any other value - error.
402 **/
dea3101e 403int
2e0fef85 404lpfc_config_port_post(struct lpfc_hba *phba)
dea3101e 405{
2e0fef85 406 struct lpfc_vport *vport = phba->pport;
a257bf90 407 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
dea3101e 408 LPFC_MBOXQ_t *pmb;
409 MAILBOX_t *mb;
410 struct lpfc_dmabuf *mp;
411 struct lpfc_sli *psli = &phba->sli;
412 uint32_t status, timeout;
2e0fef85
JS		 413 int i, j;
414 int rc;
dea3101e 415
7af67051
JS		 416 spin_lock_irq(&phba->hbalock);
417 /*
418 * If the Config port completed correctly the HBA is not
419 * over heated any more.
420 */
421 if (phba->over_temp_state == HBA_OVER_TEMP)
422 phba->over_temp_state = HBA_NORMAL_TEMP;
423 spin_unlock_irq(&phba->hbalock);
424
dea3101e 425 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
426 if (!pmb) {
2e0fef85 427 phba->link_state = LPFC_HBA_ERROR;
dea3101e 428 return -ENOMEM;
429 }
04c68496 430 mb = &pmb->u.mb;
dea3101e 431
dea3101e 432 /* Get login parameters for NID. */
9f1177a3
JS		 433 rc = lpfc_read_sparam(phba, pmb, 0);
434 if (rc) {
435 mempool_free(pmb, phba->mbox_mem_pool);
436 return -ENOMEM;
437 }
438
ed957684 439 pmb->vport = vport;
dea3101e 440 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 441 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 442 "0448 Adapter failed init, mbxCmd x%x "
dea3101e 443 "READ_SPARM mbxStatus x%x\n",
dea3101e 444 mb->mbxCommand, mb->mbxStatus);
2e0fef85 445 phba->link_state = LPFC_HBA_ERROR;
dea3101e 446 mp = (struct lpfc_dmabuf *) pmb->context1;
9f1177a3 447 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 448 lpfc_mbuf_free(phba, mp->virt, mp->phys);
449 kfree(mp);
450 return -EIO;
451 }
452
453 mp = (struct lpfc_dmabuf *) pmb->context1;
454
2e0fef85 455 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm));
dea3101e 456 lpfc_mbuf_free(phba, mp->virt, mp->phys);
457 kfree(mp);
458 pmb->context1 = NULL;
0558056c 459 lpfc_update_vport_wwn(vport);
a257bf90
JS		 460
461 /* Update the fc_host data structures with new wwn. */
462 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
463 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
21e9a0a5 464 fc_host_max_npiv_vports(shost) = phba->max_vpi;
a257bf90 465
dea3101e 466 /* If no serial number in VPD data, use low 6 bytes of WWNN */
467 /* This should be consolidated into parse_vpd ? - mr */
468 if (phba->SerialNumber[0] == 0) {
469 uint8_t *outptr;
470
2e0fef85 471 outptr = &vport->fc_nodename.u.s.IEEE[0];
dea3101e 472 for (i = 0; i < 12; i++) {
473 status = *outptr++;
474 j = ((status & 0xf0) >> 4);
475 if (j <= 9)
476 phba->SerialNumber[i] =
477 (char)((uint8_t) 0x30 + (uint8_t) j);
478 else
479 phba->SerialNumber[i] =
480 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
481 i++;
482 j = (status & 0xf);
483 if (j <= 9)
484 phba->SerialNumber[i] =
485 (char)((uint8_t) 0x30 + (uint8_t) j);
486 else
487 phba->SerialNumber[i] =
488 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
489 }
490 }
491
dea3101e 492 lpfc_read_config(phba, pmb);
ed957684 493 pmb->vport = vport;
dea3101e 494 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
ed957684 495 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 496 "0453 Adapter failed to init, mbxCmd x%x "
dea3101e 497 "READ_CONFIG, mbxStatus x%x\n",
dea3101e 498 mb->mbxCommand, mb->mbxStatus);
2e0fef85 499 phba->link_state = LPFC_HBA_ERROR;
dea3101e 500 mempool_free( pmb, phba->mbox_mem_pool);
501 return -EIO;
502 }
503
a0c87cbd
JS		 504 /* Check if the port is disabled */
505 lpfc_sli_read_link_ste(phba);
506
dea3101e 507 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS		 508 i = (mb->un.varRdConfig.max_xri + 1);
509 if (phba->cfg_hba_queue_depth > i) {
510 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
511 "3359 HBA queue depth changed from %d to %d\n",
512 phba->cfg_hba_queue_depth, i);
513 phba->cfg_hba_queue_depth = i;
514 }
515
516 /* Reset the DFT_LUN_Q_DEPTH to (max xri >> 3) */
517 i = (mb->un.varRdConfig.max_xri >> 3);
518 if (phba->pport->cfg_lun_queue_depth > i) {
519 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
520 "3360 LUN queue depth changed from %d to %d\n",
521 phba->pport->cfg_lun_queue_depth, i);
522 phba->pport->cfg_lun_queue_depth = i;
523 }
dea3101e 524
525 phba->lmt = mb->un.varRdConfig.lmt;
74b72a59
JW		 526
527 /* Get the default values for Model Name and Description */
528 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
529
2e0fef85 530 phba->link_state = LPFC_LINK_DOWN;
dea3101e 531
0b727fea 532 /* Only process IOCBs on ELS ring till hba_state is READY */
895427bd
JS		 533 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr)
534 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT;
535 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr)
536 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT;
dea3101e 537
538 /* Post receive buffers for desired rings */
ed957684
JS		 539 if (phba->sli_rev != 3)
540 lpfc_post_rcv_buf(phba);
dea3101e 541
9399627f
JS		 542 /*
543 * Configure HBA MSI-X attention conditions to messages if MSI-X mode
544 */
545 if (phba->intr_type == MSIX) {
546 rc = lpfc_config_msi(phba, pmb);
547 if (rc) {
548 mempool_free(pmb, phba->mbox_mem_pool);
549 return -EIO;
550 }
551 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
552 if (rc != MBX_SUCCESS) {
553 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
554 "0352 Config MSI mailbox command "
555 "failed, mbxCmd x%x, mbxStatus x%x\n",
04c68496
JS		 556 pmb->u.mb.mbxCommand,
557 pmb->u.mb.mbxStatus);
9399627f
JS		 558 mempool_free(pmb, phba->mbox_mem_pool);
559 return -EIO;
560 }
561 }
562
04c68496 563 spin_lock_irq(&phba->hbalock);
9399627f
JS		 564 /* Initialize ERATT handling flag */
565 phba->hba_flag &= ~HBA_ERATT_HANDLED;
566
dea3101e 567 /* Enable appropriate host interrupts */
9940b97b
JS		 568 if (lpfc_readl(phba->HCregaddr, &status)) {
569 spin_unlock_irq(&phba->hbalock);
570 return -EIO;
571 }
dea3101e 572 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
573 if (psli->num_rings > 0)
574 status |= HC_R0INT_ENA;
575 if (psli->num_rings > 1)
576 status |= HC_R1INT_ENA;
577 if (psli->num_rings > 2)
578 status |= HC_R2INT_ENA;
579 if (psli->num_rings > 3)
580 status |= HC_R3INT_ENA;
581
875fbdfe
JSEC		 582 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
583 (phba->cfg_poll & DISABLE_FCP_RING_INT))
9399627f 584 status &= ~(HC_R0INT_ENA);
875fbdfe 585
dea3101e 586 writel(status, phba->HCregaddr);
587 readl(phba->HCregaddr); /* flush */
2e0fef85 588 spin_unlock_irq(&phba->hbalock);
dea3101e 589
9399627f
JS		 590 /* Set up ring-0 (ELS) timer */
591 timeout = phba->fc_ratov * 2;
256ec0d0
JS		 592 mod_timer(&vport->els_tmofunc,
593 jiffies + msecs_to_jiffies(1000 * timeout));
9399627f 594 /* Set up heart beat (HB) timer */
256ec0d0
JS		 595 mod_timer(&phba->hb_tmofunc,
596 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS		 597 phba->hb_outstanding = 0;
598 phba->last_completion_time = jiffies;
9399627f 599 /* Set up error attention (ERATT) polling timer */
256ec0d0 600 mod_timer(&phba->eratt_poll,
65791f1f 601 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
dea3101e 602
a0c87cbd
JS		 603 if (phba->hba_flag & LINK_DISABLED) {
604 lpfc_printf_log(phba,
605 KERN_ERR, LOG_INIT,
606 "2598 Adapter Link is disabled.\n");
607 lpfc_down_link(phba, pmb);
608 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
609 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
610 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
611 lpfc_printf_log(phba,
612 KERN_ERR, LOG_INIT,
613 "2599 Adapter failed to issue DOWN_LINK"
614 " mbox command rc 0x%x\n", rc);
615
616 mempool_free(pmb, phba->mbox_mem_pool);
617 return -EIO;
618 }
e40a02c1 619 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
026abb87
JS		 620 mempool_free(pmb, phba->mbox_mem_pool);
621 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
622 if (rc)
623 return rc;
dea3101e 624 }
625 /* MBOX buffer will be freed in mbox compl */
57127f15 626 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS		 627 if (!pmb) {
628 phba->link_state = LPFC_HBA_ERROR;
629 return -ENOMEM;
630 }
631
57127f15
JS		 632 lpfc_config_async(phba, pmb, LPFC_ELS_RING);
633 pmb->mbox_cmpl = lpfc_config_async_cmpl;
634 pmb->vport = phba->pport;
635 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
dea3101e 636
57127f15
JS		 637 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
638 lpfc_printf_log(phba,
639 KERN_ERR,
640 LOG_INIT,
641 "0456 Adapter failed to issue "
e4e74273 642 "ASYNCEVT_ENABLE mbox status x%x\n",
57127f15
JS		 643 rc);
644 mempool_free(pmb, phba->mbox_mem_pool);
645 }
97207482
JS		 646
647 /* Get Option rom version */
648 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9f1177a3
JS		 649 if (!pmb) {
650 phba->link_state = LPFC_HBA_ERROR;
651 return -ENOMEM;
652 }
653
97207482
JS		 654 lpfc_dump_wakeup_param(phba, pmb);
655 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl;
656 pmb->vport = phba->pport;
657 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
658
659 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
660 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "0435 Adapter failed "
e4e74273 661 "to get Option ROM version status x%x\n", rc);
97207482
JS		 662 mempool_free(pmb, phba->mbox_mem_pool);
663 }
664
d7c255b2 665 return 0;
ce8b3ce5
JS		 666}
667
84d1b006
JS		 668/**
669 * lpfc_hba_init_link - Initialize the FC link
670 * @phba: pointer to lpfc hba data structure.
6e7288d9 671 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS		 672 *
673 * This routine will issue the INIT_LINK mailbox command call.
674 * It is available to other drivers through the lpfc_hba data
675 * structure for use as a delayed link up mechanism with the
676 * module parameter lpfc_suppress_link_up.
677 *
678 * Return code
679 * 0 - success
680 * Any other value - error
681 **/
e399b228 682static int
6e7288d9 683lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag)
1b51197d
JS		 684{
685 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag);
686}
687
688/**
689 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology
690 * @phba: pointer to lpfc hba data structure.
691 * @fc_topology: desired fc topology.
692 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
693 *
694 * This routine will issue the INIT_LINK mailbox command call.
695 * It is available to other drivers through the lpfc_hba data
696 * structure for use as a delayed link up mechanism with the
697 * module parameter lpfc_suppress_link_up.
698 *
699 * Return code
700 * 0 - success
701 * Any other value - error
702 **/
703int
704lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology,
705 uint32_t flag)
84d1b006
JS		 706{
707 struct lpfc_vport *vport = phba->pport;
708 LPFC_MBOXQ_t *pmb;
709 MAILBOX_t *mb;
710 int rc;
711
712 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
713 if (!pmb) {
714 phba->link_state = LPFC_HBA_ERROR;
715 return -ENOMEM;
716 }
717 mb = &pmb->u.mb;
718 pmb->vport = vport;
719
026abb87
JS		 720 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) ||
721 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) &&
722 !(phba->lmt & LMT_1Gb)) ||
723 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) &&
724 !(phba->lmt & LMT_2Gb)) ||
725 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) &&
726 !(phba->lmt & LMT_4Gb)) ||
727 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) &&
728 !(phba->lmt & LMT_8Gb)) ||
729 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) &&
730 !(phba->lmt & LMT_10Gb)) ||
731 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) &&
d38dd52c
JS		 732 !(phba->lmt & LMT_16Gb)) ||
733 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) &&
734 !(phba->lmt & LMT_32Gb))) {
026abb87
JS		 735 /* Reset link speed to auto */
736 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
737 "1302 Invalid speed for this board:%d "
738 "Reset link speed to auto.\n",
739 phba->cfg_link_speed);
740 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO;
741 }
1b51197d 742 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed);
84d1b006 743 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
1b51197d
JS		 744 if (phba->sli_rev < LPFC_SLI_REV4)
745 lpfc_set_loopback_flag(phba);
6e7288d9 746 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
76a95d75 747 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
84d1b006
JS		 748 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
749 "0498 Adapter failed to init, mbxCmd x%x "
750 "INIT_LINK, mbxStatus x%x\n",
751 mb->mbxCommand, mb->mbxStatus);
76a95d75
JS		 752 if (phba->sli_rev <= LPFC_SLI_REV3) {
753 /* Clear all interrupt enable conditions */
754 writel(0, phba->HCregaddr);
755 readl(phba->HCregaddr); /* flush */
756 /* Clear all pending interrupts */
757 writel(0xffffffff, phba->HAregaddr);
758 readl(phba->HAregaddr); /* flush */
759 }
84d1b006 760 phba->link_state = LPFC_HBA_ERROR;
6e7288d9 761 if (rc != MBX_BUSY || flag == MBX_POLL)
84d1b006
JS		 762 mempool_free(pmb, phba->mbox_mem_pool);
763 return -EIO;
764 }
e40a02c1 765 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK;
6e7288d9
JS		 766 if (flag == MBX_POLL)
767 mempool_free(pmb, phba->mbox_mem_pool);
84d1b006
JS		 768
769 return 0;
770}
771
772/**
773 * lpfc_hba_down_link - this routine downs the FC link
6e7288d9
JS		 774 * @phba: pointer to lpfc hba data structure.
775 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
84d1b006
JS		 776 *
777 * This routine will issue the DOWN_LINK mailbox command call.
778 * It is available to other drivers through the lpfc_hba data
779 * structure for use to stop the link.
780 *
781 * Return code
782 * 0 - success
783 * Any other value - error
784 **/
e399b228 785static int
6e7288d9 786lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag)
84d1b006
JS		 787{
788 LPFC_MBOXQ_t *pmb;
789 int rc;
790
791 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
792 if (!pmb) {
793 phba->link_state = LPFC_HBA_ERROR;
794 return -ENOMEM;
795 }
796
797 lpfc_printf_log(phba,
798 KERN_ERR, LOG_INIT,
799 "0491 Adapter Link is disabled.\n");
800 lpfc_down_link(phba, pmb);
801 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
6e7288d9 802 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
84d1b006
JS		 803 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
804 lpfc_printf_log(phba,
805 KERN_ERR, LOG_INIT,
806 "2522 Adapter failed to issue DOWN_LINK"
807 " mbox command rc 0x%x\n", rc);
808
809 mempool_free(pmb, phba->mbox_mem_pool);
810 return -EIO;
811 }
6e7288d9
JS		 812 if (flag == MBX_POLL)
813 mempool_free(pmb, phba->mbox_mem_pool);
814
84d1b006
JS		 815 return 0;
816}
817
e59058c4 818/**
3621a710 819 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset
e59058c4
JS		 820 * @phba: pointer to lpfc HBA data structure.
821 *
822 * This routine will do LPFC uninitialization before the HBA is reset when
823 * bringing down the SLI Layer.
824 *
825 * Return codes
826 * 0 - success.
827 * Any other value - error.
828 **/
dea3101e 829int
2e0fef85 830lpfc_hba_down_prep(struct lpfc_hba *phba)
dea3101e 831{
1b32f6aa
JS		 832 struct lpfc_vport **vports;
833 int i;
3772a991
JS		 834
835 if (phba->sli_rev <= LPFC_SLI_REV3) {
836 /* Disable interrupts */
837 writel(0, phba->HCregaddr);
838 readl(phba->HCregaddr); /* flush */
839 }
dea3101e 840
1b32f6aa
JS		 841 if (phba->pport->load_flag & FC_UNLOADING)
842 lpfc_cleanup_discovery_resources(phba->pport);
843 else {
844 vports = lpfc_create_vport_work_array(phba);
845 if (vports != NULL)
3772a991
JS		 846 for (i = 0; i <= phba->max_vports &&
847 vports[i] != NULL; i++)
1b32f6aa
JS		 848 lpfc_cleanup_discovery_resources(vports[i]);
849 lpfc_destroy_vport_work_array(phba, vports);
7f5f3d0d
JS		 850 }
851 return 0;
dea3101e 852}
853
68e814f5
JS		 854/**
855 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free
856 * rspiocb which got deferred
857 *
858 * @phba: pointer to lpfc HBA data structure.
859 *
860 * This routine will cleanup completed slow path events after HBA is reset
861 * when bringing down the SLI Layer.
862 *
863 *
864 * Return codes
865 * void.
866 **/
867static void
868lpfc_sli4_free_sp_events(struct lpfc_hba *phba)
869{
870 struct lpfc_iocbq *rspiocbq;
871 struct hbq_dmabuf *dmabuf;
872 struct lpfc_cq_event *cq_event;
873
874 spin_lock_irq(&phba->hbalock);
875 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
876 spin_unlock_irq(&phba->hbalock);
877
878 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
879 /* Get the response iocb from the head of work queue */
880 spin_lock_irq(&phba->hbalock);
881 list_remove_head(&phba->sli4_hba.sp_queue_event,
882 cq_event, struct lpfc_cq_event, list);
883 spin_unlock_irq(&phba->hbalock);
884
885 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
886 case CQE_CODE_COMPL_WQE:
887 rspiocbq = container_of(cq_event, struct lpfc_iocbq,
888 cq_event);
889 lpfc_sli_release_iocbq(phba, rspiocbq);
890 break;
891 case CQE_CODE_RECEIVE:
892 case CQE_CODE_RECEIVE_V1:
893 dmabuf = container_of(cq_event, struct hbq_dmabuf,
894 cq_event);
895 lpfc_in_buf_free(phba, &dmabuf->dbuf);
896 }
897 }
898}
899
e59058c4 900/**
bcece5f5 901 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset
e59058c4
JS		 902 * @phba: pointer to lpfc HBA data structure.
903 *
bcece5f5
JS		 904 * This routine will cleanup posted ELS buffers after the HBA is reset
905 * when bringing down the SLI Layer.
906 *
e59058c4
JS		 907 *
908 * Return codes
bcece5f5 909 * void.
e59058c4 910 **/
bcece5f5
JS		 911static void
912lpfc_hba_free_post_buf(struct lpfc_hba *phba)
41415862
JW		 913{
914 struct lpfc_sli *psli = &phba->sli;
915 struct lpfc_sli_ring *pring;
916 struct lpfc_dmabuf *mp, *next_mp;
07eab624
JS		 917 LIST_HEAD(buflist);
918 int count;
41415862 919
92d7f7b0
JS		 920 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)
921 lpfc_sli_hbqbuf_free_all(phba);
922 else {
923 /* Cleanup preposted buffers on the ELS ring */
895427bd 924 pring = &psli->sli3_ring[LPFC_ELS_RING];
07eab624
JS		 925 spin_lock_irq(&phba->hbalock);
926 list_splice_init(&pring->postbufq, &buflist);
927 spin_unlock_irq(&phba->hbalock);
928
929 count = 0;
930 list_for_each_entry_safe(mp, next_mp, &buflist, list) {
92d7f7b0 931 list_del(&mp->list);
07eab624 932 count++;
92d7f7b0
JS		 933 lpfc_mbuf_free(phba, mp->virt, mp->phys);
934 kfree(mp);
935 }
07eab624
JS		 936
937 spin_lock_irq(&phba->hbalock);
938 pring->postbufq_cnt -= count;
bcece5f5 939 spin_unlock_irq(&phba->hbalock);
41415862 940 }
bcece5f5
JS		 941}
942
943/**
944 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset
945 * @phba: pointer to lpfc HBA data structure.
946 *
947 * This routine will cleanup the txcmplq after the HBA is reset when bringing
948 * down the SLI Layer.
949 *
950 * Return codes
951 * void
952 **/
953static void
954lpfc_hba_clean_txcmplq(struct lpfc_hba *phba)
955{
956 struct lpfc_sli *psli = &phba->sli;
895427bd 957 struct lpfc_queue *qp = NULL;
bcece5f5
JS		 958 struct lpfc_sli_ring *pring;
959 LIST_HEAD(completions);
960 int i;
961
895427bd
JS		 962 if (phba->sli_rev != LPFC_SLI_REV4) {
963 for (i = 0; i < psli->num_rings; i++) {
964 pring = &psli->sli3_ring[i];
bcece5f5 965 spin_lock_irq(&phba->hbalock);
895427bd
JS		 966 /* At this point in time the HBA is either reset or DOA
967 * Nothing should be on txcmplq as it will
968 * NEVER complete.
969 */
970 list_splice_init(&pring->txcmplq, &completions);
971 pring->txcmplq_cnt = 0;
bcece5f5 972 spin_unlock_irq(&phba->hbalock);
09372820 973
895427bd
JS		 974 lpfc_sli_abort_iocb_ring(phba, pring);
975 }
a257bf90 976 /* Cancel all the IOCBs from the completions list */
895427bd
JS		 977 lpfc_sli_cancel_iocbs(phba, &completions,
978 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
979 return;
980 }
981 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
982 pring = qp->pring;
983 if (!pring)
984 continue;
985 spin_lock_irq(&pring->ring_lock);
986 list_splice_init(&pring->txcmplq, &completions);
987 pring->txcmplq_cnt = 0;
988 spin_unlock_irq(&pring->ring_lock);
41415862
JW		 989 lpfc_sli_abort_iocb_ring(phba, pring);
990 }
895427bd
JS		 991 /* Cancel all the IOCBs from the completions list */
992 lpfc_sli_cancel_iocbs(phba, &completions,
993 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
bcece5f5 994}
41415862 995
bcece5f5
JS		 996/**
997 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset
998 int i;
999 * @phba: pointer to lpfc HBA data structure.
1000 *
1001 * This routine will do uninitialization after the HBA is reset when bring
1002 * down the SLI Layer.
1003 *
1004 * Return codes
1005 * 0 - success.
1006 * Any other value - error.
1007 **/
1008static int
1009lpfc_hba_down_post_s3(struct lpfc_hba *phba)
1010{
1011 lpfc_hba_free_post_buf(phba);
1012 lpfc_hba_clean_txcmplq(phba);
41415862
JW		 1013 return 0;
1014}
5af5eee7 1015
da0436e9
JS		 1016/**
1017 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset
1018 * @phba: pointer to lpfc HBA data structure.
1019 *
1020 * This routine will do uninitialization after the HBA is reset when bring
1021 * down the SLI Layer.
1022 *
1023 * Return codes
af901ca1 1024 * 0 - success.
da0436e9
JS		 1025 * Any other value - error.
1026 **/
1027static int
1028lpfc_hba_down_post_s4(struct lpfc_hba *phba)
1029{
1030 struct lpfc_scsi_buf *psb, *psb_next;
86c67379 1031 struct lpfc_nvmet_rcv_ctx *ctxp, *ctxp_next;
da0436e9 1032 LIST_HEAD(aborts);
895427bd 1033 LIST_HEAD(nvme_aborts);
86c67379 1034 LIST_HEAD(nvmet_aborts);
da0436e9 1035 unsigned long iflag = 0;
0f65ff68
JS		 1036 struct lpfc_sglq *sglq_entry = NULL;
1037
895427bd
JS		 1038
1039 lpfc_sli_hbqbuf_free_all(phba);
bcece5f5
JS		 1040 lpfc_hba_clean_txcmplq(phba);
1041
da0436e9
JS		 1042 /* At this point in time the HBA is either reset or DOA. Either
1043 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be
895427bd 1044 * on the lpfc_els_sgl_list so that it can either be freed if the
da0436e9
JS		 1045 * driver is unloading or reposted if the driver is restarting
1046 * the port.
1047 */
895427bd 1048 spin_lock_irq(&phba->hbalock); /* required for lpfc_els_sgl_list and */
da0436e9 1049 /* scsl_buf_list */
895427bd 1050 /* sgl_list_lock required because worker thread uses this
da0436e9
JS		 1051 * list.
1052 */
895427bd 1053 spin_lock(&phba->sli4_hba.sgl_list_lock);
0f65ff68
JS		 1054 list_for_each_entry(sglq_entry,
1055 &phba->sli4_hba.lpfc_abts_els_sgl_list, list)
1056 sglq_entry->state = SGL_FREED;
1057
da0436e9 1058 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
895427bd
JS		 1059 &phba->sli4_hba.lpfc_els_sgl_list);
1060
f358dd0c 1061
895427bd 1062 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9
JS		 1063 /* abts_scsi_buf_list_lock required because worker thread uses this
1064 * list.
1065 */
895427bd
JS		 1066 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
1067 spin_lock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1068 list_splice_init(&phba->sli4_hba.lpfc_abts_scsi_buf_list,
1069 &aborts);
1070 spin_unlock(&phba->sli4_hba.abts_scsi_buf_list_lock);
1071 }
1072
1073 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1074 spin_lock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1075 list_splice_init(&phba->sli4_hba.lpfc_abts_nvme_buf_list,
1076 &nvme_aborts);
86c67379
JS		 1077 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list,
1078 &nvmet_aborts);
895427bd
JS		 1079 spin_unlock(&phba->sli4_hba.abts_nvme_buf_list_lock);
1080 }
1081
da0436e9
JS		 1082 spin_unlock_irq(&phba->hbalock);
1083
1084 list_for_each_entry_safe(psb, psb_next, &aborts, list) {
1085 psb->pCmd = NULL;
1086 psb->status = IOSTAT_SUCCESS;
1087 }
a40fc5f0
JS		 1088 spin_lock_irqsave(&phba->scsi_buf_list_put_lock, iflag);
1089 list_splice(&aborts, &phba->lpfc_scsi_buf_list_put);
1090 spin_unlock_irqrestore(&phba->scsi_buf_list_put_lock, iflag);
68e814f5 1091
86c67379
JS		 1092 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1093 list_for_each_entry_safe(psb, psb_next, &nvme_aborts, list) {
1094 psb->pCmd = NULL;
1095 psb->status = IOSTAT_SUCCESS;
1096 }
1097 spin_lock_irqsave(&phba->nvme_buf_list_put_lock, iflag);
1098 list_splice(&nvme_aborts, &phba->lpfc_nvme_buf_list_put);
1099 spin_unlock_irqrestore(&phba->nvme_buf_list_put_lock, iflag);
1100
1101 list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) {
1102 ctxp->flag &= ~(LPFC_NVMET_XBUSY | LPFC_NVMET_ABORT_OP);
6c621a22 1103 lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf);
86c67379 1104 }
895427bd 1105 }
895427bd 1106
68e814f5 1107 lpfc_sli4_free_sp_events(phba);
da0436e9
JS		 1108 return 0;
1109}
1110
1111/**
1112 * lpfc_hba_down_post - Wrapper func for hba down post routine
1113 * @phba: pointer to lpfc HBA data structure.
1114 *
1115 * This routine wraps the actual SLI3 or SLI4 routine for performing
1116 * uninitialization after the HBA is reset when bring down the SLI Layer.
1117 *
1118 * Return codes
af901ca1 1119 * 0 - success.
da0436e9
JS		 1120 * Any other value - error.
1121 **/
1122int
1123lpfc_hba_down_post(struct lpfc_hba *phba)
1124{
1125 return (*phba->lpfc_hba_down_post)(phba);
1126}
41415862 1127
e59058c4 1128/**
3621a710 1129 * lpfc_hb_timeout - The HBA-timer timeout handler
e59058c4
JS		 1130 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1131 *
1132 * This is the HBA-timer timeout handler registered to the lpfc driver. When
1133 * this timer fires, a HBA timeout event shall be posted to the lpfc driver
1134 * work-port-events bitmap and the worker thread is notified. This timeout
1135 * event will be used by the worker thread to invoke the actual timeout
1136 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will
1137 * be performed in the timeout handler and the HBA timeout event bit shall
1138 * be cleared by the worker thread after it has taken the event bitmap out.
1139 **/
a6ababd2 1140static void
f22eb4d3 1141lpfc_hb_timeout(struct timer_list *t)
858c9f6c
JS		 1142{
1143 struct lpfc_hba *phba;
5e9d9b82 1144 uint32_t tmo_posted;
858c9f6c
JS		 1145 unsigned long iflag;
1146
f22eb4d3 1147 phba = from_timer(phba, t, hb_tmofunc);
9399627f
JS		 1148
1149 /* Check for heart beat timeout conditions */
858c9f6c 1150 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
5e9d9b82
JS		 1151 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO;
1152 if (!tmo_posted)
858c9f6c
JS		 1153 phba->pport->work_port_events |= WORKER_HB_TMO;
1154 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1155
9399627f 1156 /* Tell the worker thread there is work to do */
5e9d9b82
JS		 1157 if (!tmo_posted)
1158 lpfc_worker_wake_up(phba);
858c9f6c
JS		 1159 return;
1160}
1161
19ca7609
JS		 1162/**
1163 * lpfc_rrq_timeout - The RRQ-timer timeout handler
1164 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1165 *
1166 * This is the RRQ-timer timeout handler registered to the lpfc driver. When
1167 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver
1168 * work-port-events bitmap and the worker thread is notified. This timeout
1169 * event will be used by the worker thread to invoke the actual timeout
1170 * handler routine, lpfc_rrq_handler. Any periodical operations will
1171 * be performed in the timeout handler and the RRQ timeout event bit shall
1172 * be cleared by the worker thread after it has taken the event bitmap out.
1173 **/
1174static void
f22eb4d3 1175lpfc_rrq_timeout(struct timer_list *t)
19ca7609
JS		 1176{
1177 struct lpfc_hba *phba;
19ca7609
JS		 1178 unsigned long iflag;
1179
f22eb4d3 1180 phba = from_timer(phba, t, rrq_tmr);
19ca7609 1181 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
06918ac5
JS		 1182 if (!(phba->pport->load_flag & FC_UNLOADING))
1183 phba->hba_flag |= HBA_RRQ_ACTIVE;
1184 else
1185 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
19ca7609 1186 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
06918ac5
JS		 1187
1188 if (!(phba->pport->load_flag & FC_UNLOADING))
1189 lpfc_worker_wake_up(phba);
19ca7609
JS		 1190}
1191
e59058c4 1192/**
3621a710 1193 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function
e59058c4
JS		 1194 * @phba: pointer to lpfc hba data structure.
1195 * @pmboxq: pointer to the driver internal queue element for mailbox command.
1196 *
1197 * This is the callback function to the lpfc heart-beat mailbox command.
1198 * If configured, the lpfc driver issues the heart-beat mailbox command to
1199 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the
1200 * heart-beat mailbox command is issued, the driver shall set up heart-beat
1201 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks
1202 * heart-beat outstanding state. Once the mailbox command comes back and
1203 * no error conditions detected, the heart-beat mailbox command timer is
1204 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding
1205 * state is cleared for the next heart-beat. If the timer expired with the
1206 * heart-beat outstanding state set, the driver will put the HBA offline.
1207 **/
858c9f6c
JS		 1208static void
1209lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
1210{
1211 unsigned long drvr_flag;
1212
1213 spin_lock_irqsave(&phba->hbalock, drvr_flag);
1214 phba->hb_outstanding = 0;
1215 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
1216
9399627f 1217 /* Check and reset heart-beat timer is necessary */
858c9f6c
JS		 1218 mempool_free(pmboxq, phba->mbox_mem_pool);
1219 if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) &&
1220 !(phba->link_state == LPFC_HBA_ERROR) &&
51ef4c26 1221 !(phba->pport->load_flag & FC_UNLOADING))
858c9f6c 1222 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1223 jiffies +
1224 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS		 1225 return;
1226}
1227
e59058c4 1228/**
3621a710 1229 * lpfc_hb_timeout_handler - The HBA-timer timeout handler
e59058c4
JS		 1230 * @phba: pointer to lpfc hba data structure.
1231 *
1232 * This is the actual HBA-timer timeout handler to be invoked by the worker
1233 * thread whenever the HBA timer fired and HBA-timeout event posted. This
1234 * handler performs any periodic operations needed for the device. If such
1235 * periodic event has already been attended to either in the interrupt handler
1236 * or by processing slow-ring or fast-ring events within the HBA-timer
1237 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets
1238 * the timer for the next timeout period. If lpfc heart-beat mailbox command
1239 * is configured and there is no heart-beat mailbox command outstanding, a
1240 * heart-beat mailbox is issued and timer set properly. Otherwise, if there
1241 * has been a heart-beat mailbox command outstanding, the HBA shall be put
1242 * to offline.
1243 **/
858c9f6c
JS		 1244void
1245lpfc_hb_timeout_handler(struct lpfc_hba *phba)
1246{
45ed1190 1247 struct lpfc_vport **vports;
858c9f6c 1248 LPFC_MBOXQ_t *pmboxq;
0ff10d46 1249 struct lpfc_dmabuf *buf_ptr;
45ed1190 1250 int retval, i;
858c9f6c 1251 struct lpfc_sli *psli = &phba->sli;
0ff10d46 1252 LIST_HEAD(completions);
0cf07f84
JS		 1253 struct lpfc_queue *qp;
1254 unsigned long time_elapsed;
1255 uint32_t tick_cqe, max_cqe, val;
1256 uint64_t tot, data1, data2, data3;
66d7ce93 1257 struct lpfc_nvmet_tgtport *tgtp;
0cf07f84
JS		 1258 struct lpfc_register reg_data;
1259 void __iomem *eqdreg = phba->sli4_hba.u.if_type2.EQDregaddr;
858c9f6c 1260
45ed1190
JS		 1261 vports = lpfc_create_vport_work_array(phba);
1262 if (vports != NULL)
4258e98e 1263 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
45ed1190 1264 lpfc_rcv_seq_check_edtov(vports[i]);
4258e98e
JS		 1265 lpfc_fdmi_num_disc_check(vports[i]);
1266 }
45ed1190
JS		 1267 lpfc_destroy_vport_work_array(phba, vports);
1268
858c9f6c 1269 if ((phba->link_state == LPFC_HBA_ERROR) ||
51ef4c26 1270 (phba->pport->load_flag & FC_UNLOADING) ||
858c9f6c
JS		 1271 (phba->pport->fc_flag & FC_OFFLINE_MODE))
1272 return;
1273
0cf07f84
JS		 1274 if (phba->cfg_auto_imax) {
1275 if (!phba->last_eqdelay_time) {
1276 phba->last_eqdelay_time = jiffies;
1277 goto skip_eqdelay;
1278 }
1279 time_elapsed = jiffies - phba->last_eqdelay_time;
1280 phba->last_eqdelay_time = jiffies;
1281
1282 tot = 0xffff;
1283 /* Check outstanding IO count */
1284 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1285 if (phba->nvmet_support) {
66d7ce93
DK		 1286 tgtp = phba->targetport->private;
1287 /* Calculate outstanding IOs */
1288 tot = atomic_read(&tgtp->rcv_fcp_cmd_drop);
1289 tot += atomic_read(&tgtp->xmt_fcp_release);
1290 tot = atomic_read(&tgtp->rcv_fcp_cmd_in) - tot;
0cf07f84
JS		 1291 } else {
1292 tot = atomic_read(&phba->fc4NvmeIoCmpls);
1293 data1 = atomic_read(
1294 &phba->fc4NvmeInputRequests);
1295 data2 = atomic_read(
1296 &phba->fc4NvmeOutputRequests);
1297 data3 = atomic_read(
1298 &phba->fc4NvmeControlRequests);
1299 tot = (data1 + data2 + data3) - tot;
1300 }
1301 }
1302
1303 /* Interrupts per sec per EQ */
1304 val = phba->cfg_fcp_imax / phba->io_channel_irqs;
1305 tick_cqe = val / CONFIG_HZ; /* Per tick per EQ */
1306
1307 /* Assume 1 CQE/ISR, calc max CQEs allowed for time duration */
1308 max_cqe = time_elapsed * tick_cqe;
1309
1310 for (i = 0; i < phba->io_channel_irqs; i++) {
1311 /* Fast-path EQ */
1312 qp = phba->sli4_hba.hba_eq[i];
1313 if (!qp)
1314 continue;
1315
1316 /* Use no EQ delay if we don't have many outstanding
1317 * IOs, or if we are only processing 1 CQE/ISR or less.
1318 * Otherwise, assume we can process up to lpfc_fcp_imax
1319 * interrupts per HBA.
1320 */
1321 if (tot < LPFC_NODELAY_MAX_IO ||
1322 qp->EQ_cqe_cnt <= max_cqe)
1323 val = 0;
1324 else
1325 val = phba->cfg_fcp_imax;
1326
1327 if (phba->sli.sli_flag & LPFC_SLI_USE_EQDR) {
1328 /* Use EQ Delay Register method */
1329
1330 /* Convert for EQ Delay register */
1331 if (val) {
1332 /* First, interrupts per sec per EQ */
1333 val = phba->cfg_fcp_imax /
1334 phba->io_channel_irqs;
1335
1336 /* us delay between each interrupt */
1337 val = LPFC_SEC_TO_USEC / val;
1338 }
1339 if (val != qp->q_mode) {
1340 reg_data.word0 = 0;
1341 bf_set(lpfc_sliport_eqdelay_id,
1342 &reg_data, qp->queue_id);
1343 bf_set(lpfc_sliport_eqdelay_delay,
1344 &reg_data, val);
1345 writel(reg_data.word0, eqdreg);
1346 }
1347 } else {
1348 /* Use mbox command method */
1349 if (val != qp->q_mode)
1350 lpfc_modify_hba_eq_delay(phba, i,
1351 1, val);
1352 }
1353
1354 /*
1355 * val is cfg_fcp_imax or 0 for mbox delay or us delay
1356 * between interrupts for EQDR.
1357 */
1358 qp->q_mode = val;
1359 qp->EQ_cqe_cnt = 0;
1360 }
1361 }
1362
1363skip_eqdelay:
858c9f6c 1364 spin_lock_irq(&phba->pport->work_port_lock);
858c9f6c 1365
256ec0d0
JS		 1366 if (time_after(phba->last_completion_time +
1367 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL),
1368 jiffies)) {
858c9f6c
JS		 1369 spin_unlock_irq(&phba->pport->work_port_lock);
1370 if (!phba->hb_outstanding)
1371 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1372 jiffies +
1373 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS		 1374 else
1375 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1376 jiffies +
1377 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c
JS		 1378 return;
1379 }
1380 spin_unlock_irq(&phba->pport->work_port_lock);
1381
0ff10d46
JS		 1382 if (phba->elsbuf_cnt &&
1383 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) {
1384 spin_lock_irq(&phba->hbalock);
1385 list_splice_init(&phba->elsbuf, &completions);
1386 phba->elsbuf_cnt = 0;
1387 phba->elsbuf_prev_cnt = 0;
1388 spin_unlock_irq(&phba->hbalock);
1389
1390 while (!list_empty(&completions)) {
1391 list_remove_head(&completions, buf_ptr,
1392 struct lpfc_dmabuf, list);
1393 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
1394 kfree(buf_ptr);
1395 }
1396 }
1397 phba->elsbuf_prev_cnt = phba->elsbuf_cnt;
1398
858c9f6c 1399 /* If there is no heart beat outstanding, issue a heartbeat command */
13815c83
JS		 1400 if (phba->cfg_enable_hba_heartbeat) {
1401 if (!phba->hb_outstanding) {
bc73905a
JS		 1402 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) &&
1403 (list_empty(&psli->mboxq))) {
1404 pmboxq = mempool_alloc(phba->mbox_mem_pool,
1405 GFP_KERNEL);
1406 if (!pmboxq) {
1407 mod_timer(&phba->hb_tmofunc,
1408 jiffies +
256ec0d0
JS		 1409 msecs_to_jiffies(1000 *
1410 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS		 1411 return;
1412 }
1413
1414 lpfc_heart_beat(phba, pmboxq);
1415 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl;
1416 pmboxq->vport = phba->pport;
1417 retval = lpfc_sli_issue_mbox(phba, pmboxq,
1418 MBX_NOWAIT);
1419
1420 if (retval != MBX_BUSY &&
1421 retval != MBX_SUCCESS) {
1422 mempool_free(pmboxq,
1423 phba->mbox_mem_pool);
1424 mod_timer(&phba->hb_tmofunc,
1425 jiffies +
256ec0d0
JS		 1426 msecs_to_jiffies(1000 *
1427 LPFC_HB_MBOX_INTERVAL));
bc73905a
JS		 1428 return;
1429 }
1430 phba->skipped_hb = 0;
1431 phba->hb_outstanding = 1;
1432 } else if (time_before_eq(phba->last_completion_time,
1433 phba->skipped_hb)) {
1434 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
1435 "2857 Last completion time not "
1436 " updated in %d ms\n",
1437 jiffies_to_msecs(jiffies
1438 - phba->last_completion_time));
1439 } else
1440 phba->skipped_hb = jiffies;
1441
858c9f6c 1442 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1443 jiffies +
1444 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1445 return;
13815c83
JS		 1446 } else {
1447 /*
1448 * If heart beat timeout called with hb_outstanding set
dcf2a4e0
JS		 1449 * we need to give the hb mailbox cmd a chance to
1450 * complete or TMO.
13815c83 1451 */
dcf2a4e0
JS		 1452 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1453 "0459 Adapter heartbeat still out"
1454 "standing:last compl time was %d ms.\n",
1455 jiffies_to_msecs(jiffies
1456 - phba->last_completion_time));
1457 mod_timer(&phba->hb_tmofunc,
256ec0d0
JS		 1458 jiffies +
1459 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
858c9f6c 1460 }
4258e98e
JS		 1461 } else {
1462 mod_timer(&phba->hb_tmofunc,
1463 jiffies +
1464 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
858c9f6c
JS		 1465 }
1466}
1467
e59058c4 1468/**
3621a710 1469 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention
e59058c4
JS		 1470 * @phba: pointer to lpfc hba data structure.
1471 *
1472 * This routine is called to bring the HBA offline when HBA hardware error
1473 * other than Port Error 6 has been detected.
1474 **/
09372820
JS		 1475static void
1476lpfc_offline_eratt(struct lpfc_hba *phba)
1477{
1478 struct lpfc_sli *psli = &phba->sli;
1479
1480 spin_lock_irq(&phba->hbalock);
f4b4c68f 1481 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
09372820 1482 spin_unlock_irq(&phba->hbalock);
618a5230 1483 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
09372820
JS		 1484
1485 lpfc_offline(phba);
1486 lpfc_reset_barrier(phba);
f4b4c68f 1487 spin_lock_irq(&phba->hbalock);
09372820 1488 lpfc_sli_brdreset(phba);
f4b4c68f 1489 spin_unlock_irq(&phba->hbalock);
09372820
JS		 1490 lpfc_hba_down_post(phba);
1491 lpfc_sli_brdready(phba, HS_MBRDY);
1492 lpfc_unblock_mgmt_io(phba);
1493 phba->link_state = LPFC_HBA_ERROR;
1494 return;
1495}
1496
da0436e9
JS		 1497/**
1498 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention
1499 * @phba: pointer to lpfc hba data structure.
1500 *
1501 * This routine is called to bring a SLI4 HBA offline when HBA hardware error
1502 * other than Port Error 6 has been detected.
1503 **/
a88dbb6a 1504void
da0436e9
JS		 1505lpfc_sli4_offline_eratt(struct lpfc_hba *phba)
1506{
946727dc
JS		 1507 spin_lock_irq(&phba->hbalock);
1508 phba->link_state = LPFC_HBA_ERROR;
1509 spin_unlock_irq(&phba->hbalock);
1510
618a5230 1511 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
da0436e9 1512 lpfc_offline(phba);
da0436e9 1513 lpfc_hba_down_post(phba);
da0436e9 1514 lpfc_unblock_mgmt_io(phba);
da0436e9
JS		 1515}
1516
a257bf90
JS		 1517/**
1518 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler
1519 * @phba: pointer to lpfc hba data structure.
1520 *
1521 * This routine is invoked to handle the deferred HBA hardware error
1522 * conditions. This type of error is indicated by HBA by setting ER1
1523 * and another ER bit in the host status register. The driver will
1524 * wait until the ER1 bit clears before handling the error condition.
1525 **/
1526static void
1527lpfc_handle_deferred_eratt(struct lpfc_hba *phba)
1528{
1529 uint32_t old_host_status = phba->work_hs;
a257bf90
JS		 1530 struct lpfc_sli *psli = &phba->sli;
1531
f4b4c68f
JS		 1532 /* If the pci channel is offline, ignore possible errors,
1533 * since we cannot communicate with the pci card anyway.
1534 */
1535 if (pci_channel_offline(phba->pcidev)) {
1536 spin_lock_irq(&phba->hbalock);
1537 phba->hba_flag &= ~DEFER_ERATT;
1538 spin_unlock_irq(&phba->hbalock);
1539 return;
1540 }
1541
a257bf90
JS		 1542 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1543 "0479 Deferred Adapter Hardware Error "
1544 "Data: x%x x%x x%x\n",
1545 phba->work_hs,
1546 phba->work_status[0], phba->work_status[1]);
1547
1548 spin_lock_irq(&phba->hbalock);
f4b4c68f 1549 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
a257bf90
JS		 1550 spin_unlock_irq(&phba->hbalock);
1551
1552
1553 /*
1554 * Firmware stops when it triggred erratt. That could cause the I/Os
1555 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the
1556 * SCSI layer retry it after re-establishing link.
1557 */
db55fba8 1558 lpfc_sli_abort_fcp_rings(phba);
a257bf90
JS		 1559
1560 /*
1561 * There was a firmware error. Take the hba offline and then
1562 * attempt to restart it.
1563 */
618a5230 1564 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
a257bf90
JS		 1565 lpfc_offline(phba);
1566
1567 /* Wait for the ER1 bit to clear.*/
1568 while (phba->work_hs & HS_FFER1) {
1569 msleep(100);
9940b97b
JS		 1570 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) {
1571 phba->work_hs = UNPLUG_ERR ;
1572 break;
1573 }
a257bf90
JS		 1574 /* If driver is unloading let the worker thread continue */
1575 if (phba->pport->load_flag & FC_UNLOADING) {
1576 phba->work_hs = 0;
1577 break;
1578 }
1579 }
1580
1581 /*
1582 * This is to ptrotect against a race condition in which
1583 * first write to the host attention register clear the
1584 * host status register.
1585 */
1586 if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING)))
1587 phba->work_hs = old_host_status & ~HS_FFER1;
1588
3772a991 1589 spin_lock_irq(&phba->hbalock);
a257bf90 1590 phba->hba_flag &= ~DEFER_ERATT;
3772a991 1591 spin_unlock_irq(&phba->hbalock);
a257bf90
JS		 1592 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
1593 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
1594}
1595
3772a991
JS		 1596static void
1597lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba)
1598{
1599 struct lpfc_board_event_header board_event;
1600 struct Scsi_Host *shost;
1601
1602 board_event.event_type = FC_REG_BOARD_EVENT;
1603 board_event.subcategory = LPFC_EVENT_PORTINTERR;
1604 shost = lpfc_shost_from_vport(phba->pport);
1605 fc_host_post_vendor_event(shost, fc_get_event_number(),
1606 sizeof(board_event),
1607 (char *) &board_event,
1608 LPFC_NL_VENDOR_ID);
1609}
1610
e59058c4 1611/**
3772a991 1612 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler
e59058c4
JS		 1613 * @phba: pointer to lpfc hba data structure.
1614 *
1615 * This routine is invoked to handle the following HBA hardware error
1616 * conditions:
1617 * 1 - HBA error attention interrupt
1618 * 2 - DMA ring index out of range
1619 * 3 - Mailbox command came back as unknown
1620 **/
3772a991
JS		 1621static void
1622lpfc_handle_eratt_s3(struct lpfc_hba *phba)
dea3101e 1623{
2e0fef85 1624 struct lpfc_vport *vport = phba->pport;
2e0fef85 1625 struct lpfc_sli *psli = &phba->sli;
d2873e4c 1626 uint32_t event_data;
57127f15
JS		 1627 unsigned long temperature;
1628 struct temp_event temp_event_data;
92d7f7b0 1629 struct Scsi_Host *shost;
2e0fef85 1630
8d63f375 1631 /* If the pci channel is offline, ignore possible errors,
3772a991
JS		 1632 * since we cannot communicate with the pci card anyway.
1633 */
1634 if (pci_channel_offline(phba->pcidev)) {
1635 spin_lock_irq(&phba->hbalock);
1636 phba->hba_flag &= ~DEFER_ERATT;
1637 spin_unlock_irq(&phba->hbalock);
8d63f375 1638 return;
3772a991
JS		 1639 }
1640
13815c83
JS		 1641 /* If resets are disabled then leave the HBA alone and return */
1642 if (!phba->cfg_enable_hba_reset)
1643 return;
dea3101e 1644
ea2151b4 1645 /* Send an internal error event to mgmt application */
3772a991 1646 lpfc_board_errevt_to_mgmt(phba);
ea2151b4 1647
a257bf90
JS		 1648 if (phba->hba_flag & DEFER_ERATT)
1649 lpfc_handle_deferred_eratt(phba);
1650
dcf2a4e0
JS		 1651 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) {
1652 if (phba->work_hs & HS_FFER6)
1653 /* Re-establishing Link */
1654 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1655 "1301 Re-establishing Link "
1656 "Data: x%x x%x x%x\n",
1657 phba->work_hs, phba->work_status[0],
1658 phba->work_status[1]);
1659 if (phba->work_hs & HS_FFER8)
1660 /* Device Zeroization */
1661 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1662 "2861 Host Authentication device "
1663 "zeroization Data:x%x x%x x%x\n",
1664 phba->work_hs, phba->work_status[0],
1665 phba->work_status[1]);
58da1ffb 1666
92d7f7b0 1667 spin_lock_irq(&phba->hbalock);
f4b4c68f 1668 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
92d7f7b0 1669 spin_unlock_irq(&phba->hbalock);
dea3101e 1670
1671 /*
1672 * Firmware stops when it triggled erratt with HS_FFER6.
1673 * That could cause the I/Os dropped by the firmware.
1674 * Error iocb (I/O) on txcmplq and let the SCSI layer
1675 * retry it after re-establishing link.
1676 */
db55fba8 1677 lpfc_sli_abort_fcp_rings(phba);
dea3101e 1678
dea3101e 1679 /*
1680 * There was a firmware error. Take the hba offline and then
1681 * attempt to restart it.
1682 */
618a5230 1683 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
dea3101e 1684 lpfc_offline(phba);
41415862 1685 lpfc_sli_brdrestart(phba);
dea3101e 1686 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
46fa311e 1687 lpfc_unblock_mgmt_io(phba);
dea3101e 1688 return;
1689 }
46fa311e 1690 lpfc_unblock_mgmt_io(phba);
57127f15
JS		 1691 } else if (phba->work_hs & HS_CRIT_TEMP) {
1692 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET);
1693 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1694 temp_event_data.event_code = LPFC_CRIT_TEMP;
1695 temp_event_data.data = (uint32_t)temperature;
1696
1697 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
d7c255b2 1698 "0406 Adapter maximum temperature exceeded "
57127f15
JS		 1699 "(%ld), taking this port offline "
1700 "Data: x%x x%x x%x\n",
1701 temperature, phba->work_hs,
1702 phba->work_status[0], phba->work_status[1]);
1703
1704 shost = lpfc_shost_from_vport(phba->pport);
1705 fc_host_post_vendor_event(shost, fc_get_event_number(),
1706 sizeof(temp_event_data),
1707 (char *) &temp_event_data,
1708 SCSI_NL_VID_TYPE_PCI
1709 | PCI_VENDOR_ID_EMULEX);
1710
7af67051 1711 spin_lock_irq(&phba->hbalock);
7af67051
JS		 1712 phba->over_temp_state = HBA_OVER_TEMP;
1713 spin_unlock_irq(&phba->hbalock);
09372820 1714 lpfc_offline_eratt(phba);
57127f15 1715
dea3101e 1716 } else {
1717 /* The if clause above forces this code path when the status
9399627f
JS		 1718 * failure is a value other than FFER6. Do not call the offline
1719 * twice. This is the adapter hardware error path.
dea3101e 1720 */
1721 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e8b62011 1722 "0457 Adapter Hardware Error "
dea3101e 1723 "Data: x%x x%x x%x\n",
e8b62011 1724 phba->work_hs,
dea3101e 1725 phba->work_status[0], phba->work_status[1]);
1726
d2873e4c 1727 event_data = FC_REG_DUMP_EVENT;
92d7f7b0 1728 shost = lpfc_shost_from_vport(vport);
2e0fef85 1729 fc_host_post_vendor_event(shost, fc_get_event_number(),
d2873e4c
JS		 1730 sizeof(event_data), (char *) &event_data,
1731 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
1732
09372820 1733 lpfc_offline_eratt(phba);
dea3101e 1734 }
9399627f 1735 return;
dea3101e 1736}
1737
618a5230
JS		 1738/**
1739 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg
1740 * @phba: pointer to lpfc hba data structure.
1741 * @mbx_action: flag for mailbox shutdown action.
1742 *
1743 * This routine is invoked to perform an SLI4 port PCI function reset in
1744 * response to port status register polling attention. It waits for port
1745 * status register (ERR, RDY, RN) bits before proceeding with function reset.
1746 * During this process, interrupt vectors are freed and later requested
1747 * for handling possible port resource change.
1748 **/
1749static int
e10b2022
JS		 1750lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action,
1751 bool en_rn_msg)
618a5230
JS		 1752{
1753 int rc;
1754 uint32_t intr_mode;
1755
65791f1f
JS		 1756 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
1757 LPFC_SLI_INTF_IF_TYPE_2) {
1758 /*
1759 * On error status condition, driver need to wait for port
1760 * ready before performing reset.
1761 */
1762 rc = lpfc_sli4_pdev_status_reg_wait(phba);
0e916ee7 1763 if (rc)
65791f1f
JS		 1764 return rc;
1765 }
0e916ee7 1766
65791f1f
JS		 1767 /* need reset: attempt for port recovery */
1768 if (en_rn_msg)
1769 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1770 "2887 Reset Needed: Attempting Port "
1771 "Recovery...\n");
1772 lpfc_offline_prep(phba, mbx_action);
1773 lpfc_offline(phba);
1774 /* release interrupt for possible resource change */
1775 lpfc_sli4_disable_intr(phba);
1776 lpfc_sli_brdrestart(phba);
1777 /* request and enable interrupt */
1778 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
1779 if (intr_mode == LPFC_INTR_ERROR) {
1780 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1781 "3175 Failed to enable interrupt\n");
1782 return -EIO;
618a5230 1783 }
65791f1f
JS		 1784 phba->intr_mode = intr_mode;
1785 rc = lpfc_online(phba);
1786 if (rc == 0)
1787 lpfc_unblock_mgmt_io(phba);
1788
618a5230
JS		 1789 return rc;
1790}
1791
da0436e9
JS		 1792/**
1793 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler
1794 * @phba: pointer to lpfc hba data structure.
1795 *
1796 * This routine is invoked to handle the SLI4 HBA hardware error attention
1797 * conditions.
1798 **/
1799static void
1800lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1801{
1802 struct lpfc_vport *vport = phba->pport;
1803 uint32_t event_data;
1804 struct Scsi_Host *shost;
2fcee4bf 1805 uint32_t if_type;
2e90f4b5
JS		 1806 struct lpfc_register portstat_reg = {0};
1807 uint32_t reg_err1, reg_err2;
1808 uint32_t uerrlo_reg, uemasklo_reg;
65791f1f 1809 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2;
e10b2022 1810 bool en_rn_msg = true;
946727dc 1811 struct temp_event temp_event_data;
65791f1f
JS		 1812 struct lpfc_register portsmphr_reg;
1813 int rc, i;
da0436e9
JS		 1814
1815 /* If the pci channel is offline, ignore possible errors, since
1816 * we cannot communicate with the pci card anyway.
1817 */
1818 if (pci_channel_offline(phba->pcidev))
1819 return;
da0436e9 1820
65791f1f 1821 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
2fcee4bf
JS		 1822 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
1823 switch (if_type) {
1824 case LPFC_SLI_INTF_IF_TYPE_0:
2e90f4b5
JS		 1825 pci_rd_rc1 = lpfc_readl(
1826 phba->sli4_hba.u.if_type0.UERRLOregaddr,
1827 &uerrlo_reg);
1828 pci_rd_rc2 = lpfc_readl(
1829 phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
1830 &uemasklo_reg);
1831 /* consider PCI bus read error as pci_channel_offline */
1832 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO)
1833 return;
65791f1f
JS		 1834 if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) {
1835 lpfc_sli4_offline_eratt(phba);
1836 return;
1837 }
1838 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1839 "7623 Checking UE recoverable");
1840
1841 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
1842 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1843 &portsmphr_reg.word0))
1844 continue;
1845
1846 smphr_port_status = bf_get(lpfc_port_smphr_port_status,
1847 &portsmphr_reg);
1848 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1849 LPFC_PORT_SEM_UE_RECOVERABLE)
1850 break;
1851 /*Sleep for 1Sec, before checking SEMAPHORE */
1852 msleep(1000);
1853 }
1854
1855 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1856 "4827 smphr_port_status x%x : Waited %dSec",
1857 smphr_port_status, i);
1858
1859 /* Recoverable UE, reset the HBA device */
1860 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1861 LPFC_PORT_SEM_UE_RECOVERABLE) {
1862 for (i = 0; i < 20; i++) {
1863 msleep(1000);
1864 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1865 &portsmphr_reg.word0) &&
1866 (LPFC_POST_STAGE_PORT_READY ==
1867 bf_get(lpfc_port_smphr_port_status,
1868 &portsmphr_reg))) {
1869 rc = lpfc_sli4_port_sta_fn_reset(phba,
1870 LPFC_MBX_NO_WAIT, en_rn_msg);
1871 if (rc == 0)
1872 return;
1873 lpfc_printf_log(phba,
1874 KERN_ERR, LOG_INIT,
1875 "4215 Failed to recover UE");
1876 break;
1877 }
1878 }
1879 }
1880 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1881 "7624 Firmware not ready: Failing UE recovery,"
1882 " waited %dSec", i);
2fcee4bf
JS		 1883 lpfc_sli4_offline_eratt(phba);
1884 break;
946727dc 1885
2fcee4bf 1886 case LPFC_SLI_INTF_IF_TYPE_2:
2e90f4b5
JS		 1887 pci_rd_rc1 = lpfc_readl(
1888 phba->sli4_hba.u.if_type2.STATUSregaddr,
1889 &portstat_reg.word0);
1890 /* consider PCI bus read error as pci_channel_offline */
6b5151fd
JS		 1891 if (pci_rd_rc1 == -EIO) {
1892 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1893 "3151 PCI bus read access failure: x%x\n",
1894 readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
2e90f4b5 1895 return;
6b5151fd 1896 }
2e90f4b5
JS		 1897 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
1898 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
2fcee4bf 1899 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
2fcee4bf
JS		 1900 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1901 "2889 Port Overtemperature event, "
946727dc
JS		 1902 "taking port offline Data: x%x x%x\n",
1903 reg_err1, reg_err2);
1904
310429ef 1905 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS		 1906 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1907 temp_event_data.event_code = LPFC_CRIT_TEMP;
1908 temp_event_data.data = 0xFFFFFFFF;
1909
1910 shost = lpfc_shost_from_vport(phba->pport);
1911 fc_host_post_vendor_event(shost, fc_get_event_number(),
1912 sizeof(temp_event_data),
1913 (char *)&temp_event_data,
1914 SCSI_NL_VID_TYPE_PCI
1915 | PCI_VENDOR_ID_EMULEX);
1916
2fcee4bf
JS		 1917 spin_lock_irq(&phba->hbalock);
1918 phba->over_temp_state = HBA_OVER_TEMP;
1919 spin_unlock_irq(&phba->hbalock);
1920 lpfc_sli4_offline_eratt(phba);
946727dc 1921 return;
2fcee4bf 1922 }
2e90f4b5 1923 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
e10b2022 1924 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) {
2e90f4b5 1925 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e10b2022
JS		 1926 "3143 Port Down: Firmware Update "
1927 "Detected\n");
1928 en_rn_msg = false;
1929 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2e90f4b5
JS		 1930 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1931 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1932 "3144 Port Down: Debug Dump\n");
1933 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1934 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON)
1935 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1936 "3145 Port Down: Provisioning\n");
618a5230 1937
946727dc
JS		 1938 /* If resets are disabled then leave the HBA alone and return */
1939 if (!phba->cfg_enable_hba_reset)
1940 return;
1941
618a5230 1942 /* Check port status register for function reset */
e10b2022
JS		 1943 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT,
1944 en_rn_msg);
618a5230
JS		 1945 if (rc == 0) {
1946 /* don't report event on forced debug dump */
1947 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1948 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1949 return;
1950 else
1951 break;
2fcee4bf 1952 }
618a5230 1953 /* fall through for not able to recover */
6b5151fd
JS		 1954 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1955 "3152 Unrecoverable error, bring the port "
1956 "offline\n");
2fcee4bf
JS		 1957 lpfc_sli4_offline_eratt(phba);
1958 break;
1959 case LPFC_SLI_INTF_IF_TYPE_1:
1960 default:
1961 break;
1962 }
2e90f4b5
JS		 1963 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1964 "3123 Report dump event to upper layer\n");
1965 /* Send an internal error event to mgmt application */
1966 lpfc_board_errevt_to_mgmt(phba);
1967
1968 event_data = FC_REG_DUMP_EVENT;
1969 shost = lpfc_shost_from_vport(vport);
1970 fc_host_post_vendor_event(shost, fc_get_event_number(),
1971 sizeof(event_data), (char *) &event_data,
1972 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
da0436e9
JS		 1973}
1974
1975/**
1976 * lpfc_handle_eratt - Wrapper func for handling hba error attention
1977 * @phba: pointer to lpfc HBA data structure.
1978 *
1979 * This routine wraps the actual SLI3 or SLI4 hba error attention handling
1980 * routine from the API jump table function pointer from the lpfc_hba struct.
1981 *
1982 * Return codes
af901ca1 1983 * 0 - success.
da0436e9
JS		 1984 * Any other value - error.
1985 **/
1986void
1987lpfc_handle_eratt(struct lpfc_hba *phba)
1988{
1989 (*phba->lpfc_handle_eratt)(phba);
1990}
1991
e59058c4 1992/**
3621a710 1993 * lpfc_handle_latt - The HBA link event handler
e59058c4
JS		 1994 * @phba: pointer to lpfc hba data structure.
1995 *
1996 * This routine is invoked from the worker thread to handle a HBA host
895427bd 1997 * attention link event. SLI3 only.
e59058c4 1998 **/
dea3101e 1999void
2e0fef85 2000lpfc_handle_latt(struct lpfc_hba *phba)
dea3101e 2001{
2e0fef85
JS		 2002 struct lpfc_vport *vport = phba->pport;
2003 struct lpfc_sli *psli = &phba->sli;
dea3101e 2004 LPFC_MBOXQ_t *pmb;
2005 volatile uint32_t control;
2006 struct lpfc_dmabuf *mp;
09372820 2007 int rc = 0;
dea3101e 2008
2009 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
09372820
JS		 2010 if (!pmb) {
2011 rc = 1;
dea3101e 2012 goto lpfc_handle_latt_err_exit;
09372820 2013 }
dea3101e 2014
2015 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
09372820
JS		 2016 if (!mp) {
2017 rc = 2;
dea3101e 2018 goto lpfc_handle_latt_free_pmb;
09372820 2019 }
dea3101e 2020
2021 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
09372820
JS		 2022 if (!mp->virt) {
2023 rc = 3;
dea3101e 2024 goto lpfc_handle_latt_free_mp;
09372820 2025 }
dea3101e 2026
6281bfe0 2027 /* Cleanup any outstanding ELS commands */
549e55cd 2028 lpfc_els_flush_all_cmd(phba);
dea3101e 2029
2030 psli->slistat.link_event++;
76a95d75
JS		 2031 lpfc_read_topology(phba, pmb, mp);
2032 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
2e0fef85 2033 pmb->vport = vport;
0d2b6b83 2034 /* Block ELS IOCBs until we have processed this mbox command */
895427bd 2035 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
0b727fea 2036 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT);
09372820
JS		 2037 if (rc == MBX_NOT_FINISHED) {
2038 rc = 4;
14691150 2039 goto lpfc_handle_latt_free_mbuf;
09372820 2040 }
dea3101e 2041
2042 /* Clear Link Attention in HA REG */
2e0fef85 2043 spin_lock_irq(&phba->hbalock);
dea3101e 2044 writel(HA_LATT, phba->HAregaddr);
2045 readl(phba->HAregaddr); /* flush */
2e0fef85 2046 spin_unlock_irq(&phba->hbalock);
dea3101e 2047
2048 return;
2049
14691150 2050lpfc_handle_latt_free_mbuf:
895427bd 2051 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
14691150 2052 lpfc_mbuf_free(phba, mp->virt, mp->phys);
dea3101e 2053lpfc_handle_latt_free_mp:
2054 kfree(mp);
2055lpfc_handle_latt_free_pmb:
1dcb58e5 2056 mempool_free(pmb, phba->mbox_mem_pool);
dea3101e 2057lpfc_handle_latt_err_exit:
2058 /* Enable Link attention interrupts */
2e0fef85 2059 spin_lock_irq(&phba->hbalock);
dea3101e 2060 psli->sli_flag |= LPFC_PROCESS_LA;
2061 control = readl(phba->HCregaddr);
2062 control |= HC_LAINT_ENA;
2063 writel(control, phba->HCregaddr);
2064 readl(phba->HCregaddr); /* flush */
2065
2066 /* Clear Link Attention in HA REG */
2067 writel(HA_LATT, phba->HAregaddr);
2068 readl(phba->HAregaddr); /* flush */
2e0fef85 2069 spin_unlock_irq(&phba->hbalock);
dea3101e 2070 lpfc_linkdown(phba);
2e0fef85 2071 phba->link_state = LPFC_HBA_ERROR;
dea3101e 2072
09372820
JS		 2073 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
2074 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc);
dea3101e 2075
2076 return;
2077}
2078
e59058c4 2079/**
3621a710 2080 * lpfc_parse_vpd - Parse VPD (Vital Product Data)
e59058c4
JS		 2081 * @phba: pointer to lpfc hba data structure.
2082 * @vpd: pointer to the vital product data.
2083 * @len: length of the vital product data in bytes.
2084 *
2085 * This routine parses the Vital Product Data (VPD). The VPD is treated as
2086 * an array of characters. In this routine, the ModelName, ProgramType, and
2087 * ModelDesc, etc. fields of the phba data structure will be populated.
2088 *
2089 * Return codes
2090 * 0 - pointer to the VPD passed in is NULL
2091 * 1 - success
2092 **/
3772a991 2093int
2e0fef85 2094lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len)
dea3101e 2095{
2096 uint8_t lenlo, lenhi;
07da60c1 2097 int Length;
dea3101e 2098 int i, j;
2099 int finished = 0;
2100 int index = 0;
2101
2102 if (!vpd)
2103 return 0;
2104
2105 /* Vital Product */
ed957684 2106 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011 2107 "0455 Vital Product Data: x%x x%x x%x x%x\n",
dea3101e 2108 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
2109 (uint32_t) vpd[3]);
74b72a59 2110 while (!finished && (index < (len - 4))) {
dea3101e 2111 switch (vpd[index]) {
2112 case 0x82:
74b72a59 2113 case 0x91:
dea3101e 2114 index += 1;
2115 lenlo = vpd[index];
2116 index += 1;
2117 lenhi = vpd[index];
2118 index += 1;
2119 i = ((((unsigned short)lenhi) << 8) + lenlo);
2120 index += i;
2121 break;
2122 case 0x90:
2123 index += 1;
2124 lenlo = vpd[index];
2125 index += 1;
2126 lenhi = vpd[index];
2127 index += 1;
2128 Length = ((((unsigned short)lenhi) << 8) + lenlo);
74b72a59
JW		 2129 if (Length > len - index)
2130 Length = len - index;
dea3101e 2131 while (Length > 0) {
2132 /* Look for Serial Number */
2133 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
2134 index += 2;
2135 i = vpd[index];
2136 index += 1;
2137 j = 0;
2138 Length -= (3+i);
2139 while(i--) {
2140 phba->SerialNumber[j++] = vpd[index++];
2141 if (j == 31)
2142 break;
2143 }
2144 phba->SerialNumber[j] = 0;
2145 continue;
2146 }
2147 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
2148 phba->vpd_flag |= VPD_MODEL_DESC;
2149 index += 2;
2150 i = vpd[index];
2151 index += 1;
2152 j = 0;
2153 Length -= (3+i);
2154 while(i--) {
2155 phba->ModelDesc[j++] = vpd[index++];
2156 if (j == 255)
2157 break;
2158 }
2159 phba->ModelDesc[j] = 0;
2160 continue;
2161 }
2162 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
2163 phba->vpd_flag |= VPD_MODEL_NAME;
2164 index += 2;
2165 i = vpd[index];
2166 index += 1;
2167 j = 0;
2168 Length -= (3+i);
2169 while(i--) {
2170 phba->ModelName[j++] = vpd[index++];
2171 if (j == 79)
2172 break;
2173 }
2174 phba->ModelName[j] = 0;
2175 continue;
2176 }
2177 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
2178 phba->vpd_flag |= VPD_PROGRAM_TYPE;
2179 index += 2;
2180 i = vpd[index];
2181 index += 1;
2182 j = 0;
2183 Length -= (3+i);
2184 while(i--) {
2185 phba->ProgramType[j++] = vpd[index++];
2186 if (j == 255)
2187 break;
2188 }
2189 phba->ProgramType[j] = 0;
2190 continue;
2191 }
2192 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
2193 phba->vpd_flag |= VPD_PORT;
2194 index += 2;
2195 i = vpd[index];
2196 index += 1;
2197 j = 0;
2198 Length -= (3+i);
2199 while(i--) {
cd1c8301
JS		 2200 if ((phba->sli_rev == LPFC_SLI_REV4) &&
2201 (phba->sli4_hba.pport_name_sta ==
2202 LPFC_SLI4_PPNAME_GET)) {
2203 j++;
2204 index++;
2205 } else
2206 phba->Port[j++] = vpd[index++];
2207 if (j == 19)
2208 break;
dea3101e 2209 }
cd1c8301
JS		 2210 if ((phba->sli_rev != LPFC_SLI_REV4) ||
2211 (phba->sli4_hba.pport_name_sta ==
2212 LPFC_SLI4_PPNAME_NON))
2213 phba->Port[j] = 0;
dea3101e 2214 continue;
2215 }
2216 else {
2217 index += 2;
2218 i = vpd[index];
2219 index += 1;
2220 index += i;
2221 Length -= (3 + i);
2222 }
2223 }
2224 finished = 0;
2225 break;
2226 case 0x78:
2227 finished = 1;
2228 break;
2229 default:
2230 index ++;
2231 break;
2232 }
74b72a59 2233 }
dea3101e 2234
2235 return(1);
2236}
2237
e59058c4 2238/**
3621a710 2239 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description
e59058c4
JS		 2240 * @phba: pointer to lpfc hba data structure.
2241 * @mdp: pointer to the data structure to hold the derived model name.
2242 * @descp: pointer to the data structure to hold the derived description.
2243 *
2244 * This routine retrieves HBA's description based on its registered PCI device
2245 * ID. The @descp passed into this function points to an array of 256 chars. It
2246 * shall be returned with the model name, maximum speed, and the host bus type.
2247 * The @mdp passed into this function points to an array of 80 chars. When the
2248 * function returns, the @mdp will be filled with the model name.
2249 **/
dea3101e 2250static void
2e0fef85 2251lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
dea3101e 2252{
2253 lpfc_vpd_t *vp;
fefcb2b6 2254 uint16_t dev_id = phba->pcidev->device;
74b72a59 2255 int max_speed;
84774a4d 2256 int GE = 0;
da0436e9 2257 int oneConnect = 0; /* default is not a oneConnect */
74b72a59 2258 struct {
a747c9ce
JS		 2259 char *name;
2260 char *bus;
2261 char *function;
2262 } m = {"<Unknown>", "", ""};
74b72a59
JW		 2263
2264 if (mdp && mdp[0] != '\0'
2265 && descp && descp[0] != '\0')
2266 return;
2267
d38dd52c
JS		 2268 if (phba->lmt & LMT_32Gb)
2269 max_speed = 32;
2270 else if (phba->lmt & LMT_16Gb)
c0c11512
JS		 2271 max_speed = 16;
2272 else if (phba->lmt & LMT_10Gb)
74b72a59
JW		 2273 max_speed = 10;
2274 else if (phba->lmt & LMT_8Gb)
2275 max_speed = 8;
2276 else if (phba->lmt & LMT_4Gb)
2277 max_speed = 4;
2278 else if (phba->lmt & LMT_2Gb)
2279 max_speed = 2;
4169d868 2280 else if (phba->lmt & LMT_1Gb)
74b72a59 2281 max_speed = 1;
4169d868
JS		 2282 else
2283 max_speed = 0;
dea3101e 2284
2285 vp = &phba->vpd;
dea3101e 2286
e4adb204 2287 switch (dev_id) {
06325e74 2288 case PCI_DEVICE_ID_FIREFLY:
12222f4f
JS		 2289 m = (typeof(m)){"LP6000", "PCI",
2290 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2291 break;
dea3101e 2292 case PCI_DEVICE_ID_SUPERFLY:
2293 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
12222f4f 2294 m = (typeof(m)){"LP7000", "PCI", ""};
dea3101e 2295 else
12222f4f
JS		 2296 m = (typeof(m)){"LP7000E", "PCI", ""};
2297 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e 2298 break;
2299 case PCI_DEVICE_ID_DRAGONFLY:
a747c9ce 2300 m = (typeof(m)){"LP8000", "PCI",
12222f4f 2301 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2302 break;
2303 case PCI_DEVICE_ID_CENTAUR:
2304 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
12222f4f 2305 m = (typeof(m)){"LP9002", "PCI", ""};
dea3101e 2306 else
12222f4f
JS		 2307 m = (typeof(m)){"LP9000", "PCI", ""};
2308 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
dea3101e 2309 break;
2310 case PCI_DEVICE_ID_RFLY:
a747c9ce 2311 m = (typeof(m)){"LP952", "PCI",
12222f4f 2312 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2313 break;
2314 case PCI_DEVICE_ID_PEGASUS:
a747c9ce 2315 m = (typeof(m)){"LP9802", "PCI-X",
12222f4f 2316 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2317 break;
2318 case PCI_DEVICE_ID_THOR:
a747c9ce 2319 m = (typeof(m)){"LP10000", "PCI-X",
12222f4f 2320 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2321 break;
2322 case PCI_DEVICE_ID_VIPER:
a747c9ce 2323 m = (typeof(m)){"LPX1000", "PCI-X",
12222f4f 2324 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2325 break;
2326 case PCI_DEVICE_ID_PFLY:
a747c9ce 2327 m = (typeof(m)){"LP982", "PCI-X",
12222f4f 2328 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2329 break;
2330 case PCI_DEVICE_ID_TFLY:
a747c9ce 2331 m = (typeof(m)){"LP1050", "PCI-X",
12222f4f 2332 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2333 break;
2334 case PCI_DEVICE_ID_HELIOS:
a747c9ce 2335 m = (typeof(m)){"LP11000", "PCI-X2",
12222f4f 2336 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2337 break;
e4adb204 2338 case PCI_DEVICE_ID_HELIOS_SCSP:
a747c9ce 2339 m = (typeof(m)){"LP11000-SP", "PCI-X2",
12222f4f 2340 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC		 2341 break;
2342 case PCI_DEVICE_ID_HELIOS_DCSP:
a747c9ce 2343 m = (typeof(m)){"LP11002-SP", "PCI-X2",
12222f4f 2344 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC		 2345 break;
2346 case PCI_DEVICE_ID_NEPTUNE:
12222f4f
JS		 2347 m = (typeof(m)){"LPe1000", "PCIe",
2348 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC		 2349 break;
2350 case PCI_DEVICE_ID_NEPTUNE_SCSP:
12222f4f
JS		 2351 m = (typeof(m)){"LPe1000-SP", "PCIe",
2352 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204
JSEC		 2353 break;
2354 case PCI_DEVICE_ID_NEPTUNE_DCSP:
12222f4f
JS		 2355 m = (typeof(m)){"LPe1002-SP", "PCIe",
2356 "Obsolete, Unsupported Fibre Channel Adapter"};
e4adb204 2357 break;
dea3101e 2358 case PCI_DEVICE_ID_BMID:
a747c9ce 2359 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"};
dea3101e 2360 break;
2361 case PCI_DEVICE_ID_BSMB:
12222f4f
JS		 2362 m = (typeof(m)){"LP111", "PCI-X2",
2363 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2364 break;
2365 case PCI_DEVICE_ID_ZEPHYR:
a747c9ce 2366 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
dea3101e 2367 break;
e4adb204 2368 case PCI_DEVICE_ID_ZEPHYR_SCSP:
a747c9ce 2369 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
e4adb204
JSEC		 2370 break;
2371 case PCI_DEVICE_ID_ZEPHYR_DCSP:
a747c9ce 2372 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"};
a257bf90 2373 GE = 1;
e4adb204 2374 break;
dea3101e 2375 case PCI_DEVICE_ID_ZMID:
a747c9ce 2376 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"};
dea3101e 2377 break;
2378 case PCI_DEVICE_ID_ZSMB:
a747c9ce 2379 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"};
dea3101e 2380 break;
2381 case PCI_DEVICE_ID_LP101:
12222f4f
JS		 2382 m = (typeof(m)){"LP101", "PCI-X",
2383 "Obsolete, Unsupported Fibre Channel Adapter"};
dea3101e 2384 break;
2385 case PCI_DEVICE_ID_LP10000S:
12222f4f
JS		 2386 m = (typeof(m)){"LP10000-S", "PCI",
2387 "Obsolete, Unsupported Fibre Channel Adapter"};
06325e74 2388 break;
e4adb204 2389 case PCI_DEVICE_ID_LP11000S:
12222f4f
JS		 2390 m = (typeof(m)){"LP11000-S", "PCI-X2",
2391 "Obsolete, Unsupported Fibre Channel Adapter"};
18a3b596 2392 break;
e4adb204 2393 case PCI_DEVICE_ID_LPE11000S:
12222f4f
JS		 2394 m = (typeof(m)){"LPe11000-S", "PCIe",
2395 "Obsolete, Unsupported Fibre Channel Adapter"};
5cc36b3c 2396 break;
b87eab38 2397 case PCI_DEVICE_ID_SAT:
a747c9ce 2398 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2399 break;
2400 case PCI_DEVICE_ID_SAT_MID:
a747c9ce 2401 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2402 break;
2403 case PCI_DEVICE_ID_SAT_SMB:
a747c9ce 2404 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2405 break;
2406 case PCI_DEVICE_ID_SAT_DCSP:
a747c9ce 2407 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2408 break;
2409 case PCI_DEVICE_ID_SAT_SCSP:
a747c9ce 2410 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"};
b87eab38
JS		 2411 break;
2412 case PCI_DEVICE_ID_SAT_S:
a747c9ce 2413 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"};
b87eab38 2414 break;
84774a4d 2415 case PCI_DEVICE_ID_HORNET:
12222f4f
JS		 2416 m = (typeof(m)){"LP21000", "PCIe",
2417 "Obsolete, Unsupported FCoE Adapter"};
84774a4d
JS		 2418 GE = 1;
2419 break;
2420 case PCI_DEVICE_ID_PROTEUS_VF:
a747c9ce 2421 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2422 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS		 2423 break;
2424 case PCI_DEVICE_ID_PROTEUS_PF:
a747c9ce 2425 m = (typeof(m)){"LPev12000", "PCIe IOV",
12222f4f 2426 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d
JS		 2427 break;
2428 case PCI_DEVICE_ID_PROTEUS_S:
a747c9ce 2429 m = (typeof(m)){"LPemv12002-S", "PCIe IOV",
12222f4f 2430 "Obsolete, Unsupported Fibre Channel Adapter"};
84774a4d 2431 break;
da0436e9
JS		 2432 case PCI_DEVICE_ID_TIGERSHARK:
2433 oneConnect = 1;
a747c9ce 2434 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"};
da0436e9 2435 break;
a747c9ce 2436 case PCI_DEVICE_ID_TOMCAT:
6669f9bb 2437 oneConnect = 1;
a747c9ce
JS		 2438 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"};
2439 break;
2440 case PCI_DEVICE_ID_FALCON:
2441 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe",
2442 "EmulexSecure Fibre"};
6669f9bb 2443 break;
98fc5dd9
JS		 2444 case PCI_DEVICE_ID_BALIUS:
2445 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O",
12222f4f 2446 "Obsolete, Unsupported Fibre Channel Adapter"};
98fc5dd9 2447 break;
085c647c 2448 case PCI_DEVICE_ID_LANCER_FC:
c0c11512 2449 m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"};
085c647c 2450 break;
12222f4f
JS		 2451 case PCI_DEVICE_ID_LANCER_FC_VF:
2452 m = (typeof(m)){"LPe16000", "PCIe",
2453 "Obsolete, Unsupported Fibre Channel Adapter"};
2454 break;
085c647c
JS		 2455 case PCI_DEVICE_ID_LANCER_FCOE:
2456 oneConnect = 1;
079b5c91 2457 m = (typeof(m)){"OCe15100", "PCIe", "FCoE"};
085c647c 2458 break;
12222f4f
JS		 2459 case PCI_DEVICE_ID_LANCER_FCOE_VF:
2460 oneConnect = 1;
2461 m = (typeof(m)){"OCe15100", "PCIe",
2462 "Obsolete, Unsupported FCoE"};
2463 break;
d38dd52c
JS		 2464 case PCI_DEVICE_ID_LANCER_G6_FC:
2465 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"};
2466 break;
f8cafd38
JS		 2467 case PCI_DEVICE_ID_SKYHAWK:
2468 case PCI_DEVICE_ID_SKYHAWK_VF:
2469 oneConnect = 1;
2470 m = (typeof(m)){"OCe14000", "PCIe", "FCoE"};
2471 break;
5cc36b3c 2472 default:
a747c9ce 2473 m = (typeof(m)){"Unknown", "", ""};
e4adb204 2474 break;
dea3101e 2475 }
74b72a59
JW		 2476
2477 if (mdp && mdp[0] == '\0')
2478 snprintf(mdp, 79,"%s", m.name);
c0c11512
JS		 2479 /*
2480 * oneConnect hba requires special processing, they are all initiators
da0436e9
JS		 2481 * and we put the port number on the end
2482 */
2483 if (descp && descp[0] == '\0') {
2484 if (oneConnect)
2485 snprintf(descp, 255,
4169d868 2486 "Emulex OneConnect %s, %s Initiator %s",
a747c9ce 2487 m.name, m.function,
da0436e9 2488 phba->Port);
4169d868
JS		 2489 else if (max_speed == 0)
2490 snprintf(descp, 255,
290237d2 2491 "Emulex %s %s %s",
4169d868 2492 m.name, m.bus, m.function);
da0436e9
JS		 2493 else
2494 snprintf(descp, 255,
2495 "Emulex %s %d%s %s %s",
a747c9ce
JS		 2496 m.name, max_speed, (GE) ? "GE" : "Gb",
2497 m.bus, m.function);
da0436e9 2498 }
dea3101e 2499}
2500
e59058c4 2501/**
3621a710 2502 * lpfc_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring
e59058c4
JS		 2503 * @phba: pointer to lpfc hba data structure.
2504 * @pring: pointer to a IOCB ring.
2505 * @cnt: the number of IOCBs to be posted to the IOCB ring.
2506 *
2507 * This routine posts a given number of IOCBs with the associated DMA buffer
2508 * descriptors specified by the cnt argument to the given IOCB ring.
2509 *
2510 * Return codes
2511 * The number of IOCBs NOT able to be posted to the IOCB ring.
2512 **/
dea3101e 2513int
495a714c 2514lpfc_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt)
dea3101e 2515{
2516 IOCB_t *icmd;
0bd4ca25 2517 struct lpfc_iocbq *iocb;
dea3101e 2518 struct lpfc_dmabuf *mp1, *mp2;
2519
2520 cnt += pring->missbufcnt;
2521
2522 /* While there are buffers to post */
2523 while (cnt > 0) {
2524 /* Allocate buffer for command iocb */
0bd4ca25 2525 iocb = lpfc_sli_get_iocbq(phba);
dea3101e 2526 if (iocb == NULL) {
2527 pring->missbufcnt = cnt;
2528 return cnt;
2529 }
dea3101e 2530 icmd = &iocb->iocb;
2531
2532 /* 2 buffers can be posted per command */
2533 /* Allocate buffer to post */
2534 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2535 if (mp1)
98c9ea5c
JS		 2536 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys);
2537 if (!mp1 || !mp1->virt) {
c9475cb0 2538 kfree(mp1);
604a3e30 2539 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2540 pring->missbufcnt = cnt;
2541 return cnt;
2542 }
2543
2544 INIT_LIST_HEAD(&mp1->list);
2545 /* Allocate buffer to post */
2546 if (cnt > 1) {
2547 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2548 if (mp2)
2549 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
2550 &mp2->phys);
98c9ea5c 2551 if (!mp2 || !mp2->virt) {
c9475cb0 2552 kfree(mp2);
dea3101e 2553 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2554 kfree(mp1);
604a3e30 2555 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2556 pring->missbufcnt = cnt;
2557 return cnt;
2558 }
2559
2560 INIT_LIST_HEAD(&mp2->list);
2561 } else {
2562 mp2 = NULL;
2563 }
2564
2565 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
2566 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
2567 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
2568 icmd->ulpBdeCount = 1;
2569 cnt--;
2570 if (mp2) {
2571 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
2572 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
2573 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
2574 cnt--;
2575 icmd->ulpBdeCount = 2;
2576 }
2577
2578 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
2579 icmd->ulpLe = 1;
2580
3772a991
JS		 2581 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) ==
2582 IOCB_ERROR) {
dea3101e 2583 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2584 kfree(mp1);
2585 cnt++;
2586 if (mp2) {
2587 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
2588 kfree(mp2);
2589 cnt++;
2590 }
604a3e30 2591 lpfc_sli_release_iocbq(phba, iocb);
dea3101e 2592 pring->missbufcnt = cnt;
dea3101e 2593 return cnt;
2594 }
dea3101e 2595 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
92d7f7b0 2596 if (mp2)
dea3101e 2597 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
dea3101e 2598 }
2599 pring->missbufcnt = 0;
2600 return 0;
2601}
2602
e59058c4 2603/**
3621a710 2604 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring
e59058c4
JS		 2605 * @phba: pointer to lpfc hba data structure.
2606 *
2607 * This routine posts initial receive IOCB buffers to the ELS ring. The
2608 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is
895427bd 2609 * set to 64 IOCBs. SLI3 only.
e59058c4
JS		 2610 *
2611 * Return codes
2612 * 0 - success (currently always success)
2613 **/
dea3101e 2614static int
2e0fef85 2615lpfc_post_rcv_buf(struct lpfc_hba *phba)
dea3101e 2616{
2617 struct lpfc_sli *psli = &phba->sli;
2618
2619 /* Ring 0, ELS / CT buffers */
895427bd 2620 lpfc_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0);
dea3101e 2621 /* Ring 2 - FCP no buffers needed */
2622
2623 return 0;
2624}
2625
2626#define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
2627
e59058c4 2628/**
3621a710 2629 * lpfc_sha_init - Set up initial array of hash table entries
e59058c4
JS		 2630 * @HashResultPointer: pointer to an array as hash table.
2631 *
2632 * This routine sets up the initial values to the array of hash table entries
2633 * for the LC HBAs.
2634 **/
dea3101e 2635static void
2636lpfc_sha_init(uint32_t * HashResultPointer)
2637{
2638 HashResultPointer[0] = 0x67452301;
2639 HashResultPointer[1] = 0xEFCDAB89;
2640 HashResultPointer[2] = 0x98BADCFE;
2641 HashResultPointer[3] = 0x10325476;
2642 HashResultPointer[4] = 0xC3D2E1F0;
2643}
2644
e59058c4 2645/**
3621a710 2646 * lpfc_sha_iterate - Iterate initial hash table with the working hash table
e59058c4
JS		 2647 * @HashResultPointer: pointer to an initial/result hash table.
2648 * @HashWorkingPointer: pointer to an working hash table.
2649 *
2650 * This routine iterates an initial hash table pointed by @HashResultPointer
2651 * with the values from the working hash table pointeed by @HashWorkingPointer.
2652 * The results are putting back to the initial hash table, returned through
2653 * the @HashResultPointer as the result hash table.
2654 **/
dea3101e 2655static void
2656lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
2657{
2658 int t;
2659 uint32_t TEMP;
2660 uint32_t A, B, C, D, E;
2661 t = 16;
2662 do {
2663 HashWorkingPointer[t] =
2664 S(1,
2665 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
2666 8] ^
2667 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
2668 } while (++t <= 79);
2669 t = 0;
2670 A = HashResultPointer[0];
2671 B = HashResultPointer[1];
2672 C = HashResultPointer[2];
2673 D = HashResultPointer[3];
2674 E = HashResultPointer[4];
2675
2676 do {
2677 if (t < 20) {
2678 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
2679 } else if (t < 40) {
2680 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
2681 } else if (t < 60) {
2682 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
2683 } else {
2684 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
2685 }
2686 TEMP += S(5, A) + E + HashWorkingPointer[t];
2687 E = D;
2688 D = C;
2689 C = S(30, B);
2690 B = A;
2691 A = TEMP;
2692 } while (++t <= 79);
2693
2694 HashResultPointer[0] += A;
2695 HashResultPointer[1] += B;
2696 HashResultPointer[2] += C;
2697 HashResultPointer[3] += D;
2698 HashResultPointer[4] += E;
2699
2700}
2701
e59058c4 2702/**
3621a710 2703 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA
e59058c4
JS		 2704 * @RandomChallenge: pointer to the entry of host challenge random number array.
2705 * @HashWorking: pointer to the entry of the working hash array.
2706 *
2707 * This routine calculates the working hash array referred by @HashWorking
2708 * from the challenge random numbers associated with the host, referred by
2709 * @RandomChallenge. The result is put into the entry of the working hash
2710 * array and returned by reference through @HashWorking.
2711 **/
dea3101e 2712static void
2713lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
2714{
2715 *HashWorking = (*RandomChallenge ^ *HashWorking);
2716}
2717
e59058c4 2718/**
3621a710 2719 * lpfc_hba_init - Perform special handling for LC HBA initialization
e59058c4
JS		 2720 * @phba: pointer to lpfc hba data structure.
2721 * @hbainit: pointer to an array of unsigned 32-bit integers.
2722 *
2723 * This routine performs the special handling for LC HBA initialization.
2724 **/
dea3101e 2725void
2726lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
2727{
2728 int t;
2729 uint32_t *HashWorking;
2e0fef85 2730 uint32_t *pwwnn = (uint32_t *) phba->wwnn;
dea3101e 2731
bbfbbbc1 2732 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL);
dea3101e 2733 if (!HashWorking)
2734 return;
2735
dea3101e 2736 HashWorking[0] = HashWorking[78] = *pwwnn++;
2737 HashWorking[1] = HashWorking[79] = *pwwnn;
2738
2739 for (t = 0; t < 7; t++)
2740 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
2741
2742 lpfc_sha_init(hbainit);
2743 lpfc_sha_iterate(hbainit, HashWorking);
2744 kfree(HashWorking);
2745}
2746
e59058c4 2747/**
3621a710 2748 * lpfc_cleanup - Performs vport cleanups before deleting a vport
e59058c4
JS		 2749 * @vport: pointer to a virtual N_Port data structure.
2750 *
2751 * This routine performs the necessary cleanups before deleting the @vport.
2752 * It invokes the discovery state machine to perform necessary state
2753 * transitions and to release the ndlps associated with the @vport. Note,
2754 * the physical port is treated as @vport 0.
2755 **/
87af33fe 2756void
2e0fef85 2757lpfc_cleanup(struct lpfc_vport *vport)
dea3101e 2758{
87af33fe 2759 struct lpfc_hba *phba = vport->phba;
dea3101e 2760 struct lpfc_nodelist *ndlp, *next_ndlp;
a8adb832 2761 int i = 0;
dea3101e 2762
87af33fe
JS		 2763 if (phba->link_state > LPFC_LINK_DOWN)
2764 lpfc_port_link_failure(vport);
2765
2766 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) {
e47c9093
JS		 2767 if (!NLP_CHK_NODE_ACT(ndlp)) {
2768 ndlp = lpfc_enable_node(vport, ndlp,
2769 NLP_STE_UNUSED_NODE);
2770 if (!ndlp)
2771 continue;
2772 spin_lock_irq(&phba->ndlp_lock);
2773 NLP_SET_FREE_REQ(ndlp);
2774 spin_unlock_irq(&phba->ndlp_lock);
2775 /* Trigger the release of the ndlp memory */
2776 lpfc_nlp_put(ndlp);
2777 continue;
2778 }
2779 spin_lock_irq(&phba->ndlp_lock);
2780 if (NLP_CHK_FREE_REQ(ndlp)) {
2781 /* The ndlp should not be in memory free mode already */
2782 spin_unlock_irq(&phba->ndlp_lock);
2783 continue;
2784 } else
2785 /* Indicate request for freeing ndlp memory */
2786 NLP_SET_FREE_REQ(ndlp);
2787 spin_unlock_irq(&phba->ndlp_lock);
2788
58da1ffb
JS		 2789 if (vport->port_type != LPFC_PHYSICAL_PORT &&
2790 ndlp->nlp_DID == Fabric_DID) {
2791 /* Just free up ndlp with Fabric_DID for vports */
2792 lpfc_nlp_put(ndlp);
2793 continue;
2794 }
2795
eff4a01b
JS		 2796 /* take care of nodes in unused state before the state
2797 * machine taking action.
2798 */
2799 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) {
2800 lpfc_nlp_put(ndlp);
2801 continue;
2802 }
2803
87af33fe
JS		 2804 if (ndlp->nlp_type & NLP_FABRIC)
2805 lpfc_disc_state_machine(vport, ndlp, NULL,
2806 NLP_EVT_DEVICE_RECOVERY);
e47c9093 2807
87af33fe
JS		 2808 lpfc_disc_state_machine(vport, ndlp, NULL,
2809 NLP_EVT_DEVICE_RM);
2810 }
2811
a8adb832
JS		 2812 /* At this point, ALL ndlp's should be gone
2813 * because of the previous NLP_EVT_DEVICE_RM.
2814 * Lets wait for this to happen, if needed.
2815 */
87af33fe 2816 while (!list_empty(&vport->fc_nodes)) {
a8adb832 2817 if (i++ > 3000) {
87af33fe 2818 lpfc_printf_vlog(vport, KERN_ERR, LOG_DISCOVERY,
a8adb832 2819 "0233 Nodelist not empty\n");
e47c9093
JS		 2820 list_for_each_entry_safe(ndlp, next_ndlp,
2821 &vport->fc_nodes, nlp_listp) {
2822 lpfc_printf_vlog(ndlp->vport, KERN_ERR,
2823 LOG_NODE,
d7c255b2 2824 "0282 did:x%x ndlp:x%p "
e47c9093
JS		 2825 "usgmap:x%x refcnt:%d\n",
2826 ndlp->nlp_DID, (void *)ndlp,
2827 ndlp->nlp_usg_map,
2c935bc5 2828 kref_read(&ndlp->kref));
e47c9093 2829 }
a8adb832 2830 break;
87af33fe 2831 }
a8adb832
JS		 2832
2833 /* Wait for any activity on ndlps to settle */
2834 msleep(10);
87af33fe 2835 }
1151e3ec 2836 lpfc_cleanup_vports_rrqs(vport, NULL);
dea3101e 2837}
2838
e59058c4 2839/**
3621a710 2840 * lpfc_stop_vport_timers - Stop all the timers associated with a vport
e59058c4
JS		 2841 * @vport: pointer to a virtual N_Port data structure.
2842 *
2843 * This routine stops all the timers associated with a @vport. This function
2844 * is invoked before disabling or deleting a @vport. Note that the physical
2845 * port is treated as @vport 0.
2846 **/
92d7f7b0
JS		 2847void
2848lpfc_stop_vport_timers(struct lpfc_vport *vport)
dea3101e 2849{
92d7f7b0 2850 del_timer_sync(&vport->els_tmofunc);
92494144 2851 del_timer_sync(&vport->delayed_disc_tmo);
92d7f7b0
JS		 2852 lpfc_can_disctmo(vport);
2853 return;
dea3101e 2854}
2855
ecfd03c6
JS		 2856/**
2857 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2858 * @phba: pointer to lpfc hba data structure.
2859 *
2860 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The
2861 * caller of this routine should already hold the host lock.
2862 **/
2863void
2864__lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2865{
5ac6b303
JS		 2866 /* Clear pending FCF rediscovery wait flag */
2867 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
2868
ecfd03c6
JS		 2869 /* Now, try to stop the timer */
2870 del_timer(&phba->fcf.redisc_wait);
2871}
2872
2873/**
2874 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2875 * @phba: pointer to lpfc hba data structure.
2876 *
2877 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It
2878 * checks whether the FCF rediscovery wait timer is pending with the host
2879 * lock held before proceeding with disabling the timer and clearing the
2880 * wait timer pendig flag.
2881 **/
2882void
2883lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2884{
2885 spin_lock_irq(&phba->hbalock);
2886 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
2887 /* FCF rediscovery timer already fired or stopped */
2888 spin_unlock_irq(&phba->hbalock);
2889 return;
2890 }
2891 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
5ac6b303
JS		 2892 /* Clear failover in progress flags */
2893 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC);
ecfd03c6
JS		 2894 spin_unlock_irq(&phba->hbalock);
2895}
2896
e59058c4 2897/**
3772a991 2898 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA
e59058c4
JS		 2899 * @phba: pointer to lpfc hba data structure.
2900 *
2901 * This routine stops all the timers associated with a HBA. This function is
2902 * invoked before either putting a HBA offline or unloading the driver.
2903 **/
3772a991
JS		 2904void
2905lpfc_stop_hba_timers(struct lpfc_hba *phba)
dea3101e 2906{
51ef4c26 2907 lpfc_stop_vport_timers(phba->pport);
2e0fef85 2908 del_timer_sync(&phba->sli.mbox_tmo);
92d7f7b0 2909 del_timer_sync(&phba->fabric_block_timer);
9399627f 2910 del_timer_sync(&phba->eratt_poll);
3772a991 2911 del_timer_sync(&phba->hb_tmofunc);
1151e3ec
JS		 2912 if (phba->sli_rev == LPFC_SLI_REV4) {
2913 del_timer_sync(&phba->rrq_tmr);
2914 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
2915 }
3772a991
JS		 2916 phba->hb_outstanding = 0;
2917
2918 switch (phba->pci_dev_grp) {
2919 case LPFC_PCI_DEV_LP:
2920 /* Stop any LightPulse device specific driver timers */
2921 del_timer_sync(&phba->fcp_poll_timer);
2922 break;
2923 case LPFC_PCI_DEV_OC:
2924 /* Stop any OneConnect device sepcific driver timers */
ecfd03c6 2925 lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3772a991
JS		 2926 break;
2927 default:
2928 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2929 "0297 Invalid device group (x%x)\n",
2930 phba->pci_dev_grp);
2931 break;
2932 }
2e0fef85 2933 return;
dea3101e 2934}
2935
e59058c4 2936/**
3621a710 2937 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked
e59058c4
JS		 2938 * @phba: pointer to lpfc hba data structure.
2939 *
2940 * This routine marks a HBA's management interface as blocked. Once the HBA's
2941 * management interface is marked as blocked, all the user space access to
2942 * the HBA, whether they are from sysfs interface or libdfc interface will
2943 * all be blocked. The HBA is set to block the management interface when the
2944 * driver prepares the HBA interface for online or offline.
2945 **/
a6ababd2 2946static void
618a5230 2947lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action)
a6ababd2
AB		 2948{
2949 unsigned long iflag;
6e7288d9
JS		 2950 uint8_t actcmd = MBX_HEARTBEAT;
2951 unsigned long timeout;
2952
a6ababd2
AB		 2953 spin_lock_irqsave(&phba->hbalock, iflag);
2954 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO;
618a5230
JS		 2955 spin_unlock_irqrestore(&phba->hbalock, iflag);
2956 if (mbx_action == LPFC_MBX_NO_WAIT)
2957 return;
2958 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
2959 spin_lock_irqsave(&phba->hbalock, iflag);
a183a15f 2960 if (phba->sli.mbox_active) {
6e7288d9 2961 actcmd = phba->sli.mbox_active->u.mb.mbxCommand;
a183a15f
JS		 2962 /* Determine how long we might wait for the active mailbox
2963 * command to be gracefully completed by firmware.
2964 */
2965 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
2966 phba->sli.mbox_active) * 1000) + jiffies;
2967 }
a6ababd2 2968 spin_unlock_irqrestore(&phba->hbalock, iflag);
a183a15f 2969
6e7288d9
JS		 2970 /* Wait for the outstnading mailbox command to complete */
2971 while (phba->sli.mbox_active) {
2972 /* Check active mailbox complete status every 2ms */
2973 msleep(2);
2974 if (time_after(jiffies, timeout)) {
2975 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2976 "2813 Mgmt IO is Blocked %x "
2977 "- mbox cmd %x still active\n",
2978 phba->sli.sli_flag, actcmd);
2979 break;
2980 }
2981 }
a6ababd2
AB		 2982}
2983
6b5151fd
JS		 2984/**
2985 * lpfc_sli4_node_prep - Assign RPIs for active nodes.
2986 * @phba: pointer to lpfc hba data structure.
2987 *
2988 * Allocate RPIs for all active remote nodes. This is needed whenever
2989 * an SLI4 adapter is reset and the driver is not unloading. Its purpose
2990 * is to fixup the temporary rpi assignments.
2991 **/
2992void
2993lpfc_sli4_node_prep(struct lpfc_hba *phba)
2994{
2995 struct lpfc_nodelist *ndlp, *next_ndlp;
2996 struct lpfc_vport **vports;
9d3d340d
JS		 2997 int i, rpi;
2998 unsigned long flags;
6b5151fd
JS		 2999
3000 if (phba->sli_rev != LPFC_SLI_REV4)
3001 return;
3002
3003 vports = lpfc_create_vport_work_array(phba);
9d3d340d
JS		 3004 if (vports == NULL)
3005 return;
6b5151fd 3006
9d3d340d
JS		 3007 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3008 if (vports[i]->load_flag & FC_UNLOADING)
3009 continue;
3010
3011 list_for_each_entry_safe(ndlp, next_ndlp,
3012 &vports[i]->fc_nodes,
3013 nlp_listp) {
3014 if (!NLP_CHK_NODE_ACT(ndlp))
3015 continue;
3016 rpi = lpfc_sli4_alloc_rpi(phba);
3017 if (rpi == LPFC_RPI_ALLOC_ERROR) {
3018 spin_lock_irqsave(&phba->ndlp_lock, flags);
3019 NLP_CLR_NODE_ACT(ndlp);
3020 spin_unlock_irqrestore(&phba->ndlp_lock, flags);
3021 continue;
6b5151fd 3022 }
9d3d340d
JS		 3023 ndlp->nlp_rpi = rpi;
3024 lpfc_printf_vlog(ndlp->vport, KERN_INFO, LOG_NODE,
3025 "0009 rpi:%x DID:%x "
3026 "flg:%x map:%x %p\n", ndlp->nlp_rpi,
3027 ndlp->nlp_DID, ndlp->nlp_flag,
3028 ndlp->nlp_usg_map, ndlp);
6b5151fd
JS		 3029 }
3030 }
3031 lpfc_destroy_vport_work_array(phba, vports);
3032}
3033
e59058c4 3034/**
3621a710 3035 * lpfc_online - Initialize and bring a HBA online
e59058c4
JS		 3036 * @phba: pointer to lpfc hba data structure.
3037 *
3038 * This routine initializes the HBA and brings a HBA online. During this
3039 * process, the management interface is blocked to prevent user space access
3040 * to the HBA interfering with the driver initialization.
3041 *
3042 * Return codes
3043 * 0 - successful
3044 * 1 - failed
3045 **/
dea3101e 3046int
2e0fef85 3047lpfc_online(struct lpfc_hba *phba)
dea3101e 3048{
372bd282 3049 struct lpfc_vport *vport;
549e55cd 3050 struct lpfc_vport **vports;
a145fda3 3051 int i, error = 0;
16a3a208 3052 bool vpis_cleared = false;
2e0fef85 3053
dea3101e 3054 if (!phba)
3055 return 0;
372bd282 3056 vport = phba->pport;
dea3101e 3057
2e0fef85 3058 if (!(vport->fc_flag & FC_OFFLINE_MODE))
dea3101e 3059 return 0;
3060
ed957684 3061 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 3062 "0458 Bring Adapter online\n");
dea3101e 3063
618a5230 3064 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
46fa311e 3065
da0436e9
JS		 3066 if (phba->sli_rev == LPFC_SLI_REV4) {
3067 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */
3068 lpfc_unblock_mgmt_io(phba);
3069 return 1;
3070 }
16a3a208
JS		 3071 spin_lock_irq(&phba->hbalock);
3072 if (!phba->sli4_hba.max_cfg_param.vpi_used)
3073 vpis_cleared = true;
3074 spin_unlock_irq(&phba->hbalock);
a145fda3
DK		 3075
3076 /* Reestablish the local initiator port.
3077 * The offline process destroyed the previous lport.
3078 */
3079 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME &&
3080 !phba->nvmet_support) {
3081 error = lpfc_nvme_create_localport(phba->pport);
3082 if (error)
3083 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
3084 "6132 NVME restore reg failed "
3085 "on nvmei error x%x\n", error);
3086 }
da0436e9 3087 } else {
895427bd 3088 lpfc_sli_queue_init(phba);
da0436e9
JS		 3089 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */
3090 lpfc_unblock_mgmt_io(phba);
3091 return 1;
3092 }
46fa311e 3093 }
dea3101e 3094
549e55cd 3095 vports = lpfc_create_vport_work_array(phba);
aeb6641f 3096 if (vports != NULL) {
da0436e9 3097 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd
JS		 3098 struct Scsi_Host *shost;
3099 shost = lpfc_shost_from_vport(vports[i]);
3100 spin_lock_irq(shost->host_lock);
3101 vports[i]->fc_flag &= ~FC_OFFLINE_MODE;
3102 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)
3103 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
16a3a208 3104 if (phba->sli_rev == LPFC_SLI_REV4) {
1c6834a7 3105 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI;
16a3a208
JS		 3106 if ((vpis_cleared) &&
3107 (vports[i]->port_type !=
3108 LPFC_PHYSICAL_PORT))
3109 vports[i]->vpi = 0;
3110 }
549e55cd
JS		 3111 spin_unlock_irq(shost->host_lock);
3112 }
aeb6641f
AB		 3113 }
3114 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3115
46fa311e 3116 lpfc_unblock_mgmt_io(phba);
dea3101e 3117 return 0;
3118}
3119
e59058c4 3120/**
3621a710 3121 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked
e59058c4
JS		 3122 * @phba: pointer to lpfc hba data structure.
3123 *
3124 * This routine marks a HBA's management interface as not blocked. Once the
3125 * HBA's management interface is marked as not blocked, all the user space
3126 * access to the HBA, whether they are from sysfs interface or libdfc
3127 * interface will be allowed. The HBA is set to block the management interface
3128 * when the driver prepares the HBA interface for online or offline and then
3129 * set to unblock the management interface afterwards.
3130 **/
46fa311e
JS		 3131void
3132lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
3133{
3134 unsigned long iflag;
3135
2e0fef85
JS		 3136 spin_lock_irqsave(&phba->hbalock, iflag);
3137 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO;
3138 spin_unlock_irqrestore(&phba->hbalock, iflag);
46fa311e
JS		 3139}
3140
e59058c4 3141/**
3621a710 3142 * lpfc_offline_prep - Prepare a HBA to be brought offline
e59058c4
JS		 3143 * @phba: pointer to lpfc hba data structure.
3144 *
3145 * This routine is invoked to prepare a HBA to be brought offline. It performs
3146 * unregistration login to all the nodes on all vports and flushes the mailbox
3147 * queue to make it ready to be brought offline.
3148 **/
46fa311e 3149void
618a5230 3150lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action)
46fa311e 3151{
2e0fef85 3152 struct lpfc_vport *vport = phba->pport;
46fa311e 3153 struct lpfc_nodelist *ndlp, *next_ndlp;
87af33fe 3154 struct lpfc_vport **vports;
72100cc4 3155 struct Scsi_Host *shost;
87af33fe 3156 int i;
dea3101e 3157
2e0fef85 3158 if (vport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3159 return;
dea3101e 3160
618a5230 3161 lpfc_block_mgmt_io(phba, mbx_action);
dea3101e 3162
3163 lpfc_linkdown(phba);
3164
87af33fe
JS		 3165 /* Issue an unreg_login to all nodes on all vports */
3166 vports = lpfc_create_vport_work_array(phba);
3167 if (vports != NULL) {
da0436e9 3168 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
a8adb832
JS		 3169 if (vports[i]->load_flag & FC_UNLOADING)
3170 continue;
72100cc4
JS		 3171 shost = lpfc_shost_from_vport(vports[i]);
3172 spin_lock_irq(shost->host_lock);
c868595d 3173 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
695a814e
JS		 3174 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
3175 vports[i]->fc_flag &= ~FC_VFI_REGISTERED;
72100cc4 3176 spin_unlock_irq(shost->host_lock);
695a814e 3177
87af33fe
JS		 3178 shost = lpfc_shost_from_vport(vports[i]);
3179 list_for_each_entry_safe(ndlp, next_ndlp,
3180 &vports[i]->fc_nodes,
3181 nlp_listp) {
e47c9093
JS		 3182 if (!NLP_CHK_NODE_ACT(ndlp))
3183 continue;
87af33fe
JS		 3184 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE)
3185 continue;
3186 if (ndlp->nlp_type & NLP_FABRIC) {
3187 lpfc_disc_state_machine(vports[i], ndlp,
3188 NULL, NLP_EVT_DEVICE_RECOVERY);
3189 lpfc_disc_state_machine(vports[i], ndlp,
3190 NULL, NLP_EVT_DEVICE_RM);
3191 }
3192 spin_lock_irq(shost->host_lock);
3193 ndlp->nlp_flag &= ~NLP_NPR_ADISC;
401ee0c1 3194 spin_unlock_irq(shost->host_lock);
6b5151fd
JS		 3195 /*
3196 * Whenever an SLI4 port goes offline, free the
401ee0c1
JS		 3197 * RPI. Get a new RPI when the adapter port
3198 * comes back online.
6b5151fd 3199 */
be6bb941
JS		 3200 if (phba->sli_rev == LPFC_SLI_REV4) {
3201 lpfc_printf_vlog(ndlp->vport,
3202 KERN_INFO, LOG_NODE,
3203 "0011 lpfc_offline: "
3204 "ndlp:x%p did %x "
3205 "usgmap:x%x rpi:%x\n",
3206 ndlp, ndlp->nlp_DID,
3207 ndlp->nlp_usg_map,
3208 ndlp->nlp_rpi);
3209
6b5151fd 3210 lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi);
be6bb941 3211 }
87af33fe
JS		 3212 lpfc_unreg_rpi(vports[i], ndlp);
3213 }
3214 }
3215 }
09372820 3216 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3217
618a5230 3218 lpfc_sli_mbox_sys_shutdown(phba, mbx_action);
f485c18d
DK		 3219
3220 if (phba->wq)
3221 flush_workqueue(phba->wq);
46fa311e
JS		 3222}
3223
e59058c4 3224/**
3621a710 3225 * lpfc_offline - Bring a HBA offline
e59058c4
JS		 3226 * @phba: pointer to lpfc hba data structure.
3227 *
3228 * This routine actually brings a HBA offline. It stops all the timers
3229 * associated with the HBA, brings down the SLI layer, and eventually
3230 * marks the HBA as in offline state for the upper layer protocol.
3231 **/
46fa311e 3232void
2e0fef85 3233lpfc_offline(struct lpfc_hba *phba)
46fa311e 3234{
549e55cd
JS		 3235 struct Scsi_Host *shost;
3236 struct lpfc_vport **vports;
3237 int i;
46fa311e 3238
549e55cd 3239 if (phba->pport->fc_flag & FC_OFFLINE_MODE)
46fa311e 3240 return;
688a8863 3241
da0436e9
JS		 3242 /* stop port and all timers associated with this hba */
3243 lpfc_stop_port(phba);
4b40d02b
DK		 3244
3245 /* Tear down the local and target port registrations. The
3246 * nvme transports need to cleanup.
3247 */
3248 lpfc_nvmet_destroy_targetport(phba);
3249 lpfc_nvme_destroy_localport(phba->pport);
3250
51ef4c26
JS		 3251 vports = lpfc_create_vport_work_array(phba);
3252 if (vports != NULL)
da0436e9 3253 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
51ef4c26 3254 lpfc_stop_vport_timers(vports[i]);
09372820 3255 lpfc_destroy_vport_work_array(phba, vports);
92d7f7b0 3256 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
e8b62011 3257 "0460 Bring Adapter offline\n");
dea3101e 3258 /* Bring down the SLI Layer and cleanup. The HBA is offline
3259 now. */
3260 lpfc_sli_hba_down(phba);
92d7f7b0 3261 spin_lock_irq(&phba->hbalock);
7054a606 3262 phba->work_ha = 0;
92d7f7b0 3263 spin_unlock_irq(&phba->hbalock);
549e55cd
JS		 3264 vports = lpfc_create_vport_work_array(phba);
3265 if (vports != NULL)
da0436e9 3266 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
549e55cd 3267 shost = lpfc_shost_from_vport(vports[i]);
549e55cd
JS		 3268 spin_lock_irq(shost->host_lock);
3269 vports[i]->work_port_events = 0;
3270 vports[i]->fc_flag |= FC_OFFLINE_MODE;
3271 spin_unlock_irq(shost->host_lock);
3272 }
09372820 3273 lpfc_destroy_vport_work_array(phba, vports);
dea3101e 3274}
3275
e59058c4 3276/**
3621a710 3277 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists
e59058c4
JS		 3278 * @phba: pointer to lpfc hba data structure.
3279 *
3280 * This routine is to free all the SCSI buffers and IOCBs from the driver
3281 * list back to kernel. It is called from lpfc_pci_remove_one to free
3282 * the internal resources before the device is removed from the system.
e59058c4 3283 **/
8a9d2e80 3284static void
2e0fef85 3285lpfc_scsi_free(struct lpfc_hba *phba)
dea3101e 3286{
3287 struct lpfc_scsi_buf *sb, *sb_next;
dea3101e 3288
895427bd
JS		 3289 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3290 return;
3291
2e0fef85 3292 spin_lock_irq(&phba->hbalock);
a40fc5f0 3293
dea3101e 3294 /* Release all the lpfc_scsi_bufs maintained by this host. */
a40fc5f0
JS		 3295
3296 spin_lock(&phba->scsi_buf_list_put_lock);
3297 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put,
3298 list) {
dea3101e 3299 list_del(&sb->list);
771db5c0 3300 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3301 sb->dma_handle);
dea3101e 3302 kfree(sb);
3303 phba->total_scsi_bufs--;
3304 }
a40fc5f0
JS		 3305 spin_unlock(&phba->scsi_buf_list_put_lock);
3306
3307 spin_lock(&phba->scsi_buf_list_get_lock);
3308 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get,
3309 list) {
dea3101e 3310 list_del(&sb->list);
771db5c0 3311 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
92d7f7b0 3312 sb->dma_handle);
dea3101e 3313 kfree(sb);
3314 phba->total_scsi_bufs--;
3315 }
a40fc5f0 3316 spin_unlock(&phba->scsi_buf_list_get_lock);
2e0fef85 3317 spin_unlock_irq(&phba->hbalock);
8a9d2e80 3318}
895427bd
JS		 3319/**
3320 * lpfc_nvme_free - Free all the NVME buffers and IOCBs from driver lists
3321 * @phba: pointer to lpfc hba data structure.
3322 *
3323 * This routine is to free all the NVME buffers and IOCBs from the driver
3324 * list back to kernel. It is called from lpfc_pci_remove_one to free
3325 * the internal resources before the device is removed from the system.
3326 **/
3327static void
3328lpfc_nvme_free(struct lpfc_hba *phba)
3329{
3330 struct lpfc_nvme_buf *lpfc_ncmd, *lpfc_ncmd_next;
895427bd
JS		 3331
3332 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3333 return;
3334
3335 spin_lock_irq(&phba->hbalock);
3336
3337 /* Release all the lpfc_nvme_bufs maintained by this host. */
3338 spin_lock(&phba->nvme_buf_list_put_lock);
3339 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3340 &phba->lpfc_nvme_buf_list_put, list) {
3341 list_del(&lpfc_ncmd->list);
771db5c0 3342 dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
895427bd
JS		 3343 lpfc_ncmd->dma_handle);
3344 kfree(lpfc_ncmd);
3345 phba->total_nvme_bufs--;
3346 }
3347 spin_unlock(&phba->nvme_buf_list_put_lock);
3348
3349 spin_lock(&phba->nvme_buf_list_get_lock);
3350 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3351 &phba->lpfc_nvme_buf_list_get, list) {
3352 list_del(&lpfc_ncmd->list);
771db5c0 3353 dma_pool_free(phba->lpfc_sg_dma_buf_pool, lpfc_ncmd->data,
895427bd
JS		 3354 lpfc_ncmd->dma_handle);
3355 kfree(lpfc_ncmd);
3356 phba->total_nvme_bufs--;
3357 }
3358 spin_unlock(&phba->nvme_buf_list_get_lock);
895427bd
JS		 3359 spin_unlock_irq(&phba->hbalock);
3360}
8a9d2e80 3361/**
895427bd 3362 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping
8a9d2e80
JS		 3363 * @phba: pointer to lpfc hba data structure.
3364 *
3365 * This routine first calculates the sizes of the current els and allocated
3366 * scsi sgl lists, and then goes through all sgls to updates the physical
3367 * XRIs assigned due to port function reset. During port initialization, the
3368 * current els and allocated scsi sgl lists are 0s.
3369 *
3370 * Return codes
3371 * 0 - successful (for now, it always returns 0)
3372 **/
3373int
895427bd 3374lpfc_sli4_els_sgl_update(struct lpfc_hba *phba)
8a9d2e80
JS		 3375{
3376 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
895427bd 3377 uint16_t i, lxri, xri_cnt, els_xri_cnt;
8a9d2e80 3378 LIST_HEAD(els_sgl_list);
8a9d2e80
JS		 3379 int rc;
3380
3381 /*
3382 * update on pci function's els xri-sgl list
3383 */
3384 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
895427bd 3385
8a9d2e80
JS		 3386 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
3387 /* els xri-sgl expanded */
3388 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
3389 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3390 "3157 ELS xri-sgl count increased from "
3391 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3392 els_xri_cnt);
3393 /* allocate the additional els sgls */
3394 for (i = 0; i < xri_cnt; i++) {
3395 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3396 GFP_KERNEL);
3397 if (sglq_entry == NULL) {
3398 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3399 "2562 Failure to allocate an "
3400 "ELS sgl entry:%d\n", i);
3401 rc = -ENOMEM;
3402 goto out_free_mem;
3403 }
3404 sglq_entry->buff_type = GEN_BUFF_TYPE;
3405 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0,
3406 &sglq_entry->phys);
3407 if (sglq_entry->virt == NULL) {
3408 kfree(sglq_entry);
3409 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3410 "2563 Failure to allocate an "
3411 "ELS mbuf:%d\n", i);
3412 rc = -ENOMEM;
3413 goto out_free_mem;
3414 }
3415 sglq_entry->sgl = sglq_entry->virt;
3416 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE);
3417 sglq_entry->state = SGL_FREED;
3418 list_add_tail(&sglq_entry->list, &els_sgl_list);
3419 }
38c20673 3420 spin_lock_irq(&phba->hbalock);
895427bd
JS		 3421 spin_lock(&phba->sli4_hba.sgl_list_lock);
3422 list_splice_init(&els_sgl_list,
3423 &phba->sli4_hba.lpfc_els_sgl_list);
3424 spin_unlock(&phba->sli4_hba.sgl_list_lock);
38c20673 3425 spin_unlock_irq(&phba->hbalock);
8a9d2e80
JS		 3426 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
3427 /* els xri-sgl shrinked */
3428 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
3429 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3430 "3158 ELS xri-sgl count decreased from "
3431 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3432 els_xri_cnt);
3433 spin_lock_irq(&phba->hbalock);
895427bd
JS		 3434 spin_lock(&phba->sli4_hba.sgl_list_lock);
3435 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list,
3436 &els_sgl_list);
8a9d2e80
JS		 3437 /* release extra els sgls from list */
3438 for (i = 0; i < xri_cnt; i++) {
3439 list_remove_head(&els_sgl_list,
3440 sglq_entry, struct lpfc_sglq, list);
3441 if (sglq_entry) {
895427bd
JS		 3442 __lpfc_mbuf_free(phba, sglq_entry->virt,
3443 sglq_entry->phys);
8a9d2e80
JS		 3444 kfree(sglq_entry);
3445 }
3446 }
895427bd
JS		 3447 list_splice_init(&els_sgl_list,
3448 &phba->sli4_hba.lpfc_els_sgl_list);
3449 spin_unlock(&phba->sli4_hba.sgl_list_lock);
8a9d2e80
JS		 3450 spin_unlock_irq(&phba->hbalock);
3451 } else
3452 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3453 "3163 ELS xri-sgl count unchanged: %d\n",
3454 els_xri_cnt);
3455 phba->sli4_hba.els_xri_cnt = els_xri_cnt;
3456
3457 /* update xris to els sgls on the list */
3458 sglq_entry = NULL;
3459 sglq_entry_next = NULL;
3460 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
895427bd 3461 &phba->sli4_hba.lpfc_els_sgl_list, list) {
8a9d2e80
JS		 3462 lxri = lpfc_sli4_next_xritag(phba);
3463 if (lxri == NO_XRI) {
3464 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3465 "2400 Failed to allocate xri for "
3466 "ELS sgl\n");
3467 rc = -ENOMEM;
3468 goto out_free_mem;
3469 }
3470 sglq_entry->sli4_lxritag = lxri;
3471 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3472 }
895427bd
JS		 3473 return 0;
3474
3475out_free_mem:
3476 lpfc_free_els_sgl_list(phba);
3477 return rc;
3478}
3479
f358dd0c
JS		 3480/**
3481 * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping
3482 * @phba: pointer to lpfc hba data structure.
3483 *
3484 * This routine first calculates the sizes of the current els and allocated
3485 * scsi sgl lists, and then goes through all sgls to updates the physical
3486 * XRIs assigned due to port function reset. During port initialization, the
3487 * current els and allocated scsi sgl lists are 0s.
3488 *
3489 * Return codes
3490 * 0 - successful (for now, it always returns 0)
3491 **/
3492int
3493lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba)
3494{
3495 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
3496 uint16_t i, lxri, xri_cnt, els_xri_cnt;
6c621a22 3497 uint16_t nvmet_xri_cnt;
f358dd0c
JS		 3498 LIST_HEAD(nvmet_sgl_list);
3499 int rc;
3500
3501 /*
3502 * update on pci function's nvmet xri-sgl list
3503 */
3504 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
61f3d4bf 3505
6c621a22
JS		 3506 /* For NVMET, ALL remaining XRIs are dedicated for IO processing */
3507 nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
f358dd0c
JS		 3508 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) {
3509 /* els xri-sgl expanded */
3510 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt;
3511 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3512 "6302 NVMET xri-sgl cnt grew from %d to %d\n",
3513 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt);
3514 /* allocate the additional nvmet sgls */
3515 for (i = 0; i < xri_cnt; i++) {
3516 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3517 GFP_KERNEL);
3518 if (sglq_entry == NULL) {
3519 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3520 "6303 Failure to allocate an "
3521 "NVMET sgl entry:%d\n", i);
3522 rc = -ENOMEM;
3523 goto out_free_mem;
3524 }
3525 sglq_entry->buff_type = NVMET_BUFF_TYPE;
3526 sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0,
3527 &sglq_entry->phys);
3528 if (sglq_entry->virt == NULL) {
3529 kfree(sglq_entry);
3530 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3531 "6304 Failure to allocate an "
3532 "NVMET buf:%d\n", i);
3533 rc = -ENOMEM;
3534 goto out_free_mem;
3535 }
3536 sglq_entry->sgl = sglq_entry->virt;
3537 memset(sglq_entry->sgl, 0,
3538 phba->cfg_sg_dma_buf_size);
3539 sglq_entry->state = SGL_FREED;
3540 list_add_tail(&sglq_entry->list, &nvmet_sgl_list);
3541 }
3542 spin_lock_irq(&phba->hbalock);
3543 spin_lock(&phba->sli4_hba.sgl_list_lock);
3544 list_splice_init(&nvmet_sgl_list,
3545 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3546 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3547 spin_unlock_irq(&phba->hbalock);
3548 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) {
3549 /* nvmet xri-sgl shrunk */
3550 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt;
3551 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3552 "6305 NVMET xri-sgl count decreased from "
3553 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt,
3554 nvmet_xri_cnt);
3555 spin_lock_irq(&phba->hbalock);
3556 spin_lock(&phba->sli4_hba.sgl_list_lock);
3557 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list,
3558 &nvmet_sgl_list);
3559 /* release extra nvmet sgls from list */
3560 for (i = 0; i < xri_cnt; i++) {
3561 list_remove_head(&nvmet_sgl_list,
3562 sglq_entry, struct lpfc_sglq, list);
3563 if (sglq_entry) {
3564 lpfc_nvmet_buf_free(phba, sglq_entry->virt,
3565 sglq_entry->phys);
3566 kfree(sglq_entry);
3567 }
3568 }
3569 list_splice_init(&nvmet_sgl_list,
3570 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3571 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3572 spin_unlock_irq(&phba->hbalock);
3573 } else
3574 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3575 "6306 NVMET xri-sgl count unchanged: %d\n",
3576 nvmet_xri_cnt);
3577 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt;
3578
3579 /* update xris to nvmet sgls on the list */
3580 sglq_entry = NULL;
3581 sglq_entry_next = NULL;
3582 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
3583 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) {
3584 lxri = lpfc_sli4_next_xritag(phba);
3585 if (lxri == NO_XRI) {
3586 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3587 "6307 Failed to allocate xri for "
3588 "NVMET sgl\n");
3589 rc = -ENOMEM;
3590 goto out_free_mem;
3591 }
3592 sglq_entry->sli4_lxritag = lxri;
3593 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3594 }
3595 return 0;
3596
3597out_free_mem:
3598 lpfc_free_nvmet_sgl_list(phba);
3599 return rc;
3600}
3601
895427bd
JS		 3602/**
3603 * lpfc_sli4_scsi_sgl_update - update xri-sgl sizing and mapping
3604 * @phba: pointer to lpfc hba data structure.
3605 *
3606 * This routine first calculates the sizes of the current els and allocated
3607 * scsi sgl lists, and then goes through all sgls to updates the physical
3608 * XRIs assigned due to port function reset. During port initialization, the
3609 * current els and allocated scsi sgl lists are 0s.
3610 *
3611 * Return codes
3612 * 0 - successful (for now, it always returns 0)
3613 **/
3614int
3615lpfc_sli4_scsi_sgl_update(struct lpfc_hba *phba)
3616{
3617 struct lpfc_scsi_buf *psb, *psb_next;
3618 uint16_t i, lxri, els_xri_cnt, scsi_xri_cnt;
3619 LIST_HEAD(scsi_sgl_list);
3620 int rc;
8a9d2e80
JS		 3621
3622 /*
895427bd 3623 * update on pci function's els xri-sgl list
8a9d2e80 3624 */
895427bd 3625 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
8a9d2e80
JS		 3626 phba->total_scsi_bufs = 0;
3627
895427bd
JS		 3628 /*
3629 * update on pci function's allocated scsi xri-sgl list
3630 */
8a9d2e80
JS		 3631 /* maximum number of xris available for scsi buffers */
3632 phba->sli4_hba.scsi_xri_max = phba->sli4_hba.max_cfg_param.max_xri -
3633 els_xri_cnt;
3634
895427bd
JS		 3635 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3636 return 0;
3637
3638 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3639 phba->sli4_hba.scsi_xri_max = /* Split them up */
3640 (phba->sli4_hba.scsi_xri_max *
3641 phba->cfg_xri_split) / 100;
8a9d2e80 3642
a40fc5f0 3643 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3644 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS		 3645 list_splice_init(&phba->lpfc_scsi_buf_list_get, &scsi_sgl_list);
3646 list_splice(&phba->lpfc_scsi_buf_list_put, &scsi_sgl_list);
164cecd1 3647 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3648 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80 3649
e8c0a779
JS		 3650 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3651 "6060 Current allocated SCSI xri-sgl count:%d, "
3652 "maximum SCSI xri count:%d (split:%d)\n",
3653 phba->sli4_hba.scsi_xri_cnt,
3654 phba->sli4_hba.scsi_xri_max, phba->cfg_xri_split);
3655
8a9d2e80
JS		 3656 if (phba->sli4_hba.scsi_xri_cnt > phba->sli4_hba.scsi_xri_max) {
3657 /* max scsi xri shrinked below the allocated scsi buffers */
3658 scsi_xri_cnt = phba->sli4_hba.scsi_xri_cnt -
3659 phba->sli4_hba.scsi_xri_max;
3660 /* release the extra allocated scsi buffers */
3661 for (i = 0; i < scsi_xri_cnt; i++) {
3662 list_remove_head(&scsi_sgl_list, psb,
3663 struct lpfc_scsi_buf, list);
a2fc4aef 3664 if (psb) {
771db5c0 3665 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
a2fc4aef
JS		 3666 psb->data, psb->dma_handle);
3667 kfree(psb);
3668 }
8a9d2e80 3669 }
a40fc5f0 3670 spin_lock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80 3671 phba->sli4_hba.scsi_xri_cnt -= scsi_xri_cnt;
a40fc5f0 3672 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
8a9d2e80
JS		 3673 }
3674
3675 /* update xris associated to remaining allocated scsi buffers */
3676 psb = NULL;
3677 psb_next = NULL;
3678 list_for_each_entry_safe(psb, psb_next, &scsi_sgl_list, list) {
3679 lxri = lpfc_sli4_next_xritag(phba);
3680 if (lxri == NO_XRI) {
3681 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3682 "2560 Failed to allocate xri for "
3683 "scsi buffer\n");
3684 rc = -ENOMEM;
3685 goto out_free_mem;
3686 }
3687 psb->cur_iocbq.sli4_lxritag = lxri;
3688 psb->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3689 }
a40fc5f0 3690 spin_lock_irq(&phba->scsi_buf_list_get_lock);
164cecd1 3691 spin_lock(&phba->scsi_buf_list_put_lock);
a40fc5f0
JS		 3692 list_splice_init(&scsi_sgl_list, &phba->lpfc_scsi_buf_list_get);
3693 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
164cecd1 3694 spin_unlock(&phba->scsi_buf_list_put_lock);
a40fc5f0 3695 spin_unlock_irq(&phba->scsi_buf_list_get_lock);
dea3101e 3696 return 0;
8a9d2e80
JS		 3697
3698out_free_mem:
8a9d2e80
JS		 3699 lpfc_scsi_free(phba);
3700 return rc;
dea3101e 3701}
3702
96418b5e
JS		 3703static uint64_t
3704lpfc_get_wwpn(struct lpfc_hba *phba)
3705{
3706 uint64_t wwn;
3707 int rc;
3708 LPFC_MBOXQ_t *mboxq;
3709 MAILBOX_t *mb;
3710
96418b5e
JS		 3711 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
3712 GFP_KERNEL);
3713 if (!mboxq)
3714 return (uint64_t)-1;
3715
3716 /* First get WWN of HBA instance */
3717 lpfc_read_nv(phba, mboxq);
3718 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
3719 if (rc != MBX_SUCCESS) {
3720 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3721 "6019 Mailbox failed , mbxCmd x%x "
3722 "READ_NV, mbxStatus x%x\n",
3723 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
3724 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
3725 mempool_free(mboxq, phba->mbox_mem_pool);
3726 return (uint64_t) -1;
3727 }
3728 mb = &mboxq->u.mb;
3729 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t));
3730 /* wwn is WWPN of HBA instance */
3731 mempool_free(mboxq, phba->mbox_mem_pool);
3732 if (phba->sli_rev == LPFC_SLI_REV4)
3733 return be64_to_cpu(wwn);
3734 else
286871a6 3735 return rol64(wwn, 32);
96418b5e
JS		 3736}
3737
895427bd
JS		 3738/**
3739 * lpfc_sli4_nvme_sgl_update - update xri-sgl sizing and mapping
3740 * @phba: pointer to lpfc hba data structure.
3741 *
3742 * This routine first calculates the sizes of the current els and allocated
3743 * scsi sgl lists, and then goes through all sgls to updates the physical
3744 * XRIs assigned due to port function reset. During port initialization, the
3745 * current els and allocated scsi sgl lists are 0s.
3746 *
3747 * Return codes
3748 * 0 - successful (for now, it always returns 0)
3749 **/
3750int
3751lpfc_sli4_nvme_sgl_update(struct lpfc_hba *phba)
3752{
3753 struct lpfc_nvme_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL;
3754 uint16_t i, lxri, els_xri_cnt;
3755 uint16_t nvme_xri_cnt, nvme_xri_max;
3756 LIST_HEAD(nvme_sgl_list);
3757 int rc;
3758
3759 phba->total_nvme_bufs = 0;
3760
3761 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME))
3762 return 0;
3763 /*
3764 * update on pci function's allocated nvme xri-sgl list
3765 */
3766
3767 /* maximum number of xris available for nvme buffers */
3768 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
3769 nvme_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
3770 phba->sli4_hba.nvme_xri_max = nvme_xri_max;
3771 phba->sli4_hba.nvme_xri_max -= phba->sli4_hba.scsi_xri_max;
3772
3773 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3774 "6074 Current allocated NVME xri-sgl count:%d, "
3775 "maximum NVME xri count:%d\n",
3776 phba->sli4_hba.nvme_xri_cnt,
3777 phba->sli4_hba.nvme_xri_max);
3778
3779 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3780 spin_lock(&phba->nvme_buf_list_put_lock);
3781 list_splice_init(&phba->lpfc_nvme_buf_list_get, &nvme_sgl_list);
3782 list_splice(&phba->lpfc_nvme_buf_list_put, &nvme_sgl_list);
3783 spin_unlock(&phba->nvme_buf_list_put_lock);
3784 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3785
3786 if (phba->sli4_hba.nvme_xri_cnt > phba->sli4_hba.nvme_xri_max) {
3787 /* max nvme xri shrunk below the allocated nvme buffers */
3788 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3789 nvme_xri_cnt = phba->sli4_hba.nvme_xri_cnt -
3790 phba->sli4_hba.nvme_xri_max;
3791 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3792 /* release the extra allocated nvme buffers */
3793 for (i = 0; i < nvme_xri_cnt; i++) {
3794 list_remove_head(&nvme_sgl_list, lpfc_ncmd,
3795 struct lpfc_nvme_buf, list);
3796 if (lpfc_ncmd) {
771db5c0 3797 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
895427bd
JS		 3798 lpfc_ncmd->data,
3799 lpfc_ncmd->dma_handle);
3800 kfree(lpfc_ncmd);
3801 }
3802 }
3803 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3804 phba->sli4_hba.nvme_xri_cnt -= nvme_xri_cnt;
3805 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3806 }
3807
3808 /* update xris associated to remaining allocated nvme buffers */
3809 lpfc_ncmd = NULL;
3810 lpfc_ncmd_next = NULL;
3811 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3812 &nvme_sgl_list, list) {
3813 lxri = lpfc_sli4_next_xritag(phba);
3814 if (lxri == NO_XRI) {
3815 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3816 "6075 Failed to allocate xri for "
3817 "nvme buffer\n");
3818 rc = -ENOMEM;
3819 goto out_free_mem;
3820 }
3821 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri;
3822 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3823 }
3824 spin_lock_irq(&phba->nvme_buf_list_get_lock);
3825 spin_lock(&phba->nvme_buf_list_put_lock);
3826 list_splice_init(&nvme_sgl_list, &phba->lpfc_nvme_buf_list_get);
3827 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
3828 spin_unlock(&phba->nvme_buf_list_put_lock);
3829 spin_unlock_irq(&phba->nvme_buf_list_get_lock);
3830 return 0;
3831
3832out_free_mem:
3833 lpfc_nvme_free(phba);
3834 return rc;
3835}
3836
e59058c4 3837/**
3621a710 3838 * lpfc_create_port - Create an FC port
e59058c4
JS		 3839 * @phba: pointer to lpfc hba data structure.
3840 * @instance: a unique integer ID to this FC port.
3841 * @dev: pointer to the device data structure.
3842 *
3843 * This routine creates a FC port for the upper layer protocol. The FC port
3844 * can be created on top of either a physical port or a virtual port provided
3845 * by the HBA. This routine also allocates a SCSI host data structure (shost)
3846 * and associates the FC port created before adding the shost into the SCSI
3847 * layer.
3848 *
3849 * Return codes
3850 * @vport - pointer to the virtual N_Port data structure.
3851 * NULL - port create failed.
3852 **/
2e0fef85 3853struct lpfc_vport *
3de2a653 3854lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
47a8617c 3855{
2e0fef85 3856 struct lpfc_vport *vport;
895427bd 3857 struct Scsi_Host *shost = NULL;
2e0fef85 3858 int error = 0;
96418b5e
JS		 3859 int i;
3860 uint64_t wwn;
3861 bool use_no_reset_hba = false;
56bc8028 3862 int rc;
96418b5e 3863
56bc8028
JS		 3864 if (lpfc_no_hba_reset_cnt) {
3865 if (phba->sli_rev < LPFC_SLI_REV4 &&
3866 dev == &phba->pcidev->dev) {
3867 /* Reset the port first */
3868 lpfc_sli_brdrestart(phba);
3869 rc = lpfc_sli_chipset_init(phba);
3870 if (rc)
3871 return NULL;
3872 }
3873 wwn = lpfc_get_wwpn(phba);
3874 }
96418b5e
JS		 3875
3876 for (i = 0; i < lpfc_no_hba_reset_cnt; i++) {
3877 if (wwn == lpfc_no_hba_reset[i]) {
3878 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3879 "6020 Setting use_no_reset port=%llx\n",
3880 wwn);
3881 use_no_reset_hba = true;
3882 break;
3883 }
3884 }
47a8617c 3885
895427bd
JS		 3886 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
3887 if (dev != &phba->pcidev->dev) {
3888 shost = scsi_host_alloc(&lpfc_vport_template,
3889 sizeof(struct lpfc_vport));
3890 } else {
96418b5e 3891 if (!use_no_reset_hba)
895427bd
JS		 3892 shost = scsi_host_alloc(&lpfc_template,
3893 sizeof(struct lpfc_vport));
3894 else
96418b5e 3895 shost = scsi_host_alloc(&lpfc_template_no_hr,
895427bd
JS		 3896 sizeof(struct lpfc_vport));
3897 }
3898 } else if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
3899 shost = scsi_host_alloc(&lpfc_template_nvme,
ea4142f6
JS		 3900 sizeof(struct lpfc_vport));
3901 }
2e0fef85
JS		 3902 if (!shost)
3903 goto out;
47a8617c 3904
2e0fef85
JS		 3905 vport = (struct lpfc_vport *) shost->hostdata;
3906 vport->phba = phba;
2e0fef85 3907 vport->load_flag |= FC_LOADING;
92d7f7b0 3908 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
7f5f3d0d 3909 vport->fc_rscn_flush = 0;
3de2a653 3910 lpfc_get_vport_cfgparam(vport);
895427bd 3911
2e0fef85
JS		 3912 shost->unique_id = instance;
3913 shost->max_id = LPFC_MAX_TARGET;
3de2a653 3914 shost->max_lun = vport->cfg_max_luns;
2e0fef85
JS		 3915 shost->this_id = -1;
3916 shost->max_cmd_len = 16;
8b0dff14 3917 shost->nr_hw_queues = phba->cfg_fcp_io_channel;
da0436e9 3918 if (phba->sli_rev == LPFC_SLI_REV4) {
28baac74 3919 shost->dma_boundary =
cb5172ea 3920 phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
da0436e9
JS		 3921 shost->sg_tablesize = phba->cfg_sg_seg_cnt;
3922 }
81301a9b 3923
47a8617c 3924 /*
2e0fef85
JS		 3925 * Set initial can_queue value since 0 is no longer supported and
3926 * scsi_add_host will fail. This will be adjusted later based on the
3927 * max xri value determined in hba setup.
47a8617c 3928 */
2e0fef85 3929 shost->can_queue = phba->cfg_hba_queue_depth - 10;
3de2a653 3930 if (dev != &phba->pcidev->dev) {
92d7f7b0
JS		 3931 shost->transportt = lpfc_vport_transport_template;
3932 vport->port_type = LPFC_NPIV_PORT;
3933 } else {
3934 shost->transportt = lpfc_transport_template;
3935 vport->port_type = LPFC_PHYSICAL_PORT;
3936 }
47a8617c 3937
2e0fef85
JS		 3938 /* Initialize all internally managed lists. */
3939 INIT_LIST_HEAD(&vport->fc_nodes);
da0436e9 3940 INIT_LIST_HEAD(&vport->rcv_buffer_list);
2e0fef85 3941 spin_lock_init(&vport->work_port_lock);
47a8617c 3942
f22eb4d3 3943 timer_setup(&vport->fc_disctmo, lpfc_disc_timeout, 0);
47a8617c 3944
f22eb4d3 3945 timer_setup(&vport->els_tmofunc, lpfc_els_timeout, 0);
92494144 3946
f22eb4d3 3947 timer_setup(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo, 0);
92494144 3948
d139b9bd 3949 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev);
2e0fef85
JS		 3950 if (error)
3951 goto out_put_shost;
47a8617c 3952
549e55cd 3953 spin_lock_irq(&phba->hbalock);
2e0fef85 3954 list_add_tail(&vport->listentry, &phba->port_list);
549e55cd 3955 spin_unlock_irq(&phba->hbalock);
2e0fef85 3956 return vport;
47a8617c 3957
2e0fef85
JS		 3958out_put_shost:
3959 scsi_host_put(shost);
3960out:
3961 return NULL;
47a8617c
JS		 3962}
3963
e59058c4 3964/**
3621a710 3965 * destroy_port - destroy an FC port
e59058c4
JS		 3966 * @vport: pointer to an lpfc virtual N_Port data structure.
3967 *
3968 * This routine destroys a FC port from the upper layer protocol. All the
3969 * resources associated with the port are released.
3970 **/
2e0fef85
JS		 3971void
3972destroy_port(struct lpfc_vport *vport)
47a8617c 3973{
92d7f7b0
JS		 3974 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
3975 struct lpfc_hba *phba = vport->phba;
47a8617c 3976
858c9f6c 3977 lpfc_debugfs_terminate(vport);
92d7f7b0
JS		 3978 fc_remove_host(shost);
3979 scsi_remove_host(shost);
47a8617c 3980
92d7f7b0
JS		 3981 spin_lock_irq(&phba->hbalock);
3982 list_del_init(&vport->listentry);
3983 spin_unlock_irq(&phba->hbalock);
47a8617c 3984
92d7f7b0 3985 lpfc_cleanup(vport);
47a8617c 3986 return;
47a8617c
JS		 3987}
3988
e59058c4 3989/**
3621a710 3990 * lpfc_get_instance - Get a unique integer ID
e59058c4
JS		 3991 *
3992 * This routine allocates a unique integer ID from lpfc_hba_index pool. It
3993 * uses the kernel idr facility to perform the task.
3994 *
3995 * Return codes:
3996 * instance - a unique integer ID allocated as the new instance.
3997 * -1 - lpfc get instance failed.
3998 **/
92d7f7b0
JS		 3999int
4000lpfc_get_instance(void)
4001{
ab516036
TH		 4002 int ret;
4003
4004 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL);
4005 return ret < 0 ? -1 : ret;
47a8617c
JS		 4006}
4007
e59058c4 4008/**
3621a710 4009 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done
e59058c4
JS		 4010 * @shost: pointer to SCSI host data structure.
4011 * @time: elapsed time of the scan in jiffies.
4012 *
4013 * This routine is called by the SCSI layer with a SCSI host to determine
4014 * whether the scan host is finished.
4015 *
4016 * Note: there is no scan_start function as adapter initialization will have
4017 * asynchronously kicked off the link initialization.
4018 *
4019 * Return codes
4020 * 0 - SCSI host scan is not over yet.
4021 * 1 - SCSI host scan is over.
4022 **/
47a8617c
JS		 4023int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time)
4024{
2e0fef85
JS		 4025 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4026 struct lpfc_hba *phba = vport->phba;
858c9f6c 4027 int stat = 0;
47a8617c 4028
858c9f6c
JS		 4029 spin_lock_irq(shost->host_lock);
4030
51ef4c26 4031 if (vport->load_flag & FC_UNLOADING) {
858c9f6c
JS		 4032 stat = 1;
4033 goto finished;
4034 }
256ec0d0 4035 if (time >= msecs_to_jiffies(30 * 1000)) {
2e0fef85 4036 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS		 4037 "0461 Scanning longer than 30 "
4038 "seconds. Continuing initialization\n");
858c9f6c 4039 stat = 1;
47a8617c 4040 goto finished;
2e0fef85 4041 }
256ec0d0
JS		 4042 if (time >= msecs_to_jiffies(15 * 1000) &&
4043 phba->link_state <= LPFC_LINK_DOWN) {
2e0fef85 4044 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
e8b62011
JS		 4045 "0465 Link down longer than 15 "
4046 "seconds. Continuing initialization\n");
858c9f6c 4047 stat = 1;
47a8617c 4048 goto finished;
2e0fef85 4049 }
47a8617c 4050
2e0fef85 4051 if (vport->port_state != LPFC_VPORT_READY)
858c9f6c 4052 goto finished;
2e0fef85 4053 if (vport->num_disc_nodes || vport->fc_prli_sent)
858c9f6c 4054 goto finished;
256ec0d0 4055 if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000))
858c9f6c 4056 goto finished;
2e0fef85 4057 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0)
858c9f6c
JS		 4058 goto finished;
4059
4060 stat = 1;
47a8617c
JS		 4061
4062finished:
858c9f6c
JS		 4063 spin_unlock_irq(shost->host_lock);
4064 return stat;
92d7f7b0 4065}
47a8617c 4066
e59058c4 4067/**
3621a710 4068 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port
e59058c4
JS		 4069 * @shost: pointer to SCSI host data structure.
4070 *
4071 * This routine initializes a given SCSI host attributes on a FC port. The
4072 * SCSI host can be either on top of a physical port or a virtual port.
4073 **/
92d7f7b0
JS		 4074void lpfc_host_attrib_init(struct Scsi_Host *shost)
4075{
4076 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4077 struct lpfc_hba *phba = vport->phba;
47a8617c 4078 /*
2e0fef85 4079 * Set fixed host attributes. Must done after lpfc_sli_hba_setup().
47a8617c
JS		 4080 */
4081
2e0fef85
JS		 4082 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
4083 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
47a8617c
JS		 4084 fc_host_supported_classes(shost) = FC_COS_CLASS3;
4085
4086 memset(fc_host_supported_fc4s(shost), 0,
2e0fef85 4087 sizeof(fc_host_supported_fc4s(shost)));
47a8617c
JS		 4088 fc_host_supported_fc4s(shost)[2] = 1;
4089 fc_host_supported_fc4s(shost)[7] = 1;
4090
92d7f7b0
JS		 4091 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost),
4092 sizeof fc_host_symbolic_name(shost));
47a8617c
JS		 4093
4094 fc_host_supported_speeds(shost) = 0;
d38dd52c
JS		 4095 if (phba->lmt & LMT_32Gb)
4096 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT;
88a2cfbb
JS		 4097 if (phba->lmt & LMT_16Gb)
4098 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT;
47a8617c
JS		 4099 if (phba->lmt & LMT_10Gb)
4100 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT;
a8adb832
JS		 4101 if (phba->lmt & LMT_8Gb)
4102 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT;
47a8617c
JS		 4103 if (phba->lmt & LMT_4Gb)
4104 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT;
4105 if (phba->lmt & LMT_2Gb)
4106 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT;
4107 if (phba->lmt & LMT_1Gb)
4108 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT;
4109
4110 fc_host_maxframe_size(shost) =
2e0fef85
JS		 4111 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
4112 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb;
47a8617c 4113
0af5d708
MC		 4114 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo;
4115
47a8617c
JS		 4116 /* This value is also unchanging */
4117 memset(fc_host_active_fc4s(shost), 0,
2e0fef85 4118 sizeof(fc_host_active_fc4s(shost)));
47a8617c
JS		 4119 fc_host_active_fc4s(shost)[2] = 1;
4120 fc_host_active_fc4s(shost)[7] = 1;
4121
92d7f7b0 4122 fc_host_max_npiv_vports(shost) = phba->max_vpi;
47a8617c 4123 spin_lock_irq(shost->host_lock);
51ef4c26 4124 vport->load_flag &= ~FC_LOADING;
47a8617c 4125 spin_unlock_irq(shost->host_lock);
47a8617c 4126}
dea3101e 4127
e59058c4 4128/**
da0436e9 4129 * lpfc_stop_port_s3 - Stop SLI3 device port
e59058c4
JS		 4130 * @phba: pointer to lpfc hba data structure.
4131 *
da0436e9
JS		 4132 * This routine is invoked to stop an SLI3 device port, it stops the device
4133 * from generating interrupts and stops the device driver's timers for the
4134 * device.
e59058c4 4135 **/
da0436e9
JS		 4136static void
4137lpfc_stop_port_s3(struct lpfc_hba *phba)
db2378e0 4138{
da0436e9
JS		 4139 /* Clear all interrupt enable conditions */
4140 writel(0, phba->HCregaddr);
4141 readl(phba->HCregaddr); /* flush */
4142 /* Clear all pending interrupts */
4143 writel(0xffffffff, phba->HAregaddr);
4144 readl(phba->HAregaddr); /* flush */
db2378e0 4145
da0436e9
JS		 4146 /* Reset some HBA SLI setup states */
4147 lpfc_stop_hba_timers(phba);
4148 phba->pport->work_port_events = 0;
4149}
db2378e0 4150
da0436e9
JS		 4151/**
4152 * lpfc_stop_port_s4 - Stop SLI4 device port
4153 * @phba: pointer to lpfc hba data structure.
4154 *
4155 * This routine is invoked to stop an SLI4 device port, it stops the device
4156 * from generating interrupts and stops the device driver's timers for the
4157 * device.
4158 **/
4159static void
4160lpfc_stop_port_s4(struct lpfc_hba *phba)
4161{
4162 /* Reset some HBA SLI4 setup states */
4163 lpfc_stop_hba_timers(phba);
4164 phba->pport->work_port_events = 0;
4165 phba->sli4_hba.intr_enable = 0;
da0436e9 4166}
9399627f 4167
da0436e9
JS		 4168/**
4169 * lpfc_stop_port - Wrapper function for stopping hba port
4170 * @phba: Pointer to HBA context object.
4171 *
4172 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from
4173 * the API jump table function pointer from the lpfc_hba struct.
4174 **/
4175void
4176lpfc_stop_port(struct lpfc_hba *phba)
4177{
4178 phba->lpfc_stop_port(phba);
f485c18d
DK		 4179
4180 if (phba->wq)
4181 flush_workqueue(phba->wq);
da0436e9 4182}
db2378e0 4183
ecfd03c6
JS		 4184/**
4185 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer
4186 * @phba: Pointer to hba for which this call is being executed.
4187 *
4188 * This routine starts the timer waiting for the FCF rediscovery to complete.
4189 **/
4190void
4191lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba)
4192{
4193 unsigned long fcf_redisc_wait_tmo =
4194 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO));
4195 /* Start fcf rediscovery wait period timer */
4196 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo);
4197 spin_lock_irq(&phba->hbalock);
4198 /* Allow action to new fcf asynchronous event */
4199 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
4200 /* Mark the FCF rediscovery pending state */
4201 phba->fcf.fcf_flag |= FCF_REDISC_PEND;
4202 spin_unlock_irq(&phba->hbalock);
4203}
4204
4205/**
4206 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout
4207 * @ptr: Map to lpfc_hba data structure pointer.
4208 *
4209 * This routine is invoked when waiting for FCF table rediscover has been
4210 * timed out. If new FCF record(s) has (have) been discovered during the
4211 * wait period, a new FCF event shall be added to the FCOE async event
4212 * list, and then worker thread shall be waked up for processing from the
4213 * worker thread context.
4214 **/
e399b228 4215static void
f22eb4d3 4216lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list *t)
ecfd03c6 4217{
f22eb4d3 4218 struct lpfc_hba *phba = from_timer(phba, t, fcf.redisc_wait);
ecfd03c6
JS		 4219
4220 /* Don't send FCF rediscovery event if timer cancelled */
4221 spin_lock_irq(&phba->hbalock);
4222 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
4223 spin_unlock_irq(&phba->hbalock);
4224 return;
4225 }
4226 /* Clear FCF rediscovery timer pending flag */
4227 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
4228 /* FCF rediscovery event to worker thread */
4229 phba->fcf.fcf_flag |= FCF_REDISC_EVT;
4230 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 4231 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
a93ff37a 4232 "2776 FCF rediscover quiescent timer expired\n");
ecfd03c6
JS		 4233 /* wake up worker thread */
4234 lpfc_worker_wake_up(phba);
4235}
4236
e59058c4 4237/**
da0436e9 4238 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code
e59058c4 4239 * @phba: pointer to lpfc hba data structure.
da0436e9 4240 * @acqe_link: pointer to the async link completion queue entry.
e59058c4 4241 *
da0436e9
JS		 4242 * This routine is to parse the SLI4 link-attention link fault code and
4243 * translate it into the base driver's read link attention mailbox command
4244 * status.
4245 *
4246 * Return: Link-attention status in terms of base driver's coding.
e59058c4 4247 **/
da0436e9
JS		 4248static uint16_t
4249lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba,
4250 struct lpfc_acqe_link *acqe_link)
db2378e0 4251{
da0436e9 4252 uint16_t latt_fault;
9399627f 4253
da0436e9
JS		 4254 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) {
4255 case LPFC_ASYNC_LINK_FAULT_NONE:
4256 case LPFC_ASYNC_LINK_FAULT_LOCAL:
4257 case LPFC_ASYNC_LINK_FAULT_REMOTE:
4258 latt_fault = 0;
4259 break;
4260 default:
4261 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4262 "0398 Invalid link fault code: x%x\n",
4263 bf_get(lpfc_acqe_link_fault, acqe_link));
4264 latt_fault = MBXERR_ERROR;
4265 break;
4266 }
4267 return latt_fault;
db2378e0
JS		 4268}
4269
5b75da2f 4270/**
da0436e9 4271 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type
5b75da2f 4272 * @phba: pointer to lpfc hba data structure.
da0436e9 4273 * @acqe_link: pointer to the async link completion queue entry.
5b75da2f 4274 *
da0436e9
JS		 4275 * This routine is to parse the SLI4 link attention type and translate it
4276 * into the base driver's link attention type coding.
5b75da2f 4277 *
da0436e9
JS		 4278 * Return: Link attention type in terms of base driver's coding.
4279 **/
4280static uint8_t
4281lpfc_sli4_parse_latt_type(struct lpfc_hba *phba,
4282 struct lpfc_acqe_link *acqe_link)
5b75da2f 4283{
da0436e9 4284 uint8_t att_type;
5b75da2f 4285
da0436e9
JS		 4286 switch (bf_get(lpfc_acqe_link_status, acqe_link)) {
4287 case LPFC_ASYNC_LINK_STATUS_DOWN:
4288 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN:
76a95d75 4289 att_type = LPFC_ATT_LINK_DOWN;
da0436e9
JS		 4290 break;
4291 case LPFC_ASYNC_LINK_STATUS_UP:
4292 /* Ignore physical link up events - wait for logical link up */
76a95d75 4293 att_type = LPFC_ATT_RESERVED;
da0436e9
JS		 4294 break;
4295 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP:
76a95d75 4296 att_type = LPFC_ATT_LINK_UP;
da0436e9
JS		 4297 break;
4298 default:
4299 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4300 "0399 Invalid link attention type: x%x\n",
4301 bf_get(lpfc_acqe_link_status, acqe_link));
76a95d75 4302 att_type = LPFC_ATT_RESERVED;
da0436e9 4303 break;
5b75da2f 4304 }
da0436e9 4305 return att_type;
5b75da2f
JS		 4306}
4307
8b68cd52
JS		 4308/**
4309 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed
4310 * @phba: pointer to lpfc hba data structure.
4311 *
4312 * This routine is to get an SLI3 FC port's link speed in Mbps.
4313 *
4314 * Return: link speed in terms of Mbps.
4315 **/
4316uint32_t
4317lpfc_sli_port_speed_get(struct lpfc_hba *phba)
4318{
4319 uint32_t link_speed;
4320
4321 if (!lpfc_is_link_up(phba))
4322 return 0;
4323
a085e87c
JS		 4324 if (phba->sli_rev <= LPFC_SLI_REV3) {
4325 switch (phba->fc_linkspeed) {
4326 case LPFC_LINK_SPEED_1GHZ:
4327 link_speed = 1000;
4328 break;
4329 case LPFC_LINK_SPEED_2GHZ:
4330 link_speed = 2000;
4331 break;
4332 case LPFC_LINK_SPEED_4GHZ:
4333 link_speed = 4000;
4334 break;
4335 case LPFC_LINK_SPEED_8GHZ:
4336 link_speed = 8000;
4337 break;
4338 case LPFC_LINK_SPEED_10GHZ:
4339 link_speed = 10000;
4340 break;
4341 case LPFC_LINK_SPEED_16GHZ:
4342 link_speed = 16000;
4343 break;
4344 default:
4345 link_speed = 0;
4346 }
4347 } else {
4348 if (phba->sli4_hba.link_state.logical_speed)
4349 link_speed =
4350 phba->sli4_hba.link_state.logical_speed;
4351 else
4352 link_speed = phba->sli4_hba.link_state.speed;
8b68cd52
JS		 4353 }
4354 return link_speed;
4355}
4356
4357/**
4358 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed
4359 * @phba: pointer to lpfc hba data structure.
4360 * @evt_code: asynchronous event code.
4361 * @speed_code: asynchronous event link speed code.
4362 *
4363 * This routine is to parse the giving SLI4 async event link speed code into
4364 * value of Mbps for the link speed.
4365 *
4366 * Return: link speed in terms of Mbps.
4367 **/
4368static uint32_t
4369lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code,
4370 uint8_t speed_code)
4371{
4372 uint32_t port_speed;
4373
4374 switch (evt_code) {
4375 case LPFC_TRAILER_CODE_LINK:
4376 switch (speed_code) {
26d830ec 4377 case LPFC_ASYNC_LINK_SPEED_ZERO:
8b68cd52
JS		 4378 port_speed = 0;
4379 break;
26d830ec 4380 case LPFC_ASYNC_LINK_SPEED_10MBPS:
8b68cd52
JS		 4381 port_speed = 10;
4382 break;
26d830ec 4383 case LPFC_ASYNC_LINK_SPEED_100MBPS:
8b68cd52
JS		 4384 port_speed = 100;
4385 break;
26d830ec 4386 case LPFC_ASYNC_LINK_SPEED_1GBPS:
8b68cd52
JS		 4387 port_speed = 1000;
4388 break;
26d830ec 4389 case LPFC_ASYNC_LINK_SPEED_10GBPS:
8b68cd52
JS		 4390 port_speed = 10000;
4391 break;
26d830ec
JS		 4392 case LPFC_ASYNC_LINK_SPEED_20GBPS:
4393 port_speed = 20000;
4394 break;
4395 case LPFC_ASYNC_LINK_SPEED_25GBPS:
4396 port_speed = 25000;
4397 break;
4398 case LPFC_ASYNC_LINK_SPEED_40GBPS:
4399 port_speed = 40000;
4400 break;
8b68cd52
JS		 4401 default:
4402 port_speed = 0;
4403 }
4404 break;
4405 case LPFC_TRAILER_CODE_FC:
4406 switch (speed_code) {
26d830ec 4407 case LPFC_FC_LA_SPEED_UNKNOWN:
8b68cd52
JS		 4408 port_speed = 0;
4409 break;
26d830ec 4410 case LPFC_FC_LA_SPEED_1G:
8b68cd52
JS		 4411 port_speed = 1000;
4412 break;
26d830ec 4413 case LPFC_FC_LA_SPEED_2G:
8b68cd52
JS		 4414 port_speed = 2000;
4415 break;
26d830ec 4416 case LPFC_FC_LA_SPEED_4G:
8b68cd52
JS		 4417 port_speed = 4000;
4418 break;
26d830ec 4419 case LPFC_FC_LA_SPEED_8G:
8b68cd52
JS		 4420 port_speed = 8000;
4421 break;
26d830ec 4422 case LPFC_FC_LA_SPEED_10G:
8b68cd52
JS		 4423 port_speed = 10000;
4424 break;
26d830ec 4425 case LPFC_FC_LA_SPEED_16G:
8b68cd52
JS		 4426 port_speed = 16000;
4427 break;
d38dd52c
JS		 4428 case LPFC_FC_LA_SPEED_32G:
4429 port_speed = 32000;
4430 break;
8b68cd52
JS		 4431 default:
4432 port_speed = 0;
4433 }
4434 break;
4435 default:
4436 port_speed = 0;
4437 }
4438 return port_speed;
4439}
4440
da0436e9 4441/**
70f3c073 4442 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event
da0436e9
JS		 4443 * @phba: pointer to lpfc hba data structure.
4444 * @acqe_link: pointer to the async link completion queue entry.
4445 *
70f3c073 4446 * This routine is to handle the SLI4 asynchronous FCoE link event.
da0436e9
JS		 4447 **/
4448static void
4449lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
4450 struct lpfc_acqe_link *acqe_link)
4451{
4452 struct lpfc_dmabuf *mp;
4453 LPFC_MBOXQ_t *pmb;
4454 MAILBOX_t *mb;
76a95d75 4455 struct lpfc_mbx_read_top *la;
da0436e9 4456 uint8_t att_type;
76a95d75 4457 int rc;
da0436e9
JS		 4458
4459 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link);
76a95d75 4460 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP)
da0436e9 4461 return;
32b9793f 4462 phba->fcoe_eventtag = acqe_link->event_tag;
da0436e9
JS		 4463 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4464 if (!pmb) {
4465 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4466 "0395 The mboxq allocation failed\n");
4467 return;
4468 }
4469 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4470 if (!mp) {
4471 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4472 "0396 The lpfc_dmabuf allocation failed\n");
4473 goto out_free_pmb;
4474 }
4475 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4476 if (!mp->virt) {
4477 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4478 "0397 The mbuf allocation failed\n");
4479 goto out_free_dmabuf;
4480 }
4481
4482 /* Cleanup any outstanding ELS commands */
4483 lpfc_els_flush_all_cmd(phba);
4484
4485 /* Block ELS IOCBs until we have done process link event */
895427bd 4486 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
da0436e9
JS		 4487
4488 /* Update link event statistics */
4489 phba->sli.slistat.link_event++;
4490
76a95d75
JS		 4491 /* Create lpfc_handle_latt mailbox command from link ACQE */
4492 lpfc_read_topology(phba, pmb, mp);
4493 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
da0436e9
JS		 4494 pmb->vport = phba->pport;
4495
da0436e9
JS		 4496 /* Keep the link status for extra SLI4 state machine reference */
4497 phba->sli4_hba.link_state.speed =
8b68cd52
JS		 4498 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK,
4499 bf_get(lpfc_acqe_link_speed, acqe_link));
da0436e9
JS		 4500 phba->sli4_hba.link_state.duplex =
4501 bf_get(lpfc_acqe_link_duplex, acqe_link);
4502 phba->sli4_hba.link_state.status =
4503 bf_get(lpfc_acqe_link_status, acqe_link);
70f3c073
JS		 4504 phba->sli4_hba.link_state.type =
4505 bf_get(lpfc_acqe_link_type, acqe_link);
4506 phba->sli4_hba.link_state.number =
4507 bf_get(lpfc_acqe_link_number, acqe_link);
da0436e9
JS		 4508 phba->sli4_hba.link_state.fault =
4509 bf_get(lpfc_acqe_link_fault, acqe_link);
65467b6b 4510 phba->sli4_hba.link_state.logical_speed =
8b68cd52
JS		 4511 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10;
4512
70f3c073 4513 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
c31098ce
JS		 4514 "2900 Async FC/FCoE Link event - Speed:%dGBit "
4515 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d "
4516 "Logical speed:%dMbps Fault:%d\n",
70f3c073
JS		 4517 phba->sli4_hba.link_state.speed,
4518 phba->sli4_hba.link_state.topology,
4519 phba->sli4_hba.link_state.status,
4520 phba->sli4_hba.link_state.type,
4521 phba->sli4_hba.link_state.number,
8b68cd52 4522 phba->sli4_hba.link_state.logical_speed,
70f3c073 4523 phba->sli4_hba.link_state.fault);
76a95d75
JS		 4524 /*
4525 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch
4526 * topology info. Note: Optional for non FC-AL ports.
4527 */
4528 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
4529 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4530 if (rc == MBX_NOT_FINISHED)
4531 goto out_free_dmabuf;
4532 return;
4533 }
4534 /*
4535 * For FCoE Mode: fill in all the topology information we need and call
4536 * the READ_TOPOLOGY completion routine to continue without actually
4537 * sending the READ_TOPOLOGY mailbox command to the port.
4538 */
4539 /* Parse and translate status field */
4540 mb = &pmb->u.mb;
4541 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba, acqe_link);
4542
4543 /* Parse and translate link attention fields */
4544 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop;
4545 la->eventTag = acqe_link->event_tag;
4546 bf_set(lpfc_mbx_read_top_att_type, la, att_type);
4547 bf_set(lpfc_mbx_read_top_link_spd, la,
a085e87c 4548 (bf_get(lpfc_acqe_link_speed, acqe_link)));
76a95d75
JS		 4549
4550 /* Fake the the following irrelvant fields */
4551 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT);
4552 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0);
4553 bf_set(lpfc_mbx_read_top_il, la, 0);
4554 bf_set(lpfc_mbx_read_top_pb, la, 0);
4555 bf_set(lpfc_mbx_read_top_fa, la, 0);
4556 bf_set(lpfc_mbx_read_top_mm, la, 0);
da0436e9
JS		 4557
4558 /* Invoke the lpfc_handle_latt mailbox command callback function */
76a95d75 4559 lpfc_mbx_cmpl_read_topology(phba, pmb);
da0436e9 4560
5b75da2f 4561 return;
da0436e9
JS		 4562
4563out_free_dmabuf:
4564 kfree(mp);
4565out_free_pmb:
4566 mempool_free(pmb, phba->mbox_mem_pool);
4567}
4568
70f3c073
JS		 4569/**
4570 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event
4571 * @phba: pointer to lpfc hba data structure.
4572 * @acqe_fc: pointer to the async fc completion queue entry.
4573 *
4574 * This routine is to handle the SLI4 asynchronous FC event. It will simply log
4575 * that the event was received and then issue a read_topology mailbox command so
4576 * that the rest of the driver will treat it the same as SLI3.
4577 **/
4578static void
4579lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc)
4580{
4581 struct lpfc_dmabuf *mp;
4582 LPFC_MBOXQ_t *pmb;
7bdedb34
JS		 4583 MAILBOX_t *mb;
4584 struct lpfc_mbx_read_top *la;
70f3c073
JS		 4585 int rc;
4586
4587 if (bf_get(lpfc_trailer_type, acqe_fc) !=
4588 LPFC_FC_LA_EVENT_TYPE_FC_LINK) {
4589 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4590 "2895 Non FC link Event detected.(%d)\n",
4591 bf_get(lpfc_trailer_type, acqe_fc));
4592 return;
4593 }
4594 /* Keep the link status for extra SLI4 state machine reference */
4595 phba->sli4_hba.link_state.speed =
8b68cd52
JS		 4596 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
4597 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
70f3c073
JS		 4598 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
4599 phba->sli4_hba.link_state.topology =
4600 bf_get(lpfc_acqe_fc_la_topology, acqe_fc);
4601 phba->sli4_hba.link_state.status =
4602 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc);
4603 phba->sli4_hba.link_state.type =
4604 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc);
4605 phba->sli4_hba.link_state.number =
4606 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc);
4607 phba->sli4_hba.link_state.fault =
4608 bf_get(lpfc_acqe_link_fault, acqe_fc);
4609 phba->sli4_hba.link_state.logical_speed =
8b68cd52 4610 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
70f3c073
JS		 4611 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4612 "2896 Async FC event - Speed:%dGBaud Topology:x%x "
4613 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:"
4614 "%dMbps Fault:%d\n",
4615 phba->sli4_hba.link_state.speed,
4616 phba->sli4_hba.link_state.topology,
4617 phba->sli4_hba.link_state.status,
4618 phba->sli4_hba.link_state.type,
4619 phba->sli4_hba.link_state.number,
8b68cd52 4620 phba->sli4_hba.link_state.logical_speed,
70f3c073
JS		 4621 phba->sli4_hba.link_state.fault);
4622 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4623 if (!pmb) {
4624 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4625 "2897 The mboxq allocation failed\n");
4626 return;
4627 }
4628 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4629 if (!mp) {
4630 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4631 "2898 The lpfc_dmabuf allocation failed\n");
4632 goto out_free_pmb;
4633 }
4634 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4635 if (!mp->virt) {
4636 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4637 "2899 The mbuf allocation failed\n");
4638 goto out_free_dmabuf;
4639 }
4640
4641 /* Cleanup any outstanding ELS commands */
4642 lpfc_els_flush_all_cmd(phba);
4643
4644 /* Block ELS IOCBs until we have done process link event */
895427bd 4645 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
70f3c073
JS		 4646
4647 /* Update link event statistics */
4648 phba->sli.slistat.link_event++;
4649
4650 /* Create lpfc_handle_latt mailbox command from link ACQE */
4651 lpfc_read_topology(phba, pmb, mp);
4652 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
4653 pmb->vport = phba->pport;
4654
7bdedb34 4655 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
ae9e28f3
JS		 4656 phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK);
4657
4658 switch (phba->sli4_hba.link_state.status) {
4659 case LPFC_FC_LA_TYPE_MDS_LINK_DOWN:
4660 phba->link_flag |= LS_MDS_LINK_DOWN;
4661 break;
4662 case LPFC_FC_LA_TYPE_MDS_LOOPBACK:
4663 phba->link_flag |= LS_MDS_LOOPBACK;
4664 break;
4665 default:
4666 break;
4667 }
4668
7bdedb34
JS		 4669 /* Parse and translate status field */
4670 mb = &pmb->u.mb;
4671 mb->mbxStatus = lpfc_sli4_parse_latt_fault(phba,
4672 (void *)acqe_fc);
4673
4674 /* Parse and translate link attention fields */
4675 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop;
4676 la->eventTag = acqe_fc->event_tag;
7bdedb34 4677
aeb3c817
JS		 4678 if (phba->sli4_hba.link_state.status ==
4679 LPFC_FC_LA_TYPE_UNEXP_WWPN) {
4680 bf_set(lpfc_mbx_read_top_att_type, la,
4681 LPFC_FC_LA_TYPE_UNEXP_WWPN);
4682 } else {
4683 bf_set(lpfc_mbx_read_top_att_type, la,
4684 LPFC_FC_LA_TYPE_LINK_DOWN);
4685 }
7bdedb34
JS		 4686 /* Invoke the mailbox command callback function */
4687 lpfc_mbx_cmpl_read_topology(phba, pmb);
4688
4689 return;
4690 }
4691
70f3c073
JS		 4692 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4693 if (rc == MBX_NOT_FINISHED)
4694 goto out_free_dmabuf;
4695 return;
4696
4697out_free_dmabuf:
4698 kfree(mp);
4699out_free_pmb:
4700 mempool_free(pmb, phba->mbox_mem_pool);
4701}
4702
4703/**
4704 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event
4705 * @phba: pointer to lpfc hba data structure.
4706 * @acqe_fc: pointer to the async SLI completion queue entry.
4707 *
4708 * This routine is to handle the SLI4 asynchronous SLI events.
4709 **/
4710static void
4711lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
4712{
4b8bae08 4713 char port_name;
8c1312e1 4714 char message[128];
4b8bae08 4715 uint8_t status;
946727dc 4716 uint8_t evt_type;
448193b5 4717 uint8_t operational = 0;
946727dc 4718 struct temp_event temp_event_data;
4b8bae08 4719 struct lpfc_acqe_misconfigured_event *misconfigured;
946727dc
JS		 4720 struct Scsi_Host *shost;
4721
4722 evt_type = bf_get(lpfc_trailer_type, acqe_sli);
4b8bae08 4723
448193b5
JS		 4724 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4725 "2901 Async SLI event - Event Data1:x%08x Event Data2:"
4726 "x%08x SLI Event Type:%d\n",
4727 acqe_sli->event_data1, acqe_sli->event_data2,
4728 evt_type);
4b8bae08
JS		 4729
4730 port_name = phba->Port[0];
4731 if (port_name == 0x00)
4732 port_name = '?'; /* get port name is empty */
4733
946727dc
JS		 4734 switch (evt_type) {
4735 case LPFC_SLI_EVENT_TYPE_OVER_TEMP:
4736 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4737 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
4738 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4739
4740 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
4741 "3190 Over Temperature:%d Celsius- Port Name %c\n",
4742 acqe_sli->event_data1, port_name);
4743
310429ef 4744 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
946727dc
JS		 4745 shost = lpfc_shost_from_vport(phba->pport);
4746 fc_host_post_vendor_event(shost, fc_get_event_number(),
4747 sizeof(temp_event_data),
4748 (char *)&temp_event_data,
4749 SCSI_NL_VID_TYPE_PCI
4750 | PCI_VENDOR_ID_EMULEX);
4751 break;
4752 case LPFC_SLI_EVENT_TYPE_NORM_TEMP:
4753 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
4754 temp_event_data.event_code = LPFC_NORMAL_TEMP;
4755 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
4756
4757 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4758 "3191 Normal Temperature:%d Celsius - Port Name %c\n",
4759 acqe_sli->event_data1, port_name);
4760
4761 shost = lpfc_shost_from_vport(phba->pport);
4762 fc_host_post_vendor_event(shost, fc_get_event_number(),
4763 sizeof(temp_event_data),
4764 (char *)&temp_event_data,
4765 SCSI_NL_VID_TYPE_PCI
4766 | PCI_VENDOR_ID_EMULEX);
4767 break;
4768 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED:
4769 misconfigured = (struct lpfc_acqe_misconfigured_event *)
4b8bae08
JS		 4770 &acqe_sli->event_data1;
4771
946727dc
JS		 4772 /* fetch the status for this port */
4773 switch (phba->sli4_hba.lnk_info.lnk_no) {
4774 case LPFC_LINK_NUMBER_0:
448193b5
JS		 4775 status = bf_get(lpfc_sli_misconfigured_port0_state,
4776 &misconfigured->theEvent);
4777 operational = bf_get(lpfc_sli_misconfigured_port0_op,
4b8bae08 4778 &misconfigured->theEvent);
946727dc
JS		 4779 break;
4780 case LPFC_LINK_NUMBER_1:
448193b5
JS		 4781 status = bf_get(lpfc_sli_misconfigured_port1_state,
4782 &misconfigured->theEvent);
4783 operational = bf_get(lpfc_sli_misconfigured_port1_op,
4b8bae08 4784 &misconfigured->theEvent);
946727dc
JS		 4785 break;
4786 case LPFC_LINK_NUMBER_2:
448193b5
JS		 4787 status = bf_get(lpfc_sli_misconfigured_port2_state,
4788 &misconfigured->theEvent);
4789 operational = bf_get(lpfc_sli_misconfigured_port2_op,
4b8bae08 4790 &misconfigured->theEvent);
946727dc
JS		 4791 break;
4792 case LPFC_LINK_NUMBER_3:
448193b5
JS		 4793 status = bf_get(lpfc_sli_misconfigured_port3_state,
4794 &misconfigured->theEvent);
4795 operational = bf_get(lpfc_sli_misconfigured_port3_op,
4b8bae08 4796 &misconfigured->theEvent);
946727dc
JS		 4797 break;
4798 default:
448193b5
JS		 4799 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4800 "3296 "
4801 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED "
4802 "event: Invalid link %d",
4803 phba->sli4_hba.lnk_info.lnk_no);
4804 return;
946727dc 4805 }
4b8bae08 4806
448193b5
JS		 4807 /* Skip if optic state unchanged */
4808 if (phba->sli4_hba.lnk_info.optic_state == status)
4809 return;
4810
946727dc
JS		 4811 switch (status) {
4812 case LPFC_SLI_EVENT_STATUS_VALID:
448193b5
JS		 4813 sprintf(message, "Physical Link is functional");
4814 break;
946727dc
JS		 4815 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT:
4816 sprintf(message, "Optics faulted/incorrectly "
4817 "installed/not installed - Reseat optics, "
4818 "if issue not resolved, replace.");
4819 break;
4820 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE:
4821 sprintf(message,
4822 "Optics of two types installed - Remove one "
4823 "optic or install matching pair of optics.");
4824 break;
4825 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED:
4826 sprintf(message, "Incompatible optics - Replace with "
292098be 4827 "compatible optics for card to function.");
946727dc 4828 break;
448193b5
JS		 4829 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED:
4830 sprintf(message, "Unqualified optics - Replace with "
4831 "Avago optics for Warranty and Technical "
4832 "Support - Link is%s operational",
2ea259ee 4833 (operational) ? " not" : "");
448193b5
JS		 4834 break;
4835 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED:
4836 sprintf(message, "Uncertified optics - Replace with "
4837 "Avago-certified optics to enable link "
4838 "operation - Link is%s operational",
2ea259ee 4839 (operational) ? " not" : "");
448193b5 4840 break;
946727dc
JS		 4841 default:
4842 /* firmware is reporting a status we don't know about */
4843 sprintf(message, "Unknown event status x%02x", status);
4844 break;
4845 }
448193b5 4846 phba->sli4_hba.lnk_info.optic_state = status;
946727dc 4847 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
448193b5 4848 "3176 Port Name %c %s\n", port_name, message);
946727dc
JS		 4849 break;
4850 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT:
4851 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4852 "3192 Remote DPort Test Initiated - "
4853 "Event Data1:x%08x Event Data2: x%08x\n",
4854 acqe_sli->event_data1, acqe_sli->event_data2);
4b8bae08
JS		 4855 break;
4856 default:
946727dc
JS		 4857 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4858 "3193 Async SLI event - Event Data1:x%08x Event Data2:"
4859 "x%08x SLI Event Type:%d\n",
4860 acqe_sli->event_data1, acqe_sli->event_data2,
4861 evt_type);
4b8bae08
JS		 4862 break;
4863 }
70f3c073
JS		 4864}
4865
fc2b989b
JS		 4866/**
4867 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport
4868 * @vport: pointer to vport data structure.
4869 *
4870 * This routine is to perform Clear Virtual Link (CVL) on a vport in
4871 * response to a CVL event.
4872 *
4873 * Return the pointer to the ndlp with the vport if successful, otherwise
4874 * return NULL.
4875 **/
4876static struct lpfc_nodelist *
4877lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport)
4878{
4879 struct lpfc_nodelist *ndlp;
4880 struct Scsi_Host *shost;
4881 struct lpfc_hba *phba;
4882
4883 if (!vport)
4884 return NULL;
fc2b989b
JS		 4885 phba = vport->phba;
4886 if (!phba)
4887 return NULL;
78730cfe
JS		 4888 ndlp = lpfc_findnode_did(vport, Fabric_DID);
4889 if (!ndlp) {
4890 /* Cannot find existing Fabric ndlp, so allocate a new one */
9d3d340d 4891 ndlp = lpfc_nlp_init(vport, Fabric_DID);
78730cfe
JS		 4892 if (!ndlp)
4893 return 0;
78730cfe
JS		 4894 /* Set the node type */
4895 ndlp->nlp_type |= NLP_FABRIC;
4896 /* Put ndlp onto node list */
4897 lpfc_enqueue_node(vport, ndlp);
4898 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
4899 /* re-setup ndlp without removing from node list */
4900 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
4901 if (!ndlp)
4902 return 0;
4903 }
63e801ce
JS		 4904 if ((phba->pport->port_state < LPFC_FLOGI) &&
4905 (phba->pport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS		 4906 return NULL;
4907 /* If virtual link is not yet instantiated ignore CVL */
63e801ce
JS		 4908 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)
4909 && (vport->port_state != LPFC_VPORT_FAILED))
fc2b989b
JS		 4910 return NULL;
4911 shost = lpfc_shost_from_vport(vport);
4912 if (!shost)
4913 return NULL;
4914 lpfc_linkdown_port(vport);
4915 lpfc_cleanup_pending_mbox(vport);
4916 spin_lock_irq(shost->host_lock);
4917 vport->fc_flag |= FC_VPORT_CVL_RCVD;
4918 spin_unlock_irq(shost->host_lock);
4919
4920 return ndlp;
4921}
4922
4923/**
4924 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports
4925 * @vport: pointer to lpfc hba data structure.
4926 *
4927 * This routine is to perform Clear Virtual Link (CVL) on all vports in
4928 * response to a FCF dead event.
4929 **/
4930static void
4931lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba)
4932{
4933 struct lpfc_vport **vports;
4934 int i;
4935
4936 vports = lpfc_create_vport_work_array(phba);
4937 if (vports)
4938 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
4939 lpfc_sli4_perform_vport_cvl(vports[i]);
4940 lpfc_destroy_vport_work_array(phba, vports);
4941}
4942
da0436e9 4943/**
76a95d75 4944 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event
da0436e9
JS		 4945 * @phba: pointer to lpfc hba data structure.
4946 * @acqe_link: pointer to the async fcoe completion queue entry.
4947 *
4948 * This routine is to handle the SLI4 asynchronous fcoe event.
4949 **/
4950static void
76a95d75 4951lpfc_sli4_async_fip_evt(struct lpfc_hba *phba,
70f3c073 4952 struct lpfc_acqe_fip *acqe_fip)
da0436e9 4953{
70f3c073 4954 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
da0436e9 4955 int rc;
6669f9bb
JS		 4956 struct lpfc_vport *vport;
4957 struct lpfc_nodelist *ndlp;
4958 struct Scsi_Host *shost;
695a814e
JS		 4959 int active_vlink_present;
4960 struct lpfc_vport **vports;
4961 int i;
da0436e9 4962
70f3c073
JS		 4963 phba->fc_eventTag = acqe_fip->event_tag;
4964 phba->fcoe_eventtag = acqe_fip->event_tag;
da0436e9 4965 switch (event_type) {
70f3c073
JS		 4966 case LPFC_FIP_EVENT_TYPE_NEW_FCF:
4967 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD:
4968 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF)
999d813f
JS		 4969 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
4970 LOG_DISCOVERY,
a93ff37a
JS		 4971 "2546 New FCF event, evt_tag:x%x, "
4972 "index:x%x\n",
70f3c073
JS		 4973 acqe_fip->event_tag,
4974 acqe_fip->index);
999d813f
JS		 4975 else
4976 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP |
4977 LOG_DISCOVERY,
a93ff37a
JS		 4978 "2788 FCF param modified event, "
4979 "evt_tag:x%x, index:x%x\n",
70f3c073
JS		 4980 acqe_fip->event_tag,
4981 acqe_fip->index);
38b92ef8 4982 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
0c9ab6f5
JS		 4983 /*
4984 * During period of FCF discovery, read the FCF
4985 * table record indexed by the event to update
a93ff37a 4986 * FCF roundrobin failover eligible FCF bmask.
0c9ab6f5
JS		 4987 */
4988 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
4989 LOG_DISCOVERY,
a93ff37a
JS		 4990 "2779 Read FCF (x%x) for updating "
4991 "roundrobin FCF failover bmask\n",
70f3c073
JS		 4992 acqe_fip->index);
4993 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index);
0c9ab6f5 4994 }
38b92ef8
JS		 4995
4996 /* If the FCF discovery is in progress, do nothing. */
3804dc84 4997 spin_lock_irq(&phba->hbalock);
a93ff37a 4998 if (phba->hba_flag & FCF_TS_INPROG) {
38b92ef8
JS		 4999 spin_unlock_irq(&phba->hbalock);
5000 break;
5001 }
5002 /* If fast FCF failover rescan event is pending, do nothing */
5003 if (phba->fcf.fcf_flag & FCF_REDISC_EVT) {
5004 spin_unlock_irq(&phba->hbalock);
5005 break;
5006 }
5007
c2b9712e
JS		 5008 /* If the FCF has been in discovered state, do nothing. */
5009 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) {
3804dc84
JS		 5010 spin_unlock_irq(&phba->hbalock);
5011 break;
5012 }
5013 spin_unlock_irq(&phba->hbalock);
38b92ef8 5014
0c9ab6f5
JS		 5015 /* Otherwise, scan the entire FCF table and re-discover SAN */
5016 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a
JS		 5017 "2770 Start FCF table scan per async FCF "
5018 "event, evt_tag:x%x, index:x%x\n",
70f3c073 5019 acqe_fip->event_tag, acqe_fip->index);
0c9ab6f5
JS		 5020 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba,
5021 LPFC_FCOE_FCF_GET_FIRST);
da0436e9 5022 if (rc)
0c9ab6f5
JS		 5023 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5024 "2547 Issue FCF scan read FCF mailbox "
a93ff37a 5025 "command failed (x%x)\n", rc);
da0436e9
JS		 5026 break;
5027
70f3c073 5028 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL:
da0436e9 5029 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
e4e74273 5030 "2548 FCF Table full count 0x%x tag 0x%x\n",
70f3c073
JS		 5031 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip),
5032 acqe_fip->event_tag);
da0436e9
JS		 5033 break;
5034
70f3c073 5035 case LPFC_FIP_EVENT_TYPE_FCF_DEAD:
80c17849 5036 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 5037 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
a93ff37a 5038 "2549 FCF (x%x) disconnected from network, "
70f3c073 5039 "tag:x%x\n", acqe_fip->index, acqe_fip->event_tag);
38b92ef8
JS		 5040 /*
5041 * If we are in the middle of FCF failover process, clear
5042 * the corresponding FCF bit in the roundrobin bitmap.
da0436e9 5043 */
fc2b989b 5044 spin_lock_irq(&phba->hbalock);
a1cadfef
JS		 5045 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) &&
5046 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) {
fc2b989b 5047 spin_unlock_irq(&phba->hbalock);
0c9ab6f5 5048 /* Update FLOGI FCF failover eligible FCF bmask */
70f3c073 5049 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index);
fc2b989b
JS		 5050 break;
5051 }
38b92ef8
JS		 5052 spin_unlock_irq(&phba->hbalock);
5053
5054 /* If the event is not for currently used fcf do nothing */
70f3c073 5055 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index)
38b92ef8
JS		 5056 break;
5057
5058 /*
5059 * Otherwise, request the port to rediscover the entire FCF
5060 * table for a fast recovery from case that the current FCF
5061 * is no longer valid as we are not in the middle of FCF
5062 * failover process already.
5063 */
c2b9712e
JS		 5064 spin_lock_irq(&phba->hbalock);
5065 /* Mark the fast failover process in progress */
5066 phba->fcf.fcf_flag |= FCF_DEAD_DISC;
5067 spin_unlock_irq(&phba->hbalock);
5068
5069 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
5070 "2771 Start FCF fast failover process due to "
5071 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x "
5072 "\n", acqe_fip->event_tag, acqe_fip->index);
5073 rc = lpfc_sli4_redisc_fcf_table(phba);
5074 if (rc) {
5075 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
5076 LOG_DISCOVERY,
5077 "2772 Issue FCF rediscover mabilbox "
5078 "command failed, fail through to FCF "
5079 "dead event\n");
5080 spin_lock_irq(&phba->hbalock);
5081 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
5082 spin_unlock_irq(&phba->hbalock);
5083 /*
5084 * Last resort will fail over by treating this
5085 * as a link down to FCF registration.
5086 */
5087 lpfc_sli4_fcf_dead_failthrough(phba);
5088 } else {
5089 /* Reset FCF roundrobin bmask for new discovery */
5090 lpfc_sli4_clear_fcf_rr_bmask(phba);
5091 /*
5092 * Handling fast FCF failover to a DEAD FCF event is
5093 * considered equalivant to receiving CVL to all vports.
5094 */
5095 lpfc_sli4_perform_all_vport_cvl(phba);
5096 }
da0436e9 5097 break;
70f3c073 5098 case LPFC_FIP_EVENT_TYPE_CVL:
80c17849 5099 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
0c9ab6f5 5100 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
6669f9bb 5101 "2718 Clear Virtual Link Received for VPI 0x%x"
70f3c073 5102 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag);
6d368e53 5103
6669f9bb 5104 vport = lpfc_find_vport_by_vpid(phba,
5248a749 5105 acqe_fip->index);
fc2b989b 5106 ndlp = lpfc_sli4_perform_vport_cvl(vport);
6669f9bb
JS		 5107 if (!ndlp)
5108 break;
695a814e
JS		 5109 active_vlink_present = 0;
5110
5111 vports = lpfc_create_vport_work_array(phba);
5112 if (vports) {
5113 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
5114 i++) {
5115 if ((!(vports[i]->fc_flag &
5116 FC_VPORT_CVL_RCVD)) &&
5117 (vports[i]->port_state > LPFC_FDISC)) {
5118 active_vlink_present = 1;
5119 break;
5120 }
5121 }
5122 lpfc_destroy_vport_work_array(phba, vports);
5123 }
5124
cc82355a
JS		 5125 /*
5126 * Don't re-instantiate if vport is marked for deletion.
5127 * If we are here first then vport_delete is going to wait
5128 * for discovery to complete.
5129 */
5130 if (!(vport->load_flag & FC_UNLOADING) &&
5131 active_vlink_present) {
695a814e
JS		 5132 /*
5133 * If there are other active VLinks present,
5134 * re-instantiate the Vlink using FDISC.
5135 */
256ec0d0
JS		 5136 mod_timer(&ndlp->nlp_delayfunc,
5137 jiffies + msecs_to_jiffies(1000));
fc2b989b 5138 shost = lpfc_shost_from_vport(vport);
6669f9bb
JS		 5139 spin_lock_irq(shost->host_lock);
5140 ndlp->nlp_flag |= NLP_DELAY_TMO;
5141 spin_unlock_irq(shost->host_lock);
695a814e
JS		 5142 ndlp->nlp_last_elscmd = ELS_CMD_FDISC;
5143 vport->port_state = LPFC_FDISC;
5144 } else {
ecfd03c6
JS		 5145 /*
5146 * Otherwise, we request port to rediscover
5147 * the entire FCF table for a fast recovery
5148 * from possible case that the current FCF
0c9ab6f5
JS		 5149 * is no longer valid if we are not already
5150 * in the FCF failover process.
ecfd03c6 5151 */
fc2b989b 5152 spin_lock_irq(&phba->hbalock);
0c9ab6f5 5153 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
fc2b989b
JS		 5154 spin_unlock_irq(&phba->hbalock);
5155 break;
5156 }
5157 /* Mark the fast failover process in progress */
0c9ab6f5 5158 phba->fcf.fcf_flag |= FCF_ACVL_DISC;
fc2b989b 5159 spin_unlock_irq(&phba->hbalock);
0c9ab6f5
JS		 5160 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
5161 LOG_DISCOVERY,
a93ff37a 5162 "2773 Start FCF failover per CVL, "
70f3c073 5163 "evt_tag:x%x\n", acqe_fip->event_tag);
ecfd03c6 5164 rc = lpfc_sli4_redisc_fcf_table(phba);
fc2b989b 5165 if (rc) {
0c9ab6f5
JS		 5166 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
5167 LOG_DISCOVERY,
5168 "2774 Issue FCF rediscover "
5169 "mabilbox command failed, "
5170 "through to CVL event\n");
fc2b989b 5171 spin_lock_irq(&phba->hbalock);
0c9ab6f5 5172 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
fc2b989b 5173 spin_unlock_irq(&phba->hbalock);
ecfd03c6
JS		 5174 /*
5175 * Last resort will be re-try on the
5176 * the current registered FCF entry.
5177 */
5178 lpfc_retry_pport_discovery(phba);
38b92ef8
JS		 5179 } else
5180 /*
5181 * Reset FCF roundrobin bmask for new
5182 * discovery.
5183 */
7d791df7 5184 lpfc_sli4_clear_fcf_rr_bmask(phba);
6669f9bb
JS		 5185 }
5186 break;
da0436e9
JS		 5187 default:
5188 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5189 "0288 Unknown FCoE event type 0x%x event tag "
70f3c073 5190 "0x%x\n", event_type, acqe_fip->event_tag);
da0436e9
JS		 5191 break;
5192 }
5193}
5194
5195/**
5196 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event
5197 * @phba: pointer to lpfc hba data structure.
5198 * @acqe_link: pointer to the async dcbx completion queue entry.
5199 *
5200 * This routine is to handle the SLI4 asynchronous dcbx event.
5201 **/
5202static void
5203lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba,
5204 struct lpfc_acqe_dcbx *acqe_dcbx)
5205{
4d9ab994 5206 phba->fc_eventTag = acqe_dcbx->event_tag;
da0436e9
JS		 5207 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5208 "0290 The SLI4 DCBX asynchronous event is not "
5209 "handled yet\n");
5210}
5211
b19a061a
JS		 5212/**
5213 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event
5214 * @phba: pointer to lpfc hba data structure.
5215 * @acqe_link: pointer to the async grp5 completion queue entry.
5216 *
5217 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event
5218 * is an asynchronous notified of a logical link speed change. The Port
5219 * reports the logical link speed in units of 10Mbps.
5220 **/
5221static void
5222lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba,
5223 struct lpfc_acqe_grp5 *acqe_grp5)
5224{
5225 uint16_t prev_ll_spd;
5226
5227 phba->fc_eventTag = acqe_grp5->event_tag;
5228 phba->fcoe_eventtag = acqe_grp5->event_tag;
5229 prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
5230 phba->sli4_hba.link_state.logical_speed =
8b68cd52 5231 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10;
b19a061a
JS		 5232 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5233 "2789 GRP5 Async Event: Updating logical link speed "
8b68cd52
JS		 5234 "from %dMbps to %dMbps\n", prev_ll_spd,
5235 phba->sli4_hba.link_state.logical_speed);
b19a061a
JS		 5236}
5237
da0436e9
JS		 5238/**
5239 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event
5240 * @phba: pointer to lpfc hba data structure.
5241 *
5242 * This routine is invoked by the worker thread to process all the pending
5243 * SLI4 asynchronous events.
5244 **/
5245void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
5246{
5247 struct lpfc_cq_event *cq_event;
5248
5249 /* First, declare the async event has been handled */
5250 spin_lock_irq(&phba->hbalock);
5251 phba->hba_flag &= ~ASYNC_EVENT;
5252 spin_unlock_irq(&phba->hbalock);
5253 /* Now, handle all the async events */
5254 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
5255 /* Get the first event from the head of the event queue */
5256 spin_lock_irq(&phba->hbalock);
5257 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
5258 cq_event, struct lpfc_cq_event, list);
5259 spin_unlock_irq(&phba->hbalock);
5260 /* Process the asynchronous event */
5261 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) {
5262 case LPFC_TRAILER_CODE_LINK:
5263 lpfc_sli4_async_link_evt(phba,
5264 &cq_event->cqe.acqe_link);
5265 break;
5266 case LPFC_TRAILER_CODE_FCOE:
70f3c073 5267 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip);
da0436e9
JS		 5268 break;
5269 case LPFC_TRAILER_CODE_DCBX:
5270 lpfc_sli4_async_dcbx_evt(phba,
5271 &cq_event->cqe.acqe_dcbx);
5272 break;
b19a061a
JS		 5273 case LPFC_TRAILER_CODE_GRP5:
5274 lpfc_sli4_async_grp5_evt(phba,
5275 &cq_event->cqe.acqe_grp5);
5276 break;
70f3c073
JS		 5277 case LPFC_TRAILER_CODE_FC:
5278 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc);
5279 break;
5280 case LPFC_TRAILER_CODE_SLI:
5281 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli);
5282 break;
da0436e9
JS		 5283 default:
5284 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5285 "1804 Invalid asynchrous event code: "
5286 "x%x\n", bf_get(lpfc_trailer_code,
5287 &cq_event->cqe.mcqe_cmpl));
5288 break;
5289 }
5290 /* Free the completion event processed to the free pool */
5291 lpfc_sli4_cq_event_release(phba, cq_event);
5292 }
5293}
5294
ecfd03c6
JS		 5295/**
5296 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event
5297 * @phba: pointer to lpfc hba data structure.
5298 *
5299 * This routine is invoked by the worker thread to process FCF table
5300 * rediscovery pending completion event.
5301 **/
5302void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba)
5303{
5304 int rc;
5305
5306 spin_lock_irq(&phba->hbalock);
5307 /* Clear FCF rediscovery timeout event */
5308 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT;
5309 /* Clear driver fast failover FCF record flag */
5310 phba->fcf.failover_rec.flag = 0;
5311 /* Set state for FCF fast failover */
5312 phba->fcf.fcf_flag |= FCF_REDISC_FOV;
5313 spin_unlock_irq(&phba->hbalock);
5314
5315 /* Scan FCF table from the first entry to re-discover SAN */
0c9ab6f5 5316 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
a93ff37a 5317 "2777 Start post-quiescent FCF table scan\n");
0c9ab6f5 5318 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST);
ecfd03c6 5319 if (rc)
0c9ab6f5
JS		 5320 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5321 "2747 Issue FCF scan read FCF mailbox "
5322 "command failed 0x%x\n", rc);
ecfd03c6
JS		 5323}
5324
da0436e9
JS		 5325/**
5326 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table
5327 * @phba: pointer to lpfc hba data structure.
5328 * @dev_grp: The HBA PCI-Device group number.
5329 *
5330 * This routine is invoked to set up the per HBA PCI-Device group function
5331 * API jump table entries.
5332 *
5333 * Return: 0 if success, otherwise -ENODEV
5334 **/
5335int
5336lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
5337{
5338 int rc;
5339
5340 /* Set up lpfc PCI-device group */
5341 phba->pci_dev_grp = dev_grp;
5342
5343 /* The LPFC_PCI_DEV_OC uses SLI4 */
5344 if (dev_grp == LPFC_PCI_DEV_OC)
5345 phba->sli_rev = LPFC_SLI_REV4;
5346
5347 /* Set up device INIT API function jump table */
5348 rc = lpfc_init_api_table_setup(phba, dev_grp);
5349 if (rc)
5350 return -ENODEV;
5351 /* Set up SCSI API function jump table */
5352 rc = lpfc_scsi_api_table_setup(phba, dev_grp);
5353 if (rc)
5354 return -ENODEV;
5355 /* Set up SLI API function jump table */
5356 rc = lpfc_sli_api_table_setup(phba, dev_grp);
5357 if (rc)
5358 return -ENODEV;
5359 /* Set up MBOX API function jump table */
5360 rc = lpfc_mbox_api_table_setup(phba, dev_grp);
5361 if (rc)
5362 return -ENODEV;
5363
5364 return 0;
5b75da2f
JS		 5365}
5366
5367/**
3621a710 5368 * lpfc_log_intr_mode - Log the active interrupt mode
5b75da2f
JS		 5369 * @phba: pointer to lpfc hba data structure.
5370 * @intr_mode: active interrupt mode adopted.
5371 *
5372 * This routine it invoked to log the currently used active interrupt mode
5373 * to the device.
3772a991
JS		 5374 **/
5375static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode)
5b75da2f
JS		 5376{
5377 switch (intr_mode) {
5378 case 0:
5379 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5380 "0470 Enable INTx interrupt mode.\n");
5381 break;
5382 case 1:
5383 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5384 "0481 Enabled MSI interrupt mode.\n");
5385 break;
5386 case 2:
5387 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5388 "0480 Enabled MSI-X interrupt mode.\n");
5389 break;
5390 default:
5391 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5392 "0482 Illegal interrupt mode.\n");
5393 break;
5394 }
5395 return;
5396}
5397
5b75da2f 5398/**
3772a991 5399 * lpfc_enable_pci_dev - Enable a generic PCI device.
5b75da2f
JS		 5400 * @phba: pointer to lpfc hba data structure.
5401 *
3772a991
JS		 5402 * This routine is invoked to enable the PCI device that is common to all
5403 * PCI devices.
5b75da2f
JS		 5404 *
5405 * Return codes
af901ca1 5406 * 0 - successful
3772a991 5407 * other values - error
5b75da2f 5408 **/
3772a991
JS		 5409static int
5410lpfc_enable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5411{
3772a991 5412 struct pci_dev *pdev;
5b75da2f 5413
3772a991
JS		 5414 /* Obtain PCI device reference */
5415 if (!phba->pcidev)
5416 goto out_error;
5417 else
5418 pdev = phba->pcidev;
3772a991
JS		 5419 /* Enable PCI device */
5420 if (pci_enable_device_mem(pdev))
5421 goto out_error;
5422 /* Request PCI resource for the device */
e0c0483c 5423 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME))
3772a991
JS		 5424 goto out_disable_device;
5425 /* Set up device as PCI master and save state for EEH */
5426 pci_set_master(pdev);
5427 pci_try_set_mwi(pdev);
5428 pci_save_state(pdev);
5b75da2f 5429
0558056c 5430 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */
453193e0 5431 if (pci_is_pcie(pdev))
0558056c
JS		 5432 pdev->needs_freset = 1;
5433
3772a991 5434 return 0;
5b75da2f 5435
3772a991
JS		 5436out_disable_device:
5437 pci_disable_device(pdev);
5438out_error:
079b5c91 5439 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
e0c0483c 5440 "1401 Failed to enable pci device\n");
3772a991 5441 return -ENODEV;
5b75da2f
JS		 5442}
5443
5444/**
3772a991 5445 * lpfc_disable_pci_dev - Disable a generic PCI device.
5b75da2f
JS		 5446 * @phba: pointer to lpfc hba data structure.
5447 *
3772a991
JS		 5448 * This routine is invoked to disable the PCI device that is common to all
5449 * PCI devices.
5b75da2f
JS		 5450 **/
5451static void
3772a991 5452lpfc_disable_pci_dev(struct lpfc_hba *phba)
5b75da2f 5453{
3772a991 5454 struct pci_dev *pdev;
5b75da2f 5455
3772a991
JS		 5456 /* Obtain PCI device reference */
5457 if (!phba->pcidev)
5458 return;
5459 else
5460 pdev = phba->pcidev;
3772a991 5461 /* Release PCI resource and disable PCI device */
e0c0483c 5462 pci_release_mem_regions(pdev);
3772a991 5463 pci_disable_device(pdev);
5b75da2f
JS		 5464
5465 return;
5466}
5467
e59058c4 5468/**
3772a991
JS		 5469 * lpfc_reset_hba - Reset a hba
5470 * @phba: pointer to lpfc hba data structure.
e59058c4 5471 *
3772a991
JS		 5472 * This routine is invoked to reset a hba device. It brings the HBA
5473 * offline, performs a board restart, and then brings the board back
5474 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up
5475 * on outstanding mailbox commands.
e59058c4 5476 **/
3772a991
JS		 5477void
5478lpfc_reset_hba(struct lpfc_hba *phba)
dea3101e 5479{
3772a991
JS		 5480 /* If resets are disabled then set error state and return. */
5481 if (!phba->cfg_enable_hba_reset) {
5482 phba->link_state = LPFC_HBA_ERROR;
5483 return;
5484 }
ee62021a
JS		 5485 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
5486 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
5487 else
5488 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
3772a991
JS		 5489 lpfc_offline(phba);
5490 lpfc_sli_brdrestart(phba);
5491 lpfc_online(phba);
5492 lpfc_unblock_mgmt_io(phba);
5493}
dea3101e 5494
0a96e975
JS		 5495/**
5496 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions
5497 * @phba: pointer to lpfc hba data structure.
5498 *
5499 * This function enables the PCI SR-IOV virtual functions to a physical
5500 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5501 * enable the number of virtual functions to the physical function. As
5502 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5503 * API call does not considered as an error condition for most of the device.
5504 **/
5505uint16_t
5506lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba)
5507{
5508 struct pci_dev *pdev = phba->pcidev;
5509 uint16_t nr_virtfn;
5510 int pos;
5511
0a96e975
JS		 5512 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
5513 if (pos == 0)
5514 return 0;
5515
5516 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn);
5517 return nr_virtfn;
5518}
5519
912e3acd
JS		 5520/**
5521 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions
5522 * @phba: pointer to lpfc hba data structure.
5523 * @nr_vfn: number of virtual functions to be enabled.
5524 *
5525 * This function enables the PCI SR-IOV virtual functions to a physical
5526 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
5527 * enable the number of virtual functions to the physical function. As
5528 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
5529 * API call does not considered as an error condition for most of the device.
5530 **/
5531int
5532lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn)
5533{
5534 struct pci_dev *pdev = phba->pcidev;
0a96e975 5535 uint16_t max_nr_vfn;
912e3acd
JS		 5536 int rc;
5537
0a96e975
JS		 5538 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba);
5539 if (nr_vfn > max_nr_vfn) {
5540 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5541 "3057 Requested vfs (%d) greater than "
5542 "supported vfs (%d)", nr_vfn, max_nr_vfn);
5543 return -EINVAL;
5544 }
5545
912e3acd
JS		 5546 rc = pci_enable_sriov(pdev, nr_vfn);
5547 if (rc) {
5548 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5549 "2806 Failed to enable sriov on this device "
5550 "with vfn number nr_vf:%d, rc:%d\n",
5551 nr_vfn, rc);
5552 } else
5553 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5554 "2807 Successful enable sriov on this device "
5555 "with vfn number nr_vf:%d\n", nr_vfn);
5556 return rc;
5557}
5558
3772a991 5559/**
895427bd 5560 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources.
3772a991
JS		 5561 * @phba: pointer to lpfc hba data structure.
5562 *
895427bd
JS		 5563 * This routine is invoked to set up the driver internal resources before the
5564 * device specific resource setup to support the HBA device it attached to.
3772a991
JS		 5565 *
5566 * Return codes
895427bd
JS		 5567 * 0 - successful
5568 * other values - error
3772a991
JS		 5569 **/
5570static int
895427bd 5571lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
3772a991 5572{
895427bd 5573 struct lpfc_sli *psli = &phba->sli;
dea3101e 5574
2e0fef85 5575 /*
895427bd 5576 * Driver resources common to all SLI revisions
2e0fef85 5577 */
895427bd
JS		 5578 atomic_set(&phba->fast_event_count, 0);
5579 spin_lock_init(&phba->hbalock);
dea3101e 5580
895427bd
JS		 5581 /* Initialize ndlp management spinlock */
5582 spin_lock_init(&phba->ndlp_lock);
5583
5584 INIT_LIST_HEAD(&phba->port_list);
5585 INIT_LIST_HEAD(&phba->work_list);
5586 init_waitqueue_head(&phba->wait_4_mlo_m_q);
5587
5588 /* Initialize the wait queue head for the kernel thread */
5589 init_waitqueue_head(&phba->work_waitq);
5590
5591 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
f358dd0c 5592 "1403 Protocols supported %s %s %s\n",
895427bd
JS		 5593 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ?
5594 "SCSI" : " "),
5595 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ?
f358dd0c
JS		 5596 "NVME" : " "),
5597 (phba->nvmet_support ? "NVMET" : " "));
895427bd
JS		 5598
5599 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5600 /* Initialize the scsi buffer list used by driver for scsi IO */
5601 spin_lock_init(&phba->scsi_buf_list_get_lock);
5602 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get);
5603 spin_lock_init(&phba->scsi_buf_list_put_lock);
5604 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
5605 }
5606
5607 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
5608 (phba->nvmet_support == 0)) {
5609 /* Initialize the NVME buffer list used by driver for NVME IO */
5610 spin_lock_init(&phba->nvme_buf_list_get_lock);
5611 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_get);
5612 spin_lock_init(&phba->nvme_buf_list_put_lock);
5613 INIT_LIST_HEAD(&phba->lpfc_nvme_buf_list_put);
5614 }
5615
5616 /* Initialize the fabric iocb list */
5617 INIT_LIST_HEAD(&phba->fabric_iocb_list);
5618
5619 /* Initialize list to save ELS buffers */
5620 INIT_LIST_HEAD(&phba->elsbuf);
5621
5622 /* Initialize FCF connection rec list */
5623 INIT_LIST_HEAD(&phba->fcf_conn_rec_list);
5624
5625 /* Initialize OAS configuration list */
5626 spin_lock_init(&phba->devicelock);
5627 INIT_LIST_HEAD(&phba->luns);
858c9f6c 5628
3772a991 5629 /* MBOX heartbeat timer */
f22eb4d3 5630 timer_setup(&psli->mbox_tmo, lpfc_mbox_timeout, 0);
3772a991 5631 /* Fabric block timer */
f22eb4d3 5632 timer_setup(&phba->fabric_block_timer, lpfc_fabric_block_timeout, 0);
3772a991 5633 /* EA polling mode timer */
f22eb4d3 5634 timer_setup(&phba->eratt_poll, lpfc_poll_eratt, 0);
895427bd 5635 /* Heartbeat timer */
f22eb4d3 5636 timer_setup(&phba->hb_tmofunc, lpfc_hb_timeout, 0);
895427bd
JS		 5637
5638 return 0;
5639}
5640
5641/**
5642 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev
5643 * @phba: pointer to lpfc hba data structure.
5644 *
5645 * This routine is invoked to set up the driver internal resources specific to
5646 * support the SLI-3 HBA device it attached to.
5647 *
5648 * Return codes
5649 * 0 - successful
5650 * other values - error
5651 **/
5652static int
5653lpfc_sli_driver_resource_setup(struct lpfc_hba *phba)
5654{
5655 int rc;
5656
5657 /*
5658 * Initialize timers used by driver
5659 */
5660
5661 /* FCP polling mode timer */
f22eb4d3 5662 timer_setup(&phba->fcp_poll_timer, lpfc_poll_timeout, 0);
dea3101e 5663
3772a991
JS		 5664 /* Host attention work mask setup */
5665 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT);
5666 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
dea3101e 5667
3772a991
JS		 5668 /* Get all the module params for configuring this host */
5669 lpfc_get_cfgparam(phba);
895427bd
JS		 5670 /* Set up phase-1 common device driver resources */
5671
5672 rc = lpfc_setup_driver_resource_phase1(phba);
5673 if (rc)
5674 return -ENODEV;
5675
49198b37
JS		 5676 if (phba->pcidev->device == PCI_DEVICE_ID_HORNET) {
5677 phba->menlo_flag |= HBA_MENLO_SUPPORT;
5678 /* check for menlo minimum sg count */
5679 if (phba->cfg_sg_seg_cnt < LPFC_DEFAULT_MENLO_SG_SEG_CNT)
5680 phba->cfg_sg_seg_cnt = LPFC_DEFAULT_MENLO_SG_SEG_CNT;
5681 }
5682
895427bd
JS		 5683 if (!phba->sli.sli3_ring)
5684 phba->sli.sli3_ring = kzalloc(LPFC_SLI3_MAX_RING *
2a76a283 5685 sizeof(struct lpfc_sli_ring), GFP_KERNEL);
895427bd 5686 if (!phba->sli.sli3_ring)
2a76a283
JS		 5687 return -ENOMEM;
5688
dea3101e 5689 /*
96f7077f 5690 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size
3772a991 5691 * used to create the sg_dma_buf_pool must be dynamically calculated.
dea3101e 5692 */
3772a991 5693
96f7077f
JS		 5694 /* Initialize the host templates the configured values. */
5695 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96418b5e
JS		 5696 lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt;
5697 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f
JS		 5698
5699 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */
3772a991 5700 if (phba->cfg_enable_bg) {
96f7077f
JS		 5701 /*
5702 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd,
5703 * the FCP rsp, and a BDE for each. Sice we have no control
5704 * over how many protection data segments the SCSI Layer
5705 * will hand us (ie: there could be one for every block
5706 * in the IO), we just allocate enough BDEs to accomidate
5707 * our max amount and we need to limit lpfc_sg_seg_cnt to
5708 * minimize the risk of running out.
5709 */
5710 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5711 sizeof(struct fcp_rsp) +
5712 (LPFC_MAX_SG_SEG_CNT * sizeof(struct ulp_bde64));
5713
5714 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF)
5715 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF;
5716
5717 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */
5718 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT;
5719 } else {
5720 /*
5721 * The scsi_buf for a regular I/O will hold the FCP cmnd,
5722 * the FCP rsp, a BDE for each, and a BDE for up to
5723 * cfg_sg_seg_cnt data segments.
5724 */
5725 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
5726 sizeof(struct fcp_rsp) +
5727 ((phba->cfg_sg_seg_cnt + 2) * sizeof(struct ulp_bde64));
5728
5729 /* Total BDEs in BPL for scsi_sg_list */
5730 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
901a920f 5731 }
dea3101e 5732
96f7077f
JS		 5733 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5734 "9088 sg_tablesize:%d dmabuf_size:%d total_bde:%d\n",
5735 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5736 phba->cfg_total_seg_cnt);
dea3101e 5737
3772a991
JS		 5738 phba->max_vpi = LPFC_MAX_VPI;
5739 /* This will be set to correct value after config_port mbox */
5740 phba->max_vports = 0;
dea3101e 5741
3772a991
JS		 5742 /*
5743 * Initialize the SLI Layer to run with lpfc HBAs.
5744 */
5745 lpfc_sli_setup(phba);
895427bd 5746 lpfc_sli_queue_init(phba);
ed957684 5747
3772a991
JS		 5748 /* Allocate device driver memory */
5749 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ))
5750 return -ENOMEM;
51ef4c26 5751
912e3acd
JS		 5752 /*
5753 * Enable sr-iov virtual functions if supported and configured
5754 * through the module parameter.
5755 */
5756 if (phba->cfg_sriov_nr_virtfn > 0) {
5757 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
5758 phba->cfg_sriov_nr_virtfn);
5759 if (rc) {
5760 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
5761 "2808 Requested number of SR-IOV "
5762 "virtual functions (%d) is not "
5763 "supported\n",
5764 phba->cfg_sriov_nr_virtfn);
5765 phba->cfg_sriov_nr_virtfn = 0;
5766 }
5767 }
5768
3772a991
JS		 5769 return 0;
5770}
ed957684 5771
3772a991
JS		 5772/**
5773 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev
5774 * @phba: pointer to lpfc hba data structure.
5775 *
5776 * This routine is invoked to unset the driver internal resources set up
5777 * specific for supporting the SLI-3 HBA device it attached to.
5778 **/
5779static void
5780lpfc_sli_driver_resource_unset(struct lpfc_hba *phba)
5781{
5782 /* Free device driver memory allocated */
5783 lpfc_mem_free_all(phba);
3163f725 5784
3772a991
JS		 5785 return;
5786}
dea3101e 5787
3772a991 5788/**
da0436e9 5789 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev
3772a991
JS		 5790 * @phba: pointer to lpfc hba data structure.
5791 *
da0436e9
JS		 5792 * This routine is invoked to set up the driver internal resources specific to
5793 * support the SLI-4 HBA device it attached to.
3772a991
JS		 5794 *
5795 * Return codes
af901ca1 5796 * 0 - successful
da0436e9 5797 * other values - error
3772a991
JS		 5798 **/
5799static int
da0436e9 5800lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
3772a991 5801{
28baac74 5802 LPFC_MBOXQ_t *mboxq;
f358dd0c 5803 MAILBOX_t *mb;
895427bd 5804 int rc, i, max_buf_size;
28baac74
JS		 5805 uint8_t pn_page[LPFC_MAX_SUPPORTED_PAGES] = {0};
5806 struct lpfc_mqe *mqe;
09294d46 5807 int longs;
1ba981fd 5808 int fof_vectors = 0;
f358dd0c 5809 uint64_t wwn;
da0436e9 5810
895427bd
JS		 5811 phba->sli4_hba.num_online_cpu = num_online_cpus();
5812 phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
5813 phba->sli4_hba.curr_disp_cpu = 0;
5814
716d3bc5
JS		 5815 /* Get all the module params for configuring this host */
5816 lpfc_get_cfgparam(phba);
5817
895427bd
JS		 5818 /* Set up phase-1 common device driver resources */
5819 rc = lpfc_setup_driver_resource_phase1(phba);
5820 if (rc)
5821 return -ENODEV;
5822
da0436e9
JS		 5823 /* Before proceed, wait for POST done and device ready */
5824 rc = lpfc_sli4_post_status_check(phba);
5825 if (rc)
5826 return -ENODEV;
5827
3772a991 5828 /*
da0436e9 5829 * Initialize timers used by driver
3772a991 5830 */
3772a991 5831
f22eb4d3 5832 timer_setup(&phba->rrq_tmr, lpfc_rrq_timeout, 0);
3772a991 5833
ecfd03c6 5834 /* FCF rediscover timer */
f22eb4d3 5835 timer_setup(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo, 0);
ecfd03c6 5836
7ad20aa9
JS		 5837 /*
5838 * Control structure for handling external multi-buffer mailbox
5839 * command pass-through.
5840 */
5841 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0,
5842 sizeof(struct lpfc_mbox_ext_buf_ctx));
5843 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list);
5844
da0436e9 5845 phba->max_vpi = LPFC_MAX_VPI;
67d12733 5846
da0436e9
JS		 5847 /* This will be set to correct value after the read_config mbox */
5848 phba->max_vports = 0;
3772a991 5849
da0436e9
JS		 5850 /* Program the default value of vlan_id and fc_map */
5851 phba->valid_vlan = 0;
5852 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
5853 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
5854 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
3772a991 5855
2a76a283
JS		 5856 /*
5857 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands
895427bd
JS		 5858 * we will associate a new ring, for each EQ/CQ/WQ tuple.
5859 * The WQ create will allocate the ring.
2a76a283 5860 */
09294d46 5861
da0436e9 5862 /*
09294d46
JS		 5863 * It doesn't matter what family our adapter is in, we are
5864 * limited to 2 Pages, 512 SGEs, for our SGL.
5865 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp
5866 */
5867 max_buf_size = (2 * SLI4_PAGE_SIZE);
5868 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SGL_SEG_CNT - 2)
5869 phba->cfg_sg_seg_cnt = LPFC_MAX_SGL_SEG_CNT - 2;
09294d46 5870
da0436e9 5871 /*
895427bd
JS		 5872 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size
5873 * used to create the sg_dma_buf_pool must be calculated.
da0436e9 5874 */
96f7077f
JS		 5875 if (phba->cfg_enable_bg) {
5876 /*
895427bd
JS		 5877 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd,
5878 * the FCP rsp, and a SGE. Sice we have no control
5879 * over how many protection segments the SCSI Layer
96f7077f 5880 * will hand us (ie: there could be one for every block
895427bd
JS		 5881 * in the IO), just allocate enough SGEs to accomidate
5882 * our max amount and we need to limit lpfc_sg_seg_cnt
5883 * to minimize the risk of running out.
96f7077f
JS		 5884 */
5885 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd 5886 sizeof(struct fcp_rsp) + max_buf_size;
96f7077f
JS		 5887
5888 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */
5889 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT;
5890
5891 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SLI4_SEG_CNT_DIF)
895427bd
JS		 5892 phba->cfg_sg_seg_cnt =
5893 LPFC_MAX_SG_SLI4_SEG_CNT_DIF;
96f7077f
JS		 5894 } else {
5895 /*
895427bd 5896 * The scsi_buf for a regular I/O holds the FCP cmnd,
96f7077f
JS		 5897 * the FCP rsp, a SGE for each, and a SGE for up to
5898 * cfg_sg_seg_cnt data segments.
5899 */
5900 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
895427bd
JS		 5901 sizeof(struct fcp_rsp) +
5902 ((phba->cfg_sg_seg_cnt + 2) *
5903 sizeof(struct sli4_sge));
96f7077f
JS		 5904
5905 /* Total SGEs for scsi_sg_list */
5906 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
895427bd 5907
96f7077f 5908 /*
895427bd
JS		 5909 * NOTE: if (phba->cfg_sg_seg_cnt + 2) <= 256 we only
5910 * need to post 1 page for the SGL.
96f7077f 5911 */
085c647c 5912 }
acd6859b 5913
96f7077f
JS		 5914 /* Initialize the host templates with the updated values. */
5915 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
5916 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
96418b5e 5917 lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt;
96f7077f
JS		 5918
5919 if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ)
5920 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ;
5921 else
5922 phba->cfg_sg_dma_buf_size =
5923 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size);
5924
5925 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
5926 "9087 sg_tablesize:%d dmabuf_size:%d total_sge:%d\n",
5927 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
5928 phba->cfg_total_seg_cnt);
3772a991 5929
da0436e9 5930 /* Initialize buffer queue management fields */
895427bd 5931 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list);
da0436e9
JS		 5932 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc;
5933 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free;
3772a991 5934
da0436e9
JS		 5935 /*
5936 * Initialize the SLI Layer to run with lpfc SLI4 HBAs.
5937 */
895427bd
JS		 5938 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
5939 /* Initialize the Abort scsi buffer list used by driver */
5940 spin_lock_init(&phba->sli4_hba.abts_scsi_buf_list_lock);
5941 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
5942 }
5943
5944 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
5945 /* Initialize the Abort nvme buffer list used by driver */
5946 spin_lock_init(&phba->sli4_hba.abts_nvme_buf_list_lock);
5947 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
86c67379 5948 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
a8cf5dfe 5949 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list);
895427bd
JS		 5950 }
5951
da0436e9 5952 /* This abort list used by worker thread */
895427bd 5953 spin_lock_init(&phba->sli4_hba.sgl_list_lock);
a8cf5dfe 5954 spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock);
3772a991 5955
da0436e9 5956 /*
6d368e53 5957 * Initialize driver internal slow-path work queues
da0436e9 5958 */
3772a991 5959
da0436e9
JS		 5960 /* Driver internel slow-path CQ Event pool */
5961 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
5962 /* Response IOCB work queue list */
45ed1190 5963 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
da0436e9
JS		 5964 /* Asynchronous event CQ Event work queue list */
5965 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
5966 /* Fast-path XRI aborted CQ Event work queue list */
5967 INIT_LIST_HEAD(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue);
5968 /* Slow-path XRI aborted CQ Event work queue list */
5969 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
5970 /* Receive queue CQ Event work queue list */
5971 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
5972
6d368e53
JS		 5973 /* Initialize extent block lists. */
5974 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
5975 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
5976 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
5977 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list);
5978
d1f525aa
JS		 5979 /* Initialize mboxq lists. If the early init routines fail
5980 * these lists need to be correctly initialized.
5981 */
5982 INIT_LIST_HEAD(&phba->sli.mboxq);
5983 INIT_LIST_HEAD(&phba->sli.mboxq_cmpl);
5984
448193b5
JS		 5985 /* initialize optic_state to 0xFF */
5986 phba->sli4_hba.lnk_info.optic_state = 0xff;
5987
da0436e9
JS		 5988 /* Allocate device driver memory */
5989 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ);
5990 if (rc)
5991 return -ENOMEM;
5992
2fcee4bf
JS		 5993 /* IF Type 2 ports get initialized now. */
5994 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
5995 LPFC_SLI_INTF_IF_TYPE_2) {
5996 rc = lpfc_pci_function_reset(phba);
895427bd
JS		 5997 if (unlikely(rc)) {
5998 rc = -ENODEV;
5999 goto out_free_mem;
6000 }
946727dc 6001 phba->temp_sensor_support = 1;
2fcee4bf
JS		 6002 }
6003
da0436e9
JS		 6004 /* Create the bootstrap mailbox command */
6005 rc = lpfc_create_bootstrap_mbox(phba);
6006 if (unlikely(rc))
6007 goto out_free_mem;
6008
6009 /* Set up the host's endian order with the device. */
6010 rc = lpfc_setup_endian_order(phba);
6011 if (unlikely(rc))
6012 goto out_free_bsmbx;
6013
6014 /* Set up the hba's configuration parameters. */
6015 rc = lpfc_sli4_read_config(phba);
cff261f6
JS		 6016 if (unlikely(rc))
6017 goto out_free_bsmbx;
6018 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba);
da0436e9
JS		 6019 if (unlikely(rc))
6020 goto out_free_bsmbx;
6021
2fcee4bf
JS		 6022 /* IF Type 0 ports get initialized now. */
6023 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
6024 LPFC_SLI_INTF_IF_TYPE_0) {
6025 rc = lpfc_pci_function_reset(phba);
6026 if (unlikely(rc))
6027 goto out_free_bsmbx;
6028 }
da0436e9 6029
cb5172ea
JS		 6030 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
6031 GFP_KERNEL);
6032 if (!mboxq) {
6033 rc = -ENOMEM;
6034 goto out_free_bsmbx;
6035 }
6036
f358dd0c 6037 /* Check for NVMET being configured */
895427bd 6038 phba->nvmet_support = 0;
f358dd0c
JS		 6039 if (lpfc_enable_nvmet_cnt) {
6040
6041 /* First get WWN of HBA instance */
6042 lpfc_read_nv(phba, mboxq);
6043 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
6044 if (rc != MBX_SUCCESS) {
6045 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6046 "6016 Mailbox failed , mbxCmd x%x "
6047 "READ_NV, mbxStatus x%x\n",
6048 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
6049 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
d1f525aa 6050 mempool_free(mboxq, phba->mbox_mem_pool);
f358dd0c
JS		 6051 rc = -EIO;
6052 goto out_free_bsmbx;
6053 }
6054 mb = &mboxq->u.mb;
6055 memcpy(&wwn, (char *)mb->un.varRDnvp.nodename,
6056 sizeof(uint64_t));
6057 wwn = cpu_to_be64(wwn);
6058 phba->sli4_hba.wwnn.u.name = wwn;
6059 memcpy(&wwn, (char *)mb->un.varRDnvp.portname,
6060 sizeof(uint64_t));
6061 /* wwn is WWPN of HBA instance */
6062 wwn = cpu_to_be64(wwn);
6063 phba->sli4_hba.wwpn.u.name = wwn;
6064
6065 /* Check to see if it matches any module parameter */
6066 for (i = 0; i < lpfc_enable_nvmet_cnt; i++) {
6067 if (wwn == lpfc_enable_nvmet[i]) {
7d708033 6068#if (IS_ENABLED(CONFIG_NVME_TARGET_FC))
3c603be9
JS		 6069 if (lpfc_nvmet_mem_alloc(phba))
6070 break;
6071
6072 phba->nvmet_support = 1; /* a match */
6073
f358dd0c
JS		 6074 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6075 "6017 NVME Target %016llx\n",
6076 wwn);
7d708033
JS		 6077#else
6078 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6079 "6021 Can't enable NVME Target."
6080 " NVME_TARGET_FC infrastructure"
6081 " is not in kernel\n");
6082#endif
3c603be9 6083 break;
f358dd0c
JS		 6084 }
6085 }
6086 }
895427bd
JS		 6087
6088 lpfc_nvme_mod_param_dep(phba);
6089
fedd3b7b 6090 /* Get the Supported Pages if PORT_CAPABILITIES is supported by port. */
cb5172ea
JS		 6091 lpfc_supported_pages(mboxq);
6092 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
fedd3b7b
JS		 6093 if (!rc) {
6094 mqe = &mboxq->u.mqe;
6095 memcpy(&pn_page[0], ((uint8_t *)&mqe->un.supp_pages.word3),
6096 LPFC_MAX_SUPPORTED_PAGES);
6097 for (i = 0; i < LPFC_MAX_SUPPORTED_PAGES; i++) {
6098 switch (pn_page[i]) {
6099 case LPFC_SLI4_PARAMETERS:
6100 phba->sli4_hba.pc_sli4_params.supported = 1;
6101 break;
6102 default:
6103 break;
6104 }
6105 }
6106 /* Read the port's SLI4 Parameters capabilities if supported. */
6107 if (phba->sli4_hba.pc_sli4_params.supported)
6108 rc = lpfc_pc_sli4_params_get(phba, mboxq);
6109 if (rc) {
6110 mempool_free(mboxq, phba->mbox_mem_pool);
6111 rc = -EIO;
6112 goto out_free_bsmbx;
cb5172ea
JS		 6113 }
6114 }
65791f1f 6115
fedd3b7b
JS		 6116 /*
6117 * Get sli4 parameters that override parameters from Port capabilities.
6d368e53
JS		 6118 * If this call fails, it isn't critical unless the SLI4 parameters come
6119 * back in conflict.
fedd3b7b 6120 */
6d368e53
JS		 6121 rc = lpfc_get_sli4_parameters(phba, mboxq);
6122 if (rc) {
6123 if (phba->sli4_hba.extents_in_use &&
6124 phba->sli4_hba.rpi_hdrs_in_use) {
6125 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6126 "2999 Unsupported SLI4 Parameters "
6127 "Extents and RPI headers enabled.\n");
6d368e53 6128 }
895427bd 6129 mempool_free(mboxq, phba->mbox_mem_pool);
5c756065 6130 rc = -EIO;
895427bd 6131 goto out_free_bsmbx;
6d368e53 6132 }
895427bd 6133
cb5172ea 6134 mempool_free(mboxq, phba->mbox_mem_pool);
1ba981fd
JS		 6135
6136 /* Verify OAS is supported */
6137 lpfc_sli4_oas_verify(phba);
6138 if (phba->cfg_fof)
6139 fof_vectors = 1;
6140
5350d872
JS		 6141 /* Verify all the SLI4 queues */
6142 rc = lpfc_sli4_queue_verify(phba);
da0436e9
JS		 6143 if (rc)
6144 goto out_free_bsmbx;
6145
6146 /* Create driver internal CQE event pool */
6147 rc = lpfc_sli4_cq_event_pool_create(phba);
6148 if (rc)
5350d872 6149 goto out_free_bsmbx;
da0436e9 6150
8a9d2e80
JS		 6151 /* Initialize sgl lists per host */
6152 lpfc_init_sgl_list(phba);
6153
6154 /* Allocate and initialize active sgl array */
da0436e9
JS		 6155 rc = lpfc_init_active_sgl_array(phba);
6156 if (rc) {
6157 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6158 "1430 Failed to initialize sgl list.\n");
8a9d2e80 6159 goto out_destroy_cq_event_pool;
da0436e9 6160 }
da0436e9
JS		 6161 rc = lpfc_sli4_init_rpi_hdrs(phba);
6162 if (rc) {
6163 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6164 "1432 Failed to initialize rpi headers.\n");
6165 goto out_free_active_sgl;
6166 }
6167
a93ff37a 6168 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */
0c9ab6f5
JS		 6169 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG;
6170 phba->fcf.fcf_rr_bmask = kzalloc(longs * sizeof(unsigned long),
6171 GFP_KERNEL);
6172 if (!phba->fcf.fcf_rr_bmask) {
6173 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6174 "2759 Failed allocate memory for FCF round "
6175 "robin failover bmask\n");
0558056c 6176 rc = -ENOMEM;
0c9ab6f5
JS		 6177 goto out_remove_rpi_hdrs;
6178 }
6179
895427bd
JS		 6180 phba->sli4_hba.hba_eq_hdl = kcalloc(fof_vectors + phba->io_channel_irqs,
6181 sizeof(struct lpfc_hba_eq_hdl),
6182 GFP_KERNEL);
6183 if (!phba->sli4_hba.hba_eq_hdl) {
67d12733
JS		 6184 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6185 "2572 Failed allocate memory for "
6186 "fast-path per-EQ handle array\n");
6187 rc = -ENOMEM;
6188 goto out_free_fcf_rr_bmask;
da0436e9
JS		 6189 }
6190
895427bd
JS		 6191 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_present_cpu,
6192 sizeof(struct lpfc_vector_map_info),
6193 GFP_KERNEL);
7bb03bbf
JS		 6194 if (!phba->sli4_hba.cpu_map) {
6195 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6196 "3327 Failed allocate memory for msi-x "
6197 "interrupt vector mapping\n");
6198 rc = -ENOMEM;
895427bd 6199 goto out_free_hba_eq_hdl;
7bb03bbf 6200 }
b246de17 6201 if (lpfc_used_cpu == NULL) {
895427bd
JS		 6202 lpfc_used_cpu = kcalloc(lpfc_present_cpu, sizeof(uint16_t),
6203 GFP_KERNEL);
b246de17
JS		 6204 if (!lpfc_used_cpu) {
6205 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6206 "3335 Failed allocate memory for msi-x "
6207 "interrupt vector mapping\n");
6208 kfree(phba->sli4_hba.cpu_map);
6209 rc = -ENOMEM;
895427bd 6210 goto out_free_hba_eq_hdl;
b246de17
JS		 6211 }
6212 for (i = 0; i < lpfc_present_cpu; i++)
6213 lpfc_used_cpu[i] = LPFC_VECTOR_MAP_EMPTY;
6214 }
6215
912e3acd
JS		 6216 /*
6217 * Enable sr-iov virtual functions if supported and configured
6218 * through the module parameter.
6219 */
6220 if (phba->cfg_sriov_nr_virtfn > 0) {
6221 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
6222 phba->cfg_sriov_nr_virtfn);
6223 if (rc) {
6224 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6225 "3020 Requested number of SR-IOV "
6226 "virtual functions (%d) is not "
6227 "supported\n",
6228 phba->cfg_sriov_nr_virtfn);
6229 phba->cfg_sriov_nr_virtfn = 0;
6230 }
6231 }
6232
5248a749 6233 return 0;
da0436e9 6234
895427bd
JS		 6235out_free_hba_eq_hdl:
6236 kfree(phba->sli4_hba.hba_eq_hdl);
0c9ab6f5
JS		 6237out_free_fcf_rr_bmask:
6238 kfree(phba->fcf.fcf_rr_bmask);
da0436e9
JS		 6239out_remove_rpi_hdrs:
6240 lpfc_sli4_remove_rpi_hdrs(phba);
6241out_free_active_sgl:
6242 lpfc_free_active_sgl(phba);
da0436e9
JS		 6243out_destroy_cq_event_pool:
6244 lpfc_sli4_cq_event_pool_destroy(phba);
da0436e9
JS		 6245out_free_bsmbx:
6246 lpfc_destroy_bootstrap_mbox(phba);
6247out_free_mem:
6248 lpfc_mem_free(phba);
6249 return rc;
6250}
6251
6252/**
6253 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev
6254 * @phba: pointer to lpfc hba data structure.
6255 *
6256 * This routine is invoked to unset the driver internal resources set up
6257 * specific for supporting the SLI-4 HBA device it attached to.
6258 **/
6259static void
6260lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
6261{
6262 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry;
6263
7bb03bbf
JS		 6264 /* Free memory allocated for msi-x interrupt vector to CPU mapping */
6265 kfree(phba->sli4_hba.cpu_map);
6266 phba->sli4_hba.num_present_cpu = 0;
6267 phba->sli4_hba.num_online_cpu = 0;
76fd07a6 6268 phba->sli4_hba.curr_disp_cpu = 0;
7bb03bbf 6269
da0436e9 6270 /* Free memory allocated for fast-path work queue handles */
895427bd 6271 kfree(phba->sli4_hba.hba_eq_hdl);
da0436e9
JS		 6272
6273 /* Free the allocated rpi headers. */
6274 lpfc_sli4_remove_rpi_hdrs(phba);
d11e31dd 6275 lpfc_sli4_remove_rpis(phba);
da0436e9 6276
0c9ab6f5
JS		 6277 /* Free eligible FCF index bmask */
6278 kfree(phba->fcf.fcf_rr_bmask);
6279
da0436e9
JS		 6280 /* Free the ELS sgl list */
6281 lpfc_free_active_sgl(phba);
8a9d2e80 6282 lpfc_free_els_sgl_list(phba);
f358dd0c 6283 lpfc_free_nvmet_sgl_list(phba);
da0436e9 6284
da0436e9
JS		 6285 /* Free the completion queue EQ event pool */
6286 lpfc_sli4_cq_event_release_all(phba);
6287 lpfc_sli4_cq_event_pool_destroy(phba);
6288
6d368e53
JS		 6289 /* Release resource identifiers. */
6290 lpfc_sli4_dealloc_resource_identifiers(phba);
6291
da0436e9
JS		 6292 /* Free the bsmbx region. */
6293 lpfc_destroy_bootstrap_mbox(phba);
6294
6295 /* Free the SLI Layer memory with SLI4 HBAs */
6296 lpfc_mem_free_all(phba);
6297
6298 /* Free the current connect table */
6299 list_for_each_entry_safe(conn_entry, next_conn_entry,
4d9ab994
JS		 6300 &phba->fcf_conn_rec_list, list) {
6301 list_del_init(&conn_entry->list);
da0436e9 6302 kfree(conn_entry);
4d9ab994 6303 }
da0436e9
JS		 6304
6305 return;
6306}
6307
6308/**
25985edc 6309 * lpfc_init_api_table_setup - Set up init api function jump table
da0436e9
JS		 6310 * @phba: The hba struct for which this call is being executed.
6311 * @dev_grp: The HBA PCI-Device group number.
6312 *
6313 * This routine sets up the device INIT interface API function jump table
6314 * in @phba struct.
6315 *
6316 * Returns: 0 - success, -ENODEV - failure.
6317 **/
6318int
6319lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
6320{
84d1b006
JS		 6321 phba->lpfc_hba_init_link = lpfc_hba_init_link;
6322 phba->lpfc_hba_down_link = lpfc_hba_down_link;
7f86059a 6323 phba->lpfc_selective_reset = lpfc_selective_reset;
da0436e9
JS		 6324 switch (dev_grp) {
6325 case LPFC_PCI_DEV_LP:
6326 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3;
6327 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3;
6328 phba->lpfc_stop_port = lpfc_stop_port_s3;
6329 break;
6330 case LPFC_PCI_DEV_OC:
6331 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4;
6332 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4;
6333 phba->lpfc_stop_port = lpfc_stop_port_s4;
6334 break;
6335 default:
6336 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6337 "1431 Invalid HBA PCI-device group: 0x%x\n",
6338 dev_grp);
6339 return -ENODEV;
6340 break;
6341 }
6342 return 0;
6343}
6344
da0436e9
JS		 6345/**
6346 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources.
6347 * @phba: pointer to lpfc hba data structure.
6348 *
6349 * This routine is invoked to set up the driver internal resources after the
6350 * device specific resource setup to support the HBA device it attached to.
6351 *
6352 * Return codes
af901ca1 6353 * 0 - successful
da0436e9
JS		 6354 * other values - error
6355 **/
6356static int
6357lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba)
6358{
6359 int error;
6360
6361 /* Startup the kernel thread for this host adapter. */
6362 phba->worker_thread = kthread_run(lpfc_do_work, phba,
6363 "lpfc_worker_%d", phba->brd_no);
6364 if (IS_ERR(phba->worker_thread)) {
6365 error = PTR_ERR(phba->worker_thread);
6366 return error;
3772a991
JS		 6367 }
6368
f485c18d
DK		 6369 /* workqueue for deferred irq use */
6370 phba->wq = alloc_workqueue("lpfc_wq", WQ_MEM_RECLAIM, 0);
6371
3772a991
JS		 6372 return 0;
6373}
6374
6375/**
6376 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources.
6377 * @phba: pointer to lpfc hba data structure.
6378 *
6379 * This routine is invoked to unset the driver internal resources set up after
6380 * the device specific resource setup for supporting the HBA device it
6381 * attached to.
6382 **/
6383static void
6384lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba)
6385{
f485c18d
DK		 6386 if (phba->wq) {
6387 flush_workqueue(phba->wq);
6388 destroy_workqueue(phba->wq);
6389 phba->wq = NULL;
6390 }
6391
3772a991
JS		 6392 /* Stop kernel worker thread */
6393 kthread_stop(phba->worker_thread);
6394}
6395
6396/**
6397 * lpfc_free_iocb_list - Free iocb list.
6398 * @phba: pointer to lpfc hba data structure.
6399 *
6400 * This routine is invoked to free the driver's IOCB list and memory.
6401 **/
6c621a22 6402void
3772a991
JS		 6403lpfc_free_iocb_list(struct lpfc_hba *phba)
6404{
6405 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
6406
6407 spin_lock_irq(&phba->hbalock);
6408 list_for_each_entry_safe(iocbq_entry, iocbq_next,
6409 &phba->lpfc_iocb_list, list) {
6410 list_del(&iocbq_entry->list);
6411 kfree(iocbq_entry);
6412 phba->total_iocbq_bufs--;
98c9ea5c 6413 }
3772a991
JS		 6414 spin_unlock_irq(&phba->hbalock);
6415
6416 return;
6417}
6418
6419/**
6420 * lpfc_init_iocb_list - Allocate and initialize iocb list.
6421 * @phba: pointer to lpfc hba data structure.
6422 *
6423 * This routine is invoked to allocate and initizlize the driver's IOCB
6424 * list and set up the IOCB tag array accordingly.
6425 *
6426 * Return codes
af901ca1 6427 * 0 - successful
3772a991
JS		 6428 * other values - error
6429 **/
6c621a22 6430int
3772a991
JS		 6431lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count)
6432{
6433 struct lpfc_iocbq *iocbq_entry = NULL;
6434 uint16_t iotag;
6435 int i;
dea3101e 6436
6437 /* Initialize and populate the iocb list per host. */
6438 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
3772a991 6439 for (i = 0; i < iocb_count; i++) {
dd00cc48 6440 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
dea3101e 6441 if (iocbq_entry == NULL) {
6442 printk(KERN_ERR "%s: only allocated %d iocbs of "
6443 "expected %d count. Unloading driver.\n",
cadbd4a5 6444 __func__, i, LPFC_IOCB_LIST_CNT);
dea3101e 6445 goto out_free_iocbq;
6446 }
6447
604a3e30
JB		 6448 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
6449 if (iotag == 0) {
3772a991 6450 kfree(iocbq_entry);
604a3e30 6451 printk(KERN_ERR "%s: failed to allocate IOTAG. "
3772a991 6452 "Unloading driver.\n", __func__);
604a3e30
JB		 6453 goto out_free_iocbq;
6454 }
6d368e53 6455 iocbq_entry->sli4_lxritag = NO_XRI;
3772a991 6456 iocbq_entry->sli4_xritag = NO_XRI;
2e0fef85
JS		 6457
6458 spin_lock_irq(&phba->hbalock);
dea3101e 6459 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
6460 phba->total_iocbq_bufs++;
2e0fef85 6461 spin_unlock_irq(&phba->hbalock);
dea3101e 6462 }
6463
3772a991 6464 return 0;
dea3101e 6465
3772a991
JS		 6466out_free_iocbq:
6467 lpfc_free_iocb_list(phba);
dea3101e 6468
3772a991
JS		 6469 return -ENOMEM;
6470}
5e9d9b82 6471
3772a991 6472/**
8a9d2e80 6473 * lpfc_free_sgl_list - Free a given sgl list.
da0436e9 6474 * @phba: pointer to lpfc hba data structure.
8a9d2e80 6475 * @sglq_list: pointer to the head of sgl list.
3772a991 6476 *
8a9d2e80 6477 * This routine is invoked to free a give sgl list and memory.
3772a991 6478 **/
8a9d2e80
JS		 6479void
6480lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list)
3772a991 6481{
da0436e9 6482 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8a9d2e80
JS		 6483
6484 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) {
6485 list_del(&sglq_entry->list);
6486 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys);
6487 kfree(sglq_entry);
6488 }
6489}
6490
6491/**
6492 * lpfc_free_els_sgl_list - Free els sgl list.
6493 * @phba: pointer to lpfc hba data structure.
6494 *
6495 * This routine is invoked to free the driver's els sgl list and memory.
6496 **/
6497static void
6498lpfc_free_els_sgl_list(struct lpfc_hba *phba)
6499{
da0436e9 6500 LIST_HEAD(sglq_list);
dea3101e 6501
8a9d2e80 6502 /* Retrieve all els sgls from driver list */
da0436e9 6503 spin_lock_irq(&phba->hbalock);
895427bd
JS		 6504 spin_lock(&phba->sli4_hba.sgl_list_lock);
6505 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list);
6506 spin_unlock(&phba->sli4_hba.sgl_list_lock);
da0436e9 6507 spin_unlock_irq(&phba->hbalock);
dea3101e 6508
8a9d2e80
JS		 6509 /* Now free the sgl list */
6510 lpfc_free_sgl_list(phba, &sglq_list);
da0436e9 6511}
92d7f7b0 6512
f358dd0c
JS		 6513/**
6514 * lpfc_free_nvmet_sgl_list - Free nvmet sgl list.
6515 * @phba: pointer to lpfc hba data structure.
6516 *
6517 * This routine is invoked to free the driver's nvmet sgl list and memory.
6518 **/
6519static void
6520lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba)
6521{
6522 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
6523 LIST_HEAD(sglq_list);
6524
6525 /* Retrieve all nvmet sgls from driver list */
6526 spin_lock_irq(&phba->hbalock);
6527 spin_lock(&phba->sli4_hba.sgl_list_lock);
6528 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list);
6529 spin_unlock(&phba->sli4_hba.sgl_list_lock);
6530 spin_unlock_irq(&phba->hbalock);
6531
6532 /* Now free the sgl list */
6533 list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) {
6534 list_del(&sglq_entry->list);
6535 lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys);
6536 kfree(sglq_entry);
6537 }
4b40d02b
DK		 6538
6539 /* Update the nvmet_xri_cnt to reflect no current sgls.
6540 * The next initialization cycle sets the count and allocates
6541 * the sgls over again.
6542 */
6543 phba->sli4_hba.nvmet_xri_cnt = 0;
f358dd0c
JS		 6544}
6545
da0436e9
JS		 6546/**
6547 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs.
6548 * @phba: pointer to lpfc hba data structure.
6549 *
6550 * This routine is invoked to allocate the driver's active sgl memory.
6551 * This array will hold the sglq_entry's for active IOs.
6552 **/
6553static int
6554lpfc_init_active_sgl_array(struct lpfc_hba *phba)
6555{
6556 int size;
6557 size = sizeof(struct lpfc_sglq *);
6558 size *= phba->sli4_hba.max_cfg_param.max_xri;
6559
6560 phba->sli4_hba.lpfc_sglq_active_list =
6561 kzalloc(size, GFP_KERNEL);
6562 if (!phba->sli4_hba.lpfc_sglq_active_list)
6563 return -ENOMEM;
6564 return 0;
3772a991
JS		 6565}
6566
6567/**
da0436e9 6568 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs.
3772a991
JS		 6569 * @phba: pointer to lpfc hba data structure.
6570 *
da0436e9
JS		 6571 * This routine is invoked to walk through the array of active sglq entries
6572 * and free all of the resources.
6573 * This is just a place holder for now.
3772a991
JS		 6574 **/
6575static void
da0436e9 6576lpfc_free_active_sgl(struct lpfc_hba *phba)
3772a991 6577{
da0436e9 6578 kfree(phba->sli4_hba.lpfc_sglq_active_list);
3772a991
JS		 6579}
6580
6581/**
da0436e9 6582 * lpfc_init_sgl_list - Allocate and initialize sgl list.
3772a991
JS		 6583 * @phba: pointer to lpfc hba data structure.
6584 *
da0436e9
JS		 6585 * This routine is invoked to allocate and initizlize the driver's sgl
6586 * list and set up the sgl xritag tag array accordingly.
3772a991 6587 *
3772a991 6588 **/
8a9d2e80 6589static void
da0436e9 6590lpfc_init_sgl_list(struct lpfc_hba *phba)
3772a991 6591{
da0436e9 6592 /* Initialize and populate the sglq list per host/VF. */
895427bd 6593 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list);
da0436e9 6594 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c 6595 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list);
86c67379 6596 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
da0436e9 6597
8a9d2e80
JS		 6598 /* els xri-sgl book keeping */
6599 phba->sli4_hba.els_xri_cnt = 0;
0ff10d46 6600
8a9d2e80 6601 /* scsi xri-buffer book keeping */
da0436e9 6602 phba->sli4_hba.scsi_xri_cnt = 0;
895427bd
JS		 6603
6604 /* nvme xri-buffer book keeping */
6605 phba->sli4_hba.nvme_xri_cnt = 0;
da0436e9
JS		 6606}
6607
6608/**
6609 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port
6610 * @phba: pointer to lpfc hba data structure.
6611 *
6612 * This routine is invoked to post rpi header templates to the
88a2cfbb 6613 * port for those SLI4 ports that do not support extents. This routine
da0436e9 6614 * posts a PAGE_SIZE memory region to the port to hold up to
88a2cfbb
JS		 6615 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine
6616 * and should be called only when interrupts are disabled.
da0436e9
JS		 6617 *
6618 * Return codes
af901ca1 6619 * 0 - successful
88a2cfbb 6620 * -ERROR - otherwise.
da0436e9
JS		 6621 **/
6622int
6623lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba)
6624{
6625 int rc = 0;
da0436e9
JS		 6626 struct lpfc_rpi_hdr *rpi_hdr;
6627
6628 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
ff78d8f9 6629 if (!phba->sli4_hba.rpi_hdrs_in_use)
6d368e53 6630 return rc;
6d368e53
JS		 6631 if (phba->sli4_hba.extents_in_use)
6632 return -EIO;
da0436e9
JS		 6633
6634 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
6635 if (!rpi_hdr) {
6636 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
6637 "0391 Error during rpi post operation\n");
6638 lpfc_sli4_remove_rpis(phba);
6639 rc = -ENODEV;
6640 }
6641
6642 return rc;
6643}
6644
6645/**
6646 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region
6647 * @phba: pointer to lpfc hba data structure.
6648 *
6649 * This routine is invoked to allocate a single 4KB memory region to
6650 * support rpis and stores them in the phba. This single region
6651 * provides support for up to 64 rpis. The region is used globally
6652 * by the device.
6653 *
6654 * Returns:
6655 * A valid rpi hdr on success.
6656 * A NULL pointer on any failure.
6657 **/
6658struct lpfc_rpi_hdr *
6659lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba)
6660{
6661 uint16_t rpi_limit, curr_rpi_range;
6662 struct lpfc_dmabuf *dmabuf;
6663 struct lpfc_rpi_hdr *rpi_hdr;
6664
6d368e53
JS		 6665 /*
6666 * If the SLI4 port supports extents, posting the rpi header isn't
6667 * required. Set the expected maximum count and let the actual value
6668 * get set when extents are fully allocated.
6669 */
6670 if (!phba->sli4_hba.rpi_hdrs_in_use)
6671 return NULL;
6672 if (phba->sli4_hba.extents_in_use)
6673 return NULL;
6674
6675 /* The limit on the logical index is just the max_rpi count. */
845d9e8d 6676 rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi;
da0436e9
JS		 6677
6678 spin_lock_irq(&phba->hbalock);
6d368e53
JS		 6679 /*
6680 * Establish the starting RPI in this header block. The starting
6681 * rpi is normalized to a zero base because the physical rpi is
6682 * port based.
6683 */
97f2ecf1 6684 curr_rpi_range = phba->sli4_hba.next_rpi;
da0436e9
JS		 6685 spin_unlock_irq(&phba->hbalock);
6686
845d9e8d
JS		 6687 /* Reached full RPI range */
6688 if (curr_rpi_range == rpi_limit)
6d368e53 6689 return NULL;
845d9e8d 6690
da0436e9
JS		 6691 /*
6692 * First allocate the protocol header region for the port. The
6693 * port expects a 4KB DMA-mapped memory region that is 4K aligned.
6694 */
6695 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
6696 if (!dmabuf)
6697 return NULL;
6698
1aee383d
JP		 6699 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev,
6700 LPFC_HDR_TEMPLATE_SIZE,
6701 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS		 6702 if (!dmabuf->virt) {
6703 rpi_hdr = NULL;
6704 goto err_free_dmabuf;
6705 }
6706
da0436e9
JS		 6707 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) {
6708 rpi_hdr = NULL;
6709 goto err_free_coherent;
6710 }
6711
6712 /* Save the rpi header data for cleanup later. */
6713 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL);
6714 if (!rpi_hdr)
6715 goto err_free_coherent;
6716
6717 rpi_hdr->dmabuf = dmabuf;
6718 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE;
6719 rpi_hdr->page_count = 1;
6720 spin_lock_irq(&phba->hbalock);
6d368e53
JS		 6721
6722 /* The rpi_hdr stores the logical index only. */
6723 rpi_hdr->start_rpi = curr_rpi_range;
845d9e8d 6724 rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT;
da0436e9
JS		 6725 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
6726
da0436e9
JS		 6727 spin_unlock_irq(&phba->hbalock);
6728 return rpi_hdr;
6729
6730 err_free_coherent:
6731 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE,
6732 dmabuf->virt, dmabuf->phys);
6733 err_free_dmabuf:
6734 kfree(dmabuf);
6735 return NULL;
6736}
6737
6738/**
6739 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions
6740 * @phba: pointer to lpfc hba data structure.
6741 *
6742 * This routine is invoked to remove all memory resources allocated
6d368e53
JS		 6743 * to support rpis for SLI4 ports not supporting extents. This routine
6744 * presumes the caller has released all rpis consumed by fabric or port
6745 * logins and is prepared to have the header pages removed.
da0436e9
JS		 6746 **/
6747void
6748lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba)
6749{
6750 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr;
6751
6d368e53
JS		 6752 if (!phba->sli4_hba.rpi_hdrs_in_use)
6753 goto exit;
6754
da0436e9
JS		 6755 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr,
6756 &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
6757 list_del(&rpi_hdr->list);
6758 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len,
6759 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys);
6760 kfree(rpi_hdr->dmabuf);
6761 kfree(rpi_hdr);
6762 }
6d368e53
JS		 6763 exit:
6764 /* There are no rpis available to the port now. */
6765 phba->sli4_hba.next_rpi = 0;
da0436e9
JS		 6766}
6767
6768/**
6769 * lpfc_hba_alloc - Allocate driver hba data structure for a device.
6770 * @pdev: pointer to pci device data structure.
6771 *
6772 * This routine is invoked to allocate the driver hba data structure for an
6773 * HBA device. If the allocation is successful, the phba reference to the
6774 * PCI device data structure is set.
6775 *
6776 * Return codes
af901ca1 6777 * pointer to @phba - successful
da0436e9
JS		 6778 * NULL - error
6779 **/
6780static struct lpfc_hba *
6781lpfc_hba_alloc(struct pci_dev *pdev)
6782{
6783 struct lpfc_hba *phba;
6784
6785 /* Allocate memory for HBA structure */
6786 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL);
6787 if (!phba) {
e34ccdfe 6788 dev_err(&pdev->dev, "failed to allocate hba struct\n");
da0436e9
JS		 6789 return NULL;
6790 }
6791
6792 /* Set reference to PCI device in HBA structure */
6793 phba->pcidev = pdev;
6794
6795 /* Assign an unused board number */
6796 phba->brd_no = lpfc_get_instance();
6797 if (phba->brd_no < 0) {
6798 kfree(phba);
6799 return NULL;
6800 }
65791f1f 6801 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL;
da0436e9 6802
4fede78f 6803 spin_lock_init(&phba->ct_ev_lock);
f1c3b0fc
JS		 6804 INIT_LIST_HEAD(&phba->ct_ev_waiters);
6805
da0436e9
JS		 6806 return phba;
6807}
6808
6809/**
6810 * lpfc_hba_free - Free driver hba data structure with a device.
6811 * @phba: pointer to lpfc hba data structure.
6812 *
6813 * This routine is invoked to free the driver hba data structure with an
6814 * HBA device.
6815 **/
6816static void
6817lpfc_hba_free(struct lpfc_hba *phba)
6818{
6819 /* Release the driver assigned board number */
6820 idr_remove(&lpfc_hba_index, phba->brd_no);
6821
895427bd
JS		 6822 /* Free memory allocated with sli3 rings */
6823 kfree(phba->sli.sli3_ring);
6824 phba->sli.sli3_ring = NULL;
2a76a283 6825
da0436e9
JS		 6826 kfree(phba);
6827 return;
6828}
6829
6830/**
6831 * lpfc_create_shost - Create hba physical port with associated scsi host.
6832 * @phba: pointer to lpfc hba data structure.
6833 *
6834 * This routine is invoked to create HBA physical port and associate a SCSI
6835 * host with it.
6836 *
6837 * Return codes
af901ca1 6838 * 0 - successful
da0436e9
JS		 6839 * other values - error
6840 **/
6841static int
6842lpfc_create_shost(struct lpfc_hba *phba)
6843{
6844 struct lpfc_vport *vport;
6845 struct Scsi_Host *shost;
6846
6847 /* Initialize HBA FC structure */
6848 phba->fc_edtov = FF_DEF_EDTOV;
6849 phba->fc_ratov = FF_DEF_RATOV;
6850 phba->fc_altov = FF_DEF_ALTOV;
6851 phba->fc_arbtov = FF_DEF_ARBTOV;
6852
d7c47992 6853 atomic_set(&phba->sdev_cnt, 0);
2cee7808
JS		 6854 atomic_set(&phba->fc4ScsiInputRequests, 0);
6855 atomic_set(&phba->fc4ScsiOutputRequests, 0);
6856 atomic_set(&phba->fc4ScsiControlRequests, 0);
6857 atomic_set(&phba->fc4ScsiIoCmpls, 0);
6858 atomic_set(&phba->fc4NvmeInputRequests, 0);
6859 atomic_set(&phba->fc4NvmeOutputRequests, 0);
6860 atomic_set(&phba->fc4NvmeControlRequests, 0);
6861 atomic_set(&phba->fc4NvmeIoCmpls, 0);
6862 atomic_set(&phba->fc4NvmeLsRequests, 0);
6863 atomic_set(&phba->fc4NvmeLsCmpls, 0);
da0436e9
JS		 6864 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev);
6865 if (!vport)
6866 return -ENODEV;
6867
6868 shost = lpfc_shost_from_vport(vport);
6869 phba->pport = vport;
2ea259ee 6870
f358dd0c
JS		 6871 if (phba->nvmet_support) {
6872 /* Only 1 vport (pport) will support NVME target */
6873 if (phba->txrdy_payload_pool == NULL) {
771db5c0
RP		 6874 phba->txrdy_payload_pool = dma_pool_create(
6875 "txrdy_pool", &phba->pcidev->dev,
f358dd0c
JS		 6876 TXRDY_PAYLOAD_LEN, 16, 0);
6877 if (phba->txrdy_payload_pool) {
6878 phba->targetport = NULL;
6879 phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME;
6880 lpfc_printf_log(phba, KERN_INFO,
6881 LOG_INIT | LOG_NVME_DISC,
6882 "6076 NVME Target Found\n");
6883 }
6884 }
6885 }
6886
da0436e9
JS		 6887 lpfc_debugfs_initialize(vport);
6888 /* Put reference to SCSI host to driver's device private data */
6889 pci_set_drvdata(phba->pcidev, shost);
2e0fef85 6890
4258e98e
JS		 6891 /*
6892 * At this point we are fully registered with PSA. In addition,
6893 * any initial discovery should be completed.
6894 */
6895 vport->load_flag |= FC_ALLOW_FDMI;
8663cbbe
JS		 6896 if (phba->cfg_enable_SmartSAN ||
6897 (phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT)) {
4258e98e
JS		 6898
6899 /* Setup appropriate attribute masks */
6900 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR;
8663cbbe 6901 if (phba->cfg_enable_SmartSAN)
4258e98e
JS		 6902 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR;
6903 else
6904 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR;
6905 }
3772a991
JS		 6906 return 0;
6907}
db2378e0 6908
3772a991
JS		 6909/**
6910 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host.
6911 * @phba: pointer to lpfc hba data structure.
6912 *
6913 * This routine is invoked to destroy HBA physical port and the associated
6914 * SCSI host.
6915 **/
6916static void
6917lpfc_destroy_shost(struct lpfc_hba *phba)
6918{
6919 struct lpfc_vport *vport = phba->pport;
6920
6921 /* Destroy physical port that associated with the SCSI host */
6922 destroy_port(vport);
6923
6924 return;
6925}
6926
6927/**
6928 * lpfc_setup_bg - Setup Block guard structures and debug areas.
6929 * @phba: pointer to lpfc hba data structure.
6930 * @shost: the shost to be used to detect Block guard settings.
6931 *
6932 * This routine sets up the local Block guard protocol settings for @shost.
6933 * This routine also allocates memory for debugging bg buffers.
6934 **/
6935static void
6936lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost)
6937{
bbeb79b9
JS		 6938 uint32_t old_mask;
6939 uint32_t old_guard;
6940
3772a991 6941 int pagecnt = 10;
b3b98b74 6942 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
3772a991
JS		 6943 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
6944 "1478 Registering BlockGuard with the "
6945 "SCSI layer\n");
bbeb79b9 6946
b3b98b74
JS		 6947 old_mask = phba->cfg_prot_mask;
6948 old_guard = phba->cfg_prot_guard;
bbeb79b9
JS		 6949
6950 /* Only allow supported values */
b3b98b74 6951 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION |
bbeb79b9
JS		 6952 SHOST_DIX_TYPE0_PROTECTION |
6953 SHOST_DIX_TYPE1_PROTECTION);
b3b98b74
JS		 6954 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP |
6955 SHOST_DIX_GUARD_CRC);
bbeb79b9
JS		 6956
6957 /* DIF Type 1 protection for profiles AST1/C1 is end to end */
b3b98b74
JS		 6958 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION)
6959 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION;
bbeb79b9 6960
b3b98b74
JS		 6961 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
6962 if ((old_mask != phba->cfg_prot_mask) ||
6963 (old_guard != phba->cfg_prot_guard))
bbeb79b9
JS		 6964 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6965 "1475 Registering BlockGuard with the "
6966 "SCSI layer: mask %d guard %d\n",
b3b98b74
JS		 6967 phba->cfg_prot_mask,
6968 phba->cfg_prot_guard);
bbeb79b9 6969
b3b98b74
JS		 6970 scsi_host_set_prot(shost, phba->cfg_prot_mask);
6971 scsi_host_set_guard(shost, phba->cfg_prot_guard);
bbeb79b9
JS		 6972 } else
6973 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6974 "1479 Not Registering BlockGuard with the SCSI "
6975 "layer, Bad protection parameters: %d %d\n",
6976 old_mask, old_guard);
3772a991 6977 }
bbeb79b9 6978
3772a991
JS		 6979 if (!_dump_buf_data) {
6980 while (pagecnt) {
6981 spin_lock_init(&_dump_buf_lock);
6982 _dump_buf_data =
6983 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
6984 if (_dump_buf_data) {
6a9c52cf
JS		 6985 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6986 "9043 BLKGRD: allocated %d pages for "
3772a991
JS		 6987 "_dump_buf_data at 0x%p\n",
6988 (1 << pagecnt), _dump_buf_data);
6989 _dump_buf_data_order = pagecnt;
6990 memset(_dump_buf_data, 0,
6991 ((1 << PAGE_SHIFT) << pagecnt));
6992 break;
6993 } else
6994 --pagecnt;
6995 }
6996 if (!_dump_buf_data_order)
6a9c52cf
JS		 6997 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
6998 "9044 BLKGRD: ERROR unable to allocate "
3772a991
JS		 6999 "memory for hexdump\n");
7000 } else
6a9c52cf
JS		 7001 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7002 "9045 BLKGRD: already allocated _dump_buf_data=0x%p"
3772a991
JS		 7003 "\n", _dump_buf_data);
7004 if (!_dump_buf_dif) {
7005 while (pagecnt) {
7006 _dump_buf_dif =
7007 (char *) __get_free_pages(GFP_KERNEL, pagecnt);
7008 if (_dump_buf_dif) {
6a9c52cf
JS		 7009 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7010 "9046 BLKGRD: allocated %d pages for "
3772a991
JS		 7011 "_dump_buf_dif at 0x%p\n",
7012 (1 << pagecnt), _dump_buf_dif);
7013 _dump_buf_dif_order = pagecnt;
7014 memset(_dump_buf_dif, 0,
7015 ((1 << PAGE_SHIFT) << pagecnt));
7016 break;
7017 } else
7018 --pagecnt;
7019 }
7020 if (!_dump_buf_dif_order)
6a9c52cf
JS		 7021 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7022 "9047 BLKGRD: ERROR unable to allocate "
3772a991
JS		 7023 "memory for hexdump\n");
7024 } else
6a9c52cf
JS		 7025 lpfc_printf_log(phba, KERN_ERR, LOG_BG,
7026 "9048 BLKGRD: already allocated _dump_buf_dif=0x%p\n",
3772a991
JS		 7027 _dump_buf_dif);
7028}
7029
7030/**
7031 * lpfc_post_init_setup - Perform necessary device post initialization setup.
7032 * @phba: pointer to lpfc hba data structure.
7033 *
7034 * This routine is invoked to perform all the necessary post initialization
7035 * setup for the device.
7036 **/
7037static void
7038lpfc_post_init_setup(struct lpfc_hba *phba)
7039{
7040 struct Scsi_Host *shost;
7041 struct lpfc_adapter_event_header adapter_event;
7042
7043 /* Get the default values for Model Name and Description */
7044 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
7045
7046 /*
7047 * hba setup may have changed the hba_queue_depth so we need to
7048 * adjust the value of can_queue.
7049 */
7050 shost = pci_get_drvdata(phba->pcidev);
7051 shost->can_queue = phba->cfg_hba_queue_depth - 10;
7052 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED)
7053 lpfc_setup_bg(phba, shost);
7054
7055 lpfc_host_attrib_init(shost);
7056
7057 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
7058 spin_lock_irq(shost->host_lock);
7059 lpfc_poll_start_timer(phba);
7060 spin_unlock_irq(shost->host_lock);
7061 }
7062
7063 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7064 "0428 Perform SCSI scan\n");
7065 /* Send board arrival event to upper layer */
7066 adapter_event.event_type = FC_REG_ADAPTER_EVENT;
7067 adapter_event.subcategory = LPFC_EVENT_ARRIVAL;
7068 fc_host_post_vendor_event(shost, fc_get_event_number(),
7069 sizeof(adapter_event),
7070 (char *) &adapter_event,
7071 LPFC_NL_VENDOR_ID);
7072 return;
7073}
7074
7075/**
7076 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space.
7077 * @phba: pointer to lpfc hba data structure.
7078 *
7079 * This routine is invoked to set up the PCI device memory space for device
7080 * with SLI-3 interface spec.
7081 *
7082 * Return codes
af901ca1 7083 * 0 - successful
3772a991
JS		 7084 * other values - error
7085 **/
7086static int
7087lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
7088{
7089 struct pci_dev *pdev;
7090 unsigned long bar0map_len, bar2map_len;
7091 int i, hbq_count;
7092 void *ptr;
7093 int error = -ENODEV;
7094
7095 /* Obtain PCI device reference */
7096 if (!phba->pcidev)
7097 return error;
7098 else
7099 pdev = phba->pcidev;
7100
7101 /* Set the device DMA mask size */
8e68597d
MR		 7102 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
7103 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
7104 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
7105 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
3772a991 7106 return error;
8e68597d
MR		 7107 }
7108 }
3772a991
JS		 7109
7110 /* Get the bus address of Bar0 and Bar2 and the number of bytes
7111 * required by each mapping.
7112 */
7113 phba->pci_bar0_map = pci_resource_start(pdev, 0);
7114 bar0map_len = pci_resource_len(pdev, 0);
7115
7116 phba->pci_bar2_map = pci_resource_start(pdev, 2);
7117 bar2map_len = pci_resource_len(pdev, 2);
7118
7119 /* Map HBA SLIM to a kernel virtual address. */
7120 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
7121 if (!phba->slim_memmap_p) {
7122 dev_printk(KERN_ERR, &pdev->dev,
7123 "ioremap failed for SLIM memory.\n");
7124 goto out;
7125 }
7126
7127 /* Map HBA Control Registers to a kernel virtual address. */
7128 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
7129 if (!phba->ctrl_regs_memmap_p) {
7130 dev_printk(KERN_ERR, &pdev->dev,
7131 "ioremap failed for HBA control registers.\n");
7132 goto out_iounmap_slim;
7133 }
7134
7135 /* Allocate memory for SLI-2 structures */
1aee383d
JP		 7136 phba->slim2p.virt = dma_zalloc_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7137 &phba->slim2p.phys, GFP_KERNEL);
3772a991
JS		 7138 if (!phba->slim2p.virt)
7139 goto out_iounmap;
7140
3772a991 7141 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx);
7a470277
JS		 7142 phba->mbox_ext = (phba->slim2p.virt +
7143 offsetof(struct lpfc_sli2_slim, mbx_ext_words));
3772a991
JS		 7144 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb));
7145 phba->IOCBs = (phba->slim2p.virt +
7146 offsetof(struct lpfc_sli2_slim, IOCBs));
7147
7148 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev,
7149 lpfc_sli_hbq_size(),
7150 &phba->hbqslimp.phys,
7151 GFP_KERNEL);
7152 if (!phba->hbqslimp.virt)
7153 goto out_free_slim;
7154
7155 hbq_count = lpfc_sli_hbq_count();
7156 ptr = phba->hbqslimp.virt;
7157 for (i = 0; i < hbq_count; ++i) {
7158 phba->hbqs[i].hbq_virt = ptr;
7159 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list);
7160 ptr += (lpfc_hbq_defs[i]->entry_count *
7161 sizeof(struct lpfc_hbq_entry));
7162 }
7163 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc;
7164 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free;
7165
7166 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size());
7167
3772a991
JS		 7168 phba->MBslimaddr = phba->slim_memmap_p;
7169 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
7170 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
7171 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
7172 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
7173
7174 return 0;
7175
7176out_free_slim:
7177 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7178 phba->slim2p.virt, phba->slim2p.phys);
7179out_iounmap:
7180 iounmap(phba->ctrl_regs_memmap_p);
7181out_iounmap_slim:
7182 iounmap(phba->slim_memmap_p);
7183out:
7184 return error;
7185}
7186
7187/**
7188 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space.
7189 * @phba: pointer to lpfc hba data structure.
7190 *
7191 * This routine is invoked to unset the PCI device memory space for device
7192 * with SLI-3 interface spec.
7193 **/
7194static void
7195lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
7196{
7197 struct pci_dev *pdev;
7198
7199 /* Obtain PCI device reference */
7200 if (!phba->pcidev)
7201 return;
7202 else
7203 pdev = phba->pcidev;
7204
7205 /* Free coherent DMA memory allocated */
7206 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
7207 phba->hbqslimp.virt, phba->hbqslimp.phys);
7208 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7209 phba->slim2p.virt, phba->slim2p.phys);
7210
7211 /* I/O memory unmap */
7212 iounmap(phba->ctrl_regs_memmap_p);
7213 iounmap(phba->slim_memmap_p);
7214
7215 return;
7216}
7217
7218/**
da0436e9 7219 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status
3772a991
JS		 7220 * @phba: pointer to lpfc hba data structure.
7221 *
da0436e9
JS		 7222 * This routine is invoked to wait for SLI4 device Power On Self Test (POST)
7223 * done and check status.
3772a991 7224 *
da0436e9 7225 * Return 0 if successful, otherwise -ENODEV.
3772a991 7226 **/
da0436e9
JS		 7227int
7228lpfc_sli4_post_status_check(struct lpfc_hba *phba)
3772a991 7229{
2fcee4bf
JS		 7230 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg;
7231 struct lpfc_register reg_data;
7232 int i, port_error = 0;
7233 uint32_t if_type;
3772a991 7234
9940b97b
JS		 7235 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
7236 memset(&reg_data, 0, sizeof(reg_data));
2fcee4bf 7237 if (!phba->sli4_hba.PSMPHRregaddr)
da0436e9 7238 return -ENODEV;
3772a991 7239
da0436e9
JS		 7240 /* Wait up to 30 seconds for the SLI Port POST done and ready */
7241 for (i = 0; i < 3000; i++) {
9940b97b
JS		 7242 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
7243 &portsmphr_reg.word0) ||
7244 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) {
2fcee4bf 7245 /* Port has a fatal POST error, break out */
da0436e9
JS		 7246 port_error = -ENODEV;
7247 break;
7248 }
2fcee4bf
JS		 7249 if (LPFC_POST_STAGE_PORT_READY ==
7250 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))
da0436e9 7251 break;
da0436e9 7252 msleep(10);
3772a991
JS		 7253 }
7254
2fcee4bf
JS		 7255 /*
7256 * If there was a port error during POST, then don't proceed with
7257 * other register reads as the data may not be valid. Just exit.
7258 */
7259 if (port_error) {
da0436e9 7260 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2fcee4bf
JS		 7261 "1408 Port Failed POST - portsmphr=0x%x, "
7262 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, "
7263 "scr2=x%x, hscratch=x%x, pstatus=x%x\n",
7264 portsmphr_reg.word0,
7265 bf_get(lpfc_port_smphr_perr, &portsmphr_reg),
7266 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg),
7267 bf_get(lpfc_port_smphr_nip, &portsmphr_reg),
7268 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg),
7269 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg),
7270 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg),
7271 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg),
7272 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg));
7273 } else {
28baac74 7274 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
2fcee4bf
JS		 7275 "2534 Device Info: SLIFamily=0x%x, "
7276 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, "
7277 "SLIHint_2=0x%x, FT=0x%x\n",
28baac74
JS		 7278 bf_get(lpfc_sli_intf_sli_family,
7279 &phba->sli4_hba.sli_intf),
7280 bf_get(lpfc_sli_intf_slirev,
7281 &phba->sli4_hba.sli_intf),
085c647c
JS		 7282 bf_get(lpfc_sli_intf_if_type,
7283 &phba->sli4_hba.sli_intf),
7284 bf_get(lpfc_sli_intf_sli_hint1,
28baac74 7285 &phba->sli4_hba.sli_intf),
085c647c
JS		 7286 bf_get(lpfc_sli_intf_sli_hint2,
7287 &phba->sli4_hba.sli_intf),
7288 bf_get(lpfc_sli_intf_func_type,
28baac74 7289 &phba->sli4_hba.sli_intf));
2fcee4bf
JS		 7290 /*
7291 * Check for other Port errors during the initialization
7292 * process. Fail the load if the port did not come up
7293 * correctly.
7294 */
7295 if_type = bf_get(lpfc_sli_intf_if_type,
7296 &phba->sli4_hba.sli_intf);
7297 switch (if_type) {
7298 case LPFC_SLI_INTF_IF_TYPE_0:
7299 phba->sli4_hba.ue_mask_lo =
7300 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
7301 phba->sli4_hba.ue_mask_hi =
7302 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
7303 uerrlo_reg.word0 =
7304 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
7305 uerrhi_reg.word0 =
7306 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
7307 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
7308 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
7309 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7310 "1422 Unrecoverable Error "
7311 "Detected during POST "
7312 "uerr_lo_reg=0x%x, "
7313 "uerr_hi_reg=0x%x, "
7314 "ue_mask_lo_reg=0x%x, "
7315 "ue_mask_hi_reg=0x%x\n",
7316 uerrlo_reg.word0,
7317 uerrhi_reg.word0,
7318 phba->sli4_hba.ue_mask_lo,
7319 phba->sli4_hba.ue_mask_hi);
7320 port_error = -ENODEV;
7321 }
7322 break;
7323 case LPFC_SLI_INTF_IF_TYPE_2:
7324 /* Final checks. The port status should be clean. */
9940b97b
JS		 7325 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
7326 &reg_data.word0) ||
0558056c
JS		 7327 (bf_get(lpfc_sliport_status_err, &reg_data) &&
7328 !bf_get(lpfc_sliport_status_rn, &reg_data))) {
2fcee4bf
JS		 7329 phba->work_status[0] =
7330 readl(phba->sli4_hba.u.if_type2.
7331 ERR1regaddr);
7332 phba->work_status[1] =
7333 readl(phba->sli4_hba.u.if_type2.
7334 ERR2regaddr);
7335 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8fcb8acd
JS		 7336 "2888 Unrecoverable port error "
7337 "following POST: port status reg "
7338 "0x%x, port_smphr reg 0x%x, "
2fcee4bf
JS		 7339 "error 1=0x%x, error 2=0x%x\n",
7340 reg_data.word0,
7341 portsmphr_reg.word0,
7342 phba->work_status[0],
7343 phba->work_status[1]);
7344 port_error = -ENODEV;
7345 }
7346 break;
7347 case LPFC_SLI_INTF_IF_TYPE_1:
7348 default:
7349 break;
7350 }
28baac74 7351 }
da0436e9
JS		 7352 return port_error;
7353}
3772a991 7354
da0436e9
JS		 7355/**
7356 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map.
7357 * @phba: pointer to lpfc hba data structure.
2fcee4bf 7358 * @if_type: The SLI4 interface type getting configured.
da0436e9
JS		 7359 *
7360 * This routine is invoked to set up SLI4 BAR0 PCI config space register
7361 * memory map.
7362 **/
7363static void
2fcee4bf
JS		 7364lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
7365{
7366 switch (if_type) {
7367 case LPFC_SLI_INTF_IF_TYPE_0:
7368 phba->sli4_hba.u.if_type0.UERRLOregaddr =
7369 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
7370 phba->sli4_hba.u.if_type0.UERRHIregaddr =
7371 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
7372 phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
7373 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
7374 phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
7375 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
7376 phba->sli4_hba.SLIINTFregaddr =
7377 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7378 break;
7379 case LPFC_SLI_INTF_IF_TYPE_2:
0cf07f84
JS		 7380 phba->sli4_hba.u.if_type2.EQDregaddr =
7381 phba->sli4_hba.conf_regs_memmap_p +
7382 LPFC_CTL_PORT_EQ_DELAY_OFFSET;
2fcee4bf 7383 phba->sli4_hba.u.if_type2.ERR1regaddr =
88a2cfbb
JS		 7384 phba->sli4_hba.conf_regs_memmap_p +
7385 LPFC_CTL_PORT_ER1_OFFSET;
2fcee4bf 7386 phba->sli4_hba.u.if_type2.ERR2regaddr =
88a2cfbb
JS		 7387 phba->sli4_hba.conf_regs_memmap_p +
7388 LPFC_CTL_PORT_ER2_OFFSET;
2fcee4bf 7389 phba->sli4_hba.u.if_type2.CTRLregaddr =
88a2cfbb
JS		 7390 phba->sli4_hba.conf_regs_memmap_p +
7391 LPFC_CTL_PORT_CTL_OFFSET;
2fcee4bf 7392 phba->sli4_hba.u.if_type2.STATUSregaddr =
88a2cfbb
JS		 7393 phba->sli4_hba.conf_regs_memmap_p +
7394 LPFC_CTL_PORT_STA_OFFSET;
2fcee4bf
JS		 7395 phba->sli4_hba.SLIINTFregaddr =
7396 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7397 phba->sli4_hba.PSMPHRregaddr =
88a2cfbb
JS		 7398 phba->sli4_hba.conf_regs_memmap_p +
7399 LPFC_CTL_PORT_SEM_OFFSET;
2fcee4bf 7400 phba->sli4_hba.RQDBregaddr =
962bc51b
JS		 7401 phba->sli4_hba.conf_regs_memmap_p +
7402 LPFC_ULP0_RQ_DOORBELL;
2fcee4bf 7403 phba->sli4_hba.WQDBregaddr =
962bc51b
JS		 7404 phba->sli4_hba.conf_regs_memmap_p +
7405 LPFC_ULP0_WQ_DOORBELL;
2fcee4bf
JS		 7406 phba->sli4_hba.EQCQDBregaddr =
7407 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
7408 phba->sli4_hba.MQDBregaddr =
7409 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
7410 phba->sli4_hba.BMBXregaddr =
7411 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
7412 break;
7413 case LPFC_SLI_INTF_IF_TYPE_1:
7414 default:
7415 dev_printk(KERN_ERR, &phba->pcidev->dev,
7416 "FATAL - unsupported SLI4 interface type - %d\n",
7417 if_type);
7418 break;
7419 }
da0436e9 7420}
3772a991 7421
da0436e9
JS		 7422/**
7423 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map.
7424 * @phba: pointer to lpfc hba data structure.
7425 *
7426 * This routine is invoked to set up SLI4 BAR1 control status register (CSR)
7427 * memory map.
7428 **/
7429static void
7430lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba)
7431{
2fcee4bf
JS		 7432 phba->sli4_hba.PSMPHRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
7433 LPFC_SLIPORT_IF0_SMPHR;
da0436e9 7434 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7435 LPFC_HST_ISR0;
da0436e9 7436 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7437 LPFC_HST_IMR0;
da0436e9 7438 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
2fcee4bf 7439 LPFC_HST_ISCR0;
3772a991
JS		 7440}
7441
7442/**
da0436e9 7443 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map.
3772a991 7444 * @phba: pointer to lpfc hba data structure.
da0436e9 7445 * @vf: virtual function number
3772a991 7446 *
da0436e9
JS		 7447 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map
7448 * based on the given viftual function number, @vf.
7449 *
7450 * Return 0 if successful, otherwise -ENODEV.
3772a991 7451 **/
da0436e9
JS		 7452static int
7453lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf)
3772a991 7454{
da0436e9
JS		 7455 if (vf > LPFC_VIR_FUNC_MAX)
7456 return -ENODEV;
3772a991 7457
da0436e9 7458 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS		 7459 vf * LPFC_VFR_PAGE_SIZE +
7460 LPFC_ULP0_RQ_DOORBELL);
da0436e9 7461 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
962bc51b
JS		 7462 vf * LPFC_VFR_PAGE_SIZE +
7463 LPFC_ULP0_WQ_DOORBELL);
da0436e9
JS		 7464 phba->sli4_hba.EQCQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7465 vf * LPFC_VFR_PAGE_SIZE + LPFC_EQCQ_DOORBELL);
7466 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7467 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL);
7468 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
7469 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX);
7470 return 0;
3772a991
JS		 7471}
7472
7473/**
da0436e9 7474 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox
3772a991
JS		 7475 * @phba: pointer to lpfc hba data structure.
7476 *
da0436e9
JS		 7477 * This routine is invoked to create the bootstrap mailbox
7478 * region consistent with the SLI-4 interface spec. This
7479 * routine allocates all memory necessary to communicate
7480 * mailbox commands to the port and sets up all alignment
7481 * needs. No locks are expected to be held when calling
7482 * this routine.
3772a991
JS		 7483 *
7484 * Return codes
af901ca1 7485 * 0 - successful
d439d286 7486 * -ENOMEM - could not allocated memory.
da0436e9 7487 **/
3772a991 7488static int
da0436e9 7489lpfc_create_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7490{
da0436e9
JS		 7491 uint32_t bmbx_size;
7492 struct lpfc_dmabuf *dmabuf;
7493 struct dma_address *dma_address;
7494 uint32_t pa_addr;
7495 uint64_t phys_addr;
7496
7497 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
7498 if (!dmabuf)
7499 return -ENOMEM;
3772a991 7500
da0436e9
JS		 7501 /*
7502 * The bootstrap mailbox region is comprised of 2 parts
7503 * plus an alignment restriction of 16 bytes.
7504 */
7505 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1);
1aee383d
JP		 7506 dmabuf->virt = dma_zalloc_coherent(&phba->pcidev->dev, bmbx_size,
7507 &dmabuf->phys, GFP_KERNEL);
da0436e9
JS		 7508 if (!dmabuf->virt) {
7509 kfree(dmabuf);
7510 return -ENOMEM;
3772a991
JS		 7511 }
7512
da0436e9
JS		 7513 /*
7514 * Initialize the bootstrap mailbox pointers now so that the register
7515 * operations are simple later. The mailbox dma address is required
7516 * to be 16-byte aligned. Also align the virtual memory as each
7517 * maibox is copied into the bmbx mailbox region before issuing the
7518 * command to the port.
7519 */
7520 phba->sli4_hba.bmbx.dmabuf = dmabuf;
7521 phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
7522
7523 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
7524 LPFC_ALIGN_16_BYTE);
7525 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
7526 LPFC_ALIGN_16_BYTE);
7527
7528 /*
7529 * Set the high and low physical addresses now. The SLI4 alignment
7530 * requirement is 16 bytes and the mailbox is posted to the port
7531 * as two 30-bit addresses. The other data is a bit marking whether
7532 * the 30-bit address is the high or low address.
7533 * Upcast bmbx aphys to 64bits so shift instruction compiles
7534 * clean on 32 bit machines.
7535 */
7536 dma_address = &phba->sli4_hba.bmbx.dma_address;
7537 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
7538 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff);
7539 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) |
7540 LPFC_BMBX_BIT1_ADDR_HI);
7541
7542 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
7543 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) |
7544 LPFC_BMBX_BIT1_ADDR_LO);
7545 return 0;
3772a991
JS		 7546}
7547
7548/**
da0436e9 7549 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources
3772a991
JS		 7550 * @phba: pointer to lpfc hba data structure.
7551 *
da0436e9
JS		 7552 * This routine is invoked to teardown the bootstrap mailbox
7553 * region and release all host resources. This routine requires
7554 * the caller to ensure all mailbox commands recovered, no
7555 * additional mailbox comands are sent, and interrupts are disabled
7556 * before calling this routine.
7557 *
7558 **/
3772a991 7559static void
da0436e9 7560lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba)
3772a991 7561{
da0436e9
JS		 7562 dma_free_coherent(&phba->pcidev->dev,
7563 phba->sli4_hba.bmbx.bmbx_size,
7564 phba->sli4_hba.bmbx.dmabuf->virt,
7565 phba->sli4_hba.bmbx.dmabuf->phys);
7566
7567 kfree(phba->sli4_hba.bmbx.dmabuf);
7568 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
3772a991
JS		 7569}
7570
7571/**
da0436e9 7572 * lpfc_sli4_read_config - Get the config parameters.
3772a991
JS		 7573 * @phba: pointer to lpfc hba data structure.
7574 *
da0436e9
JS		 7575 * This routine is invoked to read the configuration parameters from the HBA.
7576 * The configuration parameters are used to set the base and maximum values
7577 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource
7578 * allocation for the port.
3772a991
JS		 7579 *
7580 * Return codes
af901ca1 7581 * 0 - successful
25985edc 7582 * -ENOMEM - No available memory
d439d286 7583 * -EIO - The mailbox failed to complete successfully.
3772a991 7584 **/
ff78d8f9 7585int
da0436e9 7586lpfc_sli4_read_config(struct lpfc_hba *phba)
3772a991 7587{
da0436e9
JS		 7588 LPFC_MBOXQ_t *pmb;
7589 struct lpfc_mbx_read_config *rd_config;
912e3acd
JS		 7590 union lpfc_sli4_cfg_shdr *shdr;
7591 uint32_t shdr_status, shdr_add_status;
7592 struct lpfc_mbx_get_func_cfg *get_func_cfg;
7593 struct lpfc_rsrc_desc_fcfcoe *desc;
8aa134a8 7594 char *pdesc_0;
c691816e
JS		 7595 uint16_t forced_link_speed;
7596 uint32_t if_type;
8aa134a8 7597 int length, i, rc = 0, rc2;
3772a991 7598
da0436e9
JS		 7599 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
7600 if (!pmb) {
7601 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7602 "2011 Unable to allocate memory for issuing "
7603 "SLI_CONFIG_SPECIAL mailbox command\n");
7604 return -ENOMEM;
3772a991
JS		 7605 }
7606
da0436e9 7607 lpfc_read_config(phba, pmb);
3772a991 7608
da0436e9
JS		 7609 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
7610 if (rc != MBX_SUCCESS) {
7611 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7612 "2012 Mailbox failed , mbxCmd x%x "
7613 "READ_CONFIG, mbxStatus x%x\n",
7614 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7615 bf_get(lpfc_mqe_status, &pmb->u.mqe));
7616 rc = -EIO;
7617 } else {
7618 rd_config = &pmb->u.mqe.un.rd_config;
ff78d8f9
JS		 7619 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) {
7620 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
7621 phba->sli4_hba.lnk_info.lnk_tp =
7622 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config);
7623 phba->sli4_hba.lnk_info.lnk_no =
7624 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config);
7625 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7626 "3081 lnk_type:%d, lnk_numb:%d\n",
7627 phba->sli4_hba.lnk_info.lnk_tp,
7628 phba->sli4_hba.lnk_info.lnk_no);
7629 } else
7630 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
7631 "3082 Mailbox (x%x) returned ldv:x0\n",
7632 bf_get(lpfc_mqe_command, &pmb->u.mqe));
44fd7fe3
JS		 7633 if (bf_get(lpfc_mbx_rd_conf_bbscn_def, rd_config)) {
7634 phba->bbcredit_support = 1;
7635 phba->sli4_hba.bbscn_params.word0 = rd_config->word8;
7636 }
7637
6d368e53
JS		 7638 phba->sli4_hba.extents_in_use =
7639 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config);
da0436e9
JS		 7640 phba->sli4_hba.max_cfg_param.max_xri =
7641 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config);
7642 phba->sli4_hba.max_cfg_param.xri_base =
7643 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config);
7644 phba->sli4_hba.max_cfg_param.max_vpi =
7645 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config);
7646 phba->sli4_hba.max_cfg_param.vpi_base =
7647 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config);
7648 phba->sli4_hba.max_cfg_param.max_rpi =
7649 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config);
7650 phba->sli4_hba.max_cfg_param.rpi_base =
7651 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config);
7652 phba->sli4_hba.max_cfg_param.max_vfi =
7653 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config);
7654 phba->sli4_hba.max_cfg_param.vfi_base =
7655 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config);
7656 phba->sli4_hba.max_cfg_param.max_fcfi =
7657 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config);
da0436e9
JS		 7658 phba->sli4_hba.max_cfg_param.max_eq =
7659 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config);
7660 phba->sli4_hba.max_cfg_param.max_rq =
7661 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config);
7662 phba->sli4_hba.max_cfg_param.max_wq =
7663 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config);
7664 phba->sli4_hba.max_cfg_param.max_cq =
7665 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config);
7666 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config);
7667 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
7668 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
7669 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
5ffc266e
JS		 7670 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
7671 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
da0436e9
JS		 7672 phba->max_vports = phba->max_vpi;
7673 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6d368e53
JS		 7674 "2003 cfg params Extents? %d "
7675 "XRI(B:%d M:%d), "
da0436e9
JS		 7676 "VPI(B:%d M:%d) "
7677 "VFI(B:%d M:%d) "
7678 "RPI(B:%d M:%d) "
2ea259ee 7679 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d\n",
6d368e53 7680 phba->sli4_hba.extents_in_use,
da0436e9
JS		 7681 phba->sli4_hba.max_cfg_param.xri_base,
7682 phba->sli4_hba.max_cfg_param.max_xri,
7683 phba->sli4_hba.max_cfg_param.vpi_base,
7684 phba->sli4_hba.max_cfg_param.max_vpi,
7685 phba->sli4_hba.max_cfg_param.vfi_base,
7686 phba->sli4_hba.max_cfg_param.max_vfi,
7687 phba->sli4_hba.max_cfg_param.rpi_base,
7688 phba->sli4_hba.max_cfg_param.max_rpi,
2ea259ee
JS		 7689 phba->sli4_hba.max_cfg_param.max_fcfi,
7690 phba->sli4_hba.max_cfg_param.max_eq,
7691 phba->sli4_hba.max_cfg_param.max_cq,
7692 phba->sli4_hba.max_cfg_param.max_wq,
7693 phba->sli4_hba.max_cfg_param.max_rq);
7694
3772a991 7695 }
912e3acd
JS		 7696
7697 if (rc)
7698 goto read_cfg_out;
da0436e9 7699
c691816e
JS		 7700 /* Update link speed if forced link speed is supported */
7701 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7702 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
7703 forced_link_speed =
7704 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config);
7705 if (forced_link_speed) {
7706 phba->hba_flag |= HBA_FORCED_LINK_SPEED;
7707
7708 switch (forced_link_speed) {
7709 case LINK_SPEED_1G:
7710 phba->cfg_link_speed =
7711 LPFC_USER_LINK_SPEED_1G;
7712 break;
7713 case LINK_SPEED_2G:
7714 phba->cfg_link_speed =
7715 LPFC_USER_LINK_SPEED_2G;
7716 break;
7717 case LINK_SPEED_4G:
7718 phba->cfg_link_speed =
7719 LPFC_USER_LINK_SPEED_4G;
7720 break;
7721 case LINK_SPEED_8G:
7722 phba->cfg_link_speed =
7723 LPFC_USER_LINK_SPEED_8G;
7724 break;
7725 case LINK_SPEED_10G:
7726 phba->cfg_link_speed =
7727 LPFC_USER_LINK_SPEED_10G;
7728 break;
7729 case LINK_SPEED_16G:
7730 phba->cfg_link_speed =
7731 LPFC_USER_LINK_SPEED_16G;
7732 break;
7733 case LINK_SPEED_32G:
7734 phba->cfg_link_speed =
7735 LPFC_USER_LINK_SPEED_32G;
7736 break;
7737 case 0xffff:
7738 phba->cfg_link_speed =
7739 LPFC_USER_LINK_SPEED_AUTO;
7740 break;
7741 default:
7742 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7743 "0047 Unrecognized link "
7744 "speed : %d\n",
7745 forced_link_speed);
7746 phba->cfg_link_speed =
7747 LPFC_USER_LINK_SPEED_AUTO;
7748 }
7749 }
7750 }
7751
da0436e9 7752 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
572709e2
JS		 7753 length = phba->sli4_hba.max_cfg_param.max_xri -
7754 lpfc_sli4_get_els_iocb_cnt(phba);
7755 if (phba->cfg_hba_queue_depth > length) {
7756 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7757 "3361 HBA queue depth changed from %d to %d\n",
7758 phba->cfg_hba_queue_depth, length);
7759 phba->cfg_hba_queue_depth = length;
7760 }
912e3acd
JS		 7761
7762 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
7763 LPFC_SLI_INTF_IF_TYPE_2)
7764 goto read_cfg_out;
7765
7766 /* get the pf# and vf# for SLI4 if_type 2 port */
7767 length = (sizeof(struct lpfc_mbx_get_func_cfg) -
7768 sizeof(struct lpfc_sli4_cfg_mhdr));
7769 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON,
7770 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG,
7771 length, LPFC_SLI4_MBX_EMBED);
7772
8aa134a8 7773 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
912e3acd
JS		 7774 shdr = (union lpfc_sli4_cfg_shdr *)
7775 &pmb->u.mqe.un.sli4_config.header.cfg_shdr;
7776 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
7777 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8aa134a8 7778 if (rc2 || shdr_status || shdr_add_status) {
912e3acd
JS		 7779 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7780 "3026 Mailbox failed , mbxCmd x%x "
7781 "GET_FUNCTION_CONFIG, mbxStatus x%x\n",
7782 bf_get(lpfc_mqe_command, &pmb->u.mqe),
7783 bf_get(lpfc_mqe_status, &pmb->u.mqe));
912e3acd
JS		 7784 goto read_cfg_out;
7785 }
7786
7787 /* search for fc_fcoe resrouce descriptor */
7788 get_func_cfg = &pmb->u.mqe.un.get_func_cfg;
912e3acd 7789
8aa134a8
JS		 7790 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0];
7791 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0;
7792 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc);
7793 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD)
7794 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH;
7795 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH)
7796 goto read_cfg_out;
7797
912e3acd 7798 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) {
8aa134a8 7799 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i);
912e3acd 7800 if (LPFC_RSRC_DESC_TYPE_FCFCOE ==
8aa134a8 7801 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) {
912e3acd
JS		 7802 phba->sli4_hba.iov.pf_number =
7803 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc);
7804 phba->sli4_hba.iov.vf_number =
7805 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc);
7806 break;
7807 }
7808 }
7809
7810 if (i < LPFC_RSRC_DESC_MAX_NUM)
7811 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7812 "3027 GET_FUNCTION_CONFIG: pf_number:%d, "
7813 "vf_number:%d\n", phba->sli4_hba.iov.pf_number,
7814 phba->sli4_hba.iov.vf_number);
8aa134a8 7815 else
912e3acd
JS		 7816 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7817 "3028 GET_FUNCTION_CONFIG: failed to find "
7818 "Resrouce Descriptor:x%x\n",
7819 LPFC_RSRC_DESC_TYPE_FCFCOE);
912e3acd
JS		 7820
7821read_cfg_out:
7822 mempool_free(pmb, phba->mbox_mem_pool);
da0436e9 7823 return rc;
3772a991
JS		 7824}
7825
7826/**
2fcee4bf 7827 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port.
3772a991
JS		 7828 * @phba: pointer to lpfc hba data structure.
7829 *
2fcee4bf
JS		 7830 * This routine is invoked to setup the port-side endian order when
7831 * the port if_type is 0. This routine has no function for other
7832 * if_types.
da0436e9
JS		 7833 *
7834 * Return codes
af901ca1 7835 * 0 - successful
25985edc 7836 * -ENOMEM - No available memory
d439d286 7837 * -EIO - The mailbox failed to complete successfully.
3772a991 7838 **/
da0436e9
JS		 7839static int
7840lpfc_setup_endian_order(struct lpfc_hba *phba)
3772a991 7841{
da0436e9 7842 LPFC_MBOXQ_t *mboxq;
2fcee4bf 7843 uint32_t if_type, rc = 0;
da0436e9
JS		 7844 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0,
7845 HOST_ENDIAN_HIGH_WORD1};
3772a991 7846
2fcee4bf
JS		 7847 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
7848 switch (if_type) {
7849 case LPFC_SLI_INTF_IF_TYPE_0:
7850 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
7851 GFP_KERNEL);
7852 if (!mboxq) {
7853 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7854 "0492 Unable to allocate memory for "
7855 "issuing SLI_CONFIG_SPECIAL mailbox "
7856 "command\n");
7857 return -ENOMEM;
7858 }
3772a991 7859
2fcee4bf
JS		 7860 /*
7861 * The SLI4_CONFIG_SPECIAL mailbox command requires the first
7862 * two words to contain special data values and no other data.
7863 */
7864 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t));
7865 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data));
7866 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
7867 if (rc != MBX_SUCCESS) {
7868 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7869 "0493 SLI_CONFIG_SPECIAL mailbox "
7870 "failed with status x%x\n",
7871 rc);
7872 rc = -EIO;
7873 }
7874 mempool_free(mboxq, phba->mbox_mem_pool);
7875 break;
7876 case LPFC_SLI_INTF_IF_TYPE_2:
7877 case LPFC_SLI_INTF_IF_TYPE_1:
7878 default:
7879 break;
da0436e9 7880 }
da0436e9 7881 return rc;
3772a991
JS		 7882}
7883
7884/**
895427bd 7885 * lpfc_sli4_queue_verify - Verify and update EQ counts
3772a991
JS		 7886 * @phba: pointer to lpfc hba data structure.
7887 *
895427bd
JS		 7888 * This routine is invoked to check the user settable queue counts for EQs.
7889 * After this routine is called the counts will be set to valid values that
5350d872
JS		 7890 * adhere to the constraints of the system's interrupt vectors and the port's
7891 * queue resources.
da0436e9
JS		 7892 *
7893 * Return codes
af901ca1 7894 * 0 - successful
25985edc 7895 * -ENOMEM - No available memory
3772a991 7896 **/
da0436e9 7897static int
5350d872 7898lpfc_sli4_queue_verify(struct lpfc_hba *phba)
3772a991 7899{
895427bd 7900 int io_channel;
1ba981fd 7901 int fof_vectors = phba->cfg_fof ? 1 : 0;
3772a991 7902
da0436e9 7903 /*
67d12733 7904 * Sanity check for configured queue parameters against the run-time
da0436e9
JS		 7905 * device parameters
7906 */
3772a991 7907
67d12733 7908 /* Sanity check on HBA EQ parameters */
895427bd 7909 io_channel = phba->io_channel_irqs;
67d12733 7910
895427bd 7911 if (phba->sli4_hba.num_online_cpu < io_channel) {
82c3e9ba
JS		 7912 lpfc_printf_log(phba,
7913 KERN_ERR, LOG_INIT,
90695ee0 7914 "3188 Reducing IO channels to match number of "
7bb03bbf 7915 "online CPUs: from %d to %d\n",
895427bd
JS		 7916 io_channel, phba->sli4_hba.num_online_cpu);
7917 io_channel = phba->sli4_hba.num_online_cpu;
90695ee0
JS		 7918 }
7919
895427bd 7920 if (io_channel + fof_vectors > phba->sli4_hba.max_cfg_param.max_eq) {
82c3e9ba
JS		 7921 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7922 "2575 Reducing IO channels to match number of "
7923 "available EQs: from %d to %d\n",
895427bd 7924 io_channel,
82c3e9ba 7925 phba->sli4_hba.max_cfg_param.max_eq);
895427bd 7926 io_channel = phba->sli4_hba.max_cfg_param.max_eq - fof_vectors;
da0436e9 7927 }
67d12733 7928
895427bd
JS		 7929 /* The actual number of FCP / NVME event queues adopted */
7930 if (io_channel != phba->io_channel_irqs)
7931 phba->io_channel_irqs = io_channel;
7932 if (phba->cfg_fcp_io_channel > io_channel)
7933 phba->cfg_fcp_io_channel = io_channel;
7934 if (phba->cfg_nvme_io_channel > io_channel)
7935 phba->cfg_nvme_io_channel = io_channel;
2d7dbc4c
JS		 7936 if (phba->cfg_nvme_io_channel < phba->cfg_nvmet_mrq)
7937 phba->cfg_nvmet_mrq = phba->cfg_nvme_io_channel;
895427bd
JS		 7938
7939 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2d7dbc4c 7940 "2574 IO channels: irqs %d fcp %d nvme %d MRQ: %d\n",
895427bd 7941 phba->io_channel_irqs, phba->cfg_fcp_io_channel,
2d7dbc4c 7942 phba->cfg_nvme_io_channel, phba->cfg_nvmet_mrq);
3772a991 7943
da0436e9
JS		 7944 /* Get EQ depth from module parameter, fake the default for now */
7945 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
7946 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
3772a991 7947
5350d872
JS		 7948 /* Get CQ depth from module parameter, fake the default for now */
7949 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
7950 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
895427bd
JS		 7951 return 0;
7952}
7953
7954static int
7955lpfc_alloc_nvme_wq_cq(struct lpfc_hba *phba, int wqidx)
7956{
7957 struct lpfc_queue *qdesc;
5350d872 7958
81b96eda
JS		 7959 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_NVME_PAGE_SIZE,
7960 phba->sli4_hba.cq_esize,
7961 LPFC_NVME_CQSIZE);
895427bd
JS		 7962 if (!qdesc) {
7963 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7964 "0508 Failed allocate fast-path NVME CQ (%d)\n",
7965 wqidx);
7966 return 1;
7967 }
7968 phba->sli4_hba.nvme_cq[wqidx] = qdesc;
7969
81b96eda
JS		 7970 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_NVME_PAGE_SIZE,
7971 LPFC_WQE128_SIZE, LPFC_NVME_WQSIZE);
895427bd
JS		 7972 if (!qdesc) {
7973 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7974 "0509 Failed allocate fast-path NVME WQ (%d)\n",
7975 wqidx);
7976 return 1;
7977 }
7978 phba->sli4_hba.nvme_wq[wqidx] = qdesc;
7979 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
7980 return 0;
7981}
7982
7983static int
7984lpfc_alloc_fcp_wq_cq(struct lpfc_hba *phba, int wqidx)
7985{
7986 struct lpfc_queue *qdesc;
7987 uint32_t wqesize;
7988
7989 /* Create Fast Path FCP CQs */
81b96eda
JS		 7990 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
7991 phba->sli4_hba.cq_esize,
7992 phba->sli4_hba.cq_ecount);
895427bd
JS		 7993 if (!qdesc) {
7994 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7995 "0499 Failed allocate fast-path FCP CQ (%d)\n", wqidx);
7996 return 1;
7997 }
7998 phba->sli4_hba.fcp_cq[wqidx] = qdesc;
7999
8000 /* Create Fast Path FCP WQs */
8001 wqesize = (phba->fcp_embed_io) ?
d1f525aa 8002 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
81b96eda
JS		 8003 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8004 wqesize, phba->sli4_hba.wq_ecount);
895427bd
JS		 8005 if (!qdesc) {
8006 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8007 "0503 Failed allocate fast-path FCP WQ (%d)\n",
8008 wqidx);
8009 return 1;
8010 }
8011 phba->sli4_hba.fcp_wq[wqidx] = qdesc;
8012 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
5350d872 8013 return 0;
5350d872
JS		 8014}
8015
8016/**
8017 * lpfc_sli4_queue_create - Create all the SLI4 queues
8018 * @phba: pointer to lpfc hba data structure.
8019 *
8020 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA
8021 * operation. For each SLI4 queue type, the parameters such as queue entry
8022 * count (queue depth) shall be taken from the module parameter. For now,
8023 * we just use some constant number as place holder.
8024 *
8025 * Return codes
4907cb7b 8026 * 0 - successful
5350d872
JS		 8027 * -ENOMEM - No availble memory
8028 * -EIO - The mailbox failed to complete successfully.
8029 **/
8030int
8031lpfc_sli4_queue_create(struct lpfc_hba *phba)
8032{
8033 struct lpfc_queue *qdesc;
d1f525aa 8034 int idx, io_channel;
5350d872
JS		 8035
8036 /*
67d12733 8037 * Create HBA Record arrays.
895427bd 8038 * Both NVME and FCP will share that same vectors / EQs
5350d872 8039 */
895427bd
JS		 8040 io_channel = phba->io_channel_irqs;
8041 if (!io_channel)
67d12733 8042 return -ERANGE;
5350d872 8043
67d12733
JS		 8044 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
8045 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
8046 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
8047 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
8048 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
8049 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
895427bd
JS		 8050 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
8051 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
8052 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
8053 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
67d12733 8054
895427bd
JS		 8055 phba->sli4_hba.hba_eq = kcalloc(io_channel,
8056 sizeof(struct lpfc_queue *),
8057 GFP_KERNEL);
67d12733
JS		 8058 if (!phba->sli4_hba.hba_eq) {
8059 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8060 "2576 Failed allocate memory for "
8061 "fast-path EQ record array\n");
8062 goto out_error;
8063 }
8064
895427bd
JS		 8065 if (phba->cfg_fcp_io_channel) {
8066 phba->sli4_hba.fcp_cq = kcalloc(phba->cfg_fcp_io_channel,
8067 sizeof(struct lpfc_queue *),
8068 GFP_KERNEL);
8069 if (!phba->sli4_hba.fcp_cq) {
8070 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8071 "2577 Failed allocate memory for "
8072 "fast-path CQ record array\n");
8073 goto out_error;
8074 }
8075 phba->sli4_hba.fcp_wq = kcalloc(phba->cfg_fcp_io_channel,
8076 sizeof(struct lpfc_queue *),
8077 GFP_KERNEL);
8078 if (!phba->sli4_hba.fcp_wq) {
8079 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8080 "2578 Failed allocate memory for "
8081 "fast-path FCP WQ record array\n");
8082 goto out_error;
8083 }
8084 /*
8085 * Since the first EQ can have multiple CQs associated with it,
8086 * this array is used to quickly see if we have a FCP fast-path
8087 * CQ match.
8088 */
8089 phba->sli4_hba.fcp_cq_map = kcalloc(phba->cfg_fcp_io_channel,
8090 sizeof(uint16_t),
8091 GFP_KERNEL);
8092 if (!phba->sli4_hba.fcp_cq_map) {
8093 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8094 "2545 Failed allocate memory for "
8095 "fast-path CQ map\n");
8096 goto out_error;
8097 }
67d12733
JS		 8098 }
8099
895427bd
JS		 8100 if (phba->cfg_nvme_io_channel) {
8101 phba->sli4_hba.nvme_cq = kcalloc(phba->cfg_nvme_io_channel,
8102 sizeof(struct lpfc_queue *),
8103 GFP_KERNEL);
8104 if (!phba->sli4_hba.nvme_cq) {
8105 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8106 "6077 Failed allocate memory for "
8107 "fast-path CQ record array\n");
8108 goto out_error;
8109 }
da0436e9 8110
895427bd
JS		 8111 phba->sli4_hba.nvme_wq = kcalloc(phba->cfg_nvme_io_channel,
8112 sizeof(struct lpfc_queue *),
8113 GFP_KERNEL);
8114 if (!phba->sli4_hba.nvme_wq) {
8115 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8116 "2581 Failed allocate memory for "
8117 "fast-path NVME WQ record array\n");
8118 goto out_error;
8119 }
8120
8121 /*
8122 * Since the first EQ can have multiple CQs associated with it,
8123 * this array is used to quickly see if we have a NVME fast-path
8124 * CQ match.
8125 */
8126 phba->sli4_hba.nvme_cq_map = kcalloc(phba->cfg_nvme_io_channel,
8127 sizeof(uint16_t),
8128 GFP_KERNEL);
8129 if (!phba->sli4_hba.nvme_cq_map) {
8130 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8131 "6078 Failed allocate memory for "
8132 "fast-path CQ map\n");
8133 goto out_error;
8134 }
2d7dbc4c
JS		 8135
8136 if (phba->nvmet_support) {
8137 phba->sli4_hba.nvmet_cqset = kcalloc(
8138 phba->cfg_nvmet_mrq,
8139 sizeof(struct lpfc_queue *),
8140 GFP_KERNEL);
8141 if (!phba->sli4_hba.nvmet_cqset) {
8142 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8143 "3121 Fail allocate memory for "
8144 "fast-path CQ set array\n");
8145 goto out_error;
8146 }
8147 phba->sli4_hba.nvmet_mrq_hdr = kcalloc(
8148 phba->cfg_nvmet_mrq,
8149 sizeof(struct lpfc_queue *),
8150 GFP_KERNEL);
8151 if (!phba->sli4_hba.nvmet_mrq_hdr) {
8152 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8153 "3122 Fail allocate memory for "
8154 "fast-path RQ set hdr array\n");
8155 goto out_error;
8156 }
8157 phba->sli4_hba.nvmet_mrq_data = kcalloc(
8158 phba->cfg_nvmet_mrq,
8159 sizeof(struct lpfc_queue *),
8160 GFP_KERNEL);
8161 if (!phba->sli4_hba.nvmet_mrq_data) {
8162 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8163 "3124 Fail allocate memory for "
8164 "fast-path RQ set data array\n");
8165 goto out_error;
8166 }
8167 }
da0436e9 8168 }
67d12733 8169
895427bd 8170 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
67d12733 8171
895427bd
JS		 8172 /* Create HBA Event Queues (EQs) */
8173 for (idx = 0; idx < io_channel; idx++) {
67d12733 8174 /* Create EQs */
81b96eda
JS		 8175 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8176 phba->sli4_hba.eq_esize,
da0436e9
JS		 8177 phba->sli4_hba.eq_ecount);
8178 if (!qdesc) {
8179 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
67d12733
JS		 8180 "0497 Failed allocate EQ (%d)\n", idx);
8181 goto out_error;
da0436e9 8182 }
67d12733 8183 phba->sli4_hba.hba_eq[idx] = qdesc;
895427bd 8184 }
67d12733 8185
895427bd 8186 /* FCP and NVME io channels are not required to be balanced */
67d12733 8187
895427bd
JS		 8188 for (idx = 0; idx < phba->cfg_fcp_io_channel; idx++)
8189 if (lpfc_alloc_fcp_wq_cq(phba, idx))
67d12733 8190 goto out_error;
da0436e9 8191
895427bd
JS		 8192 for (idx = 0; idx < phba->cfg_nvme_io_channel; idx++)
8193 if (lpfc_alloc_nvme_wq_cq(phba, idx))
8194 goto out_error;
67d12733 8195
2d7dbc4c
JS		 8196 if (phba->nvmet_support) {
8197 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
8198 qdesc = lpfc_sli4_queue_alloc(phba,
81b96eda
JS		 8199 LPFC_DEFAULT_PAGE_SIZE,
8200 phba->sli4_hba.cq_esize,
8201 phba->sli4_hba.cq_ecount);
2d7dbc4c
JS		 8202 if (!qdesc) {
8203 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8204 "3142 Failed allocate NVME "
8205 "CQ Set (%d)\n", idx);
8206 goto out_error;
8207 }
8208 phba->sli4_hba.nvmet_cqset[idx] = qdesc;
8209 }
8210 }
8211
da0436e9 8212 /*
67d12733 8213 * Create Slow Path Completion Queues (CQs)
da0436e9
JS		 8214 */
8215
da0436e9 8216 /* Create slow-path Mailbox Command Complete Queue */
81b96eda
JS		 8217 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8218 phba->sli4_hba.cq_esize,
da0436e9
JS		 8219 phba->sli4_hba.cq_ecount);
8220 if (!qdesc) {
8221 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8222 "0500 Failed allocate slow-path mailbox CQ\n");
67d12733 8223 goto out_error;
da0436e9
JS		 8224 }
8225 phba->sli4_hba.mbx_cq = qdesc;
8226
8227 /* Create slow-path ELS Complete Queue */
81b96eda
JS		 8228 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8229 phba->sli4_hba.cq_esize,
da0436e9
JS		 8230 phba->sli4_hba.cq_ecount);
8231 if (!qdesc) {
8232 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8233 "0501 Failed allocate slow-path ELS CQ\n");
67d12733 8234 goto out_error;
da0436e9
JS		 8235 }
8236 phba->sli4_hba.els_cq = qdesc;
8237
da0436e9 8238
5350d872 8239 /*
67d12733 8240 * Create Slow Path Work Queues (WQs)
5350d872 8241 */
da0436e9
JS		 8242
8243 /* Create Mailbox Command Queue */
da0436e9 8244
81b96eda
JS		 8245 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8246 phba->sli4_hba.mq_esize,
da0436e9
JS		 8247 phba->sli4_hba.mq_ecount);
8248 if (!qdesc) {
8249 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8250 "0505 Failed allocate slow-path MQ\n");
67d12733 8251 goto out_error;
da0436e9
JS		 8252 }
8253 phba->sli4_hba.mbx_wq = qdesc;
8254
8255 /*
67d12733 8256 * Create ELS Work Queues
da0436e9 8257 */
da0436e9
JS		 8258
8259 /* Create slow-path ELS Work Queue */
81b96eda
JS		 8260 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8261 phba->sli4_hba.wq_esize,
da0436e9
JS		 8262 phba->sli4_hba.wq_ecount);
8263 if (!qdesc) {
8264 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8265 "0504 Failed allocate slow-path ELS WQ\n");
67d12733 8266 goto out_error;
da0436e9
JS		 8267 }
8268 phba->sli4_hba.els_wq = qdesc;
895427bd
JS		 8269 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8270
8271 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8272 /* Create NVME LS Complete Queue */
81b96eda
JS		 8273 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8274 phba->sli4_hba.cq_esize,
895427bd
JS		 8275 phba->sli4_hba.cq_ecount);
8276 if (!qdesc) {
8277 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8278 "6079 Failed allocate NVME LS CQ\n");
8279 goto out_error;
8280 }
8281 phba->sli4_hba.nvmels_cq = qdesc;
8282
8283 /* Create NVME LS Work Queue */
81b96eda
JS		 8284 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8285 phba->sli4_hba.wq_esize,
895427bd
JS		 8286 phba->sli4_hba.wq_ecount);
8287 if (!qdesc) {
8288 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8289 "6080 Failed allocate NVME LS WQ\n");
8290 goto out_error;
8291 }
8292 phba->sli4_hba.nvmels_wq = qdesc;
8293 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8294 }
da0436e9 8295
da0436e9
JS		 8296 /*
8297 * Create Receive Queue (RQ)
8298 */
da0436e9
JS		 8299
8300 /* Create Receive Queue for header */
81b96eda
JS		 8301 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8302 phba->sli4_hba.rq_esize,
da0436e9
JS		 8303 phba->sli4_hba.rq_ecount);
8304 if (!qdesc) {
8305 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8306 "0506 Failed allocate receive HRQ\n");
67d12733 8307 goto out_error;
da0436e9
JS		 8308 }
8309 phba->sli4_hba.hdr_rq = qdesc;
8310
8311 /* Create Receive Queue for data */
81b96eda
JS		 8312 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8313 phba->sli4_hba.rq_esize,
da0436e9
JS		 8314 phba->sli4_hba.rq_ecount);
8315 if (!qdesc) {
8316 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8317 "0507 Failed allocate receive DRQ\n");
67d12733 8318 goto out_error;
da0436e9
JS		 8319 }
8320 phba->sli4_hba.dat_rq = qdesc;
8321
2d7dbc4c
JS		 8322 if (phba->nvmet_support) {
8323 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
8324 /* Create NVMET Receive Queue for header */
8325 qdesc = lpfc_sli4_queue_alloc(phba,
81b96eda 8326 LPFC_DEFAULT_PAGE_SIZE,
2d7dbc4c 8327 phba->sli4_hba.rq_esize,
61f3d4bf 8328 LPFC_NVMET_RQE_DEF_COUNT);
2d7dbc4c
JS		 8329 if (!qdesc) {
8330 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8331 "3146 Failed allocate "
8332 "receive HRQ\n");
8333 goto out_error;
8334 }
8335 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc;
8336
8337 /* Only needed for header of RQ pair */
8338 qdesc->rqbp = kzalloc(sizeof(struct lpfc_rqb),
8339 GFP_KERNEL);
8340 if (qdesc->rqbp == NULL) {
8341 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8342 "6131 Failed allocate "
8343 "Header RQBP\n");
8344 goto out_error;
8345 }
8346
4b40d02b
DK		 8347 /* Put list in known state in case driver load fails. */
8348 INIT_LIST_HEAD(&qdesc->rqbp->rqb_buffer_list);
8349
2d7dbc4c
JS		 8350 /* Create NVMET Receive Queue for data */
8351 qdesc = lpfc_sli4_queue_alloc(phba,
81b96eda 8352 LPFC_DEFAULT_PAGE_SIZE,
2d7dbc4c 8353 phba->sli4_hba.rq_esize,
61f3d4bf 8354 LPFC_NVMET_RQE_DEF_COUNT);
2d7dbc4c
JS		 8355 if (!qdesc) {
8356 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8357 "3156 Failed allocate "
8358 "receive DRQ\n");
8359 goto out_error;
8360 }
8361 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc;
8362 }
8363 }
8364
1ba981fd
JS		 8365 /* Create the Queues needed for Flash Optimized Fabric operations */
8366 if (phba->cfg_fof)
8367 lpfc_fof_queue_create(phba);
da0436e9
JS		 8368 return 0;
8369
da0436e9 8370out_error:
67d12733 8371 lpfc_sli4_queue_destroy(phba);
da0436e9
JS		 8372 return -ENOMEM;
8373}
8374
895427bd
JS		 8375static inline void
8376__lpfc_sli4_release_queue(struct lpfc_queue **qp)
8377{
8378 if (*qp != NULL) {
8379 lpfc_sli4_queue_free(*qp);
8380 *qp = NULL;
8381 }
8382}
8383
8384static inline void
8385lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max)
8386{
8387 int idx;
8388
8389 if (*qs == NULL)
8390 return;
8391
8392 for (idx = 0; idx < max; idx++)
8393 __lpfc_sli4_release_queue(&(*qs)[idx]);
8394
8395 kfree(*qs);
8396 *qs = NULL;
8397}
8398
8399static inline void
8400lpfc_sli4_release_queue_map(uint16_t **qmap)
8401{
8402 if (*qmap != NULL) {
8403 kfree(*qmap);
8404 *qmap = NULL;
8405 }
8406}
8407
da0436e9
JS		 8408/**
8409 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues
8410 * @phba: pointer to lpfc hba data structure.
8411 *
8412 * This routine is invoked to release all the SLI4 queues with the FCoE HBA
8413 * operation.
8414 *
8415 * Return codes
af901ca1 8416 * 0 - successful
25985edc 8417 * -ENOMEM - No available memory
d439d286 8418 * -EIO - The mailbox failed to complete successfully.
da0436e9 8419 **/
5350d872 8420void
da0436e9
JS		 8421lpfc_sli4_queue_destroy(struct lpfc_hba *phba)
8422{
1ba981fd
JS		 8423 if (phba->cfg_fof)
8424 lpfc_fof_queue_destroy(phba);
8425
895427bd
JS		 8426 /* Release HBA eqs */
8427 lpfc_sli4_release_queues(&phba->sli4_hba.hba_eq, phba->io_channel_irqs);
8428
8429 /* Release FCP cqs */
8430 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_cq,
d1f525aa 8431 phba->cfg_fcp_io_channel);
895427bd
JS		 8432
8433 /* Release FCP wqs */
8434 lpfc_sli4_release_queues(&phba->sli4_hba.fcp_wq,
d1f525aa 8435 phba->cfg_fcp_io_channel);
895427bd
JS		 8436
8437 /* Release FCP CQ mapping array */
8438 lpfc_sli4_release_queue_map(&phba->sli4_hba.fcp_cq_map);
8439
8440 /* Release NVME cqs */
8441 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_cq,
8442 phba->cfg_nvme_io_channel);
8443
8444 /* Release NVME wqs */
8445 lpfc_sli4_release_queues(&phba->sli4_hba.nvme_wq,
8446 phba->cfg_nvme_io_channel);
8447
8448 /* Release NVME CQ mapping array */
8449 lpfc_sli4_release_queue_map(&phba->sli4_hba.nvme_cq_map);
8450
2d7dbc4c
JS		 8451 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset,
8452 phba->cfg_nvmet_mrq);
8453
8454 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr,
8455 phba->cfg_nvmet_mrq);
8456 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data,
8457 phba->cfg_nvmet_mrq);
8458
895427bd
JS		 8459 /* Release mailbox command work queue */
8460 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq);
8461
8462 /* Release ELS work queue */
8463 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq);
8464
8465 /* Release ELS work queue */
8466 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq);
8467
8468 /* Release unsolicited receive queue */
8469 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq);
8470 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq);
8471
8472 /* Release ELS complete queue */
8473 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq);
8474
8475 /* Release NVME LS complete queue */
8476 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq);
8477
8478 /* Release mailbox command complete queue */
8479 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq);
8480
8481 /* Everything on this list has been freed */
8482 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
8483}
8484
895427bd
JS		 8485int
8486lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq)
8487{
8488 struct lpfc_rqb *rqbp;
8489 struct lpfc_dmabuf *h_buf;
8490 struct rqb_dmabuf *rqb_buffer;
8491
8492 rqbp = rq->rqbp;
8493 while (!list_empty(&rqbp->rqb_buffer_list)) {
8494 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
8495 struct lpfc_dmabuf, list);
8496
8497 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf);
8498 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
8499 rqbp->buffer_count--;
67d12733 8500 }
895427bd
JS		 8501 return 1;
8502}
67d12733 8503
895427bd
JS		 8504static int
8505lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq,
8506 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map,
8507 int qidx, uint32_t qtype)
8508{
8509 struct lpfc_sli_ring *pring;
8510 int rc;
8511
8512 if (!eq || !cq || !wq) {
8513 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8514 "6085 Fast-path %s (%d) not allocated\n",
8515 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx);
8516 return -ENOMEM;
8517 }
8518
8519 /* create the Cq first */
8520 rc = lpfc_cq_create(phba, cq, eq,
8521 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype);
8522 if (rc) {
8523 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8524 "6086 Failed setup of CQ (%d), rc = 0x%x\n",
8525 qidx, (uint32_t)rc);
8526 return rc;
67d12733 8527 }
81b96eda 8528 cq->chann = qidx;
67d12733 8529
895427bd
JS		 8530 if (qtype != LPFC_MBOX) {
8531 /* Setup nvme_cq_map for fast lookup */
8532 if (cq_map)
8533 *cq_map = cq->queue_id;
da0436e9 8534
895427bd
JS		 8535 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8536 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n",
8537 qidx, cq->queue_id, qidx, eq->queue_id);
da0436e9 8538
895427bd
JS		 8539 /* create the wq */
8540 rc = lpfc_wq_create(phba, wq, cq, qtype);
8541 if (rc) {
8542 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8543 "6123 Fail setup fastpath WQ (%d), rc = 0x%x\n",
8544 qidx, (uint32_t)rc);
8545 /* no need to tear down cq - caller will do so */
8546 return rc;
8547 }
81b96eda 8548 wq->chann = qidx;
da0436e9 8549
895427bd
JS		 8550 /* Bind this CQ/WQ to the NVME ring */
8551 pring = wq->pring;
8552 pring->sli.sli4.wqp = (void *)wq;
8553 cq->pring = pring;
da0436e9 8554
895427bd
JS		 8555 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8556 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n",
8557 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id);
8558 } else {
8559 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX);
8560 if (rc) {
8561 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8562 "0539 Failed setup of slow-path MQ: "
8563 "rc = 0x%x\n", rc);
8564 /* no need to tear down cq - caller will do so */
8565 return rc;
8566 }
da0436e9 8567
895427bd
JS		 8568 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8569 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n",
8570 phba->sli4_hba.mbx_wq->queue_id,
8571 phba->sli4_hba.mbx_cq->queue_id);
67d12733 8572 }
da0436e9 8573
895427bd 8574 return 0;
da0436e9
JS		 8575}
8576
8577/**
8578 * lpfc_sli4_queue_setup - Set up all the SLI4 queues
8579 * @phba: pointer to lpfc hba data structure.
8580 *
8581 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA
8582 * operation.
8583 *
8584 * Return codes
af901ca1 8585 * 0 - successful
25985edc 8586 * -ENOMEM - No available memory
d439d286 8587 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS		 8588 **/
8589int
8590lpfc_sli4_queue_setup(struct lpfc_hba *phba)
8591{
962bc51b
JS		 8592 uint32_t shdr_status, shdr_add_status;
8593 union lpfc_sli4_cfg_shdr *shdr;
8594 LPFC_MBOXQ_t *mboxq;
895427bd
JS		 8595 int qidx;
8596 uint32_t length, io_channel;
8597 int rc = -ENOMEM;
962bc51b
JS		 8598
8599 /* Check for dual-ULP support */
8600 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
8601 if (!mboxq) {
8602 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8603 "3249 Unable to allocate memory for "
8604 "QUERY_FW_CFG mailbox command\n");
8605 return -ENOMEM;
8606 }
8607 length = (sizeof(struct lpfc_mbx_query_fw_config) -
8608 sizeof(struct lpfc_sli4_cfg_mhdr));
8609 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
8610 LPFC_MBOX_OPCODE_QUERY_FW_CFG,
8611 length, LPFC_SLI4_MBX_EMBED);
8612
8613 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
8614
8615 shdr = (union lpfc_sli4_cfg_shdr *)
8616 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
8617 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
8618 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8619 if (shdr_status || shdr_add_status || rc) {
8620 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8621 "3250 QUERY_FW_CFG mailbox failed with status "
8622 "x%x add_status x%x, mbx status x%x\n",
8623 shdr_status, shdr_add_status, rc);
8624 if (rc != MBX_TIMEOUT)
8625 mempool_free(mboxq, phba->mbox_mem_pool);
8626 rc = -ENXIO;
8627 goto out_error;
8628 }
8629
8630 phba->sli4_hba.fw_func_mode =
8631 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode;
8632 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode;
8633 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode;
8b017a30
JS		 8634 phba->sli4_hba.physical_port =
8635 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port;
962bc51b
JS		 8636 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8637 "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, "
8638 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode,
8639 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode);
8640
8641 if (rc != MBX_TIMEOUT)
8642 mempool_free(mboxq, phba->mbox_mem_pool);
da0436e9
JS		 8643
8644 /*
67d12733 8645 * Set up HBA Event Queues (EQs)
da0436e9 8646 */
895427bd 8647 io_channel = phba->io_channel_irqs;
da0436e9 8648
67d12733 8649 /* Set up HBA event queue */
895427bd 8650 if (io_channel && !phba->sli4_hba.hba_eq) {
2e90f4b5
JS		 8651 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8652 "3147 Fast-path EQs not allocated\n");
1b51197d 8653 rc = -ENOMEM;
67d12733 8654 goto out_error;
2e90f4b5 8655 }
895427bd
JS		 8656 for (qidx = 0; qidx < io_channel; qidx++) {
8657 if (!phba->sli4_hba.hba_eq[qidx]) {
da0436e9
JS		 8658 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8659 "0522 Fast-path EQ (%d) not "
895427bd 8660 "allocated\n", qidx);
1b51197d 8661 rc = -ENOMEM;
895427bd 8662 goto out_destroy;
da0436e9 8663 }
895427bd
JS		 8664 rc = lpfc_eq_create(phba, phba->sli4_hba.hba_eq[qidx],
8665 phba->cfg_fcp_imax);
da0436e9
JS		 8666 if (rc) {
8667 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8668 "0523 Failed setup of fast-path EQ "
895427bd 8669 "(%d), rc = 0x%x\n", qidx,
a2fc4aef 8670 (uint32_t)rc);
895427bd 8671 goto out_destroy;
da0436e9
JS		 8672 }
8673 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
895427bd
JS		 8674 "2584 HBA EQ setup: queue[%d]-id=%d\n",
8675 qidx, phba->sli4_hba.hba_eq[qidx]->queue_id);
67d12733
JS		 8676 }
8677
895427bd
JS		 8678 if (phba->cfg_nvme_io_channel) {
8679 if (!phba->sli4_hba.nvme_cq || !phba->sli4_hba.nvme_wq) {
67d12733 8680 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8681 "6084 Fast-path NVME %s array not allocated\n",
8682 (phba->sli4_hba.nvme_cq) ? "CQ" : "WQ");
67d12733 8683 rc = -ENOMEM;
895427bd 8684 goto out_destroy;
67d12733
JS		 8685 }
8686
895427bd
JS		 8687 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++) {
8688 rc = lpfc_create_wq_cq(phba,
8689 phba->sli4_hba.hba_eq[
8690 qidx % io_channel],
8691 phba->sli4_hba.nvme_cq[qidx],
8692 phba->sli4_hba.nvme_wq[qidx],
8693 &phba->sli4_hba.nvme_cq_map[qidx],
8694 qidx, LPFC_NVME);
8695 if (rc) {
8696 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8697 "6123 Failed to setup fastpath "
8698 "NVME WQ/CQ (%d), rc = 0x%x\n",
8699 qidx, (uint32_t)rc);
8700 goto out_destroy;
8701 }
8702 }
67d12733
JS		 8703 }
8704
895427bd
JS		 8705 if (phba->cfg_fcp_io_channel) {
8706 /* Set up fast-path FCP Response Complete Queue */
8707 if (!phba->sli4_hba.fcp_cq || !phba->sli4_hba.fcp_wq) {
67d12733 8708 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8709 "3148 Fast-path FCP %s array not allocated\n",
8710 phba->sli4_hba.fcp_cq ? "WQ" : "CQ");
67d12733 8711 rc = -ENOMEM;
895427bd 8712 goto out_destroy;
67d12733
JS		 8713 }
8714
895427bd
JS		 8715 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++) {
8716 rc = lpfc_create_wq_cq(phba,
8717 phba->sli4_hba.hba_eq[
8718 qidx % io_channel],
8719 phba->sli4_hba.fcp_cq[qidx],
8720 phba->sli4_hba.fcp_wq[qidx],
8721 &phba->sli4_hba.fcp_cq_map[qidx],
8722 qidx, LPFC_FCP);
8723 if (rc) {
8724 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8725 "0535 Failed to setup fastpath "
8726 "FCP WQ/CQ (%d), rc = 0x%x\n",
8727 qidx, (uint32_t)rc);
8728 goto out_destroy;
8729 }
8730 }
67d12733 8731 }
895427bd 8732
da0436e9 8733 /*
895427bd 8734 * Set up Slow Path Complete Queues (CQs)
da0436e9
JS		 8735 */
8736
895427bd 8737 /* Set up slow-path MBOX CQ/MQ */
da0436e9 8738
895427bd 8739 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) {
da0436e9 8740 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8741 "0528 %s not allocated\n",
8742 phba->sli4_hba.mbx_cq ?
d1f525aa 8743 "Mailbox WQ" : "Mailbox CQ");
1b51197d 8744 rc = -ENOMEM;
895427bd 8745 goto out_destroy;
da0436e9 8746 }
da0436e9 8747
895427bd 8748 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
d1f525aa
JS		 8749 phba->sli4_hba.mbx_cq,
8750 phba->sli4_hba.mbx_wq,
8751 NULL, 0, LPFC_MBOX);
da0436e9
JS		 8752 if (rc) {
8753 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8754 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n",
8755 (uint32_t)rc);
8756 goto out_destroy;
da0436e9 8757 }
2d7dbc4c
JS		 8758 if (phba->nvmet_support) {
8759 if (!phba->sli4_hba.nvmet_cqset) {
8760 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8761 "3165 Fast-path NVME CQ Set "
8762 "array not allocated\n");
8763 rc = -ENOMEM;
8764 goto out_destroy;
8765 }
8766 if (phba->cfg_nvmet_mrq > 1) {
8767 rc = lpfc_cq_create_set(phba,
8768 phba->sli4_hba.nvmet_cqset,
8769 phba->sli4_hba.hba_eq,
8770 LPFC_WCQ, LPFC_NVMET);
8771 if (rc) {
8772 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8773 "3164 Failed setup of NVME CQ "
8774 "Set, rc = 0x%x\n",
8775 (uint32_t)rc);
8776 goto out_destroy;
8777 }
8778 } else {
8779 /* Set up NVMET Receive Complete Queue */
8780 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0],
8781 phba->sli4_hba.hba_eq[0],
8782 LPFC_WCQ, LPFC_NVMET);
8783 if (rc) {
8784 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8785 "6089 Failed setup NVMET CQ: "
8786 "rc = 0x%x\n", (uint32_t)rc);
8787 goto out_destroy;
8788 }
81b96eda
JS		 8789 phba->sli4_hba.nvmet_cqset[0]->chann = 0;
8790
2d7dbc4c
JS		 8791 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8792 "6090 NVMET CQ setup: cq-id=%d, "
8793 "parent eq-id=%d\n",
8794 phba->sli4_hba.nvmet_cqset[0]->queue_id,
8795 phba->sli4_hba.hba_eq[0]->queue_id);
8796 }
8797 }
da0436e9 8798
895427bd
JS		 8799 /* Set up slow-path ELS WQ/CQ */
8800 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) {
da0436e9 8801 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8802 "0530 ELS %s not allocated\n",
8803 phba->sli4_hba.els_cq ? "WQ" : "CQ");
1b51197d 8804 rc = -ENOMEM;
895427bd 8805 goto out_destroy;
da0436e9 8806 }
895427bd
JS		 8807 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8808 phba->sli4_hba.els_cq,
8809 phba->sli4_hba.els_wq,
8810 NULL, 0, LPFC_ELS);
da0436e9
JS		 8811 if (rc) {
8812 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
895427bd
JS		 8813 "0529 Failed setup of ELS WQ/CQ: rc = 0x%x\n",
8814 (uint32_t)rc);
8815 goto out_destroy;
da0436e9
JS		 8816 }
8817 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8818 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n",
8819 phba->sli4_hba.els_wq->queue_id,
8820 phba->sli4_hba.els_cq->queue_id);
8821
895427bd
JS		 8822 if (phba->cfg_nvme_io_channel) {
8823 /* Set up NVME LS Complete Queue */
8824 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) {
8825 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8826 "6091 LS %s not allocated\n",
8827 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ");
8828 rc = -ENOMEM;
8829 goto out_destroy;
8830 }
8831 rc = lpfc_create_wq_cq(phba, phba->sli4_hba.hba_eq[0],
8832 phba->sli4_hba.nvmels_cq,
8833 phba->sli4_hba.nvmels_wq,
8834 NULL, 0, LPFC_NVME_LS);
8835 if (rc) {
8836 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8837 "0529 Failed setup of NVVME LS WQ/CQ: "
8838 "rc = 0x%x\n", (uint32_t)rc);
8839 goto out_destroy;
8840 }
8841
8842 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8843 "6096 ELS WQ setup: wq-id=%d, "
8844 "parent cq-id=%d\n",
8845 phba->sli4_hba.nvmels_wq->queue_id,
8846 phba->sli4_hba.nvmels_cq->queue_id);
8847 }
8848
2d7dbc4c
JS		 8849 /*
8850 * Create NVMET Receive Queue (RQ)
8851 */
8852 if (phba->nvmet_support) {
8853 if ((!phba->sli4_hba.nvmet_cqset) ||
8854 (!phba->sli4_hba.nvmet_mrq_hdr) ||
8855 (!phba->sli4_hba.nvmet_mrq_data)) {
8856 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8857 "6130 MRQ CQ Queues not "
8858 "allocated\n");
8859 rc = -ENOMEM;
8860 goto out_destroy;
8861 }
8862 if (phba->cfg_nvmet_mrq > 1) {
8863 rc = lpfc_mrq_create(phba,
8864 phba->sli4_hba.nvmet_mrq_hdr,
8865 phba->sli4_hba.nvmet_mrq_data,
8866 phba->sli4_hba.nvmet_cqset,
8867 LPFC_NVMET);
8868 if (rc) {
8869 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8870 "6098 Failed setup of NVMET "
8871 "MRQ: rc = 0x%x\n",
8872 (uint32_t)rc);
8873 goto out_destroy;
8874 }
8875
8876 } else {
8877 rc = lpfc_rq_create(phba,
8878 phba->sli4_hba.nvmet_mrq_hdr[0],
8879 phba->sli4_hba.nvmet_mrq_data[0],
8880 phba->sli4_hba.nvmet_cqset[0],
8881 LPFC_NVMET);
8882 if (rc) {
8883 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8884 "6057 Failed setup of NVMET "
8885 "Receive Queue: rc = 0x%x\n",
8886 (uint32_t)rc);
8887 goto out_destroy;
8888 }
8889
8890 lpfc_printf_log(
8891 phba, KERN_INFO, LOG_INIT,
8892 "6099 NVMET RQ setup: hdr-rq-id=%d, "
8893 "dat-rq-id=%d parent cq-id=%d\n",
8894 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id,
8895 phba->sli4_hba.nvmet_mrq_data[0]->queue_id,
8896 phba->sli4_hba.nvmet_cqset[0]->queue_id);
8897
8898 }
8899 }
8900
da0436e9
JS		 8901 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
8902 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8903 "0540 Receive Queue not allocated\n");
1b51197d 8904 rc = -ENOMEM;
895427bd 8905 goto out_destroy;
da0436e9 8906 }
73d91e50 8907
da0436e9 8908 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
4d9ab994 8909 phba->sli4_hba.els_cq, LPFC_USOL);
da0436e9
JS		 8910 if (rc) {
8911 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8912 "0541 Failed setup of Receive Queue: "
a2fc4aef 8913 "rc = 0x%x\n", (uint32_t)rc);
895427bd 8914 goto out_destroy;
da0436e9 8915 }
73d91e50 8916
da0436e9
JS		 8917 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
8918 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d "
8919 "parent cq-id=%d\n",
8920 phba->sli4_hba.hdr_rq->queue_id,
8921 phba->sli4_hba.dat_rq->queue_id,
4d9ab994 8922 phba->sli4_hba.els_cq->queue_id);
1ba981fd
JS		 8923
8924 if (phba->cfg_fof) {
8925 rc = lpfc_fof_queue_setup(phba);
8926 if (rc) {
8927 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8928 "0549 Failed setup of FOF Queues: "
8929 "rc = 0x%x\n", rc);
895427bd 8930 goto out_destroy;
1ba981fd
JS		 8931 }
8932 }
2c9c5a00 8933
43140ca6 8934 for (qidx = 0; qidx < io_channel; qidx += LPFC_MAX_EQ_DELAY_EQID_CNT)
0cf07f84
JS		 8935 lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT,
8936 phba->cfg_fcp_imax);
43140ca6 8937
da0436e9
JS		 8938 return 0;
8939
895427bd
JS		 8940out_destroy:
8941 lpfc_sli4_queue_unset(phba);
da0436e9
JS		 8942out_error:
8943 return rc;
8944}
8945
8946/**
8947 * lpfc_sli4_queue_unset - Unset all the SLI4 queues
8948 * @phba: pointer to lpfc hba data structure.
8949 *
8950 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA
8951 * operation.
8952 *
8953 * Return codes
af901ca1 8954 * 0 - successful
25985edc 8955 * -ENOMEM - No available memory
d439d286 8956 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS		 8957 **/
8958void
8959lpfc_sli4_queue_unset(struct lpfc_hba *phba)
8960{
895427bd 8961 int qidx;
da0436e9 8962
1ba981fd
JS		 8963 /* Unset the queues created for Flash Optimized Fabric operations */
8964 if (phba->cfg_fof)
8965 lpfc_fof_queue_destroy(phba);
895427bd 8966
da0436e9 8967 /* Unset mailbox command work queue */
895427bd
JS		 8968 if (phba->sli4_hba.mbx_wq)
8969 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
8970
8971 /* Unset NVME LS work queue */
8972 if (phba->sli4_hba.nvmels_wq)
8973 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq);
8974
da0436e9 8975 /* Unset ELS work queue */
019c0d66 8976 if (phba->sli4_hba.els_wq)
895427bd
JS		 8977 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
8978
da0436e9 8979 /* Unset unsolicited receive queue */
895427bd
JS		 8980 if (phba->sli4_hba.hdr_rq)
8981 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq,
8982 phba->sli4_hba.dat_rq);
8983
da0436e9 8984 /* Unset FCP work queue */
895427bd
JS		 8985 if (phba->sli4_hba.fcp_wq)
8986 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
8987 lpfc_wq_destroy(phba, phba->sli4_hba.fcp_wq[qidx]);
8988
8989 /* Unset NVME work queue */
8990 if (phba->sli4_hba.nvme_wq) {
8991 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
8992 lpfc_wq_destroy(phba, phba->sli4_hba.nvme_wq[qidx]);
67d12733 8993 }
895427bd 8994
da0436e9 8995 /* Unset mailbox command complete queue */
895427bd
JS		 8996 if (phba->sli4_hba.mbx_cq)
8997 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
8998
da0436e9 8999 /* Unset ELS complete queue */
895427bd
JS		 9000 if (phba->sli4_hba.els_cq)
9001 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
9002
9003 /* Unset NVME LS complete queue */
9004 if (phba->sli4_hba.nvmels_cq)
9005 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq);
9006
9007 /* Unset NVME response complete queue */
9008 if (phba->sli4_hba.nvme_cq)
9009 for (qidx = 0; qidx < phba->cfg_nvme_io_channel; qidx++)
9010 lpfc_cq_destroy(phba, phba->sli4_hba.nvme_cq[qidx]);
9011
2d7dbc4c
JS		 9012 /* Unset NVMET MRQ queue */
9013 if (phba->sli4_hba.nvmet_mrq_hdr) {
9014 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
9015 lpfc_rq_destroy(phba,
9016 phba->sli4_hba.nvmet_mrq_hdr[qidx],
9017 phba->sli4_hba.nvmet_mrq_data[qidx]);
9018 }
9019
9020 /* Unset NVMET CQ Set complete queue */
9021 if (phba->sli4_hba.nvmet_cqset) {
9022 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
9023 lpfc_cq_destroy(phba,
9024 phba->sli4_hba.nvmet_cqset[qidx]);
9025 }
9026
da0436e9 9027 /* Unset FCP response complete queue */
895427bd
JS		 9028 if (phba->sli4_hba.fcp_cq)
9029 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; qidx++)
9030 lpfc_cq_destroy(phba, phba->sli4_hba.fcp_cq[qidx]);
9031
da0436e9 9032 /* Unset fast-path event queue */
895427bd
JS		 9033 if (phba->sli4_hba.hba_eq)
9034 for (qidx = 0; qidx < phba->io_channel_irqs; qidx++)
9035 lpfc_eq_destroy(phba, phba->sli4_hba.hba_eq[qidx]);
da0436e9
JS		 9036}
9037
9038/**
9039 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool
9040 * @phba: pointer to lpfc hba data structure.
9041 *
9042 * This routine is invoked to allocate and set up a pool of completion queue
9043 * events. The body of the completion queue event is a completion queue entry
9044 * CQE. For now, this pool is used for the interrupt service routine to queue
9045 * the following HBA completion queue events for the worker thread to process:
9046 * - Mailbox asynchronous events
9047 * - Receive queue completion unsolicited events
9048 * Later, this can be used for all the slow-path events.
9049 *
9050 * Return codes
af901ca1 9051 * 0 - successful
25985edc 9052 * -ENOMEM - No available memory
da0436e9
JS		 9053 **/
9054static int
9055lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba)
9056{
9057 struct lpfc_cq_event *cq_event;
9058 int i;
9059
9060 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
9061 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL);
9062 if (!cq_event)
9063 goto out_pool_create_fail;
9064 list_add_tail(&cq_event->list,
9065 &phba->sli4_hba.sp_cqe_event_pool);
9066 }
9067 return 0;
9068
9069out_pool_create_fail:
9070 lpfc_sli4_cq_event_pool_destroy(phba);
9071 return -ENOMEM;
9072}
9073
9074/**
9075 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool
9076 * @phba: pointer to lpfc hba data structure.
9077 *
9078 * This routine is invoked to free the pool of completion queue events at
9079 * driver unload time. Note that, it is the responsibility of the driver
9080 * cleanup routine to free all the outstanding completion-queue events
9081 * allocated from this pool back into the pool before invoking this routine
9082 * to destroy the pool.
9083 **/
9084static void
9085lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba)
9086{
9087 struct lpfc_cq_event *cq_event, *next_cq_event;
9088
9089 list_for_each_entry_safe(cq_event, next_cq_event,
9090 &phba->sli4_hba.sp_cqe_event_pool, list) {
9091 list_del(&cq_event->list);
9092 kfree(cq_event);
9093 }
9094}
9095
9096/**
9097 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
9098 * @phba: pointer to lpfc hba data structure.
9099 *
9100 * This routine is the lock free version of the API invoked to allocate a
9101 * completion-queue event from the free pool.
9102 *
9103 * Return: Pointer to the newly allocated completion-queue event if successful
9104 * NULL otherwise.
9105 **/
9106struct lpfc_cq_event *
9107__lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
9108{
9109 struct lpfc_cq_event *cq_event = NULL;
9110
9111 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
9112 struct lpfc_cq_event, list);
9113 return cq_event;
9114}
9115
9116/**
9117 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
9118 * @phba: pointer to lpfc hba data structure.
9119 *
9120 * This routine is the lock version of the API invoked to allocate a
9121 * completion-queue event from the free pool.
9122 *
9123 * Return: Pointer to the newly allocated completion-queue event if successful
9124 * NULL otherwise.
9125 **/
9126struct lpfc_cq_event *
9127lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
9128{
9129 struct lpfc_cq_event *cq_event;
9130 unsigned long iflags;
9131
9132 spin_lock_irqsave(&phba->hbalock, iflags);
9133 cq_event = __lpfc_sli4_cq_event_alloc(phba);
9134 spin_unlock_irqrestore(&phba->hbalock, iflags);
9135 return cq_event;
9136}
9137
9138/**
9139 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
9140 * @phba: pointer to lpfc hba data structure.
9141 * @cq_event: pointer to the completion queue event to be freed.
9142 *
9143 * This routine is the lock free version of the API invoked to release a
9144 * completion-queue event back into the free pool.
9145 **/
9146void
9147__lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
9148 struct lpfc_cq_event *cq_event)
9149{
9150 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
9151}
9152
9153/**
9154 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
9155 * @phba: pointer to lpfc hba data structure.
9156 * @cq_event: pointer to the completion queue event to be freed.
9157 *
9158 * This routine is the lock version of the API invoked to release a
9159 * completion-queue event back into the free pool.
9160 **/
9161void
9162lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
9163 struct lpfc_cq_event *cq_event)
9164{
9165 unsigned long iflags;
9166 spin_lock_irqsave(&phba->hbalock, iflags);
9167 __lpfc_sli4_cq_event_release(phba, cq_event);
9168 spin_unlock_irqrestore(&phba->hbalock, iflags);
9169}
9170
9171/**
9172 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool
9173 * @phba: pointer to lpfc hba data structure.
9174 *
9175 * This routine is to free all the pending completion-queue events to the
9176 * back into the free pool for device reset.
9177 **/
9178static void
9179lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba)
9180{
9181 LIST_HEAD(cqelist);
9182 struct lpfc_cq_event *cqe;
9183 unsigned long iflags;
9184
9185 /* Retrieve all the pending WCQEs from pending WCQE lists */
9186 spin_lock_irqsave(&phba->hbalock, iflags);
9187 /* Pending FCP XRI abort events */
9188 list_splice_init(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue,
9189 &cqelist);
9190 /* Pending ELS XRI abort events */
9191 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
9192 &cqelist);
9193 /* Pending asynnc events */
9194 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
9195 &cqelist);
9196 spin_unlock_irqrestore(&phba->hbalock, iflags);
9197
9198 while (!list_empty(&cqelist)) {
9199 list_remove_head(&cqelist, cqe, struct lpfc_cq_event, list);
9200 lpfc_sli4_cq_event_release(phba, cqe);
9201 }
9202}
9203
9204/**
9205 * lpfc_pci_function_reset - Reset pci function.
9206 * @phba: pointer to lpfc hba data structure.
9207 *
9208 * This routine is invoked to request a PCI function reset. It will destroys
9209 * all resources assigned to the PCI function which originates this request.
9210 *
9211 * Return codes
af901ca1 9212 * 0 - successful
25985edc 9213 * -ENOMEM - No available memory
d439d286 9214 * -EIO - The mailbox failed to complete successfully.
da0436e9
JS		 9215 **/
9216int
9217lpfc_pci_function_reset(struct lpfc_hba *phba)
9218{
9219 LPFC_MBOXQ_t *mboxq;
2fcee4bf 9220 uint32_t rc = 0, if_type;
da0436e9 9221 uint32_t shdr_status, shdr_add_status;
2f6fa2c9
JS		 9222 uint32_t rdy_chk;
9223 uint32_t port_reset = 0;
da0436e9 9224 union lpfc_sli4_cfg_shdr *shdr;
2fcee4bf 9225 struct lpfc_register reg_data;
2b81f942 9226 uint16_t devid;
da0436e9 9227
2fcee4bf
JS		 9228 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9229 switch (if_type) {
9230 case LPFC_SLI_INTF_IF_TYPE_0:
9231 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
9232 GFP_KERNEL);
9233 if (!mboxq) {
9234 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9235 "0494 Unable to allocate memory for "
9236 "issuing SLI_FUNCTION_RESET mailbox "
9237 "command\n");
9238 return -ENOMEM;
9239 }
da0436e9 9240
2fcee4bf
JS		 9241 /* Setup PCI function reset mailbox-ioctl command */
9242 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
9243 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0,
9244 LPFC_SLI4_MBX_EMBED);
9245 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
9246 shdr = (union lpfc_sli4_cfg_shdr *)
9247 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
9248 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
9249 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
9250 &shdr->response);
9251 if (rc != MBX_TIMEOUT)
9252 mempool_free(mboxq, phba->mbox_mem_pool);
9253 if (shdr_status || shdr_add_status || rc) {
9254 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9255 "0495 SLI_FUNCTION_RESET mailbox "
9256 "failed with status x%x add_status x%x,"
9257 " mbx status x%x\n",
9258 shdr_status, shdr_add_status, rc);
9259 rc = -ENXIO;
9260 }
9261 break;
9262 case LPFC_SLI_INTF_IF_TYPE_2:
2f6fa2c9
JS		 9263wait:
9264 /*
9265 * Poll the Port Status Register and wait for RDY for
9266 * up to 30 seconds. If the port doesn't respond, treat
9267 * it as an error.
9268 */
77d093fb 9269 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) {
2f6fa2c9
JS		 9270 if (lpfc_readl(phba->sli4_hba.u.if_type2.
9271 STATUSregaddr, &reg_data.word0)) {
9272 rc = -ENODEV;
9273 goto out;
9274 }
9275 if (bf_get(lpfc_sliport_status_rdy, &reg_data))
9276 break;
9277 msleep(20);
9278 }
9279
9280 if (!bf_get(lpfc_sliport_status_rdy, &reg_data)) {
9281 phba->work_status[0] = readl(
9282 phba->sli4_hba.u.if_type2.ERR1regaddr);
9283 phba->work_status[1] = readl(
9284 phba->sli4_hba.u.if_type2.ERR2regaddr);
9285 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9286 "2890 Port not ready, port status reg "
9287 "0x%x error 1=0x%x, error 2=0x%x\n",
9288 reg_data.word0,
9289 phba->work_status[0],
9290 phba->work_status[1]);
9291 rc = -ENODEV;
9292 goto out;
9293 }
9294
9295 if (!port_reset) {
9296 /*
9297 * Reset the port now
9298 */
2fcee4bf
JS		 9299 reg_data.word0 = 0;
9300 bf_set(lpfc_sliport_ctrl_end, &reg_data,
9301 LPFC_SLIPORT_LITTLE_ENDIAN);
9302 bf_set(lpfc_sliport_ctrl_ip, &reg_data,
9303 LPFC_SLIPORT_INIT_PORT);
9304 writel(reg_data.word0, phba->sli4_hba.u.if_type2.
9305 CTRLregaddr);
8fcb8acd 9306 /* flush */
2b81f942
JS		 9307 pci_read_config_word(phba->pcidev,
9308 PCI_DEVICE_ID, &devid);
2fcee4bf 9309
2f6fa2c9
JS		 9310 port_reset = 1;
9311 msleep(20);
9312 goto wait;
9313 } else if (bf_get(lpfc_sliport_status_rn, &reg_data)) {
9314 rc = -ENODEV;
9315 goto out;
2fcee4bf
JS		 9316 }
9317 break;
2f6fa2c9 9318
2fcee4bf
JS		 9319 case LPFC_SLI_INTF_IF_TYPE_1:
9320 default:
9321 break;
da0436e9 9322 }
2fcee4bf 9323
73d91e50 9324out:
2fcee4bf 9325 /* Catch the not-ready port failure after a port reset. */
2f6fa2c9 9326 if (rc) {
229adb0e
JS		 9327 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9328 "3317 HBA not functional: IP Reset Failed "
2f6fa2c9 9329 "try: echo fw_reset > board_mode\n");
2fcee4bf 9330 rc = -ENODEV;
229adb0e 9331 }
2fcee4bf 9332
da0436e9
JS		 9333 return rc;
9334}
9335
da0436e9
JS		 9336/**
9337 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space.
9338 * @phba: pointer to lpfc hba data structure.
9339 *
9340 * This routine is invoked to set up the PCI device memory space for device
9341 * with SLI-4 interface spec.
9342 *
9343 * Return codes
af901ca1 9344 * 0 - successful
da0436e9
JS		 9345 * other values - error
9346 **/
9347static int
9348lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
9349{
9350 struct pci_dev *pdev;
9351 unsigned long bar0map_len, bar1map_len, bar2map_len;
9352 int error = -ENODEV;
2fcee4bf 9353 uint32_t if_type;
da0436e9
JS		 9354
9355 /* Obtain PCI device reference */
9356 if (!phba->pcidev)
9357 return error;
9358 else
9359 pdev = phba->pcidev;
9360
9361 /* Set the device DMA mask size */
8e68597d
MR		 9362 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
9363 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
9364 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
9365 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
da0436e9 9366 return error;
8e68597d
MR		 9367 }
9368 }
da0436e9 9369
2fcee4bf
JS		 9370 /*
9371 * The BARs and register set definitions and offset locations are
9372 * dependent on the if_type.
9373 */
9374 if (pci_read_config_dword(pdev, LPFC_SLI_INTF,
9375 &phba->sli4_hba.sli_intf.word0)) {
9376 return error;
9377 }
9378
9379 /* There is no SLI3 failback for SLI4 devices. */
9380 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
9381 LPFC_SLI_INTF_VALID) {
9382 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9383 "2894 SLI_INTF reg contents invalid "
9384 "sli_intf reg 0x%x\n",
9385 phba->sli4_hba.sli_intf.word0);
9386 return error;
9387 }
9388
9389 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9390 /*
9391 * Get the bus address of SLI4 device Bar regions and the
9392 * number of bytes required by each mapping. The mapping of the
9393 * particular PCI BARs regions is dependent on the type of
9394 * SLI4 device.
da0436e9 9395 */
f5ca6f2e
JS		 9396 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) {
9397 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0);
9398 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0);
2fcee4bf
JS		 9399
9400 /*
9401 * Map SLI4 PCI Config Space Register base to a kernel virtual
9402 * addr
9403 */
9404 phba->sli4_hba.conf_regs_memmap_p =
9405 ioremap(phba->pci_bar0_map, bar0map_len);
9406 if (!phba->sli4_hba.conf_regs_memmap_p) {
9407 dev_printk(KERN_ERR, &pdev->dev,
9408 "ioremap failed for SLI4 PCI config "
9409 "registers.\n");
9410 goto out;
9411 }
f5ca6f2e 9412 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
2fcee4bf
JS		 9413 /* Set up BAR0 PCI config space register memory map */
9414 lpfc_sli4_bar0_register_memmap(phba, if_type);
1dfb5a47
JS		 9415 } else {
9416 phba->pci_bar0_map = pci_resource_start(pdev, 1);
9417 bar0map_len = pci_resource_len(pdev, 1);
2fcee4bf
JS		 9418 if (if_type == LPFC_SLI_INTF_IF_TYPE_2) {
9419 dev_printk(KERN_ERR, &pdev->dev,
9420 "FATAL - No BAR0 mapping for SLI4, if_type 2\n");
9421 goto out;
9422 }
9423 phba->sli4_hba.conf_regs_memmap_p =
da0436e9 9424 ioremap(phba->pci_bar0_map, bar0map_len);
2fcee4bf
JS		 9425 if (!phba->sli4_hba.conf_regs_memmap_p) {
9426 dev_printk(KERN_ERR, &pdev->dev,
9427 "ioremap failed for SLI4 PCI config "
9428 "registers.\n");
9429 goto out;
9430 }
9431 lpfc_sli4_bar0_register_memmap(phba, if_type);
da0436e9
JS		 9432 }
9433
e4b9794e
JS		 9434 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
9435 if (pci_resource_start(pdev, PCI_64BIT_BAR2)) {
9436 /*
9437 * Map SLI4 if type 0 HBA Control Register base to a
9438 * kernel virtual address and setup the registers.
9439 */
9440 phba->pci_bar1_map = pci_resource_start(pdev,
9441 PCI_64BIT_BAR2);
9442 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
9443 phba->sli4_hba.ctrl_regs_memmap_p =
9444 ioremap(phba->pci_bar1_map,
9445 bar1map_len);
9446 if (!phba->sli4_hba.ctrl_regs_memmap_p) {
9447 dev_err(&pdev->dev,
9448 "ioremap failed for SLI4 HBA "
9449 "control registers.\n");
9450 error = -ENOMEM;
9451 goto out_iounmap_conf;
9452 }
9453 phba->pci_bar2_memmap_p =
9454 phba->sli4_hba.ctrl_regs_memmap_p;
9455 lpfc_sli4_bar1_register_memmap(phba);
9456 } else {
9457 error = -ENOMEM;
2fcee4bf
JS		 9458 goto out_iounmap_conf;
9459 }
da0436e9
JS		 9460 }
9461
e4b9794e
JS		 9462 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
9463 if (pci_resource_start(pdev, PCI_64BIT_BAR4)) {
9464 /*
9465 * Map SLI4 if type 0 HBA Doorbell Register base to
9466 * a kernel virtual address and setup the registers.
9467 */
9468 phba->pci_bar2_map = pci_resource_start(pdev,
9469 PCI_64BIT_BAR4);
9470 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
9471 phba->sli4_hba.drbl_regs_memmap_p =
9472 ioremap(phba->pci_bar2_map,
9473 bar2map_len);
9474 if (!phba->sli4_hba.drbl_regs_memmap_p) {
9475 dev_err(&pdev->dev,
9476 "ioremap failed for SLI4 HBA"
9477 " doorbell registers.\n");
9478 error = -ENOMEM;
9479 goto out_iounmap_ctrl;
9480 }
9481 phba->pci_bar4_memmap_p =
9482 phba->sli4_hba.drbl_regs_memmap_p;
9483 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
9484 if (error)
9485 goto out_iounmap_all;
9486 } else {
9487 error = -ENOMEM;
2fcee4bf 9488 goto out_iounmap_all;
e4b9794e 9489 }
da0436e9
JS		 9490 }
9491
da0436e9
JS		 9492 return 0;
9493
9494out_iounmap_all:
9495 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
9496out_iounmap_ctrl:
9497 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
9498out_iounmap_conf:
9499 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9500out:
9501 return error;
9502}
9503
9504/**
9505 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space.
9506 * @phba: pointer to lpfc hba data structure.
9507 *
9508 * This routine is invoked to unset the PCI device memory space for device
9509 * with SLI-4 interface spec.
9510 **/
9511static void
9512lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba)
9513{
2e90f4b5
JS		 9514 uint32_t if_type;
9515 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
da0436e9 9516
2e90f4b5
JS		 9517 switch (if_type) {
9518 case LPFC_SLI_INTF_IF_TYPE_0:
9519 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
9520 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
9521 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9522 break;
9523 case LPFC_SLI_INTF_IF_TYPE_2:
9524 iounmap(phba->sli4_hba.conf_regs_memmap_p);
9525 break;
9526 case LPFC_SLI_INTF_IF_TYPE_1:
9527 default:
9528 dev_printk(KERN_ERR, &phba->pcidev->dev,
9529 "FATAL - unsupported SLI4 interface type - %d\n",
9530 if_type);
9531 break;
9532 }
da0436e9
JS		 9533}
9534
9535/**
9536 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device
9537 * @phba: pointer to lpfc hba data structure.
9538 *
9539 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9540 * with SLI-3 interface specs.
da0436e9
JS		 9541 *
9542 * Return codes
af901ca1 9543 * 0 - successful
da0436e9
JS		 9544 * other values - error
9545 **/
9546static int
9547lpfc_sli_enable_msix(struct lpfc_hba *phba)
9548{
45ffac19 9549 int rc;
da0436e9
JS		 9550 LPFC_MBOXQ_t *pmb;
9551
9552 /* Set up MSI-X multi-message vectors */
45ffac19
CH		 9553 rc = pci_alloc_irq_vectors(phba->pcidev,
9554 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX);
9555 if (rc < 0) {
da0436e9
JS		 9556 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9557 "0420 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9558 goto vec_fail_out;
da0436e9 9559 }
45ffac19 9560
da0436e9
JS		 9561 /*
9562 * Assign MSI-X vectors to interrupt handlers
9563 */
9564
9565 /* vector-0 is associated to slow-path handler */
45ffac19 9566 rc = request_irq(pci_irq_vector(phba->pcidev, 0),
ed243d37 9567 &lpfc_sli_sp_intr_handler, 0,
da0436e9
JS		 9568 LPFC_SP_DRIVER_HANDLER_NAME, phba);
9569 if (rc) {
9570 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9571 "0421 MSI-X slow-path request_irq failed "
9572 "(%d)\n", rc);
9573 goto msi_fail_out;
9574 }
9575
9576 /* vector-1 is associated to fast-path handler */
45ffac19 9577 rc = request_irq(pci_irq_vector(phba->pcidev, 1),
ed243d37 9578 &lpfc_sli_fp_intr_handler, 0,
da0436e9
JS		 9579 LPFC_FP_DRIVER_HANDLER_NAME, phba);
9580
9581 if (rc) {
9582 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9583 "0429 MSI-X fast-path request_irq failed "
9584 "(%d)\n", rc);
9585 goto irq_fail_out;
9586 }
9587
9588 /*
9589 * Configure HBA MSI-X attention conditions to messages
9590 */
9591 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9592
9593 if (!pmb) {
9594 rc = -ENOMEM;
9595 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9596 "0474 Unable to allocate memory for issuing "
9597 "MBOX_CONFIG_MSI command\n");
9598 goto mem_fail_out;
9599 }
9600 rc = lpfc_config_msi(phba, pmb);
9601 if (rc)
9602 goto mbx_fail_out;
9603 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
9604 if (rc != MBX_SUCCESS) {
9605 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX,
9606 "0351 Config MSI mailbox command failed, "
9607 "mbxCmd x%x, mbxStatus x%x\n",
9608 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus);
9609 goto mbx_fail_out;
9610 }
9611
9612 /* Free memory allocated for mailbox command */
9613 mempool_free(pmb, phba->mbox_mem_pool);
9614 return rc;
9615
9616mbx_fail_out:
9617 /* Free memory allocated for mailbox command */
9618 mempool_free(pmb, phba->mbox_mem_pool);
9619
9620mem_fail_out:
9621 /* free the irq already requested */
45ffac19 9622 free_irq(pci_irq_vector(phba->pcidev, 1), phba);
da0436e9
JS		 9623
9624irq_fail_out:
9625 /* free the irq already requested */
45ffac19 9626 free_irq(pci_irq_vector(phba->pcidev, 0), phba);
da0436e9
JS		 9627
9628msi_fail_out:
9629 /* Unconfigure MSI-X capability structure */
45ffac19 9630 pci_free_irq_vectors(phba->pcidev);
029165ac
AG		 9631
9632vec_fail_out:
da0436e9
JS		 9633 return rc;
9634}
9635
da0436e9
JS		 9636/**
9637 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device.
9638 * @phba: pointer to lpfc hba data structure.
9639 *
9640 * This routine is invoked to enable the MSI interrupt mode to device with
9641 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to
9642 * enable the MSI vector. The device driver is responsible for calling the
9643 * request_irq() to register MSI vector with a interrupt the handler, which
9644 * is done in this function.
9645 *
9646 * Return codes
af901ca1 9647 * 0 - successful
da0436e9
JS		 9648 * other values - error
9649 */
9650static int
9651lpfc_sli_enable_msi(struct lpfc_hba *phba)
9652{
9653 int rc;
9654
9655 rc = pci_enable_msi(phba->pcidev);
9656 if (!rc)
9657 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9658 "0462 PCI enable MSI mode success.\n");
9659 else {
9660 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9661 "0471 PCI enable MSI mode failed (%d)\n", rc);
9662 return rc;
9663 }
9664
9665 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
ed243d37 9666 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS		 9667 if (rc) {
9668 pci_disable_msi(phba->pcidev);
9669 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9670 "0478 MSI request_irq failed (%d)\n", rc);
9671 }
9672 return rc;
9673}
9674
da0436e9
JS		 9675/**
9676 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device.
9677 * @phba: pointer to lpfc hba data structure.
9678 *
9679 * This routine is invoked to enable device interrupt and associate driver's
9680 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface
9681 * spec. Depends on the interrupt mode configured to the driver, the driver
9682 * will try to fallback from the configured interrupt mode to an interrupt
9683 * mode which is supported by the platform, kernel, and device in the order
9684 * of:
9685 * MSI-X -> MSI -> IRQ.
9686 *
9687 * Return codes
af901ca1 9688 * 0 - successful
da0436e9
JS		 9689 * other values - error
9690 **/
9691static uint32_t
9692lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9693{
9694 uint32_t intr_mode = LPFC_INTR_ERROR;
9695 int retval;
9696
9697 if (cfg_mode == 2) {
9698 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */
9699 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3);
9700 if (!retval) {
9701 /* Now, try to enable MSI-X interrupt mode */
9702 retval = lpfc_sli_enable_msix(phba);
9703 if (!retval) {
9704 /* Indicate initialization to MSI-X mode */
9705 phba->intr_type = MSIX;
9706 intr_mode = 2;
9707 }
9708 }
9709 }
9710
9711 /* Fallback to MSI if MSI-X initialization failed */
9712 if (cfg_mode >= 1 && phba->intr_type == NONE) {
9713 retval = lpfc_sli_enable_msi(phba);
9714 if (!retval) {
9715 /* Indicate initialization to MSI mode */
9716 phba->intr_type = MSI;
9717 intr_mode = 1;
9718 }
9719 }
9720
9721 /* Fallback to INTx if both MSI-X/MSI initalization failed */
9722 if (phba->intr_type == NONE) {
9723 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
9724 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
9725 if (!retval) {
9726 /* Indicate initialization to INTx mode */
9727 phba->intr_type = INTx;
9728 intr_mode = 0;
9729 }
9730 }
9731 return intr_mode;
9732}
9733
9734/**
9735 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device.
9736 * @phba: pointer to lpfc hba data structure.
9737 *
9738 * This routine is invoked to disable device interrupt and disassociate the
9739 * driver's interrupt handler(s) from interrupt vector(s) to device with
9740 * SLI-3 interface spec. Depending on the interrupt mode, the driver will
9741 * release the interrupt vector(s) for the message signaled interrupt.
9742 **/
9743static void
9744lpfc_sli_disable_intr(struct lpfc_hba *phba)
9745{
45ffac19
CH		 9746 int nr_irqs, i;
9747
da0436e9 9748 if (phba->intr_type == MSIX)
45ffac19
CH		 9749 nr_irqs = LPFC_MSIX_VECTORS;
9750 else
9751 nr_irqs = 1;
9752
9753 for (i = 0; i < nr_irqs; i++)
9754 free_irq(pci_irq_vector(phba->pcidev, i), phba);
9755 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS		 9756
9757 /* Reset interrupt management states */
9758 phba->intr_type = NONE;
9759 phba->sli.slistat.sli_intr = 0;
da0436e9
JS		 9760}
9761
7bb03bbf 9762/**
895427bd 9763 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings
7bb03bbf 9764 * @phba: pointer to lpfc hba data structure.
895427bd
JS		 9765 * @vectors: number of msix vectors allocated.
9766 *
9767 * The routine will figure out the CPU affinity assignment for every
9768 * MSI-X vector allocated for the HBA. The hba_eq_hdl will be updated
9769 * with a pointer to the CPU mask that defines ALL the CPUs this vector
9770 * can be associated with. If the vector can be unquely associated with
9771 * a single CPU, that CPU will be recorded in hba_eq_hdl[index].cpu.
9772 * In addition, the CPU to IO channel mapping will be calculated
9773 * and the phba->sli4_hba.cpu_map array will reflect this.
7bb03bbf 9774 */
895427bd
JS		 9775static void
9776lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
7bb03bbf
JS		 9777{
9778 struct lpfc_vector_map_info *cpup;
895427bd
JS		 9779 int index = 0;
9780 int vec = 0;
7bb03bbf 9781 int cpu;
7bb03bbf
JS		 9782#ifdef CONFIG_X86
9783 struct cpuinfo_x86 *cpuinfo;
9784#endif
7bb03bbf
JS		 9785
9786 /* Init cpu_map array */
9787 memset(phba->sli4_hba.cpu_map, 0xff,
9788 (sizeof(struct lpfc_vector_map_info) *
895427bd 9789 phba->sli4_hba.num_present_cpu));
7bb03bbf
JS		 9790
9791 /* Update CPU map with physical id and core id of each CPU */
9792 cpup = phba->sli4_hba.cpu_map;
9793 for (cpu = 0; cpu < phba->sli4_hba.num_present_cpu; cpu++) {
9794#ifdef CONFIG_X86
9795 cpuinfo = &cpu_data(cpu);
9796 cpup->phys_id = cpuinfo->phys_proc_id;
9797 cpup->core_id = cpuinfo->cpu_core_id;
9798#else
9799 /* No distinction between CPUs for other platforms */
9800 cpup->phys_id = 0;
9801 cpup->core_id = 0;
9802#endif
895427bd
JS		 9803 cpup->channel_id = index; /* For now round robin */
9804 cpup->irq = pci_irq_vector(phba->pcidev, vec);
9805 vec++;
9806 if (vec >= vectors)
9807 vec = 0;
9808 index++;
9809 if (index >= phba->cfg_fcp_io_channel)
9810 index = 0;
7bb03bbf
JS		 9811 cpup++;
9812 }
7bb03bbf
JS		 9813}
9814
9815
da0436e9
JS		 9816/**
9817 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device
9818 * @phba: pointer to lpfc hba data structure.
9819 *
9820 * This routine is invoked to enable the MSI-X interrupt vectors to device
45ffac19 9821 * with SLI-4 interface spec.
da0436e9
JS		 9822 *
9823 * Return codes
af901ca1 9824 * 0 - successful
da0436e9
JS		 9825 * other values - error
9826 **/
9827static int
9828lpfc_sli4_enable_msix(struct lpfc_hba *phba)
9829{
75baf696 9830 int vectors, rc, index;
b83d005e 9831 char *name;
da0436e9
JS		 9832
9833 /* Set up MSI-X multi-message vectors */
895427bd 9834 vectors = phba->io_channel_irqs;
45ffac19 9835 if (phba->cfg_fof)
1ba981fd 9836 vectors++;
45ffac19 9837
f358dd0c
JS		 9838 rc = pci_alloc_irq_vectors(phba->pcidev,
9839 (phba->nvmet_support) ? 1 : 2,
9840 vectors, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
4f871e1b 9841 if (rc < 0) {
da0436e9
JS		 9842 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9843 "0484 PCI enable MSI-X failed (%d)\n", rc);
029165ac 9844 goto vec_fail_out;
da0436e9 9845 }
4f871e1b 9846 vectors = rc;
75baf696 9847
7bb03bbf 9848 /* Assign MSI-X vectors to interrupt handlers */
67d12733 9849 for (index = 0; index < vectors; index++) {
b83d005e
JS		 9850 name = phba->sli4_hba.hba_eq_hdl[index].handler_name;
9851 memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ);
9852 snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ,
4305f183 9853 LPFC_DRIVER_HANDLER_NAME"%d", index);
da0436e9 9854
895427bd
JS		 9855 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9856 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
9857 atomic_set(&phba->sli4_hba.hba_eq_hdl[index].hba_eq_in_use, 1);
1ba981fd 9858 if (phba->cfg_fof && (index == (vectors - 1)))
45ffac19 9859 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9860 &lpfc_sli4_fof_intr_handler, 0,
b83d005e 9861 name,
895427bd 9862 &phba->sli4_hba.hba_eq_hdl[index]);
1ba981fd 9863 else
45ffac19 9864 rc = request_irq(pci_irq_vector(phba->pcidev, index),
ed243d37 9865 &lpfc_sli4_hba_intr_handler, 0,
b83d005e 9866 name,
895427bd 9867 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9
JS		 9868 if (rc) {
9869 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9870 "0486 MSI-X fast-path (%d) "
9871 "request_irq failed (%d)\n", index, rc);
9872 goto cfg_fail_out;
9873 }
9874 }
9875
1ba981fd
JS		 9876 if (phba->cfg_fof)
9877 vectors--;
9878
895427bd 9879 if (vectors != phba->io_channel_irqs) {
82c3e9ba
JS		 9880 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9881 "3238 Reducing IO channels to match number of "
9882 "MSI-X vectors, requested %d got %d\n",
895427bd
JS		 9883 phba->io_channel_irqs, vectors);
9884 if (phba->cfg_fcp_io_channel > vectors)
9885 phba->cfg_fcp_io_channel = vectors;
9886 if (phba->cfg_nvme_io_channel > vectors)
9887 phba->cfg_nvme_io_channel = vectors;
9888 if (phba->cfg_fcp_io_channel > phba->cfg_nvme_io_channel)
9889 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
9890 else
9891 phba->io_channel_irqs = phba->cfg_nvme_io_channel;
82c3e9ba 9892 }
895427bd 9893 lpfc_cpu_affinity_check(phba, vectors);
7bb03bbf 9894
da0436e9
JS		 9895 return rc;
9896
9897cfg_fail_out:
9898 /* free the irq already requested */
895427bd
JS		 9899 for (--index; index >= 0; index--)
9900 free_irq(pci_irq_vector(phba->pcidev, index),
9901 &phba->sli4_hba.hba_eq_hdl[index]);
da0436e9 9902
da0436e9 9903 /* Unconfigure MSI-X capability structure */
45ffac19 9904 pci_free_irq_vectors(phba->pcidev);
029165ac
AG		 9905
9906vec_fail_out:
da0436e9
JS		 9907 return rc;
9908}
9909
da0436e9
JS		 9910/**
9911 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device
9912 * @phba: pointer to lpfc hba data structure.
9913 *
9914 * This routine is invoked to enable the MSI interrupt mode to device with
9915 * SLI-4 interface spec. The kernel function pci_enable_msi() is called
9916 * to enable the MSI vector. The device driver is responsible for calling
9917 * the request_irq() to register MSI vector with a interrupt the handler,
9918 * which is done in this function.
9919 *
9920 * Return codes
af901ca1 9921 * 0 - successful
da0436e9
JS		 9922 * other values - error
9923 **/
9924static int
9925lpfc_sli4_enable_msi(struct lpfc_hba *phba)
9926{
9927 int rc, index;
9928
9929 rc = pci_enable_msi(phba->pcidev);
9930 if (!rc)
9931 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9932 "0487 PCI enable MSI mode success.\n");
9933 else {
9934 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9935 "0488 PCI enable MSI mode failed (%d)\n", rc);
9936 return rc;
9937 }
9938
9939 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
ed243d37 9940 0, LPFC_DRIVER_NAME, phba);
da0436e9
JS		 9941 if (rc) {
9942 pci_disable_msi(phba->pcidev);
9943 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
9944 "0490 MSI request_irq failed (%d)\n", rc);
75baf696 9945 return rc;
da0436e9
JS		 9946 }
9947
895427bd
JS		 9948 for (index = 0; index < phba->io_channel_irqs; index++) {
9949 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9950 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
da0436e9
JS		 9951 }
9952
1ba981fd 9953 if (phba->cfg_fof) {
895427bd
JS		 9954 phba->sli4_hba.hba_eq_hdl[index].idx = index;
9955 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
1ba981fd 9956 }
75baf696 9957 return 0;
da0436e9
JS		 9958}
9959
da0436e9
JS		 9960/**
9961 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device
9962 * @phba: pointer to lpfc hba data structure.
9963 *
9964 * This routine is invoked to enable device interrupt and associate driver's
9965 * interrupt handler(s) to interrupt vector(s) to device with SLI-4
9966 * interface spec. Depends on the interrupt mode configured to the driver,
9967 * the driver will try to fallback from the configured interrupt mode to an
9968 * interrupt mode which is supported by the platform, kernel, and device in
9969 * the order of:
9970 * MSI-X -> MSI -> IRQ.
9971 *
9972 * Return codes
af901ca1 9973 * 0 - successful
da0436e9
JS		 9974 * other values - error
9975 **/
9976static uint32_t
9977lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
9978{
9979 uint32_t intr_mode = LPFC_INTR_ERROR;
895427bd 9980 int retval, idx;
da0436e9
JS		 9981
9982 if (cfg_mode == 2) {
9983 /* Preparation before conf_msi mbox cmd */
9984 retval = 0;
9985 if (!retval) {
9986 /* Now, try to enable MSI-X interrupt mode */
9987 retval = lpfc_sli4_enable_msix(phba);
9988 if (!retval) {
9989 /* Indicate initialization to MSI-X mode */
9990 phba->intr_type = MSIX;
9991 intr_mode = 2;
9992 }
9993 }
9994 }
9995
9996 /* Fallback to MSI if MSI-X initialization failed */
9997 if (cfg_mode >= 1 && phba->intr_type == NONE) {
9998 retval = lpfc_sli4_enable_msi(phba);
9999 if (!retval) {
10000 /* Indicate initialization to MSI mode */
10001 phba->intr_type = MSI;
10002 intr_mode = 1;
10003 }
10004 }
10005
10006 /* Fallback to INTx if both MSI-X/MSI initalization failed */
10007 if (phba->intr_type == NONE) {
10008 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
10009 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
10010 if (!retval) {
895427bd
JS		 10011 struct lpfc_hba_eq_hdl *eqhdl;
10012
da0436e9
JS		 10013 /* Indicate initialization to INTx mode */
10014 phba->intr_type = INTx;
10015 intr_mode = 0;
895427bd
JS		 10016
10017 for (idx = 0; idx < phba->io_channel_irqs; idx++) {
10018 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
10019 eqhdl->idx = idx;
10020 eqhdl->phba = phba;
10021 atomic_set(&eqhdl->hba_eq_in_use, 1);
da0436e9 10022 }
1ba981fd 10023 if (phba->cfg_fof) {
895427bd
JS		 10024 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
10025 eqhdl->idx = idx;
10026 eqhdl->phba = phba;
10027 atomic_set(&eqhdl->hba_eq_in_use, 1);
1ba981fd 10028 }
da0436e9
JS		 10029 }
10030 }
10031 return intr_mode;
10032}
10033
10034/**
10035 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device
10036 * @phba: pointer to lpfc hba data structure.
10037 *
10038 * This routine is invoked to disable device interrupt and disassociate
10039 * the driver's interrupt handler(s) from interrupt vector(s) to device
10040 * with SLI-4 interface spec. Depending on the interrupt mode, the driver
10041 * will release the interrupt vector(s) for the message signaled interrupt.
10042 **/
10043static void
10044lpfc_sli4_disable_intr(struct lpfc_hba *phba)
10045{
10046 /* Disable the currently initialized interrupt mode */
45ffac19
CH		 10047 if (phba->intr_type == MSIX) {
10048 int index;
10049
10050 /* Free up MSI-X multi-message vectors */
895427bd
JS		 10051 for (index = 0; index < phba->io_channel_irqs; index++)
10052 free_irq(pci_irq_vector(phba->pcidev, index),
10053 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19
CH		 10054
10055 if (phba->cfg_fof)
895427bd
JS		 10056 free_irq(pci_irq_vector(phba->pcidev, index),
10057 &phba->sli4_hba.hba_eq_hdl[index]);
45ffac19 10058 } else {
da0436e9 10059 free_irq(phba->pcidev->irq, phba);
45ffac19
CH		 10060 }
10061
10062 pci_free_irq_vectors(phba->pcidev);
da0436e9
JS		 10063
10064 /* Reset interrupt management states */
10065 phba->intr_type = NONE;
10066 phba->sli.slistat.sli_intr = 0;
da0436e9
JS		 10067}
10068
10069/**
10070 * lpfc_unset_hba - Unset SLI3 hba device initialization
10071 * @phba: pointer to lpfc hba data structure.
10072 *
10073 * This routine is invoked to unset the HBA device initialization steps to
10074 * a device with SLI-3 interface spec.
10075 **/
10076static void
10077lpfc_unset_hba(struct lpfc_hba *phba)
10078{
10079 struct lpfc_vport *vport = phba->pport;
10080 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
10081
10082 spin_lock_irq(shost->host_lock);
10083 vport->load_flag |= FC_UNLOADING;
10084 spin_unlock_irq(shost->host_lock);
10085
72859909
JS		 10086 kfree(phba->vpi_bmask);
10087 kfree(phba->vpi_ids);
10088
da0436e9
JS		 10089 lpfc_stop_hba_timers(phba);
10090
10091 phba->pport->work_port_events = 0;
10092
10093 lpfc_sli_hba_down(phba);
10094
10095 lpfc_sli_brdrestart(phba);
10096
10097 lpfc_sli_disable_intr(phba);
10098
10099 return;
10100}
10101
5af5eee7
JS		 10102/**
10103 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy
10104 * @phba: Pointer to HBA context object.
10105 *
10106 * This function is called in the SLI4 code path to wait for completion
10107 * of device's XRIs exchange busy. It will check the XRI exchange busy
10108 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after
10109 * that, it will check the XRI exchange busy on outstanding FCP and ELS
10110 * I/Os every 30 seconds, log error message, and wait forever. Only when
10111 * all XRI exchange busy complete, the driver unload shall proceed with
10112 * invoking the function reset ioctl mailbox command to the CNA and the
10113 * the rest of the driver unload resource release.
10114 **/
10115static void
10116lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba)
10117{
10118 int wait_time = 0;
895427bd 10119 int nvme_xri_cmpl = 1;
86c67379 10120 int nvmet_xri_cmpl = 1;
895427bd 10121 int fcp_xri_cmpl = 1;
5af5eee7
JS		 10122 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
10123
895427bd
JS		 10124 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
10125 fcp_xri_cmpl =
10126 list_empty(&phba->sli4_hba.lpfc_abts_scsi_buf_list);
86c67379 10127 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd
JS		 10128 nvme_xri_cmpl =
10129 list_empty(&phba->sli4_hba.lpfc_abts_nvme_buf_list);
86c67379
JS		 10130 nvmet_xri_cmpl =
10131 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
10132 }
895427bd 10133
f358dd0c
JS		 10134 while (!fcp_xri_cmpl || !els_xri_cmpl || !nvme_xri_cmpl ||
10135 !nvmet_xri_cmpl) {
5af5eee7 10136 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) {
895427bd
JS		 10137 if (!nvme_xri_cmpl)
10138 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10139 "6100 NVME XRI exchange busy "
10140 "wait time: %d seconds.\n",
10141 wait_time/1000);
5af5eee7
JS		 10142 if (!fcp_xri_cmpl)
10143 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10144 "2877 FCP XRI exchange busy "
10145 "wait time: %d seconds.\n",
10146 wait_time/1000);
10147 if (!els_xri_cmpl)
10148 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10149 "2878 ELS XRI exchange busy "
10150 "wait time: %d seconds.\n",
10151 wait_time/1000);
10152 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2);
10153 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2;
10154 } else {
10155 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1);
10156 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1;
10157 }
86c67379 10158 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd
JS		 10159 nvme_xri_cmpl = list_empty(
10160 &phba->sli4_hba.lpfc_abts_nvme_buf_list);
86c67379
JS		 10161 nvmet_xri_cmpl = list_empty(
10162 &phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
10163 }
895427bd
JS		 10164
10165 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
10166 fcp_xri_cmpl = list_empty(
10167 &phba->sli4_hba.lpfc_abts_scsi_buf_list);
10168
5af5eee7
JS		 10169 els_xri_cmpl =
10170 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
f358dd0c 10171
5af5eee7
JS		 10172 }
10173}
10174
da0436e9
JS		 10175/**
10176 * lpfc_sli4_hba_unset - Unset the fcoe hba
10177 * @phba: Pointer to HBA context object.
10178 *
10179 * This function is called in the SLI4 code path to reset the HBA's FCoE
10180 * function. The caller is not required to hold any lock. This routine
10181 * issues PCI function reset mailbox command to reset the FCoE function.
10182 * At the end of the function, it calls lpfc_hba_down_post function to
10183 * free any pending commands.
10184 **/
10185static void
10186lpfc_sli4_hba_unset(struct lpfc_hba *phba)
10187{
10188 int wait_cnt = 0;
10189 LPFC_MBOXQ_t *mboxq;
912e3acd 10190 struct pci_dev *pdev = phba->pcidev;
da0436e9
JS		 10191
10192 lpfc_stop_hba_timers(phba);
10193 phba->sli4_hba.intr_enable = 0;
10194
10195 /*
10196 * Gracefully wait out the potential current outstanding asynchronous
10197 * mailbox command.
10198 */
10199
10200 /* First, block any pending async mailbox command from posted */
10201 spin_lock_irq(&phba->hbalock);
10202 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
10203 spin_unlock_irq(&phba->hbalock);
10204 /* Now, trying to wait it out if we can */
10205 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
10206 msleep(10);
10207 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT)
10208 break;
10209 }
10210 /* Forcefully release the outstanding mailbox command if timed out */
10211 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
10212 spin_lock_irq(&phba->hbalock);
10213 mboxq = phba->sli.mbox_active;
10214 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
10215 __lpfc_mbox_cmpl_put(phba, mboxq);
10216 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
10217 phba->sli.mbox_active = NULL;
10218 spin_unlock_irq(&phba->hbalock);
10219 }
10220
5af5eee7
JS		 10221 /* Abort all iocbs associated with the hba */
10222 lpfc_sli_hba_iocb_abort(phba);
10223
10224 /* Wait for completion of device XRI exchange busy */
10225 lpfc_sli4_xri_exchange_busy_wait(phba);
10226
da0436e9
JS		 10227 /* Disable PCI subsystem interrupt */
10228 lpfc_sli4_disable_intr(phba);
10229
912e3acd
JS		 10230 /* Disable SR-IOV if enabled */
10231 if (phba->cfg_sriov_nr_virtfn)
10232 pci_disable_sriov(pdev);
10233
da0436e9
JS		 10234 /* Stop kthread signal shall trigger work_done one more time */
10235 kthread_stop(phba->worker_thread);
10236
d1f525aa
JS		 10237 /* Unset the queues shared with the hardware then release all
10238 * allocated resources.
10239 */
10240 lpfc_sli4_queue_unset(phba);
10241 lpfc_sli4_queue_destroy(phba);
10242
3677a3a7
JS		 10243 /* Reset SLI4 HBA FCoE function */
10244 lpfc_pci_function_reset(phba);
10245
da0436e9
JS		 10246 /* Stop the SLI4 device port */
10247 phba->pport->work_port_events = 0;
10248}
10249
28baac74
JS		 10250 /**
10251 * lpfc_pc_sli4_params_get - Get the SLI4_PARAMS port capabilities.
10252 * @phba: Pointer to HBA context object.
10253 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
10254 *
10255 * This function is called in the SLI4 code path to read the port's
10256 * sli4 capabilities.
10257 *
10258 * This function may be be called from any context that can block-wait
10259 * for the completion. The expectation is that this routine is called
10260 * typically from probe_one or from the online routine.
10261 **/
10262int
10263lpfc_pc_sli4_params_get(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
10264{
10265 int rc;
10266 struct lpfc_mqe *mqe;
10267 struct lpfc_pc_sli4_params *sli4_params;
10268 uint32_t mbox_tmo;
10269
10270 rc = 0;
10271 mqe = &mboxq->u.mqe;
10272
10273 /* Read the port's SLI4 Parameters port capabilities */
fedd3b7b 10274 lpfc_pc_sli4_params(mboxq);
28baac74
JS		 10275 if (!phba->sli4_hba.intr_enable)
10276 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
10277 else {
a183a15f 10278 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
28baac74
JS		 10279 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
10280 }
10281
10282 if (unlikely(rc))
10283 return 1;
10284
10285 sli4_params = &phba->sli4_hba.pc_sli4_params;
10286 sli4_params->if_type = bf_get(if_type, &mqe->un.sli4_params);
10287 sli4_params->sli_rev = bf_get(sli_rev, &mqe->un.sli4_params);
10288 sli4_params->sli_family = bf_get(sli_family, &mqe->un.sli4_params);
10289 sli4_params->featurelevel_1 = bf_get(featurelevel_1,
10290 &mqe->un.sli4_params);
10291 sli4_params->featurelevel_2 = bf_get(featurelevel_2,
10292 &mqe->un.sli4_params);
10293 sli4_params->proto_types = mqe->un.sli4_params.word3;
10294 sli4_params->sge_supp_len = mqe->un.sli4_params.sge_supp_len;
10295 sli4_params->if_page_sz = bf_get(if_page_sz, &mqe->un.sli4_params);
10296 sli4_params->rq_db_window = bf_get(rq_db_window, &mqe->un.sli4_params);
10297 sli4_params->loopbk_scope = bf_get(loopbk_scope, &mqe->un.sli4_params);
10298 sli4_params->eq_pages_max = bf_get(eq_pages, &mqe->un.sli4_params);
10299 sli4_params->eqe_size = bf_get(eqe_size, &mqe->un.sli4_params);
10300 sli4_params->cq_pages_max = bf_get(cq_pages, &mqe->un.sli4_params);
10301 sli4_params->cqe_size = bf_get(cqe_size, &mqe->un.sli4_params);
10302 sli4_params->mq_pages_max = bf_get(mq_pages, &mqe->un.sli4_params);
10303 sli4_params->mqe_size = bf_get(mqe_size, &mqe->un.sli4_params);
10304 sli4_params->mq_elem_cnt = bf_get(mq_elem_cnt, &mqe->un.sli4_params);
10305 sli4_params->wq_pages_max = bf_get(wq_pages, &mqe->un.sli4_params);
10306 sli4_params->wqe_size = bf_get(wqe_size, &mqe->un.sli4_params);
10307 sli4_params->rq_pages_max = bf_get(rq_pages, &mqe->un.sli4_params);
10308 sli4_params->rqe_size = bf_get(rqe_size, &mqe->un.sli4_params);
10309 sli4_params->hdr_pages_max = bf_get(hdr_pages, &mqe->un.sli4_params);
10310 sli4_params->hdr_size = bf_get(hdr_size, &mqe->un.sli4_params);
10311 sli4_params->hdr_pp_align = bf_get(hdr_pp_align, &mqe->un.sli4_params);
10312 sli4_params->sgl_pages_max = bf_get(sgl_pages, &mqe->un.sli4_params);
10313 sli4_params->sgl_pp_align = bf_get(sgl_pp_align, &mqe->un.sli4_params);
0558056c
JS		 10314
10315 /* Make sure that sge_supp_len can be handled by the driver */
10316 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
10317 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
10318
28baac74
JS		 10319 return rc;
10320}
10321
fedd3b7b
JS		 10322/**
10323 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS.
10324 * @phba: Pointer to HBA context object.
10325 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
10326 *
10327 * This function is called in the SLI4 code path to read the port's
10328 * sli4 capabilities.
10329 *
10330 * This function may be be called from any context that can block-wait
10331 * for the completion. The expectation is that this routine is called
10332 * typically from probe_one or from the online routine.
10333 **/
10334int
10335lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
10336{
10337 int rc;
10338 struct lpfc_mqe *mqe = &mboxq->u.mqe;
10339 struct lpfc_pc_sli4_params *sli4_params;
a183a15f 10340 uint32_t mbox_tmo;
fedd3b7b
JS		 10341 int length;
10342 struct lpfc_sli4_parameters *mbx_sli4_parameters;
10343
6d368e53
JS		 10344 /*
10345 * By default, the driver assumes the SLI4 port requires RPI
10346 * header postings. The SLI4_PARAM response will correct this
10347 * assumption.
10348 */
10349 phba->sli4_hba.rpi_hdrs_in_use = 1;
10350
fedd3b7b
JS		 10351 /* Read the port's SLI4 Config Parameters */
10352 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
10353 sizeof(struct lpfc_sli4_cfg_mhdr));
10354 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
10355 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
10356 length, LPFC_SLI4_MBX_EMBED);
10357 if (!phba->sli4_hba.intr_enable)
10358 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
a183a15f
JS		 10359 else {
10360 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
10361 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
10362 }
fedd3b7b
JS		 10363 if (unlikely(rc))
10364 return rc;
10365 sli4_params = &phba->sli4_hba.pc_sli4_params;
10366 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
10367 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters);
10368 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters);
10369 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters);
10370 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1,
10371 mbx_sli4_parameters);
10372 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2,
10373 mbx_sli4_parameters);
10374 if (bf_get(cfg_phwq, mbx_sli4_parameters))
10375 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED;
10376 else
10377 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED;
10378 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len;
10379 sli4_params->loopbk_scope = bf_get(loopbk_scope, mbx_sli4_parameters);
1ba981fd 10380 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters);
fedd3b7b
JS		 10381 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters);
10382 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters);
10383 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters);
10384 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters);
0c651878 10385 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters);
fedd3b7b
JS		 10386 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt,
10387 mbx_sli4_parameters);
895427bd 10388 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters);
fedd3b7b
JS		 10389 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align,
10390 mbx_sli4_parameters);
6d368e53
JS		 10391 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
10392 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
895427bd
JS		 10393 phba->nvme_support = (bf_get(cfg_nvme, mbx_sli4_parameters) &&
10394 bf_get(cfg_xib, mbx_sli4_parameters));
10395
10396 if ((phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) ||
10397 !phba->nvme_support) {
10398 phba->nvme_support = 0;
10399 phba->nvmet_support = 0;
2d7dbc4c 10400 phba->cfg_nvmet_mrq = 0;
895427bd
JS		 10401 phba->cfg_nvme_io_channel = 0;
10402 phba->io_channel_irqs = phba->cfg_fcp_io_channel;
10403 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
10404 "6101 Disabling NVME support: "
10405 "Not supported by firmware: %d %d\n",
10406 bf_get(cfg_nvme, mbx_sli4_parameters),
10407 bf_get(cfg_xib, mbx_sli4_parameters));
10408
10409 /* If firmware doesn't support NVME, just use SCSI support */
10410 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
10411 return -ENODEV;
10412 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
10413 }
0558056c 10414
f358dd0c
JS		 10415 if (bf_get(cfg_xib, mbx_sli4_parameters) && phba->cfg_suppress_rsp)
10416 phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP;
10417
0cf07f84
JS		 10418 if (bf_get(cfg_eqdr, mbx_sli4_parameters))
10419 phba->sli.sli_flag |= LPFC_SLI_USE_EQDR;
10420
0558056c
JS		 10421 /* Make sure that sge_supp_len can be handled by the driver */
10422 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
10423 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
10424
b5c53958
JS		 10425 /*
10426 * Issue IOs with CDB embedded in WQE to minimized the number
10427 * of DMAs the firmware has to do. Setting this to 1 also forces
10428 * the driver to use 128 bytes WQEs for FCP IOs.
10429 */
10430 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters))
10431 phba->fcp_embed_io = 1;
10432 else
10433 phba->fcp_embed_io = 0;
7bdedb34
JS		 10434
10435 /*
10436 * Check if the SLI port supports MDS Diagnostics
10437 */
10438 if (bf_get(cfg_mds_diags, mbx_sli4_parameters))
10439 phba->mds_diags_support = 1;
10440 else
10441 phba->mds_diags_support = 0;
fedd3b7b
JS		 10442 return 0;
10443}
10444
da0436e9
JS		 10445/**
10446 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
10447 * @pdev: pointer to PCI device
10448 * @pid: pointer to PCI device identifier
10449 *
10450 * This routine is to be called to attach a device with SLI-3 interface spec
10451 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
10452 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
10453 * information of the device and driver to see if the driver state that it can
10454 * support this kind of device. If the match is successful, the driver core
10455 * invokes this routine. If this routine determines it can claim the HBA, it
10456 * does all the initialization that it needs to do to handle the HBA properly.
10457 *
10458 * Return code
10459 * 0 - driver can claim the device
10460 * negative value - driver can not claim the device
10461 **/
6f039790 10462static int
da0436e9
JS		 10463lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid)
10464{
10465 struct lpfc_hba *phba;
10466 struct lpfc_vport *vport = NULL;
6669f9bb 10467 struct Scsi_Host *shost = NULL;
da0436e9
JS		 10468 int error;
10469 uint32_t cfg_mode, intr_mode;
10470
10471 /* Allocate memory for HBA structure */
10472 phba = lpfc_hba_alloc(pdev);
10473 if (!phba)
10474 return -ENOMEM;
10475
10476 /* Perform generic PCI device enabling operation */
10477 error = lpfc_enable_pci_dev(phba);
079b5c91 10478 if (error)
da0436e9 10479 goto out_free_phba;
da0436e9
JS		 10480
10481 /* Set up SLI API function jump table for PCI-device group-0 HBAs */
10482 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP);
10483 if (error)
10484 goto out_disable_pci_dev;
10485
10486 /* Set up SLI-3 specific device PCI memory space */
10487 error = lpfc_sli_pci_mem_setup(phba);
10488 if (error) {
10489 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10490 "1402 Failed to set up pci memory space.\n");
10491 goto out_disable_pci_dev;
10492 }
10493
da0436e9
JS		 10494 /* Set up SLI-3 specific device driver resources */
10495 error = lpfc_sli_driver_resource_setup(phba);
10496 if (error) {
10497 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10498 "1404 Failed to set up driver resource.\n");
10499 goto out_unset_pci_mem_s3;
10500 }
10501
10502 /* Initialize and populate the iocb list per host */
d1f525aa 10503
da0436e9
JS		 10504 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT);
10505 if (error) {
10506 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10507 "1405 Failed to initialize iocb list.\n");
10508 goto out_unset_driver_resource_s3;
10509 }
10510
10511 /* Set up common device driver resources */
10512 error = lpfc_setup_driver_resource_phase2(phba);
10513 if (error) {
10514 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10515 "1406 Failed to set up driver resource.\n");
10516 goto out_free_iocb_list;
10517 }
10518
079b5c91
JS		 10519 /* Get the default values for Model Name and Description */
10520 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
10521
da0436e9
JS		 10522 /* Create SCSI host to the physical port */
10523 error = lpfc_create_shost(phba);
10524 if (error) {
10525 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10526 "1407 Failed to create scsi host.\n");
10527 goto out_unset_driver_resource;
10528 }
10529
10530 /* Configure sysfs attributes */
10531 vport = phba->pport;
10532 error = lpfc_alloc_sysfs_attr(vport);
10533 if (error) {
10534 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10535 "1476 Failed to allocate sysfs attr\n");
10536 goto out_destroy_shost;
10537 }
10538
6669f9bb 10539 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
da0436e9
JS		 10540 /* Now, trying to enable interrupt and bring up the device */
10541 cfg_mode = phba->cfg_use_msi;
10542 while (true) {
10543 /* Put device to a known state before enabling interrupt */
10544 lpfc_stop_port(phba);
10545 /* Configure and enable interrupt */
10546 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode);
10547 if (intr_mode == LPFC_INTR_ERROR) {
10548 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10549 "0431 Failed to enable interrupt.\n");
10550 error = -ENODEV;
10551 goto out_free_sysfs_attr;
10552 }
10553 /* SLI-3 HBA setup */
10554 if (lpfc_sli_hba_setup(phba)) {
10555 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10556 "1477 Failed to set up hba\n");
10557 error = -ENODEV;
10558 goto out_remove_device;
10559 }
10560
10561 /* Wait 50ms for the interrupts of previous mailbox commands */
10562 msleep(50);
10563 /* Check active interrupts on message signaled interrupts */
10564 if (intr_mode == 0 ||
10565 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) {
10566 /* Log the current active interrupt mode */
10567 phba->intr_mode = intr_mode;
10568 lpfc_log_intr_mode(phba, intr_mode);
10569 break;
10570 } else {
10571 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10572 "0447 Configure interrupt mode (%d) "
10573 "failed active interrupt test.\n",
10574 intr_mode);
10575 /* Disable the current interrupt mode */
10576 lpfc_sli_disable_intr(phba);
10577 /* Try next level of interrupt mode */
10578 cfg_mode = --intr_mode;
10579 }
10580 }
10581
10582 /* Perform post initialization setup */
10583 lpfc_post_init_setup(phba);
10584
10585 /* Check if there are static vports to be created. */
10586 lpfc_create_static_vport(phba);
10587
10588 return 0;
10589
10590out_remove_device:
10591 lpfc_unset_hba(phba);
10592out_free_sysfs_attr:
10593 lpfc_free_sysfs_attr(vport);
10594out_destroy_shost:
10595 lpfc_destroy_shost(phba);
10596out_unset_driver_resource:
10597 lpfc_unset_driver_resource_phase2(phba);
10598out_free_iocb_list:
10599 lpfc_free_iocb_list(phba);
10600out_unset_driver_resource_s3:
10601 lpfc_sli_driver_resource_unset(phba);
10602out_unset_pci_mem_s3:
10603 lpfc_sli_pci_mem_unset(phba);
10604out_disable_pci_dev:
10605 lpfc_disable_pci_dev(phba);
6669f9bb
JS		 10606 if (shost)
10607 scsi_host_put(shost);
da0436e9
JS		 10608out_free_phba:
10609 lpfc_hba_free(phba);
10610 return error;
10611}
10612
10613/**
10614 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem.
10615 * @pdev: pointer to PCI device
10616 *
10617 * This routine is to be called to disattach a device with SLI-3 interface
10618 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
10619 * removed from PCI bus, it performs all the necessary cleanup for the HBA
10620 * device to be removed from the PCI subsystem properly.
10621 **/
6f039790 10622static void
da0436e9
JS		 10623lpfc_pci_remove_one_s3(struct pci_dev *pdev)
10624{
10625 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10626 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
10627 struct lpfc_vport **vports;
10628 struct lpfc_hba *phba = vport->phba;
10629 int i;
da0436e9
JS		 10630
10631 spin_lock_irq(&phba->hbalock);
10632 vport->load_flag |= FC_UNLOADING;
10633 spin_unlock_irq(&phba->hbalock);
10634
10635 lpfc_free_sysfs_attr(vport);
10636
10637 /* Release all the vports against this physical port */
10638 vports = lpfc_create_vport_work_array(phba);
10639 if (vports != NULL)
587a37f6
JS		 10640 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
10641 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
10642 continue;
da0436e9 10643 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 10644 }
da0436e9
JS		 10645 lpfc_destroy_vport_work_array(phba, vports);
10646
10647 /* Remove FC host and then SCSI host with the physical port */
10648 fc_remove_host(shost);
10649 scsi_remove_host(shost);
d613b6a7 10650
da0436e9
JS		 10651 lpfc_cleanup(vport);
10652
10653 /*
10654 * Bring down the SLI Layer. This step disable all interrupts,
10655 * clears the rings, discards all mailbox commands, and resets
10656 * the HBA.
10657 */
10658
48e34d0f 10659 /* HBA interrupt will be disabled after this call */
da0436e9
JS		 10660 lpfc_sli_hba_down(phba);
10661 /* Stop kthread signal shall trigger work_done one more time */
10662 kthread_stop(phba->worker_thread);
10663 /* Final cleanup of txcmplq and reset the HBA */
10664 lpfc_sli_brdrestart(phba);
10665
72859909
JS		 10666 kfree(phba->vpi_bmask);
10667 kfree(phba->vpi_ids);
10668
da0436e9
JS		 10669 lpfc_stop_hba_timers(phba);
10670 spin_lock_irq(&phba->hbalock);
10671 list_del_init(&vport->listentry);
10672 spin_unlock_irq(&phba->hbalock);
10673
10674 lpfc_debugfs_terminate(vport);
10675
912e3acd
JS		 10676 /* Disable SR-IOV if enabled */
10677 if (phba->cfg_sriov_nr_virtfn)
10678 pci_disable_sriov(pdev);
10679
da0436e9
JS		 10680 /* Disable interrupt */
10681 lpfc_sli_disable_intr(phba);
10682
da0436e9
JS		 10683 scsi_host_put(shost);
10684
10685 /*
10686 * Call scsi_free before mem_free since scsi bufs are released to their
10687 * corresponding pools here.
10688 */
10689 lpfc_scsi_free(phba);
10690 lpfc_mem_free_all(phba);
10691
10692 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
10693 phba->hbqslimp.virt, phba->hbqslimp.phys);
10694
10695 /* Free resources associated with SLI2 interface */
10696 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
10697 phba->slim2p.virt, phba->slim2p.phys);
10698
10699 /* unmap adapter SLIM and Control Registers */
10700 iounmap(phba->ctrl_regs_memmap_p);
10701 iounmap(phba->slim_memmap_p);
10702
10703 lpfc_hba_free(phba);
10704
e0c0483c 10705 pci_release_mem_regions(pdev);
da0436e9
JS		 10706 pci_disable_device(pdev);
10707}
10708
10709/**
10710 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt
10711 * @pdev: pointer to PCI device
10712 * @msg: power management message
10713 *
10714 * This routine is to be called from the kernel's PCI subsystem to support
10715 * system Power Management (PM) to device with SLI-3 interface spec. When
10716 * PM invokes this method, it quiesces the device by stopping the driver's
10717 * worker thread for the device, turning off device's interrupt and DMA,
10718 * and bring the device offline. Note that as the driver implements the
10719 * minimum PM requirements to a power-aware driver's PM support for the
10720 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
10721 * to the suspend() method call will be treated as SUSPEND and the driver will
10722 * fully reinitialize its device during resume() method call, the driver will
10723 * set device to PCI_D3hot state in PCI config space instead of setting it
10724 * according to the @msg provided by the PM.
10725 *
10726 * Return code
10727 * 0 - driver suspended the device
10728 * Error otherwise
10729 **/
10730static int
10731lpfc_pci_suspend_one_s3(struct pci_dev *pdev, pm_message_t msg)
10732{
10733 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10734 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10735
10736 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10737 "0473 PCI device Power Management suspend.\n");
10738
10739 /* Bring down the device */
618a5230 10740 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS		 10741 lpfc_offline(phba);
10742 kthread_stop(phba->worker_thread);
10743
10744 /* Disable interrupt from device */
10745 lpfc_sli_disable_intr(phba);
10746
10747 /* Save device state to PCI config space */
10748 pci_save_state(pdev);
10749 pci_set_power_state(pdev, PCI_D3hot);
10750
10751 return 0;
10752}
10753
10754/**
10755 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt
10756 * @pdev: pointer to PCI device
10757 *
10758 * This routine is to be called from the kernel's PCI subsystem to support
10759 * system Power Management (PM) to device with SLI-3 interface spec. When PM
10760 * invokes this method, it restores the device's PCI config space state and
10761 * fully reinitializes the device and brings it online. Note that as the
10762 * driver implements the minimum PM requirements to a power-aware driver's
10763 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE,
10764 * FREEZE) to the suspend() method call will be treated as SUSPEND and the
10765 * driver will fully reinitialize its device during resume() method call,
10766 * the device will be set to PCI_D0 directly in PCI config space before
10767 * restoring the state.
10768 *
10769 * Return code
10770 * 0 - driver suspended the device
10771 * Error otherwise
10772 **/
10773static int
10774lpfc_pci_resume_one_s3(struct pci_dev *pdev)
10775{
10776 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10777 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10778 uint32_t intr_mode;
10779 int error;
10780
10781 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10782 "0452 PCI device Power Management resume.\n");
10783
10784 /* Restore device state from PCI config space */
10785 pci_set_power_state(pdev, PCI_D0);
10786 pci_restore_state(pdev);
0d878419 10787
1dfb5a47
JS		 10788 /*
10789 * As the new kernel behavior of pci_restore_state() API call clears
10790 * device saved_state flag, need to save the restored state again.
10791 */
10792 pci_save_state(pdev);
10793
da0436e9
JS		 10794 if (pdev->is_busmaster)
10795 pci_set_master(pdev);
10796
10797 /* Startup the kernel thread for this host adapter. */
10798 phba->worker_thread = kthread_run(lpfc_do_work, phba,
10799 "lpfc_worker_%d", phba->brd_no);
10800 if (IS_ERR(phba->worker_thread)) {
10801 error = PTR_ERR(phba->worker_thread);
10802 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10803 "0434 PM resume failed to start worker "
10804 "thread: error=x%x.\n", error);
10805 return error;
10806 }
10807
10808 /* Configure and enable interrupt */
10809 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
10810 if (intr_mode == LPFC_INTR_ERROR) {
10811 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10812 "0430 PM resume Failed to enable interrupt\n");
10813 return -EIO;
10814 } else
10815 phba->intr_mode = intr_mode;
10816
10817 /* Restart HBA and bring it online */
10818 lpfc_sli_brdrestart(phba);
10819 lpfc_online(phba);
10820
10821 /* Log the current active interrupt mode */
10822 lpfc_log_intr_mode(phba, phba->intr_mode);
10823
10824 return 0;
10825}
10826
891478a2
JS		 10827/**
10828 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover
10829 * @phba: pointer to lpfc hba data structure.
10830 *
10831 * This routine is called to prepare the SLI3 device for PCI slot recover. It
e2af0d2e 10832 * aborts all the outstanding SCSI I/Os to the pci device.
891478a2
JS		 10833 **/
10834static void
10835lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
10836{
10837 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10838 "2723 PCI channel I/O abort preparing for recovery\n");
e2af0d2e
JS		 10839
10840 /*
10841 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
10842 * and let the SCSI mid-layer to retry them to recover.
10843 */
db55fba8 10844 lpfc_sli_abort_fcp_rings(phba);
891478a2
JS		 10845}
10846
0d878419
JS		 10847/**
10848 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset
10849 * @phba: pointer to lpfc hba data structure.
10850 *
10851 * This routine is called to prepare the SLI3 device for PCI slot reset. It
10852 * disables the device interrupt and pci device, and aborts the internal FCP
10853 * pending I/Os.
10854 **/
10855static void
10856lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba)
10857{
0d878419 10858 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10859 "2710 PCI channel disable preparing for reset\n");
e2af0d2e 10860
75baf696 10861 /* Block any management I/Os to the device */
618a5230 10862 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
75baf696 10863
e2af0d2e
JS		 10864 /* Block all SCSI devices' I/Os on the host */
10865 lpfc_scsi_dev_block(phba);
10866
ea714f3d
JS		 10867 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
10868 lpfc_sli_flush_fcp_rings(phba);
10869
e2af0d2e
JS		 10870 /* stop all timers */
10871 lpfc_stop_hba_timers(phba);
10872
0d878419
JS		 10873 /* Disable interrupt and pci device */
10874 lpfc_sli_disable_intr(phba);
10875 pci_disable_device(phba->pcidev);
0d878419
JS		 10876}
10877
10878/**
10879 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable
10880 * @phba: pointer to lpfc hba data structure.
10881 *
10882 * This routine is called to prepare the SLI3 device for PCI slot permanently
10883 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
10884 * pending I/Os.
10885 **/
10886static void
75baf696 10887lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba)
0d878419
JS		 10888{
10889 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
891478a2 10890 "2711 PCI channel permanent disable for failure\n");
e2af0d2e
JS		 10891 /* Block all SCSI devices' I/Os on the host */
10892 lpfc_scsi_dev_block(phba);
10893
10894 /* stop all timers */
10895 lpfc_stop_hba_timers(phba);
10896
0d878419
JS		 10897 /* Clean up all driver's outstanding SCSI I/Os */
10898 lpfc_sli_flush_fcp_rings(phba);
10899}
10900
da0436e9
JS		 10901/**
10902 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error
10903 * @pdev: pointer to PCI device.
10904 * @state: the current PCI connection state.
10905 *
10906 * This routine is called from the PCI subsystem for I/O error handling to
10907 * device with SLI-3 interface spec. This function is called by the PCI
10908 * subsystem after a PCI bus error affecting this device has been detected.
10909 * When this function is invoked, it will need to stop all the I/Os and
10910 * interrupt(s) to the device. Once that is done, it will return
10911 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery
10912 * as desired.
10913 *
10914 * Return codes
0d878419 10915 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link
da0436e9
JS		 10916 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
10917 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
10918 **/
10919static pci_ers_result_t
10920lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
10921{
10922 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10923 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
da0436e9 10924
0d878419
JS		 10925 switch (state) {
10926 case pci_channel_io_normal:
891478a2
JS		 10927 /* Non-fatal error, prepare for recovery */
10928 lpfc_sli_prep_dev_for_recover(phba);
0d878419
JS		 10929 return PCI_ERS_RESULT_CAN_RECOVER;
10930 case pci_channel_io_frozen:
10931 /* Fatal error, prepare for slot reset */
10932 lpfc_sli_prep_dev_for_reset(phba);
10933 return PCI_ERS_RESULT_NEED_RESET;
10934 case pci_channel_io_perm_failure:
10935 /* Permanent failure, prepare for device down */
75baf696 10936 lpfc_sli_prep_dev_for_perm_failure(phba);
da0436e9 10937 return PCI_ERS_RESULT_DISCONNECT;
0d878419
JS		 10938 default:
10939 /* Unknown state, prepare and request slot reset */
10940 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10941 "0472 Unknown PCI error state: x%x\n", state);
10942 lpfc_sli_prep_dev_for_reset(phba);
10943 return PCI_ERS_RESULT_NEED_RESET;
da0436e9 10944 }
da0436e9
JS		 10945}
10946
10947/**
10948 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch.
10949 * @pdev: pointer to PCI device.
10950 *
10951 * This routine is called from the PCI subsystem for error handling to
10952 * device with SLI-3 interface spec. This is called after PCI bus has been
10953 * reset to restart the PCI card from scratch, as if from a cold-boot.
10954 * During the PCI subsystem error recovery, after driver returns
10955 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
10956 * recovery and then call this routine before calling the .resume method
10957 * to recover the device. This function will initialize the HBA device,
10958 * enable the interrupt, but it will just put the HBA to offline state
10959 * without passing any I/O traffic.
10960 *
10961 * Return codes
10962 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
10963 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
10964 */
10965static pci_ers_result_t
10966lpfc_io_slot_reset_s3(struct pci_dev *pdev)
10967{
10968 struct Scsi_Host *shost = pci_get_drvdata(pdev);
10969 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
10970 struct lpfc_sli *psli = &phba->sli;
10971 uint32_t intr_mode;
10972
10973 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
10974 if (pci_enable_device_mem(pdev)) {
10975 printk(KERN_ERR "lpfc: Cannot re-enable "
10976 "PCI device after reset.\n");
10977 return PCI_ERS_RESULT_DISCONNECT;
10978 }
10979
10980 pci_restore_state(pdev);
1dfb5a47
JS		 10981
10982 /*
10983 * As the new kernel behavior of pci_restore_state() API call clears
10984 * device saved_state flag, need to save the restored state again.
10985 */
10986 pci_save_state(pdev);
10987
da0436e9
JS		 10988 if (pdev->is_busmaster)
10989 pci_set_master(pdev);
10990
10991 spin_lock_irq(&phba->hbalock);
10992 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
10993 spin_unlock_irq(&phba->hbalock);
10994
10995 /* Configure and enable interrupt */
10996 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
10997 if (intr_mode == LPFC_INTR_ERROR) {
10998 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10999 "0427 Cannot re-enable interrupt after "
11000 "slot reset.\n");
11001 return PCI_ERS_RESULT_DISCONNECT;
11002 } else
11003 phba->intr_mode = intr_mode;
11004
75baf696 11005 /* Take device offline, it will perform cleanup */
618a5230 11006 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
da0436e9
JS		 11007 lpfc_offline(phba);
11008 lpfc_sli_brdrestart(phba);
11009
11010 /* Log the current active interrupt mode */
11011 lpfc_log_intr_mode(phba, phba->intr_mode);
11012
11013 return PCI_ERS_RESULT_RECOVERED;
11014}
11015
11016/**
11017 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device.
11018 * @pdev: pointer to PCI device
11019 *
11020 * This routine is called from the PCI subsystem for error handling to device
11021 * with SLI-3 interface spec. It is called when kernel error recovery tells
11022 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
11023 * error recovery. After this call, traffic can start to flow from this device
11024 * again.
11025 */
11026static void
11027lpfc_io_resume_s3(struct pci_dev *pdev)
11028{
11029 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11030 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
3772a991 11031
e2af0d2e 11032 /* Bring device online, it will be no-op for non-fatal error resume */
da0436e9 11033 lpfc_online(phba);
0d878419
JS		 11034
11035 /* Clean up Advanced Error Reporting (AER) if needed */
11036 if (phba->hba_flag & HBA_AER_ENABLED)
11037 pci_cleanup_aer_uncorrect_error_status(pdev);
da0436e9 11038}
3772a991 11039
da0436e9
JS		 11040/**
11041 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve
11042 * @phba: pointer to lpfc hba data structure.
11043 *
11044 * returns the number of ELS/CT IOCBs to reserve
11045 **/
11046int
11047lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba)
11048{
11049 int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
11050
f1126688
JS		 11051 if (phba->sli_rev == LPFC_SLI_REV4) {
11052 if (max_xri <= 100)
6a9c52cf 11053 return 10;
f1126688 11054 else if (max_xri <= 256)
6a9c52cf 11055 return 25;
f1126688 11056 else if (max_xri <= 512)
6a9c52cf 11057 return 50;
f1126688 11058 else if (max_xri <= 1024)
6a9c52cf 11059 return 100;
8a9d2e80 11060 else if (max_xri <= 1536)
6a9c52cf 11061 return 150;
8a9d2e80
JS		 11062 else if (max_xri <= 2048)
11063 return 200;
11064 else
11065 return 250;
f1126688
JS		 11066 } else
11067 return 0;
3772a991
JS		 11068}
11069
895427bd
JS		 11070/**
11071 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve
11072 * @phba: pointer to lpfc hba data structure.
11073 *
f358dd0c 11074 * returns the number of ELS/CT + NVMET IOCBs to reserve
895427bd
JS		 11075 **/
11076int
11077lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba)
11078{
11079 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba);
11080
f358dd0c
JS		 11081 if (phba->nvmet_support)
11082 max_xri += LPFC_NVMET_BUF_POST;
895427bd
JS		 11083 return max_xri;
11084}
11085
11086
52d52440
JS		 11087/**
11088 * lpfc_write_firmware - attempt to write a firmware image to the port
52d52440 11089 * @fw: pointer to firmware image returned from request_firmware.
ce396282 11090 * @phba: pointer to lpfc hba data structure.
52d52440 11091 *
52d52440 11092 **/
ce396282
JS		 11093static void
11094lpfc_write_firmware(const struct firmware *fw, void *context)
52d52440 11095{
ce396282 11096 struct lpfc_hba *phba = (struct lpfc_hba *)context;
6b5151fd 11097 char fwrev[FW_REV_STR_SIZE];
ce396282 11098 struct lpfc_grp_hdr *image;
52d52440
JS		 11099 struct list_head dma_buffer_list;
11100 int i, rc = 0;
11101 struct lpfc_dmabuf *dmabuf, *next;
11102 uint32_t offset = 0, temp_offset = 0;
6b6ef5db 11103 uint32_t magic_number, ftype, fid, fsize;
52d52440 11104
c71ab861 11105 /* It can be null in no-wait mode, sanity check */
ce396282
JS		 11106 if (!fw) {
11107 rc = -ENXIO;
11108 goto out;
11109 }
11110 image = (struct lpfc_grp_hdr *)fw->data;
11111
6b6ef5db
JS		 11112 magic_number = be32_to_cpu(image->magic_number);
11113 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image);
11114 fid = bf_get_be32(lpfc_grp_hdr_id, image),
11115 fsize = be32_to_cpu(image->size);
11116
52d52440 11117 INIT_LIST_HEAD(&dma_buffer_list);
6b6ef5db
JS		 11118 if ((magic_number != LPFC_GROUP_OJECT_MAGIC_G5 &&
11119 magic_number != LPFC_GROUP_OJECT_MAGIC_G6) ||
11120 ftype != LPFC_FILE_TYPE_GROUP || fsize != fw->size) {
52d52440
JS		 11121 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11122 "3022 Invalid FW image found. "
efe583c6 11123 "Magic:%x Type:%x ID:%x Size %d %zd\n",
6b6ef5db 11124 magic_number, ftype, fid, fsize, fw->size);
ce396282
JS		 11125 rc = -EINVAL;
11126 goto release_out;
52d52440
JS		 11127 }
11128 lpfc_decode_firmware_rev(phba, fwrev, 1);
88a2cfbb 11129 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) {
52d52440 11130 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
ce396282 11131 "3023 Updating Firmware, Current Version:%s "
52d52440 11132 "New Version:%s\n",
88a2cfbb 11133 fwrev, image->revision);
52d52440
JS		 11134 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) {
11135 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
11136 GFP_KERNEL);
11137 if (!dmabuf) {
11138 rc = -ENOMEM;
ce396282 11139 goto release_out;
52d52440
JS		 11140 }
11141 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
11142 SLI4_PAGE_SIZE,
11143 &dmabuf->phys,
11144 GFP_KERNEL);
11145 if (!dmabuf->virt) {
11146 kfree(dmabuf);
11147 rc = -ENOMEM;
ce396282 11148 goto release_out;
52d52440
JS		 11149 }
11150 list_add_tail(&dmabuf->list, &dma_buffer_list);
11151 }
11152 while (offset < fw->size) {
11153 temp_offset = offset;
11154 list_for_each_entry(dmabuf, &dma_buffer_list, list) {
079b5c91 11155 if (temp_offset + SLI4_PAGE_SIZE > fw->size) {
52d52440
JS		 11156 memcpy(dmabuf->virt,
11157 fw->data + temp_offset,
079b5c91
JS		 11158 fw->size - temp_offset);
11159 temp_offset = fw->size;
52d52440
JS		 11160 break;
11161 }
52d52440
JS		 11162 memcpy(dmabuf->virt, fw->data + temp_offset,
11163 SLI4_PAGE_SIZE);
88a2cfbb 11164 temp_offset += SLI4_PAGE_SIZE;
52d52440
JS		 11165 }
11166 rc = lpfc_wr_object(phba, &dma_buffer_list,
11167 (fw->size - offset), &offset);
ce396282
JS		 11168 if (rc)
11169 goto release_out;
52d52440
JS		 11170 }
11171 rc = offset;
11172 }
ce396282
JS		 11173
11174release_out:
52d52440
JS		 11175 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) {
11176 list_del(&dmabuf->list);
11177 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
11178 dmabuf->virt, dmabuf->phys);
11179 kfree(dmabuf);
11180 }
ce396282
JS		 11181 release_firmware(fw);
11182out:
11183 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
c71ab861 11184 "3024 Firmware update done: %d.\n", rc);
ce396282 11185 return;
52d52440
JS		 11186}
11187
c71ab861
JS		 11188/**
11189 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade
11190 * @phba: pointer to lpfc hba data structure.
11191 *
11192 * This routine is called to perform Linux generic firmware upgrade on device
11193 * that supports such feature.
11194 **/
11195int
11196lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade)
11197{
11198 uint8_t file_name[ELX_MODEL_NAME_SIZE];
11199 int ret;
11200 const struct firmware *fw;
11201
11202 /* Only supported on SLI4 interface type 2 for now */
11203 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
11204 LPFC_SLI_INTF_IF_TYPE_2)
11205 return -EPERM;
11206
11207 snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName);
11208
11209 if (fw_upgrade == INT_FW_UPGRADE) {
11210 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
11211 file_name, &phba->pcidev->dev,
11212 GFP_KERNEL, (void *)phba,
11213 lpfc_write_firmware);
11214 } else if (fw_upgrade == RUN_FW_UPGRADE) {
11215 ret = request_firmware(&fw, file_name, &phba->pcidev->dev);
11216 if (!ret)
11217 lpfc_write_firmware(fw, (void *)phba);
11218 } else {
11219 ret = -EINVAL;
11220 }
11221
11222 return ret;
11223}
11224
3772a991 11225/**
da0436e9 11226 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys
3772a991
JS		 11227 * @pdev: pointer to PCI device
11228 * @pid: pointer to PCI device identifier
11229 *
da0436e9
JS		 11230 * This routine is called from the kernel's PCI subsystem to device with
11231 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991 11232 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
da0436e9
JS		 11233 * information of the device and driver to see if the driver state that it
11234 * can support this kind of device. If the match is successful, the driver
11235 * core invokes this routine. If this routine determines it can claim the HBA,
11236 * it does all the initialization that it needs to do to handle the HBA
11237 * properly.
3772a991
JS		 11238 *
11239 * Return code
11240 * 0 - driver can claim the device
11241 * negative value - driver can not claim the device
11242 **/
6f039790 11243static int
da0436e9 11244lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
3772a991
JS		 11245{
11246 struct lpfc_hba *phba;
11247 struct lpfc_vport *vport = NULL;
6669f9bb 11248 struct Scsi_Host *shost = NULL;
6c621a22 11249 int error;
3772a991
JS		 11250 uint32_t cfg_mode, intr_mode;
11251
11252 /* Allocate memory for HBA structure */
11253 phba = lpfc_hba_alloc(pdev);
11254 if (!phba)
11255 return -ENOMEM;
11256
11257 /* Perform generic PCI device enabling operation */
11258 error = lpfc_enable_pci_dev(phba);
079b5c91 11259 if (error)
3772a991 11260 goto out_free_phba;
3772a991 11261
da0436e9
JS		 11262 /* Set up SLI API function jump table for PCI-device group-1 HBAs */
11263 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC);
3772a991
JS		 11264 if (error)
11265 goto out_disable_pci_dev;
11266
da0436e9
JS		 11267 /* Set up SLI-4 specific device PCI memory space */
11268 error = lpfc_sli4_pci_mem_setup(phba);
3772a991
JS		 11269 if (error) {
11270 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11271 "1410 Failed to set up pci memory space.\n");
3772a991
JS		 11272 goto out_disable_pci_dev;
11273 }
11274
da0436e9
JS		 11275 /* Set up SLI-4 Specific device driver resources */
11276 error = lpfc_sli4_driver_resource_setup(phba);
3772a991
JS		 11277 if (error) {
11278 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9
JS		 11279 "1412 Failed to set up driver resource.\n");
11280 goto out_unset_pci_mem_s4;
3772a991
JS		 11281 }
11282
19ca7609 11283 INIT_LIST_HEAD(&phba->active_rrq_list);
7d791df7 11284 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list);
19ca7609 11285
3772a991
JS		 11286 /* Set up common device driver resources */
11287 error = lpfc_setup_driver_resource_phase2(phba);
11288 if (error) {
11289 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11290 "1414 Failed to set up driver resource.\n");
6c621a22 11291 goto out_unset_driver_resource_s4;
3772a991
JS		 11292 }
11293
079b5c91
JS		 11294 /* Get the default values for Model Name and Description */
11295 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
11296
3772a991
JS		 11297 /* Create SCSI host to the physical port */
11298 error = lpfc_create_shost(phba);
11299 if (error) {
11300 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11301 "1415 Failed to create scsi host.\n");
3772a991
JS		 11302 goto out_unset_driver_resource;
11303 }
9399627f 11304
5b75da2f 11305 /* Configure sysfs attributes */
3772a991
JS		 11306 vport = phba->pport;
11307 error = lpfc_alloc_sysfs_attr(vport);
11308 if (error) {
9399627f 11309 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11310 "1416 Failed to allocate sysfs attr\n");
3772a991 11311 goto out_destroy_shost;
98c9ea5c 11312 }
875fbdfe 11313
6669f9bb 11314 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
3772a991 11315 /* Now, trying to enable interrupt and bring up the device */
5b75da2f 11316 cfg_mode = phba->cfg_use_msi;
5b75da2f 11317
7b15db32
JS		 11318 /* Put device to a known state before enabling interrupt */
11319 lpfc_stop_port(phba);
895427bd 11320
7b15db32
JS		 11321 /* Configure and enable interrupt */
11322 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode);
11323 if (intr_mode == LPFC_INTR_ERROR) {
11324 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11325 "0426 Failed to enable interrupt.\n");
11326 error = -ENODEV;
11327 goto out_free_sysfs_attr;
11328 }
11329 /* Default to single EQ for non-MSI-X */
895427bd
JS		 11330 if (phba->intr_type != MSIX) {
11331 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)
11332 phba->cfg_fcp_io_channel = 1;
2d7dbc4c 11333 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
895427bd 11334 phba->cfg_nvme_io_channel = 1;
2d7dbc4c
JS		 11335 if (phba->nvmet_support)
11336 phba->cfg_nvmet_mrq = 1;
11337 }
895427bd
JS		 11338 phba->io_channel_irqs = 1;
11339 }
11340
7b15db32
JS		 11341 /* Set up SLI-4 HBA */
11342 if (lpfc_sli4_hba_setup(phba)) {
11343 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11344 "1421 Failed to set up hba\n");
11345 error = -ENODEV;
11346 goto out_disable_intr;
98c9ea5c 11347 }
858c9f6c 11348
7b15db32
JS		 11349 /* Log the current active interrupt mode */
11350 phba->intr_mode = intr_mode;
11351 lpfc_log_intr_mode(phba, intr_mode);
11352
3772a991
JS		 11353 /* Perform post initialization setup */
11354 lpfc_post_init_setup(phba);
dea3101e 11355
01649561
JS		 11356 /* NVME support in FW earlier in the driver load corrects the
11357 * FC4 type making a check for nvme_support unnecessary.
11358 */
11359 if ((phba->nvmet_support == 0) &&
11360 (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)) {
11361 /* Create NVME binding with nvme_fc_transport. This
d1f525aa
JS		 11362 * ensures the vport is initialized. If the localport
11363 * create fails, it should not unload the driver to
11364 * support field issues.
01649561
JS		 11365 */
11366 error = lpfc_nvme_create_localport(vport);
11367 if (error) {
11368 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11369 "6004 NVME registration failed, "
11370 "error x%x\n",
11371 error);
01649561
JS		 11372 }
11373 }
895427bd 11374
c71ab861
JS		 11375 /* check for firmware upgrade or downgrade */
11376 if (phba->cfg_request_firmware_upgrade)
db6f1c2f 11377 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE);
52d52440 11378
1c6834a7
JS		 11379 /* Check if there are static vports to be created. */
11380 lpfc_create_static_vport(phba);
dea3101e 11381 return 0;
11382
da0436e9
JS		 11383out_disable_intr:
11384 lpfc_sli4_disable_intr(phba);
5b75da2f
JS		 11385out_free_sysfs_attr:
11386 lpfc_free_sysfs_attr(vport);
3772a991
JS		 11387out_destroy_shost:
11388 lpfc_destroy_shost(phba);
11389out_unset_driver_resource:
11390 lpfc_unset_driver_resource_phase2(phba);
da0436e9
JS		 11391out_unset_driver_resource_s4:
11392 lpfc_sli4_driver_resource_unset(phba);
11393out_unset_pci_mem_s4:
11394 lpfc_sli4_pci_mem_unset(phba);
3772a991
JS		 11395out_disable_pci_dev:
11396 lpfc_disable_pci_dev(phba);
6669f9bb
JS		 11397 if (shost)
11398 scsi_host_put(shost);
2e0fef85 11399out_free_phba:
3772a991 11400 lpfc_hba_free(phba);
dea3101e 11401 return error;
11402}
11403
e59058c4 11404/**
da0436e9 11405 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem
e59058c4
JS		 11406 * @pdev: pointer to PCI device
11407 *
da0436e9
JS		 11408 * This routine is called from the kernel's PCI subsystem to device with
11409 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
3772a991
JS		 11410 * removed from PCI bus, it performs all the necessary cleanup for the HBA
11411 * device to be removed from the PCI subsystem properly.
e59058c4 11412 **/
6f039790 11413static void
da0436e9 11414lpfc_pci_remove_one_s4(struct pci_dev *pdev)
dea3101e 11415{
da0436e9 11416 struct Scsi_Host *shost = pci_get_drvdata(pdev);
2e0fef85 11417 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
eada272d 11418 struct lpfc_vport **vports;
da0436e9 11419 struct lpfc_hba *phba = vport->phba;
eada272d 11420 int i;
8a4df120 11421
da0436e9 11422 /* Mark the device unloading flag */
549e55cd 11423 spin_lock_irq(&phba->hbalock);
51ef4c26 11424 vport->load_flag |= FC_UNLOADING;
549e55cd 11425 spin_unlock_irq(&phba->hbalock);
2e0fef85 11426
da0436e9 11427 /* Free the HBA sysfs attributes */
858c9f6c
JS		 11428 lpfc_free_sysfs_attr(vport);
11429
eada272d
JS		 11430 /* Release all the vports against this physical port */
11431 vports = lpfc_create_vport_work_array(phba);
11432 if (vports != NULL)
587a37f6
JS		 11433 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
11434 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
11435 continue;
eada272d 11436 fc_vport_terminate(vports[i]->fc_vport);
587a37f6 11437 }
eada272d
JS		 11438 lpfc_destroy_vport_work_array(phba, vports);
11439
11440 /* Remove FC host and then SCSI host with the physical port */
858c9f6c
JS		 11441 fc_remove_host(shost);
11442 scsi_remove_host(shost);
1234a6d5
DK		 11443 /*
11444 * Bring down the SLI Layer. This step disables all interrupts,
11445 * clears the rings, discards all mailbox commands, and resets
11446 * the HBA FCoE function.
11447 */
11448 lpfc_debugfs_terminate(vport);
11449 lpfc_sli4_hba_unset(phba);
da0436e9 11450
d613b6a7
JS		 11451 /* Perform ndlp cleanup on the physical port. The nvme and nvmet
11452 * localports are destroyed after to cleanup all transport memory.
895427bd 11453 */
87af33fe 11454 lpfc_cleanup(vport);
d613b6a7
JS		 11455 lpfc_nvmet_destroy_targetport(phba);
11456 lpfc_nvme_destroy_localport(vport);
87af33fe 11457
a257bf90 11458
1901762f 11459 lpfc_stop_hba_timers(phba);
858c9f6c
JS		 11460 spin_lock_irq(&phba->hbalock);
11461 list_del_init(&vport->listentry);
11462 spin_unlock_irq(&phba->hbalock);
11463
3677a3a7 11464 /* Perform scsi free before driver resource_unset since scsi
da0436e9 11465 * buffers are released to their corresponding pools here.
2e0fef85
JS		 11466 */
11467 lpfc_scsi_free(phba);
895427bd 11468 lpfc_nvme_free(phba);
01649561 11469 lpfc_free_iocb_list(phba);
67d12733 11470
da0436e9 11471 lpfc_sli4_driver_resource_unset(phba);
ed957684 11472
da0436e9
JS		 11473 /* Unmap adapter Control and Doorbell registers */
11474 lpfc_sli4_pci_mem_unset(phba);
2e0fef85 11475
da0436e9
JS		 11476 /* Release PCI resources and disable device's PCI function */
11477 scsi_host_put(shost);
11478 lpfc_disable_pci_dev(phba);
2e0fef85 11479
da0436e9 11480 /* Finally, free the driver's device data structure */
3772a991 11481 lpfc_hba_free(phba);
2e0fef85 11482
da0436e9 11483 return;
dea3101e 11484}
11485
3a55b532 11486/**
da0436e9 11487 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt
3a55b532
JS		 11488 * @pdev: pointer to PCI device
11489 * @msg: power management message
11490 *
da0436e9
JS		 11491 * This routine is called from the kernel's PCI subsystem to support system
11492 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes
11493 * this method, it quiesces the device by stopping the driver's worker
11494 * thread for the device, turning off device's interrupt and DMA, and bring
11495 * the device offline. Note that as the driver implements the minimum PM
11496 * requirements to a power-aware driver's PM support for suspend/resume -- all
11497 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend()
11498 * method call will be treated as SUSPEND and the driver will fully
11499 * reinitialize its device during resume() method call, the driver will set
11500 * device to PCI_D3hot state in PCI config space instead of setting it
3772a991 11501 * according to the @msg provided by the PM.
3a55b532
JS		 11502 *
11503 * Return code
3772a991
JS		 11504 * 0 - driver suspended the device
11505 * Error otherwise
3a55b532
JS		 11506 **/
11507static int
da0436e9 11508lpfc_pci_suspend_one_s4(struct pci_dev *pdev, pm_message_t msg)
3a55b532
JS		 11509{
11510 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11511 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11512
11513 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
75baf696 11514 "2843 PCI device Power Management suspend.\n");
3a55b532
JS		 11515
11516 /* Bring down the device */
618a5230 11517 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
3a55b532
JS		 11518 lpfc_offline(phba);
11519 kthread_stop(phba->worker_thread);
11520
11521 /* Disable interrupt from device */
da0436e9 11522 lpfc_sli4_disable_intr(phba);
5350d872 11523 lpfc_sli4_queue_destroy(phba);
3a55b532
JS		 11524
11525 /* Save device state to PCI config space */
11526 pci_save_state(pdev);
11527 pci_set_power_state(pdev, PCI_D3hot);
11528
11529 return 0;
11530}
11531
11532/**
da0436e9 11533 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt
3a55b532
JS		 11534 * @pdev: pointer to PCI device
11535 *
da0436e9
JS		 11536 * This routine is called from the kernel's PCI subsystem to support system
11537 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes
11538 * this method, it restores the device's PCI config space state and fully
11539 * reinitializes the device and brings it online. Note that as the driver
11540 * implements the minimum PM requirements to a power-aware driver's PM for
11541 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
11542 * to the suspend() method call will be treated as SUSPEND and the driver
11543 * will fully reinitialize its device during resume() method call, the device
11544 * will be set to PCI_D0 directly in PCI config space before restoring the
11545 * state.
3a55b532
JS		 11546 *
11547 * Return code
3772a991
JS		 11548 * 0 - driver suspended the device
11549 * Error otherwise
3a55b532
JS		 11550 **/
11551static int
da0436e9 11552lpfc_pci_resume_one_s4(struct pci_dev *pdev)
3a55b532
JS		 11553{
11554 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11555 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
5b75da2f 11556 uint32_t intr_mode;
3a55b532
JS		 11557 int error;
11558
11559 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
da0436e9 11560 "0292 PCI device Power Management resume.\n");
3a55b532
JS		 11561
11562 /* Restore device state from PCI config space */
11563 pci_set_power_state(pdev, PCI_D0);
11564 pci_restore_state(pdev);
1dfb5a47
JS		 11565
11566 /*
11567 * As the new kernel behavior of pci_restore_state() API call clears
11568 * device saved_state flag, need to save the restored state again.
11569 */
11570 pci_save_state(pdev);
11571
3a55b532
JS		 11572 if (pdev->is_busmaster)
11573 pci_set_master(pdev);
11574
da0436e9 11575 /* Startup the kernel thread for this host adapter. */
3a55b532
JS		 11576 phba->worker_thread = kthread_run(lpfc_do_work, phba,
11577 "lpfc_worker_%d", phba->brd_no);
11578 if (IS_ERR(phba->worker_thread)) {
11579 error = PTR_ERR(phba->worker_thread);
11580 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11581 "0293 PM resume failed to start worker "
3a55b532
JS		 11582 "thread: error=x%x.\n", error);
11583 return error;
11584 }
11585
5b75da2f 11586 /* Configure and enable interrupt */
da0436e9 11587 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
5b75da2f 11588 if (intr_mode == LPFC_INTR_ERROR) {
3a55b532 11589 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
da0436e9 11590 "0294 PM resume Failed to enable interrupt\n");
5b75da2f
JS		 11591 return -EIO;
11592 } else
11593 phba->intr_mode = intr_mode;
3a55b532
JS		 11594
11595 /* Restart HBA and bring it online */
11596 lpfc_sli_brdrestart(phba);
11597 lpfc_online(phba);
11598
5b75da2f
JS		 11599 /* Log the current active interrupt mode */
11600 lpfc_log_intr_mode(phba, phba->intr_mode);
11601
3a55b532
JS		 11602 return 0;
11603}
11604
75baf696
JS		 11605/**
11606 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover
11607 * @phba: pointer to lpfc hba data structure.
11608 *
11609 * This routine is called to prepare the SLI4 device for PCI slot recover. It
11610 * aborts all the outstanding SCSI I/Os to the pci device.
11611 **/
11612static void
11613lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba)
11614{
75baf696
JS		 11615 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11616 "2828 PCI channel I/O abort preparing for recovery\n");
11617 /*
11618 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
11619 * and let the SCSI mid-layer to retry them to recover.
11620 */
db55fba8 11621 lpfc_sli_abort_fcp_rings(phba);
75baf696
JS		 11622}
11623
11624/**
11625 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset
11626 * @phba: pointer to lpfc hba data structure.
11627 *
11628 * This routine is called to prepare the SLI4 device for PCI slot reset. It
11629 * disables the device interrupt and pci device, and aborts the internal FCP
11630 * pending I/Os.
11631 **/
11632static void
11633lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba)
11634{
11635 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11636 "2826 PCI channel disable preparing for reset\n");
11637
11638 /* Block any management I/Os to the device */
618a5230 11639 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT);
75baf696
JS		 11640
11641 /* Block all SCSI devices' I/Os on the host */
11642 lpfc_scsi_dev_block(phba);
11643
ea714f3d
JS		 11644 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
11645 lpfc_sli_flush_fcp_rings(phba);
11646
75baf696
JS		 11647 /* stop all timers */
11648 lpfc_stop_hba_timers(phba);
11649
11650 /* Disable interrupt and pci device */
11651 lpfc_sli4_disable_intr(phba);
5350d872 11652 lpfc_sli4_queue_destroy(phba);
75baf696 11653 pci_disable_device(phba->pcidev);
75baf696
JS		 11654}
11655
11656/**
11657 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable
11658 * @phba: pointer to lpfc hba data structure.
11659 *
11660 * This routine is called to prepare the SLI4 device for PCI slot permanently
11661 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
11662 * pending I/Os.
11663 **/
11664static void
11665lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba)
11666{
11667 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11668 "2827 PCI channel permanent disable for failure\n");
11669
11670 /* Block all SCSI devices' I/Os on the host */
11671 lpfc_scsi_dev_block(phba);
11672
11673 /* stop all timers */
11674 lpfc_stop_hba_timers(phba);
11675
11676 /* Clean up all driver's outstanding SCSI I/Os */
11677 lpfc_sli_flush_fcp_rings(phba);
11678}
11679
8d63f375 11680/**
da0436e9 11681 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device
e59058c4
JS		 11682 * @pdev: pointer to PCI device.
11683 * @state: the current PCI connection state.
8d63f375 11684 *
da0436e9
JS		 11685 * This routine is called from the PCI subsystem for error handling to device
11686 * with SLI-4 interface spec. This function is called by the PCI subsystem
11687 * after a PCI bus error affecting this device has been detected. When this
11688 * function is invoked, it will need to stop all the I/Os and interrupt(s)
11689 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET
11690 * for the PCI subsystem to perform proper recovery as desired.
e59058c4
JS		 11691 *
11692 * Return codes
3772a991
JS		 11693 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
11694 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
e59058c4 11695 **/
3772a991 11696static pci_ers_result_t
da0436e9 11697lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state)
8d63f375 11698{
75baf696
JS		 11699 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11700 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11701
11702 switch (state) {
11703 case pci_channel_io_normal:
11704 /* Non-fatal error, prepare for recovery */
11705 lpfc_sli4_prep_dev_for_recover(phba);
11706 return PCI_ERS_RESULT_CAN_RECOVER;
11707 case pci_channel_io_frozen:
11708 /* Fatal error, prepare for slot reset */
11709 lpfc_sli4_prep_dev_for_reset(phba);
11710 return PCI_ERS_RESULT_NEED_RESET;
11711 case pci_channel_io_perm_failure:
11712 /* Permanent failure, prepare for device down */
11713 lpfc_sli4_prep_dev_for_perm_failure(phba);
11714 return PCI_ERS_RESULT_DISCONNECT;
11715 default:
11716 /* Unknown state, prepare and request slot reset */
11717 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11718 "2825 Unknown PCI error state: x%x\n", state);
11719 lpfc_sli4_prep_dev_for_reset(phba);
11720 return PCI_ERS_RESULT_NEED_RESET;
11721 }
8d63f375
LV		 11722}
11723
11724/**
da0436e9 11725 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch
e59058c4
JS		 11726 * @pdev: pointer to PCI device.
11727 *
da0436e9
JS		 11728 * This routine is called from the PCI subsystem for error handling to device
11729 * with SLI-4 interface spec. It is called after PCI bus has been reset to
11730 * restart the PCI card from scratch, as if from a cold-boot. During the
11731 * PCI subsystem error recovery, after the driver returns
3772a991 11732 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
da0436e9
JS		 11733 * recovery and then call this routine before calling the .resume method to
11734 * recover the device. This function will initialize the HBA device, enable
11735 * the interrupt, but it will just put the HBA to offline state without
11736 * passing any I/O traffic.
8d63f375 11737 *
e59058c4 11738 * Return codes
3772a991
JS		 11739 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
11740 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
8d63f375 11741 */
3772a991 11742static pci_ers_result_t
da0436e9 11743lpfc_io_slot_reset_s4(struct pci_dev *pdev)
8d63f375 11744{
75baf696
JS		 11745 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11746 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11747 struct lpfc_sli *psli = &phba->sli;
11748 uint32_t intr_mode;
11749
11750 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
11751 if (pci_enable_device_mem(pdev)) {
11752 printk(KERN_ERR "lpfc: Cannot re-enable "
11753 "PCI device after reset.\n");
11754 return PCI_ERS_RESULT_DISCONNECT;
11755 }
11756
11757 pci_restore_state(pdev);
0a96e975
JS		 11758
11759 /*
11760 * As the new kernel behavior of pci_restore_state() API call clears
11761 * device saved_state flag, need to save the restored state again.
11762 */
11763 pci_save_state(pdev);
11764
75baf696
JS		 11765 if (pdev->is_busmaster)
11766 pci_set_master(pdev);
11767
11768 spin_lock_irq(&phba->hbalock);
11769 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
11770 spin_unlock_irq(&phba->hbalock);
11771
11772 /* Configure and enable interrupt */
11773 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
11774 if (intr_mode == LPFC_INTR_ERROR) {
11775 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11776 "2824 Cannot re-enable interrupt after "
11777 "slot reset.\n");
11778 return PCI_ERS_RESULT_DISCONNECT;
11779 } else
11780 phba->intr_mode = intr_mode;
11781
11782 /* Log the current active interrupt mode */
11783 lpfc_log_intr_mode(phba, phba->intr_mode);
11784
8d63f375
LV		 11785 return PCI_ERS_RESULT_RECOVERED;
11786}
11787
11788/**
da0436e9 11789 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device
e59058c4 11790 * @pdev: pointer to PCI device
8d63f375 11791 *
3772a991 11792 * This routine is called from the PCI subsystem for error handling to device
da0436e9 11793 * with SLI-4 interface spec. It is called when kernel error recovery tells
3772a991
JS		 11794 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
11795 * error recovery. After this call, traffic can start to flow from this device
11796 * again.
da0436e9 11797 **/
3772a991 11798static void
da0436e9 11799lpfc_io_resume_s4(struct pci_dev *pdev)
8d63f375 11800{
75baf696
JS		 11801 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11802 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11803
11804 /*
11805 * In case of slot reset, as function reset is performed through
11806 * mailbox command which needs DMA to be enabled, this operation
11807 * has to be moved to the io resume phase. Taking device offline
11808 * will perform the necessary cleanup.
11809 */
11810 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) {
11811 /* Perform device reset */
618a5230 11812 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
75baf696
JS		 11813 lpfc_offline(phba);
11814 lpfc_sli_brdrestart(phba);
11815 /* Bring the device back online */
11816 lpfc_online(phba);
11817 }
11818
11819 /* Clean up Advanced Error Reporting (AER) if needed */
11820 if (phba->hba_flag & HBA_AER_ENABLED)
11821 pci_cleanup_aer_uncorrect_error_status(pdev);
8d63f375
LV		 11822}
11823
3772a991
JS		 11824/**
11825 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem
11826 * @pdev: pointer to PCI device
11827 * @pid: pointer to PCI device identifier
11828 *
11829 * This routine is to be registered to the kernel's PCI subsystem. When an
11830 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks
11831 * at PCI device-specific information of the device and driver to see if the
11832 * driver state that it can support this kind of device. If the match is
11833 * successful, the driver core invokes this routine. This routine dispatches
11834 * the action to the proper SLI-3 or SLI-4 device probing routine, which will
11835 * do all the initialization that it needs to do to handle the HBA device
11836 * properly.
11837 *
11838 * Return code
11839 * 0 - driver can claim the device
11840 * negative value - driver can not claim the device
11841 **/
6f039790 11842static int
3772a991
JS		 11843lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
11844{
11845 int rc;
8fa38513 11846 struct lpfc_sli_intf intf;
3772a991 11847
28baac74 11848 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
3772a991
JS		 11849 return -ENODEV;
11850
8fa38513 11851 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
28baac74 11852 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
da0436e9 11853 rc = lpfc_pci_probe_one_s4(pdev, pid);
8fa38513 11854 else
3772a991 11855 rc = lpfc_pci_probe_one_s3(pdev, pid);
8fa38513 11856
3772a991
JS		 11857 return rc;
11858}
11859
11860/**
11861 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem
11862 * @pdev: pointer to PCI device
11863 *
11864 * This routine is to be registered to the kernel's PCI subsystem. When an
11865 * Emulex HBA is removed from PCI bus, the driver core invokes this routine.
11866 * This routine dispatches the action to the proper SLI-3 or SLI-4 device
11867 * remove routine, which will perform all the necessary cleanup for the
11868 * device to be removed from the PCI subsystem properly.
11869 **/
6f039790 11870static void
3772a991
JS		 11871lpfc_pci_remove_one(struct pci_dev *pdev)
11872{
11873 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11874 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11875
11876 switch (phba->pci_dev_grp) {
11877 case LPFC_PCI_DEV_LP:
11878 lpfc_pci_remove_one_s3(pdev);
11879 break;
da0436e9
JS		 11880 case LPFC_PCI_DEV_OC:
11881 lpfc_pci_remove_one_s4(pdev);
11882 break;
3772a991
JS		 11883 default:
11884 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11885 "1424 Invalid PCI device group: 0x%x\n",
11886 phba->pci_dev_grp);
11887 break;
11888 }
11889 return;
11890}
11891
11892/**
11893 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management
11894 * @pdev: pointer to PCI device
11895 * @msg: power management message
11896 *
11897 * This routine is to be registered to the kernel's PCI subsystem to support
11898 * system Power Management (PM). When PM invokes this method, it dispatches
11899 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will
11900 * suspend the device.
11901 *
11902 * Return code
11903 * 0 - driver suspended the device
11904 * Error otherwise
11905 **/
11906static int
11907lpfc_pci_suspend_one(struct pci_dev *pdev, pm_message_t msg)
11908{
11909 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11910 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11911 int rc = -ENODEV;
11912
11913 switch (phba->pci_dev_grp) {
11914 case LPFC_PCI_DEV_LP:
11915 rc = lpfc_pci_suspend_one_s3(pdev, msg);
11916 break;
da0436e9
JS		 11917 case LPFC_PCI_DEV_OC:
11918 rc = lpfc_pci_suspend_one_s4(pdev, msg);
11919 break;
3772a991
JS		 11920 default:
11921 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11922 "1425 Invalid PCI device group: 0x%x\n",
11923 phba->pci_dev_grp);
11924 break;
11925 }
11926 return rc;
11927}
11928
11929/**
11930 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management
11931 * @pdev: pointer to PCI device
11932 *
11933 * This routine is to be registered to the kernel's PCI subsystem to support
11934 * system Power Management (PM). When PM invokes this method, it dispatches
11935 * the action to the proper SLI-3 or SLI-4 device resume routine, which will
11936 * resume the device.
11937 *
11938 * Return code
11939 * 0 - driver suspended the device
11940 * Error otherwise
11941 **/
11942static int
11943lpfc_pci_resume_one(struct pci_dev *pdev)
11944{
11945 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11946 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11947 int rc = -ENODEV;
11948
11949 switch (phba->pci_dev_grp) {
11950 case LPFC_PCI_DEV_LP:
11951 rc = lpfc_pci_resume_one_s3(pdev);
11952 break;
da0436e9
JS		 11953 case LPFC_PCI_DEV_OC:
11954 rc = lpfc_pci_resume_one_s4(pdev);
11955 break;
3772a991
JS		 11956 default:
11957 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11958 "1426 Invalid PCI device group: 0x%x\n",
11959 phba->pci_dev_grp);
11960 break;
11961 }
11962 return rc;
11963}
11964
11965/**
11966 * lpfc_io_error_detected - lpfc method for handling PCI I/O error
11967 * @pdev: pointer to PCI device.
11968 * @state: the current PCI connection state.
11969 *
11970 * This routine is registered to the PCI subsystem for error handling. This
11971 * function is called by the PCI subsystem after a PCI bus error affecting
11972 * this device has been detected. When this routine is invoked, it dispatches
11973 * the action to the proper SLI-3 or SLI-4 device error detected handling
11974 * routine, which will perform the proper error detected operation.
11975 *
11976 * Return codes
11977 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
11978 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
11979 **/
11980static pci_ers_result_t
11981lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
11982{
11983 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11984 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
11985 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
11986
11987 switch (phba->pci_dev_grp) {
11988 case LPFC_PCI_DEV_LP:
11989 rc = lpfc_io_error_detected_s3(pdev, state);
11990 break;
da0436e9
JS		 11991 case LPFC_PCI_DEV_OC:
11992 rc = lpfc_io_error_detected_s4(pdev, state);
11993 break;
3772a991
JS		 11994 default:
11995 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11996 "1427 Invalid PCI device group: 0x%x\n",
11997 phba->pci_dev_grp);
11998 break;
11999 }
12000 return rc;
12001}
12002
12003/**
12004 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch
12005 * @pdev: pointer to PCI device.
12006 *
12007 * This routine is registered to the PCI subsystem for error handling. This
12008 * function is called after PCI bus has been reset to restart the PCI card
12009 * from scratch, as if from a cold-boot. When this routine is invoked, it
12010 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling
12011 * routine, which will perform the proper device reset.
12012 *
12013 * Return codes
12014 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
12015 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
12016 **/
12017static pci_ers_result_t
12018lpfc_io_slot_reset(struct pci_dev *pdev)
12019{
12020 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12021 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12022 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
12023
12024 switch (phba->pci_dev_grp) {
12025 case LPFC_PCI_DEV_LP:
12026 rc = lpfc_io_slot_reset_s3(pdev);
12027 break;
da0436e9
JS		 12028 case LPFC_PCI_DEV_OC:
12029 rc = lpfc_io_slot_reset_s4(pdev);
12030 break;
3772a991
JS		 12031 default:
12032 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12033 "1428 Invalid PCI device group: 0x%x\n",
12034 phba->pci_dev_grp);
12035 break;
12036 }
12037 return rc;
12038}
12039
12040/**
12041 * lpfc_io_resume - lpfc method for resuming PCI I/O operation
12042 * @pdev: pointer to PCI device
12043 *
12044 * This routine is registered to the PCI subsystem for error handling. It
12045 * is called when kernel error recovery tells the lpfc driver that it is
12046 * OK to resume normal PCI operation after PCI bus error recovery. When
12047 * this routine is invoked, it dispatches the action to the proper SLI-3
12048 * or SLI-4 device io_resume routine, which will resume the device operation.
12049 **/
12050static void
12051lpfc_io_resume(struct pci_dev *pdev)
12052{
12053 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12054 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12055
12056 switch (phba->pci_dev_grp) {
12057 case LPFC_PCI_DEV_LP:
12058 lpfc_io_resume_s3(pdev);
12059 break;
da0436e9
JS		 12060 case LPFC_PCI_DEV_OC:
12061 lpfc_io_resume_s4(pdev);
12062 break;
3772a991
JS		 12063 default:
12064 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12065 "1429 Invalid PCI device group: 0x%x\n",
12066 phba->pci_dev_grp);
12067 break;
12068 }
12069 return;
12070}
12071
1ba981fd
JS		 12072/**
12073 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter
12074 * @phba: pointer to lpfc hba data structure.
12075 *
12076 * This routine checks to see if OAS is supported for this adapter. If
12077 * supported, the configure Flash Optimized Fabric flag is set. Otherwise,
12078 * the enable oas flag is cleared and the pool created for OAS device data
12079 * is destroyed.
12080 *
12081 **/
12082void
12083lpfc_sli4_oas_verify(struct lpfc_hba *phba)
12084{
12085
12086 if (!phba->cfg_EnableXLane)
12087 return;
12088
12089 if (phba->sli4_hba.pc_sli4_params.oas_supported) {
12090 phba->cfg_fof = 1;
12091 } else {
f38fa0bb 12092 phba->cfg_fof = 0;
1ba981fd
JS		 12093 if (phba->device_data_mem_pool)
12094 mempool_destroy(phba->device_data_mem_pool);
12095 phba->device_data_mem_pool = NULL;
12096 }
12097
12098 return;
12099}
12100
12101/**
12102 * lpfc_fof_queue_setup - Set up all the fof queues
12103 * @phba: pointer to lpfc hba data structure.
12104 *
12105 * This routine is invoked to set up all the fof queues for the FC HBA
12106 * operation.
12107 *
12108 * Return codes
12109 * 0 - successful
12110 * -ENOMEM - No available memory
12111 **/
12112int
12113lpfc_fof_queue_setup(struct lpfc_hba *phba)
12114{
895427bd 12115 struct lpfc_sli_ring *pring;
1ba981fd
JS		 12116 int rc;
12117
12118 rc = lpfc_eq_create(phba, phba->sli4_hba.fof_eq, LPFC_MAX_IMAX);
12119 if (rc)
12120 return -ENOMEM;
12121
f38fa0bb 12122 if (phba->cfg_fof) {
1ba981fd
JS		 12123
12124 rc = lpfc_cq_create(phba, phba->sli4_hba.oas_cq,
12125 phba->sli4_hba.fof_eq, LPFC_WCQ, LPFC_FCP);
12126 if (rc)
12127 goto out_oas_cq;
12128
12129 rc = lpfc_wq_create(phba, phba->sli4_hba.oas_wq,
12130 phba->sli4_hba.oas_cq, LPFC_FCP);
12131 if (rc)
12132 goto out_oas_wq;
12133
895427bd
JS		 12134 /* Bind this CQ/WQ to the NVME ring */
12135 pring = phba->sli4_hba.oas_wq->pring;
12136 pring->sli.sli4.wqp =
12137 (void *)phba->sli4_hba.oas_wq;
12138 phba->sli4_hba.oas_cq->pring = pring;
1ba981fd
JS		 12139 }
12140
12141 return 0;
12142
12143out_oas_wq:
f38fa0bb 12144 lpfc_cq_destroy(phba, phba->sli4_hba.oas_cq);
1ba981fd
JS		 12145out_oas_cq:
12146 lpfc_eq_destroy(phba, phba->sli4_hba.fof_eq);
12147 return rc;
12148
12149}
12150
12151/**
12152 * lpfc_fof_queue_create - Create all the fof queues
12153 * @phba: pointer to lpfc hba data structure.
12154 *
12155 * This routine is invoked to allocate all the fof queues for the FC HBA
12156 * operation. For each SLI4 queue type, the parameters such as queue entry
12157 * count (queue depth) shall be taken from the module parameter. For now,
12158 * we just use some constant number as place holder.
12159 *
12160 * Return codes
12161 * 0 - successful
12162 * -ENOMEM - No availble memory
12163 * -EIO - The mailbox failed to complete successfully.
12164 **/
12165int
12166lpfc_fof_queue_create(struct lpfc_hba *phba)
12167{
12168 struct lpfc_queue *qdesc;
7e04e21a 12169 uint32_t wqesize;
1ba981fd
JS		 12170
12171 /* Create FOF EQ */
81b96eda
JS		 12172 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
12173 phba->sli4_hba.eq_esize,
1ba981fd
JS		 12174 phba->sli4_hba.eq_ecount);
12175 if (!qdesc)
12176 goto out_error;
12177
12178 phba->sli4_hba.fof_eq = qdesc;
12179
f38fa0bb 12180 if (phba->cfg_fof) {
1ba981fd
JS		 12181
12182 /* Create OAS CQ */
81b96eda
JS		 12183 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
12184 phba->sli4_hba.cq_esize,
12185 phba->sli4_hba.cq_ecount);
1ba981fd
JS		 12186 if (!qdesc)
12187 goto out_error;
12188
12189 phba->sli4_hba.oas_cq = qdesc;
12190
12191 /* Create OAS WQ */
7e04e21a
JS		 12192 wqesize = (phba->fcp_embed_io) ?
12193 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
81b96eda
JS		 12194 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
12195 wqesize,
1ba981fd 12196 phba->sli4_hba.wq_ecount);
7e04e21a 12197
1ba981fd
JS		 12198 if (!qdesc)
12199 goto out_error;
12200
12201 phba->sli4_hba.oas_wq = qdesc;
895427bd 12202 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
1ba981fd
JS		 12203
12204 }
12205 return 0;
12206
12207out_error:
12208 lpfc_fof_queue_destroy(phba);
12209 return -ENOMEM;
12210}
12211
12212/**
12213 * lpfc_fof_queue_destroy - Destroy all the fof queues
12214 * @phba: pointer to lpfc hba data structure.
12215 *
12216 * This routine is invoked to release all the SLI4 queues with the FC HBA
12217 * operation.
12218 *
12219 * Return codes
12220 * 0 - successful
12221 **/
12222int
12223lpfc_fof_queue_destroy(struct lpfc_hba *phba)
12224{
12225 /* Release FOF Event queue */
12226 if (phba->sli4_hba.fof_eq != NULL) {
12227 lpfc_sli4_queue_free(phba->sli4_hba.fof_eq);
12228 phba->sli4_hba.fof_eq = NULL;
12229 }
12230
12231 /* Release OAS Completion queue */
12232 if (phba->sli4_hba.oas_cq != NULL) {
12233 lpfc_sli4_queue_free(phba->sli4_hba.oas_cq);
12234 phba->sli4_hba.oas_cq = NULL;
12235 }
12236
12237 /* Release OAS Work queue */
12238 if (phba->sli4_hba.oas_wq != NULL) {
12239 lpfc_sli4_queue_free(phba->sli4_hba.oas_wq);
12240 phba->sli4_hba.oas_wq = NULL;
12241 }
12242 return 0;
12243}
12244
dea3101e 12245MODULE_DEVICE_TABLE(pci, lpfc_id_table);
12246
a55b2d21 12247static const struct pci_error_handlers lpfc_err_handler = {
8d63f375
LV		 12248 .error_detected = lpfc_io_error_detected,
12249 .slot_reset = lpfc_io_slot_reset,
12250 .resume = lpfc_io_resume,
12251};
12252
dea3101e 12253static struct pci_driver lpfc_driver = {
12254 .name = LPFC_DRIVER_NAME,
12255 .id_table = lpfc_id_table,
12256 .probe = lpfc_pci_probe_one,
6f039790 12257 .remove = lpfc_pci_remove_one,
85e8a239 12258 .shutdown = lpfc_pci_remove_one,
3a55b532 12259 .suspend = lpfc_pci_suspend_one,
3772a991 12260 .resume = lpfc_pci_resume_one,
2e0fef85 12261 .err_handler = &lpfc_err_handler,
dea3101e 12262};
12263
3ef6d24c 12264static const struct file_operations lpfc_mgmt_fop = {
858feacd 12265 .owner = THIS_MODULE,
3ef6d24c
JS		 12266};
12267
12268static struct miscdevice lpfc_mgmt_dev = {
12269 .minor = MISC_DYNAMIC_MINOR,
12270 .name = "lpfcmgmt",
12271 .fops = &lpfc_mgmt_fop,
12272};
12273
e59058c4 12274/**
3621a710 12275 * lpfc_init - lpfc module initialization routine
e59058c4
JS		 12276 *
12277 * This routine is to be invoked when the lpfc module is loaded into the
12278 * kernel. The special kernel macro module_init() is used to indicate the
12279 * role of this routine to the kernel as lpfc module entry point.
12280 *
12281 * Return codes
12282 * 0 - successful
12283 * -ENOMEM - FC attach transport failed
12284 * all others - failed
12285 */
dea3101e 12286static int __init
12287lpfc_init(void)
12288{
12289 int error = 0;
12290
12291 printk(LPFC_MODULE_DESC "\n");
c44ce173 12292 printk(LPFC_COPYRIGHT "\n");
dea3101e 12293
3ef6d24c
JS		 12294 error = misc_register(&lpfc_mgmt_dev);
12295 if (error)
12296 printk(KERN_ERR "Could not register lpfcmgmt device, "
12297 "misc_register returned with status %d", error);
12298
458c083e
JS		 12299 lpfc_transport_functions.vport_create = lpfc_vport_create;
12300 lpfc_transport_functions.vport_delete = lpfc_vport_delete;
dea3101e 12301 lpfc_transport_template =
12302 fc_attach_transport(&lpfc_transport_functions);
7ee5d43e 12303 if (lpfc_transport_template == NULL)
dea3101e 12304 return -ENOMEM;
458c083e
JS		 12305 lpfc_vport_transport_template =
12306 fc_attach_transport(&lpfc_vport_transport_functions);
12307 if (lpfc_vport_transport_template == NULL) {
12308 fc_release_transport(lpfc_transport_template);
12309 return -ENOMEM;
7ee5d43e 12310 }
7bb03bbf
JS		 12311
12312 /* Initialize in case vector mapping is needed */
b246de17 12313 lpfc_used_cpu = NULL;
2ea259ee 12314 lpfc_present_cpu = num_present_cpus();
7bb03bbf 12315
dea3101e 12316 error = pci_register_driver(&lpfc_driver);
92d7f7b0 12317 if (error) {
dea3101e 12318 fc_release_transport(lpfc_transport_template);
458c083e 12319 fc_release_transport(lpfc_vport_transport_template);
92d7f7b0 12320 }
dea3101e 12321
12322 return error;
12323}
12324
e59058c4 12325/**
3621a710 12326 * lpfc_exit - lpfc module removal routine
e59058c4
JS		 12327 *
12328 * This routine is invoked when the lpfc module is removed from the kernel.
12329 * The special kernel macro module_exit() is used to indicate the role of
12330 * this routine to the kernel as lpfc module exit point.
12331 */
dea3101e 12332static void __exit
12333lpfc_exit(void)
12334{
3ef6d24c 12335 misc_deregister(&lpfc_mgmt_dev);
dea3101e 12336 pci_unregister_driver(&lpfc_driver);
12337 fc_release_transport(lpfc_transport_template);
458c083e 12338 fc_release_transport(lpfc_vport_transport_template);
81301a9b 12339 if (_dump_buf_data) {
6a9c52cf
JS		 12340 printk(KERN_ERR "9062 BLKGRD: freeing %lu pages for "
12341 "_dump_buf_data at 0x%p\n",
81301a9b
JS		 12342 (1L << _dump_buf_data_order), _dump_buf_data);
12343 free_pages((unsigned long)_dump_buf_data, _dump_buf_data_order);
12344 }
12345
12346 if (_dump_buf_dif) {
6a9c52cf
JS		 12347 printk(KERN_ERR "9049 BLKGRD: freeing %lu pages for "
12348 "_dump_buf_dif at 0x%p\n",
81301a9b
JS		 12349 (1L << _dump_buf_dif_order), _dump_buf_dif);
12350 free_pages((unsigned long)_dump_buf_dif, _dump_buf_dif_order);
12351 }
b246de17 12352 kfree(lpfc_used_cpu);
7973967f 12353 idr_destroy(&lpfc_hba_index);
dea3101e 12354}
12355
12356module_init(lpfc_init);
12357module_exit(lpfc_exit);
12358MODULE_LICENSE("GPL");
12359MODULE_DESCRIPTION(LPFC_MODULE_DESC);
d080abe0 12360MODULE_AUTHOR("Broadcom");
dea3101e 12361MODULE_VERSION("0:" LPFC_DRIVER_VERSION);
Linux 6.x block layer and io_uring tree(s)